process.vdi

#-----------------------------------------------------------
# Vivado v2025.1 (64-bit)
# SW Build 6140274 on Wed May 21 22:58:25 MDT 2025
# IP Build 6138677 on Thu May 22 03:10:11 MDT 2025
# SharedData Build 6139179 on Tue May 20 17:58:58 MDT 2025
# Start of session at: Wed Dec 17 15:54:01 2025
# Process ID         : 61429
# Current directory  : /nfs/home/c/ch_aleja/COEN313/Modelsim/Code/project/project_1/project_1.runs/impl_1
# Command line       : vivado -log three_k_plus_one.vdi -applog -product Vivado -messageDb vivado.pb -mode batch -source three_k_plus_one.tcl -notrace
# Log file           : /nfs/home/c/ch_aleja/COEN313/Modelsim/Code/project/project_1/project_1.runs/impl_1/three_k_plus_one.vdi
# Journal file       : /nfs/home/c/ch_aleja/COEN313/Modelsim/Code/project/project_1/project_1.runs/impl_1/vivado.jou
# Running On         : holdup.encs.concordia.ca
# Platform           : AlmaLinux
# Operating System   : AlmaLinux release 9.6 (Sage Margay)
# Processor Detail   : 11th Gen Intel(R) Core(TM) i7-11700 @ 2.50GHz
# CPU Frequency      : 1413.679 MHz
# CPU Physical cores : 8
# CPU Logical cores  : 16
# Host memory        : 16397 MB
# Swap memory        : 10485 MB
# Total Virtual      : 26883 MB
# Available Virtual  : 21342 MB
#-----------------------------------------------------------
source three_k_plus_one.tcl -notrace
Command: link_design -top three_k_plus_one -part xc7a100tcsg324-1
Design is defaulting to srcset: sources_1
Design is defaulting to constrset: constrs_1
INFO: [Device 21-403] Loading part xc7a100tcsg324-1
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2012.082 ; gain = 0.000 ; free physical = 6562 ; free virtual = 19719
INFO: [Netlist 29-17] Analyzing 2 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2025.1
INFO: [Project 1-570] Preparing netlist for logic optimization
Parsing XDC File [/nfs/home/c/ch_aleja/COEN313/Modelsim/Code/project/3k.xdc]
Finished Parsing XDC File [/nfs/home/c/ch_aleja/COEN313/Modelsim/Code/project/3k.xdc]
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2191.719 ; gain = 0.000 ; free physical = 6477 ; free virtual = 19634
INFO: [Project 1-111] Unisim Transformation Summary:
No Unisim elements were transformed.

7 Infos, 0 Warnings, 0 Critical Warnings and 0 Errors encountered.
link_design completed successfully
link_design: Time (s): cpu = 00:00:02 ; elapsed = 00:00:07 . Memory (MB): peak = 2195.723 ; gain = 353.695 ; free physical = 6471 ; free virtual = 19628
Command: opt_design
Attempting to get a license for feature 'Implementation' and/or device 'xc7a100t'
INFO: [Common 17-349] Got license for feature 'Implementation' and/or device 'xc7a100t'
Running DRC as a precondition to command opt_design

Starting DRC Task
INFO: [DRC 23-27] Running DRC with 8 threads
INFO: [Project 1-461] DRC finished with 0 Errors
INFO: [Project 1-462] Please refer to the DRC report (report_drc) for more information.

Time (s): cpu = 00:00:02 ; elapsed = 00:00:01 . Memory (MB): peak = 2319.656 ; gain = 123.934 ; free physical = 6361 ; free virtual = 19519

Starting Cache Timing Information Task
INFO: [Timing 38-35] Done setting XDC timing constraints.
Ending Cache Timing Information Task | Checksum: 376f4db2f

Time (s): cpu = 00:00:03 ; elapsed = 00:00:06 . Memory (MB): peak = 2731.609 ; gain = 411.953 ; free physical = 5949 ; free virtual = 19123

Starting Logic Optimization Task

Phase 1 Initialization

Phase 1.1 Core Generation And Design Setup
Phase 1.1 Core Generation And Design Setup | Checksum: 376f4db2f

Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3085.531 ; gain = 0.000 ; free physical = 5602 ; free virtual = 18775

Phase 1.2 Setup Constraints And Sort Netlist
Phase 1.2 Setup Constraints And Sort Netlist | Checksum: 376f4db2f

Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3085.531 ; gain = 0.000 ; free physical = 5602 ; free virtual = 18775
Phase 1 Initialization | Checksum: 376f4db2f

Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3085.531 ; gain = 0.000 ; free physical = 5602 ; free virtual = 18776

Phase 2 Timer Update And Timing Data Collection

Phase 2.1 Timer Update
Phase 2.1 Timer Update | Checksum: 376f4db2f

Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00 . Memory (MB): peak = 3085.531 ; gain = 0.000 ; free physical = 5602 ; free virtual = 18776

Phase 2.2 Timing Data Collection
Phase 2.2 Timing Data Collection | Checksum: 376f4db2f

Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.07 . Memory (MB): peak = 3085.531 ; gain = 0.000 ; free physical = 5602 ; free virtual = 18776
Phase 2 Timer Update And Timing Data Collection | Checksum: 376f4db2f

Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.07 . Memory (MB): peak = 3085.531 ; gain = 0.000 ; free physical = 5602 ; free virtual = 18776

Phase 3 Retarget
INFO: [Opt 31-1851] Number of loadless carry chains removed were: 0
INFO: [Opt 31-1834] Total Chains To Be Transformed Were: 0 AND Number of Transformed insts Created are: 0
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
INFO: [Opt 31-49] Retargeted 0 cell(s).
Phase 3 Retarget | Checksum: 376f4db2f

Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.09 . Memory (MB): peak = 3085.531 ; gain = 0.000 ; free physical = 5602 ; free virtual = 18776
Retarget | Checksum: 376f4db2f
INFO: [Opt 31-389] Phase Retarget created 0 cells and removed 0 cells

Phase 4 Constant propagation
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
Phase 4 Constant propagation | Checksum: 376f4db2f

Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.09 . Memory (MB): peak = 3085.531 ; gain = 0.000 ; free physical = 5602 ; free virtual = 18776
Constant propagation | Checksum: 376f4db2f
INFO: [Opt 31-389] Phase Constant propagation created 0 cells and removed 0 cells

Phase 5 Sweep
INFO: [Constraints 18-11670] Building netlist checker database with flags, 0x8
Done building netlist checker database: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3085.531 ; gain = 0.000 ; free physical = 5602 ; free virtual = 18776
Phase 5 Sweep | Checksum: 302a42acb

Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.09 . Memory (MB): peak = 3085.531 ; gain = 0.000 ; free physical = 5602 ; free virtual = 18776
Sweep | Checksum: 302a42acb
INFO: [Opt 31-389] Phase Sweep created 1 cells and removed 0 cells

Phase 6 BUFG optimization
Phase 6 BUFG optimization | Checksum: 302a42acb

Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.09 . Memory (MB): peak = 3117.547 ; gain = 32.016 ; free physical = 5602 ; free virtual = 18776
BUFG optimization | Checksum: 302a42acb
INFO: [Opt 31-662] Phase BUFG optimization created 0 cells of which 0 are BUFGs and removed 0 cells.

Phase 7 Shift Register Optimization
INFO: [Opt 31-1064] SRL Remap converted 0 SRLs to 0 registers and converted 0 registers of register chains to 0 SRLs
Phase 7 Shift Register Optimization | Checksum: 302a42acb

Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.1 . Memory (MB): peak = 3117.547 ; gain = 32.016 ; free physical = 5602 ; free virtual = 18776
Shift Register Optimization | Checksum: 302a42acb
INFO: [Opt 31-389] Phase Shift Register Optimization created 0 cells and removed 0 cells

Phase 8 Post Processing Netlist
Phase 8 Post Processing Netlist | Checksum: 302a42acb

Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.1 . Memory (MB): peak = 3117.547 ; gain = 32.016 ; free physical = 5602 ; free virtual = 18776
Post Processing Netlist | Checksum: 302a42acb
INFO: [Opt 31-389] Phase Post Processing Netlist created 0 cells and removed 0 cells

Phase 9 Finalization

Phase 9.1 Finalizing Design Cores and Updating Shapes
Phase 9.1 Finalizing Design Cores and Updating Shapes | Checksum: 290be4bfe

Time (s): cpu = 00:00:00.03 ; elapsed = 00:00:00.1 . Memory (MB): peak = 3117.547 ; gain = 32.016 ; free physical = 5602 ; free virtual = 18776

Phase 9.2 Verifying Netlist Connectivity

Starting Connectivity Check Task

Time (s): cpu = 00:00:00.07 ; elapsed = 00:00:00.01 . Memory (MB): peak = 3117.547 ; gain = 0.000 ; free physical = 5602 ; free virtual = 18775
Phase 9.2 Verifying Netlist Connectivity | Checksum: 290be4bfe

Time (s): cpu = 00:00:00.1 ; elapsed = 00:00:00.11 . Memory (MB): peak = 3117.547 ; gain = 32.016 ; free physical = 5602 ; free virtual = 18775
Phase 9 Finalization | Checksum: 290be4bfe

Time (s): cpu = 00:00:00.1 ; elapsed = 00:00:00.11 . Memory (MB): peak = 3117.547 ; gain = 32.016 ; free physical = 5602 ; free virtual = 18775
Opt_design Change Summary
=========================


-------------------------------------------------------------------------------------------------------------------------
|  Phase                        |  #Cells created  |  #Cells Removed  |  #Constrained objects preventing optimizations  |
-------------------------------------------------------------------------------------------------------------------------
|  Retarget                     |               0  |               0  |                                              0  |
|  Constant propagation         |               0  |               0  |                                              0  |
|  Sweep                        |               1  |               0  |                                              0  |
|  BUFG optimization            |               0  |               0  |                                              0  |
|  Shift Register Optimization  |               0  |               0  |                                              0  |
|  Post Processing Netlist      |               0  |               0  |                                              0  |
-------------------------------------------------------------------------------------------------------------------------


Ending Logic Optimization Task | Checksum: 290be4bfe

Time (s): cpu = 00:00:00.1 ; elapsed = 00:00:00.11 . Memory (MB): peak = 3117.547 ; gain = 32.016 ; free physical = 5602 ; free virtual = 18775

Starting Power Optimization Task
INFO: [Pwropt 34-132] Skipping clock gating for clocks with a period < 2.00 ns.
Ending Power Optimization Task | Checksum: 290be4bfe

Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.05 . Memory (MB): peak = 3117.547 ; gain = 0.000 ; free physical = 5601 ; free virtual = 18775

Starting Final Cleanup Task
Ending Final Cleanup Task | Checksum: 290be4bfe

Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3117.547 ; gain = 0.000 ; free physical = 5601 ; free virtual = 18775

Starting Netlist Obfuscation Task
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3117.547 ; gain = 0.000 ; free physical = 5601 ; free virtual = 18775
Ending Netlist Obfuscation Task | Checksum: 290be4bfe

Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3117.547 ; gain = 0.000 ; free physical = 5601 ; free virtual = 18775
INFO: [Common 17-83] Releasing license: Implementation
27 Infos, 0 Warnings, 0 Critical Warnings and 0 Errors encountered.
opt_design completed successfully
opt_design: Time (s): cpu = 00:00:06 ; elapsed = 00:00:08 . Memory (MB): peak = 3117.547 ; gain = 921.824 ; free physical = 5601 ; free virtual = 18775
INFO: [Vivado 12-24828] Executing command : report_drc -file three_k_plus_one_drc_opted.rpt -pb three_k_plus_one_drc_opted.pb -rpx three_k_plus_one_drc_opted.rpx
Command: report_drc -file three_k_plus_one_drc_opted.rpt -pb three_k_plus_one_drc_opted.pb -rpx three_k_plus_one_drc_opted.rpx
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/CMC/tools/xilinx/Vitis_2025.1/2025.1/Vivado/data/ip'.
INFO: [DRC 23-27] Running DRC with 8 threads
INFO: [Vivado_Tcl 2-168] The results of DRC are in file /nfs/home/c/ch_aleja/COEN313/Modelsim/Code/project/project_1/project_1.runs/impl_1/three_k_plus_one_drc_opted.rpt.
report_drc completed successfully
INFO: [Timing 38-480] Writing timing data to binary archive.
Write ShapeDB Complete: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3127.453 ; gain = 0.000 ; free physical = 5564 ; free virtual = 18738
Wrote PlaceDB: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3127.453 ; gain = 0.000 ; free physical = 5564 ; free virtual = 18738
Wrote PulsedLatchDB: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3127.453 ; gain = 0.000 ; free physical = 5564 ; free virtual = 18738
Writing XDEF routing.
Writing XDEF routing logical nets.
Writing XDEF routing special nets.
Wrote RouteStorage: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00 . Memory (MB): peak = 3127.453 ; gain = 0.000 ; free physical = 5563 ; free virtual = 18738
Wrote Netlist Cache: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3127.453 ; gain = 0.000 ; free physical = 5562 ; free virtual = 18737
Wrote Device Cache: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3127.453 ; gain = 0.000 ; free physical = 5562 ; free virtual = 18738
Write Physdb Complete: Time (s): cpu = 00:00:00.05 ; elapsed = 00:00:00.07 . Memory (MB): peak = 3127.453 ; gain = 0.000 ; free physical = 5562 ; free virtual = 18737
INFO: [Common 17-1381] The checkpoint '/nfs/home/c/ch_aleja/COEN313/Modelsim/Code/project/project_1/project_1.runs/impl_1/three_k_plus_one_opt.dcp' has been generated.
Command: place_design
Attempting to get a license for feature 'Implementation' and/or device 'xc7a100t'
INFO: [Common 17-349] Got license for feature 'Implementation' and/or device 'xc7a100t'
INFO: [Common 17-83] Releasing license: Implementation
INFO: [DRC 23-27] Running DRC with 8 threads
INFO: [Vivado_Tcl 4-198] DRC finished with 0 Errors
INFO: [Vivado_Tcl 4-199] Please refer to the DRC report (report_drc) for more information.
Running DRC as a precondition to command place_design
INFO: [DRC 23-27] Running DRC with 8 threads
INFO: [Vivado_Tcl 4-198] DRC finished with 0 Errors
INFO: [Vivado_Tcl 4-199] Please refer to the DRC report (report_drc) for more information.
INFO: [Place 30-611] Multithreading enabled for place_design using a maximum of 8 CPUs

Starting Placer Task

Phase 1 Placer Initialization

Phase 1.1 Placer Initialization Netlist Sorting
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3178.016 ; gain = 0.000 ; free physical = 5500 ; free virtual = 18675
Phase 1.1 Placer Initialization Netlist Sorting | Checksum: 24c33991f

Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.11 . Memory (MB): peak = 3178.016 ; gain = 0.000 ; free physical = 5500 ; free virtual = 18675
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3178.016 ; gain = 0.000 ; free physical = 5500 ; free virtual = 18675

Phase 1.2 IO Placement/ Clock Placement/ Build Placer Device
INFO: [Timing 38-35] Done setting XDC timing constraints.
WARNING: [Place 30-574] Poor placement for routing between an IO pin and BUFG. This is normally an ERROR but the CLOCK_DEDICATED_ROUTE constraint is set to FALSE allowing your design to continue. The use of this override is highly discouraged as it may lead to very poor timing results. It is recommended that this error condition be corrected in the design.

	clk_IBUF_inst (IBUF.O) is locked to IOB_X0Y82
	clk_IBUF_BUFG_inst (BUFG.I) is provisionally placed by clockplacer on BUFGCTRL_X0Y0
Resolution: Poor placement of an IO pin and a BUFG has resulted in the router using a non-dedicated path between the two.  There are several things that could trigger this DRC, each of which can cause unpredictable clock insertion delays that result in poor timing.  This DRC could be caused by any of the following: (a) a clock port was placed on a pin that is not a CCIO-pin (b)the BUFG has not been placed in the same half of the device or SLR as the CCIO-pin (c) a single ended clock has been placed on the N-Side of a differential pair CCIO-pin.
Phase 1.2 IO Placement/ Clock Placement/ Build Placer Device | Checksum: 132fa210f

Time (s): cpu = 00:00:00.42 ; elapsed = 00:00:00.84 . Memory (MB): peak = 3178.016 ; gain = 0.000 ; free physical = 5494 ; free virtual = 18674

Phase 1.3 Build Placer Netlist Model
Phase 1.3 Build Placer Netlist Model | Checksum: 18c3f41e1

Time (s): cpu = 00:00:00.53 ; elapsed = 00:00:00.95 . Memory (MB): peak = 3178.016 ; gain = 0.000 ; free physical = 5493 ; free virtual = 18673

Phase 1.4 Constrain Clocks/Macros
Phase 1.4 Constrain Clocks/Macros | Checksum: 18c3f41e1

Time (s): cpu = 00:00:00.53 ; elapsed = 00:00:00.97 . Memory (MB): peak = 3178.016 ; gain = 0.000 ; free physical = 5493 ; free virtual = 18673
Phase 1 Placer Initialization | Checksum: 18c3f41e1

Time (s): cpu = 00:00:00.54 ; elapsed = 00:00:00.99 . Memory (MB): peak = 3178.016 ; gain = 0.000 ; free physical = 5493 ; free virtual = 18673

Phase 2 Global Placement

Phase 2.1 Floorplanning
Phase 2.1 Floorplanning | Checksum: 18c3f41e1

Time (s): cpu = 00:00:00.54 ; elapsed = 00:00:01 . Memory (MB): peak = 3178.016 ; gain = 0.000 ; free physical = 5493 ; free virtual = 18673

Phase 2.2 Update Timing before SLR Path Opt
Phase 2.2 Update Timing before SLR Path Opt | Checksum: 18c3f41e1

Time (s): cpu = 00:00:00.54 ; elapsed = 00:00:01 . Memory (MB): peak = 3178.016 ; gain = 0.000 ; free physical = 5493 ; free virtual = 18673

Phase 2.3 Post-Processing in Floorplanning
Phase 2.3 Post-Processing in Floorplanning | Checksum: 18c3f41e1

Time (s): cpu = 00:00:00.54 ; elapsed = 00:00:01 . Memory (MB): peak = 3178.016 ; gain = 0.000 ; free physical = 5493 ; free virtual = 18673

Phase 2.4 Global Place Phase1
Phase 2.4 Global Place Phase1 | Checksum: 1bba72a47

Time (s): cpu = 00:00:01 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5493 ; free virtual = 18674

Phase 2.5 Global Place Phase2
WARNING: [Place 46-29] Timing had been disabled during Placer and, therefore, physical synthesis in Placer will be skipped.
Phase 2.5 Global Place Phase2 | Checksum: 1e35e0db9

Time (s): cpu = 00:00:01 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5505 ; free virtual = 18688
Phase 2 Global Placement | Checksum: 1e35e0db9

Time (s): cpu = 00:00:01 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5505 ; free virtual = 18688

Phase 3 Detail Placement

Phase 3.1 Commit Multi Column Macros
Phase 3.1 Commit Multi Column Macros | Checksum: 1e35e0db9

Time (s): cpu = 00:00:01 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5505 ; free virtual = 18688

Phase 3.2 Commit Most Macros & LUTRAMs
Phase 3.2 Commit Most Macros & LUTRAMs | Checksum: 19376147f

Time (s): cpu = 00:00:01 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5505 ; free virtual = 18687

Phase 3.3 Area Swap Optimization
Phase 3.3 Area Swap Optimization | Checksum: 1eba2221d

Time (s): cpu = 00:00:02 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5505 ; free virtual = 18687

Phase 3.4 Pipeline Register Optimization
Phase 3.4 Pipeline Register Optimization | Checksum: 1eba2221d

Time (s): cpu = 00:00:02 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5505 ; free virtual = 18687

Phase 3.5 Small Shape Detail Placement
Phase 3.5 Small Shape Detail Placement | Checksum: 2b12323e5

Time (s): cpu = 00:00:02 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5504 ; free virtual = 18686

Phase 3.6 Re-assign LUT pins
Phase 3.6 Re-assign LUT pins | Checksum: 2b12323e5

Time (s): cpu = 00:00:02 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5504 ; free virtual = 18686

Phase 3.7 Pipeline Register Optimization
Phase 3.7 Pipeline Register Optimization | Checksum: 2b12323e5

Time (s): cpu = 00:00:02 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5504 ; free virtual = 18686
Phase 3 Detail Placement | Checksum: 2b12323e5

Time (s): cpu = 00:00:02 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5504 ; free virtual = 18686

Phase 4 Post Placement Optimization and Clean-Up

Phase 4.1 Post Commit Optimization
Phase 4.1 Post Commit Optimization | Checksum: 2b12323e5

Time (s): cpu = 00:00:02 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5504 ; free virtual = 18687

Phase 4.2 Post Placement Cleanup
Phase 4.2 Post Placement Cleanup | Checksum: 2b12323e5

Time (s): cpu = 00:00:02 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5504 ; free virtual = 18687

Phase 4.3 Placer Reporting

Phase 4.3.1 Print Estimated Congestion
INFO: [Place 30-612] Post-Placement Estimated Congestion 
 ____________________________________________________
|           | Global Congestion | Short Congestion  |
| Direction | Region Size       | Region Size       |
|___________|___________________|___________________|
|      North|                1x1|                1x1|
|___________|___________________|___________________|
|      South|                1x1|                1x1|
|___________|___________________|___________________|
|       East|                1x1|                1x1|
|___________|___________________|___________________|
|       West|                1x1|                1x1|
|___________|___________________|___________________|

Phase 4.3.1 Print Estimated Congestion | Checksum: 2b12323e5

Time (s): cpu = 00:00:02 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5504 ; free virtual = 18687
Phase 4.3 Placer Reporting | Checksum: 2b12323e5

Time (s): cpu = 00:00:02 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5504 ; free virtual = 18687

Phase 4.4 Final Placement Cleanup
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5504 ; free virtual = 18687

Time (s): cpu = 00:00:02 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5504 ; free virtual = 18687
Phase 4 Post Placement Optimization and Clean-Up | Checksum: 27e0f223a

Time (s): cpu = 00:00:02 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5504 ; free virtual = 18687
Ending Placer Task | Checksum: 1d6cb5631

Time (s): cpu = 00:00:02 ; elapsed = 00:00:01 . Memory (MB): peak = 3210.031 ; gain = 32.016 ; free physical = 5504 ; free virtual = 18687
46 Infos, 2 Warnings, 0 Critical Warnings and 0 Errors encountered.
place_design completed successfully
INFO: [Vivado 12-24838] Running report commands "report_control_sets, report_io, report_utilization" in parallel.
Running report generation with 3 threads.
INFO: [Vivado 12-24828] Executing command : report_control_sets -verbose -file three_k_plus_one_control_sets_placed.rpt
report_control_sets: Time (s): cpu = 00:00:00.03 ; elapsed = 00:00:00.05 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5487 ; free virtual = 18670
INFO: [Vivado 12-24828] Executing command : report_utilization -file three_k_plus_one_utilization_placed.rpt -pb three_k_plus_one_utilization_placed.pb
INFO: [Vivado 12-24828] Executing command : report_io -file three_k_plus_one_io_placed.rpt
report_io: Time (s): cpu = 00:00:00.08 ; elapsed = 00:00:00.11 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5490 ; free virtual = 18673
INFO: [Timing 38-480] Writing timing data to binary archive.
Write ShapeDB Complete: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5491 ; free virtual = 18674
Wrote PlaceDB: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5491 ; free virtual = 18674
Wrote PulsedLatchDB: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5486 ; free virtual = 18669
Writing XDEF routing.
Writing XDEF routing logical nets.
Writing XDEF routing special nets.
Wrote RouteStorage: Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.01 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5484 ; free virtual = 18668
Wrote Netlist Cache: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5484 ; free virtual = 18667
Wrote Device Cache: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5483 ; free virtual = 18667
Write Physdb Complete: Time (s): cpu = 00:00:00.06 ; elapsed = 00:00:00.11 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5483 ; free virtual = 18666
INFO: [Common 17-1381] The checkpoint '/nfs/home/c/ch_aleja/COEN313/Modelsim/Code/project/project_1/project_1.runs/impl_1/three_k_plus_one_placed.dcp' has been generated.
Command: phys_opt_design
Attempting to get a license for feature 'Implementation' and/or device 'xc7a100t'
INFO: [Common 17-349] Got license for feature 'Implementation' and/or device 'xc7a100t'

Starting Initial Update Timing Task

Time (s): cpu = 00:00:00 ; elapsed = 00:00:00.01 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5472 ; free virtual = 18655
INFO: [Vivado_Tcl 4-235] No timing constraint found. The netlist was not modified.
INFO: [Common 17-83] Releasing license: Implementation
55 Infos, 2 Warnings, 0 Critical Warnings and 0 Errors encountered.
phys_opt_design completed successfully
INFO: [Timing 38-480] Writing timing data to binary archive.
Write ShapeDB Complete: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5467 ; free virtual = 18650
Wrote PlaceDB: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5467 ; free virtual = 18650
Wrote PulsedLatchDB: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5463 ; free virtual = 18646
Writing XDEF routing.
Writing XDEF routing logical nets.
Writing XDEF routing special nets.
Wrote RouteStorage: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.01 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5463 ; free virtual = 18646
Wrote Netlist Cache: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5463 ; free virtual = 18646
Wrote Device Cache: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5463 ; free virtual = 18647
Write Physdb Complete: Time (s): cpu = 00:00:00.06 ; elapsed = 00:00:00.08 . Memory (MB): peak = 3210.031 ; gain = 0.000 ; free physical = 5461 ; free virtual = 18645
INFO: [Common 17-1381] The checkpoint '/nfs/home/c/ch_aleja/COEN313/Modelsim/Code/project/project_1/project_1.runs/impl_1/three_k_plus_one_physopt.dcp' has been generated.
Command: route_design
Attempting to get a license for feature 'Implementation' and/or device 'xc7a100t'
INFO: [Common 17-349] Got license for feature 'Implementation' and/or device 'xc7a100t'


Starting Routing Task
INFO: [Route 35-254] Multithreading enabled for route_design using a maximum of 8 CPUs

Phase 1 Build RT Design
Checksum: PlaceDB: ebe0cb03 ConstDB: 0 ShapeSum: 39182b98 RouteDB: b1d25f96
Post Restoration Checksum: NetGraph: f2cde3f0 | NumContArr: b2e29faa | Constraints: c2a8fa9d | Timing: c2a8fa9d
Phase 1 Build RT Design | Checksum: 32b0278d4

Time (s): cpu = 00:00:15 ; elapsed = 00:00:13 . Memory (MB): peak = 3285.980 ; gain = 75.949 ; free physical = 5314 ; free virtual = 18498

Phase 2 Router Initialization
INFO: [Route 35-64] No timing constraints were detected. The router will operate in resource-optimization mode.

Phase 2.1 Fix Topology Constraints
Phase 2.1 Fix Topology Constraints | Checksum: 32b0278d4

Time (s): cpu = 00:00:15 ; elapsed = 00:00:13 . Memory (MB): peak = 3317.980 ; gain = 107.949 ; free physical = 5282 ; free virtual = 18466

Phase 2.2 Pre Route Cleanup
Phase 2.2 Pre Route Cleanup | Checksum: 32b0278d4

Time (s): cpu = 00:00:15 ; elapsed = 00:00:13 . Memory (MB): peak = 3317.980 ; gain = 107.949 ; free physical = 5282 ; free virtual = 18467
 Number of Nodes with overlaps = 0

Router Utilization Summary
  Global Vertical Routing Utilization    = 0 %
  Global Horizontal Routing Utilization  = 0 %
  Routable Net Status*
  *Does not include unroutable nets such as driverless and loadless.
  Run report_route_status for detailed report.
  Number of Failed Nets               = 53
    (Failed Nets is the sum of unrouted and partially routed nets)
  Number of Unrouted Nets             = 53
  Number of Partially Routed Nets     = 0
  Number of Node Overlaps             = 0

Phase 2 Router Initialization | Checksum: 2d9c421a1

Time (s): cpu = 00:00:15 ; elapsed = 00:00:13 . Memory (MB): peak = 3352.496 ; gain = 142.465 ; free physical = 5249 ; free virtual = 18434

Phase 3 Global Routing
Phase 3 Global Routing | Checksum: 2d9c421a1

Time (s): cpu = 00:00:15 ; elapsed = 00:00:13 . Memory (MB): peak = 3352.496 ; gain = 142.465 ; free physical = 5249 ; free virtual = 18434

Phase 4 Initial Routing

Phase 4.1 Initial Net Routing Pass
Phase 4.1 Initial Net Routing Pass | Checksum: 32d5eff83

Time (s): cpu = 00:00:15 ; elapsed = 00:00:13 . Memory (MB): peak = 3352.496 ; gain = 142.465 ; free physical = 5248 ; free virtual = 18433
Phase 4 Initial Routing | Checksum: 32d5eff83

Time (s): cpu = 00:00:15 ; elapsed = 00:00:13 . Memory (MB): peak = 3352.496 ; gain = 142.465 ; free physical = 5248 ; free virtual = 18433

Phase 5 Rip-up And Reroute

Phase 5.1 Global Iteration 0
 Number of Nodes with overlaps = 2
 Number of Nodes with overlaps = 0
Phase 5.1 Global Iteration 0 | Checksum: 27529a17b

Time (s): cpu = 00:00:15 ; elapsed = 00:00:13 . Memory (MB): peak = 3352.496 ; gain = 142.465 ; free physical = 5247 ; free virtual = 18432
Phase 5 Rip-up And Reroute | Checksum: 27529a17b

Time (s): cpu = 00:00:15 ; elapsed = 00:00:13 . Memory (MB): peak = 3352.496 ; gain = 142.465 ; free physical = 5247 ; free virtual = 18432

Phase 6 Delay and Skew Optimization
Phase 6 Delay and Skew Optimization | Checksum: 27529a17b

Time (s): cpu = 00:00:15 ; elapsed = 00:00:13 . Memory (MB): peak = 3352.496 ; gain = 142.465 ; free physical = 5247 ; free virtual = 18432

Phase 7 Post Hold Fix

Phase 7.1 Hold Fix Iter
Phase 7.1 Hold Fix Iter | Checksum: 27529a17b

Time (s): cpu = 00:00:15 ; elapsed = 00:00:13 . Memory (MB): peak = 3352.496 ; gain = 142.465 ; free physical = 5247 ; free virtual = 18432
Phase 7 Post Hold Fix | Checksum: 27529a17b

Time (s): cpu = 00:00:15 ; elapsed = 00:00:13 . Memory (MB): peak = 3352.496 ; gain = 142.465 ; free physical = 5247 ; free virtual = 18432

Phase 8 Route finalize

Router Utilization Summary
  Global Vertical Routing Utilization    = 0.0161901 %
  Global Horizontal Routing Utilization  = 0.00703325 %
  Routable Net Status*
  *Does not include unroutable nets such as driverless and loadless.
  Run report_route_status for detailed report.
  Number of Failed Nets               = 0
    (Failed Nets is the sum of unrouted and partially routed nets)
  Number of Unrouted Nets             = 0
  Number of Partially Routed Nets     = 0
  Number of Node Overlaps             = 0


--GLOBAL Congestion:
Utilization threshold used for congestion level computation: 0.85
Congestion Report
North Dir 1x1 Area, Max Cong = 16.2162%, No Congested Regions.
South Dir 1x1 Area, Max Cong = 21.6216%, No Congested Regions.
East Dir 1x1 Area, Max Cong = 5.88235%, No Congested Regions.
West Dir 1x1 Area, Max Cong = 17.6471%, No Congested Regions.

------------------------------
Reporting congestion hotspots
------------------------------
Direction: North
----------------
Congested clusters found at Level 0
Effective congestion level: 0 Aspect Ratio: 1 Sparse Ratio: 0
Direction: South
----------------
Congested clusters found at Level 0
Effective congestion level: 0 Aspect Ratio: 1 Sparse Ratio: 0
Direction: East
----------------
Congested clusters found at Level 0
Effective congestion level: 0 Aspect Ratio: 1 Sparse Ratio: 0
Direction: West
----------------
Congested clusters found at Level 0
Effective congestion level: 0 Aspect Ratio: 1 Sparse Ratio: 0

Phase 8 Route finalize | Checksum: 27529a17b

Time (s): cpu = 00:00:15 ; elapsed = 00:00:13 . Memory (MB): peak = 3352.496 ; gain = 142.465 ; free physical = 5247 ; free virtual = 18432

Phase 9 Verifying routed nets

 Verification completed successfully
Phase 9 Verifying routed nets | Checksum: 27529a17b

Time (s): cpu = 00:00:15 ; elapsed = 00:00:13 . Memory (MB): peak = 3352.496 ; gain = 142.465 ; free physical = 5247 ; free virtual = 18432

Phase 10 Depositing Routes
Phase 10 Depositing Routes | Checksum: 29a4c970c

Time (s): cpu = 00:00:16 ; elapsed = 00:00:13 . Memory (MB): peak = 3352.496 ; gain = 142.465 ; free physical = 5247 ; free virtual = 18432

Phase 11 Post Process Routing
Phase 11 Post Process Routing | Checksum: 29a4c970c

Time (s): cpu = 00:00:16 ; elapsed = 00:00:13 . Memory (MB): peak = 3352.496 ; gain = 142.465 ; free physical = 5247 ; free virtual = 18432
Total Elapsed time in route_design: 12.87 secs

Phase 12 Post-Route Event Processing
Phase 12 Post-Route Event Processing | Checksum: 121e42761

Time (s): cpu = 00:00:16 ; elapsed = 00:00:13 . Memory (MB): peak = 3352.496 ; gain = 142.465 ; free physical = 5247 ; free virtual = 18432
INFO: [Route 35-16] Router Completed Successfully
Ending Routing Task | Checksum: 121e42761

Time (s): cpu = 00:00:16 ; elapsed = 00:00:13 . Memory (MB): peak = 3352.496 ; gain = 142.465 ; free physical = 5247 ; free virtual = 18432

Routing Is Done.
INFO: [Common 17-83] Releasing license: Implementation
62 Infos, 2 Warnings, 0 Critical Warnings and 0 Errors encountered.
route_design completed successfully
route_design: Time (s): cpu = 00:00:16 ; elapsed = 00:00:13 . Memory (MB): peak = 3352.496 ; gain = 142.465 ; free physical = 5246 ; free virtual = 18431
INFO: [Vivado 12-24828] Executing command : report_drc -file three_k_plus_one_drc_routed.rpt -pb three_k_plus_one_drc_routed.pb -rpx three_k_plus_one_drc_routed.rpx
Command: report_drc -file three_k_plus_one_drc_routed.rpt -pb three_k_plus_one_drc_routed.pb -rpx three_k_plus_one_drc_routed.rpx
INFO: [IP_Flow 19-1839] IP Catalog is up to date.
INFO: [DRC 23-27] Running DRC with 8 threads
INFO: [Vivado_Tcl 2-168] The results of DRC are in file /nfs/home/c/ch_aleja/COEN313/Modelsim/Code/project/project_1/project_1.runs/impl_1/three_k_plus_one_drc_routed.rpt.
report_drc completed successfully
INFO: [Vivado 12-24828] Executing command : report_methodology -file three_k_plus_one_methodology_drc_routed.rpt -pb three_k_plus_one_methodology_drc_routed.pb -rpx three_k_plus_one_methodology_drc_routed.rpx
Command: report_methodology -file three_k_plus_one_methodology_drc_routed.rpt -pb three_k_plus_one_methodology_drc_routed.pb -rpx three_k_plus_one_methodology_drc_routed.rpx
INFO: [Timing 38-35] Done setting XDC timing constraints.
INFO: [DRC 23-133] Running Methodology with 8 threads
INFO: [Vivado_Tcl 2-1520] The results of Report Methodology are in file /nfs/home/c/ch_aleja/COEN313/Modelsim/Code/project/project_1/project_1.runs/impl_1/three_k_plus_one_methodology_drc_routed.rpt.
report_methodology completed successfully
INFO: [Vivado 12-24828] Executing command : report_timing_summary -max_paths 10 -routable_nets -report_unconstrained -file three_k_plus_one_timing_summary_routed.rpt -pb three_k_plus_one_timing_summary_routed.pb -rpx three_k_plus_one_timing_summary_routed.rpx -warn_on_violation 
INFO: [Timing 38-35] Done setting XDC timing constraints.
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 8 CPUs
WARNING: [Timing 38-313] There are no user specified timing constraints. Timing constraints are needed for proper timing analysis.
INFO: [Vivado 12-24838] Running report commands "report_bus_skew, report_incremental_reuse, report_route_status" in parallel.
Running report generation with 3 threads.
INFO: [Vivado 12-24828] Executing command : report_incremental_reuse -file three_k_plus_one_incremental_reuse_routed.rpt
INFO: [Vivado_Tcl 4-1062] Incremental flow is disabled. No incremental reuse Info to report.
INFO: [Vivado 12-24828] Executing command : report_route_status -file three_k_plus_one_route_status.rpt -pb three_k_plus_one_route_status.pb
INFO: [Vivado 12-24828] Executing command : report_bus_skew -warn_on_violation -file three_k_plus_one_bus_skew_routed.rpt -pb three_k_plus_one_bus_skew_routed.pb -rpx three_k_plus_one_bus_skew_routed.rpx
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 8 CPUs
INFO: [Vivado 12-24828] Executing command : report_power -file three_k_plus_one_power_routed.rpt -pb three_k_plus_one_power_summary_routed.pb -rpx three_k_plus_one_power_routed.rpx
Command: report_power -file three_k_plus_one_power_routed.rpt -pb three_k_plus_one_power_summary_routed.pb -rpx three_k_plus_one_power_routed.rpx
WARNING: [Power 33-232] No user defined clocks were found in the design! Power estimation will be inaccurate until this is corrected.
Resolution: Please specify clocks using create_clock/create_generated_clock for sequential elements. For pure combinatorial circuits, please specify a virtual clock, otherwise the vectorless estimation might be inaccurate
Running Vector-less Activity Propagation...

Finished Running Vector-less Activity Propagation
82 Infos, 4 Warnings, 0 Critical Warnings and 0 Errors encountered.
report_power completed successfully
INFO: [Vivado 12-24828] Executing command : report_clock_utilization -file three_k_plus_one_clock_utilization_routed.rpt
INFO: [Timing 38-480] Writing timing data to binary archive.
Write ShapeDB Complete: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3485.801 ; gain = 0.000 ; free physical = 5148 ; free virtual = 18334
Wrote PlaceDB: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3485.801 ; gain = 0.000 ; free physical = 5148 ; free virtual = 18334
Wrote PulsedLatchDB: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3485.801 ; gain = 0.000 ; free physical = 5148 ; free virtual = 18334
Writing XDEF routing.
Writing XDEF routing logical nets.
Writing XDEF routing special nets.
Wrote RouteStorage: Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.01 . Memory (MB): peak = 3485.801 ; gain = 0.000 ; free physical = 5148 ; free virtual = 18335
Wrote Netlist Cache: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3485.801 ; gain = 0.000 ; free physical = 5148 ; free virtual = 18334
Wrote Device Cache: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 3485.801 ; gain = 0.000 ; free physical = 5148 ; free virtual = 18335
Write Physdb Complete: Time (s): cpu = 00:00:00.06 ; elapsed = 00:00:00.1 . Memory (MB): peak = 3485.801 ; gain = 0.000 ; free physical = 5147 ; free virtual = 18334
INFO: [Common 17-1381] The checkpoint '/nfs/home/c/ch_aleja/COEN313/Modelsim/Code/project/project_1/project_1.runs/impl_1/three_k_plus_one_routed.dcp' has been generated.
INFO: [Common 17-206] Exiting Vivado at Wed Dec 17 15:54:54 2025...
#-----------------------------------------------------------
# Vivado v2025.1 (64-bit)
# SW Build 6140274 on Wed May 21 22:58:25 MDT 2025
# IP Build 6138677 on Thu May 22 03:10:11 MDT 2025
# SharedData Build 6139179 on Tue May 20 17:58:58 MDT 2025
# Start of session at: Wed Dec 17 15:55:40 2025
# Process ID         : 66373
# Current directory  : /nfs/home/c/ch_aleja/COEN313/Modelsim/Code/project/project_1/project_1.runs/impl_1
# Command line       : vivado -log three_k_plus_one.vdi -applog -product Vivado -messageDb vivado.pb -mode batch -source three_k_plus_one.tcl -notrace
# Log file           : /nfs/home/c/ch_aleja/COEN313/Modelsim/Code/project/project_1/project_1.runs/impl_1/three_k_plus_one.vdi
# Journal file       : /nfs/home/c/ch_aleja/COEN313/Modelsim/Code/project/project_1/project_1.runs/impl_1/vivado.jou
# Running On         : holdup.encs.concordia.ca
# Platform           : AlmaLinux
# Operating System   : AlmaLinux release 9.6 (Sage Margay)
# Processor Detail   : 11th Gen Intel(R) Core(TM) i7-11700 @ 2.50GHz
# CPU Frequency      : 4545.285 MHz
# CPU Physical cores : 8
# CPU Logical cores  : 16
# Host memory        : 16397 MB
# Swap memory        : 10485 MB
# Total Virtual      : 26883 MB
# Available Virtual  : 21383 MB
#-----------------------------------------------------------
source three_k_plus_one.tcl -notrace
Command: open_checkpoint three_k_plus_one_routed.dcp

Starting open_checkpoint Task

Time (s): cpu = 00:00:00.02 ; elapsed = 00:00:00.03 . Memory (MB): peak = 1634.895 ; gain = 2.969 ; free physical = 6881 ; free virtual = 20068
INFO: [Device 21-403] Loading part xc7a100tcsg324-1
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2014.973 ; gain = 0.000 ; free physical = 6522 ; free virtual = 19710
INFO: [Netlist 29-17] Analyzing 2 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 0 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2025.1
INFO: [Project 1-570] Preparing netlist for logic optimization
Read ShapeDB Complete: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2073.816 ; gain = 0.000 ; free physical = 6455 ; free virtual = 19642
INFO: [Timing 38-478] Restoring timing data from binary archive.
INFO: [Timing 38-479] Binary timing data restore complete.
INFO: [Project 1-856] Restoring constraints from binary archive.
INFO: [Project 1-853] Binary constraint restore complete.
INFO: [Designutils 20-5722] Start Reading Physical Databases.
Reading placement.
Read Netlist Cache: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2642.410 ; gain = 0.000 ; free physical = 5933 ; free virtual = 19121
Reading placer database...
Read Device Cache: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2642.410 ; gain = 0.000 ; free physical = 5933 ; free virtual = 19121
Read PlaceDB: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2642.410 ; gain = 0.000 ; free physical = 5933 ; free virtual = 19121
Read PulsedLatchDB: Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2642.410 ; gain = 0.000 ; free physical = 5933 ; free virtual = 19121
Reading routing.
Read RouteStorage: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00 . Memory (MB): peak = 2642.410 ; gain = 0.000 ; free physical = 5933 ; free virtual = 19121
Read Physdb Files: Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.02 . Memory (MB): peak = 2642.410 ; gain = 0.000 ; free physical = 5933 ; free virtual = 19121
Restored from archive | CPU: 0.040000 secs | Memory: 1.175720 MB |
Finished XDEF File Restore: Time (s): cpu = 00:00:00.04 ; elapsed = 00:00:00.05 . Memory (MB): peak = 2642.410 ; gain = 18.812 ; free physical = 5933 ; free virtual = 19121
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2642.410 ; gain = 0.000 ; free physical = 5933 ; free virtual = 19121
INFO: [Project 1-111] Unisim Transformation Summary:
No Unisim elements were transformed.

INFO: [Project 1-604] Checkpoint was created with Vivado v2025.1 (64-bit) build 6140274
WARNING: [Vivado 12-23575] Critical violations of the methodology design rules detected. Critical violations may contribute to timing failures or cause functional issues in hardware. Run report_methodology for more information.
open_checkpoint: Time (s): cpu = 00:00:10 ; elapsed = 00:00:15 . Memory (MB): peak = 2642.445 ; gain = 1010.520 ; free physical = 5929 ; free virtual = 19117
Command: write_bitstream -force three_k_plus_one.bit
Attempting to get a license for feature 'Implementation' and/or device 'xc7a100t'
INFO: [Common 17-349] Got license for feature 'Implementation' and/or device 'xc7a100t'
Running DRC as a precondition to command write_bitstream
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/CMC/tools/xilinx/Vitis_2025.1/2025.1/Vivado/data/ip'.
INFO: [DRC 23-27] Running DRC with 8 threads
INFO: [Vivado 12-3199] DRC finished with 0 Errors
INFO: [Vivado 12-3200] Please refer to the DRC report (report_drc) for more information.
INFO: [Designutils 20-2272] Running write_bitstream with 8 threads.
Loading data files...
Loading site data...
Loading route data...
Processing options...
Creating bitmap...
Creating bitstream...
Writing bitstream ./three_k_plus_one.bit...
INFO: [Vivado 12-1842] Bitgen Completed Successfully.
INFO: [Common 17-83] Releasing license: Implementation
22 Infos, 1 Warnings, 0 Critical Warnings and 0 Errors encountered.
write_bitstream completed successfully
write_bitstream: Time (s): cpu = 00:00:07 ; elapsed = 00:00:07 . Memory (MB): peak = 3115.895 ; gain = 473.449 ; free physical = 5444 ; free virtual = 18640
INFO: [Common 17-206] Exiting Vivado at Wed Dec 17 15:56:13 2025...