From 15b44b92a3b7a395a2b5991f7c72062a38f2ad9f Mon Sep 17 00:00:00 2001 From: Lucas Holt Date: Fri, 4 Sep 2026 18:30:32 -0400 Subject: [PATCH 1/2] Remove legacy architecture support Remove native MIPS, PowerPC, and sparc64 source trees and build wiring. Retain amd64, i386, ARM, ARM64, and RISC-V as supported native architectures. Portions obtained from: FreeBSD AI-Assisted-by: OpenAI Codex (GPT-5) Signed-off-by: Lucas Holt --- Makefile | 17 +- Makefile.inc1 | 32 +- Makefile.libcompat | 2 +- .../lib/libdtrace/mips/dt_isadep.c | 75 - .../lib/libdtrace/powerpc/dt_isadep.c | 197 - cddl/lib/libdtrace/Makefile | 8 - cddl/lib/libzpool/Makefile | 11 - cddl/usr.sbin/Makefile | 11 - cddl/usr.sbin/zfsd/vdev.cc | 5 - cddl/usr.sbin/zfsd/zfsd_event.cc | 5 - etc/mtree/BSD.usr.dist | 4 - include/Makefile | 6 +- lib/Makefile | 5 +- lib/clang/libclang/Makefile | 4 - lib/clang/libllvm/Makefile | 4 - lib/clang/llvm.build.mk | 15 +- lib/csu/Makefile | 4 - lib/csu/mips/Makefile | 27 - lib/csu/mips/Makefile.depend | 11 - lib/csu/mips/crt.h | 58 - lib/csu/mips/crt1_c.c | 87 - lib/csu/mips/crti.S | 51 - lib/csu/mips/crtn.S | 23 - lib/csu/powerpc/Makefile | 7 - lib/csu/powerpc/Makefile.depend | 11 - lib/csu/powerpc/crt.h | 31 - lib/csu/powerpc/crt1_c.c | 107 - lib/csu/powerpc/crti.S | 49 - lib/csu/powerpc/crtn.S | 44 - lib/csu/powerpc/crtsavres.S | 189 - lib/csu/powerpc64/Makefile | 14 - lib/csu/powerpc64/Makefile.depend | 11 - lib/csu/powerpc64/crt.h | 31 - lib/csu/powerpc64/crt1_c.c | 132 - lib/csu/powerpc64/crti.S | 84 - lib/csu/powerpc64/crtn.S | 40 - lib/csu/powerpc64/reloc.c | 41 - lib/libarchive/Makefile | 2 +- lib/libc/Makefile | 18 +- lib/libc/csu/mips/Makefile.inc | 3 - lib/libc/csu/powerpc/Makefile.inc | 3 - lib/libc/csu/powerpc64/Makefile.inc | 3 - lib/libc/csu/powerpc64/reloc.c | 60 - lib/libc/csu/powerpcspe/Makefile.inc | 3 - lib/libc/gen/auxv.c | 101 - lib/libc/gen/elf_utils.c | 10 +- lib/libc/gen/tls.c | 2 +- lib/libc/mips/Makefile.inc | 4 - lib/libc/mips/SYS.h | 152 - lib/libc/mips/Symbol.map | 52 - lib/libc/mips/_fpmath.h | 56 - lib/libc/mips/arith.h | 24 - lib/libc/mips/gd_qnan.h | 46 - lib/libc/mips/gen/Makefile.inc | 10 - lib/libc/mips/gen/_ctx_start.S | 53 - lib/libc/mips/gen/_get_tp.c | 101 - lib/libc/mips/gen/_set_tp.c | 40 - lib/libc/mips/gen/_setjmp.S | 201 - lib/libc/mips/gen/fabs.S | 56 - lib/libc/mips/gen/fabs.c | 45 - lib/libc/mips/gen/flt_rounds.c | 41 - lib/libc/mips/gen/hardfloat/fpgetmask.c | 28 - lib/libc/mips/gen/hardfloat/fpgetround.c | 28 - lib/libc/mips/gen/hardfloat/fpgetsticky.c | 28 - lib/libc/mips/gen/hardfloat/fpsetmask.c | 37 - lib/libc/mips/gen/hardfloat/fpsetround.c | 36 - lib/libc/mips/gen/hardfloat/fpsetsticky.c | 37 - lib/libc/mips/gen/infinity.c | 24 - lib/libc/mips/gen/ldexp.S | 217 - lib/libc/mips/gen/makecontext.c | 122 - lib/libc/mips/gen/setjmp.S | 238 - lib/libc/mips/gen/signalcontext.c | 53 - lib/libc/mips/gen/sigsetjmp.S | 75 - lib/libc/mips/net/Makefile.inc | 3 - lib/libc/mips/net/htonl.S | 48 - lib/libc/mips/net/htons.S | 44 - lib/libc/mips/net/ntohl.S | 48 - lib/libc/mips/net/ntohs.S | 44 - lib/libc/mips/softfloat/milieu.h | 47 - lib/libc/mips/softfloat/mips-gcc.h | 90 - lib/libc/mips/softfloat/softfloat.h | 314 - lib/libc/mips/static_tls.h | 56 - lib/libc/mips/string/Makefile.inc | 12 - lib/libc/mips/string/bcmp.S | 128 - lib/libc/mips/string/bcopy.S | 295 - lib/libc/mips/string/bzero.S | 81 - lib/libc/mips/string/ffs.S | 57 - lib/libc/mips/string/memcpy.S | 5 - lib/libc/mips/string/memmove.S | 5 - lib/libc/mips/string/strchr.S | 64 - lib/libc/mips/string/strcmp.S | 66 - lib/libc/mips/string/strlen.S | 53 - lib/libc/mips/string/strrchr.S | 62 - lib/libc/mips/sys/Makefile.inc | 8 - lib/libc/mips/sys/Ovfork.S | 63 - lib/libc/mips/sys/cerror.S | 71 - lib/libc/mips/sys/syscall.S | 43 - lib/libc/powerpc/Makefile.inc | 4 - lib/libc/powerpc/SYS.h | 72 - lib/libc/powerpc/Symbol.map | 54 - lib/libc/powerpc/_fpmath.h | 56 - lib/libc/powerpc/arith.h | 14 - lib/libc/powerpc/gd_qnan.h | 19 - lib/libc/powerpc/gen/Makefile.common | 7 - lib/libc/powerpc/gen/Makefile.inc | 6 - lib/libc/powerpc/gen/_ctx_start.S | 50 - lib/libc/powerpc/gen/_get_tp.c | 45 - lib/libc/powerpc/gen/_set_tp.c | 35 - lib/libc/powerpc/gen/_setjmp.S | 114 - lib/libc/powerpc/gen/eabi.S | 32 - lib/libc/powerpc/gen/fabs.S | 36 - lib/libc/powerpc/gen/flt_rounds.c | 56 - lib/libc/powerpc/gen/fpgetmask.c | 48 - lib/libc/powerpc/gen/fpgetround.c | 48 - lib/libc/powerpc/gen/fpgetsticky.c | 54 - lib/libc/powerpc/gen/fpsetmask.c | 52 - lib/libc/powerpc/gen/fpsetround.c | 52 - lib/libc/powerpc/gen/infinity.c | 28 - lib/libc/powerpc/gen/makecontext.c | 120 - lib/libc/powerpc/gen/setjmp.S | 132 - lib/libc/powerpc/gen/signalcontext.c | 103 - lib/libc/powerpc/gen/sigsetjmp.S | 140 - lib/libc/powerpc/gen/syncicache.c | 100 - lib/libc/powerpc/softfloat/milieu.h | 48 - lib/libc/powerpc/softfloat/powerpc-gcc.h | 95 - lib/libc/powerpc/softfloat/softfloat.h | 306 - lib/libc/powerpc/static_tls.h | 44 - lib/libc/powerpc/sys/Makefile.inc | 5 - lib/libc/powerpc/sys/__vdso_gettc.c | 66 - lib/libc/powerpc/sys/cerror.S | 66 - lib/libc/powerpc64/Makefile.inc | 4 - lib/libc/powerpc64/SYS.h | 97 - lib/libc/powerpc64/Symbol.map | 50 - lib/libc/powerpc64/_fpmath.h | 56 - lib/libc/powerpc64/arith.h | 22 - lib/libc/powerpc64/gd_qnan.h | 19 - lib/libc/powerpc64/gen/Makefile.inc | 10 - lib/libc/powerpc64/gen/_ctx_start.S | 54 - lib/libc/powerpc64/gen/_get_tp.c | 45 - lib/libc/powerpc64/gen/_set_tp.c | 35 - lib/libc/powerpc64/gen/_setjmp.S | 153 - lib/libc/powerpc64/gen/fabs.S | 36 - lib/libc/powerpc64/gen/flt_rounds.c | 56 - lib/libc/powerpc64/gen/fpgetmask.c | 48 - lib/libc/powerpc64/gen/fpgetround.c | 48 - lib/libc/powerpc64/gen/fpgetsticky.c | 54 - lib/libc/powerpc64/gen/fpsetmask.c | 52 - lib/libc/powerpc64/gen/fpsetround.c | 52 - lib/libc/powerpc64/gen/infinity.c | 28 - lib/libc/powerpc64/gen/makecontext.c | 127 - lib/libc/powerpc64/gen/setjmp.S | 174 - lib/libc/powerpc64/gen/signalcontext.c | 103 - lib/libc/powerpc64/gen/sigsetjmp.S | 181 - lib/libc/powerpc64/gen/syncicache.c | 100 - lib/libc/powerpc64/softfloat/milieu.h | 48 - lib/libc/powerpc64/softfloat/powerpc-gcc.h | 91 - lib/libc/powerpc64/softfloat/softfloat.h | 306 - lib/libc/powerpc64/static_tls.h | 44 - lib/libc/powerpc64/string/Makefile.inc | 17 - lib/libc/powerpc64/string/bcopy.S | 338 - lib/libc/powerpc64/string/bcopy_resolver.c | 71 - lib/libc/powerpc64/string/bcopy_vsx.S | 59 - lib/libc/powerpc64/string/memcpy.S | 131 - lib/libc/powerpc64/string/memcpy_resolver.c | 3 - lib/libc/powerpc64/string/memcpy_vsx.S | 64 - lib/libc/powerpc64/string/memmove.S | 3 - lib/libc/powerpc64/string/memmove_resolver.c | 3 - lib/libc/powerpc64/string/memmove_vsx.S | 4 - lib/libc/powerpc64/string/strcpy.c | 31 - lib/libc/powerpc64/string/strcpy_arch_2_05.S | 202 - lib/libc/powerpc64/string/strcpy_resolver.c | 45 - lib/libc/powerpc64/string/strncpy.c | 31 - lib/libc/powerpc64/string/strncpy_arch_2_05.S | 129 - lib/libc/powerpc64/string/strncpy_resolver.c | 46 - lib/libc/powerpc64/sys/Makefile.inc | 5 - lib/libc/powerpc64/sys/__vdso_gettc.c | 63 - lib/libc/powerpc64/sys/cerror.S | 59 - lib/libc/powerpcspe/Makefile.inc | 6 - lib/libc/powerpcspe/gen/Makefile.inc | 6 - lib/libc/powerpcspe/gen/_setjmp.S | 115 - lib/libc/powerpcspe/gen/fabs.S | 37 - lib/libc/powerpcspe/gen/flt_rounds.c | 55 - lib/libc/powerpcspe/gen/fpgetmask.c | 47 - lib/libc/powerpcspe/gen/fpgetround.c | 47 - lib/libc/powerpcspe/gen/fpgetsticky.c | 53 - lib/libc/powerpcspe/gen/fpsetmask.c | 51 - lib/libc/powerpcspe/gen/fpsetround.c | 51 - lib/libc/powerpcspe/gen/setjmp.S | 136 - lib/libc/powerpcspe/gen/sigsetjmp.S | 148 - lib/libc/powerpcspe/softfloat/milieu.h | 48 - lib/libc/powerpcspe/softfloat/powerpc-gcc.h | 91 - lib/libc/powerpcspe/softfloat/softfloat.h | 306 - lib/libc/powerpcspe/sys/Makefile.inc | 3 - lib/libc/sys/Makefile.inc | 3 +- lib/libclang_rt/Makefile | 17 - lib/libclang_rt/compiler-rt-vars.mk | 2 +- lib/libclang_rt/xray/Makefile | 6 - lib/libcompiler_rt/Makefile.inc | 10 +- lib/libdl/Makefile | 4 +- lib/libgcc_eh/Makefile.inc | 2 +- lib/libgcc_s/Makefile | 3 +- lib/libkvm/Makefile | 5 +- lib/libkvm/kvm_minidump_mips.c | 370 - lib/libkvm/kvm_minidump_powerpc64.c | 210 - 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lib/msun/powerpc/fenv.h | 305 - libexec/rc/rc.d/ldconfig | 2 +- libexec/rtld-elf/Makefile | 4 +- libexec/rtld-elf/mips/Makefile.inc | 2 - libexec/rtld-elf/mips/reloc.c | 784 -- libexec/rtld-elf/mips/rtld_machdep.h | 80 - libexec/rtld-elf/mips/rtld_start.S | 287 - libexec/rtld-elf/powerpc/Makefile.inc | 0 libexec/rtld-elf/powerpc/reloc.c | 836 --- libexec/rtld-elf/powerpc/rtld_machdep.h | 98 - libexec/rtld-elf/powerpc/rtld_start.S | 319 - libexec/rtld-elf/powerpc64/Makefile.inc | 2 - libexec/rtld-elf/powerpc64/reloc.c | 733 -- libexec/rtld-elf/powerpc64/rtld_machdep.h | 90 - libexec/rtld-elf/powerpc64/rtld_start.S | 179 - libexec/rtld-elf/rtld-libc/Makefile.inc | 10 +- libexec/rtld-elf/rtld.c | 87 - libexec/rtld-elf/rtld.h | 14 - release/powerpc/boot.tbxi | 14 - release/powerpc/generate-hfs.sh | 61 - release/powerpc/hfs-boot.bz2.uu | 22 - release/powerpc/mkisoimages.sh | 75 - release/powerpc/powerpc.conf | 9 - release/powerpc/powerpc64.conf | 9 - release/powerpc/powerpc64le.conf | 9 - release/powerpc/powerpcspe.conf | 9 - release/tools/vmimage.subr | 17 - sbin/Makefile.mips | 3 - sbin/Makefile.powerpc64 | 3 - sbin/devd/Makefile | 4 - sbin/devd/apple.conf | 79 - secure/lib/libcrypto/Makefile | 51 +- secure/lib/libcrypto/Makefile.asm | 197 - secure/lib/libcrypto/Makefile.common | 33 - share/man/man4/Makefile | 9 - share/man/man4/man4.powerpc/Makefile | 19 - share/man/man4/man4.powerpc/Makefile.depend | 10 - share/man/man4/man4.powerpc/abtn.4 | 113 - share/man/man4/man4.powerpc/adb.4 | 67 - share/man/man4/man4.powerpc/akbd.4 | 102 - share/man/man4/man4.powerpc/ams.4 | 84 - share/man/man4/man4.powerpc/cuda.4 | 77 - share/man/man4/man4.powerpc/dtsec.4 | 117 - share/man/man4/man4.powerpc/llan.4 | 59 - share/man/man4/man4.powerpc/ofw_console.4 | 110 - share/man/man4/man4.powerpc/pmu.4 | 114 - share/man/man4/man4.powerpc/powermac_nvram.4 | 65 - share/man/man4/man4.powerpc/smu.4 | 124 - share/man/man4/man4.powerpc/snd_ai2s.4 | 86 - share/man/man4/man4.powerpc/snd_davbus.4 | 78 - share/man/man4/man4.powerpc/tsec.4 | 157 - share/man/man4/smp.4 | 7 +- share/man/man5/src.conf.5 | 168 +- share/man/man7/arch.7 | 106 +- share/mk/bsd.compat.mk | 44 - share/mk/bsd.cpu.mk | 89 - share/mk/bsd.endian.mk | 10 +- share/mk/bsd.lib.mk | 6 - share/mk/bsd.opts.mk | 6 +- share/mk/bsd.prog.mk | 5 - share/mk/local.meta.sys.mk | 4 +- share/mk/src.opts.mk | 58 +- share/mk/sys.dependfile.mk | 2 +- share/mk/sys.mk | 2 +- stand/common/metadata.c | 11 - stand/defs.mk | 17 - stand/ficl.mk | 2 - stand/ficl/loader.c | 4 - stand/ficl/mips/sysdep.c | 98 - stand/ficl/mips/sysdep.h | 431 -- stand/ficl/mips64/sysdep.c | 98 - stand/ficl/mips64/sysdep.h | 431 -- stand/ficl/powerpc/sysdep.c | 98 - stand/ficl/powerpc/sysdep.h | 434 -- stand/kboot/arch/powerpc64/Makefile.inc | 8 - stand/kboot/arch/powerpc64/fdt_arch.c | 89 - stand/kboot/arch/powerpc64/host_syscall.S | 32 - stand/kboot/arch/powerpc64/kerneltramp.S | 101 - stand/kboot/arch/powerpc64/ldscript.powerpc | 137 - stand/kboot/arch/powerpc64/load_addr.c | 210 - .../kboot/arch/powerpc64/ppc64_elf_freebsd.c | 179 - stand/kboot/arch/powerpc64/start_arch.h | 30 - stand/kboot/arch/powerpc64/stat_arch.h | 29 - stand/kboot/arch/powerpc64/syscall_nr.h | 22 - stand/kboot/arch/powerpc64/termios_arch.h | 192 - stand/kboot/host_syscall.h | 2 +- stand/kboot/hostfs.c | 3 +- stand/libsa/Makefile | 4 - stand/libsa/mips/_setjmp.S | 105 - stand/libsa/powerpc/_setjmp.S | 118 - stand/libsa/powerpc/syncicache.c | 98 - stand/libsa/zalloc_defs.h | 2 +- stand/loader.mk | 10 - stand/powerpc/Makefile | 8 - stand/powerpc/Makefile.inc | 2 - stand/powerpc/boot1.chrp/Makefile | 48 - stand/powerpc/boot1.chrp/Makefile.hfs | 3 - stand/powerpc/boot1.chrp/boot1.c | 865 --- stand/powerpc/boot1.chrp/bootinfo.txt | 14 - stand/powerpc/boot1.chrp/generate-hfs.sh | 60 - stand/powerpc/boot1.chrp/hfs.tmpl.bz2.uu | 17 - stand/powerpc/ofw/Makefile | 67 - stand/powerpc/ofw/cas.c | 265 - stand/powerpc/ofw/conf.c | 126 - stand/powerpc/ofw/elf_freebsd.c | 105 - stand/powerpc/ofw/ldscript.powerpc | 142 - stand/powerpc/ofw/ldscript.powerpcle | 142 - stand/powerpc/ofw/main.c | 246 - stand/powerpc/ofw/ofwfdt.c | 217 - stand/powerpc/ofw/ppc64_elf_freebsd.c | 109 - stand/powerpc/ofw/start.c | 74 - stand/powerpc/ofw/trampolineLE.S | 69 - stand/powerpc/ofw/version | 2 - stand/uboot/arch/mips/Makefile.inc | 26 - stand/uboot/arch/mips/conf.c | 115 - stand/uboot/arch/mips/ldscript.mips | 133 - stand/uboot/arch/mips/start.S | 69 - stand/uboot/arch/powerpc/Makefile.inc | 6 - stand/uboot/arch/powerpc/conf.c | 112 - stand/uboot/arch/powerpc/ldscript.powerpc | 137 - stand/uboot/arch/powerpc/ppc64_elf_freebsd.c | 96 - stand/uboot/arch/powerpc/start.S | 98 - stand/uboot/glue.h | 9 - stand/usb/Makefile | 3 - sys/Makefile | 2 +- sys/README.md | 1 - .../uts/mips/dtrace/fasttrap_isa.c | 30 - .../opensolaris/uts/mips/sys/fasttrap_isa.h | 48 - .../uts/powerpc/dtrace/fasttrap_isa.c | 548 -- .../uts/powerpc/sys/fasttrap_isa.h | 76 - sys/cddl/dev/dtrace/mips/dtrace_asm.S | 232 - sys/cddl/dev/dtrace/mips/dtrace_isa.c | 722 -- sys/cddl/dev/dtrace/mips/dtrace_subr.c | 289 - sys/cddl/dev/dtrace/mips/regset.h | 61 - sys/cddl/dev/dtrace/powerpc/dtrace_asm.S | 189 - sys/cddl/dev/dtrace/powerpc/dtrace_isa.c | 697 -- sys/cddl/dev/dtrace/powerpc/dtrace_subr.c | 367 - sys/cddl/dev/dtrace/powerpc/regset.h | 62 - sys/cddl/dev/fbt/mips/fbt_isa.c | 162 - sys/cddl/dev/fbt/mips/fbt_isa.h | 28 - sys/cddl/dev/fbt/powerpc/fbt_isa.c | 238 - sys/cddl/dev/fbt/powerpc/fbt_isa.h | 28 - sys/cddl/dev/profile/profile.c | 19 - sys/conf/Makefile.mips | 109 - sys/conf/Makefile.powerpc | 80 - sys/conf/config.mk | 4 +- sys/conf/files.mips | 113 - sys/conf/files.powerpc | 370 - sys/conf/kern.mk | 45 - sys/conf/kern.opts.mk | 12 +- sys/conf/kern.pre.mk | 10 +- sys/conf/kmod.mk | 19 +- sys/conf/ldscript.mips | 299 - sys/conf/ldscript.mips.cfe | 316 - sys/conf/ldscript.mips.mips64 | 300 - sys/conf/ldscript.mips.octeon1 | 65 - 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sys/crypto/openssl/powerpc64/aes-ppc.S | 1533 ---- sys/crypto/openssl/powerpc64/aesp8-ppc.S | 3659 ---------- sys/crypto/openssl/powerpc64/chacha-ppc.S | 1499 ---- .../openssl/powerpc64/ecp_nistz256-ppc64.S | 4854 ------------ sys/crypto/openssl/powerpc64/ghashp8-ppc.S | 576 -- .../openssl/powerpc64/keccak1600-ppc64.S | 670 -- sys/crypto/openssl/powerpc64/poly1305-ppc.S | 185 - sys/crypto/openssl/powerpc64/poly1305-ppcfp.S | 596 -- sys/crypto/openssl/powerpc64/ppc-mont.S | 1790 ----- sys/crypto/openssl/powerpc64/ppc.S | 1876 ----- sys/crypto/openssl/powerpc64/ppccpuid.S | 387 - sys/crypto/openssl/powerpc64/sha1-ppc.S | 1121 --- sys/crypto/openssl/powerpc64/sha256-ppc.S | 1324 ---- sys/crypto/openssl/powerpc64/sha256p8-ppc.S | 738 -- sys/crypto/openssl/powerpc64/sha512-ppc.S | 1420 ---- sys/crypto/openssl/powerpc64/sha512p8-ppc.S | 836 --- sys/crypto/openssl/powerpc64/vpaes-ppc.S | 1479 ---- sys/crypto/openssl/powerpc64/x25519-ppc64.S | 349 - sys/crypto/openssl/powerpc64le/aes-ppc.S | 1581 ---- sys/crypto/openssl/powerpc64le/aesp8-ppc.S | 3659 ---------- sys/crypto/openssl/powerpc64le/chacha-ppc.S | 1371 ---- .../openssl/powerpc64le/ecp_nistz256-ppc64.S | 4854 ------------ sys/crypto/openssl/powerpc64le/ghashp8-ppc.S | 576 -- .../openssl/powerpc64le/keccak1600-ppc64.S | 670 -- sys/crypto/openssl/powerpc64le/poly1305-ppc.S | 162 - .../openssl/powerpc64le/poly1305-ppcfp.S | 591 -- sys/crypto/openssl/powerpc64le/ppc-mont.S | 1790 ----- sys/crypto/openssl/powerpc64le/ppc.S | 1876 ----- sys/crypto/openssl/powerpc64le/ppccpuid.S | 387 - sys/crypto/openssl/powerpc64le/sha1-ppc.S | 1169 --- sys/crypto/openssl/powerpc64le/sha256-ppc.S | 1372 ---- sys/crypto/openssl/powerpc64le/sha256p8-ppc.S | 746 -- sys/crypto/openssl/powerpc64le/sha512-ppc.S | 1516 ---- sys/crypto/openssl/powerpc64le/sha512p8-ppc.S | 848 --- sys/crypto/openssl/powerpc64le/vpaes-ppc.S | 1479 ---- sys/crypto/openssl/powerpc64le/x25519-ppc64.S | 349 - sys/dev/evdev/evdev.c | 5 - sys/dev/hwpmc/hwpmc_beri.c | 522 -- sys/dev/hwpmc/hwpmc_beri.h | 105 - sys/dev/hwpmc/hwpmc_e500.c | 473 -- sys/dev/hwpmc/hwpmc_mips.c | 789 -- sys/dev/hwpmc/hwpmc_mips24k.c | 228 - sys/dev/hwpmc/hwpmc_mips74k.c | 258 - sys/dev/hwpmc/hwpmc_mpc7xxx.c | 480 -- sys/dev/hwpmc/hwpmc_octeon.c | 195 - sys/dev/hwpmc/hwpmc_power8.c | 317 - sys/dev/hwpmc/hwpmc_powerpc.c | 617 -- sys/dev/hwpmc/hwpmc_powerpc.h | 113 - sys/dev/hwpmc/hwpmc_ppc970.c | 389 - sys/dev/ipmi/ipmi_opal.c | 328 - sys/dev/nvram2env/nvram2env_mips.c | 67 - sys/dev/powermac_nvram/powermac_nvram.c | 543 -- sys/dev/powermac_nvram/powermac_nvramvar.h | 82 - sys/dev/scc/scc_bfe_macio.c | 94 - sys/dev/sound/macio/aoa.c | 388 - sys/dev/sound/macio/aoa.h | 46 - sys/dev/sound/macio/davbus.c | 597 -- sys/dev/sound/macio/davbusreg.h | 282 - sys/dev/sound/macio/i2s.c | 755 -- sys/dev/sound/macio/onyx.c | 315 - sys/dev/sound/macio/snapper.c | 489 -- sys/dev/sound/macio/tumbler.c | 436 -- sys/dev/uart/uart_cpu_powerpc.c | 202 - sys/dev/usb/usb_freebsd.h | 4 +- sys/dts/Makefile | 2 +- sys/dts/mips/Makefile | 6 - sys/dts/mips/beri-netfpga.dts | 160 - sys/dts/mips/beri-sim.dts | 158 - sys/dts/mips/beripad-de4.dts | 334 - sys/dts/mips/beripad-sockit.dts | 221 - sys/dts/mips/fbsd-mt7620a.dtsi | 8 - sys/dts/mips/fbsd-mt7621.dtsi | 48 - sys/dts/mips/fbsd-mt7628an.dtsi | 39 - sys/dts/mips/fbsd-rt3883.dtsi | 15 - sys/dts/mips/xlp-basic.dts | 78 - sys/dts/powerpc/Makefile | 6 - sys/dts/powerpc/mpc8555cds.dts | 441 -- sys/dts/powerpc/mpc8572ds.dts | 893 --- sys/dts/powerpc/p1020rdb.dts | 626 -- sys/dts/powerpc/p2020ds.dts | 753 -- sys/dts/powerpc/p2041rdb.dts | 448 -- sys/dts/powerpc/p2041si.dtsi | 1295 ---- sys/dts/powerpc/p3041ds.dts | 545 -- sys/dts/powerpc/p3041si.dtsi | 1344 ---- sys/dts/powerpc/p5020ds.dts | 541 -- sys/dts/powerpc/p5020si.dtsi | 1388 ---- sys/kern/kern_cpuset.c | 32 - sys/kern/uipc_mbuf.c | 5 - sys/kern/vfs_bio.c | 19 +- sys/kern/vfs_cache.c | 7 +- sys/mips/atheros/apb.c | 535 -- sys/mips/atheros/apbvar.h | 52 - sys/mips/atheros/ar531x/apb.c | 751 -- sys/mips/atheros/ar531x/apbvar.h | 61 - sys/mips/atheros/ar531x/ar5312_chip.c | 206 - sys/mips/atheros/ar531x/ar5312_chip.h | 33 - sys/mips/atheros/ar531x/ar5312reg.h | 237 - sys/mips/atheros/ar531x/ar5315_chip.c | 254 - sys/mips/atheros/ar531x/ar5315_chip.h | 33 - sys/mips/atheros/ar531x/ar5315_cpudef.h | 134 - sys/mips/atheros/ar531x/ar5315_gpio.c | 530 -- sys/mips/atheros/ar531x/ar5315_gpiovar.h | 73 - sys/mips/atheros/ar531x/ar5315_machdep.c | 321 - sys/mips/atheros/ar531x/ar5315_setup.c | 158 - sys/mips/atheros/ar531x/ar5315_setup.h | 50 - sys/mips/atheros/ar531x/ar5315_spi.c | 288 - sys/mips/atheros/ar531x/ar5315_wdog.c | 148 - sys/mips/atheros/ar531x/ar5315reg.h | 242 - sys/mips/atheros/ar531x/arspireg.h | 60 - sys/mips/atheros/ar531x/files.ar5315 | 19 - sys/mips/atheros/ar531x/if_are.c | 1756 ----- sys/mips/atheros/ar531x/if_arereg.h | 399 - sys/mips/atheros/ar531x/uart_bus_ar5315.c | 87 - sys/mips/atheros/ar531x/uart_cpu_ar5315.c | 74 - sys/mips/atheros/ar71xx_bus_space_reversed.c | 181 - sys/mips/atheros/ar71xx_bus_space_reversed.h | 35 - sys/mips/atheros/ar71xx_caldata.c | 174 - sys/mips/atheros/ar71xx_chip.c | 337 - sys/mips/atheros/ar71xx_chip.h | 37 - sys/mips/atheros/ar71xx_cpudef.h | 181 - sys/mips/atheros/ar71xx_ehci.c | 291 - sys/mips/atheros/ar71xx_fixup.c | 112 - sys/mips/atheros/ar71xx_fixup.h | 36 - sys/mips/atheros/ar71xx_gpio.c | 639 -- sys/mips/atheros/ar71xx_gpiovar.h | 72 - sys/mips/atheros/ar71xx_macaddr.c | 99 - sys/mips/atheros/ar71xx_macaddr.h | 37 - sys/mips/atheros/ar71xx_machdep.c | 452 -- sys/mips/atheros/ar71xx_ohci.c | 219 - sys/mips/atheros/ar71xx_pci.c | 704 -- sys/mips/atheros/ar71xx_pci_bus_space.c | 198 - sys/mips/atheros/ar71xx_pci_bus_space.h | 35 - sys/mips/atheros/ar71xx_setup.c | 234 - sys/mips/atheros/ar71xx_setup.h | 58 - sys/mips/atheros/ar71xx_spi.c | 294 - sys/mips/atheros/ar71xx_wdog.c | 182 - sys/mips/atheros/ar71xxreg.h | 575 -- sys/mips/atheros/ar724x_chip.c | 244 - sys/mips/atheros/ar724x_chip.h | 35 - sys/mips/atheros/ar724x_pci.c | 670 -- sys/mips/atheros/ar724xreg.h | 109 - sys/mips/atheros/ar91xx_chip.c | 217 - sys/mips/atheros/ar91xx_chip.h | 35 - sys/mips/atheros/ar91xxreg.h | 85 - sys/mips/atheros/ar933x_chip.c | 355 - sys/mips/atheros/ar933x_chip.h | 35 - sys/mips/atheros/ar933x_uart.h | 91 - sys/mips/atheros/ar933xreg.h | 100 - sys/mips/atheros/ar934x_chip.c | 473 -- sys/mips/atheros/ar934x_chip.h | 35 - sys/mips/atheros/ar934x_nfcreg.h | 175 - sys/mips/atheros/ar934xreg.h | 239 - sys/mips/atheros/files.ar71xx | 34 - sys/mips/atheros/if_arge.c | 2794 ------- sys/mips/atheros/if_argevar.h | 220 - sys/mips/atheros/pcf2123_rtc.c | 204 - sys/mips/atheros/pcf2123reg.h | 67 - sys/mips/atheros/qca953x_chip.c | 391 - sys/mips/atheros/qca953x_chip.h | 33 - sys/mips/atheros/qca953xreg.h | 193 - sys/mips/atheros/qca955x_chip.c | 400 - sys/mips/atheros/qca955x_chip.h | 33 - sys/mips/atheros/qca955x_pci.c | 604 -- sys/mips/atheros/qca955xreg.h | 226 - sys/mips/atheros/std.ar71xx | 7 - sys/mips/atheros/uart_bus_ar71xx.c | 106 - sys/mips/atheros/uart_bus_ar933x.c | 115 - sys/mips/atheros/uart_cpu_ar71xx.c | 76 - sys/mips/atheros/uart_cpu_ar933x.c | 78 - sys/mips/atheros/uart_dev_ar933x.c | 734 -- sys/mips/atheros/uart_dev_ar933x.h | 33 - sys/mips/beri/beri_iommu.c | 233 - sys/mips/beri/beri_machdep.c | 277 - sys/mips/beri/beri_mp.c | 306 - sys/mips/beri/beri_mp.h | 83 - sys/mips/beri/beri_pic.c | 368 - sys/mips/beri/files.beri | 26 - sys/mips/beri/std.beri | 6 - sys/mips/broadcom/bcm_bmips.c | 417 -- sys/mips/broadcom/bcm_bmips_exts.h | 187 - sys/mips/broadcom/bcm_bmipsreg.h | 72 - sys/mips/broadcom/bcm_machdep.c | 651 -- sys/mips/broadcom/bcm_machdep.h | 137 - sys/mips/broadcom/bcm_mips.c | 694 -- sys/mips/broadcom/bcm_mips74k.c | 389 - sys/mips/broadcom/bcm_mips74kreg.h | 66 - sys/mips/broadcom/bcm_mipsvar.h | 110 - sys/mips/broadcom/bcm_nvram_cfe.c | 499 -- sys/mips/broadcom/bcm_nvram_cfevar.h | 66 - sys/mips/broadcom/bcm_pmu.c | 295 - sys/mips/broadcom/bcma_nexus.c | 116 - sys/mips/broadcom/bhnd_nexus.c | 278 - sys/mips/broadcom/bhnd_nexusvar.h | 39 - sys/mips/broadcom/files.broadcom | 31 - sys/mips/broadcom/siba_nexus.c | 106 - sys/mips/broadcom/std.broadcom | 8 - sys/mips/broadcom/uart_bus_chipc.c | 78 - sys/mips/broadcom/uart_cpu_chipc.c | 169 - sys/mips/cavium/asm_octeon.S | 64 - sys/mips/cavium/ciu.c | 484 -- sys/mips/cavium/cryptocteon/cavium_crypto.c | 943 --- sys/mips/cavium/cryptocteon/cryptocteon.c | 422 -- sys/mips/cavium/cryptocteon/cryptocteonvar.h | 73 - sys/mips/cavium/cvmx_config.h | 198 - sys/mips/cavium/files.octeon1 | 98 - sys/mips/cavium/if_octm.c | 536 -- sys/mips/cavium/obio.c | 207 - sys/mips/cavium/obiovar.h | 55 - sys/mips/cavium/octe/cavium-ethernet.h | 100 - sys/mips/cavium/octe/ethernet-common.c | 338 - sys/mips/cavium/octe/ethernet-common.h | 54 - sys/mips/cavium/octe/ethernet-defines.h | 50 - sys/mips/cavium/octe/ethernet-headers.h | 50 - sys/mips/cavium/octe/ethernet-mdio.c | 133 - sys/mips/cavium/octe/ethernet-mdio.h | 39 - sys/mips/cavium/octe/ethernet-mem.c | 98 - sys/mips/cavium/octe/ethernet-mem.h | 32 - sys/mips/cavium/octe/ethernet-mv88e61xx.c | 126 - sys/mips/cavium/octe/ethernet-mv88e61xx.h | 34 - sys/mips/cavium/octe/ethernet-rgmii.c | 290 - sys/mips/cavium/octe/ethernet-rx.c | 377 - sys/mips/cavium/octe/ethernet-rx.h | 36 - sys/mips/cavium/octe/ethernet-sgmii.c | 60 - sys/mips/cavium/octe/ethernet-spi.c | 303 - sys/mips/cavium/octe/ethernet-tx.c | 269 - sys/mips/cavium/octe/ethernet-tx.h | 32 - sys/mips/cavium/octe/ethernet-util.h | 81 - sys/mips/cavium/octe/ethernet-xaui.c | 59 - sys/mips/cavium/octe/ethernet.c | 502 -- sys/mips/cavium/octe/mv88e61xxphy.c | 627 -- sys/mips/cavium/octe/mv88e61xxphyreg.h | 149 - sys/mips/cavium/octe/octe.c | 490 -- sys/mips/cavium/octe/octebus.c | 122 - sys/mips/cavium/octe/octebusvar.h | 42 - sys/mips/cavium/octe/wrapper-cvmx-includes.h | 51 - sys/mips/cavium/octeon_cop2.S | 223 - sys/mips/cavium/octeon_cop2.h | 210 - sys/mips/cavium/octeon_ds1337.c | 215 - sys/mips/cavium/octeon_ebt3000_cf.c | 728 -- sys/mips/cavium/octeon_gpio.c | 506 -- sys/mips/cavium/octeon_gpiovar.h | 56 - sys/mips/cavium/octeon_irq.h | 182 - sys/mips/cavium/octeon_machdep.c | 694 -- sys/mips/cavium/octeon_mp.c | 152 - sys/mips/cavium/octeon_nmi.S | 45 - sys/mips/cavium/octeon_pci_console.c | 234 - sys/mips/cavium/octeon_pcmap_regs.h | 60 - sys/mips/cavium/octeon_pmc.c | 128 - sys/mips/cavium/octeon_rnd.c | 129 - sys/mips/cavium/octeon_rtc.c | 127 - sys/mips/cavium/octeon_wdog.c | 276 - sys/mips/cavium/octopci.c | 990 --- sys/mips/cavium/octopci_bus_space.c | 572 -- sys/mips/cavium/octopcireg.h | 105 - sys/mips/cavium/octopcivar.h | 35 - sys/mips/cavium/std.octeon1 | 9 - sys/mips/cavium/uart_bus_octeonusart.c | 111 - sys/mips/cavium/uart_cpu_octeonusart.c | 173 - sys/mips/cavium/uart_dev_oct16550.c | 855 --- sys/mips/cavium/usb/octusb.c | 1933 ----- sys/mips/cavium/usb/octusb.h | 137 - sys/mips/cavium/usb/octusb_octeon.c | 216 - sys/mips/conf/ALFA_HORNET_UB | 58 - sys/mips/conf/ALFA_HORNET_UB.hints | 104 - sys/mips/conf/AP121 | 52 - sys/mips/conf/AP121.hints | 106 - sys/mips/conf/AP135 | 65 - sys/mips/conf/AP135.hints | 177 - sys/mips/conf/AP143 | 52 - sys/mips/conf/AP143.hints | 111 - sys/mips/conf/AP91 | 64 - sys/mips/conf/AP91.hints | 103 - sys/mips/conf/AP93 | 44 - sys/mips/conf/AP93.hints | 138 - sys/mips/conf/AP94 | 35 - sys/mips/conf/AP94.hints | 27 - sys/mips/conf/AP96 | 45 - sys/mips/conf/AP96.hints | 96 - sys/mips/conf/AR5312_BASE.hints | 28 - sys/mips/conf/AR5315_BASE.hints | 33 - sys/mips/conf/AR71XX_BASE | 66 - sys/mips/conf/AR71XX_BASE.hints | 65 - sys/mips/conf/AR724X_BASE.hints | 65 - sys/mips/conf/AR91XX_BASE.hints | 57 - sys/mips/conf/AR933X_BASE.hints | 67 - sys/mips/conf/AR934X_BASE.hints | 74 - sys/mips/conf/BCM | 109 - sys/mips/conf/BCM.hints | 6 - sys/mips/conf/BERI_DE4.hints | 25 - sys/mips/conf/BERI_DE4_BASE | 59 - sys/mips/conf/BERI_DE4_MDROOT | 20 - sys/mips/conf/BERI_DE4_SDROOT | 15 - sys/mips/conf/BERI_NETFPGA_MDROOT | 36 - sys/mips/conf/BERI_SIM_BASE | 20 - sys/mips/conf/BERI_SIM_MDROOT | 19 - sys/mips/conf/BERI_SIM_SDROOT | 16 - sys/mips/conf/BERI_SIM_VIRTIO | 21 - sys/mips/conf/BERI_SOCKIT | 25 - sys/mips/conf/BERI_TPAD.hints | 50 - sys/mips/conf/CANNA | 32 - sys/mips/conf/CARAMBOLA2 | 57 - sys/mips/conf/CARAMBOLA2.hints | 106 - sys/mips/conf/CI20 | 35 - sys/mips/conf/DB120 | 52 - sys/mips/conf/DB120.hints | 161 - sys/mips/conf/DEFAULTS | 10 - sys/mips/conf/DIR-655A1 | 57 - sys/mips/conf/DIR-655A1.hints | 177 - sys/mips/conf/DIR-825B1 | 63 - sys/mips/conf/DIR-825B1.hints | 139 - sys/mips/conf/DIR-825C1 | 56 - sys/mips/conf/DIR-825C1.hints | 156 - sys/mips/conf/ENH200 | 44 - sys/mips/conf/ENH200.hints | 123 - sys/mips/conf/ERL | 217 - sys/mips/conf/JZ4780 | 115 - sys/mips/conf/JZ4780.hints | 1 - sys/mips/conf/MALTA | 10 - sys/mips/conf/MALTA.hints | 4 - sys/mips/conf/MALTA64 | 12 - sys/mips/conf/MALTA64EL | 10 - sys/mips/conf/MALTAEL | 10 - sys/mips/conf/MT7620.hints | 142 - sys/mips/conf/MT7620A_FDT | 75 - sys/mips/conf/MT7620N_FDT | 72 - sys/mips/conf/MT7621_FDT | 71 - sys/mips/conf/MT7628_FDT | 74 - sys/mips/conf/OCTEON1 | 242 - sys/mips/conf/OCTEON1.hints | 12 - sys/mips/conf/ONIONOMEGA | 54 - sys/mips/conf/ONIONOMEGA.hints | 131 - sys/mips/conf/PB47 | 41 - sys/mips/conf/PB47.hints | 77 - sys/mips/conf/PB92 | 135 - sys/mips/conf/PB92.hints | 112 - sys/mips/conf/PICOSTATION_M2HP | 68 - sys/mips/conf/PICOSTATION_M2HP.hints | 102 - sys/mips/conf/QCA953X_BASE | 78 - sys/mips/conf/QCA953X_BASE.hints | 78 - sys/mips/conf/QCA955X_BASE.hints | 87 - sys/mips/conf/ROCKET_M2HP | 68 - sys/mips/conf/ROCKET_M2HP.hints | 102 - sys/mips/conf/ROUTERSTATION | 29 - sys/mips/conf/ROUTERSTATION.hints | 47 - sys/mips/conf/ROUTERSTATION_MFS | 20 - sys/mips/conf/RSPRO | 31 - sys/mips/conf/RSPRO.hints | 48 - sys/mips/conf/RSPRO_MFS | 24 - sys/mips/conf/RSPRO_STANDALONE | 23 - sys/mips/conf/RT2880_FDT | 75 - sys/mips/conf/RT3050_FDT | 76 - sys/mips/conf/RT305X.hints | 136 - sys/mips/conf/RT3352_FDT | 72 - sys/mips/conf/RT3883_FDT | 80 - sys/mips/conf/RT5350.hints | 34 - sys/mips/conf/RT5350_FDT | 72 - sys/mips/conf/TL-ARCHERC7V2 | 69 - sys/mips/conf/TL-ARCHERC7V2.hints | 199 - sys/mips/conf/TL-WDR4300 | 60 - sys/mips/conf/TL-WDR4300.hints | 236 - sys/mips/conf/TL-WR1043NDv2 | 52 - sys/mips/conf/TL-WR1043NDv2.hints | 164 - sys/mips/conf/TL-WR740Nv4 | 54 - sys/mips/conf/TL-WR740Nv4.hints | 86 - sys/mips/conf/TP-MR3020 | 56 - sys/mips/conf/TP-MR3020.hints | 95 - sys/mips/conf/TP-MR3040 | 68 - sys/mips/conf/TP-MR3040.hints | 100 - sys/mips/conf/TP-WN1043ND | 62 - sys/mips/conf/TP-WN1043ND.hints | 132 - sys/mips/conf/WZR-300HP | 50 - sys/mips/conf/WZR-300HP.hints | 186 - sys/mips/conf/WZR-HPAG300H | 50 - sys/mips/conf/WZR-HPAG300H.hints | 131 - sys/mips/conf/X1000 | 93 - sys/mips/conf/X1000.hints | 1 - sys/mips/conf/XLP.hints | 5 - sys/mips/conf/XLP64 | 28 - sys/mips/conf/XLPN32 | 33 - sys/mips/conf/std.AR5312 | 79 - sys/mips/conf/std.AR5315 | 79 - sys/mips/conf/std.AR724X | 73 - sys/mips/conf/std.AR91XX | 64 - sys/mips/conf/std.AR933X | 76 - sys/mips/conf/std.AR934X | 77 - sys/mips/conf/std.AR_MIPS_BASE | 91 - sys/mips/conf/std.BERI | 61 - sys/mips/conf/std.MALTA | 63 - sys/mips/conf/std.QCA955X | 76 - sys/mips/conf/std.XLP | 120 - sys/mips/include/_align.h | 54 - sys/mips/include/_bus.h | 50 - sys/mips/include/_inttypes.h | 223 - sys/mips/include/_limits.h | 101 - sys/mips/include/_stdint.h | 198 - sys/mips/include/_types.h | 154 - sys/mips/include/abi.h | 94 - sys/mips/include/asm.h | 685 -- sys/mips/include/atomic.h | 850 --- sys/mips/include/bootinfo.h | 85 - sys/mips/include/bus.h | 751 -- sys/mips/include/bus_dma.h | 35 - sys/mips/include/cache.h | 224 - sys/mips/include/cache_mipsNN.h | 92 - sys/mips/include/cache_r4k.h | 434 -- sys/mips/include/cca.h | 151 - sys/mips/include/cdefs.h | 76 - sys/mips/include/clock.h | 44 - sys/mips/include/counter.h | 96 - sys/mips/include/cpu.h | 90 - sys/mips/include/cpufunc.h | 389 - sys/mips/include/cpuinfo.h | 85 - sys/mips/include/cpuregs.h | 641 -- sys/mips/include/db_machdep.h | 90 - sys/mips/include/dump.h | 77 - sys/mips/include/efi.h | 12 - sys/mips/include/elf.h | 215 - sys/mips/include/endian.h | 43 - sys/mips/include/exec.h | 41 - sys/mips/include/fdt.h | 45 - sys/mips/include/float.h | 98 - sys/mips/include/floatingpoint.h | 44 - sys/mips/include/fls64.h | 48 - sys/mips/include/fpu.h | 7 - sys/mips/include/frame.h | 141 - sys/mips/include/gdb_machdep.h | 76 - sys/mips/include/hwfunc.h | 109 - sys/mips/include/ieee.h | 154 - sys/mips/include/ieeefp.h | 33 - sys/mips/include/in_cksum.h | 53 - sys/mips/include/intr.h | 82 - sys/mips/include/intr_machdep.h | 76 - sys/mips/include/kdb.h | 72 - sys/mips/include/limits.h | 46 - sys/mips/include/locore.h | 65 - sys/mips/include/md_var.h | 84 - sys/mips/include/memdev.h | 42 - sys/mips/include/metadata.h | 35 - sys/mips/include/minidump.h | 47 - sys/mips/include/mips_opcode.h | 423 -- sys/mips/include/octeon_cop2.h | 215 - sys/mips/include/ofw_machdep.h | 45 - sys/mips/include/param.h | 187 - sys/mips/include/pcb.h | 142 - sys/mips/include/pcpu.h | 99 - sys/mips/include/pcpu_aux.h | 50 - sys/mips/include/pmap.h | 207 - sys/mips/include/pmc_mdep.h | 79 - sys/mips/include/proc.h | 108 - sys/mips/include/procctl.h | 3 - sys/mips/include/profile.h | 177 - sys/mips/include/pte.h | 207 - sys/mips/include/ptrace.h | 38 - sys/mips/include/reg.h | 92 - sys/mips/include/regdef.h | 109 - sys/mips/include/regnum.h | 210 - sys/mips/include/reloc.h | 36 - sys/mips/include/resource.h | 48 - sys/mips/include/runq.h | 61 - sys/mips/include/sc_machdep.h | 71 - sys/mips/include/setjmp.h | 68 - sys/mips/include/sf_buf.h | 69 - sys/mips/include/sigframe.h | 64 - sys/mips/include/signal.h | 83 - sys/mips/include/smp.h | 51 - sys/mips/include/stdarg.h | 37 - sys/mips/include/sysarch.h | 49 - sys/mips/include/tlb.h | 60 - sys/mips/include/tls.h | 83 - sys/mips/include/trap.h | 123 - sys/mips/include/ucontext.h | 135 - sys/mips/include/vdso.h | 41 - sys/mips/include/vm.h | 44 - sys/mips/include/vmparam.h | 209 - sys/mips/ingenic/files.jz4780 | 39 - sys/mips/ingenic/files.x1000 | 21 - sys/mips/ingenic/jz4780_aic.c | 808 -- sys/mips/ingenic/jz4780_aic.h | 72 - sys/mips/ingenic/jz4780_clk.h | 91 - sys/mips/ingenic/jz4780_clk_gen.c | 320 - sys/mips/ingenic/jz4780_clk_otg.c | 165 - sys/mips/ingenic/jz4780_clk_pll.c | 232 - sys/mips/ingenic/jz4780_clock.c | 828 --- sys/mips/ingenic/jz4780_clock.h | 34 - sys/mips/ingenic/jz4780_codec.c | 308 - sys/mips/ingenic/jz4780_codec.h | 100 - sys/mips/ingenic/jz4780_common.h | 34 - sys/mips/ingenic/jz4780_cpuregs.h | 71 - sys/mips/ingenic/jz4780_dme.c | 122 - sys/mips/ingenic/jz4780_dwc_fdt.c | 200 - sys/mips/ingenic/jz4780_efuse.c | 211 - sys/mips/ingenic/jz4780_ehci.c | 343 - sys/mips/ingenic/jz4780_gpio.c | 838 --- sys/mips/ingenic/jz4780_gpio_if.m | 40 - sys/mips/ingenic/jz4780_intr.c | 331 - sys/mips/ingenic/jz4780_lcd.c | 571 -- sys/mips/ingenic/jz4780_lcd.h | 201 - sys/mips/ingenic/jz4780_machdep.c | 240 - sys/mips/ingenic/jz4780_mmc.c | 1002 --- sys/mips/ingenic/jz4780_mp.c | 178 - sys/mips/ingenic/jz4780_mpboot.S | 43 - sys/mips/ingenic/jz4780_nand.c | 121 - sys/mips/ingenic/jz4780_nemc.c | 371 - sys/mips/ingenic/jz4780_ohci.c | 316 - sys/mips/ingenic/jz4780_pdma.c | 583 -- sys/mips/ingenic/jz4780_pdma.h | 107 - sys/mips/ingenic/jz4780_pinctrl.c | 257 - sys/mips/ingenic/jz4780_pinctrl.h | 30 - sys/mips/ingenic/jz4780_regs.h | 785 -- sys/mips/ingenic/jz4780_rtc.c | 232 - sys/mips/ingenic/jz4780_smb.c | 477 -- sys/mips/ingenic/jz4780_smb.h | 95 - sys/mips/ingenic/jz4780_timer.c | 336 - sys/mips/ingenic/jz4780_uart.c | 219 - sys/mips/malta/asm_malta.S | 90 - sys/mips/malta/files.malta | 15 - sys/mips/malta/gt.c | 129 - sys/mips/malta/gt_pci.c | 773 -- sys/mips/malta/gt_pci_bus_space.c | 408 -- sys/mips/malta/gt_pci_bus_space.h | 36 - sys/mips/malta/gtreg.h | 117 - sys/mips/malta/gtvar.h | 37 - sys/mips/malta/malta_machdep.c | 367 - sys/mips/malta/malta_mp.c | 281 - sys/mips/malta/maltareg.h | 242 - sys/mips/malta/obio.c | 182 - sys/mips/malta/obiovar.h | 58 - sys/mips/malta/std.malta | 10 - sys/mips/malta/uart_bus_maltausart.c | 91 - sys/mips/malta/uart_cpu_maltausart.c | 78 - sys/mips/malta/yamon.c | 66 - sys/mips/malta/yamon.h | 93 - sys/mips/mediatek/fdt_reset.c | 122 - sys/mips/mediatek/fdt_reset.h | 46 - sys/mips/mediatek/fdt_reset_if.m | 57 - sys/mips/mediatek/files.mediatek | 38 - sys/mips/mediatek/mtk_clock.c | 154 - sys/mips/mediatek/mtk_dotg.c | 191 - sys/mips/mediatek/mtk_ehci.c | 215 - sys/mips/mediatek/mtk_gpio_v1.c | 773 -- sys/mips/mediatek/mtk_gpio_v2.c | 666 -- sys/mips/mediatek/mtk_intr_gic.c | 368 - sys/mips/mediatek/mtk_intr_v1.c | 355 - sys/mips/mediatek/mtk_intr_v2.c | 350 - sys/mips/mediatek/mtk_machdep.c | 301 - sys/mips/mediatek/mtk_ohci.c | 215 - sys/mips/mediatek/mtk_pcie.c | 1265 ---- sys/mips/mediatek/mtk_pcie.h | 154 - sys/mips/mediatek/mtk_pinctrl.c | 238 - sys/mips/mediatek/mtk_pinctrl.h | 371 - sys/mips/mediatek/mtk_reset.c | 137 - sys/mips/mediatek/mtk_soc.c | 506 -- sys/mips/mediatek/mtk_soc.h | 136 - sys/mips/mediatek/mtk_spi_v1.c | 411 -- sys/mips/mediatek/mtk_spi_v1.h | 69 - sys/mips/mediatek/mtk_spi_v2.c | 353 - sys/mips/mediatek/mtk_spi_v2.h | 53 - sys/mips/mediatek/mtk_sysctl.c | 189 - sys/mips/mediatek/mtk_sysctl.h | 62 - sys/mips/mediatek/mtk_usb_phy.c | 324 - sys/mips/mediatek/mtk_usb_phy.h | 64 - sys/mips/mediatek/mtk_xhci.c | 289 - sys/mips/mediatek/palmbus.c | 80 - sys/mips/mediatek/std.mediatek | 86 - sys/mips/mediatek/std.rt2880 | 85 - sys/mips/mediatek/uart_dev_mtk.c | 549 -- sys/mips/mediatek/uart_dev_mtk.h | 124 - sys/mips/mips/autoconf.c | 113 - sys/mips/mips/bcopy.S | 285 - sys/mips/mips/bus_space_generic.c | 741 -- sys/mips/mips/busdma_machdep.c | 1544 ---- sys/mips/mips/cache.c | 331 - sys/mips/mips/cache_mipsNN.c | 1379 ---- sys/mips/mips/cpu.c | 585 -- sys/mips/mips/db_disasm.c | 397 - sys/mips/mips/db_interface.c | 347 - sys/mips/mips/db_trace.c | 444 -- sys/mips/mips/dump_machdep.c | 56 - sys/mips/mips/elf_machdep.c | 513 -- sys/mips/mips/elf_trampoline.c | 224 - sys/mips/mips/exception.S | 1243 ---- sys/mips/mips/fp.S | 3609 --------- sys/mips/mips/freebsd32_machdep.c | 489 -- sys/mips/mips/gdb_machdep.c | 189 - sys/mips/mips/genassym.c | 175 - sys/mips/mips/inckern.S | 45 - sys/mips/mips/intr_machdep.c | 300 - sys/mips/mips/libkern_machdep.c | 39 - sys/mips/mips/locore.S | 204 - sys/mips/mips/machdep.c | 579 -- sys/mips/mips/mem.c | 167 - sys/mips/mips/minidump_machdep.c | 283 - sys/mips/mips/mips_pic.c | 710 -- sys/mips/mips/mp_machdep.c | 373 - sys/mips/mips/mpboot.S | 87 - sys/mips/mips/nexus.c | 615 -- sys/mips/mips/octeon_cop2.c | 62 - sys/mips/mips/octeon_cop2_swtch.S | 244 - sys/mips/mips/ofw_machdep.c | 72 - sys/mips/mips/pm_machdep.c | 516 -- sys/mips/mips/pmap.c | 3763 ---------- sys/mips/mips/ptrace_machdep.c | 36 - sys/mips/mips/sc_machdep.c | 86 - sys/mips/mips/stack_machdep.c | 182 - sys/mips/mips/stdatomic.c | 413 -- sys/mips/mips/support.S | 887 --- sys/mips/mips/swtch.S | 690 -- sys/mips/mips/sys_machdep.c | 84 - sys/mips/mips/tick.c | 399 - sys/mips/mips/tlb.c | 387 - sys/mips/mips/trap.c | 1698 ----- sys/mips/mips/uio_machdep.c | 145 - sys/mips/mips/uma_machdep.c | 90 - sys/mips/mips/vm_machdep.c | 604 -- sys/mips/nlm/board.c | 537 -- sys/mips/nlm/board.h | 158 - sys/mips/nlm/board_cpld.c | 114 - sys/mips/nlm/board_eeprom.c | 173 - sys/mips/nlm/bus_space_rmi.c | 760 -- sys/mips/nlm/bus_space_rmi_pci.c | 760 -- sys/mips/nlm/clock.h | 43 - sys/mips/nlm/cms.c | 496 -- sys/mips/nlm/dev/net/mdio.c | 334 - sys/mips/nlm/dev/net/nae.c | 1455 ---- sys/mips/nlm/dev/net/sgmii.c | 210 - sys/mips/nlm/dev/net/ucore/crt0_basic.S | 64 - sys/mips/nlm/dev/net/ucore/ld.ucore.S | 160 - sys/mips/nlm/dev/net/ucore/ucore.h | 351 - sys/mips/nlm/dev/net/ucore/ucore_app.c | 46 - sys/mips/nlm/dev/net/xaui.c | 249 - sys/mips/nlm/dev/net/xlpge.c | 1539 ---- sys/mips/nlm/dev/net/xlpge.h | 138 - sys/mips/nlm/dev/sec/nlmrsa.c | 483 -- sys/mips/nlm/dev/sec/nlmrsalib.h | 62 - sys/mips/nlm/dev/sec/nlmsec.c | 690 -- sys/mips/nlm/dev/sec/nlmseclib.c | 284 - sys/mips/nlm/dev/sec/nlmseclib.h | 150 - sys/mips/nlm/dev/sec/rsa_ucode.h | 956 --- sys/mips/nlm/files.xlp | 38 - sys/mips/nlm/hal/bridge.h | 185 - sys/mips/nlm/hal/cop2.h | 303 - sys/mips/nlm/hal/cpucontrol.h | 194 - sys/mips/nlm/hal/fmn.c | 355 - sys/mips/nlm/hal/fmn.h | 246 - sys/mips/nlm/hal/gbu.h | 100 - sys/mips/nlm/hal/haldefs.h | 438 -- sys/mips/nlm/hal/interlaken.h | 70 - sys/mips/nlm/hal/iomap.h | 207 - sys/mips/nlm/hal/mdio.h | 106 - sys/mips/nlm/hal/mips-extns.h | 275 - sys/mips/nlm/hal/mmu.h | 165 - sys/mips/nlm/hal/nae.h | 656 -- sys/mips/nlm/hal/nlm_hal.c | 113 - sys/mips/nlm/hal/nlmsaelib.h | 605 -- sys/mips/nlm/hal/pcibus.h | 122 - sys/mips/nlm/hal/pic.h | 312 - sys/mips/nlm/hal/poe.h | 352 - sys/mips/nlm/hal/sgmii.h | 217 - sys/mips/nlm/hal/sys.h | 160 - sys/mips/nlm/hal/uart.h | 189 - sys/mips/nlm/hal/ucore_loader.h | 141 - sys/mips/nlm/hal/usb.h | 59 - sys/mips/nlm/hal/xaui.h | 193 - sys/mips/nlm/interrupt.h | 75 - sys/mips/nlm/intr_machdep.c | 358 - sys/mips/nlm/mpreset.S | 200 - sys/mips/nlm/msgring.h | 53 - sys/mips/nlm/std.xlp | 6 - sys/mips/nlm/tick.c | 384 - sys/mips/nlm/uart_cpu_xlp.c | 95 - sys/mips/nlm/usb_init.c | 90 - sys/mips/nlm/xlp.h | 138 - sys/mips/nlm/xlp_machdep.c | 715 -- sys/mips/nlm/xlp_pci.c | 577 -- sys/mips/nlm/xlp_simplebus.c | 313 - sys/modules/Makefile | 49 +- sys/modules/aacraid/Makefile | 3 - sys/modules/agp/Makefile | 3 - sys/modules/ar71xx/Makefile | 29 - sys/modules/ar71xx/ar71xx_ehci/Makefile | 42 - sys/modules/ar71xx/ar71xx_ohci/Makefile | 42 - sys/modules/cas/Makefile | 3 - sys/modules/cpufreq/Makefile | 4 - sys/modules/dtrace/Makefile | 6 +- sys/modules/dtrace/fasttrap/Makefile | 3 - sys/modules/gem/Makefile | 3 - sys/modules/hwpmc/Makefile | 4 - sys/modules/hwpmc_mips24k/Makefile | 16 - sys/modules/hwpmc_mips74k/Makefile | 16 - sys/modules/i2c/iicbb/Makefile | 1 - sys/modules/ipmi/Makefile | 2 - sys/modules/netfpga10g/Makefile | 11 - sys/modules/netfpga10g/nf10bmac/Makefile | 14 - sys/modules/opal_nvram/Makefile | 9 - sys/modules/powermac_nvram/Makefile | 9 - sys/modules/scc/Makefile | 3 - sys/modules/sound/driver/Makefile | 3 - sys/modules/sound/driver/ai2s/Makefile | 9 - sys/modules/sound/driver/davbus/Makefile | 9 - sys/modules/uart/Makefile | 2 +- sys/modules/usb/Makefile | 6 +- sys/modules/zfs/Makefile | 6 +- sys/powerpc/aim/aim_machdep.c | 813 --- sys/powerpc/aim/locore.S | 15 - sys/powerpc/aim/locore32.S | 123 - sys/powerpc/aim/locore64.S | 287 - sys/powerpc/aim/mmu_oea.c | 2835 ------- sys/powerpc/aim/mmu_oea64.c | 4303 ----------- sys/powerpc/aim/mmu_oea64.h | 140 - sys/powerpc/aim/mmu_radix.c | 6485 ----------------- sys/powerpc/aim/moea64_native.c | 1033 --- sys/powerpc/aim/mp_cpudep.c | 424 -- sys/powerpc/aim/slb.c | 624 -- sys/powerpc/aim/trap_subr32.S | 930 --- sys/powerpc/aim/trap_subr64.S | 999 --- sys/powerpc/amigaone/cpld.h | 44 - sys/powerpc/amigaone/cpld_a1222.c | 399 - sys/powerpc/amigaone/cpld_x5000.c | 336 - sys/powerpc/amigaone/platform_amigaone.c | 121 - sys/powerpc/booke/booke_machdep.c | 470 -- sys/powerpc/booke/locore.S | 977 --- sys/powerpc/booke/machdep_e500.c | 141 - sys/powerpc/booke/mp_cpudep.c | 97 - sys/powerpc/booke/platform_bare.c | 159 - sys/powerpc/booke/pmap.c | 3115 -------- sys/powerpc/booke/pmap_32.c | 992 --- sys/powerpc/booke/pmap_64.c | 786 -- sys/powerpc/booke/spe.c | 686 -- sys/powerpc/booke/trap_subr.S | 1135 --- sys/powerpc/conf/DEFAULTS | 14 - sys/powerpc/conf/GENERIC | 235 - sys/powerpc/conf/GENERIC.hints | 0 sys/powerpc/conf/GENERIC64 | 280 - sys/powerpc/conf/GENERIC64LE | 256 - sys/powerpc/conf/LINT | 8 - sys/powerpc/conf/LINT64 | 4 - sys/powerpc/conf/LINT64LE | 4 - sys/powerpc/conf/MPC85XX | 123 - sys/powerpc/conf/MPC85XXSPE | 124 - sys/powerpc/conf/NOTES | 94 - sys/powerpc/conf/QORIQ64 | 125 - sys/powerpc/conf/dpaa/DPAA | 100 - sys/powerpc/conf/dpaa/config.dpaa | 24 - sys/powerpc/conf/dpaa/files.dpaa | 122 - sys/powerpc/cpufreq/dfs.c | 228 - sys/powerpc/cpufreq/mpc85xx_jog.c | 339 - sys/powerpc/cpufreq/pcr.c | 341 - sys/powerpc/cpufreq/pmcr.c | 244 - sys/powerpc/cpufreq/pmufreq.c | 219 - sys/powerpc/fpu/fpu_add.c | 225 - sys/powerpc/fpu/fpu_arith.h | 152 - sys/powerpc/fpu/fpu_compare.c | 161 - sys/powerpc/fpu/fpu_div.c | 291 - sys/powerpc/fpu/fpu_emu.c | 788 -- sys/powerpc/fpu/fpu_emu.h | 195 - sys/powerpc/fpu/fpu_explode.c | 262 - sys/powerpc/fpu/fpu_extern.h | 55 - sys/powerpc/fpu/fpu_implode.c | 456 -- sys/powerpc/fpu/fpu_instr.h | 385 - sys/powerpc/fpu/fpu_mul.c | 238 - sys/powerpc/fpu/fpu_sqrt.c | 414 -- sys/powerpc/fpu/fpu_subr.c | 219 - sys/powerpc/include/_align.h | 53 - sys/powerpc/include/_bus.h | 47 - sys/powerpc/include/_inttypes.h | 222 - sys/powerpc/include/_limits.h | 98 - sys/powerpc/include/_stdint.h | 192 - sys/powerpc/include/_types.h | 148 - sys/powerpc/include/altivec.h | 39 - sys/powerpc/include/asm.h | 267 - sys/powerpc/include/atomic.h | 1152 --- sys/powerpc/include/bat.h | 167 - sys/powerpc/include/bus.h | 493 -- sys/powerpc/include/bus_dma.h | 37 - sys/powerpc/include/clock.h | 18 - sys/powerpc/include/counter.h | 162 - sys/powerpc/include/cpu.h | 155 - sys/powerpc/include/cpufunc.h | 312 - sys/powerpc/include/db_machdep.h | 87 - sys/powerpc/include/dbdma.h | 153 - sys/powerpc/include/dump.h | 73 - sys/powerpc/include/efi.h | 12 - sys/powerpc/include/elf.h | 146 - sys/powerpc/include/endian.h | 40 - sys/powerpc/include/exec.h | 37 - sys/powerpc/include/float.h | 100 - sys/powerpc/include/floatingpoint.h | 37 - sys/powerpc/include/fpu.h | 82 - sys/powerpc/include/frame.h | 114 - sys/powerpc/include/gdb_machdep.h | 140 - sys/powerpc/include/hid.h | 223 - sys/powerpc/include/ieee.h | 143 - sys/powerpc/include/ieeefp.h | 42 - sys/powerpc/include/ifunc.h | 58 - sys/powerpc/include/in_cksum.h | 52 - sys/powerpc/include/intr_machdep.h | 64 - sys/powerpc/include/kdb.h | 69 - sys/powerpc/include/limits.h | 45 - sys/powerpc/include/machdep.h | 37 - sys/powerpc/include/md_var.h | 71 - sys/powerpc/include/memdev.h | 40 - sys/powerpc/include/metadata.h | 38 - sys/powerpc/include/minidump.h | 52 - sys/powerpc/include/mmuvar.h | 224 - sys/powerpc/include/ofw_machdep.h | 58 - sys/powerpc/include/openpicreg.h | 141 - sys/powerpc/include/openpicvar.h | 92 - sys/powerpc/include/param.h | 162 - sys/powerpc/include/pcb.h | 134 - sys/powerpc/include/pcpu.h | 175 - sys/powerpc/include/pcpu_aux.h | 50 - sys/powerpc/include/pio.h | 304 - sys/powerpc/include/platform.h | 76 - sys/powerpc/include/platformvar.h | 89 - sys/powerpc/include/pmap.h | 360 - sys/powerpc/include/pmc_mdep.h | 94 - sys/powerpc/include/proc.h | 80 - sys/powerpc/include/procctl.h | 3 - sys/powerpc/include/profile.h | 234 - sys/powerpc/include/psl.h | 101 - sys/powerpc/include/pte.h | 432 -- sys/powerpc/include/ptrace.h | 44 - sys/powerpc/include/reg.h | 87 - sys/powerpc/include/reloc.h | 30 - sys/powerpc/include/resource.h | 44 - sys/powerpc/include/rtas.h | 60 - sys/powerpc/include/runq.h | 55 - sys/powerpc/include/sc_machdep.h | 71 - sys/powerpc/include/setjmp.h | 27 - sys/powerpc/include/sigframe.h | 39 - sys/powerpc/include/signal.h | 54 - sys/powerpc/include/slb.h | 92 - sys/powerpc/include/smp.h | 66 - sys/powerpc/include/spr.h | 922 --- sys/powerpc/include/sr.h | 62 - sys/powerpc/include/stack.h | 34 - sys/powerpc/include/stdarg.h | 37 - sys/powerpc/include/sysarch.h | 43 - sys/powerpc/include/tlb.h | 181 - sys/powerpc/include/tls.h | 66 - sys/powerpc/include/trap.h | 160 - sys/powerpc/include/ucontext.h | 91 - sys/powerpc/include/vdso.h | 43 - sys/powerpc/include/vm.h | 45 - sys/powerpc/include/vmparam.h | 337 - sys/powerpc/mambo/mambo.c | 98 - sys/powerpc/mambo/mambo_console.c | 185 - sys/powerpc/mambo/mambo_disk.c | 277 - sys/powerpc/mambo/mambocall.S | 37 - sys/powerpc/mambo/mambocall.h | 33 - sys/powerpc/mikrotik/platform_rb.c | 83 - sys/powerpc/mikrotik/rb_led.c | 147 - sys/powerpc/mpc85xx/atpic.c | 363 - sys/powerpc/mpc85xx/ds1553_bus_fdt.c | 126 - sys/powerpc/mpc85xx/ds1553_core.c | 194 - sys/powerpc/mpc85xx/ds1553_reg.h | 106 - sys/powerpc/mpc85xx/fsl_diu.c | 467 -- sys/powerpc/mpc85xx/fsl_espi.c | 432 -- sys/powerpc/mpc85xx/fsl_sata.c | 1894 ----- sys/powerpc/mpc85xx/fsl_sata.h | 138 - sys/powerpc/mpc85xx/i2c.c | 436 -- sys/powerpc/mpc85xx/isa.c | 84 - sys/powerpc/mpc85xx/lbc.c | 856 --- sys/powerpc/mpc85xx/lbc.h | 138 - sys/powerpc/mpc85xx/mpc85xx.c | 354 - sys/powerpc/mpc85xx/mpc85xx.h | 175 - sys/powerpc/mpc85xx/mpc85xx_cache.c | 160 - sys/powerpc/mpc85xx/mpc85xx_gpio.c | 292 - sys/powerpc/mpc85xx/pci_mpc85xx.c | 956 --- sys/powerpc/mpc85xx/pci_mpc85xx_pcib.c | 107 - sys/powerpc/mpc85xx/platform_mpc85xx.c | 708 -- sys/powerpc/mpc85xx/qoriq_gpio.c | 311 - sys/powerpc/ofw/ofw_initrd.c | 109 - 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usr.sbin/Makefile.powerpc delete mode 100644 usr.sbin/bsdinstall/partedit/partedit_powerpc.c delete mode 100644 usr.sbin/kldxref/ef_mips.c delete mode 100644 usr.sbin/kldxref/ef_powerpc.c delete mode 100644 usr.sbin/nvram/Makefile delete mode 100644 usr.sbin/nvram/nvram.8 delete mode 100644 usr.sbin/nvram/nvram.c diff --git a/Makefile b/Makefile index 021f9dc9307..595ec92a296 100644 --- a/Makefile +++ b/Makefile @@ -93,7 +93,7 @@ # # See src/UPDATING `COMMON ITEMS' for more complete information. # -# If TARGET=machine (e.g. powerpc, amd64, ...) is specified you can +# If TARGET=machine (e.g. amd64, arm64, ...) is specified you can # cross build world for other machine types using the buildworld target, # and once the world is built you can cross build a kernel using the # buildkernel target. @@ -497,20 +497,12 @@ worlds: .PHONY .if make(universe) || make(universe_kernels) || make(tinderbox) || \ make(targets) || make(universe-toolchain) # -# Don't build rarely used, semi-supported architectures unless requested. +# Architectures supported by the native build. # -.if defined(EXTRA_TARGETS) -EXTRA_ARCHES_mips= mipsel mipshf mipselhf mips64el mips64hf mips64elhf -EXTRA_ARCHES_mips+= mipsn32 -# powerpcspe excluded from main list until clang fixed -EXTRA_ARCHES_powerpc= powerpcspe powerpc64le -.endif -TARGETS?=amd64 arm arm64 i386 mips powerpc riscv +TARGETS?=amd64 arm arm64 i386 riscv _UNIVERSE_TARGETS= ${TARGETS} TARGET_ARCHES_arm?= armv6 armv7 TARGET_ARCHES_arm64?= aarch64 -TARGET_ARCHES_mips?= mips mips64 ${EXTRA_ARCHES_mips} -TARGET_ARCHES_powerpc?= powerpc powerpc64 ${EXTRA_ARCHES_powerpc} TARGET_ARCHES_riscv?= riscv64 riscv64sf .for target in ${TARGETS} TARGET_ARCHES_${target}?= ${target} @@ -522,9 +514,6 @@ TOOLCHAINS_arm= armv6-gcc9 armv7-gcc9 TOOLCHAIN_armv7= armv7-gcc9 TOOLCHAINS_arm64= aarch64-gcc9 TOOLCHAINS_i386= i386-gcc9 -TOOLCHAINS_mips= mips-gcc9 -TOOLCHAINS_powerpc= powerpc-gcc9 powerpc64-gcc9 -TOOLCHAIN_powerpc64= powerpc64-gcc9 TOOLCHAINS_riscv= riscv64-gcc9 .endif diff --git a/Makefile.inc1 b/Makefile.inc1 index 5fb865882d6..5b47c81447f 100644 --- a/Makefile.inc1 +++ b/Makefile.inc1 @@ -143,28 +143,14 @@ TARGET_ABI= gnueabi .endif .endif MACHINE_ABI?= unknown -MACHINE_TRIPLE?=${MACHINE_ARCH:S/amd64/x86_64/:C/[hs]f$//:S/mipsn32/mips64/}-${MACHINE_ABI}-freebsd13.4 +MACHINE_TRIPLE?=${MACHINE_ARCH:S/amd64/x86_64/:C/[hs]f$//}-${MACHINE_ABI}-freebsd13.4 TARGET_ABI?= unknown -TARGET_TRIPLE?= ${TARGET_ARCH:S/amd64/x86_64/:C/[hs]f$//:S/mipsn32/mips64/}-${TARGET_ABI}-freebsd13.4 +TARGET_TRIPLE?= ${TARGET_ARCH:S/amd64/x86_64/:C/[hs]f$//}-${TARGET_ABI}-freebsd13.4 KNOWN_ARCHES?= aarch64/arm64 \ amd64 \ armv6/arm \ armv7/arm \ i386 \ - mips \ - mipsel/mips \ - mips64el/mips \ - mipsn32el/mips \ - mips64/mips \ - mipsn32/mips \ - mipshf/mips \ - mipselhf/mips \ - mips64elhf/mips \ - mips64hf/mips \ - powerpc \ - powerpc64/powerpc \ - powerpc64le/powerpc \ - powerpcspe/powerpc \ riscv64/riscv \ riscv64sf/riscv @@ -1215,10 +1201,6 @@ _ncpu_cmd=sysctl -n hw.ncpu 2>/dev/null || nproc 2>/dev/null || echo unknown buildworld_prologue: .PHONY @echo "--------------------------------------------------------------" @echo ">>> World build started on `LC_ALL=C date`" -.if ${TARGET:Mmips} - @echo "--------------------------------------------------------------" - @echo "WARNING: MIPS architecture is gone in MidnightBSD" -.endif @echo "--------------------------------------------------------------" buildworld_epilogue: .PHONY @@ -1228,10 +1210,6 @@ buildworld_epilogue: .PHONY @seconds=$$(($$(date '+%s') - ${_BUILDWORLD_START})); \ echo -n ">>> World built in $$seconds seconds, "; \ echo "ncpu: $$(${_ncpu_cmd})${.MAKE.JOBS:S/^/, make -j/}" -.if ${TARGET:Mmips} - @echo "--------------------------------------------------------------" - @echo "WARNING: MIPS architecture is gone in MidnightBSD" -.endif @echo "--------------------------------------------------------------" # @@ -1689,9 +1667,6 @@ NO_KERNELOBJ= t KERNCONF=${KERNFAST} .endif .endif -GENERIC_KERNCONF_SUFX_powerpc64= 64 -GENERIC_KERNCONF_SUFX_powerpc64le= 64LE -GENERIC_KERNCONF_powerpcspe= MPC85XXSPE GENERIC_KERNCONF?= ${GENERIC_KERNCONF_${TARGET_ARCH}:UGENERIC${GENERIC_KERNCONF_SUFX_${TARGET_ARCH}}} INSTKERNNAME?= kernel @@ -2354,9 +2329,6 @@ _bootstrap_tools_links+=m4 lex # r296685 fix cross-endian objcopy # r310724 fixed PR 215350, a crash in libdwarf with objects built by GCC 6.2. # r334881 added libdwarf constants used by ctfconvert. -# r338478 fixed a crash in objcopy for mips64el objects -# r339083 libelf: correct mips64el test to use ELF header -# r348347 Add missing powerpc64 relocation support to libdwarf .if ${BOOTSTRAPPING} < 400000 _elftoolchain_libs= lib/libelf lib/libdwarf lib/libzstd ${_bt}-lib/libelf: ${_bt_m4_depend} diff --git a/Makefile.libcompat b/Makefile.libcompat index 58d4dbbfbee..b367ac13690 100644 --- a/Makefile.libcompat +++ b/Makefile.libcompat @@ -3,7 +3,7 @@ __<${_this:T}>__: # Makefile for the compatibility libraries. -# - 32-bit compat libraries on MIPS, PowerPC, and AMD64. +# - 32-bit compatibility libraries on AMD64. .include diff --git a/cddl/contrib/opensolaris/lib/libdtrace/mips/dt_isadep.c b/cddl/contrib/opensolaris/lib/libdtrace/mips/dt_isadep.c deleted file mode 100644 index 1aeb95f3dfd..00000000000 --- a/cddl/contrib/opensolaris/lib/libdtrace/mips/dt_isadep.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright 2005 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -#pragma ident "%Z%%M% %I% %E% SMI" - -#include -#include -#include -#include -#include - -#include -#include - -/*ARGSUSED*/ -int -dt_pid_create_entry_probe(struct ps_prochandle *P, dtrace_hdl_t *dtp, - fasttrap_probe_spec_t *ftp, const GElf_Sym *symp) -{ - - dt_dprintf("%s: unimplemented\n", __func__); - return (DT_PROC_ERR); -} - -int -dt_pid_create_return_probe(struct ps_prochandle *P, dtrace_hdl_t *dtp, - fasttrap_probe_spec_t *ftp, const GElf_Sym *symp, uint64_t *stret) -{ - - dt_dprintf("%s: unimplemented\n", __func__); - return (DT_PROC_ERR); -} - -/*ARGSUSED*/ -int -dt_pid_create_offset_probe(struct ps_prochandle *P, dtrace_hdl_t *dtp, - fasttrap_probe_spec_t *ftp, const GElf_Sym *symp, ulong_t off) -{ - - dt_dprintf("%s: unimplemented\n", __func__); - return (DT_PROC_ERR); -} - -/*ARGSUSED*/ -int -dt_pid_create_glob_offset_probes(struct ps_prochandle *P, dtrace_hdl_t *dtp, - fasttrap_probe_spec_t *ftp, const GElf_Sym *symp, const char *pattern) -{ - - dt_dprintf("%s: unimplemented\n", __func__); - return (DT_PROC_ERR); -} diff --git a/cddl/contrib/opensolaris/lib/libdtrace/powerpc/dt_isadep.c b/cddl/contrib/opensolaris/lib/libdtrace/powerpc/dt_isadep.c deleted file mode 100644 index f4b02c9fe38..00000000000 --- a/cddl/contrib/opensolaris/lib/libdtrace/powerpc/dt_isadep.c +++ /dev/null @@ -1,197 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright 2005 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -#pragma ident "%Z%%M% %I% %E% SMI" - -#include -#include -#include -#include -#include - -#include -#include - -#include - -/*ARGSUSED*/ -int -dt_pid_create_entry_probe(struct ps_prochandle *P, dtrace_hdl_t *dtp, - fasttrap_probe_spec_t *ftp, const GElf_Sym *symp) -{ - ftp->ftps_type = DTFTP_ENTRY; - ftp->ftps_pc = (uintptr_t)symp->st_value; - ftp->ftps_size = (size_t)symp->st_size; - ftp->ftps_noffs = 1; - ftp->ftps_offs[0] = 0; - - if (ioctl(dtp->dt_ftfd, FASTTRAPIOC_MAKEPROBE, ftp) != 0) { - dt_dprintf("fasttrap probe creation ioctl failed: %s\n", - strerror(errno)); - return (dt_set_errno(dtp, errno)); - } - - return (1); -} - -int -dt_pid_create_return_probe(struct ps_prochandle *P, dtrace_hdl_t *dtp, - fasttrap_probe_spec_t *ftp, const GElf_Sym *symp, uint64_t *stret) -{ - - uintptr_t temp; - uint32_t *text; - int i; - int srdepth = 0; - - if ((text = malloc(symp->st_size + 4)) == NULL) { - dt_dprintf("mr sparkle: malloc() failed\n"); - return (DT_PROC_ERR); - } - - if (Pread(P, text, symp->st_size, symp->st_value) != symp->st_size) { - dt_dprintf("mr sparkle: Pread() failed\n"); - free(text); - return (DT_PROC_ERR); - } - - /* - * Leave a dummy instruction in the last slot to simplify edge - * conditions. - */ - text[symp->st_size / 4] = 0; - - ftp->ftps_type = DTFTP_RETURN; - ftp->ftps_pc = symp->st_value; - ftp->ftps_size = symp->st_size; - ftp->ftps_noffs = 0; - - for (i = 0; i < symp->st_size / 4; i++) { - - if ((text[i] & 0xfc000001) != 0x48000000 && - text[i] != 0x4e800020) - continue; - - /* - * Check for a jump within this function. If it's outside this - * function then it's a tail-call, so a return point. - */ - if ((text[i] & 0xfc000000) == 0x48000000) { - temp = (text[i] & 0x03fffffc); - /* Bit 30 denotes an absolute address. */ - if (!(text[i] & 0x02)) { - temp += symp->st_value + i * 4; - } - else { - /* Sign extend the absolute address. */ - if (temp & 0x02000000) { - temp |= (UINTPTR_MAX - 0x03ffffff); - } - } - if (temp >= symp->st_value && - temp <= (symp->st_value + symp->st_size)) - continue; - } - dt_dprintf("return at offset %x\n", i * 4); - ftp->ftps_offs[ftp->ftps_noffs++] = i * 4; - } - - free(text); - if (ftp->ftps_noffs > 0) { - if (ioctl(dtp->dt_ftfd, FASTTRAPIOC_MAKEPROBE, ftp) != 0) { - dt_dprintf("fasttrap probe creation ioctl failed: %s\n", - strerror(errno)); - return (dt_set_errno(dtp, errno)); - } - } - - - return (ftp->ftps_noffs); -} - -/*ARGSUSED*/ -int -dt_pid_create_offset_probe(struct ps_prochandle *P, dtrace_hdl_t *dtp, - fasttrap_probe_spec_t *ftp, const GElf_Sym *symp, ulong_t off) -{ - if (off & 0x3) - return (DT_PROC_ALIGN); - - ftp->ftps_type = DTFTP_OFFSETS; - ftp->ftps_pc = (uintptr_t)symp->st_value; - ftp->ftps_size = (size_t)symp->st_size; - ftp->ftps_noffs = 1; - ftp->ftps_offs[0] = off; - - if (ioctl(dtp->dt_ftfd, FASTTRAPIOC_MAKEPROBE, ftp) != 0) { - dt_dprintf("fasttrap probe creation ioctl failed: %s\n", - strerror(errno)); - return (dt_set_errno(dtp, errno)); - } - - return (1); -} - -/*ARGSUSED*/ -int -dt_pid_create_glob_offset_probes(struct ps_prochandle *P, dtrace_hdl_t *dtp, - fasttrap_probe_spec_t *ftp, const GElf_Sym *symp, const char *pattern) -{ - ulong_t i; - - ftp->ftps_type = DTFTP_OFFSETS; - ftp->ftps_pc = (uintptr_t)symp->st_value; - ftp->ftps_size = (size_t)symp->st_size; - ftp->ftps_noffs = 0; - - /* - * If we're matching against everything, just iterate through each - * instruction in the function, otherwise look for matching offset - * names by constructing the string and comparing it against the - * pattern. - */ - if (strcmp("*", pattern) == 0) { - for (i = 0; i < symp->st_size; i += 4) { - ftp->ftps_offs[ftp->ftps_noffs++] = i; - } - } else { - char name[sizeof (i) * 2 + 1]; - - for (i = 0; i < symp->st_size; i += 4) { - (void) sprintf(name, "%lx", i); - if (gmatch(name, pattern)) - ftp->ftps_offs[ftp->ftps_noffs++] = i; - } - } - - if (ioctl(dtp->dt_ftfd, FASTTRAPIOC_MAKEPROBE, ftp) != 0) { - dt_dprintf("fasttrap probe creation ioctl failed: %s\n", - strerror(errno)); - return (dt_set_errno(dtp, errno)); - } - - return (ftp->ftps_noffs); -} diff --git a/cddl/lib/libdtrace/Makefile b/cddl/lib/libdtrace/Makefile index b98f64fc34c..631bf6db623 100644 --- a/cddl/lib/libdtrace/Makefile +++ b/cddl/lib/libdtrace/Makefile @@ -106,14 +106,6 @@ CFLAGS+= -I${OPENSOLARIS_SYS_DISTDIR}/uts/intel -DDIS_MEM CFLAGS+= -I${OPENSOLARIS_SYS_DISTDIR}/uts/arm .PATH: ${SRCTOP}/cddl/contrib/opensolaris/lib/libdtrace/arm .PATH: ${SRCTOP}/sys/cddl/dev/dtrace/arm -.elif ${MACHINE_CPUARCH} == "mips" -CFLAGS+= -I${OPENSOLARIS_SYS_DISTDIR}/uts/mips -.PATH: ${SRCTOP}/cddl/contrib/opensolaris/lib/libdtrace/mips -.PATH: ${SRCTOP}/sys/cddl/dev/dtrace/mips -.elif ${MACHINE_CPUARCH} == "powerpc" -CFLAGS+= -I${OPENSOLARIS_SYS_DISTDIR}/uts/powerpc -.PATH: ${SRCTOP}/cddl/contrib/opensolaris/lib/libdtrace/powerpc -.PATH: ${SRCTOP}/sys/cddl/dev/dtrace/powerpc .elif ${MACHINE_CPUARCH} == "riscv" CFLAGS+= -I${OPENSOLARIS_SYS_DISTDIR}/uts/riscv .PATH: ${SRCTOP}/cddl/contrib/opensolaris/lib/libdtrace/riscv diff --git a/cddl/lib/libzpool/Makefile b/cddl/lib/libzpool/Makefile index cd9f893c426..48b3b8513db 100644 --- a/cddl/lib/libzpool/Makefile +++ b/cddl/lib/libzpool/Makefile @@ -24,11 +24,6 @@ ACFLAGS+= -Wa,--noexecstack ATOMIC_SRCS= opensolaris_atomic.c .endif -.if ${MACHINE_ARCH} == "powerpc" || ${MACHINE_ARCH} == "powerpcspe" -# Don't waste GOT entries on small data. -PICFLAG= -fPIC -.endif - PACKAGE= zfs LIB= zpool @@ -267,10 +262,4 @@ CFLAGS.zstd.c+= ${NO_WBITWISE_INSTEAD_OF_LOGICAL} .include -.if ${MACHINE_CPUARCH} == "mips" && \ - ${COMPILER_TYPE} == "clang" && ${COMPILER_VERSION} >= 190000 -# Work around MIPS-specific llvm bug in the Shrink Wrapping analysis pass -CFLAGS.arc.c+= -mllvm -enable-shrink-wrap-region-split=false -.endif - .include diff --git a/cddl/usr.sbin/Makefile b/cddl/usr.sbin/Makefile index 33943434fb8..98f8bd82fda 100644 --- a/cddl/usr.sbin/Makefile +++ b/cddl/usr.sbin/Makefile @@ -33,17 +33,6 @@ _dwatch= dwatch _lockstat= lockstat .endif -.if ${MACHINE_CPUARCH} == "mips" -_dtrace= dtrace -_dwatch= dwatch -.endif - -.if ${MACHINE_CPUARCH} == "powerpc" -_dtrace= dtrace -_dwatch= dwatch -_lockstat= lockstat -.endif - SUBDIR_PARALLEL= .include diff --git a/cddl/usr.sbin/zfsd/vdev.cc b/cddl/usr.sbin/zfsd/vdev.cc index 3f86d3ab2dd..a11c31b6d06 100644 --- a/cddl/usr.sbin/zfsd/vdev.cc +++ b/cddl/usr.sbin/zfsd/vdev.cc @@ -41,11 +41,6 @@ #include #include -/* - * Undefine flush, defined by cpufunc.h on sparc64, because it conflicts with - * C++ flush methods - */ -#undef flush #include #include diff --git a/cddl/usr.sbin/zfsd/zfsd_event.cc b/cddl/usr.sbin/zfsd/zfsd_event.cc index 5cb17192d8e..9bc71ebd17e 100644 --- a/cddl/usr.sbin/zfsd/zfsd_event.cc +++ b/cddl/usr.sbin/zfsd/zfsd_event.cc @@ -43,11 +43,6 @@ #include #include -/* - * Undefine flush, defined by cpufunc.h on sparc64, because it conflicts with - * C++ flush methods - */ -#undef flush #undef __init #include #include diff --git a/etc/mtree/BSD.usr.dist b/etc/mtree/BSD.usr.dist index 03809ec4f42..092a1ec7fa9 100644 --- a/etc/mtree/BSD.usr.dist +++ b/etc/mtree/BSD.usr.dist @@ -859,8 +859,6 @@ .. i386 .. - powerpc - .. .. man5 .. @@ -873,8 +871,6 @@ .. i386 .. - powerpc - .. .. man9 .. diff --git a/include/Makefile b/include/Makefile index f7e747ff7b2..56b931165d2 100644 --- a/include/Makefile +++ b/include/Makefile @@ -45,7 +45,7 @@ LDIRS= geom net net80211 netgraph netinet netinet6 \ LSUBDIRS= dev/acpica dev/agp dev/an dev/ciss dev/filemon dev/firewire \ dev/hwpmc dev/hyperv \ dev/ic dev/iicbus dev/io dev/mfi dev/mmc dev/nvme \ - dev/ofw dev/pbio dev/pci ${_dev_powermac_nvram} dev/ppbus dev/pwm \ + dev/ofw dev/pbio dev/pci dev/ppbus dev/pwm \ dev/smbus dev/speaker dev/tcp_log dev/veriexec dev/vkbd dev/wg \ fs/devfs fs/fdescfs fs/msdosfs fs/nfs fs/nullfs \ fs/procfs fs/smbfs fs/udf fs/unionfs \ @@ -290,10 +290,6 @@ INCS+= iconv.h LSUBDIRS+= dev/usb .endif -.if ${MACHINE_CPUARCH} == "powerpc" && ${MACHINE_ARCH} != "powerpcspe" -_dev_powermac_nvram= dev/powermac_nvram -.endif - # Define SHARED to indicate whether you want symbolic links to the system # source (``symlinks''), or a separate copy (``copies''). ``symlinks'' is # probably only useful for developers and should be avoided if you do not diff --git a/lib/Makefile b/lib/Makefile index eb89c54521a..e13c6809acc 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -189,8 +189,7 @@ SUBDIR.${MK_STATS}+= libstats # C++ support. Furthermore, they can only be built for certain architectures. .if ${COMPILER_TYPE} == "clang" && ${MK_CXX} != "no" && \ (${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64" || \ - ${MACHINE_CPUARCH} == "arm" || ${MACHINE_CPUARCH} == "i386" || \ - ${MACHINE_CPUARCH} == "powerpc" || ${MACHINE_CPUARCH} == "riscv") + ${MACHINE_CPUARCH} == "arm" || ${MACHINE_CPUARCH} == "i386" || ${MACHINE_CPUARCH} == "riscv") _libclang_rt= libclang_rt .endif @@ -218,9 +217,7 @@ SUBDIR.${MK_PMC}+= libipt SUBDIR.${MK_BHYVE}+= libvmmapi .endif -.if ${MACHINE_ARCH} != "powerpc" SUBDIR.${MK_OPENMP}+= libomp -.endif .if !defined(COMPAT_32BIT) && ${MK_USB} != "no" SUBDIR.${MK_OPENSSH}+= libcbor libfido2 .endif diff --git a/lib/clang/libclang/Makefile b/lib/clang/libclang/Makefile index b8a0a6366c9..03bfa800eca 100644 --- a/lib/clang/libclang/Makefile +++ b/lib/clang/libclang/Makefile @@ -10,10 +10,6 @@ PACKAGE= clang SHLIB_CXX= clang SHLIB_MAJOR= 19 PRIVATELIB= -.if ${MACHINE} == "powerpc" -# Work around "relocation R_PPC_GOT16 out of range" errors -PICFLAG= -fPIC -.endif .endif SHARED_CXXFLAGS+= -UPIC # To avoid compile errors diff --git a/lib/clang/libllvm/Makefile b/lib/clang/libllvm/Makefile index 05128550827..6c4df215b85 100644 --- a/lib/clang/libllvm/Makefile +++ b/lib/clang/libllvm/Makefile @@ -10,10 +10,6 @@ PACKAGE= clang SHLIB_CXX= llvm SHLIB_MAJOR= 19 PRIVATELIB= -.if ${MACHINE} == "powerpc" -# Work around "relocation R_PPC_GOT16 out of range" errors -PICFLAG= -fPIC -.endif CFLAGS+= -DLLVM_BUILD_LLVM_DYLIB .endif diff --git a/lib/clang/llvm.build.mk b/lib/clang/llvm.build.mk index e1d549cb241..5a2ef144d19 100644 --- a/lib/clang/llvm.build.mk +++ b/lib/clang/llvm.build.mk @@ -49,8 +49,8 @@ TARGET_ABI= VENDOR= unknown OS_VERSION= freebsd13.4 -LLVM_TARGET_TRIPLE?= ${TARGET_ARCH:C/amd64/x86_64/:C/[hs]f$//:S/mipsn32/mips64/}-${VENDOR}-${OS_VERSION}${TARGET_ABI} -LLVM_BUILD_TRIPLE?= ${BUILD_ARCH:C/amd64/x86_64/:C/[hs]f$//:S/mipsn32/mips64/}-${VENDOR}-${OS_VERSION} +LLVM_TARGET_TRIPLE?= ${TARGET_ARCH:C/amd64/x86_64/:C/[hs]f$//}-${VENDOR}-${OS_VERSION}${TARGET_ABI} +LLVM_BUILD_TRIPLE?= ${BUILD_ARCH:C/amd64/x86_64/:C/[hs]f$//}-${VENDOR}-${OS_VERSION} CFLAGS+= -DLLVM_DEFAULT_TARGET_TRIPLE=\"${LLVM_TARGET_TRIPLE}\" CFLAGS+= -DLLVM_HOST_TRIPLE=\"${LLVM_BUILD_TRIPLE}\" @@ -73,15 +73,9 @@ CFLAGS+= -DLLVM_TARGET_ENABLE_BPF .endif .if ${MK_LLVM_TARGET_MIPS} != "no" CFLAGS+= -DLLVM_TARGET_ENABLE_MIPS -. if ${MACHINE_CPUARCH} == "mips" -LLVM_NATIVE_ARCH= Mips -. endif .endif .if ${MK_LLVM_TARGET_POWERPC} != "no" CFLAGS+= -DLLVM_TARGET_ENABLE_POWERPC -. if ${MACHINE_CPUARCH} == "powerpc" -LLVM_NATIVE_ARCH= PowerPC -. endif .endif .if ${MK_LLVM_TARGET_RISCV} != "no" CFLAGS+= -DLLVM_TARGET_ENABLE_RISCV @@ -135,8 +129,3 @@ CFLAGS+= -DBOOTSTRAPPING_WANT_NATIVE_SYSCTL .if defined(BOOTSTRAPPING) && ${.MAKE.OS} == "Linux" LIBADD+= dl .endif - -.if ${MACHINE_ARCH:Mmips64} -STATIC_CFLAGS+= -mxgot -STATIC_CXXFLAGS+= -mxgot -.endif diff --git a/lib/csu/Makefile b/lib/csu/Makefile index 1f8a403eb2c..7a2fb568d86 100644 --- a/lib/csu/Makefile +++ b/lib/csu/Makefile @@ -1,11 +1,7 @@ .include -.if exists(${.CURDIR}/${MACHINE_ARCH:S/powerpc64le/powerpc64/}) -SUBDIR+= ${MACHINE_ARCH:S/powerpc64le/powerpc64/} -.else SUBDIR+= ${MACHINE_CPUARCH} -.endif HAS_TESTS= SUBDIR.${MK_TESTS}+= tests diff --git a/lib/csu/mips/Makefile b/lib/csu/mips/Makefile deleted file mode 100644 index cfebb2c24ba..00000000000 --- a/lib/csu/mips/Makefile +++ /dev/null @@ -1,27 +0,0 @@ - -.PATH: ${.CURDIR:H}/common - -.include - -CFLAGS+= -DCRT_IRELOC_SUPPRESS - -.if ${MACHINE_ARCH:Mmips64} -ELFCLASS= 64 -.else -ELFCLASS= 32 -.endif -.if ${MACHINE_ARCH:Mmips*el} -ENDIAN= l -.else -ENDIAN= b -.endif -.if ${MACHINE_ARCH:Mmipsn32*} -SUFFIX= n32 -.else -SUFFIX= -.endif - -# binutils requires an explicit emulation for ld -r -LDFLAGS.bfd+= -Wl,-m -Wl,elf${ELFCLASS}${ENDIAN}tsmip${SUFFIX}_fbsd - -.include diff --git a/lib/csu/mips/Makefile.depend b/lib/csu/mips/Makefile.depend deleted file mode 100644 index 993ab0638f4..00000000000 --- a/lib/csu/mips/Makefile.depend +++ /dev/null @@ -1,11 +0,0 @@ -# Autogenerated - do NOT edit! - -DIRDEPS = \ - include \ - - -.include - -.if ${DEP_RELDIR} == ${_DEP_RELDIR} -# local dependencies - needed for -jN in clean tree -.endif diff --git a/lib/csu/mips/crt.h b/lib/csu/mips/crt.h deleted file mode 100644 index dab098c5b10..00000000000 --- a/lib/csu/mips/crt.h +++ /dev/null @@ -1,58 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-1-Clause - * - * Copyright 2018 Andrew Turner - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _CRT_H_ -#define _CRT_H_ - -#define HAVE_CTORS -#define CTORS_CONSTRUCTORS -#ifdef __mips_o32 -#define INIT_CALL_SEQ(func) \ - ".set push \n" \ - ".set noreorder \n" \ - "bal 1f \n" \ - "nop \n" \ - "1: \n" \ - ".cpload $ra \n" \ - "addu $sp, $sp, -8 \n" \ - ".cprestore 4 \n" \ - ".local " __STRING(func) "\n" \ - "jal " __STRING(func) "\n" \ - "nop \n" \ - "addu $sp, $sp, 8 \n" \ - ".set pop\n" -#else -#define INIT_CALL_SEQ(func) \ - ".set push \n" \ - ".set noreorder \n" \ - "bal 1f \n" \ - "nop \n" \ - "1: \n" \ - ".cpsetup $ra, $zero, 1b \n" \ - ".local " __STRING(func) "\n" \ - "jal " __STRING(func) "\n" \ - "nop \n" \ - ".set pop\n" -#endif - -#endif diff --git a/lib/csu/mips/crt1_c.c b/lib/csu/mips/crt1_c.c deleted file mode 100644 index c127940aec7..00000000000 --- a/lib/csu/mips/crt1_c.c +++ /dev/null @@ -1,87 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright 1996-1998 John D. Polstra. - * All rights reserved. - * Copyright (c) 1995 Christopher G. Demetriou - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Christopher G. Demetriou - * for the NetBSD Project. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include "libc_private.h" -#include "ignore_init.c" - -struct Struct_Obj_Entry; -struct ps_strings; - -#ifdef GCRT -extern void _mcleanup(void); -extern void monstartup(void *, void *); -extern int eprol; -extern int etext; -#endif - -void __start(char **, void (*)(void), struct Struct_Obj_Entry *, struct ps_strings *); - -/* The entry function. */ -void -__start(char **ap, - void (*cleanup)(void), /* from shared loader */ - struct Struct_Obj_Entry *obj __unused, /* from shared loader */ - struct ps_strings *ps_strings __unused) -{ - int argc; - char **argv; - char **env; - - argc = * (long *) ap; - argv = ap + 1; - env = ap + 2 + argc; - handle_argv(argc, argv, env); - - if (&_DYNAMIC != NULL) - atexit(cleanup); - else - _init_tls(); - -#ifdef GCRT - atexit(_mcleanup); - monstartup(&eprol, &etext); -#endif - - handle_static_init(argc, argv, env); - exit(main(argc, argv, env)); -} - -#ifdef GCRT -__asm__(".text"); -__asm__("eprol:"); -__asm__(".previous"); -#endif diff --git a/lib/csu/mips/crti.S b/lib/csu/mips/crti.S deleted file mode 100644 index 2626867eb99..00000000000 --- a/lib/csu/mips/crti.S +++ /dev/null @@ -1,51 +0,0 @@ -#include -#ifndef __clang__ - .gnu_attribute 4, 0 -#endif - .section .init,"ax",%progbits - .align 4 - .globl _init - .type _init,%function -_init: - .set noreorder -#if defined(__ABICALLS__) && (defined(__mips_o32) || defined(__mips_o64)) - SETUP_GP -#endif - PTR_ADDU sp, sp, -CALLFRAME_SIZ - REG_S ra, CALLFRAME_RA(sp) -#if defined(__ABICALLS__) -#if defined(__mips_o32) || defined(__mips_o64) - SAVE_GP(CALLFRAME_GP) -#else - SETUP_GP64(CALLFRAME_GP, _init) -#endif -#else /* __ABICALLS__ */ -#if defined(__mips_n32) || defined(__mips_n64) - REG_S gp, CALLFRAME_GP(sp) -#endif -#endif - .set reorder - - .section .fini,"ax",%progbits - .align 4 - .globl _fini - .type _fini,%function -_fini: - .set noreorder -#if defined(__ABICALLS__) && (defined(__mips_o32) || defined(__mips_o64)) - SETUP_GP -#endif - PTR_ADDU sp, sp, -CALLFRAME_SIZ - REG_S ra, CALLFRAME_RA(sp) -#if defined(__ABICALLS__) -#if defined(__mips_o32) || defined(__mips_o64) - SAVE_GP(CALLFRAME_GP) -#else - SETUP_GP64(CALLFRAME_GP, _fini) -#endif -#else /* __ABICALLS__ */ -#if defined(__mips_n32) || defined(__mips_n64) - REG_S gp, CALLFRAME_GP(sp) -#endif -#endif - .set reorder diff --git a/lib/csu/mips/crtn.S b/lib/csu/mips/crtn.S deleted file mode 100644 index d17d30f5ff8..00000000000 --- a/lib/csu/mips/crtn.S +++ /dev/null @@ -1,23 +0,0 @@ -#include -#ifndef __clang__ - .gnu_attribute 4, 0 -#endif - .section .init,"ax",%progbits - .set noreorder -#if defined(__ABICALLS__) && (defined(__mips_n32) || defined(__mips_n64)) - REG_L gp, CALLFRAME_GP(sp) -#endif - REG_L ra, CALLFRAME_RA(sp) - jr ra - PTR_ADDU sp, sp, CALLFRAME_SIZ - .set reorder - - .section .fini,"ax",%progbits - .set noreorder -#if defined(__ABICALLS__) && (defined(__mips_n32) || defined(__mips_n64)) - REG_L gp, CALLFRAME_GP(sp) -#endif - REG_L ra, CALLFRAME_RA(sp) - jr ra - PTR_ADDU sp, sp, CALLFRAME_SIZ - .set reorder diff --git a/lib/csu/powerpc/Makefile b/lib/csu/powerpc/Makefile deleted file mode 100644 index da16ddf6ea0..00000000000 --- a/lib/csu/powerpc/Makefile +++ /dev/null @@ -1,7 +0,0 @@ - -.PATH: ${.CURDIR:H}/common - -OBJS+= crtsavres.o -CFLAGS+= -DCRT_IRELOC_SUPPRESS - -.include diff --git a/lib/csu/powerpc/Makefile.depend b/lib/csu/powerpc/Makefile.depend deleted file mode 100644 index 993ab0638f4..00000000000 --- a/lib/csu/powerpc/Makefile.depend +++ /dev/null @@ -1,11 +0,0 @@ -# Autogenerated - do NOT edit! - -DIRDEPS = \ - include \ - - -.include - -.if ${DEP_RELDIR} == ${_DEP_RELDIR} -# local dependencies - needed for -jN in clean tree -.endif diff --git a/lib/csu/powerpc/crt.h b/lib/csu/powerpc/crt.h deleted file mode 100644 index fd589b9adf3..00000000000 --- a/lib/csu/powerpc/crt.h +++ /dev/null @@ -1,31 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-1-Clause - * - * Copyright 2018 Andrew Turner - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _CRT_H_ -#define _CRT_H_ - -#define HAVE_CTORS -#define CTORS_CONSTRUCTORS -#define INIT_CALL_SEQ(func) "bl " __STRING(func) "; nop" - -#endif diff --git a/lib/csu/powerpc/crt1_c.c b/lib/csu/powerpc/crt1_c.c deleted file mode 100644 index ff6a4e021f4..00000000000 --- a/lib/csu/powerpc/crt1_c.c +++ /dev/null @@ -1,107 +0,0 @@ -/* LINTLIBRARY */ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright 2001 David E. O'Brien. - * All rights reserved. - * Copyright 1996-1998 John D. Polstra. - * All rights reserved. - * Copyright (c) 1997 Jason R. Thorpe. - * Copyright (c) 1995 Christopher G. Demetriou - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the - * FreeBSD Project. See https://www.freebsd.org/ for - * information about FreeBSD. - * This product includes software developed for the - * NetBSD Project. See http://www.netbsd.org/ for - * information about NetBSD. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include - -#include "libc_private.h" -#include "ignore_init.c" - -struct Struct_Obj_Entry; -struct ps_strings; - -#ifdef GCRT -extern void _mcleanup(void); -extern void monstartup(void *, void *); -extern int eprol; -extern int etext; -#endif - -struct ps_strings *__ps_strings; - -void _start(int, char **, char **, const struct Struct_Obj_Entry *, - void (*)(void), struct ps_strings *); - -/* The entry function. */ -/* - * First 5 arguments are specified by the PowerPC SVR4 ABI. - * The last argument, ps_strings, is a BSD extension. - */ -/* ARGSUSED */ -void -_start(int argc, char **argv, char **env, - const struct Struct_Obj_Entry *obj __unused, void (*cleanup)(void), - struct ps_strings *ps_strings) -{ - - - handle_argv(argc, argv, env); - - if (ps_strings != (struct ps_strings *)0) - __ps_strings = ps_strings; - - if (&_DYNAMIC != NULL) - atexit(cleanup); - else - _init_tls(); - -#ifdef GCRT - atexit(_mcleanup); - monstartup(&eprol, &etext); -#endif - - handle_static_init(argc, argv, env); - exit(main(argc, argv, env)); -} - -#ifdef GCRT -__asm__(".text"); -__asm__("eprol:"); -__asm__(".previous"); -#endif - -#ifndef PIC -__asm__(".text\n" - "\t.global _GLOBAL_OFFSET_TABLE_\n" - "\t.reloc 0, R_PPC_NONE, _GLOBAL_OFFSET_TABLE_"); -#endif diff --git a/lib/csu/powerpc/crti.S b/lib/csu/powerpc/crti.S deleted file mode 100644 index 25d0df585bb..00000000000 --- a/lib/csu/powerpc/crti.S +++ /dev/null @@ -1,49 +0,0 @@ -/*- - * Copyright 2001 David E. O'Brien - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include - .section .init,"ax",@progbits - .align 2 - .globl _init - .type _init,@function -_init: - stwu 1,-16(1) - mflr 0 - stw 31,12(1) - stw 0,20(1) - mr 31,1 - - - .section .fini,"ax",@progbits - .align 2 - .globl _fini -_fini: - stwu 1,-16(1) - mflr 0 - stw 31,12(1) - stw 0,20(1) - mr 31,1 - - .section .note.GNU-stack,"",%progbits diff --git a/lib/csu/powerpc/crtn.S b/lib/csu/powerpc/crtn.S deleted file mode 100644 index 026cf4fe3e5..00000000000 --- a/lib/csu/powerpc/crtn.S +++ /dev/null @@ -1,44 +0,0 @@ -/*- - * Copyright 2001 David E. O'Brien - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include - .section .init,"ax",@progbits - lwz 11,0(1) - lwz 0,4(11) - mtlr 0 - lwz 31,-4(11) - mr 1,11 - blr - - - .section .fini,"ax",@progbits - lwz 11,0(1) - lwz 0,4(11) - mtlr 0 - lwz 31,-4(11) - mr 1,11 - blr - - .section .note.GNU-stack,"",%progbits diff --git a/lib/csu/powerpc/crtsavres.S b/lib/csu/powerpc/crtsavres.S deleted file mode 100644 index 95ac7171213..00000000000 --- a/lib/csu/powerpc/crtsavres.S +++ /dev/null @@ -1,189 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-1-Clause - * - * Copyright 2019 Justin Hibbits - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -.text - -/* - * The PowerPC ABI spec requires the following save/restore functions to be - * provided: - * - * _savefpr_N - * _restfpr_N - * _restfpr_N_x - * _savegpr_N - * _restgpr_N - * _restgpr_N_x - * - * With N ranging from 14 to 31, to save the nonvolatile registers. - */ - -#define _CRTENTRY(name) \ - .text; \ - .globl name; \ - .type name,@function; \ - name: - -#define SAVEFPR(r) _CRTENTRY(__CONCAT(_savefpr_,r)) \ - stfd r,(-256 + r * 8)(11) - -SAVEFPR(14) -SAVEFPR(15) -SAVEFPR(16) -SAVEFPR(17) -SAVEFPR(18) -SAVEFPR(19) -SAVEFPR(20) -SAVEFPR(21) -SAVEFPR(22) -SAVEFPR(23) -SAVEFPR(24) -SAVEFPR(25) -SAVEFPR(26) -SAVEFPR(27) -SAVEFPR(28) -SAVEFPR(29) -SAVEFPR(30) -SAVEFPR(31) - blr - -#define RESTFPR(r) _CRTENTRY(__CONCAT(_restfpr_,r)) \ - lfd r,(-256 + r * 8)(11) - -RESTFPR(14) -RESTFPR(15) -RESTFPR(16) -RESTFPR(17) -RESTFPR(18) -RESTFPR(19) -RESTFPR(20) -RESTFPR(21) -RESTFPR(22) -RESTFPR(23) -RESTFPR(24) -RESTFPR(25) -RESTFPR(26) -RESTFPR(27) -RESTFPR(28) -RESTFPR(29) -RESTFPR(30) -RESTFPR(31) - blr - -#define SAVEGPR(r) _CRTENTRY(__CONCAT(_savegpr_,r)) \ - stw r,(-128 + r * 4)(11) - -SAVEGPR(14) -SAVEGPR(15) -SAVEGPR(16) -SAVEGPR(17) -SAVEGPR(18) -SAVEGPR(19) -SAVEGPR(20) -SAVEGPR(21) -SAVEGPR(22) -SAVEGPR(23) -SAVEGPR(24) -SAVEGPR(25) -SAVEGPR(26) -SAVEGPR(27) -SAVEGPR(28) -SAVEGPR(29) -SAVEGPR(30) -SAVEGPR(31) - blr - -#define RESTGPR(r) _CRTENTRY(__CONCAT(_restgpr_,r)) \ - lwz r,(-128 + r*4)(11) - -RESTGPR(14) -RESTGPR(15) -RESTGPR(16) -RESTGPR(17) -RESTGPR(18) -RESTGPR(19) -RESTGPR(20) -RESTGPR(21) -RESTGPR(22) -RESTGPR(23) -RESTGPR(24) -RESTGPR(25) -RESTGPR(26) -RESTGPR(27) -RESTGPR(28) -RESTGPR(29) -RESTGPR(30) -RESTGPR(31) - blr - -#define RESTFPR_X(r) _CRTENTRY(__CONCAT(__CONCAT(_restfpr_,r),_x)) \ - lfd r,(-256 + r * 8)(11) - -RESTFPR_X(14) -RESTFPR_X(15) -RESTFPR_X(16) -RESTFPR_X(17) -RESTFPR_X(18) -RESTFPR_X(19) -RESTFPR_X(20) -RESTFPR_X(21) -RESTFPR_X(22) -RESTFPR_X(23) -RESTFPR_X(24) -RESTFPR_X(25) -RESTFPR_X(26) -RESTFPR_X(27) -RESTFPR_X(28) -RESTFPR_X(29) -RESTFPR_X(30) -RESTFPR_X(31) - lwz 0,4(11) - mtlr 0 - mr 1,11 - blr - -#define RESTGPR_X(r) _CRTENTRY(__CONCAT(__CONCAT(_restgpr_,r),_x)) \ - lwz r,(-128 + r * 4)(11) - -RESTGPR_X(14) -RESTGPR_X(15) -RESTGPR_X(16) -RESTGPR_X(17) -RESTGPR_X(18) -RESTGPR_X(19) -RESTGPR_X(20) -RESTGPR_X(21) -RESTGPR_X(22) -RESTGPR_X(23) -RESTGPR_X(24) -RESTGPR_X(25) -RESTGPR_X(26) -RESTGPR_X(27) -RESTGPR_X(28) -RESTGPR_X(29) -RESTGPR_X(30) -RESTGPR_X(31) - lwz 0,4(11) - mtlr 0 - mr 1,11 - blr diff --git a/lib/csu/powerpc64/Makefile b/lib/csu/powerpc64/Makefile deleted file mode 100644 index 86841fd0314..00000000000 --- a/lib/csu/powerpc64/Makefile +++ /dev/null @@ -1,14 +0,0 @@ - -.PATH: ${.CURDIR:H}/common - -OBJS+= crtsavres.o -CFLAGS+= -I${.CURDIR} \ - -mlongcall -DCRT_IRELOC_RELA - -CLEANFILES+= crtsavres.S - -# On powerpc64 crtsavres is an empty file -crtsavres.S: - touch ${.TARGET} - -.include diff --git a/lib/csu/powerpc64/Makefile.depend b/lib/csu/powerpc64/Makefile.depend deleted file mode 100644 index 993ab0638f4..00000000000 --- a/lib/csu/powerpc64/Makefile.depend +++ /dev/null @@ -1,11 +0,0 @@ -# Autogenerated - do NOT edit! - -DIRDEPS = \ - include \ - - -.include - -.if ${DEP_RELDIR} == ${_DEP_RELDIR} -# local dependencies - needed for -jN in clean tree -.endif diff --git a/lib/csu/powerpc64/crt.h b/lib/csu/powerpc64/crt.h deleted file mode 100644 index fd589b9adf3..00000000000 --- a/lib/csu/powerpc64/crt.h +++ /dev/null @@ -1,31 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-1-Clause - * - * Copyright 2018 Andrew Turner - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _CRT_H_ -#define _CRT_H_ - -#define HAVE_CTORS -#define CTORS_CONSTRUCTORS -#define INIT_CALL_SEQ(func) "bl " __STRING(func) "; nop" - -#endif diff --git a/lib/csu/powerpc64/crt1_c.c b/lib/csu/powerpc64/crt1_c.c deleted file mode 100644 index 429cda8885a..00000000000 --- a/lib/csu/powerpc64/crt1_c.c +++ /dev/null @@ -1,132 +0,0 @@ -/* LINTLIBRARY */ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright 2001 David E. O'Brien. - * All rights reserved. - * Copyright 1996-1998 John D. Polstra. - * All rights reserved. - * Copyright (c) 1997 Jason R. Thorpe. - * Copyright (c) 1995 Christopher G. Demetriou - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the - * FreeBSD Project. See https://www.freebsd.org/ for - * information about FreeBSD. - * This product includes software developed for the - * NetBSD Project. See http://www.netbsd.org/ for - * information about NetBSD. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include - -static uint32_t cpu_features; -static uint32_t cpu_features2; - -#include "libc_private.h" -#include "ignore_init.c" - -struct Struct_Obj_Entry; -struct ps_strings; - -extern void _start(int, char **, char **, const struct Struct_Obj_Entry *, - void (*)(void), struct ps_strings *); - -#ifdef GCRT -extern void _mcleanup(void); -extern void monstartup(void *, void *); -extern int eprol; -extern int etext; -#endif - -struct ps_strings *__ps_strings; - -static void -init_cpu_features(char **env) -{ - const Elf_Auxinfo *aux; - - /* Find the auxiliary vector on the stack. */ - while (*env++ != 0) /* Skip over environment, and NULL terminator */ - ; - aux = (const Elf_Auxinfo *)env; - - /* Digest the auxiliary vector. */ - for (; aux->a_type != AT_NULL; aux++) { - switch (aux->a_type) { - case AT_HWCAP: - cpu_features = (uint32_t)aux->a_un.a_val; - break; - case AT_HWCAP2: - cpu_features2 = (uint32_t)aux->a_un.a_val; - break; - } - } -} - - -/* The entry function. */ -/* - * First 5 arguments are specified by the PowerPC SVR4 ABI. - * The last argument, ps_strings, is a BSD extension. - */ -/* ARGSUSED */ -void -_start(int argc, char **argv, char **env, - const struct Struct_Obj_Entry *obj __unused, void (*cleanup)(void), - struct ps_strings *ps_strings) -{ - - handle_argv(argc, argv, env); - - if (ps_strings != (struct ps_strings *)0) - __ps_strings = ps_strings; - - if (&_DYNAMIC != NULL) - atexit(cleanup); - else { - init_cpu_features(env); - process_irelocs(); - _init_tls(); - } - -#ifdef GCRT - atexit(_mcleanup); - monstartup(&eprol, &etext); -#endif - - handle_static_init(argc, argv, env); - exit(main(argc, argv, env)); -} - -#ifdef GCRT -__asm__(".text"); -__asm__("eprol:"); -__asm__(".previous"); -#endif diff --git a/lib/csu/powerpc64/crti.S b/lib/csu/powerpc64/crti.S deleted file mode 100644 index 33e9ca4f42a..00000000000 --- a/lib/csu/powerpc64/crti.S +++ /dev/null @@ -1,84 +0,0 @@ -/*- - * Copyright 2001 David E. O'Brien - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#ifdef _CALL_ELF -.abiversion _CALL_ELF -#endif - - .section .init,"ax",@progbits - .p2align 2 - .globl _init -#if !defined(_CALL_ELF) || _CALL_ELF == 1 - .section ".opd","aw" - .p2align 3 -_init: - .quad .L._init,.TOC.@tocbase,0 - .previous - .type _init,@function - - .p2align 4 -.L._init: -#else - .p2align 4 - .globl _init - .type _init,@function -_init: - addis %r2, %r12, (.TOC.-_init)@ha - addi %r2, %r2, (.TOC.-_init)@l - .localentry _init, .-_init -#endif - stdu 1,-48(1) - mflr 0 - std 0,64(1) - -/* Fini */ - .section .fini,"ax",@progbits - .p2align 2 - .globl _fini -#if !defined(_CALL_ELF) || _CALL_ELF == 1 - .section ".opd","aw" - .p2align 3 -_fini: - .quad .L._fini,.TOC.@tocbase,0 - .previous - .type _fini,@function - - .p2align 4 -.L._fini: -#else - .p2align 4 - .globl _fini - .type _fini,@function -_fini: - addis %r2, %r12, (.TOC.-_fini)@ha - addi %r2, %r2, (.TOC.-_fini)@l - .localentry _fini, .-_fini -#endif - stdu 1,-48(1) - mflr 0 - std 0,64(1) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/csu/powerpc64/crtn.S b/lib/csu/powerpc64/crtn.S deleted file mode 100644 index a7619f3fbf6..00000000000 --- a/lib/csu/powerpc64/crtn.S +++ /dev/null @@ -1,40 +0,0 @@ -/*- - * Copyright 2001 David E. O'Brien - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include - .section .init,"ax",@progbits - ld %r1,0(%r1) - ld 0,16(%r1) - mtlr 0 - blr - - - .section .fini,"ax",@progbits - ld %r1,0(%r1) - ld 0,16(%r1) - mtlr 0 - blr - - .section .note.GNU-stack,"",%progbits diff --git a/lib/csu/powerpc64/reloc.c b/lib/csu/powerpc64/reloc.c deleted file mode 100644 index ae50c5af5aa..00000000000 --- a/lib/csu/powerpc64/reloc.c +++ /dev/null @@ -1,41 +0,0 @@ -/*- - * Copyright (c) 2019 Leandro Lupori - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -static void -crt1_handle_rela(const Elf_Rela *r) -{ - typedef Elf_Addr (*ifunc_resolver_t)( - uint32_t, uint32_t, uint64_t, uint64_t, - uint64_t, uint64_t, uint64_t, uint64_t); - Elf_Addr *ptr, *where, target; - - switch (ELF_R_TYPE(r->r_info)) { - case R_PPC_IRELATIVE: - ptr = (Elf_Addr *)r->r_addend; - where = (Elf_Addr *)r->r_offset; - target = ((ifunc_resolver_t)ptr)(cpu_features, cpu_features2, - 0, 0, 0, 0, 0, 0); - *where = target; - break; - } -} diff --git a/lib/libarchive/Makefile b/lib/libarchive/Makefile index fed73c38831..9cccd4eed14 100644 --- a/lib/libarchive/Makefile +++ b/lib/libarchive/Makefile @@ -13,7 +13,7 @@ CFLAGS+= -I${.OBJDIR} CFLAGS+= -I${SRCTOP}/sys/contrib/zstd/lib .include "Makefile.inc" -.if ${MACHINE_ARCH:Marm*} != "" || ${MACHINE_ARCH:Mpowerpc*} != "" +.if ${MACHINE_ARCH:Marm*} != "" NO_WCAST_ALIGN= yes .if ${MACHINE_ARCH:M*64*} == "" CFLAGS+= -DPPMD_32BIT diff --git a/lib/libc/Makefile b/lib/libc/Makefile index 1bd135ea0b6..36850801f33 100644 --- a/lib/libc/Makefile +++ b/lib/libc/Makefile @@ -14,8 +14,8 @@ LIBC_SRCTOP?= ${.CURDIR} # named MACHINE_CPUARCH, but some ABIs are different enough to require # their own libc, so allow a directory named MACHINE_ARCH to override this. -.if exists(${LIBC_SRCTOP}/${MACHINE_ARCH:S/powerpc64le/powerpc64/}) -LIBC_ARCH=${MACHINE_ARCH:S/powerpc64le/powerpc64/} +.if exists(${LIBC_SRCTOP}/${MACHINE_ARCH}) +LIBC_ARCH=${MACHINE_ARCH} .else LIBC_ARCH=${MACHINE_CPUARCH} .endif @@ -31,7 +31,7 @@ CFLAGS+=-DNO__SCCSID -DNO__RCSID LIB=c SHLIB_MAJOR= 7 .if ${MK_SSP} != "no" && \ - (${LIBC_ARCH} == "i386" || ${LIBC_ARCH:Mpowerpc*} != "") + ${LIBC_ARCH} == "i386" SHLIB_LDSCRIPT=libc.ldscript .else SHLIB_LDSCRIPT=libc_nossp.ldscript @@ -64,7 +64,7 @@ LDFLAGS+= -nodefaultlibs LIBADD+= compiler_rt .if ${MK_SSP} != "no" && \ - (${LIBC_ARCH} == "i386" || ${LIBC_ARCH:Mpowerpc*} != "") + ${LIBC_ARCH} == "i386" LIBADD+= ssp_nonshared .endif @@ -72,8 +72,8 @@ LIBADD+= ssp_nonshared LIBC_NONSHARED_SRCS= RTLD_ELF_DIR=${SRCTOP}/libexec/rtld-elf -.if exists(${RTLD_ELF_DIR}/${MACHINE_ARCH:S/powerpc64le/powerpc64/}) -RTLD_ARCH= ${MACHINE_ARCH:S/powerpc64le/powerpc64/} +.if exists(${RTLD_ELF_DIR}/${MACHINE_ARCH}) +RTLD_ARCH= ${MACHINE_ARCH} .else RTLD_ARCH= ${MACHINE_CPUARCH} .endif @@ -108,10 +108,7 @@ NOASM= .include "${LIBC_SRCTOP}/posix1e/Makefile.inc" .if ${LIBC_ARCH} != "aarch64" && \ ${LIBC_ARCH} != "amd64" && \ - ${LIBC_ARCH} != "powerpc64" && \ - ${LIBC_ARCH} != "riscv" && \ - ${MACHINE_ARCH:Mmipsn32*} == "" && \ - ${MACHINE_ARCH:Mmips64*} == "" + ${LIBC_ARCH} != "riscv" .include "${LIBC_SRCTOP}/quad/Makefile.inc" .endif .include "${LIBC_SRCTOP}/regex/Makefile.inc" @@ -128,7 +125,6 @@ NOASM= .include "${LIBC_SRCTOP}/xdr/Makefile.inc" .if (${LIBC_ARCH} == "arm" && \ (${MACHINE_ARCH:Marmv[67]*} == "" || (defined(CPUTYPE) && ${CPUTYPE:M*soft*}))) || \ - (${LIBC_ARCH} == "mips" && ${MACHINE_ARCH:Mmips*hf} == "") || \ (${LIBC_ARCH} == "riscv" && ${MACHINE_ARCH:Mriscv*sf} != "") .include "${LIBC_SRCTOP}/softfloat/Makefile.inc" .endif diff --git a/lib/libc/csu/mips/Makefile.inc b/lib/libc/csu/mips/Makefile.inc deleted file mode 100644 index ddead75f874..00000000000 --- a/lib/libc/csu/mips/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ -# - -CFLAGS+= -DCRT_IRELOC_SUPPRESS diff --git a/lib/libc/csu/powerpc/Makefile.inc b/lib/libc/csu/powerpc/Makefile.inc deleted file mode 100644 index ddead75f874..00000000000 --- a/lib/libc/csu/powerpc/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ -# - -CFLAGS+= -DCRT_IRELOC_SUPPRESS diff --git a/lib/libc/csu/powerpc64/Makefile.inc b/lib/libc/csu/powerpc64/Makefile.inc deleted file mode 100644 index 6c315c5e262..00000000000 --- a/lib/libc/csu/powerpc64/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ -# - -CFLAGS+= -DCRT_IRELOC_RELA diff --git a/lib/libc/csu/powerpc64/reloc.c b/lib/libc/csu/powerpc64/reloc.c deleted file mode 100644 index 5caf5ff28e4..00000000000 --- a/lib/libc/csu/powerpc64/reloc.c +++ /dev/null @@ -1,60 +0,0 @@ -/*- - * Copyright (c) 2019 Leandro Lupori - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -static uint32_t cpu_features; -static uint32_t cpu_features2; - -static void -ifunc_init(const Elf_Auxinfo *aux) -{ - /* Digest the auxiliary vector. */ - for (; aux->a_type != AT_NULL; aux++) { - switch (aux->a_type) { - case AT_HWCAP: - cpu_features = (uint32_t)aux->a_un.a_val; - break; - case AT_HWCAP2: - cpu_features2 = (uint32_t)aux->a_un.a_val; - break; - } - } -} - -static void -crt1_handle_rela(const Elf_Rela *r) -{ - typedef Elf_Addr (*ifunc_resolver_t)( - uint32_t, uint32_t, uint64_t, uint64_t, - uint64_t, uint64_t, uint64_t, uint64_t); - Elf_Addr *ptr, *where, target; - - switch (ELF_R_TYPE(r->r_info)) { - case R_PPC_IRELATIVE: - ptr = (Elf_Addr *)r->r_addend; - where = (Elf_Addr *)r->r_offset; - target = ((ifunc_resolver_t)ptr)(cpu_features, cpu_features2, - 0, 0, 0, 0, 0, 0); - *where = target; - break; - } -} diff --git a/lib/libc/csu/powerpcspe/Makefile.inc b/lib/libc/csu/powerpcspe/Makefile.inc deleted file mode 100644 index ddead75f874..00000000000 --- a/lib/libc/csu/powerpcspe/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ -# - -CFLAGS+= -DCRT_IRELOC_SUPPRESS diff --git a/lib/libc/gen/auxv.c b/lib/libc/gen/auxv.c index 1b0d886030b..4065e3fc257 100644 --- a/lib/libc/gen/auxv.c +++ b/lib/libc/gen/auxv.c @@ -72,11 +72,6 @@ static u_long hwcap, hwcap2; static void *fxrng_seed_version; static u_long usrstackbase, usrstacklim; -#ifdef __powerpc__ -static int powerpc_new_auxv_format = 0; -static void _init_aux_powerpc_fixup(void); -int _powerpc_elf_aux_info(int, void *, int); -#endif static void init_aux(void) @@ -150,107 +145,11 @@ init_aux(void) case AT_USRSTACKLIM: usrstacklim = aux->a_un.a_val; break; -#ifdef __powerpc__ - /* - * Since AT_STACKPROT is always set, and the common - * value 23 is mutually exclusive with the legacy powerpc - * value 21, the existence of AT_STACKPROT proves we are - * on the common format. - */ - case AT_STACKPROT: /* 23 */ - powerpc_new_auxv_format = 1; - break; -#endif } } -#ifdef __powerpc__ - if (!powerpc_new_auxv_format) - _init_aux_powerpc_fixup(); -#endif } -#ifdef __powerpc__ -static void -_init_aux_powerpc_fixup(void) -{ - Elf_Auxinfo *aux; - - /* - * Before 1300070, PowerPC platforms had nonstandard numbering for - * the aux vector. When running old binaries, the kernel will pass - * the vector using the old numbering. Reload affected variables. - */ - for (aux = __elf_aux_vector; aux->a_type != AT_NULL; aux++) { - switch (aux->a_type) { - case AT_OLD_CANARY: - canary = (char *)(aux->a_un.a_ptr); - break; - case AT_OLD_CANARYLEN: - canary_len = aux->a_un.a_val; - break; - case AT_OLD_EXECPATH: - execpath = (char *)(aux->a_un.a_ptr); - break; - case AT_OLD_PAGESIZES: - pagesizes = (char *)(aux->a_un.a_ptr); - break; - case AT_OLD_PAGESIZESLEN: - pagesizes_len = aux->a_un.a_val; - break; - case AT_OLD_OSRELDATE: - osreldate = aux->a_un.a_val; - break; - case AT_OLD_NCPUS: - ncpus = aux->a_un.a_val; - break; - } - } -} - -int -_powerpc_elf_aux_info(int aux, void *buf, int buflen) -{ - - /* - * If we are in the old auxv format, we need to translate the aux - * parameter of elf_aux_info() calls into the common auxv format. - * Internal libc calls always use the common format, and they - * directly call _elf_aux_info instead of using the weak symbol. - */ - if (!powerpc_new_auxv_format) { - switch (aux) { - case AT_OLD_EXECPATH: - aux = AT_EXECPATH; - break; - case AT_OLD_CANARY: - aux = AT_CANARY; - break; - case AT_OLD_CANARYLEN: - aux = AT_CANARYLEN; - break; - case AT_OLD_OSRELDATE: - aux = AT_OSRELDATE; - break; - case AT_OLD_NCPUS: - aux = AT_NCPUS; - break; - case AT_OLD_PAGESIZES: - aux = AT_PAGESIZES; - break; - case AT_OLD_PAGESIZESLEN: - aux = AT_PAGESIZESLEN; - break; - case AT_OLD_STACKPROT: - aux = AT_STACKPROT; - break; - } - } - return _elf_aux_info(aux, buf, buflen); -} -__weak_reference(_powerpc_elf_aux_info, elf_aux_info); -#else __weak_reference(_elf_aux_info, elf_aux_info); -#endif int _elf_aux_info(int aux, void *buf, int buflen) diff --git a/lib/libc/gen/elf_utils.c b/lib/libc/gen/elf_utils.c index 5b87e012d0e..f0731fd71e9 100644 --- a/lib/libc/gen/elf_utils.c +++ b/lib/libc/gen/elf_utils.c @@ -51,17 +51,9 @@ __elf_phdr_match_addr(struct dl_phdr_info *phdr_info, void *addr) if (ph->p_type != PT_LOAD) continue; - /* ELFv1 ABI for powerpc64 passes function descriptor - * pointers around, not function pointers. The function - * descriptors live in .opd, which is a non-executable segment. - * The PF_X check would therefore make all address checks fail, - * causing a crash in some instances. Don't skip over - * non-executable segments in the ELFv1 powerpc64 case. - */ -#if !defined(__powerpc64__) || (defined(_CALL_ELF) && _CALL_ELF == 2) if ((ph->p_flags & PF_X) == 0) continue; -#endif + if (phdr_info->dlpi_addr + ph->p_vaddr <= (uintptr_t)addr && (uintptr_t)addr < phdr_info->dlpi_addr + diff --git a/lib/libc/gen/tls.c b/lib/libc/gen/tls.c index a6a1d6a2fed..b91d89be7ef 100644 --- a/lib/libc/gen/tls.c +++ b/lib/libc/gen/tls.c @@ -146,7 +146,7 @@ libc_free_aligned(void *ptr) * Note: for Local Exec TLS Model, the offsets from TP (TCB in this case) to * TLS variables are computed by linker, so we cannot overalign TLS section. * - * - MIPS, PowerPC and RISC-V use modified version of variant I, + * - RISC-V uses modified version of variant I, * described in [3] where TP points (with bias) to TLS and TCB immediately * precedes TLS without any alignment gap[4]. Only TLS should be aligned. * The TCB[0] points to DTV vector and DTV values are biased by constant diff --git a/lib/libc/mips/Makefile.inc b/lib/libc/mips/Makefile.inc deleted file mode 100644 index 2cac48d3f81..00000000000 --- a/lib/libc/mips/Makefile.inc +++ /dev/null @@ -1,4 +0,0 @@ -# $NetBSD: Makefile.inc,v 1.7 2005/09/17 11:49:39 tsutsui Exp $ - -SRCS+= machdep_ldisd.c -SYM_MAPS+= ${LIBC_SRCTOP}/mips/Symbol.map diff --git a/lib/libc/mips/SYS.h b/lib/libc/mips/SYS.h deleted file mode 100644 index 2fbbfe0737e..00000000000 --- a/lib/libc/mips/SYS.h +++ /dev/null @@ -1,152 +0,0 @@ -/* $NetBSD: SYS.h,v 1.19 2009/12/14 01:07:41 matt Exp $ */ - -/*- - * SPDX-License-Identifier: (BSD-4-Clause AND BSD-3-Clause) - * - * Copyright (c) 1996 Jonathan Stone - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Jonathan Stone for - * the NetBSD Project. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/*- - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)SYS.h 8.1 (Berkeley) 6/4/93 - */ - -#include - -#include - -/* - * If compiling for shared libs, Emit sysV ABI PIC segment pseudo-ops. - * - * i) Emit .abicalls before .LEAF entrypoint, and .cpload/.cprestore after. - * ii) Do interprocedure jumps indirectly via t9, with the side-effect of - * preserving the callee's entry address in t9. - */ -#ifdef __ABICALLS__ - .abicalls -# if defined(__mips_o32) || defined(__mips_o64) -# define PIC_PROLOGUE(x) SETUP_GP -# define PIC_TAILCALL(l) PTR_LA t9, _C_LABEL(l); jr t9 -# define PIC_RETURN() j ra -# else -# define PIC_PROLOGUE(x) SETUP_GP64(t3, x) -# define PIC_TAILCALL(l) PTR_LA t9, _C_LABEL(l); RESTORE_GP64; jr t9 -# define PIC_RETURN() RESTORE_GP64; j ra -# endif -#else -# define PIC_PROLOGUE(x) -# define PIC_TAILCALL(l) j _C_LABEL(l) -# define PIC_RETURN() j ra -#endif /* __ABICALLS__ */ - -# define SYSTRAP(x) li v0,SYS_ ## x; syscall; - -/* - * Do a syscall that cannot fail (sync, get{p,u,g,eu,eg)id) - */ -#define RSYSCALL_NOERROR(x) \ -LEAF(__sys_ ## x); \ - .weak _C_LABEL(x); \ - _C_LABEL(x) = _C_LABEL(__CONCAT(__sys_,x)); \ - .weak _C_LABEL(__CONCAT(_,x)); \ - _C_LABEL(__CONCAT(_,x)) = _C_LABEL(__CONCAT(__sys_,x)); \ - SYSTRAP(x); \ - j ra; \ -END(__sys_ ## x) - -/* - * Do a normal syscall. - */ -#define RSYSCALL(x) \ -LEAF(__sys_ ## x); \ - .weak _C_LABEL(x); \ - _C_LABEL(x) = _C_LABEL(__CONCAT(__sys_,x)); \ - .weak _C_LABEL(__CONCAT(_,x)); \ - _C_LABEL(__CONCAT(_,x)) = _C_LABEL(__CONCAT(__sys_,x)); \ - PIC_PROLOGUE(__sys_ ## x); \ - SYSTRAP(x); \ - bne a3,zero,err; \ - PIC_RETURN(); \ -err: \ - PIC_TAILCALL(__cerror); \ -END(__sys_ ## x) - -/* - * Do a renamed or pseudo syscall (e.g., _exit()), where the entrypoint - * and syscall name are not the same. - */ -#define PSEUDO_NOERROR(x) \ -LEAF(__sys_ ## x); \ - .weak _C_LABEL(__CONCAT(_,x)); \ - _C_LABEL(__CONCAT(_,x)) = _C_LABEL(__CONCAT(__sys_,x)); \ - SYSTRAP(x); \ - j ra; \ -END(__sys_ ## x) - -#define PSEUDO(x) \ -LEAF(__sys_ ## x); \ - .weak _C_LABEL(__CONCAT(_,x)); \ - _C_LABEL(__CONCAT(_,x)) = _C_LABEL(__CONCAT(__sys_,x)); \ - PIC_PROLOGUE(__sys_ ## x); \ - SYSTRAP(x); \ - bne a3,zero,err; \ - PIC_RETURN(); \ -err: \ - PIC_TAILCALL(__cerror); \ -END(__sys_ ## x) diff --git a/lib/libc/mips/Symbol.map b/lib/libc/mips/Symbol.map deleted file mode 100644 index cfe0b0f1da6..00000000000 --- a/lib/libc/mips/Symbol.map +++ /dev/null @@ -1,52 +0,0 @@ -/* - */ - -/* - * This only needs to contain symbols that are not listed in - * symbol maps from other parts of libc (i.e., not found in - * stdlib/Symbol.map, string/Symbol.map, sys/Symbol.map, ...). - */ -FBSD_1.0 { - /* PSEUDO syscalls */ - _exit; - - _mcount; - _setjmp; - _longjmp; - alloca; - fabs; - __infinity; - __nan; - makecontext; - setjmp; - longjmp; - sigsetjmp; - siglongjmp; - htonl; - htons; - ntohl; - ntohs; - vfork; - brk; - sbrk; -}; - -FBSD_1.3 { - __flt_rounds; -}; - -FBSDprivate_1.0 { - /* PSEUDO syscalls */ - _getlogin; - - _set_tp; - ___longjmp; - __makecontext; - __longjmp; - signalcontext; - _signalcontext; - __siglongjmp; - _vfork; - _brk; - _sbrk; -}; diff --git a/lib/libc/mips/_fpmath.h b/lib/libc/mips/_fpmath.h deleted file mode 100644 index 9d1d19ab857..00000000000 --- a/lib/libc/mips/_fpmath.h +++ /dev/null @@ -1,56 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2002, 2003 David Schultz - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -union IEEEl2bits { - long double e; - struct { -#ifndef __MIPSEB__ - unsigned int manl :32; - unsigned int manh :20; - unsigned int exp :11; - unsigned int sign :1; -#else - unsigned int sign :1; - unsigned int exp :11; - unsigned int manh :20; - unsigned int manl :32; -#endif - } bits; -}; - -#define LDBL_NBIT 0 -#define mask_nbit_l(u) ((void)0) -#define LDBL_IMPLICIT_NBIT - -#define LDBL_MANH_SIZE 20 -#define LDBL_MANL_SIZE 32 - -#define LDBL_TO_ARRAY32(u, a) do { \ - (a)[0] = (uint32_t)(u).bits.manl; \ - (a)[1] = (uint32_t)(u).bits.manh; \ -} while(0) diff --git a/lib/libc/mips/arith.h b/lib/libc/mips/arith.h deleted file mode 100644 index 157ab68a7a8..00000000000 --- a/lib/libc/mips/arith.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * MD header for contrib/gdtoa - */ - -/* - * NOTE: The definitions in this file must be correct or strtod(3) and - * floating point formats in printf(3) will break! The file can be - * generated by running contrib/gdtoa/arithchk.c on the target - * architecture. See contrib/gdtoa/gdtoaimp.h for details. - */ -#include - -#if BYTE_ORDER == BIG_ENDIAN -#define IEEE_MC68k -#define Arith_Kind_ASL 2 -#define Double_Align -#else -/* TODO: Generate these values on a LE machine */ -#define IEEE_8087 -#define Arith_Kind_ASL 1 -#define Long int -#define Intcast (int)(long) -#define Double_Align -#endif diff --git a/lib/libc/mips/gd_qnan.h b/lib/libc/mips/gd_qnan.h deleted file mode 100644 index 7dbdc85eac5..00000000000 --- a/lib/libc/mips/gd_qnan.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * MD header for contrib/gdtoa - * - * This file can be generated by compiling and running contrib/gdtoa/qnan.c - * on the target architecture after arith.h has been generated. - */ - - -#include - -#if BYTE_ORDER == BIG_ENDIAN -/* These values were gained on a running - * Octeon in Big Endian order. They were gotten - * by running ./qnan after arithchk was ran and - * got us the proper values for arith.h. - */ -#define f_QNAN 0x7f900000 -#define d_QNAN0 0x7ff80000 -#define d_QNAN1 0x0 -#define ld_QNAN0 0x7ff80000 -#define ld_QNAN1 0x0 -#define ld_QNAN2 0x0 -#define ld_QNAN3 0x0 -#define ldus_QNAN0 0x7ff8 -#define ldus_QNAN1 0x0 -#define ldus_QNAN2 0x0 -#define ldus_QNAN3 0x0 -#define ldus_QNAN4 0x0 -#else -/* FIX FIX, need to run this on a Little Endian - * machine and get the proper values, these here - * were stolen fromn i386/gd_qnan.h - */ -#define f_QNAN 0x7fc00000 -#define d_QNAN0 0x0 -#define d_QNAN1 0x7ff80000 -#define ld_QNAN0 0x0 -#define ld_QNAN1 0xc0000000 -#define ld_QNAN2 0x7fff -#define ld_QNAN3 0x0 -#define ldus_QNAN0 0x0 -#define ldus_QNAN1 0x0 -#define ldus_QNAN2 0x0 -#define ldus_QNAN3 0xc000 -#define ldus_QNAN4 0x7fff -#endif diff --git a/lib/libc/mips/gen/Makefile.inc b/lib/libc/mips/gen/Makefile.inc deleted file mode 100644 index cb74fadf59a..00000000000 --- a/lib/libc/mips/gen/Makefile.inc +++ /dev/null @@ -1,10 +0,0 @@ -# $NetBSD: Makefile.inc,v 1.27 2005/10/07 17:16:40 tsutsui Exp $ - -SRCS+= infinity.c fabs.c ldexp.c flt_rounds.c - -# SRCS+= flt_rounds.c fpgetmask.c fpgetround.c fpgetsticky.c fpsetmask.c \ -# fpsetround.c fpsetsticky.c - -SRCS+= _ctx_start.S _get_tp.c _set_tp.c _setjmp.S makecontext.c \ - setjmp.S signalcontext.c sigsetjmp.S \ - trivial-getcontextx.c diff --git a/lib/libc/mips/gen/_ctx_start.S b/lib/libc/mips/gen/_ctx_start.S deleted file mode 100644 index 9be537a8d1b..00000000000 --- a/lib/libc/mips/gen/_ctx_start.S +++ /dev/null @@ -1,53 +0,0 @@ -/*- - * Copyright (c) 2010 Juli Mallett. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -/* - * This requires makecontext() to setup a valid GP for locating - * _ctx_done rather than deriving GP from T9 on entry. Currently this - * uses the GP inherited from getcontext() assuming that getcontext() - * is in the same shared object as _ctx_done(). For N32 and N64, GP - * is caller-save so will be preserved across the call to the callback - * function. For O32, GP is callee-save, so save it in a different - * caller-save register (S1) while invoking the callback. This is - * done instead of the usual SETUP_GP/SAVE_GP to avoid disturbing the - * stack frame setup by makecontext() for the callback function. - */ -ENTRY(_ctx_start) -#ifdef __mips_o32 - move s1, gp -#endif - jalr t9 - -#ifdef __mips_o32 - move gp, s1 -#endif - move a0, s0 - PTR_LA t9, _ctx_done - jalr t9 - - break 0 -END(_ctx_start) diff --git a/lib/libc/mips/gen/_get_tp.c b/lib/libc/mips/gen/_get_tp.c deleted file mode 100644 index f0a1dc54f9c..00000000000 --- a/lib/libc/mips/gen/_get_tp.c +++ /dev/null @@ -1,101 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2021 The FreeBSD Foundation - * - * This software were developed by Konstantin Belousov - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include - -#include "libc_private.h" - -#ifdef __mips_n64 -static void * -_mips_get_tls(void) -{ - uint64_t _rv; - - __asm__ __volatile__ ( - ".set\tpush\n\t" - ".set\tmips64r2\n\t" - "rdhwr\t%0, $29\n\t" - ".set\tpop" - : "=r" (_rv)); - /* - * XXXSS See 'git show c6be4f4d2d1b71c04de5d3bbb6933ce2dbcdb317' - * - * Remove the offset since this really a request to get the TLS - * pointer via sysarch() (in theory). Of course, this may go away - * once the TLS code is rewritten. - */ - _rv = _rv - TLS_TP_OFFSET - TLS_TCB_SIZE; - - return (void *)_rv; -} - -#else /* mips 32 */ - -static void * -_mips_get_tls(void) -{ - uint32_t _rv; - - __asm__ __volatile__ ( - ".set\tpush\n\t" - ".set\tmips32r2\n\t" - "rdhwr\t%0, $29\n\t" - ".set\tpop" - : "=r" (_rv)); - /* - * XXXSS See 'git show c6be4f4d2d1b71c04de5d3bbb6933ce2dbcdb317' - * - * Remove the offset since this really a request to get the TLS - * pointer via sysarch() (in theory). Of course, this may go away - * once the TLS code is rewritten. - */ - _rv = _rv - TLS_TP_OFFSET - TLS_TCB_SIZE; - - return (void *)_rv; -} -#endif /* ! __mips_n64 */ - -void * -_get_tp(void) -{ - void *res; - -#ifdef TLS_USE_SYSARCH - sysarch(MIPS_GET_TLS, &res); -#else - res = _mips_get_tls(); -#endif - return (res); -} diff --git a/lib/libc/mips/gen/_set_tp.c b/lib/libc/mips/gen/_set_tp.c deleted file mode 100644 index 3997fedfb4c..00000000000 --- a/lib/libc/mips/gen/_set_tp.c +++ /dev/null @@ -1,40 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include - -#include -#include "libc_private.h" - -void -_set_tp(void *tp) -{ - - sysarch(MIPS_SET_TLS, tp); -} diff --git a/lib/libc/mips/gen/_setjmp.S b/lib/libc/mips/gen/_setjmp.S deleted file mode 100644 index 6361d2fe806..00000000000 --- a/lib/libc/mips/gen/_setjmp.S +++ /dev/null @@ -1,201 +0,0 @@ -/* $NetBSD: _setjmp.S,v 1.20.34.5 2010/02/03 23:46:47 matt Exp $ */ - -/*- - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "SYS.h" - -#if defined(LIBC_SCCS) && !defined(lint) -#if 0 - RCSID("from: @(#)_setjmp.s 8.1 (Berkeley) 6/4/93") -#else - RCSID("$NetBSD: _setjmp.S,v 1.20.34.5 2010/02/03 23:46:47 matt Exp $") -#endif -#endif /* LIBC_SCCS and not lint */ - -/* - * C library -- _setjmp, _longjmp - * - * _longjmp(a,v) - * will generate a "return(v)" from - * the last call to - * _setjmp(a) - * by restoring registers from the stack, - * The previous signal state is NOT restored. - */ - - .set noreorder - -LEAF(_setjmp) - REG_PROLOGUE - REG_LI v0, _JB_MAGIC__SETJMP # sigcontext magic number - REG_S v0, (_JB_MAGIC * SZREG)(a0) - REG_S ra, (_JB_REG_RA * SZREG)(a0) - /* - * From "MIPSpro N32 ABI Handbook", Table 2-1: - * Registers s0..s7 are callee-saved. - * The sp register is callee-saved. - * The fp (or s8) register is callee-saved. - * The gp register is callee-saved (for n32/n64). - */ - REG_S s0, (_JB_REG_S0 * SZREG)(a0) - REG_S s1, (_JB_REG_S1 * SZREG)(a0) - REG_S s2, (_JB_REG_S2 * SZREG)(a0) - REG_S s3, (_JB_REG_S3 * SZREG)(a0) - REG_S s4, (_JB_REG_S4 * SZREG)(a0) - REG_S s5, (_JB_REG_S5 * SZREG)(a0) - REG_S s6, (_JB_REG_S6 * SZREG)(a0) - REG_S s7, (_JB_REG_S7 * SZREG)(a0) - REG_S sp, (_JB_REG_SP * SZREG)(a0) - REG_S s8, (_JB_REG_S8 * SZREG)(a0) -#if defined(__mips_n32) || defined(__mips_n64) - REG_S gp, (_JB_REG_GP * SZREG)(a0) # newabi gp is callee-saved -#endif - /* - * From "MIPSpro N32 ABI Handbook", Table 2-1: - * In N32, FP registers F20, F22, F24, F26, F28, F30 are callee-saved. - * In N64, FP registers F24 .. F31 are callee-saved. - * In O32, FP registers F20 .. F23 are callee-saved. - */ -#ifndef __mips_soft_float - cfc1 v0, $31 # too bad can't check if FP used -#if defined(__mips_n64) || defined(__mips_n32) - FP_S $f30, (_JB_FPREG_F30 * SZREG)(a0) - FP_S $f28, (_JB_FPREG_F28 * SZREG)(a0) - FP_S $f26, (_JB_FPREG_F26 * SZREG)(a0) - FP_S $f24, (_JB_FPREG_F24 * SZREG)(a0) -#endif -#if defined(__mips_n32) || defined(__mips_o32) || defined(__mips_o64) - FP_S $f22, (_JB_FPREG_F22 * SZREG)(a0) - FP_S $f20, (_JB_FPREG_F20 * SZREG)(a0) -#endif -#if defined(__mips_o32) || defined(__mips_o64) - FP_S $f21, (_JB_FPREG_F21 * SZREG)(a0) - FP_S $f23, (_JB_FPREG_F23 * SZREG)(a0) -#endif -#if defined(__mips_n64) - FP_S $f25, (_JB_FPREG_F25 * SZREG)(a0) - FP_S $f27, (_JB_FPREG_F27 * SZREG)(a0) - FP_S $f29, (_JB_FPREG_F29 * SZREG)(a0) - FP_S $f31, (_JB_FPREG_F31 * SZREG)(a0) -#endif - INT_S v0, (_JB_FPREG_FCSR * SZREG)(a0) -#endif /* ! __mips_soft_float */ - REG_EPILOGUE - - j ra - move v0, zero -END(_setjmp) - -LEAF(_longjmp) - PIC_PROLOGUE(_longjmp) - PTR_SUBU sp, sp, CALLFRAME_SIZ - SAVE_GP(CALLFRAME_GP) - - REG_PROLOGUE - REG_L v0, (_JB_MAGIC * SZREG)(a0) # get magic number - REG_L ra, (_JB_REG_RA * SZREG)(a0) - REG_LI t0, _JB_MAGIC__SETJMP - bne v0, t0, botch # jump if error - PTR_ADDU sp, sp, CALLFRAME_SIZ # does not matter, sanity - /* - * From "MIPSpro N32 ABI Handbook", Table 2-1: - * Registers s0..s7 are callee-saved. - * The sp register is callee-saved. - * The fp (or s8) register is callee-saved. - * The gp register is callee-saved (for n32/n64). - */ - REG_L s0, (_JB_REG_S0 * SZREG)(a0) - REG_L s1, (_JB_REG_S1 * SZREG)(a0) - REG_L s2, (_JB_REG_S2 * SZREG)(a0) - REG_L s3, (_JB_REG_S3 * SZREG)(a0) - REG_L s4, (_JB_REG_S4 * SZREG)(a0) - REG_L s5, (_JB_REG_S5 * SZREG)(a0) - REG_L s6, (_JB_REG_S6 * SZREG)(a0) - REG_L s7, (_JB_REG_S7 * SZREG)(a0) - REG_L sp, (_JB_REG_SP * SZREG)(a0) - REG_L s8, (_JB_REG_S8 * SZREG)(a0) -#if defined(__mips_n32) || defined(__mips_n64) - REG_L gp, (_JB_REG_GP * SZREG)(a0) -#endif -#ifndef __mips_soft_float - # get fpu status - INT_L v0, (_JB_FPREG_FCSR * SZREG)(a0) - ctc1 v0, $31 - /* - * From "MIPSpro N32 ABI Handbook", Table 2-1: - * In N32, FP registers F20, F22, F24, F26, F28, F30 are callee-saved. - * In N64, FP registers F24 .. F31 are callee-saved. - * In O32, FP registers F20 .. F23 are callee-saved. - */ -#if defined(__mips_n64) || defined(__mips_n32) - FP_L $f30, (_JB_FPREG_F30 * SZREG)(a0) - FP_L $f28, (_JB_FPREG_F28 * SZREG)(a0) - FP_L $f26, (_JB_FPREG_F26 * SZREG)(a0) - FP_L $f24, (_JB_FPREG_F24 * SZREG)(a0) -#endif -#if defined(__mips_n32) || defined(__mips_o32) || defined(__mips_o64) - FP_L $f22, (_JB_FPREG_F22 * SZREG)(a0) - FP_L $f20, (_JB_FPREG_F20 * SZREG)(a0) -#endif -#if defined(__mips_o32) || defined(__mips_o64) - FP_L $f21, (_JB_FPREG_F21 * SZREG)(a0) - FP_L $f23, (_JB_FPREG_F23 * SZREG)(a0) -#endif -#if defined(__mips_n64) - FP_L $f25, (_JB_FPREG_F25 * SZREG)(a0) - FP_L $f27, (_JB_FPREG_F27 * SZREG)(a0) - FP_L $f29, (_JB_FPREG_F29 * SZREG)(a0) - FP_L $f31, (_JB_FPREG_F31 * SZREG)(a0) -#endif -#endif /* ! __mips_soft_float */ - - REG_EPILOGUE - bne a1, zero, 1f - move v0, a1 # get return value in 1st arg - REG_LI v0, 1 # return 1 if arg is 0 -1: - j ra - nop - -botch: - /* - * We know we aren't returning so we don't care about restoring - * our caller's GP. - */ - PTR_LA t9, _C_LABEL(longjmperror) - jalr t9 - nop - - PIC_TAILCALL(abort) -END(_longjmp) diff --git a/lib/libc/mips/gen/fabs.S b/lib/libc/mips/gen/fabs.S deleted file mode 100644 index 81cb6697059..00000000000 --- a/lib/libc/mips/gen/fabs.S +++ /dev/null @@ -1,56 +0,0 @@ -/* $NetBSD: fabs.S,v 1.7 2003/08/07 16:42:15 agc Exp $ */ - -/*- - * Copyright (c) 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) - ASMSTR("from: @(#)fabs.s 8.1 (Berkeley) 2/16/94") - ASMSTR("$NetBSD: fabs.S,v 1.7 2003/08/07 16:42:15 agc Exp $") -#endif /* LIBC_SCCS and not lint */ - - -#ifdef __ABICALLS__ - .abicalls -#endif - .set noreorder - -/* - * fabs(x) - * double x; - * - * Return absolute value of x. - */ -LEAF(fabs) - j ra - abs.d $f0, $f12 # compute absolute value of x -END(fabs) diff --git a/lib/libc/mips/gen/fabs.c b/lib/libc/mips/gen/fabs.c deleted file mode 100644 index 1ac060205e1..00000000000 --- a/lib/libc/mips/gen/fabs.c +++ /dev/null @@ -1,45 +0,0 @@ -/* $NetBSD: fabs.c,v 1.2 2002/05/26 11:48:01 wiz Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 1996 Mark Brinicombe - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Mark Brinicombe - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * fabs(x) returns the absolute value of x. - */ -#include -double -fabs(double x) -{ - - return (__builtin_fabs(x)); -} diff --git a/lib/libc/mips/gen/flt_rounds.c b/lib/libc/mips/gen/flt_rounds.c deleted file mode 100644 index c65a401569f..00000000000 --- a/lib/libc/mips/gen/flt_rounds.c +++ /dev/null @@ -1,41 +0,0 @@ -/* $NetBSD: flt_rounds.c,v 1.5 2005/12/24 23:10:08 perry Exp $ */ - -/* - * Written by J.T. Conklin, Apr 11, 1995 - * Public domain. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) -__RCSID("$NetBSD: flt_rounds.c,v 1.5 2005/12/24 23:10:08 perry Exp $"); -#endif /* LIBC_SCCS and not lint */ - -#include -#include - -#ifdef __mips_soft_float -#include "softfloat-for-gcc.h" -#include "milieu.h" -#include "softfloat.h" -#endif - -static const int map[] = { - 1, /* round to nearest */ - 0, /* round to zero */ - 2, /* round to positive infinity */ - 3 /* round to negative infinity */ -}; - -int -__flt_rounds() -{ - int mode; - -#ifdef __mips_soft_float - mode = __softfloat_float_rounding_mode; -#else - __asm __volatile("cfc1 %0,$31" : "=r" (mode)); -#endif - - return map[mode & 0x03]; -} diff --git a/lib/libc/mips/gen/hardfloat/fpgetmask.c b/lib/libc/mips/gen/hardfloat/fpgetmask.c deleted file mode 100644 index 6f7f0ec4db0..00000000000 --- a/lib/libc/mips/gen/hardfloat/fpgetmask.c +++ /dev/null @@ -1,28 +0,0 @@ -/* $NetBSD: fpgetmask.c,v 1.5 2005/12/24 23:10:08 perry Exp $ */ - -/* - * Written by J.T. Conklin, Apr 11, 1995 - * Public domain. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) -__RCSID("$NetBSD: fpgetmask.c,v 1.5 2005/12/24 23:10:08 perry Exp $"); -#endif /* LIBC_SCCS and not lint */ - -#include "namespace.h" - -#include - -#ifdef __weak_alias -__weak_alias(fpgetmask,_fpgetmask) -#endif - -fp_except_t -fpgetmask() -{ - int x; - - __asm("cfc1 %0,$31" : "=r" (x)); - return (x >> 7) & 0x1f; -} diff --git a/lib/libc/mips/gen/hardfloat/fpgetround.c b/lib/libc/mips/gen/hardfloat/fpgetround.c deleted file mode 100644 index 0a70b9f8f19..00000000000 --- a/lib/libc/mips/gen/hardfloat/fpgetround.c +++ /dev/null @@ -1,28 +0,0 @@ -/* $NetBSD: fpgetround.c,v 1.5 2005/12/24 23:10:08 perry Exp $ */ - -/* - * Written by J.T. Conklin, Apr 11, 1995 - * Public domain. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) -__RCSID("$NetBSD: fpgetround.c,v 1.5 2005/12/24 23:10:08 perry Exp $"); -#endif /* LIBC_SCCS and not lint */ - -#include "namespace.h" - -#include - -#ifdef __weak_alias -__weak_alias(fpgetround,_fpgetround) -#endif - -fp_rnd_t -fpgetround() -{ - int x; - - __asm("cfc1 %0,$31" : "=r" (x)); - return x & 0x03; -} diff --git a/lib/libc/mips/gen/hardfloat/fpgetsticky.c b/lib/libc/mips/gen/hardfloat/fpgetsticky.c deleted file mode 100644 index b7332043d20..00000000000 --- a/lib/libc/mips/gen/hardfloat/fpgetsticky.c +++ /dev/null @@ -1,28 +0,0 @@ -/* $NetBSD: fpgetsticky.c,v 1.5 2005/12/24 23:10:08 perry Exp $ */ - -/* - * Written by J.T. Conklin, Apr 11, 1995 - * Public domain. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) -__RCSID("$NetBSD: fpgetsticky.c,v 1.5 2005/12/24 23:10:08 perry Exp $"); -#endif /* LIBC_SCCS and not lint */ - -#include "namespace.h" - -#include - -#ifdef __weak_alias -__weak_alias(fpgetsticky,_fpgetsticky) -#endif - -fp_except_t -fpgetsticky() -{ - int x; - - __asm("cfc1 %0,$31" : "=r" (x)); - return (x >> 2) & 0x1f; -} diff --git a/lib/libc/mips/gen/hardfloat/fpsetmask.c b/lib/libc/mips/gen/hardfloat/fpsetmask.c deleted file mode 100644 index f7cce8d2889..00000000000 --- a/lib/libc/mips/gen/hardfloat/fpsetmask.c +++ /dev/null @@ -1,37 +0,0 @@ -/* $NetBSD: fpsetmask.c,v 1.5 2005/12/24 23:10:08 perry Exp $ */ - -/* - * Written by J.T. Conklin, Apr 11, 1995 - * Public domain. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) -__RCSID("$NetBSD: fpsetmask.c,v 1.5 2005/12/24 23:10:08 perry Exp $"); -#endif /* LIBC_SCCS and not lint */ - -#include "namespace.h" - -#include - -#ifdef __weak_alias -__weak_alias(fpsetmask,_fpsetmask) -#endif - -fp_except_t -fpsetmask(mask) - fp_except_t mask; -{ - fp_except_t old; - fp_except_t new; - - __asm("cfc1 %0,$31" : "=r" (old)); - - new = old; - new &= ~(0x1f << 7); - new |= ((mask & 0x1f) << 7); - - __asm("ctc1 %0,$31" : : "r" (new)); - - return (old >> 7) & 0x1f; -} diff --git a/lib/libc/mips/gen/hardfloat/fpsetround.c b/lib/libc/mips/gen/hardfloat/fpsetround.c deleted file mode 100644 index c16b9f5c2de..00000000000 --- a/lib/libc/mips/gen/hardfloat/fpsetround.c +++ /dev/null @@ -1,36 +0,0 @@ -/* $NetBSD: fpsetround.c,v 1.5 2005/12/24 23:10:08 perry Exp $ */ - -/* - * Written by J.T. Conklin, Apr 11, 1995 - * Public domain. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) -__RCSID("$NetBSD: fpsetround.c,v 1.5 2005/12/24 23:10:08 perry Exp $"); -#endif /* LIBC_SCCS and not lint */ - -#include "namespace.h" - -#include - -#ifdef __weak_alias -__weak_alias(fpsetround,_fpsetround) -#endif - -fp_rnd_t -fpsetround(fp_rnd_t rnd_dir) -{ - fp_rnd_t old; - fp_rnd_t new; - - __asm("cfc1 %0,$31" : "=r" (old)); - - new = old; - new &= ~0x03; - new |= (rnd_dir & 0x03); - - __asm("ctc1 %0,$31" : : "r" (new)); - - return old & 0x03; -} diff --git a/lib/libc/mips/gen/hardfloat/fpsetsticky.c b/lib/libc/mips/gen/hardfloat/fpsetsticky.c deleted file mode 100644 index c86f5951102..00000000000 --- a/lib/libc/mips/gen/hardfloat/fpsetsticky.c +++ /dev/null @@ -1,37 +0,0 @@ -/* $NetBSD: fpsetsticky.c,v 1.5 2005/12/24 23:10:08 perry Exp $ */ - -/* - * Written by J.T. Conklin, Apr 11, 1995 - * Public domain. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) -__RCSID("$NetBSD: fpsetsticky.c,v 1.5 2005/12/24 23:10:08 perry Exp $"); -#endif /* LIBC_SCCS and not lint */ - -#include "namespace.h" - -#include - -#ifdef __weak_alias -__weak_alias(fpsetsticky,_fpsetsticky) -#endif - -fp_except -fpsetsticky(sticky) - fp_except sticky; -{ - fp_except old; - fp_except new; - - __asm("cfc1 %0,$31" : "=r" (old)); - - new = old; - new &= ~(0x1f << 2); - new |= ((sticky & 0x1f) << 2); - - __asm("ctc1 %0,$31" : : "r" (new)); - - return (old >> 2) & 0x1f; -} diff --git a/lib/libc/mips/gen/infinity.c b/lib/libc/mips/gen/infinity.c deleted file mode 100644 index 13d59ef5a07..00000000000 --- a/lib/libc/mips/gen/infinity.c +++ /dev/null @@ -1,24 +0,0 @@ -/* - * infinity.c - */ - -#include -#include - -/* bytes for +Infinity on a 387 */ -const union __infinity_un __infinity = { -#if BYTE_ORDER == BIG_ENDIAN - { 0x7f, 0xf0, 0, 0, 0, 0, 0, 0 } -#else - { 0, 0, 0, 0, 0, 0, 0xf0, 0x7f } -#endif -}; - -/* bytes for NaN */ -const union __nan_un __nan = { -#if BYTE_ORDER == BIG_ENDIAN - {0x7f, 0xa0, 0, 0} -#else - { 0, 0, 0xa0, 0x7f } -#endif -}; diff --git a/lib/libc/mips/gen/ldexp.S b/lib/libc/mips/gen/ldexp.S deleted file mode 100644 index e71954bc5bb..00000000000 --- a/lib/libc/mips/gen/ldexp.S +++ /dev/null @@ -1,217 +0,0 @@ -/* $NetBSD: ldexp.S,v 1.8 2003/08/07 16:42:15 agc Exp $ */ - -/*- - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) - ASMSTR("from: @(#)ldexp.s 8.1 (Berkeley) 6/4/93") - ASMSTR("$NetBSD: ldexp.S,v 1.8 2003/08/07 16:42:15 agc Exp $") -#endif /* LIBC_SCCS and not lint */ - -#ifdef __ABICALLS__ - .abicalls -#endif - -#define DEXP_INF 0x7ff -#define DEXP_BIAS 1023 -#define DEXP_MIN -1022 -#define DEXP_MAX 1023 -#define DFRAC_BITS 52 -#define DIMPL_ONE 0x00100000 -#define DLEAD_ZEROS 31 - 20 -#define STICKYBIT 1 -#define GUARDBIT 0x80000000 -#define DSIGNAL_NAN 0x00040000 -#define DQUIET_NAN0 0x0007ffff -#define DQUIET_NAN1 0xffffffff - -/* - * double ldexp(x, N) - * double x; int N; - * - * Return x * (2**N), for integer values N. - */ -LEAF(ldexp) - mfc1 v1, $f13 # get MSW of x - mfc1 t3, $f12 # get LSW of x - sll t1, v1, 1 # get x exponent - srl t1, t1, 32 - 11 - beq t1, DEXP_INF, 9f # is it a NAN or infinity? - beq t1, zero, 1f # zero or denormalized number? - addu t1, t1, a2 # scale exponent - sll v0, a2, 20 # position N for addition - bge t1, DEXP_INF, 8f # overflow? - addu v0, v0, v1 # multiply by (2**N) - ble t1, zero, 4f # underflow? - mtc1 v0, $f1 # save MSW of result - mtc1 t3, $f0 # save LSW of result - j ra -1: - sll t2, v1, 32 - 20 # get x fraction - srl t2, t2, 32 - 20 - srl t0, v1, 31 # get x sign - bne t2, zero, 1f - beq t3, zero, 9f # result is zero -1: -/* - * Find out how many leading zero bits are in t2,t3 and put in t9. - */ - move v0, t2 - move t9, zero - bne t2, zero, 1f - move v0, t3 - addu t9, 32 -1: - srl ta0, v0, 16 - bne ta0, zero, 1f - addu t9, 16 - sll v0, 16 -1: - srl ta0, v0, 24 - bne ta0, zero, 1f - addu t9, 8 - sll v0, 8 -1: - srl ta0, v0, 28 - bne ta0, zero, 1f - addu t9, 4 - sll v0, 4 -1: - srl ta0, v0, 30 - bne ta0, zero, 1f - addu t9, 2 - sll v0, 2 -1: - srl ta0, v0, 31 - bne ta0, zero, 1f - addu t9, 1 -/* - * Now shift t2,t3 the correct number of bits. - */ -1: - subu t9, t9, DLEAD_ZEROS # dont count normal leading zeros - li t1, DEXP_MIN + DEXP_BIAS - subu t1, t1, t9 # adjust exponent - addu t1, t1, a2 # scale exponent - li v0, 32 - blt t9, v0, 1f - subu t9, t9, v0 # shift fraction left >= 32 bits - sll t2, t3, t9 - move t3, zero - b 2f -1: - subu v0, v0, t9 # shift fraction left < 32 bits - sll t2, t2, t9 - srl ta0, t3, v0 - or t2, t2, ta0 - sll t3, t3, t9 -2: - bge t1, DEXP_INF, 8f # overflow? - ble t1, zero, 4f # underflow? - sll t2, t2, 32 - 20 # clear implied one bit - srl t2, t2, 32 - 20 -3: - sll t1, t1, 31 - 11 # reposition exponent - sll t0, t0, 31 # reposition sign - or t0, t0, t1 # put result back together - or t0, t0, t2 - mtc1 t0, $f1 # save MSW of result - mtc1 t3, $f0 # save LSW of result - j ra -4: - li v0, 0x80000000 - ble t1, -52, 7f # is result too small for denorm? - sll t2, v1, 31 - 20 # clear exponent, extract fraction - or t2, t2, v0 # set implied one bit - blt t1, -30, 2f # will all bits in t3 be shifted out? - srl t2, t2, 31 - 20 # shift fraction back to normal position - subu t1, t1, 1 - sll ta0, t2, t1 # shift right t2,t3 based on exponent - srl t8, t3, t1 # save bits shifted out - negu t1 - srl t3, t3, t1 - or t3, t3, ta0 - srl t2, t2, t1 - bge t8, zero, 1f # does result need to be rounded? - addu t3, t3, 1 # round result - sltu ta0, t3, 1 - sll t8, t8, 1 - addu t2, t2, ta0 - bne t8, zero, 1f # round result to nearest - and t3, t3, ~1 -1: - mtc1 t3, $f0 # save denormalized result (LSW) - mtc1 t2, $f1 # save denormalized result (MSW) - bge v1, zero, 1f # should result be negative? - neg.d $f0, $f0 # negate result -1: - j ra -2: - mtc1 zero, $f1 # exponent and upper fraction - addu t1, t1, 20 # compute amount to shift right by - sll t8, t2, t1 # save bits shifted out - negu t1 - srl t3, t2, t1 - bge t8, zero, 1f # does result need to be rounded? - addu t3, t3, 1 # round result - sltu ta0, t3, 1 - sll t8, t8, 1 - mtc1 ta0, $f1 # exponent and upper fraction - bne t8, zero, 1f # round result to nearest - and t3, t3, ~1 -1: - mtc1 t3, $f0 - bge v1, zero, 1f # is result negative? - neg.d $f0, $f0 # negate result -1: - j ra -7: - mtc1 zero, $f0 # result is zero - mtc1 zero, $f1 - beq t0, zero, 1f # is result positive? - neg.d $f0, $f0 # negate result -1: - j ra -8: - li t1, 0x7ff00000 # result is infinity (MSW) - mtc1 t1, $f1 - mtc1 zero, $f0 # result is infinity (LSW) - bge v1, zero, 1f # should result be negative infinity? - neg.d $f0, $f0 # result is negative infinity -1: - add.d $f0, $f0 # cause overflow faults if enabled - j ra -9: - mov.d $f0, $f12 # yes, result is just x - j ra -END(ldexp) diff --git a/lib/libc/mips/gen/makecontext.c b/lib/libc/mips/gen/makecontext.c deleted file mode 100644 index 0017cc4f58c..00000000000 --- a/lib/libc/mips/gen/makecontext.c +++ /dev/null @@ -1,122 +0,0 @@ -/* $NetBSD: makecontext.c,v 1.5 2009/12/14 01:07:42 matt Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2001 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Klaus Klein. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) -__RCSID("$NetBSD: makecontext.c,v 1.5 2009/12/14 01:07:42 matt Exp $"); -#endif - -#include -#include -#define _WANT_MIPS_REGNUM -#include - -#include -#include -#include -#include -#include - -__weak_reference(__makecontext, makecontext); - -void _ctx_done(ucontext_t *); -void _ctx_start(void); - -void -__makecontext(ucontext_t *ucp, void (*func)(void), int argc, ...) -{ - mcontext_t *mc; - register_t *sp; - int i; - va_list ap; - - /* - * XXX/juli - * We need an mc_len or mc_flags like other architectures - * so that we can mark a context as invalid. Store it in - * mc->mc_regs[ZERO] perhaps? - */ - if (argc < 0 || ucp == NULL || - ucp->uc_stack.ss_sp == NULL || - ucp->uc_stack.ss_size < MINSIGSTKSZ) - return; - mc = &ucp->uc_mcontext; - - sp = (register_t *) - ((uintptr_t)ucp->uc_stack.ss_sp + ucp->uc_stack.ss_size); -#if defined(__mips_o32) || defined(__mips_o64) - sp -= (argc >= 4 ? argc : 4); /* Make room for >=4 arguments. */ -#elif defined(__mips_n32) || defined(__mips_n64) - sp -= (argc > 8 ? argc - 8 : 0); /* Make room for > 8 arguments. */ -#endif - sp = (register_t *)((uintptr_t)sp & ~(STACK_ALIGN - 1)); - - mc->mc_regs[SP] = (intptr_t)sp; - mc->mc_regs[S0] = (intptr_t)ucp; - mc->mc_regs[T9] = (intptr_t)func; - mc->mc_pc = (intptr_t)_ctx_start; - - /* Construct argument list. */ - va_start(ap, argc); -#if defined(__mips_o32) || defined(__mips_o64) - /* Up to the first four arguments are passed in $a0-3. */ - for (i = 0; i < argc && i < 4; i++) - /* LINTED register_t is safe */ - mc->mc_regs[A0 + i] = va_arg(ap, register_t); - /* Skip over the $a0-3 gap. */ - sp += 4; -#endif -#if defined(__mips_n32) || defined(__mips_n64) - /* Up to the first 8 arguments are passed in $a0-7. */ - for (i = 0; i < argc && i < 8; i++) - /* LINTED register_t is safe */ - mc->mc_regs[A0 + i] = va_arg(ap, register_t); -#endif - /* Pass remaining arguments on the stack. */ - for (; i < argc; i++) - /* LINTED register_t is safe */ - *sp++ = va_arg(ap, register_t); - va_end(ap); -} - -void -_ctx_done(ucontext_t *ucp) -{ - - if (ucp->uc_link == NULL) - exit(0); - else { - setcontext((const ucontext_t *)ucp->uc_link); - abort(); - } -} diff --git a/lib/libc/mips/gen/setjmp.S b/lib/libc/mips/gen/setjmp.S deleted file mode 100644 index b7189a9939c..00000000000 --- a/lib/libc/mips/gen/setjmp.S +++ /dev/null @@ -1,238 +0,0 @@ -/* $NetBSD: setjmp.S,v 1.17 2005/09/17 11:49:39 tsutsui Exp $ */ - -/*- - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) - ASMSTR("from: @(#)setjmp.s 8.1 (Berkeley) 6/4/93") - ASMSTR("$NetBSD: setjmp.S,v 1.17 2005/09/17 11:49:39 tsutsui Exp $") -#endif /* LIBC_SCCS and not lint */ - -#include "SYS.h" - -#ifdef __ABICALLS__ - .abicalls -#endif - -/* - * C library -- setjmp, longjmp - * - * longjmp(a,v) - * will generate a "return(v)" from - * the last call to - * setjmp(a) - * by restoring registers from the stack, - * and a struct sigcontext, see - */ - -#define SETJMP_FRAME_SIZE (CALLFRAME_SIZ + (SZREG * 2)) - - -NESTED(setjmp, SETJMP_FRAME_SIZE, ra) - .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) - SETUP_GP - PTR_SUBU sp, sp, SETJMP_FRAME_SIZE # allocate stack frame - SAVE_GP(CALLFRAME_GP) - SETUP_GP64(CALLFRAME_GP, setjmp) - - REG_S ra, CALLFRAME_RA(sp) # save RA - REG_S a0, CALLFRAME_SIZ(sp) # store env - - /* Get the signal mask. */ - PTR_ADDU a2, a0, _JB_SIGMASK * SZREG # &oenv - li a0, 1 # SIG_SETBLOCK - move a1, zero # &env == 0 - PTR_LA t9, _C_LABEL(sigprocmask) # get current signal mask - jalr t9 - - RESTORE_GP64 - REG_L a0, CALLFRAME_SIZ(sp) # restore env pointer - REG_L ra, CALLFRAME_RA(sp) # restore RA - PTR_ADDU sp, sp, SETJMP_FRAME_SIZE # pop stack frame - - REG_LI v0, _JB_MAGIC_SETJMP - REG_S v0, (_JB_MAGIC * SZREG)(a0) - REG_S ra, (_JB_REG_RA * SZREG)(a0) - /* - * From "MIPSpro N32 ABI Handbook", Table 2-1: - * Registers s0..s7 are callee-saved. - * The sp register is callee-saved. - * The fp (or s8) register is callee-saved. - * The gp register is callee-saved (for n32/n64). - */ - REG_S s0, (_JB_REG_S0 * SZREG)(a0) - REG_S s1, (_JB_REG_S1 * SZREG)(a0) - REG_S s2, (_JB_REG_S2 * SZREG)(a0) - REG_S s3, (_JB_REG_S3 * SZREG)(a0) - REG_S s4, (_JB_REG_S4 * SZREG)(a0) - REG_S s5, (_JB_REG_S5 * SZREG)(a0) - REG_S s6, (_JB_REG_S6 * SZREG)(a0) - REG_S s7, (_JB_REG_S7 * SZREG)(a0) - REG_S sp, (_JB_REG_SP * SZREG)(a0) - REG_S s8, (_JB_REG_S8 * SZREG)(a0) -#if defined(__mips_n32) || defined(__mips_n64) - REG_S gp, (_JB_REG_GP * SZREG)(a0) -#endif -#ifndef __mips_soft_float - /* - * From "MIPSpro N32 ABI Handbook", Table 2-1: - * In N32, FP registers F20, F22, F24, F26, F28, F30 are callee-saved. - * In N64, FP registers F24 .. F31 are callee-saved. - * In O32, FP registers F20 .. F23 are callee-saved. - */ - cfc1 v0, $31 - INT_S v0, (_JB_FPREG_FCSR * SZREG)(a0) -#if defined(__mips_o32) || defined(__mips_o64) || defined(__mips_n32) - FP_S $f20, (_JB_FPREG_F20 * SZREG)(a0) - FP_S $f22, (_JB_FPREG_F22 * SZREG)(a0) -#endif -#if defined(__mips_o32) || defined(__mips_o64) - FP_S $f21, (_JB_FPREG_F21 * SZREG)(a0) - FP_S $f23, (_JB_FPREG_F23 * SZREG)(a0) -#endif -#if defined(__mips_n32) || defined(__mips_n64) - FP_S $f24, (_JB_FPREG_F24 * SZREG)(a0) - FP_S $f26, (_JB_FPREG_F26 * SZREG)(a0) - FP_S $f28, (_JB_FPREG_F28 * SZREG)(a0) - FP_S $f30, (_JB_FPREG_F30 * SZREG)(a0) -#endif -#if defined(__mips_n64) - FP_S $f25, (_JB_FPREG_F25 * SZREG)(a0) - FP_S $f27, (_JB_FPREG_F27 * SZREG)(a0) - FP_S $f29, (_JB_FPREG_F29 * SZREG)(a0) - FP_S $f31, (_JB_FPREG_F31 * SZREG)(a0) -#endif -#endif /* ! __mips_soft_float */ - - move v0, zero - jr ra -END(setjmp) - -#define LONGJMP_FRAME_SIZE (CALLFRAME_SIZ + (SZREG * 2)) - -NESTED(longjmp, LONGJMP_FRAME_SIZE, ra) - .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) - PIC_PROLOGUE(longjmp) - PTR_SUBU sp, sp, LONGJMP_FRAME_SIZE # allocate stack frame - SAVE_GP(CALLFRAME_GP) - - REG_S ra, CALLFRAME_RA(sp) # save RA - REG_L v0, (_JB_MAGIC * SZREG)(a0) - REG_LI t0, _JB_MAGIC_SETJMP - bne v0, t0, botch # jump if error - nop - - REG_S a0, CALLFRAME_SIZ(sp) # save env - REG_S a1, (CALLFRAME_SIZ + SZREG)(sp) # save return value - - # set sigmask - PTR_ADDU a1, a0, _JB_SIGMASK * SZREG # &set - move a2, zero # &oset == NULL - li a0, 3 # SIG_SETMASK - PTR_LA t9,_C_LABEL(sigprocmask) # set current signal mask - jal t9 - nop - - REG_L a0, CALLFRAME_SIZ(sp) # restore env - REG_L a1, (CALLFRAME_SIZ + SZREG)(sp) # restore return value - - REG_L ra, (_JB_REG_RA * SZREG)(a0) - /* - * From "MIPSpro N32 ABI Handbook", Table 2-1: - * Registers s0..s7 are callee-saved. - * The sp register is callee-saved. - * The fp (or s8) register is callee-saved. - * The gp register is callee-saved (for n32/n64). - */ - REG_L s0, (_JB_REG_S0 * SZREG)(a0) - REG_L s1, (_JB_REG_S1 * SZREG)(a0) - REG_L s2, (_JB_REG_S2 * SZREG)(a0) - REG_L s3, (_JB_REG_S3 * SZREG)(a0) - REG_L s4, (_JB_REG_S4 * SZREG)(a0) - REG_L s5, (_JB_REG_S5 * SZREG)(a0) - REG_L s6, (_JB_REG_S6 * SZREG)(a0) - REG_L s7, (_JB_REG_S7 * SZREG)(a0) - REG_L sp, (_JB_REG_SP * SZREG)(a0) - REG_L s8, (_JB_REG_S8 * SZREG)(a0) -#if defined(__mips_n32) || defined(__mips_n64) - REG_L gp, (_JB_REG_GP * SZREG)(a0) -#endif -#ifndef __mips_soft_float - /* - * From "MIPSpro N32 ABI Handbook", Table 2-1: - * In N32, FP registers F20, F22, F24, F26, F28, F30 are callee-saved. - * In N64, FP registers F23 .. F31 are callee-saved. - * In O32, FP registers F20 .. F23 are callee-saved. - */ - INT_L v0, (_JB_FPREG_FCSR * SZREG)(a0) - ctc1 v0, $31 -#if defined(__mips_n64) || defined(__mips_n32) - FP_L $f30, (_JB_FPREG_F30 * SZREG)(a0) - FP_L $f28, (_JB_FPREG_F28 * SZREG)(a0) - FP_L $f26, (_JB_FPREG_F26 * SZREG)(a0) - FP_L $f24, (_JB_FPREG_F24 * SZREG)(a0) -#endif -#if defined(__mips_n32) || defined(__mips_o32) || defined(__mips_o64) - FP_L $f22, (_JB_FPREG_F22 * SZREG)(a0) - FP_L $f20, (_JB_FPREG_F20 * SZREG)(a0) -#endif -#if defined(__mips_o32) || defined(__mips_o64) - FP_L $f21, (_JB_FPREG_F21 * SZREG)(a0) - FP_L $f23, (_JB_FPREG_F23 * SZREG)(a0) -#endif -#if defined(__mips_n64) - FP_L $f25, (_JB_FPREG_F25 * SZREG)(a0) - FP_L $f27, (_JB_FPREG_F27 * SZREG)(a0) - FP_L $f29, (_JB_FPREG_F29 * SZREG)(a0) - FP_L $f31, (_JB_FPREG_F31 * SZREG)(a0) -#endif -#endif /* ! __mips_soft_float */ - - move v0, a1 # get return value in 1st arg - bne a1, zero, 1f # NB: no .set noreorder - REG_LI v0, 1 # return 1 if arg is 0 -1: - j ra - nop - -botch: - /* - * We know we aren't returning so we don't care about restoring - * our caller's GP. - */ - PTR_LA t9, _C_LABEL(longjmperror) - jalr t9 - nop - - PIC_TAILCALL(abort) -END(longjmp) diff --git a/lib/libc/mips/gen/signalcontext.c b/lib/libc/mips/gen/signalcontext.c deleted file mode 100644 index 7634e3002ba..00000000000 --- a/lib/libc/mips/gen/signalcontext.c +++ /dev/null @@ -1,53 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 Olivier Houchard - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include -#include - -__weak_reference(__signalcontext, signalcontext); - -extern void _ctx_start(void); - -int -__signalcontext(ucontext_t *ucp, int sig, __sighandler_t *func) -{ - /* XXXMIPS: Implement me */ - return (0); -} diff --git a/lib/libc/mips/gen/sigsetjmp.S b/lib/libc/mips/gen/sigsetjmp.S deleted file mode 100644 index 47f718fbdbe..00000000000 --- a/lib/libc/mips/gen/sigsetjmp.S +++ /dev/null @@ -1,75 +0,0 @@ -/* $NetBSD: sigsetjmp.S,v 1.8 2005/09/17 11:49:39 tsutsui Exp $ */ - -/*- - * Copyright (c) 1991, 1993, 1995, - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Havard Eidnes. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) - ASMSTR("from: @(#)setjmp.s 8.1 (Berkeley) 6/4/93") - ASMSTR("$NetBSD: sigsetjmp.S,v 1.8 2005/09/17 11:49:39 tsutsui Exp $") -#endif /* LIBC_SCCS and not lint */ - -#include "SYS.h" - -#ifdef __ABICALLS__ - .abicalls -#endif - -/* - * C library -- sigsetjmp, siglongjmp - * - * siglongjmp(a,v) - * will generate a "return(v)" from - * the last call to - * sigsetjmp(a, savemask) - * by restoring registers from the stack, - * and dependent on savemask restores the - * signal mask. - */ - -LEAF(sigsetjmp) - PIC_PROLOGUE(sigsetjmp) - - bne a1, zero, 1f # do saving of signal mask? - PIC_TAILCALL(_setjmp) - -1: PIC_TAILCALL(setjmp) -END(sigsetjmp) - -LEAF(siglongjmp) - PIC_PROLOGUE(siglongjmp) - REG_L t0, (_JB_MAGIC * SZREG)(a0) - REG_LI t1, _JB_MAGIC__SETJMP - bne t0, t1, 1f # setjmp or _setjmp magic? - PIC_TAILCALL(_longjmp) -1: PIC_TAILCALL(longjmp) -END(siglongjmp) diff --git a/lib/libc/mips/net/Makefile.inc b/lib/libc/mips/net/Makefile.inc deleted file mode 100644 index e774bffa1cd..00000000000 --- a/lib/libc/mips/net/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ -# $NetBSD: Makefile.inc,v 1.3 2003/08/01 17:03:51 lukem Exp $ - -SRCS+= htonl.S ntohl.S htons.S ntohs.S diff --git a/lib/libc/mips/net/htonl.S b/lib/libc/mips/net/htonl.S deleted file mode 100644 index e255ae06acd..00000000000 --- a/lib/libc/mips/net/htonl.S +++ /dev/null @@ -1,48 +0,0 @@ -/* $NetBSD: byte_swap_4.S,v 1.2 2006/02/08 21:52:36 simonb Exp $ */ - -/*- - * Copyright (c) 1997 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Neil A. Carson - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include -LEAF(htonl) # a0 = 0x11223344, return 0x44332211 -#ifdef __MIPSEB__ - move v0, a0 -#else - srl v1, a0, 24 # v1 = 0x00000011 - sll v0, a0, 24 # v0 = 0x44000000 - or v0, v0, v1 - and v1, a0, 0xff00 - sll v1, v1, 8 # v1 = 0x00330000 - or v0, v0, v1 - srl v1, a0, 8 - and v1, v1, 0xff00 # v1 = 0x00002200 - or v0, v0, v1 -#endif - j ra -END(htonl) diff --git a/lib/libc/mips/net/htons.S b/lib/libc/mips/net/htons.S deleted file mode 100644 index 89f700e70e0..00000000000 --- a/lib/libc/mips/net/htons.S +++ /dev/null @@ -1,44 +0,0 @@ -/* $NetBSD: byte_swap_2.S,v 1.2 2006/02/08 21:52:36 simonb Exp $ */ - -/*- - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Charles M. Hannum. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include -LEAF(htons) -#ifdef __MIPSEB__ - move v0, a0 -#else - srl v0, a0, 8 - and v0, v0, 0xff - sll v1, a0, 8 - and v1, v1, 0xff00 - or v0, v0, v1 -#endif - j ra -END(htons) diff --git a/lib/libc/mips/net/ntohl.S b/lib/libc/mips/net/ntohl.S deleted file mode 100644 index 0fbefc7ffb3..00000000000 --- a/lib/libc/mips/net/ntohl.S +++ /dev/null @@ -1,48 +0,0 @@ -/* $NetBSD: byte_swap_4.S,v 1.2 2006/02/08 21:52:36 simonb Exp $ */ - -/*- - * Copyright (c) 1997 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Neil A. Carson - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include -LEAF(ntohl) # a0 = 0x11223344, return 0x44332211 -#ifdef __MIPSEB__ - move v0, a0 -#else - srl v1, a0, 24 # v1 = 0x00000011 - sll v0, a0, 24 # v0 = 0x44000000 - or v0, v0, v1 - and v1, a0, 0xff00 - sll v1, v1, 8 # v1 = 0x00330000 - or v0, v0, v1 - srl v1, a0, 8 - and v1, v1, 0xff00 # v1 = 0x00002200 - or v0, v0, v1 -#endif - j ra -END(ntohl) diff --git a/lib/libc/mips/net/ntohs.S b/lib/libc/mips/net/ntohs.S deleted file mode 100644 index f7721148d3f..00000000000 --- a/lib/libc/mips/net/ntohs.S +++ /dev/null @@ -1,44 +0,0 @@ -/* $NetBSD: byte_swap_2.S,v 1.2 2006/02/08 21:52:36 simonb Exp $ */ - -/*- - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Charles M. Hannum. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include -LEAF(ntohs) -#ifdef __MIPSEB__ - move v0, a0 -#else - srl v0, a0, 8 - and v0, v0, 0xff - sll v1, a0, 8 - and v1, v1, 0xff00 - or v0, v0, v1 -#endif - j ra -END(ntohs) diff --git a/lib/libc/mips/softfloat/milieu.h b/lib/libc/mips/softfloat/milieu.h deleted file mode 100644 index 0bf7e42d5f7..00000000000 --- a/lib/libc/mips/softfloat/milieu.h +++ /dev/null @@ -1,47 +0,0 @@ - -/* -=============================================================================== - -This C header file is part of the SoftFloat IEC/IEEE Floating-point -Arithmetic Package, Release 2a. - -Written by John R. Hauser. This work was made possible in part by the -International Computer Science Institute, located at Suite 600, 1947 Center -Street, Berkeley, California 94704. Funding was partially provided by the -National Science Foundation under grant MIP-9311980. The original version -of this code was written as part of a project to build a fixed-point vector -processor in collaboration with the University of California at Berkeley, -overseen by Profs. Nelson Morgan and John Wawrzynek. More information -is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/ -arithmetic/SoftFloat.html'. - -THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort -has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT -TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO -PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY -AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE. - -Derivative works are acceptable, even for commercial purposes, so long as -(1) they include prominent notice that the work is derivative, and (2) they -include prominent notice akin to these four paragraphs for those parts of -this code that are retained. - -=============================================================================== -*/ - -/* -------------------------------------------------------------------------------- -Include common integer types and flags. -------------------------------------------------------------------------------- -*/ -#include "mips-gcc.h" - -/* -------------------------------------------------------------------------------- -Symbolic Boolean literals. -------------------------------------------------------------------------------- -*/ -enum { - FALSE = 0, - TRUE = 1 -}; diff --git a/lib/libc/mips/softfloat/mips-gcc.h b/lib/libc/mips/softfloat/mips-gcc.h deleted file mode 100644 index 1a588921b3e..00000000000 --- a/lib/libc/mips/softfloat/mips-gcc.h +++ /dev/null @@ -1,90 +0,0 @@ -/* $NetBSD: arm-gcc.h,v 1.2 2001/02/21 18:09:25 bjh21 Exp $ */ - -/* -------------------------------------------------------------------------------- -One of the macros `BIGENDIAN' or `LITTLEENDIAN' must be defined. -------------------------------------------------------------------------------- -*/ -#ifdef __MIPSEB__ -#define BIGENDIAN -#else -#define LITTLEENDIAN -#endif - -/* -------------------------------------------------------------------------------- -The macro `BITS64' can be defined to indicate that 64-bit integer types are -supported by the compiler. -------------------------------------------------------------------------------- -*/ -#define BITS64 - -/* -------------------------------------------------------------------------------- -Each of the following `typedef's defines the most convenient type that holds -integers of at least as many bits as specified. For example, `uint8' should -be the most convenient type that can hold unsigned integers of as many as -8 bits. The `flag' type must be able to hold either a 0 or 1. For most -implementations of C, `flag', `uint8', and `int8' should all be `typedef'ed -to the same as `int'. -------------------------------------------------------------------------------- -*/ -typedef int flag; -typedef int uint8; -typedef int int8; -typedef int uint16; -typedef int int16; -typedef unsigned int uint32; -typedef signed int int32; -#ifdef BITS64 -typedef unsigned long long int uint64; -typedef signed long long int int64; -#endif - -/* -------------------------------------------------------------------------------- -Each of the following `typedef's defines a type that holds integers -of _exactly_ the number of bits specified. For instance, for most -implementation of C, `bits16' and `sbits16' should be `typedef'ed to -`unsigned short int' and `signed short int' (or `short int'), respectively. -------------------------------------------------------------------------------- -*/ -typedef unsigned char bits8; -typedef signed char sbits8; -typedef unsigned short int bits16; -typedef signed short int sbits16; -typedef unsigned int bits32; -typedef signed int sbits32; -#ifdef BITS64 -typedef unsigned long long int bits64; -typedef signed long long int sbits64; -#endif - -#ifdef BITS64 -/* -------------------------------------------------------------------------------- -The `LIT64' macro takes as its argument a textual integer literal and -if necessary ``marks'' the literal as having a 64-bit integer type. -For example, the GNU C Compiler (`gcc') requires that 64-bit literals be -appended with the letters `LL' standing for `long long', which is `gcc's -name for the 64-bit integer type. Some compilers may allow `LIT64' to be -defined as the identity macro: `#define LIT64( a ) a'. -------------------------------------------------------------------------------- -*/ -#define LIT64( a ) a##LL -#endif - -/* -------------------------------------------------------------------------------- -The macro `INLINE' can be used before functions that should be inlined. If -a compiler does not support explicit inlining, this macro should be defined -to be `static'. -------------------------------------------------------------------------------- -*/ -#define INLINE static __inline - -#if defined(SOFTFLOAT_FOR_GCC) -/* XXXMIPS: check this one */ -#define FLOAT64_DEMANGLE(a) (a) -#define FLOAT64_MANGLE(a) (a) -#endif diff --git a/lib/libc/mips/softfloat/softfloat.h b/lib/libc/mips/softfloat/softfloat.h deleted file mode 100644 index d202a1f7f42..00000000000 --- a/lib/libc/mips/softfloat/softfloat.h +++ /dev/null @@ -1,314 +0,0 @@ -/* $NetBSD: softfloat.h,v 1.6 2002/05/12 13:12:46 bjh21 Exp $ */ - -/* This is a derivative work. */ - -/* -=============================================================================== - -This C header file is part of the SoftFloat IEC/IEEE Floating-point -Arithmetic Package, Release 2a. - -Written by John R. Hauser. This work was made possible in part by the -International Computer Science Institute, located at Suite 600, 1947 Center -Street, Berkeley, California 94704. Funding was partially provided by the -National Science Foundation under grant MIP-9311980. The original version -of this code was written as part of a project to build a fixed-point vector -processor in collaboration with the University of California at Berkeley, -overseen by Profs. Nelson Morgan and John Wawrzynek. More information -is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/ -arithmetic/SoftFloat.html'. - -THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort -has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT -TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO -PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY -AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE. - -Derivative works are acceptable, even for commercial purposes, so long as -(1) they include prominent notice that the work is derivative, and (2) they -include prominent notice akin to these four paragraphs for those parts of -this code that are retained. - -=============================================================================== -*/ - -/* -------------------------------------------------------------------------------- -The macro `FLOATX80' must be defined to enable the extended double-precision -floating-point format `floatx80'. If this macro is not defined, the -`floatx80' type will not be defined, and none of the functions that either -input or output the `floatx80' type will be defined. The same applies to -the `FLOAT128' macro and the quadruple-precision format `float128'. -------------------------------------------------------------------------------- -*/ -/* #define FLOATX80 */ -/* #define FLOAT128 */ - -#include - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point types. -------------------------------------------------------------------------------- -*/ -typedef unsigned int float32; -typedef unsigned long long float64; -#ifdef FLOATX80 -typedef struct { - unsigned short high; - unsigned long long low; -} floatx80; -#endif -#ifdef FLOAT128 -typedef struct { - unsigned long long high, low; -} float128; -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point underflow tininess-detection mode. -------------------------------------------------------------------------------- -*/ -#ifndef SOFTFLOAT_FOR_GCC -extern int float_detect_tininess; -#endif -enum { - float_tininess_after_rounding = 0, - float_tininess_before_rounding = 1 -}; - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point rounding mode. -------------------------------------------------------------------------------- -*/ -extern int float_rounding_mode; -enum { - float_round_nearest_even = FE_TONEAREST, - float_round_to_zero = FE_TOWARDZERO, - float_round_down = FE_DOWNWARD, - float_round_up = FE_UPWARD -}; - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point exception flags. -------------------------------------------------------------------------------- -*/ -extern int float_exception_flags; -extern int float_exception_mask; -enum { - float_flag_inexact = FE_INEXACT, - float_flag_underflow = FE_UNDERFLOW, - float_flag_overflow = FE_OVERFLOW, - float_flag_divbyzero = FE_DIVBYZERO, - float_flag_invalid = FE_INVALID -}; - -/* -------------------------------------------------------------------------------- -Routine to raise any or all of the software IEC/IEEE floating-point -exception flags. -------------------------------------------------------------------------------- -*/ -void float_raise( int ); - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE integer-to-floating-point conversion routines. -------------------------------------------------------------------------------- -*/ -float32 int32_to_float32( int ); -float64 int32_to_float64( int ); -#ifdef FLOATX80 -floatx80 int32_to_floatx80( int ); -#endif -#ifdef FLOAT128 -float128 int32_to_float128( int ); -#endif -#ifndef SOFTFLOAT_FOR_GCC /* __floatdi?f is in libgcc2.c */ -float32 int64_to_float32( long long ); -float64 int64_to_float64( long long ); -#ifdef FLOATX80 -floatx80 int64_to_floatx80( long long ); -#endif -#ifdef FLOAT128 -float128 int64_to_float128( long long ); -#endif -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE single-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int float32_to_int32( float32 ); -int float32_to_int32_round_to_zero( float32 ); -#if defined(SOFTFLOAT_FOR_GCC) && defined(SOFTFLOAT_NEED_FIXUNS) -unsigned int float32_to_uint32_round_to_zero( float32 ); -#endif -#ifndef SOFTFLOAT_FOR_GCC /* __fix?fdi provided by libgcc2.c */ -long long float32_to_int64( float32 ); -long long float32_to_int64_round_to_zero( float32 ); -#endif -float64 float32_to_float64( float32 ); -#ifdef FLOATX80 -floatx80 float32_to_floatx80( float32 ); -#endif -#ifdef FLOAT128 -float128 float32_to_float128( float32 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE single-precision operations. -------------------------------------------------------------------------------- -*/ -float32 float32_round_to_int( float32 ); -float32 float32_add( float32, float32 ); -float32 float32_sub( float32, float32 ); -float32 float32_mul( float32, float32 ); -float32 float32_div( float32, float32 ); -float32 float32_rem( float32, float32 ); -float32 float32_sqrt( float32 ); -int float32_eq( float32, float32 ); -int float32_le( float32, float32 ); -int float32_lt( float32, float32 ); -int float32_eq_signaling( float32, float32 ); -int float32_le_quiet( float32, float32 ); -int float32_lt_quiet( float32, float32 ); -#ifndef SOFTFLOAT_FOR_GCC -int float32_is_signaling_nan( float32 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE double-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int float64_to_int32( float64 ); -int float64_to_int32_round_to_zero( float64 ); -#if defined(SOFTFLOAT_FOR_GCC) && defined(SOFTFLOAT_NEED_FIXUNS) -unsigned int float64_to_uint32_round_to_zero( float64 ); -#endif -#ifndef SOFTFLOAT_FOR_GCC /* __fix?fdi provided by libgcc2.c */ -long long float64_to_int64( float64 ); -long long float64_to_int64_round_to_zero( float64 ); -#endif -float32 float64_to_float32( float64 ); -#ifdef FLOATX80 -floatx80 float64_to_floatx80( float64 ); -#endif -#ifdef FLOAT128 -float128 float64_to_float128( float64 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE double-precision operations. -------------------------------------------------------------------------------- -*/ -float64 float64_round_to_int( float64 ); -float64 float64_add( float64, float64 ); -float64 float64_sub( float64, float64 ); -float64 float64_mul( float64, float64 ); -float64 float64_div( float64, float64 ); -float64 float64_rem( float64, float64 ); -float64 float64_sqrt( float64 ); -int float64_eq( float64, float64 ); -int float64_le( float64, float64 ); -int float64_lt( float64, float64 ); -int float64_eq_signaling( float64, float64 ); -int float64_le_quiet( float64, float64 ); -int float64_lt_quiet( float64, float64 ); -#ifndef SOFTFLOAT_FOR_GCC -int float64_is_signaling_nan( float64 ); -#endif - -#ifdef FLOATX80 - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE extended double-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int floatx80_to_int32( floatx80 ); -int floatx80_to_int32_round_to_zero( floatx80 ); -long long floatx80_to_int64( floatx80 ); -long long floatx80_to_int64_round_to_zero( floatx80 ); -float32 floatx80_to_float32( floatx80 ); -float64 floatx80_to_float64( floatx80 ); -#ifdef FLOAT128 -float128 floatx80_to_float128( floatx80 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE extended double-precision rounding precision. Valid -values are 32, 64, and 80. -------------------------------------------------------------------------------- -*/ -extern int floatx80_rounding_precision; - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE extended double-precision operations. -------------------------------------------------------------------------------- -*/ -floatx80 floatx80_round_to_int( floatx80 ); -floatx80 floatx80_add( floatx80, floatx80 ); -floatx80 floatx80_sub( floatx80, floatx80 ); -floatx80 floatx80_mul( floatx80, floatx80 ); -floatx80 floatx80_div( floatx80, floatx80 ); -floatx80 floatx80_rem( floatx80, floatx80 ); -floatx80 floatx80_sqrt( floatx80 ); -int floatx80_eq( floatx80, floatx80 ); -int floatx80_le( floatx80, floatx80 ); -int floatx80_lt( floatx80, floatx80 ); -int floatx80_eq_signaling( floatx80, floatx80 ); -int floatx80_le_quiet( floatx80, floatx80 ); -int floatx80_lt_quiet( floatx80, floatx80 ); -int floatx80_is_signaling_nan( floatx80 ); - -#endif - -#ifdef FLOAT128 - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE quadruple-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int float128_to_int32( float128 ); -int float128_to_int32_round_to_zero( float128 ); -long long float128_to_int64( float128 ); -long long float128_to_int64_round_to_zero( float128 ); -float32 float128_to_float32( float128 ); -float64 float128_to_float64( float128 ); -#ifdef FLOATX80 -floatx80 float128_to_floatx80( float128 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE quadruple-precision operations. -------------------------------------------------------------------------------- -*/ -float128 float128_round_to_int( float128 ); -float128 float128_add( float128, float128 ); -float128 float128_sub( float128, float128 ); -float128 float128_mul( float128, float128 ); -float128 float128_div( float128, float128 ); -float128 float128_rem( float128, float128 ); -float128 float128_sqrt( float128 ); -int float128_eq( float128, float128 ); -int float128_le( float128, float128 ); -int float128_lt( float128, float128 ); -int float128_eq_signaling( float128, float128 ); -int float128_le_quiet( float128, float128 ); -int float128_lt_quiet( float128, float128 ); -int float128_is_signaling_nan( float128 ); - -#endif - diff --git a/lib/libc/mips/static_tls.h b/lib/libc/mips/static_tls.h deleted file mode 100644 index e970df55a78..00000000000 --- a/lib/libc/mips/static_tls.h +++ /dev/null @@ -1,56 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2019 The FreeBSD Foundation - * - * This software was developed by Konstantin Belousov - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _LIBC_MIPS_STATIC_TLS_H -#define _LIBC_MIPS_STATIC_TLS_H - -#include - -static __inline uintptr_t -_libc_get_static_tls_base(size_t offset) -{ - uintptr_t tlsbase; - - __asm__ __volatile__ ( - ".set\tpush\n\t" -#if defined(__mips_n64) - ".set\tmips64r2\n\t" -#else /* mips 32 */ - ".set\tmips32r2\n\t" -#endif /* ! __mips_n64 */ - "rdhwr\t%0, $29\n\t" - ".set\tpop" - : "=r" (tlsbase)); - tlsbase -= TLS_TP_OFFSET + TLS_TCB_SIZE; - tlsbase += offset; - return (tlsbase); -} - -#endif diff --git a/lib/libc/mips/string/Makefile.inc b/lib/libc/mips/string/Makefile.inc deleted file mode 100644 index ba4d8b855d9..00000000000 --- a/lib/libc/mips/string/Makefile.inc +++ /dev/null @@ -1,12 +0,0 @@ - -MDSRCS+= \ - bcmp.S \ - bcopy.S \ - bzero.S \ - ffs.S \ - memcpy.S \ - memmove.S \ - strchr.S \ - strcmp.S \ - strlen.S \ - strrchr.S diff --git a/lib/libc/mips/string/bcmp.S b/lib/libc/mips/string/bcmp.S deleted file mode 100644 index 466d4949e51..00000000000 --- a/lib/libc/mips/string/bcmp.S +++ /dev/null @@ -1,128 +0,0 @@ -/* $NetBSD: bcmp.S,v 1.9 2009/12/14 01:07:42 matt Exp $ */ - -/*- - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#define _LOCORE /* XXX not really, just assembly-code source */ -#include /* LWLO/LWHI, SWLO/SWHI */ - -#if defined(LIBC_SCCS) && !defined(lint) -#if 0 - ASMSTR("from: @(#)bcmp.s 8.1 (Berkeley) 6/4/93") -#else - ASMSTR("$NetBSD: bcmp.S,v 1.9 2009/12/14 01:07:42 matt Exp $") -#endif -#endif /* LIBC_SCCS and not lint */ - -#ifdef __ABICALLS__ - .abicalls -#endif - -/* bcmp(s1, s2, n) */ - - -LEAF(bcmp) - .set noreorder - blt a2, 16, small # is it worth any trouble? - xor v0, a0, a1 # compare low two bits of addresses - and v0, v0, 3 - PTR_SUBU a3, zero, a1 # compute # bytes to word align address - bne v0, zero, unaligned # not possible to align addresses - and a3, a3, 3 - - beq a3, zero, 1f - PTR_SUBU a2, a2, a3 # subtract from remaining count - move v0, v1 # init v0,v1 so unmodified bytes match - LWHI v0, 0(a0) # read 1, 2, or 3 bytes - LWHI v1, 0(a1) - PTR_ADDU a1, a1, a3 - bne v0, v1, nomatch - PTR_ADDU a0, a0, a3 -1: - and a3, a2, ~3 # compute number of whole words left - PTR_SUBU a2, a2, a3 # which has to be >= (16-3) & ~3 - PTR_ADDU a3, a3, a0 # compute ending address -2: - lw v0, 0(a0) # compare words - lw v1, 0(a1) - PTR_ADDU a0, a0, 4 - bne v0, v1, nomatch - PTR_ADDU a1, a1, 4 - bne a0, a3, 2b - nop - b small # finish remainder - nop -unaligned: - beq a3, zero, 2f - PTR_SUBU a2, a2, a3 # subtract from remaining count - PTR_ADDU a3, a3, a0 # compute ending address -1: - lbu v0, 0(a0) # compare bytes until a1 word aligned - lbu v1, 0(a1) - PTR_ADDU a0, a0, 1 - bne v0, v1, nomatch - PTR_ADDU a1, a1, 1 - bne a0, a3, 1b - nop -2: - and a3, a2, ~3 # compute number of whole words left - PTR_SUBU a2, a2, a3 # which has to be >= (16-3) & ~3 - PTR_ADDU a3, a3, a0 # compute ending address -3: - LWHI v0, 0(a0) # compare words a0 unaligned, a1 aligned - LWLO v0, 3(a0) - lw v1, 0(a1) - PTR_ADDU a0, a0, 4 - bne v0, v1, nomatch - PTR_ADDU a1, a1, 4 - bne a0, a3, 3b - nop -small: - ble a2, zero, match - PTR_ADDU a3, a2, a0 # compute ending address -1: - lbu v0, 0(a0) - lbu v1, 0(a1) - PTR_ADDU a0, a0, 1 - bne v0, v1, nomatch - PTR_ADDU a1, a1, 1 - bne a0, a3, 1b - nop -match: - j ra - move v0, zero -nomatch: - j ra - li v0, 1 - .set reorder -END(bcmp) diff --git a/lib/libc/mips/string/bcopy.S b/lib/libc/mips/string/bcopy.S deleted file mode 100644 index b4058633996..00000000000 --- a/lib/libc/mips/string/bcopy.S +++ /dev/null @@ -1,295 +0,0 @@ -/* $NetBSD: bcopy.S,v 1.3 2009/12/14 00:39:00 matt Exp $ */ - -/* - * Mach Operating System - * Copyright (c) 1993 Carnegie Mellon University - * All Rights Reserved. - * - * Permission to use, copy, modify and distribute this software and its - * documentation is hereby granted, provided that both the copyright - * notice and this permission notice appear in all copies of the - * software, derivative works or modified versions, and any portions - * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR - * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * - * Carnegie Mellon requests users of this software to return to - * - * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU - * School of Computer Science - * Carnegie Mellon University - * Pittsburgh PA 15213-3890 - * - * any improvements or extensions that they make and grant Carnegie Mellon - * the rights to redistribute these changes. - */ - -/* - * File: mips_bcopy.s - * Author: Chris Maeda - * Date: June 1993 - * - * Fast copy routine. Derived from aligned_block_copy. - */ - - -#include -#define _LOCORE /* XXX not really, just assembly-code source */ -#include - -#if defined(LIBC_SCCS) && !defined(lint) -#if 0 - ASMSTR("from: @(#)mips_bcopy.s 2.2 CMU 18/06/93") -#else - ASMSTR("$NetBSD: bcopy.S,v 1.3 2009/12/14 00:39:00 matt Exp $") -#endif -#endif /* LIBC_SCCS and not lint */ - -#ifdef __ABICALLS__ - .abicalls -#endif - -/* - * bcopy(caddr_t src, caddr_t dst, unsigned int len) - * - * a0 src address - * a1 dst address - * a2 length - */ - -#if defined(MEMCOPY) || defined(MEMMOVE) -#ifdef MEMCOPY -#define FUNCTION memcpy -#else -#define FUNCTION memmove -#endif -#define SRCREG a1 -#define DSTREG a0 -#else -#define FUNCTION bcopy -#define SRCREG a0 -#define DSTREG a1 -#endif - -#define SIZEREG a2 - -LEAF(FUNCTION) - .set noat - .set noreorder - -#if defined(MEMCOPY) || defined(MEMMOVE) - /* set up return value, while we still can */ - move v0,DSTREG -#endif - /* - * Make sure we can copy forwards. - */ - sltu t0,SRCREG,DSTREG # t0 == SRCREG < DSTREG - bne t0,zero,6f # copy backwards - - /* - * There are four alignment cases (with frequency) - * (Based on measurements taken with a DECstation 5000/200 - * inside a Mach kernel.) - * - * aligned -> aligned (mostly) - * unaligned -> aligned (sometimes) - * aligned,unaligned -> unaligned (almost never) - * - * Note that we could add another case that checks if - * the destination and source are unaligned but the - * copy is alignable. eg if src and dest are both - * on a halfword boundary. - */ - andi t1,DSTREG,(SZREG-1) # get last bits of dest - bne t1,zero,3f # dest unaligned - andi t0,SRCREG,(SZREG-1) # get last bits of src - bne t0,zero,5f - - /* - * Forward aligned->aligned copy, 8 words at a time. - */ -98: - li AT,-(SZREG*8) - and t0,SIZEREG,AT # count truncated to multiples - PTR_ADDU a3,SRCREG,t0 # run fast loop up to this addr - sltu AT,SRCREG,a3 # any work to do? - beq AT,zero,2f - PTR_SUBU SIZEREG,t0 - - /* - * loop body - */ -1: # cp - REG_L t3,(0*SZREG)(SRCREG) - REG_L v1,(1*SZREG)(SRCREG) - REG_L t0,(2*SZREG)(SRCREG) - REG_L t1,(3*SZREG)(SRCREG) - PTR_ADDU SRCREG,SZREG*8 - REG_S t3,(0*SZREG)(DSTREG) - REG_S v1,(1*SZREG)(DSTREG) - REG_S t0,(2*SZREG)(DSTREG) - REG_S t1,(3*SZREG)(DSTREG) - REG_L t1,(-1*SZREG)(SRCREG) - REG_L t0,(-2*SZREG)(SRCREG) - REG_L v1,(-3*SZREG)(SRCREG) - REG_L t3,(-4*SZREG)(SRCREG) - PTR_ADDU DSTREG,SZREG*8 - REG_S t1,(-1*SZREG)(DSTREG) - REG_S t0,(-2*SZREG)(DSTREG) - REG_S v1,(-3*SZREG)(DSTREG) - bne SRCREG,a3,1b - REG_S t3,(-4*SZREG)(DSTREG) - - /* - * Copy a word at a time, no loop unrolling. - */ -2: # wordcopy - andi t2,SIZEREG,(SZREG-1) # get byte count / SZREG - PTR_SUBU t2,SIZEREG,t2 # t2 = words to copy * SZREG - beq t2,zero,3f - PTR_ADDU t0,SRCREG,t2 # stop at t0 - PTR_SUBU SIZEREG,SIZEREG,t2 -1: - REG_L t3,0(SRCREG) - PTR_ADDU SRCREG,SZREG - REG_S t3,0(DSTREG) - bne SRCREG,t0,1b - PTR_ADDU DSTREG,SZREG - -3: # bytecopy - beq SIZEREG,zero,4f # nothing left to do? - nop -1: - lb t3,0(SRCREG) - PTR_ADDU SRCREG,1 - sb t3,0(DSTREG) - PTR_SUBU SIZEREG,1 - bgtz SIZEREG,1b - PTR_ADDU DSTREG,1 - -4: # copydone - j ra - nop - - /* - * Copy from unaligned source to aligned dest. - */ -5: # destaligned - andi t0,SIZEREG,(SZREG-1) # t0 = bytecount mod SZREG - PTR_SUBU a3,SIZEREG,t0 # number of words to transfer - beq a3,zero,3b - nop - move SIZEREG,t0 # this many to do after we are done - PTR_ADDU a3,SRCREG,a3 # stop point - -1: - REG_LHI t3,0(SRCREG) - REG_LLO t3,SZREG-1(SRCREG) - PTR_ADDI SRCREG,SZREG - REG_S t3,0(DSTREG) - bne SRCREG,a3,1b - PTR_ADDI DSTREG,SZREG - - b 3b - nop - -6: # backcopy -- based on above - PTR_ADDU SRCREG,SIZEREG - PTR_ADDU DSTREG,SIZEREG - andi t1,DSTREG,SZREG-1 # get last 3 bits of dest - bne t1,zero,3f - andi t0,SRCREG,SZREG-1 # get last 3 bits of src - bne t0,zero,5f - - /* - * Forward aligned->aligned copy, 8*4 bytes at a time. - */ - li AT,(-8*SZREG) - and t0,SIZEREG,AT # count truncated to multiple of 32 - beq t0,zero,2f # any work to do? - PTR_SUBU SIZEREG,t0 - PTR_SUBU a3,SRCREG,t0 - - /* - * loop body - */ -1: # cp - REG_L t3,(-4*SZREG)(SRCREG) - REG_L v1,(-3*SZREG)(SRCREG) - REG_L t0,(-2*SZREG)(SRCREG) - REG_L t1,(-1*SZREG)(SRCREG) - PTR_SUBU SRCREG,8*SZREG - REG_S t3,(-4*SZREG)(DSTREG) - REG_S v1,(-3*SZREG)(DSTREG) - REG_S t0,(-2*SZREG)(DSTREG) - REG_S t1,(-1*SZREG)(DSTREG) - REG_L t1,(3*SZREG)(SRCREG) - REG_L t0,(2*SZREG)(SRCREG) - REG_L v1,(1*SZREG)(SRCREG) - REG_L t3,(0*SZREG)(SRCREG) - PTR_SUBU DSTREG,8*SZREG - REG_S t1,(3*SZREG)(DSTREG) - REG_S t0,(2*SZREG)(DSTREG) - REG_S v1,(1*SZREG)(DSTREG) - bne SRCREG,a3,1b - REG_S t3,(0*SZREG)(DSTREG) - - /* - * Copy a word at a time, no loop unrolling. - */ -2: # wordcopy - andi t2,SIZEREG,SZREG-1 # get byte count / 4 - PTR_SUBU t2,SIZEREG,t2 # t2 = number of words to copy - beq t2,zero,3f - PTR_SUBU t0,SRCREG,t2 # stop at t0 - PTR_SUBU SIZEREG,SIZEREG,t2 -1: - REG_L t3,-SZREG(SRCREG) - PTR_SUBU SRCREG,SZREG - REG_S t3,-SZREG(DSTREG) - bne SRCREG,t0,1b - PTR_SUBU DSTREG,SZREG - -3: # bytecopy - beq SIZEREG,zero,4f # nothing left to do? - nop -1: - lb t3,-1(SRCREG) - PTR_SUBU SRCREG,1 - sb t3,-1(DSTREG) - PTR_SUBU SIZEREG,1 - bgtz SIZEREG,1b - PTR_SUBU DSTREG,1 - -4: # copydone - j ra - nop - - /* - * Copy from unaligned source to aligned dest. - */ -5: # destaligned - andi t0,SIZEREG,SZREG-1 # t0 = bytecount mod 4 - PTR_SUBU a3,SIZEREG,t0 # number of words to transfer - beq a3,zero,3b - nop - move SIZEREG,t0 # this many to do after we are done - PTR_SUBU a3,SRCREG,a3 # stop point - -1: - REG_LHI t3,-SZREG(SRCREG) - REG_LLO t3,-1(SRCREG) - PTR_SUBU SRCREG,SZREG - REG_S t3,-SZREG(DSTREG) - bne SRCREG,a3,1b - PTR_SUBU DSTREG,SZREG - - b 3b - nop - - .set reorder - .set at - END(FUNCTION) diff --git a/lib/libc/mips/string/bzero.S b/lib/libc/mips/string/bzero.S deleted file mode 100644 index 1ed5fd9c125..00000000000 --- a/lib/libc/mips/string/bzero.S +++ /dev/null @@ -1,81 +0,0 @@ -/* $NetBSD: bzero.S,v 1.10 2009/12/14 02:53:52 matt Exp $ */ - -/*- - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) -#if 0 - ASMSTR("from: @(#)bzero.s 8.1 (Berkeley) 6/4/93") -#else - ASMSTR("$NetBSD: bzero.S,v 1.10 2009/12/14 02:53:52 matt Exp $") -#endif -#endif /* LIBC_SCCS and not lint */ - -#define _LOCORE /* XXX not really, just assembly-code source */ -#include - -#ifdef __ABICALLS__ - .abicalls -#endif - -/* bzero(s1, n) */ - -LEAF(bzero) - .set noreorder - blt a1, 3*SZREG, smallclr # small amount to clear? - PTR_SUBU a3, zero, a0 # compute # bytes to word align address - and a3, a3, SZREG-1 - beq a3, zero, 1f # skip if word aligned - PTR_SUBU a1, a1, a3 # subtract from remaining count - REG_SHI zero, 0(a0) # clear 1, 2, or 3 bytes to align - PTR_ADDU a0, a0, a3 -1: - and v0, a1, SZREG-1 # compute number of words left - PTR_SUBU a3, a1, v0 - move a1, v0 - PTR_ADDU a3, a3, a0 # compute ending address -2: - PTR_ADDU a0, a0, SZREG # clear words - bne a0, a3, 2b # unrolling loop doesnt help - REG_S zero, -SZREG(a0) # since we are limited by memory speed -smallclr: - ble a1, zero, 2f - PTR_ADDU a3, a1, a0 # compute ending address -1: - PTR_ADDU a0, a0, 1 # clear bytes - bne a0, a3, 1b - sb zero, -1(a0) -2: - j ra - nop -END(bzero) diff --git a/lib/libc/mips/string/ffs.S b/lib/libc/mips/string/ffs.S deleted file mode 100644 index 49c4da039c3..00000000000 --- a/lib/libc/mips/string/ffs.S +++ /dev/null @@ -1,57 +0,0 @@ -/* $NetBSD: ffs.S,v 1.2 2009/12/14 00:39:00 matt Exp $ */ - -/*- - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) - ASMSTR("from: @(#)ffs.s 8.1 (Berkeley) 6/4/93") - ASMSTR("$NetBSD: ffs.S,v 1.2 2009/12/14 00:39:00 matt Exp $") -#endif /* LIBC_SCCS and not lint */ - -#ifdef __ABICALLS__ - .abicalls -#endif - -/* bit = ffs(value) */ - -LEAF(ffs) - move v0, zero - beq a0, zero, done -1: - and v1, a0, 1 # bit set? - addu v0, v0, 1 - srl a0, a0, 1 - beq v1, zero, 1b # no, continue -done: - j ra -END(ffs) diff --git a/lib/libc/mips/string/memcpy.S b/lib/libc/mips/string/memcpy.S deleted file mode 100644 index 7c9cfa71355..00000000000 --- a/lib/libc/mips/string/memcpy.S +++ /dev/null @@ -1,5 +0,0 @@ -/* $NetBSD: memcpy.S,v 1.1 2005/12/20 19:28:50 christos Exp $ */ - -#include -#define MEMCOPY -#include "bcopy.S" diff --git a/lib/libc/mips/string/memmove.S b/lib/libc/mips/string/memmove.S deleted file mode 100644 index 1bfcfb6af66..00000000000 --- a/lib/libc/mips/string/memmove.S +++ /dev/null @@ -1,5 +0,0 @@ -/* $NetBSD: memmove.S,v 1.1 2005/12/20 19:28:50 christos Exp $ */ - -#include -#define MEMMOVE -#include "bcopy.S" diff --git a/lib/libc/mips/string/strchr.S b/lib/libc/mips/string/strchr.S deleted file mode 100644 index 5c0cf16dcca..00000000000 --- a/lib/libc/mips/string/strchr.S +++ /dev/null @@ -1,64 +0,0 @@ -/* $NetBSD: index.S,v 1.8 2005/04/22 06:59:00 simonb Exp $ */ - -/*- - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) - ASMSTR("from: @(#)index.s 8.1 (Berkeley) 6/4/93") - ASMSTR("$NetBSD: index.S,v 1.8 2005/04/22 06:59:00 simonb Exp $") -#endif /* LIBC_SCCS and not lint */ - -#ifdef __ABICALLS__ - .abicalls -#endif - -/* - * char * - * strchr(const char *s, int c); - */ -LEAF(strchr) - and a1, a1, 0xff -1: - lbu a2, 0(a0) # get a byte - PTR_ADDU a0, a0, 1 - beq a2, a1, fnd - bne a2, zero, 1b -notfnd: - move v0, zero - j ra -fnd: - PTR_SUBU v0, a0, 1 - j ra -END(strchr) - -WEAK_ALIAS(index, strchr) diff --git a/lib/libc/mips/string/strcmp.S b/lib/libc/mips/string/strcmp.S deleted file mode 100644 index 6f8d64dda75..00000000000 --- a/lib/libc/mips/string/strcmp.S +++ /dev/null @@ -1,66 +0,0 @@ -/* $NetBSD: strcmp.S,v 1.2 2009/12/14 00:39:00 matt Exp $ */ - -/*- - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) - ASMSTR("from: @(#)strcmp.s 8.1 (Berkeley) 6/4/93") - ASMSTR("$NetBSD: strcmp.S,v 1.2 2009/12/14 00:39:00 matt Exp $") -#endif /* LIBC_SCCS and not lint */ - -#ifdef __ABICALLS__ - .abicalls -#endif - -/* - * NOTE: this version assumes unsigned chars in order to be "8 bit clean". - */ -LEAF(strcmp) -1: - lbu t0, 0(a0) # get two bytes and compare them - lbu t1, 0(a1) - beq t0, zero, LessOrEq # end of first string? - bne t0, t1, NotEq - lbu t0, 1(a0) # unroll loop - lbu t1, 1(a1) - PTR_ADD a0, a0, 2 - beq t0, zero, LessOrEq # end of first string? - PTR_ADD a1, a1, 2 - beq t0, t1, 1b -NotEq: - subu v0, t0, t1 - j ra -LessOrEq: - subu v0, zero, t1 - j ra -END(strcmp) diff --git a/lib/libc/mips/string/strlen.S b/lib/libc/mips/string/strlen.S deleted file mode 100644 index ecea8d0aa45..00000000000 --- a/lib/libc/mips/string/strlen.S +++ /dev/null @@ -1,53 +0,0 @@ -/* $NetBSD: strlen.S,v 1.2 2009/12/14 00:39:00 matt Exp $ */ - -/*- - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) - ASMSTR("from: @(#)strlen.s 8.1 (Berkeley) 6/4/93") - ASMSTR("$NetBSD: strlen.S,v 1.2 2009/12/14 00:39:00 matt Exp $") -#endif /* LIBC_SCCS and not lint */ - -#ifdef __ABICALLS__ - .abicalls -#endif - -LEAF(strlen) - PTR_ADDU v1, a0, 1 -1: - lb v0, 0(a0) # get byte from string - PTR_ADDU a0, a0, 1 # increment pointer - bne v0, zero, 1b # continue if not end - PTR_SUBU v0, a0, v1 # compute length - 1 for '\0' char - j ra -END(strlen) diff --git a/lib/libc/mips/string/strrchr.S b/lib/libc/mips/string/strrchr.S deleted file mode 100644 index d8e92fc4f9e..00000000000 --- a/lib/libc/mips/string/strrchr.S +++ /dev/null @@ -1,62 +0,0 @@ -/* $NetBSD: rindex.S,v 1.7 2003/08/07 16:42:16 agc Exp $ */ - -/*- - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#if defined(LIBC_SCCS) && !defined(lint) - ASMSTR("from: @(#)rindex.s 8.1 (Berkeley) 6/4/93") - ASMSTR("$NetBSD: rindex.S,v 1.7 2003/08/07 16:42:16 agc Exp $") -#endif /* LIBC_SCCS and not lint */ - -#ifdef __ABICALLS__ - .abicalls -#endif - -/* - * char * - * strrchr(const char *s, int c); - */ -LEAF(strrchr) - move v0, zero # default if not found - and a1, a1, 0xff -1: - lbu a3, 0(a0) # get a byte - PTR_ADDU a0, a0, 1 - bne a3, a1, 2f - PTR_SUBU v0, a0, 1 # save address of last match -2: - bne a3, zero, 1b # continue if not end - j ra -END(strrchr) - -WEAK_ALIAS(rindex, strrchr) diff --git a/lib/libc/mips/sys/Makefile.inc b/lib/libc/mips/sys/Makefile.inc deleted file mode 100644 index d19100cd2a9..00000000000 --- a/lib/libc/mips/sys/Makefile.inc +++ /dev/null @@ -1,8 +0,0 @@ - -SRCS+= trivial-vdso_tc.c \ - sched_getcpu_gen.c - -MDASM= Ovfork.S cerror.S syscall.S - -# Don't generate default code for these syscalls: -NOASM+= sbrk.o vfork.o diff --git a/lib/libc/mips/sys/Ovfork.S b/lib/libc/mips/sys/Ovfork.S deleted file mode 100644 index 27e2aa6e6e4..00000000000 --- a/lib/libc/mips/sys/Ovfork.S +++ /dev/null @@ -1,63 +0,0 @@ -/* $NetBSD: compat_Ovfork.S,v 1.1 2005/09/17 11:49:39 tsutsui Exp $ */ - -/*- - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "SYS.h" - -#if defined(LIBC_SCCS) && !defined(lint) - ASMSTR("from: @(#)Ovfork.s 8.1 (Berkeley) 6/4/93") - ASMSTR("$NetBSD: compat_Ovfork.S,v 1.1 2005/09/17 11:49:39 tsutsui Exp $") -#endif /* LIBC_SCCS and not lint */ - -/* - * pid = vfork(); - * - * v1 == 0 in parent process, v1 == 1 in child process. - * v0 == pid of child in parent, v0 == pid of parent in child. - */ - -LEAF(__sys_vfork) - WEAK_ALIAS(vfork, __sys_vfork) - WEAK_ALIAS(_vfork, __sys_vfork) - PIC_PROLOGUE(__sys_vfork) - li v0, SYS_vfork # system call number for vfork - syscall - beq a3, zero, 1f # jump if no errors - PIC_TAILCALL(__cerror) -1: - beq v1, zero, 2f # parent process ? - move v0, zero # return zero in child -2: - PIC_RETURN() -END(__sys_vfork) diff --git a/lib/libc/mips/sys/cerror.S b/lib/libc/mips/sys/cerror.S deleted file mode 100644 index 04e567f4b98..00000000000 --- a/lib/libc/mips/sys/cerror.S +++ /dev/null @@ -1,71 +0,0 @@ -/* $NetBSD: cerror.S,v 1.14 2009/12/14 01:07:42 matt Exp $ */ - -/*- - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "SYS.h" - -#if defined(LIBC_SCCS) && !defined(lint) -#if 0 - RCSID("from: @(#)cerror.s 8.1 (Berkeley) 6/16/93") -#else - RCSID("$NetBSD: cerror.S,v 1.14 2009/12/14 01:07:42 matt Exp $") -#endif -#endif /* LIBC_SCCS and not lint */ - - .globl _C_LABEL(__error) -NESTED_NOPROFILE(__cerror, CALLFRAME_SIZ, ra) - .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) - SETUP_GP - PTR_SUBU sp, sp, CALLFRAME_SIZ - SETUP_GP64(CALLFRAME_GP, __cerror) - SAVE_GP(CALLFRAME_GP) - - PTR_S ra, CALLFRAME_RA(sp) - REG_S v0, CALLFRAME_S0(sp) # save errno value - - PTR_LA t9, _C_LABEL(__error) # locate address of errno - jalr t9 - - REG_L t0, CALLFRAME_S0(sp) - PTR_L ra, CALLFRAME_RA(sp) - INT_S t0, 0(v0) # update errno value - - RESTORE_GP64 - PTR_ADDU sp, sp, CALLFRAME_SIZ - - li v0, -1 - li v1, -1 - - j ra -END(__cerror) diff --git a/lib/libc/mips/sys/syscall.S b/lib/libc/mips/sys/syscall.S deleted file mode 100644 index 5995db0b12e..00000000000 --- a/lib/libc/mips/sys/syscall.S +++ /dev/null @@ -1,43 +0,0 @@ -/* $NetBSD: syscall.S,v 1.5 2003/08/07 16:42:18 agc Exp $ */ - -/*- - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "SYS.h" - -#if defined(LIBC_SCCS) && !defined(lint) - ASMSTR("from: @(#)syscall.s 8.1 (Berkeley) 6/4/93") - ASMSTR("$NetBSD: syscall.S,v 1.5 2003/08/07 16:42:18 agc Exp $") -#endif /* LIBC_SCCS and not lint */ - -RSYSCALL(syscall) diff --git a/lib/libc/powerpc/Makefile.inc b/lib/libc/powerpc/Makefile.inc deleted file mode 100644 index 80ac23a9947..00000000000 --- a/lib/libc/powerpc/Makefile.inc +++ /dev/null @@ -1,4 +0,0 @@ - -# Long double is 64-bits -SRCS+=machdep_ldisd.c -SYM_MAPS+=${LIBC_SRCTOP}/powerpc/Symbol.map diff --git a/lib/libc/powerpc/SYS.h b/lib/libc/powerpc/SYS.h deleted file mode 100644 index 7fdf7c73431..00000000000 --- a/lib/libc/powerpc/SYS.h +++ /dev/null @@ -1,72 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2002 Benno Rice. All rights reserved. - * Copyright (c) 2002 David E. O'Brien. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of any contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $NetBSD: SYS.h,v 1.8 2002/01/14 00:55:56 thorpej Exp $ - */ - -#include -#include - -#define _SYSCALL(name) \ - .text; \ - .align 2; \ - li 0,(SYS_##name); \ - sc - -#define SYSCALL(name) \ - .text; \ - .align 2; \ -2: b CNAME(HIDENAME(cerror)); \ -ENTRY(__sys_##name); \ - WEAK_REFERENCE(__sys_##name, name); \ - WEAK_REFERENCE(__sys_##name, _##name); \ - _SYSCALL(name); \ - bso 2b - -#define PSEUDO(name) \ - .text; \ - .align 2; \ -ENTRY(__sys_##name); \ - WEAK_REFERENCE(__sys_##name, _##name); \ - _SYSCALL(name); \ - bnslr; \ - b CNAME(HIDENAME(cerror)); \ -END(__sys_##name) - -#define RSYSCALL(name) \ - .text; \ - .align 2; \ -ENTRY(__sys_##name); \ - WEAK_REFERENCE(__sys_##name, name); \ - WEAK_REFERENCE(__sys_##name, _##name); \ - _SYSCALL(name); \ - bnslr; \ - b CNAME(HIDENAME(cerror)); \ -END(__sys_##name) diff --git a/lib/libc/powerpc/Symbol.map b/lib/libc/powerpc/Symbol.map deleted file mode 100644 index a1246a38975..00000000000 --- a/lib/libc/powerpc/Symbol.map +++ /dev/null @@ -1,54 +0,0 @@ -/* - */ - -/* - * This only needs to contain symbols that are not listed in - * symbol maps from other parts of libc (i.e., not found in - * stdlib/Symbol.map, string/Symbol.map, sys/Symbol.map, ...). - */ -FBSD_1.0 { - /* PSEUDO syscalls */ - _exit; - - _mcount; - _setjmp; - _longjmp; - fabs; - __flt_rounds; - fpgetmask; - fpgetround; - fpgetsticky; - fpsetmask; - fpsetround; - __infinity; - __nan; - makecontext; - setjmp; - longjmp; - sigsetjmp; - siglongjmp; - htonl; - htons; - ntohl; - ntohs; - brk; - sbrk; - vfork; -}; - -FBSD_1.3 { - __eabi; -}; - -FBSDprivate_1.0 { - /* PSEUDO syscalls */ - _getlogin; - - _set_tp; - _fpgetsticky; - __makecontext; - __longjmp; - signalcontext; - __signalcontext; - __syncicache; -}; diff --git a/lib/libc/powerpc/_fpmath.h b/lib/libc/powerpc/_fpmath.h deleted file mode 100644 index 9bc7450aaca..00000000000 --- a/lib/libc/powerpc/_fpmath.h +++ /dev/null @@ -1,56 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003 David Schultz - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -union IEEEl2bits { - long double e; - struct { -#if _BYTE_ORDER == _LITTLE_ENDIAN - unsigned int manl :32; - unsigned int manh :20; - unsigned int exp :11; - unsigned int sign :1; -#else /* _BYTE_ORDER == _LITTLE_ENDIAN */ - unsigned int sign :1; - unsigned int exp :11; - unsigned int manh :20; - unsigned int manl :32; -#endif - } bits; -}; - -#define mask_nbit_l(u) ((void)0) -#define LDBL_IMPLICIT_NBIT -#define LDBL_NBIT 0 - -#define LDBL_MANH_SIZE 20 -#define LDBL_MANL_SIZE 32 - -#define LDBL_TO_ARRAY32(u, a) do { \ - (a)[0] = (uint32_t)(u).bits.manl; \ - (a)[1] = (uint32_t)(u).bits.manh; \ -} while(0) diff --git a/lib/libc/powerpc/arith.h b/lib/libc/powerpc/arith.h deleted file mode 100644 index 78138f328f0..00000000000 --- a/lib/libc/powerpc/arith.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * MD header for contrib/gdtoa - */ - -/* - * NOTE: The definitions in this file must be correct or strtod(3) and - * floating point formats in printf(3) will break! The file can be - * generated by running contrib/gdtoa/arithchk.c on the target - * architecture. See contrib/gdtoa/gdtoaimp.h for details. - */ - -#define IEEE_MC68k -#define Arith_Kind_ASL 2 -#define Double_Align diff --git a/lib/libc/powerpc/gd_qnan.h b/lib/libc/powerpc/gd_qnan.h deleted file mode 100644 index 83496e8fbae..00000000000 --- a/lib/libc/powerpc/gd_qnan.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * MD header for contrib/gdtoa - * - * This file can be generated by compiling and running contrib/gdtoa/qnan.c - * on the target architecture after arith.h has been generated. - */ - -#define f_QNAN 0x7fc00000 -#define d_QNAN0 0x7ff80000 -#define d_QNAN1 0x0 -#define ld_QNAN0 0x7ff80000 -#define ld_QNAN1 0x0 -#define ld_QNAN2 0x0 -#define ld_QNAN3 0x0 -#define ldus_QNAN0 0x7ff8 -#define ldus_QNAN1 0x0 -#define ldus_QNAN2 0x0 -#define ldus_QNAN3 0x0 -#define ldus_QNAN4 0x0 diff --git a/lib/libc/powerpc/gen/Makefile.common b/lib/libc/powerpc/gen/Makefile.common deleted file mode 100644 index dc90342a1de..00000000000 --- a/lib/libc/powerpc/gen/Makefile.common +++ /dev/null @@ -1,7 +0,0 @@ - -.PATH: ${LIBC_SRCTOP}/powerpc/gen - -SRCS += _ctx_start.S eabi.S infinity.c ldexp.c makecontext.c \ - signalcontext.c syncicache.c _get_tp.c _set_tp.c trivial-getcontextx.c - -CFLAGS._get_tp.c+= ${RTLD_HDRS} diff --git a/lib/libc/powerpc/gen/Makefile.inc b/lib/libc/powerpc/gen/Makefile.inc deleted file mode 100644 index efdc778e899..00000000000 --- a/lib/libc/powerpc/gen/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ - -.include "${LIBC_SRCTOP}/powerpc/gen/Makefile.common" - -SRCS += fabs.S flt_rounds.c fpgetmask.c fpgetround.c \ - fpgetsticky.c fpsetmask.c fpsetround.c \ - _setjmp.S setjmp.S sigsetjmp.S diff --git a/lib/libc/powerpc/gen/_ctx_start.S b/lib/libc/powerpc/gen/_ctx_start.S deleted file mode 100644 index e82bd1dcdb8..00000000000 --- a/lib/libc/powerpc/gen/_ctx_start.S +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (c) 2004 Suleiman Souhlal - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - #include - .globl CNAME(_ctx_done) - .globl CNAME(abort) - - ENTRY(_ctx_start) - mtlr %r14 - blrl /* branch to start function */ - mr %r3,%r15 /* pass pointer to ucontext as argument */ - bl CNAME(_ctx_done) /* branch to ctxt completion func */ - - /* - * we should never return from the - * above branch. - */ - /* Don't bother saving off %r30, we're already in a bad state. */ - bcl 20,31,1f -1: mflr %r30 - mr %r3,%r30 # save for _DYNAMIC - addis %r30,%r30,_GLOBAL_OFFSET_TABLE_-1b@ha - addi %r30,%r30,_GLOBAL_OFFSET_TABLE_-1b@l - bl PIC_PLT(CNAME(abort)) /* abort */ - END(_ctx_start) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc/gen/_get_tp.c b/lib/libc/powerpc/gen/_get_tp.c deleted file mode 100644 index 82bcb2825ab..00000000000 --- a/lib/libc/powerpc/gen/_get_tp.c +++ /dev/null @@ -1,45 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2021 The FreeBSD Foundation - * - * This software were developed by Konstantin Belousov - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include "libc_private.h" -#include "rtld.h" - -void * -_get_tp(void) -{ - Elf_Addr tp; - - __asm __volatile("mr %0,2" : "=r" (tp)); - return ((void *)(tp - TLS_TP_OFFSET - TLS_TCB_SIZE)); -} diff --git a/lib/libc/powerpc/gen/_set_tp.c b/lib/libc/powerpc/gen/_set_tp.c deleted file mode 100644 index cd2ff0bdbbf..00000000000 --- a/lib/libc/powerpc/gen/_set_tp.c +++ /dev/null @@ -1,35 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#include "libc_private.h" - -void -_set_tp(void *tpval) -{ - - __asm __volatile("mr 2,%0" :: "r"((char*)tpval + 0x7008)); -} diff --git a/lib/libc/powerpc/gen/_setjmp.S b/lib/libc/powerpc/gen/_setjmp.S deleted file mode 100644 index 8bbe259cf33..00000000000 --- a/lib/libc/powerpc/gen/_setjmp.S +++ /dev/null @@ -1,114 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: _setjmp.S,v 1.1 1997/03/29 20:55:53 thorpej Exp $ */ - -#include -/* - * C library -- _setjmp, _longjmp - * - * _longjmp(a,v) - * will generate a "return(v?v:1)" from the last call to - * _setjmp(a) - * by restoring registers from the stack. - * The previous signal state is NOT restored. - * - * jmpbuf layout: - * +------------+ - * | unused | - * +------------+ - * | unused | - * | | - * | (4 words) | - * | | - * +------------+ - * | saved regs | - * | ... | - */ - -ENTRY(_setjmp) - mflr %r11 - mfcr %r12 - mr %r10,%r1 - mr %r9,%r2 - stmw %r9,20(%r3) - - /* FPRs */ - stfd %f14,112+0*8(%r3) - stfd %f15,112+1*8(%r3) - stfd %f16,112+2*8(%r3) - stfd %f17,112+3*8(%r3) - stfd %f18,112+4*8(%r3) - stfd %f19,112+5*8(%r3) - stfd %f20,112+6*8(%r3) - stfd %f21,112+7*8(%r3) - stfd %f22,112+8*8(%r3) - stfd %f23,112+9*8(%r3) - stfd %f24,112+10*8(%r3) - stfd %f25,112+11*8(%r3) - stfd %f26,112+12*8(%r3) - stfd %f27,112+13*8(%r3) - stfd %f28,112+14*8(%r3) - stfd %f29,112+15*8(%r3) - stfd %f30,112+16*8(%r3) - stfd %f31,112+17*8(%r3) - - li %r3,0 - blr -END(_setjmp) - -ENTRY(_longjmp) - lmw %r9,20(%r3) - - /* FPRs */ - lfd %f14,112+0*8(%r3) - lfd %f15,112+1*8(%r3) - lfd %f16,112+2*8(%r3) - lfd %f17,112+3*8(%r3) - lfd %f18,112+4*8(%r3) - lfd %f19,112+5*8(%r3) - lfd %f20,112+6*8(%r3) - lfd %f21,112+7*8(%r3) - lfd %f22,112+8*8(%r3) - lfd %f23,112+9*8(%r3) - lfd %f24,112+10*8(%r3) - lfd %f25,112+11*8(%r3) - lfd %f26,112+12*8(%r3) - lfd %f27,112+13*8(%r3) - lfd %f28,112+14*8(%r3) - lfd %f29,112+15*8(%r3) - lfd %f30,112+16*8(%r3) - lfd %f31,112+17*8(%r3) - - mtlr %r11 - mtcr %r12 - mr %r1,%r10 - or. %r3,%r4,%r4 - bnelr - li %r3,1 - blr -END(_longjmp) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc/gen/eabi.S b/lib/libc/powerpc/gen/eabi.S deleted file mode 100644 index 49ea63c8263..00000000000 --- a/lib/libc/powerpc/gen/eabi.S +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (c) 2011 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -ENTRY(__eabi) - blr -END(__eabi) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc/gen/fabs.S b/lib/libc/powerpc/gen/fabs.S deleted file mode 100644 index d9dbf9d86fe..00000000000 --- a/lib/libc/powerpc/gen/fabs.S +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (c) 2004 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -/* - * double fabs(double) - */ -ENTRY(fabs) - fabs %f1,%f1 - blr -END(fabs) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc/gen/flt_rounds.c b/lib/libc/powerpc/gen/flt_rounds.c deleted file mode 100644 index 601a42321a1..00000000000 --- a/lib/libc/powerpc/gen/flt_rounds.c +++ /dev/null @@ -1,56 +0,0 @@ -/* $NetBSD: flt_rounds.c,v 1.4.10.3 2002/03/22 20:41:53 nathanw Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 1996 Mark Brinicombe - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Mark Brinicombe - * for the NetBSD Project. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include - -#ifndef _SOFT_FLOAT -static const int map[] = { - 1, /* round to nearest */ - 0, /* round to zero */ - 2, /* round to positive infinity */ - 3 /* round to negative infinity */ -}; - -int -__flt_rounds() -{ - uint64_t fpscr; - - __asm__ __volatile("mffs %0" : "=f"(fpscr)); - return map[(fpscr & 0x03)]; -} -#endif diff --git a/lib/libc/powerpc/gen/fpgetmask.c b/lib/libc/powerpc/gen/fpgetmask.c deleted file mode 100644 index b4399f23cf7..00000000000 --- a/lib/libc/powerpc/gen/fpgetmask.c +++ /dev/null @@ -1,48 +0,0 @@ -/* $NetBSD: fpgetmask.c,v 1.3 2002/01/13 21:45:47 thorpej Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include -#include - -#ifndef _SOFT_FLOAT -fp_except_t -fpgetmask() -{ - u_int64_t fpscr; - - __asm__("mffs %0" : "=f"(fpscr)); - return ((fp_except_t)((fpscr >> 3) & 0x1f)); -} -#endif diff --git a/lib/libc/powerpc/gen/fpgetround.c b/lib/libc/powerpc/gen/fpgetround.c deleted file mode 100644 index f6a98d3ffe1..00000000000 --- a/lib/libc/powerpc/gen/fpgetround.c +++ /dev/null @@ -1,48 +0,0 @@ -/* $NetBSD: fpgetround.c,v 1.3 2002/01/13 21:45:47 thorpej Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include -#include - -#ifndef _SOFT_FLOAT -fp_rnd_t -fpgetround() -{ - u_int64_t fpscr; - - __asm__("mffs %0" : "=f"(fpscr)); - return ((fp_rnd_t)(fpscr & 0x3)); -} -#endif diff --git a/lib/libc/powerpc/gen/fpgetsticky.c b/lib/libc/powerpc/gen/fpgetsticky.c deleted file mode 100644 index a79f4062c7f..00000000000 --- a/lib/libc/powerpc/gen/fpgetsticky.c +++ /dev/null @@ -1,54 +0,0 @@ -/* $NetBSD: fpgetsticky.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include - -#include "namespace.h" - -#include -#include - -#ifndef _SOFT_FLOAT -#ifdef __weak_alias -__weak_alias(fpgetsticky,_fpgetsticky) -#endif - -fp_except_t -fpgetsticky() -{ - u_int64_t fpscr; - - __asm__ __volatile("mffs %0" : "=f"(fpscr)); - return ((fp_except_t)((fpscr >> 25) & 0x1f)); -} -#endif diff --git a/lib/libc/powerpc/gen/fpsetmask.c b/lib/libc/powerpc/gen/fpsetmask.c deleted file mode 100644 index eb5884aa080..00000000000 --- a/lib/libc/powerpc/gen/fpsetmask.c +++ /dev/null @@ -1,52 +0,0 @@ -/* $NetBSD: fpsetmask.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include -#include - -#ifndef _SOFT_FLOAT -fp_except_t -fpsetmask(fp_except_t mask) -{ - u_int64_t fpscr; - fp_except_t old; - - __asm__("mffs %0" : "=f"(fpscr)); - old = (fp_except_t)((fpscr >> 3) & 0x1f); - fpscr = (fpscr & 0xffffff07) | ((mask & 0x1f) << 3); - __asm__ __volatile("mtfsf 0xff,%0" :: "f"(fpscr)); - return (old); -} -#endif diff --git a/lib/libc/powerpc/gen/fpsetround.c b/lib/libc/powerpc/gen/fpsetround.c deleted file mode 100644 index 82ec0ea354c..00000000000 --- a/lib/libc/powerpc/gen/fpsetround.c +++ /dev/null @@ -1,52 +0,0 @@ -/* $NetBSD: fpsetround.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include -#include - -#ifndef _SOFT_FLOAT -fp_rnd_t -fpsetround(fp_rnd_t rnd_dir) -{ - u_int64_t fpscr; - fp_rnd_t old; - - __asm__ __volatile("mffs %0" : "=f"(fpscr)); - old = (fp_rnd_t)(fpscr & 0x3); - fpscr = (fpscr & 0xfffffffc) | rnd_dir; - __asm__ __volatile("mtfsf 0xff,%0" :: "f"(fpscr)); - return (old); -} -#endif diff --git a/lib/libc/powerpc/gen/infinity.c b/lib/libc/powerpc/gen/infinity.c deleted file mode 100644 index 6e11371e6eb..00000000000 --- a/lib/libc/powerpc/gen/infinity.c +++ /dev/null @@ -1,28 +0,0 @@ -#include -#if 0 -#if defined(LIBC_SCCS) && !defined(lint) -__RCSID("$NetBSD: infinity.c,v 1.2 1998/11/14 19:31:02 christos Exp $"); -#endif /* LIBC_SCCS and not lint */ -#endif -/* infinity.c */ - -#include - -/* bytes for +Infinity on powerpc */ -const union __infinity_un __infinity = { -#if BYTE_ORDER == BIG_ENDIAN - { 0x7f, 0xf0, 0, 0, 0, 0, 0, 0 } -#else - { 0, 0, 0, 0, 0, 0, 0xf0, 0x7f } -#endif -}; - -/* bytes for NaN */ -const union __nan_un __nan = { -#if BYTE_ORDER == BIG_ENDIAN - {0xff, 0xc0, 0, 0} -#else - { 0, 0, 0xc0, 0xff } -#endif -}; - diff --git a/lib/libc/powerpc/gen/makecontext.c b/lib/libc/powerpc/gen/makecontext.c deleted file mode 100644 index eb3cf2bb3d3..00000000000 --- a/lib/libc/powerpc/gen/makecontext.c +++ /dev/null @@ -1,120 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 Suleiman Souhlal - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include - -#include -#include -#include -#include -#include - -__weak_reference(__makecontext, makecontext); - -void _ctx_done(ucontext_t *ucp); -void _ctx_start(void); - -void -_ctx_done(ucontext_t *ucp) -{ - if (ucp->uc_link == NULL) - exit(0); - else { - /* invalidate context */ - ucp->uc_mcontext.mc_len = 0; - - setcontext((const ucontext_t *)ucp->uc_link); - - abort(); /* should never return from above call */ - } -} - -void -__makecontext(ucontext_t *ucp, void (*start)(void), int argc, ...) -{ - mcontext_t *mc; - char *sp; - va_list ap; - int i, regargs, stackargs; - - /* Sanity checks */ - if ((ucp == NULL) || (argc < 0) - || (ucp->uc_stack.ss_sp == NULL) - || (ucp->uc_stack.ss_size < MINSIGSTKSZ)) { - /* invalidate context */ - ucp->uc_mcontext.mc_len = 0; - return; - } - - /* - * The stack must have space for the frame pointer, saved - * link register, overflow arguments, and be 16-byte - * aligned. - */ - stackargs = (argc > 8) ? argc - 8 : 0; - sp = (char *) ucp->uc_stack.ss_sp + ucp->uc_stack.ss_size - - sizeof(uint32_t)*(stackargs + 2); - sp = (char *)((uint32_t)sp & ~0x1f); - - mc = &ucp->uc_mcontext; - - /* - * Up to 8 register args. Assumes all args are 32-bit and - * integer only. Not sure how to cater for floating point, - * although 64-bit args will work if aligned correctly - * in the arg list. - */ - regargs = (argc > 8) ? 8 : argc; - va_start(ap, argc); - for (i = 0; i < regargs; i++) - mc->mc_gpr[3 + i] = va_arg(ap, uint32_t); - - /* - * Overflow args go onto the stack - */ - if (argc > 8) { - uint32_t *argp; - - /* Skip past frame pointer and saved LR */ - argp = (uint32_t *)sp + 2; - - for (i = 0; i < stackargs; i++) - *argp++ = va_arg(ap, uint32_t); - } - va_end(ap); - - /* - * Use caller-saved regs 14/15 to hold params that _ctx_start - * will use to invoke the user-supplied func - */ - mc->mc_srr0 = (uint32_t) _ctx_start; - mc->mc_gpr[1] = (uint32_t) sp; /* new stack pointer */ - mc->mc_gpr[14] = (uint32_t) start; /* r14 <- start */ - mc->mc_gpr[15] = (uint32_t) ucp; /* r15 <- ucp */ -} diff --git a/lib/libc/powerpc/gen/setjmp.S b/lib/libc/powerpc/gen/setjmp.S deleted file mode 100644 index 0db3c4de664..00000000000 --- a/lib/libc/powerpc/gen/setjmp.S +++ /dev/null @@ -1,132 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: setjmp.S,v 1.3 1998/10/03 12:30:38 tsubai Exp $ */ - -#include -#include - -/* - * C library -- setjmp, longjmp - * - * longjmp(a,v) - * will generate a "return(v?v:1)" from the last call to - * setjmp(a) - * by restoring registers from the stack. - * The previous signal state is restored. - * - * jmpbuf layout: - * +------------+ - * | unused | - * +------------+ - * | sig state | - * | | - * | (4 words) | - * | | - * +------------+ - * | saved regs | - * | ... | - */ - -ENTRY(setjmp) - mr %r6,%r3 - li %r3,1 /* SIG_BLOCK, but doesn't matter */ - /* since set == NULL */ - li %r4,0 /* set = NULL */ - mr %r5,%r6 /* &oset */ - addi %r5,%r5,4 - li %r0, SYS_sigprocmask /*sigprocmask(SIG_BLOCK, NULL, &oset)*/ - sc /*assume no error XXX */ - mflr %r11 /* r11 <- link reg */ - mfcr %r12 /* r12 <- condition reg */ - mr %r10,%r1 /* r10 <- stackptr */ - mr %r9,%r2 /* r9 <- global ptr */ - stmw %r9,20(%r6) - - /* FPRs */ - stfd %f14,112+0*8(%r6) - stfd %f15,112+1*8(%r6) - stfd %f16,112+2*8(%r6) - stfd %f17,112+3*8(%r6) - stfd %f18,112+4*8(%r6) - stfd %f19,112+5*8(%r6) - stfd %f20,112+6*8(%r6) - stfd %f21,112+7*8(%r6) - stfd %f22,112+8*8(%r6) - stfd %f23,112+9*8(%r6) - stfd %f24,112+10*8(%r6) - stfd %f25,112+11*8(%r6) - stfd %f26,112+12*8(%r6) - stfd %f27,112+13*8(%r6) - stfd %f28,112+14*8(%r6) - stfd %f29,112+15*8(%r6) - stfd %f30,112+16*8(%r6) - stfd %f31,112+17*8(%r6) - - li %r3,0 /* return (0) */ - blr -END(setjmp) - - WEAK_REFERENCE(CNAME(__longjmp), longjmp) -ENTRY(__longjmp) - lmw %r9,20(%r3) /* restore regs */ - - /* FPRs */ - lfd %f14,112+0*8(%r3) - lfd %f15,112+1*8(%r3) - lfd %f16,112+2*8(%r3) - lfd %f17,112+3*8(%r3) - lfd %f18,112+4*8(%r3) - lfd %f19,112+5*8(%r3) - lfd %f20,112+6*8(%r3) - lfd %f21,112+7*8(%r3) - lfd %f22,112+8*8(%r3) - lfd %f23,112+9*8(%r3) - lfd %f24,112+10*8(%r3) - lfd %f25,112+11*8(%r3) - lfd %f26,112+12*8(%r3) - lfd %f27,112+13*8(%r3) - lfd %f28,112+14*8(%r3) - lfd %f29,112+15*8(%r3) - lfd %f30,112+16*8(%r3) - lfd %f31,112+17*8(%r3) - - mr %r6,%r4 /* save val param */ - mtlr %r11 /* r11 -> link reg */ - mtcr %r12 /* r12 -> condition reg */ - mr %r1,%r10 /* r10 -> stackptr */ - mr %r4,%r3 - li %r3,3 /* SIG_SETMASK */ - addi %r4,%r4,4 /* &set */ - li %r5,0 /* oset = NULL */ - li %r0,SYS_sigprocmask /* sigprocmask(SIG_SET, &set, NULL) */ - sc /* assume no error XXX */ - or. %r3,%r6,%r6 - bnelr - li %r3,1 - blr -END(__longjmp) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc/gen/signalcontext.c b/lib/libc/powerpc/gen/signalcontext.c deleted file mode 100644 index 253f1c8a762..00000000000 --- a/lib/libc/powerpc/gen/signalcontext.c +++ /dev/null @@ -1,103 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 Marcel Moolenaar, Peter Grehan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include - -typedef void (*handler_t)(uint32_t, uint32_t, uint32_t); - -/* Prototypes */ -static void ctx_wrapper(ucontext_t *ucp, handler_t func, uint32_t sig, - uint32_t sig_si, uint32_t sig_uc); - -__weak_reference(__signalcontext, signalcontext); - -int -__signalcontext(ucontext_t *ucp, int sig, __sighandler_t *func) -{ - siginfo_t *sig_si; - ucontext_t *sig_uc; - uint32_t sp; - - /* Bail out if we don't have a valid ucontext pointer. */ - if (ucp == NULL) - abort(); - - /* - * Build a 16-byte-aligned signal frame - */ - sp = (ucp->uc_mcontext.mc_gpr[1] - sizeof(ucontext_t)) & ~15UL; - sig_uc = (ucontext_t *)sp; - bcopy(ucp, sig_uc, sizeof(*sig_uc)); - sp = (sp - sizeof(siginfo_t)) & ~15UL; - sig_si = (siginfo_t *)sp; - bzero(sig_si, sizeof(*sig_si)); - sig_si->si_signo = sig; - - /* - * Subtract 8 bytes from stack to allow for frameptr - */ - sp -= 2*sizeof(uint32_t); - sp &= ~15UL; - - /* - * Setup the ucontext of the signal handler. - */ - bzero(&ucp->uc_mcontext, sizeof(ucp->uc_mcontext)); - ucp->uc_link = sig_uc; - sigdelset(&ucp->uc_sigmask, sig); - - ucp->uc_mcontext.mc_vers = _MC_VERSION; - ucp->uc_mcontext.mc_len = sizeof(struct __mcontext); - ucp->uc_mcontext.mc_srr0 = (uint32_t) ctx_wrapper; - ucp->uc_mcontext.mc_gpr[1] = (uint32_t) sp; - ucp->uc_mcontext.mc_gpr[3] = (uint32_t) func; - ucp->uc_mcontext.mc_gpr[4] = (uint32_t) sig; - ucp->uc_mcontext.mc_gpr[5] = (uint32_t) sig_si; - ucp->uc_mcontext.mc_gpr[6] = (uint32_t) sig_uc; - - return (0); -} - -static void -ctx_wrapper(ucontext_t *ucp, handler_t func, uint32_t sig, uint32_t sig_si, - uint32_t sig_uc) -{ - - (*func)(sig, sig_si, sig_uc); - if (ucp->uc_link == NULL) - exit(0); - setcontext((const ucontext_t *)ucp->uc_link); - /* should never get here */ - abort(); - /* NOTREACHED */ -} diff --git a/lib/libc/powerpc/gen/sigsetjmp.S b/lib/libc/powerpc/gen/sigsetjmp.S deleted file mode 100644 index b86387204fb..00000000000 --- a/lib/libc/powerpc/gen/sigsetjmp.S +++ /dev/null @@ -1,140 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: sigsetjmp.S,v 1.4 1998/10/03 12:30:38 tsubai Exp $ */ - -#include -/* - * C library -- sigsetjmp, siglongjmp - * - * siglongjmp(a,v) - * will generate a "return(v?v:1)" from the last call to - * sigsetjmp(a, savemask) - * by restoring registers from the stack. - * The previous signal state is restored if savemask is non-zero - * - * jmpbuf layout: - * +------------+ - * | savemask | - * +------------+ - * | sig state | - * | | - * | (4 words) | - * | | - * +------------+ - * | saved regs | - * | ... | - */ - - -#include - -ENTRY(sigsetjmp) - mr %r6,%r3 - stw %r4,0(%r3) - or. %r7,%r4,%r4 - beq 1f - li %r3,1 /* SIG_BLOCK, but doesn't matter */ - /* since set == NULL */ - li %r4,0 /* set = NULL */ - mr %r5,%r6 /* &oset */ - addi %r5,%r5,4 - li %r0, SYS_sigprocmask /* sigprocmask(SIG_BLOCK, NULL, &oset)*/ - sc /* assume no error XXX */ -1: - mflr %r11 - mfcr %r12 - mr %r10,%r1 - mr %r9,%r2 - stmw %r9,20(%r6) - - /* FPRs */ - stfd %f14,112+0*8(%r6) - stfd %f15,112+1*8(%r6) - stfd %f16,112+2*8(%r6) - stfd %f17,112+3*8(%r6) - stfd %f18,112+4*8(%r6) - stfd %f19,112+5*8(%r6) - stfd %f20,112+6*8(%r6) - stfd %f21,112+7*8(%r6) - stfd %f22,112+8*8(%r6) - stfd %f23,112+9*8(%r6) - stfd %f24,112+10*8(%r6) - stfd %f25,112+11*8(%r6) - stfd %f26,112+12*8(%r6) - stfd %f27,112+13*8(%r6) - stfd %f28,112+14*8(%r6) - stfd %f29,112+15*8(%r6) - stfd %f30,112+16*8(%r6) - stfd %f31,112+17*8(%r6) - - li %r3,0 - blr -END(sigsetjmp) - -ENTRY(siglongjmp) - lmw %r9,20(%r3) - - /* FPRs */ - lfd %f14,112+0*8(%r3) - lfd %f15,112+1*8(%r3) - lfd %f16,112+2*8(%r3) - lfd %f17,112+3*8(%r3) - lfd %f18,112+4*8(%r3) - lfd %f19,112+5*8(%r3) - lfd %f20,112+6*8(%r3) - lfd %f21,112+7*8(%r3) - lfd %f22,112+8*8(%r3) - lfd %f23,112+9*8(%r3) - lfd %f24,112+10*8(%r3) - lfd %f25,112+11*8(%r3) - lfd %f26,112+12*8(%r3) - lfd %f27,112+13*8(%r3) - lfd %f28,112+14*8(%r3) - lfd %f29,112+15*8(%r3) - lfd %f30,112+16*8(%r3) - lfd %f31,112+17*8(%r3) - - lwz %r7,0(%r3) - mr %r6,%r4 - mtlr %r11 - mtcr %r12 - mr %r1,%r10 - or. %r7,%r7,%r7 - beq 1f - mr %r4,%r3 - li %r3,3 /* SIG_SETMASK */ - addi %r4,%r4,4 /* &set */ - li %r5,0 /* oset = NULL */ - li %r0,SYS_sigprocmask /* sigprocmask(SIG_SET, &set, NULL) */ - sc /* assume no error XXX */ -1: - or. %r3,%r6,%r6 - bnelr - li %r3,1 - blr -END(siglongjmp) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc/gen/syncicache.c b/lib/libc/powerpc/gen/syncicache.c deleted file mode 100644 index 6376cb0e576..00000000000 --- a/lib/libc/powerpc/gen/syncicache.c +++ /dev/null @@ -1,100 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1995-1997, 1999 Wolfgang Solfrank. - * Copyright (C) 1995-1997, 1999 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: syncicache.c,v 1.2 1999/05/05 12:36:40 tsubai Exp $ - */ - -#include -#if defined(_KERNEL) || defined(_STANDALONE) -#include -#include -#include -#endif -#include - -#include -#include - -#ifdef _STANDALONE -int cacheline_size = 32; -#endif - -#if !defined(_KERNEL) && !defined(_STANDALONE) -#include - -int cacheline_size = 0; - -static void getcachelinesize(void); - -static void -getcachelinesize() -{ - static int cachemib[] = { CTL_MACHDEP, CPU_CACHELINE }; - int clen; - - clen = sizeof(cacheline_size); - - if (sysctl(cachemib, nitems(cachemib), &cacheline_size, &clen, - NULL, 0) < 0 || !cacheline_size) { - abort(); - } -} -#endif - -void -__syncicache(void *from, int len) -{ - int l, off; - char *p; - -#if !defined(_KERNEL) && !defined(_STANDALONE) - if (!cacheline_size) - getcachelinesize(); -#endif - - off = (u_int)from & (cacheline_size - 1); - l = len += off; - p = (char *)from - off; - - do { - __asm __volatile ("dcbst 0,%0" :: "r"(p)); - p += cacheline_size; - } while ((l -= cacheline_size) > 0); - __asm __volatile ("sync"); - p = (char *)from - off; - do { - __asm __volatile ("icbi 0,%0" :: "r"(p)); - p += cacheline_size; - } while ((len -= cacheline_size) > 0); - __asm __volatile ("sync; isync"); -} - diff --git a/lib/libc/powerpc/softfloat/milieu.h b/lib/libc/powerpc/softfloat/milieu.h deleted file mode 100644 index 6139aa58b98..00000000000 --- a/lib/libc/powerpc/softfloat/milieu.h +++ /dev/null @@ -1,48 +0,0 @@ -/* $NetBSD: milieu.h,v 1.1 2000/12/29 20:13:54 bjh21 Exp $ */ - -/* -=============================================================================== - -This C header file is part of the SoftFloat IEC/IEEE Floating-point -Arithmetic Package, Release 2a. - -Written by John R. Hauser. This work was made possible in part by the -International Computer Science Institute, located at Suite 600, 1947 Center -Street, Berkeley, California 94704. Funding was partially provided by the -National Science Foundation under grant MIP-9311980. The original version -of this code was written as part of a project to build a fixed-point vector -processor in collaboration with the University of California at Berkeley, -overseen by Profs. Nelson Morgan and John Wawrzynek. More information -is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/ -arithmetic/SoftFloat.html'. - -THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort -has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT -TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO -PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY -AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE. - -Derivative works are acceptable, even for commercial purposes, so long as -(1) they include prominent notice that the work is derivative, and (2) they -include prominent notice akin to these four paragraphs for those parts of -this code that are retained. - -=============================================================================== -*/ - -/* -------------------------------------------------------------------------------- -Include common integer types and flags. -------------------------------------------------------------------------------- -*/ -#include "powerpc-gcc.h" - -/* -------------------------------------------------------------------------------- -Symbolic Boolean literals. -------------------------------------------------------------------------------- -*/ -enum { - FALSE = 0, - TRUE = 1 -}; diff --git a/lib/libc/powerpc/softfloat/powerpc-gcc.h b/lib/libc/powerpc/softfloat/powerpc-gcc.h deleted file mode 100644 index 4520826cc36..00000000000 --- a/lib/libc/powerpc/softfloat/powerpc-gcc.h +++ /dev/null @@ -1,95 +0,0 @@ -/* $NetBSD: arm-gcc.h,v 1.2 2001/02/21 18:09:25 bjh21 Exp $ */ - -/* -------------------------------------------------------------------------------- -One of the macros `BIGENDIAN' or `LITTLEENDIAN' must be defined. -------------------------------------------------------------------------------- -*/ -#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ -#define LITTLEENDIAN -#else -#define BIGENDIAN -#endif - -/* -------------------------------------------------------------------------------- -The macro `BITS64' can be defined to indicate that 64-bit integer types are -supported by the compiler. -------------------------------------------------------------------------------- -*/ -#define BITS64 - -/* -------------------------------------------------------------------------------- -Each of the following `typedef's defines the most convenient type that holds -integers of at least as many bits as specified. For example, `uint8' should -be the most convenient type that can hold unsigned integers of as many as -8 bits. The `flag' type must be able to hold either a 0 or 1. For most -implementations of C, `flag', `uint8', and `int8' should all be `typedef'ed -to the same as `int'. -------------------------------------------------------------------------------- -*/ -typedef int flag; -typedef unsigned int uint8; -typedef int int8; -typedef unsigned int uint16; -typedef int int16; -typedef unsigned int uint32; -typedef signed int int32; -#ifdef BITS64 -typedef unsigned long long int uint64; -typedef signed long long int int64; -#endif - -/* -------------------------------------------------------------------------------- -Each of the following `typedef's defines a type that holds integers -of _exactly_ the number of bits specified. For instance, for most -implementation of C, `bits16' and `sbits16' should be `typedef'ed to -`unsigned short int' and `signed short int' (or `short int'), respectively. -------------------------------------------------------------------------------- -*/ -typedef unsigned char bits8; -typedef signed char sbits8; -typedef unsigned short int bits16; -typedef signed short int sbits16; -typedef unsigned int bits32; -typedef signed int sbits32; -#ifdef BITS64 -typedef unsigned long long int bits64; -typedef signed long long int sbits64; -#endif - -#ifdef BITS64 -/* -------------------------------------------------------------------------------- -The `LIT64' macro takes as its argument a textual integer literal and -if necessary ``marks'' the literal as having a 64-bit integer type. -For example, the GNU C Compiler (`gcc') requires that 64-bit literals be -appended with the letters `LL' standing for `long long', which is `gcc's -name for the 64-bit integer type. Some compilers may allow `LIT64' to be -defined as the identity macro: `#define LIT64( a ) a'. -------------------------------------------------------------------------------- -*/ -#define LIT64( a ) a##LL -#endif - -/* -------------------------------------------------------------------------------- -The macro `INLINE' can be used before functions that should be inlined. If -a compiler does not support explicit inlining, this macro should be defined -to be `static'. -------------------------------------------------------------------------------- -*/ -#define INLINE static __inline - -/* -------------------------------------------------------------------------------- -The ARM FPA is odd in that it stores doubles high-order word first, no matter -what the endianness of the CPU. VFP is sane. -------------------------------------------------------------------------------- -*/ -#if defined(SOFTFLOAT_FOR_GCC) -#define FLOAT64_DEMANGLE(a) (a) -#define FLOAT64_MANGLE(a) (a) -#endif diff --git a/lib/libc/powerpc/softfloat/softfloat.h b/lib/libc/powerpc/softfloat/softfloat.h deleted file mode 100644 index b20cb3e7aa0..00000000000 --- a/lib/libc/powerpc/softfloat/softfloat.h +++ /dev/null @@ -1,306 +0,0 @@ -/* $NetBSD: softfloat.h,v 1.6 2002/05/12 13:12:46 bjh21 Exp $ */ - -/* This is a derivative work. */ - -/* -=============================================================================== - -This C header file is part of the SoftFloat IEC/IEEE Floating-point -Arithmetic Package, Release 2a. - -Written by John R. Hauser. This work was made possible in part by the -International Computer Science Institute, located at Suite 600, 1947 Center -Street, Berkeley, California 94704. Funding was partially provided by the -National Science Foundation under grant MIP-9311980. The original version -of this code was written as part of a project to build a fixed-point vector -processor in collaboration with the University of California at Berkeley, -overseen by Profs. Nelson Morgan and John Wawrzynek. More information -is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/ -arithmetic/SoftFloat.html'. - -THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort -has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT -TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO -PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY -AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE. - -Derivative works are acceptable, even for commercial purposes, so long as -(1) they include prominent notice that the work is derivative, and (2) they -include prominent notice akin to these four paragraphs for those parts of -this code that are retained. - -=============================================================================== -*/ - -/* -------------------------------------------------------------------------------- -The macro `FLOATX80' must be defined to enable the extended double-precision -floating-point format `floatx80'. If this macro is not defined, the -`floatx80' type will not be defined, and none of the functions that either -input or output the `floatx80' type will be defined. The same applies to -the `FLOAT128' macro and the quadruple-precision format `float128'. -------------------------------------------------------------------------------- -*/ -/* #define FLOATX80 */ -/* #define FLOAT128 */ - -#include - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point types. -------------------------------------------------------------------------------- -*/ -typedef unsigned int float32; -typedef unsigned long long float64; -#ifdef FLOATX80 -typedef struct { - unsigned short high; - unsigned long long low; -} floatx80; -#endif -#ifdef FLOAT128 -typedef struct { - unsigned long long high, low; -} float128; -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point underflow tininess-detection mode. -------------------------------------------------------------------------------- -*/ -#ifndef SOFTFLOAT_FOR_GCC -extern int8 float_detect_tininess; -#endif -enum { - float_tininess_after_rounding = 0, - float_tininess_before_rounding = 1 -}; - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point rounding mode. -------------------------------------------------------------------------------- -*/ -extern fp_rnd_t float_rounding_mode; -enum { - float_round_nearest_even = FP_RN, - float_round_to_zero = FP_RZ, - float_round_down = FP_RM, - float_round_up = FP_RP -}; - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point exception flags. -------------------------------------------------------------------------------- -*/ -typedef fp_except_t fp_except; - -extern fp_except float_exception_flags; -extern fp_except float_exception_mask; -enum { - float_flag_inexact = FP_X_IMP, - float_flag_underflow = FP_X_UFL, - float_flag_overflow = FP_X_OFL, - float_flag_divbyzero = FP_X_DZ, - float_flag_invalid = FP_X_INV -}; - -/* -------------------------------------------------------------------------------- -Routine to raise any or all of the software IEC/IEEE floating-point -exception flags. -------------------------------------------------------------------------------- -*/ -void float_raise( fp_except ); - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE integer-to-floating-point conversion routines. -------------------------------------------------------------------------------- -*/ -float32 int32_to_float32( int ); -float64 int32_to_float64( int ); -#ifdef FLOATX80 -floatx80 int32_to_floatx80( int ); -#endif -#ifdef FLOAT128 -float128 int32_to_float128( int ); -#endif -float32 int64_to_float32( long long ); -float64 int64_to_float64( long long ); -#ifdef FLOATX80 -floatx80 int64_to_floatx80( long long ); -#endif -#ifdef FLOAT128 -float128 int64_to_float128( long long ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE single-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int float32_to_int32( float32 ); -int float32_to_int32_round_to_zero( float32 ); -unsigned int float32_to_uint32_round_to_zero( float32 ); -long long float32_to_int64( float32 ); -long long float32_to_int64_round_to_zero( float32 ); -float64 float32_to_float64( float32 ); -#ifdef FLOATX80 -floatx80 float32_to_floatx80( float32 ); -#endif -#ifdef FLOAT128 -float128 float32_to_float128( float32 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE single-precision operations. -------------------------------------------------------------------------------- -*/ -float32 float32_round_to_int( float32 ); -float32 float32_add( float32, float32 ); -float32 float32_sub( float32, float32 ); -float32 float32_mul( float32, float32 ); -float32 float32_div( float32, float32 ); -float32 float32_rem( float32, float32 ); -float32 float32_sqrt( float32 ); -int float32_eq( float32, float32 ); -int float32_le( float32, float32 ); -int float32_lt( float32, float32 ); -int float32_eq_signaling( float32, float32 ); -int float32_le_quiet( float32, float32 ); -int float32_lt_quiet( float32, float32 ); -#ifndef SOFTFLOAT_FOR_GCC -int float32_is_signaling_nan( float32 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE double-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int float64_to_int32( float64 ); -int float64_to_int32_round_to_zero( float64 ); -unsigned int float64_to_uint32_round_to_zero( float64 ); -long long float64_to_int64( float64 ); -long long float64_to_int64_round_to_zero( float64 ); -float32 float64_to_float32( float64 ); -#ifdef FLOATX80 -floatx80 float64_to_floatx80( float64 ); -#endif -#ifdef FLOAT128 -float128 float64_to_float128( float64 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE double-precision operations. -------------------------------------------------------------------------------- -*/ -float64 float64_round_to_int( float64 ); -float64 float64_add( float64, float64 ); -float64 float64_sub( float64, float64 ); -float64 float64_mul( float64, float64 ); -float64 float64_div( float64, float64 ); -float64 float64_rem( float64, float64 ); -float64 float64_sqrt( float64 ); -int float64_eq( float64, float64 ); -int float64_le( float64, float64 ); -int float64_lt( float64, float64 ); -int float64_eq_signaling( float64, float64 ); -int float64_le_quiet( float64, float64 ); -int float64_lt_quiet( float64, float64 ); -#ifndef SOFTFLOAT_FOR_GCC -int float64_is_signaling_nan( float64 ); -#endif - -#ifdef FLOATX80 - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE extended double-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int floatx80_to_int32( floatx80 ); -int floatx80_to_int32_round_to_zero( floatx80 ); -long long floatx80_to_int64( floatx80 ); -long long floatx80_to_int64_round_to_zero( floatx80 ); -float32 floatx80_to_float32( floatx80 ); -float64 floatx80_to_float64( floatx80 ); -#ifdef FLOAT128 -float128 floatx80_to_float128( floatx80 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE extended double-precision rounding precision. Valid -values are 32, 64, and 80. -------------------------------------------------------------------------------- -*/ -extern int floatx80_rounding_precision; - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE extended double-precision operations. -------------------------------------------------------------------------------- -*/ -floatx80 floatx80_round_to_int( floatx80 ); -floatx80 floatx80_add( floatx80, floatx80 ); -floatx80 floatx80_sub( floatx80, floatx80 ); -floatx80 floatx80_mul( floatx80, floatx80 ); -floatx80 floatx80_div( floatx80, floatx80 ); -floatx80 floatx80_rem( floatx80, floatx80 ); -floatx80 floatx80_sqrt( floatx80 ); -int floatx80_eq( floatx80, floatx80 ); -int floatx80_le( floatx80, floatx80 ); -int floatx80_lt( floatx80, floatx80 ); -int floatx80_eq_signaling( floatx80, floatx80 ); -int floatx80_le_quiet( floatx80, floatx80 ); -int floatx80_lt_quiet( floatx80, floatx80 ); -int floatx80_is_signaling_nan( floatx80 ); - -#endif - -#ifdef FLOAT128 - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE quadruple-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int float128_to_int32( float128 ); -int float128_to_int32_round_to_zero( float128 ); -long long float128_to_int64( float128 ); -long long float128_to_int64_round_to_zero( float128 ); -float32 float128_to_float32( float128 ); -float64 float128_to_float64( float128 ); -#ifdef FLOATX80 -floatx80 float128_to_floatx80( float128 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE quadruple-precision operations. -------------------------------------------------------------------------------- -*/ -float128 float128_round_to_int( float128 ); -float128 float128_add( float128, float128 ); -float128 float128_sub( float128, float128 ); -float128 float128_mul( float128, float128 ); -float128 float128_div( float128, float128 ); -float128 float128_rem( float128, float128 ); -float128 float128_sqrt( float128 ); -int float128_eq( float128, float128 ); -int float128_le( float128, float128 ); -int float128_lt( float128, float128 ); -int float128_eq_signaling( float128, float128 ); -int float128_le_quiet( float128, float128 ); -int float128_lt_quiet( float128, float128 ); -int float128_is_signaling_nan( float128 ); - -#endif - diff --git a/lib/libc/powerpc/static_tls.h b/lib/libc/powerpc/static_tls.h deleted file mode 100644 index 9ae38c71a51..00000000000 --- a/lib/libc/powerpc/static_tls.h +++ /dev/null @@ -1,44 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2019 The FreeBSD Foundation - * - * This software was developed by Konstantin Belousov - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _LIBC_POWERPC_STATIC_TLS_H -#define _LIBC_POWERPC_STATIC_TLS_H - -static __inline uintptr_t -_libc_get_static_tls_base(size_t offset) -{ - uintptr_t tlsbase; - - __asm __volatile("mr %0,2" : "=r"(tlsbase)); - tlsbase += offset - 0x7008; - return (tlsbase); -} - -#endif diff --git a/lib/libc/powerpc/sys/Makefile.inc b/lib/libc/powerpc/sys/Makefile.inc deleted file mode 100644 index 17b7b3b2611..00000000000 --- a/lib/libc/powerpc/sys/Makefile.inc +++ /dev/null @@ -1,5 +0,0 @@ - -SRCS+= __vdso_gettc.c \ - sched_getcpu_gen.c - -MDASM+= cerror.S diff --git a/lib/libc/powerpc/sys/__vdso_gettc.c b/lib/libc/powerpc/sys/__vdso_gettc.c deleted file mode 100644 index 21f0f2dd87e..00000000000 --- a/lib/libc/powerpc/sys/__vdso_gettc.c +++ /dev/null @@ -1,66 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2020 Brandon Bergren - * - * This software was developed by Konstantin Belousov - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include "libc_private.h" - -#pragma weak __vdso_gettc -int -__vdso_gettc(const struct vdso_timehands *th, u_int *tc) -{ - - if (__predict_false(th->th_algo != VDSO_TH_ALGO_PPC_TB)) - return (ENOSYS); - /* - * While the timebase is a 64 bit quantity, we are only interested - * in the lower 32 bits of it. - */ - *tc = mfspr(TBR_TBL); - - return (0); -} - -#pragma weak __vdso_gettimekeep -int -__vdso_gettimekeep(struct vdso_timekeep **tk) -{ - - return (_elf_aux_info(AT_TIMEKEEP, tk, sizeof(*tk))); -} diff --git a/lib/libc/powerpc/sys/cerror.S b/lib/libc/powerpc/sys/cerror.S deleted file mode 100644 index 64204c5a1dd..00000000000 --- a/lib/libc/powerpc/sys/cerror.S +++ /dev/null @@ -1,66 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: cerror.S,v 1.5 2000/01/27 14:58:48 kleink Exp $ */ - -#include -#include "SYS.h" - - .globl HIDENAME(cerror) - .globl CNAME(__error) - - /* - * The __error() function is thread aware. For non-threaded - * programs and the initial thread in threaded programs, - * it returns a pointer to the global errno variable. - */ -HIDENAME(cerror): - mflr %r0 - stwu %r1,-20(%r1) /* allocate new stack frame */ - stw %r0,24(%r1) /* and save lr, r31 */ - stw %r31,12(%r1) -#ifdef __PIC__ - stw %r30,8(%r1) - bcl 20,31,1f -1: - mflr %r30 - addis %r30,%r30,_GLOBAL_OFFSET_TABLE_-1b@ha - addi %r30,%r30,_GLOBAL_OFFSET_TABLE_-1b@l -#endif - mr %r31,%r3 /* stash errval in callee-saved register */ - bl PIC_PLT(CNAME(__error)) - stw %r31,0(%r3) /* store errval into &errno */ - lwz %r0,24(%r1) - lwz %r31,12(%r1) -#ifdef __PIC__ - lwz %r30,8(%r1) -#endif - mtlr %r0 - la %r1,20(%r1) - li %r3,-1 - li %r4,-1 - blr /* return to callers caller */ - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc64/Makefile.inc b/lib/libc/powerpc64/Makefile.inc deleted file mode 100644 index 4aac4e3a6e6..00000000000 --- a/lib/libc/powerpc64/Makefile.inc +++ /dev/null @@ -1,4 +0,0 @@ - -# Long double is 64-bits -SRCS+=machdep_ldisd.c -SYM_MAPS+=${LIBC_SRCTOP}/powerpc64/Symbol.map diff --git a/lib/libc/powerpc64/SYS.h b/lib/libc/powerpc64/SYS.h deleted file mode 100644 index c364090a548..00000000000 --- a/lib/libc/powerpc64/SYS.h +++ /dev/null @@ -1,97 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2002 Benno Rice. All rights reserved. - * Copyright (c) 2002 David E. O'Brien. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of any contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $NetBSD: SYS.h,v 1.8 2002/01/14 00:55:56 thorpej Exp $ - */ - -#include -#include - -#define _SYSCALL(name) \ - .text; \ - .align 2; \ - li 0,(SYS_##name); \ - sc - -#define SYSCALL(name) \ - .text; \ - .align 2; \ -2: mflr %r0; \ - std %r0,16(%r1); \ - stdu %r1,-48(%r1); \ - bl CNAME(HIDENAME(cerror)); \ - nop; \ - addi %r1,%r1,48; \ - ld %r0,16(%r1); \ - mtlr %r0; \ - blr; \ -ENTRY(__sys_##name); \ - WEAK_REFERENCE(__sys_##name, name); \ - WEAK_REFERENCE(__sys_##name, _##name); \ - _SYSCALL(name); \ - bso 2b - -#define PSEUDO(name) \ - .text; \ - .align 2; \ -ENTRY(__sys_##name); \ - WEAK_REFERENCE(__sys_##name, _##name); \ - _SYSCALL(name); \ - bnslr; \ - mflr %r0; \ - std %r0,16(%r1); \ - stdu %r1,-48(%r1); \ - bl CNAME(HIDENAME(cerror)); \ - nop; \ - addi %r1,%r1,48; \ - ld %r0,16(%r1); \ - mtlr %r0; \ - blr; \ -END(__sys_##name) - -#define RSYSCALL(name) \ - .text; \ - .align 2; \ -ENTRY(__sys_##name); \ - WEAK_REFERENCE(__sys_##name, name); \ - WEAK_REFERENCE(__sys_##name, _##name); \ - _SYSCALL(name); \ - bnslr; \ - \ - mflr %r0; \ - std %r0,16(%r1); \ - stdu %r1,-48(%r1); \ - bl CNAME(HIDENAME(cerror)); \ - nop; \ - addi %r1,%r1,48; \ - ld %r0,16(%r1); \ - mtlr %r0; \ - blr; \ -END(__sys_##name) diff --git a/lib/libc/powerpc64/Symbol.map b/lib/libc/powerpc64/Symbol.map deleted file mode 100644 index 7b70f4d991c..00000000000 --- a/lib/libc/powerpc64/Symbol.map +++ /dev/null @@ -1,50 +0,0 @@ -/* - */ - -/* - * This only needs to contain symbols that are not listed in - * symbol maps from other parts of libc (i.e., not found in - * stdlib/Symbol.map, string/Symbol.map, sys/Symbol.map, ...). - */ -FBSD_1.0 { - /* PSEUDO syscalls */ - _exit; - - _mcount; - _setjmp; - _longjmp; - fabs; - __flt_rounds; - fpgetmask; - fpgetround; - fpgetsticky; - fpsetmask; - fpsetround; - __infinity; - __nan; - makecontext; - setjmp; - longjmp; - sigsetjmp; - siglongjmp; - htonl; - htons; - ntohl; - ntohs; - brk; - sbrk; - vfork; -}; - -FBSDprivate_1.0 { - /* PSEUDO syscalls */ - _getlogin; - - _set_tp; - _fpgetsticky; - __makecontext; - __longjmp; - signalcontext; - __signalcontext; - __syncicache; -}; diff --git a/lib/libc/powerpc64/_fpmath.h b/lib/libc/powerpc64/_fpmath.h deleted file mode 100644 index 9bc7450aaca..00000000000 --- a/lib/libc/powerpc64/_fpmath.h +++ /dev/null @@ -1,56 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003 David Schultz - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -union IEEEl2bits { - long double e; - struct { -#if _BYTE_ORDER == _LITTLE_ENDIAN - unsigned int manl :32; - unsigned int manh :20; - unsigned int exp :11; - unsigned int sign :1; -#else /* _BYTE_ORDER == _LITTLE_ENDIAN */ - unsigned int sign :1; - unsigned int exp :11; - unsigned int manh :20; - unsigned int manl :32; -#endif - } bits; -}; - -#define mask_nbit_l(u) ((void)0) -#define LDBL_IMPLICIT_NBIT -#define LDBL_NBIT 0 - -#define LDBL_MANH_SIZE 20 -#define LDBL_MANL_SIZE 32 - -#define LDBL_TO_ARRAY32(u, a) do { \ - (a)[0] = (uint32_t)(u).bits.manl; \ - (a)[1] = (uint32_t)(u).bits.manh; \ -} while(0) diff --git a/lib/libc/powerpc64/arith.h b/lib/libc/powerpc64/arith.h deleted file mode 100644 index 8ac7860d613..00000000000 --- a/lib/libc/powerpc64/arith.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * MD header for contrib/gdtoa - */ - -/* - * NOTE: The definitions in this file must be correct or strtod(3) and - * floating point formats in printf(3) will break! The file can be - * generated by running contrib/gdtoa/arithchk.c on the target - * architecture. See contrib/gdtoa/gdtoaimp.h for details. - */ - -#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ -#define IEEE_8087 -#define Arith_Kind_ASL 1 -#else -#define IEEE_MC68k -#define Arith_Kind_ASL 2 -#endif -#define Long int -#define Intcast (int)(long) -#define Double_Align -#define X64_bit_pointers diff --git a/lib/libc/powerpc64/gd_qnan.h b/lib/libc/powerpc64/gd_qnan.h deleted file mode 100644 index 83496e8fbae..00000000000 --- a/lib/libc/powerpc64/gd_qnan.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * MD header for contrib/gdtoa - * - * This file can be generated by compiling and running contrib/gdtoa/qnan.c - * on the target architecture after arith.h has been generated. - */ - -#define f_QNAN 0x7fc00000 -#define d_QNAN0 0x7ff80000 -#define d_QNAN1 0x0 -#define ld_QNAN0 0x7ff80000 -#define ld_QNAN1 0x0 -#define ld_QNAN2 0x0 -#define ld_QNAN3 0x0 -#define ldus_QNAN0 0x7ff8 -#define ldus_QNAN1 0x0 -#define ldus_QNAN2 0x0 -#define ldus_QNAN3 0x0 -#define ldus_QNAN4 0x0 diff --git a/lib/libc/powerpc64/gen/Makefile.inc b/lib/libc/powerpc64/gen/Makefile.inc deleted file mode 100644 index 740c6ec73f8..00000000000 --- a/lib/libc/powerpc64/gen/Makefile.inc +++ /dev/null @@ -1,10 +0,0 @@ - -SRCS += _ctx_start.S fabs.S flt_rounds.c fpgetmask.c fpgetround.c \ - fpgetsticky.c fpsetmask.c fpsetround.c _get_tp.c \ - infinity.c ldexp.c makecontext.c _setjmp.S \ - setjmp.S sigsetjmp.S signalcontext.c syncicache.c \ - _set_tp.c \ - trivial-getcontextx.c - -CFLAGS._get_tp.c+= ${RTLD_HDRS} - diff --git a/lib/libc/powerpc64/gen/_ctx_start.S b/lib/libc/powerpc64/gen/_ctx_start.S deleted file mode 100644 index c2f8abfd648..00000000000 --- a/lib/libc/powerpc64/gen/_ctx_start.S +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright (c) 2004 Suleiman Souhlal - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - #include - .globl CNAME(_ctx_done) - .globl CNAME(abort) - - ENTRY(_ctx_start) -#if !defined(_CALL_ELF) || _CALL_ELF == 1 - /* Load values from function descriptor */ - ld %r2,8(%r14) - ld %r14,0(%r14) -#else - /* Load global entry point */ - mr %r12,%r14 -#endif - mtlr %r14 - blrl /* branch to start function */ - mr %r3,%r15 /* pass pointer to ucontext as argument */ - nop - bl CNAME(_ctx_done) /* branch to ctxt completion func */ - /* - * we should never return from the - * above branch. - */ - nop - bl CNAME(abort) /* abort */ - nop - END(_ctx_start) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc64/gen/_get_tp.c b/lib/libc/powerpc64/gen/_get_tp.c deleted file mode 100644 index 15d34555298..00000000000 --- a/lib/libc/powerpc64/gen/_get_tp.c +++ /dev/null @@ -1,45 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2021 The FreeBSD Foundation - * - * This software were developed by Konstantin Belousov - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include "libc_private.h" -#include "rtld.h" - -void * -_get_tp(void) -{ - Elf_Addr tp; - - __asm __volatile("mr %0,13" : "=r" (tp)); - return ((void *)(tp - TLS_TP_OFFSET - TLS_TCB_SIZE)); -} diff --git a/lib/libc/powerpc64/gen/_set_tp.c b/lib/libc/powerpc64/gen/_set_tp.c deleted file mode 100644 index 9cc817488e1..00000000000 --- a/lib/libc/powerpc64/gen/_set_tp.c +++ /dev/null @@ -1,35 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#include "libc_private.h" - -void -_set_tp(void *tpval) -{ - - __asm __volatile("mr 13,%0" :: "r"((char*)tpval + 0x7010)); -} diff --git a/lib/libc/powerpc64/gen/_setjmp.S b/lib/libc/powerpc64/gen/_setjmp.S deleted file mode 100644 index 94a744b4fa2..00000000000 --- a/lib/libc/powerpc64/gen/_setjmp.S +++ /dev/null @@ -1,153 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: _setjmp.S,v 1.1 1997/03/29 20:55:53 thorpej Exp $ */ - -#include -/* - * C library -- _setjmp, _longjmp - * - * _longjmp(a,v) - * will generate a "return(v?v:1)" from the last call to - * _setjmp(a) - * by restoring registers from the stack. - * The previous signal state is NOT restored. - * - * jmpbuf layout: - * +------------+ - * | unused | - * +------------+ - * | unused | - * | | - * | (4 words) | - * | | - * +------------+ - * | saved regs | - * | ... | - */ - -ENTRY(_setjmp) - mflr %r11 - mfcr %r12 - mr %r10,%r1 - mr %r9,%r2 - std %r9,40 + 0*8(%r3) - stfd %f14,40 + 23*8(%r3) - std %r10,40 + 1*8(%r3) - stfd %f15,40 + 24*8(%r3) - std %r11,40 + 2*8(%r3) - stfd %f16,40 + 25*8(%r3) - std %r12,40 + 3*8(%r3) - stfd %f17,40 + 26*8(%r3) - std %r13,40 + 4*8(%r3) - stfd %f18,40 + 27*8(%r3) - std %r14,40 + 5*8(%r3) - stfd %f19,40 + 28*8(%r3) - std %r15,40 + 6*8(%r3) - stfd %f20,40 + 29*8(%r3) - std %r16,40 + 7*8(%r3) - stfd %f21,40 + 30*8(%r3) - std %r17,40 + 8*8(%r3) - stfd %f22,40 + 31*8(%r3) - std %r18,40 + 9*8(%r3) - stfd %f23,40 + 32*8(%r3) - std %r19,40 + 10*8(%r3) - stfd %f24,40 + 33*8(%r3) - std %r20,40 + 11*8(%r3) - stfd %f25,40 + 34*8(%r3) - std %r21,40 + 12*8(%r3) - stfd %f26,40 + 35*8(%r3) - std %r22,40 + 13*8(%r3) - stfd %f27,40 + 36*8(%r3) - std %r23,40 + 14*8(%r3) - stfd %f28,40 + 37*8(%r3) - std %r24,40 + 15*8(%r3) - stfd %f29,40 + 38*8(%r3) - std %r25,40 + 16*8(%r3) - stfd %f30,40 + 39*8(%r3) - std %r26,40 + 17*8(%r3) - stfd %f31,40 + 40*8(%r3) - std %r27,40 + 18*8(%r3) - std %r28,40 + 19*8(%r3) - std %r29,40 + 20*8(%r3) - std %r30,40 + 21*8(%r3) - std %r31,40 + 22*8(%r3) - li %r3,0 - blr -END(_setjmp) - -ENTRY(_longjmp) - ld %r9,40 + 0*8(%r3) - lfd %f14,40 + 23*8(%r3) - ld %r10,40 + 1*8(%r3) - lfd %f15,40 + 24*8(%r3) - ld %r11,40 + 2*8(%r3) - lfd %f16,40 + 25*8(%r3) - ld %r12,40 + 3*8(%r3) - lfd %f17,40 + 26*8(%r3) - ld %r14,40 + 5*8(%r3) - lfd %f18,40 + 27*8(%r3) - ld %r15,40 + 6*8(%r3) - lfd %f19,40 + 28*8(%r3) - ld %r16,40 + 7*8(%r3) - lfd %f20,40 + 29*8(%r3) - ld %r17,40 + 8*8(%r3) - lfd %f21,40 + 30*8(%r3) - ld %r18,40 + 9*8(%r3) - lfd %f22,40 + 31*8(%r3) - ld %r19,40 + 10*8(%r3) - lfd %f23,40 + 32*8(%r3) - ld %r20,40 + 11*8(%r3) - lfd %f24,40 + 33*8(%r3) - ld %r21,40 + 12*8(%r3) - lfd %f25,40 + 34*8(%r3) - ld %r22,40 + 13*8(%r3) - lfd %f26,40 + 35*8(%r3) - ld %r23,40 + 14*8(%r3) - lfd %f27,40 + 36*8(%r3) - ld %r24,40 + 15*8(%r3) - lfd %f28,40 + 37*8(%r3) - ld %r25,40 + 16*8(%r3) - lfd %f29,40 + 38*8(%r3) - ld %r26,40 + 17*8(%r3) - lfd %f30,40 + 39*8(%r3) - ld %r27,40 + 18*8(%r3) - lfd %f31,40 + 40*8(%r3) - ld %r28,40 + 19*8(%r3) - ld %r29,40 + 20*8(%r3) - ld %r30,40 + 21*8(%r3) - ld %r31,40 + 22*8(%r3) - - mtlr %r11 - mtcr %r12 - mr %r2,%r9 - mr %r1,%r10 - or. %r3,%r4,%r4 - bnelr - li %r3,1 - blr -END(_longjmp) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc64/gen/fabs.S b/lib/libc/powerpc64/gen/fabs.S deleted file mode 100644 index d9dbf9d86fe..00000000000 --- a/lib/libc/powerpc64/gen/fabs.S +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (c) 2004 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -/* - * double fabs(double) - */ -ENTRY(fabs) - fabs %f1,%f1 - blr -END(fabs) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc64/gen/flt_rounds.c b/lib/libc/powerpc64/gen/flt_rounds.c deleted file mode 100644 index 16ec162fc14..00000000000 --- a/lib/libc/powerpc64/gen/flt_rounds.c +++ /dev/null @@ -1,56 +0,0 @@ -/* $NetBSD: flt_rounds.c,v 1.4.10.3 2002/03/22 20:41:53 nathanw Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1996 Mark Brinicombe - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Mark Brinicombe - * for the NetBSD Project. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include - -#ifndef _SOFT_FLOAT -static const int map[] = { - 1, /* round to nearest */ - 0, /* round to zero */ - 2, /* round to positive infinity */ - 3 /* round to negative infinity */ -}; - -int -__flt_rounds() -{ - uint64_t fpscr; - - __asm__ __volatile("mffs %0" : "=f"(fpscr)); - return map[(fpscr & 0x03)]; -} -#endif diff --git a/lib/libc/powerpc64/gen/fpgetmask.c b/lib/libc/powerpc64/gen/fpgetmask.c deleted file mode 100644 index b4399f23cf7..00000000000 --- a/lib/libc/powerpc64/gen/fpgetmask.c +++ /dev/null @@ -1,48 +0,0 @@ -/* $NetBSD: fpgetmask.c,v 1.3 2002/01/13 21:45:47 thorpej Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include -#include - -#ifndef _SOFT_FLOAT -fp_except_t -fpgetmask() -{ - u_int64_t fpscr; - - __asm__("mffs %0" : "=f"(fpscr)); - return ((fp_except_t)((fpscr >> 3) & 0x1f)); -} -#endif diff --git a/lib/libc/powerpc64/gen/fpgetround.c b/lib/libc/powerpc64/gen/fpgetround.c deleted file mode 100644 index f6a98d3ffe1..00000000000 --- a/lib/libc/powerpc64/gen/fpgetround.c +++ /dev/null @@ -1,48 +0,0 @@ -/* $NetBSD: fpgetround.c,v 1.3 2002/01/13 21:45:47 thorpej Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include -#include - -#ifndef _SOFT_FLOAT -fp_rnd_t -fpgetround() -{ - u_int64_t fpscr; - - __asm__("mffs %0" : "=f"(fpscr)); - return ((fp_rnd_t)(fpscr & 0x3)); -} -#endif diff --git a/lib/libc/powerpc64/gen/fpgetsticky.c b/lib/libc/powerpc64/gen/fpgetsticky.c deleted file mode 100644 index a79f4062c7f..00000000000 --- a/lib/libc/powerpc64/gen/fpgetsticky.c +++ /dev/null @@ -1,54 +0,0 @@ -/* $NetBSD: fpgetsticky.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include - -#include "namespace.h" - -#include -#include - -#ifndef _SOFT_FLOAT -#ifdef __weak_alias -__weak_alias(fpgetsticky,_fpgetsticky) -#endif - -fp_except_t -fpgetsticky() -{ - u_int64_t fpscr; - - __asm__ __volatile("mffs %0" : "=f"(fpscr)); - return ((fp_except_t)((fpscr >> 25) & 0x1f)); -} -#endif diff --git a/lib/libc/powerpc64/gen/fpsetmask.c b/lib/libc/powerpc64/gen/fpsetmask.c deleted file mode 100644 index eb5884aa080..00000000000 --- a/lib/libc/powerpc64/gen/fpsetmask.c +++ /dev/null @@ -1,52 +0,0 @@ -/* $NetBSD: fpsetmask.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include -#include - -#ifndef _SOFT_FLOAT -fp_except_t -fpsetmask(fp_except_t mask) -{ - u_int64_t fpscr; - fp_except_t old; - - __asm__("mffs %0" : "=f"(fpscr)); - old = (fp_except_t)((fpscr >> 3) & 0x1f); - fpscr = (fpscr & 0xffffff07) | ((mask & 0x1f) << 3); - __asm__ __volatile("mtfsf 0xff,%0" :: "f"(fpscr)); - return (old); -} -#endif diff --git a/lib/libc/powerpc64/gen/fpsetround.c b/lib/libc/powerpc64/gen/fpsetround.c deleted file mode 100644 index 82ec0ea354c..00000000000 --- a/lib/libc/powerpc64/gen/fpsetround.c +++ /dev/null @@ -1,52 +0,0 @@ -/* $NetBSD: fpsetround.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include -#include - -#ifndef _SOFT_FLOAT -fp_rnd_t -fpsetround(fp_rnd_t rnd_dir) -{ - u_int64_t fpscr; - fp_rnd_t old; - - __asm__ __volatile("mffs %0" : "=f"(fpscr)); - old = (fp_rnd_t)(fpscr & 0x3); - fpscr = (fpscr & 0xfffffffc) | rnd_dir; - __asm__ __volatile("mtfsf 0xff,%0" :: "f"(fpscr)); - return (old); -} -#endif diff --git a/lib/libc/powerpc64/gen/infinity.c b/lib/libc/powerpc64/gen/infinity.c deleted file mode 100644 index 6e11371e6eb..00000000000 --- a/lib/libc/powerpc64/gen/infinity.c +++ /dev/null @@ -1,28 +0,0 @@ -#include -#if 0 -#if defined(LIBC_SCCS) && !defined(lint) -__RCSID("$NetBSD: infinity.c,v 1.2 1998/11/14 19:31:02 christos Exp $"); -#endif /* LIBC_SCCS and not lint */ -#endif -/* infinity.c */ - -#include - -/* bytes for +Infinity on powerpc */ -const union __infinity_un __infinity = { -#if BYTE_ORDER == BIG_ENDIAN - { 0x7f, 0xf0, 0, 0, 0, 0, 0, 0 } -#else - { 0, 0, 0, 0, 0, 0, 0xf0, 0x7f } -#endif -}; - -/* bytes for NaN */ -const union __nan_un __nan = { -#if BYTE_ORDER == BIG_ENDIAN - {0xff, 0xc0, 0, 0} -#else - { 0, 0, 0xc0, 0xff } -#endif -}; - diff --git a/lib/libc/powerpc64/gen/makecontext.c b/lib/libc/powerpc64/gen/makecontext.c deleted file mode 100644 index 34d16fc673a..00000000000 --- a/lib/libc/powerpc64/gen/makecontext.c +++ /dev/null @@ -1,127 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 Suleiman Souhlal - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include - -#include -#include -#include -#include -#include - -__weak_reference(__makecontext, makecontext); - -void _ctx_done(ucontext_t *ucp); -void _ctx_start(void); - -void -_ctx_done(ucontext_t *ucp) -{ - if (ucp->uc_link == NULL) - exit(0); - else { - /* invalidate context */ - ucp->uc_mcontext.mc_len = 0; - - setcontext((const ucontext_t *)ucp->uc_link); - - abort(); /* should never return from above call */ - } -} - -void -__makecontext(ucontext_t *ucp, void (*start)(void), int argc, ...) -{ - mcontext_t *mc; - char *sp; - va_list ap; - int i, regargs, stackargs; - - /* Sanity checks */ - if ((ucp == NULL) || (argc < 0) - || (ucp->uc_stack.ss_sp == NULL) - || (ucp->uc_stack.ss_size < MINSIGSTKSZ)) { - /* invalidate context */ - ucp->uc_mcontext.mc_len = 0; - return; - } - - /* - * The stack must have space for the frame pointer, saved - * link register, overflow arguments, and be 16-byte - * aligned. - */ - stackargs = (argc > 8) ? argc - 8 : 0; - sp = (char *) ucp->uc_stack.ss_sp + ucp->uc_stack.ss_size - - sizeof(uintptr_t)*(stackargs + 2); - sp = (char *)((uintptr_t)sp & ~0x1f); - - mc = &ucp->uc_mcontext; - - /* - * Up to 8 register args. Assumes all args are 64-bit and - * integer only. Not sure how to cater for floating point. - */ - regargs = (argc > 8) ? 8 : argc; - va_start(ap, argc); - for (i = 0; i < regargs; i++) - mc->mc_gpr[3 + i] = va_arg(ap, uint64_t); - - /* - * Overflow args go onto the stack - */ - if (argc > 8) { - uint64_t *argp; - - /* Skip past frame pointer and saved LR */ -#if !defined(_CALL_ELF) || _CALL_ELF == 1 - argp = (uint64_t *)sp + 6; -#else - argp = (uint64_t *)sp + 4; -#endif - - for (i = 0; i < stackargs; i++) - *argp++ = va_arg(ap, uint64_t); - } - va_end(ap); - - /* - * Use caller-saved regs 14/15 to hold params that _ctx_start - * will use to invoke the user-supplied func - */ -#if !defined(_CALL_ELF) || _CALL_ELF == 1 - /* Cast to ensure this is treated as a function descriptor. */ - mc->mc_srr0 = *(uintptr_t *)_ctx_start; -#else - mc->mc_srr0 = (uintptr_t) _ctx_start; -#endif - mc->mc_gpr[1] = (uintptr_t) sp; /* new stack pointer */ - mc->mc_gpr[14] = (uintptr_t) start; /* r14 <- start */ - mc->mc_gpr[15] = (uintptr_t) ucp; /* r15 <- ucp */ -} diff --git a/lib/libc/powerpc64/gen/setjmp.S b/lib/libc/powerpc64/gen/setjmp.S deleted file mode 100644 index 7cf48d63ec8..00000000000 --- a/lib/libc/powerpc64/gen/setjmp.S +++ /dev/null @@ -1,174 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: setjmp.S,v 1.3 1998/10/03 12:30:38 tsubai Exp $ */ - -#include -#include - -/* - * C library -- setjmp, longjmp - * - * longjmp(a,v) - * will generate a "return(v?v:1)" from the last call to - * setjmp(a) - * by restoring registers from the stack. - * The previous signal state is restored. - * - * jmpbuf layout: - * +------------+ - * | unused | - * +------------+ - * | sig state | - * | | - * | (4 words) | - * | | - * +------------+ - * | saved regs | - * | ... | - */ - -ENTRY(setjmp) - mr %r6,%r3 - li %r3,1 /* SIG_BLOCK, but doesn't matter */ - /* since set == NULL */ - li %r4,0 /* set = NULL */ - mr %r5,%r6 /* &oset */ - addi %r5,%r5,4 - li %r0, SYS_sigprocmask /*sigprocmask(SIG_BLOCK, NULL, &oset)*/ - sc /*assume no error XXX */ - mflr %r11 /* r11 <- link reg */ - mfcr %r12 /* r12 <- condition reg */ - mr %r10,%r1 /* r10 <- stackptr */ - mr %r9,%r2 /* r9 <- global ptr */ - - std %r9,40 + 0*8(%r6) - stfd %f14,40 + 23*8(%r6) - std %r10,40 + 1*8(%r6) - stfd %f15,40 + 24*8(%r6) - std %r11,40 + 2*8(%r6) - stfd %f16,40 + 25*8(%r6) - std %r12,40 + 3*8(%r6) - stfd %f17,40 + 26*8(%r6) - std %r13,40 + 4*8(%r6) - stfd %f18,40 + 27*8(%r6) - std %r14,40 + 5*8(%r6) - stfd %f19,40 + 28*8(%r6) - std %r15,40 + 6*8(%r6) - stfd %f20,40 + 29*8(%r6) - std %r16,40 + 7*8(%r6) - stfd %f21,40 + 30*8(%r6) - std %r17,40 + 8*8(%r6) - stfd %f22,40 + 31*8(%r6) - std %r18,40 + 9*8(%r6) - stfd %f23,40 + 32*8(%r6) - std %r19,40 + 10*8(%r6) - stfd %f24,40 + 33*8(%r6) - std %r20,40 + 11*8(%r6) - stfd %f25,40 + 34*8(%r6) - std %r21,40 + 12*8(%r6) - stfd %f26,40 + 35*8(%r6) - std %r22,40 + 13*8(%r6) - stfd %f27,40 + 36*8(%r6) - std %r23,40 + 14*8(%r6) - stfd %f28,40 + 37*8(%r6) - std %r24,40 + 15*8(%r6) - stfd %f29,40 + 38*8(%r6) - std %r25,40 + 16*8(%r6) - stfd %f30,40 + 39*8(%r6) - std %r26,40 + 17*8(%r6) - stfd %f31,40 + 40*8(%r6) - std %r27,40 + 18*8(%r6) - std %r28,40 + 19*8(%r6) - std %r29,40 + 20*8(%r6) - std %r30,40 + 21*8(%r6) - std %r31,40 + 22*8(%r6) - - /* XXX Altivec regs */ - - li %r3,0 /* return (0) */ - blr -END(setjmp) - - WEAK_REFERENCE(__longjmp, longjmp) -ENTRY(__longjmp) - ld %r9,40 + 0*8(%r3) - lfd %f14,40 + 23*8(%r3) - ld %r10,40 + 1*8(%r3) - lfd %f15,40 + 24*8(%r3) - ld %r11,40 + 2*8(%r3) - lfd %f16,40 + 25*8(%r3) - ld %r12,40 + 3*8(%r3) - lfd %f17,40 + 26*8(%r3) - ld %r14,40 + 5*8(%r3) - lfd %f18,40 + 27*8(%r3) - ld %r15,40 + 6*8(%r3) - lfd %f19,40 + 28*8(%r3) - ld %r16,40 + 7*8(%r3) - lfd %f20,40 + 29*8(%r3) - ld %r17,40 + 8*8(%r3) - lfd %f21,40 + 30*8(%r3) - ld %r18,40 + 9*8(%r3) - lfd %f22,40 + 31*8(%r3) - ld %r19,40 + 10*8(%r3) - lfd %f23,40 + 32*8(%r3) - ld %r20,40 + 11*8(%r3) - lfd %f24,40 + 33*8(%r3) - ld %r21,40 + 12*8(%r3) - lfd %f25,40 + 34*8(%r3) - ld %r22,40 + 13*8(%r3) - lfd %f26,40 + 35*8(%r3) - ld %r23,40 + 14*8(%r3) - lfd %f27,40 + 36*8(%r3) - ld %r24,40 + 15*8(%r3) - lfd %f28,40 + 37*8(%r3) - ld %r25,40 + 16*8(%r3) - lfd %f29,40 + 38*8(%r3) - ld %r26,40 + 17*8(%r3) - lfd %f30,40 + 39*8(%r3) - ld %r27,40 + 18*8(%r3) - lfd %f31,40 + 40*8(%r3) - ld %r28,40 + 19*8(%r3) - ld %r29,40 + 20*8(%r3) - ld %r30,40 + 21*8(%r3) - ld %r31,40 + 22*8(%r3) - mr %r6,%r4 /* save val param */ - mtlr %r11 /* r11 -> link reg */ - mtcr %r12 /* r12 -> condition reg */ - mr %r2,%r9 /* r9 -> global ptr */ - mr %r1,%r10 /* r10 -> stackptr */ - mr %r4,%r3 - li %r3,3 /* SIG_SETMASK */ - addi %r4,%r4,4 /* &set */ - li %r5,0 /* oset = NULL */ - li %r0,SYS_sigprocmask /* sigprocmask(SIG_SET, &set, NULL) */ - sc /* assume no error XXX */ - or. %r3,%r6,%r6 - bnelr - li %r3,1 - blr -END(__longjmp) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc64/gen/signalcontext.c b/lib/libc/powerpc64/gen/signalcontext.c deleted file mode 100644 index 5fac663fb15..00000000000 --- a/lib/libc/powerpc64/gen/signalcontext.c +++ /dev/null @@ -1,103 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 Marcel Moolenaar, Peter Grehan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include - -typedef void (*handler_t)(uint32_t, uint32_t, uint32_t); - -/* Prototypes */ -static void ctx_wrapper(ucontext_t *ucp, handler_t func, uint32_t sig, - uint32_t sig_si, uint32_t sig_uc); - -__weak_reference(__signalcontext, signalcontext); - -int -__signalcontext(ucontext_t *ucp, int sig, __sighandler_t *func) -{ - siginfo_t *sig_si; - ucontext_t *sig_uc; - uintptr_t sp; - - /* Bail out if we don't have a valid ucontext pointer. */ - if (ucp == NULL) - abort(); - - /* - * Build a 16-byte-aligned signal frame - */ - sp = (ucp->uc_mcontext.mc_gpr[1] - sizeof(ucontext_t)) & ~15UL; - sig_uc = (ucontext_t *)sp; - bcopy(ucp, sig_uc, sizeof(*sig_uc)); - sp = (sp - sizeof(siginfo_t)) & ~15UL; - sig_si = (siginfo_t *)sp; - bzero(sig_si, sizeof(*sig_si)); - sig_si->si_signo = sig; - - /* - * Subtract 48 bytes from stack to allow for frameptr - */ - sp -= 6*sizeof(uint64_t); - sp &= ~15UL; - - /* - * Setup the ucontext of the signal handler. - */ - bzero(&ucp->uc_mcontext, sizeof(ucp->uc_mcontext)); - ucp->uc_link = sig_uc; - sigdelset(&ucp->uc_sigmask, sig); - - ucp->uc_mcontext.mc_vers = _MC_VERSION; - ucp->uc_mcontext.mc_len = sizeof(struct __mcontext); - ucp->uc_mcontext.mc_srr0 = (uint64_t) ctx_wrapper; - ucp->uc_mcontext.mc_gpr[1] = (uint64_t) sp; - ucp->uc_mcontext.mc_gpr[3] = (uint64_t) func; - ucp->uc_mcontext.mc_gpr[4] = (uint64_t) sig; - ucp->uc_mcontext.mc_gpr[5] = (uint64_t) sig_si; - ucp->uc_mcontext.mc_gpr[6] = (uint64_t) sig_uc; - - return (0); -} - -static void -ctx_wrapper(ucontext_t *ucp, handler_t func, uint32_t sig, uint32_t sig_si, - uint32_t sig_uc) -{ - - (*func)(sig, sig_si, sig_uc); - if (ucp->uc_link == NULL) - exit(0); - setcontext((const ucontext_t *)ucp->uc_link); - /* should never get here */ - abort(); - /* NOTREACHED */ -} diff --git a/lib/libc/powerpc64/gen/sigsetjmp.S b/lib/libc/powerpc64/gen/sigsetjmp.S deleted file mode 100644 index 58fa188daaa..00000000000 --- a/lib/libc/powerpc64/gen/sigsetjmp.S +++ /dev/null @@ -1,181 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: sigsetjmp.S,v 1.4 1998/10/03 12:30:38 tsubai Exp $ */ - -#include -/* - * C library -- sigsetjmp, siglongjmp - * - * siglongjmp(a,v) - * will generate a "return(v?v:1)" from the last call to - * sigsetjmp(a, savemask) - * by restoring registers from the stack. - * The previous signal state is restored if savemask is non-zero - * - * jmpbuf layout: - * +------------+ - * | savemask | - * +------------+ - * | sig state | - * | | - * | (4 words) | - * | | - * +------------+ - * | saved regs | - * | ... | - */ - - -#include - -ENTRY(sigsetjmp) - mr %r6,%r3 - stw %r4,0(%r3) - or. %r7,%r4,%r4 - beq 1f - li %r3,1 /* SIG_BLOCK, but doesn't matter */ - /* since set == NULL */ - li %r4,0 /* set = NULL */ - mr %r5,%r6 /* &oset */ - addi %r5,%r5,4 - li %r0, SYS_sigprocmask /* sigprocmask(SIG_BLOCK, NULL, &oset)*/ - sc /* assume no error XXX */ -1: - mflr %r11 - mfcr %r12 - mr %r10,%r1 - mr %r9,%r2 - - std %r9,40 + 0*8(%r6) - stfd %f14,40 + 23*8(%r6) - std %r10,40 + 1*8(%r6) - stfd %f15,40 + 24*8(%r6) - std %r11,40 + 2*8(%r6) - stfd %f16,40 + 25*8(%r6) - std %r12,40 + 3*8(%r6) - stfd %f17,40 + 26*8(%r6) - std %r13,40 + 4*8(%r6) - stfd %f18,40 + 27*8(%r6) - std %r14,40 + 5*8(%r6) - stfd %f19,40 + 28*8(%r6) - std %r15,40 + 6*8(%r6) - stfd %f20,40 + 29*8(%r6) - std %r16,40 + 7*8(%r6) - stfd %f21,40 + 30*8(%r6) - std %r17,40 + 8*8(%r6) - stfd %f22,40 + 31*8(%r6) - std %r18,40 + 9*8(%r6) - stfd %f23,40 + 32*8(%r6) - std %r19,40 + 10*8(%r6) - stfd %f24,40 + 33*8(%r6) - std %r20,40 + 11*8(%r6) - stfd %f25,40 + 34*8(%r6) - std %r21,40 + 12*8(%r6) - stfd %f26,40 + 35*8(%r6) - std %r22,40 + 13*8(%r6) - stfd %f27,40 + 36*8(%r6) - std %r23,40 + 14*8(%r6) - stfd %f28,40 + 37*8(%r6) - std %r24,40 + 15*8(%r6) - stfd %f29,40 + 38*8(%r6) - std %r25,40 + 16*8(%r6) - stfd %f30,40 + 39*8(%r6) - std %r26,40 + 17*8(%r6) - stfd %f31,40 + 40*8(%r6) - std %r27,40 + 18*8(%r6) - std %r28,40 + 19*8(%r6) - std %r29,40 + 20*8(%r6) - std %r30,40 + 21*8(%r6) - std %r31,40 + 22*8(%r6) - - li %r3,0 - blr -END(sigsetjmp) - -ENTRY(siglongjmp) - ld %r9,40 + 0*8(%r3) - lfd %f14,40 + 23*8(%r3) - ld %r10,40 + 1*8(%r3) - lfd %f15,40 + 24*8(%r3) - ld %r11,40 + 2*8(%r3) - lfd %f16,40 + 25*8(%r3) - ld %r12,40 + 3*8(%r3) - lfd %f17,40 + 26*8(%r3) - ld %r14,40 + 5*8(%r3) - lfd %f18,40 + 27*8(%r3) - ld %r15,40 + 6*8(%r3) - lfd %f19,40 + 28*8(%r3) - ld %r16,40 + 7*8(%r3) - lfd %f20,40 + 29*8(%r3) - ld %r17,40 + 8*8(%r3) - lfd %f21,40 + 30*8(%r3) - ld %r18,40 + 9*8(%r3) - lfd %f22,40 + 31*8(%r3) - ld %r19,40 + 10*8(%r3) - lfd %f23,40 + 32*8(%r3) - ld %r20,40 + 11*8(%r3) - lfd %f24,40 + 33*8(%r3) - ld %r21,40 + 12*8(%r3) - lfd %f25,40 + 34*8(%r3) - ld %r22,40 + 13*8(%r3) - lfd %f26,40 + 35*8(%r3) - ld %r23,40 + 14*8(%r3) - lfd %f27,40 + 36*8(%r3) - ld %r24,40 + 15*8(%r3) - lfd %f28,40 + 37*8(%r3) - ld %r25,40 + 16*8(%r3) - lfd %f29,40 + 38*8(%r3) - ld %r26,40 + 17*8(%r3) - lfd %f30,40 + 39*8(%r3) - ld %r27,40 + 18*8(%r3) - lfd %f31,40 + 40*8(%r3) - ld %r28,40 + 19*8(%r3) - ld %r29,40 + 20*8(%r3) - ld %r30,40 + 21*8(%r3) - ld %r31,40 + 22*8(%r3) - - lwz %r7,0(%r3) - mr %r6,%r4 - mtlr %r11 - mtcr %r12 - mr %r2,%r9 - mr %r1,%r10 - or. %r7,%r7,%r7 - beq 1f - mr %r4,%r3 - li %r3,3 /* SIG_SETMASK */ - addi %r4,%r4,4 /* &set */ - li %r5,0 /* oset = NULL */ - li %r0,SYS_sigprocmask /* sigprocmask(SIG_SET, &set, NULL) */ - sc /* assume no error XXX */ -1: - or. %r3,%r6,%r6 - bnelr - li %r3,1 - blr -END(siglongjmp) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc64/gen/syncicache.c b/lib/libc/powerpc64/gen/syncicache.c deleted file mode 100644 index 7885a36bd1d..00000000000 --- a/lib/libc/powerpc64/gen/syncicache.c +++ /dev/null @@ -1,100 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1995-1997, 1999 Wolfgang Solfrank. - * Copyright (C) 1995-1997, 1999 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: syncicache.c,v 1.2 1999/05/05 12:36:40 tsubai Exp $ - */ - -#include -#if defined(_KERNEL) || defined(_STANDALONE) -#include -#include -#include -#endif -#include - -#include -#include - -#ifdef _STANDALONE -int cacheline_size = 32; -#endif - -#if !defined(_KERNEL) && !defined(_STANDALONE) -#include - -int cacheline_size = 0; - -static void getcachelinesize(void); - -static void -getcachelinesize() -{ - static int cachemib[] = { CTL_MACHDEP, CPU_CACHELINE }; - long clen; - - clen = sizeof(cacheline_size); - - if (sysctl(cachemib, nitems(cachemib), &cacheline_size, &clen, - NULL, 0) < 0 || !cacheline_size) { - abort(); - } -} -#endif - -void -__syncicache(void *from, int len) -{ - off_t l, off; - char *p; - -#if !defined(_KERNEL) && !defined(_STANDALONE) - if (!cacheline_size) - getcachelinesize(); -#endif - - off = (uintptr_t)from & (cacheline_size - 1); - l = len += off; - p = (char *)from - off; - - do { - __asm __volatile ("dcbst 0,%0" :: "r"(p)); - p += cacheline_size; - } while ((l -= cacheline_size) > 0); - __asm __volatile ("sync"); - p = (char *)from - off; - do { - __asm __volatile ("icbi 0,%0" :: "r"(p)); - p += cacheline_size; - } while ((len -= cacheline_size) > 0); - __asm __volatile ("sync; isync"); -} - diff --git a/lib/libc/powerpc64/softfloat/milieu.h b/lib/libc/powerpc64/softfloat/milieu.h deleted file mode 100644 index 6139aa58b98..00000000000 --- a/lib/libc/powerpc64/softfloat/milieu.h +++ /dev/null @@ -1,48 +0,0 @@ -/* $NetBSD: milieu.h,v 1.1 2000/12/29 20:13:54 bjh21 Exp $ */ - -/* -=============================================================================== - -This C header file is part of the SoftFloat IEC/IEEE Floating-point -Arithmetic Package, Release 2a. - -Written by John R. Hauser. This work was made possible in part by the -International Computer Science Institute, located at Suite 600, 1947 Center -Street, Berkeley, California 94704. Funding was partially provided by the -National Science Foundation under grant MIP-9311980. The original version -of this code was written as part of a project to build a fixed-point vector -processor in collaboration with the University of California at Berkeley, -overseen by Profs. Nelson Morgan and John Wawrzynek. More information -is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/ -arithmetic/SoftFloat.html'. - -THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort -has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT -TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO -PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY -AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE. - -Derivative works are acceptable, even for commercial purposes, so long as -(1) they include prominent notice that the work is derivative, and (2) they -include prominent notice akin to these four paragraphs for those parts of -this code that are retained. - -=============================================================================== -*/ - -/* -------------------------------------------------------------------------------- -Include common integer types and flags. -------------------------------------------------------------------------------- -*/ -#include "powerpc-gcc.h" - -/* -------------------------------------------------------------------------------- -Symbolic Boolean literals. -------------------------------------------------------------------------------- -*/ -enum { - FALSE = 0, - TRUE = 1 -}; diff --git a/lib/libc/powerpc64/softfloat/powerpc-gcc.h b/lib/libc/powerpc64/softfloat/powerpc-gcc.h deleted file mode 100644 index d11198866e3..00000000000 --- a/lib/libc/powerpc64/softfloat/powerpc-gcc.h +++ /dev/null @@ -1,91 +0,0 @@ -/* $NetBSD: arm-gcc.h,v 1.2 2001/02/21 18:09:25 bjh21 Exp $ */ - -/* -------------------------------------------------------------------------------- -One of the macros `BIGENDIAN' or `LITTLEENDIAN' must be defined. -------------------------------------------------------------------------------- -*/ -#define BIGENDIAN - -/* -------------------------------------------------------------------------------- -The macro `BITS64' can be defined to indicate that 64-bit integer types are -supported by the compiler. -------------------------------------------------------------------------------- -*/ -#define BITS64 - -/* -------------------------------------------------------------------------------- -Each of the following `typedef's defines the most convenient type that holds -integers of at least as many bits as specified. For example, `uint8' should -be the most convenient type that can hold unsigned integers of as many as -8 bits. The `flag' type must be able to hold either a 0 or 1. For most -implementations of C, `flag', `uint8', and `int8' should all be `typedef'ed -to the same as `int'. -------------------------------------------------------------------------------- -*/ -typedef int flag; -typedef unsigned int uint8; -typedef int int8; -typedef unsigned int uint16; -typedef int int16; -typedef unsigned int uint32; -typedef signed int int32; -#ifdef BITS64 -typedef unsigned long long int uint64; -typedef signed long long int int64; -#endif - -/* -------------------------------------------------------------------------------- -Each of the following `typedef's defines a type that holds integers -of _exactly_ the number of bits specified. For instance, for most -implementation of C, `bits16' and `sbits16' should be `typedef'ed to -`unsigned short int' and `signed short int' (or `short int'), respectively. -------------------------------------------------------------------------------- -*/ -typedef unsigned char bits8; -typedef signed char sbits8; -typedef unsigned short int bits16; -typedef signed short int sbits16; -typedef unsigned int bits32; -typedef signed int sbits32; -#ifdef BITS64 -typedef unsigned long long int bits64; -typedef signed long long int sbits64; -#endif - -#ifdef BITS64 -/* -------------------------------------------------------------------------------- -The `LIT64' macro takes as its argument a textual integer literal and -if necessary ``marks'' the literal as having a 64-bit integer type. -For example, the GNU C Compiler (`gcc') requires that 64-bit literals be -appended with the letters `LL' standing for `long long', which is `gcc's -name for the 64-bit integer type. Some compilers may allow `LIT64' to be -defined as the identity macro: `#define LIT64( a ) a'. -------------------------------------------------------------------------------- -*/ -#define LIT64( a ) a##LL -#endif - -/* -------------------------------------------------------------------------------- -The macro `INLINE' can be used before functions that should be inlined. If -a compiler does not support explicit inlining, this macro should be defined -to be `static'. -------------------------------------------------------------------------------- -*/ -#define INLINE static __inline - -/* -------------------------------------------------------------------------------- -The ARM FPA is odd in that it stores doubles high-order word first, no matter -what the endianness of the CPU. VFP is sane. -------------------------------------------------------------------------------- -*/ -#if defined(SOFTFLOAT_FOR_GCC) -#define FLOAT64_DEMANGLE(a) (a) -#define FLOAT64_MANGLE(a) (a) -#endif diff --git a/lib/libc/powerpc64/softfloat/softfloat.h b/lib/libc/powerpc64/softfloat/softfloat.h deleted file mode 100644 index b20cb3e7aa0..00000000000 --- a/lib/libc/powerpc64/softfloat/softfloat.h +++ /dev/null @@ -1,306 +0,0 @@ -/* $NetBSD: softfloat.h,v 1.6 2002/05/12 13:12:46 bjh21 Exp $ */ - -/* This is a derivative work. */ - -/* -=============================================================================== - -This C header file is part of the SoftFloat IEC/IEEE Floating-point -Arithmetic Package, Release 2a. - -Written by John R. Hauser. This work was made possible in part by the -International Computer Science Institute, located at Suite 600, 1947 Center -Street, Berkeley, California 94704. Funding was partially provided by the -National Science Foundation under grant MIP-9311980. The original version -of this code was written as part of a project to build a fixed-point vector -processor in collaboration with the University of California at Berkeley, -overseen by Profs. Nelson Morgan and John Wawrzynek. More information -is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/ -arithmetic/SoftFloat.html'. - -THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort -has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT -TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO -PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY -AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE. - -Derivative works are acceptable, even for commercial purposes, so long as -(1) they include prominent notice that the work is derivative, and (2) they -include prominent notice akin to these four paragraphs for those parts of -this code that are retained. - -=============================================================================== -*/ - -/* -------------------------------------------------------------------------------- -The macro `FLOATX80' must be defined to enable the extended double-precision -floating-point format `floatx80'. If this macro is not defined, the -`floatx80' type will not be defined, and none of the functions that either -input or output the `floatx80' type will be defined. The same applies to -the `FLOAT128' macro and the quadruple-precision format `float128'. -------------------------------------------------------------------------------- -*/ -/* #define FLOATX80 */ -/* #define FLOAT128 */ - -#include - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point types. -------------------------------------------------------------------------------- -*/ -typedef unsigned int float32; -typedef unsigned long long float64; -#ifdef FLOATX80 -typedef struct { - unsigned short high; - unsigned long long low; -} floatx80; -#endif -#ifdef FLOAT128 -typedef struct { - unsigned long long high, low; -} float128; -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point underflow tininess-detection mode. -------------------------------------------------------------------------------- -*/ -#ifndef SOFTFLOAT_FOR_GCC -extern int8 float_detect_tininess; -#endif -enum { - float_tininess_after_rounding = 0, - float_tininess_before_rounding = 1 -}; - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point rounding mode. -------------------------------------------------------------------------------- -*/ -extern fp_rnd_t float_rounding_mode; -enum { - float_round_nearest_even = FP_RN, - float_round_to_zero = FP_RZ, - float_round_down = FP_RM, - float_round_up = FP_RP -}; - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point exception flags. -------------------------------------------------------------------------------- -*/ -typedef fp_except_t fp_except; - -extern fp_except float_exception_flags; -extern fp_except float_exception_mask; -enum { - float_flag_inexact = FP_X_IMP, - float_flag_underflow = FP_X_UFL, - float_flag_overflow = FP_X_OFL, - float_flag_divbyzero = FP_X_DZ, - float_flag_invalid = FP_X_INV -}; - -/* -------------------------------------------------------------------------------- -Routine to raise any or all of the software IEC/IEEE floating-point -exception flags. -------------------------------------------------------------------------------- -*/ -void float_raise( fp_except ); - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE integer-to-floating-point conversion routines. -------------------------------------------------------------------------------- -*/ -float32 int32_to_float32( int ); -float64 int32_to_float64( int ); -#ifdef FLOATX80 -floatx80 int32_to_floatx80( int ); -#endif -#ifdef FLOAT128 -float128 int32_to_float128( int ); -#endif -float32 int64_to_float32( long long ); -float64 int64_to_float64( long long ); -#ifdef FLOATX80 -floatx80 int64_to_floatx80( long long ); -#endif -#ifdef FLOAT128 -float128 int64_to_float128( long long ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE single-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int float32_to_int32( float32 ); -int float32_to_int32_round_to_zero( float32 ); -unsigned int float32_to_uint32_round_to_zero( float32 ); -long long float32_to_int64( float32 ); -long long float32_to_int64_round_to_zero( float32 ); -float64 float32_to_float64( float32 ); -#ifdef FLOATX80 -floatx80 float32_to_floatx80( float32 ); -#endif -#ifdef FLOAT128 -float128 float32_to_float128( float32 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE single-precision operations. -------------------------------------------------------------------------------- -*/ -float32 float32_round_to_int( float32 ); -float32 float32_add( float32, float32 ); -float32 float32_sub( float32, float32 ); -float32 float32_mul( float32, float32 ); -float32 float32_div( float32, float32 ); -float32 float32_rem( float32, float32 ); -float32 float32_sqrt( float32 ); -int float32_eq( float32, float32 ); -int float32_le( float32, float32 ); -int float32_lt( float32, float32 ); -int float32_eq_signaling( float32, float32 ); -int float32_le_quiet( float32, float32 ); -int float32_lt_quiet( float32, float32 ); -#ifndef SOFTFLOAT_FOR_GCC -int float32_is_signaling_nan( float32 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE double-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int float64_to_int32( float64 ); -int float64_to_int32_round_to_zero( float64 ); -unsigned int float64_to_uint32_round_to_zero( float64 ); -long long float64_to_int64( float64 ); -long long float64_to_int64_round_to_zero( float64 ); -float32 float64_to_float32( float64 ); -#ifdef FLOATX80 -floatx80 float64_to_floatx80( float64 ); -#endif -#ifdef FLOAT128 -float128 float64_to_float128( float64 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE double-precision operations. -------------------------------------------------------------------------------- -*/ -float64 float64_round_to_int( float64 ); -float64 float64_add( float64, float64 ); -float64 float64_sub( float64, float64 ); -float64 float64_mul( float64, float64 ); -float64 float64_div( float64, float64 ); -float64 float64_rem( float64, float64 ); -float64 float64_sqrt( float64 ); -int float64_eq( float64, float64 ); -int float64_le( float64, float64 ); -int float64_lt( float64, float64 ); -int float64_eq_signaling( float64, float64 ); -int float64_le_quiet( float64, float64 ); -int float64_lt_quiet( float64, float64 ); -#ifndef SOFTFLOAT_FOR_GCC -int float64_is_signaling_nan( float64 ); -#endif - -#ifdef FLOATX80 - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE extended double-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int floatx80_to_int32( floatx80 ); -int floatx80_to_int32_round_to_zero( floatx80 ); -long long floatx80_to_int64( floatx80 ); -long long floatx80_to_int64_round_to_zero( floatx80 ); -float32 floatx80_to_float32( floatx80 ); -float64 floatx80_to_float64( floatx80 ); -#ifdef FLOAT128 -float128 floatx80_to_float128( floatx80 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE extended double-precision rounding precision. Valid -values are 32, 64, and 80. -------------------------------------------------------------------------------- -*/ -extern int floatx80_rounding_precision; - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE extended double-precision operations. -------------------------------------------------------------------------------- -*/ -floatx80 floatx80_round_to_int( floatx80 ); -floatx80 floatx80_add( floatx80, floatx80 ); -floatx80 floatx80_sub( floatx80, floatx80 ); -floatx80 floatx80_mul( floatx80, floatx80 ); -floatx80 floatx80_div( floatx80, floatx80 ); -floatx80 floatx80_rem( floatx80, floatx80 ); -floatx80 floatx80_sqrt( floatx80 ); -int floatx80_eq( floatx80, floatx80 ); -int floatx80_le( floatx80, floatx80 ); -int floatx80_lt( floatx80, floatx80 ); -int floatx80_eq_signaling( floatx80, floatx80 ); -int floatx80_le_quiet( floatx80, floatx80 ); -int floatx80_lt_quiet( floatx80, floatx80 ); -int floatx80_is_signaling_nan( floatx80 ); - -#endif - -#ifdef FLOAT128 - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE quadruple-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int float128_to_int32( float128 ); -int float128_to_int32_round_to_zero( float128 ); -long long float128_to_int64( float128 ); -long long float128_to_int64_round_to_zero( float128 ); -float32 float128_to_float32( float128 ); -float64 float128_to_float64( float128 ); -#ifdef FLOATX80 -floatx80 float128_to_floatx80( float128 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE quadruple-precision operations. -------------------------------------------------------------------------------- -*/ -float128 float128_round_to_int( float128 ); -float128 float128_add( float128, float128 ); -float128 float128_sub( float128, float128 ); -float128 float128_mul( float128, float128 ); -float128 float128_div( float128, float128 ); -float128 float128_rem( float128, float128 ); -float128 float128_sqrt( float128 ); -int float128_eq( float128, float128 ); -int float128_le( float128, float128 ); -int float128_lt( float128, float128 ); -int float128_eq_signaling( float128, float128 ); -int float128_le_quiet( float128, float128 ); -int float128_lt_quiet( float128, float128 ); -int float128_is_signaling_nan( float128 ); - -#endif - diff --git a/lib/libc/powerpc64/static_tls.h b/lib/libc/powerpc64/static_tls.h deleted file mode 100644 index 014b8a93145..00000000000 --- a/lib/libc/powerpc64/static_tls.h +++ /dev/null @@ -1,44 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2019 The FreeBSD Foundation - * - * This software was developed by Konstantin Belousov - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _LIBC_POWERPC64_STATIC_TLS_H -#define _LIBC_POWERPC64_STATIC_TLS_H - -static __inline uintptr_t -_libc_get_static_tls_base(size_t offset) -{ - uintptr_t tlsbase; - - __asm __volatile("mr %0,13" : "=r"(tlsbase)); - tlsbase += offset - 0x7010; - return (tlsbase); -} - -#endif diff --git a/lib/libc/powerpc64/string/Makefile.inc b/lib/libc/powerpc64/string/Makefile.inc deleted file mode 100644 index d1918ff027c..00000000000 --- a/lib/libc/powerpc64/string/Makefile.inc +++ /dev/null @@ -1,17 +0,0 @@ - -MDSRCS+= \ - bcopy.S \ - bcopy_vsx.S \ - bcopy_resolver.c \ - memcpy.S \ - memcpy_vsx.S \ - memcpy_resolver.c \ - memmove.S \ - memmove_vsx.S \ - memmove_resolver.c \ - strncpy_arch_2_05.S \ - strncpy.c \ - strncpy_resolver.c \ - strcpy_arch_2_05.S \ - strcpy.c \ - strcpy_resolver.c diff --git a/lib/libc/powerpc64/string/bcopy.S b/lib/libc/powerpc64/string/bcopy.S deleted file mode 100644 index 6f6223214e2..00000000000 --- a/lib/libc/powerpc64/string/bcopy.S +++ /dev/null @@ -1,338 +0,0 @@ -/*- - * Copyright (c) 2018 Instituto de Pesquisas Eldorado - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of its contributors may - * be used to endorse or promote products derived from this software - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#define BLOCK_SIZE_BITS 6 -#define BLOCK_SIZE (1 << BLOCK_SIZE_BITS) -#define BLOCK_SIZE_MASK (BLOCK_SIZE - 1) - -/* Minimum 8 byte alignment, to avoid cache-inhibited alignment faults.*/ -#ifndef ALIGN_MASK -#define ALIGN_MASK 0x7 -#endif - -#define MULTI_PHASE_THRESHOLD 512 - -#ifndef FN_NAME -#ifdef MEMMOVE -#define FN_NAME __memmove -WEAK_REFERENCE(__memmove, memmove); -#else -#define FN_NAME __bcopy -WEAK_REFERENCE(__bcopy, bcopy); -#endif -#endif - -/* - * r3: dst - * r4: src - * r5: len - */ - -ENTRY(FN_NAME) - cmpld %r3, %r4 /* src == dst? nothing to do */ - beqlr- - cmpdi %r5, 0 /* len == 0? nothing to do */ - beqlr- - -#ifdef MEMMOVE - std %r3, -8(%r1) /* save dst */ -#else /* bcopy: swap src/dst */ - mr %r0, %r3 - mr %r3, %r4 - mr %r4, %r0 -#endif - - /* First check for relative alignment, if unaligned copy one byte at a time */ - andi. %r8, %r3, ALIGN_MASK - andi. %r7, %r4, ALIGN_MASK - cmpd %r7, %r8 - bne .Lunaligned - - - cmpldi %r5, MULTI_PHASE_THRESHOLD - bge .Lmulti_phase - b .Lfast_copy - -.Lunaligned: - /* forward or backward copy? */ - cmpd %r4, %r3 - blt .Lbackward_unaligned - - /* Just need to setup increment and jump to copy */ - li %r0, 1 - mtctr %r5 - b .Lsingle_1_loop - -.Lbackward_unaligned: - /* advance src and dst to last byte, set decrement and jump to copy */ - add %r3, %r3, %r5 - addi %r3, %r3, -1 - add %r4, %r4, %r5 - addi %r4, %r4, -1 - li %r0, -1 - mtctr %r5 - b .Lsingle_1_loop - -.Lfast_copy: - /* align src */ - cmpd %r4, %r3 /* forward or backward copy? */ - blt .Lbackward_align - - .align 5 -.Lalign: - andi. %r0, %r4, 15 - beq .Lsingle_copy - lbz %r0, 0(%r4) - addi %r4, %r4, 1 - stb %r0, 0(%r3) - addi %r3, %r3, 1 - addi %r5, %r5, -1 - cmpdi %r5, 0 - beq- .Ldone - b .Lalign - -.Lbackward_align: - /* advance src and dst to end (past last byte) */ - add %r3, %r3, %r5 - add %r4, %r4, %r5 - .align 5 -.Lbackward_align_loop: - andi. %r0, %r4, 15 - beq .Lbackward_single_copy - lbzu %r0, -1(%r4) - addi %r5, %r5, -1 - stbu %r0, -1(%r3) - cmpdi %r5, 0 - beq- .Ldone - b .Lbackward_align_loop - -.Lsingle_copy: - /* forward copy */ - li %r0, 1 - li %r8, 16 - li %r9, 0 - b .Lsingle_phase - -.Lbackward_single_copy: - /* backward copy */ - li %r0, -1 - li %r8, -16 - li %r9, -15 - /* point src and dst to last byte */ - addi %r3, %r3, -1 - addi %r4, %r4, -1 - -.Lsingle_phase: - srdi. %r6, %r5, 4 /* number of 16-bytes */ - beq .Lsingle_1 - - /* pre-adjustment */ - add %r3, %r3, %r9 - add %r4, %r4, %r9 - - mtctr %r6 - .align 5 -.Lsingle_16_loop: - ld %r6, 0(%r4) - ld %r7, 8(%r4) - add %r4, %r4, %r8 - std %r6, 0(%r3) - std %r7, 8(%r3) - add %r3, %r3, %r8 - bdnz .Lsingle_16_loop - - /* post-adjustment */ - sub %r3, %r3, %r9 - sub %r4, %r4, %r9 - -.Lsingle_1: - andi. %r6, %r5, 0x0f /* number of 1-bytes */ - beq .Ldone /* 1-bytes == 0? done */ - - mtctr %r6 - .align 5 -.Lsingle_1_loop: - lbz %r6, 0(%r4) - add %r4, %r4, %r0 /* increment */ - stb %r6, 0(%r3) - add %r3, %r3, %r0 /* increment */ - bdnz .Lsingle_1_loop - -.Ldone: -#ifdef MEMMOVE - ld %r3, -8(%r1) /* restore dst */ -#endif - blr - - -.Lmulti_phase: - /* set up multi-phase copy parameters */ - - /* r7 = bytes before the aligned section of the buffer */ - andi. %r6, %r4, 15 - subfic %r7, %r6, 16 - /* r8 = bytes in and after the aligned section of the buffer */ - sub %r8, %r5, %r7 - /* r9 = bytes after the aligned section of the buffer */ - andi. %r9, %r8, BLOCK_SIZE_MASK - /* r10 = BLOCKS in the aligned section of the buffer */ - srdi %r10, %r8, BLOCK_SIZE_BITS - - /* forward or backward copy? */ - cmpd %r4, %r3 - blt .Lbackward_multi_copy - - /* set up forward copy parameters */ - std %r7, -32(%r1) /* bytes to copy in phase 1 */ - std %r10, -40(%r1) /* BLOCKS to copy in phase 2 */ - std %r9, -48(%r1) /* bytes to copy in phase 3 */ - - li %r0, 1 /* increment for phases 1 and 3 */ - li %r5, BLOCK_SIZE /* increment for phase 2 */ - - /* op offsets for phase 2 */ - li %r7, 0 - li %r8, 16 - li %r9, 32 - li %r10, 48 - - std %r8, -16(%r1) /* 16-byte increment (16) */ - std %r7, -24(%r1) /* 16-byte pre/post adjustment (0) */ - - b .Lphase1 - -.Lbackward_multi_copy: - /* set up backward copy parameters */ - std %r9, -32(%r1) /* bytes to copy in phase 1 */ - std %r10, -40(%r1) /* BLOCKS to copy in phase 2 */ - std %r7, -48(%r1) /* bytes to copy in phase 3 */ - - li %r0, -1 /* increment for phases 1 and 3 */ - add %r6, %r5, %r0 /* r6 = len - 1 */ - li %r5, -BLOCK_SIZE /* increment for phase 2 */ - /* advance src and dst to the last position */ - add %r3, %r3, %r6 - add %r4, %r4, %r6 - - /* op offsets for phase 2 */ - li %r7, -15 - li %r8, -31 - li %r9, -47 - li %r10, -63 - - add %r6, %r7, %r0 /* r6 = -16 */ - std %r6, -16(%r1) /* 16-byte increment (-16) */ - std %r7, -24(%r1) /* 16-byte pre/post adjustment (-15) */ - -.Lphase1: - ld %r6, -32(%r1) /* bytes to copy in phase 1 */ - cmpldi %r6, 0 /* r6 == 0? skip phase 1 */ - beq+ .Lphase2 - - mtctr %r6 - .align 5 -.Lphase1_loop: - lbz %r6, 0(%r4) - add %r4, %r4, %r0 /* phase 1 increment */ - stb %r6, 0(%r3) - add %r3, %r3, %r0 /* phase 1 increment */ - bdnz .Lphase1_loop - -.Lphase2: - ld %r6, -40(%r1) /* BLOCKS to copy in phase 2 */ - cmpldi %r6, 0 /* %r6 == 0? skip phase 2 */ - beq .Lphase3 - -#ifdef FN_PHASE2 -FN_PHASE2 -#else - /* save registers */ - std %r14, -56(%r1) - std %r15, -64(%r1) - std %r16, -72(%r1) - std %r17, -80(%r1) - std %r18, -88(%r1) - std %r19, -96(%r1) - std %r20, -104(%r1) - std %r21, -112(%r1) - - addi %r18, %r7, 8 - addi %r19, %r8, 8 - addi %r20, %r9, 8 - addi %r21, %r10, 8 - - mtctr %r6 - .align 5 -.Lphase2_loop: - ldx %r14, %r7, %r4 - ldx %r15, %r18, %r4 - ldx %r16, %r8, %r4 - ldx %r17, %r19, %r4 - stdx %r14, %r7, %r3 - stdx %r15, %r18, %r3 - stdx %r16, %r8, %r3 - stdx %r17, %r19, %r3 - - ldx %r14, %r9, %r4 - ldx %r15, %r20, %r4 - ldx %r16, %r10, %r4 - ldx %r17, %r21, %r4 - stdx %r14, %r9, %r3 - stdx %r15, %r20, %r3 - stdx %r16, %r10, %r3 - stdx %r17, %r21, %r3 - - add %r4, %r4, %r5 /* phase 2 increment */ - add %r3, %r3, %r5 /* phase 2 increment */ - - bdnz .Lphase2_loop - - /* restore registers */ - ld %r14, -56(%r1) - ld %r15, -64(%r1) - ld %r16, -72(%r1) - ld %r17, -80(%r1) - ld %r18, -88(%r1) - ld %r19, -96(%r1) - ld %r20, -104(%r1) - ld %r21, -112(%r1) -#endif - -.Lphase3: - /* load registers for transitioning into the single-phase logic */ - ld %r5, -48(%r1) /* bytes to copy in phase 3 */ - ld %r8, -16(%r1) /* 16-byte increment */ - ld %r9, -24(%r1) /* 16-byte pre/post adjustment */ - b .Lsingle_phase - -END(FN_NAME) - - .section .note.GNU-stack,"",%progbits - diff --git a/lib/libc/powerpc64/string/bcopy_resolver.c b/lib/libc/powerpc64/string/bcopy_resolver.c deleted file mode 100644 index a551d5d3ca5..00000000000 --- a/lib/libc/powerpc64/string/bcopy_resolver.c +++ /dev/null @@ -1,71 +0,0 @@ -/*- - * Copyright (c) 2018 Instituto de Pesquisas Eldorado - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of its contributors may - * be used to endorse or promote products derived from this software - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include - -#define _CAT(a,b) a##b -#define CAT(a,b) _CAT(a,b) -#define CAT3(a,b,c) CAT(CAT(a,b),c) - -#ifdef MEMCOPY -#define FN_NAME memcpy -#define FN_RET void * -#define FN_PARAMS (void *dst, const void *src, size_t len) - -#elif defined(MEMMOVE) -#define FN_NAME memmove -#define FN_RET void * -#define FN_PARAMS (void *dst, const void *src, size_t len) - -#else -#define FN_NAME bcopy -#define FN_RET void -#define FN_PARAMS (const void *src, void *dst, size_t len) -#endif - -#define FN_NAME_NOVSX CAT(__, FN_NAME) -#define FN_NAME_VSX CAT3(__, FN_NAME, _vsx) - -FN_RET FN_NAME_NOVSX FN_PARAMS; -FN_RET FN_NAME_VSX FN_PARAMS; - -DEFINE_UIFUNC(, FN_RET, FN_NAME, FN_PARAMS) -{ - /* VSX instructions were added in POWER ISA 2.06, - * however it requires data to be word-aligned. - * Since POWER ISA 2.07B this is solved transparently - * by the hardware - */ - if (cpu_features & PPC_FEATURE_HAS_VSX) - return (FN_NAME_VSX); - else - return (FN_NAME_NOVSX); -} diff --git a/lib/libc/powerpc64/string/bcopy_vsx.S b/lib/libc/powerpc64/string/bcopy_vsx.S deleted file mode 100644 index f1740d3db7b..00000000000 --- a/lib/libc/powerpc64/string/bcopy_vsx.S +++ /dev/null @@ -1,59 +0,0 @@ -/*- - * Copyright (c) 2018 Instituto de Pesquisas Eldorado - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of its contributors may - * be used to endorse or promote products derived from this software - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef FN_NAME -#define FN_NAME __bcopy_vsx -#endif - -/* - * r3: dst - * r4: src - * r5: block increment - * r6: blocks to copy - * r7/r8/r9/r10: 16-byte offsets to copy - */ - -#define FN_PHASE2 \ - mtctr %r6 ;\ - .align 5 ;\ -.Lphase2_loop: ;\ - lxvd2x %vs6, %r7, %r4 ;\ - lxvd2x %vs7, %r8, %r4 ;\ - lxvd2x %vs8, %r9, %r4 ;\ - lxvd2x %vs9, %r10, %r4 ;\ - stxvd2x %vs6, %r7, %r3 ;\ - stxvd2x %vs7, %r8, %r3 ;\ - stxvd2x %vs8, %r9, %r3 ;\ - stxvd2x %vs9, %r10, %r3 ;\ - /* phase 2 increment */ ;\ - add %r4, %r4, %r5 ;\ - add %r3, %r3, %r5 ;\ - \ - bdnz .Lphase2_loop ;\ - -#include "bcopy.S" diff --git a/lib/libc/powerpc64/string/memcpy.S b/lib/libc/powerpc64/string/memcpy.S deleted file mode 100644 index 28f3f2bb0ab..00000000000 --- a/lib/libc/powerpc64/string/memcpy.S +++ /dev/null @@ -1,131 +0,0 @@ -/*- - * Copyright (c) 2018 Instituto de Pesquisas Eldorado - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of its contributors may - * be used to endorse or promote products derived from this software - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#ifndef FN_NAME -#define FN_NAME __memcpy -WEAK_REFERENCE(__memcpy, memcpy); -#define BLOCK_BITS 4 -#endif - -#define BLOCK_BYTES (1 << BLOCK_BITS) -#define BLOCK_MASK (BLOCK_BYTES - 1) - -/* Minimum 8 byte alignment, to avoid cache-inhibited alignment faults. */ -#ifndef ALIGN_MASK -#define ALIGN_MASK 0x7 -#endif - -/* - * r3: dst - * r4: src - * r5: len - */ -ENTRY(FN_NAME) - cmpdi %r5, 0 /* len == 0? nothing to do */ - beqlr- - - /* If src and dst are relatively misaligned, do byte copies. */ - andi. %r8, %r3, ALIGN_MASK - andi. %r7, %r4, ALIGN_MASK - cmpd %r8, %r7 - mr %r7, %r5 - mr %r8, %r3 /* save dst */ - bne .Lcopy_remaining_fix_index_byte - - /* align src */ -.Lalignment_loop: - lbz %r6, 0(%r4) - stb %r6, 0(%r3) - addi %r3, %r3, 1 - addi %r4, %r4, 1 - addi %r5, %r5, -1 - cmpdi %r5, 0 - beq .Lexit - andi. %r0, %r4, BLOCK_MASK - bne .Lalignment_loop - - /* r7 = remaining, non-block, bytes */ - andi. %r7, %r5, BLOCK_MASK - - /* Check if there are blocks of BLOCK_BYTES to be copied */ - xor. %r5, %r5, %r7 - beq .Lcopy_remaining_fix_index_byte - -#ifdef FN_COPY_LOOP -FN_COPY_LOOP -#else - /* Setup to copy word with ldu and stdu */ - ld %r6, 0(%r4) - ld %r9, 8(%r4) - std %r6, 0(%r3) - std %r9, 8(%r3) - addi %r5, %r5, -BLOCK_BYTES - cmpd %r5, 0 - beq .Lcopy_remaining_fix_index_word - - srdi %r5, %r5, BLOCK_BITS - mtctr %r5 -.Lcopy_word: - ldu %r6, 16(%r4) - ld %r9, 8(%r4) - stdu %r6, 16(%r3) - std %r9, 8(%r3) - bdnz .Lcopy_word - -.Lcopy_remaining_fix_index_word: - /* Check if there are remaining bytes */ - cmpd %r7, 0 - beq .Lexit - addi %r3, %r3, BLOCK_MASK - addi %r4, %r4, BLOCK_MASK - b .Lcopy_remaining -#endif - -.Lcopy_remaining_fix_index_byte: - addi %r4, %r4, -1 - addi %r3, %r3, -1 - - /* Copy remaining bytes */ -.Lcopy_remaining: - mtctr %r7 -.Lcopy_remaining_loop: - lbzu %r6, 1(%r4) - stbu %r6, 1(%r3) - bdnz .Lcopy_remaining_loop - -.Lexit: - /* Restore dst */ - mr %r3, %r8 - blr - -END(FN_NAME) - - .section .note.GNU-stack,"",%progbits - diff --git a/lib/libc/powerpc64/string/memcpy_resolver.c b/lib/libc/powerpc64/string/memcpy_resolver.c deleted file mode 100644 index d1ac75edf5b..00000000000 --- a/lib/libc/powerpc64/string/memcpy_resolver.c +++ /dev/null @@ -1,3 +0,0 @@ - -#define MEMCOPY -#include "bcopy_resolver.c" diff --git a/lib/libc/powerpc64/string/memcpy_vsx.S b/lib/libc/powerpc64/string/memcpy_vsx.S deleted file mode 100644 index 69554e026f3..00000000000 --- a/lib/libc/powerpc64/string/memcpy_vsx.S +++ /dev/null @@ -1,64 +0,0 @@ -/*- - * Copyright (c) 2018 Instituto de Pesquisas Eldorado - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of its contributors may - * be used to endorse or promote products derived from this software - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#define FN_NAME __memcpy_vsx -#define BLOCK_BITS 6 -#define ALIGN_MASK 0xf - -/* - * r5: bytes to copy (multiple of BLOCK_BYTES) - * - */ -#define FN_COPY_LOOP \ - /* Load CTR with number of blocks */ \ - srdi %r5, %r5, BLOCK_BITS ;\ - mtctr %r5 ;\ - /* Prepare indexes to load and store data */ \ - xor %r6, %r6, %r6 ;\ - li %r9, 16 ;\ - li %r10, 32 ;\ - li %r11, 48 ;\ -.Lcopy_vsx_loop: \ - lxvd2x %vs6, %r6, %r4 ;\ - lxvd2x %vs7, %r9, %r4 ;\ - lxvd2x %vs8, %r10, %r4 ;\ - lxvd2x %vs9, %r11, %r4 ;\ - stxvd2x %vs6, %r6, %r3 ;\ - stxvd2x %vs7, %r9, %r3 ;\ - stxvd2x %vs8, %r10, %r3 ;\ - stxvd2x %vs9, %r11, %r3 ;\ - \ - addi %r3, %r3, BLOCK_BYTES ;\ - addi %r4, %r4, BLOCK_BYTES ;\ - bdnz .Lcopy_vsx_loop ;\ - \ - /* Check if there is remaining bytes */ \ - cmpd %r7, 0 ;\ - beq .Lexit ;\ - -#include "memcpy.S" diff --git a/lib/libc/powerpc64/string/memmove.S b/lib/libc/powerpc64/string/memmove.S deleted file mode 100644 index 3d49c57100d..00000000000 --- a/lib/libc/powerpc64/string/memmove.S +++ /dev/null @@ -1,3 +0,0 @@ - -#define MEMMOVE -#include "bcopy.S" diff --git a/lib/libc/powerpc64/string/memmove_resolver.c b/lib/libc/powerpc64/string/memmove_resolver.c deleted file mode 100644 index fcb11ee0ae4..00000000000 --- a/lib/libc/powerpc64/string/memmove_resolver.c +++ /dev/null @@ -1,3 +0,0 @@ - -#define MEMMOVE -#include "bcopy_resolver.c" diff --git a/lib/libc/powerpc64/string/memmove_vsx.S b/lib/libc/powerpc64/string/memmove_vsx.S deleted file mode 100644 index 9e7d51ce468..00000000000 --- a/lib/libc/powerpc64/string/memmove_vsx.S +++ /dev/null @@ -1,4 +0,0 @@ - -#define MEMMOVE -#define FN_NAME __memmove_vsx -#include "bcopy_vsx.S" diff --git a/lib/libc/powerpc64/string/strcpy.c b/lib/libc/powerpc64/string/strcpy.c deleted file mode 100644 index 23531264d8f..00000000000 --- a/lib/libc/powerpc64/string/strcpy.c +++ /dev/null @@ -1,31 +0,0 @@ -/*- - * Copyright (c) 2019 Leandro Lupori - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of its contributors may - * be used to endorse or promote products derived from this software - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#include -#define WEAK_STRCPY -#include "../../string/strcpy.c" diff --git a/lib/libc/powerpc64/string/strcpy_arch_2_05.S b/lib/libc/powerpc64/string/strcpy_arch_2_05.S deleted file mode 100644 index 36728fa0b40..00000000000 --- a/lib/libc/powerpc64/string/strcpy_arch_2_05.S +++ /dev/null @@ -1,202 +0,0 @@ -/*- - * Copyright (c) 2018 Instituto de Pesquisas Eldorado - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of its contributors may - * be used to endorse or promote products derived from this software - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#include -#if 0 - RCSID("$NetBSD: strcpy.S,v 1.0 2018/05/08 13:00:49 lbianc Exp $") -#endif - -ENTRY(__strcpy_arch_2_05) - mr %r8, %r3 - -/* - * Aligning the reading address, even if it is already aligned to avoid - * performance degradation with strings with 8 bytes or less. - */ -.Lalignment: - lbz %r0,0(%r4) - cmpdi cr7,%r0,0 - stb %r0,0(%r8) - beq cr7,.Lexit - addi %r4,%r4,1 - addi %r8,%r8,1 - andi. %r0,%r4,0x7 - bne .Lalignment - -/* Copy by double word with aligned address. */ -.Lcopy_dw: - ld %r0,0(%r4) - xor %r6,%r6,%r6 - cmpb %r5,%r0,%r6 - cmpdi cr7,%r5,0 - bne cr7,.Lcheck_zero - /* Backward r8 to use stdu instruction in Lcopy_dw_loop */ - addi %r8,%r8,-8 -.Lcopy_dw_loop: - stdu %r0,8(%r8) - ldu %r0,8(%r4) - cmpb %r5,%r0,%r6 - cmpdi cr7,%r5,0 - beq cr7,.Lcopy_dw_loop - - addi %r8,%r8,8 /* Forward r8 to use std instruction. */ -#if defined(__BIG_ENDIAN__) -/* Find where the zero is located. */ -.Lcheck_zero: - rldicr. %r5,%r0,0,7 - beq .Lfound_on_byte_0 - rldicr. %r7,%r0,8,7 - beq .Lfound_on_byte_1 - rldicr. %r7,%r0,16,7 - beq .Lfound_on_byte_2 - rldicr. %r7,%r0,24,7 - beq .Lfound_on_byte_3 - andis. %r7,%r0,0xff00 - beq .Lfound_on_byte_4 - andis. %r7,%r0,0xff - beq .Lfound_on_byte_5 - andi. %r7,%r0,0xff00 - beq .Lfound_on_byte_6 - -/* Copy the last string bytes according to the string end position. */ -.Lfound_on_byte_7: - std %r0,0(%r8) - b .Lexit - -.Lfound_on_byte_6: - srdi %r6,%r0,32 - stw %r6,0(%r8) - srdi %r6,%r0,16 - sth %r6,4(%r8) - srdi %r6,%r0,8 - stb %r6,6(%r8) - b .Lexit - -.Lfound_on_byte_5: - srdi %r6,%r0,32 - stw %r6,0(%r8) - srdi %r6,%r0,16 - sth %r6,4(%r8) - b .Lexit - -.Lfound_on_byte_4: - srdi %r6,%r0,32 - stw %r6,0(%r8) - srdi %r6,%r0,24 - stb %r6,4(%r8) - b .Lexit - -.Lfound_on_byte_3: - srdi %r6,%r0,32 - stw %r6,0(%r8) - b .Lexit - -.Lfound_on_byte_2: - srdi %r6,%r0,48 - sth %r6,0(%r8) - srdi %r6,%r0,40 - stb %r6,2(%r8) - b .Lexit - -.Lfound_on_byte_1: - srdi %r6,%r0,48 - sth %r6,0(%r8) - b .Lexit - -.Lfound_on_byte_0: - srdi %r6,%r0,56 - stb %r6,0(%r8) -#elif defined(__LITTLE_ENDIAN__) -/* Find where the zero is located. */ -.Lcheck_zero: - andi. %r7,%r0,0xff - beq .Lfound_on_byte_0 - andi. %r7,%r0,0xff00 - beq .Lfound_on_byte_1 - andis. %r7,%r0,0xff - beq .Lfound_on_byte_2 - andis. %r7,%r0,0xff00 - beq .Lfound_on_byte_3 - rldicr. %r7,%r0,24,7 - beq .Lfound_on_byte_4 - rldicr. %r7,%r0,16,7 - beq .Lfound_on_byte_5 - rldicr. %r7,%r0,8,7 - beq .Lfound_on_byte_6 - -/* Copy the last string bytes according to the string end position. */ -.Lfound_on_byte_7: - std %r0,0(%r8) - b .Lexit - -.Lfound_on_byte_6: - stw %r0,0(%r8) - srdi %r6,%r0,32 - sth %r6,4(%r8) - srdi %r6,%r0,48 - stb %r6,6(%r8) - b .Lexit - -.Lfound_on_byte_5: - stw %r0,0(%r8) - srdi %r6,%r0,32 - sth %r6,4(%r8) - b .Lexit - -.Lfound_on_byte_4: - stw %r0,0(%r8) - srdi %r6,%r0,32 - stb %r6,4(%r8) - b .Lexit - -.Lfound_on_byte_3: - stw %r0,0(%r8) - b .Lexit - -.Lfound_on_byte_2: - sth %r0,0(%r8) - srdi %r6,%r0,16 - stb %r6,2(%r8) - b .Lexit - -.Lfound_on_byte_1: - sth %r0,0(%r8) - b .Lexit - -.Lfound_on_byte_0: - stb %r0,0(%r8) -#else -#error "Unable to determine Endianness" -#endif -.Lexit: - blr - -END(__strcpy_arch_2_05) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc64/string/strcpy_resolver.c b/lib/libc/powerpc64/string/strcpy_resolver.c deleted file mode 100644 index 513d33e96e2..00000000000 --- a/lib/libc/powerpc64/string/strcpy_resolver.c +++ /dev/null @@ -1,45 +0,0 @@ -/*- - * Copyright (c) 2019 Leandro Lupori - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of its contributors may - * be used to endorse or promote products derived from this software - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#include -#include -#include - -char * -__strcpy_arch_2_05(char * restrict dst, const char * restrict src); - -char * -__strcpy(char * restrict dst, const char * restrict src); - -DEFINE_UIFUNC(, char *, strcpy, (char * restrict, const char * restrict)) -{ - if (cpu_features & PPC_FEATURE_ARCH_2_05) - return (__strcpy_arch_2_05); - else - return (__strcpy); -} diff --git a/lib/libc/powerpc64/string/strncpy.c b/lib/libc/powerpc64/string/strncpy.c deleted file mode 100644 index 6879834c581..00000000000 --- a/lib/libc/powerpc64/string/strncpy.c +++ /dev/null @@ -1,31 +0,0 @@ -/*- - * Copyright (c) 2019 Leandro Lupori - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of its contributors may - * be used to endorse or promote products derived from this software - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#include -#define WEAK_STRNCPY -#include "../../string/strncpy.c" diff --git a/lib/libc/powerpc64/string/strncpy_arch_2_05.S b/lib/libc/powerpc64/string/strncpy_arch_2_05.S deleted file mode 100644 index f78d1c49c62..00000000000 --- a/lib/libc/powerpc64/string/strncpy_arch_2_05.S +++ /dev/null @@ -1,129 +0,0 @@ -/*- - * Copyright (c) 2018 Instituto de Pesquisas Eldorado - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of its contributors may - * be used to endorse or promote products derived from this software - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -ENTRY(__strncpy_arch_2_05) - stdu %r1,-40(%r1) - mflr %r0 - std %r0,16(%r1) - std %r3,32(%r1) - - xor %r6,%r6,%r6 /* fixed 0 reg */ - -/* align loop */ - addi %r3,%r3,-1 -.Lalign_loop: - /* len? */ - cmpdi %r5,0 - beq .Lexit - /* aligned? */ - andi. %r0,%r4,7 - beq .Ldw_copy - /* copy */ - lbz %r7,0(%r4) - stbu %r7,1(%r3) - addi %r4,%r4,1 - addi %r5,%r5,-1 - /* zero? */ - cmpdi %r7,0 - beq .Lzero - b .Lalign_loop - -/* dword copy loop */ -.Ldw_copy: - /* prepare src and dst to use load/store and update */ - addi %r3,%r3,-7 - addi %r4,%r4,-8 -.Ldw_copy_loop: - cmpdi %r5,8 - blt .Lbyte_copy - - ldu %r0,8(%r4) - /* check for 0 */ - cmpb %r7,%r0,%r6 - cmpdi %r7,0 - bne .Lbyte_copy_and_zero - /* copy to dst */ - stdu %r0,8(%r3) - addi %r5,%r5,-8 - b .Ldw_copy_loop - -/* Copy remaining src bytes, zero-out buffer - * Note: r5 will be >= 8 - */ -.Lbyte_copy_and_zero: - addi %r3,%r3,7 - addi %r4,%r4,-1 -.Lbyte_copy_and_zero_loop: - lbzu %r7,1(%r4) - stbu %r7,1(%r3) - addi %r5,%r5,-1 - cmpdi %r7,0 - beq .Lzero - b .Lbyte_copy_and_zero_loop - -/* zero-out remaining dst bytes */ -.Lzero: - addi %r3,%r3,1 - li %r4,0 - /* r5 has len already */ - bl memset - nop - b .Lexit - -/* copy remaining (< 8) bytes */ -.Lbyte_copy: - cmpdi %r5,0 - beq .Lexit - addi %r3,%r3,7 - addi %r4,%r4,7 - mtctr %r5 -.Lbyte_copy_loop: - lbzu %r7,1(%r4) - stbu %r7,1(%r3) - cmpdi %r7,0 - /* 0 found: zero out remaining bytes */ - beq .Lbyte_copy_zero - bdnz .Lbyte_copy_loop - b .Lexit -.Lbyte_copy_zero_loop: - stbu %r6,1(%r3) -.Lbyte_copy_zero: - bdnz .Lbyte_copy_zero_loop - -.Lexit: - /* epilogue */ - ld %r3,32(%r1) - ld %r0,16(%r1) - mtlr %r0 - addi %r1,%r1,40 - blr - -END(__strncpy_arch_2_05) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc64/string/strncpy_resolver.c b/lib/libc/powerpc64/string/strncpy_resolver.c deleted file mode 100644 index b3b5511c74b..00000000000 --- a/lib/libc/powerpc64/string/strncpy_resolver.c +++ /dev/null @@ -1,46 +0,0 @@ -/*- - * Copyright (c) 2019 Leandro Lupori - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of its contributors may - * be used to endorse or promote products derived from this software - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#include -#include -#include - -char * -__strncpy_arch_2_05(char * restrict dst, const char * restrict src, size_t len); - -char * -__strncpy(char * restrict dst, const char * restrict src, size_t len); - -DEFINE_UIFUNC(, char *, strncpy, - (char * restrict, const char * restrict, size_t)) -{ - if (cpu_features & PPC_FEATURE_ARCH_2_05) - return (__strncpy_arch_2_05); - else - return (__strncpy); -} diff --git a/lib/libc/powerpc64/sys/Makefile.inc b/lib/libc/powerpc64/sys/Makefile.inc deleted file mode 100644 index 17b7b3b2611..00000000000 --- a/lib/libc/powerpc64/sys/Makefile.inc +++ /dev/null @@ -1,5 +0,0 @@ - -SRCS+= __vdso_gettc.c \ - sched_getcpu_gen.c - -MDASM+= cerror.S diff --git a/lib/libc/powerpc64/sys/__vdso_gettc.c b/lib/libc/powerpc64/sys/__vdso_gettc.c deleted file mode 100644 index b9c924e0e54..00000000000 --- a/lib/libc/powerpc64/sys/__vdso_gettc.c +++ /dev/null @@ -1,63 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2020 Brandon Bergren - * - * This software was developed by Konstantin Belousov - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include - -#include - -#include - -#include "libc_private.h" - -#pragma weak __vdso_gettc -int -__vdso_gettc(const struct vdso_timehands *th, u_int *tc) -{ - u_quad_t tb; - - if (__predict_false(th->th_algo != VDSO_TH_ALGO_PPC_TB)) - return (ENOSYS); - - __asm __volatile ("mftb %0" : "=r"(tb)); - *tc = tb; - return (0); -} - -#pragma weak __vdso_gettimekeep -int -__vdso_gettimekeep(struct vdso_timekeep **tk) -{ - - return (_elf_aux_info(AT_TIMEKEEP, tk, sizeof(*tk))); -} diff --git a/lib/libc/powerpc64/sys/cerror.S b/lib/libc/powerpc64/sys/cerror.S deleted file mode 100644 index 2be58cf8a84..00000000000 --- a/lib/libc/powerpc64/sys/cerror.S +++ /dev/null @@ -1,59 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: cerror.S,v 1.5 2000/01/27 14:58:48 kleink Exp $ */ - -#include -#include "SYS.h" - - .globl HIDENAME(cerror) - .globl CNAME(__error) - - /* - * The __error() function is thread aware. For non-threaded - * programs and the initial thread in threaded programs, - * it returns a pointer to the global errno variable. - */ -ENTRY_NOPROF(HIDENAME(cerror)) - mflr %r0 - std %r0,16(%r1) /* save lr */ - stdu %r1,-64(%r1) /* allocate new stack frame */ - std %r31,48(%r1) - - mr %r31,%r3 /* stash errval in callee-saved register */ - bl CNAME(__error) - nop - stw %r31,0(%r3) /* store errval into &errno */ - - ld %r31,48(%r1) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - li %r3,-1 - li %r4,-1 - blr -END(HIDENAME(cerror)) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpcspe/Makefile.inc b/lib/libc/powerpcspe/Makefile.inc deleted file mode 100644 index 6962e107ed4..00000000000 --- a/lib/libc/powerpcspe/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ - -CFLAGS+= -I${LIBC_SRCTOP}/powerpc - -# Long double is 64-bits -SRCS+=machdep_ldisd.c -SYM_MAPS+=${LIBC_SRCTOP}/powerpc/Symbol.map diff --git a/lib/libc/powerpcspe/gen/Makefile.inc b/lib/libc/powerpcspe/gen/Makefile.inc deleted file mode 100644 index efdc778e899..00000000000 --- a/lib/libc/powerpcspe/gen/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ - -.include "${LIBC_SRCTOP}/powerpc/gen/Makefile.common" - -SRCS += fabs.S flt_rounds.c fpgetmask.c fpgetround.c \ - fpgetsticky.c fpsetmask.c fpsetround.c \ - _setjmp.S setjmp.S sigsetjmp.S diff --git a/lib/libc/powerpcspe/gen/_setjmp.S b/lib/libc/powerpcspe/gen/_setjmp.S deleted file mode 100644 index f282e0013f9..00000000000 --- a/lib/libc/powerpcspe/gen/_setjmp.S +++ /dev/null @@ -1,115 +0,0 @@ -/*- - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: _setjmp.S,v 1.1 1997/03/29 20:55:53 thorpej Exp $ */ - -#include -/* - * C library -- _setjmp, _longjmp - * - * _longjmp(a,v) - * will generate a "return(v?v:1)" from the last call to - * _setjmp(a) - * by restoring registers from the stack. - * The previous signal state is NOT restored. - * - * jmpbuf layout: - * +------------+ - * | unused | - * +------------+ - * | unused | - * | | - * | (4 words) | - * | | - * +------------+ - * | saved regs | - * | ... | - */ - -ENTRY(_setjmp) - mflr %r11 - mfcr %r12 - evstdd %r1,24+0*8(%r3) - evstdd %r2,24+1*8(%r3) - evstdd %r11,24+2*8(%r3) - evstdd %r12,24+3*8(%r3) - evstdd %r13,24+4*8(%r3) - evstdd %r14,24+5*8(%r3) - evstdd %r15,24+6*8(%r3) - evstdd %r16,24+7*8(%r3) - evstdd %r17,24+8*8(%r3) - evstdd %r18,24+9*8(%r3) - evstdd %r19,24+10*8(%r3) - evstdd %r20,24+11*8(%r3) - evstdd %r21,24+12*8(%r3) - evstdd %r22,24+13*8(%r3) - evstdd %r23,24+14*8(%r3) - evstdd %r24,24+15*8(%r3) - evstdd %r25,24+16*8(%r3) - evstdd %r26,24+17*8(%r3) - evstdd %r27,24+18*8(%r3) - evstdd %r28,24+19*8(%r3) - evstdd %r29,24+20*8(%r3) - evstdd %r30,24+21*8(%r3) - evstdd %r31,24+22*8(%r3) - - li %r3,0 - blr -END(_setjmp) - -ENTRY(_longjmp) - evldd %r1,24+0*8(%r3) - evldd %r2,24+1*8(%r3) - evldd %r11,24+2*8(%r3) - evldd %r12,24+3*8(%r3) - evldd %r13,24+4*8(%r3) - evldd %r14,24+5*8(%r3) - evldd %r15,24+6*8(%r3) - evldd %r16,24+7*8(%r3) - evldd %r17,24+8*8(%r3) - evldd %r18,24+9*8(%r3) - evldd %r19,24+10*8(%r3) - evldd %r20,24+11*8(%r3) - evldd %r21,24+12*8(%r3) - evldd %r22,24+13*8(%r3) - evldd %r23,24+14*8(%r3) - evldd %r24,24+15*8(%r3) - evldd %r25,24+16*8(%r3) - evldd %r26,24+17*8(%r3) - evldd %r27,24+18*8(%r3) - evldd %r28,24+19*8(%r3) - evldd %r29,24+20*8(%r3) - evldd %r30,24+21*8(%r3) - evldd %r31,24+22*8(%r3) - - mtlr %r11 - mtcr %r12 - or. %r3,%r4,%r4 - bnelr - li %r3,1 - blr -END(_longjmp) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpcspe/gen/fabs.S b/lib/libc/powerpcspe/gen/fabs.S deleted file mode 100644 index df9196c3273..00000000000 --- a/lib/libc/powerpcspe/gen/fabs.S +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -/* - * double fabs(double) - */ -ENTRY(fabs) - /* arg is split in two words, clear sign bit only, in r3. */ - clrlwi %r3,%r3,1 - blr -END(fabs) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpcspe/gen/flt_rounds.c b/lib/libc/powerpcspe/gen/flt_rounds.c deleted file mode 100644 index eec1d3a0569..00000000000 --- a/lib/libc/powerpcspe/gen/flt_rounds.c +++ /dev/null @@ -1,55 +0,0 @@ -/* $NetBSD: flt_rounds.c,v 1.4.10.3 2002/03/22 20:41:53 nathanw Exp $ */ - -/* - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Mark Brinicombe - * for the NetBSD Project. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include - -#ifndef _SOFT_FLOAT -static const int map[] = { - 1, /* round to nearest */ - 0, /* round to zero */ - 2, /* round to positive infinity */ - 3 /* round to negative infinity */ -}; - -int -__flt_rounds() -{ - uint32_t fpscr; - - __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR)); - return map[(fpscr & 0x03)]; -} -#endif diff --git a/lib/libc/powerpcspe/gen/fpgetmask.c b/lib/libc/powerpcspe/gen/fpgetmask.c deleted file mode 100644 index b46a52fae22..00000000000 --- a/lib/libc/powerpcspe/gen/fpgetmask.c +++ /dev/null @@ -1,47 +0,0 @@ -/* $NetBSD: fpgetmask.c,v 1.3 2002/01/13 21:45:47 thorpej Exp $ */ - -/* - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include -#include -#include - -#ifndef _SOFT_FLOAT -fp_except_t -fpgetmask() -{ - uint32_t fpscr; - - __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR)); - return ((fp_except_t)((fpscr >> 2) & 0x1f)); -} -#endif diff --git a/lib/libc/powerpcspe/gen/fpgetround.c b/lib/libc/powerpcspe/gen/fpgetround.c deleted file mode 100644 index 1021a1ad4cc..00000000000 --- a/lib/libc/powerpcspe/gen/fpgetround.c +++ /dev/null @@ -1,47 +0,0 @@ -/* $NetBSD: fpgetround.c,v 1.3 2002/01/13 21:45:47 thorpej Exp $ */ - -/* - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include -#include -#include - -#ifndef _SOFT_FLOAT -fp_rnd_t -fpgetround() -{ - uint32_t fpscr; - - __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR)); - return ((fp_rnd_t)(fpscr & 0x3)); -} -#endif diff --git a/lib/libc/powerpcspe/gen/fpgetsticky.c b/lib/libc/powerpcspe/gen/fpgetsticky.c deleted file mode 100644 index abe83bb2da3..00000000000 --- a/lib/libc/powerpcspe/gen/fpgetsticky.c +++ /dev/null @@ -1,53 +0,0 @@ -/* $NetBSD: fpgetsticky.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */ - -/* - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include - -#include "namespace.h" - -#include -#include -#include - -#ifndef _SOFT_FLOAT -#ifdef __weak_alias -__weak_alias(fpgetsticky,_fpgetsticky) -#endif - -fp_except_t -fpgetsticky() -{ - uint32_t fpscr; - - __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR)); - return ((fp_except_t)((fpscr >> 25) & 0x1f)); -} -#endif diff --git a/lib/libc/powerpcspe/gen/fpsetmask.c b/lib/libc/powerpcspe/gen/fpsetmask.c deleted file mode 100644 index 0563da982c2..00000000000 --- a/lib/libc/powerpcspe/gen/fpsetmask.c +++ /dev/null @@ -1,51 +0,0 @@ -/* $NetBSD: fpsetmask.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */ - -/* - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include -#include -#include - -#ifndef _SOFT_FLOAT -fp_except_t -fpsetmask(fp_except_t mask) -{ - uint32_t fpscr; - fp_except_t old; - - __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR)); - old = (fp_except_t)((fpscr >> 2) & 0x1f); - fpscr = (fpscr & 0xffffff83) | ((mask & 0x1f) << 2); - __asm__ __volatile("mtspr %1,%0;isync" :: "r"(fpscr), "K"(SPR_SPEFSCR)); - return (old); -} -#endif diff --git a/lib/libc/powerpcspe/gen/fpsetround.c b/lib/libc/powerpcspe/gen/fpsetround.c deleted file mode 100644 index 85b55087935..00000000000 --- a/lib/libc/powerpcspe/gen/fpsetround.c +++ /dev/null @@ -1,51 +0,0 @@ -/* $NetBSD: fpsetround.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */ - -/* - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Dan Winship. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include -#include -#include - -#ifndef _SOFT_FLOAT -fp_rnd_t -fpsetround(fp_rnd_t rnd_dir) -{ - uint32_t fpscr; - fp_rnd_t old; - - __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR) ); - old = (fp_rnd_t)(fpscr & 0x3); - fpscr = (fpscr & 0xfffffffc) | rnd_dir; - __asm__ __volatile("mtspr %1, %0;isync" :: "r"(fpscr), "K"(SPR_SPEFSCR)); - return (old); -} -#endif diff --git a/lib/libc/powerpcspe/gen/setjmp.S b/lib/libc/powerpcspe/gen/setjmp.S deleted file mode 100644 index 1bd3edcf523..00000000000 --- a/lib/libc/powerpcspe/gen/setjmp.S +++ /dev/null @@ -1,136 +0,0 @@ -/*- - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: setjmp.S,v 1.3 1998/10/03 12:30:38 tsubai Exp $ */ - -#include -#include - -/* - * C library -- setjmp, longjmp - * - * longjmp(a,v) - * will generate a "return(v?v:1)" from the last call to - * setjmp(a) - * by restoring registers from the stack. - * The previous signal state is restored. - * - * jmpbuf layout: - * +------------+ - * | unused | - * +------------+ - * | sig state | - * | | - * | (4 words) | - * | | - * +------------+ - * | saved regs | - * | ... | - */ - -ENTRY(setjmp) - mr %r6,%r3 - li %r3,1 /* SIG_BLOCK, but doesn't matter */ - /* since set == NULL */ - li %r4,0 /* set = NULL */ - mr %r5,%r6 /* &oset */ - addi %r5,%r5,4 - li %r0, SYS_sigprocmask /*sigprocmask(SIG_BLOCK, NULL, &oset)*/ - sc /*assume no error XXX */ - mflr %r11 /* r11 <- link reg */ - mfcr %r12 /* r12 <- condition reg */ - mr %r10,%r1 /* r10 <- stackptr */ - mr %r9,%r2 /* r9 <- global ptr */ - evstdd %r9,24+0*8(%r6) - evstdd %r10,24+1*8(%r6) - evstdd %r11,24+2*8(%r6) - evstdd %r12,24+3*8(%r6) - evstdd %r13,24+4*8(%r6) - evstdd %r14,24+5*8(%r6) - evstdd %r15,24+6*8(%r6) - evstdd %r16,24+7*8(%r6) - evstdd %r17,24+8*8(%r6) - evstdd %r18,24+9*8(%r6) - evstdd %r19,24+10*8(%r6) - evstdd %r20,24+11*8(%r6) - evstdd %r21,24+12*8(%r6) - evstdd %r22,24+13*8(%r6) - evstdd %r23,24+14*8(%r6) - evstdd %r24,24+15*8(%r6) - evstdd %r25,24+16*8(%r6) - evstdd %r26,24+17*8(%r6) - evstdd %r27,24+18*8(%r6) - evstdd %r28,24+19*8(%r6) - evstdd %r29,24+20*8(%r6) - evstdd %r30,24+21*8(%r6) - evstdd %r31,24+22*8(%r6) - - li %r3,0 /* return (0) */ - blr -END(setjmp) - - WEAK_REFERENCE(CNAME(__longjmp), longjmp) -ENTRY(__longjmp) - evldd %r9,24+0*8(%r3) - evldd %r10,24+1*8(%r3) - evldd %r11,24+2*8(%r3) - evldd %r12,24+3*8(%r3) - evldd %r13,24+4*8(%r3) - evldd %r14,24+5*8(%r3) - evldd %r15,24+6*8(%r3) - evldd %r16,24+7*8(%r3) - evldd %r17,24+8*8(%r3) - evldd %r18,24+9*8(%r3) - evldd %r19,24+10*8(%r3) - evldd %r20,24+11*8(%r3) - evldd %r21,24+12*8(%r3) - evldd %r22,24+13*8(%r3) - evldd %r23,24+14*8(%r3) - evldd %r24,24+15*8(%r3) - evldd %r25,24+16*8(%r3) - evldd %r26,24+17*8(%r3) - evldd %r27,24+18*8(%r3) - evldd %r28,24+19*8(%r3) - evldd %r29,24+20*8(%r3) - evldd %r30,24+21*8(%r3) - evldd %r31,24+22*8(%r3) - - mr %r6,%r4 /* save val param */ - mtlr %r11 /* r11 -> link reg */ - mtcr %r12 /* r12 -> condition reg */ - mr %r1,%r10 /* r10 -> stackptr */ - mr %r4,%r3 - li %r3,3 /* SIG_SETMASK */ - addi %r4,%r4,4 /* &set */ - li %r5,0 /* oset = NULL */ - li %r0,SYS_sigprocmask /* sigprocmask(SIG_SET, &set, NULL) */ - sc /* assume no error XXX */ - or. %r3,%r6,%r6 - bnelr - li %r3,1 - blr -END(__longjmp) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpcspe/gen/sigsetjmp.S b/lib/libc/powerpcspe/gen/sigsetjmp.S deleted file mode 100644 index 45c85c3fce2..00000000000 --- a/lib/libc/powerpcspe/gen/sigsetjmp.S +++ /dev/null @@ -1,148 +0,0 @@ -/*- - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: sigsetjmp.S,v 1.4 1998/10/03 12:30:38 tsubai Exp $ */ - -#include -/* - * C library -- sigsetjmp, siglongjmp - * - * siglongjmp(a,v) - * will generate a "return(v?v:1)" from the last call to - * sigsetjmp(a, savemask) - * by restoring registers from the stack. - * The previous signal state is restored if savemask is non-zero - * - * jmpbuf layout: - * +------------+ - * | savemask | - * +------------+ - * | sig state | - * | | - * | (4 words) | - * | | - * +------------+ - * | saved regs | - * | ... | - */ - - -#include - -ENTRY(sigsetjmp) - mr %r6,%r3 - stw %r4,0(%r3) - or. %r7,%r4,%r4 - beq 1f - li %r3,1 /* SIG_BLOCK, but doesn't matter */ - /* since set == NULL */ - li %r4,0 /* set = NULL */ - mr %r5,%r6 /* &oset */ - addi %r5,%r5,4 - li %r0, SYS_sigprocmask /* sigprocmask(SIG_BLOCK, NULL, &oset)*/ - sc /* assume no error XXX */ -1: - mflr %r11 - mfcr %r12 - mr %r10,%r1 - mr %r9,%r2 - - /* FPRs */ - evstdd %r9,24+0*8(%r6) - evstdd %r10,24+1*8(%r6) - evstdd %r11,24+2*8(%r6) - evstdd %r12,24+3*8(%r6) - evstdd %r13,24+4*8(%r6) - evstdd %r14,24+5*8(%r6) - evstdd %r15,24+6*8(%r6) - evstdd %r16,24+7*8(%r6) - evstdd %r17,24+8*8(%r6) - evstdd %r18,24+9*8(%r6) - evstdd %r19,24+10*8(%r6) - evstdd %r20,24+11*8(%r6) - evstdd %r21,24+12*8(%r6) - evstdd %r22,24+13*8(%r6) - evstdd %r23,24+14*8(%r6) - evstdd %r24,24+15*8(%r6) - evstdd %r25,24+16*8(%r6) - evstdd %r26,24+17*8(%r6) - evstdd %r27,24+18*8(%r6) - evstdd %r28,24+19*8(%r6) - evstdd %r29,24+20*8(%r6) - evstdd %r30,24+21*8(%r6) - evstdd %r31,24+22*8(%r6) - - li %r3,0 - blr -END(sigsetjmp) - -ENTRY(siglongjmp) - - /* FPRs */ - evldd %r9,24+0*8(%r3) - evldd %r10,24+1*8(%r3) - evldd %r11,24+2*8(%r3) - evldd %r12,24+3*8(%r3) - evldd %r13,24+4*8(%r3) - evldd %r14,24+5*8(%r3) - evldd %r15,24+6*8(%r3) - evldd %r16,24+7*8(%r3) - evldd %r17,24+8*8(%r3) - evldd %r18,24+9*8(%r3) - evldd %r19,24+10*8(%r3) - evldd %r20,24+11*8(%r3) - evldd %r21,24+12*8(%r3) - evldd %r22,24+13*8(%r3) - evldd %r23,24+14*8(%r3) - evldd %r24,24+15*8(%r3) - evldd %r25,24+16*8(%r3) - evldd %r26,24+17*8(%r3) - evldd %r27,24+18*8(%r3) - evldd %r28,24+19*8(%r3) - evldd %r29,24+20*8(%r3) - evldd %r30,24+21*8(%r3) - evldd %r31,24+22*8(%r3) - - lwz %r7,0(%r3) - mr %r6,%r4 - mtlr %r11 - mtcr %r12 - mr %r1,%r10 - or. %r7,%r7,%r7 - beq 1f - mr %r4,%r3 - li %r3,3 /* SIG_SETMASK */ - addi %r4,%r4,4 /* &set */ - li %r5,0 /* oset = NULL */ - li %r0,SYS_sigprocmask /* sigprocmask(SIG_SET, &set, NULL) */ - sc /* assume no error XXX */ -1: - or. %r3,%r6,%r6 - bnelr - li %r3,1 - blr -END(siglongjmp) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpcspe/softfloat/milieu.h b/lib/libc/powerpcspe/softfloat/milieu.h deleted file mode 100644 index 6139aa58b98..00000000000 --- a/lib/libc/powerpcspe/softfloat/milieu.h +++ /dev/null @@ -1,48 +0,0 @@ -/* $NetBSD: milieu.h,v 1.1 2000/12/29 20:13:54 bjh21 Exp $ */ - -/* -=============================================================================== - -This C header file is part of the SoftFloat IEC/IEEE Floating-point -Arithmetic Package, Release 2a. - -Written by John R. Hauser. This work was made possible in part by the -International Computer Science Institute, located at Suite 600, 1947 Center -Street, Berkeley, California 94704. Funding was partially provided by the -National Science Foundation under grant MIP-9311980. The original version -of this code was written as part of a project to build a fixed-point vector -processor in collaboration with the University of California at Berkeley, -overseen by Profs. Nelson Morgan and John Wawrzynek. More information -is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/ -arithmetic/SoftFloat.html'. - -THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort -has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT -TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO -PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY -AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE. - -Derivative works are acceptable, even for commercial purposes, so long as -(1) they include prominent notice that the work is derivative, and (2) they -include prominent notice akin to these four paragraphs for those parts of -this code that are retained. - -=============================================================================== -*/ - -/* -------------------------------------------------------------------------------- -Include common integer types and flags. -------------------------------------------------------------------------------- -*/ -#include "powerpc-gcc.h" - -/* -------------------------------------------------------------------------------- -Symbolic Boolean literals. -------------------------------------------------------------------------------- -*/ -enum { - FALSE = 0, - TRUE = 1 -}; diff --git a/lib/libc/powerpcspe/softfloat/powerpc-gcc.h b/lib/libc/powerpcspe/softfloat/powerpc-gcc.h deleted file mode 100644 index d11198866e3..00000000000 --- a/lib/libc/powerpcspe/softfloat/powerpc-gcc.h +++ /dev/null @@ -1,91 +0,0 @@ -/* $NetBSD: arm-gcc.h,v 1.2 2001/02/21 18:09:25 bjh21 Exp $ */ - -/* -------------------------------------------------------------------------------- -One of the macros `BIGENDIAN' or `LITTLEENDIAN' must be defined. -------------------------------------------------------------------------------- -*/ -#define BIGENDIAN - -/* -------------------------------------------------------------------------------- -The macro `BITS64' can be defined to indicate that 64-bit integer types are -supported by the compiler. -------------------------------------------------------------------------------- -*/ -#define BITS64 - -/* -------------------------------------------------------------------------------- -Each of the following `typedef's defines the most convenient type that holds -integers of at least as many bits as specified. For example, `uint8' should -be the most convenient type that can hold unsigned integers of as many as -8 bits. The `flag' type must be able to hold either a 0 or 1. For most -implementations of C, `flag', `uint8', and `int8' should all be `typedef'ed -to the same as `int'. -------------------------------------------------------------------------------- -*/ -typedef int flag; -typedef unsigned int uint8; -typedef int int8; -typedef unsigned int uint16; -typedef int int16; -typedef unsigned int uint32; -typedef signed int int32; -#ifdef BITS64 -typedef unsigned long long int uint64; -typedef signed long long int int64; -#endif - -/* -------------------------------------------------------------------------------- -Each of the following `typedef's defines a type that holds integers -of _exactly_ the number of bits specified. For instance, for most -implementation of C, `bits16' and `sbits16' should be `typedef'ed to -`unsigned short int' and `signed short int' (or `short int'), respectively. -------------------------------------------------------------------------------- -*/ -typedef unsigned char bits8; -typedef signed char sbits8; -typedef unsigned short int bits16; -typedef signed short int sbits16; -typedef unsigned int bits32; -typedef signed int sbits32; -#ifdef BITS64 -typedef unsigned long long int bits64; -typedef signed long long int sbits64; -#endif - -#ifdef BITS64 -/* -------------------------------------------------------------------------------- -The `LIT64' macro takes as its argument a textual integer literal and -if necessary ``marks'' the literal as having a 64-bit integer type. -For example, the GNU C Compiler (`gcc') requires that 64-bit literals be -appended with the letters `LL' standing for `long long', which is `gcc's -name for the 64-bit integer type. Some compilers may allow `LIT64' to be -defined as the identity macro: `#define LIT64( a ) a'. -------------------------------------------------------------------------------- -*/ -#define LIT64( a ) a##LL -#endif - -/* -------------------------------------------------------------------------------- -The macro `INLINE' can be used before functions that should be inlined. If -a compiler does not support explicit inlining, this macro should be defined -to be `static'. -------------------------------------------------------------------------------- -*/ -#define INLINE static __inline - -/* -------------------------------------------------------------------------------- -The ARM FPA is odd in that it stores doubles high-order word first, no matter -what the endianness of the CPU. VFP is sane. -------------------------------------------------------------------------------- -*/ -#if defined(SOFTFLOAT_FOR_GCC) -#define FLOAT64_DEMANGLE(a) (a) -#define FLOAT64_MANGLE(a) (a) -#endif diff --git a/lib/libc/powerpcspe/softfloat/softfloat.h b/lib/libc/powerpcspe/softfloat/softfloat.h deleted file mode 100644 index b20cb3e7aa0..00000000000 --- a/lib/libc/powerpcspe/softfloat/softfloat.h +++ /dev/null @@ -1,306 +0,0 @@ -/* $NetBSD: softfloat.h,v 1.6 2002/05/12 13:12:46 bjh21 Exp $ */ - -/* This is a derivative work. */ - -/* -=============================================================================== - -This C header file is part of the SoftFloat IEC/IEEE Floating-point -Arithmetic Package, Release 2a. - -Written by John R. Hauser. This work was made possible in part by the -International Computer Science Institute, located at Suite 600, 1947 Center -Street, Berkeley, California 94704. Funding was partially provided by the -National Science Foundation under grant MIP-9311980. The original version -of this code was written as part of a project to build a fixed-point vector -processor in collaboration with the University of California at Berkeley, -overseen by Profs. Nelson Morgan and John Wawrzynek. More information -is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/ -arithmetic/SoftFloat.html'. - -THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort -has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT -TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO -PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY -AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE. - -Derivative works are acceptable, even for commercial purposes, so long as -(1) they include prominent notice that the work is derivative, and (2) they -include prominent notice akin to these four paragraphs for those parts of -this code that are retained. - -=============================================================================== -*/ - -/* -------------------------------------------------------------------------------- -The macro `FLOATX80' must be defined to enable the extended double-precision -floating-point format `floatx80'. If this macro is not defined, the -`floatx80' type will not be defined, and none of the functions that either -input or output the `floatx80' type will be defined. The same applies to -the `FLOAT128' macro and the quadruple-precision format `float128'. -------------------------------------------------------------------------------- -*/ -/* #define FLOATX80 */ -/* #define FLOAT128 */ - -#include - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point types. -------------------------------------------------------------------------------- -*/ -typedef unsigned int float32; -typedef unsigned long long float64; -#ifdef FLOATX80 -typedef struct { - unsigned short high; - unsigned long long low; -} floatx80; -#endif -#ifdef FLOAT128 -typedef struct { - unsigned long long high, low; -} float128; -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point underflow tininess-detection mode. -------------------------------------------------------------------------------- -*/ -#ifndef SOFTFLOAT_FOR_GCC -extern int8 float_detect_tininess; -#endif -enum { - float_tininess_after_rounding = 0, - float_tininess_before_rounding = 1 -}; - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point rounding mode. -------------------------------------------------------------------------------- -*/ -extern fp_rnd_t float_rounding_mode; -enum { - float_round_nearest_even = FP_RN, - float_round_to_zero = FP_RZ, - float_round_down = FP_RM, - float_round_up = FP_RP -}; - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE floating-point exception flags. -------------------------------------------------------------------------------- -*/ -typedef fp_except_t fp_except; - -extern fp_except float_exception_flags; -extern fp_except float_exception_mask; -enum { - float_flag_inexact = FP_X_IMP, - float_flag_underflow = FP_X_UFL, - float_flag_overflow = FP_X_OFL, - float_flag_divbyzero = FP_X_DZ, - float_flag_invalid = FP_X_INV -}; - -/* -------------------------------------------------------------------------------- -Routine to raise any or all of the software IEC/IEEE floating-point -exception flags. -------------------------------------------------------------------------------- -*/ -void float_raise( fp_except ); - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE integer-to-floating-point conversion routines. -------------------------------------------------------------------------------- -*/ -float32 int32_to_float32( int ); -float64 int32_to_float64( int ); -#ifdef FLOATX80 -floatx80 int32_to_floatx80( int ); -#endif -#ifdef FLOAT128 -float128 int32_to_float128( int ); -#endif -float32 int64_to_float32( long long ); -float64 int64_to_float64( long long ); -#ifdef FLOATX80 -floatx80 int64_to_floatx80( long long ); -#endif -#ifdef FLOAT128 -float128 int64_to_float128( long long ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE single-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int float32_to_int32( float32 ); -int float32_to_int32_round_to_zero( float32 ); -unsigned int float32_to_uint32_round_to_zero( float32 ); -long long float32_to_int64( float32 ); -long long float32_to_int64_round_to_zero( float32 ); -float64 float32_to_float64( float32 ); -#ifdef FLOATX80 -floatx80 float32_to_floatx80( float32 ); -#endif -#ifdef FLOAT128 -float128 float32_to_float128( float32 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE single-precision operations. -------------------------------------------------------------------------------- -*/ -float32 float32_round_to_int( float32 ); -float32 float32_add( float32, float32 ); -float32 float32_sub( float32, float32 ); -float32 float32_mul( float32, float32 ); -float32 float32_div( float32, float32 ); -float32 float32_rem( float32, float32 ); -float32 float32_sqrt( float32 ); -int float32_eq( float32, float32 ); -int float32_le( float32, float32 ); -int float32_lt( float32, float32 ); -int float32_eq_signaling( float32, float32 ); -int float32_le_quiet( float32, float32 ); -int float32_lt_quiet( float32, float32 ); -#ifndef SOFTFLOAT_FOR_GCC -int float32_is_signaling_nan( float32 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE double-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int float64_to_int32( float64 ); -int float64_to_int32_round_to_zero( float64 ); -unsigned int float64_to_uint32_round_to_zero( float64 ); -long long float64_to_int64( float64 ); -long long float64_to_int64_round_to_zero( float64 ); -float32 float64_to_float32( float64 ); -#ifdef FLOATX80 -floatx80 float64_to_floatx80( float64 ); -#endif -#ifdef FLOAT128 -float128 float64_to_float128( float64 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE double-precision operations. -------------------------------------------------------------------------------- -*/ -float64 float64_round_to_int( float64 ); -float64 float64_add( float64, float64 ); -float64 float64_sub( float64, float64 ); -float64 float64_mul( float64, float64 ); -float64 float64_div( float64, float64 ); -float64 float64_rem( float64, float64 ); -float64 float64_sqrt( float64 ); -int float64_eq( float64, float64 ); -int float64_le( float64, float64 ); -int float64_lt( float64, float64 ); -int float64_eq_signaling( float64, float64 ); -int float64_le_quiet( float64, float64 ); -int float64_lt_quiet( float64, float64 ); -#ifndef SOFTFLOAT_FOR_GCC -int float64_is_signaling_nan( float64 ); -#endif - -#ifdef FLOATX80 - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE extended double-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int floatx80_to_int32( floatx80 ); -int floatx80_to_int32_round_to_zero( floatx80 ); -long long floatx80_to_int64( floatx80 ); -long long floatx80_to_int64_round_to_zero( floatx80 ); -float32 floatx80_to_float32( floatx80 ); -float64 floatx80_to_float64( floatx80 ); -#ifdef FLOAT128 -float128 floatx80_to_float128( floatx80 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE extended double-precision rounding precision. Valid -values are 32, 64, and 80. -------------------------------------------------------------------------------- -*/ -extern int floatx80_rounding_precision; - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE extended double-precision operations. -------------------------------------------------------------------------------- -*/ -floatx80 floatx80_round_to_int( floatx80 ); -floatx80 floatx80_add( floatx80, floatx80 ); -floatx80 floatx80_sub( floatx80, floatx80 ); -floatx80 floatx80_mul( floatx80, floatx80 ); -floatx80 floatx80_div( floatx80, floatx80 ); -floatx80 floatx80_rem( floatx80, floatx80 ); -floatx80 floatx80_sqrt( floatx80 ); -int floatx80_eq( floatx80, floatx80 ); -int floatx80_le( floatx80, floatx80 ); -int floatx80_lt( floatx80, floatx80 ); -int floatx80_eq_signaling( floatx80, floatx80 ); -int floatx80_le_quiet( floatx80, floatx80 ); -int floatx80_lt_quiet( floatx80, floatx80 ); -int floatx80_is_signaling_nan( floatx80 ); - -#endif - -#ifdef FLOAT128 - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE quadruple-precision conversion routines. -------------------------------------------------------------------------------- -*/ -int float128_to_int32( float128 ); -int float128_to_int32_round_to_zero( float128 ); -long long float128_to_int64( float128 ); -long long float128_to_int64_round_to_zero( float128 ); -float32 float128_to_float32( float128 ); -float64 float128_to_float64( float128 ); -#ifdef FLOATX80 -floatx80 float128_to_floatx80( float128 ); -#endif - -/* -------------------------------------------------------------------------------- -Software IEC/IEEE quadruple-precision operations. -------------------------------------------------------------------------------- -*/ -float128 float128_round_to_int( float128 ); -float128 float128_add( float128, float128 ); -float128 float128_sub( float128, float128 ); -float128 float128_mul( float128, float128 ); -float128 float128_div( float128, float128 ); -float128 float128_rem( float128, float128 ); -float128 float128_sqrt( float128 ); -int float128_eq( float128, float128 ); -int float128_le( float128, float128 ); -int float128_lt( float128, float128 ); -int float128_eq_signaling( float128, float128 ); -int float128_le_quiet( float128, float128 ); -int float128_lt_quiet( float128, float128 ); -int float128_is_signaling_nan( float128 ); - -#endif - diff --git a/lib/libc/powerpcspe/sys/Makefile.inc b/lib/libc/powerpcspe/sys/Makefile.inc deleted file mode 100644 index 8f48df0d602..00000000000 --- a/lib/libc/powerpcspe/sys/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ - -.PATH: ${LIBC_SRCTOP}/powerpc/sys -.sinclude "${LIBC_SRCTOP}/powerpc/sys/Makefile.inc" diff --git a/lib/libc/sys/Makefile.inc b/lib/libc/sys/Makefile.inc index 3f80139f429..339a5f39318 100644 --- a/lib/libc/sys/Makefile.inc +++ b/lib/libc/sys/Makefile.inc @@ -126,8 +126,7 @@ SYM_MAPS+= ${LIBC_SRCTOP}/sys/Symbol.map # Generated files CLEANFILES+= ${SASM} ${SPSEUDO} -.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" || \ - ${MACHINE_CPUARCH} == "powerpc" || ${MACHINE_ARCH:Marmv[67]*} +.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" || ${MACHINE_ARCH:Marmv[67]*} NOTE_GNU_STACK='\t.section .note.GNU-stack,"",%%progbits\n' .else NOTE_GNU_STACK='' diff --git a/lib/libclang_rt/Makefile b/lib/libclang_rt/Makefile index 79ccd288a84..b87a45c7466 100644 --- a/lib/libclang_rt/Makefile +++ b/lib/libclang_rt/Makefile @@ -67,23 +67,6 @@ SUBDIR+= ${SD_CFI} SUBDIR+= ${SD_SAFESTACK} SUBDIR+= ${SD_STATS} SUBDIR+= ${SD_UBSAN} -.elif ${MACHINE_CPUARCH} == "powerpc" -. if ${MACHINE_ARCH} == "powerpc64" -SUBDIR+= ${SD_ASAN} -SUBDIR+= ${SD_MSAN} -SUBDIR+= ${SD_STATS} -SUBDIR+= ${SD_TSAN} -SUBDIR+= ${SD_UBSAN} -. elif ${MACHINE_ARCH} == "powerpc64le" -SUBDIR+= ${SD_ASAN} -SUBDIR+= ${SD_MSAN} -SUBDIR+= ${SD_STATS} -SUBDIR+= ${SD_TSAN} -SUBDIR+= ${SD_UBSAN} -SUBDIR+= ${SD_XRAY} -. else -# nothing for other powerpc yet -. endif .elif ${MACHINE_CPUARCH} == "riscv" SUBDIR+= ${SD_ASAN} SUBDIR+= ${SD_STATS} diff --git a/lib/libclang_rt/compiler-rt-vars.mk b/lib/libclang_rt/compiler-rt-vars.mk index d268abd3f31..b52e09e1b75 100644 --- a/lib/libclang_rt/compiler-rt-vars.mk +++ b/lib/libclang_rt/compiler-rt-vars.mk @@ -9,7 +9,7 @@ SANITIZER_SHAREDIR= ${CLANGDIR}/share (!defined(CPUTYPE) || ${CPUTYPE:M*soft*} == "") CRTARCH?= armhf .else -CRTARCH?= ${MACHINE_ARCH:S/amd64/x86_64/:C/hf$//:C/sf$//:S/mipsn32/mips64/} +CRTARCH?= ${MACHINE_ARCH:S/amd64/x86_64/:C/hf$//:C/sf$//} .endif .if ${COMPILER_TYPE} == "clang" diff --git a/lib/libclang_rt/xray/Makefile b/lib/libclang_rt/xray/Makefile index ea88e02cce6..97f73a9cdb7 100644 --- a/lib/libclang_rt/xray/Makefile +++ b/lib/libclang_rt/xray/Makefile @@ -45,12 +45,6 @@ SRCS+= xray/xray_trampoline_x86_64.S SRCS+= xray/xray_x86_64.cpp .endif # amd64 -.if ${MACHINE_ARCH} == powerpc64le -SRCS+= xray/xray_powerpc64.cpp -SRCS+= xray/xray_trampoline_powerpc64.cpp -SRCS+= xray/xray_trampoline_powerpc64_asm.S -.endif # powerpc64le - .PATH: ${CRTSRC}/include/xray INCSDIR= ${CLANGDIR}/include/xray INCS+= xray_interface.h diff --git a/lib/libcompiler_rt/Makefile.inc b/lib/libcompiler_rt/Makefile.inc index 3946271d9c0..5d6c6736517 100644 --- a/lib/libcompiler_rt/Makefile.inc +++ b/lib/libcompiler_rt/Makefile.inc @@ -1,6 +1,6 @@ .include -CRTARCH= ${MACHINE_CPUARCH:C/amd64/x86_64/:C/powerpc/ppc/} +CRTARCH= ${MACHINE_CPUARCH:C/amd64/x86_64/} CRTSRC= ${SRCTOP}/contrib/llvm-project/compiler-rt/lib/builtins @@ -205,7 +205,7 @@ SRCF+= trunctfsf2 .endif # These are already shipped by libc.a on some architectures. -.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" && \ +.if ${MACHINE_CPUARCH} != "arm" && \ ${MACHINE_CPUARCH} != "riscv" SRCF+= adddf3 SRCF+= addsf3 @@ -223,7 +223,7 @@ SRCF+= subsf3 SRCF+= truncdfsf2 .endif -.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" +.if ${MACHINE_CPUARCH} != "arm" SRCF+= comparedf2 SRCF+= comparesf2 .endif @@ -269,10 +269,6 @@ SRCF+= truncsfbf2 SRCF+= stdatomic CFLAGS+= -DEMIT_SYNC_ATOMICS -.elif ${MACHINE_CPUARCH} == "mips" -.PATH: ${SRCTOP}/sys/mips/mips - -SRCF+= stdatomic .endif .for file in ${SRCF} diff --git a/lib/libdl/Makefile b/lib/libdl/Makefile index 3432e244a5d..e99f123779e 100644 --- a/lib/libdl/Makefile +++ b/lib/libdl/Makefile @@ -6,8 +6,8 @@ SHLIB_MAJOR=1 .PATH: ${SRCTOP}/lib/libc/gen CFLAGS+=-I${SRCTOP}/lib/libc/include RTLD_ELF_DIR=${SRCTOP}/libexec/rtld-elf -.if exists(${RTLD_ELF_DIR}/${MACHINE_ARCH:S/powerpc64le/powerpc64/}) -RTLD_ARCH= ${MACHINE_ARCH:S/powerpc64le/powerpc64/} +.if exists(${RTLD_ELF_DIR}/${MACHINE_ARCH}) +RTLD_ARCH= ${MACHINE_ARCH} .else RTLD_ARCH= ${MACHINE_CPUARCH} .endif diff --git a/lib/libgcc_eh/Makefile.inc b/lib/libgcc_eh/Makefile.inc index 9832b1a8c4e..60dc1865fab 100644 --- a/lib/libgcc_eh/Makefile.inc +++ b/lib/libgcc_eh/Makefile.inc @@ -17,7 +17,7 @@ SRCS_EXC+= UnwindRegistersSave.S SRCS_EXC+= libunwind.cpp SRCS+= ${SRCS_EXC} -.if ${MACHINE} == "amd64" || ${MACHINE} == "i386" || ${MACHINE} == "powerpc" +.if ${MACHINE} == "amd64" || ${MACHINE} == "i386" CFLAGS.UnwindLevel1-gcc-ext.c+= -D_LIBUNWIND_SUPPORT_FRAME_APIS .endif .for file in ${SRCS_EXC:M*.c} diff --git a/lib/libgcc_s/Makefile b/lib/libgcc_s/Makefile index ecd9c451124..b8fe1d32d22 100644 --- a/lib/libgcc_s/Makefile +++ b/lib/libgcc_s/Makefile @@ -46,8 +46,7 @@ SRCS+= s_scalbnf.c # Don't include long double routines on architectures where long double # is the same size as double. -.if ${MACHINE_CPUARCH} != "mips" && ${MACHINE_CPUARCH} != "arm" && \ - ${MACHINE_CPUARCH} != "powerpc" +.if ${MACHINE_CPUARCH} != "arm" SRCS+= s_fmaxl.c SRCS+= s_logbl.c SRCS+= s_scalbnl.c diff --git a/lib/libkvm/Makefile b/lib/libkvm/Makefile index 5dd495371a3..65b7a6b18ff 100644 --- a/lib/libkvm/Makefile +++ b/lib/libkvm/Makefile @@ -13,10 +13,7 @@ SRCS= kvm.c kvm_cptime.c kvm_getloadavg.c \ kvm_amd64.c kvm_minidump_amd64.c \ kvm_arm.c kvm_minidump_arm.c \ kvm_i386.c kvm_minidump_i386.c \ - kvm_minidump_mips.c \ - kvm_powerpc.c kvm_powerpc64.c \ - kvm_minidump_riscv.c \ - kvm_minidump_powerpc64.c kvm_minidump_powerpc64_hpt.c + kvm_minidump_riscv.c INCS= kvm.h LIBADD= elf diff --git a/lib/libkvm/kvm_minidump_mips.c b/lib/libkvm/kvm_minidump_mips.c deleted file mode 100644 index 54f97509989..00000000000 --- a/lib/libkvm/kvm_minidump_mips.c +++ /dev/null @@ -1,370 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Oleksandr Tymoshenko - * Copyright (c) 2008 Semihalf, Grzegorz Bernacki - * Copyright (c) 2006 Peter Wemm - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * From: FreeBSD: src/lib/libkvm/kvm_minidump_arm.c r214223 - */ - -#include -/* - * MIPS machine dependent routines for kvm and minidumps. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "../../sys/mips/include/cca.h" -#define _KVM_MINIDUMP -#include "../../sys/mips/include/cpuregs.h" -#include "../../sys/mips/include/minidump.h" - -#include "kvm_private.h" -#include "kvm_mips.h" - -#define mips_round_page(x) roundup2((kvaddr_t)(x), MIPS_PAGE_SIZE) - -struct vmstate { - struct minidumphdr hdr; - int pte_size; -}; - -static int -_mips_minidump_probe(kvm_t *kd) -{ - - if (kd->nlehdr.e_ident[EI_CLASS] != ELFCLASS32 && - kd->nlehdr.e_ident[EI_CLASS] != ELFCLASS64) - return (0); - if (kd->nlehdr.e_machine != EM_MIPS) - return (0); - return (_kvm_is_minidump(kd)); -} - -static void -_mips_minidump_freevtop(kvm_t *kd) -{ - struct vmstate *vm = kd->vmst; - - free(vm); - kd->vmst = NULL; -} - -static int -_mips_minidump_initvtop(kvm_t *kd) -{ - struct vmstate *vmst; - off_t off, dump_avail_off, sparse_off; - - vmst = _kvm_malloc(kd, sizeof(*vmst)); - if (vmst == NULL) { - _kvm_err(kd, kd->program, "cannot allocate vm"); - return (-1); - } - - kd->vmst = vmst; - - if (kd->nlehdr.e_ident[EI_CLASS] == ELFCLASS64 || - kd->nlehdr.e_flags & EF_MIPS_ABI2) - vmst->pte_size = 64; - else - vmst->pte_size = 32; - - if (pread(kd->pmfd, &vmst->hdr, - sizeof(vmst->hdr), 0) != sizeof(vmst->hdr)) { - _kvm_err(kd, kd->program, "cannot read dump header"); - return (-1); - } - - if (strncmp(MINIDUMP_MAGIC, vmst->hdr.magic, - sizeof(vmst->hdr.magic)) != 0) { - _kvm_err(kd, kd->program, "not a minidump for this platform"); - return (-1); - } - vmst->hdr.version = _kvm32toh(kd, vmst->hdr.version); - if (vmst->hdr.version != MINIDUMP_VERSION && vmst->hdr.version != 1) { - _kvm_err(kd, kd->program, "wrong minidump version. " - "Expected %d got %d", MINIDUMP_VERSION, vmst->hdr.version); - return (-1); - } - vmst->hdr.msgbufsize = _kvm32toh(kd, vmst->hdr.msgbufsize); - vmst->hdr.bitmapsize = _kvm32toh(kd, vmst->hdr.bitmapsize); - vmst->hdr.ptesize = _kvm32toh(kd, vmst->hdr.ptesize); - vmst->hdr.kernbase = _kvm64toh(kd, vmst->hdr.kernbase); - vmst->hdr.dmapbase = _kvm64toh(kd, vmst->hdr.dmapbase); - vmst->hdr.dmapend = _kvm64toh(kd, vmst->hdr.dmapend); - vmst->hdr.dumpavailsize = vmst->hdr.version == MINIDUMP_VERSION ? - _kvm32toh(kd, vmst->hdr.dumpavailsize) : 0; - - /* Skip header and msgbuf */ - dump_avail_off = MIPS_PAGE_SIZE + mips_round_page(vmst->hdr.msgbufsize); - - /* Skip dump_avail */ - off = dump_avail_off + mips_round_page(vmst->hdr.dumpavailsize); - - sparse_off = off + mips_round_page(vmst->hdr.bitmapsize) + - mips_round_page(vmst->hdr.ptesize); - if (_kvm_pt_init(kd, vmst->hdr.dumpavailsize, dump_avail_off, - vmst->hdr.bitmapsize, off, sparse_off, MIPS_PAGE_SIZE) == -1) { - return (-1); - } - off += mips_round_page(vmst->hdr.bitmapsize); - - if (_kvm_pmap_init(kd, vmst->hdr.ptesize, off) == -1) { - return (-1); - } - off += mips_round_page(vmst->hdr.ptesize); - - return (0); -} - -static int -_mips_minidump_kvatop(kvm_t *kd, kvaddr_t va, off_t *pa) -{ - struct vmstate *vm; - mips_physaddr_t offset, a; - kvaddr_t pteindex; - u_long valid; - off_t ofs; - mips32_pte_t pte32; - mips64_pte_t pte64; - - if (ISALIVE(kd)) { - _kvm_err(kd, 0, "_mips_minidump_kvatop called in live kernel!"); - return (0); - } - - offset = va & MIPS_PAGE_MASK; - /* Operate with page-aligned address */ - va &= ~MIPS_PAGE_MASK; - - vm = kd->vmst; - if (kd->nlehdr.e_ident[EI_CLASS] == ELFCLASS64) { - if (va >= MIPS_XKPHYS_START && va < MIPS_XKPHYS_END) { - a = va & MIPS_XKPHYS_PHYS_MASK; - goto found; - } - if (va >= MIPS64_KSEG0_START && va < MIPS64_KSEG0_END) { - a = va & MIPS_KSEG0_PHYS_MASK; - goto found; - } - if (va >= MIPS64_KSEG1_START && va < MIPS64_KSEG1_END) { - a = va & MIPS_KSEG0_PHYS_MASK; - goto found; - } - } else { - if (va >= MIPS32_KSEG0_START && va < MIPS32_KSEG0_END) { - a = va & MIPS_KSEG0_PHYS_MASK; - goto found; - } - if (va >= MIPS32_KSEG1_START && va < MIPS32_KSEG1_END) { - a = va & MIPS_KSEG0_PHYS_MASK; - goto found; - } - } - if (va >= vm->hdr.kernbase) { - pteindex = (va - vm->hdr.kernbase) >> MIPS_PAGE_SHIFT; - if (vm->pte_size == 64) { - valid = pteindex < vm->hdr.ptesize / sizeof(pte64); - if (pteindex >= vm->hdr.ptesize / sizeof(pte64)) - goto invalid; - pte64 = _mips64_pte_get(kd, pteindex); - valid = pte64 & MIPS_PTE_V; - if (valid) - a = MIPS64_PTE_TO_PA(pte64); - } else { - if (pteindex >= vm->hdr.ptesize / sizeof(pte32)) - goto invalid; - pte32 = _mips32_pte_get(kd, pteindex); - valid = pte32 & MIPS_PTE_V; - if (valid) - a = MIPS32_PTE_TO_PA(pte32); - } - if (!valid) { - _kvm_err(kd, kd->program, "_mips_minidump_kvatop: pte " - "not valid"); - goto invalid; - } - } else { - _kvm_err(kd, kd->program, "_mips_minidump_kvatop: virtual " - "address 0x%jx not minidumped", (uintmax_t)va); - return (0); - } - -found: - ofs = _kvm_pt_find(kd, a, MIPS_PAGE_SIZE); - if (ofs == -1) { - _kvm_err(kd, kd->program, "_mips_minidump_kvatop: physical " - "address 0x%jx not in minidump", (uintmax_t)a); - goto invalid; - } - - *pa = ofs + offset; - return (MIPS_PAGE_SIZE - offset); - - -invalid: - _kvm_err(kd, 0, "invalid address (0x%jx)", (uintmax_t)va); - return (0); -} - -static int -#ifdef __mips__ -_mips_native(kvm_t *kd) -#else -_mips_native(kvm_t *kd __unused) -#endif -{ - -#ifdef __mips__ -#ifdef __mips_n64 - if (kd->nlehdr.e_ident[EI_CLASS] != ELFCLASS64) - return (0); -#else - if (kd->nlehdr.e_ident[EI_CLASS] != ELFCLASS32) - return (0); -#ifdef __mips_n32 - if (!(kd->nlehdr.e_flags & EF_MIPS_ABI2)) - return (0); -#else - if (kd->nlehdr.e_flags & EF_MIPS_ABI2) - return (0); -#endif -#endif -#if _BYTE_ORDER == _LITTLE_ENDIAN - return (kd->nlehdr.e_ident[EI_DATA] == ELFDATA2LSB); -#else - return (kd->nlehdr.e_ident[EI_DATA] == ELFDATA2MSB); -#endif -#else - return (0); -#endif -} - -struct mips_iter { - kvm_t *kd; - u_long nptes; - u_long pteindex; -}; - -static void -_mips_iterator_init(struct mips_iter *it, kvm_t *kd) -{ - struct vmstate *vm = kd->vmst; - - it->kd = kd; - it->pteindex = 0; - if (vm->pte_size == 64) - it->nptes = vm->hdr.ptesize / sizeof(mips64_pte_t); - else - it->nptes = vm->hdr.ptesize / sizeof(mips32_pte_t); - return; -} - -static int -_mips_iterator_next(struct mips_iter *it, u_long *pa, u_long *va, u_long *dva, - vm_prot_t *prot) -{ - struct vmstate *vm = it->kd->vmst; - int found = 0; - mips64_pte_t pte64; - mips32_pte_t pte32; - - /* - * mips/mips/pmap.c: init_pte_prot / pmap_protect indicate that all - * pages are R|X at least. - */ - *prot = VM_PROT_READ | VM_PROT_EXECUTE; - *pa = 0; - *va = 0; - *dva = 0; - for (;it->pteindex < it->nptes && found == 0; it->pteindex++) { - if (vm->pte_size == 64) { - pte64 = _mips64_pte_get(it->kd, it->pteindex); - if ((pte64 & MIPS_PTE_V) == 0) - continue; - if ((pte64 & MIPS64_PTE_RO) == 0) - *prot |= VM_PROT_WRITE; - *pa = MIPS64_PTE_TO_PA(pte64); - } else { - pte32 = _mips32_pte_get(it->kd, it->pteindex); - if ((pte32 & MIPS_PTE_V) == 0) - continue; - if ((pte32 & MIPS32_PTE_RO) == 0) - *prot |= VM_PROT_WRITE; - *pa = MIPS32_PTE_TO_PA(pte32); - } - *va = vm->hdr.kernbase + (it->pteindex << MIPS_PAGE_SHIFT); - found = 1; - /* advance pteindex regardless */ - } - - return found; -} - -static int -_mips_minidump_walk_pages(kvm_t *kd, kvm_walk_pages_cb_t *cb, void *arg) -{ - struct mips_iter it; - u_long dva, pa, va; - vm_prot_t prot; - - /* Generate direct mapped entries; need page entries for prot etc? */ - if (kd->nlehdr.e_ident[EI_CLASS] == ELFCLASS64) { - /* MIPS_XKPHYS_START..MIPS_XKPHYS_END */ - /* MIPS64_KSEG0_START..MIPS64_KSEG0_END */ - /* MIPS64_KSEG1_START..MIPS64_KSEG1_START */ - } else { - /* MIPS32_KSEG0_START..MIPS32_KSEG0_END */ - /* MIPS32_KSEG1_START..MIPS32_KSEG1_END */ - } - - _mips_iterator_init(&it, kd); - while (_mips_iterator_next(&it, &pa, &va, &dva, &prot)) { - if (!_kvm_visit_cb(kd, cb, arg, pa, va, dva, - prot, MIPS_PAGE_SIZE, 0)) { - return (0); - } - } - return (1); -} - -static struct kvm_arch kvm_mips_minidump = { - .ka_probe = _mips_minidump_probe, - .ka_initvtop = _mips_minidump_initvtop, - .ka_freevtop = _mips_minidump_freevtop, - .ka_kvatop = _mips_minidump_kvatop, - .ka_native = _mips_native, - .ka_walk_pages = _mips_minidump_walk_pages, -}; - -KVM_ARCH(kvm_mips_minidump); diff --git a/lib/libkvm/kvm_minidump_powerpc64.c b/lib/libkvm/kvm_minidump_powerpc64.c deleted file mode 100644 index a75e139929d..00000000000 --- a/lib/libkvm/kvm_minidump_powerpc64.c +++ /dev/null @@ -1,210 +0,0 @@ -/*- - * Copyright (c) 2006 Peter Wemm - * Copyright (c) 2019 Leandro Lupori - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * From: FreeBSD: src/lib/libkvm/kvm_minidump_riscv.c - */ - -#include -#include - -#include - -#include -#include -#include -#include - -#include "../../sys/powerpc/include/minidump.h" -#include "kvm_private.h" -#include "kvm_powerpc64.h" - - -static int -_powerpc64_minidump_probe(kvm_t *kd) -{ - return (_kvm_probe_elf_kernel(kd, ELFCLASS64, EM_PPC64) && - _kvm_is_minidump(kd)); -} - -static void -_powerpc64_minidump_freevtop(kvm_t *kd) -{ - struct vmstate *vm = kd->vmst; - - if (vm == NULL) - return; - if (PPC64_MMU_OPS(kd)) - PPC64_MMU_OP(kd, cleanup); - free(vm); - kd->vmst = NULL; -} - -static int -_powerpc64_minidump_initvtop(kvm_t *kd) -{ - struct vmstate *vmst; - struct minidumphdr *hdr; - off_t dump_avail_off, bitmap_off, pmap_off, sparse_off; - const char *mmu_name; - - /* Alloc VM */ - vmst = _kvm_malloc(kd, sizeof(*vmst)); - if (vmst == NULL) { - _kvm_err(kd, kd->program, "cannot allocate vm"); - return (-1); - } - hdr = &vmst->hdr; - kd->vmst = vmst; - PPC64_MMU_OPS(kd) = NULL; - /* Read minidump header */ - if (pread(kd->pmfd, hdr, sizeof(*hdr), 0) != sizeof(*hdr)) { - _kvm_err(kd, kd->program, "cannot read minidump header"); - goto failed; - } - /* Check magic */ - if (strncmp(MINIDUMP_MAGIC, hdr->magic, sizeof(hdr->magic)) != 0) { - _kvm_err(kd, kd->program, "not a minidump for this platform"); - goto failed; - } - /* Check version */ - hdr->version = be32toh(hdr->version); - if (hdr->version != MINIDUMP_VERSION && hdr->version != 1) { - _kvm_err(kd, kd->program, "wrong minidump version. " - "Expected %d got %d", MINIDUMP_VERSION, hdr->version); - goto failed; - } - /* Convert header fields to host endian */ - hdr->msgbufsize = be32toh(hdr->msgbufsize); - hdr->bitmapsize = be32toh(hdr->bitmapsize); - hdr->pmapsize = be32toh(hdr->pmapsize); - hdr->kernbase = be64toh(hdr->kernbase); - hdr->kernend = be64toh(hdr->kernend); - hdr->dmapbase = be64toh(hdr->dmapbase); - hdr->dmapend = be64toh(hdr->dmapend); - hdr->hw_direct_map = be32toh(hdr->hw_direct_map); - hdr->startkernel = be64toh(hdr->startkernel); - hdr->endkernel = be64toh(hdr->endkernel); - hdr->dumpavailsize = hdr->version == MINIDUMP_VERSION ? - be32toh(hdr->dumpavailsize) : 0; - - vmst->kimg_start = PPC64_KERNBASE; - vmst->kimg_end = PPC64_KERNBASE + hdr->endkernel - hdr->startkernel; - - /* dump header */ - dprintf("%s: mmu_name=%s,\n\t" - "msgbufsize=0x%jx, bitmapsize=0x%jx, pmapsize=0x%jx, " - "kernbase=0x%jx, kernend=0x%jx,\n\t" - "dmapbase=0x%jx, dmapend=0x%jx, hw_direct_map=%d, " - "startkernel=0x%jx, endkernel=0x%jx\n\t" - "kimg_start=0x%jx, kimg_end=0x%jx\n", - __func__, hdr->mmu_name, - (uintmax_t)hdr->msgbufsize, - (uintmax_t)hdr->bitmapsize, (uintmax_t)hdr->pmapsize, - (uintmax_t)hdr->kernbase, (uintmax_t)hdr->kernend, - (uintmax_t)hdr->dmapbase, (uintmax_t)hdr->dmapend, - hdr->hw_direct_map, hdr->startkernel, hdr->endkernel, - (uintmax_t)vmst->kimg_start, (uintmax_t)vmst->kimg_end); - - /* Detect and initialize MMU */ - mmu_name = hdr->mmu_name; - if (strcmp(mmu_name, PPC64_MMU_G5) == 0 || - strcmp(mmu_name, PPC64_MMU_PHYP) == 0) - PPC64_MMU_OPS(kd) = ppc64_mmu_ops_hpt; - else { - _kvm_err(kd, kd->program, "unsupported MMU: %s", mmu_name); - goto failed; - } - if (PPC64_MMU_OP(kd, init) == -1) - goto failed; - - /* Get dump parts' offsets */ - dump_avail_off = PPC64_PAGE_SIZE + ppc64_round_page(hdr->msgbufsize); - bitmap_off = dump_avail_off + ppc64_round_page(hdr->dumpavailsize); - pmap_off = bitmap_off + ppc64_round_page(hdr->bitmapsize); - sparse_off = pmap_off + ppc64_round_page(hdr->pmapsize); - - /* dump offsets */ - dprintf("%s: msgbuf_off=0x%jx, bitmap_off=0x%jx, pmap_off=0x%jx, " - "sparse_off=0x%jx\n", - __func__, (uintmax_t)PPC64_PAGE_SIZE, (uintmax_t)bitmap_off, - (uintmax_t)pmap_off, (uintmax_t)sparse_off); - - /* build physical address lookup table for sparse pages */ - if (_kvm_pt_init(kd, hdr->dumpavailsize, dump_avail_off, - hdr->bitmapsize, bitmap_off, sparse_off, PPC64_PAGE_SIZE) == -1) - goto failed; - - if (_kvm_pmap_init(kd, hdr->pmapsize, pmap_off) == -1) - goto failed; - return (0); - -failed: - _powerpc64_minidump_freevtop(kd); - return (-1); -} - -static int -_powerpc64_minidump_kvatop(kvm_t *kd, kvaddr_t va, off_t *pa) -{ - if (ISALIVE(kd)) { - _kvm_err(kd, 0, "%s called in live kernel!", __func__); - return (0); - } - return (PPC64_MMU_OP(kd, kvatop, va, pa)); -} - -static int -_powerpc64_native(kvm_t *kd __unused) -{ -#ifdef __powerpc64__ - return (1); -#else - return (0); -#endif -} - -static kssize_t -_powerpc64_kerndisp(kvm_t *kd) -{ - return (kd->vmst->hdr.startkernel - PPC64_KERNBASE); -} - -static int -_powerpc64_minidump_walk_pages(kvm_t *kd, kvm_walk_pages_cb_t *cb, void *arg) -{ - return (PPC64_MMU_OP(kd, walk_pages, cb, arg)); -} - -static struct kvm_arch kvm_powerpc64_minidump = { - .ka_probe = _powerpc64_minidump_probe, - .ka_initvtop = _powerpc64_minidump_initvtop, - .ka_freevtop = _powerpc64_minidump_freevtop, - .ka_kvatop = _powerpc64_minidump_kvatop, - .ka_walk_pages = _powerpc64_minidump_walk_pages, - .ka_native = _powerpc64_native, - .ka_kerndisp = _powerpc64_kerndisp, -}; - -KVM_ARCH(kvm_powerpc64_minidump); diff --git a/lib/libkvm/kvm_minidump_powerpc64_hpt.c b/lib/libkvm/kvm_minidump_powerpc64_hpt.c deleted file mode 100644 index 4e95154caf6..00000000000 --- a/lib/libkvm/kvm_minidump_powerpc64_hpt.c +++ /dev/null @@ -1,664 +0,0 @@ -/*- - * Copyright (c) 2006 Peter Wemm - * Copyright (c) 2019 Leandro Lupori - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * From: FreeBSD: src/lib/libkvm/kvm_minidump_riscv.c - */ - -#include -#include -#include - -#include - -#include -#include -#include -#include -#include - -#include "../../sys/powerpc/include/minidump.h" -#include "kvm_private.h" -#include "kvm_powerpc64.h" - -/* - * PowerPC64 HPT machine dependent routines for kvm and minidumps. - * - * Address Translation parameters: - * - * b = 12 (SLB base page size: 4 KB) - * b = 24 (SLB base page size: 16 MB) - * p = 12 (page size: 4 KB) - * p = 24 (page size: 16 MB) - * s = 28 (segment size: 256 MB) - */ - -/* Large (huge) page params */ -#define LP_PAGE_SHIFT 24 -#define LP_PAGE_SIZE (1ULL << LP_PAGE_SHIFT) -#define LP_PAGE_MASK 0x00ffffffULL - -/* SLB */ - -#define SEGMENT_LENGTH 0x10000000ULL - -#define round_seg(x) roundup2((uint64_t)(x), SEGMENT_LENGTH) - -/* Virtual real-mode VSID in LPARs */ -#define VSID_VRMA 0x1ffffffULL - -#define SLBV_L 0x0000000000000100ULL /* Large page selector */ -#define SLBV_CLASS 0x0000000000000080ULL /* Class selector */ -#define SLBV_LP_MASK 0x0000000000000030ULL -#define SLBV_VSID_MASK 0x3ffffffffffff000ULL /* Virtual SegID mask */ -#define SLBV_VSID_SHIFT 12 - -#define SLBE_B_MASK 0x0000000006000000ULL -#define SLBE_B_256MB 0x0000000000000000ULL -#define SLBE_VALID 0x0000000008000000ULL /* SLB entry valid */ -#define SLBE_INDEX_MASK 0x0000000000000fffULL /* SLB index mask */ -#define SLBE_ESID_MASK 0xfffffffff0000000ULL /* Effective SegID mask */ -#define SLBE_ESID_SHIFT 28 - -/* PTE */ - -#define LPTEH_VSID_SHIFT 12 -#define LPTEH_AVPN_MASK 0xffffffffffffff80ULL -#define LPTEH_B_MASK 0xc000000000000000ULL -#define LPTEH_B_256MB 0x0000000000000000ULL -#define LPTEH_BIG 0x0000000000000004ULL /* 4KB/16MB page */ -#define LPTEH_HID 0x0000000000000002ULL -#define LPTEH_VALID 0x0000000000000001ULL - -#define LPTEL_RPGN 0xfffffffffffff000ULL -#define LPTEL_LP_MASK 0x00000000000ff000ULL -#define LPTEL_NOEXEC 0x0000000000000004ULL - -/* Supervisor (U: RW, S: RW) */ -#define LPTEL_BW 0x0000000000000002ULL - -/* Both Read Only (U: RO, S: RO) */ -#define LPTEL_BR 0x0000000000000003ULL - -#define LPTEL_RW LPTEL_BW -#define LPTEL_RO LPTEL_BR - -/* - * PTE AVA field manipulation macros. - * - * AVA[0:54] = PTEH[2:56] - * AVA[VSID] = AVA[0:49] = PTEH[2:51] - * AVA[PAGE] = AVA[50:54] = PTEH[52:56] - */ -#define PTEH_AVA_VSID_MASK 0x3ffffffffffff000UL -#define PTEH_AVA_VSID_SHIFT 12 -#define PTEH_AVA_VSID(p) \ - (((p) & PTEH_AVA_VSID_MASK) >> PTEH_AVA_VSID_SHIFT) - -#define PTEH_AVA_PAGE_MASK 0x0000000000000f80UL -#define PTEH_AVA_PAGE_SHIFT 7 -#define PTEH_AVA_PAGE(p) \ - (((p) & PTEH_AVA_PAGE_MASK) >> PTEH_AVA_PAGE_SHIFT) - -/* Masks to obtain the Physical Address from PTE low 64-bit word. */ -#define PTEL_PA_MASK 0x0ffffffffffff000UL -#define PTEL_LP_PA_MASK 0x0fffffffff000000UL - -#define PTE_HASH_MASK 0x0000007fffffffffUL - -/* - * Number of AVA/VA page bits to shift right, in order to leave only the - * ones that should be considered. - * - * q = MIN(54, 77-b) (PowerISA v2.07B, 5.7.7.3) - * n = q + 1 - 50 (VSID size in bits) - * s(ava) = 5 - n - * s(va) = (28 - b) - n - * - * q: bit number of lower limit of VA/AVA bits to compare - * n: number of AVA/VA page bits to compare - * s: shift amount - * 28 - b: VA page size in bits - */ -#define AVA_PAGE_SHIFT(b) (5 - (MIN(54, 77-(b)) + 1 - 50)) -#define VA_PAGE_SHIFT(b) (28 - (b) - (MIN(54, 77-(b)) + 1 - 50)) - -/* Kernel ESID -> VSID mapping */ -#define KERNEL_VSID_BIT 0x0000001000000000UL /* Bit set in all kernel VSIDs */ -#define KERNEL_VSID(esid) ((((((uint64_t)esid << 8) | ((uint64_t)esid >> 28)) \ - * 0x13bbUL) & (KERNEL_VSID_BIT - 1)) | \ - KERNEL_VSID_BIT) - -/* Types */ - -typedef uint64_t ppc64_physaddr_t; - -typedef struct { - uint64_t slbv; - uint64_t slbe; -} ppc64_slb_entry_t; - -typedef struct { - uint64_t pte_hi; - uint64_t pte_lo; -} ppc64_pt_entry_t; - -struct hpt_data { - ppc64_slb_entry_t *slbs; - uint32_t slbsize; -}; - - -static void -slb_fill(ppc64_slb_entry_t *slb, uint64_t ea, uint64_t i) -{ - uint64_t esid; - - esid = ea >> SLBE_ESID_SHIFT; - slb->slbv = KERNEL_VSID(esid) << SLBV_VSID_SHIFT; - slb->slbe = (esid << SLBE_ESID_SHIFT) | SLBE_VALID | i; -} - -static int -slb_init(kvm_t *kd) -{ - struct minidumphdr *hdr; - struct hpt_data *data; - ppc64_slb_entry_t *slb; - uint32_t slbsize; - uint64_t ea, i, maxmem; - - hdr = &kd->vmst->hdr; - data = PPC64_MMU_DATA(kd); - - /* Alloc SLBs */ - maxmem = hdr->bitmapsize * 8 * PPC64_PAGE_SIZE; - slbsize = round_seg(hdr->kernend + 1 - hdr->kernbase + maxmem) / - SEGMENT_LENGTH * sizeof(ppc64_slb_entry_t); - data->slbs = _kvm_malloc(kd, slbsize); - if (data->slbs == NULL) { - _kvm_err(kd, kd->program, "cannot allocate slbs"); - return (-1); - } - data->slbsize = slbsize; - - dprintf("%s: maxmem=0x%jx, segs=%jd, slbsize=0x%jx\n", - __func__, (uintmax_t)maxmem, - (uintmax_t)slbsize / sizeof(ppc64_slb_entry_t), (uintmax_t)slbsize); - - /* - * Generate needed SLB entries. - * - * When translating addresses from EA to VA to PA, the needed SLB - * entry could be generated on the fly, but this is not the case - * for the walk_pages method, that needs to search the SLB entry - * by VSID, in order to find out the EA from a PTE. - */ - - /* VM area */ - for (ea = hdr->kernbase, i = 0, slb = data->slbs; - ea < hdr->kernend; ea += SEGMENT_LENGTH, i++, slb++) - slb_fill(slb, ea, i); - - /* DMAP area */ - for (ea = hdr->dmapbase; - ea < MIN(hdr->dmapend, hdr->dmapbase + maxmem); - ea += SEGMENT_LENGTH, i++, slb++) { - slb_fill(slb, ea, i); - if (hdr->hw_direct_map) - slb->slbv |= SLBV_L; - } - - return (0); -} - -static void -ppc64mmu_hpt_cleanup(kvm_t *kd) -{ - struct hpt_data *data; - - if (kd->vmst == NULL) - return; - - data = PPC64_MMU_DATA(kd); - free(data->slbs); - free(data); - PPC64_MMU_DATA(kd) = NULL; -} - -static int -ppc64mmu_hpt_init(kvm_t *kd) -{ - struct hpt_data *data; - struct minidumphdr *hdr; - - hdr = &kd->vmst->hdr; - - /* Alloc MMU data */ - data = _kvm_malloc(kd, sizeof(*data)); - if (data == NULL) { - _kvm_err(kd, kd->program, "cannot allocate MMU data"); - return (-1); - } - data->slbs = NULL; - PPC64_MMU_DATA(kd) = data; - - if (slb_init(kd) == -1) - goto failed; - - return (0); - -failed: - ppc64mmu_hpt_cleanup(kd); - return (-1); -} - -static ppc64_slb_entry_t * -slb_search(kvm_t *kd, kvaddr_t ea) -{ - struct hpt_data *data; - ppc64_slb_entry_t *slb; - int i, n; - - data = PPC64_MMU_DATA(kd); - slb = data->slbs; - n = data->slbsize / sizeof(ppc64_slb_entry_t); - - /* SLB search */ - for (i = 0; i < n; i++, slb++) { - if ((slb->slbe & SLBE_VALID) == 0) - continue; - - /* Compare 36-bit ESID of EA with segment one (64-s) */ - if ((slb->slbe & SLBE_ESID_MASK) != (ea & SLBE_ESID_MASK)) - continue; - - /* Match found */ - dprintf("SEG#%02d: slbv=0x%016jx, slbe=0x%016jx\n", - i, (uintmax_t)slb->slbv, (uintmax_t)slb->slbe); - break; - } - - /* SLB not found */ - if (i == n) { - _kvm_err(kd, kd->program, "%s: segment not found for EA 0x%jx", - __func__, (uintmax_t)ea); - return (NULL); - } - return (slb); -} - -static ppc64_pt_entry_t -pte_get(kvm_t *kd, u_long ptex) -{ - ppc64_pt_entry_t pte, *p; - - p = _kvm_pmap_get(kd, ptex, sizeof(pte)); - pte.pte_hi = be64toh(p->pte_hi); - pte.pte_lo = be64toh(p->pte_lo); - return (pte); -} - -static int -pte_search(kvm_t *kd, ppc64_slb_entry_t *slb, uint64_t hid, kvaddr_t ea, - ppc64_pt_entry_t *p) -{ - uint64_t hash, hmask; - uint64_t pteg, ptex; - uint64_t va_vsid, va_page; - int b; - int ava_pg_shift, va_pg_shift; - ppc64_pt_entry_t pte; - - /* - * Get VA: - * - * va(78) = va_vsid(50) || va_page(s-b) || offset(b) - * - * va_vsid: 50-bit VSID (78-s) - * va_page: (s-b)-bit VA page - */ - b = slb->slbv & SLBV_L? LP_PAGE_SHIFT : PPC64_PAGE_SHIFT; - va_vsid = (slb->slbv & SLBV_VSID_MASK) >> SLBV_VSID_SHIFT; - va_page = (ea & ~SLBE_ESID_MASK) >> b; - - dprintf("%s: hid=0x%jx, ea=0x%016jx, b=%d, va_vsid=0x%010jx, " - "va_page=0x%04jx\n", - __func__, (uintmax_t)hid, (uintmax_t)ea, b, - (uintmax_t)va_vsid, (uintmax_t)va_page); - - /* - * Get hash: - * - * Primary hash: va_vsid(11:49) ^ va_page(s-b) - * Secondary hash: ~primary_hash - */ - hash = (va_vsid & PTE_HASH_MASK) ^ va_page; - if (hid) - hash = ~hash & PTE_HASH_MASK; - - /* - * Get PTEG: - * - * pteg = (hash(0:38) & hmask) << 3 - * - * hmask (hash mask): mask generated from HTABSIZE || 11*0b1 - * hmask = number_of_ptegs - 1 - */ - hmask = kd->vmst->hdr.pmapsize / (8 * sizeof(ppc64_pt_entry_t)) - 1; - pteg = (hash & hmask) << 3; - - ava_pg_shift = AVA_PAGE_SHIFT(b); - va_pg_shift = VA_PAGE_SHIFT(b); - - dprintf("%s: hash=0x%010jx, hmask=0x%010jx, (hash & hmask)=0x%010jx, " - "pteg=0x%011jx, ava_pg_shift=%d, va_pg_shift=%d\n", - __func__, (uintmax_t)hash, (uintmax_t)hmask, - (uintmax_t)(hash & hmask), (uintmax_t)pteg, - ava_pg_shift, va_pg_shift); - - /* Search PTEG */ - for (ptex = pteg; ptex < pteg + 8; ptex++) { - pte = pte_get(kd, ptex); - - /* Check H, V and B */ - if ((pte.pte_hi & LPTEH_HID) != hid || - (pte.pte_hi & LPTEH_VALID) == 0 || - (pte.pte_hi & LPTEH_B_MASK) != LPTEH_B_256MB) - continue; - - /* Compare AVA with VA */ - if (PTEH_AVA_VSID(pte.pte_hi) != va_vsid || - (PTEH_AVA_PAGE(pte.pte_hi) >> ava_pg_shift) != - (va_page >> va_pg_shift)) - continue; - - /* - * Check if PTE[L] matches SLBV[L]. - * - * Note: this check ignores PTE[LP], as does the kernel. - */ - if (b == PPC64_PAGE_SHIFT) { - if (pte.pte_hi & LPTEH_BIG) - continue; - } else if ((pte.pte_hi & LPTEH_BIG) == 0) - continue; - - /* Match found */ - dprintf("%s: PTE found: ptex=0x%jx, pteh=0x%016jx, " - "ptel=0x%016jx\n", - __func__, (uintmax_t)ptex, (uintmax_t)pte.pte_hi, - (uintmax_t)pte.pte_lo); - break; - } - - /* Not found? */ - if (ptex == pteg + 8) { - /* Try secondary hash */ - if (hid == 0) - return (pte_search(kd, slb, LPTEH_HID, ea, p)); - else { - _kvm_err(kd, kd->program, - "%s: pte not found", __func__); - return (-1); - } - } - - /* PTE found */ - *p = pte; - return (0); -} - -static int -pte_lookup(kvm_t *kd, kvaddr_t ea, ppc64_pt_entry_t *pte) -{ - ppc64_slb_entry_t *slb; - - /* First, find SLB */ - if ((slb = slb_search(kd, ea)) == NULL) - return (-1); - - /* Next, find PTE */ - return (pte_search(kd, slb, 0, ea, pte)); -} - -static int -ppc64mmu_hpt_kvatop(kvm_t *kd, kvaddr_t va, off_t *pa) -{ - struct minidumphdr *hdr; - struct vmstate *vm; - ppc64_pt_entry_t pte; - ppc64_physaddr_t pgoff, pgpa; - off_t ptoff; - int err; - - vm = kd->vmst; - hdr = &vm->hdr; - pgoff = va & PPC64_PAGE_MASK; - - dprintf("%s: va=0x%016jx\n", __func__, (uintmax_t)va); - - /* - * A common use case of libkvm is to first find a symbol address - * from the kernel image and then use kvatop to translate it and - * to be able to fetch its corresponding data. - * - * The problem is that, in PowerPC64 case, the addresses of relocated - * data won't match those in the kernel image. This is handled here by - * adding the relocation offset to those addresses. - */ - if (va < hdr->dmapbase) - va += hdr->startkernel - PPC64_KERNBASE; - - /* Handle DMAP */ - if (va >= hdr->dmapbase && va <= hdr->dmapend) { - pgpa = (va & ~hdr->dmapbase) & ~PPC64_PAGE_MASK; - ptoff = _kvm_pt_find(kd, pgpa, PPC64_PAGE_SIZE); - if (ptoff == -1) { - _kvm_err(kd, kd->program, "%s: " - "direct map address 0x%jx not in minidump", - __func__, (uintmax_t)va); - goto invalid; - } - *pa = ptoff + pgoff; - return (PPC64_PAGE_SIZE - pgoff); - /* Translate VA to PA */ - } else if (va >= hdr->kernbase) { - if ((err = pte_lookup(kd, va, &pte)) == -1) { - _kvm_err(kd, kd->program, - "%s: pte not valid", __func__); - goto invalid; - } - - if (pte.pte_hi & LPTEH_BIG) - pgpa = (pte.pte_lo & PTEL_LP_PA_MASK) | - (va & ~PPC64_PAGE_MASK & LP_PAGE_MASK); - else - pgpa = pte.pte_lo & PTEL_PA_MASK; - dprintf("%s: pgpa=0x%016jx\n", __func__, (uintmax_t)pgpa); - - ptoff = _kvm_pt_find(kd, pgpa, PPC64_PAGE_SIZE); - if (ptoff == -1) { - _kvm_err(kd, kd->program, "%s: " - "physical address 0x%jx not in minidump", - __func__, (uintmax_t)pgpa); - goto invalid; - } - *pa = ptoff + pgoff; - return (PPC64_PAGE_SIZE - pgoff); - } else { - _kvm_err(kd, kd->program, - "%s: virtual address 0x%jx not minidumped", - __func__, (uintmax_t)va); - goto invalid; - } - -invalid: - _kvm_err(kd, 0, "invalid address (0x%jx)", (uintmax_t)va); - return (0); -} - -static vm_prot_t -entry_to_prot(ppc64_pt_entry_t *pte) -{ - vm_prot_t prot = VM_PROT_READ; - - if (pte->pte_lo & LPTEL_RW) - prot |= VM_PROT_WRITE; - if ((pte->pte_lo & LPTEL_NOEXEC) != 0) - prot |= VM_PROT_EXECUTE; - return (prot); -} - -static ppc64_slb_entry_t * -slb_vsid_search(kvm_t *kd, uint64_t vsid) -{ - struct hpt_data *data; - ppc64_slb_entry_t *slb; - int i, n; - - data = PPC64_MMU_DATA(kd); - slb = data->slbs; - n = data->slbsize / sizeof(ppc64_slb_entry_t); - vsid <<= SLBV_VSID_SHIFT; - - /* SLB search */ - for (i = 0; i < n; i++, slb++) { - /* Check if valid and compare VSID */ - if ((slb->slbe & SLBE_VALID) && - (slb->slbv & SLBV_VSID_MASK) == vsid) - break; - } - - /* SLB not found */ - if (i == n) { - _kvm_err(kd, kd->program, - "%s: segment not found for VSID 0x%jx", - __func__, (uintmax_t)vsid >> SLBV_VSID_SHIFT); - return (NULL); - } - return (slb); -} - -static u_long -get_ea(kvm_t *kd, ppc64_pt_entry_t *pte, u_long ptex) -{ - ppc64_slb_entry_t *slb; - uint64_t ea, hash, vsid; - int b, shift; - - /* Find SLB */ - vsid = PTEH_AVA_VSID(pte->pte_hi); - if ((slb = slb_vsid_search(kd, vsid)) == NULL) - return (~0UL); - - /* Get ESID part of EA */ - ea = slb->slbe & SLBE_ESID_MASK; - - b = slb->slbv & SLBV_L? LP_PAGE_SHIFT : PPC64_PAGE_SHIFT; - - /* - * If there are less than 64K PTEGs (16-bit), the upper bits of - * EA page must be obtained from PTEH's AVA. - */ - if (kd->vmst->hdr.pmapsize / (8 * sizeof(ppc64_pt_entry_t)) < - 0x10000U) { - /* - * Add 0 to 5 EA bits, right after VSID. - * b == 12: 5 bits - * b == 24: 4 bits - */ - shift = AVA_PAGE_SHIFT(b); - ea |= (PTEH_AVA_PAGE(pte->pte_hi) >> shift) << - (SLBE_ESID_SHIFT - 5 + shift); - } - - /* Get VA page from hash and add to EA. */ - hash = (ptex & ~7) >> 3; - if (pte->pte_hi & LPTEH_HID) - hash = ~hash & PTE_HASH_MASK; - ea |= ((hash ^ (vsid & PTE_HASH_MASK)) << b) & ~SLBE_ESID_MASK; - return (ea); -} - -static int -ppc64mmu_hpt_walk_pages(kvm_t *kd, kvm_walk_pages_cb_t *cb, void *arg) -{ - struct vmstate *vm; - int ret; - unsigned int pagesz; - u_long dva, pa, va; - u_long ptex, nptes; - uint64_t vsid; - - ret = 0; - vm = kd->vmst; - nptes = vm->hdr.pmapsize / sizeof(ppc64_pt_entry_t); - - /* Walk through PTEs */ - for (ptex = 0; ptex < nptes; ptex++) { - ppc64_pt_entry_t pte = pte_get(kd, ptex); - if ((pte.pte_hi & LPTEH_VALID) == 0) - continue; - - /* Skip non-kernel related pages, as well as VRMA ones */ - vsid = PTEH_AVA_VSID(pte.pte_hi); - if ((vsid & KERNEL_VSID_BIT) == 0 || - (vsid >> PPC64_PAGE_SHIFT) == VSID_VRMA) - continue; - - /* Retrieve page's VA (EA on PPC64 terminology) */ - if ((va = get_ea(kd, &pte, ptex)) == ~0UL) - goto out; - - /* Get PA and page size */ - if (pte.pte_hi & LPTEH_BIG) { - pa = pte.pte_lo & PTEL_LP_PA_MASK; - pagesz = LP_PAGE_SIZE; - } else { - pa = pte.pte_lo & PTEL_PA_MASK; - pagesz = PPC64_PAGE_SIZE; - } - - /* Get DMAP address */ - dva = vm->hdr.dmapbase + pa; - - if (!_kvm_visit_cb(kd, cb, arg, pa, va, dva, - entry_to_prot(&pte), pagesz, 0)) - goto out; - } - ret = 1; - -out: - return (ret); -} - - -static struct ppc64_mmu_ops ops = { - .init = ppc64mmu_hpt_init, - .cleanup = ppc64mmu_hpt_cleanup, - .kvatop = ppc64mmu_hpt_kvatop, - .walk_pages = ppc64mmu_hpt_walk_pages, -}; -struct ppc64_mmu_ops *ppc64_mmu_ops_hpt = &ops; diff --git a/lib/libkvm/kvm_mips.h b/lib/libkvm/kvm_mips.h deleted file mode 100644 index c77ff9f6eb0..00000000000 --- a/lib/libkvm/kvm_mips.h +++ /dev/null @@ -1,115 +0,0 @@ -/*- - * Copyright (c) 2015 John H. Baldwin - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef __KVM_MIPS_H__ -#define __KVM_MIPS_H__ - -#ifdef __mips__ -#include -#endif - -typedef uint64_t mips_physaddr_t; - -typedef uint32_t mips32_pte_t; -typedef uint64_t mips64_pte_t; - -#define MIPS_PAGE_SHIFT 12 -#define MIPS_PAGE_SIZE (1 << MIPS_PAGE_SHIFT) -#define MIPS_PAGE_MASK (MIPS_PAGE_SIZE - 1) - -#define MIPS32_KSEG0_START 0x80000000 -#define MIPS32_KSEG0_END 0x9fffffff -#define MIPS32_KSEG1_START 0xa0000000 -#define MIPS32_KSEG1_END 0xbfffffff -#define MIPS64_KSEG0_START 0xffffffff80000000 -#define MIPS64_KSEG0_END 0xffffffff9fffffff -#define MIPS64_KSEG1_START 0xffffffffa0000000 -#define MIPS64_KSEG1_END 0xffffffffbfffffff - -#define MIPS32_PFN_MASK (0x1FFFFFC0) -#define MIPS64_PFN_MASK 0x3FFFFFFC0 -#define MIPS_PFN_SHIFT (6) - -#define MIPS_PFN_TO_PA(pfn) (((pfn) >> MIPS_PFN_SHIFT) << MIPS_PAGE_SHIFT) -#define MIPS32_PTE_TO_PFN(pte) ((pte) & MIPS32_PFN_MASK) -#define MIPS32_PTE_TO_PA(pte) (MIPS_PFN_TO_PA(MIPS32_PTE_TO_PFN((pte)))) -#define MIPS64_PTE_TO_PFN(pte) ((pte) & MIPS64_PFN_MASK) -#define MIPS64_PTE_TO_PA(pte) (MIPS_PFN_TO_PA(MIPS64_PTE_TO_PFN((pte)))) - -#define MIPS32_SWBITS_SHIFT 29 -#define MIPS64_SWBITS_SHIFT 55 -#define MIPS_PTE_V 0x02 -#define MIPS32_PTE_RO ((mips32_pte_t)0x01 << MIPS32_SWBITS_SHIFT) -#define MIPS64_PTE_RO ((mips64_pte_t)0x01 << MIPS64_SWBITS_SHIFT) - -static inline mips32_pte_t -_mips32_pte_get(kvm_t *kd, u_long pteindex) -{ - mips32_pte_t *pte = _kvm_pmap_get(kd, pteindex, sizeof(*pte)); - - return _kvm32toh(kd, *pte); -} - -static inline mips64_pte_t -_mips64_pte_get(kvm_t *kd, u_long pteindex) -{ - mips64_pte_t *pte = _kvm_pmap_get(kd, pteindex, sizeof(*pte)); - - return _kvm64toh(kd, *pte); -} - -#ifdef __mips__ -_Static_assert(PAGE_SHIFT == MIPS_PAGE_SHIFT, "PAGE_SHIFT mismatch"); -_Static_assert(PAGE_SIZE == MIPS_PAGE_SIZE, "PAGE_SIZE mismatch"); -_Static_assert(PAGE_MASK == MIPS_PAGE_MASK, "PAGE_MASK mismatch"); -#ifdef __mips_n64 -_Static_assert((uint64_t)MIPS_KSEG0_START == MIPS64_KSEG0_START, - "MIPS_KSEG0_START mismatch"); -_Static_assert((uint64_t)MIPS_KSEG0_END == MIPS64_KSEG0_END, - "MIPS_KSEG0_END mismatch"); -_Static_assert((uint64_t)MIPS_KSEG1_START == MIPS64_KSEG1_START, - "MIPS_KSEG1_START mismatch"); -_Static_assert((uint64_t)MIPS_KSEG1_END == MIPS64_KSEG1_END, - "MIPS_KSEG1_END mismatch"); -#else -_Static_assert((uint32_t)MIPS_KSEG0_START == MIPS32_KSEG0_START, - "MIPS_KSEG0_START mismatch"); -_Static_assert((uint32_t)MIPS_KSEG0_END == MIPS32_KSEG0_END, - "MIPS_KSEG0_END mismatch"); -_Static_assert((uint32_t)MIPS_KSEG1_START == MIPS32_KSEG1_START, - "MIPS_KSEG1_START mismatch"); -_Static_assert((uint32_t)MIPS_KSEG1_END == MIPS32_KSEG1_END, - "MIPS_KSEG1_END mismatch"); -#endif -#if defined(__mips_n64) || defined(__mips_n32) -_Static_assert(TLBLO_PFN_MASK == MIPS64_PFN_MASK, "TLBLO_PFN_MASK mismatch"); -#else -_Static_assert(TLBLO_PFN_MASK == MIPS32_PFN_MASK, "TLBLO_PFN_MASK mismatch"); -#endif -_Static_assert(TLBLO_PFN_SHIFT == MIPS_PFN_SHIFT, "TLBLO_PFN_SHIFT mismatch"); -_Static_assert(TLB_PAGE_SHIFT == MIPS_PAGE_SHIFT, "TLB_PAGE_SHIFT mismatch"); -#endif - -#endif /* !__KVM_MIPS_H__ */ diff --git a/lib/libkvm/kvm_powerpc.c b/lib/libkvm/kvm_powerpc.c deleted file mode 100644 index 35312cda352..00000000000 --- a/lib/libkvm/kvm_powerpc.c +++ /dev/null @@ -1,235 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2008, Juniper Networks, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "kvm_private.h" - -struct vmstate { - void *map; - size_t mapsz; - size_t dmphdrsz; - Elf32_Ehdr *eh; - Elf32_Phdr *ph; -}; - -static int -valid_elf_header(Elf32_Ehdr *eh) -{ - - if (!IS_ELF(*eh)) - return (0); - if (eh->e_ident[EI_CLASS] != ELFCLASS32) - return (0); - if (eh->e_ident[EI_DATA] != ELFDATA2MSB) - return (0); - if (eh->e_ident[EI_VERSION] != EV_CURRENT) - return (0); - if (eh->e_ident[EI_OSABI] != ELFOSABI_STANDALONE) - return (0); - if (be16toh(eh->e_type) != ET_CORE) - return (0); - if (be16toh(eh->e_machine) != EM_PPC) - return (0); - /* Can't think of anything else to check... */ - return (1); -} - -static size_t -dump_header_size(struct kerneldumpheader *dh) -{ - - if (strcmp(dh->magic, KERNELDUMPMAGIC) != 0) - return (0); - if (strcmp(dh->architecture, "powerpc") != 0) - return (0); - /* That should do it... */ - return (sizeof(*dh)); -} - -/* - * Map the ELF headers into the process' address space. We do this in two - * steps: first the ELF header itself and using that information the whole - * set of headers. - */ -static int -powerpc_maphdrs(kvm_t *kd) -{ - struct vmstate *vm; - size_t mapsz; - - vm = kd->vmst; - - vm->mapsz = sizeof(*vm->eh) + sizeof(struct kerneldumpheader); - vm->map = mmap(NULL, vm->mapsz, PROT_READ, MAP_PRIVATE, kd->pmfd, 0); - if (vm->map == MAP_FAILED) { - _kvm_err(kd, kd->program, "cannot map corefile"); - return (-1); - } - vm->dmphdrsz = 0; - vm->eh = vm->map; - if (!valid_elf_header(vm->eh)) { - /* - * Hmmm, no ELF header. Maybe we still have a dump header. - * This is normal when the core file wasn't created by - * savecore(8), but instead was dumped over TFTP. We can - * easily skip the dump header... - */ - vm->dmphdrsz = dump_header_size(vm->map); - if (vm->dmphdrsz == 0) - goto inval; - vm->eh = (void *)((uintptr_t)vm->map + vm->dmphdrsz); - if (!valid_elf_header(vm->eh)) - goto inval; - } - mapsz = be16toh(vm->eh->e_phentsize) * be16toh(vm->eh->e_phnum) + - be32toh(vm->eh->e_phoff); - munmap(vm->map, vm->mapsz); - - /* Map all headers. */ - vm->mapsz = vm->dmphdrsz + mapsz; - vm->map = mmap(NULL, vm->mapsz, PROT_READ, MAP_PRIVATE, kd->pmfd, 0); - if (vm->map == MAP_FAILED) { - _kvm_err(kd, kd->program, "cannot map corefile headers"); - return (-1); - } - vm->eh = (void *)((uintptr_t)vm->map + vm->dmphdrsz); - vm->ph = (void *)((uintptr_t)vm->eh + be32toh(vm->eh->e_phoff)); - return (0); - - inval: - _kvm_err(kd, kd->program, "invalid corefile"); - return (-1); -} - -/* - * Determine the offset within the corefile corresponding the virtual - * address. Return the number of contiguous bytes in the corefile or - * 0 when the virtual address is invalid. - */ -static size_t -powerpc_va2off(kvm_t *kd, kvaddr_t va, off_t *ofs) -{ - struct vmstate *vm = kd->vmst; - Elf32_Phdr *ph; - int nph; - - ph = vm->ph; - nph = be16toh(vm->eh->e_phnum); - while (nph && (va < be32toh(ph->p_vaddr) || - va >= be32toh(ph->p_vaddr) + be32toh(ph->p_memsz))) { - nph--; - ph = (void *)((uintptr_t)ph + be16toh(vm->eh->e_phentsize)); - } - if (nph == 0) - return (0); - - /* Segment found. Return file offset and range. */ - *ofs = vm->dmphdrsz + be32toh(ph->p_offset) + - (va - be32toh(ph->p_vaddr)); - return (be32toh(ph->p_memsz) - (va - be32toh(ph->p_vaddr))); -} - -static void -_powerpc_freevtop(kvm_t *kd) -{ - struct vmstate *vm = kd->vmst; - - if (vm->eh != MAP_FAILED) - munmap(vm->eh, vm->mapsz); - free(vm); - kd->vmst = NULL; -} - -static int -_powerpc_probe(kvm_t *kd) -{ - - return (_kvm_probe_elf_kernel(kd, ELFCLASS32, EM_PPC) && - kd->nlehdr.e_ident[EI_DATA] == ELFDATA2MSB); -} - -static int -_powerpc_initvtop(kvm_t *kd) -{ - - kd->vmst = (struct vmstate *)_kvm_malloc(kd, sizeof(*kd->vmst)); - if (kd->vmst == NULL) - return (-1); - - if (powerpc_maphdrs(kd) == -1) - return (-1); - - return (0); -} - -static int -_powerpc_kvatop(kvm_t *kd, kvaddr_t va, off_t *ofs) -{ - struct vmstate *vm; - - vm = kd->vmst; - if (be32toh(vm->ph->p_paddr) == 0xffffffff) - return ((int)powerpc_va2off(kd, va, ofs)); - - _kvm_err(kd, kd->program, "Raw corefile not supported"); - return (0); -} - -static int -_powerpc_native(kvm_t *kd __unused) -{ - -#if defined(__powerpc__) && !defined(__powerpc64__) - return (1); -#else - return (0); -#endif -} - -static struct kvm_arch kvm_powerpc = { - .ka_probe = _powerpc_probe, - .ka_initvtop = _powerpc_initvtop, - .ka_freevtop = _powerpc_freevtop, - .ka_kvatop = _powerpc_kvatop, - .ka_native = _powerpc_native, -}; - -KVM_ARCH(kvm_powerpc); diff --git a/lib/libkvm/kvm_powerpc64.c b/lib/libkvm/kvm_powerpc64.c deleted file mode 100644 index 6bf35012114..00000000000 --- a/lib/libkvm/kvm_powerpc64.c +++ /dev/null @@ -1,268 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2008, Juniper Networks, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "kvm_private.h" - -struct vmstate { - void *map; - size_t mapsz; - size_t dmphdrsz; - Elf64_Ehdr *eh; - Elf64_Phdr *ph; -}; - -static int -valid_elf_header(kvm_t *kd, Elf64_Ehdr *eh) -{ - - if (!IS_ELF(*eh)) - return (0); - if (eh->e_ident[EI_CLASS] != ELFCLASS64) - return (0); - if (eh->e_ident[EI_DATA] != ELFDATA2MSB && - eh->e_ident[EI_DATA] != ELFDATA2LSB) - return (0); - if (eh->e_ident[EI_VERSION] != EV_CURRENT) - return (0); - if (eh->e_ident[EI_OSABI] != ELFOSABI_STANDALONE) - return (0); - if (_kvm16toh(kd, eh->e_type) != ET_CORE) - return (0); - if (_kvm16toh(kd, eh->e_machine) != EM_PPC64) - return (0); - /* Can't think of anything else to check... */ - return (1); -} - -static size_t -dump_header_size(struct kerneldumpheader *dh) -{ - - if (strcmp(dh->magic, KERNELDUMPMAGIC) != 0) - return (0); - if (strcmp(dh->architecture, "powerpc64") != 0 && - strcmp(dh->architecture, "powerpc64le") != 0) - return (0); - /* That should do it... */ - return (sizeof(*dh)); -} - -/* - * Map the ELF headers into the process' address space. We do this in two - * steps: first the ELF header itself and using that information the whole - * set of headers. - */ -static int -powerpc_maphdrs(kvm_t *kd) -{ - struct vmstate *vm; - size_t mapsz; - - vm = kd->vmst; - - vm->mapsz = sizeof(*vm->eh) + sizeof(struct kerneldumpheader); - vm->map = mmap(NULL, vm->mapsz, PROT_READ, MAP_PRIVATE, kd->pmfd, 0); - if (vm->map == MAP_FAILED) { - _kvm_err(kd, kd->program, "cannot map corefile"); - return (-1); - } - vm->dmphdrsz = 0; - vm->eh = vm->map; - if (!valid_elf_header(kd, vm->eh)) { - /* - * Hmmm, no ELF header. Maybe we still have a dump header. - * This is normal when the core file wasn't created by - * savecore(8), but instead was dumped over TFTP. We can - * easily skip the dump header... - */ - vm->dmphdrsz = dump_header_size(vm->map); - if (vm->dmphdrsz == 0) - goto inval; - vm->eh = (void *)((uintptr_t)vm->map + vm->dmphdrsz); - if (!valid_elf_header(kd, vm->eh)) - goto inval; - } - mapsz = _kvm16toh(kd, vm->eh->e_phentsize) * - _kvm16toh(kd, vm->eh->e_phnum) + _kvm64toh(kd, vm->eh->e_phoff); - munmap(vm->map, vm->mapsz); - - /* Map all headers. */ - vm->mapsz = vm->dmphdrsz + mapsz; - vm->map = mmap(NULL, vm->mapsz, PROT_READ, MAP_PRIVATE, kd->pmfd, 0); - if (vm->map == MAP_FAILED) { - _kvm_err(kd, kd->program, "cannot map corefile headers"); - return (-1); - } - vm->eh = (void *)((uintptr_t)vm->map + vm->dmphdrsz); - vm->ph = (void *)((uintptr_t)vm->eh + - (uintptr_t)_kvm64toh(kd, vm->eh->e_phoff)); - return (0); - - inval: - _kvm_err(kd, kd->program, "invalid corefile"); - return (-1); -} - -/* - * Determine the offset within the corefile corresponding the virtual - * address. Return the number of contiguous bytes in the corefile or - * 0 when the virtual address is invalid. - */ -static size_t -powerpc64_va2off(kvm_t *kd, kvaddr_t va, off_t *ofs) -{ - struct vmstate *vm = kd->vmst; - Elf64_Phdr *ph; - int nph; - - ph = vm->ph; - nph = _kvm16toh(kd, vm->eh->e_phnum); - while (nph && (va < _kvm64toh(kd, ph->p_vaddr) || - va >= _kvm64toh(kd, ph->p_vaddr) + _kvm64toh(kd, ph->p_memsz))) { - nph--; - ph = (void *)((uintptr_t)ph + - _kvm16toh(kd, vm->eh->e_phentsize)); - } - if (nph == 0) - return (0); - - /* Segment found. Return file offset and range. */ - *ofs = vm->dmphdrsz + _kvm64toh(kd, ph->p_offset) + - (va - _kvm64toh(kd, ph->p_vaddr)); - return (_kvm64toh(kd, ph->p_memsz) - - (va - _kvm64toh(kd, ph->p_vaddr))); -} - -static void -_powerpc64_freevtop(kvm_t *kd) -{ - struct vmstate *vm = kd->vmst; - - if (vm->eh != MAP_FAILED) - munmap(vm->eh, vm->mapsz); - free(vm); - kd->vmst = NULL; -} - -static int -_powerpc64_probe(kvm_t *kd) -{ - - return (_kvm_probe_elf_kernel(kd, ELFCLASS64, EM_PPC64) && - kd->nlehdr.e_ident[EI_DATA] == ELFDATA2MSB); -} - -static int -_powerpc64le_probe(kvm_t *kd) -{ - - return (_kvm_probe_elf_kernel(kd, ELFCLASS64, EM_PPC64) && - kd->nlehdr.e_ident[EI_DATA] == ELFDATA2LSB); -} - -static int -_powerpc64_initvtop(kvm_t *kd) -{ - - kd->vmst = (struct vmstate *)_kvm_malloc(kd, sizeof(*kd->vmst)); - if (kd->vmst == NULL) - return (-1); - - if (powerpc_maphdrs(kd) == -1) - return (-1); - - return (0); -} - -static int -_powerpc64_kvatop(kvm_t *kd, kvaddr_t va, off_t *ofs) -{ - struct vmstate *vm; - - vm = kd->vmst; - if (_kvm64toh(kd, vm->ph->p_paddr) == 0xffffffffffffffff) - return ((int)powerpc64_va2off(kd, va, ofs)); - - _kvm_err(kd, kd->program, "Raw corefile not supported"); - return (0); -} - -static int -_powerpc64_native(kvm_t *kd __unused) -{ - -#if defined(__powerpc64__) && BYTE_ORDER == BIG_ENDIAN - return (1); -#else - return (0); -#endif -} - -static int -_powerpc64le_native(kvm_t *kd __unused) -{ - -#if defined(__powerpc64__) && BYTE_ORDER == LITTLE_ENDIAN - return (1); -#else - return (0); -#endif -} - -static struct kvm_arch kvm_powerpc64 = { - .ka_probe = _powerpc64_probe, - .ka_initvtop = _powerpc64_initvtop, - .ka_freevtop = _powerpc64_freevtop, - .ka_kvatop = _powerpc64_kvatop, - .ka_native = _powerpc64_native, -}; - -static struct kvm_arch kvm_powerpc64le = { - .ka_probe = _powerpc64le_probe, - .ka_initvtop = _powerpc64_initvtop, - .ka_freevtop = _powerpc64_freevtop, - .ka_kvatop = _powerpc64_kvatop, - .ka_native = _powerpc64le_native, -}; - -KVM_ARCH(kvm_powerpc64); -KVM_ARCH(kvm_powerpc64le); diff --git a/lib/libkvm/kvm_powerpc64.h b/lib/libkvm/kvm_powerpc64.h deleted file mode 100644 index efd7ce0d3e7..00000000000 --- a/lib/libkvm/kvm_powerpc64.h +++ /dev/null @@ -1,79 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2019 Leandro Lupori - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef __KVM_POWERPC64_H__ -#define __KVM_POWERPC64_H__ - -/* Debug stuff */ -#define KVM_PPC64_DBG 0 -#if KVM_PPC64_DBG -#include -#define dprintf(fmt, ...) printf(fmt, ## __VA_ARGS__) -#else -#define dprintf(fmt, ...) -#endif - - -#define PPC64_KERNBASE 0x100100ULL - -/* Page params */ -#define PPC64_PAGE_SHIFT 12 -#define PPC64_PAGE_SIZE (1ULL << PPC64_PAGE_SHIFT) -#define PPC64_PAGE_MASK (PPC64_PAGE_SIZE - 1) - -#define ppc64_round_page(x) roundup2((kvaddr_t)(x), PPC64_PAGE_SIZE) - -#define PPC64_MMU_G5 "mmu_g5" -#define PPC64_MMU_PHYP "mmu_phyp" - -/* MMU interface */ -#define PPC64_MMU_OPS(kd) (kd)->vmst->mmu.ops -#define PPC64_MMU_OP(kd, op, ...) PPC64_MMU_OPS(kd)->op((kd), ## __VA_ARGS__) -#define PPC64_MMU_DATA(kd) (kd)->vmst->mmu.data - -struct ppc64_mmu_ops { - int (*init)(kvm_t *); - void (*cleanup)(kvm_t *); - int (*kvatop)(kvm_t *, kvaddr_t, off_t *); - int (*walk_pages)(kvm_t *, kvm_walk_pages_cb_t *, void *); -}; - -struct ppc64_mmu { - struct ppc64_mmu_ops *ops; - void *data; -}; - -struct vmstate { - struct minidumphdr hdr; - uint64_t kimg_start; - uint64_t kimg_end; - struct ppc64_mmu mmu; -}; - -extern struct ppc64_mmu_ops *ppc64_mmu_ops_hpt; - -#endif /* !__KVM_POWERPC64_H__ */ diff --git a/lib/libkvm/kvm_private.c b/lib/libkvm/kvm_private.c index dbbe68437b4..a44154f796a 100644 --- a/lib/libkvm/kvm_private.c +++ b/lib/libkvm/kvm_private.c @@ -147,15 +147,6 @@ _kvm_is_minidump(kvm_t *kd) return (1); return (0); } - -/* - * The powerpc backend has a hack to strip a leading kerneldump - * header from the core before treating it as an ELF header. - * - * We can add that here if we can get a change to libelf to support - * an initial offset into the file. Alternatively we could patch - * savecore to extract cores from a regular file instead. - */ int _kvm_read_core_phdrs(kvm_t *kd, size_t *phnump, GElf_Phdr **phdrp) { diff --git a/lib/libpmc/Makefile b/lib/libpmc/Makefile index e3a09624655..2330b324446 100644 --- a/lib/libpmc/Makefile +++ b/lib/libpmc/Makefile @@ -10,8 +10,6 @@ CFLAGS+= -I${SRCTOP}/${RELDIR:H}/libpmcstat EVENT_ARCH="arm64" .elif ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" EVENT_ARCH="x86" -.elif ${MACHINE_CPUARCH} == "powerpc" && ${MACHINE_ARCH:Mpowerpc64*} != "" -EVENT_ARCH="powerpc" .else # This will generate an empty events table EVENT_ARCH="none" @@ -79,8 +77,6 @@ MAN+= pmc.ivybridge.3 MAN+= pmc.ivybridgexeon.3 MAN+= pmc.k7.3 MAN+= pmc.k8.3 -MAN+= pmc.mips24k.3 -MAN+= pmc.octeon.3 MAN+= pmc.sandybridge.3 MAN+= pmc.sandybridgeuc.3 MAN+= pmc.sandybridgexeon.3 diff --git a/lib/libpmc/libpmc.c b/lib/libpmc/libpmc.c index b2ef468929e..482e4314cd8 100644 --- a/lib/libpmc/libpmc.c +++ b/lib/libpmc/libpmc.c @@ -65,17 +65,9 @@ static int armv7_allocate_pmc(enum pmc_event _pe, char *_ctrspec, static int arm64_allocate_pmc(enum pmc_event _pe, char *_ctrspec, struct pmc_op_pmcallocate *_pmc_config); #endif -#if defined(__mips__) -static int mips_allocate_pmc(enum pmc_event _pe, char* ctrspec, - struct pmc_op_pmcallocate *_pmc_config); -#endif /* __mips__ */ static int soft_allocate_pmc(enum pmc_event _pe, char *_ctrspec, struct pmc_op_pmcallocate *_pmc_config); -#if defined(__powerpc__) -static int powerpc_allocate_pmc(enum pmc_event _pe, char* ctrspec, - struct pmc_op_pmcallocate *_pmc_config); -#endif /* __powerpc__ */ #define PMC_CALL(op, params) syscall(pmc_syscall, (op), (params)) @@ -136,14 +128,6 @@ PMC_CLASSDEP_TABLE(iaf, IAF); PMC_CLASSDEP_TABLE(k8, K8); PMC_CLASSDEP_TABLE(armv7, ARMV7); PMC_CLASSDEP_TABLE(armv8, ARMV8); -PMC_CLASSDEP_TABLE(beri, BERI); -PMC_CLASSDEP_TABLE(mips24k, MIPS24K); -PMC_CLASSDEP_TABLE(mips74k, MIPS74K); -PMC_CLASSDEP_TABLE(octeon, OCTEON); -PMC_CLASSDEP_TABLE(ppc7450, PPC7450); -PMC_CLASSDEP_TABLE(ppc970, PPC970); -PMC_CLASSDEP_TABLE(power8, POWER8); -PMC_CLASSDEP_TABLE(e500, E500); static struct pmc_event_descr soft_event_table[PMC_EV_DYN_COUNT]; @@ -218,18 +202,6 @@ PMC_CLASS_TABLE_DESC(cortex_a53, ARMV8, cortex_a53, arm64); PMC_CLASS_TABLE_DESC(cortex_a57, ARMV8, cortex_a57, arm64); PMC_CLASS_TABLE_DESC(cortex_a76, ARMV8, cortex_a76, arm64); #endif -#if defined(__mips__) -PMC_CLASS_TABLE_DESC(beri, BERI, beri, mips); -PMC_CLASS_TABLE_DESC(mips24k, MIPS24K, mips24k, mips); -PMC_CLASS_TABLE_DESC(mips74k, MIPS74K, mips74k, mips); -PMC_CLASS_TABLE_DESC(octeon, OCTEON, octeon, mips); -#endif /* __mips__ */ -#if defined(__powerpc__) -PMC_CLASS_TABLE_DESC(ppc7450, PPC7450, ppc7450, powerpc); -PMC_CLASS_TABLE_DESC(ppc970, PPC970, ppc970, powerpc); -PMC_CLASS_TABLE_DESC(power8, POWER8, power8, powerpc); -PMC_CLASS_TABLE_DESC(e500, E500, e500, powerpc); -#endif static struct pmc_class_descr soft_class_table_descr = { @@ -797,121 +769,6 @@ arm64_allocate_pmc(enum pmc_event pe, char *ctrspec, } #endif -#if defined(__mips__) - -static struct pmc_event_alias beri_aliases[] = { - EV_ALIAS("instructions", "INST"), - EV_ALIAS(NULL, NULL) -}; - -static struct pmc_event_alias mips24k_aliases[] = { - EV_ALIAS("instructions", "INSTR_EXECUTED"), - EV_ALIAS("branches", "BRANCH_COMPLETED"), - EV_ALIAS("branch-mispredicts", "BRANCH_MISPRED"), - EV_ALIAS(NULL, NULL) -}; - -static struct pmc_event_alias mips74k_aliases[] = { - EV_ALIAS("instructions", "INSTR_EXECUTED"), - EV_ALIAS("branches", "BRANCH_INSNS"), - EV_ALIAS("branch-mispredicts", "MISPREDICTED_BRANCH_INSNS"), - EV_ALIAS(NULL, NULL) -}; - -static struct pmc_event_alias octeon_aliases[] = { - EV_ALIAS("instructions", "RET"), - EV_ALIAS("branches", "BR"), - EV_ALIAS("branch-mispredicts", "BRMIS"), - EV_ALIAS(NULL, NULL) -}; - -#define MIPS_KW_OS "os" -#define MIPS_KW_USR "usr" -#define MIPS_KW_ANYTHREAD "anythread" - -static int -mips_allocate_pmc(enum pmc_event pe, char *ctrspec __unused, - struct pmc_op_pmcallocate *pmc_config __unused) -{ - char *p; - - (void) pe; - - pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE); - - while ((p = strsep(&ctrspec, ",")) != NULL) { - if (KWMATCH(p, MIPS_KW_OS)) - pmc_config->pm_caps |= PMC_CAP_SYSTEM; - else if (KWMATCH(p, MIPS_KW_USR)) - pmc_config->pm_caps |= PMC_CAP_USER; - else if (KWMATCH(p, MIPS_KW_ANYTHREAD)) - pmc_config->pm_caps |= (PMC_CAP_USER | PMC_CAP_SYSTEM); - else - return (-1); - } - - return (0); -} - -#endif /* __mips__ */ - -#if defined(__powerpc__) - -static struct pmc_event_alias ppc7450_aliases[] = { - EV_ALIAS("instructions", "INSTR_COMPLETED"), - EV_ALIAS("branches", "BRANCHES_COMPLETED"), - EV_ALIAS("branch-mispredicts", "MISPREDICTED_BRANCHES"), - EV_ALIAS(NULL, NULL) -}; - -static struct pmc_event_alias ppc970_aliases[] = { - EV_ALIAS("instructions", "INSTR_COMPLETED"), - EV_ALIAS("cycles", "CYCLES"), - EV_ALIAS(NULL, NULL) -}; - -static struct pmc_event_alias power8_aliases[] = { - EV_ALIAS("instructions", "INSTR_COMPLETED"), - EV_ALIAS("cycles", "CYCLES"), - EV_ALIAS(NULL, NULL) -}; - -static struct pmc_event_alias e500_aliases[] = { - EV_ALIAS("instructions", "INSTR_COMPLETED"), - EV_ALIAS("cycles", "CYCLES"), - EV_ALIAS(NULL, NULL) -}; - -#define POWERPC_KW_OS "os" -#define POWERPC_KW_USR "usr" -#define POWERPC_KW_ANYTHREAD "anythread" - -static int -powerpc_allocate_pmc(enum pmc_event pe, char *ctrspec __unused, - struct pmc_op_pmcallocate *pmc_config __unused) -{ - char *p; - - (void) pe; - - pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE); - - while ((p = strsep(&ctrspec, ",")) != NULL) { - if (KWMATCH(p, POWERPC_KW_OS)) - pmc_config->pm_caps |= PMC_CAP_SYSTEM; - else if (KWMATCH(p, POWERPC_KW_USR)) - pmc_config->pm_caps |= PMC_CAP_USER; - else if (KWMATCH(p, POWERPC_KW_ANYTHREAD)) - pmc_config->pm_caps |= (PMC_CAP_USER | PMC_CAP_SYSTEM); - else - return (-1); - } - - return (0); -} - -#endif /* __powerpc__ */ - /* * Match an event name `name' with its canonical form. @@ -1240,38 +1097,6 @@ pmc_event_names_of_class(enum pmc_class cl, const char ***eventnames, break; } break; - case PMC_CLASS_BERI: - ev = beri_event_table; - count = PMC_EVENT_TABLE_SIZE(beri); - break; - case PMC_CLASS_MIPS24K: - ev = mips24k_event_table; - count = PMC_EVENT_TABLE_SIZE(mips24k); - break; - case PMC_CLASS_MIPS74K: - ev = mips74k_event_table; - count = PMC_EVENT_TABLE_SIZE(mips74k); - break; - case PMC_CLASS_OCTEON: - ev = octeon_event_table; - count = PMC_EVENT_TABLE_SIZE(octeon); - break; - case PMC_CLASS_PPC7450: - ev = ppc7450_event_table; - count = PMC_EVENT_TABLE_SIZE(ppc7450); - break; - case PMC_CLASS_PPC970: - ev = ppc970_event_table; - count = PMC_EVENT_TABLE_SIZE(ppc970); - break; - case PMC_CLASS_POWER8: - ev = power8_event_table; - count = PMC_EVENT_TABLE_SIZE(power8); - break; - case PMC_CLASS_E500: - ev = e500_event_table; - count = PMC_EVENT_TABLE_SIZE(e500); - break; case PMC_CLASS_SOFT: ev = soft_event_table; count = soft_event_info.pm_nevent; @@ -1458,42 +1283,6 @@ pmc_init(void) PMC_MDEP_INIT(cortex_a76); pmc_class_table[n] = &cortex_a76_class_table_descr; break; -#endif -#if defined(__mips__) - case PMC_CPU_MIPS_BERI: - PMC_MDEP_INIT(beri); - pmc_class_table[n] = &beri_class_table_descr; - break; - case PMC_CPU_MIPS_24K: - PMC_MDEP_INIT(mips24k); - pmc_class_table[n] = &mips24k_class_table_descr; - break; - case PMC_CPU_MIPS_74K: - PMC_MDEP_INIT(mips74k); - pmc_class_table[n] = &mips74k_class_table_descr; - break; - case PMC_CPU_MIPS_OCTEON: - PMC_MDEP_INIT(octeon); - pmc_class_table[n] = &octeon_class_table_descr; - break; -#endif /* __mips__ */ -#if defined(__powerpc__) - case PMC_CPU_PPC_7450: - PMC_MDEP_INIT(ppc7450); - pmc_class_table[n] = &ppc7450_class_table_descr; - break; - case PMC_CPU_PPC_970: - PMC_MDEP_INIT(ppc970); - pmc_class_table[n] = &ppc970_class_table_descr; - break; - case PMC_CPU_PPC_POWER8: - PMC_MDEP_INIT(power8); - pmc_class_table[n] = &power8_class_table_descr; - break; - case PMC_CPU_PPC_E500: - PMC_MDEP_INIT(e500); - pmc_class_table[n] = &e500_class_table_descr; - break; #endif default: /* @@ -1607,30 +1396,6 @@ _pmc_name_of_event(enum pmc_event pe, enum pmc_cputype cpu) default: /* Unknown CPU type. */ break; } - } else if (pe >= PMC_EV_BERI_FIRST && pe <= PMC_EV_BERI_LAST) { - ev = beri_event_table; - evfence = beri_event_table + PMC_EVENT_TABLE_SIZE(beri); - } else if (pe >= PMC_EV_MIPS24K_FIRST && pe <= PMC_EV_MIPS24K_LAST) { - ev = mips24k_event_table; - evfence = mips24k_event_table + PMC_EVENT_TABLE_SIZE(mips24k); - } else if (pe >= PMC_EV_MIPS74K_FIRST && pe <= PMC_EV_MIPS74K_LAST) { - ev = mips74k_event_table; - evfence = mips74k_event_table + PMC_EVENT_TABLE_SIZE(mips74k); - } else if (pe >= PMC_EV_OCTEON_FIRST && pe <= PMC_EV_OCTEON_LAST) { - ev = octeon_event_table; - evfence = octeon_event_table + PMC_EVENT_TABLE_SIZE(octeon); - } else if (pe >= PMC_EV_PPC7450_FIRST && pe <= PMC_EV_PPC7450_LAST) { - ev = ppc7450_event_table; - evfence = ppc7450_event_table + PMC_EVENT_TABLE_SIZE(ppc7450); - } else if (pe >= PMC_EV_PPC970_FIRST && pe <= PMC_EV_PPC970_LAST) { - ev = ppc970_event_table; - evfence = ppc970_event_table + PMC_EVENT_TABLE_SIZE(ppc970); - } else if (pe >= PMC_EV_POWER8_FIRST && pe <= PMC_EV_POWER8_LAST) { - ev = power8_event_table; - evfence = power8_event_table + PMC_EVENT_TABLE_SIZE(power8); - } else if (pe >= PMC_EV_E500_FIRST && pe <= PMC_EV_E500_LAST) { - ev = e500_event_table; - evfence = e500_event_table + PMC_EVENT_TABLE_SIZE(e500); } else if (pe == PMC_EV_TSC_TSC) { ev = tsc_event_table; evfence = tsc_event_table + PMC_EVENT_TABLE_SIZE(tsc); diff --git a/lib/libpmc/pmc.3 b/lib/libpmc/pmc.3 index e9022fedfd4..7c6652ec790 100644 --- a/lib/libpmc/pmc.3 +++ b/lib/libpmc/pmc.3 @@ -485,8 +485,6 @@ Doing otherwise is unsupported. .Xr pmc.ivybridgexeon 3 , .Xr pmc.k7 3 , .Xr pmc.k8 3 , -.Xr pmc.mips24k 3 , -.Xr pmc.octeon 3 , .Xr pmc.sandybridge 3 , .Xr pmc.sandybridgeuc 3 , .Xr pmc.sandybridgexeon 3 , diff --git a/lib/libpmc/pmc.mips24k.3 b/lib/libpmc/pmc.mips24k.3 deleted file mode 100644 index d33c4baf49c..00000000000 --- a/lib/libpmc/pmc.mips24k.3 +++ /dev/null @@ -1,407 +0,0 @@ -.\" Copyright (c) 2010 George Neville-Neil. All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -.\" SUCH DAMAGE. -.\" -.Dd March 24, 2012 -.Dt PMC.MIPS24K 3 -.Os -.Sh NAME -.Nm pmc.mips24k -.Nd measurement events for -.Tn MIPS24K -family CPUs -.Sh LIBRARY -.Lb libpmc -.Sh SYNOPSIS -.In pmc.h -.Sh DESCRIPTION -MIPS PMCs are present in MIPS -.Tn "24k" -and other processors in the MIPS family. -.Pp -There are two counters supported by the hardware and each is 32 bits -wide. -.Pp -MIPS PMCs are documented in -.Rs -.%B "MIPS32 24K Processor Core Family Software User's Manual" -.%D December 2008 -.%Q "MIPS Technologies Inc." -.Re -.Ss Event Specifiers (Programmable PMCs) -MIPS programmable PMCs support the following events: -.Bl -tag -width indent -.It Li CYCLE -.Pq Event 0, Counter 0/1 -Total number of cycles. -The performance counters are clocked by the -top-level gated clock. -If the core is built with that clock gater -present, none of the counters will increment while the clock is -stopped - due to a WAIT instruction. -.It Li INSTR_EXECUTED -.Pq Event 1, Counter 0/1 -Total number of instructions completed. -.It Li BRANCH_COMPLETED -.Pq Event 2, Counter 0 -Total number of branch instructions completed. -.It Li BRANCH_MISPRED -.Pq Event 2, Counter 1 -Counts all branch instructions which completed, but were mispredicted. -.It Li RETURN -.Pq Event 3, Counter 0 -Counts all JR R31 instructions completed. -.It Li RETURN_MISPRED -.Pq Event 3, Counter 1 -Counts all JR $31 instructions which completed, used the RPS for a prediction, but were mispredicted. -.It Li RETURN_NOT_31 -.Pq Event 4, Counter 0 -Counts all JR $xx (not $31) and JALR instructions (indirect jumps). -.It Li RETURN_NOTPRED -.Pq Event 4, Counter 1 -If RPS use is disabled, JR $31 will not be predicted. -.It Li ITLB_ACCESS -.Pq Event 5, Counter 0 -Counts ITLB accesses that are due to fetches showing up in the -instruction fetch stage of the pipeline and which do not use a fixed -mapping or are not in unmapped space. -If an address is fetched twice from the pipe (as in the case of a -cache miss), that instruction willcount as 2 ITLB accesses. -Since each fetch gets us 2 instructions,there is one access marked per double -word. -.It Li ITLB_MISS -.Pq Event 5, Counter 1 -Counts all misses in the ITLB except ones that are on the back of another -miss. -We cannot process back to back misses and thus those are -ignored. -They are also ignored if there is some form of address error. -.It Li DTLB_ACCESS -.Pq Event 6, Counter 0 -Counts DTLB access including those in unmapped address spaces. -.It Li DTLB_MISS -.Pq Event 6, Counter 1 -Counts DTLB misses. -Back to back misses that result in only one DTLB -entry getting refilled are counted as a single miss. -.It Li JTLB_IACCESS -.Pq Event 7, Counter 0 -Instruction JTLB accesses are counted exactly the same as ITLB misses. -.It Li JTLB_IMISS -.Pq Event 7, Counter 1 -Counts instruction JTLB accesses that result in no match or a match on -an invalid translation. -.It Li JTLB_DACCESS -.Pq Event 8, Counter 0 -Data JTLB accesses. -.It Li JTLB_DMISS -.Pq Event 8, Counter 1 -Counts data JTLB accesses that result in no match or a match on an invalid translation. -.It Li IC_FETCH -.Pq Event 9, Counter 0 -Counts every time the instruction cache is accessed. -All replays, -wasted fetches etc. are counted. -For example, following a branch, even though the prediction is taken, -the fall through access is counted. -.It Li IC_MISS -.Pq Event 9, Counter 1 -Counts all instruction cache misses that result in a bus request. -.It Li DC_LOADSTORE -.Pq Event 10, Counter 0 -Counts cached loads and stores. -.It Li DC_WRITEBACK -.Pq Event 10, Counter 1 -Counts cache lines written back to memory due to replacement or cacheops. -.It Li DC_MISS -.Pq Event 11, Counter 0/1 -Counts loads and stores that miss in the cache -.It Li LOAD_MISS -.Pq Event 13, Counter 0 -Counts number of cacheable loads that miss in the cache. -.It Li STORE_MISS -.Pq Event 13, Counter 1 -Counts number of cacheable stores that miss in the cache. -.It Li INTEGER_COMPLETED -.Pq Event 14, Counter 0 -Non-floating point, non-Coprocessor 2 instructions. -.It Li FP_COMPLETED -.Pq Event 14, Counter 1 -Floating point instructions completed. -.It Li LOAD_COMPLETED -.Pq Event 15, Counter 0 -Integer and co-processor loads completed. -.It Li STORE_COMPLETED -.Pq Event 15, Counter 1 -Integer and co-processor stores completed. -.It Li BARRIER_COMPLETED -.Pq Event 16, Counter 0 -Direct jump (and link) instructions completed. -.It Li MIPS16_COMPLETED -.Pq Event 16, Counter 1 -MIPS16c instructions completed. -.It Li NOP_COMPLETED -.Pq Event 17, Counter 0 -NOPs completed. -This includes all instructions that normally write to a general -purpose register, but where the destination register was set to r0. -.It Li INTEGER_MULDIV_COMPLETED -.Pq Event 17, Counter 1 -Integer multiply and divide instructions completed. (MULxx, DIVx, MADDx, MSUBx). -.It Li RF_STALL -.Pq Event 18, Counter 0 -Counts the total number of cycles where no instructions are issued -from the IFU to ALU (the RF stage does not advance) which includes -both of the previous two events. -The RT_STALL is different than the sum of them though because cycles -when both stalls are active will only be counted once. -.It Li INSTR_REFETCH -.Pq Event 18, Counter 1 -replay traps (other than uTLB) -.It Li STORE_COND_COMPLETED -.Pq Event 19, Counter 0 -Conditional stores completed. -Counts all events, including failed stores. -.It Li STORE_COND_FAILED -.Pq Event 19, Counter 1 -Conditional store instruction that did not update memory. -Note: While this event and the SC instruction count event can be configured to -count in specific operating modes, the timing of the events is much -different and the observed operating mode could change between them, -causing some inaccuracy in the measured ratio. -.It Li ICACHE_REQUESTS -.Pq Event 20, Counter 0 -Note that this only counts PREFs that are actually attempted. -PREFs to uncached addresses or ones with translation errors are not counted -.It Li ICACHE_HIT -.Pq Event 20, Counter 1 -Counts PREF instructions that hit in the cache -.It Li L2_WRITEBACK -.Pq Event 21, Counter 0 -Counts cache lines written back to memory due to replacement or cacheops. -.It Li L2_ACCESS -.Pq Event 21, Counter 1 -Number of accesses to L2 Cache. -.It Li L2_MISS -.Pq Event 22, Counter 0 -Number of accesses that missed in the L2 cache. -.It Li L2_ERR_CORRECTED -.Pq Event 22, Counter 1 -Single bit errors in L2 Cache that were detected and corrected. -.It Li EXCEPTIONS -.Pq Event 23, Counter 0 -Any type of exception taken. -.It Li RF_CYCLES_STALLED -.Pq Event 24, Counter 0 -Counts cycles where the LSU is in fixup and cannot accept a new -instruction from the ALU. -Fixups are replays within the LSU that occur when an instruction needs -to re-access the cache or the DTLB. -.It Li IFU_CYCLES_STALLED -.Pq Event 25, Counter 0 -Counts the number of cycles where the fetch unit is not providing a -valid instruction to the ALU. -.It Li ALU_CYCLES_STALLED -.Pq Event 25, Counter 1 -Counts the number of cycles where the ALU pipeline cannot advance. -.It Li UNCACHED_LOAD -.Pq Event 33, Counter 0 -Counts uncached and uncached accelerated loads. -.It Li UNCACHED_STORE -.Pq Event 33, Counter 1 -Counts uncached and uncached accelerated stores. -.It Li CP2_REG_TO_REG_COMPLETED -.Pq Event 35, Counter 0 -Co-processor 2 register to register instructions completed. -.It Li MFTC_COMPLETED -.Pq Event 35, Counter 1 -Co-processor 2 move to and from instructions as well as loads and stores. -.It Li IC_BLOCKED_CYCLES -.Pq Event 37, Counter 0 -Cycles when IFU stalls because an instruction miss caused the IFU not -to have any runnable instructions. -Ignores the stalls due to ITLB misses as well as the 4 cycles -following a redirect. -.It Li DC_BLOCKED_CYCLES -.Pq Event 37, Counter 1 -Counts all cycles where integer pipeline waits on Load return data due -to a D-cache miss. -The LSU can signal a "long stall" on a D-cache misses, in which case -the waiting TC might be rescheduled so other TCs can execute -instructions till the data returns. -.It Li L2_IMISS_STALL_CYCLES -.Pq Event 38, Counter 0 -Cycles where the main pipeline is stalled waiting for a SYNC to complete. -.It Li L2_DMISS_STALL_CYCLES -.Pq Event 38, Counter 1 -Cycles where the main pipeline is stalled because of an index conflict -in the Fill Store Buffer. -.It Li DMISS_CYCLES -.Pq Event 39, Counter 0 -Data miss is outstanding, but not necessarily stalling the pipeline. -The difference between this and D$ miss stall cycles can show the gain -from non-blocking cache misses. -.It Li L2_MISS_CYCLES -.Pq Event 39, Counter 1 -L2 miss is outstanding, but not necessarily stalling the pipeline. -.It Li UNCACHED_BLOCK_CYCLES -.Pq Event 40, Counter 0 -Cycles where the processor is stalled on an uncached fetch, load, or store. -.It Li MDU_STALL_CYCLES -.Pq Event 41, Counter 0 -Cycles where the processor is stalled on an uncached fetch, load, or store. -.It Li FPU_STALL_CYCLES -.Pq Event 41, Counter 1 -Counts all cycles where integer pipeline waits on FPU return data. -.It Li CP2_STALL_CYCLES -.Pq Event 42, Counter 0 -Counts all cycles where integer pipeline waits on CP2 return data. -.It Li COREXTEND_STALL_CYCLES -.Pq Event 42, Counter 1 -Counts all cycles where integer pipeline waits on CorExtend return data. -.It Li ISPRAM_STALL_CYCLES -.Pq Event 43, Counter 0 -Count all pipeline bubbles that are a result of multicycle ISPRAM -access. -Pipeline bubbles are defined as all cycles that IFU doesn't present an -instruction to ALU. -The four cycles after a redirect are not counted. -.It Li DSPRAM_STALL_CYCLES -.Pq Event 43, Counter 1 -Counts stall cycles created by an instruction waiting for access to DSPRAM. -.It Li CACHE_STALL_CYCLES -.Pq Event 44, Counter 0 -Counts all cycles the where pipeline is stalled due to CACHE -instructions. -Includes cycles where CACHE instructions themselves are -stalled in the ALU, and cycles where CACHE instructions cause -subsequent instructions to be stalled. -.It Li LOAD_TO_USE_STALLS -.Pq Event 45, Counter 0 -Counts all cycles where integer pipeline waits on Load return data. -.It Li BASE_MISPRED_STALLS -.Pq Event 45, Counter 1 -Counts stall cycles due to skewed ALU where the bypass to the address -generation takes an extra cycle. -.It Li CPO_READ_STALLS -.Pq Event 46, Counter 0 -Counts all cycles where integer pipeline waits on return data from -MFC0, RDHWR instructions. -.It Li BRANCH_MISPRED_CYCLES -.Pq Event 46, Counter 1 -This counts the number of cycles from a mispredicted branch until the -next non-delay slot instruction executes. -.It Li IFETCH_BUFFER_FULL -.Pq Event 48, Counter 0 -Counts the number of times an instruction cache miss was detected, but -both fill buffers were already allocated. -.It Li FETCH_BUFFER_ALLOCATED -.Pq Event 48, Counter 1 -Number of cycles where at least one of the IFU fill buffers is -allocated (miss pending). -.It Li EJTAG_ITRIGGER -.Pq Event 49, Counter 0 -Number of times an EJTAG Instruction Trigger Point condition matched. -.It Li EJTAG_DTRIGGER -.Pq Event 49, Counter 1 -Number of times an EJTAG Data Trigger Point condition matched. -.It Li FSB_LT_QUARTER -.Pq Event 50, Counter 0 -Fill store buffer less than one quarter full. -.It Li FSB_QUARTER_TO_HALF -.Pq Event 50, Counter 1 -Fill store buffer between one quarter and one half full. -.It Li FSB_GT_HALF -.Pq Event 51, Counter 0 -Fill store buffer more than half full. -.It Li FSB_FULL_PIPELINE_STALLS -.Pq Event 51, Counter 1 -Cycles where the pipeline is stalled because the Fill-Store Buffer in LSU is full. -.It Li LDQ_LT_QUARTER -.Pq Event 52, Counter 0 -Load data queue less than one quarter full. -.It Li LDQ_QUARTER_TO_HALF -.Pq Event 52, Counter 1 -Load data queue between one quarter and one half full. -.It Li LDQ_GT_HALF -.Pq Event 53, Counter 0 -Load data queue more than one half full. -.It Li LDQ_FULL_PIPELINE_STALLS -.Pq Event 53, Counter 1 -Cycles where the pipeline is stalled because the Load Data Queue in the LSU is full. -.It Li WBB_LT_QUARTER -.Pq Event 54, Counter 0 -Write back buffer less than one quarter full. -.It Li WBB_QUARTER_TO_HALF -.Pq Event 54, Counter 1 -Write back buffer between one quarter and one half full. -.It Li WBB_GT_HALF -.Pq Event 55, Counter 0 -Write back buffer more than one half full. -.It Li WBB_FULL_PIPELINE_STALLS -.Pq Event 55 Counter 1 -Cycles where the pipeline is stalled because the Load Data Queue in the LSU is full. -.It Li REQUEST_LATENCY -.Pq Event 61, Counter 0 -Measures latency from miss detection until critical dword of response -is returned, Only counts for cacheable reads. -.It Li REQUEST_COUNT -.Pq Event 61, Counter 1 -Counts number of cacheable read requests used for previous latency counter. -.El -.Ss Event Name Aliases -The following table shows the mapping between the PMC-independent -aliases supported by -.Lb libpmc -and the underlying hardware events used. -.Bl -column "branch-mispredicts" "cpu_clk_unhalted.core_p" -.It Em Alias Ta Em Event -.It Li instructions Ta Li INSTR_EXECUTED -.It Li branches Ta Li BRANCH_COMPLETED -.It Li branch-mispredicts Ta Li BRANCH_MISPRED -.El -.Sh SEE ALSO -.Xr pmc 3 , -.Xr pmc.atom 3 , -.Xr pmc.core 3 , -.Xr pmc.iaf 3 , -.Xr pmc.k7 3 , -.Xr pmc.k8 3 , -.Xr pmc.octeon 3 , -.Xr pmc.soft 3 , -.Xr pmc.tsc 3 , -.Xr pmc_cpuinfo 3 , -.Xr pmclog 3 , -.Xr hwpmc 4 -.Sh HISTORY -The -.Nm pmc -library first appeared in -.Fx 6.0 . -.Sh AUTHORS -.An -nosplit -The -.Lb libpmc -library was written by -.An Joseph Koshy Aq Mt jkoshy@FreeBSD.org . -MIPS support was added by -.An George Neville-Neil Aq Mt gnn@FreeBSD.org . diff --git a/lib/libpmc/pmc.octeon.3 b/lib/libpmc/pmc.octeon.3 deleted file mode 100644 index c77d702948e..00000000000 --- a/lib/libpmc/pmc.octeon.3 +++ /dev/null @@ -1,247 +0,0 @@ -.\" Copyright (c) 2010 George Neville-Neil. All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -.\" SUCH DAMAGE. -.\" -.Dd March 24, 2012 -.Dt PMC.OCTEON 3 -.Os -.Sh NAME -.Nm pmc.octeon -.Nd measurement events for -.Tn Octeon -family CPUs -.Sh LIBRARY -.Lb libpmc -.Sh SYNOPSIS -.In pmc.h -.Sh DESCRIPTION -There are two counters per core supported by the hardware and each is 64 bits -wide. -.Ss Event Specifiers (Programmable PMCs) -MIPS programmable PMCs support the following events: -.Bl -tag -width indent -.It Li CLK -.Pq Event 1 -Conditionally clocked cycles (as opposed to count/cvm_count which count even with no clocks) -.It Li ISSUE -.Pq Event 2 -Instructions issued but not retired -.It Li RET -.Pq Event 3 -Instructions retired -.It Li NISSUE -.Pq Event 4 -Cycles no issue -.It Li SISSUE -.Pq Event 5 -Cycles single issue -.It Li DISSUE -.Pq Event 6 -Cycles dual issue -.It Li IFI -.Pq Event 7 -Cycle ifetch issued (but not necessarily commit to pp_mem) -.It Li BR -.Pq Event 8 -Branches retired -.It Li BRMIS -.Pq Event 9 -Branch mispredicts -.It Li J -.Pq Event 10 -Jumps retired -.It Li JMIS -.Pq Event 11 -Jumps mispredicted -.It Li REPLAY -.Pq Event 12 -Mem Replays -.It Li IUNA -.Pq Event 13 -Cycles idle due to unaligned_replays -.It Li TRAP -.Pq Event 14 -trap_6a signal -.It Li UULOAD -.Pq Event 16 -Unexpected unaligned loads (REPUN=1) -.It Li UUSTORE -.Pq Event 17 -Unexpected unaligned store (REPUN=1) -.It Li ULOAD -.Pq Event 18 -Unaligned loads (REPUN=1 or USEUN=1) -.It Li USTORE -.Pq Event 19 -Unaligned store (REPUN=1 or USEUN=1) -.It Li EC -.Pq Event 20 -Exec clocks(must set CvmCtl[DISCE] for accurate timing) -.It Li MC -.Pq Event 21 -Mul clocks(must set CvmCtl[DISCE] for accurate timing) -.It Li CC -.Pq Event 22 -Crypto clocks(must set CvmCtl[DISCE] for accurate timing) -.It Li CSRC -.Pq Event 23 -Issue_csr clocks(must set CvmCtl[DISCE] for accurate timing) -.It Li CFETCH -.Pq Event 24 -Icache committed fetches (demand+prefetch) -.It Li CPREF -.Pq Event 25 -Icache committed prefetches -.It Li ICA -.Pq Event 26 -Icache aliases -.It Li II -.Pq Event 27 -Icache invalidates -.It Li IP -.Pq Event 28 -Icache parity error -.It Li CIMISS -.Pq Event 29 -Cycles idle due to imiss (must set CvmCtl[DISCE] for accurate timing) -.It Li WBUF -.Pq Event 32 -Number of write buffer entries created -.It Li WDAT -.Pq Event 33 -Number of write buffer data cycles used (may need to set CvmCtl[DISCE] for accurate counts) -.It Li WBUFLD -.Pq Event 34 -Number of write buffer entries forced out by loads -.It Li WBUFFL -.Pq Event 35 -Number of cycles that there was no available write buffer entry (may need to set CvmCtl[DISCE] and CvmMemCtl[MCLK] for accurate counts) -.It Li WBUFTR -.Pq Event 36 -Number of stores that found no available write buffer entries -.It Li BADD -.Pq Event 37 -Number of address bus cycles used (may need to set CvmCtl[DISCE] for accurate counts) -.It Li BADDL2 -.Pq Event 38 -Number of address bus cycles not reflected (i.e. destined for L2) (may need to set CvmCtl[DISCE] for accurate counts) -.It Li BFILL -.Pq Event 39 -Number of fill bus cycles used (may need to set CvmCtl[DISCE] for accurate counts) -.It Li DDIDS -.Pq Event 40 -Number of Dstream DIDs created -.It Li IDIDS -.Pq Event 41 -Number of Istream DIDs created -.It Li DIDNA -.Pq Event 42 -Number of cycles that no DIDs were available (may need to set CvmCtl[DISCE] and CvmMemCtl[MCLK] for accurate counts) -.It Li LDS -.Pq Event 43 -Number of load issues -.It Li LMLDS -.Pq Event 44 -Number of local memory load -.It Li IOLDS -.Pq Event 45 -Number of I/O load issues -.It Li DMLDS -.Pq Event 46 -Number of loads that were not prefetches and missed in the cache -.It Li STS -.Pq Event 48 -Number of store issues -.It Li LMSTS -.Pq Event 49 -Number of local memory store issues -.It Li IOSTS -.Pq Event 50 -Number of I/O store issues -.It Li IOBDMA -.Pq Event 51 -Number of IOBDMAs -.It Li DTLB -.Pq Event 53 -Number of dstream TLB refill, invalid, or modified exceptions -.It Li DTLBAD -.Pq Event 54 -Number of dstream TLB address errors -.It Li ITLB -.Pq Event 55 -Number of istream TLB refill, invalid, or address error exceptions -.It Li SYNC -.Pq Event 56 -Number of SYNC stall cycles (may need to set CvmCtl[DISCE] for accurate counts) -.It Li SYNCIOB -.Pq Event 57 -Number of SYNCIOBDMA stall cycles (may need to set CvmCtl[DISCE] for accurate counts) -.It Li SYNCW -.Pq Event 58 -Number of SYNCWs -.It Li ERETMIS -.Pq Event 64 -D/eret mispredicts (CN63XX specific) -.It Li LIKMIS -.Pq Event 65 -Branch likely mispredicts (CN63XX specific) -.It Li HAZTR -.Pq Event 66 -Hazard traps due to *MTC0 to CvmCtl, Perf counter control, EntryHi, or CvmMemCtl registers (CN63XX specific) -.El -.Ss Event Name Aliases -The following table shows the mapping between the PMC-independent -aliases supported by -.Lb libpmc -and the underlying hardware events used. -.Bl -column "branch-mispredicts" "cpu_clk_unhalted.core_p" -.It Em Alias Ta Em Event -.It Li instructions Ta Li RET -.It Li branches Ta Li BR -.It Li branch-mispredicts Ta Li BS -.El -.Sh SEE ALSO -.Xr pmc 3 , -.Xr pmc.atom 3 , -.Xr pmc.core 3 , -.Xr pmc.iaf 3 , -.Xr pmc.k7 3 , -.Xr pmc.k8 3 , -.Xr pmc.mips24k 3 , -.Xr pmc.soft 3 , -.Xr pmc.tsc 3 , -.Xr pmc_cpuinfo 3 , -.Xr pmclog 3 , -.Xr hwpmc 4 -.Sh HISTORY -The -.Nm pmc -library first appeared in -.Fx 6.0 . -.Sh AUTHORS -.An -nosplit -The -.Lb libpmc -library was written by -.An Joseph Koshy Aq Mt jkoshy@FreeBSD.org . -MIPS support was added by -.An George Neville-Neil Aq Mt gnn@FreeBSD.org . diff --git a/lib/libpmc/pmu-events/arch/powerpc/mapfile.csv b/lib/libpmc/pmu-events/arch/powerpc/mapfile.csv deleted file mode 100644 index 229150e7ab7..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/mapfile.csv +++ /dev/null @@ -1,17 +0,0 @@ -# Format: -# PVR,Version,JSON/file/pathname,Type -# -# where -# PVR Processor version -# Version could be used to track version of of JSON file -# but currently unused. -# JSON/file/pathname is the path to JSON file, relative -# to tools/perf/pmu-events/arch/powerpc/. -# Type is core, uncore etc -# -# Multiple PVRs could map to a single JSON file. -# - -# Power8 entries -004[bcd][[:xdigit:]]{4},1,power8,core -004e[[:xdigit:]]{4},1,power9,core diff --git a/lib/libpmc/pmu-events/arch/powerpc/power8/cache.json b/lib/libpmc/pmu-events/arch/powerpc/power8/cache.json deleted file mode 100644 index 6b792b2c87e..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power8/cache.json +++ /dev/null @@ -1,176 +0,0 @@ -[ - { - "EventCode": "0x4c048", - "EventName": "PM_DATA_FROM_DL2L3_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a demand load", - "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x3c048", - "EventName": "PM_DATA_FROM_DL2L3_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a demand load", - "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x3c04c", - "EventName": "PM_DATA_FROM_DL4", - "BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x1c042", - "EventName": "PM_DATA_FROM_L2", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from local core's L2 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x200fe", - "EventName": "PM_DATA_FROM_L2MISS", - "BriefDescription": "Demand LD - L2 Miss (not L2 hit)", - "PublicDescription": "" - }, - { - "EventCode": "0x1c04e", - "EventName": "PM_DATA_FROM_L2MISS_MOD", - "BriefDescription": "The processor's data cache was reloaded from a localtion other than the local core's L2 due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from a localtion other than the local core's L2 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x3c040", - "EventName": "PM_DATA_FROM_L2_DISP_CONFLICT_LDHITST", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit store conflict due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from local core's L2 with load hit store conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x4c040", - "EventName": "PM_DATA_FROM_L2_DISP_CONFLICT_OTHER", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 with dispatch conflict due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from local core's L2 with dispatch conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x2c040", - "EventName": "PM_DATA_FROM_L2_MEPF", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x1c040", - "EventName": "PM_DATA_FROM_L2_NO_CONFLICT", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 without conflict due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from local core's L2 without conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x4c042", - "EventName": "PM_DATA_FROM_L3", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from local core's L3 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x300fe", - "EventName": "PM_DATA_FROM_L3MISS", - "BriefDescription": "Demand LD - L3 Miss (not L2 hit and not L3 hit)", - "PublicDescription": "" - }, - { - "EventCode": "0x4c04e", - "EventName": "PM_DATA_FROM_L3MISS_MOD", - "BriefDescription": "The processor's data cache was reloaded from a localtion other than the local core's L3 due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from a localtion other than the local core's L3 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x3c042", - "EventName": "PM_DATA_FROM_L3_DISP_CONFLICT", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 with dispatch conflict due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from local core's L3 with dispatch conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x2c042", - "EventName": "PM_DATA_FROM_L3_MEPF", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x1c044", - "EventName": "PM_DATA_FROM_L3_NO_CONFLICT", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 without conflict due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from local core's L3 without conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x1c04c", - "EventName": "PM_DATA_FROM_LL4", - "BriefDescription": "The processor's data cache was reloaded from the local chip's L4 cache due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from the local chip's L4 cache due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x4c04a", - "EventName": "PM_DATA_FROM_OFF_CHIP_CACHE", - "BriefDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a demand load", - "PublicDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x1c048", - "EventName": "PM_DATA_FROM_ON_CHIP_CACHE", - "BriefDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to a demand load", - "PublicDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x2c046", - "EventName": "PM_DATA_FROM_RL2L3_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a demand load", - "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x1c04a", - "EventName": "PM_DATA_FROM_RL2L3_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a demand load", - "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x3001a", - "EventName": "PM_DATA_TABLEWALK_CYC", - "BriefDescription": "Tablwalk Cycles (could be 1 or 2 active)", - "PublicDescription": "Data Tablewalk Active" - }, - { - "EventCode": "0x4e04e", - "EventName": "PM_DPTEG_FROM_L3MISS", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a localtion other than the local core's L3 due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0xd094", - "EventName": "PM_DSLB_MISS", - "BriefDescription": "Data SLB Miss - Total of all segment sizes", - "PublicDescription": "Data SLB Miss - Total of all segment sizesData SLB misses" - }, - { - "EventCode": "0x1002c", - "EventName": "PM_L1_DCACHE_RELOADED_ALL", - "BriefDescription": "L1 data cache reloaded for demand or prefetch", - "PublicDescription": "" - }, - { - "EventCode": "0x300f6", - "EventName": "PM_L1_DCACHE_RELOAD_VALID", - "BriefDescription": "DL1 reloaded due to Demand Load", - "PublicDescription": "" - }, - { - "EventCode": "0x3e054", - "EventName": "PM_LD_MISS_L1", - "BriefDescription": "Load Missed L1", - "PublicDescription": "" - }, - { - "EventCode": "0x100ee", - "EventName": "PM_LD_REF_L1", - "BriefDescription": "All L1 D cache load references counted at finish, gated by reject", - "PublicDescription": "Load Ref count combined for all units" - }, - { - "EventCode": "0x300f0", - "EventName": "PM_ST_MISS_L1", - "BriefDescription": "Store Missed L1", - "PublicDescription": "" - } -] diff --git a/lib/libpmc/pmu-events/arch/powerpc/power8/floating-point.json b/lib/libpmc/pmu-events/arch/powerpc/power8/floating-point.json deleted file mode 100644 index 4ef0d01b7f5..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power8/floating-point.json +++ /dev/null @@ -1,14 +0,0 @@ -[ - { - "EventCode": "0x2000e", - "EventName": "PM_FXU_BUSY", - "BriefDescription": "fxu0 busy and fxu1 busy", - "PublicDescription": "" - }, - { - "EventCode": "0x1000e", - "EventName": "PM_FXU_IDLE", - "BriefDescription": "fxu0 idle and fxu1 idle", - "PublicDescription": "" - } -] diff --git a/lib/libpmc/pmu-events/arch/powerpc/power8/frontend.json b/lib/libpmc/pmu-events/arch/powerpc/power8/frontend.json deleted file mode 100644 index 1ddc30655d4..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power8/frontend.json +++ /dev/null @@ -1,470 +0,0 @@ -[ - { - "EventCode": "0x2505e", - "EventName": "PM_BACK_BR_CMPL", - "BriefDescription": "Branch instruction completed with a target address less than current instruction address", - "PublicDescription": "" - }, - { - "EventCode": "0x10068", - "EventName": "PM_BRU_FIN", - "BriefDescription": "Branch Instruction Finished", - "PublicDescription": "" - }, - { - "EventCode": "0x20036", - "EventName": "PM_BR_2PATH", - "BriefDescription": "two path branch", - "PublicDescription": "" - }, - { - "EventCode": "0x40060", - "EventName": "PM_BR_CMPL", - "BriefDescription": "Branch Instruction completed", - "PublicDescription": "" - }, - { - "EventCode": "0x400f6", - "EventName": "PM_BR_MPRED_CMPL", - "BriefDescription": "Number of Branch Mispredicts", - "PublicDescription": "" - }, - { - "EventCode": "0x200fa", - "EventName": "PM_BR_TAKEN_CMPL", - "BriefDescription": "New event for Branch Taken", - "PublicDescription": "" - }, - { - "EventCode": "0x10018", - "EventName": "PM_IC_DEMAND_CYC", - "BriefDescription": "Cycles when a demand ifetch was pending", - "PublicDescription": "Demand ifetch pending" - }, - { - "EventCode": "0x100f6", - "EventName": "PM_IERAT_RELOAD", - "BriefDescription": "Number of I-ERAT reloads", - "PublicDescription": "IERAT Reloaded (Miss)" - }, - { - "EventCode": "0x4006a", - "EventName": "PM_IERAT_RELOAD_16M", - "BriefDescription": "IERAT Reloaded (Miss) for a 16M page", - "PublicDescription": "" - }, - { - "EventCode": "0x20064", - "EventName": "PM_IERAT_RELOAD_4K", - "BriefDescription": "IERAT Miss (Not implemented as DI on POWER6)", - "PublicDescription": "IERAT Reloaded (Miss) for a 4k page" - }, - { - "EventCode": "0x3006a", - "EventName": "PM_IERAT_RELOAD_64K", - "BriefDescription": "IERAT Reloaded (Miss) for a 64k page", - "PublicDescription": "" - }, - { - "EventCode": "0x14050", - "EventName": "PM_INST_CHIP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for an instruction fetch", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pump (prediction=correct) for an instruction fetch" - }, - { - "EventCode": "0x2", - "EventName": "PM_INST_CMPL", - "BriefDescription": "Number of PowerPC Instructions that completed", - "PublicDescription": "PPC Instructions Finished (completed)" - }, - { - "EventCode": "0x200f2", - "EventName": "PM_INST_DISP", - "BriefDescription": "PPC Dispatched", - "PublicDescription": "" - }, - { - "EventCode": "0x44048", - "EventName": "PM_INST_FROM_DL2L3_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x34048", - "EventName": "PM_INST_FROM_DL2L3_SHR", - "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x3404c", - "EventName": "PM_INST_FROM_DL4", - "BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x4404c", - "EventName": "PM_INST_FROM_DMEM", - "BriefDescription": "The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group (Distant) due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group (Distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x14042", - "EventName": "PM_INST_FROM_L2", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x1404e", - "EventName": "PM_INST_FROM_L2MISS", - "BriefDescription": "The processor's Instruction cache was reloaded from a localtion other than the local core's L2 due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from a localtion other than the local core's L2 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x34040", - "EventName": "PM_INST_FROM_L2_DISP_CONFLICT_LDHITST", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 with load hit store conflict due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 with load hit store conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x44040", - "EventName": "PM_INST_FROM_L2_DISP_CONFLICT_OTHER", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 with dispatch conflict due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 with dispatch conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x24040", - "EventName": "PM_INST_FROM_L2_MEPF", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state. due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state. due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x14040", - "EventName": "PM_INST_FROM_L2_NO_CONFLICT", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 without conflict due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 without conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x44042", - "EventName": "PM_INST_FROM_L3", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x300fa", - "EventName": "PM_INST_FROM_L3MISS", - "BriefDescription": "Marked instruction was reloaded from a location beyond the local chiplet", - "PublicDescription": "Inst from L3 miss" - }, - { - "EventCode": "0x4404e", - "EventName": "PM_INST_FROM_L3MISS_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded from a localtion other than the local core's L3 due to a instruction fetch", - "PublicDescription": "The processor's Instruction cache was reloaded from a localtion other than the local core's L3 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x34042", - "EventName": "PM_INST_FROM_L3_DISP_CONFLICT", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 with dispatch conflict due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 with dispatch conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x24042", - "EventName": "PM_INST_FROM_L3_MEPF", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state. due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state. due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x14044", - "EventName": "PM_INST_FROM_L3_NO_CONFLICT", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 without conflict due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 without conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x1404c", - "EventName": "PM_INST_FROM_LL4", - "BriefDescription": "The processor's Instruction cache was reloaded from the local chip's L4 cache due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from the local chip's L4 cache due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x24048", - "EventName": "PM_INST_FROM_LMEM", - "BriefDescription": "The processor's Instruction cache was reloaded from the local chip's Memory due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from the local chip's Memory due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x2404c", - "EventName": "PM_INST_FROM_MEMORY", - "BriefDescription": "The processor's Instruction cache was reloaded from a memory location including L4 from local remote or distant due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from a memory location including L4 from local remote or distant due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x4404a", - "EventName": "PM_INST_FROM_OFF_CHIP_CACHE", - "BriefDescription": "The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x14048", - "EventName": "PM_INST_FROM_ON_CHIP_CACHE", - "BriefDescription": "The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x24046", - "EventName": "PM_INST_FROM_RL2L3_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x1404a", - "EventName": "PM_INST_FROM_RL2L3_SHR", - "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x2404a", - "EventName": "PM_INST_FROM_RL4", - "BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x3404a", - "EventName": "PM_INST_FROM_RMEM", - "BriefDescription": "The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x24050", - "EventName": "PM_INST_GRP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was group pump (prediction=correct) for an instruction fetch", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was group pump for an instruction fetch" - }, - { - "EventCode": "0x24052", - "EventName": "PM_INST_GRP_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (Group) ended up either larger or smaller than Initial Pump Scope for an instruction fetch", - "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope OR Final Pump Scope(Group) got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump was chip or final and initial pump was gro" - }, - { - "EventCode": "0x14052", - "EventName": "PM_INST_GRP_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for an instruction fetch", - "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump was chip pumpfor an instruction fetch" - }, - { - "EventCode": "0x1003a", - "EventName": "PM_INST_IMC_MATCH_CMPL", - "BriefDescription": "IMC Match Count ( Not architected in P8)", - "PublicDescription": "" - }, - { - "EventCode": "0x14054", - "EventName": "PM_INST_PUMP_CPRED", - "BriefDescription": "Pump prediction correct. Counts across all types of pumps for an instruction fetch", - "PublicDescription": "Pump prediction correct. Counts across all types of pumpsfor an instruction fetch" - }, - { - "EventCode": "0x44052", - "EventName": "PM_INST_PUMP_MPRED", - "BriefDescription": "Pump misprediction. Counts across all types of pumps for an instruction fetch", - "PublicDescription": "Pump Mis prediction Counts across all types of pumpsfor an instruction fetch" - }, - { - "EventCode": "0x34050", - "EventName": "PM_INST_SYS_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was system pump (prediction=correct) for an instruction fetch", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was system pump for an instruction fetch" - }, - { - "EventCode": "0x34052", - "EventName": "PM_INST_SYS_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) or the original scope was System and it should have been smaller. Counts for an instruction fetch", - "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope(Chip/Group) OR Final Pump Scope(system) got data from source that was at smaller scope(Chip/group) Final pump was system pump and initial pump was chip or group or" - }, - { - "EventCode": "0x44050", - "EventName": "PM_INST_SYS_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for an instruction fetch", - "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope (Chip or Group) for an instruction fetch" - }, - { - "EventCode": "0x45048", - "EventName": "PM_IPTEG_FROM_DL2L3_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x35048", - "EventName": "PM_IPTEG_FROM_DL2L3_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x3504c", - "EventName": "PM_IPTEG_FROM_DL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a different Node or Group (Distant) due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x4504c", - "EventName": "PM_IPTEG_FROM_DMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group (Distant) due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x15042", - "EventName": "PM_IPTEG_FROM_L2", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1504e", - "EventName": "PM_IPTEG_FROM_L2MISS", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a localtion other than the local core's L2 due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x25040", - "EventName": "PM_IPTEG_FROM_L2_MEPF", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x15040", - "EventName": "PM_IPTEG_FROM_L2_NO_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 without conflict due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x45042", - "EventName": "PM_IPTEG_FROM_L3", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x4504e", - "EventName": "PM_IPTEG_FROM_L3MISS", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a localtion other than the local core's L3 due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x35042", - "EventName": "PM_IPTEG_FROM_L3_DISP_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 with dispatch conflict due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x25042", - "EventName": "PM_IPTEG_FROM_L3_MEPF", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x15044", - "EventName": "PM_IPTEG_FROM_L3_NO_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without conflict due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1504c", - "EventName": "PM_IPTEG_FROM_LL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x25048", - "EventName": "PM_IPTEG_FROM_LMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's Memory due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x2504c", - "EventName": "PM_IPTEG_FROM_MEMORY", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a memory location including L4 from local remote or distant due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x4504a", - "EventName": "PM_IPTEG_FROM_OFF_CHIP_CACHE", - "BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x15048", - "EventName": "PM_IPTEG_FROM_ON_CHIP_CACHE", - "BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x25046", - "EventName": "PM_IPTEG_FROM_RL2L3_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1504a", - "EventName": "PM_IPTEG_FROM_RL2L3_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x2504a", - "EventName": "PM_IPTEG_FROM_RL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on the same Node or Group ( Remote) due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x3504a", - "EventName": "PM_IPTEG_FROM_RMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group ( Remote) due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0xd096", - "EventName": "PM_ISLB_MISS", - "BriefDescription": "I SLB Miss", - "PublicDescription": "" - }, - { - "EventCode": "0x400fc", - "EventName": "PM_ITLB_MISS", - "BriefDescription": "ITLB Reloaded (always zero on POWER6)", - "PublicDescription": "" - }, - { - "EventCode": "0x200fd", - "EventName": "PM_L1_ICACHE_MISS", - "BriefDescription": "Demand iCache Miss", - "PublicDescription": "" - }, - { - "EventCode": "0x40012", - "EventName": "PM_L1_ICACHE_RELOADED_ALL", - "BriefDescription": "Counts all Icache reloads includes demand, prefetchm prefetch turned into demand and demand turned into prefetch", - "PublicDescription": "" - }, - { - "EventCode": "0x30068", - "EventName": "PM_L1_ICACHE_RELOADED_PREF", - "BriefDescription": "Counts all Icache prefetch reloads ( includes demand turned into prefetch)", - "PublicDescription": "" - }, - { - "EventCode": "0x300f4", - "EventName": "PM_THRD_CONC_RUN_INST", - "BriefDescription": "PPC Instructions Finished when both threads in run_cycles", - "PublicDescription": "Concurrent Run Instructions" - }, - { - "EventCode": "0x30060", - "EventName": "PM_TM_TRANS_RUN_INST", - "BriefDescription": "Instructions completed in transactional state", - "PublicDescription": "" - }, - { - "EventCode": "0x4e014", - "EventName": "PM_TM_TX_PASS_RUN_INST", - "BriefDescription": "run instructions spent in successful transactions", - "PublicDescription": "" - } -] diff --git a/lib/libpmc/pmu-events/arch/powerpc/power8/marked.json b/lib/libpmc/pmu-events/arch/powerpc/power8/marked.json deleted file mode 100644 index 94dc58b83b7..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power8/marked.json +++ /dev/null @@ -1,794 +0,0 @@ -[ - { - "EventCode": "0x3515e", - "EventName": "PM_MRK_BACK_BR_CMPL", - "BriefDescription": "Marked branch instruction completed with a target address less than current instruction address", - "PublicDescription": "" - }, - { - "EventCode": "0x2013a", - "EventName": "PM_MRK_BRU_FIN", - "BriefDescription": "bru marked instr finish", - "PublicDescription": "" - }, - { - "EventCode": "0x1016e", - "EventName": "PM_MRK_BR_CMPL", - "BriefDescription": "Branch Instruction completed", - "PublicDescription": "" - }, - { - "EventCode": "0x301e4", - "EventName": "PM_MRK_BR_MPRED_CMPL", - "BriefDescription": "Marked Branch Mispredicted", - "PublicDescription": "" - }, - { - "EventCode": "0x101e2", - "EventName": "PM_MRK_BR_TAKEN_CMPL", - "BriefDescription": "Marked Branch Taken completed", - "PublicDescription": "" - }, - { - "EventCode": "0x4d148", - "EventName": "PM_MRK_DATA_FROM_DL2L3_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2d128", - "EventName": "PM_MRK_DATA_FROM_DL2L3_MOD_CYC", - "BriefDescription": "Duration in cycles to reload with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x3d148", - "EventName": "PM_MRK_DATA_FROM_DL2L3_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2c128", - "EventName": "PM_MRK_DATA_FROM_DL2L3_SHR_CYC", - "BriefDescription": "Duration in cycles to reload with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x3d14c", - "EventName": "PM_MRK_DATA_FROM_DL4", - "BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2c12c", - "EventName": "PM_MRK_DATA_FROM_DL4_CYC", - "BriefDescription": "Duration in cycles to reload from another chip's L4 on a different Node or Group (Distant) due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4d14c", - "EventName": "PM_MRK_DATA_FROM_DMEM", - "BriefDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group (Distant) due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2d12c", - "EventName": "PM_MRK_DATA_FROM_DMEM_CYC", - "BriefDescription": "Duration in cycles to reload from another chip's memory on the same Node or Group (Distant) due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x1d142", - "EventName": "PM_MRK_DATA_FROM_L2", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x1d14e", - "EventName": "PM_MRK_DATA_FROM_L2MISS", - "BriefDescription": "Data cache reload L2 miss", - "PublicDescription": "" - }, - { - "EventCode": "0x4c12e", - "EventName": "PM_MRK_DATA_FROM_L2MISS_CYC", - "BriefDescription": "Duration in cycles to reload from a localtion other than the local core's L2 due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4c122", - "EventName": "PM_MRK_DATA_FROM_L2_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L2 due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x3d140", - "EventName": "PM_MRK_DATA_FROM_L2_DISP_CONFLICT_LDHITST", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit store conflict due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2c120", - "EventName": "PM_MRK_DATA_FROM_L2_DISP_CONFLICT_LDHITST_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L2 with load hit store conflict due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4d140", - "EventName": "PM_MRK_DATA_FROM_L2_DISP_CONFLICT_OTHER", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 with dispatch conflict due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2d120", - "EventName": "PM_MRK_DATA_FROM_L2_DISP_CONFLICT_OTHER_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L2 with dispatch conflict due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2d140", - "EventName": "PM_MRK_DATA_FROM_L2_MEPF", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state. due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4d120", - "EventName": "PM_MRK_DATA_FROM_L2_MEPF_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L2 hit without dispatch conflicts on Mepf state. due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x1d140", - "EventName": "PM_MRK_DATA_FROM_L2_NO_CONFLICT", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 without conflict due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4c120", - "EventName": "PM_MRK_DATA_FROM_L2_NO_CONFLICT_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L2 without conflict due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4d142", - "EventName": "PM_MRK_DATA_FROM_L3", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x201e4", - "EventName": "PM_MRK_DATA_FROM_L3MISS", - "BriefDescription": "The processor's data cache was reloaded from a localtion other than the local core's L3 due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2d12e", - "EventName": "PM_MRK_DATA_FROM_L3MISS_CYC", - "BriefDescription": "Duration in cycles to reload from a localtion other than the local core's L3 due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2d122", - "EventName": "PM_MRK_DATA_FROM_L3_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L3 due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x3d142", - "EventName": "PM_MRK_DATA_FROM_L3_DISP_CONFLICT", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 with dispatch conflict due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2c122", - "EventName": "PM_MRK_DATA_FROM_L3_DISP_CONFLICT_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L3 with dispatch conflict due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2d142", - "EventName": "PM_MRK_DATA_FROM_L3_MEPF", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state. due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4d122", - "EventName": "PM_MRK_DATA_FROM_L3_MEPF_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L3 without dispatch conflicts hit on Mepf state. due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x1d144", - "EventName": "PM_MRK_DATA_FROM_L3_NO_CONFLICT", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 without conflict due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4c124", - "EventName": "PM_MRK_DATA_FROM_L3_NO_CONFLICT_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L3 without conflict due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x1d14c", - "EventName": "PM_MRK_DATA_FROM_LL4", - "BriefDescription": "The processor's data cache was reloaded from the local chip's L4 cache due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4c12c", - "EventName": "PM_MRK_DATA_FROM_LL4_CYC", - "BriefDescription": "Duration in cycles to reload from the local chip's L4 cache due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2d148", - "EventName": "PM_MRK_DATA_FROM_LMEM", - "BriefDescription": "The processor's data cache was reloaded from the local chip's Memory due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4d128", - "EventName": "PM_MRK_DATA_FROM_LMEM_CYC", - "BriefDescription": "Duration in cycles to reload from the local chip's Memory due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2d14c", - "EventName": "PM_MRK_DATA_FROM_MEMORY", - "BriefDescription": "The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4d12c", - "EventName": "PM_MRK_DATA_FROM_MEMORY_CYC", - "BriefDescription": "Duration in cycles to reload from a memory location including L4 from local remote or distant due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4d14a", - "EventName": "PM_MRK_DATA_FROM_OFF_CHIP_CACHE", - "BriefDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2d12a", - "EventName": "PM_MRK_DATA_FROM_OFF_CHIP_CACHE_CYC", - "BriefDescription": "Duration in cycles to reload either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x1d148", - "EventName": "PM_MRK_DATA_FROM_ON_CHIP_CACHE", - "BriefDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4c128", - "EventName": "PM_MRK_DATA_FROM_ON_CHIP_CACHE_CYC", - "BriefDescription": "Duration in cycles to reload either shared or modified data from another core's L2/L3 on the same chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2d146", - "EventName": "PM_MRK_DATA_FROM_RL2L3_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4d126", - "EventName": "PM_MRK_DATA_FROM_RL2L3_MOD_CYC", - "BriefDescription": "Duration in cycles to reload with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x1d14a", - "EventName": "PM_MRK_DATA_FROM_RL2L3_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4c12a", - "EventName": "PM_MRK_DATA_FROM_RL2L3_SHR_CYC", - "BriefDescription": "Duration in cycles to reload with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2d14a", - "EventName": "PM_MRK_DATA_FROM_RL4", - "BriefDescription": "The processor's data cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4d12a", - "EventName": "PM_MRK_DATA_FROM_RL4_CYC", - "BriefDescription": "Duration in cycles to reload from another chip's L4 on the same Node or Group ( Remote) due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x3d14a", - "EventName": "PM_MRK_DATA_FROM_RMEM", - "BriefDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2c12a", - "EventName": "PM_MRK_DATA_FROM_RMEM_CYC", - "BriefDescription": "Duration in cycles to reload from another chip's memory on the same Node or Group ( Remote) due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x40118", - "EventName": "PM_MRK_DCACHE_RELOAD_INTV", - "BriefDescription": "Combined Intervention event", - "PublicDescription": "" - }, - { - "EventCode": "0x301e6", - "EventName": "PM_MRK_DERAT_MISS", - "BriefDescription": "Erat Miss (TLB Access) All page sizes", - "PublicDescription": "" - }, - { - "EventCode": "0x4d154", - "EventName": "PM_MRK_DERAT_MISS_16G", - "BriefDescription": "Marked Data ERAT Miss (Data TLB Access) page size 16G", - "PublicDescription": "" - }, - { - "EventCode": "0x3d154", - "EventName": "PM_MRK_DERAT_MISS_16M", - "BriefDescription": "Marked Data ERAT Miss (Data TLB Access) page size 16M", - "PublicDescription": "" - }, - { - "EventCode": "0x1d156", - "EventName": "PM_MRK_DERAT_MISS_4K", - "BriefDescription": "Marked Data ERAT Miss (Data TLB Access) page size 4K", - "PublicDescription": "" - }, - { - "EventCode": "0x2d154", - "EventName": "PM_MRK_DERAT_MISS_64K", - "BriefDescription": "Marked Data ERAT Miss (Data TLB Access) page size 64K", - "PublicDescription": "" - }, - { - "EventCode": "0x20132", - "EventName": "PM_MRK_DFU_FIN", - "BriefDescription": "Decimal Unit marked Instruction Finish", - "PublicDescription": "" - }, - { - "EventCode": "0x4f148", - "EventName": "PM_MRK_DPTEG_FROM_DL2L3_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x3f148", - "EventName": "PM_MRK_DPTEG_FROM_DL2L3_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x3f14c", - "EventName": "PM_MRK_DPTEG_FROM_DL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a different Node or Group (Distant) due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x4f14c", - "EventName": "PM_MRK_DPTEG_FROM_DMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group (Distant) due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1f142", - "EventName": "PM_MRK_DPTEG_FROM_L2", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1f14e", - "EventName": "PM_MRK_DPTEG_FROM_L2MISS", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a localtion other than the local core's L2 due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x2f140", - "EventName": "PM_MRK_DPTEG_FROM_L2_MEPF", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1f140", - "EventName": "PM_MRK_DPTEG_FROM_L2_NO_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 without conflict due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x4f142", - "EventName": "PM_MRK_DPTEG_FROM_L3", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x4f14e", - "EventName": "PM_MRK_DPTEG_FROM_L3MISS", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a localtion other than the local core's L3 due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x3f142", - "EventName": "PM_MRK_DPTEG_FROM_L3_DISP_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 with dispatch conflict due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x2f142", - "EventName": "PM_MRK_DPTEG_FROM_L3_MEPF", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1f144", - "EventName": "PM_MRK_DPTEG_FROM_L3_NO_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without conflict due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1f14c", - "EventName": "PM_MRK_DPTEG_FROM_LL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x2f148", - "EventName": "PM_MRK_DPTEG_FROM_LMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's Memory due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x2f14c", - "EventName": "PM_MRK_DPTEG_FROM_MEMORY", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a memory location including L4 from local remote or distant due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x4f14a", - "EventName": "PM_MRK_DPTEG_FROM_OFF_CHIP_CACHE", - "BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1f148", - "EventName": "PM_MRK_DPTEG_FROM_ON_CHIP_CACHE", - "BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x2f146", - "EventName": "PM_MRK_DPTEG_FROM_RL2L3_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1f14a", - "EventName": "PM_MRK_DPTEG_FROM_RL2L3_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x2f14a", - "EventName": "PM_MRK_DPTEG_FROM_RL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on the same Node or Group ( Remote) due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x3f14a", - "EventName": "PM_MRK_DPTEG_FROM_RMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group ( Remote) due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x401e4", - "EventName": "PM_MRK_DTLB_MISS", - "BriefDescription": "Marked dtlb miss", - "PublicDescription": "" - }, - { - "EventCode": "0x1d158", - "EventName": "PM_MRK_DTLB_MISS_16G", - "BriefDescription": "Marked Data TLB Miss page size 16G", - "PublicDescription": "" - }, - { - "EventCode": "0x4d156", - "EventName": "PM_MRK_DTLB_MISS_16M", - "BriefDescription": "Marked Data TLB Miss page size 16M", - "PublicDescription": "" - }, - { - "EventCode": "0x2d156", - "EventName": "PM_MRK_DTLB_MISS_4K", - "BriefDescription": "Marked Data TLB Miss page size 4k", - "PublicDescription": "" - }, - { - "EventCode": "0x3d156", - "EventName": "PM_MRK_DTLB_MISS_64K", - "BriefDescription": "Marked Data TLB Miss page size 64K", - "PublicDescription": "" - }, - { - "EventCode": "0x40154", - "EventName": "PM_MRK_FAB_RSP_BKILL", - "BriefDescription": "Marked store had to do a bkill", - "PublicDescription": "" - }, - { - "EventCode": "0x2f150", - "EventName": "PM_MRK_FAB_RSP_BKILL_CYC", - "BriefDescription": "cycles L2 RC took for a bkill", - "PublicDescription": "" - }, - { - "EventCode": "0x3015e", - "EventName": "PM_MRK_FAB_RSP_CLAIM_RTY", - "BriefDescription": "Sampled store did a rwitm and got a rty", - "PublicDescription": "" - }, - { - "EventCode": "0x30154", - "EventName": "PM_MRK_FAB_RSP_DCLAIM", - "BriefDescription": "Marked store had to do a dclaim", - "PublicDescription": "" - }, - { - "EventCode": "0x2f152", - "EventName": "PM_MRK_FAB_RSP_DCLAIM_CYC", - "BriefDescription": "cycles L2 RC took for a dclaim", - "PublicDescription": "" - }, - { - "EventCode": "0x4015e", - "EventName": "PM_MRK_FAB_RSP_RD_RTY", - "BriefDescription": "Sampled L2 reads retry count", - "PublicDescription": "" - }, - { - "EventCode": "0x1015e", - "EventName": "PM_MRK_FAB_RSP_RD_T_INTV", - "BriefDescription": "Sampled Read got a T intervention", - "PublicDescription": "" - }, - { - "EventCode": "0x4f150", - "EventName": "PM_MRK_FAB_RSP_RWITM_CYC", - "BriefDescription": "cycles L2 RC took for a rwitm", - "PublicDescription": "" - }, - { - "EventCode": "0x2015e", - "EventName": "PM_MRK_FAB_RSP_RWITM_RTY", - "BriefDescription": "Sampled store did a rwitm and got a rty", - "PublicDescription": "" - }, - { - "EventCode": "0x20134", - "EventName": "PM_MRK_FXU_FIN", - "BriefDescription": "fxu marked instr finish", - "PublicDescription": "" - }, - { - "EventCode": "0x401e0", - "EventName": "PM_MRK_INST_CMPL", - "BriefDescription": "marked instruction completed", - "PublicDescription": "" - }, - { - "EventCode": "0x20130", - "EventName": "PM_MRK_INST_DECODED", - "BriefDescription": "marked instruction decoded", - "PublicDescription": "marked instruction decoded. Name from ISU?" - }, - { - "EventCode": "0x101e0", - "EventName": "PM_MRK_INST_DISP", - "BriefDescription": "The thread has dispatched a randomly sampled marked instruction", - "PublicDescription": "Marked Instruction dispatched" - }, - { - "EventCode": "0x30130", - "EventName": "PM_MRK_INST_FIN", - "BriefDescription": "marked instruction finished", - "PublicDescription": "marked instr finish any unit" - }, - { - "EventCode": "0x401e6", - "EventName": "PM_MRK_INST_FROM_L3MISS", - "BriefDescription": "Marked instruction was reloaded from a location beyond the local chiplet", - "PublicDescription": "n/a" - }, - { - "EventCode": "0x10132", - "EventName": "PM_MRK_INST_ISSUED", - "BriefDescription": "Marked instruction issued", - "PublicDescription": "" - }, - { - "EventCode": "0x40134", - "EventName": "PM_MRK_INST_TIMEO", - "BriefDescription": "marked Instruction finish timeout (instruction lost)", - "PublicDescription": "" - }, - { - "EventCode": "0x101e4", - "EventName": "PM_MRK_L1_ICACHE_MISS", - "BriefDescription": "sampled Instruction suffered an icache Miss", - "PublicDescription": "Marked L1 Icache Miss" - }, - { - "EventCode": "0x101ea", - "EventName": "PM_MRK_L1_RELOAD_VALID", - "BriefDescription": "Marked demand reload", - "PublicDescription": "" - }, - { - "EventCode": "0x20114", - "EventName": "PM_MRK_L2_RC_DISP", - "BriefDescription": "Marked Instruction RC dispatched in L2", - "PublicDescription": "" - }, - { - "EventCode": "0x3012a", - "EventName": "PM_MRK_L2_RC_DONE", - "BriefDescription": "Marked RC done", - "PublicDescription": "" - }, - { - "EventCode": "0x40116", - "EventName": "PM_MRK_LARX_FIN", - "BriefDescription": "Larx finished", - "PublicDescription": "" - }, - { - "EventCode": "0x1013e", - "EventName": "PM_MRK_LD_MISS_EXPOSED_CYC", - "BriefDescription": "Marked Load exposed Miss cycles", - "PublicDescription": "Marked Load exposed Miss (use edge detect to count #)" - }, - { - "EventCode": "0x201e2", - "EventName": "PM_MRK_LD_MISS_L1", - "BriefDescription": "Marked DL1 Demand Miss counted at exec time", - "PublicDescription": "" - }, - { - "EventCode": "0x4013e", - "EventName": "PM_MRK_LD_MISS_L1_CYC", - "BriefDescription": "Marked ld latency", - "PublicDescription": "" - }, - { - "EventCode": "0x40132", - "EventName": "PM_MRK_LSU_FIN", - "BriefDescription": "lsu marked instr finish", - "PublicDescription": "" - }, - { - "EventCode": "0x20112", - "EventName": "PM_MRK_NTF_FIN", - "BriefDescription": "Marked next to finish instruction finished", - "PublicDescription": "" - }, - { - "EventCode": "0x1d15e", - "EventName": "PM_MRK_RUN_CYC", - "BriefDescription": "Marked run cycles", - "PublicDescription": "" - }, - { - "EventCode": "0x3013e", - "EventName": "PM_MRK_STALL_CMPLU_CYC", - "BriefDescription": "Marked Group completion Stall", - "PublicDescription": "Marked Group Completion Stall cycles (use edge detect to count #)" - }, - { - "EventCode": "0x3e158", - "EventName": "PM_MRK_STCX_FAIL", - "BriefDescription": "marked stcx failed", - "PublicDescription": "" - }, - { - "EventCode": "0x10134", - "EventName": "PM_MRK_ST_CMPL", - "BriefDescription": "marked store completed and sent to nest", - "PublicDescription": "Marked store completed" - }, - { - "EventCode": "0x30134", - "EventName": "PM_MRK_ST_CMPL_INT", - "BriefDescription": "marked store finished with intervention", - "PublicDescription": "marked store complete (data home) with intervention" - }, - { - "EventCode": "0x3f150", - "EventName": "PM_MRK_ST_DRAIN_TO_L2DISP_CYC", - "BriefDescription": "cycles to drain st from core to L2", - "PublicDescription": "" - }, - { - "EventCode": "0x3012c", - "EventName": "PM_MRK_ST_FWD", - "BriefDescription": "Marked st forwards", - "PublicDescription": "" - }, - { - "EventCode": "0x1f150", - "EventName": "PM_MRK_ST_L2DISP_TO_CMPL_CYC", - "BriefDescription": "cycles from L2 rc disp to l2 rc completion", - "PublicDescription": "" - }, - { - "EventCode": "0x20138", - "EventName": "PM_MRK_ST_NEST", - "BriefDescription": "Marked store sent to nest", - "PublicDescription": "" - }, - { - "EventCode": "0x30132", - "EventName": "PM_MRK_VSU_FIN", - "BriefDescription": "VSU marked instr finish", - "PublicDescription": "vsu (fpu) marked instr finish" - }, - { - "EventCode": "0x3d15e", - "EventName": "PM_MULT_MRK", - "BriefDescription": "mult marked instr", - "PublicDescription": "" - }, - { - "EventCode": "0x15152", - "EventName": "PM_SYNC_MRK_BR_LINK", - "BriefDescription": "Marked Branch and link branch that can cause a synchronous interrupt", - "PublicDescription": "" - }, - { - "EventCode": "0x1515c", - "EventName": "PM_SYNC_MRK_BR_MPRED", - "BriefDescription": "Marked Branch mispredict that can cause a synchronous interrupt", - "PublicDescription": "" - }, - { - "EventCode": "0x15156", - "EventName": "PM_SYNC_MRK_FX_DIVIDE", - "BriefDescription": "Marked fixed point divide that can cause a synchronous interrupt", - "PublicDescription": "" - }, - { - "EventCode": "0x15158", - "EventName": "PM_SYNC_MRK_L2HIT", - "BriefDescription": "Marked L2 Hits that can throw a synchronous interrupt", - "PublicDescription": "" - }, - { - "EventCode": "0x1515a", - "EventName": "PM_SYNC_MRK_L2MISS", - "BriefDescription": "Marked L2 Miss that can throw a synchronous interrupt", - "PublicDescription": "" - }, - { - "EventCode": "0x15154", - "EventName": "PM_SYNC_MRK_L3MISS", - "BriefDescription": "Marked L3 misses that can throw a synchronous interrupt", - "PublicDescription": "" - }, - { - "EventCode": "0x15150", - "EventName": "PM_SYNC_MRK_PROBE_NOP", - "BriefDescription": "Marked probeNops which can cause synchronous interrupts", - "PublicDescription": "" - } -] diff --git a/lib/libpmc/pmu-events/arch/powerpc/power8/memory.json b/lib/libpmc/pmu-events/arch/powerpc/power8/memory.json deleted file mode 100644 index 2ba33420e20..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power8/memory.json +++ /dev/null @@ -1,212 +0,0 @@ -[ - { - "EventCode": "0x10050", - "EventName": "PM_CHIP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pump (prediction=correct) for all data types ( demand load,data,inst prefetch,inst fetch,xlate (I or d)" - }, - { - "EventCode": "0x1c050", - "EventName": "PM_DATA_CHIP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for a demand load", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pump (prediction=correct) for a demand load" - }, - { - "EventCode": "0x4c04c", - "EventName": "PM_DATA_FROM_DMEM", - "BriefDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group (Distant) due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group (Distant) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x2c048", - "EventName": "PM_DATA_FROM_LMEM", - "BriefDescription": "The processor's data cache was reloaded from the local chip's Memory due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from the local chip's Memory due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x2c04c", - "EventName": "PM_DATA_FROM_MEMORY", - "BriefDescription": "The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x2c04a", - "EventName": "PM_DATA_FROM_RL4", - "BriefDescription": "The processor's data cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x3c04a", - "EventName": "PM_DATA_FROM_RMEM", - "BriefDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to a demand load", - "PublicDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x2c050", - "EventName": "PM_DATA_GRP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was group pump (prediction=correct) for a demand load", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was group pump for a demand load" - }, - { - "EventCode": "0x2c052", - "EventName": "PM_DATA_GRP_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (Group) ended up either larger or smaller than Initial Pump Scope for a demand load", - "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope OR Final Pump Scope(Group) got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump was chip or final and initial pump was gro" - }, - { - "EventCode": "0x1c052", - "EventName": "PM_DATA_GRP_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for a demand load", - "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump was chip pumpfor a demand load" - }, - { - "EventCode": "0x1c054", - "EventName": "PM_DATA_PUMP_CPRED", - "BriefDescription": "Pump prediction correct. Counts across all types of pumps for a demand load", - "PublicDescription": "" - }, - { - "EventCode": "0x4c052", - "EventName": "PM_DATA_PUMP_MPRED", - "BriefDescription": "Pump misprediction. Counts across all types of pumps for a demand load", - "PublicDescription": "Pump Mis prediction Counts across all types of pumpsfor a demand load" - }, - { - "EventCode": "0x3c050", - "EventName": "PM_DATA_SYS_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was system pump (prediction=correct) for a demand load", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was system pump for a demand load" - }, - { - "EventCode": "0x3c052", - "EventName": "PM_DATA_SYS_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) or the original scope was System and it should have been smaller. Counts for a demand load", - "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope(Chip/Group) OR Final Pump Scope(system) got data from source that was at smaller scope(Chip/group) Final pump was system pump and initial pump was chip or group or" - }, - { - "EventCode": "0x4c050", - "EventName": "PM_DATA_SYS_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for a demand load", - "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope (Chip or Group) for a demand load" - }, - { - "EventCode": "0x3e04c", - "EventName": "PM_DPTEG_FROM_DL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a different Node or Group (Distant) due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x4e04c", - "EventName": "PM_DPTEG_FROM_DMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group (Distant) due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x3e04a", - "EventName": "PM_DPTEG_FROM_RMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group ( Remote) due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x20050", - "EventName": "PM_GRP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope and data sourced across this scope was group pump for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)", - "PublicDescription": "" - }, - { - "EventCode": "0x20052", - "EventName": "PM_GRP_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (Group) ended up either larger or smaller than Initial Pump Scope for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope OR Final Pump Scope(Group) got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump was chip or final and initial pump was gro" - }, - { - "EventCode": "0x10052", - "EventName": "PM_GRP_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump was chip pumpfor all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x18082", - "EventName": "PM_L3_CO_MEPF", - "BriefDescription": "L3 CO of line in Mep state ( includes casthrough", - "PublicDescription": "" - }, - { - "EventCode": "0x4c058", - "EventName": "PM_MEM_CO", - "BriefDescription": "Memory castouts from this lpar", - "PublicDescription": "" - }, - { - "EventCode": "0x10058", - "EventName": "PM_MEM_LOC_THRESH_IFU", - "BriefDescription": "Local Memory above threshold for IFU speculation control", - "PublicDescription": "" - }, - { - "EventCode": "0x40056", - "EventName": "PM_MEM_LOC_THRESH_LSU_HIGH", - "BriefDescription": "Local memory above threshold for LSU medium", - "PublicDescription": "" - }, - { - "EventCode": "0x1c05e", - "EventName": "PM_MEM_LOC_THRESH_LSU_MED", - "BriefDescription": "Local memory above theshold for data prefetch", - "PublicDescription": "" - }, - { - "EventCode": "0x2c058", - "EventName": "PM_MEM_PREF", - "BriefDescription": "Memory prefetch for this lpar. Includes L4", - "PublicDescription": "" - }, - { - "EventCode": "0x10056", - "EventName": "PM_MEM_READ", - "BriefDescription": "Reads from Memory from this lpar (includes data/inst/xlate/l1prefetch/inst prefetch). Includes L4", - "PublicDescription": "" - }, - { - "EventCode": "0x3c05e", - "EventName": "PM_MEM_RWITM", - "BriefDescription": "Memory rwitm for this lpar", - "PublicDescription": "" - }, - { - "EventCode": "0x3006e", - "EventName": "PM_NEST_REF_CLK", - "BriefDescription": "Multiply by 4 to obtain the number of PB cycles", - "PublicDescription": "Nest reference clocks" - }, - { - "EventCode": "0x10054", - "EventName": "PM_PUMP_CPRED", - "BriefDescription": "Pump prediction correct. Counts across all types of pumps for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Pump prediction correct. Counts across all types of pumpsfor all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x40052", - "EventName": "PM_PUMP_MPRED", - "BriefDescription": "Pump misprediction. Counts across all types of pumps for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Pump Mis prediction Counts across all types of pumpsfor all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x30050", - "EventName": "PM_SYS_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was system pump for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was system pump for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x30052", - "EventName": "PM_SYS_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) or the original scope was System and it should have been smaller. Counts for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope(Chip/Group) OR Final Pump Scope(system) got data from source that was at smaller scope(Chip/group) Final pump was system pump and initial pump was chip or group or" - }, - { - "EventCode": "0x40050", - "EventName": "PM_SYS_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope (Chip or Group) for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - } -] diff --git a/lib/libpmc/pmu-events/arch/powerpc/power8/other.json b/lib/libpmc/pmu-events/arch/powerpc/power8/other.json deleted file mode 100644 index d0f14414bb7..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power8/other.json +++ /dev/null @@ -1,4064 +0,0 @@ -[ - { - "EventCode": "0x1f05e", - "EventName": "PM_1LPAR_CYC", - "BriefDescription": "Number of cycles in single lpar mode. All threads in the core are assigned to the same lpar", - "PublicDescription": "" - }, - { - "EventCode": "0x2006e", - "EventName": "PM_2LPAR_CYC", - "BriefDescription": "Cycles in 2-lpar mode. Threads 0-3 belong to Lpar0 and threads 4-7 belong to Lpar1", - "PublicDescription": "Number of cycles in 2 lpar mode" - }, - { - "EventCode": "0x4e05e", - "EventName": "PM_4LPAR_CYC", - "BriefDescription": "Number of cycles in 4 LPAR mode. Threads 0-1 belong to lpar0, threads 2-3 belong to lpar1, threads 4-5 belong to lpar2, and threads 6-7 belong to lpar3", - "PublicDescription": "" - }, - { - "EventCode": "0x610050", - "EventName": "PM_ALL_CHIP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pump (prediction=correct) for all data types ( demand load,data,inst prefetch,inst fetch,xlate (I or d)" - }, - { - "EventCode": "0x520050", - "EventName": "PM_ALL_GRP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope and data sourced across this scope was group pump for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was group pump for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x620052", - "EventName": "PM_ALL_GRP_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (Group) ended up either larger or smaller than Initial Pump Scope for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope OR Final Pump Scope(Group) got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump was chip or final and initial pump was gro" - }, - { - "EventCode": "0x610052", - "EventName": "PM_ALL_GRP_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump was chip pumpfor all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x610054", - "EventName": "PM_ALL_PUMP_CPRED", - "BriefDescription": "Pump prediction correct. Counts across all types of pumps for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Pump prediction correct. Counts across all types of pumpsfor all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x640052", - "EventName": "PM_ALL_PUMP_MPRED", - "BriefDescription": "Pump misprediction. Counts across all types of pumps for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Pump Mis prediction Counts across all types of pumpsfor all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x630050", - "EventName": "PM_ALL_SYS_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was system pump for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was system pump for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x630052", - "EventName": "PM_ALL_SYS_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) or the original scope was System and it should have been smaller. Counts for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope(Chip/Group) OR Final Pump Scope(system) got data from source that was at smaller scope(Chip/group) Final pump was system pump and initial pump was chip or group or" - }, - { - "EventCode": "0x640050", - "EventName": "PM_ALL_SYS_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)", - "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope (Chip or Group) for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x4082", - "EventName": "PM_BANK_CONFLICT", - "BriefDescription": "Read blocked due to interleave conflict. The ifar logic will detect an interleave conflict and kill the data that was read that cycle", - "PublicDescription": "" - }, - { - "EventCode": "0x5086", - "EventName": "PM_BR_BC_8", - "BriefDescription": "Pairable BC+8 branch that has not been converted to a Resolve Finished in the BRU pipeline", - "PublicDescription": "" - }, - { - "EventCode": "0x5084", - "EventName": "PM_BR_BC_8_CONV", - "BriefDescription": "Pairable BC+8 branch that was converted to a Resolve Finished in the BRU pipeline", - "PublicDescription": "" - }, - { - "EventCode": "0x40ac", - "EventName": "PM_BR_MPRED_CCACHE", - "BriefDescription": "Conditional Branch Completed that was Mispredicted due to the Count Cache Target Prediction", - "PublicDescription": "" - }, - { - "EventCode": "0x40b8", - "EventName": "PM_BR_MPRED_CR", - "BriefDescription": "Conditional Branch Completed that was Mispredicted due to the BHT Direction Prediction (taken/not taken)", - "PublicDescription": "" - }, - { - "EventCode": "0x40ae", - "EventName": "PM_BR_MPRED_LSTACK", - "BriefDescription": "Conditional Branch Completed that was Mispredicted due to the Link Stack Target Prediction", - "PublicDescription": "" - }, - { - "EventCode": "0x40ba", - "EventName": "PM_BR_MPRED_TA", - "BriefDescription": "Conditional Branch Completed that was Mispredicted due to the Target Address Prediction from the Count Cache or Link Stack. Only XL-form branches that resolved Taken set this event", - "PublicDescription": "" - }, - { - "EventCode": "0x10138", - "EventName": "PM_BR_MRK_2PATH", - "BriefDescription": "marked two path branch", - "PublicDescription": "" - }, - { - "EventCode": "0x409c", - "EventName": "PM_BR_PRED_BR0", - "BriefDescription": "Conditional Branch Completed on BR0 (1st branch in group) in which the HW predicted the Direction or Target", - "PublicDescription": "" - }, - { - "EventCode": "0x409e", - "EventName": "PM_BR_PRED_BR1", - "BriefDescription": "Conditional Branch Completed on BR1 (2nd branch in group) in which the HW predicted the Direction or Target. Note: BR1 can only be used in Single Thread Mode. In all of the SMT modes, only one branch can complete, thus BR1 is unused", - "PublicDescription": "" - }, - { - "EventCode": "0x489c", - "EventName": "PM_BR_PRED_BR_CMPL", - "BriefDescription": "Completion Time Event. This event can also be calculated from the direct bus as follows: if_pc_br0_br_pred(0) OR if_pc_br0_br_pred(1)", - "PublicDescription": "IFU" - }, - { - "EventCode": "0x40a4", - "EventName": "PM_BR_PRED_CCACHE_BR0", - "BriefDescription": "Conditional Branch Completed on BR0 that used the Count Cache for Target Prediction", - "PublicDescription": "" - }, - { - "EventCode": "0x40a6", - "EventName": "PM_BR_PRED_CCACHE_BR1", - "BriefDescription": "Conditional Branch Completed on BR1 that used the Count Cache for Target Prediction", - "PublicDescription": "" - }, - { - "EventCode": "0x48a4", - "EventName": "PM_BR_PRED_CCACHE_CMPL", - "BriefDescription": "Completion Time Event. This event can also be calculated from the direct bus as follows: if_pc_br0_br_pred(0) AND if_pc_br0_pred_type", - "PublicDescription": "IFU" - }, - { - "EventCode": "0x40b0", - "EventName": "PM_BR_PRED_CR_BR0", - "BriefDescription": "Conditional Branch Completed on BR0 that had its direction predicted. I-form branches do not set this event. In addition, B-form branches which do not use the BHT do not set this event - these are branches with BO-field set to 'always taken' and branches", - "PublicDescription": "" - }, - { - "EventCode": "0x40b2", - "EventName": "PM_BR_PRED_CR_BR1", - "BriefDescription": "Conditional Branch Completed on BR1 that had its direction predicted. I-form branches do not set this event. In addition, B-form branches which do not use the BHT do not set this event - these are branches with BO-field set to 'always taken' and branches", - "PublicDescription": "" - }, - { - "EventCode": "0x48b0", - "EventName": "PM_BR_PRED_CR_CMPL", - "BriefDescription": "Completion Time Event. This event can also be calculated from the direct bus as follows: if_pc_br0_br_pred(1)='1'", - "PublicDescription": "IFU" - }, - { - "EventCode": "0x40a8", - "EventName": "PM_BR_PRED_LSTACK_BR0", - "BriefDescription": "Conditional Branch Completed on BR0 that used the Link Stack for Target Prediction", - "PublicDescription": "" - }, - { - "EventCode": "0x40aa", - "EventName": "PM_BR_PRED_LSTACK_BR1", - "BriefDescription": "Conditional Branch Completed on BR1 that used the Link Stack for Target Prediction", - "PublicDescription": "" - }, - { - "EventCode": "0x48a8", - "EventName": "PM_BR_PRED_LSTACK_CMPL", - "BriefDescription": "Completion Time Event. This event can also be calculated from the direct bus as follows: if_pc_br0_br_pred(0) AND (not if_pc_br0_pred_type)", - "PublicDescription": "IFU" - }, - { - "EventCode": "0x40b4", - "EventName": "PM_BR_PRED_TA_BR0", - "BriefDescription": "Conditional Branch Completed on BR0 that had its target address predicted. Only XL-form branches set this event", - "PublicDescription": "" - }, - { - "EventCode": "0x40b6", - "EventName": "PM_BR_PRED_TA_BR1", - "BriefDescription": "Conditional Branch Completed on BR1 that had its target address predicted. Only XL-form branches set this event", - "PublicDescription": "" - }, - { - "EventCode": "0x48b4", - "EventName": "PM_BR_PRED_TA_CMPL", - "BriefDescription": "Completion Time Event. This event can also be calculated from the direct bus as follows: if_pc_br0_br_pred(0)='1'", - "PublicDescription": "IFU" - }, - { - "EventCode": "0x40a0", - "EventName": "PM_BR_UNCOND_BR0", - "BriefDescription": "Unconditional Branch Completed on BR0. HW branch prediction was not used for this branch. This can be an I-form branch, a B-form branch with BO-field set to branch always, or a B-form branch which was coverted to a Resolve", - "PublicDescription": "" - }, - { - "EventCode": "0x40a2", - "EventName": "PM_BR_UNCOND_BR1", - "BriefDescription": "Unconditional Branch Completed on BR1. HW branch prediction was not used for this branch. This can be an I-form branch, a B-form branch with BO-field set to branch always, or a B-form branch which was coverted to a Resolve", - "PublicDescription": "" - }, - { - "EventCode": "0x48a0", - "EventName": "PM_BR_UNCOND_CMPL", - "BriefDescription": "Completion Time Event. This event can also be calculated from the direct bus as follows: if_pc_br0_br_pred=00 AND if_pc_br0_completed", - "PublicDescription": "IFU" - }, - { - "EventCode": "0x3094", - "EventName": "PM_CASTOUT_ISSUED", - "BriefDescription": "Castouts issued", - "PublicDescription": "" - }, - { - "EventCode": "0x3096", - "EventName": "PM_CASTOUT_ISSUED_GPR", - "BriefDescription": "Castouts issued GPR", - "PublicDescription": "" - }, - { - "EventCode": "0x2090", - "EventName": "PM_CLB_HELD", - "BriefDescription": "CLB Hold: Any Reason", - "PublicDescription": "" - }, - { - "EventCode": "0x2d018", - "EventName": "PM_CMPLU_STALL_BRU_CRU", - "BriefDescription": "Completion stall due to IFU", - "PublicDescription": "" - }, - { - "EventCode": "0x30026", - "EventName": "PM_CMPLU_STALL_COQ_FULL", - "BriefDescription": "Completion stall due to CO q full", - "PublicDescription": "" - }, - { - "EventCode": "0x30038", - "EventName": "PM_CMPLU_STALL_FLUSH", - "BriefDescription": "completion stall due to flush by own thread", - "PublicDescription": "" - }, - { - "EventCode": "0x30028", - "EventName": "PM_CMPLU_STALL_MEM_ECC_DELAY", - "BriefDescription": "Completion stall due to mem ECC delay", - "PublicDescription": "" - }, - { - "EventCode": "0x2e01c", - "EventName": "PM_CMPLU_STALL_NO_NTF", - "BriefDescription": "Completion stall due to nop", - "PublicDescription": "" - }, - { - "EventCode": "0x2e01e", - "EventName": "PM_CMPLU_STALL_NTCG_FLUSH", - "BriefDescription": "Completion stall due to ntcg flush", - "PublicDescription": "Completion stall due to reject (load hit store)" - }, - { - "EventCode": "0x4c010", - "EventName": "PM_CMPLU_STALL_REJECT", - "BriefDescription": "Completion stall due to LSU reject", - "PublicDescription": "" - }, - { - "EventCode": "0x2c01a", - "EventName": "PM_CMPLU_STALL_REJECT_LHS", - "BriefDescription": "Completion stall due to reject (load hit store)", - "PublicDescription": "" - }, - { - "EventCode": "0x4c014", - "EventName": "PM_CMPLU_STALL_REJ_LMQ_FULL", - "BriefDescription": "Completion stall due to LSU reject LMQ full", - "PublicDescription": "" - }, - { - "EventCode": "0x4d010", - "EventName": "PM_CMPLU_STALL_SCALAR", - "BriefDescription": "Completion stall due to VSU scalar instruction", - "PublicDescription": "" - }, - { - "EventCode": "0x2d010", - "EventName": "PM_CMPLU_STALL_SCALAR_LONG", - "BriefDescription": "Completion stall due to VSU scalar long latency instruction", - "PublicDescription": "" - }, - { - "EventCode": "0x2c014", - "EventName": "PM_CMPLU_STALL_STORE", - "BriefDescription": "Completion stall by stores this includes store agen finishes in pipe LS0/LS1 and store data finishes in LS2/LS3", - "PublicDescription": "" - }, - { - "EventCode": "0x2d014", - "EventName": "PM_CMPLU_STALL_VECTOR", - "BriefDescription": "Completion stall due to VSU vector instruction", - "PublicDescription": "" - }, - { - "EventCode": "0x4d012", - "EventName": "PM_CMPLU_STALL_VECTOR_LONG", - "BriefDescription": "Completion stall due to VSU vector long instruction", - "PublicDescription": "" - }, - { - "EventCode": "0x2d012", - "EventName": "PM_CMPLU_STALL_VSU", - "BriefDescription": "Completion stall due to VSU instruction", - "PublicDescription": "" - }, - { - "EventCode": "0x16083", - "EventName": "PM_CO0_ALLOC", - "BriefDescription": "CO mach 0 Busy. Used by PMU to sample ave RC livetime(mach0 used as sample point)", - "PublicDescription": "0.0" - }, - { - "EventCode": "0x16082", - "EventName": "PM_CO0_BUSY", - "BriefDescription": "CO mach 0 Busy. Used by PMU to sample ave RC livetime(mach0 used as sample point)", - "PublicDescription": "" - }, - { - "EventCode": "0x517082", - "EventName": "PM_CO_DISP_FAIL", - "BriefDescription": "CO dispatch failed due to all CO machines being busy", - "PublicDescription": "" - }, - { - "EventCode": "0x527084", - "EventName": "PM_CO_TM_SC_FOOTPRINT", - "BriefDescription": "L2 did a cleanifdirty CO to the L3 (ie created an SC line in the L3)", - "PublicDescription": "" - }, - { - "EventCode": "0x3608a", - "EventName": "PM_CO_USAGE", - "BriefDescription": "Continuous 16 cycle(2to1) window where this signals rotates thru sampling each L2 CO machine busy. PMU uses this wave to then do 16 cyc count to sample total number of machs running", - "PublicDescription": "" - }, - { - "EventCode": "0x40066", - "EventName": "PM_CRU_FIN", - "BriefDescription": "IFU Finished a (non-branch) instruction", - "PublicDescription": "" - }, - { - "EventCode": "0x61c050", - "EventName": "PM_DATA_ALL_CHIP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for either demand loads or data prefetch", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pump (prediction=correct) for a demand load" - }, - { - "EventCode": "0x64c048", - "EventName": "PM_DATA_ALL_FROM_DL2L3_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x63c048", - "EventName": "PM_DATA_ALL_FROM_DL2L3_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x63c04c", - "EventName": "PM_DATA_ALL_FROM_DL4", - "BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x64c04c", - "EventName": "PM_DATA_ALL_FROM_DMEM", - "BriefDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group (Distant) due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group (Distant) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x61c042", - "EventName": "PM_DATA_ALL_FROM_L2", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from local core's L2 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x64c046", - "EventName": "PM_DATA_ALL_FROM_L21_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x63c046", - "EventName": "PM_DATA_ALL_FROM_L21_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x61c04e", - "EventName": "PM_DATA_ALL_FROM_L2MISS_MOD", - "BriefDescription": "The processor's data cache was reloaded from a localtion other than the local core's L2 due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from a localtion other than the local core's L2 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x63c040", - "EventName": "PM_DATA_ALL_FROM_L2_DISP_CONFLICT_LDHITST", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit store conflict due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from local core's L2 with load hit store conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x64c040", - "EventName": "PM_DATA_ALL_FROM_L2_DISP_CONFLICT_OTHER", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 with dispatch conflict due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from local core's L2 with dispatch conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x62c040", - "EventName": "PM_DATA_ALL_FROM_L2_MEPF", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x61c040", - "EventName": "PM_DATA_ALL_FROM_L2_NO_CONFLICT", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 without conflict due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from local core's L2 without conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x64c042", - "EventName": "PM_DATA_ALL_FROM_L3", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from local core's L3 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x64c044", - "EventName": "PM_DATA_ALL_FROM_L31_ECO_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x63c044", - "EventName": "PM_DATA_ALL_FROM_L31_ECO_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x62c044", - "EventName": "PM_DATA_ALL_FROM_L31_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x61c046", - "EventName": "PM_DATA_ALL_FROM_L31_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x64c04e", - "EventName": "PM_DATA_ALL_FROM_L3MISS_MOD", - "BriefDescription": "The processor's data cache was reloaded from a localtion other than the local core's L3 due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from a localtion other than the local core's L3 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x63c042", - "EventName": "PM_DATA_ALL_FROM_L3_DISP_CONFLICT", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 with dispatch conflict due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from local core's L3 with dispatch conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x62c042", - "EventName": "PM_DATA_ALL_FROM_L3_MEPF", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x61c044", - "EventName": "PM_DATA_ALL_FROM_L3_NO_CONFLICT", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 without conflict due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from local core's L3 without conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x61c04c", - "EventName": "PM_DATA_ALL_FROM_LL4", - "BriefDescription": "The processor's data cache was reloaded from the local chip's L4 cache due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from the local chip's L4 cache due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x62c048", - "EventName": "PM_DATA_ALL_FROM_LMEM", - "BriefDescription": "The processor's data cache was reloaded from the local chip's Memory due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from the local chip's Memory due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x62c04c", - "EventName": "PM_DATA_ALL_FROM_MEMORY", - "BriefDescription": "The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x64c04a", - "EventName": "PM_DATA_ALL_FROM_OFF_CHIP_CACHE", - "BriefDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x61c048", - "EventName": "PM_DATA_ALL_FROM_ON_CHIP_CACHE", - "BriefDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x62c046", - "EventName": "PM_DATA_ALL_FROM_RL2L3_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x61c04a", - "EventName": "PM_DATA_ALL_FROM_RL2L3_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x62c04a", - "EventName": "PM_DATA_ALL_FROM_RL4", - "BriefDescription": "The processor's data cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x63c04a", - "EventName": "PM_DATA_ALL_FROM_RMEM", - "BriefDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to either demand loads or data prefetch", - "PublicDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x62c050", - "EventName": "PM_DATA_ALL_GRP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was group pump (prediction=correct) for either demand loads or data prefetch", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was group pump for a demand load" - }, - { - "EventCode": "0x62c052", - "EventName": "PM_DATA_ALL_GRP_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (Group) ended up either larger or smaller than Initial Pump Scope for either demand loads or data prefetch", - "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope OR Final Pump Scope(Group) got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump was chip or final and initial pump was gro" - }, - { - "EventCode": "0x61c052", - "EventName": "PM_DATA_ALL_GRP_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for either demand loads or data prefetch", - "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump was chip pumpfor a demand load" - }, - { - "EventCode": "0x61c054", - "EventName": "PM_DATA_ALL_PUMP_CPRED", - "BriefDescription": "Pump prediction correct. Counts across all types of pumps for either demand loads or data prefetch", - "PublicDescription": "Pump prediction correct. Counts across all types of pumps for a demand load" - }, - { - "EventCode": "0x64c052", - "EventName": "PM_DATA_ALL_PUMP_MPRED", - "BriefDescription": "Pump misprediction. Counts across all types of pumps for either demand loads or data prefetch", - "PublicDescription": "Pump Mis prediction Counts across all types of pumpsfor a demand load" - }, - { - "EventCode": "0x63c050", - "EventName": "PM_DATA_ALL_SYS_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was system pump (prediction=correct) for either demand loads or data prefetch", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was system pump for a demand load" - }, - { - "EventCode": "0x63c052", - "EventName": "PM_DATA_ALL_SYS_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) or the original scope was System and it should have been smaller. Counts for either demand loads or data prefetch", - "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope(Chip/Group) OR Final Pump Scope(system) got data from source that was at smaller scope(Chip/group) Final pump was system pump and initial pump was chip or group or" - }, - { - "EventCode": "0x64c050", - "EventName": "PM_DATA_ALL_SYS_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for either demand loads or data prefetch", - "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope (Chip or Group) for a demand load" - }, - { - "EventCode": "0x4c046", - "EventName": "PM_DATA_FROM_L21_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to a demand load", - "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x3c046", - "EventName": "PM_DATA_FROM_L21_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to a demand load", - "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x4c044", - "EventName": "PM_DATA_FROM_L31_ECO_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to a demand load", - "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x3c044", - "EventName": "PM_DATA_FROM_L31_ECO_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to a demand load", - "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x2c044", - "EventName": "PM_DATA_FROM_L31_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to a demand load", - "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x1c046", - "EventName": "PM_DATA_FROM_L31_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to a demand load", - "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1" - }, - { - "EventCode": "0x400fe", - "EventName": "PM_DATA_FROM_MEM", - "BriefDescription": "The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to a demand load", - "PublicDescription": "Data cache reload from memory (including L4)" - }, - { - "EventCode": "0xe0bc", - "EventName": "PM_DC_COLLISIONS", - "BriefDescription": "DATA Cache collisions", - "PublicDescription": "DATA Cache collisions42" - }, - { - "EventCode": "0x1e050", - "EventName": "PM_DC_PREF_STREAM_ALLOC", - "BriefDescription": "Stream marked valid. The stream could have been allocated through the hardware prefetch mechanism or through software. This is combined ls0 and ls1", - "PublicDescription": "" - }, - { - "EventCode": "0x2e050", - "EventName": "PM_DC_PREF_STREAM_CONF", - "BriefDescription": "A demand load referenced a line in an active prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software. Combine up + down", - "PublicDescription": "" - }, - { - "EventCode": "0x4e050", - "EventName": "PM_DC_PREF_STREAM_FUZZY_CONF", - "BriefDescription": "A demand load referenced a line in an active fuzzy prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software.Fuzzy stream confirm (out of order effects, or pf cant keep up)", - "PublicDescription": "" - }, - { - "EventCode": "0x3e050", - "EventName": "PM_DC_PREF_STREAM_STRIDED_CONF", - "BriefDescription": "A demand load referenced a line in an active strided prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software", - "PublicDescription": "" - }, - { - "EventCode": "0xb0ba", - "EventName": "PM_DFU", - "BriefDescription": "Finish DFU (all finish)", - "PublicDescription": "" - }, - { - "EventCode": "0xb0be", - "EventName": "PM_DFU_DCFFIX", - "BriefDescription": "Convert from fixed opcode finish (dcffix,dcffixq)", - "PublicDescription": "" - }, - { - "EventCode": "0xb0bc", - "EventName": "PM_DFU_DENBCD", - "BriefDescription": "BCD->DPD opcode finish (denbcd, denbcdq)", - "PublicDescription": "" - }, - { - "EventCode": "0xb0b8", - "EventName": "PM_DFU_MC", - "BriefDescription": "Finish DFU multicycle", - "PublicDescription": "" - }, - { - "EventCode": "0x2092", - "EventName": "PM_DISP_CLB_HELD_BAL", - "BriefDescription": "Dispatch/CLB Hold: Balance", - "PublicDescription": "" - }, - { - "EventCode": "0x2094", - "EventName": "PM_DISP_CLB_HELD_RES", - "BriefDescription": "Dispatch/CLB Hold: Resource", - "PublicDescription": "" - }, - { - "EventCode": "0x20a8", - "EventName": "PM_DISP_CLB_HELD_SB", - "BriefDescription": "Dispatch/CLB Hold: Scoreboard", - "PublicDescription": "" - }, - { - "EventCode": "0x2098", - "EventName": "PM_DISP_CLB_HELD_SYNC", - "BriefDescription": "Dispatch/CLB Hold: Sync type instruction", - "PublicDescription": "" - }, - { - "EventCode": "0x2096", - "EventName": "PM_DISP_CLB_HELD_TLBIE", - "BriefDescription": "Dispatch Hold: Due to TLBIE", - "PublicDescription": "" - }, - { - "EventCode": "0x20006", - "EventName": "PM_DISP_HELD_IQ_FULL", - "BriefDescription": "Dispatch held due to Issue q full", - "PublicDescription": "" - }, - { - "EventCode": "0x1002a", - "EventName": "PM_DISP_HELD_MAP_FULL", - "BriefDescription": "Dispatch for this thread was held because the Mappers were full", - "PublicDescription": "Dispatch held due to Mapper full" - }, - { - "EventCode": "0x30018", - "EventName": "PM_DISP_HELD_SRQ_FULL", - "BriefDescription": "Dispatch held due SRQ no room", - "PublicDescription": "" - }, - { - "EventCode": "0x30a6", - "EventName": "PM_DISP_HOLD_GCT_FULL", - "BriefDescription": "Dispatch Hold Due to no space in the GCT", - "PublicDescription": "" - }, - { - "EventCode": "0x30008", - "EventName": "PM_DISP_WT", - "BriefDescription": "Dispatched Starved", - "PublicDescription": "Dispatched Starved (not held, nothing to dispatch)" - }, - { - "EventCode": "0x4e046", - "EventName": "PM_DPTEG_FROM_L21_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x3e046", - "EventName": "PM_DPTEG_FROM_L21_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L2 on the same chip due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x3e040", - "EventName": "PM_DPTEG_FROM_L2_DISP_CONFLICT_LDHITST", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 with load hit store conflict due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x4e040", - "EventName": "PM_DPTEG_FROM_L2_DISP_CONFLICT_OTHER", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 with dispatch conflict due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x4e044", - "EventName": "PM_DPTEG_FROM_L31_ECO_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x3e044", - "EventName": "PM_DPTEG_FROM_L31_ECO_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x2e044", - "EventName": "PM_DPTEG_FROM_L31_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the same chip due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1e046", - "EventName": "PM_DPTEG_FROM_L31_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x50a8", - "EventName": "PM_EAT_FORCE_MISPRED", - "BriefDescription": "XL-form branch was mispredicted due to the predicted target address missing from EAT. The EAT forces a mispredict in this case since there is no predicated target to validate. This is a rare case that may occur when the EAT is full and a branch is issue", - "PublicDescription": "" - }, - { - "EventCode": "0x4084", - "EventName": "PM_EAT_FULL_CYC", - "BriefDescription": "Cycles No room in EAT", - "PublicDescription": "Cycles No room in EATSet on bank conflict and case where no ibuffers available" - }, - { - "EventCode": "0x2080", - "EventName": "PM_EE_OFF_EXT_INT", - "BriefDescription": "Ee off and external interrupt", - "PublicDescription": "" - }, - { - "EventCode": "0x20b4", - "EventName": "PM_FAV_TBEGIN", - "BriefDescription": "Dispatch time Favored tbegin", - "PublicDescription": "" - }, - { - "EventCode": "0x100f4", - "EventName": "PM_FLOP", - "BriefDescription": "Floating Point Operation Finished", - "PublicDescription": "Floating Point Operations Finished" - }, - { - "EventCode": "0xa0ae", - "EventName": "PM_FLOP_SUM_SCALAR", - "BriefDescription": "flops summary scalar instructions", - "PublicDescription": "" - }, - { - "EventCode": "0xa0ac", - "EventName": "PM_FLOP_SUM_VEC", - "BriefDescription": "flops summary vector instructions", - "PublicDescription": "" - }, - { - "EventCode": "0x2084", - "EventName": "PM_FLUSH_BR_MPRED", - "BriefDescription": "Flush caused by branch mispredict", - "PublicDescription": "" - }, - { - "EventCode": "0x2082", - "EventName": "PM_FLUSH_DISP", - "BriefDescription": "Dispatch flush", - "PublicDescription": "" - }, - { - "EventCode": "0x208c", - "EventName": "PM_FLUSH_DISP_SB", - "BriefDescription": "Dispatch Flush: Scoreboard", - "PublicDescription": "" - }, - { - "EventCode": "0x2088", - "EventName": "PM_FLUSH_DISP_SYNC", - "BriefDescription": "Dispatch Flush: Sync", - "PublicDescription": "" - }, - { - "EventCode": "0x208a", - "EventName": "PM_FLUSH_DISP_TLBIE", - "BriefDescription": "Dispatch Flush: TLBIE", - "PublicDescription": "" - }, - { - "EventCode": "0x208e", - "EventName": "PM_FLUSH_LSU", - "BriefDescription": "Flush initiated by LSU", - "PublicDescription": "" - }, - { - "EventCode": "0x2086", - "EventName": "PM_FLUSH_PARTIAL", - "BriefDescription": "Partial flush", - "PublicDescription": "" - }, - { - "EventCode": "0xa0b0", - "EventName": "PM_FPU0_FCONV", - "BriefDescription": "Convert instruction executed", - "PublicDescription": "" - }, - { - "EventCode": "0xa0b8", - "EventName": "PM_FPU0_FEST", - "BriefDescription": "Estimate instruction executed", - "PublicDescription": "" - }, - { - "EventCode": "0xa0b4", - "EventName": "PM_FPU0_FRSP", - "BriefDescription": "Round to single precision instruction executed", - "PublicDescription": "" - }, - { - "EventCode": "0xa0b2", - "EventName": "PM_FPU1_FCONV", - "BriefDescription": "Convert instruction executed", - "PublicDescription": "" - }, - { - "EventCode": "0xa0ba", - "EventName": "PM_FPU1_FEST", - "BriefDescription": "Estimate instruction executed", - "PublicDescription": "" - }, - { - "EventCode": "0xa0b6", - "EventName": "PM_FPU1_FRSP", - "BriefDescription": "Round to single precision instruction executed", - "PublicDescription": "" - }, - { - "EventCode": "0x50b0", - "EventName": "PM_FUSION_TOC_GRP0_1", - "BriefDescription": "One pair of instructions fused with TOC in Group0", - "PublicDescription": "" - }, - { - "EventCode": "0x50ae", - "EventName": "PM_FUSION_TOC_GRP0_2", - "BriefDescription": "Two pairs of instructions fused with TOCin Group0", - "PublicDescription": "" - }, - { - "EventCode": "0x50ac", - "EventName": "PM_FUSION_TOC_GRP0_3", - "BriefDescription": "Three pairs of instructions fused with TOC in Group0", - "PublicDescription": "" - }, - { - "EventCode": "0x50b2", - "EventName": "PM_FUSION_TOC_GRP1_1", - "BriefDescription": "One pair of instructions fused with TOX in Group1", - "PublicDescription": "" - }, - { - "EventCode": "0x50b8", - "EventName": "PM_FUSION_VSX_GRP0_1", - "BriefDescription": "One pair of instructions fused with VSX in Group0", - "PublicDescription": "" - }, - { - "EventCode": "0x50b6", - "EventName": "PM_FUSION_VSX_GRP0_2", - "BriefDescription": "Two pairs of instructions fused with VSX in Group0", - "PublicDescription": "" - }, - { - "EventCode": "0x50b4", - "EventName": "PM_FUSION_VSX_GRP0_3", - "BriefDescription": "Three pairs of instructions fused with VSX in Group0", - "PublicDescription": "" - }, - { - "EventCode": "0x50ba", - "EventName": "PM_FUSION_VSX_GRP1_1", - "BriefDescription": "One pair of instructions fused with VSX in Group1", - "PublicDescription": "" - }, - { - "EventCode": "0x3000e", - "EventName": "PM_FXU0_BUSY_FXU1_IDLE", - "BriefDescription": "fxu0 busy and fxu1 idle", - "PublicDescription": "" - }, - { - "EventCode": "0x10004", - "EventName": "PM_FXU0_FIN", - "BriefDescription": "The fixed point unit Unit 0 finished an instruction. Instructions that finish may not necessary complete", - "PublicDescription": "FXU0 Finished" - }, - { - "EventCode": "0x4000e", - "EventName": "PM_FXU1_BUSY_FXU0_IDLE", - "BriefDescription": "fxu0 idle and fxu1 busy", - "PublicDescription": "" - }, - { - "EventCode": "0x40004", - "EventName": "PM_FXU1_FIN", - "BriefDescription": "FXU1 Finished", - "PublicDescription": "" - }, - { - "EventCode": "0x20008", - "EventName": "PM_GCT_EMPTY_CYC", - "BriefDescription": "No itags assigned either thread (GCT Empty)", - "PublicDescription": "" - }, - { - "EventCode": "0x30a4", - "EventName": "PM_GCT_MERGE", - "BriefDescription": "Group dispatched on a merged GCT empty. GCT entries can be merged only within the same thread", - "PublicDescription": "" - }, - { - "EventCode": "0x4d01e", - "EventName": "PM_GCT_NOSLOT_BR_MPRED", - "BriefDescription": "Gct empty for this thread due to branch mispred", - "PublicDescription": "" - }, - { - "EventCode": "0x4d01a", - "EventName": "PM_GCT_NOSLOT_BR_MPRED_ICMISS", - "BriefDescription": "Gct empty for this thread due to Icache Miss and branch mispred", - "PublicDescription": "" - }, - { - "EventCode": "0x100f8", - "EventName": "PM_GCT_NOSLOT_CYC", - "BriefDescription": "No itags assigned", - "PublicDescription": "Pipeline empty (No itags assigned , no GCT slots used)" - }, - { - "EventCode": "0x2d01e", - "EventName": "PM_GCT_NOSLOT_DISP_HELD_ISSQ", - "BriefDescription": "Gct empty for this thread due to dispatch hold on this thread due to Issue q full", - "PublicDescription": "" - }, - { - "EventCode": "0x4d01c", - "EventName": "PM_GCT_NOSLOT_DISP_HELD_MAP", - "BriefDescription": "Gct empty for this thread due to dispatch hold on this thread due to Mapper full", - "PublicDescription": "" - }, - { - "EventCode": "0x2e010", - "EventName": "PM_GCT_NOSLOT_DISP_HELD_OTHER", - "BriefDescription": "Gct empty for this thread due to dispatch hold on this thread due to sync", - "PublicDescription": "" - }, - { - "EventCode": "0x2d01c", - "EventName": "PM_GCT_NOSLOT_DISP_HELD_SRQ", - "BriefDescription": "Gct empty for this thread due to dispatch hold on this thread due to SRQ full", - "PublicDescription": "" - }, - { - "EventCode": "0x4e010", - "EventName": "PM_GCT_NOSLOT_IC_L3MISS", - "BriefDescription": "Gct empty for this thread due to icach l3 miss", - "PublicDescription": "" - }, - { - "EventCode": "0x2d01a", - "EventName": "PM_GCT_NOSLOT_IC_MISS", - "BriefDescription": "Gct empty for this thread due to Icache Miss", - "PublicDescription": "" - }, - { - "EventCode": "0x20a2", - "EventName": "PM_GCT_UTIL_11_14_ENTRIES", - "BriefDescription": "GCT Utilization 11-14 entries", - "PublicDescription": "" - }, - { - "EventCode": "0x20a4", - "EventName": "PM_GCT_UTIL_15_17_ENTRIES", - "BriefDescription": "GCT Utilization 15-17 entries", - "PublicDescription": "" - }, - { - "EventCode": "0x20a6", - "EventName": "PM_GCT_UTIL_18_ENTRIES", - "BriefDescription": "GCT Utilization 18+ entries", - "PublicDescription": "" - }, - { - "EventCode": "0x209c", - "EventName": "PM_GCT_UTIL_1_2_ENTRIES", - "BriefDescription": "GCT Utilization 1-2 entries", - "PublicDescription": "" - }, - { - "EventCode": "0x209e", - "EventName": "PM_GCT_UTIL_3_6_ENTRIES", - "BriefDescription": "GCT Utilization 3-6 entries", - "PublicDescription": "" - }, - { - "EventCode": "0x20a0", - "EventName": "PM_GCT_UTIL_7_10_ENTRIES", - "BriefDescription": "GCT Utilization 7-10 entries", - "PublicDescription": "" - }, - { - "EventCode": "0x1000a", - "EventName": "PM_GRP_BR_MPRED_NONSPEC", - "BriefDescription": "Group experienced non-speculative branch redirect", - "PublicDescription": "Group experienced Non-speculative br mispredicct" - }, - { - "EventCode": "0x30004", - "EventName": "PM_GRP_CMPL", - "BriefDescription": "group completed", - "PublicDescription": "" - }, - { - "EventCode": "0x3000a", - "EventName": "PM_GRP_DISP", - "BriefDescription": "group dispatch", - "PublicDescription": "dispatch_success (Group Dispatched)" - }, - { - "EventCode": "0x1000c", - "EventName": "PM_GRP_IC_MISS_NONSPEC", - "BriefDescription": "Group experienced non-speculative I cache miss", - "PublicDescription": "Group experi enced Non-specu lative I cache miss" - }, - { - "EventCode": "0x10130", - "EventName": "PM_GRP_MRK", - "BriefDescription": "Instruction Marked", - "PublicDescription": "Instruction marked in idu" - }, - { - "EventCode": "0x509c", - "EventName": "PM_GRP_NON_FULL_GROUP", - "BriefDescription": "GROUPs where we did not have 6 non branch instructions in the group(ST mode), in SMT mode 3 non branches", - "PublicDescription": "" - }, - { - "EventCode": "0x50a4", - "EventName": "PM_GRP_TERM_2ND_BRANCH", - "BriefDescription": "There were enough instructions in the Ibuffer, but 2nd branch ends group", - "PublicDescription": "" - }, - { - "EventCode": "0x50a6", - "EventName": "PM_GRP_TERM_FPU_AFTER_BR", - "BriefDescription": "There were enough instructions in the Ibuffer, but FPU OP IN same group after a branch terminates a group, cant do partial flushes", - "PublicDescription": "" - }, - { - "EventCode": "0x509e", - "EventName": "PM_GRP_TERM_NOINST", - "BriefDescription": "Do not fill every slot in the group, Not enough instructions in the Ibuffer. This includes cases where the group started with enough instructions, but some got knocked out by a cache miss or branch redirect (which would also empty the Ibuffer)", - "PublicDescription": "" - }, - { - "EventCode": "0x50a0", - "EventName": "PM_GRP_TERM_OTHER", - "BriefDescription": "There were enough instructions in the Ibuffer, but the group terminated early for some other reason, most likely due to a First or Last", - "PublicDescription": "" - }, - { - "EventCode": "0x50a2", - "EventName": "PM_GRP_TERM_SLOT_LIMIT", - "BriefDescription": "There were enough instructions in the Ibuffer, but 3 src RA/RB/RC , 2 way crack caused a group termination", - "PublicDescription": "" - }, - { - "EventCode": "0x4086", - "EventName": "PM_IBUF_FULL_CYC", - "BriefDescription": "Cycles No room in ibuff", - "PublicDescription": "Cycles No room in ibufffully qualified transfer (if5 valid)" - }, - { - "EventCode": "0x4098", - "EventName": "PM_IC_DEMAND_L2_BHT_REDIRECT", - "BriefDescription": "L2 I cache demand request due to BHT redirect, branch redirect ( 2 bubbles 3 cycles)", - "PublicDescription": "" - }, - { - "EventCode": "0x409a", - "EventName": "PM_IC_DEMAND_L2_BR_REDIRECT", - "BriefDescription": "L2 I cache demand request due to branch Mispredict ( 15 cycle path)", - "PublicDescription": "" - }, - { - "EventCode": "0x4088", - "EventName": "PM_IC_DEMAND_REQ", - "BriefDescription": "Demand Instruction fetch request", - "PublicDescription": "" - }, - { - "EventCode": "0x508a", - "EventName": "PM_IC_INVALIDATE", - "BriefDescription": "Ic line invalidated", - "PublicDescription": "" - }, - { - "EventCode": "0x4092", - "EventName": "PM_IC_PREF_CANCEL_HIT", - "BriefDescription": "Prefetch Canceled due to icache hit", - "PublicDescription": "" - }, - { - "EventCode": "0x4094", - "EventName": "PM_IC_PREF_CANCEL_L2", - "BriefDescription": "L2 Squashed request", - "PublicDescription": "" - }, - { - "EventCode": "0x4090", - "EventName": "PM_IC_PREF_CANCEL_PAGE", - "BriefDescription": "Prefetch Canceled due to page boundary", - "PublicDescription": "" - }, - { - "EventCode": "0x408a", - "EventName": "PM_IC_PREF_REQ", - "BriefDescription": "Instruction prefetch requests", - "PublicDescription": "" - }, - { - "EventCode": "0x408e", - "EventName": "PM_IC_PREF_WRITE", - "BriefDescription": "Instruction prefetch written into IL1", - "PublicDescription": "" - }, - { - "EventCode": "0x4096", - "EventName": "PM_IC_RELOAD_PRIVATE", - "BriefDescription": "Reloading line was brought in private for a specific thread. Most lines are brought in shared for all eight thrreads. If RA does not match then invalidates and then brings it shared to other thread. In P7 line brought in private , then line was invalidat", - "PublicDescription": "" - }, - { - "EventCode": "0x5088", - "EventName": "PM_IFU_L2_TOUCH", - "BriefDescription": "L2 touch to update MRU on a line", - "PublicDescription": "" - }, - { - "EventCode": "0x514050", - "EventName": "PM_INST_ALL_CHIP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for instruction fetches and prefetches", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pump (prediction=correct) for an instruction fetch" - }, - { - "EventCode": "0x544048", - "EventName": "PM_INST_ALL_FROM_DL2L3_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x534048", - "EventName": "PM_INST_ALL_FROM_DL2L3_SHR", - "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x53404c", - "EventName": "PM_INST_ALL_FROM_DL4", - "BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x54404c", - "EventName": "PM_INST_ALL_FROM_DMEM", - "BriefDescription": "The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group (Distant) due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group (Distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x514042", - "EventName": "PM_INST_ALL_FROM_L2", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x544046", - "EventName": "PM_INST_ALL_FROM_L21_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L2 on the same chip due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L2 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x534046", - "EventName": "PM_INST_ALL_FROM_L21_SHR", - "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L2 on the same chip due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L2 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x51404e", - "EventName": "PM_INST_ALL_FROM_L2MISS", - "BriefDescription": "The processor's Instruction cache was reloaded from a localtion other than the local core's L2 due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from a localtion other than the local core's L2 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x534040", - "EventName": "PM_INST_ALL_FROM_L2_DISP_CONFLICT_LDHITST", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 with load hit store conflict due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 with load hit store conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x544040", - "EventName": "PM_INST_ALL_FROM_L2_DISP_CONFLICT_OTHER", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 with dispatch conflict due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 with dispatch conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x524040", - "EventName": "PM_INST_ALL_FROM_L2_MEPF", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state. due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state. due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x514040", - "EventName": "PM_INST_ALL_FROM_L2_NO_CONFLICT", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 without conflict due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 without conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x544042", - "EventName": "PM_INST_ALL_FROM_L3", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x544044", - "EventName": "PM_INST_ALL_FROM_L31_ECO_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x534044", - "EventName": "PM_INST_ALL_FROM_L31_ECO_SHR", - "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x524044", - "EventName": "PM_INST_ALL_FROM_L31_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L3 on the same chip due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x514046", - "EventName": "PM_INST_ALL_FROM_L31_SHR", - "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L3 on the same chip due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x54404e", - "EventName": "PM_INST_ALL_FROM_L3MISS_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded from a localtion other than the local core's L3 due to a instruction fetch", - "PublicDescription": "The processor's Instruction cache was reloaded from a localtion other than the local core's L3 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x534042", - "EventName": "PM_INST_ALL_FROM_L3_DISP_CONFLICT", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 with dispatch conflict due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 with dispatch conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x524042", - "EventName": "PM_INST_ALL_FROM_L3_MEPF", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state. due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state. due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x514044", - "EventName": "PM_INST_ALL_FROM_L3_NO_CONFLICT", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 without conflict due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 without conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x51404c", - "EventName": "PM_INST_ALL_FROM_LL4", - "BriefDescription": "The processor's Instruction cache was reloaded from the local chip's L4 cache due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from the local chip's L4 cache due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x524048", - "EventName": "PM_INST_ALL_FROM_LMEM", - "BriefDescription": "The processor's Instruction cache was reloaded from the local chip's Memory due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from the local chip's Memory due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x52404c", - "EventName": "PM_INST_ALL_FROM_MEMORY", - "BriefDescription": "The processor's Instruction cache was reloaded from a memory location including L4 from local remote or distant due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from a memory location including L4 from local remote or distant due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x54404a", - "EventName": "PM_INST_ALL_FROM_OFF_CHIP_CACHE", - "BriefDescription": "The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x514048", - "EventName": "PM_INST_ALL_FROM_ON_CHIP_CACHE", - "BriefDescription": "The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x524046", - "EventName": "PM_INST_ALL_FROM_RL2L3_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x51404a", - "EventName": "PM_INST_ALL_FROM_RL2L3_SHR", - "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x52404a", - "EventName": "PM_INST_ALL_FROM_RL4", - "BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x53404a", - "EventName": "PM_INST_ALL_FROM_RMEM", - "BriefDescription": "The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to instruction fetches and prefetches", - "PublicDescription": "The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x524050", - "EventName": "PM_INST_ALL_GRP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was group pump (prediction=correct) for instruction fetches and prefetches", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was group pump for an instruction fetch" - }, - { - "EventCode": "0x524052", - "EventName": "PM_INST_ALL_GRP_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (Group) ended up either larger or smaller than Initial Pump Scope for instruction fetches and prefetches", - "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope OR Final Pump Scope(Group) got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump was chip or final and initial pump was gro" - }, - { - "EventCode": "0x514052", - "EventName": "PM_INST_ALL_GRP_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for instruction fetches and prefetches", - "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump was chip pumpfor an instruction fetch" - }, - { - "EventCode": "0x514054", - "EventName": "PM_INST_ALL_PUMP_CPRED", - "BriefDescription": "Pump prediction correct. Counts across all types of pumps for instruction fetches and prefetches", - "PublicDescription": "Pump prediction correct. Counts across all types of pumpsfor an instruction fetch" - }, - { - "EventCode": "0x544052", - "EventName": "PM_INST_ALL_PUMP_MPRED", - "BriefDescription": "Pump misprediction. Counts across all types of pumps for instruction fetches and prefetches", - "PublicDescription": "Pump Mis prediction Counts across all types of pumpsfor an instruction fetch" - }, - { - "EventCode": "0x534050", - "EventName": "PM_INST_ALL_SYS_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was system pump (prediction=correct) for instruction fetches and prefetches", - "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was system pump for an instruction fetch" - }, - { - "EventCode": "0x534052", - "EventName": "PM_INST_ALL_SYS_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) or the original scope was System and it should have been smaller. Counts for instruction fetches and prefetches", - "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope(Chip/Group) OR Final Pump Scope(system) got data from source that was at smaller scope(Chip/group) Final pump was system pump and initial pump was chip or group or" - }, - { - "EventCode": "0x544050", - "EventName": "PM_INST_ALL_SYS_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for instruction fetches and prefetches", - "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope (Chip or Group) for an instruction fetch" - }, - { - "EventCode": "0x4080", - "EventName": "PM_INST_FROM_L1", - "BriefDescription": "Instruction fetches from L1", - "PublicDescription": "" - }, - { - "EventCode": "0x44046", - "EventName": "PM_INST_FROM_L21_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L2 on the same chip due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L2 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x34046", - "EventName": "PM_INST_FROM_L21_SHR", - "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L2 on the same chip due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L2 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x44044", - "EventName": "PM_INST_FROM_L31_ECO_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x34044", - "EventName": "PM_INST_FROM_L31_ECO_SHR", - "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x24044", - "EventName": "PM_INST_FROM_L31_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L3 on the same chip due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x14046", - "EventName": "PM_INST_FROM_L31_SHR", - "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L3 on the same chip due to an instruction fetch (not prefetch)", - "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1" - }, - { - "EventCode": "0x30016", - "EventName": "PM_INST_IMC_MATCH_DISP", - "BriefDescription": "Matched Instructions Dispatched", - "PublicDescription": "IMC Matches dispatched" - }, - { - "EventCode": "0x30014", - "EventName": "PM_IOPS_DISP", - "BriefDescription": "Internal Operations dispatched", - "PublicDescription": "IOPS dispatched" - }, - { - "EventCode": "0x45046", - "EventName": "PM_IPTEG_FROM_L21_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x35046", - "EventName": "PM_IPTEG_FROM_L21_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L2 on the same chip due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x35040", - "EventName": "PM_IPTEG_FROM_L2_DISP_CONFLICT_LDHITST", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 with load hit store conflict due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x45040", - "EventName": "PM_IPTEG_FROM_L2_DISP_CONFLICT_OTHER", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 with dispatch conflict due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x45044", - "EventName": "PM_IPTEG_FROM_L31_ECO_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x35044", - "EventName": "PM_IPTEG_FROM_L31_ECO_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x25044", - "EventName": "PM_IPTEG_FROM_L31_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the same chip due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x15046", - "EventName": "PM_IPTEG_FROM_L31_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a instruction side request", - "PublicDescription": "" - }, - { - "EventCode": "0x617082", - "EventName": "PM_ISIDE_DISP", - "BriefDescription": "All i-side dispatch attempts", - "PublicDescription": "" - }, - { - "EventCode": "0x627084", - "EventName": "PM_ISIDE_DISP_FAIL", - "BriefDescription": "All i-side dispatch attempts that failed due to a addr collision with another machine", - "PublicDescription": "" - }, - { - "EventCode": "0x627086", - "EventName": "PM_ISIDE_DISP_FAIL_OTHER", - "BriefDescription": "All i-side dispatch attempts that failed due to a reason other than addrs collision", - "PublicDescription": "" - }, - { - "EventCode": "0x4608e", - "EventName": "PM_ISIDE_L2MEMACC", - "BriefDescription": "valid when first beat of data comes in for an i-side fetch where data came from mem(or L4)", - "PublicDescription": "" - }, - { - "EventCode": "0x44608e", - "EventName": "PM_ISIDE_MRU_TOUCH", - "BriefDescription": "Iside L2 MRU touch", - "PublicDescription": "" - }, - { - "EventCode": "0x30ac", - "EventName": "PM_ISU_REF_FX0", - "BriefDescription": "FX0 ISU reject", - "PublicDescription": "" - }, - { - "EventCode": "0x30ae", - "EventName": "PM_ISU_REF_FX1", - "BriefDescription": "FX1 ISU reject", - "PublicDescription": "" - }, - { - "EventCode": "0x38ac", - "EventName": "PM_ISU_REF_FXU", - "BriefDescription": "FXU ISU reject from either pipe", - "PublicDescription": "" - }, - { - "EventCode": "0x30b0", - "EventName": "PM_ISU_REF_LS0", - "BriefDescription": "LS0 ISU reject", - "PublicDescription": "" - }, - { - "EventCode": "0x30b2", - "EventName": "PM_ISU_REF_LS1", - "BriefDescription": "LS1 ISU reject", - "PublicDescription": "" - }, - { - "EventCode": "0x30b4", - "EventName": "PM_ISU_REF_LS2", - "BriefDescription": "LS2 ISU reject", - "PublicDescription": "" - }, - { - "EventCode": "0x30b6", - "EventName": "PM_ISU_REF_LS3", - "BriefDescription": "LS3 ISU reject", - "PublicDescription": "" - }, - { - "EventCode": "0x309c", - "EventName": "PM_ISU_REJECTS_ALL", - "BriefDescription": "All isu rejects could be more than 1 per cycle", - "PublicDescription": "" - }, - { - "EventCode": "0x30a2", - "EventName": "PM_ISU_REJECT_RES_NA", - "BriefDescription": "ISU reject due to resource not available", - "PublicDescription": "" - }, - { - "EventCode": "0x309e", - "EventName": "PM_ISU_REJECT_SAR_BYPASS", - "BriefDescription": "Reject because of SAR bypass", - "PublicDescription": "" - }, - { - "EventCode": "0x30a0", - "EventName": "PM_ISU_REJECT_SRC_NA", - "BriefDescription": "ISU reject due to source not available", - "PublicDescription": "" - }, - { - "EventCode": "0x30a8", - "EventName": "PM_ISU_REJ_VS0", - "BriefDescription": "VS0 ISU reject", - "PublicDescription": "" - }, - { - "EventCode": "0x30aa", - "EventName": "PM_ISU_REJ_VS1", - "BriefDescription": "VS1 ISU reject", - "PublicDescription": "" - }, - { - "EventCode": "0x38a8", - "EventName": "PM_ISU_REJ_VSU", - "BriefDescription": "VSU ISU reject from either pipe", - "PublicDescription": "" - }, - { - "EventCode": "0x30b8", - "EventName": "PM_ISYNC", - "BriefDescription": "Isync count per thread", - "PublicDescription": "" - }, - { - "EventCode": "0x200301ea", - "EventName": "PM_L1MISS_LAT_EXC_1024", - "BriefDescription": "L1 misses that took longer than 1024 cyles to resolve (miss to reload)", - "PublicDescription": "Reload latency exceeded 1024 cyc" - }, - { - "EventCode": "0x200401ec", - "EventName": "PM_L1MISS_LAT_EXC_2048", - "BriefDescription": "L1 misses that took longer than 2048 cyles to resolve (miss to reload)", - "PublicDescription": "Reload latency exceeded 2048 cyc" - }, - { - "EventCode": "0x200101e8", - "EventName": "PM_L1MISS_LAT_EXC_256", - "BriefDescription": "L1 misses that took longer than 256 cyles to resolve (miss to reload)", - "PublicDescription": "Reload latency exceeded 256 cyc" - }, - { - "EventCode": "0x200201e6", - "EventName": "PM_L1MISS_LAT_EXC_32", - "BriefDescription": "L1 misses that took longer than 32 cyles to resolve (miss to reload)", - "PublicDescription": "Reload latency exceeded 32 cyc" - }, - { - "EventCode": "0x26086", - "EventName": "PM_L1PF_L2MEMACC", - "BriefDescription": "valid when first beat of data comes in for an L1pref where data came from mem(or L4)", - "PublicDescription": "" - }, - { - "EventCode": "0x408c", - "EventName": "PM_L1_DEMAND_WRITE", - "BriefDescription": "Instruction Demand sectors wriittent into IL1", - "PublicDescription": "" - }, - { - "EventCode": "0x417080", - "EventName": "PM_L2_CASTOUT_MOD", - "BriefDescription": "L2 Castouts - Modified (M, Mu, Me)", - "PublicDescription": "" - }, - { - "EventCode": "0x417082", - "EventName": "PM_L2_CASTOUT_SHR", - "BriefDescription": "L2 Castouts - Shared (T, Te, Si, S)", - "PublicDescription": "" - }, - { - "EventCode": "0x27084", - "EventName": "PM_L2_CHIP_PUMP", - "BriefDescription": "RC requests that were local on chip pump attempts", - "PublicDescription": "" - }, - { - "EventCode": "0x427086", - "EventName": "PM_L2_DC_INV", - "BriefDescription": "Dcache invalidates from L2", - "PublicDescription": "" - }, - { - "EventCode": "0x44608c", - "EventName": "PM_L2_DISP_ALL_L2MISS", - "BriefDescription": "All successful Ld/St dispatches for this thread that were an L2miss", - "PublicDescription": "" - }, - { - "EventCode": "0x27086", - "EventName": "PM_L2_GROUP_PUMP", - "BriefDescription": "RC requests that were on Node Pump attempts", - "PublicDescription": "" - }, - { - "EventCode": "0x626084", - "EventName": "PM_L2_GRP_GUESS_CORRECT", - "BriefDescription": "L2 guess grp and guess was correct (data intra-6chip AND ^on-chip)", - "PublicDescription": "" - }, - { - "EventCode": "0x626086", - "EventName": "PM_L2_GRP_GUESS_WRONG", - "BriefDescription": "L2 guess grp and guess was not correct (ie data on-chip OR beyond-6chip)", - "PublicDescription": "" - }, - { - "EventCode": "0x427084", - "EventName": "PM_L2_IC_INV", - "BriefDescription": "Icache Invalidates from L2", - "PublicDescription": "" - }, - { - "EventCode": "0x436088", - "EventName": "PM_L2_INST", - "BriefDescription": "All successful I-side dispatches for this thread (excludes i_l2mru_tch reqs)", - "PublicDescription": "" - }, - { - "EventCode": "0x43608a", - "EventName": "PM_L2_INST_MISS", - "BriefDescription": "All successful i-side dispatches that were an L2miss for this thread (excludes i_l2mru_tch reqs)", - "PublicDescription": "" - }, - { - "EventCode": "0x416080", - "EventName": "PM_L2_LD", - "BriefDescription": "All successful D-side Load dispatches for this thread", - "PublicDescription": "" - }, - { - "EventCode": "0x437088", - "EventName": "PM_L2_LD_DISP", - "BriefDescription": "All successful load dispatches", - "PublicDescription": "" - }, - { - "EventCode": "0x43708a", - "EventName": "PM_L2_LD_HIT", - "BriefDescription": "All successful load dispatches that were L2 hits", - "PublicDescription": "" - }, - { - "EventCode": "0x426084", - "EventName": "PM_L2_LD_MISS", - "BriefDescription": "All successful D-Side Load dispatches that were an L2miss for this thread", - "PublicDescription": "" - }, - { - "EventCode": "0x616080", - "EventName": "PM_L2_LOC_GUESS_CORRECT", - "BriefDescription": "L2 guess loc and guess was correct (ie data local)", - "PublicDescription": "" - }, - { - "EventCode": "0x616082", - "EventName": "PM_L2_LOC_GUESS_WRONG", - "BriefDescription": "L2 guess loc and guess was not correct (ie data not on chip)", - "PublicDescription": "" - }, - { - "EventCode": "0x516080", - "EventName": "PM_L2_RCLD_DISP", - "BriefDescription": "L2 RC load dispatch attempt", - "PublicDescription": "" - }, - { - "EventCode": "0x516082", - "EventName": "PM_L2_RCLD_DISP_FAIL_ADDR", - "BriefDescription": "L2 RC load dispatch attempt failed due to address collision with RC/CO/SN/SQ", - "PublicDescription": "" - }, - { - "EventCode": "0x526084", - "EventName": "PM_L2_RCLD_DISP_FAIL_OTHER", - "BriefDescription": "L2 RC load dispatch attempt failed due to other reasons", - "PublicDescription": "" - }, - { - "EventCode": "0x536088", - "EventName": "PM_L2_RCST_DISP", - "BriefDescription": "L2 RC store dispatch attempt", - "PublicDescription": "" - }, - { - "EventCode": "0x53608a", - "EventName": "PM_L2_RCST_DISP_FAIL_ADDR", - "BriefDescription": "L2 RC store dispatch attempt failed due to address collision with RC/CO/SN/SQ", - "PublicDescription": "" - }, - { - "EventCode": "0x54608c", - "EventName": "PM_L2_RCST_DISP_FAIL_OTHER", - "BriefDescription": "L2 RC store dispatch attempt failed due to other reasons", - "PublicDescription": "" - }, - { - "EventCode": "0x537088", - "EventName": "PM_L2_RC_ST_DONE", - "BriefDescription": "RC did st to line that was Tx or Sx", - "PublicDescription": "" - }, - { - "EventCode": "0x63708a", - "EventName": "PM_L2_RTY_LD", - "BriefDescription": "RC retries on PB for any load from core", - "PublicDescription": "" - }, - { - "EventCode": "0x3708a", - "EventName": "PM_L2_RTY_ST", - "BriefDescription": "RC retries on PB for any store from core", - "PublicDescription": "" - }, - { - "EventCode": "0x54708c", - "EventName": "PM_L2_SN_M_RD_DONE", - "BriefDescription": "SNP dispatched for a read and was M", - "PublicDescription": "" - }, - { - "EventCode": "0x54708e", - "EventName": "PM_L2_SN_M_WR_DONE", - "BriefDescription": "SNP dispatched for a write and was M", - "PublicDescription": "" - }, - { - "EventCode": "0x53708a", - "EventName": "PM_L2_SN_SX_I_DONE", - "BriefDescription": "SNP dispatched and went from Sx or Tx to Ix", - "PublicDescription": "" - }, - { - "EventCode": "0x17080", - "EventName": "PM_L2_ST", - "BriefDescription": "All successful D-side store dispatches for this thread", - "PublicDescription": "" - }, - { - "EventCode": "0x44708c", - "EventName": "PM_L2_ST_DISP", - "BriefDescription": "All successful store dispatches", - "PublicDescription": "" - }, - { - "EventCode": "0x44708e", - "EventName": "PM_L2_ST_HIT", - "BriefDescription": "All successful store dispatches that were L2Hits", - "PublicDescription": "" - }, - { - "EventCode": "0x17082", - "EventName": "PM_L2_ST_MISS", - "BriefDescription": "All successful D-side store dispatches for this thread that were L2 Miss", - "PublicDescription": "" - }, - { - "EventCode": "0x636088", - "EventName": "PM_L2_SYS_GUESS_CORRECT", - "BriefDescription": "L2 guess sys and guess was correct (ie data beyond-6chip)", - "PublicDescription": "" - }, - { - "EventCode": "0x63608a", - "EventName": "PM_L2_SYS_GUESS_WRONG", - "BriefDescription": "L2 guess sys and guess was not correct (ie data ^beyond-6chip)", - "PublicDescription": "" - }, - { - "EventCode": "0x617080", - "EventName": "PM_L2_SYS_PUMP", - "BriefDescription": "RC requests that were system pump attempts", - "PublicDescription": "" - }, - { - "EventCode": "0x1e05e", - "EventName": "PM_L2_TM_REQ_ABORT", - "BriefDescription": "TM abort", - "PublicDescription": "" - }, - { - "EventCode": "0x3e05c", - "EventName": "PM_L2_TM_ST_ABORT_SISTER", - "BriefDescription": "TM marked store abort", - "PublicDescription": "" - }, - { - "EventCode": "0x23808a", - "EventName": "PM_L3_CINJ", - "BriefDescription": "l3 ci of cache inject", - "PublicDescription": "" - }, - { - "EventCode": "0x128084", - "EventName": "PM_L3_CI_HIT", - "BriefDescription": "L3 Castins Hit (total count", - "PublicDescription": "" - }, - { - "EventCode": "0x128086", - "EventName": "PM_L3_CI_MISS", - "BriefDescription": "L3 castins miss (total count", - "PublicDescription": "" - }, - { - "EventCode": "0x819082", - "EventName": "PM_L3_CI_USAGE", - "BriefDescription": "rotating sample of 16 CI or CO actives", - "PublicDescription": "" - }, - { - "EventCode": "0x438088", - "EventName": "PM_L3_CO", - "BriefDescription": "l3 castout occurring ( does not include casthrough or log writes (cinj/dmaw)", - "PublicDescription": "" - }, - { - "EventCode": "0x83908b", - "EventName": "PM_L3_CO0_ALLOC", - "BriefDescription": "lifetime, sample of CO machine 0 valid", - "PublicDescription": "0.0" - }, - { - "EventCode": "0x83908a", - "EventName": "PM_L3_CO0_BUSY", - "BriefDescription": "lifetime, sample of CO machine 0 valid", - "PublicDescription": "" - }, - { - "EventCode": "0x28086", - "EventName": "PM_L3_CO_L31", - "BriefDescription": "L3 CO to L3.1 OR of port 0 and 1 ( lossy)", - "PublicDescription": "" - }, - { - "EventCode": "0x238088", - "EventName": "PM_L3_CO_LCO", - "BriefDescription": "Total L3 castouts occurred on LCO", - "PublicDescription": "" - }, - { - "EventCode": "0x28084", - "EventName": "PM_L3_CO_MEM", - "BriefDescription": "L3 CO to memory OR of port 0 and 1 ( lossy)", - "PublicDescription": "" - }, - { - "EventCode": "0xb19082", - "EventName": "PM_L3_GRP_GUESS_CORRECT", - "BriefDescription": "Initial scope=group and data from same group (near) (pred successful)", - "PublicDescription": "" - }, - { - "EventCode": "0xb3908a", - "EventName": "PM_L3_GRP_GUESS_WRONG_HIGH", - "BriefDescription": "Initial scope=group but data from local node. Predition too high", - "PublicDescription": "" - }, - { - "EventCode": "0xb39088", - "EventName": "PM_L3_GRP_GUESS_WRONG_LOW", - "BriefDescription": "Initial scope=group but data from outside group (far or rem). Prediction too Low", - "PublicDescription": "" - }, - { - "EventCode": "0x218080", - "EventName": "PM_L3_HIT", - "BriefDescription": "L3 Hits", - "PublicDescription": "" - }, - { - "EventCode": "0x138088", - "EventName": "PM_L3_L2_CO_HIT", - "BriefDescription": "L2 castout hits", - "PublicDescription": "" - }, - { - "EventCode": "0x13808a", - "EventName": "PM_L3_L2_CO_MISS", - "BriefDescription": "L2 castout miss", - "PublicDescription": "" - }, - { - "EventCode": "0x14808c", - "EventName": "PM_L3_LAT_CI_HIT", - "BriefDescription": "L3 Lateral Castins Hit", - "PublicDescription": "" - }, - { - "EventCode": "0x14808e", - "EventName": "PM_L3_LAT_CI_MISS", - "BriefDescription": "L3 Lateral Castins Miss", - "PublicDescription": "" - }, - { - "EventCode": "0x228084", - "EventName": "PM_L3_LD_HIT", - "BriefDescription": "L3 demand LD Hits", - "PublicDescription": "" - }, - { - "EventCode": "0x228086", - "EventName": "PM_L3_LD_MISS", - "BriefDescription": "L3 demand LD Miss", - "PublicDescription": "" - }, - { - "EventCode": "0x1e052", - "EventName": "PM_L3_LD_PREF", - "BriefDescription": "L3 Load Prefetches", - "PublicDescription": "" - }, - { - "EventCode": "0xb19080", - "EventName": "PM_L3_LOC_GUESS_CORRECT", - "BriefDescription": "initial scope=node/chip and data from local node (local) (pred successful)", - "PublicDescription": "" - }, - { - "EventCode": "0xb29086", - "EventName": "PM_L3_LOC_GUESS_WRONG", - "BriefDescription": "Initial scope=node but data from out side local node (near or far or rem). Prediction too Low", - "PublicDescription": "" - }, - { - "EventCode": "0x218082", - "EventName": "PM_L3_MISS", - "BriefDescription": "L3 Misses", - "PublicDescription": "" - }, - { - "EventCode": "0x54808c", - "EventName": "PM_L3_P0_CO_L31", - "BriefDescription": "l3 CO to L3.1 (lco) port 0", - "PublicDescription": "" - }, - { - "EventCode": "0x538088", - "EventName": "PM_L3_P0_CO_MEM", - "BriefDescription": "l3 CO to memory port 0", - "PublicDescription": "" - }, - { - "EventCode": "0x929084", - "EventName": "PM_L3_P0_CO_RTY", - "BriefDescription": "L3 CO received retry port 0", - "PublicDescription": "" - }, - { - "EventCode": "0xa29084", - "EventName": "PM_L3_P0_GRP_PUMP", - "BriefDescription": "L3 pf sent with grp scope port 0", - "PublicDescription": "" - }, - { - "EventCode": "0x528084", - "EventName": "PM_L3_P0_LCO_DATA", - "BriefDescription": "lco sent with data port 0", - "PublicDescription": "" - }, - { - "EventCode": "0x518080", - "EventName": "PM_L3_P0_LCO_NO_DATA", - "BriefDescription": "dataless l3 lco sent port 0", - "PublicDescription": "" - }, - { - "EventCode": "0xa4908c", - "EventName": "PM_L3_P0_LCO_RTY", - "BriefDescription": "L3 LCO received retry port 0", - "PublicDescription": "" - }, - { - "EventCode": "0xa19080", - "EventName": "PM_L3_P0_NODE_PUMP", - "BriefDescription": "L3 pf sent with nodal scope port 0", - "PublicDescription": "" - }, - { - "EventCode": "0x919080", - "EventName": "PM_L3_P0_PF_RTY", - "BriefDescription": "L3 PF received retry port 0", - "PublicDescription": "" - }, - { - "EventCode": "0x939088", - "EventName": "PM_L3_P0_SN_HIT", - "BriefDescription": "L3 snoop hit port 0", - "PublicDescription": "" - }, - { - "EventCode": "0x118080", - "EventName": "PM_L3_P0_SN_INV", - "BriefDescription": "Port0 snooper detects someone doing a store to a line thats Sx", - "PublicDescription": "" - }, - { - "EventCode": "0x94908c", - "EventName": "PM_L3_P0_SN_MISS", - "BriefDescription": "L3 snoop miss port 0", - "PublicDescription": "" - }, - { - "EventCode": "0xa39088", - "EventName": "PM_L3_P0_SYS_PUMP", - "BriefDescription": "L3 pf sent with sys scope port 0", - "PublicDescription": "" - }, - { - "EventCode": "0x54808e", - "EventName": "PM_L3_P1_CO_L31", - "BriefDescription": "l3 CO to L3.1 (lco) port 1", - "PublicDescription": "" - }, - { - "EventCode": "0x53808a", - "EventName": "PM_L3_P1_CO_MEM", - "BriefDescription": "l3 CO to memory port 1", - "PublicDescription": "" - }, - { - "EventCode": "0x929086", - "EventName": "PM_L3_P1_CO_RTY", - "BriefDescription": "L3 CO received retry port 1", - "PublicDescription": "" - }, - { - "EventCode": "0xa29086", - "EventName": "PM_L3_P1_GRP_PUMP", - "BriefDescription": "L3 pf sent with grp scope port 1", - "PublicDescription": "" - }, - { - "EventCode": "0x528086", - "EventName": "PM_L3_P1_LCO_DATA", - "BriefDescription": "lco sent with data port 1", - "PublicDescription": "" - }, - { - "EventCode": "0x518082", - "EventName": "PM_L3_P1_LCO_NO_DATA", - "BriefDescription": "dataless l3 lco sent port 1", - "PublicDescription": "" - }, - { - "EventCode": "0xa4908e", - "EventName": "PM_L3_P1_LCO_RTY", - "BriefDescription": "L3 LCO received retry port 1", - "PublicDescription": "" - }, - { - "EventCode": "0xa19082", - "EventName": "PM_L3_P1_NODE_PUMP", - "BriefDescription": "L3 pf sent with nodal scope port 1", - "PublicDescription": "" - }, - { - "EventCode": "0x919082", - "EventName": "PM_L3_P1_PF_RTY", - "BriefDescription": "L3 PF received retry port 1", - "PublicDescription": "" - }, - { - "EventCode": "0x93908a", - "EventName": "PM_L3_P1_SN_HIT", - "BriefDescription": "L3 snoop hit port 1", - "PublicDescription": "" - }, - { - "EventCode": "0x118082", - "EventName": "PM_L3_P1_SN_INV", - "BriefDescription": "Port1 snooper detects someone doing a store to a line thats Sx", - "PublicDescription": "" - }, - { - "EventCode": "0x94908e", - "EventName": "PM_L3_P1_SN_MISS", - "BriefDescription": "L3 snoop miss port 1", - "PublicDescription": "" - }, - { - "EventCode": "0xa3908a", - "EventName": "PM_L3_P1_SYS_PUMP", - "BriefDescription": "L3 pf sent with sys scope port 1", - "PublicDescription": "" - }, - { - "EventCode": "0x84908d", - "EventName": "PM_L3_PF0_ALLOC", - "BriefDescription": "lifetime, sample of PF machine 0 valid", - "PublicDescription": "0.0" - }, - { - "EventCode": "0x84908c", - "EventName": "PM_L3_PF0_BUSY", - "BriefDescription": "lifetime, sample of PF machine 0 valid", - "PublicDescription": "" - }, - { - "EventCode": "0x428084", - "EventName": "PM_L3_PF_HIT_L3", - "BriefDescription": "l3 pf hit in l3", - "PublicDescription": "" - }, - { - "EventCode": "0x18080", - "EventName": "PM_L3_PF_MISS_L3", - "BriefDescription": "L3 Prefetch missed in L3", - "PublicDescription": "" - }, - { - "EventCode": "0x3808a", - "EventName": "PM_L3_PF_OFF_CHIP_CACHE", - "BriefDescription": "L3 Prefetch from Off chip cache", - "PublicDescription": "" - }, - { - "EventCode": "0x4808e", - "EventName": "PM_L3_PF_OFF_CHIP_MEM", - "BriefDescription": "L3 Prefetch from Off chip memory", - "PublicDescription": "" - }, - { - "EventCode": "0x38088", - "EventName": "PM_L3_PF_ON_CHIP_CACHE", - "BriefDescription": "L3 Prefetch from On chip cache", - "PublicDescription": "" - }, - { - "EventCode": "0x4808c", - "EventName": "PM_L3_PF_ON_CHIP_MEM", - "BriefDescription": "L3 Prefetch from On chip memory", - "PublicDescription": "" - }, - { - "EventCode": "0x829084", - "EventName": "PM_L3_PF_USAGE", - "BriefDescription": "rotating sample of 32 PF actives", - "PublicDescription": "" - }, - { - "EventCode": "0x4e052", - "EventName": "PM_L3_PREF_ALL", - "BriefDescription": "Total HW L3 prefetches(Load+store)", - "PublicDescription": "" - }, - { - "EventCode": "0x84908f", - "EventName": "PM_L3_RD0_ALLOC", - "BriefDescription": "lifetime, sample of RD machine 0 valid", - "PublicDescription": "0.0" - }, - { - "EventCode": "0x84908e", - "EventName": "PM_L3_RD0_BUSY", - "BriefDescription": "lifetime, sample of RD machine 0 valid", - "PublicDescription": "" - }, - { - "EventCode": "0x829086", - "EventName": "PM_L3_RD_USAGE", - "BriefDescription": "rotating sample of 16 RD actives", - "PublicDescription": "" - }, - { - "EventCode": "0x839089", - "EventName": "PM_L3_SN0_ALLOC", - "BriefDescription": "lifetime, sample of snooper machine 0 valid", - "PublicDescription": "0.0" - }, - { - "EventCode": "0x839088", - "EventName": "PM_L3_SN0_BUSY", - "BriefDescription": "lifetime, sample of snooper machine 0 valid", - "PublicDescription": "" - }, - { - "EventCode": "0x819080", - "EventName": "PM_L3_SN_USAGE", - "BriefDescription": "rotating sample of 8 snoop valids", - "PublicDescription": "" - }, - { - "EventCode": "0x2e052", - "EventName": "PM_L3_ST_PREF", - "BriefDescription": "L3 store Prefetches", - "PublicDescription": "" - }, - { - "EventCode": "0x3e052", - "EventName": "PM_L3_SW_PREF", - "BriefDescription": "Data stream touchto L3", - "PublicDescription": "" - }, - { - "EventCode": "0xb29084", - "EventName": "PM_L3_SYS_GUESS_CORRECT", - "BriefDescription": "Initial scope=system and data from outside group (far or rem)(pred successful)", - "PublicDescription": "" - }, - { - "EventCode": "0xb4908c", - "EventName": "PM_L3_SYS_GUESS_WRONG", - "BriefDescription": "Initial scope=system but data from local or near. Predction too high", - "PublicDescription": "" - }, - { - "EventCode": "0x24808e", - "EventName": "PM_L3_TRANS_PF", - "BriefDescription": "L3 Transient prefetch", - "PublicDescription": "" - }, - { - "EventCode": "0x18081", - "EventName": "PM_L3_WI0_ALLOC", - "BriefDescription": "lifetime, sample of Write Inject machine 0 valid", - "PublicDescription": "0.0" - }, - { - "EventCode": "0x418080", - "EventName": "PM_L3_WI0_BUSY", - "BriefDescription": "lifetime, sample of Write Inject machine 0 valid", - "PublicDescription": "" - }, - { - "EventCode": "0x418082", - "EventName": "PM_L3_WI_USAGE", - "BriefDescription": "rotating sample of 8 WI actives", - "PublicDescription": "" - }, - { - "EventCode": "0xc080", - "EventName": "PM_LD_REF_L1_LSU0", - "BriefDescription": "LS0 L1 D cache load references counted at finish, gated by reject", - "PublicDescription": "LS0 L1 D cache load references counted at finish, gated by rejectLSU0 L1 D cache load references" - }, - { - "EventCode": "0xc082", - "EventName": "PM_LD_REF_L1_LSU1", - "BriefDescription": "LS1 L1 D cache load references counted at finish, gated by reject", - "PublicDescription": "LS1 L1 D cache load references counted at finish, gated by rejectLSU1 L1 D cache load references" - }, - { - "EventCode": "0xc094", - "EventName": "PM_LD_REF_L1_LSU2", - "BriefDescription": "LS2 L1 D cache load references counted at finish, gated by reject", - "PublicDescription": "LS2 L1 D cache load references counted at finish, gated by reject42" - }, - { - "EventCode": "0xc096", - "EventName": "PM_LD_REF_L1_LSU3", - "BriefDescription": "LS3 L1 D cache load references counted at finish, gated by reject", - "PublicDescription": "LS3 L1 D cache load references counted at finish, gated by reject42" - }, - { - "EventCode": "0x509a", - "EventName": "PM_LINK_STACK_INVALID_PTR", - "BriefDescription": "A flush were LS ptr is invalid, results in a pop , A lot of interrupts between push and pops", - "PublicDescription": "" - }, - { - "EventCode": "0x5098", - "EventName": "PM_LINK_STACK_WRONG_ADD_PRED", - "BriefDescription": "Link stack predicts wrong address, because of link stack design limitation", - "PublicDescription": "" - }, - { - "EventCode": "0xe080", - "EventName": "PM_LS0_ERAT_MISS_PREF", - "BriefDescription": "LS0 Erat miss due to prefetch", - "PublicDescription": "LS0 Erat miss due to prefetch42" - }, - { - "EventCode": "0xd0b8", - "EventName": "PM_LS0_L1_PREF", - "BriefDescription": "LS0 L1 cache data prefetches", - "PublicDescription": "LS0 L1 cache data prefetches42" - }, - { - "EventCode": "0xc098", - "EventName": "PM_LS0_L1_SW_PREF", - "BriefDescription": "Software L1 Prefetches, including SW Transient Prefetches", - "PublicDescription": "Software L1 Prefetches, including SW Transient Prefetches42" - }, - { - "EventCode": "0xe082", - "EventName": "PM_LS1_ERAT_MISS_PREF", - "BriefDescription": "LS1 Erat miss due to prefetch", - "PublicDescription": "LS1 Erat miss due to prefetch42" - }, - { - "EventCode": "0xd0ba", - "EventName": "PM_LS1_L1_PREF", - "BriefDescription": "LS1 L1 cache data prefetches", - "PublicDescription": "LS1 L1 cache data prefetches42" - }, - { - "EventCode": "0xc09a", - "EventName": "PM_LS1_L1_SW_PREF", - "BriefDescription": "Software L1 Prefetches, including SW Transient Prefetches", - "PublicDescription": "Software L1 Prefetches, including SW Transient Prefetches42" - }, - { - "EventCode": "0xc0b0", - "EventName": "PM_LSU0_FLUSH_LRQ", - "BriefDescription": "LS0 Flush: LRQ", - "PublicDescription": "LS0 Flush: LRQLSU0 LRQ flushes" - }, - { - "EventCode": "0xc0b8", - "EventName": "PM_LSU0_FLUSH_SRQ", - "BriefDescription": "LS0 Flush: SRQ", - "PublicDescription": "LS0 Flush: SRQLSU0 SRQ lhs flushes" - }, - { - "EventCode": "0xc0a4", - "EventName": "PM_LSU0_FLUSH_ULD", - "BriefDescription": "LS0 Flush: Unaligned Load", - "PublicDescription": "LS0 Flush: Unaligned LoadLSU0 unaligned load flushes" - }, - { - "EventCode": "0xc0ac", - "EventName": "PM_LSU0_FLUSH_UST", - "BriefDescription": "LS0 Flush: Unaligned Store", - "PublicDescription": "LS0 Flush: Unaligned StoreLSU0 unaligned store flushes" - }, - { - "EventCode": "0xf088", - "EventName": "PM_LSU0_L1_CAM_CANCEL", - "BriefDescription": "ls0 l1 tm cam cancel", - "PublicDescription": "ls0 l1 tm cam cancel42" - }, - { - "EventCode": "0x1e056", - "EventName": "PM_LSU0_LARX_FIN", - "BriefDescription": "Larx finished in LSU pipe0", - "PublicDescription": "" - }, - { - "EventCode": "0xd08c", - "EventName": "PM_LSU0_LMQ_LHR_MERGE", - "BriefDescription": "LS0 Load Merged with another cacheline request", - "PublicDescription": "LS0 Load Merged with another cacheline request42" - }, - { - "EventCode": "0xc08c", - "EventName": "PM_LSU0_NCLD", - "BriefDescription": "LS0 Non-cachable Loads counted at finish", - "PublicDescription": "LS0 Non-cachable Loads counted at finishLSU0 non-cacheable loads" - }, - { - "EventCode": "0xe090", - "EventName": "PM_LSU0_PRIMARY_ERAT_HIT", - "BriefDescription": "Primary ERAT hit", - "PublicDescription": "Primary ERAT hit42" - }, - { - "EventCode": "0x1e05a", - "EventName": "PM_LSU0_REJECT", - "BriefDescription": "LSU0 reject", - "PublicDescription": "" - }, - { - "EventCode": "0xc09c", - "EventName": "PM_LSU0_SRQ_STFWD", - "BriefDescription": "LS0 SRQ forwarded data to a load", - "PublicDescription": "LS0 SRQ forwarded data to a loadLSU0 SRQ store forwarded" - }, - { - "EventCode": "0xf084", - "EventName": "PM_LSU0_STORE_REJECT", - "BriefDescription": "ls0 store reject", - "PublicDescription": "ls0 store reject42" - }, - { - "EventCode": "0xe0a8", - "EventName": "PM_LSU0_TMA_REQ_L2", - "BriefDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding", - "PublicDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding42" - }, - { - "EventCode": "0xe098", - "EventName": "PM_LSU0_TM_L1_HIT", - "BriefDescription": "Load tm hit in L1", - "PublicDescription": "Load tm hit in L142" - }, - { - "EventCode": "0xe0a0", - "EventName": "PM_LSU0_TM_L1_MISS", - "BriefDescription": "Load tm L1 miss", - "PublicDescription": "Load tm L1 miss42" - }, - { - "EventCode": "0xc0b2", - "EventName": "PM_LSU1_FLUSH_LRQ", - "BriefDescription": "LS1 Flush: LRQ", - "PublicDescription": "LS1 Flush: LRQLSU1 LRQ flushes" - }, - { - "EventCode": "0xc0ba", - "EventName": "PM_LSU1_FLUSH_SRQ", - "BriefDescription": "LS1 Flush: SRQ", - "PublicDescription": "LS1 Flush: SRQLSU1 SRQ lhs flushes" - }, - { - "EventCode": "0xc0a6", - "EventName": "PM_LSU1_FLUSH_ULD", - "BriefDescription": "LS 1 Flush: Unaligned Load", - "PublicDescription": "LS 1 Flush: Unaligned LoadLSU1 unaligned load flushes" - }, - { - "EventCode": "0xc0ae", - "EventName": "PM_LSU1_FLUSH_UST", - "BriefDescription": "LS1 Flush: Unaligned Store", - "PublicDescription": "LS1 Flush: Unaligned StoreLSU1 unaligned store flushes" - }, - { - "EventCode": "0xf08a", - "EventName": "PM_LSU1_L1_CAM_CANCEL", - "BriefDescription": "ls1 l1 tm cam cancel", - "PublicDescription": "ls1 l1 tm cam cancel42" - }, - { - "EventCode": "0x2e056", - "EventName": "PM_LSU1_LARX_FIN", - "BriefDescription": "Larx finished in LSU pipe1", - "PublicDescription": "" - }, - { - "EventCode": "0xd08e", - "EventName": "PM_LSU1_LMQ_LHR_MERGE", - "BriefDescription": "LS1 Load Merge with another cacheline request", - "PublicDescription": "LS1 Load Merge with another cacheline request42" - }, - { - "EventCode": "0xc08e", - "EventName": "PM_LSU1_NCLD", - "BriefDescription": "LS1 Non-cachable Loads counted at finish", - "PublicDescription": "LS1 Non-cachable Loads counted at finishLSU1 non-cacheable loads" - }, - { - "EventCode": "0xe092", - "EventName": "PM_LSU1_PRIMARY_ERAT_HIT", - "BriefDescription": "Primary ERAT hit", - "PublicDescription": "Primary ERAT hit42" - }, - { - "EventCode": "0x2e05a", - "EventName": "PM_LSU1_REJECT", - "BriefDescription": "LSU1 reject", - "PublicDescription": "" - }, - { - "EventCode": "0xc09e", - "EventName": "PM_LSU1_SRQ_STFWD", - "BriefDescription": "LS1 SRQ forwarded data to a load", - "PublicDescription": "LS1 SRQ forwarded data to a loadLSU1 SRQ store forwarded" - }, - { - "EventCode": "0xf086", - "EventName": "PM_LSU1_STORE_REJECT", - "BriefDescription": "ls1 store reject", - "PublicDescription": "ls1 store reject42" - }, - { - "EventCode": "0xe0aa", - "EventName": "PM_LSU1_TMA_REQ_L2", - "BriefDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding", - "PublicDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding42" - }, - { - "EventCode": "0xe09a", - "EventName": "PM_LSU1_TM_L1_HIT", - "BriefDescription": "Load tm hit in L1", - "PublicDescription": "Load tm hit in L142" - }, - { - "EventCode": "0xe0a2", - "EventName": "PM_LSU1_TM_L1_MISS", - "BriefDescription": "Load tm L1 miss", - "PublicDescription": "Load tm L1 miss42" - }, - { - "EventCode": "0xc0b4", - "EventName": "PM_LSU2_FLUSH_LRQ", - "BriefDescription": "LS02Flush: LRQ", - "PublicDescription": "LS02Flush: LRQ42" - }, - { - "EventCode": "0xc0bc", - "EventName": "PM_LSU2_FLUSH_SRQ", - "BriefDescription": "LS2 Flush: SRQ", - "PublicDescription": "LS2 Flush: SRQ42" - }, - { - "EventCode": "0xc0a8", - "EventName": "PM_LSU2_FLUSH_ULD", - "BriefDescription": "LS3 Flush: Unaligned Load", - "PublicDescription": "LS3 Flush: Unaligned Load42" - }, - { - "EventCode": "0xf08c", - "EventName": "PM_LSU2_L1_CAM_CANCEL", - "BriefDescription": "ls2 l1 tm cam cancel", - "PublicDescription": "ls2 l1 tm cam cancel42" - }, - { - "EventCode": "0x3e056", - "EventName": "PM_LSU2_LARX_FIN", - "BriefDescription": "Larx finished in LSU pipe2", - "PublicDescription": "" - }, - { - "EventCode": "0xc084", - "EventName": "PM_LSU2_LDF", - "BriefDescription": "LS2 Scalar Loads", - "PublicDescription": "LS2 Scalar Loads42" - }, - { - "EventCode": "0xc088", - "EventName": "PM_LSU2_LDX", - "BriefDescription": "LS0 Vector Loads", - "PublicDescription": "LS0 Vector Loads42" - }, - { - "EventCode": "0xd090", - "EventName": "PM_LSU2_LMQ_LHR_MERGE", - "BriefDescription": "LS0 Load Merged with another cacheline request", - "PublicDescription": "LS0 Load Merged with another cacheline request42" - }, - { - "EventCode": "0xe094", - "EventName": "PM_LSU2_PRIMARY_ERAT_HIT", - "BriefDescription": "Primary ERAT hit", - "PublicDescription": "Primary ERAT hit42" - }, - { - "EventCode": "0x3e05a", - "EventName": "PM_LSU2_REJECT", - "BriefDescription": "LSU2 reject", - "PublicDescription": "" - }, - { - "EventCode": "0xc0a0", - "EventName": "PM_LSU2_SRQ_STFWD", - "BriefDescription": "LS2 SRQ forwarded data to a load", - "PublicDescription": "LS2 SRQ forwarded data to a load42" - }, - { - "EventCode": "0xe0ac", - "EventName": "PM_LSU2_TMA_REQ_L2", - "BriefDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding", - "PublicDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding42" - }, - { - "EventCode": "0xe09c", - "EventName": "PM_LSU2_TM_L1_HIT", - "BriefDescription": "Load tm hit in L1", - "PublicDescription": "Load tm hit in L142" - }, - { - "EventCode": "0xe0a4", - "EventName": "PM_LSU2_TM_L1_MISS", - "BriefDescription": "Load tm L1 miss", - "PublicDescription": "Load tm L1 miss42" - }, - { - "EventCode": "0xc0b6", - "EventName": "PM_LSU3_FLUSH_LRQ", - "BriefDescription": "LS3 Flush: LRQ", - "PublicDescription": "LS3 Flush: LRQ42" - }, - { - "EventCode": "0xc0be", - "EventName": "PM_LSU3_FLUSH_SRQ", - "BriefDescription": "LS13 Flush: SRQ", - "PublicDescription": "LS13 Flush: SRQ42" - }, - { - "EventCode": "0xc0aa", - "EventName": "PM_LSU3_FLUSH_ULD", - "BriefDescription": "LS 14Flush: Unaligned Load", - "PublicDescription": "LS 14Flush: Unaligned Load42" - }, - { - "EventCode": "0xf08e", - "EventName": "PM_LSU3_L1_CAM_CANCEL", - "BriefDescription": "ls3 l1 tm cam cancel", - "PublicDescription": "ls3 l1 tm cam cancel42" - }, - { - "EventCode": "0x4e056", - "EventName": "PM_LSU3_LARX_FIN", - "BriefDescription": "Larx finished in LSU pipe3", - "PublicDescription": "" - }, - { - "EventCode": "0xc086", - "EventName": "PM_LSU3_LDF", - "BriefDescription": "LS3 Scalar Loads", - "PublicDescription": "LS3 Scalar Loads 42" - }, - { - "EventCode": "0xc08a", - "EventName": "PM_LSU3_LDX", - "BriefDescription": "LS1 Vector Loads", - "PublicDescription": "LS1 Vector Loads42" - }, - { - "EventCode": "0xd092", - "EventName": "PM_LSU3_LMQ_LHR_MERGE", - "BriefDescription": "LS1 Load Merge with another cacheline request", - "PublicDescription": "LS1 Load Merge with another cacheline request42" - }, - { - "EventCode": "0xe096", - "EventName": "PM_LSU3_PRIMARY_ERAT_HIT", - "BriefDescription": "Primary ERAT hit", - "PublicDescription": "Primary ERAT hit42" - }, - { - "EventCode": "0x4e05a", - "EventName": "PM_LSU3_REJECT", - "BriefDescription": "LSU3 reject", - "PublicDescription": "" - }, - { - "EventCode": "0xc0a2", - "EventName": "PM_LSU3_SRQ_STFWD", - "BriefDescription": "LS3 SRQ forwarded data to a load", - "PublicDescription": "LS3 SRQ forwarded data to a load42" - }, - { - "EventCode": "0xe0ae", - "EventName": "PM_LSU3_TMA_REQ_L2", - "BriefDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding", - "PublicDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding42" - }, - { - "EventCode": "0xe09e", - "EventName": "PM_LSU3_TM_L1_HIT", - "BriefDescription": "Load tm hit in L1", - "PublicDescription": "Load tm hit in L142" - }, - { - "EventCode": "0xe0a6", - "EventName": "PM_LSU3_TM_L1_MISS", - "BriefDescription": "Load tm L1 miss", - "PublicDescription": "Load tm L1 miss42" - }, - { - "EventCode": "0xe880", - "EventName": "PM_LSU_ERAT_MISS_PREF", - "BriefDescription": "Erat miss due to prefetch, on either pipe", - "PublicDescription": "LSU" - }, - { - "EventCode": "0xc8ac", - "EventName": "PM_LSU_FLUSH_UST", - "BriefDescription": "Unaligned Store Flush on either pipe", - "PublicDescription": "LSU" - }, - { - "EventCode": "0xd0a4", - "EventName": "PM_LSU_FOUR_TABLEWALK_CYC", - "BriefDescription": "Cycles when four tablewalks pending on this thread", - "PublicDescription": "Cycles when four tablewalks pending on this thread42" - }, - { - "EventCode": "0x10066", - "EventName": "PM_LSU_FX_FIN", - "BriefDescription": "LSU Finished a FX operation (up to 2 per cycle", - "PublicDescription": "" - }, - { - "EventCode": "0xd8b8", - "EventName": "PM_LSU_L1_PREF", - "BriefDescription": "hw initiated , include sw streaming forms as well , include sw streams as a separate event", - "PublicDescription": "LSU" - }, - { - "EventCode": "0xc898", - "EventName": "PM_LSU_L1_SW_PREF", - "BriefDescription": "Software L1 Prefetches, including SW Transient Prefetches, on both pipes", - "PublicDescription": "LSU" - }, - { - "EventCode": "0xc884", - "EventName": "PM_LSU_LDF", - "BriefDescription": "FPU loads only on LS2/LS3 ie LU0/LU1", - "PublicDescription": "LSU" - }, - { - "EventCode": "0xc888", - "EventName": "PM_LSU_LDX", - "BriefDescription": "Vector loads can issue only on LS2/LS3", - "PublicDescription": "LSU" - }, - { - "EventCode": "0xd0a2", - "EventName": "PM_LSU_LMQ_FULL_CYC", - "BriefDescription": "LMQ full", - "PublicDescription": "LMQ fullCycles LMQ full" - }, - { - "EventCode": "0xd0a1", - "EventName": "PM_LSU_LMQ_S0_ALLOC", - "BriefDescription": "Per thread - use edge detect to count allocates On a per thread basis, level signal indicating Slot 0 is valid. By instrumenting a single slot we can calculate service time for that slot. Previous machines required a separate signal indicating the slot was allocated. Because any signal can be routed to any counter in P8, we can count level in one PMC and edge detect in another PMC using the same signal", - "PublicDescription": "0.0" - }, - { - "EventCode": "0xd0a0", - "EventName": "PM_LSU_LMQ_S0_VALID", - "BriefDescription": "Slot 0 of LMQ valid", - "PublicDescription": "Slot 0 of LMQ validLMQ slot 0 valid" - }, - { - "EventCode": "0x3001c", - "EventName": "PM_LSU_LMQ_SRQ_EMPTY_ALL_CYC", - "BriefDescription": "ALL threads lsu empty (lmq and srq empty)", - "PublicDescription": "ALL threads lsu empty (lmq and srq empty). Issue HW016541" - }, - { - "EventCode": "0xd09f", - "EventName": "PM_LSU_LRQ_S0_ALLOC", - "BriefDescription": "Per thread - use edge detect to count allocates On a per thread basis, level signal indicating Slot 0 is valid. By instrumenting a single slot we can calculate service time for that slot. Previous machines required a separate signal indicating the slot was allocated. Because any signal can be routed to any counter in P8, we can count level in one PMC and edge detect in another PMC using the same signal", - "PublicDescription": "0.0" - }, - { - "EventCode": "0xd09e", - "EventName": "PM_LSU_LRQ_S0_VALID", - "BriefDescription": "Slot 0 of LRQ valid", - "PublicDescription": "Slot 0 of LRQ validLRQ slot 0 valid" - }, - { - "EventCode": "0xf091", - "EventName": "PM_LSU_LRQ_S43_ALLOC", - "BriefDescription": "LRQ slot 43 was released", - "PublicDescription": "0.0" - }, - { - "EventCode": "0xf090", - "EventName": "PM_LSU_LRQ_S43_VALID", - "BriefDescription": "LRQ slot 43 was busy", - "PublicDescription": "LRQ slot 43 was busy42" - }, - { - "EventCode": "0x30162", - "EventName": "PM_LSU_MRK_DERAT_MISS", - "BriefDescription": "DERAT Reloaded (Miss)", - "PublicDescription": "" - }, - { - "EventCode": "0xc88c", - "EventName": "PM_LSU_NCLD", - "BriefDescription": "count at finish so can return only on ls0 or ls1", - "PublicDescription": "LSU" - }, - { - "EventCode": "0xc092", - "EventName": "PM_LSU_NCST", - "BriefDescription": "Non-cachable Stores sent to nest", - "PublicDescription": "Non-cachable Stores sent to nest42" - }, - { - "EventCode": "0x10064", - "EventName": "PM_LSU_REJECT", - "BriefDescription": "LSU Reject (up to 4 per cycle)", - "PublicDescription": "" - }, - { - "EventCode": "0xd082", - "EventName": "PM_LSU_SET_MPRED", - "BriefDescription": "Line already in cache at reload time", - "PublicDescription": "Line already in cache at reload time42" - }, - { - "EventCode": "0x40008", - "EventName": "PM_LSU_SRQ_EMPTY_CYC", - "BriefDescription": "ALL threads srq empty", - "PublicDescription": "All threads srq empty" - }, - { - "EventCode": "0xd09d", - "EventName": "PM_LSU_SRQ_S0_ALLOC", - "BriefDescription": "Per thread - use edge detect to count allocates On a per thread basis, level signal indicating Slot 0 is valid. By instrumenting a single slot we can calculate service time for that slot. Previous machines required a separate signal indicating the slot was allocated. Because any signal can be routed to any counter in P8, we can count level in one PMC and edge detect in another PMC using the same signal", - "PublicDescription": "0.0" - }, - { - "EventCode": "0xd09c", - "EventName": "PM_LSU_SRQ_S0_VALID", - "BriefDescription": "Slot 0 of SRQ valid", - "PublicDescription": "Slot 0 of SRQ validSRQ slot 0 valid" - }, - { - "EventCode": "0xf093", - "EventName": "PM_LSU_SRQ_S39_ALLOC", - "BriefDescription": "SRQ slot 39 was released", - "PublicDescription": "0.0" - }, - { - "EventCode": "0xf092", - "EventName": "PM_LSU_SRQ_S39_VALID", - "BriefDescription": "SRQ slot 39 was busy", - "PublicDescription": "SRQ slot 39 was busy42" - }, - { - "EventCode": "0xd09b", - "EventName": "PM_LSU_SRQ_SYNC", - "BriefDescription": "A sync in the SRQ ended", - "PublicDescription": "0.0" - }, - { - "EventCode": "0xd09a", - "EventName": "PM_LSU_SRQ_SYNC_CYC", - "BriefDescription": "A sync is in the SRQ (edge detect to count)", - "PublicDescription": "A sync is in the SRQ (edge detect to count)SRQ sync duration" - }, - { - "EventCode": "0xf084", - "EventName": "PM_LSU_STORE_REJECT", - "BriefDescription": "Store reject on either pipe", - "PublicDescription": "LSU" - }, - { - "EventCode": "0xd0a6", - "EventName": "PM_LSU_TWO_TABLEWALK_CYC", - "BriefDescription": "Cycles when two tablewalks pending on this thread", - "PublicDescription": "Cycles when two tablewalks pending on this thread42" - }, - { - "EventCode": "0x5094", - "EventName": "PM_LWSYNC", - "BriefDescription": "threaded version, IC Misses where we got EA dir hit but no sector valids were on. ICBI took line out", - "PublicDescription": "" - }, - { - "EventCode": "0x209a", - "EventName": "PM_LWSYNC_HELD", - "BriefDescription": "LWSYNC held at dispatch", - "PublicDescription": "" - }, - { - "EventCode": "0x3013a", - "EventName": "PM_MRK_CRU_FIN", - "BriefDescription": "IFU non-branch finished", - "PublicDescription": "IFU non-branch marked instruction finished" - }, - { - "EventCode": "0x4d146", - "EventName": "PM_MRK_DATA_FROM_L21_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2d126", - "EventName": "PM_MRK_DATA_FROM_L21_MOD_CYC", - "BriefDescription": "Duration in cycles to reload with Modified (M) data from another core's L2 on the same chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x3d146", - "EventName": "PM_MRK_DATA_FROM_L21_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2c126", - "EventName": "PM_MRK_DATA_FROM_L21_SHR_CYC", - "BriefDescription": "Duration in cycles to reload with Shared (S) data from another core's L2 on the same chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4d144", - "EventName": "PM_MRK_DATA_FROM_L31_ECO_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2d124", - "EventName": "PM_MRK_DATA_FROM_L31_ECO_MOD_CYC", - "BriefDescription": "Duration in cycles to reload with Modified (M) data from another core's ECO L3 on the same chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x3d144", - "EventName": "PM_MRK_DATA_FROM_L31_ECO_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2c124", - "EventName": "PM_MRK_DATA_FROM_L31_ECO_SHR_CYC", - "BriefDescription": "Duration in cycles to reload with Shared (S) data from another core's ECO L3 on the same chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x2d144", - "EventName": "PM_MRK_DATA_FROM_L31_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4d124", - "EventName": "PM_MRK_DATA_FROM_L31_MOD_CYC", - "BriefDescription": "Duration in cycles to reload with Modified (M) data from another core's L3 on the same chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x1d146", - "EventName": "PM_MRK_DATA_FROM_L31_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4c126", - "EventName": "PM_MRK_DATA_FROM_L31_SHR_CYC", - "BriefDescription": "Duration in cycles to reload with Shared (S) data from another core's L3 on the same chip due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x201e0", - "EventName": "PM_MRK_DATA_FROM_MEM", - "BriefDescription": "The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to a marked load", - "PublicDescription": "" - }, - { - "EventCode": "0x4f146", - "EventName": "PM_MRK_DPTEG_FROM_L21_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x3f146", - "EventName": "PM_MRK_DPTEG_FROM_L21_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L2 on the same chip due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x3f140", - "EventName": "PM_MRK_DPTEG_FROM_L2_DISP_CONFLICT_LDHITST", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 with load hit store conflict due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x4f140", - "EventName": "PM_MRK_DPTEG_FROM_L2_DISP_CONFLICT_OTHER", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 with dispatch conflict due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x4f144", - "EventName": "PM_MRK_DPTEG_FROM_L31_ECO_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x3f144", - "EventName": "PM_MRK_DPTEG_FROM_L31_ECO_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x2f144", - "EventName": "PM_MRK_DPTEG_FROM_L31_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the same chip due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1f146", - "EventName": "PM_MRK_DPTEG_FROM_L31_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a marked data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x30156", - "EventName": "PM_MRK_FAB_RSP_MATCH", - "BriefDescription": "ttype and cresp matched as specified in MMCR1", - "PublicDescription": "" - }, - { - "EventCode": "0x4f152", - "EventName": "PM_MRK_FAB_RSP_MATCH_CYC", - "BriefDescription": "cresp/ttype match cycles", - "PublicDescription": "" - }, - { - "EventCode": "0x2013c", - "EventName": "PM_MRK_FILT_MATCH", - "BriefDescription": "Marked filter Match", - "PublicDescription": "" - }, - { - "EventCode": "0x1013c", - "EventName": "PM_MRK_FIN_STALL_CYC", - "BriefDescription": "Marked instruction Finish Stall cycles (marked finish after NTC) (use edge detect to count )", - "PublicDescription": "Marked instruction Finish Stall cycles (marked finish after NTC) (use edge detect to count #)" - }, - { - "EventCode": "0x40130", - "EventName": "PM_MRK_GRP_CMPL", - "BriefDescription": "marked instruction finished (completed)", - "PublicDescription": "" - }, - { - "EventCode": "0x4013a", - "EventName": "PM_MRK_GRP_IC_MISS", - "BriefDescription": "Marked Group experienced I cache miss", - "PublicDescription": "" - }, - { - "EventCode": "0x3013c", - "EventName": "PM_MRK_GRP_NTC", - "BriefDescription": "Marked group ntc cycles", - "PublicDescription": "" - }, - { - "EventCode": "0x1013f", - "EventName": "PM_MRK_LD_MISS_EXPOSED", - "BriefDescription": "Marked Load exposed Miss (exposed period ended)", - "PublicDescription": "Marked Load exposed Miss (use edge detect to count #)" - }, - { - "EventCode": "0xd180", - "EventName": "PM_MRK_LSU_FLUSH", - "BriefDescription": "Flush: (marked) : All Cases", - "PublicDescription": "Flush: (marked) : All Cases42" - }, - { - "EventCode": "0xd188", - "EventName": "PM_MRK_LSU_FLUSH_LRQ", - "BriefDescription": "Flush: (marked) LRQ", - "PublicDescription": "Flush: (marked) LRQMarked LRQ flushes" - }, - { - "EventCode": "0xd18a", - "EventName": "PM_MRK_LSU_FLUSH_SRQ", - "BriefDescription": "Flush: (marked) SRQ", - "PublicDescription": "Flush: (marked) SRQMarked SRQ lhs flushes" - }, - { - "EventCode": "0xd184", - "EventName": "PM_MRK_LSU_FLUSH_ULD", - "BriefDescription": "Flush: (marked) Unaligned Load", - "PublicDescription": "Flush: (marked) Unaligned LoadMarked unaligned load flushes" - }, - { - "EventCode": "0xd186", - "EventName": "PM_MRK_LSU_FLUSH_UST", - "BriefDescription": "Flush: (marked) Unaligned Store", - "PublicDescription": "Flush: (marked) Unaligned StoreMarked unaligned store flushes" - }, - { - "EventCode": "0x40164", - "EventName": "PM_MRK_LSU_REJECT", - "BriefDescription": "LSU marked reject (up to 2 per cycle)", - "PublicDescription": "" - }, - { - "EventCode": "0x30164", - "EventName": "PM_MRK_LSU_REJECT_ERAT_MISS", - "BriefDescription": "LSU marked reject due to ERAT (up to 2 per cycle)", - "PublicDescription": "" - }, - { - "EventCode": "0x1d15a", - "EventName": "PM_MRK_SRC_PREF_TRACK_EFF", - "BriefDescription": "Marked src pref track was effective", - "PublicDescription": "" - }, - { - "EventCode": "0x3d15a", - "EventName": "PM_MRK_SRC_PREF_TRACK_INEFF", - "BriefDescription": "Prefetch tracked was ineffective for marked src", - "PublicDescription": "" - }, - { - "EventCode": "0x4d15c", - "EventName": "PM_MRK_SRC_PREF_TRACK_MOD", - "BriefDescription": "Prefetch tracked was moderate for marked src", - "PublicDescription": "" - }, - { - "EventCode": "0x1d15c", - "EventName": "PM_MRK_SRC_PREF_TRACK_MOD_L2", - "BriefDescription": "Marked src Prefetch Tracked was moderate (source L2)", - "PublicDescription": "" - }, - { - "EventCode": "0x3d15c", - "EventName": "PM_MRK_SRC_PREF_TRACK_MOD_L3", - "BriefDescription": "Prefetch tracked was moderate (L3 hit) for marked src", - "PublicDescription": "" - }, - { - "EventCode": "0x1c15a", - "EventName": "PM_MRK_TGT_PREF_TRACK_EFF", - "BriefDescription": "Marked target pref track was effective", - "PublicDescription": "" - }, - { - "EventCode": "0x3c15a", - "EventName": "PM_MRK_TGT_PREF_TRACK_INEFF", - "BriefDescription": "Prefetch tracked was ineffective for marked target", - "PublicDescription": "" - }, - { - "EventCode": "0x4c15c", - "EventName": "PM_MRK_TGT_PREF_TRACK_MOD", - "BriefDescription": "Prefetch tracked was moderate for marked target", - "PublicDescription": "" - }, - { - "EventCode": "0x1c15c", - "EventName": "PM_MRK_TGT_PREF_TRACK_MOD_L2", - "BriefDescription": "Marked target Prefetch Tracked was moderate (source L2)", - "PublicDescription": "" - }, - { - "EventCode": "0x3c15c", - "EventName": "PM_MRK_TGT_PREF_TRACK_MOD_L3", - "BriefDescription": "Prefetch tracked was moderate (L3 hit) for marked target", - "PublicDescription": "" - }, - { - "EventCode": "0x20b0", - "EventName": "PM_NESTED_TEND", - "BriefDescription": "Completion time nested tend", - "PublicDescription": "" - }, - { - "EventCode": "0x20b6", - "EventName": "PM_NON_FAV_TBEGIN", - "BriefDescription": "Dispatch time non favored tbegin", - "PublicDescription": "" - }, - { - "EventCode": "0x328084", - "EventName": "PM_NON_TM_RST_SC", - "BriefDescription": "non tm snp rst tm sc", - "PublicDescription": "" - }, - { - "EventCode": "0x2001a", - "EventName": "PM_NTCG_ALL_FIN", - "BriefDescription": "Cycles after all instructions have finished to group completed", - "PublicDescription": "Ccycles after all instructions have finished to group completed" - }, - { - "EventCode": "0x20ac", - "EventName": "PM_OUTER_TBEGIN", - "BriefDescription": "Completion time outer tbegin", - "PublicDescription": "" - }, - { - "EventCode": "0x20ae", - "EventName": "PM_OUTER_TEND", - "BriefDescription": "Completion time outer tend", - "PublicDescription": "" - }, - { - "EventCode": "0x2005a", - "EventName": "PM_PREF_TRACKED", - "BriefDescription": "Total number of Prefetch Operations that were tracked", - "PublicDescription": "" - }, - { - "EventCode": "0x1005a", - "EventName": "PM_PREF_TRACK_EFF", - "BriefDescription": "Prefetch Tracked was effective", - "PublicDescription": "" - }, - { - "EventCode": "0x3005a", - "EventName": "PM_PREF_TRACK_INEFF", - "BriefDescription": "Prefetch tracked was ineffective", - "PublicDescription": "" - }, - { - "EventCode": "0x4005a", - "EventName": "PM_PREF_TRACK_MOD", - "BriefDescription": "Prefetch tracked was moderate", - "PublicDescription": "" - }, - { - "EventCode": "0x1005c", - "EventName": "PM_PREF_TRACK_MOD_L2", - "BriefDescription": "Prefetch Tracked was moderate (source L2)", - "PublicDescription": "" - }, - { - "EventCode": "0x3005c", - "EventName": "PM_PREF_TRACK_MOD_L3", - "BriefDescription": "Prefetch tracked was moderate (L3)", - "PublicDescription": "" - }, - { - "EventCode": "0xe084", - "EventName": "PM_PTE_PREFETCH", - "BriefDescription": "PTE prefetches", - "PublicDescription": "PTE prefetches42" - }, - { - "EventCode": "0x16081", - "EventName": "PM_RC0_ALLOC", - "BriefDescription": "RC mach 0 Busy. Used by PMU to sample ave RC livetime(mach0 used as sample point)", - "PublicDescription": "0.0" - }, - { - "EventCode": "0x16080", - "EventName": "PM_RC0_BUSY", - "BriefDescription": "RC mach 0 Busy. Used by PMU to sample ave RC livetime(mach0 used as sample point)", - "PublicDescription": "" - }, - { - "EventCode": "0x200301ea", - "EventName": "PM_RC_LIFETIME_EXC_1024", - "BriefDescription": "Number of times the RC machine for a sampled instruction was active for more than 1024 cycles", - "PublicDescription": "Reload latency exceeded 1024 cyc" - }, - { - "EventCode": "0x200401ec", - "EventName": "PM_RC_LIFETIME_EXC_2048", - "BriefDescription": "Number of times the RC machine for a sampled instruction was active for more than 2048 cycles", - "PublicDescription": "Threshold counter exceeded a value of 2048" - }, - { - "EventCode": "0x200101e8", - "EventName": "PM_RC_LIFETIME_EXC_256", - "BriefDescription": "Number of times the RC machine for a sampled instruction was active for more than 256 cycles", - "PublicDescription": "Threshold counter exceed a count of 256" - }, - { - "EventCode": "0x200201e6", - "EventName": "PM_RC_LIFETIME_EXC_32", - "BriefDescription": "Number of times the RC machine for a sampled instruction was active for more than 32 cycles", - "PublicDescription": "Reload latency exceeded 32 cyc" - }, - { - "EventCode": "0x36088", - "EventName": "PM_RC_USAGE", - "BriefDescription": "Continuous 16 cycle(2to1) window where this signals rotates thru sampling each L2 RC machine busy. PMU uses this wave to then do 16 cyc count to sample total number of machs running", - "PublicDescription": "" - }, - { - "EventCode": "0x34808e", - "EventName": "PM_RD_CLEARING_SC", - "BriefDescription": "rd clearing sc", - "PublicDescription": "" - }, - { - "EventCode": "0x34808c", - "EventName": "PM_RD_FORMING_SC", - "BriefDescription": "rd forming sc", - "PublicDescription": "" - }, - { - "EventCode": "0x428086", - "EventName": "PM_RD_HIT_PF", - "BriefDescription": "rd machine hit l3 pf machine", - "PublicDescription": "" - }, - { - "EventCode": "0x20004", - "EventName": "PM_REAL_SRQ_FULL", - "BriefDescription": "Out of real srq entries", - "PublicDescription": "" - }, - { - "EventCode": "0x2006a", - "EventName": "PM_RUN_CYC_SMT2_SHRD_MODE", - "BriefDescription": "cycles this threads run latch is set and the core is in SMT2 shared mode", - "PublicDescription": "Cycles run latch is set and core is in SMT2-shared mode" - }, - { - "EventCode": "0x1006a", - "EventName": "PM_RUN_CYC_SMT2_SPLIT_MODE", - "BriefDescription": "Cycles run latch is set and core is in SMT2-split mode", - "PublicDescription": "" - }, - { - "EventCode": "0x4006c", - "EventName": "PM_RUN_CYC_SMT8_MODE", - "BriefDescription": "Cycles run latch is set and core is in SMT8 mode", - "PublicDescription": "" - }, - { - "EventCode": "0xf082", - "EventName": "PM_SEC_ERAT_HIT", - "BriefDescription": "secondary ERAT Hit", - "PublicDescription": "secondary ERAT Hit42" - }, - { - "EventCode": "0x508c", - "EventName": "PM_SHL_CREATED", - "BriefDescription": "Store-Hit-Load Table Entry Created", - "PublicDescription": "" - }, - { - "EventCode": "0x508e", - "EventName": "PM_SHL_ST_CONVERT", - "BriefDescription": "Store-Hit-Load Table Read Hit with entry Enabled", - "PublicDescription": "" - }, - { - "EventCode": "0x5090", - "EventName": "PM_SHL_ST_DISABLE", - "BriefDescription": "Store-Hit-Load Table Read Hit with entry Disabled (entry was disabled due to the entry shown to not prevent the flush)", - "PublicDescription": "" - }, - { - "EventCode": "0x26085", - "EventName": "PM_SN0_ALLOC", - "BriefDescription": "SN mach 0 Busy. Used by PMU to sample ave RC livetime(mach0 used as sample point)", - "PublicDescription": "0.0" - }, - { - "EventCode": "0x26084", - "EventName": "PM_SN0_BUSY", - "BriefDescription": "SN mach 0 Busy. Used by PMU to sample ave RC livetime(mach0 used as sample point)", - "PublicDescription": "" - }, - { - "EventCode": "0xd0b2", - "EventName": "PM_SNOOP_TLBIE", - "BriefDescription": "TLBIE snoop", - "PublicDescription": "TLBIE snoopSnoop TLBIE" - }, - { - "EventCode": "0x338088", - "EventName": "PM_SNP_TM_HIT_M", - "BriefDescription": "snp tm st hit m mu", - "PublicDescription": "" - }, - { - "EventCode": "0x33808a", - "EventName": "PM_SNP_TM_HIT_T", - "BriefDescription": "snp tm_st_hit t tn te", - "PublicDescription": "" - }, - { - "EventCode": "0x4608c", - "EventName": "PM_SN_USAGE", - "BriefDescription": "Continuous 16 cycle(2to1) window where this signals rotates thru sampling each L2 SN machine busy. PMU uses this wave to then do 16 cyc count to sample total number of machs running", - "PublicDescription": "" - }, - { - "EventCode": "0x10028", - "EventName": "PM_STALL_END_GCT_EMPTY", - "BriefDescription": "Count ended because GCT went empty", - "PublicDescription": "" - }, - { - "EventCode": "0xc090", - "EventName": "PM_STCX_LSU", - "BriefDescription": "STCX executed reported at sent to nest", - "PublicDescription": "STCX executed reported at sent to nest42" - }, - { - "EventCode": "0x717080", - "EventName": "PM_ST_CAUSED_FAIL", - "BriefDescription": "Non TM St caused any thread to fail", - "PublicDescription": "" - }, - { - "EventCode": "0x3090", - "EventName": "PM_SWAP_CANCEL", - "BriefDescription": "SWAP cancel , rtag not available", - "PublicDescription": "" - }, - { - "EventCode": "0x3092", - "EventName": "PM_SWAP_CANCEL_GPR", - "BriefDescription": "SWAP cancel , rtag not available for gpr", - "PublicDescription": "" - }, - { - "EventCode": "0x308c", - "EventName": "PM_SWAP_COMPLETE", - "BriefDescription": "swap cast in completed", - "PublicDescription": "" - }, - { - "EventCode": "0x308e", - "EventName": "PM_SWAP_COMPLETE_GPR", - "BriefDescription": "swap cast in completed fpr gpr", - "PublicDescription": "" - }, - { - "EventCode": "0xe086", - "EventName": "PM_TABLEWALK_CYC_PREF", - "BriefDescription": "tablewalk qualified for pte prefetches", - "PublicDescription": "tablewalk qualified for pte prefetches42" - }, - { - "EventCode": "0x20b2", - "EventName": "PM_TABORT_TRECLAIM", - "BriefDescription": "Completion time tabortnoncd, tabortcd, treclaim", - "PublicDescription": "" - }, - { - "EventCode": "0xe0ba", - "EventName": "PM_TEND_PEND_CYC", - "BriefDescription": "TEND latency per thread", - "PublicDescription": "TEND latency per thread42" - }, - { - "EventCode": "0x10012", - "EventName": "PM_THRD_GRP_CMPL_BOTH_CYC", - "BriefDescription": "Cycles group completed on both completion slots by any thread", - "PublicDescription": "Two threads finished same cycle (gated by run latch)" - }, - { - "EventCode": "0x40bc", - "EventName": "PM_THRD_PRIO_0_1_CYC", - "BriefDescription": "Cycles thread running at priority level 0 or 1", - "PublicDescription": "" - }, - { - "EventCode": "0x40be", - "EventName": "PM_THRD_PRIO_2_3_CYC", - "BriefDescription": "Cycles thread running at priority level 2 or 3", - "PublicDescription": "" - }, - { - "EventCode": "0x5080", - "EventName": "PM_THRD_PRIO_4_5_CYC", - "BriefDescription": "Cycles thread running at priority level 4 or 5", - "PublicDescription": "" - }, - { - "EventCode": "0x5082", - "EventName": "PM_THRD_PRIO_6_7_CYC", - "BriefDescription": "Cycles thread running at priority level 6 or 7", - "PublicDescription": "" - }, - { - "EventCode": "0x3098", - "EventName": "PM_THRD_REBAL_CYC", - "BriefDescription": "cycles rebalance was active", - "PublicDescription": "" - }, - { - "EventCode": "0x20b8", - "EventName": "PM_TM_BEGIN_ALL", - "BriefDescription": "Tm any tbegin", - "PublicDescription": "" - }, - { - "EventCode": "0x318082", - "EventName": "PM_TM_CAM_OVERFLOW", - "BriefDescription": "l3 tm cam overflow during L2 co of SC", - "PublicDescription": "" - }, - { - "EventCode": "0x74708c", - "EventName": "PM_TM_CAP_OVERFLOW", - "BriefDescription": "TM Footprint Capactiy Overflow", - "PublicDescription": "" - }, - { - "EventCode": "0x20ba", - "EventName": "PM_TM_END_ALL", - "BriefDescription": "Tm any tend", - "PublicDescription": "" - }, - { - "EventCode": "0x3086", - "EventName": "PM_TM_FAIL_CONF_NON_TM", - "BriefDescription": "TEXAS fail reason @ completion", - "PublicDescription": "" - }, - { - "EventCode": "0x3088", - "EventName": "PM_TM_FAIL_CON_TM", - "BriefDescription": "TEXAS fail reason @ completion", - "PublicDescription": "" - }, - { - "EventCode": "0xe0b2", - "EventName": "PM_TM_FAIL_DISALLOW", - "BriefDescription": "TM fail disallow", - "PublicDescription": "TM fail disallow42" - }, - { - "EventCode": "0x3084", - "EventName": "PM_TM_FAIL_FOOTPRINT_OVERFLOW", - "BriefDescription": "TEXAS fail reason @ completion", - "PublicDescription": "" - }, - { - "EventCode": "0xe0b8", - "EventName": "PM_TM_FAIL_NON_TX_CONFLICT", - "BriefDescription": "Non transactional conflict from LSU whtver gets repoted to texas", - "PublicDescription": "Non transactional conflict from LSU whtver gets repoted to texas42" - }, - { - "EventCode": "0x308a", - "EventName": "PM_TM_FAIL_SELF", - "BriefDescription": "TEXAS fail reason @ completion", - "PublicDescription": "" - }, - { - "EventCode": "0xe0b4", - "EventName": "PM_TM_FAIL_TLBIE", - "BriefDescription": "TLBIE hit bloom filter", - "PublicDescription": "TLBIE hit bloom filter42" - }, - { - "EventCode": "0xe0b6", - "EventName": "PM_TM_FAIL_TX_CONFLICT", - "BriefDescription": "Transactional conflict from LSU, whatever gets reported to texas", - "PublicDescription": "Transactional conflict from LSU, whatever gets reported to texas 42" - }, - { - "EventCode": "0x727086", - "EventName": "PM_TM_FAV_CAUSED_FAIL", - "BriefDescription": "TM Load (fav) caused another thread to fail", - "PublicDescription": "" - }, - { - "EventCode": "0x717082", - "EventName": "PM_TM_LD_CAUSED_FAIL", - "BriefDescription": "Non TM Ld caused any thread to fail", - "PublicDescription": "" - }, - { - "EventCode": "0x727084", - "EventName": "PM_TM_LD_CONF", - "BriefDescription": "TM Load (fav or non-fav) ran into conflict (failed)", - "PublicDescription": "" - }, - { - "EventCode": "0x328086", - "EventName": "PM_TM_RST_SC", - "BriefDescription": "tm snp rst tm sc", - "PublicDescription": "" - }, - { - "EventCode": "0x318080", - "EventName": "PM_TM_SC_CO", - "BriefDescription": "l3 castout tm Sc line", - "PublicDescription": "" - }, - { - "EventCode": "0x73708a", - "EventName": "PM_TM_ST_CAUSED_FAIL", - "BriefDescription": "TM Store (fav or non-fav) caused another thread to fail", - "PublicDescription": "" - }, - { - "EventCode": "0x737088", - "EventName": "PM_TM_ST_CONF", - "BriefDescription": "TM Store (fav or non-fav) ran into conflict (failed)", - "PublicDescription": "" - }, - { - "EventCode": "0x20bc", - "EventName": "PM_TM_TBEGIN", - "BriefDescription": "Tm nested tbegin", - "PublicDescription": "" - }, - { - "EventCode": "0x3080", - "EventName": "PM_TM_TRESUME", - "BriefDescription": "Tm resume", - "PublicDescription": "" - }, - { - "EventCode": "0x20be", - "EventName": "PM_TM_TSUSPEND", - "BriefDescription": "Tm suspend", - "PublicDescription": "" - }, - { - "EventCode": "0xe08c", - "EventName": "PM_UP_PREF_L3", - "BriefDescription": "Micropartition prefetch", - "PublicDescription": "Micropartition prefetch42" - }, - { - "EventCode": "0xe08e", - "EventName": "PM_UP_PREF_POINTER", - "BriefDescription": "Micrpartition pointer prefetches", - "PublicDescription": "Micrpartition pointer prefetches42" - }, - { - "EventCode": "0xa0a4", - "EventName": "PM_VSU0_16FLOP", - "BriefDescription": "Sixteen flops operation (SP vector versions of fdiv,fsqrt)", - "PublicDescription": "" - }, - { - "EventCode": "0xa080", - "EventName": "PM_VSU0_1FLOP", - "BriefDescription": "one flop (fadd, fmul, fsub, fcmp, fsel, fabs, fnabs, fres, fsqrte, fneg) operation finished", - "PublicDescription": "one flop (fadd, fmul, fsub, fcmp, fsel, fabs, fnabs, fres, fsqrte, fneg) operation finishedDecode into 1,2,4 FLOP according to instr IOP, multiplied by #vector elements according to route( eg x1, x2, x4) Only if instr sends finish to ISU" - }, - { - "EventCode": "0xa098", - "EventName": "PM_VSU0_2FLOP", - "BriefDescription": "two flops operation (scalar fmadd, fnmadd, fmsub, fnmsub and DP vector versions of single flop instructions)", - "PublicDescription": "" - }, - { - "EventCode": "0xa09c", - "EventName": "PM_VSU0_4FLOP", - "BriefDescription": "four flops operation (scalar fdiv, fsqrt, DP vector version of fmadd, fnmadd, fmsub, fnmsub, SP vector versions of single flop instructions)", - "PublicDescription": "" - }, - { - "EventCode": "0xa0a0", - "EventName": "PM_VSU0_8FLOP", - "BriefDescription": "eight flops operation (DP vector versions of fdiv,fsqrt and SP vector versions of fmadd,fnmadd,fmsub,fnmsub)", - "PublicDescription": "" - }, - { - "EventCode": "0xb0a4", - "EventName": "PM_VSU0_COMPLEX_ISSUED", - "BriefDescription": "Complex VMX instruction issued", - "PublicDescription": "" - }, - { - "EventCode": "0xb0b4", - "EventName": "PM_VSU0_CY_ISSUED", - "BriefDescription": "Cryptographic instruction RFC02196 Issued", - "PublicDescription": "" - }, - { - "EventCode": "0xb0a8", - "EventName": "PM_VSU0_DD_ISSUED", - "BriefDescription": "64BIT Decimal Issued", - "PublicDescription": "" - }, - { - "EventCode": "0xa08c", - "EventName": "PM_VSU0_DP_2FLOP", - "BriefDescription": "DP vector version of fmul, fsub, fcmp, fsel, fabs, fnabs, fres ,fsqrte, fneg", - "PublicDescription": "" - }, - { - "EventCode": "0xa090", - "EventName": "PM_VSU0_DP_FMA", - "BriefDescription": "DP vector version of fmadd,fnmadd,fmsub,fnmsub", - "PublicDescription": "" - }, - { - "EventCode": "0xa094", - "EventName": "PM_VSU0_DP_FSQRT_FDIV", - "BriefDescription": "DP vector versions of fdiv,fsqrt", - "PublicDescription": "" - }, - { - "EventCode": "0xb0ac", - "EventName": "PM_VSU0_DQ_ISSUED", - "BriefDescription": "128BIT Decimal Issued", - "PublicDescription": "" - }, - { - "EventCode": "0xb0b0", - "EventName": "PM_VSU0_EX_ISSUED", - "BriefDescription": "Direct move 32/64b VRFtoGPR RFC02206 Issued", - "PublicDescription": "" - }, - { - "EventCode": "0xa0bc", - "EventName": "PM_VSU0_FIN", - "BriefDescription": "VSU0 Finished an instruction", - "PublicDescription": "" - }, - { - "EventCode": "0xa084", - "EventName": "PM_VSU0_FMA", - "BriefDescription": "two flops operation (fmadd, fnmadd, fmsub, fnmsub) Scalar instructions only!", - "PublicDescription": "" - }, - { - "EventCode": "0xb098", - "EventName": "PM_VSU0_FPSCR", - "BriefDescription": "Move to/from FPSCR type instruction issued on Pipe 0", - "PublicDescription": "" - }, - { - "EventCode": "0xa088", - "EventName": "PM_VSU0_FSQRT_FDIV", - "BriefDescription": "four flops operation (fdiv,fsqrt) Scalar Instructions only!", - "PublicDescription": "" - }, - { - "EventCode": "0xb090", - "EventName": "PM_VSU0_PERMUTE_ISSUED", - "BriefDescription": "Permute VMX Instruction Issued", - "PublicDescription": "" - }, - { - "EventCode": "0xb088", - "EventName": "PM_VSU0_SCALAR_DP_ISSUED", - "BriefDescription": "Double Precision scalar instruction issued on Pipe0", - "PublicDescription": "" - }, - { - "EventCode": "0xb094", - "EventName": "PM_VSU0_SIMPLE_ISSUED", - "BriefDescription": "Simple VMX instruction issued", - "PublicDescription": "" - }, - { - "EventCode": "0xa0a8", - "EventName": "PM_VSU0_SINGLE", - "BriefDescription": "FPU single precision", - "PublicDescription": "" - }, - { - "EventCode": "0xb09c", - "EventName": "PM_VSU0_SQ", - "BriefDescription": "Store Vector Issued", - "PublicDescription": "" - }, - { - "EventCode": "0xb08c", - "EventName": "PM_VSU0_STF", - "BriefDescription": "FPU store (SP or DP) issued on Pipe0", - "PublicDescription": "" - }, - { - "EventCode": "0xb080", - "EventName": "PM_VSU0_VECTOR_DP_ISSUED", - "BriefDescription": "Double Precision vector instruction issued on Pipe0", - "PublicDescription": "" - }, - { - "EventCode": "0xb084", - "EventName": "PM_VSU0_VECTOR_SP_ISSUED", - "BriefDescription": "Single Precision vector instruction issued (executed)", - "PublicDescription": "" - }, - { - "EventCode": "0xa0a6", - "EventName": "PM_VSU1_16FLOP", - "BriefDescription": "Sixteen flops operation (SP vector versions of fdiv,fsqrt)", - "PublicDescription": "" - }, - { - "EventCode": "0xa082", - "EventName": "PM_VSU1_1FLOP", - "BriefDescription": "one flop (fadd, fmul, fsub, fcmp, fsel, fabs, fnabs, fres, fsqrte, fneg) operation finished", - "PublicDescription": "" - }, - { - "EventCode": "0xa09a", - "EventName": "PM_VSU1_2FLOP", - "BriefDescription": "two flops operation (scalar fmadd, fnmadd, fmsub, fnmsub and DP vector versions of single flop instructions)", - "PublicDescription": "" - }, - { - "EventCode": "0xa09e", - "EventName": "PM_VSU1_4FLOP", - "BriefDescription": "four flops operation (scalar fdiv, fsqrt, DP vector version of fmadd, fnmadd, fmsub, fnmsub, SP vector versions of single flop instructions)", - "PublicDescription": "" - }, - { - "EventCode": "0xa0a2", - "EventName": "PM_VSU1_8FLOP", - "BriefDescription": "eight flops operation (DP vector versions of fdiv,fsqrt and SP vector versions of fmadd,fnmadd,fmsub,fnmsub)", - "PublicDescription": "" - }, - { - "EventCode": "0xb0a6", - "EventName": "PM_VSU1_COMPLEX_ISSUED", - "BriefDescription": "Complex VMX instruction issued", - "PublicDescription": "" - }, - { - "EventCode": "0xb0b6", - "EventName": "PM_VSU1_CY_ISSUED", - "BriefDescription": "Cryptographic instruction RFC02196 Issued", - "PublicDescription": "" - }, - { - "EventCode": "0xb0aa", - "EventName": "PM_VSU1_DD_ISSUED", - "BriefDescription": "64BIT Decimal Issued", - "PublicDescription": "" - }, - { - "EventCode": "0xa08e", - "EventName": "PM_VSU1_DP_2FLOP", - "BriefDescription": "DP vector version of fmul, fsub, fcmp, fsel, fabs, fnabs, fres ,fsqrte, fneg", - "PublicDescription": "" - }, - { - "EventCode": "0xa092", - "EventName": "PM_VSU1_DP_FMA", - "BriefDescription": "DP vector version of fmadd,fnmadd,fmsub,fnmsub", - "PublicDescription": "" - }, - { - "EventCode": "0xa096", - "EventName": "PM_VSU1_DP_FSQRT_FDIV", - "BriefDescription": "DP vector versions of fdiv,fsqrt", - "PublicDescription": "" - }, - { - "EventCode": "0xb0ae", - "EventName": "PM_VSU1_DQ_ISSUED", - "BriefDescription": "128BIT Decimal Issued", - "PublicDescription": "" - }, - { - "EventCode": "0xb0b2", - "EventName": "PM_VSU1_EX_ISSUED", - "BriefDescription": "Direct move 32/64b VRFtoGPR RFC02206 Issued", - "PublicDescription": "" - }, - { - "EventCode": "0xa0be", - "EventName": "PM_VSU1_FIN", - "BriefDescription": "VSU1 Finished an instruction", - "PublicDescription": "" - }, - { - "EventCode": "0xa086", - "EventName": "PM_VSU1_FMA", - "BriefDescription": "two flops operation (fmadd, fnmadd, fmsub, fnmsub) Scalar instructions only!", - "PublicDescription": "" - }, - { - "EventCode": "0xb09a", - "EventName": "PM_VSU1_FPSCR", - "BriefDescription": "Move to/from FPSCR type instruction issued on Pipe 0", - "PublicDescription": "" - }, - { - "EventCode": "0xa08a", - "EventName": "PM_VSU1_FSQRT_FDIV", - "BriefDescription": "four flops operation (fdiv,fsqrt) Scalar Instructions only!", - "PublicDescription": "" - }, - { - "EventCode": "0xb092", - "EventName": "PM_VSU1_PERMUTE_ISSUED", - "BriefDescription": "Permute VMX Instruction Issued", - "PublicDescription": "" - }, - { - "EventCode": "0xb08a", - "EventName": "PM_VSU1_SCALAR_DP_ISSUED", - "BriefDescription": "Double Precision scalar instruction issued on Pipe1", - "PublicDescription": "" - }, - { - "EventCode": "0xb096", - "EventName": "PM_VSU1_SIMPLE_ISSUED", - "BriefDescription": "Simple VMX instruction issued", - "PublicDescription": "" - }, - { - "EventCode": "0xa0aa", - "EventName": "PM_VSU1_SINGLE", - "BriefDescription": "FPU single precision", - "PublicDescription": "" - }, - { - "EventCode": "0xb09e", - "EventName": "PM_VSU1_SQ", - "BriefDescription": "Store Vector Issued", - "PublicDescription": "" - }, - { - "EventCode": "0xb08e", - "EventName": "PM_VSU1_STF", - "BriefDescription": "FPU store (SP or DP) issued on Pipe1", - "PublicDescription": "" - }, - { - "EventCode": "0xb082", - "EventName": "PM_VSU1_VECTOR_DP_ISSUED", - "BriefDescription": "Double Precision vector instruction issued on Pipe1", - "PublicDescription": "" - }, - { - "EventCode": "0xb086", - "EventName": "PM_VSU1_VECTOR_SP_ISSUED", - "BriefDescription": "Single Precision vector instruction issued (executed)", - "PublicDescription": "" - } -] diff --git a/lib/libpmc/pmu-events/arch/powerpc/power8/pipeline.json b/lib/libpmc/pmu-events/arch/powerpc/power8/pipeline.json deleted file mode 100644 index 0acfaaef477..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power8/pipeline.json +++ /dev/null @@ -1,350 +0,0 @@ -[ - { - "EventCode": "0x100f2", - "EventName": "PM_1PLUS_PPC_CMPL", - "BriefDescription": "1 or more ppc insts finished", - "PublicDescription": "1 or more ppc insts finished (completed)" - }, - { - "EventCode": "0x400f2", - "EventName": "PM_1PLUS_PPC_DISP", - "BriefDescription": "Cycles at least one Instr Dispatched", - "PublicDescription": "Cycles at least one Instr Dispatched. Could be a group with only microcode. Issue HW016521" - }, - { - "EventCode": "0x100fa", - "EventName": "PM_ANY_THRD_RUN_CYC", - "BriefDescription": "One of threads in run_cycles", - "PublicDescription": "Any thread in run_cycles (was one thread in run_cycles)" - }, - { - "EventCode": "0x4000a", - "EventName": "PM_CMPLU_STALL", - "BriefDescription": "Completion stall", - "PublicDescription": "" - }, - { - "EventCode": "0x4d018", - "EventName": "PM_CMPLU_STALL_BRU", - "BriefDescription": "Completion stall due to a Branch Unit", - "PublicDescription": "" - }, - { - "EventCode": "0x2c012", - "EventName": "PM_CMPLU_STALL_DCACHE_MISS", - "BriefDescription": "Completion stall by Dcache miss", - "PublicDescription": "" - }, - { - "EventCode": "0x2c018", - "EventName": "PM_CMPLU_STALL_DMISS_L21_L31", - "BriefDescription": "Completion stall by Dcache miss which resolved on chip ( excluding local L2/L3)", - "PublicDescription": "" - }, - { - "EventCode": "0x2c016", - "EventName": "PM_CMPLU_STALL_DMISS_L2L3", - "BriefDescription": "Completion stall by Dcache miss which resolved in L2/L3", - "PublicDescription": "" - }, - { - "EventCode": "0x4c016", - "EventName": "PM_CMPLU_STALL_DMISS_L2L3_CONFLICT", - "BriefDescription": "Completion stall due to cache miss that resolves in the L2 or L3 with a conflict", - "PublicDescription": "Completion stall due to cache miss resolving in core's L2/L3 with a conflict" - }, - { - "EventCode": "0x4c01a", - "EventName": "PM_CMPLU_STALL_DMISS_L3MISS", - "BriefDescription": "Completion stall due to cache miss resolving missed the L3", - "PublicDescription": "" - }, - { - "EventCode": "0x4c018", - "EventName": "PM_CMPLU_STALL_DMISS_LMEM", - "BriefDescription": "Completion stall due to cache miss that resolves in local memory", - "PublicDescription": "Completion stall due to cache miss resolving in core's Local Memory" - }, - { - "EventCode": "0x2c01c", - "EventName": "PM_CMPLU_STALL_DMISS_REMOTE", - "BriefDescription": "Completion stall by Dcache miss which resolved from remote chip (cache or memory)", - "PublicDescription": "Completion stall by Dcache miss which resolved on chip ( excluding local L2/L3)" - }, - { - "EventCode": "0x4c012", - "EventName": "PM_CMPLU_STALL_ERAT_MISS", - "BriefDescription": "Completion stall due to LSU reject ERAT miss", - "PublicDescription": "" - }, - { - "EventCode": "0x4d016", - "EventName": "PM_CMPLU_STALL_FXLONG", - "BriefDescription": "Completion stall due to a long latency fixed point instruction", - "PublicDescription": "" - }, - { - "EventCode": "0x2d016", - "EventName": "PM_CMPLU_STALL_FXU", - "BriefDescription": "Completion stall due to FXU", - "PublicDescription": "" - }, - { - "EventCode": "0x30036", - "EventName": "PM_CMPLU_STALL_HWSYNC", - "BriefDescription": "completion stall due to hwsync", - "PublicDescription": "" - }, - { - "EventCode": "0x4d014", - "EventName": "PM_CMPLU_STALL_LOAD_FINISH", - "BriefDescription": "Completion stall due to a Load finish", - "PublicDescription": "" - }, - { - "EventCode": "0x2c010", - "EventName": "PM_CMPLU_STALL_LSU", - "BriefDescription": "Completion stall by LSU instruction", - "PublicDescription": "" - }, - { - "EventCode": "0x10036", - "EventName": "PM_CMPLU_STALL_LWSYNC", - "BriefDescription": "completion stall due to isync/lwsync", - "PublicDescription": "" - }, - { - "EventCode": "0x30006", - "EventName": "PM_CMPLU_STALL_OTHER_CMPL", - "BriefDescription": "Instructions core completed while this tread was stalled", - "PublicDescription": "Instructions core completed while this thread was stalled" - }, - { - "EventCode": "0x4c01c", - "EventName": "PM_CMPLU_STALL_ST_FWD", - "BriefDescription": "Completion stall due to store forward", - "PublicDescription": "" - }, - { - "EventCode": "0x1001c", - "EventName": "PM_CMPLU_STALL_THRD", - "BriefDescription": "Completion Stalled due to thread conflict. Group ready to complete but it was another thread's turn", - "PublicDescription": "Completion stall due to thread conflict" - }, - { - "EventCode": "0x1e", - "EventName": "PM_CYC", - "BriefDescription": "Cycles", - "PublicDescription": "" - }, - { - "EventCode": "0x10006", - "EventName": "PM_DISP_HELD", - "BriefDescription": "Dispatch Held", - "PublicDescription": "" - }, - { - "EventCode": "0x4003c", - "EventName": "PM_DISP_HELD_SYNC_HOLD", - "BriefDescription": "Dispatch held due to SYNC hold", - "PublicDescription": "" - }, - { - "EventCode": "0x200f8", - "EventName": "PM_EXT_INT", - "BriefDescription": "external interrupt", - "PublicDescription": "" - }, - { - "EventCode": "0x400f8", - "EventName": "PM_FLUSH", - "BriefDescription": "Flush (any type)", - "PublicDescription": "" - }, - { - "EventCode": "0x30012", - "EventName": "PM_FLUSH_COMPLETION", - "BriefDescription": "Completion Flush", - "PublicDescription": "" - }, - { - "EventCode": "0x3000c", - "EventName": "PM_FREQ_DOWN", - "BriefDescription": "Power Management: Below Threshold B", - "PublicDescription": "Frequency is being slewed down due to Power Management" - }, - { - "EventCode": "0x4000c", - "EventName": "PM_FREQ_UP", - "BriefDescription": "Power Management: Above Threshold A", - "PublicDescription": "Frequency is being slewed up due to Power Management" - }, - { - "EventCode": "0x2000a", - "EventName": "PM_HV_CYC", - "BriefDescription": "Cycles in which msr_hv is high. Note that this event does not take msr_pr into consideration", - "PublicDescription": "cycles in hypervisor mode" - }, - { - "EventCode": "0x3405e", - "EventName": "PM_IFETCH_THROTTLE", - "BriefDescription": "Cycles in which Instruction fetch throttle was active", - "PublicDescription": "Cycles instruction fecth was throttled in IFU" - }, - { - "EventCode": "0x10014", - "EventName": "PM_IOPS_CMPL", - "BriefDescription": "Internal Operations completed", - "PublicDescription": "IOPS Completed" - }, - { - "EventCode": "0x3c058", - "EventName": "PM_LARX_FIN", - "BriefDescription": "Larx finished", - "PublicDescription": "" - }, - { - "EventCode": "0x1002e", - "EventName": "PM_LD_CMPL", - "BriefDescription": "count of Loads completed", - "PublicDescription": "" - }, - { - "EventCode": "0x10062", - "EventName": "PM_LD_L3MISS_PEND_CYC", - "BriefDescription": "Cycles L3 miss was pending for this thread", - "PublicDescription": "" - }, - { - "EventCode": "0x30066", - "EventName": "PM_LSU_FIN", - "BriefDescription": "LSU Finished an instruction (up to 2 per cycle)", - "PublicDescription": "" - }, - { - "EventCode": "0x2003e", - "EventName": "PM_LSU_LMQ_SRQ_EMPTY_CYC", - "BriefDescription": "LSU empty (lmq and srq empty)", - "PublicDescription": "" - }, - { - "EventCode": "0x2e05c", - "EventName": "PM_LSU_REJECT_ERAT_MISS", - "BriefDescription": "LSU Reject due to ERAT (up to 4 per cycles)", - "PublicDescription": "" - }, - { - "EventCode": "0x4e05c", - "EventName": "PM_LSU_REJECT_LHS", - "BriefDescription": "LSU Reject due to LHS (up to 4 per cycle)", - "PublicDescription": "" - }, - { - "EventCode": "0x1e05c", - "EventName": "PM_LSU_REJECT_LMQ_FULL", - "BriefDescription": "LSU reject due to LMQ full ( 4 per cycle)", - "PublicDescription": "" - }, - { - "EventCode": "0x1001a", - "EventName": "PM_LSU_SRQ_FULL_CYC", - "BriefDescription": "Storage Queue is full and is blocking dispatch", - "PublicDescription": "SRQ is Full" - }, - { - "EventCode": "0x40014", - "EventName": "PM_PROBE_NOP_DISP", - "BriefDescription": "ProbeNops dispatched", - "PublicDescription": "" - }, - { - "EventCode": "0x600f4", - "EventName": "PM_RUN_CYC", - "BriefDescription": "Run_cycles", - "PublicDescription": "" - }, - { - "EventCode": "0x3006c", - "EventName": "PM_RUN_CYC_SMT2_MODE", - "BriefDescription": "Cycles run latch is set and core is in SMT2 mode", - "PublicDescription": "" - }, - { - "EventCode": "0x2006c", - "EventName": "PM_RUN_CYC_SMT4_MODE", - "BriefDescription": "cycles this threads run latch is set and the core is in SMT4 mode", - "PublicDescription": "Cycles run latch is set and core is in SMT4 mode" - }, - { - "EventCode": "0x1006c", - "EventName": "PM_RUN_CYC_ST_MODE", - "BriefDescription": "Cycles run latch is set and core is in ST mode", - "PublicDescription": "" - }, - { - "EventCode": "0x500fa", - "EventName": "PM_RUN_INST_CMPL", - "BriefDescription": "Run_Instructions", - "PublicDescription": "" - }, - { - "EventCode": "0x1e058", - "EventName": "PM_STCX_FAIL", - "BriefDescription": "stcx failed", - "PublicDescription": "" - }, - { - "EventCode": "0x20016", - "EventName": "PM_ST_CMPL", - "BriefDescription": "Store completion count", - "PublicDescription": "" - }, - { - "EventCode": "0x200f0", - "EventName": "PM_ST_FIN", - "BriefDescription": "Store Instructions Finished", - "PublicDescription": "Store Instructions Finished (store sent to nest)" - }, - { - "EventCode": "0x20018", - "EventName": "PM_ST_FWD", - "BriefDescription": "Store forwards that finished", - "PublicDescription": "" - }, - { - "EventCode": "0x10026", - "EventName": "PM_TABLEWALK_CYC", - "BriefDescription": "Cycles when a tablewalk (I or D) is active", - "PublicDescription": "Tablewalk Active" - }, - { - "EventCode": "0x300f8", - "EventName": "PM_TB_BIT_TRANS", - "BriefDescription": "timebase event", - "PublicDescription": "" - }, - { - "EventCode": "0x2000c", - "EventName": "PM_THRD_ALL_RUN_CYC", - "BriefDescription": "All Threads in Run_cycles (was both threads in run_cycles)", - "PublicDescription": "" - }, - { - "EventCode": "0x30058", - "EventName": "PM_TLBIE_FIN", - "BriefDescription": "tlbie finished", - "PublicDescription": "" - }, - { - "EventCode": "0x10060", - "EventName": "PM_TM_TRANS_RUN_CYC", - "BriefDescription": "run cycles in transactional state", - "PublicDescription": "" - }, - { - "EventCode": "0x2e012", - "EventName": "PM_TM_TX_PASS_RUN_CYC", - "BriefDescription": "cycles spent in successful transactions", - "PublicDescription": "run cycles spent in successful transactions" - } -] diff --git a/lib/libpmc/pmu-events/arch/powerpc/power8/pmc.json b/lib/libpmc/pmu-events/arch/powerpc/power8/pmc.json deleted file mode 100644 index 5e0469f68be..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power8/pmc.json +++ /dev/null @@ -1,140 +0,0 @@ -[ - { - "EventCode": "0x20010", - "EventName": "PM_PMC1_OVERFLOW", - "BriefDescription": "Overflow from counter 1", - "PublicDescription": "" - }, - { - "EventCode": "0x30010", - "EventName": "PM_PMC2_OVERFLOW", - "BriefDescription": "Overflow from counter 2", - "PublicDescription": "" - }, - { - "EventCode": "0x30020", - "EventName": "PM_PMC2_REWIND", - "BriefDescription": "PMC2 Rewind Event (did not match condition)", - "PublicDescription": "" - }, - { - "EventCode": "0x10022", - "EventName": "PM_PMC2_SAVED", - "BriefDescription": "PMC2 Rewind Value saved", - "PublicDescription": "PMC2 Rewind Value saved (matched condition)" - }, - { - "EventCode": "0x40010", - "EventName": "PM_PMC3_OVERFLOW", - "BriefDescription": "Overflow from counter 3", - "PublicDescription": "" - }, - { - "EventCode": "0x10010", - "EventName": "PM_PMC4_OVERFLOW", - "BriefDescription": "Overflow from counter 4", - "PublicDescription": "" - }, - { - "EventCode": "0x10020", - "EventName": "PM_PMC4_REWIND", - "BriefDescription": "PMC4 Rewind Event", - "PublicDescription": "PMC4 Rewind Event (did not match condition)" - }, - { - "EventCode": "0x30022", - "EventName": "PM_PMC4_SAVED", - "BriefDescription": "PMC4 Rewind Value saved (matched condition)", - "PublicDescription": "" - }, - { - "EventCode": "0x10024", - "EventName": "PM_PMC5_OVERFLOW", - "BriefDescription": "Overflow from counter 5", - "PublicDescription": "" - }, - { - "EventCode": "0x30024", - "EventName": "PM_PMC6_OVERFLOW", - "BriefDescription": "Overflow from counter 6", - "PublicDescription": "" - }, - { - "EventCode": "0x400f4", - "EventName": "PM_RUN_PURR", - "BriefDescription": "Run_PURR", - "PublicDescription": "" - }, - { - "EventCode": "0x10008", - "EventName": "PM_RUN_SPURR", - "BriefDescription": "Run SPURR", - "PublicDescription": "" - }, - { - "EventCode": "0x0", - "EventName": "PM_SUSPENDED", - "BriefDescription": "Counter OFF", - "PublicDescription": "" - }, - { - "EventCode": "0x301ea", - "EventName": "PM_THRESH_EXC_1024", - "BriefDescription": "Threshold counter exceeded a value of 1024", - "PublicDescription": "" - }, - { - "EventCode": "0x401ea", - "EventName": "PM_THRESH_EXC_128", - "BriefDescription": "Threshold counter exceeded a value of 128", - "PublicDescription": "" - }, - { - "EventCode": "0x401ec", - "EventName": "PM_THRESH_EXC_2048", - "BriefDescription": "Threshold counter exceeded a value of 2048", - "PublicDescription": "" - }, - { - "EventCode": "0x101e8", - "EventName": "PM_THRESH_EXC_256", - "BriefDescription": "Threshold counter exceed a count of 256", - "PublicDescription": "" - }, - { - "EventCode": "0x201e6", - "EventName": "PM_THRESH_EXC_32", - "BriefDescription": "Threshold counter exceeded a value of 32", - "PublicDescription": "" - }, - { - "EventCode": "0x101e6", - "EventName": "PM_THRESH_EXC_4096", - "BriefDescription": "Threshold counter exceed a count of 4096", - "PublicDescription": "" - }, - { - "EventCode": "0x201e8", - "EventName": "PM_THRESH_EXC_512", - "BriefDescription": "Threshold counter exceeded a value of 512", - "PublicDescription": "" - }, - { - "EventCode": "0x301e8", - "EventName": "PM_THRESH_EXC_64", - "BriefDescription": "IFU non-branch finished", - "PublicDescription": "Threshold counter exceeded a value of 64" - }, - { - "EventCode": "0x101ec", - "EventName": "PM_THRESH_MET", - "BriefDescription": "threshold exceeded", - "PublicDescription": "" - }, - { - "EventCode": "0x4016e", - "EventName": "PM_THRESH_NOT_MET", - "BriefDescription": "Threshold counter did not meet threshold", - "PublicDescription": "" - } -] diff --git a/lib/libpmc/pmu-events/arch/powerpc/power8/translation.json b/lib/libpmc/pmu-events/arch/powerpc/power8/translation.json deleted file mode 100644 index 623e7475b01..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power8/translation.json +++ /dev/null @@ -1,176 +0,0 @@ -[ - { - "EventCode": "0x4c054", - "EventName": "PM_DERAT_MISS_16G", - "BriefDescription": "Data ERAT Miss (Data TLB Access) page size 16G", - "PublicDescription": "" - }, - { - "EventCode": "0x3c054", - "EventName": "PM_DERAT_MISS_16M", - "BriefDescription": "Data ERAT Miss (Data TLB Access) page size 16M", - "PublicDescription": "" - }, - { - "EventCode": "0x1c056", - "EventName": "PM_DERAT_MISS_4K", - "BriefDescription": "Data ERAT Miss (Data TLB Access) page size 4K", - "PublicDescription": "" - }, - { - "EventCode": "0x2c054", - "EventName": "PM_DERAT_MISS_64K", - "BriefDescription": "Data ERAT Miss (Data TLB Access) page size 64K", - "PublicDescription": "" - }, - { - "EventCode": "0x4e048", - "EventName": "PM_DPTEG_FROM_DL2L3_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x3e048", - "EventName": "PM_DPTEG_FROM_DL2L3_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1e042", - "EventName": "PM_DPTEG_FROM_L2", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1e04e", - "EventName": "PM_DPTEG_FROM_L2MISS", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a localtion other than the local core's L2 due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x2e040", - "EventName": "PM_DPTEG_FROM_L2_MEPF", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1e040", - "EventName": "PM_DPTEG_FROM_L2_NO_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 without conflict due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x4e042", - "EventName": "PM_DPTEG_FROM_L3", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x3e042", - "EventName": "PM_DPTEG_FROM_L3_DISP_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 with dispatch conflict due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x2e042", - "EventName": "PM_DPTEG_FROM_L3_MEPF", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1e044", - "EventName": "PM_DPTEG_FROM_L3_NO_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without conflict due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1e04c", - "EventName": "PM_DPTEG_FROM_LL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x2e048", - "EventName": "PM_DPTEG_FROM_LMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's Memory due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x2e04c", - "EventName": "PM_DPTEG_FROM_MEMORY", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a memory location including L4 from local remote or distant due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x4e04a", - "EventName": "PM_DPTEG_FROM_OFF_CHIP_CACHE", - "BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1e048", - "EventName": "PM_DPTEG_FROM_ON_CHIP_CACHE", - "BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x2e046", - "EventName": "PM_DPTEG_FROM_RL2L3_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x1e04a", - "EventName": "PM_DPTEG_FROM_RL2L3_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x2e04a", - "EventName": "PM_DPTEG_FROM_RL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on the same Node or Group ( Remote) due to a data side request", - "PublicDescription": "" - }, - { - "EventCode": "0x300fc", - "EventName": "PM_DTLB_MISS", - "BriefDescription": "Data PTEG reload", - "PublicDescription": "Data PTEG Reloaded (DTLB Miss)" - }, - { - "EventCode": "0x1c058", - "EventName": "PM_DTLB_MISS_16G", - "BriefDescription": "Data TLB Miss page size 16G", - "PublicDescription": "" - }, - { - "EventCode": "0x4c056", - "EventName": "PM_DTLB_MISS_16M", - "BriefDescription": "Data TLB Miss page size 16M", - "PublicDescription": "" - }, - { - "EventCode": "0x2c056", - "EventName": "PM_DTLB_MISS_4K", - "BriefDescription": "Data TLB Miss page size 4k", - "PublicDescription": "" - }, - { - "EventCode": "0x3c056", - "EventName": "PM_DTLB_MISS_64K", - "BriefDescription": "Data TLB Miss page size 64K", - "PublicDescription": "" - }, - { - "EventCode": "0x200f6", - "EventName": "PM_LSU_DERAT_MISS", - "BriefDescription": "DERAT Reloaded due to a DERAT miss", - "PublicDescription": "DERAT Reloaded (Miss)" - }, - { - "EventCode": "0x20066", - "EventName": "PM_TLB_MISS", - "BriefDescription": "TLB Miss (I + D)", - "PublicDescription": "" - } -] diff --git a/lib/libpmc/pmu-events/arch/powerpc/power9/cache.json b/lib/libpmc/pmu-events/arch/powerpc/power9/cache.json deleted file mode 100644 index 522c021f5d9..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power9/cache.json +++ /dev/null @@ -1,107 +0,0 @@ -[ - { - "EventCode": "0x300F4", - "EventName": "PM_THRD_CONC_RUN_INST", - "BriefDescription": "PPC Instructions Finished by this thread when all threads in the core had the run-latch set" - }, - { - "EventCode": "0x1E056", - "EventName": "PM_CMPLU_STALL_FLUSH_ANY_THREAD", - "BriefDescription": "Cycles in which the NTC instruction is not allowed to complete because any of the 4 threads in the same core suffered a flush, which blocks completion" - }, - { - "EventCode": "0x4D016", - "EventName": "PM_CMPLU_STALL_FXLONG", - "BriefDescription": "Completion stall due to a long latency scalar fixed point instruction (division, square root)" - }, - { - "EventCode": "0x2D016", - "EventName": "PM_CMPLU_STALL_FXU", - "BriefDescription": "Finish stall due to a scalar fixed point or CR instruction in the execution pipeline. These instructions get routed to the ALU, ALU2, and DIV pipes" - }, - { - "EventCode": "0x4D12A", - "EventName": "PM_MRK_DATA_FROM_RL4_CYC", - "BriefDescription": "Duration in cycles to reload from another chip's L4 on the same Node or Group ( Remote) due to a marked load" - }, - { - "EventCode": "0x1003C", - "EventName": "PM_CMPLU_STALL_DMISS_L2L3", - "BriefDescription": "Completion stall by Dcache miss which resolved in L2/L3" - }, - { - "EventCode": "0x4C014", - "EventName": "PM_CMPLU_STALL_LMQ_FULL", - "BriefDescription": "Finish stall because the NTF instruction was a load that missed in the L1 and the LMQ was unable to accept this load miss request because it was full" - }, - { - "EventCode": "0x14048", - "EventName": "PM_INST_FROM_ON_CHIP_CACHE", - "BriefDescription": "The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x4D014", - "EventName": "PM_CMPLU_STALL_LOAD_FINISH", - "BriefDescription": "Finish stall because the NTF instruction was a load instruction with all its dependencies satisfied just going through the LSU pipe to finish" - }, - { - "EventCode": "0x2404A", - "EventName": "PM_INST_FROM_RL4", - "BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x1404A", - "EventName": "PM_INST_FROM_RL2L3_SHR", - "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x401EA", - "EventName": "PM_THRESH_EXC_128", - "BriefDescription": "Threshold counter exceeded a value of 128" - }, - { - "EventCode": "0x400F6", - "EventName": "PM_BR_MPRED_CMPL", - "BriefDescription": "Number of Branch Mispredicts" - }, - { - "EventCode": "0x2F140", - "EventName": "PM_MRK_DPTEG_FROM_L2_MEPF", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x101E6", - "EventName": "PM_THRESH_EXC_4096", - "BriefDescription": "Threshold counter exceed a count of 4096" - }, - { - "EventCode": "0x3F14A", - "EventName": "PM_MRK_DPTEG_FROM_RMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group ( Remote) due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x4C016", - "EventName": "PM_CMPLU_STALL_DMISS_L2L3_CONFLICT", - "BriefDescription": "Completion stall due to cache miss that resolves in the L2 or L3 with a conflict" - }, - { - "EventCode": "0x2C01A", - "EventName": "PM_CMPLU_STALL_LHS", - "BriefDescription": "Finish stall because the NTF instruction was a load that hit on an older store and it was waiting for store data" - }, - { - "EventCode": "0x401E4", - "EventName": "PM_MRK_DTLB_MISS", - "BriefDescription": "Marked dtlb miss" - }, - { - "EventCode": "0x24046", - "EventName": "PM_INST_FROM_RL2L3_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x1002A", - "EventName": "PM_CMPLU_STALL_LARX", - "BriefDescription": "Finish stall because the NTF instruction was a larx waiting to be satisfied" - } -] \ No newline at end of file diff --git a/lib/libpmc/pmu-events/arch/powerpc/power9/floating-point.json b/lib/libpmc/pmu-events/arch/powerpc/power9/floating-point.json deleted file mode 100644 index b66f96b5ef5..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power9/floating-point.json +++ /dev/null @@ -1,32 +0,0 @@ -[ - { - "EventCode": "0x1415A", - "EventName": "PM_MRK_DATA_FROM_L2_DISP_CONFLICT_LDHITST_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L2 with load hit store conflict due to a marked load" - }, - { - "EventCode": "0x10058", - "EventName": "PM_MEM_LOC_THRESH_IFU", - "BriefDescription": "Local Memory above threshold for IFU speculation control" - }, - { - "EventCode": "0x2D028", - "EventName": "PM_RADIX_PWC_L2_PDE_FROM_L2", - "BriefDescription": "A Page Directory Entry was reloaded to a level 2 page walk cache from the core's L2 data cache" - }, - { - "EventCode": "0x30012", - "EventName": "PM_FLUSH_COMPLETION", - "BriefDescription": "The instruction that was next to complete did not complete because it suffered a flush" - }, - { - "EventCode": "0x2D154", - "EventName": "PM_MRK_DERAT_MISS_64K", - "BriefDescription": "Marked Data ERAT Miss (Data TLB Access) page size 64K" - }, - { - "EventCode": "0x4016E", - "EventName": "PM_THRESH_NOT_MET", - "BriefDescription": "Threshold counter did not meet threshold" - } -] \ No newline at end of file diff --git a/lib/libpmc/pmu-events/arch/powerpc/power9/frontend.json b/lib/libpmc/pmu-events/arch/powerpc/power9/frontend.json deleted file mode 100644 index 07ac1cc4e7a..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power9/frontend.json +++ /dev/null @@ -1,357 +0,0 @@ -[ - { - "EventCode": "0x25044", - "EventName": "PM_IPTEG_FROM_L31_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the same chip due to a instruction side request" - }, - { - "EventCode": "0x101E8", - "EventName": "PM_THRESH_EXC_256", - "BriefDescription": "Threshold counter exceed a count of 256" - }, - { - "EventCode": "0x4504E", - "EventName": "PM_IPTEG_FROM_L3MISS", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a location other than the local core's L3 due to a instruction side request" - }, - { - "EventCode": "0x1006A", - "EventName": "PM_NTC_ISSUE_HELD_DARQ_FULL", - "BriefDescription": "The NTC instruction is being held at dispatch because there are no slots in the DARQ for it" - }, - { - "EventCode": "0x4E016", - "EventName": "PM_CMPLU_STALL_LSAQ_ARB", - "BriefDescription": "Finish stall because the NTF instruction was a load or store that was held in LSAQ because an older instruction from SRQ or LRQ won arbitration to the LSU pipe when this instruction tried to launch" - }, - { - "EventCode": "0x1001A", - "EventName": "PM_LSU_SRQ_FULL_CYC", - "BriefDescription": "Cycles in which the Store Queue is full on all 4 slices. This is event is not per thread. All the threads will see the same count for this core resource" - }, - { - "EventCode": "0x1E15E", - "EventName": "PM_MRK_L2_TM_REQ_ABORT", - "BriefDescription": "TM abort" - }, - { - "EventCode": "0x34052", - "EventName": "PM_INST_SYS_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) or the original scope was System and it should have been smaller. Counts for an instruction fetch" - }, - { - "EventCode": "0x20114", - "EventName": "PM_MRK_L2_RC_DISP", - "BriefDescription": "Marked Instruction RC dispatched in L2" - }, - { - "EventCode": "0x4C044", - "EventName": "PM_DATA_FROM_L31_ECO_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to a demand load" - }, - { - "EventCode": "0x1C044", - "EventName": "PM_DATA_FROM_L3_NO_CONFLICT", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 without conflict due to a demand load" - }, - { - "EventCode": "0x44050", - "EventName": "PM_INST_SYS_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for an instruction fetch" - }, - { - "EventCode": "0x30154", - "EventName": "PM_MRK_FAB_RSP_DCLAIM", - "BriefDescription": "Marked store had to do a dclaim" - }, - { - "EventCode": "0x30014", - "EventName": "PM_CMPLU_STALL_STORE_FIN_ARB", - "BriefDescription": "Finish stall because the NTF instruction was a store waiting for a slot in the store finish pipe. This means the instruction is ready to finish but there are instructions ahead of it, using the finish pipe" - }, - { - "EventCode": "0x3E054", - "EventName": "PM_LD_MISS_L1", - "BriefDescription": "Load Missed L1, counted at execution time (can be greater than loads finished). LMQ merges are not included in this count. i.e. if a load instruction misses on an address that is already allocated on the LMQ, this event will not increment for that load). Note that this count is per slice, so if a load spans multiple slices this event will increment multiple times for a single load." - }, - { - "EventCode": "0x2E01A", - "EventName": "PM_CMPLU_STALL_LSU_FLUSH_NEXT", - "BriefDescription": "Completion stall of one cycle because the LSU requested to flush the next iop in the sequence. It takes 1 cycle for the ISU to process this request before the LSU instruction is allowed to complete" - }, - { - "EventCode": "0x2D01C", - "EventName": "PM_CMPLU_STALL_STCX", - "BriefDescription": "Finish stall because the NTF instruction was a stcx waiting for response from L2" - }, - { - "EventCode": "0x2C010", - "EventName": "PM_CMPLU_STALL_LSU", - "BriefDescription": "Completion stall by LSU instruction" - }, - { - "EventCode": "0x2C042", - "EventName": "PM_DATA_FROM_L3_MEPF", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state due to a demand load" - }, - { - "EventCode": "0x4E012", - "EventName": "PM_CMPLU_STALL_MTFPSCR", - "BriefDescription": "Completion stall because the ISU is updating the register and notifying the Effective Address Table (EAT)" - }, - { - "EventCode": "0x100F2", - "EventName": "PM_1PLUS_PPC_CMPL", - "BriefDescription": "1 or more ppc insts finished" - }, - { - "EventCode": "0x3001C", - "EventName": "PM_LSU_REJECT_LMQ_FULL", - "BriefDescription": "LSU Reject due to LMQ full (up to 4 per cycles)" - }, - { - "EventCode": "0x15046", - "EventName": "PM_IPTEG_FROM_L31_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a instruction side request" - }, - { - "EventCode": "0x1015E", - "EventName": "PM_MRK_FAB_RSP_RD_T_INTV", - "BriefDescription": "Sampled Read got a T intervention" - }, - { - "EventCode": "0x101EC", - "EventName": "PM_THRESH_MET", - "BriefDescription": "threshold exceeded" - }, - { - "EventCode": "0x10020", - "EventName": "PM_PMC4_REWIND", - "BriefDescription": "PMC4 Rewind Event" - }, - { - "EventCode": "0x301EA", - "EventName": "PM_THRESH_EXC_1024", - "BriefDescription": "Threshold counter exceeded a value of 1024" - }, - { - "EventCode": "0x34056", - "EventName": "PM_CMPLU_STALL_LSU_MFSPR", - "BriefDescription": "Finish stall because the NTF instruction was a mfspr instruction targeting an LSU SPR and it was waiting for the register data to be returned" - }, - { - "EventCode": "0x44056", - "EventName": "PM_VECTOR_ST_CMPL", - "BriefDescription": "Number of vector store instructions completed" - }, - { - "EventCode": "0x2C124", - "EventName": "PM_MRK_DATA_FROM_L2_DISP_CONFLICT_OTHER", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 with dispatch conflict due to a marked load" - }, - { - "EventCode": "0x4C12A", - "EventName": "PM_MRK_DATA_FROM_RL2L3_SHR_CYC", - "BriefDescription": "Duration in cycles to reload with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load" - }, - { - "EventCode": "0x30060", - "EventName": "PM_TM_TRANS_RUN_INST", - "BriefDescription": "Run instructions completed in transactional state (gated by the run latch)" - }, - { - "EventCode": "0x2C014", - "EventName": "PM_CMPLU_STALL_STORE_FINISH", - "BriefDescription": "Finish stall because the NTF instruction was a store with all its dependencies met, just waiting to go through the LSU pipe to finish" - }, - { - "EventCode": "0x3515A", - "EventName": "PM_MRK_DATA_FROM_ON_CHIP_CACHE_CYC", - "BriefDescription": "Duration in cycles to reload either shared or modified data from another core's L2/L3 on the same chip due to a marked load" - }, - { - "EventCode": "0x34050", - "EventName": "PM_INST_SYS_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was system pump (prediction=correct) for an instruction fetch" - }, - { - "EventCode": "0x3015E", - "EventName": "PM_MRK_FAB_RSP_CLAIM_RTY", - "BriefDescription": "Sampled store did a rwitm and got a rty" - }, - { - "EventCode": "0x0", - "EventName": "PM_SUSPENDED", - "BriefDescription": "Counter OFF" - }, - { - "EventCode": "0x10010", - "EventName": "PM_PMC4_OVERFLOW", - "BriefDescription": "Overflow from counter 4" - }, - { - "EventCode": "0x3E04A", - "EventName": "PM_DPTEG_FROM_RMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group ( Remote) due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x2F152", - "EventName": "PM_MRK_FAB_RSP_DCLAIM_CYC", - "BriefDescription": "cycles L2 RC took for a dclaim" - }, - { - "EventCode": "0x10004", - "EventName": "PM_CMPLU_STALL_LRQ_OTHER", - "BriefDescription": "Finish stall due to LRQ miscellaneous reasons, lost arbitration to LMQ slot, bank collisions, set prediction cleanup, set prediction multihit and others" - }, - { - "EventCode": "0x4F150", - "EventName": "PM_MRK_FAB_RSP_RWITM_CYC", - "BriefDescription": "cycles L2 RC took for a rwitm" - }, - { - "EventCode": "0x4E042", - "EventName": "PM_DPTEG_FROM_L3", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x1F054", - "EventName": "PM_TLB_HIT", - "BriefDescription": "Number of times the TLB had the data required by the instruction. Applies to both HPT and RPT" - }, - { - "EventCode": "0x2C01E", - "EventName": "PM_CMPLU_STALL_SYNC_PMU_INT", - "BriefDescription": "Cycles in which the NTC instruction is waiting for a synchronous PMU interrupt" - }, - { - "EventCode": "0x24050", - "EventName": "PM_IOPS_CMPL", - "BriefDescription": "Internal Operations completed" - }, - { - "EventCode": "0x1515C", - "EventName": "PM_SYNC_MRK_BR_MPRED", - "BriefDescription": "Marked Branch mispredict that can cause a synchronous interrupt" - }, - { - "EventCode": "0x300FA", - "EventName": "PM_INST_FROM_L3MISS", - "BriefDescription": "Marked instruction was reloaded from a location beyond the local chiplet" - }, - { - "EventCode": "0x15044", - "EventName": "PM_IPTEG_FROM_L3_NO_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without conflict due to a instruction side request" - }, - { - "EventCode": "0x15152", - "EventName": "PM_SYNC_MRK_BR_LINK", - "BriefDescription": "Marked Branch and link branch that can cause a synchronous interrupt" - }, - { - "EventCode": "0x1E050", - "EventName": "PM_CMPLU_STALL_TEND", - "BriefDescription": "Finish stall because the NTF instruction was a tend instruction awaiting response from L2" - }, - { - "EventCode": "0x1013E", - "EventName": "PM_MRK_LD_MISS_EXPOSED_CYC", - "BriefDescription": "Marked Load exposed Miss (use edge detect to count #)" - }, - { - "EventCode": "0x25042", - "EventName": "PM_IPTEG_FROM_L3_MEPF", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a instruction side request" - }, - { - "EventCode": "0x14054", - "EventName": "PM_INST_PUMP_CPRED", - "BriefDescription": "Pump prediction correct. Counts across all types of pumps for an instruction fetch" - }, - { - "EventCode": "0x4015E", - "EventName": "PM_MRK_FAB_RSP_RD_RTY", - "BriefDescription": "Sampled L2 reads retry count" - }, - { - "EventCode": "0x45048", - "EventName": "PM_IPTEG_FROM_DL2L3_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a instruction side request" - }, - { - "EventCode": "0x44052", - "EventName": "PM_INST_PUMP_MPRED", - "BriefDescription": "Pump misprediction. Counts across all types of pumps for an instruction fetch" - }, - { - "EventCode": "0x30026", - "EventName": "PM_CMPLU_STALL_STORE_DATA", - "BriefDescription": "Finish stall because the next to finish instruction was a store waiting on data" - }, - { - "EventCode": "0x301E6", - "EventName": "PM_MRK_DERAT_MISS", - "BriefDescription": "Erat Miss (TLB Access) All page sizes" - }, - { - "EventCode": "0x24154", - "EventName": "PM_THRESH_ACC", - "BriefDescription": "This event increments every time the threshold event counter ticks. Thresholding must be enabled (via MMCRA) and the thresholding start event must occur for this counter to increment. It will stop incrementing when the thresholding stop event occurs or when thresholding is disabled, until the next time a configured thresholding start event occurs." - }, - { - "EventCode": "0x2015E", - "EventName": "PM_MRK_FAB_RSP_RWITM_RTY", - "BriefDescription": "Sampled store did a rwitm and got a rty" - }, - { - "EventCode": "0x200FA", - "EventName": "PM_BR_TAKEN_CMPL", - "BriefDescription": "New event for Branch Taken" - }, - { - "EventCode": "0x35044", - "EventName": "PM_IPTEG_FROM_L31_ECO_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a instruction side request" - }, - { - "EventCode": "0x4C010", - "EventName": "PM_CMPLU_STALL_STORE_PIPE_ARB", - "BriefDescription": "Finish stall because the NTF instruction was a store waiting for the next relaunch opportunity after an internal reject. This means the instruction is ready to relaunch and tried once but lost arbitration" - }, - { - "EventCode": "0x4C01C", - "EventName": "PM_CMPLU_STALL_ST_FWD", - "BriefDescription": "Completion stall due to store forward" - }, - { - "EventCode": "0x3515C", - "EventName": "PM_MRK_DATA_FROM_RL4", - "BriefDescription": "The processor's data cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to a marked load" - }, - { - "EventCode": "0x2D14C", - "EventName": "PM_MRK_DATA_FROM_L31_ECO_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to a marked load" - }, - { - "EventCode": "0x40116", - "EventName": "PM_MRK_LARX_FIN", - "BriefDescription": "Larx finished" - }, - { - "EventCode": "0x1003A", - "EventName": "PM_CMPLU_STALL_LSU_FIN", - "BriefDescription": "Finish stall because the NTF instruction was an LSU op (other than a load or a store) with all its dependencies met and just going through the LSU pipe to finish" - }, - { - "EventCode": "0x3012A", - "EventName": "PM_MRK_L2_RC_DONE", - "BriefDescription": "Marked RC done" - }, - { - "EventCode": "0x45044", - "EventName": "PM_IPTEG_FROM_L31_ECO_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a instruction side request" - } -] diff --git a/lib/libpmc/pmu-events/arch/powerpc/power9/marked.json b/lib/libpmc/pmu-events/arch/powerpc/power9/marked.json deleted file mode 100644 index 0e9d66b2cba..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power9/marked.json +++ /dev/null @@ -1,627 +0,0 @@ -[ - { - "EventCode": "0x3013E", - "EventName": "PM_MRK_STALL_CMPLU_CYC", - "BriefDescription": "Number of cycles the marked instruction is experiencing a stall while it is next to complete (NTC)" - }, - { - "EventCode": "0x4F056", - "EventName": "PM_RADIX_PWC_L1_PDE_FROM_L3MISS", - "BriefDescription": "A Page Directory Entry was reloaded to a level 1 page walk cache from beyond the core's L3 data cache. The source could be local/remote/distant memory or another core's cache" - }, - { - "EventCode": "0x24158", - "EventName": "PM_MRK_INST", - "BriefDescription": "An instruction was marked. Includes both Random Instruction Sampling (RIS) at decode time and Random Event Sampling (RES) at the time the configured event happens" - }, - { - "EventCode": "0x1E046", - "EventName": "PM_DPTEG_FROM_L31_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x3C04A", - "EventName": "PM_DATA_FROM_RMEM", - "BriefDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to a demand load" - }, - { - "EventCode": "0x2C01C", - "EventName": "PM_CMPLU_STALL_DMISS_REMOTE", - "BriefDescription": "Completion stall by Dcache miss which resolved from remote chip (cache or memory)" - }, - { - "EventCode": "0x44040", - "EventName": "PM_INST_FROM_L2_DISP_CONFLICT_OTHER", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 with dispatch conflict due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x2E050", - "EventName": "PM_DARQ0_7_9_ENTRIES", - "BriefDescription": "Cycles in which 7,8, or 9 DARQ entries (out of 12) are in use" - }, - { - "EventCode": "0x2D02E", - "EventName": "PM_RADIX_PWC_L3_PTE_FROM_L2", - "BriefDescription": "A Page Table Entry was reloaded to a level 3 page walk cache from the core's L2 data cache. This implies that a level 4 PWC access was not necessary for this translation" - }, - { - "EventCode": "0x3F05E", - "EventName": "PM_RADIX_PWC_L3_PTE_FROM_L3", - "BriefDescription": "A Page Table Entry was reloaded to a level 3 page walk cache from the core's L3 data cache. This implies that a level 4 PWC access was not necessary for this translation" - }, - { - "EventCode": "0x2E01E", - "EventName": "PM_CMPLU_STALL_NTC_FLUSH", - "BriefDescription": "Completion stall due to ntc flush" - }, - { - "EventCode": "0x1F14C", - "EventName": "PM_MRK_DPTEG_FROM_LL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a marked data side request.. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x20130", - "EventName": "PM_MRK_INST_DECODED", - "BriefDescription": "An instruction was marked at decode time. Random Instruction Sampling (RIS) only" - }, - { - "EventCode": "0x3F144", - "EventName": "PM_MRK_DPTEG_FROM_L31_ECO_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x4D058", - "EventName": "PM_VECTOR_FLOP_CMPL", - "BriefDescription": "Vector FP instruction completed" - }, - { - "EventCode": "0x14040", - "EventName": "PM_INST_FROM_L2_NO_CONFLICT", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 without conflict due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x4404E", - "EventName": "PM_INST_FROM_L3MISS_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded from a location other than the local core's L3 due to a instruction fetch" - }, - { - "EventCode": "0x3003A", - "EventName": "PM_CMPLU_STALL_EXCEPTION", - "BriefDescription": "Cycles in which the NTC instruction is not allowed to complete because it was interrupted by ANY exception, which has to be serviced before the instruction can complete" - }, - { - "EventCode": "0x4F144", - "EventName": "PM_MRK_DPTEG_FROM_L31_ECO_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x3E044", - "EventName": "PM_DPTEG_FROM_L31_ECO_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x300F6", - "EventName": "PM_L1_DCACHE_RELOAD_VALID", - "BriefDescription": "DL1 reloaded due to Demand Load" - }, - { - "EventCode": "0x1415E", - "EventName": "PM_MRK_DATA_FROM_L3MISS_CYC", - "BriefDescription": "Duration in cycles to reload from a location other than the local core's L3 due to a marked load" - }, - { - "EventCode": "0x1E052", - "EventName": "PM_CMPLU_STALL_SLB", - "BriefDescription": "Finish stall because the NTF instruction was awaiting L2 response for an SLB" - }, - { - "EventCode": "0x4404C", - "EventName": "PM_INST_FROM_DMEM", - "BriefDescription": "The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group (Distant) due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x3000E", - "EventName": "PM_FXU_1PLUS_BUSY", - "BriefDescription": "At least one of the 4 FXU units is busy" - }, - { - "EventCode": "0x2C048", - "EventName": "PM_DATA_FROM_LMEM", - "BriefDescription": "The processor's data cache was reloaded from the local chip's Memory due to a demand load" - }, - { - "EventCode": "0x3000A", - "EventName": "PM_CMPLU_STALL_PM", - "BriefDescription": "Finish stall because the NTF instruction was issued to the Permute execution pipe and waiting to finish. Includes permute and decimal fixed point instructions (128 bit BCD arithmetic) + a few 128 bit fixpoint add/subtract instructions with carry. Not qualified by vector or multicycle" - }, - { - "EventCode": "0x1504E", - "EventName": "PM_IPTEG_FROM_L2MISS", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a location other than the local core's L2 due to a instruction side request" - }, - { - "EventCode": "0x1C052", - "EventName": "PM_DATA_GRP_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for a demand load" - }, - { - "EventCode": "0x30008", - "EventName": "PM_DISP_STARVED", - "BriefDescription": "Dispatched Starved" - }, - { - "EventCode": "0x14042", - "EventName": "PM_INST_FROM_L2", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x4000C", - "EventName": "PM_FREQ_UP", - "BriefDescription": "Power Management: Above Threshold A" - }, - { - "EventCode": "0x3C050", - "EventName": "PM_DATA_SYS_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was system pump (prediction=correct) for a demand load" - }, - { - "EventCode": "0x25040", - "EventName": "PM_IPTEG_FROM_L2_MEPF", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a instruction side request" - }, - { - "EventCode": "0x10132", - "EventName": "PM_MRK_INST_ISSUED", - "BriefDescription": "Marked instruction issued" - }, - { - "EventCode": "0x1C046", - "EventName": "PM_DATA_FROM_L31_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to a demand load" - }, - { - "EventCode": "0x2C044", - "EventName": "PM_DATA_FROM_L31_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to a demand load" - }, - { - "EventCode": "0x2C04A", - "EventName": "PM_DATA_FROM_RL4", - "BriefDescription": "The processor's data cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to a demand load" - }, - { - "EventCode": "0x24044", - "EventName": "PM_INST_FROM_L31_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L3 on the same chip due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x4C050", - "EventName": "PM_DATA_SYS_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for a demand load" - }, - { - "EventCode": "0x2C052", - "EventName": "PM_DATA_GRP_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (Group) ended up either larger or smaller than Initial Pump Scope for a demand load" - }, - { - "EventCode": "0x2F148", - "EventName": "PM_MRK_DPTEG_FROM_LMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's Memory due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x4D01A", - "EventName": "PM_CMPLU_STALL_EIEIO", - "BriefDescription": "Finish stall because the NTF instruction is an EIEIO waiting for response from L2" - }, - { - "EventCode": "0x4F14E", - "EventName": "PM_MRK_DPTEG_FROM_L3MISS", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a location other than the local core's L3 due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x4F05A", - "EventName": "PM_RADIX_PWC_L4_PTE_FROM_L3", - "BriefDescription": "A Page Table Entry was reloaded to a level 4 page walk cache from the core's L3 data cache. This is the deepest level of PWC possible for a translation" - }, - { - "EventCode": "0x1F05A", - "EventName": "PM_RADIX_PWC_L4_PTE_FROM_L2", - "BriefDescription": "A Page Table Entry was reloaded to a level 4 page walk cache from the core's L2 data cache. This is the deepest level of PWC possible for a translation" - }, - { - "EventCode": "0x30068", - "EventName": "PM_L1_ICACHE_RELOADED_PREF", - "BriefDescription": "Counts all Icache prefetch reloads ( includes demand turned into prefetch)" - }, - { - "EventCode": "0x4C04A", - "EventName": "PM_DATA_FROM_OFF_CHIP_CACHE", - "BriefDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a demand load" - }, - { - "EventCode": "0x400FE", - "EventName": "PM_DATA_FROM_MEMORY", - "BriefDescription": "The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to a demand load" - }, - { - "EventCode": "0x3F058", - "EventName": "PM_RADIX_PWC_L1_PDE_FROM_L3", - "BriefDescription": "A Page Directory Entry was reloaded to a level 1 page walk cache from the core's L3 data cache" - }, - { - "EventCode": "0x3C052", - "EventName": "PM_DATA_SYS_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) or the original scope was System and it should have been smaller. Counts for a demand load" - }, - { - "EventCode": "0x4D142", - "EventName": "PM_MRK_DATA_FROM_L3", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 due to a marked load" - }, - { - "EventCode": "0x30050", - "EventName": "PM_SYS_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was system pump for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x30028", - "EventName": "PM_CMPLU_STALL_SPEC_FINISH", - "BriefDescription": "Finish stall while waiting for the non-speculative finish of either a stcx waiting for its result or a load waiting for non-critical sectors of data and ECC" - }, - { - "EventCode": "0x400F4", - "EventName": "PM_RUN_PURR", - "BriefDescription": "Run_PURR" - }, - { - "EventCode": "0x3404C", - "EventName": "PM_INST_FROM_DL4", - "BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x3D05A", - "EventName": "PM_NTC_ISSUE_HELD_OTHER", - "BriefDescription": "The NTC instruction is being held at dispatch during regular pipeline cycles, or because the VSU is busy with multi-cycle instructions, or because of a write-back collision with VSU" - }, - { - "EventCode": "0x2E048", - "EventName": "PM_DPTEG_FROM_LMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's Memory due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x2D02A", - "EventName": "PM_RADIX_PWC_L3_PDE_FROM_L2", - "BriefDescription": "A Page Directory Entry was reloaded to a level 3 page walk cache from the core's L2 data cache" - }, - { - "EventCode": "0x1F05C", - "EventName": "PM_RADIX_PWC_L3_PDE_FROM_L3", - "BriefDescription": "A Page Directory Entry was reloaded to a level 3 page walk cache from the core's L3 data cache" - }, - { - "EventCode": "0x4D04A", - "EventName": "PM_DARQ0_0_3_ENTRIES", - "BriefDescription": "Cycles in which 3 or less DARQ entries (out of 12) are in use" - }, - { - "EventCode": "0x1404C", - "EventName": "PM_INST_FROM_LL4", - "BriefDescription": "The processor's Instruction cache was reloaded from the local chip's L4 cache due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x200FD", - "EventName": "PM_L1_ICACHE_MISS", - "BriefDescription": "Demand iCache Miss" - }, - { - "EventCode": "0x34040", - "EventName": "PM_INST_FROM_L2_DISP_CONFLICT_LDHITST", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 with load hit store conflict due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x20138", - "EventName": "PM_MRK_ST_NEST", - "BriefDescription": "Marked store sent to nest" - }, - { - "EventCode": "0x44048", - "EventName": "PM_INST_FROM_DL2L3_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x35046", - "EventName": "PM_IPTEG_FROM_L21_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L2 on the same chip due to a instruction side request" - }, - { - "EventCode": "0x4C04E", - "EventName": "PM_DATA_FROM_L3MISS_MOD", - "BriefDescription": "The processor's data cache was reloaded from a location other than the local core's L3 due to a demand load" - }, - { - "EventCode": "0x401E0", - "EventName": "PM_MRK_INST_CMPL", - "BriefDescription": "marked instruction completed" - }, - { - "EventCode": "0x2C128", - "EventName": "PM_MRK_DATA_FROM_DL2L3_SHR_CYC", - "BriefDescription": "Duration in cycles to reload with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load" - }, - { - "EventCode": "0x34044", - "EventName": "PM_INST_FROM_L31_ECO_SHR", - "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x4E018", - "EventName": "PM_CMPLU_STALL_NTC_DISP_FIN", - "BriefDescription": "Finish stall because the NTF instruction was one that must finish at dispatch." - }, - { - "EventCode": "0x2E05E", - "EventName": "PM_LMQ_EMPTY_CYC", - "BriefDescription": "Cycles in which the LMQ has no pending load misses for this thread" - }, - { - "EventCode": "0x4C122", - "EventName": "PM_DARQ1_0_3_ENTRIES", - "BriefDescription": "Cycles in which 3 or fewer DARQ1 entries (out of 12) are in use" - }, - { - "EventCode": "0x4F058", - "EventName": "PM_RADIX_PWC_L2_PTE_FROM_L3", - "BriefDescription": "A Page Table Entry was reloaded to a level 2 page walk cache from the core's L3 data cache. This implies that level 3 and level 4 PWC accesses were not necessary for this translation" - }, - { - "EventCode": "0x14046", - "EventName": "PM_INST_FROM_L31_SHR", - "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L3 on the same chip due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x3012C", - "EventName": "PM_MRK_ST_FWD", - "BriefDescription": "Marked st forwards" - }, - { - "EventCode": "0x101E0", - "EventName": "PM_MRK_INST_DISP", - "BriefDescription": "The thread has dispatched a randomly sampled marked instruction" - }, - { - "EventCode": "0x1D058", - "EventName": "PM_DARQ0_10_12_ENTRIES", - "BriefDescription": "Cycles in which 10 or more DARQ entries (out of 12) are in use" - }, - { - "EventCode": "0x300FE", - "EventName": "PM_DATA_FROM_L3MISS", - "BriefDescription": "Demand LD - L3 Miss (not L2 hit and not L3 hit)" - }, - { - "EventCode": "0x30006", - "EventName": "PM_CMPLU_STALL_OTHER_CMPL", - "BriefDescription": "Instructions the core completed while this tread was stalled" - }, - { - "EventCode": "0x1005C", - "EventName": "PM_CMPLU_STALL_DP", - "BriefDescription": "Finish stall because the NTF instruction was a scalar instruction issued to the Double Precision execution pipe and waiting to finish. Includes binary floating point instructions in 32 and 64 bit binary floating point format. Not qualified multicycle. Qualified by NOT vector" - }, - { - "EventCode": "0x1E042", - "EventName": "PM_DPTEG_FROM_L2", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x1016E", - "EventName": "PM_MRK_BR_CMPL", - "BriefDescription": "Branch Instruction completed" - }, - { - "EventCode": "0x2013A", - "EventName": "PM_MRK_BRU_FIN", - "BriefDescription": "bru marked instr finish" - }, - { - "EventCode": "0x4F05E", - "EventName": "PM_RADIX_PWC_L3_PTE_FROM_L3MISS", - "BriefDescription": "A Page Table Entry was reloaded to a level 3 page walk cache from beyond the core's L3 data cache. This implies that a level 4 PWC access was not necessary for this translation. The source could be local/remote/distant memory or another core's cache" - }, - { - "EventCode": "0x400FC", - "EventName": "PM_ITLB_MISS", - "BriefDescription": "ITLB Reloaded. Counts 1 per ITLB miss for HPT but multiple for radix depending on number of levels traveresed" - }, - { - "EventCode": "0x1E044", - "EventName": "PM_DPTEG_FROM_L3_NO_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without conflict due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x4D05A", - "EventName": "PM_NON_MATH_FLOP_CMPL", - "BriefDescription": "Non FLOP operation completed" - }, - { - "EventCode": "0x101E2", - "EventName": "PM_MRK_BR_TAKEN_CMPL", - "BriefDescription": "Marked Branch Taken completed" - }, - { - "EventCode": "0x3E158", - "EventName": "PM_MRK_STCX_FAIL", - "BriefDescription": "marked stcx failed" - }, - { - "EventCode": "0x1C048", - "EventName": "PM_DATA_FROM_ON_CHIP_CACHE", - "BriefDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to a demand load" - }, - { - "EventCode": "0x1C054", - "EventName": "PM_DATA_PUMP_CPRED", - "BriefDescription": "Pump prediction correct. Counts across all types of pumps for a demand load" - }, - { - "EventCode": "0x4405E", - "EventName": "PM_DARQ_STORE_REJECT", - "BriefDescription": "The DARQ attempted to transmit a store into an LSAQ or SRQ entry but It was rejected. Divide by PM_DARQ_STORE_XMIT to get reject ratio" - }, - { - "EventCode": "0x1C042", - "EventName": "PM_DATA_FROM_L2", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 due to a demand load" - }, - { - "EventCode": "0x1D14C", - "EventName": "PM_MRK_DATA_FROM_LL4", - "BriefDescription": "The processor's data cache was reloaded from the local chip's L4 cache due to a marked load" - }, - { - "EventCode": "0x1006C", - "EventName": "PM_RUN_CYC_ST_MODE", - "BriefDescription": "Cycles run latch is set and core is in ST mode" - }, - { - "EventCode": "0x3C044", - "EventName": "PM_DATA_FROM_L31_ECO_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to a demand load" - }, - { - "EventCode": "0x4C052", - "EventName": "PM_DATA_PUMP_MPRED", - "BriefDescription": "Pump misprediction. Counts across all types of pumps for a demand load" - }, - { - "EventCode": "0x20050", - "EventName": "PM_GRP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope and data sourced across this scope was group pump for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x1F150", - "EventName": "PM_MRK_ST_L2DISP_TO_CMPL_CYC", - "BriefDescription": "cycles from L2 rc disp to l2 rc completion" - }, - { - "EventCode": "0x4505A", - "EventName": "PM_SP_FLOP_CMPL", - "BriefDescription": "SP instruction completed" - }, - { - "EventCode": "0x4000A", - "EventName": "PM_ISQ_36_44_ENTRIES", - "BriefDescription": "Cycles in which 36 or more Issue Queue entries are in use. This is a shared event, not per thread. There are 44 issue queue entries across 4 slices in the whole core" - }, - { - "EventCode": "0x2C12E", - "EventName": "PM_MRK_DATA_FROM_LL4_CYC", - "BriefDescription": "Duration in cycles to reload from the local chip's L4 cache due to a marked load" - }, - { - "EventCode": "0x2C058", - "EventName": "PM_MEM_PREF", - "BriefDescription": "Memory prefetch for this thread. Includes L4" - }, - { - "EventCode": "0x40012", - "EventName": "PM_L1_ICACHE_RELOADED_ALL", - "BriefDescription": "Counts all Icache reloads includes demand, prefetch, prefetch turned into demand and demand turned into prefetch" - }, - { - "EventCode": "0x3003C", - "EventName": "PM_CMPLU_STALL_NESTED_TEND", - "BriefDescription": "Completion stall because the ISU is updating the TEXASR to keep track of the nested tend and decrement the TEXASR nested level. This is a short delay" - }, - { - "EventCode": "0x3D05C", - "EventName": "PM_DISP_HELD_HB_FULL", - "BriefDescription": "Dispatch held due to History Buffer full. Could be GPR/VSR/VMR/FPR/CR/XVF; CR; XVF (XER/VSCR/FPSCR)" - }, - { - "EventCode": "0x30052", - "EventName": "PM_SYS_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) or the original scope was System and it should have been smaller. Counts for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x2E044", - "EventName": "PM_DPTEG_FROM_L31_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the same chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x34048", - "EventName": "PM_INST_FROM_DL2L3_SHR", - "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x45042", - "EventName": "PM_IPTEG_FROM_L3", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 due to a instruction side request" - }, - { - "EventCode": "0x15042", - "EventName": "PM_IPTEG_FROM_L2", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 due to a instruction side request" - }, - { - "EventCode": "0x1C05E", - "EventName": "PM_MEM_LOC_THRESH_LSU_MED", - "BriefDescription": "Local memory above threshold for data prefetch" - }, - { - "EventCode": "0x40134", - "EventName": "PM_MRK_INST_TIMEO", - "BriefDescription": "marked Instruction finish timeout (instruction lost)" - }, - { - "EventCode": "0x1002C", - "EventName": "PM_L1_DCACHE_RELOADED_ALL", - "BriefDescription": "L1 data cache reloaded for demand. If MMCR1[16] is 1, prefetches will be included as well" - }, - { - "EventCode": "0x30130", - "EventName": "PM_MRK_INST_FIN", - "BriefDescription": "marked instruction finished" - }, - { - "EventCode": "0x1F14A", - "EventName": "PM_MRK_DPTEG_FROM_RL2L3_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked data side request.. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x3504E", - "EventName": "PM_DARQ0_4_6_ENTRIES", - "BriefDescription": "Cycles in which 4, 5, or 6 DARQ entries (out of 12) are in use" - }, - { - "EventCode": "0x30064", - "EventName": "PM_DARQ_STORE_XMIT", - "BriefDescription": "The DARQ attempted to transmit a store into an LSAQ or SRQ entry. Includes rejects. Not qualified by thread, so it includes counts for the whole core" - }, - { - "EventCode": "0x45046", - "EventName": "PM_IPTEG_FROM_L21_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a instruction side request" - }, - { - "EventCode": "0x2C016", - "EventName": "PM_CMPLU_STALL_PASTE", - "BriefDescription": "Finish stall because the NTF instruction was a paste waiting for response from L2" - }, - { - "EventCode": "0x24156", - "EventName": "PM_MRK_STCX_FIN", - "BriefDescription": "Number of marked stcx instructions finished. This includes instructions in the speculative path of a branch that may be flushed" - }, - { - "EventCode": "0x15150", - "EventName": "PM_SYNC_MRK_PROBE_NOP", - "BriefDescription": "Marked probeNops which can cause synchronous interrupts" - }, - { - "EventCode": "0x301E4", - "EventName": "PM_MRK_BR_MPRED_CMPL", - "BriefDescription": "Marked Branch Mispredicted" - } -] diff --git a/lib/libpmc/pmu-events/arch/powerpc/power9/memory.json b/lib/libpmc/pmu-events/arch/powerpc/power9/memory.json deleted file mode 100644 index 7731e2adad3..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power9/memory.json +++ /dev/null @@ -1,127 +0,0 @@ -[ - { - "EventCode": "0x3006E", - "EventName": "PM_NEST_REF_CLK", - "BriefDescription": "Multiply by 4 to obtain the number of PB cycles" - }, - { - "EventCode": "0x20010", - "EventName": "PM_PMC1_OVERFLOW", - "BriefDescription": "Overflow from counter 1" - }, - { - "EventCode": "0x2005A", - "EventName": "PM_DARQ1_7_9_ENTRIES", - "BriefDescription": "Cycles in which 7 to 9 DARQ1 entries (out of 12) are in use" - }, - { - "EventCode": "0x3C048", - "EventName": "PM_DATA_FROM_DL2L3_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a demand load" - }, - { - "EventCode": "0x10008", - "EventName": "PM_RUN_SPURR", - "BriefDescription": "Run SPURR" - }, - { - "EventCode": "0x200F6", - "EventName": "PM_LSU_DERAT_MISS", - "BriefDescription": "DERAT Reloaded due to a DERAT miss" - }, - { - "EventCode": "0x4C048", - "EventName": "PM_DATA_FROM_DL2L3_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a demand load" - }, - { - "EventCode": "0x1D15E", - "EventName": "PM_MRK_RUN_CYC", - "BriefDescription": "Run cycles in which a marked instruction is in the pipeline" - }, - { - "EventCode": "0x4003E", - "EventName": "PM_LD_CMPL", - "BriefDescription": "count of Loads completed" - }, - { - "EventCode": "0x4C042", - "EventName": "PM_DATA_FROM_L3", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 due to a demand load" - }, - { - "EventCode": "0x4D02C", - "EventName": "PM_PMC1_REWIND", - "BriefDescription": "" - }, - { - "EventCode": "0x15158", - "EventName": "PM_SYNC_MRK_L2HIT", - "BriefDescription": "Marked L2 Hits that can throw a synchronous interrupt" - }, - { - "EventCode": "0x3404A", - "EventName": "PM_INST_FROM_RMEM", - "BriefDescription": "The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x301E2", - "EventName": "PM_MRK_ST_CMPL", - "BriefDescription": "Marked store completed and sent to nest" - }, - { - "EventCode": "0x1C050", - "EventName": "PM_DATA_CHIP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for a demand load" - }, - { - "EventCode": "0x4C040", - "EventName": "PM_DATA_FROM_L2_DISP_CONFLICT_OTHER", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 with dispatch conflict due to a demand load" - }, - { - "EventCode": "0x2E05C", - "EventName": "PM_LSU_REJECT_ERAT_MISS", - "BriefDescription": "LSU Reject due to ERAT (up to 4 per cycles)" - }, - { - "EventCode": "0x1000A", - "EventName": "PM_PMC3_REWIND", - "BriefDescription": "PMC3 rewind event. A rewind happens when a speculative event (such as latency or CPI stack) is selected on PMC3 and the stall reason or reload source did not match the one programmed in PMC3. When this occurs, the count in PMC3 will not change." - }, - { - "EventCode": "0x3C058", - "EventName": "PM_LARX_FIN", - "BriefDescription": "Larx finished" - }, - { - "EventCode": "0x1C040", - "EventName": "PM_DATA_FROM_L2_NO_CONFLICT", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 without conflict due to a demand load" - }, - { - "EventCode": "0x2C040", - "EventName": "PM_DATA_FROM_L2_MEPF", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state due to a demand load" - }, - { - "EventCode": "0x2E05A", - "EventName": "PM_LRQ_REJECT", - "BriefDescription": "Internal LSU reject from LRQ. Rejects cause the load to go back to LRQ, but it stays contained within the LSU once it gets issued. This event counts the number of times the LRQ attempts to relaunch an instruction after a reject. Any load can suffer multiple rejects" - }, - { - "EventCode": "0x2C05C", - "EventName": "PM_INST_GRP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was group pump (prediction=correct) for an instruction fetch (demand only)" - }, - { - "EventCode": "0x4D056", - "EventName": "PM_NON_FMA_FLOP_CMPL", - "BriefDescription": "Non FMA instruction completed" - }, - { - "EventCode": "0x3E050", - "EventName": "PM_DARQ1_4_6_ENTRIES", - "BriefDescription": "Cycles in which 4, 5, or 6 DARQ1 entries (out of 12) are in use" - } -] \ No newline at end of file diff --git a/lib/libpmc/pmu-events/arch/powerpc/power9/other.json b/lib/libpmc/pmu-events/arch/powerpc/power9/other.json deleted file mode 100644 index 21f7a9630a5..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power9/other.json +++ /dev/null @@ -1,2337 +0,0 @@ -[ - { - "EventCode": "0x3084", - "EventName": "PM_ISU1_ISS_HOLD_ALL", - "BriefDescription": "All ISU rejects" - }, - { - "EventCode": "0xF880", - "EventName": "PM_SNOOP_TLBIE", - "BriefDescription": "TLBIE snoop" - }, - { - "EventCode": "0x4088", - "EventName": "PM_IC_DEMAND_REQ", - "BriefDescription": "Demand Instruction fetch request" - }, - { - "EventCode": "0x20A4", - "EventName": "PM_TM_TRESUME", - "BriefDescription": "TM resume instruction completed" - }, - { - "EventCode": "0x40008", - "EventName": "PM_SRQ_EMPTY_CYC", - "BriefDescription": "Cycles in which the SRQ has at least one (out of four) empty slice" - }, - { - "EventCode": "0x20064", - "EventName": "PM_IERAT_RELOAD_4K", - "BriefDescription": "IERAT reloaded (after a miss) for 4K pages" - }, - { - "EventCode": "0x260B4", - "EventName": "PM_L3_P2_LCO_RTY", - "BriefDescription": "L3 initiated LCO received retry on port 2 (can try 4 times)" - }, - { - "EventCode": "0x20006", - "EventName": "PM_DISP_HELD_ISSQ_FULL", - "BriefDescription": "Dispatch held due to Issue q full. Includes issue queue and branch queue" - }, - { - "EventCode": "0x201E4", - "EventName": "PM_MRK_DATA_FROM_L3MISS", - "BriefDescription": "The processor's data cache was reloaded from a location other than the local core's L3 due to a marked load" - }, - { - "EventCode": "0x4E044", - "EventName": "PM_DPTEG_FROM_L31_ECO_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x40B8", - "EventName": "PM_BR_MPRED_TAKEN_CR", - "BriefDescription": "A Conditional Branch that resolved to taken was mispredicted as not taken (due to the BHT Direction Prediction)." - }, - { - "EventCode": "0xF8AC", - "EventName": "PM_DC_DEALLOC_NO_CONF", - "BriefDescription": "A demand load referenced a line in an active fuzzy prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software.Fuzzy stream confirm (out of order effects, or pf cant keep up)" - }, - { - "EventCode": "0xD090", - "EventName": "PM_LS0_DC_COLLISIONS", - "BriefDescription": "Read-write data cache collisions" - }, - { - "EventCode": "0x40BC", - "EventName": "PM_THRD_PRIO_0_1_CYC", - "BriefDescription": "Cycles thread running at priority level 0 or 1" - }, - { - "EventCode": "0x4C054", - "EventName": "PM_DERAT_MISS_16G_1G", - "BriefDescription": "Data ERAT Miss (Data TLB Access) page size 16G (hpt mode) or 1G (radix mode)" - }, - { - "EventCode": "0x2084", - "EventName": "PM_FLUSH_HB_RESTORE_CYC", - "BriefDescription": "Cycles in which no new instructions can be dispatched to the ICT after a flush. History buffer recovery" - }, - { - "EventCode": "0x4F054", - "EventName": "PM_RADIX_PWC_MISS", - "BriefDescription": "A radix translation attempt missed in the TLB and all levels of page walk cache." - }, - { - "EventCode": "0x26882", - "EventName": "PM_L2_DC_INV", - "BriefDescription": "D-cache invalidates sent over the reload bus to the core" - }, - { - "EventCode": "0x24048", - "EventName": "PM_INST_FROM_LMEM", - "BriefDescription": "The processor's Instruction cache was reloaded from the local chip's Memory due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0xD8B4", - "EventName": "PM_LSU0_LRQ_S0_VALID_CYC", - "BriefDescription": "Slot 0 of LRQ valid" - }, - { - "EventCode": "0x2E052", - "EventName": "PM_TM_PASSED", - "BriefDescription": "Number of TM transactions that passed" - }, - { - "EventCode": "0xF088", - "EventName": "PM_LSU0_STORE_REJECT", - "BriefDescription": "All internal store rejects cause the instruction to go back to the SRQ and go to sleep until woken up to try again after the condition has been met" - }, - { - "EventCode": "0x360B2", - "EventName": "PM_L3_GRP_GUESS_WRONG_LOW", - "BriefDescription": "Prefetch scope predictor selected GS or NNS, but was wrong because scope was LNS" - }, - { - "EventCode": "0x168A6", - "EventName": "PM_TM_CAM_OVERFLOW", - "BriefDescription": "L3 TM CAM is full when a L2 castout of TM_SC line occurs. Line is pushed to memory" - }, - { - "EventCode": "0xE8B0", - "EventName": "PM_TEND_PEND_CYC", - "BriefDescription": "TEND latency per thread" - }, - { - "EventCode": "0x4884", - "EventName": "PM_IBUF_FULL_CYC", - "BriefDescription": "Cycles No room in ibuff" - }, - { - "EventCode": "0xD08C", - "EventName": "PM_LSU2_LDMX_FIN", - "BriefDescription": "New P9 instruction LDMX. The definition of this new PMU event is (from the ldmx RFC02491): The thread has executed an ldmx instruction that accessed a doubleword that contains an effective address within an enabled section of the Load Monitored region. This event, therefore, should not occur if the FSCR has disabled the load monitored facility (FSCR[52]) or disabled the EBB facility (FSCR[56])." - }, - { - "EventCode": "0x300F8", - "EventName": "PM_TB_BIT_TRANS", - "BriefDescription": "timebase event" - }, - { - "EventCode": "0x3C040", - "EventName": "PM_DATA_FROM_L2_DISP_CONFLICT_LDHITST", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit store conflict due to a demand load" - }, - { - "EventCode": "0xE0BC", - "EventName": "PM_LS0_PTE_TABLEWALK_CYC", - "BriefDescription": "Cycles when a tablewalk is pending on this thread on table 0" - }, - { - "EventCode": "0x3884", - "EventName": "PM_ISU3_ISS_HOLD_ALL", - "BriefDescription": "All ISU rejects" - }, - { - "EventCode": "0x468A0", - "EventName": "PM_L3_PF_OFF_CHIP_MEM", - "BriefDescription": "L3 PF from Off chip memory" - }, - { - "EventCode": "0x268AA", - "EventName": "PM_L3_P1_LCO_DATA", - "BriefDescription": "LCO sent with data port 1" - }, - { - "EventCode": "0xE894", - "EventName": "PM_LSU1_TM_L1_HIT", - "BriefDescription": "Load tm hit in L1" - }, - { - "EventCode": "0x5888", - "EventName": "PM_IC_INVALIDATE", - "BriefDescription": "Ic line invalidated" - }, - { - "EventCode": "0x2890", - "EventName": "PM_DISP_CLB_HELD_TLBIE", - "BriefDescription": "Dispatch Hold: Due to TLBIE" - }, - { - "EventCode": "0x1001C", - "EventName": "PM_CMPLU_STALL_THRD", - "BriefDescription": "Completion Stalled because the thread was blocked" - }, - { - "EventCode": "0x368A6", - "EventName": "PM_SNP_TM_HIT_T", - "BriefDescription": "TM snoop that is a store hits line in L3 in T, Tn or Te state (shared modified)" - }, - { - "EventCode": "0x3001A", - "EventName": "PM_DATA_TABLEWALK_CYC", - "BriefDescription": "Data Tablewalk Cycles. Could be 1 or 2 active tablewalks. Includes data prefetches." - }, - { - "EventCode": "0xD894", - "EventName": "PM_LS3_DC_COLLISIONS", - "BriefDescription": "Read-write data cache collisions" - }, - { - "EventCode": "0x35158", - "EventName": "PM_MRK_DATA_FROM_L31_ECO_MOD_CYC", - "BriefDescription": "Duration in cycles to reload with Modified (M) data from another core's ECO L3 on the same chip due to a marked load" - }, - { - "EventCode": "0xF0B4", - "EventName": "PM_DC_PREF_CONS_ALLOC", - "BriefDescription": "Prefetch stream allocated in the conservative phase by either the hardware prefetch mechanism or software prefetch. The sum of this pair subtracted from the total number of allocs will give the total allocs in normal phase" - }, - { - "EventCode": "0xF894", - "EventName": "PM_LSU3_L1_CAM_CANCEL", - "BriefDescription": "ls3 l1 tm cam cancel" - }, - { - "EventCode": "0x2888", - "EventName": "PM_FLUSH_DISP_TLBIE", - "BriefDescription": "Dispatch Flush: TLBIE" - }, - { - "EventCode": "0x4E11E", - "EventName": "PM_MRK_DATA_FROM_DMEM_CYC", - "BriefDescription": "Duration in cycles to reload from another chip's memory on the same Node or Group (Distant) due to a marked load" - }, - { - "EventCode": "0x14156", - "EventName": "PM_MRK_DATA_FROM_L2_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L2 due to a marked load" - }, - { - "EventCode": "0x468A6", - "EventName": "PM_RD_CLEARING_SC", - "BriefDescription": "Core TM load hits line in L3 in TM_SC state and causes it to be invalidated" - }, - { - "EventCode": "0xD0B0", - "EventName": "PM_HWSYNC", - "BriefDescription": "" - }, - { - "EventCode": "0x168B0", - "EventName": "PM_L3_P1_NODE_PUMP", - "BriefDescription": "L3 PF sent with nodal scope port 1, counts even retried requests" - }, - { - "EventCode": "0xD0BC", - "EventName": "PM_LSU0_1_LRQF_FULL_CYC", - "BriefDescription": "Counts the number of cycles the LRQF is full. LRQF is the queue that holds loads between finish and completion. If it fills up, instructions stay in LRQ until completion, potentially backing up the LRQ" - }, - { - "EventCode": "0x2D148", - "EventName": "PM_MRK_DATA_FROM_L2_DISP_CONFLICT_LDHITST", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit store conflict due to a marked load" - }, - { - "EventCode": "0x468AE", - "EventName": "PM_L3_P3_CO_RTY", - "BriefDescription": "L3 CO received retry port 3 (memory only), every retry counted" - }, - { - "EventCode": "0x460A8", - "EventName": "PM_SN_HIT", - "BriefDescription": "Any port snooper hit L3. Up to 4 can happen in a cycle but we only count 1" - }, - { - "EventCode": "0x360AA", - "EventName": "PM_L3_P0_CO_MEM", - "BriefDescription": "L3 CO to memory port 0 with or without data" - }, - { - "EventCode": "0xF0A4", - "EventName": "PM_DC_PREF_HW_ALLOC", - "BriefDescription": "Prefetch stream allocated by the hardware prefetch mechanism" - }, - { - "EventCode": "0xF0BC", - "EventName": "PM_LS2_UNALIGNED_ST", - "BriefDescription": "Store instructions whose data crosses a double-word boundary, which causes it to require an additional slice than than what normally would be required of the Store of that size. If the Store wraps from slice 3 to slice 0, thee is an additional 3-cycle penalty" - }, - { - "EventCode": "0xD0AC", - "EventName": "PM_SRQ_SYNC_CYC", - "BriefDescription": "A sync is in the S2Q (edge detect to count)" - }, - { - "EventCode": "0x401E6", - "EventName": "PM_MRK_INST_FROM_L3MISS", - "BriefDescription": "Marked instruction was reloaded from a location beyond the local chiplet" - }, - { - "EventCode": "0x58A8", - "EventName": "PM_DECODE_HOLD_ICT_FULL", - "BriefDescription": "Counts the number of cycles in which the IFU was not able to decode and transmit one or more instructions because all itags were in use. This means the ICT is full for this thread" - }, - { - "EventCode": "0x26082", - "EventName": "PM_L2_IC_INV", - "BriefDescription": "I-cache Invalidates sent over the realod bus to the core" - }, - { - "EventCode": "0xC8AC", - "EventName": "PM_LSU_FLUSH_RELAUNCH_MISS", - "BriefDescription": "If a load that has already returned data and has to relaunch for any reason then gets a miss (erat, setp, data cache), it will often be flushed at relaunch time because the data might be inconsistent" - }, - { - "EventCode": "0x260A4", - "EventName": "PM_L3_LD_HIT", - "BriefDescription": "L3 Hits for demand LDs" - }, - { - "EventCode": "0xF0A0", - "EventName": "PM_DATA_STORE", - "BriefDescription": "All ops that drain from s2q to L2 containing data" - }, - { - "EventCode": "0x1D148", - "EventName": "PM_MRK_DATA_FROM_RMEM", - "BriefDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to a marked load" - }, - { - "EventCode": "0x16088", - "EventName": "PM_L2_LOC_GUESS_CORRECT", - "BriefDescription": "L2 guess local (LNS) and guess was correct (ie data local)" - }, - { - "EventCode": "0x160A4", - "EventName": "PM_L3_HIT", - "BriefDescription": "L3 Hits (L2 miss hitting L3, including data/instrn/xlate)" - }, - { - "EventCode": "0xE09C", - "EventName": "PM_LSU0_TM_L1_MISS", - "BriefDescription": "Load tm L1 miss" - }, - { - "EventCode": "0x168B4", - "EventName": "PM_L3_P1_LCO_RTY", - "BriefDescription": "L3 initiated LCO received retry on port 1 (can try 4 times)" - }, - { - "EventCode": "0x268AC", - "EventName": "PM_L3_RD_USAGE", - "BriefDescription": "Rotating sample of 16 RD actives" - }, - { - "EventCode": "0x1415C", - "EventName": "PM_MRK_DATA_FROM_L3_MEPF_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L3 without dispatch conflicts hit on Mepf state due to a marked load" - }, - { - "EventCode": "0xE880", - "EventName": "PM_L1_SW_PREF", - "BriefDescription": "Software L1 Prefetches, including SW Transient Prefetches" - }, - { - "EventCode": "0x288C", - "EventName": "PM_DISP_CLB_HELD_BAL", - "BriefDescription": "Dispatch/CLB Hold: Balance Flush" - }, - { - "EventCode": "0x101EA", - "EventName": "PM_MRK_L1_RELOAD_VALID", - "BriefDescription": "Marked demand reload" - }, - { - "EventCode": "0x1D156", - "EventName": "PM_MRK_LD_MISS_L1_CYC", - "BriefDescription": "Marked ld latency" - }, - { - "EventCode": "0x4C01A", - "EventName": "PM_CMPLU_STALL_DMISS_L3MISS", - "BriefDescription": "Completion stall due to cache miss resolving missed the L3" - }, - { - "EventCode": "0x2006C", - "EventName": "PM_RUN_CYC_SMT4_MODE", - "BriefDescription": "Cycles in which this thread's run latch is set and the core is in SMT4 mode" - }, - { - "EventCode": "0x1D14E", - "EventName": "PM_MRK_DATA_FROM_OFF_CHIP_CACHE_CYC", - "BriefDescription": "Duration in cycles to reload either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a marked load" - }, - { - "EventCode": "0xF888", - "EventName": "PM_LSU1_STORE_REJECT", - "BriefDescription": "All internal store rejects cause the instruction to go back to the SRQ and go to sleep until woken up to try again after the condition has been met" - }, - { - "EventCode": "0xC098", - "EventName": "PM_LS2_UNALIGNED_LD", - "BriefDescription": "Load instructions whose data crosses a double-word boundary, which causes it to require an additional slice than than what normally would be required of the load of that size. If the load wraps from slice 3 to slice 0, thee is an additional 3-cycle penalty" - }, - { - "EventCode": "0x20058", - "EventName": "PM_DARQ1_10_12_ENTRIES", - "BriefDescription": "Cycles in which 10 or more DARQ1 entries (out of 12) are in use" - }, - { - "EventCode": "0x360A6", - "EventName": "PM_SNP_TM_HIT_M", - "BriefDescription": "TM snoop that is a store hits line in L3 in M or Mu state (exclusive modified)" - }, - { - "EventCode": "0x5898", - "EventName": "PM_LINK_STACK_INVALID_PTR", - "BriefDescription": "It is most often caused by certain types of flush where the pointer is not available. Can result in the data in the link stack becoming unusable." - }, - { - "EventCode": "0x46088", - "EventName": "PM_L2_CHIP_PUMP", - "BriefDescription": "RC requests that were local (aka chip) pump attempts" - }, - { - "EventCode": "0x28A0", - "EventName": "PM_TM_TSUSPEND", - "BriefDescription": "TM suspend instruction completed" - }, - { - "EventCode": "0x20054", - "EventName": "PM_L1_PREF", - "BriefDescription": "A data line was written to the L1 due to a hardware or software prefetch" - }, - { - "EventCode": "0x2608E", - "EventName": "PM_TM_LD_CONF", - "BriefDescription": "TM Load (fav or non-fav) ran into conflict (failed)" - }, - { - "EventCode": "0x1D144", - "EventName": "PM_MRK_DATA_FROM_L3_DISP_CONFLICT", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 with dispatch conflict due to a marked load" - }, - { - "EventCode": "0x400FA", - "EventName": "PM_RUN_INST_CMPL", - "BriefDescription": "Run_Instructions" - }, - { - "EventCode": "0x15154", - "EventName": "PM_SYNC_MRK_L3MISS", - "BriefDescription": "Marked L3 misses that can throw a synchronous interrupt" - }, - { - "EventCode": "0xE0B4", - "EventName": "PM_LS0_TM_DISALLOW", - "BriefDescription": "A TM-ineligible instruction tries to execute inside a transaction and the LSU disallows it" - }, - { - "EventCode": "0x26884", - "EventName": "PM_DSIDE_MRU_TOUCH", - "BriefDescription": "D-side L2 MRU touch commands sent to the L2" - }, - { - "EventCode": "0x30134", - "EventName": "PM_MRK_ST_CMPL_INT", - "BriefDescription": "marked store finished with intervention" - }, - { - "EventCode": "0xC0B8", - "EventName": "PM_LSU_FLUSH_SAO", - "BriefDescription": "A load-hit-load condition with Strong Address Ordering will have address compare disabled and flush" - }, - { - "EventCode": "0x50A8", - "EventName": "PM_EAT_FORCE_MISPRED", - "BriefDescription": "XL-form branch was mispredicted due to the predicted target address missing from EAT. The EAT forces a mispredict in this case since there is no predicated target to validate. This is a rare case that may occur when the EAT is full and a branch is issued" - }, - { - "EventCode": "0xC094", - "EventName": "PM_LS0_UNALIGNED_LD", - "BriefDescription": "Load instructions whose data crosses a double-word boundary, which causes it to require an additional slice than than what normally would be required of the load of that size. If the load wraps from slice 3 to slice 0, thee is an additional 3-cycle penalty" - }, - { - "EventCode": "0xF8BC", - "EventName": "PM_LS3_UNALIGNED_ST", - "BriefDescription": "Store instructions whose data crosses a double-word boundary, which causes it to require an additional slice than than what normally would be required of the Store of that size. If the Store wraps from slice 3 to slice 0, thee is an additional 3-cycle penalty" - }, - { - "EventCode": "0x460AE", - "EventName": "PM_L3_P2_CO_RTY", - "BriefDescription": "L3 CO received retry port 2 (memory only), every retry counted" - }, - { - "EventCode": "0x58B0", - "EventName": "PM_BTAC_GOOD_RESULT", - "BriefDescription": "BTAC predicts a taken branch and the BHT agrees, and the target address is correct" - }, - { - "EventCode": "0x1C04C", - "EventName": "PM_DATA_FROM_LL4", - "BriefDescription": "The processor's data cache was reloaded from the local chip's L4 cache due to a demand load" - }, - { - "EventCode": "0x3608E", - "EventName": "PM_TM_ST_CONF", - "BriefDescription": "TM Store (fav or non-fav) ran into conflict (failed)" - }, - { - "EventCode": "0xF8A0", - "EventName": "PM_NON_DATA_STORE", - "BriefDescription": "All ops that drain from s2q to L2 and contain no data" - }, - { - "EventCode": "0x3F146", - "EventName": "PM_MRK_DPTEG_FROM_L21_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L2 on the same chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x40A0", - "EventName": "PM_BR_UNCOND", - "BriefDescription": "Unconditional Branch Completed. HW branch prediction was not used for this branch. This can be an I-form branch, a B-form branch with BO-field set to branch always, or a B-form branch which was covenrted to a Resolve." - }, - { - "EventCode": "0xF8A8", - "EventName": "PM_DC_PREF_FUZZY_CONF", - "BriefDescription": "A demand load referenced a line in an active fuzzy prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software.Fuzzy stream confirm (out of order effects, or pf cant keep up)" - }, - { - "EventCode": "0xF8A4", - "EventName": "PM_DC_PREF_SW_ALLOC", - "BriefDescription": "Prefetch stream allocated by software prefetching" - }, - { - "EventCode": "0xE0A0", - "EventName": "PM_LSU2_TM_L1_MISS", - "BriefDescription": "Load tm L1 miss" - }, - { - "EventCode": "0xC880", - "EventName": "PM_LS1_LD_VECTOR_FIN", - "BriefDescription": "LS1 finished load vector op" - }, - { - "EventCode": "0x2894", - "EventName": "PM_TM_OUTER_TEND", - "BriefDescription": "Completion time outer tend" - }, - { - "EventCode": "0xF098", - "EventName": "PM_XLATE_HPT_MODE", - "BriefDescription": "LSU reports every cycle the thread is in HPT translation mode (as opposed to radix mode)" - }, - { - "EventCode": "0x2C04E", - "EventName": "PM_LD_MISS_L1_FIN", - "BriefDescription": "Number of load instructions that finished with an L1 miss. Note that even if a load spans multiple slices this event will increment only once per load op." - }, - { - "EventCode": "0x30162", - "EventName": "PM_MRK_LSU_DERAT_MISS", - "BriefDescription": "Marked derat reload (miss) for any page size" - }, - { - "EventCode": "0x160A0", - "EventName": "PM_L3_PF_MISS_L3", - "BriefDescription": "L3 PF missed in L3" - }, - { - "EventCode": "0x1C04A", - "EventName": "PM_DATA_FROM_RL2L3_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a demand load" - }, - { - "EventCode": "0x268B0", - "EventName": "PM_L3_P1_GRP_PUMP", - "BriefDescription": "L3 PF sent with grp scope port 1, counts even retried requests" - }, - { - "EventCode": "0x30016", - "EventName": "PM_CMPLU_STALL_SRQ_FULL", - "BriefDescription": "Finish stall because the NTF instruction was a store that was held in LSAQ because the SRQ was full" - }, - { - "EventCode": "0x40B4", - "EventName": "PM_BR_PRED_TA", - "BriefDescription": "Conditional Branch Completed that had its target address predicted. Only XL-form branches set this event. This equal the sum of CCACHE, LSTACK, and PCACHE" - }, - { - "EventCode": "0x40AC", - "EventName": "PM_BR_MPRED_CCACHE", - "BriefDescription": "Conditional Branch Completed that was Mispredicted due to the Count Cache Target Prediction" - }, - { - "EventCode": "0x3688A", - "EventName": "PM_L2_RTY_LD", - "BriefDescription": "RC retries on PB for any load from core (excludes DCBFs)" - }, - { - "EventCode": "0xE08C", - "EventName": "PM_LSU0_ERAT_HIT", - "BriefDescription": "Primary ERAT hit. There is no secondary ERAT" - }, - { - "EventCode": "0xE088", - "EventName": "PM_LS2_ERAT_MISS_PREF", - "BriefDescription": "LS0 Erat miss due to prefetch" - }, - { - "EventCode": "0xF0A8", - "EventName": "PM_DC_PREF_CONF", - "BriefDescription": "A demand load referenced a line in an active prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software. Includes forwards and backwards streams" - }, - { - "EventCode": "0x16888", - "EventName": "PM_L2_LOC_GUESS_WRONG", - "BriefDescription": "L2 guess local (LNS) and guess was not correct (ie data not on chip)" - }, - { - "EventCode": "0xC888", - "EventName": "PM_LSU_DTLB_MISS_64K", - "BriefDescription": "Data TLB Miss page size 64K" - }, - { - "EventCode": "0xE0A4", - "EventName": "PM_TMA_REQ_L2", - "BriefDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding" - }, - { - "EventCode": "0xC088", - "EventName": "PM_LSU_DTLB_MISS_4K", - "BriefDescription": "Data TLB Miss page size 4K" - }, - { - "EventCode": "0x3C042", - "EventName": "PM_DATA_FROM_L3_DISP_CONFLICT", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 with dispatch conflict due to a demand load" - }, - { - "EventCode": "0x168AA", - "EventName": "PM_L3_P1_LCO_NO_DATA", - "BriefDescription": "Dataless L3 LCO sent port 1" - }, - { - "EventCode": "0x3D140", - "EventName": "PM_MRK_DATA_FROM_L2_DISP_CONFLICT_OTHER_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L2 with dispatch conflict due to a marked load" - }, - { - "EventCode": "0xC89C", - "EventName": "PM_LS1_LAUNCH_HELD_PREF", - "BriefDescription": "Number of times a load or store instruction was unable to launch/relaunch because a high priority prefetch used that relaunch cycle" - }, - { - "EventCode": "0x4894", - "EventName": "PM_IC_RELOAD_PRIVATE", - "BriefDescription": "Reloading line was brought in private for a specific thread. Most lines are brought in shared for all eight threads. If RA does not match then invalidates and then brings it shared to other thread. In P7 line brought in private , then line was invalidat" - }, - { - "EventCode": "0x1688E", - "EventName": "PM_TM_LD_CAUSED_FAIL", - "BriefDescription": "Non-TM Load caused any thread to fail" - }, - { - "EventCode": "0x26084", - "EventName": "PM_L2_RCLD_DISP_FAIL_OTHER", - "BriefDescription": "All D-side-Ld or I-side-instruction-fetch dispatch attempts for this thread that failed due to reasons other than an address collision conflicts with an L2 machines (e.g. Read-Claim/Snoop machine not available)" - }, - { - "EventCode": "0x101E4", - "EventName": "PM_MRK_L1_ICACHE_MISS", - "BriefDescription": "sampled Instruction suffered an icache Miss" - }, - { - "EventCode": "0x20A0", - "EventName": "PM_TM_NESTED_TBEGIN", - "BriefDescription": "Completion Tm nested tbegin" - }, - { - "EventCode": "0x368AA", - "EventName": "PM_L3_P1_CO_MEM", - "BriefDescription": "L3 CO to memory port 1 with or without data" - }, - { - "EventCode": "0xC8A4", - "EventName": "PM_LSU3_FALSE_LHS", - "BriefDescription": "False LHS match detected" - }, - { - "EventCode": "0xF0B0", - "EventName": "PM_L3_LD_PREF", - "BriefDescription": "L3 load prefetch, sourced from a hardware or software stream, was sent to the nest" - }, - { - "EventCode": "0x4D012", - "EventName": "PM_PMC3_SAVED", - "BriefDescription": "PMC3 Rewind Value saved" - }, - { - "EventCode": "0xE888", - "EventName": "PM_LS3_ERAT_MISS_PREF", - "BriefDescription": "LS1 Erat miss due to prefetch" - }, - { - "EventCode": "0x368B4", - "EventName": "PM_L3_RD0_BUSY", - "BriefDescription": "Lifetime, sample of RD machine 0 valid" - }, - { - "EventCode": "0x46080", - "EventName": "PM_L2_DISP_ALL_L2MISS", - "BriefDescription": "All successful D-side-Ld/St or I-side-instruction-fetch dispatches for this thread that were an L2 miss" - }, - { - "EventCode": "0xF8B8", - "EventName": "PM_LS1_UNALIGNED_ST", - "BriefDescription": "Store instructions whose data crosses a double-word boundary, which causes it to require an additional slice than than what normally would be required of the Store of that size. If the Store wraps from slice 3 to slice 0, thee is an additional 3-cycle penalty" - }, - { - "EventCode": "0x408C", - "EventName": "PM_L1_DEMAND_WRITE", - "BriefDescription": "Instruction Demand sectors written into IL1" - }, - { - "EventCode": "0x368A8", - "EventName": "PM_SN_INVL", - "BriefDescription": "Any port snooper detects a store to a line in the Sx state and invalidates the line. Up to 4 can happen in a cycle but we only count 1" - }, - { - "EventCode": "0x160B2", - "EventName": "PM_L3_LOC_GUESS_CORRECT", - "BriefDescription": "Prefetch scope predictor selected LNS and was correct" - }, - { - "EventCode": "0x48B4", - "EventName": "PM_DECODE_FUSION_CONST_GEN", - "BriefDescription": "32-bit constant generation" - }, - { - "EventCode": "0x4D146", - "EventName": "PM_MRK_DATA_FROM_L21_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to a marked load" - }, - { - "EventCode": "0xE080", - "EventName": "PM_S2Q_FULL", - "BriefDescription": "Cycles during which the S2Q is full" - }, - { - "EventCode": "0x268B4", - "EventName": "PM_L3_P3_LCO_RTY", - "BriefDescription": "L3 initiated LCO received retry on port 3 (can try 4 times)" - }, - { - "EventCode": "0xD8B8", - "EventName": "PM_LSU0_LMQ_S0_VALID", - "BriefDescription": "Slot 0 of LMQ valid" - }, - { - "EventCode": "0x2098", - "EventName": "PM_TM_NESTED_TEND", - "BriefDescription": "Completion time nested tend" - }, - { - "EventCode": "0x368A0", - "EventName": "PM_L3_PF_OFF_CHIP_CACHE", - "BriefDescription": "L3 PF from Off chip cache" - }, - { - "EventCode": "0x20056", - "EventName": "PM_TAKEN_BR_MPRED_CMPL", - "BriefDescription": "Total number of taken branches that were incorrectly predicted as not-taken. This event counts branches completed and does not include speculative instructions" - }, - { - "EventCode": "0x4688A", - "EventName": "PM_L2_SYS_PUMP", - "BriefDescription": "RC requests that were system pump attempts" - }, - { - "EventCode": "0xE090", - "EventName": "PM_LSU2_ERAT_HIT", - "BriefDescription": "Primary ERAT hit. There is no secondary ERAT" - }, - { - "EventCode": "0x4001C", - "EventName": "PM_INST_IMC_MATCH_CMPL", - "BriefDescription": "IMC Match Count" - }, - { - "EventCode": "0x40A8", - "EventName": "PM_BR_PRED_LSTACK", - "BriefDescription": "Conditional Branch Completed that used the Link Stack for Target Prediction" - }, - { - "EventCode": "0x268A2", - "EventName": "PM_L3_CI_MISS", - "BriefDescription": "L3 castins miss (total count)" - }, - { - "EventCode": "0x289C", - "EventName": "PM_TM_NON_FAV_TBEGIN", - "BriefDescription": "Dispatch time non favored tbegin" - }, - { - "EventCode": "0xF08C", - "EventName": "PM_LSU2_STORE_REJECT", - "BriefDescription": "All internal store rejects cause the instruction to go back to the SRQ and go to sleep until woken up to try again after the condition has been met" - }, - { - "EventCode": "0x360A0", - "EventName": "PM_L3_PF_ON_CHIP_CACHE", - "BriefDescription": "L3 PF from On chip cache" - }, - { - "EventCode": "0x35152", - "EventName": "PM_MRK_DATA_FROM_L2MISS_CYC", - "BriefDescription": "Duration in cycles to reload from a location other than the local core's L2 due to a marked load" - }, - { - "EventCode": "0x160AC", - "EventName": "PM_L3_SN_USAGE", - "BriefDescription": "Rotating sample of 16 snoop valids" - }, - { - "EventCode": "0x1608C", - "EventName": "PM_RC0_BUSY", - "BriefDescription": "RC mach 0 Busy. Used by PMU to sample ave RC lifetime (mach0 used as sample point)" - }, - { - "EventCode": "0x36082", - "EventName": "PM_L2_LD_DISP", - "BriefDescription": "All successful D-side-Ld or I-side-instruction-fetch dispatches for this thread" - }, - { - "EventCode": "0xF8B0", - "EventName": "PM_L3_SW_PREF", - "BriefDescription": "L3 load prefetch, sourced from a software prefetch stream, was sent to the nest" - }, - { - "EventCode": "0xF884", - "EventName": "PM_TABLEWALK_CYC_PREF", - "BriefDescription": "tablewalk qualified for pte prefetches" - }, - { - "EventCode": "0x4D144", - "EventName": "PM_MRK_DATA_FROM_L31_ECO_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to a marked load" - }, - { - "EventCode": "0x16884", - "EventName": "PM_L2_RCLD_DISP_FAIL_ADDR", - "BriefDescription": "All D-side-Ld or I-side-instruction-fetch dispatch attempts for this thread that failed due to an address collision conflicts with an L2 machines already working on this line (e.g. ld-hit-stq or Read-claim/Castout/Snoop machines)" - }, - { - "EventCode": "0x460A0", - "EventName": "PM_L3_PF_ON_CHIP_MEM", - "BriefDescription": "L3 PF from On chip memory" - }, - { - "EventCode": "0xF084", - "EventName": "PM_PTE_PREFETCH", - "BriefDescription": "PTE prefetches" - }, - { - "EventCode": "0x2D026", - "EventName": "PM_RADIX_PWC_L1_PDE_FROM_L2", - "BriefDescription": "A Page Directory Entry was reloaded to a level 1 page walk cache from the core's L2 data cache" - }, - { - "EventCode": "0x48B0", - "EventName": "PM_BR_MPRED_PCACHE", - "BriefDescription": "Conditional Branch Completed that was Mispredicted due to pattern cache prediction" - }, - { - "EventCode": "0x2C126", - "EventName": "PM_MRK_DATA_FROM_L2", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 due to a marked load" - }, - { - "EventCode": "0xE0AC", - "EventName": "PM_TM_FAIL_TLBIE", - "BriefDescription": "Transaction failed because there was a TLBIE hit in the bloom filter" - }, - { - "EventCode": "0x260AA", - "EventName": "PM_L3_P0_LCO_DATA", - "BriefDescription": "LCO sent with data port 0" - }, - { - "EventCode": "0x4888", - "EventName": "PM_IC_PREF_REQ", - "BriefDescription": "Instruction prefetch requests" - }, - { - "EventCode": "0xC898", - "EventName": "PM_LS3_UNALIGNED_LD", - "BriefDescription": "Load instructions whose data crosses a double-word boundary, which causes it to require an additional slice than than what normally would be required of the load of that size. If the load wraps from slice 3 to slice 0, thee is an additional 3-cycle penalty" - }, - { - "EventCode": "0x488C", - "EventName": "PM_IC_PREF_WRITE", - "BriefDescription": "Instruction prefetch written into IL1" - }, - { - "EventCode": "0xF89C", - "EventName": "PM_XLATE_MISS", - "BriefDescription": "The LSU requested a line from L2 for translation. It may be satisfied from any source beyond L2. Includes speculative instructions. Includes instruction, prefetch and demand" - }, - { - "EventCode": "0x14158", - "EventName": "PM_MRK_DATA_FROM_L2_NO_CONFLICT_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L2 without conflict due to a marked load" - }, - { - "EventCode": "0x35156", - "EventName": "PM_MRK_DATA_FROM_L31_SHR_CYC", - "BriefDescription": "Duration in cycles to reload with Shared (S) data from another core's L3 on the same chip due to a marked load" - }, - { - "EventCode": "0xC88C", - "EventName": "PM_LSU_DTLB_MISS_16G_1G", - "BriefDescription": "Data TLB Miss page size 16G (HPT) or 1G (Radix)" - }, - { - "EventCode": "0x268A6", - "EventName": "PM_TM_RST_SC", - "BriefDescription": "TM snoop hits line in L3 that is TM_SC state and causes it to be invalidated" - }, - { - "EventCode": "0x468A4", - "EventName": "PM_L3_TRANS_PF", - "BriefDescription": "L3 Transient prefetch received from L2" - }, - { - "EventCode": "0x4094", - "EventName": "PM_IC_PREF_CANCEL_L2", - "BriefDescription": "L2 Squashed a demand or prefetch request" - }, - { - "EventCode": "0x48AC", - "EventName": "PM_BR_MPRED_LSTACK", - "BriefDescription": "Conditional Branch Completed that was Mispredicted due to the Link Stack Target Prediction" - }, - { - "EventCode": "0xE88C", - "EventName": "PM_LSU1_ERAT_HIT", - "BriefDescription": "Primary ERAT hit. There is no secondary ERAT" - }, - { - "EventCode": "0xC0B4", - "EventName": "PM_LSU_FLUSH_WRK_ARND", - "BriefDescription": "LSU workaround flush. These flushes are setup with programmable scan only latches to perform various actions when the flush macro receives a trigger from the dbg macros. These actions include things like flushing the next op encountered for a particular thread or flushing the next op that is NTC op that is encountered on a particular slice. The kind of flush that the workaround is setup to perform is highly variable." - }, - { - "EventCode": "0x34054", - "EventName": "PM_PARTIAL_ST_FIN", - "BriefDescription": "Any store finished by an LSU slice" - }, - { - "EventCode": "0x5880", - "EventName": "PM_THRD_PRIO_6_7_CYC", - "BriefDescription": "Cycles thread running at priority level 6 or 7" - }, - { - "EventCode": "0x4898", - "EventName": "PM_IC_DEMAND_L2_BR_REDIRECT", - "BriefDescription": "L2 I cache demand request due to branch Mispredict ( 15 cycle path)" - }, - { - "EventCode": "0x4880", - "EventName": "PM_BANK_CONFLICT", - "BriefDescription": "Read blocked due to interleave conflict. The ifar logic will detect an interleave conflict and kill the data that was read that cycle." - }, - { - "EventCode": "0x360B0", - "EventName": "PM_L3_P0_SYS_PUMP", - "BriefDescription": "L3 PF sent with sys scope port 0, counts even retried requests" - }, - { - "EventCode": "0x3006A", - "EventName": "PM_IERAT_RELOAD_64K", - "BriefDescription": "IERAT Reloaded (Miss) for a 64k page" - }, - { - "EventCode": "0xD8BC", - "EventName": "PM_LSU2_3_LRQF_FULL_CYC", - "BriefDescription": "Counts the number of cycles the LRQF is full. LRQF is the queue that holds loads between finish and completion. If it fills up, instructions stay in LRQ until completion, potentially backing up the LRQ" - }, - { - "EventCode": "0x46086", - "EventName": "PM_L2_SN_M_RD_DONE", - "BriefDescription": "Snoop dispatched for a read and was M (true M)" - }, - { - "EventCode": "0x40154", - "EventName": "PM_MRK_FAB_RSP_BKILL", - "BriefDescription": "Marked store had to do a bkill" - }, - { - "EventCode": "0xF094", - "EventName": "PM_LSU2_L1_CAM_CANCEL", - "BriefDescription": "ls2 l1 tm cam cancel" - }, - { - "EventCode": "0x2D014", - "EventName": "PM_CMPLU_STALL_LRQ_FULL", - "BriefDescription": "Finish stall because the NTF instruction was a load that was held in LSAQ (load-store address queue) because the LRQ (load-reorder queue) was full" - }, - { - "EventCode": "0x3E05E", - "EventName": "PM_L3_CO_MEPF", - "BriefDescription": "L3 CO of line in Mep state (includes casthrough to memory). The Mepf state indicates that a line was brought in to satisfy an L3 prefetch request" - }, - { - "EventCode": "0x460A2", - "EventName": "PM_L3_LAT_CI_HIT", - "BriefDescription": "L3 Lateral Castins Hit" - }, - { - "EventCode": "0x3D14E", - "EventName": "PM_MRK_DATA_FROM_DL2L3_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load" - }, - { - "EventCode": "0x3D15E", - "EventName": "PM_MULT_MRK", - "BriefDescription": "mult marked instr" - }, - { - "EventCode": "0x4084", - "EventName": "PM_EAT_FULL_CYC", - "BriefDescription": "Cycles No room in EAT" - }, - { - "EventCode": "0x5098", - "EventName": "PM_LINK_STACK_WRONG_ADD_PRED", - "BriefDescription": "Link stack predicts wrong address, because of link stack design limitation or software violating the coding conventions" - }, - { - "EventCode": "0x2C050", - "EventName": "PM_DATA_GRP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was group pump (prediction=correct) for a demand load" - }, - { - "EventCode": "0xC0A4", - "EventName": "PM_LSU2_FALSE_LHS", - "BriefDescription": "False LHS match detected" - }, - { - "EventCode": "0x58A0", - "EventName": "PM_LINK_STACK_CORRECT", - "BriefDescription": "Link stack predicts right address" - }, - { - "EventCode": "0x36886", - "EventName": "PM_L2_SN_SX_I_DONE", - "BriefDescription": "Snoop dispatched and went from Sx to Ix" - }, - { - "EventCode": "0x4E04A", - "EventName": "PM_DPTEG_FROM_OFF_CHIP_CACHE", - "BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x2C12C", - "EventName": "PM_MRK_DATA_FROM_DL4_CYC", - "BriefDescription": "Duration in cycles to reload from another chip's L4 on a different Node or Group (Distant) due to a marked load" - }, - { - "EventCode": "0x4080", - "EventName": "PM_INST_FROM_L1", - "BriefDescription": "Instruction fetches from L1. L1 instruction hit" - }, - { - "EventCode": "0xE898", - "EventName": "PM_LSU3_TM_L1_HIT", - "BriefDescription": "Load tm hit in L1" - }, - { - "EventCode": "0x260A0", - "EventName": "PM_L3_CO_MEM", - "BriefDescription": "L3 CO to memory OR of port 0 and 1 (lossy = may undercount if two cresp come in the same cyc)" - }, - { - "EventCode": "0x16082", - "EventName": "PM_L2_CASTOUT_MOD", - "BriefDescription": "L2 Castouts - Modified (M,Mu,Me)" - }, - { - "EventCode": "0xC09C", - "EventName": "PM_LS0_LAUNCH_HELD_PREF", - "BriefDescription": "Number of times a load or store instruction was unable to launch/relaunch because a high priority prefetch used that relaunch cycle" - }, - { - "EventCode": "0xC8B8", - "EventName": "PM_LSU_FLUSH_LARX_STCX", - "BriefDescription": "A larx is flushed because an older larx has an LMQ reservation for the same thread. A stcx is flushed because an older stcx is in the LMQ. The flush happens when the older larx/stcx relaunches" - }, - { - "EventCode": "0x260A6", - "EventName": "PM_NON_TM_RST_SC", - "BriefDescription": "Non-TM snoop hits line in L3 that is TM_SC state and causes it to be invalidated" - }, - { - "EventCode": "0x3608A", - "EventName": "PM_L2_RTY_ST", - "BriefDescription": "RC retries on PB for any store from core (excludes DCBFs)" - }, - { - "EventCode": "0x24040", - "EventName": "PM_INST_FROM_L2_MEPF", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state. due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x209C", - "EventName": "PM_TM_FAV_TBEGIN", - "BriefDescription": "Dispatch time Favored tbegin" - }, - { - "EventCode": "0x2D01E", - "EventName": "PM_ICT_NOSLOT_DISP_HELD_ISSQ", - "BriefDescription": "Ict empty for this thread due to dispatch hold on this thread due to Issue q full, BRQ full, XVCF Full, Count cache, Link, Tar full" - }, - { - "EventCode": "0x50A4", - "EventName": "PM_FLUSH_MPRED", - "BriefDescription": "Branch mispredict flushes. Includes target and address misprecition" - }, - { - "EventCode": "0x1504C", - "EventName": "PM_IPTEG_FROM_LL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a instruction side request" - }, - { - "EventCode": "0x268A4", - "EventName": "PM_L3_LD_MISS", - "BriefDescription": "L3 Misses for demand LDs" - }, - { - "EventCode": "0x26088", - "EventName": "PM_L2_GRP_GUESS_CORRECT", - "BriefDescription": "L2 guess grp (GS or NNS) and guess was correct (data intra-group AND ^on-chip)" - }, - { - "EventCode": "0xD088", - "EventName": "PM_LSU0_LDMX_FIN", - "BriefDescription": "New P9 instruction LDMX. The definition of this new PMU event is (from the ldmx RFC02491): The thread has executed an ldmx instruction that accessed a doubleword that contains an effective address within an enabled section of the Load Monitored region. This event, therefore, should not occur if the FSCR has disabled the load monitored facility (FSCR[52]) or disabled the EBB facility (FSCR[56])." - }, - { - "EventCode": "0xE8B4", - "EventName": "PM_LS1_TM_DISALLOW", - "BriefDescription": "A TM-ineligible instruction tries to execute inside a transaction and the LSU disallows it" - }, - { - "EventCode": "0x1688C", - "EventName": "PM_RC_USAGE", - "BriefDescription": "Continuous 16 cycle (2to1) window where this signals rotates thru sampling each RC machine busy. PMU uses this wave to then do 16 cyc count to sample total number of machs running" - }, - { - "EventCode": "0x3F054", - "EventName": "PM_RADIX_PWC_L4_PTE_FROM_L3MISS", - "BriefDescription": "A Page Table Entry was reloaded to a level 4 page walk cache from beyond the core's L3 data cache. This is the deepest level of PWC possible for a translation. The source could be local/remote/distant memory or another core's cache" - }, - { - "EventCode": "0x2608A", - "EventName": "PM_ISIDE_DISP_FAIL_ADDR", - "BriefDescription": "All I-side-instruction-fetch dispatch attempts for this thread that failed due to an address collision conflict with an L2 machine already working on this line (e.g. ld-hit-stq or RC/CO/SN machines)" - }, - { - "EventCode": "0x50B4", - "EventName": "PM_TAGE_CORRECT_TAKEN_CMPL", - "BriefDescription": "The TAGE overrode BHT direction prediction and it was correct. Counted at completion for taken branches only" - }, - { - "EventCode": "0x2090", - "EventName": "PM_DISP_CLB_HELD_SB", - "BriefDescription": "Dispatch/CLB Hold: Scoreboard" - }, - { - "EventCode": "0xE0B0", - "EventName": "PM_TM_FAIL_NON_TX_CONFLICT", - "BriefDescription": "Non transactional conflict from LSU, gets reported to TEXASR" - }, - { - "EventCode": "0x201E0", - "EventName": "PM_MRK_DATA_FROM_MEMORY", - "BriefDescription": "The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to a marked load" - }, - { - "EventCode": "0x368A2", - "EventName": "PM_L3_L2_CO_MISS", - "BriefDescription": "L2 CO miss" - }, - { - "EventCode": "0x3608C", - "EventName": "PM_CO0_BUSY", - "BriefDescription": "CO mach 0 Busy. Used by PMU to sample ave CO lifetime (mach0 used as sample point)" - }, - { - "EventCode": "0x2C122", - "EventName": "PM_MRK_DATA_FROM_L3_DISP_CONFLICT_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L3 with dispatch conflict due to a marked load" - }, - { - "EventCode": "0x35154", - "EventName": "PM_MRK_DATA_FROM_L3_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L3 due to a marked load" - }, - { - "EventCode": "0x1D140", - "EventName": "PM_MRK_DATA_FROM_L31_MOD_CYC", - "BriefDescription": "Duration in cycles to reload with Modified (M) data from another core's L3 on the same chip due to a marked load" - }, - { - "EventCode": "0x4404A", - "EventName": "PM_INST_FROM_OFF_CHIP_CACHE", - "BriefDescription": "The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x28AC", - "EventName": "PM_TM_FAIL_SELF", - "BriefDescription": "TM aborted because a self-induced conflict occurred in Suspended state, due to one of the following: a store to a storage location that was previously accessed transactionally; a dcbf, dcbi, or icbi specify- ing a block that was previously accessed transactionally; a dcbst specifying a block that was previously written transactionally; or a tlbie that specifies a translation that was pre- viously used transactionally" - }, - { - "EventCode": "0x45056", - "EventName": "PM_SCALAR_FLOP_CMPL", - "BriefDescription": "Scalar flop operation completed" - }, - { - "EventCode": "0x16092", - "EventName": "PM_L2_LD_MISS_128B", - "BriefDescription": "All successful D-side load dispatches that were an L2 miss (NOT Sx,Tx,Mx) for this thread and the RC calculated the request should be for 128B (i.e., M=0)" - }, - { - "EventCode": "0x2E014", - "EventName": "PM_STCX_FIN", - "BriefDescription": "Number of stcx instructions finished. This includes instructions in the speculative path of a branch that may be flushed" - }, - { - "EventCode": "0xD8AC", - "EventName": "PM_LWSYNC", - "BriefDescription": "" - }, - { - "EventCode": "0x2094", - "EventName": "PM_TM_OUTER_TBEGIN", - "BriefDescription": "Completion time outer tbegin" - }, - { - "EventCode": "0x160B4", - "EventName": "PM_L3_P0_LCO_RTY", - "BriefDescription": "L3 initiated LCO received retry on port 0 (can try 4 times)" - }, - { - "EventCode": "0x36892", - "EventName": "PM_DSIDE_OTHER_64B_L2MEMACC", - "BriefDescription": "Valid when first beat of data comes in for an D-side fetch where data came EXCLUSIVELY from memory that was for hpc_read64, (RC had to fetch other 64B of a line from MC) i.e., number of times RC had to go to memory to get 'missing' 64B" - }, - { - "EventCode": "0x20A8", - "EventName": "PM_TM_FAIL_FOOTPRINT_OVERFLOW", - "BriefDescription": "TM aborted because the tracking limit for transactional storage accesses was exceeded.. Asynchronous" - }, - { - "EventCode": "0x30018", - "EventName": "PM_ICT_NOSLOT_DISP_HELD_HB_FULL", - "BriefDescription": "Ict empty for this thread due to dispatch holds because the History Buffer was full. Could be GPR/VSR/VMR/FPR/CR/XVF; CR; XVF (XER/VSCR/FPSCR)" - }, - { - "EventCode": "0xC894", - "EventName": "PM_LS1_UNALIGNED_LD", - "BriefDescription": "Load instructions whose data crosses a double-word boundary, which causes it to require an additional slice than than what normally would be required of the load of that size. If the load wraps from slice 3 to slice 0, thee is an additional 3-cycle penalty" - }, - { - "EventCode": "0x360A2", - "EventName": "PM_L3_L2_CO_HIT", - "BriefDescription": "L2 CO hits" - }, - { - "EventCode": "0x36092", - "EventName": "PM_DSIDE_L2MEMACC", - "BriefDescription": "Valid when first beat of data comes in for an D-side fetch where data came EXCLUSIVELY from memory (excluding hpcread64 accesses), i.e., total memory accesses by RCs" - }, - { - "EventCode": "0x10138", - "EventName": "PM_MRK_BR_2PATH", - "BriefDescription": "marked branches which are not strongly biased" - }, - { - "EventCode": "0x2884", - "EventName": "PM_ISYNC", - "BriefDescription": "Isync completion count per thread" - }, - { - "EventCode": "0x16882", - "EventName": "PM_L2_CASTOUT_SHR", - "BriefDescription": "L2 Castouts - Shared (Tx,Sx)" - }, - { - "EventCode": "0x26092", - "EventName": "PM_L2_LD_MISS_64B", - "BriefDescription": "All successful D-side load dispatches that were an L2 miss (NOT Sx,Tx,Mx) for this thread and the RC calculated the request should be for 64B(i.e., M=1)" - }, - { - "EventCode": "0x26080", - "EventName": "PM_L2_LD_MISS", - "BriefDescription": "All successful D-Side Load dispatches that were an L2 miss for this thread" - }, - { - "EventCode": "0x3D14C", - "EventName": "PM_MRK_DATA_FROM_DMEM", - "BriefDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group (Distant) due to a marked load" - }, - { - "EventCode": "0x100FA", - "EventName": "PM_ANY_THRD_RUN_CYC", - "BriefDescription": "Cycles in which at least one thread has the run latch set" - }, - { - "EventCode": "0x2C12A", - "EventName": "PM_MRK_DATA_FROM_RMEM_CYC", - "BriefDescription": "Duration in cycles to reload from another chip's memory on the same Node or Group ( Remote) due to a marked load" - }, - { - "EventCode": "0x25048", - "EventName": "PM_IPTEG_FROM_LMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's Memory due to a instruction side request" - }, - { - "EventCode": "0xD8A8", - "EventName": "PM_ISLB_MISS", - "BriefDescription": "Instruction SLB Miss - Total of all segment sizes" - }, - { - "EventCode": "0x368AE", - "EventName": "PM_L3_P1_CO_RTY", - "BriefDescription": "L3 CO received retry port 1 (memory only), every retry counted" - }, - { - "EventCode": "0x260A2", - "EventName": "PM_L3_CI_HIT", - "BriefDescription": "L3 Castins Hit (total count)" - }, - { - "EventCode": "0x44054", - "EventName": "PM_VECTOR_LD_CMPL", - "BriefDescription": "Number of vector load instructions completed" - }, - { - "EventCode": "0x1E05C", - "EventName": "PM_CMPLU_STALL_NESTED_TBEGIN", - "BriefDescription": "Completion stall because the ISU is updating the TEXASR to keep track of the nested tbegin. This is a short delay, and it includes ROT" - }, - { - "EventCode": "0xC084", - "EventName": "PM_LS2_LD_VECTOR_FIN", - "BriefDescription": "LS2 finished load vector op" - }, - { - "EventCode": "0x1608E", - "EventName": "PM_ST_CAUSED_FAIL", - "BriefDescription": "Non-TM Store caused any thread to fail" - }, - { - "EventCode": "0x3080", - "EventName": "PM_ISU0_ISS_HOLD_ALL", - "BriefDescription": "All ISU rejects" - }, - { - "EventCode": "0x1515A", - "EventName": "PM_SYNC_MRK_L2MISS", - "BriefDescription": "Marked L2 Miss that can throw a synchronous interrupt" - }, - { - "EventCode": "0x26892", - "EventName": "PM_L2_ST_MISS_64B", - "BriefDescription": "All successful D-side store dispatches that were an L2 miss (NOT Sx,Tx,Mx) for this thread and the RC calculated the request should be for 64B (i.e., M=1)" - }, - { - "EventCode": "0x2688C", - "EventName": "PM_CO_USAGE", - "BriefDescription": "Continuous 16 cycle (2to1) window where this signals rotates thru sampling each CO machine busy. PMU uses this wave to then do 16 cyc count to sample total number of machs running" - }, - { - "EventCode": "0x48B8", - "EventName": "PM_BR_MPRED_TAKEN_TA", - "BriefDescription": "Conditional Branch Completed that was Mispredicted due to the Target Address Prediction from the Count Cache or Link Stack. Only XL-form branches that resolved Taken set this event." - }, - { - "EventCode": "0x50B0", - "EventName": "PM_BTAC_BAD_RESULT", - "BriefDescription": "BTAC thinks branch will be taken but it is either predicted not-taken by the BHT, or the target address is wrong (less common). In both cases, a redirect will happen" - }, - { - "EventCode": "0xD888", - "EventName": "PM_LSU1_LDMX_FIN", - "BriefDescription": "New P9 instruction LDMX. The definition of this new PMU event is (from the ldmx RFC02491): The thread has executed an ldmx instruction that accessed a doubleword that contains an effective address within an enabled section of the Load Monitored region. This event, therefore, should not occur if the FSCR has disabled the load monitored facility (FSCR[52]) or disabled the EBB facility (FSCR[56])." - }, - { - "EventCode": "0x58B4", - "EventName": "PM_TAGE_CORRECT", - "BriefDescription": "The TAGE overrode BHT direction prediction and it was correct. Includes taken and not taken and is counted at execution time" - }, - { - "EventCode": "0x3688C", - "EventName": "PM_SN_USAGE", - "BriefDescription": "Continuous 16 cycle (2to1) window where this signals rotates thru sampling each SN machine busy. PMU uses this wave to then do 16 cyc count to sample total number of machs running" - }, - { - "EventCode": "0x36084", - "EventName": "PM_L2_RCST_DISP", - "BriefDescription": "All D-side store dispatch attempts for this thread" - }, - { - "EventCode": "0x46084", - "EventName": "PM_L2_RCST_DISP_FAIL_OTHER", - "BriefDescription": "All D-side store dispatch attempts for this thread that failed due to reason other than address collision" - }, - { - "EventCode": "0xF0AC", - "EventName": "PM_DC_PREF_STRIDED_CONF", - "BriefDescription": "A demand load referenced a line in an active strided prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software." - }, - { - "EventCode": "0x45054", - "EventName": "PM_FMA_CMPL", - "BriefDescription": "two flops operation completed (fmadd, fnmadd, fmsub, fnmsub) Scalar instructions only. " - }, - { - "EventCode": "0x201E8", - "EventName": "PM_THRESH_EXC_512", - "BriefDescription": "Threshold counter exceeded a value of 512" - }, - { - "EventCode": "0x36080", - "EventName": "PM_L2_INST", - "BriefDescription": "All successful I-side-instruction-fetch (e.g. i-demand, i-prefetch) dispatches for this thread" - }, - { - "EventCode": "0x3504C", - "EventName": "PM_IPTEG_FROM_DL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a different Node or Group (Distant) due to a instruction side request" - }, - { - "EventCode": "0xD890", - "EventName": "PM_LS1_DC_COLLISIONS", - "BriefDescription": "Read-write data cache collisions" - }, - { - "EventCode": "0x1688A", - "EventName": "PM_ISIDE_DISP", - "BriefDescription": "All I-side-instruction-fetch dispatch attempts for this thread" - }, - { - "EventCode": "0x468AA", - "EventName": "PM_L3_P1_CO_L31", - "BriefDescription": "L3 CO to L3.1 (LCO) port 1 with or without data" - }, - { - "EventCode": "0x28B0", - "EventName": "PM_DISP_HELD_TBEGIN", - "BriefDescription": "This outer tbegin transaction cannot be dispatched until the previous tend instruction completes" - }, - { - "EventCode": "0xE8A0", - "EventName": "PM_LSU3_TM_L1_MISS", - "BriefDescription": "Load tm L1 miss" - }, - { - "EventCode": "0x2C05E", - "EventName": "PM_INST_GRP_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (Group) ended up either larger or smaller than Initial Pump Scope for an instruction fetch (demand only)" - }, - { - "EventCode": "0xC8BC", - "EventName": "PM_STCX_SUCCESS_CMPL", - "BriefDescription": "Number of stcx instructions that completed successfully" - }, - { - "EventCode": "0xE098", - "EventName": "PM_LSU2_TM_L1_HIT", - "BriefDescription": "Load tm hit in L1" - }, - { - "EventCode": "0xE0B8", - "EventName": "PM_LS2_TM_DISALLOW", - "BriefDescription": "A TM-ineligible instruction tries to execute inside a transaction and the LSU disallows it" - }, - { - "EventCode": "0x44044", - "EventName": "PM_INST_FROM_L31_ECO_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x16886", - "EventName": "PM_CO_DISP_FAIL", - "BriefDescription": "CO dispatch failed due to all CO machines being busy" - }, - { - "EventCode": "0x3D146", - "EventName": "PM_MRK_DATA_FROM_L3_NO_CONFLICT", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 without conflict due to a marked load" - }, - { - "EventCode": "0x16892", - "EventName": "PM_L2_ST_MISS_128B", - "BriefDescription": "All successful D-side store dispatches that were an L2 miss (NOT Sx,Tx,Mx) for this thread and the RC calculated the request should be for 128B (i.e., M=0)" - }, - { - "EventCode": "0x26890", - "EventName": "PM_ISIDE_L2MEMACC", - "BriefDescription": "Valid when first beat of data comes in for an I-side fetch where data came from memory" - }, - { - "EventCode": "0xD094", - "EventName": "PM_LS2_DC_COLLISIONS", - "BriefDescription": "Read-write data cache collisions" - }, - { - "EventCode": "0x3C05E", - "EventName": "PM_MEM_RWITM", - "BriefDescription": "Memory Read With Intent to Modify for this thread" - }, - { - "EventCode": "0xC090", - "EventName": "PM_LSU_STCX", - "BriefDescription": "STCX sent to nest, i.e. total" - }, - { - "EventCode": "0x2C120", - "EventName": "PM_MRK_DATA_FROM_L2_NO_CONFLICT", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 without conflict due to a marked load" - }, - { - "EventCode": "0x36086", - "EventName": "PM_L2_RC_ST_DONE", - "BriefDescription": "Read-claim machine did store to line that was in Tx or Sx (Tagged or Shared state)" - }, - { - "EventCode": "0xE8AC", - "EventName": "PM_TM_FAIL_TX_CONFLICT", - "BriefDescription": "Transactional conflict from LSU, gets reported to TEXASR" - }, - { - "EventCode": "0x48A8", - "EventName": "PM_DECODE_FUSION_LD_ST_DISP", - "BriefDescription": "32-bit displacement D-form and 16-bit displacement X-form" - }, - { - "EventCode": "0x3D144", - "EventName": "PM_MRK_DATA_FROM_L2_MEPF_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L2 hit without dispatch conflicts on Mepf state. due to a marked load" - }, - { - "EventCode": "0x44046", - "EventName": "PM_INST_FROM_L21_MOD", - "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L2 on the same chip due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x40B0", - "EventName": "PM_BR_PRED_TAKEN_CR", - "BriefDescription": "Conditional Branch that had its direction predicted. I-form branches do not set this event. In addition, B-form branches which do not use the BHT do not set this event - these are branches with BO-field set to 'always taken' and branches" - }, - { - "EventCode": "0x15040", - "EventName": "PM_IPTEG_FROM_L2_NO_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 without conflict due to a instruction side request" - }, - { - "EventCode": "0x460A6", - "EventName": "PM_RD_FORMING_SC", - "BriefDescription": "Doesn't occur" - }, - { - "EventCode": "0x35042", - "EventName": "PM_IPTEG_FROM_L3_DISP_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 with dispatch conflict due to a instruction side request" - }, - { - "EventCode": "0xF898", - "EventName": "PM_XLATE_RADIX_MODE", - "BriefDescription": "LSU reports every cycle the thread is in radix translation mode (as opposed to HPT mode)" - }, - { - "EventCode": "0x2D142", - "EventName": "PM_MRK_DATA_FROM_L3_MEPF", - "BriefDescription": "The processor's data cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state. due to a marked load" - }, - { - "EventCode": "0x160B0", - "EventName": "PM_L3_P0_NODE_PUMP", - "BriefDescription": "L3 PF sent with nodal scope port 0, counts even retried requests" - }, - { - "EventCode": "0xD88C", - "EventName": "PM_LSU3_LDMX_FIN", - "BriefDescription": "New P9 instruction LDMX. The definition of this new PMU event is (from the ldmx RFC02491): The thread has executed an ldmx instruction that accessed a doubleword that contains an effective address within an enabled section of the Load Monitored region. This event, therefore, should not occur if the FSCR has disabled the load monitored facility (FSCR[52]) or disabled the EBB facility (FSCR[56])." - }, - { - "EventCode": "0x36882", - "EventName": "PM_L2_LD_HIT", - "BriefDescription": "All successful D-side-Ld or I-side-instruction-fetch dispatches for this thread that were L2 hits" - }, - { - "EventCode": "0x168AC", - "EventName": "PM_L3_CI_USAGE", - "BriefDescription": "Rotating sample of 16 CI or CO actives" - }, - { - "EventCode": "0x20134", - "EventName": "PM_MRK_FXU_FIN", - "BriefDescription": "fxu marked instr finish" - }, - { - "EventCode": "0x4608E", - "EventName": "PM_TM_CAP_OVERFLOW", - "BriefDescription": "TM Footprint Capacity Overflow" - }, - { - "EventCode": "0x4F05C", - "EventName": "PM_RADIX_PWC_L2_PTE_FROM_L3MISS", - "BriefDescription": "A Page Table Entry was reloaded to a level 2 page walk cache from beyond the core's L3 data cache. This implies that level 3 and level 4 PWC accesses were not necessary for this translation. The source could be local/remote/distant memory or another core's cache" - }, - { - "EventCode": "0x40014", - "EventName": "PM_PROBE_NOP_DISP", - "BriefDescription": "ProbeNops dispatched" - }, - { - "EventCode": "0x10052", - "EventName": "PM_GRP_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x2505E", - "EventName": "PM_BACK_BR_CMPL", - "BriefDescription": "Branch instruction completed with a target address less than current instruction address" - }, - { - "EventCode": "0x2688A", - "EventName": "PM_ISIDE_DISP_FAIL_OTHER", - "BriefDescription": "All I-side-instruction-fetch dispatch attempts for this thread that failed due to reasons other than an address collision conflict with an L2 machine (e.g. no available RC/CO machines)" - }, - { - "EventCode": "0x2001A", - "EventName": "PM_NTC_ALL_FIN", - "BriefDescription": "Cycles after instruction finished to instruction completed." - }, - { - "EventCode": "0x3005A", - "EventName": "PM_ISQ_0_8_ENTRIES", - "BriefDescription": "Cycles in which 8 or less Issue Queue entries are in use. This is a shared event, not per thread" - }, - { - "EventCode": "0x3515E", - "EventName": "PM_MRK_BACK_BR_CMPL", - "BriefDescription": "Marked branch instruction completed with a target address less than current instruction address" - }, - { - "EventCode": "0xF890", - "EventName": "PM_LSU1_L1_CAM_CANCEL", - "BriefDescription": "ls1 l1 tm cam cancel" - }, - { - "EventCode": "0x268AE", - "EventName": "PM_L3_P3_PF_RTY", - "BriefDescription": "L3 PF received retry port 3, every retry counted" - }, - { - "EventCode": "0xE884", - "EventName": "PM_LS1_ERAT_MISS_PREF", - "BriefDescription": "LS1 Erat miss due to prefetch" - }, - { - "EventCode": "0xE89C", - "EventName": "PM_LSU1_TM_L1_MISS", - "BriefDescription": "Load tm L1 miss" - }, - { - "EventCode": "0x28A8", - "EventName": "PM_TM_FAIL_CONF_NON_TM", - "BriefDescription": "TM aborted because a conflict occurred with a non-transactional access by another processor" - }, - { - "EventCode": "0x16890", - "EventName": "PM_L1PF_L2MEMACC", - "BriefDescription": "Valid when first beat of data comes in for an L1PF where data came from memory" - }, - { - "EventCode": "0x4504C", - "EventName": "PM_IPTEG_FROM_DMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group (Distant) due to a instruction side request" - }, - { - "EventCode": "0x1002E", - "EventName": "PM_LMQ_MERGE", - "BriefDescription": "A demand miss collides with a prefetch for the same line" - }, - { - "EventCode": "0x160B6", - "EventName": "PM_L3_WI0_BUSY", - "BriefDescription": "Rotating sample of 8 WI valid (duplicate)" - }, - { - "EventCode": "0x368AC", - "EventName": "PM_L3_CO0_BUSY", - "BriefDescription": "Lifetime, sample of CO machine 0 valid" - }, - { - "EventCode": "0x2E040", - "EventName": "PM_DPTEG_FROM_L2_MEPF", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x1D152", - "EventName": "PM_MRK_DATA_FROM_DL4", - "BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to a marked load" - }, - { - "EventCode": "0x46880", - "EventName": "PM_ISIDE_MRU_TOUCH", - "BriefDescription": "I-side L2 MRU touch sent to L2 for this thread I-side L2 MRU touch commands sent to the L2 for this thread" - }, - { - "EventCode": "0x508C", - "EventName": "PM_SHL_CREATED", - "BriefDescription": "Store-Hit-Load Table Entry Created" - }, - { - "EventCode": "0x50B8", - "EventName": "PM_TAGE_OVERRIDE_WRONG", - "BriefDescription": "The TAGE overrode BHT direction prediction but it was incorrect. Counted at completion for taken branches only" - }, - { - "EventCode": "0x160AE", - "EventName": "PM_L3_P0_PF_RTY", - "BriefDescription": "L3 PF received retry port 0, every retry counted" - }, - { - "EventCode": "0x268B2", - "EventName": "PM_L3_LOC_GUESS_WRONG", - "BriefDescription": "Prefetch scope predictor selected LNS, but was wrong" - }, - { - "EventCode": "0x36088", - "EventName": "PM_L2_SYS_GUESS_CORRECT", - "BriefDescription": "L2 guess system (VGS or RNS) and guess was correct (ie data beyond-group)" - }, - { - "EventCode": "0x260AE", - "EventName": "PM_L3_P2_PF_RTY", - "BriefDescription": "L3 PF received retry port 2, every retry counted" - }, - { - "EventCode": "0xD8B0", - "EventName": "PM_PTESYNC", - "BriefDescription": "" - }, - { - "EventCode": "0x26086", - "EventName": "PM_CO_TM_SC_FOOTPRINT", - "BriefDescription": "L2 did a cleanifdirty CO to the L3 (ie created an SC line in the L3) OR L2 TM_store hit dirty HPC line and L3 indicated SC line formed in L3 on RDR bus" - }, - { - "EventCode": "0x1E05A", - "EventName": "PM_CMPLU_STALL_ANY_SYNC", - "BriefDescription": "Cycles in which the NTC sync instruction (isync, lwsync or hwsync) is not allowed to complete" - }, - { - "EventCode": "0xF090", - "EventName": "PM_LSU0_L1_CAM_CANCEL", - "BriefDescription": "ls0 l1 tm cam cancel" - }, - { - "EventCode": "0xC0A8", - "EventName": "PM_LSU_FLUSH_CI", - "BriefDescription": "Load was not issued to LSU as a cache inhibited (non-cacheable) load but it was later determined to be cache inhibited" - }, - { - "EventCode": "0x20AC", - "EventName": "PM_TM_FAIL_CONF_TM", - "BriefDescription": "TM aborted because a conflict occurred with another transaction." - }, - { - "EventCode": "0x588C", - "EventName": "PM_SHL_ST_DEP_CREATED", - "BriefDescription": "Store-Hit-Load Table Read Hit with entry Enabled" - }, - { - "EventCode": "0x46882", - "EventName": "PM_L2_ST_HIT", - "BriefDescription": "All successful D-side store dispatches for this thread that were L2 hits" - }, - { - "EventCode": "0x360AC", - "EventName": "PM_L3_SN0_BUSY", - "BriefDescription": "Lifetime, sample of snooper machine 0 valid" - }, - { - "EventCode": "0x3005C", - "EventName": "PM_BFU_BUSY", - "BriefDescription": "Cycles in which all 4 Binary Floating Point units are busy. The BFU is running at capacity" - }, - { - "EventCode": "0x48A0", - "EventName": "PM_BR_PRED_PCACHE", - "BriefDescription": "Conditional branch completed that used pattern cache prediction" - }, - { - "EventCode": "0x26880", - "EventName": "PM_L2_ST_MISS", - "BriefDescription": "All successful D-Side Store dispatches that were an L2 miss for this thread" - }, - { - "EventCode": "0xF8B4", - "EventName": "PM_DC_PREF_XCONS_ALLOC", - "BriefDescription": "Prefetch stream allocated in the Ultra conservative phase by either the hardware prefetch mechanism or software prefetch" - }, - { - "EventCode": "0x35048", - "EventName": "PM_IPTEG_FROM_DL2L3_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a instruction side request" - }, - { - "EventCode": "0x260A8", - "EventName": "PM_L3_PF_HIT_L3", - "BriefDescription": "L3 PF hit in L3 (abandoned)" - }, - { - "EventCode": "0x360B4", - "EventName": "PM_L3_PF0_BUSY", - "BriefDescription": "Lifetime, sample of PF machine 0 valid" - }, - { - "EventCode": "0xC0B0", - "EventName": "PM_LSU_FLUSH_UE", - "BriefDescription": "Correctable ECC error on reload data, reported at critical data forward time" - }, - { - "EventCode": "0x4013A", - "EventName": "PM_MRK_IC_MISS", - "BriefDescription": "Marked instruction experienced I cache miss" - }, - { - "EventCode": "0x2088", - "EventName": "PM_FLUSH_DISP_SB", - "BriefDescription": "Dispatch Flush: Scoreboard" - }, - { - "EventCode": "0x401E8", - "EventName": "PM_MRK_DATA_FROM_L2MISS", - "BriefDescription": "The processor's data cache was reloaded from a location other than the local core's L2 due to a marked load" - }, - { - "EventCode": "0x3688E", - "EventName": "PM_TM_ST_CAUSED_FAIL", - "BriefDescription": "TM Store (fav or non-fav) caused another thread to fail" - }, - { - "EventCode": "0x460B2", - "EventName": "PM_L3_SYS_GUESS_WRONG", - "BriefDescription": "Prefetch scope predictor selected VGS or RNS, but was wrong" - }, - { - "EventCode": "0x58B8", - "EventName": "PM_TAGE_OVERRIDE_WRONG_SPEC", - "BriefDescription": "The TAGE overrode BHT direction prediction and it was correct. Includes taken and not taken and is counted at execution time" - }, - { - "EventCode": "0xE890", - "EventName": "PM_LSU3_ERAT_HIT", - "BriefDescription": "Primary ERAT hit. There is no secondary ERAT" - }, - { - "EventCode": "0x2898", - "EventName": "PM_TM_TABORT_TRECLAIM", - "BriefDescription": "Completion time tabortnoncd, tabortcd, treclaim" - }, - { - "EventCode": "0x268A0", - "EventName": "PM_L3_CO_L31", - "BriefDescription": "L3 CO to L3.1 OR of port 0 and 1 (lossy = may undercount if two cresps come in the same cyc)" - }, - { - "EventCode": "0x5080", - "EventName": "PM_THRD_PRIO_4_5_CYC", - "BriefDescription": "Cycles thread running at priority level 4 or 5" - }, - { - "EventCode": "0x2505C", - "EventName": "PM_VSU_FIN", - "BriefDescription": "VSU instruction finished. Up to 4 per cycle" - }, - { - "EventCode": "0x40A4", - "EventName": "PM_BR_PRED_CCACHE", - "BriefDescription": "Conditional Branch Completed that used the Count Cache for Target Prediction" - }, - { - "EventCode": "0x2E04A", - "EventName": "PM_DPTEG_FROM_RL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on the same Node or Group ( Remote) due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x4D12E", - "EventName": "PM_MRK_DATA_FROM_DL2L3_MOD_CYC", - "BriefDescription": "Duration in cycles to reload with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load" - }, - { - "EventCode": "0xC8B4", - "EventName": "PM_LSU_FLUSH_LHL_SHL", - "BriefDescription": "The instruction was flushed because of a sequential load/store consistency. If a load or store hits on an older load that has either been snooped (for loads) or has stale data (for stores)." - }, - { - "EventCode": "0x58A4", - "EventName": "PM_FLUSH_LSU", - "BriefDescription": "LSU flushes. Includes all lsu flushes" - }, - { - "EventCode": "0x1D150", - "EventName": "PM_MRK_DATA_FROM_DL2L3_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked load" - }, - { - "EventCode": "0xC8A0", - "EventName": "PM_LSU1_FALSE_LHS", - "BriefDescription": "False LHS match detected" - }, - { - "EventCode": "0x48BC", - "EventName": "PM_THRD_PRIO_2_3_CYC", - "BriefDescription": "Cycles thread running at priority level 2 or 3" - }, - { - "EventCode": "0x368B2", - "EventName": "PM_L3_GRP_GUESS_WRONG_HIGH", - "BriefDescription": "Prefetch scope predictor selected GS or NNS, but was wrong because scope was VGS or RNS" - }, - { - "EventCode": "0xE8BC", - "EventName": "PM_LS1_PTE_TABLEWALK_CYC", - "BriefDescription": "Cycles when a tablewalk is pending on this thread on table 1" - }, - { - "EventCode": "0x1F152", - "EventName": "PM_MRK_FAB_RSP_BKILL_CYC", - "BriefDescription": "cycles L2 RC took for a bkill" - }, - { - "EventCode": "0x4C124", - "EventName": "PM_MRK_DATA_FROM_L3_NO_CONFLICT_CYC", - "BriefDescription": "Duration in cycles to reload from local core's L3 without conflict due to a marked load" - }, - { - "EventCode": "0x2F14A", - "EventName": "PM_MRK_DPTEG_FROM_RL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on the same Node or Group ( Remote) due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x26888", - "EventName": "PM_L2_GRP_GUESS_WRONG", - "BriefDescription": "L2 guess grp (GS or NNS) and guess was not correct (ie data on-chip OR beyond-group)" - }, - { - "EventCode": "0xC0AC", - "EventName": "PM_LSU_FLUSH_EMSH", - "BriefDescription": "An ERAT miss was detected after a set-p hit. Erat tracker indicates fail due to tlbmiss and the instruction gets flushed because the instruction was working on the wrong address" - }, - { - "EventCode": "0x260B2", - "EventName": "PM_L3_SYS_GUESS_CORRECT", - "BriefDescription": "Prefetch scope predictor selected VGS or RNS and was correct" - }, - { - "EventCode": "0x1D146", - "EventName": "PM_MRK_DATA_FROM_MEMORY_CYC", - "BriefDescription": "Duration in cycles to reload from a memory location including L4 from local remote or distant due to a marked load" - }, - { - "EventCode": "0xE094", - "EventName": "PM_LSU0_TM_L1_HIT", - "BriefDescription": "Load tm hit in L1" - }, - { - "EventCode": "0x46888", - "EventName": "PM_L2_GROUP_PUMP", - "BriefDescription": "RC requests that were on group (aka nodel) pump attempts" - }, - { - "EventCode": "0xC08C", - "EventName": "PM_LSU_DTLB_MISS_16M_2M", - "BriefDescription": "Data TLB Miss page size 16M (HPT) or 2M (Radix)" - }, - { - "EventCode": "0x16080", - "EventName": "PM_L2_LD", - "BriefDescription": "All successful D-side Load dispatches for this thread (L2 miss + L2 hits)" - }, - { - "EventCode": "0x4505C", - "EventName": "PM_MATH_FLOP_CMPL", - "BriefDescription": "Math flop instruction completed" - }, - { - "EventCode": "0xC080", - "EventName": "PM_LS0_LD_VECTOR_FIN", - "BriefDescription": "LS0 finished load vector op" - }, - { - "EventCode": "0x368B0", - "EventName": "PM_L3_P1_SYS_PUMP", - "BriefDescription": "L3 PF sent with sys scope port 1, counts even retried requests" - }, - { - "EventCode": "0x1F146", - "EventName": "PM_MRK_DPTEG_FROM_L31_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a marked data side request.. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x2000C", - "EventName": "PM_THRD_ALL_RUN_CYC", - "BriefDescription": "Cycles in which all the threads have the run latch set" - }, - { - "EventCode": "0xC0BC", - "EventName": "PM_LSU_FLUSH_OTHER", - "BriefDescription": "Other LSU flushes including: Sync (sync ack from L2 caused search of LRQ for oldest snooped load, This will either signal a Precise Flush of the oldest snooped loa or a Flush Next PPC); Data Valid Flush Next (several cases of this, one example is store and reload are lined up such that a store-hit-reload scenario exists and the CDF has already launched and has gotten bad/stale data); Bad Data Valid Flush Next (might be a few cases of this, one example is a larxa (D$ hit) return data and dval but can't allocate to LMQ (LMQ full or other reason). Already gave dval but can't watch it for snoop_hit_larx. Need to take the “bad dval” back and flush all younger ops)" - }, - { - "EventCode": "0x5094", - "EventName": "PM_IC_MISS_ICBI", - "BriefDescription": "threaded version, IC Misses where we got EA dir hit but no sector valids were on. ICBI took line out" - }, - { - "EventCode": "0xC8A8", - "EventName": "PM_LSU_FLUSH_ATOMIC", - "BriefDescription": "Quad-word loads (lq) are considered atomic because they always span at least 2 slices. If a snoop or store from another thread changes the data the load is accessing between the 2 or 3 pieces of the lq instruction, the lq will be flushed" - }, - { - "EventCode": "0x1E04E", - "EventName": "PM_DPTEG_FROM_L2MISS", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a location other than the local core's L2 due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x4D05E", - "EventName": "PM_BR_CMPL", - "BriefDescription": "Any Branch instruction completed" - }, - { - "EventCode": "0x260B0", - "EventName": "PM_L3_P0_GRP_PUMP", - "BriefDescription": "L3 PF sent with grp scope port 0, counts even retried requests" - }, - { - "EventCode": "0x30132", - "EventName": "PM_MRK_VSU_FIN", - "BriefDescription": "VSU marked instr finish" - }, - { - "EventCode": "0x2D120", - "EventName": "PM_MRK_DATA_FROM_OFF_CHIP_CACHE", - "BriefDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a marked load" - }, - { - "EventCode": "0x1E048", - "EventName": "PM_DPTEG_FROM_ON_CHIP_CACHE", - "BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x16086", - "EventName": "PM_L2_SN_M_WR_DONE", - "BriefDescription": "SNP dispatched for a write and was M (true M); for DMA cacheinj this will pulse if rty/push is required (won't pulse if cacheinj is accepted)" - }, - { - "EventCode": "0x489C", - "EventName": "PM_BR_CORECT_PRED_TAKEN_CMPL", - "BriefDescription": "Conditional Branch Completed in which the HW correctly predicted the direction as taken. Counted at completion time" - }, - { - "EventCode": "0xF0B8", - "EventName": "PM_LS0_UNALIGNED_ST", - "BriefDescription": "Store instructions whose data crosses a double-word boundary, which causes it to require an additional slice than than what normally would be required of the Store of that size. If the Store wraps from slice 3 to slice 0, thee is an additional 3-cycle penalty" - }, - { - "EventCode": "0x20132", - "EventName": "PM_MRK_DFU_FIN", - "BriefDescription": "Decimal Unit marked Instruction Finish" - }, - { - "EventCode": "0x160A6", - "EventName": "PM_TM_SC_CO", - "BriefDescription": "L3 castout of line that was StoreCopy (original value of speculatively written line) in a Transaction" - }, - { - "EventCode": "0xC8B0", - "EventName": "PM_LSU_FLUSH_LHS", - "BriefDescription": "Effective Address alias flush : no EA match but Real Address match. If the data has not yet been returned for this load, the instruction will just be rejected, but if it has returned data, it will be flushed" - }, - { - "EventCode": "0x16084", - "EventName": "PM_L2_RCLD_DISP", - "BriefDescription": "All D-side-Ld or I-side-instruction-fetch dispatch attempts for this thread" - }, - { - "EventCode": "0x3F150", - "EventName": "PM_MRK_ST_DRAIN_TO_L2DISP_CYC", - "BriefDescription": "cycles to drain st from core to L2" - }, - { - "EventCode": "0x168A4", - "EventName": "PM_L3_MISS", - "BriefDescription": "L3 Misses (L2 miss also missing L3, including data/instrn/xlate)" - }, - { - "EventCode": "0xF080", - "EventName": "PM_LSU_STCX_FAIL", - "BriefDescription": "" - }, - { - "EventCode": "0x30038", - "EventName": "PM_CMPLU_STALL_DMISS_LMEM", - "BriefDescription": "Completion stall due to cache miss that resolves in local memory" - }, - { - "EventCode": "0x28A4", - "EventName": "PM_MRK_TEND_FAIL", - "BriefDescription": "Nested or not nested tend failed for a marked tend instruction" - }, - { - "EventCode": "0x100FC", - "EventName": "PM_LD_REF_L1", - "BriefDescription": "All L1 D cache load references counted at finish, gated by reject" - }, - { - "EventCode": "0xC0A0", - "EventName": "PM_LSU0_FALSE_LHS", - "BriefDescription": "False LHS match detected" - }, - { - "EventCode": "0x468A8", - "EventName": "PM_SN_MISS", - "BriefDescription": "Any port snooper L3 miss or collision. Up to 4 can happen in a cycle but we only count 1" - }, - { - "EventCode": "0x36888", - "EventName": "PM_L2_SYS_GUESS_WRONG", - "BriefDescription": "L2 guess system (VGS or RNS) and guess was not correct (ie data ^beyond-group)" - }, - { - "EventCode": "0x2080", - "EventName": "PM_EE_OFF_EXT_INT", - "BriefDescription": "CyclesMSR[EE] is off and external interrupts are active" - }, - { - "EventCode": "0xE8B8", - "EventName": "PM_LS3_TM_DISALLOW", - "BriefDescription": "A TM-ineligible instruction tries to execute inside a transaction and the LSU disallows it" - }, - { - "EventCode": "0x2688E", - "EventName": "PM_TM_FAV_CAUSED_FAIL", - "BriefDescription": "TM Load (fav) caused another thread to fail" - }, - { - "EventCode": "0x16090", - "EventName": "PM_SN0_BUSY", - "BriefDescription": "SN mach 0 Busy. Used by PMU to sample ave SN lifetime (mach0 used as sample point)" - }, - { - "EventCode": "0x360AE", - "EventName": "PM_L3_P0_CO_RTY", - "BriefDescription": "L3 CO received retry port 0 (memory only), every retry counted" - }, - { - "EventCode": "0x168A8", - "EventName": "PM_L3_WI_USAGE", - "BriefDescription": "Lifetime, sample of Write Inject machine 0 valid" - }, - { - "EventCode": "0x468A2", - "EventName": "PM_L3_LAT_CI_MISS", - "BriefDescription": "L3 Lateral Castins Miss" - }, - { - "EventCode": "0x4090", - "EventName": "PM_IC_PREF_CANCEL_PAGE", - "BriefDescription": "Prefetch Canceled due to page boundary" - }, - { - "EventCode": "0x460AA", - "EventName": "PM_L3_P0_CO_L31", - "BriefDescription": "L3 CO to L3.1 (LCO) port 0 with or without data" - }, - { - "EventCode": "0x2880", - "EventName": "PM_FLUSH_DISP", - "BriefDescription": "Dispatch flush" - }, - { - "EventCode": "0x168AE", - "EventName": "PM_L3_P1_PF_RTY", - "BriefDescription": "L3 PF received retry port 1, every retry counted" - }, - { - "EventCode": "0x46082", - "EventName": "PM_L2_ST_DISP", - "BriefDescription": "All successful D-side store dispatches for this thread" - }, - { - "EventCode": "0x36880", - "EventName": "PM_L2_INST_MISS", - "BriefDescription": "All successful I-side-instruction-fetch (e.g. i-demand, i-prefetch) dispatches for this thread that were an L2 miss" - }, - { - "EventCode": "0xE084", - "EventName": "PM_LS0_ERAT_MISS_PREF", - "BriefDescription": "LS0 Erat miss due to prefetch" - }, - { - "EventCode": "0x409C", - "EventName": "PM_BR_PRED", - "BriefDescription": "Conditional Branch Executed in which the HW predicted the Direction or Target. Includes taken and not taken and is counted at execution time" - }, - { - "EventCode": "0x2D144", - "EventName": "PM_MRK_DATA_FROM_L31_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to a marked load" - }, - { - "EventCode": "0x360A4", - "EventName": "PM_L3_CO_LCO", - "BriefDescription": "Total L3 COs occurred on LCO L3.1 (good cresp, may end up in mem on a retry)" - }, - { - "EventCode": "0x4890", - "EventName": "PM_IC_PREF_CANCEL_HIT", - "BriefDescription": "Prefetch Canceled due to icache hit" - }, - { - "EventCode": "0x268A8", - "EventName": "PM_RD_HIT_PF", - "BriefDescription": "RD machine hit L3 PF machine" - }, - { - "EventCode": "0x16880", - "EventName": "PM_L2_ST", - "BriefDescription": "All successful D-side store dispatches for this thread (L2 miss + L2 hits)" - }, - { - "EventCode": "0x4098", - "EventName": "PM_IC_DEMAND_L2_BHT_REDIRECT", - "BriefDescription": "L2 I cache demand request due to BHT redirect, branch redirect ( 2 bubbles 3 cycles)" - }, - { - "EventCode": "0xD0B4", - "EventName": "PM_LSU0_SRQ_S0_VALID_CYC", - "BriefDescription": "Slot 0 of SRQ valid" - }, - { - "EventCode": "0x160AA", - "EventName": "PM_L3_P0_LCO_NO_DATA", - "BriefDescription": "Dataless L3 LCO sent port 0" - }, - { - "EventCode": "0x208C", - "EventName": "PM_CLB_HELD", - "BriefDescription": "CLB (control logic block - indicates quadword fetch block) Hold: Any Reason" - }, - { - "EventCode": "0xF88C", - "EventName": "PM_LSU3_STORE_REJECT", - "BriefDescription": "All internal store rejects cause the instruction to go back to the SRQ and go to sleep until woken up to try again after the condition has been met" - }, - { - "EventCode": "0x200F2", - "EventName": "PM_INST_DISP", - "BriefDescription": "# PPC Dispatched" - }, - { - "EventCode": "0x4E05E", - "EventName": "PM_TM_OUTER_TBEGIN_DISP", - "BriefDescription": "Number of outer tbegin instructions dispatched. The dispatch unit determines whether the tbegin instruction is outer or nested. This is a speculative count, which includes flushed instructions" - }, - { - "EventCode": "0x2D018", - "EventName": "PM_CMPLU_STALL_EXEC_UNIT", - "BriefDescription": "Completion stall due to execution units (FXU/VSU/CRU)" - }, - { - "EventCode": "0x20B0", - "EventName": "PM_LSU_FLUSH_NEXT", - "BriefDescription": "LSU flush next reported at flush time. Sometimes these also come with an exception" - }, - { - "EventCode": "0x3880", - "EventName": "PM_ISU2_ISS_HOLD_ALL", - "BriefDescription": "All ISU rejects" - }, - { - "EventCode": "0xC884", - "EventName": "PM_LS3_LD_VECTOR_FIN", - "BriefDescription": "LS3 finished load vector op" - }, - { - "EventCode": "0x360A8", - "EventName": "PM_L3_CO", - "BriefDescription": "L3 castout occurring (does not include casthrough or log writes (cinj/dmaw))" - }, - { - "EventCode": "0x368A4", - "EventName": "PM_L3_CINJ", - "BriefDescription": "L3 castin of cache inject" - }, - { - "EventCode": "0xC890", - "EventName": "PM_LSU_NCST", - "BriefDescription": "Asserts when a i=1 store op is sent to the nest. No record of issue pipe (LS0/LS1) is maintained so this is for both pipes. Probably don't need separate LS0 and LS1" - }, - { - "EventCode": "0xD0B8", - "EventName": "PM_LSU_LMQ_FULL_CYC", - "BriefDescription": "Counts the number of cycles the LMQ is full" - }, - { - "EventCode": "0x168B2", - "EventName": "PM_L3_GRP_GUESS_CORRECT", - "BriefDescription": "Prefetch scope predictor selected GS or NNS and was correct" - }, - { - "EventCode": "0x48A4", - "EventName": "PM_STOP_FETCH_PENDING_CYC", - "BriefDescription": "Fetching is stopped due to an incoming instruction that will result in a flush" - }, - { - "EventCode": "0x36884", - "EventName": "PM_L2_RCST_DISP_FAIL_ADDR", - "BriefDescription": "All D-side store dispatch attempts for this thread that failed due to address collision with RC/CO/SN/SQ" - }, - { - "EventCode": "0x260AC", - "EventName": "PM_L3_PF_USAGE", - "BriefDescription": "Rotating sample of 32 PF actives" - } -] \ No newline at end of file diff --git a/lib/libpmc/pmu-events/arch/powerpc/power9/pipeline.json b/lib/libpmc/pmu-events/arch/powerpc/power9/pipeline.json deleted file mode 100644 index d0265f255de..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power9/pipeline.json +++ /dev/null @@ -1,532 +0,0 @@ -[ - { - "EventCode": "0x4D04C", - "EventName": "PM_DFU_BUSY", - "BriefDescription": "Cycles in which all 4 Decimal Floating Point units are busy. The DFU is running at capacity" - }, - { - "EventCode": "0x100F6", - "EventName": "PM_IERAT_RELOAD", - "BriefDescription": "Number of I-ERAT reloads" - }, - { - "EventCode": "0x201E2", - "EventName": "PM_MRK_LD_MISS_L1", - "BriefDescription": "Marked DL1 Demand Miss counted at exec time. Note that this count is per slice, so if a load spans multiple slices this event will increment multiple times for a single load." - }, - { - "EventCode": "0x40010", - "EventName": "PM_PMC3_OVERFLOW", - "BriefDescription": "Overflow from counter 3" - }, - { - "EventCode": "0x1005A", - "EventName": "PM_CMPLU_STALL_DFLONG", - "BriefDescription": "Finish stall because the NTF instruction was a multi-cycle instruction issued to the Decimal Floating Point execution pipe and waiting to finish. Includes decimal floating point instructions + 128 bit binary floating point instructions. Qualified by multicycle" - }, - { - "EventCode": "0x4D140", - "EventName": "PM_MRK_DATA_FROM_ON_CHIP_CACHE", - "BriefDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to a marked load" - }, - { - "EventCode": "0x3F14C", - "EventName": "PM_MRK_DPTEG_FROM_DL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a different Node or Group (Distant) due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x1E040", - "EventName": "PM_DPTEG_FROM_L2_NO_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 without conflict due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x24052", - "EventName": "PM_FXU_IDLE", - "BriefDescription": "Cycles in which FXU0, FXU1, FXU2, and FXU3 are all idle" - }, - { - "EventCode": "0x1E054", - "EventName": "PM_CMPLU_STALL", - "BriefDescription": "Nothing completed and ICT not empty" - }, - { - "EventCode": "0x2", - "EventName": "PM_INST_CMPL", - "BriefDescription": "Number of PowerPC Instructions that completed." - }, - { - "EventCode": "0x3D058", - "EventName": "PM_VSU_DP_FSQRT_FDIV", - "BriefDescription": "vector versions of fdiv,fsqrt" - }, - { - "EventCode": "0x10006", - "EventName": "PM_DISP_HELD", - "BriefDescription": "Dispatch Held" - }, - { - "EventCode": "0x200F8", - "EventName": "PM_EXT_INT", - "BriefDescription": "external interrupt" - }, - { - "EventCode": "0x20008", - "EventName": "PM_ICT_EMPTY_CYC", - "BriefDescription": "Cycles in which the ICT is completely empty. No itags are assigned to any thread" - }, - { - "EventCode": "0x4F146", - "EventName": "PM_MRK_DPTEG_FROM_L21_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x10056", - "EventName": "PM_MEM_READ", - "BriefDescription": "Reads from Memory from this thread (includes data/inst/xlate/l1prefetch/inst prefetch). Includes L4" - }, - { - "EventCode": "0x3C04C", - "EventName": "PM_DATA_FROM_DL4", - "BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to a demand load" - }, - { - "EventCode": "0x4E046", - "EventName": "PM_DPTEG_FROM_L21_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x2E016", - "EventName": "PM_NTC_ISSUE_HELD_ARB", - "BriefDescription": "The NTC instruction is being held at dispatch because it lost arbitration onto the issue pipe to another instruction (from the same thread or a different thread)" - }, - { - "EventCode": "0x15156", - "EventName": "PM_SYNC_MRK_FX_DIVIDE", - "BriefDescription": "Marked fixed point divide that can cause a synchronous interrupt" - }, - { - "EventCode": "0x1C056", - "EventName": "PM_DERAT_MISS_4K", - "BriefDescription": "Data ERAT Miss (Data TLB Access) page size 4K" - }, - { - "EventCode": "0x2F142", - "EventName": "PM_MRK_DPTEG_FROM_L3_MEPF", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x4C15C", - "EventName": "PM_MRK_DERAT_MISS_16G_1G", - "BriefDescription": "Marked Data ERAT Miss (Data TLB Access) page size 16G (hpt mode) and 1G (radix mode)" - }, - { - "EventCode": "0x10024", - "EventName": "PM_PMC5_OVERFLOW", - "BriefDescription": "Overflow from counter 5" - }, - { - "EventCode": "0x4505E", - "EventName": "PM_FLOP_CMPL", - "BriefDescription": "Floating Point Operation Finished" - }, - { - "EventCode": "0x2C018", - "EventName": "PM_CMPLU_STALL_DMISS_L21_L31", - "BriefDescription": "Completion stall by Dcache miss which resolved on chip ( excluding local L2/L3)" - }, - { - "EventCode": "0x4006A", - "EventName": "PM_IERAT_RELOAD_16M", - "BriefDescription": "IERAT Reloaded (Miss) for a 16M page" - }, - { - "EventCode": "0x4E010", - "EventName": "PM_ICT_NOSLOT_IC_L3MISS", - "BriefDescription": "Ict empty for this thread due to icache misses that were sourced from beyond the local L3. The source could be local/remote/distant memory or another core's cache" - }, - { - "EventCode": "0x4D01C", - "EventName": "PM_ICT_NOSLOT_DISP_HELD_SYNC", - "BriefDescription": "Dispatch held due to a synchronizing instruction at dispatch" - }, - { - "EventCode": "0x2D01A", - "EventName": "PM_ICT_NOSLOT_IC_MISS", - "BriefDescription": "Ict empty for this thread due to Icache Miss" - }, - { - "EventCode": "0x4F14A", - "EventName": "PM_MRK_DPTEG_FROM_OFF_CHIP_CACHE", - "BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x30058", - "EventName": "PM_TLBIE_FIN", - "BriefDescription": "tlbie finished" - }, - { - "EventCode": "0x100F8", - "EventName": "PM_ICT_NOSLOT_CYC", - "BriefDescription": "Number of cycles the ICT has no itags assigned to this thread" - }, - { - "EventCode": "0x3E042", - "EventName": "PM_DPTEG_FROM_L3_DISP_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 with dispatch conflict due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x1F140", - "EventName": "PM_MRK_DPTEG_FROM_L2_NO_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 without conflict due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x1F058", - "EventName": "PM_RADIX_PWC_L2_PTE_FROM_L2", - "BriefDescription": "A Page Table Entry was reloaded to a level 2 page walk cache from the core's L2 data cache. This implies that level 3 and level 4 PWC accesses were not necessary for this translation" - }, - { - "EventCode": "0x1D14A", - "EventName": "PM_MRK_DATA_FROM_RL2L3_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load" - }, - { - "EventCode": "0x10050", - "EventName": "PM_CHIP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x45058", - "EventName": "PM_IC_MISS_CMPL", - "BriefDescription": "Non-speculative icache miss, counted at completion" - }, - { - "EventCode": "0x2D150", - "EventName": "PM_MRK_DERAT_MISS_4K", - "BriefDescription": "Marked Data ERAT Miss (Data TLB Access) page size 4K" - }, - { - "EventCode": "0x34058", - "EventName": "PM_ICT_NOSLOT_BR_MPRED_ICMISS", - "BriefDescription": "Ict empty for this thread due to Icache Miss and branch mispred" - }, - { - "EventCode": "0x10022", - "EventName": "PM_PMC2_SAVED", - "BriefDescription": "PMC2 Rewind Value saved" - }, - { - "EventCode": "0x2000A", - "EventName": "PM_HV_CYC", - "BriefDescription": "Cycles in which msr_hv is high. Note that this event does not take msr_pr into consideration" - }, - { - "EventCode": "0x1F144", - "EventName": "PM_MRK_DPTEG_FROM_L3_NO_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without conflict due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x300FC", - "EventName": "PM_DTLB_MISS", - "BriefDescription": "Data PTEG reload" - }, - { - "EventCode": "0x2C046", - "EventName": "PM_DATA_FROM_RL2L3_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a demand load" - }, - { - "EventCode": "0x20052", - "EventName": "PM_GRP_PUMP_MPRED", - "BriefDescription": "Final Pump Scope (Group) ended up either larger or smaller than Initial Pump Scope for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x3F05A", - "EventName": "PM_RADIX_PWC_L2_PDE_FROM_L3", - "BriefDescription": "A Page Directory Entry was reloaded to a level 2 page walk cache from the core's L3 data cache" - }, - { - "EventCode": "0x1E04A", - "EventName": "PM_DPTEG_FROM_RL2L3_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x10064", - "EventName": "PM_ICT_NOSLOT_DISP_HELD_TBEGIN", - "BriefDescription": "the NTC instruction is being held at dispatch because it is a tbegin instruction and there is an older tbegin in the pipeline that must complete before the younger tbegin can dispatch" - }, - { - "EventCode": "0x2E046", - "EventName": "PM_DPTEG_FROM_RL2L3_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x4F14C", - "EventName": "PM_MRK_DPTEG_FROM_DMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group (Distant) due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x2E042", - "EventName": "PM_DPTEG_FROM_L3_MEPF", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x2D012", - "EventName": "PM_CMPLU_STALL_DFU", - "BriefDescription": "Finish stall because the NTF instruction was issued to the Decimal Floating Point execution pipe and waiting to finish. Includes decimal floating point instructions + 128 bit binary floating point instructions. Not qualified by multicycle" - }, - { - "EventCode": "0x3C054", - "EventName": "PM_DERAT_MISS_16M_2M", - "BriefDescription": "Data ERAT Miss (Data TLB Access) page size 16M (HPT mode) or 2M (Radix mode)" - }, - { - "EventCode": "0x4C04C", - "EventName": "PM_DATA_FROM_DMEM", - "BriefDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group (Distant) due to a demand load" - }, - { - "EventCode": "0x30022", - "EventName": "PM_PMC4_SAVED", - "BriefDescription": "PMC4 Rewind Value saved (matched condition)" - }, - { - "EventCode": "0x200F4", - "EventName": "PM_RUN_CYC", - "BriefDescription": "Run_cycles" - }, - { - "EventCode": "0x400F2", - "EventName": "PM_1PLUS_PPC_DISP", - "BriefDescription": "Cycles at least one Instr Dispatched" - }, - { - "EventCode": "0x3D148", - "EventName": "PM_MRK_DATA_FROM_L21_MOD_CYC", - "BriefDescription": "Duration in cycles to reload with Modified (M) data from another core's L2 on the same chip due to a marked load" - }, - { - "EventCode": "0x2F146", - "EventName": "PM_MRK_DPTEG_FROM_RL2L3_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x4E01A", - "EventName": "PM_ICT_NOSLOT_DISP_HELD", - "BriefDescription": "Cycles in which the NTC instruction is held at dispatch for any reason" - }, - { - "EventCode": "0x401EC", - "EventName": "PM_THRESH_EXC_2048", - "BriefDescription": "Threshold counter exceeded a value of 2048" - }, - { - "EventCode": "0x35150", - "EventName": "PM_MRK_DATA_FROM_RL2L3_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load" - }, - { - "EventCode": "0x3E052", - "EventName": "PM_ICT_NOSLOT_IC_L3", - "BriefDescription": "Ict empty for this thread due to icache misses that were sourced from the local L3" - }, - { - "EventCode": "0x2405A", - "EventName": "PM_NTC_FIN", - "BriefDescription": "Cycles in which the oldest instruction in the pipeline (NTC) finishes. This event is used to account for cycles in which work is being completed in the CPI stack" - }, - { - "EventCode": "0x40052", - "EventName": "PM_PUMP_MPRED", - "BriefDescription": "Pump misprediction. Counts across all types of pumps for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x30056", - "EventName": "PM_TM_ABORTS", - "BriefDescription": "Number of TM transactions aborted" - }, - { - "EventCode": "0x2404C", - "EventName": "PM_INST_FROM_MEMORY", - "BriefDescription": "The processor's Instruction cache was reloaded from a memory location including L4 from local remote or distant due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x30024", - "EventName": "PM_PMC6_OVERFLOW", - "BriefDescription": "Overflow from counter 6" - }, - { - "EventCode": "0x10068", - "EventName": "PM_BRU_FIN", - "BriefDescription": "Branch Instruction Finished" - }, - { - "EventCode": "0x3D154", - "EventName": "PM_MRK_DERAT_MISS_16M_2M", - "BriefDescription": "Marked Data ERAT Miss (Data TLB Access) page size 16M (hpt mode) or 2M (radix mode)" - }, - { - "EventCode": "0x30020", - "EventName": "PM_PMC2_REWIND", - "BriefDescription": "PMC2 Rewind Event (did not match condition)" - }, - { - "EventCode": "0x40064", - "EventName": "PM_DUMMY2_REMOVE_ME", - "BriefDescription": "Space holder for LS_PC_RELOAD_RA" - }, - { - "EventCode": "0x3F148", - "EventName": "PM_MRK_DPTEG_FROM_DL2L3_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x4D01E", - "EventName": "PM_ICT_NOSLOT_BR_MPRED", - "BriefDescription": "Ict empty for this thread due to branch mispred" - }, - { - "EventCode": "0x1F148", - "EventName": "PM_MRK_DPTEG_FROM_ON_CHIP_CACHE", - "BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip due to a marked data side request.. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x3E046", - "EventName": "PM_DPTEG_FROM_L21_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L2 on the same chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x2F144", - "EventName": "PM_MRK_DPTEG_FROM_L31_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the same chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x14052", - "EventName": "PM_INST_GRP_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for an instruction fetch" - }, - { - "EventCode": "0xD0A8", - "EventName": "PM_DSLB_MISS", - "BriefDescription": "gate_and(sd_pc_c0_comp_valid AND sd_pc_c0_comp_thread(0:1)=tid,sd_pc_c0_comp_ppc_count(0:3)) + gate_and(sd_pc_c1_comp_valid AND sd_pc_c1_comp_thread(0:1)=tid,sd_pc_c1_comp_ppc_count(0:3))" - }, - { - "EventCode": "0x4C058", - "EventName": "PM_MEM_CO", - "BriefDescription": "Memory castouts from this thread" - }, - { - "EventCode": "0x40004", - "EventName": "PM_FXU_FIN", - "BriefDescription": "The fixed point unit Unit finished an instruction. Instructions that finish may not necessary complete." - }, - { - "EventCode": "0x2C054", - "EventName": "PM_DERAT_MISS_64K", - "BriefDescription": "Data ERAT Miss (Data TLB Access) page size 64K" - }, - { - "EventCode": "0x10018", - "EventName": "PM_IC_DEMAND_CYC", - "BriefDescription": "Icache miss demand cycles" - }, - { - "EventCode": "0x2D14E", - "EventName": "PM_MRK_DATA_FROM_L21_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to a marked load" - }, - { - "EventCode": "0x3405C", - "EventName": "PM_CMPLU_STALL_DPLONG", - "BriefDescription": "Finish stall because the NTF instruction was a scalar multi-cycle instruction issued to the Double Precision execution pipe and waiting to finish. Includes binary floating point instructions in 32 and 64 bit binary floating point format. Qualified by NOT vector AND multicycle" - }, - { - "EventCode": "0x4D052", - "EventName": "PM_2FLOP_CMPL", - "BriefDescription": "DP vector version of fmul, fsub, fcmp, fsel, fabs, fnabs, fres ,fsqrte, fneg " - }, - { - "EventCode": "0x1F142", - "EventName": "PM_MRK_DPTEG_FROM_L2", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x40062", - "EventName": "PM_DUMMY1_REMOVE_ME", - "BriefDescription": "Space holder for L2_PC_PM_MK_LDST_SCOPE_PRED_STATUS" - }, - { - "EventCode": "0x4C012", - "EventName": "PM_CMPLU_STALL_ERAT_MISS", - "BriefDescription": "Finish stall because the NTF instruction was a load or store that suffered a translation miss" - }, - { - "EventCode": "0x4D050", - "EventName": "PM_VSU_NON_FLOP_CMPL", - "BriefDescription": "Non FLOP operation completed" - }, - { - "EventCode": "0x2E012", - "EventName": "PM_TM_TX_PASS_RUN_CYC", - "BriefDescription": "cycles spent in successful transactions" - }, - { - "EventCode": "0x4D04E", - "EventName": "PM_VSU_FSQRT_FDIV", - "BriefDescription": "four flops operation (fdiv,fsqrt) Scalar Instructions only" - }, - { - "EventCode": "0x4C120", - "EventName": "PM_MRK_DATA_FROM_L2_MEPF", - "BriefDescription": "The processor's data cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state. due to a marked load" - }, - { - "EventCode": "0x10062", - "EventName": "PM_LD_L3MISS_PEND_CYC", - "BriefDescription": "Cycles L3 miss was pending for this thread" - }, - { - "EventCode": "0x2F14C", - "EventName": "PM_MRK_DPTEG_FROM_MEMORY", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a memory location including L4 from local remote or distant due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x14050", - "EventName": "PM_INST_CHIP_PUMP_CPRED", - "BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for an instruction fetch" - }, - { - "EventCode": "0x2000E", - "EventName": "PM_FXU_BUSY", - "BriefDescription": "Cycles in which all 4 FXUs are busy. The FXU is running at capacity" - }, - { - "EventCode": "0x20066", - "EventName": "PM_TLB_MISS", - "BriefDescription": "TLB Miss (I + D)" - }, - { - "EventCode": "0x10054", - "EventName": "PM_PUMP_CPRED", - "BriefDescription": "Pump prediction correct. Counts across all types of pumps for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x4D124", - "EventName": "PM_MRK_DATA_FROM_L31_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to a marked load" - }, - { - "EventCode": "0x400F8", - "EventName": "PM_FLUSH", - "BriefDescription": "Flush (any type)" - }, - { - "EventCode": "0x30004", - "EventName": "PM_CMPLU_STALL_EMQ_FULL", - "BriefDescription": "Finish stall because the next to finish instruction suffered an ERAT miss and the EMQ was full" - }, - { - "EventCode": "0x1D154", - "EventName": "PM_MRK_DATA_FROM_L21_SHR_CYC", - "BriefDescription": "Duration in cycles to reload with Shared (S) data from another core's L2 on the same chip due to a marked load" - } -] \ No newline at end of file diff --git a/lib/libpmc/pmu-events/arch/powerpc/power9/pmc.json b/lib/libpmc/pmu-events/arch/powerpc/power9/pmc.json deleted file mode 100644 index 8fbba6e5cc3..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power9/pmc.json +++ /dev/null @@ -1,117 +0,0 @@ -[ - { - "EventCode": "0x20036", - "EventName": "PM_BR_2PATH", - "BriefDescription": "Branches that are not strongly biased" - }, - { - "EventCode": "0x40056", - "EventName": "PM_MEM_LOC_THRESH_LSU_HIGH", - "BriefDescription": "Local memory above threshold for LSU medium" - }, - { - "EventCode": "0x40118", - "EventName": "PM_MRK_DCACHE_RELOAD_INTV", - "BriefDescription": "Combined Intervention event" - }, - { - "EventCode": "0x4F148", - "EventName": "PM_MRK_DPTEG_FROM_DL2L3_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x301E8", - "EventName": "PM_THRESH_EXC_64", - "BriefDescription": "Threshold counter exceeded a value of 64" - }, - { - "EventCode": "0x4E04E", - "EventName": "PM_DPTEG_FROM_L3MISS", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a location other than the local core's L3 due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x40050", - "EventName": "PM_SYS_PUMP_MPRED_RTY", - "BriefDescription": "Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)" - }, - { - "EventCode": "0x1F14E", - "EventName": "PM_MRK_DPTEG_FROM_L2MISS", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a location other than the local core's L2 due to a marked data side request.. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x4D018", - "EventName": "PM_CMPLU_STALL_BRU", - "BriefDescription": "Completion stall due to a Branch Unit" - }, - { - "EventCode": "0x45052", - "EventName": "PM_4FLOP_CMPL", - "BriefDescription": "4 FLOP instruction completed" - }, - { - "EventCode": "0x3D142", - "EventName": "PM_MRK_DATA_FROM_LMEM", - "BriefDescription": "The processor's data cache was reloaded from the local chip's Memory due to a marked load" - }, - { - "EventCode": "0x4C01E", - "EventName": "PM_CMPLU_STALL_CRYPTO", - "BriefDescription": "Finish stall because the NTF instruction was routed to the crypto execution pipe and was waiting to finish" - }, - { - "EventCode": "0x3000C", - "EventName": "PM_FREQ_DOWN", - "BriefDescription": "Power Management: Below Threshold B" - }, - { - "EventCode": "0x4D128", - "EventName": "PM_MRK_DATA_FROM_LMEM_CYC", - "BriefDescription": "Duration in cycles to reload from the local chip's Memory due to a marked load" - }, - { - "EventCode": "0x4D054", - "EventName": "PM_8FLOP_CMPL", - "BriefDescription": "8 FLOP instruction completed" - }, - { - "EventCode": "0x10026", - "EventName": "PM_TABLEWALK_CYC", - "BriefDescription": "Cycles when an instruction tablewalk is active" - }, - { - "EventCode": "0x2C012", - "EventName": "PM_CMPLU_STALL_DCACHE_MISS", - "BriefDescription": "Finish stall because the NTF instruction was a load that missed the L1 and was waiting for the data to return from the nest" - }, - { - "EventCode": "0x2E04C", - "EventName": "PM_DPTEG_FROM_MEMORY", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a memory location including L4 from local remote or distant due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x3F142", - "EventName": "PM_MRK_DPTEG_FROM_L3_DISP_CONFLICT", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 with dispatch conflict due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x4F142", - "EventName": "PM_MRK_DPTEG_FROM_L3", - "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 due to a marked data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x10060", - "EventName": "PM_TM_TRANS_RUN_CYC", - "BriefDescription": "run cycles in transactional state" - }, - { - "EventCode": "0x1E04C", - "EventName": "PM_DPTEG_FROM_LL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x45050", - "EventName": "PM_1FLOP_CMPL", - "BriefDescription": "one flop (fadd, fmul, fsub, fcmp, fsel, fabs, fnabs, fres, fsqrte, fneg) operation completed" - } -] \ No newline at end of file diff --git a/lib/libpmc/pmu-events/arch/powerpc/power9/translation.json b/lib/libpmc/pmu-events/arch/powerpc/power9/translation.json deleted file mode 100644 index a1991977c96..00000000000 --- a/lib/libpmc/pmu-events/arch/powerpc/power9/translation.json +++ /dev/null @@ -1,227 +0,0 @@ -[ - { - "EventCode": "0x1E", - "EventName": "PM_CYC", - "BriefDescription": "Processor cycles" - }, - { - "EventCode": "0x30010", - "EventName": "PM_PMC2_OVERFLOW", - "BriefDescription": "Overflow from counter 2" - }, - { - "EventCode": "0x3C046", - "EventName": "PM_DATA_FROM_L21_SHR", - "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to a demand load" - }, - { - "EventCode": "0x4D05C", - "EventName": "PM_DP_QP_FLOP_CMPL", - "BriefDescription": "Double-Precion or Quad-Precision instruction completed" - }, - { - "EventCode": "0x4E04C", - "EventName": "PM_DPTEG_FROM_DMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group (Distant) due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x20016", - "EventName": "PM_ST_FIN", - "BriefDescription": "Store finish count. Includes speculative activity" - }, - { - "EventCode": "0x1504A", - "EventName": "PM_IPTEG_FROM_RL2L3_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a instruction side request" - }, - { - "EventCode": "0x40132", - "EventName": "PM_MRK_LSU_FIN", - "BriefDescription": "lsu marked instr PPC finish" - }, - { - "EventCode": "0x3C05C", - "EventName": "PM_CMPLU_STALL_VFXU", - "BriefDescription": "Finish stall due to a vector fixed point instruction in the execution pipeline. These instructions get routed to the ALU, ALU2, and DIV pipes" - }, - { - "EventCode": "0x30066", - "EventName": "PM_LSU_FIN", - "BriefDescription": "LSU Finished a PPC instruction (up to 4 per cycle)" - }, - { - "EventCode": "0x2011C", - "EventName": "PM_MRK_NTC_CYC", - "BriefDescription": "Cycles during which the marked instruction is next to complete (completion is held up because the marked instruction hasn't completed yet)" - }, - { - "EventCode": "0x3E048", - "EventName": "PM_DPTEG_FROM_DL2L3_SHR", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x2E018", - "EventName": "PM_CMPLU_STALL_VFXLONG", - "BriefDescription": "Completion stall due to a long latency vector fixed point instruction (division, square root)" - }, - { - "EventCode": "0x1C04E", - "EventName": "PM_DATA_FROM_L2MISS_MOD", - "BriefDescription": "The processor's data cache was reloaded from a location other than the local core's L2 due to a demand load" - }, - { - "EventCode": "0x15048", - "EventName": "PM_IPTEG_FROM_ON_CHIP_CACHE", - "BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip due to a instruction side request" - }, - { - "EventCode": "0x34046", - "EventName": "PM_INST_FROM_L21_SHR", - "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L2 on the same chip due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x1E058", - "EventName": "PM_STCX_FAIL", - "BriefDescription": "stcx failed" - }, - { - "EventCode": "0x300F0", - "EventName": "PM_ST_MISS_L1", - "BriefDescription": "Store Missed L1" - }, - { - "EventCode": "0x4C046", - "EventName": "PM_DATA_FROM_L21_MOD", - "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to a demand load" - }, - { - "EventCode": "0x2504A", - "EventName": "PM_IPTEG_FROM_RL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on the same Node or Group ( Remote) due to a instruction side request" - }, - { - "EventCode": "0x2003E", - "EventName": "PM_LSU_LMQ_SRQ_EMPTY_CYC", - "BriefDescription": "Cycles in which the LSU is empty for all threads (lmq and srq are completely empty)" - }, - { - "EventCode": "0x201E6", - "EventName": "PM_THRESH_EXC_32", - "BriefDescription": "Threshold counter exceeded a value of 32" - }, - { - "EventCode": "0x4405C", - "EventName": "PM_CMPLU_STALL_VDP", - "BriefDescription": "Finish stall because the NTF instruction was a vector instruction issued to the Double Precision execution pipe and waiting to finish. Includes binary floating point instructions in 32 and 64 bit binary floating point format. Not qualified multicycle. Qualified by vector" - }, - { - "EventCode": "0x4D010", - "EventName": "PM_PMC1_SAVED", - "BriefDescription": "PMC1 Rewind Value saved" - }, - { - "EventCode": "0x44042", - "EventName": "PM_INST_FROM_L3", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x200FE", - "EventName": "PM_DATA_FROM_L2MISS", - "BriefDescription": "Demand LD - L2 Miss (not L2 hit)" - }, - { - "EventCode": "0x2D14A", - "EventName": "PM_MRK_DATA_FROM_RL2L3_MOD_CYC", - "BriefDescription": "Duration in cycles to reload with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load" - }, - { - "EventCode": "0x10028", - "EventName": "PM_STALL_END_ICT_EMPTY", - "BriefDescription": "The number a times the core transitioned from a stall to ICT-empty for this thread" - }, - { - "EventCode": "0x2504C", - "EventName": "PM_IPTEG_FROM_MEMORY", - "BriefDescription": "A Page Table Entry was loaded into the TLB from a memory location including L4 from local remote or distant due to a instruction side request" - }, - { - "EventCode": "0x4504A", - "EventName": "PM_IPTEG_FROM_OFF_CHIP_CACHE", - "BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a instruction side request" - }, - { - "EventCode": "0x1404E", - "EventName": "PM_INST_FROM_L2MISS", - "BriefDescription": "The processor's Instruction cache was reloaded from a location other than the local core's L2 due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x34042", - "EventName": "PM_INST_FROM_L3_DISP_CONFLICT", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 with dispatch conflict due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x4E048", - "EventName": "PM_DPTEG_FROM_DL2L3_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x200F0", - "EventName": "PM_ST_CMPL", - "BriefDescription": "Stores completed from S2Q (2nd-level store queue)." - }, - { - "EventCode": "0x4E05C", - "EventName": "PM_LSU_REJECT_LHS", - "BriefDescription": "LSU Reject due to LHS (up to 4 per cycle)" - }, - { - "EventCode": "0x14044", - "EventName": "PM_INST_FROM_L3_NO_CONFLICT", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 without conflict due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x3E04C", - "EventName": "PM_DPTEG_FROM_DL4", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a different Node or Group (Distant) due to a data side request. When using Radix Page Translation, this count excludes PDE reloads. Only PTE reloads are included" - }, - { - "EventCode": "0x1F15E", - "EventName": "PM_MRK_PROBE_NOP_CMPL", - "BriefDescription": "Marked probeNops completed" - }, - { - "EventCode": "0x20018", - "EventName": "PM_ST_FWD", - "BriefDescription": "Store forwards that finished" - }, - { - "EventCode": "0x1D142", - "EventName": "PM_MRK_DATA_FROM_L31_ECO_SHR_CYC", - "BriefDescription": "Duration in cycles to reload with Shared (S) data from another core's ECO L3 on the same chip due to a marked load" - }, - { - "EventCode": "0x24042", - "EventName": "PM_INST_FROM_L3_MEPF", - "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state. due to an instruction fetch (not prefetch)" - }, - { - "EventCode": "0x25046", - "EventName": "PM_IPTEG_FROM_RL2L3_MOD", - "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a instruction side request" - }, - { - "EventCode": "0x3504A", - "EventName": "PM_IPTEG_FROM_RMEM", - "BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the same Node or Group ( Remote) due to a instruction side request" - }, - { - "EventCode": "0x3C05A", - "EventName": "PM_CMPLU_STALL_VDPLONG", - "BriefDescription": "Finish stall because the NTF instruction was a scalar multi-cycle instruction issued to the Double Precision execution pipe and waiting to finish. Includes binary floating point instructions in 32 and 64 bit binary floating point format. Qualified by NOT vector AND multicycle" - }, - { - "EventCode": "0x2E01C", - "EventName": "PM_CMPLU_STALL_TLBIE", - "BriefDescription": "Finish stall because the NTF instruction was a tlbie waiting for response from L2" - } -] \ No newline at end of file diff --git a/lib/libpmcstat/libpmcstat_image.c b/lib/libpmcstat/libpmcstat_image.c index 80ef083ae31..ab5869cb1a0 100644 --- a/lib/libpmcstat/libpmcstat_image.c +++ b/lib/libpmcstat/libpmcstat_image.c @@ -185,10 +185,6 @@ pmcstat_image_link(struct pmcstat_process *pp, struct pmcstat_image *image, { struct pmcstat_pcmap *pcm, *pcmnew; uintfptr_t offset; -#ifdef __powerpc__ - unsigned long kernbase; - size_t kernbase_len; -#endif assert(image->pi_type != PMCSTAT_IMAGE_UNKNOWN && image->pi_type != PMCSTAT_IMAGE_INDETERMINABLE); @@ -196,26 +192,6 @@ pmcstat_image_link(struct pmcstat_process *pp, struct pmcstat_image *image, if ((pcmnew = malloc(sizeof(*pcmnew))) == NULL) err(EX_OSERR, "ERROR: Cannot create a map entry"); - /* - * PowerPC kernel is of DYN type and it has a base address - * where it is initially loaded, before being relocated. - * As the address in 'start' is where the kernel was relocated to, - * but the symbols always use the original base address, we need to - * subtract it to get the correct offset. - */ -#ifdef __powerpc__ - if (pp->pp_pid == -1) { - kernbase = 0; - kernbase_len = sizeof(kernbase); - if (sysctlbyname("kern.base_address", &kernbase, &kernbase_len, - NULL, 0) == -1) - warnx( - "WARNING: Could not retrieve kernel base address"); - else - start -= kernbase; - } -#endif - /* * Adjust the map entry to only cover the text portion * of the object. diff --git a/lib/libsqlite3/Makefile b/lib/libsqlite3/Makefile index 07c36e16176..f8e61f105c1 100644 --- a/lib/libsqlite3/Makefile +++ b/lib/libsqlite3/Makefile @@ -49,8 +49,4 @@ afterinstall: ${_INSTALLFLAGS} ${SQLITE}/sqlite3.pc ${DESTDIR}/usr/libdata/pkgconfig/sqlite3.pc .endif -.if ${MACHINE_ARCH} == "powerpc64le" -CFLAGS+= -DSQLITE_BYTEORDER=1234 -.endif - .include diff --git a/lib/libthr/arch/mips/include/pthread_md.h b/lib/libthr/arch/mips/include/pthread_md.h deleted file mode 100644 index b56f06606a8..00000000000 --- a/lib/libthr/arch/mips/include/pthread_md.h +++ /dev/null @@ -1,58 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2005 David Xu . - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * from: src/lib/libthr/arch/arm/include/pthread_md.h,v 1.3 2005/10/29 13:40:31 davidxu - */ - -/* - * Machine-dependent thread prototypes/definitions. - */ -#ifndef _PTHREAD_MD_H_ -#define _PTHREAD_MD_H_ - -#include -#include - -#define CPU_SPINWAIT - -/* For use in _Static_assert to check structs will fit in a page */ -#define THR_PAGE_SIZE_MIN PAGE_SIZE - -static __inline struct pthread * -_get_curthread(void) -{ - if (_thr_initial) - return (_tcb_get()->tcb_thread); - return (NULL); -} - -static __inline void -_thr_resolve_machdep(void) -{ -} - -#endif /* _PTHREAD_MD_H_ */ diff --git a/lib/libthr/arch/mips/include/pthread_tls.h b/lib/libthr/arch/mips/include/pthread_tls.h deleted file mode 100644 index a4ec8ba5545..00000000000 --- a/lib/libthr/arch/mips/include/pthread_tls.h +++ /dev/null @@ -1,44 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2019 The FreeBSD Foundation - * - * This software was developed by Konstantin Belousov - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _ARCH_MIPS_PTHREAD_TLS_H -#define _ARCH_MIPS_PTHREAD_TLS_H - -static __inline uintptr_t -_get_static_tls_base(struct pthread *thr, size_t offset) -{ - uintptr_t tlsbase; - - tlsbase = (uintptr_t)thr->tcb; - tlsbase += offset; - return (tlsbase); -} - -#endif diff --git a/lib/libthr/arch/powerpc/Makefile.inc b/lib/libthr/arch/powerpc/Makefile.inc deleted file mode 100644 index 663706b1b36..00000000000 --- a/lib/libthr/arch/powerpc/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ - -SRCS+= _umtx_op_err.S diff --git a/lib/libthr/arch/powerpc/include/pthread_md.h b/lib/libthr/arch/powerpc/include/pthread_md.h deleted file mode 100644 index 31fa9820b26..00000000000 --- a/lib/libthr/arch/powerpc/include/pthread_md.h +++ /dev/null @@ -1,59 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2004 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Machine-dependent thread prototypes/definitions. - */ -#ifndef _PTHREAD_MD_H_ -#define _PTHREAD_MD_H_ - -#include -#include - -#define CPU_SPINWAIT - -/* For use in _Static_assert to check structs will fit in a page */ -#define THR_PAGE_SIZE_MIN PAGE_SIZE - -static __inline struct pthread * -_get_curthread(void) -{ - if (_thr_initial) - return (_tcb_get()->tcb_thread); - return (NULL); -} - -#define HAS__UMTX_OP_ERR 1 - -static __inline void -_thr_resolve_machdep(void) -{ -} - -#endif /* _PTHREAD_MD_H_ */ diff --git a/lib/libthr/arch/powerpc/include/pthread_tls.h b/lib/libthr/arch/powerpc/include/pthread_tls.h deleted file mode 100644 index e5316443601..00000000000 --- a/lib/libthr/arch/powerpc/include/pthread_tls.h +++ /dev/null @@ -1,44 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2019 The FreeBSD Foundation - * - * This software was developed by Konstantin Belousov - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _ARCH_POWERPC_PTHREAD_TLS_H -#define _ARCH_POWERPC_PTHREAD_TLS_H - -static __inline uintptr_t -_get_static_tls_base(struct pthread *thr, size_t offset) -{ - uintptr_t tlsbase; - - tlsbase = (uintptr_t)thr->tcb; - tlsbase += offset; - return (tlsbase); -} - -#endif diff --git a/lib/libthr/arch/powerpc/powerpc/_umtx_op_err.S b/lib/libthr/arch/powerpc/powerpc/_umtx_op_err.S deleted file mode 100644 index a954962515f..00000000000 --- a/lib/libthr/arch/powerpc/powerpc/_umtx_op_err.S +++ /dev/null @@ -1,39 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2019 Brandon Bergren - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include - - .text - .align 2 -ENTRY(_umtx_op_err) - li %r0, SYS__umtx_op - sc - blr -END(_umtx_op_err) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libthread_db/arch/mips/libpthread_md.c b/lib/libthread_db/arch/mips/libpthread_md.c deleted file mode 100644 index b43f9a9cab2..00000000000 --- a/lib/libthread_db/arch/mips/libpthread_md.c +++ /dev/null @@ -1,91 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2006-2007, Juniper Networks, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of Juniper Networks nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY JUNIPER NETWORKS ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#define _WANT_MIPS_REGNUM -#include -#include -#include -#include -#include "libpthread_db.h" - -void -pt_reg_to_ucontext(const struct reg *r, ucontext_t *uc) -{ - - memcpy(uc->uc_mcontext.mc_regs, &r->r_regs[ZERO], - sizeof(uc->uc_mcontext.mc_regs)); - uc->uc_mcontext.mc_pc = r->r_regs[PC]; - uc->uc_mcontext.mullo = r->r_regs[MULLO]; - uc->uc_mcontext.mulhi = r->r_regs[MULHI]; -} - -void -pt_ucontext_to_reg(const ucontext_t *uc, struct reg *r) -{ - memcpy(&r->r_regs[ZERO], uc->uc_mcontext.mc_regs, - sizeof(uc->uc_mcontext.mc_regs)); - r->r_regs[PC] = uc->uc_mcontext.mc_pc; - r->r_regs[MULLO] = uc->uc_mcontext.mullo; - r->r_regs[MULHI] = uc->uc_mcontext.mulhi; -} - -void -pt_fpreg_to_ucontext(const struct fpreg* r, ucontext_t *uc) -{ - - memcpy(uc->uc_mcontext.mc_fpregs, r->r_regs, - sizeof(uc->uc_mcontext.mc_fpregs)); -} - -void -pt_ucontext_to_fpreg(const ucontext_t *uc, struct fpreg *r) -{ - - memcpy(r->r_regs, uc->uc_mcontext.mc_fpregs, - sizeof(uc->uc_mcontext.mc_fpregs)); -} - -void -pt_md_init(void) -{ - /* Nothing to do */ -} - -int -pt_reg_sstep(struct reg *reg __unused, int step __unused) -{ - /* - * XXX: mips doesnt store single step info in any registers - */ - return (0); -} diff --git a/lib/libthread_db/arch/powerpc/libpthread_md.c b/lib/libthread_db/arch/powerpc/libpthread_md.c deleted file mode 100644 index ba91703c690..00000000000 --- a/lib/libthread_db/arch/powerpc/libpthread_md.c +++ /dev/null @@ -1,83 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include - -#include "libpthread_db.h" - -void -pt_reg_to_ucontext(const struct reg *r, ucontext_t *uc) -{ - mcontext_t *mc = &uc->uc_mcontext; - - memcpy(mc->mc_frame, r, MIN(sizeof(mc->mc_frame), sizeof(*r))); -} - -void -pt_ucontext_to_reg(const ucontext_t *uc, struct reg *r) -{ - const mcontext_t *mc = &uc->uc_mcontext; - - memcpy(r, mc->mc_frame, MIN(sizeof(mc->mc_frame), sizeof(*r))); -} - -void -pt_fpreg_to_ucontext(const struct fpreg *r, ucontext_t *uc) -{ - mcontext_t *mc = &uc->uc_mcontext; - - memcpy(mc->mc_fpreg, r, MIN(sizeof(mc->mc_fpreg), sizeof(*r))); - mc->mc_flags |= _MC_FP_VALID; -} - -void -pt_ucontext_to_fpreg(const ucontext_t *uc, struct fpreg *r) -{ - const mcontext_t *mc = &uc->uc_mcontext; - - if (mc->mc_flags & _MC_FP_VALID) - memcpy(r, mc->mc_fpreg, MIN(sizeof(mc->mc_fpreg), sizeof(*r))); - else - memset(r, 0, sizeof(*r)); -} - -void -pt_md_init(void) -{ -} - -int -pt_reg_sstep(struct reg *reg __unused, int step __unused) -{ - - /* XXX */ - return (0); -} diff --git a/lib/msun/mips/Makefile.inc b/lib/msun/mips/Makefile.inc deleted file mode 100644 index 2fb6ec52ef8..00000000000 --- a/lib/msun/mips/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ - -LDBL_PREC = 53 -SYM_MAPS += ${.CURDIR}/mips/Symbol.map diff --git a/lib/msun/mips/Symbol.map b/lib/msun/mips/Symbol.map deleted file mode 100644 index 2bc6215688b..00000000000 --- a/lib/msun/mips/Symbol.map +++ /dev/null @@ -1,15 +0,0 @@ -/* - */ -FBSD_1.0 { -}; - -FBSD_1.3 { - fesetexceptflag; - feraiseexcept; - fegetenv; - feholdexcept; - feupdateenv; - feenableexcept; - fedisableexcept; - fegetexcept; -}; diff --git a/lib/msun/mips/fenv.c b/lib/msun/mips/fenv.c deleted file mode 100644 index 5ce8f57e295..00000000000 --- a/lib/msun/mips/fenv.c +++ /dev/null @@ -1,66 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 David Schultz - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#define __fenv_static -#include "fenv.h" - -#ifdef __GNUC_GNU_INLINE__ -#error "This file must be compiled with C99 'inline' semantics" -#endif - -/* - * Hopefully the system ID byte is immutable, so it's valid to use - * this as a default environment. - */ -const fenv_t __fe_dfl_env = 0; - -#ifdef __mips_soft_float -#define __set_env(env, flags, mask, rnd) env = ((flags) \ - | (mask)<<_FPUSW_SHIFT \ - | (rnd) << 24) -#define __env_flags(env) ((env) & FE_ALL_EXCEPT) -#define __env_mask(env) (((env) >> _FPUSW_SHIFT) \ - & FE_ALL_EXCEPT) -#define __env_round(env) (((env) >> 24) & _ROUND_MASK) -#include "fenv-softfloat.h" -#endif - -extern inline int feclearexcept(int __excepts); -extern inline int fegetexceptflag(fexcept_t *__flagp, int __excepts); -extern inline int fesetexceptflag(const fexcept_t *__flagp, int __excepts); -extern inline int feraiseexcept(int __excepts); -extern inline int fetestexcept(int __excepts); -extern inline int fegetround(void); -extern inline int fesetround(int __round); -extern inline int fegetenv(fenv_t *__envp); -extern inline int feholdexcept(fenv_t *__envp); -extern inline int fesetenv(const fenv_t *__envp); -extern inline int feupdateenv(const fenv_t *__envp); -extern inline int feenableexcept(int __mask); -extern inline int fedisableexcept(int __mask); -extern inline int fegetexcept(void); diff --git a/lib/msun/mips/fenv.h b/lib/msun/mips/fenv.h deleted file mode 100644 index 05d53452ba8..00000000000 --- a/lib/msun/mips/fenv.h +++ /dev/null @@ -1,281 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004-2005 David Schultz - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _FENV_H_ -#define _FENV_H_ - -#include - -#ifndef __fenv_static -#define __fenv_static static -#endif - -typedef __uint32_t fenv_t; -typedef __uint32_t fexcept_t; - -/* Exception flags */ -#ifdef __mips_soft_float -#define _FPUSW_SHIFT 16 -#define FE_INVALID 0x0001 -#define FE_DIVBYZERO 0x0002 -#define FE_OVERFLOW 0x0004 -#define FE_UNDERFLOW 0x0008 -#define FE_INEXACT 0x0010 -#else -#define _FCSR_CAUSE_SHIFT 10 -#define FE_INVALID 0x0040 -#define FE_DIVBYZERO 0x0020 -#define FE_OVERFLOW 0x0010 -#define FE_UNDERFLOW 0x0008 -#define FE_INEXACT 0x0004 -#endif -#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ - FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW) - -/* Rounding modes */ -#define FE_TONEAREST 0x0000 -#define FE_TOWARDZERO 0x0001 -#define FE_UPWARD 0x0002 -#define FE_DOWNWARD 0x0003 -#define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \ - FE_UPWARD | FE_TOWARDZERO) -__BEGIN_DECLS - -/* Default floating-point environment */ -extern const fenv_t __fe_dfl_env; -#define FE_DFL_ENV (&__fe_dfl_env) - -/* We need to be able to map status flag positions to mask flag positions */ -#define _ENABLE_SHIFT 5 -#define _ENABLE_MASK (FE_ALL_EXCEPT << _ENABLE_SHIFT) - -#if !defined(__mips_soft_float) && !defined(__mips_hard_float) -#error compiler didnt set soft/hard float macros -#endif - -#ifndef __mips_soft_float -#define __cfc1(__fcsr) __asm __volatile("cfc1 %0, $31" : "=r" (__fcsr)) -#define __ctc1(__fcsr) __asm __volatile("ctc1 %0, $31" :: "r" (__fcsr)) -#endif - -#ifdef __mips_soft_float -int feclearexcept(int __excepts); -int fegetexceptflag(fexcept_t *__flagp, int __excepts); -int fesetexceptflag(const fexcept_t *__flagp, int __excepts); -int feraiseexcept(int __excepts); -int fetestexcept(int __excepts); -int fegetround(void); -int fesetround(int __round); -int fegetenv(fenv_t *__envp); -int feholdexcept(fenv_t *__envp); -int fesetenv(const fenv_t *__envp); -int feupdateenv(const fenv_t *__envp); -#else -__fenv_static inline int -feclearexcept(int __excepts) -{ - fexcept_t fcsr; - - __excepts &= FE_ALL_EXCEPT; - __cfc1(fcsr); - fcsr &= ~(__excepts | (__excepts << _FCSR_CAUSE_SHIFT)); - __ctc1(fcsr); - - return (0); -} - -__fenv_static inline int -fegetexceptflag(fexcept_t *__flagp, int __excepts) -{ - fexcept_t fcsr; - - __excepts &= FE_ALL_EXCEPT; - __cfc1(fcsr); - *__flagp = fcsr & __excepts; - - return (0); -} - -__fenv_static inline int -fesetexceptflag(const fexcept_t *__flagp, int __excepts) -{ - fexcept_t fcsr; - - __excepts &= FE_ALL_EXCEPT; - __cfc1(fcsr); - fcsr &= ~__excepts; - fcsr |= *__flagp & __excepts; - __ctc1(fcsr); - - return (0); -} - -__fenv_static inline int -feraiseexcept(int __excepts) -{ - fexcept_t fcsr; - - __excepts &= FE_ALL_EXCEPT; - __cfc1(fcsr); - fcsr |= __excepts | (__excepts << _FCSR_CAUSE_SHIFT); - __ctc1(fcsr); - - return (0); -} - -__fenv_static inline int -fetestexcept(int __excepts) -{ - fexcept_t fcsr; - - __excepts &= FE_ALL_EXCEPT; - __cfc1(fcsr); - - return (fcsr & __excepts); -} - -__fenv_static inline int -fegetround(void) -{ - fexcept_t fcsr; - - __cfc1(fcsr); - - return (fcsr & _ROUND_MASK); -} - -__fenv_static inline int -fesetround(int __round) -{ - fexcept_t fcsr; - - if (__round & ~_ROUND_MASK) - return (-1); - - __cfc1(fcsr); - fcsr &= ~_ROUND_MASK; - fcsr |= __round; - __ctc1(fcsr); - - return (0); -} - -__fenv_static inline int -fegetenv(fenv_t *__envp) -{ - - __cfc1(*__envp); - - return (0); -} - -__fenv_static inline int -feholdexcept(fenv_t *__envp) -{ - fexcept_t fcsr; - - __cfc1(fcsr); - *__envp = fcsr; - fcsr &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); - __ctc1(fcsr); - - return (0); -} - -__fenv_static inline int -fesetenv(const fenv_t *__envp) -{ - - __ctc1(*__envp); - - return (0); -} - -__fenv_static inline int -feupdateenv(const fenv_t *__envp) -{ - fexcept_t fcsr; - - __cfc1(fcsr); - fesetenv(__envp); - feraiseexcept(fcsr); - - return (0); -} -#endif /* !__mips_soft_float */ - -#if __BSD_VISIBLE - -/* We currently provide no external definitions of the functions below. */ - -#ifdef __mips_soft_float -int feenableexcept(int __mask); -int fedisableexcept(int __mask); -int fegetexcept(void); -#else -static inline int -feenableexcept(int __mask) -{ - fenv_t __old_fcsr, __new_fcsr; - - __cfc1(__old_fcsr); - __new_fcsr = __old_fcsr | (__mask & FE_ALL_EXCEPT) << _ENABLE_SHIFT; - __ctc1(__new_fcsr); - - return ((__old_fcsr >> _ENABLE_SHIFT) & FE_ALL_EXCEPT); -} - -static inline int -fedisableexcept(int __mask) -{ - fenv_t __old_fcsr, __new_fcsr; - - __cfc1(__old_fcsr); - __new_fcsr = __old_fcsr & ~((__mask & FE_ALL_EXCEPT) << _ENABLE_SHIFT); - __ctc1(__new_fcsr); - - return ((__old_fcsr >> _ENABLE_SHIFT) & FE_ALL_EXCEPT); -} - -static inline int -fegetexcept(void) -{ - fexcept_t fcsr; - - __cfc1(fcsr); - - return ((fcsr & _ENABLE_MASK) >> _ENABLE_SHIFT); -} - -#endif /* !__mips_soft_float */ - -#endif /* __BSD_VISIBLE */ - -__END_DECLS - -#endif /* !_FENV_H_ */ diff --git a/lib/msun/powerpc/Makefile.inc b/lib/msun/powerpc/Makefile.inc deleted file mode 100644 index c1088659f2b..00000000000 --- a/lib/msun/powerpc/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ - -LDBL_PREC = 53 -SYM_MAPS += ${.CURDIR}/powerpc/Symbol.map diff --git a/lib/msun/powerpc/Symbol.map b/lib/msun/powerpc/Symbol.map deleted file mode 100644 index 9e3c5d47180..00000000000 --- a/lib/msun/powerpc/Symbol.map +++ /dev/null @@ -1,17 +0,0 @@ -/* - */ -FBSD_1.0 { -}; - -FBSD_1.3 { - fesetexceptflag; - feraiseexcept; - fegetenv; - feholdexcept; - feupdateenv; -}; - -FBSD_1.7 { - feenableexcept; - fedisableexcept; -}; diff --git a/lib/msun/powerpc/fenv.c b/lib/msun/powerpc/fenv.c deleted file mode 100644 index c90a5aee819..00000000000 --- a/lib/msun/powerpc/fenv.c +++ /dev/null @@ -1,80 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 David Schultz - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#define __fenv_static -#include "fenv.h" -#ifdef __SPE__ -#include -#include -#endif - -#ifdef __GNUC_GNU_INLINE__ -#error "This file must be compiled with C99 'inline' semantics" -#endif - -const fenv_t __fe_dfl_env = 0x00000000; - -extern inline int feclearexcept(int __excepts); -extern inline int fegetexceptflag(fexcept_t *__flagp, int __excepts); -extern inline int fesetexceptflag(const fexcept_t *__flagp, int __excepts); -#ifndef __SPE__ -extern inline int feraiseexcept(int __excepts); -#endif -extern inline int fetestexcept(int __excepts); -extern inline int fegetround(void); -extern inline int fesetround(int __round); -extern inline int fegetenv(fenv_t *__envp); -extern inline int feholdexcept(fenv_t *__envp); -extern inline int fesetenv(const fenv_t *__envp); -extern inline int feupdateenv(const fenv_t *__envp); -extern inline int feenableexcept(int __mask); -extern inline int fedisableexcept(int __mask); - -#ifdef __SPE__ -#define PMAX 0x7f7fffff -#define PMIN 0x00800000 -int feraiseexcept(int __excepts) -{ - uint32_t spefscr; - - spefscr = mfspr(SPR_SPEFSCR); - mtspr(SPR_SPEFSCR, spefscr | (__excepts & FE_ALL_EXCEPT)); - - if (__excepts & FE_INVALID) - __asm __volatile ("efsdiv %0, %0, %1" :: "r"(0), "r"(0)); - if (__excepts & FE_DIVBYZERO) - __asm __volatile ("efsdiv %0, %0, %1" :: "r"(1.0f), "r"(0)); - if (__excepts & FE_UNDERFLOW) - __asm __volatile ("efsmul %0, %0, %0" :: "r"(PMIN)); - if (__excepts & FE_OVERFLOW) - __asm __volatile ("efsadd %0, %0, %0" :: "r"(PMAX)); - if (__excepts & FE_INEXACT) - __asm __volatile ("efssub %0, %0, %1" :: "r"(PMIN), "r"(1.0f)); - return (0); -} -#endif diff --git a/lib/msun/powerpc/fenv.h b/lib/msun/powerpc/fenv.h deleted file mode 100644 index 49fffb19620..00000000000 --- a/lib/msun/powerpc/fenv.h +++ /dev/null @@ -1,305 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004-2005 David Schultz - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _FENV_H_ -#define _FENV_H_ - -#include -#include - -#ifndef __fenv_static -#define __fenv_static static -#endif - -typedef __uint32_t fenv_t; -typedef __uint32_t fexcept_t; - -/* Exception flags */ -#ifdef __SPE__ -#define FE_OVERFLOW 0x00000100 -#define FE_UNDERFLOW 0x00000200 -#define FE_DIVBYZERO 0x00000400 -#define FE_INVALID 0x00000800 -#define FE_INEXACT 0x00001000 - -#define FE_ALL_INVALID FE_INVALID - -#define _FPUSW_SHIFT 6 -#else -#define FE_INEXACT 0x02000000 -#define FE_DIVBYZERO 0x04000000 -#define FE_UNDERFLOW 0x08000000 -#define FE_OVERFLOW 0x10000000 -#define FE_INVALID 0x20000000 /* all types of invalid FP ops */ - -/* - * The PowerPC architecture has extra invalid flags that indicate the - * specific type of invalid operation occurred. These flags may be - * tested, set, and cleared---but not masked---separately. All of - * these bits are cleared when FE_INVALID is cleared, but only - * FE_VXSOFT is set when FE_INVALID is explicitly set in software. - */ -#define FE_VXCVI 0x00000100 /* invalid integer convert */ -#define FE_VXSQRT 0x00000200 /* square root of a negative */ -#define FE_VXSOFT 0x00000400 /* software-requested exception */ -#define FE_VXVC 0x00080000 /* ordered comparison involving NaN */ -#define FE_VXIMZ 0x00100000 /* inf * 0 */ -#define FE_VXZDZ 0x00200000 /* 0 / 0 */ -#define FE_VXIDI 0x00400000 /* inf / inf */ -#define FE_VXISI 0x00800000 /* inf - inf */ -#define FE_VXSNAN 0x01000000 /* operation on a signalling NaN */ -#define FE_ALL_INVALID (FE_VXCVI | FE_VXSQRT | FE_VXSOFT | FE_VXVC | \ - FE_VXIMZ | FE_VXZDZ | FE_VXIDI | FE_VXISI | \ - FE_VXSNAN | FE_INVALID) - -#define _FPUSW_SHIFT 22 -#endif -#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ - FE_ALL_INVALID | FE_OVERFLOW | FE_UNDERFLOW) - -/* Rounding modes */ -#define FE_TONEAREST 0x0000 -#define FE_TOWARDZERO 0x0001 -#define FE_UPWARD 0x0002 -#define FE_DOWNWARD 0x0003 -#define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \ - FE_UPWARD | FE_TOWARDZERO) - -__BEGIN_DECLS - -/* Default floating-point environment */ -extern const fenv_t __fe_dfl_env; -#define FE_DFL_ENV (&__fe_dfl_env) - -/* We need to be able to map status flag positions to mask flag positions */ -#define _ENABLE_MASK ((FE_DIVBYZERO | FE_INEXACT | FE_INVALID | \ - FE_OVERFLOW | FE_UNDERFLOW) >> _FPUSW_SHIFT) - -#ifndef _SOFT_FLOAT -#ifdef __SPE__ -#define __mffs(__env) \ - __asm __volatile("mfspr %0, 512" : "=r" ((__env)->__bits.__reg)) -#define __mtfsf(__env) \ - __asm __volatile("mtspr 512,%0;isync" :: "r" ((__env).__bits.__reg)) -#else -#define __mffs(__env) \ - __asm __volatile("mffs %0" : "=f" ((__env)->__d)) -#define __mtfsf(__env) \ - __asm __volatile("mtfsf 255,%0" :: "f" ((__env).__d)) -#endif -#else -#define __mffs(__env) -#define __mtfsf(__env) -#endif - -union __fpscr { - double __d; - struct { -#if _BYTE_ORDER == _LITTLE_ENDIAN - fenv_t __reg; - __uint32_t __junk; -#else - __uint32_t __junk; - fenv_t __reg; -#endif - } __bits; -}; - -__fenv_static inline int -feclearexcept(int __excepts) -{ - union __fpscr __r; - - if (__excepts & FE_INVALID) - __excepts |= FE_ALL_INVALID; - __mffs(&__r); - __r.__bits.__reg &= ~__excepts; - __mtfsf(__r); - return (0); -} - -__fenv_static inline int -fegetexceptflag(fexcept_t *__flagp, int __excepts) -{ - union __fpscr __r; - - __mffs(&__r); - *__flagp = __r.__bits.__reg & __excepts; - return (0); -} - -__fenv_static inline int -fesetexceptflag(const fexcept_t *__flagp, int __excepts) -{ - union __fpscr __r; - - if (__excepts & FE_INVALID) - __excepts |= FE_ALL_INVALID; - __mffs(&__r); - __r.__bits.__reg &= ~__excepts; - __r.__bits.__reg |= *__flagp & __excepts; - __mtfsf(__r); - return (0); -} - -#ifdef __SPE__ -extern int feraiseexcept(int __excepts); -#else -__fenv_static inline int -feraiseexcept(int __excepts) -{ - union __fpscr __r; - - if (__excepts & FE_INVALID) - __excepts |= FE_VXSOFT; - __mffs(&__r); - __r.__bits.__reg |= __excepts; - __mtfsf(__r); - return (0); -} -#endif - -__fenv_static inline int -fetestexcept(int __excepts) -{ - union __fpscr __r; - - __mffs(&__r); - return (__r.__bits.__reg & __excepts); -} - -__fenv_static inline int -fegetround(void) -{ - union __fpscr __r; - - __mffs(&__r); - return (__r.__bits.__reg & _ROUND_MASK); -} - -__fenv_static inline int -fesetround(int __round) -{ - union __fpscr __r; - - if (__round & ~_ROUND_MASK) - return (-1); - __mffs(&__r); - __r.__bits.__reg &= ~_ROUND_MASK; - __r.__bits.__reg |= __round; - __mtfsf(__r); - return (0); -} - -__fenv_static inline int -fegetenv(fenv_t *__envp) -{ - union __fpscr __r; - - __mffs(&__r); - *__envp = __r.__bits.__reg; - return (0); -} - -__fenv_static inline int -feholdexcept(fenv_t *__envp) -{ - union __fpscr __r; - - __mffs(&__r); - *__envp = __r.__bits.__reg; - __r.__bits.__reg &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); - __mtfsf(__r); - return (0); -} - -__fenv_static inline int -fesetenv(const fenv_t *__envp) -{ - union __fpscr __r; - - __r.__bits.__reg = *__envp; - __mtfsf(__r); - return (0); -} - -__fenv_static inline int -feupdateenv(const fenv_t *__envp) -{ - union __fpscr __r; - - __mffs(&__r); - __r.__bits.__reg &= FE_ALL_EXCEPT; - __r.__bits.__reg |= *__envp; - __mtfsf(__r); - return (0); -} - -#if __BSD_VISIBLE - -__fenv_static inline int -feenableexcept(int __mask) -{ - union __fpscr __r; - fenv_t __oldmask; - - __mffs(&__r); - __oldmask = __r.__bits.__reg; - __r.__bits.__reg |= (__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT; - __mtfsf(__r); - return ((__oldmask & _ENABLE_MASK) << _FPUSW_SHIFT); -} - -__fenv_static inline int -fedisableexcept(int __mask) -{ - union __fpscr __r; - fenv_t __oldmask; - - __mffs(&__r); - __oldmask = __r.__bits.__reg; - __r.__bits.__reg &= ~((__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT); - __mtfsf(__r); - return ((__oldmask & _ENABLE_MASK) << _FPUSW_SHIFT); -} - -/* We currently provide no external definition of fegetexcept(). */ -static inline int -fegetexcept(void) -{ - union __fpscr __r; - - __mffs(&__r); - return ((__r.__bits.__reg & _ENABLE_MASK) << _FPUSW_SHIFT); -} - -#endif /* __BSD_VISIBLE */ - -__END_DECLS - -#endif /* !_FENV_H_ */ diff --git a/libexec/rc/rc.d/ldconfig b/libexec/rc/rc.d/ldconfig index 388d4cd276a..8486cb93fff 100755 --- a/libexec/rc/rc.d/ldconfig +++ b/libexec/rc/rc.d/ldconfig @@ -42,7 +42,7 @@ ldconfig_start() machine_arch=$(sysctl -n hw.machine_arch) case ${machine_arch} in - amd64|mips64|powerpc64) + amd64) for i in ${ldconfig_local32_dirs}; do if [ -d "${i}" ]; then _files=`find ${i} -type f` diff --git a/libexec/rtld-elf/Makefile b/libexec/rtld-elf/Makefile index 4735ad774aa..0bef8b2b3c3 100644 --- a/libexec/rtld-elf/Makefile +++ b/libexec/rtld-elf/Makefile @@ -33,8 +33,8 @@ MAN?= rtld.1 ACFLAGS+= -DLOCORE CFLAGS+= -Wall -DIN_RTLD -ffreestanding CFLAGS+= -I${SRCTOP}/lib/csu/common -.if exists(${RTLD_ELF_DIR}/${MACHINE_ARCH:S/powerpc64le/powerpc64/}) -RTLD_ARCH= ${MACHINE_ARCH:S/powerpc64le/powerpc64/} +.if exists(${RTLD_ELF_DIR}/${MACHINE_ARCH}) +RTLD_ARCH= ${MACHINE_ARCH} .else RTLD_ARCH= ${MACHINE_CPUARCH} .endif diff --git a/libexec/rtld-elf/mips/Makefile.inc b/libexec/rtld-elf/mips/Makefile.inc deleted file mode 100644 index dc41c0cfab2..00000000000 --- a/libexec/rtld-elf/mips/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ - -CFLAGS.reloc.c+=-fno-jump-tables diff --git a/libexec/rtld-elf/mips/reloc.c b/libexec/rtld-elf/mips/reloc.c deleted file mode 100644 index 4083d983b52..00000000000 --- a/libexec/rtld-elf/mips/reloc.c +++ /dev/null @@ -1,784 +0,0 @@ -/* $NetBSD: mips_reloc.c,v 1.58 2010/01/14 11:57:06 skrll Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 1997 Michael L. Hitch - * Portions copyright 2002 Charles M. Hannum - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include "debug.h" -#include "rtld.h" - -#ifdef __mips_n64 -#define GOT1_MASK 0x8000000000000000UL -#else -#define GOT1_MASK 0x80000000UL -#endif - -/* - * Determine if the second GOT entry is reserved for rtld or if it is - * the first "real" GOT entry. - * - * This must be a macro rather than a function so that - * _rtld_relocate_nonplt_self doesn't trigger a GOT invocation trying - * to use it before the local GOT entries in rtld are adjusted. - */ -#ifdef __mips_n64 -/* Old binutils uses the 32-bit GOT1 mask value for N64. */ -#define GOT1_RESERVED_FOR_RTLD(got) \ - (((got)[1] == 0x80000000) || (got)[1] & GOT1_MASK) -#else -#define GOT1_RESERVED_FOR_RTLD(got) ((got)[1] & GOT1_MASK) -#endif - -#ifdef __mips_n64 -/* - * ELF64 MIPS encodes the relocs uniquely. The first 32-bits of info contain - * the symbol index. The top 32-bits contain three relocation types encoded - * in big-endian integer with first relocation in LSB. This means for little - * endian we have to byte swap that integer (r_type). - */ -#define Elf_Sxword Elf64_Sxword -#define ELF_R_NXTTYPE_64_P(r_type) ((((r_type) >> 8) & 0xff) == R_TYPE(64)) -#if BYTE_ORDER == LITTLE_ENDIAN -#undef ELF_R_SYM -#undef ELF_R_TYPE -#define ELF_R_SYM(r_info) ((r_info) & 0xffffffff) -#define ELF_R_TYPE(r_info) bswap32((r_info) >> 32) -#endif -#else -#define ELF_R_NXTTYPE_64_P(r_type) (0) -#define Elf_Sxword Elf32_Sword -#endif - -void _rtld_pltbind_start(void); - -void -init_pltgot(Obj_Entry *obj) -{ - - if (obj->pltgot != NULL) { - obj->pltgot[0] = (Elf_Addr) &_rtld_bind_start; - if (GOT1_RESERVED_FOR_RTLD(obj->pltgot)) - obj->pltgot[1] = (Elf_Addr) obj | GOT1_MASK; - } - if (obj->mips_pltgot != NULL) { - obj->mips_pltgot[0] = (Elf_Addr) &_rtld_pltbind_start; - obj->mips_pltgot[1] = (Elf_Addr) obj; - } -} - -int -do_copy_relocations(Obj_Entry *dstobj) -{ - const Obj_Entry *srcobj, *defobj; - const Elf_Rel *rellim; - const Elf_Rel *rel; - const Elf_Sym *srcsym; - const Elf_Sym *dstsym; - const void *srcaddr; - const char *name; - void *dstaddr; - SymLook req; - size_t size; - int res; - - /* - * COPY relocs are invalid outside of the main program - */ - assert(dstobj->mainprog); - - rellim = (const Elf_Rel *)((const char *)dstobj->rel + dstobj->relsize); - for (rel = dstobj->rel; rel < rellim; rel++) { - if (ELF_R_TYPE(rel->r_info) != R_MIPS_COPY) - continue; - - dstaddr = (void *)(dstobj->relocbase + rel->r_offset); - dstsym = dstobj->symtab + ELF_R_SYM(rel->r_info); - name = dstobj->strtab + dstsym->st_name; - size = dstsym->st_size; - - symlook_init(&req, name); - req.ventry = fetch_ventry(dstobj, ELF_R_SYM(rel->r_info)); - req.flags = SYMLOOK_EARLY; - - for (srcobj = globallist_next(dstobj); srcobj != NULL; - srcobj = globallist_next(srcobj)) { - res = symlook_obj(&req, srcobj); - if (res == 0) { - srcsym = req.sym_out; - defobj = req.defobj_out; - break; - } - } - if (srcobj == NULL) { - _rtld_error( -"Undefined symbol \"%s\" referenced from COPY relocation in %s", - name, dstobj->path); - return (-1); - } - - srcaddr = (const void *)(defobj->relocbase + srcsym->st_value); - memcpy(dstaddr, srcaddr, size); - } - - return (0); -} - -void _rtld_relocate_nonplt_self(Elf_Dyn *, Elf_Addr); - -/* - * It is possible for the compiler to emit relocations for unaligned data. - * We handle this situation with these inlines. - */ -static __inline Elf_Sxword -load_ptr(void *where, size_t len) -{ - Elf_Sxword val; - - if (__predict_true(((uintptr_t)where & (len - 1)) == 0)) { -#ifdef __mips_n64 - if (len == sizeof(Elf_Sxword)) - return *(Elf_Sxword *)where; -#endif - return *(Elf_Sword *)where; - } - - val = 0; -#if BYTE_ORDER == LITTLE_ENDIAN - (void)memcpy(&val, where, len); -#endif -#if BYTE_ORDER == BIG_ENDIAN - (void)memcpy((uint8_t *)((&val)+1) - len, where, len); -#endif - return (len == sizeof(Elf_Sxword)) ? val : (Elf_Sword)val; -} - -static __inline void -store_ptr(void *where, Elf_Sxword val, size_t len) -{ - if (__predict_true(((uintptr_t)where & (len - 1)) == 0)) { -#ifdef __mips_n64 - if (len == sizeof(Elf_Sxword)) { - *(Elf_Sxword *)where = val; - return; - } -#endif - *(Elf_Sword *)where = val; - return; - } -#if BYTE_ORDER == LITTLE_ENDIAN - (void)memcpy(where, &val, len); -#endif -#if BYTE_ORDER == BIG_ENDIAN - (void)memcpy(where, (const uint8_t *)((&val)+1) - len, len); -#endif -} - -void -_rtld_relocate_nonplt_self(Elf_Dyn *dynp, Elf_Addr relocbase) -{ - const Elf_Rel *rel = NULL, *rellim; - Elf_Addr relsz = 0; - const Elf_Sym *symtab = NULL, *sym; - Elf_Addr *where; - Elf_Addr *got = NULL; - Elf_Word local_gotno = 0, symtabno = 0, gotsym = 0; - size_t i; - - for (; dynp->d_tag != DT_NULL; dynp++) { - switch (dynp->d_tag) { - case DT_REL: - rel = (const Elf_Rel *)(relocbase + dynp->d_un.d_ptr); - break; - case DT_RELSZ: - relsz = dynp->d_un.d_val; - break; - case DT_SYMTAB: - symtab = (const Elf_Sym *)(relocbase + dynp->d_un.d_ptr); - break; - case DT_PLTGOT: - got = (Elf_Addr *)(relocbase + dynp->d_un.d_ptr); - break; - case DT_MIPS_LOCAL_GOTNO: - local_gotno = dynp->d_un.d_val; - break; - case DT_MIPS_SYMTABNO: - symtabno = dynp->d_un.d_val; - break; - case DT_MIPS_GOTSYM: - gotsym = dynp->d_un.d_val; - break; - } - } - - i = GOT1_RESERVED_FOR_RTLD(got) ? 2 : 1; - /* Relocate the local GOT entries */ - got += i; - for (; i < local_gotno; i++) { - *got++ += relocbase; - } - - sym = symtab + gotsym; - /* Now do the global GOT entries */ - for (i = gotsym; i < symtabno; i++) { - *got = sym->st_value + relocbase; - ++sym; - ++got; - } - - rellim = (const Elf_Rel *)((const char *)rel + relsz); - for (; rel < rellim; rel++) { - Elf_Word r_symndx, r_type; - - where = (void *)(relocbase + rel->r_offset); - - r_symndx = ELF_R_SYM(rel->r_info); - r_type = ELF_R_TYPE(rel->r_info); - - switch (r_type & 0xff) { - case R_TYPE(REL32): { - const size_t rlen = - ELF_R_NXTTYPE_64_P(r_type) - ? sizeof(Elf_Sxword) - : sizeof(Elf_Sword); - Elf_Sxword old = load_ptr(where, rlen); - Elf_Sxword val = old; -#ifdef __mips_n64 - assert(r_type == R_TYPE(REL32) - || r_type == (R_TYPE(REL32)|(R_TYPE(64) << 8))); -#endif - assert(r_symndx < gotsym); - sym = symtab + r_symndx; - assert(ELF_ST_BIND(sym->st_info) == STB_LOCAL); - val += relocbase; - dbg("REL32/L(%p) %p -> %p in ", - where, (void *)old, (void *)val); - store_ptr(where, val, rlen); - break; - } - - case R_TYPE(GPREL32): - case R_TYPE(NONE): - break; - - - default: - abort(); - break; - } - } -} - -Elf_Addr -_mips_rtld_bind(Obj_Entry *obj, Elf_Size reloff) -{ - Elf_Addr *got = obj->pltgot; - const Elf_Sym *def; - const Obj_Entry *defobj; - Elf_Addr *where; - Elf_Addr target; - RtldLockState lockstate; - - rlock_acquire(rtld_bind_lock, &lockstate); - if (sigsetjmp(lockstate.env, 0) != 0) - lock_upgrade(rtld_bind_lock, &lockstate); - - where = &got[obj->local_gotno + reloff - obj->gotsym]; - def = find_symdef(reloff, obj, &defobj, SYMLOOK_IN_PLT, NULL, - &lockstate); - if (def == NULL) - rtld_die(); - - target = (Elf_Addr)(defobj->relocbase + def->st_value); - dbg("bind now/fixup at %s sym # %jd in %s --> was=%p new=%p", - obj->path, - (intmax_t)reloff, defobj->strtab + def->st_name, - (void *)*where, (void *)target); - if (!ld_bind_not) - *where = target; - lock_release(rtld_bind_lock, &lockstate); - return (Elf_Addr)target; -} - -int -reloc_non_plt(Obj_Entry *obj, Obj_Entry *obj_rtld, int flags, - RtldLockState *lockstate) -{ - const Elf_Rel *rel; - const Elf_Rel *rellim; - Elf_Addr *got = obj->pltgot; - const Elf_Sym *sym, *def; - const Obj_Entry *defobj; - Elf_Word i; -#ifdef SUPPORT_OLD_BROKEN_LD - int broken; -#endif - - /* The relocation for the dynamic loader has already been done. */ - if (obj == obj_rtld) - return (0); - - if ((flags & SYMLOOK_IFUNC) != 0) - /* XXX not implemented */ - return (0); - -#ifdef SUPPORT_OLD_BROKEN_LD - broken = 0; - sym = obj->symtab; - for (i = 1; i < 12; i++) - if (sym[i].st_info == ELF_ST_INFO(STB_LOCAL, STT_NOTYPE)) - broken = 1; - dbg("%s: broken=%d", obj->path, broken); -#endif - - i = GOT1_RESERVED_FOR_RTLD(got) ? 2 : 1; - - /* Relocate the local GOT entries */ - got += i; - dbg("got:%p for %d entries adding %p", - got, obj->local_gotno, obj->relocbase); - for (; i < obj->local_gotno; i++) { - *got += (Elf_Addr)obj->relocbase; - got++; - } - sym = obj->symtab + obj->gotsym; - - dbg("got:%p for %d entries", - got, obj->symtabno); - /* Now do the global GOT entries */ - for (i = obj->gotsym; i < obj->symtabno; i++) { - dbg(" doing got %d sym %p (%s, %lx)", i - obj->gotsym, sym, - sym->st_name + obj->strtab, (u_long) *got); - -#ifdef SUPPORT_OLD_BROKEN_LD - if (ELF_ST_TYPE(sym->st_info) == STT_FUNC && - broken && sym->st_shndx == SHN_UNDEF) { - /* - * XXX DANGER WILL ROBINSON! - * You might think this is stupid, as it intentionally - * defeats lazy binding -- and you'd be right. - * Unfortunately, for lazy binding to work right, we - * need to a way to force the GOT slots used for - * function pointers to be resolved immediately. This - * is supposed to be done automatically by the linker, - * by not outputting a PLT slot and setting st_value - * to 0 if there are non-PLT references, but older - * versions of GNU ld do not do this. - */ - def = find_symdef(i, obj, &defobj, flags, NULL, - lockstate); - if (def == NULL) - return -1; - *got = def->st_value + (Elf_Addr)defobj->relocbase; - } else -#endif - if (ELF_ST_TYPE(sym->st_info) == STT_FUNC && - sym->st_value != 0 && sym->st_shndx == SHN_UNDEF) { - /* - * If there are non-PLT references to the function, - * st_value should be 0, forcing us to resolve the - * address immediately. - * - * XXX DANGER WILL ROBINSON! - * The linker is not outputting PLT slots for calls to - * functions that are defined in the same shared - * library. This is a bug, because it can screw up - * link ordering rules if the symbol is defined in - * more than one module. For now, if there is a - * definition, we fail the test above and force a full - * symbol lookup. This means that all intra-module - * calls are bound immediately. - mycroft, 2003/09/24 - */ - *got = sym->st_value + (Elf_Addr)obj->relocbase; - if ((Elf_Addr)(*got) == (Elf_Addr)obj->relocbase) { - dbg("Warning2, i:%d maps to relocbase address:%p", - i, obj->relocbase); - } - - } else if (sym->st_info == ELF_ST_INFO(STB_GLOBAL, STT_SECTION)) { - /* Symbols with index SHN_ABS are not relocated. */ - if (sym->st_shndx != SHN_ABS) { - *got = sym->st_value + - (Elf_Addr)obj->relocbase; - if ((Elf_Addr)(*got) == (Elf_Addr)obj->relocbase) { - dbg("Warning3, i:%d maps to relocbase address:%p", - i, obj->relocbase); - } - } - } else { - /* TODO: add cache here */ - def = find_symdef(i, obj, &defobj, flags, NULL, - lockstate); - if (def == NULL) { - dbg("Warning4, can't find symbole %d", i); - return -1; - } - *got = def->st_value + (Elf_Addr)defobj->relocbase; - if ((Elf_Addr)(*got) == (Elf_Addr)obj->relocbase) { - dbg("Warning4, i:%d maps to relocbase address:%p", - i, obj->relocbase); - dbg("via first obj symbol %s", - obj->strtab + obj->symtab[i].st_name); - dbg("found in obj %p:%s", - defobj, defobj->path); - } - } - - dbg(" --> now %lx", (u_long) *got); - ++sym; - ++got; - } - - got = obj->pltgot; - rellim = (const Elf_Rel *)((const char *)obj->rel + obj->relsize); - for (rel = obj->rel; rel < rellim; rel++) { - Elf_Word r_symndx, r_type; - void *where; - - where = obj->relocbase + rel->r_offset; - r_symndx = ELF_R_SYM(rel->r_info); - r_type = ELF_R_TYPE(rel->r_info); - - switch (r_type & 0xff) { - case R_TYPE(NONE): - break; - - case R_TYPE(REL32): { - /* 32-bit PC-relative reference */ - const size_t rlen = - ELF_R_NXTTYPE_64_P(r_type) - ? sizeof(Elf_Sxword) - : sizeof(Elf_Sword); - Elf_Sxword old = load_ptr(where, rlen); - Elf_Sxword val = old; - - def = obj->symtab + r_symndx; - - if (r_symndx >= obj->gotsym) { - val += got[obj->local_gotno + r_symndx - obj->gotsym]; - dbg("REL32/G(%p) %p --> %p (%s) in %s", - where, (void *)old, (void *)val, - obj->strtab + def->st_name, - obj->path); - } else { - /* - * XXX: ABI DIFFERENCE! - * - * Old NetBSD binutils would generate shared - * libs with section-relative relocations being - * already adjusted for the start address of - * the section. - * - * New binutils, OTOH, generate shared libs - * with the same relocations being based at - * zero, so we need to add in the start address - * of the section. - * - * --rkb, Oct 6, 2001 - */ - - if (def->st_info == - ELF_ST_INFO(STB_LOCAL, STT_SECTION) -#ifdef SUPPORT_OLD_BROKEN_LD - && !broken -#endif - ) - val += (Elf_Addr)def->st_value; - - val += (Elf_Addr)obj->relocbase; - - dbg("REL32/L(%p) %p -> %p (%s) in %s", - where, (void *)old, (void *)val, - obj->strtab + def->st_name, obj->path); - } - store_ptr(where, val, rlen); - break; - } - - case R_TYPE(COPY): - /* - * These are deferred until all other relocations have - * been done. All we do here is make sure that the - * COPY relocation is not in a shared library. They - * are allowed only in executable files. - */ - if (!obj->mainprog) { - _rtld_error("%s: Unexpected R_MIPS_COPY " - "relocation in shared library", obj->path); - return (-1); - } - break; - -#ifdef __mips_n64 - case R_TYPE(TLS_DTPMOD64): -#else - case R_TYPE(TLS_DTPMOD32): -#endif - { - - const size_t rlen = sizeof(Elf_Addr); - Elf_Addr old = load_ptr(where, rlen); - Elf_Addr val = old; - - def = find_symdef(r_symndx, obj, &defobj, flags, NULL, - lockstate); - if (def == NULL) - return -1; - - val += (Elf_Addr)defobj->tlsindex; - - store_ptr(where, val, rlen); - dbg("DTPMOD %s in %s %p --> %p in %s", - obj->strtab + obj->symtab[r_symndx].st_name, - obj->path, (void *)old, (void*)val, defobj->path); - break; - } - -#ifdef __mips_n64 - case R_TYPE(TLS_DTPREL64): -#else - case R_TYPE(TLS_DTPREL32): -#endif - { - const size_t rlen = sizeof(Elf_Addr); - Elf_Addr old = load_ptr(where, rlen); - Elf_Addr val = old; - - def = find_symdef(r_symndx, obj, &defobj, flags, NULL, - lockstate); - if (def == NULL) - return -1; - - if (!defobj->tls_static && !allocate_tls_offset(obj)) - return -1; - - val += (Elf_Addr)def->st_value - TLS_DTV_OFFSET; - store_ptr(where, val, rlen); - - dbg("DTPREL %s in %s %p --> %p in %s", - obj->strtab + obj->symtab[r_symndx].st_name, - obj->path, (void*)old, (void *)val, defobj->path); - break; - } - -#ifdef __mips_n64 - case R_TYPE(TLS_TPREL64): -#else - case R_TYPE(TLS_TPREL32): -#endif - { - const size_t rlen = sizeof(Elf_Addr); - Elf_Addr old = load_ptr(where, rlen); - Elf_Addr val = old; - - def = find_symdef(r_symndx, obj, &defobj, flags, NULL, - lockstate); - - if (def == NULL) - return -1; - - if (!defobj->tls_static && !allocate_tls_offset(obj)) - return -1; - - val += (Elf_Addr)(def->st_value + defobj->tlsoffset - - TLS_TP_OFFSET - TLS_TCB_SIZE); - store_ptr(where, val, rlen); - - dbg("TPREL %s in %s %p --> %p in %s", - obj->strtab + obj->symtab[r_symndx].st_name, - obj->path, (void*)old, (void *)val, defobj->path); - break; - } - - - - default: - dbg("sym = %lu, type = %lu, offset = %p, " - "contents = %p, symbol = %s", - (u_long)r_symndx, (u_long)ELF_R_TYPE(rel->r_info), - (void *)rel->r_offset, - (void *)load_ptr(where, sizeof(Elf_Sword)), - obj->strtab + obj->symtab[r_symndx].st_name); - _rtld_error("%s: Unsupported relocation type %ld " - "in non-PLT relocations", - obj->path, (u_long) ELF_R_TYPE(rel->r_info)); - return -1; - } - } - - return 0; -} - -/* - * Process the PLT relocations. - */ -int -reloc_plt(Obj_Entry *obj, int flags __unused, RtldLockState *lockstate __unused) -{ - const Elf_Rel *rellim; - const Elf_Rel *rel; - - rellim = (const Elf_Rel *)((const char *)obj->pltrel + obj->pltrelsize); - for (rel = obj->pltrel; rel < rellim; rel++) { - Elf_Addr *where; - - switch (ELF_R_TYPE(rel->r_info)) { - case R_MIPS_JUMP_SLOT: - where = (Elf_Addr *)(obj->relocbase + rel->r_offset); - *where += (Elf_Addr )obj->relocbase; - break; - default: - _rtld_error("Unknown relocation type %u in PLT", - (unsigned int)ELF_R_TYPE(rel->r_info)); - return (-1); - } - } - - return (0); -} - -/* - * LD_BIND_NOW was set - force relocation for all jump slots - */ -int -reloc_jmpslots(Obj_Entry *obj, int flags, RtldLockState *lockstate) -{ - const Obj_Entry *defobj; - const Elf_Rel *rellim; - const Elf_Rel *rel; - const Elf_Sym *def; - - rellim = (const Elf_Rel *)((const char *)obj->pltrel + obj->pltrelsize); - for (rel = obj->pltrel; rel < rellim; rel++) { - Elf_Addr *where; - - switch (ELF_R_TYPE(rel->r_info)) { - case R_MIPS_JUMP_SLOT: - def = find_symdef(ELF_R_SYM(rel->r_info), obj, - &defobj, SYMLOOK_IN_PLT | flags, NULL, lockstate); - if (def == NULL) { - dbg("reloc_jmpslots: sym not found"); - return (-1); - } - - where = (Elf_Addr *)(obj->relocbase + rel->r_offset); - *where = (Elf_Addr)(defobj->relocbase + def->st_value); - break; - default: - _rtld_error("Unknown relocation type %u in PLT", - (unsigned int)ELF_R_TYPE(rel->r_info)); - return (-1); - } - } - - return (0); -} - -int -reloc_iresolve(Obj_Entry *obj __unused, - struct Struct_RtldLockState *lockstate __unused) -{ - - /* XXX not implemented */ - return (0); -} - -int -reloc_iresolve_nonplt(Obj_Entry *obj __unused, - struct Struct_RtldLockState *lockstate __unused) -{ - - /* XXX not implemented */ - return (0); -} - -int -reloc_gnu_ifunc(Obj_Entry *obj __unused, int flags __unused, - struct Struct_RtldLockState *lockstate __unused) -{ - - /* XXX not implemented */ - return (0); -} - -Elf_Addr -reloc_jmpslot(Elf_Addr *where, Elf_Addr target, - const Obj_Entry *defobj __unused, const Obj_Entry *obj __unused, - const Elf_Rel *rel) -{ - - assert(ELF_R_TYPE(rel->r_info) == R_MIPS_JUMP_SLOT); - - if (*where != target && !ld_bind_not) - *where = target; - return (target); -} - -void -ifunc_init(Elf_Auxinfo *aux_info[__min_size(AT_COUNT)] __unused) -{ - -} - -void -allocate_initial_tls(Obj_Entry *objs) -{ - - /* - * Fix the size of the static TLS block by using the maximum - * offset allocated so far and adding a bit for dynamic modules to - * use. - */ - tls_static_space = tls_last_offset + tls_last_size + RTLD_STATIC_TLS_EXTRA; - - _tcb_set(allocate_tls(objs, NULL, TLS_TCB_SIZE, TLS_TCB_ALIGN)); -} - -void * -__tls_get_addr(tls_index* ti) -{ - uintptr_t **dtvp; - char *p; - - dtvp = &_tcb_get()->tcb_dtv; - p = tls_get_addr_common(dtvp, ti->ti_module, ti->ti_offset); - - return (p + TLS_DTV_OFFSET); -} diff --git a/libexec/rtld-elf/mips/rtld_machdep.h b/libexec/rtld-elf/mips/rtld_machdep.h deleted file mode 100644 index 0031b685c15..00000000000 --- a/libexec/rtld-elf/mips/rtld_machdep.h +++ /dev/null @@ -1,80 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1999, 2000 John D. Polstra. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef RTLD_MACHDEP_H -#define RTLD_MACHDEP_H 1 - -#include -#include -#include - -struct Struct_Obj_Entry; - -#define MD_OBJ_ENTRY - -/* Return the address of the .dynamic section in the dynamic linker. */ -#define rtld_dynamic(obj) (&_DYNAMIC) - -Elf_Addr reloc_jmpslot(Elf_Addr *where, Elf_Addr target, - const struct Struct_Obj_Entry *defobj, const struct Struct_Obj_Entry *obj, - const Elf_Rel *rel); -Elf_Addr _mips_rtld_bind(struct Struct_Obj_Entry *obj, Elf_Size reloff); - -#define make_function_pointer(def, defobj) \ - ((defobj)->relocbase + (def)->st_value) - -#define call_initfini_pointer(obj, target) \ - (((InitFunc)(target))()) - -#define call_init_pointer(obj, target) \ - (((InitArrFunc)(target))(main_argc, main_argv, environ)) - -#define call_ifunc_resolver(ptr) \ - (((Elf_Addr (*)(void))ptr)()) - -typedef struct { - unsigned long ti_module; - unsigned long ti_offset; -} tls_index; - -#define round(size, align) \ - (((size) + (align) - 1) & ~((align) - 1)) -#define calculate_first_tls_offset(size, align, offset) \ - TLS_TCB_SIZE -#define calculate_tls_offset(prev_offset, prev_size, size, align, offset) \ - round(prev_offset + prev_size, align) -#define calculate_tls_post_size(align) 0 - -extern void *__tls_get_addr(tls_index *ti); - -#define RTLD_DEFAULT_STACK_PF_EXEC PF_X -#define RTLD_DEFAULT_STACK_EXEC PROT_EXEC - -#define md_abi_variant_hook(x) - -#endif diff --git a/libexec/rtld-elf/mips/rtld_start.S b/libexec/rtld-elf/mips/rtld_start.S deleted file mode 100644 index 56ac76bd4dd..00000000000 --- a/libexec/rtld-elf/mips/rtld_start.S +++ /dev/null @@ -1,287 +0,0 @@ -/* $NetBSD: rtld_start.S,v 1.10 2009/12/14 00:41:19 matt Exp $ */ - -/* - * Copyright 1997 Michael L. Hitch - * Portions copyright 2002 Charles M. Hannum - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include - -#if defined(__clang__) || (defined(__GNUC__) && __GNUC__ > 4) - .cfi_sections .debug_frame -#endif - -.globl _C_LABEL(_rtld_relocate_nonplt_self) -.globl _C_LABEL(_rtld) - -#define PTR_SIZE (1< 1*PTR_SIZE(sp) for atexit */ - /* -> 2*PTR_SIZE(sp) for obj_main */ - move s0, a0 /* save stack pointer from a0 */ - move s3, a3 /* save ps_strings pointer */ - - PTR_LA a1, 1f - bal 1f - PTR_LA t0, _C_LABEL(_rtld_relocate_nonplt_self) -1: PTR_SUBU a1, ra, a1 /* relocbase */ - PTR_LA a0, _DYNAMIC - PTR_ADDU t9, a1, t0 - jalr t9 /* _rtld_relocate_nonplt_self(dynp, relocabase) */ - PTR_ADDU a0, a1, a0 /* &_DYNAMIC */ - - move a0, s0 /* sp */ - PTR_ADDU a1, sp, 2*PTR_SIZE /* &our atexit function */ - PTR_ADDU a2, sp, 3*PTR_SIZE /* obj_main entry */ - PTR_SUBU sp, 4*SZREG /* ABI requires to reserve memory for 4 regs */ - PTR_LA t9, _C_LABEL(_rtld) - jalr t9 /* v0 = _rtld(sp, cleanup, objp) */ - nop - PTR_ADDU sp, 4*SZREG - - PTR_L a1, 2*PTR_SIZE(sp) /* our atexit function */ - PTR_L a2, 3*PTR_SIZE(sp) /* obj_main entry */ - PTR_ADDU sp, 4*PTR_SIZE /* readjust stack */ - move a0, s0 /* stack pointer */ - move t9, v0 - PTR_SUBU sp, 4*SZREG /* ABI requires to reserve memory for 4 regs */ - move ra,t9 /* RA == PC signals backtrace routine to stop */ - j t9 /* _start(sp, cleanup, obj); */ - move a3, s3 /* restore ps_strings */ -END(rtld_start) - -#define XCALLFRAME_SIZ (12*SZREG) -#define XCALLFRAME_RA (10*SZREG) -#define XCALLFRAME_GP (9*SZREG) -#define XCALLFRAME_S0 (8*SZREG) -#define XCALLFRAME_A3 (7*SZREG) -#define XCALLFRAME_A2 (6*SZREG) -#define XCALLFRAME_A1 (5*SZREG) -#define XCALLFRAME_A0 (4*SZREG) -#if defined(__mips_n32) || defined(__mips_n64) -#define XCALLFRAME_A7 (3*SZREG) -#define XCALLFRAME_A6 (2*SZREG) -#define XCALLFRAME_A5 (1*SZREG) -#define XCALLFRAME_A4 (0*SZREG) -#endif - -/* - * Trampoline for "old" PLT stubs which use .got entries. - */ - .globl _rtld_bind_start - .ent _rtld_bind_start -_rtld_bind_start: - .frame sp, XCALLFRAME_SIZ, $15 - .cfi_startproc simple - .cfi_def_cfa sp, 0 - .cfi_register ra, $15 - move v1, gp /* save old GP */ -#if defined(__mips_o32) || defined(__mips_o64) - PTR_ADDU t9, 8 /* modify T9 to point at .cpload */ -#endif - SETUP_GP - PTR_SUBU sp, XCALLFRAME_SIZ /* save arguments and sp value in stack */ - .cfi_def_cfa_offset XCALLFRAME_SIZ - SETUP_GP64(XCALLFRAME_GP, _rtld_bind_start) - SAVE_GP(XCALLFRAME_GP) -#if defined(__mips_n32) || defined(__mips_n64) - REG_S a4, XCALLFRAME_A4(sp) - .cfi_rel_offset a4, XCALLFRAME_A4 - REG_S a5, XCALLFRAME_A5(sp) - .cfi_rel_offset a5, XCALLFRAME_A5 - REG_S a6, XCALLFRAME_A6(sp) - .cfi_rel_offset a6, XCALLFRAME_A6 - REG_S a7, XCALLFRAME_A7(sp) - .cfi_rel_offset a7, XCALLFRAME_A7 -#endif - REG_S a0, XCALLFRAME_A0(sp) - .cfi_rel_offset a0, XCALLFRAME_A0 - REG_S a1, XCALLFRAME_A1(sp) - .cfi_rel_offset a1, XCALLFRAME_A1 - REG_S a2, XCALLFRAME_A2(sp) - .cfi_rel_offset a2, XCALLFRAME_A2 - REG_S a3, XCALLFRAME_A3(sp) - .cfi_rel_offset a3, XCALLFRAME_A3 - REG_S $15, XCALLFRAME_RA(sp) /* ra is in t7/t3 */ - .cfi_rel_offset ra, XCALLFRAME_RA - REG_S s0, XCALLFRAME_S0(sp) - .cfi_rel_offset s0, XCALLFRAME_S0 - move s0, sp - - move a0, v1 /* old GP */ - PTR_SUBU a0, a0, 0x7ff0 /* The offset of $gp from the */ - /* beginning of the .got section: */ - /* $gp = .got + 0x7ff0, so */ - /* .got = $gp - 0x7ff0 */ - /* Simple math as you can see. */ -#if defined(__mips_n64) - ld a0, 8(a0) /* object = pltgot[1] */ - and a0, a0, 0x7fffffffffffffff -#else - lw a0, 4(a0) /* object = pltgot[1] & 0x7fffffff */ - and a0, a0, 0x7fffffff -#endif - move a1, t8 /* symbol index */ - - PTR_LA t9, _C_LABEL(_mips_rtld_bind) - jalr t9 - nop - - move sp, s0 - REG_L ra, XCALLFRAME_RA(sp) - .cfi_restore ra - REG_L s0, XCALLFRAME_S0(sp) - .cfi_restore s0 - REG_L a0, XCALLFRAME_A0(sp) - .cfi_restore a0 - REG_L a1, XCALLFRAME_A1(sp) - .cfi_restore a1 - REG_L a2, XCALLFRAME_A2(sp) - .cfi_restore a2 - REG_L a3, XCALLFRAME_A3(sp) - .cfi_restore a3 -#if defined(__mips_n32) || defined(__mips_n64) - REG_L a4, XCALLFRAME_A4(sp) - .cfi_restore a4 - REG_L a5, XCALLFRAME_A5(sp) - .cfi_restore a5 - REG_L a6, XCALLFRAME_A6(sp) - .cfi_restore a6 - REG_L a7, XCALLFRAME_A7(sp) - .cfi_restore a7 -#endif - RESTORE_GP64 - PTR_ADDU sp, XCALLFRAME_SIZ - move t9, v0 - jr t9 - nop - .cfi_endproc -END(_rtld_bind_start) - - -/* - * Trampoline for PLT stubs using .pltrel entries and .got.plt. - */ - .globl _rtld_pltbind_start - .ent _rtld_pltbind_start -_rtld_pltbind_start: - .frame sp, XCALLFRAME_SIZ, $15 - .cfi_startproc simple - .cfi_def_cfa sp, 0 - .cfi_register ra, $15 -#if defined(__mips_o32) - move v1, gp /* save pointer to .got.plt */ -#else - move v1, t2 /* save pointer to .got.plt */ -#endif -#if defined(__mips_o32) || defined(__mips_o64) - PTR_ADDU t9, 8 /* modify T9 to point at .cpload */ -#endif - SETUP_GP - PTR_SUBU sp, XCALLFRAME_SIZ /* save arguments and sp value in stack */ - .cfi_def_cfa_offset XCALLFRAME_SIZ - SETUP_GP64(XCALLFRAME_GP, _rtld_pltbind_start) - SAVE_GP(XCALLFRAME_GP) -#if defined(__mips_n32) || defined(__mips_n64) - REG_S a4, XCALLFRAME_A4(sp) - .cfi_rel_offset a4, XCALLFRAME_A4 - REG_S a5, XCALLFRAME_A5(sp) - .cfi_rel_offset a5, XCALLFRAME_A5 - REG_S a6, XCALLFRAME_A6(sp) - .cfi_rel_offset a6, XCALLFRAME_A6 - REG_S a7, XCALLFRAME_A7(sp) - .cfi_rel_offset a7, XCALLFRAME_A7 -#endif - REG_S a0, XCALLFRAME_A0(sp) - .cfi_rel_offset a0, XCALLFRAME_A0 - REG_S a1, XCALLFRAME_A1(sp) - .cfi_rel_offset a1, XCALLFRAME_A1 - REG_S a2, XCALLFRAME_A2(sp) - .cfi_rel_offset a2, XCALLFRAME_A2 - REG_S a3, XCALLFRAME_A3(sp) - .cfi_rel_offset a3, XCALLFRAME_A3 - REG_S $15, XCALLFRAME_RA(sp) /* ra is in t7/t3 */ - .cfi_rel_offset ra, XCALLFRAME_RA - REG_S s0, XCALLFRAME_S0(sp) - .cfi_rel_offset s0, XCALLFRAME_S0 - move s0, sp - - move a0, v1 /* .got.plt */ -#if defined(__mips_n64) - ld a0, 8(a0) /* object = .got.plt[1] */ - sll a1, t8, 4 /* PLT entry index to .rel.plt offset */ -#else - lw a0, 4(a0) /* object = .got.plt[1] */ - sll a1, t8, 3 /* PLT entry index to .rel.plt offset */ -#endif - - PTR_LA t9, _C_LABEL(_rtld_bind) - jalr t9 - nop - - move sp, s0 - REG_L ra, XCALLFRAME_RA(sp) - .cfi_restore ra - REG_L s0, XCALLFRAME_S0(sp) - .cfi_restore s0 - REG_L a0, XCALLFRAME_A0(sp) - .cfi_restore a0 - REG_L a1, XCALLFRAME_A1(sp) - .cfi_restore a1 - REG_L a2, XCALLFRAME_A2(sp) - .cfi_restore a2 - REG_L a3, XCALLFRAME_A3(sp) - .cfi_restore a3 -#if defined(__mips_n32) || defined(__mips_n64) - REG_L a4, XCALLFRAME_A4(sp) - .cfi_restore a4 - REG_L a5, XCALLFRAME_A5(sp) - .cfi_restore a5 - REG_L a6, XCALLFRAME_A6(sp) - .cfi_restore a6 - REG_L a7, XCALLFRAME_A7(sp) - .cfi_restore a7 -#endif - RESTORE_GP64 - PTR_ADDU sp, XCALLFRAME_SIZ - move t9, v0 - jr t9 - nop - .cfi_endproc -END(_rtld_pltbind_start) diff --git a/libexec/rtld-elf/powerpc/Makefile.inc b/libexec/rtld-elf/powerpc/Makefile.inc deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/libexec/rtld-elf/powerpc/reloc.c b/libexec/rtld-elf/powerpc/reloc.c deleted file mode 100644 index 859991cbe27..00000000000 --- a/libexec/rtld-elf/powerpc/reloc.c +++ /dev/null @@ -1,836 +0,0 @@ -/* $NetBSD: ppc_reloc.c,v 1.10 2001/09/10 06:09:41 mycroft Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 1998 Tsubai Masanari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "debug.h" -#include "rtld.h" - -#define _ppc_ha(x) ((((u_int32_t)(x) & 0x8000) ? \ - ((u_int32_t)(x) + 0x10000) : (u_int32_t)(x)) >> 16) -#define _ppc_la(x) ((u_int32_t)(x) & 0xffff) - -#define min(a,b) (((a) < (b)) ? (a) : (b)) -#define max(a,b) (((a) > (b)) ? (a) : (b)) - -#define PLT_EXTENDED_BEGIN (1 << 13) -#define JMPTAB_BASE(N) (18 + N*2 + ((N > PLT_EXTENDED_BEGIN) ? \ - (N - PLT_EXTENDED_BEGIN)*2 : 0)) - -void _rtld_bind_secureplt_start(void); - -/* - * Process the R_PPC_COPY relocations - */ -int -do_copy_relocations(Obj_Entry *dstobj) -{ - const Elf_Rela *relalim; - const Elf_Rela *rela; - - /* - * COPY relocs are invalid outside of the main program - */ - assert(dstobj->mainprog); - - relalim = (const Elf_Rela *)((const char *) dstobj->rela + - dstobj->relasize); - for (rela = dstobj->rela; rela < relalim; rela++) { - void *dstaddr; - const Elf_Sym *dstsym; - const char *name; - size_t size; - const void *srcaddr; - const Elf_Sym *srcsym = NULL; - const Obj_Entry *srcobj, *defobj; - SymLook req; - int res; - - if (ELF_R_TYPE(rela->r_info) != R_PPC_COPY) { - continue; - } - - dstaddr = (void *)(dstobj->relocbase + rela->r_offset); - dstsym = dstobj->symtab + ELF_R_SYM(rela->r_info); - name = dstobj->strtab + dstsym->st_name; - size = dstsym->st_size; - symlook_init(&req, name); - req.ventry = fetch_ventry(dstobj, ELF_R_SYM(rela->r_info)); - req.flags = SYMLOOK_EARLY; - - for (srcobj = globallist_next(dstobj); srcobj != NULL; - srcobj = globallist_next(srcobj)) { - res = symlook_obj(&req, srcobj); - if (res == 0) { - srcsym = req.sym_out; - defobj = req.defobj_out; - break; - } - } - - if (srcobj == NULL) { - _rtld_error("Undefined symbol \"%s\" " - " referenced from COPY" - " relocation in %s", name, dstobj->path); - return (-1); - } - - srcaddr = (const void *)(defobj->relocbase+srcsym->st_value); - memcpy(dstaddr, srcaddr, size); - dbg("copy_reloc: src=%p,dst=%p,size=%d\n",srcaddr,dstaddr,size); - } - - return (0); -} - - -/* - * Perform early relocation of the run-time linker image - */ -void -reloc_non_plt_self(Elf_Dyn *dynp, Elf_Addr relocbase) -{ - const Elf_Rela *rela = NULL, *relalim; - Elf_Addr relasz = 0; - Elf_Addr *where; - - /* - * Extract the rela/relasz values from the dynamic section - */ - for (; dynp->d_tag != DT_NULL; dynp++) { - switch (dynp->d_tag) { - case DT_RELA: - rela = (const Elf_Rela *)(relocbase+dynp->d_un.d_ptr); - break; - case DT_RELASZ: - relasz = dynp->d_un.d_val; - break; - } - } - - /* - * Relocate these values - */ - relalim = (const Elf_Rela *)((const char *)rela + relasz); - for (; rela < relalim; rela++) { - where = (Elf_Addr *)(relocbase + rela->r_offset); - *where = (Elf_Addr)(relocbase + rela->r_addend); - } -} - - -/* - * Relocate a non-PLT object with addend. - */ -static int -reloc_nonplt_object(Obj_Entry *obj_rtld __unused, Obj_Entry *obj, - const Elf_Rela *rela, SymCache *cache, int flags, RtldLockState *lockstate) -{ - const Elf_Sym *def = NULL; - const Obj_Entry *defobj; - Elf_Addr *where, symval = 0; - - /* - * First, resolve symbol for relocations which - * reference symbols. - */ - switch (ELF_R_TYPE(rela->r_info)) { - - case R_PPC_UADDR32: /* word32 S + A */ - case R_PPC_ADDR32: - case R_PPC_GLOB_DAT: /* word32 S + A */ - case R_PPC_DTPMOD32: - case R_PPC_TPREL32: - case R_PPC_DTPREL32: - def = find_symdef(ELF_R_SYM(rela->r_info), obj, &defobj, - flags, cache, lockstate); - if (def == NULL) { - return (-1); - } - - /* - * If symbol is IFUNC, only perform relocation - * when caller allowed it by passing - * SYMLOOK_IFUNC flag. Skip the relocations - * otherwise. - * - * Also error out in case IFUNC relocations - * are specified for TLS, which cannot be - * usefully interpreted. - */ - if (ELF_ST_TYPE(def->st_info) == STT_GNU_IFUNC) { - switch (ELF_R_TYPE(rela->r_info)) { - case R_PPC_UADDR32: - case R_PPC_ADDR32: - case R_PPC_GLOB_DAT: - if ((flags & SYMLOOK_IFUNC) == 0) { - dbg("Non-PLT reference to IFUNC found!"); - obj->non_plt_gnu_ifunc = true; - return (0); - } - symval = (Elf_Addr)rtld_resolve_ifunc( - defobj, def); - break; - default: - _rtld_error("%s: IFUNC for TLS reloc", - obj->path); - return (-1); - } - } else { - if ((flags & SYMLOOK_IFUNC) != 0) - return (0); - symval = (Elf_Addr)defobj->relocbase + - def->st_value; - } - break; - default: - if ((flags & SYMLOOK_IFUNC) != 0) - return (0); - } - where = (Elf_Addr *)(obj->relocbase + rela->r_offset); - - switch (ELF_R_TYPE(rela->r_info)) { - case R_PPC_NONE: - break; - case R_PPC_UADDR32: - case R_PPC_ADDR32: - case R_PPC_GLOB_DAT: - /* Don't issue write if unnecessary; avoid COW page fault */ - if (*where != symval + rela->r_addend) { - *where = symval + rela->r_addend; - } - break; - case R_PPC_DTPMOD32: - *where = (Elf_Addr) defobj->tlsindex; - break; - case R_PPC_TPREL32: - /* - * We lazily allocate offsets for static TLS as we - * see the first relocation that references the - * TLS block. This allows us to support (small - * amounts of) static TLS in dynamically loaded - * modules. If we run out of space, we generate an - * error. - */ - if (!defobj->tls_static) { - if (!allocate_tls_offset( - __DECONST(Obj_Entry *, defobj))) { - _rtld_error("%s: No space available for static " - "Thread Local Storage", obj->path); - return (-1); - } - } - - *(Elf_Addr **)where = *where * sizeof(Elf_Addr) - + (Elf_Addr *)(def->st_value + rela->r_addend - + defobj->tlsoffset - TLS_TP_OFFSET - TLS_TCB_SIZE); - break; - case R_PPC_DTPREL32: - *where += (Elf_Addr)(def->st_value + rela->r_addend - - TLS_DTV_OFFSET); - break; - case R_PPC_RELATIVE: /* word32 B + A */ - symval = (Elf_Addr)(obj->relocbase + rela->r_addend); - - /* As above, don't issue write unnecessarily */ - if (*where != symval) { - *where = symval; - } - break; - case R_PPC_COPY: - /* - * These are deferred until all other relocations - * have been done. All we do here is make sure - * that the COPY relocation is not in a shared - * library. They are allowed only in executable - * files. - */ - if (!obj->mainprog) { - _rtld_error("%s: Unexpected R_COPY " - " relocation in shared library", - obj->path); - return (-1); - } - break; - case R_PPC_IRELATIVE: - /* - * These will be handled by reloc_iresolve(). - */ - obj->irelative = true; - break; - case R_PPC_JMP_SLOT: - /* - * These will be handled by the plt/jmpslot routines - */ - break; - - default: - _rtld_error("%s: Unsupported relocation type %d" - " in non-PLT relocations\n", obj->path, - ELF_R_TYPE(rela->r_info)); - return (-1); - } - return (0); -} - - -/* - * Process non-PLT relocations - */ -int -reloc_non_plt(Obj_Entry *obj, Obj_Entry *obj_rtld, int flags, - RtldLockState *lockstate) -{ - const Elf_Rela *relalim; - const Elf_Rela *rela; - const Elf_Phdr *phdr; - SymCache *cache; - int r = -1; - - /* - * The dynamic loader may be called from a thread, we have - * limited amounts of stack available so we cannot use alloca(). - */ - if (obj != obj_rtld) { - cache = calloc(obj->dynsymcount, sizeof(SymCache)); - /* No need to check for NULL here */ - } else - cache = NULL; - - /* - * From the SVR4 PPC ABI: - * "The PowerPC family uses only the Elf32_Rela relocation - * entries with explicit addends." - */ - relalim = (const Elf_Rela *)((const char *)obj->rela + obj->relasize); - for (rela = obj->rela; rela < relalim; rela++) { - if (reloc_nonplt_object(obj_rtld, obj, rela, cache, flags, - lockstate) < 0) - goto done; - } - r = 0; -done: - if (cache != NULL) - free(cache); - - /* - * Synchronize icache for executable segments in case we made - * any changes. - */ - for (phdr = obj->phdr; - (const char *)phdr < (const char *)obj->phdr + obj->phsize; - phdr++) { - if (phdr->p_type == PT_LOAD && (phdr->p_flags & PF_X) != 0) { - __syncicache(obj->relocbase + phdr->p_vaddr, - phdr->p_memsz); - } - } - - return (r); -} - -/* - * Initialise a PLT slot to the resolving trampoline - */ -static int -reloc_plt_object(Obj_Entry *obj, const Elf_Rela *rela) -{ - Elf_Word *where = (Elf_Word *)(obj->relocbase + rela->r_offset); - Elf_Addr *pltresolve, *pltlongresolve, *jmptab; - Elf_Addr distance; - int N = obj->pltrelasize / sizeof(Elf_Rela); - int reloff; - - reloff = rela - obj->pltrela; - - if (reloff < 0) - return (-1); - - if (obj->gotptr != NULL) { - *where += (Elf_Addr)obj->relocbase; - return (0); - } - - pltlongresolve = obj->pltgot + 5; - pltresolve = pltlongresolve + 5; - - distance = (Elf_Addr)pltresolve - (Elf_Addr)(where + 1); - - dbg(" reloc_plt_object: where=%p,pltres=%p,reloff=%x,distance=%x", - (void *)where, (void *)pltresolve, reloff, distance); - - if (reloff < PLT_EXTENDED_BEGIN) { - /* li r11,reloff */ - /* b pltresolve */ - where[0] = 0x39600000 | reloff; - where[1] = 0x48000000 | (distance & 0x03fffffc); - } else { - jmptab = obj->pltgot + JMPTAB_BASE(N); - jmptab[reloff] = (u_int)pltlongresolve; - - /* lis r11,jmptab[reloff]@ha */ - /* lwzu r12,jmptab[reloff]@l(r11) */ - /* mtctr r12 */ - /* bctr */ - where[0] = 0x3d600000 | _ppc_ha(&jmptab[reloff]); - where[1] = 0x858b0000 | _ppc_la(&jmptab[reloff]); - where[2] = 0x7d8903a6; - where[3] = 0x4e800420; - } - - - /* - * The icache will be sync'd in reloc_plt, which is called - * after all the slots have been updated - */ - - return (0); -} - -/* - * Process the PLT relocations. - */ -int -reloc_plt(Obj_Entry *obj, int flags __unused, RtldLockState *lockstate __unused) -{ - const Elf_Rela *relalim; - const Elf_Rela *rela; - int N = obj->pltrelasize / sizeof(Elf_Rela); - - if (obj->pltrelasize != 0) { - - relalim = (const Elf_Rela *)((const char *)obj->pltrela + - obj->pltrelasize); - for (rela = obj->pltrela; rela < relalim; rela++) { - if (ELF_R_TYPE(rela->r_info) == R_PPC_IRELATIVE) { - dbg("ABI violation - found IRELATIVE in the PLT."); - obj->irelative = true; - continue; - } - - /* - * PowerPC(64) .rela.plt is composed of an array of - * R_PPC_JMP_SLOT relocations. Unlike other platforms, - * this is the ONLY relocation type that is valid here. - */ - assert(ELF_R_TYPE(rela->r_info) == R_PPC_JMP_SLOT); - - if (reloc_plt_object(obj, rela) < 0) { - return (-1); - } - } - } - - /* - * Sync the icache for the byte range represented by the - * trampoline routines and call slots. - */ - if (obj->pltgot != NULL && obj->gotptr == NULL) - __syncicache(obj->pltgot, JMPTAB_BASE(N)*4); - - return (0); -} - -/* - * LD_BIND_NOW was set - force relocation for all jump slots - */ -int -reloc_jmpslots(Obj_Entry *obj, int flags, RtldLockState *lockstate) -{ - const Obj_Entry *defobj; - const Elf_Rela *relalim; - const Elf_Rela *rela; - const Elf_Sym *def; - Elf_Addr *where; - Elf_Addr target; - - relalim = (const Elf_Rela *)((const char *)obj->pltrela + - obj->pltrelasize); - for (rela = obj->pltrela; rela < relalim; rela++) { - /* This isn't actually a jump slot, ignore it. */ - if (ELF_R_TYPE(rela->r_info) == R_PPC_IRELATIVE) - continue; - assert(ELF_R_TYPE(rela->r_info) == R_PPC_JMP_SLOT); - where = (Elf_Addr *)(obj->relocbase + rela->r_offset); - def = find_symdef(ELF_R_SYM(rela->r_info), obj, &defobj, - SYMLOOK_IN_PLT | flags, NULL, lockstate); - if (def == NULL) { - dbg("reloc_jmpslots: sym not found"); - return (-1); - } - - target = (Elf_Addr)(defobj->relocbase + def->st_value); - - if (def == &sym_zero) { - /* Zero undefined weak symbols */ - *where = 0; - } else { - if (ELF_ST_TYPE(def->st_info) == STT_GNU_IFUNC) { - /* LD_BIND_NOW, ifunc in shared lib.*/ - obj->gnu_ifunc = true; - continue; - } - reloc_jmpslot(where, target, defobj, obj, - (const Elf_Rel *) rela); - } - } - - obj->jmpslots_done = true; - - return (0); -} - - -/* - * Update the value of a PLT jump slot. - */ -Elf_Addr -reloc_jmpslot(Elf_Addr *wherep, Elf_Addr target, - const Obj_Entry *defobj __unused, const Obj_Entry *obj, const Elf_Rel *rel) -{ - Elf_Addr offset; - const Elf_Rela *rela = (const Elf_Rela *) rel; - - dbg(" reloc_jmpslot: where=%p, target=%p", - (void *)wherep, (void *)target); - - if (ld_bind_not) - goto out; - - - /* - * Process Secure-PLT. - */ - if (obj->gotptr != NULL) { - assert(wherep >= (Elf_Word *)obj->pltgot); - assert(wherep < - (Elf_Word *)obj->pltgot + obj->pltrelasize); - if (*wherep != target) - *wherep = target; - goto out; - } - - /* - * BSS-PLT optimization: - * Branch directly to the target if it is within +/- 32Mb, - * otherwise go indirectly via the pltcall trampoline call and - * jump table. - */ - offset = target - (Elf_Addr)wherep; - if (abs((int)offset) < 32*1024*1024) { /* inside 32MB? */ - /* - * At the PLT entry pointed at by `wherep', construct - * a direct transfer to the now fully resolved function - * address. - */ - /* b value # branch directly */ - *wherep = 0x48000000 | (offset & 0x03fffffc); - __syncicache(wherep, 4); - } else { - Elf_Addr *pltcall, *jmptab; - int distance; - int N = obj->pltrelasize / sizeof(Elf_Rela); - int reloff = rela - obj->pltrela; - - if (reloff < 0) - return (-1); - - pltcall = obj->pltgot; - - dbg(" reloc_jmpslot: indir, reloff=%x, N=%x\n", - reloff, N); - - jmptab = obj->pltgot + JMPTAB_BASE(N); - jmptab[reloff] = target; - mb(); /* Order jmptab update before next changes */ - - if (reloff < PLT_EXTENDED_BEGIN) { - /* for extended PLT entries, we keep the old code */ - - distance = (Elf_Addr)pltcall - (Elf_Addr)(wherep + 1); - - /* li r11,reloff */ - /* b pltcall # use indirect pltcall routine */ - - /* first instruction same as before */ - wherep[1] = 0x48000000 | (distance & 0x03fffffc); - __syncicache(wherep, 8); - } - } - -out: - return (target); -} - -int -reloc_iresolve(Obj_Entry *obj, - struct Struct_RtldLockState *lockstate) -{ - /* - * Since PLT slots on PowerPC are always R_PPC_JMP_SLOT, - * R_PPC_IRELATIVE is in RELA. - */ - const Elf_Rela *relalim; - const Elf_Rela *rela; - Elf_Addr *where, target, *ptr; - - if (!obj->irelative) - return (0); - - relalim = (const Elf_Rela *)((const char *)obj->rela + obj->relasize); - for (rela = obj->rela; rela < relalim; rela++) { - if (ELF_R_TYPE(rela->r_info) == R_PPC_IRELATIVE) { - ptr = (Elf_Addr *)(obj->relocbase + rela->r_addend); - where = (Elf_Addr *)(obj->relocbase + rela->r_offset); - - lock_release(rtld_bind_lock, lockstate); - target = call_ifunc_resolver(ptr); - wlock_acquire(rtld_bind_lock, lockstate); - - *where = target; - } - } - /* - * XXX Remove me when lld is fixed! - * LLD currently makes illegal relocations in the PLT. - */ - relalim = (const Elf_Rela *)((const char *)obj->pltrela + obj->pltrelasize); - for (rela = obj->pltrela; rela < relalim; rela++) { - if (ELF_R_TYPE(rela->r_info) == R_PPC_IRELATIVE) { - ptr = (Elf_Addr *)(obj->relocbase + rela->r_addend); - where = (Elf_Addr *)(obj->relocbase + rela->r_offset); - - lock_release(rtld_bind_lock, lockstate); - target = call_ifunc_resolver(ptr); - wlock_acquire(rtld_bind_lock, lockstate); - - *where = target; - } - } - - obj->irelative = false; - return (0); -} - -int -reloc_iresolve_nonplt(Obj_Entry *obj __unused, - struct Struct_RtldLockState *lockstate __unused) -{ - return (0); -} - -int -reloc_gnu_ifunc(Obj_Entry *obj __unused, int flags __unused, - struct Struct_RtldLockState *lockstate __unused) -{ - const Elf_Rela *relalim; - const Elf_Rela *rela; - Elf_Addr *where, target; - const Elf_Sym *def; - const Obj_Entry *defobj; - - if (!obj->gnu_ifunc) - return (0); - relalim = (const Elf_Rela *)((const char *)obj->pltrela + obj->pltrelasize); - for (rela = obj->pltrela; rela < relalim; rela++) { - if (ELF_R_TYPE(rela->r_info) == R_PPC_JMP_SLOT) { - where = (Elf_Addr *)(obj->relocbase + rela->r_offset); - def = find_symdef(ELF_R_SYM(rela->r_info), obj, &defobj, - SYMLOOK_IN_PLT | flags, NULL, lockstate); - if (def == NULL) - return (-1); - if (ELF_ST_TYPE(def->st_info) != STT_GNU_IFUNC) - continue; - lock_release(rtld_bind_lock, lockstate); - target = (Elf_Addr)rtld_resolve_ifunc(defobj, def); - wlock_acquire(rtld_bind_lock, lockstate); - reloc_jmpslot(where, target, defobj, obj, - (const Elf_Rel *)rela); - } - } - obj->gnu_ifunc = false; - return (0); -} - -/* - * Setup the plt glue routines. - */ -#define PLTCALL_SIZE 20 -#define PLTLONGRESOLVE_SIZE 20 -#define PLTRESOLVE_SIZE 24 - -void -init_pltgot(Obj_Entry *obj) -{ - Elf_Word *pltcall, *pltresolve, *pltlongresolve; - Elf_Word *jmptab; - int N = obj->pltrelasize / sizeof(Elf_Rela); - - pltcall = obj->pltgot; - - if (pltcall == NULL) { - return; - } - - /* Handle Secure-PLT first, if applicable. */ - if (obj->gotptr != NULL) { - obj->gotptr[1] = (Elf_Addr)_rtld_bind_secureplt_start; - obj->gotptr[2] = (Elf_Addr)obj; - dbg("obj %s secure-plt gotptr=%p start=%p obj=%p", - obj->path, obj->gotptr, - (void *)obj->gotptr[1], (void *)obj->gotptr[2]); - return; - } - - /* - * From the SVR4 PPC ABI: - * - * 'The first 18 words (72 bytes) of the PLT are reserved for - * use by the dynamic linker. - * ... - * 'If the executable or shared object requires N procedure - * linkage table entries, the link editor shall reserve 3*N - * words (12*N bytes) following the 18 reserved words. The - * first 2*N of these words are the procedure linkage table - * entries themselves. The static linker directs calls to bytes - * (72 + (i-1)*8), for i between 1 and N inclusive. The remaining - * N words (4*N bytes) are reserved for use by the dynamic linker.' - */ - - /* - * Copy the absolute-call assembler stub into the first part of - * the reserved PLT area. - */ - memcpy(pltcall, _rtld_powerpc_pltcall, PLTCALL_SIZE); - - /* - * Determine the address of the jumptable, which is the dyn-linker - * reserved area after the call cells. Write the absolute address - * of the jumptable into the absolute-call assembler code so it - * can determine this address. - */ - jmptab = obj->pltgot + JMPTAB_BASE(N); - pltcall[1] |= _ppc_ha(jmptab); /* addis 11,11,jmptab@ha */ - pltcall[2] |= _ppc_la(jmptab); /* lwz 11,jmptab@l(11) */ - - /* - * Skip down 20 bytes into the initial reserved area and copy - * in the standard resolving assembler call. Into this assembler, - * insert the absolute address of the _rtld_bind_start routine - * and the address of the relocation object. - * - * We place pltlongresolve first, so it can fix up its arguments - * and then fall through to the regular PLT resolver. - */ - pltlongresolve = obj->pltgot + 5; - - memcpy(pltlongresolve, _rtld_powerpc_pltlongresolve, - PLTLONGRESOLVE_SIZE); - pltlongresolve[0] |= _ppc_ha(jmptab); /* lis 12,jmptab@ha */ - pltlongresolve[1] |= _ppc_la(jmptab); /* addi 12,12,jmptab@l */ - - pltresolve = pltlongresolve + PLTLONGRESOLVE_SIZE/sizeof(uint32_t); - memcpy(pltresolve, _rtld_powerpc_pltresolve, PLTRESOLVE_SIZE); - pltresolve[0] |= _ppc_ha(_rtld_bind_start); - pltresolve[1] |= _ppc_la(_rtld_bind_start); - pltresolve[3] |= _ppc_ha(obj); - pltresolve[4] |= _ppc_la(obj); - - /* - * The icache will be sync'd in reloc_plt, which is called - * after all the slots have been updated - */ -} - -/* - * 32 bit cpu feature flag fields. - */ -u_long cpu_features; -u_long cpu_features2; - -void -powerpc_abi_variant_hook(Elf_Auxinfo** aux_info) -{ - /* - * Since aux_info[] is easier to work with than aux, go ahead and - * initialize cpu_features / cpu_features2. - */ - cpu_features = -1UL; - cpu_features2 = -1UL; - if (aux_info[AT_HWCAP] != NULL) - cpu_features = aux_info[AT_HWCAP]->a_un.a_val; - if (aux_info[AT_HWCAP2] != NULL) - cpu_features2 = aux_info[AT_HWCAP2]->a_un.a_val; -} - -void -ifunc_init(Elf_Auxinfo *aux_info[__min_size(AT_COUNT)] __unused) -{ - -} - -void -allocate_initial_tls(Obj_Entry *list) -{ - - /* - * Fix the size of the static TLS block by using the maximum - * offset allocated so far and adding a bit for dynamic modules to - * use. - */ - - tls_static_space = tls_last_offset + tls_last_size + - ld_static_tls_extra; - - _tcb_set(allocate_tls(list, NULL, TLS_TCB_SIZE, TLS_TCB_ALIGN)); -} - -void* -__tls_get_addr(tls_index* ti) -{ - uintptr_t **dtvp; - char *p; - - dtvp = &_tcb_get()->tcb_dtv; - p = tls_get_addr_common(dtvp, ti->ti_module, ti->ti_offset); - - return (p + TLS_DTV_OFFSET); -} diff --git a/libexec/rtld-elf/powerpc/rtld_machdep.h b/libexec/rtld-elf/powerpc/rtld_machdep.h deleted file mode 100644 index 1601560437b..00000000000 --- a/libexec/rtld-elf/powerpc/rtld_machdep.h +++ /dev/null @@ -1,98 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1999, 2000 John D. Polstra. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef RTLD_MACHDEP_H -#define RTLD_MACHDEP_H 1 - -#include -#include -#include - -struct Struct_Obj_Entry; - -#define MD_OBJ_ENTRY - -/* Return the address of the .dynamic section in the dynamic linker. */ -#define rtld_dynamic(obj) (&_DYNAMIC) - -Elf_Addr reloc_jmpslot(Elf_Addr *where, Elf_Addr target, - const struct Struct_Obj_Entry *defobj, const struct Struct_Obj_Entry *obj, - const Elf_Rel *rel); -void reloc_non_plt_self(Elf_Dyn *dynp, Elf_Addr relocbase); - -#define make_function_pointer(def, defobj) \ - ((defobj)->relocbase + (def)->st_value) - -#define call_initfini_pointer(obj, target) \ - (((InitFunc)(target))()) - -#define call_init_pointer(obj, target) \ - (((InitArrFunc)(target))(main_argc, main_argv, environ)) - -extern u_long cpu_features; /* r3 */ -extern u_long cpu_features2; /* r4 */ -/* r5-10: ifunc resolver parameters reserved for future assignment. */ -#define call_ifunc_resolver(ptr) \ - (((Elf_Addr (*)(uint32_t, uint32_t, uint32_t, uint32_t, uint32_t, \ - uint32_t, uint32_t, uint32_t))ptr)((uint32_t)cpu_features, \ - (uint32_t)cpu_features2, 0, 0, 0, 0, 0, 0)) - -/* - * PLT functions. Not really correct prototypes, but the - * symbol values are needed. - */ -void _rtld_powerpc_pltlongresolve(void); -void _rtld_powerpc_pltresolve(void); -void _rtld_powerpc_pltcall(void); - -/* - * TLS - */ - -#define round(size, align) \ - (((size) + (align) - 1) & ~((align) - 1)) -#define calculate_first_tls_offset(size, align, offset) \ - TLS_TCB_SIZE -#define calculate_tls_offset(prev_offset, prev_size, size, align, offset) \ - round(prev_offset + prev_size, align) -#define calculate_tls_post_size(align) 0 - -typedef struct { - unsigned long ti_module; - unsigned long ti_offset; -} tls_index; - -extern void *__tls_get_addr(tls_index* ti); - -#define RTLD_DEFAULT_STACK_PF_EXEC PF_X -#define RTLD_DEFAULT_STACK_EXEC PROT_EXEC - -extern void powerpc_abi_variant_hook(Elf_Auxinfo **); -#define md_abi_variant_hook(x) powerpc_abi_variant_hook(x) - -#endif diff --git a/libexec/rtld-elf/powerpc/rtld_start.S b/libexec/rtld-elf/powerpc/rtld_start.S deleted file mode 100644 index e34cc56fc40..00000000000 --- a/libexec/rtld-elf/powerpc/rtld_start.S +++ /dev/null @@ -1,319 +0,0 @@ -/* $NetBSD: rtld_start.S,v 1.4 2001/09/26 04:06:43 mycroft Exp $ */ - -/*- - * Copyright (C) 1998 Tsubai Masanari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include /* For SPR_SPEFSCR if needed. */ - -.extern _GLOBAL_OFFSET_TABLE_ -.extern _DYNAMIC - -_ENTRY(.rtld_start) - stwu %r1,-48(%r1) /* 16-byte aligned stack for reg saves + - exit_proc & obj _rtld args + - backchain & lrsave stack frame */ - stw %r3,16(%r1) /* argc */ - stw %r4,20(%r1) /* argv */ - stw %r5,24(%r1) /* envp */ -/* stw %r6,28(%r1) *//* obj (always 0) */ -/* stw %r7,32(%r1) *//* cleanup (always 0) */ - stw %r8,36(%r1) /* ps_strings */ - - /* - * Perform initial relocation of ld-elf.so. Not as easy as it - * sounds. - * - perform small forward branch to put PC into link reg - * - use link-time constants to determine offset to the - * _DYNAMIC section and the GOT. Add these to the PC to - * convert to absolute addresses. - * - read GOT[0], which is the SVR4 ABI-specified link-time - * value of _DYNAMIC. Subtract this value from the absolute - * value to determine the load address - * - call reloc_non_plt_self() to fix up ld-elf.so's relocations - */ - bcl 20,31,1f -1: mflr %r30 - mr %r3,%r30 # save for _DYNAMIC - addis %r30,%r30,_GLOBAL_OFFSET_TABLE_-1b@ha - addi %r30,%r30,_GLOBAL_OFFSET_TABLE_-1b@l - addis %r3,%r3,_DYNAMIC-1b@ha # get _DYNAMIC actual address - addi %r3,%r3,_DYNAMIC-1b@l - lwz %r28,0(%r30) # get base-relative &_DYNAMIC - sub %r28,%r3,%r28 # r28 = relocbase - mr %r4,%r28 # r4 = relocbase - bl reloc_non_plt_self /* reloc_non_plt_self(&_DYNAMIC,base) */ - - /* - * The _rtld() function likes to see a stack layout containing - * { argc, argv[0], argv[1] ... argv[N], 0, env[0], ... , env[N] } - * Since the PowerPC stack was 16-byte aligned at exec time, the - * original stack layout has to be found by moving back a word - * from the argv pointer. - */ - lwz %r4,20(%r1) /* restore argv */ - addi %r3,%r4,-4 /* locate argc ptr, &argv[-1] */ - - addi %r4,%r1,8 /* &exit_proc on stack */ - addi %r5,%r1,12 /* &obj_main on stack */ - - bl _rtld /* &_start = _rtld(sp, &exit_proc, &obj_main)*/ - mtlr %r3 - - /* - * Restore args, with new obj/exit proc - */ - lwz %r3,16(%r1) /* argc */ - lwz %r4,20(%r1) /* argv */ - lwz %r5,24(%r1) /* envp */ - lwz %r6,12(%r1) /* obj */ - lwz %r7,8(%r1) /* exit proc */ - lwz %r8,36(%r1) /* ps_strings */ - addi %r1,%r1,48 /* restore original stackptr */ - - blrl /* _start(argc, argv, envp, obj, cleanup, ps_strings) */ - - li %r0,1 /* _exit() */ - sc -_END(.rtld_start) - -#ifdef __SPE__ -/* stack space for 30 GPRs + SPEFSCR/ACC/lr/cr */ -#define NREGS 31 -#define GPRWIDTH 8 -#define FUDGE 4 /* Fudge factor for alignment */ -#else -/* stack space for 30 GPRs + lr/cr */ -#define NREGS 30 -#define GPRWIDTH 4 -#define FUDGE 4 -#endif -/* Stack frame needs the 12-byte ABI frame plus fudge factor. */ -#define STACK_SIZE (NREGS * GPRWIDTH + 4 * 2 + 12 + FUDGE) - -/* - * _rtld_bind_secureplt_start() - * - * Call into the MI binder (Secure-PLT stub). - * secure-plt expects %r11 to be the offset to the rela entry. - * bss-plt expects %r11 to be index of the rela entry. - * So for bss-plt, we multiply the index by 12 to get the offset. - */ -_ENTRY(_rtld_bind_secureplt_start) - stwu %r1,-STACK_SIZE(%r1) -#ifdef __SPE__ - evstdd %r0,24(%r1) -#else - stw %r0,20(%r1) # save r0 -#endif - - /* - * Instead of division which is costly we will use multiplicative - * inverse. a / n = ((a * inv(n)) >> 32) - * where inv(n) = (0x100000000 + n - 1) / n - */ - mr %r0,%r11 - lis %r11,0x15555556@h # load multiplicative inverse of 12 - ori %r11,%r11,0x15555556@l - mulhwu %r11,%r11,%r0 # get high half of multiplication - b 1f -_END(_rtld_bind_secureplt_start) - -/* - * _rtld_bind_start() - * - * Call into the MI binder. This routine is reached via the PLT call cell, - * and then _rtld_powerpc_pltresolve(). - * On entry, %r11 contains the index of the PLT cell, and %r12 contains - * a pointer to the ELF object for the file. - * Save all registers, call into the binder to resolve and fixup the external - * routine, and then transfer to the external routine on return. - */ - .globl _rtld_bind - -_ENTRY(_rtld_bind_start) - stwu %r1,-STACK_SIZE(%r1) -#ifdef __SPE__ - evstdd %r0,24(%r1) -#else - stw %r0,20(%r1) # save r0 -#endif -1: - mflr %r0 - stw %r0,16(%r1) # save lr - mfcr %r0 - stw %r0,12(%r1) # save cr -#ifdef __SPE__ - evstdd %r3, 32(%r1) - evstdd %r4, 40(%r1) - evstdd %r5, 48(%r1) - evstdd %r6, 56(%r1) - evstdd %r7, 64(%r1) - evstdd %r8, 72(%r1) - evstdd %r9, 80(%r1) - evstdd %r10, 88(%r1) - evstdd %r11, 96(%r1) - evstdd %r12, 104(%r1) - evstdd %r13, 112(%r1) - evstdd %r14, 120(%r1) - evstdd %r15, 128(%r1) - evstdd %r16, 136(%r1) - evstdd %r17, 144(%r1) - evstdd %r18, 152(%r1) - evstdd %r19, 160(%r1) - evstdd %r20, 168(%r1) - evstdd %r21, 176(%r1) - evstdd %r22, 184(%r1) - evstdd %r23, 192(%r1) - evstdd %r24, 200(%r1) - evstdd %r25, 208(%r1) - evstdd %r26, 216(%r1) - evstdd %r27, 224(%r1) - evstdd %r28, 232(%r1) - evstdd %r29, 240(%r1) - evstdd %r30, 248(%r1) - li %r3, 256 - evstddx %r31, %r1, %r3 - evxor %r0, %r0, %r0 - li %r3, 264 - evmwumiaa %r0, %r0, %r0 - evstddx %r0, %r1, %r3 - mfspr %r3, SPR_SPEFSCR - stw %r3, 20(%r1) -#else - stmw %r3,24(%r1) # save r3-r31 -#endif - - mr %r3,%r12 # obj - mulli %r4,%r11,12 # rela index * sizeof(Elf_Rela) - bl _rtld_bind # target addr = _rtld_bind(obj, reloff) - mtctr %r3 # move absolute target addr into ctr - -#ifdef __SPE__ - lwz %r3, 20(%r1) - mtspr SPR_SPEFSCR, %r3 - li %r3, 264 - evlddx %r0, %r3, %r1 - evmra %r0, %r0 - evldd %r3, 32(%r1) - evldd %r4, 40(%r1) - evldd %r5, 48(%r1) - evldd %r6, 56(%r1) - evldd %r7, 64(%r1) - evldd %r8, 72(%r1) - evldd %r9, 80(%r1) - evldd %r10, 88(%r1) - evldd %r11, 96(%r1) - evldd %r12, 104(%r1) - evldd %r13, 112(%r1) - evldd %r14, 120(%r1) - evldd %r15, 128(%r1) - evldd %r16, 136(%r1) - evldd %r17, 144(%r1) - evldd %r18, 152(%r1) - evldd %r19, 160(%r1) - evldd %r20, 168(%r1) - evldd %r21, 176(%r1) - evldd %r22, 184(%r1) - evldd %r23, 192(%r1) - evldd %r24, 200(%r1) - evldd %r25, 208(%r1) - evldd %r26, 216(%r1) - evldd %r27, 224(%r1) - evldd %r28, 232(%r1) - evldd %r29, 240(%r1) - evldd %r30, 248(%r1) - li %r0, 256 - evlddx %r31, %r1, %r0 -#else - lmw %r3,24(%r1) # restore r3-r31 -#endif - lwz %r0,12(%r1) # restore cr - mtcr %r0 - lwz %r0,16(%r1) # restore lr - mtlr %r0 -#ifdef __SPE__ - evldd %r0,24(%r1) -#else - lwz %r0,20(%r1) # restore r0 -#endif - - addi %r1,%r1,STACK_SIZE # restore stack - bctr # jump to target -_END(_rtld_bind_start) - - -/* - * _rtld_powerpc_pltresolve() - * - * This routine is copied into the latter part of the 72-byte reserved - * area at the start of the PLT. The absolute address of the _rtld_bind_start - * routine, and the ELF object for the loaded file, are inserted into - * the code by the reloc.c:init_pltgot() routine. - * The first time an external routine is called, the PLT slot will - * set up %r11 to the offset of the slot, and will jump to this routine. - * The ELF object is shifted into %r11, and _rtld_bind_start is called - * to complete the binding. - */ -_ENTRY(_rtld_powerpc_pltlongresolve) - lis %r12,0 # lis 12,jmptab@ha - addi %r12,%r12,0 # addi 12,12,jmptab@l - subf %r11,%r12,%r11 # reloff - li %r12,2 - srw %r11,%r11,%r12 # index = reloff/sizeof(Elf_Addr) -_END(_rtld_powerpc_pltlongresolve) -_ENTRY(_rtld_powerpc_pltresolve) - lis %r12,0 # lis 12,_rtld_bind_start@ha - addi %r12,%r12,0 # addi 12,12,_rtld_bind_start@l - mtctr %r12 - lis %r12,0 # lis 12,obj@ha - addi %r12,%r12,0 # addi 12,12,obj@l - bctr -_END(_rtld_powerpc_pltresolve) - -/* - * _rtld_powerpc_pltcall() - * - * This routine is copied into the 72-byte reserved area at the - * start of the PLT. The reloc.c:init_pltgot() routine inserts - * the absolute address of the jumptable. - * Control is transferred to this routine when the binder has - * located the external routine, but determined that it is > 32Mb - * from the PLT slot. Code is inserted into the PLT slot to set up - * %r11 with the jumptable index, and jump to here, where the - * absolute address of the external routine is loaded from the - * jumptable and transferred to - */ -_ENTRY(_rtld_powerpc_pltcall) - slwi %r11,%r11,2 # jmptab offset = index * 4 - addis %r11,%r11,0 # addis 11,11,jmptab@ha - lwz %r11,0(%r11) # lwz 11,jmptab@l(11) - mtctr %r11 - bctr # (*jmptab[index])() -_END(_rtld_powerpc_pltcall) - - .section .note.GNU-stack,"",%progbits diff --git a/libexec/rtld-elf/powerpc64/Makefile.inc b/libexec/rtld-elf/powerpc64/Makefile.inc deleted file mode 100644 index 592bac9ef4d..00000000000 --- a/libexec/rtld-elf/powerpc64/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ - -RTLD_ENTRY= _rtld_start diff --git a/libexec/rtld-elf/powerpc64/reloc.c b/libexec/rtld-elf/powerpc64/reloc.c deleted file mode 100644 index 71b7a361f0d..00000000000 --- a/libexec/rtld-elf/powerpc64/reloc.c +++ /dev/null @@ -1,733 +0,0 @@ -/* $NetBSD: ppc_reloc.c,v 1.10 2001/09/10 06:09:41 mycroft Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 1998 Tsubai Masanari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include "debug.h" -#include "rtld.h" - -#if !defined(_CALL_ELF) || _CALL_ELF == 1 -struct funcdesc { - Elf_Addr addr; - Elf_Addr toc; - Elf_Addr env; -}; -#endif - -/* - * Process the R_PPC_COPY relocations - */ -int -do_copy_relocations(Obj_Entry *dstobj) -{ - const Elf_Rela *relalim; - const Elf_Rela *rela; - - /* - * COPY relocs are invalid outside of the main program - */ - assert(dstobj->mainprog); - - relalim = (const Elf_Rela *)((const char *) dstobj->rela + - dstobj->relasize); - for (rela = dstobj->rela; rela < relalim; rela++) { - void *dstaddr; - const Elf_Sym *dstsym; - const char *name; - size_t size; - const void *srcaddr; - const Elf_Sym *srcsym = NULL; - const Obj_Entry *srcobj, *defobj; - SymLook req; - int res; - - if (ELF_R_TYPE(rela->r_info) != R_PPC_COPY) { - continue; - } - - dstaddr = (void *)(dstobj->relocbase + rela->r_offset); - dstsym = dstobj->symtab + ELF_R_SYM(rela->r_info); - name = dstobj->strtab + dstsym->st_name; - size = dstsym->st_size; - symlook_init(&req, name); - req.ventry = fetch_ventry(dstobj, ELF_R_SYM(rela->r_info)); - req.flags = SYMLOOK_EARLY; - - for (srcobj = globallist_next(dstobj); srcobj != NULL; - srcobj = globallist_next(srcobj)) { - res = symlook_obj(&req, srcobj); - if (res == 0) { - srcsym = req.sym_out; - defobj = req.defobj_out; - break; - } - } - - if (srcobj == NULL) { - _rtld_error("Undefined symbol \"%s\" " - " referenced from COPY" - " relocation in %s", name, dstobj->path); - return (-1); - } - - srcaddr = (const void *)(defobj->relocbase+srcsym->st_value); - memcpy(dstaddr, srcaddr, size); - dbg("copy_reloc: src=%p,dst=%p,size=%zd\n",srcaddr,dstaddr,size); - } - - return (0); -} - - -/* - * Perform early relocation of the run-time linker image - */ -void -reloc_non_plt_self(Elf_Dyn *dynp, Elf_Addr relocbase) -{ - const Elf_Rela *rela = NULL, *relalim; - Elf_Addr relasz = 0; - Elf_Addr *where; - - /* - * Extract the rela/relasz values from the dynamic section - */ - for (; dynp->d_tag != DT_NULL; dynp++) { - switch (dynp->d_tag) { - case DT_RELA: - rela = (const Elf_Rela *)(relocbase+dynp->d_un.d_ptr); - break; - case DT_RELASZ: - relasz = dynp->d_un.d_val; - break; - } - } - - /* - * Relocate these values - */ - relalim = (const Elf_Rela *)((const char *)rela + relasz); - for (; rela < relalim; rela++) { - where = (Elf_Addr *)(relocbase + rela->r_offset); - *where = (Elf_Addr)(relocbase + rela->r_addend); - } -} - - -/* - * Relocate a non-PLT object with addend. - */ -static int -reloc_nonplt_object(Obj_Entry *obj_rtld __unused, Obj_Entry *obj, - const Elf_Rela *rela, SymCache *cache, int flags, RtldLockState *lockstate) -{ - const Elf_Sym *def = NULL; - const Obj_Entry *defobj; - Elf_Addr *where, symval = 0; - - /* - * First, resolve symbol for relocations which - * reference symbols. - */ - switch (ELF_R_TYPE(rela->r_info)) { - - case R_PPC64_UADDR64: /* doubleword64 S + A */ - case R_PPC64_ADDR64: - case R_PPC_GLOB_DAT: - case R_PPC64_DTPMOD64: - case R_PPC64_TPREL64: - case R_PPC64_DTPREL64: - def = find_symdef(ELF_R_SYM(rela->r_info), obj, &defobj, - flags, cache, lockstate); - if (def == NULL) { - return (-1); - } - /* - * If symbol is IFUNC, only perform relocation - * when caller allowed it by passing - * SYMLOOK_IFUNC flag. Skip the relocations - * otherwise. - * - * Also error out in case IFUNC relocations - * are specified for TLS, which cannot be - * usefully interpreted. - */ - if (ELF_ST_TYPE(def->st_info) == STT_GNU_IFUNC) { - switch (ELF_R_TYPE(rela->r_info)) { - case R_PPC64_UADDR64: - case R_PPC64_ADDR64: - case R_PPC_GLOB_DAT: - if ((flags & SYMLOOK_IFUNC) == 0) { - dbg("Non-PLT reference to IFUNC found!"); - obj->non_plt_gnu_ifunc = true; - return (0); - } - symval = (Elf_Addr)rtld_resolve_ifunc( - defobj, def); - break; - default: - _rtld_error("%s: IFUNC for TLS reloc", - obj->path); - return (-1); - } - } else { - if ((flags & SYMLOOK_IFUNC) != 0) - return (0); - symval = (Elf_Addr)defobj->relocbase + - def->st_value; - } - break; - default: - if ((flags & SYMLOOK_IFUNC) != 0) - return (0); - } - - where = (Elf_Addr *)(obj->relocbase + rela->r_offset); - - switch (ELF_R_TYPE(rela->r_info)) { - case R_PPC_NONE: - break; - case R_PPC64_UADDR64: - case R_PPC64_ADDR64: - case R_PPC_GLOB_DAT: - /* Don't issue write if unnecessary; avoid COW page fault */ - if (*where != symval + rela->r_addend) { - *where = symval + rela->r_addend; - } - break; - case R_PPC64_DTPMOD64: - *where = (Elf_Addr) defobj->tlsindex; - break; - case R_PPC64_TPREL64: - /* - * We lazily allocate offsets for static TLS as we - * see the first relocation that references the - * TLS block. This allows us to support (small - * amounts of) static TLS in dynamically loaded - * modules. If we run out of space, we generate an - * error. - */ - if (!defobj->tls_static) { - if (!allocate_tls_offset( - __DECONST(Obj_Entry *, defobj))) { - _rtld_error("%s: No space available for static " - "Thread Local Storage", obj->path); - return (-1); - } - } - - *(Elf_Addr **)where = *where * sizeof(Elf_Addr) - + (Elf_Addr *)(def->st_value + rela->r_addend - + defobj->tlsoffset - TLS_TP_OFFSET - TLS_TCB_SIZE); - break; - case R_PPC64_DTPREL64: - *where += (Elf_Addr)(def->st_value + rela->r_addend - - TLS_DTV_OFFSET); - break; - case R_PPC_RELATIVE: /* doubleword64 B + A */ - symval = (Elf_Addr)(obj->relocbase + rela->r_addend); - - /* As above, don't issue write unnecessarily */ - if (*where != symval) { - *where = symval; - } - break; - case R_PPC_COPY: - /* - * These are deferred until all other relocations - * have been done. All we do here is make sure - * that the COPY relocation is not in a shared - * library. They are allowed only in executable - * files. - */ - if (!obj->mainprog) { - _rtld_error("%s: Unexpected R_COPY " - " relocation in shared library", - obj->path); - return (-1); - } - break; - case R_PPC_IRELATIVE: - /* - * These will be handled by reloc_iresolve(). - */ - obj->irelative = true; - break; - case R_PPC_JMP_SLOT: - /* - * These will be handled by the plt/jmpslot routines - */ - break; - - default: - _rtld_error("%s: Unsupported relocation type %ld" - " in non-PLT relocations\n", obj->path, - ELF_R_TYPE(rela->r_info)); - return (-1); - } - return (0); -} - - -/* - * Process non-PLT relocations - */ -int -reloc_non_plt(Obj_Entry *obj, Obj_Entry *obj_rtld, int flags, - RtldLockState *lockstate) -{ - const Elf_Rela *relalim; - const Elf_Rela *rela; - const Elf_Phdr *phdr; - SymCache *cache; - int bytes = obj->dynsymcount * sizeof(SymCache); - int r = -1; - - /* - * The dynamic loader may be called from a thread, we have - * limited amounts of stack available so we cannot use alloca(). - */ - if (obj != obj_rtld) { - cache = mmap(NULL, bytes, PROT_READ|PROT_WRITE, MAP_ANON, - -1, 0); - if (cache == MAP_FAILED) - cache = NULL; - } else - cache = NULL; - - /* - * From the SVR4 PPC ABI: - * "The PowerPC family uses only the Elf32_Rela relocation - * entries with explicit addends." - */ - relalim = (const Elf_Rela *)((const char *)obj->rela + obj->relasize); - for (rela = obj->rela; rela < relalim; rela++) { - if (reloc_nonplt_object(obj_rtld, obj, rela, cache, flags, - lockstate) < 0) - goto done; - } - r = 0; -done: - if (cache) - munmap(cache, bytes); - - /* - * Synchronize icache for executable segments in case we made - * any changes. - */ - for (phdr = obj->phdr; - (const char *)phdr < (const char *)obj->phdr + obj->phsize; - phdr++) { - if (phdr->p_type == PT_LOAD && (phdr->p_flags & PF_X) != 0) { - __syncicache(obj->relocbase + phdr->p_vaddr, - phdr->p_memsz); - } - } - - return (r); -} - - -/* - * Initialise a PLT slot to the resolving trampoline - */ -static int -reloc_plt_object(Obj_Entry *obj, const Elf_Rela *rela) -{ - Elf_Addr *where = (Elf_Addr *)(obj->relocbase + rela->r_offset); - long reloff; - - reloff = rela - obj->pltrela; - - dbg(" reloc_plt_object: where=%p,reloff=%lx,glink=%#lx", (void *)where, - reloff, obj->glink); - -#if !defined(_CALL_ELF) || _CALL_ELF == 1 - /* Glink code is 3 instructions after the first 32k, 2 before */ - *where = (Elf_Addr)obj->glink + 32 + - 8*((reloff < 0x8000) ? reloff : 0x8000) + - 12*((reloff < 0x8000) ? 0 : (reloff - 0x8000)); -#else - /* 64-Bit ELF V2 ABI Specification, sec. 4.2.5.3. */ - *where = (Elf_Addr)obj->glink + 4*reloff + 32; -#endif - - return (0); -} - -/* - * Process the PLT relocations. - */ -int -reloc_plt(Obj_Entry *obj, int flags __unused, RtldLockState *lockstate __unused) -{ - const Elf_Rela *relalim; - const Elf_Rela *rela; - - if (obj->pltrelasize != 0) { - relalim = (const Elf_Rela *)((const char *)obj->pltrela + - obj->pltrelasize); - for (rela = obj->pltrela; rela < relalim; rela++) { - -#if defined(_CALL_ELF) && _CALL_ELF == 2 - if (ELF_R_TYPE(rela->r_info) == R_PPC_IRELATIVE) { - dbg("ABI violation - found IRELATIVE in the PLT."); - obj->irelative = true; - continue; - } -#endif - /* - * PowerPC(64) .rela.plt is composed of an array of - * R_PPC_JMP_SLOT relocations. Unlike other platforms, - * this is the ONLY relocation type that is valid here. - */ - assert(ELF_R_TYPE(rela->r_info) == R_PPC_JMP_SLOT); - - if (reloc_plt_object(obj, rela) < 0) { - return (-1); - } - } - } - - return (0); -} - -/* - * LD_BIND_NOW was set - force relocation for all jump slots - */ -int -reloc_jmpslots(Obj_Entry *obj, int flags, RtldLockState *lockstate) -{ - const Obj_Entry *defobj; - const Elf_Rela *relalim; - const Elf_Rela *rela; - const Elf_Sym *def; - Elf_Addr *where; - Elf_Addr target; - - relalim = (const Elf_Rela *)((const char *)obj->pltrela + - obj->pltrelasize); - for (rela = obj->pltrela; rela < relalim; rela++) { - /* This isn't actually a jump slot, ignore it. */ - if (ELF_R_TYPE(rela->r_info) == R_PPC_IRELATIVE) - continue; - assert(ELF_R_TYPE(rela->r_info) == R_PPC_JMP_SLOT); - where = (Elf_Addr *)(obj->relocbase + rela->r_offset); - def = find_symdef(ELF_R_SYM(rela->r_info), obj, &defobj, - SYMLOOK_IN_PLT | flags, NULL, lockstate); - if (def == NULL) { - dbg("reloc_jmpslots: sym not found"); - return (-1); - } - - target = (Elf_Addr)(defobj->relocbase + def->st_value); - - if (def == &sym_zero) { - /* Zero undefined weak symbols */ -#if !defined(_CALL_ELF) || _CALL_ELF == 1 - bzero(where, sizeof(struct funcdesc)); -#else - *where = 0; -#endif - } else { - if (ELF_ST_TYPE(def->st_info) == STT_GNU_IFUNC) { - /* LD_BIND_NOW, ifunc in shared lib.*/ - obj->gnu_ifunc = true; - continue; - } - reloc_jmpslot(where, target, defobj, obj, - (const Elf_Rel *) rela); - } - } - - obj->jmpslots_done = true; - - return (0); -} - - -/* - * Update the value of a PLT jump slot. - */ -Elf_Addr -reloc_jmpslot(Elf_Addr *wherep, Elf_Addr target, const Obj_Entry *defobj __unused, - const Obj_Entry *obj __unused, const Elf_Rel *rel __unused) -{ - - /* - * At the PLT entry pointed at by `wherep', construct - * a direct transfer to the now fully resolved function - * address. - */ - -#if !defined(_CALL_ELF) || _CALL_ELF == 1 - dbg(" reloc_jmpslot: where=%p, target=%p (%#lx + %#lx)", - (void *)wherep, (void *)target, *(Elf_Addr *)target, - (Elf_Addr)defobj->relocbase); - - if (ld_bind_not) - goto out; - - /* - * For the trampoline, the second two elements of the function - * descriptor are unused, so we are fine replacing those at any time - * with the real ones with no thread safety implications. However, we - * need to make sure the main entry point pointer ([0]) is seen to be - * modified *after* the second two elements. This can't be done in - * general, since there are no barriers in the reading code, but put in - * some isyncs to at least make it a little better. - */ - memcpy(wherep, (void *)target, sizeof(struct funcdesc)); - wherep[2] = ((Elf_Addr *)target)[2]; - wherep[1] = ((Elf_Addr *)target)[1]; - __asm __volatile ("isync" : : : "memory"); - wherep[0] = ((Elf_Addr *)target)[0]; - __asm __volatile ("isync" : : : "memory"); - - if (((struct funcdesc *)(wherep))->addr < (Elf_Addr)defobj->relocbase) { - /* - * It is possible (LD_BIND_NOW) that the function - * descriptor we are copying has not yet been relocated. - * If this happens, fix it. Don't worry about threading in - * this case since LD_BIND_NOW makes it irrelevant. - */ - - ((struct funcdesc *)(wherep))->addr += - (Elf_Addr)defobj->relocbase; - ((struct funcdesc *)(wherep))->toc += - (Elf_Addr)defobj->relocbase; - } -#else - dbg(" reloc_jmpslot: where=%p, target=%p", (void *)wherep, - (void *)target); - - assert(target >= (Elf_Addr)defobj->relocbase); - - if (ld_bind_not) - goto out; - - if (*wherep != target) - *wherep = target; - -#endif -out: - - return (target); -} - -int -reloc_iresolve(Obj_Entry *obj, - struct Struct_RtldLockState *lockstate) -{ - /* - * Since PLT slots on PowerPC64 are always R_PPC_JMP_SLOT, - * R_PPC_IRELATIVE is in RELA. - */ -#if !defined(_CALL_ELF) || _CALL_ELF == 1 - (void)(obj); - (void)(lockstate); - /* XXX not implemented */ - return (0); -#else - const Elf_Rela *relalim; - const Elf_Rela *rela; - Elf_Addr *where, target, *ptr; - - if (!obj->irelative) - return (0); - - relalim = (const Elf_Rela *)((const char *)obj->rela + obj->relasize); - for (rela = obj->rela; rela < relalim; rela++) { - if (ELF_R_TYPE(rela->r_info) == R_PPC_IRELATIVE) { - ptr = (Elf_Addr *)(obj->relocbase + rela->r_addend); - where = (Elf_Addr *)(obj->relocbase + rela->r_offset); - - lock_release(rtld_bind_lock, lockstate); - target = call_ifunc_resolver(ptr); - wlock_acquire(rtld_bind_lock, lockstate); - - *where = target; - } - } - /* - * XXX Remove me when lld is fixed! - * LLD currently makes illegal relocations in the PLT. - */ - relalim = (const Elf_Rela *)((const char *)obj->pltrela + obj->pltrelasize); - for (rela = obj->pltrela; rela < relalim; rela++) { - if (ELF_R_TYPE(rela->r_info) == R_PPC_IRELATIVE) { - ptr = (Elf_Addr *)(obj->relocbase + rela->r_addend); - where = (Elf_Addr *)(obj->relocbase + rela->r_offset); - - lock_release(rtld_bind_lock, lockstate); - target = call_ifunc_resolver(ptr); - wlock_acquire(rtld_bind_lock, lockstate); - - *where = target; - } - } - - obj->irelative = false; - return (0); -#endif -} - -int -reloc_gnu_ifunc(Obj_Entry *obj __unused, int flags __unused, - struct Struct_RtldLockState *lockstate __unused) -{ -#if !defined(_CALL_ELF) || _CALL_ELF == 1 - _rtld_error("reloc_gnu_ifunc(): Not implemented!"); - /* XXX not implemented */ - return (-1); -#else - - const Elf_Rela *relalim; - const Elf_Rela *rela; - Elf_Addr *where, target; - const Elf_Sym *def; - const Obj_Entry *defobj; - - if (!obj->gnu_ifunc) - return (0); - relalim = (const Elf_Rela *)((const char *)obj->pltrela + obj->pltrelasize); - for (rela = obj->pltrela; rela < relalim; rela++) { - if (ELF_R_TYPE(rela->r_info) == R_PPC_JMP_SLOT) { - where = (Elf_Addr *)(obj->relocbase + rela->r_offset); - def = find_symdef(ELF_R_SYM(rela->r_info), obj, &defobj, - SYMLOOK_IN_PLT | flags, NULL, lockstate); - if (def == NULL) - return (-1); - if (ELF_ST_TYPE(def->st_info) != STT_GNU_IFUNC) - continue; - lock_release(rtld_bind_lock, lockstate); - target = (Elf_Addr)rtld_resolve_ifunc(defobj, def); - wlock_acquire(rtld_bind_lock, lockstate); - reloc_jmpslot(where, target, defobj, obj, - (const Elf_Rel *)rela); - } - } - obj->gnu_ifunc = false; - return (0); -#endif -} - -int -reloc_iresolve_nonplt(Obj_Entry *obj __unused, - struct Struct_RtldLockState *lockstate __unused) -{ - return (0); -} - -void -init_pltgot(Obj_Entry *obj) -{ - Elf_Addr *pltcall; - - pltcall = obj->pltgot; - - if (pltcall == NULL) { - return; - } - -#if defined(_CALL_ELF) && _CALL_ELF == 2 - pltcall[0] = (Elf_Addr)&_rtld_bind_start; - pltcall[1] = (Elf_Addr)obj; -#else - memcpy(pltcall, _rtld_bind_start, sizeof(struct funcdesc)); - pltcall[2] = (Elf_Addr)obj; -#endif -} - -/* - * Actual values are 32 bit. - */ -u_long cpu_features; -u_long cpu_features2; - -void -powerpc64_abi_variant_hook(Elf_Auxinfo** aux_info) -{ - /* - * Since aux_info[] is easier to work with than aux, go ahead and - * initialize cpu_features / cpu_features2. - */ - cpu_features = -1UL; - cpu_features2 = -1UL; - if (aux_info[AT_HWCAP] != NULL) - cpu_features = (uint32_t)aux_info[AT_HWCAP]->a_un.a_val; - if (aux_info[AT_HWCAP2] != NULL) - cpu_features2 = (uint32_t)aux_info[AT_HWCAP2]->a_un.a_val; -} - -void -ifunc_init(Elf_Auxinfo *aux_info[__min_size(AT_COUNT)] __unused) -{ - -} - -void -allocate_initial_tls(Obj_Entry *list) -{ - - /* - * Fix the size of the static TLS block by using the maximum - * offset allocated so far and adding a bit for dynamic modules to - * use. - */ - - tls_static_space = tls_last_offset + tls_last_size + - ld_static_tls_extra; - - _tcb_set(allocate_tls(list, NULL, TLS_TCB_SIZE, TLS_TCB_ALIGN)); -} - -void* -__tls_get_addr(tls_index* ti) -{ - uintptr_t **dtvp; - char *p; - - dtvp = &_tcb_get()->tcb_dtv; - p = tls_get_addr_common(dtvp, ti->ti_module, ti->ti_offset); - - return (p + TLS_DTV_OFFSET); -} diff --git a/libexec/rtld-elf/powerpc64/rtld_machdep.h b/libexec/rtld-elf/powerpc64/rtld_machdep.h deleted file mode 100644 index ff4145b3fe9..00000000000 --- a/libexec/rtld-elf/powerpc64/rtld_machdep.h +++ /dev/null @@ -1,90 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1999, 2000 John D. Polstra. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef RTLD_MACHDEP_H -#define RTLD_MACHDEP_H 1 - -#include -#include -#include - -struct Struct_Obj_Entry; - -#define MD_OBJ_ENTRY - -/* Return the address of the .dynamic section in the dynamic linker. */ -#define rtld_dynamic(obj) (&_DYNAMIC) - -Elf_Addr reloc_jmpslot(Elf_Addr *where, Elf_Addr target, - const struct Struct_Obj_Entry *defobj, const struct Struct_Obj_Entry *obj, - const Elf_Rel *rel); -void reloc_non_plt_self(Elf_Dyn *dynp, Elf_Addr relocbase); - -#define make_function_pointer(def, defobj) \ - ((defobj)->relocbase + (def)->st_value) - -#define call_initfini_pointer(obj, target) \ - (((InitFunc)(target))()) - -#define call_init_pointer(obj, target) \ - (((InitArrFunc)(target))(main_argc, main_argv, environ)) - -extern u_long cpu_features; /* r3 */ -extern u_long cpu_features2; /* r4 */ -/* r5-r10: ifunc resolver parameters reserved for future assignment. */ -#define call_ifunc_resolver(ptr) \ - (((Elf_Addr (*)(uint32_t, uint32_t, uint64_t, uint64_t, uint64_t, \ - uint64_t, uint64_t, uint64_t))ptr)((uint32_t)cpu_features, \ - (uint32_t)cpu_features2, 0, 0, 0, 0, 0, 0)) - -/* - * TLS - */ - -#define round(size, align) \ - (((size) + (align) - 1) & ~((align) - 1)) -#define calculate_first_tls_offset(size, align, offset) \ - TLS_TCB_SIZE -#define calculate_tls_offset(prev_offset, prev_size, size, align, offset) \ - round(prev_offset + prev_size, align) -#define calculate_tls_post_size(align) 0 - -typedef struct { - unsigned long ti_module; - unsigned long ti_offset; -} tls_index; - -extern void *__tls_get_addr(tls_index* ti); - -#define RTLD_DEFAULT_STACK_PF_EXEC PF_X -#define RTLD_DEFAULT_STACK_EXEC PROT_EXEC - -extern void powerpc64_abi_variant_hook(Elf_Auxinfo **); -#define md_abi_variant_hook(x) powerpc64_abi_variant_hook(x) - -#endif diff --git a/libexec/rtld-elf/powerpc64/rtld_start.S b/libexec/rtld-elf/powerpc64/rtld_start.S deleted file mode 100644 index 796a41e3460..00000000000 --- a/libexec/rtld-elf/powerpc64/rtld_start.S +++ /dev/null @@ -1,179 +0,0 @@ -/* $NetBSD: rtld_start.S,v 1.4 2001/09/26 04:06:43 mycroft Exp $ */ - -/*- - * Copyright (C) 1998 Tsubai Masanari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include - -.extern _GLOBAL_OFFSET_TABLE_ -.extern _DYNAMIC - -_ENTRY(_rtld_start) - stdu %r1,-144(%r1) /* 16-byte aligned stack for reg saves + - exit_proc & obj _rtld args + - backchain & lrsave stack frame */ - - /* Save and restore only initial argv, because _rtld will modify - * argv and envp if invoked explicitly, making it necessary to - * load the (possibly) adjusted values from the stack. - */ - std %r4,104(%r1) /* argv */ -/* std %r6,120(%r1) *//* obj (always 0) */ -/* std %r7,128(%r1) *//* cleanup (always 0) */ - std %r8,136(%r1) /* ps_strings */ - - /* - * Perform initial relocation of ld-elf.so. Not as easy as it - * sounds. - * - perform small forward branch to put PC into link reg - * - use link-time constants to determine offset to the - * _DYNAMIC section and the GOT. Add these to the PC to - * convert to absolute addresses. - * - call reloc_non_plt_self() to fix up ld-elf.so's relocations - */ - - bl 1f - .llong _DYNAMIC-. -1: - mflr %r3 /* PC value at .llong */ - ld %r4,0(%r3) /* offset to _DYNAMIC */ - add %r3,%r4,%r3 /* r3 = &_DYNAMIC, absolute value */ - - ld %r4,-0x8000(%r2) /* First TOC entry is TOC base */ - subf %r4,%r4,%r2 /* Subtract from real TOC base to get base */ - - bl reloc_non_plt_self /* reloc_non_plt_self(&_DYNAMIC,base) */ - nop - - /* - * The _rtld() function likes to see a stack layout containing - * { argc, argv[0], argv[1] ... argv[N], 0, env[0], ... , env[N] } - * Since the PowerPC stack was 16-byte aligned at exec time, the - * original stack layout has to be found by moving back a word - * from the argv pointer. - */ - ld %r4,104(%r1) - addi %r3,%r4,-8 /* locate argc ptr, &argv[-1] */ - addi %r4,%r1,128 /* &exit_proc on stack */ - addi %r5,%r1,120 /* &obj_main on stack */ - - bl _rtld /* &_start = _rtld(sp, &exit_proc, &obj_main)*/ - nop -#if !defined(_CALL_ELF) || _CALL_ELF == 1 - ld %r2,8(%r3) - ld %r11,16(%r3) - ld %r3,0(%r3) -#else - mr %r12,%r3 -#endif - mtlr %r3 - - /* - * Restore args, with new obj/exit proc - */ - ld %r4,104(%r1) /* argv */ - ld %r3,-8(%r4) /* argc */ - - /* envp = argv + argc + 1 */ - addi %r5,%r3,1 - sldi %r5,%r5,3 /* x8 */ - add %r5,%r4,%r5 - - ld %r6,120(%r1) /* obj */ - ld %r7,128(%r1) /* exit proc */ - ld %r8,136(%r1) /* ps_strings */ - - blrl /* _start(argc, argv, envp, obj, cleanup, ps_strings) */ - - li %r0,1 /* _exit() */ - sc -_END(_rtld_start) - -/* - * _rtld_bind_start() - * - * Call into the MI binder. This routine is reached via the PLT call cell - * - * On entry, %r11 contains an object pointer and %r0 contains the PLT index. - * - * Save all registers, call into the binder to resolve and fixup the external - * routine, and then transfer to the external routine on return. - */ - .globl _rtld_bind - -_ENTRY(_rtld_bind_start) - mr %r12,%r0 # save r0 (index) immediately to r12 - mflr %r0 - std %r0,16(%r1) # save lr - mfcr %r0 - std %r0,8(%r1) # save cr - - stdu %r1,-48-12*8(%r1) # stack space for 8 regs + header - # + 2 save regs - std %r3,64+0*8(%r1) # save r3-r10 (arguments) - std %r4,64+1*8(%r1) - std %r5,64+2*8(%r1) - std %r6,64+3*8(%r1) - std %r7,64+4*8(%r1) - std %r8,64+5*8(%r1) - std %r9,64+6*8(%r1) - std %r10,64+7*8(%r1) - - mr %r3,%r11 - mulli %r4,%r12,24 # Multiply index by sizeof(Elf_Rela) - - bl _rtld_bind # target addr = _rtld_bind(obj, reloff) - nop - -#if !defined(_CALL_ELF) || _CALL_ELF == 1 - ld %r2,8(%r3) - ld %r11,16(%r3) - ld %r3,0(%r3) -#else - mr %r12,%r3 -#endif - mtctr %r3 # move absolute target addr into ctr - - ld %r3,64+0*8(%r1) # restore r3-r10 - ld %r4,64+1*8(%r1) - ld %r5,64+2*8(%r1) - ld %r6,64+3*8(%r1) - ld %r7,64+4*8(%r1) - ld %r8,64+5*8(%r1) - ld %r9,64+6*8(%r1) - ld %r10,64+7*8(%r1) - - ld %r1,0(%r1) # restore stack - ld %r0,8(%r1) # restore cr - mtcr %r0 - ld %r0,16(%r1) # restore lr - mtlr %r0 - - bctr # jump to target -_END(_rtld_bind_start) - - .section .note.GNU-stack,"",%progbits diff --git a/libexec/rtld-elf/rtld-libc/Makefile.inc b/libexec/rtld-elf/rtld-libc/Makefile.inc index 06d30165f6e..94f11e45940 100644 --- a/libexec/rtld-elf/rtld-libc/Makefile.inc +++ b/libexec/rtld-elf/rtld-libc/Makefile.inc @@ -4,8 +4,8 @@ .include LIBC_SRCTOP=${SRCTOP}/lib/libc -.if exists(${LIBC_SRCTOP}/${MACHINE_ARCH:S/powerpc64le/powerpc64/}) -LIBC_ARCH=${MACHINE_ARCH:S/powerpc64le/powerpc64/} +.if exists(${LIBC_SRCTOP}/${MACHINE_ARCH}) +LIBC_ARCH=${MACHINE_ARCH} .else LIBC_ARCH=${MACHINE_CPUARCH} .endif @@ -58,12 +58,6 @@ _libc_other_objects+=aeabi_unwind_cpp .elif ${LIBC_ARCH} == "i386" # i386 needs i386_set_gsbase for allocate_initial_tls() _libc_other_objects+=i386_set_gsbase -.elif ${LIBC_ARCH} == "powerpc" || ${LIBC_ARCH} == "powerpcspe" -# ppc needs __syncicache and abs for reloc.c -_libc_other_objects+=syncicache abs -.elif ${LIBC_ARCH} == "powerpc64" -# ppc64 needs __syncicache for reloc.c -_libc_other_objects+=syncicache .endif # Extract all the .o files from libc_nossp_pic.a. This ensures that diff --git a/libexec/rtld-elf/rtld.c b/libexec/rtld-elf/rtld.c index 0e2f6834360..17f8e5f56d3 100644 --- a/libexec/rtld-elf/rtld.c +++ b/libexec/rtld-elf/rtld.c @@ -525,9 +525,6 @@ _rtld(Elf_Addr *sp, func_ptr_type *exit_proc, Obj_Entry **objp) char buf[MAXPATHLEN]; int argc, fd, i, mib[4], old_osrel, osrel, phnum, rtld_argc; size_t sz; -#ifdef __powerpc__ - int old_auxv_format = 1; -#endif bool dir_enable, dir_ignore, direct_exec, explicit_fd, search_in_path; /* @@ -553,28 +550,8 @@ _rtld(Elf_Addr *sp, func_ptr_type *exit_proc, Obj_Entry **objp) for (auxp = aux; auxp->a_type != AT_NULL; auxp++) { if (auxp->a_type < AT_COUNT) aux_info[auxp->a_type] = auxp; -#ifdef __powerpc__ - if (auxp->a_type == 23) /* AT_STACKPROT */ - old_auxv_format = 0; -#endif } -#ifdef __powerpc__ - if (old_auxv_format) { - /* Remap from old-style auxv numbers. */ - aux_info[23] = aux_info[21]; /* AT_STACKPROT */ - aux_info[21] = aux_info[19]; /* AT_PAGESIZESLEN */ - aux_info[19] = aux_info[17]; /* AT_NCPUS */ - aux_info[17] = aux_info[15]; /* AT_CANARYLEN */ - aux_info[15] = aux_info[13]; /* AT_EXECPATH */ - aux_info[13] = NULL; /* AT_GID */ - - aux_info[20] = aux_info[18]; /* AT_PAGESIZES */ - aux_info[18] = aux_info[16]; /* AT_OSRELDATE */ - aux_info[16] = aux_info[14]; /* AT_CANARY */ - aux_info[14] = NULL; /* AT_EGID */ - } -#endif /* Initialize and relocate ourselves. */ assert(aux_info[AT_BASE] != NULL); @@ -1028,10 +1005,6 @@ rtld_resolve_ifunc(const Obj_Entry *obj, const Elf_Sym *def) return ((void *)target); } -/* - * NB: MIPS uses a private version of this function (_mips_rtld_bind). - * Changes to this function should be applied there as well. - */ Elf_Addr _rtld_bind(Obj_Entry *obj, Elf_Size reloff) { @@ -1511,19 +1484,6 @@ digest_dynamic1(Obj_Entry *obj, int early, const Elf_Dyn **dyn_rpath, obj->fini_array_num = dynp->d_un.d_val / sizeof(Elf_Addr); break; - /* - * Don't process DT_DEBUG on MIPS as the dynamic section - * is mapped read-only. DT_MIPS_RLD_MAP is used instead. - */ - -#ifndef __mips__ - case DT_DEBUG: - if (!early) - dbg("Filling in DT_DEBUG entry"); - (__DECONST(Elf_Dyn *, dynp))->d_un.d_ptr = (Elf_Addr)&r_debug; - break; -#endif - case DT_FLAGS: if (dynp->d_un.d_val & DF_ORIGIN) obj->z_origin = true; @@ -1536,48 +1496,6 @@ digest_dynamic1(Obj_Entry *obj, int early, const Elf_Dyn **dyn_rpath, if (dynp->d_un.d_val & DF_STATIC_TLS) obj->static_tls = true; break; -#ifdef __mips__ - case DT_MIPS_LOCAL_GOTNO: - obj->local_gotno = dynp->d_un.d_val; - break; - - case DT_MIPS_SYMTABNO: - obj->symtabno = dynp->d_un.d_val; - break; - - case DT_MIPS_GOTSYM: - obj->gotsym = dynp->d_un.d_val; - break; - - case DT_MIPS_RLD_MAP: - *((Elf_Addr *)(dynp->d_un.d_ptr)) = (Elf_Addr) &r_debug; - break; - - case DT_MIPS_RLD_MAP_REL: - // The MIPS_RLD_MAP_REL tag stores the offset to the .rld_map - // section relative to the address of the tag itself. - *((Elf_Addr *)(__DECONST(char*, dynp) + dynp->d_un.d_val)) = - (Elf_Addr) &r_debug; - break; - - case DT_MIPS_PLTGOT: - obj->mips_pltgot = (Elf_Addr *)(obj->relocbase + - dynp->d_un.d_ptr); - break; - -#endif - -#ifdef __powerpc__ -#ifdef __powerpc64__ - case DT_PPC64_GLINK: - obj->glink = (Elf_Addr)(obj->relocbase + dynp->d_un.d_ptr); - break; -#else - case DT_PPC_GOT: - obj->gotptr = (Elf_Addr *)(obj->relocbase + dynp->d_un.d_ptr); - break; -#endif -#endif case DT_FLAGS_1: if (dynp->d_un.d_val & DF_1_NOOPEN) @@ -2482,10 +2400,7 @@ init_rtld(caddr_t mapbase, Elf_Auxinfo **aux_info) objtmp.dynamic = rtld_dynamic(&objtmp); digest_dynamic1(&objtmp, 1, &dyn_rpath, &dyn_soname, &dyn_runpath); assert(objtmp.needed == NULL); -#if !defined(__mips__) - /* MIPS has a bogus DT_TEXTREL. */ assert(!objtmp.textrel); -#endif /* * Temporarily put the dynamic linker entry into the object list, so * that symbols can be found. @@ -4871,11 +4786,9 @@ matched_symbol(SymLook *req, const Obj_Entry *obj, Sym_Match_Result *result, case STT_TLS: if (symp->st_shndx != SHN_UNDEF) break; -#ifndef __mips__ else if (((req->flags & SYMLOOK_IN_PLT) == 0) && (ELF_ST_TYPE(symp->st_info) == STT_FUNC)) break; -#endif /* fallthrough */ default: return (false); diff --git a/libexec/rtld-elf/rtld.h b/libexec/rtld-elf/rtld.h index 77c78d04391..12333c678b7 100644 --- a/libexec/rtld-elf/rtld.h +++ b/libexec/rtld-elf/rtld.h @@ -180,20 +180,6 @@ typedef struct Struct_Obj_Entry { const Elf_Sym *symtab; /* Symbol table */ const char *strtab; /* String table */ unsigned long strsize; /* Size in bytes of string table */ -#ifdef __mips__ - Elf_Word local_gotno; /* Number of local GOT entries */ - Elf_Word symtabno; /* Number of dynamic symbols */ - Elf_Word gotsym; /* First dynamic symbol in GOT */ - Elf_Addr *mips_pltgot; /* Second PLT GOT */ -#endif -#ifdef __powerpc__ -#ifdef __powerpc64__ - Elf_Addr glink; /* GLINK PLT call stub section */ -#else - Elf_Addr *gotptr; /* GOT pointer (secure-plt only) */ -#endif -#endif - const Elf_Verneed *verneed; /* Required versions. */ Elf_Word verneednum; /* Number of entries in verneed table */ const Elf_Verdef *verdef; /* Provided versions. */ diff --git a/release/powerpc/boot.tbxi b/release/powerpc/boot.tbxi deleted file mode 100644 index adf76e1c6e0..00000000000 --- a/release/powerpc/boot.tbxi +++ /dev/null @@ -1,14 +0,0 @@ - - - - -MacRISC MacRISC3 MacRISC4 - - -FreeBSD/PPC bootloader - - -" screen" output -boot cd:,\boot\loader cd:0 - - diff --git a/release/powerpc/generate-hfs.sh b/release/powerpc/generate-hfs.sh deleted file mode 100755 index 50f77933f27..00000000000 --- a/release/powerpc/generate-hfs.sh +++ /dev/null @@ -1,61 +0,0 @@ -#!/bin/sh - -# This script generates the dummy HFS filesystem used for the PowerPC boot -# blocks. It uses hfsutils (emulators/hfsutils) to generate a template -# filesystem with the relevant interesting files. These are then found by -# grep, and the offsets written to a Makefile snippet. -# -# Because of licensing concerns, and because it is overkill, we do not -# distribute hfsutils as a build tool. If you need to regenerate the HFS -# template (e.g. because the boot block or the CHRP script have grown), -# you must install it from ports. - -HFS_SIZE=400 #Size in 2048-byte blocks of the produced image -LOADER_SIZE=500k - -# Generate 800K HFS image -OUTPUT_FILE=hfs-boot - -dd if=/dev/zero of=$OUTPUT_FILE bs=2048 count=$HFS_SIZE -hformat -l "FreeBSD Install" $OUTPUT_FILE -hmount $OUTPUT_FILE - -# Create and bless a directory for the boot loader -hmkdir ppc -hattrib -b ppc -hcd ppc - -# Make the CHRP boot script, which gets loader from the ISO9660 partition -cat > bootinfo.txt << EOF - -FreeBSD/powerpc bootloader -FreeBSD - $FreeBSD: head/stand/powerpc/boot1.chrp/bootinfo.txt 184490 2008-10 --31 00:52:31Z nwhitehorn $ - - -MacRISC MacRISC3 MacRISC4 - - -" screen" output -boot &device;:,\ppc\loader &device;:0 - - -EOF -echo 'Loader START' | dd of=loader.tmp cbs=$LOADER_SIZE count=1 conv=block - -hcopy bootinfo.txt :bootinfo.txt -hcopy loader.tmp :loader -hattrib -c chrp -t tbxi bootinfo.txt -humount - -rm bootinfo.txt -rm loader.tmp - -bzip2 $OUTPUT_FILE -echo 'HFS boot filesystem created by generate-hfs.sh' > $OUTPUT_FILE.bz2.uu -echo 'DO NOT EDIT' >> $OUTPUT_FILE.bz2.uu - -uuencode $OUTPUT_FILE.bz2 $OUTPUT_FILE.bz2 >> $OUTPUT_FILE.bz2.uu -rm $OUTPUT_FILE.bz2 - diff --git a/release/powerpc/hfs-boot.bz2.uu b/release/powerpc/hfs-boot.bz2.uu deleted file mode 100644 index fbae44dcb43..00000000000 --- a/release/powerpc/hfs-boot.bz2.uu +++ /dev/null @@ -1,22 +0,0 @@ -HFS boot filesystem created by generate-hfs.sh -DO NOT EDIT -begin 644 hfs-boot.bz2 -M0EIH.3%!62936=IZTD$``"__]__O_G)7!_Y]OV??5']UW\1$0`$$0```P&`@ -M`$A`3,`"L#DRUJM"4E,32>D\*>4\HS2-`:`#0````>IH`>H!H-`$B23)H"8% -M!^DF@!ID`:-!H-``&@]3U-`#0]('``-!H:#0`:9!H9`TT``!D`&0&0`$DDIH -M-I-`]0#3U-!HT`'J-``````T-`:&(\F**;,&,E=GQ&[8L)7V[YZ^ZJR_.@4& -MU2XDPC+N!>EYZ/W&3#04SE<:P5525]GTO0!)[3!!B8)L`$@-R?/:TG2RBWBD -M0W-`28BS(@AF_JA3LX#"=D,6`8$FQH;$D(00T-/U)FN-$V.@D&`83,*F)5QB -M4FE2VQ0-(20@DF(-O(HKUH0H8CD,%=&+-^.M]B8!::Q1RF@RL&TP46*0U-B% -MB<50X!"$#S8DV:/)48JA*AC$4DI.CV$L!H)>35`M2ZH9QEA%Q`A30=L(-&8J4!RX`FT"S%(H51.1'GG@?L)8[-HK%K>HLXPST0\@K. -M.0JVBB]*R,L4EW?[61,+)QSE0`]`'!N]>P2IX`_7`^,`A"!])"$DG#MJ -,K_B[DBG"A(;3UI(( -` -end diff --git a/release/powerpc/mkisoimages.sh b/release/powerpc/mkisoimages.sh deleted file mode 100644 index 760851bde73..00000000000 --- a/release/powerpc/mkisoimages.sh +++ /dev/null @@ -1,75 +0,0 @@ -#!/bin/sh -# -# Module: mkisoimages.sh -# Author: Jordan K Hubbard -# Date: 22 June 2001 -# -# -# This script is used by release/Makefile to build the (optional) ISO images -# for a FreeBSD release. It is considered architecture dependent since each -# platform has a slightly unique way of making bootable CDs. This script -# is also allowed to generate any number of images since that is more of -# publishing decision than anything else. -# -# Usage: -# -# mkisoimages.sh [-b] image-label image-name base-bits-dir [extra-bits-dir] -# -# Where -b is passed if the ISO image should be made "bootable" by -# whatever standards this architecture supports (may be unsupported), -# image-label is the ISO image label, image-name is the filename of the -# resulting ISO image, base-bits-dir contains the image contents and -# extra-bits-dir, if provided, contains additional files to be merged -# into base-bits-dir as part of making the image. - -set -e - -if [ "$1" = "-b" ]; then - bootable=1 - shift -else - bootable="" -fi - -if [ $# -lt 3 ]; then - echo "Usage: $0 [-b] image-label image-name base-bits-dir [extra-bits-dir]" - exit 1 -fi - -LABEL=`echo "$1" | tr '[:lower:]' '[:upper:]'`; shift -NAME="$1"; shift - -if [ -n "$bootable" ]; then - echo "Building bootable disc" - - # Apple boot code - uudecode -o /tmp/hfs-boot-block.bz2 "`dirname "$0"`/hfs-boot.bz2.uu" - bzip2 -d /tmp/hfs-boot-block.bz2 - OFFSET=$(hd /tmp/hfs-boot-block | grep 'Loader START' | cut -f 1 -d ' ') - OFFSET=0x$(echo 0x$OFFSET | awk '{printf("%x\n",$1/512);}') - dd if="$1/boot/loader" of=/tmp/hfs-boot-block seek=$OFFSET conv=notrunc - - bootable="-o bootimage=macppc;/tmp/hfs-boot-block -o no-emul-boot" - - # pSeries/PAPR boot code - mkdir -p "$1/ppc/chrp" - cp "$1/boot/loader" "$1/ppc/chrp" - cat > "$1/ppc/bootinfo.txt" << EOF - -FreeBSD Install -FreeBSD -boot &device;:,\ppc\chrp\loader - -EOF - bootable="$bootable -o chrp-boot" - - # Petitboot config for PS3/PowerNV - echo FreeBSD Install=\'/boot/kernel/kernel vfs.root.mountfrom=cd9660:/dev/iso9660/$LABEL\' > "$1/etc/kboot.conf" -fi - -publisher="The FreeBSD Project. https://www.FreeBSD.org/" -echo "/dev/iso9660/$LABEL / cd9660 ro 0 0" > "$1/etc/fstab" -makefs -t cd9660 $bootable -o rockridge -o label="$LABEL" -o publisher="$publisher" "$NAME" "$@" -rm -f "$1/etc/fstab" -rm -f /tmp/hfs-boot-block -rm -rf "$1/ppc" diff --git a/release/powerpc/powerpc.conf b/release/powerpc/powerpc.conf deleted file mode 100644 index 8acafaa8bd8..00000000000 --- a/release/powerpc/powerpc.conf +++ /dev/null @@ -1,9 +0,0 @@ -#!/bin/sh -# -# - -# Configuration file for release/release.sh to build powerpc/powerpc. - -TARGET="powerpc" -TARGET_ARCH="powerpc" -KERNEL="GENERIC" diff --git a/release/powerpc/powerpc64.conf b/release/powerpc/powerpc64.conf deleted file mode 100644 index fe859bdb762..00000000000 --- a/release/powerpc/powerpc64.conf +++ /dev/null @@ -1,9 +0,0 @@ -#!/bin/sh -# -# - -# Configuration file for release/release.sh to build powerpc/powerpc64. - -TARGET="powerpc" -TARGET_ARCH="powerpc64" -KERNEL="GENERIC64" diff --git a/release/powerpc/powerpc64le.conf b/release/powerpc/powerpc64le.conf deleted file mode 100644 index f9660836c36..00000000000 --- a/release/powerpc/powerpc64le.conf +++ /dev/null @@ -1,9 +0,0 @@ -#!/bin/sh -# -# - -# Configuration file for release/release.sh to build powerpc/powerpc64le. - -TARGET="powerpc" -TARGET_ARCH="powerpc64le" -KERNEL="GENERIC64LE" diff --git a/release/powerpc/powerpcspe.conf b/release/powerpc/powerpcspe.conf deleted file mode 100644 index 955287f94e3..00000000000 --- a/release/powerpc/powerpcspe.conf +++ /dev/null @@ -1,9 +0,0 @@ -#!/bin/sh -# -# - -# Configuration file for release/release.sh to build powerpc/powerpcspe. - -TARGET="powerpc" -TARGET_ARCH="powerpcspe" -KERNEL="MPC85XXSPE" diff --git a/release/tools/vmimage.subr b/release/tools/vmimage.subr index c3bdfc250e7..cda559df1ea 100644 --- a/release/tools/vmimage.subr +++ b/release/tools/vmimage.subr @@ -15,13 +15,6 @@ trap "cleanup" INT QUIT TRAP ABRT TERM # Most platforms use GPT, so put that as default, then special cases PARTSCHEME=gpt ROOTLABEL="gpt" -case "${TARGET}:${TARGET_ARCH}" in - powerpc:powerpc*) - PARTSCHEME=mbr - ROOTLABEL="ufs" - NOSWAP=yes # Can't label swap partition with MBR, so no swap - ;; -esac err() { printf "${@}\n" @@ -212,16 +205,6 @@ vm_create_disk() { ROOTFSPART="-p mnbsd-ufs/rootfs:=${VMBASE}" MAKEFSARGS="-B little" ;; - powerpc:powerpc*) - ESP=no - BOOTPARTS="-p prepboot:=${BOOTFILES}/powerpc/boot1.chrp/boot1.elf -a 1" - ROOTFSPART="-p midnightbsd:=${VMBASE}" - if [ ${TARGET_ARCH} = powerpc64le ]; then - MAKEFSARGS="-B little" - else - MAKEFSARGS="-B big" - fi - ;; *) echo "vmimage.subr: unsupported target '${TARGET}:${TARGET_ARCH}'" >&2 exit 1 diff --git a/sbin/Makefile.mips b/sbin/Makefile.mips deleted file mode 100644 index 4904b2ebfe8..00000000000 --- a/sbin/Makefile.mips +++ /dev/null @@ -1,3 +0,0 @@ - -SUBDIR += bsdlabel -SUBDIR += fdisk diff --git a/sbin/Makefile.powerpc64 b/sbin/Makefile.powerpc64 deleted file mode 100644 index 4904b2ebfe8..00000000000 --- a/sbin/Makefile.powerpc64 +++ /dev/null @@ -1,3 +0,0 @@ - -SUBDIR += bsdlabel -SUBDIR += fdisk diff --git a/sbin/devd/Makefile b/sbin/devd/Makefile index 91a58da3189..8dab6ec861d 100644 --- a/sbin/devd/Makefile +++ b/sbin/devd/Makefile @@ -22,10 +22,6 @@ HYPERVPACKAGE= hyperv-tools DEVD+= uath.conf ulpt.conf .endif -.if ${MACHINE_ARCH} == "powerpc" -DEVD+= apple.conf -.endif - .if ${MK_ZFS} != "no" DEVD+= zfs.conf .endif diff --git a/sbin/devd/apple.conf b/sbin/devd/apple.conf deleted file mode 100644 index 627be6297ed..00000000000 --- a/sbin/devd/apple.conf +++ /dev/null @@ -1,79 +0,0 @@ -# -# PowerPC Apple specific devd events - -# Keyboard power key -notify 0 { - match "system" "PMU"; - match "subsystem" "Button"; - action "shutdown -p now"; -}; - - -# PowerBook and iBook lid close. -notify 0 { - match "system" "PMU"; - match "subsystem" "lid"; - match "type" "close"; - action "shutdown -p now"; -}; - - -# The next blocks enable brightness hotkeys that can be found on Apple laptops -notify 0 { - match "system" "PMU"; - match "subsystem" "keys"; - match "type" "brightness"; - match "notify" "down"; - action "sysctl dev.backlight.0.level=\ - $(expr `sysctl -n dev.backlight.0.level` - 10)"; -}; - -notify 0 { - match "system" "PMU"; - match "subsystem" "keys"; - match "type" "brightness"; - match "notify" "up"; - action "sysctl dev.backlight.0.level=\ - $(expr `sysctl -n dev.backlight.0.level` + 10)"; -}; - - -# The next blocks enable volume hotkeys that can be found on Apple laptops -notify 0 { - match "system" "PMU"; - match "subsystem" "keys"; - match "type" "mute"; - action "mixer 0"; -}; - -notify 0 { - match "system" "PMU"; - match "subsystem" "keys"; - match "type" "volume"; - match "notify" "down"; - action "mixer vol -10"; -}; - -notify 0 { - match "system" "PMU"; - match "subsystem" "keys"; - match "type" "volume"; - match "notify" "up"; - action "mixer vol +10"; -}; - -# Eject key -notify 0 { - match "system" "PMU"; - match "subsystem" "keys"; - match "type" "eject"; - action "camcontrol eject cd0"; -}; - -# Equivalent to the ACPI/ACAD notify -notify 10 { - match "system" "PMU"; - match "subsystem" "POWER"; - match "type" "ACLINE"; - action "service power_profile $notify"; -}; diff --git a/secure/lib/libcrypto/Makefile b/secure/lib/libcrypto/Makefile index 6a04bc5163f..73e7a4aeffa 100644 --- a/secure/lib/libcrypto/Makefile +++ b/secure/lib/libcrypto/Makefile @@ -32,12 +32,6 @@ SRCS+= x86_64cpuid.S SRCS+= armv4cpuid.S armcap.c .elif defined(ASM_i386) SRCS+= x86cpuid.S -.elif defined(ASM_powerpc) -SRCS+= ppccpuid.S ppccap.c -.elif defined(ASM_powerpc64) -SRCS+= ppccpuid.S ppccap.c -.elif defined(ASM_powerpc64le) -SRCS+= ppccpuid.S ppccap.c .else SRCS+= mem_clr.c .endif @@ -54,12 +48,6 @@ SRCS+= aesni-sha256-x86_64.S aesni-x86_64.S bsaes-x86_64.S vpaes-x86_64.S SRCS+= aes_cbc.c aes-armv4.S aesv8-armx.S bsaes-armv7.S .elif defined(ASM_i386) SRCS+= aes-586.S aesni-x86.S vpaes-x86.S -.elif defined(ASM_powerpc) -SRCS+= aes_cbc.c aes_core.c aes-ppc.S vpaes-ppc.S aesp8-ppc.S -.elif defined(ASM_powerpc64) -SRCS+= aes_cbc.c aes_core.c aes-ppc.S vpaes-ppc.S aesp8-ppc.S -.elif defined(ASM_powerpc64le) -SRCS+= aes_cbc.c aes_core.c aes-ppc.S vpaes-ppc.S aesp8-ppc.S .else SRCS+= aes_cbc.c aes_core.c .endif @@ -109,12 +97,6 @@ SRCS+= x86_64-gcc.c x86_64-gf2m.S x86_64-mont.S x86_64-mont5.S SRCS+= armv4-gf2m.S armv4-mont.S bn_asm.c .elif defined(ASM_i386) SRCS+= bn-586.S co-586.S x86-gf2m.S x86-mont.S -.elif defined(ASM_powerpc) -SRCS+= bn_ppc.c bn-ppc.S ppc-mont.S -.elif defined(ASM_powerpc64) -SRCS+= bn_ppc.c bn-ppc.S ppc-mont.S -.elif defined(ASM_powerpc64le) -SRCS+= bn_ppc.c bn-ppc.S ppc-mont.S .else SRCS+= bn_asm.c .endif @@ -149,12 +131,6 @@ SRCS+= chacha-x86_64.S SRCS+= chacha-armv4.S .elif defined(ASM_i386) SRCS+= chacha-x86.S -.elif defined(ASM_powerpc) -SRCS+= chacha_ppc.c chacha-ppc.S -.elif defined(ASM_powerpc64) -SRCS+= chacha_ppc.c chacha-ppc.S -.elif defined(ASM_powerpc64le) -SRCS+= chacha_ppc.c chacha-ppc.S .else SRCS+= chacha_enc.c .endif @@ -218,8 +194,7 @@ SRCS+= ecp_oct.c ecp_smpl.c ecx_backend.c ecx_key.c ecx_meth.c eddsa.c SRCS+= f_generic.c f_impl32.c f_impl64.c scalar.c # see OPENSSL_NO_EC_NISTP_64_GCC_128 in configuration.h .if ${TARGET_ENDIANNESS} == 1234 && (${MACHINE_CPUARCH} == "amd64" || \ - ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_ARCH} == "powerpc64" || \ - ${MACHINE_ARCH} == "powerpc64le") + ${MACHINE_CPUARCH} == "aarch64") SRCS+= ecp_nistp224.c ecp_nistp256.c ecp_nistp521.c ecp_nistputil.c .endif .if defined(ASM_aarch64) @@ -230,10 +205,6 @@ SRCS+= ecp_nistz256-x86_64.S ecp_nistz256.c x25519-x86_64.S SRCS+= ecp_nistz256-armv4.S ecp_nistz256.c .elif defined(ASM_i386) SRCS+= ecp_nistz256-x86.S ecp_nistz256.c -.elif defined(ASM_powerpc64) -SRCS+= ecp_nistp521-ppc64.S ecp_nistz256-ppc64.S ecp_nistz256.c ecp_ppc.c x25519-ppc64.S -.elif defined(ASM_powerpc64le) -SRCS+= ecp_nistp521-ppc64.S ecp_nistz256-ppc64.S ecp_nistz256.c ecp_ppc.c x25519-ppc64.S .endif # encode_decode @@ -304,12 +275,6 @@ SRCS+= aesni-gcm-x86_64.S ghash-x86_64.S SRCS+= ghash-armv4.S ghashv8-armx.S .elif defined(ASM_i386) SRCS+= ghash-x86.S -.elif defined(ASM_powerpc) -SRCS+= ghashp8-ppc.S -.elif defined(ASM_powerpc64) -SRCS+= ghashp8-ppc.S -.elif defined(ASM_powerpc64le) -SRCS+= ghashp8-ppc.S .endif # objects @@ -342,12 +307,6 @@ SRCS+= poly1305-x86_64.S SRCS+= poly1305-armv4.S .elif defined(ASM_i386) SRCS+= poly1305-x86.S -.elif defined(ASM_powerpc) -SRCS+= poly1305_ppc.c poly1305-ppc.S poly1305-ppcfp.S -.elif defined(ASM_powerpc64) -SRCS+= poly1305_ppc.c poly1305-ppc.S poly1305-ppcfp.S -.elif defined(ASM_powerpc64le) -SRCS+= poly1305_ppc.c poly1305-ppc.S poly1305-ppcfp.S .endif # property @@ -498,12 +457,6 @@ SRCS+= sha256-mb-x86_64.S sha256-x86_64.S sha512-x86_64.S SRCS+= keccak1600-armv4.S sha1-armv4-large.S sha256-armv4.S sha512-armv4.S .elif defined(ASM_i386) SRCS+= keccak1600.c sha1-586.S sha256-586.S sha512-586.S -.elif defined(ASM_powerpc) -SRCS+= keccak1600.c sha_ppc.c sha1-ppc.S sha256-ppc.S sha512-ppc.S sha256p8-ppc.S sha512p8-ppc.S -.elif defined(ASM_powerpc64) -SRCS+= keccak1600-ppc64.S sha_ppc.c sha1-ppc.S sha256-ppc.S sha512-ppc.S sha256p8-ppc.S sha512p8-ppc.S -.elif defined(ASM_powerpc64le) -SRCS+= keccak1600-ppc64.S sha_ppc.c sha1-ppc.S sha256-ppc.S sha512-ppc.S sha256p8-ppc.S sha512p8-ppc.S .else SRCS+= keccak1600.c .endif @@ -611,7 +564,7 @@ buildinf.h: Makefile > ${.TARGET} buildasm cleanasm: -.for arch in aarch64 amd64 arm i386 powerpc powerpc64 powerpc64le +.for arch in aarch64 amd64 arm i386 make MK_AUTO_OBJ=no -DWITHOUT_AUTO_ASM -DASM_${arch} \ -f ${.CURDIR}/Makefile.asm -C ${SRCTOP}/sys/crypto/openssl/${arch} \ ${.TARGET:S/build/all/:S/asm$//} diff --git a/secure/lib/libcrypto/Makefile.asm b/secure/lib/libcrypto/Makefile.asm index d4f7269aa50..97f77db97e7 100644 --- a/secure/lib/libcrypto/Makefile.asm +++ b/secure/lib/libcrypto/Makefile.asm @@ -289,203 +289,6 @@ CLEANFILES= ${ASM} env CC=cc perl ${PERLPATH} ${.IMPSRC} elf ${CFLAGS} /dev/stdout ;\ echo '#endif' ) > ${.TARGET} -.elif defined(ASM_powerpc) - -.PATH: ${LCRYPTO_SRC}/crypto \ - ${LCRYPTO_SRC}/crypto/aes/asm \ - ${LCRYPTO_SRC}/crypto/bn/asm \ - ${LCRYPTO_SRC}/crypto/chacha/asm \ - ${LCRYPTO_SRC}/crypto/modes/asm \ - ${LCRYPTO_SRC}/crypto/poly1305/asm \ - ${LCRYPTO_SRC}/crypto/sha/asm - -PERLPATH= -I${LCRYPTO_SRC}/crypto/perlasm - -#cpuid -SRCS= ppccpuid.pl - -#bn -SRCS+= ppc.pl ppc-mont.pl - -#aes -SRCS+= aes-ppc.pl vpaes-ppc.pl aesp8-ppc.pl - -#sha1 -SRCS+= sha1-ppc.pl sha512-ppc.pl sha512p8-ppc.pl - -#modes -SRCS+= ghashp8-ppc.pl - -#chacha -SRCS+= chacha-ppc.pl - -#poly1305 -SRCS+= poly1305-ppc.pl poly1305-ppcfp.pl - -ASM= ${SRCS:R:S/$/.S/} bn-ppc.S sha256-ppc.S sha256p8-ppc.S - -all: ${ASM} - rm -f ${ASM:R:S/$/.s/} - -CLEANFILES= ${ASM} -.SUFFIXES: .pl - -bn-ppc.S: ppc.pl - env CC=cc perl ${.ALLSRC} linux32 ${.TARGET:R:S/$/.s/} - ( echo '/* Do not modify. This file is auto-generated from ${.ALLSRC:T}. */' ;\ - cat ${.TARGET:R:S/$/.s/}) > ${.TARGET} - -sha256-ppc.S: sha512-ppc.pl - env CC=cc perl ${.ALLSRC} linux32 ${.TARGET:R:S/$/.s/} - ( echo '/* Do not modify. This file is auto-generated from ${.ALLSRC:T}. */' ;\ - cat ${.TARGET:R:S/$/.s/}) > ${.TARGET} - -sha256p8-ppc.S: sha512p8-ppc.pl - env CC=cc perl ${.ALLSRC} linux32 ${.TARGET:R:S/$/.s/} - ( echo '/* Do not modify. This file is auto-generated from ${.ALLSRC:T}. */' ;\ - cat ${.TARGET:R:S/$/.s/}) > ${.TARGET} - -.pl.S: - env CC=cc perl ${.IMPSRC} linux32 ${.TARGET:R:S/$/.s/} - ( echo '/* Do not modify. This file is auto-generated from ${.ALLSRC:T}. */' ;\ - cat ${.TARGET:R:S/$/.s/}) > ${.TARGET} - -.elif defined(ASM_powerpc64) - -.PATH: ${LCRYPTO_SRC}/crypto \ - ${LCRYPTO_SRC}/crypto/aes/asm \ - ${LCRYPTO_SRC}/crypto/bn/asm \ - ${LCRYPTO_SRC}/crypto/chacha/asm \ - ${LCRYPTO_SRC}/crypto/ec/asm \ - ${LCRYPTO_SRC}/crypto/modes/asm \ - ${LCRYPTO_SRC}/crypto/poly1305/asm \ - ${LCRYPTO_SRC}/crypto/sha/asm - -PERLPATH= -I${LCRYPTO_SRC}/crypto/perlasm - -#cpuid -SRCS= ppccpuid.pl - -#bn -SRCS+= ppc.pl ppc-mont.pl - -#aes -SRCS+= aes-ppc.pl vpaes-ppc.pl aesp8-ppc.pl - -#sha1 -SRCS+= sha1-ppc.pl sha512-ppc.pl sha512p8-ppc.pl - -#modes -SRCS+= ghashp8-ppc.pl - -#chacha -SRCS+= chacha-ppc.pl - -#poly1305 -SRCS+= poly1305-ppc.pl poly1305-ppcfp.pl - -#ec -SRCS+= ecp_nistp521-ppc64.pl ecp_nistz256-ppc64.pl x25519-ppc64.pl - -#keccak1600 -SRCS+= keccak1600-ppc64.pl - -ASM= ${SRCS:R:S/$/.S/} bn-ppc.S sha256-ppc.S sha256p8-ppc.S - -all: ${ASM} - rm -f ${ASM:R:S/$/.s/} - -CLEANFILES= ${ASM} -.SUFFIXES: .pl - -bn-ppc.S: ppc.pl - env CC=cc perl ${.ALLSRC} linux64v2 ${.TARGET:R:S/$/.s/} - ( echo '/* Do not modify. This file is auto-generated from ${.ALLSRC:T}. */' ;\ - cat ${.TARGET:R:S/$/.s/}) > ${.TARGET} - -sha256-ppc.S: sha512-ppc.pl - env CC=cc perl ${.ALLSRC} linux64v2 ${.TARGET:R:S/$/.s/} - ( echo '/* Do not modify. This file is auto-generated from ${.ALLSRC:T}. */' ;\ - cat ${.TARGET:R:S/$/.s/}) > ${.TARGET} - -sha256p8-ppc.S: sha512p8-ppc.pl - env CC=cc perl ${.ALLSRC} linux64v2 ${.TARGET:R:S/$/.s/} - ( echo '/* Do not modify. This file is auto-generated from ${.ALLSRC:T}. */' ;\ - cat ${.TARGET:R:S/$/.s/}) > ${.TARGET} - -.pl.S: - env CC=cc perl ${.IMPSRC} linux64v2 ${.TARGET:R:S/$/.s/} - ( echo '/* Do not modify. This file is auto-generated from ${.ALLSRC:T}. */' ;\ - cat ${.TARGET:R:S/$/.s/}) > ${.TARGET} - -.elif defined(ASM_powerpc64le) - -.PATH: ${LCRYPTO_SRC}/crypto \ - ${LCRYPTO_SRC}/crypto/aes/asm \ - ${LCRYPTO_SRC}/crypto/bn/asm \ - ${LCRYPTO_SRC}/crypto/chacha/asm \ - ${LCRYPTO_SRC}/crypto/ec/asm \ - ${LCRYPTO_SRC}/crypto/modes/asm \ - ${LCRYPTO_SRC}/crypto/poly1305/asm \ - ${LCRYPTO_SRC}/crypto/sha/asm - -PERLPATH= -I${LCRYPTO_SRC}/crypto/perlasm - -#cpuid -SRCS= ppccpuid.pl - -#bn -SRCS+= ppc.pl ppc-mont.pl - -#aes -SRCS+= aes-ppc.pl vpaes-ppc.pl aesp8-ppc.pl - -#sha1 -SRCS+= sha1-ppc.pl sha512-ppc.pl sha512p8-ppc.pl - -#modes -SRCS+= ghashp8-ppc.pl - -#chacha -SRCS+= chacha-ppc.pl - -#poly1305 -SRCS+= poly1305-ppc.pl poly1305-ppcfp.pl - -#ec -SRCS+= ecp_nistp521-ppc64.pl ecp_nistz256-ppc64.pl x25519-ppc64.pl - -#keccak1600 -SRCS+= keccak1600-ppc64.pl - -ASM= ${SRCS:R:S/$/.S/} bn-ppc.S sha256-ppc.S sha256p8-ppc.S - -all: ${ASM} - rm -f ${ASM:R:S/$/.s/} - -CLEANFILES= ${ASM} -.SUFFIXES: .pl - -bn-ppc.S: ppc.pl - env CC=cc perl ${.ALLSRC} linux64le ${.TARGET:R:S/$/.s/} - ( echo '/* Do not modify. This file is auto-generated from ${.ALLSRC:T}. */' ;\ - cat ${.TARGET:R:S/$/.s/}) > ${.TARGET} - -sha256-ppc.S: sha512-ppc.pl - env CC=cc perl ${.ALLSRC} linux64le ${.TARGET:R:S/$/.s/} - ( echo '/* Do not modify. This file is auto-generated from ${.ALLSRC:T}. */' ;\ - cat ${.TARGET:R:S/$/.s/}) > ${.TARGET} - -sha256p8-ppc.S: sha512p8-ppc.pl - env CC=cc perl ${.ALLSRC} linux64le ${.TARGET:R:S/$/.s/} - ( echo '/* Do not modify. This file is auto-generated from ${.ALLSRC:T}. */' ;\ - cat ${.TARGET:R:S/$/.s/}) > ${.TARGET} - -.pl.S: - env CC=cc perl ${.IMPSRC} linux64le ${.TARGET:R:S/$/.s/} - ( echo '/* Do not modify. This file is auto-generated from ${.ALLSRC:T}. */' ;\ - cat ${.TARGET:R:S/$/.s/}) > ${.TARGET} - .endif .include diff --git a/secure/lib/libcrypto/Makefile.common b/secure/lib/libcrypto/Makefile.common index b109fd7f7f4..aaab95017ae 100644 --- a/secure/lib/libcrypto/Makefile.common +++ b/secure/lib/libcrypto/Makefile.common @@ -11,9 +11,6 @@ CFLAGS+= -DB_ENDIAN .if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64" || \ ${MACHINE_CPUARCH} == "arm" || ${MACHINE_CPUARCH} == "i386" ASM_${MACHINE_CPUARCH}= -.elif ${MACHINE_ARCH} == "powerpc" || ${MACHINE_ARCH} == "powerpc64" || \ - ${MACHINE_ARCH} == "powerpc64le" -ASM_${MACHINE_ARCH}= .endif .endif @@ -67,36 +64,6 @@ CFLAGS+= -DCMLL_ASM CFLAGS+= -DECP_NISTZ256_ASM CFLAGS+= -DPADLOCK_ASM CFLAGS+= -DPOLY1305_ASM -.elif defined(ASM_powerpc) -CFLAGS+= -DOPENSSL_BN_ASM_MONT -CFLAGS+= -DAES_ASM -CFLAGS+= -DVPAES_ASM -CFLAGS+= -DSHA1_ASM -CFLAGS+= -DSHA256_ASM -CFLAGS+= -DSHA512_ASM -CFLAGS+= -DPOLY1305_ASM -.elif defined(ASM_powerpc64) -CFLAGS+= -DOPENSSL_BN_ASM_MONT -CFLAGS+= -DAES_ASM -CFLAGS+= -DVPAES_ASM -CFLAGS+= -DSHA1_ASM -CFLAGS+= -DSHA256_ASM -CFLAGS+= -DSHA512_ASM -CFLAGS+= -DPOLY1305_ASM -CFLAGS+= -DECP_NISTZ256_ASM -CFLAGS+= -DX25519_ASM -CFLAGS+= -DKECCAK1600_ASM -.elif defined(ASM_powerpc64le) -CFLAGS+= -DOPENSSL_BN_ASM_MONT -CFLAGS+= -DAES_ASM -CFLAGS+= -DVPAES_ASM -CFLAGS+= -DSHA1_ASM -CFLAGS+= -DSHA256_ASM -CFLAGS+= -DSHA512_ASM -CFLAGS+= -DPOLY1305_ASM -CFLAGS+= -DECP_NISTZ256_ASM -CFLAGS+= -DX25519_ASM -CFLAGS+= -DKECCAK1600_ASM .endif .endif diff --git a/share/man/man4/Makefile b/share/man/man4/Makefile index 59b330b9cb8..03f57fd66f6 100644 --- a/share/man/man4/Makefile +++ b/share/man/man4/Makefile @@ -915,15 +915,6 @@ _vmm.4= vmm.4 .endif .endif -.if ${MACHINE_CPUARCH} == "mips" -_nvram2env.4= nvram2env.4 -.endif - -.if ${MACHINE_CPUARCH} == "powerpc" -_nvd.4= nvd.4 -_nvme.4= nvme.4 -.endif - .if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" || \ ${MACHINE_CPUARCH} == "aarch64" _gve.4= gve.4 diff --git a/share/man/man4/man4.powerpc/Makefile b/share/man/man4/man4.powerpc/Makefile deleted file mode 100644 index b2ddc0631e5..00000000000 --- a/share/man/man4/man4.powerpc/Makefile +++ /dev/null @@ -1,19 +0,0 @@ - -MAN= adb.4 \ - akbd.4 \ - abtn.4 \ - ams.4 \ - cuda.4 \ - dtsec.4 \ - llan.4 \ - ofw_console.4 \ - pmu.4 \ - powermac_nvram.4 \ - smu.4 \ - snd_ai2s.4 \ - snd_davbus.4 \ - tsec.4 - -MANSUBDIR=/powerpc - -.include diff --git a/share/man/man4/man4.powerpc/Makefile.depend b/share/man/man4/man4.powerpc/Makefile.depend deleted file mode 100644 index 11aba52f82c..00000000000 --- a/share/man/man4/man4.powerpc/Makefile.depend +++ /dev/null @@ -1,10 +0,0 @@ -# Autogenerated - do NOT edit! - -DIRDEPS = \ - - -.include - -.if ${DEP_RELDIR} == ${_DEP_RELDIR} -# local dependencies - needed for -jN in clean tree -.endif diff --git a/share/man/man4/man4.powerpc/abtn.4 b/share/man/man4/man4.powerpc/abtn.4 deleted file mode 100644 index 92d643d5cf3..00000000000 --- a/share/man/man4/man4.powerpc/abtn.4 +++ /dev/null @@ -1,113 +0,0 @@ -.\"- -.\" Copyright (c) 2011 Justin Hibbits -.\" Copyright (c) 2009 Nathan Whitehorn -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -.\" DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, -.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -.\" POSSIBILITY OF SUCH DAMAGE. -.\" -.Dd October 16, 2011 -.Dt ABTN 4 -.Os -.Sh NAME -.Nm abtn -.Nd ADB Keyboard Special Keys Driver -.Sh SYNOPSIS -To compile this driver into the kernel, -place the following lines in your -kernel configuration file: -.Bd -ragged -offset indent -.Cd "device adb" -.Ed -.Sh DESCRIPTION -The -.Nm -driver provides support for the extended Fn keys on Apple notebooks with an ADB -interface. -.Sh HARDWARE -The -.Nm -driver supports extended keyboard keys (special F-keys) on the following devices: -.Pp -.Bl -bullet -compact -.It -Apple iBook Keyboard -.It -Apple PowerBook Keyboard -.El -.Sh EVENTS -The -.Nm -driver sends events to -.Xr devd 8 -for the following events under the -.Cd PMU -system, and -.Cd keys -subsystem: -.Pp -.Bl -bullet -compact -.It -.Cd brightness -- Generates -.Cd up -and -.Cd down -notify types matching the pressed key. -.It -.Cd mute -.It -.Cd volume -- Generates -.Cd up -and -.Cd down -notify types matching the pressed key. -.It -.Cd eject -.El -.Pp -Examples are included in /etc/devd/apple.conf. -.Sh SEE ALSO -.Xr adb 4 , -.Xr akbd 4 , -.Xr cuda 4 , -.Xr pmu 4 , -.Xr devd 8 -.Sh HISTORY -The -.Nm -device driver first appeared in -.Nx 5.0 -and was ported to -.Fx 10.0 . -.Sh AUTHORS -.An -nosplit -The -.Nm -driver was written by -.An Tsubai Masanari -for -.Nx -and ported to -.Fx -by -.An Justin Hibbits . diff --git a/share/man/man4/man4.powerpc/adb.4 b/share/man/man4/man4.powerpc/adb.4 deleted file mode 100644 index a781787995a..00000000000 --- a/share/man/man4/man4.powerpc/adb.4 +++ /dev/null @@ -1,67 +0,0 @@ -.\"- -.\" Copyright (c) 2009 Nathan Whitehorn -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -.\" DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, -.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -.\" POSSIBILITY OF SUCH DAMAGE. -.\" -.Dd December 3, 2009 -.Dt ADB 4 -.Os -.Sh NAME -.Nm adb -.Nd Apple Desktop Bus -.Sh SYNOPSIS -To compile this driver into the kernel, -place the following lines in your -kernel configuration file: -.Bd -ragged -offset indent -.Cd "device adb" -.Ed -.Sh DESCRIPTION -The -.Nm -driver provides support for the Apple Desktop Bus, which is a simple -multi-drop bus used in general for input peripherals in older Apple -Macintosh hardware. -.Pp -The Apple Desktop Bus provides attachment for up to 16 devices, -including multiple devices of a single type, but not does support -hot-plugging. -.Sh SEE ALSO -Apple Tech Note HW01: ADB - The Untold Story: Space Aliens Ate My Mouse: -.Pa http://developer.apple.com/legacy/mac/library/technotes/hw/hw_01.html -.Pp -.Xr akbd 4 , -.Xr ams 4 , -.Xr cuda 4 , -.Xr pmu 4 -.Sh HISTORY -The -.Nm -device driver appeared in -.Fx 8.0 . -.Sh AUTHORS -.An -nosplit -The -.Nm -driver was written by -.An Nathan Whitehorn Aq Mt nwhitehorn@FreeBSD.org . diff --git a/share/man/man4/man4.powerpc/akbd.4 b/share/man/man4/man4.powerpc/akbd.4 deleted file mode 100644 index 44af0896112..00000000000 --- a/share/man/man4/man4.powerpc/akbd.4 +++ /dev/null @@ -1,102 +0,0 @@ -.\"- -.\" Copyright (c) 2009 Nathan Whitehorn -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -.\" DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, -.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -.\" POSSIBILITY OF SUCH DAMAGE. -.\" -.Dd December 3, 2009 -.Dt AKBD 4 -.Os -.Sh NAME -.Nm akbd -.Nd ADB Keyboard Driver -.Sh SYNOPSIS -To compile this driver into the kernel, -place the following lines in your -kernel configuration file: -.Bd -ragged -offset indent -.Cd "device adb" -.Ed -.Sh DESCRIPTION -The -.Nm -driver provides support for all keyboards attached to the Apple Desktop -Bus (ADB). -.Sh HARDWARE -Devices supported by the -.Nm -driver include: -.Pp -.Bl -bullet -compact -.It -Apple Extended Keyboard -.It -Apple Keyboard II -.It -Apple iBook Keyboard -.It -Apple PowerBook Keyboard -.El -.Sh EVENTS -The -.Nm -driver sends events to -.Xr devd 8 -for the following events under the -.Cd PMU -system: -.Pp -.Bl -bullet -compact -.It -Power button - -.Cd "Button" -subsystem, -.Cd "pressed" -type. -.El -.Sh SYSCTL VARIABLES -The -.Nm -driver supports the following sysctl variable for configuring the Fn keys: -.Bl -tag -width indent -.It Va dev.akbd.%d.fn_keys_function_as_primary -Set the Fn keys to be their F-key type as default. A value of 0 causes the -F-keys keys to work as special keys by default ( -.Xr abtn 4 ) -and a value of 1 sets them to behave as F-keys by default. -.El -.Sh SEE ALSO -.Xr abtn 4 , -.Xr adb 4 , -.Xr cuda 4 , -.Xr pmu 4 -.Sh HISTORY -The -.Nm -device driver appeared in -.Fx 8.0 . -.Sh AUTHORS -.An -nosplit -The -.Nm -driver was written by -.An Nathan Whitehorn Aq Mt nwhitehorn@FreeBSD.org . diff --git a/share/man/man4/man4.powerpc/ams.4 b/share/man/man4/man4.powerpc/ams.4 deleted file mode 100644 index 21be3c09892..00000000000 --- a/share/man/man4/man4.powerpc/ams.4 +++ /dev/null @@ -1,84 +0,0 @@ -.\"- -.\" Copyright (c) 2009 Nathan Whitehorn -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -.\" DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, -.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -.\" POSSIBILITY OF SUCH DAMAGE. -.\" -.Dd December 3, 2009 -.Dt AMS 4 -.Os -.Sh NAME -.Nm ams -.Nd ADB Mouse Driver -.Sh SYNOPSIS -To compile this driver into the kernel, -place the following lines in your -kernel configuration file: -.Bd -ragged -offset indent -.Cd "device adb" -.Ed -.Sh DESCRIPTION -The -.Nm -driver provides support for mice and trackpads attached to the Apple Desktop -Bus (ADB) implementing both the base and extended ADB mouse protocols. -.Sh HARDWARE -Devices supported by the -.Nm -driver include: -.Pp -.Bl -bullet -compact -.It -Apple Mouse -.It -ADB Extended Mouse -.It -MacAlly 2-Button Mouse -.It -Apple iBook Trackpad -.It -Apple PowerBook Trackpad -.El -.Sh SYSCTL VARIABLES -.Bl -tag -width indent -.It Va dev.ams.%d.tapping -On ADB trackpads, setting this sysctl to 1 causes taps on the trackpad to -be interpreted as button clicks. -.El -.Sh SEE ALSO -Apple Tech Note HW01: ADB - The Untold Story: Space Aliens Ate My Mouse: -.Pa http://developer.apple.com/legacy/mac/library/technotes/hw/hw_01.html -.Pp -.Xr adb 4 , -.Xr cuda 4 , -.Xr pmu 4 -.Sh HISTORY -The -.Nm -device driver appeared in -.Fx 8.0 . -.Sh AUTHORS -.An -nosplit -The -.Nm -driver was written by -.An Nathan Whitehorn Aq Mt nwhitehorn@FreeBSD.org . diff --git a/share/man/man4/man4.powerpc/cuda.4 b/share/man/man4/man4.powerpc/cuda.4 deleted file mode 100644 index 7171ebb4237..00000000000 --- a/share/man/man4/man4.powerpc/cuda.4 +++ /dev/null @@ -1,77 +0,0 @@ -.\"- -.\" Copyright (c) 2009 Nathan Whitehorn -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -.\" DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, -.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -.\" POSSIBILITY OF SUCH DAMAGE. -.\" -.Dd December 3, 2009 -.Dt CUDA 4 -.Os -.Sh NAME -.Nm cuda -.Nd Apple CUDA I/O Controller Driver -.Sh SYNOPSIS -To compile this driver into the kernel, -place the following lines in your -kernel configuration file: -.Bd -ragged -offset indent -.Cd "device adb" -.Cd "device cuda" -.Ed -.Sh DESCRIPTION -The -.Nm -driver provides support for the CUDA VIA (Versatile Interface Attachment) -chip found in pre-Core99 Apple hardware, such as the Power Macintosh G3. -.Pp -The Apple CUDA controller is a multi-purpose ASIC that provides power -control and an -.Xr adb 4 -interface. -.Sh HARDWARE -Chips supported by the -.Nm -driver include: -.Pp -.Bl -bullet -compact -.It -Apple CUDA I/O Controller -.El -.Sh SEE ALSO -.Xr adb 4 -.Sh HISTORY -The -.Nm -device driver appeared in -.Nx 4.0 , -and then in -.Fx 8.0 . -.Sh AUTHORS -.An -nosplit -The -.Nm -driver was written by -.An Michael Lorenz Aq Mt macallan@NetBSD.org -and ported to -.Fx -by -.An Nathan Whitehorn Aq Mt nwhitehorn@FreeBSD.org . diff --git a/share/man/man4/man4.powerpc/dtsec.4 b/share/man/man4/man4.powerpc/dtsec.4 deleted file mode 100644 index 4a60dd0b882..00000000000 --- a/share/man/man4/man4.powerpc/dtsec.4 +++ /dev/null @@ -1,117 +0,0 @@ -.\" -.\" Copyright (c) 2016 Justin Hibbits -.\" -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE DEVELOPERS ``AS IS'' AND ANY EXPRESS OR -.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -.\" IN NO EVENT SHALL THE DEVELOPERS BE LIABLE FOR ANY DIRECT, INDIRECT, -.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -.\" -.Dd October 31, 2017 -.Dt DTSEC 4 -.Os -.Sh NAME -.Nm dtsec -.Nd "Freescale Datapath Acceleration Architecture-based Three-Speed Ethernet Controller device driver" -.Sh SYNOPSIS -To compile this driver into the kernel, place the following lines in your -kernel configuration file: -.Bd -ragged -offset indent -.Cd "include ""dpaa/config.dpaa"" -.Cd "device dpaa" -.Cd "device miibus" -.Ed -.Sh DESCRIPTION -The -.Nm -driver provides support for the DPAA-based gigabit Ethernet controller -integrated in some of the Freescale system-on-chip devices. -.Pp -The -.Nm -driver supports the following media types: -.Bl -tag -width xxxxxxxxxxxxxxxxxxxx -.It autoselect -Enable autoselection of the media type and options -.It 10baseT/UTP -Set 10Mbps operation -.It 100baseTX -Set 100Mbps operation -.It 1000baseT -Set 1000baseT operation -.El -.Pp -The -.Nm -driver supports the following media options: -.Bl -tag -width xxxxxxxxxxxxxxxxxxxx -.It full-duplex -Set full duplex operation -.El -.Pp -The -.Nm -driver supports two operating modes: -.Bl -tag -width xxxxxxxxxxxxxxxxxxxx -.It Regular -Normal mode, utilizing the full datapath acceleration, Buffer Manager, and Queue -Manager. -.It Independent -Runs disconnected from the Buffer Manager and Queue Manager. -.El -.Sh HARDWARE -Gigabit Ethernet controllers built into the following Freescale -system-on-chip devices are known to work with the -.Nm -driver: -.Pp -.Bl -bullet -compact -.It -P2041, P3041 -.It -P5010, P5020 -.El -.Pp -Additionally, the following devices are expected to work, but are untested: -.Bl -bullet -compact -.It -P4080, P4040 -.It -P5040 -.El -.Sh SEE ALSO -.Xr altq 4 , -.Xr arp 4 , -.Xr miibus 4 , -.Xr netintro 4 , -.Xr ng_ether 4 , -.Xr ifconfig 8 -.Sh HISTORY -The -.Nm -device driver first appeared in -.Fx 11.0 . -.Sh AUTHORS -.An -nosplit -The base version of -.Nm -device driver was written by -.An Semihalf . -This manual page was written by -.An Justin Hibbits . diff --git a/share/man/man4/man4.powerpc/llan.4 b/share/man/man4/man4.powerpc/llan.4 deleted file mode 100644 index 45f08e7478d..00000000000 --- a/share/man/man4/man4.powerpc/llan.4 +++ /dev/null @@ -1,59 +0,0 @@ -.\"- -.\" Copyright (c) 2015 Nathan Whitehorn -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -.\" DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, -.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -.\" POSSIBILITY OF SUCH DAMAGE. -.\" -.Dd February 19, 2015 -.Dt LLAN 4 -.Os -.Sh NAME -.Nm llan -.Nd POWER Logical Lan -.Sh SYNOPSIS -To compile this driver into the kernel, -place the following lines in your -kernel configuration file: -.Bd -ragged -offset indent -.Cd "device llan" -.Ed -.Sh DESCRIPTION -The -.Nm -driver provides support for the inter-partition logical LAN controller -provided by PAPR-compliant POWER hypervisors (such as PowerVM and PowerKVM). -On some firmwares, advanced offload features are supported by the hypervisor, -but these are not currently supported by the driver. -.Sh SEE ALSO -.Xr vtnet 4 , -.Xr ifconfig 8 -.Sh HISTORY -The -.Nm -device driver appeared in -.Fx 10.0. -.Sh AUTHORS -.An -nosplit -The -.Nm -driver was written by -.An Nathan Whitehorn Aq Mt nwhitehorn@FreeBSD.org . diff --git a/share/man/man4/man4.powerpc/ofw_console.4 b/share/man/man4/man4.powerpc/ofw_console.4 deleted file mode 100644 index fca85a1ffa9..00000000000 --- a/share/man/man4/man4.powerpc/ofw_console.4 +++ /dev/null @@ -1,110 +0,0 @@ -.\"- -.\" Copyright (c) 2001 Miodrag Vallat. -.\" Copyright (c) 2005 Marius Strobl -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistribution of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -.\" -.\" from: OpenBSD: pcons.4,v 1.4 2003/06/02 16:16:26 miod Exp -.\" -.Dd January 16, 2021 -.Dt OFW_CONSOLE 4 powerpc -.Os -.Sh NAME -.Nm ofw_console -.Nd "Open Firmware console" -.Sh SYNOPSIS -.Cd "cpu AIM" -.Cd "options OFWCONS_POLL_HZ=N" -.Pp -.Cd "options KDB" -.Cd "options DDB" -.Cd "options ALT_BREAK_TO_DEBUGGER" -.Sh DESCRIPTION -The -.Nm -driver provides a simple text console, -using the Open Firmware services for input and output. -It will use the Open Firmware console devices set via the -.Va input-device -and -.Va output-device -variables. -.Pp -This driver is deprecated and only provided as a fallback console mechanism -if the real console hardware can not be driven by -.Fx . -.Pp -In case the -.Nm -console appears to work too slowly, its responsiveness probably can be improved -by including -.Cd "options OFWCONS_POLL_HZ=N" . -When omitted, -.Dv OFWCONS_POLL_HZ -defaults to 4. -For example, on -.Tn Sun Ultra 2 -a value of 20 or higher works best. -Too high values, on the other hand, can cause -.Nm -to unnecessarily consume CPU. -.Sh FILES -.Bl -tag -width ".Pa /dev/keyboard" -compact -.It Pa /dev/console -.It Pa /dev/keyboard -terminal input device in case the console input device is the keyboard -.It Pa /dev/screen -terminal output device in case the console output device is the screen -.It Pa /dev/tty[a-z] -terminal device in case both the console input and output device is tty[a-z] -.El -.Sh SEE ALSO -.Xr akbd 4 , -.Xr powermac_nvram 4 , -.Xr vt 4 -.Sh HISTORY -The -.Nm -driver first appeared in -.Fx 5.0 . -.Sh AUTHORS -The -.Nm -driver was written by -.An Benno Rice Aq Mt benno@FreeBSD.org . -.Sh CAVEATS -Since the Open Firmware will handle BREAK -(or Stop-A) -sequences before -.Nm , -the preferred way to enter -.Xr ddb 4 -when using -.Nm -is to include -.Cd "options ALT_BREAK_TO_DEBUGGER" -in a ddb-enabled kernel, and enter the alternate BREAK sequence -(RETURN TILDE CTRL-b). -.Sh BUGS -The -.Nm -driver also not attach to the hardware resources it actually talks to. diff --git a/share/man/man4/man4.powerpc/pmu.4 b/share/man/man4/man4.powerpc/pmu.4 deleted file mode 100644 index 6eac20cfa6b..00000000000 --- a/share/man/man4/man4.powerpc/pmu.4 +++ /dev/null @@ -1,114 +0,0 @@ -.\"- -.\" Copyright (c) 2008 Nathan Whitehorn -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -.\" DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, -.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -.\" POSSIBILITY OF SUCH DAMAGE. -.\" -.Dd December 6, 2008 -.Dt PMU 4 -.Os -.Sh NAME -.Nm pmu -.Nd Apple PMU99 Power Management Driver -.Sh SYNOPSIS -To compile this driver into the kernel, -place the following lines in your -kernel configuration file: -.Bd -ragged -offset indent -.Cd "device adb" -.Cd "device pmu" -.Ed -.Sh DESCRIPTION -The -.Nm -driver provides support for the Power Management Unit (PMU) found in Apple -Core99 hardware. -This includes late G3 laptops, all G4 machines, early G5 -desktops and all G5 XServes. -.Pp -The Apple PMU controller is a multi-purpose ASIC that provides power -management and thermal control, as well as an ADB bus for the internal -keyboard and mouse on laptops. -.Sh HARDWARE -Chips supported by the -.Nm -driver include: -.Pp -.Bl -bullet -compact -.It -Apple KeyLargo PMU -.It -Apple K2-KeyLargo PMU -.El -.Sh SYSCTL VARIABLES -The -.Nm -driver provides power management services in addition to an -.Xr adb 4 -interface. -The following sysctls can be used to control the -power management behavior and to examine current system power and -thermal conditions. -.Bl -tag -width indent -.It Va dev.pmu.%d.server_mode -Restart after power failure behavior (1 causes system to reboot after power -cut, 0 causes system to remain off). -.It Va dev.pmu.%d.batteries.%d.present -Indicates whether the relevant battery is inserted. -.It Va dev.pmu.%d.batteries.%d.charging -Indicates whether the battery is currently charging. -.It Va dev.pmu.%d.batteries.%d.charge -The current battery charge, in milliamp hours. -.It Va dev.pmu.%d.batteries.%d.maxcharge -The battery's self-reported maximum charge, in milliamp hours. -.It Va dev.pmu.%d.batteries.%d.rate -The current into the battery, in milliamps. -While the battery is discharging, -this will be negative. -.It Va dev.pmu.%d.batteries.%d.voltage -Battery voltage, in millivolts. -.It Va dev.pmu.%d.batteries.%d.time -Estimated time until full battery charge (or discharge), in minutes. -.It Va dev.pmu.%d.batteries.%d.life -Current fraction of the battery's maximum charge, in percent. -.El -.Sh SEE ALSO -.Xr acpi 4 , -.Xr adb 4 , -.Xr led 4 -.Sh HISTORY -The -.Nm -device driver appeared in -.Nx 4.0 , -and then in -.Fx 8.0 . -.Sh AUTHORS -.An -nosplit -The -.Nm -driver was written by -.An Michael Lorenz Aq Mt macallan@NetBSD.org -and ported to -.Fx -by -.An Nathan Whitehorn Aq Mt nwhitehorn@FreeBSD.org . diff --git a/share/man/man4/man4.powerpc/powermac_nvram.4 b/share/man/man4/man4.powerpc/powermac_nvram.4 deleted file mode 100644 index ed15cb79fea..00000000000 --- a/share/man/man4/man4.powerpc/powermac_nvram.4 +++ /dev/null @@ -1,65 +0,0 @@ -.\"- -.\" Copyright (c) 2006 Maxim Sobolev -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -.\" DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, -.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -.\" POSSIBILITY OF SUCH DAMAGE. -.\" -.Dd June 19, 2020 -.Dt POWERMAC_NVRAM 4 powerpc -.Os -.Sh NAME -.Nm powermac_nvram -.Nd "non-volatile RAM" -.Sh SYNOPSIS -To compile this driver into the kernel, -place the following line in your -kernel configuration file: -.Bd -ragged -offset indent -.Cd "device powermac_nvram" -.Ed -.Pp -Alternatively, to load the driver as a -module at boot time, place the following line in -.Xr loader.conf 5 : -.Bd -literal -offset indent -powermac_nvram_load="YES" -.Ed -.Sh DESCRIPTION -The -.Nm -driver provides access to the Open Firmware configuration NVRAM -available on the Apple PowerPC-based machines. -.Pp -This driver currently supports "Core99" machines containing a Sharp, Micron, -or AMD NVRAM. -.Sh SEE ALSO -.Xr nvram 8 -.Sh HISTORY -The -.Nm -driver first appeared in -.Fx 7.0 . -.Sh AUTHORS -The -.Nm -driver was written by -.An Maxim Sobolev Aq Mt sobomax@FreeBSD.org . diff --git a/share/man/man4/man4.powerpc/smu.4 b/share/man/man4/man4.powerpc/smu.4 deleted file mode 100644 index ef2654746e6..00000000000 --- a/share/man/man4/man4.powerpc/smu.4 +++ /dev/null @@ -1,124 +0,0 @@ -.\"- -.\" Copyright (c) 2010 Nathan Whitehorn -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -.\" DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, -.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -.\" POSSIBILITY OF SUCH DAMAGE. -.\" -.Dd February 22, 2010 -.Dt SMU 4 -.Os -.Sh NAME -.Nm smu -.Nd Apple System Management Unit Driver -.Sh SYNOPSIS -To compile this driver into the kernel, -place the following lines in your -kernel configuration file: -.Bd -ragged -offset indent -.Cd "device smu" -.Ed -.Sh DESCRIPTION -The -.Nm -driver provides support for the System Management Unit (SMU) found in many -Apple G5 systems. -This includes most Power Macintosh G5 and all iMac G5 systems. -.Pp -The Apple SMU controller provides software power management and thermal -control functionality, and is responsible for managing system cooling -devices. -.Sh HARDWARE -Chips supported by the -.Nm -driver include: -.Pp -.Bl -bullet -compact -.It -Apple System Management Unit -.El -.Sh THERMAL MANAGEMENT -The -.Nm -driver provides basic automatic thermal management. -Without a userspace daemon providing more advanced control, the driver will -attempt to maintain system temperatures in a conservative range through -coarse-grained control of system cooling devices (see below). -Automatic kernel-level thermal control will take over if more than 3 -seconds elapses between userspace cooling setting adjustments. -.Sh SYSCTL VARIABLES -The -.Nm -driver provides power management services and thermal readout through a -sysctl interface. -The following sysctls can be used to control the power management behavior -and to examine current system power and thermal conditions. -.Bl -tag -width indent -.It Va dev.smu.%d.server_mode -Restart after power failure behavior (1 causes system to reboot after power -cut, 0 causes system to remain off). -.It Va dev.smu.%d.target_temp -Target system temperature, in degrees Celsius. -The -.Nm -driver will attempt to adjust fans to maintain the temperature of the -warmest component in the system at or below this level. -.It Va dev.smu.%d.critical_temp -System critical temperature, in degrees Celsius. -If any component in the system exceeds this temperature, the machine -will be shut down within 500 ms. -.It Va dev.smu.%d.fans.%s.minrpm -Minimum allowed speed for this fan. -.It Va dev.smu.%d.fans.%s.maxrpm -Maximum allowed speed for this fan. -.It Va dev.smu.%d.fans.%s.rpm -Current speed for this fan. -The fan speed can be adjusted by changing this sysctl. -If more than 3 seconds elapses between fan speed adjustments, the kernel will -resume automatic control of the fan. -.It Va dev.smu.%d.sensors.%s -Current reading from this sensor. -Four sensor types are supported. -Temperature sensors are in units of degrees Celsius, current sensors in -milliamps, voltage sensors in millivolts, and power sensors in milliwatts. -.El -.Sh LED INTERFACE -The -.Nm -driver provides an -.Xr led 4 -annunciator interface at -.Pa /dev/led/sleepled . -.Sh SEE ALSO -.Xr acpi 4 , -.Xr led 4 , -.Xr pmu 4 -.Sh HISTORY -The -.Nm -device driver appeared in -.Fx 8.0 . -.Sh AUTHORS -.An -nosplit -The -.Nm -driver was written by -.An Nathan Whitehorn Aq Mt nwhitehorn@FreeBSD.org . diff --git a/share/man/man4/man4.powerpc/snd_ai2s.4 b/share/man/man4/man4.powerpc/snd_ai2s.4 deleted file mode 100644 index 3880751e65c..00000000000 --- a/share/man/man4/man4.powerpc/snd_ai2s.4 +++ /dev/null @@ -1,86 +0,0 @@ -.\"- -.\" Copyright (c) 2009 Nathan Whitehorn -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -.\" DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, -.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -.\" POSSIBILITY OF SUCH DAMAGE. -.\" -.Dd January 20, 2009 -.Dt SND_AI2S 4 -.Os -.Sh NAME -.Nm snd_ai2s -.Nd "Apple I2S audio device driver" -.Sh SYNOPSIS -To compile this driver into the kernel, -place the following lines in your -kernel configuration file: -.Bd -ragged -offset indent -.Cd "device sound" -.Cd "device snd_ai2s" -.Ed -.Pp -Alternatively, to load the driver as a -module at boot time, place the following line in -.Xr loader.conf 5 : -.Bd -literal -offset indent -snd_ai2s_load="YES" -.Ed -.Sh DESCRIPTION -The -.Nm -driver provides support for the Apple I2S audio controllers found -predominantly in G4 and G5 machines, along with the snapper and tumbler -codecs. Some machines (e.g. the Mac Mini) do not have configurable -codecs and so lack hardware volume control. -.Sh HARDWARE -Chips supported by the -.Nm -driver include: -.Pp -.Bl -bullet -compact -.It -Apple Tumbler Audio -.It -Apple Snapper Audio -.El -.Sh SEE ALSO -.Xr snd_davbus 4 , -.Xr sound 4 -.Sh HISTORY -The -.Nm -device driver appeared in -.Nx 2.0 -and then in -.Fx 8.0 . -.Sh AUTHORS -.An -nosplit -The -.Nm -driver was written by -.An Tsubai Masanari Aq Mt tsubai@netbsd.org , -and ported to -.Fx -by -.An Marco Trillo Aq Mt marcotrillo@gmail.com . -.Sh BUGS -Recording and operation with non-44.1 Khz audio are not currently supported. diff --git a/share/man/man4/man4.powerpc/snd_davbus.4 b/share/man/man4/man4.powerpc/snd_davbus.4 deleted file mode 100644 index 6958ebd4b4b..00000000000 --- a/share/man/man4/man4.powerpc/snd_davbus.4 +++ /dev/null @@ -1,78 +0,0 @@ -.\"- -.\" Copyright (c) 2009 Nathan Whitehorn -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -.\" DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, -.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -.\" POSSIBILITY OF SUCH DAMAGE. -.\" -.Dd January 20, 2009 -.Dt SND_DAVBUS 4 -.Os -.Sh NAME -.Nm snd_davbus -.Nd "Apple Davbus audio device driver" -.Sh SYNOPSIS -To compile this driver into the kernel, -place the following lines in your -kernel configuration file: -.Bd -ragged -offset indent -.Cd "device sound" -.Cd "device snd_davbus" -.Ed -.Pp -Alternatively, to load the driver as a -module at boot time, place the following line in -.Xr loader.conf 5 : -.Bd -literal -offset indent -snd_davbus_load="YES" -.Ed -.Sh DESCRIPTION -The -.Nm -driver provides support for the Apple Davbus audio controllers found in -many G3-era Apple machines. -.Sh HARDWARE -Chips supported by the -.Nm -driver include: -.Pp -.Bl -bullet -compact -.It -Apple Burgundy Audio -.It -Apple Screamer Audio -.El -.Sh SEE ALSO -.Xr snd_ai2s 4 , -.Xr sound 4 -.Sh HISTORY -The -.Nm -device driver appeared in -.Fx 8.0 . -.Sh AUTHORS -.An -nosplit -The -.Nm -driver was written by -.An Marco Trillo Aq Mt marcotrillo@gmail.com . -.Sh BUGS -Recording is not currently supported. diff --git a/share/man/man4/man4.powerpc/tsec.4 b/share/man/man4/man4.powerpc/tsec.4 deleted file mode 100644 index b3ccae648ab..00000000000 --- a/share/man/man4/man4.powerpc/tsec.4 +++ /dev/null @@ -1,157 +0,0 @@ -.\" -.\" Copyright (c) 2009 Semihalf, Rafal Jaworowski -.\" -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE DEVELOPERS ``AS IS'' AND ANY EXPRESS OR -.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -.\" IN NO EVENT SHALL THE DEVELOPERS BE LIABLE FOR ANY DIRECT, INDIRECT, -.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -.\" -.Dd February 20, 2015 -.Dt TSEC 4 -.Os -.Sh NAME -.Nm tsec -.Nd "Freescale Three-Speed Ethernet Controller device driver" -.Sh SYNOPSIS -To compile this driver into the kernel, place the following lines in your -kernel configuration file: -.Bd -ragged -offset indent -.Cd "device tsec" -.Cd "device miibus" -.Ed -.Sh DESCRIPTION -The -.Nm -driver provides support for the gigabit Ethernet controller integrated in -some of the Freescale system-on-chip devices. -.Pp -The -.Nm -driver supports the following media types: -.Bl -tag -width xxxxxxxxxxxxxxxxxxxx -.It autoselect -Enable autoselection of the media type and options -.It 10baseT/UTP -Set 10Mbps operation -.It 100baseTX -Set 100Mbps operation -.It 1000baseT -Set 1000baseT operation -.El -.Pp -The -.Nm -driver supports the following media options: -.Bl -tag -width xxxxxxxxxxxxxxxxxxxx -.It full-duplex -Set full duplex operation -.El -.Pp -The -.Nm -driver supports polled operation when the system is configured with -DEVICE_POLLING kernel option, see -.Xr polling 4 -for more details. -.Pp -The -.Nm -driver supports reception and transmission of extended frames -for -.Xr vlan 4 . -This capability of -.Nm -can be controlled by means of the -.Cm vlanmtu -parameter -to -.Xr ifconfig 8 . -.Pp -The -.Nm -driver supports interrupts coalescing (IC) so that raising a transmit/receive -frame interrupt is delayed, if possible, until a threshold-defined period of -time has elapsed, or a threshold-defined frame counter has been reached -(whichever occurs first). -The following sysctls regulate this behaviour: -.Bl -tag -width indent -.It Va dev.tsec.X.int_coal.rx_time -.It Va dev.tsec.X.int_coal.rx_count -.It Va dev.tsec.X.int_coal.tx_time -.It Va dev.tsec.X.int_coal.tx_count -.Pp -Value of 0 for either time or count disables IC on the given path. -Time value -1-65535 corresponds to a real time period and is expressed in units equivalent -to 64 ticks of the TSEC clock. -Count 1-255 represents the number of frames -(note that value of 1 is equivalent to IC disabled). -User provided values -larger than supported will be trimmed to the maximum supported. -More details -are available in the reference manual of the device. -.El -.Sh HARDWARE -Gigabit Ethernet controllers built into the following Freescale -system-on-chip devices are known to work with the -.Nm -driver: -.Pp -.Bl -bullet -compact -.It -MPC8349 -.It -MPC8533, MPC8541, MPC8555 -.El -.Pp -The enhanced version of the controller (eTSEC), integrated in the following -devices, is also supported by this driver: -.Pp -.Bl -bullet -compact -.It -MPC8548, MPC8572 -.El -.Sh SEE ALSO -.Xr altq 4 , -.Xr arp 4 , -.Xr miibus 4 , -.Xr netintro 4 , -.Xr ng_ether 4 , -.Xr polling 4 , -.Xr vlan 4 , -.Xr ifconfig 8 -.Sh HISTORY -The -.Nm -device driver first appeared in -.Fx 8.0 . -.Sh AUTHORS -.An -nosplit -The base version of -.Nm -device driver was written by -.An Piotr Kruszynski . -It has been extended with polling and interrupt coalescing support by -.An Rafal Jaworowski . -It has been further enhanced with multicast, h/w checksum calculation and vlan -support by -.An Piotr Ziecik . -This manual page was written by -.An Rafal Jaworowski . diff --git a/share/man/man4/smp.4 b/share/man/man4/smp.4 index a02d69b0dc4..a4fdc1d88c5 100644 --- a/share/man/man4/smp.4 +++ b/share/man/man4/smp.4 @@ -59,7 +59,7 @@ Setting this tunable to 1 will result in the corresponding CPU being disabled. .Pp .Fx -supports simultaneous multithreading on x86 and powerpc platforms. +supports simultaneous multithreading on x86 platforms. On x86, the logical CPUs can be disabled by setting the .Va machdep.hyperthreading_allowed tunable to zero. @@ -116,7 +116,7 @@ tasks on CPUs that are closely grouped together. Support for multi-processor systems is present for all Tier-1 and Tier-2 architectures on .Fx . -Currently, this includes x86, powerpc, mips, arm and arm64. +Currently, this includes x86, arm, arm64, and riscv. Support is enabled using .Cd options SMP . It is permissible to use the SMP kernel configuration on non-SMP hardware. @@ -164,9 +164,6 @@ The SMPng Project relied heavily on the support of BSDi, who provided reference source code from the fine-grained SMP implementation found in .Bsx . -.Pp -.Fx 5.0 -also introduced support for SMP on the sparc64 architecture. .Sh AUTHORS .An Steve Passe Aq Mt fsmp@FreeBSD.org .Sh CAVEATS diff --git a/share/man/man5/src.conf.5 b/share/man/man5/src.conf.5 index eb501901008..80d5e4df3cd 100644 --- a/share/man/man5/src.conf.5 +++ b/share/man/man5/src.conf.5 @@ -1,5 +1,6 @@ .\" DO NOT EDIT-- this file is @generated by tools/build/options/makeman. -.Dd December 21, 2025 +.\" $FreeBSD$ +.Dd September 4, 2026 .Dt SRC.CONF 5 .Os .Sh NAME @@ -108,6 +109,12 @@ Do not build .Xr apm 8 , .Xr apmd 8 and related programs. +.It Va WITHOUT_ASH +.\" $MidnightBSD$ +.\"$MidnightBSD$ +Set to not build and install +.Pa /bin/sh +as mksh and use ash instead. .It Va WITHOUT_ASSERT_DEBUG Compile programs and libraries without the .Xr assert 3 @@ -320,6 +327,8 @@ When set, it enforces these options: .Va WITHOUT_LOADER_ZFS .It .Va WITHOUT_ZFS +.It +.Va WITHOUT_ZFS_TESTS .El .It Va WITHOUT_CLANG Do not build the Clang C/C++ compiler during the regular phase of the build. @@ -406,13 +415,11 @@ When set, it enforces these options: .It .Va WITHOUT_PKGBOOTSTRAP .It -.Va WITHOUT_SVN -.It -.Va WITHOUT_SVNLITE -.It .Va WITHOUT_UNBOUND .It .Va WITHOUT_ZFS +.It +.Va WITHOUT_ZFS_TESTS .El .Pp When set, these options are also in effect: @@ -434,13 +441,13 @@ Do not build .Xr cxgbetool 8 .Pp This is a default setting on -arm/armv6, arm/armv7, mips/mips, mips/mips64, powerpc/powerpc, riscv/riscv64 and riscv/riscv64sf. +arm/armv6, arm/armv7, riscv/riscv64 and riscv/riscv64sf. .It Va WITH_CXGBETOOL Build .Xr cxgbetool 8 .Pp This is a default setting on -amd64/amd64, arm64/aarch64, i386/i386 and powerpc/powerpc64. +amd64/amd64, arm64/aarch64 and i386/i386. .It Va WITHOUT_CXX Do not build C++ headers and runtime libraries. It also prevents building binaries and libraries written in C++, including @@ -478,6 +485,8 @@ When set, it enforces these options: .Va WITHOUT_PMC .It .Va WITHOUT_TESTS +.It +.Va WITHOUT_ZFS_TESTS .El .It Va WITHOUT_DEBUG_FILES Avoid building or installing standalone debug files for each @@ -607,17 +616,6 @@ Set not to build .Xr efivar 3 and .Xr efivar 8 . -.Pp -This is a default setting on -mips/mips, mips/mips64, powerpc/powerpc and powerpc/powerpc64. -.It Va WITH_EFI -Build -.Xr efivar 3 -and -.Xr efivar 8 . -.Pp -This is a default setting on -amd64/amd64, arm/armv6, arm/armv7, arm64/aarch64, i386/i386, riscv/riscv64 and riscv/riscv64sf. .It Va WITHOUT_ELFTOOLCHAIN_BOOTSTRAP Do not build ELF Tool Chain tools (addr2line, nm, size, strings and strip) @@ -639,12 +637,6 @@ This includes the device tree compiler (dtc) and libfdt support library. Do not build .Xr file 1 and related programs. -When set, it enforces these options: -.Pp -.Bl -item -compact -.It -.Va WITHOUT_SVNLITE -.El .It Va WITHOUT_FINGER Do not build or install .Xr finger 1 @@ -667,9 +659,6 @@ Build bootloaders without Forth support. Build .Nm libc without floating-point support. -.It Va WITHOUT_FREEBSD_UPDATE -Do not build -.Xr freebsd-update 8 . .It Va WITHOUT_FTP Do not build or install .Xr ftp 1 @@ -683,25 +672,11 @@ Install the traditional FreeBSD and .Xr dc 1 programs instead of the enhanced versions. -.It Va WITHOUT_GNU_DIFF -Do not build GNU -.Xr diff3 1 . .It Va WITHOUT_GOOGLETEST Neither build nor install .Lb libgmock , .Lb libgtest , and dependent tests. -.Pp -This is a default setting on -mips/mips and mips/mips64. -.It Va WITH_GOOGLETEST -Build and install -.Lb libgmock , -.Lb libgtest , -and dependent tests. -.Pp -This is a default setting on -amd64/amd64, arm/armv6, arm/armv7, arm64/aarch64, i386/i386, powerpc/powerpc, powerpc/powerpc64, riscv/riscv64 and riscv/riscv64sf. .It Va WITHOUT_GPIO Do not build .Xr gpioctl 8 @@ -720,7 +695,7 @@ Do not build HTML docs. Do not build or install HyperV utilities. .Pp This is a default setting on -arm/armv6, arm/armv7, arm64/aarch64, mips/mips, mips/mips64, powerpc/powerpc, powerpc/powerpc64, riscv/riscv64 and riscv/riscv64sf. +arm/armv6, arm/armv7, arm64/aarch64, riscv/riscv64 and riscv/riscv64sf. .It Va WITH_HYPERV Build or install HyperV utilities. .Pp @@ -881,7 +856,7 @@ On 64-bit platforms, do not build 32-bit library set and a runtime linker. .Pp This is a default setting on -arm/armv6, arm/armv7, arm64/aarch64, i386/i386, mips/mips, powerpc/powerpc, riscv/riscv64 and riscv/riscv64sf. +arm/armv6, arm/armv7, arm64/aarch64, i386/i386, riscv/riscv64 and riscv/riscv64sf. .It Va WITH_LIBSOFT On armv6 only, enable soft float ABI compatibility libraries. This option is for transitioning to the new hard float ABI. @@ -891,12 +866,12 @@ Do not build LLVM's lld linker. Do not build the LLDB debugger. .Pp This is a default setting on -arm/armv6, arm/armv7, mips/mips, mips/mips64, riscv/riscv64 and riscv/riscv64sf. +arm/armv6, arm/armv7, riscv/riscv64 and riscv/riscv64sf. .It Va WITH_LLDB Build the LLDB debugger. .Pp This is a default setting on -amd64/amd64, arm64/aarch64, i386/i386, powerpc/powerpc and powerpc/powerpc64. +amd64/amd64, arm64/aarch64 and i386/i386. .It Va WITHOUT_LLD_BOOTSTRAP Do not build the LLD linker during the bootstrap phase of the build. @@ -947,14 +922,6 @@ is set explicitly) (unless .Va WITH_LLVM_TARGET_ARM is set explicitly) -.It Va WITHOUT_LLVM_TARGET_MIPS -(unless -.Va WITH_LLVM_TARGET_MIPS -is set explicitly) -.It Va WITHOUT_LLVM_TARGET_POWERPC -(unless -.Va WITH_LLVM_TARGET_POWERPC -is set explicitly) .It Va WITHOUT_LLVM_TARGET_RISCV (unless .Va WITH_LLVM_TARGET_RISCV @@ -970,13 +937,13 @@ Build LLVM target support for BPF. The .Va LLVM_TARGET_ALL option should be used rather than this in most cases. -.It Va WITHOUT_LLVM_TARGET_MIPS -Do not build LLVM target support for MIPS. +.It Va WITH_LLVM_TARGET_MIPS +Build LLVM target support for MIPS. The .Va LLVM_TARGET_ALL option should be used rather than this in most cases. -.It Va WITHOUT_LLVM_TARGET_POWERPC -Do not build LLVM target support for PowerPC. +.It Va WITH_LLVM_TARGET_POWERPC +Build LLVM target support for PowerPC. The .Va LLVM_TARGET_ALL option should be used rather than this in most cases. @@ -999,34 +966,10 @@ Enable firewire support in /boot/loader on x86. This option is a nop on all other platforms. .It Va WITHOUT_LOADER_GELI Disable inclusion of GELI crypto support in the boot chain binaries. -.Pp -This is a default setting on -powerpc/powerpc and powerpc/powerpc64. -.It Va WITH_LOADER_GELI -Build GELI bootloader support. -.Pp -This is a default setting on -amd64/amd64, arm/armv6, arm/armv7, arm64/aarch64, i386/i386, mips/mips, mips/mips64, riscv/riscv64 and riscv/riscv64sf. .It Va WITHOUT_LOADER_LUA Do not build LUA bindings for the boot loader. -.Pp -This is a default setting on -powerpc/powerpc and powerpc/powerpc64. -.It Va WITH_LOADER_LUA -Build LUA bindings for the boot loader. -.Pp -This is a default setting on -amd64/amd64, arm/armv6, arm/armv7, arm64/aarch64, i386/i386, mips/mips, mips/mips64, riscv/riscv64 and riscv/riscv64sf. -.It Va WITHOUT_LOADER_OFW -Disable building of openfirmware bootloader components. -.Pp -This is a default setting on -amd64/amd64, arm/armv6, arm/armv7, arm64/aarch64, i386/i386, mips/mips, mips/mips64, riscv/riscv64 and riscv/riscv64sf. .It Va WITH_LOADER_OFW Build openfirmware bootloader components. -.Pp -This is a default setting on -powerpc/powerpc and powerpc/powerpc64. .It Va WITHOUT_LOADER_UBOOT Disable building of ubldr. .Pp @@ -1036,7 +979,7 @@ amd64/amd64, arm64/aarch64, i386/i386, riscv/riscv64 and riscv/riscv64sf. Build ubldr. .Pp This is a default setting on -arm/armv6, arm/armv7, mips/mips, mips/mips64, powerpc/powerpc and powerpc/powerpc64. +arm/armv6 and arm/armv7. .It Va WITH_LOADER_VERBOSE Build with extra verbose debugging in the loader. May explode already nearly too large loader over the limit. @@ -1200,18 +1143,21 @@ This must be set in the environment, make command line, or .Pa /etc/src-env.conf , not .Pa /etc/src.conf . +.It Va WITHOUT_MIDNIGHTBSD_UPDATE +Set to not build +.Xr midnightbsd-update 8 . .It Va WITHOUT_MLX5TOOL Do not build .Xr mlx5tool 8 .Pp This is a default setting on -arm/armv6, arm/armv7, mips/mips, mips/mips64, powerpc/powerpc, riscv/riscv64 and riscv/riscv64sf. +arm/armv6, arm/armv7, riscv/riscv64 and riscv/riscv64sf. .It Va WITH_MLX5TOOL Build .Xr mlx5tool 8 .Pp This is a default setting on -amd64/amd64, arm64/aarch64, i386/i386 and powerpc/powerpc64. +amd64/amd64, arm64/aarch64 and i386/i386. .It Va WITHOUT_NDIS Set to not build programs and libraries related to NDIS emulation support. @@ -1276,12 +1222,12 @@ and related programs. Do not build nvme related tools and kernel modules. .Pp This is a default setting on -arm/armv6, arm/armv7, mips/mips, mips/mips64, powerpc/powerpc, riscv/riscv64 and riscv/riscv64sf. +arm/armv6, arm/armv7, riscv/riscv64 and riscv/riscv64sf. .It Va WITH_NVME Build nvme related tools and kernel modules. .Pp This is a default setting on -amd64/amd64, arm64/aarch64, i386/i386 and powerpc/powerpc64. +amd64/amd64, arm64/aarch64 and i386/i386. .It Va WITHOUT_OFED Disable the build of the .Dq "OpenFabrics Enterprise Distribution" @@ -1302,12 +1248,12 @@ Enable building LDAP support for kerberos using an openldap client from ports. Do not build LLVM's OpenMP runtime. .Pp This is a default setting on -arm/armv6, arm/armv7, mips/mips, mips/mips64 and powerpc/powerpc. +arm/armv6 and arm/armv7. .It Va WITH_OPENMP Build LLVM's OpenMP runtime. .Pp This is a default setting on -amd64/amd64, arm64/aarch64, i386/i386, powerpc/powerpc64, riscv/riscv64 and riscv/riscv64sf. +amd64/amd64, arm64/aarch64, i386/i386, riscv/riscv64 and riscv/riscv64sf. .It Va WITHOUT_OPENSSH Do not build OpenSSH. .It Va WITHOUT_OPENSSL @@ -1332,13 +1278,11 @@ When set, it enforces these options: .It .Va WITHOUT_PKGBOOTSTRAP .It -.Va WITHOUT_SVN -.It -.Va WITHOUT_SVNLITE -.It .Va WITHOUT_UNBOUND .It .Va WITHOUT_ZFS +.It +.Va WITHOUT_ZFS_TESTS .El .Pp When set, these options are also in effect: @@ -1353,7 +1297,7 @@ is set explicitly) Do not include kernel TLS support in OpenSSL. .Pp This is a default setting on -arm/armv6, arm/armv7, i386/i386, mips/mips, mips/mips64, powerpc/powerpc, powerpc/powerpc64, riscv/riscv64 and riscv/riscv64sf. +arm/armv6, arm/armv7, i386/i386, riscv/riscv64 and riscv/riscv64sf. .It Va WITH_OPENSSL_KTLS Include kernel TLS support in OpenSSL. .Pp @@ -1407,17 +1351,6 @@ and related programs. .It Va WITHOUT_PROFILE Do not build profiled libraries for use with .Xr gprof 8 . -.Pp -This is a default setting on -mips/mips64. -.It Va WITH_PROFILE -Build profiled libraries for use with -.Xr gprof 8 . -This option is deprecated and may not be present in a future version of -.Fx . -.Pp -This is a default setting on -amd64/amd64, arm/armv6, arm/armv7, arm64/aarch64, i386/i386, mips/mips, powerpc/powerpc, powerpc/powerpc64, riscv/riscv64 and riscv/riscv64sf. .It Va WITHOUT_PTHREADS_ASSERTIONS Disable debugging assertions in pthreads library. .It Va WITHOUT_QUOTAS @@ -1517,14 +1450,6 @@ When set, it enforces these options: .El .It Va WITHOUT_SSP Do not build world with stack smashing protection. -.Pp -This is a default setting on -mips/mips and mips/mips64. -.It Va WITH_SSP -Build world with stack smashing protection. -.Pp -This is a default setting on -amd64/amd64, arm/armv6, arm/armv7, arm64/aarch64, i386/i386, powerpc/powerpc, powerpc/powerpc64, riscv/riscv64 and riscv/riscv64sf. .It Va WITH_STAGING Enable staging of files to a stage tree. This can be best thought of as auto-install to @@ -1559,15 +1484,6 @@ Check staged files are not stale. Neither build nor install .Lb libstats and dependent binaries. -.It Va WITH_SVN -Install -.Xr svnlite 1 -as -.Xr svn 1 . -.It Va WITH_SVNLITE -Build -.Xr svnlite 1 -and related programs. .It Va WITHOUT_SYSCONS Do not build .Xr syscons 4 @@ -1637,6 +1553,8 @@ When set, it enforces these options: .Bl -item -compact .It .Va WITHOUT_DTRACE_TESTS +.It +.Va WITHOUT_ZFS_TESTS .El .Pp When set, these options are also in effect: @@ -1786,6 +1704,14 @@ or .Xr zfs 8 . Also disable ZFS support in utilities and libraries which implement ZFS-specific functionality. +When set, it enforces these options: +.Pp +.Bl -item -compact +.It +.Va WITHOUT_ZFS_TESTS +.El +.It Va WITHOUT_ZFS_TESTS +Do not build and install the legacy ZFS test suite. .It Va WITHOUT_ZONEINFO Do not build the timezone database. When set, it enforces these options: diff --git a/share/man/man7/arch.7 b/share/man/man7/arch.7 index b70f5f395de..d2faad8e6ff 100644 --- a/share/man/man7/arch.7 +++ b/share/man/man7/arch.7 @@ -66,13 +66,7 @@ and .Vt ptrdiff_t should be avoided. .Pp -On some architectures, e.g., -.Dv powerpc -and AIM variants of -.Dv powerpc64 , -the kernel uses a separate address space. -On other architectures, kernel and a user mode process share a -single address space. +The kernel and a user mode process share a single address space. The kernel is located at the highest addresses. .Pp On each architecture, the main user mode thread's stack starts near @@ -95,23 +89,9 @@ architectures, the final release. .It armv7 Ta 12.0 .It ia64 Ta 5.0 Ta 10.4 .It i386 Ta 1.0 -.It mips Ta 8.0 Ta 13.x -.It mipsel Ta 9.0 Ta 13.x -.It mipselhf Ta 12.0 Ta 13.x -.It mipshf Ta 12.0 Ta 13.x -.It mipsn32 Ta 9.0 Ta 13.x -.It mips64 Ta 9.0 Ta 13.x -.It mips64el Ta 9.0 Ta 13.x -.It mips64elhf Ta 12.0 Ta 13.x -.It mips64hf Ta 12.0 Ta 13.x .It pc98 Ta 2.2 Ta 11.4 -.It powerpc Ta 6.0 -.It powerpcspe Ta 12.0 -.It powerpc64 Ta 6.0 -.It powerpc64le Ta 13.0 .It riscv64 Ta 12.0 .It riscv64sf Ta 12.0 -.It sparc64 Ta 5.0 Ta 12.x .El .Ss Type sizes All @@ -148,11 +128,9 @@ execution environment is accompanied by the .Dv ILP32 environment, which was the historical 32-bit predecessor for 64-bit evolution. Examples are: -.Bl -column -offset indent "powerpc64" "ILP32 counterpart" +.Bl -column -offset indent "aarch64" "ILP32 counterpart" .It Sy LP64 Ta Sy ILP32 counterpart .It Dv amd64 Ta Dv i386 -.It Dv powerpc64 Ta Dv powerpc -.It Dv mips64* Ta Dv mips* .It Dv aarch64 Ta Dv armv6/armv7 .El .Pp @@ -193,19 +171,6 @@ Machine-dependent type sizes: .It armv6 Ta 4 Ta 8 Ta 8 .It armv7 Ta 4 Ta 8 Ta 8 .It i386 Ta 4 Ta 12 Ta 4 -.It mips Ta 4 Ta 8 Ta 8 -.It mipsel Ta 4 Ta 8 Ta 8 -.It mipselhf Ta 4 Ta 8 Ta 8 -.It mipshf Ta 4 Ta 8 Ta 8 -.It mipsn32 Ta 4 Ta 8 Ta 8 -.It mips64 Ta 8 Ta 8 Ta 8 -.It mips64el Ta 8 Ta 8 Ta 8 -.It mips64elhf Ta 8 Ta 8 Ta 8 -.It mips64hf Ta 8 Ta 8 Ta 8 -.It powerpc Ta 4 Ta 8 Ta 8 -.It powerpcspe Ta 4 Ta 8 Ta 8 -.It powerpc64 Ta 8 Ta 8 Ta 8 -.It powerpc64le Ta 8 Ta 8 Ta 8 .It riscv64 Ta 8 Ta 16 Ta 8 .It riscv64sf Ta 8 Ta 16 Ta 8 .El @@ -220,19 +185,6 @@ is 8 bytes on all supported architectures except i386. .It armv6 Ta little Ta unsigned .It armv7 Ta little Ta unsigned .It i386 Ta little Ta signed -.It mips Ta big Ta signed -.It mipsel Ta little Ta signed -.It mipselhf Ta little Ta signed -.It mipshf Ta big Ta signed -.It mipsn32 Ta big Ta signed -.It mips64 Ta big Ta signed -.It mips64el Ta little Ta signed -.It mips64elhf Ta little Ta signed -.It mips64hf Ta big Ta signed -.It powerpc Ta big Ta unsigned -.It powerpcspe Ta big Ta unsigned -.It powerpc64 Ta big Ta unsigned -.It powerpc64le Ta little Ta unsigned .It riscv64 Ta little Ta signed .It riscv64sf Ta little Ta signed .El @@ -244,19 +196,6 @@ is 8 bytes on all supported architectures except i386. .It armv6 Ta 4K, 1M .It armv7 Ta 4K, 1M .It i386 Ta 4K, 2M (PAE), 4M -.It mips Ta 4K -.It mipsel Ta 4K -.It mipselhf Ta 4K -.It mipshf Ta 4K -.It mipsn32 Ta 4K -.It mips64 Ta 4K -.It mips64el Ta 4K -.It mips64elhf Ta 4K -.It mips64hf Ta 4K -.It powerpc Ta 4K -.It powerpcspe Ta 4K -.It powerpc64 Ta 4K -.It powerpc64le Ta 4K .It riscv64 Ta 4K, 2M, 1G .It riscv64sf Ta 4K, 2M, 1G .El @@ -268,19 +207,6 @@ is 8 bytes on all supported architectures except i386. .It armv6 Ta hard Ta hard, double precision .It armv7 Ta hard Ta hard, double precision .It i386 Ta hard Ta hard, 80 bit -.It mips Ta soft Ta identical to double -.It mipsel Ta soft Ta identical to double -.It mipselhf Ta hard Ta identical to double -.It mipshf Ta hard Ta identical to double -.It mipsn32 Ta soft Ta identical to double -.It mips64 Ta soft Ta identical to double -.It mips64el Ta soft Ta identical to double -.It mips64elhf Ta hard Ta identical to double -.It mips64hf Ta hard Ta identical to double -.It powerpc Ta hard Ta hard, double precision -.It powerpcspe Ta hard Ta hard, double precision -.It powerpc64 Ta hard Ta hard, double precision -.It powerpc64le Ta hard Ta hard, double precision .It riscv64 Ta hard Ta hard, quad precision .It riscv64sf Ta soft Ta soft, quad precision .El @@ -313,8 +239,6 @@ or similar things like boot sequences. .It amd64 Ta amd64 Ta amd64 .It arm Ta arm Ta armv6, armv7 .It i386 Ta i386 Ta i386 -.It mips Ta mips Ta mips, mipsel, mips64, mips64el, mipshf, mipselhf, mips64elhf, mipsn32 -.It powerpc Ta powerpc Ta powerpc, powerpcspe, powerpc64, powerpc64le .It riscv Ta riscv Ta riscv64, riscv64sf .El .Ss Predefined Macros @@ -347,19 +271,6 @@ Architecture-specific macros: .It armv6 Ta Dv __arm__ , Dv __ARM_ARCH >= 6 .It armv7 Ta Dv __arm__ , Dv __ARM_ARCH >= 7 .It i386 Ta Dv __i386__ -.It mips Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_o32 -.It mipsel Ta Dv __mips__ , Dv __mips_o32 -.It mipselhf Ta Dv __mips__ , Dv __mips_o32 -.It mipshf Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_o32 -.It mipsn32 Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_n32 -.It mips64 Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_n64 -.It mips64el Ta Dv __mips__ , Dv __mips_n64 -.It mips64elhf Ta Dv __mips__ , Dv __mips_n64 -.It mips64hf Ta Dv __mips__ , Dv __MIPSEB__ , Dv __mips_n64 -.It powerpc Ta Dv __powerpc__ -.It powerpcspe Ta Dv __powerpc__ , Dv __SPE__ -.It powerpc64 Ta Dv __powerpc__ , Dv __powerpc64__ -.It powerpc64le Ta Dv __powerpc__ , Dv __powerpc64__ .It riscv64 Ta Dv __riscv , Dv __riscv_xlen == 64 .It riscv64sf Ta Dv __riscv , Dv __riscv_xlen == 64 , Dv __riscv_float_abi_soft .El @@ -422,19 +333,12 @@ integers (endian). It may also encode a variation in the size of the integer or pointer. It may also encode a ISA revision. It may also encode hard versus soft floating point ABI and usage. -It may also encode a variant ABI when the other factors do not -uniquely define the ABI (e.g., MIPS' n32 ABI). It, along with .Dv MACHINE , defines the ABI used by the system. -For example, the MIPS CPU processor family supports 9 different -combinations encoding pointer size, endian and hard versus soft float (for -8 combinations) as well as N32 (which only ever had one variation of -all these). Generally, the plain CPU name specifies the most common (or at least first) variant of the CPU. -This is why mips and mips64 imply 'big endian' while 'armv6' and 'armv7' -imply little endian. +For example, 'armv6' and 'armv7' imply little endian. If we ever were to support the so-called x32 ABI (using 32-bit pointers on the amd64 architecture), it would most likely be encoded as amd64-x32. @@ -447,10 +351,6 @@ Represents the source location for a given .Dv MACHINE_ARCH . It is generally the common prefix for all the MACHINE_ARCH that share the same implementation, though 'riscv' breaks this rule. -For example, -.Dv MACHINE_CPUARCH -is defined to be mips for all the flavors of mips that we support -since we support them all with a shared set of sources. While amd64 and i386 are closely related, MACHINE_CPUARCH is not x86 for them. The diff --git a/share/mk/bsd.compat.mk b/share/mk/bsd.compat.mk index de25b6e941c..f0d1e87e12a 100644 --- a/share/mk/bsd.compat.mk +++ b/share/mk/bsd.compat.mk @@ -39,50 +39,6 @@ LIB32WMAKEFLAGS= \ AS="${XAS} --32" \ LD="${XLD} -m elf_i386_fbsd" -.elif ${COMPAT_ARCH} == "powerpc64" -HAS_COMPAT=32 -.if empty(COMPAT_CPUTYPE) -LIB32CPUFLAGS= -mcpu=powerpc -.else -LIB32CPUFLAGS= -mcpu=${COMPAT_CPUTYPE} -.endif - -.if ${COMPAT_COMPILER_TYPE} == "gcc" -LIB32CPUFLAGS+= -m32 -.else -LIB32CPUFLAGS+= -target powerpc-unknown-freebsd${OS_REVISION} -.endif - -LIB32_MACHINE= powerpc -LIB32_MACHINE_ARCH= powerpc -LIB32WMAKEFLAGS= \ - LD="${XLD} -m elf32ppc_fbsd" - -.elif ${COMPAT_ARCH:Mmips64*} != "" -HAS_COMPAT=32 -.if ${COMPAT_COMPILER_TYPE} == gcc -.if empty(COMPAT_CPUTYPE) -LIB32CPUFLAGS= -march=mips3 -.else -LIB32CPUFLAGS= -march=${COMPAT_CPUTYPE} -.endif -.else -.if ${COMPAT_ARCH:Mmips64el*} != "" -LIB32CPUFLAGS= -target mipsel-unknown-freebsd${OS_REVISION} -.else -LIB32CPUFLAGS= -target mips-unknown-freebsd${OS_REVISION} -.endif -.endif -LIB32CPUFLAGS+= -mabi=32 -LIB32_MACHINE= mips -LIB32_MACHINE_ARCH:= ${COMPAT_ARCH:S/64//} -.if ${COMPAT_ARCH:Mmips64el*} != "" -_EMULATION= elf32ltsmip_fbsd -.else -_EMULATION= elf32btsmip_fbsd -.endif -LIB32WMAKEFLAGS= LD="${XLD} -m ${_EMULATION}" -LIB32LDFLAGS= -Wl,-m${_EMULATION} .endif LIB32WMAKEFLAGS+= NM="${XNM}" diff --git a/share/mk/bsd.cpu.mk b/share/mk/bsd.cpu.mk index 0566e07f15c..4ac17cd9b09 100644 --- a/share/mk/bsd.cpu.mk +++ b/share/mk/bsd.cpu.mk @@ -13,10 +13,6 @@ MACHINE_CPU = amd64 sse2 sse mmx MACHINE_CPU = arm . elif ${MACHINE_CPUARCH} == "i386" MACHINE_CPU = i486 -. elif ${MACHINE_CPUARCH} == "mips" -MACHINE_CPU = mips -. elif ${MACHINE_CPUARCH} == "powerpc" -MACHINE_CPU = aim . elif ${MACHINE_CPUARCH} == "riscv" MACHINE_CPU = riscv . endif @@ -79,9 +75,6 @@ CPUTYPE = pentium # after /etc/make.conf so it can react to the local value of CPUTYPE # defined therein. Consult: # http://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html -# http://gcc.gnu.org/onlinedocs/gcc/RS-6000-and-PowerPC-Options.html -# http://gcc.gnu.org/onlinedocs/gcc/MIPS-Options.html -# http://gcc.gnu.org/onlinedocs/gcc/SPARC-Options.html # http://gcc.gnu.org/onlinedocs/gcc/i386-and-x86_002d64-Options.html . if ${MACHINE_CPUARCH} == "i386" @@ -121,28 +114,6 @@ _CPUCFLAGS = -march=${CPUTYPE} # cortex-a72, exynos-m1 _CPUCFLAGS = -mcpu=${CPUTYPE} . endif -. elif ${MACHINE_ARCH} == "powerpc" -. if ${CPUTYPE} == "e500" -_CPUCFLAGS = -Wa,-me500 -msoft-float -. else -_CPUCFLAGS = -mcpu=${CPUTYPE} -mno-powerpc64 -. endif -. elif ${MACHINE_ARCH:Mpowerpc64*} != "" -_CPUCFLAGS = -mcpu=${CPUTYPE} -. elif ${MACHINE_CPUARCH} == "mips" -# mips[1234], mips32, mips64, and all later releases need to have mips -# preserved (releases later than r2 require external toolchain) -. if ${CPUTYPE:Mmips32*} != "" || ${CPUTYPE:Mmips64*} != "" || \ - ${CPUTYPE:Mmips[1234]} != "" -_CPUCFLAGS = -march=${CPUTYPE} -. else -# Default -march to the CPUTYPE passed in, with mips stripped off so we -# accept either mips4kc or 4kc, mostly for historical reasons -# Typical values for cores: -# 4kc, 24kc, 34kc, 74kc, 1004kc, octeon, octeon+, octeon2, octeon3, -# sb1, xlp, xlr -_CPUCFLAGS = -march=${CPUTYPE:S/^mips//} -. endif . elif ${MACHINE_CPUARCH} == "aarch64" . if ${CPUTYPE:Marmv*} != "" # Use -march when the CPU type is an architecture value, e.g. armv8.1-a @@ -296,63 +267,12 @@ MACHINE_CPU = ssse3 sse3 MACHINE_CPU = sse3 . endif MACHINE_CPU += amd64 sse2 sse mmx -########## Mips -. elif ${MACHINE_CPUARCH} == "mips" -MACHINE_CPU = mips -########## powerpc -. elif ${MACHINE_ARCH} == "powerpc" -. if ${CPUTYPE} == "e500" -MACHINE_CPU = booke softfp -. elif ${CPUTYPE} == "g4" -MACHINE_CPU = altivec -. endif -. elif ${MACHINE_ARCH} == "powerpc64" -. if ${CPUTYPE} == "e5500" -MACHINE_CPU = booke -. elif ${CPUTYPE} == power7 -MACHINE_CPU = altivec vsx -. elif ${CPUTYPE} == power8 -MACHINE_CPU = altivec vsx vsx2 -. elif ${CPUTYPE} == power9 -MACHINE_CPU = altivec vsx vsx2 vsx3 -. else -MACHINE_CPU = altivec -. endif -. elif ${MACHINE_ARCH} == "powerpc64le" -MACHINE_CPU = altivec vsx vsx2 -. if ${CPUTYPE} == power9 -MACHINE_CPU += vsx3 -. endif ########## riscv . elif ${MACHINE_CPUARCH} == "riscv" MACHINE_CPU = riscv . endif .endif -.if ${MACHINE_CPUARCH} == "mips" -CFLAGS += -G0 -AFLAGS+= -${MIPS_ENDIAN} -mabi=${MIPS_ABI} -CFLAGS+= -${MIPS_ENDIAN} -mabi=${MIPS_ABI} -LDFLAGS+= -${MIPS_ENDIAN} -mabi=${MIPS_ABI} -. if ${MACHINE_ARCH:Mmips*el*} != "" -MIPS_ENDIAN= EL -. else -MIPS_ENDIAN= EB -. endif -. if ${MACHINE_ARCH:Mmips64*} != "" -MIPS_ABI?= 64 -. elif ${MACHINE_ARCH:Mmipsn32*} != "" -MIPS_ABI?= n32 -. else -MIPS_ABI?= 32 -. endif -. if ${MACHINE_ARCH:Mmips*hf} -CFLAGS += -mhard-float -. else -CFLAGS += -msoft-float -. endif -.endif - ########## arm .if ${MACHINE_CPUARCH} == "arm" MACHINE_CPU += arm @@ -383,15 +303,6 @@ CFLAGS += -mfloat-abi=softfp . endif .endif -.if ${MACHINE_ARCH} == "powerpc" || ${MACHINE_ARCH} == "powerpcspe" -LDFLAGS.bfd+= -Wl,--secure-plt -.endif - -.if ${MACHINE_ARCH} == "powerpcspe" -CFLAGS += -mcpu=8548 -mspe -CFLAGS.gcc+= -mabi=spe -mfloat-gprs=double -Wa,-me500 -.endif - .if ${MACHINE_CPUARCH} == "riscv" .if ${MACHINE_ARCH:Mriscv*sf} CFLAGS += -march=rv64imac -mabi=lp64 diff --git a/share/mk/bsd.endian.mk b/share/mk/bsd.endian.mk index 9fd948bb056..7100c643f3c 100644 --- a/share/mk/bsd.endian.mk +++ b/share/mk/bsd.endian.mk @@ -3,17 +3,11 @@ ${MACHINE_ARCH} == "amd64" || \ ${MACHINE_ARCH} == "i386" || \ (${MACHINE} == "arm" && ${MACHINE_ARCH:Marm*eb*} == "") || \ - ${MACHINE_ARCH} == "powerpc64le" || \ - ${MACHINE_CPUARCH} == "riscv" || \ - ${MACHINE_ARCH:Mmips*el*} != "" + ${MACHINE_CPUARCH} == "riscv" TARGET_ENDIANNESS= 1234 CAP_MKDB_ENDIAN= -l LOCALEDEF_ENDIAN= -l -.elif ${MACHINE_ARCH} == "powerpc" || \ - ${MACHINE_ARCH} == "powerpc64" || \ - ${MACHINE_ARCH} == "powerpcspe" || \ - (${MACHINE} == "arm" && ${MACHINE_ARCH:Marm*eb*} != "") || \ - ${MACHINE_ARCH:Mmips*} != "" +.elif ${MACHINE} == "arm" && ${MACHINE_ARCH:Marm*eb*} != "" TARGET_ENDIANNESS= 4321 CAP_MKDB_ENDIAN= -b LOCALEDEF_ENDIAN= -b diff --git a/share/mk/bsd.lib.mk b/share/mk/bsd.lib.mk index f9407f0f40c..ff3f93f723b 100644 --- a/share/mk/bsd.lib.mk +++ b/share/mk/bsd.lib.mk @@ -121,12 +121,6 @@ CXXFLAGS+= ${DEBUG_FILES_CFLAGS} CTFFLAGS+= -g .endif -# clang currently defaults to dynamic TLS for mips64 object files without -fPIC -.if ${MACHINE_ARCH:Mmips64*} && ${COMPILER_TYPE} == "clang" -STATIC_CFLAGS+= -ftls-model=initial-exec -STATIC_CXXFLAGS+= -ftls-model=initial-exec -.endif - .if ${MACHINE_CPUARCH} == "riscv" && ${LINKER_FEATURES:Mriscv-relaxations} == "" CFLAGS += -mno-relax .endif diff --git a/share/mk/bsd.opts.mk b/share/mk/bsd.opts.mk index 9ec9106616d..86fffd496e1 100644 --- a/share/mk/bsd.opts.mk +++ b/share/mk/bsd.opts.mk @@ -91,11 +91,7 @@ __DEFAULT_DEPENDENT_OPTIONS = \ # some memory-hungry workloads. # .if ${MACHINE_ARCH} == "armv6" || ${MACHINE_ARCH} == "armv7" \ - || ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "mips" \ - || ${MACHINE_ARCH} == "mipsel" || ${MACHINE_ARCH} == "mipselhf" \ - || ${MACHINE_ARCH} == "mipshf" || ${MACHINE_ARCH} == "mipsn32" \ - || ${MACHINE_ARCH} == "mipsn32el" || ${MACHINE_ARCH} == "powerpc" \ - || ${MACHINE_ARCH} == "powerpcspe" + || ${MACHINE_ARCH} == "i386" __DEFAULT_NO_OPTIONS+= PIE .else __DEFAULT_YES_OPTIONS+=PIE diff --git a/share/mk/bsd.prog.mk b/share/mk/bsd.prog.mk index ee6282de4f8..f269371d0e5 100644 --- a/share/mk/bsd.prog.mk +++ b/share/mk/bsd.prog.mk @@ -119,11 +119,6 @@ TAG_ARGS= -T ${TAGS:[*]:S/ /,/g} LDFLAGS+= -static .endif -# clang currently defaults to dynamic TLS for mips64 binaries -.if ${MACHINE_ARCH:Mmips64*} && ${COMPILER_TYPE} == "clang" -CFLAGS+= -ftls-model=initial-exec -.endif - .if ${MK_DEBUG_FILES} != "no" PROG_FULL=${PROG}.full # Use ${DEBUGDIR} for base system debug files, else .debug subdirectory diff --git a/share/mk/local.meta.sys.mk b/share/mk/local.meta.sys.mk index ff54fc61500..d80c58209a1 100644 --- a/share/mk/local.meta.sys.mk +++ b/share/mk/local.meta.sys.mk @@ -15,8 +15,6 @@ MK_INSTALL_AS_USER= yes # from src/Makefile (for universe) TARGET_ARCHES_arm?= arm armv6 armv7 TARGET_ARCHES_arm64?= aarch64 -TARGET_ARCHES_mips?= mipsel mips mips64el mips64 mipsn32 mipsn32el -TARGET_ARCHES_powerpc?= powerpc powerpc64 powerpc64le powerpcspe TARGET_ARCHES_riscv?= riscv64 riscv64sf # some corner cases @@ -24,7 +22,7 @@ BOOT_MACHINE_DIR.amd64 = boot/i386 MACHINE_ARCH.host = ${_HOST_ARCH} # the list of machines we support -ALL_MACHINE_LIST?= amd64 arm arm64 i386 mips powerpc riscv +ALL_MACHINE_LIST?= amd64 arm arm64 i386 riscv .for m in ${ALL_MACHINE_LIST:O:u} MACHINE_ARCH_LIST.$m?= ${TARGET_ARCHES_${m}:U$m} MACHINE_ARCH.$m?= ${MACHINE_ARCH_LIST.$m:[1]} diff --git a/share/mk/src.opts.mk b/share/mk/src.opts.mk index 7fc206bf49b..abab4360359 100644 --- a/share/mk/src.opts.mk +++ b/share/mk/src.opts.mk @@ -263,11 +263,9 @@ __T=${MACHINE_ARCH} __LLVM_TARGETS= \ aarch64 \ arm \ - mips \ - powerpc \ riscv \ x86 -__LLVM_TARGET_FILT= C/(amd64|i386)/x86/:C/powerpc.*/powerpc/:C/armv[67]/arm/:C/riscv.*/riscv/:C/mips.*/mips/ +__LLVM_TARGET_FILT= C/(amd64|i386)/x86/:C/armv[67]/arm/:C/riscv.*/riscv/ .for __llt in ${__LLVM_TARGETS} # Default enable the given TARGET's LLVM_TARGET support .if ${__T:${__LLVM_TARGET_FILT}} == ${__llt} @@ -281,17 +279,17 @@ __DEFAULT_DEPENDENT_OPTIONS+= LLVM_TARGET_${__llt:${__LLVM_TARGET_FILT}:tu}/LLVM .endif .endfor -__DEFAULT_NO_OPTIONS+=LLVM_TARGET_BPF +__DEFAULT_NO_OPTIONS+=LLVM_TARGET_BPF LLVM_TARGET_MIPS LLVM_TARGET_POWERPC .include -.if ${__T} == "aarch64" || ${__T} == "amd64" || ${__T} == "i386" || ${__T:Mpowerpc*} +.if ${__T} == "aarch64" || ${__T} == "amd64" || ${__T} == "i386" __DEFAULT_YES_OPTIONS+=LLDB .else __DEFAULT_NO_OPTIONS+=LLDB .endif -# LIB32 is supported on amd64, mips64, and powerpc64 -.if (${__T} == "amd64" || ${__T:Mmips64*} || ${__T} == "powerpc64") +# LIB32 is supported on amd64. +.if ${__T} == "amd64" __DEFAULT_YES_OPTIONS+=LIB32 .else BROKEN_OPTIONS+=LIB32 @@ -300,38 +298,16 @@ BROKEN_OPTIONS+=LIB32 .if ${__T} != "armv6" && ${__T} != "armv7" BROKEN_OPTIONS+=LIBSOFT .endif -.if ${__T:Mmips*} -# GOOGLETEST cannot currently be compiled on mips due to external circumstances. -# Notably, the freebsd-gcc port isn't linking in libgcc so we end up trying ot -# link to a hidden symbol. LLVM would successfully link this in, but some of -# the mips variants are broken under LLVM until LLVM 10. GOOGLETEST should be -# marked no longer broken with the switch to LLVM. -BROKEN_OPTIONS+=GOOGLETEST SSP -.endif -# EFI doesn't exist on mips or powerpc. -.if ${__T:Mmips*} || ${__T:Mpowerpc*} -BROKEN_OPTIONS+=EFI -.endif -# OFW is only for powerpc, exclude others -.if ${__T:Mpowerpc*} == "" +# OFW is not supported on any remaining architecture. BROKEN_OPTIONS+=LOADER_OFW -.endif -# KBOOT is only for powerpc64 (powerpc64le broken) and kinda for amd64 -.if ${__T} != "powerpc64" && ${__T} != "amd64" +# KBOOT is only supported on amd64. +.if ${__T} != "amd64" BROKEN_OPTIONS+=LOADER_KBOOT .endif -# UBOOT is only for arm, mips, and big-endian powerpc -.if (${__T:Marm*} == "" && ${__T:Mmips*} == "" && ${__T:Mpowerpc*} == "") || ${__T} == "powerpc64le" +# UBOOT is only supported on arm. +.if ${__T:Marm*} == "" BROKEN_OPTIONS+=LOADER_UBOOT .endif -# GELI and Lua in loader currently cause boot failures on powerpc. -# Further debugging is required -- probably they are just broken on big -# endian systems generically (they jump to null pointers or try to read -# crazy high addresses, which is typical of endianness problems). -.if ${__T:Mpowerpc*} -BROKEN_OPTIONS+=LOADER_GELI LOADER_LUA -.endif - # Kernel TLS is enabled by default on amd64 and aarch64 .if ${__T} == "aarch64" || ${__T} == "amd64" __DEFAULT_YES_OPTIONS+=OPENSSL_KTLS @@ -339,12 +315,7 @@ __DEFAULT_YES_OPTIONS+=OPENSSL_KTLS __DEFAULT_NO_OPTIONS+=OPENSSL_KTLS .endif -.if ${__T:Mmips64*} -# profiling won't work on MIPS64 because there is only assembly for o32 -BROKEN_OPTIONS+=PROFILE -.endif -.if ${__T} != "aarch64" && ${__T} != "amd64" && ${__T} != "i386" && \ - ${__T} != "powerpc64" +.if ${__T} != "aarch64" && ${__T} != "amd64" && ${__T} != "i386" BROKEN_OPTIONS+=CXGBETOOL BROKEN_OPTIONS+=MLX5TOOL .endif @@ -354,14 +325,13 @@ BROKEN_OPTIONS+=MLX5TOOL BROKEN_OPTIONS+=HYPERV .endif -# NVME is only aarch64, x86 and powerpc64* -.if ${__T} != "aarch64" && ${__T} != "amd64" && ${__T} != "i386" && \ - ${__T:Mpowerpc64*} == "" +# NVME is only supported on aarch64 and x86. +.if ${__T} != "aarch64" && ${__T} != "amd64" && ${__T} != "i386" BROKEN_OPTIONS+=NVME .endif .if ${__T} == "aarch64" || ${__T} == "amd64" || ${__T} == "i386" || \ - ${__T:Mpowerpc64*} != "" || ${__T:Mriscv64*} != "" + ${__T:Mriscv64*} != "" __DEFAULT_YES_OPTIONS+=OPENMP .else __DEFAULT_NO_OPTIONS+=OPENMP diff --git a/share/mk/sys.dependfile.mk b/share/mk/sys.dependfile.mk index 8d0f86392c3..dd166e30cd8 100644 --- a/share/mk/sys.dependfile.mk +++ b/share/mk/sys.dependfile.mk @@ -47,7 +47,7 @@ _e := ${.MAKE.DEPENDFILE_PREFERENCE:@m@${exists($m):?$m:}@} .elif ${.MAKE.DEPENDFILE_PREFERENCE:M*${MACHINE}} != "" && ${.MAKE.DEPENDFILE_DEFAULT:E} != ${MACHINE} # MACHINE specific depend files are supported, but *not* default. # If any already exist, we should follow suit. -_aml = ${ALL_MACHINE_LIST:Uarm amd64 i386 powerpc:N${MACHINE}} ${MACHINE} +_aml = ${ALL_MACHINE_LIST:Uamd64 arm arm64 i386 riscv:N${MACHINE}} ${MACHINE} # make sure we restore MACHINE _m := ${MACHINE} _e := ${_aml:@MACHINE@${.MAKE.DEPENDFILE_PREFERENCE:@m@${exists($m):?$m:}@}@} diff --git a/share/mk/sys.mk b/share/mk/sys.mk index a87e311db77..17cdb3ba533 100644 --- a/share/mk/sys.mk +++ b/share/mk/sys.mk @@ -12,7 +12,7 @@ unix ?= We run MidnightBSD, not UNIX. # and/or endian. This is called MACHINE_CPU in NetBSD, but that's used # for something different in MidnightBSD. # -__TO_CPUARCH=C/mips(n32|64)?(el)?(hf)?/mips/:C/arm(v[67])?(eb)?/arm/:C/powerpc(64|64le|spe)/powerpc/:C/riscv64(sf)?/riscv/ +__TO_CPUARCH=C/arm(v[67])?(eb)?/arm/:C/riscv64(sf)?/riscv/ MACHINE_CPUARCH=${MACHINE_ARCH:${__TO_CPUARCH}} .endif diff --git a/stand/common/metadata.c b/stand/common/metadata.c index 18658e99ae5..26b221bc594 100644 --- a/stand/common/metadata.c +++ b/stand/common/metadata.c @@ -136,9 +136,6 @@ md_load_dual(char *args, vm_offset_t *modulep, vm_offset_t *dtb, int kern64) #if defined(LOADER_FDT_SUPPORT) /* Copy out FDT */ fdtp = 0; -#if defined(__powerpc__) - if (getenv("usefdt") != NULL) -#endif { size = fdt_copy(addr); fdtp = addr; @@ -220,11 +217,3 @@ md_load(char *args, vm_offset_t *modulep, vm_offset_t *dtb) { return (md_load_dual(args, modulep, dtb, 0)); } - -#if defined(__mips__) || defined(__powerpc__) -int -md_load64(char *args, vm_offset_t *modulep, vm_offset_t *dtb) -{ - return (md_load_dual(args, modulep, dtb, 1)); -} -#endif diff --git a/stand/defs.mk b/stand/defs.mk index 94fcd3c591d..d8bd762138c 100644 --- a/stand/defs.mk +++ b/stand/defs.mk @@ -119,14 +119,6 @@ CFLAGS+= -DLOADER_DISK_SUPPORT # Machine specific flags for all builds here -# Ensure PowerPC64 and PowerPC64LE boot loaders are compiled as 32 bit. -# PowerPC64LE boot loaders are 32-bit little-endian. -.if ${MACHINE_ARCH} == "powerpc64" -CFLAGS+= -m32 -mcpu=powerpc -mbig-endian -.elif ${MACHINE_ARCH} == "powerpc64le" -CFLAGS+= -m32 -mcpu=powerpc -mlittle-endian -.endif - # For amd64, there's a bit of mixed bag. Some of the tree (i386, lib*32) is # build 32-bit and some 64-bit (lib*, efi). Centralize all the 32-bit magic here # and activate it when DO32 is explicitly defined to be 1. @@ -150,11 +142,6 @@ CFLAGS.gcc+= -mcmodel=medany CFLAGS+= -msoft-float .endif -# -msoft-float seems to be insufficient for powerpcspe -.if ${MACHINE_ARCH} == "powerpcspe" -CFLAGS+= -mno-spe -.endif - .if ${MACHINE_CPUARCH} == "i386" || (${MACHINE_CPUARCH} == "amd64" && ${DO32:U0} == 1) CFLAGS+= -march=i386 CFLAGS.gcc+= -mpreferred-stack-boundary=2 @@ -185,10 +172,6 @@ CFLAGS+= -mno-relax DD_NOSTATUS!=(dd status=none count=0 2> /dev/null && echo status=none) || true DD=dd ${DD_NOSTATUS} -.if ${MACHINE_CPUARCH} == "mips" -CFLAGS+= -G0 -fno-pic -mno-abicalls -.endif - # # Have a sensible default # diff --git a/stand/ficl.mk b/stand/ficl.mk index 904abcb434d..a2cfca9fc3b 100644 --- a/stand/ficl.mk +++ b/stand/ficl.mk @@ -3,8 +3,6 @@ .if ${MACHINE_CPUARCH} == "amd64" && ${DO32:U0} == 1 FICL_CPUARCH= i386 -.elif ${MACHINE_ARCH:Mmips64*} != "" -FICL_CPUARCH= mips64 .else FICL_CPUARCH= ${MACHINE_CPUARCH} .endif diff --git a/stand/ficl/loader.c b/stand/ficl/loader.c index edde4f477d5..af996e24906 100644 --- a/stand/ficl/loader.c +++ b/stand/ficl/loader.c @@ -1058,10 +1058,6 @@ void ficlCompilePlatform(FICL_SYSTEM *pSys) #if defined(__i386__) ficlSetEnv(pSys, "arch-i386", FICL_TRUE); - ficlSetEnv(pSys, "arch-powerpc", FICL_FALSE); -#elif defined(__powerpc__) - ficlSetEnv(pSys, "arch-i386", FICL_FALSE); - ficlSetEnv(pSys, "arch-powerpc", FICL_TRUE); #endif return; diff --git a/stand/ficl/mips/sysdep.c b/stand/ficl/mips/sysdep.c deleted file mode 100644 index 87bed142d68..00000000000 --- a/stand/ficl/mips/sysdep.c +++ /dev/null @@ -1,98 +0,0 @@ -/******************************************************************* -** s y s d e p . c -** Forth Inspired Command Language -** Author: John Sadler (john_sadler@alum.mit.edu) -** Created: 16 Oct 1997 -** Implementations of FICL external interface functions... -** -*******************************************************************/ - - -#ifdef TESTMAIN -#include -#include -#else -#include -#endif -#include "ficl.h" - -/* -******************* FreeBSD P O R T B E G I N S H E R E ******************** Michael Smith -*/ - -#if PORTABLE_LONGMULDIV == 0 -DPUNS ficlLongMul(FICL_UNS x, FICL_UNS y) -{ - DPUNS q; - uint64_t qx; - - qx = (uint64_t)x * (uint64_t) y; - - q.hi = (uint32_t)( qx >> 32 ); - q.lo = (uint32_t)( qx & 0xFFFFFFFFL); - - return q; -} - -UNSQR ficlLongDiv(DPUNS q, FICL_UNS y) -{ - UNSQR result; - uint64_t qx, qh; - - qh = q.hi; - qx = (qh << 32) | q.lo; - - result.quot = qx / y; - result.rem = qx % y; - - return result; -} -#endif - -void ficlTextOut(FICL_VM *pVM, char *msg, int fNewline) -{ - IGNORE(pVM); - - while(*msg != 0) - putchar(*(msg++)); - if (fNewline) - putchar('\n'); - - return; -} - -void *ficlMalloc (size_t size) -{ - return malloc(size); -} - -void *ficlRealloc (void *p, size_t size) -{ - return realloc(p, size); -} - -void ficlFree (void *p) -{ - free(p); -} - - -/* -** Stub function for dictionary access control - does nothing -** by default, user can redefine to guarantee exclusive dict -** access to a single thread for updates. All dict update code -** is guaranteed to be bracketed as follows: -** ficlLockDictionary(TRUE); -** -** ficlLockDictionary(FALSE); -** -** Returns zero if successful, nonzero if unable to acquire lock -** befor timeout (optional - could also block forever) -*/ -#if FICL_MULTITHREAD -int ficlLockDictionary(short fLock) -{ - IGNORE(fLock); - return 0; -} -#endif /* FICL_MULTITHREAD */ diff --git a/stand/ficl/mips/sysdep.h b/stand/ficl/mips/sysdep.h deleted file mode 100644 index 9c2f1d2140b..00000000000 --- a/stand/ficl/mips/sysdep.h +++ /dev/null @@ -1,431 +0,0 @@ -/******************************************************************* - s y s d e p . h -** Forth Inspired Command Language -** Author: John Sadler (john_sadler@alum.mit.edu) -** Created: 16 Oct 1997 -** Ficl system dependent types and prototypes... -** -** Note: Ficl also depends on the use of "assert" when -** FICL_ROBUST is enabled. This may require some consideration -** in firmware systems since assert often -** assumes stderr/stdout. -** $Id: sysdep.h,v 1.6 2001-04-26 21:41:55-07 jsadler Exp jsadler $ -*******************************************************************/ -/* -** Copyright (c) 1997-2001 John Sadler (john_sadler@alum.mit.edu) -** All rights reserved. -** -** Get the latest Ficl release at http://ficl.sourceforge.net -** -** L I C E N S E and D I S C L A I M E R -** -** Redistribution and use in source and binary forms, with or without -** modification, are permitted provided that the following conditions -** are met: -** 1. Redistributions of source code must retain the above copyright -** notice, this list of conditions and the following disclaimer. -** 2. Redistributions in binary form must reproduce the above copyright -** notice, this list of conditions and the following disclaimer in the -** documentation and/or other materials provided with the distribution. -** -** THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -** ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -** OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -** LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -** OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -** SUCH DAMAGE. -** -** I am interested in hearing from anyone who uses ficl. If you have -** a problem, a success story, a defect, an enhancement request, or -** if you would like to contribute to the ficl release, please send -** contact me by email at the address above. -** -** $Id: sysdep.h,v 1.6 2001-04-26 21:41:55-07 jsadler Exp jsadler $ -*/ - -#if !defined (__SYSDEP_H__) -#define __SYSDEP_H__ - -#include - -#include /* size_t, NULL */ -#include -#include - -#if !defined IGNORE /* Macro to silence unused param warnings */ -#define IGNORE(x) &x -#endif - -/* -** TRUE and FALSE for C boolean operations, and -** portable 32 bit types for CELLs -** -*/ -#if !defined TRUE -#define TRUE 1 -#endif -#if !defined FALSE -#define FALSE 0 -#endif - - -/* -** System dependent data type declarations... -*/ -#if !defined INT32 -#define INT32 int -#endif - -#if !defined UNS32 -#define UNS32 unsigned int -#endif - -#if !defined UNS16 -#define UNS16 unsigned short -#endif - -#if !defined UNS8 -#define UNS8 unsigned char -#endif - -#if !defined NULL -#define NULL ((void *)0) -#endif - -/* -** FICL_UNS and FICL_INT must have the same size as a void* on -** the target system. A CELL is a union of void*, FICL_UNS, and -** FICL_INT. -** (11/2000: same for FICL_FLOAT) -*/ -#if !defined FICL_INT -#define FICL_INT INT32 -#endif - -#if !defined FICL_UNS -#define FICL_UNS UNS32 -#endif - -#if !defined FICL_FLOAT -#define FICL_FLOAT float -#endif - -/* -** Ficl presently supports values of 32 and 64 for BITS_PER_CELL -*/ -#if !defined BITS_PER_CELL -#define BITS_PER_CELL 32 -#endif - -#if ((BITS_PER_CELL != 32) && (BITS_PER_CELL != 64)) - Error! -#endif - -typedef struct -{ - FICL_UNS hi; - FICL_UNS lo; -} DPUNS; - -typedef struct -{ - FICL_UNS quot; - FICL_UNS rem; -} UNSQR; - -typedef struct -{ - FICL_INT hi; - FICL_INT lo; -} DPINT; - -typedef struct -{ - FICL_INT quot; - FICL_INT rem; -} INTQR; - - -/* -** B U I L D C O N T R O L S -*/ - -#if !defined (FICL_MINIMAL) -#define FICL_MINIMAL 0 -#endif -#if (FICL_MINIMAL) -#define FICL_WANT_SOFTWORDS 0 -#define FICL_WANT_FILE 0 -#define FICL_WANT_FLOAT 0 -#define FICL_WANT_USER 0 -#define FICL_WANT_LOCALS 0 -#define FICL_WANT_DEBUGGER 0 -#define FICL_WANT_OOP 0 -#define FICL_PLATFORM_EXTEND 0 -#define FICL_MULTITHREAD 0 -#define FICL_ROBUST 1 -#define FICL_EXTENDED_PREFIX 0 -#endif - -/* -** FICL_PLATFORM_EXTEND -** Includes words defined in ficlCompilePlatform -*/ -#if !defined (FICL_PLATFORM_EXTEND) -#define FICL_PLATFORM_EXTEND 1 -#endif - -/* -** FICL_WANT_FILE -** Includes the FILE and FILE-EXT wordset and associated code. Turn this off if you do not -** have a filesystem! -** Contributed by Larry Hastings -*/ -#if !defined (FICL_WANT_FILE) -#define FICL_WANT_FILE 0 -#endif - -/* -** FICL_WANT_FLOAT -** Includes a floating point stack for the VM, and words to do float operations. -** Contributed by Guy Carver -*/ -#if !defined (FICL_WANT_FLOAT) -#define FICL_WANT_FLOAT 0 -#endif - -/* -** FICL_WANT_DEBUGGER -** Inludes a simple source level debugger -*/ -#if !defined (FICL_WANT_DEBUGGER) -#define FICL_WANT_DEBUGGER 1 -#endif - -/* -** User variables: per-instance variables bound to the VM. -** Kinda like thread-local storage. Could be implemented in a -** VM private dictionary, but I've chosen the lower overhead -** approach of an array of CELLs instead. -*/ -#if !defined FICL_WANT_USER -#define FICL_WANT_USER 1 -#endif - -#if !defined FICL_USER_CELLS -#define FICL_USER_CELLS 16 -#endif - -/* -** FICL_WANT_LOCALS controls the creation of the LOCALS wordset and -** a private dictionary for local variable compilation. -*/ -#if !defined FICL_WANT_LOCALS -#define FICL_WANT_LOCALS 1 -#endif - -/* Max number of local variables per definition */ -#if !defined FICL_MAX_LOCALS -#define FICL_MAX_LOCALS 16 -#endif - -/* -** FICL_WANT_OOP -** Inludes object oriented programming support (in softwords) -** OOP support requires locals and user variables! -*/ -#if !(FICL_WANT_LOCALS) || !(FICL_WANT_USER) -#if !defined (FICL_WANT_OOP) -#define FICL_WANT_OOP 0 -#endif -#endif - -#if !defined (FICL_WANT_OOP) -#define FICL_WANT_OOP 1 -#endif - -/* -** FICL_WANT_SOFTWORDS -** Controls inclusion of all softwords in softcore.c -*/ -#if !defined (FICL_WANT_SOFTWORDS) -#define FICL_WANT_SOFTWORDS 1 -#endif - -/* -** FICL_MULTITHREAD enables dictionary mutual exclusion -** wia the ficlLockDictionary system dependent function. -** Note: this implementation is experimental and poorly -** tested. Further, it's unnecessary unless you really -** intend to have multiple SESSIONS (poor choice of name -** on my part) - that is, threads that modify the dictionary -** at the same time. -*/ -#if !defined FICL_MULTITHREAD -#define FICL_MULTITHREAD 0 -#endif - -/* -** PORTABLE_LONGMULDIV causes ficlLongMul and ficlLongDiv to be -** defined in C in sysdep.c. Use this if you cannot easily -** generate an inline asm definition -*/ -#if !defined (PORTABLE_LONGMULDIV) -#define PORTABLE_LONGMULDIV 0 -#endif - -/* -** INLINE_INNER_LOOP causes the inner interpreter to be inline code -** instead of a function call. This is mainly because MS VC++ 5 -** chokes with an internal compiler error on the function version. -** in release mode. Sheesh. -*/ -#if !defined INLINE_INNER_LOOP -#if defined _DEBUG -#define INLINE_INNER_LOOP 0 -#else -#define INLINE_INNER_LOOP 1 -#endif -#endif - -/* -** FICL_ROBUST enables bounds checking of stacks and the dictionary. -** This will detect stack over and underflows and dictionary overflows. -** Any exceptional condition will result in an assertion failure. -** (As generated by the ANSI assert macro) -** FICL_ROBUST == 1 --> stack checking in the outer interpreter -** FICL_ROBUST == 2 also enables checking in many primitives -*/ - -#if !defined FICL_ROBUST -#define FICL_ROBUST 2 -#endif - -/* -** FICL_DEFAULT_STACK Specifies the default size (in CELLs) of -** a new virtual machine's stacks, unless overridden at -** create time. -*/ -#if !defined FICL_DEFAULT_STACK -#define FICL_DEFAULT_STACK 128 -#endif - -/* -** FICL_DEFAULT_DICT specifies the number of CELLs to allocate -** for the system dictionary by default. The value -** can be overridden at startup time as well. -** FICL_DEFAULT_ENV specifies the number of cells to allot -** for the environment-query dictionary. -*/ -#if !defined FICL_DEFAULT_DICT -#define FICL_DEFAULT_DICT 12288 -#endif - -#if !defined FICL_DEFAULT_ENV -#define FICL_DEFAULT_ENV 260 -#endif - -/* -** FICL_DEFAULT_VOCS specifies the maximum number of wordlists in -** the dictionary search order. See Forth DPANS sec 16.3.3 -** (file://dpans16.htm#16.3.3) -*/ -#if !defined FICL_DEFAULT_VOCS -#define FICL_DEFAULT_VOCS 16 -#endif - -/* -** FICL_MAX_PARSE_STEPS controls the size of an array in the FICL_SYSTEM structure -** that stores pointers to parser extension functions. I would never expect to have -** more than 8 of these, so that's the default limit. Too many of these functions -** will probably exact a nasty performance penalty. -*/ -#if !defined FICL_MAX_PARSE_STEPS -#define FICL_MAX_PARSE_STEPS 8 -#endif - -/* -** FICL_EXTENDED_PREFIX enables a bunch of extra prefixes in prefix.c and prefix.fr (if -** included as part of softcore.c) -*/ -#if !defined FICL_EXTENDED_PREFIX -#define FICL_EXTENDED_PREFIX 0 -#endif - -/* -** FICL_ALIGN is the power of two to which the dictionary -** pointer address must be aligned. This value is usually -** either 1 or 2, depending on the memory architecture -** of the target system; 2 is safe on any 16 or 32 bit -** machine. 3 would be appropriate for a 64 bit machine. -*/ -#if !defined FICL_ALIGN -#define FICL_ALIGN 2 -#define FICL_ALIGN_ADD ((1 << FICL_ALIGN) - 1) -#endif - -/* -** System dependent routines -- -** edit the implementations in sysdep.c to be compatible -** with your runtime environment... -** ficlTextOut sends a NULL terminated string to the -** default output device - used for system error messages -** ficlMalloc and ficlFree have the same semantics as malloc and free -** in standard C -** ficlLongMul multiplies two UNS32s and returns a 64 bit unsigned -** product -** ficlLongDiv divides an UNS64 by an UNS32 and returns UNS32 quotient -** and remainder -*/ -struct vm; -void ficlTextOut(struct vm *pVM, char *msg, int fNewline); -void *ficlMalloc (size_t size); -void ficlFree (void *p); -void *ficlRealloc(void *p, size_t size); -/* -** Stub function for dictionary access control - does nothing -** by default, user can redefine to guarantee exclusive dict -** access to a single thread for updates. All dict update code -** must be bracketed as follows: -** ficlLockDictionary(TRUE); -** -** ficlLockDictionary(FALSE); -** -** Returns zero if successful, nonzero if unable to acquire lock -** before timeout (optional - could also block forever) -** -** NOTE: this function must be implemented with lock counting -** semantics: nested calls must behave properly. -*/ -#if FICL_MULTITHREAD -int ficlLockDictionary(short fLock); -#else -#define ficlLockDictionary(x) 0 /* ignore */ -#endif - -/* -** 64 bit integer math support routines: multiply two UNS32s -** to get a 64 bit product, & divide the product by an UNS32 -** to get an UNS32 quotient and remainder. Much easier in asm -** on a 32 bit CPU than in C, which usually doesn't support -** the double length result (but it should). -*/ -DPUNS ficlLongMul(FICL_UNS x, FICL_UNS y); -UNSQR ficlLongDiv(DPUNS q, FICL_UNS y); - -/* -** FICL_HAVE_FTRUNCATE indicates whether the current OS supports -** the ftruncate() function (available on most UNIXes). This -** function is necessary to provide the complete File-Access wordset. -*/ -#if !defined (FICL_HAVE_FTRUNCATE) -#define FICL_HAVE_FTRUNCATE 0 -#endif - - -#endif /*__SYSDEP_H__*/ diff --git a/stand/ficl/mips64/sysdep.c b/stand/ficl/mips64/sysdep.c deleted file mode 100644 index 87bed142d68..00000000000 --- a/stand/ficl/mips64/sysdep.c +++ /dev/null @@ -1,98 +0,0 @@ -/******************************************************************* -** s y s d e p . c -** Forth Inspired Command Language -** Author: John Sadler (john_sadler@alum.mit.edu) -** Created: 16 Oct 1997 -** Implementations of FICL external interface functions... -** -*******************************************************************/ - - -#ifdef TESTMAIN -#include -#include -#else -#include -#endif -#include "ficl.h" - -/* -******************* FreeBSD P O R T B E G I N S H E R E ******************** Michael Smith -*/ - -#if PORTABLE_LONGMULDIV == 0 -DPUNS ficlLongMul(FICL_UNS x, FICL_UNS y) -{ - DPUNS q; - uint64_t qx; - - qx = (uint64_t)x * (uint64_t) y; - - q.hi = (uint32_t)( qx >> 32 ); - q.lo = (uint32_t)( qx & 0xFFFFFFFFL); - - return q; -} - -UNSQR ficlLongDiv(DPUNS q, FICL_UNS y) -{ - UNSQR result; - uint64_t qx, qh; - - qh = q.hi; - qx = (qh << 32) | q.lo; - - result.quot = qx / y; - result.rem = qx % y; - - return result; -} -#endif - -void ficlTextOut(FICL_VM *pVM, char *msg, int fNewline) -{ - IGNORE(pVM); - - while(*msg != 0) - putchar(*(msg++)); - if (fNewline) - putchar('\n'); - - return; -} - -void *ficlMalloc (size_t size) -{ - return malloc(size); -} - -void *ficlRealloc (void *p, size_t size) -{ - return realloc(p, size); -} - -void ficlFree (void *p) -{ - free(p); -} - - -/* -** Stub function for dictionary access control - does nothing -** by default, user can redefine to guarantee exclusive dict -** access to a single thread for updates. All dict update code -** is guaranteed to be bracketed as follows: -** ficlLockDictionary(TRUE); -** -** ficlLockDictionary(FALSE); -** -** Returns zero if successful, nonzero if unable to acquire lock -** befor timeout (optional - could also block forever) -*/ -#if FICL_MULTITHREAD -int ficlLockDictionary(short fLock) -{ - IGNORE(fLock); - return 0; -} -#endif /* FICL_MULTITHREAD */ diff --git a/stand/ficl/mips64/sysdep.h b/stand/ficl/mips64/sysdep.h deleted file mode 100644 index 6c1d8486137..00000000000 --- a/stand/ficl/mips64/sysdep.h +++ /dev/null @@ -1,431 +0,0 @@ -/******************************************************************* - s y s d e p . h -** Forth Inspired Command Language -** Author: John Sadler (john_sadler@alum.mit.edu) -** Created: 16 Oct 1997 -** Ficl system dependent types and prototypes... -** -** Note: Ficl also depends on the use of "assert" when -** FICL_ROBUST is enabled. This may require some consideration -** in firmware systems since assert often -** assumes stderr/stdout. -** $Id: sysdep.h,v 1.6 2001-04-26 21:41:55-07 jsadler Exp jsadler $ -*******************************************************************/ -/* -** Copyright (c) 1997-2001 John Sadler (john_sadler@alum.mit.edu) -** All rights reserved. -** -** Get the latest Ficl release at http://ficl.sourceforge.net -** -** L I C E N S E and D I S C L A I M E R -** -** Redistribution and use in source and binary forms, with or without -** modification, are permitted provided that the following conditions -** are met: -** 1. Redistributions of source code must retain the above copyright -** notice, this list of conditions and the following disclaimer. -** 2. Redistributions in binary form must reproduce the above copyright -** notice, this list of conditions and the following disclaimer in the -** documentation and/or other materials provided with the distribution. -** -** THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -** ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -** OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -** LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -** OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -** SUCH DAMAGE. -** -** I am interested in hearing from anyone who uses ficl. If you have -** a problem, a success story, a defect, an enhancement request, or -** if you would like to contribute to the ficl release, please send -** contact me by email at the address above. -** -** $Id: sysdep.h,v 1.6 2001-04-26 21:41:55-07 jsadler Exp jsadler $ -*/ - -#if !defined (__SYSDEP_H__) -#define __SYSDEP_H__ - -#include - -#include /* size_t, NULL */ -#include -#include - -#if !defined IGNORE /* Macro to silence unused param warnings */ -#define IGNORE(x) &x -#endif - -/* -** TRUE and FALSE for C boolean operations, and -** portable 32 bit types for CELLs -** -*/ -#if !defined TRUE -#define TRUE 1 -#endif -#if !defined FALSE -#define FALSE 0 -#endif - - -/* -** System dependent data type declarations... -*/ -#if !defined INT32 -#define INT32 int -#endif - -#if !defined UNS32 -#define UNS32 unsigned int -#endif - -#if !defined UNS16 -#define UNS16 unsigned short -#endif - -#if !defined UNS8 -#define UNS8 unsigned char -#endif - -#if !defined NULL -#define NULL ((void *)0) -#endif - -/* -** FICL_UNS and FICL_INT must have the same size as a void* on -** the target system. A CELL is a union of void*, FICL_UNS, and -** FICL_INT. -** (11/2000: same for FICL_FLOAT) -*/ -#if !defined FICL_INT -#define FICL_INT long -#endif - -#if !defined FICL_UNS -#define FICL_UNS unsigned long -#endif - -#if !defined FICL_FLOAT -#define FICL_FLOAT float -#endif - -/* -** Ficl presently supports values of 32 and 64 for BITS_PER_CELL -*/ -#if !defined BITS_PER_CELL -#define BITS_PER_CELL 64 -#endif - -#if ((BITS_PER_CELL != 32) && (BITS_PER_CELL != 64)) - Error! -#endif - -typedef struct -{ - FICL_UNS hi; - FICL_UNS lo; -} DPUNS; - -typedef struct -{ - FICL_UNS quot; - FICL_UNS rem; -} UNSQR; - -typedef struct -{ - FICL_INT hi; - FICL_INT lo; -} DPINT; - -typedef struct -{ - FICL_INT quot; - FICL_INT rem; -} INTQR; - - -/* -** B U I L D C O N T R O L S -*/ - -#if !defined (FICL_MINIMAL) -#define FICL_MINIMAL 0 -#endif -#if (FICL_MINIMAL) -#define FICL_WANT_SOFTWORDS 0 -#define FICL_WANT_FILE 0 -#define FICL_WANT_FLOAT 0 -#define FICL_WANT_USER 0 -#define FICL_WANT_LOCALS 0 -#define FICL_WANT_DEBUGGER 0 -#define FICL_WANT_OOP 0 -#define FICL_PLATFORM_EXTEND 0 -#define FICL_MULTITHREAD 0 -#define FICL_ROBUST 1 -#define FICL_EXTENDED_PREFIX 0 -#endif - -/* -** FICL_PLATFORM_EXTEND -** Includes words defined in ficlCompilePlatform -*/ -#if !defined (FICL_PLATFORM_EXTEND) -#define FICL_PLATFORM_EXTEND 1 -#endif - -/* -** FICL_WANT_FILE -** Includes the FILE and FILE-EXT wordset and associated code. Turn this off if you do not -** have a filesystem! -** Contributed by Larry Hastings -*/ -#if !defined (FICL_WANT_FILE) -#define FICL_WANT_FILE 0 -#endif - -/* -** FICL_WANT_FLOAT -** Includes a floating point stack for the VM, and words to do float operations. -** Contributed by Guy Carver -*/ -#if !defined (FICL_WANT_FLOAT) -#define FICL_WANT_FLOAT 0 -#endif - -/* -** FICL_WANT_DEBUGGER -** Inludes a simple source level debugger -*/ -#if !defined (FICL_WANT_DEBUGGER) -#define FICL_WANT_DEBUGGER 1 -#endif - -/* -** User variables: per-instance variables bound to the VM. -** Kinda like thread-local storage. Could be implemented in a -** VM private dictionary, but I've chosen the lower overhead -** approach of an array of CELLs instead. -*/ -#if !defined FICL_WANT_USER -#define FICL_WANT_USER 1 -#endif - -#if !defined FICL_USER_CELLS -#define FICL_USER_CELLS 16 -#endif - -/* -** FICL_WANT_LOCALS controls the creation of the LOCALS wordset and -** a private dictionary for local variable compilation. -*/ -#if !defined FICL_WANT_LOCALS -#define FICL_WANT_LOCALS 1 -#endif - -/* Max number of local variables per definition */ -#if !defined FICL_MAX_LOCALS -#define FICL_MAX_LOCALS 16 -#endif - -/* -** FICL_WANT_OOP -** Inludes object oriented programming support (in softwords) -** OOP support requires locals and user variables! -*/ -#if !(FICL_WANT_LOCALS) || !(FICL_WANT_USER) -#if !defined (FICL_WANT_OOP) -#define FICL_WANT_OOP 0 -#endif -#endif - -#if !defined (FICL_WANT_OOP) -#define FICL_WANT_OOP 1 -#endif - -/* -** FICL_WANT_SOFTWORDS -** Controls inclusion of all softwords in softcore.c -*/ -#if !defined (FICL_WANT_SOFTWORDS) -#define FICL_WANT_SOFTWORDS 1 -#endif - -/* -** FICL_MULTITHREAD enables dictionary mutual exclusion -** wia the ficlLockDictionary system dependent function. -** Note: this implementation is experimental and poorly -** tested. Further, it's unnecessary unless you really -** intend to have multiple SESSIONS (poor choice of name -** on my part) - that is, threads that modify the dictionary -** at the same time. -*/ -#if !defined FICL_MULTITHREAD -#define FICL_MULTITHREAD 0 -#endif - -/* -** PORTABLE_LONGMULDIV causes ficlLongMul and ficlLongDiv to be -** defined in C in sysdep.c. Use this if you cannot easily -** generate an inline asm definition -*/ -#if !defined (PORTABLE_LONGMULDIV) -#define PORTABLE_LONGMULDIV 0 -#endif - -/* -** INLINE_INNER_LOOP causes the inner interpreter to be inline code -** instead of a function call. This is mainly because MS VC++ 5 -** chokes with an internal compiler error on the function version. -** in release mode. Sheesh. -*/ -#if !defined INLINE_INNER_LOOP -#if defined _DEBUG -#define INLINE_INNER_LOOP 0 -#else -#define INLINE_INNER_LOOP 1 -#endif -#endif - -/* -** FICL_ROBUST enables bounds checking of stacks and the dictionary. -** This will detect stack over and underflows and dictionary overflows. -** Any exceptional condition will result in an assertion failure. -** (As generated by the ANSI assert macro) -** FICL_ROBUST == 1 --> stack checking in the outer interpreter -** FICL_ROBUST == 2 also enables checking in many primitives -*/ - -#if !defined FICL_ROBUST -#define FICL_ROBUST 2 -#endif - -/* -** FICL_DEFAULT_STACK Specifies the default size (in CELLs) of -** a new virtual machine's stacks, unless overridden at -** create time. -*/ -#if !defined FICL_DEFAULT_STACK -#define FICL_DEFAULT_STACK 128 -#endif - -/* -** FICL_DEFAULT_DICT specifies the number of CELLs to allocate -** for the system dictionary by default. The value -** can be overridden at startup time as well. -** FICL_DEFAULT_ENV specifies the number of cells to allot -** for the environment-query dictionary. -*/ -#if !defined FICL_DEFAULT_DICT -#define FICL_DEFAULT_DICT 12288 -#endif - -#if !defined FICL_DEFAULT_ENV -#define FICL_DEFAULT_ENV 260 -#endif - -/* -** FICL_DEFAULT_VOCS specifies the maximum number of wordlists in -** the dictionary search order. See Forth DPANS sec 16.3.3 -** (file://dpans16.htm#16.3.3) -*/ -#if !defined FICL_DEFAULT_VOCS -#define FICL_DEFAULT_VOCS 16 -#endif - -/* -** FICL_MAX_PARSE_STEPS controls the size of an array in the FICL_SYSTEM structure -** that stores pointers to parser extension functions. I would never expect to have -** more than 8 of these, so that's the default limit. Too many of these functions -** will probably exact a nasty performance penalty. -*/ -#if !defined FICL_MAX_PARSE_STEPS -#define FICL_MAX_PARSE_STEPS 8 -#endif - -/* -** FICL_EXTENDED_PREFIX enables a bunch of extra prefixes in prefix.c and prefix.fr (if -** included as part of softcore.c) -*/ -#if !defined FICL_EXTENDED_PREFIX -#define FICL_EXTENDED_PREFIX 0 -#endif - -/* -** FICL_ALIGN is the power of two to which the dictionary -** pointer address must be aligned. This value is usually -** either 1 or 2, depending on the memory architecture -** of the target system; 2 is safe on any 16 or 32 bit -** machine. 3 would be appropriate for a 64 bit machine. -*/ -#if !defined FICL_ALIGN -#define FICL_ALIGN 3 -#define FICL_ALIGN_ADD ((1 << FICL_ALIGN) - 1) -#endif - -/* -** System dependent routines -- -** edit the implementations in sysdep.c to be compatible -** with your runtime environment... -** ficlTextOut sends a NULL terminated string to the -** default output device - used for system error messages -** ficlMalloc and ficlFree have the same semantics as malloc and free -** in standard C -** ficlLongMul multiplies two UNS32s and returns a 64 bit unsigned -** product -** ficlLongDiv divides an UNS64 by an UNS32 and returns UNS32 quotient -** and remainder -*/ -struct vm; -void ficlTextOut(struct vm *pVM, char *msg, int fNewline); -void *ficlMalloc (size_t size); -void ficlFree (void *p); -void *ficlRealloc(void *p, size_t size); -/* -** Stub function for dictionary access control - does nothing -** by default, user can redefine to guarantee exclusive dict -** access to a single thread for updates. All dict update code -** must be bracketed as follows: -** ficlLockDictionary(TRUE); -** -** ficlLockDictionary(FALSE); -** -** Returns zero if successful, nonzero if unable to acquire lock -** before timeout (optional - could also block forever) -** -** NOTE: this function must be implemented with lock counting -** semantics: nested calls must behave properly. -*/ -#if FICL_MULTITHREAD -int ficlLockDictionary(short fLock); -#else -#define ficlLockDictionary(x) 0 /* ignore */ -#endif - -/* -** 64 bit integer math support routines: multiply two UNS32s -** to get a 64 bit product, & divide the product by an UNS32 -** to get an UNS32 quotient and remainder. Much easier in asm -** on a 32 bit CPU than in C, which usually doesn't support -** the double length result (but it should). -*/ -DPUNS ficlLongMul(FICL_UNS x, FICL_UNS y); -UNSQR ficlLongDiv(DPUNS q, FICL_UNS y); - -/* -** FICL_HAVE_FTRUNCATE indicates whether the current OS supports -** the ftruncate() function (available on most UNIXes). This -** function is necessary to provide the complete File-Access wordset. -*/ -#if !defined (FICL_HAVE_FTRUNCATE) -#define FICL_HAVE_FTRUNCATE 0 -#endif - - -#endif /*__SYSDEP_H__*/ diff --git a/stand/ficl/powerpc/sysdep.c b/stand/ficl/powerpc/sysdep.c deleted file mode 100644 index 87bed142d68..00000000000 --- a/stand/ficl/powerpc/sysdep.c +++ /dev/null @@ -1,98 +0,0 @@ -/******************************************************************* -** s y s d e p . c -** Forth Inspired Command Language -** Author: John Sadler (john_sadler@alum.mit.edu) -** Created: 16 Oct 1997 -** Implementations of FICL external interface functions... -** -*******************************************************************/ - - -#ifdef TESTMAIN -#include -#include -#else -#include -#endif -#include "ficl.h" - -/* -******************* FreeBSD P O R T B E G I N S H E R E ******************** Michael Smith -*/ - -#if PORTABLE_LONGMULDIV == 0 -DPUNS ficlLongMul(FICL_UNS x, FICL_UNS y) -{ - DPUNS q; - uint64_t qx; - - qx = (uint64_t)x * (uint64_t) y; - - q.hi = (uint32_t)( qx >> 32 ); - q.lo = (uint32_t)( qx & 0xFFFFFFFFL); - - return q; -} - -UNSQR ficlLongDiv(DPUNS q, FICL_UNS y) -{ - UNSQR result; - uint64_t qx, qh; - - qh = q.hi; - qx = (qh << 32) | q.lo; - - result.quot = qx / y; - result.rem = qx % y; - - return result; -} -#endif - -void ficlTextOut(FICL_VM *pVM, char *msg, int fNewline) -{ - IGNORE(pVM); - - while(*msg != 0) - putchar(*(msg++)); - if (fNewline) - putchar('\n'); - - return; -} - -void *ficlMalloc (size_t size) -{ - return malloc(size); -} - -void *ficlRealloc (void *p, size_t size) -{ - return realloc(p, size); -} - -void ficlFree (void *p) -{ - free(p); -} - - -/* -** Stub function for dictionary access control - does nothing -** by default, user can redefine to guarantee exclusive dict -** access to a single thread for updates. All dict update code -** is guaranteed to be bracketed as follows: -** ficlLockDictionary(TRUE); -** -** ficlLockDictionary(FALSE); -** -** Returns zero if successful, nonzero if unable to acquire lock -** befor timeout (optional - could also block forever) -*/ -#if FICL_MULTITHREAD -int ficlLockDictionary(short fLock) -{ - IGNORE(fLock); - return 0; -} -#endif /* FICL_MULTITHREAD */ diff --git a/stand/ficl/powerpc/sysdep.h b/stand/ficl/powerpc/sysdep.h deleted file mode 100644 index 405d4c38176..00000000000 --- a/stand/ficl/powerpc/sysdep.h +++ /dev/null @@ -1,434 +0,0 @@ -/******************************************************************* - s y s d e p . h -** Forth Inspired Command Language -** Author: John Sadler (john_sadler@alum.mit.edu) -** Created: 16 Oct 1997 -** Ficl system dependent types and prototypes... -** -** Note: Ficl also depends on the use of "assert" when -** FICL_ROBUST is enabled. This may require some consideration -** in firmware systems since assert often -** assumes stderr/stdout. -** $Id: sysdep.h,v 1.6 2001-04-26 21:41:55-07 jsadler Exp jsadler $ -*******************************************************************/ -/* -** Copyright (c) 1997-2001 John Sadler (john_sadler@alum.mit.edu) -** All rights reserved. -** -** Get the latest Ficl release at http://ficl.sourceforge.net -** -** L I C E N S E and D I S C L A I M E R -** -** Redistribution and use in source and binary forms, with or without -** modification, are permitted provided that the following conditions -** are met: -** 1. Redistributions of source code must retain the above copyright -** notice, this list of conditions and the following disclaimer. -** 2. Redistributions in binary form must reproduce the above copyright -** notice, this list of conditions and the following disclaimer in the -** documentation and/or other materials provided with the distribution. -** -** THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -** ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -** OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -** LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -** OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -** SUCH DAMAGE. -** -** I am interested in hearing from anyone who uses ficl. If you have -** a problem, a success story, a defect, an enhancement request, or -** if you would like to contribute to the ficl release, please send -** contact me by email at the address above. -** -** $Id: sysdep.h,v 1.6 2001-04-26 21:41:55-07 jsadler Exp jsadler $ -*/ - -#if !defined (__SYSDEP_H__) -#define __SYSDEP_H__ - -#include - -#include /* size_t, NULL */ -#include -#include - -#if !defined IGNORE /* Macro to silence unused param warnings */ -#define IGNORE(x) &x -#endif - -/* -** TRUE and FALSE for C boolean operations, and -** portable 32 bit types for CELLs -** -*/ -#if !defined TRUE -#define TRUE 1 -#endif -#if !defined FALSE -#define FALSE 0 -#endif - - -/* -** System dependent data type declarations... -*/ -#if !defined INT32 -#define INT32 int32_t -#endif - -#if !defined UNS32 -#define UNS32 uint32_t -#endif - -#if !defined UNS16 -#define UNS16 uint16_t -#endif - -#if !defined UNS8 -#define UNS8 unsigned char -#endif - -#if !defined NULL -#define NULL ((void *)0) -#endif - -/* -** FICL_UNS and FICL_INT must have the same size as a void* on -** the target system. A CELL is a union of void*, FICL_UNS, and -** FICL_INT. -** (11/2000: same for FICL_FLOAT) -*/ -#if !defined FICL_INT -#define FICL_INT INT32 -#endif - -#if !defined FICL_UNS -#define FICL_UNS UNS32 -#endif - -#if !defined FICL_FLOAT -#define FICL_FLOAT float -#endif - -/* -** Ficl presently supports values of 32 and 64 for BITS_PER_CELL -*/ -#if !defined BITS_PER_CELL -#define BITS_PER_CELL 32 -#endif - -#if ((BITS_PER_CELL != 32) && (BITS_PER_CELL != 64)) - Error! -#endif - -typedef struct -{ - FICL_UNS hi; - FICL_UNS lo; -} DPUNS; - -typedef struct -{ - FICL_UNS quot; - FICL_UNS rem; -} UNSQR; - -typedef struct -{ - FICL_INT hi; - FICL_INT lo; -} DPINT; - -typedef struct -{ - FICL_INT quot; - FICL_INT rem; -} INTQR; - - -/* -** B U I L D C O N T R O L S -*/ - -#if !defined (FICL_MINIMAL) -#define FICL_MINIMAL 0 -#endif -#if (FICL_MINIMAL) -#define FICL_WANT_SOFTWORDS 0 -#define FICL_WANT_FILE 0 -#define FICL_WANT_FLOAT 0 -#define FICL_WANT_USER 0 -#define FICL_WANT_LOCALS 0 -#define FICL_WANT_DEBUGGER 0 -#define FICL_WANT_OOP 0 -#define FICL_PLATFORM_EXTEND 0 -#define FICL_MULTITHREAD 0 -#define FICL_ROBUST 1 -#define FICL_EXTENDED_PREFIX 0 -#endif - -/* -** FICL_PLATFORM_EXTEND -** Includes words defined in ficlCompilePlatform -*/ -#if !defined (FICL_PLATFORM_EXTEND) -#define FICL_PLATFORM_EXTEND 1 -#endif - -/* -** FICL_WANT_FILE -** Includes the FILE and FILE-EXT wordset and associated code. Turn this off if you do not -** have a filesystem! -** Contributed by Larry Hastings -*/ -#if !defined (FICL_WANT_FILE) -#define FICL_WANT_FILE 0 -#endif - -/* -** FICL_WANT_FLOAT -** Includes a floating point stack for the VM, and words to do float operations. -** Contributed by Guy Carver -*/ -#if !defined (FICL_WANT_FLOAT) -#define FICL_WANT_FLOAT 0 -#endif - -/* -** FICL_WANT_DEBUGGER -** Inludes a simple source level debugger -*/ -#if !defined (FICL_WANT_DEBUGGER) -#define FICL_WANT_DEBUGGER 1 -#endif - -/* -** User variables: per-instance variables bound to the VM. -** Kinda like thread-local storage. Could be implemented in a -** VM private dictionary, but I've chosen the lower overhead -** approach of an array of CELLs instead. -*/ -#if !defined FICL_WANT_USER -#define FICL_WANT_USER 1 -#endif - -#if !defined FICL_USER_CELLS -#define FICL_USER_CELLS 16 -#endif - -/* -** FICL_WANT_LOCALS controls the creation of the LOCALS wordset and -** a private dictionary for local variable compilation. -*/ -#if !defined FICL_WANT_LOCALS -#define FICL_WANT_LOCALS 1 -#endif - -/* Max number of local variables per definition */ -#if !defined FICL_MAX_LOCALS -#define FICL_MAX_LOCALS 16 -#endif - -/* -** FICL_WANT_OOP -** Inludes object oriented programming support (in softwords) -** OOP support requires locals and user variables! -*/ -#if !(FICL_WANT_LOCALS) || !(FICL_WANT_USER) -#if !defined (FICL_WANT_OOP) -#define FICL_WANT_OOP 0 -#endif -#endif - -#if !defined (FICL_WANT_OOP) -#define FICL_WANT_OOP 1 -#endif - -/* -** FICL_WANT_SOFTWORDS -** Controls inclusion of all softwords in softcore.c -*/ -#if !defined (FICL_WANT_SOFTWORDS) -#define FICL_WANT_SOFTWORDS 1 -#endif - -/* -** FICL_MULTITHREAD enables dictionary mutual exclusion -** wia the ficlLockDictionary system dependent function. -** Note: this implementation is experimental and poorly -** tested. Further, it's unnecessary unless you really -** intend to have multiple SESSIONS (poor choice of name -** on my part) - that is, threads that modify the dictionary -** at the same time. -*/ -#if !defined FICL_MULTITHREAD -#define FICL_MULTITHREAD 0 -#endif - -/* -** PORTABLE_LONGMULDIV causes ficlLongMul and ficlLongDiv to be -** defined in C in sysdep.c. Use this if you cannot easily -** generate an inline asm definition -*/ -#if !defined (PORTABLE_LONGMULDIV) -#define PORTABLE_LONGMULDIV 0 -#endif - -/* -** INLINE_INNER_LOOP causes the inner interpreter to be inline code -** instead of a function call. This is mainly because MS VC++ 5 -** chokes with an internal compiler error on the function version. -** in release mode. Sheesh. -*/ -#if !defined INLINE_INNER_LOOP -#if defined _DEBUG -#define INLINE_INNER_LOOP 0 -#else -#define INLINE_INNER_LOOP 1 -#endif -#endif - -/* -** FICL_ROBUST enables bounds checking of stacks and the dictionary. -** This will detect stack over and underflows and dictionary overflows. -** Any exceptional condition will result in an assertion failure. -** (As generated by the ANSI assert macro) -** FICL_ROBUST == 1 --> stack checking in the outer interpreter -** FICL_ROBUST == 2 also enables checking in many primitives -*/ - -#if !defined FICL_ROBUST -#define FICL_ROBUST 2 -#endif - -/* -** FICL_DEFAULT_STACK Specifies the default size (in CELLs) of -** a new virtual machine's stacks, unless overridden at -** create time. -*/ -#if !defined FICL_DEFAULT_STACK -#define FICL_DEFAULT_STACK 128 -#endif - -/* -** FICL_DEFAULT_DICT specifies the number of CELLs to allocate -** for the system dictionary by default. The value -** can be overridden at startup time as well. -** FICL_DEFAULT_ENV specifies the number of cells to allot -** for the environment-query dictionary. -*/ -#if !defined FICL_DEFAULT_DICT -#define FICL_DEFAULT_DICT 12288 -#endif - -#if !defined FICL_DEFAULT_ENV -#define FICL_DEFAULT_ENV 260 -#endif - -/* -** FICL_DEFAULT_VOCS specifies the maximum number of wordlists in -** the dictionary search order. See Forth DPANS sec 16.3.3 -** (file://dpans16.htm#16.3.3) -*/ -#if !defined FICL_DEFAULT_VOCS -#define FICL_DEFAULT_VOCS 16 -#endif - -/* -** FICL_MAX_PARSE_STEPS controls the size of an array in the FICL_SYSTEM structure -** that stores pointers to parser extension functions. I would never expect to have -** more than 8 of these, so that's the default limit. Too many of these functions -** will probably exact a nasty performance penalty. -*/ -#if !defined FICL_MAX_PARSE_STEPS -#define FICL_MAX_PARSE_STEPS 8 -#endif - -/* -** FICL_EXTENDED_PREFIX enables a bunch of extra prefixes in prefix.c and prefix.fr (if -** included as part of softcore.c) -*/ -#if !defined FICL_EXTENDED_PREFIX -#define FICL_EXTENDED_PREFIX 0 -#endif - -/* -** FICL_ALIGN is the power of two to which the dictionary -** pointer address must be aligned. This value is usually -** either 1 or 2, depending on the memory architecture -** of the target system; 2 is safe on any 16 or 32 bit -** machine. 3 would be appropriate for a 64 bit machine. -*/ -#if !defined FICL_ALIGN -#define FICL_ALIGN 2 -#endif - -#if !defined FICL_ALIGN_ADD -#define FICL_ALIGN_ADD ((1 << FICL_ALIGN) - 1) -#endif - -/* -** System dependent routines -- -** edit the implementations in sysdep.c to be compatible -** with your runtime environment... -** ficlTextOut sends a NULL terminated string to the -** default output device - used for system error messages -** ficlMalloc and ficlFree have the same semantics as malloc and free -** in standard C -** ficlLongMul multiplies two UNS32s and returns a 64 bit unsigned -** product -** ficlLongDiv divides an UNS64 by an UNS32 and returns UNS32 quotient -** and remainder -*/ -struct vm; -void ficlTextOut(struct vm *pVM, char *msg, int fNewline); -void *ficlMalloc (size_t size); -void ficlFree (void *p); -void *ficlRealloc(void *p, size_t size); -/* -** Stub function for dictionary access control - does nothing -** by default, user can redefine to guarantee exclusive dict -** access to a single thread for updates. All dict update code -** must be bracketed as follows: -** ficlLockDictionary(TRUE); -** -** ficlLockDictionary(FALSE); -** -** Returns zero if successful, nonzero if unable to acquire lock -** before timeout (optional - could also block forever) -** -** NOTE: this function must be implemented with lock counting -** semantics: nested calls must behave properly. -*/ -#if FICL_MULTITHREAD -int ficlLockDictionary(short fLock); -#else -#define ficlLockDictionary(x) 0 /* ignore */ -#endif - -/* -** 64 bit integer math support routines: multiply two UNS32s -** to get a 64 bit product, & divide the product by an UNS32 -** to get an UNS32 quotient and remainder. Much easier in asm -** on a 32 bit CPU than in C, which usually doesn't support -** the double length result (but it should). -*/ -DPUNS ficlLongMul(FICL_UNS x, FICL_UNS y); -UNSQR ficlLongDiv(DPUNS q, FICL_UNS y); - -/* -** FICL_HAVE_FTRUNCATE indicates whether the current OS supports -** the ftruncate() function (available on most UNIXes). This -** function is necessary to provide the complete File-Access wordset. -*/ -#if !defined (FICL_HAVE_FTRUNCATE) -#define FICL_HAVE_FTRUNCATE 0 -#endif - - -#endif /*__SYSDEP_H__*/ diff --git a/stand/kboot/arch/powerpc64/Makefile.inc b/stand/kboot/arch/powerpc64/Makefile.inc deleted file mode 100644 index c29e6997050..00000000000 --- a/stand/kboot/arch/powerpc64/Makefile.inc +++ /dev/null @@ -1,8 +0,0 @@ -CFLAGS+= -mcpu=powerpc64 - -SRCS+= ppc64_elf_freebsd.c host_syscall.S kerneltramp.S load_addr.c fdt_arch.c -SRCS+= ucmpdi2.c - -LDFLAGS= -nostdlib -static -T ${.CURDIR}/arch/${MACHINE_ARCH}/ldscript.powerpc - -MK_PIE= no diff --git a/stand/kboot/arch/powerpc64/fdt_arch.c b/stand/kboot/arch/powerpc64/fdt_arch.c deleted file mode 100644 index dc5f0fbd8fb..00000000000 --- a/stand/kboot/arch/powerpc64/fdt_arch.c +++ /dev/null @@ -1,89 +0,0 @@ -/*- - * Copyright (C) 2014 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include "kboot.h" - -/* Fix up wrong values added to the device tree by prom_init() in Linux */ - -void -fdt_arch_fixups(void *fdtp) -{ - int offset, len; - const void *prop; - - /* - * Remove /memory/available properties, which reflect long-gone OF - * state - */ - - offset = fdt_path_offset(fdtp, "/memory@0"); - if (offset > 0) - fdt_delprop(fdtp, offset, "available"); - - /* - * Add reservations for OPAL and RTAS state if present - */ - - offset = fdt_path_offset(fdtp, "/ibm,opal"); - if (offset > 0) { - const uint64_t *base, *size; - base = fdt_getprop(fdtp, offset, "opal-base-address", - &len); - size = fdt_getprop(fdtp, offset, "opal-runtime-size", - &len); - if (base != NULL && size != NULL) - fdt_add_mem_rsv(fdtp, fdt64_to_cpu(*base), - fdt64_to_cpu(*size)); - } - offset = fdt_path_offset(fdtp, "/rtas"); - if (offset > 0) { - const uint32_t *base, *size; - base = fdt_getprop(fdtp, offset, "linux,rtas-base", &len); - size = fdt_getprop(fdtp, offset, "rtas-size", &len); - if (base != NULL && size != NULL) - fdt_add_mem_rsv(fdtp, fdt32_to_cpu(*base), - fdt32_to_cpu(*size)); - } - - /* - * Patch up /chosen nodes so that the stored handles mean something, - * where possible. - */ - offset = fdt_path_offset(fdtp, "/chosen"); - if (offset > 0) { - fdt_delprop(fdtp, offset, "cpu"); /* This node not meaningful */ - - offset = fdt_path_offset(fdtp, "/chosen"); - prop = fdt_getprop(fdtp, offset, "linux,stdout-package", &len); - if (prop != NULL) { - fdt_setprop(fdtp, offset, "stdout", prop, len); - offset = fdt_path_offset(fdtp, "/chosen"); - fdt_setprop(fdtp, offset, "stdin", prop, len); - } - } -} diff --git a/stand/kboot/arch/powerpc64/host_syscall.S b/stand/kboot/arch/powerpc64/host_syscall.S deleted file mode 100644 index f9108065ebf..00000000000 --- a/stand/kboot/arch/powerpc64/host_syscall.S +++ /dev/null @@ -1,32 +0,0 @@ -#include - -/* - * Emulate the Linux system call interface. The system call number is set in - * %r0, and %r3 -> %r8 have the 6 system call arguments. errno is returned - * as a negative value, but we use it more as a flag something went wrong - * rather than using its value. - * - * Return value in %r3. If it is positive or < -4096, it's a successful - * system call. If it is between -1 and -4095 then it's an failed system - * call with -x as the errno. Errors from the kernel are signaled via the - * the 'so' bit, but we don't test that here at all. There are at most 6 - * arguments to system calls in Linux. - * - * We expose the raw system call result, rather than do the POSIX - * conversion to -1 and setting errno. - * - * Note: The code this replaced used bso to set %r3 to 0 for the read and - * open system calls for reasons that are still under investigation. - */ -ENTRY(host_syscall) - mr %r0, %r3 /* SYS_ number in $r0 */ - mr %r3, %r4 /* arg2 -> 1 */ - mr %r4, %r5 /* arg3 -> 2 */ - mr %r5, %r6 /* arg4 -> 3 */ - mr %r6, %r7 /* arg5 -> 4 */ - mr %r7, %r8 /* arg6 -> 5 */ - mr %r8, %r9 /* arg7 -> 6 */ - sc - blr -/* Note: We're exposing the raw return value to the caller */ -END(host_syscall) diff --git a/stand/kboot/arch/powerpc64/kerneltramp.S b/stand/kboot/arch/powerpc64/kerneltramp.S deleted file mode 100644 index 211a6e474d2..00000000000 --- a/stand/kboot/arch/powerpc64/kerneltramp.S +++ /dev/null @@ -1,101 +0,0 @@ -/* - * This is the analog to the kexec "purgatory" code - * - * The goal here is to call the actual kernel entry point with the arguments it - * expects when kexec calls into it with no arguments. The value of the kernel - * entry point and arguments r3-r7 are copied into the trampoline text (which - * can be executed from any address) at bytes 8-32. kexec begins execution - * of APs at 0x60 bytes past the entry point, executing in a copy relocated - * to the absolute address 0x60. Here we implement a loop waiting on the release - * of a lock by the kernel at 0x40. - * - */ - -#include - - .globl CNAME(kerneltramp),CNAME(szkerneltramp) -CNAME(kerneltramp): - mflr %r9 - bl 2f - .space 24 /* branch address, r3-r7 */ - -/* - * MUST BE IN SYNC WITH: - * struct trampoline_data { - * uint32_t kernel_entry; - * uint32_t dtb; - * uint32_t phys_mem_offset; - * uint32_t of_entry; - * uint32_t mdp; - * uint32_t mdp_size; - * }; - */ - -. = kerneltramp + 0x40 /* AP spinlock */ - .long 0 - -. = kerneltramp + 0x60 /* AP entry point */ - li %r3,0x40 -1: lwz %r1,0(%r3) - cmpwi %r1,0 - beq 1b - - /* Jump into CPU reset */ - li %r0,0x100 - icbi 0,%r0 - isync - sync - ba 0x100 - -2: /* Continuation of kerneltramp */ - mflr %r8 - mtlr %r9 - - mfmsr %r10 - andi. %r10, %r10, 1 /* test MSR_LE */ - bne little_endian - -/* We're starting in BE */ -big_endian: - lwz %r3,4(%r8) - lwz %r4,8(%r8) - lwz %r5,12(%r8) - lwz %r6,16(%r8) - lwz %r7,20(%r8) - - lwz %r10, 0(%r8) - mtctr %r10 - bctr - -/* We're starting in LE */ -little_endian: - - /* Entries are BE, swap them during load. */ - li %r10, 4 - lwbrx %r3, %r8, %r10 - li %r10, 8 - lwbrx %r4, %r8, %r10 - li %r10, 12 - lwbrx %r5, %r8, %r10 - li %r10, 16 - lwbrx %r6, %r8, %r10 - li %r10, 20 - lwbrx %r7, %r8, %r10 - - /* Clear MSR_LE flag to enter the BE world */ - mfmsr %r10 - clrrdi %r10, %r10, 1 - mtsrr1 %r10 - - /* Entry is at 0(%r8) */ - li %r10, 0 - lwbrx %r10, %r8, %r10 - mtsrr0 %r10 - - rfid - -endkerneltramp: - - .data -CNAME(szkerneltramp): - .long endkerneltramp - CNAME(kerneltramp) diff --git a/stand/kboot/arch/powerpc64/ldscript.powerpc b/stand/kboot/arch/powerpc64/ldscript.powerpc deleted file mode 100644 index f9fcc37f02d..00000000000 --- a/stand/kboot/arch/powerpc64/ldscript.powerpc +++ /dev/null @@ -1,137 +0,0 @@ -OUTPUT_FORMAT("elf32-powerpc-freebsd", "elf32-powerpc-freebsd", - "elf32-powerpc-freebsd") -OUTPUT_ARCH(powerpc:common) -ENTRY(_start) -SEARCH_DIR(/usr/lib); -PROVIDE (__stack = 0); -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = 0x100000; - .interp : { *(.interp) } :text - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .gnu.version : { *(.gnu.version) } - .gnu.version_d : { *(.gnu.version_d) } - .gnu.version_r : { *(.gnu.version_r) } - .rela.text : - { *(.rela.text) *(.rela.gnu.linkonce.t*) } - .rela.data : - { *(.rela.data) *(.rela.gnu.linkonce.d*) } - .rela.rodata : - { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } - .rela.got : { *(.rela.got) } - .rela.got1 : { *(.rela.got1) } - .rela.got2 : { *(.rela.got2) } - .rela.ctors : { *(.rela.ctors) } - .rela.dtors : { *(.rela.dtors) } - .rela.init : { *(.rela.init) } - .rela.fini : { *(.rela.fini) } - .rela.bss : { *(.rela.bss) } - .rela.plt : { *(.rela.plt) } - .rela.sdata : { *(.rela.sdata) } - .rela.sbss : { *(.rela.sbss) } - .rela.sdata2 : { *(.rela.sdata2) } - .rela.sbss2 : { *(.rela.sbss2) } - .text : - { - *(.text) - /* .gnu.warning sections are handled specially by elf32.em. */ - *(.gnu.warning) - *(.gnu.linkonce.t*) - } =0 - _etext = .; - PROVIDE (etext = .); - .init : { *(.init) } =0 - .fini : { *(.fini) } =0 - .rodata : { *(.rodata) *(.gnu.linkonce.r*) } - .rodata1 : { *(.rodata1) } - .sdata2 : { *(.sdata2) } - .sbss2 : { *(.sbss2) } - /* Adjust the address for the data segment to the next page up. */ - . = ((. + 0x1000) & ~(0x1000 - 1)); - .data.rel.ro : { *(.data.rel.ro*) } - .data : - { - *(.data) - *(.gnu.linkonce.d*) - CONSTRUCTORS - } - .data1 : { *(.data1) } - .got1 : { *(.got1) } - .dynamic : { *(.dynamic) } - /* Put .ctors and .dtors next to the .got2 section, so that the pointers - get relocated with -mrelocatable. Also put in the .fixup pointers. - The current compiler no longer needs this, but keep it around for 2.7.2 */ - PROVIDE (_GOT2_START_ = .); - .got2 : { *(.got2) } - PROVIDE (__CTOR_LIST__ = .); - .ctors : { *(.ctors) } - PROVIDE (__CTOR_END__ = .); - PROVIDE (__DTOR_LIST__ = .); - .dtors : { *(.dtors) } - PROVIDE (__DTOR_END__ = .); - PROVIDE (_FIXUP_START_ = .); - .fixup : { *(.fixup) } - PROVIDE (_FIXUP_END_ = .); - PROVIDE (_GOT2_END_ = .); - PROVIDE (_GOT_START_ = .); - .got : { *(.got) } - .got.plt : { *(.got.plt) } - PROVIDE (_GOT_END_ = .); - /* We want the small data sections together, so single-instruction offsets - can access them all, and initialized data all before uninitialized, so - we can shorten the on-disk segment size. */ - .sdata : { *(.sdata) } - _edata = .; - PROVIDE (edata = .); - .sbss : - { - PROVIDE (__sbss_start = .); - *(.sbss) - *(.scommon) - *(.dynsbss) - PROVIDE (__sbss_end = .); - } - .plt : { *(.plt) } - .bss : - { - PROVIDE (__bss_start = .); - *(.dynbss) - *(.bss) - *(COMMON) - } - . = ALIGN(4096); - _end = . ; - PROVIDE (end = .); - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to the beginning - of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - /* These must appear regardless of . */ -} diff --git a/stand/kboot/arch/powerpc64/load_addr.c b/stand/kboot/arch/powerpc64/load_addr.c deleted file mode 100644 index 81b5d0d5058..00000000000 --- a/stand/kboot/arch/powerpc64/load_addr.c +++ /dev/null @@ -1,210 +0,0 @@ -/*- - * Copyright (C) 2010-2014 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include - -#include "stand.h" -#include "host_syscall.h" -#include "kboot.h" - -struct region_desc { - uint64_t start; - uint64_t end; -}; - -/* - * Find a good place to load the kernel, subject to the PowerPC's constraints - * - * This excludes ranges that are marked as reserved. - * And 0..end of kernel - * - * It then tries to find the memory exposed from the DTB, which it assumes is one - * contiguous range. It adds everything not in that list to the excluded list. - * - * Sort, dedup, and it finds the first region and uses that as the load_segment - * and returns that. All addresses are offset by this amount. - */ -uint64_t -kboot_get_phys_load_segment(void) -{ - int fd; - uint64_t entry[2]; - static uint64_t load_segment = ~(0UL); - uint64_t val_64; - uint32_t val_32; - struct region_desc rsvd_reg[32]; - int rsvd_reg_cnt = 0; - int ret, a, b; - uint64_t start, end; - - if (load_segment == ~(0UL)) { - - /* Default load address is 0x00000000 */ - load_segment = 0UL; - - /* Read reserved regions */ - fd = host_open("/proc/device-tree/reserved-ranges", O_RDONLY, 0); - if (fd >= 0) { - while (host_read(fd, &entry[0], sizeof(entry)) == sizeof(entry)) { - rsvd_reg[rsvd_reg_cnt].start = be64toh(entry[0]); - rsvd_reg[rsvd_reg_cnt].end = - be64toh(entry[1]) + rsvd_reg[rsvd_reg_cnt].start - 1; - rsvd_reg_cnt++; - } - host_close(fd); - } - /* Read where the kernel ends */ - fd = host_open("/proc/device-tree/chosen/linux,kernel-end", O_RDONLY, 0); - if (fd >= 0) { - ret = host_read(fd, &val_64, sizeof(val_64)); - - if (ret == sizeof(uint64_t)) { - rsvd_reg[rsvd_reg_cnt].start = 0; - rsvd_reg[rsvd_reg_cnt].end = be64toh(val_64) - 1; - } else { - memcpy(&val_32, &val_64, sizeof(val_32)); - rsvd_reg[rsvd_reg_cnt].start = 0; - rsvd_reg[rsvd_reg_cnt].end = be32toh(val_32) - 1; - } - rsvd_reg_cnt++; - - host_close(fd); - } - /* Read memory size (SOCKET0 only) */ - fd = host_open("/proc/device-tree/memory@0/reg", O_RDONLY, 0); - if (fd < 0) - fd = host_open("/proc/device-tree/memory/reg", O_RDONLY, 0); - if (fd >= 0) { - ret = host_read(fd, &entry, sizeof(entry)); - - /* Memory range in start:length format */ - entry[0] = be64toh(entry[0]); - entry[1] = be64toh(entry[1]); - - /* Reserve everything what is before start */ - if (entry[0] != 0) { - rsvd_reg[rsvd_reg_cnt].start = 0; - rsvd_reg[rsvd_reg_cnt].end = entry[0] - 1; - rsvd_reg_cnt++; - } - /* Reserve everything what is after end */ - if (entry[1] != 0xffffffffffffffffUL) { - rsvd_reg[rsvd_reg_cnt].start = entry[0] + entry[1]; - rsvd_reg[rsvd_reg_cnt].end = 0xffffffffffffffffUL; - rsvd_reg_cnt++; - } - - host_close(fd); - } - - /* Sort entries in ascending order (bubble) */ - for (a = rsvd_reg_cnt - 1; a > 0; a--) { - for (b = 0; b < a; b++) { - if (rsvd_reg[b].start > rsvd_reg[b + 1].start) { - struct region_desc tmp; - tmp = rsvd_reg[b]; - rsvd_reg[b] = rsvd_reg[b + 1]; - rsvd_reg[b + 1] = tmp; - } - } - } - - /* Join overlapping/adjacent regions */ - for (a = 0; a < rsvd_reg_cnt - 1; ) { - - if ((rsvd_reg[a + 1].start >= rsvd_reg[a].start) && - ((rsvd_reg[a + 1].start - 1) <= rsvd_reg[a].end)) { - /* We have overlapping/adjacent regions! */ - rsvd_reg[a].end = - MAX(rsvd_reg[a].end, rsvd_reg[a + a].end); - - for (b = a + 1; b < rsvd_reg_cnt - 1; b++) - rsvd_reg[b] = rsvd_reg[b + 1]; - rsvd_reg_cnt--; - } else - a++; - } - - /* Find the first free region */ - if (rsvd_reg_cnt > 0) { - start = 0; - end = rsvd_reg[0].start; - for (a = 0; a < rsvd_reg_cnt - 1; a++) { - if ((start >= rsvd_reg[a].start) && - (start <= rsvd_reg[a].end)) { - start = rsvd_reg[a].end + 1; - end = rsvd_reg[a + 1].start; - } else - break; - } - - if (start != end) { - uint64_t align = 64UL*1024UL*1024UL; - - /* Align both to 64MB boundary */ - start = (start + align - 1UL) & ~(align - 1UL); - end = ((end + 1UL) & ~(align - 1UL)) - 1UL; - - if (start < end) - load_segment = start; - } - } - } - - return (load_segment); -} - -#if 0 -/* - * XXX this appears to be unused, but may have been for selecting the allowed - * kernels ABIs. It's been unused since the first commit, which suggests an - * error in bringing this into the tree. - */ -uint8_t -kboot_get_kernel_machine_bits(void) -{ - static uint8_t bits = 0; - struct old_utsname utsname; - int ret; - - if (bits == 0) { - /* Default is 32-bit kernel */ - bits = 32; - - /* Try to get system type */ - memset(&utsname, 0, sizeof(utsname)); - ret = host_uname(&utsname); - if (ret == 0) { - if (strcmp(utsname.machine, "ppc64") == 0) - bits = 64; - else if (strcmp(utsname.machine, "ppc64le") == 0) - bits = 64; - } - } - - return (bits); -} -#endif diff --git a/stand/kboot/arch/powerpc64/ppc64_elf_freebsd.c b/stand/kboot/arch/powerpc64/ppc64_elf_freebsd.c deleted file mode 100644 index 7272a5bffbd..00000000000 --- a/stand/kboot/arch/powerpc64/ppc64_elf_freebsd.c +++ /dev/null @@ -1,179 +0,0 @@ -/*- - * Copyright (c) 2001 Benno Rice - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#define __ELF_WORD_SIZE 64 - -#include -#include -#include - -#include -#include - -#include - -#include "bootstrap.h" -#include "syscall_nr.h" -#include "host_syscall.h" -#include "modinfo.h" - -extern char end[]; -extern void *kerneltramp; -extern size_t szkerneltramp; - -struct trampoline_data { - uint32_t kernel_entry; - uint32_t dtb; - uint32_t phys_mem_offset; - uint32_t of_entry; - uint32_t mdp; - uint32_t mdp_size; -}; - -int -ppc64_elf_loadfile(char *filename, uint64_t dest, - struct preloaded_file **result) -{ - int r; - - r = __elfN(loadfile)(filename, dest, result); - if (r != 0) - return (r); - - return (0); -} - -int -ppc64_elf_exec(struct preloaded_file *fp) -{ - struct file_metadata *fmp; - vm_offset_t mdp, dtb; - Elf_Ehdr *e; - int error; - uint32_t *trampoline; - uint64_t entry; - uint64_t trampolinebase; - struct trampoline_data *trampoline_data; - int nseg; - void *kseg; - - if ((fmp = file_findmetadata(fp, MODINFOMD_ELFHDR)) == NULL) { - return(EFTYPE); - } - e = (Elf_Ehdr *)&fmp->md_data; - - /* - * Figure out where to put it. - * - * Linux does not allow to do kexec_load into - * any part of memory. Ask arch_loadaddr to - * resolve the first available chunk of physical - * memory where loading is possible (load_addr). - * - * Memory organization is shown below. - * It is assumed, that text segment offset of - * kernel ELF (KERNPHYSADDR) is non-zero, - * which is true for PPC/PPC64 architectures, - * where default is 0x100000. - * - * load_addr: trampoline code - * load_addr + KERNPHYSADDR: kernel text segment - */ - trampolinebase = archsw.arch_loadaddr(LOAD_RAW, NULL, 0); - printf("Load address at %#jx\n", (uintmax_t)trampolinebase); - printf("Relocation offset is %#jx\n", (uintmax_t)elf64_relocation_offset); - - /* Set up loader trampoline */ - trampoline = malloc(szkerneltramp); - memcpy(trampoline, &kerneltramp, szkerneltramp); - - /* Parse function descriptor for ELFv1 kernels */ - if ((e->e_flags & 3) == 2) - entry = e->e_entry; - else { - archsw.arch_copyout(e->e_entry + elf64_relocation_offset, - &entry, 8); - entry = be64toh(entry); - } - - /* - * Placeholder for trampoline data is at trampolinebase + 0x08 - * CAUTION: all data must be Big Endian - */ - trampoline_data = (void*)&trampoline[2]; - trampoline_data->kernel_entry = htobe32(entry + elf64_relocation_offset); - trampoline_data->phys_mem_offset = htobe32(0); - trampoline_data->of_entry = htobe32(0); - - if ((error = md_load64(fp->f_args, &mdp, &dtb)) != 0) - return (error); - - trampoline_data->dtb = htobe32(dtb); - trampoline_data->mdp = htobe32(mdp); - trampoline_data->mdp_size = htobe32(0xfb5d104d); - - printf("Kernel entry at %#jx (%#x) ...\n", - entry, be32toh(trampoline_data->kernel_entry)); - printf("DTB at %#x, mdp at %#x\n", - be32toh(trampoline_data->dtb), be32toh(trampoline_data->mdp)); - - dev_cleanup(); - - archsw.arch_copyin(trampoline, trampolinebase, szkerneltramp); - free(trampoline); - - if (archsw.arch_kexec_kseg_get == NULL) - panic("architecture did not provide kexec segment mapping"); - archsw.arch_kexec_kseg_get(&nseg, &kseg); - - error = host_kexec_load(trampolinebase, nseg, kseg, HOST_KEXEC_ARCH_PPC64); - if (error != 0) - panic("kexec_load returned error: %d", error); - - error = host_reboot(HOST_REBOOT_MAGIC1, HOST_REBOOT_MAGIC2, HOST_REBOOT_CMD_KEXEC, - (uintptr_t)NULL); - if (error != 0) - panic("reboot returned error: %d", error); - - while (1) {} -} - -struct file_format ppc_elf64 = -{ - ppc64_elf_loadfile, - ppc64_elf_exec -}; - -/* - * Sort formats so that those that can detect based on arguments rather than - * reading the file first. - */ - -struct file_format *file_formats[] = { - &ppc_elf64, - NULL -}; diff --git a/stand/kboot/arch/powerpc64/start_arch.h b/stand/kboot/arch/powerpc64/start_arch.h deleted file mode 100644 index 498de29ad0f..00000000000 --- a/stand/kboot/arch/powerpc64/start_arch.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (c) 2022 Netflix, Inc - * - * SPDX-License-Identifier: BSD-2-Clause - */ - -/* - * Due to the PowerPC ABI, We can call main directly from here, so do so. - * - * Note: there may be some static initializers that aren't called, but we don't - * worry about that elsewhere. This is a stripped down environment. - * - * I think we could also do something like - * - * mflr r0 - * stw r0,4(r1) - * stwu r1,-16(r1) - * b _start_c - * - * But my powerpc assembler fu is quite lacking... - */ - -#define __unused __attribute__((__unused__)) - -void -_start(int argc, const char **argv, char **env, void *obj __unused, - void (*cleanup)(void) __unused) -{ - main(argc, argv, env); -} diff --git a/stand/kboot/arch/powerpc64/stat_arch.h b/stand/kboot/arch/powerpc64/stat_arch.h deleted file mode 100644 index 103849b0e82..00000000000 --- a/stand/kboot/arch/powerpc64/stat_arch.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright (c) 2005-2020 Rich Felker, et al. - * - * SPDX-License-Identifier: MIT - * - * Note: From the musl project - */ - -typedef uint64_t host_nlink_t; - -struct host_kstat { - host_dev_t st_dev; - host_ino_t st_ino; - host_nlink_t st_nlink; - host_mode_t st_mode; - host_uid_t st_uid; - host_gid_t st_gid; - host_dev_t st_rdev; - host_off_t st_size; - host_blksize_t st_blksize; - host_blkcnt_t st_blocks; - long st_atime_sec; - long st_atime_nsec; - long st_mtime_sec; - long st_mtime_nsec; - long st_ctime_sec; - long st_ctime_nsec; - long __pad_for_future[3]; -}; diff --git a/stand/kboot/arch/powerpc64/syscall_nr.h b/stand/kboot/arch/powerpc64/syscall_nr.h deleted file mode 100644 index 735e79a0915..00000000000 --- a/stand/kboot/arch/powerpc64/syscall_nr.h +++ /dev/null @@ -1,22 +0,0 @@ -#define SYS_close 6 -#define SYS_dup 41 -#define SYS_exit 1 -#define SYS_fstat 108 -#define SYS_getdents64 202 -#define SYS_getpid 20 -#define SYS_gettimeofday 78 -#define SYS_ioctl 54 -#define SYS_kexec_load 268 -#define SYS_llseek 140 -#define SYS_mkdirat 287 -#define SYS_mmap 90 -#define SYS_mount 21 -#define SYS_munmap 91 -#define SYS_newfstatat 291 -#define SYS_openat 286 -#define SYS_pselect6 280 -#define SYS_read 3 -#define SYS_reboot 88 -#define SYS_symlinkat 295 -#define SYS_uname 120 -#define SYS_write 4 diff --git a/stand/kboot/arch/powerpc64/termios_arch.h b/stand/kboot/arch/powerpc64/termios_arch.h deleted file mode 100644 index 7b9e8f15a8c..00000000000 --- a/stand/kboot/arch/powerpc64/termios_arch.h +++ /dev/null @@ -1,192 +0,0 @@ -/* - * Copyright (c) 2005-2020 Rich Felker, et al. - * - * SPDX-License-Identifier: MIT - * - * Note: From the musl project, stripped down and repackaged with HOST_/host_ prepended - */ - -#undef HOST_NCCS -#define HOST_NCCS 19 -struct host_termios { - host_tcflag_t c_iflag; - host_tcflag_t c_oflag; - host_tcflag_t c_cflag; - host_tcflag_t c_lflag; - host_cc_t c_cc[HOST_NCCS]; - host_cc_t c_line; - host_speed_t __c_ispeed; - host_speed_t __c_ospeed; -}; - -#define HOST_VINTR 0 -#define HOST_VQUIT 1 -#define HOST_VERASE 2 -#define HOST_VKILL 3 -#define HOST_VEOF 4 -#define HOST_VMIN 5 -#define HOST_VEOL 6 -#define HOST_VTIME 7 -#define HOST_VEOL2 8 -#define HOST_VSWTC 9 -#define HOST_VWERASE 10 -#define HOST_VREPRINT 11 -#define HOST_VSUSP 12 -#define HOST_VSTART 13 -#define HOST_VSTOP 14 -#define HOST_VLNEXT 15 -#define HOST_VDISCARD 16 - -#define HOST_IGNBRK 0000001 -#define HOST_BRKINT 0000002 -#define HOST_IGNPAR 0000004 -#define HOST_PARMRK 0000010 -#define HOST_INPCK 0000020 -#define HOST_ISTRIP 0000040 -#define HOST_INLCR 0000100 -#define HOST_IGNCR 0000200 -#define HOST_ICRNL 0000400 -#define HOST_IXON 0001000 -#define HOST_IXOFF 0002000 -#define HOST_IXANY 0004000 -#define HOST_IUCLC 0010000 -#define HOST_IMAXBEL 0020000 -#define HOST_IUTF8 0040000 - -#define HOST_OPOST 0000001 -#define HOST_ONLCR 0000002 -#define HOST_OLCUC 0000004 -#define HOST_OCRNL 0000010 -#define HOST_ONOCR 0000020 -#define HOST_ONLRET 0000040 -#define HOST_OFILL 0000100 -#define HOST_OFDEL 0000200 -#if defined(_GNU_SOURCE) || defined(_BSD_SOURCE) || defined(_XOPEN_SOURCE) -#define HOST_NLDLY 0001400 -#define HOST_NL0 0000000 -#define HOST_NL1 0000400 -#define HOST_NL2 0001000 -#define HOST_NL3 0001400 -#define HOST_TABDLY 0006000 -#define HOST_TAB0 0000000 -#define HOST_TAB1 0002000 -#define HOST_TAB2 0004000 -#define HOST_TAB3 0006000 -#define HOST_CRDLY 0030000 -#define HOST_CR0 0000000 -#define HOST_CR1 0010000 -#define HOST_CR2 0020000 -#define HOST_CR3 0030000 -#define HOST_FFDLY 0040000 -#define HOST_FF0 0000000 -#define HOST_FF1 0040000 -#define HOST_BSDLY 0100000 -#define HOST_BS0 0000000 -#define HOST_BS1 0100000 -#endif - -#define HOST_VTDLY 0200000 -#define HOST_VT0 0000000 -#define HOST_VT1 0200000 - -#define HOST_B0 0000000 -#define HOST_B50 0000001 -#define HOST_B75 0000002 -#define HOST_B110 0000003 -#define HOST_B134 0000004 -#define HOST_B150 0000005 -#define HOST_B200 0000006 -#define HOST_B300 0000007 -#define HOST_B600 0000010 -#define HOST_B1200 0000011 -#define HOST_B1800 0000012 -#define HOST_B2400 0000013 -#define HOST_B4800 0000014 -#define HOST_B9600 0000015 -#define HOST_B19200 0000016 -#define HOST_B38400 0000017 - -#define HOST_B57600 00020 -#define HOST_B115200 00021 -#define HOST_B230400 00022 -#define HOST_B460800 00023 -#define HOST_B500000 00024 -#define HOST_B576000 00025 -#define HOST_B921600 00026 -#define HOST_B1000000 00027 -#define HOST_B1152000 00030 -#define HOST_B1500000 00031 -#define HOST_B2000000 00032 -#define HOST_B2500000 00033 -#define HOST_B3000000 00034 -#define HOST_B3500000 00035 -#define HOST_B4000000 00036 - -#define HOST_CSIZE 00001400 -#define HOST_CS5 00000000 -#define HOST_CS6 00000400 -#define HOST_CS7 00001000 -#define HOST_CS8 00001400 -#define HOST_CSTOPB 00002000 -#define HOST_CREAD 00004000 -#define HOST_PARENB 00010000 -#define HOST_PARODD 00020000 -#define HOST_HUPCL 00040000 -#define HOST_CLOCAL 00100000 - -#define HOST_ECHOE 0x00000002 -#define HOST_ECHOK 0x00000004 -#define HOST_ECHO 0x00000008 -#define HOST_ECHONL 0x00000010 -#define HOST_ISIG 0x00000080 -#define HOST_ICANON 0x00000100 -#define HOST_IEXTEN 0x00000400 -#define HOST_TOSTOP 0x00400000 -#define HOST_NOFLSH 0x80000000 - -#define HOST_TCOOFF 0 -#define HOST_TCOON 1 -#define HOST_TCIOFF 2 -#define HOST_TCION 3 - -#define HOST_TCIFLUSH 0 -#define HOST_TCOFLUSH 1 -#define HOST_TCIOFLUSH 2 - -#define HOST_TCSANOW 0 -#define HOST_TCSADRAIN 1 -#define HOST_TCSAFLUSH 2 - -#define HOST_EXTA 0000016 -#define HOST_EXTB 0000017 -#define HOST_CBAUD 00377 -#define HOST_CBAUDEX 0000020 -#define HOST_CIBAUD 077600000 -#define HOST_CMSPAR 010000000000 -#define HOST_CRTSCTS 020000000000 - -#define HOST_XCASE 0x00004000 -#define HOST_ECHOCTL 0x00000040 -#define HOST_ECHOPRT 0x00000020 -#define HOST_ECHOKE 0x00000001 -#define HOST_FLUSHO 0x00800000 -#define HOST_PENDIN 0x20000000 -#define HOST_EXTPROC 0x10000000 - -#define HOST_XTABS 00006000 -#define HOST_TIOCSER_TEMT 1 - -#define _IOC(a,b,c,d) ( ((a)<<29) | ((b)<<8) | (c) | ((d)<<16) ) -#define _IOC_NONE 1U -#define _IOC_WRITE 4U -#define _IOC_READ 2U - -#define _IO(a,b) _IOC(_IOC_NONE,(a),(b),0) -#define _IOW(a,b,c) _IOC(_IOC_WRITE,(a),(b),sizeof(c)) -#define _IOR(a,b,c) _IOC(_IOC_READ,(a),(b),sizeof(c)) -#define _IOWR(a,b,c) _IOC(_IOC_READ|_IOC_WRITE,(a),(b),sizeof(c)) - -#define HOST_TCGETS _IOR('t', 19, char[44]) -#define HOST_TCSETS _IOW('t', 20, char[44]) -#define HOST_TCSETSW _IOW('t', 21, char[44]) -#define HOST_TCSETSF _IOW('t', 22, char[44]) diff --git a/stand/kboot/host_syscall.h b/stand/kboot/host_syscall.h index 1d5d318548c..955a55cda8b 100644 --- a/stand/kboot/host_syscall.h +++ b/stand/kboot/host_syscall.h @@ -70,7 +70,7 @@ typedef int64_t host_blkcnt_t; * Constants for open, fcntl, etc * * Note: Some of these are arch dependent on Linux, but are the same for - * powerpc, x86, arm*, and riscv. We should be futureproof, though, since these + * x86, arm*, and riscv. We should be futureproof, though, since these * are the 'generic' values and only older architectures (no longer supported by * FreeBSD) vary. * diff --git a/stand/kboot/hostfs.c b/stand/kboot/hostfs.c index 08f532999ab..633abdd77c7 100644 --- a/stand/kboot/hostfs.c +++ b/stand/kboot/hostfs.c @@ -131,8 +131,7 @@ hostfs_seek(struct open_file *f, off_t offset, int whence) /* * Assumes Linux host with 'reduced' system call wrappers. Also assume * host and libstand have same whence encoding (safe since it all comes - * from V7 later ISO-C). Also assumes we have to support powerpc still, - * it's interface is weird for legacy reasons.... + * from V7 later ISO-C). */ offl = offset & 0xffffffff; offh = (offset >> 32) & 0xffffffff; diff --git a/stand/libsa/Makefile b/stand/libsa/Makefile index 89e7a67f7e4..3b0d2469368 100644 --- a/stand/libsa/Makefile +++ b/stand/libsa/Makefile @@ -72,10 +72,6 @@ SRCS+= ashldi3.c ashrdi3.c lshrdi3.c SRCS+= hypervisor.c .endif -.if ${MACHINE_CPUARCH} == "powerpc" -SRCS+= syncicache.c -.endif - # uuid functions from libc .PATH: ${LIBCSRC}/uuid SRCS+= uuid_create_nil.c uuid_equal.c uuid_from_string.c uuid_is_nil.c uuid_to_string.c diff --git a/stand/libsa/mips/_setjmp.S b/stand/libsa/mips/_setjmp.S deleted file mode 100644 index 562300d6386..00000000000 --- a/stand/libsa/mips/_setjmp.S +++ /dev/null @@ -1,105 +0,0 @@ -/*- - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include - -#if 0 -#if defined(LIBC_SCCS) - .text - .asciz "$OpenBSD: _setjmp.S,v 1.6 1996/09/23 21:27:53 imp Exp $" -#endif /* LIBC_SCCS */ -#endif - -/* - * C library -- _setjmp, _longjmp - * - * _longjmp(a,v) - * will generate a "return(v)" from - * the last call to - * _setjmp(a) - * by restoring registers from the stack, - * The previous signal state is NOT restored. - */ - -LEAF(_setjmp) - .set noreorder - REG_LI v0, _JB_MAGIC__SETJMP # sigcontext magic number - REG_S v0, (_JB_MAGIC * SZREG)(a0) # saved in sc_regs[0] - REG_S ra, (_JB_REG_RA * SZREG)(a0) # sc_pc = return address - REG_S s0, (_JB_REG_S0 * SZREG)(a0) - REG_S s1, (_JB_REG_S1 * SZREG)(a0) - REG_S s2, (_JB_REG_S2 * SZREG)(a0) - REG_S s3, (_JB_REG_S3 * SZREG)(a0) - REG_S s4, (_JB_REG_S4 * SZREG)(a0) - REG_S s5, (_JB_REG_S5 * SZREG)(a0) - REG_S s6, (_JB_REG_S6 * SZREG)(a0) - REG_S s7, (_JB_REG_S7 * SZREG)(a0) - REG_S sp, (_JB_REG_SP * SZREG)(a0) - REG_S s8, (_JB_REG_S8 * SZREG)(a0) - j ra - move v0, zero -END(_setjmp) - -LEAF(_longjmp) -#ifdef ABICALLS - subu sp, sp, 32 - .cprestore 16 -#endif - .set noreorder - REG_L v0, (_JB_MAGIC * SZREG)(a0) # get magic number - REG_L ra, (_JB_REG_RA * SZREG)(a0) - bne v0, _JB_MAGIC__SETJMP, botch # jump if error - - addu sp, sp, 32 # does not matter, sanity - REG_L s0, (_JB_REG_S0 * SZREG)(a0) - REG_L s1, (_JB_REG_S1 * SZREG)(a0) - REG_L s2, (_JB_REG_S2 * SZREG)(a0) - REG_L s3, (_JB_REG_S3 * SZREG)(a0) - REG_L s4, (_JB_REG_S4 * SZREG)(a0) - REG_L s5, (_JB_REG_S5 * SZREG)(a0) - REG_L s6, (_JB_REG_S6 * SZREG)(a0) - REG_L s7, (_JB_REG_S7 * SZREG)(a0) - REG_L sp, (_JB_REG_SP * SZREG)(a0) - REG_L s8, (_JB_REG_S8 * SZREG)(a0) - - j ra - move v0, a1 -botch: - jal _C_LABEL(longjmperror) - nop - jal _C_LABEL(abort) - nop -END(_longjmp) diff --git a/stand/libsa/powerpc/_setjmp.S b/stand/libsa/powerpc/_setjmp.S deleted file mode 100644 index a47920380a2..00000000000 --- a/stand/libsa/powerpc/_setjmp.S +++ /dev/null @@ -1,118 +0,0 @@ -/* from: NetBSD: setjmp.S,v 1.1 1998/01/27 15:13:12 sakamoto Exp $ */ -/* from: OpenBSD: setjmp.S,v 1.2 1996/12/28 06:22:18 rahnds Exp */ -/* kernel version of this file, does not have signal goop */ -/* int setjmp(jmp_buf env) */ - -#include - -#ifdef __powerpc64__ -#define LD_REG ld -#define ST_REG std -#define REGWIDTH 8 -#else -#define LD_REG lwz -#define ST_REG stw -#define REGWIDTH 4 -#endif - -#define JMP_r1 1*REGWIDTH -#define JMP_r2 2*REGWIDTH -#define JMP_r14 3*REGWIDTH -#define JMP_r15 4*REGWIDTH -#define JMP_r16 5*REGWIDTH -#define JMP_r17 6*REGWIDTH -#define JMP_r18 7*REGWIDTH -#define JMP_r19 8*REGWIDTH -#define JMP_r20 9*REGWIDTH -#define JMP_r21 10*REGWIDTH -#define JMP_r22 11*REGWIDTH -#define JMP_r23 12*REGWIDTH -#define JMP_r24 13*REGWIDTH -#define JMP_r25 14*REGWIDTH -#define JMP_r26 15*REGWIDTH -#define JMP_r27 16*REGWIDTH -#define JMP_r28 17*REGWIDTH -#define JMP_r29 18*REGWIDTH -#define JMP_r30 19*REGWIDTH -#define JMP_r31 20*REGWIDTH -#define JMP_lr 21*REGWIDTH -#define JMP_cr 22*REGWIDTH -#define JMP_ctr 23*REGWIDTH -#define JMP_xer 24*REGWIDTH -#define JMP_sig 25*REGWIDTH - -ASENTRY_NOPROF(_setjmp) - ST_REG 31, JMP_r31(3) - /* r1, r2, r14-r30 */ - ST_REG 1, JMP_r1 (3) - ST_REG 2, JMP_r2 (3) - ST_REG 14, JMP_r14(3) - ST_REG 15, JMP_r15(3) - ST_REG 16, JMP_r16(3) - ST_REG 17, JMP_r17(3) - ST_REG 18, JMP_r18(3) - ST_REG 19, JMP_r19(3) - ST_REG 20, JMP_r20(3) - ST_REG 21, JMP_r21(3) - ST_REG 22, JMP_r22(3) - ST_REG 23, JMP_r23(3) - ST_REG 24, JMP_r24(3) - ST_REG 25, JMP_r25(3) - ST_REG 26, JMP_r26(3) - ST_REG 27, JMP_r27(3) - ST_REG 28, JMP_r28(3) - ST_REG 29, JMP_r29(3) - ST_REG 30, JMP_r30(3) - /* cr, lr, ctr, xer */ - mfcr 0 - ST_REG 0, JMP_cr(3) - mflr 0 - ST_REG 0, JMP_lr(3) - mfctr 0 - ST_REG 0, JMP_ctr(3) - mfxer 0 - ST_REG 0, JMP_xer(3) - /* f14-f31, fpscr */ - li 3, 0 - blr -ASEND(_setjmp) - - -.extern sigsetmask -ASENTRY_NOPROF(_longjmp) - LD_REG 31, JMP_r31(3) - /* r1, r2, r14-r30 */ - LD_REG 1, JMP_r1 (3) - LD_REG 2, JMP_r2 (3) - LD_REG 14, JMP_r14(3) - LD_REG 15, JMP_r15(3) - LD_REG 16, JMP_r16(3) - LD_REG 17, JMP_r17(3) - LD_REG 18, JMP_r18(3) - LD_REG 19, JMP_r19(3) - LD_REG 20, JMP_r20(3) - LD_REG 21, JMP_r21(3) - LD_REG 22, JMP_r22(3) - LD_REG 23, JMP_r23(3) - LD_REG 24, JMP_r24(3) - LD_REG 25, JMP_r25(3) - LD_REG 26, JMP_r26(3) - LD_REG 27, JMP_r27(3) - LD_REG 28, JMP_r28(3) - LD_REG 29, JMP_r29(3) - LD_REG 30, JMP_r30(3) - /* cr, lr, ctr, xer */ - LD_REG 0, JMP_cr(3) - mtcr 0 - LD_REG 0, JMP_lr(3) - mtlr 0 - LD_REG 0, JMP_ctr(3) - mtctr 0 - LD_REG 0, JMP_xer(3) - mtxer 0 - /* f14-f31, fpscr */ - mr 3, 4 - blr -ASEND(_longjmp) - - .section .note.GNU-stack,"",%progbits diff --git a/stand/libsa/powerpc/syncicache.c b/stand/libsa/powerpc/syncicache.c deleted file mode 100644 index 0fcb1914a0d..00000000000 --- a/stand/libsa/powerpc/syncicache.c +++ /dev/null @@ -1,98 +0,0 @@ -/*- - * Copyright (C) 1995-1997, 1999 Wolfgang Solfrank. - * Copyright (C) 1995-1997, 1999 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: syncicache.c,v 1.2 1999/05/05 12:36:40 tsubai Exp $ - */ - -#include -#if defined(_KERNEL) || defined(_STANDALONE) -#include -#include -#include -#endif -#include - -#include -#include - -#ifdef _STANDALONE -int cacheline_size = 32; -#endif - -#if !defined(_KERNEL) && !defined(_STANDALONE) -#include - -int cacheline_size = 0; - -static void getcachelinesize(void); - -static void -getcachelinesize() -{ - static int cachemib[] = { CTL_MACHDEP, CPU_CACHELINE }; - int clen; - - clen = sizeof(cacheline_size); - - if (sysctl(cachemib, sizeof(cachemib) / sizeof(cachemib[0]), - &cacheline_size, &clen, NULL, 0) < 0 || !cacheline_size) { - abort(); - } -} -#endif - -void -__syncicache(void *from, int len) -{ - int l, off; - char *p; - -#if !defined(_KERNEL) && !defined(_STANDALONE) - if (!cacheline_size) - getcachelinesize(); -#endif - - off = (u_int)from & (cacheline_size - 1); - l = len += off; - p = (char *)from - off; - - do { - __asm __volatile ("dcbst 0,%0" :: "r"(p)); - p += cacheline_size; - } while ((l -= cacheline_size) > 0); - __asm __volatile ("sync"); - p = (char *)from - off; - do { - __asm __volatile ("icbi 0,%0" :: "r"(p)); - p += cacheline_size; - } while ((len -= cacheline_size) > 0); - __asm __volatile ("sync; isync"); -} - diff --git a/stand/libsa/zalloc_defs.h b/stand/libsa/zalloc_defs.h index f0de2275298..6602985f01b 100644 --- a/stand/libsa/zalloc_defs.h +++ b/stand/libsa/zalloc_defs.h @@ -61,7 +61,7 @@ * least sizeof(struct MemNode); this is asserted in zalloc.c. */ -#if defined(__arm__) || defined(__mips__) || defined(__powerpc__) +#if defined(__arm__) #define MALLOCALIGN 64 #else #define MALLOCALIGN 16 diff --git a/stand/loader.mk b/stand/loader.mk index 6db50c89615..896f2aeaf45 100644 --- a/stand/loader.mk +++ b/stand/loader.mk @@ -21,16 +21,6 @@ SRCS+= load_elf64.c load_elf64_obj.c reloc_elf64.c SRCS+= load_elf64.c reloc_elf64.c .elif ${MACHINE_CPUARCH} == "arm" SRCS+= load_elf32.c reloc_elf32.c -.elif ${MACHINE_CPUARCH} == "powerpc" -SRCS+= load_elf32.c reloc_elf32.c -SRCS+= load_elf64.c reloc_elf64.c -SRCS+= metadata.c -.elif ${MACHINE_ARCH:Mmips64*} != "" -SRCS+= load_elf64.c reloc_elf64.c -SRCS+= metadata.c -.elif ${MACHINE} == "mips" -SRCS+= load_elf32.c reloc_elf32.c -SRCS+= metadata.c .elif ${MACHINE_CPUARCH} == "riscv" SRCS+= load_elf64.c reloc_elf64.c SRCS+= metadata.c diff --git a/stand/powerpc/Makefile b/stand/powerpc/Makefile deleted file mode 100644 index 4ac319c6f9e..00000000000 --- a/stand/powerpc/Makefile +++ /dev/null @@ -1,8 +0,0 @@ - -NO_OBJ=t - -.include - -SUBDIR.yes= boot1.chrp ofw - -.include diff --git a/stand/powerpc/Makefile.inc b/stand/powerpc/Makefile.inc deleted file mode 100644 index d3b5cbd3a79..00000000000 --- a/stand/powerpc/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ - -.include "../Makefile.inc" diff --git a/stand/powerpc/boot1.chrp/Makefile b/stand/powerpc/boot1.chrp/Makefile deleted file mode 100644 index 22a3f983aff..00000000000 --- a/stand/powerpc/boot1.chrp/Makefile +++ /dev/null @@ -1,48 +0,0 @@ - -.include - -PROG= boot1.elf -NEWVERSWHAT= "Open Firmware boot block" ${MACHINE_ARCH} -INSTALLFLAGS= -b - -FILES= boot1.hfs -SRCS= boot1.c ashldi3.c syncicache.c - -CFLAGS+=-I${LDRSRC} -# Load boot1.elf below kernel. -# -# Due to limitiations in the way we load stuff, we have to avoid reusing -# memory until the kernel MMU code has taken over. -# -# 0x38000 is high enough to not interfere with the trap area, but low -# enough that it doesn't bump into the kernel area starting at 0x100000, -# even if the entire partition gets used as the load size by a buggy OFW. -# -# In theory 0xf0000 would work too under the current 64k size limit for -# boot1.elf defined in the HFS template, but sometimes boot1.elf is written -# directly to the PReP partition. -# -LDFLAGS=-nostdlib -static -Wl,-N -Wl,-Ttext=0x38000 - -.PATH: ${SYSDIR}/libkern ${SRCTOP}/lib/libc/powerpc/gen ${.CURDIR} - -# The following inserts out objects into a template HFS -# created by generate-hfs.sh - -.include "${.CURDIR}/Makefile.hfs" - -boot1.hfs: boot1.elf bootinfo.txt - echo ${.OBJDIR} - uudecode ${.CURDIR}/hfs.tmpl.bz2.uu - mv hfs.tmpl.bz2 ${.TARGET}.bz2 - bzip2 -f -d ${.TARGET}.bz2 - ${DD} if=boot1.elf of=${.TARGET} seek=${BOOT1_OFFSET} conv=notrunc - ${DD} if=${.CURDIR}/bootinfo.txt of=${.TARGET} seek=${BOOTINFO_OFFSET} \ - conv=notrunc - -CLEANFILES+= boot1.hfs - -MK_PIE= no - -.include - diff --git a/stand/powerpc/boot1.chrp/Makefile.hfs b/stand/powerpc/boot1.chrp/Makefile.hfs deleted file mode 100644 index cd526de8ec7..00000000000 --- a/stand/powerpc/boot1.chrp/Makefile.hfs +++ /dev/null @@ -1,3 +0,0 @@ -# This file autogenerated by generate-hfs.sh - DO NOT EDIT -BOOTINFO_OFFSET=0x9c -BOOT1_OFFSET=0x1c diff --git a/stand/powerpc/boot1.chrp/boot1.c b/stand/powerpc/boot1.chrp/boot1.c deleted file mode 100644 index 17592278ef4..00000000000 --- a/stand/powerpc/boot1.chrp/boot1.c +++ /dev/null @@ -1,865 +0,0 @@ -/*- - * Copyright (c) 1998 Robert Nordier - * All rights reserved. - * Copyright (c) 2001 Robert Drehmel - * All rights reserved. - * - * Redistribution and use in source and binary forms are freely - * permitted provided that the above copyright notice and this - * paragraph and the following disclaimer are duplicated in all - * such forms. - * - * This software is provided "AS IS" and without any express or - * implied warranties, including, without limitation, the implied - * warranties of merchantability and fitness for a particular - * purpose. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "paths.h" - -#define BSIZEMAX 16384 - -typedef int putc_func_t(char c, void *arg); -typedef int32_t ofwh_t; - -struct sp_data { - char *sp_buf; - u_int sp_len; - u_int sp_size; -}; - -static const char digits[] = "0123456789abcdef"; - -static char bootpath[128]; -static char bootargs[128]; - -static ofwh_t bootdev; - -static struct fs fs; -static char blkbuf[BSIZEMAX]; -static unsigned int fsblks; - -static uint32_t fs_off; - -int main(int ac, char **av); - -static void exit(int) __dead2; -static void load(const char *); -static int dskread(void *, uint64_t, int); - -static void usage(void); - -static void bcopy(const void *src, void *dst, size_t len); -static void bzero(void *b, size_t len); - -static int domount(const char *device, int quiet); - -static void panic(const char *fmt, ...) __dead2; -static int printf(const char *fmt, ...); -static int putchar(char c, void *arg); -static int vprintf(const char *fmt, va_list ap); -static int vsnprintf(char *str, size_t sz, const char *fmt, va_list ap); - -static int __printf(const char *fmt, putc_func_t *putc, void *arg, va_list ap); -static int __putc(char c, void *arg); -static int __puts(const char *s, putc_func_t *putc, void *arg); -static int __sputc(char c, void *arg); -static char *__uitoa(char *buf, u_int val, int base); -static char *__ultoa(char *buf, u_long val, int base); - -/* - * Open Firmware interface functions - */ -typedef uint32_t ofwcell_t; -typedef uint32_t u_ofwh_t; -typedef int (*ofwfp_t)(ofwcell_t *); -ofwfp_t ofw; /* the prom Open Firmware entry */ -ofwh_t chosenh; - -void ofw_init(void *, int, ofwfp_t, char *, int); -static ofwh_t ofw_finddevice(const char *); -static ofwh_t ofw_open(const char *); -static int ofw_close(ofwh_t); -static int ofw_getprop(ofwh_t, const char *, void *, size_t); -static int ofw_setprop(ofwh_t, const char *, void *, size_t); -static int ofw_read(ofwh_t, void *, size_t); -static int ofw_write(ofwh_t, const void *, size_t); -static int ofw_claim(void *virt, size_t len, u_int align); -static int ofw_seek(ofwh_t, uint64_t); -static void ofw_exit(void) __dead2; - -ofwh_t bootdevh; -ofwh_t stdinh, stdouth; - -/* - * Note about the entry point: - * - * For some odd reason, the first page of the load appears to have trouble - * when entering in LE. The first five instructions decode weirdly. - * I suspect it is some cache weirdness between the ELF headers and .text. - * - * Ensure we have a gap between the start of .text and the entry as a - * workaround. - */ -__asm(" \n\ - .data \n\ - .align 4 \n\ -stack: \n\ - .space 16384 \n\ - \n\ - .text \n\ - /* SLOF cache hack */ \n\ - .space 4096 \n\ - .globl _start \n\ -_start: \n\ - lis %r1,stack@ha \n\ - addi %r1,%r1,stack@l \n\ - addi %r1,%r1,8192 \n\ - \n\ - b ofw_init \n\ -"); - -ofwfp_t realofw; - -#if BYTE_ORDER == LITTLE_ENDIAN -/* - * Minimal endianness-swap trampoline for LE. - */ -__attribute__((naked)) int -ofwtramp(void *buf, ofwfp_t cb) -{ -__asm(" \n\ - mflr %r0 \n\ - stw %r0, 4(%r1) \n\ - stwu %r1, -16(%r1) \n\ - stw %r30, 8(%r1) \n\ - /* Save current MSR for restoration post-call. */ \n\ - mfmsr %r30 \n\ - mr %r5, %r30 \n\ - /* Remove LE bit from MSR. */ \n\ - clrrwi %r5, %r5, 1 \n\ - mtsrr0 %r4 \n\ - mtsrr1 %r5 \n\ - bcl 20, 31, .+4 /* LOAD_LR_NIA */ \n\ -1: \n\ - mflr %r4 \n\ - addi %r4, %r4, (2f - 1b) \n\ - mtlr %r4 \n\ - /* Switch to BE and transfer control to OF entry */ \n\ - rfid \n\ -2: \n\ - /* Control is returned here, but in BE. */ \n\ - .long 0x05009f42 /* LOAD_LR_NIA */\n\ - /* 0: */\n\ - .long 0xa603db7f /* mtsrr1 %r30 */\n\ - .long 0xa602c87f /* mflr %r30 */\n\ - .long 0x1400de3b /* addi %r30, %r30, (1f - 0b) */\n\ - .long 0xa603da7f /* mtsrr0 %r30 */\n\ - .long 0x2400004c /* rfid */\n\ - /* 1: */\n\ -1: \n\ - /* Back to normal. Tidy up for return. */ \n\ - lwz %r30, 8(%r1) \n\ - lwz %r0, 20(%r1) \n\ - addi %r1, %r1, 16 \n\ - mtlr %r0 \n\ - blr \n\ -"); -} - -/* - * Little-endian OFW entrypoint replacement. - * - * We are doing all the byteswapping in one place here to save space. - * This means instance handles will be byteswapped as well. - */ -int -call_ofw(ofwcell_t* buf) -{ - int ret, i, ncells; - - ncells = 3 + buf[1] + buf[2]; - for (i = 0; i < ncells; i++) - buf[i] = htobe32(buf[i]); - - ret = (ofwtramp(buf, realofw)); - for (i = 0; i < ncells; i++) - buf[i] = be32toh(buf[i]); - return (ret); -} -#endif - -void -ofw_init(void *vpd, int res, ofwfp_t openfirm, char *arg, int argl) -{ - char *av[16]; - char *p; - int ac; - -#if BYTE_ORDER == LITTLE_ENDIAN - realofw = openfirm; - ofw = call_ofw; -#else - realofw = ofw = openfirm; -#endif - - chosenh = ofw_finddevice("/chosen"); - ofw_getprop(chosenh, "stdin", &stdinh, sizeof(stdinh)); - stdinh = be32toh(stdinh); - ofw_getprop(chosenh, "stdout", &stdouth, sizeof(stdouth)); - stdouth = be32toh(stdouth); - ofw_getprop(chosenh, "bootargs", bootargs, sizeof(bootargs)); - ofw_getprop(chosenh, "bootpath", bootpath, sizeof(bootpath)); - - bootargs[sizeof(bootargs) - 1] = '\0'; - bootpath[sizeof(bootpath) - 1] = '\0'; - - p = bootpath; - while (*p != '\0') { - /* Truncate partition ID */ - if (*p == ':') { - ofw_close(bootdev); - *(++p) = '\0'; - break; - } - p++; - } - - ac = 0; - p = bootargs; - for (;;) { - while (*p == ' ' && *p != '\0') - p++; - if (*p == '\0' || ac >= 16) - break; - av[ac++] = p; - while (*p != ' ' && *p != '\0') - p++; - if (*p != '\0') - *p++ = '\0'; - } - - exit(main(ac, av)); -} - -static ofwh_t -ofw_finddevice(const char *name) -{ - ofwcell_t args[] = { - (ofwcell_t)"finddevice", - 1, - 1, - (ofwcell_t)name, - 0 - }; - - if ((*ofw)(args)) { - printf("ofw_finddevice: name=\"%s\"\n", name); - return (1); - } - return (args[4]); -} - -static int -ofw_getprop(ofwh_t ofwh, const char *name, void *buf, size_t len) -{ - ofwcell_t args[] = { - (ofwcell_t)"getprop", - 4, - 1, - (u_ofwh_t)ofwh, - (ofwcell_t)name, - (ofwcell_t)buf, - len, - 0 - }; - - if ((*ofw)(args)) { - printf("ofw_getprop: ofwh=0x%x buf=%p len=%u\n", - ofwh, buf, len); - return (1); - } - return (0); -} - -static int -ofw_setprop(ofwh_t ofwh, const char *name, void *buf, size_t len) -{ - ofwcell_t args[] = { - (ofwcell_t)"setprop", - 4, - 1, - (u_ofwh_t)ofwh, - (ofwcell_t)name, - (ofwcell_t)buf, - len, - 0 - }; - - if ((*ofw)(args)) { - printf("ofw_setprop: ofwh=0x%x buf=%p len=%u\n", - ofwh, buf, len); - return (1); - } - return (0); -} - -static ofwh_t -ofw_open(const char *path) -{ - ofwcell_t args[] = { - (ofwcell_t)"open", - 1, - 1, - (ofwcell_t)path, - 0 - }; - - if ((*ofw)(args)) { - printf("ofw_open: path=\"%s\"\n", path); - return (-1); - } - return (args[4]); -} - -static int -ofw_close(ofwh_t devh) -{ - ofwcell_t args[] = { - (ofwcell_t)"close", - 1, - 0, - (u_ofwh_t)devh - }; - - if ((*ofw)(args)) { - printf("ofw_close: devh=0x%x\n", devh); - return (1); - } - return (0); -} - -static int -ofw_claim(void *virt, size_t len, u_int align) -{ - ofwcell_t args[] = { - (ofwcell_t)"claim", - 3, - 1, - (ofwcell_t)virt, - len, - align, - 0, - 0 - }; - - if ((*ofw)(args)) { - printf("ofw_claim: virt=%p len=%u\n", virt, len); - return (1); - } - - return (0); -} - -static int -ofw_read(ofwh_t devh, void *buf, size_t len) -{ - ofwcell_t args[] = { - (ofwcell_t)"read", - 3, - 1, - (u_ofwh_t)devh, - (ofwcell_t)buf, - len, - 0 - }; - - if ((*ofw)(args)) { - printf("ofw_read: devh=0x%x buf=%p len=%u\n", devh, buf, len); - return (1); - } - return (0); -} - -static int -ofw_write(ofwh_t devh, const void *buf, size_t len) -{ - ofwcell_t args[] = { - (ofwcell_t)"write", - 3, - 1, - (u_ofwh_t)devh, - (ofwcell_t)buf, - len, - 0 - }; - - if ((*ofw)(args)) { - printf("ofw_write: devh=0x%x buf=%p len=%u\n", devh, buf, len); - return (1); - } - return (0); -} - -static int -ofw_seek(ofwh_t devh, uint64_t off) -{ - ofwcell_t args[] = { - (ofwcell_t)"seek", - 3, - 1, - (u_ofwh_t)devh, - off >> 32, - off, - 0 - }; - - if ((*ofw)(args)) { - printf("ofw_seek: devh=0x%x off=0x%lx\n", devh, off); - return (1); - } - return (0); -} - -static void -ofw_exit(void) -{ - ofwcell_t args[3]; - - args[0] = (ofwcell_t)"exit"; - args[1] = 0; - args[2] = 0; - - for (;;) - (*ofw)(args); -} - -static void -bcopy(const void *src, void *dst, size_t len) -{ - const char *s = src; - char *d = dst; - - while (len-- != 0) - *d++ = *s++; -} - -static void -memcpy(void *dst, const void *src, size_t len) -{ - bcopy(src, dst, len); -} - -static void -bzero(void *b, size_t len) -{ - char *p = b; - - while (len-- != 0) - *p++ = 0; -} - -static int -strcmp(const char *s1, const char *s2) -{ - for (; *s1 == *s2 && *s1; s1++, s2++) - ; - return ((u_char)*s1 - (u_char)*s2); -} - -#include "ufsread.c" - -int -main(int ac, char **av) -{ - const char *path; - char bootpath_full[255]; - int i, len; - - path = PATH_LOADER; - for (i = 0; i < ac; i++) { - switch (av[i][0]) { - case '-': - switch (av[i][1]) { - default: - usage(); - } - break; - default: - path = av[i]; - break; - } - } - - printf(" \n>> MidnightBSD/powerpc Open Firmware boot block\n" - " Boot path: %s\n" - " Boot loader: %s\n", bootpath, path); - - len = 0; - while (bootpath[len] != '\0') len++; - - memcpy(bootpath_full,bootpath,len+1); - - if (bootpath_full[len-1] != ':') { - /* First try full volume */ - if (domount(bootpath_full,1) == 0) - goto out; - - /* Add a : so that we try partitions if that fails */ - if (bootdev > 0) - ofw_close(bootdev); - bootpath_full[len] = ':'; - len += 1; - } - - /* Loop through first 16 partitions to find a UFS one */ - for (i = 0; i < 16; i++) { - if (i < 10) { - bootpath_full[len] = i + '0'; - bootpath_full[len+1] = '\0'; - } else { - bootpath_full[len] = '1'; - bootpath_full[len+1] = i - 10 + '0'; - bootpath_full[len+2] = '\0'; - } - - if (domount(bootpath_full,1) >= 0) - break; - - if (bootdev > 0) - ofw_close(bootdev); - } - - if (i >= 16) - panic("domount"); - -out: - printf(" Boot volume: %s\n",bootpath_full); - ofw_setprop(chosenh, "bootargs", bootpath_full, len+2); - load(path); - return (1); -} - -static void -usage(void) -{ - - printf("usage: boot device [/path/to/loader]\n"); - exit(1); -} - -static void -exit(int code) -{ - - ofw_exit(); -} - -static struct dmadat __dmadat; - -static int -domount(const char *device, int quiet) -{ - - dmadat = &__dmadat; - if ((bootdev = ofw_open(device)) == -1) { - printf("domount: can't open device\n"); - return (-1); - } - if (fsread(0, NULL, 0)) { - if (!quiet) - printf("domount: can't read superblock\n"); - return (-1); - } - return (0); -} - -static void -load(const char *fname) -{ - Elf32_Ehdr eh; - Elf32_Phdr ph; - caddr_t p; - ufs_ino_t ino; - int i; - - if ((ino = lookup(fname)) == 0) { - printf("File %s not found\n", fname); - return; - } - if (fsread(ino, &eh, sizeof(eh)) != sizeof(eh)) { - printf("Can't read elf header\n"); - return; - } - if (!IS_ELF(eh)) { - printf("Not an ELF file\n"); - return; - } - for (i = 0; i < eh.e_phnum; i++) { - fs_off = eh.e_phoff + i * eh.e_phentsize; - if (fsread(ino, &ph, sizeof(ph)) != sizeof(ph)) { - printf("Can't read program header %d\n", i); - return; - } - if (ph.p_type != PT_LOAD) - continue; - fs_off = ph.p_offset; - p = (caddr_t)ph.p_vaddr; - ofw_claim(p,(ph.p_filesz > ph.p_memsz) ? - ph.p_filesz : ph.p_memsz,0); - if (fsread(ino, p, ph.p_filesz) != ph.p_filesz) { - printf("Can't read content of section %d\n", i); - return; - } - if (ph.p_filesz != ph.p_memsz) - bzero(p + ph.p_filesz, ph.p_memsz - ph.p_filesz); - __syncicache(p, ph.p_memsz); - } - ofw_close(bootdev); - (*(void (*)(void *, int, ofwfp_t, char *, int))eh.e_entry)(NULL, 0, - realofw, NULL, 0); -} - -static int -dskread(void *buf, uint64_t lba, int nblk) -{ - /* - * The Open Firmware should open the correct partition for us. - * That means, if we read from offset zero on an open instance handle, - * we should read from offset zero of that partition. - */ - ofw_seek(bootdev, lba * DEV_BSIZE); - ofw_read(bootdev, buf, nblk * DEV_BSIZE); - return (0); -} - -static void -panic(const char *fmt, ...) -{ - char buf[128]; - va_list ap; - - va_start(ap, fmt); - vsnprintf(buf, sizeof buf, fmt, ap); - printf("panic: %s\n", buf); - va_end(ap); - - exit(1); -} - -static int -printf(const char *fmt, ...) -{ - va_list ap; - int ret; - - va_start(ap, fmt); - ret = vprintf(fmt, ap); - va_end(ap); - return (ret); -} - -static int -putchar(char c, void *arg) -{ - char buf; - - if (c == '\n') { - buf = '\r'; - ofw_write(stdouth, &buf, 1); - } - buf = c; - ofw_write(stdouth, &buf, 1); - return (1); -} - -static int -vprintf(const char *fmt, va_list ap) -{ - int ret; - - ret = __printf(fmt, putchar, 0, ap); - return (ret); -} - -static int -vsnprintf(char *str, size_t sz, const char *fmt, va_list ap) -{ - struct sp_data sp; - int ret; - - sp.sp_buf = str; - sp.sp_len = 0; - sp.sp_size = sz; - ret = __printf(fmt, __sputc, &sp, ap); - return (ret); -} - -static int -__printf(const char *fmt, putc_func_t *putc, void *arg, va_list ap) -{ - char buf[(sizeof(long) * 8) + 1]; - char *nbuf; - u_long ul; - u_int ui; - int lflag; - int sflag; - char *s; - int pad; - int ret; - int c; - - nbuf = &buf[sizeof buf - 1]; - ret = 0; - while ((c = *fmt++) != 0) { - if (c != '%') { - ret += putc(c, arg); - continue; - } - lflag = 0; - sflag = 0; - pad = 0; -reswitch: c = *fmt++; - switch (c) { - case '#': - sflag = 1; - goto reswitch; - case '%': - ret += putc('%', arg); - break; - case 'c': - c = va_arg(ap, int); - ret += putc(c, arg); - break; - case 'd': - if (lflag == 0) { - ui = (u_int)va_arg(ap, int); - if (ui < (int)ui) { - ui = -ui; - ret += putc('-', arg); - } - s = __uitoa(nbuf, ui, 10); - } else { - ul = (u_long)va_arg(ap, long); - if (ul < (long)ul) { - ul = -ul; - ret += putc('-', arg); - } - s = __ultoa(nbuf, ul, 10); - } - ret += __puts(s, putc, arg); - break; - case 'l': - lflag = 1; - goto reswitch; - case 'o': - if (lflag == 0) { - ui = (u_int)va_arg(ap, u_int); - s = __uitoa(nbuf, ui, 8); - } else { - ul = (u_long)va_arg(ap, u_long); - s = __ultoa(nbuf, ul, 8); - } - ret += __puts(s, putc, arg); - break; - case 'p': - ul = (u_long)va_arg(ap, void *); - s = __ultoa(nbuf, ul, 16); - ret += __puts("0x", putc, arg); - ret += __puts(s, putc, arg); - break; - case 's': - s = va_arg(ap, char *); - ret += __puts(s, putc, arg); - break; - case 'u': - if (lflag == 0) { - ui = va_arg(ap, u_int); - s = __uitoa(nbuf, ui, 10); - } else { - ul = va_arg(ap, u_long); - s = __ultoa(nbuf, ul, 10); - } - ret += __puts(s, putc, arg); - break; - case 'x': - if (lflag == 0) { - ui = va_arg(ap, u_int); - s = __uitoa(nbuf, ui, 16); - } else { - ul = va_arg(ap, u_long); - s = __ultoa(nbuf, ul, 16); - } - if (sflag) - ret += __puts("0x", putc, arg); - ret += __puts(s, putc, arg); - break; - case '0': case '1': case '2': case '3': case '4': - case '5': case '6': case '7': case '8': case '9': - pad = pad * 10 + c - '0'; - goto reswitch; - default: - break; - } - } - return (ret); -} - -static int -__sputc(char c, void *arg) -{ - struct sp_data *sp; - - sp = arg; - if (sp->sp_len < sp->sp_size) - sp->sp_buf[sp->sp_len++] = c; - sp->sp_buf[sp->sp_len] = '\0'; - return (1); -} - -static int -__puts(const char *s, putc_func_t *putc, void *arg) -{ - const char *p; - int ret; - - ret = 0; - for (p = s; *p != '\0'; p++) - ret += putc(*p, arg); - return (ret); -} - -static char * -__uitoa(char *buf, u_int ui, int base) -{ - char *p; - - p = buf; - *p = '\0'; - do - *--p = digits[ui % base]; - while ((ui /= base) != 0); - return (p); -} - -static char * -__ultoa(char *buf, u_long ul, int base) -{ - char *p; - - p = buf; - *p = '\0'; - do - *--p = digits[ul % base]; - while ((ul /= base) != 0); - return (p); -} diff --git a/stand/powerpc/boot1.chrp/bootinfo.txt b/stand/powerpc/boot1.chrp/bootinfo.txt deleted file mode 100644 index 61cf0079fa6..00000000000 --- a/stand/powerpc/boot1.chrp/bootinfo.txt +++ /dev/null @@ -1,14 +0,0 @@ - -FreeBSD/powerpc bootloader -FreeBSD - $FreeBSD$ - - -MacRISC MacRISC3 MacRISC4 - - -" screen" output -boot &device;:&partition;,\ppc\boot1.elf - - - diff --git a/stand/powerpc/boot1.chrp/generate-hfs.sh b/stand/powerpc/boot1.chrp/generate-hfs.sh deleted file mode 100755 index 649e89b7323..00000000000 --- a/stand/powerpc/boot1.chrp/generate-hfs.sh +++ /dev/null @@ -1,60 +0,0 @@ -#!/bin/sh - -# This script generates the dummy HFS filesystem used for the PowerPC boot -# blocks. It uses hfsutils (emulators/hfsutils) to generate a template -# filesystem with the relevant interesting files. These are then found by -# grep, and the offsets written to a Makefile snippet. -# -# Because of licensing concerns, and because it is overkill, we do not -# distribute hfsutils as a build tool. If you need to regenerate the HFS -# template (e.g. because the boot block or the CHRP script have grown), -# you must install it from ports. - -HFS_SIZE=1600 #Size in 512-byte blocks of the produced image - -CHRPBOOT_SIZE=2k -BOOT1_SIZE=64k - -# Generate 800K HFS image -OUTPUT_FILE=hfs.tmpl - -dd if=/dev/zero of=$OUTPUT_FILE bs=512 count=$HFS_SIZE -hformat -l "MidnightBSD Bootstrap" $OUTPUT_FILE -hmount $OUTPUT_FILE - -# Create and bless a directory for the boot loader -hmkdir ppc -hattrib -b ppc -hcd ppc - -# Make two dummy files for the CHRP boot script and boot1 -echo 'Bootinfo START' | dd of=bootinfo.txt.tmp cbs=$CHRPBOOT_SIZE count=1 conv=block -echo 'Boot1 START' | dd of=boot1.elf.tmp cbs=$BOOT1_SIZE count=1 conv=block - -hcopy boot1.elf.tmp :boot1.elf -hcopy bootinfo.txt.tmp :bootinfo.txt -hattrib -c chrp -t tbxi bootinfo.txt -humount - -rm bootinfo.txt.tmp -rm boot1.elf.tmp - -# Locate the offsets of the two fake files -BOOTINFO_OFFSET=$(hd $OUTPUT_FILE | grep 'Bootinfo START' | cut -f 1 -d ' ') -BOOT1_OFFSET=$(hd $OUTPUT_FILE | grep 'Boot1 START' | cut -f 1 -d ' ') - -# Convert to numbers of blocks -BOOTINFO_OFFSET=$(echo 0x$BOOTINFO_OFFSET | awk '{printf("%x\n",$1/512);}') -BOOT1_OFFSET=$(echo 0x$BOOT1_OFFSET | awk '{printf("%x\n",$1/512);}') - -echo '# This file autogenerated by generate-hfs.sh - DO NOT EDIT' > Makefile.hfs -echo "BOOTINFO_OFFSET=0x$BOOTINFO_OFFSET" >> Makefile.hfs -echo "BOOT1_OFFSET=0x$BOOT1_OFFSET" >> Makefile.hfs - -bzip2 $OUTPUT_FILE -echo 'HFS template boot filesystem created by generate-hfs.sh' > $OUTPUT_FILE.bz2.uu -echo 'DO NOT EDIT' >> $OUTPUT_FILE.bz2.uu - -uuencode $OUTPUT_FILE.bz2 $OUTPUT_FILE.bz2 >> $OUTPUT_FILE.bz2.uu -rm $OUTPUT_FILE.bz2 - diff --git a/stand/powerpc/boot1.chrp/hfs.tmpl.bz2.uu b/stand/powerpc/boot1.chrp/hfs.tmpl.bz2.uu deleted file mode 100644 index 4adb468de6a..00000000000 --- a/stand/powerpc/boot1.chrp/hfs.tmpl.bz2.uu +++ /dev/null @@ -1,17 +0,0 @@ -HFS template boot filesystem created by generate-hfs.sh -DO NOT EDIT -begin 644 hfs.tmpl.bz2 -M0EIH.3%!629365^MV6L``"]__O___M)20>!0O2$>0#MUW$!$``%%$``@``!` -M!`!R2<`![@H2"2A2-Z)-HC]4`:`-``T:&@&@#0/TTH<`PC":8A@$`R`&$:9, -MF$8"&AP#",)IB&`0#(`81IDR81@(:")0HT*>4,:0TT`:!ZC0/*/4/1&@;4>H -M&@RYG-FL-,\=C91FTSS@99`O+OA;*$ZN3-&UF`W@#SP:;MVF_EN,-]P$ZN2B -M=";7YHA7VT!#<@,B`H*?S#?Q;CUJ8H8+9:E)+4"L7'CL5&D.IO4;H98%^4@[ -M9`*L&1``5*0#A(EB8BH`S'1O^N -M)Y6'!#N:*:JYTEX\:%'"?.G$FCP8TM_0/ND`^IG3[ -M.QUEDP&P>3+Z442Q!:S.A1>00]'X'D%)UX9QZ>$Q?(808QB-4%9BBTL"L(BB -MEJ*'HH820Q$'%G':JF.:>$U4H`0S`:GSZM-C5BNX(2&$B"J*45`"4FEZ__%W -))%.%"07ZW9:P -` -end diff --git a/stand/powerpc/ofw/Makefile b/stand/powerpc/ofw/Makefile deleted file mode 100644 index 2beb315a4d4..00000000000 --- a/stand/powerpc/ofw/Makefile +++ /dev/null @@ -1,67 +0,0 @@ - -LOADER_CD9660_SUPPORT?= yes -LOADER_EXT2FS_SUPPORT?= no -LOADER_MSDOS_SUPPORT?= no -LOADER_UFS_SUPPORT?= yes -LOADER_NET_SUPPORT?= yes -LOADER_NFS_SUPPORT?= yes -LOADER_TFTP_SUPPORT?= no -LOADER_GZIP_SUPPORT?= yes -LOADER_BZIP2_SUPPORT?= no - -.include - -PROG= loader -NEWVERSWHAT= "Open Firmware loader" ${MACHINE_ARCH} -INSTALLFLAGS= -b - -# Architecture-specific loader code -SRCS= conf.c vers.c main.c elf_freebsd.c ppc64_elf_freebsd.c start.c -SRCS+= ucmpdi2.c gfx_fb_stub.c - -CFLAGS.gfx_fb_stub.c += -I${SRCTOP}/contrib/pnglite -I${SRCTOP}/sys/teken - -.include "${BOOTSRC}/fdt.mk" -.if ${MK_FDT} == "yes" -SRCS+= ofwfdt.c -.endif - -.if ${MACHINE_ARCH:Mpowerpc64*} != "" -SRCS+= cas.c -CFLAGS+= -DCAS -.endif - -.if ${MACHINE_ARCH} == "powerpc64le" -SRCS+= trampolineLE.S -.endif - -HELP_FILES= ${FDTSRC}/help.fdt -HELP_FILENAME= loader.help.ofw - -# Always add MI sources -.include "${BOOTSRC}/loader.mk" - -.PATH: ${SYSDIR}/libkern - -# load address. set in linker script -RELOC?= 0x1C00000 -CFLAGS+= -DRELOC=${RELOC} -g - -LDFLAGS= -nostdlib -static - -.if ${MACHINE_ARCH} == "powerpc64le" -LDFLAGS+= -T ${.CURDIR}/ldscript.powerpcle -.else -LDFLAGS+= -T ${.CURDIR}/ldscript.powerpc -.endif - -# Open Firmware standalone support library -LIBOFW= ${BOOTOBJ}/libofw/libofw.a -CFLAGS+= -I${BOOTSRC}/libofw - -DPADD= ${LDR_INTERP} ${LIBOFW} ${LIBFDT} ${LIBSA} -LDADD= ${LDR_INTERP} ${LIBOFW} ${LIBFDT} ${LIBSA} - -MK_PIE= no - -.include diff --git a/stand/powerpc/ofw/cas.c b/stand/powerpc/ofw/cas.c deleted file mode 100644 index 93816fa07cf..00000000000 --- a/stand/powerpc/ofw/cas.c +++ /dev/null @@ -1,265 +0,0 @@ -/*- - * Copyright (c) 2019 Leandro Lupori - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include - -#include - -/* #define CAS_DEBUG */ -#ifdef CAS_DEBUG -#define DPRINTF(fmt, ...) printf(fmt, ## __VA_ARGS__) -#else -#define DPRINTF(fmt, ...) do { ; } while (0) -#endif - -/* PVR */ -#define PVR_CPU_P8E 0x004b0000 -#define PVR_CPU_P8NVL 0x004c0000 -#define PVR_CPU_P8 0x004d0000 -#define PVR_CPU_P9 0x004e0000 -#define PVR_CPU_MASK 0xffff0000 - -#define PVR_ISA_207 0x0f000004 -#define PVR_ISA_300 0x0f000005 -#define PVR_ISA_MASK 0xffffffff - -/* loader version of kernel's CPU_MAXSIZE */ -#define MAX_CPUS ((uint32_t)256u) - -/* Option Vectors' settings */ - -/* length of ignored OV */ -#define OV_IGN_LEN 0 - -/* byte 1 (of any OV) */ -#define OV_IGN 0x80 - -/* Option Vector 5 */ - -/* byte 2 */ -#define OV5_LPAR 0x80 -#define OV5_SPLPAR 0x40 -#define OV5_DRMEM 0x20 -#define OV5_LP 0x10 -#define OV5_ALPHA_PART 0x08 -#define OV5_DMA_DELAY 0x04 -#define OV5_DONATE_CPU 0x02 -#define OV5_MSI 0x01 - -/* 9-12: max cpus */ -#define OV5_MAX_CPUS(n) ((MAX_CPUS >> (3*8 - (n)*8)) & 0xff) - -/* 13-14: LoPAPR Level */ -#define LOPAPR_LEVEL 0x0101 /* 1.1 */ -#define OV5_LOPAPR_LEVEL(n) ((LOPAPR_LEVEL >> (8 - (n)*8)) & 0xff) - -/* byte 17: Platform Facilities */ -#define OV5_RNG 0x80 -#define OV5_COMP_ENG 0x40 -#define OV5_ENC_ENG 0x20 - -/* byte 21: Sub-Processors */ -#define OV5_NO_SUBPROCS 0 -#define OV5_SUBPROCS 1 - -/* byte 23: interrupt controller */ -#define OV5_INTC_XICS 0 - -/* byte 24: MMU */ -#define OV5_MMU_INDEX 24 -#define OV5_MMU_HPT 0 -#define OV5_MMU_RADIX 0x40 -#define OV5_MMU_EITHER 0x80 -#define OV5_MMU_DYNAMIC 0xc0 - -/* byte 25: HPT MMU Extensions */ -#define OV5_HPT_EXT_INDEX 25 -#define OV5_HPT_GTSE 0x40 - -/* byte 26: Radix MMU Extensions */ -#define OV5_RADIX_EXT_INDEX 26 -#define OV5_RADIX_GTSE 0x40 - - -struct pvr { - uint32_t mask; - uint32_t val; -}; - -struct opt_vec_ignore { - char data[2]; -} __packed; - -struct opt_vec4 { - char data[3]; -} __packed; - -struct opt_vec5 { - char data[27]; -} __packed; - -static struct ibm_arch_vec { - struct pvr pvr_list[7]; - uint8_t num_opts; - struct opt_vec_ignore vec1; - struct opt_vec_ignore vec2; - struct opt_vec_ignore vec3; - struct opt_vec4 vec4; - struct opt_vec5 vec5; -} __packed ibm_arch_vec = { - /* pvr_list */ { - { htobe32(PVR_CPU_MASK), htobe32(PVR_CPU_P8) }, - { htobe32(PVR_CPU_MASK), htobe32(PVR_CPU_P8E) }, - { htobe32(PVR_CPU_MASK), htobe32(PVR_CPU_P8NVL) }, - { htobe32(PVR_CPU_MASK), htobe32(PVR_CPU_P9) }, - { htobe32(PVR_ISA_MASK), htobe32(PVR_ISA_207) }, - { htobe32(PVR_ISA_MASK), htobe32(PVR_ISA_300) }, - { 0, 0xffffffffu } /* terminator */ - }, - 4, /* num_opts (4 actually means 5 option vectors) */ - { OV_IGN_LEN, OV_IGN }, /* OV1 */ - { OV_IGN_LEN, OV_IGN }, /* OV2 */ - { OV_IGN_LEN, OV_IGN }, /* OV3 */ - /* OV4 (can't be ignored) */ { - sizeof(struct opt_vec4) - 2, /* length (n-2) */ - 0, - 10 /* Minimum VP entitled capacity percentage * 100 - * (if absent assume 10%) */ - }, - /* OV5 */ { - sizeof(struct opt_vec5) - 2, /* length (n-2) */ - 0, /* don't ignore */ - OV5_LPAR | OV5_SPLPAR | OV5_LP | OV5_MSI, - 0, - 0, /* Cooperative Memory Over-commitment */ - 0, /* Associativity Information Option */ - 0, /* Binary Option Controls */ - 0, /* Reserved */ - 0, /* Reserved */ - OV5_MAX_CPUS(0), - OV5_MAX_CPUS(1), /* 10 */ - OV5_MAX_CPUS(2), - OV5_MAX_CPUS(3), - OV5_LOPAPR_LEVEL(0), - OV5_LOPAPR_LEVEL(1), - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Platform Facilities */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ /* 20 */ - OV5_NO_SUBPROCS, - 0, /* DRMEM_V2 */ - OV5_INTC_XICS, - OV5_MMU_HPT, - 0, - 0 - } -}; - -int -ppc64_cas(void) -{ - phandle_t pkg; - ihandle_t inst; - cell_t err; - uint8_t buf[16], idx, val; - int i, len, rc, radix_mmu; - const char *var; - char *ov5; - - pkg = OF_finddevice("/chosen"); - if (pkg == -1) { - printf("cas: couldn't find /chosen\n"); - return (-1); - } - - len = OF_getprop(pkg, "ibm,arch-vec-5-platform-support", buf, - sizeof(buf)); - if (len == -1) - /* CAS not supported */ - return (0); - - radix_mmu = 0; - ov5 = ibm_arch_vec.vec5.data; - for (i = 0; i < len; i += 2) { - idx = buf[i]; - val = buf[i + 1]; - DPRINTF("idx 0x%02x val 0x%02x\n", idx, val); - - switch (idx) { - case OV5_MMU_INDEX: - /* - * Note that testing for OV5_MMU_RADIX/OV5_MMU_EITHER - * also covers OV5_MMU_DYNAMIC. - */ - if ((val & OV5_MMU_RADIX) || (val & OV5_MMU_EITHER)) - radix_mmu = 1; - break; - - case OV5_RADIX_EXT_INDEX: - if (val & OV5_RADIX_GTSE) - ov5[idx] = OV5_RADIX_GTSE; - break; - - case OV5_HPT_EXT_INDEX: - default: - break; - } - } - - if (!radix_mmu) - /* - * If radix is not supported, set radix_mmu to 0 to avoid - * the kernel trying to use it and panic. - */ - setenv("radix_mmu", "0", 1); - else if ((var = getenv("radix_mmu")) != NULL && var[0] == '0') - radix_mmu = 0; - else - ov5[OV5_MMU_INDEX] = OV5_MMU_RADIX; - - inst = OF_open("/"); - if (inst == -1) { - printf("cas: failed to open / node\n"); - return (-1); - } - - DPRINTF("MMU 0x%02x RADIX_EXT 0x%02x\n", - ov5[OV5_MMU_INDEX], ov5[OV5_RADIX_EXT_INDEX]); - rc = OF_call_method("ibm,client-architecture-support", - inst, 1, 1, &ibm_arch_vec, &err); - if (rc != 0 || err) { - printf("cas: CAS method returned an error: rc %d err %jd\n", - rc, (intmax_t)err); - rc = -1; - } - - OF_close(inst); - printf("cas: selected %s MMU\n", radix_mmu ? "radix" : "hash"); - return (rc); -} diff --git a/stand/powerpc/ofw/conf.c b/stand/powerpc/ofw/conf.c deleted file mode 100644 index 4930eea1864..00000000000 --- a/stand/powerpc/ofw/conf.c +++ /dev/null @@ -1,126 +0,0 @@ -/*- - * Copyright (c) 1999 Michael Smith - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include "bootstrap.h" -#include "libofw.h" -#include "openfirm.h" - -#if defined(LOADER_NET_SUPPORT) -#include "dev_net.h" -#endif - -/* Make sure we have an explicit reference to exit so libsa's panic pulls in the MD exit */ -void (*exitfn)(int) = exit; - -/* - * We could use linker sets for some or all of these, but - * then we would have to control what ended up linked into - * the bootstrap. So it's easier to conditionalise things - * here. - * - * XXX rename these arrays to be consistent and less namespace-hostile - */ - -/* Exported for libsa */ -struct devsw *devsw[] = { -#if defined(LOADER_DISK_SUPPORT) || defined(LOADER_CD9660_SUPPORT) - &ofwdisk, -#endif -#if defined(LOADER_NET_SUPPORT) - &ofw_netdev, -#endif - NULL -}; - -struct fs_ops *file_system[] = { -#if defined(LOADER_UFS_SUPPORT) - &ufs_fsops, -#endif -#if defined(LOADER_CD9660_SUPPORT) - &cd9660_fsops, -#endif -#if defined(LOADER_EXT2FS_SUPPORT) - &ext2fs_fsops, -#endif -#if defined(LOADER_MSDOS_SUPPORT) - &dosfs_fsops, -#endif -#if defined(LOADER_NFS_SUPPORT) - &nfs_fsops, -#endif -#if defined(LOADER_TFTP_SUPPORT) - &tftp_fsops, -#endif -#if defined(LOADER_GZIP_SUPPORT) - &gzipfs_fsops, -#endif -#if defined(LOADER_BZIP2_SUPPORT) - &bzipfs_fsops, -#endif - NULL -}; - -struct netif_driver *netif_drivers[] = { -#if defined(LOADER_NET_SUPPORT) - &ofwnet, -#endif - NULL, -}; - -/* Exported for PowerPC only */ -/* - * Sort formats so that those that can detect based on arguments - * rather than reading the file go first. - */ - -extern struct file_format ofw_elf; -extern struct file_format ofw_elf64; - -struct file_format *file_formats[] = { - &ofw_elf, - &ofw_elf64, - NULL -}; - -/* - * Consoles - * - * We don't prototype these in libofw.h because they require - * data structures from bootstrap.h as well. - */ -extern struct console ofwconsole; - -struct console *consoles[] = { - &ofwconsole, - NULL -}; - -/* - * reloc - our load address - */ -vm_offset_t reloc = RELOC; diff --git a/stand/powerpc/ofw/elf_freebsd.c b/stand/powerpc/ofw/elf_freebsd.c deleted file mode 100644 index 5cd8a974cfb..00000000000 --- a/stand/powerpc/ofw/elf_freebsd.c +++ /dev/null @@ -1,105 +0,0 @@ -/*- - * Copyright (c) 2001 Benno Rice - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include - -#include -#include -#if defined(__powerpc__) -#include -#endif - -#include - -#include "bootstrap.h" -#include "libofw.h" -#include "openfirm.h" -#include "modinfo.h" - -extern char end[]; -extern vm_offset_t reloc; /* From /conf.c */ - -int -__elfN(ofw_loadfile)(char *filename, uint64_t dest, - struct preloaded_file **result) -{ - int r; - - r = __elfN(loadfile)(filename, dest, result); - if (r != 0) - return (r); - -#if defined(__powerpc__) - /* - * No need to sync the icache for modules: this will - * be done by the kernel after relocation. - */ - if (!strcmp((*result)->f_type, "elf kernel")) - __syncicache((void *) (*result)->f_addr, (*result)->f_size); -#endif - return (0); -} - -int -__elfN(ofw_exec)(struct preloaded_file *fp) -{ - struct file_metadata *fmp; - vm_offset_t mdp, dtbp; - Elf_Ehdr *e; - int error; - intptr_t entry; - - if ((fmp = file_findmetadata(fp, MODINFOMD_ELFHDR)) == NULL) { - return(EFTYPE); - } - e = (Elf_Ehdr *)&fmp->md_data; - entry = e->e_entry; - - if ((error = md_load(fp->f_args, &mdp, &dtbp)) != 0) - return (error); - - printf("Kernel entry at 0x%x ...\n", entry); - - dev_cleanup(); - if (dtbp != 0) { - OF_quiesce(); - ((int (*)(u_long, u_long, u_long, void *, u_long))entry)(dtbp, - 0, 0, (void *)mdp, 0xfb5d104d); - } else { - OF_chain((void *)reloc, end - (char *)reloc, (void *)entry, - (void *)mdp, 0xfb5d104d); - } - - panic("exec returned"); -} - -struct file_format ofw_elf = -{ - __elfN(ofw_loadfile), - __elfN(ofw_exec) -}; diff --git a/stand/powerpc/ofw/ldscript.powerpc b/stand/powerpc/ofw/ldscript.powerpc deleted file mode 100644 index 1c023ce6ade..00000000000 --- a/stand/powerpc/ofw/ldscript.powerpc +++ /dev/null @@ -1,142 +0,0 @@ - -OUTPUT_FORMAT("elf32-powerpc-freebsd", "elf32-powerpc-freebsd", - "elf32-powerpc-freebsd") -OUTPUT_ARCH(powerpc:common) -ENTRY(_start) -SEARCH_DIR(/usr/lib); -PROVIDE (__stack = 0); -PHDRS -{ - text PT_LOAD; -} -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = 0x02c00000 + SIZEOF_HEADERS; - .interp : { *(.interp) } :text - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .gnu.version : { *(.gnu.version) } - .gnu.version_d : { *(.gnu.version_d) } - .gnu.version_r : { *(.gnu.version_r) } - .rela.text : - { *(.rela.text) *(.rela.gnu.linkonce.t*) } - .rela.data : - { *(.rela.data) *(.rela.gnu.linkonce.d*) } - .rela.rodata : - { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } - .rela.got : { *(.rela.got) } - .rela.got1 : { *(.rela.got1) } - .rela.got2 : { *(.rela.got2) } - .rela.ctors : { *(.rela.ctors) } - .rela.dtors : { *(.rela.dtors) } - .rela.init : { *(.rela.init) } - .rela.fini : { *(.rela.fini) } - .rela.bss : { *(.rela.bss) } - .rela.plt : { *(.rela.plt) } - .rela.sdata : { *(.rela.sdata) } - .rela.sbss : { *(.rela.sbss) } - .rela.sdata2 : { *(.rela.sdata2) } - .rela.sbss2 : { *(.rela.sbss2) } - .text : - { - *(.text) - /* .gnu.warning sections are handled specially by elf32.em. */ - *(.gnu.warning) - *(.gnu.linkonce.t*) - } =0 - _etext = .; - PROVIDE (etext = .); - .init : { *(.init) } =0 - .fini : { *(.fini) } =0 - .rodata : { *(.rodata) *(.gnu.linkonce.r*) } - .rodata1 : { *(.rodata1) } - .sdata2 : { *(.sdata2) } - .sbss2 : { *(.sbss2) } - /* Adjust the address for the data segment to the next page up. */ - . = ((. + 0x1000) & ~(0x1000 - 1)); - .data.rel.ro : { *(.data.rel.ro*) } - .data : - { - *(.data) - *(.gnu.linkonce.d*) - CONSTRUCTORS - } - .data1 : { *(.data1) } - .got1 : { *(.got1) } - .dynamic : { *(.dynamic) } - /* Put .ctors and .dtors next to the .got2 section, so that the pointers - get relocated with -mrelocatable. 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Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include - -#include -#include "openfirm.h" -#include "libofw.h" -#include "bootstrap.h" - -#include -#include - -struct arch_switch archsw; /* MI/MD interface boundary */ - -extern char end[]; - -uint32_t acells, scells; - -static char bootargs[128]; - -#define HEAP_SIZE 0x800000 -static char heap[HEAP_SIZE]; // In BSS, so uses no space - -#define OF_puts(fd, text) OF_write(fd, text, strlen(text)) - -static __inline register_t -mfmsr(void) -{ - register_t value; - - __asm __volatile ("mfmsr %0" : "=r"(value)); - - return (value); -} - -void -init_heap(void) -{ - bzero(heap, HEAP_SIZE); - - setheap(heap, (void *)((uintptr_t)heap + HEAP_SIZE)); -} - -uint64_t -memsize(void) -{ - phandle_t memoryp; - cell_t reg[24]; - int i, sz; - uint64_t memsz; - - memsz = 0; - memoryp = OF_instance_to_package(memory); - - sz = OF_getencprop(memoryp, "reg", ®[0], sizeof(reg)); - sz /= sizeof(reg[0]); - - for (i = 0; i < sz; i += (acells + scells)) { - if (scells > 1) - memsz += (uint64_t)reg[i + acells] << 32; - memsz += reg[i + acells + scells - 1]; - } - - return (memsz); -} - -#ifdef CAS -extern int ppc64_cas(void); - -static int -ppc64_autoload(void) -{ - const char *cas; - - if ((cas = getenv("cas")) && cas[0] == '1') - if (ppc64_cas() != 0) - return (-1); - return (ofw_autoload()); -} -#endif - -#if BYTE_ORDER == LITTLE_ENDIAN -/* - * In Little-endian, we cannot just branch to the client interface. Since - * the client interface is big endian, we have to rfid to it. - * Likewise, when execution resumes, we are in the wrong endianness so - * we must do a fixup before returning to the caller. - */ -static int (*openfirmware_entry)(void *); -extern int openfirmware_trampoline(void *buf, int (*cb)(void *)); - -/* - * Wrapper to pass the real entry point to our trampoline. - */ -static int -openfirmware_docall(void *buf) -{ - return openfirmware_trampoline(buf, openfirmware_entry); -} -#endif - -int -main(int (*openfirm)(void *)) -{ - phandle_t root; - int i; - char bootpath[64]; - char *ch; - int bargc; - char **bargv; - - /* - * Initialise the Open Firmware routines by giving them the entry point. - */ -#if BYTE_ORDER == LITTLE_ENDIAN - /* - * Use a trampoline entry point for endian fixups. - */ - openfirmware_entry = openfirm; - OF_init(openfirmware_docall); -#else - OF_init(openfirm); -#endif - - root = OF_finddevice("/"); - - scells = acells = 1; - OF_getencprop(root, "#address-cells", &acells, sizeof(acells)); - OF_getencprop(root, "#size-cells", &scells, sizeof(scells)); - - /* - * Initialise the heap as early as possible. Once this is done, - * alloc() is usable. The stack is buried inside us, so this is - * safe. - */ - init_heap(); - - /* - * Set up console. - */ - cons_probe(); - - archsw.arch_getdev = ofw_getdev; - archsw.arch_copyin = ofw_copyin; - archsw.arch_copyout = ofw_copyout; - archsw.arch_readin = ofw_readin; -#ifdef CAS - setenv("cas", "1", 0); - archsw.arch_autoload = ppc64_autoload; -#else - archsw.arch_autoload = ofw_autoload; -#endif - - /* Set up currdev variable to have hooks in place. */ - env_setenv("currdev", EV_VOLATILE, "", gen_setcurrdev, env_nounset); - - devinit(); - - printf("\n%s", bootprog_info); - printf("Memory: %lldKB\n", memsize() / 1024); - - OF_getprop(chosen, "bootpath", bootpath, 64); - ch = strchr(bootpath, ':'); - *ch = '\0'; - printf("Booted from: %s\n", bootpath); - - printf("\n"); - - /* - * Only parse the first bootarg if present. It should - * be simple to handle extra arguments - */ - OF_getprop(chosen, "bootargs", bootargs, sizeof(bootargs)); - bargc = 0; - parse(&bargc, &bargv, bootargs); - if (bargc == 1) - env_setenv("currdev", EV_VOLATILE, bargv[0], gen_setcurrdev, - env_nounset); - else - env_setenv("currdev", EV_VOLATILE, bootpath, - gen_setcurrdev, env_nounset); - env_setenv("loaddev", EV_VOLATILE, bootpath, env_noset, - env_nounset); - setenv("LINES", "24", 1); /* optional */ - - /* - * On non-Apple hardware, where it works reliably, pass flattened - * device trees to the kernel by default instead of OF CI pointers. - * Apple hardware is the only virtual-mode OF implementation in - * existence, so far as I am aware, so use that as a flag. - */ - if (!(mfmsr() & PSL_DR)) - setenv("usefdt", "1", 1); - - interact(); /* doesn't return */ - - OF_exit(); - - return 0; -} - -COMMAND_SET(halt, "halt", "halt the system", command_halt); - -static int -command_halt(int argc, char *argv[]) -{ - - OF_exit(); - return (CMD_OK); -} - -COMMAND_SET(memmap, "memmap", "print memory map", command_memmap); - -int -command_memmap(int argc, char **argv) -{ - - ofw_memmap(acells); - return (CMD_OK); -} diff --git a/stand/powerpc/ofw/ofwfdt.c b/stand/powerpc/ofw/ofwfdt.c deleted file mode 100644 index 4eccefa3d4c..00000000000 --- a/stand/powerpc/ofw/ofwfdt.c +++ /dev/null @@ -1,217 +0,0 @@ -/*- - * Copyright (C) 2014-2015 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include "bootstrap.h" - -extern int command_fdt_internal(int argc, char *argv[]); - -static int -OF_hasprop(phandle_t node, const char *prop) -{ - return (OF_getproplen(node, (char *)prop) > 0); -} - -static void -add_node_to_fdt(void *buffer, phandle_t node, int fdt_offset) -{ - int i, child_offset, error; - char name[255], *lastprop, *subname; - void *propbuf; - ssize_t proplen; - - lastprop = NULL; - while (OF_nextprop(node, lastprop, name) > 0) { - proplen = OF_getproplen(node, name); - - /* Detect and correct for errors and strangeness */ - if (proplen < 0) - proplen = 0; - if (proplen > 1024) - proplen = 1024; - - propbuf = malloc(proplen); - if (propbuf == NULL) { - printf("Cannot allocate memory for prop %s\n", name); - return; - } - OF_getprop(node, name, propbuf, proplen); - error = fdt_setprop(buffer, fdt_offset, name, propbuf, proplen); - free(propbuf); - lastprop = name; - if (error) - printf("Error %d adding property %s to " - "node %d\n", error, name, fdt_offset); - } - - if (!OF_hasprop(node, "phandle") && !OF_hasprop(node, "linux,phandle") - && !OF_hasprop(node, "ibm,phandle")) - fdt_setprop(buffer, fdt_offset, "phandle", &node, sizeof(node)); - - for (node = OF_child(node); node > 0; node = OF_peer(node)) { - OF_package_to_path(node, name, sizeof(name)); - subname = strrchr(name, '/'); - subname++; - child_offset = fdt_add_subnode(buffer, fdt_offset, subname); - if (child_offset < 0) { - printf("Error %d adding node %s (%s), skipping\n", - child_offset, name, subname); - continue; - } - - add_node_to_fdt(buffer, node, child_offset); - } -} - -static void -ofwfdt_fixups(void *fdtp) -{ - int offset, len, i; - phandle_t node; - ihandle_t rtas; - const void *prop; - - /* - * Instantiate and add reservations for RTAS state if present - */ - - offset = fdt_path_offset(fdtp, "/rtas"); - if (offset > 0) { - uint32_t base; - void *rtasmem; - char path[255]; - - node = OF_finddevice("/rtas"); - OF_package_to_path(node, path, sizeof(path)); - OF_getencprop(node, "rtas-size", &len, sizeof(len)); - - /* Allocate memory */ - rtasmem = OF_claim(0, len, 4096); - - /* Instantiate RTAS */ - rtas = OF_open(path); - base = 0; - OF_call_method("instantiate-rtas", rtas, 1, 1, (cell_t)rtasmem, - &base); - - /* Store info to FDT using Linux convention */ - base = cpu_to_fdt32(base); - fdt_setprop(fdtp, offset, "linux,rtas-entry", &base, - sizeof(base)); - base = cpu_to_fdt32((uint32_t)rtasmem); - offset = fdt_path_offset(fdtp, "/rtas"); - fdt_setprop(fdtp, offset, "linux,rtas-base", &base, - sizeof(base)); - - /* Mark RTAS private data area reserved */ - base = fdt32_to_cpu(base); - fdt_add_mem_rsv(fdtp, base, len); - } else { - /* - * Remove /memory/available properties, which reflect long-gone - * OF state. Note that this doesn't work if we need RTAS still, - * since that's part of the firmware. - */ - offset = fdt_path_offset(fdtp, "/memory@0"); - if (offset > 0) - fdt_delprop(fdtp, offset, "available"); - } - - - /* - * Convert stored ihandles under /chosen to xref phandles - */ - offset = fdt_path_offset(fdtp, "/chosen"); - if (offset > 0) { - const char *chosenprops[] = {"stdout", "stdin", "mmu", "cpu", - NULL}; - const uint32_t *ihand; - for (i = 0; chosenprops[i] != NULL; i++) { - ihand = fdt_getprop(fdtp, offset, chosenprops[i], &len); - if (ihand != NULL && len == sizeof(*ihand)) { - node = OF_instance_to_package(*ihand); - if (OF_hasprop(node, "phandle")) - OF_getprop(node, "phandle", &node, - sizeof(node)); - else if (OF_hasprop(node, "linux,phandle")) - OF_getprop(node, "linux,phandle", &node, - sizeof(node)); - else if (OF_hasprop(node, "ibm,phandle")) - OF_getprop(node, "ibm,phandle", &node, - sizeof(node)); - fdt_setprop(fdtp, offset, chosenprops[i], &node, - sizeof(node)); - } - - /* Refind node in case it moved */ - offset = fdt_path_offset(fdtp, "/chosen"); - } - } -} - -int -fdt_platform_load_dtb(void) -{ - void *buffer; - size_t buflen = 409600; - - buffer = malloc(buflen); - fdt_create_empty_tree(buffer, buflen); - add_node_to_fdt(buffer, OF_peer(0), fdt_path_offset(buffer, "/")); - ofwfdt_fixups(buffer); - fdt_pack(buffer); - - fdt_load_dtb_addr(buffer); - free(buffer); - - return (0); -} - -void -fdt_platform_load_overlays(void) -{ - -} - -void -fdt_platform_fixups(void) -{ - -} - -static int -command_fdt(int argc, char *argv[]) -{ - - return (command_fdt_internal(argc, argv)); -} - -COMMAND_SET(fdt, "fdt", "flattened device tree handling", command_fdt); - diff --git a/stand/powerpc/ofw/ppc64_elf_freebsd.c b/stand/powerpc/ofw/ppc64_elf_freebsd.c deleted file mode 100644 index 5d449c79bd3..00000000000 --- a/stand/powerpc/ofw/ppc64_elf_freebsd.c +++ /dev/null @@ -1,109 +0,0 @@ -/*- - * Copyright (c) 2001 Benno Rice - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#define __ELF_WORD_SIZE 64 - -#include -#include - -#include -#include -#include - -#include - -#include "bootstrap.h" -#include "libofw.h" -#include "openfirm.h" -#include "modinfo.h" - -extern char end[]; -extern vm_offset_t reloc; /* From /conf.c */ - -int -ppc64_ofw_elf_loadfile(char *filename, uint64_t dest, - struct preloaded_file **result) -{ - int r; - - r = __elfN(loadfile)(filename, dest, result); - if (r != 0) - return (r); - - /* - * No need to sync the icache for modules: this will - * be done by the kernel after relocation. - */ - if (!strcmp((*result)->f_type, "elf kernel")) - __syncicache((void *) (*result)->f_addr, (*result)->f_size); - return (0); -} - -int -ppc64_ofw_elf_exec(struct preloaded_file *fp) -{ - struct file_metadata *fmp; - vm_offset_t mdp, dtbp; - Elf_Ehdr *e; - int error; - intptr_t entry; - - if ((fmp = file_findmetadata(fp, MODINFOMD_ELFHDR)) == NULL) { - return(EFTYPE); - } - e = (Elf_Ehdr *)&fmp->md_data; - - /* Handle function descriptor for ELFv1 kernels */ - if ((e->e_flags & 3) == 2) - entry = e->e_entry; - else - entry = *(uint64_t *)(intptr_t)e->e_entry; - - if ((error = md_load64(fp->f_args, &mdp, &dtbp)) != 0) - return (error); - - printf("Kernel entry at 0x%x ...\n", entry); - - dev_cleanup(); - - if (dtbp != 0) { - OF_quiesce(); - ((int (*)(u_long, u_long, u_long, void *, u_long))entry)(dtbp, - 0, 0, (void *)mdp, 0xfb5d104d); - } else { - OF_chain((void *)reloc, end - (char *)reloc, (void *)entry, - (void *)mdp, 0xfb5d104d); - } - - panic("exec returned"); -} - -struct file_format ofw_elf64 = -{ - ppc64_ofw_elf_loadfile, - ppc64_ofw_elf_exec -}; diff --git a/stand/powerpc/ofw/start.c b/stand/powerpc/ofw/start.c deleted file mode 100644 index e5973e12da8..00000000000 --- a/stand/powerpc/ofw/start.c +++ /dev/null @@ -1,74 +0,0 @@ -/* $NetBSD: Locore.c,v 1.7 2000/08/20 07:04:59 tsubai Exp $ */ -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include "libofw.h" - -void startup(void *, int, int (*)(void *), char *, int); - -__asm(" \n\ - .data \n\ - .align 4 \n\ -stack: \n\ - .space 16388 \n\ - \n\ - .text \n\ - .globl _start \n\ -_start: \n\ - lis %r1,stack@ha \n\ - addi %r1,%r1,stack@l \n\ - addi %r1,%r1,8192 \n\ - \n\ - /* Clear the .bss!!! */ \n\ - li %r0,0 \n\ - lis %r8,_edata@ha \n\ - addi %r8,%r8,_edata@l\n\ - lis %r9,_end@ha \n\ - addi %r9,%r9,_end@l \n\ - \n\ -1: cmpw 0,%r8,%r9 \n\ - bge 2f \n\ - stw %r0,0(%r8) \n\ - addi %r8,%r8,4 \n\ - b 1b \n\ - \n\ -2: b startup \n\ -"); - -void main(int (*openfirm)(void *)); - -void -startup(void *vpd, int res, int (*openfirm)(void *), char *arg, int argl) -{ - main(openfirm); -} diff --git a/stand/powerpc/ofw/trampolineLE.S b/stand/powerpc/ofw/trampolineLE.S deleted file mode 100644 index 39f4e910851..00000000000 --- a/stand/powerpc/ofw/trampolineLE.S +++ /dev/null @@ -1,69 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2020 Brandon Bergren - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include - -/** - * int openfirmware_trampoline(void *buf, int (*cb)(void *)); - */ -ASENTRY_NOPROF(openfirmware_trampoline) - mflr %r0 - stw %r0, 4(%r1) - stwu %r1, -16(%r1) - stw %r30, 8(%r1) - /* Save current MSR for restoration post-call. */ - mfmsr %r30 - mr %r5, %r30 - /* Remove LE bit from MSR. */ - clrrwi %r5, %r5, 1 - mtsrr0 %r4 - mtsrr1 %r5 - LOAD_LR_NIA -1: - mflr %r4 - addi %r4, %r4, (2f - 1b) - mtlr %r4 - /* Switch to BE and transfer control to OF entry */ - rfid -2: - /* Control is returned here, but in BE. */ - .long 0x05009f42 /* LOAD_LR_NIA */ - /* 0: */ - .long 0xa603db7f /* mtsrr1 %r30 */ - .long 0xa602c87f /* mflr %r30 */ - .long 0x1400de3b /* addi %r30, %r30, (1f - 0b) */ - .long 0xa603da7f /* mtsrr0 %r30 */ - .long 0x2400004c /* rfid */ - /* 1: */ -1: - /* Back to normal. Tidy up for return. */ - lwz %r30, 8(%r1) - lwz %r0, 20(%r1) - addi %r1, %r1, 16 - mtlr %r0 - blr -ASEND(openfirmware_trampoline) diff --git a/stand/powerpc/ofw/version b/stand/powerpc/ofw/version deleted file mode 100644 index fd8b01228f4..00000000000 --- a/stand/powerpc/ofw/version +++ /dev/null @@ -1,2 +0,0 @@ -3.0: Lua scripts API stability -0.1: Initial OFW/PowerPC version. diff --git a/stand/uboot/arch/mips/Makefile.inc b/stand/uboot/arch/mips/Makefile.inc deleted file mode 100644 index 676b3c88d19..00000000000 --- a/stand/uboot/arch/mips/Makefile.inc +++ /dev/null @@ -1,26 +0,0 @@ -# Address at which ubldr will be loaded. -# This varies for different boards and SOCs. -.if ${MACHINE_ARCH:Mmips64*} -UBLDR_LOADADDR?= 0xffffffff80800000 -.else -UBLDR_LOADADDR?= 0x80800000 -.endif - -# Architecture-specific loader code -SRCS+= start.S conf.c - -# ubldr on MIPS is built with '-mno-abicalls' flag, -# which is incompatible with PIE -MK_PIE= no - -ldscript.abs: - echo "UBLDR_LOADADDR = ${UBLDR_LOADADDR};" >${.TARGET} - -ubldr: ${OBJS} ldscript.abs ${LDSCRIPT} ${DPADD} - ${CC} ${CFLAGS} -T ldscript.abs ${LDFLAGS} \ - -o ${.TARGET} ${OBJS} ${LDADD} - -ubldr.bin: ubldr - ${OBJCOPY} -S -O binary ubldr ubldr.bin - -CLEANFILES+= ldscript.abs ubldr ubldr.pie ubldr.bin diff --git a/stand/uboot/arch/mips/conf.c b/stand/uboot/arch/mips/conf.c deleted file mode 100644 index 146c9710c2b..00000000000 --- a/stand/uboot/arch/mips/conf.c +++ /dev/null @@ -1,115 +0,0 @@ -/*- - * Copyright (c) 2008 Semihalf, Rafal Jaworowski - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include "bootstrap.h" -#include "libuboot.h" - -#if defined(LOADER_NET_SUPPORT) -#include "dev_net.h" -#endif - -/* Make sure we have an explicit reference to exit so libsa's panic pulls in the MD exit */ -void (*exitfn)(int) = exit; - -struct devsw *devsw[] = { -#if defined(LOADER_DISK_SUPPORT) || defined(LOADER_CD9660_SUPPORT) - &uboot_storage, -#endif -#if defined(LOADER_NET_SUPPORT) - &netdev, -#endif - NULL -}; - -struct fs_ops *file_system[] = { -#if defined(LOADER_MSDOS_SUPPORT) - &dosfs_fsops, -#endif -#if defined(LOADER_UFS_SUPPORT) - &ufs_fsops, -#endif -#if defined(LOADER_CD9660_SUPPORT) - &cd9660_fsops, -#endif -#if defined(LOADER_EXT2FS_SUPPORT) - &ext2fs_fsops, -#endif -#if defined(LOADER_NFS_SUPPORT) - &nfs_fsops, -#endif -#if defined(LOADER_TFTP_SUPPORT) - &tftp_fsops, -#endif -#if defined(LOADER_GZIP_SUPPORT) - &gzipfs_fsops, -#endif -#if defined(LOADER_BZIP2_SUPPORT) - &bzipfs_fsops, -#endif - NULL -}; - -struct netif_driver *netif_drivers[] = { -#if defined(LOADER_NET_SUPPORT) - &uboot_net, -#endif - NULL, -}; - -struct file_format *file_formats[] = { - &uboot_elf, - NULL -}; - -extern struct console uboot_console; - -struct console *consoles[] = { - &uboot_console, - NULL -}; - -void -abort(void) -{ - - printf("error: loader abort\n"); - while (1); - __unreachable(); -} - -void -longjmperror(void) -{ - - printf("error: loader longjmp error\n"); - while (1); - __unreachable(); -} - -int debug = 1; diff --git a/stand/uboot/arch/mips/ldscript.mips b/stand/uboot/arch/mips/ldscript.mips deleted file mode 100644 index 44bb1a0b2c9..00000000000 --- a/stand/uboot/arch/mips/ldscript.mips +++ /dev/null @@ -1,133 +0,0 @@ - -OUTPUT_ARCH(mips) -ENTRY(_start) -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - /*. = UBLDR_LOADADDR + SIZEOF_HEADERS;*/ - . = UBLDR_LOADADDR; - .text : - { - start.o(.text*) - *(EXCLUDE_FILE (start.o) .text*) - /* .gnu.warning sections are handled specially by elf32.em. */ - *(.gnu.warning) - *(.gnu.linkonce.t*) - } =0 - _etext = .; - PROVIDE (etext = .); - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .gnu.version : { *(.gnu.version) } - .gnu.version_d : { *(.gnu.version_d) } - .gnu.version_r : { *(.gnu.version_r) } - .rela.text : - { *(.rela.text) *(.rela.gnu.linkonce.t*) } - .rela.data : - { *(.rela.data) *(.rela.gnu.linkonce.d*) } - .rela.rodata : - { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } - .rela.got : { *(.rela.got) } - .rela.got1 : { *(.rela.got1) } - .rela.got2 : { *(.rela.got2) } - .rela.ctors : { *(.rela.ctors) } - .rela.dtors : { *(.rela.dtors) } - .rela.init : { *(.rela.init) } - .rela.fini : { *(.rela.fini) } - .rela.bss : { *(.rela.bss) } - .rela.plt : { *(.rela.plt) } - .rela.sdata : { *(.rela.sdata) } - .rela.sbss : { *(.rela.sbss) } - .rela.sdata2 : { *(.rela.sdata2) } - .rela.sbss2 : { *(.rela.sbss2) } - .init : { *(.init) } =0 - .fini : { *(.fini) } =0 - .rodata : { *(.rodata) *(.gnu.linkonce.r*) } - .rodata1 : { *(.rodata1) } - .sdata2 : { *(.sdata2) } - .sbss2 : { *(.sbss2) } - /* Adjust the address for the data segment to the next page up. */ - . = ((. + 0x1000) & ~(0x1000 - 1)); - .data : - { - *(.data) - *(.gnu.linkonce.d*) - } - .data1 : { *(.data1) } - .got1 : { *(.got1) } - .dynamic : { *(.dynamic) } - /* Put .ctors and .dtors next to the .got2 section, so that the pointers - get relocated with -mrelocatable. Also put in the .fixup pointers. - The current compiler no longer needs this, but keep it around for 2.7.2 */ - PROVIDE (_GOT2_START_ = .); - .got2 : { *(.got2) } - PROVIDE (__CTOR_LIST__ = .); - .ctors : { *(.ctors) } - PROVIDE (__CTOR_END__ = .); - PROVIDE (__DTOR_LIST__ = .); - .dtors : { *(.dtors) } - PROVIDE (__DTOR_END__ = .); - PROVIDE (_FIXUP_START_ = .); - .fixup : { *(.fixup) } - PROVIDE (_FIXUP_END_ = .); - PROVIDE (_GOT2_END_ = .); - PROVIDE (_GOT_START_ = .); - .got : { *(.got) } - .got.plt : { *(.got.plt) } - PROVIDE (_GOT_END_ = .); - /* We want the small data sections together, so single-instruction offsets - can access them all, and initialized data all before uninitialized, so - we can shorten the on-disk segment size. */ - .sdata : { *(.sdata) } - _edata = .; - PROVIDE (edata = .); - .sbss : - { - PROVIDE (__sbss_start = .); - *(.sbss) - *(.scommon) - *(.dynsbss) - PROVIDE (__sbss_end = .); - } - .plt : { *(.plt) } - .bss : - { - PROVIDE (__bss_start = .); - *(.dynbss) - *(.bss) - *(COMMON) - } - _end = . ; - PROVIDE (end = .); - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to the beginning - of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - /* These must appear regardless of . */ -} diff --git a/stand/uboot/arch/mips/start.S b/stand/uboot/arch/mips/start.S deleted file mode 100644 index 55d6aaf9ed6..00000000000 --- a/stand/uboot/arch/mips/start.S +++ /dev/null @@ -1,69 +0,0 @@ -/*- - * Copyright (c) 2016 Stanislav Galabov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include - - .text - .extern _C_LABEL(main) - .weak _DYNAMIC - -/* - * Entry point to the loader that U-Boot passes control to. - */ -ENTRY(_start) - PTR_S sp, uboot_address - j main - nop -END(_start) - -/* - * syscall() - */ -ENTRY(syscall) - PTR_S ra, ret_address - PTR_L t9, syscall_ptr - jalr t9 - nop - PTR_L ra, ret_address - jr ra - nop -END(syscall) - -/* - * Data section - */ - .data - .align 8 - .globl syscall_ptr -syscall_ptr: - .dword 0 - - .globl uboot_address -uboot_address: - .dword 0 - -ret_address: - .dword 0 diff --git a/stand/uboot/arch/powerpc/Makefile.inc b/stand/uboot/arch/powerpc/Makefile.inc deleted file mode 100644 index 226cfc2f736..00000000000 --- a/stand/uboot/arch/powerpc/Makefile.inc +++ /dev/null @@ -1,6 +0,0 @@ - -SRCS+= start.S conf.c ppc64_elf_freebsd.c -.PATH: ${SYSDIR}/libkern -SRCS+= ucmpdi2.c - -LOADER_UBLDR_BIN= no diff --git a/stand/uboot/arch/powerpc/conf.c b/stand/uboot/arch/powerpc/conf.c deleted file mode 100644 index e36336e2019..00000000000 --- a/stand/uboot/arch/powerpc/conf.c +++ /dev/null @@ -1,112 +0,0 @@ -/*- - * Copyright (c) 1999 Michael Smith - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include "bootstrap.h" -#include "libuboot.h" - -#if defined(LOADER_NET_SUPPORT) -#include "dev_net.h" -#endif - -/* Make sure we have an explicit reference to exit so libsa's panic pulls in the MD exit */ -void (*exitfn)(int) = exit; - -/* - * We could use linker sets for some or all of these, but - * then we would have to control what ended up linked into - * the bootstrap. So it's easier to conditionalise things - * here. - * - * XXX rename these arrays to be consistent and less namespace-hostile - */ - -/* Exported for libsa */ -struct devsw *devsw[] = { -#if defined(LOADER_DISK_SUPPORT) || defined(LOADER_CD9660_SUPPORT) - &uboot_storage, -#endif -#if defined(LOADER_NET_SUPPORT) - &netdev, -#endif - NULL -}; - -struct fs_ops *file_system[] = { -#if defined(LOADER_UFS_SUPPORT) - &ufs_fsops, -#endif -#if defined(LOADER_CD9660_SUPPORT) - &cd9660_fsops, -#endif -#if defined(LOADER_EXT2FS_SUPPORT) - &ext2fs_fsops, -#endif -#if defined(LOADER_NFS_SUPPORT) - &nfs_fsops, -#endif -#if defined(LOADER_TFTP_SUPPORT) - &tftp_fsops, -#endif -#if defined(LOADER_GZIP_SUPPORT) - &gzipfs_fsops, -#endif -#if defined(LOADER_BZIP2_SUPPORT) - &bzipfs_fsops, -#endif - NULL -}; - -struct netif_driver *netif_drivers[] = { -#if defined(LOADER_NET_SUPPORT) - &uboot_net, -#endif - NULL, -}; - -/* Exported for PowerPC only */ -/* - * Sort formats so that those that can detect based on arguments - * rather than reading the file go first. - */ -extern struct file_format uboot_elf64; - -struct file_format *file_formats[] = { - &uboot_elf, - &uboot_elf64, - NULL -}; - -/* - * Consoles - */ -extern struct console uboot_console; - -struct console *consoles[] = { - &uboot_console, - NULL -}; diff --git a/stand/uboot/arch/powerpc/ldscript.powerpc b/stand/uboot/arch/powerpc/ldscript.powerpc deleted file mode 100644 index 7f33129a7b5..00000000000 --- a/stand/uboot/arch/powerpc/ldscript.powerpc +++ /dev/null @@ -1,137 +0,0 @@ - -OUTPUT_FORMAT("elf32-powerpc-freebsd", "elf32-powerpc-freebsd", - "elf32-powerpc-freebsd") -OUTPUT_ARCH(powerpc:common) -ENTRY(_start) -SEARCH_DIR(/usr/lib); -PROVIDE (__stack = 0); -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = 0x00010000 + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .gnu.version : { *(.gnu.version) } - .gnu.version_d : { *(.gnu.version_d) } - .gnu.version_r : { *(.gnu.version_r) } - .rela.text : - { *(.rela.text) *(.rela.gnu.linkonce.t*) } - .rela.data : - { *(.rela.data) *(.rela.gnu.linkonce.d*) } - .rela.rodata : - { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } - .rela.got : { *(.rela.got) } - .rela.got1 : { *(.rela.got1) } - .rela.got2 : { *(.rela.got2) } - .rela.ctors : { *(.rela.ctors) } - .rela.dtors : { *(.rela.dtors) } - .rela.init : { *(.rela.init) } - .rela.fini : { *(.rela.fini) } - .rela.bss : { *(.rela.bss) } - .rela.plt : { *(.rela.plt) } - .rela.sdata : { *(.rela.sdata) } - .rela.sbss : { *(.rela.sbss) } - .rela.sdata2 : { *(.rela.sdata2) } - .rela.sbss2 : { *(.rela.sbss2) } - .text : - { - *(.text) - /* .gnu.warning sections are handled specially by elf32.em. */ - *(.gnu.warning) - *(.gnu.linkonce.t*) - } =0 - _etext = .; - PROVIDE (etext = .); - .init : { *(.init) } =0 - .fini : { *(.fini) } =0 - .rodata : { *(.rodata) *(.gnu.linkonce.r*) } - .rodata1 : { *(.rodata1) } - .sdata2 : { *(.sdata2) } - .sbss2 : { *(.sbss2) } - /* Adjust the address for the data segment to the next page up. */ - . = ((. + 0x1000) & ~(0x1000 - 1)); - .data : - { - *(.data) - *(.gnu.linkonce.d*) - CONSTRUCTORS - } - .data1 : { *(.data1) } - .got1 : { *(.got1) } - .dynamic : { *(.dynamic) } - /* Put .ctors and .dtors next to the .got2 section, so that the pointers - get relocated with -mrelocatable. Also put in the .fixup pointers. - The current compiler no longer needs this, but keep it around for 2.7.2 */ - PROVIDE (_GOT2_START_ = .); - .got2 : { *(.got2) } - PROVIDE (__CTOR_LIST__ = .); - .ctors : { *(.ctors) } - PROVIDE (__CTOR_END__ = .); - PROVIDE (__DTOR_LIST__ = .); - .dtors : { *(.dtors) } - PROVIDE (__DTOR_END__ = .); - PROVIDE (_FIXUP_START_ = .); - .fixup : { *(.fixup) } - PROVIDE (_FIXUP_END_ = .); - PROVIDE (_GOT2_END_ = .); - PROVIDE (_GOT_START_ = .); - .got : { *(.got) } - .got.plt : { *(.got.plt) } - PROVIDE (_GOT_END_ = .); - /* We want the small data sections together, so single-instruction offsets - can access them all, and initialized data all before uninitialized, so - we can shorten the on-disk segment size. */ - .sdata : { *(.sdata) } - _edata = .; - PROVIDE (edata = .); - .sbss : - { - PROVIDE (__sbss_start = .); - *(.sbss) - *(.scommon) - *(.dynsbss) - PROVIDE (__sbss_end = .); - } - .plt : { *(.plt) } - .bss : - { - PROVIDE (__bss_start = .); - *(.dynbss) - *(.bss) - *(COMMON) - } - _end = . ; - PROVIDE (end = .); - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to the beginning - of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - /* These must appear regardless of . */ -} - diff --git a/stand/uboot/arch/powerpc/ppc64_elf_freebsd.c b/stand/uboot/arch/powerpc/ppc64_elf_freebsd.c deleted file mode 100644 index 0b4864d3a54..00000000000 --- a/stand/uboot/arch/powerpc/ppc64_elf_freebsd.c +++ /dev/null @@ -1,96 +0,0 @@ -/*- - * Copyright (c) 2001 Benno Rice - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#define __ELF_WORD_SIZE 64 - -#include -#include - -#include -#include -#include - -#include - -#include "bootstrap.h" -#include "libuboot.h" -#include "modinfo.h" - -int -ppc64_uboot_elf_loadfile(char *filename, uint64_t dest, - struct preloaded_file **result) -{ - int r; - - r = __elfN(loadfile)(filename, dest, result); - if (r != 0) - return (r); - - /* - * No need to sync the icache for modules: this will - * be done by the kernel after relocation. - */ - if (!strcmp((*result)->f_type, "elf kernel")) - __syncicache((void *) (*result)->f_addr, (*result)->f_size); - return (0); -} - -int -ppc64_uboot_elf_exec(struct preloaded_file *fp) -{ - struct file_metadata *fmp; - vm_offset_t mdp, dtbp; - Elf_Ehdr *e; - int error; - void (*entry)(void *); - - if ((fmp = file_findmetadata(fp, MODINFOMD_ELFHDR)) == NULL) { - return(EFTYPE); - } - e = (Elf_Ehdr *)&fmp->md_data; - - /* Handle function descriptor for ELFv1 kernels */ - if ((e->e_flags & 3) == 2) - entry = (void (*)(void*))(intptr_t)e->e_entry; - else - entry = *(void (*)(void*))(uint64_t *)(intptr_t)e->e_entry; - - if ((error = md_load64(fp->f_args, &mdp, &dtbp)) != 0) - return (error); - - dev_cleanup(); - printf("Kernel args: %s\n", fp->f_args); - - (*entry)((void *)mdp); - panic("exec returned"); -} - -struct file_format uboot_elf64 = -{ - ppc64_uboot_elf_loadfile, - ppc64_uboot_elf_exec -}; diff --git a/stand/uboot/arch/powerpc/start.S b/stand/uboot/arch/powerpc/start.S deleted file mode 100644 index 475c5801a36..00000000000 --- a/stand/uboot/arch/powerpc/start.S +++ /dev/null @@ -1,98 +0,0 @@ -/*- - * Copyright (c) 2007 Semihalf, Rafal Jaworowski - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include - -/* - * Entry point to the loader that U-Boot passes control to. - */ - .text - .globl _start -_start: - /* Hint where to look for the API signature */ - lis %r11, uboot_address@ha - addi %r11, %r11, uboot_address@l - stw %r1, 0(%r11) - /* Save U-Boot's r14 and r30 */ - lis %r11, saved_regs@ha - addi %r11, %r11, saved_regs@l - stw %r14, 0(%r11) - stw %r30, 4(%r11) - /* Disable interrupts */ - mfmsr %r11 - andi. %r11, %r11, ~0x8000@l - mtmsr %r11 - b main - -/* - * syscall() - */ -ENTRY(syscall) - stwu %r1, -32(%r1) - mflr %r0 - stw %r14, 8(%r1) - stw %r30, 12(%r1) - stw %r0, 36(%r1) - /* Restore U-Boot's r14 and r30 */ - lis %r11, saved_regs@ha - addi %r11, %r11, saved_regs@l - lwz %r14, 0(%r11) - lwz %r30, 4(%r11) - /* Enable interrupts */ - mfmsr %r11 - ori %r11, %r11, 0x8000@l - mtmsr %r11 - /* Call into U-Boot */ - lis %r11, syscall_ptr@ha - addi %r11, %r11, syscall_ptr@l - lwz %r11, 0(%r11) - mtctr %r11 - bctrl - /* Disable interrupts */ - mfmsr %r11 - andi. %r11, %r11, ~0x8000@l - mtmsr %r11 - /* Epilogue */ - lwz %r11, 0(%r1) - lwz %r0, 4(%r11) - mtlr %r0 - lwz %r14, 8(%r1) - lwz %r30, 12(%r1) - mr %r1, %r11 - blr -END(syscall) - -/* - * Data section - */ - .data -GLOBAL(syscall_ptr) - .long 0 -GLOBAL(saved_regs) - .long 0 /* R14 */ - .long 0 /* R30 */ -GLOBAL(uboot_address) - .long 0 diff --git a/stand/uboot/glue.h b/stand/uboot/glue.h index 96e0a47137c..e09ca2d8136 100644 --- a/stand/uboot/glue.h +++ b/stand/uboot/glue.h @@ -38,20 +38,11 @@ */ #define API_SIG_SEARCH_MASK ~0x000fffff -#ifdef __mips__ -/* - * On MIPS, U-Boot passes us a hint address, which is very close to the end of - * RAM (less than 1MiB), so searching for the API signature within more than - * that leads to exception. - */ -#define API_SIG_SEARCH_LEN 0x00100000 -#else /* * Search for the API signature within 3MiB of the 1MiB-aligned address that * U-Boot has hinted us. */ #define API_SIG_SEARCH_LEN 0x00300000 -#endif int syscall(int, int *, ...); extern void *syscall_ptr; diff --git a/stand/usb/Makefile b/stand/usb/Makefile index 6aea7b752b0..e9ac31d54dd 100644 --- a/stand/usb/Makefile +++ b/stand/usb/Makefile @@ -42,9 +42,6 @@ CFLAGS+= -fno-pic .if ${MACHINE_CPUARCH} == "amd64" CFLAGS+= -m32 .endif -.if ${MACHINE_CPUARCH} == "mips" -CFLAGS+= -mno-abicalls -.endif .include "usbcore.mk" diff --git a/sys/Makefile b/sys/Makefile index 86b8e6fb4c7..d197c45e153 100644 --- a/sys/Makefile +++ b/sys/Makefile @@ -7,7 +7,7 @@ CSCOPEDIRS= bsm cam cddl compat conf contrib crypto ddb dev fs gdb \ rpc security sys ufs vm xdr xen ${CSCOPE_ARCHDIR} .if !defined(CSCOPE_ARCHDIR) .if defined(ALL_ARCH) -CSCOPE_ARCHDIR = amd64 arm arm64 i386 mips powerpc riscv x86 +CSCOPE_ARCHDIR = amd64 arm arm64 i386 riscv x86 .else CSCOPE_ARCHDIR = ${MACHINE} .if ${MACHINE} != ${MACHINE_CPUARCH} diff --git a/sys/README.md b/sys/README.md index aa359c351fc..98a747d54a8 100644 --- a/sys/README.md +++ b/sys/README.md @@ -47,7 +47,6 @@ Source Roadmap: | netipsec | IPsec protocol implementation - `ipsec(4)` | | netpfil | packet filters - `ipfw(4)`, `pf(4)`, and `ipfilter(4)` | | opencrypto | OpenCrypto framework - `crypto(7)` | -| powerpc | PowerPC/POWER (32 and 64-bit) architecture support | | riscv | 64-bit RISC-V architecture support | | security | security facilities - `audit(4)` and `mac(4)` | | sys | kernel headers | diff --git a/sys/cddl/contrib/opensolaris/uts/mips/dtrace/fasttrap_isa.c b/sys/cddl/contrib/opensolaris/uts/mips/dtrace/fasttrap_isa.c deleted file mode 100644 index a31eac8cf0b..00000000000 --- a/sys/cddl/contrib/opensolaris/uts/mips/dtrace/fasttrap_isa.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License (the "License"). - * You may not use this file except in compliance with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ - -/* - * Copyright 2007 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - - -/* - * XXX: Placeholder for MIPS fasttrap code - */ diff --git a/sys/cddl/contrib/opensolaris/uts/mips/sys/fasttrap_isa.h b/sys/cddl/contrib/opensolaris/uts/mips/sys/fasttrap_isa.h deleted file mode 100644 index eb99752ce41..00000000000 --- a/sys/cddl/contrib/opensolaris/uts/mips/sys/fasttrap_isa.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright 2005 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -#ifndef _FASTTRAP_ISA_H -#define _FASTTRAP_ISA_H - -#pragma ident "%Z%%M% %I% %E% SMI" - -#include - -#ifdef __cplusplus -extern "C" { -#endif -/* - * XXXDTRACE: placehodler for MIPS fasttrap stuff - */ - -typedef uint32_t fasttrap_instr_t; -#define FASTTRAP_SUNWDTRACE_SIZE 64 - -#ifdef __cplusplus -} -#endif - -#endif /* _FASTTRAP_ISA_H */ diff --git a/sys/cddl/contrib/opensolaris/uts/powerpc/dtrace/fasttrap_isa.c b/sys/cddl/contrib/opensolaris/uts/powerpc/dtrace/fasttrap_isa.c deleted file mode 100644 index 69ba0f3c64d..00000000000 --- a/sys/cddl/contrib/opensolaris/uts/powerpc/dtrace/fasttrap_isa.c +++ /dev/null @@ -1,548 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License (the "License"). - * You may not use this file except in compliance with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* Portions Copyright 2013 Justin Hibbits */ -/* - * Copyright 2007 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define OP(x) ((x) >> 26) -#define OPX(x) (((x) >> 2) & 0x3FF) -#define OP_BO(x) (((x) & 0x03E00000) >> 21) -#define OP_BI(x) (((x) & 0x001F0000) >> 16) -#define OP_RS(x) (((x) & 0x03E00000) >> 21) -#define OP_RA(x) (((x) & 0x001F0000) >> 16) -#define OP_RB(x) (((x) & 0x0000F100) >> 11) - -int -fasttrap_tracepoint_install(proc_t *p, fasttrap_tracepoint_t *tp) -{ - fasttrap_instr_t instr = FASTTRAP_INSTR; - - if (uwrite(p, &instr, 4, tp->ftt_pc) != 0) - return (-1); - - return (0); -} - -int -fasttrap_tracepoint_remove(proc_t *p, fasttrap_tracepoint_t *tp) -{ - uint32_t instr; - - /* - * Distinguish between read or write failures and a changed - * instruction. - */ - if (uread(p, &instr, 4, tp->ftt_pc) != 0) - return (0); - if (instr != FASTTRAP_INSTR) - return (0); - if (uwrite(p, &tp->ftt_instr, 4, tp->ftt_pc) != 0) - return (-1); - - return (0); -} - -int -fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, uintptr_t pc, - fasttrap_probe_type_t type) -{ - uint32_t instr; - //int32_t disp; - - /* - * Read the instruction at the given address out of the process's - * address space. We don't have to worry about a debugger - * changing this instruction before we overwrite it with our trap - * instruction since P_PR_LOCK is set. - */ - if (uread(p, &instr, 4, pc) != 0) - return (-1); - - /* - * Decode the instruction to fill in the probe flags. We can have - * the process execute most instructions on its own using a pc/npc - * trick, but pc-relative control transfer present a problem since - * we're relocating the instruction. We emulate these instructions - * in the kernel. We assume a default type and over-write that as - * needed. - * - * pc-relative instructions must be emulated for correctness; - * other instructions (which represent a large set of commonly traced - * instructions) are emulated or otherwise optimized for performance. - */ - tp->ftt_type = FASTTRAP_T_COMMON; - tp->ftt_instr = instr; - - switch (OP(instr)) { - /* The following are invalid for trapping (invalid opcodes, tw/twi). */ - case 0: - case 1: - case 2: - case 4: - case 5: - case 6: - case 30: - case 39: - case 58: - case 62: - case 3: /* twi */ - return (-1); - case 31: /* tw */ - if (OPX(instr) == 4) - return (-1); - else if (OPX(instr) == 444 && OP_RS(instr) == OP_RA(instr) && - OP_RS(instr) == OP_RB(instr)) - tp->ftt_type = FASTTRAP_T_NOP; - break; - case 16: - tp->ftt_type = FASTTRAP_T_BC; - tp->ftt_dest = instr & 0x0000FFFC; /* Extract target address */ - if (instr & 0x00008000) - tp->ftt_dest |= 0xFFFF0000; - /* Use as offset if not absolute address. */ - if (!(instr & 0x02)) - tp->ftt_dest += pc; - tp->ftt_bo = OP_BO(instr); - tp->ftt_bi = OP_BI(instr); - break; - case 18: - tp->ftt_type = FASTTRAP_T_B; - tp->ftt_dest = instr & 0x03FFFFFC; /* Extract target address */ - if (instr & 0x02000000) - tp->ftt_dest |= 0xFC000000; - /* Use as offset if not absolute address. */ - if (!(instr & 0x02)) - tp->ftt_dest += pc; - break; - case 19: - switch (OPX(instr)) { - case 528: /* bcctr */ - tp->ftt_type = FASTTRAP_T_BCTR; - tp->ftt_bo = OP_BO(instr); - tp->ftt_bi = OP_BI(instr); - break; - case 16: /* bclr */ - tp->ftt_type = FASTTRAP_T_BCTR; - tp->ftt_bo = OP_BO(instr); - tp->ftt_bi = OP_BI(instr); - break; - }; - break; - case 24: - if (OP_RS(instr) == OP_RA(instr) && - (instr & 0x0000FFFF) == 0) - tp->ftt_type = FASTTRAP_T_NOP; - break; - }; - - /* - * We don't know how this tracepoint is going to be used, but in case - * it's used as part of a function return probe, we need to indicate - * whether it's always a return site or only potentially a return - * site. If it's part of a return probe, it's always going to be a - * return from that function if it's a restore instruction or if - * the previous instruction was a return. If we could reliably - * distinguish jump tables from return sites, this wouldn't be - * necessary. - */ -#if 0 - if (tp->ftt_type != FASTTRAP_T_RESTORE && - (uread(p, &instr, 4, pc - sizeof (instr)) != 0 || - !(OP(instr) == 2 && OP3(instr) == OP3_RETURN))) - tp->ftt_flags |= FASTTRAP_F_RETMAYBE; -#endif - - return (0); -} - -static uint64_t -fasttrap_anarg(struct reg *rp, int argno) -{ - uint64_t value; - proc_t *p = curproc; - - /* The first 8 arguments are in registers. */ - if (argno < 8) - return rp->fixreg[argno + 3]; - - /* Arguments on stack start after SP+LR (2 register slots). */ - if (SV_PROC_FLAG(p, SV_ILP32)) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); - value = dtrace_fuword32((void *)(rp->fixreg[1] + 8 + - ((argno - 8) * sizeof(uint32_t)))); - DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); - } else { - DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); - value = dtrace_fuword64((void *)(rp->fixreg[1] + 48 + - ((argno - 8) * sizeof(uint64_t)))); - DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR); - } - return value; -} - -uint64_t -fasttrap_pid_getarg(void *arg, dtrace_id_t id, void *parg, int argno, - int aframes) -{ - struct reg r; - - fill_regs(curthread, &r); - - return (fasttrap_anarg(&r, argno)); -} - -uint64_t -fasttrap_usdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno, - int aframes) -{ - struct reg r; - - fill_regs(curthread, &r); - - return (fasttrap_anarg(&r, argno)); -} - -static void -fasttrap_usdt_args(fasttrap_probe_t *probe, struct reg *rp, int argc, - uintptr_t *argv) -{ - int i, x, cap = MIN(argc, probe->ftp_nargs); - - for (i = 0; i < cap; i++) { - x = probe->ftp_argmap[i]; - - if (x < 8) - argv[i] = rp->fixreg[x]; - else - if (SV_PROC_FLAG(curproc, SV_ILP32)) - argv[i] = fuword32((void *)(rp->fixreg[1] + 8 + - (x * sizeof(uint32_t)))); - else - argv[i] = fuword64((void *)(rp->fixreg[1] + 48 + - (x * sizeof(uint64_t)))); - } - - for (; i < argc; i++) { - argv[i] = 0; - } -} - -static void -fasttrap_return_common(struct reg *rp, uintptr_t pc, pid_t pid, - uintptr_t new_pc) -{ - struct rm_priotracker tracker; - fasttrap_tracepoint_t *tp; - fasttrap_bucket_t *bucket; - fasttrap_id_t *id; - - rm_rlock(&fasttrap_tp_lock, &tracker); - bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)]; - - for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) { - if (pid == tp->ftt_pid && pc == tp->ftt_pc && - tp->ftt_proc->ftpc_acount != 0) - break; - } - - /* - * Don't sweat it if we can't find the tracepoint again; unlike - * when we're in fasttrap_pid_probe(), finding the tracepoint here - * is not essential to the correct execution of the process. - */ - if (tp == NULL) { - rm_runlock(&fasttrap_tp_lock, &tracker); - return; - } - - for (id = tp->ftt_retids; id != NULL; id = id->fti_next) { - /* - * If there's a branch that could act as a return site, we - * need to trace it, and check here if the program counter is - * external to the function. - */ - /* Skip function-local branches. */ - if ((new_pc - id->fti_probe->ftp_faddr) < id->fti_probe->ftp_fsize) - continue; - - dtrace_probe(id->fti_probe->ftp_id, - pc - id->fti_probe->ftp_faddr, - rp->fixreg[3], rp->fixreg[4], 0, 0); - } - rm_runlock(&fasttrap_tp_lock, &tracker); -} - - -static int -fasttrap_branch_taken(int bo, int bi, struct reg *regs) -{ - int crzero = 0; - - /* Branch always? */ - if ((bo & 0x14) == 0x14) - return 1; - - /* Handle decrementing ctr */ - if (!(bo & 0x04)) { - --regs->ctr; - crzero = (regs->ctr == 0); - if (bo & 0x10) { - return (!(crzero ^ (bo >> 1))); - } - } - - return (crzero | (((regs->cr >> (31 - bi)) ^ (bo >> 3)) ^ 1)); -} - - -int -fasttrap_pid_probe(struct trapframe *frame) -{ - struct reg reg, *rp; - struct rm_priotracker tracker; - proc_t *p = curproc; - uintptr_t pc; - uintptr_t new_pc = 0; - fasttrap_bucket_t *bucket; - fasttrap_tracepoint_t *tp, tp_local; - pid_t pid; - dtrace_icookie_t cookie; - uint_t is_enabled = 0; - - fill_regs(curthread, ®); - rp = ® - pc = rp->pc; - - /* - * It's possible that a user (in a veritable orgy of bad planning) - * could redirect this thread's flow of control before it reached the - * return probe fasttrap. In this case we need to kill the process - * since it's in a unrecoverable state. - */ - if (curthread->t_dtrace_step) { - ASSERT(curthread->t_dtrace_on); - fasttrap_sigtrap(p, curthread, pc); - return (0); - } - - /* - * Clear all user tracing flags. - */ - curthread->t_dtrace_ft = 0; - curthread->t_dtrace_pc = 0; - curthread->t_dtrace_npc = 0; - curthread->t_dtrace_scrpc = 0; - curthread->t_dtrace_astpc = 0; - - rm_rlock(&fasttrap_tp_lock, &tracker); - pid = p->p_pid; - bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)]; - - /* - * Lookup the tracepoint that the process just hit. - */ - for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) { - if (pid == tp->ftt_pid && pc == tp->ftt_pc && - tp->ftt_proc->ftpc_acount != 0) - break; - } - - /* - * If we couldn't find a matching tracepoint, either a tracepoint has - * been inserted without using the pid ioctl interface (see - * fasttrap_ioctl), or somehow we have mislaid this tracepoint. - */ - if (tp == NULL) { - rm_runlock(&fasttrap_tp_lock, &tracker); - return (-1); - } - - if (tp->ftt_ids != NULL) { - fasttrap_id_t *id; - - for (id = tp->ftt_ids; id != NULL; id = id->fti_next) { - fasttrap_probe_t *probe = id->fti_probe; - - if (id->fti_ptype == DTFTP_ENTRY) { - /* - * We note that this was an entry - * probe to help ustack() find the - * first caller. - */ - cookie = dtrace_interrupt_disable(); - DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY); - dtrace_probe(probe->ftp_id, rp->fixreg[3], - rp->fixreg[4], rp->fixreg[5], rp->fixreg[6], - rp->fixreg[7]); - DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY); - dtrace_interrupt_enable(cookie); - } else if (id->fti_ptype == DTFTP_IS_ENABLED) { - /* - * Note that in this case, we don't - * call dtrace_probe() since it's only - * an artificial probe meant to change - * the flow of control so that it - * encounters the true probe. - */ - is_enabled = 1; - } else if (probe->ftp_argmap == NULL) { - dtrace_probe(probe->ftp_id, rp->fixreg[3], - rp->fixreg[4], rp->fixreg[5], rp->fixreg[6], - rp->fixreg[7]); - } else { - uintptr_t t[5]; - - fasttrap_usdt_args(probe, rp, - sizeof (t) / sizeof (t[0]), t); - - dtrace_probe(probe->ftp_id, t[0], t[1], - t[2], t[3], t[4]); - } - } - } - - /* - * We're about to do a bunch of work so we cache a local copy of - * the tracepoint to emulate the instruction, and then find the - * tracepoint again later if we need to light up any return probes. - */ - tp_local = *tp; - rm_runlock(&fasttrap_tp_lock, &tracker); - tp = &tp_local; - - /* - * If there's an is-enabled probe connected to this tracepoint it - * means that there was a 'xor r3, r3, r3' - * instruction that was placed there by DTrace when the binary was - * linked. As this probe is, in fact, enabled, we need to stuff 1 - * into R3. Accordingly, we can bypass all the instruction - * emulation logic since we know the inevitable result. It's possible - * that a user could construct a scenario where the 'is-enabled' - * probe was on some other instruction, but that would be a rather - * exotic way to shoot oneself in the foot. - */ - if (is_enabled) { - rp->fixreg[3] = 1; - new_pc = rp->pc + 4; - goto done; - } - - - switch (tp->ftt_type) { - case FASTTRAP_T_NOP: - new_pc = rp->pc + 4; - break; - case FASTTRAP_T_BC: - if (!fasttrap_branch_taken(tp->ftt_bo, tp->ftt_bi, rp)) - break; - /* FALLTHROUGH */ - case FASTTRAP_T_B: - if (tp->ftt_instr & 0x01) - rp->lr = rp->pc + 4; - new_pc = tp->ftt_dest; - break; - case FASTTRAP_T_BLR: - case FASTTRAP_T_BCTR: - if (!fasttrap_branch_taken(tp->ftt_bo, tp->ftt_bi, rp)) - break; - /* FALLTHROUGH */ - if (tp->ftt_type == FASTTRAP_T_BCTR) - new_pc = rp->ctr; - else - new_pc = rp->lr; - if (tp->ftt_instr & 0x01) - rp->lr = rp->pc + 4; - break; - case FASTTRAP_T_COMMON: - break; - }; -done: - /* - * If there were no return probes when we first found the tracepoint, - * we should feel no obligation to honor any return probes that were - * subsequently enabled -- they'll just have to wait until the next - * time around. - */ - if (tp->ftt_retids != NULL) { - /* - * We need to wait until the results of the instruction are - * apparent before invoking any return probes. If this - * instruction was emulated we can just call - * fasttrap_return_common(); if it needs to be executed, we - * need to wait until the user thread returns to the kernel. - */ - if (tp->ftt_type != FASTTRAP_T_COMMON) { - fasttrap_return_common(rp, pc, pid, new_pc); - } else { - ASSERT(curthread->t_dtrace_ret != 0); - ASSERT(curthread->t_dtrace_pc == pc); - ASSERT(curthread->t_dtrace_scrpc != 0); - ASSERT(new_pc == curthread->t_dtrace_astpc); - } - } - - rp->pc = new_pc; - set_regs(curthread, rp); - - return (0); -} - -int -fasttrap_return_probe(struct trapframe *tf) -{ - struct reg reg, *rp; - proc_t *p = curproc; - uintptr_t pc = curthread->t_dtrace_pc; - uintptr_t npc = curthread->t_dtrace_npc; - - curthread->t_dtrace_pc = 0; - curthread->t_dtrace_npc = 0; - curthread->t_dtrace_scrpc = 0; - curthread->t_dtrace_astpc = 0; - - fill_regs(curthread, ®); - rp = ® - - /* - * We set rp->pc to the address of the traced instruction so - * that it appears to dtrace_probe() that we're on the original - * instruction. - */ - rp->pc = pc; - - fasttrap_return_common(rp, pc, p->p_pid, npc); - - return (0); -} diff --git a/sys/cddl/contrib/opensolaris/uts/powerpc/sys/fasttrap_isa.h b/sys/cddl/contrib/opensolaris/uts/powerpc/sys/fasttrap_isa.h deleted file mode 100644 index 98d5d267566..00000000000 --- a/sys/cddl/contrib/opensolaris/uts/powerpc/sys/fasttrap_isa.h +++ /dev/null @@ -1,76 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* Portions Copyright 2013 Justin Hibbits */ -/* - * Copyright 2005 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -#ifndef _FASTTRAP_ISA_H -#define _FASTTRAP_ISA_H - -#pragma ident "%Z%%M% %I% %E% SMI" - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define FASTTRAP_SUNWDTRACE_SIZE 64 -#define FASTTRAP_INSTR 0x0FFFDDDD - -typedef uint32_t fasttrap_instr_t; - -typedef struct fasttrap_machtp_t { - fasttrap_instr_t ftmt_instr; /* original instruction */ - uintptr_t ftmt_dest; /* branch target */ - uint8_t ftmt_type; /* emulation type */ - uint8_t ftmt_flags; /* emulation flags */ - uint8_t ftmt_bo; /* BO field */ - uint8_t ftmt_bi; /* BI field (CR bit) */ -} fasttrap_machtp_t; - -#define ftt_instr ftt_mtp.ftmt_instr -#define ftt_dest ftt_mtp.ftmt_dest -#define ftt_type ftt_mtp.ftmt_type -#define ftt_flags ftt_mtp.ftmt_flags -#define ftt_bo ftt_mtp.ftmt_bo -#define ftt_bi ftt_mtp.ftmt_bi - -#define FASTTRAP_T_COMMON 0x00 -#define FASTTRAP_T_B 0x01 -#define FASTTRAP_T_BC 0x02 -#define FASTTRAP_T_BLR 0x03 -#define FASTTRAP_T_BCTR 0x04 -#define FASTTRAP_T_NOP 0x05 - -#define FASTTRAP_AFRAMES 3 -#define FASTTRAP_RETURN_AFRAMES 4 -#define FASTTRAP_ENTRY_AFRAMES 3 -#define FASTTRAP_OFFSET_AFRAMES 3 - -#ifdef __cplusplus -} -#endif - -#endif /* _FASTTRAP_ISA_H */ diff --git a/sys/cddl/dev/dtrace/mips/dtrace_asm.S b/sys/cddl/dev/dtrace/mips/dtrace_asm.S deleted file mode 100644 index b427fcae173..00000000000 --- a/sys/cddl/dev/dtrace/mips/dtrace_asm.S +++ /dev/null @@ -1,232 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -#define _ASM -#define _LOCORE - -#include -#include - -#include -#include -#include -#include - - .set noreorder # Noreorder is default style! - -/* - * Primitives - */ - - .text - -/* -void dtrace_membar_producer(void) -*/ -LEAF(dtrace_membar_producer) - j ra - nop -END(dtrace_membar_producer) - -/* -void dtrace_membar_consumer(void) -*/ -LEAF(dtrace_membar_consumer) - j ra - nop -END(dtrace_membar_consumer) - -/* -dtrace_icookie_t dtrace_interrupt_disable(void) -*/ -LEAF(dtrace_interrupt_disable) - mfc0 t0, MIPS_COP_0_STATUS - move v0, t0 - and v0, v0, MIPS_SR_INT_IE - and t0, t0, ~MIPS_SR_INT_IE - mtc0 t0, MIPS_COP_0_STATUS - j ra - nop -END(dtrace_interrupt_disable) - -/* -void dtrace_interrupt_enable(dtrace_icookie_t cookie) -*/ -LEAF(dtrace_interrupt_enable) - mfc0 t0, MIPS_COP_0_STATUS - beqz a0, not_enabled - or t0, t0, MIPS_SR_INT_IE - mtc0 t0, MIPS_COP_0_STATUS -not_enabled: - j ra - nop -END(dtrace_interrupt_enable) - -/* -uint32_t dtrace_cas32(uint32_t *target, uint32_t cmp, uint32_t new) -*/ -LEAF(dtrace_cas32) -1: - move t1, a2 - ll t0, 0(a0) - bne t0, a1, 2f - nop - sc t1, 0(a0) - beqz t1, 1b - nop -2: move v0, t0 - j ra - nop -END(dtrace_cas32) - -/* -void * -dtrace_casptr(void *target, void *cmp, void *new) -*/ -LEAF(dtrace_casptr) -1: - move t1, a2 - PTR_LL t0, 0(a0) - bne t0, a1, 2f - nop - PTR_SC t1, 0(a0) - beqz t1, 1b - nop -2: move v0, t0 - j ra - nop -END(dtrace_casptr) - - -/* -uintptr_t -dtrace_fulword(void *addr) -*/ -LEAF(dtrace_fulword) -END(dtrace_fulword) - -/* -uint8_t -dtrace_fuword8_nocheck(void *addr) -*/ -LEAF(dtrace_fuword8_nocheck) - lbu v0, 0(a0) - j ra - nop -END(dtrace_fuword8_nocheck) - -/* -uint16_t -dtrace_fuword16_nocheck(void *addr) -*/ -LEAF(dtrace_fuword16_nocheck) - lhu v0, 0(a0) - j ra - nop -END(dtrace_fuword16_nocheck) - -/* -uint32_t -dtrace_fuword32_nocheck(void *addr) -*/ -LEAF(dtrace_fuword32_nocheck) - lw v0, 0(a0) - j ra - nop -END(dtrace_fuword32_nocheck) - -/* -uint64_t -dtrace_fuword64_nocheck(void *addr) -*/ -LEAF(dtrace_fuword64_nocheck) -#if defined(__mips_n64) || defined(__mips_n32) - ld v0, 0(a0) -#else - lw v1,4(a0) - lw v0,0(a0) -#endif - j ra - nop -END(dtrace_fuword64_nocheck) - -/* -XXX: unoptimized -void -dtrace_copy(uintptr_t src, uintptr_t dest, size_t size) -*/ -LEAF(dtrace_copy) -1: - beqz a2, 2f - nop - lbu t0, 0(a0) - sb t0, 0(a1) - PTR_ADDU a0, a0, 1 - PTR_ADDU a1, a1, 1 - INT_SUBU a2, a2, 1 - j 1b - nop -2: - j ra - nop -END(dtrace_copy) - -/* -XXX: Unoptimized. Check for flags on page boundaries only(?) -void -dtrace_copystr(uintptr_t uaddr, uintptr_t kaddr, size_t size, - volatile uint16_t *flags) -*/ -LEAF(dtrace_copystr) -1: - lbu t0, 0(a0) - sb t0, 0(a1) - PTR_ADDU a0, a0, 1 - PTR_ADDU a1, a1, 1 - INT_SUBU a2, a2, 1 - beqz t0, 2f - nop - lhu t1, (a3) - and t1, t1, CPU_DTRACE_BADADDR - bnez t1, 2f - nop - - bnez a2, 1b - nop -2: - j ra - nop -END(dtrace_copystr) - -/* -uintptr_t -dtrace_caller(int aframes) -*/ -LEAF(dtrace_caller) - li v0, -1 - j ra - nop -END(dtrace_caller) diff --git a/sys/cddl/dev/dtrace/mips/dtrace_isa.c b/sys/cddl/dev/dtrace/mips/dtrace_isa.c deleted file mode 100644 index 3d3999d8349..00000000000 --- a/sys/cddl/dev/dtrace/mips/dtrace_isa.c +++ /dev/null @@ -1,722 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright 2005 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ -#include - -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "regset.h" - -#ifdef __mips_n64 -#define MIPS_IS_VALID_KERNELADDR(reg) ((((reg) & 3) == 0) && \ - ((vm_offset_t)(reg) >= MIPS_XKPHYS_START)) -#else -#define MIPS_IS_VALID_KERNELADDR(reg) ((((reg) & 3) == 0) && \ - ((vm_offset_t)(reg) >= MIPS_KSEG0_START)) -#endif - - - -/* - * Wee need some reasonable default to prevent backtrace code - * from wandering too far - */ -#define MAX_FUNCTION_SIZE 0x10000 -#define MAX_PROLOGUE_SIZE 0x100 - -uint8_t dtrace_fuword8_nocheck(void *); -uint16_t dtrace_fuword16_nocheck(void *); -uint32_t dtrace_fuword32_nocheck(void *); -uint64_t dtrace_fuword64_nocheck(void *); - -static int dtrace_next_frame(register_t *pc, register_t *sp, register_t *args, int *valid_args); -static int dtrace_next_uframe(register_t *pc, register_t *sp, register_t *ra); - -void -dtrace_getpcstack(pc_t *pcstack, int pcstack_limit, int aframes, - uint32_t *intrpc) -{ - int depth = 0; - vm_offset_t callpc; - pc_t caller = (pc_t) solaris_cpu[curcpu].cpu_dtrace_caller; - register_t sp, ra, pc; - - if (intrpc != 0) - pcstack[depth++] = (pc_t) intrpc; - - aframes++; - - sp = (register_t)(intptr_t)__builtin_frame_address(0); - ra = (register_t)(intptr_t)__builtin_return_address(0); - - __asm __volatile( - "jal 99f\n" - "nop\n" - "99:\n" - "move %0, $31\n" /* get ra */ - "move $31, %1\n" /* restore ra */ - : "=r" (pc) - : "r" (ra)); - - while (depth < pcstack_limit) { - - callpc = pc; - - if (aframes > 0) { - aframes--; - if ((aframes == 0) && (caller != 0)) { - pcstack[depth++] = caller; - } - } - else { - pcstack[depth++] = callpc; - } - - if (dtrace_next_frame(&pc, &sp, NULL, NULL) < 0) - break; - } - - for (; depth < pcstack_limit; depth++) { - pcstack[depth] = 0; - } -} - -void -dtrace_getupcstack(uint64_t *pcstack, int pcstack_limit) -{ - proc_t *p = curproc; - struct trapframe *tf; - register_t sp, ra, pc; - volatile uint16_t *flags = - (volatile uint16_t *)&cpu_core[curcpu].cpuc_dtrace_flags; - - if (*flags & CPU_DTRACE_FAULT) - return; - - if (pcstack_limit <= 0) - return; - - /* - * If there's no user context we still need to zero the stack. - */ - if (p == NULL || (tf = curthread->td_frame) == NULL) - goto zero; - - *pcstack++ = (uint64_t)p->p_pid; - pcstack_limit--; - - if (pcstack_limit <= 0) - return; - - pc = (uint64_t)tf->pc; - sp = (uint64_t)tf->sp; - ra = (uint64_t)tf->ra; - *pcstack++ = (uint64_t)tf->pc; - - /* - * Unwind, and unwind, and unwind - */ - while (1) { - if (dtrace_next_uframe(&pc, &sp, &ra) < 0) - break; - - *pcstack++ = pc; - pcstack_limit--; - - if (pcstack_limit <= 0) - break; - } - -zero: - while (pcstack_limit-- > 0) - *pcstack++ = 0; -} - -int -dtrace_getustackdepth(void) -{ - int n = 0; - proc_t *p = curproc; - struct trapframe *tf; - register_t sp, ra, pc; - volatile uint16_t *flags = - (volatile uint16_t *)&cpu_core[curcpu].cpuc_dtrace_flags; - - if (*flags & CPU_DTRACE_FAULT) - return (0); - - if (p == NULL || (tf = curthread->td_frame) == NULL) - return (0); - - pc = (uint64_t)tf->pc; - sp = (uint64_t)tf->sp; - ra = (uint64_t)tf->ra; - n++; - - /* - * Unwind, and unwind, and unwind - */ - while (1) { - if (dtrace_next_uframe(&pc, &sp, &ra) < 0) - break; - n++; - } - - return (n); -} - -void -dtrace_getufpstack(uint64_t *pcstack, uint64_t *fpstack, int pcstack_limit) -{ - printf("IMPLEMENT ME: %s\n", __func__); -} - -/*ARGSUSED*/ -uint64_t -dtrace_getarg(int arg, int aframes) -{ - int i; - register_t sp, ra, pc; - /* XXX: Fix this ugly code */ - register_t args[8]; - int valid[8]; - - sp = (register_t)(intptr_t)__builtin_frame_address(0); - ra = (register_t)(intptr_t)__builtin_return_address(0); - - __asm __volatile( - "jal 99f\n" - "nop\n" - "99:\n" - "move %0, $31\n" /* get ra */ - "move $31, %1\n" /* restore ra */ - : "=r" (pc) - : "r" (ra)); - - for (i = 0; i <= aframes + 1; i++) { - if (dtrace_next_frame(&pc, &sp, args, valid) < 0) { - printf("%s: stack ends at frame #%d\n", __func__, i); - return (0); - } - } - - if (arg < 8) { - if (valid[arg]) - return (args[arg]); - else - printf("%s: request arg%d is not valid\n", __func__, arg); - } - - return (0); -} - -int -dtrace_getstackdepth(int aframes) -{ - register_t sp, ra, pc; - int depth = 0; - - sp = (register_t)(intptr_t)__builtin_frame_address(0); - ra = (register_t)(intptr_t)__builtin_return_address(0); - - __asm __volatile( - "jal 99f\n" - "nop\n" - "99:\n" - "move %0, $31\n" /* get ra */ - "move $31, %1\n" /* restore ra */ - : "=r" (pc) - : "r" (ra)); - - for (;;) { - if (dtrace_next_frame(&pc, &sp, NULL, NULL) < 0) - break; - depth++; - } - - if (depth < aframes) - return 0; - else - return depth - aframes; -} - -ulong_t -dtrace_getreg(struct trapframe *rp, uint_t reg) -{ - - return (0); -} - -static int -dtrace_next_frame(register_t *pc, register_t *sp, - register_t *args, int *valid_args) -{ - InstFmt i; - /* - * Arrays for a0..a3 registers and flags if content - * of these registers is valid, e.g. obtained from the stack - */ - uintptr_t va; - unsigned instr, mask; - unsigned int frames = 0; - int more, stksize; - register_t ra = 0; - int arg, r; - vm_offset_t addr; - - /* - * Invalidate arguments values - */ - if (valid_args) { - for (r = 0; r < 8; r++) - valid_args[r] = 0; - } - - /* Jump here after a nonstandard (interrupt handler) frame */ - stksize = 0; - if (frames++ > 100) { - /* return breaks stackframe-size heuristics with gcc -O2 */ - goto error; /* XXX */ - } - - /* check for bad SP: could foul up next frame */ - if (!MIPS_IS_VALID_KERNELADDR(*sp)) { - goto error; - } - - /* check for bad PC */ - if (!MIPS_IS_VALID_KERNELADDR(*pc)) { - goto error; - } - - /* - * Find the beginning of the current subroutine by scanning - * backwards from the current PC for the end of the previous - * subroutine. - */ - va = *pc - sizeof(int); - while (1) { - instr = kdbpeek((int *)va); - - /* [d]addiu sp,sp,-X */ - if (((instr & 0xffff8000) == 0x27bd8000) - || ((instr & 0xffff8000) == 0x67bd8000)) - break; - - /* jr ra */ - if (instr == 0x03e00008) { - /* skip over branch-delay slot instruction */ - va += 2 * sizeof(int); - break; - } - - va -= sizeof(int); - } - - /* skip over nulls which might separate .o files */ - while ((instr = kdbpeek((int *)va)) == 0) - va += sizeof(int); - - /* scan forwards to find stack size and any saved registers */ - stksize = 0; - more = 3; - mask = 0; - for (; more; va += sizeof(int), - more = (more == 3) ? 3 : more - 1) { - /* stop if hit our current position */ - if (va >= *pc) - break; - instr = kdbpeek((int *)va); - i.word = instr; - switch (i.JType.op) { - case OP_SPECIAL: - switch (i.RType.func) { - case OP_JR: - case OP_JALR: - more = 2; /* stop after next instruction */ - break; - - case OP_SYSCALL: - case OP_BREAK: - more = 1; /* stop now */ - }; - break; - - case OP_BCOND: - case OP_J: - case OP_JAL: - case OP_BEQ: - case OP_BNE: - case OP_BLEZ: - case OP_BGTZ: - more = 2; /* stop after next instruction */ - break; - - case OP_COP0: - case OP_COP1: - case OP_COP2: - case OP_COP3: - switch (i.RType.rs) { - case OP_BCx: - case OP_BCy: - more = 2; /* stop after next instruction */ - }; - break; - - case OP_SW: - /* look for saved registers on the stack */ - if (i.IType.rs != 29) - break; - /* only restore the first one */ - if (mask & (1 << i.IType.rt)) - break; - mask |= (1 << i.IType.rt); - addr = (vm_offset_t)(*sp + (short)i.IType.imm); - switch (i.IType.rt) { - case 4:/* a0 */ - case 5:/* a1 */ - case 6:/* a2 */ - case 7:/* a3 */ -#if defined(__mips_n64) || defined(__mips_n32) - case 8:/* a4 */ - case 9:/* a5 */ - case 10:/* a6 */ - case 11:/* a7 */ -#endif - arg = i.IType.rt - 4; - if (args) - args[arg] = kdbpeek((int*)addr); - if (valid_args) - valid_args[arg] = 1; - break; - case 31: /* ra */ - ra = kdbpeek((int *)addr); - } - break; - - case OP_SD: - /* look for saved registers on the stack */ - if (i.IType.rs != 29) - break; - /* only restore the first one */ - if (mask & (1 << i.IType.rt)) - break; - mask |= (1 << i.IType.rt); - addr = (vm_offset_t)(*sp + (short)i.IType.imm); - switch (i.IType.rt) { - case 4:/* a0 */ - case 5:/* a1 */ - case 6:/* a2 */ - case 7:/* a3 */ -#if defined(__mips_n64) || defined(__mips_n32) - case 8:/* a4 */ - case 9:/* a5 */ - case 10:/* a6 */ - case 11:/* a7 */ -#endif - arg = i.IType.rt - 4; - if (args) - args[arg] = kdbpeekd((int *)addr); - if (valid_args) - valid_args[arg] = 1; - break; - - case 31: /* ra */ - ra = kdbpeekd((int *)addr); - } - break; - - case OP_ADDI: - case OP_ADDIU: - case OP_DADDI: - case OP_DADDIU: - /* look for stack pointer adjustment */ - if (i.IType.rs != 29 || i.IType.rt != 29) - break; - stksize = -((short)i.IType.imm); - } - } - - if (!MIPS_IS_VALID_KERNELADDR(ra)) - return (-1); - - *pc = ra; - *sp += stksize; - -#if defined(__mips_o32) - /* - * For MIPS32 fill out arguments 5..8 from the stack - */ - for (arg = 4; arg < 8; arg++) { - addr = (vm_offset_t)(*sp + arg*sizeof(register_t)); - if (args) - args[arg] = kdbpeekd((int *)addr); - if (valid_args) - valid_args[arg] = 1; - } -#endif - - return (0); -error: - return (-1); -} - -static int -dtrace_next_uframe(register_t *pc, register_t *sp, register_t *ra) -{ - int offset, registers_on_stack; - uint32_t opcode, mask; - register_t function_start; - int stksize; - InstFmt i; - - volatile uint16_t *flags = - (volatile uint16_t *)&cpu_core[curcpu].cpuc_dtrace_flags; - - registers_on_stack = 0; - mask = 0; - function_start = 0; - offset = 0; - stksize = 0; - - while (offset < MAX_FUNCTION_SIZE) { - opcode = dtrace_fuword32((void *)(vm_offset_t)(*pc - offset)); - - if (*flags & CPU_DTRACE_FAULT) - goto fault; - - /* [d]addiu sp, sp, -X*/ - if (((opcode & 0xffff8000) == 0x27bd8000) - || ((opcode & 0xffff8000) == 0x67bd8000)) { - function_start = *pc - offset; - registers_on_stack = 1; - break; - } - - /* lui gp, X */ - if ((opcode & 0xffff8000) == 0x3c1c0000) { - /* - * Function might start with this instruction - * Keep an eye on "jr ra" and sp correction - * with positive value further on - */ - function_start = *pc - offset; - } - - if (function_start) { - /* - * Stop looking further. Possible end of - * function instruction: it means there is no - * stack modifications, sp is unchanged - */ - - /* [d]addiu sp,sp,X */ - if (((opcode & 0xffff8000) == 0x27bd0000) - || ((opcode & 0xffff8000) == 0x67bd0000)) - break; - - if (opcode == 0x03e00008) - break; - } - - offset += sizeof(int); - } - - if (!function_start) - return (-1); - - if (registers_on_stack) { - offset = 0; - while ((offset < MAX_PROLOGUE_SIZE) - && ((function_start + offset) < *pc)) { - i.word = - dtrace_fuword32((void *)(vm_offset_t)(function_start + offset)); - switch (i.JType.op) { - case OP_SW: - /* look for saved registers on the stack */ - if (i.IType.rs != 29) - break; - /* only restore the first one */ - if (mask & (1 << i.IType.rt)) - break; - mask |= (1 << i.IType.rt); - if (i.IType.rt == 31) - *ra = dtrace_fuword32((void *)(vm_offset_t)(*sp + (short)i.IType.imm)); - break; - - case OP_SD: - /* look for saved registers on the stack */ - if (i.IType.rs != 29) - break; - /* only restore the first one */ - if (mask & (1 << i.IType.rt)) - break; - mask |= (1 << i.IType.rt); - /* ra */ - if (i.IType.rt == 31) - *ra = dtrace_fuword64((void *)(vm_offset_t)(*sp + (short)i.IType.imm)); - break; - - case OP_ADDI: - case OP_ADDIU: - case OP_DADDI: - case OP_DADDIU: - /* look for stack pointer adjustment */ - if (i.IType.rs != 29 || i.IType.rt != 29) - break; - stksize = -((short)i.IType.imm); - } - - offset += sizeof(int); - - if (*flags & CPU_DTRACE_FAULT) - goto fault; - } - } - - /* - * We reached the end of backtrace - */ - if (*pc == *ra) - return (-1); - - *pc = *ra; - *sp += stksize; - - return (0); -fault: - /* - * We just got lost in backtrace, no big deal - */ - *flags &= ~CPU_DTRACE_FAULT; - return (-1); -} - -static int -dtrace_copycheck(uintptr_t uaddr, uintptr_t kaddr, size_t size) -{ - - if (uaddr + size > VM_MAXUSER_ADDRESS || uaddr + size < uaddr) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_BADADDR); - cpu_core[curcpu].cpuc_dtrace_illval = uaddr; - return (0); - } - - return (1); -} - -void -dtrace_copyin(uintptr_t uaddr, uintptr_t kaddr, size_t size, - volatile uint16_t *flags) -{ - if (dtrace_copycheck(uaddr, kaddr, size)) - dtrace_copy(uaddr, kaddr, size); -} - -void -dtrace_copyout(uintptr_t kaddr, uintptr_t uaddr, size_t size, - volatile uint16_t *flags) -{ - if (dtrace_copycheck(uaddr, kaddr, size)) - dtrace_copy(kaddr, uaddr, size); -} - -void -dtrace_copyinstr(uintptr_t uaddr, uintptr_t kaddr, size_t size, - volatile uint16_t *flags) -{ - if (dtrace_copycheck(uaddr, kaddr, size)) - dtrace_copystr(uaddr, kaddr, size, flags); -} - -void -dtrace_copyoutstr(uintptr_t kaddr, uintptr_t uaddr, size_t size, - volatile uint16_t *flags) -{ - if (dtrace_copycheck(uaddr, kaddr, size)) - dtrace_copystr(kaddr, uaddr, size, flags); -} - -uint8_t -dtrace_fuword8(void *uaddr) -{ - if ((uintptr_t)uaddr > VM_MAXUSER_ADDRESS) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_BADADDR); - cpu_core[curcpu].cpuc_dtrace_illval = (uintptr_t)uaddr; - return (0); - } - return (dtrace_fuword8_nocheck(uaddr)); -} - -uint16_t -dtrace_fuword16(void *uaddr) -{ - if ((uintptr_t)uaddr > VM_MAXUSER_ADDRESS) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_BADADDR); - cpu_core[curcpu].cpuc_dtrace_illval = (uintptr_t)uaddr; - return (0); - } - return (dtrace_fuword16_nocheck(uaddr)); -} - -uint32_t -dtrace_fuword32(void *uaddr) -{ - if ((uintptr_t)uaddr > VM_MAXUSER_ADDRESS) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_BADADDR); - cpu_core[curcpu].cpuc_dtrace_illval = (uintptr_t)uaddr; - return (0); - } - return (dtrace_fuword32_nocheck(uaddr)); -} - -uint64_t -dtrace_fuword64(void *uaddr) -{ - if ((uintptr_t)uaddr > VM_MAXUSER_ADDRESS) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_BADADDR); - cpu_core[curcpu].cpuc_dtrace_illval = (uintptr_t)uaddr; - return (0); - } - return (dtrace_fuword64_nocheck(uaddr)); -} diff --git a/sys/cddl/dev/dtrace/mips/dtrace_subr.c b/sys/cddl/dev/dtrace/mips/dtrace_subr.c deleted file mode 100644 index 3378caee386..00000000000 --- a/sys/cddl/dev/dtrace/mips/dtrace_subr.c +++ /dev/null @@ -1,289 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - * - */ -/* - * Copyright 2005 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define DELAYBRANCH(x) ((int)(x) < 0) - -extern int (*dtrace_invop_jump_addr)(struct trapframe *); -extern dtrace_id_t dtrace_probeid_error; - -int dtrace_invop(uintptr_t, struct trapframe *, uintptr_t); -void dtrace_invop_init(void); -void dtrace_invop_uninit(void); - -typedef struct dtrace_invop_hdlr { - int (*dtih_func)(uintptr_t, struct trapframe *, uintptr_t); - struct dtrace_invop_hdlr *dtih_next; -} dtrace_invop_hdlr_t; - -dtrace_invop_hdlr_t *dtrace_invop_hdlr; - -int -dtrace_invop(uintptr_t addr, struct trapframe *stack, uintptr_t eax) -{ - struct thread *td; - dtrace_invop_hdlr_t *hdlr; - int rval; - - rval = 0; - td = curthread; - td->t_dtrace_trapframe = frame; - for (hdlr = dtrace_invop_hdlr; hdlr != NULL; hdlr = hdlr->dtih_next) - if ((rval = hdlr->dtih_func(addr, stack, eax)) != 0) - break; - td->t_dtrace_trapframe = NULL; - return (rval); -} - -void -dtrace_invop_add(int (*func)(uintptr_t, struct trapframe *, uintptr_t)) -{ - dtrace_invop_hdlr_t *hdlr; - - hdlr = kmem_alloc(sizeof (dtrace_invop_hdlr_t), KM_SLEEP); - hdlr->dtih_func = func; - hdlr->dtih_next = dtrace_invop_hdlr; - dtrace_invop_hdlr = hdlr; -} - -void -dtrace_invop_remove(int (*func)(uintptr_t, struct trapframe *, uintptr_t)) -{ - dtrace_invop_hdlr_t *hdlr, *prev; - - hdlr = dtrace_invop_hdlr; - prev = NULL; - - for (;;) { - if (hdlr == NULL) - panic("attempt to remove non-existent invop handler"); - - if (hdlr->dtih_func == func) - break; - - prev = hdlr; - hdlr = hdlr->dtih_next; - } - - if (prev == NULL) { - ASSERT(dtrace_invop_hdlr == hdlr); - dtrace_invop_hdlr = hdlr->dtih_next; - } else { - ASSERT(dtrace_invop_hdlr != hdlr); - prev->dtih_next = hdlr->dtih_next; - } - - kmem_free(hdlr, 0); -} - -/*ARGSUSED*/ -void -dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit)) -{ - /* - * No toxic regions? - */ -} - -void -dtrace_xcall(processorid_t cpu, dtrace_xcall_t func, void *arg) -{ - cpuset_t cpus; - - if (cpu == DTRACE_CPUALL) - cpus = all_cpus; - else - CPU_SETOF(cpu, &cpus); - - smp_rendezvous_cpus(cpus, smp_no_rendezvous_barrier, func, - smp_no_rendezvous_barrier, arg); -} - -static void -dtrace_sync_func(void) -{ -} - -void -dtrace_sync(void) -{ - dtrace_xcall(DTRACE_CPUALL, (dtrace_xcall_t)dtrace_sync_func, NULL); -} - -/* - * DTrace needs a high resolution time function which can - * be called from a probe context and guaranteed not to have - * instrumented with probes itself. - * - * Returns nanoseconds since boot. - */ -uint64_t -dtrace_gethrtime() -{ - struct timespec curtime; - - nanouptime(&curtime); - - return (curtime.tv_sec * 1000000000UL + curtime.tv_nsec); - -} - -uint64_t -dtrace_gethrestime(void) -{ - struct timespec curtime; - - getnanotime(&curtime); - - return (curtime.tv_sec * 1000000000UL + curtime.tv_nsec); -} - -/* Function to handle DTrace traps during probes. See amd64/amd64/trap.c */ -int -dtrace_trap(struct trapframe *frame, u_int type) -{ - - /* - * A trap can occur while DTrace executes a probe. Before - * executing the probe, DTrace blocks re-scheduling and sets - * a flag in its per-cpu flags to indicate that it doesn't - * want to fault. On returning from the probe, the no-fault - * flag is cleared and finally re-scheduling is enabled. - * - * Check if DTrace has enabled 'no-fault' mode: - */ - if ((cpu_core[curcpu].cpuc_dtrace_flags & CPU_DTRACE_NOFAULT) != 0) { - /* - * There are only a couple of trap types that are expected. - * All the rest will be handled in the usual way. - */ - switch (type) { - /* Page fault. */ - case T_TLB_ST_MISS: - case T_ADDR_ERR_ST: - case T_TLB_LD_MISS: - case T_ADDR_ERR_LD: - case T_BUS_ERR_IFETCH: - /* Flag a bad address. */ - cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_BADADDR; - cpu_core[curcpu].cpuc_dtrace_illval = frame->badvaddr; - - /* - * Offset the instruction pointer to the instruction - * following the one causing the fault. - */ - if (DELAYBRANCH(frame->cause)) /* Check BD bit */ - { - /* XXX: check MipsEmulateBranch on MIPS64 - frame->pc = MipsEmulateBranch(frame, frame->pc, - 0, 0); - */ - panic("%s: delay slot at %jx, badvaddr = %jx\n", - __func__, - (intmax_t)frame->pc, (intmax_t)frame->badvaddr); - } - else - frame->pc += sizeof(int); - return (1); - default: - /* Handle all other traps in the usual way. */ - break; - } - } - - /* Handle the trap in the usual way. */ - return (0); -} - -void -dtrace_probe_error(dtrace_state_t *state, dtrace_epid_t epid, int which, - int fault, int fltoffs, uintptr_t illval) -{ - - dtrace_probe(dtrace_probeid_error, (uint64_t)(uintptr_t)state, - (uintptr_t)epid, - (uintptr_t)which, (uintptr_t)fault, (uintptr_t)fltoffs); -} - -static int -dtrace_invop_start(struct trapframe *frame) -{ - register_t *sp; - int16_t offs; - int invop; - - invop = dtrace_invop(frame->pc, frame, frame->pc); - if (invop == 0) - return (-1); - - offs = (invop & LDSD_DATA_MASK); - sp = (register_t *)((uint8_t *)frame->sp + offs); - - switch (invop & LDSD_RA_SP_MASK) { - case LD_RA_SP: - frame->ra = *sp; - frame->pc += INSN_SIZE; - break; - case SD_RA_SP: - *(sp) = frame->ra; - frame->pc += INSN_SIZE; - break; - default: - printf("%s: 0x%x undefined\n", __func__, invop); - return (-1); - }; - - return (0); -} - -void -dtrace_invop_init(void) -{ - - dtrace_invop_jump_addr = dtrace_invop_start; -} - -void -dtrace_invop_uninit(void) -{ - - dtrace_invop_jump_addr = 0; -} diff --git a/sys/cddl/dev/dtrace/mips/regset.h b/sys/cddl/dev/dtrace/mips/regset.h deleted file mode 100644 index 8a34bd77d32..00000000000 --- a/sys/cddl/dev/dtrace/mips/regset.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - * - */ -/* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -/* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */ - -/* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */ -/* All Rights Reserved */ - -#ifndef _REGSET_H -#define _REGSET_H - -/* - * #pragma ident "@(#)regset.h 1.11 05/06/08 SMI" - */ - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * XXXDTRACE: define registers properly - */ - -#if 0 -#define REG_PC PC -#define REG_FP EBP -#define REG_SP SP -#define REG_PS EFL -#define REG_R0 EAX -#define REG_R1 EDX -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* _REGSET_H */ diff --git a/sys/cddl/dev/dtrace/powerpc/dtrace_asm.S b/sys/cddl/dev/dtrace/powerpc/dtrace_asm.S deleted file mode 100644 index 807492dc199..00000000000 --- a/sys/cddl/dev/dtrace/powerpc/dtrace_asm.S +++ /dev/null @@ -1,189 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - * - * Portions Copyright 2012,2013 Justin Hibbits - */ -/* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -#include "assym.inc" - -#define _ASM - -#include -#include - -#include -/* -#include -*/ - -/* - * Primitives - */ - - .text - -/* -void dtrace_membar_producer(void) -*/ -ASENTRY_NOPROF(dtrace_membar_producer) - sync - blr -END(dtrace_membar_producer) - -/* -void dtrace_membar_consumer(void) -*/ -ASENTRY_NOPROF(dtrace_membar_consumer) - isync - blr -END(dtrace_membar_consumer) - -/* -dtrace_icookie_t dtrace_interrupt_disable(void) -*/ -ASENTRY_NOPROF(dtrace_interrupt_disable) - mfmsr %r3 -#ifdef __powerpc64__ - /* Two-instruction sequence to clear EE flag */ - rldicl %r0,%r3,48,1 - rotldi %r0,%r0,16 -#else - rlwinm %r0,%r3,0,17,15 /* Clear EE flag */ -#endif - mtmsr %r0 - blr -END(dtrace_interrupt_disable) - -/* -void dtrace_interrupt_enable(dtrace_icookie_t cookie) -*/ -ASENTRY_NOPROF(dtrace_interrupt_enable) - mtmsr %r3 - blr -END(dtrace_interrupt_enable) - -/* -uint32_t dtrace_cas32(uint32_t *target, uint32_t cmp, uint32_t new) -*/ -ASENTRY_NOPROF(dtrace_cas32) -1: - lwarx %r0,0,%r3 - cmpw %r4,%r0 - bne 2f - stwcx. %r5,0,%r3 - bne 1b -2: mr %r3,%r0 - blr -END(dtrace_cas32) - -/* -void * -dtrace_casptr(void *target, void *cmp, void *new) -*/ -ASENTRY_NOPROF(dtrace_casptr) -#ifdef __powerpc64__ -1: - ldarx %r0,0,%r3 - cmpd %r4,%r0 - bne 2f - stdcx. %r5,0,%r3 - bne 1b -#else -1: - lwarx %r0,0,%r3 - cmpw %r4,%r0 - bne 2f - stwcx. %r5,0,%r3 - bne 1b -#endif -2: mr %r3,%r0 - blr -END(dtrace_casptr) - - -/* -XXX: unoptimized -void -dtrace_copy(uintptr_t src, uintptr_t dest, size_t size) -*/ -ASENTRY_NOPROF(dtrace_copy) - subi %r7,%r3,1 - subi %r8,%r4,1 - mtctr %r5 -1: - lbzu %r3,1(%r7) - stbu %r3,1(%r8) - bdnz 1b -2: - blr -END(dtrace_copy) - -/* -void -dtrace_copystr(uintptr_t uaddr, uintptr_t kaddr, size_t size, - volatile uint16_t *flags) -*/ -ASENTRY_NOPROF(dtrace_copystr) - subi %r7,%r3,1 - subi %r8,%r4,1 -1: - lbzu %r3,1(%r7) - stbu %r3,1(%r8) - subi %r5,%r5,1 -#ifdef __powerpc64__ - cmpldi %r5,0 -#else - cmplwi %r5,0 -#endif - beq 2f - cmplwi %r3,0 - beq 2f - andi. %r0,%r5,0x0fff - beq 2f - lwz %r0,0(%r6) - andi. %r0,%r0,CPU_DTRACE_BADADDR - beq 1b -2: - blr -END(dtrace_copystr) - -/* -uintptr_t -dtrace_caller(int aframes) -*/ -ASENTRY_NOPROF(dtrace_caller) - li %r3, -1 - blr -END(dtrace_caller) - -/* -greg_t -dtrace_getfp(void) -*/ -ASENTRY_NOPROF(dtrace_getfp) - mr %r3,%r31 - blr -END(dtrace_getfp) - diff --git a/sys/cddl/dev/dtrace/powerpc/dtrace_isa.c b/sys/cddl/dev/dtrace/powerpc/dtrace_isa.c deleted file mode 100644 index 914164d6e4f..00000000000 --- a/sys/cddl/dev/dtrace/powerpc/dtrace_isa.c +++ /dev/null @@ -1,697 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - * - * Portions Copyright 2012,2013 Justin Hibbits - */ -/* - * Copyright 2005 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include - -#include "regset.h" - -/* Offset to the LR Save word (ppc32) */ -#define RETURN_OFFSET 4 -/* Offset to LR Save word (ppc64). CR Save area sits between back chain and LR */ -#define RETURN_OFFSET64 16 - -#ifdef __powerpc64__ -#define OFFSET 4 /* Account for the TOC reload slot */ -#define FRAME_OFFSET 48 -#else -#define OFFSET 0 -#define FRAME_OFFSET 8 -#endif - -#define INKERNEL(x) (((x) <= VM_MAX_KERNEL_ADDRESS && \ - (x) >= VM_MIN_KERNEL_ADDRESS) || \ - (PMAP_HAS_DMAP && (x) >= DMAP_BASE_ADDRESS && \ - (x) <= DMAP_MAX_ADDRESS)) - -static __inline int -dtrace_sp_inkernel(uintptr_t sp) -{ - struct trapframe *frame; - vm_offset_t callpc; - - /* Not within the kernel, or not aligned. */ - if (!INKERNEL(sp) || (sp & 0xf) != 0) - return (0); -#ifdef __powerpc64__ - callpc = *(vm_offset_t *)(sp + RETURN_OFFSET64); -#else - callpc = *(vm_offset_t *)(sp + RETURN_OFFSET); -#endif - if ((callpc & 3) || (callpc < 0x100)) - return (0); - - /* - * trapexit() and asttrapexit() are sentinels - * for kernel stack tracing. - */ - if (callpc + OFFSET == (vm_offset_t) &trapexit || - callpc + OFFSET == (vm_offset_t) &asttrapexit) { - frame = (struct trapframe *)(sp + FRAME_OFFSET); - - return ((frame->srr1 & PSL_PR) == 0); - } - - return (1); -} - -static __inline void -dtrace_next_sp_pc(uintptr_t sp, uintptr_t *nsp, uintptr_t *pc, uintptr_t *lr) -{ - vm_offset_t callpc; - struct trapframe *frame; - - if (lr != 0 && *lr != 0) - callpc = *lr; - else -#ifdef __powerpc64__ - callpc = *(vm_offset_t *)(sp + RETURN_OFFSET64); -#else - callpc = *(vm_offset_t *)(sp + RETURN_OFFSET); -#endif - - /* - * trapexit() and asttrapexit() are sentinels - * for kernel stack tracing. - */ - if ((callpc + OFFSET == (vm_offset_t) &trapexit || - callpc + OFFSET == (vm_offset_t) &asttrapexit)) { - /* Access the trap frame */ - frame = (struct trapframe *)(sp + FRAME_OFFSET); - - if (nsp != NULL) - *nsp = frame->fixreg[1]; - if (pc != NULL) - *pc = frame->srr0; - if (lr != NULL) - *lr = frame->lr; - return; - } - - if (nsp != NULL) - *nsp = *(uintptr_t *)sp; - if (pc != NULL) - *pc = callpc; - /* lr is only valid for trap frames */ - if (lr != NULL) - *lr = 0; -} - -void -dtrace_getpcstack(pc_t *pcstack, int pcstack_limit, int aframes, - uint32_t *intrpc) -{ - int depth = 0; - uintptr_t osp, sp, lr = 0; - vm_offset_t callpc; - pc_t caller = (pc_t) solaris_cpu[curcpu].cpu_dtrace_caller; - - osp = PAGE_SIZE; - if (intrpc != 0) - pcstack[depth++] = (pc_t) intrpc; - - aframes++; - - sp = (uintptr_t)__builtin_frame_address(0); - - while (depth < pcstack_limit) { - if (sp <= osp) - break; - - if (!dtrace_sp_inkernel(sp)) - break; - osp = sp; - dtrace_next_sp_pc(osp, &sp, &callpc, &lr); - - if (aframes > 0) { - aframes--; - if ((aframes == 0) && (caller != 0)) { - pcstack[depth++] = caller; - } - } - else { - pcstack[depth++] = callpc; - } - } - - for (; depth < pcstack_limit; depth++) { - pcstack[depth] = 0; - } -} - -static int -dtrace_getustack_common(uint64_t *pcstack, int pcstack_limit, uintptr_t pc, - uintptr_t sp) -{ - proc_t *p = curproc; - int ret = 0; - - ASSERT(pcstack == NULL || pcstack_limit > 0); - - while (pc != 0) { - ret++; - if (pcstack != NULL) { - *pcstack++ = (uint64_t)pc; - pcstack_limit--; - if (pcstack_limit <= 0) - break; - } - - if (sp == 0) - break; - - if (SV_PROC_FLAG(p, SV_ILP32)) { - pc = dtrace_fuword32((void *)(sp + RETURN_OFFSET)); - sp = dtrace_fuword32((void *)sp); - } - else { - pc = dtrace_fuword64((void *)(sp + RETURN_OFFSET64)); - sp = dtrace_fuword64((void *)sp); - } - } - - return (ret); -} - -void -dtrace_getupcstack(uint64_t *pcstack, int pcstack_limit) -{ - proc_t *p = curproc; - struct trapframe *tf; - uintptr_t pc, sp; - volatile uint16_t *flags = - (volatile uint16_t *)&cpu_core[curcpu].cpuc_dtrace_flags; - int n; - - if (*flags & CPU_DTRACE_FAULT) - return; - - if (pcstack_limit <= 0) - return; - - /* - * If there's no user context we still need to zero the stack. - */ - if (p == NULL || (tf = curthread->td_frame) == NULL) - goto zero; - - *pcstack++ = (uint64_t)p->p_pid; - pcstack_limit--; - - if (pcstack_limit <= 0) - return; - - pc = tf->srr0; - sp = tf->fixreg[1]; - - if (DTRACE_CPUFLAG_ISSET(CPU_DTRACE_ENTRY)) { - /* - * In an entry probe. The frame pointer has not yet been - * pushed (that happens in the function prologue). The - * best approach is to add the current pc as a missing top - * of stack and back the pc up to the caller, which is stored - * at the current stack pointer address since the call - * instruction puts it there right before the branch. - */ - - *pcstack++ = (uint64_t)pc; - pcstack_limit--; - if (pcstack_limit <= 0) - return; - - pc = tf->lr; - } - - n = dtrace_getustack_common(pcstack, pcstack_limit, pc, sp); - ASSERT(n >= 0); - ASSERT(n <= pcstack_limit); - - pcstack += n; - pcstack_limit -= n; - -zero: - while (pcstack_limit-- > 0) - *pcstack++ = 0; -} - -int -dtrace_getustackdepth(void) -{ - proc_t *p = curproc; - struct trapframe *tf; - uintptr_t pc, sp; - int n = 0; - - if (p == NULL || (tf = curthread->td_frame) == NULL) - return (0); - - if (DTRACE_CPUFLAG_ISSET(CPU_DTRACE_FAULT)) - return (-1); - - pc = tf->srr0; - sp = tf->fixreg[1]; - - if (DTRACE_CPUFLAG_ISSET(CPU_DTRACE_ENTRY)) { - /* - * In an entry probe. The frame pointer has not yet been - * pushed (that happens in the function prologue). The - * best approach is to add the current pc as a missing top - * of stack and back the pc up to the caller, which is stored - * at the current stack pointer address since the call - * instruction puts it there right before the branch. - */ - - if (SV_PROC_FLAG(p, SV_ILP32)) { - pc = dtrace_fuword32((void *) sp); - } - else - pc = dtrace_fuword64((void *) sp); - n++; - } - - n += dtrace_getustack_common(NULL, 0, pc, sp); - - return (n); -} - -void -dtrace_getufpstack(uint64_t *pcstack, uint64_t *fpstack, int pcstack_limit) -{ - proc_t *p = curproc; - struct trapframe *tf; - uintptr_t pc, sp; - volatile uint16_t *flags = - (volatile uint16_t *)&cpu_core[curcpu].cpuc_dtrace_flags; -#ifdef notyet /* XXX signal stack */ - uintptr_t oldcontext; - size_t s1, s2; -#endif - - if (*flags & CPU_DTRACE_FAULT) - return; - - if (pcstack_limit <= 0) - return; - - /* - * If there's no user context we still need to zero the stack. - */ - if (p == NULL || (tf = curthread->td_frame) == NULL) - goto zero; - - *pcstack++ = (uint64_t)p->p_pid; - pcstack_limit--; - - if (pcstack_limit <= 0) - return; - - pc = tf->srr0; - sp = tf->fixreg[1]; - -#ifdef notyet /* XXX signal stack */ - oldcontext = lwp->lwp_oldcontext; - s1 = sizeof (struct xframe) + 2 * sizeof (long); - s2 = s1 + sizeof (siginfo_t); -#endif - - if (DTRACE_CPUFLAG_ISSET(CPU_DTRACE_ENTRY)) { - *pcstack++ = (uint64_t)pc; - *fpstack++ = 0; - pcstack_limit--; - if (pcstack_limit <= 0) - return; - - if (SV_PROC_FLAG(p, SV_ILP32)) { - pc = dtrace_fuword32((void *)sp); - } - else { - pc = dtrace_fuword64((void *)sp); - } - } - - while (pc != 0) { - *pcstack++ = (uint64_t)pc; - *fpstack++ = sp; - pcstack_limit--; - if (pcstack_limit <= 0) - break; - - if (sp == 0) - break; - -#ifdef notyet /* XXX signal stack */ - if (oldcontext == sp + s1 || oldcontext == sp + s2) { - ucontext_t *ucp = (ucontext_t *)oldcontext; - greg_t *gregs = ucp->uc_mcontext.gregs; - - sp = dtrace_fulword(&gregs[REG_FP]); - pc = dtrace_fulword(&gregs[REG_PC]); - - oldcontext = dtrace_fulword(&ucp->uc_link); - } else -#endif /* XXX */ - { - if (SV_PROC_FLAG(p, SV_ILP32)) { - pc = dtrace_fuword32((void *)(sp + RETURN_OFFSET)); - sp = dtrace_fuword32((void *)sp); - } - else { - pc = dtrace_fuword64((void *)(sp + RETURN_OFFSET64)); - sp = dtrace_fuword64((void *)sp); - } - } - - /* - * This is totally bogus: if we faulted, we're going to clear - * the fault and break. This is to deal with the apparently - * broken Java stacks on x86. - */ - if (*flags & CPU_DTRACE_FAULT) { - *flags &= ~CPU_DTRACE_FAULT; - break; - } - } - -zero: - while (pcstack_limit-- > 0) - *pcstack++ = 0; -} - -/*ARGSUSED*/ -uint64_t -dtrace_getarg(int arg, int aframes) -{ - uintptr_t val; - uintptr_t *fp = (uintptr_t *)__builtin_frame_address(0); - uintptr_t *stack; - int i; - - /* - * A total of 8 arguments are passed via registers; any argument with - * index of 7 or lower is therefore in a register. - */ - int inreg = 7; - - for (i = 1; i <= aframes; i++) { - fp = (uintptr_t *)*fp; - - /* - * On ppc32 trapexit() is the immediately following label. On - * ppc64 AIM trapexit() follows a nop. - */ -#ifdef __powerpc64__ - if ((long)(fp[2]) + 4 == (long)trapexit) { -#else - if ((long)(fp[1]) == (long)trapexit) { -#endif - /* - * In the case of powerpc, we will use the pointer to the regs - * structure that was pushed when we took the trap. To get this - * structure, we must increment beyond the frame structure. If the - * argument that we're seeking is passed on the stack, we'll pull - * the true stack pointer out of the saved registers and decrement - * our argument by the number of arguments passed in registers; if - * the argument we're seeking is passed in regsiters, we can just - * load it directly. - */ -#ifdef __powerpc64__ - struct reg *rp = (struct reg *)((uintptr_t)fp[0] + 48); -#else - struct reg *rp = (struct reg *)((uintptr_t)fp[0] + 8); -#endif - - if (arg <= inreg) { - stack = &rp->fixreg[3]; - } else { - stack = (uintptr_t *)(rp->fixreg[1]); - arg -= inreg; - } - goto load; - } - - } - - /* - * We know that we did not come through a trap to get into - * dtrace_probe() -- the provider simply called dtrace_probe() - * directly. As this is the case, we need to shift the argument - * that we're looking for: the probe ID is the first argument to - * dtrace_probe(), so the argument n will actually be found where - * one would expect to find argument (n + 1). - */ - arg++; - - if (arg <= inreg) { - /* - * This shouldn't happen. If the argument is passed in a - * register then it should have been, well, passed in a - * register... - */ - DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP); - return (0); - } - - arg -= (inreg + 1); - stack = fp + 2; - -load: - DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT); - val = stack[arg]; - DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT); - - return (val); -} - -int -dtrace_getstackdepth(int aframes) -{ - int depth = 0; - uintptr_t osp, sp; - vm_offset_t callpc; - - osp = PAGE_SIZE; - sp = (uintptr_t)__builtin_frame_address(0); - for(;;) { - if (sp <= osp) - break; - - if (!dtrace_sp_inkernel(sp)) - break; - - depth++; - osp = sp; - dtrace_next_sp_pc(sp, &sp, NULL, NULL); - } - if (depth < aframes) - return (0); - - return (depth - aframes); -} - -ulong_t -dtrace_getreg(struct trapframe *rp, uint_t reg) -{ - if (reg < 32) - return (rp->fixreg[reg]); - - switch (reg) { - case 32: - return (rp->lr); - case 33: - return (rp->cr); - case 34: - return (rp->xer); - case 35: - return (rp->ctr); - case 36: - return (rp->srr0); - case 37: - return (rp->srr1); - case 38: - return (rp->exc); - default: - DTRACE_CPUFLAG_SET(CPU_DTRACE_ILLOP); - return (0); - } -} - -static int -dtrace_copycheck(uintptr_t uaddr, uintptr_t kaddr, size_t size) -{ - ASSERT(INKERNEL(kaddr) && kaddr + size >= kaddr); - - if (uaddr + size > VM_MAXUSER_ADDRESS || uaddr + size < uaddr) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_BADADDR); - cpu_core[curcpu].cpuc_dtrace_illval = uaddr; - return (0); - } - - return (1); -} - -void -dtrace_copyin(uintptr_t uaddr, uintptr_t kaddr, size_t size, - volatile uint16_t *flags) -{ - if (dtrace_copycheck(uaddr, kaddr, size)) - if (copyin((const void *)uaddr, (void *)kaddr, size)) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_BADADDR); - cpu_core[curcpu].cpuc_dtrace_illval = (uintptr_t)uaddr; - } -} - -void -dtrace_copyout(uintptr_t kaddr, uintptr_t uaddr, size_t size, - volatile uint16_t *flags) -{ - if (dtrace_copycheck(uaddr, kaddr, size)) { - if (copyout((const void *)kaddr, (void *)uaddr, size)) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_BADADDR); - cpu_core[curcpu].cpuc_dtrace_illval = (uintptr_t)uaddr; - } - } -} - -void -dtrace_copyinstr(uintptr_t uaddr, uintptr_t kaddr, size_t size, - volatile uint16_t *flags) -{ - size_t actual; - int error; - - if (dtrace_copycheck(uaddr, kaddr, size)) { - error = copyinstr((const void *)uaddr, (void *)kaddr, - size, &actual); - - /* ENAMETOOLONG is not a fault condition. */ - if (error && error != ENAMETOOLONG) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_BADADDR); - cpu_core[curcpu].cpuc_dtrace_illval = (uintptr_t)uaddr; - } - } -} - -/* - * The bulk of this function could be replaced to match dtrace_copyinstr() - * if we ever implement a copyoutstr(). - */ -void -dtrace_copyoutstr(uintptr_t kaddr, uintptr_t uaddr, size_t size, - volatile uint16_t *flags) -{ - size_t len; - - if (dtrace_copycheck(uaddr, kaddr, size)) { - len = strlen((const char *)kaddr); - if (len > size) - len = size; - - if (copyout((const void *)kaddr, (void *)uaddr, len)) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_BADADDR); - cpu_core[curcpu].cpuc_dtrace_illval = (uintptr_t)uaddr; - } - } -} - -uint8_t -dtrace_fuword8(void *uaddr) -{ - if ((uintptr_t)uaddr > VM_MAXUSER_ADDRESS) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_BADADDR); - cpu_core[curcpu].cpuc_dtrace_illval = (uintptr_t)uaddr; - return (0); - } - return (fubyte(uaddr)); -} - -uint16_t -dtrace_fuword16(void *uaddr) -{ - uint16_t ret = 0; - - if (dtrace_copycheck((uintptr_t)uaddr, (uintptr_t)&ret, sizeof(ret))) { - if (copyin((const void *)uaddr, (void *)&ret, sizeof(ret))) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_BADADDR); - cpu_core[curcpu].cpuc_dtrace_illval = (uintptr_t)uaddr; - } - } - return ret; -} - -uint32_t -dtrace_fuword32(void *uaddr) -{ - if ((uintptr_t)uaddr > VM_MAXUSER_ADDRESS) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_BADADDR); - cpu_core[curcpu].cpuc_dtrace_illval = (uintptr_t)uaddr; - return (0); - } - return (fuword32(uaddr)); -} - -uint64_t -dtrace_fuword64(void *uaddr) -{ - uint64_t ret = 0; - - if (dtrace_copycheck((uintptr_t)uaddr, (uintptr_t)&ret, sizeof(ret))) { - if (copyin((const void *)uaddr, (void *)&ret, sizeof(ret))) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_BADADDR); - cpu_core[curcpu].cpuc_dtrace_illval = (uintptr_t)uaddr; - } - } - return ret; -} - -uintptr_t -dtrace_fulword(void *uaddr) -{ - uintptr_t ret = 0; - - if (dtrace_copycheck((uintptr_t)uaddr, (uintptr_t)&ret, sizeof(ret))) { - if (copyin((const void *)uaddr, (void *)&ret, sizeof(ret))) { - DTRACE_CPUFLAG_SET(CPU_DTRACE_BADADDR); - cpu_core[curcpu].cpuc_dtrace_illval = (uintptr_t)uaddr; - } - } - return ret; -} diff --git a/sys/cddl/dev/dtrace/powerpc/dtrace_subr.c b/sys/cddl/dev/dtrace/powerpc/dtrace_subr.c deleted file mode 100644 index 5dd083310e6..00000000000 --- a/sys/cddl/dev/dtrace/powerpc/dtrace_subr.c +++ /dev/null @@ -1,367 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - * - */ -/* - * Copyright 2005 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define DELAYBRANCH(x) ((int)(x) < 0) - -extern dtrace_id_t dtrace_probeid_error; -extern int (*dtrace_invop_jump_addr)(struct trapframe *); - -extern void dtrace_getnanotime(struct timespec *tsp); - -int dtrace_invop(uintptr_t, struct trapframe *, uintptr_t); -void dtrace_invop_init(void); -void dtrace_invop_uninit(void); - -typedef struct dtrace_invop_hdlr { - int (*dtih_func)(uintptr_t, struct trapframe *, uintptr_t); - struct dtrace_invop_hdlr *dtih_next; -} dtrace_invop_hdlr_t; - -dtrace_invop_hdlr_t *dtrace_invop_hdlr; - -int -dtrace_invop(uintptr_t addr, struct trapframe *frame, uintptr_t arg0) -{ - struct thread *td; - dtrace_invop_hdlr_t *hdlr; - int rval; - - rval = 0; - td = curthread; - td->t_dtrace_trapframe = frame; - for (hdlr = dtrace_invop_hdlr; hdlr != NULL; hdlr = hdlr->dtih_next) - if ((rval = hdlr->dtih_func(addr, frame, arg0)) != 0) - break; - td->t_dtrace_trapframe = NULL; - return (rval); -} - -void -dtrace_invop_add(int (*func)(uintptr_t, struct trapframe *, uintptr_t)) -{ - dtrace_invop_hdlr_t *hdlr; - - hdlr = kmem_alloc(sizeof (dtrace_invop_hdlr_t), KM_SLEEP); - hdlr->dtih_func = func; - hdlr->dtih_next = dtrace_invop_hdlr; - dtrace_invop_hdlr = hdlr; -} - -void -dtrace_invop_remove(int (*func)(uintptr_t, struct trapframe *, uintptr_t)) -{ - dtrace_invop_hdlr_t *hdlr = dtrace_invop_hdlr, *prev = NULL; - - for (;;) { - if (hdlr == NULL) - panic("attempt to remove non-existent invop handler"); - - if (hdlr->dtih_func == func) - break; - - prev = hdlr; - hdlr = hdlr->dtih_next; - } - - if (prev == NULL) { - ASSERT(dtrace_invop_hdlr == hdlr); - dtrace_invop_hdlr = hdlr->dtih_next; - } else { - ASSERT(dtrace_invop_hdlr != hdlr); - prev->dtih_next = hdlr->dtih_next; - } - - kmem_free(hdlr, 0); -} - - -/*ARGSUSED*/ -void -dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit)) -{ - /* - * No toxic regions? - */ -} - -void -dtrace_xcall(processorid_t cpu, dtrace_xcall_t func, void *arg) -{ - cpuset_t cpus; - - if (cpu == DTRACE_CPUALL) - cpus = all_cpus; - else - CPU_SETOF(cpu, &cpus); - - smp_rendezvous_cpus(cpus, smp_no_rendezvous_barrier, func, - smp_no_rendezvous_barrier, arg); -} - -static void -dtrace_sync_func(void) -{ -} - -void -dtrace_sync(void) -{ - dtrace_xcall(DTRACE_CPUALL, (dtrace_xcall_t)dtrace_sync_func, NULL); -} - -static int64_t tgt_cpu_tsc; -static int64_t hst_cpu_tsc; -static int64_t timebase_skew[MAXCPU]; -static uint64_t nsec_scale; - -/* See below for the explanation of this macro. */ -/* This is taken from the amd64 dtrace_subr, to provide a synchronized timer - * between multiple processors in dtrace. Since PowerPC Timebases can be much - * lower than x86, the scale shift is 26 instead of 28, allowing for a 15.63MHz - * timebase. - */ -#define SCALE_SHIFT 26 - -static void -dtrace_gethrtime_init_cpu(void *arg) -{ - uintptr_t cpu = (uintptr_t) arg; - - if (cpu == curcpu) - tgt_cpu_tsc = mftb(); - else - hst_cpu_tsc = mftb(); -} - -static void -dtrace_gethrtime_init(void *arg) -{ - struct pcpu *pc; - uint64_t tb_f; - cpuset_t map; - int i; - - tb_f = cpu_tickrate(); - - /* - * The following line checks that nsec_scale calculated below - * doesn't overflow 32-bit unsigned integer, so that it can multiply - * another 32-bit integer without overflowing 64-bit. - * Thus minimum supported Timebase frequency is 15.63MHz. - */ - KASSERT(tb_f > (NANOSEC >> (32 - SCALE_SHIFT)), ("Timebase frequency is too low")); - - /* - * We scale up NANOSEC/tb_f ratio to preserve as much precision - * as possible. - * 2^26 factor was chosen quite arbitrarily from practical - * considerations: - * - it supports TSC frequencies as low as 15.63MHz (see above); - */ - nsec_scale = ((uint64_t)NANOSEC << SCALE_SHIFT) / tb_f; - - /* The current CPU is the reference one. */ - sched_pin(); - timebase_skew[curcpu] = 0; - CPU_FOREACH(i) { - if (i == curcpu) - continue; - - pc = pcpu_find(i); - CPU_SETOF(PCPU_GET(cpuid), &map); - CPU_SET(pc->pc_cpuid, &map); - - smp_rendezvous_cpus(map, NULL, - dtrace_gethrtime_init_cpu, - smp_no_rendezvous_barrier, (void *)(uintptr_t) i); - - timebase_skew[i] = tgt_cpu_tsc - hst_cpu_tsc; - } - sched_unpin(); -} -#ifdef EARLY_AP_STARTUP -SYSINIT(dtrace_gethrtime_init, SI_SUB_DTRACE, SI_ORDER_ANY, - dtrace_gethrtime_init, NULL); -#else -SYSINIT(dtrace_gethrtime_init, SI_SUB_SMP, SI_ORDER_ANY, dtrace_gethrtime_init, - NULL); -#endif - -/* - * DTrace needs a high resolution time function which can - * be called from a probe context and guaranteed not to have - * instrumented with probes itself. - * - * Returns nanoseconds since boot. - */ -uint64_t -dtrace_gethrtime(void) -{ - uint64_t timebase; - uint32_t lo; - uint32_t hi; - - /* - * We split timebase value into lower and higher 32-bit halves and separately - * scale them with nsec_scale, then we scale them down by 2^28 - * (see nsec_scale calculations) taking into account 32-bit shift of - * the higher half and finally add. - */ - timebase = mftb() - timebase_skew[curcpu]; - lo = timebase; - hi = timebase >> 32; - return (((lo * nsec_scale) >> SCALE_SHIFT) + - ((hi * nsec_scale) << (32 - SCALE_SHIFT))); -} - -uint64_t -dtrace_gethrestime(void) -{ - struct timespec curtime; - - dtrace_getnanotime(&curtime); - - return (curtime.tv_sec * 1000000000UL + curtime.tv_nsec); -} - -/* Function to handle DTrace traps during probes. See powerpc/powerpc/trap.c */ -int -dtrace_trap(struct trapframe *frame, u_int type) -{ - uint16_t nofault; - - /* - * A trap can occur while DTrace executes a probe. Before - * executing the probe, DTrace blocks re-scheduling and sets - * a flag in its per-cpu flags to indicate that it doesn't - * want to fault. On returning from the probe, the no-fault - * flag is cleared and finally re-scheduling is enabled. - * - * Check if DTrace has enabled 'no-fault' mode: - */ - sched_pin(); - nofault = cpu_core[curcpu].cpuc_dtrace_flags & CPU_DTRACE_NOFAULT; - sched_unpin(); - if (nofault) { - KASSERT((frame->srr1 & PSL_EE) == 0, ("interrupts enabled")); - /* - * There are only a couple of trap types that are expected. - * All the rest will be handled in the usual way. - */ - switch (type) { - /* Page fault. */ - case EXC_DSI: - case EXC_DSE: - /* Flag a bad address. */ - cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_BADADDR; - cpu_core[curcpu].cpuc_dtrace_illval = frame->dar; - - /* - * Offset the instruction pointer to the instruction - * following the one causing the fault. - */ - frame->srr0 += sizeof(int); - return (1); - case EXC_ISI: - case EXC_ISE: - /* Flag a bad address. */ - cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_BADADDR; - cpu_core[curcpu].cpuc_dtrace_illval = frame->srr0; - - /* - * Offset the instruction pointer to the instruction - * following the one causing the fault. - */ - frame->srr0 += sizeof(int); - return (1); - default: - /* Handle all other traps in the usual way. */ - break; - } - } - - /* Handle the trap in the usual way. */ - return (0); -} - -void -dtrace_probe_error(dtrace_state_t *state, dtrace_epid_t epid, int which, - int fault, int fltoffs, uintptr_t illval) -{ - - dtrace_probe(dtrace_probeid_error, (uint64_t)(uintptr_t)state, - (uintptr_t)epid, - (uintptr_t)which, (uintptr_t)fault, (uintptr_t)fltoffs); -} - -static int -dtrace_invop_start(struct trapframe *frame) -{ - - switch (dtrace_invop(frame->srr0, frame, frame->fixreg[3])) { - case DTRACE_INVOP_JUMP: - break; - case DTRACE_INVOP_BCTR: - frame->srr0 = frame->ctr; - break; - case DTRACE_INVOP_BLR: - frame->srr0 = frame->lr; - break; - case DTRACE_INVOP_MFLR_R0: - frame->fixreg[0] = frame->lr; - frame->srr0 = frame->srr0 + 4; - break; - default: - return (-1); - } - return (0); -} - -void dtrace_invop_init(void) -{ - dtrace_invop_jump_addr = dtrace_invop_start; -} - -void dtrace_invop_uninit(void) -{ - dtrace_invop_jump_addr = 0; -} diff --git a/sys/cddl/dev/dtrace/powerpc/regset.h b/sys/cddl/dev/dtrace/powerpc/regset.h deleted file mode 100644 index b414e7e079a..00000000000 --- a/sys/cddl/dev/dtrace/powerpc/regset.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - * - */ -/* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -/* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */ - -/* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */ -/* All Rights Reserved */ - -#ifndef _REGSET_H -#define _REGSET_H - -/* - * #pragma ident "@(#)regset.h 1.11 05/06/08 SMI" - */ - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * XXXDTRACE: define registers properly - */ - -#if 0 -#define REG_PC PC -#define REG_FP EBP -#define REG_SP SP -#define REG_PS EFL -#define REG_R0 EAX -#define REG_R1 EDX -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* _REGSET_H */ - diff --git a/sys/cddl/dev/fbt/mips/fbt_isa.c b/sys/cddl/dev/fbt/mips/fbt_isa.c deleted file mode 100644 index c592aae97d5..00000000000 --- a/sys/cddl/dev/fbt/mips/fbt_isa.c +++ /dev/null @@ -1,162 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License (the "License"). - * You may not use this file except in compliance with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - * - * Portions Copyright 2006-2008 John Birrell jb@freebsd.org - * Portions Copyright 2013 Justin Hibbits jhibbits@freebsd.org - * Portions Copyright 2013 Howard Su howardsu@freebsd.org - * Portions Copyright 2015-2016 Ruslan Bukin - */ - -/* - * Copyright 2006 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -#include -#include -#include - -#include -#include - -#include "fbt.h" - -#define FBT_PATCHVAL (MIPS_BREAK_INSTR) -#define FBT_ENTRY "entry" -#define FBT_RETURN "return" - -int -fbt_invop(uintptr_t addr, struct trapframe *frame, uintptr_t rval) -{ - solaris_cpu_t *cpu; - fbt_probe_t *fbt; - - cpu = &solaris_cpu[curcpu]; - fbt = fbt_probetab[FBT_ADDR2NDX(addr)]; - - for (; fbt != NULL; fbt = fbt->fbtp_hashnext) { - if ((uintptr_t)fbt->fbtp_patchpoint == addr) { - cpu->cpu_dtrace_caller = addr; - - dtrace_probe(fbt->fbtp_id, frame->a0, - frame->a1, frame->a2, - frame->a3, frame->a4); - - cpu->cpu_dtrace_caller = 0; - return (fbt->fbtp_savedval); - } - } - - return (0); -} - -void -fbt_patch_tracepoint(fbt_probe_t *fbt, fbt_patchval_t val) -{ - - *fbt->fbtp_patchpoint = val; - mips_icache_sync_range((vm_offset_t)fbt->fbtp_patchpoint, 4); -} - -int -fbt_provide_module_function(linker_file_t lf, int symindx, - linker_symval_t *symval, void *opaque) -{ - fbt_probe_t *fbt, *retfbt; - uint32_t *instr, *limit; - const char *name; - char *modname; - - modname = opaque; - name = symval->name; - - /* Check if function is excluded from instrumentation */ - if (fbt_excluded(name)) - return (0); - - instr = (uint32_t *)(symval->value); - limit = (uint32_t *)(symval->value + symval->size); - - /* Look for store double to ra register */ - for (; instr < limit; instr++) { - if ((*instr & LDSD_RA_SP_MASK) == SD_RA_SP) - break; - } - - if (instr >= limit) - return (0); - - fbt = malloc(sizeof (fbt_probe_t), M_FBT, M_WAITOK | M_ZERO); - fbt->fbtp_name = name; - fbt->fbtp_id = dtrace_probe_create(fbt_id, modname, - name, FBT_ENTRY, 3, fbt); - fbt->fbtp_patchpoint = instr; - fbt->fbtp_ctl = lf; - fbt->fbtp_loadcnt = lf->loadcnt; - fbt->fbtp_savedval = *instr; - fbt->fbtp_patchval = FBT_PATCHVAL; - fbt->fbtp_rval = DTRACE_INVOP_SD; - fbt->fbtp_symindx = symindx; - - fbt->fbtp_hashnext = fbt_probetab[FBT_ADDR2NDX(instr)]; - fbt_probetab[FBT_ADDR2NDX(instr)] = fbt; - - lf->fbt_nentries++; - - retfbt = NULL; -again: - for (; instr < limit; instr++) { - if ((*instr & LDSD_RA_SP_MASK) == LD_RA_SP) { - break; - } - } - - if (instr >= limit) - return (0); - - /* - * We have a winner! - */ - fbt = malloc(sizeof (fbt_probe_t), M_FBT, M_WAITOK | M_ZERO); - fbt->fbtp_name = name; - if (retfbt == NULL) { - fbt->fbtp_id = dtrace_probe_create(fbt_id, modname, - name, FBT_RETURN, 3, fbt); - } else { - retfbt->fbtp_probenext = fbt; - fbt->fbtp_id = retfbt->fbtp_id; - } - retfbt = fbt; - - fbt->fbtp_patchpoint = instr; - fbt->fbtp_ctl = lf; - fbt->fbtp_loadcnt = lf->loadcnt; - fbt->fbtp_symindx = symindx; - fbt->fbtp_rval = DTRACE_INVOP_LD; - fbt->fbtp_savedval = *instr; - fbt->fbtp_patchval = FBT_PATCHVAL; - fbt->fbtp_hashnext = fbt_probetab[FBT_ADDR2NDX(instr)]; - fbt_probetab[FBT_ADDR2NDX(instr)] = fbt; - - lf->fbt_nentries++; - - instr++; - goto again; -} diff --git a/sys/cddl/dev/fbt/mips/fbt_isa.h b/sys/cddl/dev/fbt/mips/fbt_isa.h deleted file mode 100644 index e06f7a4b3e7..00000000000 --- a/sys/cddl/dev/fbt/mips/fbt_isa.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License (the "License"). - * You may not use this file except in compliance with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - * - */ - -#ifndef _FBT_ISA_H_ -#define _FBT_ISA_H_ - -typedef uint32_t fbt_patchval_t; - -#endif diff --git a/sys/cddl/dev/fbt/powerpc/fbt_isa.c b/sys/cddl/dev/fbt/powerpc/fbt_isa.c deleted file mode 100644 index 98a7e922154..00000000000 --- a/sys/cddl/dev/fbt/powerpc/fbt_isa.c +++ /dev/null @@ -1,238 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License (the "License"). - * You may not use this file except in compliance with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - * - * Portions Copyright 2006-2008 John Birrell jb@freebsd.org - * Portions Copyright 2013 Justin Hibbits jhibbits@freebsd.org - * - */ - -/* - * Copyright 2006 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -#include -#include -#include -#include - -#include "fbt.h" - -#define FBT_PATCHVAL 0x7ffff808 -#define FBT_MFLR_R0 0x7c0802a6 -#define FBT_MTLR_R0 0x7c0803a6 -#define FBT_BLR 0x4e800020 -#define FBT_BCTR 0x4e800030 -#define FBT_BRANCH 0x48000000 -#define FBT_BR_MASK 0x03fffffc -#define FBT_IS_JUMP(instr) ((instr & ~FBT_BR_MASK) == FBT_BRANCH) - -#define FBT_AFRAMES 5 - -int -fbt_invop(uintptr_t addr, struct trapframe *frame, uintptr_t rval) -{ - solaris_cpu_t *cpu = &solaris_cpu[curcpu]; - fbt_probe_t *fbt = fbt_probetab[FBT_ADDR2NDX(addr)]; - uintptr_t tmp; - - for (; fbt != NULL; fbt = fbt->fbtp_hashnext) { - if ((uintptr_t)fbt->fbtp_patchpoint == addr) { - if (fbt->fbtp_roffset == 0) { - cpu->cpu_dtrace_caller = addr; - - dtrace_probe(fbt->fbtp_id, frame->fixreg[3], - frame->fixreg[4], frame->fixreg[5], - frame->fixreg[6], frame->fixreg[7]); - - cpu->cpu_dtrace_caller = 0; - } else { - - dtrace_probe(fbt->fbtp_id, fbt->fbtp_roffset, - rval, 0, 0, 0); - /* - * The caller doesn't have the fbt item, so - * fixup tail calls here. - */ - if (fbt->fbtp_rval == DTRACE_INVOP_JUMP) { - frame->srr0 = (uintptr_t)fbt->fbtp_patchpoint; - tmp = fbt->fbtp_savedval & FBT_BR_MASK; - /* Sign extend. */ - if (tmp & 0x02000000) -#ifdef __powerpc64__ - tmp |= 0xfffffffffc000000ULL; -#else - tmp |= 0xfc000000UL; -#endif - frame->srr0 += tmp; - } - cpu->cpu_dtrace_caller = 0; - } - - return (fbt->fbtp_rval); - } - } - - return (0); -} - -void -fbt_patch_tracepoint(fbt_probe_t *fbt, fbt_patchval_t val) -{ - - *fbt->fbtp_patchpoint = val; - __syncicache(fbt->fbtp_patchpoint, 4); -} - -int -fbt_provide_module_function(linker_file_t lf, int symindx, - linker_symval_t *symval, void *opaque) -{ - char *modname = opaque; - const char *name = symval->name; - fbt_probe_t *fbt, *retfbt; - int j; - uint32_t *instr, *limit; - -#ifdef __powerpc64__ -#if !defined(_CALL_ELF) || _CALL_ELF == 1 - /* - * PowerPC64 uses '.' prefixes on symbol names, ignore it, but only - * allow symbols with the '.' prefix, so that we don't get the function - * descriptor instead. - */ - if (name[0] == '.') - name++; - else - return (0); -#endif -#endif - - if (fbt_excluded(name)) - return (0); - - instr = (uint32_t *) symval->value; - limit = (uint32_t *) (symval->value + symval->size); - - for (; instr < limit; instr++) - if (*instr == FBT_MFLR_R0) - break; - - if (*instr != FBT_MFLR_R0) - return (0); - - fbt = malloc(sizeof (fbt_probe_t), M_FBT, M_WAITOK | M_ZERO); - fbt->fbtp_name = name; - fbt->fbtp_id = dtrace_probe_create(fbt_id, modname, - name, FBT_ENTRY, FBT_AFRAMES, fbt); - fbt->fbtp_patchpoint = instr; - fbt->fbtp_ctl = lf; - fbt->fbtp_loadcnt = lf->loadcnt; - fbt->fbtp_savedval = *instr; - fbt->fbtp_patchval = FBT_PATCHVAL; - fbt->fbtp_rval = DTRACE_INVOP_MFLR_R0; - fbt->fbtp_symindx = symindx; - - fbt->fbtp_hashnext = fbt_probetab[FBT_ADDR2NDX(instr)]; - fbt_probetab[FBT_ADDR2NDX(instr)] = fbt; - - lf->fbt_nentries++; - - retfbt = NULL; -again: - if (instr >= limit) - return (0); - - /* - * We (desperately) want to avoid erroneously instrumenting a - * jump table. To determine if we're looking at a true instruction - * sequence or an inline jump table that happens to contain the same - * byte sequences, we resort to some heuristic sleeze: we treat this - * instruction as being contained within a pointer, and see if that - * pointer points to within the body of the function. If it does, we - * refuse to instrument it. - */ - { - uint32_t *ptr; - - ptr = *(uint32_t **)instr; - - if (ptr >= (uint32_t *) symval->value && ptr < limit) { - instr++; - goto again; - } - } - - if (*instr != FBT_MTLR_R0) { - instr++; - goto again; - } - - instr++; - - for (j = 0; j < 12 && instr < limit; j++, instr++) { - if ((*instr == FBT_BCTR) || (*instr == FBT_BLR) || - FBT_IS_JUMP(*instr)) - break; - } - - if (!(*instr == FBT_BCTR || *instr == FBT_BLR || FBT_IS_JUMP(*instr))) - goto again; - - /* - * We have a winner! - */ - fbt = malloc(sizeof (fbt_probe_t), M_FBT, M_WAITOK | M_ZERO); - fbt->fbtp_name = name; - - if (retfbt == NULL) { - fbt->fbtp_id = dtrace_probe_create(fbt_id, modname, - name, FBT_RETURN, FBT_AFRAMES, fbt); - } else { - retfbt->fbtp_probenext = fbt; - fbt->fbtp_id = retfbt->fbtp_id; - } - - retfbt = fbt; - fbt->fbtp_patchpoint = instr; - fbt->fbtp_ctl = lf; - fbt->fbtp_loadcnt = lf->loadcnt; - fbt->fbtp_symindx = symindx; - - if (*instr == FBT_BCTR) - fbt->fbtp_rval = DTRACE_INVOP_BCTR; - else if (*instr == FBT_BLR) - fbt->fbtp_rval = DTRACE_INVOP_BLR; - else - fbt->fbtp_rval = DTRACE_INVOP_JUMP; - - fbt->fbtp_roffset = - (uintptr_t)((uint8_t *)instr - (uint8_t *)symval->value); - - fbt->fbtp_savedval = *instr; - fbt->fbtp_patchval = FBT_PATCHVAL; - fbt->fbtp_hashnext = fbt_probetab[FBT_ADDR2NDX(instr)]; - fbt_probetab[FBT_ADDR2NDX(instr)] = fbt; - - lf->fbt_nentries++; - - instr += 4; - goto again; -} diff --git a/sys/cddl/dev/fbt/powerpc/fbt_isa.h b/sys/cddl/dev/fbt/powerpc/fbt_isa.h deleted file mode 100644 index e06f7a4b3e7..00000000000 --- a/sys/cddl/dev/fbt/powerpc/fbt_isa.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License (the "License"). - * You may not use this file except in compliance with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - * - */ - -#ifndef _FBT_ISA_H_ -#define _FBT_ISA_H_ - -typedef uint32_t fbt_patchval_t; - -#endif diff --git a/sys/cddl/dev/profile/profile.c b/sys/cddl/dev/profile/profile.c index 15edb6b9227..d250eb37b96 100644 --- a/sys/cddl/dev/profile/profile.c +++ b/sys/cddl/dev/profile/profile.c @@ -95,27 +95,8 @@ #endif #endif -#ifdef __mips -/* - * This value is bogus just to make module compilable on mips - */ -#define PROF_ARTIFICIAL_FRAMES 3 -#endif - -#ifdef __powerpc__ -/* - * This value is bogus just to make module compilable on powerpc - */ -#define PROF_ARTIFICIAL_FRAMES 8 -#endif - struct profile_probe_percpu; -#ifdef __mips -/* bogus */ -#define PROF_ARTIFICIAL_FRAMES 3 -#endif - #ifdef __arm__ #define PROF_ARTIFICIAL_FRAMES 3 #endif diff --git a/sys/conf/Makefile.mips b/sys/conf/Makefile.mips deleted file mode 100644 index 3610d5e5d5d..00000000000 --- a/sys/conf/Makefile.mips +++ /dev/null @@ -1,109 +0,0 @@ -# Makefile.mips -# -# Makefile for FreeBSD -# -# This makefile is constructed from a machine description: -# config machineid -# Most changes should be made in the machine description -# /sys/mips/conf/``machineid'' -# after which you should do -# config machineid -# Generic makefile changes should be made in -# /sys/conf/Makefile.mips -# after which config should be rerun for all machines. -# - -# Which version of config(8) is required. -%VERSREQ= 600012 - -STD8X16FONT?= iso - -.if !defined(S) -.if exists(./@/.) -S= ./@ -.else -S= ../../.. -.endif -.endif -.include "$S/conf/kern.pre.mk" - -INCLUDES+= -I$S/contrib/libfdt -I$S/contrib/device-tree/include - -LDSCRIPT_NAME?=ldscript.$M -SYSTEM_LD:= ${SYSTEM_LD:$S/conf/${LDSCRIPT_NAME}=${LDSCRIPT_NAME}} -SYSTEM_DEP:= ${SYSTEM_DEP:$S/conf/${LDSCRIPT_NAME}=${LDSCRIPT_NAME}} - -KERNLOADADDR?=0x80001000 -# This obscure value is defined by CFE for WR160N -# To be changed later -TRAMPLOADADDR?=0x807963c0 - -# We default to the MIPS32 ISA for O32 and MIPS64 ISA for N64 and N32 -# if none is specified in the kernel configuration file. -.if ${MACHINE_ARCH:Mmips64*} != "" || ${MACHINE_ARCH:Mmipsn32*} != "" -ARCH_FLAGS?=-march=mips64 -.else -ARCH_FLAGS?=-march=mips32 -.endif -ARCH_FLAGS+=-mabi=${MIPS_ABI} -EXTRA_FLAGS=-fno-pic -mno-abicalls -G0 -DKERNLOADADDR=${KERNLOADADDR} -EXTRA_FLAGS+=-${MIPS_ENDIAN} - -# We add the -fno-pic flag to kernels because otherwise performance -# is extremely poor, as well as -mno-abicalls to force no ABI usage. -CFLAGS+=${EXTRA_FLAGS} $(ARCH_FLAGS) -TRAMP_ARCH_FLAGS?=$(ARCH_FLAGS) -TRAMP_EXTRA_FLAGS=${EXTRA_FLAGS} ${TRAMP_ARCH_FLAGS} -# Kernel code is always compiled with soft-float on MIPS -TRAMP_EXTRA_FLAGS+=-msoft-float -# No standard library available -TRAMP_EXTRA_FLAGS+=-ffreestanding -.if ${MACHINE_ARCH:Mmips64*} != "" -TRAMP_ELFSIZE=64 -.else -TRAMP_ELFSIZE=32 -.endif - -ASM_CFLAGS+=${CFLAGS} -D_LOCORE -DLOCORE - -.if !defined(WITHOUT_KERNEL_TRAMPOLINE) -KERNEL_EXTRA=trampoline -KERNEL_EXTRA_INSTALL=${KERNEL_KO}.tramp.bin -trampoline: ${KERNEL_KO}.tramp.bin -${KERNEL_KO}.tramp.bin: ${KERNEL_KO} $S/$M/$M/elf_trampoline.c \ - $S/$M/$M/inckern.S - ${OBJCOPY} --strip-symbol '$$d' --strip-symbol '$$a' \ - -g --strip-symbol '$$t' ${FULLKERNEL} ${KERNEL_KO}.tmp - sed -e s/${KERNLOADADDR}/${TRAMPLOADADDR}/ -e s/" + SIZEOF_HEADERS"// \ - ${LDSCRIPT_NAME} > ${LDSCRIPT_NAME}.tramp.noheader - ${CC} -O -nostdlib -I. -I$S ${TRAMP_EXTRA_FLAGS} -Xlinker \ - -T -Xlinker ${LDSCRIPT_NAME}.tramp.noheader \ - -DKERNNAME="\"${KERNEL_KO}.tmp\"" -DELFSIZE=${TRAMP_ELFSIZE} \ - -fno-asynchronous-unwind-tables \ - $S/$M/$M/inckern.S $S/$M/$M/elf_trampoline.c \ - -o ${KERNEL_KO}.tramp.elf - ${OBJCOPY} -S -O binary ${KERNEL_KO}.tramp.elf \ - ${KERNEL_KO}.tramp.bin -.endif - -%BEFORE_DEPEND - -%OBJS - -%FILES.c - -%FILES.s - -%FILES.m - -%CLEAN - -CLEAN+= ${LDSCRIPT_NAME} ${LDSCRIPT_NAME}.tramp.noheader \ - ${KERNEL_KO}.tramp.elf ${KERNEL_KO}.tramp.bin - -${LDSCRIPT_NAME}: $S/conf/${LDSCRIPT_NAME} - sed s/KERNLOADADDR/${KERNLOADADDR}/g $S/conf/${LDSCRIPT_NAME} \ - > ${LDSCRIPT_NAME} -%RULES - -.include "$S/conf/kern.post.mk" diff --git a/sys/conf/Makefile.powerpc b/sys/conf/Makefile.powerpc deleted file mode 100644 index f2594de87ad..00000000000 --- a/sys/conf/Makefile.powerpc +++ /dev/null @@ -1,80 +0,0 @@ -# Makefile.powerpc -- with config changes. -# Copyright 1990 W. Jolitz -# from: @(#)Makefile.i386 7.1 5/10/91 -# -# Makefile for FreeBSD -# -# This makefile is constructed from a machine description: -# config machineid -# Most changes should be made in the machine description -# /sys/powerpc/conf/``machineid'' -# after which you should do -# config machineid -# Generic makefile changes should be made in -# /sys/conf/Makefile.powerpc -# after which config should be rerun for all machines. -# - -# Which version of config(8) is required. -%VERSREQ= 600012 - -STD8X16FONT?= iso - -.if !defined(S) -.if exists(./@/.) -S= ./@ -.else -S= ../../.. -.endif -.endif - -LDSCRIPT_NAME?= ldscript.${MACHINE_ARCH} - -.include "$S/conf/kern.pre.mk" - -INCLUDES+= -I$S/contrib/libfdt - -.if "${MACHINE_ARCH}" == "powerpcspe" -# Force __SPE__, since the builtin will be removed later with -mno-spe -CFLAGS.gcc+= -mabi=spe -D__SPE__ -CFLAGS.clang+= -mspe -D__SPE__ -m32 -.endif -CFLAGS+= -msoft-float -CFLAGS.gcc+= -Wa,-many - -# Apply compiler-specific DPAA exceptions. -.if "${COMPILER_TYPE}" == "clang" -DPAAWARNFLAGS += \ - -Wno-error=parentheses-equality \ - -Wno-error=self-assign \ - -Wno-error=incompatible-pointer-types-discards-qualifiers \ - -Wno-error=non-literal-null-conversion \ - -Wno-error=enum-conversion -.elif "${COMPILER_TYPE}" == "gcc" -DPAAWARNFLAGS += \ - -Wno-error=int-in-bool-context -.endif - -# Build position-independent kernel -CFLAGS+= -fPIC -LDFLAGS+= -pie - -.if !empty(DDB_ENABLED) -CFLAGS+= -fno-omit-frame-pointer -.endif - -%BEFORE_DEPEND - -%OBJS - -%FILES.c - -%FILES.s - -%FILES.m - -%CLEAN - -%RULES - -.include "$S/conf/kern.post.mk" diff --git a/sys/conf/config.mk b/sys/conf/config.mk index ad4d5195bd1..7269ccf8b25 100644 --- a/sys/conf/config.mk +++ b/sys/conf/config.mk @@ -9,11 +9,10 @@ .if !defined(KERNBUILDDIR) opt_global.h: touch ${.TARGET} -.if ${MACHINE} != "mips" @echo "#define SMP 1" >> ${.TARGET} @echo "#define MAC 1" >> ${.TARGET} @echo "#define VIMAGE 1" >> ${.TARGET} -.endif + .if ${MK_BHYVE_SNAPSHOT} != "no" opt_bhyve_snapshot.h: @echo "#define BHYVE_SNAPSHOT 1" > ${.TARGET} @@ -52,7 +51,6 @@ opt_wlan.h: echo "#define IEEE80211_SUPPORT_MESH 1" >> ${.TARGET} KERN_OPTS.i386=NEW_PCIB DEV_PCI KERN_OPTS.amd64=NEW_PCIB DEV_PCI -KERN_OPTS.powerpc=NEW_PCIB DEV_PCI KERN_OPTS=MROUTING IEEE80211_DEBUG \ IEEE80211_SUPPORT_MESH DEV_BPF \ ${KERN_OPTS.${MACHINE}} ${KERN_OPTS_EXTRA} diff --git a/sys/conf/files.mips b/sys/conf/files.mips deleted file mode 100644 index 4c68fe60e12..00000000000 --- a/sys/conf/files.mips +++ /dev/null @@ -1,113 +0,0 @@ -# This file tells config what files go into building a kernel, -# files marked standard are always included. -# -# - -# Arch dependent files -mips/mips/autoconf.c standard -mips/mips/bus_space_generic.c standard -mips/mips/busdma_machdep.c standard -mips/mips/cache.c standard -mips/mips/cache_mipsNN.c standard -mips/mips/cpu.c standard -mips/mips/db_disasm.c optional ddb -mips/mips/db_interface.c optional ddb -mips/mips/db_trace.c optional ddb -mips/mips/dump_machdep.c standard -mips/mips/elf_machdep.c standard -mips/mips/exception.S standard -mips/mips/fp.S standard -mips/mips/freebsd32_machdep.c optional compat_freebsd32 -mips/mips/gdb_machdep.c standard -mips/mips/libkern_machdep.c standard -mips/mips/locore.S standard no-obj -mips/mips/machdep.c standard -mips/mips/mem.c optional mem -mips/mips/minidump_machdep.c standard -mips/mips/mp_machdep.c optional smp -mips/mips/mpboot.S optional smp -mips/mips/nexus.c standard -mips/mips/ofw_machdep.c optional fdt -mips/mips/pm_machdep.c standard -mips/mips/pmap.c standard -mips/mips/ptrace_machdep.c standard -mips/mips/sc_machdep.c standard -mips/mips/stack_machdep.c optional ddb | stack -mips/mips/stdatomic.c standard \ - compile-with "${NORMAL_C:N-Wmissing-prototypes}" -mips/mips/support.S standard -mips/mips/bcopy.S standard -mips/mips/swtch.S standard -mips/mips/sys_machdep.c standard -mips/mips/tlb.c standard -mips/mips/trap.c standard -mips/mips/uio_machdep.c standard -mips/mips/uma_machdep.c standard -mips/mips/vm_machdep.c standard - -# misc opt-in bits -kern/link_elf_obj.c standard -kern/subr_atomic64.c optional mips | mipsel | mipshf | mipselhf -kern/subr_busdma_bufalloc.c standard -kern/subr_dummy_vdso_tc.c standard -kern/subr_sfbuf.c optional mips | mipsel | mipsn32 -kern/subr_sfbuf.c optional mipshf | mipselhf - -# gcc/clang runtime -libkern/ffsl.c standard -libkern/ffsll.c standard -libkern/fls.c standard -libkern/flsl.c standard -libkern/flsll.c standard -libkern/cmpdi2.c optional mips | mipshf | mipsel | mipselhf -libkern/ucmpdi2.c optional mips | mipshf | mipsel | mipselhf -libkern/ashldi3.c standard -libkern/ashrdi3.c standard -libkern/memcmp.c standard -libkern/strlen.c standard - -# cfe support -dev/cfe/cfe_api.c optional cfe -dev/cfe/cfe_console.c optional cfe_console -dev/cfe/cfe_env.c optional cfe_env - -# syscons support -dev/fb/fb.c optional sc -dev/syscons/scgfbrndr.c optional sc -mips/mips/sc_machdep.c optional sc - -# FDT support -dev/uart/uart_cpu_fdt.c optional uart fdt - -# crypto support -- use generic -crypto/des/des_enc.c optional netsmb - -# AP common nvram interface MIPS specific, but maybe should be more generic -dev/nvram2env/nvram2env_mips.c optional nvram2env -dev/nvram2env/nvram2env.c optional nvram2env - -# hwpmc support -dev/hwpmc/hwpmc_beri.c optional hwpmc_beri -dev/hwpmc/hwpmc_mips.c optional hwpmc_mips24k | \ - hwpmc_mips74k -dev/hwpmc/hwpmc_mips24k.c optional hwpmc_mips24k -dev/hwpmc/hwpmc_mips74k.c optional hwpmc_mips74k - -# ofw support -dev/ofw/ofwpci.c optional fdt pci - -# INTRNG support code -kern/msi_if.m optional intrng -kern/pic_if.m optional intrng -kern/subr_intr.c optional intrng -# INTRNG compatible MIPS32 interrupt controller -mips/mips/mips_pic.c optional intrng - -# DTrace -cddl/compat/opensolaris/kern/opensolaris_atomic.c optional zfs | dtrace compile-with "${CDDL_C}" -cddl/dev/dtrace/mips/dtrace_asm.S optional dtrace compile-with "${DTRACE_S}" -cddl/dev/dtrace/mips/dtrace_subr.c optional dtrace compile-with "${DTRACE_C}" -cddl/dev/fbt/mips/fbt_isa.c optional dtrace_fbt | dtraceall compile-with "${FBT_C}" - -# Zstd -contrib/zstd/lib/freebsd/zstd_kfreebsd.c optional zstdio compile-with ${ZSTD_C} diff --git a/sys/conf/files.powerpc b/sys/conf/files.powerpc deleted file mode 100644 index f9719c5b084..00000000000 --- a/sys/conf/files.powerpc +++ /dev/null @@ -1,370 +0,0 @@ -# This file tells config what files go into building a kernel, -# files marked standard are always included. -# -# -# The long compile-with and dependency lines are required because of -# limitations in config: backslash-newline doesn't work in strings, and -# dependency lines other than the first are silently ignored. -# -# - -# There is only an asm version on ppc64. -cddl/compat/opensolaris/kern/opensolaris_atomic.c optional zfs powerpc | dtrace powerpc | zfs powerpcspe | dtrace powerpcspe compile-with "${ZFS_C}" -cddl/dev/dtrace/powerpc/dtrace_asm.S optional dtrace compile-with "${DTRACE_S}" -cddl/dev/dtrace/powerpc/dtrace_subr.c optional dtrace compile-with "${DTRACE_C}" -cddl/dev/fbt/powerpc/fbt_isa.c optional dtrace_fbt | dtraceall compile-with "${FBT_C}" -crypto/des/des_enc.c optional netsmb -dev/aacraid/aacraid_endian.c optional aacraid -dev/adb/adb_bus.c optional adb -dev/adb/adb_kbd.c optional adb -dev/adb/adb_mouse.c optional adb -dev/adb/adb_hb_if.m optional adb -dev/adb/adb_if.m optional adb -dev/adb/adb_buttons.c optional adb -dev/agp/agp_apple.c optional agp powermac -dev/fb/fb.c optional sc -dev/hwpmc/hwpmc_e500.c optional hwpmc -dev/hwpmc/hwpmc_mpc7xxx.c optional hwpmc -dev/hwpmc/hwpmc_power8.c optional hwpmc -dev/hwpmc/hwpmc_powerpc.c optional hwpmc -dev/hwpmc/hwpmc_ppc970.c optional hwpmc -dev/iicbus/ad7417.c optional ad7417 powermac -dev/iicbus/adm1030.c optional powermac windtunnel | adm1030 powermac -dev/iicbus/adt746x.c optional adt746x powermac -dev/iicbus/ds1631.c optional ds1631 powermac -dev/iicbus/ds1775.c optional ds1775 powermac -dev/iicbus/max6690.c optional max6690 powermac -dev/iicbus/ofw_iicbus.c optional iicbus aim -dev/ipmi/ipmi.c optional ipmi -dev/ipmi/ipmi_opal.c optional powernv ipmi -dev/ice/if_ice_iflib.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_lib.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_osdep.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_resmgr.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_strings.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_iflib_recovery_txrx.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_iflib_txrx.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_common.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_controlq.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_dcb.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_flex_pipe.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_flow.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_nvm.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_sched.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_switch.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_vlan_mode.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_fw_logging.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_fwlog.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/ice_rdma.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -dev/ice/irdma_if.m optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_M} -I$S/dev/ice" -dev/ice/irdma_di_if.m optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_M} -I$S/dev/ice" -dev/ice/ice_ddp_common.c optional ice pci powerpc64 | ice pci powerpc64le \ - compile-with "${NORMAL_C} -I$S/dev/ice" -ice_ddp.c optional ice_ddp powerpc64 | ice pci powerpc64le \ - compile-with "${AWK} -f $S/tools/fw_stub.awk ice_ddp.fw:ice_ddp:0x01032900 -mice_ddp -c${.TARGET}" \ - no-ctfconvert no-implicit-rule before-depend local \ - clean "ice_ddp.c" -ice_ddp.fwo optional ice_ddp powerpc64 | ice pci powerpc64le \ - dependency "ice_ddp.fw" \ - compile-with "${NORMAL_FWO}" \ - no-implicit-rule \ - clean "ice_ddp.fwo" -ice_ddp.fw optional ice_ddp powerpc64 | ice pci powerpc64le \ - dependency "$S/contrib/dev/ice/ice-1.3.41.0.pkg" \ - compile-with "${CP} $S/contrib/dev/ice/ice-1.3.41.0.pkg ice_ddp.fw" \ - no-obj no-implicit-rule \ - clean "ice_ddp.fw" -dev/ixl/if_ixl.c optional ixl pci powerpc64 \ - compile-with "${NORMAL_C} -I$S/dev/ixl" -dev/ixl/ixl_pf_main.c optional ixl pci powerpc64 \ - compile-with "${NORMAL_C} -I$S/dev/ixl" -dev/ixl/ixl_pf_iflib.c optional ixl pci powerpc64 \ - compile-with "${NORMAL_C} -I$S/dev/ixl" -dev/ixl/ixl_pf_qmgr.c optional ixl pci powerpc64 \ - compile-with "${NORMAL_C} -I$S/dev/ixl" -dev/ixl/ixl_pf_iov.c optional ixl pci pci_iov powerpc64 \ - compile-with "${NORMAL_C} -I$S/dev/ixl" -dev/ixl/ixl_pf_i2c.c optional ixl pci powerpc64 \ - compile-with "${NORMAL_C} -I$S/dev/ixl" -dev/ixl/if_iavf.c optional iavf pci powerpc64 \ - compile-with "${NORMAL_C} -I$S/dev/ixl" -dev/ixl/iavf_vc.c optional iavf pci powerpc64 \ - compile-with "${NORMAL_C} -I$S/dev/ixl" -dev/ixl/ixl_txrx.c optional ixl pci powerpc64 | \ - iavf pci powerpc64 \ - compile-with "${NORMAL_C} -I$S/dev/ixl" -dev/ixl/i40e_osdep.c optional ixl pci powerpc64 | \ - iavf pci powerpc64 \ - compile-with "${NORMAL_C} -I$S/dev/ixl" -dev/ixl/i40e_lan_hmc.c optional ixl pci powerpc64 | \ - iavf pci powerpc64 \ - compile-with "${NORMAL_C} -I$S/dev/ixl" -dev/ixl/i40e_hmc.c optional ixl pci powerpc64 | \ - iavf pci powerpc64 \ - compile-with "${NORMAL_C} -I$S/dev/ixl" -dev/ixl/i40e_common.c optional ixl pci powerpc64 | \ - iavf pci powerpc64 \ - compile-with "${NORMAL_C} -I$S/dev/ixl" -dev/ixl/i40e_nvm.c optional ixl pci powerpc64 | \ - iavf pci powerpc64 \ - compile-with "${NORMAL_C} -I$S/dev/ixl" -dev/ixl/i40e_adminq.c optional ixl pci powerpc64 | \ - iavf pci powerpc64 \ - compile-with "${NORMAL_C} -I$S/dev/ixl" -dev/ixl/i40e_dcb.c optional ixl pci powerpc64 \ - compile-with "${NORMAL_C} -I$S/dev/ixl" -# Most ofw stuff below is brought in by conf/files for options FDT, but -# we always want it, even on non-FDT platforms. -dev/fdt/simplebus.c standard -dev/ofw/openfirm.c standard -dev/ofw/openfirmio.c standard -dev/ofw/ofw_bus_if.m standard -dev/ofw/ofw_cpu.c standard -dev/ofw/ofw_if.m standard -dev/ofw/ofw_bus_subr.c standard -dev/ofw/ofw_console.c optional aim -dev/ofw/ofw_disk.c optional ofwd aim -dev/ofw/ofwbus.c standard -dev/ofw/ofwpci.c optional pci -dev/ofw/ofw_standard.c optional aim powerpc -dev/ofw/ofw_subr.c standard -dev/powermac_nvram/powermac_nvram.c optional powermac_nvram powermac -dev/quicc/quicc_bfe_fdt.c optional quicc mpc85xx -dev/random/darn.c optional powerpc64 !random_loadable | powerpc64le !random_loadable -dev/scc/scc_bfe_macio.c optional scc powermac -dev/sdhci/fsl_sdhci.c optional mpc85xx sdhci -dev/sec/sec.c optional sec mpc85xx -dev/sound/macio/aoa.c optional snd_davbus | snd_ai2s powermac -dev/sound/macio/davbus.c optional snd_davbus powermac -dev/sound/macio/i2s.c optional snd_ai2s powermac -dev/sound/macio/onyx.c optional snd_ai2s iicbus powermac -dev/sound/macio/snapper.c optional snd_ai2s iicbus powermac -dev/sound/macio/tumbler.c optional snd_ai2s iicbus powermac -dev/syscons/scgfbrndr.c optional sc -dev/tsec/if_tsec.c optional tsec -dev/tsec/if_tsec_fdt.c optional tsec -dev/uart/uart_cpu_powerpc.c optional uart -dev/usb/controller/ehci_fsl.c optional ehci mpc85xx -dev/vt/hw/ofwfb/ofwfb.c optional vt aim -kern/subr_atomic64.c optional powerpc | powerpcspe -kern/subr_dummy_vdso_tc.c standard -kern/syscalls.c optional ktr -kern/subr_sfbuf.c standard -libkern/ashldi3.c optional powerpc | powerpcspe -libkern/ashrdi3.c optional powerpc | powerpcspe -libkern/bcmp.c standard -libkern/bcopy.c standard -libkern/cmpdi2.c optional powerpc | powerpcspe -libkern/divdi3.c optional powerpc | powerpcspe -libkern/ffs.c standard -libkern/ffsl.c standard -libkern/ffsll.c standard -libkern/flsll.c standard -libkern/lshrdi3.c optional powerpc | powerpcspe -libkern/memcmp.c standard -libkern/memset.c standard -libkern/moddi3.c optional powerpc | powerpcspe -libkern/qdivrem.c optional powerpc | powerpcspe -libkern/strlen.c standard -libkern/ucmpdi2.c optional powerpc | powerpcspe -libkern/udivdi3.c optional powerpc | powerpcspe -libkern/umoddi3.c optional powerpc | powerpcspe -powerpc/aim/locore.S optional aim no-obj -powerpc/aim/aim_machdep.c optional aim -powerpc/aim/mmu_oea.c optional aim powerpc -powerpc/aim/mmu_oea64.c optional aim -powerpc/aim/mmu_radix.c optional aim powerpc64 | aim powerpc64le -powerpc/aim/moea64_native.c optional aim -powerpc/aim/mp_cpudep.c optional aim -powerpc/aim/slb.c optional aim powerpc64 | aim powerpc64le -powerpc/amigaone/platform_amigaone.c optional amigaone -powerpc/amigaone/cpld_a1222.c optional powerpc amigaone | powerpcspe amigaone -powerpc/amigaone/cpld_x5000.c optional powerpc amigaone | powerpc64 amigaone -powerpc/booke/locore.S optional booke no-obj -powerpc/booke/booke_machdep.c optional booke -powerpc/booke/machdep_e500.c optional booke_e500 -powerpc/booke/mp_cpudep.c optional booke smp -powerpc/booke/platform_bare.c optional booke -powerpc/booke/pmap.c optional booke -powerpc/booke/spe.c optional powerpcspe -powerpc/cpufreq/dfs.c optional cpufreq -powerpc/cpufreq/mpc85xx_jog.c optional cpufreq mpc85xx -powerpc/cpufreq/pcr.c optional cpufreq aim -powerpc/cpufreq/pmcr.c optional cpufreq aim powerpc64 | cpufreq aim powerpc64le -powerpc/cpufreq/pmufreq.c optional cpufreq aim pmu -powerpc/fpu/fpu_add.c optional fpu_emu | powerpcspe -powerpc/fpu/fpu_compare.c optional fpu_emu | powerpcspe -powerpc/fpu/fpu_div.c optional fpu_emu | powerpcspe -powerpc/fpu/fpu_emu.c optional fpu_emu -powerpc/fpu/fpu_explode.c optional fpu_emu | powerpcspe -powerpc/fpu/fpu_implode.c optional fpu_emu | powerpcspe -powerpc/fpu/fpu_mul.c optional fpu_emu | powerpcspe -powerpc/fpu/fpu_sqrt.c optional fpu_emu -powerpc/fpu/fpu_subr.c optional fpu_emu | powerpcspe -powerpc/mambo/mambocall.S optional mambo -powerpc/mambo/mambo.c optional mambo -powerpc/mambo/mambo_console.c optional mambo -powerpc/mambo/mambo_disk.c optional mambo -powerpc/mikrotik/platform_rb.c optional mikrotik -powerpc/mikrotik/rb_led.c optional mikrotik -powerpc/mpc85xx/atpic.c optional mpc85xx isa -powerpc/mpc85xx/ds1553_bus_fdt.c optional ds1553 -powerpc/mpc85xx/ds1553_core.c optional ds1553 -powerpc/mpc85xx/fsl_diu.c optional mpc85xx diu -powerpc/mpc85xx/fsl_espi.c optional mpc85xx spibus -powerpc/mpc85xx/fsl_sata.c optional mpc85xx ata -powerpc/mpc85xx/i2c.c optional mpc85xx iicbus -powerpc/mpc85xx/isa.c optional mpc85xx isa -powerpc/mpc85xx/lbc.c optional mpc85xx -powerpc/mpc85xx/mpc85xx.c optional mpc85xx -powerpc/mpc85xx/mpc85xx_cache.c optional mpc85xx -powerpc/mpc85xx/mpc85xx_gpio.c optional mpc85xx gpio -powerpc/mpc85xx/platform_mpc85xx.c optional mpc85xx -powerpc/mpc85xx/pci_mpc85xx.c optional pci mpc85xx -powerpc/mpc85xx/pci_mpc85xx_pcib.c optional pci mpc85xx -powerpc/mpc85xx/qoriq_gpio.c optional mpc85xx gpio -powerpc/ofw/ofw_machdep.c standard -powerpc/ofw/ofw_pcibus.c optional pci -powerpc/ofw/ofw_pcib_pci.c optional pci -powerpc/ofw/ofw_real.c optional aim -powerpc/ofw/ofw_syscons.c optional sc aim -powerpc/ofw/ofwcall32.S optional aim powerpc -powerpc/ofw/ofwcall64.S optional aim powerpc64 | aim powerpc64le -powerpc/ofw/openpic_ofw.c standard -powerpc/ofw/rtas.c optional aim -powerpc/ofw/ofw_initrd.c optional md_root_mem powerpc64 | md_root_mem powerpc64le -powerpc/powermac/ata_kauai.c optional powermac ata | powermac atamacio -powerpc/powermac/ata_macio.c optional powermac ata | powermac atamacio -powerpc/powermac/ata_dbdma.c optional powermac ata | powermac atamacio -powerpc/powermac/atibl.c optional powermac atibl -powerpc/powermac/cuda.c optional powermac cuda -powerpc/powermac/cpcht.c optional powermac pci -powerpc/powermac/dbdma.c optional powermac pci -powerpc/powermac/fcu.c optional powermac fcu -powerpc/powermac/grackle.c optional powermac pci -powerpc/powermac/hrowpic.c optional powermac pci -powerpc/powermac/kiic.c optional powermac kiic -powerpc/powermac/macgpio.c optional powermac pci -powerpc/powermac/macio.c optional powermac pci -powerpc/powermac/nvbl.c optional powermac nvbl -powerpc/powermac/platform_powermac.c optional powermac -powerpc/powermac/powermac_thermal.c optional powermac -powerpc/powermac/pswitch.c optional powermac pswitch -powerpc/powermac/pmu.c optional powermac pmu -powerpc/powermac/smu.c optional powermac smu -powerpc/powermac/smusat.c optional powermac smu -powerpc/powermac/uninorth.c optional powermac -powerpc/powermac/uninorthpci.c optional powermac pci -powerpc/powermac/vcoregpio.c optional powermac -powerpc/powernv/opal.c optional powernv -powerpc/powernv/opal_async.c optional powernv -powerpc/powernv/opal_console.c optional powernv -powerpc/powernv/opal_dbg.c optional powernv gdb -powerpc/powernv/opal_dev.c optional powernv -powerpc/powernv/opal_flash.c optional powernv opalflash -powerpc/powernv/opal_hmi.c optional powernv -powerpc/powernv/opal_i2c.c optional iicbus fdt powernv -powerpc/powernv/opal_i2cm.c optional iicbus fdt powernv -powerpc/powernv/opal_nvram.c optional powernv nvram -powerpc/powernv/opal_pci.c optional powernv pci -powerpc/powernv/opal_sensor.c optional powernv -powerpc/powernv/opalcall.S optional powernv -powerpc/powernv/platform_powernv.c optional powernv -powerpc/powernv/powernv_centaur.c optional powernv -powerpc/powernv/powernv_xscom.c optional powernv -powerpc/powernv/xive.c optional powernv -powerpc/powerpc/altivec.c optional !powerpcspe -powerpc/powerpc/autoconf.c standard -powerpc/powerpc/bus_machdep.c standard -powerpc/powerpc/busdma_machdep.c standard -powerpc/powerpc/clock.c standard -powerpc/powerpc/copyinout.c optional aim -powerpc/powerpc/cpu.c standard -powerpc/powerpc/cpu_subr64.S optional powerpc64 | powerpc64le -powerpc/powerpc/db_disasm.c optional ddb -powerpc/powerpc/db_hwwatch.c optional ddb -powerpc/powerpc/db_interface.c optional ddb -powerpc/powerpc/db_trace.c optional ddb -powerpc/powerpc/dump_machdep.c standard -powerpc/powerpc/elf32_machdep.c optional powerpc | powerpcspe | compat_freebsd32 -powerpc/powerpc/elf64_machdep.c optional powerpc64 | powerpc64le -powerpc/powerpc/exec_machdep.c standard -powerpc/powerpc/fpu.c standard -powerpc/powerpc/gdb_machdep.c optional gdb -powerpc/powerpc/interrupt.c standard -powerpc/powerpc/intr_machdep.c standard -powerpc/powerpc/iommu_if.m standard -powerpc/powerpc/machdep.c standard -powerpc/powerpc/mem.c optional mem -powerpc/powerpc/minidump_machdep.c optional powerpc64 | powerpc64le -powerpc/powerpc/mp_machdep.c optional smp -powerpc/powerpc/nexus.c standard -powerpc/powerpc/openpic.c standard -powerpc/powerpc/pic_if.m standard -powerpc/powerpc/pmap_dispatch.c standard -powerpc/powerpc/platform.c standard -powerpc/powerpc/platform_if.m standard -powerpc/powerpc/ptrace_machdep.c standard -powerpc/powerpc/sc_machdep.c optional sc -powerpc/powerpc/setjmp.S standard -powerpc/powerpc/sigcode32.S optional powerpc | powerpcspe | compat_freebsd32 -powerpc/powerpc/sigcode64.S optional powerpc64 | powerpc64le -powerpc/powerpc/swtch32.S optional powerpc | powerpcspe -powerpc/powerpc/swtch64.S optional powerpc64 | powerpc64le -powerpc/powerpc/stack_machdep.c optional ddb | stack -powerpc/powerpc/support.S optional powerpc64 | powerpc64le | booke -powerpc/powerpc/syncicache.c standard -powerpc/powerpc/sys_machdep.c standard -powerpc/powerpc/trap.c standard -powerpc/powerpc/uio_machdep.c standard -powerpc/powerpc/uma_machdep.c standard -powerpc/powerpc/vm_machdep.c standard -powerpc/ps3/ehci_ps3.c optional ps3 ehci -powerpc/ps3/ohci_ps3.c optional ps3 ohci -powerpc/ps3/if_glc.c optional ps3 glc -powerpc/ps3/mmu_ps3.c optional ps3 -powerpc/ps3/platform_ps3.c optional ps3 -powerpc/ps3/ps3bus.c optional ps3 -powerpc/ps3/ps3cdrom.c optional ps3 scbus -powerpc/ps3/ps3disk.c optional ps3 -powerpc/ps3/ps3pic.c optional ps3 -powerpc/ps3/ps3_syscons.c optional ps3 vt -powerpc/ps3/ps3-hvcall.S optional ps3 -powerpc/pseries/phyp-hvcall.S optional pseries powerpc64 | pseries powerpc64le -powerpc/pseries/mmu_phyp.c optional pseries powerpc64 | pseries powerpc64le -powerpc/pseries/phyp_console.c optional pseries powerpc64 uart | pseries powerpc64le uart -powerpc/pseries/phyp_dbg.c optional pseries powerpc64 gdb | pseries powerpc64le gdb -powerpc/pseries/phyp_llan.c optional llan -powerpc/pseries/phyp_vscsi.c optional pseries powerpc64 scbus | pseries powerpc64le scbus -powerpc/pseries/platform_chrp.c optional pseries -powerpc/pseries/plpar_iommu.c optional pseries powerpc64 | pseries powerpc64le -powerpc/pseries/plpar_pcibus.c optional pseries powerpc64 pci | pseries powerpc64le pci -powerpc/pseries/rtas_dev.c optional pseries -powerpc/pseries/rtas_pci.c optional pseries pci -powerpc/pseries/vdevice.c optional pseries powerpc64 | pseries powerpc64le -powerpc/pseries/xics.c optional pseries powerpc64 | pseries powerpc64le -powerpc/psim/iobus.c optional psim -powerpc/psim/ata_iobus.c optional ata psim -powerpc/psim/openpic_iobus.c optional psim -powerpc/psim/uart_iobus.c optional uart psim diff --git a/sys/conf/kern.mk b/sys/conf/kern.mk index 18ce026094f..4cc43e7c6be 100644 --- a/sys/conf/kern.mk +++ b/sys/conf/kern.mk @@ -206,37 +206,6 @@ CFLAGS+= -mcmodel=kernel -mno-red-zone -mno-mmx -mno-sse -msoft-float \ INLINE_LIMIT?= 8000 .endif -# -# For PowerPC we tell gcc to use floating point emulation. This avoids using -# floating point registers for integer operations which it has a tendency to do. -# Also explicitly disable Altivec instructions inside the kernel. -# -.if ${MACHINE_CPUARCH} == "powerpc" -CFLAGS+= -mno-altivec -msoft-float -INLINE_LIMIT?= 15000 -.endif - -.if ${MACHINE_ARCH} == "powerpcspe" -CFLAGS.gcc+= -mno-spe -.endif - -# -# Use dot symbols (or, better, the V2 ELF ABI) on powerpc64 to make -# DDB happy. ELFv2, if available, has some other efficiency benefits. -# -.if ${MACHINE_ARCH:Mpowerpc64*} != "" && \ - ${COMPILER_TYPE} == "clang" && ${COMPILER_VERSION} < 160000 -CFLAGS+= -mabi=elfv2 -.endif - -# -# For MIPS we also tell gcc to use floating point emulation -# -.if ${MACHINE_CPUARCH} == "mips" -CFLAGS+= -msoft-float -INLINE_LIMIT?= 8000 -.endif - # # GCC 3.0 and above like to do certain optimizations based on the # assumption that the program is linked against libc. Stop this. @@ -346,20 +315,6 @@ LD_EMULATION_arm=armelf_fbsd LD_EMULATION_armv6=armelf_fbsd LD_EMULATION_armv7=armelf_fbsd LD_EMULATION_i386=elf_i386_fbsd -LD_EMULATION_mips= elf32btsmip_fbsd -LD_EMULATION_mipshf= elf32btsmip_fbsd -LD_EMULATION_mips64= elf64btsmip_fbsd -LD_EMULATION_mips64hf= elf64btsmip_fbsd -LD_EMULATION_mipsel= elf32ltsmip_fbsd -LD_EMULATION_mipselhf= elf32ltsmip_fbsd -LD_EMULATION_mips64el= elf64ltsmip_fbsd -LD_EMULATION_mips64elhf= elf64ltsmip_fbsd -LD_EMULATION_mipsn32= elf32btsmipn32_fbsd -LD_EMULATION_mipsn32el= elf32btsmipn32_fbsd # I don't think this is a thing that works -LD_EMULATION_powerpc= elf32ppc_fbsd -LD_EMULATION_powerpcspe= elf32ppc_fbsd -LD_EMULATION_powerpc64= elf64ppc_fbsd -LD_EMULATION_powerpc64le= elf64lppc_fbsd LD_EMULATION_riscv64= elf64lriscv LD_EMULATION_riscv64sf= elf64lriscv LD_EMULATION=${LD_EMULATION_${MACHINE_ARCH}} diff --git a/sys/conf/kern.opts.mk b/sys/conf/kern.opts.mk index f2eee6f009e..350b38e9e99 100644 --- a/sys/conf/kern.opts.mk +++ b/sys/conf/kern.opts.mk @@ -79,14 +79,6 @@ BROKEN_OPTIONS+= CDDL ZFS . endif .endif -.if ${MACHINE_CPUARCH} == "mips" -BROKEN_OPTIONS+= CDDL ZFS SSP -.endif - -.if ${MACHINE_CPUARCH} == "powerpc" && ${MACHINE_ARCH} == "powerpc" -BROKEN_OPTIONS+= ZFS -.endif - # Things that don't work because the kernel doesn't have the support # for them. .if ${MACHINE} != "i386" && ${MACHINE} != "amd64" @@ -98,8 +90,8 @@ BROKEN_OPTIONS+= OFED BROKEN_OPTIONS+= KERNEL_RETPOLINE .endif -# EFI doesn't exist on mips, powerpc, or riscv. -.if ${MACHINE:Mmips} || ${MACHINE:Mpowerpc} || ${MACHINE:Mriscv} +# EFI does not exist on riscv. +.if ${MACHINE:Mriscv} BROKEN_OPTIONS+=EFI .endif diff --git a/sys/conf/kern.pre.mk b/sys/conf/kern.pre.mk index c0af7ea7313..09cc22257ae 100644 --- a/sys/conf/kern.pre.mk +++ b/sys/conf/kern.pre.mk @@ -77,9 +77,6 @@ CFLAGS= ${COPTFLAGS} ${DEBUG} CFLAGS+= ${INCLUDES} -D_KERNEL -DHAVE_KERNEL_OPTION_HEADERS -include opt_global.h CFLAGS_PARAM_INLINE_UNIT_GROWTH?=100 CFLAGS_PARAM_LARGE_FUNCTION_GROWTH?=1000 -.if ${MACHINE_CPUARCH} == "mips" -CFLAGS_ARCH_PARAMS?=--param max-inline-insns-single=1000 -DMACHINE_ARCH='"${MACHINE_ARCH}"' -.endif CFLAGS.gcc+= -fms-extensions -finline-limit=${INLINE_LIMIT} CFLAGS.gcc+= --param inline-unit-growth=${CFLAGS_PARAM_INLINE_UNIT_GROWTH} CFLAGS.gcc+= --param large-function-growth=${CFLAGS_PARAM_LARGE_FUNCTION_GROWTH} @@ -179,10 +176,10 @@ LDFLAGS+= --build-id=sha1 .endif .if (${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64" || \ - ${MACHINE_CPUARCH} == "i386" || ${MACHINE} == "powerpc") && \ + ${MACHINE_CPUARCH} == "i386") && \ defined(LINKER_FEATURES) && ${LINKER_FEATURES:Mifunc} == "" && \ !make(install) -.error amd64/arm64/i386/ppc* kernel requires linker ifunc support +.error amd64/arm64/i386 kernel requires linker ifunc support .endif .if ${MACHINE_CPUARCH} == "amd64" LDFLAGS+= -z max-page-size=2097152 @@ -279,8 +276,7 @@ ZFS_CFLAGS+= -DHAVE_AVX2 -DHAVE_AVX -D__x86_64 -DHAVE_SSE2 -DHAVE_AVX512F \ -DHAVE_SSSE3 -DHAVE_AVX512BW .endif -.if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "powerpc" || \ - ${MACHINE_ARCH} == "powerpcspe" || ${MACHINE_ARCH} == "arm" +.if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "arm" ZFS_CFLAGS+= -DBITS_PER_LONG=32 .else ZFS_CFLAGS+= -DBITS_PER_LONG=64 diff --git a/sys/conf/kmod.mk b/sys/conf/kmod.mk index 9d3a98d921e..b3edefd2545 100644 --- a/sys/conf/kmod.mk +++ b/sys/conf/kmod.mk @@ -77,8 +77,8 @@ OBJCOPY?= objcopy .SUFFIXES: .out .o .c .cc .cxx .C .y .l .s .S .m -# amd64 and mips use direct linking for kmod, all others use shared binaries -.if ${MACHINE_CPUARCH} != amd64 && ${MACHINE_CPUARCH} != mips +# amd64 uses direct linking for kmod; all others use shared binaries +.if ${MACHINE_CPUARCH} != amd64 __KLD_SHARED=yes .else __KLD_SHARED=no @@ -162,8 +162,7 @@ CFLAGS+= ${DEBUG_FLAGS} CFLAGS+= -fno-omit-frame-pointer -mno-omit-leaf-frame-pointer .endif -.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "riscv" || \ - ${MACHINE_CPUARCH} == "powerpc" +.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "riscv" CFLAGS+= -fPIC .endif @@ -182,18 +181,6 @@ CFLAGS.clang+= -mfpu=none CFLAGS+= -funwind-tables .endif -.if ${MACHINE_CPUARCH} == powerpc -CFLAGS+= -mlongcall -fno-omit-frame-pointer -.if ${LINKER_TYPE} == "lld" -# TOC optimization in LLD (9.0) currently breaks kernel modules, so disable it -LDFLAGS+= --no-toc-optimize -.endif -.endif - -.if ${MACHINE_CPUARCH} == mips -CFLAGS+= -G0 -fno-pic -mno-abicalls -mlong-calls -.endif - .if defined(DEBUG) || defined(DEBUG_FLAGS) CTFFLAGS+= -g .endif diff --git a/sys/conf/ldscript.mips b/sys/conf/ldscript.mips deleted file mode 100644 index d55ece4ae43..00000000000 --- a/sys/conf/ldscript.mips +++ /dev/null @@ -1,299 +0,0 @@ -/*- - * Copyright (c) 2001, 2004, 2008, Juniper Networks, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Juniper Networks, Inc. nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY JUNIPER NETWORKS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. 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Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Juniper Networks, Inc. nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY JUNIPER NETWORKS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. 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Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Juniper Networks, Inc. nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY JUNIPER NETWORKS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL JUNIPER NETWORKS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * JNPR: ldscript.mips,v 1.3 2006/10/11 06:12:04 - */ - -OUTPUT_ARCH(mips) -ENTRY(_start) -SEARCH_DIR(/usr/lib); - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = KERNLOADADDR + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .gnu.version : { *(.gnu.version) } - .gnu.version_d : { *(.gnu.version_d) } - .gnu.version_r : { *(.gnu.version_r) } - .rel.init : { *(.rel.init) } - .rela.init : { *(.rela.init) } - .rel.text : - { - *(.rel.text) - *(.rel.text.*) - *(.rel.gnu.linkonce.t.*) - } - .rela.text : - { - *(.rela.text) - *(.rela.text.*) - *(.rela.gnu.linkonce.t.*) - } - .rel.fini : { *(.rel.fini) } - .rela.fini : { *(.rela.fini) } - .rel.rodata : - { - *(.rel.rodata) - *(.rel.rodata.*) - *(.rel.gnu.linkonce.r.*) - } - .rela.rodata : - { - *(.rela.rodata) - *(.rela.rodata.*) - *(.rela.gnu.linkonce.r.*) - } - .rel.data : - { - *(.rel.data) - *(.rel.data.*) - *(.rel.gnu.linkonce.d.*) - } - .rela.data : - { - *(.rela.data) - *(.rela.data.*) - *(.rela.gnu.linkonce.d.*) - } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.sdata : - { - *(.rel.sdata) - *(.rel.sdata.*) - *(.rel.gnu.linkonce.s.*) - } - .rela.sdata : - { - *(.rela.sdata) - *(.rela.sdata.*) - *(.rela.gnu.linkonce.s.*) - } - .rel.sbss : - { - *(.rel.sbss) - *(.rel.sbss.*) - *(.rel.gnu.linkonce.sb.*) - } - .rela.sbss : - { - *(.rela.sbss) - *(.rela.sbss.*) - *(.rel.gnu.linkonce.sb.*) - } - .rel.sdata2 : - { - *(.rel.sdata2) - *(.rel.sdata2.*) - *(.rel.gnu.linkonce.s2.*) - } - .rela.sdata2 : - { - *(.rela.sdata2) - *(.rela.sdata2.*) - *(.rela.gnu.linkonce.s2.*) - } - .rel.sbss2 : - { - *(.rel.sbss2) - *(.rel.sbss2.*) - *(.rel.gnu.linkonce.sb2.*) - } - .rela.sbss2 : - { - *(.rela.sbss2) - *(.rela.sbss2.*) - *(.rela.gnu.linkonce.sb2.*) - } - .rel.bss : - { - *(.rel.bss) - *(.rel.bss.*) - *(.rel.gnu.linkonce.b.*) - } - .rela.bss : - { - *(.rela.bss) - *(.rela.bss.*) - *(.rela.gnu.linkonce.b.*) - } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : - { - KEEP (*(.init)) - } =0x1000000 - .text : - { - *(.trap) - *(.text) - *(.text.*) - *(.stub) - /* .gnu.warning sections are handled specially by elf64.em. */ - *(.gnu.warning) - *(.gnu.linkonce.t.*) - } =0x1000000 - .fini : - { - KEEP (*(.fini)) - } =0x1000000 - PROVIDE (__etext = .); - PROVIDE (_etext = .); - PROVIDE (etext = .); - .rodata : { *(.rodata) *(.rodata.*) *(.gnu.linkonce.r.*) } - .rodata1 : { *(.rodata1) } - .note.gnu.build-id : { - PROVIDE (__build_id_start = .); - *(.note.gnu.build-id) - PROVIDE (__build_id_end = .); - } - .reginfo : { *(.reginfo) } - .sdata2 : { *(.sdata2) *(.sdata2.*) *(.gnu.linkonce.s2.*) } - .sbss2 : { *(.sbss2) *(.sbss2.*) *(.gnu.linkonce.sb2.*) } - . = ALIGN(0x2000) + (. & (0x2000 - 1)); - .data : - { - *(.data) - *(.data.*) - *(.gnu.linkonce.d.*) - } - .data1 : { *(.data1) } - .eh_frame : { KEEP (*(.eh_frame)) } - .gcc_except_table : { *(.gcc_except_table) } - .ctors : - { - /* gcc uses crtbegin.o to find the start of - the constructors, so we make sure it is - first. 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Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# 3. Neither the name of the Juniper Networks, Inc. nor the names of its -# contributors may be used to endorse or promote products derived from -# this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY JUNIPER NETWORKS AND CONTRIBUTORS ``AS IS'' AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL JUNIPER NETWORKS OR CONTRIBUTORS BE LIABLE -# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -# SUCH DAMAGE. -# -# JNPR: options.mips,v 1.2 2006/09/15 12:52:34 - -CPU_MIPS4KC opt_global.h -CPU_MIPS24K opt_global.h -CPU_MIPS34K opt_global.h -CPU_MIPS74K opt_global.h -CPU_MIPS1004K opt_global.h -CPU_MIPS1074K opt_global.h -CPU_INTERAPTIV opt_global.h -CPU_PROAPTIV opt_global.h -CPU_MIPS32 opt_global.h -CPU_MIPS64 opt_global.h -CPU_SENTRY5 opt_global.h -CPU_SB1 opt_global.h -CPU_CNMIPS opt_global.h -CPU_RMI opt_global.h -CPU_NLM opt_global.h -CPU_BERI opt_global.h -CPU_XBURST opt_global.h -CPU_MALTA opt_global.h - -# which MACHINE_ARCH architecture -MIPS -MIPSHF -MIPSEL -MIPSELHF -MIPS64 -MIPS64HF -MIPS64EL -MIPS64ELHF -MIPSN32 - -COMPAT_FREEBSD32 opt_global.h - -YAMON opt_global.h -CFE opt_global.h -CFE_CONSOLE opt_global.h -CFE_ENV opt_global.h -CFE_ENV_SIZE opt_global.h - -NOFPU opt_global.h - -TICK_USE_YAMON_FREQ opt_global.h -TICK_USE_MALTA_RTC opt_global.h - -# -# The highest memory address that can be used by the kernel in units of KB. -# -MAXMEM opt_global.h - -# -# Manual override of cache config -# -MIPS_DISABLE_L1_CACHE opt_global.h - -# -# Options that control the Cavium Simple Executive. -# -OCTEON_MODEL opt_cvmx.h -OCTEON_VENDOR_LANNER opt_cvmx.h -OCTEON_VENDOR_UBIQUITI opt_cvmx.h -OCTEON_VENDOR_RADISYS opt_cvmx.h -OCTEON_VENDOR_GEFES opt_cvmx.h -OCTEON_BOARD_CAPK_0100ND opt_cvmx.h - -# -# Options specific to the BERI platform. -# -BERI_LARGE_TLB opt_global.h -PLATFORM_INIT_SECONDARY opt_global.h - -# -# Options that control the NetFPGA-10G Embedded CPU Ethernet Core. -# -NF10BMAC_64BIT opt_netfpga.h - -# -# Options that control the Atheros SoC peripherals -# -ARGE_DEBUG opt_arge.h -ARGE_MDIO opt_arge.h - -# -# At least one of the AR71XX ubiquiti boards has a Redboot configuration -# that "lies" about the amount of RAM it has. Until a cleaner method is -# defined, this option will suffice in overriding what Redboot says. -# -AR71XX_REALMEM opt_ar71xx.h -AR71XX_ENV_UBOOT opt_ar71xx.h -AR71XX_ENV_REDBOOT opt_ar71xx.h -AR71XX_ENV_ROUTERBOOT opt_ar71xx.h -AR71XX_ATH_EEPROM opt_ar71xx.h - -# -# Options for AR531X SOC. AR531X_1ST_GENERATION is AR5311 to AR5314. -# - -AR531X_1ST_GENERATION opt_ar531x.h -AR531X_REALMEM opt_ar531x.h -AR531X_ENV_UBOOT opt_ar531x.h -AR531X_APB_DEBUG opt_ar531x.h -ARE_MDIO opt_ar531x.h -ARE_MII opt_ar531x.h - -# -# Options that control the Ralink RT305xF Etherenet MAC. -# -IF_RT_DEBUG opt_if_rt.h -IF_RT_PHY_SUPPORT opt_if_rt.h -IF_RT_RING_DATA_COUNT opt_if_rt.h - -# -# Options that control the Ralink/Mediatek SoC type. -# -MT7620 opt_rt305x.h -RT5350 opt_rt305x.h -RT305XF opt_rt305x.h -RT3052F opt_rt305x.h -RT3050F opt_rt305x.h -RT305X opt_rt305x.h -RT305X_UBOOT opt_rt305x.h -RT305X_USE_UART opt_rt305x.h -RT_MDIO opt_rt305x.h - -# -# Options that affect the pmap. -# -PV_STATS opt_pmap.h - -# -# Options to use INTRNG code -# -INTRNG opt_global.h -MIPS_NIRQ opt_global.h diff --git a/sys/conf/options.powerpc b/sys/conf/options.powerpc deleted file mode 100644 index 15b1bf8df41..00000000000 --- a/sys/conf/options.powerpc +++ /dev/null @@ -1,37 +0,0 @@ -# Options specific to the powerpc platform kernels - -AIM opt_global.h -BOOKE opt_global.h -BOOKE_E500 opt_global.h -CELL - -POWERPC -POWERPC64 -POWERPC64LE -POWERPCSPE - -FPU_EMU - -COMPAT_FREEBSD32 opt_global.h - -MOEA64_STATS opt_pmap.h -AMIGAONE opt_platform.h -MIKROTIK opt_platform.h -MPC85XX opt_platform.h -POWERMAC opt_platform.h -PS3 opt_platform.h -MAMBO -POWERNV opt_platform.h -PSERIES opt_platform.h -PSIM -QEMU opt_platform.h - -SC_OFWFB opt_ofwfb.h - -OFWCONS_POLL_HZ opt_ofw.h - -# AGP debugging support -AGP_DEBUG opt_agp.h - -# iWARP client interface support in ixl -IXL_IW opt_ixl.h diff --git a/sys/crypto/openssl/powerpc/aes-ppc.S b/sys/crypto/openssl/powerpc/aes-ppc.S deleted file mode 100644 index ff971cbe937..00000000000 --- a/sys/crypto/openssl/powerpc/aes-ppc.S +++ /dev/null @@ -1,1561 +0,0 @@ -/* Do not modify. This file is auto-generated from aes-ppc.pl. */ -.machine "any" -.text - -.align 7 -.LAES_Te: - mflr 0 - bcl 20,31,$+4 - mflr 3 - addi 3,3,120 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.LAES_Td: - mflr 0 - bcl 20,31,$+4 - mflr 3 - addi 3,3,2360 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.long 0xc66363a5,0xc66363a5 -.long 0xf87c7c84,0xf87c7c84 -.long 0xee777799,0xee777799 -.long 0xf67b7b8d,0xf67b7b8d -.long 0xfff2f20d,0xfff2f20d -.long 0xd66b6bbd,0xd66b6bbd -.long 0xde6f6fb1,0xde6f6fb1 -.long 0x91c5c554,0x91c5c554 -.long 0x60303050,0x60303050 -.long 0x02010103,0x02010103 -.long 0xce6767a9,0xce6767a9 -.long 0x562b2b7d,0x562b2b7d -.long 0xe7fefe19,0xe7fefe19 -.long 0xb5d7d762,0xb5d7d762 -.long 0x4dababe6,0x4dababe6 -.long 0xec76769a,0xec76769a -.long 0x8fcaca45,0x8fcaca45 -.long 0x1f82829d,0x1f82829d -.long 0x89c9c940,0x89c9c940 -.long 0xfa7d7d87,0xfa7d7d87 -.long 0xeffafa15,0xeffafa15 -.long 0xb25959eb,0xb25959eb -.long 0x8e4747c9,0x8e4747c9 -.long 0xfbf0f00b,0xfbf0f00b -.long 0x41adadec,0x41adadec -.long 0xb3d4d467,0xb3d4d467 -.long 0x5fa2a2fd,0x5fa2a2fd -.long 0x45afafea,0x45afafea -.long 0x239c9cbf,0x239c9cbf -.long 0x53a4a4f7,0x53a4a4f7 -.long 0xe4727296,0xe4727296 -.long 0x9bc0c05b,0x9bc0c05b -.long 0x75b7b7c2,0x75b7b7c2 -.long 0xe1fdfd1c,0xe1fdfd1c -.long 0x3d9393ae,0x3d9393ae -.long 0x4c26266a,0x4c26266a -.long 0x6c36365a,0x6c36365a -.long 0x7e3f3f41,0x7e3f3f41 -.long 0xf5f7f702,0xf5f7f702 -.long 0x83cccc4f,0x83cccc4f -.long 0x6834345c,0x6834345c -.long 0x51a5a5f4,0x51a5a5f4 -.long 0xd1e5e534,0xd1e5e534 -.long 0xf9f1f108,0xf9f1f108 -.long 0xe2717193,0xe2717193 -.long 0xabd8d873,0xabd8d873 -.long 0x62313153,0x62313153 -.long 0x2a15153f,0x2a15153f -.long 0x0804040c,0x0804040c -.long 0x95c7c752,0x95c7c752 -.long 0x46232365,0x46232365 -.long 0x9dc3c35e,0x9dc3c35e -.long 0x30181828,0x30181828 -.long 0x379696a1,0x379696a1 -.long 0x0a05050f,0x0a05050f -.long 0x2f9a9ab5,0x2f9a9ab5 -.long 0x0e070709,0x0e070709 -.long 0x24121236,0x24121236 -.long 0x1b80809b,0x1b80809b -.long 0xdfe2e23d,0xdfe2e23d -.long 0xcdebeb26,0xcdebeb26 -.long 0x4e272769,0x4e272769 -.long 0x7fb2b2cd,0x7fb2b2cd -.long 0xea75759f,0xea75759f -.long 0x1209091b,0x1209091b -.long 0x1d83839e,0x1d83839e -.long 0x582c2c74,0x582c2c74 -.long 0x341a1a2e,0x341a1a2e -.long 0x361b1b2d,0x361b1b2d -.long 0xdc6e6eb2,0xdc6e6eb2 -.long 0xb45a5aee,0xb45a5aee -.long 0x5ba0a0fb,0x5ba0a0fb -.long 0xa45252f6,0xa45252f6 -.long 0x763b3b4d,0x763b3b4d -.long 0xb7d6d661,0xb7d6d661 -.long 0x7db3b3ce,0x7db3b3ce -.long 0x5229297b,0x5229297b -.long 0xdde3e33e,0xdde3e33e -.long 0x5e2f2f71,0x5e2f2f71 -.long 0x13848497,0x13848497 -.long 0xa65353f5,0xa65353f5 -.long 0xb9d1d168,0xb9d1d168 -.long 0x00000000,0x00000000 -.long 0xc1eded2c,0xc1eded2c -.long 0x40202060,0x40202060 -.long 0xe3fcfc1f,0xe3fcfc1f -.long 0x79b1b1c8,0x79b1b1c8 -.long 0xb65b5bed,0xb65b5bed -.long 0xd46a6abe,0xd46a6abe -.long 0x8dcbcb46,0x8dcbcb46 -.long 0x67bebed9,0x67bebed9 -.long 0x7239394b,0x7239394b -.long 0x944a4ade,0x944a4ade -.long 0x984c4cd4,0x984c4cd4 -.long 0xb05858e8,0xb05858e8 -.long 0x85cfcf4a,0x85cfcf4a -.long 0xbbd0d06b,0xbbd0d06b -.long 0xc5efef2a,0xc5efef2a -.long 0x4faaaae5,0x4faaaae5 -.long 0xedfbfb16,0xedfbfb16 -.long 0x864343c5,0x864343c5 -.long 0x9a4d4dd7,0x9a4d4dd7 -.long 0x66333355,0x66333355 -.long 0x11858594,0x11858594 -.long 0x8a4545cf,0x8a4545cf -.long 0xe9f9f910,0xe9f9f910 -.long 0x04020206,0x04020206 -.long 0xfe7f7f81,0xfe7f7f81 -.long 0xa05050f0,0xa05050f0 -.long 0x783c3c44,0x783c3c44 -.long 0x259f9fba,0x259f9fba -.long 0x4ba8a8e3,0x4ba8a8e3 -.long 0xa25151f3,0xa25151f3 -.long 0x5da3a3fe,0x5da3a3fe -.long 0x804040c0,0x804040c0 -.long 0x058f8f8a,0x058f8f8a -.long 0x3f9292ad,0x3f9292ad -.long 0x219d9dbc,0x219d9dbc -.long 0x70383848,0x70383848 -.long 0xf1f5f504,0xf1f5f504 -.long 0x63bcbcdf,0x63bcbcdf -.long 0x77b6b6c1,0x77b6b6c1 -.long 0xafdada75,0xafdada75 -.long 0x42212163,0x42212163 -.long 0x20101030,0x20101030 -.long 0xe5ffff1a,0xe5ffff1a -.long 0xfdf3f30e,0xfdf3f30e -.long 0xbfd2d26d,0xbfd2d26d -.long 0x81cdcd4c,0x81cdcd4c -.long 0x180c0c14,0x180c0c14 -.long 0x26131335,0x26131335 -.long 0xc3ecec2f,0xc3ecec2f -.long 0xbe5f5fe1,0xbe5f5fe1 -.long 0x359797a2,0x359797a2 -.long 0x884444cc,0x884444cc -.long 0x2e171739,0x2e171739 -.long 0x93c4c457,0x93c4c457 -.long 0x55a7a7f2,0x55a7a7f2 -.long 0xfc7e7e82,0xfc7e7e82 -.long 0x7a3d3d47,0x7a3d3d47 -.long 0xc86464ac,0xc86464ac -.long 0xba5d5de7,0xba5d5de7 -.long 0x3219192b,0x3219192b -.long 0xe6737395,0xe6737395 -.long 0xc06060a0,0xc06060a0 -.long 0x19818198,0x19818198 -.long 0x9e4f4fd1,0x9e4f4fd1 -.long 0xa3dcdc7f,0xa3dcdc7f -.long 0x44222266,0x44222266 -.long 0x542a2a7e,0x542a2a7e -.long 0x3b9090ab,0x3b9090ab -.long 0x0b888883,0x0b888883 -.long 0x8c4646ca,0x8c4646ca -.long 0xc7eeee29,0xc7eeee29 -.long 0x6bb8b8d3,0x6bb8b8d3 -.long 0x2814143c,0x2814143c -.long 0xa7dede79,0xa7dede79 -.long 0xbc5e5ee2,0xbc5e5ee2 -.long 0x160b0b1d,0x160b0b1d -.long 0xaddbdb76,0xaddbdb76 -.long 0xdbe0e03b,0xdbe0e03b -.long 0x64323256,0x64323256 -.long 0x743a3a4e,0x743a3a4e -.long 0x140a0a1e,0x140a0a1e -.long 0x924949db,0x924949db -.long 0x0c06060a,0x0c06060a -.long 0x4824246c,0x4824246c -.long 0xb85c5ce4,0xb85c5ce4 -.long 0x9fc2c25d,0x9fc2c25d -.long 0xbdd3d36e,0xbdd3d36e -.long 0x43acacef,0x43acacef -.long 0xc46262a6,0xc46262a6 -.long 0x399191a8,0x399191a8 -.long 0x319595a4,0x319595a4 -.long 0xd3e4e437,0xd3e4e437 -.long 0xf279798b,0xf279798b -.long 0xd5e7e732,0xd5e7e732 -.long 0x8bc8c843,0x8bc8c843 -.long 0x6e373759,0x6e373759 -.long 0xda6d6db7,0xda6d6db7 -.long 0x018d8d8c,0x018d8d8c -.long 0xb1d5d564,0xb1d5d564 -.long 0x9c4e4ed2,0x9c4e4ed2 -.long 0x49a9a9e0,0x49a9a9e0 -.long 0xd86c6cb4,0xd86c6cb4 -.long 0xac5656fa,0xac5656fa -.long 0xf3f4f407,0xf3f4f407 -.long 0xcfeaea25,0xcfeaea25 -.long 0xca6565af,0xca6565af -.long 0xf47a7a8e,0xf47a7a8e -.long 0x47aeaee9,0x47aeaee9 -.long 0x10080818,0x10080818 -.long 0x6fbabad5,0x6fbabad5 -.long 0xf0787888,0xf0787888 -.long 0x4a25256f,0x4a25256f -.long 0x5c2e2e72,0x5c2e2e72 -.long 0x381c1c24,0x381c1c24 -.long 0x57a6a6f1,0x57a6a6f1 -.long 0x73b4b4c7,0x73b4b4c7 -.long 0x97c6c651,0x97c6c651 -.long 0xcbe8e823,0xcbe8e823 -.long 0xa1dddd7c,0xa1dddd7c -.long 0xe874749c,0xe874749c -.long 0x3e1f1f21,0x3e1f1f21 -.long 0x964b4bdd,0x964b4bdd -.long 0x61bdbddc,0x61bdbddc -.long 0x0d8b8b86,0x0d8b8b86 -.long 0x0f8a8a85,0x0f8a8a85 -.long 0xe0707090,0xe0707090 -.long 0x7c3e3e42,0x7c3e3e42 -.long 0x71b5b5c4,0x71b5b5c4 -.long 0xcc6666aa,0xcc6666aa -.long 0x904848d8,0x904848d8 -.long 0x06030305,0x06030305 -.long 0xf7f6f601,0xf7f6f601 -.long 0x1c0e0e12,0x1c0e0e12 -.long 0xc26161a3,0xc26161a3 -.long 0x6a35355f,0x6a35355f -.long 0xae5757f9,0xae5757f9 -.long 0x69b9b9d0,0x69b9b9d0 -.long 0x17868691,0x17868691 -.long 0x99c1c158,0x99c1c158 -.long 0x3a1d1d27,0x3a1d1d27 -.long 0x279e9eb9,0x279e9eb9 -.long 0xd9e1e138,0xd9e1e138 -.long 0xebf8f813,0xebf8f813 -.long 0x2b9898b3,0x2b9898b3 -.long 0x22111133,0x22111133 -.long 0xd26969bb,0xd26969bb -.long 0xa9d9d970,0xa9d9d970 -.long 0x078e8e89,0x078e8e89 -.long 0x339494a7,0x339494a7 -.long 0x2d9b9bb6,0x2d9b9bb6 -.long 0x3c1e1e22,0x3c1e1e22 -.long 0x15878792,0x15878792 -.long 0xc9e9e920,0xc9e9e920 -.long 0x87cece49,0x87cece49 -.long 0xaa5555ff,0xaa5555ff -.long 0x50282878,0x50282878 -.long 0xa5dfdf7a,0xa5dfdf7a -.long 0x038c8c8f,0x038c8c8f -.long 0x59a1a1f8,0x59a1a1f8 -.long 0x09898980,0x09898980 -.long 0x1a0d0d17,0x1a0d0d17 -.long 0x65bfbfda,0x65bfbfda -.long 0xd7e6e631,0xd7e6e631 -.long 0x844242c6,0x844242c6 -.long 0xd06868b8,0xd06868b8 -.long 0x824141c3,0x824141c3 -.long 0x299999b0,0x299999b0 -.long 0x5a2d2d77,0x5a2d2d77 -.long 0x1e0f0f11,0x1e0f0f11 -.long 0x7bb0b0cb,0x7bb0b0cb -.long 0xa85454fc,0xa85454fc -.long 0x6dbbbbd6,0x6dbbbbd6 -.long 0x2c16163a,0x2c16163a -.byte 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5 -.byte 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76 -.byte 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0 -.byte 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0 -.byte 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc -.byte 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15 -.byte 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a -.byte 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75 -.byte 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0 -.byte 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84 -.byte 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b -.byte 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf -.byte 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85 -.byte 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8 -.byte 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5 -.byte 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2 -.byte 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17 -.byte 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73 -.byte 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88 -.byte 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb -.byte 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c -.byte 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79 -.byte 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9 -.byte 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08 -.byte 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6 -.byte 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a -.byte 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e -.byte 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e -.byte 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94 -.byte 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf -.byte 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68 -.byte 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16 -.long 0x51f4a750,0x51f4a750 -.long 0x7e416553,0x7e416553 -.long 0x1a17a4c3,0x1a17a4c3 -.long 0x3a275e96,0x3a275e96 -.long 0x3bab6bcb,0x3bab6bcb -.long 0x1f9d45f1,0x1f9d45f1 -.long 0xacfa58ab,0xacfa58ab -.long 0x4be30393,0x4be30393 -.long 0x2030fa55,0x2030fa55 -.long 0xad766df6,0xad766df6 -.long 0x88cc7691,0x88cc7691 -.long 0xf5024c25,0xf5024c25 -.long 0x4fe5d7fc,0x4fe5d7fc -.long 0xc52acbd7,0xc52acbd7 -.long 0x26354480,0x26354480 -.long 0xb562a38f,0xb562a38f -.long 0xdeb15a49,0xdeb15a49 -.long 0x25ba1b67,0x25ba1b67 -.long 0x45ea0e98,0x45ea0e98 -.long 0x5dfec0e1,0x5dfec0e1 -.long 0xc32f7502,0xc32f7502 -.long 0x814cf012,0x814cf012 -.long 0x8d4697a3,0x8d4697a3 -.long 0x6bd3f9c6,0x6bd3f9c6 -.long 0x038f5fe7,0x038f5fe7 -.long 0x15929c95,0x15929c95 -.long 0xbf6d7aeb,0xbf6d7aeb -.long 0x955259da,0x955259da -.long 0xd4be832d,0xd4be832d -.long 0x587421d3,0x587421d3 -.long 0x49e06929,0x49e06929 -.long 0x8ec9c844,0x8ec9c844 -.long 0x75c2896a,0x75c2896a -.long 0xf48e7978,0xf48e7978 -.long 0x99583e6b,0x99583e6b -.long 0x27b971dd,0x27b971dd -.long 0xbee14fb6,0xbee14fb6 -.long 0xf088ad17,0xf088ad17 -.long 0xc920ac66,0xc920ac66 -.long 0x7dce3ab4,0x7dce3ab4 -.long 0x63df4a18,0x63df4a18 -.long 0xe51a3182,0xe51a3182 -.long 0x97513360,0x97513360 -.long 0x62537f45,0x62537f45 -.long 0xb16477e0,0xb16477e0 -.long 0xbb6bae84,0xbb6bae84 -.long 0xfe81a01c,0xfe81a01c -.long 0xf9082b94,0xf9082b94 -.long 0x70486858,0x70486858 -.long 0x8f45fd19,0x8f45fd19 -.long 0x94de6c87,0x94de6c87 -.long 0x527bf8b7,0x527bf8b7 -.long 0xab73d323,0xab73d323 -.long 0x724b02e2,0x724b02e2 -.long 0xe31f8f57,0xe31f8f57 -.long 0x6655ab2a,0x6655ab2a -.long 0xb2eb2807,0xb2eb2807 -.long 0x2fb5c203,0x2fb5c203 -.long 0x86c57b9a,0x86c57b9a -.long 0xd33708a5,0xd33708a5 -.long 0x302887f2,0x302887f2 -.long 0x23bfa5b2,0x23bfa5b2 -.long 0x02036aba,0x02036aba -.long 0xed16825c,0xed16825c -.long 0x8acf1c2b,0x8acf1c2b -.long 0xa779b492,0xa779b492 -.long 0xf307f2f0,0xf307f2f0 -.long 0x4e69e2a1,0x4e69e2a1 -.long 0x65daf4cd,0x65daf4cd -.long 0x0605bed5,0x0605bed5 -.long 0xd134621f,0xd134621f -.long 0xc4a6fe8a,0xc4a6fe8a -.long 0x342e539d,0x342e539d -.long 0xa2f355a0,0xa2f355a0 -.long 0x058ae132,0x058ae132 -.long 0xa4f6eb75,0xa4f6eb75 -.long 0x0b83ec39,0x0b83ec39 -.long 0x4060efaa,0x4060efaa -.long 0x5e719f06,0x5e719f06 -.long 0xbd6e1051,0xbd6e1051 -.long 0x3e218af9,0x3e218af9 -.long 0x96dd063d,0x96dd063d -.long 0xdd3e05ae,0xdd3e05ae -.long 0x4de6bd46,0x4de6bd46 -.long 0x91548db5,0x91548db5 -.long 0x71c45d05,0x71c45d05 -.long 0x0406d46f,0x0406d46f -.long 0x605015ff,0x605015ff -.long 0x1998fb24,0x1998fb24 -.long 0xd6bde997,0xd6bde997 -.long 0x894043cc,0x894043cc -.long 0x67d99e77,0x67d99e77 -.long 0xb0e842bd,0xb0e842bd -.long 0x07898b88,0x07898b88 -.long 0xe7195b38,0xe7195b38 -.long 0x79c8eedb,0x79c8eedb -.long 0xa17c0a47,0xa17c0a47 -.long 0x7c420fe9,0x7c420fe9 -.long 0xf8841ec9,0xf8841ec9 -.long 0x00000000,0x00000000 -.long 0x09808683,0x09808683 -.long 0x322bed48,0x322bed48 -.long 0x1e1170ac,0x1e1170ac -.long 0x6c5a724e,0x6c5a724e -.long 0xfd0efffb,0xfd0efffb -.long 0x0f853856,0x0f853856 -.long 0x3daed51e,0x3daed51e -.long 0x362d3927,0x362d3927 -.long 0x0a0fd964,0x0a0fd964 -.long 0x685ca621,0x685ca621 -.long 0x9b5b54d1,0x9b5b54d1 -.long 0x24362e3a,0x24362e3a -.long 0x0c0a67b1,0x0c0a67b1 -.long 0x9357e70f,0x9357e70f -.long 0xb4ee96d2,0xb4ee96d2 -.long 0x1b9b919e,0x1b9b919e -.long 0x80c0c54f,0x80c0c54f -.long 0x61dc20a2,0x61dc20a2 -.long 0x5a774b69,0x5a774b69 -.long 0x1c121a16,0x1c121a16 -.long 0xe293ba0a,0xe293ba0a -.long 0xc0a02ae5,0xc0a02ae5 -.long 0x3c22e043,0x3c22e043 -.long 0x121b171d,0x121b171d -.long 0x0e090d0b,0x0e090d0b -.long 0xf28bc7ad,0xf28bc7ad -.long 0x2db6a8b9,0x2db6a8b9 -.long 0x141ea9c8,0x141ea9c8 -.long 0x57f11985,0x57f11985 -.long 0xaf75074c,0xaf75074c -.long 0xee99ddbb,0xee99ddbb -.long 0xa37f60fd,0xa37f60fd -.long 0xf701269f,0xf701269f -.long 0x5c72f5bc,0x5c72f5bc -.long 0x44663bc5,0x44663bc5 -.long 0x5bfb7e34,0x5bfb7e34 -.long 0x8b432976,0x8b432976 -.long 0xcb23c6dc,0xcb23c6dc -.long 0xb6edfc68,0xb6edfc68 -.long 0xb8e4f163,0xb8e4f163 -.long 0xd731dcca,0xd731dcca -.long 0x42638510,0x42638510 -.long 0x13972240,0x13972240 -.long 0x84c61120,0x84c61120 -.long 0x854a247d,0x854a247d -.long 0xd2bb3df8,0xd2bb3df8 -.long 0xaef93211,0xaef93211 -.long 0xc729a16d,0xc729a16d -.long 0x1d9e2f4b,0x1d9e2f4b -.long 0xdcb230f3,0xdcb230f3 -.long 0x0d8652ec,0x0d8652ec -.long 0x77c1e3d0,0x77c1e3d0 -.long 0x2bb3166c,0x2bb3166c -.long 0xa970b999,0xa970b999 -.long 0x119448fa,0x119448fa -.long 0x47e96422,0x47e96422 -.long 0xa8fc8cc4,0xa8fc8cc4 -.long 0xa0f03f1a,0xa0f03f1a -.long 0x567d2cd8,0x567d2cd8 -.long 0x223390ef,0x223390ef -.long 0x87494ec7,0x87494ec7 -.long 0xd938d1c1,0xd938d1c1 -.long 0x8ccaa2fe,0x8ccaa2fe -.long 0x98d40b36,0x98d40b36 -.long 0xa6f581cf,0xa6f581cf -.long 0xa57ade28,0xa57ade28 -.long 0xdab78e26,0xdab78e26 -.long 0x3fadbfa4,0x3fadbfa4 -.long 0x2c3a9de4,0x2c3a9de4 -.long 0x5078920d,0x5078920d -.long 0x6a5fcc9b,0x6a5fcc9b -.long 0x547e4662,0x547e4662 -.long 0xf68d13c2,0xf68d13c2 -.long 0x90d8b8e8,0x90d8b8e8 -.long 0x2e39f75e,0x2e39f75e -.long 0x82c3aff5,0x82c3aff5 -.long 0x9f5d80be,0x9f5d80be -.long 0x69d0937c,0x69d0937c -.long 0x6fd52da9,0x6fd52da9 -.long 0xcf2512b3,0xcf2512b3 -.long 0xc8ac993b,0xc8ac993b -.long 0x10187da7,0x10187da7 -.long 0xe89c636e,0xe89c636e -.long 0xdb3bbb7b,0xdb3bbb7b -.long 0xcd267809,0xcd267809 -.long 0x6e5918f4,0x6e5918f4 -.long 0xec9ab701,0xec9ab701 -.long 0x834f9aa8,0x834f9aa8 -.long 0xe6956e65,0xe6956e65 -.long 0xaaffe67e,0xaaffe67e -.long 0x21bccf08,0x21bccf08 -.long 0xef15e8e6,0xef15e8e6 -.long 0xbae79bd9,0xbae79bd9 -.long 0x4a6f36ce,0x4a6f36ce -.long 0xea9f09d4,0xea9f09d4 -.long 0x29b07cd6,0x29b07cd6 -.long 0x31a4b2af,0x31a4b2af -.long 0x2a3f2331,0x2a3f2331 -.long 0xc6a59430,0xc6a59430 -.long 0x35a266c0,0x35a266c0 -.long 0x744ebc37,0x744ebc37 -.long 0xfc82caa6,0xfc82caa6 -.long 0xe090d0b0,0xe090d0b0 -.long 0x33a7d815,0x33a7d815 -.long 0xf104984a,0xf104984a -.long 0x41ecdaf7,0x41ecdaf7 -.long 0x7fcd500e,0x7fcd500e -.long 0x1791f62f,0x1791f62f -.long 0x764dd68d,0x764dd68d -.long 0x43efb04d,0x43efb04d -.long 0xccaa4d54,0xccaa4d54 -.long 0xe49604df,0xe49604df -.long 0x9ed1b5e3,0x9ed1b5e3 -.long 0x4c6a881b,0x4c6a881b -.long 0xc12c1fb8,0xc12c1fb8 -.long 0x4665517f,0x4665517f -.long 0x9d5eea04,0x9d5eea04 -.long 0x018c355d,0x018c355d -.long 0xfa877473,0xfa877473 -.long 0xfb0b412e,0xfb0b412e -.long 0xb3671d5a,0xb3671d5a -.long 0x92dbd252,0x92dbd252 -.long 0xe9105633,0xe9105633 -.long 0x6dd64713,0x6dd64713 -.long 0x9ad7618c,0x9ad7618c -.long 0x37a10c7a,0x37a10c7a -.long 0x59f8148e,0x59f8148e -.long 0xeb133c89,0xeb133c89 -.long 0xcea927ee,0xcea927ee -.long 0xb761c935,0xb761c935 -.long 0xe11ce5ed,0xe11ce5ed -.long 0x7a47b13c,0x7a47b13c -.long 0x9cd2df59,0x9cd2df59 -.long 0x55f2733f,0x55f2733f -.long 0x1814ce79,0x1814ce79 -.long 0x73c737bf,0x73c737bf -.long 0x53f7cdea,0x53f7cdea -.long 0x5ffdaa5b,0x5ffdaa5b -.long 0xdf3d6f14,0xdf3d6f14 -.long 0x7844db86,0x7844db86 -.long 0xcaaff381,0xcaaff381 -.long 0xb968c43e,0xb968c43e -.long 0x3824342c,0x3824342c -.long 0xc2a3405f,0xc2a3405f -.long 0x161dc372,0x161dc372 -.long 0xbce2250c,0xbce2250c -.long 0x283c498b,0x283c498b -.long 0xff0d9541,0xff0d9541 -.long 0x39a80171,0x39a80171 -.long 0x080cb3de,0x080cb3de -.long 0xd8b4e49c,0xd8b4e49c -.long 0x6456c190,0x6456c190 -.long 0x7bcb8461,0x7bcb8461 -.long 0xd532b670,0xd532b670 -.long 0x486c5c74,0x486c5c74 -.long 0xd0b85742,0xd0b85742 -.byte 0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38 -.byte 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb -.byte 0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87 -.byte 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb -.byte 0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d -.byte 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e -.byte 0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2 -.byte 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25 -.byte 0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16 -.byte 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92 -.byte 0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda -.byte 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84 -.byte 0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a -.byte 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06 -.byte 0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02 -.byte 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b -.byte 0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea -.byte 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73 -.byte 0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85 -.byte 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e -.byte 0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89 -.byte 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b -.byte 0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20 -.byte 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4 -.byte 0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31 -.byte 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f -.byte 0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d -.byte 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef -.byte 0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0 -.byte 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61 -.byte 0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26 -.byte 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d - - -.globl AES_encrypt -.type AES_encrypt,@function -.align 7 -AES_encrypt: - stwu 1,-128(1) - mflr 0 - - stw 4,52(1) - stw 14,56(1) - stw 15,60(1) - stw 16,64(1) - stw 17,68(1) - stw 18,72(1) - stw 19,76(1) - stw 20,80(1) - stw 21,84(1) - stw 22,88(1) - stw 23,92(1) - stw 24,96(1) - stw 25,100(1) - stw 26,104(1) - stw 27,108(1) - stw 28,112(1) - stw 29,116(1) - stw 30,120(1) - stw 31,124(1) - stw 0,132(1) - - andi. 12,3,3 - andi. 0,4,3 - or. 12,12,0 - bne .Lenc_unaligned - -.Lenc_unaligned_ok: - lwz 8,0(3) - lwz 9,4(3) - lwz 10,8(3) - lwz 11,12(3) - bl .LAES_Te - bl .Lppc_AES_encrypt_compact - lwz 4,52(1) - stw 8,0(4) - stw 9,4(4) - stw 10,8(4) - stw 11,12(4) - b .Lenc_done - -.Lenc_unaligned: - subfic 12,3,4096 - subfic 0,4,4096 - andi. 12,12,4096-16 - beq .Lenc_xpage - andi. 0,0,4096-16 - bne .Lenc_unaligned_ok - -.Lenc_xpage: - lbz 16,0(3) - lbz 17,1(3) - lbz 18,2(3) - lbz 8,3(3) - lbz 20,4(3) - lbz 21,5(3) - lbz 22,6(3) - lbz 9,7(3) - lbz 24,8(3) - lbz 25,9(3) - lbz 26,10(3) - insrwi 8,16,8,0 - lbz 10,11(3) - insrwi 9,20,8,0 - lbz 28,12(3) - insrwi 8,17,8,8 - lbz 29,13(3) - insrwi 9,21,8,8 - lbz 30,14(3) - insrwi 8,18,8,16 - lbz 11,15(3) - insrwi 9,22,8,16 - insrwi 10,24,8,0 - insrwi 11,28,8,0 - insrwi 10,25,8,8 - insrwi 11,29,8,8 - insrwi 10,26,8,16 - insrwi 11,30,8,16 - - bl .LAES_Te - bl .Lppc_AES_encrypt_compact - lwz 4,52(1) - - extrwi 16,8,8,0 - extrwi 17,8,8,8 - stb 16,0(4) - extrwi 18,8,8,16 - stb 17,1(4) - stb 18,2(4) - extrwi 20,9,8,0 - stb 8,3(4) - extrwi 21,9,8,8 - stb 20,4(4) - extrwi 22,9,8,16 - stb 21,5(4) - stb 22,6(4) - extrwi 24,10,8,0 - stb 9,7(4) - extrwi 25,10,8,8 - stb 24,8(4) - extrwi 26,10,8,16 - stb 25,9(4) - stb 26,10(4) - extrwi 28,11,8,0 - stb 10,11(4) - extrwi 29,11,8,8 - stb 28,12(4) - extrwi 30,11,8,16 - stb 29,13(4) - stb 30,14(4) - stb 11,15(4) - -.Lenc_done: - lwz 0,132(1) - lwz 14,56(1) - lwz 15,60(1) - lwz 16,64(1) - lwz 17,68(1) - lwz 18,72(1) - lwz 19,76(1) - lwz 20,80(1) - lwz 21,84(1) - lwz 22,88(1) - lwz 23,92(1) - lwz 24,96(1) - lwz 25,100(1) - lwz 26,104(1) - lwz 27,108(1) - lwz 28,112(1) - lwz 29,116(1) - lwz 30,120(1) - lwz 31,124(1) - mtlr 0 - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,1,0x80,18,3,0 -.long 0 - -.align 5 -.Lppc_AES_encrypt: - lwz 16,240(5) - addi 6,3,3 - lwz 12,0(5) - addi 7,3,2 - lwz 0,4(5) - addi 4,3,1 - lwz 14,8(5) - addi 16,16,-1 - lwz 15,12(5) - addi 5,5,16 - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - mtctr 16 -.align 4 -.Lenc_loop: - rlwinm 16,8,11,21,28 - rlwinm 17,9,11,21,28 - rlwinm 18,10,11,21,28 - rlwinm 19,11,11,21,28 - lwz 12,0(5) - rlwinm 20,9,19,21,28 - lwz 0,4(5) - rlwinm 21,10,19,21,28 - lwz 14,8(5) - rlwinm 22,11,19,21,28 - lwz 15,12(5) - rlwinm 23,8,19,21,28 - lwzx 16,3,16 - rlwinm 24,10,27,21,28 - lwzx 17,3,17 - rlwinm 25,11,27,21,28 - lwzx 18,3,18 - rlwinm 26,8,27,21,28 - lwzx 19,3,19 - rlwinm 27,9,27,21,28 - lwzx 20,6,20 - rlwinm 28,11,3,21,28 - lwzx 21,6,21 - rlwinm 29,8,3,21,28 - lwzx 22,6,22 - rlwinm 30,9,3,21,28 - lwzx 23,6,23 - rlwinm 31,10,3,21,28 - lwzx 24,7,24 - xor 12,12,16 - lwzx 25,7,25 - xor 0,0,17 - lwzx 26,7,26 - xor 14,14,18 - lwzx 27,7,27 - xor 15,15,19 - lwzx 28,4,28 - xor 12,12,20 - lwzx 29,4,29 - xor 0,0,21 - lwzx 30,4,30 - xor 14,14,22 - lwzx 31,4,31 - xor 15,15,23 - xor 12,12,24 - xor 0,0,25 - xor 14,14,26 - xor 15,15,27 - xor 8,12,28 - xor 9,0,29 - xor 10,14,30 - xor 11,15,31 - addi 5,5,16 - bdnz .Lenc_loop - - addi 7,3,2048 - nop - lwz 12,0(5) - rlwinm 16,8,8,24,31 - lwz 0,4(5) - rlwinm 17,9,8,24,31 - lwz 14,8(5) - rlwinm 18,10,8,24,31 - lwz 15,12(5) - rlwinm 19,11,8,24,31 - lwz 24,2048(3) - rlwinm 20,9,16,24,31 - lwz 25,2080(3) - rlwinm 21,10,16,24,31 - lwz 26,2112(3) - rlwinm 22,11,16,24,31 - lwz 27,2144(3) - rlwinm 23,8,16,24,31 - lwz 28,2176(3) - rlwinm 24,10,24,24,31 - lwz 29,2208(3) - rlwinm 25,11,24,24,31 - lwz 30,2240(3) - rlwinm 26,8,24,24,31 - lwz 31,2272(3) - rlwinm 27,9,24,24,31 - lbzx 16,7,16 - rlwinm 28,11,0,24,31 - lbzx 17,7,17 - rlwinm 29,8,0,24,31 - lbzx 18,7,18 - rlwinm 30,9,0,24,31 - lbzx 19,7,19 - rlwinm 31,10,0,24,31 - lbzx 20,7,20 - rlwinm 8,16,24,0,7 - lbzx 21,7,21 - rlwinm 9,17,24,0,7 - lbzx 22,7,22 - rlwinm 10,18,24,0,7 - lbzx 23,7,23 - rlwinm 11,19,24,0,7 - lbzx 24,7,24 - rlwimi 8,20,16,8,15 - lbzx 25,7,25 - rlwimi 9,21,16,8,15 - lbzx 26,7,26 - rlwimi 10,22,16,8,15 - lbzx 27,7,27 - rlwimi 11,23,16,8,15 - lbzx 28,7,28 - rlwimi 8,24,8,16,23 - lbzx 29,7,29 - rlwimi 9,25,8,16,23 - lbzx 30,7,30 - rlwimi 10,26,8,16,23 - lbzx 31,7,31 - rlwimi 11,27,8,16,23 - or 8,8,28 - or 9,9,29 - or 10,10,30 - or 11,11,31 - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.align 4 -.Lppc_AES_encrypt_compact: - lwz 16,240(5) - addi 6,3,2048 - lwz 12,0(5) - lis 7,0x8080 - lwz 0,4(5) - lis 4,0x1b1b - lwz 14,8(5) - ori 7,7,0x8080 - lwz 15,12(5) - ori 4,4,0x1b1b - addi 5,5,16 - mtctr 16 -.align 4 -.Lenc_compact_loop: - xor 8,8,12 - xor 9,9,0 - rlwinm 16,8,8,24,31 - xor 10,10,14 - rlwinm 17,9,8,24,31 - xor 11,11,15 - rlwinm 18,10,8,24,31 - rlwinm 19,11,8,24,31 - rlwinm 20,9,16,24,31 - rlwinm 21,10,16,24,31 - rlwinm 22,11,16,24,31 - rlwinm 23,8,16,24,31 - lbzx 16,6,16 - rlwinm 24,10,24,24,31 - lbzx 17,6,17 - rlwinm 25,11,24,24,31 - lbzx 18,6,18 - rlwinm 26,8,24,24,31 - lbzx 19,6,19 - rlwinm 27,9,24,24,31 - lbzx 20,6,20 - rlwinm 28,11,0,24,31 - lbzx 21,6,21 - rlwinm 29,8,0,24,31 - lbzx 22,6,22 - rlwinm 30,9,0,24,31 - lbzx 23,6,23 - rlwinm 31,10,0,24,31 - lbzx 24,6,24 - rlwinm 8,16,24,0,7 - lbzx 25,6,25 - rlwinm 9,17,24,0,7 - lbzx 26,6,26 - rlwinm 10,18,24,0,7 - lbzx 27,6,27 - rlwinm 11,19,24,0,7 - lbzx 28,6,28 - rlwimi 8,20,16,8,15 - lbzx 29,6,29 - rlwimi 9,21,16,8,15 - lbzx 30,6,30 - rlwimi 10,22,16,8,15 - lbzx 31,6,31 - rlwimi 11,23,16,8,15 - rlwimi 8,24,8,16,23 - rlwimi 9,25,8,16,23 - rlwimi 10,26,8,16,23 - rlwimi 11,27,8,16,23 - lwz 12,0(5) - or 8,8,28 - lwz 0,4(5) - or 9,9,29 - lwz 14,8(5) - or 10,10,30 - lwz 15,12(5) - or 11,11,31 - - addi 5,5,16 - bdz .Lenc_compact_done - - and 16,8,7 - and 17,9,7 - and 18,10,7 - and 19,11,7 - srwi 20,16,7 - andc 24,8,7 - srwi 21,17,7 - andc 25,9,7 - srwi 22,18,7 - andc 26,10,7 - srwi 23,19,7 - andc 27,11,7 - sub 16,16,20 - sub 17,17,21 - sub 18,18,22 - sub 19,19,23 - add 24,24,24 - add 25,25,25 - add 26,26,26 - add 27,27,27 - and 16,16,4 - and 17,17,4 - and 18,18,4 - and 19,19,4 - xor 16,16,24 - xor 17,17,25 - rotlwi 28,8,16 - xor 18,18,26 - rotlwi 29,9,16 - xor 19,19,27 - rotlwi 30,10,16 - - xor 8,8,16 - rotlwi 31,11,16 - xor 9,9,17 - rotrwi 8,8,24 - xor 10,10,18 - rotrwi 9,9,24 - xor 11,11,19 - rotrwi 10,10,24 - xor 8,8,16 - rotrwi 11,11,24 - xor 9,9,17 - xor 10,10,18 - xor 11,11,19 - rotlwi 24,28,8 - xor 8,8,28 - rotlwi 25,29,8 - xor 9,9,29 - rotlwi 26,30,8 - xor 10,10,30 - rotlwi 27,31,8 - xor 11,11,31 - xor 8,8,24 - xor 9,9,25 - xor 10,10,26 - xor 11,11,27 - - b .Lenc_compact_loop -.align 4 -.Lenc_compact_done: - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size AES_encrypt,.-AES_encrypt - -.globl AES_decrypt -.type AES_decrypt,@function -.align 7 -AES_decrypt: - stwu 1,-128(1) - mflr 0 - - stw 4,52(1) - stw 14,56(1) - stw 15,60(1) - stw 16,64(1) - stw 17,68(1) - stw 18,72(1) - stw 19,76(1) - stw 20,80(1) - stw 21,84(1) - stw 22,88(1) - stw 23,92(1) - stw 24,96(1) - stw 25,100(1) - stw 26,104(1) - stw 27,108(1) - stw 28,112(1) - stw 29,116(1) - stw 30,120(1) - stw 31,124(1) - stw 0,132(1) - - andi. 12,3,3 - andi. 0,4,3 - or. 12,12,0 - bne .Ldec_unaligned - -.Ldec_unaligned_ok: - lwz 8,0(3) - lwz 9,4(3) - lwz 10,8(3) - lwz 11,12(3) - bl .LAES_Td - bl .Lppc_AES_decrypt_compact - lwz 4,52(1) - stw 8,0(4) - stw 9,4(4) - stw 10,8(4) - stw 11,12(4) - b .Ldec_done - -.Ldec_unaligned: - subfic 12,3,4096 - subfic 0,4,4096 - andi. 12,12,4096-16 - beq .Ldec_xpage - andi. 0,0,4096-16 - bne .Ldec_unaligned_ok - -.Ldec_xpage: - lbz 16,0(3) - lbz 17,1(3) - lbz 18,2(3) - lbz 8,3(3) - lbz 20,4(3) - lbz 21,5(3) - lbz 22,6(3) - lbz 9,7(3) - lbz 24,8(3) - lbz 25,9(3) - lbz 26,10(3) - insrwi 8,16,8,0 - lbz 10,11(3) - insrwi 9,20,8,0 - lbz 28,12(3) - insrwi 8,17,8,8 - lbz 29,13(3) - insrwi 9,21,8,8 - lbz 30,14(3) - insrwi 8,18,8,16 - lbz 11,15(3) - insrwi 9,22,8,16 - insrwi 10,24,8,0 - insrwi 11,28,8,0 - insrwi 10,25,8,8 - insrwi 11,29,8,8 - insrwi 10,26,8,16 - insrwi 11,30,8,16 - - bl .LAES_Td - bl .Lppc_AES_decrypt_compact - lwz 4,52(1) - - extrwi 16,8,8,0 - extrwi 17,8,8,8 - stb 16,0(4) - extrwi 18,8,8,16 - stb 17,1(4) - stb 18,2(4) - extrwi 20,9,8,0 - stb 8,3(4) - extrwi 21,9,8,8 - stb 20,4(4) - extrwi 22,9,8,16 - stb 21,5(4) - stb 22,6(4) - extrwi 24,10,8,0 - stb 9,7(4) - extrwi 25,10,8,8 - stb 24,8(4) - extrwi 26,10,8,16 - stb 25,9(4) - stb 26,10(4) - extrwi 28,11,8,0 - stb 10,11(4) - extrwi 29,11,8,8 - stb 28,12(4) - extrwi 30,11,8,16 - stb 29,13(4) - stb 30,14(4) - stb 11,15(4) - -.Ldec_done: - lwz 0,132(1) - lwz 14,56(1) - lwz 15,60(1) - lwz 16,64(1) - lwz 17,68(1) - lwz 18,72(1) - lwz 19,76(1) - lwz 20,80(1) - lwz 21,84(1) - lwz 22,88(1) - lwz 23,92(1) - lwz 24,96(1) - lwz 25,100(1) - lwz 26,104(1) - lwz 27,108(1) - lwz 28,112(1) - lwz 29,116(1) - lwz 30,120(1) - lwz 31,124(1) - mtlr 0 - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,1,0x80,18,3,0 -.long 0 - -.align 5 -.Lppc_AES_decrypt: - lwz 16,240(5) - addi 6,3,3 - lwz 12,0(5) - addi 7,3,2 - lwz 0,4(5) - addi 4,3,1 - lwz 14,8(5) - addi 16,16,-1 - lwz 15,12(5) - addi 5,5,16 - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - mtctr 16 -.align 4 -.Ldec_loop: - rlwinm 16,8,11,21,28 - rlwinm 17,9,11,21,28 - rlwinm 18,10,11,21,28 - rlwinm 19,11,11,21,28 - lwz 12,0(5) - rlwinm 20,11,19,21,28 - lwz 0,4(5) - rlwinm 21,8,19,21,28 - lwz 14,8(5) - rlwinm 22,9,19,21,28 - lwz 15,12(5) - rlwinm 23,10,19,21,28 - lwzx 16,3,16 - rlwinm 24,10,27,21,28 - lwzx 17,3,17 - rlwinm 25,11,27,21,28 - lwzx 18,3,18 - rlwinm 26,8,27,21,28 - lwzx 19,3,19 - rlwinm 27,9,27,21,28 - lwzx 20,6,20 - rlwinm 28,9,3,21,28 - lwzx 21,6,21 - rlwinm 29,10,3,21,28 - lwzx 22,6,22 - rlwinm 30,11,3,21,28 - lwzx 23,6,23 - rlwinm 31,8,3,21,28 - lwzx 24,7,24 - xor 12,12,16 - lwzx 25,7,25 - xor 0,0,17 - lwzx 26,7,26 - xor 14,14,18 - lwzx 27,7,27 - xor 15,15,19 - lwzx 28,4,28 - xor 12,12,20 - lwzx 29,4,29 - xor 0,0,21 - lwzx 30,4,30 - xor 14,14,22 - lwzx 31,4,31 - xor 15,15,23 - xor 12,12,24 - xor 0,0,25 - xor 14,14,26 - xor 15,15,27 - xor 8,12,28 - xor 9,0,29 - xor 10,14,30 - xor 11,15,31 - addi 5,5,16 - bdnz .Ldec_loop - - addi 7,3,2048 - nop - lwz 12,0(5) - rlwinm 16,8,8,24,31 - lwz 0,4(5) - rlwinm 17,9,8,24,31 - lwz 14,8(5) - rlwinm 18,10,8,24,31 - lwz 15,12(5) - rlwinm 19,11,8,24,31 - lwz 24,2048(3) - rlwinm 20,11,16,24,31 - lwz 25,2080(3) - rlwinm 21,8,16,24,31 - lwz 26,2112(3) - lbzx 16,7,16 - lwz 27,2144(3) - lbzx 17,7,17 - lwz 28,2176(3) - rlwinm 22,9,16,24,31 - lwz 29,2208(3) - rlwinm 23,10,16,24,31 - lwz 30,2240(3) - rlwinm 24,10,24,24,31 - lwz 31,2272(3) - rlwinm 25,11,24,24,31 - lbzx 18,7,18 - rlwinm 26,8,24,24,31 - lbzx 19,7,19 - rlwinm 27,9,24,24,31 - lbzx 20,7,20 - rlwinm 28,9,0,24,31 - lbzx 21,7,21 - rlwinm 29,10,0,24,31 - lbzx 22,7,22 - rlwinm 30,11,0,24,31 - lbzx 23,7,23 - rlwinm 31,8,0,24,31 - lbzx 24,7,24 - rlwinm 8,16,24,0,7 - lbzx 25,7,25 - rlwinm 9,17,24,0,7 - lbzx 26,7,26 - rlwinm 10,18,24,0,7 - lbzx 27,7,27 - rlwinm 11,19,24,0,7 - lbzx 28,7,28 - rlwimi 8,20,16,8,15 - lbzx 29,7,29 - rlwimi 9,21,16,8,15 - lbzx 30,7,30 - rlwimi 10,22,16,8,15 - lbzx 31,7,31 - rlwimi 11,23,16,8,15 - rlwimi 8,24,8,16,23 - rlwimi 9,25,8,16,23 - rlwimi 10,26,8,16,23 - rlwimi 11,27,8,16,23 - or 8,8,28 - or 9,9,29 - or 10,10,30 - or 11,11,31 - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.align 4 -.Lppc_AES_decrypt_compact: - lwz 16,240(5) - addi 6,3,2048 - lwz 12,0(5) - lis 7,0x8080 - lwz 0,4(5) - lis 4,0x1b1b - lwz 14,8(5) - ori 7,7,0x8080 - lwz 15,12(5) - ori 4,4,0x1b1b - addi 5,5,16 - mtctr 16 -.align 4 -.Ldec_compact_loop: - xor 8,8,12 - xor 9,9,0 - rlwinm 16,8,8,24,31 - xor 10,10,14 - rlwinm 17,9,8,24,31 - xor 11,11,15 - rlwinm 18,10,8,24,31 - rlwinm 19,11,8,24,31 - rlwinm 20,11,16,24,31 - rlwinm 21,8,16,24,31 - rlwinm 22,9,16,24,31 - rlwinm 23,10,16,24,31 - lbzx 16,6,16 - rlwinm 24,10,24,24,31 - lbzx 17,6,17 - rlwinm 25,11,24,24,31 - lbzx 18,6,18 - rlwinm 26,8,24,24,31 - lbzx 19,6,19 - rlwinm 27,9,24,24,31 - lbzx 20,6,20 - rlwinm 28,9,0,24,31 - lbzx 21,6,21 - rlwinm 29,10,0,24,31 - lbzx 22,6,22 - rlwinm 30,11,0,24,31 - lbzx 23,6,23 - rlwinm 31,8,0,24,31 - lbzx 24,6,24 - rlwinm 8,16,24,0,7 - lbzx 25,6,25 - rlwinm 9,17,24,0,7 - lbzx 26,6,26 - rlwinm 10,18,24,0,7 - lbzx 27,6,27 - rlwinm 11,19,24,0,7 - lbzx 28,6,28 - rlwimi 8,20,16,8,15 - lbzx 29,6,29 - rlwimi 9,21,16,8,15 - lbzx 30,6,30 - rlwimi 10,22,16,8,15 - lbzx 31,6,31 - rlwimi 11,23,16,8,15 - rlwimi 8,24,8,16,23 - rlwimi 9,25,8,16,23 - rlwimi 10,26,8,16,23 - rlwimi 11,27,8,16,23 - lwz 12,0(5) - or 8,8,28 - lwz 0,4(5) - or 9,9,29 - lwz 14,8(5) - or 10,10,30 - lwz 15,12(5) - or 11,11,31 - - addi 5,5,16 - bdz .Ldec_compact_done - and 16,8,7 - and 17,9,7 - and 18,10,7 - and 19,11,7 - srwi 20,16,7 - andc 24,8,7 - srwi 21,17,7 - andc 25,9,7 - srwi 22,18,7 - andc 26,10,7 - srwi 23,19,7 - andc 27,11,7 - sub 16,16,20 - sub 17,17,21 - sub 18,18,22 - sub 19,19,23 - add 24,24,24 - add 25,25,25 - add 26,26,26 - add 27,27,27 - and 16,16,4 - and 17,17,4 - and 18,18,4 - and 19,19,4 - xor 16,16,24 - xor 17,17,25 - xor 18,18,26 - xor 19,19,27 - - and 20,16,7 - and 21,17,7 - and 22,18,7 - and 23,19,7 - srwi 24,20,7 - andc 28,16,7 - srwi 25,21,7 - andc 29,17,7 - srwi 26,22,7 - andc 30,18,7 - srwi 27,23,7 - andc 31,19,7 - sub 20,20,24 - sub 21,21,25 - sub 22,22,26 - sub 23,23,27 - add 28,28,28 - add 29,29,29 - add 30,30,30 - add 31,31,31 - and 20,20,4 - and 21,21,4 - and 22,22,4 - and 23,23,4 - xor 20,20,28 - xor 21,21,29 - xor 22,22,30 - xor 23,23,31 - - and 24,20,7 - and 25,21,7 - srwi 28,24,7 - and 26,22,7 - srwi 29,25,7 - and 27,23,7 - srwi 30,26,7 - sub 24,24,28 - srwi 31,27,7 - sub 25,25,29 - sub 26,26,30 - sub 27,27,31 - andc 28,20,7 - andc 29,21,7 - andc 30,22,7 - andc 31,23,7 - add 28,28,28 - add 29,29,29 - add 30,30,30 - add 31,31,31 - and 24,24,4 - and 25,25,4 - and 26,26,4 - and 27,27,4 - xor 24,24,28 - xor 25,25,29 - xor 26,26,30 - xor 27,27,31 - - xor 16,16,8 - xor 17,17,9 - xor 18,18,10 - xor 19,19,11 - xor 20,20,8 - xor 21,21,9 - xor 22,22,10 - xor 23,23,11 - rotrwi 8,8,8 - rotrwi 9,9,8 - xor 8,8,16 - rotrwi 10,10,8 - xor 9,9,17 - rotrwi 11,11,8 - xor 10,10,18 - xor 11,11,19 - xor 16,16,24 - xor 17,17,25 - xor 18,18,26 - xor 19,19,27 - xor 8,8,20 - rotrwi 16,16,24 - xor 9,9,21 - rotrwi 17,17,24 - xor 10,10,22 - rotrwi 18,18,24 - xor 11,11,23 - rotrwi 19,19,24 - xor 20,20,24 - xor 21,21,25 - xor 22,22,26 - xor 23,23,27 - xor 8,8,24 - rotrwi 20,20,16 - xor 9,9,25 - rotrwi 21,21,16 - xor 10,10,26 - rotrwi 22,22,16 - xor 11,11,27 - rotrwi 23,23,16 - xor 8,8,16 - rotrwi 24,24,8 - xor 9,9,17 - rotrwi 25,25,8 - xor 10,10,18 - rotrwi 26,26,8 - xor 11,11,19 - rotrwi 27,27,8 - xor 8,8,20 - xor 9,9,21 - xor 10,10,22 - xor 11,11,23 - xor 8,8,24 - xor 9,9,25 - xor 10,10,26 - xor 11,11,27 - - b .Ldec_compact_loop -.align 4 -.Ldec_compact_done: - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size AES_decrypt,.-AES_decrypt - -.byte 65,69,83,32,102,111,114,32,80,80,67,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 7 diff --git a/sys/crypto/openssl/powerpc/aesp8-ppc.S b/sys/crypto/openssl/powerpc/aesp8-ppc.S deleted file mode 100644 index 21067ff2521..00000000000 --- a/sys/crypto/openssl/powerpc/aesp8-ppc.S +++ /dev/null @@ -1,3642 +0,0 @@ -/* Do not modify. This file is auto-generated from aesp8-ppc.pl. */ -.machine "any" - -.text - -.align 7 -rcon: -.byte 0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00 -.byte 0x1b,0x00,0x00,0x00,0x1b,0x00,0x00,0x00,0x1b,0x00,0x00,0x00,0x1b,0x00,0x00,0x00 -.byte 0x0d,0x0e,0x0f,0x0c,0x0d,0x0e,0x0f,0x0c,0x0d,0x0e,0x0f,0x0c,0x0d,0x0e,0x0f,0x0c -.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 -.Lconsts: - mflr 0 - bcl 20,31,$+4 - mflr 6 - addi 6,6,-0x48 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.byte 65,69,83,32,102,111,114,32,80,111,119,101,114,73,83,65,32,50,46,48,55,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 - -.globl aes_p8_set_encrypt_key -.type aes_p8_set_encrypt_key,@function -.align 5 -aes_p8_set_encrypt_key: -.Lset_encrypt_key: - mflr 11 - stw 11,4(1) - - li 6,-1 - cmplwi 3,0 - beq- .Lenc_key_abort - cmplwi 5,0 - beq- .Lenc_key_abort - li 6,-2 - cmpwi 4,128 - blt- .Lenc_key_abort - cmpwi 4,256 - bgt- .Lenc_key_abort - andi. 0,4,0x3f - bne- .Lenc_key_abort - - lis 0,0xfff0 - mfspr 12,256 - mtspr 256,0 - - bl .Lconsts - mtlr 11 - - neg 9,3 - lvx 1,0,3 - addi 3,3,15 - lvsr 3,0,9 - li 8,0x20 - cmpwi 4,192 - lvx 2,0,3 - - lvx 4,0,6 - - lvx 5,8,6 - addi 6,6,0x10 - vperm 1,1,2,3 - li 7,8 - vxor 0,0,0 - mtctr 7 - - lvsr 8,0,5 - vspltisb 9,-1 - lvx 10,0,5 - vperm 9,0,9,8 - - blt .Loop128 - addi 3,3,8 - beq .L192 - addi 3,3,8 - b .L256 - -.align 4 -.Loop128: - vperm 3,1,1,5 - vsldoi 6,0,1,12 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - .long 0x10632509 - stvx 7,0,5 - addi 5,5,16 - - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vadduwm 4,4,4 - vxor 1,1,3 - bdnz .Loop128 - - lvx 4,0,6 - - vperm 3,1,1,5 - vsldoi 6,0,1,12 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - .long 0x10632509 - stvx 7,0,5 - addi 5,5,16 - - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vadduwm 4,4,4 - vxor 1,1,3 - - vperm 3,1,1,5 - vsldoi 6,0,1,12 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - .long 0x10632509 - stvx 7,0,5 - addi 5,5,16 - - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vxor 1,1,3 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - stvx 7,0,5 - - addi 3,5,15 - addi 5,5,0x50 - - li 8,10 - b .Ldone - -.align 4 -.L192: - lvx 6,0,3 - li 7,4 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - stvx 7,0,5 - addi 5,5,16 - vperm 2,2,6,3 - vspltisb 3,8 - mtctr 7 - vsububm 5,5,3 - -.Loop192: - vperm 3,2,2,5 - vsldoi 6,0,1,12 - .long 0x10632509 - - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - - vsldoi 7,0,2,8 - vspltw 6,1,3 - vxor 6,6,2 - vsldoi 2,0,2,12 - vadduwm 4,4,4 - vxor 2,2,6 - vxor 1,1,3 - vxor 2,2,3 - vsldoi 7,7,1,8 - - vperm 3,2,2,5 - vsldoi 6,0,1,12 - vperm 11,7,7,8 - vsel 7,10,11,9 - vor 10,11,11 - .long 0x10632509 - stvx 7,0,5 - addi 5,5,16 - - vsldoi 7,1,2,8 - vxor 1,1,6 - vsldoi 6,0,6,12 - vperm 11,7,7,8 - vsel 7,10,11,9 - vor 10,11,11 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - stvx 7,0,5 - addi 5,5,16 - - vspltw 6,1,3 - vxor 6,6,2 - vsldoi 2,0,2,12 - vadduwm 4,4,4 - vxor 2,2,6 - vxor 1,1,3 - vxor 2,2,3 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - stvx 7,0,5 - addi 3,5,15 - addi 5,5,16 - bdnz .Loop192 - - li 8,12 - addi 5,5,0x20 - b .Ldone - -.align 4 -.L256: - lvx 6,0,3 - li 7,7 - li 8,14 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - stvx 7,0,5 - addi 5,5,16 - vperm 2,2,6,3 - mtctr 7 - -.Loop256: - vperm 3,2,2,5 - vsldoi 6,0,1,12 - vperm 11,2,2,8 - vsel 7,10,11,9 - vor 10,11,11 - .long 0x10632509 - stvx 7,0,5 - addi 5,5,16 - - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vadduwm 4,4,4 - vxor 1,1,3 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - stvx 7,0,5 - addi 3,5,15 - addi 5,5,16 - bdz .Ldone - - vspltw 3,1,3 - vsldoi 6,0,2,12 - .long 0x106305C8 - - vxor 2,2,6 - vsldoi 6,0,6,12 - vxor 2,2,6 - vsldoi 6,0,6,12 - vxor 2,2,6 - - vxor 2,2,3 - b .Loop256 - -.align 4 -.Ldone: - lvx 2,0,3 - vsel 2,10,2,9 - stvx 2,0,3 - li 6,0 - mtspr 256,12 - stw 8,0(5) - -.Lenc_key_abort: - mr 3,6 - blr -.long 0 -.byte 0,12,0x14,1,0,0,3,0 -.long 0 -.size aes_p8_set_encrypt_key,.-aes_p8_set_encrypt_key - -.globl aes_p8_set_decrypt_key -.type aes_p8_set_decrypt_key,@function -.align 5 -aes_p8_set_decrypt_key: - stwu 1,-32(1) - mflr 10 - stw 10,32+4(1) - bl .Lset_encrypt_key - mtlr 10 - - cmpwi 3,0 - bne- .Ldec_key_abort - - slwi 7,8,4 - subi 3,5,240 - srwi 8,8,1 - add 5,3,7 - mtctr 8 - -.Ldeckey: - lwz 0, 0(3) - lwz 6, 4(3) - lwz 7, 8(3) - lwz 8, 12(3) - addi 3,3,16 - lwz 9, 0(5) - lwz 10,4(5) - lwz 11,8(5) - lwz 12,12(5) - stw 0, 0(5) - stw 6, 4(5) - stw 7, 8(5) - stw 8, 12(5) - subi 5,5,16 - stw 9, -16(3) - stw 10,-12(3) - stw 11,-8(3) - stw 12,-4(3) - bdnz .Ldeckey - - xor 3,3,3 -.Ldec_key_abort: - addi 1,1,32 - blr -.long 0 -.byte 0,12,4,1,0x80,0,3,0 -.long 0 -.size aes_p8_set_decrypt_key,.-aes_p8_set_decrypt_key -.globl aes_p8_encrypt -.type aes_p8_encrypt,@function -.align 5 -aes_p8_encrypt: - lwz 6,240(5) - lis 0,0xfc00 - mfspr 12,256 - li 7,15 - mtspr 256,0 - - lvx 0,0,3 - neg 11,4 - lvx 1,7,3 - lvsl 2,0,3 - - lvsl 3,0,11 - - li 7,16 - vperm 0,0,1,2 - lvx 1,0,5 - lvsl 5,0,5 - srwi 6,6,1 - lvx 2,7,5 - addi 7,7,16 - subi 6,6,1 - vperm 1,1,2,5 - - vxor 0,0,1 - lvx 1,7,5 - addi 7,7,16 - mtctr 6 - -.Loop_enc: - vperm 2,2,1,5 - .long 0x10001508 - lvx 2,7,5 - addi 7,7,16 - vperm 1,1,2,5 - .long 0x10000D08 - lvx 1,7,5 - addi 7,7,16 - bdnz .Loop_enc - - vperm 2,2,1,5 - .long 0x10001508 - lvx 2,7,5 - vperm 1,1,2,5 - .long 0x10000D09 - - vspltisb 2,-1 - vxor 1,1,1 - li 7,15 - vperm 2,1,2,3 - - lvx 1,0,4 - vperm 0,0,0,3 - vsel 1,1,0,2 - lvx 4,7,4 - stvx 1,0,4 - vsel 0,0,4,2 - stvx 0,7,4 - - mtspr 256,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size aes_p8_encrypt,.-aes_p8_encrypt -.globl aes_p8_decrypt -.type aes_p8_decrypt,@function -.align 5 -aes_p8_decrypt: - lwz 6,240(5) - lis 0,0xfc00 - mfspr 12,256 - li 7,15 - mtspr 256,0 - - lvx 0,0,3 - neg 11,4 - lvx 1,7,3 - lvsl 2,0,3 - - lvsl 3,0,11 - - li 7,16 - vperm 0,0,1,2 - lvx 1,0,5 - lvsl 5,0,5 - srwi 6,6,1 - lvx 2,7,5 - addi 7,7,16 - subi 6,6,1 - vperm 1,1,2,5 - - vxor 0,0,1 - lvx 1,7,5 - addi 7,7,16 - mtctr 6 - -.Loop_dec: - vperm 2,2,1,5 - .long 0x10001548 - lvx 2,7,5 - addi 7,7,16 - vperm 1,1,2,5 - .long 0x10000D48 - lvx 1,7,5 - addi 7,7,16 - bdnz .Loop_dec - - vperm 2,2,1,5 - .long 0x10001548 - lvx 2,7,5 - vperm 1,1,2,5 - .long 0x10000D49 - - vspltisb 2,-1 - vxor 1,1,1 - li 7,15 - vperm 2,1,2,3 - - lvx 1,0,4 - vperm 0,0,0,3 - vsel 1,1,0,2 - lvx 4,7,4 - stvx 1,0,4 - vsel 0,0,4,2 - stvx 0,7,4 - - mtspr 256,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size aes_p8_decrypt,.-aes_p8_decrypt -.globl aes_p8_cbc_encrypt -.type aes_p8_cbc_encrypt,@function -.align 5 -aes_p8_cbc_encrypt: - cmplwi 5,16 - .long 0x4dc00020 - - cmpwi 8,0 - lis 0,0xffe0 - mfspr 12,256 - mtspr 256,0 - - li 10,15 - vxor 0,0,0 - - - lvx 4,0,7 - lvsl 6,0,7 - lvx 5,10,7 - - vperm 4,4,5,6 - - neg 11,3 - lvsl 10,0,6 - lwz 9,240(6) - - lvsr 6,0,11 - lvx 5,0,3 - addi 3,3,15 - - - lvsr 8,0,4 - vspltisb 9,-1 - lvx 7,0,4 - vperm 9,0,9,8 - - - srwi 9,9,1 - li 10,16 - subi 9,9,1 - beq .Lcbc_dec - -.Lcbc_enc: - vor 2,5,5 - lvx 5,0,3 - addi 3,3,16 - mtctr 9 - subi 5,5,16 - - lvx 0,0,6 - vperm 2,2,5,6 - lvx 1,10,6 - addi 10,10,16 - vperm 0,0,1,10 - vxor 2,2,0 - lvx 0,10,6 - addi 10,10,16 - vxor 2,2,4 - -.Loop_cbc_enc: - vperm 1,1,0,10 - .long 0x10420D08 - lvx 1,10,6 - addi 10,10,16 - vperm 0,0,1,10 - .long 0x10420508 - lvx 0,10,6 - addi 10,10,16 - bdnz .Loop_cbc_enc - - vperm 1,1,0,10 - .long 0x10420D08 - lvx 1,10,6 - li 10,16 - vperm 0,0,1,10 - .long 0x10820509 - cmplwi 5,16 - - vperm 3,4,4,8 - vsel 2,7,3,9 - vor 7,3,3 - stvx 2,0,4 - addi 4,4,16 - bge .Lcbc_enc - - b .Lcbc_done - -.align 4 -.Lcbc_dec: - cmplwi 5,128 - bge _aesp8_cbc_decrypt8x - vor 3,5,5 - lvx 5,0,3 - addi 3,3,16 - mtctr 9 - subi 5,5,16 - - lvx 0,0,6 - vperm 3,3,5,6 - lvx 1,10,6 - addi 10,10,16 - vperm 0,0,1,10 - vxor 2,3,0 - lvx 0,10,6 - addi 10,10,16 - -.Loop_cbc_dec: - vperm 1,1,0,10 - .long 0x10420D48 - lvx 1,10,6 - addi 10,10,16 - vperm 0,0,1,10 - .long 0x10420548 - lvx 0,10,6 - addi 10,10,16 - bdnz .Loop_cbc_dec - - vperm 1,1,0,10 - .long 0x10420D48 - lvx 1,10,6 - li 10,16 - vperm 0,0,1,10 - .long 0x10420549 - cmplwi 5,16 - - vxor 2,2,4 - vor 4,3,3 - vperm 3,2,2,8 - vsel 2,7,3,9 - vor 7,3,3 - stvx 2,0,4 - addi 4,4,16 - bge .Lcbc_dec - -.Lcbc_done: - addi 4,4,-1 - lvx 2,0,4 - vsel 2,7,2,9 - stvx 2,0,4 - - neg 8,7 - li 10,15 - vxor 0,0,0 - vspltisb 9,-1 - - lvsl 8,0,8 - vperm 9,0,9,8 - - lvx 7,0,7 - vperm 4,4,4,8 - vsel 2,7,4,9 - lvx 5,10,7 - stvx 2,0,7 - vsel 2,4,5,9 - stvx 2,10,7 - - mtspr 256,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,6,0 -.long 0 -.align 5 -_aesp8_cbc_decrypt8x: - stwu 1,-392(1) - li 10,175 - li 11,191 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - li 0,-1 - stw 12,364(1) - li 8,0x10 - stw 26,368(1) - li 26,0x20 - stw 27,372(1) - li 27,0x30 - stw 28,376(1) - li 28,0x40 - stw 29,380(1) - li 29,0x50 - stw 30,384(1) - li 30,0x60 - stw 31,388(1) - li 31,0x70 - mtspr 256,0 - - subi 9,9,3 - subi 5,5,128 - - lvx 23,0,6 - lvx 30,8,6 - addi 6,6,0x20 - lvx 31,0,6 - vperm 23,23,30,10 - addi 11,1,32+15 - mtctr 9 - -.Load_cbc_dec_key: - vperm 24,30,31,10 - lvx 30,8,6 - addi 6,6,0x20 - stvx 24,0,11 - vperm 25,31,30,10 - lvx 31,0,6 - stvx 25,8,11 - addi 11,11,0x20 - bdnz .Load_cbc_dec_key - - lvx 26,8,6 - vperm 24,30,31,10 - lvx 27,26,6 - stvx 24,0,11 - vperm 25,31,26,10 - lvx 28,27,6 - stvx 25,8,11 - addi 11,1,32+15 - vperm 26,26,27,10 - lvx 29,28,6 - vperm 27,27,28,10 - lvx 30,29,6 - vperm 28,28,29,10 - lvx 31,30,6 - vperm 29,29,30,10 - lvx 14,31,6 - vperm 30,30,31,10 - lvx 24,0,11 - vperm 31,31,14,10 - lvx 25,8,11 - - - - subi 3,3,15 - - - .long 0x7C001E99 - - - .long 0x7C281E99 - - .long 0x7C5A1E99 - - .long 0x7C7B1E99 - - .long 0x7D5C1E99 - - vxor 14,0,23 - .long 0x7D7D1E99 - - vxor 15,1,23 - .long 0x7D9E1E99 - - vxor 16,2,23 - .long 0x7DBF1E99 - addi 3,3,0x80 - - vxor 17,3,23 - - vxor 18,10,23 - - vxor 19,11,23 - vxor 20,12,23 - vxor 21,13,23 - - mtctr 9 - b .Loop_cbc_dec8x -.align 5 -.Loop_cbc_dec8x: - .long 0x11CEC548 - .long 0x11EFC548 - .long 0x1210C548 - .long 0x1231C548 - .long 0x1252C548 - .long 0x1273C548 - .long 0x1294C548 - .long 0x12B5C548 - lvx 24,26,11 - addi 11,11,0x20 - - .long 0x11CECD48 - .long 0x11EFCD48 - .long 0x1210CD48 - .long 0x1231CD48 - .long 0x1252CD48 - .long 0x1273CD48 - .long 0x1294CD48 - .long 0x12B5CD48 - lvx 25,8,11 - bdnz .Loop_cbc_dec8x - - subic 5,5,128 - .long 0x11CEC548 - .long 0x11EFC548 - .long 0x1210C548 - .long 0x1231C548 - .long 0x1252C548 - .long 0x1273C548 - .long 0x1294C548 - .long 0x12B5C548 - - subfe. 0,0,0 - .long 0x11CECD48 - .long 0x11EFCD48 - .long 0x1210CD48 - .long 0x1231CD48 - .long 0x1252CD48 - .long 0x1273CD48 - .long 0x1294CD48 - .long 0x12B5CD48 - - and 0,0,5 - .long 0x11CED548 - .long 0x11EFD548 - .long 0x1210D548 - .long 0x1231D548 - .long 0x1252D548 - .long 0x1273D548 - .long 0x1294D548 - .long 0x12B5D548 - - add 3,3,0 - - - - .long 0x11CEDD48 - .long 0x11EFDD48 - .long 0x1210DD48 - .long 0x1231DD48 - .long 0x1252DD48 - .long 0x1273DD48 - .long 0x1294DD48 - .long 0x12B5DD48 - - addi 11,1,32+15 - .long 0x11CEE548 - .long 0x11EFE548 - .long 0x1210E548 - .long 0x1231E548 - .long 0x1252E548 - .long 0x1273E548 - .long 0x1294E548 - .long 0x12B5E548 - lvx 24,0,11 - - .long 0x11CEED48 - .long 0x11EFED48 - .long 0x1210ED48 - .long 0x1231ED48 - .long 0x1252ED48 - .long 0x1273ED48 - .long 0x1294ED48 - .long 0x12B5ED48 - lvx 25,8,11 - - .long 0x11CEF548 - vxor 4,4,31 - .long 0x11EFF548 - vxor 0,0,31 - .long 0x1210F548 - vxor 1,1,31 - .long 0x1231F548 - vxor 2,2,31 - .long 0x1252F548 - vxor 3,3,31 - .long 0x1273F548 - vxor 10,10,31 - .long 0x1294F548 - vxor 11,11,31 - .long 0x12B5F548 - vxor 12,12,31 - - .long 0x11CE2549 - .long 0x11EF0549 - .long 0x7C001E99 - .long 0x12100D49 - .long 0x7C281E99 - .long 0x12311549 - - .long 0x7C5A1E99 - .long 0x12521D49 - - .long 0x7C7B1E99 - .long 0x12735549 - - .long 0x7D5C1E99 - .long 0x12945D49 - - .long 0x7D7D1E99 - .long 0x12B56549 - - .long 0x7D9E1E99 - vor 4,13,13 - - .long 0x7DBF1E99 - addi 3,3,0x80 - - - - .long 0x7DC02799 - - vxor 14,0,23 - - .long 0x7DE82799 - - vxor 15,1,23 - - .long 0x7E1A2799 - vxor 16,2,23 - - .long 0x7E3B2799 - vxor 17,3,23 - - .long 0x7E5C2799 - vxor 18,10,23 - - .long 0x7E7D2799 - vxor 19,11,23 - - .long 0x7E9E2799 - vxor 20,12,23 - .long 0x7EBF2799 - addi 4,4,0x80 - vxor 21,13,23 - - mtctr 9 - beq .Loop_cbc_dec8x - - addic. 5,5,128 - beq .Lcbc_dec8x_done - nop - nop - -.Loop_cbc_dec8x_tail: - .long 0x11EFC548 - .long 0x1210C548 - .long 0x1231C548 - .long 0x1252C548 - .long 0x1273C548 - .long 0x1294C548 - .long 0x12B5C548 - lvx 24,26,11 - addi 11,11,0x20 - - .long 0x11EFCD48 - .long 0x1210CD48 - .long 0x1231CD48 - .long 0x1252CD48 - .long 0x1273CD48 - .long 0x1294CD48 - .long 0x12B5CD48 - lvx 25,8,11 - bdnz .Loop_cbc_dec8x_tail - - .long 0x11EFC548 - .long 0x1210C548 - .long 0x1231C548 - .long 0x1252C548 - .long 0x1273C548 - .long 0x1294C548 - .long 0x12B5C548 - - .long 0x11EFCD48 - .long 0x1210CD48 - .long 0x1231CD48 - .long 0x1252CD48 - .long 0x1273CD48 - .long 0x1294CD48 - .long 0x12B5CD48 - - .long 0x11EFD548 - .long 0x1210D548 - .long 0x1231D548 - .long 0x1252D548 - .long 0x1273D548 - .long 0x1294D548 - .long 0x12B5D548 - - .long 0x11EFDD48 - .long 0x1210DD48 - .long 0x1231DD48 - .long 0x1252DD48 - .long 0x1273DD48 - .long 0x1294DD48 - .long 0x12B5DD48 - - .long 0x11EFE548 - .long 0x1210E548 - .long 0x1231E548 - .long 0x1252E548 - .long 0x1273E548 - .long 0x1294E548 - .long 0x12B5E548 - - .long 0x11EFED48 - .long 0x1210ED48 - .long 0x1231ED48 - .long 0x1252ED48 - .long 0x1273ED48 - .long 0x1294ED48 - .long 0x12B5ED48 - - .long 0x11EFF548 - vxor 4,4,31 - .long 0x1210F548 - vxor 1,1,31 - .long 0x1231F548 - vxor 2,2,31 - .long 0x1252F548 - vxor 3,3,31 - .long 0x1273F548 - vxor 10,10,31 - .long 0x1294F548 - vxor 11,11,31 - .long 0x12B5F548 - vxor 12,12,31 - - cmplwi 5,32 - blt .Lcbc_dec8x_one - nop - beq .Lcbc_dec8x_two - cmplwi 5,64 - blt .Lcbc_dec8x_three - nop - beq .Lcbc_dec8x_four - cmplwi 5,96 - blt .Lcbc_dec8x_five - nop - beq .Lcbc_dec8x_six - -.Lcbc_dec8x_seven: - .long 0x11EF2549 - .long 0x12100D49 - .long 0x12311549 - .long 0x12521D49 - .long 0x12735549 - .long 0x12945D49 - .long 0x12B56549 - vor 4,13,13 - - - - .long 0x7DE02799 - - .long 0x7E082799 - - .long 0x7E3A2799 - - .long 0x7E5B2799 - - .long 0x7E7C2799 - - .long 0x7E9D2799 - .long 0x7EBE2799 - addi 4,4,0x70 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_six: - .long 0x12102549 - .long 0x12311549 - .long 0x12521D49 - .long 0x12735549 - .long 0x12945D49 - .long 0x12B56549 - vor 4,13,13 - - - - .long 0x7E002799 - - .long 0x7E282799 - - .long 0x7E5A2799 - - .long 0x7E7B2799 - - .long 0x7E9C2799 - .long 0x7EBD2799 - addi 4,4,0x60 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_five: - .long 0x12312549 - .long 0x12521D49 - .long 0x12735549 - .long 0x12945D49 - .long 0x12B56549 - vor 4,13,13 - - - - .long 0x7E202799 - - .long 0x7E482799 - - .long 0x7E7A2799 - - .long 0x7E9B2799 - .long 0x7EBC2799 - addi 4,4,0x50 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_four: - .long 0x12522549 - .long 0x12735549 - .long 0x12945D49 - .long 0x12B56549 - vor 4,13,13 - - - - .long 0x7E402799 - - .long 0x7E682799 - - .long 0x7E9A2799 - .long 0x7EBB2799 - addi 4,4,0x40 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_three: - .long 0x12732549 - .long 0x12945D49 - .long 0x12B56549 - vor 4,13,13 - - - - .long 0x7E602799 - - .long 0x7E882799 - .long 0x7EBA2799 - addi 4,4,0x30 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_two: - .long 0x12942549 - .long 0x12B56549 - vor 4,13,13 - - - - .long 0x7E802799 - .long 0x7EA82799 - addi 4,4,0x20 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_one: - .long 0x12B52549 - vor 4,13,13 - - - .long 0x7EA02799 - addi 4,4,0x10 - -.Lcbc_dec8x_done: - - .long 0x7C803F99 - - li 10,47 - li 11,63 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - - mtspr 256,12 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - lwz 26,368(1) - lwz 27,372(1) - lwz 28,376(1) - lwz 29,380(1) - lwz 30,384(1) - lwz 31,388(1) - addi 1,1,392 - blr -.long 0 -.byte 0,12,0x04,0,0x80,6,6,0 -.long 0 -.size aes_p8_cbc_encrypt,.-aes_p8_cbc_encrypt -.globl aes_p8_ctr32_encrypt_blocks -.type aes_p8_ctr32_encrypt_blocks,@function -.align 5 -aes_p8_ctr32_encrypt_blocks: - cmplwi 5,1 - .long 0x4dc00020 - - lis 0,0xfff0 - mfspr 12,256 - mtspr 256,0 - - li 10,15 - vxor 0,0,0 - - - lvx 4,0,7 - lvsl 6,0,7 - lvx 5,10,7 - vspltisb 11,1 - - vperm 4,4,5,6 - vsldoi 11,0,11,1 - - neg 11,3 - lvsl 10,0,6 - lwz 9,240(6) - - lvsr 6,0,11 - lvx 5,0,3 - addi 3,3,15 - - - srwi 9,9,1 - li 10,16 - subi 9,9,1 - - cmplwi 5,8 - bge _aesp8_ctr32_encrypt8x - - lvsr 8,0,4 - vspltisb 9,-1 - lvx 7,0,4 - vperm 9,0,9,8 - - - lvx 0,0,6 - mtctr 9 - lvx 1,10,6 - addi 10,10,16 - vperm 0,0,1,10 - vxor 2,4,0 - lvx 0,10,6 - addi 10,10,16 - b .Loop_ctr32_enc - -.align 5 -.Loop_ctr32_enc: - vperm 1,1,0,10 - .long 0x10420D08 - lvx 1,10,6 - addi 10,10,16 - vperm 0,0,1,10 - .long 0x10420508 - lvx 0,10,6 - addi 10,10,16 - bdnz .Loop_ctr32_enc - - vadduwm 4,4,11 - vor 3,5,5 - lvx 5,0,3 - addi 3,3,16 - subic. 5,5,1 - - vperm 1,1,0,10 - .long 0x10420D08 - lvx 1,10,6 - vperm 3,3,5,6 - li 10,16 - vperm 1,0,1,10 - lvx 0,0,6 - vxor 3,3,1 - .long 0x10421D09 - - lvx 1,10,6 - addi 10,10,16 - vperm 2,2,2,8 - vsel 3,7,2,9 - mtctr 9 - vperm 0,0,1,10 - vor 7,2,2 - vxor 2,4,0 - lvx 0,10,6 - addi 10,10,16 - stvx 3,0,4 - addi 4,4,16 - bne .Loop_ctr32_enc - - addi 4,4,-1 - lvx 2,0,4 - vsel 2,7,2,9 - stvx 2,0,4 - - mtspr 256,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,6,0 -.long 0 -.align 5 -_aesp8_ctr32_encrypt8x: - stwu 1,-392(1) - li 10,175 - li 11,191 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - li 0,-1 - stw 12,364(1) - li 8,0x10 - stw 26,368(1) - li 26,0x20 - stw 27,372(1) - li 27,0x30 - stw 28,376(1) - li 28,0x40 - stw 29,380(1) - li 29,0x50 - stw 30,384(1) - li 30,0x60 - stw 31,388(1) - li 31,0x70 - mtspr 256,0 - - subi 9,9,3 - - lvx 23,0,6 - lvx 30,8,6 - addi 6,6,0x20 - lvx 31,0,6 - vperm 23,23,30,10 - addi 11,1,32+15 - mtctr 9 - -.Load_ctr32_enc_key: - vperm 24,30,31,10 - lvx 30,8,6 - addi 6,6,0x20 - stvx 24,0,11 - vperm 25,31,30,10 - lvx 31,0,6 - stvx 25,8,11 - addi 11,11,0x20 - bdnz .Load_ctr32_enc_key - - lvx 26,8,6 - vperm 24,30,31,10 - lvx 27,26,6 - stvx 24,0,11 - vperm 25,31,26,10 - lvx 28,27,6 - stvx 25,8,11 - addi 11,1,32+15 - vperm 26,26,27,10 - lvx 29,28,6 - vperm 27,27,28,10 - lvx 30,29,6 - vperm 28,28,29,10 - lvx 31,30,6 - vperm 29,29,30,10 - lvx 15,31,6 - vperm 30,30,31,10 - lvx 24,0,11 - vperm 31,31,15,10 - lvx 25,8,11 - - vadduwm 7,11,11 - subi 3,3,15 - slwi 5,5,4 - - vadduwm 16,4,11 - vadduwm 17,4,7 - vxor 15,4,23 - - vadduwm 18,16,7 - vxor 16,16,23 - - vadduwm 19,17,7 - vxor 17,17,23 - - vadduwm 20,18,7 - vxor 18,18,23 - - vadduwm 21,19,7 - vxor 19,19,23 - vadduwm 22,20,7 - vxor 20,20,23 - vadduwm 4,21,7 - vxor 21,21,23 - vxor 22,22,23 - - mtctr 9 - b .Loop_ctr32_enc8x -.align 5 -.Loop_ctr32_enc8x: - .long 0x11EFC508 - .long 0x1210C508 - .long 0x1231C508 - .long 0x1252C508 - .long 0x1273C508 - .long 0x1294C508 - .long 0x12B5C508 - .long 0x12D6C508 -.Loop_ctr32_enc8x_middle: - lvx 24,26,11 - addi 11,11,0x20 - - .long 0x11EFCD08 - .long 0x1210CD08 - .long 0x1231CD08 - .long 0x1252CD08 - .long 0x1273CD08 - .long 0x1294CD08 - .long 0x12B5CD08 - .long 0x12D6CD08 - lvx 25,8,11 - bdnz .Loop_ctr32_enc8x - - subic 11,5,256 - .long 0x11EFC508 - .long 0x1210C508 - .long 0x1231C508 - .long 0x1252C508 - .long 0x1273C508 - .long 0x1294C508 - .long 0x12B5C508 - .long 0x12D6C508 - - subfe 0,0,0 - .long 0x11EFCD08 - .long 0x1210CD08 - .long 0x1231CD08 - .long 0x1252CD08 - .long 0x1273CD08 - .long 0x1294CD08 - .long 0x12B5CD08 - .long 0x12D6CD08 - - and 0,0,11 - addi 11,1,32+15 - .long 0x11EFD508 - .long 0x1210D508 - .long 0x1231D508 - .long 0x1252D508 - .long 0x1273D508 - .long 0x1294D508 - .long 0x12B5D508 - .long 0x12D6D508 - lvx 24,0,11 - - subic 5,5,129 - .long 0x11EFDD08 - addi 5,5,1 - .long 0x1210DD08 - .long 0x1231DD08 - .long 0x1252DD08 - .long 0x1273DD08 - .long 0x1294DD08 - .long 0x12B5DD08 - .long 0x12D6DD08 - lvx 25,8,11 - - .long 0x11EFE508 - .long 0x7C001E99 - .long 0x1210E508 - .long 0x7C281E99 - .long 0x1231E508 - .long 0x7C5A1E99 - .long 0x1252E508 - .long 0x7C7B1E99 - .long 0x1273E508 - .long 0x7D5C1E99 - .long 0x1294E508 - .long 0x7D9D1E99 - .long 0x12B5E508 - .long 0x7DBE1E99 - .long 0x12D6E508 - .long 0x7DDF1E99 - addi 3,3,0x80 - - .long 0x11EFED08 - - .long 0x1210ED08 - - .long 0x1231ED08 - - .long 0x1252ED08 - - .long 0x1273ED08 - - .long 0x1294ED08 - - .long 0x12B5ED08 - - .long 0x12D6ED08 - - - add 3,3,0 - - - - subfe. 0,0,0 - .long 0x11EFF508 - vxor 0,0,31 - .long 0x1210F508 - vxor 1,1,31 - .long 0x1231F508 - vxor 2,2,31 - .long 0x1252F508 - vxor 3,3,31 - .long 0x1273F508 - vxor 10,10,31 - .long 0x1294F508 - vxor 12,12,31 - .long 0x12B5F508 - vxor 13,13,31 - .long 0x12D6F508 - vxor 14,14,31 - - bne .Lctr32_enc8x_break - - .long 0x100F0509 - .long 0x10300D09 - vadduwm 16,4,11 - .long 0x10511509 - vadduwm 17,4,7 - vxor 15,4,23 - .long 0x10721D09 - vadduwm 18,16,7 - vxor 16,16,23 - .long 0x11535509 - vadduwm 19,17,7 - vxor 17,17,23 - .long 0x11946509 - vadduwm 20,18,7 - vxor 18,18,23 - .long 0x11B56D09 - vadduwm 21,19,7 - vxor 19,19,23 - .long 0x11D67509 - vadduwm 22,20,7 - vxor 20,20,23 - - vadduwm 4,21,7 - vxor 21,21,23 - - vxor 22,22,23 - mtctr 9 - - .long 0x11EFC508 - .long 0x7C002799 - - .long 0x1210C508 - .long 0x7C282799 - - .long 0x1231C508 - .long 0x7C5A2799 - - .long 0x1252C508 - .long 0x7C7B2799 - - .long 0x1273C508 - .long 0x7D5C2799 - - .long 0x1294C508 - .long 0x7D9D2799 - - .long 0x12B5C508 - .long 0x7DBE2799 - .long 0x12D6C508 - .long 0x7DDF2799 - addi 4,4,0x80 - - b .Loop_ctr32_enc8x_middle - -.align 5 -.Lctr32_enc8x_break: - cmpwi 5,-0x60 - blt .Lctr32_enc8x_one - nop - beq .Lctr32_enc8x_two - cmpwi 5,-0x40 - blt .Lctr32_enc8x_three - nop - beq .Lctr32_enc8x_four - cmpwi 5,-0x20 - blt .Lctr32_enc8x_five - nop - beq .Lctr32_enc8x_six - cmpwi 5,0x00 - blt .Lctr32_enc8x_seven - -.Lctr32_enc8x_eight: - .long 0x11EF0509 - .long 0x12100D09 - .long 0x12311509 - .long 0x12521D09 - .long 0x12735509 - .long 0x12946509 - .long 0x12B56D09 - .long 0x12D67509 - - - - .long 0x7DE02799 - - .long 0x7E082799 - - .long 0x7E3A2799 - - .long 0x7E5B2799 - - .long 0x7E7C2799 - - .long 0x7E9D2799 - - .long 0x7EBE2799 - .long 0x7EDF2799 - addi 4,4,0x80 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_seven: - .long 0x11EF0D09 - .long 0x12101509 - .long 0x12311D09 - .long 0x12525509 - .long 0x12736509 - .long 0x12946D09 - .long 0x12B57509 - - - - .long 0x7DE02799 - - .long 0x7E082799 - - .long 0x7E3A2799 - - .long 0x7E5B2799 - - .long 0x7E7C2799 - - .long 0x7E9D2799 - .long 0x7EBE2799 - addi 4,4,0x70 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_six: - .long 0x11EF1509 - .long 0x12101D09 - .long 0x12315509 - .long 0x12526509 - .long 0x12736D09 - .long 0x12947509 - - - - .long 0x7DE02799 - - .long 0x7E082799 - - .long 0x7E3A2799 - - .long 0x7E5B2799 - - .long 0x7E7C2799 - .long 0x7E9D2799 - addi 4,4,0x60 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_five: - .long 0x11EF1D09 - .long 0x12105509 - .long 0x12316509 - .long 0x12526D09 - .long 0x12737509 - - - - .long 0x7DE02799 - - .long 0x7E082799 - - .long 0x7E3A2799 - - .long 0x7E5B2799 - .long 0x7E7C2799 - addi 4,4,0x50 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_four: - .long 0x11EF5509 - .long 0x12106509 - .long 0x12316D09 - .long 0x12527509 - - - - .long 0x7DE02799 - - .long 0x7E082799 - - .long 0x7E3A2799 - .long 0x7E5B2799 - addi 4,4,0x40 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_three: - .long 0x11EF6509 - .long 0x12106D09 - .long 0x12317509 - - - - .long 0x7DE02799 - - .long 0x7E082799 - .long 0x7E3A2799 - addi 4,4,0x30 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_two: - .long 0x11EF6D09 - .long 0x12107509 - - - - .long 0x7DE02799 - .long 0x7E082799 - addi 4,4,0x20 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_one: - .long 0x11EF7509 - - - .long 0x7DE02799 - addi 4,4,0x10 - -.Lctr32_enc8x_done: - li 10,47 - li 11,63 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - - mtspr 256,12 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - lwz 26,368(1) - lwz 27,372(1) - lwz 28,376(1) - lwz 29,380(1) - lwz 30,384(1) - lwz 31,388(1) - addi 1,1,392 - blr -.long 0 -.byte 0,12,0x04,0,0x80,6,6,0 -.long 0 -.size aes_p8_ctr32_encrypt_blocks,.-aes_p8_ctr32_encrypt_blocks -.globl aes_p8_xts_encrypt -.type aes_p8_xts_encrypt,@function -.align 5 -aes_p8_xts_encrypt: - mr 10,3 - li 3,-1 - cmplwi 5,16 - .long 0x4dc00020 - - lis 0,0xfff0 - mfspr 12,256 - li 11,0 - mtspr 256,0 - - vspltisb 9,0x07 - - - - - li 3,15 - lvx 8,0,8 - lvsl 5,0,8 - lvx 4,3,8 - - vperm 8,8,4,5 - - neg 11,10 - lvsr 5,0,11 - lvx 2,0,10 - addi 10,10,15 - - - cmplwi 7,0 - beq .Lxts_enc_no_key2 - - lvsl 7,0,7 - lwz 9,240(7) - srwi 9,9,1 - subi 9,9,1 - li 3,16 - - lvx 0,0,7 - lvx 1,3,7 - addi 3,3,16 - vperm 0,0,1,7 - vxor 8,8,0 - lvx 0,3,7 - addi 3,3,16 - mtctr 9 - -.Ltweak_xts_enc: - vperm 1,1,0,7 - .long 0x11080D08 - lvx 1,3,7 - addi 3,3,16 - vperm 0,0,1,7 - .long 0x11080508 - lvx 0,3,7 - addi 3,3,16 - bdnz .Ltweak_xts_enc - - vperm 1,1,0,7 - .long 0x11080D08 - lvx 1,3,7 - vperm 0,0,1,7 - .long 0x11080509 - - li 8,0 - b .Lxts_enc - -.Lxts_enc_no_key2: - li 3,-16 - and 5,5,3 - - -.Lxts_enc: - lvx 4,0,10 - addi 10,10,16 - - lvsl 7,0,6 - lwz 9,240(6) - srwi 9,9,1 - subi 9,9,1 - li 3,16 - - vslb 10,9,9 - vor 10,10,9 - vspltisb 11,1 - vsldoi 10,10,11,15 - - cmplwi 5,96 - bge _aesp8_xts_encrypt6x - - andi. 7,5,15 - subic 0,5,32 - subi 7,7,16 - subfe 0,0,0 - and 0,0,7 - add 10,10,0 - - lvx 0,0,6 - lvx 1,3,6 - addi 3,3,16 - vperm 2,2,4,5 - vperm 0,0,1,7 - vxor 2,2,8 - vxor 2,2,0 - lvx 0,3,6 - addi 3,3,16 - mtctr 9 - b .Loop_xts_enc - -.align 5 -.Loop_xts_enc: - vperm 1,1,0,7 - .long 0x10420D08 - lvx 1,3,6 - addi 3,3,16 - vperm 0,0,1,7 - .long 0x10420508 - lvx 0,3,6 - addi 3,3,16 - bdnz .Loop_xts_enc - - vperm 1,1,0,7 - .long 0x10420D08 - lvx 1,3,6 - li 3,16 - vperm 0,0,1,7 - vxor 0,0,8 - .long 0x10620509 - - - nop - - .long 0x7C602799 - addi 4,4,16 - - subic. 5,5,16 - beq .Lxts_enc_done - - vor 2,4,4 - lvx 4,0,10 - addi 10,10,16 - lvx 0,0,6 - lvx 1,3,6 - addi 3,3,16 - - subic 0,5,32 - subfe 0,0,0 - and 0,0,7 - add 10,10,0 - - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 8,8,11 - - vperm 2,2,4,5 - vperm 0,0,1,7 - vxor 2,2,8 - vxor 3,3,0 - vxor 2,2,0 - lvx 0,3,6 - addi 3,3,16 - - mtctr 9 - cmplwi 5,16 - bge .Loop_xts_enc - - vxor 3,3,8 - lvsr 5,0,5 - vxor 4,4,4 - vspltisb 11,-1 - vperm 4,4,11,5 - vsel 2,2,3,4 - - subi 11,4,17 - subi 4,4,16 - mtctr 5 - li 5,16 -.Loop_xts_enc_steal: - lbzu 0,1(11) - stb 0,16(11) - bdnz .Loop_xts_enc_steal - - mtctr 9 - b .Loop_xts_enc - -.Lxts_enc_done: - cmplwi 8,0 - beq .Lxts_enc_ret - - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 8,8,11 - - - .long 0x7D004799 - -.Lxts_enc_ret: - mtspr 256,12 - li 3,0 - blr -.long 0 -.byte 0,12,0x04,0,0x80,6,6,0 -.long 0 -.size aes_p8_xts_encrypt,.-aes_p8_xts_encrypt - -.globl aes_p8_xts_decrypt -.type aes_p8_xts_decrypt,@function -.align 5 -aes_p8_xts_decrypt: - mr 10,3 - li 3,-1 - cmplwi 5,16 - .long 0x4dc00020 - - lis 0,0xfff8 - mfspr 12,256 - li 11,0 - mtspr 256,0 - - andi. 0,5,15 - neg 0,0 - andi. 0,0,16 - sub 5,5,0 - - vspltisb 9,0x07 - - - - - li 3,15 - lvx 8,0,8 - lvsl 5,0,8 - lvx 4,3,8 - - vperm 8,8,4,5 - - neg 11,10 - lvsr 5,0,11 - lvx 2,0,10 - addi 10,10,15 - - - cmplwi 7,0 - beq .Lxts_dec_no_key2 - - lvsl 7,0,7 - lwz 9,240(7) - srwi 9,9,1 - subi 9,9,1 - li 3,16 - - lvx 0,0,7 - lvx 1,3,7 - addi 3,3,16 - vperm 0,0,1,7 - vxor 8,8,0 - lvx 0,3,7 - addi 3,3,16 - mtctr 9 - -.Ltweak_xts_dec: - vperm 1,1,0,7 - .long 0x11080D08 - lvx 1,3,7 - addi 3,3,16 - vperm 0,0,1,7 - .long 0x11080508 - lvx 0,3,7 - addi 3,3,16 - bdnz .Ltweak_xts_dec - - vperm 1,1,0,7 - .long 0x11080D08 - lvx 1,3,7 - vperm 0,0,1,7 - .long 0x11080509 - - li 8,0 - b .Lxts_dec - -.Lxts_dec_no_key2: - neg 3,5 - andi. 3,3,15 - add 5,5,3 - - -.Lxts_dec: - lvx 4,0,10 - addi 10,10,16 - - lvsl 7,0,6 - lwz 9,240(6) - srwi 9,9,1 - subi 9,9,1 - li 3,16 - - vslb 10,9,9 - vor 10,10,9 - vspltisb 11,1 - vsldoi 10,10,11,15 - - cmplwi 5,96 - bge _aesp8_xts_decrypt6x - - lvx 0,0,6 - lvx 1,3,6 - addi 3,3,16 - vperm 2,2,4,5 - vperm 0,0,1,7 - vxor 2,2,8 - vxor 2,2,0 - lvx 0,3,6 - addi 3,3,16 - mtctr 9 - - cmplwi 5,16 - blt .Ltail_xts_dec - b .Loop_xts_dec - -.align 5 -.Loop_xts_dec: - vperm 1,1,0,7 - .long 0x10420D48 - lvx 1,3,6 - addi 3,3,16 - vperm 0,0,1,7 - .long 0x10420548 - lvx 0,3,6 - addi 3,3,16 - bdnz .Loop_xts_dec - - vperm 1,1,0,7 - .long 0x10420D48 - lvx 1,3,6 - li 3,16 - vperm 0,0,1,7 - vxor 0,0,8 - .long 0x10620549 - - - nop - - .long 0x7C602799 - addi 4,4,16 - - subic. 5,5,16 - beq .Lxts_dec_done - - vor 2,4,4 - lvx 4,0,10 - addi 10,10,16 - lvx 0,0,6 - lvx 1,3,6 - addi 3,3,16 - - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 8,8,11 - - vperm 2,2,4,5 - vperm 0,0,1,7 - vxor 2,2,8 - vxor 2,2,0 - lvx 0,3,6 - addi 3,3,16 - - mtctr 9 - cmplwi 5,16 - bge .Loop_xts_dec - -.Ltail_xts_dec: - vsrab 11,8,9 - vaddubm 12,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 12,12,11 - - subi 10,10,16 - add 10,10,5 - - vxor 2,2,8 - vxor 2,2,12 - -.Loop_xts_dec_short: - vperm 1,1,0,7 - .long 0x10420D48 - lvx 1,3,6 - addi 3,3,16 - vperm 0,0,1,7 - .long 0x10420548 - lvx 0,3,6 - addi 3,3,16 - bdnz .Loop_xts_dec_short - - vperm 1,1,0,7 - .long 0x10420D48 - lvx 1,3,6 - li 3,16 - vperm 0,0,1,7 - vxor 0,0,12 - .long 0x10620549 - - - nop - - .long 0x7C602799 - - vor 2,4,4 - lvx 4,0,10 - - lvx 0,0,6 - lvx 1,3,6 - addi 3,3,16 - vperm 2,2,4,5 - vperm 0,0,1,7 - - lvsr 5,0,5 - vxor 4,4,4 - vspltisb 11,-1 - vperm 4,4,11,5 - vsel 2,2,3,4 - - vxor 0,0,8 - vxor 2,2,0 - lvx 0,3,6 - addi 3,3,16 - - subi 11,4,1 - mtctr 5 - li 5,16 -.Loop_xts_dec_steal: - lbzu 0,1(11) - stb 0,16(11) - bdnz .Loop_xts_dec_steal - - mtctr 9 - b .Loop_xts_dec - -.Lxts_dec_done: - cmplwi 8,0 - beq .Lxts_dec_ret - - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 8,8,11 - - - .long 0x7D004799 - -.Lxts_dec_ret: - mtspr 256,12 - li 3,0 - blr -.long 0 -.byte 0,12,0x04,0,0x80,6,6,0 -.long 0 -.size aes_p8_xts_decrypt,.-aes_p8_xts_decrypt -.align 5 -_aesp8_xts_encrypt6x: - stwu 1,-392(1) - mflr 11 - li 7,175 - li 3,191 - stw 11,396(1) - stvx 20,7,1 - addi 7,7,32 - stvx 21,3,1 - addi 3,3,32 - stvx 22,7,1 - addi 7,7,32 - stvx 23,3,1 - addi 3,3,32 - stvx 24,7,1 - addi 7,7,32 - stvx 25,3,1 - addi 3,3,32 - stvx 26,7,1 - addi 7,7,32 - stvx 27,3,1 - addi 3,3,32 - stvx 28,7,1 - addi 7,7,32 - stvx 29,3,1 - addi 3,3,32 - stvx 30,7,1 - stvx 31,3,1 - li 0,-1 - stw 12,364(1) - li 3,0x10 - stw 26,368(1) - li 26,0x20 - stw 27,372(1) - li 27,0x30 - stw 28,376(1) - li 28,0x40 - stw 29,380(1) - li 29,0x50 - stw 30,384(1) - li 30,0x60 - stw 31,388(1) - li 31,0x70 - mtspr 256,0 - - subi 9,9,3 - - lvx 23,0,6 - lvx 30,3,6 - addi 6,6,0x20 - lvx 31,0,6 - vperm 23,23,30,7 - addi 7,1,32+15 - mtctr 9 - -.Load_xts_enc_key: - vperm 24,30,31,7 - lvx 30,3,6 - addi 6,6,0x20 - stvx 24,0,7 - vperm 25,31,30,7 - lvx 31,0,6 - stvx 25,3,7 - addi 7,7,0x20 - bdnz .Load_xts_enc_key - - lvx 26,3,6 - vperm 24,30,31,7 - lvx 27,26,6 - stvx 24,0,7 - vperm 25,31,26,7 - lvx 28,27,6 - stvx 25,3,7 - addi 7,1,32+15 - vperm 26,26,27,7 - lvx 29,28,6 - vperm 27,27,28,7 - lvx 30,29,6 - vperm 28,28,29,7 - lvx 31,30,6 - vperm 29,29,30,7 - lvx 22,31,6 - vperm 30,30,31,7 - lvx 24,0,7 - vperm 31,31,22,7 - lvx 25,3,7 - - vperm 0,2,4,5 - subi 10,10,31 - vxor 17,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 7,0,17 - vxor 8,8,11 - - .long 0x7C235699 - vxor 18,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 12,1,18 - vxor 8,8,11 - - .long 0x7C5A5699 - andi. 31,5,15 - vxor 19,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 13,2,19 - vxor 8,8,11 - - .long 0x7C7B5699 - sub 5,5,31 - vxor 20,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 14,3,20 - vxor 8,8,11 - - .long 0x7C9C5699 - subi 5,5,0x60 - vxor 21,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 15,4,21 - vxor 8,8,11 - - .long 0x7CBD5699 - addi 10,10,0x60 - vxor 22,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 16,5,22 - vxor 8,8,11 - - vxor 31,31,23 - mtctr 9 - b .Loop_xts_enc6x - -.align 5 -.Loop_xts_enc6x: - .long 0x10E7C508 - .long 0x118CC508 - .long 0x11ADC508 - .long 0x11CEC508 - .long 0x11EFC508 - .long 0x1210C508 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD08 - .long 0x118CCD08 - .long 0x11ADCD08 - .long 0x11CECD08 - .long 0x11EFCD08 - .long 0x1210CD08 - lvx 25,3,7 - bdnz .Loop_xts_enc6x - - subic 5,5,96 - vxor 0,17,31 - .long 0x10E7C508 - .long 0x118CC508 - vsrab 11,8,9 - vxor 17,8,23 - vaddubm 8,8,8 - .long 0x11ADC508 - .long 0x11CEC508 - vsldoi 11,11,11,15 - .long 0x11EFC508 - .long 0x1210C508 - - subfe. 0,0,0 - vand 11,11,10 - .long 0x10E7CD08 - .long 0x118CCD08 - vxor 8,8,11 - .long 0x11ADCD08 - .long 0x11CECD08 - vxor 1,18,31 - vsrab 11,8,9 - vxor 18,8,23 - .long 0x11EFCD08 - .long 0x1210CD08 - - and 0,0,5 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x10E7D508 - .long 0x118CD508 - vand 11,11,10 - .long 0x11ADD508 - .long 0x11CED508 - vxor 8,8,11 - .long 0x11EFD508 - .long 0x1210D508 - - add 10,10,0 - - - - vxor 2,19,31 - vsrab 11,8,9 - vxor 19,8,23 - vaddubm 8,8,8 - .long 0x10E7DD08 - .long 0x118CDD08 - vsldoi 11,11,11,15 - .long 0x11ADDD08 - .long 0x11CEDD08 - vand 11,11,10 - .long 0x11EFDD08 - .long 0x1210DD08 - - addi 7,1,32+15 - vxor 8,8,11 - .long 0x10E7E508 - .long 0x118CE508 - vxor 3,20,31 - vsrab 11,8,9 - vxor 20,8,23 - .long 0x11ADE508 - .long 0x11CEE508 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x11EFE508 - .long 0x1210E508 - lvx 24,0,7 - vand 11,11,10 - - .long 0x10E7ED08 - .long 0x118CED08 - vxor 8,8,11 - .long 0x11ADED08 - .long 0x11CEED08 - vxor 4,21,31 - vsrab 11,8,9 - vxor 21,8,23 - .long 0x11EFED08 - .long 0x1210ED08 - lvx 25,3,7 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - .long 0x10E7F508 - .long 0x118CF508 - vand 11,11,10 - .long 0x11ADF508 - .long 0x11CEF508 - vxor 8,8,11 - .long 0x11EFF508 - .long 0x1210F508 - vxor 5,22,31 - vsrab 11,8,9 - vxor 22,8,23 - - .long 0x10E70509 - .long 0x7C005699 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x118C0D09 - .long 0x7C235699 - .long 0x11AD1509 - - .long 0x7C5A5699 - vand 11,11,10 - .long 0x11CE1D09 - - .long 0x7C7B5699 - .long 0x11EF2509 - - .long 0x7C9C5699 - vxor 8,8,11 - .long 0x11702D09 - - - .long 0x7CBD5699 - addi 10,10,0x60 - - - - - - .long 0x7CE02799 - vxor 7,0,17 - - .long 0x7D832799 - vxor 12,1,18 - - .long 0x7DBA2799 - vxor 13,2,19 - - .long 0x7DDB2799 - vxor 14,3,20 - - .long 0x7DFC2799 - vxor 15,4,21 - - .long 0x7D7D2799 - vxor 16,5,22 - addi 4,4,0x60 - - mtctr 9 - beq .Loop_xts_enc6x - - addic. 5,5,0x60 - beq .Lxts_enc6x_zero - cmpwi 5,0x20 - blt .Lxts_enc6x_one - nop - beq .Lxts_enc6x_two - cmpwi 5,0x40 - blt .Lxts_enc6x_three - nop - beq .Lxts_enc6x_four - -.Lxts_enc6x_five: - vxor 7,1,17 - vxor 12,2,18 - vxor 13,3,19 - vxor 14,4,20 - vxor 15,5,21 - - bl _aesp8_xts_enc5x - - - vor 17,22,22 - - .long 0x7CE02799 - - .long 0x7D832799 - - .long 0x7DBA2799 - vxor 11,15,22 - - .long 0x7DDB2799 - .long 0x7DFC2799 - addi 4,4,0x50 - bne .Lxts_enc6x_steal - b .Lxts_enc6x_done - -.align 4 -.Lxts_enc6x_four: - vxor 7,2,17 - vxor 12,3,18 - vxor 13,4,19 - vxor 14,5,20 - vxor 15,15,15 - - bl _aesp8_xts_enc5x - - - vor 17,21,21 - - .long 0x7CE02799 - - .long 0x7D832799 - vxor 11,14,21 - - .long 0x7DBA2799 - .long 0x7DDB2799 - addi 4,4,0x40 - bne .Lxts_enc6x_steal - b .Lxts_enc6x_done - -.align 4 -.Lxts_enc6x_three: - vxor 7,3,17 - vxor 12,4,18 - vxor 13,5,19 - vxor 14,14,14 - vxor 15,15,15 - - bl _aesp8_xts_enc5x - - - vor 17,20,20 - - .long 0x7CE02799 - vxor 11,13,20 - - .long 0x7D832799 - .long 0x7DBA2799 - addi 4,4,0x30 - bne .Lxts_enc6x_steal - b .Lxts_enc6x_done - -.align 4 -.Lxts_enc6x_two: - vxor 7,4,17 - vxor 12,5,18 - vxor 13,13,13 - vxor 14,14,14 - vxor 15,15,15 - - bl _aesp8_xts_enc5x - - - vor 17,19,19 - vxor 11,12,19 - - .long 0x7CE02799 - .long 0x7D832799 - addi 4,4,0x20 - bne .Lxts_enc6x_steal - b .Lxts_enc6x_done - -.align 4 -.Lxts_enc6x_one: - vxor 7,5,17 - nop -.Loop_xts_enc1x: - .long 0x10E7C508 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD08 - lvx 25,3,7 - bdnz .Loop_xts_enc1x - - add 10,10,31 - cmpwi 31,0 - .long 0x10E7C508 - - subi 10,10,16 - .long 0x10E7CD08 - - lvsr 5,0,31 - .long 0x10E7D508 - - .long 0x7C005699 - .long 0x10E7DD08 - - addi 7,1,32+15 - .long 0x10E7E508 - lvx 24,0,7 - - .long 0x10E7ED08 - lvx 25,3,7 - vxor 17,17,31 - - - .long 0x10E7F508 - - vperm 0,0,0,5 - .long 0x10E78D09 - - vor 17,18,18 - vxor 11,7,18 - - .long 0x7CE02799 - addi 4,4,0x10 - bne .Lxts_enc6x_steal - b .Lxts_enc6x_done - -.align 4 -.Lxts_enc6x_zero: - cmpwi 31,0 - beq .Lxts_enc6x_done - - add 10,10,31 - subi 10,10,16 - .long 0x7C005699 - lvsr 5,0,31 - - vperm 0,0,0,5 - vxor 11,11,17 -.Lxts_enc6x_steal: - vxor 0,0,17 - vxor 7,7,7 - vspltisb 12,-1 - vperm 7,7,12,5 - vsel 7,0,11,7 - - subi 30,4,17 - subi 4,4,16 - mtctr 31 -.Loop_xts_enc6x_steal: - lbzu 0,1(30) - stb 0,16(30) - bdnz .Loop_xts_enc6x_steal - - li 31,0 - mtctr 9 - b .Loop_xts_enc1x - -.align 4 -.Lxts_enc6x_done: - cmplwi 8,0 - beq .Lxts_enc6x_ret - - vxor 8,17,23 - - .long 0x7D004799 - -.Lxts_enc6x_ret: - mtlr 11 - li 10,47 - li 11,63 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - - mtspr 256,12 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - lwz 26,368(1) - lwz 27,372(1) - lwz 28,376(1) - lwz 29,380(1) - lwz 30,384(1) - lwz 31,388(1) - addi 1,1,392 - blr -.long 0 -.byte 0,12,0x04,1,0x80,6,6,0 -.long 0 - -.align 5 -_aesp8_xts_enc5x: - .long 0x10E7C508 - .long 0x118CC508 - .long 0x11ADC508 - .long 0x11CEC508 - .long 0x11EFC508 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD08 - .long 0x118CCD08 - .long 0x11ADCD08 - .long 0x11CECD08 - .long 0x11EFCD08 - lvx 25,3,7 - bdnz _aesp8_xts_enc5x - - add 10,10,31 - cmpwi 31,0 - .long 0x10E7C508 - .long 0x118CC508 - .long 0x11ADC508 - .long 0x11CEC508 - .long 0x11EFC508 - - subi 10,10,16 - .long 0x10E7CD08 - .long 0x118CCD08 - .long 0x11ADCD08 - .long 0x11CECD08 - .long 0x11EFCD08 - vxor 17,17,31 - - .long 0x10E7D508 - lvsr 5,0,31 - .long 0x118CD508 - .long 0x11ADD508 - .long 0x11CED508 - .long 0x11EFD508 - vxor 1,18,31 - - .long 0x10E7DD08 - .long 0x7C005699 - .long 0x118CDD08 - .long 0x11ADDD08 - .long 0x11CEDD08 - .long 0x11EFDD08 - vxor 2,19,31 - - addi 7,1,32+15 - .long 0x10E7E508 - .long 0x118CE508 - .long 0x11ADE508 - .long 0x11CEE508 - .long 0x11EFE508 - lvx 24,0,7 - vxor 3,20,31 - - .long 0x10E7ED08 - - .long 0x118CED08 - .long 0x11ADED08 - .long 0x11CEED08 - .long 0x11EFED08 - lvx 25,3,7 - vxor 4,21,31 - - .long 0x10E7F508 - vperm 0,0,0,5 - .long 0x118CF508 - .long 0x11ADF508 - .long 0x11CEF508 - .long 0x11EFF508 - - .long 0x10E78D09 - .long 0x118C0D09 - .long 0x11AD1509 - .long 0x11CE1D09 - .long 0x11EF2509 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.align 5 -_aesp8_xts_decrypt6x: - stwu 1,-392(1) - mflr 11 - li 7,175 - li 3,191 - stw 11,396(1) - stvx 20,7,1 - addi 7,7,32 - stvx 21,3,1 - addi 3,3,32 - stvx 22,7,1 - addi 7,7,32 - stvx 23,3,1 - addi 3,3,32 - stvx 24,7,1 - addi 7,7,32 - stvx 25,3,1 - addi 3,3,32 - stvx 26,7,1 - addi 7,7,32 - stvx 27,3,1 - addi 3,3,32 - stvx 28,7,1 - addi 7,7,32 - stvx 29,3,1 - addi 3,3,32 - stvx 30,7,1 - stvx 31,3,1 - li 0,-1 - stw 12,364(1) - li 3,0x10 - stw 26,368(1) - li 26,0x20 - stw 27,372(1) - li 27,0x30 - stw 28,376(1) - li 28,0x40 - stw 29,380(1) - li 29,0x50 - stw 30,384(1) - li 30,0x60 - stw 31,388(1) - li 31,0x70 - mtspr 256,0 - - subi 9,9,3 - - lvx 23,0,6 - lvx 30,3,6 - addi 6,6,0x20 - lvx 31,0,6 - vperm 23,23,30,7 - addi 7,1,32+15 - mtctr 9 - -.Load_xts_dec_key: - vperm 24,30,31,7 - lvx 30,3,6 - addi 6,6,0x20 - stvx 24,0,7 - vperm 25,31,30,7 - lvx 31,0,6 - stvx 25,3,7 - addi 7,7,0x20 - bdnz .Load_xts_dec_key - - lvx 26,3,6 - vperm 24,30,31,7 - lvx 27,26,6 - stvx 24,0,7 - vperm 25,31,26,7 - lvx 28,27,6 - stvx 25,3,7 - addi 7,1,32+15 - vperm 26,26,27,7 - lvx 29,28,6 - vperm 27,27,28,7 - lvx 30,29,6 - vperm 28,28,29,7 - lvx 31,30,6 - vperm 29,29,30,7 - lvx 22,31,6 - vperm 30,30,31,7 - lvx 24,0,7 - vperm 31,31,22,7 - lvx 25,3,7 - - vperm 0,2,4,5 - subi 10,10,31 - vxor 17,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 7,0,17 - vxor 8,8,11 - - .long 0x7C235699 - vxor 18,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 12,1,18 - vxor 8,8,11 - - .long 0x7C5A5699 - andi. 31,5,15 - vxor 19,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 13,2,19 - vxor 8,8,11 - - .long 0x7C7B5699 - sub 5,5,31 - vxor 20,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 14,3,20 - vxor 8,8,11 - - .long 0x7C9C5699 - subi 5,5,0x60 - vxor 21,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 15,4,21 - vxor 8,8,11 - - .long 0x7CBD5699 - addi 10,10,0x60 - vxor 22,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 16,5,22 - vxor 8,8,11 - - vxor 31,31,23 - mtctr 9 - b .Loop_xts_dec6x - -.align 5 -.Loop_xts_dec6x: - .long 0x10E7C548 - .long 0x118CC548 - .long 0x11ADC548 - .long 0x11CEC548 - .long 0x11EFC548 - .long 0x1210C548 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD48 - .long 0x118CCD48 - .long 0x11ADCD48 - .long 0x11CECD48 - .long 0x11EFCD48 - .long 0x1210CD48 - lvx 25,3,7 - bdnz .Loop_xts_dec6x - - subic 5,5,96 - vxor 0,17,31 - .long 0x10E7C548 - .long 0x118CC548 - vsrab 11,8,9 - vxor 17,8,23 - vaddubm 8,8,8 - .long 0x11ADC548 - .long 0x11CEC548 - vsldoi 11,11,11,15 - .long 0x11EFC548 - .long 0x1210C548 - - subfe. 0,0,0 - vand 11,11,10 - .long 0x10E7CD48 - .long 0x118CCD48 - vxor 8,8,11 - .long 0x11ADCD48 - .long 0x11CECD48 - vxor 1,18,31 - vsrab 11,8,9 - vxor 18,8,23 - .long 0x11EFCD48 - .long 0x1210CD48 - - and 0,0,5 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x10E7D548 - .long 0x118CD548 - vand 11,11,10 - .long 0x11ADD548 - .long 0x11CED548 - vxor 8,8,11 - .long 0x11EFD548 - .long 0x1210D548 - - add 10,10,0 - - - - vxor 2,19,31 - vsrab 11,8,9 - vxor 19,8,23 - vaddubm 8,8,8 - .long 0x10E7DD48 - .long 0x118CDD48 - vsldoi 11,11,11,15 - .long 0x11ADDD48 - .long 0x11CEDD48 - vand 11,11,10 - .long 0x11EFDD48 - .long 0x1210DD48 - - addi 7,1,32+15 - vxor 8,8,11 - .long 0x10E7E548 - .long 0x118CE548 - vxor 3,20,31 - vsrab 11,8,9 - vxor 20,8,23 - .long 0x11ADE548 - .long 0x11CEE548 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x11EFE548 - .long 0x1210E548 - lvx 24,0,7 - vand 11,11,10 - - .long 0x10E7ED48 - .long 0x118CED48 - vxor 8,8,11 - .long 0x11ADED48 - .long 0x11CEED48 - vxor 4,21,31 - vsrab 11,8,9 - vxor 21,8,23 - .long 0x11EFED48 - .long 0x1210ED48 - lvx 25,3,7 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - .long 0x10E7F548 - .long 0x118CF548 - vand 11,11,10 - .long 0x11ADF548 - .long 0x11CEF548 - vxor 8,8,11 - .long 0x11EFF548 - .long 0x1210F548 - vxor 5,22,31 - vsrab 11,8,9 - vxor 22,8,23 - - .long 0x10E70549 - .long 0x7C005699 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x118C0D49 - .long 0x7C235699 - .long 0x11AD1549 - - .long 0x7C5A5699 - vand 11,11,10 - .long 0x11CE1D49 - - .long 0x7C7B5699 - .long 0x11EF2549 - - .long 0x7C9C5699 - vxor 8,8,11 - .long 0x12102D49 - - .long 0x7CBD5699 - addi 10,10,0x60 - - - - - - .long 0x7CE02799 - vxor 7,0,17 - - .long 0x7D832799 - vxor 12,1,18 - - .long 0x7DBA2799 - vxor 13,2,19 - - .long 0x7DDB2799 - vxor 14,3,20 - - .long 0x7DFC2799 - vxor 15,4,21 - .long 0x7E1D2799 - vxor 16,5,22 - addi 4,4,0x60 - - mtctr 9 - beq .Loop_xts_dec6x - - addic. 5,5,0x60 - beq .Lxts_dec6x_zero - cmpwi 5,0x20 - blt .Lxts_dec6x_one - nop - beq .Lxts_dec6x_two - cmpwi 5,0x40 - blt .Lxts_dec6x_three - nop - beq .Lxts_dec6x_four - -.Lxts_dec6x_five: - vxor 7,1,17 - vxor 12,2,18 - vxor 13,3,19 - vxor 14,4,20 - vxor 15,5,21 - - bl _aesp8_xts_dec5x - - - vor 17,22,22 - vxor 18,8,23 - - .long 0x7CE02799 - vxor 7,0,18 - - .long 0x7D832799 - - .long 0x7DBA2799 - - .long 0x7DDB2799 - .long 0x7DFC2799 - addi 4,4,0x50 - bne .Lxts_dec6x_steal - b .Lxts_dec6x_done - -.align 4 -.Lxts_dec6x_four: - vxor 7,2,17 - vxor 12,3,18 - vxor 13,4,19 - vxor 14,5,20 - vxor 15,15,15 - - bl _aesp8_xts_dec5x - - - vor 17,21,21 - vor 18,22,22 - - .long 0x7CE02799 - vxor 7,0,22 - - .long 0x7D832799 - - .long 0x7DBA2799 - .long 0x7DDB2799 - addi 4,4,0x40 - bne .Lxts_dec6x_steal - b .Lxts_dec6x_done - -.align 4 -.Lxts_dec6x_three: - vxor 7,3,17 - vxor 12,4,18 - vxor 13,5,19 - vxor 14,14,14 - vxor 15,15,15 - - bl _aesp8_xts_dec5x - - - vor 17,20,20 - vor 18,21,21 - - .long 0x7CE02799 - vxor 7,0,21 - - .long 0x7D832799 - .long 0x7DBA2799 - addi 4,4,0x30 - bne .Lxts_dec6x_steal - b .Lxts_dec6x_done - -.align 4 -.Lxts_dec6x_two: - vxor 7,4,17 - vxor 12,5,18 - vxor 13,13,13 - vxor 14,14,14 - vxor 15,15,15 - - bl _aesp8_xts_dec5x - - - vor 17,19,19 - vor 18,20,20 - - .long 0x7CE02799 - vxor 7,0,20 - .long 0x7D832799 - addi 4,4,0x20 - bne .Lxts_dec6x_steal - b .Lxts_dec6x_done - -.align 4 -.Lxts_dec6x_one: - vxor 7,5,17 - nop -.Loop_xts_dec1x: - .long 0x10E7C548 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD48 - lvx 25,3,7 - bdnz .Loop_xts_dec1x - - subi 0,31,1 - .long 0x10E7C548 - - andi. 0,0,16 - cmpwi 31,0 - .long 0x10E7CD48 - - sub 10,10,0 - .long 0x10E7D548 - - .long 0x7C005699 - .long 0x10E7DD48 - - addi 7,1,32+15 - .long 0x10E7E548 - lvx 24,0,7 - - .long 0x10E7ED48 - lvx 25,3,7 - vxor 17,17,31 - - - .long 0x10E7F548 - - mtctr 9 - .long 0x10E78D49 - - vor 17,18,18 - vor 18,19,19 - - .long 0x7CE02799 - addi 4,4,0x10 - vxor 7,0,19 - bne .Lxts_dec6x_steal - b .Lxts_dec6x_done - -.align 4 -.Lxts_dec6x_zero: - cmpwi 31,0 - beq .Lxts_dec6x_done - - .long 0x7C005699 - - vxor 7,0,18 -.Lxts_dec6x_steal: - .long 0x10E7C548 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD48 - lvx 25,3,7 - bdnz .Lxts_dec6x_steal - - add 10,10,31 - .long 0x10E7C548 - - cmpwi 31,0 - .long 0x10E7CD48 - - .long 0x7C005699 - .long 0x10E7D548 - - lvsr 5,0,31 - .long 0x10E7DD48 - - addi 7,1,32+15 - .long 0x10E7E548 - lvx 24,0,7 - - .long 0x10E7ED48 - lvx 25,3,7 - vxor 18,18,31 - - - .long 0x10E7F548 - - vperm 0,0,0,5 - .long 0x11679549 - - - - .long 0x7D602799 - - vxor 7,7,7 - vspltisb 12,-1 - vperm 7,7,12,5 - vsel 7,0,11,7 - vxor 7,7,17 - - subi 30,4,1 - mtctr 31 -.Loop_xts_dec6x_steal: - lbzu 0,1(30) - stb 0,16(30) - bdnz .Loop_xts_dec6x_steal - - li 31,0 - mtctr 9 - b .Loop_xts_dec1x - -.align 4 -.Lxts_dec6x_done: - cmplwi 8,0 - beq .Lxts_dec6x_ret - - vxor 8,17,23 - - .long 0x7D004799 - -.Lxts_dec6x_ret: - mtlr 11 - li 10,47 - li 11,63 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - - mtspr 256,12 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - lwz 26,368(1) - lwz 27,372(1) - lwz 28,376(1) - lwz 29,380(1) - lwz 30,384(1) - lwz 31,388(1) - addi 1,1,392 - blr -.long 0 -.byte 0,12,0x04,1,0x80,6,6,0 -.long 0 - -.align 5 -_aesp8_xts_dec5x: - .long 0x10E7C548 - .long 0x118CC548 - .long 0x11ADC548 - .long 0x11CEC548 - .long 0x11EFC548 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD48 - .long 0x118CCD48 - .long 0x11ADCD48 - .long 0x11CECD48 - .long 0x11EFCD48 - lvx 25,3,7 - bdnz _aesp8_xts_dec5x - - subi 0,31,1 - .long 0x10E7C548 - .long 0x118CC548 - .long 0x11ADC548 - .long 0x11CEC548 - .long 0x11EFC548 - - andi. 0,0,16 - cmpwi 31,0 - .long 0x10E7CD48 - .long 0x118CCD48 - .long 0x11ADCD48 - .long 0x11CECD48 - .long 0x11EFCD48 - vxor 17,17,31 - - sub 10,10,0 - .long 0x10E7D548 - .long 0x118CD548 - .long 0x11ADD548 - .long 0x11CED548 - .long 0x11EFD548 - vxor 1,18,31 - - .long 0x10E7DD48 - .long 0x7C005699 - .long 0x118CDD48 - .long 0x11ADDD48 - .long 0x11CEDD48 - .long 0x11EFDD48 - vxor 2,19,31 - - addi 7,1,32+15 - .long 0x10E7E548 - .long 0x118CE548 - .long 0x11ADE548 - .long 0x11CEE548 - .long 0x11EFE548 - lvx 24,0,7 - vxor 3,20,31 - - .long 0x10E7ED48 - - .long 0x118CED48 - .long 0x11ADED48 - .long 0x11CEED48 - .long 0x11EFED48 - lvx 25,3,7 - vxor 4,21,31 - - .long 0x10E7F548 - .long 0x118CF548 - .long 0x11ADF548 - .long 0x11CEF548 - .long 0x11EFF548 - - .long 0x10E78D49 - .long 0x118C0D49 - .long 0x11AD1549 - .long 0x11CE1D49 - .long 0x11EF2549 - mtctr 9 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 diff --git a/sys/crypto/openssl/powerpc/chacha-ppc.S b/sys/crypto/openssl/powerpc/chacha-ppc.S deleted file mode 100644 index 2893962f9ce..00000000000 --- a/sys/crypto/openssl/powerpc/chacha-ppc.S +++ /dev/null @@ -1,1492 +0,0 @@ -/* Do not modify. This file is auto-generated from chacha-ppc.pl. */ -.machine "any" -.text - -.globl ChaCha20_ctr32_int -.type ChaCha20_ctr32_int,@function -.align 5 -ChaCha20_ctr32_int: -__ChaCha20_ctr32_int: - cmplwi 5,0 - .long 0x4DC20020 - - stwu 1,-160(1) - mflr 0 - - stw 14,88(1) - stw 15,92(1) - stw 16,96(1) - stw 17,100(1) - stw 18,104(1) - stw 19,108(1) - stw 20,112(1) - stw 21,116(1) - stw 22,120(1) - stw 23,124(1) - stw 24,128(1) - stw 25,132(1) - stw 26,136(1) - stw 27,140(1) - stw 28,144(1) - stw 29,148(1) - stw 30,152(1) - stw 31,156(1) - stw 0,164(1) - - lwz 11,0(7) - lwz 12,4(7) - lwz 14,8(7) - lwz 15,12(7) - - bl __ChaCha20_1x - - lwz 0,164(1) - lwz 14,88(1) - lwz 15,92(1) - lwz 16,96(1) - lwz 17,100(1) - lwz 18,104(1) - lwz 19,108(1) - lwz 20,112(1) - lwz 21,116(1) - lwz 22,120(1) - lwz 23,124(1) - lwz 24,128(1) - lwz 25,132(1) - lwz 26,136(1) - lwz 27,140(1) - lwz 28,144(1) - lwz 29,148(1) - lwz 30,152(1) - lwz 31,156(1) - mtlr 0 - addi 1,1,160 - blr -.long 0 -.byte 0,12,4,1,0x80,18,5,0 -.long 0 -.size ChaCha20_ctr32_int,.-ChaCha20_ctr32_int - -.align 5 -__ChaCha20_1x: -.Loop_outer: - lis 16,0x6170 - lis 17,0x3320 - lis 18,0x7962 - lis 19,0x6b20 - ori 16,16,0x7865 - ori 17,17,0x646e - ori 18,18,0x2d32 - ori 19,19,0x6574 - - li 0,10 - lwz 20,0(6) - lwz 21,4(6) - lwz 22,8(6) - lwz 23,12(6) - lwz 24,16(6) - mr 28,11 - lwz 25,20(6) - mr 29,12 - lwz 26,24(6) - mr 30,14 - lwz 27,28(6) - mr 31,15 - - mr 7,20 - mr 8,21 - mr 9,22 - mr 10,23 - - mtctr 0 -.Loop: - add 16,16,20 - add 17,17,21 - add 18,18,22 - add 19,19,23 - xor 28,28,16 - xor 29,29,17 - xor 30,30,18 - xor 31,31,19 - rotlwi 28,28,16 - rotlwi 29,29,16 - rotlwi 30,30,16 - rotlwi 31,31,16 - add 24,24,28 - add 25,25,29 - add 26,26,30 - add 27,27,31 - xor 20,20,24 - xor 21,21,25 - xor 22,22,26 - xor 23,23,27 - rotlwi 20,20,12 - rotlwi 21,21,12 - rotlwi 22,22,12 - rotlwi 23,23,12 - add 16,16,20 - add 17,17,21 - add 18,18,22 - add 19,19,23 - xor 28,28,16 - xor 29,29,17 - xor 30,30,18 - xor 31,31,19 - rotlwi 28,28,8 - rotlwi 29,29,8 - rotlwi 30,30,8 - rotlwi 31,31,8 - add 24,24,28 - add 25,25,29 - add 26,26,30 - add 27,27,31 - xor 20,20,24 - xor 21,21,25 - xor 22,22,26 - xor 23,23,27 - rotlwi 20,20,7 - rotlwi 21,21,7 - rotlwi 22,22,7 - rotlwi 23,23,7 - add 16,16,21 - add 17,17,22 - add 18,18,23 - add 19,19,20 - xor 31,31,16 - xor 28,28,17 - xor 29,29,18 - xor 30,30,19 - rotlwi 31,31,16 - rotlwi 28,28,16 - rotlwi 29,29,16 - rotlwi 30,30,16 - add 26,26,31 - add 27,27,28 - add 24,24,29 - add 25,25,30 - xor 21,21,26 - xor 22,22,27 - xor 23,23,24 - xor 20,20,25 - rotlwi 21,21,12 - rotlwi 22,22,12 - rotlwi 23,23,12 - rotlwi 20,20,12 - add 16,16,21 - add 17,17,22 - add 18,18,23 - add 19,19,20 - xor 31,31,16 - xor 28,28,17 - xor 29,29,18 - xor 30,30,19 - rotlwi 31,31,8 - rotlwi 28,28,8 - rotlwi 29,29,8 - rotlwi 30,30,8 - add 26,26,31 - add 27,27,28 - add 24,24,29 - add 25,25,30 - xor 21,21,26 - xor 22,22,27 - xor 23,23,24 - xor 20,20,25 - rotlwi 21,21,7 - rotlwi 22,22,7 - rotlwi 23,23,7 - rotlwi 20,20,7 - bdnz .Loop - - subic 5,5,64 - addi 16,16,0x7865 - addi 17,17,0x646e - addi 18,18,0x2d32 - addi 19,19,0x6574 - addis 16,16,0x6170 - addis 17,17,0x3320 - addis 18,18,0x7962 - addis 19,19,0x6b20 - - subfe. 0,0,0 - add 20,20,7 - lwz 7,16(6) - add 21,21,8 - lwz 8,20(6) - add 22,22,9 - lwz 9,24(6) - add 23,23,10 - lwz 10,28(6) - add 24,24,7 - add 25,25,8 - add 26,26,9 - add 27,27,10 - - add 28,28,11 - add 29,29,12 - add 30,30,14 - add 31,31,15 - addi 11,11,1 - mr 7,16 - rotlwi 16,16,8 - rlwimi 16,7,24,0,7 - rlwimi 16,7,24,16,23 - mr 8,17 - rotlwi 17,17,8 - rlwimi 17,8,24,0,7 - rlwimi 17,8,24,16,23 - mr 9,18 - rotlwi 18,18,8 - rlwimi 18,9,24,0,7 - rlwimi 18,9,24,16,23 - mr 10,19 - rotlwi 19,19,8 - rlwimi 19,10,24,0,7 - rlwimi 19,10,24,16,23 - mr 7,20 - rotlwi 20,20,8 - rlwimi 20,7,24,0,7 - rlwimi 20,7,24,16,23 - mr 8,21 - rotlwi 21,21,8 - rlwimi 21,8,24,0,7 - rlwimi 21,8,24,16,23 - mr 9,22 - rotlwi 22,22,8 - rlwimi 22,9,24,0,7 - rlwimi 22,9,24,16,23 - mr 10,23 - rotlwi 23,23,8 - rlwimi 23,10,24,0,7 - rlwimi 23,10,24,16,23 - mr 7,24 - rotlwi 24,24,8 - rlwimi 24,7,24,0,7 - rlwimi 24,7,24,16,23 - mr 8,25 - rotlwi 25,25,8 - rlwimi 25,8,24,0,7 - rlwimi 25,8,24,16,23 - mr 9,26 - rotlwi 26,26,8 - rlwimi 26,9,24,0,7 - rlwimi 26,9,24,16,23 - mr 10,27 - rotlwi 27,27,8 - rlwimi 27,10,24,0,7 - rlwimi 27,10,24,16,23 - mr 7,28 - rotlwi 28,28,8 - rlwimi 28,7,24,0,7 - rlwimi 28,7,24,16,23 - mr 8,29 - rotlwi 29,29,8 - rlwimi 29,8,24,0,7 - rlwimi 29,8,24,16,23 - mr 9,30 - rotlwi 30,30,8 - rlwimi 30,9,24,0,7 - rlwimi 30,9,24,16,23 - mr 10,31 - rotlwi 31,31,8 - rlwimi 31,10,24,0,7 - rlwimi 31,10,24,16,23 - bne .Ltail - - lwz 7,0(4) - lwz 8,4(4) - cmplwi 5,0 - lwz 9,8(4) - lwz 10,12(4) - xor 16,16,7 - lwz 7,16(4) - xor 17,17,8 - lwz 8,20(4) - xor 18,18,9 - lwz 9,24(4) - xor 19,19,10 - lwz 10,28(4) - xor 20,20,7 - lwz 7,32(4) - xor 21,21,8 - lwz 8,36(4) - xor 22,22,9 - lwz 9,40(4) - xor 23,23,10 - lwz 10,44(4) - xor 24,24,7 - lwz 7,48(4) - xor 25,25,8 - lwz 8,52(4) - xor 26,26,9 - lwz 9,56(4) - xor 27,27,10 - lwz 10,60(4) - xor 28,28,7 - stw 16,0(3) - xor 29,29,8 - stw 17,4(3) - xor 30,30,9 - stw 18,8(3) - xor 31,31,10 - stw 19,12(3) - stw 20,16(3) - stw 21,20(3) - stw 22,24(3) - stw 23,28(3) - stw 24,32(3) - stw 25,36(3) - stw 26,40(3) - stw 27,44(3) - stw 28,48(3) - stw 29,52(3) - stw 30,56(3) - addi 4,4,64 - stw 31,60(3) - addi 3,3,64 - - bne .Loop_outer - - blr - -.align 4 -.Ltail: - addi 5,5,64 - subi 4,4,1 - subi 3,3,1 - addi 7,1,24-1 - mtctr 5 - - stw 16,24(1) - stw 17,28(1) - stw 18,32(1) - stw 19,36(1) - stw 20,40(1) - stw 21,44(1) - stw 22,48(1) - stw 23,52(1) - stw 24,56(1) - stw 25,60(1) - stw 26,64(1) - stw 27,68(1) - stw 28,72(1) - stw 29,76(1) - stw 30,80(1) - stw 31,84(1) - -.Loop_tail: - lbzu 11,1(4) - lbzu 16,1(7) - xor 12,11,16 - stbu 12,1(3) - bdnz .Loop_tail - - stw 1,24(1) - stw 1,28(1) - stw 1,32(1) - stw 1,36(1) - stw 1,40(1) - stw 1,44(1) - stw 1,48(1) - stw 1,52(1) - stw 1,56(1) - stw 1,60(1) - stw 1,64(1) - stw 1,68(1) - stw 1,72(1) - stw 1,76(1) - stw 1,80(1) - stw 1,84(1) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.globl ChaCha20_ctr32_vmx -.type ChaCha20_ctr32_vmx,@function -.align 5 -ChaCha20_ctr32_vmx: - cmplwi 5,256 - blt __ChaCha20_ctr32_int - - stwu 1,-320(1) - mflr 0 - li 10,103 - li 11,119 - mfspr 12,256 - stvx 23,10,1 - addi 10,10,32 - stvx 24,11,1 - addi 11,11,32 - stvx 25,10,1 - addi 10,10,32 - stvx 26,11,1 - addi 11,11,32 - stvx 27,10,1 - addi 10,10,32 - stvx 28,11,1 - addi 11,11,32 - stvx 29,10,1 - addi 10,10,32 - stvx 30,11,1 - stvx 31,10,1 - stw 12,244(1) - stw 14,248(1) - stw 15,252(1) - stw 16,256(1) - stw 17,260(1) - stw 18,264(1) - stw 19,268(1) - stw 20,272(1) - stw 21,276(1) - stw 22,280(1) - stw 23,284(1) - stw 24,288(1) - stw 25,292(1) - stw 26,296(1) - stw 27,300(1) - stw 28,304(1) - stw 29,308(1) - stw 30,312(1) - stw 31,316(1) - li 12,-4096+511 - stw 0, 324(1) - mtspr 256,12 - - bl .Lconsts - li 16,16 - li 17,32 - li 18,48 - li 19,64 - li 20,31 - li 21,15 - - lvx 13,0,6 - lvsl 29,0,6 - lvx 14,16,6 - lvx 27,20,6 - - lvx 15,0,7 - lvsl 30,0,7 - lvx 28,21,7 - - lvx 12,0,12 - lvx 17,16,12 - lvx 18,17,12 - lvx 19,18,12 - lvx 23,19,12 - - vperm 13,13,14,29 - vperm 14,14,27,29 - vperm 15,15,28,30 - - lwz 11,0(7) - lwz 12,4(7) - vadduwm 15,15,17 - lwz 14,8(7) - vadduwm 16,15,17 - lwz 15,12(7) - vadduwm 17,16,17 - - vxor 29,29,29 - vspltisw 26,-1 - lvsl 24,0,4 - lvsr 25,0,3 - vperm 26,29,26,25 - - lvsl 29,0,16 - vspltisb 30,3 - vxor 29,29,30 - vxor 25,25,30 - vperm 24,24,24,29 - - li 0,10 - b .Loop_outer_vmx - -.align 4 -.Loop_outer_vmx: - lis 16,0x6170 - lis 17,0x3320 - vor 0,12,12 - lis 18,0x7962 - lis 19,0x6b20 - vor 4,12,12 - ori 16,16,0x7865 - ori 17,17,0x646e - vor 8,12,12 - ori 18,18,0x2d32 - ori 19,19,0x6574 - vor 1,13,13 - - lwz 20,0(6) - vor 5,13,13 - lwz 21,4(6) - vor 9,13,13 - lwz 22,8(6) - vor 2,14,14 - lwz 23,12(6) - vor 6,14,14 - lwz 24,16(6) - vor 10,14,14 - mr 28,11 - lwz 25,20(6) - vor 3,15,15 - mr 29,12 - lwz 26,24(6) - vor 7,16,16 - mr 30,14 - lwz 27,28(6) - vor 11,17,17 - mr 31,15 - - mr 7,20 - mr 8,21 - mr 9,22 - mr 10,23 - - vspltisw 27,12 - vspltisw 28,7 - - mtctr 0 - nop -.Loop_vmx: - vadduwm 0,0,1 - vadduwm 4,4,5 - vadduwm 8,8,9 - add 16,16,20 - add 17,17,21 - add 18,18,22 - vxor 3,3,0 - vxor 7,7,4 - vxor 11,11,8 - add 19,19,23 - xor 28,28,16 - xor 29,29,17 - vperm 3,3,3,19 - vperm 7,7,7,19 - vperm 11,11,11,19 - xor 30,30,18 - xor 31,31,19 - rotlwi 28,28,16 - vadduwm 2,2,3 - vadduwm 6,6,7 - vadduwm 10,10,11 - rotlwi 29,29,16 - rotlwi 30,30,16 - rotlwi 31,31,16 - vxor 1,1,2 - vxor 5,5,6 - vxor 9,9,10 - add 24,24,28 - add 25,25,29 - add 26,26,30 - vrlw 1,1,27 - vrlw 5,5,27 - vrlw 9,9,27 - add 27,27,31 - xor 20,20,24 - xor 21,21,25 - vadduwm 0,0,1 - vadduwm 4,4,5 - vadduwm 8,8,9 - xor 22,22,26 - xor 23,23,27 - rotlwi 20,20,12 - vxor 3,3,0 - vxor 7,7,4 - vxor 11,11,8 - rotlwi 21,21,12 - rotlwi 22,22,12 - rotlwi 23,23,12 - vperm 3,3,3,23 - vperm 7,7,7,23 - vperm 11,11,11,23 - add 16,16,20 - add 17,17,21 - add 18,18,22 - vadduwm 2,2,3 - vadduwm 6,6,7 - vadduwm 10,10,11 - add 19,19,23 - xor 28,28,16 - xor 29,29,17 - vxor 1,1,2 - vxor 5,5,6 - vxor 9,9,10 - xor 30,30,18 - xor 31,31,19 - rotlwi 28,28,8 - vrlw 1,1,28 - vrlw 5,5,28 - vrlw 9,9,28 - rotlwi 29,29,8 - rotlwi 30,30,8 - rotlwi 31,31,8 - vsldoi 2,2,2, 16-8 - vsldoi 6,6,6, 16-8 - vsldoi 10,10,10, 16-8 - add 24,24,28 - add 25,25,29 - add 26,26,30 - vsldoi 1,1,1, 16-12 - vsldoi 5,5,5, 16-12 - vsldoi 9,9,9, 16-12 - add 27,27,31 - xor 20,20,24 - xor 21,21,25 - vsldoi 3,3,3, 16-4 - vsldoi 7,7,7, 16-4 - vsldoi 11,11,11, 16-4 - xor 22,22,26 - xor 23,23,27 - rotlwi 20,20,7 - rotlwi 21,21,7 - rotlwi 22,22,7 - rotlwi 23,23,7 - vadduwm 0,0,1 - vadduwm 4,4,5 - vadduwm 8,8,9 - add 16,16,21 - add 17,17,22 - add 18,18,23 - vxor 3,3,0 - vxor 7,7,4 - vxor 11,11,8 - add 19,19,20 - xor 31,31,16 - xor 28,28,17 - vperm 3,3,3,19 - vperm 7,7,7,19 - vperm 11,11,11,19 - xor 29,29,18 - xor 30,30,19 - rotlwi 31,31,16 - vadduwm 2,2,3 - vadduwm 6,6,7 - vadduwm 10,10,11 - rotlwi 28,28,16 - rotlwi 29,29,16 - rotlwi 30,30,16 - vxor 1,1,2 - vxor 5,5,6 - vxor 9,9,10 - add 26,26,31 - add 27,27,28 - add 24,24,29 - vrlw 1,1,27 - vrlw 5,5,27 - vrlw 9,9,27 - add 25,25,30 - xor 21,21,26 - xor 22,22,27 - vadduwm 0,0,1 - vadduwm 4,4,5 - vadduwm 8,8,9 - xor 23,23,24 - xor 20,20,25 - rotlwi 21,21,12 - vxor 3,3,0 - vxor 7,7,4 - vxor 11,11,8 - rotlwi 22,22,12 - rotlwi 23,23,12 - rotlwi 20,20,12 - vperm 3,3,3,23 - vperm 7,7,7,23 - vperm 11,11,11,23 - add 16,16,21 - add 17,17,22 - add 18,18,23 - vadduwm 2,2,3 - vadduwm 6,6,7 - vadduwm 10,10,11 - add 19,19,20 - xor 31,31,16 - xor 28,28,17 - vxor 1,1,2 - vxor 5,5,6 - vxor 9,9,10 - xor 29,29,18 - xor 30,30,19 - rotlwi 31,31,8 - vrlw 1,1,28 - vrlw 5,5,28 - vrlw 9,9,28 - rotlwi 28,28,8 - rotlwi 29,29,8 - rotlwi 30,30,8 - vsldoi 2,2,2, 16-8 - vsldoi 6,6,6, 16-8 - vsldoi 10,10,10, 16-8 - add 26,26,31 - add 27,27,28 - add 24,24,29 - vsldoi 1,1,1, 16-4 - vsldoi 5,5,5, 16-4 - vsldoi 9,9,9, 16-4 - add 25,25,30 - xor 21,21,26 - xor 22,22,27 - vsldoi 3,3,3, 16-12 - vsldoi 7,7,7, 16-12 - vsldoi 11,11,11, 16-12 - xor 23,23,24 - xor 20,20,25 - rotlwi 21,21,7 - rotlwi 22,22,7 - rotlwi 23,23,7 - rotlwi 20,20,7 - bdnz .Loop_vmx - - subi 5,5,256 - addi 16,16,0x7865 - addi 17,17,0x646e - addi 18,18,0x2d32 - addi 19,19,0x6574 - addis 16,16,0x6170 - addis 17,17,0x3320 - addis 18,18,0x7962 - addis 19,19,0x6b20 - add 20,20,7 - lwz 7,16(6) - add 21,21,8 - lwz 8,20(6) - add 22,22,9 - lwz 9,24(6) - add 23,23,10 - lwz 10,28(6) - add 24,24,7 - add 25,25,8 - add 26,26,9 - add 27,27,10 - add 28,28,11 - add 29,29,12 - add 30,30,14 - add 31,31,15 - - vadduwm 0,0,12 - vadduwm 4,4,12 - vadduwm 8,8,12 - vadduwm 1,1,13 - vadduwm 5,5,13 - vadduwm 9,9,13 - vadduwm 2,2,14 - vadduwm 6,6,14 - vadduwm 10,10,14 - vadduwm 3,3,15 - vadduwm 7,7,16 - vadduwm 11,11,17 - - addi 11,11,4 - vadduwm 15,15,18 - vadduwm 16,16,18 - vadduwm 17,17,18 - - mr 7,16 - rotlwi 16,16,8 - rlwimi 16,7,24,0,7 - rlwimi 16,7,24,16,23 - mr 8,17 - rotlwi 17,17,8 - rlwimi 17,8,24,0,7 - rlwimi 17,8,24,16,23 - mr 9,18 - rotlwi 18,18,8 - rlwimi 18,9,24,0,7 - rlwimi 18,9,24,16,23 - mr 10,19 - rotlwi 19,19,8 - rlwimi 19,10,24,0,7 - rlwimi 19,10,24,16,23 - mr 7,20 - rotlwi 20,20,8 - rlwimi 20,7,24,0,7 - rlwimi 20,7,24,16,23 - mr 8,21 - rotlwi 21,21,8 - rlwimi 21,8,24,0,7 - rlwimi 21,8,24,16,23 - mr 9,22 - rotlwi 22,22,8 - rlwimi 22,9,24,0,7 - rlwimi 22,9,24,16,23 - mr 10,23 - rotlwi 23,23,8 - rlwimi 23,10,24,0,7 - rlwimi 23,10,24,16,23 - mr 7,24 - rotlwi 24,24,8 - rlwimi 24,7,24,0,7 - rlwimi 24,7,24,16,23 - mr 8,25 - rotlwi 25,25,8 - rlwimi 25,8,24,0,7 - rlwimi 25,8,24,16,23 - mr 9,26 - rotlwi 26,26,8 - rlwimi 26,9,24,0,7 - rlwimi 26,9,24,16,23 - mr 10,27 - rotlwi 27,27,8 - rlwimi 27,10,24,0,7 - rlwimi 27,10,24,16,23 - mr 7,28 - rotlwi 28,28,8 - rlwimi 28,7,24,0,7 - rlwimi 28,7,24,16,23 - mr 8,29 - rotlwi 29,29,8 - rlwimi 29,8,24,0,7 - rlwimi 29,8,24,16,23 - mr 9,30 - rotlwi 30,30,8 - rlwimi 30,9,24,0,7 - rlwimi 30,9,24,16,23 - mr 10,31 - rotlwi 31,31,8 - rlwimi 31,10,24,0,7 - rlwimi 31,10,24,16,23 - lwz 7,0(4) - lwz 8,4(4) - lwz 9,8(4) - lwz 10,12(4) - xor 16,16,7 - lwz 7,16(4) - xor 17,17,8 - lwz 8,20(4) - xor 18,18,9 - lwz 9,24(4) - xor 19,19,10 - lwz 10,28(4) - xor 20,20,7 - lwz 7,32(4) - xor 21,21,8 - lwz 8,36(4) - xor 22,22,9 - lwz 9,40(4) - xor 23,23,10 - lwz 10,44(4) - xor 24,24,7 - lwz 7,48(4) - xor 25,25,8 - lwz 8,52(4) - xor 26,26,9 - lwz 9,56(4) - xor 27,27,10 - lwz 10,60(4) - xor 28,28,7 - stw 16,0(3) - xor 29,29,8 - stw 17,4(3) - xor 30,30,9 - stw 18,8(3) - xor 31,31,10 - stw 19,12(3) - addi 4,4,64 - stw 20,16(3) - li 7,16 - stw 21,20(3) - li 8,32 - stw 22,24(3) - li 9,48 - stw 23,28(3) - li 10,64 - stw 24,32(3) - stw 25,36(3) - stw 26,40(3) - stw 27,44(3) - stw 28,48(3) - stw 29,52(3) - stw 30,56(3) - stw 31,60(3) - addi 3,3,64 - - lvx 27,0,4 - lvx 28,7,4 - lvx 29,8,4 - lvx 30,9,4 - lvx 31,10,4 - addi 4,4,64 - - vperm 27,27,28,24 - vperm 28,28,29,24 - vperm 29,29,30,24 - vperm 30,30,31,24 - vxor 0,0,27 - vxor 1,1,28 - lvx 28,7,4 - vxor 2,2,29 - lvx 29,8,4 - vxor 3,3,30 - lvx 30,9,4 - lvx 27,10,4 - addi 4,4,64 - li 10,63 - vperm 0,0,0,25 - vperm 1,1,1,25 - vperm 2,2,2,25 - vperm 3,3,3,25 - - vperm 31,31,28,24 - vperm 28,28,29,24 - vperm 29,29,30,24 - vperm 30,30,27,24 - vxor 4,4,31 - vxor 5,5,28 - lvx 28,7,4 - vxor 6,6,29 - lvx 29,8,4 - vxor 7,7,30 - lvx 30,9,4 - lvx 31,10,4 - addi 4,4,64 - vperm 4,4,4,25 - vperm 5,5,5,25 - vperm 6,6,6,25 - vperm 7,7,7,25 - - vperm 27,27,28,24 - vperm 28,28,29,24 - vperm 29,29,30,24 - vperm 30,30,31,24 - vxor 8,8,27 - vxor 9,9,28 - vxor 10,10,29 - vxor 11,11,30 - vperm 8,8,8,25 - vperm 9,9,9,25 - vperm 10,10,10,25 - vperm 11,11,11,25 - - andi. 17,3,15 - mr 16,3 - - vsel 27,0,1,26 - vsel 28,1,2,26 - vsel 29,2,3,26 - vsel 30,3,4,26 - vsel 1,4,5,26 - vsel 2,5,6,26 - vsel 3,6,7,26 - vsel 4,7,8,26 - vsel 5,8,9,26 - vsel 6,9,10,26 - vsel 7,10,11,26 - - - stvx 27,7,3 - stvx 28,8,3 - stvx 29,9,3 - addi 3,3,64 - stvx 30,0,3 - stvx 1,7,3 - stvx 2,8,3 - stvx 3,9,3 - addi 3,3,64 - stvx 4,0,3 - stvx 5,7,3 - stvx 6,8,3 - stvx 7,9,3 - addi 3,3,64 - - beq .Laligned_vmx - - sub 18,3,17 - li 19,0 -.Lunaligned_tail_vmx: - stvebx 11,19,18 - addi 19,19,1 - cmpw 19,17 - bne .Lunaligned_tail_vmx - - sub 18,16,17 -.Lunaligned_head_vmx: - stvebx 0,17,18 - cmpwi 17,15 - addi 17,17,1 - bne .Lunaligned_head_vmx - - cmplwi 5,255 - bgt .Loop_outer_vmx - - b .Ldone_vmx - -.align 4 -.Laligned_vmx: - stvx 0,0,16 - - cmplwi 5,255 - bgt .Loop_outer_vmx - nop - -.Ldone_vmx: - cmplwi 5,0 - bnel __ChaCha20_1x - - lwz 12,244(1) - li 10,103 - li 11,119 - mtspr 256,12 - lvx 23,10,1 - addi 10,10,32 - lvx 24,11,1 - addi 11,11,32 - lvx 25,10,1 - addi 10,10,32 - lvx 26,11,1 - addi 11,11,32 - lvx 27,10,1 - addi 10,10,32 - lvx 28,11,1 - addi 11,11,32 - lvx 29,10,1 - addi 10,10,32 - lvx 30,11,1 - lvx 31,10,1 - lwz 0, 324(1) - lwz 14,248(1) - lwz 15,252(1) - lwz 16,256(1) - lwz 17,260(1) - lwz 18,264(1) - lwz 19,268(1) - lwz 20,272(1) - lwz 21,276(1) - lwz 22,280(1) - lwz 23,284(1) - lwz 24,288(1) - lwz 25,292(1) - lwz 26,296(1) - lwz 27,300(1) - lwz 28,304(1) - lwz 29,308(1) - lwz 30,312(1) - lwz 31,316(1) - mtlr 0 - addi 1,1,320 - blr -.long 0 -.byte 0,12,0x04,1,0x80,18,5,0 -.long 0 -.size ChaCha20_ctr32_vmx,.-ChaCha20_ctr32_vmx - -.globl ChaCha20_ctr32_vsx -.type ChaCha20_ctr32_vsx,@function -.align 5 -ChaCha20_ctr32_vsx: - stwu 1,-200(1) - mflr 0 - li 10,103 - li 11,119 - mfspr 12,256 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 12,196(1) - li 12,-4096+63 - stw 0, 204(1) - mtspr 256,12 - - bl .Lconsts - .long 0x7E006619 - addi 12,12,0x50 - li 8,16 - li 9,32 - li 10,48 - li 11,64 - - .long 0x7E203619 - .long 0x7E483619 - .long 0x7E603E19 - - vxor 27,27,27 - .long 0x7F8B6619 - vspltw 26,19,0 - vsldoi 19,19,27,4 - vsldoi 19,27,19,12 - vadduwm 26,26,28 - - lvsl 31,0,8 - vspltisb 27,3 - vxor 31,31,27 - - li 0,10 - mtctr 0 - b .Loop_outer_vsx - -.align 5 -.Loop_outer_vsx: - lvx 0,0,12 - lvx 1,8,12 - lvx 2,9,12 - lvx 3,10,12 - - vspltw 4,17,0 - vspltw 5,17,1 - vspltw 6,17,2 - vspltw 7,17,3 - - vspltw 8,18,0 - vspltw 9,18,1 - vspltw 10,18,2 - vspltw 11,18,3 - - vor 12,26,26 - vspltw 13,19,1 - vspltw 14,19,2 - vspltw 15,19,3 - - vspltisw 27,-16 - vspltisw 28,12 - vspltisw 29,8 - vspltisw 30,7 - -.Loop_vsx: - vadduwm 0,0,4 - vadduwm 1,1,5 - vadduwm 2,2,6 - vadduwm 3,3,7 - vxor 12,12,0 - vxor 13,13,1 - vxor 14,14,2 - vxor 15,15,3 - vrlw 12,12,27 - vrlw 13,13,27 - vrlw 14,14,27 - vrlw 15,15,27 - vadduwm 8,8,12 - vadduwm 9,9,13 - vadduwm 10,10,14 - vadduwm 11,11,15 - vxor 4,4,8 - vxor 5,5,9 - vxor 6,6,10 - vxor 7,7,11 - vrlw 4,4,28 - vrlw 5,5,28 - vrlw 6,6,28 - vrlw 7,7,28 - vadduwm 0,0,4 - vadduwm 1,1,5 - vadduwm 2,2,6 - vadduwm 3,3,7 - vxor 12,12,0 - vxor 13,13,1 - vxor 14,14,2 - vxor 15,15,3 - vrlw 12,12,29 - vrlw 13,13,29 - vrlw 14,14,29 - vrlw 15,15,29 - vadduwm 8,8,12 - vadduwm 9,9,13 - vadduwm 10,10,14 - vadduwm 11,11,15 - vxor 4,4,8 - vxor 5,5,9 - vxor 6,6,10 - vxor 7,7,11 - vrlw 4,4,30 - vrlw 5,5,30 - vrlw 6,6,30 - vrlw 7,7,30 - vadduwm 0,0,5 - vadduwm 1,1,6 - vadduwm 2,2,7 - vadduwm 3,3,4 - vxor 15,15,0 - vxor 12,12,1 - vxor 13,13,2 - vxor 14,14,3 - vrlw 15,15,27 - vrlw 12,12,27 - vrlw 13,13,27 - vrlw 14,14,27 - vadduwm 10,10,15 - vadduwm 11,11,12 - vadduwm 8,8,13 - vadduwm 9,9,14 - vxor 5,5,10 - vxor 6,6,11 - vxor 7,7,8 - vxor 4,4,9 - vrlw 5,5,28 - vrlw 6,6,28 - vrlw 7,7,28 - vrlw 4,4,28 - vadduwm 0,0,5 - vadduwm 1,1,6 - vadduwm 2,2,7 - vadduwm 3,3,4 - vxor 15,15,0 - vxor 12,12,1 - vxor 13,13,2 - vxor 14,14,3 - vrlw 15,15,29 - vrlw 12,12,29 - vrlw 13,13,29 - vrlw 14,14,29 - vadduwm 10,10,15 - vadduwm 11,11,12 - vadduwm 8,8,13 - vadduwm 9,9,14 - vxor 5,5,10 - vxor 6,6,11 - vxor 7,7,8 - vxor 4,4,9 - vrlw 5,5,30 - vrlw 6,6,30 - vrlw 7,7,30 - vrlw 4,4,30 - bdnz .Loop_vsx - - vadduwm 12,12,26 - - .long 0x13600F8C - .long 0x13821F8C - .long 0x10000E8C - .long 0x10421E8C - .long 0x13A42F8C - .long 0x13C63F8C - .long 0xF0201057 - .long 0xF0601357 - .long 0xF01BE057 - .long 0xF05BE357 - - .long 0x10842E8C - .long 0x10C63E8C - .long 0x13684F8C - .long 0x138A5F8C - .long 0xF0A43057 - .long 0xF0E43357 - .long 0xF09DF057 - .long 0xF0DDF357 - - .long 0x11084E8C - .long 0x114A5E8C - .long 0x13AC6F8C - .long 0x13CE7F8C - .long 0xF1285057 - .long 0xF1685357 - .long 0xF11BE057 - .long 0xF15BE357 - - .long 0x118C6E8C - .long 0x11CE7E8C - vspltisw 27,4 - vadduwm 26,26,27 - .long 0xF1AC7057 - .long 0xF1EC7357 - .long 0xF19DF057 - .long 0xF1DDF357 - - vadduwm 0,0,16 - vadduwm 4,4,17 - vadduwm 8,8,18 - vadduwm 12,12,19 - - vperm 0,0,0,31 - vperm 4,4,4,31 - vperm 8,8,8,31 - vperm 12,12,12,31 - - cmplwi 5,0x40 - blt .Ltail_vsx - - .long 0x7F602619 - .long 0x7F882619 - .long 0x7FA92619 - .long 0x7FCA2619 - - vxor 27,27,0 - vxor 28,28,4 - vxor 29,29,8 - vxor 30,30,12 - - .long 0x7F601F19 - .long 0x7F881F19 - addi 4,4,0x40 - .long 0x7FA91F19 - subi 5,5,0x40 - .long 0x7FCA1F19 - addi 3,3,0x40 - beq .Ldone_vsx - - vadduwm 0,1,16 - vadduwm 4,5,17 - vadduwm 8,9,18 - vadduwm 12,13,19 - - vperm 0,0,0,31 - vperm 4,4,4,31 - vperm 8,8,8,31 - vperm 12,12,12,31 - - cmplwi 5,0x40 - blt .Ltail_vsx - - .long 0x7F602619 - .long 0x7F882619 - .long 0x7FA92619 - .long 0x7FCA2619 - - vxor 27,27,0 - vxor 28,28,4 - vxor 29,29,8 - vxor 30,30,12 - - .long 0x7F601F19 - .long 0x7F881F19 - addi 4,4,0x40 - .long 0x7FA91F19 - subi 5,5,0x40 - .long 0x7FCA1F19 - addi 3,3,0x40 - beq .Ldone_vsx - - vadduwm 0,2,16 - vadduwm 4,6,17 - vadduwm 8,10,18 - vadduwm 12,14,19 - - vperm 0,0,0,31 - vperm 4,4,4,31 - vperm 8,8,8,31 - vperm 12,12,12,31 - - cmplwi 5,0x40 - blt .Ltail_vsx - - .long 0x7F602619 - .long 0x7F882619 - .long 0x7FA92619 - .long 0x7FCA2619 - - vxor 27,27,0 - vxor 28,28,4 - vxor 29,29,8 - vxor 30,30,12 - - .long 0x7F601F19 - .long 0x7F881F19 - addi 4,4,0x40 - .long 0x7FA91F19 - subi 5,5,0x40 - .long 0x7FCA1F19 - addi 3,3,0x40 - beq .Ldone_vsx - - vadduwm 0,3,16 - vadduwm 4,7,17 - vadduwm 8,11,18 - vadduwm 12,15,19 - - vperm 0,0,0,31 - vperm 4,4,4,31 - vperm 8,8,8,31 - vperm 12,12,12,31 - - cmplwi 5,0x40 - blt .Ltail_vsx - - .long 0x7F602619 - .long 0x7F882619 - .long 0x7FA92619 - .long 0x7FCA2619 - - vxor 27,27,0 - vxor 28,28,4 - vxor 29,29,8 - vxor 30,30,12 - - .long 0x7F601F19 - .long 0x7F881F19 - addi 4,4,0x40 - .long 0x7FA91F19 - subi 5,5,0x40 - .long 0x7FCA1F19 - addi 3,3,0x40 - mtctr 0 - bne .Loop_outer_vsx - -.Ldone_vsx: - lwz 12,196(1) - li 10,103 - li 11,119 - lwz 0, 204(1) - mtspr 256,12 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - mtlr 0 - addi 1,1,200 - blr - -.align 4 -.Ltail_vsx: - addi 11,1,24 - mtctr 5 - .long 0x7C005F19 - .long 0x7C885F19 - .long 0x7D095F19 - .long 0x7D8A5F19 - subi 12,11,1 - subi 4,4,1 - subi 3,3,1 - -.Loop_tail_vsx: - lbzu 6,1(12) - lbzu 7,1(4) - xor 6,6,7 - stbu 6,1(3) - bdnz .Loop_tail_vsx - - .long 0x7E005F19 - .long 0x7E085F19 - .long 0x7E095F19 - .long 0x7E0A5F19 - - b .Ldone_vsx -.long 0 -.byte 0,12,0x04,1,0x80,0,5,0 -.long 0 -.size ChaCha20_ctr32_vsx,.-ChaCha20_ctr32_vsx -.align 5 -.Lconsts: - mflr 0 - bcl 20,31,$+4 - mflr 12 - addi 12,12,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.Lsigma: -.long 0x61707865,0x3320646e,0x79622d32,0x6b206574 -.long 1,0,0,0 -.long 4,0,0,0 -.long 0x02030001,0x06070405,0x0a0b0809,0x0e0f0c0d -.long 0x01020300,0x05060704,0x090a0b08,0x0d0e0f0c -.long 0x61707865,0x61707865,0x61707865,0x61707865 -.long 0x3320646e,0x3320646e,0x3320646e,0x3320646e -.long 0x79622d32,0x79622d32,0x79622d32,0x79622d32 -.long 0x6b206574,0x6b206574,0x6b206574,0x6b206574 -.long 0,1,2,3 -.byte 67,104,97,67,104,97,50,48,32,102,111,114,32,80,111,119,101,114,80,67,47,65,108,116,105,86,101,99,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 2 diff --git a/sys/crypto/openssl/powerpc/ghashp8-ppc.S b/sys/crypto/openssl/powerpc/ghashp8-ppc.S deleted file mode 100644 index 6b662b8727a..00000000000 --- a/sys/crypto/openssl/powerpc/ghashp8-ppc.S +++ /dev/null @@ -1,569 +0,0 @@ -/* Do not modify. This file is auto-generated from ghashp8-ppc.pl. */ -.machine "any" - -.text - -.globl gcm_init_p8 -.type gcm_init_p8,@function -.align 5 -gcm_init_p8: - li 0,-4096 - li 8,0x10 - mfspr 12,256 - li 9,0x20 - mtspr 256,0 - li 10,0x30 - .long 0x7D202699 - - vspltisb 8,-16 - vspltisb 5,1 - vaddubm 8,8,8 - vxor 4,4,4 - vor 8,8,5 - vsldoi 8,8,4,15 - vsldoi 6,4,5,1 - vaddubm 8,8,8 - vspltisb 7,7 - vor 8,8,6 - vspltb 6,9,0 - vsl 9,9,5 - vsrab 6,6,7 - vand 6,6,8 - vxor 3,9,6 - - vsldoi 9,3,3,8 - vsldoi 8,4,8,8 - vsldoi 11,4,9,8 - vsldoi 10,9,4,8 - - .long 0x7D001F99 - .long 0x7D681F99 - li 8,0x40 - .long 0x7D291F99 - li 9,0x50 - .long 0x7D4A1F99 - li 10,0x60 - - .long 0x10035CC8 - .long 0x10234CC8 - .long 0x104354C8 - - .long 0x10E044C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - - vsldoi 6,0,0,8 - .long 0x100044C8 - vxor 6,6,2 - vxor 16,0,6 - - vsldoi 17,16,16,8 - vsldoi 19,4,17,8 - vsldoi 18,17,4,8 - - .long 0x7E681F99 - li 8,0x70 - .long 0x7E291F99 - li 9,0x80 - .long 0x7E4A1F99 - li 10,0x90 - .long 0x10039CC8 - .long 0x11B09CC8 - .long 0x10238CC8 - .long 0x11D08CC8 - .long 0x104394C8 - .long 0x11F094C8 - - .long 0x10E044C8 - .long 0x114D44C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vsldoi 11,14,4,8 - vsldoi 9,4,14,8 - vxor 0,0,5 - vxor 2,2,6 - vxor 13,13,11 - vxor 15,15,9 - - vsldoi 0,0,0,8 - vsldoi 13,13,13,8 - vxor 0,0,7 - vxor 13,13,10 - - vsldoi 6,0,0,8 - vsldoi 9,13,13,8 - .long 0x100044C8 - .long 0x11AD44C8 - vxor 6,6,2 - vxor 9,9,15 - vxor 0,0,6 - vxor 13,13,9 - - vsldoi 9,0,0,8 - vsldoi 17,13,13,8 - vsldoi 11,4,9,8 - vsldoi 10,9,4,8 - vsldoi 19,4,17,8 - vsldoi 18,17,4,8 - - .long 0x7D681F99 - li 8,0xa0 - .long 0x7D291F99 - li 9,0xb0 - .long 0x7D4A1F99 - li 10,0xc0 - .long 0x7E681F99 - .long 0x7E291F99 - .long 0x7E4A1F99 - - mtspr 256,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size gcm_init_p8,.-gcm_init_p8 -.globl gcm_gmult_p8 -.type gcm_gmult_p8,@function -.align 5 -gcm_gmult_p8: - lis 0,0xfff8 - li 8,0x10 - mfspr 12,256 - li 9,0x20 - mtspr 256,0 - li 10,0x30 - .long 0x7C601E99 - - .long 0x7D682699 - - .long 0x7D292699 - - .long 0x7D4A2699 - - .long 0x7D002699 - - vxor 4,4,4 - - .long 0x10035CC8 - .long 0x10234CC8 - .long 0x104354C8 - - .long 0x10E044C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - - vsldoi 6,0,0,8 - .long 0x100044C8 - vxor 6,6,2 - vxor 0,0,6 - - - .long 0x7C001F99 - - mtspr 256,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size gcm_gmult_p8,.-gcm_gmult_p8 - -.globl gcm_ghash_p8 -.type gcm_ghash_p8,@function -.align 5 -gcm_ghash_p8: - li 0,-4096 - li 8,0x10 - mfspr 12,256 - li 9,0x20 - mtspr 256,0 - li 10,0x30 - .long 0x7C001E99 - - .long 0x7D682699 - li 8,0x40 - - .long 0x7D292699 - li 9,0x50 - - .long 0x7D4A2699 - li 10,0x60 - - .long 0x7D002699 - - vxor 4,4,4 - - cmplwi 6,64 - bge .Lgcm_ghash_p8_4x - - .long 0x7C602E99 - addi 5,5,16 - subic. 6,6,16 - - vxor 3,3,0 - beq .Lshort - - .long 0x7E682699 - li 8,16 - .long 0x7E292699 - add 9,5,6 - .long 0x7E4A2699 - b .Loop_2x - -.align 5 -.Loop_2x: - .long 0x7E002E99 - - - subic 6,6,32 - .long 0x10039CC8 - .long 0x11B05CC8 - subfe 0,0,0 - .long 0x10238CC8 - .long 0x11D04CC8 - and 0,0,6 - .long 0x104394C8 - .long 0x11F054C8 - add 5,5,0 - - vxor 0,0,13 - vxor 1,1,14 - - .long 0x10E044C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 2,2,15 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - .long 0x7C682E99 - addi 5,5,32 - - vsldoi 6,0,0,8 - .long 0x100044C8 - - vxor 6,6,2 - vxor 3,3,6 - vxor 3,3,0 - .long 0x7c092840 - bgt .Loop_2x - - cmplwi 6,0 - bne .Leven - -.Lshort: - .long 0x10035CC8 - .long 0x10234CC8 - .long 0x104354C8 - - .long 0x10E044C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - - vsldoi 6,0,0,8 - .long 0x100044C8 - vxor 6,6,2 - -.Leven: - vxor 0,0,6 - - .long 0x7C001F99 - - mtspr 256,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,4,0 -.long 0 -.align 5 -.gcm_ghash_p8_4x: -.Lgcm_ghash_p8_4x: - stwu 1,-232(1) - li 10,39 - li 11,55 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - li 10,0x60 - stvx 31,11,1 - li 0,-1 - stw 12,228(1) - mtspr 256,0 - - lvsl 5,0,8 - - li 8,0x70 - .long 0x7E292699 - li 9,0x80 - vspltisb 6,8 - - li 10,0x90 - .long 0x7EE82699 - li 8,0xa0 - .long 0x7F092699 - li 9,0xb0 - .long 0x7F2A2699 - li 10,0xc0 - .long 0x7FA82699 - li 8,0x10 - .long 0x7FC92699 - li 9,0x20 - .long 0x7FEA2699 - li 10,0x30 - - vsldoi 7,4,6,8 - vaddubm 18,5,7 - vaddubm 19,6,18 - - srwi 6,6,4 - - .long 0x7C602E99 - .long 0x7E082E99 - subic. 6,6,8 - .long 0x7EC92E99 - .long 0x7F8A2E99 - addi 5,5,0x40 - - - - - - vxor 2,3,0 - - .long 0x11B0BCC8 - .long 0x11D0C4C8 - .long 0x11F0CCC8 - - vperm 11,17,9,18 - vperm 5,22,28,19 - vperm 10,17,9,19 - vperm 6,22,28,18 - .long 0x12B68CC8 - .long 0x12855CC8 - .long 0x137C4CC8 - .long 0x134654C8 - - vxor 21,21,14 - vxor 20,20,13 - vxor 27,27,21 - vxor 26,26,15 - - blt .Ltail_4x - -.Loop_4x: - .long 0x7C602E99 - .long 0x7E082E99 - subic. 6,6,4 - .long 0x7EC92E99 - .long 0x7F8A2E99 - addi 5,5,0x40 - - - - - - .long 0x1002ECC8 - .long 0x1022F4C8 - .long 0x1042FCC8 - .long 0x11B0BCC8 - .long 0x11D0C4C8 - .long 0x11F0CCC8 - - vxor 0,0,20 - vxor 1,1,27 - vxor 2,2,26 - vperm 5,22,28,19 - vperm 6,22,28,18 - - .long 0x10E044C8 - .long 0x12855CC8 - .long 0x134654C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - - vsldoi 6,0,0,8 - .long 0x12B68CC8 - .long 0x137C4CC8 - .long 0x100044C8 - - vxor 20,20,13 - vxor 26,26,15 - vxor 2,2,3 - vxor 21,21,14 - vxor 2,2,6 - vxor 27,27,21 - vxor 2,2,0 - bge .Loop_4x - -.Ltail_4x: - .long 0x1002ECC8 - .long 0x1022F4C8 - .long 0x1042FCC8 - - vxor 0,0,20 - vxor 1,1,27 - - .long 0x10E044C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 2,2,26 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - - vsldoi 6,0,0,8 - .long 0x100044C8 - vxor 6,6,2 - vxor 0,0,6 - - addic. 6,6,4 - beq .Ldone_4x - - .long 0x7C602E99 - cmplwi 6,2 - li 6,-4 - blt .Lone - .long 0x7E082E99 - beq .Ltwo - -.Lthree: - .long 0x7EC92E99 - - - - - vxor 2,3,0 - vor 29,23,23 - vor 30,24,24 - vor 31,25,25 - - vperm 5,16,22,19 - vperm 6,16,22,18 - .long 0x12B08CC8 - .long 0x13764CC8 - .long 0x12855CC8 - .long 0x134654C8 - - vxor 27,27,21 - b .Ltail_4x - -.align 4 -.Ltwo: - - - - vxor 2,3,0 - vperm 5,4,16,19 - vperm 6,4,16,18 - - vsldoi 29,4,17,8 - vor 30,17,17 - vsldoi 31,17,4,8 - - .long 0x12855CC8 - .long 0x13704CC8 - .long 0x134654C8 - - b .Ltail_4x - -.align 4 -.Lone: - - - vsldoi 29,4,9,8 - vor 30,9,9 - vsldoi 31,9,4,8 - - vxor 2,3,0 - vxor 20,20,20 - vxor 27,27,27 - vxor 26,26,26 - - b .Ltail_4x - -.Ldone_4x: - - .long 0x7C001F99 - - li 10,39 - li 11,55 - mtspr 256,12 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - addi 1,1,232 - blr -.long 0 -.byte 0,12,0x04,0,0x80,0,4,0 -.long 0 -.size gcm_ghash_p8,.-gcm_ghash_p8 - -.byte 71,72,65,83,72,32,102,111,114,32,80,111,119,101,114,73,83,65,32,50,46,48,55,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 2 diff --git a/sys/crypto/openssl/powerpc/poly1305-ppc.S b/sys/crypto/openssl/powerpc/poly1305-ppc.S deleted file mode 100644 index 5b458a6ec4e..00000000000 --- a/sys/crypto/openssl/powerpc/poly1305-ppc.S +++ /dev/null @@ -1,312 +0,0 @@ -/* Do not modify. This file is auto-generated from poly1305-ppc.pl. */ -.machine "any" -.text -.globl poly1305_init_int -.type poly1305_init_int,@function -.align 4 -poly1305_init_int: - xor 0,0,0 - stw 0,0(3) - stw 0,4(3) - stw 0,8(3) - stw 0,12(3) - stw 0,16(3) - - .long 0x7c040040 - beq- .Lno_key - li 8,4 - lwbrx 7,0,4 - li 9,8 - lwbrx 8,8,4 - li 10,12 - lwbrx 9,9,4 - lwbrx 10,10,4 - lis 0,0xf000 - li 12,-4 - andc 12,12,0 - - andc 7,7,0 - and 8,8,12 - and 9,9,12 - and 10,10,12 - - stw 7,32(3) - stw 8,36(3) - stw 9,40(3) - stw 10,44(3) - -.Lno_key: - xor 3,3,3 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.size poly1305_init_int,.-poly1305_init_int - -.globl poly1305_blocks -.type poly1305_blocks,@function -.align 4 -poly1305_blocks: - srwi. 5,5,4 - beq- .Labort - - stwu 1,-96(1) - mflr 0 - stw 14,24(1) - stw 15,28(1) - stw 16,32(1) - stw 17,36(1) - stw 18,40(1) - stw 19,44(1) - stw 20,48(1) - stw 21,52(1) - stw 22,56(1) - stw 23,60(1) - stw 24,64(1) - stw 25,68(1) - stw 26,72(1) - stw 27,76(1) - stw 28,80(1) - stw 29,84(1) - stw 30,88(1) - stw 31,92(1) - stw 0,100(1) - - lwz 12,32(3) - lwz 14,36(3) - lwz 15,40(3) - lwz 16,44(3) - - lwz 7,0(3) - lwz 8,4(3) - lwz 9,8(3) - lwz 10,12(3) - lwz 11,16(3) - - srwi 17,14,2 - srwi 18,15,2 - srwi 19,16,2 - add 17,17,14 - add 18,18,15 - add 19,19,16 - mtctr 5 - li 0,3 - b .Loop - -.align 4 -.Loop: - li 29,4 - lwbrx 28,0,4 - li 30,8 - lwbrx 29,29,4 - li 31,12 - lwbrx 30,30,4 - lwbrx 31,31,4 - addi 4,4,16 - - addc 7,7,28 - adde 8,8,29 - adde 9,9,30 - - mullw 28,7,12 - mulhwu 24,7,12 - - mullw 29,7,14 - mulhwu 25,7,14 - - mullw 30,7,15 - mulhwu 26,7,15 - - adde 10,10,31 - adde 11,11,6 - - mullw 31,7,16 - mulhwu 27,7,16 - - mullw 20,8,19 - mulhwu 21,8,19 - - mullw 22,8,12 - mulhwu 23,8,12 - addc 28,28,20 - adde 24,24,21 - - mullw 20,8,14 - mulhwu 21,8,14 - addc 29,29,22 - adde 25,25,23 - - mullw 22,8,15 - mulhwu 23,8,15 - addc 30,30,20 - adde 26,26,21 - - mullw 20,9,18 - mulhwu 21,9,18 - addc 31,31,22 - adde 27,27,23 - - mullw 22,9,19 - mulhwu 23,9,19 - addc 28,28,20 - adde 24,24,21 - - mullw 20,9,12 - mulhwu 21,9,12 - addc 29,29,22 - adde 25,25,23 - - mullw 22,9,14 - mulhwu 23,9,14 - addc 30,30,20 - adde 26,26,21 - - mullw 20,10,17 - mulhwu 21,10,17 - addc 31,31,22 - adde 27,27,23 - - mullw 22,10,18 - mulhwu 23,10,18 - addc 28,28,20 - adde 24,24,21 - - mullw 20,10,19 - mulhwu 21,10,19 - addc 29,29,22 - adde 25,25,23 - - mullw 22,10,12 - mulhwu 23,10,12 - addc 30,30,20 - adde 26,26,21 - - mullw 20,11,17 - addc 31,31,22 - adde 27,27,23 - addc 29,29,20 - - mullw 21,11,18 - addze 25,25 - addc 30,30,21 - addze 26,26 - - mullw 22,11,19 - addc 31,31,22 - addze 27,27 - - mullw 11,11,12 - - addc 8,29,24 - adde 9,30,25 - adde 10,31,26 - adde 11,11,27 - - andc 24,11,0 - and 11,11,0 - srwi 25,24,2 - add 24,24,25 - addc 7,28,24 - addze 8,8 - addze 9,9 - addze 10,10 - addze 11,11 - - bdnz .Loop - - stw 7,0(3) - stw 8,4(3) - stw 9,8(3) - stw 10,12(3) - stw 11,16(3) - - lwz 14,24(1) - lwz 15,28(1) - lwz 16,32(1) - lwz 17,36(1) - lwz 18,40(1) - lwz 19,44(1) - lwz 20,48(1) - lwz 21,52(1) - lwz 22,56(1) - lwz 23,60(1) - lwz 24,64(1) - lwz 25,68(1) - lwz 26,72(1) - lwz 27,76(1) - lwz 28,80(1) - lwz 29,84(1) - lwz 30,88(1) - lwz 31,92(1) - addi 1,1,96 -.Labort: - blr -.long 0 -.byte 0,12,4,1,0x80,18,4,0 -.size poly1305_blocks,.-poly1305_blocks - -.globl poly1305_emit -.type poly1305_emit,@function -.align 4 -poly1305_emit: - stwu 1,-96(1) - mflr 0 - stw 28,80(1) - stw 29,84(1) - stw 30,88(1) - stw 31,92(1) - stw 0,100(1) - - lwz 7,0(3) - lwz 8,4(3) - lwz 9,8(3) - lwz 10,12(3) - lwz 11,16(3) - - addic 28,7,5 - addze 29,8 - addze 30,9 - addze 31,10 - addze 0,11 - - srwi 0,0,2 - neg 0,0 - - andc 7,7,0 - and 28,28,0 - andc 8,8,0 - and 29,29,0 - or 7,7,28 - lwz 28,0(5) - andc 9,9,0 - and 30,30,0 - or 8,8,29 - lwz 29,4(5) - andc 10,10,0 - and 31,31,0 - or 9,9,30 - lwz 30,8(5) - or 10,10,31 - lwz 31,12(5) - - addc 7,7,28 - adde 8,8,29 - adde 9,9,30 - adde 10,10,31 - li 29,4 - stwbrx 7,0,4 - li 30,8 - stwbrx 8,29,4 - li 31,12 - stwbrx 9,30,4 - stwbrx 10,31,4 - lwz 28,80(1) - lwz 29,84(1) - lwz 30,88(1) - lwz 31,92(1) - addi 1,1,96 - blr -.long 0 -.byte 0,12,4,1,0x80,4,3,0 -.size poly1305_emit,.-poly1305_emit -.byte 80,111,108,121,49,51,48,53,32,102,111,114,32,80,80,67,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 diff --git a/sys/crypto/openssl/powerpc/poly1305-ppcfp.S b/sys/crypto/openssl/powerpc/poly1305-ppcfp.S deleted file mode 100644 index d983a0b479c..00000000000 --- a/sys/crypto/openssl/powerpc/poly1305-ppcfp.S +++ /dev/null @@ -1,586 +0,0 @@ -/* Do not modify. This file is auto-generated from poly1305-ppcfp.pl. */ -.machine "any" -.text - -.globl poly1305_init_fpu -.type poly1305_init_fpu,@function -.align 6 -poly1305_init_fpu: - stwu 1,-24(1) - mflr 6 - stw 6,28(1) - - bl .LPICmeup - - xor 0,0,0 - mtlr 6 - - lfd 8,8*0(5) - lfd 9,8*1(5) - lfd 10,8*2(5) - lfd 11,8*3(5) - lfd 12,8*4(5) - lfd 13,8*5(5) - - stfd 8,8*0(3) - stfd 9,8*1(3) - stfd 10,8*2(3) - stfd 11,8*3(3) - - .long 0x7c040040 - beq- .Lno_key - - lfd 6,8*13(5) - mffs 7 - - stfd 8,8*4(3) - stfd 9,8*5(3) - stfd 10,8*6(3) - stfd 11,8*7(3) - - li 8,4 - li 9,8 - li 10,12 - lwbrx 7,0,4 - lwbrx 8,8,4 - lwbrx 9,9,4 - lwbrx 10,10,4 - - lis 11,0xf000 - ori 12,11,3 - andc 7,7,11 - andc 8,8,12 - andc 9,9,12 - andc 10,10,12 - - stw 7,36(3) - stw 8,44(3) - stw 9,52(3) - stw 10,60(3) - - mtfsf 255,6 - stfd 8,8*18(3) - stfd 9,8*19(3) - stfd 10,8*20(3) - stfd 11,8*21(3) - stfd 12,8*22(3) - stfd 13,8*23(3) - - lfd 0,8*4(3) - lfd 2,8*5(3) - lfd 4,8*6(3) - lfd 6,8*7(3) - - fsub 0,0,8 - fsub 2,2,9 - fsub 4,4,10 - fsub 6,6,11 - - lfd 8,8*6(5) - lfd 9,8*7(5) - lfd 10,8*8(5) - lfd 11,8*9(5) - - fmul 3,2,13 - fmul 5,4,13 - stfd 7,8*15(3) - fmul 7,6,13 - - fadd 1,0,8 - stfd 3,8*12(3) - fadd 3,2,9 - stfd 5,8*13(3) - fadd 5,4,10 - stfd 7,8*14(3) - fadd 7,6,11 - - fsub 1,1,8 - fsub 3,3,9 - fsub 5,5,10 - fsub 7,7,11 - - lfd 8,8*10(5) - lfd 9,8*11(5) - lfd 10,8*12(5) - - fsub 0,0,1 - fsub 2,2,3 - fsub 4,4,5 - fsub 6,6,7 - - stfd 1,8*5(3) - stfd 3,8*7(3) - stfd 5,8*9(3) - stfd 7,8*11(3) - - stfd 0,8*4(3) - stfd 2,8*6(3) - stfd 4,8*8(3) - stfd 6,8*10(3) - - lfd 2,8*12(3) - lfd 4,8*13(3) - lfd 6,8*14(3) - lfd 0,8*15(3) - - fadd 3,2,8 - fadd 5,4,9 - fadd 7,6,10 - - fsub 3,3,8 - fsub 5,5,9 - fsub 7,7,10 - - fsub 2,2,3 - fsub 4,4,5 - fsub 6,6,7 - - stfd 3,8*13(3) - stfd 5,8*15(3) - stfd 7,8*17(3) - - stfd 2,8*12(3) - stfd 4,8*14(3) - stfd 6,8*16(3) - - mtfsf 255,0 -.Lno_key: - xor 3,3,3 - addi 1,1,24 - blr -.long 0 -.byte 0,12,4,1,0x80,0,2,0 -.size poly1305_init_fpu,.-poly1305_init_fpu - -.globl poly1305_blocks_fpu -.type poly1305_blocks_fpu,@function -.align 4 -poly1305_blocks_fpu: - srwi. 5,5,4 - beq- .Labort - - stwu 1,-216(1) - mflr 0 - stfd 14,72(1) - stfd 15,80(1) - stfd 16,88(1) - stfd 17,96(1) - stfd 18,104(1) - stfd 19,112(1) - stfd 20,120(1) - stfd 21,128(1) - stfd 22,136(1) - stfd 23,144(1) - stfd 24,152(1) - stfd 25,160(1) - stfd 26,168(1) - stfd 27,176(1) - stfd 28,184(1) - stfd 29,192(1) - stfd 30,200(1) - stfd 31,208(1) - stw 0,220(1) - - xor 0,0,0 - li 10,1 - mtctr 5 - neg 5,5 - stw 0,56(1) - stw 10,60(1) - - lfd 8,8*18(3) - lfd 9,8*19(3) - lfd 10,8*20(3) - lfd 11,8*21(3) - lfd 12,8*22(3) - lfd 13,8*23(3) - - lfd 0,8*0(3) - lfd 2,8*1(3) - lfd 4,8*2(3) - lfd 6,8*3(3) - - stfd 8,24(1) - oris 10,6,18736 - stfd 9,32(1) - stfd 10,40(1) - stw 10,48(1) - - li 11,4 - li 12,8 - li 6,12 - lwbrx 7,0,4 - lwbrx 8,11,4 - lwbrx 9,12,4 - lwbrx 10,6,4 - addi 4,4,16 - - stw 7,28(1) - stw 8,36(1) - stw 9,44(1) - stw 10,52(1) - - mffs 28 - lfd 29,56(1) - lfd 14,8*4(3) - lfd 15,8*5(3) - lfd 16,8*6(3) - lfd 17,8*7(3) - lfd 18,8*8(3) - lfd 19,8*9(3) - lfd 24,8*10(3) - lfd 25,8*11(3) - lfd 26,8*12(3) - lfd 27,8*13(3) - lfd 20,8*14(3) - lfd 21,8*15(3) - lfd 22,8*16(3) - lfd 23,8*17(3) - - stfd 28,56(1) - mtfsf 255,29 - - addic 5,5,1 - addze 0,0 - slwi. 0,0,4 - sub 4,4,0 - - lfd 28,24(1) - lfd 29,32(1) - lfd 30,40(1) - lfd 31,48(1) - - fsub 0,0,8 - lwbrx 7,0,4 - fsub 2,2,9 - lwbrx 8,11,4 - fsub 4,4,10 - lwbrx 9,12,4 - fsub 6,6,11 - lwbrx 10,6,4 - - fsub 28,28,8 - addi 4,4,16 - fsub 29,29,9 - fsub 30,30,10 - fsub 31,31,11 - - fadd 28,28,0 - stw 7,28(1) - fadd 29,29,2 - stw 8,36(1) - fadd 30,30,4 - stw 9,44(1) - fadd 31,31,6 - stw 10,52(1) - - b .Lentry - -.align 4 -.Loop: - fsub 30,30,8 - addic 5,5,1 - fsub 31,31,9 - addze 0,0 - fsub 26,26,10 - slwi. 0,0,4 - fsub 27,27,11 - sub 4,4,0 - - fadd 0,0,30 - fadd 1,1,31 - fadd 4,4,26 - fadd 5,5,27 - - - fadd 26,2,10 - lwbrx 7,0,4 - fadd 27,3,10 - lwbrx 8,11,4 - fadd 30,6,12 - lwbrx 9,12,4 - fadd 31,7,12 - lwbrx 10,6,4 - fadd 24,0,9 - addi 4,4,16 - fadd 25,1,9 - fadd 28,4,11 - fadd 29,5,11 - - fsub 26,26,10 - stw 7,28(1) - fsub 27,27,10 - stw 8,36(1) - fsub 30,30,12 - stw 9,44(1) - fsub 31,31,12 - stw 10,52(1) - fsub 24,24,9 - fsub 25,25,9 - fsub 28,28,11 - fsub 29,29,11 - - fsub 2,2,26 - fsub 3,3,27 - fsub 6,6,30 - fsub 7,7,31 - fsub 4,4,28 - fsub 5,5,29 - fsub 0,0,24 - fsub 1,1,25 - - fadd 2,2,24 - fadd 3,3,25 - fadd 6,6,28 - fadd 7,7,29 - fadd 4,4,26 - fadd 5,5,27 - fmadd 0,30,13,0 - fmadd 1,31,13,1 - - fadd 29,2,3 - lfd 26,8*12(3) - fadd 31,6,7 - lfd 27,8*13(3) - fadd 30,4,5 - lfd 24,8*10(3) - fadd 28,0,1 - lfd 25,8*11(3) -.Lentry: - fmul 0,22,29 - fmul 1,23,29 - fmul 4,16,29 - fmul 5,17,29 - fmul 2,14,29 - fmul 3,15,29 - fmul 6,18,29 - fmul 7,19,29 - - fmadd 0,26,31,0 - fmadd 1,27,31,1 - fmadd 4,22,31,4 - fmadd 5,23,31,5 - fmadd 2,20,31,2 - fmadd 3,21,31,3 - fmadd 6,14,31,6 - fmadd 7,15,31,7 - - fmadd 0,20,30,0 - fmadd 1,21,30,1 - fmadd 4,14,30,4 - fmadd 5,15,30,5 - fmadd 2,22,30,2 - fmadd 3,23,30,3 - fmadd 6,16,30,6 - fmadd 7,17,30,7 - - fmadd 0,14,28,0 - lfd 30,24(1) - fmadd 1,15,28,1 - lfd 31,32(1) - fmadd 4,18,28,4 - lfd 26,40(1) - fmadd 5,19,28,5 - lfd 27,48(1) - fmadd 2,16,28,2 - fmadd 3,17,28,3 - fmadd 6,24,28,6 - fmadd 7,25,28,7 - - bdnz .Loop - - - fadd 24,0,9 - fadd 25,1,9 - fadd 28,4,11 - fadd 29,5,11 - fadd 26,2,10 - fadd 27,3,10 - fadd 30,6,12 - fadd 31,7,12 - - fsub 24,24,9 - fsub 25,25,9 - fsub 28,28,11 - fsub 29,29,11 - fsub 26,26,10 - fsub 27,27,10 - fsub 30,30,12 - fsub 31,31,12 - - fsub 2,2,26 - fsub 3,3,27 - fsub 6,6,30 - fsub 7,7,31 - fsub 4,4,28 - fsub 5,5,29 - fsub 0,0,24 - fsub 1,1,25 - - fadd 2,2,24 - fadd 3,3,25 - fadd 6,6,28 - fadd 7,7,29 - fadd 4,4,26 - fadd 5,5,27 - fmadd 0,30,13,0 - fmadd 1,31,13,1 - - fadd 29,2,3 - fadd 31,6,7 - fadd 30,4,5 - fadd 28,0,1 - - lfd 0,56(1) - fadd 29,29,9 - fadd 31,31,11 - fadd 30,30,10 - fadd 28,28,8 - - stfd 29,8*1(3) - stfd 31,8*3(3) - stfd 30,8*2(3) - stfd 28,8*0(3) - - mtfsf 255,0 - lfd 14,72(1) - lfd 15,80(1) - lfd 16,88(1) - lfd 17,96(1) - lfd 18,104(1) - lfd 19,112(1) - lfd 20,120(1) - lfd 21,128(1) - lfd 22,136(1) - lfd 23,144(1) - lfd 24,152(1) - lfd 25,160(1) - lfd 26,168(1) - lfd 27,176(1) - lfd 28,184(1) - lfd 29,192(1) - lfd 30,200(1) - lfd 31,208(1) - addi 1,1,216 -.Labort: - blr -.long 0 -.byte 0,12,4,1,0x80,0,4,0 -.size poly1305_blocks_fpu,.-poly1305_blocks_fpu -.globl poly1305_emit_fpu -.type poly1305_emit_fpu,@function -.align 4 -poly1305_emit_fpu: - stwu 1,-40(1) - mflr 0 - stw 28,24(1) - stw 29,28(1) - stw 30,32(1) - stw 31,36(1) - stw 0,44(1) - - lwz 28,0(3) - lwz 7,4(3) - lwz 29,8(3) - lwz 8,12(3) - lwz 30,16(3) - lwz 9,20(3) - lwz 31,24(3) - lwz 10,28(3) - - lis 0,0xfff0 - andc 28,28,0 - andc 29,29,0 - andc 30,30,0 - andc 31,31,0 - li 0,3 - - srwi 6,31,2 - and 11,31,0 - andc 31,31,0 - add 31,31,6 - addc 7,7,31 - adde 8,8,28 - adde 9,9,29 - adde 10,10,30 - addze 11,11 - - addic 28,7,5 - addze 29,8 - addze 30,9 - addze 31,10 - addze 0,11 - - srwi 0,0,2 - neg 0,0 - srawi 0,0,31 - - andc 7,7,0 - and 28,28,0 - andc 8,8,0 - and 29,29,0 - or 7,7,28 - lwz 28,0(5) - andc 9,9,0 - and 30,30,0 - or 8,8,29 - lwz 29,4(5) - andc 10,10,0 - and 31,31,0 - or 9,9,30 - lwz 30,8(5) - or 10,10,31 - lwz 31,12(5) - - addc 7,7,28 - adde 8,8,29 - adde 9,9,30 - adde 10,10,31 - li 29,4 - stwbrx 7,0,4 - li 30,8 - stwbrx 8,29,4 - li 31,12 - stwbrx 9,30,4 - stwbrx 10,31,4 - lwz 28,24(1) - lwz 29,28(1) - lwz 30,32(1) - lwz 31,36(1) - addi 1,1,40 - blr -.long 0 -.byte 0,12,4,1,0x80,4,3,0 -.size poly1305_emit_fpu,.-poly1305_emit_fpu -.align 6 -.LPICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 5 - addi 5,5,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 - -.long 0x43300000,0x00000000 -.long 0x45300000,0x00000000 -.long 0x47300000,0x00000000 -.long 0x49300000,0x00000000 -.long 0x4b500000,0x00000000 - -.long 0x37f40000,0x00000000 - -.long 0x44300000,0x00000000 -.long 0x46300000,0x00000000 -.long 0x48300000,0x00000000 -.long 0x4a300000,0x00000000 -.long 0x3e300000,0x00000000 -.long 0x40300000,0x00000000 -.long 0x42300000,0x00000000 - -.long 0x00000000,0x00000001 -.byte 80,111,108,121,49,51,48,53,32,102,111,114,32,80,80,67,32,70,80,85,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 4 diff --git a/sys/crypto/openssl/powerpc/ppc-mont.S b/sys/crypto/openssl/powerpc/ppc-mont.S deleted file mode 100644 index 3edbeb636de..00000000000 --- a/sys/crypto/openssl/powerpc/ppc-mont.S +++ /dev/null @@ -1,1787 +0,0 @@ -/* Do not modify. This file is auto-generated from ppc-mont.pl. */ -.machine "any" -.text - -.globl bn_mul_mont_int -.type bn_mul_mont_int,@function -.align 5 -bn_mul_mont_int: - mr 9,3 - li 3,0 - cmpwi 8,32 - bgelr - slwi 8,8,2 - li 12,-4096 - addi 3,8,256 - subf 3,3,1 - and 3,3,12 - subf 3,1,3 - mr 12,1 - srwi 8,8,2 - stwux 1,1,3 - - stw 20,-48(12) - stw 21,-44(12) - stw 22,-40(12) - stw 23,-36(12) - stw 24,-32(12) - stw 25,-28(12) - stw 26,-24(12) - stw 27,-20(12) - stw 28,-16(12) - stw 29,-12(12) - stw 30,-8(12) - stw 31,-4(12) - - lwz 7,0(7) - addi 8,8,-2 - - lwz 23,0(5) - lwz 10,0(4) - addi 22,1,32 - mullw 25,10,23 - mulhwu 26,10,23 - - lwz 10,4(4) - lwz 11,0(6) - - mullw 24,25,7 - - mullw 29,10,23 - mulhwu 30,10,23 - - mullw 27,11,24 - mulhwu 28,11,24 - lwz 11,4(6) - addc 27,27,25 - addze 28,28 - - mullw 31,11,24 - mulhwu 0,11,24 - - mtctr 8 - li 21,8 -.align 4 -.L1st: - lwzx 10,4,21 - addc 25,29,26 - lwzx 11,6,21 - addze 26,30 - mullw 29,10,23 - addc 27,31,28 - mulhwu 30,10,23 - addze 28,0 - mullw 31,11,24 - addc 27,27,25 - mulhwu 0,11,24 - addze 28,28 - stw 27,0(22) - - addi 21,21,4 - addi 22,22,4 - bdnz .L1st - - addc 25,29,26 - addze 26,30 - - addc 27,31,28 - addze 28,0 - addc 27,27,25 - addze 28,28 - stw 27,0(22) - - li 3,0 - addc 28,28,26 - addze 3,3 - stw 28,4(22) - - li 20,4 -.align 4 -.Louter: - lwzx 23,5,20 - lwz 10,0(4) - addi 22,1,32 - lwz 12,32(1) - mullw 25,10,23 - mulhwu 26,10,23 - lwz 10,4(4) - lwz 11,0(6) - addc 25,25,12 - mullw 29,10,23 - addze 26,26 - mullw 24,25,7 - mulhwu 30,10,23 - mullw 27,11,24 - mulhwu 28,11,24 - lwz 11,4(6) - addc 27,27,25 - mullw 31,11,24 - addze 28,28 - mulhwu 0,11,24 - - mtctr 8 - li 21,8 -.align 4 -.Linner: - lwzx 10,4,21 - addc 25,29,26 - lwz 12,4(22) - addze 26,30 - lwzx 11,6,21 - addc 27,31,28 - mullw 29,10,23 - addze 28,0 - mulhwu 30,10,23 - addc 25,25,12 - mullw 31,11,24 - addze 26,26 - mulhwu 0,11,24 - addc 27,27,25 - addi 21,21,4 - addze 28,28 - stw 27,0(22) - addi 22,22,4 - bdnz .Linner - - lwz 12,4(22) - addc 25,29,26 - addze 26,30 - addc 25,25,12 - addze 26,26 - - addc 27,31,28 - addze 28,0 - addc 27,27,25 - addze 28,28 - stw 27,0(22) - - addic 3,3,-1 - li 3,0 - adde 28,28,26 - addze 3,3 - stw 28,4(22) - - slwi 12,8,2 - .long 0x7c146040 - addi 20,20,4 - ble .Louter - - addi 8,8,2 - subfc 21,21,21 - addi 22,1,32 - mtctr 8 - -.align 4 -.Lsub: lwzx 12,22,21 - lwzx 11,6,21 - subfe 10,11,12 - stwx 10,9,21 - addi 21,21,4 - bdnz .Lsub - - li 21,0 - mtctr 8 - subfe 3,21,3 - -.align 4 -.Lcopy: - lwzx 12,22,21 - lwzx 10,9,21 - and 12,12,3 - andc 10,10,3 - stwx 21,22,21 - or 10,10,12 - stwx 10,9,21 - addi 21,21,4 - bdnz .Lcopy - - lwz 12,0(1) - li 3,1 - lwz 20,-48(12) - lwz 21,-44(12) - lwz 22,-40(12) - lwz 23,-36(12) - lwz 24,-32(12) - lwz 25,-28(12) - lwz 26,-24(12) - lwz 27,-20(12) - lwz 28,-16(12) - lwz 29,-12(12) - lwz 30,-8(12) - lwz 31,-4(12) - mr 1,12 - blr -.long 0 -.byte 0,12,4,0,0x80,12,6,0 -.long 0 -.size bn_mul_mont_int,.-bn_mul_mont_int -.globl bn_mul4x_mont_int -.type bn_mul4x_mont_int,@function -.align 5 -bn_mul4x_mont_int: - andi. 0,8,7 - bne .Lmul4x_do - .long 0x7c042840 - bne .Lmul4x_do - b .Lsqr8x_do -.Lmul4x_do: - slwi 8,8,2 - mr 9,1 - li 10,-32*4 - sub 10,10,8 - stwux 1,1,10 - - stw 14,-4*18(9) - stw 15,-4*17(9) - stw 16,-4*16(9) - stw 17,-4*15(9) - stw 18,-4*14(9) - stw 19,-4*13(9) - stw 20,-4*12(9) - stw 21,-4*11(9) - stw 22,-4*10(9) - stw 23,-4*9(9) - stw 24,-4*8(9) - stw 25,-4*7(9) - stw 26,-4*6(9) - stw 27,-4*5(9) - stw 28,-4*4(9) - stw 29,-4*3(9) - stw 30,-4*2(9) - stw 31,-4*1(9) - - subi 4,4,4 - subi 6,6,4 - subi 3,3,4 - lwz 7,0(7) - - add 14,5,8 - add 30,4,8 - subi 14,14,4*4 - - lwz 27,4*0(5) - li 22,0 - lwz 9,4*1(4) - li 23,0 - lwz 10,4*2(4) - li 24,0 - lwz 11,4*3(4) - li 25,0 - lwzu 12,4*4(4) - lwz 18,4*1(6) - lwz 19,4*2(6) - lwz 20,4*3(6) - lwzu 21,4*4(6) - - stw 3,4*6(1) - stw 14,4*7(1) - li 3,0 - addic 29,1,4*7 - li 31,0 - li 0,0 - b .Loop_mul4x_1st_reduction - -.align 5 -.Loop_mul4x_1st_reduction: - mullw 14,9,27 - addze 3,3 - mullw 15,10,27 - addi 31,31,4 - mullw 16,11,27 - andi. 31,31,4*4-1 - mullw 17,12,27 - addc 22,22,14 - mulhwu 14,9,27 - adde 23,23,15 - mulhwu 15,10,27 - adde 24,24,16 - mullw 28,22,7 - adde 25,25,17 - mulhwu 16,11,27 - addze 26,0 - mulhwu 17,12,27 - lwzx 27,5,31 - addc 23,23,14 - - stwu 28,4(29) - adde 24,24,15 - mullw 15,19,28 - adde 25,25,16 - mullw 16,20,28 - adde 26,26,17 - mullw 17,21,28 - - - - - - - - - - - addic 22,22,-1 - mulhwu 14,18,28 - adde 22,23,15 - mulhwu 15,19,28 - adde 23,24,16 - mulhwu 16,20,28 - adde 24,25,17 - mulhwu 17,21,28 - adde 25,26,3 - addze 3,0 - addc 22,22,14 - adde 23,23,15 - adde 24,24,16 - adde 25,25,17 - - bne .Loop_mul4x_1st_reduction - - .long 0x7c1e2040 - beq .Lmul4x4_post_condition - - lwz 9,4*1(4) - lwz 10,4*2(4) - lwz 11,4*3(4) - lwzu 12,4*4(4) - lwz 28,4*8(1) - lwz 18,4*1(6) - lwz 19,4*2(6) - lwz 20,4*3(6) - lwzu 21,4*4(6) - b .Loop_mul4x_1st_tail - -.align 5 -.Loop_mul4x_1st_tail: - mullw 14,9,27 - addze 3,3 - mullw 15,10,27 - addi 31,31,4 - mullw 16,11,27 - andi. 31,31,4*4-1 - mullw 17,12,27 - addc 22,22,14 - mulhwu 14,9,27 - adde 23,23,15 - mulhwu 15,10,27 - adde 24,24,16 - mulhwu 16,11,27 - adde 25,25,17 - mulhwu 17,12,27 - addze 26,0 - lwzx 27,5,31 - addc 23,23,14 - mullw 14,18,28 - adde 24,24,15 - mullw 15,19,28 - adde 25,25,16 - mullw 16,20,28 - adde 26,26,17 - mullw 17,21,28 - addc 22,22,14 - mulhwu 14,18,28 - adde 23,23,15 - mulhwu 15,19,28 - adde 24,24,16 - mulhwu 16,20,28 - adde 25,25,17 - adde 26,26,3 - mulhwu 17,21,28 - addze 3,0 - addi 28,1,4*8 - lwzx 28,28,31 - stwu 22,4(29) - addc 22,23,14 - adde 23,24,15 - adde 24,25,16 - adde 25,26,17 - - bne .Loop_mul4x_1st_tail - - sub 15,30,8 - .long 0x7c1e2040 - beq .Lmul4x_proceed - - lwz 9,4*1(4) - lwz 10,4*2(4) - lwz 11,4*3(4) - lwzu 12,4*4(4) - lwz 18,4*1(6) - lwz 19,4*2(6) - lwz 20,4*3(6) - lwzu 21,4*4(6) - b .Loop_mul4x_1st_tail - -.align 5 -.Lmul4x_proceed: - lwzu 27,4*4(5) - addze 3,3 - lwz 9,4*1(15) - lwz 10,4*2(15) - lwz 11,4*3(15) - lwz 12,4*4(15) - addi 4,15,4*4 - sub 6,6,8 - - stw 22,4*1(29) - stw 23,4*2(29) - stw 24,4*3(29) - stw 25,4*4(29) - stw 3,4*5(29) - lwz 22,4*12(1) - lwz 23,4*13(1) - lwz 24,4*14(1) - lwz 25,4*15(1) - - lwz 18,4*1(6) - lwz 19,4*2(6) - lwz 20,4*3(6) - lwzu 21,4*4(6) - addic 29,1,4*7 - li 3,0 - b .Loop_mul4x_reduction - -.align 5 -.Loop_mul4x_reduction: - mullw 14,9,27 - addze 3,3 - mullw 15,10,27 - addi 31,31,4 - mullw 16,11,27 - andi. 31,31,4*4-1 - mullw 17,12,27 - addc 22,22,14 - mulhwu 14,9,27 - adde 23,23,15 - mulhwu 15,10,27 - adde 24,24,16 - mullw 28,22,7 - adde 25,25,17 - mulhwu 16,11,27 - addze 26,0 - mulhwu 17,12,27 - lwzx 27,5,31 - addc 23,23,14 - - stwu 28,4(29) - adde 24,24,15 - mullw 15,19,28 - adde 25,25,16 - mullw 16,20,28 - adde 26,26,17 - mullw 17,21,28 - - addic 22,22,-1 - mulhwu 14,18,28 - adde 22,23,15 - mulhwu 15,19,28 - adde 23,24,16 - mulhwu 16,20,28 - adde 24,25,17 - mulhwu 17,21,28 - adde 25,26,3 - addze 3,0 - addc 22,22,14 - adde 23,23,15 - adde 24,24,16 - adde 25,25,17 - - bne .Loop_mul4x_reduction - - lwz 14,4*5(29) - addze 3,3 - lwz 15,4*6(29) - lwz 16,4*7(29) - lwz 17,4*8(29) - lwz 9,4*1(4) - lwz 10,4*2(4) - lwz 11,4*3(4) - lwzu 12,4*4(4) - addc 22,22,14 - adde 23,23,15 - adde 24,24,16 - adde 25,25,17 - - - lwz 28,4*8(1) - lwz 18,4*1(6) - lwz 19,4*2(6) - lwz 20,4*3(6) - lwzu 21,4*4(6) - b .Loop_mul4x_tail - -.align 5 -.Loop_mul4x_tail: - mullw 14,9,27 - addze 3,3 - mullw 15,10,27 - addi 31,31,4 - mullw 16,11,27 - andi. 31,31,4*4-1 - mullw 17,12,27 - addc 22,22,14 - mulhwu 14,9,27 - adde 23,23,15 - mulhwu 15,10,27 - adde 24,24,16 - mulhwu 16,11,27 - adde 25,25,17 - mulhwu 17,12,27 - addze 26,0 - lwzx 27,5,31 - addc 23,23,14 - mullw 14,18,28 - adde 24,24,15 - mullw 15,19,28 - adde 25,25,16 - mullw 16,20,28 - adde 26,26,17 - mullw 17,21,28 - addc 22,22,14 - mulhwu 14,18,28 - adde 23,23,15 - mulhwu 15,19,28 - adde 24,24,16 - mulhwu 16,20,28 - adde 25,25,17 - mulhwu 17,21,28 - adde 26,26,3 - addi 28,1,4*8 - lwzx 28,28,31 - addze 3,0 - stwu 22,4(29) - addc 22,23,14 - adde 23,24,15 - adde 24,25,16 - adde 25,26,17 - - bne .Loop_mul4x_tail - - lwz 14,4*5(29) - sub 15,6,8 - addze 3,3 - .long 0x7c1e2040 - beq .Loop_mul4x_break - - lwz 15,4*6(29) - lwz 16,4*7(29) - lwz 17,4*8(29) - lwz 9,4*1(4) - lwz 10,4*2(4) - lwz 11,4*3(4) - lwzu 12,4*4(4) - addc 22,22,14 - adde 23,23,15 - adde 24,24,16 - adde 25,25,17 - - - lwz 18,4*1(6) - lwz 19,4*2(6) - lwz 20,4*3(6) - lwzu 21,4*4(6) - b .Loop_mul4x_tail - -.align 5 -.Loop_mul4x_break: - lwz 16,4*6(1) - lwz 17,4*7(1) - addc 9,22,14 - lwz 22,4*12(1) - addze 10,23 - lwz 23,4*13(1) - addze 11,24 - lwz 24,4*14(1) - addze 12,25 - lwz 25,4*15(1) - addze 3,3 - stw 9,4*1(29) - sub 4,30,8 - stw 10,4*2(29) - stw 11,4*3(29) - stw 12,4*4(29) - stw 3,4*5(29) - - lwz 18,4*1(15) - lwz 19,4*2(15) - lwz 20,4*3(15) - lwz 21,4*4(15) - addi 6,15,4*4 - .long 0x7c058840 - beq .Lmul4x_post - - lwzu 27,4*4(5) - lwz 9,4*1(4) - lwz 10,4*2(4) - lwz 11,4*3(4) - lwzu 12,4*4(4) - li 3,0 - addic 29,1,4*7 - b .Loop_mul4x_reduction - -.align 5 -.Lmul4x_post: - - - - - srwi 31,8,4 - mr 5,16 - subi 31,31,1 - mr 30,16 - subfc 14,18,22 - addi 29,1,4*15 - subfe 15,19,23 - - mtctr 31 -.Lmul4x_sub: - lwz 18,4*1(6) - lwz 22,4*1(29) - subfe 16,20,24 - lwz 19,4*2(6) - lwz 23,4*2(29) - subfe 17,21,25 - lwz 20,4*3(6) - lwz 24,4*3(29) - lwzu 21,4*4(6) - lwzu 25,4*4(29) - stw 14,4*1(5) - stw 15,4*2(5) - subfe 14,18,22 - stw 16,4*3(5) - stwu 17,4*4(5) - subfe 15,19,23 - bdnz .Lmul4x_sub - - lwz 9,4*1(30) - stw 14,4*1(5) - lwz 14,4*12(1) - subfe 16,20,24 - lwz 10,4*2(30) - stw 15,4*2(5) - lwz 15,4*13(1) - subfe 17,21,25 - subfe 3,0,3 - addi 29,1,4*12 - lwz 11,4*3(30) - stw 16,4*3(5) - lwz 16,4*14(1) - lwz 12,4*4(30) - stw 17,4*4(5) - lwz 17,4*15(1) - - mtctr 31 -.Lmul4x_cond_copy: - and 14,14,3 - andc 9,9,3 - stw 0,4*0(29) - and 15,15,3 - andc 10,10,3 - stw 0,4*1(29) - and 16,16,3 - andc 11,11,3 - stw 0,4*2(29) - and 17,17,3 - andc 12,12,3 - stw 0,4*3(29) - or 22,14,9 - lwz 9,4*5(30) - lwz 14,4*4(29) - or 23,15,10 - lwz 10,4*6(30) - lwz 15,4*5(29) - or 24,16,11 - lwz 11,4*7(30) - lwz 16,4*6(29) - or 25,17,12 - lwz 12,4*8(30) - lwz 17,4*7(29) - addi 29,29,4*4 - stw 22,4*1(30) - stw 23,4*2(30) - stw 24,4*3(30) - stwu 25,4*4(30) - bdnz .Lmul4x_cond_copy - - lwz 5,0(1) - and 14,14,3 - andc 9,9,3 - stw 0,4*0(29) - and 15,15,3 - andc 10,10,3 - stw 0,4*1(29) - and 16,16,3 - andc 11,11,3 - stw 0,4*2(29) - and 17,17,3 - andc 12,12,3 - stw 0,4*3(29) - or 22,14,9 - or 23,15,10 - stw 0,4*4(29) - or 24,16,11 - or 25,17,12 - stw 22,4*1(30) - stw 23,4*2(30) - stw 24,4*3(30) - stw 25,4*4(30) - - b .Lmul4x_done - -.align 4 -.Lmul4x4_post_condition: - lwz 4,4*6(1) - lwz 5,0(1) - addze 3,3 - - subfc 9,18,22 - subfe 10,19,23 - subfe 11,20,24 - subfe 12,21,25 - subfe 3,0,3 - - and 18,18,3 - and 19,19,3 - addc 9,9,18 - and 20,20,3 - adde 10,10,19 - and 21,21,3 - adde 11,11,20 - adde 12,12,21 - - stw 9,4*1(4) - stw 10,4*2(4) - stw 11,4*3(4) - stw 12,4*4(4) - -.Lmul4x_done: - stw 0,4*8(1) - stw 0,4*9(1) - stw 0,4*10(1) - stw 0,4*11(1) - li 3,1 - lwz 14,-4*18(5) - lwz 15,-4*17(5) - lwz 16,-4*16(5) - lwz 17,-4*15(5) - lwz 18,-4*14(5) - lwz 19,-4*13(5) - lwz 20,-4*12(5) - lwz 21,-4*11(5) - lwz 22,-4*10(5) - lwz 23,-4*9(5) - lwz 24,-4*8(5) - lwz 25,-4*7(5) - lwz 26,-4*6(5) - lwz 27,-4*5(5) - lwz 28,-4*4(5) - lwz 29,-4*3(5) - lwz 30,-4*2(5) - lwz 31,-4*1(5) - mr 1,5 - blr -.long 0 -.byte 0,12,4,0x20,0x80,18,6,0 -.long 0 -.size bn_mul4x_mont_int,.-bn_mul4x_mont_int -.align 5 -__bn_sqr8x_mont: -.Lsqr8x_do: - mr 9,1 - slwi 10,8,3 - li 11,-32*4 - sub 10,11,10 - slwi 8,8,2 - stwux 1,1,10 - - stw 14,-4*18(9) - stw 15,-4*17(9) - stw 16,-4*16(9) - stw 17,-4*15(9) - stw 18,-4*14(9) - stw 19,-4*13(9) - stw 20,-4*12(9) - stw 21,-4*11(9) - stw 22,-4*10(9) - stw 23,-4*9(9) - stw 24,-4*8(9) - stw 25,-4*7(9) - stw 26,-4*6(9) - stw 27,-4*5(9) - stw 28,-4*4(9) - stw 29,-4*3(9) - stw 30,-4*2(9) - stw 31,-4*1(9) - - subi 4,4,4 - subi 18,6,4 - subi 3,3,4 - lwz 7,0(7) - li 0,0 - - add 6,4,8 - lwz 9,4*1(4) - - lwz 10,4*2(4) - li 23,0 - lwz 11,4*3(4) - li 24,0 - lwz 12,4*4(4) - li 25,0 - lwz 14,4*5(4) - li 26,0 - lwz 15,4*6(4) - li 27,0 - lwz 16,4*7(4) - li 28,0 - lwzu 17,4*8(4) - li 29,0 - - addi 5,1,4*11 - subic. 30,8,4*8 - b .Lsqr8x_zero_start - -.align 5 -.Lsqr8x_zero: - subic. 30,30,4*8 - stw 0,4*1(5) - stw 0,4*2(5) - stw 0,4*3(5) - stw 0,4*4(5) - stw 0,4*5(5) - stw 0,4*6(5) - stw 0,4*7(5) - stw 0,4*8(5) -.Lsqr8x_zero_start: - stw 0,4*9(5) - stw 0,4*10(5) - stw 0,4*11(5) - stw 0,4*12(5) - stw 0,4*13(5) - stw 0,4*14(5) - stw 0,4*15(5) - stwu 0,4*16(5) - bne .Lsqr8x_zero - - stw 3,4*6(1) - stw 18,4*7(1) - stw 7,4*8(1) - stw 5,4*9(1) - stw 0,4*10(1) - addi 5,1,4*11 - - -.align 5 -.Lsqr8x_outer_loop: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - mullw 18,10,9 - mullw 19,11,9 - mullw 20,12,9 - mullw 21,14,9 - addc 23,23,18 - mullw 18,15,9 - adde 24,24,19 - mullw 19,16,9 - adde 25,25,20 - mullw 20,17,9 - adde 26,26,21 - mulhwu 21,10,9 - adde 27,27,18 - mulhwu 18,11,9 - adde 28,28,19 - mulhwu 19,12,9 - adde 29,29,20 - mulhwu 20,14,9 - stw 22,4*1(5) - addze 22,0 - stw 23,4*2(5) - addc 24,24,21 - mulhwu 21,15,9 - adde 25,25,18 - mulhwu 18,16,9 - adde 26,26,19 - mulhwu 19,17,9 - adde 27,27,20 - mullw 20,11,10 - adde 28,28,21 - mullw 21,12,10 - adde 29,29,18 - mullw 18,14,10 - adde 22,22,19 - - mullw 19,15,10 - addc 25,25,20 - mullw 20,16,10 - adde 26,26,21 - mullw 21,17,10 - adde 27,27,18 - mulhwu 18,11,10 - adde 28,28,19 - mulhwu 19,12,10 - adde 29,29,20 - mulhwu 20,14,10 - adde 22,22,21 - mulhwu 21,15,10 - stw 24,4*3(5) - addze 23,0 - stw 25,4*4(5) - addc 26,26,18 - mulhwu 18,16,10 - adde 27,27,19 - mulhwu 19,17,10 - adde 28,28,20 - mullw 20,12,11 - adde 29,29,21 - mullw 21,14,11 - adde 22,22,18 - mullw 18,15,11 - adde 23,23,19 - - mullw 19,16,11 - addc 27,27,20 - mullw 20,17,11 - adde 28,28,21 - mulhwu 21,12,11 - adde 29,29,18 - mulhwu 18,14,11 - adde 22,22,19 - mulhwu 19,15,11 - adde 23,23,20 - mulhwu 20,16,11 - stw 26,4*5(5) - addze 24,0 - stw 27,4*6(5) - addc 28,28,21 - mulhwu 21,17,11 - adde 29,29,18 - mullw 18,14,12 - adde 22,22,19 - mullw 19,15,12 - adde 23,23,20 - mullw 20,16,12 - adde 24,24,21 - - mullw 21,17,12 - addc 29,29,18 - mulhwu 18,14,12 - adde 22,22,19 - mulhwu 19,15,12 - adde 23,23,20 - mulhwu 20,16,12 - adde 24,24,21 - mulhwu 21,17,12 - stw 28,4*7(5) - addze 25,0 - stwu 29,4*8(5) - addc 22,22,18 - mullw 18,15,14 - adde 23,23,19 - mullw 19,16,14 - adde 24,24,20 - mullw 20,17,14 - adde 25,25,21 - - mulhwu 21,15,14 - addc 23,23,18 - mulhwu 18,16,14 - adde 24,24,19 - mulhwu 19,17,14 - adde 25,25,20 - mullw 20,16,15 - addze 26,0 - addc 24,24,21 - mullw 21,17,15 - adde 25,25,18 - mulhwu 18,16,15 - adde 26,26,19 - - mulhwu 19,17,15 - addc 25,25,20 - mullw 20,17,16 - adde 26,26,21 - mulhwu 21,17,16 - addze 27,0 - addc 26,26,18 - .long 0x7c062040 - adde 27,27,19 - - addc 27,27,20 - sub 18,6,8 - addze 28,0 - add 28,28,21 - - beq .Lsqr8x_outer_break - - mr 7,9 - lwz 9,4*1(5) - lwz 10,4*2(5) - lwz 11,4*3(5) - lwz 12,4*4(5) - lwz 14,4*5(5) - lwz 15,4*6(5) - lwz 16,4*7(5) - lwz 17,4*8(5) - addc 22,22,9 - lwz 9,4*1(4) - adde 23,23,10 - lwz 10,4*2(4) - adde 24,24,11 - lwz 11,4*3(4) - adde 25,25,12 - lwz 12,4*4(4) - adde 26,26,14 - lwz 14,4*5(4) - adde 27,27,15 - lwz 15,4*6(4) - adde 28,28,16 - lwz 16,4*7(4) - subi 3,4,4*7 - addze 29,17 - lwzu 17,4*8(4) - - li 30,0 - b .Lsqr8x_mul - - - - - - - - - - - - - - - - - - - - - - - -.align 5 -.Lsqr8x_mul: - mullw 18,9,7 - addze 31,0 - mullw 19,10,7 - addi 30,30,4 - mullw 20,11,7 - andi. 30,30,4*8-1 - mullw 21,12,7 - addc 22,22,18 - mullw 18,14,7 - adde 23,23,19 - mullw 19,15,7 - adde 24,24,20 - mullw 20,16,7 - adde 25,25,21 - mullw 21,17,7 - adde 26,26,18 - mulhwu 18,9,7 - adde 27,27,19 - mulhwu 19,10,7 - adde 28,28,20 - mulhwu 20,11,7 - adde 29,29,21 - mulhwu 21,12,7 - addze 31,31 - stwu 22,4(5) - addc 22,23,18 - mulhwu 18,14,7 - adde 23,24,19 - mulhwu 19,15,7 - adde 24,25,20 - mulhwu 20,16,7 - adde 25,26,21 - mulhwu 21,17,7 - lwzx 7,3,30 - adde 26,27,18 - adde 27,28,19 - adde 28,29,20 - adde 29,31,21 - - bne .Lsqr8x_mul - - - .long 0x7c043040 - beq .Lsqr8x_break - - lwz 9,4*1(5) - lwz 10,4*2(5) - lwz 11,4*3(5) - lwz 12,4*4(5) - lwz 14,4*5(5) - lwz 15,4*6(5) - lwz 16,4*7(5) - lwz 17,4*8(5) - addc 22,22,9 - lwz 9,4*1(4) - adde 23,23,10 - lwz 10,4*2(4) - adde 24,24,11 - lwz 11,4*3(4) - adde 25,25,12 - lwz 12,4*4(4) - adde 26,26,14 - lwz 14,4*5(4) - adde 27,27,15 - lwz 15,4*6(4) - adde 28,28,16 - lwz 16,4*7(4) - adde 29,29,17 - lwzu 17,4*8(4) - - b .Lsqr8x_mul - -.align 5 -.Lsqr8x_break: - lwz 9,4*8(3) - addi 4,3,4*15 - lwz 10,4*9(3) - sub. 18,6,4 - lwz 11,4*10(3) - sub 19,5,18 - lwz 12,4*11(3) - lwz 14,4*12(3) - lwz 15,4*13(3) - lwz 16,4*14(3) - lwz 17,4*15(3) - beq .Lsqr8x_outer_loop - - stw 22,4*1(5) - lwz 22,4*1(19) - stw 23,4*2(5) - lwz 23,4*2(19) - stw 24,4*3(5) - lwz 24,4*3(19) - stw 25,4*4(5) - lwz 25,4*4(19) - stw 26,4*5(5) - lwz 26,4*5(19) - stw 27,4*6(5) - lwz 27,4*6(19) - stw 28,4*7(5) - lwz 28,4*7(19) - stw 29,4*8(5) - lwz 29,4*8(19) - mr 5,19 - b .Lsqr8x_outer_loop - -.align 5 -.Lsqr8x_outer_break: - - - lwz 10,4*1(18) - lwz 12,4*2(18) - lwz 15,4*3(18) - lwz 17,4*4(18) - addi 4,18,4*4 - - lwz 19,4*13(1) - lwz 20,4*14(1) - lwz 21,4*15(1) - lwz 18,4*16(1) - - stw 22,4*1(5) - srwi 30,8,4 - stw 23,4*2(5) - subi 30,30,1 - stw 24,4*3(5) - stw 25,4*4(5) - stw 26,4*5(5) - stw 27,4*6(5) - stw 28,4*7(5) - - addi 5,1,4*11 - mullw 22,10,10 - mulhwu 10,10,10 - add 23,19,19 - srwi 19,19,32-1 - mullw 11,12,12 - mulhwu 12,12,12 - addc 23,23,10 - add 24,20,20 - srwi 20,20,32-1 - add 25,21,21 - srwi 21,21,32-1 - or 24,24,19 - - mtctr 30 -.Lsqr4x_shift_n_add: - mullw 14,15,15 - mulhwu 15,15,15 - lwz 19,4*6(5) - lwz 10,4*1(4) - adde 24,24,11 - add 26,18,18 - srwi 18,18,32-1 - or 25,25,20 - lwz 20,4*7(5) - adde 25,25,12 - lwz 12,4*2(4) - add 27,19,19 - srwi 19,19,32-1 - or 26,26,21 - lwz 21,4*8(5) - mullw 16,17,17 - mulhwu 17,17,17 - adde 26,26,14 - add 28,20,20 - srwi 20,20,32-1 - or 27,27,18 - lwz 18,4*9(5) - adde 27,27,15 - lwz 15,4*3(4) - add 29,21,21 - srwi 21,21,32-1 - or 28,28,19 - lwz 19,4*10(5) - mullw 9,10,10 - mulhwu 10,10,10 - adde 28,28,16 - stw 22,4*1(5) - add 22,18,18 - srwi 18,18,32-1 - or 29,29,20 - lwz 20,4*11(5) - adde 29,29,17 - lwzu 17,4*4(4) - stw 23,4*2(5) - add 23,19,19 - srwi 19,19,32-1 - or 22,22,21 - lwz 21,4*12(5) - mullw 11,12,12 - mulhwu 12,12,12 - adde 22,22,9 - stw 24,4*3(5) - add 24,20,20 - srwi 20,20,32-1 - or 23,23,18 - lwz 18,4*13(5) - adde 23,23,10 - stw 25,4*4(5) - stw 26,4*5(5) - stw 27,4*6(5) - stw 28,4*7(5) - stwu 29,4*8(5) - add 25,21,21 - srwi 21,21,32-1 - or 24,24,19 - bdnz .Lsqr4x_shift_n_add - lwz 4,4*7(1) - lwz 7,4*8(1) - - mullw 14,15,15 - mulhwu 15,15,15 - stw 22,4*1(5) - lwz 22,4*12(1) - lwz 19,4*6(5) - adde 24,24,11 - add 26,18,18 - srwi 18,18,32-1 - or 25,25,20 - lwz 20,4*7(5) - adde 25,25,12 - add 27,19,19 - srwi 19,19,32-1 - or 26,26,21 - mullw 16,17,17 - mulhwu 17,17,17 - adde 26,26,14 - add 28,20,20 - srwi 20,20,32-1 - or 27,27,18 - stw 23,4*2(5) - lwz 23,4*13(1) - adde 27,27,15 - or 28,28,19 - lwz 9,4*1(4) - lwz 10,4*2(4) - adde 28,28,16 - lwz 11,4*3(4) - lwz 12,4*4(4) - adde 29,17,20 - lwz 14,4*5(4) - lwz 15,4*6(4) - - - - mullw 31,7,22 - li 30,8 - lwz 16,4*7(4) - add 6,4,8 - lwzu 17,4*8(4) - stw 24,4*3(5) - lwz 24,4*14(1) - stw 25,4*4(5) - lwz 25,4*15(1) - stw 26,4*5(5) - lwz 26,4*16(1) - stw 27,4*6(5) - lwz 27,4*17(1) - stw 28,4*7(5) - lwz 28,4*18(1) - stw 29,4*8(5) - lwz 29,4*19(1) - addi 5,1,4*11 - mtctr 30 - b .Lsqr8x_reduction - -.align 5 -.Lsqr8x_reduction: - - mullw 19,10,31 - mullw 20,11,31 - stwu 31,4(5) - mullw 21,12,31 - - addic 22,22,-1 - mullw 18,14,31 - adde 22,23,19 - mullw 19,15,31 - adde 23,24,20 - mullw 20,16,31 - adde 24,25,21 - mullw 21,17,31 - adde 25,26,18 - mulhwu 18,9,31 - adde 26,27,19 - mulhwu 19,10,31 - adde 27,28,20 - mulhwu 20,11,31 - adde 28,29,21 - mulhwu 21,12,31 - addze 29,0 - addc 22,22,18 - mulhwu 18,14,31 - adde 23,23,19 - mulhwu 19,15,31 - adde 24,24,20 - mulhwu 20,16,31 - adde 25,25,21 - mulhwu 21,17,31 - mullw 31,7,22 - adde 26,26,18 - adde 27,27,19 - adde 28,28,20 - adde 29,29,21 - bdnz .Lsqr8x_reduction - - lwz 18,4*1(5) - lwz 19,4*2(5) - lwz 20,4*3(5) - lwz 21,4*4(5) - subi 3,5,4*7 - .long 0x7c062040 - addc 22,22,18 - lwz 18,4*5(5) - adde 23,23,19 - lwz 19,4*6(5) - adde 24,24,20 - lwz 20,4*7(5) - adde 25,25,21 - lwz 21,4*8(5) - adde 26,26,18 - adde 27,27,19 - adde 28,28,20 - adde 29,29,21 - - beq .Lsqr8x8_post_condition - - lwz 7,4*0(3) - lwz 9,4*1(4) - lwz 10,4*2(4) - lwz 11,4*3(4) - lwz 12,4*4(4) - lwz 14,4*5(4) - lwz 15,4*6(4) - lwz 16,4*7(4) - lwzu 17,4*8(4) - li 30,0 - -.align 5 -.Lsqr8x_tail: - mullw 18,9,7 - addze 31,0 - mullw 19,10,7 - addi 30,30,4 - mullw 20,11,7 - andi. 30,30,4*8-1 - mullw 21,12,7 - addc 22,22,18 - mullw 18,14,7 - adde 23,23,19 - mullw 19,15,7 - adde 24,24,20 - mullw 20,16,7 - adde 25,25,21 - mullw 21,17,7 - adde 26,26,18 - mulhwu 18,9,7 - adde 27,27,19 - mulhwu 19,10,7 - adde 28,28,20 - mulhwu 20,11,7 - adde 29,29,21 - mulhwu 21,12,7 - addze 31,31 - stwu 22,4(5) - addc 22,23,18 - mulhwu 18,14,7 - adde 23,24,19 - mulhwu 19,15,7 - adde 24,25,20 - mulhwu 20,16,7 - adde 25,26,21 - mulhwu 21,17,7 - lwzx 7,3,30 - adde 26,27,18 - adde 27,28,19 - adde 28,29,20 - adde 29,31,21 - - bne .Lsqr8x_tail - - - lwz 9,4*1(5) - lwz 31,4*10(1) - .long 0x7c062040 - lwz 10,4*2(5) - sub 20,6,8 - lwz 11,4*3(5) - lwz 12,4*4(5) - lwz 14,4*5(5) - lwz 15,4*6(5) - lwz 16,4*7(5) - lwz 17,4*8(5) - beq .Lsqr8x_tail_break - - addc 22,22,9 - lwz 9,4*1(4) - adde 23,23,10 - lwz 10,4*2(4) - adde 24,24,11 - lwz 11,4*3(4) - adde 25,25,12 - lwz 12,4*4(4) - adde 26,26,14 - lwz 14,4*5(4) - adde 27,27,15 - lwz 15,4*6(4) - adde 28,28,16 - lwz 16,4*7(4) - adde 29,29,17 - lwzu 17,4*8(4) - - b .Lsqr8x_tail - -.align 5 -.Lsqr8x_tail_break: - lwz 7,4*8(1) - lwz 21,4*9(1) - addi 30,5,4*8 - - addic 31,31,-1 - adde 18,22,9 - lwz 22,4*8(3) - lwz 9,4*1(20) - adde 19,23,10 - lwz 23,4*9(3) - lwz 10,4*2(20) - adde 24,24,11 - lwz 11,4*3(20) - adde 25,25,12 - lwz 12,4*4(20) - adde 26,26,14 - lwz 14,4*5(20) - adde 27,27,15 - lwz 15,4*6(20) - adde 28,28,16 - lwz 16,4*7(20) - adde 29,29,17 - lwz 17,4*8(20) - addi 4,20,4*8 - addze 20,0 - mullw 31,7,22 - stw 18,4*1(5) - .long 0x7c1ea840 - stw 19,4*2(5) - li 30,8 - stw 24,4*3(5) - lwz 24,4*10(3) - stw 25,4*4(5) - lwz 25,4*11(3) - stw 26,4*5(5) - lwz 26,4*12(3) - stw 27,4*6(5) - lwz 27,4*13(3) - stw 28,4*7(5) - lwz 28,4*14(3) - stw 29,4*8(5) - lwz 29,4*15(3) - stw 20,4*10(1) - addi 5,3,4*7 - mtctr 30 - bne .Lsqr8x_reduction - - - - - - - lwz 3,4*6(1) - srwi 30,8,5 - mr 7,5 - addi 5,5,4*8 - subi 30,30,1 - subfc 18,9,22 - subfe 19,10,23 - mr 31,20 - mr 6,3 - - mtctr 30 - b .Lsqr8x_sub - -.align 5 -.Lsqr8x_sub: - lwz 9,4*1(4) - lwz 22,4*1(5) - lwz 10,4*2(4) - lwz 23,4*2(5) - subfe 20,11,24 - lwz 11,4*3(4) - lwz 24,4*3(5) - subfe 21,12,25 - lwz 12,4*4(4) - lwz 25,4*4(5) - stw 18,4*1(3) - subfe 18,14,26 - lwz 14,4*5(4) - lwz 26,4*5(5) - stw 19,4*2(3) - subfe 19,15,27 - lwz 15,4*6(4) - lwz 27,4*6(5) - stw 20,4*3(3) - subfe 20,16,28 - lwz 16,4*7(4) - lwz 28,4*7(5) - stw 21,4*4(3) - subfe 21,17,29 - lwzu 17,4*8(4) - lwzu 29,4*8(5) - stw 18,4*5(3) - subfe 18,9,22 - stw 19,4*6(3) - subfe 19,10,23 - stw 20,4*7(3) - stwu 21,4*8(3) - bdnz .Lsqr8x_sub - - srwi 30,8,4 - lwz 9,4*1(6) - lwz 22,4*1(7) - subi 30,30,1 - lwz 10,4*2(6) - lwz 23,4*2(7) - subfe 20,11,24 - lwz 11,4*3(6) - lwz 24,4*3(7) - subfe 21,12,25 - lwz 12,4*4(6) - lwzu 25,4*4(7) - stw 18,4*1(3) - subfe 18,14,26 - stw 19,4*2(3) - subfe 19,15,27 - stw 20,4*3(3) - subfe 20,16,28 - stw 21,4*4(3) - subfe 21,17,29 - stw 18,4*5(3) - subfe 31,0,31 - stw 19,4*6(3) - stw 20,4*7(3) - stw 21,4*8(3) - - addi 5,1,4*11 - mtctr 30 - -.Lsqr4x_cond_copy: - andc 9,9,31 - stw 0,-4*3(7) - and 22,22,31 - stw 0,-4*2(7) - andc 10,10,31 - stw 0,-4*1(7) - and 23,23,31 - stw 0,-4*0(7) - andc 11,11,31 - stw 0,4*1(5) - and 24,24,31 - stw 0,4*2(5) - andc 12,12,31 - stw 0,4*3(5) - and 25,25,31 - stwu 0,4*4(5) - or 18,9,22 - lwz 9,4*5(6) - lwz 22,4*1(7) - or 19,10,23 - lwz 10,4*6(6) - lwz 23,4*2(7) - or 20,11,24 - lwz 11,4*7(6) - lwz 24,4*3(7) - or 21,12,25 - lwz 12,4*8(6) - lwzu 25,4*4(7) - stw 18,4*1(6) - stw 19,4*2(6) - stw 20,4*3(6) - stwu 21,4*4(6) - bdnz .Lsqr4x_cond_copy - - lwz 4,0(1) - andc 9,9,31 - and 22,22,31 - andc 10,10,31 - and 23,23,31 - andc 11,11,31 - and 24,24,31 - andc 12,12,31 - and 25,25,31 - or 18,9,22 - or 19,10,23 - or 20,11,24 - or 21,12,25 - stw 18,4*1(6) - stw 19,4*2(6) - stw 20,4*3(6) - stw 21,4*4(6) - - b .Lsqr8x_done - -.align 5 -.Lsqr8x8_post_condition: - lwz 3,4*6(1) - lwz 4,0(1) - addze 31,0 - - - subfc 22,9,22 - subfe 23,10,23 - stw 0,4*12(1) - stw 0,4*13(1) - subfe 24,11,24 - stw 0,4*14(1) - stw 0,4*15(1) - subfe 25,12,25 - stw 0,4*16(1) - stw 0,4*17(1) - subfe 26,14,26 - stw 0,4*18(1) - stw 0,4*19(1) - subfe 27,15,27 - stw 0,4*20(1) - stw 0,4*21(1) - subfe 28,16,28 - stw 0,4*22(1) - stw 0,4*23(1) - subfe 29,17,29 - stw 0,4*24(1) - stw 0,4*25(1) - subfe 31,0,31 - stw 0,4*26(1) - stw 0,4*27(1) - - and 9,9,31 - and 10,10,31 - addc 22,22,9 - and 11,11,31 - adde 23,23,10 - and 12,12,31 - adde 24,24,11 - and 14,14,31 - adde 25,25,12 - and 15,15,31 - adde 26,26,14 - and 16,16,31 - adde 27,27,15 - and 17,17,31 - adde 28,28,16 - adde 29,29,17 - stw 22,4*1(3) - stw 23,4*2(3) - stw 24,4*3(3) - stw 25,4*4(3) - stw 26,4*5(3) - stw 27,4*6(3) - stw 28,4*7(3) - stw 29,4*8(3) - -.Lsqr8x_done: - stw 0,4*8(1) - stw 0,4*10(1) - - lwz 14,-4*18(4) - li 3,1 - lwz 15,-4*17(4) - lwz 16,-4*16(4) - lwz 17,-4*15(4) - lwz 18,-4*14(4) - lwz 19,-4*13(4) - lwz 20,-4*12(4) - lwz 21,-4*11(4) - lwz 22,-4*10(4) - lwz 23,-4*9(4) - lwz 24,-4*8(4) - lwz 25,-4*7(4) - lwz 26,-4*6(4) - lwz 27,-4*5(4) - lwz 28,-4*4(4) - lwz 29,-4*3(4) - lwz 30,-4*2(4) - lwz 31,-4*1(4) - mr 1,4 - blr -.long 0 -.byte 0,12,4,0x20,0x80,18,6,0 -.long 0 -.size __bn_sqr8x_mont,.-__bn_sqr8x_mont -.byte 77,111,110,116,103,111,109,101,114,121,32,77,117,108,116,105,112,108,105,99,97,116,105,111,110,32,102,111,114,32,80,80,67,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 diff --git a/sys/crypto/openssl/powerpc/ppc.S b/sys/crypto/openssl/powerpc/ppc.S deleted file mode 100644 index 166e2de1ddd..00000000000 --- a/sys/crypto/openssl/powerpc/ppc.S +++ /dev/null @@ -1,1855 +0,0 @@ -/* Do not modify. This file is auto-generated from ppc.pl. */ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -.globl bn_sqr_comba4 -.type bn_sqr_comba4,@function -.globl bn_sqr_comba8 -.type bn_sqr_comba8,@function -.globl bn_mul_comba4 -.type bn_mul_comba4,@function -.globl bn_mul_comba8 -.type bn_mul_comba8,@function -.globl bn_sub_words -.type bn_sub_words,@function -.globl bn_add_words -.type bn_add_words,@function -.globl bn_div_words -.type bn_div_words,@function -.globl bn_sqr_words -.type bn_sqr_words,@function -.globl bn_mul_words -.type bn_mul_words,@function -.globl bn_mul_add_words -.type bn_mul_add_words,@function - - - -.machine "any" -.text - - - - - - - - -.align 4 -bn_sqr_comba4: - - - - - - - - - - - - - - - - xor 0,0,0 - - - - lwz 5,0(4) - mullw 9,5,5 - mulhwu 10,5,5 - - - - - stw 9,0(3) - - lwz 6,4(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 7,7,7 - adde 8,8,8 - addze 9,0 - - - addc 10,7,10 - addze 11,8 - addze 9,9 - - stw 10,4(3) - - mullw 7,6,6 - mulhwu 8,6,6 - addc 11,7,11 - adde 9,8,9 - addze 10,0 - - lwz 6,8(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 7,7,7 - adde 8,8,8 - addze 10,10 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - stw 11,8(3) - - lwz 6,12(4) - mullw 7,5,6 - mulhwu 8,5,6 - addc 7,7,7 - adde 8,8,8 - addze 11,0 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - lwz 5,4(4) - lwz 6,8(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 7,7,7 - adde 8,8,8 - addze 11,11 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - stw 9,12(3) - - mullw 7,6,6 - mulhwu 8,6,6 - addc 10,7,10 - adde 11,8,11 - addze 9,0 - - lwz 6,12(4) - mullw 7,5,6 - mulhwu 8,5,6 - addc 7,7,7 - adde 8,8,8 - addze 9,9 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - stw 10,16(3) - - lwz 5,8(4) - mullw 7,5,6 - mulhwu 8,5,6 - addc 7,7,7 - adde 8,8,8 - addze 10,0 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - stw 11,20(3) - - mullw 7,6,6 - mulhwu 8,6,6 - addc 9,7,9 - adde 10,8,10 - - stw 9,24(3) - stw 10,28(3) - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size bn_sqr_comba4,.-bn_sqr_comba4 - - - - - - - - -.align 4 -bn_sqr_comba8: - - - - - - - - - - - - - - - - - - - - xor 0,0,0 - - - - lwz 5,0(4) - mullw 9,5,5 - mulhwu 10,5,5 - stw 9,0(3) - - lwz 6,4(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 10,7,10 - adde 11,8,0 - addze 9,0 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - stw 10,4(3) - - - mullw 7,6,6 - mulhwu 8,6,6 - addc 11,7,11 - adde 9,8,9 - addze 10,0 - - lwz 6,8(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - stw 11,8(3) - - lwz 6,12(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 9,7,9 - adde 10,8,10 - addze 11,0 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - lwz 5,4(4) - lwz 6,8(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - stw 9,12(3) - - mullw 7,6,6 - mulhwu 8,6,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,0 - - lwz 6,12(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - lwz 5,0(4) - lwz 6,16(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - stw 10,16(3) - - lwz 6,20(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 11,7,11 - adde 9,8,9 - addze 10,0 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - lwz 5,4(4) - lwz 6,16(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - lwz 5,8(4) - lwz 6,12(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - stw 11,20(3) - - mullw 7,6,6 - mulhwu 8,6,6 - addc 9,7,9 - adde 10,8,10 - addze 11,0 - - lwz 6,16(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - lwz 5,4(4) - lwz 6,20(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - lwz 5,0(4) - lwz 6,24(4) - mullw 7,5,6 - mulhwu 8,5,6 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - stw 9,24(3) - - lwz 6,28(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,0 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - lwz 5,4(4) - lwz 6,24(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - lwz 5,8(4) - lwz 6,20(4) - mullw 7,5,6 - mulhwu 8,5,6 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - lwz 5,12(4) - lwz 6,16(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - stw 10,28(3) - - mullw 7,6,6 - mulhwu 8,6,6 - addc 11,7,11 - adde 9,8,9 - addze 10,0 - - lwz 6,20(4) - mullw 7,5,6 - mulhwu 8,5,6 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - lwz 5,8(4) - lwz 6,24(4) - mullw 7,5,6 - mulhwu 8,5,6 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - lwz 5,4(4) - lwz 6,28(4) - mullw 7,5,6 - mulhwu 8,5,6 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - stw 11,32(3) - - lwz 5,8(4) - mullw 7,5,6 - mulhwu 8,5,6 - - addc 9,7,9 - adde 10,8,10 - addze 11,0 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - lwz 5,12(4) - lwz 6,24(4) - mullw 7,5,6 - mulhwu 8,5,6 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - lwz 5,16(4) - lwz 6,20(4) - mullw 7,5,6 - mulhwu 8,5,6 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - stw 9,36(3) - - mullw 7,6,6 - mulhwu 8,6,6 - addc 10,7,10 - adde 11,8,11 - addze 9,0 - - lwz 6,24(4) - mullw 7,5,6 - mulhwu 8,5,6 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - lwz 5,12(4) - lwz 6,28(4) - mullw 7,5,6 - mulhwu 8,5,6 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - stw 10,40(3) - - lwz 5,16(4) - mullw 7,5,6 - mulhwu 8,5,6 - addc 11,7,11 - adde 9,8,9 - addze 10,0 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - lwz 5,20(4) - lwz 6,24(4) - mullw 7,5,6 - mulhwu 8,5,6 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - stw 11,44(3) - - mullw 7,6,6 - mulhwu 8,6,6 - addc 9,7,9 - adde 10,8,10 - addze 11,0 - - lwz 6,28(4) - mullw 7,5,6 - mulhwu 8,5,6 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - stw 9,48(3) - - - lwz 5,24(4) - mullw 7,5,6 - mulhwu 8,5,6 - addc 10,7,10 - adde 11,8,11 - addze 9,0 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - stw 10,52(3) - - mullw 7,6,6 - mulhwu 8,6,6 - addc 11,7,11 - adde 9,8,9 - stw 11,56(3) - stw 9, 60(3) - - - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size bn_sqr_comba8,.-bn_sqr_comba8 - - - - - - - - -.align 4 -bn_mul_comba4: - - - - - - - - - - - - xor 0,0,0 - - lwz 6,0(4) - lwz 7,0(5) - mullw 10,6,7 - mulhwu 11,6,7 - stw 10,0(3) - - lwz 7,4(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,8,11 - adde 12,9,0 - addze 10,0 - - lwz 6, 4(4) - lwz 7, 0(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,8,11 - adde 12,9,12 - addze 10,10 - stw 11,4(3) - - lwz 6,8(4) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,8,12 - adde 10,9,10 - addze 11,0 - - lwz 6,4(4) - lwz 7,4(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,8,12 - adde 10,9,10 - addze 11,11 - - lwz 6,0(4) - lwz 7,8(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,8,12 - adde 10,9,10 - addze 11,11 - stw 12,8(3) - - lwz 7,12(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,8,10 - adde 11,9,11 - addze 12,0 - - lwz 6,4(4) - lwz 7,8(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,8,10 - adde 11,9,11 - addze 12,12 - - lwz 6,8(4) - lwz 7,4(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,8,10 - adde 11,9,11 - addze 12,12 - - lwz 6,12(4) - lwz 7,0(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,8,10 - adde 11,9,11 - addze 12,12 - stw 10,12(3) - - lwz 7,4(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,8,11 - adde 12,9,12 - addze 10,0 - - lwz 6,8(4) - lwz 7,8(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,8,11 - adde 12,9,12 - addze 10,10 - - lwz 6,4(4) - lwz 7,12(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,8,11 - adde 12,9,12 - addze 10,10 - stw 11,16(3) - - lwz 6,8(4) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,8,12 - adde 10,9,10 - addze 11,0 - - lwz 6,12(4) - lwz 7,8(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,8,12 - adde 10,9,10 - addze 11,11 - stw 12,20(3) - - lwz 7,12(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,8,10 - adde 11,9,11 - - stw 10,24(3) - stw 11,28(3) - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size bn_mul_comba4,.-bn_mul_comba4 - - - - - - - - -.align 4 -bn_mul_comba8: - - - - - - - - - - - - xor 0,0,0 - - - lwz 6,0(4) - lwz 7,0(5) - mullw 10,6,7 - mulhwu 11,6,7 - stw 10,0(3) - - lwz 7,4(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - addze 12,9 - addze 10,0 - - lwz 6,4(4) - lwz 7,0(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - stw 11,4(3) - - lwz 6,8(4) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,0 - - lwz 6,4(4) - lwz 7,4(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - lwz 6,0(4) - lwz 7,8(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - stw 12,8(3) - - lwz 7,12(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,0 - - lwz 6,4(4) - lwz 7,8(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - - lwz 6,8(4) - lwz 7,4(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - lwz 6,12(4) - lwz 7,0(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - stw 10,12(3) - - lwz 6,16(4) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,0 - - lwz 6,12(4) - lwz 7,4(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - lwz 6,8(4) - lwz 7,8(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - lwz 6,4(4) - lwz 7,12(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - lwz 6,0(4) - lwz 7,16(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - stw 11,16(3) - - lwz 7,20(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,0 - - lwz 6,4(4) - lwz 7,16(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - lwz 6,8(4) - lwz 7,12(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - lwz 6,12(4) - lwz 7,8(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - lwz 6,16(4) - lwz 7,4(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - lwz 6,20(4) - lwz 7,0(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - stw 12,20(3) - - lwz 6,24(4) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,0 - - lwz 6,20(4) - lwz 7,4(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - lwz 6,16(4) - lwz 7,8(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - lwz 6,12(4) - lwz 7,12(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - lwz 6,8(4) - lwz 7,16(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - lwz 6,4(4) - lwz 7,20(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - lwz 6,0(4) - lwz 7,24(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - stw 10,24(3) - - lwz 7,28(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,0 - - lwz 6,4(4) - lwz 7,24(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - lwz 6,8(4) - lwz 7,20(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - lwz 6,12(4) - lwz 7,16(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - lwz 6,16(4) - lwz 7,12(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - lwz 6,20(4) - lwz 7,8(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - lwz 6,24(4) - lwz 7,4(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - lwz 6,28(4) - lwz 7,0(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - stw 11,28(3) - - lwz 7,4(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,0 - - lwz 6,24(4) - lwz 7,8(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - lwz 6,20(4) - lwz 7,12(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - lwz 6,16(4) - lwz 7,16(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - lwz 6,12(4) - lwz 7,20(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - lwz 6,8(4) - lwz 7,24(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - lwz 6,4(4) - lwz 7,28(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - stw 12,32(3) - - lwz 6,8(4) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,0 - - lwz 6,12(4) - lwz 7,24(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - lwz 6,16(4) - lwz 7,20(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - lwz 6,20(4) - lwz 7,16(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - lwz 6,24(4) - lwz 7,12(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - lwz 6,28(4) - lwz 7,8(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - stw 10,36(3) - - lwz 7,12(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,0 - - lwz 6,24(4) - lwz 7,16(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - lwz 6,20(4) - lwz 7,20(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - lwz 6,16(4) - lwz 7,24(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - lwz 6,12(4) - lwz 7,28(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - stw 11,40(3) - - lwz 6,16(4) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,0 - - lwz 6,20(4) - lwz 7,24(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - lwz 6,24(4) - lwz 7,20(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - lwz 6,28(4) - lwz 7,16(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - stw 12,44(3) - - lwz 7,20(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,0 - - lwz 6,24(4) - lwz 7,24(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - lwz 6,20(4) - lwz 7,28(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - stw 10,48(3) - - lwz 6,24(4) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,0 - - lwz 6,28(4) - lwz 7,24(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - stw 11,52(3) - - lwz 7,28(5) - mullw 8,6,7 - mulhwu 9,6,7 - addc 12,12,8 - adde 10,10,9 - stw 12,56(3) - stw 10,60(3) - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size bn_mul_comba8,.-bn_mul_comba8 - - - - - - - - -.align 4 -bn_sub_words: - - - - - - - - - - - - - - xor 0,0,0 - - - - subfc. 7,0,6 - - - beq .Lppcasm_sub_adios - addi 4,4,-4 - addi 3,3,-4 - addi 5,5,-4 - mtctr 6 -.Lppcasm_sub_mainloop: - lwzu 7,4(4) - lwzu 8,4(5) - subfe 6,8,7 - - - stwu 6,4(3) - bdnz .Lppcasm_sub_mainloop -.Lppcasm_sub_adios: - subfze 3,0 - andi. 3,3,1 - blr -.long 0 -.byte 0,12,0x14,0,0,0,4,0 -.long 0 -.size bn_sub_words,.-bn_sub_words - - - - - - - - -.align 4 -bn_add_words: - - - - - - - - - - - - - - xor 0,0,0 - - - - addic. 6,6,0 - beq .Lppcasm_add_adios - addi 4,4,-4 - addi 3,3,-4 - addi 5,5,-4 - mtctr 6 -.Lppcasm_add_mainloop: - lwzu 7,4(4) - lwzu 8,4(5) - adde 8,7,8 - stwu 8,4(3) - bdnz .Lppcasm_add_mainloop -.Lppcasm_add_adios: - addze 3,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,4,0 -.long 0 -.size bn_add_words,.-bn_add_words - - - - - - - - -.align 4 -bn_div_words: - - - - - - - - - - - - cmplwi 0,5,0 - bne .Lppcasm_div1 - li 3,-1 - blr -.Lppcasm_div1: - xor 0,0,0 - li 8,32 - cntlzw. 7,5 - beq .Lppcasm_div2 - subf 8,7,8 - srw. 9,3,8 - tw 16,9,0 -.Lppcasm_div2: - .long 0x7c032840 - blt .Lppcasm_div3 - subf 3,5,3 -.Lppcasm_div3: - cmpi 0,0,7,0 - beq .Lppcasm_div4 - slw 3,3,7 - srw 8,4,8 - slw 5,5,7 - or 3,3,8 - slw 4,4,7 -.Lppcasm_div4: - srwi 9,5,16 - - - li 6,2 - mtctr 6 -.Lppcasm_divouterloop: - srwi 8,3,16 - srwi 11,4,16 - - .long 0x7c084840 - bne .Lppcasm_div5 - - li 8,-1 - clrlwi 8,8,16 - b .Lppcasm_div6 -.Lppcasm_div5: - divwu 8,3,9 -.Lppcasm_div6: - mullw 12,9,8 - clrlwi 10,5,16 - mullw 6,8,10 - -.Lppcasm_divinnerloop: - subf 10,12,3 - srwi 7,10,16 - addic. 7,7,0 - - - - slwi 7,10,16 - or 7,7,11 - .long 0x7c863840 - bne .Lppcasm_divinnerexit - ble 1,.Lppcasm_divinnerexit - addi 8,8,-1 - subf 12,9,12 - clrlwi 10,5,16 - subf 6,10,6 - b .Lppcasm_divinnerloop -.Lppcasm_divinnerexit: - srwi 10,6,16 - slwi 11,6,16 - .long 0x7c845840 - add 12,12,10 - bge 1,.Lppcasm_div7 - addi 12,12,1 -.Lppcasm_div7: - subf 11,11,4 - .long 0x7c836040 - bge 1,.Lppcasm_div8 - addi 8,8,-1 - add 3,5,3 -.Lppcasm_div8: - subf 12,12,3 - slwi 4,11,16 - - - - insrwi 11,12,16,16 - rotlwi 3,11,16 - bdz .Lppcasm_div9 - slwi 0,8,16 - b .Lppcasm_divouterloop -.Lppcasm_div9: - or 3,8,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size bn_div_words,.-bn_div_words - - - - - - - -.align 4 -bn_sqr_words: - - - - - - - - - - - - - - - addic. 5,5,0 - beq .Lppcasm_sqr_adios - addi 4,4,-4 - addi 3,3,-4 - mtctr 5 -.Lppcasm_sqr_mainloop: - - lwzu 6,4(4) - mullw 7,6,6 - mulhwu 8,6,6 - stwu 7,4(3) - stwu 8,4(3) - bdnz .Lppcasm_sqr_mainloop -.Lppcasm_sqr_adios: - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size bn_sqr_words,.-bn_sqr_words - - - - - - - - -.align 4 -bn_mul_words: - - - - - - - - xor 0,0,0 - xor 12,12,12 - rlwinm. 7,5,30,2,31 - beq .Lppcasm_mw_REM - mtctr 7 -.Lppcasm_mw_LOOP: - - lwz 8,0(4) - mullw 9,6,8 - mulhwu 10,6,8 - addc 9,9,12 - - - - - stw 9,0(3) - - lwz 8,4(4) - mullw 11,6,8 - mulhwu 12,6,8 - adde 11,11,10 - - stw 11,4(3) - - lwz 8,8(4) - mullw 9,6,8 - mulhwu 10,6,8 - adde 9,9,12 - - stw 9,8(3) - - lwz 8,12(4) - mullw 11,6,8 - mulhwu 12,6,8 - adde 11,11,10 - addze 12,12 - - stw 11,12(3) - - addi 3,3,16 - addi 4,4,16 - bdnz .Lppcasm_mw_LOOP - -.Lppcasm_mw_REM: - andi. 5,5,0x3 - beq .Lppcasm_mw_OVER - - lwz 8,0(4) - mullw 9,6,8 - mulhwu 10,6,8 - addc 9,9,12 - addze 10,10 - stw 9,0(3) - addi 12,10,0 - - addi 5,5,-1 - cmpli 0,0,5,0 - beq .Lppcasm_mw_OVER - - - - lwz 8,4(4) - mullw 9,6,8 - mulhwu 10,6,8 - addc 9,9,12 - addze 10,10 - stw 9,4(3) - addi 12,10,0 - - addi 5,5,-1 - cmpli 0,0,5,0 - beq .Lppcasm_mw_OVER - - - lwz 8,8(4) - mullw 9,6,8 - mulhwu 10,6,8 - addc 9,9,12 - addze 10,10 - stw 9,8(3) - addi 12,10,0 - -.Lppcasm_mw_OVER: - addi 3,12,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,4,0 -.long 0 -.size bn_mul_words,.-bn_mul_words - - - - - - - - -.align 4 -bn_mul_add_words: - - - - - - - - - - - xor 0,0,0 - xor 12,12,12 - rlwinm. 7,5,30,2,31 - beq .Lppcasm_maw_leftover - mtctr 7 -.Lppcasm_maw_mainloop: - - lwz 8,0(4) - lwz 11,0(3) - mullw 9,6,8 - mulhwu 10,6,8 - addc 9,9,12 - addze 10,10 - addc 9,9,11 - - - - - - - stw 9,0(3) - - - lwz 8,4(4) - lwz 9,4(3) - mullw 11,6,8 - mulhwu 12,6,8 - adde 11,11,10 - addze 12,12 - addc 11,11,9 - - stw 11,4(3) - - - lwz 8,8(4) - mullw 9,6,8 - lwz 11,8(3) - mulhwu 10,6,8 - adde 9,9,12 - addze 10,10 - addc 9,9,11 - - stw 9,8(3) - - - lwz 8,12(4) - mullw 11,6,8 - lwz 9,12(3) - mulhwu 12,6,8 - adde 11,11,10 - addze 12,12 - addc 11,11,9 - addze 12,12 - stw 11,12(3) - addi 3,3,16 - addi 4,4,16 - bdnz .Lppcasm_maw_mainloop - -.Lppcasm_maw_leftover: - andi. 5,5,0x3 - beq .Lppcasm_maw_adios - addi 3,3,-4 - addi 4,4,-4 - - mtctr 5 - lwzu 8,4(4) - mullw 9,6,8 - mulhwu 10,6,8 - lwzu 11,4(3) - addc 9,9,11 - addze 10,10 - addc 9,9,12 - addze 12,10 - stw 9,0(3) - - bdz .Lppcasm_maw_adios - - lwzu 8,4(4) - mullw 9,6,8 - mulhwu 10,6,8 - lwzu 11,4(3) - addc 9,9,11 - addze 10,10 - addc 9,9,12 - addze 12,10 - stw 9,0(3) - - bdz .Lppcasm_maw_adios - - lwzu 8,4(4) - mullw 9,6,8 - mulhwu 10,6,8 - lwzu 11,4(3) - addc 9,9,11 - addze 10,10 - addc 9,9,12 - addze 12,10 - stw 9,0(3) - -.Lppcasm_maw_adios: - addi 3,12,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,4,0 -.long 0 -.size bn_mul_add_words,.-bn_mul_add_words -.align 4 diff --git a/sys/crypto/openssl/powerpc/ppccpuid.S b/sys/crypto/openssl/powerpc/ppccpuid.S deleted file mode 100644 index 77c67739f98..00000000000 --- a/sys/crypto/openssl/powerpc/ppccpuid.S +++ /dev/null @@ -1,356 +0,0 @@ -/* Do not modify. This file is auto-generated from ppccpuid.pl. */ -.machine "any" -.text - -.globl OPENSSL_fpu_probe -.type OPENSSL_fpu_probe,@function -.align 4 -OPENSSL_fpu_probe: - fmr 0,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_fpu_probe,.-OPENSSL_fpu_probe -.globl OPENSSL_ppc64_probe -.type OPENSSL_ppc64_probe,@function -.align 4 -OPENSSL_ppc64_probe: - fcfid 1,1 - rldicl 0,0,32,32 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_ppc64_probe,.-OPENSSL_ppc64_probe - -.globl OPENSSL_altivec_probe -.type OPENSSL_altivec_probe,@function -.align 4 -OPENSSL_altivec_probe: -.long 0x10000484 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_altivec_probe,.-OPENSSL_altivec_probe - -.globl OPENSSL_crypto207_probe -.type OPENSSL_crypto207_probe,@function -.align 4 -OPENSSL_crypto207_probe: - .long 0x7C000E99 - .long 0x10000508 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_crypto207_probe,.-OPENSSL_crypto207_probe - -.globl OPENSSL_madd300_probe -.type OPENSSL_madd300_probe,@function -.align 4 -OPENSSL_madd300_probe: - xor 0,0,0 - .long 0x10600033 - .long 0x10600031 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.globl OPENSSL_wipe_cpu -.type OPENSSL_wipe_cpu,@function -.align 4 -OPENSSL_wipe_cpu: - xor 0,0,0 - fmr 0,31 - fmr 1,31 - fmr 2,31 - mr 3,1 - fmr 3,31 - xor 4,4,4 - fmr 4,31 - xor 5,5,5 - fmr 5,31 - xor 6,6,6 - fmr 6,31 - xor 7,7,7 - fmr 7,31 - xor 8,8,8 - fmr 8,31 - xor 9,9,9 - fmr 9,31 - xor 10,10,10 - fmr 10,31 - xor 11,11,11 - fmr 11,31 - xor 12,12,12 - fmr 12,31 - fmr 13,31 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu - -.globl OPENSSL_atomic_add -.type OPENSSL_atomic_add,@function -.align 4 -OPENSSL_atomic_add: -.Ladd: lwarx 5,0,3 - add 0,4,5 - stwcx. 0,0,3 - bne- .Ladd - mr 3,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size OPENSSL_atomic_add,.-OPENSSL_atomic_add - -.globl OPENSSL_rdtsc_mftb -.type OPENSSL_rdtsc_mftb,@function -.align 4 -OPENSSL_rdtsc_mftb: - mftb 3 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_rdtsc_mftb,.-OPENSSL_rdtsc_mftb - -.globl OPENSSL_rdtsc_mfspr268 -.type OPENSSL_rdtsc_mfspr268,@function -.align 4 -OPENSSL_rdtsc_mfspr268: - mfspr 3,268 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_rdtsc_mfspr268,.-OPENSSL_rdtsc_mfspr268 - -.globl OPENSSL_cleanse -.type OPENSSL_cleanse,@function -.align 4 -OPENSSL_cleanse: - cmplwi 4,7 - li 0,0 - bge .Lot - cmplwi 4,0 - .long 0x4DC20020 -.Little: mtctr 4 - stb 0,0(3) - addi 3,3,1 - bdnz $-8 - blr -.Lot: andi. 5,3,3 - beq .Laligned - stb 0,0(3) - subi 4,4,1 - addi 3,3,1 - b .Lot -.Laligned: - srwi 5,4,2 - mtctr 5 - stw 0,0(3) - addi 3,3,4 - bdnz $-8 - andi. 4,4,3 - bne .Little - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size OPENSSL_cleanse,.-OPENSSL_cleanse - -.globl CRYPTO_memcmp -.type CRYPTO_memcmp,@function -.align 4 -CRYPTO_memcmp: - cmplwi 5,0 - li 0,0 - beq .Lno_data - mtctr 5 -.Loop_cmp: - lbz 6,0(3) - addi 3,3,1 - lbz 7,0(4) - addi 4,4,1 - xor 6,6,7 - or 0,0,6 - bdnz .Loop_cmp - -.Lno_data: - li 3,0 - sub 3,3,0 - extrwi 3,3,1,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size CRYPTO_memcmp,.-CRYPTO_memcmp -.globl OPENSSL_instrument_bus_mftb -.type OPENSSL_instrument_bus_mftb,@function -.align 4 -OPENSSL_instrument_bus_mftb: - mtctr 4 - - mftb 7 - li 8,0 - - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - -.Loop: mftb 6 - sub 8,6,7 - mr 7,6 - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - addi 3,3,4 - bdnz .Loop - - mr 3,4 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size OPENSSL_instrument_bus_mftb,.-OPENSSL_instrument_bus_mftb - -.globl OPENSSL_instrument_bus2_mftb -.type OPENSSL_instrument_bus2_mftb,@function -.align 4 -OPENSSL_instrument_bus2_mftb: - mr 0,4 - slwi 4,4,2 - - mftb 7 - li 8,0 - - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - - mftb 6 - sub 8,6,7 - mr 7,6 - mr 9,8 -.Loop2: - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - - addic. 5,5,-1 - beq .Ldone2 - - mftb 6 - sub 8,6,7 - mr 7,6 - .long 0x7f884840 - mr 9,8 - - mfcr 6 - not 6,6 - rlwinm 6,6,1,29,29 - - sub. 4,4,6 - add 3,3,6 - bne .Loop2 - -.Ldone2: - srwi 4,4,2 - sub 3,0,4 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size OPENSSL_instrument_bus2_mftb,.-OPENSSL_instrument_bus2_mftb - -.globl OPENSSL_instrument_bus_mfspr268 -.type OPENSSL_instrument_bus_mfspr268,@function -.align 4 -OPENSSL_instrument_bus_mfspr268: - mtctr 4 - - mfspr 7,268 - li 8,0 - - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - -.Loop3: mfspr 6,268 - sub 8,6,7 - mr 7,6 - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - addi 3,3,4 - bdnz .Loop3 - - mr 3,4 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size OPENSSL_instrument_bus_mfspr268,.-OPENSSL_instrument_bus_mfspr268 - -.globl OPENSSL_instrument_bus2_mfspr268 -.type OPENSSL_instrument_bus2_mfspr268,@function -.align 4 -OPENSSL_instrument_bus2_mfspr268: - mr 0,4 - slwi 4,4,2 - - mfspr 7,268 - li 8,0 - - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - - mfspr 6,268 - sub 8,6,7 - mr 7,6 - mr 9,8 -.Loop4: - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - - addic. 5,5,-1 - beq .Ldone4 - - mfspr 6,268 - sub 8,6,7 - mr 7,6 - .long 0x7f884840 - mr 9,8 - - mfcr 6 - not 6,6 - rlwinm 6,6,1,29,29 - - sub. 4,4,6 - add 3,3,6 - bne .Loop4 - -.Ldone4: - srwi 4,4,2 - sub 3,0,4 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size OPENSSL_instrument_bus2_mfspr268,.-OPENSSL_instrument_bus2_mfspr268 diff --git a/sys/crypto/openssl/powerpc/sha1-ppc.S b/sys/crypto/openssl/powerpc/sha1-ppc.S deleted file mode 100644 index f9866f180b8..00000000000 --- a/sys/crypto/openssl/powerpc/sha1-ppc.S +++ /dev/null @@ -1,1118 +0,0 @@ -/* Do not modify. This file is auto-generated from sha1-ppc.pl. */ -.machine "any" -.text - -.globl sha1_block_data_order -.type sha1_block_data_order,@function -.align 4 -sha1_block_data_order: - stwu 1,-160(1) - mflr 0 - stw 15,92(1) - stw 16,96(1) - stw 17,100(1) - stw 18,104(1) - stw 19,108(1) - stw 20,112(1) - stw 21,116(1) - stw 22,120(1) - stw 23,124(1) - stw 24,128(1) - stw 25,132(1) - stw 26,136(1) - stw 27,140(1) - stw 28,144(1) - stw 29,148(1) - stw 30,152(1) - stw 31,156(1) - stw 0,164(1) - lwz 7,0(3) - lwz 8,4(3) - lwz 9,8(3) - lwz 10,12(3) - lwz 11,16(3) - andi. 0,4,3 - bne .Lunaligned -.Laligned: - mtctr 5 - bl .Lsha1_block_private - b .Ldone - - - - - - - -.align 4 -.Lunaligned: - subfic 6,4,4096 - andi. 6,6,4095 - srwi. 6,6,6 - beq .Lcross_page - .long 0x7c053040 - ble .Laligned - mtctr 6 - subfc 5,6,5 - bl .Lsha1_block_private -.Lcross_page: - li 6,16 - mtctr 6 - addi 20,1,24 -.Lmemcpy: - lbz 16,0(4) - lbz 17,1(4) - lbz 18,2(4) - lbz 19,3(4) - addi 4,4,4 - stb 16,0(20) - stb 17,1(20) - stb 18,2(20) - stb 19,3(20) - addi 20,20,4 - bdnz .Lmemcpy - - stw 4,88(1) - li 6,1 - addi 4,1,24 - mtctr 6 - bl .Lsha1_block_private - lwz 4,88(1) - addic. 5,5,-1 - bne .Lunaligned - -.Ldone: - lwz 0,164(1) - lwz 15,92(1) - lwz 16,96(1) - lwz 17,100(1) - lwz 18,104(1) - lwz 19,108(1) - lwz 20,112(1) - lwz 21,116(1) - lwz 22,120(1) - lwz 23,124(1) - lwz 24,128(1) - lwz 25,132(1) - lwz 26,136(1) - lwz 27,140(1) - lwz 28,144(1) - lwz 29,148(1) - lwz 30,152(1) - lwz 31,156(1) - mtlr 0 - addi 1,1,160 - blr -.long 0 -.byte 0,12,4,1,0x80,18,3,0 -.long 0 -.align 4 -.Lsha1_block_private: - lis 0,0x5a82 - ori 0,0,0x7999 - lwz 16,0(4) - lwz 17,4(4) - add 12,0,11 - rotlwi 11,7,5 - add 12,12,16 - and 15,9,8 - add 12,12,11 - andc 6,10,8 - rotlwi 8,8,30 - or 15,15,6 - add 12,12,15 - lwz 18,8(4) - add 11,0,10 - rotlwi 10,12,5 - add 11,11,17 - and 15,8,7 - add 11,11,10 - andc 6,9,7 - rotlwi 7,7,30 - or 15,15,6 - add 11,11,15 - lwz 19,12(4) - add 10,0,9 - rotlwi 9,11,5 - add 10,10,18 - and 15,7,12 - add 10,10,9 - andc 6,8,12 - rotlwi 12,12,30 - or 15,15,6 - add 10,10,15 - lwz 20,16(4) - add 9,0,8 - rotlwi 8,10,5 - add 9,9,19 - and 15,12,11 - add 9,9,8 - andc 6,7,11 - rotlwi 11,11,30 - or 15,15,6 - add 9,9,15 - lwz 21,20(4) - add 8,0,7 - rotlwi 7,9,5 - add 8,8,20 - and 15,11,10 - add 8,8,7 - andc 6,12,10 - rotlwi 10,10,30 - or 15,15,6 - add 8,8,15 - lwz 22,24(4) - add 7,0,12 - rotlwi 12,8,5 - add 7,7,21 - and 15,10,9 - add 7,7,12 - andc 6,11,9 - rotlwi 9,9,30 - or 15,15,6 - add 7,7,15 - lwz 23,28(4) - add 12,0,11 - rotlwi 11,7,5 - add 12,12,22 - and 15,9,8 - add 12,12,11 - andc 6,10,8 - rotlwi 8,8,30 - or 15,15,6 - add 12,12,15 - lwz 24,32(4) - add 11,0,10 - rotlwi 10,12,5 - add 11,11,23 - and 15,8,7 - add 11,11,10 - andc 6,9,7 - rotlwi 7,7,30 - or 15,15,6 - add 11,11,15 - lwz 25,36(4) - add 10,0,9 - rotlwi 9,11,5 - add 10,10,24 - and 15,7,12 - add 10,10,9 - andc 6,8,12 - rotlwi 12,12,30 - or 15,15,6 - add 10,10,15 - lwz 26,40(4) - add 9,0,8 - rotlwi 8,10,5 - add 9,9,25 - and 15,12,11 - add 9,9,8 - andc 6,7,11 - rotlwi 11,11,30 - or 15,15,6 - add 9,9,15 - lwz 27,44(4) - add 8,0,7 - rotlwi 7,9,5 - add 8,8,26 - and 15,11,10 - add 8,8,7 - andc 6,12,10 - rotlwi 10,10,30 - or 15,15,6 - add 8,8,15 - lwz 28,48(4) - add 7,0,12 - rotlwi 12,8,5 - add 7,7,27 - and 15,10,9 - add 7,7,12 - andc 6,11,9 - rotlwi 9,9,30 - or 15,15,6 - add 7,7,15 - lwz 29,52(4) - add 12,0,11 - rotlwi 11,7,5 - add 12,12,28 - and 15,9,8 - add 12,12,11 - andc 6,10,8 - rotlwi 8,8,30 - or 15,15,6 - add 12,12,15 - lwz 30,56(4) - add 11,0,10 - rotlwi 10,12,5 - add 11,11,29 - and 15,8,7 - add 11,11,10 - andc 6,9,7 - rotlwi 7,7,30 - or 15,15,6 - add 11,11,15 - lwz 31,60(4) - add 10,0,9 - rotlwi 9,11,5 - add 10,10,30 - and 15,7,12 - add 10,10,9 - andc 6,8,12 - rotlwi 12,12,30 - or 15,15,6 - add 10,10,15 - add 9,0,8 - rotlwi 8,10,5 - xor 16,16,18 - add 9,9,31 - and 15,12,11 - xor 16,16,24 - add 9,9,8 - andc 6,7,11 - rotlwi 11,11,30 - or 15,15,6 - xor 16,16,29 - add 9,9,15 - rotlwi 16,16,1 - add 8,0,7 - rotlwi 7,9,5 - xor 17,17,19 - add 8,8,16 - and 15,11,10 - xor 17,17,25 - add 8,8,7 - andc 6,12,10 - rotlwi 10,10,30 - or 15,15,6 - xor 17,17,30 - add 8,8,15 - rotlwi 17,17,1 - add 7,0,12 - rotlwi 12,8,5 - xor 18,18,20 - add 7,7,17 - and 15,10,9 - xor 18,18,26 - add 7,7,12 - andc 6,11,9 - rotlwi 9,9,30 - or 15,15,6 - xor 18,18,31 - add 7,7,15 - rotlwi 18,18,1 - add 12,0,11 - rotlwi 11,7,5 - xor 19,19,21 - add 12,12,18 - and 15,9,8 - xor 19,19,27 - add 12,12,11 - andc 6,10,8 - rotlwi 8,8,30 - or 15,15,6 - xor 19,19,16 - add 12,12,15 - rotlwi 19,19,1 - add 11,0,10 - rotlwi 10,12,5 - xor 20,20,22 - add 11,11,19 - and 15,8,7 - xor 20,20,28 - add 11,11,10 - andc 6,9,7 - rotlwi 7,7,30 - or 15,15,6 - xor 20,20,17 - add 11,11,15 - rotlwi 20,20,1 - lis 0,0x6ed9 - ori 0,0,0xeba1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 21,21,23 - add 10,10,20 - xor 15,15,7 - xor 21,21,29 - add 10,10,15 - rotlwi 12,12,30 - xor 21,21,18 - add 10,10,9 - rotlwi 21,21,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 22,22,24 - add 9,9,21 - xor 15,15,12 - xor 22,22,30 - add 9,9,15 - rotlwi 11,11,30 - xor 22,22,19 - add 9,9,8 - rotlwi 22,22,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 23,23,25 - add 8,8,22 - xor 15,15,11 - xor 23,23,31 - add 8,8,15 - rotlwi 10,10,30 - xor 23,23,20 - add 8,8,7 - rotlwi 23,23,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 24,24,26 - add 7,7,23 - xor 15,15,10 - xor 24,24,16 - add 7,7,15 - rotlwi 9,9,30 - xor 24,24,21 - add 7,7,12 - rotlwi 24,24,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 25,25,27 - add 12,12,24 - xor 15,15,9 - xor 25,25,17 - add 12,12,15 - rotlwi 8,8,30 - xor 25,25,22 - add 12,12,11 - rotlwi 25,25,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 26,26,28 - add 11,11,25 - xor 15,15,8 - xor 26,26,18 - add 11,11,15 - rotlwi 7,7,30 - xor 26,26,23 - add 11,11,10 - rotlwi 26,26,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 27,27,29 - add 10,10,26 - xor 15,15,7 - xor 27,27,19 - add 10,10,15 - rotlwi 12,12,30 - xor 27,27,24 - add 10,10,9 - rotlwi 27,27,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 28,28,30 - add 9,9,27 - xor 15,15,12 - xor 28,28,20 - add 9,9,15 - rotlwi 11,11,30 - xor 28,28,25 - add 9,9,8 - rotlwi 28,28,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 29,29,31 - add 8,8,28 - xor 15,15,11 - xor 29,29,21 - add 8,8,15 - rotlwi 10,10,30 - xor 29,29,26 - add 8,8,7 - rotlwi 29,29,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 30,30,16 - add 7,7,29 - xor 15,15,10 - xor 30,30,22 - add 7,7,15 - rotlwi 9,9,30 - xor 30,30,27 - add 7,7,12 - rotlwi 30,30,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 31,31,17 - add 12,12,30 - xor 15,15,9 - xor 31,31,23 - add 12,12,15 - rotlwi 8,8,30 - xor 31,31,28 - add 12,12,11 - rotlwi 31,31,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 16,16,18 - add 11,11,31 - xor 15,15,8 - xor 16,16,24 - add 11,11,15 - rotlwi 7,7,30 - xor 16,16,29 - add 11,11,10 - rotlwi 16,16,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 17,17,19 - add 10,10,16 - xor 15,15,7 - xor 17,17,25 - add 10,10,15 - rotlwi 12,12,30 - xor 17,17,30 - add 10,10,9 - rotlwi 17,17,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 18,18,20 - add 9,9,17 - xor 15,15,12 - xor 18,18,26 - add 9,9,15 - rotlwi 11,11,30 - xor 18,18,31 - add 9,9,8 - rotlwi 18,18,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 19,19,21 - add 8,8,18 - xor 15,15,11 - xor 19,19,27 - add 8,8,15 - rotlwi 10,10,30 - xor 19,19,16 - add 8,8,7 - rotlwi 19,19,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 20,20,22 - add 7,7,19 - xor 15,15,10 - xor 20,20,28 - add 7,7,15 - rotlwi 9,9,30 - xor 20,20,17 - add 7,7,12 - rotlwi 20,20,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 21,21,23 - add 12,12,20 - xor 15,15,9 - xor 21,21,29 - add 12,12,15 - rotlwi 8,8,30 - xor 21,21,18 - add 12,12,11 - rotlwi 21,21,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 22,22,24 - add 11,11,21 - xor 15,15,8 - xor 22,22,30 - add 11,11,15 - rotlwi 7,7,30 - xor 22,22,19 - add 11,11,10 - rotlwi 22,22,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 23,23,25 - add 10,10,22 - xor 15,15,7 - xor 23,23,31 - add 10,10,15 - rotlwi 12,12,30 - xor 23,23,20 - add 10,10,9 - rotlwi 23,23,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 24,24,26 - add 9,9,23 - xor 15,15,12 - xor 24,24,16 - add 9,9,15 - rotlwi 11,11,30 - xor 24,24,21 - add 9,9,8 - rotlwi 24,24,1 - lis 0,0x8f1b - ori 0,0,0xbcdc - add 8,0,7 - rotlwi 7,9,5 - xor 25,25,27 - add 8,8,24 - and 15,10,11 - xor 25,25,17 - add 8,8,7 - or 6,10,11 - rotlwi 10,10,30 - xor 25,25,22 - and 6,6,12 - or 15,15,6 - rotlwi 25,25,1 - add 8,8,15 - add 7,0,12 - rotlwi 12,8,5 - xor 26,26,28 - add 7,7,25 - and 15,9,10 - xor 26,26,18 - add 7,7,12 - or 6,9,10 - rotlwi 9,9,30 - xor 26,26,23 - and 6,6,11 - or 15,15,6 - rotlwi 26,26,1 - add 7,7,15 - add 12,0,11 - rotlwi 11,7,5 - xor 27,27,29 - add 12,12,26 - and 15,8,9 - xor 27,27,19 - add 12,12,11 - or 6,8,9 - rotlwi 8,8,30 - xor 27,27,24 - and 6,6,10 - or 15,15,6 - rotlwi 27,27,1 - add 12,12,15 - add 11,0,10 - rotlwi 10,12,5 - xor 28,28,30 - add 11,11,27 - and 15,7,8 - xor 28,28,20 - add 11,11,10 - or 6,7,8 - rotlwi 7,7,30 - xor 28,28,25 - and 6,6,9 - or 15,15,6 - rotlwi 28,28,1 - add 11,11,15 - add 10,0,9 - rotlwi 9,11,5 - xor 29,29,31 - add 10,10,28 - and 15,12,7 - xor 29,29,21 - add 10,10,9 - or 6,12,7 - rotlwi 12,12,30 - xor 29,29,26 - and 6,6,8 - or 15,15,6 - rotlwi 29,29,1 - add 10,10,15 - add 9,0,8 - rotlwi 8,10,5 - xor 30,30,16 - add 9,9,29 - and 15,11,12 - xor 30,30,22 - add 9,9,8 - or 6,11,12 - rotlwi 11,11,30 - xor 30,30,27 - and 6,6,7 - or 15,15,6 - rotlwi 30,30,1 - add 9,9,15 - add 8,0,7 - rotlwi 7,9,5 - xor 31,31,17 - add 8,8,30 - and 15,10,11 - xor 31,31,23 - add 8,8,7 - or 6,10,11 - rotlwi 10,10,30 - xor 31,31,28 - and 6,6,12 - or 15,15,6 - rotlwi 31,31,1 - add 8,8,15 - add 7,0,12 - rotlwi 12,8,5 - xor 16,16,18 - add 7,7,31 - and 15,9,10 - xor 16,16,24 - add 7,7,12 - or 6,9,10 - rotlwi 9,9,30 - xor 16,16,29 - and 6,6,11 - or 15,15,6 - rotlwi 16,16,1 - add 7,7,15 - add 12,0,11 - rotlwi 11,7,5 - xor 17,17,19 - add 12,12,16 - and 15,8,9 - xor 17,17,25 - add 12,12,11 - or 6,8,9 - rotlwi 8,8,30 - xor 17,17,30 - and 6,6,10 - or 15,15,6 - rotlwi 17,17,1 - add 12,12,15 - add 11,0,10 - rotlwi 10,12,5 - xor 18,18,20 - add 11,11,17 - and 15,7,8 - xor 18,18,26 - add 11,11,10 - or 6,7,8 - rotlwi 7,7,30 - xor 18,18,31 - and 6,6,9 - or 15,15,6 - rotlwi 18,18,1 - add 11,11,15 - add 10,0,9 - rotlwi 9,11,5 - xor 19,19,21 - add 10,10,18 - and 15,12,7 - xor 19,19,27 - add 10,10,9 - or 6,12,7 - rotlwi 12,12,30 - xor 19,19,16 - and 6,6,8 - or 15,15,6 - rotlwi 19,19,1 - add 10,10,15 - add 9,0,8 - rotlwi 8,10,5 - xor 20,20,22 - add 9,9,19 - and 15,11,12 - xor 20,20,28 - add 9,9,8 - or 6,11,12 - rotlwi 11,11,30 - xor 20,20,17 - and 6,6,7 - or 15,15,6 - rotlwi 20,20,1 - add 9,9,15 - add 8,0,7 - rotlwi 7,9,5 - xor 21,21,23 - add 8,8,20 - and 15,10,11 - xor 21,21,29 - add 8,8,7 - or 6,10,11 - rotlwi 10,10,30 - xor 21,21,18 - and 6,6,12 - or 15,15,6 - rotlwi 21,21,1 - add 8,8,15 - add 7,0,12 - rotlwi 12,8,5 - xor 22,22,24 - add 7,7,21 - and 15,9,10 - xor 22,22,30 - add 7,7,12 - or 6,9,10 - rotlwi 9,9,30 - xor 22,22,19 - and 6,6,11 - or 15,15,6 - rotlwi 22,22,1 - add 7,7,15 - add 12,0,11 - rotlwi 11,7,5 - xor 23,23,25 - add 12,12,22 - and 15,8,9 - xor 23,23,31 - add 12,12,11 - or 6,8,9 - rotlwi 8,8,30 - xor 23,23,20 - and 6,6,10 - or 15,15,6 - rotlwi 23,23,1 - add 12,12,15 - add 11,0,10 - rotlwi 10,12,5 - xor 24,24,26 - add 11,11,23 - and 15,7,8 - xor 24,24,16 - add 11,11,10 - or 6,7,8 - rotlwi 7,7,30 - xor 24,24,21 - and 6,6,9 - or 15,15,6 - rotlwi 24,24,1 - add 11,11,15 - add 10,0,9 - rotlwi 9,11,5 - xor 25,25,27 - add 10,10,24 - and 15,12,7 - xor 25,25,17 - add 10,10,9 - or 6,12,7 - rotlwi 12,12,30 - xor 25,25,22 - and 6,6,8 - or 15,15,6 - rotlwi 25,25,1 - add 10,10,15 - add 9,0,8 - rotlwi 8,10,5 - xor 26,26,28 - add 9,9,25 - and 15,11,12 - xor 26,26,18 - add 9,9,8 - or 6,11,12 - rotlwi 11,11,30 - xor 26,26,23 - and 6,6,7 - or 15,15,6 - rotlwi 26,26,1 - add 9,9,15 - add 8,0,7 - rotlwi 7,9,5 - xor 27,27,29 - add 8,8,26 - and 15,10,11 - xor 27,27,19 - add 8,8,7 - or 6,10,11 - rotlwi 10,10,30 - xor 27,27,24 - and 6,6,12 - or 15,15,6 - rotlwi 27,27,1 - add 8,8,15 - add 7,0,12 - rotlwi 12,8,5 - xor 28,28,30 - add 7,7,27 - and 15,9,10 - xor 28,28,20 - add 7,7,12 - or 6,9,10 - rotlwi 9,9,30 - xor 28,28,25 - and 6,6,11 - or 15,15,6 - rotlwi 28,28,1 - add 7,7,15 - lis 0,0xca62 - ori 0,0,0xc1d6 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 29,29,31 - add 12,12,28 - xor 15,15,9 - xor 29,29,21 - add 12,12,15 - rotlwi 8,8,30 - xor 29,29,26 - add 12,12,11 - rotlwi 29,29,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 30,30,16 - add 11,11,29 - xor 15,15,8 - xor 30,30,22 - add 11,11,15 - rotlwi 7,7,30 - xor 30,30,27 - add 11,11,10 - rotlwi 30,30,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 31,31,17 - add 10,10,30 - xor 15,15,7 - xor 31,31,23 - add 10,10,15 - rotlwi 12,12,30 - xor 31,31,28 - add 10,10,9 - rotlwi 31,31,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 16,16,18 - add 9,9,31 - xor 15,15,12 - xor 16,16,24 - add 9,9,15 - rotlwi 11,11,30 - xor 16,16,29 - add 9,9,8 - rotlwi 16,16,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 17,17,19 - add 8,8,16 - xor 15,15,11 - xor 17,17,25 - add 8,8,15 - rotlwi 10,10,30 - xor 17,17,30 - add 8,8,7 - rotlwi 17,17,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 18,18,20 - add 7,7,17 - xor 15,15,10 - xor 18,18,26 - add 7,7,15 - rotlwi 9,9,30 - xor 18,18,31 - add 7,7,12 - rotlwi 18,18,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 19,19,21 - add 12,12,18 - xor 15,15,9 - xor 19,19,27 - add 12,12,15 - rotlwi 8,8,30 - xor 19,19,16 - add 12,12,11 - rotlwi 19,19,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 20,20,22 - add 11,11,19 - xor 15,15,8 - xor 20,20,28 - add 11,11,15 - rotlwi 7,7,30 - xor 20,20,17 - add 11,11,10 - rotlwi 20,20,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 21,21,23 - add 10,10,20 - xor 15,15,7 - xor 21,21,29 - add 10,10,15 - rotlwi 12,12,30 - xor 21,21,18 - add 10,10,9 - rotlwi 21,21,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 22,22,24 - add 9,9,21 - xor 15,15,12 - xor 22,22,30 - add 9,9,15 - rotlwi 11,11,30 - xor 22,22,19 - add 9,9,8 - rotlwi 22,22,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 23,23,25 - add 8,8,22 - xor 15,15,11 - xor 23,23,31 - add 8,8,15 - rotlwi 10,10,30 - xor 23,23,20 - add 8,8,7 - rotlwi 23,23,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 24,24,26 - add 7,7,23 - xor 15,15,10 - xor 24,24,16 - add 7,7,15 - rotlwi 9,9,30 - xor 24,24,21 - add 7,7,12 - rotlwi 24,24,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 25,25,27 - add 12,12,24 - xor 15,15,9 - xor 25,25,17 - add 12,12,15 - rotlwi 8,8,30 - xor 25,25,22 - add 12,12,11 - rotlwi 25,25,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 26,26,28 - add 11,11,25 - xor 15,15,8 - xor 26,26,18 - add 11,11,15 - rotlwi 7,7,30 - xor 26,26,23 - add 11,11,10 - rotlwi 26,26,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 27,27,29 - add 10,10,26 - xor 15,15,7 - xor 27,27,19 - add 10,10,15 - rotlwi 12,12,30 - xor 27,27,24 - add 10,10,9 - rotlwi 27,27,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 28,28,30 - add 9,9,27 - xor 15,15,12 - xor 28,28,20 - add 9,9,15 - rotlwi 11,11,30 - xor 28,28,25 - add 9,9,8 - rotlwi 28,28,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 29,29,31 - add 8,8,28 - xor 15,15,11 - xor 29,29,21 - add 8,8,15 - rotlwi 10,10,30 - xor 29,29,26 - add 8,8,7 - rotlwi 29,29,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 30,30,16 - add 7,7,29 - xor 15,15,10 - xor 30,30,22 - add 7,7,15 - rotlwi 9,9,30 - xor 30,30,27 - add 7,7,12 - rotlwi 30,30,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 31,31,17 - add 12,12,30 - xor 15,15,9 - xor 31,31,23 - add 12,12,15 - rotlwi 8,8,30 - xor 31,31,28 - add 12,12,11 - rotlwi 31,31,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - lwz 16,0(3) - add 11,11,31 - xor 15,15,8 - lwz 17,4(3) - add 11,11,15 - rotlwi 7,7,30 - lwz 18,8(3) - lwz 19,12(3) - add 11,11,10 - lwz 20,16(3) - add 16,16,11 - add 17,17,12 - add 18,18,7 - add 19,19,8 - add 20,20,9 - stw 16,0(3) - mr 7,16 - stw 17,4(3) - mr 8,17 - stw 18,8(3) - mr 9,18 - stw 19,12(3) - mr 10,19 - stw 20,16(3) - mr 11,20 - addi 4,4,64 - bdnz .Lsha1_block_private - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size sha1_block_data_order,.-sha1_block_data_order -.byte 83,72,65,49,32,98,108,111,99,107,32,116,114,97,110,115,102,111,114,109,32,102,111,114,32,80,80,67,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,102,121,46,99,104,97,108,109,101,114,115,46,115,101,62,0 -.align 2 diff --git a/sys/crypto/openssl/powerpc/sha256-ppc.S b/sys/crypto/openssl/powerpc/sha256-ppc.S deleted file mode 100644 index 9b56899af0d..00000000000 --- a/sys/crypto/openssl/powerpc/sha256-ppc.S +++ /dev/null @@ -1,1321 +0,0 @@ -/* Do not modify. This file is auto-generated from sha512-ppc.pl. */ -.machine "any" -.text - -.globl sha256_block_ppc -.type sha256_block_ppc,@function -.align 6 -sha256_block_ppc: - stwu 1,-192(1) - mflr 0 - slwi 5,5,6 - - stw 3,104(1) - - stw 14,120(1) - stw 15,124(1) - stw 16,128(1) - stw 17,132(1) - stw 18,136(1) - stw 19,140(1) - stw 20,144(1) - stw 21,148(1) - stw 22,152(1) - stw 23,156(1) - stw 24,160(1) - stw 25,164(1) - stw 26,168(1) - stw 27,172(1) - stw 28,176(1) - stw 29,180(1) - stw 30,184(1) - stw 31,188(1) - stw 0,196(1) - lwz 8,0(3) - mr 31,4 - lwz 9,4(3) - lwz 10,8(3) - lwz 11,12(3) - lwz 12,16(3) - lwz 6,20(3) - lwz 14,24(3) - lwz 15,28(3) - bl .LPICmeup -.LPICedup: - andi. 0,31,3 - bne .Lunaligned -.Laligned: - add 5,31,5 - stw 5,96(1) - stw 31,100(1) - bl .Lsha2_block_private - b .Ldone - - - - - - - -.align 4 -.Lunaligned: - subfic 0,31,4096 - andi. 0,0,4032 - beq .Lcross_page - .long 0x7c050040 - ble .Laligned - subfc 5,0,5 - add 0,31,0 - stw 5,92(1) - stw 0,96(1) - stw 31,100(1) - bl .Lsha2_block_private - - lwz 5,92(1) -.Lcross_page: - li 0,16 - mtctr 0 - addi 20,1,24 -.Lmemcpy: - lbz 16,0(31) - lbz 17,1(31) - lbz 18,2(31) - lbz 19,3(31) - addi 31,31,4 - stb 16,0(20) - stb 17,1(20) - stb 18,2(20) - stb 19,3(20) - addi 20,20,4 - bdnz .Lmemcpy - stw 31,88(1) - addi 0,1,88 - addi 31,1,24 - stw 5,92(1) - stw 0,96(1) - stw 31,100(1) - bl .Lsha2_block_private - lwz 31,88(1) - lwz 5,92(1) - addic. 5,5,-64 - bne .Lunaligned - -.Ldone: - lwz 0,196(1) - lwz 14,120(1) - lwz 15,124(1) - lwz 16,128(1) - lwz 17,132(1) - lwz 18,136(1) - lwz 19,140(1) - lwz 20,144(1) - lwz 21,148(1) - lwz 22,152(1) - lwz 23,156(1) - lwz 24,160(1) - lwz 25,164(1) - lwz 26,168(1) - lwz 27,172(1) - lwz 28,176(1) - lwz 29,180(1) - lwz 30,184(1) - lwz 31,188(1) - mtlr 0 - addi 1,1,192 - blr -.long 0 -.byte 0,12,4,1,0x80,18,3,0 -.long 0 -.align 4 -.Lsha2_block_private: - lwz 0,0(7) - lwz 16,0(31) - rotrwi 3,12,6 - rotrwi 4,12,11 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrwi 4,4,14 - or 5,5,0 - add 15,15,16 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrwi 3,8,2 - rotrwi 4,8,13 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - lwz 0,4(7) - add 15,15,3 - add 15,15,5 - - lwz 17,4(31) - rotrwi 3,11,6 - rotrwi 4,11,11 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrwi 4,4,14 - or 5,5,0 - add 14,14,17 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrwi 3,15,2 - rotrwi 4,15,13 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - lwz 0,8(7) - add 14,14,3 - add 14,14,5 - - lwz 18,8(31) - rotrwi 3,10,6 - rotrwi 4,10,11 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrwi 4,4,14 - or 5,5,0 - add 6,6,18 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrwi 3,14,2 - rotrwi 4,14,13 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - lwz 0,12(7) - add 6,6,3 - add 6,6,5 - - lwz 19,12(31) - rotrwi 3,9,6 - rotrwi 4,9,11 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrwi 4,4,14 - or 5,5,0 - add 12,12,19 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrwi 3,6,2 - rotrwi 4,6,13 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - lwz 0,16(7) - add 12,12,3 - add 12,12,5 - - lwz 20,16(31) - rotrwi 3,8,6 - rotrwi 4,8,11 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrwi 4,4,14 - or 5,5,0 - add 11,11,20 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrwi 3,12,2 - rotrwi 4,12,13 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - lwz 0,20(7) - add 11,11,3 - add 11,11,5 - - lwz 21,20(31) - rotrwi 3,15,6 - rotrwi 4,15,11 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrwi 4,4,14 - or 5,5,0 - add 10,10,21 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrwi 3,11,2 - rotrwi 4,11,13 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - lwz 0,24(7) - add 10,10,3 - add 10,10,5 - - lwz 22,24(31) - rotrwi 3,14,6 - rotrwi 4,14,11 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrwi 4,4,14 - or 5,5,0 - add 9,9,22 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrwi 3,10,2 - rotrwi 4,10,13 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - lwz 0,28(7) - add 9,9,3 - add 9,9,5 - - lwz 23,28(31) - rotrwi 3,6,6 - rotrwi 4,6,11 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrwi 4,4,14 - or 5,5,0 - add 8,8,23 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrwi 3,9,2 - rotrwi 4,9,13 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - lwz 0,32(7) - add 8,8,3 - add 8,8,5 - - lwz 24,32(31) - rotrwi 3,12,6 - rotrwi 4,12,11 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrwi 4,4,14 - or 5,5,0 - add 15,15,24 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrwi 3,8,2 - rotrwi 4,8,13 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - lwz 0,36(7) - add 15,15,3 - add 15,15,5 - - lwz 25,36(31) - rotrwi 3,11,6 - rotrwi 4,11,11 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrwi 4,4,14 - or 5,5,0 - add 14,14,25 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrwi 3,15,2 - rotrwi 4,15,13 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - lwz 0,40(7) - add 14,14,3 - add 14,14,5 - - lwz 26,40(31) - rotrwi 3,10,6 - rotrwi 4,10,11 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrwi 4,4,14 - or 5,5,0 - add 6,6,26 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrwi 3,14,2 - rotrwi 4,14,13 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - lwz 0,44(7) - add 6,6,3 - add 6,6,5 - - lwz 27,44(31) - rotrwi 3,9,6 - rotrwi 4,9,11 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrwi 4,4,14 - or 5,5,0 - add 12,12,27 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrwi 3,6,2 - rotrwi 4,6,13 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - lwz 0,48(7) - add 12,12,3 - add 12,12,5 - - lwz 28,48(31) - rotrwi 3,8,6 - rotrwi 4,8,11 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrwi 4,4,14 - or 5,5,0 - add 11,11,28 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrwi 3,12,2 - rotrwi 4,12,13 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - lwz 0,52(7) - add 11,11,3 - add 11,11,5 - - lwz 29,52(31) - rotrwi 3,15,6 - rotrwi 4,15,11 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrwi 4,4,14 - or 5,5,0 - add 10,10,29 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrwi 3,11,2 - rotrwi 4,11,13 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - lwz 0,56(7) - add 10,10,3 - add 10,10,5 - - lwz 30,56(31) - rotrwi 3,14,6 - rotrwi 4,14,11 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrwi 4,4,14 - or 5,5,0 - add 9,9,30 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrwi 3,10,2 - rotrwi 4,10,13 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - lwz 0,60(7) - add 9,9,3 - add 9,9,5 - - lwz 31,60(31) - rotrwi 3,6,6 - rotrwi 4,6,11 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrwi 4,4,14 - or 5,5,0 - add 8,8,31 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrwi 3,9,2 - rotrwi 4,9,13 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - add 8,8,3 - add 8,8,5 - - li 5,3 - mtctr 5 -.align 4 -.Lrounds: - addi 7,7,64 - rotrwi 3,17,7 - rotrwi 4,17,18 - rotrwi 5,30,17 - rotrwi 0,30,19 - xor 3,3,4 - srwi 4,17,3 - xor 5,5,0 - srwi 0,30,10 - add 16,16,25 - xor 3,3,4 - xor 5,5,0 - lwz 0,0(7) - add 16,16,3 - add 16,16,5 - rotrwi 3,12,6 - rotrwi 4,12,11 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrwi 4,4,14 - or 5,5,0 - add 15,15,16 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrwi 3,8,2 - rotrwi 4,8,13 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - add 15,15,3 - add 15,15,5 - - rotrwi 3,18,7 - rotrwi 4,18,18 - rotrwi 5,31,17 - rotrwi 0,31,19 - xor 3,3,4 - srwi 4,18,3 - xor 5,5,0 - srwi 0,31,10 - add 17,17,26 - xor 3,3,4 - xor 5,5,0 - lwz 0,4(7) - add 17,17,3 - add 17,17,5 - rotrwi 3,11,6 - rotrwi 4,11,11 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrwi 4,4,14 - or 5,5,0 - add 14,14,17 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrwi 3,15,2 - rotrwi 4,15,13 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - add 14,14,3 - add 14,14,5 - - rotrwi 3,19,7 - rotrwi 4,19,18 - rotrwi 5,16,17 - rotrwi 0,16,19 - xor 3,3,4 - srwi 4,19,3 - xor 5,5,0 - srwi 0,16,10 - add 18,18,27 - xor 3,3,4 - xor 5,5,0 - lwz 0,8(7) - add 18,18,3 - add 18,18,5 - rotrwi 3,10,6 - rotrwi 4,10,11 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrwi 4,4,14 - or 5,5,0 - add 6,6,18 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrwi 3,14,2 - rotrwi 4,14,13 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - add 6,6,3 - add 6,6,5 - - rotrwi 3,20,7 - rotrwi 4,20,18 - rotrwi 5,17,17 - rotrwi 0,17,19 - xor 3,3,4 - srwi 4,20,3 - xor 5,5,0 - srwi 0,17,10 - add 19,19,28 - xor 3,3,4 - xor 5,5,0 - lwz 0,12(7) - add 19,19,3 - add 19,19,5 - rotrwi 3,9,6 - rotrwi 4,9,11 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrwi 4,4,14 - or 5,5,0 - add 12,12,19 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrwi 3,6,2 - rotrwi 4,6,13 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - add 12,12,3 - add 12,12,5 - - rotrwi 3,21,7 - rotrwi 4,21,18 - rotrwi 5,18,17 - rotrwi 0,18,19 - xor 3,3,4 - srwi 4,21,3 - xor 5,5,0 - srwi 0,18,10 - add 20,20,29 - xor 3,3,4 - xor 5,5,0 - lwz 0,16(7) - add 20,20,3 - add 20,20,5 - rotrwi 3,8,6 - rotrwi 4,8,11 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrwi 4,4,14 - or 5,5,0 - add 11,11,20 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrwi 3,12,2 - rotrwi 4,12,13 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - add 11,11,3 - add 11,11,5 - - rotrwi 3,22,7 - rotrwi 4,22,18 - rotrwi 5,19,17 - rotrwi 0,19,19 - xor 3,3,4 - srwi 4,22,3 - xor 5,5,0 - srwi 0,19,10 - add 21,21,30 - xor 3,3,4 - xor 5,5,0 - lwz 0,20(7) - add 21,21,3 - add 21,21,5 - rotrwi 3,15,6 - rotrwi 4,15,11 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrwi 4,4,14 - or 5,5,0 - add 10,10,21 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrwi 3,11,2 - rotrwi 4,11,13 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - add 10,10,3 - add 10,10,5 - - rotrwi 3,23,7 - rotrwi 4,23,18 - rotrwi 5,20,17 - rotrwi 0,20,19 - xor 3,3,4 - srwi 4,23,3 - xor 5,5,0 - srwi 0,20,10 - add 22,22,31 - xor 3,3,4 - xor 5,5,0 - lwz 0,24(7) - add 22,22,3 - add 22,22,5 - rotrwi 3,14,6 - rotrwi 4,14,11 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrwi 4,4,14 - or 5,5,0 - add 9,9,22 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrwi 3,10,2 - rotrwi 4,10,13 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - add 9,9,3 - add 9,9,5 - - rotrwi 3,24,7 - rotrwi 4,24,18 - rotrwi 5,21,17 - rotrwi 0,21,19 - xor 3,3,4 - srwi 4,24,3 - xor 5,5,0 - srwi 0,21,10 - add 23,23,16 - xor 3,3,4 - xor 5,5,0 - lwz 0,28(7) - add 23,23,3 - add 23,23,5 - rotrwi 3,6,6 - rotrwi 4,6,11 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrwi 4,4,14 - or 5,5,0 - add 8,8,23 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrwi 3,9,2 - rotrwi 4,9,13 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - add 8,8,3 - add 8,8,5 - - rotrwi 3,25,7 - rotrwi 4,25,18 - rotrwi 5,22,17 - rotrwi 0,22,19 - xor 3,3,4 - srwi 4,25,3 - xor 5,5,0 - srwi 0,22,10 - add 24,24,17 - xor 3,3,4 - xor 5,5,0 - lwz 0,32(7) - add 24,24,3 - add 24,24,5 - rotrwi 3,12,6 - rotrwi 4,12,11 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrwi 4,4,14 - or 5,5,0 - add 15,15,24 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrwi 3,8,2 - rotrwi 4,8,13 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - add 15,15,3 - add 15,15,5 - - rotrwi 3,26,7 - rotrwi 4,26,18 - rotrwi 5,23,17 - rotrwi 0,23,19 - xor 3,3,4 - srwi 4,26,3 - xor 5,5,0 - srwi 0,23,10 - add 25,25,18 - xor 3,3,4 - xor 5,5,0 - lwz 0,36(7) - add 25,25,3 - add 25,25,5 - rotrwi 3,11,6 - rotrwi 4,11,11 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrwi 4,4,14 - or 5,5,0 - add 14,14,25 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrwi 3,15,2 - rotrwi 4,15,13 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - add 14,14,3 - add 14,14,5 - - rotrwi 3,27,7 - rotrwi 4,27,18 - rotrwi 5,24,17 - rotrwi 0,24,19 - xor 3,3,4 - srwi 4,27,3 - xor 5,5,0 - srwi 0,24,10 - add 26,26,19 - xor 3,3,4 - xor 5,5,0 - lwz 0,40(7) - add 26,26,3 - add 26,26,5 - rotrwi 3,10,6 - rotrwi 4,10,11 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrwi 4,4,14 - or 5,5,0 - add 6,6,26 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrwi 3,14,2 - rotrwi 4,14,13 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - add 6,6,3 - add 6,6,5 - - rotrwi 3,28,7 - rotrwi 4,28,18 - rotrwi 5,25,17 - rotrwi 0,25,19 - xor 3,3,4 - srwi 4,28,3 - xor 5,5,0 - srwi 0,25,10 - add 27,27,20 - xor 3,3,4 - xor 5,5,0 - lwz 0,44(7) - add 27,27,3 - add 27,27,5 - rotrwi 3,9,6 - rotrwi 4,9,11 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrwi 4,4,14 - or 5,5,0 - add 12,12,27 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrwi 3,6,2 - rotrwi 4,6,13 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - add 12,12,3 - add 12,12,5 - - rotrwi 3,29,7 - rotrwi 4,29,18 - rotrwi 5,26,17 - rotrwi 0,26,19 - xor 3,3,4 - srwi 4,29,3 - xor 5,5,0 - srwi 0,26,10 - add 28,28,21 - xor 3,3,4 - xor 5,5,0 - lwz 0,48(7) - add 28,28,3 - add 28,28,5 - rotrwi 3,8,6 - rotrwi 4,8,11 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrwi 4,4,14 - or 5,5,0 - add 11,11,28 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrwi 3,12,2 - rotrwi 4,12,13 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - add 11,11,3 - add 11,11,5 - - rotrwi 3,30,7 - rotrwi 4,30,18 - rotrwi 5,27,17 - rotrwi 0,27,19 - xor 3,3,4 - srwi 4,30,3 - xor 5,5,0 - srwi 0,27,10 - add 29,29,22 - xor 3,3,4 - xor 5,5,0 - lwz 0,52(7) - add 29,29,3 - add 29,29,5 - rotrwi 3,15,6 - rotrwi 4,15,11 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrwi 4,4,14 - or 5,5,0 - add 10,10,29 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrwi 3,11,2 - rotrwi 4,11,13 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - add 10,10,3 - add 10,10,5 - - rotrwi 3,31,7 - rotrwi 4,31,18 - rotrwi 5,28,17 - rotrwi 0,28,19 - xor 3,3,4 - srwi 4,31,3 - xor 5,5,0 - srwi 0,28,10 - add 30,30,23 - xor 3,3,4 - xor 5,5,0 - lwz 0,56(7) - add 30,30,3 - add 30,30,5 - rotrwi 3,14,6 - rotrwi 4,14,11 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrwi 4,4,14 - or 5,5,0 - add 9,9,30 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrwi 3,10,2 - rotrwi 4,10,13 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - add 9,9,3 - add 9,9,5 - - rotrwi 3,16,7 - rotrwi 4,16,18 - rotrwi 5,29,17 - rotrwi 0,29,19 - xor 3,3,4 - srwi 4,16,3 - xor 5,5,0 - srwi 0,29,10 - add 31,31,24 - xor 3,3,4 - xor 5,5,0 - lwz 0,60(7) - add 31,31,3 - add 31,31,5 - rotrwi 3,6,6 - rotrwi 4,6,11 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrwi 4,4,14 - or 5,5,0 - add 8,8,31 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrwi 3,9,2 - rotrwi 4,9,13 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - add 8,8,3 - add 8,8,5 - - bdnz .Lrounds - - lwz 3,104(1) - lwz 31,100(1) - lwz 5,96(1) - subi 7,7,192 - - lwz 16,0(3) - lwz 17,4(3) - lwz 18,8(3) - lwz 19,12(3) - lwz 20,16(3) - lwz 21,20(3) - lwz 22,24(3) - addi 31,31,64 - lwz 23,28(3) - add 8,8,16 - add 9,9,17 - stw 31,100(1) - add 10,10,18 - stw 8,0(3) - add 11,11,19 - stw 9,4(3) - add 12,12,20 - stw 10,8(3) - add 6,6,21 - stw 11,12(3) - add 14,14,22 - stw 12,16(3) - add 15,15,23 - stw 6,20(3) - stw 14,24(3) - .long 0x7c1f2840 - stw 15,28(3) - bne .Lsha2_block_private - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size sha256_block_ppc,.-sha256_block_ppc -.align 6 -.LPICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 7 - addi 7,7,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.long 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5 -.long 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5 -.long 0xd807aa98,0x12835b01,0x243185be,0x550c7dc3 -.long 0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174 -.long 0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc -.long 0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da -.long 0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7 -.long 0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967 -.long 0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13 -.long 0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85 -.long 0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3 -.long 0xd192e819,0xd6990624,0xf40e3585,0x106aa070 -.long 0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5 -.long 0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3 -.long 0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208 -.long 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2 diff --git a/sys/crypto/openssl/powerpc/sha256p8-ppc.S b/sys/crypto/openssl/powerpc/sha256p8-ppc.S deleted file mode 100644 index a55e926c1c7..00000000000 --- a/sys/crypto/openssl/powerpc/sha256p8-ppc.S +++ /dev/null @@ -1,735 +0,0 @@ -/* Do not modify. This file is auto-generated from sha512p8-ppc.pl. */ -.machine "any" -.text - -.globl sha256_block_p8 -.type sha256_block_p8,@function -.align 6 -sha256_block_p8: - stwu 1,-328(1) - mflr 8 - li 10,175 - li 11,191 - stvx 24,10,1 - addi 10,10,32 - mfspr 12,256 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - li 11,-4096+255 - stw 12,300(1) - li 10,0x10 - stw 26,304(1) - li 26,0x20 - stw 27,308(1) - li 27,0x30 - stw 28,312(1) - li 28,0x40 - stw 29,316(1) - li 29,0x50 - stw 30,320(1) - li 30,0x60 - stw 31,324(1) - li 31,0x70 - stw 8,332(1) - mtspr 256,11 - - bl .LPICmeup - addi 11,1,47 - .long 0x7C001E19 - .long 0x7C8A1E19 - vsldoi 1,0,0,4 - vsldoi 2,0,0,8 - vsldoi 3,0,0,12 - vsldoi 5,4,4,4 - vsldoi 6,4,4,8 - vsldoi 7,4,4,12 - li 0,3 - b .Loop -.align 5 -.Loop: - lvx 28,0,6 - .long 0x7D002699 - addi 4,4,16 - mr 7,6 - stvx 0,0,11 - stvx 1,10,11 - stvx 2,26,11 - stvx 3,27,11 - stvx 4,28,11 - stvx 5,29,11 - stvx 6,30,11 - stvx 7,31,11 - vadduwm 7,7,28 - lvx 28,10,6 - vadduwm 7,7,8 - vsel 29,6,5,4 - vadduwm 6,6,28 - vadduwm 7,7,29 - .long 0x13C4FE82 - vadduwm 7,7,30 - vxor 29,0,1 - vsel 29,1,2,29 - vadduwm 3,3,7 - .long 0x13C08682 - vadduwm 30,30,29 - vadduwm 7,7,30 - lvx 28,26,7 - vsldoi 9,8,8,4 - vadduwm 6,6,9 - vsel 29,5,4,3 - vadduwm 5,5,28 - vadduwm 6,6,29 - .long 0x13C3FE82 - vadduwm 6,6,30 - vxor 29,7,0 - vsel 29,0,1,29 - vadduwm 2,2,6 - .long 0x13C78682 - vadduwm 30,30,29 - vadduwm 6,6,30 - lvx 28,27,7 - vsldoi 10,9,9,4 - vadduwm 5,5,10 - vsel 29,4,3,2 - vadduwm 4,4,28 - vadduwm 5,5,29 - .long 0x13C2FE82 - vadduwm 5,5,30 - vxor 29,6,7 - vsel 29,7,0,29 - vadduwm 1,1,5 - .long 0x13C68682 - vadduwm 30,30,29 - vadduwm 5,5,30 - lvx 28,28,7 - .long 0x7D802699 - addi 4,4,16 - vsldoi 11,10,10,4 - vadduwm 4,4,11 - vsel 29,3,2,1 - vadduwm 3,3,28 - vadduwm 4,4,29 - .long 0x13C1FE82 - vadduwm 4,4,30 - vxor 29,5,6 - vsel 29,6,7,29 - vadduwm 0,0,4 - .long 0x13C58682 - vadduwm 30,30,29 - vadduwm 4,4,30 - lvx 28,29,7 - vadduwm 3,3,12 - vsel 29,2,1,0 - vadduwm 2,2,28 - vadduwm 3,3,29 - .long 0x13C0FE82 - vadduwm 3,3,30 - vxor 29,4,5 - vsel 29,5,6,29 - vadduwm 7,7,3 - .long 0x13C48682 - vadduwm 30,30,29 - vadduwm 3,3,30 - lvx 28,30,7 - vsldoi 13,12,12,4 - vadduwm 2,2,13 - vsel 29,1,0,7 - vadduwm 1,1,28 - vadduwm 2,2,29 - .long 0x13C7FE82 - vadduwm 2,2,30 - vxor 29,3,4 - vsel 29,4,5,29 - vadduwm 6,6,2 - .long 0x13C38682 - vadduwm 30,30,29 - vadduwm 2,2,30 - lvx 28,31,7 - addi 7,7,0x80 - vsldoi 14,13,13,4 - vadduwm 1,1,14 - vsel 29,0,7,6 - vadduwm 0,0,28 - vadduwm 1,1,29 - .long 0x13C6FE82 - vadduwm 1,1,30 - vxor 29,2,3 - vsel 29,3,4,29 - vadduwm 5,5,1 - .long 0x13C28682 - vadduwm 30,30,29 - vadduwm 1,1,30 - lvx 28,0,7 - .long 0x7E002699 - addi 4,4,16 - vsldoi 15,14,14,4 - vadduwm 0,0,15 - vsel 29,7,6,5 - vadduwm 7,7,28 - vadduwm 0,0,29 - .long 0x13C5FE82 - vadduwm 0,0,30 - vxor 29,1,2 - vsel 29,2,3,29 - vadduwm 4,4,0 - .long 0x13C18682 - vadduwm 30,30,29 - vadduwm 0,0,30 - lvx 28,10,7 - vadduwm 7,7,16 - vsel 29,6,5,4 - vadduwm 6,6,28 - vadduwm 7,7,29 - .long 0x13C4FE82 - vadduwm 7,7,30 - vxor 29,0,1 - vsel 29,1,2,29 - vadduwm 3,3,7 - .long 0x13C08682 - vadduwm 30,30,29 - vadduwm 7,7,30 - lvx 28,26,7 - vsldoi 17,16,16,4 - vadduwm 6,6,17 - vsel 29,5,4,3 - vadduwm 5,5,28 - vadduwm 6,6,29 - .long 0x13C3FE82 - vadduwm 6,6,30 - vxor 29,7,0 - vsel 29,0,1,29 - vadduwm 2,2,6 - .long 0x13C78682 - vadduwm 30,30,29 - vadduwm 6,6,30 - lvx 28,27,7 - vsldoi 18,17,17,4 - vadduwm 5,5,18 - vsel 29,4,3,2 - vadduwm 4,4,28 - vadduwm 5,5,29 - .long 0x13C2FE82 - vadduwm 5,5,30 - vxor 29,6,7 - vsel 29,7,0,29 - vadduwm 1,1,5 - .long 0x13C68682 - vadduwm 30,30,29 - vadduwm 5,5,30 - lvx 28,28,7 - .long 0x7F002699 - addi 4,4,16 - vsldoi 19,18,18,4 - vadduwm 4,4,19 - vsel 29,3,2,1 - vadduwm 3,3,28 - vadduwm 4,4,29 - .long 0x13C1FE82 - vadduwm 4,4,30 - vxor 29,5,6 - vsel 29,6,7,29 - vadduwm 0,0,4 - .long 0x13C58682 - vadduwm 30,30,29 - vadduwm 4,4,30 - lvx 28,29,7 - vadduwm 3,3,24 - vsel 29,2,1,0 - vadduwm 2,2,28 - vadduwm 3,3,29 - .long 0x13C0FE82 - vadduwm 3,3,30 - vxor 29,4,5 - vsel 29,5,6,29 - vadduwm 7,7,3 - .long 0x13C48682 - vadduwm 30,30,29 - vadduwm 3,3,30 - lvx 28,30,7 - vsldoi 25,24,24,4 - vadduwm 2,2,25 - vsel 29,1,0,7 - vadduwm 1,1,28 - vadduwm 2,2,29 - .long 0x13C7FE82 - vadduwm 2,2,30 - vxor 29,3,4 - vsel 29,4,5,29 - vadduwm 6,6,2 - .long 0x13C38682 - vadduwm 30,30,29 - vadduwm 2,2,30 - lvx 28,31,7 - addi 7,7,0x80 - vsldoi 26,25,25,4 - vadduwm 1,1,26 - vsel 29,0,7,6 - vadduwm 0,0,28 - vadduwm 1,1,29 - .long 0x13C6FE82 - vadduwm 1,1,30 - vxor 29,2,3 - vsel 29,3,4,29 - vadduwm 5,5,1 - .long 0x13C28682 - vadduwm 30,30,29 - vadduwm 1,1,30 - lvx 28,0,7 - vsldoi 27,26,26,4 - .long 0x13C90682 - vadduwm 8,8,30 - .long 0x13DA7E82 - vadduwm 8,8,30 - vadduwm 8,8,17 - vadduwm 0,0,27 - vsel 29,7,6,5 - vadduwm 7,7,28 - vadduwm 0,0,29 - .long 0x13C5FE82 - vadduwm 0,0,30 - vxor 29,1,2 - vsel 29,2,3,29 - vadduwm 4,4,0 - .long 0x13C18682 - vadduwm 30,30,29 - vadduwm 0,0,30 - lvx 28,10,7 - mtctr 0 - b .L16_xx -.align 5 -.L16_xx: - .long 0x13CA0682 - vadduwm 9,9,30 - .long 0x13DB7E82 - vadduwm 9,9,30 - vadduwm 9,9,18 - vadduwm 7,7,8 - vsel 29,6,5,4 - vadduwm 6,6,28 - vadduwm 7,7,29 - .long 0x13C4FE82 - vadduwm 7,7,30 - vxor 29,0,1 - vsel 29,1,2,29 - vadduwm 3,3,7 - .long 0x13C08682 - vadduwm 30,30,29 - vadduwm 7,7,30 - lvx 28,26,7 - .long 0x13CB0682 - vadduwm 10,10,30 - .long 0x13C87E82 - vadduwm 10,10,30 - vadduwm 10,10,19 - vadduwm 6,6,9 - vsel 29,5,4,3 - vadduwm 5,5,28 - vadduwm 6,6,29 - .long 0x13C3FE82 - vadduwm 6,6,30 - vxor 29,7,0 - vsel 29,0,1,29 - vadduwm 2,2,6 - .long 0x13C78682 - vadduwm 30,30,29 - vadduwm 6,6,30 - lvx 28,27,7 - .long 0x13CC0682 - vadduwm 11,11,30 - .long 0x13C97E82 - vadduwm 11,11,30 - vadduwm 11,11,24 - vadduwm 5,5,10 - vsel 29,4,3,2 - vadduwm 4,4,28 - vadduwm 5,5,29 - .long 0x13C2FE82 - vadduwm 5,5,30 - vxor 29,6,7 - vsel 29,7,0,29 - vadduwm 1,1,5 - .long 0x13C68682 - vadduwm 30,30,29 - vadduwm 5,5,30 - lvx 28,28,7 - .long 0x13CD0682 - vadduwm 12,12,30 - .long 0x13CA7E82 - vadduwm 12,12,30 - vadduwm 12,12,25 - vadduwm 4,4,11 - vsel 29,3,2,1 - vadduwm 3,3,28 - vadduwm 4,4,29 - .long 0x13C1FE82 - vadduwm 4,4,30 - vxor 29,5,6 - vsel 29,6,7,29 - vadduwm 0,0,4 - .long 0x13C58682 - vadduwm 30,30,29 - vadduwm 4,4,30 - lvx 28,29,7 - .long 0x13CE0682 - vadduwm 13,13,30 - .long 0x13CB7E82 - vadduwm 13,13,30 - vadduwm 13,13,26 - vadduwm 3,3,12 - vsel 29,2,1,0 - vadduwm 2,2,28 - vadduwm 3,3,29 - .long 0x13C0FE82 - vadduwm 3,3,30 - vxor 29,4,5 - vsel 29,5,6,29 - vadduwm 7,7,3 - .long 0x13C48682 - vadduwm 30,30,29 - vadduwm 3,3,30 - lvx 28,30,7 - .long 0x13CF0682 - vadduwm 14,14,30 - .long 0x13CC7E82 - vadduwm 14,14,30 - vadduwm 14,14,27 - vadduwm 2,2,13 - vsel 29,1,0,7 - vadduwm 1,1,28 - vadduwm 2,2,29 - .long 0x13C7FE82 - vadduwm 2,2,30 - vxor 29,3,4 - vsel 29,4,5,29 - vadduwm 6,6,2 - .long 0x13C38682 - vadduwm 30,30,29 - vadduwm 2,2,30 - lvx 28,31,7 - addi 7,7,0x80 - .long 0x13D00682 - vadduwm 15,15,30 - .long 0x13CD7E82 - vadduwm 15,15,30 - vadduwm 15,15,8 - vadduwm 1,1,14 - vsel 29,0,7,6 - vadduwm 0,0,28 - vadduwm 1,1,29 - .long 0x13C6FE82 - vadduwm 1,1,30 - vxor 29,2,3 - vsel 29,3,4,29 - vadduwm 5,5,1 - .long 0x13C28682 - vadduwm 30,30,29 - vadduwm 1,1,30 - lvx 28,0,7 - .long 0x13D10682 - vadduwm 16,16,30 - .long 0x13CE7E82 - vadduwm 16,16,30 - vadduwm 16,16,9 - vadduwm 0,0,15 - vsel 29,7,6,5 - vadduwm 7,7,28 - vadduwm 0,0,29 - .long 0x13C5FE82 - vadduwm 0,0,30 - vxor 29,1,2 - vsel 29,2,3,29 - vadduwm 4,4,0 - .long 0x13C18682 - vadduwm 30,30,29 - vadduwm 0,0,30 - lvx 28,10,7 - .long 0x13D20682 - vadduwm 17,17,30 - .long 0x13CF7E82 - vadduwm 17,17,30 - vadduwm 17,17,10 - vadduwm 7,7,16 - vsel 29,6,5,4 - vadduwm 6,6,28 - vadduwm 7,7,29 - .long 0x13C4FE82 - vadduwm 7,7,30 - vxor 29,0,1 - vsel 29,1,2,29 - vadduwm 3,3,7 - .long 0x13C08682 - vadduwm 30,30,29 - vadduwm 7,7,30 - lvx 28,26,7 - .long 0x13D30682 - vadduwm 18,18,30 - .long 0x13D07E82 - vadduwm 18,18,30 - vadduwm 18,18,11 - vadduwm 6,6,17 - vsel 29,5,4,3 - vadduwm 5,5,28 - vadduwm 6,6,29 - .long 0x13C3FE82 - vadduwm 6,6,30 - vxor 29,7,0 - vsel 29,0,1,29 - vadduwm 2,2,6 - .long 0x13C78682 - vadduwm 30,30,29 - vadduwm 6,6,30 - lvx 28,27,7 - .long 0x13D80682 - vadduwm 19,19,30 - .long 0x13D17E82 - vadduwm 19,19,30 - vadduwm 19,19,12 - vadduwm 5,5,18 - vsel 29,4,3,2 - vadduwm 4,4,28 - vadduwm 5,5,29 - .long 0x13C2FE82 - vadduwm 5,5,30 - vxor 29,6,7 - vsel 29,7,0,29 - vadduwm 1,1,5 - .long 0x13C68682 - vadduwm 30,30,29 - vadduwm 5,5,30 - lvx 28,28,7 - .long 0x13D90682 - vadduwm 24,24,30 - .long 0x13D27E82 - vadduwm 24,24,30 - vadduwm 24,24,13 - vadduwm 4,4,19 - vsel 29,3,2,1 - vadduwm 3,3,28 - vadduwm 4,4,29 - .long 0x13C1FE82 - vadduwm 4,4,30 - vxor 29,5,6 - vsel 29,6,7,29 - vadduwm 0,0,4 - .long 0x13C58682 - vadduwm 30,30,29 - vadduwm 4,4,30 - lvx 28,29,7 - .long 0x13DA0682 - vadduwm 25,25,30 - .long 0x13D37E82 - vadduwm 25,25,30 - vadduwm 25,25,14 - vadduwm 3,3,24 - vsel 29,2,1,0 - vadduwm 2,2,28 - vadduwm 3,3,29 - .long 0x13C0FE82 - vadduwm 3,3,30 - vxor 29,4,5 - vsel 29,5,6,29 - vadduwm 7,7,3 - .long 0x13C48682 - vadduwm 30,30,29 - vadduwm 3,3,30 - lvx 28,30,7 - .long 0x13DB0682 - vadduwm 26,26,30 - .long 0x13D87E82 - vadduwm 26,26,30 - vadduwm 26,26,15 - vadduwm 2,2,25 - vsel 29,1,0,7 - vadduwm 1,1,28 - vadduwm 2,2,29 - .long 0x13C7FE82 - vadduwm 2,2,30 - vxor 29,3,4 - vsel 29,4,5,29 - vadduwm 6,6,2 - .long 0x13C38682 - vadduwm 30,30,29 - vadduwm 2,2,30 - lvx 28,31,7 - addi 7,7,0x80 - .long 0x13C80682 - vadduwm 27,27,30 - .long 0x13D97E82 - vadduwm 27,27,30 - vadduwm 27,27,16 - vadduwm 1,1,26 - vsel 29,0,7,6 - vadduwm 0,0,28 - vadduwm 1,1,29 - .long 0x13C6FE82 - vadduwm 1,1,30 - vxor 29,2,3 - vsel 29,3,4,29 - vadduwm 5,5,1 - .long 0x13C28682 - vadduwm 30,30,29 - vadduwm 1,1,30 - lvx 28,0,7 - .long 0x13C90682 - vadduwm 8,8,30 - .long 0x13DA7E82 - vadduwm 8,8,30 - vadduwm 8,8,17 - vadduwm 0,0,27 - vsel 29,7,6,5 - vadduwm 7,7,28 - vadduwm 0,0,29 - .long 0x13C5FE82 - vadduwm 0,0,30 - vxor 29,1,2 - vsel 29,2,3,29 - vadduwm 4,4,0 - .long 0x13C18682 - vadduwm 30,30,29 - vadduwm 0,0,30 - lvx 28,10,7 - bdnz .L16_xx - - lvx 10,0,11 - subic. 5,5,1 - lvx 11,10,11 - vadduwm 0,0,10 - lvx 12,26,11 - vadduwm 1,1,11 - lvx 13,27,11 - vadduwm 2,2,12 - lvx 14,28,11 - vadduwm 3,3,13 - lvx 15,29,11 - vadduwm 4,4,14 - lvx 16,30,11 - vadduwm 5,5,15 - lvx 17,31,11 - vadduwm 6,6,16 - vadduwm 7,7,17 - bne .Loop - lvx 8,26,7 - vperm 0,0,1,28 - lvx 9,27,7 - vperm 4,4,5,28 - vperm 0,0,2,8 - vperm 4,4,6,8 - vperm 0,0,3,9 - vperm 4,4,7,9 - .long 0x7C001F19 - .long 0x7C8A1F19 - addi 11,1,175 - mtlr 8 - mtspr 256,12 - lvx 24,0,11 - lvx 25,10,11 - lvx 26,26,11 - lvx 27,27,11 - lvx 28,28,11 - lvx 29,29,11 - lvx 30,30,11 - lvx 31,31,11 - lwz 26,304(1) - lwz 27,308(1) - lwz 28,312(1) - lwz 29,316(1) - lwz 30,320(1) - lwz 31,324(1) - addi 1,1,328 - blr -.long 0 -.byte 0,12,4,1,0x80,6,3,0 -.long 0 -.size sha256_block_p8,.-sha256_block_p8 -.align 6 -.LPICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 6 - addi 6,6,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.long 0x428a2f98,0x428a2f98,0x428a2f98,0x428a2f98 -.long 0x71374491,0x71374491,0x71374491,0x71374491 -.long 0xb5c0fbcf,0xb5c0fbcf,0xb5c0fbcf,0xb5c0fbcf -.long 0xe9b5dba5,0xe9b5dba5,0xe9b5dba5,0xe9b5dba5 -.long 0x3956c25b,0x3956c25b,0x3956c25b,0x3956c25b -.long 0x59f111f1,0x59f111f1,0x59f111f1,0x59f111f1 -.long 0x923f82a4,0x923f82a4,0x923f82a4,0x923f82a4 -.long 0xab1c5ed5,0xab1c5ed5,0xab1c5ed5,0xab1c5ed5 -.long 0xd807aa98,0xd807aa98,0xd807aa98,0xd807aa98 -.long 0x12835b01,0x12835b01,0x12835b01,0x12835b01 -.long 0x243185be,0x243185be,0x243185be,0x243185be -.long 0x550c7dc3,0x550c7dc3,0x550c7dc3,0x550c7dc3 -.long 0x72be5d74,0x72be5d74,0x72be5d74,0x72be5d74 -.long 0x80deb1fe,0x80deb1fe,0x80deb1fe,0x80deb1fe -.long 0x9bdc06a7,0x9bdc06a7,0x9bdc06a7,0x9bdc06a7 -.long 0xc19bf174,0xc19bf174,0xc19bf174,0xc19bf174 -.long 0xe49b69c1,0xe49b69c1,0xe49b69c1,0xe49b69c1 -.long 0xefbe4786,0xefbe4786,0xefbe4786,0xefbe4786 -.long 0x0fc19dc6,0x0fc19dc6,0x0fc19dc6,0x0fc19dc6 -.long 0x240ca1cc,0x240ca1cc,0x240ca1cc,0x240ca1cc -.long 0x2de92c6f,0x2de92c6f,0x2de92c6f,0x2de92c6f -.long 0x4a7484aa,0x4a7484aa,0x4a7484aa,0x4a7484aa -.long 0x5cb0a9dc,0x5cb0a9dc,0x5cb0a9dc,0x5cb0a9dc -.long 0x76f988da,0x76f988da,0x76f988da,0x76f988da -.long 0x983e5152,0x983e5152,0x983e5152,0x983e5152 -.long 0xa831c66d,0xa831c66d,0xa831c66d,0xa831c66d -.long 0xb00327c8,0xb00327c8,0xb00327c8,0xb00327c8 -.long 0xbf597fc7,0xbf597fc7,0xbf597fc7,0xbf597fc7 -.long 0xc6e00bf3,0xc6e00bf3,0xc6e00bf3,0xc6e00bf3 -.long 0xd5a79147,0xd5a79147,0xd5a79147,0xd5a79147 -.long 0x06ca6351,0x06ca6351,0x06ca6351,0x06ca6351 -.long 0x14292967,0x14292967,0x14292967,0x14292967 -.long 0x27b70a85,0x27b70a85,0x27b70a85,0x27b70a85 -.long 0x2e1b2138,0x2e1b2138,0x2e1b2138,0x2e1b2138 -.long 0x4d2c6dfc,0x4d2c6dfc,0x4d2c6dfc,0x4d2c6dfc -.long 0x53380d13,0x53380d13,0x53380d13,0x53380d13 -.long 0x650a7354,0x650a7354,0x650a7354,0x650a7354 -.long 0x766a0abb,0x766a0abb,0x766a0abb,0x766a0abb -.long 0x81c2c92e,0x81c2c92e,0x81c2c92e,0x81c2c92e -.long 0x92722c85,0x92722c85,0x92722c85,0x92722c85 -.long 0xa2bfe8a1,0xa2bfe8a1,0xa2bfe8a1,0xa2bfe8a1 -.long 0xa81a664b,0xa81a664b,0xa81a664b,0xa81a664b -.long 0xc24b8b70,0xc24b8b70,0xc24b8b70,0xc24b8b70 -.long 0xc76c51a3,0xc76c51a3,0xc76c51a3,0xc76c51a3 -.long 0xd192e819,0xd192e819,0xd192e819,0xd192e819 -.long 0xd6990624,0xd6990624,0xd6990624,0xd6990624 -.long 0xf40e3585,0xf40e3585,0xf40e3585,0xf40e3585 -.long 0x106aa070,0x106aa070,0x106aa070,0x106aa070 -.long 0x19a4c116,0x19a4c116,0x19a4c116,0x19a4c116 -.long 0x1e376c08,0x1e376c08,0x1e376c08,0x1e376c08 -.long 0x2748774c,0x2748774c,0x2748774c,0x2748774c -.long 0x34b0bcb5,0x34b0bcb5,0x34b0bcb5,0x34b0bcb5 -.long 0x391c0cb3,0x391c0cb3,0x391c0cb3,0x391c0cb3 -.long 0x4ed8aa4a,0x4ed8aa4a,0x4ed8aa4a,0x4ed8aa4a -.long 0x5b9cca4f,0x5b9cca4f,0x5b9cca4f,0x5b9cca4f -.long 0x682e6ff3,0x682e6ff3,0x682e6ff3,0x682e6ff3 -.long 0x748f82ee,0x748f82ee,0x748f82ee,0x748f82ee -.long 0x78a5636f,0x78a5636f,0x78a5636f,0x78a5636f -.long 0x84c87814,0x84c87814,0x84c87814,0x84c87814 -.long 0x8cc70208,0x8cc70208,0x8cc70208,0x8cc70208 -.long 0x90befffa,0x90befffa,0x90befffa,0x90befffa -.long 0xa4506ceb,0xa4506ceb,0xa4506ceb,0xa4506ceb -.long 0xbef9a3f7,0xbef9a3f7,0xbef9a3f7,0xbef9a3f7 -.long 0xc67178f2,0xc67178f2,0xc67178f2,0xc67178f2 -.long 0,0,0,0 -.long 0x00010203,0x10111213,0x10111213,0x10111213 -.long 0x00010203,0x04050607,0x10111213,0x10111213 -.long 0x00010203,0x04050607,0x08090a0b,0x10111213 -.byte 83,72,65,50,53,54,32,102,111,114,32,80,111,119,101,114,73,83,65,32,50,46,48,55,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 2 diff --git a/sys/crypto/openssl/powerpc/sha512-ppc.S b/sys/crypto/openssl/powerpc/sha512-ppc.S deleted file mode 100644 index 073caa074f2..00000000000 --- a/sys/crypto/openssl/powerpc/sha512-ppc.S +++ /dev/null @@ -1,3071 +0,0 @@ -/* Do not modify. This file is auto-generated from sha512-ppc.pl. */ -.machine "any" -.text - -.globl sha512_block_ppc -.type sha512_block_ppc,@function -.align 6 -sha512_block_ppc: - stwu 1,-256(1) - mflr 0 - slwi 5,5,7 - - stw 3,168(1) - - stw 14,184(1) - stw 15,188(1) - stw 16,192(1) - stw 17,196(1) - stw 18,200(1) - stw 19,204(1) - stw 20,208(1) - stw 21,212(1) - stw 22,216(1) - stw 23,220(1) - stw 24,224(1) - stw 25,228(1) - stw 26,232(1) - stw 27,236(1) - stw 28,240(1) - stw 29,244(1) - stw 30,248(1) - stw 31,252(1) - stw 0,260(1) - lwz 16,0(3) - lwz 17,4(3) - lwz 18,8(3) - lwz 19,12(3) - lwz 20,16(3) - lwz 21,20(3) - lwz 22,24(3) - lwz 23,28(3) - lwz 24,32(3) - lwz 25,36(3) - lwz 26,40(3) - lwz 27,44(3) - lwz 28,48(3) - lwz 29,52(3) - lwz 30,56(3) - lwz 31,60(3) - bl .LPICmeup -.LPICedup: - andi. 0,4,3 - bne .Lunaligned -.Laligned: - add 5,4,5 - stw 5,160(1) - stw 4,164(1) - bl .Lsha2_block_private - b .Ldone - - - - - - - -.align 4 -.Lunaligned: - subfic 0,4,4096 - andi. 0,0,3968 - beq .Lcross_page - .long 0x7c050040 - ble .Laligned - subfc 5,0,5 - add 0,4,0 - stw 5,156(1) - stw 0,160(1) - stw 4,164(1) - bl .Lsha2_block_private - - lwz 5,156(1) -.Lcross_page: - li 0,32 - mtctr 0 - addi 12,1,24 -.Lmemcpy: - lbz 8,0(4) - lbz 9,1(4) - lbz 10,2(4) - lbz 11,3(4) - addi 4,4,4 - stb 8,0(12) - stb 9,1(12) - stb 10,2(12) - stb 11,3(12) - addi 12,12,4 - bdnz .Lmemcpy - stw 4,152(1) - addi 0,1,152 - addi 4,1,24 - stw 5,156(1) - stw 0,160(1) - stw 4,164(1) - bl .Lsha2_block_private - lwz 4,152(1) - lwz 5,156(1) - addic. 5,5,-128 - bne .Lunaligned - -.Ldone: - lwz 0,260(1) - lwz 14,184(1) - lwz 15,188(1) - lwz 16,192(1) - lwz 17,196(1) - lwz 18,200(1) - lwz 19,204(1) - lwz 20,208(1) - lwz 21,212(1) - lwz 22,216(1) - lwz 23,220(1) - lwz 24,224(1) - lwz 25,228(1) - lwz 26,232(1) - lwz 27,236(1) - lwz 28,240(1) - lwz 29,244(1) - lwz 30,248(1) - lwz 31,252(1) - mtlr 0 - addi 1,1,256 - blr -.long 0 -.byte 0,12,4,1,0x80,18,3,0 -.long 0 -.align 4 -.Lsha2_block_private: - lwz 8,0(4) - xor 14,19,21 - lwz 6,4(4) - xor 15,18,20 - lwz 9,4(7) - xor 11,27,29 - lwz 10,0(7) - xor 12,26,28 - addc 31,31,6 - stw 6,24(1) - - srwi 0,25,14 - srwi 5,24,14 - and 11,11,25 - adde 30,30,8 - and 12,12,24 - stw 8,28(1) - srwi 6,25,18 - srwi 8,24,18 - addc 31,31,9 - insrwi 0,24,14,0 - insrwi 5,25,14,0 - xor 11,11,29 - adde 30,30,10 - xor 12,12,28 - insrwi 6,24,18,0 - insrwi 8,25,18,0 - addc 31,31,11 - srwi 9,24,41-32 - srwi 10,25,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,25,41-32,0 - insrwi 10,24,41-32,0 - xor 11,17,19 - adde 30,30,12 - xor 12,16,18 - xor 0,0,9 - xor 5,5,10 - - srwi 6,17,28 - and 14,14,11 - addc 31,31,0 - and 15,15,12 - srwi 8,16,28 - srwi 0,16,34-32 - adde 30,30,5 - srwi 5,17,34-32 - insrwi 6,16,28,0 - insrwi 8,17,28,0 - xor 14,14,19 - addc 23,23,31 - xor 15,15,18 - insrwi 0,17,34-32,0 - insrwi 5,16,34-32,0 - adde 22,22,30 - srwi 9,16,39-32 - srwi 10,17,39-32 - xor 0,0,6 - addc 31,31,14 - xor 5,5,8 - insrwi 9,17,39-32,0 - insrwi 10,16,39-32,0 - adde 30,30,15 - lwz 8,8(4) - lwz 6,12(4) - xor 0,0,9 - xor 5,5,10 - addc 31,31,0 - adde 30,30,5 - lwz 9,12(7) - xor 14,25,27 - lwz 10,8(7) - xor 15,24,26 - addc 29,29,6 - stw 6,32(1) - - srwi 0,23,14 - srwi 5,22,14 - and 14,14,23 - adde 28,28,8 - and 15,15,22 - stw 8,36(1) - srwi 6,23,18 - srwi 8,22,18 - addc 29,29,9 - insrwi 0,22,14,0 - insrwi 5,23,14,0 - xor 14,14,27 - adde 28,28,10 - xor 15,15,26 - insrwi 6,22,18,0 - insrwi 8,23,18,0 - addc 29,29,14 - srwi 9,22,41-32 - srwi 10,23,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,23,41-32,0 - insrwi 10,22,41-32,0 - xor 14,31,17 - adde 28,28,15 - xor 15,30,16 - xor 0,0,9 - xor 5,5,10 - - srwi 6,31,28 - and 11,11,14 - addc 29,29,0 - and 12,12,15 - srwi 8,30,28 - srwi 0,30,34-32 - adde 28,28,5 - srwi 5,31,34-32 - insrwi 6,30,28,0 - insrwi 8,31,28,0 - xor 11,11,17 - addc 21,21,29 - xor 12,12,16 - insrwi 0,31,34-32,0 - insrwi 5,30,34-32,0 - adde 20,20,28 - srwi 9,30,39-32 - srwi 10,31,39-32 - xor 0,0,6 - addc 29,29,11 - xor 5,5,8 - insrwi 9,31,39-32,0 - insrwi 10,30,39-32,0 - adde 28,28,12 - lwz 8,16(4) - lwz 6,20(4) - xor 0,0,9 - xor 5,5,10 - addc 29,29,0 - adde 28,28,5 - lwz 9,20(7) - xor 11,23,25 - lwz 10,16(7) - xor 12,22,24 - addc 27,27,6 - stw 6,40(1) - - srwi 0,21,14 - srwi 5,20,14 - and 11,11,21 - adde 26,26,8 - and 12,12,20 - stw 8,44(1) - srwi 6,21,18 - srwi 8,20,18 - addc 27,27,9 - insrwi 0,20,14,0 - insrwi 5,21,14,0 - xor 11,11,25 - adde 26,26,10 - xor 12,12,24 - insrwi 6,20,18,0 - insrwi 8,21,18,0 - addc 27,27,11 - srwi 9,20,41-32 - srwi 10,21,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,21,41-32,0 - insrwi 10,20,41-32,0 - xor 11,29,31 - adde 26,26,12 - xor 12,28,30 - xor 0,0,9 - xor 5,5,10 - - srwi 6,29,28 - and 14,14,11 - addc 27,27,0 - and 15,15,12 - srwi 8,28,28 - srwi 0,28,34-32 - adde 26,26,5 - srwi 5,29,34-32 - insrwi 6,28,28,0 - insrwi 8,29,28,0 - xor 14,14,31 - addc 19,19,27 - xor 15,15,30 - insrwi 0,29,34-32,0 - insrwi 5,28,34-32,0 - adde 18,18,26 - srwi 9,28,39-32 - srwi 10,29,39-32 - xor 0,0,6 - addc 27,27,14 - xor 5,5,8 - insrwi 9,29,39-32,0 - insrwi 10,28,39-32,0 - adde 26,26,15 - lwz 8,24(4) - lwz 6,28(4) - xor 0,0,9 - xor 5,5,10 - addc 27,27,0 - adde 26,26,5 - lwz 9,28(7) - xor 14,21,23 - lwz 10,24(7) - xor 15,20,22 - addc 25,25,6 - stw 6,48(1) - - srwi 0,19,14 - srwi 5,18,14 - and 14,14,19 - adde 24,24,8 - and 15,15,18 - stw 8,52(1) - srwi 6,19,18 - srwi 8,18,18 - addc 25,25,9 - insrwi 0,18,14,0 - insrwi 5,19,14,0 - xor 14,14,23 - adde 24,24,10 - xor 15,15,22 - insrwi 6,18,18,0 - insrwi 8,19,18,0 - addc 25,25,14 - srwi 9,18,41-32 - srwi 10,19,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,19,41-32,0 - insrwi 10,18,41-32,0 - xor 14,27,29 - adde 24,24,15 - xor 15,26,28 - xor 0,0,9 - xor 5,5,10 - - srwi 6,27,28 - and 11,11,14 - addc 25,25,0 - and 12,12,15 - srwi 8,26,28 - srwi 0,26,34-32 - adde 24,24,5 - srwi 5,27,34-32 - insrwi 6,26,28,0 - insrwi 8,27,28,0 - xor 11,11,29 - addc 17,17,25 - xor 12,12,28 - insrwi 0,27,34-32,0 - insrwi 5,26,34-32,0 - adde 16,16,24 - srwi 9,26,39-32 - srwi 10,27,39-32 - xor 0,0,6 - addc 25,25,11 - xor 5,5,8 - insrwi 9,27,39-32,0 - insrwi 10,26,39-32,0 - adde 24,24,12 - lwz 8,32(4) - lwz 6,36(4) - xor 0,0,9 - xor 5,5,10 - addc 25,25,0 - adde 24,24,5 - lwz 9,36(7) - xor 11,19,21 - lwz 10,32(7) - xor 12,18,20 - addc 23,23,6 - stw 6,56(1) - - srwi 0,17,14 - srwi 5,16,14 - and 11,11,17 - adde 22,22,8 - and 12,12,16 - stw 8,60(1) - srwi 6,17,18 - srwi 8,16,18 - addc 23,23,9 - insrwi 0,16,14,0 - insrwi 5,17,14,0 - xor 11,11,21 - adde 22,22,10 - xor 12,12,20 - insrwi 6,16,18,0 - insrwi 8,17,18,0 - addc 23,23,11 - srwi 9,16,41-32 - srwi 10,17,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,17,41-32,0 - insrwi 10,16,41-32,0 - xor 11,25,27 - adde 22,22,12 - xor 12,24,26 - xor 0,0,9 - xor 5,5,10 - - srwi 6,25,28 - and 14,14,11 - addc 23,23,0 - and 15,15,12 - srwi 8,24,28 - srwi 0,24,34-32 - adde 22,22,5 - srwi 5,25,34-32 - insrwi 6,24,28,0 - insrwi 8,25,28,0 - xor 14,14,27 - addc 31,31,23 - xor 15,15,26 - insrwi 0,25,34-32,0 - insrwi 5,24,34-32,0 - adde 30,30,22 - srwi 9,24,39-32 - srwi 10,25,39-32 - xor 0,0,6 - addc 23,23,14 - xor 5,5,8 - insrwi 9,25,39-32,0 - insrwi 10,24,39-32,0 - adde 22,22,15 - lwz 8,40(4) - lwz 6,44(4) - xor 0,0,9 - xor 5,5,10 - addc 23,23,0 - adde 22,22,5 - lwz 9,44(7) - xor 14,17,19 - lwz 10,40(7) - xor 15,16,18 - addc 21,21,6 - stw 6,64(1) - - srwi 0,31,14 - srwi 5,30,14 - and 14,14,31 - adde 20,20,8 - and 15,15,30 - stw 8,68(1) - srwi 6,31,18 - srwi 8,30,18 - addc 21,21,9 - insrwi 0,30,14,0 - insrwi 5,31,14,0 - xor 14,14,19 - adde 20,20,10 - xor 15,15,18 - insrwi 6,30,18,0 - insrwi 8,31,18,0 - addc 21,21,14 - srwi 9,30,41-32 - srwi 10,31,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,31,41-32,0 - insrwi 10,30,41-32,0 - xor 14,23,25 - adde 20,20,15 - xor 15,22,24 - xor 0,0,9 - xor 5,5,10 - - srwi 6,23,28 - and 11,11,14 - addc 21,21,0 - and 12,12,15 - srwi 8,22,28 - srwi 0,22,34-32 - adde 20,20,5 - srwi 5,23,34-32 - insrwi 6,22,28,0 - insrwi 8,23,28,0 - xor 11,11,25 - addc 29,29,21 - xor 12,12,24 - insrwi 0,23,34-32,0 - insrwi 5,22,34-32,0 - adde 28,28,20 - srwi 9,22,39-32 - srwi 10,23,39-32 - xor 0,0,6 - addc 21,21,11 - xor 5,5,8 - insrwi 9,23,39-32,0 - insrwi 10,22,39-32,0 - adde 20,20,12 - lwz 8,48(4) - lwz 6,52(4) - xor 0,0,9 - xor 5,5,10 - addc 21,21,0 - adde 20,20,5 - lwz 9,52(7) - xor 11,31,17 - lwz 10,48(7) - xor 12,30,16 - addc 19,19,6 - stw 6,72(1) - - srwi 0,29,14 - srwi 5,28,14 - and 11,11,29 - adde 18,18,8 - and 12,12,28 - stw 8,76(1) - srwi 6,29,18 - srwi 8,28,18 - addc 19,19,9 - insrwi 0,28,14,0 - insrwi 5,29,14,0 - xor 11,11,17 - adde 18,18,10 - xor 12,12,16 - insrwi 6,28,18,0 - insrwi 8,29,18,0 - addc 19,19,11 - srwi 9,28,41-32 - srwi 10,29,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,29,41-32,0 - insrwi 10,28,41-32,0 - xor 11,21,23 - adde 18,18,12 - xor 12,20,22 - xor 0,0,9 - xor 5,5,10 - - srwi 6,21,28 - and 14,14,11 - addc 19,19,0 - and 15,15,12 - srwi 8,20,28 - srwi 0,20,34-32 - adde 18,18,5 - srwi 5,21,34-32 - insrwi 6,20,28,0 - insrwi 8,21,28,0 - xor 14,14,23 - addc 27,27,19 - xor 15,15,22 - insrwi 0,21,34-32,0 - insrwi 5,20,34-32,0 - adde 26,26,18 - srwi 9,20,39-32 - srwi 10,21,39-32 - xor 0,0,6 - addc 19,19,14 - xor 5,5,8 - insrwi 9,21,39-32,0 - insrwi 10,20,39-32,0 - adde 18,18,15 - lwz 8,56(4) - lwz 6,60(4) - xor 0,0,9 - xor 5,5,10 - addc 19,19,0 - adde 18,18,5 - lwz 9,60(7) - xor 14,29,31 - lwz 10,56(7) - xor 15,28,30 - addc 17,17,6 - stw 6,80(1) - - srwi 0,27,14 - srwi 5,26,14 - and 14,14,27 - adde 16,16,8 - and 15,15,26 - stw 8,84(1) - srwi 6,27,18 - srwi 8,26,18 - addc 17,17,9 - insrwi 0,26,14,0 - insrwi 5,27,14,0 - xor 14,14,31 - adde 16,16,10 - xor 15,15,30 - insrwi 6,26,18,0 - insrwi 8,27,18,0 - addc 17,17,14 - srwi 9,26,41-32 - srwi 10,27,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,27,41-32,0 - insrwi 10,26,41-32,0 - xor 14,19,21 - adde 16,16,15 - xor 15,18,20 - xor 0,0,9 - xor 5,5,10 - - srwi 6,19,28 - and 11,11,14 - addc 17,17,0 - and 12,12,15 - srwi 8,18,28 - srwi 0,18,34-32 - adde 16,16,5 - srwi 5,19,34-32 - insrwi 6,18,28,0 - insrwi 8,19,28,0 - xor 11,11,21 - addc 25,25,17 - xor 12,12,20 - insrwi 0,19,34-32,0 - insrwi 5,18,34-32,0 - adde 24,24,16 - srwi 9,18,39-32 - srwi 10,19,39-32 - xor 0,0,6 - addc 17,17,11 - xor 5,5,8 - insrwi 9,19,39-32,0 - insrwi 10,18,39-32,0 - adde 16,16,12 - lwz 8,64(4) - lwz 6,68(4) - xor 0,0,9 - xor 5,5,10 - addc 17,17,0 - adde 16,16,5 - lwz 9,68(7) - xor 11,27,29 - lwz 10,64(7) - xor 12,26,28 - addc 31,31,6 - stw 6,88(1) - - srwi 0,25,14 - srwi 5,24,14 - and 11,11,25 - adde 30,30,8 - and 12,12,24 - stw 8,92(1) - srwi 6,25,18 - srwi 8,24,18 - addc 31,31,9 - insrwi 0,24,14,0 - insrwi 5,25,14,0 - xor 11,11,29 - adde 30,30,10 - xor 12,12,28 - insrwi 6,24,18,0 - insrwi 8,25,18,0 - addc 31,31,11 - srwi 9,24,41-32 - srwi 10,25,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,25,41-32,0 - insrwi 10,24,41-32,0 - xor 11,17,19 - adde 30,30,12 - xor 12,16,18 - xor 0,0,9 - xor 5,5,10 - - srwi 6,17,28 - and 14,14,11 - addc 31,31,0 - and 15,15,12 - srwi 8,16,28 - srwi 0,16,34-32 - adde 30,30,5 - srwi 5,17,34-32 - insrwi 6,16,28,0 - insrwi 8,17,28,0 - xor 14,14,19 - addc 23,23,31 - xor 15,15,18 - insrwi 0,17,34-32,0 - insrwi 5,16,34-32,0 - adde 22,22,30 - srwi 9,16,39-32 - srwi 10,17,39-32 - xor 0,0,6 - addc 31,31,14 - xor 5,5,8 - insrwi 9,17,39-32,0 - insrwi 10,16,39-32,0 - adde 30,30,15 - lwz 8,72(4) - lwz 6,76(4) - xor 0,0,9 - xor 5,5,10 - addc 31,31,0 - adde 30,30,5 - lwz 9,76(7) - xor 14,25,27 - lwz 10,72(7) - xor 15,24,26 - addc 29,29,6 - stw 6,96(1) - - srwi 0,23,14 - srwi 5,22,14 - and 14,14,23 - adde 28,28,8 - and 15,15,22 - stw 8,100(1) - srwi 6,23,18 - srwi 8,22,18 - addc 29,29,9 - insrwi 0,22,14,0 - insrwi 5,23,14,0 - xor 14,14,27 - adde 28,28,10 - xor 15,15,26 - insrwi 6,22,18,0 - insrwi 8,23,18,0 - addc 29,29,14 - srwi 9,22,41-32 - srwi 10,23,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,23,41-32,0 - insrwi 10,22,41-32,0 - xor 14,31,17 - adde 28,28,15 - xor 15,30,16 - xor 0,0,9 - xor 5,5,10 - - srwi 6,31,28 - and 11,11,14 - addc 29,29,0 - and 12,12,15 - srwi 8,30,28 - srwi 0,30,34-32 - adde 28,28,5 - srwi 5,31,34-32 - insrwi 6,30,28,0 - insrwi 8,31,28,0 - xor 11,11,17 - addc 21,21,29 - xor 12,12,16 - insrwi 0,31,34-32,0 - insrwi 5,30,34-32,0 - adde 20,20,28 - srwi 9,30,39-32 - srwi 10,31,39-32 - xor 0,0,6 - addc 29,29,11 - xor 5,5,8 - insrwi 9,31,39-32,0 - insrwi 10,30,39-32,0 - adde 28,28,12 - lwz 8,80(4) - lwz 6,84(4) - xor 0,0,9 - xor 5,5,10 - addc 29,29,0 - adde 28,28,5 - lwz 9,84(7) - xor 11,23,25 - lwz 10,80(7) - xor 12,22,24 - addc 27,27,6 - stw 6,104(1) - - srwi 0,21,14 - srwi 5,20,14 - and 11,11,21 - adde 26,26,8 - and 12,12,20 - stw 8,108(1) - srwi 6,21,18 - srwi 8,20,18 - addc 27,27,9 - insrwi 0,20,14,0 - insrwi 5,21,14,0 - xor 11,11,25 - adde 26,26,10 - xor 12,12,24 - insrwi 6,20,18,0 - insrwi 8,21,18,0 - addc 27,27,11 - srwi 9,20,41-32 - srwi 10,21,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,21,41-32,0 - insrwi 10,20,41-32,0 - xor 11,29,31 - adde 26,26,12 - xor 12,28,30 - xor 0,0,9 - xor 5,5,10 - - srwi 6,29,28 - and 14,14,11 - addc 27,27,0 - and 15,15,12 - srwi 8,28,28 - srwi 0,28,34-32 - adde 26,26,5 - srwi 5,29,34-32 - insrwi 6,28,28,0 - insrwi 8,29,28,0 - xor 14,14,31 - addc 19,19,27 - xor 15,15,30 - insrwi 0,29,34-32,0 - insrwi 5,28,34-32,0 - adde 18,18,26 - srwi 9,28,39-32 - srwi 10,29,39-32 - xor 0,0,6 - addc 27,27,14 - xor 5,5,8 - insrwi 9,29,39-32,0 - insrwi 10,28,39-32,0 - adde 26,26,15 - lwz 8,88(4) - lwz 6,92(4) - xor 0,0,9 - xor 5,5,10 - addc 27,27,0 - adde 26,26,5 - lwz 9,92(7) - xor 14,21,23 - lwz 10,88(7) - xor 15,20,22 - addc 25,25,6 - stw 6,112(1) - - srwi 0,19,14 - srwi 5,18,14 - and 14,14,19 - adde 24,24,8 - and 15,15,18 - stw 8,116(1) - srwi 6,19,18 - srwi 8,18,18 - addc 25,25,9 - insrwi 0,18,14,0 - insrwi 5,19,14,0 - xor 14,14,23 - adde 24,24,10 - xor 15,15,22 - insrwi 6,18,18,0 - insrwi 8,19,18,0 - addc 25,25,14 - srwi 9,18,41-32 - srwi 10,19,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,19,41-32,0 - insrwi 10,18,41-32,0 - xor 14,27,29 - adde 24,24,15 - xor 15,26,28 - xor 0,0,9 - xor 5,5,10 - - srwi 6,27,28 - and 11,11,14 - addc 25,25,0 - and 12,12,15 - srwi 8,26,28 - srwi 0,26,34-32 - adde 24,24,5 - srwi 5,27,34-32 - insrwi 6,26,28,0 - insrwi 8,27,28,0 - xor 11,11,29 - addc 17,17,25 - xor 12,12,28 - insrwi 0,27,34-32,0 - insrwi 5,26,34-32,0 - adde 16,16,24 - srwi 9,26,39-32 - srwi 10,27,39-32 - xor 0,0,6 - addc 25,25,11 - xor 5,5,8 - insrwi 9,27,39-32,0 - insrwi 10,26,39-32,0 - adde 24,24,12 - lwz 8,96(4) - lwz 6,100(4) - xor 0,0,9 - xor 5,5,10 - addc 25,25,0 - adde 24,24,5 - lwz 9,100(7) - xor 11,19,21 - lwz 10,96(7) - xor 12,18,20 - addc 23,23,6 - stw 6,120(1) - - srwi 0,17,14 - srwi 5,16,14 - and 11,11,17 - adde 22,22,8 - and 12,12,16 - stw 8,124(1) - srwi 6,17,18 - srwi 8,16,18 - addc 23,23,9 - insrwi 0,16,14,0 - insrwi 5,17,14,0 - xor 11,11,21 - adde 22,22,10 - xor 12,12,20 - insrwi 6,16,18,0 - insrwi 8,17,18,0 - addc 23,23,11 - srwi 9,16,41-32 - srwi 10,17,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,17,41-32,0 - insrwi 10,16,41-32,0 - xor 11,25,27 - adde 22,22,12 - xor 12,24,26 - xor 0,0,9 - xor 5,5,10 - - srwi 6,25,28 - and 14,14,11 - addc 23,23,0 - and 15,15,12 - srwi 8,24,28 - srwi 0,24,34-32 - adde 22,22,5 - srwi 5,25,34-32 - insrwi 6,24,28,0 - insrwi 8,25,28,0 - xor 14,14,27 - addc 31,31,23 - xor 15,15,26 - insrwi 0,25,34-32,0 - insrwi 5,24,34-32,0 - adde 30,30,22 - srwi 9,24,39-32 - srwi 10,25,39-32 - xor 0,0,6 - addc 23,23,14 - xor 5,5,8 - insrwi 9,25,39-32,0 - insrwi 10,24,39-32,0 - adde 22,22,15 - lwz 8,104(4) - lwz 6,108(4) - xor 0,0,9 - xor 5,5,10 - addc 23,23,0 - adde 22,22,5 - lwz 9,108(7) - xor 14,17,19 - lwz 10,104(7) - xor 15,16,18 - addc 21,21,6 - stw 6,128(1) - - srwi 0,31,14 - srwi 5,30,14 - and 14,14,31 - adde 20,20,8 - and 15,15,30 - stw 8,132(1) - srwi 6,31,18 - srwi 8,30,18 - addc 21,21,9 - insrwi 0,30,14,0 - insrwi 5,31,14,0 - xor 14,14,19 - adde 20,20,10 - xor 15,15,18 - insrwi 6,30,18,0 - insrwi 8,31,18,0 - addc 21,21,14 - srwi 9,30,41-32 - srwi 10,31,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,31,41-32,0 - insrwi 10,30,41-32,0 - xor 14,23,25 - adde 20,20,15 - xor 15,22,24 - xor 0,0,9 - xor 5,5,10 - - srwi 6,23,28 - and 11,11,14 - addc 21,21,0 - and 12,12,15 - srwi 8,22,28 - srwi 0,22,34-32 - adde 20,20,5 - srwi 5,23,34-32 - insrwi 6,22,28,0 - insrwi 8,23,28,0 - xor 11,11,25 - addc 29,29,21 - xor 12,12,24 - insrwi 0,23,34-32,0 - insrwi 5,22,34-32,0 - adde 28,28,20 - srwi 9,22,39-32 - srwi 10,23,39-32 - xor 0,0,6 - addc 21,21,11 - xor 5,5,8 - insrwi 9,23,39-32,0 - insrwi 10,22,39-32,0 - adde 20,20,12 - lwz 8,112(4) - lwz 6,116(4) - xor 0,0,9 - xor 5,5,10 - addc 21,21,0 - adde 20,20,5 - lwz 9,116(7) - xor 11,31,17 - lwz 10,112(7) - xor 12,30,16 - addc 19,19,6 - stw 6,136(1) - - srwi 0,29,14 - srwi 5,28,14 - and 11,11,29 - adde 18,18,8 - and 12,12,28 - stw 8,140(1) - srwi 6,29,18 - srwi 8,28,18 - addc 19,19,9 - insrwi 0,28,14,0 - insrwi 5,29,14,0 - xor 11,11,17 - adde 18,18,10 - xor 12,12,16 - insrwi 6,28,18,0 - insrwi 8,29,18,0 - addc 19,19,11 - srwi 9,28,41-32 - srwi 10,29,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,29,41-32,0 - insrwi 10,28,41-32,0 - xor 11,21,23 - adde 18,18,12 - xor 12,20,22 - xor 0,0,9 - xor 5,5,10 - - srwi 6,21,28 - and 14,14,11 - addc 19,19,0 - and 15,15,12 - srwi 8,20,28 - srwi 0,20,34-32 - adde 18,18,5 - srwi 5,21,34-32 - insrwi 6,20,28,0 - insrwi 8,21,28,0 - xor 14,14,23 - addc 27,27,19 - xor 15,15,22 - insrwi 0,21,34-32,0 - insrwi 5,20,34-32,0 - adde 26,26,18 - srwi 9,20,39-32 - srwi 10,21,39-32 - xor 0,0,6 - addc 19,19,14 - xor 5,5,8 - insrwi 9,21,39-32,0 - insrwi 10,20,39-32,0 - adde 18,18,15 - lwz 8,120(4) - lwz 6,124(4) - xor 0,0,9 - xor 5,5,10 - addc 19,19,0 - adde 18,18,5 - lwz 9,124(7) - xor 14,29,31 - lwz 10,120(7) - xor 15,28,30 - addc 17,17,6 - stw 6,144(1) - - srwi 0,27,14 - srwi 5,26,14 - and 14,14,27 - adde 16,16,8 - and 15,15,26 - stw 8,148(1) - srwi 6,27,18 - srwi 8,26,18 - addc 17,17,9 - insrwi 0,26,14,0 - insrwi 5,27,14,0 - xor 14,14,31 - adde 16,16,10 - xor 15,15,30 - insrwi 6,26,18,0 - insrwi 8,27,18,0 - addc 17,17,14 - srwi 9,26,41-32 - srwi 10,27,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,27,41-32,0 - insrwi 10,26,41-32,0 - xor 14,19,21 - adde 16,16,15 - xor 15,18,20 - xor 0,0,9 - xor 5,5,10 - - srwi 6,19,28 - and 11,11,14 - addc 17,17,0 - and 12,12,15 - srwi 8,18,28 - srwi 0,18,34-32 - adde 16,16,5 - srwi 5,19,34-32 - insrwi 6,18,28,0 - insrwi 8,19,28,0 - xor 11,11,21 - addc 25,25,17 - xor 12,12,20 - insrwi 0,19,34-32,0 - insrwi 5,18,34-32,0 - adde 24,24,16 - srwi 9,18,39-32 - srwi 10,19,39-32 - xor 0,0,6 - addc 17,17,11 - xor 5,5,8 - insrwi 9,19,39-32,0 - insrwi 10,18,39-32,0 - adde 16,16,12 - lwz 6,32(1) - lwz 8,36(1) - xor 0,0,9 - xor 5,5,10 - addc 17,17,0 - adde 16,16,5 - lwz 3,24(1) - lwz 4,28(1) - li 11,4 - mtctr 11 -.align 4 -.Lrounds: - addi 7,7,128 - srwi 0,6,1 - srwi 5,8,1 - srwi 9,6,8 - srwi 10,8,8 - insrwi 0,8,1,0 - insrwi 5,6,1,0 - srwi 11,6,7 - insrwi 9,8,8,0 - insrwi 10,6,8,0 - insrwi 11,8,7,0 - xor 0,0,9 - lwz 9,136(1) - srwi 12,8,7 - xor 5,5,10 - lwz 10,140(1) - xor 11,11,0 - srwi 0,9,19 - xor 12,12,5 - srwi 5,10,19 - addc 3,3,11 - srwi 11,10,61-32 - insrwi 0,10,19,0 - insrwi 5,9,19,0 - adde 4,4,12 - srwi 12,9,61-32 - - insrwi 11,9,61-32,0 - srwi 9,9,6 - insrwi 12,10,61-32,0 - insrwi 9,10,6,0 - xor 0,0,11 - lwz 11,96(1) - srwi 10,10,6 - xor 5,5,12 - lwz 12,100(1) - xor 0,0,9 - addc 3,3,11 - xor 5,5,10 - adde 4,4,12 - addc 3,3,0 - adde 4,4,5 - lwz 9,4(7) - xor 11,27,29 - lwz 10,0(7) - xor 12,26,28 - addc 31,31,3 - stw 3,24(1) - - srwi 0,25,14 - srwi 5,24,14 - and 11,11,25 - adde 30,30,4 - and 12,12,24 - stw 4,28(1) - srwi 3,25,18 - srwi 4,24,18 - addc 31,31,9 - insrwi 0,24,14,0 - insrwi 5,25,14,0 - xor 11,11,29 - adde 30,30,10 - xor 12,12,28 - insrwi 3,24,18,0 - insrwi 4,25,18,0 - addc 31,31,11 - srwi 9,24,41-32 - srwi 10,25,41-32 - xor 0,0,3 - xor 5,5,4 - insrwi 9,25,41-32,0 - insrwi 10,24,41-32,0 - xor 11,17,19 - adde 30,30,12 - xor 12,16,18 - xor 0,0,9 - xor 5,5,10 - - srwi 3,17,28 - and 14,14,11 - addc 31,31,0 - and 15,15,12 - srwi 4,16,28 - srwi 0,16,34-32 - adde 30,30,5 - srwi 5,17,34-32 - insrwi 3,16,28,0 - insrwi 4,17,28,0 - xor 14,14,19 - addc 23,23,31 - xor 15,15,18 - insrwi 0,17,34-32,0 - insrwi 5,16,34-32,0 - adde 22,22,30 - srwi 9,16,39-32 - srwi 10,17,39-32 - xor 0,0,3 - addc 31,31,14 - xor 5,5,4 - insrwi 9,17,39-32,0 - insrwi 10,16,39-32,0 - adde 30,30,15 - lwz 3,40(1) - lwz 4,44(1) - xor 0,0,9 - xor 5,5,10 - addc 31,31,0 - adde 30,30,5 - srwi 0,3,1 - srwi 5,4,1 - srwi 9,3,8 - srwi 10,4,8 - insrwi 0,4,1,0 - insrwi 5,3,1,0 - srwi 14,3,7 - insrwi 9,4,8,0 - insrwi 10,3,8,0 - insrwi 14,4,7,0 - xor 0,0,9 - lwz 9,144(1) - srwi 15,4,7 - xor 5,5,10 - lwz 10,148(1) - xor 14,14,0 - srwi 0,9,19 - xor 15,15,5 - srwi 5,10,19 - addc 6,6,14 - srwi 14,10,61-32 - insrwi 0,10,19,0 - insrwi 5,9,19,0 - adde 8,8,15 - srwi 15,9,61-32 - - insrwi 14,9,61-32,0 - srwi 9,9,6 - insrwi 15,10,61-32,0 - insrwi 9,10,6,0 - xor 0,0,14 - lwz 14,104(1) - srwi 10,10,6 - xor 5,5,15 - lwz 15,108(1) - xor 0,0,9 - addc 6,6,14 - xor 5,5,10 - adde 8,8,15 - addc 6,6,0 - adde 8,8,5 - lwz 9,12(7) - xor 14,25,27 - lwz 10,8(7) - xor 15,24,26 - addc 29,29,6 - stw 6,32(1) - - srwi 0,23,14 - srwi 5,22,14 - and 14,14,23 - adde 28,28,8 - and 15,15,22 - stw 8,36(1) - srwi 6,23,18 - srwi 8,22,18 - addc 29,29,9 - insrwi 0,22,14,0 - insrwi 5,23,14,0 - xor 14,14,27 - adde 28,28,10 - xor 15,15,26 - insrwi 6,22,18,0 - insrwi 8,23,18,0 - addc 29,29,14 - srwi 9,22,41-32 - srwi 10,23,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,23,41-32,0 - insrwi 10,22,41-32,0 - xor 14,31,17 - adde 28,28,15 - xor 15,30,16 - xor 0,0,9 - xor 5,5,10 - - srwi 6,31,28 - and 11,11,14 - addc 29,29,0 - and 12,12,15 - srwi 8,30,28 - srwi 0,30,34-32 - adde 28,28,5 - srwi 5,31,34-32 - insrwi 6,30,28,0 - insrwi 8,31,28,0 - xor 11,11,17 - addc 21,21,29 - xor 12,12,16 - insrwi 0,31,34-32,0 - insrwi 5,30,34-32,0 - adde 20,20,28 - srwi 9,30,39-32 - srwi 10,31,39-32 - xor 0,0,6 - addc 29,29,11 - xor 5,5,8 - insrwi 9,31,39-32,0 - insrwi 10,30,39-32,0 - adde 28,28,12 - lwz 6,48(1) - lwz 8,52(1) - xor 0,0,9 - xor 5,5,10 - addc 29,29,0 - adde 28,28,5 - srwi 0,6,1 - srwi 5,8,1 - srwi 9,6,8 - srwi 10,8,8 - insrwi 0,8,1,0 - insrwi 5,6,1,0 - srwi 11,6,7 - insrwi 9,8,8,0 - insrwi 10,6,8,0 - insrwi 11,8,7,0 - xor 0,0,9 - lwz 9,24(1) - srwi 12,8,7 - xor 5,5,10 - lwz 10,28(1) - xor 11,11,0 - srwi 0,9,19 - xor 12,12,5 - srwi 5,10,19 - addc 3,3,11 - srwi 11,10,61-32 - insrwi 0,10,19,0 - insrwi 5,9,19,0 - adde 4,4,12 - srwi 12,9,61-32 - - insrwi 11,9,61-32,0 - srwi 9,9,6 - insrwi 12,10,61-32,0 - insrwi 9,10,6,0 - xor 0,0,11 - lwz 11,112(1) - srwi 10,10,6 - xor 5,5,12 - lwz 12,116(1) - xor 0,0,9 - addc 3,3,11 - xor 5,5,10 - adde 4,4,12 - addc 3,3,0 - adde 4,4,5 - lwz 9,20(7) - xor 11,23,25 - lwz 10,16(7) - xor 12,22,24 - addc 27,27,3 - stw 3,40(1) - - srwi 0,21,14 - srwi 5,20,14 - and 11,11,21 - adde 26,26,4 - and 12,12,20 - stw 4,44(1) - srwi 3,21,18 - srwi 4,20,18 - addc 27,27,9 - insrwi 0,20,14,0 - insrwi 5,21,14,0 - xor 11,11,25 - adde 26,26,10 - xor 12,12,24 - insrwi 3,20,18,0 - insrwi 4,21,18,0 - addc 27,27,11 - srwi 9,20,41-32 - srwi 10,21,41-32 - xor 0,0,3 - xor 5,5,4 - insrwi 9,21,41-32,0 - insrwi 10,20,41-32,0 - xor 11,29,31 - adde 26,26,12 - xor 12,28,30 - xor 0,0,9 - xor 5,5,10 - - srwi 3,29,28 - and 14,14,11 - addc 27,27,0 - and 15,15,12 - srwi 4,28,28 - srwi 0,28,34-32 - adde 26,26,5 - srwi 5,29,34-32 - insrwi 3,28,28,0 - insrwi 4,29,28,0 - xor 14,14,31 - addc 19,19,27 - xor 15,15,30 - insrwi 0,29,34-32,0 - insrwi 5,28,34-32,0 - adde 18,18,26 - srwi 9,28,39-32 - srwi 10,29,39-32 - xor 0,0,3 - addc 27,27,14 - xor 5,5,4 - insrwi 9,29,39-32,0 - insrwi 10,28,39-32,0 - adde 26,26,15 - lwz 3,56(1) - lwz 4,60(1) - xor 0,0,9 - xor 5,5,10 - addc 27,27,0 - adde 26,26,5 - srwi 0,3,1 - srwi 5,4,1 - srwi 9,3,8 - srwi 10,4,8 - insrwi 0,4,1,0 - insrwi 5,3,1,0 - srwi 14,3,7 - insrwi 9,4,8,0 - insrwi 10,3,8,0 - insrwi 14,4,7,0 - xor 0,0,9 - lwz 9,32(1) - srwi 15,4,7 - xor 5,5,10 - lwz 10,36(1) - xor 14,14,0 - srwi 0,9,19 - xor 15,15,5 - srwi 5,10,19 - addc 6,6,14 - srwi 14,10,61-32 - insrwi 0,10,19,0 - insrwi 5,9,19,0 - adde 8,8,15 - srwi 15,9,61-32 - - insrwi 14,9,61-32,0 - srwi 9,9,6 - insrwi 15,10,61-32,0 - insrwi 9,10,6,0 - xor 0,0,14 - lwz 14,120(1) - srwi 10,10,6 - xor 5,5,15 - lwz 15,124(1) - xor 0,0,9 - addc 6,6,14 - xor 5,5,10 - adde 8,8,15 - addc 6,6,0 - adde 8,8,5 - lwz 9,28(7) - xor 14,21,23 - lwz 10,24(7) - xor 15,20,22 - addc 25,25,6 - stw 6,48(1) - - srwi 0,19,14 - srwi 5,18,14 - and 14,14,19 - adde 24,24,8 - and 15,15,18 - stw 8,52(1) - srwi 6,19,18 - srwi 8,18,18 - addc 25,25,9 - insrwi 0,18,14,0 - insrwi 5,19,14,0 - xor 14,14,23 - adde 24,24,10 - xor 15,15,22 - insrwi 6,18,18,0 - insrwi 8,19,18,0 - addc 25,25,14 - srwi 9,18,41-32 - srwi 10,19,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,19,41-32,0 - insrwi 10,18,41-32,0 - xor 14,27,29 - adde 24,24,15 - xor 15,26,28 - xor 0,0,9 - xor 5,5,10 - - srwi 6,27,28 - and 11,11,14 - addc 25,25,0 - and 12,12,15 - srwi 8,26,28 - srwi 0,26,34-32 - adde 24,24,5 - srwi 5,27,34-32 - insrwi 6,26,28,0 - insrwi 8,27,28,0 - xor 11,11,29 - addc 17,17,25 - xor 12,12,28 - insrwi 0,27,34-32,0 - insrwi 5,26,34-32,0 - adde 16,16,24 - srwi 9,26,39-32 - srwi 10,27,39-32 - xor 0,0,6 - addc 25,25,11 - xor 5,5,8 - insrwi 9,27,39-32,0 - insrwi 10,26,39-32,0 - adde 24,24,12 - lwz 6,64(1) - lwz 8,68(1) - xor 0,0,9 - xor 5,5,10 - addc 25,25,0 - adde 24,24,5 - srwi 0,6,1 - srwi 5,8,1 - srwi 9,6,8 - srwi 10,8,8 - insrwi 0,8,1,0 - insrwi 5,6,1,0 - srwi 11,6,7 - insrwi 9,8,8,0 - insrwi 10,6,8,0 - insrwi 11,8,7,0 - xor 0,0,9 - lwz 9,40(1) - srwi 12,8,7 - xor 5,5,10 - lwz 10,44(1) - xor 11,11,0 - srwi 0,9,19 - xor 12,12,5 - srwi 5,10,19 - addc 3,3,11 - srwi 11,10,61-32 - insrwi 0,10,19,0 - insrwi 5,9,19,0 - adde 4,4,12 - srwi 12,9,61-32 - - insrwi 11,9,61-32,0 - srwi 9,9,6 - insrwi 12,10,61-32,0 - insrwi 9,10,6,0 - xor 0,0,11 - lwz 11,128(1) - srwi 10,10,6 - xor 5,5,12 - lwz 12,132(1) - xor 0,0,9 - addc 3,3,11 - xor 5,5,10 - adde 4,4,12 - addc 3,3,0 - adde 4,4,5 - lwz 9,36(7) - xor 11,19,21 - lwz 10,32(7) - xor 12,18,20 - addc 23,23,3 - stw 3,56(1) - - srwi 0,17,14 - srwi 5,16,14 - and 11,11,17 - adde 22,22,4 - and 12,12,16 - stw 4,60(1) - srwi 3,17,18 - srwi 4,16,18 - addc 23,23,9 - insrwi 0,16,14,0 - insrwi 5,17,14,0 - xor 11,11,21 - adde 22,22,10 - xor 12,12,20 - insrwi 3,16,18,0 - insrwi 4,17,18,0 - addc 23,23,11 - srwi 9,16,41-32 - srwi 10,17,41-32 - xor 0,0,3 - xor 5,5,4 - insrwi 9,17,41-32,0 - insrwi 10,16,41-32,0 - xor 11,25,27 - adde 22,22,12 - xor 12,24,26 - xor 0,0,9 - xor 5,5,10 - - srwi 3,25,28 - and 14,14,11 - addc 23,23,0 - and 15,15,12 - srwi 4,24,28 - srwi 0,24,34-32 - adde 22,22,5 - srwi 5,25,34-32 - insrwi 3,24,28,0 - insrwi 4,25,28,0 - xor 14,14,27 - addc 31,31,23 - xor 15,15,26 - insrwi 0,25,34-32,0 - insrwi 5,24,34-32,0 - adde 30,30,22 - srwi 9,24,39-32 - srwi 10,25,39-32 - xor 0,0,3 - addc 23,23,14 - xor 5,5,4 - insrwi 9,25,39-32,0 - insrwi 10,24,39-32,0 - adde 22,22,15 - lwz 3,72(1) - lwz 4,76(1) - xor 0,0,9 - xor 5,5,10 - addc 23,23,0 - adde 22,22,5 - srwi 0,3,1 - srwi 5,4,1 - srwi 9,3,8 - srwi 10,4,8 - insrwi 0,4,1,0 - insrwi 5,3,1,0 - srwi 14,3,7 - insrwi 9,4,8,0 - insrwi 10,3,8,0 - insrwi 14,4,7,0 - xor 0,0,9 - lwz 9,48(1) - srwi 15,4,7 - xor 5,5,10 - lwz 10,52(1) - xor 14,14,0 - srwi 0,9,19 - xor 15,15,5 - srwi 5,10,19 - addc 6,6,14 - srwi 14,10,61-32 - insrwi 0,10,19,0 - insrwi 5,9,19,0 - adde 8,8,15 - srwi 15,9,61-32 - - insrwi 14,9,61-32,0 - srwi 9,9,6 - insrwi 15,10,61-32,0 - insrwi 9,10,6,0 - xor 0,0,14 - lwz 14,136(1) - srwi 10,10,6 - xor 5,5,15 - lwz 15,140(1) - xor 0,0,9 - addc 6,6,14 - xor 5,5,10 - adde 8,8,15 - addc 6,6,0 - adde 8,8,5 - lwz 9,44(7) - xor 14,17,19 - lwz 10,40(7) - xor 15,16,18 - addc 21,21,6 - stw 6,64(1) - - srwi 0,31,14 - srwi 5,30,14 - and 14,14,31 - adde 20,20,8 - and 15,15,30 - stw 8,68(1) - srwi 6,31,18 - srwi 8,30,18 - addc 21,21,9 - insrwi 0,30,14,0 - insrwi 5,31,14,0 - xor 14,14,19 - adde 20,20,10 - xor 15,15,18 - insrwi 6,30,18,0 - insrwi 8,31,18,0 - addc 21,21,14 - srwi 9,30,41-32 - srwi 10,31,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,31,41-32,0 - insrwi 10,30,41-32,0 - xor 14,23,25 - adde 20,20,15 - xor 15,22,24 - xor 0,0,9 - xor 5,5,10 - - srwi 6,23,28 - and 11,11,14 - addc 21,21,0 - and 12,12,15 - srwi 8,22,28 - srwi 0,22,34-32 - adde 20,20,5 - srwi 5,23,34-32 - insrwi 6,22,28,0 - insrwi 8,23,28,0 - xor 11,11,25 - addc 29,29,21 - xor 12,12,24 - insrwi 0,23,34-32,0 - insrwi 5,22,34-32,0 - adde 28,28,20 - srwi 9,22,39-32 - srwi 10,23,39-32 - xor 0,0,6 - addc 21,21,11 - xor 5,5,8 - insrwi 9,23,39-32,0 - insrwi 10,22,39-32,0 - adde 20,20,12 - lwz 6,80(1) - lwz 8,84(1) - xor 0,0,9 - xor 5,5,10 - addc 21,21,0 - adde 20,20,5 - srwi 0,6,1 - srwi 5,8,1 - srwi 9,6,8 - srwi 10,8,8 - insrwi 0,8,1,0 - insrwi 5,6,1,0 - srwi 11,6,7 - insrwi 9,8,8,0 - insrwi 10,6,8,0 - insrwi 11,8,7,0 - xor 0,0,9 - lwz 9,56(1) - srwi 12,8,7 - xor 5,5,10 - lwz 10,60(1) - xor 11,11,0 - srwi 0,9,19 - xor 12,12,5 - srwi 5,10,19 - addc 3,3,11 - srwi 11,10,61-32 - insrwi 0,10,19,0 - insrwi 5,9,19,0 - adde 4,4,12 - srwi 12,9,61-32 - - insrwi 11,9,61-32,0 - srwi 9,9,6 - insrwi 12,10,61-32,0 - insrwi 9,10,6,0 - xor 0,0,11 - lwz 11,144(1) - srwi 10,10,6 - xor 5,5,12 - lwz 12,148(1) - xor 0,0,9 - addc 3,3,11 - xor 5,5,10 - adde 4,4,12 - addc 3,3,0 - adde 4,4,5 - lwz 9,52(7) - xor 11,31,17 - lwz 10,48(7) - xor 12,30,16 - addc 19,19,3 - stw 3,72(1) - - srwi 0,29,14 - srwi 5,28,14 - and 11,11,29 - adde 18,18,4 - and 12,12,28 - stw 4,76(1) - srwi 3,29,18 - srwi 4,28,18 - addc 19,19,9 - insrwi 0,28,14,0 - insrwi 5,29,14,0 - xor 11,11,17 - adde 18,18,10 - xor 12,12,16 - insrwi 3,28,18,0 - insrwi 4,29,18,0 - addc 19,19,11 - srwi 9,28,41-32 - srwi 10,29,41-32 - xor 0,0,3 - xor 5,5,4 - insrwi 9,29,41-32,0 - insrwi 10,28,41-32,0 - xor 11,21,23 - adde 18,18,12 - xor 12,20,22 - xor 0,0,9 - xor 5,5,10 - - srwi 3,21,28 - and 14,14,11 - addc 19,19,0 - and 15,15,12 - srwi 4,20,28 - srwi 0,20,34-32 - adde 18,18,5 - srwi 5,21,34-32 - insrwi 3,20,28,0 - insrwi 4,21,28,0 - xor 14,14,23 - addc 27,27,19 - xor 15,15,22 - insrwi 0,21,34-32,0 - insrwi 5,20,34-32,0 - adde 26,26,18 - srwi 9,20,39-32 - srwi 10,21,39-32 - xor 0,0,3 - addc 19,19,14 - xor 5,5,4 - insrwi 9,21,39-32,0 - insrwi 10,20,39-32,0 - adde 18,18,15 - lwz 3,88(1) - lwz 4,92(1) - xor 0,0,9 - xor 5,5,10 - addc 19,19,0 - adde 18,18,5 - srwi 0,3,1 - srwi 5,4,1 - srwi 9,3,8 - srwi 10,4,8 - insrwi 0,4,1,0 - insrwi 5,3,1,0 - srwi 14,3,7 - insrwi 9,4,8,0 - insrwi 10,3,8,0 - insrwi 14,4,7,0 - xor 0,0,9 - lwz 9,64(1) - srwi 15,4,7 - xor 5,5,10 - lwz 10,68(1) - xor 14,14,0 - srwi 0,9,19 - xor 15,15,5 - srwi 5,10,19 - addc 6,6,14 - srwi 14,10,61-32 - insrwi 0,10,19,0 - insrwi 5,9,19,0 - adde 8,8,15 - srwi 15,9,61-32 - - insrwi 14,9,61-32,0 - srwi 9,9,6 - insrwi 15,10,61-32,0 - insrwi 9,10,6,0 - xor 0,0,14 - lwz 14,24(1) - srwi 10,10,6 - xor 5,5,15 - lwz 15,28(1) - xor 0,0,9 - addc 6,6,14 - xor 5,5,10 - adde 8,8,15 - addc 6,6,0 - adde 8,8,5 - lwz 9,60(7) - xor 14,29,31 - lwz 10,56(7) - xor 15,28,30 - addc 17,17,6 - stw 6,80(1) - - srwi 0,27,14 - srwi 5,26,14 - and 14,14,27 - adde 16,16,8 - and 15,15,26 - stw 8,84(1) - srwi 6,27,18 - srwi 8,26,18 - addc 17,17,9 - insrwi 0,26,14,0 - insrwi 5,27,14,0 - xor 14,14,31 - adde 16,16,10 - xor 15,15,30 - insrwi 6,26,18,0 - insrwi 8,27,18,0 - addc 17,17,14 - srwi 9,26,41-32 - srwi 10,27,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,27,41-32,0 - insrwi 10,26,41-32,0 - xor 14,19,21 - adde 16,16,15 - xor 15,18,20 - xor 0,0,9 - xor 5,5,10 - - srwi 6,19,28 - and 11,11,14 - addc 17,17,0 - and 12,12,15 - srwi 8,18,28 - srwi 0,18,34-32 - adde 16,16,5 - srwi 5,19,34-32 - insrwi 6,18,28,0 - insrwi 8,19,28,0 - xor 11,11,21 - addc 25,25,17 - xor 12,12,20 - insrwi 0,19,34-32,0 - insrwi 5,18,34-32,0 - adde 24,24,16 - srwi 9,18,39-32 - srwi 10,19,39-32 - xor 0,0,6 - addc 17,17,11 - xor 5,5,8 - insrwi 9,19,39-32,0 - insrwi 10,18,39-32,0 - adde 16,16,12 - lwz 6,96(1) - lwz 8,100(1) - xor 0,0,9 - xor 5,5,10 - addc 17,17,0 - adde 16,16,5 - srwi 0,6,1 - srwi 5,8,1 - srwi 9,6,8 - srwi 10,8,8 - insrwi 0,8,1,0 - insrwi 5,6,1,0 - srwi 11,6,7 - insrwi 9,8,8,0 - insrwi 10,6,8,0 - insrwi 11,8,7,0 - xor 0,0,9 - lwz 9,72(1) - srwi 12,8,7 - xor 5,5,10 - lwz 10,76(1) - xor 11,11,0 - srwi 0,9,19 - xor 12,12,5 - srwi 5,10,19 - addc 3,3,11 - srwi 11,10,61-32 - insrwi 0,10,19,0 - insrwi 5,9,19,0 - adde 4,4,12 - srwi 12,9,61-32 - - insrwi 11,9,61-32,0 - srwi 9,9,6 - insrwi 12,10,61-32,0 - insrwi 9,10,6,0 - xor 0,0,11 - lwz 11,32(1) - srwi 10,10,6 - xor 5,5,12 - lwz 12,36(1) - xor 0,0,9 - addc 3,3,11 - xor 5,5,10 - adde 4,4,12 - addc 3,3,0 - adde 4,4,5 - lwz 9,68(7) - xor 11,27,29 - lwz 10,64(7) - xor 12,26,28 - addc 31,31,3 - stw 3,88(1) - - srwi 0,25,14 - srwi 5,24,14 - and 11,11,25 - adde 30,30,4 - and 12,12,24 - stw 4,92(1) - srwi 3,25,18 - srwi 4,24,18 - addc 31,31,9 - insrwi 0,24,14,0 - insrwi 5,25,14,0 - xor 11,11,29 - adde 30,30,10 - xor 12,12,28 - insrwi 3,24,18,0 - insrwi 4,25,18,0 - addc 31,31,11 - srwi 9,24,41-32 - srwi 10,25,41-32 - xor 0,0,3 - xor 5,5,4 - insrwi 9,25,41-32,0 - insrwi 10,24,41-32,0 - xor 11,17,19 - adde 30,30,12 - xor 12,16,18 - xor 0,0,9 - xor 5,5,10 - - srwi 3,17,28 - and 14,14,11 - addc 31,31,0 - and 15,15,12 - srwi 4,16,28 - srwi 0,16,34-32 - adde 30,30,5 - srwi 5,17,34-32 - insrwi 3,16,28,0 - insrwi 4,17,28,0 - xor 14,14,19 - addc 23,23,31 - xor 15,15,18 - insrwi 0,17,34-32,0 - insrwi 5,16,34-32,0 - adde 22,22,30 - srwi 9,16,39-32 - srwi 10,17,39-32 - xor 0,0,3 - addc 31,31,14 - xor 5,5,4 - insrwi 9,17,39-32,0 - insrwi 10,16,39-32,0 - adde 30,30,15 - lwz 3,104(1) - lwz 4,108(1) - xor 0,0,9 - xor 5,5,10 - addc 31,31,0 - adde 30,30,5 - srwi 0,3,1 - srwi 5,4,1 - srwi 9,3,8 - srwi 10,4,8 - insrwi 0,4,1,0 - insrwi 5,3,1,0 - srwi 14,3,7 - insrwi 9,4,8,0 - insrwi 10,3,8,0 - insrwi 14,4,7,0 - xor 0,0,9 - lwz 9,80(1) - srwi 15,4,7 - xor 5,5,10 - lwz 10,84(1) - xor 14,14,0 - srwi 0,9,19 - xor 15,15,5 - srwi 5,10,19 - addc 6,6,14 - srwi 14,10,61-32 - insrwi 0,10,19,0 - insrwi 5,9,19,0 - adde 8,8,15 - srwi 15,9,61-32 - - insrwi 14,9,61-32,0 - srwi 9,9,6 - insrwi 15,10,61-32,0 - insrwi 9,10,6,0 - xor 0,0,14 - lwz 14,40(1) - srwi 10,10,6 - xor 5,5,15 - lwz 15,44(1) - xor 0,0,9 - addc 6,6,14 - xor 5,5,10 - adde 8,8,15 - addc 6,6,0 - adde 8,8,5 - lwz 9,76(7) - xor 14,25,27 - lwz 10,72(7) - xor 15,24,26 - addc 29,29,6 - stw 6,96(1) - - srwi 0,23,14 - srwi 5,22,14 - and 14,14,23 - adde 28,28,8 - and 15,15,22 - stw 8,100(1) - srwi 6,23,18 - srwi 8,22,18 - addc 29,29,9 - insrwi 0,22,14,0 - insrwi 5,23,14,0 - xor 14,14,27 - adde 28,28,10 - xor 15,15,26 - insrwi 6,22,18,0 - insrwi 8,23,18,0 - addc 29,29,14 - srwi 9,22,41-32 - srwi 10,23,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,23,41-32,0 - insrwi 10,22,41-32,0 - xor 14,31,17 - adde 28,28,15 - xor 15,30,16 - xor 0,0,9 - xor 5,5,10 - - srwi 6,31,28 - and 11,11,14 - addc 29,29,0 - and 12,12,15 - srwi 8,30,28 - srwi 0,30,34-32 - adde 28,28,5 - srwi 5,31,34-32 - insrwi 6,30,28,0 - insrwi 8,31,28,0 - xor 11,11,17 - addc 21,21,29 - xor 12,12,16 - insrwi 0,31,34-32,0 - insrwi 5,30,34-32,0 - adde 20,20,28 - srwi 9,30,39-32 - srwi 10,31,39-32 - xor 0,0,6 - addc 29,29,11 - xor 5,5,8 - insrwi 9,31,39-32,0 - insrwi 10,30,39-32,0 - adde 28,28,12 - lwz 6,112(1) - lwz 8,116(1) - xor 0,0,9 - xor 5,5,10 - addc 29,29,0 - adde 28,28,5 - srwi 0,6,1 - srwi 5,8,1 - srwi 9,6,8 - srwi 10,8,8 - insrwi 0,8,1,0 - insrwi 5,6,1,0 - srwi 11,6,7 - insrwi 9,8,8,0 - insrwi 10,6,8,0 - insrwi 11,8,7,0 - xor 0,0,9 - lwz 9,88(1) - srwi 12,8,7 - xor 5,5,10 - lwz 10,92(1) - xor 11,11,0 - srwi 0,9,19 - xor 12,12,5 - srwi 5,10,19 - addc 3,3,11 - srwi 11,10,61-32 - insrwi 0,10,19,0 - insrwi 5,9,19,0 - adde 4,4,12 - srwi 12,9,61-32 - - insrwi 11,9,61-32,0 - srwi 9,9,6 - insrwi 12,10,61-32,0 - insrwi 9,10,6,0 - xor 0,0,11 - lwz 11,48(1) - srwi 10,10,6 - xor 5,5,12 - lwz 12,52(1) - xor 0,0,9 - addc 3,3,11 - xor 5,5,10 - adde 4,4,12 - addc 3,3,0 - adde 4,4,5 - lwz 9,84(7) - xor 11,23,25 - lwz 10,80(7) - xor 12,22,24 - addc 27,27,3 - stw 3,104(1) - - srwi 0,21,14 - srwi 5,20,14 - and 11,11,21 - adde 26,26,4 - and 12,12,20 - stw 4,108(1) - srwi 3,21,18 - srwi 4,20,18 - addc 27,27,9 - insrwi 0,20,14,0 - insrwi 5,21,14,0 - xor 11,11,25 - adde 26,26,10 - xor 12,12,24 - insrwi 3,20,18,0 - insrwi 4,21,18,0 - addc 27,27,11 - srwi 9,20,41-32 - srwi 10,21,41-32 - xor 0,0,3 - xor 5,5,4 - insrwi 9,21,41-32,0 - insrwi 10,20,41-32,0 - xor 11,29,31 - adde 26,26,12 - xor 12,28,30 - xor 0,0,9 - xor 5,5,10 - - srwi 3,29,28 - and 14,14,11 - addc 27,27,0 - and 15,15,12 - srwi 4,28,28 - srwi 0,28,34-32 - adde 26,26,5 - srwi 5,29,34-32 - insrwi 3,28,28,0 - insrwi 4,29,28,0 - xor 14,14,31 - addc 19,19,27 - xor 15,15,30 - insrwi 0,29,34-32,0 - insrwi 5,28,34-32,0 - adde 18,18,26 - srwi 9,28,39-32 - srwi 10,29,39-32 - xor 0,0,3 - addc 27,27,14 - xor 5,5,4 - insrwi 9,29,39-32,0 - insrwi 10,28,39-32,0 - adde 26,26,15 - lwz 3,120(1) - lwz 4,124(1) - xor 0,0,9 - xor 5,5,10 - addc 27,27,0 - adde 26,26,5 - srwi 0,3,1 - srwi 5,4,1 - srwi 9,3,8 - srwi 10,4,8 - insrwi 0,4,1,0 - insrwi 5,3,1,0 - srwi 14,3,7 - insrwi 9,4,8,0 - insrwi 10,3,8,0 - insrwi 14,4,7,0 - xor 0,0,9 - lwz 9,96(1) - srwi 15,4,7 - xor 5,5,10 - lwz 10,100(1) - xor 14,14,0 - srwi 0,9,19 - xor 15,15,5 - srwi 5,10,19 - addc 6,6,14 - srwi 14,10,61-32 - insrwi 0,10,19,0 - insrwi 5,9,19,0 - adde 8,8,15 - srwi 15,9,61-32 - - insrwi 14,9,61-32,0 - srwi 9,9,6 - insrwi 15,10,61-32,0 - insrwi 9,10,6,0 - xor 0,0,14 - lwz 14,56(1) - srwi 10,10,6 - xor 5,5,15 - lwz 15,60(1) - xor 0,0,9 - addc 6,6,14 - xor 5,5,10 - adde 8,8,15 - addc 6,6,0 - adde 8,8,5 - lwz 9,92(7) - xor 14,21,23 - lwz 10,88(7) - xor 15,20,22 - addc 25,25,6 - stw 6,112(1) - - srwi 0,19,14 - srwi 5,18,14 - and 14,14,19 - adde 24,24,8 - and 15,15,18 - stw 8,116(1) - srwi 6,19,18 - srwi 8,18,18 - addc 25,25,9 - insrwi 0,18,14,0 - insrwi 5,19,14,0 - xor 14,14,23 - adde 24,24,10 - xor 15,15,22 - insrwi 6,18,18,0 - insrwi 8,19,18,0 - addc 25,25,14 - srwi 9,18,41-32 - srwi 10,19,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,19,41-32,0 - insrwi 10,18,41-32,0 - xor 14,27,29 - adde 24,24,15 - xor 15,26,28 - xor 0,0,9 - xor 5,5,10 - - srwi 6,27,28 - and 11,11,14 - addc 25,25,0 - and 12,12,15 - srwi 8,26,28 - srwi 0,26,34-32 - adde 24,24,5 - srwi 5,27,34-32 - insrwi 6,26,28,0 - insrwi 8,27,28,0 - xor 11,11,29 - addc 17,17,25 - xor 12,12,28 - insrwi 0,27,34-32,0 - insrwi 5,26,34-32,0 - adde 16,16,24 - srwi 9,26,39-32 - srwi 10,27,39-32 - xor 0,0,6 - addc 25,25,11 - xor 5,5,8 - insrwi 9,27,39-32,0 - insrwi 10,26,39-32,0 - adde 24,24,12 - lwz 6,128(1) - lwz 8,132(1) - xor 0,0,9 - xor 5,5,10 - addc 25,25,0 - adde 24,24,5 - srwi 0,6,1 - srwi 5,8,1 - srwi 9,6,8 - srwi 10,8,8 - insrwi 0,8,1,0 - insrwi 5,6,1,0 - srwi 11,6,7 - insrwi 9,8,8,0 - insrwi 10,6,8,0 - insrwi 11,8,7,0 - xor 0,0,9 - lwz 9,104(1) - srwi 12,8,7 - xor 5,5,10 - lwz 10,108(1) - xor 11,11,0 - srwi 0,9,19 - xor 12,12,5 - srwi 5,10,19 - addc 3,3,11 - srwi 11,10,61-32 - insrwi 0,10,19,0 - insrwi 5,9,19,0 - adde 4,4,12 - srwi 12,9,61-32 - - insrwi 11,9,61-32,0 - srwi 9,9,6 - insrwi 12,10,61-32,0 - insrwi 9,10,6,0 - xor 0,0,11 - lwz 11,64(1) - srwi 10,10,6 - xor 5,5,12 - lwz 12,68(1) - xor 0,0,9 - addc 3,3,11 - xor 5,5,10 - adde 4,4,12 - addc 3,3,0 - adde 4,4,5 - lwz 9,100(7) - xor 11,19,21 - lwz 10,96(7) - xor 12,18,20 - addc 23,23,3 - stw 3,120(1) - - srwi 0,17,14 - srwi 5,16,14 - and 11,11,17 - adde 22,22,4 - and 12,12,16 - stw 4,124(1) - srwi 3,17,18 - srwi 4,16,18 - addc 23,23,9 - insrwi 0,16,14,0 - insrwi 5,17,14,0 - xor 11,11,21 - adde 22,22,10 - xor 12,12,20 - insrwi 3,16,18,0 - insrwi 4,17,18,0 - addc 23,23,11 - srwi 9,16,41-32 - srwi 10,17,41-32 - xor 0,0,3 - xor 5,5,4 - insrwi 9,17,41-32,0 - insrwi 10,16,41-32,0 - xor 11,25,27 - adde 22,22,12 - xor 12,24,26 - xor 0,0,9 - xor 5,5,10 - - srwi 3,25,28 - and 14,14,11 - addc 23,23,0 - and 15,15,12 - srwi 4,24,28 - srwi 0,24,34-32 - adde 22,22,5 - srwi 5,25,34-32 - insrwi 3,24,28,0 - insrwi 4,25,28,0 - xor 14,14,27 - addc 31,31,23 - xor 15,15,26 - insrwi 0,25,34-32,0 - insrwi 5,24,34-32,0 - adde 30,30,22 - srwi 9,24,39-32 - srwi 10,25,39-32 - xor 0,0,3 - addc 23,23,14 - xor 5,5,4 - insrwi 9,25,39-32,0 - insrwi 10,24,39-32,0 - adde 22,22,15 - lwz 3,136(1) - lwz 4,140(1) - xor 0,0,9 - xor 5,5,10 - addc 23,23,0 - adde 22,22,5 - srwi 0,3,1 - srwi 5,4,1 - srwi 9,3,8 - srwi 10,4,8 - insrwi 0,4,1,0 - insrwi 5,3,1,0 - srwi 14,3,7 - insrwi 9,4,8,0 - insrwi 10,3,8,0 - insrwi 14,4,7,0 - xor 0,0,9 - lwz 9,112(1) - srwi 15,4,7 - xor 5,5,10 - lwz 10,116(1) - xor 14,14,0 - srwi 0,9,19 - xor 15,15,5 - srwi 5,10,19 - addc 6,6,14 - srwi 14,10,61-32 - insrwi 0,10,19,0 - insrwi 5,9,19,0 - adde 8,8,15 - srwi 15,9,61-32 - - insrwi 14,9,61-32,0 - srwi 9,9,6 - insrwi 15,10,61-32,0 - insrwi 9,10,6,0 - xor 0,0,14 - lwz 14,72(1) - srwi 10,10,6 - xor 5,5,15 - lwz 15,76(1) - xor 0,0,9 - addc 6,6,14 - xor 5,5,10 - adde 8,8,15 - addc 6,6,0 - adde 8,8,5 - lwz 9,108(7) - xor 14,17,19 - lwz 10,104(7) - xor 15,16,18 - addc 21,21,6 - stw 6,128(1) - - srwi 0,31,14 - srwi 5,30,14 - and 14,14,31 - adde 20,20,8 - and 15,15,30 - stw 8,132(1) - srwi 6,31,18 - srwi 8,30,18 - addc 21,21,9 - insrwi 0,30,14,0 - insrwi 5,31,14,0 - xor 14,14,19 - adde 20,20,10 - xor 15,15,18 - insrwi 6,30,18,0 - insrwi 8,31,18,0 - addc 21,21,14 - srwi 9,30,41-32 - srwi 10,31,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,31,41-32,0 - insrwi 10,30,41-32,0 - xor 14,23,25 - adde 20,20,15 - xor 15,22,24 - xor 0,0,9 - xor 5,5,10 - - srwi 6,23,28 - and 11,11,14 - addc 21,21,0 - and 12,12,15 - srwi 8,22,28 - srwi 0,22,34-32 - adde 20,20,5 - srwi 5,23,34-32 - insrwi 6,22,28,0 - insrwi 8,23,28,0 - xor 11,11,25 - addc 29,29,21 - xor 12,12,24 - insrwi 0,23,34-32,0 - insrwi 5,22,34-32,0 - adde 28,28,20 - srwi 9,22,39-32 - srwi 10,23,39-32 - xor 0,0,6 - addc 21,21,11 - xor 5,5,8 - insrwi 9,23,39-32,0 - insrwi 10,22,39-32,0 - adde 20,20,12 - lwz 6,144(1) - lwz 8,148(1) - xor 0,0,9 - xor 5,5,10 - addc 21,21,0 - adde 20,20,5 - srwi 0,6,1 - srwi 5,8,1 - srwi 9,6,8 - srwi 10,8,8 - insrwi 0,8,1,0 - insrwi 5,6,1,0 - srwi 11,6,7 - insrwi 9,8,8,0 - insrwi 10,6,8,0 - insrwi 11,8,7,0 - xor 0,0,9 - lwz 9,120(1) - srwi 12,8,7 - xor 5,5,10 - lwz 10,124(1) - xor 11,11,0 - srwi 0,9,19 - xor 12,12,5 - srwi 5,10,19 - addc 3,3,11 - srwi 11,10,61-32 - insrwi 0,10,19,0 - insrwi 5,9,19,0 - adde 4,4,12 - srwi 12,9,61-32 - - insrwi 11,9,61-32,0 - srwi 9,9,6 - insrwi 12,10,61-32,0 - insrwi 9,10,6,0 - xor 0,0,11 - lwz 11,80(1) - srwi 10,10,6 - xor 5,5,12 - lwz 12,84(1) - xor 0,0,9 - addc 3,3,11 - xor 5,5,10 - adde 4,4,12 - addc 3,3,0 - adde 4,4,5 - lwz 9,116(7) - xor 11,31,17 - lwz 10,112(7) - xor 12,30,16 - addc 19,19,3 - stw 3,136(1) - - srwi 0,29,14 - srwi 5,28,14 - and 11,11,29 - adde 18,18,4 - and 12,12,28 - stw 4,140(1) - srwi 3,29,18 - srwi 4,28,18 - addc 19,19,9 - insrwi 0,28,14,0 - insrwi 5,29,14,0 - xor 11,11,17 - adde 18,18,10 - xor 12,12,16 - insrwi 3,28,18,0 - insrwi 4,29,18,0 - addc 19,19,11 - srwi 9,28,41-32 - srwi 10,29,41-32 - xor 0,0,3 - xor 5,5,4 - insrwi 9,29,41-32,0 - insrwi 10,28,41-32,0 - xor 11,21,23 - adde 18,18,12 - xor 12,20,22 - xor 0,0,9 - xor 5,5,10 - - srwi 3,21,28 - and 14,14,11 - addc 19,19,0 - and 15,15,12 - srwi 4,20,28 - srwi 0,20,34-32 - adde 18,18,5 - srwi 5,21,34-32 - insrwi 3,20,28,0 - insrwi 4,21,28,0 - xor 14,14,23 - addc 27,27,19 - xor 15,15,22 - insrwi 0,21,34-32,0 - insrwi 5,20,34-32,0 - adde 26,26,18 - srwi 9,20,39-32 - srwi 10,21,39-32 - xor 0,0,3 - addc 19,19,14 - xor 5,5,4 - insrwi 9,21,39-32,0 - insrwi 10,20,39-32,0 - adde 18,18,15 - lwz 3,24(1) - lwz 4,28(1) - xor 0,0,9 - xor 5,5,10 - addc 19,19,0 - adde 18,18,5 - srwi 0,3,1 - srwi 5,4,1 - srwi 9,3,8 - srwi 10,4,8 - insrwi 0,4,1,0 - insrwi 5,3,1,0 - srwi 14,3,7 - insrwi 9,4,8,0 - insrwi 10,3,8,0 - insrwi 14,4,7,0 - xor 0,0,9 - lwz 9,128(1) - srwi 15,4,7 - xor 5,5,10 - lwz 10,132(1) - xor 14,14,0 - srwi 0,9,19 - xor 15,15,5 - srwi 5,10,19 - addc 6,6,14 - srwi 14,10,61-32 - insrwi 0,10,19,0 - insrwi 5,9,19,0 - adde 8,8,15 - srwi 15,9,61-32 - - insrwi 14,9,61-32,0 - srwi 9,9,6 - insrwi 15,10,61-32,0 - insrwi 9,10,6,0 - xor 0,0,14 - lwz 14,88(1) - srwi 10,10,6 - xor 5,5,15 - lwz 15,92(1) - xor 0,0,9 - addc 6,6,14 - xor 5,5,10 - adde 8,8,15 - addc 6,6,0 - adde 8,8,5 - lwz 9,124(7) - xor 14,29,31 - lwz 10,120(7) - xor 15,28,30 - addc 17,17,6 - stw 6,144(1) - - srwi 0,27,14 - srwi 5,26,14 - and 14,14,27 - adde 16,16,8 - and 15,15,26 - stw 8,148(1) - srwi 6,27,18 - srwi 8,26,18 - addc 17,17,9 - insrwi 0,26,14,0 - insrwi 5,27,14,0 - xor 14,14,31 - adde 16,16,10 - xor 15,15,30 - insrwi 6,26,18,0 - insrwi 8,27,18,0 - addc 17,17,14 - srwi 9,26,41-32 - srwi 10,27,41-32 - xor 0,0,6 - xor 5,5,8 - insrwi 9,27,41-32,0 - insrwi 10,26,41-32,0 - xor 14,19,21 - adde 16,16,15 - xor 15,18,20 - xor 0,0,9 - xor 5,5,10 - - srwi 6,19,28 - and 11,11,14 - addc 17,17,0 - and 12,12,15 - srwi 8,18,28 - srwi 0,18,34-32 - adde 16,16,5 - srwi 5,19,34-32 - insrwi 6,18,28,0 - insrwi 8,19,28,0 - xor 11,11,21 - addc 25,25,17 - xor 12,12,20 - insrwi 0,19,34-32,0 - insrwi 5,18,34-32,0 - adde 24,24,16 - srwi 9,18,39-32 - srwi 10,19,39-32 - xor 0,0,6 - addc 17,17,11 - xor 5,5,8 - insrwi 9,19,39-32,0 - insrwi 10,18,39-32,0 - adde 16,16,12 - lwz 6,32(1) - lwz 8,36(1) - xor 0,0,9 - xor 5,5,10 - addc 17,17,0 - adde 16,16,5 - bdnz .Lrounds - - lwz 3,168(1) - lwz 4,164(1) - lwz 5,160(1) - subi 7,7,512 - - lwz 6,0(3) - lwz 8,4(3) - lwz 9,8(3) - lwz 10,12(3) - lwz 11,16(3) - lwz 12,20(3) - lwz 14,24(3) - addc 17,17,8 - lwz 15,28(3) - adde 16,16,6 - lwz 6,32(3) - addc 19,19,10 - lwz 8,36(3) - adde 18,18,9 - lwz 9,40(3) - addc 21,21,12 - lwz 10,44(3) - adde 20,20,11 - lwz 11,48(3) - addc 23,23,15 - lwz 12,52(3) - adde 22,22,14 - lwz 14,56(3) - addc 25,25,8 - lwz 15,60(3) - adde 24,24,6 - stw 16,0(3) - stw 17,4(3) - addc 27,27,10 - stw 18,8(3) - stw 19,12(3) - adde 26,26,9 - stw 20,16(3) - stw 21,20(3) - addc 29,29,12 - stw 22,24(3) - stw 23,28(3) - adde 28,28,11 - stw 24,32(3) - stw 25,36(3) - addc 31,31,15 - stw 26,40(3) - stw 27,44(3) - adde 30,30,14 - stw 28,48(3) - stw 29,52(3) - stw 30,56(3) - stw 31,60(3) - - addi 4,4,128 - stw 4,164(1) - .long 0x7c042840 - bne .Lsha2_block_private - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size sha512_block_ppc,.-sha512_block_ppc -.align 6 -.LPICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 7 - addi 7,7,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.long 0x428a2f98,0xd728ae22 -.long 0x71374491,0x23ef65cd -.long 0xb5c0fbcf,0xec4d3b2f -.long 0xe9b5dba5,0x8189dbbc -.long 0x3956c25b,0xf348b538 -.long 0x59f111f1,0xb605d019 -.long 0x923f82a4,0xaf194f9b -.long 0xab1c5ed5,0xda6d8118 -.long 0xd807aa98,0xa3030242 -.long 0x12835b01,0x45706fbe -.long 0x243185be,0x4ee4b28c -.long 0x550c7dc3,0xd5ffb4e2 -.long 0x72be5d74,0xf27b896f -.long 0x80deb1fe,0x3b1696b1 -.long 0x9bdc06a7,0x25c71235 -.long 0xc19bf174,0xcf692694 -.long 0xe49b69c1,0x9ef14ad2 -.long 0xefbe4786,0x384f25e3 -.long 0x0fc19dc6,0x8b8cd5b5 -.long 0x240ca1cc,0x77ac9c65 -.long 0x2de92c6f,0x592b0275 -.long 0x4a7484aa,0x6ea6e483 -.long 0x5cb0a9dc,0xbd41fbd4 -.long 0x76f988da,0x831153b5 -.long 0x983e5152,0xee66dfab -.long 0xa831c66d,0x2db43210 -.long 0xb00327c8,0x98fb213f -.long 0xbf597fc7,0xbeef0ee4 -.long 0xc6e00bf3,0x3da88fc2 -.long 0xd5a79147,0x930aa725 -.long 0x06ca6351,0xe003826f -.long 0x14292967,0x0a0e6e70 -.long 0x27b70a85,0x46d22ffc -.long 0x2e1b2138,0x5c26c926 -.long 0x4d2c6dfc,0x5ac42aed -.long 0x53380d13,0x9d95b3df -.long 0x650a7354,0x8baf63de -.long 0x766a0abb,0x3c77b2a8 -.long 0x81c2c92e,0x47edaee6 -.long 0x92722c85,0x1482353b -.long 0xa2bfe8a1,0x4cf10364 -.long 0xa81a664b,0xbc423001 -.long 0xc24b8b70,0xd0f89791 -.long 0xc76c51a3,0x0654be30 -.long 0xd192e819,0xd6ef5218 -.long 0xd6990624,0x5565a910 -.long 0xf40e3585,0x5771202a -.long 0x106aa070,0x32bbd1b8 -.long 0x19a4c116,0xb8d2d0c8 -.long 0x1e376c08,0x5141ab53 -.long 0x2748774c,0xdf8eeb99 -.long 0x34b0bcb5,0xe19b48a8 -.long 0x391c0cb3,0xc5c95a63 -.long 0x4ed8aa4a,0xe3418acb -.long 0x5b9cca4f,0x7763e373 -.long 0x682e6ff3,0xd6b2b8a3 -.long 0x748f82ee,0x5defb2fc -.long 0x78a5636f,0x43172f60 -.long 0x84c87814,0xa1f0ab72 -.long 0x8cc70208,0x1a6439ec -.long 0x90befffa,0x23631e28 -.long 0xa4506ceb,0xde82bde9 -.long 0xbef9a3f7,0xb2c67915 -.long 0xc67178f2,0xe372532b -.long 0xca273ece,0xea26619c -.long 0xd186b8c7,0x21c0c207 -.long 0xeada7dd6,0xcde0eb1e -.long 0xf57d4f7f,0xee6ed178 -.long 0x06f067aa,0x72176fba -.long 0x0a637dc5,0xa2c898a6 -.long 0x113f9804,0xbef90dae -.long 0x1b710b35,0x131c471b -.long 0x28db77f5,0x23047d84 -.long 0x32caab7b,0x40c72493 -.long 0x3c9ebe0a,0x15c9bebc -.long 0x431d67c4,0x9c100d4c -.long 0x4cc5d4be,0xcb3e42b6 -.long 0x597f299c,0xfc657e2a -.long 0x5fcb6fab,0x3ad6faec -.long 0x6c44198c,0x4a475817 diff --git a/sys/crypto/openssl/powerpc/sha512p8-ppc.S b/sys/crypto/openssl/powerpc/sha512p8-ppc.S deleted file mode 100644 index 182884860f4..00000000000 --- a/sys/crypto/openssl/powerpc/sha512p8-ppc.S +++ /dev/null @@ -1,833 +0,0 @@ -/* Do not modify. This file is auto-generated from sha512p8-ppc.pl. */ -.machine "any" -.text - -.globl sha512_block_p8 -.type sha512_block_p8,@function -.align 6 -sha512_block_p8: - stwu 1,-328(1) - mflr 8 - li 10,175 - li 11,191 - stvx 24,10,1 - addi 10,10,32 - mfspr 12,256 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - li 11,-4096+255 - stw 12,300(1) - li 10,0x10 - stw 26,304(1) - li 26,0x20 - stw 27,308(1) - li 27,0x30 - stw 28,312(1) - li 28,0x40 - stw 29,316(1) - li 29,0x50 - stw 30,320(1) - li 30,0x60 - stw 31,324(1) - li 31,0x70 - stw 8,332(1) - mtspr 256,11 - - bl .LPICmeup - addi 11,1,47 - .long 0x7C001E99 - .long 0x7C4A1E99 - .long 0x7C9A1E99 - vsldoi 1,0,0,8 - .long 0x7CDB1E99 - vsldoi 3,2,2,8 - vsldoi 5,4,4,8 - vsldoi 7,6,6,8 - li 0,4 - b .Loop -.align 5 -.Loop: - lvx 28,0,6 - .long 0x7D002699 - addi 4,4,16 - mr 7,6 - stvx 0,0,11 - stvx 1,10,11 - stvx 2,26,11 - stvx 3,27,11 - stvx 4,28,11 - stvx 5,29,11 - stvx 6,30,11 - stvx 7,31,11 - .long 0x10E7E0C0 - lvx 28,10,6 - .long 0x10E740C0 - vsel 29,6,5,4 - .long 0x10C6E0C0 - .long 0x10E7E8C0 - .long 0x13C4FEC2 - .long 0x10E7F0C0 - vxor 29,0,1 - vsel 29,1,2,29 - .long 0x106338C0 - .long 0x13C086C2 - .long 0x13DEE8C0 - .long 0x10E7F0C0 - lvx 28,26,7 - .long 0x7D402699 - addi 4,4,16 - vsldoi 9,8,8,8 - .long 0x10C648C0 - vsel 29,5,4,3 - .long 0x10A5E0C0 - .long 0x10C6E8C0 - .long 0x13C3FEC2 - .long 0x10C6F0C0 - vxor 29,7,0 - vsel 29,0,1,29 - .long 0x104230C0 - .long 0x13C786C2 - .long 0x13DEE8C0 - .long 0x10C6F0C0 - lvx 28,27,7 - .long 0x10A550C0 - vsel 29,4,3,2 - .long 0x1084E0C0 - .long 0x10A5E8C0 - .long 0x13C2FEC2 - .long 0x10A5F0C0 - vxor 29,6,7 - vsel 29,7,0,29 - .long 0x102128C0 - .long 0x13C686C2 - .long 0x13DEE8C0 - .long 0x10A5F0C0 - lvx 28,28,7 - .long 0x7D802699 - addi 4,4,16 - vsldoi 11,10,10,8 - .long 0x108458C0 - vsel 29,3,2,1 - .long 0x1063E0C0 - .long 0x1084E8C0 - .long 0x13C1FEC2 - .long 0x1084F0C0 - vxor 29,5,6 - vsel 29,6,7,29 - .long 0x100020C0 - .long 0x13C586C2 - .long 0x13DEE8C0 - .long 0x1084F0C0 - lvx 28,29,7 - .long 0x106360C0 - vsel 29,2,1,0 - .long 0x1042E0C0 - .long 0x1063E8C0 - .long 0x13C0FEC2 - .long 0x1063F0C0 - vxor 29,4,5 - vsel 29,5,6,29 - .long 0x10E718C0 - .long 0x13C486C2 - .long 0x13DEE8C0 - .long 0x1063F0C0 - lvx 28,30,7 - .long 0x7DC02699 - addi 4,4,16 - vsldoi 13,12,12,8 - .long 0x104268C0 - vsel 29,1,0,7 - .long 0x1021E0C0 - .long 0x1042E8C0 - .long 0x13C7FEC2 - .long 0x1042F0C0 - vxor 29,3,4 - vsel 29,4,5,29 - .long 0x10C610C0 - .long 0x13C386C2 - .long 0x13DEE8C0 - .long 0x1042F0C0 - lvx 28,31,7 - addi 7,7,0x80 - .long 0x102170C0 - vsel 29,0,7,6 - .long 0x1000E0C0 - .long 0x1021E8C0 - .long 0x13C6FEC2 - .long 0x1021F0C0 - vxor 29,2,3 - vsel 29,3,4,29 - .long 0x10A508C0 - .long 0x13C286C2 - .long 0x13DEE8C0 - .long 0x1021F0C0 - lvx 28,0,7 - .long 0x7E002699 - addi 4,4,16 - vsldoi 15,14,14,8 - .long 0x100078C0 - vsel 29,7,6,5 - .long 0x10E7E0C0 - .long 0x1000E8C0 - .long 0x13C5FEC2 - .long 0x1000F0C0 - vxor 29,1,2 - vsel 29,2,3,29 - .long 0x108400C0 - .long 0x13C186C2 - .long 0x13DEE8C0 - .long 0x1000F0C0 - lvx 28,10,7 - .long 0x10E780C0 - vsel 29,6,5,4 - .long 0x10C6E0C0 - .long 0x10E7E8C0 - .long 0x13C4FEC2 - .long 0x10E7F0C0 - vxor 29,0,1 - vsel 29,1,2,29 - .long 0x106338C0 - .long 0x13C086C2 - .long 0x13DEE8C0 - .long 0x10E7F0C0 - lvx 28,26,7 - .long 0x7E402699 - addi 4,4,16 - vsldoi 17,16,16,8 - .long 0x10C688C0 - vsel 29,5,4,3 - .long 0x10A5E0C0 - .long 0x10C6E8C0 - .long 0x13C3FEC2 - .long 0x10C6F0C0 - vxor 29,7,0 - vsel 29,0,1,29 - .long 0x104230C0 - .long 0x13C786C2 - .long 0x13DEE8C0 - .long 0x10C6F0C0 - lvx 28,27,7 - .long 0x10A590C0 - vsel 29,4,3,2 - .long 0x1084E0C0 - .long 0x10A5E8C0 - .long 0x13C2FEC2 - .long 0x10A5F0C0 - vxor 29,6,7 - vsel 29,7,0,29 - .long 0x102128C0 - .long 0x13C686C2 - .long 0x13DEE8C0 - .long 0x10A5F0C0 - lvx 28,28,7 - .long 0x7F002699 - addi 4,4,16 - vsldoi 19,18,18,8 - .long 0x108498C0 - vsel 29,3,2,1 - .long 0x1063E0C0 - .long 0x1084E8C0 - .long 0x13C1FEC2 - .long 0x1084F0C0 - vxor 29,5,6 - vsel 29,6,7,29 - .long 0x100020C0 - .long 0x13C586C2 - .long 0x13DEE8C0 - .long 0x1084F0C0 - lvx 28,29,7 - .long 0x1063C0C0 - vsel 29,2,1,0 - .long 0x1042E0C0 - .long 0x1063E8C0 - .long 0x13C0FEC2 - .long 0x1063F0C0 - vxor 29,4,5 - vsel 29,5,6,29 - .long 0x10E718C0 - .long 0x13C486C2 - .long 0x13DEE8C0 - .long 0x1063F0C0 - lvx 28,30,7 - .long 0x7F402699 - addi 4,4,16 - vsldoi 25,24,24,8 - .long 0x1042C8C0 - vsel 29,1,0,7 - .long 0x1021E0C0 - .long 0x1042E8C0 - .long 0x13C7FEC2 - .long 0x1042F0C0 - vxor 29,3,4 - vsel 29,4,5,29 - .long 0x10C610C0 - .long 0x13C386C2 - .long 0x13DEE8C0 - .long 0x1042F0C0 - lvx 28,31,7 - addi 7,7,0x80 - .long 0x1021D0C0 - vsel 29,0,7,6 - .long 0x1000E0C0 - .long 0x1021E8C0 - .long 0x13C6FEC2 - .long 0x1021F0C0 - vxor 29,2,3 - vsel 29,3,4,29 - .long 0x10A508C0 - .long 0x13C286C2 - .long 0x13DEE8C0 - .long 0x1021F0C0 - lvx 28,0,7 - vsldoi 27,26,26,8 - .long 0x13C906C2 - .long 0x1108F0C0 - .long 0x13DA7EC2 - .long 0x1108F0C0 - .long 0x110888C0 - .long 0x1000D8C0 - vsel 29,7,6,5 - .long 0x10E7E0C0 - .long 0x1000E8C0 - .long 0x13C5FEC2 - .long 0x1000F0C0 - vxor 29,1,2 - vsel 29,2,3,29 - .long 0x108400C0 - .long 0x13C186C2 - .long 0x13DEE8C0 - .long 0x1000F0C0 - lvx 28,10,7 - mtctr 0 - b .L16_xx -.align 5 -.L16_xx: - .long 0x13CA06C2 - .long 0x1129F0C0 - .long 0x13DB7EC2 - .long 0x1129F0C0 - .long 0x112990C0 - .long 0x10E740C0 - vsel 29,6,5,4 - .long 0x10C6E0C0 - .long 0x10E7E8C0 - .long 0x13C4FEC2 - .long 0x10E7F0C0 - vxor 29,0,1 - vsel 29,1,2,29 - .long 0x106338C0 - .long 0x13C086C2 - .long 0x13DEE8C0 - .long 0x10E7F0C0 - lvx 28,26,7 - .long 0x13CB06C2 - .long 0x114AF0C0 - .long 0x13C87EC2 - .long 0x114AF0C0 - .long 0x114A98C0 - .long 0x10C648C0 - vsel 29,5,4,3 - .long 0x10A5E0C0 - .long 0x10C6E8C0 - .long 0x13C3FEC2 - .long 0x10C6F0C0 - vxor 29,7,0 - vsel 29,0,1,29 - .long 0x104230C0 - .long 0x13C786C2 - .long 0x13DEE8C0 - .long 0x10C6F0C0 - lvx 28,27,7 - .long 0x13CC06C2 - .long 0x116BF0C0 - .long 0x13C97EC2 - .long 0x116BF0C0 - .long 0x116BC0C0 - .long 0x10A550C0 - vsel 29,4,3,2 - .long 0x1084E0C0 - .long 0x10A5E8C0 - .long 0x13C2FEC2 - .long 0x10A5F0C0 - vxor 29,6,7 - vsel 29,7,0,29 - .long 0x102128C0 - .long 0x13C686C2 - .long 0x13DEE8C0 - .long 0x10A5F0C0 - lvx 28,28,7 - .long 0x13CD06C2 - .long 0x118CF0C0 - .long 0x13CA7EC2 - .long 0x118CF0C0 - .long 0x118CC8C0 - .long 0x108458C0 - vsel 29,3,2,1 - .long 0x1063E0C0 - .long 0x1084E8C0 - .long 0x13C1FEC2 - .long 0x1084F0C0 - vxor 29,5,6 - vsel 29,6,7,29 - .long 0x100020C0 - .long 0x13C586C2 - .long 0x13DEE8C0 - .long 0x1084F0C0 - lvx 28,29,7 - .long 0x13CE06C2 - .long 0x11ADF0C0 - .long 0x13CB7EC2 - .long 0x11ADF0C0 - .long 0x11ADD0C0 - .long 0x106360C0 - vsel 29,2,1,0 - .long 0x1042E0C0 - .long 0x1063E8C0 - .long 0x13C0FEC2 - .long 0x1063F0C0 - vxor 29,4,5 - vsel 29,5,6,29 - .long 0x10E718C0 - .long 0x13C486C2 - .long 0x13DEE8C0 - .long 0x1063F0C0 - lvx 28,30,7 - .long 0x13CF06C2 - .long 0x11CEF0C0 - .long 0x13CC7EC2 - .long 0x11CEF0C0 - .long 0x11CED8C0 - .long 0x104268C0 - vsel 29,1,0,7 - .long 0x1021E0C0 - .long 0x1042E8C0 - .long 0x13C7FEC2 - .long 0x1042F0C0 - vxor 29,3,4 - vsel 29,4,5,29 - .long 0x10C610C0 - .long 0x13C386C2 - .long 0x13DEE8C0 - .long 0x1042F0C0 - lvx 28,31,7 - addi 7,7,0x80 - .long 0x13D006C2 - .long 0x11EFF0C0 - .long 0x13CD7EC2 - .long 0x11EFF0C0 - .long 0x11EF40C0 - .long 0x102170C0 - vsel 29,0,7,6 - .long 0x1000E0C0 - .long 0x1021E8C0 - .long 0x13C6FEC2 - .long 0x1021F0C0 - vxor 29,2,3 - vsel 29,3,4,29 - .long 0x10A508C0 - .long 0x13C286C2 - .long 0x13DEE8C0 - .long 0x1021F0C0 - lvx 28,0,7 - .long 0x13D106C2 - .long 0x1210F0C0 - .long 0x13CE7EC2 - .long 0x1210F0C0 - .long 0x121048C0 - .long 0x100078C0 - vsel 29,7,6,5 - .long 0x10E7E0C0 - .long 0x1000E8C0 - .long 0x13C5FEC2 - .long 0x1000F0C0 - vxor 29,1,2 - vsel 29,2,3,29 - .long 0x108400C0 - .long 0x13C186C2 - .long 0x13DEE8C0 - .long 0x1000F0C0 - lvx 28,10,7 - .long 0x13D206C2 - .long 0x1231F0C0 - .long 0x13CF7EC2 - .long 0x1231F0C0 - .long 0x123150C0 - .long 0x10E780C0 - vsel 29,6,5,4 - .long 0x10C6E0C0 - .long 0x10E7E8C0 - .long 0x13C4FEC2 - .long 0x10E7F0C0 - vxor 29,0,1 - vsel 29,1,2,29 - .long 0x106338C0 - .long 0x13C086C2 - .long 0x13DEE8C0 - .long 0x10E7F0C0 - lvx 28,26,7 - .long 0x13D306C2 - .long 0x1252F0C0 - .long 0x13D07EC2 - .long 0x1252F0C0 - .long 0x125258C0 - .long 0x10C688C0 - vsel 29,5,4,3 - .long 0x10A5E0C0 - .long 0x10C6E8C0 - .long 0x13C3FEC2 - .long 0x10C6F0C0 - vxor 29,7,0 - vsel 29,0,1,29 - .long 0x104230C0 - .long 0x13C786C2 - .long 0x13DEE8C0 - .long 0x10C6F0C0 - lvx 28,27,7 - .long 0x13D806C2 - .long 0x1273F0C0 - .long 0x13D17EC2 - .long 0x1273F0C0 - .long 0x127360C0 - .long 0x10A590C0 - vsel 29,4,3,2 - .long 0x1084E0C0 - .long 0x10A5E8C0 - .long 0x13C2FEC2 - .long 0x10A5F0C0 - vxor 29,6,7 - vsel 29,7,0,29 - .long 0x102128C0 - .long 0x13C686C2 - .long 0x13DEE8C0 - .long 0x10A5F0C0 - lvx 28,28,7 - .long 0x13D906C2 - .long 0x1318F0C0 - .long 0x13D27EC2 - .long 0x1318F0C0 - .long 0x131868C0 - .long 0x108498C0 - vsel 29,3,2,1 - .long 0x1063E0C0 - .long 0x1084E8C0 - .long 0x13C1FEC2 - .long 0x1084F0C0 - vxor 29,5,6 - vsel 29,6,7,29 - .long 0x100020C0 - .long 0x13C586C2 - .long 0x13DEE8C0 - .long 0x1084F0C0 - lvx 28,29,7 - .long 0x13DA06C2 - .long 0x1339F0C0 - .long 0x13D37EC2 - .long 0x1339F0C0 - .long 0x133970C0 - .long 0x1063C0C0 - vsel 29,2,1,0 - .long 0x1042E0C0 - .long 0x1063E8C0 - .long 0x13C0FEC2 - .long 0x1063F0C0 - vxor 29,4,5 - vsel 29,5,6,29 - .long 0x10E718C0 - .long 0x13C486C2 - .long 0x13DEE8C0 - .long 0x1063F0C0 - lvx 28,30,7 - .long 0x13DB06C2 - .long 0x135AF0C0 - .long 0x13D87EC2 - .long 0x135AF0C0 - .long 0x135A78C0 - .long 0x1042C8C0 - vsel 29,1,0,7 - .long 0x1021E0C0 - .long 0x1042E8C0 - .long 0x13C7FEC2 - .long 0x1042F0C0 - vxor 29,3,4 - vsel 29,4,5,29 - .long 0x10C610C0 - .long 0x13C386C2 - .long 0x13DEE8C0 - .long 0x1042F0C0 - lvx 28,31,7 - addi 7,7,0x80 - .long 0x13C806C2 - .long 0x137BF0C0 - .long 0x13D97EC2 - .long 0x137BF0C0 - .long 0x137B80C0 - .long 0x1021D0C0 - vsel 29,0,7,6 - .long 0x1000E0C0 - .long 0x1021E8C0 - .long 0x13C6FEC2 - .long 0x1021F0C0 - vxor 29,2,3 - vsel 29,3,4,29 - .long 0x10A508C0 - .long 0x13C286C2 - .long 0x13DEE8C0 - .long 0x1021F0C0 - lvx 28,0,7 - .long 0x13C906C2 - .long 0x1108F0C0 - .long 0x13DA7EC2 - .long 0x1108F0C0 - .long 0x110888C0 - .long 0x1000D8C0 - vsel 29,7,6,5 - .long 0x10E7E0C0 - .long 0x1000E8C0 - .long 0x13C5FEC2 - .long 0x1000F0C0 - vxor 29,1,2 - vsel 29,2,3,29 - .long 0x108400C0 - .long 0x13C186C2 - .long 0x13DEE8C0 - .long 0x1000F0C0 - lvx 28,10,7 - bdnz .L16_xx - - lvx 10,0,11 - subic. 5,5,1 - lvx 11,10,11 - .long 0x100050C0 - lvx 12,26,11 - .long 0x102158C0 - lvx 13,27,11 - .long 0x104260C0 - lvx 14,28,11 - .long 0x106368C0 - lvx 15,29,11 - .long 0x108470C0 - lvx 16,30,11 - .long 0x10A578C0 - lvx 17,31,11 - .long 0x10C680C0 - .long 0x10E788C0 - bne .Loop - vperm 0,0,1,28 - vperm 2,2,3,28 - vperm 4,4,5,28 - vperm 6,6,7,28 - .long 0x7C001F99 - .long 0x7C4A1F99 - .long 0x7C9A1F99 - .long 0x7CDB1F99 - addi 11,1,175 - mtlr 8 - mtspr 256,12 - lvx 24,0,11 - lvx 25,10,11 - lvx 26,26,11 - lvx 27,27,11 - lvx 28,28,11 - lvx 29,29,11 - lvx 30,30,11 - lvx 31,31,11 - lwz 26,304(1) - lwz 27,308(1) - lwz 28,312(1) - lwz 29,316(1) - lwz 30,320(1) - lwz 31,324(1) - addi 1,1,328 - blr -.long 0 -.byte 0,12,4,1,0x80,6,3,0 -.long 0 -.size sha512_block_p8,.-sha512_block_p8 -.align 6 -.LPICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 6 - addi 6,6,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.long 0x428a2f98,0xd728ae22 -.long 0x428a2f98,0xd728ae22 -.long 0x71374491,0x23ef65cd -.long 0x71374491,0x23ef65cd -.long 0xb5c0fbcf,0xec4d3b2f -.long 0xb5c0fbcf,0xec4d3b2f -.long 0xe9b5dba5,0x8189dbbc -.long 0xe9b5dba5,0x8189dbbc -.long 0x3956c25b,0xf348b538 -.long 0x3956c25b,0xf348b538 -.long 0x59f111f1,0xb605d019 -.long 0x59f111f1,0xb605d019 -.long 0x923f82a4,0xaf194f9b -.long 0x923f82a4,0xaf194f9b -.long 0xab1c5ed5,0xda6d8118 -.long 0xab1c5ed5,0xda6d8118 -.long 0xd807aa98,0xa3030242 -.long 0xd807aa98,0xa3030242 -.long 0x12835b01,0x45706fbe -.long 0x12835b01,0x45706fbe -.long 0x243185be,0x4ee4b28c -.long 0x243185be,0x4ee4b28c -.long 0x550c7dc3,0xd5ffb4e2 -.long 0x550c7dc3,0xd5ffb4e2 -.long 0x72be5d74,0xf27b896f -.long 0x72be5d74,0xf27b896f -.long 0x80deb1fe,0x3b1696b1 -.long 0x80deb1fe,0x3b1696b1 -.long 0x9bdc06a7,0x25c71235 -.long 0x9bdc06a7,0x25c71235 -.long 0xc19bf174,0xcf692694 -.long 0xc19bf174,0xcf692694 -.long 0xe49b69c1,0x9ef14ad2 -.long 0xe49b69c1,0x9ef14ad2 -.long 0xefbe4786,0x384f25e3 -.long 0xefbe4786,0x384f25e3 -.long 0x0fc19dc6,0x8b8cd5b5 -.long 0x0fc19dc6,0x8b8cd5b5 -.long 0x240ca1cc,0x77ac9c65 -.long 0x240ca1cc,0x77ac9c65 -.long 0x2de92c6f,0x592b0275 -.long 0x2de92c6f,0x592b0275 -.long 0x4a7484aa,0x6ea6e483 -.long 0x4a7484aa,0x6ea6e483 -.long 0x5cb0a9dc,0xbd41fbd4 -.long 0x5cb0a9dc,0xbd41fbd4 -.long 0x76f988da,0x831153b5 -.long 0x76f988da,0x831153b5 -.long 0x983e5152,0xee66dfab -.long 0x983e5152,0xee66dfab -.long 0xa831c66d,0x2db43210 -.long 0xa831c66d,0x2db43210 -.long 0xb00327c8,0x98fb213f -.long 0xb00327c8,0x98fb213f -.long 0xbf597fc7,0xbeef0ee4 -.long 0xbf597fc7,0xbeef0ee4 -.long 0xc6e00bf3,0x3da88fc2 -.long 0xc6e00bf3,0x3da88fc2 -.long 0xd5a79147,0x930aa725 -.long 0xd5a79147,0x930aa725 -.long 0x06ca6351,0xe003826f -.long 0x06ca6351,0xe003826f -.long 0x14292967,0x0a0e6e70 -.long 0x14292967,0x0a0e6e70 -.long 0x27b70a85,0x46d22ffc -.long 0x27b70a85,0x46d22ffc -.long 0x2e1b2138,0x5c26c926 -.long 0x2e1b2138,0x5c26c926 -.long 0x4d2c6dfc,0x5ac42aed -.long 0x4d2c6dfc,0x5ac42aed -.long 0x53380d13,0x9d95b3df -.long 0x53380d13,0x9d95b3df -.long 0x650a7354,0x8baf63de -.long 0x650a7354,0x8baf63de -.long 0x766a0abb,0x3c77b2a8 -.long 0x766a0abb,0x3c77b2a8 -.long 0x81c2c92e,0x47edaee6 -.long 0x81c2c92e,0x47edaee6 -.long 0x92722c85,0x1482353b -.long 0x92722c85,0x1482353b -.long 0xa2bfe8a1,0x4cf10364 -.long 0xa2bfe8a1,0x4cf10364 -.long 0xa81a664b,0xbc423001 -.long 0xa81a664b,0xbc423001 -.long 0xc24b8b70,0xd0f89791 -.long 0xc24b8b70,0xd0f89791 -.long 0xc76c51a3,0x0654be30 -.long 0xc76c51a3,0x0654be30 -.long 0xd192e819,0xd6ef5218 -.long 0xd192e819,0xd6ef5218 -.long 0xd6990624,0x5565a910 -.long 0xd6990624,0x5565a910 -.long 0xf40e3585,0x5771202a -.long 0xf40e3585,0x5771202a -.long 0x106aa070,0x32bbd1b8 -.long 0x106aa070,0x32bbd1b8 -.long 0x19a4c116,0xb8d2d0c8 -.long 0x19a4c116,0xb8d2d0c8 -.long 0x1e376c08,0x5141ab53 -.long 0x1e376c08,0x5141ab53 -.long 0x2748774c,0xdf8eeb99 -.long 0x2748774c,0xdf8eeb99 -.long 0x34b0bcb5,0xe19b48a8 -.long 0x34b0bcb5,0xe19b48a8 -.long 0x391c0cb3,0xc5c95a63 -.long 0x391c0cb3,0xc5c95a63 -.long 0x4ed8aa4a,0xe3418acb -.long 0x4ed8aa4a,0xe3418acb -.long 0x5b9cca4f,0x7763e373 -.long 0x5b9cca4f,0x7763e373 -.long 0x682e6ff3,0xd6b2b8a3 -.long 0x682e6ff3,0xd6b2b8a3 -.long 0x748f82ee,0x5defb2fc -.long 0x748f82ee,0x5defb2fc -.long 0x78a5636f,0x43172f60 -.long 0x78a5636f,0x43172f60 -.long 0x84c87814,0xa1f0ab72 -.long 0x84c87814,0xa1f0ab72 -.long 0x8cc70208,0x1a6439ec -.long 0x8cc70208,0x1a6439ec -.long 0x90befffa,0x23631e28 -.long 0x90befffa,0x23631e28 -.long 0xa4506ceb,0xde82bde9 -.long 0xa4506ceb,0xde82bde9 -.long 0xbef9a3f7,0xb2c67915 -.long 0xbef9a3f7,0xb2c67915 -.long 0xc67178f2,0xe372532b -.long 0xc67178f2,0xe372532b -.long 0xca273ece,0xea26619c -.long 0xca273ece,0xea26619c -.long 0xd186b8c7,0x21c0c207 -.long 0xd186b8c7,0x21c0c207 -.long 0xeada7dd6,0xcde0eb1e -.long 0xeada7dd6,0xcde0eb1e -.long 0xf57d4f7f,0xee6ed178 -.long 0xf57d4f7f,0xee6ed178 -.long 0x06f067aa,0x72176fba -.long 0x06f067aa,0x72176fba -.long 0x0a637dc5,0xa2c898a6 -.long 0x0a637dc5,0xa2c898a6 -.long 0x113f9804,0xbef90dae -.long 0x113f9804,0xbef90dae -.long 0x1b710b35,0x131c471b -.long 0x1b710b35,0x131c471b -.long 0x28db77f5,0x23047d84 -.long 0x28db77f5,0x23047d84 -.long 0x32caab7b,0x40c72493 -.long 0x32caab7b,0x40c72493 -.long 0x3c9ebe0a,0x15c9bebc -.long 0x3c9ebe0a,0x15c9bebc -.long 0x431d67c4,0x9c100d4c -.long 0x431d67c4,0x9c100d4c -.long 0x4cc5d4be,0xcb3e42b6 -.long 0x4cc5d4be,0xcb3e42b6 -.long 0x597f299c,0xfc657e2a -.long 0x597f299c,0xfc657e2a -.long 0x5fcb6fab,0x3ad6faec -.long 0x5fcb6fab,0x3ad6faec -.long 0x6c44198c,0x4a475817 -.long 0x6c44198c,0x4a475817 -.long 0,0 -.long 0,0 -.long 0x00010203,0x04050607 -.long 0x10111213,0x14151617 -.byte 83,72,65,53,49,50,32,102,111,114,32,80,111,119,101,114,73,83,65,32,50,46,48,55,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 2 diff --git a/sys/crypto/openssl/powerpc/vpaes-ppc.S b/sys/crypto/openssl/powerpc/vpaes-ppc.S deleted file mode 100644 index fd11edc7938..00000000000 --- a/sys/crypto/openssl/powerpc/vpaes-ppc.S +++ /dev/null @@ -1,1468 +0,0 @@ -/* Do not modify. This file is auto-generated from vpaes-ppc.pl. */ -.machine "any" - -.text - -.align 7 -_vpaes_consts: -.Lk_mc_forward: -.byte 0x01,0x02,0x03,0x00,0x05,0x06,0x07,0x04,0x09,0x0a,0x0b,0x08,0x0d,0x0e,0x0f,0x0c -.byte 0x05,0x06,0x07,0x04,0x09,0x0a,0x0b,0x08,0x0d,0x0e,0x0f,0x0c,0x01,0x02,0x03,0x00 -.byte 0x09,0x0a,0x0b,0x08,0x0d,0x0e,0x0f,0x0c,0x01,0x02,0x03,0x00,0x05,0x06,0x07,0x04 -.byte 0x0d,0x0e,0x0f,0x0c,0x01,0x02,0x03,0x00,0x05,0x06,0x07,0x04,0x09,0x0a,0x0b,0x08 -.Lk_mc_backward: -.byte 0x03,0x00,0x01,0x02,0x07,0x04,0x05,0x06,0x0b,0x08,0x09,0x0a,0x0f,0x0c,0x0d,0x0e -.byte 0x0f,0x0c,0x0d,0x0e,0x03,0x00,0x01,0x02,0x07,0x04,0x05,0x06,0x0b,0x08,0x09,0x0a -.byte 0x0b,0x08,0x09,0x0a,0x0f,0x0c,0x0d,0x0e,0x03,0x00,0x01,0x02,0x07,0x04,0x05,0x06 -.byte 0x07,0x04,0x05,0x06,0x0b,0x08,0x09,0x0a,0x0f,0x0c,0x0d,0x0e,0x03,0x00,0x01,0x02 -.Lk_sr: -.byte 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f -.byte 0x00,0x05,0x0a,0x0f,0x04,0x09,0x0e,0x03,0x08,0x0d,0x02,0x07,0x0c,0x01,0x06,0x0b -.byte 0x00,0x09,0x02,0x0b,0x04,0x0d,0x06,0x0f,0x08,0x01,0x0a,0x03,0x0c,0x05,0x0e,0x07 -.byte 0x00,0x0d,0x0a,0x07,0x04,0x01,0x0e,0x0b,0x08,0x05,0x02,0x0f,0x0c,0x09,0x06,0x03 - - - - -.Lk_inv: -.byte 0xf0,0x01,0x08,0x0d,0x0f,0x06,0x05,0x0e,0x02,0x0c,0x0b,0x0a,0x09,0x03,0x07,0x04 -.byte 0xf0,0x07,0x0b,0x0f,0x06,0x0a,0x04,0x01,0x09,0x08,0x05,0x02,0x0c,0x0e,0x0d,0x03 -.Lk_ipt: -.byte 0x00,0x70,0x2a,0x5a,0x98,0xe8,0xb2,0xc2,0x08,0x78,0x22,0x52,0x90,0xe0,0xba,0xca -.byte 0x00,0x4d,0x7c,0x31,0x7d,0x30,0x01,0x4c,0x81,0xcc,0xfd,0xb0,0xfc,0xb1,0x80,0xcd -.Lk_sbo: -.byte 0x00,0xc7,0xbd,0x6f,0x17,0x6d,0xd2,0xd0,0x78,0xa8,0x02,0xc5,0x7a,0xbf,0xaa,0x15 -.byte 0x00,0x6a,0xbb,0x5f,0xa5,0x74,0xe4,0xcf,0xfa,0x35,0x2b,0x41,0xd1,0x90,0x1e,0x8e -.Lk_sb1: -.byte 0x00,0x23,0xe2,0xfa,0x15,0xd4,0x18,0x36,0xef,0xd9,0x2e,0x0d,0xc1,0xcc,0xf7,0x3b -.byte 0x00,0x3e,0x50,0xcb,0x8f,0xe1,0x9b,0xb1,0x44,0xf5,0x2a,0x14,0x6e,0x7a,0xdf,0xa5 -.Lk_sb2: -.byte 0x00,0x29,0xe1,0x0a,0x40,0x88,0xeb,0x69,0x4a,0x23,0x82,0xab,0xc8,0x63,0xa1,0xc2 -.byte 0x00,0x24,0x71,0x0b,0xc6,0x93,0x7a,0xe2,0xcd,0x2f,0x98,0xbc,0x55,0xe9,0xb7,0x5e - - - - -.Lk_dipt: -.byte 0x00,0x5f,0x54,0x0b,0x04,0x5b,0x50,0x0f,0x1a,0x45,0x4e,0x11,0x1e,0x41,0x4a,0x15 -.byte 0x00,0x65,0x05,0x60,0xe6,0x83,0xe3,0x86,0x94,0xf1,0x91,0xf4,0x72,0x17,0x77,0x12 -.Lk_dsbo: -.byte 0x00,0x40,0xf9,0x7e,0x53,0xea,0x87,0x13,0x2d,0x3e,0x94,0xd4,0xb9,0x6d,0xaa,0xc7 -.byte 0x00,0x1d,0x44,0x93,0x0f,0x56,0xd7,0x12,0x9c,0x8e,0xc5,0xd8,0x59,0x81,0x4b,0xca -.Lk_dsb9: -.byte 0x00,0xd6,0x86,0x9a,0x53,0x03,0x1c,0x85,0xc9,0x4c,0x99,0x4f,0x50,0x1f,0xd5,0xca -.byte 0x00,0x49,0xd7,0xec,0x89,0x17,0x3b,0xc0,0x65,0xa5,0xfb,0xb2,0x9e,0x2c,0x5e,0x72 -.Lk_dsbd: -.byte 0x00,0xa2,0xb1,0xe6,0xdf,0xcc,0x57,0x7d,0x39,0x44,0x2a,0x88,0x13,0x9b,0x6e,0xf5 -.byte 0x00,0xcb,0xc6,0x24,0xf7,0xfa,0xe2,0x3c,0xd3,0xef,0xde,0x15,0x0d,0x18,0x31,0x29 -.Lk_dsbb: -.byte 0x00,0x42,0xb4,0x96,0x92,0x64,0x22,0xd0,0x04,0xd4,0xf2,0xb0,0xf6,0x46,0x26,0x60 -.byte 0x00,0x67,0x59,0xcd,0xa6,0x98,0x94,0xc1,0x6b,0xaa,0x55,0x32,0x3e,0x0c,0xff,0xf3 -.Lk_dsbe: -.byte 0x00,0xd0,0xd4,0x26,0x96,0x92,0xf2,0x46,0xb0,0xf6,0xb4,0x64,0x04,0x60,0x42,0x22 -.byte 0x00,0xc1,0xaa,0xff,0xcd,0xa6,0x55,0x0c,0x32,0x3e,0x59,0x98,0x6b,0xf3,0x67,0x94 - - - - -.Lk_dksd: -.byte 0x00,0x47,0xe4,0xa3,0x5d,0x1a,0xb9,0xfe,0xf9,0xbe,0x1d,0x5a,0xa4,0xe3,0x40,0x07 -.byte 0x00,0x83,0x36,0xb5,0xf4,0x77,0xc2,0x41,0x1e,0x9d,0x28,0xab,0xea,0x69,0xdc,0x5f -.Lk_dksb: -.byte 0x00,0xd5,0x50,0x85,0x1f,0xca,0x4f,0x9a,0x99,0x4c,0xc9,0x1c,0x86,0x53,0xd6,0x03 -.byte 0x00,0x4a,0xfc,0xb6,0xa7,0xed,0x5b,0x11,0xc8,0x82,0x34,0x7e,0x6f,0x25,0x93,0xd9 -.Lk_dkse: -.byte 0x00,0xd6,0xc9,0x1f,0xca,0x1c,0x03,0xd5,0x86,0x50,0x4f,0x99,0x4c,0x9a,0x85,0x53 -.byte 0xe8,0x7b,0xdc,0x4f,0x05,0x96,0x31,0xa2,0x87,0x14,0xb3,0x20,0x6a,0xf9,0x5e,0xcd -.Lk_dks9: -.byte 0x00,0xa7,0xd9,0x7e,0xc8,0x6f,0x11,0xb6,0xfc,0x5b,0x25,0x82,0x34,0x93,0xed,0x4a -.byte 0x00,0x33,0x14,0x27,0x62,0x51,0x76,0x45,0xce,0xfd,0xda,0xe9,0xac,0x9f,0xb8,0x8b - -.Lk_rcon: -.byte 0xb6,0xee,0x9d,0xaf,0xb9,0x91,0x83,0x1f,0x81,0x7d,0x7c,0x4d,0x08,0x98,0x2a,0x70 -.Lk_s63: -.byte 0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b - -.Lk_opt: -.byte 0x00,0x60,0xb6,0xd6,0x29,0x49,0x9f,0xff,0x08,0x68,0xbe,0xde,0x21,0x41,0x97,0xf7 -.byte 0x00,0xec,0xbc,0x50,0x51,0xbd,0xed,0x01,0xe0,0x0c,0x5c,0xb0,0xb1,0x5d,0x0d,0xe1 -.Lk_deskew: -.byte 0x00,0xe3,0xa4,0x47,0x40,0xa3,0xe4,0x07,0x1a,0xf9,0xbe,0x5d,0x5a,0xb9,0xfe,0x1d -.byte 0x00,0x69,0xea,0x83,0xdc,0xb5,0x36,0x5f,0x77,0x1e,0x9d,0xf4,0xab,0xc2,0x41,0x28 -.align 5 -.Lconsts: - mflr 0 - bcl 20,31,$+4 - mflr 12 - addi 12,12,-0x308 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.byte 86,101,99,116,111,114,32,80,101,114,109,117,116,97,116,105,111,110,32,65,69,83,32,102,111,114,32,65,108,116,105,86,101,99,44,77,105,107,101,32,72,97,109,98,117,114,103,32,40,83,116,97,110,102,111,114,100,32,85,110,105,118,101,114,115,105,116,121,41,0 -.align 2 -.align 6 - - - - - - -.align 4 -_vpaes_encrypt_preheat: - mflr 8 - bl .Lconsts - mtlr 8 - li 11, 0xc0 - li 10, 0xd0 - li 9, 0xe0 - li 8, 0xf0 - vxor 7, 7, 7 - vspltisb 8,4 - vspltisb 9,0x0f - lvx 10, 12, 11 - li 11, 0x100 - lvx 11, 12, 10 - li 10, 0x110 - lvx 12, 12, 9 - li 9, 0x120 - lvx 13, 12, 8 - li 8, 0x130 - lvx 14, 12, 11 - li 11, 0x140 - lvx 15, 12, 10 - li 10, 0x150 - lvx 16, 12, 9 - lvx 17, 12, 8 - lvx 18, 12, 11 - lvx 19, 12, 10 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - - - - - - - - - - -.align 5 -_vpaes_encrypt_core: - lwz 8, 240(5) - li 9, 16 - lvx 5, 0, 5 - li 11, 0x10 - lvx 6, 9, 5 - addi 9, 9, 16 - vperm 5, 5, 6, 31 - addi 10, 11, 0x40 - vsrb 1, 0, 8 - vperm 0, 12, 12, 0 - vperm 1, 13, 13, 1 - vxor 0, 0, 5 - vxor 0, 0, 1 - mtctr 8 - b .Lenc_entry - -.align 4 -.Lenc_loop: - - vperm 4, 17, 7, 2 - lvx 1, 12, 11 - addi 11, 11, 16 - vperm 0, 16, 7, 3 - vxor 4, 4, 5 - andi. 11, 11, 0x30 - vperm 5, 19, 7, 2 - vxor 0, 0, 4 - vperm 2, 18, 7, 3 - lvx 4, 12, 10 - addi 10, 11, 0x40 - vperm 3, 0, 7, 1 - vxor 2, 2, 5 - vperm 0, 0, 7, 4 - vxor 3, 3, 2 - vperm 4, 3, 7, 1 - vxor 0, 0, 3 - vxor 0, 0, 4 - -.Lenc_entry: - - vsrb 1, 0, 8 - vperm 5, 11, 11, 0 - vxor 0, 0, 1 - vperm 3, 10, 10, 1 - vperm 4, 10, 10, 0 - vand 0, 0, 9 - vxor 3, 3, 5 - vxor 4, 4, 5 - vperm 2, 10, 7, 3 - vor 5,6,6 - lvx 6, 9, 5 - vperm 3, 10, 7, 4 - addi 9, 9, 16 - vxor 2, 2, 0 - vperm 5, 5, 6, 31 - vxor 3, 3, 1 - bdnz .Lenc_loop - - - addi 10, 11, 0x80 - - - vperm 4, 14, 7, 2 - lvx 1, 12, 10 - vperm 0, 15, 7, 3 - vxor 4, 4, 5 - vxor 0, 0, 4 - vperm 0, 0, 7, 1 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.globl vpaes_encrypt -.type vpaes_encrypt,@function -.align 5 -vpaes_encrypt: - stwu 1,-232(1) - li 10,39 - li 11,55 - mflr 6 - mfspr 7,256 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 7,228(1) - li 0, -1 - stw 6,236(1) - mtspr 256,0 - - bl _vpaes_encrypt_preheat - - lvsl 27, 0, 3 - lvx 0, 0, 3 - addi 3, 3, 15 - lvsr 29, 0, 4 - lvsl 31, 0, 5 - lvx 26, 0, 3 - vperm 0, 0, 26, 27 - - bl _vpaes_encrypt_core - - andi. 8, 4, 15 - li 9, 16 - beq .Lenc_out_aligned - - vperm 0, 0, 0, 29 - mtctr 9 -.Lenc_out_unaligned: - stvebx 0, 0, 4 - addi 4, 4, 1 - bdnz .Lenc_out_unaligned - b .Lenc_done - -.align 4 -.Lenc_out_aligned: - stvx 0, 0, 4 -.Lenc_done: - - li 10,39 - li 11,55 - mtlr 6 - mtspr 256,7 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - addi 1,1,232 - blr -.long 0 -.byte 0,12,0x04,1,0x80,0,3,0 -.long 0 -.size vpaes_encrypt,.-vpaes_encrypt - -.align 4 -_vpaes_decrypt_preheat: - mflr 8 - bl .Lconsts - mtlr 8 - li 11, 0xc0 - li 10, 0xd0 - li 9, 0x160 - li 8, 0x170 - vxor 7, 7, 7 - vspltisb 8,4 - vspltisb 9,0x0f - lvx 10, 12, 11 - li 11, 0x180 - lvx 11, 12, 10 - li 10, 0x190 - lvx 12, 12, 9 - li 9, 0x1a0 - lvx 13, 12, 8 - li 8, 0x1b0 - lvx 14, 12, 11 - li 11, 0x1c0 - lvx 15, 12, 10 - li 10, 0x1d0 - lvx 16, 12, 9 - li 9, 0x1e0 - lvx 17, 12, 8 - li 8, 0x1f0 - lvx 18, 12, 11 - li 11, 0x200 - lvx 19, 12, 10 - li 10, 0x210 - lvx 20, 12, 9 - lvx 21, 12, 8 - lvx 22, 12, 11 - lvx 23, 12, 10 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - -.align 4 -_vpaes_decrypt_core: - lwz 8, 240(5) - li 9, 16 - lvx 5, 0, 5 - li 11, 0x30 - lvx 6, 9, 5 - addi 9, 9, 16 - vperm 5, 5, 6, 31 - vsrb 1, 0, 8 - vperm 0, 12, 12, 0 - vperm 1, 13, 13, 1 - vxor 0, 0, 5 - vxor 0, 0, 1 - mtctr 8 - b .Ldec_entry - -.align 4 -.Ldec_loop: - - - - lvx 0, 12, 11 - - - vperm 4, 16, 7, 2 - subi 11, 11, 16 - vperm 1, 17, 7, 3 - andi. 11, 11, 0x30 - vxor 5, 5, 4 - - vxor 5, 5, 1 - - - vperm 4, 18, 7, 2 - vperm 5, 5, 7, 0 - vperm 1, 19, 7, 3 - vxor 5, 5, 4 - - vxor 5, 5, 1 - - - vperm 4, 20, 7, 2 - vperm 5, 5, 7, 0 - vperm 1, 21, 7, 3 - vxor 5, 5, 4 - - vxor 5, 5, 1 - - - vperm 4, 22, 7, 2 - vperm 5, 5, 7, 0 - vperm 1, 23, 7, 3 - vxor 0, 5, 4 - vxor 0, 0, 1 - -.Ldec_entry: - - vsrb 1, 0, 8 - vperm 2, 11, 11, 0 - vxor 0, 0, 1 - vperm 3, 10, 10, 1 - vperm 4, 10, 10, 0 - vand 0, 0, 9 - vxor 3, 3, 2 - vxor 4, 4, 2 - vperm 2, 10, 7, 3 - vor 5,6,6 - lvx 6, 9, 5 - vperm 3, 10, 7, 4 - addi 9, 9, 16 - vxor 2, 2, 0 - vperm 5, 5, 6, 31 - vxor 3, 3, 1 - bdnz .Ldec_loop - - - addi 10, 11, 0x80 - - vperm 4, 14, 7, 2 - - lvx 2, 12, 10 - vperm 1, 15, 7, 3 - vxor 4, 4, 5 - vxor 0, 1, 4 - vperm 0, 0, 7, 2 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.globl vpaes_decrypt -.type vpaes_decrypt,@function -.align 5 -vpaes_decrypt: - stwu 1,-232(1) - li 10,39 - li 11,55 - mflr 6 - mfspr 7,256 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 7,228(1) - li 0, -1 - stw 6,236(1) - mtspr 256,0 - - bl _vpaes_decrypt_preheat - - lvsl 27, 0, 3 - lvx 0, 0, 3 - addi 3, 3, 15 - lvsr 29, 0, 4 - lvsl 31, 0, 5 - lvx 26, 0, 3 - vperm 0, 0, 26, 27 - - bl _vpaes_decrypt_core - - andi. 8, 4, 15 - li 9, 16 - beq .Ldec_out_aligned - - vperm 0, 0, 0, 29 - mtctr 9 -.Ldec_out_unaligned: - stvebx 0, 0, 4 - addi 4, 4, 1 - bdnz .Ldec_out_unaligned - b .Ldec_done - -.align 4 -.Ldec_out_aligned: - stvx 0, 0, 4 -.Ldec_done: - - li 10,39 - li 11,55 - mtlr 6 - mtspr 256,7 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - addi 1,1,232 - blr -.long 0 -.byte 0,12,0x04,1,0x80,0,3,0 -.long 0 -.size vpaes_decrypt,.-vpaes_decrypt - -.globl vpaes_cbc_encrypt -.type vpaes_cbc_encrypt,@function -.align 5 -vpaes_cbc_encrypt: - cmplwi 5,16 - .long 0x4dc00020 - - stwu 1,-240(1) - mflr 0 - li 10,39 - li 11,55 - mfspr 12,256 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 12,228(1) - stw 30,232(1) - stw 31,236(1) - li 9, -16 - stw 0, 244(1) - - and 30, 5, 9 - andi. 9, 4, 15 - mr 5, 6 - mr 31, 7 - li 6, -1 - mcrf 1, 0 - mr 7, 12 - mtspr 256,6 - - lvx 24, 0, 31 - li 9, 15 - lvsl 27, 0, 31 - lvx 25, 9, 31 - vperm 24, 24, 25, 27 - - cmpwi 8, 0 - neg 8, 3 - vxor 7, 7, 7 - lvsl 31, 0, 5 - lvsr 29, 0, 4 - lvsr 27, 0, 8 - vnor 30, 7, 7 - lvx 26, 0, 3 - vperm 30, 7, 30, 29 - addi 3, 3, 15 - - beq .Lcbc_decrypt - - bl _vpaes_encrypt_preheat - li 0, 16 - - beq 1, .Lcbc_enc_loop - - vor 0,26,26 - lvx 26, 0, 3 - addi 3, 3, 16 - vperm 0, 0, 26, 27 - vxor 0, 0, 24 - - bl _vpaes_encrypt_core - - andi. 8, 4, 15 - vor 24,0,0 - sub 9, 4, 8 - vperm 28, 0, 0, 29 - -.Lcbc_enc_head: - stvebx 28, 8, 9 - cmpwi 8, 15 - addi 8, 8, 1 - bne .Lcbc_enc_head - - sub. 30, 30, 0 - addi 4, 4, 16 - beq .Lcbc_unaligned_done - -.Lcbc_enc_loop: - vor 0,26,26 - lvx 26, 0, 3 - addi 3, 3, 16 - vperm 0, 0, 26, 27 - vxor 0, 0, 24 - - bl _vpaes_encrypt_core - - vor 24,0,0 - sub. 30, 30, 0 - vperm 0, 0, 0, 29 - vsel 1, 28, 0, 30 - vor 28,0,0 - stvx 1, 0, 4 - addi 4, 4, 16 - bne .Lcbc_enc_loop - - b .Lcbc_done - -.align 5 -.Lcbc_decrypt: - bl _vpaes_decrypt_preheat - li 0, 16 - - beq 1, .Lcbc_dec_loop - - vor 0,26,26 - lvx 26, 0, 3 - addi 3, 3, 16 - vperm 0, 0, 26, 27 - vor 25,0,0 - - bl _vpaes_decrypt_core - - andi. 8, 4, 15 - vxor 0, 0, 24 - vor 24,25,25 - sub 9, 4, 8 - vperm 28, 0, 0, 29 - -.Lcbc_dec_head: - stvebx 28, 8, 9 - cmpwi 8, 15 - addi 8, 8, 1 - bne .Lcbc_dec_head - - sub. 30, 30, 0 - addi 4, 4, 16 - beq .Lcbc_unaligned_done - -.Lcbc_dec_loop: - vor 0,26,26 - lvx 26, 0, 3 - addi 3, 3, 16 - vperm 0, 0, 26, 27 - vor 25,0,0 - - bl _vpaes_decrypt_core - - vxor 0, 0, 24 - vor 24,25,25 - sub. 30, 30, 0 - vperm 0, 0, 0, 29 - vsel 1, 28, 0, 30 - vor 28,0,0 - stvx 1, 0, 4 - addi 4, 4, 16 - bne .Lcbc_dec_loop - -.Lcbc_done: - beq 1, .Lcbc_write_iv - -.Lcbc_unaligned_done: - andi. 8, 4, 15 - sub 4, 4, 8 - li 9, 0 -.Lcbc_tail: - stvebx 28, 9, 4 - addi 9, 9, 1 - cmpw 9, 8 - bne .Lcbc_tail - -.Lcbc_write_iv: - neg 8, 31 - li 10, 4 - lvsl 29, 0, 8 - li 11, 8 - li 12, 12 - vperm 24, 24, 24, 29 - stvewx 24, 0, 31 - stvewx 24, 10, 31 - stvewx 24, 11, 31 - stvewx 24, 12, 31 - - mtspr 256,7 - li 10,39 - li 11,55 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 -.Lcbc_abort: - lwz 0, 244(1) - lwz 30,232(1) - lwz 31,236(1) - mtlr 0 - addi 1,1,240 - blr -.long 0 -.byte 0,12,0x04,1,0x80,2,6,0 -.long 0 -.size vpaes_cbc_encrypt,.-vpaes_cbc_encrypt - - - - - -.align 4 -_vpaes_key_preheat: - mflr 8 - bl .Lconsts - mtlr 8 - li 11, 0xc0 - li 10, 0xd0 - li 9, 0xe0 - li 8, 0xf0 - - vspltisb 8,4 - vxor 9,9,9 - lvx 10, 12, 11 - li 11, 0x120 - lvx 11, 12, 10 - li 10, 0x130 - lvx 12, 12, 9 - li 9, 0x220 - lvx 13, 12, 8 - li 8, 0x230 - - lvx 14, 12, 11 - li 11, 0x240 - lvx 15, 12, 10 - li 10, 0x250 - - lvx 16, 12, 9 - li 9, 0x260 - lvx 17, 12, 8 - li 8, 0x270 - lvx 18, 12, 11 - li 11, 0x280 - lvx 19, 12, 10 - li 10, 0x290 - lvx 20, 12, 9 - li 9, 0x2a0 - lvx 21, 12, 8 - li 8, 0x2b0 - lvx 22, 12, 11 - lvx 23, 12, 10 - - lvx 24, 12, 9 - lvx 25, 0, 12 - lvx 26, 12, 8 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.align 4 -_vpaes_schedule_core: - mflr 7 - - bl _vpaes_key_preheat - - - neg 8, 3 - lvx 0, 0, 3 - addi 3, 3, 15 - lvsr 27, 0, 8 - lvx 6, 0, 3 - addi 3, 3, 8 - vperm 0, 0, 6, 27 - - - vor 3,0,0 - bl _vpaes_schedule_transform - vor 7,0,0 - - bne 1, .Lschedule_am_decrypting - - - li 8, 0x30 - li 9, 4 - li 10, 8 - li 11, 12 - - lvsr 29, 0, 5 - vnor 30, 9, 9 - vperm 30, 9, 30, 29 - - - vperm 28, 0, 0, 29 - stvewx 28, 0, 5 - stvewx 28, 9, 5 - stvewx 28, 10, 5 - addi 10, 12, 0x80 - stvewx 28, 11, 5 - b .Lschedule_go - -.Lschedule_am_decrypting: - srwi 8, 4, 1 - andi. 8, 8, 32 - xori 8, 8, 32 - addi 10, 12, 0x80 - - lvx 1, 8, 10 - li 9, 4 - li 10, 8 - li 11, 12 - vperm 4, 3, 3, 1 - - neg 0, 5 - lvsl 29, 0, 0 - vnor 30, 9, 9 - vperm 30, 30, 9, 29 - - - vperm 28, 4, 4, 29 - stvewx 28, 0, 5 - stvewx 28, 9, 5 - stvewx 28, 10, 5 - addi 10, 12, 0x80 - stvewx 28, 11, 5 - addi 5, 5, 15 - xori 8, 8, 0x30 - -.Lschedule_go: - cmplwi 4, 192 - bgt .Lschedule_256 - beq .Lschedule_192 - - - - - - - - - - -.Lschedule_128: - li 0, 10 - mtctr 0 - -.Loop_schedule_128: - bl _vpaes_schedule_round - bdz .Lschedule_mangle_last - bl _vpaes_schedule_mangle - b .Loop_schedule_128 - - - - - - - - - - - - - - - - -.align 4 -.Lschedule_192: - li 0, 4 - lvx 0, 0, 3 - vperm 0, 6, 0, 27 - vsldoi 0, 3, 0, 8 - bl _vpaes_schedule_transform - vsldoi 6, 0, 9, 8 - vsldoi 6, 9, 6, 8 - mtctr 0 - -.Loop_schedule_192: - bl _vpaes_schedule_round - vsldoi 0, 6, 0, 8 - bl _vpaes_schedule_mangle - bl _vpaes_schedule_192_smear - bl _vpaes_schedule_mangle - bl _vpaes_schedule_round - bdz .Lschedule_mangle_last - bl _vpaes_schedule_mangle - bl _vpaes_schedule_192_smear - b .Loop_schedule_192 - - - - - - - - - - - -.align 4 -.Lschedule_256: - li 0, 7 - addi 3, 3, 8 - lvx 0, 0, 3 - vperm 0, 6, 0, 27 - bl _vpaes_schedule_transform - mtctr 0 - -.Loop_schedule_256: - bl _vpaes_schedule_mangle - vor 6,0,0 - - - bl _vpaes_schedule_round - bdz .Lschedule_mangle_last - bl _vpaes_schedule_mangle - - - vspltw 0, 0, 3 - vor 5,7,7 - vor 7,6,6 - bl _vpaes_schedule_low_round - vor 7,5,5 - - b .Loop_schedule_256 - - - - - - - - - - -.align 4 -.Lschedule_mangle_last: - - li 11, 0x2e0 - li 9, 0x2f0 - bne 1, .Lschedule_mangle_last_dec - - - lvx 1, 8, 10 - li 11, 0x2c0 - li 9, 0x2d0 - vperm 0, 0, 0, 1 - - lvx 12, 11, 12 - lvx 13, 9, 12 - addi 5, 5, 16 - vxor 0, 0, 26 - bl _vpaes_schedule_transform - - - vperm 0, 0, 0, 29 - li 10, 4 - vsel 2, 28, 0, 30 - li 11, 8 - stvx 2, 0, 5 - li 12, 12 - stvewx 0, 0, 5 - stvewx 0, 10, 5 - stvewx 0, 11, 5 - stvewx 0, 12, 5 - b .Lschedule_mangle_done - -.align 4 -.Lschedule_mangle_last_dec: - lvx 12, 11, 12 - lvx 13, 9, 12 - addi 5, 5, -16 - vxor 0, 0, 26 - bl _vpaes_schedule_transform - - - addi 9, 5, -15 - vperm 0, 0, 0, 29 - li 10, 4 - vsel 2, 28, 0, 30 - li 11, 8 - stvx 2, 0, 5 - li 12, 12 - stvewx 0, 0, 9 - stvewx 0, 10, 9 - stvewx 0, 11, 9 - stvewx 0, 12, 9 - - -.Lschedule_mangle_done: - mtlr 7 - - vxor 0, 0, 0 - vxor 1, 1, 1 - vxor 2, 2, 2 - vxor 3, 3, 3 - vxor 4, 4, 4 - vxor 5, 5, 5 - vxor 6, 6, 6 - vxor 7, 7, 7 - - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - - - - - - - - - - -.align 4 -_vpaes_schedule_192_smear: - vspltw 0, 7, 3 - vsldoi 1, 9, 6, 12 - vsldoi 0, 7, 0, 8 - vxor 6, 6, 1 - vxor 6, 6, 0 - vor 0,6,6 - vsldoi 6, 6, 9, 8 - vsldoi 6, 9, 6, 8 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - - - - - - - - - - - - - - -.align 4 -_vpaes_schedule_round: - - - vsldoi 1, 24, 9, 15 - vsldoi 24, 24, 24, 15 - vxor 7, 7, 1 - - - vspltw 0, 0, 3 - vsldoi 0, 0, 0, 1 - - - - -_vpaes_schedule_low_round: - - vsldoi 1, 9, 7, 12 - vxor 7, 7, 1 - vspltisb 1, 0x0f - vsldoi 4, 9, 7, 8 - - - vand 1, 1, 0 - vsrb 0, 0, 8 - vxor 7, 7, 4 - vperm 2, 11, 9, 1 - vxor 1, 1, 0 - vperm 3, 10, 9, 0 - vxor 3, 3, 2 - vperm 4, 10, 9, 1 - vxor 7, 7, 26 - vperm 3, 10, 9, 3 - vxor 4, 4, 2 - vperm 2, 10, 9, 4 - vxor 3, 3, 1 - vxor 2, 2, 0 - vperm 4, 15, 9, 3 - vperm 1, 14, 9, 2 - vxor 1, 1, 4 - - - vxor 0, 1, 7 - vxor 7, 1, 7 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - - - - - -.align 4 -_vpaes_schedule_transform: - - vsrb 2, 0, 8 - - vperm 0, 12, 12, 0 - - vperm 2, 13, 13, 2 - vxor 0, 0, 2 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - - - - - - - - - - - - - - - - - - - -.align 4 -_vpaes_schedule_mangle: - - - bne 1, .Lschedule_mangle_dec - - - vxor 4, 0, 26 - addi 5, 5, 16 - vperm 4, 4, 4, 25 - vperm 1, 4, 4, 25 - vperm 3, 1, 1, 25 - vxor 4, 4, 1 - lvx 1, 8, 10 - vxor 3, 3, 4 - - vperm 3, 3, 3, 1 - addi 8, 8, -16 - andi. 8, 8, 0x30 - - - vperm 1, 3, 3, 29 - vsel 2, 28, 1, 30 - vor 28,1,1 - stvx 2, 0, 5 - blr - -.align 4 -.Lschedule_mangle_dec: - - - vsrb 1, 0, 8 - - - - vperm 2, 16, 16, 0 - - vperm 3, 17, 17, 1 - vxor 3, 3, 2 - vperm 3, 3, 9, 25 - - - vperm 2, 18, 18, 0 - vxor 2, 2, 3 - - vperm 3, 19, 19, 1 - vxor 3, 3, 2 - vperm 3, 3, 9, 25 - - - vperm 2, 20, 20, 0 - vxor 2, 2, 3 - - vperm 3, 21, 21, 1 - vxor 3, 3, 2 - - - vperm 2, 22, 22, 0 - vperm 3, 3, 9, 25 - - vperm 4, 23, 23, 1 - lvx 1, 8, 10 - vxor 2, 2, 3 - vxor 3, 4, 2 - - addi 5, 5, -16 - - vperm 3, 3, 3, 1 - addi 8, 8, -16 - andi. 8, 8, 0x30 - - - vperm 1, 3, 3, 29 - vsel 2, 28, 1, 30 - vor 28,1,1 - stvx 2, 0, 5 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.globl vpaes_set_encrypt_key -.type vpaes_set_encrypt_key,@function -.align 5 -vpaes_set_encrypt_key: - stwu 1,-232(1) - li 10,39 - li 11,55 - mflr 0 - mfspr 6,256 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 6,228(1) - li 7, -1 - stw 0, 236(1) - mtspr 256,7 - - srwi 9, 4, 5 - addi 9, 9, 6 - stw 9, 240(5) - - .long 0x7c842040 - li 8, 0x30 - bl _vpaes_schedule_core - - lwz 0, 236(1) - li 10,39 - li 11,55 - mtspr 256,6 - mtlr 0 - xor 3, 3, 3 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - addi 1,1,232 - blr -.long 0 -.byte 0,12,0x04,1,0x80,0,3,0 -.long 0 -.size vpaes_set_encrypt_key,.-vpaes_set_encrypt_key - -.globl vpaes_set_decrypt_key -.type vpaes_set_decrypt_key,@function -.align 4 -vpaes_set_decrypt_key: - stwu 1,-232(1) - li 10,39 - li 11,55 - mflr 0 - mfspr 6,256 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 6,228(1) - li 7, -1 - stw 0, 236(1) - mtspr 256,7 - - srwi 9, 4, 5 - addi 9, 9, 6 - stw 9, 240(5) - - slwi 9, 9, 4 - add 5, 5, 9 - - cmplwi 1, 4, 0 - srwi 8, 4, 1 - andi. 8, 8, 32 - xori 8, 8, 32 - bl _vpaes_schedule_core - - lwz 0, 236(1) - li 10,39 - li 11,55 - mtspr 256,6 - mtlr 0 - xor 3, 3, 3 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - addi 1,1,232 - blr -.long 0 -.byte 0,12,0x04,1,0x80,0,3,0 -.long 0 -.size vpaes_set_decrypt_key,.-vpaes_set_decrypt_key diff --git a/sys/crypto/openssl/powerpc64/aes-ppc.S b/sys/crypto/openssl/powerpc64/aes-ppc.S deleted file mode 100644 index 4b1074819d8..00000000000 --- a/sys/crypto/openssl/powerpc64/aes-ppc.S +++ /dev/null @@ -1,1533 +0,0 @@ -/* Do not modify. This file is auto-generated from aes-ppc.pl. */ -.machine "any" -.abiversion 2 -.text - -.align 7 -.LAES_Te: - mflr 0 - bcl 20,31,$+4 - mflr 3 - addi 3,3,120 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.LAES_Td: - mflr 0 - bcl 20,31,$+4 - mflr 3 - addi 3,3,2360 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.long 0xc66363a5,0xc66363a5 -.long 0xf87c7c84,0xf87c7c84 -.long 0xee777799,0xee777799 -.long 0xf67b7b8d,0xf67b7b8d -.long 0xfff2f20d,0xfff2f20d -.long 0xd66b6bbd,0xd66b6bbd -.long 0xde6f6fb1,0xde6f6fb1 -.long 0x91c5c554,0x91c5c554 -.long 0x60303050,0x60303050 -.long 0x02010103,0x02010103 -.long 0xce6767a9,0xce6767a9 -.long 0x562b2b7d,0x562b2b7d -.long 0xe7fefe19,0xe7fefe19 -.long 0xb5d7d762,0xb5d7d762 -.long 0x4dababe6,0x4dababe6 -.long 0xec76769a,0xec76769a -.long 0x8fcaca45,0x8fcaca45 -.long 0x1f82829d,0x1f82829d -.long 0x89c9c940,0x89c9c940 -.long 0xfa7d7d87,0xfa7d7d87 -.long 0xeffafa15,0xeffafa15 -.long 0xb25959eb,0xb25959eb -.long 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0xcd267809,0xcd267809 -.long 0x6e5918f4,0x6e5918f4 -.long 0xec9ab701,0xec9ab701 -.long 0x834f9aa8,0x834f9aa8 -.long 0xe6956e65,0xe6956e65 -.long 0xaaffe67e,0xaaffe67e -.long 0x21bccf08,0x21bccf08 -.long 0xef15e8e6,0xef15e8e6 -.long 0xbae79bd9,0xbae79bd9 -.long 0x4a6f36ce,0x4a6f36ce -.long 0xea9f09d4,0xea9f09d4 -.long 0x29b07cd6,0x29b07cd6 -.long 0x31a4b2af,0x31a4b2af -.long 0x2a3f2331,0x2a3f2331 -.long 0xc6a59430,0xc6a59430 -.long 0x35a266c0,0x35a266c0 -.long 0x744ebc37,0x744ebc37 -.long 0xfc82caa6,0xfc82caa6 -.long 0xe090d0b0,0xe090d0b0 -.long 0x33a7d815,0x33a7d815 -.long 0xf104984a,0xf104984a -.long 0x41ecdaf7,0x41ecdaf7 -.long 0x7fcd500e,0x7fcd500e -.long 0x1791f62f,0x1791f62f -.long 0x764dd68d,0x764dd68d -.long 0x43efb04d,0x43efb04d -.long 0xccaa4d54,0xccaa4d54 -.long 0xe49604df,0xe49604df -.long 0x9ed1b5e3,0x9ed1b5e3 -.long 0x4c6a881b,0x4c6a881b -.long 0xc12c1fb8,0xc12c1fb8 -.long 0x4665517f,0x4665517f -.long 0x9d5eea04,0x9d5eea04 -.long 0x018c355d,0x018c355d -.long 0xfa877473,0xfa877473 -.long 0xfb0b412e,0xfb0b412e -.long 0xb3671d5a,0xb3671d5a -.long 0x92dbd252,0x92dbd252 -.long 0xe9105633,0xe9105633 -.long 0x6dd64713,0x6dd64713 -.long 0x9ad7618c,0x9ad7618c -.long 0x37a10c7a,0x37a10c7a -.long 0x59f8148e,0x59f8148e -.long 0xeb133c89,0xeb133c89 -.long 0xcea927ee,0xcea927ee -.long 0xb761c935,0xb761c935 -.long 0xe11ce5ed,0xe11ce5ed -.long 0x7a47b13c,0x7a47b13c -.long 0x9cd2df59,0x9cd2df59 -.long 0x55f2733f,0x55f2733f -.long 0x1814ce79,0x1814ce79 -.long 0x73c737bf,0x73c737bf -.long 0x53f7cdea,0x53f7cdea -.long 0x5ffdaa5b,0x5ffdaa5b -.long 0xdf3d6f14,0xdf3d6f14 -.long 0x7844db86,0x7844db86 -.long 0xcaaff381,0xcaaff381 -.long 0xb968c43e,0xb968c43e -.long 0x3824342c,0x3824342c -.long 0xc2a3405f,0xc2a3405f -.long 0x161dc372,0x161dc372 -.long 0xbce2250c,0xbce2250c -.long 0x283c498b,0x283c498b -.long 0xff0d9541,0xff0d9541 -.long 0x39a80171,0x39a80171 -.long 0x080cb3de,0x080cb3de -.long 0xd8b4e49c,0xd8b4e49c -.long 0x6456c190,0x6456c190 -.long 0x7bcb8461,0x7bcb8461 -.long 0xd532b670,0xd532b670 -.long 0x486c5c74,0x486c5c74 -.long 0xd0b85742,0xd0b85742 -.byte 0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38 -.byte 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb -.byte 0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87 -.byte 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb -.byte 0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d -.byte 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e -.byte 0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2 -.byte 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25 -.byte 0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16 -.byte 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92 -.byte 0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda -.byte 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84 -.byte 0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a -.byte 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06 -.byte 0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02 -.byte 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b -.byte 0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea -.byte 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73 -.byte 0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85 -.byte 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e -.byte 0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89 -.byte 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b -.byte 0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20 -.byte 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4 -.byte 0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31 -.byte 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f -.byte 0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d -.byte 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef -.byte 0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0 -.byte 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61 -.byte 0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26 -.byte 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d - - -.globl AES_encrypt -.type AES_encrypt,@function -.align 7 -AES_encrypt: -.localentry AES_encrypt,0 - - stdu 1,-256(1) - mflr 0 - - std 4,104(1) - std 14,112(1) - std 15,120(1) - std 16,128(1) - std 17,136(1) - std 18,144(1) - std 19,152(1) - std 20,160(1) - std 21,168(1) - std 22,176(1) - std 23,184(1) - std 24,192(1) - std 25,200(1) - std 26,208(1) - std 27,216(1) - std 28,224(1) - std 29,232(1) - std 30,240(1) - std 31,248(1) - std 0,272(1) - - andi. 12,3,3 - andi. 0,4,3 - or. 12,12,0 - bne .Lenc_unaligned - -.Lenc_unaligned_ok: - lwz 8,0(3) - lwz 9,4(3) - lwz 10,8(3) - lwz 11,12(3) - bl .LAES_Te - bl .Lppc_AES_encrypt_compact - ld 4,104(1) - stw 8,0(4) - stw 9,4(4) - stw 10,8(4) - stw 11,12(4) - b .Lenc_done - -.Lenc_unaligned: - subfic 12,3,4096 - subfic 0,4,4096 - andi. 12,12,4096-16 - beq .Lenc_xpage - andi. 0,0,4096-16 - bne .Lenc_unaligned_ok - -.Lenc_xpage: - lbz 16,0(3) - lbz 17,1(3) - lbz 18,2(3) - lbz 8,3(3) - lbz 20,4(3) - lbz 21,5(3) - lbz 22,6(3) - lbz 9,7(3) - lbz 24,8(3) - lbz 25,9(3) - lbz 26,10(3) - insrwi 8,16,8,0 - lbz 10,11(3) - insrwi 9,20,8,0 - lbz 28,12(3) - insrwi 8,17,8,8 - lbz 29,13(3) - insrwi 9,21,8,8 - lbz 30,14(3) - insrwi 8,18,8,16 - lbz 11,15(3) - insrwi 9,22,8,16 - insrwi 10,24,8,0 - insrwi 11,28,8,0 - insrwi 10,25,8,8 - insrwi 11,29,8,8 - insrwi 10,26,8,16 - insrwi 11,30,8,16 - - bl .LAES_Te - bl .Lppc_AES_encrypt_compact - ld 4,104(1) - - extrwi 16,8,8,0 - extrwi 17,8,8,8 - stb 16,0(4) - extrwi 18,8,8,16 - stb 17,1(4) - stb 18,2(4) - extrwi 20,9,8,0 - stb 8,3(4) - extrwi 21,9,8,8 - stb 20,4(4) - extrwi 22,9,8,16 - stb 21,5(4) - stb 22,6(4) - extrwi 24,10,8,0 - stb 9,7(4) - extrwi 25,10,8,8 - stb 24,8(4) - extrwi 26,10,8,16 - stb 25,9(4) - stb 26,10(4) - extrwi 28,11,8,0 - stb 10,11(4) - extrwi 29,11,8,8 - stb 28,12(4) - extrwi 30,11,8,16 - stb 29,13(4) - stb 30,14(4) - stb 11,15(4) - -.Lenc_done: - ld 0,272(1) - ld 14,112(1) - ld 15,120(1) - ld 16,128(1) - ld 17,136(1) - ld 18,144(1) - ld 19,152(1) - ld 20,160(1) - ld 21,168(1) - ld 22,176(1) - ld 23,184(1) - ld 24,192(1) - ld 25,200(1) - ld 26,208(1) - ld 27,216(1) - ld 28,224(1) - ld 29,232(1) - ld 30,240(1) - ld 31,248(1) - mtlr 0 - addi 1,1,256 - blr -.long 0 -.byte 0,12,4,1,0x80,18,3,0 -.long 0 - -.align 5 -.Lppc_AES_encrypt: - lwz 16,240(5) - addi 6,3,3 - lwz 12,0(5) - addi 7,3,2 - lwz 0,4(5) - addi 4,3,1 - lwz 14,8(5) - addi 16,16,-1 - lwz 15,12(5) - addi 5,5,16 - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - mtctr 16 -.align 4 -.Lenc_loop: - rlwinm 16,8,11,21,28 - rlwinm 17,9,11,21,28 - rlwinm 18,10,11,21,28 - rlwinm 19,11,11,21,28 - lwz 12,0(5) - rlwinm 20,9,19,21,28 - lwz 0,4(5) - rlwinm 21,10,19,21,28 - lwz 14,8(5) - rlwinm 22,11,19,21,28 - lwz 15,12(5) - rlwinm 23,8,19,21,28 - lwzx 16,3,16 - rlwinm 24,10,27,21,28 - lwzx 17,3,17 - rlwinm 25,11,27,21,28 - lwzx 18,3,18 - rlwinm 26,8,27,21,28 - lwzx 19,3,19 - rlwinm 27,9,27,21,28 - lwzx 20,6,20 - rlwinm 28,11,3,21,28 - lwzx 21,6,21 - rlwinm 29,8,3,21,28 - lwzx 22,6,22 - rlwinm 30,9,3,21,28 - lwzx 23,6,23 - rlwinm 31,10,3,21,28 - lwzx 24,7,24 - xor 12,12,16 - lwzx 25,7,25 - xor 0,0,17 - lwzx 26,7,26 - xor 14,14,18 - lwzx 27,7,27 - xor 15,15,19 - lwzx 28,4,28 - xor 12,12,20 - lwzx 29,4,29 - xor 0,0,21 - lwzx 30,4,30 - xor 14,14,22 - lwzx 31,4,31 - xor 15,15,23 - xor 12,12,24 - xor 0,0,25 - xor 14,14,26 - xor 15,15,27 - xor 8,12,28 - xor 9,0,29 - xor 10,14,30 - xor 11,15,31 - addi 5,5,16 - bdnz .Lenc_loop - - addi 7,3,2048 - nop - lwz 12,0(5) - rlwinm 16,8,8,24,31 - lwz 0,4(5) - rlwinm 17,9,8,24,31 - lwz 14,8(5) - rlwinm 18,10,8,24,31 - lwz 15,12(5) - rlwinm 19,11,8,24,31 - lwz 24,2048(3) - rlwinm 20,9,16,24,31 - lwz 25,2080(3) - rlwinm 21,10,16,24,31 - lwz 26,2112(3) - rlwinm 22,11,16,24,31 - lwz 27,2144(3) - rlwinm 23,8,16,24,31 - lwz 28,2176(3) - rlwinm 24,10,24,24,31 - lwz 29,2208(3) - rlwinm 25,11,24,24,31 - lwz 30,2240(3) - rlwinm 26,8,24,24,31 - lwz 31,2272(3) - rlwinm 27,9,24,24,31 - lbzx 16,7,16 - rlwinm 28,11,0,24,31 - lbzx 17,7,17 - rlwinm 29,8,0,24,31 - lbzx 18,7,18 - rlwinm 30,9,0,24,31 - lbzx 19,7,19 - rlwinm 31,10,0,24,31 - lbzx 20,7,20 - rlwinm 8,16,24,0,7 - lbzx 21,7,21 - rlwinm 9,17,24,0,7 - lbzx 22,7,22 - rlwinm 10,18,24,0,7 - lbzx 23,7,23 - rlwinm 11,19,24,0,7 - lbzx 24,7,24 - rlwimi 8,20,16,8,15 - lbzx 25,7,25 - rlwimi 9,21,16,8,15 - lbzx 26,7,26 - rlwimi 10,22,16,8,15 - lbzx 27,7,27 - rlwimi 11,23,16,8,15 - lbzx 28,7,28 - rlwimi 8,24,8,16,23 - lbzx 29,7,29 - rlwimi 9,25,8,16,23 - lbzx 30,7,30 - rlwimi 10,26,8,16,23 - lbzx 31,7,31 - rlwimi 11,27,8,16,23 - or 8,8,28 - or 9,9,29 - or 10,10,30 - or 11,11,31 - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.align 4 -.Lppc_AES_encrypt_compact: - lwz 16,240(5) - addi 6,3,2048 - lwz 12,0(5) - lis 7,0x8080 - lwz 0,4(5) - lis 4,0x1b1b - lwz 14,8(5) - ori 7,7,0x8080 - lwz 15,12(5) - ori 4,4,0x1b1b - addi 5,5,16 - mtctr 16 -.align 4 -.Lenc_compact_loop: - xor 8,8,12 - xor 9,9,0 - rlwinm 16,8,8,24,31 - xor 10,10,14 - rlwinm 17,9,8,24,31 - xor 11,11,15 - rlwinm 18,10,8,24,31 - rlwinm 19,11,8,24,31 - rlwinm 20,9,16,24,31 - rlwinm 21,10,16,24,31 - rlwinm 22,11,16,24,31 - rlwinm 23,8,16,24,31 - lbzx 16,6,16 - rlwinm 24,10,24,24,31 - lbzx 17,6,17 - rlwinm 25,11,24,24,31 - lbzx 18,6,18 - rlwinm 26,8,24,24,31 - lbzx 19,6,19 - rlwinm 27,9,24,24,31 - lbzx 20,6,20 - rlwinm 28,11,0,24,31 - lbzx 21,6,21 - rlwinm 29,8,0,24,31 - lbzx 22,6,22 - rlwinm 30,9,0,24,31 - lbzx 23,6,23 - rlwinm 31,10,0,24,31 - lbzx 24,6,24 - rlwinm 8,16,24,0,7 - lbzx 25,6,25 - rlwinm 9,17,24,0,7 - lbzx 26,6,26 - rlwinm 10,18,24,0,7 - lbzx 27,6,27 - rlwinm 11,19,24,0,7 - lbzx 28,6,28 - rlwimi 8,20,16,8,15 - lbzx 29,6,29 - rlwimi 9,21,16,8,15 - lbzx 30,6,30 - rlwimi 10,22,16,8,15 - lbzx 31,6,31 - rlwimi 11,23,16,8,15 - rlwimi 8,24,8,16,23 - rlwimi 9,25,8,16,23 - rlwimi 10,26,8,16,23 - rlwimi 11,27,8,16,23 - lwz 12,0(5) - or 8,8,28 - lwz 0,4(5) - or 9,9,29 - lwz 14,8(5) - or 10,10,30 - lwz 15,12(5) - or 11,11,31 - - addi 5,5,16 - bdz .Lenc_compact_done - - and 16,8,7 - and 17,9,7 - and 18,10,7 - and 19,11,7 - srwi 20,16,7 - andc 24,8,7 - srwi 21,17,7 - andc 25,9,7 - srwi 22,18,7 - andc 26,10,7 - srwi 23,19,7 - andc 27,11,7 - sub 16,16,20 - sub 17,17,21 - sub 18,18,22 - sub 19,19,23 - add 24,24,24 - add 25,25,25 - add 26,26,26 - add 27,27,27 - and 16,16,4 - and 17,17,4 - and 18,18,4 - and 19,19,4 - xor 16,16,24 - xor 17,17,25 - rotlwi 28,8,16 - xor 18,18,26 - rotlwi 29,9,16 - xor 19,19,27 - rotlwi 30,10,16 - - xor 8,8,16 - rotlwi 31,11,16 - xor 9,9,17 - rotrwi 8,8,24 - xor 10,10,18 - rotrwi 9,9,24 - xor 11,11,19 - rotrwi 10,10,24 - xor 8,8,16 - rotrwi 11,11,24 - xor 9,9,17 - xor 10,10,18 - xor 11,11,19 - rotlwi 24,28,8 - xor 8,8,28 - rotlwi 25,29,8 - xor 9,9,29 - rotlwi 26,30,8 - xor 10,10,30 - rotlwi 27,31,8 - xor 11,11,31 - xor 8,8,24 - xor 9,9,25 - xor 10,10,26 - xor 11,11,27 - - b .Lenc_compact_loop -.align 4 -.Lenc_compact_done: - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size AES_encrypt,.-AES_encrypt - -.globl AES_decrypt -.type AES_decrypt,@function -.align 7 -AES_decrypt: -.localentry AES_decrypt,0 - - stdu 1,-256(1) - mflr 0 - - std 4,104(1) - std 14,112(1) - std 15,120(1) - std 16,128(1) - std 17,136(1) - std 18,144(1) - std 19,152(1) - std 20,160(1) - std 21,168(1) - std 22,176(1) - std 23,184(1) - std 24,192(1) - std 25,200(1) - std 26,208(1) - std 27,216(1) - std 28,224(1) - std 29,232(1) - std 30,240(1) - std 31,248(1) - std 0,272(1) - - andi. 12,3,3 - andi. 0,4,3 - or. 12,12,0 - bne .Ldec_unaligned - -.Ldec_unaligned_ok: - lwz 8,0(3) - lwz 9,4(3) - lwz 10,8(3) - lwz 11,12(3) - bl .LAES_Td - bl .Lppc_AES_decrypt_compact - ld 4,104(1) - stw 8,0(4) - stw 9,4(4) - stw 10,8(4) - stw 11,12(4) - b .Ldec_done - -.Ldec_unaligned: - subfic 12,3,4096 - subfic 0,4,4096 - andi. 12,12,4096-16 - beq .Ldec_xpage - andi. 0,0,4096-16 - bne .Ldec_unaligned_ok - -.Ldec_xpage: - lbz 16,0(3) - lbz 17,1(3) - lbz 18,2(3) - lbz 8,3(3) - lbz 20,4(3) - lbz 21,5(3) - lbz 22,6(3) - lbz 9,7(3) - lbz 24,8(3) - lbz 25,9(3) - lbz 26,10(3) - insrwi 8,16,8,0 - lbz 10,11(3) - insrwi 9,20,8,0 - lbz 28,12(3) - insrwi 8,17,8,8 - lbz 29,13(3) - insrwi 9,21,8,8 - lbz 30,14(3) - insrwi 8,18,8,16 - lbz 11,15(3) - insrwi 9,22,8,16 - insrwi 10,24,8,0 - insrwi 11,28,8,0 - insrwi 10,25,8,8 - insrwi 11,29,8,8 - insrwi 10,26,8,16 - insrwi 11,30,8,16 - - bl .LAES_Td - bl .Lppc_AES_decrypt_compact - ld 4,104(1) - - extrwi 16,8,8,0 - extrwi 17,8,8,8 - stb 16,0(4) - extrwi 18,8,8,16 - stb 17,1(4) - stb 18,2(4) - extrwi 20,9,8,0 - stb 8,3(4) - extrwi 21,9,8,8 - stb 20,4(4) - extrwi 22,9,8,16 - stb 21,5(4) - stb 22,6(4) - extrwi 24,10,8,0 - stb 9,7(4) - extrwi 25,10,8,8 - stb 24,8(4) - extrwi 26,10,8,16 - stb 25,9(4) - stb 26,10(4) - extrwi 28,11,8,0 - stb 10,11(4) - extrwi 29,11,8,8 - stb 28,12(4) - extrwi 30,11,8,16 - stb 29,13(4) - stb 30,14(4) - stb 11,15(4) - -.Ldec_done: - ld 0,272(1) - ld 14,112(1) - ld 15,120(1) - ld 16,128(1) - ld 17,136(1) - ld 18,144(1) - ld 19,152(1) - ld 20,160(1) - ld 21,168(1) - ld 22,176(1) - ld 23,184(1) - ld 24,192(1) - ld 25,200(1) - ld 26,208(1) - ld 27,216(1) - ld 28,224(1) - ld 29,232(1) - ld 30,240(1) - ld 31,248(1) - mtlr 0 - addi 1,1,256 - blr -.long 0 -.byte 0,12,4,1,0x80,18,3,0 -.long 0 - -.align 5 -.Lppc_AES_decrypt: - lwz 16,240(5) - addi 6,3,3 - lwz 12,0(5) - addi 7,3,2 - lwz 0,4(5) - addi 4,3,1 - lwz 14,8(5) - addi 16,16,-1 - lwz 15,12(5) - addi 5,5,16 - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - mtctr 16 -.align 4 -.Ldec_loop: - rlwinm 16,8,11,21,28 - rlwinm 17,9,11,21,28 - rlwinm 18,10,11,21,28 - rlwinm 19,11,11,21,28 - lwz 12,0(5) - rlwinm 20,11,19,21,28 - lwz 0,4(5) - rlwinm 21,8,19,21,28 - lwz 14,8(5) - rlwinm 22,9,19,21,28 - lwz 15,12(5) - rlwinm 23,10,19,21,28 - lwzx 16,3,16 - rlwinm 24,10,27,21,28 - lwzx 17,3,17 - rlwinm 25,11,27,21,28 - lwzx 18,3,18 - rlwinm 26,8,27,21,28 - lwzx 19,3,19 - rlwinm 27,9,27,21,28 - lwzx 20,6,20 - rlwinm 28,9,3,21,28 - lwzx 21,6,21 - rlwinm 29,10,3,21,28 - lwzx 22,6,22 - rlwinm 30,11,3,21,28 - lwzx 23,6,23 - rlwinm 31,8,3,21,28 - lwzx 24,7,24 - xor 12,12,16 - lwzx 25,7,25 - xor 0,0,17 - lwzx 26,7,26 - xor 14,14,18 - lwzx 27,7,27 - xor 15,15,19 - lwzx 28,4,28 - xor 12,12,20 - lwzx 29,4,29 - xor 0,0,21 - lwzx 30,4,30 - xor 14,14,22 - lwzx 31,4,31 - xor 15,15,23 - xor 12,12,24 - xor 0,0,25 - xor 14,14,26 - xor 15,15,27 - xor 8,12,28 - xor 9,0,29 - xor 10,14,30 - xor 11,15,31 - addi 5,5,16 - bdnz .Ldec_loop - - addi 7,3,2048 - nop - lwz 12,0(5) - rlwinm 16,8,8,24,31 - lwz 0,4(5) - rlwinm 17,9,8,24,31 - lwz 14,8(5) - rlwinm 18,10,8,24,31 - lwz 15,12(5) - rlwinm 19,11,8,24,31 - lwz 24,2048(3) - rlwinm 20,11,16,24,31 - lwz 25,2080(3) - rlwinm 21,8,16,24,31 - lwz 26,2112(3) - lbzx 16,7,16 - lwz 27,2144(3) - lbzx 17,7,17 - lwz 28,2176(3) - rlwinm 22,9,16,24,31 - lwz 29,2208(3) - rlwinm 23,10,16,24,31 - lwz 30,2240(3) - rlwinm 24,10,24,24,31 - lwz 31,2272(3) - rlwinm 25,11,24,24,31 - lbzx 18,7,18 - rlwinm 26,8,24,24,31 - lbzx 19,7,19 - rlwinm 27,9,24,24,31 - lbzx 20,7,20 - rlwinm 28,9,0,24,31 - lbzx 21,7,21 - rlwinm 29,10,0,24,31 - lbzx 22,7,22 - rlwinm 30,11,0,24,31 - lbzx 23,7,23 - rlwinm 31,8,0,24,31 - lbzx 24,7,24 - rlwinm 8,16,24,0,7 - lbzx 25,7,25 - rlwinm 9,17,24,0,7 - lbzx 26,7,26 - rlwinm 10,18,24,0,7 - lbzx 27,7,27 - rlwinm 11,19,24,0,7 - lbzx 28,7,28 - rlwimi 8,20,16,8,15 - lbzx 29,7,29 - rlwimi 9,21,16,8,15 - lbzx 30,7,30 - rlwimi 10,22,16,8,15 - lbzx 31,7,31 - rlwimi 11,23,16,8,15 - rlwimi 8,24,8,16,23 - rlwimi 9,25,8,16,23 - rlwimi 10,26,8,16,23 - rlwimi 11,27,8,16,23 - or 8,8,28 - or 9,9,29 - or 10,10,30 - or 11,11,31 - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.align 4 -.Lppc_AES_decrypt_compact: - lwz 16,240(5) - addi 6,3,2048 - lwz 12,0(5) - lis 7,0x8080 - lwz 0,4(5) - lis 4,0x1b1b - lwz 14,8(5) - ori 7,7,0x8080 - lwz 15,12(5) - ori 4,4,0x1b1b - addi 5,5,16 - insrdi 7,7,32,0 - insrdi 4,4,32,0 - mtctr 16 -.align 4 -.Ldec_compact_loop: - xor 8,8,12 - xor 9,9,0 - rlwinm 16,8,8,24,31 - xor 10,10,14 - rlwinm 17,9,8,24,31 - xor 11,11,15 - rlwinm 18,10,8,24,31 - rlwinm 19,11,8,24,31 - rlwinm 20,11,16,24,31 - rlwinm 21,8,16,24,31 - rlwinm 22,9,16,24,31 - rlwinm 23,10,16,24,31 - lbzx 16,6,16 - rlwinm 24,10,24,24,31 - lbzx 17,6,17 - rlwinm 25,11,24,24,31 - lbzx 18,6,18 - rlwinm 26,8,24,24,31 - lbzx 19,6,19 - rlwinm 27,9,24,24,31 - lbzx 20,6,20 - rlwinm 28,9,0,24,31 - lbzx 21,6,21 - rlwinm 29,10,0,24,31 - lbzx 22,6,22 - rlwinm 30,11,0,24,31 - lbzx 23,6,23 - rlwinm 31,8,0,24,31 - lbzx 24,6,24 - rlwinm 8,16,24,0,7 - lbzx 25,6,25 - rlwinm 9,17,24,0,7 - lbzx 26,6,26 - rlwinm 10,18,24,0,7 - lbzx 27,6,27 - rlwinm 11,19,24,0,7 - lbzx 28,6,28 - rlwimi 8,20,16,8,15 - lbzx 29,6,29 - rlwimi 9,21,16,8,15 - lbzx 30,6,30 - rlwimi 10,22,16,8,15 - lbzx 31,6,31 - rlwimi 11,23,16,8,15 - rlwimi 8,24,8,16,23 - rlwimi 9,25,8,16,23 - rlwimi 10,26,8,16,23 - rlwimi 11,27,8,16,23 - lwz 12,0(5) - or 8,8,28 - lwz 0,4(5) - or 9,9,29 - lwz 14,8(5) - or 10,10,30 - lwz 15,12(5) - or 11,11,31 - - addi 5,5,16 - bdz .Ldec_compact_done - - insrdi 8,9,32,0 - insrdi 10,11,32,0 - - and 16,8,7 - and 18,10,7 - srdi 20,16,7 - srdi 22,18,7 - andc 24,8,7 - andc 26,10,7 - sub 16,16,20 - sub 18,18,22 - add 24,24,24 - add 26,26,26 - and 16,16,4 - and 18,18,4 - xor 16,16,24 - xor 18,18,26 - - and 20,16,7 - and 22,18,7 - srdi 24,20,7 - srdi 26,22,7 - andc 28,16,7 - andc 30,18,7 - sub 20,20,24 - sub 22,22,26 - add 28,28,28 - add 30,30,30 - and 20,20,4 - and 22,22,4 - xor 20,20,28 - xor 22,22,30 - - and 24,20,7 - and 26,22,7 - srdi 28,24,7 - srdi 30,26,7 - sub 24,24,28 - sub 26,26,30 - andc 28,20,7 - andc 30,22,7 - add 28,28,28 - add 30,30,30 - and 24,24,4 - and 26,26,4 - xor 24,24,28 - xor 26,26,30 - - xor 16,16,8 - xor 18,18,10 - xor 20,20,8 - xor 22,22,10 - - rldicl 17,16,32,32 - rldicl 19,18,32,32 - rldicl 21,20,32,32 - rldicl 23,22,32,32 - rldicl 25,24,32,32 - rldicl 27,26,32,32 - rotrwi 8,8,8 - rotrwi 9,9,8 - xor 8,8,16 - rotrwi 10,10,8 - xor 9,9,17 - rotrwi 11,11,8 - xor 10,10,18 - xor 11,11,19 - xor 16,16,24 - xor 17,17,25 - xor 18,18,26 - xor 19,19,27 - xor 8,8,20 - rotrwi 16,16,24 - xor 9,9,21 - rotrwi 17,17,24 - xor 10,10,22 - rotrwi 18,18,24 - xor 11,11,23 - rotrwi 19,19,24 - xor 20,20,24 - xor 21,21,25 - xor 22,22,26 - xor 23,23,27 - xor 8,8,24 - rotrwi 20,20,16 - xor 9,9,25 - rotrwi 21,21,16 - xor 10,10,26 - rotrwi 22,22,16 - xor 11,11,27 - rotrwi 23,23,16 - xor 8,8,16 - rotrwi 24,24,8 - xor 9,9,17 - rotrwi 25,25,8 - xor 10,10,18 - rotrwi 26,26,8 - xor 11,11,19 - rotrwi 27,27,8 - xor 8,8,20 - xor 9,9,21 - xor 10,10,22 - xor 11,11,23 - xor 8,8,24 - xor 9,9,25 - xor 10,10,26 - xor 11,11,27 - - b .Ldec_compact_loop -.align 4 -.Ldec_compact_done: - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size AES_decrypt,.-AES_decrypt - -.byte 65,69,83,32,102,111,114,32,80,80,67,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 7 diff --git a/sys/crypto/openssl/powerpc64/aesp8-ppc.S b/sys/crypto/openssl/powerpc64/aesp8-ppc.S deleted file mode 100644 index 5fdbf0552b2..00000000000 --- a/sys/crypto/openssl/powerpc64/aesp8-ppc.S +++ /dev/null @@ -1,3659 +0,0 @@ -/* Do not modify. This file is auto-generated from aesp8-ppc.pl. */ -.machine "any" - -.abiversion 2 -.text - -.align 7 -rcon: -.byte 0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00 -.byte 0x1b,0x00,0x00,0x00,0x1b,0x00,0x00,0x00,0x1b,0x00,0x00,0x00,0x1b,0x00,0x00,0x00 -.byte 0x0d,0x0e,0x0f,0x0c,0x0d,0x0e,0x0f,0x0c,0x0d,0x0e,0x0f,0x0c,0x0d,0x0e,0x0f,0x0c -.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 -.Lconsts: - mflr 0 - bcl 20,31,$+4 - mflr 6 - addi 6,6,-0x48 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.byte 65,69,83,32,102,111,114,32,80,111,119,101,114,73,83,65,32,50,46,48,55,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 - -.globl aes_p8_set_encrypt_key -.type aes_p8_set_encrypt_key,@function -.align 5 -aes_p8_set_encrypt_key: -.localentry aes_p8_set_encrypt_key,0 - -.Lset_encrypt_key: - mflr 11 - std 11,16(1) - - li 6,-1 - cmpldi 3,0 - beq- .Lenc_key_abort - cmpldi 5,0 - beq- .Lenc_key_abort - li 6,-2 - cmpwi 4,128 - blt- .Lenc_key_abort - cmpwi 4,256 - bgt- .Lenc_key_abort - andi. 0,4,0x3f - bne- .Lenc_key_abort - - lis 0,0xfff0 - li 12,-1 - or 0,0,0 - - bl .Lconsts - mtlr 11 - - neg 9,3 - lvx 1,0,3 - addi 3,3,15 - lvsr 3,0,9 - li 8,0x20 - cmpwi 4,192 - lvx 2,0,3 - - lvx 4,0,6 - - lvx 5,8,6 - addi 6,6,0x10 - vperm 1,1,2,3 - li 7,8 - vxor 0,0,0 - mtctr 7 - - lvsr 8,0,5 - vspltisb 9,-1 - lvx 10,0,5 - vperm 9,0,9,8 - - blt .Loop128 - addi 3,3,8 - beq .L192 - addi 3,3,8 - b .L256 - -.align 4 -.Loop128: - vperm 3,1,1,5 - vsldoi 6,0,1,12 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - .long 0x10632509 - stvx 7,0,5 - addi 5,5,16 - - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vadduwm 4,4,4 - vxor 1,1,3 - bdnz .Loop128 - - lvx 4,0,6 - - vperm 3,1,1,5 - vsldoi 6,0,1,12 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - .long 0x10632509 - stvx 7,0,5 - addi 5,5,16 - - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vadduwm 4,4,4 - vxor 1,1,3 - - vperm 3,1,1,5 - vsldoi 6,0,1,12 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - .long 0x10632509 - stvx 7,0,5 - addi 5,5,16 - - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vxor 1,1,3 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - stvx 7,0,5 - - addi 3,5,15 - addi 5,5,0x50 - - li 8,10 - b .Ldone - -.align 4 -.L192: - lvx 6,0,3 - li 7,4 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - stvx 7,0,5 - addi 5,5,16 - vperm 2,2,6,3 - vspltisb 3,8 - mtctr 7 - vsububm 5,5,3 - -.Loop192: - vperm 3,2,2,5 - vsldoi 6,0,1,12 - .long 0x10632509 - - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - - vsldoi 7,0,2,8 - vspltw 6,1,3 - vxor 6,6,2 - vsldoi 2,0,2,12 - vadduwm 4,4,4 - vxor 2,2,6 - vxor 1,1,3 - vxor 2,2,3 - vsldoi 7,7,1,8 - - vperm 3,2,2,5 - vsldoi 6,0,1,12 - vperm 11,7,7,8 - vsel 7,10,11,9 - vor 10,11,11 - .long 0x10632509 - stvx 7,0,5 - addi 5,5,16 - - vsldoi 7,1,2,8 - vxor 1,1,6 - vsldoi 6,0,6,12 - vperm 11,7,7,8 - vsel 7,10,11,9 - vor 10,11,11 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - stvx 7,0,5 - addi 5,5,16 - - vspltw 6,1,3 - vxor 6,6,2 - vsldoi 2,0,2,12 - vadduwm 4,4,4 - vxor 2,2,6 - vxor 1,1,3 - vxor 2,2,3 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - stvx 7,0,5 - addi 3,5,15 - addi 5,5,16 - bdnz .Loop192 - - li 8,12 - addi 5,5,0x20 - b .Ldone - -.align 4 -.L256: - lvx 6,0,3 - li 7,7 - li 8,14 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - stvx 7,0,5 - addi 5,5,16 - vperm 2,2,6,3 - mtctr 7 - -.Loop256: - vperm 3,2,2,5 - vsldoi 6,0,1,12 - vperm 11,2,2,8 - vsel 7,10,11,9 - vor 10,11,11 - .long 0x10632509 - stvx 7,0,5 - addi 5,5,16 - - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vadduwm 4,4,4 - vxor 1,1,3 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - stvx 7,0,5 - addi 3,5,15 - addi 5,5,16 - bdz .Ldone - - vspltw 3,1,3 - vsldoi 6,0,2,12 - .long 0x106305C8 - - vxor 2,2,6 - vsldoi 6,0,6,12 - vxor 2,2,6 - vsldoi 6,0,6,12 - vxor 2,2,6 - - vxor 2,2,3 - b .Loop256 - -.align 4 -.Ldone: - lvx 2,0,3 - vsel 2,10,2,9 - stvx 2,0,3 - li 6,0 - or 12,12,12 - stw 8,0(5) - -.Lenc_key_abort: - mr 3,6 - blr -.long 0 -.byte 0,12,0x14,1,0,0,3,0 -.long 0 -.size aes_p8_set_encrypt_key,.-aes_p8_set_encrypt_key - -.globl aes_p8_set_decrypt_key -.type aes_p8_set_decrypt_key,@function -.align 5 -aes_p8_set_decrypt_key: -.localentry aes_p8_set_decrypt_key,0 - - stdu 1,-64(1) - mflr 10 - std 10,64+16(1) - bl .Lset_encrypt_key - mtlr 10 - - cmpwi 3,0 - bne- .Ldec_key_abort - - slwi 7,8,4 - subi 3,5,240 - srwi 8,8,1 - add 5,3,7 - mtctr 8 - -.Ldeckey: - lwz 0, 0(3) - lwz 6, 4(3) - lwz 7, 8(3) - lwz 8, 12(3) - addi 3,3,16 - lwz 9, 0(5) - lwz 10,4(5) - lwz 11,8(5) - lwz 12,12(5) - stw 0, 0(5) - stw 6, 4(5) - stw 7, 8(5) - stw 8, 12(5) - subi 5,5,16 - stw 9, -16(3) - stw 10,-12(3) - stw 11,-8(3) - stw 12,-4(3) - bdnz .Ldeckey - - xor 3,3,3 -.Ldec_key_abort: - addi 1,1,64 - blr -.long 0 -.byte 0,12,4,1,0x80,0,3,0 -.long 0 -.size aes_p8_set_decrypt_key,.-aes_p8_set_decrypt_key -.globl aes_p8_encrypt -.type aes_p8_encrypt,@function -.align 5 -aes_p8_encrypt: -.localentry aes_p8_encrypt,0 - - lwz 6,240(5) - lis 0,0xfc00 - li 12,-1 - li 7,15 - or 0,0,0 - - lvx 0,0,3 - neg 11,4 - lvx 1,7,3 - lvsl 2,0,3 - - lvsl 3,0,11 - - li 7,16 - vperm 0,0,1,2 - lvx 1,0,5 - lvsl 5,0,5 - srwi 6,6,1 - lvx 2,7,5 - addi 7,7,16 - subi 6,6,1 - vperm 1,1,2,5 - - vxor 0,0,1 - lvx 1,7,5 - addi 7,7,16 - mtctr 6 - -.Loop_enc: - vperm 2,2,1,5 - .long 0x10001508 - lvx 2,7,5 - addi 7,7,16 - vperm 1,1,2,5 - .long 0x10000D08 - lvx 1,7,5 - addi 7,7,16 - bdnz .Loop_enc - - vperm 2,2,1,5 - .long 0x10001508 - lvx 2,7,5 - vperm 1,1,2,5 - .long 0x10000D09 - - vspltisb 2,-1 - vxor 1,1,1 - li 7,15 - vperm 2,1,2,3 - - lvx 1,0,4 - vperm 0,0,0,3 - vsel 1,1,0,2 - lvx 4,7,4 - stvx 1,0,4 - vsel 0,0,4,2 - stvx 0,7,4 - - or 12,12,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size aes_p8_encrypt,.-aes_p8_encrypt -.globl aes_p8_decrypt -.type aes_p8_decrypt,@function -.align 5 -aes_p8_decrypt: -.localentry aes_p8_decrypt,0 - - lwz 6,240(5) - lis 0,0xfc00 - li 12,-1 - li 7,15 - or 0,0,0 - - lvx 0,0,3 - neg 11,4 - lvx 1,7,3 - lvsl 2,0,3 - - lvsl 3,0,11 - - li 7,16 - vperm 0,0,1,2 - lvx 1,0,5 - lvsl 5,0,5 - srwi 6,6,1 - lvx 2,7,5 - addi 7,7,16 - subi 6,6,1 - vperm 1,1,2,5 - - vxor 0,0,1 - lvx 1,7,5 - addi 7,7,16 - mtctr 6 - -.Loop_dec: - vperm 2,2,1,5 - .long 0x10001548 - lvx 2,7,5 - addi 7,7,16 - vperm 1,1,2,5 - .long 0x10000D48 - lvx 1,7,5 - addi 7,7,16 - bdnz .Loop_dec - - vperm 2,2,1,5 - .long 0x10001548 - lvx 2,7,5 - vperm 1,1,2,5 - .long 0x10000D49 - - vspltisb 2,-1 - vxor 1,1,1 - li 7,15 - vperm 2,1,2,3 - - lvx 1,0,4 - vperm 0,0,0,3 - vsel 1,1,0,2 - lvx 4,7,4 - stvx 1,0,4 - vsel 0,0,4,2 - stvx 0,7,4 - - or 12,12,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size aes_p8_decrypt,.-aes_p8_decrypt -.globl aes_p8_cbc_encrypt -.type aes_p8_cbc_encrypt,@function -.align 5 -aes_p8_cbc_encrypt: -.localentry aes_p8_cbc_encrypt,0 - - cmpldi 5,16 - .long 0x4dc00020 - - cmpwi 8,0 - lis 0,0xffe0 - li 12,-1 - or 0,0,0 - - li 10,15 - vxor 0,0,0 - - - lvx 4,0,7 - lvsl 6,0,7 - lvx 5,10,7 - - vperm 4,4,5,6 - - neg 11,3 - lvsl 10,0,6 - lwz 9,240(6) - - lvsr 6,0,11 - lvx 5,0,3 - addi 3,3,15 - - - lvsr 8,0,4 - vspltisb 9,-1 - lvx 7,0,4 - vperm 9,0,9,8 - - - srwi 9,9,1 - li 10,16 - subi 9,9,1 - beq .Lcbc_dec - -.Lcbc_enc: - vor 2,5,5 - lvx 5,0,3 - addi 3,3,16 - mtctr 9 - subi 5,5,16 - - lvx 0,0,6 - vperm 2,2,5,6 - lvx 1,10,6 - addi 10,10,16 - vperm 0,0,1,10 - vxor 2,2,0 - lvx 0,10,6 - addi 10,10,16 - vxor 2,2,4 - -.Loop_cbc_enc: - vperm 1,1,0,10 - .long 0x10420D08 - lvx 1,10,6 - addi 10,10,16 - vperm 0,0,1,10 - .long 0x10420508 - lvx 0,10,6 - addi 10,10,16 - bdnz .Loop_cbc_enc - - vperm 1,1,0,10 - .long 0x10420D08 - lvx 1,10,6 - li 10,16 - vperm 0,0,1,10 - .long 0x10820509 - cmpldi 5,16 - - vperm 3,4,4,8 - vsel 2,7,3,9 - vor 7,3,3 - stvx 2,0,4 - addi 4,4,16 - bge .Lcbc_enc - - b .Lcbc_done - -.align 4 -.Lcbc_dec: - cmpldi 5,128 - bge _aesp8_cbc_decrypt8x - vor 3,5,5 - lvx 5,0,3 - addi 3,3,16 - mtctr 9 - subi 5,5,16 - - lvx 0,0,6 - vperm 3,3,5,6 - lvx 1,10,6 - addi 10,10,16 - vperm 0,0,1,10 - vxor 2,3,0 - lvx 0,10,6 - addi 10,10,16 - -.Loop_cbc_dec: - vperm 1,1,0,10 - .long 0x10420D48 - lvx 1,10,6 - addi 10,10,16 - vperm 0,0,1,10 - .long 0x10420548 - lvx 0,10,6 - addi 10,10,16 - bdnz .Loop_cbc_dec - - vperm 1,1,0,10 - .long 0x10420D48 - lvx 1,10,6 - li 10,16 - vperm 0,0,1,10 - .long 0x10420549 - cmpldi 5,16 - - vxor 2,2,4 - vor 4,3,3 - vperm 3,2,2,8 - vsel 2,7,3,9 - vor 7,3,3 - stvx 2,0,4 - addi 4,4,16 - bge .Lcbc_dec - -.Lcbc_done: - addi 4,4,-1 - lvx 2,0,4 - vsel 2,7,2,9 - stvx 2,0,4 - - neg 8,7 - li 10,15 - vxor 0,0,0 - vspltisb 9,-1 - - lvsl 8,0,8 - vperm 9,0,9,8 - - lvx 7,0,7 - vperm 4,4,4,8 - vsel 2,7,4,9 - lvx 5,10,7 - stvx 2,0,7 - vsel 2,4,5,9 - stvx 2,10,7 - - or 12,12,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,6,0 -.long 0 -.align 5 -_aesp8_cbc_decrypt8x: - stdu 1,-448(1) - li 10,207 - li 11,223 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - li 0,-1 - stw 12,396(1) - li 8,0x10 - std 26,400(1) - li 26,0x20 - std 27,408(1) - li 27,0x30 - std 28,416(1) - li 28,0x40 - std 29,424(1) - li 29,0x50 - std 30,432(1) - li 30,0x60 - std 31,440(1) - li 31,0x70 - or 0,0,0 - - subi 9,9,3 - subi 5,5,128 - - lvx 23,0,6 - lvx 30,8,6 - addi 6,6,0x20 - lvx 31,0,6 - vperm 23,23,30,10 - addi 11,1,64+15 - mtctr 9 - -.Load_cbc_dec_key: - vperm 24,30,31,10 - lvx 30,8,6 - addi 6,6,0x20 - stvx 24,0,11 - vperm 25,31,30,10 - lvx 31,0,6 - stvx 25,8,11 - addi 11,11,0x20 - bdnz .Load_cbc_dec_key - - lvx 26,8,6 - vperm 24,30,31,10 - lvx 27,26,6 - stvx 24,0,11 - vperm 25,31,26,10 - lvx 28,27,6 - stvx 25,8,11 - addi 11,1,64+15 - vperm 26,26,27,10 - lvx 29,28,6 - vperm 27,27,28,10 - lvx 30,29,6 - vperm 28,28,29,10 - lvx 31,30,6 - vperm 29,29,30,10 - lvx 14,31,6 - vperm 30,30,31,10 - lvx 24,0,11 - vperm 31,31,14,10 - lvx 25,8,11 - - - - subi 3,3,15 - - - .long 0x7C001E99 - - - .long 0x7C281E99 - - .long 0x7C5A1E99 - - .long 0x7C7B1E99 - - .long 0x7D5C1E99 - - vxor 14,0,23 - .long 0x7D7D1E99 - - vxor 15,1,23 - .long 0x7D9E1E99 - - vxor 16,2,23 - .long 0x7DBF1E99 - addi 3,3,0x80 - - vxor 17,3,23 - - vxor 18,10,23 - - vxor 19,11,23 - vxor 20,12,23 - vxor 21,13,23 - - mtctr 9 - b .Loop_cbc_dec8x -.align 5 -.Loop_cbc_dec8x: - .long 0x11CEC548 - .long 0x11EFC548 - .long 0x1210C548 - .long 0x1231C548 - .long 0x1252C548 - .long 0x1273C548 - .long 0x1294C548 - .long 0x12B5C548 - lvx 24,26,11 - addi 11,11,0x20 - - .long 0x11CECD48 - .long 0x11EFCD48 - .long 0x1210CD48 - .long 0x1231CD48 - .long 0x1252CD48 - .long 0x1273CD48 - .long 0x1294CD48 - .long 0x12B5CD48 - lvx 25,8,11 - bdnz .Loop_cbc_dec8x - - subic 5,5,128 - .long 0x11CEC548 - .long 0x11EFC548 - .long 0x1210C548 - .long 0x1231C548 - .long 0x1252C548 - .long 0x1273C548 - .long 0x1294C548 - .long 0x12B5C548 - - subfe. 0,0,0 - .long 0x11CECD48 - .long 0x11EFCD48 - .long 0x1210CD48 - .long 0x1231CD48 - .long 0x1252CD48 - .long 0x1273CD48 - .long 0x1294CD48 - .long 0x12B5CD48 - - and 0,0,5 - .long 0x11CED548 - .long 0x11EFD548 - .long 0x1210D548 - .long 0x1231D548 - .long 0x1252D548 - .long 0x1273D548 - .long 0x1294D548 - .long 0x12B5D548 - - add 3,3,0 - - - - .long 0x11CEDD48 - .long 0x11EFDD48 - .long 0x1210DD48 - .long 0x1231DD48 - .long 0x1252DD48 - .long 0x1273DD48 - .long 0x1294DD48 - .long 0x12B5DD48 - - addi 11,1,64+15 - .long 0x11CEE548 - .long 0x11EFE548 - .long 0x1210E548 - .long 0x1231E548 - .long 0x1252E548 - .long 0x1273E548 - .long 0x1294E548 - .long 0x12B5E548 - lvx 24,0,11 - - .long 0x11CEED48 - .long 0x11EFED48 - .long 0x1210ED48 - .long 0x1231ED48 - .long 0x1252ED48 - .long 0x1273ED48 - .long 0x1294ED48 - .long 0x12B5ED48 - lvx 25,8,11 - - .long 0x11CEF548 - vxor 4,4,31 - .long 0x11EFF548 - vxor 0,0,31 - .long 0x1210F548 - vxor 1,1,31 - .long 0x1231F548 - vxor 2,2,31 - .long 0x1252F548 - vxor 3,3,31 - .long 0x1273F548 - vxor 10,10,31 - .long 0x1294F548 - vxor 11,11,31 - .long 0x12B5F548 - vxor 12,12,31 - - .long 0x11CE2549 - .long 0x11EF0549 - .long 0x7C001E99 - .long 0x12100D49 - .long 0x7C281E99 - .long 0x12311549 - - .long 0x7C5A1E99 - .long 0x12521D49 - - .long 0x7C7B1E99 - .long 0x12735549 - - .long 0x7D5C1E99 - .long 0x12945D49 - - .long 0x7D7D1E99 - .long 0x12B56549 - - .long 0x7D9E1E99 - vor 4,13,13 - - .long 0x7DBF1E99 - addi 3,3,0x80 - - - - .long 0x7DC02799 - - vxor 14,0,23 - - .long 0x7DE82799 - - vxor 15,1,23 - - .long 0x7E1A2799 - vxor 16,2,23 - - .long 0x7E3B2799 - vxor 17,3,23 - - .long 0x7E5C2799 - vxor 18,10,23 - - .long 0x7E7D2799 - vxor 19,11,23 - - .long 0x7E9E2799 - vxor 20,12,23 - .long 0x7EBF2799 - addi 4,4,0x80 - vxor 21,13,23 - - mtctr 9 - beq .Loop_cbc_dec8x - - addic. 5,5,128 - beq .Lcbc_dec8x_done - nop - nop - -.Loop_cbc_dec8x_tail: - .long 0x11EFC548 - .long 0x1210C548 - .long 0x1231C548 - .long 0x1252C548 - .long 0x1273C548 - .long 0x1294C548 - .long 0x12B5C548 - lvx 24,26,11 - addi 11,11,0x20 - - .long 0x11EFCD48 - .long 0x1210CD48 - .long 0x1231CD48 - .long 0x1252CD48 - .long 0x1273CD48 - .long 0x1294CD48 - .long 0x12B5CD48 - lvx 25,8,11 - bdnz .Loop_cbc_dec8x_tail - - .long 0x11EFC548 - .long 0x1210C548 - .long 0x1231C548 - .long 0x1252C548 - .long 0x1273C548 - .long 0x1294C548 - .long 0x12B5C548 - - .long 0x11EFCD48 - .long 0x1210CD48 - .long 0x1231CD48 - .long 0x1252CD48 - .long 0x1273CD48 - .long 0x1294CD48 - .long 0x12B5CD48 - - .long 0x11EFD548 - .long 0x1210D548 - .long 0x1231D548 - .long 0x1252D548 - .long 0x1273D548 - .long 0x1294D548 - .long 0x12B5D548 - - .long 0x11EFDD48 - .long 0x1210DD48 - .long 0x1231DD48 - .long 0x1252DD48 - .long 0x1273DD48 - .long 0x1294DD48 - .long 0x12B5DD48 - - .long 0x11EFE548 - .long 0x1210E548 - .long 0x1231E548 - .long 0x1252E548 - .long 0x1273E548 - .long 0x1294E548 - .long 0x12B5E548 - - .long 0x11EFED48 - .long 0x1210ED48 - .long 0x1231ED48 - .long 0x1252ED48 - .long 0x1273ED48 - .long 0x1294ED48 - .long 0x12B5ED48 - - .long 0x11EFF548 - vxor 4,4,31 - .long 0x1210F548 - vxor 1,1,31 - .long 0x1231F548 - vxor 2,2,31 - .long 0x1252F548 - vxor 3,3,31 - .long 0x1273F548 - vxor 10,10,31 - .long 0x1294F548 - vxor 11,11,31 - .long 0x12B5F548 - vxor 12,12,31 - - cmplwi 5,32 - blt .Lcbc_dec8x_one - nop - beq .Lcbc_dec8x_two - cmplwi 5,64 - blt .Lcbc_dec8x_three - nop - beq .Lcbc_dec8x_four - cmplwi 5,96 - blt .Lcbc_dec8x_five - nop - beq .Lcbc_dec8x_six - -.Lcbc_dec8x_seven: - .long 0x11EF2549 - .long 0x12100D49 - .long 0x12311549 - .long 0x12521D49 - .long 0x12735549 - .long 0x12945D49 - .long 0x12B56549 - vor 4,13,13 - - - - .long 0x7DE02799 - - .long 0x7E082799 - - .long 0x7E3A2799 - - .long 0x7E5B2799 - - .long 0x7E7C2799 - - .long 0x7E9D2799 - .long 0x7EBE2799 - addi 4,4,0x70 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_six: - .long 0x12102549 - .long 0x12311549 - .long 0x12521D49 - .long 0x12735549 - .long 0x12945D49 - .long 0x12B56549 - vor 4,13,13 - - - - .long 0x7E002799 - - .long 0x7E282799 - - .long 0x7E5A2799 - - .long 0x7E7B2799 - - .long 0x7E9C2799 - .long 0x7EBD2799 - addi 4,4,0x60 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_five: - .long 0x12312549 - .long 0x12521D49 - .long 0x12735549 - .long 0x12945D49 - .long 0x12B56549 - vor 4,13,13 - - - - .long 0x7E202799 - - .long 0x7E482799 - - .long 0x7E7A2799 - - .long 0x7E9B2799 - .long 0x7EBC2799 - addi 4,4,0x50 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_four: - .long 0x12522549 - .long 0x12735549 - .long 0x12945D49 - .long 0x12B56549 - vor 4,13,13 - - - - .long 0x7E402799 - - .long 0x7E682799 - - .long 0x7E9A2799 - .long 0x7EBB2799 - addi 4,4,0x40 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_three: - .long 0x12732549 - .long 0x12945D49 - .long 0x12B56549 - vor 4,13,13 - - - - .long 0x7E602799 - - .long 0x7E882799 - .long 0x7EBA2799 - addi 4,4,0x30 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_two: - .long 0x12942549 - .long 0x12B56549 - vor 4,13,13 - - - - .long 0x7E802799 - .long 0x7EA82799 - addi 4,4,0x20 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_one: - .long 0x12B52549 - vor 4,13,13 - - - .long 0x7EA02799 - addi 4,4,0x10 - -.Lcbc_dec8x_done: - - .long 0x7C803F99 - - li 10,79 - li 11,95 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - - or 12,12,12 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - ld 26,400(1) - ld 27,408(1) - ld 28,416(1) - ld 29,424(1) - ld 30,432(1) - ld 31,440(1) - addi 1,1,448 - blr -.long 0 -.byte 0,12,0x04,0,0x80,6,6,0 -.long 0 -.size aes_p8_cbc_encrypt,.-aes_p8_cbc_encrypt -.globl aes_p8_ctr32_encrypt_blocks -.type aes_p8_ctr32_encrypt_blocks,@function -.align 5 -aes_p8_ctr32_encrypt_blocks: -.localentry aes_p8_ctr32_encrypt_blocks,0 - - cmpldi 5,1 - .long 0x4dc00020 - - lis 0,0xfff0 - li 12,-1 - or 0,0,0 - - li 10,15 - vxor 0,0,0 - - - lvx 4,0,7 - lvsl 6,0,7 - lvx 5,10,7 - vspltisb 11,1 - - vperm 4,4,5,6 - vsldoi 11,0,11,1 - - neg 11,3 - lvsl 10,0,6 - lwz 9,240(6) - - lvsr 6,0,11 - lvx 5,0,3 - addi 3,3,15 - - - srwi 9,9,1 - li 10,16 - subi 9,9,1 - - cmpldi 5,8 - bge _aesp8_ctr32_encrypt8x - - lvsr 8,0,4 - vspltisb 9,-1 - lvx 7,0,4 - vperm 9,0,9,8 - - - lvx 0,0,6 - mtctr 9 - lvx 1,10,6 - addi 10,10,16 - vperm 0,0,1,10 - vxor 2,4,0 - lvx 0,10,6 - addi 10,10,16 - b .Loop_ctr32_enc - -.align 5 -.Loop_ctr32_enc: - vperm 1,1,0,10 - .long 0x10420D08 - lvx 1,10,6 - addi 10,10,16 - vperm 0,0,1,10 - .long 0x10420508 - lvx 0,10,6 - addi 10,10,16 - bdnz .Loop_ctr32_enc - - vadduwm 4,4,11 - vor 3,5,5 - lvx 5,0,3 - addi 3,3,16 - subic. 5,5,1 - - vperm 1,1,0,10 - .long 0x10420D08 - lvx 1,10,6 - vperm 3,3,5,6 - li 10,16 - vperm 1,0,1,10 - lvx 0,0,6 - vxor 3,3,1 - .long 0x10421D09 - - lvx 1,10,6 - addi 10,10,16 - vperm 2,2,2,8 - vsel 3,7,2,9 - mtctr 9 - vperm 0,0,1,10 - vor 7,2,2 - vxor 2,4,0 - lvx 0,10,6 - addi 10,10,16 - stvx 3,0,4 - addi 4,4,16 - bne .Loop_ctr32_enc - - addi 4,4,-1 - lvx 2,0,4 - vsel 2,7,2,9 - stvx 2,0,4 - - or 12,12,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,6,0 -.long 0 -.align 5 -_aesp8_ctr32_encrypt8x: - stdu 1,-448(1) - li 10,207 - li 11,223 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - li 0,-1 - stw 12,396(1) - li 8,0x10 - std 26,400(1) - li 26,0x20 - std 27,408(1) - li 27,0x30 - std 28,416(1) - li 28,0x40 - std 29,424(1) - li 29,0x50 - std 30,432(1) - li 30,0x60 - std 31,440(1) - li 31,0x70 - or 0,0,0 - - subi 9,9,3 - - lvx 23,0,6 - lvx 30,8,6 - addi 6,6,0x20 - lvx 31,0,6 - vperm 23,23,30,10 - addi 11,1,64+15 - mtctr 9 - -.Load_ctr32_enc_key: - vperm 24,30,31,10 - lvx 30,8,6 - addi 6,6,0x20 - stvx 24,0,11 - vperm 25,31,30,10 - lvx 31,0,6 - stvx 25,8,11 - addi 11,11,0x20 - bdnz .Load_ctr32_enc_key - - lvx 26,8,6 - vperm 24,30,31,10 - lvx 27,26,6 - stvx 24,0,11 - vperm 25,31,26,10 - lvx 28,27,6 - stvx 25,8,11 - addi 11,1,64+15 - vperm 26,26,27,10 - lvx 29,28,6 - vperm 27,27,28,10 - lvx 30,29,6 - vperm 28,28,29,10 - lvx 31,30,6 - vperm 29,29,30,10 - lvx 15,31,6 - vperm 30,30,31,10 - lvx 24,0,11 - vperm 31,31,15,10 - lvx 25,8,11 - - vadduwm 7,11,11 - subi 3,3,15 - sldi 5,5,4 - - vadduwm 16,4,11 - vadduwm 17,4,7 - vxor 15,4,23 - - vadduwm 18,16,7 - vxor 16,16,23 - - vadduwm 19,17,7 - vxor 17,17,23 - - vadduwm 20,18,7 - vxor 18,18,23 - - vadduwm 21,19,7 - vxor 19,19,23 - vadduwm 22,20,7 - vxor 20,20,23 - vadduwm 4,21,7 - vxor 21,21,23 - vxor 22,22,23 - - mtctr 9 - b .Loop_ctr32_enc8x -.align 5 -.Loop_ctr32_enc8x: - .long 0x11EFC508 - .long 0x1210C508 - .long 0x1231C508 - .long 0x1252C508 - .long 0x1273C508 - .long 0x1294C508 - .long 0x12B5C508 - .long 0x12D6C508 -.Loop_ctr32_enc8x_middle: - lvx 24,26,11 - addi 11,11,0x20 - - .long 0x11EFCD08 - .long 0x1210CD08 - .long 0x1231CD08 - .long 0x1252CD08 - .long 0x1273CD08 - .long 0x1294CD08 - .long 0x12B5CD08 - .long 0x12D6CD08 - lvx 25,8,11 - bdnz .Loop_ctr32_enc8x - - subic 11,5,256 - .long 0x11EFC508 - .long 0x1210C508 - .long 0x1231C508 - .long 0x1252C508 - .long 0x1273C508 - .long 0x1294C508 - .long 0x12B5C508 - .long 0x12D6C508 - - subfe 0,0,0 - .long 0x11EFCD08 - .long 0x1210CD08 - .long 0x1231CD08 - .long 0x1252CD08 - .long 0x1273CD08 - .long 0x1294CD08 - .long 0x12B5CD08 - .long 0x12D6CD08 - - and 0,0,11 - addi 11,1,64+15 - .long 0x11EFD508 - .long 0x1210D508 - .long 0x1231D508 - .long 0x1252D508 - .long 0x1273D508 - .long 0x1294D508 - .long 0x12B5D508 - .long 0x12D6D508 - lvx 24,0,11 - - subic 5,5,129 - .long 0x11EFDD08 - addi 5,5,1 - .long 0x1210DD08 - .long 0x1231DD08 - .long 0x1252DD08 - .long 0x1273DD08 - .long 0x1294DD08 - .long 0x12B5DD08 - .long 0x12D6DD08 - lvx 25,8,11 - - .long 0x11EFE508 - .long 0x7C001E99 - .long 0x1210E508 - .long 0x7C281E99 - .long 0x1231E508 - .long 0x7C5A1E99 - .long 0x1252E508 - .long 0x7C7B1E99 - .long 0x1273E508 - .long 0x7D5C1E99 - .long 0x1294E508 - .long 0x7D9D1E99 - .long 0x12B5E508 - .long 0x7DBE1E99 - .long 0x12D6E508 - .long 0x7DDF1E99 - addi 3,3,0x80 - - .long 0x11EFED08 - - .long 0x1210ED08 - - .long 0x1231ED08 - - .long 0x1252ED08 - - .long 0x1273ED08 - - .long 0x1294ED08 - - .long 0x12B5ED08 - - .long 0x12D6ED08 - - - add 3,3,0 - - - - subfe. 0,0,0 - .long 0x11EFF508 - vxor 0,0,31 - .long 0x1210F508 - vxor 1,1,31 - .long 0x1231F508 - vxor 2,2,31 - .long 0x1252F508 - vxor 3,3,31 - .long 0x1273F508 - vxor 10,10,31 - .long 0x1294F508 - vxor 12,12,31 - .long 0x12B5F508 - vxor 13,13,31 - .long 0x12D6F508 - vxor 14,14,31 - - bne .Lctr32_enc8x_break - - .long 0x100F0509 - .long 0x10300D09 - vadduwm 16,4,11 - .long 0x10511509 - vadduwm 17,4,7 - vxor 15,4,23 - .long 0x10721D09 - vadduwm 18,16,7 - vxor 16,16,23 - .long 0x11535509 - vadduwm 19,17,7 - vxor 17,17,23 - .long 0x11946509 - vadduwm 20,18,7 - vxor 18,18,23 - .long 0x11B56D09 - vadduwm 21,19,7 - vxor 19,19,23 - .long 0x11D67509 - vadduwm 22,20,7 - vxor 20,20,23 - - vadduwm 4,21,7 - vxor 21,21,23 - - vxor 22,22,23 - mtctr 9 - - .long 0x11EFC508 - .long 0x7C002799 - - .long 0x1210C508 - .long 0x7C282799 - - .long 0x1231C508 - .long 0x7C5A2799 - - .long 0x1252C508 - .long 0x7C7B2799 - - .long 0x1273C508 - .long 0x7D5C2799 - - .long 0x1294C508 - .long 0x7D9D2799 - - .long 0x12B5C508 - .long 0x7DBE2799 - .long 0x12D6C508 - .long 0x7DDF2799 - addi 4,4,0x80 - - b .Loop_ctr32_enc8x_middle - -.align 5 -.Lctr32_enc8x_break: - cmpwi 5,-0x60 - blt .Lctr32_enc8x_one - nop - beq .Lctr32_enc8x_two - cmpwi 5,-0x40 - blt .Lctr32_enc8x_three - nop - beq .Lctr32_enc8x_four - cmpwi 5,-0x20 - blt .Lctr32_enc8x_five - nop - beq .Lctr32_enc8x_six - cmpwi 5,0x00 - blt .Lctr32_enc8x_seven - -.Lctr32_enc8x_eight: - .long 0x11EF0509 - .long 0x12100D09 - .long 0x12311509 - .long 0x12521D09 - .long 0x12735509 - .long 0x12946509 - .long 0x12B56D09 - .long 0x12D67509 - - - - .long 0x7DE02799 - - .long 0x7E082799 - - .long 0x7E3A2799 - - .long 0x7E5B2799 - - .long 0x7E7C2799 - - .long 0x7E9D2799 - - .long 0x7EBE2799 - .long 0x7EDF2799 - addi 4,4,0x80 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_seven: - .long 0x11EF0D09 - .long 0x12101509 - .long 0x12311D09 - .long 0x12525509 - .long 0x12736509 - .long 0x12946D09 - .long 0x12B57509 - - - - .long 0x7DE02799 - - .long 0x7E082799 - - .long 0x7E3A2799 - - .long 0x7E5B2799 - - .long 0x7E7C2799 - - .long 0x7E9D2799 - .long 0x7EBE2799 - addi 4,4,0x70 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_six: - .long 0x11EF1509 - .long 0x12101D09 - .long 0x12315509 - .long 0x12526509 - .long 0x12736D09 - .long 0x12947509 - - - - .long 0x7DE02799 - - .long 0x7E082799 - - .long 0x7E3A2799 - - .long 0x7E5B2799 - - .long 0x7E7C2799 - .long 0x7E9D2799 - addi 4,4,0x60 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_five: - .long 0x11EF1D09 - .long 0x12105509 - .long 0x12316509 - .long 0x12526D09 - .long 0x12737509 - - - - .long 0x7DE02799 - - .long 0x7E082799 - - .long 0x7E3A2799 - - .long 0x7E5B2799 - .long 0x7E7C2799 - addi 4,4,0x50 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_four: - .long 0x11EF5509 - .long 0x12106509 - .long 0x12316D09 - .long 0x12527509 - - - - .long 0x7DE02799 - - .long 0x7E082799 - - .long 0x7E3A2799 - .long 0x7E5B2799 - addi 4,4,0x40 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_three: - .long 0x11EF6509 - .long 0x12106D09 - .long 0x12317509 - - - - .long 0x7DE02799 - - .long 0x7E082799 - .long 0x7E3A2799 - addi 4,4,0x30 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_two: - .long 0x11EF6D09 - .long 0x12107509 - - - - .long 0x7DE02799 - .long 0x7E082799 - addi 4,4,0x20 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_one: - .long 0x11EF7509 - - - .long 0x7DE02799 - addi 4,4,0x10 - -.Lctr32_enc8x_done: - li 10,79 - li 11,95 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - - or 12,12,12 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - ld 26,400(1) - ld 27,408(1) - ld 28,416(1) - ld 29,424(1) - ld 30,432(1) - ld 31,440(1) - addi 1,1,448 - blr -.long 0 -.byte 0,12,0x04,0,0x80,6,6,0 -.long 0 -.size aes_p8_ctr32_encrypt_blocks,.-aes_p8_ctr32_encrypt_blocks -.globl aes_p8_xts_encrypt -.type aes_p8_xts_encrypt,@function -.align 5 -aes_p8_xts_encrypt: -.localentry aes_p8_xts_encrypt,0 - - mr 10,3 - li 3,-1 - cmpldi 5,16 - .long 0x4dc00020 - - lis 0,0xfff0 - li 12,-1 - li 11,0 - or 0,0,0 - - vspltisb 9,0x07 - - - - - li 3,15 - lvx 8,0,8 - lvsl 5,0,8 - lvx 4,3,8 - - vperm 8,8,4,5 - - neg 11,10 - lvsr 5,0,11 - lvx 2,0,10 - addi 10,10,15 - - - cmpldi 7,0 - beq .Lxts_enc_no_key2 - - lvsl 7,0,7 - lwz 9,240(7) - srwi 9,9,1 - subi 9,9,1 - li 3,16 - - lvx 0,0,7 - lvx 1,3,7 - addi 3,3,16 - vperm 0,0,1,7 - vxor 8,8,0 - lvx 0,3,7 - addi 3,3,16 - mtctr 9 - -.Ltweak_xts_enc: - vperm 1,1,0,7 - .long 0x11080D08 - lvx 1,3,7 - addi 3,3,16 - vperm 0,0,1,7 - .long 0x11080508 - lvx 0,3,7 - addi 3,3,16 - bdnz .Ltweak_xts_enc - - vperm 1,1,0,7 - .long 0x11080D08 - lvx 1,3,7 - vperm 0,0,1,7 - .long 0x11080509 - - li 8,0 - b .Lxts_enc - -.Lxts_enc_no_key2: - li 3,-16 - and 5,5,3 - - -.Lxts_enc: - lvx 4,0,10 - addi 10,10,16 - - lvsl 7,0,6 - lwz 9,240(6) - srwi 9,9,1 - subi 9,9,1 - li 3,16 - - vslb 10,9,9 - vor 10,10,9 - vspltisb 11,1 - vsldoi 10,10,11,15 - - cmpldi 5,96 - bge _aesp8_xts_encrypt6x - - andi. 7,5,15 - subic 0,5,32 - subi 7,7,16 - subfe 0,0,0 - and 0,0,7 - add 10,10,0 - - lvx 0,0,6 - lvx 1,3,6 - addi 3,3,16 - vperm 2,2,4,5 - vperm 0,0,1,7 - vxor 2,2,8 - vxor 2,2,0 - lvx 0,3,6 - addi 3,3,16 - mtctr 9 - b .Loop_xts_enc - -.align 5 -.Loop_xts_enc: - vperm 1,1,0,7 - .long 0x10420D08 - lvx 1,3,6 - addi 3,3,16 - vperm 0,0,1,7 - .long 0x10420508 - lvx 0,3,6 - addi 3,3,16 - bdnz .Loop_xts_enc - - vperm 1,1,0,7 - .long 0x10420D08 - lvx 1,3,6 - li 3,16 - vperm 0,0,1,7 - vxor 0,0,8 - .long 0x10620509 - - - nop - - .long 0x7C602799 - addi 4,4,16 - - subic. 5,5,16 - beq .Lxts_enc_done - - vor 2,4,4 - lvx 4,0,10 - addi 10,10,16 - lvx 0,0,6 - lvx 1,3,6 - addi 3,3,16 - - subic 0,5,32 - subfe 0,0,0 - and 0,0,7 - add 10,10,0 - - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 8,8,11 - - vperm 2,2,4,5 - vperm 0,0,1,7 - vxor 2,2,8 - vxor 3,3,0 - vxor 2,2,0 - lvx 0,3,6 - addi 3,3,16 - - mtctr 9 - cmpldi 5,16 - bge .Loop_xts_enc - - vxor 3,3,8 - lvsr 5,0,5 - vxor 4,4,4 - vspltisb 11,-1 - vperm 4,4,11,5 - vsel 2,2,3,4 - - subi 11,4,17 - subi 4,4,16 - mtctr 5 - li 5,16 -.Loop_xts_enc_steal: - lbzu 0,1(11) - stb 0,16(11) - bdnz .Loop_xts_enc_steal - - mtctr 9 - b .Loop_xts_enc - -.Lxts_enc_done: - cmpldi 8,0 - beq .Lxts_enc_ret - - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 8,8,11 - - - .long 0x7D004799 - -.Lxts_enc_ret: - or 12,12,12 - li 3,0 - blr -.long 0 -.byte 0,12,0x04,0,0x80,6,6,0 -.long 0 -.size aes_p8_xts_encrypt,.-aes_p8_xts_encrypt - -.globl aes_p8_xts_decrypt -.type aes_p8_xts_decrypt,@function -.align 5 -aes_p8_xts_decrypt: -.localentry aes_p8_xts_decrypt,0 - - mr 10,3 - li 3,-1 - cmpldi 5,16 - .long 0x4dc00020 - - lis 0,0xfff8 - li 12,-1 - li 11,0 - or 0,0,0 - - andi. 0,5,15 - neg 0,0 - andi. 0,0,16 - sub 5,5,0 - - vspltisb 9,0x07 - - - - - li 3,15 - lvx 8,0,8 - lvsl 5,0,8 - lvx 4,3,8 - - vperm 8,8,4,5 - - neg 11,10 - lvsr 5,0,11 - lvx 2,0,10 - addi 10,10,15 - - - cmpldi 7,0 - beq .Lxts_dec_no_key2 - - lvsl 7,0,7 - lwz 9,240(7) - srwi 9,9,1 - subi 9,9,1 - li 3,16 - - lvx 0,0,7 - lvx 1,3,7 - addi 3,3,16 - vperm 0,0,1,7 - vxor 8,8,0 - lvx 0,3,7 - addi 3,3,16 - mtctr 9 - -.Ltweak_xts_dec: - vperm 1,1,0,7 - .long 0x11080D08 - lvx 1,3,7 - addi 3,3,16 - vperm 0,0,1,7 - .long 0x11080508 - lvx 0,3,7 - addi 3,3,16 - bdnz .Ltweak_xts_dec - - vperm 1,1,0,7 - .long 0x11080D08 - lvx 1,3,7 - vperm 0,0,1,7 - .long 0x11080509 - - li 8,0 - b .Lxts_dec - -.Lxts_dec_no_key2: - neg 3,5 - andi. 3,3,15 - add 5,5,3 - - -.Lxts_dec: - lvx 4,0,10 - addi 10,10,16 - - lvsl 7,0,6 - lwz 9,240(6) - srwi 9,9,1 - subi 9,9,1 - li 3,16 - - vslb 10,9,9 - vor 10,10,9 - vspltisb 11,1 - vsldoi 10,10,11,15 - - cmpldi 5,96 - bge _aesp8_xts_decrypt6x - - lvx 0,0,6 - lvx 1,3,6 - addi 3,3,16 - vperm 2,2,4,5 - vperm 0,0,1,7 - vxor 2,2,8 - vxor 2,2,0 - lvx 0,3,6 - addi 3,3,16 - mtctr 9 - - cmpldi 5,16 - blt .Ltail_xts_dec - b .Loop_xts_dec - -.align 5 -.Loop_xts_dec: - vperm 1,1,0,7 - .long 0x10420D48 - lvx 1,3,6 - addi 3,3,16 - vperm 0,0,1,7 - .long 0x10420548 - lvx 0,3,6 - addi 3,3,16 - bdnz .Loop_xts_dec - - vperm 1,1,0,7 - .long 0x10420D48 - lvx 1,3,6 - li 3,16 - vperm 0,0,1,7 - vxor 0,0,8 - .long 0x10620549 - - - nop - - .long 0x7C602799 - addi 4,4,16 - - subic. 5,5,16 - beq .Lxts_dec_done - - vor 2,4,4 - lvx 4,0,10 - addi 10,10,16 - lvx 0,0,6 - lvx 1,3,6 - addi 3,3,16 - - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 8,8,11 - - vperm 2,2,4,5 - vperm 0,0,1,7 - vxor 2,2,8 - vxor 2,2,0 - lvx 0,3,6 - addi 3,3,16 - - mtctr 9 - cmpldi 5,16 - bge .Loop_xts_dec - -.Ltail_xts_dec: - vsrab 11,8,9 - vaddubm 12,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 12,12,11 - - subi 10,10,16 - add 10,10,5 - - vxor 2,2,8 - vxor 2,2,12 - -.Loop_xts_dec_short: - vperm 1,1,0,7 - .long 0x10420D48 - lvx 1,3,6 - addi 3,3,16 - vperm 0,0,1,7 - .long 0x10420548 - lvx 0,3,6 - addi 3,3,16 - bdnz .Loop_xts_dec_short - - vperm 1,1,0,7 - .long 0x10420D48 - lvx 1,3,6 - li 3,16 - vperm 0,0,1,7 - vxor 0,0,12 - .long 0x10620549 - - - nop - - .long 0x7C602799 - - vor 2,4,4 - lvx 4,0,10 - - lvx 0,0,6 - lvx 1,3,6 - addi 3,3,16 - vperm 2,2,4,5 - vperm 0,0,1,7 - - lvsr 5,0,5 - vxor 4,4,4 - vspltisb 11,-1 - vperm 4,4,11,5 - vsel 2,2,3,4 - - vxor 0,0,8 - vxor 2,2,0 - lvx 0,3,6 - addi 3,3,16 - - subi 11,4,1 - mtctr 5 - li 5,16 -.Loop_xts_dec_steal: - lbzu 0,1(11) - stb 0,16(11) - bdnz .Loop_xts_dec_steal - - mtctr 9 - b .Loop_xts_dec - -.Lxts_dec_done: - cmpldi 8,0 - beq .Lxts_dec_ret - - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 8,8,11 - - - .long 0x7D004799 - -.Lxts_dec_ret: - or 12,12,12 - li 3,0 - blr -.long 0 -.byte 0,12,0x04,0,0x80,6,6,0 -.long 0 -.size aes_p8_xts_decrypt,.-aes_p8_xts_decrypt -.align 5 -_aesp8_xts_encrypt6x: - stdu 1,-448(1) - mflr 11 - li 7,207 - li 3,223 - std 11,464(1) - stvx 20,7,1 - addi 7,7,32 - stvx 21,3,1 - addi 3,3,32 - stvx 22,7,1 - addi 7,7,32 - stvx 23,3,1 - addi 3,3,32 - stvx 24,7,1 - addi 7,7,32 - stvx 25,3,1 - addi 3,3,32 - stvx 26,7,1 - addi 7,7,32 - stvx 27,3,1 - addi 3,3,32 - stvx 28,7,1 - addi 7,7,32 - stvx 29,3,1 - addi 3,3,32 - stvx 30,7,1 - stvx 31,3,1 - li 0,-1 - stw 12,396(1) - li 3,0x10 - std 26,400(1) - li 26,0x20 - std 27,408(1) - li 27,0x30 - std 28,416(1) - li 28,0x40 - std 29,424(1) - li 29,0x50 - std 30,432(1) - li 30,0x60 - std 31,440(1) - li 31,0x70 - or 0,0,0 - - subi 9,9,3 - - lvx 23,0,6 - lvx 30,3,6 - addi 6,6,0x20 - lvx 31,0,6 - vperm 23,23,30,7 - addi 7,1,64+15 - mtctr 9 - -.Load_xts_enc_key: - vperm 24,30,31,7 - lvx 30,3,6 - addi 6,6,0x20 - stvx 24,0,7 - vperm 25,31,30,7 - lvx 31,0,6 - stvx 25,3,7 - addi 7,7,0x20 - bdnz .Load_xts_enc_key - - lvx 26,3,6 - vperm 24,30,31,7 - lvx 27,26,6 - stvx 24,0,7 - vperm 25,31,26,7 - lvx 28,27,6 - stvx 25,3,7 - addi 7,1,64+15 - vperm 26,26,27,7 - lvx 29,28,6 - vperm 27,27,28,7 - lvx 30,29,6 - vperm 28,28,29,7 - lvx 31,30,6 - vperm 29,29,30,7 - lvx 22,31,6 - vperm 30,30,31,7 - lvx 24,0,7 - vperm 31,31,22,7 - lvx 25,3,7 - - vperm 0,2,4,5 - subi 10,10,31 - vxor 17,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 7,0,17 - vxor 8,8,11 - - .long 0x7C235699 - vxor 18,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 12,1,18 - vxor 8,8,11 - - .long 0x7C5A5699 - andi. 31,5,15 - vxor 19,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 13,2,19 - vxor 8,8,11 - - .long 0x7C7B5699 - sub 5,5,31 - vxor 20,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 14,3,20 - vxor 8,8,11 - - .long 0x7C9C5699 - subi 5,5,0x60 - vxor 21,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 15,4,21 - vxor 8,8,11 - - .long 0x7CBD5699 - addi 10,10,0x60 - vxor 22,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 16,5,22 - vxor 8,8,11 - - vxor 31,31,23 - mtctr 9 - b .Loop_xts_enc6x - -.align 5 -.Loop_xts_enc6x: - .long 0x10E7C508 - .long 0x118CC508 - .long 0x11ADC508 - .long 0x11CEC508 - .long 0x11EFC508 - .long 0x1210C508 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD08 - .long 0x118CCD08 - .long 0x11ADCD08 - .long 0x11CECD08 - .long 0x11EFCD08 - .long 0x1210CD08 - lvx 25,3,7 - bdnz .Loop_xts_enc6x - - subic 5,5,96 - vxor 0,17,31 - .long 0x10E7C508 - .long 0x118CC508 - vsrab 11,8,9 - vxor 17,8,23 - vaddubm 8,8,8 - .long 0x11ADC508 - .long 0x11CEC508 - vsldoi 11,11,11,15 - .long 0x11EFC508 - .long 0x1210C508 - - subfe. 0,0,0 - vand 11,11,10 - .long 0x10E7CD08 - .long 0x118CCD08 - vxor 8,8,11 - .long 0x11ADCD08 - .long 0x11CECD08 - vxor 1,18,31 - vsrab 11,8,9 - vxor 18,8,23 - .long 0x11EFCD08 - .long 0x1210CD08 - - and 0,0,5 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x10E7D508 - .long 0x118CD508 - vand 11,11,10 - .long 0x11ADD508 - .long 0x11CED508 - vxor 8,8,11 - .long 0x11EFD508 - .long 0x1210D508 - - add 10,10,0 - - - - vxor 2,19,31 - vsrab 11,8,9 - vxor 19,8,23 - vaddubm 8,8,8 - .long 0x10E7DD08 - .long 0x118CDD08 - vsldoi 11,11,11,15 - .long 0x11ADDD08 - .long 0x11CEDD08 - vand 11,11,10 - .long 0x11EFDD08 - .long 0x1210DD08 - - addi 7,1,64+15 - vxor 8,8,11 - .long 0x10E7E508 - .long 0x118CE508 - vxor 3,20,31 - vsrab 11,8,9 - vxor 20,8,23 - .long 0x11ADE508 - .long 0x11CEE508 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x11EFE508 - .long 0x1210E508 - lvx 24,0,7 - vand 11,11,10 - - .long 0x10E7ED08 - .long 0x118CED08 - vxor 8,8,11 - .long 0x11ADED08 - .long 0x11CEED08 - vxor 4,21,31 - vsrab 11,8,9 - vxor 21,8,23 - .long 0x11EFED08 - .long 0x1210ED08 - lvx 25,3,7 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - .long 0x10E7F508 - .long 0x118CF508 - vand 11,11,10 - .long 0x11ADF508 - .long 0x11CEF508 - vxor 8,8,11 - .long 0x11EFF508 - .long 0x1210F508 - vxor 5,22,31 - vsrab 11,8,9 - vxor 22,8,23 - - .long 0x10E70509 - .long 0x7C005699 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x118C0D09 - .long 0x7C235699 - .long 0x11AD1509 - - .long 0x7C5A5699 - vand 11,11,10 - .long 0x11CE1D09 - - .long 0x7C7B5699 - .long 0x11EF2509 - - .long 0x7C9C5699 - vxor 8,8,11 - .long 0x11702D09 - - - .long 0x7CBD5699 - addi 10,10,0x60 - - - - - - .long 0x7CE02799 - vxor 7,0,17 - - .long 0x7D832799 - vxor 12,1,18 - - .long 0x7DBA2799 - vxor 13,2,19 - - .long 0x7DDB2799 - vxor 14,3,20 - - .long 0x7DFC2799 - vxor 15,4,21 - - .long 0x7D7D2799 - vxor 16,5,22 - addi 4,4,0x60 - - mtctr 9 - beq .Loop_xts_enc6x - - addic. 5,5,0x60 - beq .Lxts_enc6x_zero - cmpwi 5,0x20 - blt .Lxts_enc6x_one - nop - beq .Lxts_enc6x_two - cmpwi 5,0x40 - blt .Lxts_enc6x_three - nop - beq .Lxts_enc6x_four - -.Lxts_enc6x_five: - vxor 7,1,17 - vxor 12,2,18 - vxor 13,3,19 - vxor 14,4,20 - vxor 15,5,21 - - bl _aesp8_xts_enc5x - - - vor 17,22,22 - - .long 0x7CE02799 - - .long 0x7D832799 - - .long 0x7DBA2799 - vxor 11,15,22 - - .long 0x7DDB2799 - .long 0x7DFC2799 - addi 4,4,0x50 - bne .Lxts_enc6x_steal - b .Lxts_enc6x_done - -.align 4 -.Lxts_enc6x_four: - vxor 7,2,17 - vxor 12,3,18 - vxor 13,4,19 - vxor 14,5,20 - vxor 15,15,15 - - bl _aesp8_xts_enc5x - - - vor 17,21,21 - - .long 0x7CE02799 - - .long 0x7D832799 - vxor 11,14,21 - - .long 0x7DBA2799 - .long 0x7DDB2799 - addi 4,4,0x40 - bne .Lxts_enc6x_steal - b .Lxts_enc6x_done - -.align 4 -.Lxts_enc6x_three: - vxor 7,3,17 - vxor 12,4,18 - vxor 13,5,19 - vxor 14,14,14 - vxor 15,15,15 - - bl _aesp8_xts_enc5x - - - vor 17,20,20 - - .long 0x7CE02799 - vxor 11,13,20 - - .long 0x7D832799 - .long 0x7DBA2799 - addi 4,4,0x30 - bne .Lxts_enc6x_steal - b .Lxts_enc6x_done - -.align 4 -.Lxts_enc6x_two: - vxor 7,4,17 - vxor 12,5,18 - vxor 13,13,13 - vxor 14,14,14 - vxor 15,15,15 - - bl _aesp8_xts_enc5x - - - vor 17,19,19 - vxor 11,12,19 - - .long 0x7CE02799 - .long 0x7D832799 - addi 4,4,0x20 - bne .Lxts_enc6x_steal - b .Lxts_enc6x_done - -.align 4 -.Lxts_enc6x_one: - vxor 7,5,17 - nop -.Loop_xts_enc1x: - .long 0x10E7C508 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD08 - lvx 25,3,7 - bdnz .Loop_xts_enc1x - - add 10,10,31 - cmpwi 31,0 - .long 0x10E7C508 - - subi 10,10,16 - .long 0x10E7CD08 - - lvsr 5,0,31 - .long 0x10E7D508 - - .long 0x7C005699 - .long 0x10E7DD08 - - addi 7,1,64+15 - .long 0x10E7E508 - lvx 24,0,7 - - .long 0x10E7ED08 - lvx 25,3,7 - vxor 17,17,31 - - - .long 0x10E7F508 - - vperm 0,0,0,5 - .long 0x10E78D09 - - vor 17,18,18 - vxor 11,7,18 - - .long 0x7CE02799 - addi 4,4,0x10 - bne .Lxts_enc6x_steal - b .Lxts_enc6x_done - -.align 4 -.Lxts_enc6x_zero: - cmpwi 31,0 - beq .Lxts_enc6x_done - - add 10,10,31 - subi 10,10,16 - .long 0x7C005699 - lvsr 5,0,31 - - vperm 0,0,0,5 - vxor 11,11,17 -.Lxts_enc6x_steal: - vxor 0,0,17 - vxor 7,7,7 - vspltisb 12,-1 - vperm 7,7,12,5 - vsel 7,0,11,7 - - subi 30,4,17 - subi 4,4,16 - mtctr 31 -.Loop_xts_enc6x_steal: - lbzu 0,1(30) - stb 0,16(30) - bdnz .Loop_xts_enc6x_steal - - li 31,0 - mtctr 9 - b .Loop_xts_enc1x - -.align 4 -.Lxts_enc6x_done: - cmpldi 8,0 - beq .Lxts_enc6x_ret - - vxor 8,17,23 - - .long 0x7D004799 - -.Lxts_enc6x_ret: - mtlr 11 - li 10,79 - li 11,95 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - - or 12,12,12 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - ld 26,400(1) - ld 27,408(1) - ld 28,416(1) - ld 29,424(1) - ld 30,432(1) - ld 31,440(1) - addi 1,1,448 - blr -.long 0 -.byte 0,12,0x04,1,0x80,6,6,0 -.long 0 - -.align 5 -_aesp8_xts_enc5x: - .long 0x10E7C508 - .long 0x118CC508 - .long 0x11ADC508 - .long 0x11CEC508 - .long 0x11EFC508 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD08 - .long 0x118CCD08 - .long 0x11ADCD08 - .long 0x11CECD08 - .long 0x11EFCD08 - lvx 25,3,7 - bdnz _aesp8_xts_enc5x - - add 10,10,31 - cmpwi 31,0 - .long 0x10E7C508 - .long 0x118CC508 - .long 0x11ADC508 - .long 0x11CEC508 - .long 0x11EFC508 - - subi 10,10,16 - .long 0x10E7CD08 - .long 0x118CCD08 - .long 0x11ADCD08 - .long 0x11CECD08 - .long 0x11EFCD08 - vxor 17,17,31 - - .long 0x10E7D508 - lvsr 5,0,31 - .long 0x118CD508 - .long 0x11ADD508 - .long 0x11CED508 - .long 0x11EFD508 - vxor 1,18,31 - - .long 0x10E7DD08 - .long 0x7C005699 - .long 0x118CDD08 - .long 0x11ADDD08 - .long 0x11CEDD08 - .long 0x11EFDD08 - vxor 2,19,31 - - addi 7,1,64+15 - .long 0x10E7E508 - .long 0x118CE508 - .long 0x11ADE508 - .long 0x11CEE508 - .long 0x11EFE508 - lvx 24,0,7 - vxor 3,20,31 - - .long 0x10E7ED08 - - .long 0x118CED08 - .long 0x11ADED08 - .long 0x11CEED08 - .long 0x11EFED08 - lvx 25,3,7 - vxor 4,21,31 - - .long 0x10E7F508 - vperm 0,0,0,5 - .long 0x118CF508 - .long 0x11ADF508 - .long 0x11CEF508 - .long 0x11EFF508 - - .long 0x10E78D09 - .long 0x118C0D09 - .long 0x11AD1509 - .long 0x11CE1D09 - .long 0x11EF2509 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.align 5 -_aesp8_xts_decrypt6x: - stdu 1,-448(1) - mflr 11 - li 7,207 - li 3,223 - std 11,464(1) - stvx 20,7,1 - addi 7,7,32 - stvx 21,3,1 - addi 3,3,32 - stvx 22,7,1 - addi 7,7,32 - stvx 23,3,1 - addi 3,3,32 - stvx 24,7,1 - addi 7,7,32 - stvx 25,3,1 - addi 3,3,32 - stvx 26,7,1 - addi 7,7,32 - stvx 27,3,1 - addi 3,3,32 - stvx 28,7,1 - addi 7,7,32 - stvx 29,3,1 - addi 3,3,32 - stvx 30,7,1 - stvx 31,3,1 - li 0,-1 - stw 12,396(1) - li 3,0x10 - std 26,400(1) - li 26,0x20 - std 27,408(1) - li 27,0x30 - std 28,416(1) - li 28,0x40 - std 29,424(1) - li 29,0x50 - std 30,432(1) - li 30,0x60 - std 31,440(1) - li 31,0x70 - or 0,0,0 - - subi 9,9,3 - - lvx 23,0,6 - lvx 30,3,6 - addi 6,6,0x20 - lvx 31,0,6 - vperm 23,23,30,7 - addi 7,1,64+15 - mtctr 9 - -.Load_xts_dec_key: - vperm 24,30,31,7 - lvx 30,3,6 - addi 6,6,0x20 - stvx 24,0,7 - vperm 25,31,30,7 - lvx 31,0,6 - stvx 25,3,7 - addi 7,7,0x20 - bdnz .Load_xts_dec_key - - lvx 26,3,6 - vperm 24,30,31,7 - lvx 27,26,6 - stvx 24,0,7 - vperm 25,31,26,7 - lvx 28,27,6 - stvx 25,3,7 - addi 7,1,64+15 - vperm 26,26,27,7 - lvx 29,28,6 - vperm 27,27,28,7 - lvx 30,29,6 - vperm 28,28,29,7 - lvx 31,30,6 - vperm 29,29,30,7 - lvx 22,31,6 - vperm 30,30,31,7 - lvx 24,0,7 - vperm 31,31,22,7 - lvx 25,3,7 - - vperm 0,2,4,5 - subi 10,10,31 - vxor 17,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 7,0,17 - vxor 8,8,11 - - .long 0x7C235699 - vxor 18,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 12,1,18 - vxor 8,8,11 - - .long 0x7C5A5699 - andi. 31,5,15 - vxor 19,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 13,2,19 - vxor 8,8,11 - - .long 0x7C7B5699 - sub 5,5,31 - vxor 20,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 14,3,20 - vxor 8,8,11 - - .long 0x7C9C5699 - subi 5,5,0x60 - vxor 21,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 15,4,21 - vxor 8,8,11 - - .long 0x7CBD5699 - addi 10,10,0x60 - vxor 22,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - vand 11,11,10 - vxor 16,5,22 - vxor 8,8,11 - - vxor 31,31,23 - mtctr 9 - b .Loop_xts_dec6x - -.align 5 -.Loop_xts_dec6x: - .long 0x10E7C548 - .long 0x118CC548 - .long 0x11ADC548 - .long 0x11CEC548 - .long 0x11EFC548 - .long 0x1210C548 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD48 - .long 0x118CCD48 - .long 0x11ADCD48 - .long 0x11CECD48 - .long 0x11EFCD48 - .long 0x1210CD48 - lvx 25,3,7 - bdnz .Loop_xts_dec6x - - subic 5,5,96 - vxor 0,17,31 - .long 0x10E7C548 - .long 0x118CC548 - vsrab 11,8,9 - vxor 17,8,23 - vaddubm 8,8,8 - .long 0x11ADC548 - .long 0x11CEC548 - vsldoi 11,11,11,15 - .long 0x11EFC548 - .long 0x1210C548 - - subfe. 0,0,0 - vand 11,11,10 - .long 0x10E7CD48 - .long 0x118CCD48 - vxor 8,8,11 - .long 0x11ADCD48 - .long 0x11CECD48 - vxor 1,18,31 - vsrab 11,8,9 - vxor 18,8,23 - .long 0x11EFCD48 - .long 0x1210CD48 - - and 0,0,5 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x10E7D548 - .long 0x118CD548 - vand 11,11,10 - .long 0x11ADD548 - .long 0x11CED548 - vxor 8,8,11 - .long 0x11EFD548 - .long 0x1210D548 - - add 10,10,0 - - - - vxor 2,19,31 - vsrab 11,8,9 - vxor 19,8,23 - vaddubm 8,8,8 - .long 0x10E7DD48 - .long 0x118CDD48 - vsldoi 11,11,11,15 - .long 0x11ADDD48 - .long 0x11CEDD48 - vand 11,11,10 - .long 0x11EFDD48 - .long 0x1210DD48 - - addi 7,1,64+15 - vxor 8,8,11 - .long 0x10E7E548 - .long 0x118CE548 - vxor 3,20,31 - vsrab 11,8,9 - vxor 20,8,23 - .long 0x11ADE548 - .long 0x11CEE548 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x11EFE548 - .long 0x1210E548 - lvx 24,0,7 - vand 11,11,10 - - .long 0x10E7ED48 - .long 0x118CED48 - vxor 8,8,11 - .long 0x11ADED48 - .long 0x11CEED48 - vxor 4,21,31 - vsrab 11,8,9 - vxor 21,8,23 - .long 0x11EFED48 - .long 0x1210ED48 - lvx 25,3,7 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - .long 0x10E7F548 - .long 0x118CF548 - vand 11,11,10 - .long 0x11ADF548 - .long 0x11CEF548 - vxor 8,8,11 - .long 0x11EFF548 - .long 0x1210F548 - vxor 5,22,31 - vsrab 11,8,9 - vxor 22,8,23 - - .long 0x10E70549 - .long 0x7C005699 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x118C0D49 - .long 0x7C235699 - .long 0x11AD1549 - - .long 0x7C5A5699 - vand 11,11,10 - .long 0x11CE1D49 - - .long 0x7C7B5699 - .long 0x11EF2549 - - .long 0x7C9C5699 - vxor 8,8,11 - .long 0x12102D49 - - .long 0x7CBD5699 - addi 10,10,0x60 - - - - - - .long 0x7CE02799 - vxor 7,0,17 - - .long 0x7D832799 - vxor 12,1,18 - - .long 0x7DBA2799 - vxor 13,2,19 - - .long 0x7DDB2799 - vxor 14,3,20 - - .long 0x7DFC2799 - vxor 15,4,21 - .long 0x7E1D2799 - vxor 16,5,22 - addi 4,4,0x60 - - mtctr 9 - beq .Loop_xts_dec6x - - addic. 5,5,0x60 - beq .Lxts_dec6x_zero - cmpwi 5,0x20 - blt .Lxts_dec6x_one - nop - beq .Lxts_dec6x_two - cmpwi 5,0x40 - blt .Lxts_dec6x_three - nop - beq .Lxts_dec6x_four - -.Lxts_dec6x_five: - vxor 7,1,17 - vxor 12,2,18 - vxor 13,3,19 - vxor 14,4,20 - vxor 15,5,21 - - bl _aesp8_xts_dec5x - - - vor 17,22,22 - vxor 18,8,23 - - .long 0x7CE02799 - vxor 7,0,18 - - .long 0x7D832799 - - .long 0x7DBA2799 - - .long 0x7DDB2799 - .long 0x7DFC2799 - addi 4,4,0x50 - bne .Lxts_dec6x_steal - b .Lxts_dec6x_done - -.align 4 -.Lxts_dec6x_four: - vxor 7,2,17 - vxor 12,3,18 - vxor 13,4,19 - vxor 14,5,20 - vxor 15,15,15 - - bl _aesp8_xts_dec5x - - - vor 17,21,21 - vor 18,22,22 - - .long 0x7CE02799 - vxor 7,0,22 - - .long 0x7D832799 - - .long 0x7DBA2799 - .long 0x7DDB2799 - addi 4,4,0x40 - bne .Lxts_dec6x_steal - b .Lxts_dec6x_done - -.align 4 -.Lxts_dec6x_three: - vxor 7,3,17 - vxor 12,4,18 - vxor 13,5,19 - vxor 14,14,14 - vxor 15,15,15 - - bl _aesp8_xts_dec5x - - - vor 17,20,20 - vor 18,21,21 - - .long 0x7CE02799 - vxor 7,0,21 - - .long 0x7D832799 - .long 0x7DBA2799 - addi 4,4,0x30 - bne .Lxts_dec6x_steal - b .Lxts_dec6x_done - -.align 4 -.Lxts_dec6x_two: - vxor 7,4,17 - vxor 12,5,18 - vxor 13,13,13 - vxor 14,14,14 - vxor 15,15,15 - - bl _aesp8_xts_dec5x - - - vor 17,19,19 - vor 18,20,20 - - .long 0x7CE02799 - vxor 7,0,20 - .long 0x7D832799 - addi 4,4,0x20 - bne .Lxts_dec6x_steal - b .Lxts_dec6x_done - -.align 4 -.Lxts_dec6x_one: - vxor 7,5,17 - nop -.Loop_xts_dec1x: - .long 0x10E7C548 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD48 - lvx 25,3,7 - bdnz .Loop_xts_dec1x - - subi 0,31,1 - .long 0x10E7C548 - - andi. 0,0,16 - cmpwi 31,0 - .long 0x10E7CD48 - - sub 10,10,0 - .long 0x10E7D548 - - .long 0x7C005699 - .long 0x10E7DD48 - - addi 7,1,64+15 - .long 0x10E7E548 - lvx 24,0,7 - - .long 0x10E7ED48 - lvx 25,3,7 - vxor 17,17,31 - - - .long 0x10E7F548 - - mtctr 9 - .long 0x10E78D49 - - vor 17,18,18 - vor 18,19,19 - - .long 0x7CE02799 - addi 4,4,0x10 - vxor 7,0,19 - bne .Lxts_dec6x_steal - b .Lxts_dec6x_done - -.align 4 -.Lxts_dec6x_zero: - cmpwi 31,0 - beq .Lxts_dec6x_done - - .long 0x7C005699 - - vxor 7,0,18 -.Lxts_dec6x_steal: - .long 0x10E7C548 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD48 - lvx 25,3,7 - bdnz .Lxts_dec6x_steal - - add 10,10,31 - .long 0x10E7C548 - - cmpwi 31,0 - .long 0x10E7CD48 - - .long 0x7C005699 - .long 0x10E7D548 - - lvsr 5,0,31 - .long 0x10E7DD48 - - addi 7,1,64+15 - .long 0x10E7E548 - lvx 24,0,7 - - .long 0x10E7ED48 - lvx 25,3,7 - vxor 18,18,31 - - - .long 0x10E7F548 - - vperm 0,0,0,5 - .long 0x11679549 - - - - .long 0x7D602799 - - vxor 7,7,7 - vspltisb 12,-1 - vperm 7,7,12,5 - vsel 7,0,11,7 - vxor 7,7,17 - - subi 30,4,1 - mtctr 31 -.Loop_xts_dec6x_steal: - lbzu 0,1(30) - stb 0,16(30) - bdnz .Loop_xts_dec6x_steal - - li 31,0 - mtctr 9 - b .Loop_xts_dec1x - -.align 4 -.Lxts_dec6x_done: - cmpldi 8,0 - beq .Lxts_dec6x_ret - - vxor 8,17,23 - - .long 0x7D004799 - -.Lxts_dec6x_ret: - mtlr 11 - li 10,79 - li 11,95 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - - or 12,12,12 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - ld 26,400(1) - ld 27,408(1) - ld 28,416(1) - ld 29,424(1) - ld 30,432(1) - ld 31,440(1) - addi 1,1,448 - blr -.long 0 -.byte 0,12,0x04,1,0x80,6,6,0 -.long 0 - -.align 5 -_aesp8_xts_dec5x: - .long 0x10E7C548 - .long 0x118CC548 - .long 0x11ADC548 - .long 0x11CEC548 - .long 0x11EFC548 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD48 - .long 0x118CCD48 - .long 0x11ADCD48 - .long 0x11CECD48 - .long 0x11EFCD48 - lvx 25,3,7 - bdnz _aesp8_xts_dec5x - - subi 0,31,1 - .long 0x10E7C548 - .long 0x118CC548 - .long 0x11ADC548 - .long 0x11CEC548 - .long 0x11EFC548 - - andi. 0,0,16 - cmpwi 31,0 - .long 0x10E7CD48 - .long 0x118CCD48 - .long 0x11ADCD48 - .long 0x11CECD48 - .long 0x11EFCD48 - vxor 17,17,31 - - sub 10,10,0 - .long 0x10E7D548 - .long 0x118CD548 - .long 0x11ADD548 - .long 0x11CED548 - .long 0x11EFD548 - vxor 1,18,31 - - .long 0x10E7DD48 - .long 0x7C005699 - .long 0x118CDD48 - .long 0x11ADDD48 - .long 0x11CEDD48 - .long 0x11EFDD48 - vxor 2,19,31 - - addi 7,1,64+15 - .long 0x10E7E548 - .long 0x118CE548 - .long 0x11ADE548 - .long 0x11CEE548 - .long 0x11EFE548 - lvx 24,0,7 - vxor 3,20,31 - - .long 0x10E7ED48 - - .long 0x118CED48 - .long 0x11ADED48 - .long 0x11CEED48 - .long 0x11EFED48 - lvx 25,3,7 - vxor 4,21,31 - - .long 0x10E7F548 - .long 0x118CF548 - .long 0x11ADF548 - .long 0x11CEF548 - .long 0x11EFF548 - - .long 0x10E78D49 - .long 0x118C0D49 - .long 0x11AD1549 - .long 0x11CE1D49 - .long 0x11EF2549 - mtctr 9 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 diff --git a/sys/crypto/openssl/powerpc64/chacha-ppc.S b/sys/crypto/openssl/powerpc64/chacha-ppc.S deleted file mode 100644 index ef057762831..00000000000 --- a/sys/crypto/openssl/powerpc64/chacha-ppc.S +++ /dev/null @@ -1,1499 +0,0 @@ -/* Do not modify. This file is auto-generated from chacha-ppc.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl ChaCha20_ctr32_int -.type ChaCha20_ctr32_int,@function -.align 5 -ChaCha20_ctr32_int: -.localentry ChaCha20_ctr32_int,0 - -__ChaCha20_ctr32_int: - cmpldi 5,0 - .long 0x4DC20020 - - stdu 1,-256(1) - mflr 0 - - std 14,112(1) - std 15,120(1) - std 16,128(1) - std 17,136(1) - std 18,144(1) - std 19,152(1) - std 20,160(1) - std 21,168(1) - std 22,176(1) - std 23,184(1) - std 24,192(1) - std 25,200(1) - std 26,208(1) - std 27,216(1) - std 28,224(1) - std 29,232(1) - std 30,240(1) - std 31,248(1) - std 0,272(1) - - lwz 11,0(7) - lwz 12,4(7) - lwz 14,8(7) - lwz 15,12(7) - - bl __ChaCha20_1x - - ld 0,272(1) - ld 14,112(1) - ld 15,120(1) - ld 16,128(1) - ld 17,136(1) - ld 18,144(1) - ld 19,152(1) - ld 20,160(1) - ld 21,168(1) - ld 22,176(1) - ld 23,184(1) - ld 24,192(1) - ld 25,200(1) - ld 26,208(1) - ld 27,216(1) - ld 28,224(1) - ld 29,232(1) - ld 30,240(1) - ld 31,248(1) - mtlr 0 - addi 1,1,256 - blr -.long 0 -.byte 0,12,4,1,0x80,18,5,0 -.long 0 -.size ChaCha20_ctr32_int,.-ChaCha20_ctr32_int - -.align 5 -__ChaCha20_1x: -.Loop_outer: - lis 16,0x6170 - lis 17,0x3320 - lis 18,0x7962 - lis 19,0x6b20 - ori 16,16,0x7865 - ori 17,17,0x646e - ori 18,18,0x2d32 - ori 19,19,0x6574 - - li 0,10 - lwz 20,0(6) - lwz 21,4(6) - lwz 22,8(6) - lwz 23,12(6) - lwz 24,16(6) - mr 28,11 - lwz 25,20(6) - mr 29,12 - lwz 26,24(6) - mr 30,14 - lwz 27,28(6) - mr 31,15 - - mr 7,20 - mr 8,21 - mr 9,22 - mr 10,23 - - mtctr 0 -.Loop: - add 16,16,20 - add 17,17,21 - add 18,18,22 - add 19,19,23 - xor 28,28,16 - xor 29,29,17 - xor 30,30,18 - xor 31,31,19 - rotlwi 28,28,16 - rotlwi 29,29,16 - rotlwi 30,30,16 - rotlwi 31,31,16 - add 24,24,28 - add 25,25,29 - add 26,26,30 - add 27,27,31 - xor 20,20,24 - xor 21,21,25 - xor 22,22,26 - xor 23,23,27 - rotlwi 20,20,12 - rotlwi 21,21,12 - rotlwi 22,22,12 - rotlwi 23,23,12 - add 16,16,20 - add 17,17,21 - add 18,18,22 - add 19,19,23 - xor 28,28,16 - xor 29,29,17 - xor 30,30,18 - xor 31,31,19 - rotlwi 28,28,8 - rotlwi 29,29,8 - rotlwi 30,30,8 - rotlwi 31,31,8 - add 24,24,28 - add 25,25,29 - add 26,26,30 - add 27,27,31 - xor 20,20,24 - xor 21,21,25 - xor 22,22,26 - xor 23,23,27 - rotlwi 20,20,7 - rotlwi 21,21,7 - rotlwi 22,22,7 - rotlwi 23,23,7 - add 16,16,21 - add 17,17,22 - add 18,18,23 - add 19,19,20 - xor 31,31,16 - xor 28,28,17 - xor 29,29,18 - xor 30,30,19 - rotlwi 31,31,16 - rotlwi 28,28,16 - rotlwi 29,29,16 - rotlwi 30,30,16 - add 26,26,31 - add 27,27,28 - add 24,24,29 - add 25,25,30 - xor 21,21,26 - xor 22,22,27 - xor 23,23,24 - xor 20,20,25 - rotlwi 21,21,12 - rotlwi 22,22,12 - rotlwi 23,23,12 - rotlwi 20,20,12 - add 16,16,21 - add 17,17,22 - add 18,18,23 - add 19,19,20 - xor 31,31,16 - xor 28,28,17 - xor 29,29,18 - xor 30,30,19 - rotlwi 31,31,8 - rotlwi 28,28,8 - rotlwi 29,29,8 - rotlwi 30,30,8 - add 26,26,31 - add 27,27,28 - add 24,24,29 - add 25,25,30 - xor 21,21,26 - xor 22,22,27 - xor 23,23,24 - xor 20,20,25 - rotlwi 21,21,7 - rotlwi 22,22,7 - rotlwi 23,23,7 - rotlwi 20,20,7 - bdnz .Loop - - subic 5,5,64 - addi 16,16,0x7865 - addi 17,17,0x646e - addi 18,18,0x2d32 - addi 19,19,0x6574 - addis 16,16,0x6170 - addis 17,17,0x3320 - addis 18,18,0x7962 - addis 19,19,0x6b20 - - subfe. 0,0,0 - add 20,20,7 - lwz 7,16(6) - add 21,21,8 - lwz 8,20(6) - add 22,22,9 - lwz 9,24(6) - add 23,23,10 - lwz 10,28(6) - add 24,24,7 - add 25,25,8 - add 26,26,9 - add 27,27,10 - - add 28,28,11 - add 29,29,12 - add 30,30,14 - add 31,31,15 - addi 11,11,1 - mr 7,16 - rotlwi 16,16,8 - rlwimi 16,7,24,0,7 - rlwimi 16,7,24,16,23 - mr 8,17 - rotlwi 17,17,8 - rlwimi 17,8,24,0,7 - rlwimi 17,8,24,16,23 - mr 9,18 - rotlwi 18,18,8 - rlwimi 18,9,24,0,7 - rlwimi 18,9,24,16,23 - mr 10,19 - rotlwi 19,19,8 - rlwimi 19,10,24,0,7 - rlwimi 19,10,24,16,23 - mr 7,20 - rotlwi 20,20,8 - rlwimi 20,7,24,0,7 - rlwimi 20,7,24,16,23 - mr 8,21 - rotlwi 21,21,8 - rlwimi 21,8,24,0,7 - rlwimi 21,8,24,16,23 - mr 9,22 - rotlwi 22,22,8 - rlwimi 22,9,24,0,7 - rlwimi 22,9,24,16,23 - mr 10,23 - rotlwi 23,23,8 - rlwimi 23,10,24,0,7 - rlwimi 23,10,24,16,23 - mr 7,24 - rotlwi 24,24,8 - rlwimi 24,7,24,0,7 - rlwimi 24,7,24,16,23 - mr 8,25 - rotlwi 25,25,8 - rlwimi 25,8,24,0,7 - rlwimi 25,8,24,16,23 - mr 9,26 - rotlwi 26,26,8 - rlwimi 26,9,24,0,7 - rlwimi 26,9,24,16,23 - mr 10,27 - rotlwi 27,27,8 - rlwimi 27,10,24,0,7 - rlwimi 27,10,24,16,23 - mr 7,28 - rotlwi 28,28,8 - rlwimi 28,7,24,0,7 - rlwimi 28,7,24,16,23 - mr 8,29 - rotlwi 29,29,8 - rlwimi 29,8,24,0,7 - rlwimi 29,8,24,16,23 - mr 9,30 - rotlwi 30,30,8 - rlwimi 30,9,24,0,7 - rlwimi 30,9,24,16,23 - mr 10,31 - rotlwi 31,31,8 - rlwimi 31,10,24,0,7 - rlwimi 31,10,24,16,23 - bne .Ltail - - lwz 7,0(4) - lwz 8,4(4) - cmpldi 5,0 - lwz 9,8(4) - lwz 10,12(4) - xor 16,16,7 - lwz 7,16(4) - xor 17,17,8 - lwz 8,20(4) - xor 18,18,9 - lwz 9,24(4) - xor 19,19,10 - lwz 10,28(4) - xor 20,20,7 - lwz 7,32(4) - xor 21,21,8 - lwz 8,36(4) - xor 22,22,9 - lwz 9,40(4) - xor 23,23,10 - lwz 10,44(4) - xor 24,24,7 - lwz 7,48(4) - xor 25,25,8 - lwz 8,52(4) - xor 26,26,9 - lwz 9,56(4) - xor 27,27,10 - lwz 10,60(4) - xor 28,28,7 - stw 16,0(3) - xor 29,29,8 - stw 17,4(3) - xor 30,30,9 - stw 18,8(3) - xor 31,31,10 - stw 19,12(3) - stw 20,16(3) - stw 21,20(3) - stw 22,24(3) - stw 23,28(3) - stw 24,32(3) - stw 25,36(3) - stw 26,40(3) - stw 27,44(3) - stw 28,48(3) - stw 29,52(3) - stw 30,56(3) - addi 4,4,64 - stw 31,60(3) - addi 3,3,64 - - bne .Loop_outer - - blr - -.align 4 -.Ltail: - addi 5,5,64 - subi 4,4,1 - subi 3,3,1 - addi 7,1,48-1 - mtctr 5 - - stw 16,48(1) - stw 17,52(1) - stw 18,56(1) - stw 19,60(1) - stw 20,64(1) - stw 21,68(1) - stw 22,72(1) - stw 23,76(1) - stw 24,80(1) - stw 25,84(1) - stw 26,88(1) - stw 27,92(1) - stw 28,96(1) - stw 29,100(1) - stw 30,104(1) - stw 31,108(1) - -.Loop_tail: - lbzu 11,1(4) - lbzu 16,1(7) - xor 12,11,16 - stbu 12,1(3) - bdnz .Loop_tail - - stw 1,48(1) - stw 1,52(1) - stw 1,56(1) - stw 1,60(1) - stw 1,64(1) - stw 1,68(1) - stw 1,72(1) - stw 1,76(1) - stw 1,80(1) - stw 1,84(1) - stw 1,88(1) - stw 1,92(1) - stw 1,96(1) - stw 1,100(1) - stw 1,104(1) - stw 1,108(1) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.globl ChaCha20_ctr32_vmx -.type ChaCha20_ctr32_vmx,@function -.align 5 -ChaCha20_ctr32_vmx: -.localentry ChaCha20_ctr32_vmx,0 - - cmpldi 5,256 - blt __ChaCha20_ctr32_int - - stdu 1,-416(1) - mflr 0 - li 10,127 - li 11,143 - li 12,-1 - stvx 23,10,1 - addi 10,10,32 - stvx 24,11,1 - addi 11,11,32 - stvx 25,10,1 - addi 10,10,32 - stvx 26,11,1 - addi 11,11,32 - stvx 27,10,1 - addi 10,10,32 - stvx 28,11,1 - addi 11,11,32 - stvx 29,10,1 - addi 10,10,32 - stvx 30,11,1 - stvx 31,10,1 - stw 12,268(1) - std 14,272(1) - std 15,280(1) - std 16,288(1) - std 17,296(1) - std 18,304(1) - std 19,312(1) - std 20,320(1) - std 21,328(1) - std 22,336(1) - std 23,344(1) - std 24,352(1) - std 25,360(1) - std 26,368(1) - std 27,376(1) - std 28,384(1) - std 29,392(1) - std 30,400(1) - std 31,408(1) - li 12,-4096+511 - std 0, 432(1) - or 12,12,12 - - bl .Lconsts - li 16,16 - li 17,32 - li 18,48 - li 19,64 - li 20,31 - li 21,15 - - lvx 13,0,6 - lvsl 29,0,6 - lvx 14,16,6 - lvx 27,20,6 - - lvx 15,0,7 - lvsl 30,0,7 - lvx 28,21,7 - - lvx 12,0,12 - lvx 17,16,12 - lvx 18,17,12 - lvx 19,18,12 - lvx 23,19,12 - - vperm 13,13,14,29 - vperm 14,14,27,29 - vperm 15,15,28,30 - - lwz 11,0(7) - lwz 12,4(7) - vadduwm 15,15,17 - lwz 14,8(7) - vadduwm 16,15,17 - lwz 15,12(7) - vadduwm 17,16,17 - - vxor 29,29,29 - vspltisw 26,-1 - lvsl 24,0,4 - lvsr 25,0,3 - vperm 26,29,26,25 - - lvsl 29,0,16 - vspltisb 30,3 - vxor 29,29,30 - vxor 25,25,30 - vperm 24,24,24,29 - - li 0,10 - b .Loop_outer_vmx - -.align 4 -.Loop_outer_vmx: - lis 16,0x6170 - lis 17,0x3320 - vor 0,12,12 - lis 18,0x7962 - lis 19,0x6b20 - vor 4,12,12 - ori 16,16,0x7865 - ori 17,17,0x646e - vor 8,12,12 - ori 18,18,0x2d32 - ori 19,19,0x6574 - vor 1,13,13 - - lwz 20,0(6) - vor 5,13,13 - lwz 21,4(6) - vor 9,13,13 - lwz 22,8(6) - vor 2,14,14 - lwz 23,12(6) - vor 6,14,14 - lwz 24,16(6) - vor 10,14,14 - mr 28,11 - lwz 25,20(6) - vor 3,15,15 - mr 29,12 - lwz 26,24(6) - vor 7,16,16 - mr 30,14 - lwz 27,28(6) - vor 11,17,17 - mr 31,15 - - mr 7,20 - mr 8,21 - mr 9,22 - mr 10,23 - - vspltisw 27,12 - vspltisw 28,7 - - mtctr 0 - nop -.Loop_vmx: - vadduwm 0,0,1 - vadduwm 4,4,5 - vadduwm 8,8,9 - add 16,16,20 - add 17,17,21 - add 18,18,22 - vxor 3,3,0 - vxor 7,7,4 - vxor 11,11,8 - add 19,19,23 - xor 28,28,16 - xor 29,29,17 - vperm 3,3,3,19 - vperm 7,7,7,19 - vperm 11,11,11,19 - xor 30,30,18 - xor 31,31,19 - rotlwi 28,28,16 - vadduwm 2,2,3 - vadduwm 6,6,7 - vadduwm 10,10,11 - rotlwi 29,29,16 - rotlwi 30,30,16 - rotlwi 31,31,16 - vxor 1,1,2 - vxor 5,5,6 - vxor 9,9,10 - add 24,24,28 - add 25,25,29 - add 26,26,30 - vrlw 1,1,27 - vrlw 5,5,27 - vrlw 9,9,27 - add 27,27,31 - xor 20,20,24 - xor 21,21,25 - vadduwm 0,0,1 - vadduwm 4,4,5 - vadduwm 8,8,9 - xor 22,22,26 - xor 23,23,27 - rotlwi 20,20,12 - vxor 3,3,0 - vxor 7,7,4 - vxor 11,11,8 - rotlwi 21,21,12 - rotlwi 22,22,12 - rotlwi 23,23,12 - vperm 3,3,3,23 - vperm 7,7,7,23 - vperm 11,11,11,23 - add 16,16,20 - add 17,17,21 - add 18,18,22 - vadduwm 2,2,3 - vadduwm 6,6,7 - vadduwm 10,10,11 - add 19,19,23 - xor 28,28,16 - xor 29,29,17 - vxor 1,1,2 - vxor 5,5,6 - vxor 9,9,10 - xor 30,30,18 - xor 31,31,19 - rotlwi 28,28,8 - vrlw 1,1,28 - vrlw 5,5,28 - vrlw 9,9,28 - rotlwi 29,29,8 - rotlwi 30,30,8 - rotlwi 31,31,8 - vsldoi 2,2,2, 16-8 - vsldoi 6,6,6, 16-8 - vsldoi 10,10,10, 16-8 - add 24,24,28 - add 25,25,29 - add 26,26,30 - vsldoi 1,1,1, 16-12 - vsldoi 5,5,5, 16-12 - vsldoi 9,9,9, 16-12 - add 27,27,31 - xor 20,20,24 - xor 21,21,25 - vsldoi 3,3,3, 16-4 - vsldoi 7,7,7, 16-4 - vsldoi 11,11,11, 16-4 - xor 22,22,26 - xor 23,23,27 - rotlwi 20,20,7 - rotlwi 21,21,7 - rotlwi 22,22,7 - rotlwi 23,23,7 - vadduwm 0,0,1 - vadduwm 4,4,5 - vadduwm 8,8,9 - add 16,16,21 - add 17,17,22 - add 18,18,23 - vxor 3,3,0 - vxor 7,7,4 - vxor 11,11,8 - add 19,19,20 - xor 31,31,16 - xor 28,28,17 - vperm 3,3,3,19 - vperm 7,7,7,19 - vperm 11,11,11,19 - xor 29,29,18 - xor 30,30,19 - rotlwi 31,31,16 - vadduwm 2,2,3 - vadduwm 6,6,7 - vadduwm 10,10,11 - rotlwi 28,28,16 - rotlwi 29,29,16 - rotlwi 30,30,16 - vxor 1,1,2 - vxor 5,5,6 - vxor 9,9,10 - add 26,26,31 - add 27,27,28 - add 24,24,29 - vrlw 1,1,27 - vrlw 5,5,27 - vrlw 9,9,27 - add 25,25,30 - xor 21,21,26 - xor 22,22,27 - vadduwm 0,0,1 - vadduwm 4,4,5 - vadduwm 8,8,9 - xor 23,23,24 - xor 20,20,25 - rotlwi 21,21,12 - vxor 3,3,0 - vxor 7,7,4 - vxor 11,11,8 - rotlwi 22,22,12 - rotlwi 23,23,12 - rotlwi 20,20,12 - vperm 3,3,3,23 - vperm 7,7,7,23 - vperm 11,11,11,23 - add 16,16,21 - add 17,17,22 - add 18,18,23 - vadduwm 2,2,3 - vadduwm 6,6,7 - vadduwm 10,10,11 - add 19,19,20 - xor 31,31,16 - xor 28,28,17 - vxor 1,1,2 - vxor 5,5,6 - vxor 9,9,10 - xor 29,29,18 - xor 30,30,19 - rotlwi 31,31,8 - vrlw 1,1,28 - vrlw 5,5,28 - vrlw 9,9,28 - rotlwi 28,28,8 - rotlwi 29,29,8 - rotlwi 30,30,8 - vsldoi 2,2,2, 16-8 - vsldoi 6,6,6, 16-8 - vsldoi 10,10,10, 16-8 - add 26,26,31 - add 27,27,28 - add 24,24,29 - vsldoi 1,1,1, 16-4 - vsldoi 5,5,5, 16-4 - vsldoi 9,9,9, 16-4 - add 25,25,30 - xor 21,21,26 - xor 22,22,27 - vsldoi 3,3,3, 16-12 - vsldoi 7,7,7, 16-12 - vsldoi 11,11,11, 16-12 - xor 23,23,24 - xor 20,20,25 - rotlwi 21,21,7 - rotlwi 22,22,7 - rotlwi 23,23,7 - rotlwi 20,20,7 - bdnz .Loop_vmx - - subi 5,5,256 - addi 16,16,0x7865 - addi 17,17,0x646e - addi 18,18,0x2d32 - addi 19,19,0x6574 - addis 16,16,0x6170 - addis 17,17,0x3320 - addis 18,18,0x7962 - addis 19,19,0x6b20 - add 20,20,7 - lwz 7,16(6) - add 21,21,8 - lwz 8,20(6) - add 22,22,9 - lwz 9,24(6) - add 23,23,10 - lwz 10,28(6) - add 24,24,7 - add 25,25,8 - add 26,26,9 - add 27,27,10 - add 28,28,11 - add 29,29,12 - add 30,30,14 - add 31,31,15 - - vadduwm 0,0,12 - vadduwm 4,4,12 - vadduwm 8,8,12 - vadduwm 1,1,13 - vadduwm 5,5,13 - vadduwm 9,9,13 - vadduwm 2,2,14 - vadduwm 6,6,14 - vadduwm 10,10,14 - vadduwm 3,3,15 - vadduwm 7,7,16 - vadduwm 11,11,17 - - addi 11,11,4 - vadduwm 15,15,18 - vadduwm 16,16,18 - vadduwm 17,17,18 - - mr 7,16 - rotlwi 16,16,8 - rlwimi 16,7,24,0,7 - rlwimi 16,7,24,16,23 - mr 8,17 - rotlwi 17,17,8 - rlwimi 17,8,24,0,7 - rlwimi 17,8,24,16,23 - mr 9,18 - rotlwi 18,18,8 - rlwimi 18,9,24,0,7 - rlwimi 18,9,24,16,23 - mr 10,19 - rotlwi 19,19,8 - rlwimi 19,10,24,0,7 - rlwimi 19,10,24,16,23 - mr 7,20 - rotlwi 20,20,8 - rlwimi 20,7,24,0,7 - rlwimi 20,7,24,16,23 - mr 8,21 - rotlwi 21,21,8 - rlwimi 21,8,24,0,7 - rlwimi 21,8,24,16,23 - mr 9,22 - rotlwi 22,22,8 - rlwimi 22,9,24,0,7 - rlwimi 22,9,24,16,23 - mr 10,23 - rotlwi 23,23,8 - rlwimi 23,10,24,0,7 - rlwimi 23,10,24,16,23 - mr 7,24 - rotlwi 24,24,8 - rlwimi 24,7,24,0,7 - rlwimi 24,7,24,16,23 - mr 8,25 - rotlwi 25,25,8 - rlwimi 25,8,24,0,7 - rlwimi 25,8,24,16,23 - mr 9,26 - rotlwi 26,26,8 - rlwimi 26,9,24,0,7 - rlwimi 26,9,24,16,23 - mr 10,27 - rotlwi 27,27,8 - rlwimi 27,10,24,0,7 - rlwimi 27,10,24,16,23 - mr 7,28 - rotlwi 28,28,8 - rlwimi 28,7,24,0,7 - rlwimi 28,7,24,16,23 - mr 8,29 - rotlwi 29,29,8 - rlwimi 29,8,24,0,7 - rlwimi 29,8,24,16,23 - mr 9,30 - rotlwi 30,30,8 - rlwimi 30,9,24,0,7 - rlwimi 30,9,24,16,23 - mr 10,31 - rotlwi 31,31,8 - rlwimi 31,10,24,0,7 - rlwimi 31,10,24,16,23 - lwz 7,0(4) - lwz 8,4(4) - lwz 9,8(4) - lwz 10,12(4) - xor 16,16,7 - lwz 7,16(4) - xor 17,17,8 - lwz 8,20(4) - xor 18,18,9 - lwz 9,24(4) - xor 19,19,10 - lwz 10,28(4) - xor 20,20,7 - lwz 7,32(4) - xor 21,21,8 - lwz 8,36(4) - xor 22,22,9 - lwz 9,40(4) - xor 23,23,10 - lwz 10,44(4) - xor 24,24,7 - lwz 7,48(4) - xor 25,25,8 - lwz 8,52(4) - xor 26,26,9 - lwz 9,56(4) - xor 27,27,10 - lwz 10,60(4) - xor 28,28,7 - stw 16,0(3) - xor 29,29,8 - stw 17,4(3) - xor 30,30,9 - stw 18,8(3) - xor 31,31,10 - stw 19,12(3) - addi 4,4,64 - stw 20,16(3) - li 7,16 - stw 21,20(3) - li 8,32 - stw 22,24(3) - li 9,48 - stw 23,28(3) - li 10,64 - stw 24,32(3) - stw 25,36(3) - stw 26,40(3) - stw 27,44(3) - stw 28,48(3) - stw 29,52(3) - stw 30,56(3) - stw 31,60(3) - addi 3,3,64 - - lvx 27,0,4 - lvx 28,7,4 - lvx 29,8,4 - lvx 30,9,4 - lvx 31,10,4 - addi 4,4,64 - - vperm 27,27,28,24 - vperm 28,28,29,24 - vperm 29,29,30,24 - vperm 30,30,31,24 - vxor 0,0,27 - vxor 1,1,28 - lvx 28,7,4 - vxor 2,2,29 - lvx 29,8,4 - vxor 3,3,30 - lvx 30,9,4 - lvx 27,10,4 - addi 4,4,64 - li 10,63 - vperm 0,0,0,25 - vperm 1,1,1,25 - vperm 2,2,2,25 - vperm 3,3,3,25 - - vperm 31,31,28,24 - vperm 28,28,29,24 - vperm 29,29,30,24 - vperm 30,30,27,24 - vxor 4,4,31 - vxor 5,5,28 - lvx 28,7,4 - vxor 6,6,29 - lvx 29,8,4 - vxor 7,7,30 - lvx 30,9,4 - lvx 31,10,4 - addi 4,4,64 - vperm 4,4,4,25 - vperm 5,5,5,25 - vperm 6,6,6,25 - vperm 7,7,7,25 - - vperm 27,27,28,24 - vperm 28,28,29,24 - vperm 29,29,30,24 - vperm 30,30,31,24 - vxor 8,8,27 - vxor 9,9,28 - vxor 10,10,29 - vxor 11,11,30 - vperm 8,8,8,25 - vperm 9,9,9,25 - vperm 10,10,10,25 - vperm 11,11,11,25 - - andi. 17,3,15 - mr 16,3 - - vsel 27,0,1,26 - vsel 28,1,2,26 - vsel 29,2,3,26 - vsel 30,3,4,26 - vsel 1,4,5,26 - vsel 2,5,6,26 - vsel 3,6,7,26 - vsel 4,7,8,26 - vsel 5,8,9,26 - vsel 6,9,10,26 - vsel 7,10,11,26 - - - stvx 27,7,3 - stvx 28,8,3 - stvx 29,9,3 - addi 3,3,64 - stvx 30,0,3 - stvx 1,7,3 - stvx 2,8,3 - stvx 3,9,3 - addi 3,3,64 - stvx 4,0,3 - stvx 5,7,3 - stvx 6,8,3 - stvx 7,9,3 - addi 3,3,64 - - beq .Laligned_vmx - - sub 18,3,17 - li 19,0 -.Lunaligned_tail_vmx: - stvebx 11,19,18 - addi 19,19,1 - cmpw 19,17 - bne .Lunaligned_tail_vmx - - sub 18,16,17 -.Lunaligned_head_vmx: - stvebx 0,17,18 - cmpwi 17,15 - addi 17,17,1 - bne .Lunaligned_head_vmx - - cmpldi 5,255 - bgt .Loop_outer_vmx - - b .Ldone_vmx - -.align 4 -.Laligned_vmx: - stvx 0,0,16 - - cmpldi 5,255 - bgt .Loop_outer_vmx - nop - -.Ldone_vmx: - cmpldi 5,0 - bnel __ChaCha20_1x - - lwz 12,268(1) - li 10,127 - li 11,143 - or 12,12,12 - lvx 23,10,1 - addi 10,10,32 - lvx 24,11,1 - addi 11,11,32 - lvx 25,10,1 - addi 10,10,32 - lvx 26,11,1 - addi 11,11,32 - lvx 27,10,1 - addi 10,10,32 - lvx 28,11,1 - addi 11,11,32 - lvx 29,10,1 - addi 10,10,32 - lvx 30,11,1 - lvx 31,10,1 - ld 0, 432(1) - ld 14,272(1) - ld 15,280(1) - ld 16,288(1) - ld 17,296(1) - ld 18,304(1) - ld 19,312(1) - ld 20,320(1) - ld 21,328(1) - ld 22,336(1) - ld 23,344(1) - ld 24,352(1) - ld 25,360(1) - ld 26,368(1) - ld 27,376(1) - ld 28,384(1) - ld 29,392(1) - ld 30,400(1) - ld 31,408(1) - mtlr 0 - addi 1,1,416 - blr -.long 0 -.byte 0,12,0x04,1,0x80,18,5,0 -.long 0 -.size ChaCha20_ctr32_vmx,.-ChaCha20_ctr32_vmx - -.globl ChaCha20_ctr32_vsx -.type ChaCha20_ctr32_vsx,@function -.align 5 -ChaCha20_ctr32_vsx: -.localentry ChaCha20_ctr32_vsx,0 - - stdu 1,-224(1) - mflr 0 - li 10,127 - li 11,143 - li 12,-1 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 12,220(1) - li 12,-4096+63 - std 0, 240(1) - or 12,12,12 - - bl .Lconsts - .long 0x7E006619 - addi 12,12,0x50 - li 8,16 - li 9,32 - li 10,48 - li 11,64 - - .long 0x7E203619 - .long 0x7E483619 - .long 0x7E603E19 - - vxor 27,27,27 - .long 0x7F8B6619 - vspltw 26,19,0 - vsldoi 19,19,27,4 - vsldoi 19,27,19,12 - vadduwm 26,26,28 - - lvsl 31,0,8 - vspltisb 27,3 - vxor 31,31,27 - - li 0,10 - mtctr 0 - b .Loop_outer_vsx - -.align 5 -.Loop_outer_vsx: - lvx 0,0,12 - lvx 1,8,12 - lvx 2,9,12 - lvx 3,10,12 - - vspltw 4,17,0 - vspltw 5,17,1 - vspltw 6,17,2 - vspltw 7,17,3 - - vspltw 8,18,0 - vspltw 9,18,1 - vspltw 10,18,2 - vspltw 11,18,3 - - vor 12,26,26 - vspltw 13,19,1 - vspltw 14,19,2 - vspltw 15,19,3 - - vspltisw 27,-16 - vspltisw 28,12 - vspltisw 29,8 - vspltisw 30,7 - -.Loop_vsx: - vadduwm 0,0,4 - vadduwm 1,1,5 - vadduwm 2,2,6 - vadduwm 3,3,7 - vxor 12,12,0 - vxor 13,13,1 - vxor 14,14,2 - vxor 15,15,3 - vrlw 12,12,27 - vrlw 13,13,27 - vrlw 14,14,27 - vrlw 15,15,27 - vadduwm 8,8,12 - vadduwm 9,9,13 - vadduwm 10,10,14 - vadduwm 11,11,15 - vxor 4,4,8 - vxor 5,5,9 - vxor 6,6,10 - vxor 7,7,11 - vrlw 4,4,28 - vrlw 5,5,28 - vrlw 6,6,28 - vrlw 7,7,28 - vadduwm 0,0,4 - vadduwm 1,1,5 - vadduwm 2,2,6 - vadduwm 3,3,7 - vxor 12,12,0 - vxor 13,13,1 - vxor 14,14,2 - vxor 15,15,3 - vrlw 12,12,29 - vrlw 13,13,29 - vrlw 14,14,29 - vrlw 15,15,29 - vadduwm 8,8,12 - vadduwm 9,9,13 - vadduwm 10,10,14 - vadduwm 11,11,15 - vxor 4,4,8 - vxor 5,5,9 - vxor 6,6,10 - vxor 7,7,11 - vrlw 4,4,30 - vrlw 5,5,30 - vrlw 6,6,30 - vrlw 7,7,30 - vadduwm 0,0,5 - vadduwm 1,1,6 - vadduwm 2,2,7 - vadduwm 3,3,4 - vxor 15,15,0 - vxor 12,12,1 - vxor 13,13,2 - vxor 14,14,3 - vrlw 15,15,27 - vrlw 12,12,27 - vrlw 13,13,27 - vrlw 14,14,27 - vadduwm 10,10,15 - vadduwm 11,11,12 - vadduwm 8,8,13 - vadduwm 9,9,14 - vxor 5,5,10 - vxor 6,6,11 - vxor 7,7,8 - vxor 4,4,9 - vrlw 5,5,28 - vrlw 6,6,28 - vrlw 7,7,28 - vrlw 4,4,28 - vadduwm 0,0,5 - vadduwm 1,1,6 - vadduwm 2,2,7 - vadduwm 3,3,4 - vxor 15,15,0 - vxor 12,12,1 - vxor 13,13,2 - vxor 14,14,3 - vrlw 15,15,29 - vrlw 12,12,29 - vrlw 13,13,29 - vrlw 14,14,29 - vadduwm 10,10,15 - vadduwm 11,11,12 - vadduwm 8,8,13 - vadduwm 9,9,14 - vxor 5,5,10 - vxor 6,6,11 - vxor 7,7,8 - vxor 4,4,9 - vrlw 5,5,30 - vrlw 6,6,30 - vrlw 7,7,30 - vrlw 4,4,30 - bdnz .Loop_vsx - - vadduwm 12,12,26 - - .long 0x13600F8C - .long 0x13821F8C - .long 0x10000E8C - .long 0x10421E8C - .long 0x13A42F8C - .long 0x13C63F8C - .long 0xF0201057 - .long 0xF0601357 - .long 0xF01BE057 - .long 0xF05BE357 - - .long 0x10842E8C - .long 0x10C63E8C - .long 0x13684F8C - .long 0x138A5F8C - .long 0xF0A43057 - .long 0xF0E43357 - .long 0xF09DF057 - .long 0xF0DDF357 - - .long 0x11084E8C - .long 0x114A5E8C - .long 0x13AC6F8C - .long 0x13CE7F8C - .long 0xF1285057 - .long 0xF1685357 - .long 0xF11BE057 - .long 0xF15BE357 - - .long 0x118C6E8C - .long 0x11CE7E8C - vspltisw 27,4 - vadduwm 26,26,27 - .long 0xF1AC7057 - .long 0xF1EC7357 - .long 0xF19DF057 - .long 0xF1DDF357 - - vadduwm 0,0,16 - vadduwm 4,4,17 - vadduwm 8,8,18 - vadduwm 12,12,19 - - vperm 0,0,0,31 - vperm 4,4,4,31 - vperm 8,8,8,31 - vperm 12,12,12,31 - - cmpldi 5,0x40 - blt .Ltail_vsx - - .long 0x7F602619 - .long 0x7F882619 - .long 0x7FA92619 - .long 0x7FCA2619 - - vxor 27,27,0 - vxor 28,28,4 - vxor 29,29,8 - vxor 30,30,12 - - .long 0x7F601F19 - .long 0x7F881F19 - addi 4,4,0x40 - .long 0x7FA91F19 - subi 5,5,0x40 - .long 0x7FCA1F19 - addi 3,3,0x40 - beq .Ldone_vsx - - vadduwm 0,1,16 - vadduwm 4,5,17 - vadduwm 8,9,18 - vadduwm 12,13,19 - - vperm 0,0,0,31 - vperm 4,4,4,31 - vperm 8,8,8,31 - vperm 12,12,12,31 - - cmpldi 5,0x40 - blt .Ltail_vsx - - .long 0x7F602619 - .long 0x7F882619 - .long 0x7FA92619 - .long 0x7FCA2619 - - vxor 27,27,0 - vxor 28,28,4 - vxor 29,29,8 - vxor 30,30,12 - - .long 0x7F601F19 - .long 0x7F881F19 - addi 4,4,0x40 - .long 0x7FA91F19 - subi 5,5,0x40 - .long 0x7FCA1F19 - addi 3,3,0x40 - beq .Ldone_vsx - - vadduwm 0,2,16 - vadduwm 4,6,17 - vadduwm 8,10,18 - vadduwm 12,14,19 - - vperm 0,0,0,31 - vperm 4,4,4,31 - vperm 8,8,8,31 - vperm 12,12,12,31 - - cmpldi 5,0x40 - blt .Ltail_vsx - - .long 0x7F602619 - .long 0x7F882619 - .long 0x7FA92619 - .long 0x7FCA2619 - - vxor 27,27,0 - vxor 28,28,4 - vxor 29,29,8 - vxor 30,30,12 - - .long 0x7F601F19 - .long 0x7F881F19 - addi 4,4,0x40 - .long 0x7FA91F19 - subi 5,5,0x40 - .long 0x7FCA1F19 - addi 3,3,0x40 - beq .Ldone_vsx - - vadduwm 0,3,16 - vadduwm 4,7,17 - vadduwm 8,11,18 - vadduwm 12,15,19 - - vperm 0,0,0,31 - vperm 4,4,4,31 - vperm 8,8,8,31 - vperm 12,12,12,31 - - cmpldi 5,0x40 - blt .Ltail_vsx - - .long 0x7F602619 - .long 0x7F882619 - .long 0x7FA92619 - .long 0x7FCA2619 - - vxor 27,27,0 - vxor 28,28,4 - vxor 29,29,8 - vxor 30,30,12 - - .long 0x7F601F19 - .long 0x7F881F19 - addi 4,4,0x40 - .long 0x7FA91F19 - subi 5,5,0x40 - .long 0x7FCA1F19 - addi 3,3,0x40 - mtctr 0 - bne .Loop_outer_vsx - -.Ldone_vsx: - lwz 12,220(1) - li 10,127 - li 11,143 - ld 0, 240(1) - or 12,12,12 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - mtlr 0 - addi 1,1,224 - blr - -.align 4 -.Ltail_vsx: - addi 11,1,48 - mtctr 5 - .long 0x7C005F19 - .long 0x7C885F19 - .long 0x7D095F19 - .long 0x7D8A5F19 - subi 12,11,1 - subi 4,4,1 - subi 3,3,1 - -.Loop_tail_vsx: - lbzu 6,1(12) - lbzu 7,1(4) - xor 6,6,7 - stbu 6,1(3) - bdnz .Loop_tail_vsx - - .long 0x7E005F19 - .long 0x7E085F19 - .long 0x7E095F19 - .long 0x7E0A5F19 - - b .Ldone_vsx -.long 0 -.byte 0,12,0x04,1,0x80,0,5,0 -.long 0 -.size ChaCha20_ctr32_vsx,.-ChaCha20_ctr32_vsx -.align 5 -.Lconsts: - mflr 0 - bcl 20,31,$+4 - mflr 12 - addi 12,12,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.Lsigma: -.long 0x61707865,0x3320646e,0x79622d32,0x6b206574 -.long 1,0,0,0 -.long 4,0,0,0 -.long 0x02030001,0x06070405,0x0a0b0809,0x0e0f0c0d -.long 0x01020300,0x05060704,0x090a0b08,0x0d0e0f0c -.long 0x61707865,0x61707865,0x61707865,0x61707865 -.long 0x3320646e,0x3320646e,0x3320646e,0x3320646e -.long 0x79622d32,0x79622d32,0x79622d32,0x79622d32 -.long 0x6b206574,0x6b206574,0x6b206574,0x6b206574 -.long 0,1,2,3 -.byte 67,104,97,67,104,97,50,48,32,102,111,114,32,80,111,119,101,114,80,67,47,65,108,116,105,86,101,99,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 2 diff --git a/sys/crypto/openssl/powerpc64/ecp_nistz256-ppc64.S b/sys/crypto/openssl/powerpc64/ecp_nistz256-ppc64.S deleted file mode 100644 index bd280724515..00000000000 --- a/sys/crypto/openssl/powerpc64/ecp_nistz256-ppc64.S +++ /dev/null @@ -1,4854 +0,0 @@ -/* Do not modify. This file is auto-generated from ecp_nistz256-ppc64.pl. */ -.machine "any" -.abiversion 2 -.text -.type ecp_nistz256_precomputed,@object -.globl ecp_nistz256_precomputed -.align 12 -ecp_nistz256_precomputed: -.byte 0x3c,0x4d,0x27,0xcc,0xf5,0x4a,0x4f,0x8f,0xe8,0xc8,0x04,0x68,0x09,0x4a,0x5b,0x80,0x9d,0x7a,0xe8,0x31,0x08,0x76,0x68,0x19,0x9f,0x08,0xb4,0x1f,0x32,0x43,0x89,0xd8,0x34,0xd3,0xf5,0xb7,0xb5,0xee,0x42,0x3e,0x91,0x01,0x06,0x7c,0xbf,0xd9,0x97,0x12,0xd3,0x1a,0xc9,0x04,0x8d,0x53,0x83,0x14,0x28,0xf0,0x8e,0x19,0xcc,0x91,0xe5,0x80 -.byte 0x14,0xd6,0xc1,0x8d,0x61,0x66,0x3b,0xa7,0x20,0x1e,0xe4,0x77,0xd7,0x66,0x05,0xfb,0x5c,0xa9,0x9a,0x7a,0xb2,0x30,0x50,0x28,0x87,0x80,0xfe,0xcd,0xe1,0xb3,0xff,0xa3,0x45,0x3c,0x7e,0x9b,0x08,0xc0,0xc1,0x9f,0x2e,0xad,0x7d,0x89,0x79,0x90,0x60,0xc6,0xac,0x17,0x64,0x59,0x4d,0xcf,0x56,0x7a,0xca,0x82,0xaa,0x6e,0x04,0x2f,0x1f,0x8b -.byte 0xa9,0xdd,0xeb,0x91,0x5c,0x77,0x17,0x99,0x4e,0xc2,0x45,0x69,0x2e,0xcf,0x60,0xc6,0x3c,0xad,0x65,0x33,0x35,0x6f,0xe4,0xd0,0x37,0x1f,0xe2,0x2c,0x66,0x98,0x55,0xe3,0x66,0xa2,0xc6,0x21,0xce,0x63,0x59,0x2e,0xd2,0x2b,0x8a,0x5a,0xcd,0xee,0xa7,0xad,0xf6,0x8c,0x3f,0x44,0x6c,0x12,0x30,0x8d,0xca,0xea,0x46,0x8a,0x4c,0x96,0xf9,0x96 -.byte 0x18,0x10,0x4e,0x46,0xc4,0x3e,0xa0,0x94,0x26,0x9d,0x62,0xd2,0x4b,0xb0,0xbc,0x0b,0xd5,0x56,0xa5,0xd2,0xc1,0x2f,0x2d,0x15,0xd8,0xed,0x97,0x17,0xcb,0x32,0x67,0xc5,0x0f,0x7c,0xde,0xa8,0x8c,0x4d,0xa0,0xb8,0x2e,0xed,0x24,0xd5,0xd5,0x49,0xca,0x77,0x1f,0x48,0x3b,0x83,0x54,0xb2,0xe7,0x7e,0x7a,0xa7,0x5c,0xed,0x7f,0xa1,0x9f,0x05 -.byte 0xd4,0xd4,0x90,0x0d,0xae,0x37,0x4e,0xd1,0x8f,0xd1,0x0a,0xa7,0x63,0x5b,0xb7,0x65,0xcb,0xc8,0xba,0x29,0xec,0x35,0x53,0xb2,0xac,0x32,0xf4,0xb7,0x6a,0xb1,0x69,0xcf,0x56,0x14,0x7f,0xd6,0xc5,0xca,0x88,0x1d,0x49,0xcf,0xfd,0x1f,0xcc,0xb1,0x13,0x30,0x42,0xd0,0x1c,0x6e,0x38,0x8e,0xf9,0x40,0xe7,0xe8,0xd6,0x28,0x1a,0x75,0x31,0xf3 -.byte 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0x01,0x7d,0xfb,0x73,0x7d,0x3e,0xf7,0x55,0x41,0x39,0xe0,0x33,0x0d,0xe3,0x4b,0x6b,0x7b,0x3e,0x6e,0xdc,0x7d,0x9a,0x6e,0x35,0xb0,0x38,0x13,0x92,0x80,0xa1,0xe6,0xbf,0x03,0x9d,0xb7,0x7f,0x55,0xce,0x46,0x3c,0x22,0xc7,0xfa,0xfb,0x18,0xba,0x06,0xa0,0x09,0x78,0x3f,0xc0,0x79,0x5f,0xe6,0x6a,0x29,0xaf,0xd1,0xc7,0x84,0xa7,0xed,0xb9 -.byte 0xb6,0x82,0x81,0xc1,0x53,0xee,0x00,0x34,0xa8,0x81,0xdf,0x5a,0xd3,0x07,0x7e,0x2e,0x17,0x40,0xa1,0x2b,0xf4,0x2a,0x1f,0x9a,0x67,0x75,0x73,0xa8,0x58,0x65,0x17,0xdf,0xf1,0x84,0x76,0xc5,0x8d,0x48,0x93,0xe1,0x28,0xa5,0x73,0x10,0x6e,0x9e,0x39,0x03,0x69,0x52,0xdf,0xf9,0x46,0x7c,0x5b,0xf3,0x5b,0x9a,0x63,0xd9,0x4f,0xf5,0x8e,0x73 -.byte 0xed,0x33,0x7d,0x23,0xb9,0x6c,0x3c,0x9b,0xa7,0xcf,0x7f,0x34,0x6f,0x97,0xe2,0xfe,0x0a,0x8b,0xe1,0x86,0x83,0x91,0x2e,0xdd,0x6b,0xb1,0xbf,0xa6,0x92,0x4f,0x30,0x79,0x68,0x91,0x3e,0x06,0x17,0xe9,0x0b,0x25,0x07,0xa6,0x88,0x91,0x6c,0x6e,0xc8,0xd8,0xdc,0x68,0x5e,0x45,0xf2,0x55,0xef,0x56,0x38,0x29,0xd0,0x89,0x40,0x58,0x51,0x9f -.byte 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0xc3,0x96,0x60,0x3e,0x7b,0xe2,0x08,0x19,0x92,0x17,0x80,0x9b,0x0c,0x09,0x49,0x68,0x8b,0x15,0xe3,0xce,0x0c,0xfa,0x0c,0x8b,0xf0,0xdc,0x58,0xb0,0x7b,0x82,0x85,0xd2,0x56,0x1c,0xfb,0xb5,0xd0,0x0e,0x0a,0x55,0x61,0xda,0xd8,0x20,0xc1,0x79,0x70,0x3c,0x69,0x8e,0x49,0x5f,0x1c,0xdb,0x22,0xb8,0xdd,0x4c,0x4f,0xca,0xe9,0x0f,0x9a,0x4e -.byte 0xff,0x56,0xbc,0xcf,0x72,0x09,0xa6,0x41,0x38,0xf0,0x7d,0xe7,0x45,0x0a,0x71,0x2c,0x92,0xdd,0x21,0x17,0xb2,0x3b,0x31,0x3c,0x91,0x11,0x69,0x29,0x50,0x31,0xe6,0xa6,0x10,0xc7,0x35,0xe8,0x44,0xec,0x74,0xa3,0x7e,0xb6,0x34,0xe5,0xb7,0xba,0xdf,0x5b,0x2f,0x85,0x02,0x6c,0xb0,0x71,0xb1,0x43,0xff,0x0e,0x47,0x04,0x63,0x4d,0x5b,0x81 -.byte 0x81,0x28,0x8b,0x84,0x79,0xad,0x2a,0x45,0x00,0x1c,0x0c,0x9f,0xef,0x35,0xbb,0x6d,0xc5,0x6a,0x6b,0xef,0x2b,0xae,0x78,0x66,0x05,0x7a,0x61,0x4c,0xe9,0x5e,0xf7,0x95,0x66,0x7e,0x1a,0xa7,0xdf,0x4c,0x4d,0x7c,0x66,0xa5,0x38,0x84,0x86,0x8d,0x66,0xcc,0x7f,0x32,0xb2,0x9c,0xc5,0x0d,0x3d,0xb7,0xb1,0xa6,0xc5,0x80,0x68,0xaf,0x79,0x81 -.byte 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0xd0,0xfe,0x84,0xd1,0xa1,0xf9,0x03,0xc3,0xba,0x09,0xbb,0x2c,0xe2,0xb5,0x06,0x7e,0x23,0xb7,0xe0,0xc1,0xd3,0xfd,0x55,0x01,0xf3,0xba,0xc5,0x1b,0xf8,0x02,0x60,0x92,0x0a,0x93,0x1c,0xc4,0x19,0x03,0x88,0xf5,0x45,0xe5,0x8f,0x7d,0xce,0x2c,0x87,0x2e,0xf6,0x55,0x8c,0xf9,0xb0,0xd2,0x72,0x2d,0x93,0x6d,0x28,0x6e,0x8e,0x3a,0xed,0x68 -.byte 0x02,0xda,0x80,0xd0,0x71,0x4a,0x8f,0x06,0x59,0x38,0x89,0x81,0xcb,0x1a,0x74,0x1e,0x62,0xa3,0xa5,0xb8,0x85,0xc3,0xd2,0x04,0x3d,0x3b,0x93,0x36,0x0c,0x12,0x55,0xfb,0x7b,0xc8,0xa3,0x25,0xa7,0x93,0xb0,0x3e,0x49,0x86,0xbf,0x76,0x8f,0xc4,0x4c,0xfe,0xce,0x4a,0xf6,0x2f,0x15,0x33,0x06,0x3a,0x35,0x49,0xe7,0x08,0xff,0x99,0xac,0xf6 -.byte 0x20,0x6d,0xab,0xb2,0x05,0xa9,0xe4,0x06,0x57,0x9c,0xf4,0x76,0x8c,0x82,0x64,0xd5,0x67,0xe0,0xad,0xe1,0x69,0xdc,0x9e,0x2c,0x59,0x92,0x3a,0xc8,0xc1,0x0a,0x61,0x89,0x45,0x9f,0x8b,0xf8,0x64,0x0a,0x5a,0x75,0x55,0x37,0x24,0xe1,0x42,0x43,0x7c,0x9c,0xcd,0x4e,0x9e,0x19,0xfb,0xd9,0x15,0x29,0x30,0x52,0x33,0xf3,0xc8,0x88,0xdb,0xaa -.byte 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0xca,0x38,0xa3,0x97,0x2e,0x0f,0xa5,0x18,0x3b,0xaa,0x0f,0x00,0x75,0x35,0x9c,0xcd,0x28,0x83,0xd4,0xa7,0x7c,0xb9,0xcd,0xb5,0x55,0x29,0x4c,0x14,0xcd,0xfc,0x8f,0xaf,0x7d,0x69,0x4f,0xf7,0x0f,0xed,0x7c,0xa5,0x79,0x9d,0x36,0xbb,0x72,0xbc,0xf2,0x14,0xfd,0xf0,0x04,0x2a,0x89,0x1e,0xf7,0x80,0x4c,0x5e,0xb8,0xc1,0xdb,0xfa,0x3c,0x27 -.byte 0xbb,0x30,0x08,0x2b,0xd2,0xf8,0xdb,0xe0,0x8c,0x00,0xe4,0xca,0xa9,0xde,0xb0,0x14,0x5b,0xec,0x6b,0xe6,0x5c,0x90,0x17,0x02,0x59,0x5f,0x5f,0x51,0xf8,0x30,0x10,0x11,0xc4,0xdf,0x37,0x30,0x32,0xb1,0x4d,0x49,0xfe,0x82,0x87,0xd2,0x42,0xf5,0x38,0x76,0xf9,0xa5,0x28,0xfc,0x14,0xb2,0xe0,0x72,0x82,0xde,0xc8,0x47,0x9e,0x8f,0x8a,0xb5 -.byte 0x85,0x44,0x42,0x12,0xc6,0xc0,0xa5,0x60,0x5a,0x27,0xd0,0x36,0x14,0x7b,0x2a,0x83,0x98,0x92,0x08,0xe9,0x03,0xc9,0xc3,0xd3,0x36,0x97,0xba,0x5e,0xd5,0x51,0xcc,0x44,0xeb,0x81,0x76,0xae,0x28,0x94,0x0b,0xf6,0xc7,0xeb,0xae,0x61,0x6f,0x7b,0x34,0xb5,0x8c,0x5f,0x31,0xb6,0x23,0xe3,0xe7,0x4b,0x60,0xe6,0xba,0x8d,0x0e,0xd1,0xb2,0x37 -.byte 0x72,0x3d,0xc1,0x75,0x9b,0x5e,0xcb,0x0f,0xf9,0xe4,0xdb,0x82,0x4c,0xc4,0x37,0xef,0x9d,0xde,0x16,0x85,0xe9,0xc2,0x03,0xd8,0x5b,0xa1,0xff,0xfa,0xd4,0xd7,0x5c,0x34,0xb6,0x1e,0x25,0x96,0xf5,0x8b,0xc3,0xee,0x16,0x1f,0xf8,0x55,0x4e,0x1c,0x83,0x80,0x77,0x1d,0x4f,0xb6,0x95,0x1c,0x91,0x7d,0x50,0x25,0xf4,0x2a,0x5d,0x2e,0xc7,0x8a -.byte 0x14,0xf8,0xb9,0xbc,0xab,0x5b,0xcd,0x47,0xb5,0xaf,0x85,0xc0,0x34,0x27,0x7d,0x6a,0x8c,0x84,0x8a,0xae,0x68,0x60,0x0e,0xa1,0x45,0xf7,0x83,0x66,0x91,0x69,0x30,0xed,0x26,0x5e,0xf5,0x48,0x6b,0x20,0xb3,0x11,0x50,0xf7,0x70,0x9d,0x10,0x50,0x44,0x87,0xfe,0x96,0x5c,0xc6,0xa4,0xa4,0xed,0x5e,0x7f,0x3d,0x90,0x19,0xbe,0x31,0xa3,0xdd -.byte 0x44,0xbb,0x9b,0x51,0x5a,0x06,0x1d,0x2e,0xd7,0xef,0xd1,0x81,0xb6,0xec,0xc6,0x89,0xfb,0x13,0xc5,0x21,0xef,0x9a,0x1a,0x48,0xf2,0xf8,0xb3,0xa3,0xec,0x7f,0x85,0xc1,0xc6,0x8c,0x5f,0xa9,0x30,0x38,0x25,0x1e,0x8d,0xcf,0x18,0x24,0xef,0x5a,0x9a,0x14,0x31,0xc0,0x2c,0x88,0xa5,0x3f,0x50,0x8b,0xb1,0xda,0x5d,0x26,0xd9,0xd3,0x81,0xb1 -.byte 0xec,0xf0,0x42,0x88,0xd0,0x81,0x51,0xf9,0x1b,0xbc,0x43,0xa4,0x37,0xf1,0xd7,0x90,0x21,0x7e,0xa0,0x3e,0x63,0xfb,0x21,0xfa,0x12,0xfb,0xde,0xc7,0xbf,0xb3,0x58,0xe7,0x76,0x42,0x20,0x01,0x3d,0x66,0x80,0xf1,0xb8,0xaf,0xfa,0x7d,0x96,0x89,0x36,0x48,0x95,0xd9,0x6e,0x6d,0xe6,0x4f,0xff,0x2a,0x47,0x61,0xf2,0x04,0xb7,0x83,0x14,0xce -.byte 0x0a,0x3c,0x73,0x17,0x50,0x88,0x03,0x25,0x4a,0xe3,0x13,0x55,0x8b,0x7e,0x50,0x38,0xfc,0x14,0x0b,0x04,0x8e,0xa8,0x5b,0xd6,0x72,0x20,0x60,0xe9,0xaa,0x22,0x82,0x11,0xc6,0xc4,0xd7,0xb9,0xc8,0x0c,0x7e,0x05,0xfb,0x90,0xe4,0x9c,0x28,0x89,0x29,0x99,0x63,0x4d,0xec,0x7b,0x50,0xbd,0xd8,0xa3,0x5b,0x50,0x77,0x19,0x81,0x92,0xce,0x82 -.size ecp_nistz256_precomputed,.-ecp_nistz256_precomputed -.byte 69,67,80,95,78,73,83,84,90,50,53,54,32,102,111,114,32,80,80,67,54,52,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 - - - -.globl ecp_nistz256_mul_mont -.type ecp_nistz256_mul_mont,@function -.align 5 -ecp_nistz256_mul_mont: -.localentry ecp_nistz256_mul_mont,0 - - stdu 1,-128(1) - mflr 0 - std 22,48(1) - std 23,56(1) - std 24,64(1) - std 25,72(1) - std 26,80(1) - std 27,88(1) - std 28,96(1) - std 29,104(1) - std 30,112(1) - std 31,120(1) - - ld 24,0(4) - ld 6,0(5) - ld 25,8(4) - ld 26,16(4) - ld 27,24(4) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - bl __ecp_nistz256_mul_mont - - mtlr 0 - ld 22,48(1) - ld 23,56(1) - ld 24,64(1) - ld 25,72(1) - ld 26,80(1) - ld 27,88(1) - ld 28,96(1) - ld 29,104(1) - ld 30,112(1) - ld 31,120(1) - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,0,0x80,10,3,0 -.long 0 -.size ecp_nistz256_mul_mont,.-ecp_nistz256_mul_mont - - -.globl ecp_nistz256_sqr_mont -.type ecp_nistz256_sqr_mont,@function -.align 4 -ecp_nistz256_sqr_mont: -.localentry ecp_nistz256_sqr_mont,0 - - stdu 1,-128(1) - mflr 0 - std 22,48(1) - std 23,56(1) - std 24,64(1) - std 25,72(1) - std 26,80(1) - std 27,88(1) - std 28,96(1) - std 29,104(1) - std 30,112(1) - std 31,120(1) - - ld 24,0(4) - ld 25,8(4) - ld 26,16(4) - ld 27,24(4) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - bl __ecp_nistz256_sqr_mont - - mtlr 0 - ld 22,48(1) - ld 23,56(1) - ld 24,64(1) - ld 25,72(1) - ld 26,80(1) - ld 27,88(1) - ld 28,96(1) - ld 29,104(1) - ld 30,112(1) - ld 31,120(1) - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,0,0x80,10,2,0 -.long 0 -.size ecp_nistz256_sqr_mont,.-ecp_nistz256_sqr_mont - - - -.globl ecp_nistz256_add -.type ecp_nistz256_add,@function -.align 4 -ecp_nistz256_add: -.localentry ecp_nistz256_add,0 - - stdu 1,-128(1) - mflr 0 - std 28,96(1) - std 29,104(1) - std 30,112(1) - std 31,120(1) - - ld 7,0(4) - ld 28, 0(5) - ld 8,8(4) - ld 29, 8(5) - ld 9,16(4) - ld 30, 16(5) - ld 10,24(4) - ld 31, 24(5) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - bl __ecp_nistz256_add - - mtlr 0 - ld 28,96(1) - ld 29,104(1) - ld 30,112(1) - ld 31,120(1) - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,0,0x80,4,3,0 -.long 0 -.size ecp_nistz256_add,.-ecp_nistz256_add - - -.globl ecp_nistz256_div_by_2 -.type ecp_nistz256_div_by_2,@function -.align 4 -ecp_nistz256_div_by_2: -.localentry ecp_nistz256_div_by_2,0 - - stdu 1,-128(1) - mflr 0 - std 28,96(1) - std 29,104(1) - std 30,112(1) - std 31,120(1) - - ld 7,0(4) - ld 8,8(4) - ld 9,16(4) - ld 10,24(4) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - bl __ecp_nistz256_div_by_2 - - mtlr 0 - ld 28,96(1) - ld 29,104(1) - ld 30,112(1) - ld 31,120(1) - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,0,0x80,4,2,0 -.long 0 -.size ecp_nistz256_div_by_2,.-ecp_nistz256_div_by_2 - - -.globl ecp_nistz256_mul_by_2 -.type ecp_nistz256_mul_by_2,@function -.align 4 -ecp_nistz256_mul_by_2: -.localentry ecp_nistz256_mul_by_2,0 - - stdu 1,-128(1) - mflr 0 - std 28,96(1) - std 29,104(1) - std 30,112(1) - std 31,120(1) - - ld 7,0(4) - ld 8,8(4) - ld 9,16(4) - ld 10,24(4) - - mr 28,7 - mr 29,8 - mr 30,9 - mr 31,10 - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - bl __ecp_nistz256_add - - mtlr 0 - ld 28,96(1) - ld 29,104(1) - ld 30,112(1) - ld 31,120(1) - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,0,0x80,4,3,0 -.long 0 -.size ecp_nistz256_mul_by_2,.-ecp_nistz256_mul_by_2 - - -.globl ecp_nistz256_mul_by_3 -.type ecp_nistz256_mul_by_3,@function -.align 4 -ecp_nistz256_mul_by_3: -.localentry ecp_nistz256_mul_by_3,0 - - stdu 1,-128(1) - mflr 0 - std 28,96(1) - std 29,104(1) - std 30,112(1) - std 31,120(1) - - ld 7,0(4) - ld 8,8(4) - ld 9,16(4) - ld 10,24(4) - - mr 28,7 - std 7,64(1) - mr 29,8 - std 8,72(1) - mr 30,9 - std 9,80(1) - mr 31,10 - std 10,88(1) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - bl __ecp_nistz256_add - - ld 28,64(1) - ld 29,72(1) - ld 30,80(1) - ld 31,88(1) - - bl __ecp_nistz256_add - - mtlr 0 - ld 28,96(1) - ld 29,104(1) - ld 30,112(1) - ld 31,120(1) - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,0,0x80,4,2,0 -.long 0 -.size ecp_nistz256_mul_by_3,.-ecp_nistz256_mul_by_3 - - - -.globl ecp_nistz256_sub -.type ecp_nistz256_sub,@function -.align 4 -ecp_nistz256_sub: -.localentry ecp_nistz256_sub,0 - - stdu 1,-128(1) - mflr 0 - std 28,96(1) - std 29,104(1) - std 30,112(1) - std 31,120(1) - - ld 7,0(4) - ld 8,8(4) - ld 9,16(4) - ld 10,24(4) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - bl __ecp_nistz256_sub_from - - mtlr 0 - ld 28,96(1) - ld 29,104(1) - ld 30,112(1) - ld 31,120(1) - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,0,0x80,4,3,0 -.long 0 -.size ecp_nistz256_sub,.-ecp_nistz256_sub - - -.globl ecp_nistz256_neg -.type ecp_nistz256_neg,@function -.align 4 -ecp_nistz256_neg: -.localentry ecp_nistz256_neg,0 - - stdu 1,-128(1) - mflr 0 - std 28,96(1) - std 29,104(1) - std 30,112(1) - std 31,120(1) - - mr 5,4 - li 7,0 - li 8,0 - li 9,0 - li 10,0 - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - bl __ecp_nistz256_sub_from - - mtlr 0 - ld 28,96(1) - ld 29,104(1) - ld 30,112(1) - ld 31,120(1) - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,0,0x80,4,2,0 -.long 0 -.size ecp_nistz256_neg,.-ecp_nistz256_neg - - - -.type __ecp_nistz256_mul_mont,@function -.align 4 -__ecp_nistz256_mul_mont: -.localentry __ecp_nistz256_mul_mont,0 - - mulld 7,24,6 - mulhdu 28,24,6 - - mulld 8,25,6 - mulhdu 29,25,6 - - mulld 9,26,6 - mulhdu 30,26,6 - - mulld 10,27,6 - mulhdu 31,27,6 - ld 6,8(5) - - addc 8,8,28 - sldi 28,7,32 - adde 9,9,29 - srdi 29,7,32 - adde 10,10,30 - addze 22,31 - li 23,0 - subfc 30,28,7 - subfe 31,29,7 - addc 7,8,28 - adde 8,9,29 - adde 9,10,30 - adde 10,22,31 - addze 22,23 - - mulld 28,24,6 - mulld 29,25,6 - mulld 30,26,6 - mulld 31,27,6 - addc 7,7,28 - mulhdu 28,24,6 - adde 8,8,29 - mulhdu 29,25,6 - adde 9,9,30 - mulhdu 30,26,6 - adde 10,10,31 - mulhdu 31,27,6 - addze 22,22 - ld 6,8*(1+1)(5) - addc 8,8,28 - sldi 28,7,32 - adde 9,9,29 - srdi 29,7,32 - adde 10,10,30 - adde 22,22,31 - li 23,0 - addze 23,23 - subfc 30,28,7 - subfe 31,29,7 - addc 7,8,28 - adde 8,9,29 - adde 9,10,30 - adde 10,22,31 - addze 22,23 - - mulld 28,24,6 - mulld 29,25,6 - mulld 30,26,6 - mulld 31,27,6 - addc 7,7,28 - mulhdu 28,24,6 - adde 8,8,29 - mulhdu 29,25,6 - adde 9,9,30 - mulhdu 30,26,6 - adde 10,10,31 - mulhdu 31,27,6 - addze 22,22 - ld 6,8*(2+1)(5) - addc 8,8,28 - sldi 28,7,32 - adde 9,9,29 - srdi 29,7,32 - adde 10,10,30 - adde 22,22,31 - li 23,0 - addze 23,23 - subfc 30,28,7 - subfe 31,29,7 - addc 7,8,28 - adde 8,9,29 - adde 9,10,30 - adde 10,22,31 - addze 22,23 - - mulld 28,24,6 - mulld 29,25,6 - mulld 30,26,6 - mulld 31,27,6 - addc 7,7,28 - mulhdu 28,24,6 - adde 8,8,29 - mulhdu 29,25,6 - adde 9,9,30 - mulhdu 30,26,6 - adde 10,10,31 - mulhdu 31,27,6 - addze 22,22 - addc 8,8,28 - sldi 28,7,32 - adde 9,9,29 - srdi 29,7,32 - adde 10,10,30 - adde 22,22,31 - li 23,0 - addze 23,23 - - subfc 30,28,7 - subfe 31,29,7 - addc 7,8,28 - adde 8,9,29 - adde 9,10,30 - adde 10,22,31 - addze 22,23 - - li 30,0 - addic 7,7,1 - subfe 8,11,8 - subfe 9,30,9 - subfe 10,12,10 - subfe 22,30,22 - - addc 7,7,22 - and 29,11,22 - and 31,12,22 - adde 8,8,29 - addze 9,9 - adde 10,10,31 - - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,1,0 -.long 0 -.size __ecp_nistz256_mul_mont,.-__ecp_nistz256_mul_mont - - - -.type __ecp_nistz256_sqr_mont,@function -.align 4 -__ecp_nistz256_sqr_mont: -.localentry __ecp_nistz256_sqr_mont,0 - - - - - - - - - - - - - - - - - mulld 8,25,24 - mulhdu 29,25,24 - mulld 9,26,24 - mulhdu 30,26,24 - mulld 10,27,24 - mulhdu 22,27,24 - - addc 9,9,29 - mulld 28,26,25 - mulhdu 29,26,25 - adde 10,10,30 - mulld 30,27,25 - mulhdu 31,27,25 - addze 22,22 - - mulld 23,27,26 - mulhdu 5,27,26 - - addc 29,29,30 - addze 30,31 - - addc 10,10,28 - adde 22,22,29 - adde 23,23,30 - addze 5,5 - - addc 8,8,8 - adde 9,9,9 - adde 10,10,10 - adde 22,22,22 - adde 23,23,23 - adde 5,5,5 - li 6,0 - addze 6,6 - - mulld 7,24,24 - mulhdu 24,24,24 - mulld 29,25,25 - mulhdu 25,25,25 - mulld 30,26,26 - mulhdu 26,26,26 - mulld 31,27,27 - mulhdu 27,27,27 - addc 8,8,24 - sldi 28,7,32 - adde 9,9,29 - srdi 29,7,32 - adde 10,10,25 - adde 22,22,30 - adde 23,23,26 - adde 5,5,31 - adde 6,6,27 - subfc 30,28,7 - subfe 31,29,7 - addc 7,8,28 - sldi 28,7,32 - adde 8,9,29 - srdi 29,7,32 - adde 9,10,30 - addze 10,31 - subfc 30,28,7 - subfe 31,29,7 - addc 7,8,28 - sldi 28,7,32 - adde 8,9,29 - srdi 29,7,32 - adde 9,10,30 - addze 10,31 - subfc 30,28,7 - subfe 31,29,7 - addc 7,8,28 - sldi 28,7,32 - adde 8,9,29 - srdi 29,7,32 - adde 9,10,30 - addze 10,31 - subfc 30,28,7 - subfe 31,29,7 - addc 7,8,28 - adde 8,9,29 - adde 9,10,30 - addze 10,31 - - addc 7,7,22 - adde 8,8,23 - adde 9,9,5 - adde 10,10,6 - li 30,0 - addze 22,30 - - addic 7,7,1 - subfe 8,11,8 - subfe 9,30,9 - subfe 10,12,10 - subfe 22,30,22 - - addc 7,7,22 - and 29,11,22 - and 31,12,22 - adde 8,8,29 - addze 9,9 - adde 10,10,31 - - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,1,0 -.long 0 -.size __ecp_nistz256_sqr_mont,.-__ecp_nistz256_sqr_mont - - - - -.type __ecp_nistz256_add,@function -.align 4 -__ecp_nistz256_add: -.localentry __ecp_nistz256_add,0 - - addc 7,7,28 - adde 8,8,29 - adde 9,9,30 - li 30,0 - adde 10,10,31 - addze 28,30 - - - - - - - subic 7,7,-1 - subfe 8,11,8 - subfe 9,30,9 - subfe 10,12,10 - subfe 28,30,28 - - addc 7,7,28 - and 29,11,28 - and 31,12,28 - adde 8,8,29 - addze 9,9 - adde 10,10,31 - - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size __ecp_nistz256_add,.-__ecp_nistz256_add - -.type __ecp_nistz256_sub_from,@function -.align 4 -__ecp_nistz256_sub_from: -.localentry __ecp_nistz256_sub_from,0 - - ld 28,0(5) - ld 29,8(5) - ld 30,16(5) - ld 31,24(5) - subfc 7,28,7 - subfe 8,29,8 - subfe 9,30,9 - subfe 10,31,10 - subfe 28,28,28 - - - - addc 7,7,28 - and 29,11,28 - and 31,12,28 - adde 8,8,29 - addze 9,9 - adde 10,10,31 - - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size __ecp_nistz256_sub_from,.-__ecp_nistz256_sub_from - -.type __ecp_nistz256_sub_morf,@function -.align 4 -__ecp_nistz256_sub_morf: -.localentry __ecp_nistz256_sub_morf,0 - - ld 28,0(5) - ld 29,8(5) - ld 30,16(5) - ld 31,24(5) - subfc 7,7,28 - subfe 8,8,29 - subfe 9,9,30 - subfe 10,10,31 - subfe 28,28,28 - - - - addc 7,7,28 - and 29,11,28 - and 31,12,28 - adde 8,8,29 - addze 9,9 - adde 10,10,31 - - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size __ecp_nistz256_sub_morf,.-__ecp_nistz256_sub_morf - -.type __ecp_nistz256_div_by_2,@function -.align 4 -__ecp_nistz256_div_by_2: -.localentry __ecp_nistz256_div_by_2,0 - - andi. 28,7,1 - addic 7,7,-1 - neg 28,28 - adde 8,8,11 - not 28,28 - addze 9,9 - li 30,0 - adde 10,10,12 - and 29,11,28 - addze 4,30 - and 31,12,28 - - subfc 7,28,7 - subfe 8,29,8 - subfe 9,30,9 - subfe 10,31,10 - subfe 4, 30,4 - - srdi 7,7,1 - sldi 28,8,63 - srdi 8,8,1 - sldi 29,9,63 - srdi 9,9,1 - sldi 30,10,63 - srdi 10,10,1 - sldi 31,4,63 - or 7,7,28 - or 8,8,29 - or 9,9,30 - or 10,10,31 - - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,1,0 -.long 0 -.size __ecp_nistz256_div_by_2,.-__ecp_nistz256_div_by_2 -.globl ecp_nistz256_point_double -.type ecp_nistz256_point_double,@function -.align 5 -ecp_nistz256_point_double: -.localentry ecp_nistz256_point_double,0 - - stdu 1,-288(1) - mflr 0 - std 20,288-8*12(1) - std 21,288-8*11(1) - std 22,288-8*10(1) - std 23,288-8*9(1) - std 24,288-8*8(1) - std 25,288-8*7(1) - std 26,288-8*6(1) - std 27,288-8*5(1) - std 28,288-8*4(1) - std 29,288-8*3(1) - std 30,288-8*2(1) - std 31,288-8*1(1) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 -.Ldouble_shortcut: - ld 7,32(4) - ld 8,40(4) - ld 9,48(4) - ld 10,56(4) - mr 28,7 - mr 29,8 - mr 30,9 - mr 31,10 - ld 24,64(4) - ld 25,72(4) - ld 26,80(4) - ld 27,88(4) - mr 20,3 - mr 21,4 - addi 3,1,64 - bl __ecp_nistz256_add - - addi 3,1,128 - bl __ecp_nistz256_sqr_mont - - ld 28,0(21) - ld 29,8(21) - ld 30,16(21) - ld 31,24(21) - mr 24,7 - mr 25,8 - mr 26,9 - mr 27,10 - addi 3,1,96 - bl __ecp_nistz256_add - - addi 5,21,0 - mr 7,24 - mr 8,25 - mr 9,26 - mr 10,27 - ld 24,64+0(1) - ld 25,64+8(1) - ld 26,64+16(1) - ld 27,64+24(1) - addi 3,1,128 - bl __ecp_nistz256_sub_morf - - addi 3,1,64 - bl __ecp_nistz256_sqr_mont - - ld 6,32(21) - ld 24,64(21) - ld 25,72(21) - ld 26,80(21) - ld 27,88(21) - addi 5,21,32 - addi 3,1,160 - bl __ecp_nistz256_mul_mont - - mr 28,7 - mr 29,8 - mr 30,9 - mr 31,10 - ld 24,64+0(1) - ld 25,64+8(1) - ld 26,64+16(1) - ld 27,64+24(1) - addi 3,20,64 - bl __ecp_nistz256_add - - addi 3,1,160 - bl __ecp_nistz256_sqr_mont - - ld 6,128(1) - ld 24,96+0(1) - ld 25,96+8(1) - ld 26,96+16(1) - ld 27,96+24(1) - addi 3,20,32 - bl __ecp_nistz256_div_by_2 - - addi 5,1,128 - addi 3,1,96 - bl __ecp_nistz256_mul_mont - - mr 28,7 - mr 29,8 - mr 30,9 - mr 31,10 - mr 24,7 - mr 25,8 - mr 26,9 - mr 27,10 - addi 3,1,96 - bl __ecp_nistz256_add - mr 28,24 - mr 29,25 - mr 30,26 - mr 31,27 - ld 6,0(21) - ld 24,64+0(1) - ld 25,64+8(1) - ld 26,64+16(1) - ld 27,64+24(1) - bl __ecp_nistz256_add - - addi 5,21,0 - addi 3,1,64 - bl __ecp_nistz256_mul_mont - - mr 28,7 - mr 29,8 - mr 30,9 - mr 31,10 - ld 24,96+0(1) - ld 25,96+8(1) - ld 26,96+16(1) - ld 27,96+24(1) - addi 3,1,160 - bl __ecp_nistz256_add - - addi 3,20,0 - bl __ecp_nistz256_sqr_mont - - addi 5,1,160 - bl __ecp_nistz256_sub_from - - addi 5,1,64 - addi 3,1,64 - bl __ecp_nistz256_sub_morf - - ld 6,96(1) - mr 24,7 - mr 25,8 - mr 26,9 - mr 27,10 - addi 5,1,96 - bl __ecp_nistz256_mul_mont - - addi 5,20,32 - addi 3,20,32 - bl __ecp_nistz256_sub_from - - mtlr 0 - ld 20,288-8*12(1) - ld 21,288-8*11(1) - ld 22,288-8*10(1) - ld 23,288-8*9(1) - ld 24,288-8*8(1) - ld 25,288-8*7(1) - ld 26,288-8*6(1) - ld 27,288-8*5(1) - ld 28,288-8*4(1) - ld 29,288-8*3(1) - ld 30,288-8*2(1) - ld 31,288-8*1(1) - addi 1,1,288 - blr -.long 0 -.byte 0,12,4,0,0x80,12,2,0 -.long 0 -.size ecp_nistz256_point_double,.-ecp_nistz256_point_double -.globl ecp_nistz256_point_add -.type ecp_nistz256_point_add,@function -.align 5 -ecp_nistz256_point_add: -.localentry ecp_nistz256_point_add,0 - - stdu 1,-576(1) - mflr 0 - std 16,576-8*16(1) - std 17,576-8*15(1) - std 18,576-8*14(1) - std 19,576-8*13(1) - std 20,576-8*12(1) - std 21,576-8*11(1) - std 22,576-8*10(1) - std 23,576-8*9(1) - std 24,576-8*8(1) - std 25,576-8*7(1) - std 26,576-8*6(1) - std 27,576-8*5(1) - std 28,576-8*4(1) - std 29,576-8*3(1) - std 30,576-8*2(1) - std 31,576-8*1(1) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - ld 24,64(5) - ld 25,72(5) - ld 26,80(5) - ld 27,88(5) - mr 16,3 - mr 17,4 - mr 18,5 - or 28,24,25 - or 30,26,27 - or 20,28,30 - neg 28,20 - or 20,20,28 - sradi 20,20,63 - addi 3,1,256 - bl __ecp_nistz256_sqr_mont - - ld 24,64(17) - ld 25,72(17) - ld 26,80(17) - ld 27,88(17) - or 28,24,25 - or 30,26,27 - or 19,28,30 - neg 28,19 - or 19,19,28 - sradi 19,19,63 - addi 3,1,192 - bl __ecp_nistz256_sqr_mont - - ld 6,64(18) - ld 24,256+0(1) - ld 25,256+8(1) - ld 26,256+16(1) - ld 27,256+24(1) - addi 5,18,64 - addi 3,1,384 - bl __ecp_nistz256_mul_mont - - ld 6,64(17) - ld 24,192+0(1) - ld 25,192+8(1) - ld 26,192+16(1) - ld 27,192+24(1) - addi 5,17,64 - addi 3,1,416 - bl __ecp_nistz256_mul_mont - - ld 6,32(17) - ld 24,384+0(1) - ld 25,384+8(1) - ld 26,384+16(1) - ld 27,384+24(1) - addi 5,17,32 - addi 3,1,384 - bl __ecp_nistz256_mul_mont - - ld 6,32(18) - ld 24,416+0(1) - ld 25,416+8(1) - ld 26,416+16(1) - ld 27,416+24(1) - addi 5,18,32 - addi 3,1,416 - bl __ecp_nistz256_mul_mont - - addi 5,1,384 - ld 6,256(1) - ld 24,0(17) - ld 25,8(17) - ld 26,16(17) - ld 27,24(17) - addi 3,1,224 - bl __ecp_nistz256_sub_from - - or 7,7,8 - or 9,9,10 - or 21,7,9 - - addi 5,1,256 - addi 3,1,320 - bl __ecp_nistz256_mul_mont - - ld 6,192(1) - ld 24,0(18) - ld 25,8(18) - ld 26,16(18) - ld 27,24(18) - addi 5,1,192 - addi 3,1,352 - bl __ecp_nistz256_mul_mont - - addi 5,1,320 - ld 24,224+0(1) - ld 25,224+8(1) - ld 26,224+16(1) - ld 27,224+24(1) - addi 3,1,160 - bl __ecp_nistz256_sub_from - - or 7,7,8 - or 9,9,10 - or. 7,7,9 - bne .Ladd_proceed - - and. 28,19,20 - beq .Ladd_proceed - - cmpldi 21,0 - beq .Ladd_double - - xor 24,24,24 - std 24,0(16) - std 24,8(16) - std 24,16(16) - std 24,24(16) - std 24,32(16) - std 24,40(16) - std 24,48(16) - std 24,56(16) - std 24,64(16) - std 24,72(16) - std 24,80(16) - std 24,88(16) - b .Ladd_done - -.align 4 -.Ladd_double: - ld 5,0(1) - mr 4,17 - mr 3,16 - ld 16,576-8*16(1) - ld 17,576-8*15(1) - ld 18,576-8*14(1) - ld 19,576-8*13(1) - stdu 5,576-288(1) - b .Ldouble_shortcut - -.align 4 -.Ladd_proceed: - addi 3,1,256 - bl __ecp_nistz256_sqr_mont - - ld 6,64(17) - ld 24,160+0(1) - ld 25,160+8(1) - ld 26,160+16(1) - ld 27,160+24(1) - addi 5,17,64 - addi 3,1,128 - bl __ecp_nistz256_mul_mont - - ld 24,160+0(1) - ld 25,160+8(1) - ld 26,160+16(1) - ld 27,160+24(1) - addi 3,1,192 - bl __ecp_nistz256_sqr_mont - - ld 6,64(18) - ld 24,128+0(1) - ld 25,128+8(1) - ld 26,128+16(1) - ld 27,128+24(1) - addi 5,18,64 - addi 3,1,128 - bl __ecp_nistz256_mul_mont - - ld 6,160(1) - ld 24,192+0(1) - ld 25,192+8(1) - ld 26,192+16(1) - ld 27,192+24(1) - addi 5,1,160 - addi 3,1,288 - bl __ecp_nistz256_mul_mont - - ld 6,192(1) - ld 24,320+0(1) - ld 25,320+8(1) - ld 26,320+16(1) - ld 27,320+24(1) - addi 5,1,192 - addi 3,1,352 - bl __ecp_nistz256_mul_mont - - mr 28,7 - mr 29,8 - mr 30,9 - mr 31,10 - addi 3,1,192 - bl __ecp_nistz256_add - - addi 5,1,256 - addi 3,1,64 - bl __ecp_nistz256_sub_morf - - addi 5,1,288 - bl __ecp_nistz256_sub_from - - addi 5,1,352 - ld 6,288(1) - ld 24,384+0(1) - ld 25,384+8(1) - ld 26,384+16(1) - ld 27,384+24(1) - addi 3,1,96 - bl __ecp_nistz256_sub_morf - - addi 5,1,288 - addi 3,1,416 - bl __ecp_nistz256_mul_mont - - ld 6,224(1) - ld 24,96+0(1) - ld 25,96+8(1) - ld 26,96+16(1) - ld 27,96+24(1) - addi 5,1,224 - addi 3,1,96 - bl __ecp_nistz256_mul_mont - - addi 5,1,416 - bl __ecp_nistz256_sub_from - - ld 28,0(18) - ld 29,8(18) - ld 30,16(18) - ld 31,24(18) - ld 24,64+0(1) - ld 25,64+8(1) - ld 26,64+16(1) - ld 27,64+24(1) - ld 7,0+0(17) - ld 8,0+8(17) - ld 9,0+16(17) - ld 10,0+24(17) - andc 28,28,19 - andc 29,29,19 - andc 30,30,19 - andc 31,31,19 - and 24,24,19 - and 25,25,19 - and 26,26,19 - and 27,27,19 - or 28,28,24 - or 29,29,25 - or 30,30,26 - or 31,31,27 - andc 7,7,20 - andc 8,8,20 - andc 9,9,20 - andc 10,10,20 - and 28,28,20 - and 29,29,20 - and 30,30,20 - and 31,31,20 - or 7,7,28 - or 8,8,29 - or 9,9,30 - or 10,10,31 - - ld 28,0+32(18) - ld 29,0+40(18) - ld 30,0+48(18) - ld 31,0+56(18) - ld 24,64+0+32(1) - ld 25,64+0+40(1) - ld 26,64+0+48(1) - ld 27,64+0+56(1) - std 7,0+0(16) - std 8,0+8(16) - std 9,0+16(16) - std 10,0+24(16) - ld 7,32+0(17) - ld 8,32+8(17) - ld 9,32+16(17) - ld 10,32+24(17) - andc 28,28,19 - andc 29,29,19 - andc 30,30,19 - andc 31,31,19 - and 24,24,19 - and 25,25,19 - and 26,26,19 - and 27,27,19 - or 28,28,24 - or 29,29,25 - or 30,30,26 - or 31,31,27 - andc 7,7,20 - andc 8,8,20 - andc 9,9,20 - andc 10,10,20 - and 28,28,20 - and 29,29,20 - and 30,30,20 - and 31,31,20 - or 7,7,28 - or 8,8,29 - or 9,9,30 - or 10,10,31 - - ld 28,32+32(18) - ld 29,32+40(18) - ld 30,32+48(18) - ld 31,32+56(18) - ld 24,64+32+32(1) - ld 25,64+32+40(1) - ld 26,64+32+48(1) - ld 27,64+32+56(1) - std 7,32+0(16) - std 8,32+8(16) - std 9,32+16(16) - std 10,32+24(16) - ld 7,64+0(17) - ld 8,64+8(17) - ld 9,64+16(17) - ld 10,64+24(17) - andc 28,28,19 - andc 29,29,19 - andc 30,30,19 - andc 31,31,19 - and 24,24,19 - and 25,25,19 - and 26,26,19 - and 27,27,19 - or 28,28,24 - or 29,29,25 - or 30,30,26 - or 31,31,27 - andc 7,7,20 - andc 8,8,20 - andc 9,9,20 - andc 10,10,20 - and 28,28,20 - and 29,29,20 - and 30,30,20 - and 31,31,20 - or 7,7,28 - or 8,8,29 - or 9,9,30 - or 10,10,31 - std 7,64+0(16) - std 8,64+8(16) - std 9,64+16(16) - std 10,64+24(16) - -.Ladd_done: - mtlr 0 - ld 16,576-8*16(1) - ld 17,576-8*15(1) - ld 18,576-8*14(1) - ld 19,576-8*13(1) - ld 20,576-8*12(1) - ld 21,576-8*11(1) - ld 22,576-8*10(1) - ld 23,576-8*9(1) - ld 24,576-8*8(1) - ld 25,576-8*7(1) - ld 26,576-8*6(1) - ld 27,576-8*5(1) - ld 28,576-8*4(1) - ld 29,576-8*3(1) - ld 30,576-8*2(1) - ld 31,576-8*1(1) - addi 1,1,576 - blr -.long 0 -.byte 0,12,4,0,0x80,16,3,0 -.long 0 -.size ecp_nistz256_point_add,.-ecp_nistz256_point_add -.globl ecp_nistz256_point_add_affine -.type ecp_nistz256_point_add_affine,@function -.align 5 -ecp_nistz256_point_add_affine: -.localentry ecp_nistz256_point_add_affine,0 - - stdu 1,-512(1) - mflr 0 - std 16,512-8*16(1) - std 17,512-8*15(1) - std 18,512-8*14(1) - std 19,512-8*13(1) - std 20,512-8*12(1) - std 21,512-8*11(1) - std 22,512-8*10(1) - std 23,512-8*9(1) - std 24,512-8*8(1) - std 25,512-8*7(1) - std 26,512-8*6(1) - std 27,512-8*5(1) - std 28,512-8*4(1) - std 29,512-8*3(1) - std 30,512-8*2(1) - std 31,512-8*1(1) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - mr 16,3 - mr 17,4 - mr 18,5 - - ld 24,64(4) - ld 25,72(4) - ld 26,80(4) - ld 27,88(4) - or 28,24,25 - or 30,26,27 - or 19,28,30 - neg 28,19 - or 19,19,28 - sradi 19,19,63 - - ld 7,0(5) - ld 8,8(5) - ld 9,16(5) - ld 10,24(5) - ld 28,32(5) - ld 29,40(5) - ld 30,48(5) - ld 31,56(5) - or 7,7,8 - or 9,9,10 - or 7,7,9 - or 28,28,29 - or 30,30,31 - or 28,28,30 - or 20,7,28 - neg 28,20 - or 20,20,28 - sradi 20,20,63 - - addi 3,1,192 - bl __ecp_nistz256_sqr_mont - - mr 24,7 - mr 25,8 - mr 26,9 - mr 27,10 - ld 6,0(18) - addi 5,18,0 - addi 3,1,160 - bl __ecp_nistz256_mul_mont - - addi 5,17,0 - ld 6,64(17) - ld 24,192+0(1) - ld 25,192+8(1) - ld 26,192+16(1) - ld 27,192+24(1) - addi 3,1,224 - bl __ecp_nistz256_sub_from - - addi 5,17,64 - addi 3,1,192 - bl __ecp_nistz256_mul_mont - - ld 6,64(17) - ld 24,224+0(1) - ld 25,224+8(1) - ld 26,224+16(1) - ld 27,224+24(1) - addi 5,17,64 - addi 3,1,128 - bl __ecp_nistz256_mul_mont - - ld 6,32(18) - ld 24,192+0(1) - ld 25,192+8(1) - ld 26,192+16(1) - ld 27,192+24(1) - addi 5,18,32 - addi 3,1,192 - bl __ecp_nistz256_mul_mont - - addi 5,17,32 - ld 24,224+0(1) - ld 25,224+8(1) - ld 26,224+16(1) - ld 27,224+24(1) - addi 3,1,256 - bl __ecp_nistz256_sub_from - - addi 3,1,288 - bl __ecp_nistz256_sqr_mont - - ld 24,256+0(1) - ld 25,256+8(1) - ld 26,256+16(1) - ld 27,256+24(1) - addi 3,1,352 - bl __ecp_nistz256_sqr_mont - - ld 6,224(1) - ld 24,288+0(1) - ld 25,288+8(1) - ld 26,288+16(1) - ld 27,288+24(1) - addi 5,1,224 - addi 3,1,320 - bl __ecp_nistz256_mul_mont - - ld 6,0(17) - ld 24,288+0(1) - ld 25,288+8(1) - ld 26,288+16(1) - ld 27,288+24(1) - addi 5,17,0 - addi 3,1,160 - bl __ecp_nistz256_mul_mont - - mr 28,7 - mr 29,8 - mr 30,9 - mr 31,10 - addi 3,1,288 - bl __ecp_nistz256_add - - addi 5,1,352 - addi 3,1,64 - bl __ecp_nistz256_sub_morf - - addi 5,1,320 - bl __ecp_nistz256_sub_from - - addi 5,1,160 - ld 6,32(17) - ld 24,320+0(1) - ld 25,320+8(1) - ld 26,320+16(1) - ld 27,320+24(1) - addi 3,1,96 - bl __ecp_nistz256_sub_morf - - addi 5,17,32 - addi 3,1,192 - bl __ecp_nistz256_mul_mont - - ld 6,256(1) - ld 24,96+0(1) - ld 25,96+8(1) - ld 26,96+16(1) - ld 27,96+24(1) - addi 5,1,256 - addi 3,1,96 - bl __ecp_nistz256_mul_mont - - addi 5,1,192 - bl __ecp_nistz256_sub_from - - ld 28,0(18) - ld 29,8(18) - ld 30,16(18) - ld 31,24(18) - ld 24,64+0(1) - ld 25,64+8(1) - ld 26,64+16(1) - ld 27,64+24(1) - ld 7,0+0(17) - ld 8,0+8(17) - ld 9,0+16(17) - ld 10,0+24(17) - andc 28,28,19 - andc 29,29,19 - andc 30,30,19 - andc 31,31,19 - and 24,24,19 - and 25,25,19 - and 26,26,19 - and 27,27,19 - or 28,28,24 - or 29,29,25 - or 30,30,26 - or 31,31,27 - andc 7,7,20 - andc 8,8,20 - andc 9,9,20 - andc 10,10,20 - and 28,28,20 - and 29,29,20 - and 30,30,20 - and 31,31,20 - or 7,7,28 - or 8,8,29 - or 9,9,30 - or 10,10,31 - ld 28,32(18) - ld 29,40(18) - ld 30,48(18) - ld 31,56(18) - ld 24,64+0+32(1) - ld 25,64+0+40(1) - ld 26,64+0+48(1) - ld 27,64+0+56(1) - std 7,0+0(16) - std 8,0+8(16) - std 9,0+16(16) - std 10,0+24(16) - ld 7,32+0(17) - ld 8,32+8(17) - ld 9,32+16(17) - ld 10,32+24(17) - andc 28,28,19 - andc 29,29,19 - andc 30,30,19 - andc 31,31,19 - and 24,24,19 - and 25,25,19 - and 26,26,19 - and 27,27,19 - or 28,28,24 - or 29,29,25 - or 30,30,26 - or 31,31,27 - andc 7,7,20 - andc 8,8,20 - andc 9,9,20 - andc 10,10,20 - and 28,28,20 - and 29,29,20 - and 30,30,20 - and 31,31,20 - or 7,7,28 - or 8,8,29 - or 9,9,30 - or 10,10,31 - li 28,1 - not 29,11 - li 30,-1 - not 31,12 - ld 24,64+32+32(1) - ld 25,64+32+40(1) - ld 26,64+32+48(1) - ld 27,64+32+56(1) - std 7,32+0(16) - std 8,32+8(16) - std 9,32+16(16) - std 10,32+24(16) - ld 7,64+0(17) - ld 8,64+8(17) - ld 9,64+16(17) - ld 10,64+24(17) - andc 28,28,19 - andc 29,29,19 - andc 30,30,19 - andc 31,31,19 - and 24,24,19 - and 25,25,19 - and 26,26,19 - and 27,27,19 - or 28,28,24 - or 29,29,25 - or 30,30,26 - or 31,31,27 - andc 7,7,20 - andc 8,8,20 - andc 9,9,20 - andc 10,10,20 - and 28,28,20 - and 29,29,20 - and 30,30,20 - and 31,31,20 - or 7,7,28 - or 8,8,29 - or 9,9,30 - or 10,10,31 - std 7,64+0(16) - std 8,64+8(16) - std 9,64+16(16) - std 10,64+24(16) - - mtlr 0 - ld 16,512-8*16(1) - ld 17,512-8*15(1) - ld 18,512-8*14(1) - ld 19,512-8*13(1) - ld 20,512-8*12(1) - ld 21,512-8*11(1) - ld 22,512-8*10(1) - ld 23,512-8*9(1) - ld 24,512-8*8(1) - ld 25,512-8*7(1) - ld 26,512-8*6(1) - ld 27,512-8*5(1) - ld 28,512-8*4(1) - ld 29,512-8*3(1) - ld 30,512-8*2(1) - ld 31,512-8*1(1) - addi 1,1,512 - blr -.long 0 -.byte 0,12,4,0,0x80,16,3,0 -.long 0 -.size ecp_nistz256_point_add_affine,.-ecp_nistz256_point_add_affine - - - -.globl ecp_nistz256_ord_mul_mont -.type ecp_nistz256_ord_mul_mont,@function -.align 5 -ecp_nistz256_ord_mul_mont: -.localentry ecp_nistz256_ord_mul_mont,0 - - stdu 1,-160(1) - std 18,48(1) - std 19,56(1) - std 20,64(1) - std 21,72(1) - std 22,80(1) - std 23,88(1) - std 24,96(1) - std 25,104(1) - std 26,112(1) - std 27,120(1) - std 28,128(1) - std 29,136(1) - std 30,144(1) - std 31,152(1) - - ld 24,0(4) - ld 6,0(5) - ld 25,8(4) - ld 26,16(4) - ld 27,24(4) - - lis 18,0xccd1 - lis 19,0xf3b9 - lis 20,0xbce6 - ori 18,18,0xc8aa - ori 19,19,0xcac2 - ori 20,20,0xfaad - sldi 18,18,32 - sldi 19,19,32 - sldi 20,20,32 - oris 18,18,0xee00 - oris 19,19,0xfc63 - oris 20,20,0xa717 - ori 18,18,0xbc4f - ori 19,19,0x2551 - ori 20,20,0x9e84 - li 11,-1 - sldi 12,11,32 - li 0,0 - - mulld 7,24,6 - mulhdu 28,24,6 - - mulld 8,25,6 - mulhdu 29,25,6 - - mulld 9,26,6 - mulhdu 30,26,6 - - mulld 10,27,6 - mulhdu 22,27,6 - - mulld 21,7,18 - - addc 8,8,28 - adde 9,9,29 - adde 10,10,30 - addze 22,22 - li 23,0 - ld 6,8*1(5) - - sldi 28,21,32 - subfc 9,21,9 - srdi 29,21,32 - subfe 10,28,10 - subfe 22,29,22 - subfe 23,0,23 - - addic 28,7,-1 - mulhdu 29,19,21 - mulld 30,20,21 - mulhdu 31,20,21 - - adde 30,30,29 - mulld 28,24,6 - addze 31,31 - mulld 29,25,6 - - addc 7,8,30 - mulld 30,26,6 - adde 8,9,31 - mulld 31,27,6 - adde 9,10,21 - adde 10,22,21 - addze 22,23 - - addc 7,7,28 - mulhdu 28,24,6 - adde 8,8,29 - mulhdu 29,25,6 - adde 9,9,30 - mulhdu 30,26,6 - adde 10,10,31 - mulhdu 31,27,6 - addze 22,22 - mulld 21,7,18 - addc 8,8,28 - adde 9,9,29 - adde 10,10,30 - adde 22,22,31 - addze 23,0 - ld 6,8*2(5) - - sldi 28,21,32 - subfc 9,21,9 - srdi 29,21,32 - subfe 10,28,10 - subfe 22,29,22 - subfe 23,0,23 - - addic 28,7,-1 - mulhdu 29,19,21 - mulld 30,20,21 - mulhdu 31,20,21 - - adde 30,30,29 - mulld 28,24,6 - addze 31,31 - mulld 29,25,6 - - addc 7,8,30 - mulld 30,26,6 - adde 8,9,31 - mulld 31,27,6 - adde 9,10,21 - adde 10,22,21 - addze 22,23 - - addc 7,7,28 - mulhdu 28,24,6 - adde 8,8,29 - mulhdu 29,25,6 - adde 9,9,30 - mulhdu 30,26,6 - adde 10,10,31 - mulhdu 31,27,6 - addze 22,22 - mulld 21,7,18 - addc 8,8,28 - adde 9,9,29 - adde 10,10,30 - adde 22,22,31 - addze 23,0 - ld 6,8*3(5) - - sldi 28,21,32 - subfc 9,21,9 - srdi 29,21,32 - subfe 10,28,10 - subfe 22,29,22 - subfe 23,0,23 - - addic 28,7,-1 - mulhdu 29,19,21 - mulld 30,20,21 - mulhdu 31,20,21 - - adde 30,30,29 - mulld 28,24,6 - addze 31,31 - mulld 29,25,6 - - addc 7,8,30 - mulld 30,26,6 - adde 8,9,31 - mulld 31,27,6 - adde 9,10,21 - adde 10,22,21 - addze 22,23 - - addc 7,7,28 - mulhdu 28,24,6 - adde 8,8,29 - mulhdu 29,25,6 - adde 9,9,30 - mulhdu 30,26,6 - adde 10,10,31 - mulhdu 31,27,6 - addze 22,22 - mulld 21,7,18 - addc 8,8,28 - adde 9,9,29 - adde 10,10,30 - adde 22,22,31 - addze 23,0 - sldi 28,21,32 - subfc 9,21,9 - srdi 29,21,32 - subfe 10,28,10 - subfe 22,29,22 - subfe 23,0,23 - - addic 28,7,-1 - mulhdu 29,19,21 - mulld 30,20,21 - mulhdu 31,20,21 - - adde 30,30,29 - addze 31,31 - - addc 7,8,30 - adde 8,9,31 - adde 9,10,21 - adde 10,22,21 - addze 22,23 - - subfc 7,19,7 - subfe 8,20,8 - subfe 9,11,9 - subfe 10,12,10 - subfe 22,0,22 - - and 28,19,22 - and 29,20,22 - addc 7,7,28 - and 31,12,22 - adde 8,8,29 - adde 9,9,22 - adde 10,10,31 - - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - - ld 18,48(1) - ld 19,56(1) - ld 20,64(1) - ld 21,72(1) - ld 22,80(1) - ld 23,88(1) - ld 24,96(1) - ld 25,104(1) - ld 26,112(1) - ld 27,120(1) - ld 28,128(1) - ld 29,136(1) - ld 30,144(1) - ld 31,152(1) - addi 1,1,160 - blr -.long 0 -.byte 0,12,4,0,0x80,14,3,0 -.long 0 -.size ecp_nistz256_ord_mul_mont,.-ecp_nistz256_ord_mul_mont - - - - -.globl ecp_nistz256_ord_sqr_mont -.type ecp_nistz256_ord_sqr_mont,@function -.align 5 -ecp_nistz256_ord_sqr_mont: -.localentry ecp_nistz256_ord_sqr_mont,0 - - stdu 1,-160(1) - std 18,48(1) - std 19,56(1) - std 20,64(1) - std 21,72(1) - std 22,80(1) - std 23,88(1) - std 24,96(1) - std 25,104(1) - std 26,112(1) - std 27,120(1) - std 28,128(1) - std 29,136(1) - std 30,144(1) - std 31,152(1) - - mtctr 5 - - ld 24,0(4) - ld 25,8(4) - ld 26,16(4) - ld 27,24(4) - - lis 18,0xccd1 - lis 19,0xf3b9 - lis 20,0xbce6 - ori 18,18,0xc8aa - ori 19,19,0xcac2 - ori 20,20,0xfaad - sldi 18,18,32 - sldi 19,19,32 - sldi 20,20,32 - oris 18,18,0xee00 - oris 19,19,0xfc63 - oris 20,20,0xa717 - ori 18,18,0xbc4f - ori 19,19,0x2551 - ori 20,20,0x9e84 - li 11,-1 - sldi 12,11,32 - li 0,0 - b .Loop_ord_sqr - -.align 5 -.Loop_ord_sqr: - - - - - - - - - - - - - - - - mulld 8,25,24 - mulhdu 29,25,24 - mulld 9,26,24 - mulhdu 30,26,24 - mulld 10,27,24 - mulhdu 22,27,24 - - addc 9,9,29 - mulld 28,26,25 - mulhdu 29,26,25 - adde 10,10,30 - mulld 30,27,25 - mulhdu 31,27,25 - addze 22,22 - - mulld 23,27,26 - mulhdu 5,27,26 - - addc 29,29,30 - mulld 7,24,24 - addze 30,31 - - addc 10,10,28 - mulhdu 24,24,24 - adde 22,22,29 - mulld 29,25,25 - adde 23,23,30 - mulhdu 25,25,25 - addze 5,5 - - addc 8,8,8 - mulld 30,26,26 - adde 9,9,9 - mulhdu 26,26,26 - adde 10,10,10 - mulld 31,27,27 - adde 22,22,22 - mulhdu 27,27,27 - adde 23,23,23 - adde 5,5,5 - addze 6,0 - - addc 8,8,24 - mulld 21,7,18 - adde 9,9,29 - adde 10,10,25 - adde 22,22,30 - adde 23,23,26 - adde 5,5,31 - adde 6,6,27 - addic 28,7,-1 - mulhdu 29,19,21 - mulld 30,20,21 - mulhdu 31,20,21 - - adde 30,30,29 - addze 31,31 - - addc 7,8,30 - adde 8,9,31 - adde 9,10,21 - adde 10,0,21 - mulld 31,7,18 - sldi 28,21,32 - subfc 8,21,8 - srdi 29,21,32 - subfe 9,28,9 - subfe 10,29,10 - addic 28,7,-1 - mulhdu 29,19,31 - mulld 30,20,31 - mulhdu 21,20,31 - - adde 30,30,29 - addze 21,21 - - addc 7,8,30 - adde 8,9,21 - adde 9,10,31 - adde 10,0,31 - mulld 21,7,18 - sldi 28,31,32 - subfc 8,31,8 - srdi 29,31,32 - subfe 9,28,9 - subfe 10,29,10 - addic 28,7,-1 - mulhdu 29,19,21 - mulld 30,20,21 - mulhdu 31,20,21 - - adde 30,30,29 - addze 31,31 - - addc 7,8,30 - adde 8,9,31 - adde 9,10,21 - adde 10,0,21 - mulld 31,7,18 - sldi 28,21,32 - subfc 8,21,8 - srdi 29,21,32 - subfe 9,28,9 - subfe 10,29,10 - addic 28,7,-1 - mulhdu 29,19,31 - mulld 30,20,31 - mulhdu 21,20,31 - - adde 30,30,29 - addze 21,21 - - addc 7,8,30 - adde 8,9,21 - adde 9,10,31 - adde 10,0,31 - sldi 28,31,32 - subfc 8,31,8 - srdi 29,31,32 - subfe 9,28,9 - subfe 10,29,10 - addc 7,7,22 - adde 8,8,23 - adde 9,9,5 - adde 10,10,6 - addze 22,0 - - subfc 7,19,7 - subfe 8,20,8 - subfe 9,11,9 - subfe 10,12,10 - subfe 22,0,22 - - and 28,19,22 - and 29,20,22 - addc 24,7,28 - and 31,12,22 - adde 25,8,29 - adde 26,9,22 - adde 27,10,31 - - bdnz .Loop_ord_sqr - - std 24,0(3) - std 25,8(3) - std 26,16(3) - std 27,24(3) - - ld 18,48(1) - ld 19,56(1) - ld 20,64(1) - ld 21,72(1) - ld 22,80(1) - ld 23,88(1) - ld 24,96(1) - ld 25,104(1) - ld 26,112(1) - ld 27,120(1) - ld 28,128(1) - ld 29,136(1) - ld 30,144(1) - ld 31,152(1) - addi 1,1,160 - blr -.long 0 -.byte 0,12,4,0,0x80,14,3,0 -.long 0 -.size ecp_nistz256_ord_sqr_mont,.-ecp_nistz256_ord_sqr_mont - - - -.globl ecp_nistz256_scatter_w5 -.type ecp_nistz256_scatter_w5,@function -.align 4 -ecp_nistz256_scatter_w5: -.localentry ecp_nistz256_scatter_w5,0 - - slwi 5,5,2 - add 3,3,5 - - ld 8, 0(4) - ld 9, 8(4) - ld 10,16(4) - ld 11,24(4) - - stw 8, 64*0-4(3) - srdi 8, 8, 32 - stw 9, 64*1-4(3) - srdi 9, 9, 32 - stw 10,64*2-4(3) - srdi 10,10,32 - stw 11,64*3-4(3) - srdi 11,11,32 - stw 8, 64*4-4(3) - stw 9, 64*5-4(3) - stw 10,64*6-4(3) - stw 11,64*7-4(3) - addi 3,3,64*8 - - ld 8, 32(4) - ld 9, 40(4) - ld 10,48(4) - ld 11,56(4) - - stw 8, 64*0-4(3) - srdi 8, 8, 32 - stw 9, 64*1-4(3) - srdi 9, 9, 32 - stw 10,64*2-4(3) - srdi 10,10,32 - stw 11,64*3-4(3) - srdi 11,11,32 - stw 8, 64*4-4(3) - stw 9, 64*5-4(3) - stw 10,64*6-4(3) - stw 11,64*7-4(3) - addi 3,3,64*8 - - ld 8, 64(4) - ld 9, 72(4) - ld 10,80(4) - ld 11,88(4) - - stw 8, 64*0-4(3) - srdi 8, 8, 32 - stw 9, 64*1-4(3) - srdi 9, 9, 32 - stw 10,64*2-4(3) - srdi 10,10,32 - stw 11,64*3-4(3) - srdi 11,11,32 - stw 8, 64*4-4(3) - stw 9, 64*5-4(3) - stw 10,64*6-4(3) - stw 11,64*7-4(3) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size ecp_nistz256_scatter_w5,.-ecp_nistz256_scatter_w5 - - - - -.globl ecp_nistz256_gather_w5 -.type ecp_nistz256_gather_w5,@function -.align 4 -ecp_nistz256_gather_w5: -.localentry ecp_nistz256_gather_w5,0 - - neg 0,5 - sradi 0,0,63 - - add 5,5,0 - slwi 5,5,2 - add 4,4,5 - - lwz 5, 64*0(4) - lwz 6, 64*1(4) - lwz 7, 64*2(4) - lwz 8, 64*3(4) - lwz 9, 64*4(4) - lwz 10,64*5(4) - lwz 11,64*6(4) - lwz 12,64*7(4) - addi 4,4,64*8 - sldi 9, 9, 32 - sldi 10,10,32 - sldi 11,11,32 - sldi 12,12,32 - or 5,5,9 - or 6,6,10 - or 7,7,11 - or 8,8,12 - and 5,5,0 - and 6,6,0 - and 7,7,0 - and 8,8,0 - std 5,0(3) - std 6,8(3) - std 7,16(3) - std 8,24(3) - - lwz 5, 64*0(4) - lwz 6, 64*1(4) - lwz 7, 64*2(4) - lwz 8, 64*3(4) - lwz 9, 64*4(4) - lwz 10,64*5(4) - lwz 11,64*6(4) - lwz 12,64*7(4) - addi 4,4,64*8 - sldi 9, 9, 32 - sldi 10,10,32 - sldi 11,11,32 - sldi 12,12,32 - or 5,5,9 - or 6,6,10 - or 7,7,11 - or 8,8,12 - and 5,5,0 - and 6,6,0 - and 7,7,0 - and 8,8,0 - std 5,32(3) - std 6,40(3) - std 7,48(3) - std 8,56(3) - - lwz 5, 64*0(4) - lwz 6, 64*1(4) - lwz 7, 64*2(4) - lwz 8, 64*3(4) - lwz 9, 64*4(4) - lwz 10,64*5(4) - lwz 11,64*6(4) - lwz 12,64*7(4) - sldi 9, 9, 32 - sldi 10,10,32 - sldi 11,11,32 - sldi 12,12,32 - or 5,5,9 - or 6,6,10 - or 7,7,11 - or 8,8,12 - and 5,5,0 - and 6,6,0 - and 7,7,0 - and 8,8,0 - std 5,64(3) - std 6,72(3) - std 7,80(3) - std 8,88(3) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size ecp_nistz256_gather_w5,.-ecp_nistz256_gather_w5 - - - - -.globl ecp_nistz256_scatter_w7 -.type ecp_nistz256_scatter_w7,@function -.align 4 -ecp_nistz256_scatter_w7: -.localentry ecp_nistz256_scatter_w7,0 - - li 0,8 - mtctr 0 - add 3,3,5 - subi 4,4,8 - -.Loop_scatter_w7: - ldu 0,8(4) - stb 0,64*0(3) - srdi 0,0,8 - stb 0,64*1(3) - srdi 0,0,8 - stb 0,64*2(3) - srdi 0,0,8 - stb 0,64*3(3) - srdi 0,0,8 - stb 0,64*4(3) - srdi 0,0,8 - stb 0,64*5(3) - srdi 0,0,8 - stb 0,64*6(3) - srdi 0,0,8 - stb 0,64*7(3) - addi 3,3,64*8 - bdnz .Loop_scatter_w7 - - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size ecp_nistz256_scatter_w7,.-ecp_nistz256_scatter_w7 - - - - -.globl ecp_nistz256_gather_w7 -.type ecp_nistz256_gather_w7,@function -.align 4 -ecp_nistz256_gather_w7: -.localentry ecp_nistz256_gather_w7,0 - - li 0,8 - mtctr 0 - neg 0,5 - sradi 0,0,63 - - add 5,5,0 - add 4,4,5 - subi 3,3,8 - -.Loop_gather_w7: - lbz 5, 64*0(4) - lbz 6, 64*1(4) - lbz 7, 64*2(4) - lbz 8, 64*3(4) - lbz 9, 64*4(4) - lbz 10,64*5(4) - lbz 11,64*6(4) - lbz 12,64*7(4) - addi 4,4,64*8 - - sldi 6, 6, 8 - sldi 7, 7, 16 - sldi 8, 8, 24 - sldi 9, 9, 32 - sldi 10,10,40 - sldi 11,11,48 - sldi 12,12,56 - - or 5,5,6 - or 7,7,8 - or 9,9,10 - or 11,11,12 - or 5,5,7 - or 9,9,11 - or 5,5,9 - and 5,5,0 - stdu 5,8(3) - bdnz .Loop_gather_w7 - - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size ecp_nistz256_gather_w7,.-ecp_nistz256_gather_w7 diff --git a/sys/crypto/openssl/powerpc64/ghashp8-ppc.S b/sys/crypto/openssl/powerpc64/ghashp8-ppc.S deleted file mode 100644 index 719d6b7e736..00000000000 --- a/sys/crypto/openssl/powerpc64/ghashp8-ppc.S +++ /dev/null @@ -1,576 +0,0 @@ -/* Do not modify. This file is auto-generated from ghashp8-ppc.pl. */ -.machine "any" - -.abiversion 2 -.text - -.globl gcm_init_p8 -.type gcm_init_p8,@function -.align 5 -gcm_init_p8: -.localentry gcm_init_p8,0 - - li 0,-4096 - li 8,0x10 - li 12,-1 - li 9,0x20 - or 0,0,0 - li 10,0x30 - .long 0x7D202699 - - vspltisb 8,-16 - vspltisb 5,1 - vaddubm 8,8,8 - vxor 4,4,4 - vor 8,8,5 - vsldoi 8,8,4,15 - vsldoi 6,4,5,1 - vaddubm 8,8,8 - vspltisb 7,7 - vor 8,8,6 - vspltb 6,9,0 - vsl 9,9,5 - vsrab 6,6,7 - vand 6,6,8 - vxor 3,9,6 - - vsldoi 9,3,3,8 - vsldoi 8,4,8,8 - vsldoi 11,4,9,8 - vsldoi 10,9,4,8 - - .long 0x7D001F99 - .long 0x7D681F99 - li 8,0x40 - .long 0x7D291F99 - li 9,0x50 - .long 0x7D4A1F99 - li 10,0x60 - - .long 0x10035CC8 - .long 0x10234CC8 - .long 0x104354C8 - - .long 0x10E044C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - - vsldoi 6,0,0,8 - .long 0x100044C8 - vxor 6,6,2 - vxor 16,0,6 - - vsldoi 17,16,16,8 - vsldoi 19,4,17,8 - vsldoi 18,17,4,8 - - .long 0x7E681F99 - li 8,0x70 - .long 0x7E291F99 - li 9,0x80 - .long 0x7E4A1F99 - li 10,0x90 - .long 0x10039CC8 - .long 0x11B09CC8 - .long 0x10238CC8 - .long 0x11D08CC8 - .long 0x104394C8 - .long 0x11F094C8 - - .long 0x10E044C8 - .long 0x114D44C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vsldoi 11,14,4,8 - vsldoi 9,4,14,8 - vxor 0,0,5 - vxor 2,2,6 - vxor 13,13,11 - vxor 15,15,9 - - vsldoi 0,0,0,8 - vsldoi 13,13,13,8 - vxor 0,0,7 - vxor 13,13,10 - - vsldoi 6,0,0,8 - vsldoi 9,13,13,8 - .long 0x100044C8 - .long 0x11AD44C8 - vxor 6,6,2 - vxor 9,9,15 - vxor 0,0,6 - vxor 13,13,9 - - vsldoi 9,0,0,8 - vsldoi 17,13,13,8 - vsldoi 11,4,9,8 - vsldoi 10,9,4,8 - vsldoi 19,4,17,8 - vsldoi 18,17,4,8 - - .long 0x7D681F99 - li 8,0xa0 - .long 0x7D291F99 - li 9,0xb0 - .long 0x7D4A1F99 - li 10,0xc0 - .long 0x7E681F99 - .long 0x7E291F99 - .long 0x7E4A1F99 - - or 12,12,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size gcm_init_p8,.-gcm_init_p8 -.globl gcm_gmult_p8 -.type gcm_gmult_p8,@function -.align 5 -gcm_gmult_p8: -.localentry gcm_gmult_p8,0 - - lis 0,0xfff8 - li 8,0x10 - li 12,-1 - li 9,0x20 - or 0,0,0 - li 10,0x30 - .long 0x7C601E99 - - .long 0x7D682699 - - .long 0x7D292699 - - .long 0x7D4A2699 - - .long 0x7D002699 - - vxor 4,4,4 - - .long 0x10035CC8 - .long 0x10234CC8 - .long 0x104354C8 - - .long 0x10E044C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - - vsldoi 6,0,0,8 - .long 0x100044C8 - vxor 6,6,2 - vxor 0,0,6 - - - .long 0x7C001F99 - - or 12,12,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size gcm_gmult_p8,.-gcm_gmult_p8 - -.globl gcm_ghash_p8 -.type gcm_ghash_p8,@function -.align 5 -gcm_ghash_p8: -.localentry gcm_ghash_p8,0 - - li 0,-4096 - li 8,0x10 - li 12,-1 - li 9,0x20 - or 0,0,0 - li 10,0x30 - .long 0x7C001E99 - - .long 0x7D682699 - li 8,0x40 - - .long 0x7D292699 - li 9,0x50 - - .long 0x7D4A2699 - li 10,0x60 - - .long 0x7D002699 - - vxor 4,4,4 - - cmpldi 6,64 - bge .Lgcm_ghash_p8_4x - - .long 0x7C602E99 - addi 5,5,16 - subic. 6,6,16 - - vxor 3,3,0 - beq .Lshort - - .long 0x7E682699 - li 8,16 - .long 0x7E292699 - add 9,5,6 - .long 0x7E4A2699 - b .Loop_2x - -.align 5 -.Loop_2x: - .long 0x7E002E99 - - - subic 6,6,32 - .long 0x10039CC8 - .long 0x11B05CC8 - subfe 0,0,0 - .long 0x10238CC8 - .long 0x11D04CC8 - and 0,0,6 - .long 0x104394C8 - .long 0x11F054C8 - add 5,5,0 - - vxor 0,0,13 - vxor 1,1,14 - - .long 0x10E044C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 2,2,15 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - .long 0x7C682E99 - addi 5,5,32 - - vsldoi 6,0,0,8 - .long 0x100044C8 - - vxor 6,6,2 - vxor 3,3,6 - vxor 3,3,0 - cmpld 9,5 - bgt .Loop_2x - - cmplwi 6,0 - bne .Leven - -.Lshort: - .long 0x10035CC8 - .long 0x10234CC8 - .long 0x104354C8 - - .long 0x10E044C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - - vsldoi 6,0,0,8 - .long 0x100044C8 - vxor 6,6,2 - -.Leven: - vxor 0,0,6 - - .long 0x7C001F99 - - or 12,12,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,4,0 -.long 0 -.align 5 -.gcm_ghash_p8_4x: -.Lgcm_ghash_p8_4x: - stdu 1,-256(1) - li 10,63 - li 11,79 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - li 10,0x60 - stvx 31,11,1 - li 0,-1 - stw 12,252(1) - or 0,0,0 - - lvsl 5,0,8 - - li 8,0x70 - .long 0x7E292699 - li 9,0x80 - vspltisb 6,8 - - li 10,0x90 - .long 0x7EE82699 - li 8,0xa0 - .long 0x7F092699 - li 9,0xb0 - .long 0x7F2A2699 - li 10,0xc0 - .long 0x7FA82699 - li 8,0x10 - .long 0x7FC92699 - li 9,0x20 - .long 0x7FEA2699 - li 10,0x30 - - vsldoi 7,4,6,8 - vaddubm 18,5,7 - vaddubm 19,6,18 - - srdi 6,6,4 - - .long 0x7C602E99 - .long 0x7E082E99 - subic. 6,6,8 - .long 0x7EC92E99 - .long 0x7F8A2E99 - addi 5,5,0x40 - - - - - - vxor 2,3,0 - - .long 0x11B0BCC8 - .long 0x11D0C4C8 - .long 0x11F0CCC8 - - vperm 11,17,9,18 - vperm 5,22,28,19 - vperm 10,17,9,19 - vperm 6,22,28,18 - .long 0x12B68CC8 - .long 0x12855CC8 - .long 0x137C4CC8 - .long 0x134654C8 - - vxor 21,21,14 - vxor 20,20,13 - vxor 27,27,21 - vxor 26,26,15 - - blt .Ltail_4x - -.Loop_4x: - .long 0x7C602E99 - .long 0x7E082E99 - subic. 6,6,4 - .long 0x7EC92E99 - .long 0x7F8A2E99 - addi 5,5,0x40 - - - - - - .long 0x1002ECC8 - .long 0x1022F4C8 - .long 0x1042FCC8 - .long 0x11B0BCC8 - .long 0x11D0C4C8 - .long 0x11F0CCC8 - - vxor 0,0,20 - vxor 1,1,27 - vxor 2,2,26 - vperm 5,22,28,19 - vperm 6,22,28,18 - - .long 0x10E044C8 - .long 0x12855CC8 - .long 0x134654C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - - vsldoi 6,0,0,8 - .long 0x12B68CC8 - .long 0x137C4CC8 - .long 0x100044C8 - - vxor 20,20,13 - vxor 26,26,15 - vxor 2,2,3 - vxor 21,21,14 - vxor 2,2,6 - vxor 27,27,21 - vxor 2,2,0 - bge .Loop_4x - -.Ltail_4x: - .long 0x1002ECC8 - .long 0x1022F4C8 - .long 0x1042FCC8 - - vxor 0,0,20 - vxor 1,1,27 - - .long 0x10E044C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 2,2,26 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - - vsldoi 6,0,0,8 - .long 0x100044C8 - vxor 6,6,2 - vxor 0,0,6 - - addic. 6,6,4 - beq .Ldone_4x - - .long 0x7C602E99 - cmpldi 6,2 - li 6,-4 - blt .Lone - .long 0x7E082E99 - beq .Ltwo - -.Lthree: - .long 0x7EC92E99 - - - - - vxor 2,3,0 - vor 29,23,23 - vor 30,24,24 - vor 31,25,25 - - vperm 5,16,22,19 - vperm 6,16,22,18 - .long 0x12B08CC8 - .long 0x13764CC8 - .long 0x12855CC8 - .long 0x134654C8 - - vxor 27,27,21 - b .Ltail_4x - -.align 4 -.Ltwo: - - - - vxor 2,3,0 - vperm 5,4,16,19 - vperm 6,4,16,18 - - vsldoi 29,4,17,8 - vor 30,17,17 - vsldoi 31,17,4,8 - - .long 0x12855CC8 - .long 0x13704CC8 - .long 0x134654C8 - - b .Ltail_4x - -.align 4 -.Lone: - - - vsldoi 29,4,9,8 - vor 30,9,9 - vsldoi 31,9,4,8 - - vxor 2,3,0 - vxor 20,20,20 - vxor 27,27,27 - vxor 26,26,26 - - b .Ltail_4x - -.Ldone_4x: - - .long 0x7C001F99 - - li 10,63 - li 11,79 - or 12,12,12 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - addi 1,1,256 - blr -.long 0 -.byte 0,12,0x04,0,0x80,0,4,0 -.long 0 -.size gcm_ghash_p8,.-gcm_ghash_p8 - -.byte 71,72,65,83,72,32,102,111,114,32,80,111,119,101,114,73,83,65,32,50,46,48,55,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 2 diff --git a/sys/crypto/openssl/powerpc64/keccak1600-ppc64.S b/sys/crypto/openssl/powerpc64/keccak1600-ppc64.S deleted file mode 100644 index bac074cdcf6..00000000000 --- a/sys/crypto/openssl/powerpc64/keccak1600-ppc64.S +++ /dev/null @@ -1,670 +0,0 @@ -/* Do not modify. This file is auto-generated from keccak1600-ppc64.pl. */ -.abiversion 2 -.text - -.type KeccakF1600_int,@function -.align 5 -KeccakF1600_int: -.localentry KeccakF1600_int,0 - - li 0,24 - mtctr 0 - b .Loop -.align 4 -.Loop: - xor 0,7,12 - std 11,96(1) - xor 3,8,6 - std 16,104(1) - xor 4,9,14 - std 21,112(1) - xor 5,10,15 - std 26,120(1) - xor 11,11,16 - xor 0,0,17 - xor 3,3,18 - xor 4,4,19 - xor 5,5,20 - xor 11,11,21 - xor 0,0,22 - xor 3,3,23 - xor 4,4,24 - xor 5,5,25 - xor 11,11,26 - xor 0,0,27 - xor 4,4,29 - xor 3,3,28 - xor 5,5,30 - rotldi 16,4,1 - xor 11,11,31 - rotldi 21,5,1 - xor 16,16,0 - rotldi 26,11,1 - - xor 8,8,16 - xor 6,6,16 - xor 18,18,16 - xor 23,23,16 - xor 28,28,16 - - rotldi 16,0,1 - xor 21,21,3 - xor 4,4,26 - rotldi 26,3,1 - xor 5,5,16 - xor 11,11,26 - - xor 3, 9,21 - xor 14,14,21 - xor 19,19,21 - xor 24,24,21 - xor 29,29,21 - - xor 7,7,11 - xor 12,12,11 - xor 17,17,11 - xor 22,22,11 - xor 27,27,11 - ld 11,96(1) - xor 0, 10,4 - ld 16,104(1) - xor 15,15,4 - ld 21,112(1) - xor 20,20,4 - ld 26,120(1) - xor 25,25,4 - xor 30,30,4 - - xor 4, 11,5 - xor 16,16,5 - xor 21,21,5 - xor 26,26,5 - xor 31,31,5 - - mr 5,8 - rotldi 8,6,44 - - rotldi 9,19,43 - - rotldi 10,25,21 - - rotldi 11,31,14 - - rotldi 6,16,20 - rotldi 19,20,25 - rotldi 25,24,15 - rotldi 31,28,2 - - rotldi 16,29,61 - rotldi 20,26,8 - rotldi 24,18,10 - rotldi 28,15,55 - - rotldi 29,21,39 - rotldi 26,30,56 - rotldi 18,14,6 - rotldi 15,23,45 - - rotldi 21,27,18 - rotldi 30,22,41 - rotldi 14,17,3 - rotldi 23,12,36 - - rotldi 12,0,28 - rotldi 17,5,1 - rotldi 22,4,27 - rotldi 27,3,62 - - andc 0,9,8 - andc 3,10,9 - andc 4,7,11 - andc 5,8,7 - xor 7,7,0 - andc 0,11,10 - xor 8,8,3 - ld 3,80(1) - xor 10,10,4 - xor 11,11,5 - xor 9,9,0 - ldu 5,8(3) - - andc 0,14,6 - std 3,80(1) - andc 3,15,14 - andc 4,12,16 - xor 7,7,5 - andc 5,6,12 - xor 12,12,0 - andc 0,16,15 - xor 6,6,3 - xor 15,15,4 - xor 16,16,5 - xor 14,14,0 - - andc 0,19,18 - andc 3,20,19 - andc 4,17,21 - andc 5,18,17 - xor 17,17,0 - andc 0,21,20 - xor 18,18,3 - xor 20,20,4 - xor 21,21,5 - xor 19,19,0 - - andc 0,24,23 - andc 3,25,24 - andc 4,22,26 - andc 5,23,22 - xor 22,22,0 - andc 0,26,25 - xor 23,23,3 - xor 25,25,4 - xor 26,26,5 - xor 24,24,0 - - andc 0,29,28 - andc 3,30,29 - andc 4,27,31 - andc 5,28,27 - xor 27,27,0 - andc 0,31,30 - xor 28,28,3 - xor 30,30,4 - xor 31,31,5 - xor 29,29,0 - - bdnz .Loop - - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size KeccakF1600_int,.-KeccakF1600_int - -.type KeccakF1600,@function -.align 5 -KeccakF1600: -.localentry KeccakF1600,0 - - stdu 1,-272(1) - mflr 0 - std 14,128(1) - std 15,136(1) - std 16,144(1) - std 17,152(1) - std 18,160(1) - std 19,168(1) - std 20,176(1) - std 21,184(1) - std 22,192(1) - std 23,200(1) - std 24,208(1) - std 25,216(1) - std 26,224(1) - std 27,232(1) - std 28,240(1) - std 29,248(1) - std 30,256(1) - std 31,264(1) - std 0,288(1) - - bl PICmeup - subi 12,12,8 - - std 3,48(1) - - - - std 12,80(1) - - ld 7,0(3) - ld 8,8(3) - ld 9,16(3) - ld 10,24(3) - ld 11,32(3) - ld 12,40(3) - ld 6,48(3) - ld 14,56(3) - ld 15,64(3) - ld 16,72(3) - ld 17,80(3) - ld 18,88(3) - ld 19,96(3) - ld 20,104(3) - ld 21,112(3) - ld 22,120(3) - ld 23,128(3) - ld 24,136(3) - ld 25,144(3) - ld 26,152(3) - ld 27,160(3) - ld 28,168(3) - ld 29,176(3) - ld 30,184(3) - ld 31,192(3) - - bl KeccakF1600_int - - ld 3,48(1) - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - std 11,32(3) - std 12,40(3) - std 6,48(3) - std 14,56(3) - std 15,64(3) - std 16,72(3) - std 17,80(3) - std 18,88(3) - std 19,96(3) - std 20,104(3) - std 21,112(3) - std 22,120(3) - std 23,128(3) - std 24,136(3) - std 25,144(3) - std 26,152(3) - std 27,160(3) - std 28,168(3) - std 29,176(3) - std 30,184(3) - std 31,192(3) - - ld 0,288(1) - ld 14,128(1) - ld 15,136(1) - ld 16,144(1) - ld 17,152(1) - ld 18,160(1) - ld 19,168(1) - ld 20,176(1) - ld 21,184(1) - ld 22,192(1) - ld 23,200(1) - ld 24,208(1) - ld 25,216(1) - ld 26,224(1) - ld 27,232(1) - ld 28,240(1) - ld 29,248(1) - ld 30,256(1) - ld 31,264(1) - mtlr 0 - addi 1,1,272 - blr -.long 0 -.byte 0,12,4,1,0x80,18,1,0 -.long 0 -.size KeccakF1600,.-KeccakF1600 - -.type dword_le_load,@function -.align 5 -dword_le_load: -.localentry dword_le_load,0 - - lbzu 0,1(3) - lbzu 4,1(3) - lbzu 5,1(3) - insrdi 0,4,8,48 - lbzu 4,1(3) - insrdi 0,5,8,40 - lbzu 5,1(3) - insrdi 0,4,8,32 - lbzu 4,1(3) - insrdi 0,5,8,24 - lbzu 5,1(3) - insrdi 0,4,8,16 - lbzu 4,1(3) - insrdi 0,5,8,8 - insrdi 0,4,8,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,1,0 -.long 0 -.size dword_le_load,.-dword_le_load - -.globl SHA3_absorb -.type SHA3_absorb,@function -.type SHA3_absorb,@function -.align 5 -SHA3_absorb: -.localentry SHA3_absorb,0 - - stdu 1,-272(1) - mflr 0 - std 14,128(1) - std 15,136(1) - std 16,144(1) - std 17,152(1) - std 18,160(1) - std 19,168(1) - std 20,176(1) - std 21,184(1) - std 22,192(1) - std 23,200(1) - std 24,208(1) - std 25,216(1) - std 26,224(1) - std 27,232(1) - std 28,240(1) - std 29,248(1) - std 30,256(1) - std 31,264(1) - std 0,288(1) - - bl PICmeup - subi 4,4,1 - subi 12,12,8 - - std 3,48(1) - std 4,56(1) - std 5,64(1) - std 6,72(1) - mr 0,6 - std 12,80(1) - - ld 7,0(3) - ld 8,8(3) - ld 9,16(3) - ld 10,24(3) - ld 11,32(3) - ld 12,40(3) - ld 6,48(3) - ld 14,56(3) - ld 15,64(3) - ld 16,72(3) - ld 17,80(3) - ld 18,88(3) - ld 19,96(3) - ld 20,104(3) - ld 21,112(3) - ld 22,120(3) - ld 23,128(3) - ld 24,136(3) - ld 25,144(3) - ld 26,152(3) - ld 27,160(3) - ld 28,168(3) - ld 29,176(3) - ld 30,184(3) - ld 31,192(3) - - mr 3,4 - mr 4,5 - mr 5,0 - - b .Loop_absorb - -.align 4 -.Loop_absorb: - cmpld 4,5 - blt .Labsorbed - - sub 4,4,5 - srwi 5,5,3 - std 4,64(1) - mtctr 5 - bl dword_le_load - xor 7,7,0 - bdz .Lprocess_block - bl dword_le_load - xor 8,8,0 - bdz .Lprocess_block - bl dword_le_load - xor 9,9,0 - bdz .Lprocess_block - bl dword_le_load - xor 10,10,0 - bdz .Lprocess_block - bl dword_le_load - xor 11,11,0 - bdz .Lprocess_block - bl dword_le_load - xor 12,12,0 - bdz .Lprocess_block - bl dword_le_load - xor 6,6,0 - bdz .Lprocess_block - bl dword_le_load - xor 14,14,0 - bdz .Lprocess_block - bl dword_le_load - xor 15,15,0 - bdz .Lprocess_block - bl dword_le_load - xor 16,16,0 - bdz .Lprocess_block - bl dword_le_load - xor 17,17,0 - bdz .Lprocess_block - bl dword_le_load - xor 18,18,0 - bdz .Lprocess_block - bl dword_le_load - xor 19,19,0 - bdz .Lprocess_block - bl dword_le_load - xor 20,20,0 - bdz .Lprocess_block - bl dword_le_load - xor 21,21,0 - bdz .Lprocess_block - bl dword_le_load - xor 22,22,0 - bdz .Lprocess_block - bl dword_le_load - xor 23,23,0 - bdz .Lprocess_block - bl dword_le_load - xor 24,24,0 - bdz .Lprocess_block - bl dword_le_load - xor 25,25,0 - bdz .Lprocess_block - bl dword_le_load - xor 26,26,0 - bdz .Lprocess_block - bl dword_le_load - xor 27,27,0 - bdz .Lprocess_block - bl dword_le_load - xor 28,28,0 - bdz .Lprocess_block - bl dword_le_load - xor 29,29,0 - bdz .Lprocess_block - bl dword_le_load - xor 30,30,0 - bdz .Lprocess_block - bl dword_le_load - xor 31,31,0 - -.Lprocess_block: - std 3,56(1) - - bl KeccakF1600_int - - ld 0,80(1) - ld 5,72(1) - ld 4,64(1) - ld 3,56(1) - addic 0,0,-192 - std 0,80(1) - - b .Loop_absorb - -.align 4 -.Labsorbed: - ld 3,48(1) - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - std 11,32(3) - std 12,40(3) - std 6,48(3) - std 14,56(3) - std 15,64(3) - std 16,72(3) - std 17,80(3) - std 18,88(3) - std 19,96(3) - std 20,104(3) - std 21,112(3) - std 22,120(3) - std 23,128(3) - std 24,136(3) - std 25,144(3) - std 26,152(3) - std 27,160(3) - std 28,168(3) - std 29,176(3) - std 30,184(3) - std 31,192(3) - - mr 3,4 - ld 0,288(1) - ld 14,128(1) - ld 15,136(1) - ld 16,144(1) - ld 17,152(1) - ld 18,160(1) - ld 19,168(1) - ld 20,176(1) - ld 21,184(1) - ld 22,192(1) - ld 23,200(1) - ld 24,208(1) - ld 25,216(1) - ld 26,224(1) - ld 27,232(1) - ld 28,240(1) - ld 29,248(1) - ld 30,256(1) - ld 31,264(1) - mtlr 0 - addi 1,1,272 - blr -.long 0 -.byte 0,12,4,1,0x80,18,4,0 -.long 0 -.size SHA3_absorb,.-SHA3_absorb -.globl SHA3_squeeze -.type SHA3_squeeze,@function -.type SHA3_squeeze,@function -.align 5 -SHA3_squeeze: -.localentry SHA3_squeeze,0 - - stdu 1,-80(1) - mflr 0 - std 28,48(1) - std 29,56(1) - std 30,64(1) - std 31,72(1) - std 0,96(1) - - mr 28,3 - subi 3,3,8 - subi 29,4,1 - mr 30,5 - mr 31,6 - b .Loop_squeeze - -.align 4 -.Loop_squeeze: - ldu 0,8(3) - cmpldi 30,8 - blt .Lsqueeze_tail - - stbu 0,1(29) - srdi 0,0,8 - stbu 0,1(29) - srdi 0,0,8 - stbu 0,1(29) - srdi 0,0,8 - stbu 0,1(29) - srdi 0,0,8 - stbu 0,1(29) - srdi 0,0,8 - stbu 0,1(29) - srdi 0,0,8 - stbu 0,1(29) - srdi 0,0,8 - stbu 0,1(29) - - subic. 30,30,8 - beq .Lsqueeze_done - - subic. 6,6,8 - bgt .Loop_squeeze - - mr 3,28 - bl KeccakF1600 - subi 3,28,8 - mr 6,31 - b .Loop_squeeze - -.align 4 -.Lsqueeze_tail: - mtctr 30 -.Loop_tail: - stbu 0,1(29) - srdi 0,0,8 - bdnz .Loop_tail - -.Lsqueeze_done: - ld 0,96(1) - ld 28,48(1) - ld 29,56(1) - ld 30,64(1) - ld 31,72(1) - mtlr 0 - addi 1,1,80 - blr -.long 0 -.byte 0,12,4,1,0x80,4,4,0 -.long 0 -.size SHA3_squeeze,.-SHA3_squeeze -.align 6 -PICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 12 - addi 12,12,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.type iotas,@object -iotas: -.long 0x00000000,0x00000001 -.long 0x00000000,0x00008082 -.long 0x80000000,0x0000808a -.long 0x80000000,0x80008000 -.long 0x00000000,0x0000808b -.long 0x00000000,0x80000001 -.long 0x80000000,0x80008081 -.long 0x80000000,0x00008009 -.long 0x00000000,0x0000008a -.long 0x00000000,0x00000088 -.long 0x00000000,0x80008009 -.long 0x00000000,0x8000000a -.long 0x00000000,0x8000808b -.long 0x80000000,0x0000008b -.long 0x80000000,0x00008089 -.long 0x80000000,0x00008003 -.long 0x80000000,0x00008002 -.long 0x80000000,0x00000080 -.long 0x00000000,0x0000800a -.long 0x80000000,0x8000000a -.long 0x80000000,0x80008081 -.long 0x80000000,0x00008080 -.long 0x00000000,0x80000001 -.long 0x80000000,0x80008008 -.size iotas,.-iotas -.byte 75,101,99,99,97,107,45,49,54,48,48,32,97,98,115,111,114,98,32,97,110,100,32,115,113,117,101,101,122,101,32,102,111,114,32,80,80,67,54,52,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 diff --git a/sys/crypto/openssl/powerpc64/poly1305-ppc.S b/sys/crypto/openssl/powerpc64/poly1305-ppc.S deleted file mode 100644 index d8b10660229..00000000000 --- a/sys/crypto/openssl/powerpc64/poly1305-ppc.S +++ /dev/null @@ -1,185 +0,0 @@ -/* Do not modify. This file is auto-generated from poly1305-ppc.pl. */ -.machine "any" -.abiversion 2 -.text -.globl poly1305_init_int -.type poly1305_init_int,@function -.align 4 -poly1305_init_int: -.localentry poly1305_init_int,0 - - xor 0,0,0 - std 0,0(3) - std 0,8(3) - std 0,16(3) - - cmpld 4,0 - beq- .Lno_key - li 7,4 - lwbrx 10,0,4 - li 11,8 - lwbrx 7,7,4 - li 8,12 - lwbrx 11,11,4 - lwbrx 8,8,4 - insrdi 10,7,32,0 - insrdi 11,8,32,0 - lis 8,0xfff - ori 8,8,0xfffc - insrdi 8,8,32,0 - ori 7,8,3 - - and 10,10,7 - and 11,11,8 - - std 10,32(3) - std 11,40(3) - -.Lno_key: - xor 3,3,3 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.size poly1305_init_int,.-poly1305_init_int - -.globl poly1305_blocks -.type poly1305_blocks,@function -.align 4 -poly1305_blocks: -.localentry poly1305_blocks,0 - - srdi. 5,5,4 - beq- .Labort - - stdu 1,-192(1) - mflr 0 - std 27,152(1) - std 28,160(1) - std 29,168(1) - std 30,176(1) - std 31,184(1) - std 0,208(1) - - ld 27,32(3) - ld 28,40(3) - - ld 7,0(3) - ld 8,8(3) - ld 9,16(3) - - srdi 29,28,2 - mtctr 5 - add 29,29,28 - li 0,3 - b .Loop - -.align 4 -.Loop: - li 10,4 - lwbrx 30,0,4 - li 31,8 - lwbrx 10,10,4 - li 11,12 - lwbrx 31,31,4 - lwbrx 11,11,4 - insrdi 30,10,32,0 - insrdi 31,11,32,0 - addi 4,4,16 - - addc 7,7,30 - adde 8,8,31 - - mulld 10,7,27 - mulhdu 11,7,27 - adde 9,9,6 - - mulld 30,8,29 - mulhdu 31,8,29 - addc 10,10,30 - adde 11,11,31 - - mulld 30,7,28 - mulhdu 12,7,28 - addc 11,11,30 - addze 12,12 - - mulld 30,8,27 - mulhdu 31,8,27 - addc 11,11,30 - adde 12,12,31 - - mulld 30,9,29 - mulld 31,9,27 - addc 11,11,30 - adde 12,12,31 - - andc 30,12,0 - and 9,12,0 - srdi 31,30,2 - add 30,30,31 - addc 7,10,30 - addze 8,11 - addze 9,9 - - bdnz .Loop - - std 7,0(3) - std 8,8(3) - std 9,16(3) - - ld 27,152(1) - ld 28,160(1) - ld 29,168(1) - ld 30,176(1) - ld 31,184(1) - addi 1,1,192 -.Labort: - blr -.long 0 -.byte 0,12,4,1,0x80,5,4,0 -.size poly1305_blocks,.-poly1305_blocks - -.globl poly1305_emit -.type poly1305_emit,@function -.align 4 -poly1305_emit: -.localentry poly1305_emit,0 - - ld 7,0(3) - ld 8,8(3) - ld 9,16(3) - ld 6,0(5) - ld 5,8(5) - - addic 10,7,5 - addze 11,8 - addze 12,9 - - srdi 0,12,2 - neg 0,0 - - andc 7,7,0 - and 10,10,0 - andc 8,8,0 - and 11,11,0 - or 7,7,10 - or 8,8,11 - rotldi 6,6,32 - rotldi 5,5,32 - addc 7,7,6 - adde 8,8,5 - rldicl 0,7,32,32 - li 10,4 - stwbrx 7,0,4 - rldicl 7,8,32,32 - li 11,8 - stwbrx 0,10,4 - li 12,12 - stwbrx 8,11,4 - stwbrx 7,12,4 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.size poly1305_emit,.-poly1305_emit -.byte 80,111,108,121,49,51,48,53,32,102,111,114,32,80,80,67,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 diff --git a/sys/crypto/openssl/powerpc64/poly1305-ppcfp.S b/sys/crypto/openssl/powerpc64/poly1305-ppcfp.S deleted file mode 100644 index 0cc88e83b6b..00000000000 --- a/sys/crypto/openssl/powerpc64/poly1305-ppcfp.S +++ /dev/null @@ -1,596 +0,0 @@ -/* Do not modify. This file is auto-generated from poly1305-ppcfp.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl poly1305_init_fpu -.type poly1305_init_fpu,@function -.align 6 -poly1305_init_fpu: -.localentry poly1305_init_fpu,0 - - stdu 1,-48(1) - mflr 6 - std 6,64(1) - - bl .LPICmeup - - xor 0,0,0 - mtlr 6 - - lfd 8,8*0(5) - lfd 9,8*1(5) - lfd 10,8*2(5) - lfd 11,8*3(5) - lfd 12,8*4(5) - lfd 13,8*5(5) - - stfd 8,8*0(3) - stfd 9,8*1(3) - stfd 10,8*2(3) - stfd 11,8*3(3) - - cmpld 4,0 - beq- .Lno_key - - lfd 6,8*13(5) - mffs 7 - - stfd 8,8*4(3) - stfd 9,8*5(3) - stfd 10,8*6(3) - stfd 11,8*7(3) - - li 8,4 - li 9,8 - li 10,12 - lwbrx 7,0,4 - lwbrx 8,8,4 - lwbrx 9,9,4 - lwbrx 10,10,4 - - lis 11,0xf000 - ori 12,11,3 - andc 7,7,11 - andc 8,8,12 - andc 9,9,12 - andc 10,10,12 - - stw 7,36(3) - stw 8,44(3) - stw 9,52(3) - stw 10,60(3) - - mtfsf 255,6 - stfd 8,8*18(3) - stfd 9,8*19(3) - stfd 10,8*20(3) - stfd 11,8*21(3) - stfd 12,8*22(3) - stfd 13,8*23(3) - - lfd 0,8*4(3) - lfd 2,8*5(3) - lfd 4,8*6(3) - lfd 6,8*7(3) - - fsub 0,0,8 - fsub 2,2,9 - fsub 4,4,10 - fsub 6,6,11 - - lfd 8,8*6(5) - lfd 9,8*7(5) - lfd 10,8*8(5) - lfd 11,8*9(5) - - fmul 3,2,13 - fmul 5,4,13 - stfd 7,8*15(3) - fmul 7,6,13 - - fadd 1,0,8 - stfd 3,8*12(3) - fadd 3,2,9 - stfd 5,8*13(3) - fadd 5,4,10 - stfd 7,8*14(3) - fadd 7,6,11 - - fsub 1,1,8 - fsub 3,3,9 - fsub 5,5,10 - fsub 7,7,11 - - lfd 8,8*10(5) - lfd 9,8*11(5) - lfd 10,8*12(5) - - fsub 0,0,1 - fsub 2,2,3 - fsub 4,4,5 - fsub 6,6,7 - - stfd 1,8*5(3) - stfd 3,8*7(3) - stfd 5,8*9(3) - stfd 7,8*11(3) - - stfd 0,8*4(3) - stfd 2,8*6(3) - stfd 4,8*8(3) - stfd 6,8*10(3) - - lfd 2,8*12(3) - lfd 4,8*13(3) - lfd 6,8*14(3) - lfd 0,8*15(3) - - fadd 3,2,8 - fadd 5,4,9 - fadd 7,6,10 - - fsub 3,3,8 - fsub 5,5,9 - fsub 7,7,10 - - fsub 2,2,3 - fsub 4,4,5 - fsub 6,6,7 - - stfd 3,8*13(3) - stfd 5,8*15(3) - stfd 7,8*17(3) - - stfd 2,8*12(3) - stfd 4,8*14(3) - stfd 6,8*16(3) - - mtfsf 255,0 -.Lno_key: - xor 3,3,3 - addi 1,1,48 - blr -.long 0 -.byte 0,12,4,1,0x80,0,2,0 -.size poly1305_init_fpu,.-poly1305_init_fpu - -.globl poly1305_blocks_fpu -.type poly1305_blocks_fpu,@function -.align 4 -poly1305_blocks_fpu: -.localentry poly1305_blocks_fpu,0 - - srwi. 5,5,4 - beq- .Labort - - stdu 1,-240(1) - mflr 0 - stfd 14,96(1) - stfd 15,104(1) - stfd 16,112(1) - stfd 17,120(1) - stfd 18,128(1) - stfd 19,136(1) - stfd 20,144(1) - stfd 21,152(1) - stfd 22,160(1) - stfd 23,168(1) - stfd 24,176(1) - stfd 25,184(1) - stfd 26,192(1) - stfd 27,200(1) - stfd 28,208(1) - stfd 29,216(1) - stfd 30,224(1) - stfd 31,232(1) - std 0,256(1) - - xor 0,0,0 - li 10,1 - mtctr 5 - neg 5,5 - stw 0,80(1) - stw 10,84(1) - - lfd 8,8*18(3) - lfd 9,8*19(3) - lfd 10,8*20(3) - lfd 11,8*21(3) - lfd 12,8*22(3) - lfd 13,8*23(3) - - lfd 0,8*0(3) - lfd 2,8*1(3) - lfd 4,8*2(3) - lfd 6,8*3(3) - - stfd 8,48(1) - oris 10,6,18736 - stfd 9,56(1) - stfd 10,64(1) - stw 10,72(1) - - li 11,4 - li 12,8 - li 6,12 - lwbrx 7,0,4 - lwbrx 8,11,4 - lwbrx 9,12,4 - lwbrx 10,6,4 - addi 4,4,16 - - stw 7,52(1) - stw 8,60(1) - stw 9,68(1) - stw 10,76(1) - - mffs 28 - lfd 29,80(1) - lfd 14,8*4(3) - lfd 15,8*5(3) - lfd 16,8*6(3) - lfd 17,8*7(3) - lfd 18,8*8(3) - lfd 19,8*9(3) - lfd 24,8*10(3) - lfd 25,8*11(3) - lfd 26,8*12(3) - lfd 27,8*13(3) - lfd 20,8*14(3) - lfd 21,8*15(3) - lfd 22,8*16(3) - lfd 23,8*17(3) - - stfd 28,80(1) - mtfsf 255,29 - - addic 5,5,1 - addze 0,0 - slwi. 0,0,4 - sub 4,4,0 - - lfd 28,48(1) - lfd 29,56(1) - lfd 30,64(1) - lfd 31,72(1) - - fsub 0,0,8 - lwbrx 7,0,4 - fsub 2,2,9 - lwbrx 8,11,4 - fsub 4,4,10 - lwbrx 9,12,4 - fsub 6,6,11 - lwbrx 10,6,4 - - fsub 28,28,8 - addi 4,4,16 - fsub 29,29,9 - fsub 30,30,10 - fsub 31,31,11 - - fadd 28,28,0 - stw 7,52(1) - fadd 29,29,2 - stw 8,60(1) - fadd 30,30,4 - stw 9,68(1) - fadd 31,31,6 - stw 10,76(1) - - b .Lentry - -.align 4 -.Loop: - fsub 30,30,8 - addic 5,5,1 - fsub 31,31,9 - addze 0,0 - fsub 26,26,10 - slwi. 0,0,4 - fsub 27,27,11 - sub 4,4,0 - - fadd 0,0,30 - fadd 1,1,31 - fadd 4,4,26 - fadd 5,5,27 - - - fadd 26,2,10 - lwbrx 7,0,4 - fadd 27,3,10 - lwbrx 8,11,4 - fadd 30,6,12 - lwbrx 9,12,4 - fadd 31,7,12 - lwbrx 10,6,4 - fadd 24,0,9 - addi 4,4,16 - fadd 25,1,9 - fadd 28,4,11 - fadd 29,5,11 - - fsub 26,26,10 - stw 7,52(1) - fsub 27,27,10 - stw 8,60(1) - fsub 30,30,12 - stw 9,68(1) - fsub 31,31,12 - stw 10,76(1) - fsub 24,24,9 - fsub 25,25,9 - fsub 28,28,11 - fsub 29,29,11 - - fsub 2,2,26 - fsub 3,3,27 - fsub 6,6,30 - fsub 7,7,31 - fsub 4,4,28 - fsub 5,5,29 - fsub 0,0,24 - fsub 1,1,25 - - fadd 2,2,24 - fadd 3,3,25 - fadd 6,6,28 - fadd 7,7,29 - fadd 4,4,26 - fadd 5,5,27 - fmadd 0,30,13,0 - fmadd 1,31,13,1 - - fadd 29,2,3 - lfd 26,8*12(3) - fadd 31,6,7 - lfd 27,8*13(3) - fadd 30,4,5 - lfd 24,8*10(3) - fadd 28,0,1 - lfd 25,8*11(3) -.Lentry: - fmul 0,22,29 - fmul 1,23,29 - fmul 4,16,29 - fmul 5,17,29 - fmul 2,14,29 - fmul 3,15,29 - fmul 6,18,29 - fmul 7,19,29 - - fmadd 0,26,31,0 - fmadd 1,27,31,1 - fmadd 4,22,31,4 - fmadd 5,23,31,5 - fmadd 2,20,31,2 - fmadd 3,21,31,3 - fmadd 6,14,31,6 - fmadd 7,15,31,7 - - fmadd 0,20,30,0 - fmadd 1,21,30,1 - fmadd 4,14,30,4 - fmadd 5,15,30,5 - fmadd 2,22,30,2 - fmadd 3,23,30,3 - fmadd 6,16,30,6 - fmadd 7,17,30,7 - - fmadd 0,14,28,0 - lfd 30,48(1) - fmadd 1,15,28,1 - lfd 31,56(1) - fmadd 4,18,28,4 - lfd 26,64(1) - fmadd 5,19,28,5 - lfd 27,72(1) - fmadd 2,16,28,2 - fmadd 3,17,28,3 - fmadd 6,24,28,6 - fmadd 7,25,28,7 - - bdnz .Loop - - - fadd 24,0,9 - fadd 25,1,9 - fadd 28,4,11 - fadd 29,5,11 - fadd 26,2,10 - fadd 27,3,10 - fadd 30,6,12 - fadd 31,7,12 - - fsub 24,24,9 - fsub 25,25,9 - fsub 28,28,11 - fsub 29,29,11 - fsub 26,26,10 - fsub 27,27,10 - fsub 30,30,12 - fsub 31,31,12 - - fsub 2,2,26 - fsub 3,3,27 - fsub 6,6,30 - fsub 7,7,31 - fsub 4,4,28 - fsub 5,5,29 - fsub 0,0,24 - fsub 1,1,25 - - fadd 2,2,24 - fadd 3,3,25 - fadd 6,6,28 - fadd 7,7,29 - fadd 4,4,26 - fadd 5,5,27 - fmadd 0,30,13,0 - fmadd 1,31,13,1 - - fadd 29,2,3 - fadd 31,6,7 - fadd 30,4,5 - fadd 28,0,1 - - lfd 0,80(1) - fadd 29,29,9 - fadd 31,31,11 - fadd 30,30,10 - fadd 28,28,8 - - stfd 29,8*1(3) - stfd 31,8*3(3) - stfd 30,8*2(3) - stfd 28,8*0(3) - - mtfsf 255,0 - lfd 14,96(1) - lfd 15,104(1) - lfd 16,112(1) - lfd 17,120(1) - lfd 18,128(1) - lfd 19,136(1) - lfd 20,144(1) - lfd 21,152(1) - lfd 22,160(1) - lfd 23,168(1) - lfd 24,176(1) - lfd 25,184(1) - lfd 26,192(1) - lfd 27,200(1) - lfd 28,208(1) - lfd 29,216(1) - lfd 30,224(1) - lfd 31,232(1) - addi 1,1,240 -.Labort: - blr -.long 0 -.byte 0,12,4,1,0x80,0,4,0 -.size poly1305_blocks_fpu,.-poly1305_blocks_fpu -.globl poly1305_emit_fpu -.type poly1305_emit_fpu,@function -.align 4 -poly1305_emit_fpu: -.localentry poly1305_emit_fpu,0 - - stdu 1,-80(1) - mflr 0 - std 28,48(1) - std 29,56(1) - std 30,64(1) - std 31,72(1) - std 0,96(1) - - lwz 28,0(3) - lwz 7,4(3) - lwz 29,8(3) - lwz 8,12(3) - lwz 30,16(3) - lwz 9,20(3) - lwz 31,24(3) - lwz 10,28(3) - - lis 0,0xfff0 - andc 28,28,0 - andc 29,29,0 - andc 30,30,0 - andc 31,31,0 - li 0,3 - - srwi 6,31,2 - and 11,31,0 - andc 31,31,0 - add 31,31,6 - add 7,7,31 - add 8,8,28 - add 9,9,29 - add 10,10,30 - - srdi 28,7,32 - add 8,8,28 - srdi 29,8,32 - add 9,9,29 - srdi 30,9,32 - add 10,10,30 - srdi 31,10,32 - add 11,11,31 - - insrdi 7,8,32,0 - insrdi 9,10,32,0 - - addic 28,7,5 - addze 29,9 - addze 30,11 - - srdi 0,30,2 - neg 0,0 - sradi 0,0,63 - ld 30,0(5) - ld 31,8(5) - - andc 7,7,0 - and 28,28,0 - andc 9,9,0 - and 29,29,0 - or 7,7,28 - or 9,9,29 - rotldi 30,30,32 - rotldi 31,31,32 - addc 7,7,30 - adde 9,9,31 - - srdi 8,7,32 - srdi 10,9,32 - li 29,4 - stwbrx 7,0,4 - li 30,8 - stwbrx 8,29,4 - li 31,12 - stwbrx 9,30,4 - stwbrx 10,31,4 - ld 28,48(1) - ld 29,56(1) - ld 30,64(1) - ld 31,72(1) - addi 1,1,80 - blr -.long 0 -.byte 0,12,4,1,0x80,4,3,0 -.size poly1305_emit_fpu,.-poly1305_emit_fpu -.align 6 -.LPICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 5 - addi 5,5,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 - -.long 0x43300000,0x00000000 -.long 0x45300000,0x00000000 -.long 0x47300000,0x00000000 -.long 0x49300000,0x00000000 -.long 0x4b500000,0x00000000 - -.long 0x37f40000,0x00000000 - -.long 0x44300000,0x00000000 -.long 0x46300000,0x00000000 -.long 0x48300000,0x00000000 -.long 0x4a300000,0x00000000 -.long 0x3e300000,0x00000000 -.long 0x40300000,0x00000000 -.long 0x42300000,0x00000000 - -.long 0x00000000,0x00000001 -.byte 80,111,108,121,49,51,48,53,32,102,111,114,32,80,80,67,32,70,80,85,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 4 diff --git a/sys/crypto/openssl/powerpc64/ppc-mont.S b/sys/crypto/openssl/powerpc64/ppc-mont.S deleted file mode 100644 index 2bf6aa9b222..00000000000 --- a/sys/crypto/openssl/powerpc64/ppc-mont.S +++ /dev/null @@ -1,1790 +0,0 @@ -/* Do not modify. This file is auto-generated from ppc-mont.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl bn_mul_mont_int -.type bn_mul_mont_int,@function -.align 5 -bn_mul_mont_int: -.localentry bn_mul_mont_int,0 - - mr 9,3 - li 3,0 - slwi 8,8,3 - li 12,-4096 - addi 3,8,352 - subf 3,3,1 - and 3,3,12 - subf 3,1,3 - mr 12,1 - srwi 8,8,3 - stdux 1,1,3 - - std 20,-96(12) - std 21,-88(12) - std 22,-80(12) - std 23,-72(12) - std 24,-64(12) - std 25,-56(12) - std 26,-48(12) - std 27,-40(12) - std 28,-32(12) - std 29,-24(12) - std 30,-16(12) - std 31,-8(12) - - ld 7,0(7) - addi 8,8,-2 - - ld 23,0(5) - ld 10,0(4) - addi 22,1,64 - mulld 25,10,23 - mulhdu 26,10,23 - - ld 10,8(4) - ld 11,0(6) - - mulld 24,25,7 - - mulld 29,10,23 - mulhdu 30,10,23 - - mulld 27,11,24 - mulhdu 28,11,24 - ld 11,8(6) - addc 27,27,25 - addze 28,28 - - mulld 31,11,24 - mulhdu 0,11,24 - - mtctr 8 - li 21,16 -.align 4 -.L1st: - ldx 10,4,21 - addc 25,29,26 - ldx 11,6,21 - addze 26,30 - mulld 29,10,23 - addc 27,31,28 - mulhdu 30,10,23 - addze 28,0 - mulld 31,11,24 - addc 27,27,25 - mulhdu 0,11,24 - addze 28,28 - std 27,0(22) - - addi 21,21,8 - addi 22,22,8 - bdnz .L1st - - addc 25,29,26 - addze 26,30 - - addc 27,31,28 - addze 28,0 - addc 27,27,25 - addze 28,28 - std 27,0(22) - - li 3,0 - addc 28,28,26 - addze 3,3 - std 28,8(22) - - li 20,8 -.align 4 -.Louter: - ldx 23,5,20 - ld 10,0(4) - addi 22,1,64 - ld 12,64(1) - mulld 25,10,23 - mulhdu 26,10,23 - ld 10,8(4) - ld 11,0(6) - addc 25,25,12 - mulld 29,10,23 - addze 26,26 - mulld 24,25,7 - mulhdu 30,10,23 - mulld 27,11,24 - mulhdu 28,11,24 - ld 11,8(6) - addc 27,27,25 - mulld 31,11,24 - addze 28,28 - mulhdu 0,11,24 - - mtctr 8 - li 21,16 -.align 4 -.Linner: - ldx 10,4,21 - addc 25,29,26 - ld 12,8(22) - addze 26,30 - ldx 11,6,21 - addc 27,31,28 - mulld 29,10,23 - addze 28,0 - mulhdu 30,10,23 - addc 25,25,12 - mulld 31,11,24 - addze 26,26 - mulhdu 0,11,24 - addc 27,27,25 - addi 21,21,8 - addze 28,28 - std 27,0(22) - addi 22,22,8 - bdnz .Linner - - ld 12,8(22) - addc 25,29,26 - addze 26,30 - addc 25,25,12 - addze 26,26 - - addc 27,31,28 - addze 28,0 - addc 27,27,25 - addze 28,28 - std 27,0(22) - - addic 3,3,-1 - li 3,0 - adde 28,28,26 - addze 3,3 - std 28,8(22) - - slwi 12,8,3 - cmpld 20,12 - addi 20,20,8 - ble .Louter - - addi 8,8,2 - subfc 21,21,21 - addi 22,1,64 - mtctr 8 - -.align 4 -.Lsub: ldx 12,22,21 - ldx 11,6,21 - subfe 10,11,12 - stdx 10,9,21 - addi 21,21,8 - bdnz .Lsub - - li 21,0 - mtctr 8 - subfe 3,21,3 - -.align 4 -.Lcopy: - ldx 12,22,21 - ldx 10,9,21 - and 12,12,3 - andc 10,10,3 - stdx 21,22,21 - or 10,10,12 - stdx 10,9,21 - addi 21,21,8 - bdnz .Lcopy - - ld 12,0(1) - li 3,1 - ld 20,-96(12) - ld 21,-88(12) - ld 22,-80(12) - ld 23,-72(12) - ld 24,-64(12) - ld 25,-56(12) - ld 26,-48(12) - ld 27,-40(12) - ld 28,-32(12) - ld 29,-24(12) - ld 30,-16(12) - ld 31,-8(12) - mr 1,12 - blr -.long 0 -.byte 0,12,4,0,0x80,12,6,0 -.long 0 -.size bn_mul_mont_int,.-bn_mul_mont_int -.globl bn_mul4x_mont_int -.type bn_mul4x_mont_int,@function -.align 5 -bn_mul4x_mont_int: -.localentry bn_mul4x_mont_int,0 - - andi. 0,8,7 - bne .Lmul4x_do - cmpld 4,5 - bne .Lmul4x_do - b .Lsqr8x_do -.Lmul4x_do: - slwi 8,8,3 - mr 9,1 - li 10,-32*8 - sub 10,10,8 - stdux 1,1,10 - - std 14,-8*18(9) - std 15,-8*17(9) - std 16,-8*16(9) - std 17,-8*15(9) - std 18,-8*14(9) - std 19,-8*13(9) - std 20,-8*12(9) - std 21,-8*11(9) - std 22,-8*10(9) - std 23,-8*9(9) - std 24,-8*8(9) - std 25,-8*7(9) - std 26,-8*6(9) - std 27,-8*5(9) - std 28,-8*4(9) - std 29,-8*3(9) - std 30,-8*2(9) - std 31,-8*1(9) - - subi 4,4,8 - subi 6,6,8 - subi 3,3,8 - ld 7,0(7) - - add 14,5,8 - add 30,4,8 - subi 14,14,8*4 - - ld 27,8*0(5) - li 22,0 - ld 9,8*1(4) - li 23,0 - ld 10,8*2(4) - li 24,0 - ld 11,8*3(4) - li 25,0 - ldu 12,8*4(4) - ld 18,8*1(6) - ld 19,8*2(6) - ld 20,8*3(6) - ldu 21,8*4(6) - - std 3,8*6(1) - std 14,8*7(1) - li 3,0 - addic 29,1,8*7 - li 31,0 - li 0,0 - b .Loop_mul4x_1st_reduction - -.align 5 -.Loop_mul4x_1st_reduction: - mulld 14,9,27 - addze 3,3 - mulld 15,10,27 - addi 31,31,8 - mulld 16,11,27 - andi. 31,31,8*4-1 - mulld 17,12,27 - addc 22,22,14 - mulhdu 14,9,27 - adde 23,23,15 - mulhdu 15,10,27 - adde 24,24,16 - mulld 28,22,7 - adde 25,25,17 - mulhdu 16,11,27 - addze 26,0 - mulhdu 17,12,27 - ldx 27,5,31 - addc 23,23,14 - - stdu 28,8(29) - adde 24,24,15 - mulld 15,19,28 - adde 25,25,16 - mulld 16,20,28 - adde 26,26,17 - mulld 17,21,28 - - - - - - - - - - - addic 22,22,-1 - mulhdu 14,18,28 - adde 22,23,15 - mulhdu 15,19,28 - adde 23,24,16 - mulhdu 16,20,28 - adde 24,25,17 - mulhdu 17,21,28 - adde 25,26,3 - addze 3,0 - addc 22,22,14 - adde 23,23,15 - adde 24,24,16 - adde 25,25,17 - - bne .Loop_mul4x_1st_reduction - - cmpld 30,4 - beq .Lmul4x4_post_condition - - ld 9,8*1(4) - ld 10,8*2(4) - ld 11,8*3(4) - ldu 12,8*4(4) - ld 28,8*8(1) - ld 18,8*1(6) - ld 19,8*2(6) - ld 20,8*3(6) - ldu 21,8*4(6) - b .Loop_mul4x_1st_tail - -.align 5 -.Loop_mul4x_1st_tail: - mulld 14,9,27 - addze 3,3 - mulld 15,10,27 - addi 31,31,8 - mulld 16,11,27 - andi. 31,31,8*4-1 - mulld 17,12,27 - addc 22,22,14 - mulhdu 14,9,27 - adde 23,23,15 - mulhdu 15,10,27 - adde 24,24,16 - mulhdu 16,11,27 - adde 25,25,17 - mulhdu 17,12,27 - addze 26,0 - ldx 27,5,31 - addc 23,23,14 - mulld 14,18,28 - adde 24,24,15 - mulld 15,19,28 - adde 25,25,16 - mulld 16,20,28 - adde 26,26,17 - mulld 17,21,28 - addc 22,22,14 - mulhdu 14,18,28 - adde 23,23,15 - mulhdu 15,19,28 - adde 24,24,16 - mulhdu 16,20,28 - adde 25,25,17 - adde 26,26,3 - mulhdu 17,21,28 - addze 3,0 - addi 28,1,8*8 - ldx 28,28,31 - stdu 22,8(29) - addc 22,23,14 - adde 23,24,15 - adde 24,25,16 - adde 25,26,17 - - bne .Loop_mul4x_1st_tail - - sub 15,30,8 - cmpld 30,4 - beq .Lmul4x_proceed - - ld 9,8*1(4) - ld 10,8*2(4) - ld 11,8*3(4) - ldu 12,8*4(4) - ld 18,8*1(6) - ld 19,8*2(6) - ld 20,8*3(6) - ldu 21,8*4(6) - b .Loop_mul4x_1st_tail - -.align 5 -.Lmul4x_proceed: - ldu 27,8*4(5) - addze 3,3 - ld 9,8*1(15) - ld 10,8*2(15) - ld 11,8*3(15) - ld 12,8*4(15) - addi 4,15,8*4 - sub 6,6,8 - - std 22,8*1(29) - std 23,8*2(29) - std 24,8*3(29) - std 25,8*4(29) - std 3,8*5(29) - ld 22,8*12(1) - ld 23,8*13(1) - ld 24,8*14(1) - ld 25,8*15(1) - - ld 18,8*1(6) - ld 19,8*2(6) - ld 20,8*3(6) - ldu 21,8*4(6) - addic 29,1,8*7 - li 3,0 - b .Loop_mul4x_reduction - -.align 5 -.Loop_mul4x_reduction: - mulld 14,9,27 - addze 3,3 - mulld 15,10,27 - addi 31,31,8 - mulld 16,11,27 - andi. 31,31,8*4-1 - mulld 17,12,27 - addc 22,22,14 - mulhdu 14,9,27 - adde 23,23,15 - mulhdu 15,10,27 - adde 24,24,16 - mulld 28,22,7 - adde 25,25,17 - mulhdu 16,11,27 - addze 26,0 - mulhdu 17,12,27 - ldx 27,5,31 - addc 23,23,14 - - stdu 28,8(29) - adde 24,24,15 - mulld 15,19,28 - adde 25,25,16 - mulld 16,20,28 - adde 26,26,17 - mulld 17,21,28 - - addic 22,22,-1 - mulhdu 14,18,28 - adde 22,23,15 - mulhdu 15,19,28 - adde 23,24,16 - mulhdu 16,20,28 - adde 24,25,17 - mulhdu 17,21,28 - adde 25,26,3 - addze 3,0 - addc 22,22,14 - adde 23,23,15 - adde 24,24,16 - adde 25,25,17 - - bne .Loop_mul4x_reduction - - ld 14,8*5(29) - addze 3,3 - ld 15,8*6(29) - ld 16,8*7(29) - ld 17,8*8(29) - ld 9,8*1(4) - ld 10,8*2(4) - ld 11,8*3(4) - ldu 12,8*4(4) - addc 22,22,14 - adde 23,23,15 - adde 24,24,16 - adde 25,25,17 - - - ld 28,8*8(1) - ld 18,8*1(6) - ld 19,8*2(6) - ld 20,8*3(6) - ldu 21,8*4(6) - b .Loop_mul4x_tail - -.align 5 -.Loop_mul4x_tail: - mulld 14,9,27 - addze 3,3 - mulld 15,10,27 - addi 31,31,8 - mulld 16,11,27 - andi. 31,31,8*4-1 - mulld 17,12,27 - addc 22,22,14 - mulhdu 14,9,27 - adde 23,23,15 - mulhdu 15,10,27 - adde 24,24,16 - mulhdu 16,11,27 - adde 25,25,17 - mulhdu 17,12,27 - addze 26,0 - ldx 27,5,31 - addc 23,23,14 - mulld 14,18,28 - adde 24,24,15 - mulld 15,19,28 - adde 25,25,16 - mulld 16,20,28 - adde 26,26,17 - mulld 17,21,28 - addc 22,22,14 - mulhdu 14,18,28 - adde 23,23,15 - mulhdu 15,19,28 - adde 24,24,16 - mulhdu 16,20,28 - adde 25,25,17 - mulhdu 17,21,28 - adde 26,26,3 - addi 28,1,8*8 - ldx 28,28,31 - addze 3,0 - stdu 22,8(29) - addc 22,23,14 - adde 23,24,15 - adde 24,25,16 - adde 25,26,17 - - bne .Loop_mul4x_tail - - ld 14,8*5(29) - sub 15,6,8 - addze 3,3 - cmpld 30,4 - beq .Loop_mul4x_break - - ld 15,8*6(29) - ld 16,8*7(29) - ld 17,8*8(29) - ld 9,8*1(4) - ld 10,8*2(4) - ld 11,8*3(4) - ldu 12,8*4(4) - addc 22,22,14 - adde 23,23,15 - adde 24,24,16 - adde 25,25,17 - - - ld 18,8*1(6) - ld 19,8*2(6) - ld 20,8*3(6) - ldu 21,8*4(6) - b .Loop_mul4x_tail - -.align 5 -.Loop_mul4x_break: - ld 16,8*6(1) - ld 17,8*7(1) - addc 9,22,14 - ld 22,8*12(1) - addze 10,23 - ld 23,8*13(1) - addze 11,24 - ld 24,8*14(1) - addze 12,25 - ld 25,8*15(1) - addze 3,3 - std 9,8*1(29) - sub 4,30,8 - std 10,8*2(29) - std 11,8*3(29) - std 12,8*4(29) - std 3,8*5(29) - - ld 18,8*1(15) - ld 19,8*2(15) - ld 20,8*3(15) - ld 21,8*4(15) - addi 6,15,8*4 - cmpld 5,17 - beq .Lmul4x_post - - ldu 27,8*4(5) - ld 9,8*1(4) - ld 10,8*2(4) - ld 11,8*3(4) - ldu 12,8*4(4) - li 3,0 - addic 29,1,8*7 - b .Loop_mul4x_reduction - -.align 5 -.Lmul4x_post: - - - - - srwi 31,8,5 - mr 5,16 - subi 31,31,1 - mr 30,16 - subfc 14,18,22 - addi 29,1,8*15 - subfe 15,19,23 - - mtctr 31 -.Lmul4x_sub: - ld 18,8*1(6) - ld 22,8*1(29) - subfe 16,20,24 - ld 19,8*2(6) - ld 23,8*2(29) - subfe 17,21,25 - ld 20,8*3(6) - ld 24,8*3(29) - ldu 21,8*4(6) - ldu 25,8*4(29) - std 14,8*1(5) - std 15,8*2(5) - subfe 14,18,22 - std 16,8*3(5) - stdu 17,8*4(5) - subfe 15,19,23 - bdnz .Lmul4x_sub - - ld 9,8*1(30) - std 14,8*1(5) - ld 14,8*12(1) - subfe 16,20,24 - ld 10,8*2(30) - std 15,8*2(5) - ld 15,8*13(1) - subfe 17,21,25 - subfe 3,0,3 - addi 29,1,8*12 - ld 11,8*3(30) - std 16,8*3(5) - ld 16,8*14(1) - ld 12,8*4(30) - std 17,8*4(5) - ld 17,8*15(1) - - mtctr 31 -.Lmul4x_cond_copy: - and 14,14,3 - andc 9,9,3 - std 0,8*0(29) - and 15,15,3 - andc 10,10,3 - std 0,8*1(29) - and 16,16,3 - andc 11,11,3 - std 0,8*2(29) - and 17,17,3 - andc 12,12,3 - std 0,8*3(29) - or 22,14,9 - ld 9,8*5(30) - ld 14,8*4(29) - or 23,15,10 - ld 10,8*6(30) - ld 15,8*5(29) - or 24,16,11 - ld 11,8*7(30) - ld 16,8*6(29) - or 25,17,12 - ld 12,8*8(30) - ld 17,8*7(29) - addi 29,29,8*4 - std 22,8*1(30) - std 23,8*2(30) - std 24,8*3(30) - stdu 25,8*4(30) - bdnz .Lmul4x_cond_copy - - ld 5,0(1) - and 14,14,3 - andc 9,9,3 - std 0,8*0(29) - and 15,15,3 - andc 10,10,3 - std 0,8*1(29) - and 16,16,3 - andc 11,11,3 - std 0,8*2(29) - and 17,17,3 - andc 12,12,3 - std 0,8*3(29) - or 22,14,9 - or 23,15,10 - std 0,8*4(29) - or 24,16,11 - or 25,17,12 - std 22,8*1(30) - std 23,8*2(30) - std 24,8*3(30) - std 25,8*4(30) - - b .Lmul4x_done - -.align 4 -.Lmul4x4_post_condition: - ld 4,8*6(1) - ld 5,0(1) - addze 3,3 - - subfc 9,18,22 - subfe 10,19,23 - subfe 11,20,24 - subfe 12,21,25 - subfe 3,0,3 - - and 18,18,3 - and 19,19,3 - addc 9,9,18 - and 20,20,3 - adde 10,10,19 - and 21,21,3 - adde 11,11,20 - adde 12,12,21 - - std 9,8*1(4) - std 10,8*2(4) - std 11,8*3(4) - std 12,8*4(4) - -.Lmul4x_done: - std 0,8*8(1) - std 0,8*9(1) - std 0,8*10(1) - std 0,8*11(1) - li 3,1 - ld 14,-8*18(5) - ld 15,-8*17(5) - ld 16,-8*16(5) - ld 17,-8*15(5) - ld 18,-8*14(5) - ld 19,-8*13(5) - ld 20,-8*12(5) - ld 21,-8*11(5) - ld 22,-8*10(5) - ld 23,-8*9(5) - ld 24,-8*8(5) - ld 25,-8*7(5) - ld 26,-8*6(5) - ld 27,-8*5(5) - ld 28,-8*4(5) - ld 29,-8*3(5) - ld 30,-8*2(5) - ld 31,-8*1(5) - mr 1,5 - blr -.long 0 -.byte 0,12,4,0x20,0x80,18,6,0 -.long 0 -.size bn_mul4x_mont_int,.-bn_mul4x_mont_int -.align 5 -__bn_sqr8x_mont: -.Lsqr8x_do: - mr 9,1 - slwi 10,8,4 - li 11,-32*8 - sub 10,11,10 - slwi 8,8,3 - stdux 1,1,10 - - std 14,-8*18(9) - std 15,-8*17(9) - std 16,-8*16(9) - std 17,-8*15(9) - std 18,-8*14(9) - std 19,-8*13(9) - std 20,-8*12(9) - std 21,-8*11(9) - std 22,-8*10(9) - std 23,-8*9(9) - std 24,-8*8(9) - std 25,-8*7(9) - std 26,-8*6(9) - std 27,-8*5(9) - std 28,-8*4(9) - std 29,-8*3(9) - std 30,-8*2(9) - std 31,-8*1(9) - - subi 4,4,8 - subi 18,6,8 - subi 3,3,8 - ld 7,0(7) - li 0,0 - - add 6,4,8 - ld 9,8*1(4) - - ld 10,8*2(4) - li 23,0 - ld 11,8*3(4) - li 24,0 - ld 12,8*4(4) - li 25,0 - ld 14,8*5(4) - li 26,0 - ld 15,8*6(4) - li 27,0 - ld 16,8*7(4) - li 28,0 - ldu 17,8*8(4) - li 29,0 - - addi 5,1,8*11 - subic. 30,8,8*8 - b .Lsqr8x_zero_start - -.align 5 -.Lsqr8x_zero: - subic. 30,30,8*8 - std 0,8*1(5) - std 0,8*2(5) - std 0,8*3(5) - std 0,8*4(5) - std 0,8*5(5) - std 0,8*6(5) - std 0,8*7(5) - std 0,8*8(5) -.Lsqr8x_zero_start: - std 0,8*9(5) - std 0,8*10(5) - std 0,8*11(5) - std 0,8*12(5) - std 0,8*13(5) - std 0,8*14(5) - std 0,8*15(5) - stdu 0,8*16(5) - bne .Lsqr8x_zero - - std 3,8*6(1) - std 18,8*7(1) - std 7,8*8(1) - std 5,8*9(1) - std 0,8*10(1) - addi 5,1,8*11 - - -.align 5 -.Lsqr8x_outer_loop: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - mulld 18,10,9 - mulld 19,11,9 - mulld 20,12,9 - mulld 21,14,9 - addc 23,23,18 - mulld 18,15,9 - adde 24,24,19 - mulld 19,16,9 - adde 25,25,20 - mulld 20,17,9 - adde 26,26,21 - mulhdu 21,10,9 - adde 27,27,18 - mulhdu 18,11,9 - adde 28,28,19 - mulhdu 19,12,9 - adde 29,29,20 - mulhdu 20,14,9 - std 22,8*1(5) - addze 22,0 - std 23,8*2(5) - addc 24,24,21 - mulhdu 21,15,9 - adde 25,25,18 - mulhdu 18,16,9 - adde 26,26,19 - mulhdu 19,17,9 - adde 27,27,20 - mulld 20,11,10 - adde 28,28,21 - mulld 21,12,10 - adde 29,29,18 - mulld 18,14,10 - adde 22,22,19 - - mulld 19,15,10 - addc 25,25,20 - mulld 20,16,10 - adde 26,26,21 - mulld 21,17,10 - adde 27,27,18 - mulhdu 18,11,10 - adde 28,28,19 - mulhdu 19,12,10 - adde 29,29,20 - mulhdu 20,14,10 - adde 22,22,21 - mulhdu 21,15,10 - std 24,8*3(5) - addze 23,0 - std 25,8*4(5) - addc 26,26,18 - mulhdu 18,16,10 - adde 27,27,19 - mulhdu 19,17,10 - adde 28,28,20 - mulld 20,12,11 - adde 29,29,21 - mulld 21,14,11 - adde 22,22,18 - mulld 18,15,11 - adde 23,23,19 - - mulld 19,16,11 - addc 27,27,20 - mulld 20,17,11 - adde 28,28,21 - mulhdu 21,12,11 - adde 29,29,18 - mulhdu 18,14,11 - adde 22,22,19 - mulhdu 19,15,11 - adde 23,23,20 - mulhdu 20,16,11 - std 26,8*5(5) - addze 24,0 - std 27,8*6(5) - addc 28,28,21 - mulhdu 21,17,11 - adde 29,29,18 - mulld 18,14,12 - adde 22,22,19 - mulld 19,15,12 - adde 23,23,20 - mulld 20,16,12 - adde 24,24,21 - - mulld 21,17,12 - addc 29,29,18 - mulhdu 18,14,12 - adde 22,22,19 - mulhdu 19,15,12 - adde 23,23,20 - mulhdu 20,16,12 - adde 24,24,21 - mulhdu 21,17,12 - std 28,8*7(5) - addze 25,0 - stdu 29,8*8(5) - addc 22,22,18 - mulld 18,15,14 - adde 23,23,19 - mulld 19,16,14 - adde 24,24,20 - mulld 20,17,14 - adde 25,25,21 - - mulhdu 21,15,14 - addc 23,23,18 - mulhdu 18,16,14 - adde 24,24,19 - mulhdu 19,17,14 - adde 25,25,20 - mulld 20,16,15 - addze 26,0 - addc 24,24,21 - mulld 21,17,15 - adde 25,25,18 - mulhdu 18,16,15 - adde 26,26,19 - - mulhdu 19,17,15 - addc 25,25,20 - mulld 20,17,16 - adde 26,26,21 - mulhdu 21,17,16 - addze 27,0 - addc 26,26,18 - cmpld 6,4 - adde 27,27,19 - - addc 27,27,20 - sub 18,6,8 - addze 28,0 - add 28,28,21 - - beq .Lsqr8x_outer_break - - mr 7,9 - ld 9,8*1(5) - ld 10,8*2(5) - ld 11,8*3(5) - ld 12,8*4(5) - ld 14,8*5(5) - ld 15,8*6(5) - ld 16,8*7(5) - ld 17,8*8(5) - addc 22,22,9 - ld 9,8*1(4) - adde 23,23,10 - ld 10,8*2(4) - adde 24,24,11 - ld 11,8*3(4) - adde 25,25,12 - ld 12,8*4(4) - adde 26,26,14 - ld 14,8*5(4) - adde 27,27,15 - ld 15,8*6(4) - adde 28,28,16 - ld 16,8*7(4) - subi 3,4,8*7 - addze 29,17 - ldu 17,8*8(4) - - li 30,0 - b .Lsqr8x_mul - - - - - - - - - - - - - - - - - - - - - - - -.align 5 -.Lsqr8x_mul: - mulld 18,9,7 - addze 31,0 - mulld 19,10,7 - addi 30,30,8 - mulld 20,11,7 - andi. 30,30,8*8-1 - mulld 21,12,7 - addc 22,22,18 - mulld 18,14,7 - adde 23,23,19 - mulld 19,15,7 - adde 24,24,20 - mulld 20,16,7 - adde 25,25,21 - mulld 21,17,7 - adde 26,26,18 - mulhdu 18,9,7 - adde 27,27,19 - mulhdu 19,10,7 - adde 28,28,20 - mulhdu 20,11,7 - adde 29,29,21 - mulhdu 21,12,7 - addze 31,31 - stdu 22,8(5) - addc 22,23,18 - mulhdu 18,14,7 - adde 23,24,19 - mulhdu 19,15,7 - adde 24,25,20 - mulhdu 20,16,7 - adde 25,26,21 - mulhdu 21,17,7 - ldx 7,3,30 - adde 26,27,18 - adde 27,28,19 - adde 28,29,20 - adde 29,31,21 - - bne .Lsqr8x_mul - - - cmpld 4,6 - beq .Lsqr8x_break - - ld 9,8*1(5) - ld 10,8*2(5) - ld 11,8*3(5) - ld 12,8*4(5) - ld 14,8*5(5) - ld 15,8*6(5) - ld 16,8*7(5) - ld 17,8*8(5) - addc 22,22,9 - ld 9,8*1(4) - adde 23,23,10 - ld 10,8*2(4) - adde 24,24,11 - ld 11,8*3(4) - adde 25,25,12 - ld 12,8*4(4) - adde 26,26,14 - ld 14,8*5(4) - adde 27,27,15 - ld 15,8*6(4) - adde 28,28,16 - ld 16,8*7(4) - adde 29,29,17 - ldu 17,8*8(4) - - b .Lsqr8x_mul - -.align 5 -.Lsqr8x_break: - ld 9,8*8(3) - addi 4,3,8*15 - ld 10,8*9(3) - sub. 18,6,4 - ld 11,8*10(3) - sub 19,5,18 - ld 12,8*11(3) - ld 14,8*12(3) - ld 15,8*13(3) - ld 16,8*14(3) - ld 17,8*15(3) - beq .Lsqr8x_outer_loop - - std 22,8*1(5) - ld 22,8*1(19) - std 23,8*2(5) - ld 23,8*2(19) - std 24,8*3(5) - ld 24,8*3(19) - std 25,8*4(5) - ld 25,8*4(19) - std 26,8*5(5) - ld 26,8*5(19) - std 27,8*6(5) - ld 27,8*6(19) - std 28,8*7(5) - ld 28,8*7(19) - std 29,8*8(5) - ld 29,8*8(19) - mr 5,19 - b .Lsqr8x_outer_loop - -.align 5 -.Lsqr8x_outer_break: - - - ld 10,8*1(18) - ld 12,8*2(18) - ld 15,8*3(18) - ld 17,8*4(18) - addi 4,18,8*4 - - ld 19,8*13(1) - ld 20,8*14(1) - ld 21,8*15(1) - ld 18,8*16(1) - - std 22,8*1(5) - srwi 30,8,5 - std 23,8*2(5) - subi 30,30,1 - std 24,8*3(5) - std 25,8*4(5) - std 26,8*5(5) - std 27,8*6(5) - std 28,8*7(5) - - addi 5,1,8*11 - mulld 22,10,10 - mulhdu 10,10,10 - add 23,19,19 - srdi 19,19,64-1 - mulld 11,12,12 - mulhdu 12,12,12 - addc 23,23,10 - add 24,20,20 - srdi 20,20,64-1 - add 25,21,21 - srdi 21,21,64-1 - or 24,24,19 - - mtctr 30 -.Lsqr4x_shift_n_add: - mulld 14,15,15 - mulhdu 15,15,15 - ld 19,8*6(5) - ld 10,8*1(4) - adde 24,24,11 - add 26,18,18 - srdi 18,18,64-1 - or 25,25,20 - ld 20,8*7(5) - adde 25,25,12 - ld 12,8*2(4) - add 27,19,19 - srdi 19,19,64-1 - or 26,26,21 - ld 21,8*8(5) - mulld 16,17,17 - mulhdu 17,17,17 - adde 26,26,14 - add 28,20,20 - srdi 20,20,64-1 - or 27,27,18 - ld 18,8*9(5) - adde 27,27,15 - ld 15,8*3(4) - add 29,21,21 - srdi 21,21,64-1 - or 28,28,19 - ld 19,8*10(5) - mulld 9,10,10 - mulhdu 10,10,10 - adde 28,28,16 - std 22,8*1(5) - add 22,18,18 - srdi 18,18,64-1 - or 29,29,20 - ld 20,8*11(5) - adde 29,29,17 - ldu 17,8*4(4) - std 23,8*2(5) - add 23,19,19 - srdi 19,19,64-1 - or 22,22,21 - ld 21,8*12(5) - mulld 11,12,12 - mulhdu 12,12,12 - adde 22,22,9 - std 24,8*3(5) - add 24,20,20 - srdi 20,20,64-1 - or 23,23,18 - ld 18,8*13(5) - adde 23,23,10 - std 25,8*4(5) - std 26,8*5(5) - std 27,8*6(5) - std 28,8*7(5) - stdu 29,8*8(5) - add 25,21,21 - srdi 21,21,64-1 - or 24,24,19 - bdnz .Lsqr4x_shift_n_add - ld 4,8*7(1) - ld 7,8*8(1) - - mulld 14,15,15 - mulhdu 15,15,15 - std 22,8*1(5) - ld 22,8*12(1) - ld 19,8*6(5) - adde 24,24,11 - add 26,18,18 - srdi 18,18,64-1 - or 25,25,20 - ld 20,8*7(5) - adde 25,25,12 - add 27,19,19 - srdi 19,19,64-1 - or 26,26,21 - mulld 16,17,17 - mulhdu 17,17,17 - adde 26,26,14 - add 28,20,20 - srdi 20,20,64-1 - or 27,27,18 - std 23,8*2(5) - ld 23,8*13(1) - adde 27,27,15 - or 28,28,19 - ld 9,8*1(4) - ld 10,8*2(4) - adde 28,28,16 - ld 11,8*3(4) - ld 12,8*4(4) - adde 29,17,20 - ld 14,8*5(4) - ld 15,8*6(4) - - - - mulld 31,7,22 - li 30,8 - ld 16,8*7(4) - add 6,4,8 - ldu 17,8*8(4) - std 24,8*3(5) - ld 24,8*14(1) - std 25,8*4(5) - ld 25,8*15(1) - std 26,8*5(5) - ld 26,8*16(1) - std 27,8*6(5) - ld 27,8*17(1) - std 28,8*7(5) - ld 28,8*18(1) - std 29,8*8(5) - ld 29,8*19(1) - addi 5,1,8*11 - mtctr 30 - b .Lsqr8x_reduction - -.align 5 -.Lsqr8x_reduction: - - mulld 19,10,31 - mulld 20,11,31 - stdu 31,8(5) - mulld 21,12,31 - - addic 22,22,-1 - mulld 18,14,31 - adde 22,23,19 - mulld 19,15,31 - adde 23,24,20 - mulld 20,16,31 - adde 24,25,21 - mulld 21,17,31 - adde 25,26,18 - mulhdu 18,9,31 - adde 26,27,19 - mulhdu 19,10,31 - adde 27,28,20 - mulhdu 20,11,31 - adde 28,29,21 - mulhdu 21,12,31 - addze 29,0 - addc 22,22,18 - mulhdu 18,14,31 - adde 23,23,19 - mulhdu 19,15,31 - adde 24,24,20 - mulhdu 20,16,31 - adde 25,25,21 - mulhdu 21,17,31 - mulld 31,7,22 - adde 26,26,18 - adde 27,27,19 - adde 28,28,20 - adde 29,29,21 - bdnz .Lsqr8x_reduction - - ld 18,8*1(5) - ld 19,8*2(5) - ld 20,8*3(5) - ld 21,8*4(5) - subi 3,5,8*7 - cmpld 6,4 - addc 22,22,18 - ld 18,8*5(5) - adde 23,23,19 - ld 19,8*6(5) - adde 24,24,20 - ld 20,8*7(5) - adde 25,25,21 - ld 21,8*8(5) - adde 26,26,18 - adde 27,27,19 - adde 28,28,20 - adde 29,29,21 - - beq .Lsqr8x8_post_condition - - ld 7,8*0(3) - ld 9,8*1(4) - ld 10,8*2(4) - ld 11,8*3(4) - ld 12,8*4(4) - ld 14,8*5(4) - ld 15,8*6(4) - ld 16,8*7(4) - ldu 17,8*8(4) - li 30,0 - -.align 5 -.Lsqr8x_tail: - mulld 18,9,7 - addze 31,0 - mulld 19,10,7 - addi 30,30,8 - mulld 20,11,7 - andi. 30,30,8*8-1 - mulld 21,12,7 - addc 22,22,18 - mulld 18,14,7 - adde 23,23,19 - mulld 19,15,7 - adde 24,24,20 - mulld 20,16,7 - adde 25,25,21 - mulld 21,17,7 - adde 26,26,18 - mulhdu 18,9,7 - adde 27,27,19 - mulhdu 19,10,7 - adde 28,28,20 - mulhdu 20,11,7 - adde 29,29,21 - mulhdu 21,12,7 - addze 31,31 - stdu 22,8(5) - addc 22,23,18 - mulhdu 18,14,7 - adde 23,24,19 - mulhdu 19,15,7 - adde 24,25,20 - mulhdu 20,16,7 - adde 25,26,21 - mulhdu 21,17,7 - ldx 7,3,30 - adde 26,27,18 - adde 27,28,19 - adde 28,29,20 - adde 29,31,21 - - bne .Lsqr8x_tail - - - ld 9,8*1(5) - ld 31,8*10(1) - cmpld 6,4 - ld 10,8*2(5) - sub 20,6,8 - ld 11,8*3(5) - ld 12,8*4(5) - ld 14,8*5(5) - ld 15,8*6(5) - ld 16,8*7(5) - ld 17,8*8(5) - beq .Lsqr8x_tail_break - - addc 22,22,9 - ld 9,8*1(4) - adde 23,23,10 - ld 10,8*2(4) - adde 24,24,11 - ld 11,8*3(4) - adde 25,25,12 - ld 12,8*4(4) - adde 26,26,14 - ld 14,8*5(4) - adde 27,27,15 - ld 15,8*6(4) - adde 28,28,16 - ld 16,8*7(4) - adde 29,29,17 - ldu 17,8*8(4) - - b .Lsqr8x_tail - -.align 5 -.Lsqr8x_tail_break: - ld 7,8*8(1) - ld 21,8*9(1) - addi 30,5,8*8 - - addic 31,31,-1 - adde 18,22,9 - ld 22,8*8(3) - ld 9,8*1(20) - adde 19,23,10 - ld 23,8*9(3) - ld 10,8*2(20) - adde 24,24,11 - ld 11,8*3(20) - adde 25,25,12 - ld 12,8*4(20) - adde 26,26,14 - ld 14,8*5(20) - adde 27,27,15 - ld 15,8*6(20) - adde 28,28,16 - ld 16,8*7(20) - adde 29,29,17 - ld 17,8*8(20) - addi 4,20,8*8 - addze 20,0 - mulld 31,7,22 - std 18,8*1(5) - cmpld 30,21 - std 19,8*2(5) - li 30,8 - std 24,8*3(5) - ld 24,8*10(3) - std 25,8*4(5) - ld 25,8*11(3) - std 26,8*5(5) - ld 26,8*12(3) - std 27,8*6(5) - ld 27,8*13(3) - std 28,8*7(5) - ld 28,8*14(3) - std 29,8*8(5) - ld 29,8*15(3) - std 20,8*10(1) - addi 5,3,8*7 - mtctr 30 - bne .Lsqr8x_reduction - - - - - - - ld 3,8*6(1) - srwi 30,8,6 - mr 7,5 - addi 5,5,8*8 - subi 30,30,1 - subfc 18,9,22 - subfe 19,10,23 - mr 31,20 - mr 6,3 - - mtctr 30 - b .Lsqr8x_sub - -.align 5 -.Lsqr8x_sub: - ld 9,8*1(4) - ld 22,8*1(5) - ld 10,8*2(4) - ld 23,8*2(5) - subfe 20,11,24 - ld 11,8*3(4) - ld 24,8*3(5) - subfe 21,12,25 - ld 12,8*4(4) - ld 25,8*4(5) - std 18,8*1(3) - subfe 18,14,26 - ld 14,8*5(4) - ld 26,8*5(5) - std 19,8*2(3) - subfe 19,15,27 - ld 15,8*6(4) - ld 27,8*6(5) - std 20,8*3(3) - subfe 20,16,28 - ld 16,8*7(4) - ld 28,8*7(5) - std 21,8*4(3) - subfe 21,17,29 - ldu 17,8*8(4) - ldu 29,8*8(5) - std 18,8*5(3) - subfe 18,9,22 - std 19,8*6(3) - subfe 19,10,23 - std 20,8*7(3) - stdu 21,8*8(3) - bdnz .Lsqr8x_sub - - srwi 30,8,5 - ld 9,8*1(6) - ld 22,8*1(7) - subi 30,30,1 - ld 10,8*2(6) - ld 23,8*2(7) - subfe 20,11,24 - ld 11,8*3(6) - ld 24,8*3(7) - subfe 21,12,25 - ld 12,8*4(6) - ldu 25,8*4(7) - std 18,8*1(3) - subfe 18,14,26 - std 19,8*2(3) - subfe 19,15,27 - std 20,8*3(3) - subfe 20,16,28 - std 21,8*4(3) - subfe 21,17,29 - std 18,8*5(3) - subfe 31,0,31 - std 19,8*6(3) - std 20,8*7(3) - std 21,8*8(3) - - addi 5,1,8*11 - mtctr 30 - -.Lsqr4x_cond_copy: - andc 9,9,31 - std 0,-8*3(7) - and 22,22,31 - std 0,-8*2(7) - andc 10,10,31 - std 0,-8*1(7) - and 23,23,31 - std 0,-8*0(7) - andc 11,11,31 - std 0,8*1(5) - and 24,24,31 - std 0,8*2(5) - andc 12,12,31 - std 0,8*3(5) - and 25,25,31 - stdu 0,8*4(5) - or 18,9,22 - ld 9,8*5(6) - ld 22,8*1(7) - or 19,10,23 - ld 10,8*6(6) - ld 23,8*2(7) - or 20,11,24 - ld 11,8*7(6) - ld 24,8*3(7) - or 21,12,25 - ld 12,8*8(6) - ldu 25,8*4(7) - std 18,8*1(6) - std 19,8*2(6) - std 20,8*3(6) - stdu 21,8*4(6) - bdnz .Lsqr4x_cond_copy - - ld 4,0(1) - andc 9,9,31 - and 22,22,31 - andc 10,10,31 - and 23,23,31 - andc 11,11,31 - and 24,24,31 - andc 12,12,31 - and 25,25,31 - or 18,9,22 - or 19,10,23 - or 20,11,24 - or 21,12,25 - std 18,8*1(6) - std 19,8*2(6) - std 20,8*3(6) - std 21,8*4(6) - - b .Lsqr8x_done - -.align 5 -.Lsqr8x8_post_condition: - ld 3,8*6(1) - ld 4,0(1) - addze 31,0 - - - subfc 22,9,22 - subfe 23,10,23 - std 0,8*12(1) - std 0,8*13(1) - subfe 24,11,24 - std 0,8*14(1) - std 0,8*15(1) - subfe 25,12,25 - std 0,8*16(1) - std 0,8*17(1) - subfe 26,14,26 - std 0,8*18(1) - std 0,8*19(1) - subfe 27,15,27 - std 0,8*20(1) - std 0,8*21(1) - subfe 28,16,28 - std 0,8*22(1) - std 0,8*23(1) - subfe 29,17,29 - std 0,8*24(1) - std 0,8*25(1) - subfe 31,0,31 - std 0,8*26(1) - std 0,8*27(1) - - and 9,9,31 - and 10,10,31 - addc 22,22,9 - and 11,11,31 - adde 23,23,10 - and 12,12,31 - adde 24,24,11 - and 14,14,31 - adde 25,25,12 - and 15,15,31 - adde 26,26,14 - and 16,16,31 - adde 27,27,15 - and 17,17,31 - adde 28,28,16 - adde 29,29,17 - std 22,8*1(3) - std 23,8*2(3) - std 24,8*3(3) - std 25,8*4(3) - std 26,8*5(3) - std 27,8*6(3) - std 28,8*7(3) - std 29,8*8(3) - -.Lsqr8x_done: - std 0,8*8(1) - std 0,8*10(1) - - ld 14,-8*18(4) - li 3,1 - ld 15,-8*17(4) - ld 16,-8*16(4) - ld 17,-8*15(4) - ld 18,-8*14(4) - ld 19,-8*13(4) - ld 20,-8*12(4) - ld 21,-8*11(4) - ld 22,-8*10(4) - ld 23,-8*9(4) - ld 24,-8*8(4) - ld 25,-8*7(4) - ld 26,-8*6(4) - ld 27,-8*5(4) - ld 28,-8*4(4) - ld 29,-8*3(4) - ld 30,-8*2(4) - ld 31,-8*1(4) - mr 1,4 - blr -.long 0 -.byte 0,12,4,0x20,0x80,18,6,0 -.long 0 -.size __bn_sqr8x_mont,.-__bn_sqr8x_mont -.byte 77,111,110,116,103,111,109,101,114,121,32,77,117,108,116,105,112,108,105,99,97,116,105,111,110,32,102,111,114,32,80,80,67,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 diff --git a/sys/crypto/openssl/powerpc64/ppc.S b/sys/crypto/openssl/powerpc64/ppc.S deleted file mode 100644 index 50805d3d52b..00000000000 --- a/sys/crypto/openssl/powerpc64/ppc.S +++ /dev/null @@ -1,1876 +0,0 @@ -/* Do not modify. This file is auto-generated from ppc.pl. */ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -.globl bn_sqr_comba4 -.type bn_sqr_comba4,@function -.globl bn_sqr_comba8 -.type bn_sqr_comba8,@function -.globl bn_mul_comba4 -.type bn_mul_comba4,@function -.globl bn_mul_comba8 -.type bn_mul_comba8,@function -.globl bn_sub_words -.type bn_sub_words,@function -.globl bn_add_words -.type bn_add_words,@function -.globl bn_div_words -.type bn_div_words,@function -.globl bn_sqr_words -.type bn_sqr_words,@function -.globl bn_mul_words -.type bn_mul_words,@function -.globl bn_mul_add_words -.type bn_mul_add_words,@function - - - -.machine "any" -.abiversion 2 -.text - - - - - - - - -.align 4 -bn_sqr_comba4: -.localentry bn_sqr_comba4,0 - - - - - - - - - - - - - - - - - xor 0,0,0 - - - - ld 5,0(4) - mulld 9,5,5 - mulhdu 10,5,5 - - - - - std 9,0(3) - - ld 6,8(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 7,7,7 - adde 8,8,8 - addze 9,0 - - - addc 10,7,10 - addze 11,8 - addze 9,9 - - std 10,8(3) - - mulld 7,6,6 - mulhdu 8,6,6 - addc 11,7,11 - adde 9,8,9 - addze 10,0 - - ld 6,16(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 7,7,7 - adde 8,8,8 - addze 10,10 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - std 11,16(3) - - ld 6,24(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 7,7,7 - adde 8,8,8 - addze 11,0 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - ld 5,8(4) - ld 6,16(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 7,7,7 - adde 8,8,8 - addze 11,11 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - std 9,24(3) - - mulld 7,6,6 - mulhdu 8,6,6 - addc 10,7,10 - adde 11,8,11 - addze 9,0 - - ld 6,24(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 7,7,7 - adde 8,8,8 - addze 9,9 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - std 10,32(3) - - ld 5,16(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 7,7,7 - adde 8,8,8 - addze 10,0 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - std 11,40(3) - - mulld 7,6,6 - mulhdu 8,6,6 - addc 9,7,9 - adde 10,8,10 - - std 9,48(3) - std 10,56(3) - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size bn_sqr_comba4,.-bn_sqr_comba4 - - - - - - - - -.align 4 -bn_sqr_comba8: -.localentry bn_sqr_comba8,0 - - - - - - - - - - - - - - - - - - - - - xor 0,0,0 - - - - ld 5,0(4) - mulld 9,5,5 - mulhdu 10,5,5 - std 9,0(3) - - ld 6,8(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 10,7,10 - adde 11,8,0 - addze 9,0 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - std 10,8(3) - - - mulld 7,6,6 - mulhdu 8,6,6 - addc 11,7,11 - adde 9,8,9 - addze 10,0 - - ld 6,16(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - std 11,16(3) - - ld 6,24(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 9,7,9 - adde 10,8,10 - addze 11,0 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - ld 5,8(4) - ld 6,16(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - std 9,24(3) - - mulld 7,6,6 - mulhdu 8,6,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,0 - - ld 6,24(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - ld 5,0(4) - ld 6,32(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - std 10,32(3) - - ld 6,40(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 11,7,11 - adde 9,8,9 - addze 10,0 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - ld 5,8(4) - ld 6,32(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - ld 5,16(4) - ld 6,24(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - std 11,40(3) - - mulld 7,6,6 - mulhdu 8,6,6 - addc 9,7,9 - adde 10,8,10 - addze 11,0 - - ld 6,32(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - ld 5,8(4) - ld 6,40(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - ld 5,0(4) - ld 6,48(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - std 9,48(3) - - ld 6,56(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,0 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - ld 5,8(4) - ld 6,48(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - ld 5,16(4) - ld 6,40(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - ld 5,24(4) - ld 6,32(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - std 10,56(3) - - mulld 7,6,6 - mulhdu 8,6,6 - addc 11,7,11 - adde 9,8,9 - addze 10,0 - - ld 6,40(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - ld 5,16(4) - ld 6,48(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - ld 5,8(4) - ld 6,56(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - std 11,64(3) - - ld 5,16(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 9,7,9 - adde 10,8,10 - addze 11,0 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - ld 5,24(4) - ld 6,48(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - ld 5,32(4) - ld 6,40(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - std 9,72(3) - - mulld 7,6,6 - mulhdu 8,6,6 - addc 10,7,10 - adde 11,8,11 - addze 9,0 - - ld 6,48(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - ld 5,24(4) - ld 6,56(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - std 10,80(3) - - ld 5,32(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 11,7,11 - adde 9,8,9 - addze 10,0 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - ld 5,40(4) - ld 6,48(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - std 11,88(3) - - mulld 7,6,6 - mulhdu 8,6,6 - addc 9,7,9 - adde 10,8,10 - addze 11,0 - - ld 6,56(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - std 9,96(3) - - - ld 5,48(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 10,7,10 - adde 11,8,11 - addze 9,0 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - std 10,104(3) - - mulld 7,6,6 - mulhdu 8,6,6 - addc 11,7,11 - adde 9,8,9 - std 11,112(3) - std 9, 120(3) - - - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size bn_sqr_comba8,.-bn_sqr_comba8 - - - - - - - - -.align 4 -bn_mul_comba4: -.localentry bn_mul_comba4,0 - - - - - - - - - - - - - xor 0,0,0 - - ld 6,0(4) - ld 7,0(5) - mulld 10,6,7 - mulhdu 11,6,7 - std 10,0(3) - - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,8,11 - adde 12,9,0 - addze 10,0 - - ld 6, 8(4) - ld 7, 0(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,8,11 - adde 12,9,12 - addze 10,10 - std 11,8(3) - - ld 6,16(4) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,8,12 - adde 10,9,10 - addze 11,0 - - ld 6,8(4) - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,8,12 - adde 10,9,10 - addze 11,11 - - ld 6,0(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,8,12 - adde 10,9,10 - addze 11,11 - std 12,16(3) - - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,8,10 - adde 11,9,11 - addze 12,0 - - ld 6,8(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,8,10 - adde 11,9,11 - addze 12,12 - - ld 6,16(4) - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,8,10 - adde 11,9,11 - addze 12,12 - - ld 6,24(4) - ld 7,0(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,8,10 - adde 11,9,11 - addze 12,12 - std 10,24(3) - - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,8,11 - adde 12,9,12 - addze 10,0 - - ld 6,16(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,8,11 - adde 12,9,12 - addze 10,10 - - ld 6,8(4) - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,8,11 - adde 12,9,12 - addze 10,10 - std 11,32(3) - - ld 6,16(4) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,8,12 - adde 10,9,10 - addze 11,0 - - ld 6,24(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,8,12 - adde 10,9,10 - addze 11,11 - std 12,40(3) - - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,8,10 - adde 11,9,11 - - std 10,48(3) - std 11,56(3) - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size bn_mul_comba4,.-bn_mul_comba4 - - - - - - - - -.align 4 -bn_mul_comba8: -.localentry bn_mul_comba8,0 - - - - - - - - - - - - - xor 0,0,0 - - - ld 6,0(4) - ld 7,0(5) - mulld 10,6,7 - mulhdu 11,6,7 - std 10,0(3) - - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - addze 12,9 - addze 10,0 - - ld 6,8(4) - ld 7,0(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - std 11,8(3) - - ld 6,16(4) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,0 - - ld 6,8(4) - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,0(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - std 12,16(3) - - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,0 - - ld 6,8(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - - ld 6,16(4) - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,24(4) - ld 7,0(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - std 10,24(3) - - ld 6,32(4) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,0 - - ld 6,24(4) - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,16(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,8(4) - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,0(4) - ld 7,32(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - std 11,32(3) - - ld 7,40(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,0 - - ld 6,8(4) - ld 7,32(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,16(4) - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,24(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,32(4) - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,40(4) - ld 7,0(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - std 12,40(3) - - ld 6,48(4) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,0 - - ld 6,40(4) - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,32(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,24(4) - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,16(4) - ld 7,32(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,8(4) - ld 7,40(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,0(4) - ld 7,48(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - std 10,48(3) - - ld 7,56(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,0 - - ld 6,8(4) - ld 7,48(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,16(4) - ld 7,40(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,24(4) - ld 7,32(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,32(4) - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,40(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,48(4) - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,56(4) - ld 7,0(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - std 11,56(3) - - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,0 - - ld 6,48(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,40(4) - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,32(4) - ld 7,32(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,24(4) - ld 7,40(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,16(4) - ld 7,48(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,8(4) - ld 7,56(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - std 12,64(3) - - ld 6,16(4) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,0 - - ld 6,24(4) - ld 7,48(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,32(4) - ld 7,40(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,40(4) - ld 7,32(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,48(4) - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,56(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - std 10,72(3) - - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,0 - - ld 6,48(4) - ld 7,32(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,40(4) - ld 7,40(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,32(4) - ld 7,48(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,24(4) - ld 7,56(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - std 11,80(3) - - ld 6,32(4) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,0 - - ld 6,40(4) - ld 7,48(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,48(4) - ld 7,40(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,56(4) - ld 7,32(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - std 12,88(3) - - ld 7,40(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,0 - - ld 6,48(4) - ld 7,48(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,40(4) - ld 7,56(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - std 10,96(3) - - ld 6,48(4) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,0 - - ld 6,56(4) - ld 7,48(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - std 11,104(3) - - ld 7,56(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - std 12,112(3) - std 10,120(3) - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size bn_mul_comba8,.-bn_mul_comba8 - - - - - - - - -.align 4 -bn_sub_words: -.localentry bn_sub_words,0 - - - - - - - - - - - - - - - xor 0,0,0 - - - - subfc. 7,0,6 - - - beq .Lppcasm_sub_adios - addi 4,4,-8 - addi 3,3,-8 - addi 5,5,-8 - mtctr 6 -.Lppcasm_sub_mainloop: - ldu 7,8(4) - ldu 8,8(5) - subfe 6,8,7 - - - stdu 6,8(3) - bdnz .Lppcasm_sub_mainloop -.Lppcasm_sub_adios: - subfze 3,0 - andi. 3,3,1 - blr -.long 0 -.byte 0,12,0x14,0,0,0,4,0 -.long 0 -.size bn_sub_words,.-bn_sub_words - - - - - - - - -.align 4 -bn_add_words: -.localentry bn_add_words,0 - - - - - - - - - - - - - - - xor 0,0,0 - - - - addic. 6,6,0 - beq .Lppcasm_add_adios - addi 4,4,-8 - addi 3,3,-8 - addi 5,5,-8 - mtctr 6 -.Lppcasm_add_mainloop: - ldu 7,8(4) - ldu 8,8(5) - adde 8,7,8 - stdu 8,8(3) - bdnz .Lppcasm_add_mainloop -.Lppcasm_add_adios: - addze 3,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,4,0 -.long 0 -.size bn_add_words,.-bn_add_words - - - - - - - - -.align 4 -bn_div_words: -.localentry bn_div_words,0 - - - - - - - - - - - - - cmpldi 0,5,0 - bne .Lppcasm_div1 - li 3,-1 - blr -.Lppcasm_div1: - xor 0,0,0 - li 8,64 - cntlzd. 7,5 - beq .Lppcasm_div2 - subf 8,7,8 - srd. 9,3,8 - td 16,9,0 -.Lppcasm_div2: - cmpld 0,3,5 - blt .Lppcasm_div3 - subf 3,5,3 -.Lppcasm_div3: - cmpi 0,0,7,0 - beq .Lppcasm_div4 - sld 3,3,7 - srd 8,4,8 - sld 5,5,7 - or 3,3,8 - sld 4,4,7 -.Lppcasm_div4: - srdi 9,5,32 - - - li 6,2 - mtctr 6 -.Lppcasm_divouterloop: - srdi 8,3,32 - srdi 11,4,32 - - cmpld 0,8,9 - bne .Lppcasm_div5 - - li 8,-1 - clrldi 8,8,32 - b .Lppcasm_div6 -.Lppcasm_div5: - divdu 8,3,9 -.Lppcasm_div6: - mulld 12,9,8 - clrldi 10,5,32 - mulld 6,8,10 - -.Lppcasm_divinnerloop: - subf 10,12,3 - srdi 7,10,32 - addic. 7,7,0 - - - - sldi 7,10,32 - or 7,7,11 - cmpld 1,6,7 - bne .Lppcasm_divinnerexit - ble 1,.Lppcasm_divinnerexit - addi 8,8,-1 - subf 12,9,12 - clrldi 10,5,32 - subf 6,10,6 - b .Lppcasm_divinnerloop -.Lppcasm_divinnerexit: - srdi 10,6,32 - sldi 11,6,32 - cmpld 1,4,11 - add 12,12,10 - bge 1,.Lppcasm_div7 - addi 12,12,1 -.Lppcasm_div7: - subf 11,11,4 - cmpld 1,3,12 - bge 1,.Lppcasm_div8 - addi 8,8,-1 - add 3,5,3 -.Lppcasm_div8: - subf 12,12,3 - sldi 4,11,32 - - - - insrdi 11,12,32,32 - rotldi 3,11,32 - bdz .Lppcasm_div9 - sldi 0,8,32 - b .Lppcasm_divouterloop -.Lppcasm_div9: - or 3,8,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size bn_div_words,.-bn_div_words - - - - - - - -.align 4 -bn_sqr_words: -.localentry bn_sqr_words,0 - - - - - - - - - - - - - - - - addic. 5,5,0 - beq .Lppcasm_sqr_adios - addi 4,4,-8 - addi 3,3,-8 - mtctr 5 -.Lppcasm_sqr_mainloop: - - ldu 6,8(4) - mulld 7,6,6 - mulhdu 8,6,6 - stdu 7,8(3) - stdu 8,8(3) - bdnz .Lppcasm_sqr_mainloop -.Lppcasm_sqr_adios: - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size bn_sqr_words,.-bn_sqr_words - - - - - - - - -.align 4 -bn_mul_words: -.localentry bn_mul_words,0 - - - - - - - - - xor 0,0,0 - xor 12,12,12 - rlwinm. 7,5,30,2,31 - beq .Lppcasm_mw_REM - mtctr 7 -.Lppcasm_mw_LOOP: - - ld 8,0(4) - mulld 9,6,8 - mulhdu 10,6,8 - addc 9,9,12 - - - - - std 9,0(3) - - ld 8,8(4) - mulld 11,6,8 - mulhdu 12,6,8 - adde 11,11,10 - - std 11,8(3) - - ld 8,16(4) - mulld 9,6,8 - mulhdu 10,6,8 - adde 9,9,12 - - std 9,16(3) - - ld 8,24(4) - mulld 11,6,8 - mulhdu 12,6,8 - adde 11,11,10 - addze 12,12 - - std 11,24(3) - - addi 3,3,32 - addi 4,4,32 - bdnz .Lppcasm_mw_LOOP - -.Lppcasm_mw_REM: - andi. 5,5,0x3 - beq .Lppcasm_mw_OVER - - ld 8,0(4) - mulld 9,6,8 - mulhdu 10,6,8 - addc 9,9,12 - addze 10,10 - std 9,0(3) - addi 12,10,0 - - addi 5,5,-1 - cmpli 0,0,5,0 - beq .Lppcasm_mw_OVER - - - - ld 8,8(4) - mulld 9,6,8 - mulhdu 10,6,8 - addc 9,9,12 - addze 10,10 - std 9,8(3) - addi 12,10,0 - - addi 5,5,-1 - cmpli 0,0,5,0 - beq .Lppcasm_mw_OVER - - - ld 8,16(4) - mulld 9,6,8 - mulhdu 10,6,8 - addc 9,9,12 - addze 10,10 - std 9,16(3) - addi 12,10,0 - -.Lppcasm_mw_OVER: - addi 3,12,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,4,0 -.long 0 -.size bn_mul_words,.-bn_mul_words - - - - - - - - -.align 4 -bn_mul_add_words: -.localentry bn_mul_add_words,0 - - - - - - - - - - - - xor 0,0,0 - xor 12,12,12 - rlwinm. 7,5,30,2,31 - beq .Lppcasm_maw_leftover - mtctr 7 -.Lppcasm_maw_mainloop: - - ld 8,0(4) - ld 11,0(3) - mulld 9,6,8 - mulhdu 10,6,8 - addc 9,9,12 - addze 10,10 - addc 9,9,11 - - - - - - - std 9,0(3) - - - ld 8,8(4) - ld 9,8(3) - mulld 11,6,8 - mulhdu 12,6,8 - adde 11,11,10 - addze 12,12 - addc 11,11,9 - - std 11,8(3) - - - ld 8,16(4) - mulld 9,6,8 - ld 11,16(3) - mulhdu 10,6,8 - adde 9,9,12 - addze 10,10 - addc 9,9,11 - - std 9,16(3) - - - ld 8,24(4) - mulld 11,6,8 - ld 9,24(3) - mulhdu 12,6,8 - adde 11,11,10 - addze 12,12 - addc 11,11,9 - addze 12,12 - std 11,24(3) - addi 3,3,32 - addi 4,4,32 - bdnz .Lppcasm_maw_mainloop - -.Lppcasm_maw_leftover: - andi. 5,5,0x3 - beq .Lppcasm_maw_adios - addi 3,3,-8 - addi 4,4,-8 - - mtctr 5 - ldu 8,8(4) - mulld 9,6,8 - mulhdu 10,6,8 - ldu 11,8(3) - addc 9,9,11 - addze 10,10 - addc 9,9,12 - addze 12,10 - std 9,0(3) - - bdz .Lppcasm_maw_adios - - ldu 8,8(4) - mulld 9,6,8 - mulhdu 10,6,8 - ldu 11,8(3) - addc 9,9,11 - addze 10,10 - addc 9,9,12 - addze 12,10 - std 9,0(3) - - bdz .Lppcasm_maw_adios - - ldu 8,8(4) - mulld 9,6,8 - mulhdu 10,6,8 - ldu 11,8(3) - addc 9,9,11 - addze 10,10 - addc 9,9,12 - addze 12,10 - std 9,0(3) - -.Lppcasm_maw_adios: - addi 3,12,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,4,0 -.long 0 -.size bn_mul_add_words,.-bn_mul_add_words -.align 4 diff --git a/sys/crypto/openssl/powerpc64/ppccpuid.S b/sys/crypto/openssl/powerpc64/ppccpuid.S deleted file mode 100644 index d352a41008b..00000000000 --- a/sys/crypto/openssl/powerpc64/ppccpuid.S +++ /dev/null @@ -1,387 +0,0 @@ -/* Do not modify. This file is auto-generated from ppccpuid.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl OPENSSL_fpu_probe -.type OPENSSL_fpu_probe,@function -.align 4 -OPENSSL_fpu_probe: -.localentry OPENSSL_fpu_probe,0 - - fmr 0,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_fpu_probe,.-OPENSSL_fpu_probe -.globl OPENSSL_ppc64_probe -.type OPENSSL_ppc64_probe,@function -.align 4 -OPENSSL_ppc64_probe: -.localentry OPENSSL_ppc64_probe,0 - - fcfid 1,1 - rldicl 0,0,32,32 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_ppc64_probe,.-OPENSSL_ppc64_probe - -.globl OPENSSL_altivec_probe -.type OPENSSL_altivec_probe,@function -.align 4 -OPENSSL_altivec_probe: -.localentry OPENSSL_altivec_probe,0 - -.long 0x10000484 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_altivec_probe,.-OPENSSL_altivec_probe - -.globl OPENSSL_crypto207_probe -.type OPENSSL_crypto207_probe,@function -.align 4 -OPENSSL_crypto207_probe: -.localentry OPENSSL_crypto207_probe,0 - - .long 0x7C000E99 - .long 0x10000508 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_crypto207_probe,.-OPENSSL_crypto207_probe - -.globl OPENSSL_madd300_probe -.type OPENSSL_madd300_probe,@function -.align 4 -OPENSSL_madd300_probe: -.localentry OPENSSL_madd300_probe,0 - - xor 0,0,0 - .long 0x10600033 - .long 0x10600031 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.globl OPENSSL_wipe_cpu -.type OPENSSL_wipe_cpu,@function -.align 4 -OPENSSL_wipe_cpu: -.localentry OPENSSL_wipe_cpu,0 - - xor 0,0,0 - fmr 0,31 - fmr 1,31 - fmr 2,31 - mr 3,1 - fmr 3,31 - xor 4,4,4 - fmr 4,31 - xor 5,5,5 - fmr 5,31 - xor 6,6,6 - fmr 6,31 - xor 7,7,7 - fmr 7,31 - xor 8,8,8 - fmr 8,31 - xor 9,9,9 - fmr 9,31 - xor 10,10,10 - fmr 10,31 - xor 11,11,11 - fmr 11,31 - xor 12,12,12 - fmr 12,31 - fmr 13,31 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu - -.globl OPENSSL_atomic_add -.type OPENSSL_atomic_add,@function -.align 4 -OPENSSL_atomic_add: -.localentry OPENSSL_atomic_add,0 - -.Ladd: lwarx 5,0,3 - add 0,4,5 - stwcx. 0,0,3 - bne- .Ladd - extsw 3,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size OPENSSL_atomic_add,.-OPENSSL_atomic_add - -.globl OPENSSL_rdtsc_mftb -.type OPENSSL_rdtsc_mftb,@function -.align 4 -OPENSSL_rdtsc_mftb: -.localentry OPENSSL_rdtsc_mftb,0 - - mftb 3 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_rdtsc_mftb,.-OPENSSL_rdtsc_mftb - -.globl OPENSSL_rdtsc_mfspr268 -.type OPENSSL_rdtsc_mfspr268,@function -.align 4 -OPENSSL_rdtsc_mfspr268: -.localentry OPENSSL_rdtsc_mfspr268,0 - - mfspr 3,268 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_rdtsc_mfspr268,.-OPENSSL_rdtsc_mfspr268 - -.globl OPENSSL_cleanse -.type OPENSSL_cleanse,@function -.align 4 -OPENSSL_cleanse: -.localentry OPENSSL_cleanse,0 - - cmpldi 4,7 - li 0,0 - bge .Lot - cmpldi 4,0 - .long 0x4DC20020 -.Little: mtctr 4 - stb 0,0(3) - addi 3,3,1 - bdnz $-8 - blr -.Lot: andi. 5,3,3 - beq .Laligned - stb 0,0(3) - subi 4,4,1 - addi 3,3,1 - b .Lot -.Laligned: - srdi 5,4,2 - mtctr 5 - stw 0,0(3) - addi 3,3,4 - bdnz $-8 - andi. 4,4,3 - bne .Little - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size OPENSSL_cleanse,.-OPENSSL_cleanse - -.globl CRYPTO_memcmp -.type CRYPTO_memcmp,@function -.align 4 -CRYPTO_memcmp: -.localentry CRYPTO_memcmp,0 - - cmpldi 5,0 - li 0,0 - beq .Lno_data - mtctr 5 -.Loop_cmp: - lbz 6,0(3) - addi 3,3,1 - lbz 7,0(4) - addi 4,4,1 - xor 6,6,7 - or 0,0,6 - bdnz .Loop_cmp - -.Lno_data: - li 3,0 - sub 3,3,0 - extrwi 3,3,1,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size CRYPTO_memcmp,.-CRYPTO_memcmp -.globl OPENSSL_instrument_bus_mftb -.type OPENSSL_instrument_bus_mftb,@function -.align 4 -OPENSSL_instrument_bus_mftb: -.localentry OPENSSL_instrument_bus_mftb,0 - - mtctr 4 - - mftb 7 - li 8,0 - - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - -.Loop: mftb 6 - sub 8,6,7 - mr 7,6 - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - addi 3,3,4 - bdnz .Loop - - mr 3,4 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size OPENSSL_instrument_bus_mftb,.-OPENSSL_instrument_bus_mftb - -.globl OPENSSL_instrument_bus2_mftb -.type OPENSSL_instrument_bus2_mftb,@function -.align 4 -OPENSSL_instrument_bus2_mftb: -.localentry OPENSSL_instrument_bus2_mftb,0 - - mr 0,4 - slwi 4,4,2 - - mftb 7 - li 8,0 - - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - - mftb 6 - sub 8,6,7 - mr 7,6 - mr 9,8 -.Loop2: - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - - addic. 5,5,-1 - beq .Ldone2 - - mftb 6 - sub 8,6,7 - mr 7,6 - cmplw 7,8,9 - mr 9,8 - - mfcr 6 - not 6,6 - rlwinm 6,6,1,29,29 - - sub. 4,4,6 - add 3,3,6 - bne .Loop2 - -.Ldone2: - srwi 4,4,2 - sub 3,0,4 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size OPENSSL_instrument_bus2_mftb,.-OPENSSL_instrument_bus2_mftb - -.globl OPENSSL_instrument_bus_mfspr268 -.type OPENSSL_instrument_bus_mfspr268,@function -.align 4 -OPENSSL_instrument_bus_mfspr268: -.localentry OPENSSL_instrument_bus_mfspr268,0 - - mtctr 4 - - mfspr 7,268 - li 8,0 - - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - -.Loop3: mfspr 6,268 - sub 8,6,7 - mr 7,6 - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - addi 3,3,4 - bdnz .Loop3 - - mr 3,4 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size OPENSSL_instrument_bus_mfspr268,.-OPENSSL_instrument_bus_mfspr268 - -.globl OPENSSL_instrument_bus2_mfspr268 -.type OPENSSL_instrument_bus2_mfspr268,@function -.align 4 -OPENSSL_instrument_bus2_mfspr268: -.localentry OPENSSL_instrument_bus2_mfspr268,0 - - mr 0,4 - slwi 4,4,2 - - mfspr 7,268 - li 8,0 - - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - - mfspr 6,268 - sub 8,6,7 - mr 7,6 - mr 9,8 -.Loop4: - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - - addic. 5,5,-1 - beq .Ldone4 - - mfspr 6,268 - sub 8,6,7 - mr 7,6 - cmplw 7,8,9 - mr 9,8 - - mfcr 6 - not 6,6 - rlwinm 6,6,1,29,29 - - sub. 4,4,6 - add 3,3,6 - bne .Loop4 - -.Ldone4: - srwi 4,4,2 - sub 3,0,4 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size OPENSSL_instrument_bus2_mfspr268,.-OPENSSL_instrument_bus2_mfspr268 diff --git a/sys/crypto/openssl/powerpc64/sha1-ppc.S b/sys/crypto/openssl/powerpc64/sha1-ppc.S deleted file mode 100644 index a111ba427ce..00000000000 --- a/sys/crypto/openssl/powerpc64/sha1-ppc.S +++ /dev/null @@ -1,1121 +0,0 @@ -/* Do not modify. This file is auto-generated from sha1-ppc.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl sha1_block_data_order -.type sha1_block_data_order,@function -.align 4 -sha1_block_data_order: -.localentry sha1_block_data_order,0 - - stdu 1,-256(1) - mflr 0 - std 15,120(1) - std 16,128(1) - std 17,136(1) - std 18,144(1) - std 19,152(1) - std 20,160(1) - std 21,168(1) - std 22,176(1) - std 23,184(1) - std 24,192(1) - std 25,200(1) - std 26,208(1) - std 27,216(1) - std 28,224(1) - std 29,232(1) - std 30,240(1) - std 31,248(1) - std 0,272(1) - lwz 7,0(3) - lwz 8,4(3) - lwz 9,8(3) - lwz 10,12(3) - lwz 11,16(3) - andi. 0,4,3 - bne .Lunaligned -.Laligned: - mtctr 5 - bl .Lsha1_block_private - b .Ldone - - - - - - - -.align 4 -.Lunaligned: - subfic 6,4,4096 - andi. 6,6,4095 - srwi. 6,6,6 - beq .Lcross_page - cmpld 5,6 - ble .Laligned - mtctr 6 - subfc 5,6,5 - bl .Lsha1_block_private -.Lcross_page: - li 6,16 - mtctr 6 - addi 20,1,48 -.Lmemcpy: - lbz 16,0(4) - lbz 17,1(4) - lbz 18,2(4) - lbz 19,3(4) - addi 4,4,4 - stb 16,0(20) - stb 17,1(20) - stb 18,2(20) - stb 19,3(20) - addi 20,20,4 - bdnz .Lmemcpy - - std 4,112(1) - li 6,1 - addi 4,1,48 - mtctr 6 - bl .Lsha1_block_private - ld 4,112(1) - addic. 5,5,-1 - bne .Lunaligned - -.Ldone: - ld 0,272(1) - ld 15,120(1) - ld 16,128(1) - ld 17,136(1) - ld 18,144(1) - ld 19,152(1) - ld 20,160(1) - ld 21,168(1) - ld 22,176(1) - ld 23,184(1) - ld 24,192(1) - ld 25,200(1) - ld 26,208(1) - ld 27,216(1) - ld 28,224(1) - ld 29,232(1) - ld 30,240(1) - ld 31,248(1) - mtlr 0 - addi 1,1,256 - blr -.long 0 -.byte 0,12,4,1,0x80,18,3,0 -.long 0 -.align 4 -.Lsha1_block_private: - lis 0,0x5a82 - ori 0,0,0x7999 - lwz 16,0(4) - lwz 17,4(4) - add 12,0,11 - rotlwi 11,7,5 - add 12,12,16 - and 15,9,8 - add 12,12,11 - andc 6,10,8 - rotlwi 8,8,30 - or 15,15,6 - add 12,12,15 - lwz 18,8(4) - add 11,0,10 - rotlwi 10,12,5 - add 11,11,17 - and 15,8,7 - add 11,11,10 - andc 6,9,7 - rotlwi 7,7,30 - or 15,15,6 - add 11,11,15 - lwz 19,12(4) - add 10,0,9 - rotlwi 9,11,5 - add 10,10,18 - and 15,7,12 - add 10,10,9 - andc 6,8,12 - rotlwi 12,12,30 - or 15,15,6 - add 10,10,15 - lwz 20,16(4) - add 9,0,8 - rotlwi 8,10,5 - add 9,9,19 - and 15,12,11 - add 9,9,8 - andc 6,7,11 - rotlwi 11,11,30 - or 15,15,6 - add 9,9,15 - lwz 21,20(4) - add 8,0,7 - rotlwi 7,9,5 - add 8,8,20 - and 15,11,10 - add 8,8,7 - andc 6,12,10 - rotlwi 10,10,30 - or 15,15,6 - add 8,8,15 - lwz 22,24(4) - add 7,0,12 - rotlwi 12,8,5 - add 7,7,21 - and 15,10,9 - add 7,7,12 - andc 6,11,9 - rotlwi 9,9,30 - or 15,15,6 - add 7,7,15 - lwz 23,28(4) - add 12,0,11 - rotlwi 11,7,5 - add 12,12,22 - and 15,9,8 - add 12,12,11 - andc 6,10,8 - rotlwi 8,8,30 - or 15,15,6 - add 12,12,15 - lwz 24,32(4) - add 11,0,10 - rotlwi 10,12,5 - add 11,11,23 - and 15,8,7 - add 11,11,10 - andc 6,9,7 - rotlwi 7,7,30 - or 15,15,6 - add 11,11,15 - lwz 25,36(4) - add 10,0,9 - rotlwi 9,11,5 - add 10,10,24 - and 15,7,12 - add 10,10,9 - andc 6,8,12 - rotlwi 12,12,30 - or 15,15,6 - add 10,10,15 - lwz 26,40(4) - add 9,0,8 - rotlwi 8,10,5 - add 9,9,25 - and 15,12,11 - add 9,9,8 - andc 6,7,11 - rotlwi 11,11,30 - or 15,15,6 - add 9,9,15 - lwz 27,44(4) - add 8,0,7 - rotlwi 7,9,5 - add 8,8,26 - and 15,11,10 - add 8,8,7 - andc 6,12,10 - rotlwi 10,10,30 - or 15,15,6 - add 8,8,15 - lwz 28,48(4) - add 7,0,12 - rotlwi 12,8,5 - add 7,7,27 - and 15,10,9 - add 7,7,12 - andc 6,11,9 - rotlwi 9,9,30 - or 15,15,6 - add 7,7,15 - lwz 29,52(4) - add 12,0,11 - rotlwi 11,7,5 - add 12,12,28 - and 15,9,8 - add 12,12,11 - andc 6,10,8 - rotlwi 8,8,30 - or 15,15,6 - add 12,12,15 - lwz 30,56(4) - add 11,0,10 - rotlwi 10,12,5 - add 11,11,29 - and 15,8,7 - add 11,11,10 - andc 6,9,7 - rotlwi 7,7,30 - or 15,15,6 - add 11,11,15 - lwz 31,60(4) - add 10,0,9 - rotlwi 9,11,5 - add 10,10,30 - and 15,7,12 - add 10,10,9 - andc 6,8,12 - rotlwi 12,12,30 - or 15,15,6 - add 10,10,15 - add 9,0,8 - rotlwi 8,10,5 - xor 16,16,18 - add 9,9,31 - and 15,12,11 - xor 16,16,24 - add 9,9,8 - andc 6,7,11 - rotlwi 11,11,30 - or 15,15,6 - xor 16,16,29 - add 9,9,15 - rotlwi 16,16,1 - add 8,0,7 - rotlwi 7,9,5 - xor 17,17,19 - add 8,8,16 - and 15,11,10 - xor 17,17,25 - add 8,8,7 - andc 6,12,10 - rotlwi 10,10,30 - or 15,15,6 - xor 17,17,30 - add 8,8,15 - rotlwi 17,17,1 - add 7,0,12 - rotlwi 12,8,5 - xor 18,18,20 - add 7,7,17 - and 15,10,9 - xor 18,18,26 - add 7,7,12 - andc 6,11,9 - rotlwi 9,9,30 - or 15,15,6 - xor 18,18,31 - add 7,7,15 - rotlwi 18,18,1 - add 12,0,11 - rotlwi 11,7,5 - xor 19,19,21 - add 12,12,18 - and 15,9,8 - xor 19,19,27 - add 12,12,11 - andc 6,10,8 - rotlwi 8,8,30 - or 15,15,6 - xor 19,19,16 - add 12,12,15 - rotlwi 19,19,1 - add 11,0,10 - rotlwi 10,12,5 - xor 20,20,22 - add 11,11,19 - and 15,8,7 - xor 20,20,28 - add 11,11,10 - andc 6,9,7 - rotlwi 7,7,30 - or 15,15,6 - xor 20,20,17 - add 11,11,15 - rotlwi 20,20,1 - lis 0,0x6ed9 - ori 0,0,0xeba1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 21,21,23 - add 10,10,20 - xor 15,15,7 - xor 21,21,29 - add 10,10,15 - rotlwi 12,12,30 - xor 21,21,18 - add 10,10,9 - rotlwi 21,21,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 22,22,24 - add 9,9,21 - xor 15,15,12 - xor 22,22,30 - add 9,9,15 - rotlwi 11,11,30 - xor 22,22,19 - add 9,9,8 - rotlwi 22,22,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 23,23,25 - add 8,8,22 - xor 15,15,11 - xor 23,23,31 - add 8,8,15 - rotlwi 10,10,30 - xor 23,23,20 - add 8,8,7 - rotlwi 23,23,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 24,24,26 - add 7,7,23 - xor 15,15,10 - xor 24,24,16 - add 7,7,15 - rotlwi 9,9,30 - xor 24,24,21 - add 7,7,12 - rotlwi 24,24,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 25,25,27 - add 12,12,24 - xor 15,15,9 - xor 25,25,17 - add 12,12,15 - rotlwi 8,8,30 - xor 25,25,22 - add 12,12,11 - rotlwi 25,25,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 26,26,28 - add 11,11,25 - xor 15,15,8 - xor 26,26,18 - add 11,11,15 - rotlwi 7,7,30 - xor 26,26,23 - add 11,11,10 - rotlwi 26,26,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 27,27,29 - add 10,10,26 - xor 15,15,7 - xor 27,27,19 - add 10,10,15 - rotlwi 12,12,30 - xor 27,27,24 - add 10,10,9 - rotlwi 27,27,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 28,28,30 - add 9,9,27 - xor 15,15,12 - xor 28,28,20 - add 9,9,15 - rotlwi 11,11,30 - xor 28,28,25 - add 9,9,8 - rotlwi 28,28,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 29,29,31 - add 8,8,28 - xor 15,15,11 - xor 29,29,21 - add 8,8,15 - rotlwi 10,10,30 - xor 29,29,26 - add 8,8,7 - rotlwi 29,29,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 30,30,16 - add 7,7,29 - xor 15,15,10 - xor 30,30,22 - add 7,7,15 - rotlwi 9,9,30 - xor 30,30,27 - add 7,7,12 - rotlwi 30,30,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 31,31,17 - add 12,12,30 - xor 15,15,9 - xor 31,31,23 - add 12,12,15 - rotlwi 8,8,30 - xor 31,31,28 - add 12,12,11 - rotlwi 31,31,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 16,16,18 - add 11,11,31 - xor 15,15,8 - xor 16,16,24 - add 11,11,15 - rotlwi 7,7,30 - xor 16,16,29 - add 11,11,10 - rotlwi 16,16,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 17,17,19 - add 10,10,16 - xor 15,15,7 - xor 17,17,25 - add 10,10,15 - rotlwi 12,12,30 - xor 17,17,30 - add 10,10,9 - rotlwi 17,17,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 18,18,20 - add 9,9,17 - xor 15,15,12 - xor 18,18,26 - add 9,9,15 - rotlwi 11,11,30 - xor 18,18,31 - add 9,9,8 - rotlwi 18,18,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 19,19,21 - add 8,8,18 - xor 15,15,11 - xor 19,19,27 - add 8,8,15 - rotlwi 10,10,30 - xor 19,19,16 - add 8,8,7 - rotlwi 19,19,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 20,20,22 - add 7,7,19 - xor 15,15,10 - xor 20,20,28 - add 7,7,15 - rotlwi 9,9,30 - xor 20,20,17 - add 7,7,12 - rotlwi 20,20,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 21,21,23 - add 12,12,20 - xor 15,15,9 - xor 21,21,29 - add 12,12,15 - rotlwi 8,8,30 - xor 21,21,18 - add 12,12,11 - rotlwi 21,21,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 22,22,24 - add 11,11,21 - xor 15,15,8 - xor 22,22,30 - add 11,11,15 - rotlwi 7,7,30 - xor 22,22,19 - add 11,11,10 - rotlwi 22,22,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 23,23,25 - add 10,10,22 - xor 15,15,7 - xor 23,23,31 - add 10,10,15 - rotlwi 12,12,30 - xor 23,23,20 - add 10,10,9 - rotlwi 23,23,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 24,24,26 - add 9,9,23 - xor 15,15,12 - xor 24,24,16 - add 9,9,15 - rotlwi 11,11,30 - xor 24,24,21 - add 9,9,8 - rotlwi 24,24,1 - lis 0,0x8f1b - ori 0,0,0xbcdc - add 8,0,7 - rotlwi 7,9,5 - xor 25,25,27 - add 8,8,24 - and 15,10,11 - xor 25,25,17 - add 8,8,7 - or 6,10,11 - rotlwi 10,10,30 - xor 25,25,22 - and 6,6,12 - or 15,15,6 - rotlwi 25,25,1 - add 8,8,15 - add 7,0,12 - rotlwi 12,8,5 - xor 26,26,28 - add 7,7,25 - and 15,9,10 - xor 26,26,18 - add 7,7,12 - or 6,9,10 - rotlwi 9,9,30 - xor 26,26,23 - and 6,6,11 - or 15,15,6 - rotlwi 26,26,1 - add 7,7,15 - add 12,0,11 - rotlwi 11,7,5 - xor 27,27,29 - add 12,12,26 - and 15,8,9 - xor 27,27,19 - add 12,12,11 - or 6,8,9 - rotlwi 8,8,30 - xor 27,27,24 - and 6,6,10 - or 15,15,6 - rotlwi 27,27,1 - add 12,12,15 - add 11,0,10 - rotlwi 10,12,5 - xor 28,28,30 - add 11,11,27 - and 15,7,8 - xor 28,28,20 - add 11,11,10 - or 6,7,8 - rotlwi 7,7,30 - xor 28,28,25 - and 6,6,9 - or 15,15,6 - rotlwi 28,28,1 - add 11,11,15 - add 10,0,9 - rotlwi 9,11,5 - xor 29,29,31 - add 10,10,28 - and 15,12,7 - xor 29,29,21 - add 10,10,9 - or 6,12,7 - rotlwi 12,12,30 - xor 29,29,26 - and 6,6,8 - or 15,15,6 - rotlwi 29,29,1 - add 10,10,15 - add 9,0,8 - rotlwi 8,10,5 - xor 30,30,16 - add 9,9,29 - and 15,11,12 - xor 30,30,22 - add 9,9,8 - or 6,11,12 - rotlwi 11,11,30 - xor 30,30,27 - and 6,6,7 - or 15,15,6 - rotlwi 30,30,1 - add 9,9,15 - add 8,0,7 - rotlwi 7,9,5 - xor 31,31,17 - add 8,8,30 - and 15,10,11 - xor 31,31,23 - add 8,8,7 - or 6,10,11 - rotlwi 10,10,30 - xor 31,31,28 - and 6,6,12 - or 15,15,6 - rotlwi 31,31,1 - add 8,8,15 - add 7,0,12 - rotlwi 12,8,5 - xor 16,16,18 - add 7,7,31 - and 15,9,10 - xor 16,16,24 - add 7,7,12 - or 6,9,10 - rotlwi 9,9,30 - xor 16,16,29 - and 6,6,11 - or 15,15,6 - rotlwi 16,16,1 - add 7,7,15 - add 12,0,11 - rotlwi 11,7,5 - xor 17,17,19 - add 12,12,16 - and 15,8,9 - xor 17,17,25 - add 12,12,11 - or 6,8,9 - rotlwi 8,8,30 - xor 17,17,30 - and 6,6,10 - or 15,15,6 - rotlwi 17,17,1 - add 12,12,15 - add 11,0,10 - rotlwi 10,12,5 - xor 18,18,20 - add 11,11,17 - and 15,7,8 - xor 18,18,26 - add 11,11,10 - or 6,7,8 - rotlwi 7,7,30 - xor 18,18,31 - and 6,6,9 - or 15,15,6 - rotlwi 18,18,1 - add 11,11,15 - add 10,0,9 - rotlwi 9,11,5 - xor 19,19,21 - add 10,10,18 - and 15,12,7 - xor 19,19,27 - add 10,10,9 - or 6,12,7 - rotlwi 12,12,30 - xor 19,19,16 - and 6,6,8 - or 15,15,6 - rotlwi 19,19,1 - add 10,10,15 - add 9,0,8 - rotlwi 8,10,5 - xor 20,20,22 - add 9,9,19 - and 15,11,12 - xor 20,20,28 - add 9,9,8 - or 6,11,12 - rotlwi 11,11,30 - xor 20,20,17 - and 6,6,7 - or 15,15,6 - rotlwi 20,20,1 - add 9,9,15 - add 8,0,7 - rotlwi 7,9,5 - xor 21,21,23 - add 8,8,20 - and 15,10,11 - xor 21,21,29 - add 8,8,7 - or 6,10,11 - rotlwi 10,10,30 - xor 21,21,18 - and 6,6,12 - or 15,15,6 - rotlwi 21,21,1 - add 8,8,15 - add 7,0,12 - rotlwi 12,8,5 - xor 22,22,24 - add 7,7,21 - and 15,9,10 - xor 22,22,30 - add 7,7,12 - or 6,9,10 - rotlwi 9,9,30 - xor 22,22,19 - and 6,6,11 - or 15,15,6 - rotlwi 22,22,1 - add 7,7,15 - add 12,0,11 - rotlwi 11,7,5 - xor 23,23,25 - add 12,12,22 - and 15,8,9 - xor 23,23,31 - add 12,12,11 - or 6,8,9 - rotlwi 8,8,30 - xor 23,23,20 - and 6,6,10 - or 15,15,6 - rotlwi 23,23,1 - add 12,12,15 - add 11,0,10 - rotlwi 10,12,5 - xor 24,24,26 - add 11,11,23 - and 15,7,8 - xor 24,24,16 - add 11,11,10 - or 6,7,8 - rotlwi 7,7,30 - xor 24,24,21 - and 6,6,9 - or 15,15,6 - rotlwi 24,24,1 - add 11,11,15 - add 10,0,9 - rotlwi 9,11,5 - xor 25,25,27 - add 10,10,24 - and 15,12,7 - xor 25,25,17 - add 10,10,9 - or 6,12,7 - rotlwi 12,12,30 - xor 25,25,22 - and 6,6,8 - or 15,15,6 - rotlwi 25,25,1 - add 10,10,15 - add 9,0,8 - rotlwi 8,10,5 - xor 26,26,28 - add 9,9,25 - and 15,11,12 - xor 26,26,18 - add 9,9,8 - or 6,11,12 - rotlwi 11,11,30 - xor 26,26,23 - and 6,6,7 - or 15,15,6 - rotlwi 26,26,1 - add 9,9,15 - add 8,0,7 - rotlwi 7,9,5 - xor 27,27,29 - add 8,8,26 - and 15,10,11 - xor 27,27,19 - add 8,8,7 - or 6,10,11 - rotlwi 10,10,30 - xor 27,27,24 - and 6,6,12 - or 15,15,6 - rotlwi 27,27,1 - add 8,8,15 - add 7,0,12 - rotlwi 12,8,5 - xor 28,28,30 - add 7,7,27 - and 15,9,10 - xor 28,28,20 - add 7,7,12 - or 6,9,10 - rotlwi 9,9,30 - xor 28,28,25 - and 6,6,11 - or 15,15,6 - rotlwi 28,28,1 - add 7,7,15 - lis 0,0xca62 - ori 0,0,0xc1d6 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 29,29,31 - add 12,12,28 - xor 15,15,9 - xor 29,29,21 - add 12,12,15 - rotlwi 8,8,30 - xor 29,29,26 - add 12,12,11 - rotlwi 29,29,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 30,30,16 - add 11,11,29 - xor 15,15,8 - xor 30,30,22 - add 11,11,15 - rotlwi 7,7,30 - xor 30,30,27 - add 11,11,10 - rotlwi 30,30,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 31,31,17 - add 10,10,30 - xor 15,15,7 - xor 31,31,23 - add 10,10,15 - rotlwi 12,12,30 - xor 31,31,28 - add 10,10,9 - rotlwi 31,31,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 16,16,18 - add 9,9,31 - xor 15,15,12 - xor 16,16,24 - add 9,9,15 - rotlwi 11,11,30 - xor 16,16,29 - add 9,9,8 - rotlwi 16,16,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 17,17,19 - add 8,8,16 - xor 15,15,11 - xor 17,17,25 - add 8,8,15 - rotlwi 10,10,30 - xor 17,17,30 - add 8,8,7 - rotlwi 17,17,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 18,18,20 - add 7,7,17 - xor 15,15,10 - xor 18,18,26 - add 7,7,15 - rotlwi 9,9,30 - xor 18,18,31 - add 7,7,12 - rotlwi 18,18,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 19,19,21 - add 12,12,18 - xor 15,15,9 - xor 19,19,27 - add 12,12,15 - rotlwi 8,8,30 - xor 19,19,16 - add 12,12,11 - rotlwi 19,19,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 20,20,22 - add 11,11,19 - xor 15,15,8 - xor 20,20,28 - add 11,11,15 - rotlwi 7,7,30 - xor 20,20,17 - add 11,11,10 - rotlwi 20,20,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 21,21,23 - add 10,10,20 - xor 15,15,7 - xor 21,21,29 - add 10,10,15 - rotlwi 12,12,30 - xor 21,21,18 - add 10,10,9 - rotlwi 21,21,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 22,22,24 - add 9,9,21 - xor 15,15,12 - xor 22,22,30 - add 9,9,15 - rotlwi 11,11,30 - xor 22,22,19 - add 9,9,8 - rotlwi 22,22,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 23,23,25 - add 8,8,22 - xor 15,15,11 - xor 23,23,31 - add 8,8,15 - rotlwi 10,10,30 - xor 23,23,20 - add 8,8,7 - rotlwi 23,23,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 24,24,26 - add 7,7,23 - xor 15,15,10 - xor 24,24,16 - add 7,7,15 - rotlwi 9,9,30 - xor 24,24,21 - add 7,7,12 - rotlwi 24,24,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 25,25,27 - add 12,12,24 - xor 15,15,9 - xor 25,25,17 - add 12,12,15 - rotlwi 8,8,30 - xor 25,25,22 - add 12,12,11 - rotlwi 25,25,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 26,26,28 - add 11,11,25 - xor 15,15,8 - xor 26,26,18 - add 11,11,15 - rotlwi 7,7,30 - xor 26,26,23 - add 11,11,10 - rotlwi 26,26,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 27,27,29 - add 10,10,26 - xor 15,15,7 - xor 27,27,19 - add 10,10,15 - rotlwi 12,12,30 - xor 27,27,24 - add 10,10,9 - rotlwi 27,27,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 28,28,30 - add 9,9,27 - xor 15,15,12 - xor 28,28,20 - add 9,9,15 - rotlwi 11,11,30 - xor 28,28,25 - add 9,9,8 - rotlwi 28,28,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 29,29,31 - add 8,8,28 - xor 15,15,11 - xor 29,29,21 - add 8,8,15 - rotlwi 10,10,30 - xor 29,29,26 - add 8,8,7 - rotlwi 29,29,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 30,30,16 - add 7,7,29 - xor 15,15,10 - xor 30,30,22 - add 7,7,15 - rotlwi 9,9,30 - xor 30,30,27 - add 7,7,12 - rotlwi 30,30,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 31,31,17 - add 12,12,30 - xor 15,15,9 - xor 31,31,23 - add 12,12,15 - rotlwi 8,8,30 - xor 31,31,28 - add 12,12,11 - rotlwi 31,31,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - lwz 16,0(3) - add 11,11,31 - xor 15,15,8 - lwz 17,4(3) - add 11,11,15 - rotlwi 7,7,30 - lwz 18,8(3) - lwz 19,12(3) - add 11,11,10 - lwz 20,16(3) - add 16,16,11 - add 17,17,12 - add 18,18,7 - add 19,19,8 - add 20,20,9 - stw 16,0(3) - mr 7,16 - stw 17,4(3) - mr 8,17 - stw 18,8(3) - mr 9,18 - stw 19,12(3) - mr 10,19 - stw 20,16(3) - mr 11,20 - addi 4,4,64 - bdnz .Lsha1_block_private - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size sha1_block_data_order,.-sha1_block_data_order -.byte 83,72,65,49,32,98,108,111,99,107,32,116,114,97,110,115,102,111,114,109,32,102,111,114,32,80,80,67,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,102,121,46,99,104,97,108,109,101,114,115,46,115,101,62,0 -.align 2 diff --git a/sys/crypto/openssl/powerpc64/sha256-ppc.S b/sys/crypto/openssl/powerpc64/sha256-ppc.S deleted file mode 100644 index a1bb3092fee..00000000000 --- a/sys/crypto/openssl/powerpc64/sha256-ppc.S +++ /dev/null @@ -1,1324 +0,0 @@ -/* Do not modify. This file is auto-generated from sha512-ppc.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl sha256_block_ppc -.type sha256_block_ppc,@function -.align 6 -sha256_block_ppc: -.localentry sha256_block_ppc,0 - - stdu 1,-320(1) - mflr 0 - sldi 5,5,6 - - std 3,144(1) - - std 14,176(1) - std 15,184(1) - std 16,192(1) - std 17,200(1) - std 18,208(1) - std 19,216(1) - std 20,224(1) - std 21,232(1) - std 22,240(1) - std 23,248(1) - std 24,256(1) - std 25,264(1) - std 26,272(1) - std 27,280(1) - std 28,288(1) - std 29,296(1) - std 30,304(1) - std 31,312(1) - std 0,336(1) - lwz 8,0(3) - mr 31,4 - lwz 9,4(3) - lwz 10,8(3) - lwz 11,12(3) - lwz 12,16(3) - lwz 6,20(3) - lwz 14,24(3) - lwz 15,28(3) - bl .LPICmeup -.LPICedup: - andi. 0,31,3 - bne .Lunaligned -.Laligned: - add 5,31,5 - std 5,128(1) - std 31,136(1) - bl .Lsha2_block_private - b .Ldone - - - - - - - -.align 4 -.Lunaligned: - subfic 0,31,4096 - andi. 0,0,4032 - beq .Lcross_page - cmpld 5,0 - ble .Laligned - subfc 5,0,5 - add 0,31,0 - std 5,120(1) - std 0,128(1) - std 31,136(1) - bl .Lsha2_block_private - - ld 5,120(1) -.Lcross_page: - li 0,16 - mtctr 0 - addi 20,1,48 -.Lmemcpy: - lbz 16,0(31) - lbz 17,1(31) - lbz 18,2(31) - lbz 19,3(31) - addi 31,31,4 - stb 16,0(20) - stb 17,1(20) - stb 18,2(20) - stb 19,3(20) - addi 20,20,4 - bdnz .Lmemcpy - std 31,112(1) - addi 0,1,112 - addi 31,1,48 - std 5,120(1) - std 0,128(1) - std 31,136(1) - bl .Lsha2_block_private - ld 31,112(1) - ld 5,120(1) - addic. 5,5,-64 - bne .Lunaligned - -.Ldone: - ld 0,336(1) - ld 14,176(1) - ld 15,184(1) - ld 16,192(1) - ld 17,200(1) - ld 18,208(1) - ld 19,216(1) - ld 20,224(1) - ld 21,232(1) - ld 22,240(1) - ld 23,248(1) - ld 24,256(1) - ld 25,264(1) - ld 26,272(1) - ld 27,280(1) - ld 28,288(1) - ld 29,296(1) - ld 30,304(1) - ld 31,312(1) - mtlr 0 - addi 1,1,320 - blr -.long 0 -.byte 0,12,4,1,0x80,18,3,0 -.long 0 -.align 4 -.Lsha2_block_private: - lwz 0,0(7) - lwz 16,0(31) - rotrwi 3,12,6 - rotrwi 4,12,11 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrwi 4,4,14 - or 5,5,0 - add 15,15,16 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrwi 3,8,2 - rotrwi 4,8,13 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - lwz 0,4(7) - add 15,15,3 - add 15,15,5 - - lwz 17,4(31) - rotrwi 3,11,6 - rotrwi 4,11,11 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrwi 4,4,14 - or 5,5,0 - add 14,14,17 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrwi 3,15,2 - rotrwi 4,15,13 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - lwz 0,8(7) - add 14,14,3 - add 14,14,5 - - lwz 18,8(31) - rotrwi 3,10,6 - rotrwi 4,10,11 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrwi 4,4,14 - or 5,5,0 - add 6,6,18 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrwi 3,14,2 - rotrwi 4,14,13 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - lwz 0,12(7) - add 6,6,3 - add 6,6,5 - - lwz 19,12(31) - rotrwi 3,9,6 - rotrwi 4,9,11 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrwi 4,4,14 - or 5,5,0 - add 12,12,19 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrwi 3,6,2 - rotrwi 4,6,13 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - lwz 0,16(7) - add 12,12,3 - add 12,12,5 - - lwz 20,16(31) - rotrwi 3,8,6 - rotrwi 4,8,11 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrwi 4,4,14 - or 5,5,0 - add 11,11,20 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrwi 3,12,2 - rotrwi 4,12,13 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - lwz 0,20(7) - add 11,11,3 - add 11,11,5 - - lwz 21,20(31) - rotrwi 3,15,6 - rotrwi 4,15,11 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrwi 4,4,14 - or 5,5,0 - add 10,10,21 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrwi 3,11,2 - rotrwi 4,11,13 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - lwz 0,24(7) - add 10,10,3 - add 10,10,5 - - lwz 22,24(31) - rotrwi 3,14,6 - rotrwi 4,14,11 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrwi 4,4,14 - or 5,5,0 - add 9,9,22 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrwi 3,10,2 - rotrwi 4,10,13 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - lwz 0,28(7) - add 9,9,3 - add 9,9,5 - - lwz 23,28(31) - rotrwi 3,6,6 - rotrwi 4,6,11 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrwi 4,4,14 - or 5,5,0 - add 8,8,23 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrwi 3,9,2 - rotrwi 4,9,13 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - lwz 0,32(7) - add 8,8,3 - add 8,8,5 - - lwz 24,32(31) - rotrwi 3,12,6 - rotrwi 4,12,11 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrwi 4,4,14 - or 5,5,0 - add 15,15,24 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrwi 3,8,2 - rotrwi 4,8,13 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - lwz 0,36(7) - add 15,15,3 - add 15,15,5 - - lwz 25,36(31) - rotrwi 3,11,6 - rotrwi 4,11,11 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrwi 4,4,14 - or 5,5,0 - add 14,14,25 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrwi 3,15,2 - rotrwi 4,15,13 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - lwz 0,40(7) - add 14,14,3 - add 14,14,5 - - lwz 26,40(31) - rotrwi 3,10,6 - rotrwi 4,10,11 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrwi 4,4,14 - or 5,5,0 - add 6,6,26 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrwi 3,14,2 - rotrwi 4,14,13 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - lwz 0,44(7) - add 6,6,3 - add 6,6,5 - - lwz 27,44(31) - rotrwi 3,9,6 - rotrwi 4,9,11 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrwi 4,4,14 - or 5,5,0 - add 12,12,27 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrwi 3,6,2 - rotrwi 4,6,13 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - lwz 0,48(7) - add 12,12,3 - add 12,12,5 - - lwz 28,48(31) - rotrwi 3,8,6 - rotrwi 4,8,11 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrwi 4,4,14 - or 5,5,0 - add 11,11,28 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrwi 3,12,2 - rotrwi 4,12,13 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - lwz 0,52(7) - add 11,11,3 - add 11,11,5 - - lwz 29,52(31) - rotrwi 3,15,6 - rotrwi 4,15,11 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrwi 4,4,14 - or 5,5,0 - add 10,10,29 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrwi 3,11,2 - rotrwi 4,11,13 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - lwz 0,56(7) - add 10,10,3 - add 10,10,5 - - lwz 30,56(31) - rotrwi 3,14,6 - rotrwi 4,14,11 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrwi 4,4,14 - or 5,5,0 - add 9,9,30 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrwi 3,10,2 - rotrwi 4,10,13 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - lwz 0,60(7) - add 9,9,3 - add 9,9,5 - - lwz 31,60(31) - rotrwi 3,6,6 - rotrwi 4,6,11 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrwi 4,4,14 - or 5,5,0 - add 8,8,31 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrwi 3,9,2 - rotrwi 4,9,13 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - add 8,8,3 - add 8,8,5 - - li 5,3 - mtctr 5 -.align 4 -.Lrounds: - addi 7,7,64 - rotrwi 3,17,7 - rotrwi 4,17,18 - rotrwi 5,30,17 - rotrwi 0,30,19 - xor 3,3,4 - srwi 4,17,3 - xor 5,5,0 - srwi 0,30,10 - add 16,16,25 - xor 3,3,4 - xor 5,5,0 - lwz 0,0(7) - add 16,16,3 - add 16,16,5 - rotrwi 3,12,6 - rotrwi 4,12,11 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrwi 4,4,14 - or 5,5,0 - add 15,15,16 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrwi 3,8,2 - rotrwi 4,8,13 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - add 15,15,3 - add 15,15,5 - - rotrwi 3,18,7 - rotrwi 4,18,18 - rotrwi 5,31,17 - rotrwi 0,31,19 - xor 3,3,4 - srwi 4,18,3 - xor 5,5,0 - srwi 0,31,10 - add 17,17,26 - xor 3,3,4 - xor 5,5,0 - lwz 0,4(7) - add 17,17,3 - add 17,17,5 - rotrwi 3,11,6 - rotrwi 4,11,11 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrwi 4,4,14 - or 5,5,0 - add 14,14,17 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrwi 3,15,2 - rotrwi 4,15,13 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - add 14,14,3 - add 14,14,5 - - rotrwi 3,19,7 - rotrwi 4,19,18 - rotrwi 5,16,17 - rotrwi 0,16,19 - xor 3,3,4 - srwi 4,19,3 - xor 5,5,0 - srwi 0,16,10 - add 18,18,27 - xor 3,3,4 - xor 5,5,0 - lwz 0,8(7) - add 18,18,3 - add 18,18,5 - rotrwi 3,10,6 - rotrwi 4,10,11 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrwi 4,4,14 - or 5,5,0 - add 6,6,18 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrwi 3,14,2 - rotrwi 4,14,13 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - add 6,6,3 - add 6,6,5 - - rotrwi 3,20,7 - rotrwi 4,20,18 - rotrwi 5,17,17 - rotrwi 0,17,19 - xor 3,3,4 - srwi 4,20,3 - xor 5,5,0 - srwi 0,17,10 - add 19,19,28 - xor 3,3,4 - xor 5,5,0 - lwz 0,12(7) - add 19,19,3 - add 19,19,5 - rotrwi 3,9,6 - rotrwi 4,9,11 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrwi 4,4,14 - or 5,5,0 - add 12,12,19 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrwi 3,6,2 - rotrwi 4,6,13 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - add 12,12,3 - add 12,12,5 - - rotrwi 3,21,7 - rotrwi 4,21,18 - rotrwi 5,18,17 - rotrwi 0,18,19 - xor 3,3,4 - srwi 4,21,3 - xor 5,5,0 - srwi 0,18,10 - add 20,20,29 - xor 3,3,4 - xor 5,5,0 - lwz 0,16(7) - add 20,20,3 - add 20,20,5 - rotrwi 3,8,6 - rotrwi 4,8,11 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrwi 4,4,14 - or 5,5,0 - add 11,11,20 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrwi 3,12,2 - rotrwi 4,12,13 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - add 11,11,3 - add 11,11,5 - - rotrwi 3,22,7 - rotrwi 4,22,18 - rotrwi 5,19,17 - rotrwi 0,19,19 - xor 3,3,4 - srwi 4,22,3 - xor 5,5,0 - srwi 0,19,10 - add 21,21,30 - xor 3,3,4 - xor 5,5,0 - lwz 0,20(7) - add 21,21,3 - add 21,21,5 - rotrwi 3,15,6 - rotrwi 4,15,11 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrwi 4,4,14 - or 5,5,0 - add 10,10,21 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrwi 3,11,2 - rotrwi 4,11,13 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - add 10,10,3 - add 10,10,5 - - rotrwi 3,23,7 - rotrwi 4,23,18 - rotrwi 5,20,17 - rotrwi 0,20,19 - xor 3,3,4 - srwi 4,23,3 - xor 5,5,0 - srwi 0,20,10 - add 22,22,31 - xor 3,3,4 - xor 5,5,0 - lwz 0,24(7) - add 22,22,3 - add 22,22,5 - rotrwi 3,14,6 - rotrwi 4,14,11 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrwi 4,4,14 - or 5,5,0 - add 9,9,22 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrwi 3,10,2 - rotrwi 4,10,13 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - add 9,9,3 - add 9,9,5 - - rotrwi 3,24,7 - rotrwi 4,24,18 - rotrwi 5,21,17 - rotrwi 0,21,19 - xor 3,3,4 - srwi 4,24,3 - xor 5,5,0 - srwi 0,21,10 - add 23,23,16 - xor 3,3,4 - xor 5,5,0 - lwz 0,28(7) - add 23,23,3 - add 23,23,5 - rotrwi 3,6,6 - rotrwi 4,6,11 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrwi 4,4,14 - or 5,5,0 - add 8,8,23 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrwi 3,9,2 - rotrwi 4,9,13 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - add 8,8,3 - add 8,8,5 - - rotrwi 3,25,7 - rotrwi 4,25,18 - rotrwi 5,22,17 - rotrwi 0,22,19 - xor 3,3,4 - srwi 4,25,3 - xor 5,5,0 - srwi 0,22,10 - add 24,24,17 - xor 3,3,4 - xor 5,5,0 - lwz 0,32(7) - add 24,24,3 - add 24,24,5 - rotrwi 3,12,6 - rotrwi 4,12,11 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrwi 4,4,14 - or 5,5,0 - add 15,15,24 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrwi 3,8,2 - rotrwi 4,8,13 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - add 15,15,3 - add 15,15,5 - - rotrwi 3,26,7 - rotrwi 4,26,18 - rotrwi 5,23,17 - rotrwi 0,23,19 - xor 3,3,4 - srwi 4,26,3 - xor 5,5,0 - srwi 0,23,10 - add 25,25,18 - xor 3,3,4 - xor 5,5,0 - lwz 0,36(7) - add 25,25,3 - add 25,25,5 - rotrwi 3,11,6 - rotrwi 4,11,11 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrwi 4,4,14 - or 5,5,0 - add 14,14,25 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrwi 3,15,2 - rotrwi 4,15,13 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - add 14,14,3 - add 14,14,5 - - rotrwi 3,27,7 - rotrwi 4,27,18 - rotrwi 5,24,17 - rotrwi 0,24,19 - xor 3,3,4 - srwi 4,27,3 - xor 5,5,0 - srwi 0,24,10 - add 26,26,19 - xor 3,3,4 - xor 5,5,0 - lwz 0,40(7) - add 26,26,3 - add 26,26,5 - rotrwi 3,10,6 - rotrwi 4,10,11 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrwi 4,4,14 - or 5,5,0 - add 6,6,26 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrwi 3,14,2 - rotrwi 4,14,13 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - add 6,6,3 - add 6,6,5 - - rotrwi 3,28,7 - rotrwi 4,28,18 - rotrwi 5,25,17 - rotrwi 0,25,19 - xor 3,3,4 - srwi 4,28,3 - xor 5,5,0 - srwi 0,25,10 - add 27,27,20 - xor 3,3,4 - xor 5,5,0 - lwz 0,44(7) - add 27,27,3 - add 27,27,5 - rotrwi 3,9,6 - rotrwi 4,9,11 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrwi 4,4,14 - or 5,5,0 - add 12,12,27 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrwi 3,6,2 - rotrwi 4,6,13 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - add 12,12,3 - add 12,12,5 - - rotrwi 3,29,7 - rotrwi 4,29,18 - rotrwi 5,26,17 - rotrwi 0,26,19 - xor 3,3,4 - srwi 4,29,3 - xor 5,5,0 - srwi 0,26,10 - add 28,28,21 - xor 3,3,4 - xor 5,5,0 - lwz 0,48(7) - add 28,28,3 - add 28,28,5 - rotrwi 3,8,6 - rotrwi 4,8,11 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrwi 4,4,14 - or 5,5,0 - add 11,11,28 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrwi 3,12,2 - rotrwi 4,12,13 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - add 11,11,3 - add 11,11,5 - - rotrwi 3,30,7 - rotrwi 4,30,18 - rotrwi 5,27,17 - rotrwi 0,27,19 - xor 3,3,4 - srwi 4,30,3 - xor 5,5,0 - srwi 0,27,10 - add 29,29,22 - xor 3,3,4 - xor 5,5,0 - lwz 0,52(7) - add 29,29,3 - add 29,29,5 - rotrwi 3,15,6 - rotrwi 4,15,11 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrwi 4,4,14 - or 5,5,0 - add 10,10,29 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrwi 3,11,2 - rotrwi 4,11,13 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - add 10,10,3 - add 10,10,5 - - rotrwi 3,31,7 - rotrwi 4,31,18 - rotrwi 5,28,17 - rotrwi 0,28,19 - xor 3,3,4 - srwi 4,31,3 - xor 5,5,0 - srwi 0,28,10 - add 30,30,23 - xor 3,3,4 - xor 5,5,0 - lwz 0,56(7) - add 30,30,3 - add 30,30,5 - rotrwi 3,14,6 - rotrwi 4,14,11 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrwi 4,4,14 - or 5,5,0 - add 9,9,30 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrwi 3,10,2 - rotrwi 4,10,13 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - add 9,9,3 - add 9,9,5 - - rotrwi 3,16,7 - rotrwi 4,16,18 - rotrwi 5,29,17 - rotrwi 0,29,19 - xor 3,3,4 - srwi 4,16,3 - xor 5,5,0 - srwi 0,29,10 - add 31,31,24 - xor 3,3,4 - xor 5,5,0 - lwz 0,60(7) - add 31,31,3 - add 31,31,5 - rotrwi 3,6,6 - rotrwi 4,6,11 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrwi 4,4,14 - or 5,5,0 - add 8,8,31 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrwi 3,9,2 - rotrwi 4,9,13 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - add 8,8,3 - add 8,8,5 - - bdnz .Lrounds - - ld 3,144(1) - ld 31,136(1) - ld 5,128(1) - subi 7,7,192 - - lwz 16,0(3) - lwz 17,4(3) - lwz 18,8(3) - lwz 19,12(3) - lwz 20,16(3) - lwz 21,20(3) - lwz 22,24(3) - addi 31,31,64 - lwz 23,28(3) - add 8,8,16 - add 9,9,17 - std 31,136(1) - add 10,10,18 - stw 8,0(3) - add 11,11,19 - stw 9,4(3) - add 12,12,20 - stw 10,8(3) - add 6,6,21 - stw 11,12(3) - add 14,14,22 - stw 12,16(3) - add 15,15,23 - stw 6,20(3) - stw 14,24(3) - cmpld 31,5 - stw 15,28(3) - bne .Lsha2_block_private - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size sha256_block_ppc,.-sha256_block_ppc -.align 6 -.LPICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 7 - addi 7,7,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.long 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5 -.long 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5 -.long 0xd807aa98,0x12835b01,0x243185be,0x550c7dc3 -.long 0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174 -.long 0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc -.long 0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da -.long 0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7 -.long 0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967 -.long 0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13 -.long 0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85 -.long 0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3 -.long 0xd192e819,0xd6990624,0xf40e3585,0x106aa070 -.long 0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5 -.long 0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3 -.long 0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208 -.long 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2 diff --git a/sys/crypto/openssl/powerpc64/sha256p8-ppc.S b/sys/crypto/openssl/powerpc64/sha256p8-ppc.S deleted file mode 100644 index f13adffb034..00000000000 --- a/sys/crypto/openssl/powerpc64/sha256p8-ppc.S +++ /dev/null @@ -1,738 +0,0 @@ -/* Do not modify. This file is auto-generated from sha512p8-ppc.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl sha256_block_p8 -.type sha256_block_p8,@function -.align 6 -sha256_block_p8: -.localentry sha256_block_p8,0 - - stdu 1,-384(1) - mflr 8 - li 10,207 - li 11,223 - stvx 24,10,1 - addi 10,10,32 - li 12,-1 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - li 11,-4096+255 - stw 12,332(1) - li 10,0x10 - std 26,336(1) - li 26,0x20 - std 27,344(1) - li 27,0x30 - std 28,352(1) - li 28,0x40 - std 29,360(1) - li 29,0x50 - std 30,368(1) - li 30,0x60 - std 31,376(1) - li 31,0x70 - std 8,400(1) - or 11,11,11 - - bl .LPICmeup - addi 11,1,79 - .long 0x7C001E19 - .long 0x7C8A1E19 - vsldoi 1,0,0,4 - vsldoi 2,0,0,8 - vsldoi 3,0,0,12 - vsldoi 5,4,4,4 - vsldoi 6,4,4,8 - vsldoi 7,4,4,12 - li 0,3 - b .Loop -.align 5 -.Loop: - lvx 28,0,6 - .long 0x7D002699 - addi 4,4,16 - mr 7,6 - stvx 0,0,11 - stvx 1,10,11 - stvx 2,26,11 - stvx 3,27,11 - stvx 4,28,11 - stvx 5,29,11 - stvx 6,30,11 - stvx 7,31,11 - vadduwm 7,7,28 - lvx 28,10,6 - vadduwm 7,7,8 - vsel 29,6,5,4 - vadduwm 6,6,28 - vadduwm 7,7,29 - .long 0x13C4FE82 - vadduwm 7,7,30 - vxor 29,0,1 - vsel 29,1,2,29 - vadduwm 3,3,7 - .long 0x13C08682 - vadduwm 30,30,29 - vadduwm 7,7,30 - lvx 28,26,7 - vsldoi 9,8,8,4 - vadduwm 6,6,9 - vsel 29,5,4,3 - vadduwm 5,5,28 - vadduwm 6,6,29 - .long 0x13C3FE82 - vadduwm 6,6,30 - vxor 29,7,0 - vsel 29,0,1,29 - vadduwm 2,2,6 - .long 0x13C78682 - vadduwm 30,30,29 - vadduwm 6,6,30 - lvx 28,27,7 - vsldoi 10,9,9,4 - vadduwm 5,5,10 - vsel 29,4,3,2 - vadduwm 4,4,28 - vadduwm 5,5,29 - .long 0x13C2FE82 - vadduwm 5,5,30 - vxor 29,6,7 - vsel 29,7,0,29 - vadduwm 1,1,5 - .long 0x13C68682 - vadduwm 30,30,29 - vadduwm 5,5,30 - lvx 28,28,7 - .long 0x7D802699 - addi 4,4,16 - vsldoi 11,10,10,4 - vadduwm 4,4,11 - vsel 29,3,2,1 - vadduwm 3,3,28 - vadduwm 4,4,29 - .long 0x13C1FE82 - vadduwm 4,4,30 - vxor 29,5,6 - vsel 29,6,7,29 - vadduwm 0,0,4 - .long 0x13C58682 - vadduwm 30,30,29 - vadduwm 4,4,30 - lvx 28,29,7 - vadduwm 3,3,12 - vsel 29,2,1,0 - vadduwm 2,2,28 - vadduwm 3,3,29 - .long 0x13C0FE82 - vadduwm 3,3,30 - vxor 29,4,5 - vsel 29,5,6,29 - vadduwm 7,7,3 - .long 0x13C48682 - vadduwm 30,30,29 - vadduwm 3,3,30 - lvx 28,30,7 - vsldoi 13,12,12,4 - vadduwm 2,2,13 - vsel 29,1,0,7 - vadduwm 1,1,28 - vadduwm 2,2,29 - .long 0x13C7FE82 - vadduwm 2,2,30 - vxor 29,3,4 - vsel 29,4,5,29 - vadduwm 6,6,2 - .long 0x13C38682 - vadduwm 30,30,29 - vadduwm 2,2,30 - lvx 28,31,7 - addi 7,7,0x80 - vsldoi 14,13,13,4 - vadduwm 1,1,14 - vsel 29,0,7,6 - vadduwm 0,0,28 - vadduwm 1,1,29 - .long 0x13C6FE82 - vadduwm 1,1,30 - vxor 29,2,3 - vsel 29,3,4,29 - vadduwm 5,5,1 - .long 0x13C28682 - vadduwm 30,30,29 - vadduwm 1,1,30 - lvx 28,0,7 - .long 0x7E002699 - addi 4,4,16 - vsldoi 15,14,14,4 - vadduwm 0,0,15 - vsel 29,7,6,5 - vadduwm 7,7,28 - vadduwm 0,0,29 - .long 0x13C5FE82 - vadduwm 0,0,30 - vxor 29,1,2 - vsel 29,2,3,29 - vadduwm 4,4,0 - .long 0x13C18682 - vadduwm 30,30,29 - vadduwm 0,0,30 - lvx 28,10,7 - vadduwm 7,7,16 - vsel 29,6,5,4 - vadduwm 6,6,28 - vadduwm 7,7,29 - .long 0x13C4FE82 - vadduwm 7,7,30 - vxor 29,0,1 - vsel 29,1,2,29 - vadduwm 3,3,7 - .long 0x13C08682 - vadduwm 30,30,29 - vadduwm 7,7,30 - lvx 28,26,7 - vsldoi 17,16,16,4 - vadduwm 6,6,17 - vsel 29,5,4,3 - vadduwm 5,5,28 - vadduwm 6,6,29 - .long 0x13C3FE82 - vadduwm 6,6,30 - vxor 29,7,0 - vsel 29,0,1,29 - vadduwm 2,2,6 - .long 0x13C78682 - vadduwm 30,30,29 - vadduwm 6,6,30 - lvx 28,27,7 - vsldoi 18,17,17,4 - vadduwm 5,5,18 - vsel 29,4,3,2 - vadduwm 4,4,28 - vadduwm 5,5,29 - .long 0x13C2FE82 - vadduwm 5,5,30 - vxor 29,6,7 - vsel 29,7,0,29 - vadduwm 1,1,5 - .long 0x13C68682 - vadduwm 30,30,29 - vadduwm 5,5,30 - lvx 28,28,7 - .long 0x7F002699 - addi 4,4,16 - vsldoi 19,18,18,4 - vadduwm 4,4,19 - vsel 29,3,2,1 - vadduwm 3,3,28 - vadduwm 4,4,29 - .long 0x13C1FE82 - vadduwm 4,4,30 - vxor 29,5,6 - vsel 29,6,7,29 - vadduwm 0,0,4 - .long 0x13C58682 - vadduwm 30,30,29 - vadduwm 4,4,30 - lvx 28,29,7 - vadduwm 3,3,24 - vsel 29,2,1,0 - vadduwm 2,2,28 - vadduwm 3,3,29 - .long 0x13C0FE82 - vadduwm 3,3,30 - vxor 29,4,5 - vsel 29,5,6,29 - vadduwm 7,7,3 - .long 0x13C48682 - vadduwm 30,30,29 - vadduwm 3,3,30 - lvx 28,30,7 - vsldoi 25,24,24,4 - vadduwm 2,2,25 - vsel 29,1,0,7 - vadduwm 1,1,28 - vadduwm 2,2,29 - .long 0x13C7FE82 - vadduwm 2,2,30 - vxor 29,3,4 - vsel 29,4,5,29 - vadduwm 6,6,2 - .long 0x13C38682 - vadduwm 30,30,29 - vadduwm 2,2,30 - lvx 28,31,7 - addi 7,7,0x80 - vsldoi 26,25,25,4 - vadduwm 1,1,26 - vsel 29,0,7,6 - vadduwm 0,0,28 - vadduwm 1,1,29 - .long 0x13C6FE82 - vadduwm 1,1,30 - vxor 29,2,3 - vsel 29,3,4,29 - vadduwm 5,5,1 - .long 0x13C28682 - vadduwm 30,30,29 - vadduwm 1,1,30 - lvx 28,0,7 - vsldoi 27,26,26,4 - .long 0x13C90682 - vadduwm 8,8,30 - .long 0x13DA7E82 - vadduwm 8,8,30 - vadduwm 8,8,17 - vadduwm 0,0,27 - vsel 29,7,6,5 - vadduwm 7,7,28 - vadduwm 0,0,29 - .long 0x13C5FE82 - vadduwm 0,0,30 - vxor 29,1,2 - vsel 29,2,3,29 - vadduwm 4,4,0 - .long 0x13C18682 - vadduwm 30,30,29 - vadduwm 0,0,30 - lvx 28,10,7 - mtctr 0 - b .L16_xx -.align 5 -.L16_xx: - .long 0x13CA0682 - vadduwm 9,9,30 - .long 0x13DB7E82 - vadduwm 9,9,30 - vadduwm 9,9,18 - vadduwm 7,7,8 - vsel 29,6,5,4 - vadduwm 6,6,28 - vadduwm 7,7,29 - .long 0x13C4FE82 - vadduwm 7,7,30 - vxor 29,0,1 - vsel 29,1,2,29 - vadduwm 3,3,7 - .long 0x13C08682 - vadduwm 30,30,29 - vadduwm 7,7,30 - lvx 28,26,7 - .long 0x13CB0682 - vadduwm 10,10,30 - .long 0x13C87E82 - vadduwm 10,10,30 - vadduwm 10,10,19 - vadduwm 6,6,9 - vsel 29,5,4,3 - vadduwm 5,5,28 - vadduwm 6,6,29 - .long 0x13C3FE82 - vadduwm 6,6,30 - vxor 29,7,0 - vsel 29,0,1,29 - vadduwm 2,2,6 - .long 0x13C78682 - vadduwm 30,30,29 - vadduwm 6,6,30 - lvx 28,27,7 - .long 0x13CC0682 - vadduwm 11,11,30 - .long 0x13C97E82 - vadduwm 11,11,30 - vadduwm 11,11,24 - vadduwm 5,5,10 - vsel 29,4,3,2 - vadduwm 4,4,28 - vadduwm 5,5,29 - .long 0x13C2FE82 - vadduwm 5,5,30 - vxor 29,6,7 - vsel 29,7,0,29 - vadduwm 1,1,5 - .long 0x13C68682 - vadduwm 30,30,29 - vadduwm 5,5,30 - lvx 28,28,7 - .long 0x13CD0682 - vadduwm 12,12,30 - .long 0x13CA7E82 - vadduwm 12,12,30 - vadduwm 12,12,25 - vadduwm 4,4,11 - vsel 29,3,2,1 - vadduwm 3,3,28 - vadduwm 4,4,29 - .long 0x13C1FE82 - vadduwm 4,4,30 - vxor 29,5,6 - vsel 29,6,7,29 - vadduwm 0,0,4 - .long 0x13C58682 - vadduwm 30,30,29 - vadduwm 4,4,30 - lvx 28,29,7 - .long 0x13CE0682 - vadduwm 13,13,30 - .long 0x13CB7E82 - vadduwm 13,13,30 - vadduwm 13,13,26 - vadduwm 3,3,12 - vsel 29,2,1,0 - vadduwm 2,2,28 - vadduwm 3,3,29 - .long 0x13C0FE82 - vadduwm 3,3,30 - vxor 29,4,5 - vsel 29,5,6,29 - vadduwm 7,7,3 - .long 0x13C48682 - vadduwm 30,30,29 - vadduwm 3,3,30 - lvx 28,30,7 - .long 0x13CF0682 - vadduwm 14,14,30 - .long 0x13CC7E82 - vadduwm 14,14,30 - vadduwm 14,14,27 - vadduwm 2,2,13 - vsel 29,1,0,7 - vadduwm 1,1,28 - vadduwm 2,2,29 - .long 0x13C7FE82 - vadduwm 2,2,30 - vxor 29,3,4 - vsel 29,4,5,29 - vadduwm 6,6,2 - .long 0x13C38682 - vadduwm 30,30,29 - vadduwm 2,2,30 - lvx 28,31,7 - addi 7,7,0x80 - .long 0x13D00682 - vadduwm 15,15,30 - .long 0x13CD7E82 - vadduwm 15,15,30 - vadduwm 15,15,8 - vadduwm 1,1,14 - vsel 29,0,7,6 - vadduwm 0,0,28 - vadduwm 1,1,29 - .long 0x13C6FE82 - vadduwm 1,1,30 - vxor 29,2,3 - vsel 29,3,4,29 - vadduwm 5,5,1 - .long 0x13C28682 - vadduwm 30,30,29 - vadduwm 1,1,30 - lvx 28,0,7 - .long 0x13D10682 - vadduwm 16,16,30 - .long 0x13CE7E82 - vadduwm 16,16,30 - vadduwm 16,16,9 - vadduwm 0,0,15 - vsel 29,7,6,5 - vadduwm 7,7,28 - vadduwm 0,0,29 - .long 0x13C5FE82 - vadduwm 0,0,30 - vxor 29,1,2 - vsel 29,2,3,29 - vadduwm 4,4,0 - .long 0x13C18682 - vadduwm 30,30,29 - vadduwm 0,0,30 - lvx 28,10,7 - .long 0x13D20682 - vadduwm 17,17,30 - .long 0x13CF7E82 - vadduwm 17,17,30 - vadduwm 17,17,10 - vadduwm 7,7,16 - vsel 29,6,5,4 - vadduwm 6,6,28 - vadduwm 7,7,29 - .long 0x13C4FE82 - vadduwm 7,7,30 - vxor 29,0,1 - vsel 29,1,2,29 - vadduwm 3,3,7 - .long 0x13C08682 - vadduwm 30,30,29 - vadduwm 7,7,30 - lvx 28,26,7 - .long 0x13D30682 - vadduwm 18,18,30 - .long 0x13D07E82 - vadduwm 18,18,30 - vadduwm 18,18,11 - vadduwm 6,6,17 - vsel 29,5,4,3 - vadduwm 5,5,28 - vadduwm 6,6,29 - .long 0x13C3FE82 - vadduwm 6,6,30 - vxor 29,7,0 - vsel 29,0,1,29 - vadduwm 2,2,6 - .long 0x13C78682 - vadduwm 30,30,29 - vadduwm 6,6,30 - lvx 28,27,7 - .long 0x13D80682 - vadduwm 19,19,30 - .long 0x13D17E82 - vadduwm 19,19,30 - vadduwm 19,19,12 - vadduwm 5,5,18 - vsel 29,4,3,2 - vadduwm 4,4,28 - vadduwm 5,5,29 - .long 0x13C2FE82 - vadduwm 5,5,30 - vxor 29,6,7 - vsel 29,7,0,29 - vadduwm 1,1,5 - .long 0x13C68682 - vadduwm 30,30,29 - vadduwm 5,5,30 - lvx 28,28,7 - .long 0x13D90682 - vadduwm 24,24,30 - .long 0x13D27E82 - vadduwm 24,24,30 - vadduwm 24,24,13 - vadduwm 4,4,19 - vsel 29,3,2,1 - vadduwm 3,3,28 - vadduwm 4,4,29 - .long 0x13C1FE82 - vadduwm 4,4,30 - vxor 29,5,6 - vsel 29,6,7,29 - vadduwm 0,0,4 - .long 0x13C58682 - vadduwm 30,30,29 - vadduwm 4,4,30 - lvx 28,29,7 - .long 0x13DA0682 - vadduwm 25,25,30 - .long 0x13D37E82 - vadduwm 25,25,30 - vadduwm 25,25,14 - vadduwm 3,3,24 - vsel 29,2,1,0 - vadduwm 2,2,28 - vadduwm 3,3,29 - .long 0x13C0FE82 - vadduwm 3,3,30 - vxor 29,4,5 - vsel 29,5,6,29 - vadduwm 7,7,3 - .long 0x13C48682 - vadduwm 30,30,29 - vadduwm 3,3,30 - lvx 28,30,7 - .long 0x13DB0682 - vadduwm 26,26,30 - .long 0x13D87E82 - vadduwm 26,26,30 - vadduwm 26,26,15 - vadduwm 2,2,25 - vsel 29,1,0,7 - vadduwm 1,1,28 - vadduwm 2,2,29 - .long 0x13C7FE82 - vadduwm 2,2,30 - vxor 29,3,4 - vsel 29,4,5,29 - vadduwm 6,6,2 - .long 0x13C38682 - vadduwm 30,30,29 - vadduwm 2,2,30 - lvx 28,31,7 - addi 7,7,0x80 - .long 0x13C80682 - vadduwm 27,27,30 - .long 0x13D97E82 - vadduwm 27,27,30 - vadduwm 27,27,16 - vadduwm 1,1,26 - vsel 29,0,7,6 - vadduwm 0,0,28 - vadduwm 1,1,29 - .long 0x13C6FE82 - vadduwm 1,1,30 - vxor 29,2,3 - vsel 29,3,4,29 - vadduwm 5,5,1 - .long 0x13C28682 - vadduwm 30,30,29 - vadduwm 1,1,30 - lvx 28,0,7 - .long 0x13C90682 - vadduwm 8,8,30 - .long 0x13DA7E82 - vadduwm 8,8,30 - vadduwm 8,8,17 - vadduwm 0,0,27 - vsel 29,7,6,5 - vadduwm 7,7,28 - vadduwm 0,0,29 - .long 0x13C5FE82 - vadduwm 0,0,30 - vxor 29,1,2 - vsel 29,2,3,29 - vadduwm 4,4,0 - .long 0x13C18682 - vadduwm 30,30,29 - vadduwm 0,0,30 - lvx 28,10,7 - bdnz .L16_xx - - lvx 10,0,11 - subic. 5,5,1 - lvx 11,10,11 - vadduwm 0,0,10 - lvx 12,26,11 - vadduwm 1,1,11 - lvx 13,27,11 - vadduwm 2,2,12 - lvx 14,28,11 - vadduwm 3,3,13 - lvx 15,29,11 - vadduwm 4,4,14 - lvx 16,30,11 - vadduwm 5,5,15 - lvx 17,31,11 - vadduwm 6,6,16 - vadduwm 7,7,17 - bne .Loop - lvx 8,26,7 - vperm 0,0,1,28 - lvx 9,27,7 - vperm 4,4,5,28 - vperm 0,0,2,8 - vperm 4,4,6,8 - vperm 0,0,3,9 - vperm 4,4,7,9 - .long 0x7C001F19 - .long 0x7C8A1F19 - addi 11,1,207 - mtlr 8 - or 12,12,12 - lvx 24,0,11 - lvx 25,10,11 - lvx 26,26,11 - lvx 27,27,11 - lvx 28,28,11 - lvx 29,29,11 - lvx 30,30,11 - lvx 31,31,11 - ld 26,336(1) - ld 27,344(1) - ld 28,352(1) - ld 29,360(1) - ld 30,368(1) - ld 31,376(1) - addi 1,1,384 - blr -.long 0 -.byte 0,12,4,1,0x80,6,3,0 -.long 0 -.size sha256_block_p8,.-sha256_block_p8 -.align 6 -.LPICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 6 - addi 6,6,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.long 0x428a2f98,0x428a2f98,0x428a2f98,0x428a2f98 -.long 0x71374491,0x71374491,0x71374491,0x71374491 -.long 0xb5c0fbcf,0xb5c0fbcf,0xb5c0fbcf,0xb5c0fbcf -.long 0xe9b5dba5,0xe9b5dba5,0xe9b5dba5,0xe9b5dba5 -.long 0x3956c25b,0x3956c25b,0x3956c25b,0x3956c25b -.long 0x59f111f1,0x59f111f1,0x59f111f1,0x59f111f1 -.long 0x923f82a4,0x923f82a4,0x923f82a4,0x923f82a4 -.long 0xab1c5ed5,0xab1c5ed5,0xab1c5ed5,0xab1c5ed5 -.long 0xd807aa98,0xd807aa98,0xd807aa98,0xd807aa98 -.long 0x12835b01,0x12835b01,0x12835b01,0x12835b01 -.long 0x243185be,0x243185be,0x243185be,0x243185be -.long 0x550c7dc3,0x550c7dc3,0x550c7dc3,0x550c7dc3 -.long 0x72be5d74,0x72be5d74,0x72be5d74,0x72be5d74 -.long 0x80deb1fe,0x80deb1fe,0x80deb1fe,0x80deb1fe -.long 0x9bdc06a7,0x9bdc06a7,0x9bdc06a7,0x9bdc06a7 -.long 0xc19bf174,0xc19bf174,0xc19bf174,0xc19bf174 -.long 0xe49b69c1,0xe49b69c1,0xe49b69c1,0xe49b69c1 -.long 0xefbe4786,0xefbe4786,0xefbe4786,0xefbe4786 -.long 0x0fc19dc6,0x0fc19dc6,0x0fc19dc6,0x0fc19dc6 -.long 0x240ca1cc,0x240ca1cc,0x240ca1cc,0x240ca1cc -.long 0x2de92c6f,0x2de92c6f,0x2de92c6f,0x2de92c6f -.long 0x4a7484aa,0x4a7484aa,0x4a7484aa,0x4a7484aa -.long 0x5cb0a9dc,0x5cb0a9dc,0x5cb0a9dc,0x5cb0a9dc -.long 0x76f988da,0x76f988da,0x76f988da,0x76f988da -.long 0x983e5152,0x983e5152,0x983e5152,0x983e5152 -.long 0xa831c66d,0xa831c66d,0xa831c66d,0xa831c66d -.long 0xb00327c8,0xb00327c8,0xb00327c8,0xb00327c8 -.long 0xbf597fc7,0xbf597fc7,0xbf597fc7,0xbf597fc7 -.long 0xc6e00bf3,0xc6e00bf3,0xc6e00bf3,0xc6e00bf3 -.long 0xd5a79147,0xd5a79147,0xd5a79147,0xd5a79147 -.long 0x06ca6351,0x06ca6351,0x06ca6351,0x06ca6351 -.long 0x14292967,0x14292967,0x14292967,0x14292967 -.long 0x27b70a85,0x27b70a85,0x27b70a85,0x27b70a85 -.long 0x2e1b2138,0x2e1b2138,0x2e1b2138,0x2e1b2138 -.long 0x4d2c6dfc,0x4d2c6dfc,0x4d2c6dfc,0x4d2c6dfc -.long 0x53380d13,0x53380d13,0x53380d13,0x53380d13 -.long 0x650a7354,0x650a7354,0x650a7354,0x650a7354 -.long 0x766a0abb,0x766a0abb,0x766a0abb,0x766a0abb -.long 0x81c2c92e,0x81c2c92e,0x81c2c92e,0x81c2c92e -.long 0x92722c85,0x92722c85,0x92722c85,0x92722c85 -.long 0xa2bfe8a1,0xa2bfe8a1,0xa2bfe8a1,0xa2bfe8a1 -.long 0xa81a664b,0xa81a664b,0xa81a664b,0xa81a664b -.long 0xc24b8b70,0xc24b8b70,0xc24b8b70,0xc24b8b70 -.long 0xc76c51a3,0xc76c51a3,0xc76c51a3,0xc76c51a3 -.long 0xd192e819,0xd192e819,0xd192e819,0xd192e819 -.long 0xd6990624,0xd6990624,0xd6990624,0xd6990624 -.long 0xf40e3585,0xf40e3585,0xf40e3585,0xf40e3585 -.long 0x106aa070,0x106aa070,0x106aa070,0x106aa070 -.long 0x19a4c116,0x19a4c116,0x19a4c116,0x19a4c116 -.long 0x1e376c08,0x1e376c08,0x1e376c08,0x1e376c08 -.long 0x2748774c,0x2748774c,0x2748774c,0x2748774c -.long 0x34b0bcb5,0x34b0bcb5,0x34b0bcb5,0x34b0bcb5 -.long 0x391c0cb3,0x391c0cb3,0x391c0cb3,0x391c0cb3 -.long 0x4ed8aa4a,0x4ed8aa4a,0x4ed8aa4a,0x4ed8aa4a -.long 0x5b9cca4f,0x5b9cca4f,0x5b9cca4f,0x5b9cca4f -.long 0x682e6ff3,0x682e6ff3,0x682e6ff3,0x682e6ff3 -.long 0x748f82ee,0x748f82ee,0x748f82ee,0x748f82ee -.long 0x78a5636f,0x78a5636f,0x78a5636f,0x78a5636f -.long 0x84c87814,0x84c87814,0x84c87814,0x84c87814 -.long 0x8cc70208,0x8cc70208,0x8cc70208,0x8cc70208 -.long 0x90befffa,0x90befffa,0x90befffa,0x90befffa -.long 0xa4506ceb,0xa4506ceb,0xa4506ceb,0xa4506ceb -.long 0xbef9a3f7,0xbef9a3f7,0xbef9a3f7,0xbef9a3f7 -.long 0xc67178f2,0xc67178f2,0xc67178f2,0xc67178f2 -.long 0,0,0,0 -.long 0x00010203,0x10111213,0x10111213,0x10111213 -.long 0x00010203,0x04050607,0x10111213,0x10111213 -.long 0x00010203,0x04050607,0x08090a0b,0x10111213 -.byte 83,72,65,50,53,54,32,102,111,114,32,80,111,119,101,114,73,83,65,32,50,46,48,55,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 2 diff --git a/sys/crypto/openssl/powerpc64/sha512-ppc.S b/sys/crypto/openssl/powerpc64/sha512-ppc.S deleted file mode 100644 index 5172aa90180..00000000000 --- a/sys/crypto/openssl/powerpc64/sha512-ppc.S +++ /dev/null @@ -1,1420 +0,0 @@ -/* Do not modify. This file is auto-generated from sha512-ppc.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl sha512_block_ppc -.type sha512_block_ppc,@function -.align 6 -sha512_block_ppc: -.localentry sha512_block_ppc,0 - - stdu 1,-384(1) - mflr 0 - sldi 5,5,7 - - std 3,208(1) - - std 14,240(1) - std 15,248(1) - std 16,256(1) - std 17,264(1) - std 18,272(1) - std 19,280(1) - std 20,288(1) - std 21,296(1) - std 22,304(1) - std 23,312(1) - std 24,320(1) - std 25,328(1) - std 26,336(1) - std 27,344(1) - std 28,352(1) - std 29,360(1) - std 30,368(1) - std 31,376(1) - std 0,400(1) - ld 8,0(3) - mr 31,4 - ld 9,8(3) - ld 10,16(3) - ld 11,24(3) - ld 12,32(3) - ld 6,40(3) - ld 14,48(3) - ld 15,56(3) - bl .LPICmeup -.LPICedup: - andi. 0,31,3 - bne .Lunaligned -.Laligned: - add 5,31,5 - std 5,192(1) - std 31,200(1) - bl .Lsha2_block_private - b .Ldone - - - - - - - -.align 4 -.Lunaligned: - subfic 0,31,4096 - andi. 0,0,3968 - beq .Lcross_page - cmpld 5,0 - ble .Laligned - subfc 5,0,5 - add 0,31,0 - std 5,184(1) - std 0,192(1) - std 31,200(1) - bl .Lsha2_block_private - - ld 5,184(1) -.Lcross_page: - li 0,32 - mtctr 0 - addi 20,1,48 -.Lmemcpy: - lbz 16,0(31) - lbz 17,1(31) - lbz 18,2(31) - lbz 19,3(31) - addi 31,31,4 - stb 16,0(20) - stb 17,1(20) - stb 18,2(20) - stb 19,3(20) - addi 20,20,4 - bdnz .Lmemcpy - std 31,176(1) - addi 0,1,176 - addi 31,1,48 - std 5,184(1) - std 0,192(1) - std 31,200(1) - bl .Lsha2_block_private - ld 31,176(1) - ld 5,184(1) - addic. 5,5,-128 - bne .Lunaligned - -.Ldone: - ld 0,400(1) - ld 14,240(1) - ld 15,248(1) - ld 16,256(1) - ld 17,264(1) - ld 18,272(1) - ld 19,280(1) - ld 20,288(1) - ld 21,296(1) - ld 22,304(1) - ld 23,312(1) - ld 24,320(1) - ld 25,328(1) - ld 26,336(1) - ld 27,344(1) - ld 28,352(1) - ld 29,360(1) - ld 30,368(1) - ld 31,376(1) - mtlr 0 - addi 1,1,384 - blr -.long 0 -.byte 0,12,4,1,0x80,18,3,0 -.long 0 -.align 4 -.Lsha2_block_private: - ld 0,0(7) - lwz 5,0(31) - lwz 16,4(31) - insrdi 16,5,32,0 - rotrdi 3,12,14 - rotrdi 4,12,18 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrdi 4,4,23 - or 5,5,0 - add 15,15,16 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrdi 3,8,28 - rotrdi 4,8,34 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - ld 0,8(7) - add 15,15,3 - add 15,15,5 - - lwz 5,8(31) - lwz 17,12(31) - insrdi 17,5,32,0 - rotrdi 3,11,14 - rotrdi 4,11,18 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrdi 4,4,23 - or 5,5,0 - add 14,14,17 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrdi 3,15,28 - rotrdi 4,15,34 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - ld 0,16(7) - add 14,14,3 - add 14,14,5 - - lwz 5,16(31) - lwz 18,20(31) - insrdi 18,5,32,0 - rotrdi 3,10,14 - rotrdi 4,10,18 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrdi 4,4,23 - or 5,5,0 - add 6,6,18 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrdi 3,14,28 - rotrdi 4,14,34 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - ld 0,24(7) - add 6,6,3 - add 6,6,5 - - lwz 5,24(31) - lwz 19,28(31) - insrdi 19,5,32,0 - rotrdi 3,9,14 - rotrdi 4,9,18 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrdi 4,4,23 - or 5,5,0 - add 12,12,19 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrdi 3,6,28 - rotrdi 4,6,34 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - ld 0,32(7) - add 12,12,3 - add 12,12,5 - - lwz 5,32(31) - lwz 20,36(31) - insrdi 20,5,32,0 - rotrdi 3,8,14 - rotrdi 4,8,18 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrdi 4,4,23 - or 5,5,0 - add 11,11,20 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrdi 3,12,28 - rotrdi 4,12,34 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - ld 0,40(7) - add 11,11,3 - add 11,11,5 - - lwz 5,40(31) - lwz 21,44(31) - insrdi 21,5,32,0 - rotrdi 3,15,14 - rotrdi 4,15,18 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrdi 4,4,23 - or 5,5,0 - add 10,10,21 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrdi 3,11,28 - rotrdi 4,11,34 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - ld 0,48(7) - add 10,10,3 - add 10,10,5 - - lwz 5,48(31) - lwz 22,52(31) - insrdi 22,5,32,0 - rotrdi 3,14,14 - rotrdi 4,14,18 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrdi 4,4,23 - or 5,5,0 - add 9,9,22 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrdi 3,10,28 - rotrdi 4,10,34 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - ld 0,56(7) - add 9,9,3 - add 9,9,5 - - lwz 5,56(31) - lwz 23,60(31) - insrdi 23,5,32,0 - rotrdi 3,6,14 - rotrdi 4,6,18 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrdi 4,4,23 - or 5,5,0 - add 8,8,23 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrdi 3,9,28 - rotrdi 4,9,34 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - ld 0,64(7) - add 8,8,3 - add 8,8,5 - - lwz 5,64(31) - lwz 24,68(31) - insrdi 24,5,32,0 - rotrdi 3,12,14 - rotrdi 4,12,18 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrdi 4,4,23 - or 5,5,0 - add 15,15,24 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrdi 3,8,28 - rotrdi 4,8,34 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - ld 0,72(7) - add 15,15,3 - add 15,15,5 - - lwz 5,72(31) - lwz 25,76(31) - insrdi 25,5,32,0 - rotrdi 3,11,14 - rotrdi 4,11,18 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrdi 4,4,23 - or 5,5,0 - add 14,14,25 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrdi 3,15,28 - rotrdi 4,15,34 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - ld 0,80(7) - add 14,14,3 - add 14,14,5 - - lwz 5,80(31) - lwz 26,84(31) - insrdi 26,5,32,0 - rotrdi 3,10,14 - rotrdi 4,10,18 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrdi 4,4,23 - or 5,5,0 - add 6,6,26 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrdi 3,14,28 - rotrdi 4,14,34 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - ld 0,88(7) - add 6,6,3 - add 6,6,5 - - lwz 5,88(31) - lwz 27,92(31) - insrdi 27,5,32,0 - rotrdi 3,9,14 - rotrdi 4,9,18 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrdi 4,4,23 - or 5,5,0 - add 12,12,27 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrdi 3,6,28 - rotrdi 4,6,34 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - ld 0,96(7) - add 12,12,3 - add 12,12,5 - - lwz 5,96(31) - lwz 28,100(31) - insrdi 28,5,32,0 - rotrdi 3,8,14 - rotrdi 4,8,18 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrdi 4,4,23 - or 5,5,0 - add 11,11,28 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrdi 3,12,28 - rotrdi 4,12,34 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - ld 0,104(7) - add 11,11,3 - add 11,11,5 - - lwz 5,104(31) - lwz 29,108(31) - insrdi 29,5,32,0 - rotrdi 3,15,14 - rotrdi 4,15,18 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrdi 4,4,23 - or 5,5,0 - add 10,10,29 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrdi 3,11,28 - rotrdi 4,11,34 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - ld 0,112(7) - add 10,10,3 - add 10,10,5 - - lwz 5,112(31) - lwz 30,116(31) - insrdi 30,5,32,0 - rotrdi 3,14,14 - rotrdi 4,14,18 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrdi 4,4,23 - or 5,5,0 - add 9,9,30 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrdi 3,10,28 - rotrdi 4,10,34 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - ld 0,120(7) - add 9,9,3 - add 9,9,5 - - lwz 5,120(31) - lwz 31,124(31) - insrdi 31,5,32,0 - rotrdi 3,6,14 - rotrdi 4,6,18 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrdi 4,4,23 - or 5,5,0 - add 8,8,31 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrdi 3,9,28 - rotrdi 4,9,34 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - add 8,8,3 - add 8,8,5 - - li 5,4 - mtctr 5 -.align 4 -.Lrounds: - addi 7,7,128 - rotrdi 3,17,1 - rotrdi 4,17,8 - rotrdi 5,30,19 - rotrdi 0,30,61 - xor 3,3,4 - srdi 4,17,7 - xor 5,5,0 - srdi 0,30,6 - add 16,16,25 - xor 3,3,4 - xor 5,5,0 - ld 0,0(7) - add 16,16,3 - add 16,16,5 - rotrdi 3,12,14 - rotrdi 4,12,18 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrdi 4,4,23 - or 5,5,0 - add 15,15,16 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrdi 3,8,28 - rotrdi 4,8,34 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - add 15,15,3 - add 15,15,5 - - rotrdi 3,18,1 - rotrdi 4,18,8 - rotrdi 5,31,19 - rotrdi 0,31,61 - xor 3,3,4 - srdi 4,18,7 - xor 5,5,0 - srdi 0,31,6 - add 17,17,26 - xor 3,3,4 - xor 5,5,0 - ld 0,8(7) - add 17,17,3 - add 17,17,5 - rotrdi 3,11,14 - rotrdi 4,11,18 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrdi 4,4,23 - or 5,5,0 - add 14,14,17 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrdi 3,15,28 - rotrdi 4,15,34 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - add 14,14,3 - add 14,14,5 - - rotrdi 3,19,1 - rotrdi 4,19,8 - rotrdi 5,16,19 - rotrdi 0,16,61 - xor 3,3,4 - srdi 4,19,7 - xor 5,5,0 - srdi 0,16,6 - add 18,18,27 - xor 3,3,4 - xor 5,5,0 - ld 0,16(7) - add 18,18,3 - add 18,18,5 - rotrdi 3,10,14 - rotrdi 4,10,18 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrdi 4,4,23 - or 5,5,0 - add 6,6,18 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrdi 3,14,28 - rotrdi 4,14,34 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - add 6,6,3 - add 6,6,5 - - rotrdi 3,20,1 - rotrdi 4,20,8 - rotrdi 5,17,19 - rotrdi 0,17,61 - xor 3,3,4 - srdi 4,20,7 - xor 5,5,0 - srdi 0,17,6 - add 19,19,28 - xor 3,3,4 - xor 5,5,0 - ld 0,24(7) - add 19,19,3 - add 19,19,5 - rotrdi 3,9,14 - rotrdi 4,9,18 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrdi 4,4,23 - or 5,5,0 - add 12,12,19 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrdi 3,6,28 - rotrdi 4,6,34 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - add 12,12,3 - add 12,12,5 - - rotrdi 3,21,1 - rotrdi 4,21,8 - rotrdi 5,18,19 - rotrdi 0,18,61 - xor 3,3,4 - srdi 4,21,7 - xor 5,5,0 - srdi 0,18,6 - add 20,20,29 - xor 3,3,4 - xor 5,5,0 - ld 0,32(7) - add 20,20,3 - add 20,20,5 - rotrdi 3,8,14 - rotrdi 4,8,18 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrdi 4,4,23 - or 5,5,0 - add 11,11,20 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrdi 3,12,28 - rotrdi 4,12,34 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - add 11,11,3 - add 11,11,5 - - rotrdi 3,22,1 - rotrdi 4,22,8 - rotrdi 5,19,19 - rotrdi 0,19,61 - xor 3,3,4 - srdi 4,22,7 - xor 5,5,0 - srdi 0,19,6 - add 21,21,30 - xor 3,3,4 - xor 5,5,0 - ld 0,40(7) - add 21,21,3 - add 21,21,5 - rotrdi 3,15,14 - rotrdi 4,15,18 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrdi 4,4,23 - or 5,5,0 - add 10,10,21 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrdi 3,11,28 - rotrdi 4,11,34 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - add 10,10,3 - add 10,10,5 - - rotrdi 3,23,1 - rotrdi 4,23,8 - rotrdi 5,20,19 - rotrdi 0,20,61 - xor 3,3,4 - srdi 4,23,7 - xor 5,5,0 - srdi 0,20,6 - add 22,22,31 - xor 3,3,4 - xor 5,5,0 - ld 0,48(7) - add 22,22,3 - add 22,22,5 - rotrdi 3,14,14 - rotrdi 4,14,18 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrdi 4,4,23 - or 5,5,0 - add 9,9,22 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrdi 3,10,28 - rotrdi 4,10,34 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - add 9,9,3 - add 9,9,5 - - rotrdi 3,24,1 - rotrdi 4,24,8 - rotrdi 5,21,19 - rotrdi 0,21,61 - xor 3,3,4 - srdi 4,24,7 - xor 5,5,0 - srdi 0,21,6 - add 23,23,16 - xor 3,3,4 - xor 5,5,0 - ld 0,56(7) - add 23,23,3 - add 23,23,5 - rotrdi 3,6,14 - rotrdi 4,6,18 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrdi 4,4,23 - or 5,5,0 - add 8,8,23 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrdi 3,9,28 - rotrdi 4,9,34 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - add 8,8,3 - add 8,8,5 - - rotrdi 3,25,1 - rotrdi 4,25,8 - rotrdi 5,22,19 - rotrdi 0,22,61 - xor 3,3,4 - srdi 4,25,7 - xor 5,5,0 - srdi 0,22,6 - add 24,24,17 - xor 3,3,4 - xor 5,5,0 - ld 0,64(7) - add 24,24,3 - add 24,24,5 - rotrdi 3,12,14 - rotrdi 4,12,18 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrdi 4,4,23 - or 5,5,0 - add 15,15,24 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrdi 3,8,28 - rotrdi 4,8,34 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - add 15,15,3 - add 15,15,5 - - rotrdi 3,26,1 - rotrdi 4,26,8 - rotrdi 5,23,19 - rotrdi 0,23,61 - xor 3,3,4 - srdi 4,26,7 - xor 5,5,0 - srdi 0,23,6 - add 25,25,18 - xor 3,3,4 - xor 5,5,0 - ld 0,72(7) - add 25,25,3 - add 25,25,5 - rotrdi 3,11,14 - rotrdi 4,11,18 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrdi 4,4,23 - or 5,5,0 - add 14,14,25 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrdi 3,15,28 - rotrdi 4,15,34 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - add 14,14,3 - add 14,14,5 - - rotrdi 3,27,1 - rotrdi 4,27,8 - rotrdi 5,24,19 - rotrdi 0,24,61 - xor 3,3,4 - srdi 4,27,7 - xor 5,5,0 - srdi 0,24,6 - add 26,26,19 - xor 3,3,4 - xor 5,5,0 - ld 0,80(7) - add 26,26,3 - add 26,26,5 - rotrdi 3,10,14 - rotrdi 4,10,18 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrdi 4,4,23 - or 5,5,0 - add 6,6,26 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrdi 3,14,28 - rotrdi 4,14,34 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - add 6,6,3 - add 6,6,5 - - rotrdi 3,28,1 - rotrdi 4,28,8 - rotrdi 5,25,19 - rotrdi 0,25,61 - xor 3,3,4 - srdi 4,28,7 - xor 5,5,0 - srdi 0,25,6 - add 27,27,20 - xor 3,3,4 - xor 5,5,0 - ld 0,88(7) - add 27,27,3 - add 27,27,5 - rotrdi 3,9,14 - rotrdi 4,9,18 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrdi 4,4,23 - or 5,5,0 - add 12,12,27 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrdi 3,6,28 - rotrdi 4,6,34 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - add 12,12,3 - add 12,12,5 - - rotrdi 3,29,1 - rotrdi 4,29,8 - rotrdi 5,26,19 - rotrdi 0,26,61 - xor 3,3,4 - srdi 4,29,7 - xor 5,5,0 - srdi 0,26,6 - add 28,28,21 - xor 3,3,4 - xor 5,5,0 - ld 0,96(7) - add 28,28,3 - add 28,28,5 - rotrdi 3,8,14 - rotrdi 4,8,18 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrdi 4,4,23 - or 5,5,0 - add 11,11,28 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrdi 3,12,28 - rotrdi 4,12,34 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - add 11,11,3 - add 11,11,5 - - rotrdi 3,30,1 - rotrdi 4,30,8 - rotrdi 5,27,19 - rotrdi 0,27,61 - xor 3,3,4 - srdi 4,30,7 - xor 5,5,0 - srdi 0,27,6 - add 29,29,22 - xor 3,3,4 - xor 5,5,0 - ld 0,104(7) - add 29,29,3 - add 29,29,5 - rotrdi 3,15,14 - rotrdi 4,15,18 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrdi 4,4,23 - or 5,5,0 - add 10,10,29 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrdi 3,11,28 - rotrdi 4,11,34 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - add 10,10,3 - add 10,10,5 - - rotrdi 3,31,1 - rotrdi 4,31,8 - rotrdi 5,28,19 - rotrdi 0,28,61 - xor 3,3,4 - srdi 4,31,7 - xor 5,5,0 - srdi 0,28,6 - add 30,30,23 - xor 3,3,4 - xor 5,5,0 - ld 0,112(7) - add 30,30,3 - add 30,30,5 - rotrdi 3,14,14 - rotrdi 4,14,18 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrdi 4,4,23 - or 5,5,0 - add 9,9,30 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrdi 3,10,28 - rotrdi 4,10,34 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - add 9,9,3 - add 9,9,5 - - rotrdi 3,16,1 - rotrdi 4,16,8 - rotrdi 5,29,19 - rotrdi 0,29,61 - xor 3,3,4 - srdi 4,16,7 - xor 5,5,0 - srdi 0,29,6 - add 31,31,24 - xor 3,3,4 - xor 5,5,0 - ld 0,120(7) - add 31,31,3 - add 31,31,5 - rotrdi 3,6,14 - rotrdi 4,6,18 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrdi 4,4,23 - or 5,5,0 - add 8,8,31 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrdi 3,9,28 - rotrdi 4,9,34 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - add 8,8,3 - add 8,8,5 - - bdnz .Lrounds - - ld 3,208(1) - ld 31,200(1) - ld 5,192(1) - subi 7,7,512 - - ld 16,0(3) - ld 17,8(3) - ld 18,16(3) - ld 19,24(3) - ld 20,32(3) - ld 21,40(3) - ld 22,48(3) - addi 31,31,128 - ld 23,56(3) - add 8,8,16 - add 9,9,17 - std 31,200(1) - add 10,10,18 - std 8,0(3) - add 11,11,19 - std 9,8(3) - add 12,12,20 - std 10,16(3) - add 6,6,21 - std 11,24(3) - add 14,14,22 - std 12,32(3) - add 15,15,23 - std 6,40(3) - std 14,48(3) - cmpld 31,5 - std 15,56(3) - bne .Lsha2_block_private - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size sha512_block_ppc,.-sha512_block_ppc -.align 6 -.LPICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 7 - addi 7,7,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.long 0x428a2f98,0xd728ae22 -.long 0x71374491,0x23ef65cd -.long 0xb5c0fbcf,0xec4d3b2f -.long 0xe9b5dba5,0x8189dbbc -.long 0x3956c25b,0xf348b538 -.long 0x59f111f1,0xb605d019 -.long 0x923f82a4,0xaf194f9b -.long 0xab1c5ed5,0xda6d8118 -.long 0xd807aa98,0xa3030242 -.long 0x12835b01,0x45706fbe -.long 0x243185be,0x4ee4b28c -.long 0x550c7dc3,0xd5ffb4e2 -.long 0x72be5d74,0xf27b896f -.long 0x80deb1fe,0x3b1696b1 -.long 0x9bdc06a7,0x25c71235 -.long 0xc19bf174,0xcf692694 -.long 0xe49b69c1,0x9ef14ad2 -.long 0xefbe4786,0x384f25e3 -.long 0x0fc19dc6,0x8b8cd5b5 -.long 0x240ca1cc,0x77ac9c65 -.long 0x2de92c6f,0x592b0275 -.long 0x4a7484aa,0x6ea6e483 -.long 0x5cb0a9dc,0xbd41fbd4 -.long 0x76f988da,0x831153b5 -.long 0x983e5152,0xee66dfab -.long 0xa831c66d,0x2db43210 -.long 0xb00327c8,0x98fb213f -.long 0xbf597fc7,0xbeef0ee4 -.long 0xc6e00bf3,0x3da88fc2 -.long 0xd5a79147,0x930aa725 -.long 0x06ca6351,0xe003826f -.long 0x14292967,0x0a0e6e70 -.long 0x27b70a85,0x46d22ffc -.long 0x2e1b2138,0x5c26c926 -.long 0x4d2c6dfc,0x5ac42aed -.long 0x53380d13,0x9d95b3df -.long 0x650a7354,0x8baf63de -.long 0x766a0abb,0x3c77b2a8 -.long 0x81c2c92e,0x47edaee6 -.long 0x92722c85,0x1482353b -.long 0xa2bfe8a1,0x4cf10364 -.long 0xa81a664b,0xbc423001 -.long 0xc24b8b70,0xd0f89791 -.long 0xc76c51a3,0x0654be30 -.long 0xd192e819,0xd6ef5218 -.long 0xd6990624,0x5565a910 -.long 0xf40e3585,0x5771202a -.long 0x106aa070,0x32bbd1b8 -.long 0x19a4c116,0xb8d2d0c8 -.long 0x1e376c08,0x5141ab53 -.long 0x2748774c,0xdf8eeb99 -.long 0x34b0bcb5,0xe19b48a8 -.long 0x391c0cb3,0xc5c95a63 -.long 0x4ed8aa4a,0xe3418acb -.long 0x5b9cca4f,0x7763e373 -.long 0x682e6ff3,0xd6b2b8a3 -.long 0x748f82ee,0x5defb2fc -.long 0x78a5636f,0x43172f60 -.long 0x84c87814,0xa1f0ab72 -.long 0x8cc70208,0x1a6439ec -.long 0x90befffa,0x23631e28 -.long 0xa4506ceb,0xde82bde9 -.long 0xbef9a3f7,0xb2c67915 -.long 0xc67178f2,0xe372532b -.long 0xca273ece,0xea26619c -.long 0xd186b8c7,0x21c0c207 -.long 0xeada7dd6,0xcde0eb1e -.long 0xf57d4f7f,0xee6ed178 -.long 0x06f067aa,0x72176fba -.long 0x0a637dc5,0xa2c898a6 -.long 0x113f9804,0xbef90dae -.long 0x1b710b35,0x131c471b -.long 0x28db77f5,0x23047d84 -.long 0x32caab7b,0x40c72493 -.long 0x3c9ebe0a,0x15c9bebc -.long 0x431d67c4,0x9c100d4c -.long 0x4cc5d4be,0xcb3e42b6 -.long 0x597f299c,0xfc657e2a -.long 0x5fcb6fab,0x3ad6faec -.long 0x6c44198c,0x4a475817 diff --git a/sys/crypto/openssl/powerpc64/sha512p8-ppc.S b/sys/crypto/openssl/powerpc64/sha512p8-ppc.S deleted file mode 100644 index ab9642de0a2..00000000000 --- a/sys/crypto/openssl/powerpc64/sha512p8-ppc.S +++ /dev/null @@ -1,836 +0,0 @@ -/* Do not modify. This file is auto-generated from sha512p8-ppc.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl sha512_block_p8 -.type sha512_block_p8,@function -.align 6 -sha512_block_p8: -.localentry sha512_block_p8,0 - - stdu 1,-384(1) - mflr 8 - li 10,207 - li 11,223 - stvx 24,10,1 - addi 10,10,32 - li 12,-1 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - li 11,-4096+255 - stw 12,332(1) - li 10,0x10 - std 26,336(1) - li 26,0x20 - std 27,344(1) - li 27,0x30 - std 28,352(1) - li 28,0x40 - std 29,360(1) - li 29,0x50 - std 30,368(1) - li 30,0x60 - std 31,376(1) - li 31,0x70 - std 8,400(1) - or 11,11,11 - - bl .LPICmeup - addi 11,1,79 - .long 0x7C001E99 - .long 0x7C4A1E99 - .long 0x7C9A1E99 - vsldoi 1,0,0,8 - .long 0x7CDB1E99 - vsldoi 3,2,2,8 - vsldoi 5,4,4,8 - vsldoi 7,6,6,8 - li 0,4 - b .Loop -.align 5 -.Loop: - lvx 28,0,6 - .long 0x7D002699 - addi 4,4,16 - mr 7,6 - stvx 0,0,11 - stvx 1,10,11 - stvx 2,26,11 - stvx 3,27,11 - stvx 4,28,11 - stvx 5,29,11 - stvx 6,30,11 - stvx 7,31,11 - .long 0x10E7E0C0 - lvx 28,10,6 - .long 0x10E740C0 - vsel 29,6,5,4 - .long 0x10C6E0C0 - .long 0x10E7E8C0 - .long 0x13C4FEC2 - .long 0x10E7F0C0 - vxor 29,0,1 - vsel 29,1,2,29 - .long 0x106338C0 - .long 0x13C086C2 - .long 0x13DEE8C0 - .long 0x10E7F0C0 - lvx 28,26,7 - .long 0x7D402699 - addi 4,4,16 - vsldoi 9,8,8,8 - .long 0x10C648C0 - vsel 29,5,4,3 - .long 0x10A5E0C0 - .long 0x10C6E8C0 - .long 0x13C3FEC2 - .long 0x10C6F0C0 - vxor 29,7,0 - vsel 29,0,1,29 - .long 0x104230C0 - .long 0x13C786C2 - .long 0x13DEE8C0 - .long 0x10C6F0C0 - lvx 28,27,7 - .long 0x10A550C0 - vsel 29,4,3,2 - .long 0x1084E0C0 - .long 0x10A5E8C0 - .long 0x13C2FEC2 - .long 0x10A5F0C0 - vxor 29,6,7 - vsel 29,7,0,29 - .long 0x102128C0 - .long 0x13C686C2 - .long 0x13DEE8C0 - .long 0x10A5F0C0 - lvx 28,28,7 - .long 0x7D802699 - addi 4,4,16 - vsldoi 11,10,10,8 - .long 0x108458C0 - vsel 29,3,2,1 - .long 0x1063E0C0 - .long 0x1084E8C0 - .long 0x13C1FEC2 - .long 0x1084F0C0 - vxor 29,5,6 - vsel 29,6,7,29 - .long 0x100020C0 - .long 0x13C586C2 - .long 0x13DEE8C0 - .long 0x1084F0C0 - lvx 28,29,7 - .long 0x106360C0 - vsel 29,2,1,0 - .long 0x1042E0C0 - .long 0x1063E8C0 - .long 0x13C0FEC2 - .long 0x1063F0C0 - vxor 29,4,5 - vsel 29,5,6,29 - .long 0x10E718C0 - .long 0x13C486C2 - .long 0x13DEE8C0 - .long 0x1063F0C0 - lvx 28,30,7 - .long 0x7DC02699 - addi 4,4,16 - vsldoi 13,12,12,8 - .long 0x104268C0 - vsel 29,1,0,7 - .long 0x1021E0C0 - .long 0x1042E8C0 - .long 0x13C7FEC2 - .long 0x1042F0C0 - vxor 29,3,4 - vsel 29,4,5,29 - .long 0x10C610C0 - .long 0x13C386C2 - .long 0x13DEE8C0 - .long 0x1042F0C0 - lvx 28,31,7 - addi 7,7,0x80 - .long 0x102170C0 - vsel 29,0,7,6 - .long 0x1000E0C0 - .long 0x1021E8C0 - .long 0x13C6FEC2 - .long 0x1021F0C0 - vxor 29,2,3 - vsel 29,3,4,29 - .long 0x10A508C0 - .long 0x13C286C2 - .long 0x13DEE8C0 - .long 0x1021F0C0 - lvx 28,0,7 - .long 0x7E002699 - addi 4,4,16 - vsldoi 15,14,14,8 - .long 0x100078C0 - vsel 29,7,6,5 - .long 0x10E7E0C0 - .long 0x1000E8C0 - .long 0x13C5FEC2 - .long 0x1000F0C0 - vxor 29,1,2 - vsel 29,2,3,29 - .long 0x108400C0 - .long 0x13C186C2 - .long 0x13DEE8C0 - .long 0x1000F0C0 - lvx 28,10,7 - .long 0x10E780C0 - vsel 29,6,5,4 - .long 0x10C6E0C0 - .long 0x10E7E8C0 - .long 0x13C4FEC2 - .long 0x10E7F0C0 - vxor 29,0,1 - vsel 29,1,2,29 - .long 0x106338C0 - .long 0x13C086C2 - .long 0x13DEE8C0 - .long 0x10E7F0C0 - lvx 28,26,7 - .long 0x7E402699 - addi 4,4,16 - vsldoi 17,16,16,8 - .long 0x10C688C0 - vsel 29,5,4,3 - .long 0x10A5E0C0 - .long 0x10C6E8C0 - .long 0x13C3FEC2 - .long 0x10C6F0C0 - vxor 29,7,0 - vsel 29,0,1,29 - .long 0x104230C0 - .long 0x13C786C2 - .long 0x13DEE8C0 - .long 0x10C6F0C0 - lvx 28,27,7 - .long 0x10A590C0 - vsel 29,4,3,2 - .long 0x1084E0C0 - .long 0x10A5E8C0 - .long 0x13C2FEC2 - .long 0x10A5F0C0 - vxor 29,6,7 - vsel 29,7,0,29 - .long 0x102128C0 - .long 0x13C686C2 - .long 0x13DEE8C0 - .long 0x10A5F0C0 - lvx 28,28,7 - .long 0x7F002699 - addi 4,4,16 - vsldoi 19,18,18,8 - .long 0x108498C0 - vsel 29,3,2,1 - .long 0x1063E0C0 - .long 0x1084E8C0 - .long 0x13C1FEC2 - .long 0x1084F0C0 - vxor 29,5,6 - vsel 29,6,7,29 - .long 0x100020C0 - .long 0x13C586C2 - .long 0x13DEE8C0 - .long 0x1084F0C0 - lvx 28,29,7 - .long 0x1063C0C0 - vsel 29,2,1,0 - .long 0x1042E0C0 - .long 0x1063E8C0 - .long 0x13C0FEC2 - .long 0x1063F0C0 - vxor 29,4,5 - vsel 29,5,6,29 - .long 0x10E718C0 - .long 0x13C486C2 - .long 0x13DEE8C0 - .long 0x1063F0C0 - lvx 28,30,7 - .long 0x7F402699 - addi 4,4,16 - vsldoi 25,24,24,8 - .long 0x1042C8C0 - vsel 29,1,0,7 - .long 0x1021E0C0 - .long 0x1042E8C0 - .long 0x13C7FEC2 - .long 0x1042F0C0 - vxor 29,3,4 - vsel 29,4,5,29 - .long 0x10C610C0 - .long 0x13C386C2 - .long 0x13DEE8C0 - .long 0x1042F0C0 - lvx 28,31,7 - addi 7,7,0x80 - .long 0x1021D0C0 - vsel 29,0,7,6 - .long 0x1000E0C0 - .long 0x1021E8C0 - .long 0x13C6FEC2 - .long 0x1021F0C0 - vxor 29,2,3 - vsel 29,3,4,29 - .long 0x10A508C0 - .long 0x13C286C2 - .long 0x13DEE8C0 - .long 0x1021F0C0 - lvx 28,0,7 - vsldoi 27,26,26,8 - .long 0x13C906C2 - .long 0x1108F0C0 - .long 0x13DA7EC2 - .long 0x1108F0C0 - .long 0x110888C0 - .long 0x1000D8C0 - vsel 29,7,6,5 - .long 0x10E7E0C0 - .long 0x1000E8C0 - .long 0x13C5FEC2 - .long 0x1000F0C0 - vxor 29,1,2 - vsel 29,2,3,29 - .long 0x108400C0 - .long 0x13C186C2 - .long 0x13DEE8C0 - .long 0x1000F0C0 - lvx 28,10,7 - mtctr 0 - b .L16_xx -.align 5 -.L16_xx: - .long 0x13CA06C2 - .long 0x1129F0C0 - .long 0x13DB7EC2 - .long 0x1129F0C0 - .long 0x112990C0 - .long 0x10E740C0 - vsel 29,6,5,4 - .long 0x10C6E0C0 - .long 0x10E7E8C0 - .long 0x13C4FEC2 - .long 0x10E7F0C0 - vxor 29,0,1 - vsel 29,1,2,29 - .long 0x106338C0 - .long 0x13C086C2 - .long 0x13DEE8C0 - .long 0x10E7F0C0 - lvx 28,26,7 - .long 0x13CB06C2 - .long 0x114AF0C0 - .long 0x13C87EC2 - .long 0x114AF0C0 - .long 0x114A98C0 - .long 0x10C648C0 - vsel 29,5,4,3 - .long 0x10A5E0C0 - .long 0x10C6E8C0 - .long 0x13C3FEC2 - .long 0x10C6F0C0 - vxor 29,7,0 - vsel 29,0,1,29 - .long 0x104230C0 - .long 0x13C786C2 - .long 0x13DEE8C0 - .long 0x10C6F0C0 - lvx 28,27,7 - .long 0x13CC06C2 - .long 0x116BF0C0 - .long 0x13C97EC2 - .long 0x116BF0C0 - .long 0x116BC0C0 - .long 0x10A550C0 - vsel 29,4,3,2 - .long 0x1084E0C0 - .long 0x10A5E8C0 - .long 0x13C2FEC2 - .long 0x10A5F0C0 - vxor 29,6,7 - vsel 29,7,0,29 - .long 0x102128C0 - .long 0x13C686C2 - .long 0x13DEE8C0 - .long 0x10A5F0C0 - lvx 28,28,7 - .long 0x13CD06C2 - .long 0x118CF0C0 - .long 0x13CA7EC2 - .long 0x118CF0C0 - .long 0x118CC8C0 - .long 0x108458C0 - vsel 29,3,2,1 - .long 0x1063E0C0 - .long 0x1084E8C0 - .long 0x13C1FEC2 - .long 0x1084F0C0 - vxor 29,5,6 - vsel 29,6,7,29 - .long 0x100020C0 - .long 0x13C586C2 - .long 0x13DEE8C0 - .long 0x1084F0C0 - lvx 28,29,7 - .long 0x13CE06C2 - .long 0x11ADF0C0 - .long 0x13CB7EC2 - .long 0x11ADF0C0 - .long 0x11ADD0C0 - .long 0x106360C0 - vsel 29,2,1,0 - .long 0x1042E0C0 - .long 0x1063E8C0 - .long 0x13C0FEC2 - .long 0x1063F0C0 - vxor 29,4,5 - vsel 29,5,6,29 - .long 0x10E718C0 - .long 0x13C486C2 - .long 0x13DEE8C0 - .long 0x1063F0C0 - lvx 28,30,7 - .long 0x13CF06C2 - .long 0x11CEF0C0 - .long 0x13CC7EC2 - .long 0x11CEF0C0 - .long 0x11CED8C0 - .long 0x104268C0 - vsel 29,1,0,7 - .long 0x1021E0C0 - .long 0x1042E8C0 - .long 0x13C7FEC2 - .long 0x1042F0C0 - vxor 29,3,4 - vsel 29,4,5,29 - .long 0x10C610C0 - .long 0x13C386C2 - .long 0x13DEE8C0 - .long 0x1042F0C0 - lvx 28,31,7 - addi 7,7,0x80 - .long 0x13D006C2 - .long 0x11EFF0C0 - .long 0x13CD7EC2 - .long 0x11EFF0C0 - .long 0x11EF40C0 - .long 0x102170C0 - vsel 29,0,7,6 - .long 0x1000E0C0 - .long 0x1021E8C0 - .long 0x13C6FEC2 - .long 0x1021F0C0 - vxor 29,2,3 - vsel 29,3,4,29 - .long 0x10A508C0 - .long 0x13C286C2 - .long 0x13DEE8C0 - .long 0x1021F0C0 - lvx 28,0,7 - .long 0x13D106C2 - .long 0x1210F0C0 - .long 0x13CE7EC2 - .long 0x1210F0C0 - .long 0x121048C0 - .long 0x100078C0 - vsel 29,7,6,5 - .long 0x10E7E0C0 - .long 0x1000E8C0 - .long 0x13C5FEC2 - .long 0x1000F0C0 - vxor 29,1,2 - vsel 29,2,3,29 - .long 0x108400C0 - .long 0x13C186C2 - .long 0x13DEE8C0 - .long 0x1000F0C0 - lvx 28,10,7 - .long 0x13D206C2 - .long 0x1231F0C0 - .long 0x13CF7EC2 - .long 0x1231F0C0 - .long 0x123150C0 - .long 0x10E780C0 - vsel 29,6,5,4 - .long 0x10C6E0C0 - .long 0x10E7E8C0 - .long 0x13C4FEC2 - .long 0x10E7F0C0 - vxor 29,0,1 - vsel 29,1,2,29 - .long 0x106338C0 - .long 0x13C086C2 - .long 0x13DEE8C0 - .long 0x10E7F0C0 - lvx 28,26,7 - .long 0x13D306C2 - .long 0x1252F0C0 - .long 0x13D07EC2 - .long 0x1252F0C0 - .long 0x125258C0 - .long 0x10C688C0 - vsel 29,5,4,3 - .long 0x10A5E0C0 - .long 0x10C6E8C0 - .long 0x13C3FEC2 - .long 0x10C6F0C0 - vxor 29,7,0 - vsel 29,0,1,29 - .long 0x104230C0 - .long 0x13C786C2 - .long 0x13DEE8C0 - .long 0x10C6F0C0 - lvx 28,27,7 - .long 0x13D806C2 - .long 0x1273F0C0 - .long 0x13D17EC2 - .long 0x1273F0C0 - .long 0x127360C0 - .long 0x10A590C0 - vsel 29,4,3,2 - .long 0x1084E0C0 - .long 0x10A5E8C0 - .long 0x13C2FEC2 - .long 0x10A5F0C0 - vxor 29,6,7 - vsel 29,7,0,29 - .long 0x102128C0 - .long 0x13C686C2 - .long 0x13DEE8C0 - .long 0x10A5F0C0 - lvx 28,28,7 - .long 0x13D906C2 - .long 0x1318F0C0 - .long 0x13D27EC2 - .long 0x1318F0C0 - .long 0x131868C0 - .long 0x108498C0 - vsel 29,3,2,1 - .long 0x1063E0C0 - .long 0x1084E8C0 - .long 0x13C1FEC2 - .long 0x1084F0C0 - vxor 29,5,6 - vsel 29,6,7,29 - .long 0x100020C0 - .long 0x13C586C2 - .long 0x13DEE8C0 - .long 0x1084F0C0 - lvx 28,29,7 - .long 0x13DA06C2 - .long 0x1339F0C0 - .long 0x13D37EC2 - .long 0x1339F0C0 - .long 0x133970C0 - .long 0x1063C0C0 - vsel 29,2,1,0 - .long 0x1042E0C0 - .long 0x1063E8C0 - .long 0x13C0FEC2 - .long 0x1063F0C0 - vxor 29,4,5 - vsel 29,5,6,29 - .long 0x10E718C0 - .long 0x13C486C2 - .long 0x13DEE8C0 - .long 0x1063F0C0 - lvx 28,30,7 - .long 0x13DB06C2 - .long 0x135AF0C0 - .long 0x13D87EC2 - .long 0x135AF0C0 - .long 0x135A78C0 - .long 0x1042C8C0 - vsel 29,1,0,7 - .long 0x1021E0C0 - .long 0x1042E8C0 - .long 0x13C7FEC2 - .long 0x1042F0C0 - vxor 29,3,4 - vsel 29,4,5,29 - .long 0x10C610C0 - .long 0x13C386C2 - .long 0x13DEE8C0 - .long 0x1042F0C0 - lvx 28,31,7 - addi 7,7,0x80 - .long 0x13C806C2 - .long 0x137BF0C0 - .long 0x13D97EC2 - .long 0x137BF0C0 - .long 0x137B80C0 - .long 0x1021D0C0 - vsel 29,0,7,6 - .long 0x1000E0C0 - .long 0x1021E8C0 - .long 0x13C6FEC2 - .long 0x1021F0C0 - vxor 29,2,3 - vsel 29,3,4,29 - .long 0x10A508C0 - .long 0x13C286C2 - .long 0x13DEE8C0 - .long 0x1021F0C0 - lvx 28,0,7 - .long 0x13C906C2 - .long 0x1108F0C0 - .long 0x13DA7EC2 - .long 0x1108F0C0 - .long 0x110888C0 - .long 0x1000D8C0 - vsel 29,7,6,5 - .long 0x10E7E0C0 - .long 0x1000E8C0 - .long 0x13C5FEC2 - .long 0x1000F0C0 - vxor 29,1,2 - vsel 29,2,3,29 - .long 0x108400C0 - .long 0x13C186C2 - .long 0x13DEE8C0 - .long 0x1000F0C0 - lvx 28,10,7 - bdnz .L16_xx - - lvx 10,0,11 - subic. 5,5,1 - lvx 11,10,11 - .long 0x100050C0 - lvx 12,26,11 - .long 0x102158C0 - lvx 13,27,11 - .long 0x104260C0 - lvx 14,28,11 - .long 0x106368C0 - lvx 15,29,11 - .long 0x108470C0 - lvx 16,30,11 - .long 0x10A578C0 - lvx 17,31,11 - .long 0x10C680C0 - .long 0x10E788C0 - bne .Loop - vperm 0,0,1,28 - vperm 2,2,3,28 - vperm 4,4,5,28 - vperm 6,6,7,28 - .long 0x7C001F99 - .long 0x7C4A1F99 - .long 0x7C9A1F99 - .long 0x7CDB1F99 - addi 11,1,207 - mtlr 8 - or 12,12,12 - lvx 24,0,11 - lvx 25,10,11 - lvx 26,26,11 - lvx 27,27,11 - lvx 28,28,11 - lvx 29,29,11 - lvx 30,30,11 - lvx 31,31,11 - ld 26,336(1) - ld 27,344(1) - ld 28,352(1) - ld 29,360(1) - ld 30,368(1) - ld 31,376(1) - addi 1,1,384 - blr -.long 0 -.byte 0,12,4,1,0x80,6,3,0 -.long 0 -.size sha512_block_p8,.-sha512_block_p8 -.align 6 -.LPICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 6 - addi 6,6,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.long 0x428a2f98,0xd728ae22 -.long 0x428a2f98,0xd728ae22 -.long 0x71374491,0x23ef65cd -.long 0x71374491,0x23ef65cd -.long 0xb5c0fbcf,0xec4d3b2f -.long 0xb5c0fbcf,0xec4d3b2f -.long 0xe9b5dba5,0x8189dbbc -.long 0xe9b5dba5,0x8189dbbc -.long 0x3956c25b,0xf348b538 -.long 0x3956c25b,0xf348b538 -.long 0x59f111f1,0xb605d019 -.long 0x59f111f1,0xb605d019 -.long 0x923f82a4,0xaf194f9b -.long 0x923f82a4,0xaf194f9b -.long 0xab1c5ed5,0xda6d8118 -.long 0xab1c5ed5,0xda6d8118 -.long 0xd807aa98,0xa3030242 -.long 0xd807aa98,0xa3030242 -.long 0x12835b01,0x45706fbe -.long 0x12835b01,0x45706fbe -.long 0x243185be,0x4ee4b28c -.long 0x243185be,0x4ee4b28c -.long 0x550c7dc3,0xd5ffb4e2 -.long 0x550c7dc3,0xd5ffb4e2 -.long 0x72be5d74,0xf27b896f -.long 0x72be5d74,0xf27b896f -.long 0x80deb1fe,0x3b1696b1 -.long 0x80deb1fe,0x3b1696b1 -.long 0x9bdc06a7,0x25c71235 -.long 0x9bdc06a7,0x25c71235 -.long 0xc19bf174,0xcf692694 -.long 0xc19bf174,0xcf692694 -.long 0xe49b69c1,0x9ef14ad2 -.long 0xe49b69c1,0x9ef14ad2 -.long 0xefbe4786,0x384f25e3 -.long 0xefbe4786,0x384f25e3 -.long 0x0fc19dc6,0x8b8cd5b5 -.long 0x0fc19dc6,0x8b8cd5b5 -.long 0x240ca1cc,0x77ac9c65 -.long 0x240ca1cc,0x77ac9c65 -.long 0x2de92c6f,0x592b0275 -.long 0x2de92c6f,0x592b0275 -.long 0x4a7484aa,0x6ea6e483 -.long 0x4a7484aa,0x6ea6e483 -.long 0x5cb0a9dc,0xbd41fbd4 -.long 0x5cb0a9dc,0xbd41fbd4 -.long 0x76f988da,0x831153b5 -.long 0x76f988da,0x831153b5 -.long 0x983e5152,0xee66dfab -.long 0x983e5152,0xee66dfab -.long 0xa831c66d,0x2db43210 -.long 0xa831c66d,0x2db43210 -.long 0xb00327c8,0x98fb213f -.long 0xb00327c8,0x98fb213f -.long 0xbf597fc7,0xbeef0ee4 -.long 0xbf597fc7,0xbeef0ee4 -.long 0xc6e00bf3,0x3da88fc2 -.long 0xc6e00bf3,0x3da88fc2 -.long 0xd5a79147,0x930aa725 -.long 0xd5a79147,0x930aa725 -.long 0x06ca6351,0xe003826f -.long 0x06ca6351,0xe003826f -.long 0x14292967,0x0a0e6e70 -.long 0x14292967,0x0a0e6e70 -.long 0x27b70a85,0x46d22ffc -.long 0x27b70a85,0x46d22ffc -.long 0x2e1b2138,0x5c26c926 -.long 0x2e1b2138,0x5c26c926 -.long 0x4d2c6dfc,0x5ac42aed -.long 0x4d2c6dfc,0x5ac42aed -.long 0x53380d13,0x9d95b3df -.long 0x53380d13,0x9d95b3df -.long 0x650a7354,0x8baf63de -.long 0x650a7354,0x8baf63de -.long 0x766a0abb,0x3c77b2a8 -.long 0x766a0abb,0x3c77b2a8 -.long 0x81c2c92e,0x47edaee6 -.long 0x81c2c92e,0x47edaee6 -.long 0x92722c85,0x1482353b -.long 0x92722c85,0x1482353b -.long 0xa2bfe8a1,0x4cf10364 -.long 0xa2bfe8a1,0x4cf10364 -.long 0xa81a664b,0xbc423001 -.long 0xa81a664b,0xbc423001 -.long 0xc24b8b70,0xd0f89791 -.long 0xc24b8b70,0xd0f89791 -.long 0xc76c51a3,0x0654be30 -.long 0xc76c51a3,0x0654be30 -.long 0xd192e819,0xd6ef5218 -.long 0xd192e819,0xd6ef5218 -.long 0xd6990624,0x5565a910 -.long 0xd6990624,0x5565a910 -.long 0xf40e3585,0x5771202a -.long 0xf40e3585,0x5771202a -.long 0x106aa070,0x32bbd1b8 -.long 0x106aa070,0x32bbd1b8 -.long 0x19a4c116,0xb8d2d0c8 -.long 0x19a4c116,0xb8d2d0c8 -.long 0x1e376c08,0x5141ab53 -.long 0x1e376c08,0x5141ab53 -.long 0x2748774c,0xdf8eeb99 -.long 0x2748774c,0xdf8eeb99 -.long 0x34b0bcb5,0xe19b48a8 -.long 0x34b0bcb5,0xe19b48a8 -.long 0x391c0cb3,0xc5c95a63 -.long 0x391c0cb3,0xc5c95a63 -.long 0x4ed8aa4a,0xe3418acb -.long 0x4ed8aa4a,0xe3418acb -.long 0x5b9cca4f,0x7763e373 -.long 0x5b9cca4f,0x7763e373 -.long 0x682e6ff3,0xd6b2b8a3 -.long 0x682e6ff3,0xd6b2b8a3 -.long 0x748f82ee,0x5defb2fc -.long 0x748f82ee,0x5defb2fc -.long 0x78a5636f,0x43172f60 -.long 0x78a5636f,0x43172f60 -.long 0x84c87814,0xa1f0ab72 -.long 0x84c87814,0xa1f0ab72 -.long 0x8cc70208,0x1a6439ec -.long 0x8cc70208,0x1a6439ec -.long 0x90befffa,0x23631e28 -.long 0x90befffa,0x23631e28 -.long 0xa4506ceb,0xde82bde9 -.long 0xa4506ceb,0xde82bde9 -.long 0xbef9a3f7,0xb2c67915 -.long 0xbef9a3f7,0xb2c67915 -.long 0xc67178f2,0xe372532b -.long 0xc67178f2,0xe372532b -.long 0xca273ece,0xea26619c -.long 0xca273ece,0xea26619c -.long 0xd186b8c7,0x21c0c207 -.long 0xd186b8c7,0x21c0c207 -.long 0xeada7dd6,0xcde0eb1e -.long 0xeada7dd6,0xcde0eb1e -.long 0xf57d4f7f,0xee6ed178 -.long 0xf57d4f7f,0xee6ed178 -.long 0x06f067aa,0x72176fba -.long 0x06f067aa,0x72176fba -.long 0x0a637dc5,0xa2c898a6 -.long 0x0a637dc5,0xa2c898a6 -.long 0x113f9804,0xbef90dae -.long 0x113f9804,0xbef90dae -.long 0x1b710b35,0x131c471b -.long 0x1b710b35,0x131c471b -.long 0x28db77f5,0x23047d84 -.long 0x28db77f5,0x23047d84 -.long 0x32caab7b,0x40c72493 -.long 0x32caab7b,0x40c72493 -.long 0x3c9ebe0a,0x15c9bebc -.long 0x3c9ebe0a,0x15c9bebc -.long 0x431d67c4,0x9c100d4c -.long 0x431d67c4,0x9c100d4c -.long 0x4cc5d4be,0xcb3e42b6 -.long 0x4cc5d4be,0xcb3e42b6 -.long 0x597f299c,0xfc657e2a -.long 0x597f299c,0xfc657e2a -.long 0x5fcb6fab,0x3ad6faec -.long 0x5fcb6fab,0x3ad6faec -.long 0x6c44198c,0x4a475817 -.long 0x6c44198c,0x4a475817 -.long 0,0 -.long 0,0 -.long 0x00010203,0x04050607 -.long 0x10111213,0x14151617 -.byte 83,72,65,53,49,50,32,102,111,114,32,80,111,119,101,114,73,83,65,32,50,46,48,55,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 2 diff --git a/sys/crypto/openssl/powerpc64/vpaes-ppc.S b/sys/crypto/openssl/powerpc64/vpaes-ppc.S deleted file mode 100644 index bf0e1b3b899..00000000000 --- a/sys/crypto/openssl/powerpc64/vpaes-ppc.S +++ /dev/null @@ -1,1479 +0,0 @@ -/* Do not modify. This file is auto-generated from vpaes-ppc.pl. */ -.machine "any" - -.abiversion 2 -.text - -.align 7 -_vpaes_consts: -.Lk_mc_forward: -.byte 0x01,0x02,0x03,0x00,0x05,0x06,0x07,0x04,0x09,0x0a,0x0b,0x08,0x0d,0x0e,0x0f,0x0c -.byte 0x05,0x06,0x07,0x04,0x09,0x0a,0x0b,0x08,0x0d,0x0e,0x0f,0x0c,0x01,0x02,0x03,0x00 -.byte 0x09,0x0a,0x0b,0x08,0x0d,0x0e,0x0f,0x0c,0x01,0x02,0x03,0x00,0x05,0x06,0x07,0x04 -.byte 0x0d,0x0e,0x0f,0x0c,0x01,0x02,0x03,0x00,0x05,0x06,0x07,0x04,0x09,0x0a,0x0b,0x08 -.Lk_mc_backward: -.byte 0x03,0x00,0x01,0x02,0x07,0x04,0x05,0x06,0x0b,0x08,0x09,0x0a,0x0f,0x0c,0x0d,0x0e -.byte 0x0f,0x0c,0x0d,0x0e,0x03,0x00,0x01,0x02,0x07,0x04,0x05,0x06,0x0b,0x08,0x09,0x0a -.byte 0x0b,0x08,0x09,0x0a,0x0f,0x0c,0x0d,0x0e,0x03,0x00,0x01,0x02,0x07,0x04,0x05,0x06 -.byte 0x07,0x04,0x05,0x06,0x0b,0x08,0x09,0x0a,0x0f,0x0c,0x0d,0x0e,0x03,0x00,0x01,0x02 -.Lk_sr: -.byte 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f -.byte 0x00,0x05,0x0a,0x0f,0x04,0x09,0x0e,0x03,0x08,0x0d,0x02,0x07,0x0c,0x01,0x06,0x0b -.byte 0x00,0x09,0x02,0x0b,0x04,0x0d,0x06,0x0f,0x08,0x01,0x0a,0x03,0x0c,0x05,0x0e,0x07 -.byte 0x00,0x0d,0x0a,0x07,0x04,0x01,0x0e,0x0b,0x08,0x05,0x02,0x0f,0x0c,0x09,0x06,0x03 - - - - -.Lk_inv: -.byte 0xf0,0x01,0x08,0x0d,0x0f,0x06,0x05,0x0e,0x02,0x0c,0x0b,0x0a,0x09,0x03,0x07,0x04 -.byte 0xf0,0x07,0x0b,0x0f,0x06,0x0a,0x04,0x01,0x09,0x08,0x05,0x02,0x0c,0x0e,0x0d,0x03 -.Lk_ipt: -.byte 0x00,0x70,0x2a,0x5a,0x98,0xe8,0xb2,0xc2,0x08,0x78,0x22,0x52,0x90,0xe0,0xba,0xca -.byte 0x00,0x4d,0x7c,0x31,0x7d,0x30,0x01,0x4c,0x81,0xcc,0xfd,0xb0,0xfc,0xb1,0x80,0xcd -.Lk_sbo: -.byte 0x00,0xc7,0xbd,0x6f,0x17,0x6d,0xd2,0xd0,0x78,0xa8,0x02,0xc5,0x7a,0xbf,0xaa,0x15 -.byte 0x00,0x6a,0xbb,0x5f,0xa5,0x74,0xe4,0xcf,0xfa,0x35,0x2b,0x41,0xd1,0x90,0x1e,0x8e -.Lk_sb1: -.byte 0x00,0x23,0xe2,0xfa,0x15,0xd4,0x18,0x36,0xef,0xd9,0x2e,0x0d,0xc1,0xcc,0xf7,0x3b -.byte 0x00,0x3e,0x50,0xcb,0x8f,0xe1,0x9b,0xb1,0x44,0xf5,0x2a,0x14,0x6e,0x7a,0xdf,0xa5 -.Lk_sb2: -.byte 0x00,0x29,0xe1,0x0a,0x40,0x88,0xeb,0x69,0x4a,0x23,0x82,0xab,0xc8,0x63,0xa1,0xc2 -.byte 0x00,0x24,0x71,0x0b,0xc6,0x93,0x7a,0xe2,0xcd,0x2f,0x98,0xbc,0x55,0xe9,0xb7,0x5e - - - - -.Lk_dipt: -.byte 0x00,0x5f,0x54,0x0b,0x04,0x5b,0x50,0x0f,0x1a,0x45,0x4e,0x11,0x1e,0x41,0x4a,0x15 -.byte 0x00,0x65,0x05,0x60,0xe6,0x83,0xe3,0x86,0x94,0xf1,0x91,0xf4,0x72,0x17,0x77,0x12 -.Lk_dsbo: -.byte 0x00,0x40,0xf9,0x7e,0x53,0xea,0x87,0x13,0x2d,0x3e,0x94,0xd4,0xb9,0x6d,0xaa,0xc7 -.byte 0x00,0x1d,0x44,0x93,0x0f,0x56,0xd7,0x12,0x9c,0x8e,0xc5,0xd8,0x59,0x81,0x4b,0xca -.Lk_dsb9: -.byte 0x00,0xd6,0x86,0x9a,0x53,0x03,0x1c,0x85,0xc9,0x4c,0x99,0x4f,0x50,0x1f,0xd5,0xca -.byte 0x00,0x49,0xd7,0xec,0x89,0x17,0x3b,0xc0,0x65,0xa5,0xfb,0xb2,0x9e,0x2c,0x5e,0x72 -.Lk_dsbd: -.byte 0x00,0xa2,0xb1,0xe6,0xdf,0xcc,0x57,0x7d,0x39,0x44,0x2a,0x88,0x13,0x9b,0x6e,0xf5 -.byte 0x00,0xcb,0xc6,0x24,0xf7,0xfa,0xe2,0x3c,0xd3,0xef,0xde,0x15,0x0d,0x18,0x31,0x29 -.Lk_dsbb: -.byte 0x00,0x42,0xb4,0x96,0x92,0x64,0x22,0xd0,0x04,0xd4,0xf2,0xb0,0xf6,0x46,0x26,0x60 -.byte 0x00,0x67,0x59,0xcd,0xa6,0x98,0x94,0xc1,0x6b,0xaa,0x55,0x32,0x3e,0x0c,0xff,0xf3 -.Lk_dsbe: -.byte 0x00,0xd0,0xd4,0x26,0x96,0x92,0xf2,0x46,0xb0,0xf6,0xb4,0x64,0x04,0x60,0x42,0x22 -.byte 0x00,0xc1,0xaa,0xff,0xcd,0xa6,0x55,0x0c,0x32,0x3e,0x59,0x98,0x6b,0xf3,0x67,0x94 - - - - -.Lk_dksd: -.byte 0x00,0x47,0xe4,0xa3,0x5d,0x1a,0xb9,0xfe,0xf9,0xbe,0x1d,0x5a,0xa4,0xe3,0x40,0x07 -.byte 0x00,0x83,0x36,0xb5,0xf4,0x77,0xc2,0x41,0x1e,0x9d,0x28,0xab,0xea,0x69,0xdc,0x5f -.Lk_dksb: -.byte 0x00,0xd5,0x50,0x85,0x1f,0xca,0x4f,0x9a,0x99,0x4c,0xc9,0x1c,0x86,0x53,0xd6,0x03 -.byte 0x00,0x4a,0xfc,0xb6,0xa7,0xed,0x5b,0x11,0xc8,0x82,0x34,0x7e,0x6f,0x25,0x93,0xd9 -.Lk_dkse: -.byte 0x00,0xd6,0xc9,0x1f,0xca,0x1c,0x03,0xd5,0x86,0x50,0x4f,0x99,0x4c,0x9a,0x85,0x53 -.byte 0xe8,0x7b,0xdc,0x4f,0x05,0x96,0x31,0xa2,0x87,0x14,0xb3,0x20,0x6a,0xf9,0x5e,0xcd -.Lk_dks9: -.byte 0x00,0xa7,0xd9,0x7e,0xc8,0x6f,0x11,0xb6,0xfc,0x5b,0x25,0x82,0x34,0x93,0xed,0x4a -.byte 0x00,0x33,0x14,0x27,0x62,0x51,0x76,0x45,0xce,0xfd,0xda,0xe9,0xac,0x9f,0xb8,0x8b - -.Lk_rcon: -.byte 0xb6,0xee,0x9d,0xaf,0xb9,0x91,0x83,0x1f,0x81,0x7d,0x7c,0x4d,0x08,0x98,0x2a,0x70 -.Lk_s63: -.byte 0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b - -.Lk_opt: -.byte 0x00,0x60,0xb6,0xd6,0x29,0x49,0x9f,0xff,0x08,0x68,0xbe,0xde,0x21,0x41,0x97,0xf7 -.byte 0x00,0xec,0xbc,0x50,0x51,0xbd,0xed,0x01,0xe0,0x0c,0x5c,0xb0,0xb1,0x5d,0x0d,0xe1 -.Lk_deskew: -.byte 0x00,0xe3,0xa4,0x47,0x40,0xa3,0xe4,0x07,0x1a,0xf9,0xbe,0x5d,0x5a,0xb9,0xfe,0x1d -.byte 0x00,0x69,0xea,0x83,0xdc,0xb5,0x36,0x5f,0x77,0x1e,0x9d,0xf4,0xab,0xc2,0x41,0x28 -.align 5 -.Lconsts: - mflr 0 - bcl 20,31,$+4 - mflr 12 - addi 12,12,-0x308 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.byte 86,101,99,116,111,114,32,80,101,114,109,117,116,97,116,105,111,110,32,65,69,83,32,102,111,114,32,65,108,116,105,86,101,99,44,77,105,107,101,32,72,97,109,98,117,114,103,32,40,83,116,97,110,102,111,114,100,32,85,110,105,118,101,114,115,105,116,121,41,0 -.align 2 -.align 6 - - - - - - -.align 4 -_vpaes_encrypt_preheat: - mflr 8 - bl .Lconsts - mtlr 8 - li 11, 0xc0 - li 10, 0xd0 - li 9, 0xe0 - li 8, 0xf0 - vxor 7, 7, 7 - vspltisb 8,4 - vspltisb 9,0x0f - lvx 10, 12, 11 - li 11, 0x100 - lvx 11, 12, 10 - li 10, 0x110 - lvx 12, 12, 9 - li 9, 0x120 - lvx 13, 12, 8 - li 8, 0x130 - lvx 14, 12, 11 - li 11, 0x140 - lvx 15, 12, 10 - li 10, 0x150 - lvx 16, 12, 9 - lvx 17, 12, 8 - lvx 18, 12, 11 - lvx 19, 12, 10 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - - - - - - - - - - -.align 5 -_vpaes_encrypt_core: - lwz 8, 240(5) - li 9, 16 - lvx 5, 0, 5 - li 11, 0x10 - lvx 6, 9, 5 - addi 9, 9, 16 - vperm 5, 5, 6, 31 - addi 10, 11, 0x40 - vsrb 1, 0, 8 - vperm 0, 12, 12, 0 - vperm 1, 13, 13, 1 - vxor 0, 0, 5 - vxor 0, 0, 1 - mtctr 8 - b .Lenc_entry - -.align 4 -.Lenc_loop: - - vperm 4, 17, 7, 2 - lvx 1, 12, 11 - addi 11, 11, 16 - vperm 0, 16, 7, 3 - vxor 4, 4, 5 - andi. 11, 11, 0x30 - vperm 5, 19, 7, 2 - vxor 0, 0, 4 - vperm 2, 18, 7, 3 - lvx 4, 12, 10 - addi 10, 11, 0x40 - vperm 3, 0, 7, 1 - vxor 2, 2, 5 - vperm 0, 0, 7, 4 - vxor 3, 3, 2 - vperm 4, 3, 7, 1 - vxor 0, 0, 3 - vxor 0, 0, 4 - -.Lenc_entry: - - vsrb 1, 0, 8 - vperm 5, 11, 11, 0 - vxor 0, 0, 1 - vperm 3, 10, 10, 1 - vperm 4, 10, 10, 0 - vand 0, 0, 9 - vxor 3, 3, 5 - vxor 4, 4, 5 - vperm 2, 10, 7, 3 - vor 5,6,6 - lvx 6, 9, 5 - vperm 3, 10, 7, 4 - addi 9, 9, 16 - vxor 2, 2, 0 - vperm 5, 5, 6, 31 - vxor 3, 3, 1 - bdnz .Lenc_loop - - - addi 10, 11, 0x80 - - - vperm 4, 14, 7, 2 - lvx 1, 12, 10 - vperm 0, 15, 7, 3 - vxor 4, 4, 5 - vxor 0, 0, 4 - vperm 0, 0, 7, 1 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.globl vpaes_encrypt -.type vpaes_encrypt,@function -.align 5 -vpaes_encrypt: -.localentry vpaes_encrypt,0 - - stdu 1,-256(1) - li 10,63 - li 11,79 - mflr 6 - li 7,-1 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 7,252(1) - li 0, -1 - std 6,272(1) - or 0,0,0 - - bl _vpaes_encrypt_preheat - - lvsl 27, 0, 3 - lvx 0, 0, 3 - addi 3, 3, 15 - lvsr 29, 0, 4 - lvsl 31, 0, 5 - lvx 26, 0, 3 - vperm 0, 0, 26, 27 - - bl _vpaes_encrypt_core - - andi. 8, 4, 15 - li 9, 16 - beq .Lenc_out_aligned - - vperm 0, 0, 0, 29 - mtctr 9 -.Lenc_out_unaligned: - stvebx 0, 0, 4 - addi 4, 4, 1 - bdnz .Lenc_out_unaligned - b .Lenc_done - -.align 4 -.Lenc_out_aligned: - stvx 0, 0, 4 -.Lenc_done: - - li 10,63 - li 11,79 - mtlr 6 - or 7,7,7 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - addi 1,1,256 - blr -.long 0 -.byte 0,12,0x04,1,0x80,0,3,0 -.long 0 -.size vpaes_encrypt,.-vpaes_encrypt - -.align 4 -_vpaes_decrypt_preheat: - mflr 8 - bl .Lconsts - mtlr 8 - li 11, 0xc0 - li 10, 0xd0 - li 9, 0x160 - li 8, 0x170 - vxor 7, 7, 7 - vspltisb 8,4 - vspltisb 9,0x0f - lvx 10, 12, 11 - li 11, 0x180 - lvx 11, 12, 10 - li 10, 0x190 - lvx 12, 12, 9 - li 9, 0x1a0 - lvx 13, 12, 8 - li 8, 0x1b0 - lvx 14, 12, 11 - li 11, 0x1c0 - lvx 15, 12, 10 - li 10, 0x1d0 - lvx 16, 12, 9 - li 9, 0x1e0 - lvx 17, 12, 8 - li 8, 0x1f0 - lvx 18, 12, 11 - li 11, 0x200 - lvx 19, 12, 10 - li 10, 0x210 - lvx 20, 12, 9 - lvx 21, 12, 8 - lvx 22, 12, 11 - lvx 23, 12, 10 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - -.align 4 -_vpaes_decrypt_core: - lwz 8, 240(5) - li 9, 16 - lvx 5, 0, 5 - li 11, 0x30 - lvx 6, 9, 5 - addi 9, 9, 16 - vperm 5, 5, 6, 31 - vsrb 1, 0, 8 - vperm 0, 12, 12, 0 - vperm 1, 13, 13, 1 - vxor 0, 0, 5 - vxor 0, 0, 1 - mtctr 8 - b .Ldec_entry - -.align 4 -.Ldec_loop: - - - - lvx 0, 12, 11 - - - vperm 4, 16, 7, 2 - subi 11, 11, 16 - vperm 1, 17, 7, 3 - andi. 11, 11, 0x30 - vxor 5, 5, 4 - - vxor 5, 5, 1 - - - vperm 4, 18, 7, 2 - vperm 5, 5, 7, 0 - vperm 1, 19, 7, 3 - vxor 5, 5, 4 - - vxor 5, 5, 1 - - - vperm 4, 20, 7, 2 - vperm 5, 5, 7, 0 - vperm 1, 21, 7, 3 - vxor 5, 5, 4 - - vxor 5, 5, 1 - - - vperm 4, 22, 7, 2 - vperm 5, 5, 7, 0 - vperm 1, 23, 7, 3 - vxor 0, 5, 4 - vxor 0, 0, 1 - -.Ldec_entry: - - vsrb 1, 0, 8 - vperm 2, 11, 11, 0 - vxor 0, 0, 1 - vperm 3, 10, 10, 1 - vperm 4, 10, 10, 0 - vand 0, 0, 9 - vxor 3, 3, 2 - vxor 4, 4, 2 - vperm 2, 10, 7, 3 - vor 5,6,6 - lvx 6, 9, 5 - vperm 3, 10, 7, 4 - addi 9, 9, 16 - vxor 2, 2, 0 - vperm 5, 5, 6, 31 - vxor 3, 3, 1 - bdnz .Ldec_loop - - - addi 10, 11, 0x80 - - vperm 4, 14, 7, 2 - - lvx 2, 12, 10 - vperm 1, 15, 7, 3 - vxor 4, 4, 5 - vxor 0, 1, 4 - vperm 0, 0, 7, 2 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.globl vpaes_decrypt -.type vpaes_decrypt,@function -.align 5 -vpaes_decrypt: -.localentry vpaes_decrypt,0 - - stdu 1,-256(1) - li 10,63 - li 11,79 - mflr 6 - li 7,-1 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 7,252(1) - li 0, -1 - std 6,272(1) - or 0,0,0 - - bl _vpaes_decrypt_preheat - - lvsl 27, 0, 3 - lvx 0, 0, 3 - addi 3, 3, 15 - lvsr 29, 0, 4 - lvsl 31, 0, 5 - lvx 26, 0, 3 - vperm 0, 0, 26, 27 - - bl _vpaes_decrypt_core - - andi. 8, 4, 15 - li 9, 16 - beq .Ldec_out_aligned - - vperm 0, 0, 0, 29 - mtctr 9 -.Ldec_out_unaligned: - stvebx 0, 0, 4 - addi 4, 4, 1 - bdnz .Ldec_out_unaligned - b .Ldec_done - -.align 4 -.Ldec_out_aligned: - stvx 0, 0, 4 -.Ldec_done: - - li 10,63 - li 11,79 - mtlr 6 - or 7,7,7 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - addi 1,1,256 - blr -.long 0 -.byte 0,12,0x04,1,0x80,0,3,0 -.long 0 -.size vpaes_decrypt,.-vpaes_decrypt - -.globl vpaes_cbc_encrypt -.type vpaes_cbc_encrypt,@function -.align 5 -vpaes_cbc_encrypt: -.localentry vpaes_cbc_encrypt,0 - - cmpldi 5,16 - .long 0x4dc00020 - - stdu 1,-272(1) - mflr 0 - li 10,63 - li 11,79 - li 12,-1 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 12,252(1) - std 30,256(1) - std 31,264(1) - li 9, -16 - std 0, 288(1) - - and 30, 5, 9 - andi. 9, 4, 15 - mr 5, 6 - mr 31, 7 - li 6, -1 - mcrf 1, 0 - mr 7, 12 - or 6,6,6 - - lvx 24, 0, 31 - li 9, 15 - lvsl 27, 0, 31 - lvx 25, 9, 31 - vperm 24, 24, 25, 27 - - cmpwi 8, 0 - neg 8, 3 - vxor 7, 7, 7 - lvsl 31, 0, 5 - lvsr 29, 0, 4 - lvsr 27, 0, 8 - vnor 30, 7, 7 - lvx 26, 0, 3 - vperm 30, 7, 30, 29 - addi 3, 3, 15 - - beq .Lcbc_decrypt - - bl _vpaes_encrypt_preheat - li 0, 16 - - beq 1, .Lcbc_enc_loop - - vor 0,26,26 - lvx 26, 0, 3 - addi 3, 3, 16 - vperm 0, 0, 26, 27 - vxor 0, 0, 24 - - bl _vpaes_encrypt_core - - andi. 8, 4, 15 - vor 24,0,0 - sub 9, 4, 8 - vperm 28, 0, 0, 29 - -.Lcbc_enc_head: - stvebx 28, 8, 9 - cmpwi 8, 15 - addi 8, 8, 1 - bne .Lcbc_enc_head - - sub. 30, 30, 0 - addi 4, 4, 16 - beq .Lcbc_unaligned_done - -.Lcbc_enc_loop: - vor 0,26,26 - lvx 26, 0, 3 - addi 3, 3, 16 - vperm 0, 0, 26, 27 - vxor 0, 0, 24 - - bl _vpaes_encrypt_core - - vor 24,0,0 - sub. 30, 30, 0 - vperm 0, 0, 0, 29 - vsel 1, 28, 0, 30 - vor 28,0,0 - stvx 1, 0, 4 - addi 4, 4, 16 - bne .Lcbc_enc_loop - - b .Lcbc_done - -.align 5 -.Lcbc_decrypt: - bl _vpaes_decrypt_preheat - li 0, 16 - - beq 1, .Lcbc_dec_loop - - vor 0,26,26 - lvx 26, 0, 3 - addi 3, 3, 16 - vperm 0, 0, 26, 27 - vor 25,0,0 - - bl _vpaes_decrypt_core - - andi. 8, 4, 15 - vxor 0, 0, 24 - vor 24,25,25 - sub 9, 4, 8 - vperm 28, 0, 0, 29 - -.Lcbc_dec_head: - stvebx 28, 8, 9 - cmpwi 8, 15 - addi 8, 8, 1 - bne .Lcbc_dec_head - - sub. 30, 30, 0 - addi 4, 4, 16 - beq .Lcbc_unaligned_done - -.Lcbc_dec_loop: - vor 0,26,26 - lvx 26, 0, 3 - addi 3, 3, 16 - vperm 0, 0, 26, 27 - vor 25,0,0 - - bl _vpaes_decrypt_core - - vxor 0, 0, 24 - vor 24,25,25 - sub. 30, 30, 0 - vperm 0, 0, 0, 29 - vsel 1, 28, 0, 30 - vor 28,0,0 - stvx 1, 0, 4 - addi 4, 4, 16 - bne .Lcbc_dec_loop - -.Lcbc_done: - beq 1, .Lcbc_write_iv - -.Lcbc_unaligned_done: - andi. 8, 4, 15 - sub 4, 4, 8 - li 9, 0 -.Lcbc_tail: - stvebx 28, 9, 4 - addi 9, 9, 1 - cmpw 9, 8 - bne .Lcbc_tail - -.Lcbc_write_iv: - neg 8, 31 - li 10, 4 - lvsl 29, 0, 8 - li 11, 8 - li 12, 12 - vperm 24, 24, 24, 29 - stvewx 24, 0, 31 - stvewx 24, 10, 31 - stvewx 24, 11, 31 - stvewx 24, 12, 31 - - or 7,7,7 - li 10,63 - li 11,79 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 -.Lcbc_abort: - ld 0, 288(1) - ld 30,256(1) - ld 31,264(1) - mtlr 0 - addi 1,1,272 - blr -.long 0 -.byte 0,12,0x04,1,0x80,2,6,0 -.long 0 -.size vpaes_cbc_encrypt,.-vpaes_cbc_encrypt - - - - - -.align 4 -_vpaes_key_preheat: - mflr 8 - bl .Lconsts - mtlr 8 - li 11, 0xc0 - li 10, 0xd0 - li 9, 0xe0 - li 8, 0xf0 - - vspltisb 8,4 - vxor 9,9,9 - lvx 10, 12, 11 - li 11, 0x120 - lvx 11, 12, 10 - li 10, 0x130 - lvx 12, 12, 9 - li 9, 0x220 - lvx 13, 12, 8 - li 8, 0x230 - - lvx 14, 12, 11 - li 11, 0x240 - lvx 15, 12, 10 - li 10, 0x250 - - lvx 16, 12, 9 - li 9, 0x260 - lvx 17, 12, 8 - li 8, 0x270 - lvx 18, 12, 11 - li 11, 0x280 - lvx 19, 12, 10 - li 10, 0x290 - lvx 20, 12, 9 - li 9, 0x2a0 - lvx 21, 12, 8 - li 8, 0x2b0 - lvx 22, 12, 11 - lvx 23, 12, 10 - - lvx 24, 12, 9 - lvx 25, 0, 12 - lvx 26, 12, 8 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.align 4 -_vpaes_schedule_core: - mflr 7 - - bl _vpaes_key_preheat - - - neg 8, 3 - lvx 0, 0, 3 - addi 3, 3, 15 - lvsr 27, 0, 8 - lvx 6, 0, 3 - addi 3, 3, 8 - vperm 0, 0, 6, 27 - - - vor 3,0,0 - bl _vpaes_schedule_transform - vor 7,0,0 - - bne 1, .Lschedule_am_decrypting - - - li 8, 0x30 - li 9, 4 - li 10, 8 - li 11, 12 - - lvsr 29, 0, 5 - vnor 30, 9, 9 - vperm 30, 9, 30, 29 - - - vperm 28, 0, 0, 29 - stvewx 28, 0, 5 - stvewx 28, 9, 5 - stvewx 28, 10, 5 - addi 10, 12, 0x80 - stvewx 28, 11, 5 - b .Lschedule_go - -.Lschedule_am_decrypting: - srwi 8, 4, 1 - andi. 8, 8, 32 - xori 8, 8, 32 - addi 10, 12, 0x80 - - lvx 1, 8, 10 - li 9, 4 - li 10, 8 - li 11, 12 - vperm 4, 3, 3, 1 - - neg 0, 5 - lvsl 29, 0, 0 - vnor 30, 9, 9 - vperm 30, 30, 9, 29 - - - vperm 28, 4, 4, 29 - stvewx 28, 0, 5 - stvewx 28, 9, 5 - stvewx 28, 10, 5 - addi 10, 12, 0x80 - stvewx 28, 11, 5 - addi 5, 5, 15 - xori 8, 8, 0x30 - -.Lschedule_go: - cmplwi 4, 192 - bgt .Lschedule_256 - beq .Lschedule_192 - - - - - - - - - - -.Lschedule_128: - li 0, 10 - mtctr 0 - -.Loop_schedule_128: - bl _vpaes_schedule_round - bdz .Lschedule_mangle_last - bl _vpaes_schedule_mangle - b .Loop_schedule_128 - - - - - - - - - - - - - - - - -.align 4 -.Lschedule_192: - li 0, 4 - lvx 0, 0, 3 - vperm 0, 6, 0, 27 - vsldoi 0, 3, 0, 8 - bl _vpaes_schedule_transform - vsldoi 6, 0, 9, 8 - vsldoi 6, 9, 6, 8 - mtctr 0 - -.Loop_schedule_192: - bl _vpaes_schedule_round - vsldoi 0, 6, 0, 8 - bl _vpaes_schedule_mangle - bl _vpaes_schedule_192_smear - bl _vpaes_schedule_mangle - bl _vpaes_schedule_round - bdz .Lschedule_mangle_last - bl _vpaes_schedule_mangle - bl _vpaes_schedule_192_smear - b .Loop_schedule_192 - - - - - - - - - - - -.align 4 -.Lschedule_256: - li 0, 7 - addi 3, 3, 8 - lvx 0, 0, 3 - vperm 0, 6, 0, 27 - bl _vpaes_schedule_transform - mtctr 0 - -.Loop_schedule_256: - bl _vpaes_schedule_mangle - vor 6,0,0 - - - bl _vpaes_schedule_round - bdz .Lschedule_mangle_last - bl _vpaes_schedule_mangle - - - vspltw 0, 0, 3 - vor 5,7,7 - vor 7,6,6 - bl _vpaes_schedule_low_round - vor 7,5,5 - - b .Loop_schedule_256 - - - - - - - - - - -.align 4 -.Lschedule_mangle_last: - - li 11, 0x2e0 - li 9, 0x2f0 - bne 1, .Lschedule_mangle_last_dec - - - lvx 1, 8, 10 - li 11, 0x2c0 - li 9, 0x2d0 - vperm 0, 0, 0, 1 - - lvx 12, 11, 12 - lvx 13, 9, 12 - addi 5, 5, 16 - vxor 0, 0, 26 - bl _vpaes_schedule_transform - - - vperm 0, 0, 0, 29 - li 10, 4 - vsel 2, 28, 0, 30 - li 11, 8 - stvx 2, 0, 5 - li 12, 12 - stvewx 0, 0, 5 - stvewx 0, 10, 5 - stvewx 0, 11, 5 - stvewx 0, 12, 5 - b .Lschedule_mangle_done - -.align 4 -.Lschedule_mangle_last_dec: - lvx 12, 11, 12 - lvx 13, 9, 12 - addi 5, 5, -16 - vxor 0, 0, 26 - bl _vpaes_schedule_transform - - - addi 9, 5, -15 - vperm 0, 0, 0, 29 - li 10, 4 - vsel 2, 28, 0, 30 - li 11, 8 - stvx 2, 0, 5 - li 12, 12 - stvewx 0, 0, 9 - stvewx 0, 10, 9 - stvewx 0, 11, 9 - stvewx 0, 12, 9 - - -.Lschedule_mangle_done: - mtlr 7 - - vxor 0, 0, 0 - vxor 1, 1, 1 - vxor 2, 2, 2 - vxor 3, 3, 3 - vxor 4, 4, 4 - vxor 5, 5, 5 - vxor 6, 6, 6 - vxor 7, 7, 7 - - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - - - - - - - - - - -.align 4 -_vpaes_schedule_192_smear: - vspltw 0, 7, 3 - vsldoi 1, 9, 6, 12 - vsldoi 0, 7, 0, 8 - vxor 6, 6, 1 - vxor 6, 6, 0 - vor 0,6,6 - vsldoi 6, 6, 9, 8 - vsldoi 6, 9, 6, 8 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - - - - - - - - - - - - - - -.align 4 -_vpaes_schedule_round: - - - vsldoi 1, 24, 9, 15 - vsldoi 24, 24, 24, 15 - vxor 7, 7, 1 - - - vspltw 0, 0, 3 - vsldoi 0, 0, 0, 1 - - - - -_vpaes_schedule_low_round: - - vsldoi 1, 9, 7, 12 - vxor 7, 7, 1 - vspltisb 1, 0x0f - vsldoi 4, 9, 7, 8 - - - vand 1, 1, 0 - vsrb 0, 0, 8 - vxor 7, 7, 4 - vperm 2, 11, 9, 1 - vxor 1, 1, 0 - vperm 3, 10, 9, 0 - vxor 3, 3, 2 - vperm 4, 10, 9, 1 - vxor 7, 7, 26 - vperm 3, 10, 9, 3 - vxor 4, 4, 2 - vperm 2, 10, 9, 4 - vxor 3, 3, 1 - vxor 2, 2, 0 - vperm 4, 15, 9, 3 - vperm 1, 14, 9, 2 - vxor 1, 1, 4 - - - vxor 0, 1, 7 - vxor 7, 1, 7 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - - - - - -.align 4 -_vpaes_schedule_transform: - - vsrb 2, 0, 8 - - vperm 0, 12, 12, 0 - - vperm 2, 13, 13, 2 - vxor 0, 0, 2 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - - - - - - - - - - - - - - - - - - - -.align 4 -_vpaes_schedule_mangle: - - - bne 1, .Lschedule_mangle_dec - - - vxor 4, 0, 26 - addi 5, 5, 16 - vperm 4, 4, 4, 25 - vperm 1, 4, 4, 25 - vperm 3, 1, 1, 25 - vxor 4, 4, 1 - lvx 1, 8, 10 - vxor 3, 3, 4 - - vperm 3, 3, 3, 1 - addi 8, 8, -16 - andi. 8, 8, 0x30 - - - vperm 1, 3, 3, 29 - vsel 2, 28, 1, 30 - vor 28,1,1 - stvx 2, 0, 5 - blr - -.align 4 -.Lschedule_mangle_dec: - - - vsrb 1, 0, 8 - - - - vperm 2, 16, 16, 0 - - vperm 3, 17, 17, 1 - vxor 3, 3, 2 - vperm 3, 3, 9, 25 - - - vperm 2, 18, 18, 0 - vxor 2, 2, 3 - - vperm 3, 19, 19, 1 - vxor 3, 3, 2 - vperm 3, 3, 9, 25 - - - vperm 2, 20, 20, 0 - vxor 2, 2, 3 - - vperm 3, 21, 21, 1 - vxor 3, 3, 2 - - - vperm 2, 22, 22, 0 - vperm 3, 3, 9, 25 - - vperm 4, 23, 23, 1 - lvx 1, 8, 10 - vxor 2, 2, 3 - vxor 3, 4, 2 - - addi 5, 5, -16 - - vperm 3, 3, 3, 1 - addi 8, 8, -16 - andi. 8, 8, 0x30 - - - vperm 1, 3, 3, 29 - vsel 2, 28, 1, 30 - vor 28,1,1 - stvx 2, 0, 5 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.globl vpaes_set_encrypt_key -.type vpaes_set_encrypt_key,@function -.align 5 -vpaes_set_encrypt_key: -.localentry vpaes_set_encrypt_key,0 - - stdu 1,-256(1) - li 10,63 - li 11,79 - mflr 0 - li 6,-1 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 6,252(1) - li 7, -1 - std 0, 272(1) - or 7,7,7 - - srwi 9, 4, 5 - addi 9, 9, 6 - stw 9, 240(5) - - cmplw 1,4,4 - li 8, 0x30 - bl _vpaes_schedule_core - - ld 0, 272(1) - li 10,63 - li 11,79 - or 6,6,6 - mtlr 0 - xor 3, 3, 3 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - addi 1,1,256 - blr -.long 0 -.byte 0,12,0x04,1,0x80,0,3,0 -.long 0 -.size vpaes_set_encrypt_key,.-vpaes_set_encrypt_key - -.globl vpaes_set_decrypt_key -.type vpaes_set_decrypt_key,@function -.align 4 -vpaes_set_decrypt_key: -.localentry vpaes_set_decrypt_key,0 - - stdu 1,-256(1) - li 10,63 - li 11,79 - mflr 0 - li 6,-1 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 6,252(1) - li 7, -1 - std 0, 272(1) - or 7,7,7 - - srwi 9, 4, 5 - addi 9, 9, 6 - stw 9, 240(5) - - slwi 9, 9, 4 - add 5, 5, 9 - - cmplwi 1, 4, 0 - srwi 8, 4, 1 - andi. 8, 8, 32 - xori 8, 8, 32 - bl _vpaes_schedule_core - - ld 0, 272(1) - li 10,63 - li 11,79 - or 6,6,6 - mtlr 0 - xor 3, 3, 3 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - addi 1,1,256 - blr -.long 0 -.byte 0,12,0x04,1,0x80,0,3,0 -.long 0 -.size vpaes_set_decrypt_key,.-vpaes_set_decrypt_key diff --git a/sys/crypto/openssl/powerpc64/x25519-ppc64.S b/sys/crypto/openssl/powerpc64/x25519-ppc64.S deleted file mode 100644 index 17762f84c23..00000000000 --- a/sys/crypto/openssl/powerpc64/x25519-ppc64.S +++ /dev/null @@ -1,349 +0,0 @@ -/* Do not modify. This file is auto-generated from x25519-ppc64.pl. */ -.abiversion 2 -.text - -.globl x25519_fe51_mul -.type x25519_fe51_mul,@function -.type x25519_fe51_mul,@function -.align 5 -x25519_fe51_mul: -.localentry x25519_fe51_mul,0 - - stdu 1,-144(1) - std 21,56(1) - std 22,64(1) - std 23,72(1) - std 24,80(1) - std 25,88(1) - std 26,96(1) - std 27,104(1) - std 28,112(1) - std 29,120(1) - std 30,128(1) - std 31,136(1) - - ld 6,0(5) - ld 7,0(4) - ld 8,8(4) - ld 9,16(4) - ld 10,24(4) - ld 11,32(4) - - mulld 22,7,6 - mulhdu 23,7,6 - - mulld 24,8,6 - mulhdu 25,8,6 - - mulld 30,11,6 - mulhdu 31,11,6 - ld 4,8(5) - mulli 11,11,19 - - mulld 26,9,6 - mulhdu 27,9,6 - - mulld 28,10,6 - mulhdu 29,10,6 - mulld 12,11,4 - mulhdu 21,11,4 - addc 22,22,12 - adde 23,23,21 - - mulld 12,7,4 - mulhdu 21,7,4 - addc 24,24,12 - adde 25,25,21 - - mulld 12,10,4 - mulhdu 21,10,4 - ld 6,16(5) - mulli 10,10,19 - addc 30,30,12 - adde 31,31,21 - - mulld 12,8,4 - mulhdu 21,8,4 - addc 26,26,12 - adde 27,27,21 - - mulld 12,9,4 - mulhdu 21,9,4 - addc 28,28,12 - adde 29,29,21 - mulld 12,10,6 - mulhdu 21,10,6 - addc 22,22,12 - adde 23,23,21 - - mulld 12,11,6 - mulhdu 21,11,6 - addc 24,24,12 - adde 25,25,21 - - mulld 12,9,6 - mulhdu 21,9,6 - ld 4,24(5) - mulli 9,9,19 - addc 30,30,12 - adde 31,31,21 - - mulld 12,7,6 - mulhdu 21,7,6 - addc 26,26,12 - adde 27,27,21 - - mulld 12,8,6 - mulhdu 21,8,6 - addc 28,28,12 - adde 29,29,21 - mulld 12,9,4 - mulhdu 21,9,4 - addc 22,22,12 - adde 23,23,21 - - mulld 12,10,4 - mulhdu 21,10,4 - addc 24,24,12 - adde 25,25,21 - - mulld 12,8,4 - mulhdu 21,8,4 - ld 6,32(5) - mulli 8,8,19 - addc 30,30,12 - adde 31,31,21 - - mulld 12,11,4 - mulhdu 21,11,4 - addc 26,26,12 - adde 27,27,21 - - mulld 12,7,4 - mulhdu 21,7,4 - addc 28,28,12 - adde 29,29,21 - mulld 12,8,6 - mulhdu 21,8,6 - addc 22,22,12 - adde 23,23,21 - - mulld 12,9,6 - mulhdu 21,9,6 - addc 24,24,12 - adde 25,25,21 - - mulld 12,10,6 - mulhdu 21,10,6 - addc 26,26,12 - adde 27,27,21 - - mulld 12,11,6 - mulhdu 21,11,6 - addc 28,28,12 - adde 29,29,21 - - mulld 12,7,6 - mulhdu 21,7,6 - addc 30,30,12 - adde 31,31,21 - -.Lfe51_reduce: - li 0,-1 - srdi 0,0,13 - - srdi 12,26,51 - and 9,26,0 - insrdi 12,27,51,0 - srdi 21,22,51 - and 7,22,0 - insrdi 21,23,51,0 - addc 28,28,12 - addze 29,29 - addc 24,24,21 - addze 25,25 - - srdi 12,28,51 - and 10,28,0 - insrdi 12,29,51,0 - srdi 21,24,51 - and 8,24,0 - insrdi 21,25,51,0 - addc 30,30,12 - addze 31,31 - add 9,9,21 - - srdi 12,30,51 - and 11,30,0 - insrdi 12,31,51,0 - mulli 12,12,19 - - add 7,7,12 - - srdi 21,9,51 - and 9,9,0 - add 10,10,21 - - srdi 12,7,51 - and 7,7,0 - add 8,8,12 - - std 9,16(3) - std 10,24(3) - std 11,32(3) - std 7,0(3) - std 8,8(3) - - ld 21,56(1) - ld 22,64(1) - ld 23,72(1) - ld 24,80(1) - ld 25,88(1) - ld 26,96(1) - ld 27,104(1) - ld 28,112(1) - ld 29,120(1) - ld 30,128(1) - ld 31,136(1) - addi 1,1,144 - blr -.long 0 -.byte 0,12,4,0,0x80,11,3,0 -.long 0 -.size x25519_fe51_mul,.-x25519_fe51_mul -.globl x25519_fe51_sqr -.type x25519_fe51_sqr,@function -.type x25519_fe51_sqr,@function -.align 5 -x25519_fe51_sqr: -.localentry x25519_fe51_sqr,0 - - stdu 1,-144(1) - std 21,56(1) - std 22,64(1) - std 23,72(1) - std 24,80(1) - std 25,88(1) - std 26,96(1) - std 27,104(1) - std 28,112(1) - std 29,120(1) - std 30,128(1) - std 31,136(1) - - ld 7,0(4) - ld 8,8(4) - ld 9,16(4) - ld 10,24(4) - ld 11,32(4) - - add 6,7,7 - mulli 21,11,19 - - mulld 22,7,7 - mulhdu 23,7,7 - mulld 24,8,6 - mulhdu 25,8,6 - mulld 26,9,6 - mulhdu 27,9,6 - mulld 28,10,6 - mulhdu 29,10,6 - mulld 30,11,6 - mulhdu 31,11,6 - add 6,8,8 - mulld 12,11,21 - mulhdu 11,11,21 - addc 28,28,12 - adde 29,29,11 - - mulli 5,10,19 - - mulld 12,8,8 - mulhdu 11,8,8 - addc 26,26,12 - adde 27,27,11 - mulld 12,9,6 - mulhdu 11,9,6 - addc 28,28,12 - adde 29,29,11 - mulld 12,10,6 - mulhdu 11,10,6 - addc 30,30,12 - adde 31,31,11 - mulld 12,21,6 - mulhdu 11,21,6 - add 6,10,10 - addc 22,22,12 - adde 23,23,11 - mulld 12,10,5 - mulhdu 10,10,5 - addc 24,24,12 - adde 25,25,10 - mulld 12,6,21 - mulhdu 10,6,21 - add 6,9,9 - addc 26,26,12 - adde 27,27,10 - - mulld 12,9,9 - mulhdu 10,9,9 - addc 30,30,12 - adde 31,31,10 - mulld 12,5,6 - mulhdu 10,5,6 - addc 22,22,12 - adde 23,23,10 - mulld 12,21,6 - mulhdu 10,21,6 - addc 24,24,12 - adde 25,25,10 - - b .Lfe51_reduce -.long 0 -.byte 0,12,4,0,0x80,11,2,0 -.long 0 -.size x25519_fe51_sqr,.-x25519_fe51_sqr -.globl x25519_fe51_mul121666 -.type x25519_fe51_mul121666,@function -.type x25519_fe51_mul121666,@function -.align 5 -x25519_fe51_mul121666: -.localentry x25519_fe51_mul121666,0 - - stdu 1,-144(1) - std 21,56(1) - std 22,64(1) - std 23,72(1) - std 24,80(1) - std 25,88(1) - std 26,96(1) - std 27,104(1) - std 28,112(1) - std 29,120(1) - std 30,128(1) - std 31,136(1) - - lis 6,1 - ori 6,6,56130 - ld 7,0(4) - ld 8,8(4) - ld 9,16(4) - ld 10,24(4) - ld 11,32(4) - - mulld 22,7,6 - mulhdu 23,7,6 - mulld 24,8,6 - mulhdu 25,8,6 - mulld 26,9,6 - mulhdu 27,9,6 - mulld 28,10,6 - mulhdu 29,10,6 - mulld 30,11,6 - mulhdu 31,11,6 - - b .Lfe51_reduce -.long 0 -.byte 0,12,4,0,0x80,11,2,0 -.long 0 -.size x25519_fe51_mul121666,.-x25519_fe51_mul121666 diff --git a/sys/crypto/openssl/powerpc64le/aes-ppc.S b/sys/crypto/openssl/powerpc64le/aes-ppc.S deleted file mode 100644 index cfbe7579524..00000000000 --- a/sys/crypto/openssl/powerpc64le/aes-ppc.S +++ /dev/null @@ -1,1581 +0,0 @@ -/* Do not modify. This file is auto-generated from aes-ppc.pl. */ -.machine "any" -.abiversion 2 -.text - -.align 7 -.LAES_Te: - mflr 0 - bcl 20,31,$+4 - mflr 3 - addi 3,3,120 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.LAES_Td: - mflr 0 - bcl 20,31,$+4 - mflr 3 - addi 3,3,2360 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.long 0xc66363a5,0xc66363a5 -.long 0xf87c7c84,0xf87c7c84 -.long 0xee777799,0xee777799 -.long 0xf67b7b8d,0xf67b7b8d -.long 0xfff2f20d,0xfff2f20d -.long 0xd66b6bbd,0xd66b6bbd -.long 0xde6f6fb1,0xde6f6fb1 -.long 0x91c5c554,0x91c5c554 -.long 0x60303050,0x60303050 -.long 0x02010103,0x02010103 -.long 0xce6767a9,0xce6767a9 -.long 0x562b2b7d,0x562b2b7d -.long 0xe7fefe19,0xe7fefe19 -.long 0xb5d7d762,0xb5d7d762 -.long 0x4dababe6,0x4dababe6 -.long 0xec76769a,0xec76769a -.long 0x8fcaca45,0x8fcaca45 -.long 0x1f82829d,0x1f82829d -.long 0x89c9c940,0x89c9c940 -.long 0xfa7d7d87,0xfa7d7d87 -.long 0xeffafa15,0xeffafa15 -.long 0xb25959eb,0xb25959eb -.long 0x8e4747c9,0x8e4747c9 -.long 0xfbf0f00b,0xfbf0f00b -.long 0x41adadec,0x41adadec -.long 0xb3d4d467,0xb3d4d467 -.long 0x5fa2a2fd,0x5fa2a2fd -.long 0x45afafea,0x45afafea -.long 0x239c9cbf,0x239c9cbf -.long 0x53a4a4f7,0x53a4a4f7 -.long 0xe4727296,0xe4727296 -.long 0x9bc0c05b,0x9bc0c05b -.long 0x75b7b7c2,0x75b7b7c2 -.long 0xe1fdfd1c,0xe1fdfd1c -.long 0x3d9393ae,0x3d9393ae -.long 0x4c26266a,0x4c26266a -.long 0x6c36365a,0x6c36365a -.long 0x7e3f3f41,0x7e3f3f41 -.long 0xf5f7f702,0xf5f7f702 -.long 0x83cccc4f,0x83cccc4f -.long 0x6834345c,0x6834345c -.long 0x51a5a5f4,0x51a5a5f4 -.long 0xd1e5e534,0xd1e5e534 -.long 0xf9f1f108,0xf9f1f108 -.long 0xe2717193,0xe2717193 -.long 0xabd8d873,0xabd8d873 -.long 0x62313153,0x62313153 -.long 0x2a15153f,0x2a15153f -.long 0x0804040c,0x0804040c -.long 0x95c7c752,0x95c7c752 -.long 0x46232365,0x46232365 -.long 0x9dc3c35e,0x9dc3c35e -.long 0x30181828,0x30181828 -.long 0x379696a1,0x379696a1 -.long 0x0a05050f,0x0a05050f -.long 0x2f9a9ab5,0x2f9a9ab5 -.long 0x0e070709,0x0e070709 -.long 0x24121236,0x24121236 -.long 0x1b80809b,0x1b80809b -.long 0xdfe2e23d,0xdfe2e23d -.long 0xcdebeb26,0xcdebeb26 -.long 0x4e272769,0x4e272769 -.long 0x7fb2b2cd,0x7fb2b2cd -.long 0xea75759f,0xea75759f -.long 0x1209091b,0x1209091b -.long 0x1d83839e,0x1d83839e -.long 0x582c2c74,0x582c2c74 -.long 0x341a1a2e,0x341a1a2e -.long 0x361b1b2d,0x361b1b2d -.long 0xdc6e6eb2,0xdc6e6eb2 -.long 0xb45a5aee,0xb45a5aee -.long 0x5ba0a0fb,0x5ba0a0fb -.long 0xa45252f6,0xa45252f6 -.long 0x763b3b4d,0x763b3b4d -.long 0xb7d6d661,0xb7d6d661 -.long 0x7db3b3ce,0x7db3b3ce -.long 0x5229297b,0x5229297b -.long 0xdde3e33e,0xdde3e33e -.long 0x5e2f2f71,0x5e2f2f71 -.long 0x13848497,0x13848497 -.long 0xa65353f5,0xa65353f5 -.long 0xb9d1d168,0xb9d1d168 -.long 0x00000000,0x00000000 -.long 0xc1eded2c,0xc1eded2c -.long 0x40202060,0x40202060 -.long 0xe3fcfc1f,0xe3fcfc1f -.long 0x79b1b1c8,0x79b1b1c8 -.long 0xb65b5bed,0xb65b5bed -.long 0xd46a6abe,0xd46a6abe -.long 0x8dcbcb46,0x8dcbcb46 -.long 0x67bebed9,0x67bebed9 -.long 0x7239394b,0x7239394b -.long 0x944a4ade,0x944a4ade -.long 0x984c4cd4,0x984c4cd4 -.long 0xb05858e8,0xb05858e8 -.long 0x85cfcf4a,0x85cfcf4a -.long 0xbbd0d06b,0xbbd0d06b -.long 0xc5efef2a,0xc5efef2a -.long 0x4faaaae5,0x4faaaae5 -.long 0xedfbfb16,0xedfbfb16 -.long 0x864343c5,0x864343c5 -.long 0x9a4d4dd7,0x9a4d4dd7 -.long 0x66333355,0x66333355 -.long 0x11858594,0x11858594 -.long 0x8a4545cf,0x8a4545cf -.long 0xe9f9f910,0xe9f9f910 -.long 0x04020206,0x04020206 -.long 0xfe7f7f81,0xfe7f7f81 -.long 0xa05050f0,0xa05050f0 -.long 0x783c3c44,0x783c3c44 -.long 0x259f9fba,0x259f9fba -.long 0x4ba8a8e3,0x4ba8a8e3 -.long 0xa25151f3,0xa25151f3 -.long 0x5da3a3fe,0x5da3a3fe -.long 0x804040c0,0x804040c0 -.long 0x058f8f8a,0x058f8f8a -.long 0x3f9292ad,0x3f9292ad -.long 0x219d9dbc,0x219d9dbc -.long 0x70383848,0x70383848 -.long 0xf1f5f504,0xf1f5f504 -.long 0x63bcbcdf,0x63bcbcdf -.long 0x77b6b6c1,0x77b6b6c1 -.long 0xafdada75,0xafdada75 -.long 0x42212163,0x42212163 -.long 0x20101030,0x20101030 -.long 0xe5ffff1a,0xe5ffff1a -.long 0xfdf3f30e,0xfdf3f30e -.long 0xbfd2d26d,0xbfd2d26d -.long 0x81cdcd4c,0x81cdcd4c -.long 0x180c0c14,0x180c0c14 -.long 0x26131335,0x26131335 -.long 0xc3ecec2f,0xc3ecec2f -.long 0xbe5f5fe1,0xbe5f5fe1 -.long 0x359797a2,0x359797a2 -.long 0x884444cc,0x884444cc -.long 0x2e171739,0x2e171739 -.long 0x93c4c457,0x93c4c457 -.long 0x55a7a7f2,0x55a7a7f2 -.long 0xfc7e7e82,0xfc7e7e82 -.long 0x7a3d3d47,0x7a3d3d47 -.long 0xc86464ac,0xc86464ac -.long 0xba5d5de7,0xba5d5de7 -.long 0x3219192b,0x3219192b -.long 0xe6737395,0xe6737395 -.long 0xc06060a0,0xc06060a0 -.long 0x19818198,0x19818198 -.long 0x9e4f4fd1,0x9e4f4fd1 -.long 0xa3dcdc7f,0xa3dcdc7f -.long 0x44222266,0x44222266 -.long 0x542a2a7e,0x542a2a7e -.long 0x3b9090ab,0x3b9090ab -.long 0x0b888883,0x0b888883 -.long 0x8c4646ca,0x8c4646ca -.long 0xc7eeee29,0xc7eeee29 -.long 0x6bb8b8d3,0x6bb8b8d3 -.long 0x2814143c,0x2814143c -.long 0xa7dede79,0xa7dede79 -.long 0xbc5e5ee2,0xbc5e5ee2 -.long 0x160b0b1d,0x160b0b1d -.long 0xaddbdb76,0xaddbdb76 -.long 0xdbe0e03b,0xdbe0e03b -.long 0x64323256,0x64323256 -.long 0x743a3a4e,0x743a3a4e -.long 0x140a0a1e,0x140a0a1e -.long 0x924949db,0x924949db -.long 0x0c06060a,0x0c06060a -.long 0x4824246c,0x4824246c -.long 0xb85c5ce4,0xb85c5ce4 -.long 0x9fc2c25d,0x9fc2c25d -.long 0xbdd3d36e,0xbdd3d36e -.long 0x43acacef,0x43acacef -.long 0xc46262a6,0xc46262a6 -.long 0x399191a8,0x399191a8 -.long 0x319595a4,0x319595a4 -.long 0xd3e4e437,0xd3e4e437 -.long 0xf279798b,0xf279798b -.long 0xd5e7e732,0xd5e7e732 -.long 0x8bc8c843,0x8bc8c843 -.long 0x6e373759,0x6e373759 -.long 0xda6d6db7,0xda6d6db7 -.long 0x018d8d8c,0x018d8d8c -.long 0xb1d5d564,0xb1d5d564 -.long 0x9c4e4ed2,0x9c4e4ed2 -.long 0x49a9a9e0,0x49a9a9e0 -.long 0xd86c6cb4,0xd86c6cb4 -.long 0xac5656fa,0xac5656fa -.long 0xf3f4f407,0xf3f4f407 -.long 0xcfeaea25,0xcfeaea25 -.long 0xca6565af,0xca6565af -.long 0xf47a7a8e,0xf47a7a8e -.long 0x47aeaee9,0x47aeaee9 -.long 0x10080818,0x10080818 -.long 0x6fbabad5,0x6fbabad5 -.long 0xf0787888,0xf0787888 -.long 0x4a25256f,0x4a25256f -.long 0x5c2e2e72,0x5c2e2e72 -.long 0x381c1c24,0x381c1c24 -.long 0x57a6a6f1,0x57a6a6f1 -.long 0x73b4b4c7,0x73b4b4c7 -.long 0x97c6c651,0x97c6c651 -.long 0xcbe8e823,0xcbe8e823 -.long 0xa1dddd7c,0xa1dddd7c -.long 0xe874749c,0xe874749c -.long 0x3e1f1f21,0x3e1f1f21 -.long 0x964b4bdd,0x964b4bdd -.long 0x61bdbddc,0x61bdbddc -.long 0x0d8b8b86,0x0d8b8b86 -.long 0x0f8a8a85,0x0f8a8a85 -.long 0xe0707090,0xe0707090 -.long 0x7c3e3e42,0x7c3e3e42 -.long 0x71b5b5c4,0x71b5b5c4 -.long 0xcc6666aa,0xcc6666aa -.long 0x904848d8,0x904848d8 -.long 0x06030305,0x06030305 -.long 0xf7f6f601,0xf7f6f601 -.long 0x1c0e0e12,0x1c0e0e12 -.long 0xc26161a3,0xc26161a3 -.long 0x6a35355f,0x6a35355f -.long 0xae5757f9,0xae5757f9 -.long 0x69b9b9d0,0x69b9b9d0 -.long 0x17868691,0x17868691 -.long 0x99c1c158,0x99c1c158 -.long 0x3a1d1d27,0x3a1d1d27 -.long 0x279e9eb9,0x279e9eb9 -.long 0xd9e1e138,0xd9e1e138 -.long 0xebf8f813,0xebf8f813 -.long 0x2b9898b3,0x2b9898b3 -.long 0x22111133,0x22111133 -.long 0xd26969bb,0xd26969bb -.long 0xa9d9d970,0xa9d9d970 -.long 0x078e8e89,0x078e8e89 -.long 0x339494a7,0x339494a7 -.long 0x2d9b9bb6,0x2d9b9bb6 -.long 0x3c1e1e22,0x3c1e1e22 -.long 0x15878792,0x15878792 -.long 0xc9e9e920,0xc9e9e920 -.long 0x87cece49,0x87cece49 -.long 0xaa5555ff,0xaa5555ff -.long 0x50282878,0x50282878 -.long 0xa5dfdf7a,0xa5dfdf7a -.long 0x038c8c8f,0x038c8c8f -.long 0x59a1a1f8,0x59a1a1f8 -.long 0x09898980,0x09898980 -.long 0x1a0d0d17,0x1a0d0d17 -.long 0x65bfbfda,0x65bfbfda -.long 0xd7e6e631,0xd7e6e631 -.long 0x844242c6,0x844242c6 -.long 0xd06868b8,0xd06868b8 -.long 0x824141c3,0x824141c3 -.long 0x299999b0,0x299999b0 -.long 0x5a2d2d77,0x5a2d2d77 -.long 0x1e0f0f11,0x1e0f0f11 -.long 0x7bb0b0cb,0x7bb0b0cb -.long 0xa85454fc,0xa85454fc -.long 0x6dbbbbd6,0x6dbbbbd6 -.long 0x2c16163a,0x2c16163a -.byte 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5 -.byte 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76 -.byte 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0 -.byte 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0 -.byte 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc -.byte 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15 -.byte 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a -.byte 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75 -.byte 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0 -.byte 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84 -.byte 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b -.byte 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf -.byte 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85 -.byte 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8 -.byte 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5 -.byte 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2 -.byte 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17 -.byte 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73 -.byte 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88 -.byte 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb -.byte 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c -.byte 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79 -.byte 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9 -.byte 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08 -.byte 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6 -.byte 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a -.byte 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e -.byte 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e -.byte 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94 -.byte 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf -.byte 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68 -.byte 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16 -.long 0x51f4a750,0x51f4a750 -.long 0x7e416553,0x7e416553 -.long 0x1a17a4c3,0x1a17a4c3 -.long 0x3a275e96,0x3a275e96 -.long 0x3bab6bcb,0x3bab6bcb -.long 0x1f9d45f1,0x1f9d45f1 -.long 0xacfa58ab,0xacfa58ab -.long 0x4be30393,0x4be30393 -.long 0x2030fa55,0x2030fa55 -.long 0xad766df6,0xad766df6 -.long 0x88cc7691,0x88cc7691 -.long 0xf5024c25,0xf5024c25 -.long 0x4fe5d7fc,0x4fe5d7fc -.long 0xc52acbd7,0xc52acbd7 -.long 0x26354480,0x26354480 -.long 0xb562a38f,0xb562a38f -.long 0xdeb15a49,0xdeb15a49 -.long 0x25ba1b67,0x25ba1b67 -.long 0x45ea0e98,0x45ea0e98 -.long 0x5dfec0e1,0x5dfec0e1 -.long 0xc32f7502,0xc32f7502 -.long 0x814cf012,0x814cf012 -.long 0x8d4697a3,0x8d4697a3 -.long 0x6bd3f9c6,0x6bd3f9c6 -.long 0x038f5fe7,0x038f5fe7 -.long 0x15929c95,0x15929c95 -.long 0xbf6d7aeb,0xbf6d7aeb -.long 0x955259da,0x955259da -.long 0xd4be832d,0xd4be832d -.long 0x587421d3,0x587421d3 -.long 0x49e06929,0x49e06929 -.long 0x8ec9c844,0x8ec9c844 -.long 0x75c2896a,0x75c2896a -.long 0xf48e7978,0xf48e7978 -.long 0x99583e6b,0x99583e6b -.long 0x27b971dd,0x27b971dd -.long 0xbee14fb6,0xbee14fb6 -.long 0xf088ad17,0xf088ad17 -.long 0xc920ac66,0xc920ac66 -.long 0x7dce3ab4,0x7dce3ab4 -.long 0x63df4a18,0x63df4a18 -.long 0xe51a3182,0xe51a3182 -.long 0x97513360,0x97513360 -.long 0x62537f45,0x62537f45 -.long 0xb16477e0,0xb16477e0 -.long 0xbb6bae84,0xbb6bae84 -.long 0xfe81a01c,0xfe81a01c -.long 0xf9082b94,0xf9082b94 -.long 0x70486858,0x70486858 -.long 0x8f45fd19,0x8f45fd19 -.long 0x94de6c87,0x94de6c87 -.long 0x527bf8b7,0x527bf8b7 -.long 0xab73d323,0xab73d323 -.long 0x724b02e2,0x724b02e2 -.long 0xe31f8f57,0xe31f8f57 -.long 0x6655ab2a,0x6655ab2a -.long 0xb2eb2807,0xb2eb2807 -.long 0x2fb5c203,0x2fb5c203 -.long 0x86c57b9a,0x86c57b9a -.long 0xd33708a5,0xd33708a5 -.long 0x302887f2,0x302887f2 -.long 0x23bfa5b2,0x23bfa5b2 -.long 0x02036aba,0x02036aba -.long 0xed16825c,0xed16825c -.long 0x8acf1c2b,0x8acf1c2b -.long 0xa779b492,0xa779b492 -.long 0xf307f2f0,0xf307f2f0 -.long 0x4e69e2a1,0x4e69e2a1 -.long 0x65daf4cd,0x65daf4cd -.long 0x0605bed5,0x0605bed5 -.long 0xd134621f,0xd134621f -.long 0xc4a6fe8a,0xc4a6fe8a -.long 0x342e539d,0x342e539d -.long 0xa2f355a0,0xa2f355a0 -.long 0x058ae132,0x058ae132 -.long 0xa4f6eb75,0xa4f6eb75 -.long 0x0b83ec39,0x0b83ec39 -.long 0x4060efaa,0x4060efaa -.long 0x5e719f06,0x5e719f06 -.long 0xbd6e1051,0xbd6e1051 -.long 0x3e218af9,0x3e218af9 -.long 0x96dd063d,0x96dd063d -.long 0xdd3e05ae,0xdd3e05ae -.long 0x4de6bd46,0x4de6bd46 -.long 0x91548db5,0x91548db5 -.long 0x71c45d05,0x71c45d05 -.long 0x0406d46f,0x0406d46f -.long 0x605015ff,0x605015ff -.long 0x1998fb24,0x1998fb24 -.long 0xd6bde997,0xd6bde997 -.long 0x894043cc,0x894043cc -.long 0x67d99e77,0x67d99e77 -.long 0xb0e842bd,0xb0e842bd -.long 0x07898b88,0x07898b88 -.long 0xe7195b38,0xe7195b38 -.long 0x79c8eedb,0x79c8eedb -.long 0xa17c0a47,0xa17c0a47 -.long 0x7c420fe9,0x7c420fe9 -.long 0xf8841ec9,0xf8841ec9 -.long 0x00000000,0x00000000 -.long 0x09808683,0x09808683 -.long 0x322bed48,0x322bed48 -.long 0x1e1170ac,0x1e1170ac -.long 0x6c5a724e,0x6c5a724e -.long 0xfd0efffb,0xfd0efffb -.long 0x0f853856,0x0f853856 -.long 0x3daed51e,0x3daed51e -.long 0x362d3927,0x362d3927 -.long 0x0a0fd964,0x0a0fd964 -.long 0x685ca621,0x685ca621 -.long 0x9b5b54d1,0x9b5b54d1 -.long 0x24362e3a,0x24362e3a -.long 0x0c0a67b1,0x0c0a67b1 -.long 0x9357e70f,0x9357e70f -.long 0xb4ee96d2,0xb4ee96d2 -.long 0x1b9b919e,0x1b9b919e -.long 0x80c0c54f,0x80c0c54f -.long 0x61dc20a2,0x61dc20a2 -.long 0x5a774b69,0x5a774b69 -.long 0x1c121a16,0x1c121a16 -.long 0xe293ba0a,0xe293ba0a -.long 0xc0a02ae5,0xc0a02ae5 -.long 0x3c22e043,0x3c22e043 -.long 0x121b171d,0x121b171d -.long 0x0e090d0b,0x0e090d0b -.long 0xf28bc7ad,0xf28bc7ad -.long 0x2db6a8b9,0x2db6a8b9 -.long 0x141ea9c8,0x141ea9c8 -.long 0x57f11985,0x57f11985 -.long 0xaf75074c,0xaf75074c -.long 0xee99ddbb,0xee99ddbb -.long 0xa37f60fd,0xa37f60fd -.long 0xf701269f,0xf701269f -.long 0x5c72f5bc,0x5c72f5bc -.long 0x44663bc5,0x44663bc5 -.long 0x5bfb7e34,0x5bfb7e34 -.long 0x8b432976,0x8b432976 -.long 0xcb23c6dc,0xcb23c6dc -.long 0xb6edfc68,0xb6edfc68 -.long 0xb8e4f163,0xb8e4f163 -.long 0xd731dcca,0xd731dcca -.long 0x42638510,0x42638510 -.long 0x13972240,0x13972240 -.long 0x84c61120,0x84c61120 -.long 0x854a247d,0x854a247d -.long 0xd2bb3df8,0xd2bb3df8 -.long 0xaef93211,0xaef93211 -.long 0xc729a16d,0xc729a16d -.long 0x1d9e2f4b,0x1d9e2f4b -.long 0xdcb230f3,0xdcb230f3 -.long 0x0d8652ec,0x0d8652ec -.long 0x77c1e3d0,0x77c1e3d0 -.long 0x2bb3166c,0x2bb3166c -.long 0xa970b999,0xa970b999 -.long 0x119448fa,0x119448fa -.long 0x47e96422,0x47e96422 -.long 0xa8fc8cc4,0xa8fc8cc4 -.long 0xa0f03f1a,0xa0f03f1a -.long 0x567d2cd8,0x567d2cd8 -.long 0x223390ef,0x223390ef -.long 0x87494ec7,0x87494ec7 -.long 0xd938d1c1,0xd938d1c1 -.long 0x8ccaa2fe,0x8ccaa2fe -.long 0x98d40b36,0x98d40b36 -.long 0xa6f581cf,0xa6f581cf -.long 0xa57ade28,0xa57ade28 -.long 0xdab78e26,0xdab78e26 -.long 0x3fadbfa4,0x3fadbfa4 -.long 0x2c3a9de4,0x2c3a9de4 -.long 0x5078920d,0x5078920d -.long 0x6a5fcc9b,0x6a5fcc9b -.long 0x547e4662,0x547e4662 -.long 0xf68d13c2,0xf68d13c2 -.long 0x90d8b8e8,0x90d8b8e8 -.long 0x2e39f75e,0x2e39f75e -.long 0x82c3aff5,0x82c3aff5 -.long 0x9f5d80be,0x9f5d80be -.long 0x69d0937c,0x69d0937c -.long 0x6fd52da9,0x6fd52da9 -.long 0xcf2512b3,0xcf2512b3 -.long 0xc8ac993b,0xc8ac993b -.long 0x10187da7,0x10187da7 -.long 0xe89c636e,0xe89c636e -.long 0xdb3bbb7b,0xdb3bbb7b -.long 0xcd267809,0xcd267809 -.long 0x6e5918f4,0x6e5918f4 -.long 0xec9ab701,0xec9ab701 -.long 0x834f9aa8,0x834f9aa8 -.long 0xe6956e65,0xe6956e65 -.long 0xaaffe67e,0xaaffe67e -.long 0x21bccf08,0x21bccf08 -.long 0xef15e8e6,0xef15e8e6 -.long 0xbae79bd9,0xbae79bd9 -.long 0x4a6f36ce,0x4a6f36ce -.long 0xea9f09d4,0xea9f09d4 -.long 0x29b07cd6,0x29b07cd6 -.long 0x31a4b2af,0x31a4b2af -.long 0x2a3f2331,0x2a3f2331 -.long 0xc6a59430,0xc6a59430 -.long 0x35a266c0,0x35a266c0 -.long 0x744ebc37,0x744ebc37 -.long 0xfc82caa6,0xfc82caa6 -.long 0xe090d0b0,0xe090d0b0 -.long 0x33a7d815,0x33a7d815 -.long 0xf104984a,0xf104984a -.long 0x41ecdaf7,0x41ecdaf7 -.long 0x7fcd500e,0x7fcd500e -.long 0x1791f62f,0x1791f62f -.long 0x764dd68d,0x764dd68d -.long 0x43efb04d,0x43efb04d -.long 0xccaa4d54,0xccaa4d54 -.long 0xe49604df,0xe49604df -.long 0x9ed1b5e3,0x9ed1b5e3 -.long 0x4c6a881b,0x4c6a881b -.long 0xc12c1fb8,0xc12c1fb8 -.long 0x4665517f,0x4665517f -.long 0x9d5eea04,0x9d5eea04 -.long 0x018c355d,0x018c355d -.long 0xfa877473,0xfa877473 -.long 0xfb0b412e,0xfb0b412e -.long 0xb3671d5a,0xb3671d5a -.long 0x92dbd252,0x92dbd252 -.long 0xe9105633,0xe9105633 -.long 0x6dd64713,0x6dd64713 -.long 0x9ad7618c,0x9ad7618c -.long 0x37a10c7a,0x37a10c7a -.long 0x59f8148e,0x59f8148e -.long 0xeb133c89,0xeb133c89 -.long 0xcea927ee,0xcea927ee -.long 0xb761c935,0xb761c935 -.long 0xe11ce5ed,0xe11ce5ed -.long 0x7a47b13c,0x7a47b13c -.long 0x9cd2df59,0x9cd2df59 -.long 0x55f2733f,0x55f2733f -.long 0x1814ce79,0x1814ce79 -.long 0x73c737bf,0x73c737bf -.long 0x53f7cdea,0x53f7cdea -.long 0x5ffdaa5b,0x5ffdaa5b -.long 0xdf3d6f14,0xdf3d6f14 -.long 0x7844db86,0x7844db86 -.long 0xcaaff381,0xcaaff381 -.long 0xb968c43e,0xb968c43e -.long 0x3824342c,0x3824342c -.long 0xc2a3405f,0xc2a3405f -.long 0x161dc372,0x161dc372 -.long 0xbce2250c,0xbce2250c -.long 0x283c498b,0x283c498b -.long 0xff0d9541,0xff0d9541 -.long 0x39a80171,0x39a80171 -.long 0x080cb3de,0x080cb3de -.long 0xd8b4e49c,0xd8b4e49c -.long 0x6456c190,0x6456c190 -.long 0x7bcb8461,0x7bcb8461 -.long 0xd532b670,0xd532b670 -.long 0x486c5c74,0x486c5c74 -.long 0xd0b85742,0xd0b85742 -.byte 0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38 -.byte 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb -.byte 0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87 -.byte 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb -.byte 0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d -.byte 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e -.byte 0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2 -.byte 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25 -.byte 0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16 -.byte 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92 -.byte 0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda -.byte 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84 -.byte 0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a -.byte 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06 -.byte 0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02 -.byte 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b -.byte 0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea -.byte 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73 -.byte 0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85 -.byte 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e -.byte 0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89 -.byte 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b -.byte 0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20 -.byte 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4 -.byte 0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31 -.byte 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f -.byte 0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d -.byte 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef -.byte 0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0 -.byte 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61 -.byte 0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26 -.byte 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d - - -.globl AES_encrypt -.type AES_encrypt,@function -.align 7 -AES_encrypt: -.localentry AES_encrypt,0 - - stdu 1,-256(1) - mflr 0 - - std 4,104(1) - std 14,112(1) - std 15,120(1) - std 16,128(1) - std 17,136(1) - std 18,144(1) - std 19,152(1) - std 20,160(1) - std 21,168(1) - std 22,176(1) - std 23,184(1) - std 24,192(1) - std 25,200(1) - std 26,208(1) - std 27,216(1) - std 28,224(1) - std 29,232(1) - std 30,240(1) - std 31,248(1) - std 0,272(1) - - andi. 12,3,3 - andi. 0,4,3 - or. 12,12,0 - bne .Lenc_unaligned - -.Lenc_unaligned_ok: - lwz 12,0(3) - lwz 0,4(3) - lwz 14,8(3) - lwz 15,12(3) - rotlwi 8,12,8 - rotlwi 9,0,8 - rotlwi 10,14,8 - rotlwi 11,15,8 - rlwimi 8,12,24,0,7 - rlwimi 9,0,24,0,7 - rlwimi 10,14,24,0,7 - rlwimi 11,15,24,0,7 - rlwimi 8,12,24,16,23 - rlwimi 9,0,24,16,23 - rlwimi 10,14,24,16,23 - rlwimi 11,15,24,16,23 - bl .LAES_Te - bl .Lppc_AES_encrypt_compact - ld 4,104(1) - rotlwi 12,8,8 - rotlwi 0,9,8 - rotlwi 14,10,8 - rotlwi 15,11,8 - rlwimi 12,8,24,0,7 - rlwimi 0,9,24,0,7 - rlwimi 14,10,24,0,7 - rlwimi 15,11,24,0,7 - rlwimi 12,8,24,16,23 - rlwimi 0,9,24,16,23 - rlwimi 14,10,24,16,23 - rlwimi 15,11,24,16,23 - stw 12,0(4) - stw 0,4(4) - stw 14,8(4) - stw 15,12(4) - b .Lenc_done - -.Lenc_unaligned: - subfic 12,3,4096 - subfic 0,4,4096 - andi. 12,12,4096-16 - beq .Lenc_xpage - andi. 0,0,4096-16 - bne .Lenc_unaligned_ok - -.Lenc_xpage: - lbz 16,0(3) - lbz 17,1(3) - lbz 18,2(3) - lbz 8,3(3) - lbz 20,4(3) - lbz 21,5(3) - lbz 22,6(3) - lbz 9,7(3) - lbz 24,8(3) - lbz 25,9(3) - lbz 26,10(3) - insrwi 8,16,8,0 - lbz 10,11(3) - insrwi 9,20,8,0 - lbz 28,12(3) - insrwi 8,17,8,8 - lbz 29,13(3) - insrwi 9,21,8,8 - lbz 30,14(3) - insrwi 8,18,8,16 - lbz 11,15(3) - insrwi 9,22,8,16 - insrwi 10,24,8,0 - insrwi 11,28,8,0 - insrwi 10,25,8,8 - insrwi 11,29,8,8 - insrwi 10,26,8,16 - insrwi 11,30,8,16 - - bl .LAES_Te - bl .Lppc_AES_encrypt_compact - ld 4,104(1) - - extrwi 16,8,8,0 - extrwi 17,8,8,8 - stb 16,0(4) - extrwi 18,8,8,16 - stb 17,1(4) - stb 18,2(4) - extrwi 20,9,8,0 - stb 8,3(4) - extrwi 21,9,8,8 - stb 20,4(4) - extrwi 22,9,8,16 - stb 21,5(4) - stb 22,6(4) - extrwi 24,10,8,0 - stb 9,7(4) - extrwi 25,10,8,8 - stb 24,8(4) - extrwi 26,10,8,16 - stb 25,9(4) - stb 26,10(4) - extrwi 28,11,8,0 - stb 10,11(4) - extrwi 29,11,8,8 - stb 28,12(4) - extrwi 30,11,8,16 - stb 29,13(4) - stb 30,14(4) - stb 11,15(4) - -.Lenc_done: - ld 0,272(1) - ld 14,112(1) - ld 15,120(1) - ld 16,128(1) - ld 17,136(1) - ld 18,144(1) - ld 19,152(1) - ld 20,160(1) - ld 21,168(1) - ld 22,176(1) - ld 23,184(1) - ld 24,192(1) - ld 25,200(1) - ld 26,208(1) - ld 27,216(1) - ld 28,224(1) - ld 29,232(1) - ld 30,240(1) - ld 31,248(1) - mtlr 0 - addi 1,1,256 - blr -.long 0 -.byte 0,12,4,1,0x80,18,3,0 -.long 0 - -.align 5 -.Lppc_AES_encrypt: - lwz 16,240(5) - addi 6,3,3 - lwz 12,0(5) - addi 7,3,2 - lwz 0,4(5) - addi 4,3,1 - lwz 14,8(5) - addi 16,16,-1 - lwz 15,12(5) - addi 5,5,16 - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - mtctr 16 -.align 4 -.Lenc_loop: - rlwinm 16,8,11,21,28 - rlwinm 17,9,11,21,28 - rlwinm 18,10,11,21,28 - rlwinm 19,11,11,21,28 - lwz 12,0(5) - rlwinm 20,9,19,21,28 - lwz 0,4(5) - rlwinm 21,10,19,21,28 - lwz 14,8(5) - rlwinm 22,11,19,21,28 - lwz 15,12(5) - rlwinm 23,8,19,21,28 - lwzx 16,3,16 - rlwinm 24,10,27,21,28 - lwzx 17,3,17 - rlwinm 25,11,27,21,28 - lwzx 18,3,18 - rlwinm 26,8,27,21,28 - lwzx 19,3,19 - rlwinm 27,9,27,21,28 - lwzx 20,6,20 - rlwinm 28,11,3,21,28 - lwzx 21,6,21 - rlwinm 29,8,3,21,28 - lwzx 22,6,22 - rlwinm 30,9,3,21,28 - lwzx 23,6,23 - rlwinm 31,10,3,21,28 - lwzx 24,7,24 - xor 12,12,16 - lwzx 25,7,25 - xor 0,0,17 - lwzx 26,7,26 - xor 14,14,18 - lwzx 27,7,27 - xor 15,15,19 - lwzx 28,4,28 - xor 12,12,20 - lwzx 29,4,29 - xor 0,0,21 - lwzx 30,4,30 - xor 14,14,22 - lwzx 31,4,31 - xor 15,15,23 - xor 12,12,24 - xor 0,0,25 - xor 14,14,26 - xor 15,15,27 - xor 8,12,28 - xor 9,0,29 - xor 10,14,30 - xor 11,15,31 - addi 5,5,16 - bdnz .Lenc_loop - - addi 7,3,2048 - nop - lwz 12,0(5) - rlwinm 16,8,8,24,31 - lwz 0,4(5) - rlwinm 17,9,8,24,31 - lwz 14,8(5) - rlwinm 18,10,8,24,31 - lwz 15,12(5) - rlwinm 19,11,8,24,31 - lwz 24,2048(3) - rlwinm 20,9,16,24,31 - lwz 25,2080(3) - rlwinm 21,10,16,24,31 - lwz 26,2112(3) - rlwinm 22,11,16,24,31 - lwz 27,2144(3) - rlwinm 23,8,16,24,31 - lwz 28,2176(3) - rlwinm 24,10,24,24,31 - lwz 29,2208(3) - rlwinm 25,11,24,24,31 - lwz 30,2240(3) - rlwinm 26,8,24,24,31 - lwz 31,2272(3) - rlwinm 27,9,24,24,31 - lbzx 16,7,16 - rlwinm 28,11,0,24,31 - lbzx 17,7,17 - rlwinm 29,8,0,24,31 - lbzx 18,7,18 - rlwinm 30,9,0,24,31 - lbzx 19,7,19 - rlwinm 31,10,0,24,31 - lbzx 20,7,20 - rlwinm 8,16,24,0,7 - lbzx 21,7,21 - rlwinm 9,17,24,0,7 - lbzx 22,7,22 - rlwinm 10,18,24,0,7 - lbzx 23,7,23 - rlwinm 11,19,24,0,7 - lbzx 24,7,24 - rlwimi 8,20,16,8,15 - lbzx 25,7,25 - rlwimi 9,21,16,8,15 - lbzx 26,7,26 - rlwimi 10,22,16,8,15 - lbzx 27,7,27 - rlwimi 11,23,16,8,15 - lbzx 28,7,28 - rlwimi 8,24,8,16,23 - lbzx 29,7,29 - rlwimi 9,25,8,16,23 - lbzx 30,7,30 - rlwimi 10,26,8,16,23 - lbzx 31,7,31 - rlwimi 11,27,8,16,23 - or 8,8,28 - or 9,9,29 - or 10,10,30 - or 11,11,31 - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.align 4 -.Lppc_AES_encrypt_compact: - lwz 16,240(5) - addi 6,3,2048 - lwz 12,0(5) - lis 7,0x8080 - lwz 0,4(5) - lis 4,0x1b1b - lwz 14,8(5) - ori 7,7,0x8080 - lwz 15,12(5) - ori 4,4,0x1b1b - addi 5,5,16 - mtctr 16 -.align 4 -.Lenc_compact_loop: - xor 8,8,12 - xor 9,9,0 - rlwinm 16,8,8,24,31 - xor 10,10,14 - rlwinm 17,9,8,24,31 - xor 11,11,15 - rlwinm 18,10,8,24,31 - rlwinm 19,11,8,24,31 - rlwinm 20,9,16,24,31 - rlwinm 21,10,16,24,31 - rlwinm 22,11,16,24,31 - rlwinm 23,8,16,24,31 - lbzx 16,6,16 - rlwinm 24,10,24,24,31 - lbzx 17,6,17 - rlwinm 25,11,24,24,31 - lbzx 18,6,18 - rlwinm 26,8,24,24,31 - lbzx 19,6,19 - rlwinm 27,9,24,24,31 - lbzx 20,6,20 - rlwinm 28,11,0,24,31 - lbzx 21,6,21 - rlwinm 29,8,0,24,31 - lbzx 22,6,22 - rlwinm 30,9,0,24,31 - lbzx 23,6,23 - rlwinm 31,10,0,24,31 - lbzx 24,6,24 - rlwinm 8,16,24,0,7 - lbzx 25,6,25 - rlwinm 9,17,24,0,7 - lbzx 26,6,26 - rlwinm 10,18,24,0,7 - lbzx 27,6,27 - rlwinm 11,19,24,0,7 - lbzx 28,6,28 - rlwimi 8,20,16,8,15 - lbzx 29,6,29 - rlwimi 9,21,16,8,15 - lbzx 30,6,30 - rlwimi 10,22,16,8,15 - lbzx 31,6,31 - rlwimi 11,23,16,8,15 - rlwimi 8,24,8,16,23 - rlwimi 9,25,8,16,23 - rlwimi 10,26,8,16,23 - rlwimi 11,27,8,16,23 - lwz 12,0(5) - or 8,8,28 - lwz 0,4(5) - or 9,9,29 - lwz 14,8(5) - or 10,10,30 - lwz 15,12(5) - or 11,11,31 - - addi 5,5,16 - bdz .Lenc_compact_done - - and 16,8,7 - and 17,9,7 - and 18,10,7 - and 19,11,7 - srwi 20,16,7 - andc 24,8,7 - srwi 21,17,7 - andc 25,9,7 - srwi 22,18,7 - andc 26,10,7 - srwi 23,19,7 - andc 27,11,7 - sub 16,16,20 - sub 17,17,21 - sub 18,18,22 - sub 19,19,23 - add 24,24,24 - add 25,25,25 - add 26,26,26 - add 27,27,27 - and 16,16,4 - and 17,17,4 - and 18,18,4 - and 19,19,4 - xor 16,16,24 - xor 17,17,25 - rotlwi 28,8,16 - xor 18,18,26 - rotlwi 29,9,16 - xor 19,19,27 - rotlwi 30,10,16 - - xor 8,8,16 - rotlwi 31,11,16 - xor 9,9,17 - rotrwi 8,8,24 - xor 10,10,18 - rotrwi 9,9,24 - xor 11,11,19 - rotrwi 10,10,24 - xor 8,8,16 - rotrwi 11,11,24 - xor 9,9,17 - xor 10,10,18 - xor 11,11,19 - rotlwi 24,28,8 - xor 8,8,28 - rotlwi 25,29,8 - xor 9,9,29 - rotlwi 26,30,8 - xor 10,10,30 - rotlwi 27,31,8 - xor 11,11,31 - xor 8,8,24 - xor 9,9,25 - xor 10,10,26 - xor 11,11,27 - - b .Lenc_compact_loop -.align 4 -.Lenc_compact_done: - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size AES_encrypt,.-AES_encrypt - -.globl AES_decrypt -.type AES_decrypt,@function -.align 7 -AES_decrypt: -.localentry AES_decrypt,0 - - stdu 1,-256(1) - mflr 0 - - std 4,104(1) - std 14,112(1) - std 15,120(1) - std 16,128(1) - std 17,136(1) - std 18,144(1) - std 19,152(1) - std 20,160(1) - std 21,168(1) - std 22,176(1) - std 23,184(1) - std 24,192(1) - std 25,200(1) - std 26,208(1) - std 27,216(1) - std 28,224(1) - std 29,232(1) - std 30,240(1) - std 31,248(1) - std 0,272(1) - - andi. 12,3,3 - andi. 0,4,3 - or. 12,12,0 - bne .Ldec_unaligned - -.Ldec_unaligned_ok: - lwz 12,0(3) - lwz 0,4(3) - lwz 14,8(3) - lwz 15,12(3) - rotlwi 8,12,8 - rotlwi 9,0,8 - rotlwi 10,14,8 - rotlwi 11,15,8 - rlwimi 8,12,24,0,7 - rlwimi 9,0,24,0,7 - rlwimi 10,14,24,0,7 - rlwimi 11,15,24,0,7 - rlwimi 8,12,24,16,23 - rlwimi 9,0,24,16,23 - rlwimi 10,14,24,16,23 - rlwimi 11,15,24,16,23 - bl .LAES_Td - bl .Lppc_AES_decrypt_compact - ld 4,104(1) - rotlwi 12,8,8 - rotlwi 0,9,8 - rotlwi 14,10,8 - rotlwi 15,11,8 - rlwimi 12,8,24,0,7 - rlwimi 0,9,24,0,7 - rlwimi 14,10,24,0,7 - rlwimi 15,11,24,0,7 - rlwimi 12,8,24,16,23 - rlwimi 0,9,24,16,23 - rlwimi 14,10,24,16,23 - rlwimi 15,11,24,16,23 - stw 12,0(4) - stw 0,4(4) - stw 14,8(4) - stw 15,12(4) - b .Ldec_done - -.Ldec_unaligned: - subfic 12,3,4096 - subfic 0,4,4096 - andi. 12,12,4096-16 - beq .Ldec_xpage - andi. 0,0,4096-16 - bne .Ldec_unaligned_ok - -.Ldec_xpage: - lbz 16,0(3) - lbz 17,1(3) - lbz 18,2(3) - lbz 8,3(3) - lbz 20,4(3) - lbz 21,5(3) - lbz 22,6(3) - lbz 9,7(3) - lbz 24,8(3) - lbz 25,9(3) - lbz 26,10(3) - insrwi 8,16,8,0 - lbz 10,11(3) - insrwi 9,20,8,0 - lbz 28,12(3) - insrwi 8,17,8,8 - lbz 29,13(3) - insrwi 9,21,8,8 - lbz 30,14(3) - insrwi 8,18,8,16 - lbz 11,15(3) - insrwi 9,22,8,16 - insrwi 10,24,8,0 - insrwi 11,28,8,0 - insrwi 10,25,8,8 - insrwi 11,29,8,8 - insrwi 10,26,8,16 - insrwi 11,30,8,16 - - bl .LAES_Td - bl .Lppc_AES_decrypt_compact - ld 4,104(1) - - extrwi 16,8,8,0 - extrwi 17,8,8,8 - stb 16,0(4) - extrwi 18,8,8,16 - stb 17,1(4) - stb 18,2(4) - extrwi 20,9,8,0 - stb 8,3(4) - extrwi 21,9,8,8 - stb 20,4(4) - extrwi 22,9,8,16 - stb 21,5(4) - stb 22,6(4) - extrwi 24,10,8,0 - stb 9,7(4) - extrwi 25,10,8,8 - stb 24,8(4) - extrwi 26,10,8,16 - stb 25,9(4) - stb 26,10(4) - extrwi 28,11,8,0 - stb 10,11(4) - extrwi 29,11,8,8 - stb 28,12(4) - extrwi 30,11,8,16 - stb 29,13(4) - stb 30,14(4) - stb 11,15(4) - -.Ldec_done: - ld 0,272(1) - ld 14,112(1) - ld 15,120(1) - ld 16,128(1) - ld 17,136(1) - ld 18,144(1) - ld 19,152(1) - ld 20,160(1) - ld 21,168(1) - ld 22,176(1) - ld 23,184(1) - ld 24,192(1) - ld 25,200(1) - ld 26,208(1) - ld 27,216(1) - ld 28,224(1) - ld 29,232(1) - ld 30,240(1) - ld 31,248(1) - mtlr 0 - addi 1,1,256 - blr -.long 0 -.byte 0,12,4,1,0x80,18,3,0 -.long 0 - -.align 5 -.Lppc_AES_decrypt: - lwz 16,240(5) - addi 6,3,3 - lwz 12,0(5) - addi 7,3,2 - lwz 0,4(5) - addi 4,3,1 - lwz 14,8(5) - addi 16,16,-1 - lwz 15,12(5) - addi 5,5,16 - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - mtctr 16 -.align 4 -.Ldec_loop: - rlwinm 16,8,11,21,28 - rlwinm 17,9,11,21,28 - rlwinm 18,10,11,21,28 - rlwinm 19,11,11,21,28 - lwz 12,0(5) - rlwinm 20,11,19,21,28 - lwz 0,4(5) - rlwinm 21,8,19,21,28 - lwz 14,8(5) - rlwinm 22,9,19,21,28 - lwz 15,12(5) - rlwinm 23,10,19,21,28 - lwzx 16,3,16 - rlwinm 24,10,27,21,28 - lwzx 17,3,17 - rlwinm 25,11,27,21,28 - lwzx 18,3,18 - rlwinm 26,8,27,21,28 - lwzx 19,3,19 - rlwinm 27,9,27,21,28 - lwzx 20,6,20 - rlwinm 28,9,3,21,28 - lwzx 21,6,21 - rlwinm 29,10,3,21,28 - lwzx 22,6,22 - rlwinm 30,11,3,21,28 - lwzx 23,6,23 - rlwinm 31,8,3,21,28 - lwzx 24,7,24 - xor 12,12,16 - lwzx 25,7,25 - xor 0,0,17 - lwzx 26,7,26 - xor 14,14,18 - lwzx 27,7,27 - xor 15,15,19 - lwzx 28,4,28 - xor 12,12,20 - lwzx 29,4,29 - xor 0,0,21 - lwzx 30,4,30 - xor 14,14,22 - lwzx 31,4,31 - xor 15,15,23 - xor 12,12,24 - xor 0,0,25 - xor 14,14,26 - xor 15,15,27 - xor 8,12,28 - xor 9,0,29 - xor 10,14,30 - xor 11,15,31 - addi 5,5,16 - bdnz .Ldec_loop - - addi 7,3,2048 - nop - lwz 12,0(5) - rlwinm 16,8,8,24,31 - lwz 0,4(5) - rlwinm 17,9,8,24,31 - lwz 14,8(5) - rlwinm 18,10,8,24,31 - lwz 15,12(5) - rlwinm 19,11,8,24,31 - lwz 24,2048(3) - rlwinm 20,11,16,24,31 - lwz 25,2080(3) - rlwinm 21,8,16,24,31 - lwz 26,2112(3) - lbzx 16,7,16 - lwz 27,2144(3) - lbzx 17,7,17 - lwz 28,2176(3) - rlwinm 22,9,16,24,31 - lwz 29,2208(3) - rlwinm 23,10,16,24,31 - lwz 30,2240(3) - rlwinm 24,10,24,24,31 - lwz 31,2272(3) - rlwinm 25,11,24,24,31 - lbzx 18,7,18 - rlwinm 26,8,24,24,31 - lbzx 19,7,19 - rlwinm 27,9,24,24,31 - lbzx 20,7,20 - rlwinm 28,9,0,24,31 - lbzx 21,7,21 - rlwinm 29,10,0,24,31 - lbzx 22,7,22 - rlwinm 30,11,0,24,31 - lbzx 23,7,23 - rlwinm 31,8,0,24,31 - lbzx 24,7,24 - rlwinm 8,16,24,0,7 - lbzx 25,7,25 - rlwinm 9,17,24,0,7 - lbzx 26,7,26 - rlwinm 10,18,24,0,7 - lbzx 27,7,27 - rlwinm 11,19,24,0,7 - lbzx 28,7,28 - rlwimi 8,20,16,8,15 - lbzx 29,7,29 - rlwimi 9,21,16,8,15 - lbzx 30,7,30 - rlwimi 10,22,16,8,15 - lbzx 31,7,31 - rlwimi 11,23,16,8,15 - rlwimi 8,24,8,16,23 - rlwimi 9,25,8,16,23 - rlwimi 10,26,8,16,23 - rlwimi 11,27,8,16,23 - or 8,8,28 - or 9,9,29 - or 10,10,30 - or 11,11,31 - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.align 4 -.Lppc_AES_decrypt_compact: - lwz 16,240(5) - addi 6,3,2048 - lwz 12,0(5) - lis 7,0x8080 - lwz 0,4(5) - lis 4,0x1b1b - lwz 14,8(5) - ori 7,7,0x8080 - lwz 15,12(5) - ori 4,4,0x1b1b - addi 5,5,16 - insrdi 7,7,32,0 - insrdi 4,4,32,0 - mtctr 16 -.align 4 -.Ldec_compact_loop: - xor 8,8,12 - xor 9,9,0 - rlwinm 16,8,8,24,31 - xor 10,10,14 - rlwinm 17,9,8,24,31 - xor 11,11,15 - rlwinm 18,10,8,24,31 - rlwinm 19,11,8,24,31 - rlwinm 20,11,16,24,31 - rlwinm 21,8,16,24,31 - rlwinm 22,9,16,24,31 - rlwinm 23,10,16,24,31 - lbzx 16,6,16 - rlwinm 24,10,24,24,31 - lbzx 17,6,17 - rlwinm 25,11,24,24,31 - lbzx 18,6,18 - rlwinm 26,8,24,24,31 - lbzx 19,6,19 - rlwinm 27,9,24,24,31 - lbzx 20,6,20 - rlwinm 28,9,0,24,31 - lbzx 21,6,21 - rlwinm 29,10,0,24,31 - lbzx 22,6,22 - rlwinm 30,11,0,24,31 - lbzx 23,6,23 - rlwinm 31,8,0,24,31 - lbzx 24,6,24 - rlwinm 8,16,24,0,7 - lbzx 25,6,25 - rlwinm 9,17,24,0,7 - lbzx 26,6,26 - rlwinm 10,18,24,0,7 - lbzx 27,6,27 - rlwinm 11,19,24,0,7 - lbzx 28,6,28 - rlwimi 8,20,16,8,15 - lbzx 29,6,29 - rlwimi 9,21,16,8,15 - lbzx 30,6,30 - rlwimi 10,22,16,8,15 - lbzx 31,6,31 - rlwimi 11,23,16,8,15 - rlwimi 8,24,8,16,23 - rlwimi 9,25,8,16,23 - rlwimi 10,26,8,16,23 - rlwimi 11,27,8,16,23 - lwz 12,0(5) - or 8,8,28 - lwz 0,4(5) - or 9,9,29 - lwz 14,8(5) - or 10,10,30 - lwz 15,12(5) - or 11,11,31 - - addi 5,5,16 - bdz .Ldec_compact_done - - insrdi 8,9,32,0 - insrdi 10,11,32,0 - - and 16,8,7 - and 18,10,7 - srdi 20,16,7 - srdi 22,18,7 - andc 24,8,7 - andc 26,10,7 - sub 16,16,20 - sub 18,18,22 - add 24,24,24 - add 26,26,26 - and 16,16,4 - and 18,18,4 - xor 16,16,24 - xor 18,18,26 - - and 20,16,7 - and 22,18,7 - srdi 24,20,7 - srdi 26,22,7 - andc 28,16,7 - andc 30,18,7 - sub 20,20,24 - sub 22,22,26 - add 28,28,28 - add 30,30,30 - and 20,20,4 - and 22,22,4 - xor 20,20,28 - xor 22,22,30 - - and 24,20,7 - and 26,22,7 - srdi 28,24,7 - srdi 30,26,7 - sub 24,24,28 - sub 26,26,30 - andc 28,20,7 - andc 30,22,7 - add 28,28,28 - add 30,30,30 - and 24,24,4 - and 26,26,4 - xor 24,24,28 - xor 26,26,30 - - xor 16,16,8 - xor 18,18,10 - xor 20,20,8 - xor 22,22,10 - - rldicl 17,16,32,32 - rldicl 19,18,32,32 - rldicl 21,20,32,32 - rldicl 23,22,32,32 - rldicl 25,24,32,32 - rldicl 27,26,32,32 - rotrwi 8,8,8 - rotrwi 9,9,8 - xor 8,8,16 - rotrwi 10,10,8 - xor 9,9,17 - rotrwi 11,11,8 - xor 10,10,18 - xor 11,11,19 - xor 16,16,24 - xor 17,17,25 - xor 18,18,26 - xor 19,19,27 - xor 8,8,20 - rotrwi 16,16,24 - xor 9,9,21 - rotrwi 17,17,24 - xor 10,10,22 - rotrwi 18,18,24 - xor 11,11,23 - rotrwi 19,19,24 - xor 20,20,24 - xor 21,21,25 - xor 22,22,26 - xor 23,23,27 - xor 8,8,24 - rotrwi 20,20,16 - xor 9,9,25 - rotrwi 21,21,16 - xor 10,10,26 - rotrwi 22,22,16 - xor 11,11,27 - rotrwi 23,23,16 - xor 8,8,16 - rotrwi 24,24,8 - xor 9,9,17 - rotrwi 25,25,8 - xor 10,10,18 - rotrwi 26,26,8 - xor 11,11,19 - rotrwi 27,27,8 - xor 8,8,20 - xor 9,9,21 - xor 10,10,22 - xor 11,11,23 - xor 8,8,24 - xor 9,9,25 - xor 10,10,26 - xor 11,11,27 - - b .Ldec_compact_loop -.align 4 -.Ldec_compact_done: - xor 8,8,12 - xor 9,9,0 - xor 10,10,14 - xor 11,11,15 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size AES_decrypt,.-AES_decrypt - -.byte 65,69,83,32,102,111,114,32,80,80,67,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 7 diff --git a/sys/crypto/openssl/powerpc64le/aesp8-ppc.S b/sys/crypto/openssl/powerpc64le/aesp8-ppc.S deleted file mode 100644 index 922f45cc0e4..00000000000 --- a/sys/crypto/openssl/powerpc64le/aesp8-ppc.S +++ /dev/null @@ -1,3659 +0,0 @@ -/* Do not modify. This file is auto-generated from aesp8-ppc.pl. */ -.machine "any" - -.abiversion 2 -.text - -.align 7 -rcon: -.byte 0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01 -.byte 0x00,0x00,0x00,0x1b,0x00,0x00,0x00,0x1b,0x00,0x00,0x00,0x1b,0x00,0x00,0x00,0x1b -.byte 0x0c,0x0f,0x0e,0x0d,0x0c,0x0f,0x0e,0x0d,0x0c,0x0f,0x0e,0x0d,0x0c,0x0f,0x0e,0x0d -.byte 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 -.Lconsts: - mflr 0 - bcl 20,31,$+4 - mflr 6 - addi 6,6,-0x48 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.byte 65,69,83,32,102,111,114,32,80,111,119,101,114,73,83,65,32,50,46,48,55,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 - -.globl aes_p8_set_encrypt_key -.type aes_p8_set_encrypt_key,@function -.align 5 -aes_p8_set_encrypt_key: -.localentry aes_p8_set_encrypt_key,0 - -.Lset_encrypt_key: - mflr 11 - std 11,16(1) - - li 6,-1 - cmpldi 3,0 - beq- .Lenc_key_abort - cmpldi 5,0 - beq- .Lenc_key_abort - li 6,-2 - cmpwi 4,128 - blt- .Lenc_key_abort - cmpwi 4,256 - bgt- .Lenc_key_abort - andi. 0,4,0x3f - bne- .Lenc_key_abort - - lis 0,0xfff0 - li 12,-1 - or 0,0,0 - - bl .Lconsts - mtlr 11 - - neg 9,3 - lvx 1,0,3 - addi 3,3,15 - lvsr 3,0,9 - li 8,0x20 - cmpwi 4,192 - lvx 2,0,3 - vspltisb 5,0x0f - lvx 4,0,6 - vxor 3,3,5 - lvx 5,8,6 - addi 6,6,0x10 - vperm 1,1,2,3 - li 7,8 - vxor 0,0,0 - mtctr 7 - - lvsl 8,0,5 - vspltisb 9,-1 - lvx 10,0,5 - vperm 9,9,0,8 - - blt .Loop128 - addi 3,3,8 - beq .L192 - addi 3,3,8 - b .L256 - -.align 4 -.Loop128: - vperm 3,1,1,5 - vsldoi 6,0,1,12 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - .long 0x10632509 - stvx 7,0,5 - addi 5,5,16 - - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vadduwm 4,4,4 - vxor 1,1,3 - bdnz .Loop128 - - lvx 4,0,6 - - vperm 3,1,1,5 - vsldoi 6,0,1,12 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - .long 0x10632509 - stvx 7,0,5 - addi 5,5,16 - - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vadduwm 4,4,4 - vxor 1,1,3 - - vperm 3,1,1,5 - vsldoi 6,0,1,12 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - .long 0x10632509 - stvx 7,0,5 - addi 5,5,16 - - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vxor 1,1,3 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - stvx 7,0,5 - - addi 3,5,15 - addi 5,5,0x50 - - li 8,10 - b .Ldone - -.align 4 -.L192: - lvx 6,0,3 - li 7,4 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - stvx 7,0,5 - addi 5,5,16 - vperm 2,2,6,3 - vspltisb 3,8 - mtctr 7 - vsububm 5,5,3 - -.Loop192: - vperm 3,2,2,5 - vsldoi 6,0,1,12 - .long 0x10632509 - - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - - vsldoi 7,0,2,8 - vspltw 6,1,3 - vxor 6,6,2 - vsldoi 2,0,2,12 - vadduwm 4,4,4 - vxor 2,2,6 - vxor 1,1,3 - vxor 2,2,3 - vsldoi 7,7,1,8 - - vperm 3,2,2,5 - vsldoi 6,0,1,12 - vperm 11,7,7,8 - vsel 7,10,11,9 - vor 10,11,11 - .long 0x10632509 - stvx 7,0,5 - addi 5,5,16 - - vsldoi 7,1,2,8 - vxor 1,1,6 - vsldoi 6,0,6,12 - vperm 11,7,7,8 - vsel 7,10,11,9 - vor 10,11,11 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - stvx 7,0,5 - addi 5,5,16 - - vspltw 6,1,3 - vxor 6,6,2 - vsldoi 2,0,2,12 - vadduwm 4,4,4 - vxor 2,2,6 - vxor 1,1,3 - vxor 2,2,3 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - stvx 7,0,5 - addi 3,5,15 - addi 5,5,16 - bdnz .Loop192 - - li 8,12 - addi 5,5,0x20 - b .Ldone - -.align 4 -.L256: - lvx 6,0,3 - li 7,7 - li 8,14 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - stvx 7,0,5 - addi 5,5,16 - vperm 2,2,6,3 - mtctr 7 - -.Loop256: - vperm 3,2,2,5 - vsldoi 6,0,1,12 - vperm 11,2,2,8 - vsel 7,10,11,9 - vor 10,11,11 - .long 0x10632509 - stvx 7,0,5 - addi 5,5,16 - - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vsldoi 6,0,6,12 - vxor 1,1,6 - vadduwm 4,4,4 - vxor 1,1,3 - vperm 11,1,1,8 - vsel 7,10,11,9 - vor 10,11,11 - stvx 7,0,5 - addi 3,5,15 - addi 5,5,16 - bdz .Ldone - - vspltw 3,1,3 - vsldoi 6,0,2,12 - .long 0x106305C8 - - vxor 2,2,6 - vsldoi 6,0,6,12 - vxor 2,2,6 - vsldoi 6,0,6,12 - vxor 2,2,6 - - vxor 2,2,3 - b .Loop256 - -.align 4 -.Ldone: - lvx 2,0,3 - vsel 2,10,2,9 - stvx 2,0,3 - li 6,0 - or 12,12,12 - stw 8,0(5) - -.Lenc_key_abort: - mr 3,6 - blr -.long 0 -.byte 0,12,0x14,1,0,0,3,0 -.long 0 -.size aes_p8_set_encrypt_key,.-aes_p8_set_encrypt_key - -.globl aes_p8_set_decrypt_key -.type aes_p8_set_decrypt_key,@function -.align 5 -aes_p8_set_decrypt_key: -.localentry aes_p8_set_decrypt_key,0 - - stdu 1,-64(1) - mflr 10 - std 10,64+16(1) - bl .Lset_encrypt_key - mtlr 10 - - cmpwi 3,0 - bne- .Ldec_key_abort - - slwi 7,8,4 - subi 3,5,240 - srwi 8,8,1 - add 5,3,7 - mtctr 8 - -.Ldeckey: - lwz 0, 0(3) - lwz 6, 4(3) - lwz 7, 8(3) - lwz 8, 12(3) - addi 3,3,16 - lwz 9, 0(5) - lwz 10,4(5) - lwz 11,8(5) - lwz 12,12(5) - stw 0, 0(5) - stw 6, 4(5) - stw 7, 8(5) - stw 8, 12(5) - subi 5,5,16 - stw 9, -16(3) - stw 10,-12(3) - stw 11,-8(3) - stw 12,-4(3) - bdnz .Ldeckey - - xor 3,3,3 -.Ldec_key_abort: - addi 1,1,64 - blr -.long 0 -.byte 0,12,4,1,0x80,0,3,0 -.long 0 -.size aes_p8_set_decrypt_key,.-aes_p8_set_decrypt_key -.globl aes_p8_encrypt -.type aes_p8_encrypt,@function -.align 5 -aes_p8_encrypt: -.localentry aes_p8_encrypt,0 - - lwz 6,240(5) - lis 0,0xfc00 - li 12,-1 - li 7,15 - or 0,0,0 - - lvx 0,0,3 - neg 11,4 - lvx 1,7,3 - lvsl 2,0,3 - vspltisb 4,0x0f - lvsr 3,0,11 - vxor 2,2,4 - li 7,16 - vperm 0,0,1,2 - lvx 1,0,5 - lvsr 5,0,5 - srwi 6,6,1 - lvx 2,7,5 - addi 7,7,16 - subi 6,6,1 - vperm 1,2,1,5 - - vxor 0,0,1 - lvx 1,7,5 - addi 7,7,16 - mtctr 6 - -.Loop_enc: - vperm 2,1,2,5 - .long 0x10001508 - lvx 2,7,5 - addi 7,7,16 - vperm 1,2,1,5 - .long 0x10000D08 - lvx 1,7,5 - addi 7,7,16 - bdnz .Loop_enc - - vperm 2,1,2,5 - .long 0x10001508 - lvx 2,7,5 - vperm 1,2,1,5 - .long 0x10000D09 - - vspltisb 2,-1 - vxor 1,1,1 - li 7,15 - vperm 2,2,1,3 - vxor 3,3,4 - lvx 1,0,4 - vperm 0,0,0,3 - vsel 1,1,0,2 - lvx 4,7,4 - stvx 1,0,4 - vsel 0,0,4,2 - stvx 0,7,4 - - or 12,12,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size aes_p8_encrypt,.-aes_p8_encrypt -.globl aes_p8_decrypt -.type aes_p8_decrypt,@function -.align 5 -aes_p8_decrypt: -.localentry aes_p8_decrypt,0 - - lwz 6,240(5) - lis 0,0xfc00 - li 12,-1 - li 7,15 - or 0,0,0 - - lvx 0,0,3 - neg 11,4 - lvx 1,7,3 - lvsl 2,0,3 - vspltisb 4,0x0f - lvsr 3,0,11 - vxor 2,2,4 - li 7,16 - vperm 0,0,1,2 - lvx 1,0,5 - lvsr 5,0,5 - srwi 6,6,1 - lvx 2,7,5 - addi 7,7,16 - subi 6,6,1 - vperm 1,2,1,5 - - vxor 0,0,1 - lvx 1,7,5 - addi 7,7,16 - mtctr 6 - -.Loop_dec: - vperm 2,1,2,5 - .long 0x10001548 - lvx 2,7,5 - addi 7,7,16 - vperm 1,2,1,5 - .long 0x10000D48 - lvx 1,7,5 - addi 7,7,16 - bdnz .Loop_dec - - vperm 2,1,2,5 - .long 0x10001548 - lvx 2,7,5 - vperm 1,2,1,5 - .long 0x10000D49 - - vspltisb 2,-1 - vxor 1,1,1 - li 7,15 - vperm 2,2,1,3 - vxor 3,3,4 - lvx 1,0,4 - vperm 0,0,0,3 - vsel 1,1,0,2 - lvx 4,7,4 - stvx 1,0,4 - vsel 0,0,4,2 - stvx 0,7,4 - - or 12,12,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size aes_p8_decrypt,.-aes_p8_decrypt -.globl aes_p8_cbc_encrypt -.type aes_p8_cbc_encrypt,@function -.align 5 -aes_p8_cbc_encrypt: -.localentry aes_p8_cbc_encrypt,0 - - cmpldi 5,16 - .long 0x4dc00020 - - cmpwi 8,0 - lis 0,0xffe0 - li 12,-1 - or 0,0,0 - - li 10,15 - vxor 0,0,0 - vspltisb 3,0x0f - - lvx 4,0,7 - lvsl 6,0,7 - lvx 5,10,7 - vxor 6,6,3 - vperm 4,4,5,6 - - neg 11,3 - lvsr 10,0,6 - lwz 9,240(6) - - lvsr 6,0,11 - lvx 5,0,3 - addi 3,3,15 - vxor 6,6,3 - - lvsl 8,0,4 - vspltisb 9,-1 - lvx 7,0,4 - vperm 9,9,0,8 - vxor 8,8,3 - - srwi 9,9,1 - li 10,16 - subi 9,9,1 - beq .Lcbc_dec - -.Lcbc_enc: - vor 2,5,5 - lvx 5,0,3 - addi 3,3,16 - mtctr 9 - subi 5,5,16 - - lvx 0,0,6 - vperm 2,2,5,6 - lvx 1,10,6 - addi 10,10,16 - vperm 0,1,0,10 - vxor 2,2,0 - lvx 0,10,6 - addi 10,10,16 - vxor 2,2,4 - -.Loop_cbc_enc: - vperm 1,0,1,10 - .long 0x10420D08 - lvx 1,10,6 - addi 10,10,16 - vperm 0,1,0,10 - .long 0x10420508 - lvx 0,10,6 - addi 10,10,16 - bdnz .Loop_cbc_enc - - vperm 1,0,1,10 - .long 0x10420D08 - lvx 1,10,6 - li 10,16 - vperm 0,1,0,10 - .long 0x10820509 - cmpldi 5,16 - - vperm 3,4,4,8 - vsel 2,7,3,9 - vor 7,3,3 - stvx 2,0,4 - addi 4,4,16 - bge .Lcbc_enc - - b .Lcbc_done - -.align 4 -.Lcbc_dec: - cmpldi 5,128 - bge _aesp8_cbc_decrypt8x - vor 3,5,5 - lvx 5,0,3 - addi 3,3,16 - mtctr 9 - subi 5,5,16 - - lvx 0,0,6 - vperm 3,3,5,6 - lvx 1,10,6 - addi 10,10,16 - vperm 0,1,0,10 - vxor 2,3,0 - lvx 0,10,6 - addi 10,10,16 - -.Loop_cbc_dec: - vperm 1,0,1,10 - .long 0x10420D48 - lvx 1,10,6 - addi 10,10,16 - vperm 0,1,0,10 - .long 0x10420548 - lvx 0,10,6 - addi 10,10,16 - bdnz .Loop_cbc_dec - - vperm 1,0,1,10 - .long 0x10420D48 - lvx 1,10,6 - li 10,16 - vperm 0,1,0,10 - .long 0x10420549 - cmpldi 5,16 - - vxor 2,2,4 - vor 4,3,3 - vperm 3,2,2,8 - vsel 2,7,3,9 - vor 7,3,3 - stvx 2,0,4 - addi 4,4,16 - bge .Lcbc_dec - -.Lcbc_done: - addi 4,4,-1 - lvx 2,0,4 - vsel 2,7,2,9 - stvx 2,0,4 - - neg 8,7 - li 10,15 - vxor 0,0,0 - vspltisb 9,-1 - vspltisb 3,0x0f - lvsr 8,0,8 - vperm 9,9,0,8 - vxor 8,8,3 - lvx 7,0,7 - vperm 4,4,4,8 - vsel 2,7,4,9 - lvx 5,10,7 - stvx 2,0,7 - vsel 2,4,5,9 - stvx 2,10,7 - - or 12,12,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,6,0 -.long 0 -.align 5 -_aesp8_cbc_decrypt8x: - stdu 1,-448(1) - li 10,207 - li 11,223 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - li 0,-1 - stw 12,396(1) - li 8,0x10 - std 26,400(1) - li 26,0x20 - std 27,408(1) - li 27,0x30 - std 28,416(1) - li 28,0x40 - std 29,424(1) - li 29,0x50 - std 30,432(1) - li 30,0x60 - std 31,440(1) - li 31,0x70 - or 0,0,0 - - subi 9,9,3 - subi 5,5,128 - - lvx 23,0,6 - lvx 30,8,6 - addi 6,6,0x20 - lvx 31,0,6 - vperm 23,30,23,10 - addi 11,1,64+15 - mtctr 9 - -.Load_cbc_dec_key: - vperm 24,31,30,10 - lvx 30,8,6 - addi 6,6,0x20 - stvx 24,0,11 - vperm 25,30,31,10 - lvx 31,0,6 - stvx 25,8,11 - addi 11,11,0x20 - bdnz .Load_cbc_dec_key - - lvx 26,8,6 - vperm 24,31,30,10 - lvx 27,26,6 - stvx 24,0,11 - vperm 25,26,31,10 - lvx 28,27,6 - stvx 25,8,11 - addi 11,1,64+15 - vperm 26,27,26,10 - lvx 29,28,6 - vperm 27,28,27,10 - lvx 30,29,6 - vperm 28,29,28,10 - lvx 31,30,6 - vperm 29,30,29,10 - lvx 14,31,6 - vperm 30,31,30,10 - lvx 24,0,11 - vperm 31,14,31,10 - lvx 25,8,11 - - - - subi 3,3,15 - - li 10,8 - .long 0x7C001E99 - lvsl 6,0,10 - vspltisb 3,0x0f - .long 0x7C281E99 - vxor 6,6,3 - .long 0x7C5A1E99 - vperm 0,0,0,6 - .long 0x7C7B1E99 - vperm 1,1,1,6 - .long 0x7D5C1E99 - vperm 2,2,2,6 - vxor 14,0,23 - .long 0x7D7D1E99 - vperm 3,3,3,6 - vxor 15,1,23 - .long 0x7D9E1E99 - vperm 10,10,10,6 - vxor 16,2,23 - .long 0x7DBF1E99 - addi 3,3,0x80 - vperm 11,11,11,6 - vxor 17,3,23 - vperm 12,12,12,6 - vxor 18,10,23 - vperm 13,13,13,6 - vxor 19,11,23 - vxor 20,12,23 - vxor 21,13,23 - - mtctr 9 - b .Loop_cbc_dec8x -.align 5 -.Loop_cbc_dec8x: - .long 0x11CEC548 - .long 0x11EFC548 - .long 0x1210C548 - .long 0x1231C548 - .long 0x1252C548 - .long 0x1273C548 - .long 0x1294C548 - .long 0x12B5C548 - lvx 24,26,11 - addi 11,11,0x20 - - .long 0x11CECD48 - .long 0x11EFCD48 - .long 0x1210CD48 - .long 0x1231CD48 - .long 0x1252CD48 - .long 0x1273CD48 - .long 0x1294CD48 - .long 0x12B5CD48 - lvx 25,8,11 - bdnz .Loop_cbc_dec8x - - subic 5,5,128 - .long 0x11CEC548 - .long 0x11EFC548 - .long 0x1210C548 - .long 0x1231C548 - .long 0x1252C548 - .long 0x1273C548 - .long 0x1294C548 - .long 0x12B5C548 - - subfe. 0,0,0 - .long 0x11CECD48 - .long 0x11EFCD48 - .long 0x1210CD48 - .long 0x1231CD48 - .long 0x1252CD48 - .long 0x1273CD48 - .long 0x1294CD48 - .long 0x12B5CD48 - - and 0,0,5 - .long 0x11CED548 - .long 0x11EFD548 - .long 0x1210D548 - .long 0x1231D548 - .long 0x1252D548 - .long 0x1273D548 - .long 0x1294D548 - .long 0x12B5D548 - - add 3,3,0 - - - - .long 0x11CEDD48 - .long 0x11EFDD48 - .long 0x1210DD48 - .long 0x1231DD48 - .long 0x1252DD48 - .long 0x1273DD48 - .long 0x1294DD48 - .long 0x12B5DD48 - - addi 11,1,64+15 - .long 0x11CEE548 - .long 0x11EFE548 - .long 0x1210E548 - .long 0x1231E548 - .long 0x1252E548 - .long 0x1273E548 - .long 0x1294E548 - .long 0x12B5E548 - lvx 24,0,11 - - .long 0x11CEED48 - .long 0x11EFED48 - .long 0x1210ED48 - .long 0x1231ED48 - .long 0x1252ED48 - .long 0x1273ED48 - .long 0x1294ED48 - .long 0x12B5ED48 - lvx 25,8,11 - - .long 0x11CEF548 - vxor 4,4,31 - .long 0x11EFF548 - vxor 0,0,31 - .long 0x1210F548 - vxor 1,1,31 - .long 0x1231F548 - vxor 2,2,31 - .long 0x1252F548 - vxor 3,3,31 - .long 0x1273F548 - vxor 10,10,31 - .long 0x1294F548 - vxor 11,11,31 - .long 0x12B5F548 - vxor 12,12,31 - - .long 0x11CE2549 - .long 0x11EF0549 - .long 0x7C001E99 - .long 0x12100D49 - .long 0x7C281E99 - .long 0x12311549 - vperm 0,0,0,6 - .long 0x7C5A1E99 - .long 0x12521D49 - vperm 1,1,1,6 - .long 0x7C7B1E99 - .long 0x12735549 - vperm 2,2,2,6 - .long 0x7D5C1E99 - .long 0x12945D49 - vperm 3,3,3,6 - .long 0x7D7D1E99 - .long 0x12B56549 - vperm 10,10,10,6 - .long 0x7D9E1E99 - vor 4,13,13 - vperm 11,11,11,6 - .long 0x7DBF1E99 - addi 3,3,0x80 - - vperm 14,14,14,6 - vperm 15,15,15,6 - .long 0x7DC02799 - vperm 12,12,12,6 - vxor 14,0,23 - vperm 16,16,16,6 - .long 0x7DE82799 - vperm 13,13,13,6 - vxor 15,1,23 - vperm 17,17,17,6 - .long 0x7E1A2799 - vxor 16,2,23 - vperm 18,18,18,6 - .long 0x7E3B2799 - vxor 17,3,23 - vperm 19,19,19,6 - .long 0x7E5C2799 - vxor 18,10,23 - vperm 20,20,20,6 - .long 0x7E7D2799 - vxor 19,11,23 - vperm 21,21,21,6 - .long 0x7E9E2799 - vxor 20,12,23 - .long 0x7EBF2799 - addi 4,4,0x80 - vxor 21,13,23 - - mtctr 9 - beq .Loop_cbc_dec8x - - addic. 5,5,128 - beq .Lcbc_dec8x_done - nop - nop - -.Loop_cbc_dec8x_tail: - .long 0x11EFC548 - .long 0x1210C548 - .long 0x1231C548 - .long 0x1252C548 - .long 0x1273C548 - .long 0x1294C548 - .long 0x12B5C548 - lvx 24,26,11 - addi 11,11,0x20 - - .long 0x11EFCD48 - .long 0x1210CD48 - .long 0x1231CD48 - .long 0x1252CD48 - .long 0x1273CD48 - .long 0x1294CD48 - .long 0x12B5CD48 - lvx 25,8,11 - bdnz .Loop_cbc_dec8x_tail - - .long 0x11EFC548 - .long 0x1210C548 - .long 0x1231C548 - .long 0x1252C548 - .long 0x1273C548 - .long 0x1294C548 - .long 0x12B5C548 - - .long 0x11EFCD48 - .long 0x1210CD48 - .long 0x1231CD48 - .long 0x1252CD48 - .long 0x1273CD48 - .long 0x1294CD48 - .long 0x12B5CD48 - - .long 0x11EFD548 - .long 0x1210D548 - .long 0x1231D548 - .long 0x1252D548 - .long 0x1273D548 - .long 0x1294D548 - .long 0x12B5D548 - - .long 0x11EFDD48 - .long 0x1210DD48 - .long 0x1231DD48 - .long 0x1252DD48 - .long 0x1273DD48 - .long 0x1294DD48 - .long 0x12B5DD48 - - .long 0x11EFE548 - .long 0x1210E548 - .long 0x1231E548 - .long 0x1252E548 - .long 0x1273E548 - .long 0x1294E548 - .long 0x12B5E548 - - .long 0x11EFED48 - .long 0x1210ED48 - .long 0x1231ED48 - .long 0x1252ED48 - .long 0x1273ED48 - .long 0x1294ED48 - .long 0x12B5ED48 - - .long 0x11EFF548 - vxor 4,4,31 - .long 0x1210F548 - vxor 1,1,31 - .long 0x1231F548 - vxor 2,2,31 - .long 0x1252F548 - vxor 3,3,31 - .long 0x1273F548 - vxor 10,10,31 - .long 0x1294F548 - vxor 11,11,31 - .long 0x12B5F548 - vxor 12,12,31 - - cmplwi 5,32 - blt .Lcbc_dec8x_one - nop - beq .Lcbc_dec8x_two - cmplwi 5,64 - blt .Lcbc_dec8x_three - nop - beq .Lcbc_dec8x_four - cmplwi 5,96 - blt .Lcbc_dec8x_five - nop - beq .Lcbc_dec8x_six - -.Lcbc_dec8x_seven: - .long 0x11EF2549 - .long 0x12100D49 - .long 0x12311549 - .long 0x12521D49 - .long 0x12735549 - .long 0x12945D49 - .long 0x12B56549 - vor 4,13,13 - - vperm 15,15,15,6 - vperm 16,16,16,6 - .long 0x7DE02799 - vperm 17,17,17,6 - .long 0x7E082799 - vperm 18,18,18,6 - .long 0x7E3A2799 - vperm 19,19,19,6 - .long 0x7E5B2799 - vperm 20,20,20,6 - .long 0x7E7C2799 - vperm 21,21,21,6 - .long 0x7E9D2799 - .long 0x7EBE2799 - addi 4,4,0x70 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_six: - .long 0x12102549 - .long 0x12311549 - .long 0x12521D49 - .long 0x12735549 - .long 0x12945D49 - .long 0x12B56549 - vor 4,13,13 - - vperm 16,16,16,6 - vperm 17,17,17,6 - .long 0x7E002799 - vperm 18,18,18,6 - .long 0x7E282799 - vperm 19,19,19,6 - .long 0x7E5A2799 - vperm 20,20,20,6 - .long 0x7E7B2799 - vperm 21,21,21,6 - .long 0x7E9C2799 - .long 0x7EBD2799 - addi 4,4,0x60 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_five: - .long 0x12312549 - .long 0x12521D49 - .long 0x12735549 - .long 0x12945D49 - .long 0x12B56549 - vor 4,13,13 - - vperm 17,17,17,6 - vperm 18,18,18,6 - .long 0x7E202799 - vperm 19,19,19,6 - .long 0x7E482799 - vperm 20,20,20,6 - .long 0x7E7A2799 - vperm 21,21,21,6 - .long 0x7E9B2799 - .long 0x7EBC2799 - addi 4,4,0x50 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_four: - .long 0x12522549 - .long 0x12735549 - .long 0x12945D49 - .long 0x12B56549 - vor 4,13,13 - - vperm 18,18,18,6 - vperm 19,19,19,6 - .long 0x7E402799 - vperm 20,20,20,6 - .long 0x7E682799 - vperm 21,21,21,6 - .long 0x7E9A2799 - .long 0x7EBB2799 - addi 4,4,0x40 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_three: - .long 0x12732549 - .long 0x12945D49 - .long 0x12B56549 - vor 4,13,13 - - vperm 19,19,19,6 - vperm 20,20,20,6 - .long 0x7E602799 - vperm 21,21,21,6 - .long 0x7E882799 - .long 0x7EBA2799 - addi 4,4,0x30 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_two: - .long 0x12942549 - .long 0x12B56549 - vor 4,13,13 - - vperm 20,20,20,6 - vperm 21,21,21,6 - .long 0x7E802799 - .long 0x7EA82799 - addi 4,4,0x20 - b .Lcbc_dec8x_done - -.align 5 -.Lcbc_dec8x_one: - .long 0x12B52549 - vor 4,13,13 - - vperm 21,21,21,6 - .long 0x7EA02799 - addi 4,4,0x10 - -.Lcbc_dec8x_done: - vperm 4,4,4,6 - .long 0x7C803F99 - - li 10,79 - li 11,95 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - - or 12,12,12 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - ld 26,400(1) - ld 27,408(1) - ld 28,416(1) - ld 29,424(1) - ld 30,432(1) - ld 31,440(1) - addi 1,1,448 - blr -.long 0 -.byte 0,12,0x04,0,0x80,6,6,0 -.long 0 -.size aes_p8_cbc_encrypt,.-aes_p8_cbc_encrypt -.globl aes_p8_ctr32_encrypt_blocks -.type aes_p8_ctr32_encrypt_blocks,@function -.align 5 -aes_p8_ctr32_encrypt_blocks: -.localentry aes_p8_ctr32_encrypt_blocks,0 - - cmpldi 5,1 - .long 0x4dc00020 - - lis 0,0xfff0 - li 12,-1 - or 0,0,0 - - li 10,15 - vxor 0,0,0 - vspltisb 3,0x0f - - lvx 4,0,7 - lvsl 6,0,7 - lvx 5,10,7 - vspltisb 11,1 - vxor 6,6,3 - vperm 4,4,5,6 - vsldoi 11,0,11,1 - - neg 11,3 - lvsr 10,0,6 - lwz 9,240(6) - - lvsr 6,0,11 - lvx 5,0,3 - addi 3,3,15 - vxor 6,6,3 - - srwi 9,9,1 - li 10,16 - subi 9,9,1 - - cmpldi 5,8 - bge _aesp8_ctr32_encrypt8x - - lvsl 8,0,4 - vspltisb 9,-1 - lvx 7,0,4 - vperm 9,9,0,8 - vxor 8,8,3 - - lvx 0,0,6 - mtctr 9 - lvx 1,10,6 - addi 10,10,16 - vperm 0,1,0,10 - vxor 2,4,0 - lvx 0,10,6 - addi 10,10,16 - b .Loop_ctr32_enc - -.align 5 -.Loop_ctr32_enc: - vperm 1,0,1,10 - .long 0x10420D08 - lvx 1,10,6 - addi 10,10,16 - vperm 0,1,0,10 - .long 0x10420508 - lvx 0,10,6 - addi 10,10,16 - bdnz .Loop_ctr32_enc - - vadduwm 4,4,11 - vor 3,5,5 - lvx 5,0,3 - addi 3,3,16 - subic. 5,5,1 - - vperm 1,0,1,10 - .long 0x10420D08 - lvx 1,10,6 - vperm 3,3,5,6 - li 10,16 - vperm 1,1,0,10 - lvx 0,0,6 - vxor 3,3,1 - .long 0x10421D09 - - lvx 1,10,6 - addi 10,10,16 - vperm 2,2,2,8 - vsel 3,7,2,9 - mtctr 9 - vperm 0,1,0,10 - vor 7,2,2 - vxor 2,4,0 - lvx 0,10,6 - addi 10,10,16 - stvx 3,0,4 - addi 4,4,16 - bne .Loop_ctr32_enc - - addi 4,4,-1 - lvx 2,0,4 - vsel 2,7,2,9 - stvx 2,0,4 - - or 12,12,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,6,0 -.long 0 -.align 5 -_aesp8_ctr32_encrypt8x: - stdu 1,-448(1) - li 10,207 - li 11,223 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - li 0,-1 - stw 12,396(1) - li 8,0x10 - std 26,400(1) - li 26,0x20 - std 27,408(1) - li 27,0x30 - std 28,416(1) - li 28,0x40 - std 29,424(1) - li 29,0x50 - std 30,432(1) - li 30,0x60 - std 31,440(1) - li 31,0x70 - or 0,0,0 - - subi 9,9,3 - - lvx 23,0,6 - lvx 30,8,6 - addi 6,6,0x20 - lvx 31,0,6 - vperm 23,30,23,10 - addi 11,1,64+15 - mtctr 9 - -.Load_ctr32_enc_key: - vperm 24,31,30,10 - lvx 30,8,6 - addi 6,6,0x20 - stvx 24,0,11 - vperm 25,30,31,10 - lvx 31,0,6 - stvx 25,8,11 - addi 11,11,0x20 - bdnz .Load_ctr32_enc_key - - lvx 26,8,6 - vperm 24,31,30,10 - lvx 27,26,6 - stvx 24,0,11 - vperm 25,26,31,10 - lvx 28,27,6 - stvx 25,8,11 - addi 11,1,64+15 - vperm 26,27,26,10 - lvx 29,28,6 - vperm 27,28,27,10 - lvx 30,29,6 - vperm 28,29,28,10 - lvx 31,30,6 - vperm 29,30,29,10 - lvx 15,31,6 - vperm 30,31,30,10 - lvx 24,0,11 - vperm 31,15,31,10 - lvx 25,8,11 - - vadduwm 7,11,11 - subi 3,3,15 - sldi 5,5,4 - - vadduwm 16,4,11 - vadduwm 17,4,7 - vxor 15,4,23 - li 10,8 - vadduwm 18,16,7 - vxor 16,16,23 - lvsl 6,0,10 - vadduwm 19,17,7 - vxor 17,17,23 - vspltisb 3,0x0f - vadduwm 20,18,7 - vxor 18,18,23 - vxor 6,6,3 - vadduwm 21,19,7 - vxor 19,19,23 - vadduwm 22,20,7 - vxor 20,20,23 - vadduwm 4,21,7 - vxor 21,21,23 - vxor 22,22,23 - - mtctr 9 - b .Loop_ctr32_enc8x -.align 5 -.Loop_ctr32_enc8x: - .long 0x11EFC508 - .long 0x1210C508 - .long 0x1231C508 - .long 0x1252C508 - .long 0x1273C508 - .long 0x1294C508 - .long 0x12B5C508 - .long 0x12D6C508 -.Loop_ctr32_enc8x_middle: - lvx 24,26,11 - addi 11,11,0x20 - - .long 0x11EFCD08 - .long 0x1210CD08 - .long 0x1231CD08 - .long 0x1252CD08 - .long 0x1273CD08 - .long 0x1294CD08 - .long 0x12B5CD08 - .long 0x12D6CD08 - lvx 25,8,11 - bdnz .Loop_ctr32_enc8x - - subic 11,5,256 - .long 0x11EFC508 - .long 0x1210C508 - .long 0x1231C508 - .long 0x1252C508 - .long 0x1273C508 - .long 0x1294C508 - .long 0x12B5C508 - .long 0x12D6C508 - - subfe 0,0,0 - .long 0x11EFCD08 - .long 0x1210CD08 - .long 0x1231CD08 - .long 0x1252CD08 - .long 0x1273CD08 - .long 0x1294CD08 - .long 0x12B5CD08 - .long 0x12D6CD08 - - and 0,0,11 - addi 11,1,64+15 - .long 0x11EFD508 - .long 0x1210D508 - .long 0x1231D508 - .long 0x1252D508 - .long 0x1273D508 - .long 0x1294D508 - .long 0x12B5D508 - .long 0x12D6D508 - lvx 24,0,11 - - subic 5,5,129 - .long 0x11EFDD08 - addi 5,5,1 - .long 0x1210DD08 - .long 0x1231DD08 - .long 0x1252DD08 - .long 0x1273DD08 - .long 0x1294DD08 - .long 0x12B5DD08 - .long 0x12D6DD08 - lvx 25,8,11 - - .long 0x11EFE508 - .long 0x7C001E99 - .long 0x1210E508 - .long 0x7C281E99 - .long 0x1231E508 - .long 0x7C5A1E99 - .long 0x1252E508 - .long 0x7C7B1E99 - .long 0x1273E508 - .long 0x7D5C1E99 - .long 0x1294E508 - .long 0x7D9D1E99 - .long 0x12B5E508 - .long 0x7DBE1E99 - .long 0x12D6E508 - .long 0x7DDF1E99 - addi 3,3,0x80 - - .long 0x11EFED08 - vperm 0,0,0,6 - .long 0x1210ED08 - vperm 1,1,1,6 - .long 0x1231ED08 - vperm 2,2,2,6 - .long 0x1252ED08 - vperm 3,3,3,6 - .long 0x1273ED08 - vperm 10,10,10,6 - .long 0x1294ED08 - vperm 12,12,12,6 - .long 0x12B5ED08 - vperm 13,13,13,6 - .long 0x12D6ED08 - vperm 14,14,14,6 - - add 3,3,0 - - - - subfe. 0,0,0 - .long 0x11EFF508 - vxor 0,0,31 - .long 0x1210F508 - vxor 1,1,31 - .long 0x1231F508 - vxor 2,2,31 - .long 0x1252F508 - vxor 3,3,31 - .long 0x1273F508 - vxor 10,10,31 - .long 0x1294F508 - vxor 12,12,31 - .long 0x12B5F508 - vxor 13,13,31 - .long 0x12D6F508 - vxor 14,14,31 - - bne .Lctr32_enc8x_break - - .long 0x100F0509 - .long 0x10300D09 - vadduwm 16,4,11 - .long 0x10511509 - vadduwm 17,4,7 - vxor 15,4,23 - .long 0x10721D09 - vadduwm 18,16,7 - vxor 16,16,23 - .long 0x11535509 - vadduwm 19,17,7 - vxor 17,17,23 - .long 0x11946509 - vadduwm 20,18,7 - vxor 18,18,23 - .long 0x11B56D09 - vadduwm 21,19,7 - vxor 19,19,23 - .long 0x11D67509 - vadduwm 22,20,7 - vxor 20,20,23 - vperm 0,0,0,6 - vadduwm 4,21,7 - vxor 21,21,23 - vperm 1,1,1,6 - vxor 22,22,23 - mtctr 9 - - .long 0x11EFC508 - .long 0x7C002799 - vperm 2,2,2,6 - .long 0x1210C508 - .long 0x7C282799 - vperm 3,3,3,6 - .long 0x1231C508 - .long 0x7C5A2799 - vperm 10,10,10,6 - .long 0x1252C508 - .long 0x7C7B2799 - vperm 12,12,12,6 - .long 0x1273C508 - .long 0x7D5C2799 - vperm 13,13,13,6 - .long 0x1294C508 - .long 0x7D9D2799 - vperm 14,14,14,6 - .long 0x12B5C508 - .long 0x7DBE2799 - .long 0x12D6C508 - .long 0x7DDF2799 - addi 4,4,0x80 - - b .Loop_ctr32_enc8x_middle - -.align 5 -.Lctr32_enc8x_break: - cmpwi 5,-0x60 - blt .Lctr32_enc8x_one - nop - beq .Lctr32_enc8x_two - cmpwi 5,-0x40 - blt .Lctr32_enc8x_three - nop - beq .Lctr32_enc8x_four - cmpwi 5,-0x20 - blt .Lctr32_enc8x_five - nop - beq .Lctr32_enc8x_six - cmpwi 5,0x00 - blt .Lctr32_enc8x_seven - -.Lctr32_enc8x_eight: - .long 0x11EF0509 - .long 0x12100D09 - .long 0x12311509 - .long 0x12521D09 - .long 0x12735509 - .long 0x12946509 - .long 0x12B56D09 - .long 0x12D67509 - - vperm 15,15,15,6 - vperm 16,16,16,6 - .long 0x7DE02799 - vperm 17,17,17,6 - .long 0x7E082799 - vperm 18,18,18,6 - .long 0x7E3A2799 - vperm 19,19,19,6 - .long 0x7E5B2799 - vperm 20,20,20,6 - .long 0x7E7C2799 - vperm 21,21,21,6 - .long 0x7E9D2799 - vperm 22,22,22,6 - .long 0x7EBE2799 - .long 0x7EDF2799 - addi 4,4,0x80 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_seven: - .long 0x11EF0D09 - .long 0x12101509 - .long 0x12311D09 - .long 0x12525509 - .long 0x12736509 - .long 0x12946D09 - .long 0x12B57509 - - vperm 15,15,15,6 - vperm 16,16,16,6 - .long 0x7DE02799 - vperm 17,17,17,6 - .long 0x7E082799 - vperm 18,18,18,6 - .long 0x7E3A2799 - vperm 19,19,19,6 - .long 0x7E5B2799 - vperm 20,20,20,6 - .long 0x7E7C2799 - vperm 21,21,21,6 - .long 0x7E9D2799 - .long 0x7EBE2799 - addi 4,4,0x70 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_six: - .long 0x11EF1509 - .long 0x12101D09 - .long 0x12315509 - .long 0x12526509 - .long 0x12736D09 - .long 0x12947509 - - vperm 15,15,15,6 - vperm 16,16,16,6 - .long 0x7DE02799 - vperm 17,17,17,6 - .long 0x7E082799 - vperm 18,18,18,6 - .long 0x7E3A2799 - vperm 19,19,19,6 - .long 0x7E5B2799 - vperm 20,20,20,6 - .long 0x7E7C2799 - .long 0x7E9D2799 - addi 4,4,0x60 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_five: - .long 0x11EF1D09 - .long 0x12105509 - .long 0x12316509 - .long 0x12526D09 - .long 0x12737509 - - vperm 15,15,15,6 - vperm 16,16,16,6 - .long 0x7DE02799 - vperm 17,17,17,6 - .long 0x7E082799 - vperm 18,18,18,6 - .long 0x7E3A2799 - vperm 19,19,19,6 - .long 0x7E5B2799 - .long 0x7E7C2799 - addi 4,4,0x50 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_four: - .long 0x11EF5509 - .long 0x12106509 - .long 0x12316D09 - .long 0x12527509 - - vperm 15,15,15,6 - vperm 16,16,16,6 - .long 0x7DE02799 - vperm 17,17,17,6 - .long 0x7E082799 - vperm 18,18,18,6 - .long 0x7E3A2799 - .long 0x7E5B2799 - addi 4,4,0x40 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_three: - .long 0x11EF6509 - .long 0x12106D09 - .long 0x12317509 - - vperm 15,15,15,6 - vperm 16,16,16,6 - .long 0x7DE02799 - vperm 17,17,17,6 - .long 0x7E082799 - .long 0x7E3A2799 - addi 4,4,0x30 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_two: - .long 0x11EF6D09 - .long 0x12107509 - - vperm 15,15,15,6 - vperm 16,16,16,6 - .long 0x7DE02799 - .long 0x7E082799 - addi 4,4,0x20 - b .Lctr32_enc8x_done - -.align 5 -.Lctr32_enc8x_one: - .long 0x11EF7509 - - vperm 15,15,15,6 - .long 0x7DE02799 - addi 4,4,0x10 - -.Lctr32_enc8x_done: - li 10,79 - li 11,95 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - stvx 6,10,1 - addi 10,10,32 - stvx 6,11,1 - addi 11,11,32 - - or 12,12,12 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - ld 26,400(1) - ld 27,408(1) - ld 28,416(1) - ld 29,424(1) - ld 30,432(1) - ld 31,440(1) - addi 1,1,448 - blr -.long 0 -.byte 0,12,0x04,0,0x80,6,6,0 -.long 0 -.size aes_p8_ctr32_encrypt_blocks,.-aes_p8_ctr32_encrypt_blocks -.globl aes_p8_xts_encrypt -.type aes_p8_xts_encrypt,@function -.align 5 -aes_p8_xts_encrypt: -.localentry aes_p8_xts_encrypt,0 - - mr 10,3 - li 3,-1 - cmpldi 5,16 - .long 0x4dc00020 - - lis 0,0xfff0 - li 12,-1 - li 11,0 - or 0,0,0 - - vspltisb 9,0x07 - lvsl 6,11,11 - vspltisb 11,0x0f - vxor 6,6,9 - - li 3,15 - lvx 8,0,8 - lvsl 5,0,8 - lvx 4,3,8 - vxor 5,5,11 - vperm 8,8,4,5 - - neg 11,10 - lvsr 5,0,11 - lvx 2,0,10 - addi 10,10,15 - vxor 5,5,11 - - cmpldi 7,0 - beq .Lxts_enc_no_key2 - - lvsr 7,0,7 - lwz 9,240(7) - srwi 9,9,1 - subi 9,9,1 - li 3,16 - - lvx 0,0,7 - lvx 1,3,7 - addi 3,3,16 - vperm 0,1,0,7 - vxor 8,8,0 - lvx 0,3,7 - addi 3,3,16 - mtctr 9 - -.Ltweak_xts_enc: - vperm 1,0,1,7 - .long 0x11080D08 - lvx 1,3,7 - addi 3,3,16 - vperm 0,1,0,7 - .long 0x11080508 - lvx 0,3,7 - addi 3,3,16 - bdnz .Ltweak_xts_enc - - vperm 1,0,1,7 - .long 0x11080D08 - lvx 1,3,7 - vperm 0,1,0,7 - .long 0x11080509 - - li 8,0 - b .Lxts_enc - -.Lxts_enc_no_key2: - li 3,-16 - and 5,5,3 - - -.Lxts_enc: - lvx 4,0,10 - addi 10,10,16 - - lvsr 7,0,6 - lwz 9,240(6) - srwi 9,9,1 - subi 9,9,1 - li 3,16 - - vslb 10,9,9 - vor 10,10,9 - vspltisb 11,1 - vsldoi 10,10,11,15 - - cmpldi 5,96 - bge _aesp8_xts_encrypt6x - - andi. 7,5,15 - subic 0,5,32 - subi 7,7,16 - subfe 0,0,0 - and 0,0,7 - add 10,10,0 - - lvx 0,0,6 - lvx 1,3,6 - addi 3,3,16 - vperm 2,2,4,5 - vperm 0,1,0,7 - vxor 2,2,8 - vxor 2,2,0 - lvx 0,3,6 - addi 3,3,16 - mtctr 9 - b .Loop_xts_enc - -.align 5 -.Loop_xts_enc: - vperm 1,0,1,7 - .long 0x10420D08 - lvx 1,3,6 - addi 3,3,16 - vperm 0,1,0,7 - .long 0x10420508 - lvx 0,3,6 - addi 3,3,16 - bdnz .Loop_xts_enc - - vperm 1,0,1,7 - .long 0x10420D08 - lvx 1,3,6 - li 3,16 - vperm 0,1,0,7 - vxor 0,0,8 - .long 0x10620509 - - vperm 11,3,3,6 - - .long 0x7D602799 - - addi 4,4,16 - - subic. 5,5,16 - beq .Lxts_enc_done - - vor 2,4,4 - lvx 4,0,10 - addi 10,10,16 - lvx 0,0,6 - lvx 1,3,6 - addi 3,3,16 - - subic 0,5,32 - subfe 0,0,0 - and 0,0,7 - add 10,10,0 - - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 8,8,11 - - vperm 2,2,4,5 - vperm 0,1,0,7 - vxor 2,2,8 - vxor 3,3,0 - vxor 2,2,0 - lvx 0,3,6 - addi 3,3,16 - - mtctr 9 - cmpldi 5,16 - bge .Loop_xts_enc - - vxor 3,3,8 - lvsr 5,0,5 - vxor 4,4,4 - vspltisb 11,-1 - vperm 4,4,11,5 - vsel 2,2,3,4 - - subi 11,4,17 - subi 4,4,16 - mtctr 5 - li 5,16 -.Loop_xts_enc_steal: - lbzu 0,1(11) - stb 0,16(11) - bdnz .Loop_xts_enc_steal - - mtctr 9 - b .Loop_xts_enc - -.Lxts_enc_done: - cmpldi 8,0 - beq .Lxts_enc_ret - - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 8,8,11 - - vperm 8,8,8,6 - .long 0x7D004799 - -.Lxts_enc_ret: - or 12,12,12 - li 3,0 - blr -.long 0 -.byte 0,12,0x04,0,0x80,6,6,0 -.long 0 -.size aes_p8_xts_encrypt,.-aes_p8_xts_encrypt - -.globl aes_p8_xts_decrypt -.type aes_p8_xts_decrypt,@function -.align 5 -aes_p8_xts_decrypt: -.localentry aes_p8_xts_decrypt,0 - - mr 10,3 - li 3,-1 - cmpldi 5,16 - .long 0x4dc00020 - - lis 0,0xfff8 - li 12,-1 - li 11,0 - or 0,0,0 - - andi. 0,5,15 - neg 0,0 - andi. 0,0,16 - sub 5,5,0 - - vspltisb 9,0x07 - lvsl 6,11,11 - vspltisb 11,0x0f - vxor 6,6,9 - - li 3,15 - lvx 8,0,8 - lvsl 5,0,8 - lvx 4,3,8 - vxor 5,5,11 - vperm 8,8,4,5 - - neg 11,10 - lvsr 5,0,11 - lvx 2,0,10 - addi 10,10,15 - vxor 5,5,11 - - cmpldi 7,0 - beq .Lxts_dec_no_key2 - - lvsr 7,0,7 - lwz 9,240(7) - srwi 9,9,1 - subi 9,9,1 - li 3,16 - - lvx 0,0,7 - lvx 1,3,7 - addi 3,3,16 - vperm 0,1,0,7 - vxor 8,8,0 - lvx 0,3,7 - addi 3,3,16 - mtctr 9 - -.Ltweak_xts_dec: - vperm 1,0,1,7 - .long 0x11080D08 - lvx 1,3,7 - addi 3,3,16 - vperm 0,1,0,7 - .long 0x11080508 - lvx 0,3,7 - addi 3,3,16 - bdnz .Ltweak_xts_dec - - vperm 1,0,1,7 - .long 0x11080D08 - lvx 1,3,7 - vperm 0,1,0,7 - .long 0x11080509 - - li 8,0 - b .Lxts_dec - -.Lxts_dec_no_key2: - neg 3,5 - andi. 3,3,15 - add 5,5,3 - - -.Lxts_dec: - lvx 4,0,10 - addi 10,10,16 - - lvsr 7,0,6 - lwz 9,240(6) - srwi 9,9,1 - subi 9,9,1 - li 3,16 - - vslb 10,9,9 - vor 10,10,9 - vspltisb 11,1 - vsldoi 10,10,11,15 - - cmpldi 5,96 - bge _aesp8_xts_decrypt6x - - lvx 0,0,6 - lvx 1,3,6 - addi 3,3,16 - vperm 2,2,4,5 - vperm 0,1,0,7 - vxor 2,2,8 - vxor 2,2,0 - lvx 0,3,6 - addi 3,3,16 - mtctr 9 - - cmpldi 5,16 - blt .Ltail_xts_dec - - -.align 5 -.Loop_xts_dec: - vperm 1,0,1,7 - .long 0x10420D48 - lvx 1,3,6 - addi 3,3,16 - vperm 0,1,0,7 - .long 0x10420548 - lvx 0,3,6 - addi 3,3,16 - bdnz .Loop_xts_dec - - vperm 1,0,1,7 - .long 0x10420D48 - lvx 1,3,6 - li 3,16 - vperm 0,1,0,7 - vxor 0,0,8 - .long 0x10620549 - - vperm 11,3,3,6 - - .long 0x7D602799 - - addi 4,4,16 - - subic. 5,5,16 - beq .Lxts_dec_done - - vor 2,4,4 - lvx 4,0,10 - addi 10,10,16 - lvx 0,0,6 - lvx 1,3,6 - addi 3,3,16 - - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 8,8,11 - - vperm 2,2,4,5 - vperm 0,1,0,7 - vxor 2,2,8 - vxor 2,2,0 - lvx 0,3,6 - addi 3,3,16 - - mtctr 9 - cmpldi 5,16 - bge .Loop_xts_dec - -.Ltail_xts_dec: - vsrab 11,8,9 - vaddubm 12,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 12,12,11 - - subi 10,10,16 - add 10,10,5 - - vxor 2,2,8 - vxor 2,2,12 - -.Loop_xts_dec_short: - vperm 1,0,1,7 - .long 0x10420D48 - lvx 1,3,6 - addi 3,3,16 - vperm 0,1,0,7 - .long 0x10420548 - lvx 0,3,6 - addi 3,3,16 - bdnz .Loop_xts_dec_short - - vperm 1,0,1,7 - .long 0x10420D48 - lvx 1,3,6 - li 3,16 - vperm 0,1,0,7 - vxor 0,0,12 - .long 0x10620549 - - vperm 11,3,3,6 - - .long 0x7D602799 - - - vor 2,4,4 - lvx 4,0,10 - - lvx 0,0,6 - lvx 1,3,6 - addi 3,3,16 - vperm 2,2,4,5 - vperm 0,1,0,7 - - lvsr 5,0,5 - vxor 4,4,4 - vspltisb 11,-1 - vperm 4,4,11,5 - vsel 2,2,3,4 - - vxor 0,0,8 - vxor 2,2,0 - lvx 0,3,6 - addi 3,3,16 - - subi 11,4,1 - mtctr 5 - li 5,16 -.Loop_xts_dec_steal: - lbzu 0,1(11) - stb 0,16(11) - bdnz .Loop_xts_dec_steal - - mtctr 9 - b .Loop_xts_dec - -.Lxts_dec_done: - cmpldi 8,0 - beq .Lxts_dec_ret - - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 8,8,11 - - vperm 8,8,8,6 - .long 0x7D004799 - -.Lxts_dec_ret: - or 12,12,12 - li 3,0 - blr -.long 0 -.byte 0,12,0x04,0,0x80,6,6,0 -.long 0 -.size aes_p8_xts_decrypt,.-aes_p8_xts_decrypt -.align 5 -_aesp8_xts_encrypt6x: - stdu 1,-448(1) - mflr 11 - li 7,207 - li 3,223 - std 11,464(1) - stvx 20,7,1 - addi 7,7,32 - stvx 21,3,1 - addi 3,3,32 - stvx 22,7,1 - addi 7,7,32 - stvx 23,3,1 - addi 3,3,32 - stvx 24,7,1 - addi 7,7,32 - stvx 25,3,1 - addi 3,3,32 - stvx 26,7,1 - addi 7,7,32 - stvx 27,3,1 - addi 3,3,32 - stvx 28,7,1 - addi 7,7,32 - stvx 29,3,1 - addi 3,3,32 - stvx 30,7,1 - stvx 31,3,1 - li 0,-1 - stw 12,396(1) - li 3,0x10 - std 26,400(1) - li 26,0x20 - std 27,408(1) - li 27,0x30 - std 28,416(1) - li 28,0x40 - std 29,424(1) - li 29,0x50 - std 30,432(1) - li 30,0x60 - std 31,440(1) - li 31,0x70 - or 0,0,0 - - subi 9,9,3 - - lvx 23,0,6 - lvx 30,3,6 - addi 6,6,0x20 - lvx 31,0,6 - vperm 23,30,23,7 - addi 7,1,64+15 - mtctr 9 - -.Load_xts_enc_key: - vperm 24,31,30,7 - lvx 30,3,6 - addi 6,6,0x20 - stvx 24,0,7 - vperm 25,30,31,7 - lvx 31,0,6 - stvx 25,3,7 - addi 7,7,0x20 - bdnz .Load_xts_enc_key - - lvx 26,3,6 - vperm 24,31,30,7 - lvx 27,26,6 - stvx 24,0,7 - vperm 25,26,31,7 - lvx 28,27,6 - stvx 25,3,7 - addi 7,1,64+15 - vperm 26,27,26,7 - lvx 29,28,6 - vperm 27,28,27,7 - lvx 30,29,6 - vperm 28,29,28,7 - lvx 31,30,6 - vperm 29,30,29,7 - lvx 22,31,6 - vperm 30,31,30,7 - lvx 24,0,7 - vperm 31,22,31,7 - lvx 25,3,7 - - vperm 0,2,4,5 - subi 10,10,31 - vxor 17,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 7,0,17 - vxor 8,8,11 - - .long 0x7C235699 - vxor 18,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vperm 1,1,1,6 - vand 11,11,10 - vxor 12,1,18 - vxor 8,8,11 - - .long 0x7C5A5699 - andi. 31,5,15 - vxor 19,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vperm 2,2,2,6 - vand 11,11,10 - vxor 13,2,19 - vxor 8,8,11 - - .long 0x7C7B5699 - sub 5,5,31 - vxor 20,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vperm 3,3,3,6 - vand 11,11,10 - vxor 14,3,20 - vxor 8,8,11 - - .long 0x7C9C5699 - subi 5,5,0x60 - vxor 21,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vperm 4,4,4,6 - vand 11,11,10 - vxor 15,4,21 - vxor 8,8,11 - - .long 0x7CBD5699 - addi 10,10,0x60 - vxor 22,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vperm 5,5,5,6 - vand 11,11,10 - vxor 16,5,22 - vxor 8,8,11 - - vxor 31,31,23 - mtctr 9 - b .Loop_xts_enc6x - -.align 5 -.Loop_xts_enc6x: - .long 0x10E7C508 - .long 0x118CC508 - .long 0x11ADC508 - .long 0x11CEC508 - .long 0x11EFC508 - .long 0x1210C508 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD08 - .long 0x118CCD08 - .long 0x11ADCD08 - .long 0x11CECD08 - .long 0x11EFCD08 - .long 0x1210CD08 - lvx 25,3,7 - bdnz .Loop_xts_enc6x - - subic 5,5,96 - vxor 0,17,31 - .long 0x10E7C508 - .long 0x118CC508 - vsrab 11,8,9 - vxor 17,8,23 - vaddubm 8,8,8 - .long 0x11ADC508 - .long 0x11CEC508 - vsldoi 11,11,11,15 - .long 0x11EFC508 - .long 0x1210C508 - - subfe. 0,0,0 - vand 11,11,10 - .long 0x10E7CD08 - .long 0x118CCD08 - vxor 8,8,11 - .long 0x11ADCD08 - .long 0x11CECD08 - vxor 1,18,31 - vsrab 11,8,9 - vxor 18,8,23 - .long 0x11EFCD08 - .long 0x1210CD08 - - and 0,0,5 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x10E7D508 - .long 0x118CD508 - vand 11,11,10 - .long 0x11ADD508 - .long 0x11CED508 - vxor 8,8,11 - .long 0x11EFD508 - .long 0x1210D508 - - add 10,10,0 - - - - vxor 2,19,31 - vsrab 11,8,9 - vxor 19,8,23 - vaddubm 8,8,8 - .long 0x10E7DD08 - .long 0x118CDD08 - vsldoi 11,11,11,15 - .long 0x11ADDD08 - .long 0x11CEDD08 - vand 11,11,10 - .long 0x11EFDD08 - .long 0x1210DD08 - - addi 7,1,64+15 - vxor 8,8,11 - .long 0x10E7E508 - .long 0x118CE508 - vxor 3,20,31 - vsrab 11,8,9 - vxor 20,8,23 - .long 0x11ADE508 - .long 0x11CEE508 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x11EFE508 - .long 0x1210E508 - lvx 24,0,7 - vand 11,11,10 - - .long 0x10E7ED08 - .long 0x118CED08 - vxor 8,8,11 - .long 0x11ADED08 - .long 0x11CEED08 - vxor 4,21,31 - vsrab 11,8,9 - vxor 21,8,23 - .long 0x11EFED08 - .long 0x1210ED08 - lvx 25,3,7 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - .long 0x10E7F508 - .long 0x118CF508 - vand 11,11,10 - .long 0x11ADF508 - .long 0x11CEF508 - vxor 8,8,11 - .long 0x11EFF508 - .long 0x1210F508 - vxor 5,22,31 - vsrab 11,8,9 - vxor 22,8,23 - - .long 0x10E70509 - .long 0x7C005699 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x118C0D09 - .long 0x7C235699 - .long 0x11AD1509 - vperm 0,0,0,6 - .long 0x7C5A5699 - vand 11,11,10 - .long 0x11CE1D09 - vperm 1,1,1,6 - .long 0x7C7B5699 - .long 0x11EF2509 - vperm 2,2,2,6 - .long 0x7C9C5699 - vxor 8,8,11 - .long 0x11702D09 - - vperm 3,3,3,6 - .long 0x7CBD5699 - addi 10,10,0x60 - vperm 4,4,4,6 - vperm 5,5,5,6 - - vperm 7,7,7,6 - vperm 12,12,12,6 - .long 0x7CE02799 - vxor 7,0,17 - vperm 13,13,13,6 - .long 0x7D832799 - vxor 12,1,18 - vperm 14,14,14,6 - .long 0x7DBA2799 - vxor 13,2,19 - vperm 15,15,15,6 - .long 0x7DDB2799 - vxor 14,3,20 - vperm 16,11,11,6 - .long 0x7DFC2799 - vxor 15,4,21 - .long 0x7E1D2799 - - vxor 16,5,22 - addi 4,4,0x60 - - mtctr 9 - beq .Loop_xts_enc6x - - addic. 5,5,0x60 - beq .Lxts_enc6x_zero - cmpwi 5,0x20 - blt .Lxts_enc6x_one - nop - beq .Lxts_enc6x_two - cmpwi 5,0x40 - blt .Lxts_enc6x_three - nop - beq .Lxts_enc6x_four - -.Lxts_enc6x_five: - vxor 7,1,17 - vxor 12,2,18 - vxor 13,3,19 - vxor 14,4,20 - vxor 15,5,21 - - bl _aesp8_xts_enc5x - - vperm 7,7,7,6 - vor 17,22,22 - vperm 12,12,12,6 - .long 0x7CE02799 - vperm 13,13,13,6 - .long 0x7D832799 - vperm 14,14,14,6 - .long 0x7DBA2799 - vxor 11,15,22 - vperm 15,15,15,6 - .long 0x7DDB2799 - .long 0x7DFC2799 - addi 4,4,0x50 - bne .Lxts_enc6x_steal - b .Lxts_enc6x_done - -.align 4 -.Lxts_enc6x_four: - vxor 7,2,17 - vxor 12,3,18 - vxor 13,4,19 - vxor 14,5,20 - vxor 15,15,15 - - bl _aesp8_xts_enc5x - - vperm 7,7,7,6 - vor 17,21,21 - vperm 12,12,12,6 - .long 0x7CE02799 - vperm 13,13,13,6 - .long 0x7D832799 - vxor 11,14,21 - vperm 14,14,14,6 - .long 0x7DBA2799 - .long 0x7DDB2799 - addi 4,4,0x40 - bne .Lxts_enc6x_steal - b .Lxts_enc6x_done - -.align 4 -.Lxts_enc6x_three: - vxor 7,3,17 - vxor 12,4,18 - vxor 13,5,19 - vxor 14,14,14 - vxor 15,15,15 - - bl _aesp8_xts_enc5x - - vperm 7,7,7,6 - vor 17,20,20 - vperm 12,12,12,6 - .long 0x7CE02799 - vxor 11,13,20 - vperm 13,13,13,6 - .long 0x7D832799 - .long 0x7DBA2799 - addi 4,4,0x30 - bne .Lxts_enc6x_steal - b .Lxts_enc6x_done - -.align 4 -.Lxts_enc6x_two: - vxor 7,4,17 - vxor 12,5,18 - vxor 13,13,13 - vxor 14,14,14 - vxor 15,15,15 - - bl _aesp8_xts_enc5x - - vperm 7,7,7,6 - vor 17,19,19 - vxor 11,12,19 - vperm 12,12,12,6 - .long 0x7CE02799 - .long 0x7D832799 - addi 4,4,0x20 - bne .Lxts_enc6x_steal - b .Lxts_enc6x_done - -.align 4 -.Lxts_enc6x_one: - vxor 7,5,17 - nop -.Loop_xts_enc1x: - .long 0x10E7C508 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD08 - lvx 25,3,7 - bdnz .Loop_xts_enc1x - - add 10,10,31 - cmpwi 31,0 - .long 0x10E7C508 - - subi 10,10,16 - .long 0x10E7CD08 - - lvsr 5,0,31 - .long 0x10E7D508 - - .long 0x7C005699 - .long 0x10E7DD08 - - addi 7,1,64+15 - .long 0x10E7E508 - lvx 24,0,7 - - .long 0x10E7ED08 - lvx 25,3,7 - vxor 17,17,31 - - vperm 0,0,0,6 - .long 0x10E7F508 - - vperm 0,0,0,5 - .long 0x10E78D09 - - vor 17,18,18 - vxor 11,7,18 - vperm 7,7,7,6 - .long 0x7CE02799 - addi 4,4,0x10 - bne .Lxts_enc6x_steal - b .Lxts_enc6x_done - -.align 4 -.Lxts_enc6x_zero: - cmpwi 31,0 - beq .Lxts_enc6x_done - - add 10,10,31 - subi 10,10,16 - .long 0x7C005699 - lvsr 5,0,31 - vperm 0,0,0,6 - vperm 0,0,0,5 - vxor 11,11,17 -.Lxts_enc6x_steal: - vxor 0,0,17 - vxor 7,7,7 - vspltisb 12,-1 - vperm 7,7,12,5 - vsel 7,0,11,7 - - subi 30,4,17 - subi 4,4,16 - mtctr 31 -.Loop_xts_enc6x_steal: - lbzu 0,1(30) - stb 0,16(30) - bdnz .Loop_xts_enc6x_steal - - li 31,0 - mtctr 9 - b .Loop_xts_enc1x - -.align 4 -.Lxts_enc6x_done: - cmpldi 8,0 - beq .Lxts_enc6x_ret - - vxor 8,17,23 - vperm 8,8,8,6 - .long 0x7D004799 - -.Lxts_enc6x_ret: - mtlr 11 - li 10,79 - li 11,95 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - - or 12,12,12 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - ld 26,400(1) - ld 27,408(1) - ld 28,416(1) - ld 29,424(1) - ld 30,432(1) - ld 31,440(1) - addi 1,1,448 - blr -.long 0 -.byte 0,12,0x04,1,0x80,6,6,0 -.long 0 - -.align 5 -_aesp8_xts_enc5x: - .long 0x10E7C508 - .long 0x118CC508 - .long 0x11ADC508 - .long 0x11CEC508 - .long 0x11EFC508 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD08 - .long 0x118CCD08 - .long 0x11ADCD08 - .long 0x11CECD08 - .long 0x11EFCD08 - lvx 25,3,7 - bdnz _aesp8_xts_enc5x - - add 10,10,31 - cmpwi 31,0 - .long 0x10E7C508 - .long 0x118CC508 - .long 0x11ADC508 - .long 0x11CEC508 - .long 0x11EFC508 - - subi 10,10,16 - .long 0x10E7CD08 - .long 0x118CCD08 - .long 0x11ADCD08 - .long 0x11CECD08 - .long 0x11EFCD08 - vxor 17,17,31 - - .long 0x10E7D508 - lvsr 5,0,31 - .long 0x118CD508 - .long 0x11ADD508 - .long 0x11CED508 - .long 0x11EFD508 - vxor 1,18,31 - - .long 0x10E7DD08 - .long 0x7C005699 - .long 0x118CDD08 - .long 0x11ADDD08 - .long 0x11CEDD08 - .long 0x11EFDD08 - vxor 2,19,31 - - addi 7,1,64+15 - .long 0x10E7E508 - .long 0x118CE508 - .long 0x11ADE508 - .long 0x11CEE508 - .long 0x11EFE508 - lvx 24,0,7 - vxor 3,20,31 - - .long 0x10E7ED08 - vperm 0,0,0,6 - .long 0x118CED08 - .long 0x11ADED08 - .long 0x11CEED08 - .long 0x11EFED08 - lvx 25,3,7 - vxor 4,21,31 - - .long 0x10E7F508 - vperm 0,0,0,5 - .long 0x118CF508 - .long 0x11ADF508 - .long 0x11CEF508 - .long 0x11EFF508 - - .long 0x10E78D09 - .long 0x118C0D09 - .long 0x11AD1509 - .long 0x11CE1D09 - .long 0x11EF2509 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.align 5 -_aesp8_xts_decrypt6x: - stdu 1,-448(1) - mflr 11 - li 7,207 - li 3,223 - std 11,464(1) - stvx 20,7,1 - addi 7,7,32 - stvx 21,3,1 - addi 3,3,32 - stvx 22,7,1 - addi 7,7,32 - stvx 23,3,1 - addi 3,3,32 - stvx 24,7,1 - addi 7,7,32 - stvx 25,3,1 - addi 3,3,32 - stvx 26,7,1 - addi 7,7,32 - stvx 27,3,1 - addi 3,3,32 - stvx 28,7,1 - addi 7,7,32 - stvx 29,3,1 - addi 3,3,32 - stvx 30,7,1 - stvx 31,3,1 - li 0,-1 - stw 12,396(1) - li 3,0x10 - std 26,400(1) - li 26,0x20 - std 27,408(1) - li 27,0x30 - std 28,416(1) - li 28,0x40 - std 29,424(1) - li 29,0x50 - std 30,432(1) - li 30,0x60 - std 31,440(1) - li 31,0x70 - or 0,0,0 - - subi 9,9,3 - - lvx 23,0,6 - lvx 30,3,6 - addi 6,6,0x20 - lvx 31,0,6 - vperm 23,30,23,7 - addi 7,1,64+15 - mtctr 9 - -.Load_xts_dec_key: - vperm 24,31,30,7 - lvx 30,3,6 - addi 6,6,0x20 - stvx 24,0,7 - vperm 25,30,31,7 - lvx 31,0,6 - stvx 25,3,7 - addi 7,7,0x20 - bdnz .Load_xts_dec_key - - lvx 26,3,6 - vperm 24,31,30,7 - lvx 27,26,6 - stvx 24,0,7 - vperm 25,26,31,7 - lvx 28,27,6 - stvx 25,3,7 - addi 7,1,64+15 - vperm 26,27,26,7 - lvx 29,28,6 - vperm 27,28,27,7 - lvx 30,29,6 - vperm 28,29,28,7 - lvx 31,30,6 - vperm 29,30,29,7 - lvx 22,31,6 - vperm 30,31,30,7 - lvx 24,0,7 - vperm 31,22,31,7 - lvx 25,3,7 - - vperm 0,2,4,5 - subi 10,10,31 - vxor 17,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vand 11,11,10 - vxor 7,0,17 - vxor 8,8,11 - - .long 0x7C235699 - vxor 18,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vperm 1,1,1,6 - vand 11,11,10 - vxor 12,1,18 - vxor 8,8,11 - - .long 0x7C5A5699 - andi. 31,5,15 - vxor 19,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vperm 2,2,2,6 - vand 11,11,10 - vxor 13,2,19 - vxor 8,8,11 - - .long 0x7C7B5699 - sub 5,5,31 - vxor 20,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vperm 3,3,3,6 - vand 11,11,10 - vxor 14,3,20 - vxor 8,8,11 - - .long 0x7C9C5699 - subi 5,5,0x60 - vxor 21,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vperm 4,4,4,6 - vand 11,11,10 - vxor 15,4,21 - vxor 8,8,11 - - .long 0x7CBD5699 - addi 10,10,0x60 - vxor 22,8,23 - vsrab 11,8,9 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - vperm 5,5,5,6 - vand 11,11,10 - vxor 16,5,22 - vxor 8,8,11 - - vxor 31,31,23 - mtctr 9 - b .Loop_xts_dec6x - -.align 5 -.Loop_xts_dec6x: - .long 0x10E7C548 - .long 0x118CC548 - .long 0x11ADC548 - .long 0x11CEC548 - .long 0x11EFC548 - .long 0x1210C548 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD48 - .long 0x118CCD48 - .long 0x11ADCD48 - .long 0x11CECD48 - .long 0x11EFCD48 - .long 0x1210CD48 - lvx 25,3,7 - bdnz .Loop_xts_dec6x - - subic 5,5,96 - vxor 0,17,31 - .long 0x10E7C548 - .long 0x118CC548 - vsrab 11,8,9 - vxor 17,8,23 - vaddubm 8,8,8 - .long 0x11ADC548 - .long 0x11CEC548 - vsldoi 11,11,11,15 - .long 0x11EFC548 - .long 0x1210C548 - - subfe. 0,0,0 - vand 11,11,10 - .long 0x10E7CD48 - .long 0x118CCD48 - vxor 8,8,11 - .long 0x11ADCD48 - .long 0x11CECD48 - vxor 1,18,31 - vsrab 11,8,9 - vxor 18,8,23 - .long 0x11EFCD48 - .long 0x1210CD48 - - and 0,0,5 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x10E7D548 - .long 0x118CD548 - vand 11,11,10 - .long 0x11ADD548 - .long 0x11CED548 - vxor 8,8,11 - .long 0x11EFD548 - .long 0x1210D548 - - add 10,10,0 - - - - vxor 2,19,31 - vsrab 11,8,9 - vxor 19,8,23 - vaddubm 8,8,8 - .long 0x10E7DD48 - .long 0x118CDD48 - vsldoi 11,11,11,15 - .long 0x11ADDD48 - .long 0x11CEDD48 - vand 11,11,10 - .long 0x11EFDD48 - .long 0x1210DD48 - - addi 7,1,64+15 - vxor 8,8,11 - .long 0x10E7E548 - .long 0x118CE548 - vxor 3,20,31 - vsrab 11,8,9 - vxor 20,8,23 - .long 0x11ADE548 - .long 0x11CEE548 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x11EFE548 - .long 0x1210E548 - lvx 24,0,7 - vand 11,11,10 - - .long 0x10E7ED48 - .long 0x118CED48 - vxor 8,8,11 - .long 0x11ADED48 - .long 0x11CEED48 - vxor 4,21,31 - vsrab 11,8,9 - vxor 21,8,23 - .long 0x11EFED48 - .long 0x1210ED48 - lvx 25,3,7 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - - .long 0x10E7F548 - .long 0x118CF548 - vand 11,11,10 - .long 0x11ADF548 - .long 0x11CEF548 - vxor 8,8,11 - .long 0x11EFF548 - .long 0x1210F548 - vxor 5,22,31 - vsrab 11,8,9 - vxor 22,8,23 - - .long 0x10E70549 - .long 0x7C005699 - vaddubm 8,8,8 - vsldoi 11,11,11,15 - .long 0x118C0D49 - .long 0x7C235699 - .long 0x11AD1549 - vperm 0,0,0,6 - .long 0x7C5A5699 - vand 11,11,10 - .long 0x11CE1D49 - vperm 1,1,1,6 - .long 0x7C7B5699 - .long 0x11EF2549 - vperm 2,2,2,6 - .long 0x7C9C5699 - vxor 8,8,11 - .long 0x12102D49 - vperm 3,3,3,6 - .long 0x7CBD5699 - addi 10,10,0x60 - vperm 4,4,4,6 - vperm 5,5,5,6 - - vperm 7,7,7,6 - vperm 12,12,12,6 - .long 0x7CE02799 - vxor 7,0,17 - vperm 13,13,13,6 - .long 0x7D832799 - vxor 12,1,18 - vperm 14,14,14,6 - .long 0x7DBA2799 - vxor 13,2,19 - vperm 15,15,15,6 - .long 0x7DDB2799 - vxor 14,3,20 - vperm 16,16,16,6 - .long 0x7DFC2799 - vxor 15,4,21 - .long 0x7E1D2799 - vxor 16,5,22 - addi 4,4,0x60 - - mtctr 9 - beq .Loop_xts_dec6x - - addic. 5,5,0x60 - beq .Lxts_dec6x_zero - cmpwi 5,0x20 - blt .Lxts_dec6x_one - nop - beq .Lxts_dec6x_two - cmpwi 5,0x40 - blt .Lxts_dec6x_three - nop - beq .Lxts_dec6x_four - -.Lxts_dec6x_five: - vxor 7,1,17 - vxor 12,2,18 - vxor 13,3,19 - vxor 14,4,20 - vxor 15,5,21 - - bl _aesp8_xts_dec5x - - vperm 7,7,7,6 - vor 17,22,22 - vxor 18,8,23 - vperm 12,12,12,6 - .long 0x7CE02799 - vxor 7,0,18 - vperm 13,13,13,6 - .long 0x7D832799 - vperm 14,14,14,6 - .long 0x7DBA2799 - vperm 15,15,15,6 - .long 0x7DDB2799 - .long 0x7DFC2799 - addi 4,4,0x50 - bne .Lxts_dec6x_steal - b .Lxts_dec6x_done - -.align 4 -.Lxts_dec6x_four: - vxor 7,2,17 - vxor 12,3,18 - vxor 13,4,19 - vxor 14,5,20 - vxor 15,15,15 - - bl _aesp8_xts_dec5x - - vperm 7,7,7,6 - vor 17,21,21 - vor 18,22,22 - vperm 12,12,12,6 - .long 0x7CE02799 - vxor 7,0,22 - vperm 13,13,13,6 - .long 0x7D832799 - vperm 14,14,14,6 - .long 0x7DBA2799 - .long 0x7DDB2799 - addi 4,4,0x40 - bne .Lxts_dec6x_steal - b .Lxts_dec6x_done - -.align 4 -.Lxts_dec6x_three: - vxor 7,3,17 - vxor 12,4,18 - vxor 13,5,19 - vxor 14,14,14 - vxor 15,15,15 - - bl _aesp8_xts_dec5x - - vperm 7,7,7,6 - vor 17,20,20 - vor 18,21,21 - vperm 12,12,12,6 - .long 0x7CE02799 - vxor 7,0,21 - vperm 13,13,13,6 - .long 0x7D832799 - .long 0x7DBA2799 - addi 4,4,0x30 - bne .Lxts_dec6x_steal - b .Lxts_dec6x_done - -.align 4 -.Lxts_dec6x_two: - vxor 7,4,17 - vxor 12,5,18 - vxor 13,13,13 - vxor 14,14,14 - vxor 15,15,15 - - bl _aesp8_xts_dec5x - - vperm 7,7,7,6 - vor 17,19,19 - vor 18,20,20 - vperm 12,12,12,6 - .long 0x7CE02799 - vxor 7,0,20 - .long 0x7D832799 - addi 4,4,0x20 - bne .Lxts_dec6x_steal - b .Lxts_dec6x_done - -.align 4 -.Lxts_dec6x_one: - vxor 7,5,17 - nop -.Loop_xts_dec1x: - .long 0x10E7C548 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD48 - lvx 25,3,7 - bdnz .Loop_xts_dec1x - - subi 0,31,1 - .long 0x10E7C548 - - andi. 0,0,16 - cmpwi 31,0 - .long 0x10E7CD48 - - sub 10,10,0 - .long 0x10E7D548 - - .long 0x7C005699 - .long 0x10E7DD48 - - addi 7,1,64+15 - .long 0x10E7E548 - lvx 24,0,7 - - .long 0x10E7ED48 - lvx 25,3,7 - vxor 17,17,31 - - vperm 0,0,0,6 - .long 0x10E7F548 - - mtctr 9 - .long 0x10E78D49 - - vor 17,18,18 - vor 18,19,19 - vperm 7,7,7,6 - .long 0x7CE02799 - addi 4,4,0x10 - vxor 7,0,19 - bne .Lxts_dec6x_steal - b .Lxts_dec6x_done - -.align 4 -.Lxts_dec6x_zero: - cmpwi 31,0 - beq .Lxts_dec6x_done - - .long 0x7C005699 - vperm 0,0,0,6 - vxor 7,0,18 -.Lxts_dec6x_steal: - .long 0x10E7C548 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD48 - lvx 25,3,7 - bdnz .Lxts_dec6x_steal - - add 10,10,31 - .long 0x10E7C548 - - cmpwi 31,0 - .long 0x10E7CD48 - - .long 0x7C005699 - .long 0x10E7D548 - - lvsr 5,0,31 - .long 0x10E7DD48 - - addi 7,1,64+15 - .long 0x10E7E548 - lvx 24,0,7 - - .long 0x10E7ED48 - lvx 25,3,7 - vxor 18,18,31 - - vperm 0,0,0,6 - .long 0x10E7F548 - - vperm 0,0,0,5 - .long 0x11679549 - - vperm 7,11,11,6 - .long 0x7CE02799 - - - vxor 7,7,7 - vspltisb 12,-1 - vperm 7,7,12,5 - vsel 7,0,11,7 - vxor 7,7,17 - - subi 30,4,1 - mtctr 31 -.Loop_xts_dec6x_steal: - lbzu 0,1(30) - stb 0,16(30) - bdnz .Loop_xts_dec6x_steal - - li 31,0 - mtctr 9 - b .Loop_xts_dec1x - -.align 4 -.Lxts_dec6x_done: - cmpldi 8,0 - beq .Lxts_dec6x_ret - - vxor 8,17,23 - vperm 8,8,8,6 - .long 0x7D004799 - -.Lxts_dec6x_ret: - mtlr 11 - li 10,79 - li 11,95 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - stvx 9,10,1 - addi 10,10,32 - stvx 9,11,1 - addi 11,11,32 - - or 12,12,12 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - ld 26,400(1) - ld 27,408(1) - ld 28,416(1) - ld 29,424(1) - ld 30,432(1) - ld 31,440(1) - addi 1,1,448 - blr -.long 0 -.byte 0,12,0x04,1,0x80,6,6,0 -.long 0 - -.align 5 -_aesp8_xts_dec5x: - .long 0x10E7C548 - .long 0x118CC548 - .long 0x11ADC548 - .long 0x11CEC548 - .long 0x11EFC548 - lvx 24,26,7 - addi 7,7,0x20 - - .long 0x10E7CD48 - .long 0x118CCD48 - .long 0x11ADCD48 - .long 0x11CECD48 - .long 0x11EFCD48 - lvx 25,3,7 - bdnz _aesp8_xts_dec5x - - subi 0,31,1 - .long 0x10E7C548 - .long 0x118CC548 - .long 0x11ADC548 - .long 0x11CEC548 - .long 0x11EFC548 - - andi. 0,0,16 - cmpwi 31,0 - .long 0x10E7CD48 - .long 0x118CCD48 - .long 0x11ADCD48 - .long 0x11CECD48 - .long 0x11EFCD48 - vxor 17,17,31 - - sub 10,10,0 - .long 0x10E7D548 - .long 0x118CD548 - .long 0x11ADD548 - .long 0x11CED548 - .long 0x11EFD548 - vxor 1,18,31 - - .long 0x10E7DD48 - .long 0x7C005699 - .long 0x118CDD48 - .long 0x11ADDD48 - .long 0x11CEDD48 - .long 0x11EFDD48 - vxor 2,19,31 - - addi 7,1,64+15 - .long 0x10E7E548 - .long 0x118CE548 - .long 0x11ADE548 - .long 0x11CEE548 - .long 0x11EFE548 - lvx 24,0,7 - vxor 3,20,31 - - .long 0x10E7ED48 - vperm 0,0,0,6 - .long 0x118CED48 - .long 0x11ADED48 - .long 0x11CEED48 - .long 0x11EFED48 - lvx 25,3,7 - vxor 4,21,31 - - .long 0x10E7F548 - .long 0x118CF548 - .long 0x11ADF548 - .long 0x11CEF548 - .long 0x11EFF548 - - .long 0x10E78D49 - .long 0x118C0D49 - .long 0x11AD1549 - .long 0x11CE1D49 - .long 0x11EF2549 - mtctr 9 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 diff --git a/sys/crypto/openssl/powerpc64le/chacha-ppc.S b/sys/crypto/openssl/powerpc64le/chacha-ppc.S deleted file mode 100644 index 2685a638841..00000000000 --- a/sys/crypto/openssl/powerpc64le/chacha-ppc.S +++ /dev/null @@ -1,1371 +0,0 @@ -/* Do not modify. This file is auto-generated from chacha-ppc.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl ChaCha20_ctr32_int -.type ChaCha20_ctr32_int,@function -.align 5 -ChaCha20_ctr32_int: -.localentry ChaCha20_ctr32_int,0 - -__ChaCha20_ctr32_int: - cmpldi 5,0 - .long 0x4DC20020 - - stdu 1,-256(1) - mflr 0 - - std 14,112(1) - std 15,120(1) - std 16,128(1) - std 17,136(1) - std 18,144(1) - std 19,152(1) - std 20,160(1) - std 21,168(1) - std 22,176(1) - std 23,184(1) - std 24,192(1) - std 25,200(1) - std 26,208(1) - std 27,216(1) - std 28,224(1) - std 29,232(1) - std 30,240(1) - std 31,248(1) - std 0,272(1) - - lwz 11,0(7) - lwz 12,4(7) - lwz 14,8(7) - lwz 15,12(7) - - bl __ChaCha20_1x - - ld 0,272(1) - ld 14,112(1) - ld 15,120(1) - ld 16,128(1) - ld 17,136(1) - ld 18,144(1) - ld 19,152(1) - ld 20,160(1) - ld 21,168(1) - ld 22,176(1) - ld 23,184(1) - ld 24,192(1) - ld 25,200(1) - ld 26,208(1) - ld 27,216(1) - ld 28,224(1) - ld 29,232(1) - ld 30,240(1) - ld 31,248(1) - mtlr 0 - addi 1,1,256 - blr -.long 0 -.byte 0,12,4,1,0x80,18,5,0 -.long 0 -.size ChaCha20_ctr32_int,.-ChaCha20_ctr32_int - -.align 5 -__ChaCha20_1x: -.Loop_outer: - lis 16,0x6170 - lis 17,0x3320 - lis 18,0x7962 - lis 19,0x6b20 - ori 16,16,0x7865 - ori 17,17,0x646e - ori 18,18,0x2d32 - ori 19,19,0x6574 - - li 0,10 - lwz 20,0(6) - lwz 21,4(6) - lwz 22,8(6) - lwz 23,12(6) - lwz 24,16(6) - mr 28,11 - lwz 25,20(6) - mr 29,12 - lwz 26,24(6) - mr 30,14 - lwz 27,28(6) - mr 31,15 - - mr 7,20 - mr 8,21 - mr 9,22 - mr 10,23 - - mtctr 0 -.Loop: - add 16,16,20 - add 17,17,21 - add 18,18,22 - add 19,19,23 - xor 28,28,16 - xor 29,29,17 - xor 30,30,18 - xor 31,31,19 - rotlwi 28,28,16 - rotlwi 29,29,16 - rotlwi 30,30,16 - rotlwi 31,31,16 - add 24,24,28 - add 25,25,29 - add 26,26,30 - add 27,27,31 - xor 20,20,24 - xor 21,21,25 - xor 22,22,26 - xor 23,23,27 - rotlwi 20,20,12 - rotlwi 21,21,12 - rotlwi 22,22,12 - rotlwi 23,23,12 - add 16,16,20 - add 17,17,21 - add 18,18,22 - add 19,19,23 - xor 28,28,16 - xor 29,29,17 - xor 30,30,18 - xor 31,31,19 - rotlwi 28,28,8 - rotlwi 29,29,8 - rotlwi 30,30,8 - rotlwi 31,31,8 - add 24,24,28 - add 25,25,29 - add 26,26,30 - add 27,27,31 - xor 20,20,24 - xor 21,21,25 - xor 22,22,26 - xor 23,23,27 - rotlwi 20,20,7 - rotlwi 21,21,7 - rotlwi 22,22,7 - rotlwi 23,23,7 - add 16,16,21 - add 17,17,22 - add 18,18,23 - add 19,19,20 - xor 31,31,16 - xor 28,28,17 - xor 29,29,18 - xor 30,30,19 - rotlwi 31,31,16 - rotlwi 28,28,16 - rotlwi 29,29,16 - rotlwi 30,30,16 - add 26,26,31 - add 27,27,28 - add 24,24,29 - add 25,25,30 - xor 21,21,26 - xor 22,22,27 - xor 23,23,24 - xor 20,20,25 - rotlwi 21,21,12 - rotlwi 22,22,12 - rotlwi 23,23,12 - rotlwi 20,20,12 - add 16,16,21 - add 17,17,22 - add 18,18,23 - add 19,19,20 - xor 31,31,16 - xor 28,28,17 - xor 29,29,18 - xor 30,30,19 - rotlwi 31,31,8 - rotlwi 28,28,8 - rotlwi 29,29,8 - rotlwi 30,30,8 - add 26,26,31 - add 27,27,28 - add 24,24,29 - add 25,25,30 - xor 21,21,26 - xor 22,22,27 - xor 23,23,24 - xor 20,20,25 - rotlwi 21,21,7 - rotlwi 22,22,7 - rotlwi 23,23,7 - rotlwi 20,20,7 - bdnz .Loop - - subic 5,5,64 - addi 16,16,0x7865 - addi 17,17,0x646e - addi 18,18,0x2d32 - addi 19,19,0x6574 - addis 16,16,0x6170 - addis 17,17,0x3320 - addis 18,18,0x7962 - addis 19,19,0x6b20 - - subfe. 0,0,0 - add 20,20,7 - lwz 7,16(6) - add 21,21,8 - lwz 8,20(6) - add 22,22,9 - lwz 9,24(6) - add 23,23,10 - lwz 10,28(6) - add 24,24,7 - add 25,25,8 - add 26,26,9 - add 27,27,10 - - add 28,28,11 - add 29,29,12 - add 30,30,14 - add 31,31,15 - addi 11,11,1 - bne .Ltail - - lwz 7,0(4) - lwz 8,4(4) - cmpldi 5,0 - lwz 9,8(4) - lwz 10,12(4) - xor 16,16,7 - lwz 7,16(4) - xor 17,17,8 - lwz 8,20(4) - xor 18,18,9 - lwz 9,24(4) - xor 19,19,10 - lwz 10,28(4) - xor 20,20,7 - lwz 7,32(4) - xor 21,21,8 - lwz 8,36(4) - xor 22,22,9 - lwz 9,40(4) - xor 23,23,10 - lwz 10,44(4) - xor 24,24,7 - lwz 7,48(4) - xor 25,25,8 - lwz 8,52(4) - xor 26,26,9 - lwz 9,56(4) - xor 27,27,10 - lwz 10,60(4) - xor 28,28,7 - stw 16,0(3) - xor 29,29,8 - stw 17,4(3) - xor 30,30,9 - stw 18,8(3) - xor 31,31,10 - stw 19,12(3) - stw 20,16(3) - stw 21,20(3) - stw 22,24(3) - stw 23,28(3) - stw 24,32(3) - stw 25,36(3) - stw 26,40(3) - stw 27,44(3) - stw 28,48(3) - stw 29,52(3) - stw 30,56(3) - addi 4,4,64 - stw 31,60(3) - addi 3,3,64 - - bne .Loop_outer - - blr - -.align 4 -.Ltail: - addi 5,5,64 - subi 4,4,1 - subi 3,3,1 - addi 7,1,48-1 - mtctr 5 - - stw 16,48(1) - stw 17,52(1) - stw 18,56(1) - stw 19,60(1) - stw 20,64(1) - stw 21,68(1) - stw 22,72(1) - stw 23,76(1) - stw 24,80(1) - stw 25,84(1) - stw 26,88(1) - stw 27,92(1) - stw 28,96(1) - stw 29,100(1) - stw 30,104(1) - stw 31,108(1) - -.Loop_tail: - lbzu 11,1(4) - lbzu 16,1(7) - xor 12,11,16 - stbu 12,1(3) - bdnz .Loop_tail - - stw 1,48(1) - stw 1,52(1) - stw 1,56(1) - stw 1,60(1) - stw 1,64(1) - stw 1,68(1) - stw 1,72(1) - stw 1,76(1) - stw 1,80(1) - stw 1,84(1) - stw 1,88(1) - stw 1,92(1) - stw 1,96(1) - stw 1,100(1) - stw 1,104(1) - stw 1,108(1) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.globl ChaCha20_ctr32_vmx -.type ChaCha20_ctr32_vmx,@function -.align 5 -ChaCha20_ctr32_vmx: -.localentry ChaCha20_ctr32_vmx,0 - - cmpldi 5,256 - blt __ChaCha20_ctr32_int - - stdu 1,-416(1) - mflr 0 - li 10,127 - li 11,143 - li 12,-1 - stvx 23,10,1 - addi 10,10,32 - stvx 24,11,1 - addi 11,11,32 - stvx 25,10,1 - addi 10,10,32 - stvx 26,11,1 - addi 11,11,32 - stvx 27,10,1 - addi 10,10,32 - stvx 28,11,1 - addi 11,11,32 - stvx 29,10,1 - addi 10,10,32 - stvx 30,11,1 - stvx 31,10,1 - stw 12,268(1) - std 14,272(1) - std 15,280(1) - std 16,288(1) - std 17,296(1) - std 18,304(1) - std 19,312(1) - std 20,320(1) - std 21,328(1) - std 22,336(1) - std 23,344(1) - std 24,352(1) - std 25,360(1) - std 26,368(1) - std 27,376(1) - std 28,384(1) - std 29,392(1) - std 30,400(1) - std 31,408(1) - li 12,-4096+511 - std 0, 432(1) - or 12,12,12 - - bl .Lconsts - li 16,16 - li 17,32 - li 18,48 - li 19,64 - li 20,31 - li 21,15 - - lvx 13,0,6 - lvsr 29,0,6 - lvx 14,16,6 - lvx 27,20,6 - - lvx 15,0,7 - lvsr 30,0,7 - lvx 28,21,7 - - lvx 12,0,12 - lvx 17,16,12 - lvx 18,17,12 - lvx 19,18,12 - lvx 23,19,12 - - vperm 13,14,13,29 - vperm 14,27,14,29 - vperm 15,28,15,30 - - lwz 11,0(7) - lwz 12,4(7) - vadduwm 15,15,17 - lwz 14,8(7) - vadduwm 16,15,17 - lwz 15,12(7) - vadduwm 17,16,17 - - vxor 29,29,29 - vspltisw 26,-1 - lvsr 24,0,4 - lvsl 25,0,3 - vperm 26,26,29,25 - - - - - - - - li 0,10 - b .Loop_outer_vmx - -.align 4 -.Loop_outer_vmx: - lis 16,0x6170 - lis 17,0x3320 - vor 0,12,12 - lis 18,0x7962 - lis 19,0x6b20 - vor 4,12,12 - ori 16,16,0x7865 - ori 17,17,0x646e - vor 8,12,12 - ori 18,18,0x2d32 - ori 19,19,0x6574 - vor 1,13,13 - - lwz 20,0(6) - vor 5,13,13 - lwz 21,4(6) - vor 9,13,13 - lwz 22,8(6) - vor 2,14,14 - lwz 23,12(6) - vor 6,14,14 - lwz 24,16(6) - vor 10,14,14 - mr 28,11 - lwz 25,20(6) - vor 3,15,15 - mr 29,12 - lwz 26,24(6) - vor 7,16,16 - mr 30,14 - lwz 27,28(6) - vor 11,17,17 - mr 31,15 - - mr 7,20 - mr 8,21 - mr 9,22 - mr 10,23 - - vspltisw 27,12 - vspltisw 28,7 - - mtctr 0 - nop -.Loop_vmx: - vadduwm 0,0,1 - vadduwm 4,4,5 - vadduwm 8,8,9 - add 16,16,20 - add 17,17,21 - add 18,18,22 - vxor 3,3,0 - vxor 7,7,4 - vxor 11,11,8 - add 19,19,23 - xor 28,28,16 - xor 29,29,17 - vperm 3,3,3,19 - vperm 7,7,7,19 - vperm 11,11,11,19 - xor 30,30,18 - xor 31,31,19 - rotlwi 28,28,16 - vadduwm 2,2,3 - vadduwm 6,6,7 - vadduwm 10,10,11 - rotlwi 29,29,16 - rotlwi 30,30,16 - rotlwi 31,31,16 - vxor 1,1,2 - vxor 5,5,6 - vxor 9,9,10 - add 24,24,28 - add 25,25,29 - add 26,26,30 - vrlw 1,1,27 - vrlw 5,5,27 - vrlw 9,9,27 - add 27,27,31 - xor 20,20,24 - xor 21,21,25 - vadduwm 0,0,1 - vadduwm 4,4,5 - vadduwm 8,8,9 - xor 22,22,26 - xor 23,23,27 - rotlwi 20,20,12 - vxor 3,3,0 - vxor 7,7,4 - vxor 11,11,8 - rotlwi 21,21,12 - rotlwi 22,22,12 - rotlwi 23,23,12 - vperm 3,3,3,23 - vperm 7,7,7,23 - vperm 11,11,11,23 - add 16,16,20 - add 17,17,21 - add 18,18,22 - vadduwm 2,2,3 - vadduwm 6,6,7 - vadduwm 10,10,11 - add 19,19,23 - xor 28,28,16 - xor 29,29,17 - vxor 1,1,2 - vxor 5,5,6 - vxor 9,9,10 - xor 30,30,18 - xor 31,31,19 - rotlwi 28,28,8 - vrlw 1,1,28 - vrlw 5,5,28 - vrlw 9,9,28 - rotlwi 29,29,8 - rotlwi 30,30,8 - rotlwi 31,31,8 - vsldoi 2,2,2, 8 - vsldoi 6,6,6, 8 - vsldoi 10,10,10, 8 - add 24,24,28 - add 25,25,29 - add 26,26,30 - vsldoi 1,1,1, 12 - vsldoi 5,5,5, 12 - vsldoi 9,9,9, 12 - add 27,27,31 - xor 20,20,24 - xor 21,21,25 - vsldoi 3,3,3, 4 - vsldoi 7,7,7, 4 - vsldoi 11,11,11, 4 - xor 22,22,26 - xor 23,23,27 - rotlwi 20,20,7 - rotlwi 21,21,7 - rotlwi 22,22,7 - rotlwi 23,23,7 - vadduwm 0,0,1 - vadduwm 4,4,5 - vadduwm 8,8,9 - add 16,16,21 - add 17,17,22 - add 18,18,23 - vxor 3,3,0 - vxor 7,7,4 - vxor 11,11,8 - add 19,19,20 - xor 31,31,16 - xor 28,28,17 - vperm 3,3,3,19 - vperm 7,7,7,19 - vperm 11,11,11,19 - xor 29,29,18 - xor 30,30,19 - rotlwi 31,31,16 - vadduwm 2,2,3 - vadduwm 6,6,7 - vadduwm 10,10,11 - rotlwi 28,28,16 - rotlwi 29,29,16 - rotlwi 30,30,16 - vxor 1,1,2 - vxor 5,5,6 - vxor 9,9,10 - add 26,26,31 - add 27,27,28 - add 24,24,29 - vrlw 1,1,27 - vrlw 5,5,27 - vrlw 9,9,27 - add 25,25,30 - xor 21,21,26 - xor 22,22,27 - vadduwm 0,0,1 - vadduwm 4,4,5 - vadduwm 8,8,9 - xor 23,23,24 - xor 20,20,25 - rotlwi 21,21,12 - vxor 3,3,0 - vxor 7,7,4 - vxor 11,11,8 - rotlwi 22,22,12 - rotlwi 23,23,12 - rotlwi 20,20,12 - vperm 3,3,3,23 - vperm 7,7,7,23 - vperm 11,11,11,23 - add 16,16,21 - add 17,17,22 - add 18,18,23 - vadduwm 2,2,3 - vadduwm 6,6,7 - vadduwm 10,10,11 - add 19,19,20 - xor 31,31,16 - xor 28,28,17 - vxor 1,1,2 - vxor 5,5,6 - vxor 9,9,10 - xor 29,29,18 - xor 30,30,19 - rotlwi 31,31,8 - vrlw 1,1,28 - vrlw 5,5,28 - vrlw 9,9,28 - rotlwi 28,28,8 - rotlwi 29,29,8 - rotlwi 30,30,8 - vsldoi 2,2,2, 8 - vsldoi 6,6,6, 8 - vsldoi 10,10,10, 8 - add 26,26,31 - add 27,27,28 - add 24,24,29 - vsldoi 1,1,1, 4 - vsldoi 5,5,5, 4 - vsldoi 9,9,9, 4 - add 25,25,30 - xor 21,21,26 - xor 22,22,27 - vsldoi 3,3,3, 12 - vsldoi 7,7,7, 12 - vsldoi 11,11,11, 12 - xor 23,23,24 - xor 20,20,25 - rotlwi 21,21,7 - rotlwi 22,22,7 - rotlwi 23,23,7 - rotlwi 20,20,7 - bdnz .Loop_vmx - - subi 5,5,256 - addi 16,16,0x7865 - addi 17,17,0x646e - addi 18,18,0x2d32 - addi 19,19,0x6574 - addis 16,16,0x6170 - addis 17,17,0x3320 - addis 18,18,0x7962 - addis 19,19,0x6b20 - add 20,20,7 - lwz 7,16(6) - add 21,21,8 - lwz 8,20(6) - add 22,22,9 - lwz 9,24(6) - add 23,23,10 - lwz 10,28(6) - add 24,24,7 - add 25,25,8 - add 26,26,9 - add 27,27,10 - add 28,28,11 - add 29,29,12 - add 30,30,14 - add 31,31,15 - - vadduwm 0,0,12 - vadduwm 4,4,12 - vadduwm 8,8,12 - vadduwm 1,1,13 - vadduwm 5,5,13 - vadduwm 9,9,13 - vadduwm 2,2,14 - vadduwm 6,6,14 - vadduwm 10,10,14 - vadduwm 3,3,15 - vadduwm 7,7,16 - vadduwm 11,11,17 - - addi 11,11,4 - vadduwm 15,15,18 - vadduwm 16,16,18 - vadduwm 17,17,18 - - lwz 7,0(4) - lwz 8,4(4) - lwz 9,8(4) - lwz 10,12(4) - xor 16,16,7 - lwz 7,16(4) - xor 17,17,8 - lwz 8,20(4) - xor 18,18,9 - lwz 9,24(4) - xor 19,19,10 - lwz 10,28(4) - xor 20,20,7 - lwz 7,32(4) - xor 21,21,8 - lwz 8,36(4) - xor 22,22,9 - lwz 9,40(4) - xor 23,23,10 - lwz 10,44(4) - xor 24,24,7 - lwz 7,48(4) - xor 25,25,8 - lwz 8,52(4) - xor 26,26,9 - lwz 9,56(4) - xor 27,27,10 - lwz 10,60(4) - xor 28,28,7 - stw 16,0(3) - xor 29,29,8 - stw 17,4(3) - xor 30,30,9 - stw 18,8(3) - xor 31,31,10 - stw 19,12(3) - addi 4,4,64 - stw 20,16(3) - li 7,16 - stw 21,20(3) - li 8,32 - stw 22,24(3) - li 9,48 - stw 23,28(3) - li 10,64 - stw 24,32(3) - stw 25,36(3) - stw 26,40(3) - stw 27,44(3) - stw 28,48(3) - stw 29,52(3) - stw 30,56(3) - stw 31,60(3) - addi 3,3,64 - - lvx 27,0,4 - lvx 28,7,4 - lvx 29,8,4 - lvx 30,9,4 - lvx 31,10,4 - addi 4,4,64 - - vperm 27,28,27,24 - vperm 28,29,28,24 - vperm 29,30,29,24 - vperm 30,31,30,24 - vxor 0,0,27 - vxor 1,1,28 - lvx 28,7,4 - vxor 2,2,29 - lvx 29,8,4 - vxor 3,3,30 - lvx 30,9,4 - lvx 27,10,4 - addi 4,4,64 - li 10,63 - vperm 0,0,0,25 - vperm 1,1,1,25 - vperm 2,2,2,25 - vperm 3,3,3,25 - - vperm 31,28,31,24 - vperm 28,29,28,24 - vperm 29,30,29,24 - vperm 30,27,30,24 - vxor 4,4,31 - vxor 5,5,28 - lvx 28,7,4 - vxor 6,6,29 - lvx 29,8,4 - vxor 7,7,30 - lvx 30,9,4 - lvx 31,10,4 - addi 4,4,64 - vperm 4,4,4,25 - vperm 5,5,5,25 - vperm 6,6,6,25 - vperm 7,7,7,25 - - vperm 27,28,27,24 - vperm 28,29,28,24 - vperm 29,30,29,24 - vperm 30,31,30,24 - vxor 8,8,27 - vxor 9,9,28 - vxor 10,10,29 - vxor 11,11,30 - vperm 8,8,8,25 - vperm 9,9,9,25 - vperm 10,10,10,25 - vperm 11,11,11,25 - - andi. 17,3,15 - mr 16,3 - - vsel 27,0,1,26 - vsel 28,1,2,26 - vsel 29,2,3,26 - vsel 30,3,4,26 - vsel 1,4,5,26 - vsel 2,5,6,26 - vsel 3,6,7,26 - vsel 4,7,8,26 - vsel 5,8,9,26 - vsel 6,9,10,26 - vsel 7,10,11,26 - - - stvx 27,7,3 - stvx 28,8,3 - stvx 29,9,3 - addi 3,3,64 - stvx 30,0,3 - stvx 1,7,3 - stvx 2,8,3 - stvx 3,9,3 - addi 3,3,64 - stvx 4,0,3 - stvx 5,7,3 - stvx 6,8,3 - stvx 7,9,3 - addi 3,3,64 - - beq .Laligned_vmx - - sub 18,3,17 - li 19,0 -.Lunaligned_tail_vmx: - stvebx 11,19,18 - addi 19,19,1 - cmpw 19,17 - bne .Lunaligned_tail_vmx - - sub 18,16,17 -.Lunaligned_head_vmx: - stvebx 0,17,18 - cmpwi 17,15 - addi 17,17,1 - bne .Lunaligned_head_vmx - - cmpldi 5,255 - bgt .Loop_outer_vmx - - b .Ldone_vmx - -.align 4 -.Laligned_vmx: - stvx 0,0,16 - - cmpldi 5,255 - bgt .Loop_outer_vmx - nop - -.Ldone_vmx: - cmpldi 5,0 - bnel __ChaCha20_1x - - lwz 12,268(1) - li 10,127 - li 11,143 - or 12,12,12 - lvx 23,10,1 - addi 10,10,32 - lvx 24,11,1 - addi 11,11,32 - lvx 25,10,1 - addi 10,10,32 - lvx 26,11,1 - addi 11,11,32 - lvx 27,10,1 - addi 10,10,32 - lvx 28,11,1 - addi 11,11,32 - lvx 29,10,1 - addi 10,10,32 - lvx 30,11,1 - lvx 31,10,1 - ld 0, 432(1) - ld 14,272(1) - ld 15,280(1) - ld 16,288(1) - ld 17,296(1) - ld 18,304(1) - ld 19,312(1) - ld 20,320(1) - ld 21,328(1) - ld 22,336(1) - ld 23,344(1) - ld 24,352(1) - ld 25,360(1) - ld 26,368(1) - ld 27,376(1) - ld 28,384(1) - ld 29,392(1) - ld 30,400(1) - ld 31,408(1) - mtlr 0 - addi 1,1,416 - blr -.long 0 -.byte 0,12,0x04,1,0x80,18,5,0 -.long 0 -.size ChaCha20_ctr32_vmx,.-ChaCha20_ctr32_vmx - -.globl ChaCha20_ctr32_vsx -.type ChaCha20_ctr32_vsx,@function -.align 5 -ChaCha20_ctr32_vsx: -.localentry ChaCha20_ctr32_vsx,0 - - stdu 1,-224(1) - mflr 0 - li 10,127 - li 11,143 - li 12,-1 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 12,220(1) - li 12,-4096+63 - std 0, 240(1) - or 12,12,12 - - bl .Lconsts - .long 0x7E006619 - addi 12,12,0x50 - li 8,16 - li 9,32 - li 10,48 - li 11,64 - - .long 0x7E203619 - .long 0x7E483619 - .long 0x7E603E19 - - vxor 27,27,27 - .long 0x7F8B6619 - vspltw 26,19,0 - vsldoi 19,19,27,4 - vsldoi 19,27,19,12 - vadduwm 26,26,28 - - - - - - li 0,10 - mtctr 0 - b .Loop_outer_vsx - -.align 5 -.Loop_outer_vsx: - lvx 0,0,12 - lvx 1,8,12 - lvx 2,9,12 - lvx 3,10,12 - - vspltw 4,17,0 - vspltw 5,17,1 - vspltw 6,17,2 - vspltw 7,17,3 - - vspltw 8,18,0 - vspltw 9,18,1 - vspltw 10,18,2 - vspltw 11,18,3 - - vor 12,26,26 - vspltw 13,19,1 - vspltw 14,19,2 - vspltw 15,19,3 - - vspltisw 27,-16 - vspltisw 28,12 - vspltisw 29,8 - vspltisw 30,7 - -.Loop_vsx: - vadduwm 0,0,4 - vadduwm 1,1,5 - vadduwm 2,2,6 - vadduwm 3,3,7 - vxor 12,12,0 - vxor 13,13,1 - vxor 14,14,2 - vxor 15,15,3 - vrlw 12,12,27 - vrlw 13,13,27 - vrlw 14,14,27 - vrlw 15,15,27 - vadduwm 8,8,12 - vadduwm 9,9,13 - vadduwm 10,10,14 - vadduwm 11,11,15 - vxor 4,4,8 - vxor 5,5,9 - vxor 6,6,10 - vxor 7,7,11 - vrlw 4,4,28 - vrlw 5,5,28 - vrlw 6,6,28 - vrlw 7,7,28 - vadduwm 0,0,4 - vadduwm 1,1,5 - vadduwm 2,2,6 - vadduwm 3,3,7 - vxor 12,12,0 - vxor 13,13,1 - vxor 14,14,2 - vxor 15,15,3 - vrlw 12,12,29 - vrlw 13,13,29 - vrlw 14,14,29 - vrlw 15,15,29 - vadduwm 8,8,12 - vadduwm 9,9,13 - vadduwm 10,10,14 - vadduwm 11,11,15 - vxor 4,4,8 - vxor 5,5,9 - vxor 6,6,10 - vxor 7,7,11 - vrlw 4,4,30 - vrlw 5,5,30 - vrlw 6,6,30 - vrlw 7,7,30 - vadduwm 0,0,5 - vadduwm 1,1,6 - vadduwm 2,2,7 - vadduwm 3,3,4 - vxor 15,15,0 - vxor 12,12,1 - vxor 13,13,2 - vxor 14,14,3 - vrlw 15,15,27 - vrlw 12,12,27 - vrlw 13,13,27 - vrlw 14,14,27 - vadduwm 10,10,15 - vadduwm 11,11,12 - vadduwm 8,8,13 - vadduwm 9,9,14 - vxor 5,5,10 - vxor 6,6,11 - vxor 7,7,8 - vxor 4,4,9 - vrlw 5,5,28 - vrlw 6,6,28 - vrlw 7,7,28 - vrlw 4,4,28 - vadduwm 0,0,5 - vadduwm 1,1,6 - vadduwm 2,2,7 - vadduwm 3,3,4 - vxor 15,15,0 - vxor 12,12,1 - vxor 13,13,2 - vxor 14,14,3 - vrlw 15,15,29 - vrlw 12,12,29 - vrlw 13,13,29 - vrlw 14,14,29 - vadduwm 10,10,15 - vadduwm 11,11,12 - vadduwm 8,8,13 - vadduwm 9,9,14 - vxor 5,5,10 - vxor 6,6,11 - vxor 7,7,8 - vxor 4,4,9 - vrlw 5,5,30 - vrlw 6,6,30 - vrlw 7,7,30 - vrlw 4,4,30 - bdnz .Loop_vsx - - vadduwm 12,12,26 - - .long 0x13600F8C - .long 0x13821F8C - .long 0x10000E8C - .long 0x10421E8C - .long 0x13A42F8C - .long 0x13C63F8C - .long 0xF0201057 - .long 0xF0601357 - .long 0xF01BE057 - .long 0xF05BE357 - - .long 0x10842E8C - .long 0x10C63E8C - .long 0x13684F8C - .long 0x138A5F8C - .long 0xF0A43057 - .long 0xF0E43357 - .long 0xF09DF057 - .long 0xF0DDF357 - - .long 0x11084E8C - .long 0x114A5E8C - .long 0x13AC6F8C - .long 0x13CE7F8C - .long 0xF1285057 - .long 0xF1685357 - .long 0xF11BE057 - .long 0xF15BE357 - - .long 0x118C6E8C - .long 0x11CE7E8C - vspltisw 27,4 - vadduwm 26,26,27 - .long 0xF1AC7057 - .long 0xF1EC7357 - .long 0xF19DF057 - .long 0xF1DDF357 - - vadduwm 0,0,16 - vadduwm 4,4,17 - vadduwm 8,8,18 - vadduwm 12,12,19 - - - - - - - cmpldi 5,0x40 - blt .Ltail_vsx - - .long 0x7F602619 - .long 0x7F882619 - .long 0x7FA92619 - .long 0x7FCA2619 - - vxor 27,27,0 - vxor 28,28,4 - vxor 29,29,8 - vxor 30,30,12 - - .long 0x7F601F19 - .long 0x7F881F19 - addi 4,4,0x40 - .long 0x7FA91F19 - subi 5,5,0x40 - .long 0x7FCA1F19 - addi 3,3,0x40 - beq .Ldone_vsx - - vadduwm 0,1,16 - vadduwm 4,5,17 - vadduwm 8,9,18 - vadduwm 12,13,19 - - - - - - - cmpldi 5,0x40 - blt .Ltail_vsx - - .long 0x7F602619 - .long 0x7F882619 - .long 0x7FA92619 - .long 0x7FCA2619 - - vxor 27,27,0 - vxor 28,28,4 - vxor 29,29,8 - vxor 30,30,12 - - .long 0x7F601F19 - .long 0x7F881F19 - addi 4,4,0x40 - .long 0x7FA91F19 - subi 5,5,0x40 - .long 0x7FCA1F19 - addi 3,3,0x40 - beq .Ldone_vsx - - vadduwm 0,2,16 - vadduwm 4,6,17 - vadduwm 8,10,18 - vadduwm 12,14,19 - - - - - - - cmpldi 5,0x40 - blt .Ltail_vsx - - .long 0x7F602619 - .long 0x7F882619 - .long 0x7FA92619 - .long 0x7FCA2619 - - vxor 27,27,0 - vxor 28,28,4 - vxor 29,29,8 - vxor 30,30,12 - - .long 0x7F601F19 - .long 0x7F881F19 - addi 4,4,0x40 - .long 0x7FA91F19 - subi 5,5,0x40 - .long 0x7FCA1F19 - addi 3,3,0x40 - beq .Ldone_vsx - - vadduwm 0,3,16 - vadduwm 4,7,17 - vadduwm 8,11,18 - vadduwm 12,15,19 - - - - - - - cmpldi 5,0x40 - blt .Ltail_vsx - - .long 0x7F602619 - .long 0x7F882619 - .long 0x7FA92619 - .long 0x7FCA2619 - - vxor 27,27,0 - vxor 28,28,4 - vxor 29,29,8 - vxor 30,30,12 - - .long 0x7F601F19 - .long 0x7F881F19 - addi 4,4,0x40 - .long 0x7FA91F19 - subi 5,5,0x40 - .long 0x7FCA1F19 - addi 3,3,0x40 - mtctr 0 - bne .Loop_outer_vsx - -.Ldone_vsx: - lwz 12,220(1) - li 10,127 - li 11,143 - ld 0, 240(1) - or 12,12,12 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - mtlr 0 - addi 1,1,224 - blr - -.align 4 -.Ltail_vsx: - addi 11,1,48 - mtctr 5 - .long 0x7C005F19 - .long 0x7C885F19 - .long 0x7D095F19 - .long 0x7D8A5F19 - subi 12,11,1 - subi 4,4,1 - subi 3,3,1 - -.Loop_tail_vsx: - lbzu 6,1(12) - lbzu 7,1(4) - xor 6,6,7 - stbu 6,1(3) - bdnz .Loop_tail_vsx - - .long 0x7E005F19 - .long 0x7E085F19 - .long 0x7E095F19 - .long 0x7E0A5F19 - - b .Ldone_vsx -.long 0 -.byte 0,12,0x04,1,0x80,0,5,0 -.long 0 -.size ChaCha20_ctr32_vsx,.-ChaCha20_ctr32_vsx -.align 5 -.Lconsts: - mflr 0 - bcl 20,31,$+4 - mflr 12 - addi 12,12,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.Lsigma: -.long 0x61707865,0x3320646e,0x79622d32,0x6b206574 -.long 1,0,0,0 -.long 4,0,0,0 -.long 0x0e0f0c0d,0x0a0b0809,0x06070405,0x02030001 -.long 0x0d0e0f0c,0x090a0b08,0x05060704,0x01020300 -.long 0x61707865,0x61707865,0x61707865,0x61707865 -.long 0x3320646e,0x3320646e,0x3320646e,0x3320646e -.long 0x79622d32,0x79622d32,0x79622d32,0x79622d32 -.long 0x6b206574,0x6b206574,0x6b206574,0x6b206574 -.long 0,1,2,3 -.byte 67,104,97,67,104,97,50,48,32,102,111,114,32,80,111,119,101,114,80,67,47,65,108,116,105,86,101,99,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 2 diff --git a/sys/crypto/openssl/powerpc64le/ecp_nistz256-ppc64.S b/sys/crypto/openssl/powerpc64le/ecp_nistz256-ppc64.S deleted file mode 100644 index bd280724515..00000000000 --- a/sys/crypto/openssl/powerpc64le/ecp_nistz256-ppc64.S +++ /dev/null @@ -1,4854 +0,0 @@ -/* Do not modify. This file is auto-generated from ecp_nistz256-ppc64.pl. */ -.machine "any" -.abiversion 2 -.text -.type ecp_nistz256_precomputed,@object -.globl ecp_nistz256_precomputed -.align 12 -ecp_nistz256_precomputed: -.byte 0x3c,0x4d,0x27,0xcc,0xf5,0x4a,0x4f,0x8f,0xe8,0xc8,0x04,0x68,0x09,0x4a,0x5b,0x80,0x9d,0x7a,0xe8,0x31,0x08,0x76,0x68,0x19,0x9f,0x08,0xb4,0x1f,0x32,0x43,0x89,0xd8,0x34,0xd3,0xf5,0xb7,0xb5,0xee,0x42,0x3e,0x91,0x01,0x06,0x7c,0xbf,0xd9,0x97,0x12,0xd3,0x1a,0xc9,0x04,0x8d,0x53,0x83,0x14,0x28,0xf0,0x8e,0x19,0xcc,0x91,0xe5,0x80 -.byte 0x14,0xd6,0xc1,0x8d,0x61,0x66,0x3b,0xa7,0x20,0x1e,0xe4,0x77,0xd7,0x66,0x05,0xfb,0x5c,0xa9,0x9a,0x7a,0xb2,0x30,0x50,0x28,0x87,0x80,0xfe,0xcd,0xe1,0xb3,0xff,0xa3,0x45,0x3c,0x7e,0x9b,0x08,0xc0,0xc1,0x9f,0x2e,0xad,0x7d,0x89,0x79,0x90,0x60,0xc6,0xac,0x17,0x64,0x59,0x4d,0xcf,0x56,0x7a,0xca,0x82,0xaa,0x6e,0x04,0x2f,0x1f,0x8b -.byte 0xa9,0xdd,0xeb,0x91,0x5c,0x77,0x17,0x99,0x4e,0xc2,0x45,0x69,0x2e,0xcf,0x60,0xc6,0x3c,0xad,0x65,0x33,0x35,0x6f,0xe4,0xd0,0x37,0x1f,0xe2,0x2c,0x66,0x98,0x55,0xe3,0x66,0xa2,0xc6,0x21,0xce,0x63,0x59,0x2e,0xd2,0x2b,0x8a,0x5a,0xcd,0xee,0xa7,0xad,0xf6,0x8c,0x3f,0x44,0x6c,0x12,0x30,0x8d,0xca,0xea,0x46,0x8a,0x4c,0x96,0xf9,0x96 -.byte 0x18,0x10,0x4e,0x46,0xc4,0x3e,0xa0,0x94,0x26,0x9d,0x62,0xd2,0x4b,0xb0,0xbc,0x0b,0xd5,0x56,0xa5,0xd2,0xc1,0x2f,0x2d,0x15,0xd8,0xed,0x97,0x17,0xcb,0x32,0x67,0xc5,0x0f,0x7c,0xde,0xa8,0x8c,0x4d,0xa0,0xb8,0x2e,0xed,0x24,0xd5,0xd5,0x49,0xca,0x77,0x1f,0x48,0x3b,0x83,0x54,0xb2,0xe7,0x7e,0x7a,0xa7,0x5c,0xed,0x7f,0xa1,0x9f,0x05 -.byte 0xd4,0xd4,0x90,0x0d,0xae,0x37,0x4e,0xd1,0x8f,0xd1,0x0a,0xa7,0x63,0x5b,0xb7,0x65,0xcb,0xc8,0xba,0x29,0xec,0x35,0x53,0xb2,0xac,0x32,0xf4,0xb7,0x6a,0xb1,0x69,0xcf,0x56,0x14,0x7f,0xd6,0xc5,0xca,0x88,0x1d,0x49,0xcf,0xfd,0x1f,0xcc,0xb1,0x13,0x30,0x42,0xd0,0x1c,0x6e,0x38,0x8e,0xf9,0x40,0xe7,0xe8,0xd6,0x28,0x1a,0x75,0x31,0xf3 -.byte 0x30,0x46,0x3f,0xb5,0x8a,0x47,0x35,0x4c,0x6e,0xdb,0x26,0x1a,0x25,0xa3,0xd8,0x0b,0x1d,0x51,0x12,0x91,0x4c,0x11,0x76,0x83,0x19,0xad,0x2a,0x3e,0xb4,0x1c,0x3c,0xfc,0x14,0x20,0x84,0x58,0x7b,0xc3,0x94,0x68,0x60,0x5c,0x3f,0x7c,0x26,0xb5,0x75,0x41,0x0b,0xc2,0xec,0xf3,0x96,0x5b,0xbb,0x41,0x32,0x00,0x4e,0x68,0xeb,0xf1,0xd9,0x96 -.byte 0xe7,0x00,0xac,0xb0,0x1b,0x39,0x46,0xf1,0xc9,0x18,0x7d,0xb7,0xc4,0x42,0xbc,0x8b,0x09,0x3e,0xa9,0x97,0x2e,0xc6,0xf8,0x38,0xa3,0xe4,0x2c,0x52,0x5d,0x24,0xf7,0xc5,0x15,0xab,0x16,0x5e,0x46,0x2c,0xd8,0xd7,0x4d,0xb3,0xf2,0xfd,0xe4,0x75,0x3c,0x34,0x95,0xb9,0x8c,0x92,0x35,0x42,0x8b,0xc4,0xc8,0x6c,0xd4,0x1e,0x67,0x35,0xd3,0x6d -.byte 0x79,0x85,0xff,0x74,0xbe,0x40,0x07,0x27,0x75,0x2c,0xea,0x04,0xcc,0xa2,0x72,0x80,0x97,0x5f,0xfe,0x8a,0x56,0x0f,0xf4,0x6d,0xa4,0x61,0x04,0x4b,0x5e,0xb4,0xe2,0xd8,0x87,0xb6,0xfd,0x3d,0x00,0x8a,0xa9,0xe4,0x62,0x5f,0x4f,0xec,0x1e,0x40,0x28,0x6b,0x21,0x0f,0x50,0x26,0x97,0xa0,0x25,0x8f,0x3e,0xf2,0x69,0xdc,0x36,0xe5,0xb8,0xdb -.byte 0x01,0x7d,0xfb,0x73,0x7d,0x3e,0xf7,0x55,0x41,0x39,0xe0,0x33,0x0d,0xe3,0x4b,0x6b,0x7b,0x3e,0x6e,0xdc,0x7d,0x9a,0x6e,0x35,0xb0,0x38,0x13,0x92,0x80,0xa1,0xe6,0xbf,0x03,0x9d,0xb7,0x7f,0x55,0xce,0x46,0x3c,0x22,0xc7,0xfa,0xfb,0x18,0xba,0x06,0xa0,0x09,0x78,0x3f,0xc0,0x79,0x5f,0xe6,0x6a,0x29,0xaf,0xd1,0xc7,0x84,0xa7,0xed,0xb9 -.byte 0xb6,0x82,0x81,0xc1,0x53,0xee,0x00,0x34,0xa8,0x81,0xdf,0x5a,0xd3,0x07,0x7e,0x2e,0x17,0x40,0xa1,0x2b,0xf4,0x2a,0x1f,0x9a,0x67,0x75,0x73,0xa8,0x58,0x65,0x17,0xdf,0xf1,0x84,0x76,0xc5,0x8d,0x48,0x93,0xe1,0x28,0xa5,0x73,0x10,0x6e,0x9e,0x39,0x03,0x69,0x52,0xdf,0xf9,0x46,0x7c,0x5b,0xf3,0x5b,0x9a,0x63,0xd9,0x4f,0xf5,0x8e,0x73 -.byte 0xed,0x33,0x7d,0x23,0xb9,0x6c,0x3c,0x9b,0xa7,0xcf,0x7f,0x34,0x6f,0x97,0xe2,0xfe,0x0a,0x8b,0xe1,0x86,0x83,0x91,0x2e,0xdd,0x6b,0xb1,0xbf,0xa6,0x92,0x4f,0x30,0x79,0x68,0x91,0x3e,0x06,0x17,0xe9,0x0b,0x25,0x07,0xa6,0x88,0x91,0x6c,0x6e,0xc8,0xd8,0xdc,0x68,0x5e,0x45,0xf2,0x55,0xef,0x56,0x38,0x29,0xd0,0x89,0x40,0x58,0x51,0x9f -.byte 0x5f,0xa4,0x08,0xc6,0x94,0x34,0xd2,0x6f,0x59,0x0f,0x6e,0xca,0x85,0x7f,0x56,0x3f,0xac,0x8f,0x25,0x0f,0x47,0xe3,0x9e,0x40,0xed,0xd8,0xae,0x30,0x0d,0xb4,0x47,0x40,0x4b,0xa3,0x23,0x1b,0x7f,0x0f,0xff,0xdf,0x6f,0x1d,0x87,0xb2,0x94,0xa0,0x36,0xbb,0x53,0x13,0x1e,0xaf,0x92,0xf8,0x07,0x95,0xc7,0xe4,0xa8,0x41,0xa9,0xed,0xf0,0x08 -.byte 0xfc,0xc1,0x4a,0xed,0x9a,0x4f,0x13,0xc5,0xed,0x8a,0x95,0xf5,0x69,0xf7,0xee,0x75,0xb6,0x4d,0xba,0x8f,0x65,0x23,0xe8,0x50,0x9e,0x7a,0xd7,0x28,0x3a,0x49,0xe7,0x4c,0x7c,0xc6,0x64,0xbd,0x8c,0x17,0x14,0x0b,0xb5,0xe3,0xb4,0xab,0x0b,0x9a,0xa9,0x29,0x84,0xaa,0xba,0x69,0xc4,0x2e,0xbf,0xca,0x57,0x0d,0xd3,0x36,0x21,0x61,0x00,0x13 -.byte 0x95,0xe3,0xf8,0xa6,0x64,0x74,0x02,0xb5,0xbf,0x86,0x07,0xde,0x67,0x48,0x23,0xe0,0x24,0x96,0x3a,0x86,0xb2,0xfa,0xa7,0x75,0xb4,0x26,0x42,0xcb,0x96,0x4e,0xf7,0x90,0xae,0xa5,0xe4,0xd0,0x45,0x31,0xe7,0x0f,0xe0,0xcb,0xbf,0x94,0x94,0x33,0x4f,0x65,0x04,0xfb,0xc0,0xc4,0x3f,0x51,0xa5,0xf3,0xea,0xc8,0xd5,0x23,0x66,0xe0,0x48,0x09 -.byte 0xba,0x6a,0x27,0x50,0xec,0xae,0xd2,0x2a,0xe6,0xf9,0xe4,0xde,0x35,0x6e,0xcc,0x82,0x76,0xfc,0x36,0x16,0xe1,0x9f,0xc7,0x0d,0xc1,0xc9,0x6a,0x23,0xbe,0xa1,0x3c,0xfd,0xce,0xa7,0x2e,0x91,0x36,0x23,0x5a,0x20,0xdf,0x55,0xc5,0x91,0x32,0x5c,0x62,0x49,0xe7,0x8b,0x0b,0x0e,0x9c,0x2e,0xee,0x1f,0xfe,0xca,0x00,0xfc,0x55,0xd7,0x9c,0x0a -.byte 0x75,0xaa,0xb0,0x46,0x90,0x55,0x2b,0x46,0xab,0x98,0x9d,0xab,0x0e,0x12,0x03,0x58,0xf1,0x4a,0x68,0x59,0x74,0xc9,0x37,0x6d,0x6f,0xe6,0xd3,0x73,0xf1,0xa3,0xdd,0xbe,0x85,0xca,0x74,0xc6,0xb6,0x51,0x6f,0x83,0x6f,0xa1,0x80,0x00,0x00,0x78,0x0a,0xa7,0xff,0xa7,0xe2,0x2e,0x5f,0x4f,0x31,0xbb,0x1b,0x99,0x21,0x33,0x59,0x6e,0x03,0x38 -.byte 0x10,0xd9,0x98,0xf2,0x0c,0xad,0x08,0x6b,0x00,0x49,0xb5,0x5e,0x11,0x60,0x70,0x49,0xff,0x79,0xac,0xba,0x30,0x3d,0x69,0x9f,0xaf,0xfb,0xd7,0xeb,0xe2,0xcd,0x0d,0x97,0xb9,0x94,0xc8,0x6e,0x06,0x3b,0x64,0x80,0x71,0x8f,0x81,0xb0,0x58,0xe0,0xc7,0xbd,0x27,0x6a,0xd4,0xb7,0xd9,0x6c,0xc1,0x44,0x38,0xe1,0x36,0xbc,0x0a,0x33,0x26,0x01 -.byte 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0x2b,0x03,0xdd,0xac,0xaa,0x1a,0xb5,0x2a,0x04,0xd6,0x15,0x9d,0x3f,0x54,0x24,0x7c,0x75,0xab,0x77,0xd9,0x6c,0x85,0xa2,0xf9,0x33,0xeb,0xeb,0xc0,0x27,0xcd,0x9d,0x58,0xae,0xa3,0x34,0x10,0xae,0x85,0x7d,0x4c,0x15,0x4c,0x90,0x46,0xe0,0x5b,0xec,0xa7,0xb2,0x68,0x85,0x01,0xed,0xf9,0x4a,0x85,0xe3,0xb6,0xea,0xe2,0x53,0xc0,0x32,0x83 -.byte 0x73,0x05,0x77,0xac,0xb5,0x96,0xaa,0xf0,0x9c,0x2c,0xa4,0xd2,0xd4,0xbf,0x74,0x2f,0x39,0x47,0x22,0x99,0x50,0x06,0x5f,0xcb,0x99,0xc5,0xc9,0x2e,0x70,0xd6,0x68,0x6a,0xc4,0x73,0x41,0xcb,0x8b,0xfd,0x23,0x98,0x11,0x59,0xad,0x20,0x8a,0x0d,0xaf,0xaa,0xd0,0xe2,0xeb,0x32,0x8b,0x6f,0x0e,0x43,0x12,0xe3,0x27,0x8f,0xf6,0xa4,0x76,0x0b -.byte 0xfb,0x22,0xad,0xda,0x1c,0x0a,0x3e,0x90,0xc0,0x7d,0xf3,0x09,0xbc,0x17,0x33,0xef,0xf1,0xf2,0x84,0x80,0x2a,0x0b,0x82,0xd7,0x95,0xc7,0xd2,0x08,0x4a,0xf4,0xf5,0x6d,0x09,0x06,0x8e,0xe4,0x74,0x63,0x8f,0x09,0xca,0xe2,0xd9,0x0e,0x1e,0x03,0x20,0x1b,0x4c,0xfb,0x1d,0x5a,0x2e,0x28,0xeb,0x84,0x82,0x6f,0x97,0x6f,0xcd,0x7a,0xc3,0xa7 -.byte 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0x1c,0xd4,0x7a,0xfd,0x6b,0x4d,0x04,0xc0,0x9e,0xf8,0x32,0x9f,0x52,0x24,0xac,0xc5,0xb0,0xa1,0x63,0x77,0xc9,0x14,0xaf,0x46,0x60,0x67,0x52,0x81,0xbb,0x3f,0xf5,0x7f,0xad,0xef,0x7c,0x3a,0x71,0xc1,0x1e,0xea,0x4a,0xe0,0xd7,0xdd,0x31,0xf2,0x4b,0xdf,0x53,0x8a,0xc9,0x59,0x7a,0xb2,0x6f,0x7e,0xc0,0x00,0xa4,0x0d,0x09,0x9c,0xf7,0x22 -.byte 0x22,0xa9,0x37,0xde,0x3b,0xe1,0x74,0x85,0xcf,0xc5,0xb7,0x7b,0x0a,0xfd,0x6b,0xfa,0x98,0x49,0xa9,0x7f,0x52,0x23,0x0e,0xc0,0x4a,0xb3,0x81,0xa6,0x96,0x46,0x24,0xe7,0x01,0xd1,0xf2,0xac,0x31,0xb2,0x5e,0x61,0xe3,0xab,0xf8,0x1b,0x28,0xca,0xa2,0x78,0x3c,0xdf,0x8a,0xc1,0x17,0x46,0x9d,0xbd,0x69,0x31,0x41,0x8b,0xc1,0xc8,0xaa,0x68 -.byte 0xd5,0x35,0x65,0x49,0xfe,0xc6,0xa4,0x99,0xcc,0x62,0x4b,0x81,0x1c,0x21,0xa4,0xd8,0xe3,0xb3,0xe9,0x7c,0xf8,0x33,0x2f,0x21,0xa5,0x88,0xf2,0x8e,0x7d,0xee,0x00,0x00,0x62,0xcf,0x07,0x37,0x00,0x68,0x6c,0xb5,0x2d,0xc6,0x1b,0xcc,0x86,0x71,0xf0,0x4f,0x68,0xaf,0x0c,0x9a,0x25,0x69,0x71,0x2d,0xb5,0x87,0x90,0x02,0xd3,0xfc,0xbb,0x63 -.byte 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0xca,0x38,0xa3,0x97,0x2e,0x0f,0xa5,0x18,0x3b,0xaa,0x0f,0x00,0x75,0x35,0x9c,0xcd,0x28,0x83,0xd4,0xa7,0x7c,0xb9,0xcd,0xb5,0x55,0x29,0x4c,0x14,0xcd,0xfc,0x8f,0xaf,0x7d,0x69,0x4f,0xf7,0x0f,0xed,0x7c,0xa5,0x79,0x9d,0x36,0xbb,0x72,0xbc,0xf2,0x14,0xfd,0xf0,0x04,0x2a,0x89,0x1e,0xf7,0x80,0x4c,0x5e,0xb8,0xc1,0xdb,0xfa,0x3c,0x27 -.byte 0xbb,0x30,0x08,0x2b,0xd2,0xf8,0xdb,0xe0,0x8c,0x00,0xe4,0xca,0xa9,0xde,0xb0,0x14,0x5b,0xec,0x6b,0xe6,0x5c,0x90,0x17,0x02,0x59,0x5f,0x5f,0x51,0xf8,0x30,0x10,0x11,0xc4,0xdf,0x37,0x30,0x32,0xb1,0x4d,0x49,0xfe,0x82,0x87,0xd2,0x42,0xf5,0x38,0x76,0xf9,0xa5,0x28,0xfc,0x14,0xb2,0xe0,0x72,0x82,0xde,0xc8,0x47,0x9e,0x8f,0x8a,0xb5 -.byte 0x85,0x44,0x42,0x12,0xc6,0xc0,0xa5,0x60,0x5a,0x27,0xd0,0x36,0x14,0x7b,0x2a,0x83,0x98,0x92,0x08,0xe9,0x03,0xc9,0xc3,0xd3,0x36,0x97,0xba,0x5e,0xd5,0x51,0xcc,0x44,0xeb,0x81,0x76,0xae,0x28,0x94,0x0b,0xf6,0xc7,0xeb,0xae,0x61,0x6f,0x7b,0x34,0xb5,0x8c,0x5f,0x31,0xb6,0x23,0xe3,0xe7,0x4b,0x60,0xe6,0xba,0x8d,0x0e,0xd1,0xb2,0x37 -.byte 0x72,0x3d,0xc1,0x75,0x9b,0x5e,0xcb,0x0f,0xf9,0xe4,0xdb,0x82,0x4c,0xc4,0x37,0xef,0x9d,0xde,0x16,0x85,0xe9,0xc2,0x03,0xd8,0x5b,0xa1,0xff,0xfa,0xd4,0xd7,0x5c,0x34,0xb6,0x1e,0x25,0x96,0xf5,0x8b,0xc3,0xee,0x16,0x1f,0xf8,0x55,0x4e,0x1c,0x83,0x80,0x77,0x1d,0x4f,0xb6,0x95,0x1c,0x91,0x7d,0x50,0x25,0xf4,0x2a,0x5d,0x2e,0xc7,0x8a -.byte 0x14,0xf8,0xb9,0xbc,0xab,0x5b,0xcd,0x47,0xb5,0xaf,0x85,0xc0,0x34,0x27,0x7d,0x6a,0x8c,0x84,0x8a,0xae,0x68,0x60,0x0e,0xa1,0x45,0xf7,0x83,0x66,0x91,0x69,0x30,0xed,0x26,0x5e,0xf5,0x48,0x6b,0x20,0xb3,0x11,0x50,0xf7,0x70,0x9d,0x10,0x50,0x44,0x87,0xfe,0x96,0x5c,0xc6,0xa4,0xa4,0xed,0x5e,0x7f,0x3d,0x90,0x19,0xbe,0x31,0xa3,0xdd -.byte 0x44,0xbb,0x9b,0x51,0x5a,0x06,0x1d,0x2e,0xd7,0xef,0xd1,0x81,0xb6,0xec,0xc6,0x89,0xfb,0x13,0xc5,0x21,0xef,0x9a,0x1a,0x48,0xf2,0xf8,0xb3,0xa3,0xec,0x7f,0x85,0xc1,0xc6,0x8c,0x5f,0xa9,0x30,0x38,0x25,0x1e,0x8d,0xcf,0x18,0x24,0xef,0x5a,0x9a,0x14,0x31,0xc0,0x2c,0x88,0xa5,0x3f,0x50,0x8b,0xb1,0xda,0x5d,0x26,0xd9,0xd3,0x81,0xb1 -.byte 0xec,0xf0,0x42,0x88,0xd0,0x81,0x51,0xf9,0x1b,0xbc,0x43,0xa4,0x37,0xf1,0xd7,0x90,0x21,0x7e,0xa0,0x3e,0x63,0xfb,0x21,0xfa,0x12,0xfb,0xde,0xc7,0xbf,0xb3,0x58,0xe7,0x76,0x42,0x20,0x01,0x3d,0x66,0x80,0xf1,0xb8,0xaf,0xfa,0x7d,0x96,0x89,0x36,0x48,0x95,0xd9,0x6e,0x6d,0xe6,0x4f,0xff,0x2a,0x47,0x61,0xf2,0x04,0xb7,0x83,0x14,0xce -.byte 0x0a,0x3c,0x73,0x17,0x50,0x88,0x03,0x25,0x4a,0xe3,0x13,0x55,0x8b,0x7e,0x50,0x38,0xfc,0x14,0x0b,0x04,0x8e,0xa8,0x5b,0xd6,0x72,0x20,0x60,0xe9,0xaa,0x22,0x82,0x11,0xc6,0xc4,0xd7,0xb9,0xc8,0x0c,0x7e,0x05,0xfb,0x90,0xe4,0x9c,0x28,0x89,0x29,0x99,0x63,0x4d,0xec,0x7b,0x50,0xbd,0xd8,0xa3,0x5b,0x50,0x77,0x19,0x81,0x92,0xce,0x82 -.size ecp_nistz256_precomputed,.-ecp_nistz256_precomputed -.byte 69,67,80,95,78,73,83,84,90,50,53,54,32,102,111,114,32,80,80,67,54,52,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 - - - -.globl ecp_nistz256_mul_mont -.type ecp_nistz256_mul_mont,@function -.align 5 -ecp_nistz256_mul_mont: -.localentry ecp_nistz256_mul_mont,0 - - stdu 1,-128(1) - mflr 0 - std 22,48(1) - std 23,56(1) - std 24,64(1) - std 25,72(1) - std 26,80(1) - std 27,88(1) - std 28,96(1) - std 29,104(1) - std 30,112(1) - std 31,120(1) - - ld 24,0(4) - ld 6,0(5) - ld 25,8(4) - ld 26,16(4) - ld 27,24(4) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - bl __ecp_nistz256_mul_mont - - mtlr 0 - ld 22,48(1) - ld 23,56(1) - ld 24,64(1) - ld 25,72(1) - ld 26,80(1) - ld 27,88(1) - ld 28,96(1) - ld 29,104(1) - ld 30,112(1) - ld 31,120(1) - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,0,0x80,10,3,0 -.long 0 -.size ecp_nistz256_mul_mont,.-ecp_nistz256_mul_mont - - -.globl ecp_nistz256_sqr_mont -.type ecp_nistz256_sqr_mont,@function -.align 4 -ecp_nistz256_sqr_mont: -.localentry ecp_nistz256_sqr_mont,0 - - stdu 1,-128(1) - mflr 0 - std 22,48(1) - std 23,56(1) - std 24,64(1) - std 25,72(1) - std 26,80(1) - std 27,88(1) - std 28,96(1) - std 29,104(1) - std 30,112(1) - std 31,120(1) - - ld 24,0(4) - ld 25,8(4) - ld 26,16(4) - ld 27,24(4) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - bl __ecp_nistz256_sqr_mont - - mtlr 0 - ld 22,48(1) - ld 23,56(1) - ld 24,64(1) - ld 25,72(1) - ld 26,80(1) - ld 27,88(1) - ld 28,96(1) - ld 29,104(1) - ld 30,112(1) - ld 31,120(1) - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,0,0x80,10,2,0 -.long 0 -.size ecp_nistz256_sqr_mont,.-ecp_nistz256_sqr_mont - - - -.globl ecp_nistz256_add -.type ecp_nistz256_add,@function -.align 4 -ecp_nistz256_add: -.localentry ecp_nistz256_add,0 - - stdu 1,-128(1) - mflr 0 - std 28,96(1) - std 29,104(1) - std 30,112(1) - std 31,120(1) - - ld 7,0(4) - ld 28, 0(5) - ld 8,8(4) - ld 29, 8(5) - ld 9,16(4) - ld 30, 16(5) - ld 10,24(4) - ld 31, 24(5) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - bl __ecp_nistz256_add - - mtlr 0 - ld 28,96(1) - ld 29,104(1) - ld 30,112(1) - ld 31,120(1) - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,0,0x80,4,3,0 -.long 0 -.size ecp_nistz256_add,.-ecp_nistz256_add - - -.globl ecp_nistz256_div_by_2 -.type ecp_nistz256_div_by_2,@function -.align 4 -ecp_nistz256_div_by_2: -.localentry ecp_nistz256_div_by_2,0 - - stdu 1,-128(1) - mflr 0 - std 28,96(1) - std 29,104(1) - std 30,112(1) - std 31,120(1) - - ld 7,0(4) - ld 8,8(4) - ld 9,16(4) - ld 10,24(4) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - bl __ecp_nistz256_div_by_2 - - mtlr 0 - ld 28,96(1) - ld 29,104(1) - ld 30,112(1) - ld 31,120(1) - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,0,0x80,4,2,0 -.long 0 -.size ecp_nistz256_div_by_2,.-ecp_nistz256_div_by_2 - - -.globl ecp_nistz256_mul_by_2 -.type ecp_nistz256_mul_by_2,@function -.align 4 -ecp_nistz256_mul_by_2: -.localentry ecp_nistz256_mul_by_2,0 - - stdu 1,-128(1) - mflr 0 - std 28,96(1) - std 29,104(1) - std 30,112(1) - std 31,120(1) - - ld 7,0(4) - ld 8,8(4) - ld 9,16(4) - ld 10,24(4) - - mr 28,7 - mr 29,8 - mr 30,9 - mr 31,10 - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - bl __ecp_nistz256_add - - mtlr 0 - ld 28,96(1) - ld 29,104(1) - ld 30,112(1) - ld 31,120(1) - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,0,0x80,4,3,0 -.long 0 -.size ecp_nistz256_mul_by_2,.-ecp_nistz256_mul_by_2 - - -.globl ecp_nistz256_mul_by_3 -.type ecp_nistz256_mul_by_3,@function -.align 4 -ecp_nistz256_mul_by_3: -.localentry ecp_nistz256_mul_by_3,0 - - stdu 1,-128(1) - mflr 0 - std 28,96(1) - std 29,104(1) - std 30,112(1) - std 31,120(1) - - ld 7,0(4) - ld 8,8(4) - ld 9,16(4) - ld 10,24(4) - - mr 28,7 - std 7,64(1) - mr 29,8 - std 8,72(1) - mr 30,9 - std 9,80(1) - mr 31,10 - std 10,88(1) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - bl __ecp_nistz256_add - - ld 28,64(1) - ld 29,72(1) - ld 30,80(1) - ld 31,88(1) - - bl __ecp_nistz256_add - - mtlr 0 - ld 28,96(1) - ld 29,104(1) - ld 30,112(1) - ld 31,120(1) - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,0,0x80,4,2,0 -.long 0 -.size ecp_nistz256_mul_by_3,.-ecp_nistz256_mul_by_3 - - - -.globl ecp_nistz256_sub -.type ecp_nistz256_sub,@function -.align 4 -ecp_nistz256_sub: -.localentry ecp_nistz256_sub,0 - - stdu 1,-128(1) - mflr 0 - std 28,96(1) - std 29,104(1) - std 30,112(1) - std 31,120(1) - - ld 7,0(4) - ld 8,8(4) - ld 9,16(4) - ld 10,24(4) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - bl __ecp_nistz256_sub_from - - mtlr 0 - ld 28,96(1) - ld 29,104(1) - ld 30,112(1) - ld 31,120(1) - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,0,0x80,4,3,0 -.long 0 -.size ecp_nistz256_sub,.-ecp_nistz256_sub - - -.globl ecp_nistz256_neg -.type ecp_nistz256_neg,@function -.align 4 -ecp_nistz256_neg: -.localentry ecp_nistz256_neg,0 - - stdu 1,-128(1) - mflr 0 - std 28,96(1) - std 29,104(1) - std 30,112(1) - std 31,120(1) - - mr 5,4 - li 7,0 - li 8,0 - li 9,0 - li 10,0 - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - bl __ecp_nistz256_sub_from - - mtlr 0 - ld 28,96(1) - ld 29,104(1) - ld 30,112(1) - ld 31,120(1) - addi 1,1,128 - blr -.long 0 -.byte 0,12,4,0,0x80,4,2,0 -.long 0 -.size ecp_nistz256_neg,.-ecp_nistz256_neg - - - -.type __ecp_nistz256_mul_mont,@function -.align 4 -__ecp_nistz256_mul_mont: -.localentry __ecp_nistz256_mul_mont,0 - - mulld 7,24,6 - mulhdu 28,24,6 - - mulld 8,25,6 - mulhdu 29,25,6 - - mulld 9,26,6 - mulhdu 30,26,6 - - mulld 10,27,6 - mulhdu 31,27,6 - ld 6,8(5) - - addc 8,8,28 - sldi 28,7,32 - adde 9,9,29 - srdi 29,7,32 - adde 10,10,30 - addze 22,31 - li 23,0 - subfc 30,28,7 - subfe 31,29,7 - addc 7,8,28 - adde 8,9,29 - adde 9,10,30 - adde 10,22,31 - addze 22,23 - - mulld 28,24,6 - mulld 29,25,6 - mulld 30,26,6 - mulld 31,27,6 - addc 7,7,28 - mulhdu 28,24,6 - adde 8,8,29 - mulhdu 29,25,6 - adde 9,9,30 - mulhdu 30,26,6 - adde 10,10,31 - mulhdu 31,27,6 - addze 22,22 - ld 6,8*(1+1)(5) - addc 8,8,28 - sldi 28,7,32 - adde 9,9,29 - srdi 29,7,32 - adde 10,10,30 - adde 22,22,31 - li 23,0 - addze 23,23 - subfc 30,28,7 - subfe 31,29,7 - addc 7,8,28 - adde 8,9,29 - adde 9,10,30 - adde 10,22,31 - addze 22,23 - - mulld 28,24,6 - mulld 29,25,6 - mulld 30,26,6 - mulld 31,27,6 - addc 7,7,28 - mulhdu 28,24,6 - adde 8,8,29 - mulhdu 29,25,6 - adde 9,9,30 - mulhdu 30,26,6 - adde 10,10,31 - mulhdu 31,27,6 - addze 22,22 - ld 6,8*(2+1)(5) - addc 8,8,28 - sldi 28,7,32 - adde 9,9,29 - srdi 29,7,32 - adde 10,10,30 - adde 22,22,31 - li 23,0 - addze 23,23 - subfc 30,28,7 - subfe 31,29,7 - addc 7,8,28 - adde 8,9,29 - adde 9,10,30 - adde 10,22,31 - addze 22,23 - - mulld 28,24,6 - mulld 29,25,6 - mulld 30,26,6 - mulld 31,27,6 - addc 7,7,28 - mulhdu 28,24,6 - adde 8,8,29 - mulhdu 29,25,6 - adde 9,9,30 - mulhdu 30,26,6 - adde 10,10,31 - mulhdu 31,27,6 - addze 22,22 - addc 8,8,28 - sldi 28,7,32 - adde 9,9,29 - srdi 29,7,32 - adde 10,10,30 - adde 22,22,31 - li 23,0 - addze 23,23 - - subfc 30,28,7 - subfe 31,29,7 - addc 7,8,28 - adde 8,9,29 - adde 9,10,30 - adde 10,22,31 - addze 22,23 - - li 30,0 - addic 7,7,1 - subfe 8,11,8 - subfe 9,30,9 - subfe 10,12,10 - subfe 22,30,22 - - addc 7,7,22 - and 29,11,22 - and 31,12,22 - adde 8,8,29 - addze 9,9 - adde 10,10,31 - - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,1,0 -.long 0 -.size __ecp_nistz256_mul_mont,.-__ecp_nistz256_mul_mont - - - -.type __ecp_nistz256_sqr_mont,@function -.align 4 -__ecp_nistz256_sqr_mont: -.localentry __ecp_nistz256_sqr_mont,0 - - - - - - - - - - - - - - - - - mulld 8,25,24 - mulhdu 29,25,24 - mulld 9,26,24 - mulhdu 30,26,24 - mulld 10,27,24 - mulhdu 22,27,24 - - addc 9,9,29 - mulld 28,26,25 - mulhdu 29,26,25 - adde 10,10,30 - mulld 30,27,25 - mulhdu 31,27,25 - addze 22,22 - - mulld 23,27,26 - mulhdu 5,27,26 - - addc 29,29,30 - addze 30,31 - - addc 10,10,28 - adde 22,22,29 - adde 23,23,30 - addze 5,5 - - addc 8,8,8 - adde 9,9,9 - adde 10,10,10 - adde 22,22,22 - adde 23,23,23 - adde 5,5,5 - li 6,0 - addze 6,6 - - mulld 7,24,24 - mulhdu 24,24,24 - mulld 29,25,25 - mulhdu 25,25,25 - mulld 30,26,26 - mulhdu 26,26,26 - mulld 31,27,27 - mulhdu 27,27,27 - addc 8,8,24 - sldi 28,7,32 - adde 9,9,29 - srdi 29,7,32 - adde 10,10,25 - adde 22,22,30 - adde 23,23,26 - adde 5,5,31 - adde 6,6,27 - subfc 30,28,7 - subfe 31,29,7 - addc 7,8,28 - sldi 28,7,32 - adde 8,9,29 - srdi 29,7,32 - adde 9,10,30 - addze 10,31 - subfc 30,28,7 - subfe 31,29,7 - addc 7,8,28 - sldi 28,7,32 - adde 8,9,29 - srdi 29,7,32 - adde 9,10,30 - addze 10,31 - subfc 30,28,7 - subfe 31,29,7 - addc 7,8,28 - sldi 28,7,32 - adde 8,9,29 - srdi 29,7,32 - adde 9,10,30 - addze 10,31 - subfc 30,28,7 - subfe 31,29,7 - addc 7,8,28 - adde 8,9,29 - adde 9,10,30 - addze 10,31 - - addc 7,7,22 - adde 8,8,23 - adde 9,9,5 - adde 10,10,6 - li 30,0 - addze 22,30 - - addic 7,7,1 - subfe 8,11,8 - subfe 9,30,9 - subfe 10,12,10 - subfe 22,30,22 - - addc 7,7,22 - and 29,11,22 - and 31,12,22 - adde 8,8,29 - addze 9,9 - adde 10,10,31 - - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,1,0 -.long 0 -.size __ecp_nistz256_sqr_mont,.-__ecp_nistz256_sqr_mont - - - - -.type __ecp_nistz256_add,@function -.align 4 -__ecp_nistz256_add: -.localentry __ecp_nistz256_add,0 - - addc 7,7,28 - adde 8,8,29 - adde 9,9,30 - li 30,0 - adde 10,10,31 - addze 28,30 - - - - - - - subic 7,7,-1 - subfe 8,11,8 - subfe 9,30,9 - subfe 10,12,10 - subfe 28,30,28 - - addc 7,7,28 - and 29,11,28 - and 31,12,28 - adde 8,8,29 - addze 9,9 - adde 10,10,31 - - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size __ecp_nistz256_add,.-__ecp_nistz256_add - -.type __ecp_nistz256_sub_from,@function -.align 4 -__ecp_nistz256_sub_from: -.localentry __ecp_nistz256_sub_from,0 - - ld 28,0(5) - ld 29,8(5) - ld 30,16(5) - ld 31,24(5) - subfc 7,28,7 - subfe 8,29,8 - subfe 9,30,9 - subfe 10,31,10 - subfe 28,28,28 - - - - addc 7,7,28 - and 29,11,28 - and 31,12,28 - adde 8,8,29 - addze 9,9 - adde 10,10,31 - - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size __ecp_nistz256_sub_from,.-__ecp_nistz256_sub_from - -.type __ecp_nistz256_sub_morf,@function -.align 4 -__ecp_nistz256_sub_morf: -.localentry __ecp_nistz256_sub_morf,0 - - ld 28,0(5) - ld 29,8(5) - ld 30,16(5) - ld 31,24(5) - subfc 7,7,28 - subfe 8,8,29 - subfe 9,9,30 - subfe 10,10,31 - subfe 28,28,28 - - - - addc 7,7,28 - and 29,11,28 - and 31,12,28 - adde 8,8,29 - addze 9,9 - adde 10,10,31 - - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size __ecp_nistz256_sub_morf,.-__ecp_nistz256_sub_morf - -.type __ecp_nistz256_div_by_2,@function -.align 4 -__ecp_nistz256_div_by_2: -.localentry __ecp_nistz256_div_by_2,0 - - andi. 28,7,1 - addic 7,7,-1 - neg 28,28 - adde 8,8,11 - not 28,28 - addze 9,9 - li 30,0 - adde 10,10,12 - and 29,11,28 - addze 4,30 - and 31,12,28 - - subfc 7,28,7 - subfe 8,29,8 - subfe 9,30,9 - subfe 10,31,10 - subfe 4, 30,4 - - srdi 7,7,1 - sldi 28,8,63 - srdi 8,8,1 - sldi 29,9,63 - srdi 9,9,1 - sldi 30,10,63 - srdi 10,10,1 - sldi 31,4,63 - or 7,7,28 - or 8,8,29 - or 9,9,30 - or 10,10,31 - - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,1,0 -.long 0 -.size __ecp_nistz256_div_by_2,.-__ecp_nistz256_div_by_2 -.globl ecp_nistz256_point_double -.type ecp_nistz256_point_double,@function -.align 5 -ecp_nistz256_point_double: -.localentry ecp_nistz256_point_double,0 - - stdu 1,-288(1) - mflr 0 - std 20,288-8*12(1) - std 21,288-8*11(1) - std 22,288-8*10(1) - std 23,288-8*9(1) - std 24,288-8*8(1) - std 25,288-8*7(1) - std 26,288-8*6(1) - std 27,288-8*5(1) - std 28,288-8*4(1) - std 29,288-8*3(1) - std 30,288-8*2(1) - std 31,288-8*1(1) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 -.Ldouble_shortcut: - ld 7,32(4) - ld 8,40(4) - ld 9,48(4) - ld 10,56(4) - mr 28,7 - mr 29,8 - mr 30,9 - mr 31,10 - ld 24,64(4) - ld 25,72(4) - ld 26,80(4) - ld 27,88(4) - mr 20,3 - mr 21,4 - addi 3,1,64 - bl __ecp_nistz256_add - - addi 3,1,128 - bl __ecp_nistz256_sqr_mont - - ld 28,0(21) - ld 29,8(21) - ld 30,16(21) - ld 31,24(21) - mr 24,7 - mr 25,8 - mr 26,9 - mr 27,10 - addi 3,1,96 - bl __ecp_nistz256_add - - addi 5,21,0 - mr 7,24 - mr 8,25 - mr 9,26 - mr 10,27 - ld 24,64+0(1) - ld 25,64+8(1) - ld 26,64+16(1) - ld 27,64+24(1) - addi 3,1,128 - bl __ecp_nistz256_sub_morf - - addi 3,1,64 - bl __ecp_nistz256_sqr_mont - - ld 6,32(21) - ld 24,64(21) - ld 25,72(21) - ld 26,80(21) - ld 27,88(21) - addi 5,21,32 - addi 3,1,160 - bl __ecp_nistz256_mul_mont - - mr 28,7 - mr 29,8 - mr 30,9 - mr 31,10 - ld 24,64+0(1) - ld 25,64+8(1) - ld 26,64+16(1) - ld 27,64+24(1) - addi 3,20,64 - bl __ecp_nistz256_add - - addi 3,1,160 - bl __ecp_nistz256_sqr_mont - - ld 6,128(1) - ld 24,96+0(1) - ld 25,96+8(1) - ld 26,96+16(1) - ld 27,96+24(1) - addi 3,20,32 - bl __ecp_nistz256_div_by_2 - - addi 5,1,128 - addi 3,1,96 - bl __ecp_nistz256_mul_mont - - mr 28,7 - mr 29,8 - mr 30,9 - mr 31,10 - mr 24,7 - mr 25,8 - mr 26,9 - mr 27,10 - addi 3,1,96 - bl __ecp_nistz256_add - mr 28,24 - mr 29,25 - mr 30,26 - mr 31,27 - ld 6,0(21) - ld 24,64+0(1) - ld 25,64+8(1) - ld 26,64+16(1) - ld 27,64+24(1) - bl __ecp_nistz256_add - - addi 5,21,0 - addi 3,1,64 - bl __ecp_nistz256_mul_mont - - mr 28,7 - mr 29,8 - mr 30,9 - mr 31,10 - ld 24,96+0(1) - ld 25,96+8(1) - ld 26,96+16(1) - ld 27,96+24(1) - addi 3,1,160 - bl __ecp_nistz256_add - - addi 3,20,0 - bl __ecp_nistz256_sqr_mont - - addi 5,1,160 - bl __ecp_nistz256_sub_from - - addi 5,1,64 - addi 3,1,64 - bl __ecp_nistz256_sub_morf - - ld 6,96(1) - mr 24,7 - mr 25,8 - mr 26,9 - mr 27,10 - addi 5,1,96 - bl __ecp_nistz256_mul_mont - - addi 5,20,32 - addi 3,20,32 - bl __ecp_nistz256_sub_from - - mtlr 0 - ld 20,288-8*12(1) - ld 21,288-8*11(1) - ld 22,288-8*10(1) - ld 23,288-8*9(1) - ld 24,288-8*8(1) - ld 25,288-8*7(1) - ld 26,288-8*6(1) - ld 27,288-8*5(1) - ld 28,288-8*4(1) - ld 29,288-8*3(1) - ld 30,288-8*2(1) - ld 31,288-8*1(1) - addi 1,1,288 - blr -.long 0 -.byte 0,12,4,0,0x80,12,2,0 -.long 0 -.size ecp_nistz256_point_double,.-ecp_nistz256_point_double -.globl ecp_nistz256_point_add -.type ecp_nistz256_point_add,@function -.align 5 -ecp_nistz256_point_add: -.localentry ecp_nistz256_point_add,0 - - stdu 1,-576(1) - mflr 0 - std 16,576-8*16(1) - std 17,576-8*15(1) - std 18,576-8*14(1) - std 19,576-8*13(1) - std 20,576-8*12(1) - std 21,576-8*11(1) - std 22,576-8*10(1) - std 23,576-8*9(1) - std 24,576-8*8(1) - std 25,576-8*7(1) - std 26,576-8*6(1) - std 27,576-8*5(1) - std 28,576-8*4(1) - std 29,576-8*3(1) - std 30,576-8*2(1) - std 31,576-8*1(1) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - ld 24,64(5) - ld 25,72(5) - ld 26,80(5) - ld 27,88(5) - mr 16,3 - mr 17,4 - mr 18,5 - or 28,24,25 - or 30,26,27 - or 20,28,30 - neg 28,20 - or 20,20,28 - sradi 20,20,63 - addi 3,1,256 - bl __ecp_nistz256_sqr_mont - - ld 24,64(17) - ld 25,72(17) - ld 26,80(17) - ld 27,88(17) - or 28,24,25 - or 30,26,27 - or 19,28,30 - neg 28,19 - or 19,19,28 - sradi 19,19,63 - addi 3,1,192 - bl __ecp_nistz256_sqr_mont - - ld 6,64(18) - ld 24,256+0(1) - ld 25,256+8(1) - ld 26,256+16(1) - ld 27,256+24(1) - addi 5,18,64 - addi 3,1,384 - bl __ecp_nistz256_mul_mont - - ld 6,64(17) - ld 24,192+0(1) - ld 25,192+8(1) - ld 26,192+16(1) - ld 27,192+24(1) - addi 5,17,64 - addi 3,1,416 - bl __ecp_nistz256_mul_mont - - ld 6,32(17) - ld 24,384+0(1) - ld 25,384+8(1) - ld 26,384+16(1) - ld 27,384+24(1) - addi 5,17,32 - addi 3,1,384 - bl __ecp_nistz256_mul_mont - - ld 6,32(18) - ld 24,416+0(1) - ld 25,416+8(1) - ld 26,416+16(1) - ld 27,416+24(1) - addi 5,18,32 - addi 3,1,416 - bl __ecp_nistz256_mul_mont - - addi 5,1,384 - ld 6,256(1) - ld 24,0(17) - ld 25,8(17) - ld 26,16(17) - ld 27,24(17) - addi 3,1,224 - bl __ecp_nistz256_sub_from - - or 7,7,8 - or 9,9,10 - or 21,7,9 - - addi 5,1,256 - addi 3,1,320 - bl __ecp_nistz256_mul_mont - - ld 6,192(1) - ld 24,0(18) - ld 25,8(18) - ld 26,16(18) - ld 27,24(18) - addi 5,1,192 - addi 3,1,352 - bl __ecp_nistz256_mul_mont - - addi 5,1,320 - ld 24,224+0(1) - ld 25,224+8(1) - ld 26,224+16(1) - ld 27,224+24(1) - addi 3,1,160 - bl __ecp_nistz256_sub_from - - or 7,7,8 - or 9,9,10 - or. 7,7,9 - bne .Ladd_proceed - - and. 28,19,20 - beq .Ladd_proceed - - cmpldi 21,0 - beq .Ladd_double - - xor 24,24,24 - std 24,0(16) - std 24,8(16) - std 24,16(16) - std 24,24(16) - std 24,32(16) - std 24,40(16) - std 24,48(16) - std 24,56(16) - std 24,64(16) - std 24,72(16) - std 24,80(16) - std 24,88(16) - b .Ladd_done - -.align 4 -.Ladd_double: - ld 5,0(1) - mr 4,17 - mr 3,16 - ld 16,576-8*16(1) - ld 17,576-8*15(1) - ld 18,576-8*14(1) - ld 19,576-8*13(1) - stdu 5,576-288(1) - b .Ldouble_shortcut - -.align 4 -.Ladd_proceed: - addi 3,1,256 - bl __ecp_nistz256_sqr_mont - - ld 6,64(17) - ld 24,160+0(1) - ld 25,160+8(1) - ld 26,160+16(1) - ld 27,160+24(1) - addi 5,17,64 - addi 3,1,128 - bl __ecp_nistz256_mul_mont - - ld 24,160+0(1) - ld 25,160+8(1) - ld 26,160+16(1) - ld 27,160+24(1) - addi 3,1,192 - bl __ecp_nistz256_sqr_mont - - ld 6,64(18) - ld 24,128+0(1) - ld 25,128+8(1) - ld 26,128+16(1) - ld 27,128+24(1) - addi 5,18,64 - addi 3,1,128 - bl __ecp_nistz256_mul_mont - - ld 6,160(1) - ld 24,192+0(1) - ld 25,192+8(1) - ld 26,192+16(1) - ld 27,192+24(1) - addi 5,1,160 - addi 3,1,288 - bl __ecp_nistz256_mul_mont - - ld 6,192(1) - ld 24,320+0(1) - ld 25,320+8(1) - ld 26,320+16(1) - ld 27,320+24(1) - addi 5,1,192 - addi 3,1,352 - bl __ecp_nistz256_mul_mont - - mr 28,7 - mr 29,8 - mr 30,9 - mr 31,10 - addi 3,1,192 - bl __ecp_nistz256_add - - addi 5,1,256 - addi 3,1,64 - bl __ecp_nistz256_sub_morf - - addi 5,1,288 - bl __ecp_nistz256_sub_from - - addi 5,1,352 - ld 6,288(1) - ld 24,384+0(1) - ld 25,384+8(1) - ld 26,384+16(1) - ld 27,384+24(1) - addi 3,1,96 - bl __ecp_nistz256_sub_morf - - addi 5,1,288 - addi 3,1,416 - bl __ecp_nistz256_mul_mont - - ld 6,224(1) - ld 24,96+0(1) - ld 25,96+8(1) - ld 26,96+16(1) - ld 27,96+24(1) - addi 5,1,224 - addi 3,1,96 - bl __ecp_nistz256_mul_mont - - addi 5,1,416 - bl __ecp_nistz256_sub_from - - ld 28,0(18) - ld 29,8(18) - ld 30,16(18) - ld 31,24(18) - ld 24,64+0(1) - ld 25,64+8(1) - ld 26,64+16(1) - ld 27,64+24(1) - ld 7,0+0(17) - ld 8,0+8(17) - ld 9,0+16(17) - ld 10,0+24(17) - andc 28,28,19 - andc 29,29,19 - andc 30,30,19 - andc 31,31,19 - and 24,24,19 - and 25,25,19 - and 26,26,19 - and 27,27,19 - or 28,28,24 - or 29,29,25 - or 30,30,26 - or 31,31,27 - andc 7,7,20 - andc 8,8,20 - andc 9,9,20 - andc 10,10,20 - and 28,28,20 - and 29,29,20 - and 30,30,20 - and 31,31,20 - or 7,7,28 - or 8,8,29 - or 9,9,30 - or 10,10,31 - - ld 28,0+32(18) - ld 29,0+40(18) - ld 30,0+48(18) - ld 31,0+56(18) - ld 24,64+0+32(1) - ld 25,64+0+40(1) - ld 26,64+0+48(1) - ld 27,64+0+56(1) - std 7,0+0(16) - std 8,0+8(16) - std 9,0+16(16) - std 10,0+24(16) - ld 7,32+0(17) - ld 8,32+8(17) - ld 9,32+16(17) - ld 10,32+24(17) - andc 28,28,19 - andc 29,29,19 - andc 30,30,19 - andc 31,31,19 - and 24,24,19 - and 25,25,19 - and 26,26,19 - and 27,27,19 - or 28,28,24 - or 29,29,25 - or 30,30,26 - or 31,31,27 - andc 7,7,20 - andc 8,8,20 - andc 9,9,20 - andc 10,10,20 - and 28,28,20 - and 29,29,20 - and 30,30,20 - and 31,31,20 - or 7,7,28 - or 8,8,29 - or 9,9,30 - or 10,10,31 - - ld 28,32+32(18) - ld 29,32+40(18) - ld 30,32+48(18) - ld 31,32+56(18) - ld 24,64+32+32(1) - ld 25,64+32+40(1) - ld 26,64+32+48(1) - ld 27,64+32+56(1) - std 7,32+0(16) - std 8,32+8(16) - std 9,32+16(16) - std 10,32+24(16) - ld 7,64+0(17) - ld 8,64+8(17) - ld 9,64+16(17) - ld 10,64+24(17) - andc 28,28,19 - andc 29,29,19 - andc 30,30,19 - andc 31,31,19 - and 24,24,19 - and 25,25,19 - and 26,26,19 - and 27,27,19 - or 28,28,24 - or 29,29,25 - or 30,30,26 - or 31,31,27 - andc 7,7,20 - andc 8,8,20 - andc 9,9,20 - andc 10,10,20 - and 28,28,20 - and 29,29,20 - and 30,30,20 - and 31,31,20 - or 7,7,28 - or 8,8,29 - or 9,9,30 - or 10,10,31 - std 7,64+0(16) - std 8,64+8(16) - std 9,64+16(16) - std 10,64+24(16) - -.Ladd_done: - mtlr 0 - ld 16,576-8*16(1) - ld 17,576-8*15(1) - ld 18,576-8*14(1) - ld 19,576-8*13(1) - ld 20,576-8*12(1) - ld 21,576-8*11(1) - ld 22,576-8*10(1) - ld 23,576-8*9(1) - ld 24,576-8*8(1) - ld 25,576-8*7(1) - ld 26,576-8*6(1) - ld 27,576-8*5(1) - ld 28,576-8*4(1) - ld 29,576-8*3(1) - ld 30,576-8*2(1) - ld 31,576-8*1(1) - addi 1,1,576 - blr -.long 0 -.byte 0,12,4,0,0x80,16,3,0 -.long 0 -.size ecp_nistz256_point_add,.-ecp_nistz256_point_add -.globl ecp_nistz256_point_add_affine -.type ecp_nistz256_point_add_affine,@function -.align 5 -ecp_nistz256_point_add_affine: -.localentry ecp_nistz256_point_add_affine,0 - - stdu 1,-512(1) - mflr 0 - std 16,512-8*16(1) - std 17,512-8*15(1) - std 18,512-8*14(1) - std 19,512-8*13(1) - std 20,512-8*12(1) - std 21,512-8*11(1) - std 22,512-8*10(1) - std 23,512-8*9(1) - std 24,512-8*8(1) - std 25,512-8*7(1) - std 26,512-8*6(1) - std 27,512-8*5(1) - std 28,512-8*4(1) - std 29,512-8*3(1) - std 30,512-8*2(1) - std 31,512-8*1(1) - - li 11,-1 - srdi 11,11,32 - li 12,1 - orc 12,12,11 - - mr 16,3 - mr 17,4 - mr 18,5 - - ld 24,64(4) - ld 25,72(4) - ld 26,80(4) - ld 27,88(4) - or 28,24,25 - or 30,26,27 - or 19,28,30 - neg 28,19 - or 19,19,28 - sradi 19,19,63 - - ld 7,0(5) - ld 8,8(5) - ld 9,16(5) - ld 10,24(5) - ld 28,32(5) - ld 29,40(5) - ld 30,48(5) - ld 31,56(5) - or 7,7,8 - or 9,9,10 - or 7,7,9 - or 28,28,29 - or 30,30,31 - or 28,28,30 - or 20,7,28 - neg 28,20 - or 20,20,28 - sradi 20,20,63 - - addi 3,1,192 - bl __ecp_nistz256_sqr_mont - - mr 24,7 - mr 25,8 - mr 26,9 - mr 27,10 - ld 6,0(18) - addi 5,18,0 - addi 3,1,160 - bl __ecp_nistz256_mul_mont - - addi 5,17,0 - ld 6,64(17) - ld 24,192+0(1) - ld 25,192+8(1) - ld 26,192+16(1) - ld 27,192+24(1) - addi 3,1,224 - bl __ecp_nistz256_sub_from - - addi 5,17,64 - addi 3,1,192 - bl __ecp_nistz256_mul_mont - - ld 6,64(17) - ld 24,224+0(1) - ld 25,224+8(1) - ld 26,224+16(1) - ld 27,224+24(1) - addi 5,17,64 - addi 3,1,128 - bl __ecp_nistz256_mul_mont - - ld 6,32(18) - ld 24,192+0(1) - ld 25,192+8(1) - ld 26,192+16(1) - ld 27,192+24(1) - addi 5,18,32 - addi 3,1,192 - bl __ecp_nistz256_mul_mont - - addi 5,17,32 - ld 24,224+0(1) - ld 25,224+8(1) - ld 26,224+16(1) - ld 27,224+24(1) - addi 3,1,256 - bl __ecp_nistz256_sub_from - - addi 3,1,288 - bl __ecp_nistz256_sqr_mont - - ld 24,256+0(1) - ld 25,256+8(1) - ld 26,256+16(1) - ld 27,256+24(1) - addi 3,1,352 - bl __ecp_nistz256_sqr_mont - - ld 6,224(1) - ld 24,288+0(1) - ld 25,288+8(1) - ld 26,288+16(1) - ld 27,288+24(1) - addi 5,1,224 - addi 3,1,320 - bl __ecp_nistz256_mul_mont - - ld 6,0(17) - ld 24,288+0(1) - ld 25,288+8(1) - ld 26,288+16(1) - ld 27,288+24(1) - addi 5,17,0 - addi 3,1,160 - bl __ecp_nistz256_mul_mont - - mr 28,7 - mr 29,8 - mr 30,9 - mr 31,10 - addi 3,1,288 - bl __ecp_nistz256_add - - addi 5,1,352 - addi 3,1,64 - bl __ecp_nistz256_sub_morf - - addi 5,1,320 - bl __ecp_nistz256_sub_from - - addi 5,1,160 - ld 6,32(17) - ld 24,320+0(1) - ld 25,320+8(1) - ld 26,320+16(1) - ld 27,320+24(1) - addi 3,1,96 - bl __ecp_nistz256_sub_morf - - addi 5,17,32 - addi 3,1,192 - bl __ecp_nistz256_mul_mont - - ld 6,256(1) - ld 24,96+0(1) - ld 25,96+8(1) - ld 26,96+16(1) - ld 27,96+24(1) - addi 5,1,256 - addi 3,1,96 - bl __ecp_nistz256_mul_mont - - addi 5,1,192 - bl __ecp_nistz256_sub_from - - ld 28,0(18) - ld 29,8(18) - ld 30,16(18) - ld 31,24(18) - ld 24,64+0(1) - ld 25,64+8(1) - ld 26,64+16(1) - ld 27,64+24(1) - ld 7,0+0(17) - ld 8,0+8(17) - ld 9,0+16(17) - ld 10,0+24(17) - andc 28,28,19 - andc 29,29,19 - andc 30,30,19 - andc 31,31,19 - and 24,24,19 - and 25,25,19 - and 26,26,19 - and 27,27,19 - or 28,28,24 - or 29,29,25 - or 30,30,26 - or 31,31,27 - andc 7,7,20 - andc 8,8,20 - andc 9,9,20 - andc 10,10,20 - and 28,28,20 - and 29,29,20 - and 30,30,20 - and 31,31,20 - or 7,7,28 - or 8,8,29 - or 9,9,30 - or 10,10,31 - ld 28,32(18) - ld 29,40(18) - ld 30,48(18) - ld 31,56(18) - ld 24,64+0+32(1) - ld 25,64+0+40(1) - ld 26,64+0+48(1) - ld 27,64+0+56(1) - std 7,0+0(16) - std 8,0+8(16) - std 9,0+16(16) - std 10,0+24(16) - ld 7,32+0(17) - ld 8,32+8(17) - ld 9,32+16(17) - ld 10,32+24(17) - andc 28,28,19 - andc 29,29,19 - andc 30,30,19 - andc 31,31,19 - and 24,24,19 - and 25,25,19 - and 26,26,19 - and 27,27,19 - or 28,28,24 - or 29,29,25 - or 30,30,26 - or 31,31,27 - andc 7,7,20 - andc 8,8,20 - andc 9,9,20 - andc 10,10,20 - and 28,28,20 - and 29,29,20 - and 30,30,20 - and 31,31,20 - or 7,7,28 - or 8,8,29 - or 9,9,30 - or 10,10,31 - li 28,1 - not 29,11 - li 30,-1 - not 31,12 - ld 24,64+32+32(1) - ld 25,64+32+40(1) - ld 26,64+32+48(1) - ld 27,64+32+56(1) - std 7,32+0(16) - std 8,32+8(16) - std 9,32+16(16) - std 10,32+24(16) - ld 7,64+0(17) - ld 8,64+8(17) - ld 9,64+16(17) - ld 10,64+24(17) - andc 28,28,19 - andc 29,29,19 - andc 30,30,19 - andc 31,31,19 - and 24,24,19 - and 25,25,19 - and 26,26,19 - and 27,27,19 - or 28,28,24 - or 29,29,25 - or 30,30,26 - or 31,31,27 - andc 7,7,20 - andc 8,8,20 - andc 9,9,20 - andc 10,10,20 - and 28,28,20 - and 29,29,20 - and 30,30,20 - and 31,31,20 - or 7,7,28 - or 8,8,29 - or 9,9,30 - or 10,10,31 - std 7,64+0(16) - std 8,64+8(16) - std 9,64+16(16) - std 10,64+24(16) - - mtlr 0 - ld 16,512-8*16(1) - ld 17,512-8*15(1) - ld 18,512-8*14(1) - ld 19,512-8*13(1) - ld 20,512-8*12(1) - ld 21,512-8*11(1) - ld 22,512-8*10(1) - ld 23,512-8*9(1) - ld 24,512-8*8(1) - ld 25,512-8*7(1) - ld 26,512-8*6(1) - ld 27,512-8*5(1) - ld 28,512-8*4(1) - ld 29,512-8*3(1) - ld 30,512-8*2(1) - ld 31,512-8*1(1) - addi 1,1,512 - blr -.long 0 -.byte 0,12,4,0,0x80,16,3,0 -.long 0 -.size ecp_nistz256_point_add_affine,.-ecp_nistz256_point_add_affine - - - -.globl ecp_nistz256_ord_mul_mont -.type ecp_nistz256_ord_mul_mont,@function -.align 5 -ecp_nistz256_ord_mul_mont: -.localentry ecp_nistz256_ord_mul_mont,0 - - stdu 1,-160(1) - std 18,48(1) - std 19,56(1) - std 20,64(1) - std 21,72(1) - std 22,80(1) - std 23,88(1) - std 24,96(1) - std 25,104(1) - std 26,112(1) - std 27,120(1) - std 28,128(1) - std 29,136(1) - std 30,144(1) - std 31,152(1) - - ld 24,0(4) - ld 6,0(5) - ld 25,8(4) - ld 26,16(4) - ld 27,24(4) - - lis 18,0xccd1 - lis 19,0xf3b9 - lis 20,0xbce6 - ori 18,18,0xc8aa - ori 19,19,0xcac2 - ori 20,20,0xfaad - sldi 18,18,32 - sldi 19,19,32 - sldi 20,20,32 - oris 18,18,0xee00 - oris 19,19,0xfc63 - oris 20,20,0xa717 - ori 18,18,0xbc4f - ori 19,19,0x2551 - ori 20,20,0x9e84 - li 11,-1 - sldi 12,11,32 - li 0,0 - - mulld 7,24,6 - mulhdu 28,24,6 - - mulld 8,25,6 - mulhdu 29,25,6 - - mulld 9,26,6 - mulhdu 30,26,6 - - mulld 10,27,6 - mulhdu 22,27,6 - - mulld 21,7,18 - - addc 8,8,28 - adde 9,9,29 - adde 10,10,30 - addze 22,22 - li 23,0 - ld 6,8*1(5) - - sldi 28,21,32 - subfc 9,21,9 - srdi 29,21,32 - subfe 10,28,10 - subfe 22,29,22 - subfe 23,0,23 - - addic 28,7,-1 - mulhdu 29,19,21 - mulld 30,20,21 - mulhdu 31,20,21 - - adde 30,30,29 - mulld 28,24,6 - addze 31,31 - mulld 29,25,6 - - addc 7,8,30 - mulld 30,26,6 - adde 8,9,31 - mulld 31,27,6 - adde 9,10,21 - adde 10,22,21 - addze 22,23 - - addc 7,7,28 - mulhdu 28,24,6 - adde 8,8,29 - mulhdu 29,25,6 - adde 9,9,30 - mulhdu 30,26,6 - adde 10,10,31 - mulhdu 31,27,6 - addze 22,22 - mulld 21,7,18 - addc 8,8,28 - adde 9,9,29 - adde 10,10,30 - adde 22,22,31 - addze 23,0 - ld 6,8*2(5) - - sldi 28,21,32 - subfc 9,21,9 - srdi 29,21,32 - subfe 10,28,10 - subfe 22,29,22 - subfe 23,0,23 - - addic 28,7,-1 - mulhdu 29,19,21 - mulld 30,20,21 - mulhdu 31,20,21 - - adde 30,30,29 - mulld 28,24,6 - addze 31,31 - mulld 29,25,6 - - addc 7,8,30 - mulld 30,26,6 - adde 8,9,31 - mulld 31,27,6 - adde 9,10,21 - adde 10,22,21 - addze 22,23 - - addc 7,7,28 - mulhdu 28,24,6 - adde 8,8,29 - mulhdu 29,25,6 - adde 9,9,30 - mulhdu 30,26,6 - adde 10,10,31 - mulhdu 31,27,6 - addze 22,22 - mulld 21,7,18 - addc 8,8,28 - adde 9,9,29 - adde 10,10,30 - adde 22,22,31 - addze 23,0 - ld 6,8*3(5) - - sldi 28,21,32 - subfc 9,21,9 - srdi 29,21,32 - subfe 10,28,10 - subfe 22,29,22 - subfe 23,0,23 - - addic 28,7,-1 - mulhdu 29,19,21 - mulld 30,20,21 - mulhdu 31,20,21 - - adde 30,30,29 - mulld 28,24,6 - addze 31,31 - mulld 29,25,6 - - addc 7,8,30 - mulld 30,26,6 - adde 8,9,31 - mulld 31,27,6 - adde 9,10,21 - adde 10,22,21 - addze 22,23 - - addc 7,7,28 - mulhdu 28,24,6 - adde 8,8,29 - mulhdu 29,25,6 - adde 9,9,30 - mulhdu 30,26,6 - adde 10,10,31 - mulhdu 31,27,6 - addze 22,22 - mulld 21,7,18 - addc 8,8,28 - adde 9,9,29 - adde 10,10,30 - adde 22,22,31 - addze 23,0 - sldi 28,21,32 - subfc 9,21,9 - srdi 29,21,32 - subfe 10,28,10 - subfe 22,29,22 - subfe 23,0,23 - - addic 28,7,-1 - mulhdu 29,19,21 - mulld 30,20,21 - mulhdu 31,20,21 - - adde 30,30,29 - addze 31,31 - - addc 7,8,30 - adde 8,9,31 - adde 9,10,21 - adde 10,22,21 - addze 22,23 - - subfc 7,19,7 - subfe 8,20,8 - subfe 9,11,9 - subfe 10,12,10 - subfe 22,0,22 - - and 28,19,22 - and 29,20,22 - addc 7,7,28 - and 31,12,22 - adde 8,8,29 - adde 9,9,22 - adde 10,10,31 - - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - - ld 18,48(1) - ld 19,56(1) - ld 20,64(1) - ld 21,72(1) - ld 22,80(1) - ld 23,88(1) - ld 24,96(1) - ld 25,104(1) - ld 26,112(1) - ld 27,120(1) - ld 28,128(1) - ld 29,136(1) - ld 30,144(1) - ld 31,152(1) - addi 1,1,160 - blr -.long 0 -.byte 0,12,4,0,0x80,14,3,0 -.long 0 -.size ecp_nistz256_ord_mul_mont,.-ecp_nistz256_ord_mul_mont - - - - -.globl ecp_nistz256_ord_sqr_mont -.type ecp_nistz256_ord_sqr_mont,@function -.align 5 -ecp_nistz256_ord_sqr_mont: -.localentry ecp_nistz256_ord_sqr_mont,0 - - stdu 1,-160(1) - std 18,48(1) - std 19,56(1) - std 20,64(1) - std 21,72(1) - std 22,80(1) - std 23,88(1) - std 24,96(1) - std 25,104(1) - std 26,112(1) - std 27,120(1) - std 28,128(1) - std 29,136(1) - std 30,144(1) - std 31,152(1) - - mtctr 5 - - ld 24,0(4) - ld 25,8(4) - ld 26,16(4) - ld 27,24(4) - - lis 18,0xccd1 - lis 19,0xf3b9 - lis 20,0xbce6 - ori 18,18,0xc8aa - ori 19,19,0xcac2 - ori 20,20,0xfaad - sldi 18,18,32 - sldi 19,19,32 - sldi 20,20,32 - oris 18,18,0xee00 - oris 19,19,0xfc63 - oris 20,20,0xa717 - ori 18,18,0xbc4f - ori 19,19,0x2551 - ori 20,20,0x9e84 - li 11,-1 - sldi 12,11,32 - li 0,0 - b .Loop_ord_sqr - -.align 5 -.Loop_ord_sqr: - - - - - - - - - - - - - - - - mulld 8,25,24 - mulhdu 29,25,24 - mulld 9,26,24 - mulhdu 30,26,24 - mulld 10,27,24 - mulhdu 22,27,24 - - addc 9,9,29 - mulld 28,26,25 - mulhdu 29,26,25 - adde 10,10,30 - mulld 30,27,25 - mulhdu 31,27,25 - addze 22,22 - - mulld 23,27,26 - mulhdu 5,27,26 - - addc 29,29,30 - mulld 7,24,24 - addze 30,31 - - addc 10,10,28 - mulhdu 24,24,24 - adde 22,22,29 - mulld 29,25,25 - adde 23,23,30 - mulhdu 25,25,25 - addze 5,5 - - addc 8,8,8 - mulld 30,26,26 - adde 9,9,9 - mulhdu 26,26,26 - adde 10,10,10 - mulld 31,27,27 - adde 22,22,22 - mulhdu 27,27,27 - adde 23,23,23 - adde 5,5,5 - addze 6,0 - - addc 8,8,24 - mulld 21,7,18 - adde 9,9,29 - adde 10,10,25 - adde 22,22,30 - adde 23,23,26 - adde 5,5,31 - adde 6,6,27 - addic 28,7,-1 - mulhdu 29,19,21 - mulld 30,20,21 - mulhdu 31,20,21 - - adde 30,30,29 - addze 31,31 - - addc 7,8,30 - adde 8,9,31 - adde 9,10,21 - adde 10,0,21 - mulld 31,7,18 - sldi 28,21,32 - subfc 8,21,8 - srdi 29,21,32 - subfe 9,28,9 - subfe 10,29,10 - addic 28,7,-1 - mulhdu 29,19,31 - mulld 30,20,31 - mulhdu 21,20,31 - - adde 30,30,29 - addze 21,21 - - addc 7,8,30 - adde 8,9,21 - adde 9,10,31 - adde 10,0,31 - mulld 21,7,18 - sldi 28,31,32 - subfc 8,31,8 - srdi 29,31,32 - subfe 9,28,9 - subfe 10,29,10 - addic 28,7,-1 - mulhdu 29,19,21 - mulld 30,20,21 - mulhdu 31,20,21 - - adde 30,30,29 - addze 31,31 - - addc 7,8,30 - adde 8,9,31 - adde 9,10,21 - adde 10,0,21 - mulld 31,7,18 - sldi 28,21,32 - subfc 8,21,8 - srdi 29,21,32 - subfe 9,28,9 - subfe 10,29,10 - addic 28,7,-1 - mulhdu 29,19,31 - mulld 30,20,31 - mulhdu 21,20,31 - - adde 30,30,29 - addze 21,21 - - addc 7,8,30 - adde 8,9,21 - adde 9,10,31 - adde 10,0,31 - sldi 28,31,32 - subfc 8,31,8 - srdi 29,31,32 - subfe 9,28,9 - subfe 10,29,10 - addc 7,7,22 - adde 8,8,23 - adde 9,9,5 - adde 10,10,6 - addze 22,0 - - subfc 7,19,7 - subfe 8,20,8 - subfe 9,11,9 - subfe 10,12,10 - subfe 22,0,22 - - and 28,19,22 - and 29,20,22 - addc 24,7,28 - and 31,12,22 - adde 25,8,29 - adde 26,9,22 - adde 27,10,31 - - bdnz .Loop_ord_sqr - - std 24,0(3) - std 25,8(3) - std 26,16(3) - std 27,24(3) - - ld 18,48(1) - ld 19,56(1) - ld 20,64(1) - ld 21,72(1) - ld 22,80(1) - ld 23,88(1) - ld 24,96(1) - ld 25,104(1) - ld 26,112(1) - ld 27,120(1) - ld 28,128(1) - ld 29,136(1) - ld 30,144(1) - ld 31,152(1) - addi 1,1,160 - blr -.long 0 -.byte 0,12,4,0,0x80,14,3,0 -.long 0 -.size ecp_nistz256_ord_sqr_mont,.-ecp_nistz256_ord_sqr_mont - - - -.globl ecp_nistz256_scatter_w5 -.type ecp_nistz256_scatter_w5,@function -.align 4 -ecp_nistz256_scatter_w5: -.localentry ecp_nistz256_scatter_w5,0 - - slwi 5,5,2 - add 3,3,5 - - ld 8, 0(4) - ld 9, 8(4) - ld 10,16(4) - ld 11,24(4) - - stw 8, 64*0-4(3) - srdi 8, 8, 32 - stw 9, 64*1-4(3) - srdi 9, 9, 32 - stw 10,64*2-4(3) - srdi 10,10,32 - stw 11,64*3-4(3) - srdi 11,11,32 - stw 8, 64*4-4(3) - stw 9, 64*5-4(3) - stw 10,64*6-4(3) - stw 11,64*7-4(3) - addi 3,3,64*8 - - ld 8, 32(4) - ld 9, 40(4) - ld 10,48(4) - ld 11,56(4) - - stw 8, 64*0-4(3) - srdi 8, 8, 32 - stw 9, 64*1-4(3) - srdi 9, 9, 32 - stw 10,64*2-4(3) - srdi 10,10,32 - stw 11,64*3-4(3) - srdi 11,11,32 - stw 8, 64*4-4(3) - stw 9, 64*5-4(3) - stw 10,64*6-4(3) - stw 11,64*7-4(3) - addi 3,3,64*8 - - ld 8, 64(4) - ld 9, 72(4) - ld 10,80(4) - ld 11,88(4) - - stw 8, 64*0-4(3) - srdi 8, 8, 32 - stw 9, 64*1-4(3) - srdi 9, 9, 32 - stw 10,64*2-4(3) - srdi 10,10,32 - stw 11,64*3-4(3) - srdi 11,11,32 - stw 8, 64*4-4(3) - stw 9, 64*5-4(3) - stw 10,64*6-4(3) - stw 11,64*7-4(3) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size ecp_nistz256_scatter_w5,.-ecp_nistz256_scatter_w5 - - - - -.globl ecp_nistz256_gather_w5 -.type ecp_nistz256_gather_w5,@function -.align 4 -ecp_nistz256_gather_w5: -.localentry ecp_nistz256_gather_w5,0 - - neg 0,5 - sradi 0,0,63 - - add 5,5,0 - slwi 5,5,2 - add 4,4,5 - - lwz 5, 64*0(4) - lwz 6, 64*1(4) - lwz 7, 64*2(4) - lwz 8, 64*3(4) - lwz 9, 64*4(4) - lwz 10,64*5(4) - lwz 11,64*6(4) - lwz 12,64*7(4) - addi 4,4,64*8 - sldi 9, 9, 32 - sldi 10,10,32 - sldi 11,11,32 - sldi 12,12,32 - or 5,5,9 - or 6,6,10 - or 7,7,11 - or 8,8,12 - and 5,5,0 - and 6,6,0 - and 7,7,0 - and 8,8,0 - std 5,0(3) - std 6,8(3) - std 7,16(3) - std 8,24(3) - - lwz 5, 64*0(4) - lwz 6, 64*1(4) - lwz 7, 64*2(4) - lwz 8, 64*3(4) - lwz 9, 64*4(4) - lwz 10,64*5(4) - lwz 11,64*6(4) - lwz 12,64*7(4) - addi 4,4,64*8 - sldi 9, 9, 32 - sldi 10,10,32 - sldi 11,11,32 - sldi 12,12,32 - or 5,5,9 - or 6,6,10 - or 7,7,11 - or 8,8,12 - and 5,5,0 - and 6,6,0 - and 7,7,0 - and 8,8,0 - std 5,32(3) - std 6,40(3) - std 7,48(3) - std 8,56(3) - - lwz 5, 64*0(4) - lwz 6, 64*1(4) - lwz 7, 64*2(4) - lwz 8, 64*3(4) - lwz 9, 64*4(4) - lwz 10,64*5(4) - lwz 11,64*6(4) - lwz 12,64*7(4) - sldi 9, 9, 32 - sldi 10,10,32 - sldi 11,11,32 - sldi 12,12,32 - or 5,5,9 - or 6,6,10 - or 7,7,11 - or 8,8,12 - and 5,5,0 - and 6,6,0 - and 7,7,0 - and 8,8,0 - std 5,64(3) - std 6,72(3) - std 7,80(3) - std 8,88(3) - - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size ecp_nistz256_gather_w5,.-ecp_nistz256_gather_w5 - - - - -.globl ecp_nistz256_scatter_w7 -.type ecp_nistz256_scatter_w7,@function -.align 4 -ecp_nistz256_scatter_w7: -.localentry ecp_nistz256_scatter_w7,0 - - li 0,8 - mtctr 0 - add 3,3,5 - subi 4,4,8 - -.Loop_scatter_w7: - ldu 0,8(4) - stb 0,64*0(3) - srdi 0,0,8 - stb 0,64*1(3) - srdi 0,0,8 - stb 0,64*2(3) - srdi 0,0,8 - stb 0,64*3(3) - srdi 0,0,8 - stb 0,64*4(3) - srdi 0,0,8 - stb 0,64*5(3) - srdi 0,0,8 - stb 0,64*6(3) - srdi 0,0,8 - stb 0,64*7(3) - addi 3,3,64*8 - bdnz .Loop_scatter_w7 - - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size ecp_nistz256_scatter_w7,.-ecp_nistz256_scatter_w7 - - - - -.globl ecp_nistz256_gather_w7 -.type ecp_nistz256_gather_w7,@function -.align 4 -ecp_nistz256_gather_w7: -.localentry ecp_nistz256_gather_w7,0 - - li 0,8 - mtctr 0 - neg 0,5 - sradi 0,0,63 - - add 5,5,0 - add 4,4,5 - subi 3,3,8 - -.Loop_gather_w7: - lbz 5, 64*0(4) - lbz 6, 64*1(4) - lbz 7, 64*2(4) - lbz 8, 64*3(4) - lbz 9, 64*4(4) - lbz 10,64*5(4) - lbz 11,64*6(4) - lbz 12,64*7(4) - addi 4,4,64*8 - - sldi 6, 6, 8 - sldi 7, 7, 16 - sldi 8, 8, 24 - sldi 9, 9, 32 - sldi 10,10,40 - sldi 11,11,48 - sldi 12,12,56 - - or 5,5,6 - or 7,7,8 - or 9,9,10 - or 11,11,12 - or 5,5,7 - or 9,9,11 - or 5,5,9 - and 5,5,0 - stdu 5,8(3) - bdnz .Loop_gather_w7 - - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size ecp_nistz256_gather_w7,.-ecp_nistz256_gather_w7 diff --git a/sys/crypto/openssl/powerpc64le/ghashp8-ppc.S b/sys/crypto/openssl/powerpc64le/ghashp8-ppc.S deleted file mode 100644 index 8fcd5da109f..00000000000 --- a/sys/crypto/openssl/powerpc64le/ghashp8-ppc.S +++ /dev/null @@ -1,576 +0,0 @@ -/* Do not modify. This file is auto-generated from ghashp8-ppc.pl. */ -.machine "any" - -.abiversion 2 -.text - -.globl gcm_init_p8 -.type gcm_init_p8,@function -.align 5 -gcm_init_p8: -.localentry gcm_init_p8,0 - - li 0,-4096 - li 8,0x10 - li 12,-1 - li 9,0x20 - or 0,0,0 - li 10,0x30 - .long 0x7D202699 - - vspltisb 8,-16 - vspltisb 5,1 - vaddubm 8,8,8 - vxor 4,4,4 - vor 8,8,5 - vsldoi 8,8,4,15 - vsldoi 6,4,5,1 - vaddubm 8,8,8 - vspltisb 7,7 - vor 8,8,6 - vspltb 6,9,0 - vsl 9,9,5 - vsrab 6,6,7 - vand 6,6,8 - vxor 3,9,6 - - vsldoi 9,3,3,8 - vsldoi 8,4,8,8 - vsldoi 11,4,9,8 - vsldoi 10,9,4,8 - - .long 0x7D001F99 - .long 0x7D681F99 - li 8,0x40 - .long 0x7D291F99 - li 9,0x50 - .long 0x7D4A1F99 - li 10,0x60 - - .long 0x10035CC8 - .long 0x10234CC8 - .long 0x104354C8 - - .long 0x10E044C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - - vsldoi 6,0,0,8 - .long 0x100044C8 - vxor 6,6,2 - vxor 16,0,6 - - vsldoi 17,16,16,8 - vsldoi 19,4,17,8 - vsldoi 18,17,4,8 - - .long 0x7E681F99 - li 8,0x70 - .long 0x7E291F99 - li 9,0x80 - .long 0x7E4A1F99 - li 10,0x90 - .long 0x10039CC8 - .long 0x11B09CC8 - .long 0x10238CC8 - .long 0x11D08CC8 - .long 0x104394C8 - .long 0x11F094C8 - - .long 0x10E044C8 - .long 0x114D44C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vsldoi 11,14,4,8 - vsldoi 9,4,14,8 - vxor 0,0,5 - vxor 2,2,6 - vxor 13,13,11 - vxor 15,15,9 - - vsldoi 0,0,0,8 - vsldoi 13,13,13,8 - vxor 0,0,7 - vxor 13,13,10 - - vsldoi 6,0,0,8 - vsldoi 9,13,13,8 - .long 0x100044C8 - .long 0x11AD44C8 - vxor 6,6,2 - vxor 9,9,15 - vxor 0,0,6 - vxor 13,13,9 - - vsldoi 9,0,0,8 - vsldoi 17,13,13,8 - vsldoi 11,4,9,8 - vsldoi 10,9,4,8 - vsldoi 19,4,17,8 - vsldoi 18,17,4,8 - - .long 0x7D681F99 - li 8,0xa0 - .long 0x7D291F99 - li 9,0xb0 - .long 0x7D4A1F99 - li 10,0xc0 - .long 0x7E681F99 - .long 0x7E291F99 - .long 0x7E4A1F99 - - or 12,12,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size gcm_init_p8,.-gcm_init_p8 -.globl gcm_gmult_p8 -.type gcm_gmult_p8,@function -.align 5 -gcm_gmult_p8: -.localentry gcm_gmult_p8,0 - - lis 0,0xfff8 - li 8,0x10 - li 12,-1 - li 9,0x20 - or 0,0,0 - li 10,0x30 - .long 0x7C601E99 - - .long 0x7D682699 - lvsl 12,0,0 - .long 0x7D292699 - vspltisb 5,0x07 - .long 0x7D4A2699 - vxor 12,12,5 - .long 0x7D002699 - vperm 3,3,3,12 - vxor 4,4,4 - - .long 0x10035CC8 - .long 0x10234CC8 - .long 0x104354C8 - - .long 0x10E044C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - - vsldoi 6,0,0,8 - .long 0x100044C8 - vxor 6,6,2 - vxor 0,0,6 - - vperm 0,0,0,12 - .long 0x7C001F99 - - or 12,12,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size gcm_gmult_p8,.-gcm_gmult_p8 - -.globl gcm_ghash_p8 -.type gcm_ghash_p8,@function -.align 5 -gcm_ghash_p8: -.localentry gcm_ghash_p8,0 - - li 0,-4096 - li 8,0x10 - li 12,-1 - li 9,0x20 - or 0,0,0 - li 10,0x30 - .long 0x7C001E99 - - .long 0x7D682699 - li 8,0x40 - lvsl 12,0,0 - .long 0x7D292699 - li 9,0x50 - vspltisb 5,0x07 - .long 0x7D4A2699 - li 10,0x60 - vxor 12,12,5 - .long 0x7D002699 - vperm 0,0,0,12 - vxor 4,4,4 - - cmpldi 6,64 - bge .Lgcm_ghash_p8_4x - - .long 0x7C602E99 - addi 5,5,16 - subic. 6,6,16 - vperm 3,3,3,12 - vxor 3,3,0 - beq .Lshort - - .long 0x7E682699 - li 8,16 - .long 0x7E292699 - add 9,5,6 - .long 0x7E4A2699 - - -.align 5 -.Loop_2x: - .long 0x7E002E99 - vperm 16,16,16,12 - - subic 6,6,32 - .long 0x10039CC8 - .long 0x11B05CC8 - subfe 0,0,0 - .long 0x10238CC8 - .long 0x11D04CC8 - and 0,0,6 - .long 0x104394C8 - .long 0x11F054C8 - add 5,5,0 - - vxor 0,0,13 - vxor 1,1,14 - - .long 0x10E044C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 2,2,15 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - .long 0x7C682E99 - addi 5,5,32 - - vsldoi 6,0,0,8 - .long 0x100044C8 - vperm 3,3,3,12 - vxor 6,6,2 - vxor 3,3,6 - vxor 3,3,0 - cmpld 9,5 - bgt .Loop_2x - - cmplwi 6,0 - bne .Leven - -.Lshort: - .long 0x10035CC8 - .long 0x10234CC8 - .long 0x104354C8 - - .long 0x10E044C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - - vsldoi 6,0,0,8 - .long 0x100044C8 - vxor 6,6,2 - -.Leven: - vxor 0,0,6 - vperm 0,0,0,12 - .long 0x7C001F99 - - or 12,12,12 - blr -.long 0 -.byte 0,12,0x14,0,0,0,4,0 -.long 0 -.align 5 -.gcm_ghash_p8_4x: -.Lgcm_ghash_p8_4x: - stdu 1,-256(1) - li 10,63 - li 11,79 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - li 10,0x60 - stvx 31,11,1 - li 0,-1 - stw 12,252(1) - or 0,0,0 - - lvsl 5,0,8 - - li 8,0x70 - .long 0x7E292699 - li 9,0x80 - vspltisb 6,8 - - li 10,0x90 - .long 0x7EE82699 - li 8,0xa0 - .long 0x7F092699 - li 9,0xb0 - .long 0x7F2A2699 - li 10,0xc0 - .long 0x7FA82699 - li 8,0x10 - .long 0x7FC92699 - li 9,0x20 - .long 0x7FEA2699 - li 10,0x30 - - vsldoi 7,4,6,8 - vaddubm 18,5,7 - vaddubm 19,6,18 - - srdi 6,6,4 - - .long 0x7C602E99 - .long 0x7E082E99 - subic. 6,6,8 - .long 0x7EC92E99 - .long 0x7F8A2E99 - addi 5,5,0x40 - vperm 3,3,3,12 - vperm 16,16,16,12 - vperm 22,22,22,12 - vperm 28,28,28,12 - - vxor 2,3,0 - - .long 0x11B0BCC8 - .long 0x11D0C4C8 - .long 0x11F0CCC8 - - vperm 11,17,9,18 - vperm 5,22,28,19 - vperm 10,17,9,19 - vperm 6,22,28,18 - .long 0x12B68CC8 - .long 0x12855CC8 - .long 0x137C4CC8 - .long 0x134654C8 - - vxor 21,21,14 - vxor 20,20,13 - vxor 27,27,21 - vxor 26,26,15 - - blt .Ltail_4x - -.Loop_4x: - .long 0x7C602E99 - .long 0x7E082E99 - subic. 6,6,4 - .long 0x7EC92E99 - .long 0x7F8A2E99 - addi 5,5,0x40 - vperm 16,16,16,12 - vperm 22,22,22,12 - vperm 28,28,28,12 - vperm 3,3,3,12 - - .long 0x1002ECC8 - .long 0x1022F4C8 - .long 0x1042FCC8 - .long 0x11B0BCC8 - .long 0x11D0C4C8 - .long 0x11F0CCC8 - - vxor 0,0,20 - vxor 1,1,27 - vxor 2,2,26 - vperm 5,22,28,19 - vperm 6,22,28,18 - - .long 0x10E044C8 - .long 0x12855CC8 - .long 0x134654C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - - vsldoi 6,0,0,8 - .long 0x12B68CC8 - .long 0x137C4CC8 - .long 0x100044C8 - - vxor 20,20,13 - vxor 26,26,15 - vxor 2,2,3 - vxor 21,21,14 - vxor 2,2,6 - vxor 27,27,21 - vxor 2,2,0 - bge .Loop_4x - -.Ltail_4x: - .long 0x1002ECC8 - .long 0x1022F4C8 - .long 0x1042FCC8 - - vxor 0,0,20 - vxor 1,1,27 - - .long 0x10E044C8 - - vsldoi 5,1,4,8 - vsldoi 6,4,1,8 - vxor 2,2,26 - vxor 0,0,5 - vxor 2,2,6 - - vsldoi 0,0,0,8 - vxor 0,0,7 - - vsldoi 6,0,0,8 - .long 0x100044C8 - vxor 6,6,2 - vxor 0,0,6 - - addic. 6,6,4 - beq .Ldone_4x - - .long 0x7C602E99 - cmpldi 6,2 - li 6,-4 - blt .Lone - .long 0x7E082E99 - beq .Ltwo - -.Lthree: - .long 0x7EC92E99 - vperm 3,3,3,12 - vperm 16,16,16,12 - vperm 22,22,22,12 - - vxor 2,3,0 - vor 29,23,23 - vor 30,24,24 - vor 31,25,25 - - vperm 5,16,22,19 - vperm 6,16,22,18 - .long 0x12B08CC8 - .long 0x13764CC8 - .long 0x12855CC8 - .long 0x134654C8 - - vxor 27,27,21 - b .Ltail_4x - -.align 4 -.Ltwo: - vperm 3,3,3,12 - vperm 16,16,16,12 - - vxor 2,3,0 - vperm 5,4,16,19 - vperm 6,4,16,18 - - vsldoi 29,4,17,8 - vor 30,17,17 - vsldoi 31,17,4,8 - - .long 0x12855CC8 - .long 0x13704CC8 - .long 0x134654C8 - - b .Ltail_4x - -.align 4 -.Lone: - vperm 3,3,3,12 - - vsldoi 29,4,9,8 - vor 30,9,9 - vsldoi 31,9,4,8 - - vxor 2,3,0 - vxor 20,20,20 - vxor 27,27,27 - vxor 26,26,26 - - b .Ltail_4x - -.Ldone_4x: - vperm 0,0,0,12 - .long 0x7C001F99 - - li 10,63 - li 11,79 - or 12,12,12 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - addi 1,1,256 - blr -.long 0 -.byte 0,12,0x04,0,0x80,0,4,0 -.long 0 -.size gcm_ghash_p8,.-gcm_ghash_p8 - -.byte 71,72,65,83,72,32,102,111,114,32,80,111,119,101,114,73,83,65,32,50,46,48,55,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 2 diff --git a/sys/crypto/openssl/powerpc64le/keccak1600-ppc64.S b/sys/crypto/openssl/powerpc64le/keccak1600-ppc64.S deleted file mode 100644 index 1fb70dd39b2..00000000000 --- a/sys/crypto/openssl/powerpc64le/keccak1600-ppc64.S +++ /dev/null @@ -1,670 +0,0 @@ -/* Do not modify. This file is auto-generated from keccak1600-ppc64.pl. */ -.abiversion 2 -.text - -.type KeccakF1600_int,@function -.align 5 -KeccakF1600_int: -.localentry KeccakF1600_int,0 - - li 0,24 - mtctr 0 - b .Loop -.align 4 -.Loop: - xor 0,7,12 - std 11,96(1) - xor 3,8,6 - std 16,104(1) - xor 4,9,14 - std 21,112(1) - xor 5,10,15 - std 26,120(1) - xor 11,11,16 - xor 0,0,17 - xor 3,3,18 - xor 4,4,19 - xor 5,5,20 - xor 11,11,21 - xor 0,0,22 - xor 3,3,23 - xor 4,4,24 - xor 5,5,25 - xor 11,11,26 - xor 0,0,27 - xor 4,4,29 - xor 3,3,28 - xor 5,5,30 - rotldi 16,4,1 - xor 11,11,31 - rotldi 21,5,1 - xor 16,16,0 - rotldi 26,11,1 - - xor 8,8,16 - xor 6,6,16 - xor 18,18,16 - xor 23,23,16 - xor 28,28,16 - - rotldi 16,0,1 - xor 21,21,3 - xor 4,4,26 - rotldi 26,3,1 - xor 5,5,16 - xor 11,11,26 - - xor 3, 9,21 - xor 14,14,21 - xor 19,19,21 - xor 24,24,21 - xor 29,29,21 - - xor 7,7,11 - xor 12,12,11 - xor 17,17,11 - xor 22,22,11 - xor 27,27,11 - ld 11,96(1) - xor 0, 10,4 - ld 16,104(1) - xor 15,15,4 - ld 21,112(1) - xor 20,20,4 - ld 26,120(1) - xor 25,25,4 - xor 30,30,4 - - xor 4, 11,5 - xor 16,16,5 - xor 21,21,5 - xor 26,26,5 - xor 31,31,5 - - mr 5,8 - rotldi 8,6,44 - - rotldi 9,19,43 - - rotldi 10,25,21 - - rotldi 11,31,14 - - rotldi 6,16,20 - rotldi 19,20,25 - rotldi 25,24,15 - rotldi 31,28,2 - - rotldi 16,29,61 - rotldi 20,26,8 - rotldi 24,18,10 - rotldi 28,15,55 - - rotldi 29,21,39 - rotldi 26,30,56 - rotldi 18,14,6 - rotldi 15,23,45 - - rotldi 21,27,18 - rotldi 30,22,41 - rotldi 14,17,3 - rotldi 23,12,36 - - rotldi 12,0,28 - rotldi 17,5,1 - rotldi 22,4,27 - rotldi 27,3,62 - - andc 0,9,8 - andc 3,10,9 - andc 4,7,11 - andc 5,8,7 - xor 7,7,0 - andc 0,11,10 - xor 8,8,3 - ld 3,80(1) - xor 10,10,4 - xor 11,11,5 - xor 9,9,0 - ldu 5,8(3) - - andc 0,14,6 - std 3,80(1) - andc 3,15,14 - andc 4,12,16 - xor 7,7,5 - andc 5,6,12 - xor 12,12,0 - andc 0,16,15 - xor 6,6,3 - xor 15,15,4 - xor 16,16,5 - xor 14,14,0 - - andc 0,19,18 - andc 3,20,19 - andc 4,17,21 - andc 5,18,17 - xor 17,17,0 - andc 0,21,20 - xor 18,18,3 - xor 20,20,4 - xor 21,21,5 - xor 19,19,0 - - andc 0,24,23 - andc 3,25,24 - andc 4,22,26 - andc 5,23,22 - xor 22,22,0 - andc 0,26,25 - xor 23,23,3 - xor 25,25,4 - xor 26,26,5 - xor 24,24,0 - - andc 0,29,28 - andc 3,30,29 - andc 4,27,31 - andc 5,28,27 - xor 27,27,0 - andc 0,31,30 - xor 28,28,3 - xor 30,30,4 - xor 31,31,5 - xor 29,29,0 - - bdnz .Loop - - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size KeccakF1600_int,.-KeccakF1600_int - -.type KeccakF1600,@function -.align 5 -KeccakF1600: -.localentry KeccakF1600,0 - - stdu 1,-272(1) - mflr 0 - std 14,128(1) - std 15,136(1) - std 16,144(1) - std 17,152(1) - std 18,160(1) - std 19,168(1) - std 20,176(1) - std 21,184(1) - std 22,192(1) - std 23,200(1) - std 24,208(1) - std 25,216(1) - std 26,224(1) - std 27,232(1) - std 28,240(1) - std 29,248(1) - std 30,256(1) - std 31,264(1) - std 0,288(1) - - bl PICmeup - subi 12,12,8 - - std 3,48(1) - - - - std 12,80(1) - - ld 7,0(3) - ld 8,8(3) - ld 9,16(3) - ld 10,24(3) - ld 11,32(3) - ld 12,40(3) - ld 6,48(3) - ld 14,56(3) - ld 15,64(3) - ld 16,72(3) - ld 17,80(3) - ld 18,88(3) - ld 19,96(3) - ld 20,104(3) - ld 21,112(3) - ld 22,120(3) - ld 23,128(3) - ld 24,136(3) - ld 25,144(3) - ld 26,152(3) - ld 27,160(3) - ld 28,168(3) - ld 29,176(3) - ld 30,184(3) - ld 31,192(3) - - bl KeccakF1600_int - - ld 3,48(1) - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - std 11,32(3) - std 12,40(3) - std 6,48(3) - std 14,56(3) - std 15,64(3) - std 16,72(3) - std 17,80(3) - std 18,88(3) - std 19,96(3) - std 20,104(3) - std 21,112(3) - std 22,120(3) - std 23,128(3) - std 24,136(3) - std 25,144(3) - std 26,152(3) - std 27,160(3) - std 28,168(3) - std 29,176(3) - std 30,184(3) - std 31,192(3) - - ld 0,288(1) - ld 14,128(1) - ld 15,136(1) - ld 16,144(1) - ld 17,152(1) - ld 18,160(1) - ld 19,168(1) - ld 20,176(1) - ld 21,184(1) - ld 22,192(1) - ld 23,200(1) - ld 24,208(1) - ld 25,216(1) - ld 26,224(1) - ld 27,232(1) - ld 28,240(1) - ld 29,248(1) - ld 30,256(1) - ld 31,264(1) - mtlr 0 - addi 1,1,272 - blr -.long 0 -.byte 0,12,4,1,0x80,18,1,0 -.long 0 -.size KeccakF1600,.-KeccakF1600 - -.type dword_le_load,@function -.align 5 -dword_le_load: -.localentry dword_le_load,0 - - lbzu 0,1(3) - lbzu 4,1(3) - lbzu 5,1(3) - insrdi 0,4,8,48 - lbzu 4,1(3) - insrdi 0,5,8,40 - lbzu 5,1(3) - insrdi 0,4,8,32 - lbzu 4,1(3) - insrdi 0,5,8,24 - lbzu 5,1(3) - insrdi 0,4,8,16 - lbzu 4,1(3) - insrdi 0,5,8,8 - insrdi 0,4,8,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,1,0 -.long 0 -.size dword_le_load,.-dword_le_load - -.globl SHA3_absorb -.type SHA3_absorb,@function -.type SHA3_absorb,@function -.align 5 -SHA3_absorb: -.localentry SHA3_absorb,0 - - stdu 1,-272(1) - mflr 0 - std 14,128(1) - std 15,136(1) - std 16,144(1) - std 17,152(1) - std 18,160(1) - std 19,168(1) - std 20,176(1) - std 21,184(1) - std 22,192(1) - std 23,200(1) - std 24,208(1) - std 25,216(1) - std 26,224(1) - std 27,232(1) - std 28,240(1) - std 29,248(1) - std 30,256(1) - std 31,264(1) - std 0,288(1) - - bl PICmeup - subi 4,4,1 - subi 12,12,8 - - std 3,48(1) - std 4,56(1) - std 5,64(1) - std 6,72(1) - mr 0,6 - std 12,80(1) - - ld 7,0(3) - ld 8,8(3) - ld 9,16(3) - ld 10,24(3) - ld 11,32(3) - ld 12,40(3) - ld 6,48(3) - ld 14,56(3) - ld 15,64(3) - ld 16,72(3) - ld 17,80(3) - ld 18,88(3) - ld 19,96(3) - ld 20,104(3) - ld 21,112(3) - ld 22,120(3) - ld 23,128(3) - ld 24,136(3) - ld 25,144(3) - ld 26,152(3) - ld 27,160(3) - ld 28,168(3) - ld 29,176(3) - ld 30,184(3) - ld 31,192(3) - - mr 3,4 - mr 4,5 - mr 5,0 - - b .Loop_absorb - -.align 4 -.Loop_absorb: - cmpld 4,5 - blt .Labsorbed - - sub 4,4,5 - srwi 5,5,3 - std 4,64(1) - mtctr 5 - bl dword_le_load - xor 7,7,0 - bdz .Lprocess_block - bl dword_le_load - xor 8,8,0 - bdz .Lprocess_block - bl dword_le_load - xor 9,9,0 - bdz .Lprocess_block - bl dword_le_load - xor 10,10,0 - bdz .Lprocess_block - bl dword_le_load - xor 11,11,0 - bdz .Lprocess_block - bl dword_le_load - xor 12,12,0 - bdz .Lprocess_block - bl dword_le_load - xor 6,6,0 - bdz .Lprocess_block - bl dword_le_load - xor 14,14,0 - bdz .Lprocess_block - bl dword_le_load - xor 15,15,0 - bdz .Lprocess_block - bl dword_le_load - xor 16,16,0 - bdz .Lprocess_block - bl dword_le_load - xor 17,17,0 - bdz .Lprocess_block - bl dword_le_load - xor 18,18,0 - bdz .Lprocess_block - bl dword_le_load - xor 19,19,0 - bdz .Lprocess_block - bl dword_le_load - xor 20,20,0 - bdz .Lprocess_block - bl dword_le_load - xor 21,21,0 - bdz .Lprocess_block - bl dword_le_load - xor 22,22,0 - bdz .Lprocess_block - bl dword_le_load - xor 23,23,0 - bdz .Lprocess_block - bl dword_le_load - xor 24,24,0 - bdz .Lprocess_block - bl dword_le_load - xor 25,25,0 - bdz .Lprocess_block - bl dword_le_load - xor 26,26,0 - bdz .Lprocess_block - bl dword_le_load - xor 27,27,0 - bdz .Lprocess_block - bl dword_le_load - xor 28,28,0 - bdz .Lprocess_block - bl dword_le_load - xor 29,29,0 - bdz .Lprocess_block - bl dword_le_load - xor 30,30,0 - bdz .Lprocess_block - bl dword_le_load - xor 31,31,0 - -.Lprocess_block: - std 3,56(1) - - bl KeccakF1600_int - - ld 0,80(1) - ld 5,72(1) - ld 4,64(1) - ld 3,56(1) - addic 0,0,-192 - std 0,80(1) - - b .Loop_absorb - -.align 4 -.Labsorbed: - ld 3,48(1) - std 7,0(3) - std 8,8(3) - std 9,16(3) - std 10,24(3) - std 11,32(3) - std 12,40(3) - std 6,48(3) - std 14,56(3) - std 15,64(3) - std 16,72(3) - std 17,80(3) - std 18,88(3) - std 19,96(3) - std 20,104(3) - std 21,112(3) - std 22,120(3) - std 23,128(3) - std 24,136(3) - std 25,144(3) - std 26,152(3) - std 27,160(3) - std 28,168(3) - std 29,176(3) - std 30,184(3) - std 31,192(3) - - mr 3,4 - ld 0,288(1) - ld 14,128(1) - ld 15,136(1) - ld 16,144(1) - ld 17,152(1) - ld 18,160(1) - ld 19,168(1) - ld 20,176(1) - ld 21,184(1) - ld 22,192(1) - ld 23,200(1) - ld 24,208(1) - ld 25,216(1) - ld 26,224(1) - ld 27,232(1) - ld 28,240(1) - ld 29,248(1) - ld 30,256(1) - ld 31,264(1) - mtlr 0 - addi 1,1,272 - blr -.long 0 -.byte 0,12,4,1,0x80,18,4,0 -.long 0 -.size SHA3_absorb,.-SHA3_absorb -.globl SHA3_squeeze -.type SHA3_squeeze,@function -.type SHA3_squeeze,@function -.align 5 -SHA3_squeeze: -.localentry SHA3_squeeze,0 - - stdu 1,-80(1) - mflr 0 - std 28,48(1) - std 29,56(1) - std 30,64(1) - std 31,72(1) - std 0,96(1) - - mr 28,3 - subi 3,3,8 - subi 29,4,1 - mr 30,5 - mr 31,6 - b .Loop_squeeze - -.align 4 -.Loop_squeeze: - ldu 0,8(3) - cmpldi 30,8 - blt .Lsqueeze_tail - - stbu 0,1(29) - srdi 0,0,8 - stbu 0,1(29) - srdi 0,0,8 - stbu 0,1(29) - srdi 0,0,8 - stbu 0,1(29) - srdi 0,0,8 - stbu 0,1(29) - srdi 0,0,8 - stbu 0,1(29) - srdi 0,0,8 - stbu 0,1(29) - srdi 0,0,8 - stbu 0,1(29) - - subic. 30,30,8 - beq .Lsqueeze_done - - subic. 6,6,8 - bgt .Loop_squeeze - - mr 3,28 - bl KeccakF1600 - subi 3,28,8 - mr 6,31 - b .Loop_squeeze - -.align 4 -.Lsqueeze_tail: - mtctr 30 -.Loop_tail: - stbu 0,1(29) - srdi 0,0,8 - bdnz .Loop_tail - -.Lsqueeze_done: - ld 0,96(1) - ld 28,48(1) - ld 29,56(1) - ld 30,64(1) - ld 31,72(1) - mtlr 0 - addi 1,1,80 - blr -.long 0 -.byte 0,12,4,1,0x80,4,4,0 -.long 0 -.size SHA3_squeeze,.-SHA3_squeeze -.align 6 -PICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 12 - addi 12,12,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.type iotas,@object -iotas: -.long 0x00000001,0x00000000 -.long 0x00008082,0x00000000 -.long 0x0000808a,0x80000000 -.long 0x80008000,0x80000000 -.long 0x0000808b,0x00000000 -.long 0x80000001,0x00000000 -.long 0x80008081,0x80000000 -.long 0x00008009,0x80000000 -.long 0x0000008a,0x00000000 -.long 0x00000088,0x00000000 -.long 0x80008009,0x00000000 -.long 0x8000000a,0x00000000 -.long 0x8000808b,0x00000000 -.long 0x0000008b,0x80000000 -.long 0x00008089,0x80000000 -.long 0x00008003,0x80000000 -.long 0x00008002,0x80000000 -.long 0x00000080,0x80000000 -.long 0x0000800a,0x00000000 -.long 0x8000000a,0x80000000 -.long 0x80008081,0x80000000 -.long 0x00008080,0x80000000 -.long 0x80000001,0x00000000 -.long 0x80008008,0x80000000 -.size iotas,.-iotas -.byte 75,101,99,99,97,107,45,49,54,48,48,32,97,98,115,111,114,98,32,97,110,100,32,115,113,117,101,101,122,101,32,102,111,114,32,80,80,67,54,52,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 diff --git a/sys/crypto/openssl/powerpc64le/poly1305-ppc.S b/sys/crypto/openssl/powerpc64le/poly1305-ppc.S deleted file mode 100644 index 7ffdb4a3d39..00000000000 --- a/sys/crypto/openssl/powerpc64le/poly1305-ppc.S +++ /dev/null @@ -1,162 +0,0 @@ -/* Do not modify. This file is auto-generated from poly1305-ppc.pl. */ -.machine "any" -.abiversion 2 -.text -.globl poly1305_init_int -.type poly1305_init_int,@function -.align 4 -poly1305_init_int: -.localentry poly1305_init_int,0 - - xor 0,0,0 - std 0,0(3) - std 0,8(3) - std 0,16(3) - - cmpld 4,0 - beq- .Lno_key - ld 10,0(4) - ld 11,8(4) - lis 8,0xfff - ori 8,8,0xfffc - insrdi 8,8,32,0 - ori 7,8,3 - - and 10,10,7 - and 11,11,8 - - std 10,32(3) - std 11,40(3) - -.Lno_key: - xor 3,3,3 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.size poly1305_init_int,.-poly1305_init_int - -.globl poly1305_blocks -.type poly1305_blocks,@function -.align 4 -poly1305_blocks: -.localentry poly1305_blocks,0 - - srdi. 5,5,4 - beq- .Labort - - stdu 1,-192(1) - mflr 0 - std 27,152(1) - std 28,160(1) - std 29,168(1) - std 30,176(1) - std 31,184(1) - std 0,208(1) - - ld 27,32(3) - ld 28,40(3) - - ld 7,0(3) - ld 8,8(3) - ld 9,16(3) - - srdi 29,28,2 - mtctr 5 - add 29,29,28 - li 0,3 - b .Loop - -.align 4 -.Loop: - ld 30,0(4) - ld 31,8(4) - addi 4,4,16 - - addc 7,7,30 - adde 8,8,31 - - mulld 10,7,27 - mulhdu 11,7,27 - adde 9,9,6 - - mulld 30,8,29 - mulhdu 31,8,29 - addc 10,10,30 - adde 11,11,31 - - mulld 30,7,28 - mulhdu 12,7,28 - addc 11,11,30 - addze 12,12 - - mulld 30,8,27 - mulhdu 31,8,27 - addc 11,11,30 - adde 12,12,31 - - mulld 30,9,29 - mulld 31,9,27 - addc 11,11,30 - adde 12,12,31 - - andc 30,12,0 - and 9,12,0 - srdi 31,30,2 - add 30,30,31 - addc 7,10,30 - addze 8,11 - addze 9,9 - - bdnz .Loop - - std 7,0(3) - std 8,8(3) - std 9,16(3) - - ld 27,152(1) - ld 28,160(1) - ld 29,168(1) - ld 30,176(1) - ld 31,184(1) - addi 1,1,192 -.Labort: - blr -.long 0 -.byte 0,12,4,1,0x80,5,4,0 -.size poly1305_blocks,.-poly1305_blocks - -.globl poly1305_emit -.type poly1305_emit,@function -.align 4 -poly1305_emit: -.localentry poly1305_emit,0 - - ld 7,0(3) - ld 8,8(3) - ld 9,16(3) - ld 6,0(5) - ld 5,8(5) - - addic 10,7,5 - addze 11,8 - addze 12,9 - - srdi 0,12,2 - neg 0,0 - - andc 7,7,0 - and 10,10,0 - andc 8,8,0 - and 11,11,0 - or 7,7,10 - or 8,8,11 - addc 7,7,6 - adde 8,8,5 - std 7,0(4) - std 8,8(4) - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.size poly1305_emit,.-poly1305_emit -.byte 80,111,108,121,49,51,48,53,32,102,111,114,32,80,80,67,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 diff --git a/sys/crypto/openssl/powerpc64le/poly1305-ppcfp.S b/sys/crypto/openssl/powerpc64le/poly1305-ppcfp.S deleted file mode 100644 index b55fd07fea7..00000000000 --- a/sys/crypto/openssl/powerpc64le/poly1305-ppcfp.S +++ /dev/null @@ -1,591 +0,0 @@ -/* Do not modify. This file is auto-generated from poly1305-ppcfp.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl poly1305_init_fpu -.type poly1305_init_fpu,@function -.align 6 -poly1305_init_fpu: -.localentry poly1305_init_fpu,0 - - stdu 1,-48(1) - mflr 6 - std 6,64(1) - - bl .LPICmeup - - xor 0,0,0 - mtlr 6 - - lfd 8,8*0(5) - lfd 9,8*1(5) - lfd 10,8*2(5) - lfd 11,8*3(5) - lfd 12,8*4(5) - lfd 13,8*5(5) - - stfd 8,8*0(3) - stfd 9,8*1(3) - stfd 10,8*2(3) - stfd 11,8*3(3) - - cmpld 4,0 - beq- .Lno_key - - lfd 6,8*13(5) - mffs 7 - - stfd 8,8*4(3) - stfd 9,8*5(3) - stfd 10,8*6(3) - stfd 11,8*7(3) - - li 8,4 - li 9,8 - li 10,12 - lwzx 7,0,4 - lwzx 8,8,4 - lwzx 9,9,4 - lwzx 10,10,4 - - lis 11,0xf000 - ori 12,11,3 - andc 7,7,11 - andc 8,8,12 - andc 9,9,12 - andc 10,10,12 - - stw 7,32(3) - stw 8,40(3) - stw 9,48(3) - stw 10,56(3) - - mtfsf 255,6 - stfd 8,8*18(3) - stfd 9,8*19(3) - stfd 10,8*20(3) - stfd 11,8*21(3) - stfd 12,8*22(3) - stfd 13,8*23(3) - - lfd 0,8*4(3) - lfd 2,8*5(3) - lfd 4,8*6(3) - lfd 6,8*7(3) - - fsub 0,0,8 - fsub 2,2,9 - fsub 4,4,10 - fsub 6,6,11 - - lfd 8,8*6(5) - lfd 9,8*7(5) - lfd 10,8*8(5) - lfd 11,8*9(5) - - fmul 3,2,13 - fmul 5,4,13 - stfd 7,8*15(3) - fmul 7,6,13 - - fadd 1,0,8 - stfd 3,8*12(3) - fadd 3,2,9 - stfd 5,8*13(3) - fadd 5,4,10 - stfd 7,8*14(3) - fadd 7,6,11 - - fsub 1,1,8 - fsub 3,3,9 - fsub 5,5,10 - fsub 7,7,11 - - lfd 8,8*10(5) - lfd 9,8*11(5) - lfd 10,8*12(5) - - fsub 0,0,1 - fsub 2,2,3 - fsub 4,4,5 - fsub 6,6,7 - - stfd 1,8*5(3) - stfd 3,8*7(3) - stfd 5,8*9(3) - stfd 7,8*11(3) - - stfd 0,8*4(3) - stfd 2,8*6(3) - stfd 4,8*8(3) - stfd 6,8*10(3) - - lfd 2,8*12(3) - lfd 4,8*13(3) - lfd 6,8*14(3) - lfd 0,8*15(3) - - fadd 3,2,8 - fadd 5,4,9 - fadd 7,6,10 - - fsub 3,3,8 - fsub 5,5,9 - fsub 7,7,10 - - fsub 2,2,3 - fsub 4,4,5 - fsub 6,6,7 - - stfd 3,8*13(3) - stfd 5,8*15(3) - stfd 7,8*17(3) - - stfd 2,8*12(3) - stfd 4,8*14(3) - stfd 6,8*16(3) - - mtfsf 255,0 -.Lno_key: - xor 3,3,3 - addi 1,1,48 - blr -.long 0 -.byte 0,12,4,1,0x80,0,2,0 -.size poly1305_init_fpu,.-poly1305_init_fpu - -.globl poly1305_blocks_fpu -.type poly1305_blocks_fpu,@function -.align 4 -poly1305_blocks_fpu: -.localentry poly1305_blocks_fpu,0 - - srwi. 5,5,4 - beq- .Labort - - stdu 1,-240(1) - mflr 0 - stfd 14,96(1) - stfd 15,104(1) - stfd 16,112(1) - stfd 17,120(1) - stfd 18,128(1) - stfd 19,136(1) - stfd 20,144(1) - stfd 21,152(1) - stfd 22,160(1) - stfd 23,168(1) - stfd 24,176(1) - stfd 25,184(1) - stfd 26,192(1) - stfd 27,200(1) - stfd 28,208(1) - stfd 29,216(1) - stfd 30,224(1) - stfd 31,232(1) - std 0,256(1) - - xor 0,0,0 - li 10,1 - mtctr 5 - neg 5,5 - stw 0,84(1) - stw 10,80(1) - - lfd 8,8*18(3) - lfd 9,8*19(3) - lfd 10,8*20(3) - lfd 11,8*21(3) - lfd 12,8*22(3) - lfd 13,8*23(3) - - lfd 0,8*0(3) - lfd 2,8*1(3) - lfd 4,8*2(3) - lfd 6,8*3(3) - - stfd 8,48(1) - oris 10,6,18736 - stfd 9,56(1) - stfd 10,64(1) - stw 10,76(1) - - li 11,4 - li 12,8 - li 6,12 - lwzx 7,0,4 - lwzx 8,11,4 - lwzx 9,12,4 - lwzx 10,6,4 - addi 4,4,16 - - stw 7,48(1) - stw 8,56(1) - stw 9,64(1) - stw 10,72(1) - - mffs 28 - lfd 29,80(1) - lfd 14,8*4(3) - lfd 15,8*5(3) - lfd 16,8*6(3) - lfd 17,8*7(3) - lfd 18,8*8(3) - lfd 19,8*9(3) - lfd 24,8*10(3) - lfd 25,8*11(3) - lfd 26,8*12(3) - lfd 27,8*13(3) - lfd 20,8*14(3) - lfd 21,8*15(3) - lfd 22,8*16(3) - lfd 23,8*17(3) - - stfd 28,80(1) - mtfsf 255,29 - - addic 5,5,1 - addze 0,0 - slwi. 0,0,4 - sub 4,4,0 - - lfd 28,48(1) - lfd 29,56(1) - lfd 30,64(1) - lfd 31,72(1) - - fsub 0,0,8 - lwzx 7,0,4 - fsub 2,2,9 - lwzx 8,11,4 - fsub 4,4,10 - lwzx 9,12,4 - fsub 6,6,11 - lwzx 10,6,4 - - fsub 28,28,8 - addi 4,4,16 - fsub 29,29,9 - fsub 30,30,10 - fsub 31,31,11 - - fadd 28,28,0 - stw 7,48(1) - fadd 29,29,2 - stw 8,56(1) - fadd 30,30,4 - stw 9,64(1) - fadd 31,31,6 - stw 10,72(1) - - b .Lentry - -.align 4 -.Loop: - fsub 30,30,8 - addic 5,5,1 - fsub 31,31,9 - addze 0,0 - fsub 26,26,10 - slwi. 0,0,4 - fsub 27,27,11 - sub 4,4,0 - - fadd 0,0,30 - fadd 1,1,31 - fadd 4,4,26 - fadd 5,5,27 - - - fadd 26,2,10 - lwzx 7,0,4 - fadd 27,3,10 - lwzx 8,11,4 - fadd 30,6,12 - lwzx 9,12,4 - fadd 31,7,12 - lwzx 10,6,4 - fadd 24,0,9 - addi 4,4,16 - fadd 25,1,9 - fadd 28,4,11 - fadd 29,5,11 - - fsub 26,26,10 - stw 7,48(1) - fsub 27,27,10 - stw 8,56(1) - fsub 30,30,12 - stw 9,64(1) - fsub 31,31,12 - stw 10,72(1) - fsub 24,24,9 - fsub 25,25,9 - fsub 28,28,11 - fsub 29,29,11 - - fsub 2,2,26 - fsub 3,3,27 - fsub 6,6,30 - fsub 7,7,31 - fsub 4,4,28 - fsub 5,5,29 - fsub 0,0,24 - fsub 1,1,25 - - fadd 2,2,24 - fadd 3,3,25 - fadd 6,6,28 - fadd 7,7,29 - fadd 4,4,26 - fadd 5,5,27 - fmadd 0,30,13,0 - fmadd 1,31,13,1 - - fadd 29,2,3 - lfd 26,8*12(3) - fadd 31,6,7 - lfd 27,8*13(3) - fadd 30,4,5 - lfd 24,8*10(3) - fadd 28,0,1 - lfd 25,8*11(3) -.Lentry: - fmul 0,22,29 - fmul 1,23,29 - fmul 4,16,29 - fmul 5,17,29 - fmul 2,14,29 - fmul 3,15,29 - fmul 6,18,29 - fmul 7,19,29 - - fmadd 0,26,31,0 - fmadd 1,27,31,1 - fmadd 4,22,31,4 - fmadd 5,23,31,5 - fmadd 2,20,31,2 - fmadd 3,21,31,3 - fmadd 6,14,31,6 - fmadd 7,15,31,7 - - fmadd 0,20,30,0 - fmadd 1,21,30,1 - fmadd 4,14,30,4 - fmadd 5,15,30,5 - fmadd 2,22,30,2 - fmadd 3,23,30,3 - fmadd 6,16,30,6 - fmadd 7,17,30,7 - - fmadd 0,14,28,0 - lfd 30,48(1) - fmadd 1,15,28,1 - lfd 31,56(1) - fmadd 4,18,28,4 - lfd 26,64(1) - fmadd 5,19,28,5 - lfd 27,72(1) - fmadd 2,16,28,2 - fmadd 3,17,28,3 - fmadd 6,24,28,6 - fmadd 7,25,28,7 - - bdnz .Loop - - - fadd 24,0,9 - fadd 25,1,9 - fadd 28,4,11 - fadd 29,5,11 - fadd 26,2,10 - fadd 27,3,10 - fadd 30,6,12 - fadd 31,7,12 - - fsub 24,24,9 - fsub 25,25,9 - fsub 28,28,11 - fsub 29,29,11 - fsub 26,26,10 - fsub 27,27,10 - fsub 30,30,12 - fsub 31,31,12 - - fsub 2,2,26 - fsub 3,3,27 - fsub 6,6,30 - fsub 7,7,31 - fsub 4,4,28 - fsub 5,5,29 - fsub 0,0,24 - fsub 1,1,25 - - fadd 2,2,24 - fadd 3,3,25 - fadd 6,6,28 - fadd 7,7,29 - fadd 4,4,26 - fadd 5,5,27 - fmadd 0,30,13,0 - fmadd 1,31,13,1 - - fadd 29,2,3 - fadd 31,6,7 - fadd 30,4,5 - fadd 28,0,1 - - lfd 0,80(1) - fadd 29,29,9 - fadd 31,31,11 - fadd 30,30,10 - fadd 28,28,8 - - stfd 29,8*1(3) - stfd 31,8*3(3) - stfd 30,8*2(3) - stfd 28,8*0(3) - - mtfsf 255,0 - lfd 14,96(1) - lfd 15,104(1) - lfd 16,112(1) - lfd 17,120(1) - lfd 18,128(1) - lfd 19,136(1) - lfd 20,144(1) - lfd 21,152(1) - lfd 22,160(1) - lfd 23,168(1) - lfd 24,176(1) - lfd 25,184(1) - lfd 26,192(1) - lfd 27,200(1) - lfd 28,208(1) - lfd 29,216(1) - lfd 30,224(1) - lfd 31,232(1) - addi 1,1,240 -.Labort: - blr -.long 0 -.byte 0,12,4,1,0x80,0,4,0 -.size poly1305_blocks_fpu,.-poly1305_blocks_fpu -.globl poly1305_emit_fpu -.type poly1305_emit_fpu,@function -.align 4 -poly1305_emit_fpu: -.localentry poly1305_emit_fpu,0 - - stdu 1,-80(1) - mflr 0 - std 28,48(1) - std 29,56(1) - std 30,64(1) - std 31,72(1) - std 0,96(1) - - lwz 28,4(3) - lwz 7,0(3) - lwz 29,12(3) - lwz 8,8(3) - lwz 30,20(3) - lwz 9,16(3) - lwz 31,28(3) - lwz 10,24(3) - - lis 0,0xfff0 - andc 28,28,0 - andc 29,29,0 - andc 30,30,0 - andc 31,31,0 - li 0,3 - - srwi 6,31,2 - and 11,31,0 - andc 31,31,0 - add 31,31,6 - add 7,7,31 - add 8,8,28 - add 9,9,29 - add 10,10,30 - - srdi 28,7,32 - add 8,8,28 - srdi 29,8,32 - add 9,9,29 - srdi 30,9,32 - add 10,10,30 - srdi 31,10,32 - add 11,11,31 - - insrdi 7,8,32,0 - insrdi 9,10,32,0 - - addic 28,7,5 - addze 29,9 - addze 30,11 - - srdi 0,30,2 - neg 0,0 - sradi 0,0,63 - ld 30,0(5) - ld 31,8(5) - - andc 7,7,0 - and 28,28,0 - andc 9,9,0 - and 29,29,0 - or 7,7,28 - or 9,9,29 - addc 7,7,30 - adde 9,9,31 - - srdi 8,7,32 - srdi 10,9,32 - stw 7,0(4) - stw 8,4(4) - stw 9,8(4) - stw 10,12(4) - ld 28,48(1) - ld 29,56(1) - ld 30,64(1) - ld 31,72(1) - addi 1,1,80 - blr -.long 0 -.byte 0,12,4,1,0x80,4,3,0 -.size poly1305_emit_fpu,.-poly1305_emit_fpu -.align 6 -.LPICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 5 - addi 5,5,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 - -.long 0x00000000,0x43300000 -.long 0x00000000,0x45300000 -.long 0x00000000,0x47300000 -.long 0x00000000,0x49300000 -.long 0x00000000,0x4b500000 - -.long 0x00000000,0x37f40000 - -.long 0x00000000,0x44300000 -.long 0x00000000,0x46300000 -.long 0x00000000,0x48300000 -.long 0x00000000,0x4a300000 -.long 0x00000000,0x3e300000 -.long 0x00000000,0x40300000 -.long 0x00000000,0x42300000 - -.long 0x00000001,0x00000000 -.byte 80,111,108,121,49,51,48,53,32,102,111,114,32,80,80,67,32,70,80,85,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 4 diff --git a/sys/crypto/openssl/powerpc64le/ppc-mont.S b/sys/crypto/openssl/powerpc64le/ppc-mont.S deleted file mode 100644 index 2bf6aa9b222..00000000000 --- a/sys/crypto/openssl/powerpc64le/ppc-mont.S +++ /dev/null @@ -1,1790 +0,0 @@ -/* Do not modify. This file is auto-generated from ppc-mont.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl bn_mul_mont_int -.type bn_mul_mont_int,@function -.align 5 -bn_mul_mont_int: -.localentry bn_mul_mont_int,0 - - mr 9,3 - li 3,0 - slwi 8,8,3 - li 12,-4096 - addi 3,8,352 - subf 3,3,1 - and 3,3,12 - subf 3,1,3 - mr 12,1 - srwi 8,8,3 - stdux 1,1,3 - - std 20,-96(12) - std 21,-88(12) - std 22,-80(12) - std 23,-72(12) - std 24,-64(12) - std 25,-56(12) - std 26,-48(12) - std 27,-40(12) - std 28,-32(12) - std 29,-24(12) - std 30,-16(12) - std 31,-8(12) - - ld 7,0(7) - addi 8,8,-2 - - ld 23,0(5) - ld 10,0(4) - addi 22,1,64 - mulld 25,10,23 - mulhdu 26,10,23 - - ld 10,8(4) - ld 11,0(6) - - mulld 24,25,7 - - mulld 29,10,23 - mulhdu 30,10,23 - - mulld 27,11,24 - mulhdu 28,11,24 - ld 11,8(6) - addc 27,27,25 - addze 28,28 - - mulld 31,11,24 - mulhdu 0,11,24 - - mtctr 8 - li 21,16 -.align 4 -.L1st: - ldx 10,4,21 - addc 25,29,26 - ldx 11,6,21 - addze 26,30 - mulld 29,10,23 - addc 27,31,28 - mulhdu 30,10,23 - addze 28,0 - mulld 31,11,24 - addc 27,27,25 - mulhdu 0,11,24 - addze 28,28 - std 27,0(22) - - addi 21,21,8 - addi 22,22,8 - bdnz .L1st - - addc 25,29,26 - addze 26,30 - - addc 27,31,28 - addze 28,0 - addc 27,27,25 - addze 28,28 - std 27,0(22) - - li 3,0 - addc 28,28,26 - addze 3,3 - std 28,8(22) - - li 20,8 -.align 4 -.Louter: - ldx 23,5,20 - ld 10,0(4) - addi 22,1,64 - ld 12,64(1) - mulld 25,10,23 - mulhdu 26,10,23 - ld 10,8(4) - ld 11,0(6) - addc 25,25,12 - mulld 29,10,23 - addze 26,26 - mulld 24,25,7 - mulhdu 30,10,23 - mulld 27,11,24 - mulhdu 28,11,24 - ld 11,8(6) - addc 27,27,25 - mulld 31,11,24 - addze 28,28 - mulhdu 0,11,24 - - mtctr 8 - li 21,16 -.align 4 -.Linner: - ldx 10,4,21 - addc 25,29,26 - ld 12,8(22) - addze 26,30 - ldx 11,6,21 - addc 27,31,28 - mulld 29,10,23 - addze 28,0 - mulhdu 30,10,23 - addc 25,25,12 - mulld 31,11,24 - addze 26,26 - mulhdu 0,11,24 - addc 27,27,25 - addi 21,21,8 - addze 28,28 - std 27,0(22) - addi 22,22,8 - bdnz .Linner - - ld 12,8(22) - addc 25,29,26 - addze 26,30 - addc 25,25,12 - addze 26,26 - - addc 27,31,28 - addze 28,0 - addc 27,27,25 - addze 28,28 - std 27,0(22) - - addic 3,3,-1 - li 3,0 - adde 28,28,26 - addze 3,3 - std 28,8(22) - - slwi 12,8,3 - cmpld 20,12 - addi 20,20,8 - ble .Louter - - addi 8,8,2 - subfc 21,21,21 - addi 22,1,64 - mtctr 8 - -.align 4 -.Lsub: ldx 12,22,21 - ldx 11,6,21 - subfe 10,11,12 - stdx 10,9,21 - addi 21,21,8 - bdnz .Lsub - - li 21,0 - mtctr 8 - subfe 3,21,3 - -.align 4 -.Lcopy: - ldx 12,22,21 - ldx 10,9,21 - and 12,12,3 - andc 10,10,3 - stdx 21,22,21 - or 10,10,12 - stdx 10,9,21 - addi 21,21,8 - bdnz .Lcopy - - ld 12,0(1) - li 3,1 - ld 20,-96(12) - ld 21,-88(12) - ld 22,-80(12) - ld 23,-72(12) - ld 24,-64(12) - ld 25,-56(12) - ld 26,-48(12) - ld 27,-40(12) - ld 28,-32(12) - ld 29,-24(12) - ld 30,-16(12) - ld 31,-8(12) - mr 1,12 - blr -.long 0 -.byte 0,12,4,0,0x80,12,6,0 -.long 0 -.size bn_mul_mont_int,.-bn_mul_mont_int -.globl bn_mul4x_mont_int -.type bn_mul4x_mont_int,@function -.align 5 -bn_mul4x_mont_int: -.localentry bn_mul4x_mont_int,0 - - andi. 0,8,7 - bne .Lmul4x_do - cmpld 4,5 - bne .Lmul4x_do - b .Lsqr8x_do -.Lmul4x_do: - slwi 8,8,3 - mr 9,1 - li 10,-32*8 - sub 10,10,8 - stdux 1,1,10 - - std 14,-8*18(9) - std 15,-8*17(9) - std 16,-8*16(9) - std 17,-8*15(9) - std 18,-8*14(9) - std 19,-8*13(9) - std 20,-8*12(9) - std 21,-8*11(9) - std 22,-8*10(9) - std 23,-8*9(9) - std 24,-8*8(9) - std 25,-8*7(9) - std 26,-8*6(9) - std 27,-8*5(9) - std 28,-8*4(9) - std 29,-8*3(9) - std 30,-8*2(9) - std 31,-8*1(9) - - subi 4,4,8 - subi 6,6,8 - subi 3,3,8 - ld 7,0(7) - - add 14,5,8 - add 30,4,8 - subi 14,14,8*4 - - ld 27,8*0(5) - li 22,0 - ld 9,8*1(4) - li 23,0 - ld 10,8*2(4) - li 24,0 - ld 11,8*3(4) - li 25,0 - ldu 12,8*4(4) - ld 18,8*1(6) - ld 19,8*2(6) - ld 20,8*3(6) - ldu 21,8*4(6) - - std 3,8*6(1) - std 14,8*7(1) - li 3,0 - addic 29,1,8*7 - li 31,0 - li 0,0 - b .Loop_mul4x_1st_reduction - -.align 5 -.Loop_mul4x_1st_reduction: - mulld 14,9,27 - addze 3,3 - mulld 15,10,27 - addi 31,31,8 - mulld 16,11,27 - andi. 31,31,8*4-1 - mulld 17,12,27 - addc 22,22,14 - mulhdu 14,9,27 - adde 23,23,15 - mulhdu 15,10,27 - adde 24,24,16 - mulld 28,22,7 - adde 25,25,17 - mulhdu 16,11,27 - addze 26,0 - mulhdu 17,12,27 - ldx 27,5,31 - addc 23,23,14 - - stdu 28,8(29) - adde 24,24,15 - mulld 15,19,28 - adde 25,25,16 - mulld 16,20,28 - adde 26,26,17 - mulld 17,21,28 - - - - - - - - - - - addic 22,22,-1 - mulhdu 14,18,28 - adde 22,23,15 - mulhdu 15,19,28 - adde 23,24,16 - mulhdu 16,20,28 - adde 24,25,17 - mulhdu 17,21,28 - adde 25,26,3 - addze 3,0 - addc 22,22,14 - adde 23,23,15 - adde 24,24,16 - adde 25,25,17 - - bne .Loop_mul4x_1st_reduction - - cmpld 30,4 - beq .Lmul4x4_post_condition - - ld 9,8*1(4) - ld 10,8*2(4) - ld 11,8*3(4) - ldu 12,8*4(4) - ld 28,8*8(1) - ld 18,8*1(6) - ld 19,8*2(6) - ld 20,8*3(6) - ldu 21,8*4(6) - b .Loop_mul4x_1st_tail - -.align 5 -.Loop_mul4x_1st_tail: - mulld 14,9,27 - addze 3,3 - mulld 15,10,27 - addi 31,31,8 - mulld 16,11,27 - andi. 31,31,8*4-1 - mulld 17,12,27 - addc 22,22,14 - mulhdu 14,9,27 - adde 23,23,15 - mulhdu 15,10,27 - adde 24,24,16 - mulhdu 16,11,27 - adde 25,25,17 - mulhdu 17,12,27 - addze 26,0 - ldx 27,5,31 - addc 23,23,14 - mulld 14,18,28 - adde 24,24,15 - mulld 15,19,28 - adde 25,25,16 - mulld 16,20,28 - adde 26,26,17 - mulld 17,21,28 - addc 22,22,14 - mulhdu 14,18,28 - adde 23,23,15 - mulhdu 15,19,28 - adde 24,24,16 - mulhdu 16,20,28 - adde 25,25,17 - adde 26,26,3 - mulhdu 17,21,28 - addze 3,0 - addi 28,1,8*8 - ldx 28,28,31 - stdu 22,8(29) - addc 22,23,14 - adde 23,24,15 - adde 24,25,16 - adde 25,26,17 - - bne .Loop_mul4x_1st_tail - - sub 15,30,8 - cmpld 30,4 - beq .Lmul4x_proceed - - ld 9,8*1(4) - ld 10,8*2(4) - ld 11,8*3(4) - ldu 12,8*4(4) - ld 18,8*1(6) - ld 19,8*2(6) - ld 20,8*3(6) - ldu 21,8*4(6) - b .Loop_mul4x_1st_tail - -.align 5 -.Lmul4x_proceed: - ldu 27,8*4(5) - addze 3,3 - ld 9,8*1(15) - ld 10,8*2(15) - ld 11,8*3(15) - ld 12,8*4(15) - addi 4,15,8*4 - sub 6,6,8 - - std 22,8*1(29) - std 23,8*2(29) - std 24,8*3(29) - std 25,8*4(29) - std 3,8*5(29) - ld 22,8*12(1) - ld 23,8*13(1) - ld 24,8*14(1) - ld 25,8*15(1) - - ld 18,8*1(6) - ld 19,8*2(6) - ld 20,8*3(6) - ldu 21,8*4(6) - addic 29,1,8*7 - li 3,0 - b .Loop_mul4x_reduction - -.align 5 -.Loop_mul4x_reduction: - mulld 14,9,27 - addze 3,3 - mulld 15,10,27 - addi 31,31,8 - mulld 16,11,27 - andi. 31,31,8*4-1 - mulld 17,12,27 - addc 22,22,14 - mulhdu 14,9,27 - adde 23,23,15 - mulhdu 15,10,27 - adde 24,24,16 - mulld 28,22,7 - adde 25,25,17 - mulhdu 16,11,27 - addze 26,0 - mulhdu 17,12,27 - ldx 27,5,31 - addc 23,23,14 - - stdu 28,8(29) - adde 24,24,15 - mulld 15,19,28 - adde 25,25,16 - mulld 16,20,28 - adde 26,26,17 - mulld 17,21,28 - - addic 22,22,-1 - mulhdu 14,18,28 - adde 22,23,15 - mulhdu 15,19,28 - adde 23,24,16 - mulhdu 16,20,28 - adde 24,25,17 - mulhdu 17,21,28 - adde 25,26,3 - addze 3,0 - addc 22,22,14 - adde 23,23,15 - adde 24,24,16 - adde 25,25,17 - - bne .Loop_mul4x_reduction - - ld 14,8*5(29) - addze 3,3 - ld 15,8*6(29) - ld 16,8*7(29) - ld 17,8*8(29) - ld 9,8*1(4) - ld 10,8*2(4) - ld 11,8*3(4) - ldu 12,8*4(4) - addc 22,22,14 - adde 23,23,15 - adde 24,24,16 - adde 25,25,17 - - - ld 28,8*8(1) - ld 18,8*1(6) - ld 19,8*2(6) - ld 20,8*3(6) - ldu 21,8*4(6) - b .Loop_mul4x_tail - -.align 5 -.Loop_mul4x_tail: - mulld 14,9,27 - addze 3,3 - mulld 15,10,27 - addi 31,31,8 - mulld 16,11,27 - andi. 31,31,8*4-1 - mulld 17,12,27 - addc 22,22,14 - mulhdu 14,9,27 - adde 23,23,15 - mulhdu 15,10,27 - adde 24,24,16 - mulhdu 16,11,27 - adde 25,25,17 - mulhdu 17,12,27 - addze 26,0 - ldx 27,5,31 - addc 23,23,14 - mulld 14,18,28 - adde 24,24,15 - mulld 15,19,28 - adde 25,25,16 - mulld 16,20,28 - adde 26,26,17 - mulld 17,21,28 - addc 22,22,14 - mulhdu 14,18,28 - adde 23,23,15 - mulhdu 15,19,28 - adde 24,24,16 - mulhdu 16,20,28 - adde 25,25,17 - mulhdu 17,21,28 - adde 26,26,3 - addi 28,1,8*8 - ldx 28,28,31 - addze 3,0 - stdu 22,8(29) - addc 22,23,14 - adde 23,24,15 - adde 24,25,16 - adde 25,26,17 - - bne .Loop_mul4x_tail - - ld 14,8*5(29) - sub 15,6,8 - addze 3,3 - cmpld 30,4 - beq .Loop_mul4x_break - - ld 15,8*6(29) - ld 16,8*7(29) - ld 17,8*8(29) - ld 9,8*1(4) - ld 10,8*2(4) - ld 11,8*3(4) - ldu 12,8*4(4) - addc 22,22,14 - adde 23,23,15 - adde 24,24,16 - adde 25,25,17 - - - ld 18,8*1(6) - ld 19,8*2(6) - ld 20,8*3(6) - ldu 21,8*4(6) - b .Loop_mul4x_tail - -.align 5 -.Loop_mul4x_break: - ld 16,8*6(1) - ld 17,8*7(1) - addc 9,22,14 - ld 22,8*12(1) - addze 10,23 - ld 23,8*13(1) - addze 11,24 - ld 24,8*14(1) - addze 12,25 - ld 25,8*15(1) - addze 3,3 - std 9,8*1(29) - sub 4,30,8 - std 10,8*2(29) - std 11,8*3(29) - std 12,8*4(29) - std 3,8*5(29) - - ld 18,8*1(15) - ld 19,8*2(15) - ld 20,8*3(15) - ld 21,8*4(15) - addi 6,15,8*4 - cmpld 5,17 - beq .Lmul4x_post - - ldu 27,8*4(5) - ld 9,8*1(4) - ld 10,8*2(4) - ld 11,8*3(4) - ldu 12,8*4(4) - li 3,0 - addic 29,1,8*7 - b .Loop_mul4x_reduction - -.align 5 -.Lmul4x_post: - - - - - srwi 31,8,5 - mr 5,16 - subi 31,31,1 - mr 30,16 - subfc 14,18,22 - addi 29,1,8*15 - subfe 15,19,23 - - mtctr 31 -.Lmul4x_sub: - ld 18,8*1(6) - ld 22,8*1(29) - subfe 16,20,24 - ld 19,8*2(6) - ld 23,8*2(29) - subfe 17,21,25 - ld 20,8*3(6) - ld 24,8*3(29) - ldu 21,8*4(6) - ldu 25,8*4(29) - std 14,8*1(5) - std 15,8*2(5) - subfe 14,18,22 - std 16,8*3(5) - stdu 17,8*4(5) - subfe 15,19,23 - bdnz .Lmul4x_sub - - ld 9,8*1(30) - std 14,8*1(5) - ld 14,8*12(1) - subfe 16,20,24 - ld 10,8*2(30) - std 15,8*2(5) - ld 15,8*13(1) - subfe 17,21,25 - subfe 3,0,3 - addi 29,1,8*12 - ld 11,8*3(30) - std 16,8*3(5) - ld 16,8*14(1) - ld 12,8*4(30) - std 17,8*4(5) - ld 17,8*15(1) - - mtctr 31 -.Lmul4x_cond_copy: - and 14,14,3 - andc 9,9,3 - std 0,8*0(29) - and 15,15,3 - andc 10,10,3 - std 0,8*1(29) - and 16,16,3 - andc 11,11,3 - std 0,8*2(29) - and 17,17,3 - andc 12,12,3 - std 0,8*3(29) - or 22,14,9 - ld 9,8*5(30) - ld 14,8*4(29) - or 23,15,10 - ld 10,8*6(30) - ld 15,8*5(29) - or 24,16,11 - ld 11,8*7(30) - ld 16,8*6(29) - or 25,17,12 - ld 12,8*8(30) - ld 17,8*7(29) - addi 29,29,8*4 - std 22,8*1(30) - std 23,8*2(30) - std 24,8*3(30) - stdu 25,8*4(30) - bdnz .Lmul4x_cond_copy - - ld 5,0(1) - and 14,14,3 - andc 9,9,3 - std 0,8*0(29) - and 15,15,3 - andc 10,10,3 - std 0,8*1(29) - and 16,16,3 - andc 11,11,3 - std 0,8*2(29) - and 17,17,3 - andc 12,12,3 - std 0,8*3(29) - or 22,14,9 - or 23,15,10 - std 0,8*4(29) - or 24,16,11 - or 25,17,12 - std 22,8*1(30) - std 23,8*2(30) - std 24,8*3(30) - std 25,8*4(30) - - b .Lmul4x_done - -.align 4 -.Lmul4x4_post_condition: - ld 4,8*6(1) - ld 5,0(1) - addze 3,3 - - subfc 9,18,22 - subfe 10,19,23 - subfe 11,20,24 - subfe 12,21,25 - subfe 3,0,3 - - and 18,18,3 - and 19,19,3 - addc 9,9,18 - and 20,20,3 - adde 10,10,19 - and 21,21,3 - adde 11,11,20 - adde 12,12,21 - - std 9,8*1(4) - std 10,8*2(4) - std 11,8*3(4) - std 12,8*4(4) - -.Lmul4x_done: - std 0,8*8(1) - std 0,8*9(1) - std 0,8*10(1) - std 0,8*11(1) - li 3,1 - ld 14,-8*18(5) - ld 15,-8*17(5) - ld 16,-8*16(5) - ld 17,-8*15(5) - ld 18,-8*14(5) - ld 19,-8*13(5) - ld 20,-8*12(5) - ld 21,-8*11(5) - ld 22,-8*10(5) - ld 23,-8*9(5) - ld 24,-8*8(5) - ld 25,-8*7(5) - ld 26,-8*6(5) - ld 27,-8*5(5) - ld 28,-8*4(5) - ld 29,-8*3(5) - ld 30,-8*2(5) - ld 31,-8*1(5) - mr 1,5 - blr -.long 0 -.byte 0,12,4,0x20,0x80,18,6,0 -.long 0 -.size bn_mul4x_mont_int,.-bn_mul4x_mont_int -.align 5 -__bn_sqr8x_mont: -.Lsqr8x_do: - mr 9,1 - slwi 10,8,4 - li 11,-32*8 - sub 10,11,10 - slwi 8,8,3 - stdux 1,1,10 - - std 14,-8*18(9) - std 15,-8*17(9) - std 16,-8*16(9) - std 17,-8*15(9) - std 18,-8*14(9) - std 19,-8*13(9) - std 20,-8*12(9) - std 21,-8*11(9) - std 22,-8*10(9) - std 23,-8*9(9) - std 24,-8*8(9) - std 25,-8*7(9) - std 26,-8*6(9) - std 27,-8*5(9) - std 28,-8*4(9) - std 29,-8*3(9) - std 30,-8*2(9) - std 31,-8*1(9) - - subi 4,4,8 - subi 18,6,8 - subi 3,3,8 - ld 7,0(7) - li 0,0 - - add 6,4,8 - ld 9,8*1(4) - - ld 10,8*2(4) - li 23,0 - ld 11,8*3(4) - li 24,0 - ld 12,8*4(4) - li 25,0 - ld 14,8*5(4) - li 26,0 - ld 15,8*6(4) - li 27,0 - ld 16,8*7(4) - li 28,0 - ldu 17,8*8(4) - li 29,0 - - addi 5,1,8*11 - subic. 30,8,8*8 - b .Lsqr8x_zero_start - -.align 5 -.Lsqr8x_zero: - subic. 30,30,8*8 - std 0,8*1(5) - std 0,8*2(5) - std 0,8*3(5) - std 0,8*4(5) - std 0,8*5(5) - std 0,8*6(5) - std 0,8*7(5) - std 0,8*8(5) -.Lsqr8x_zero_start: - std 0,8*9(5) - std 0,8*10(5) - std 0,8*11(5) - std 0,8*12(5) - std 0,8*13(5) - std 0,8*14(5) - std 0,8*15(5) - stdu 0,8*16(5) - bne .Lsqr8x_zero - - std 3,8*6(1) - std 18,8*7(1) - std 7,8*8(1) - std 5,8*9(1) - std 0,8*10(1) - addi 5,1,8*11 - - -.align 5 -.Lsqr8x_outer_loop: - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - mulld 18,10,9 - mulld 19,11,9 - mulld 20,12,9 - mulld 21,14,9 - addc 23,23,18 - mulld 18,15,9 - adde 24,24,19 - mulld 19,16,9 - adde 25,25,20 - mulld 20,17,9 - adde 26,26,21 - mulhdu 21,10,9 - adde 27,27,18 - mulhdu 18,11,9 - adde 28,28,19 - mulhdu 19,12,9 - adde 29,29,20 - mulhdu 20,14,9 - std 22,8*1(5) - addze 22,0 - std 23,8*2(5) - addc 24,24,21 - mulhdu 21,15,9 - adde 25,25,18 - mulhdu 18,16,9 - adde 26,26,19 - mulhdu 19,17,9 - adde 27,27,20 - mulld 20,11,10 - adde 28,28,21 - mulld 21,12,10 - adde 29,29,18 - mulld 18,14,10 - adde 22,22,19 - - mulld 19,15,10 - addc 25,25,20 - mulld 20,16,10 - adde 26,26,21 - mulld 21,17,10 - adde 27,27,18 - mulhdu 18,11,10 - adde 28,28,19 - mulhdu 19,12,10 - adde 29,29,20 - mulhdu 20,14,10 - adde 22,22,21 - mulhdu 21,15,10 - std 24,8*3(5) - addze 23,0 - std 25,8*4(5) - addc 26,26,18 - mulhdu 18,16,10 - adde 27,27,19 - mulhdu 19,17,10 - adde 28,28,20 - mulld 20,12,11 - adde 29,29,21 - mulld 21,14,11 - adde 22,22,18 - mulld 18,15,11 - adde 23,23,19 - - mulld 19,16,11 - addc 27,27,20 - mulld 20,17,11 - adde 28,28,21 - mulhdu 21,12,11 - adde 29,29,18 - mulhdu 18,14,11 - adde 22,22,19 - mulhdu 19,15,11 - adde 23,23,20 - mulhdu 20,16,11 - std 26,8*5(5) - addze 24,0 - std 27,8*6(5) - addc 28,28,21 - mulhdu 21,17,11 - adde 29,29,18 - mulld 18,14,12 - adde 22,22,19 - mulld 19,15,12 - adde 23,23,20 - mulld 20,16,12 - adde 24,24,21 - - mulld 21,17,12 - addc 29,29,18 - mulhdu 18,14,12 - adde 22,22,19 - mulhdu 19,15,12 - adde 23,23,20 - mulhdu 20,16,12 - adde 24,24,21 - mulhdu 21,17,12 - std 28,8*7(5) - addze 25,0 - stdu 29,8*8(5) - addc 22,22,18 - mulld 18,15,14 - adde 23,23,19 - mulld 19,16,14 - adde 24,24,20 - mulld 20,17,14 - adde 25,25,21 - - mulhdu 21,15,14 - addc 23,23,18 - mulhdu 18,16,14 - adde 24,24,19 - mulhdu 19,17,14 - adde 25,25,20 - mulld 20,16,15 - addze 26,0 - addc 24,24,21 - mulld 21,17,15 - adde 25,25,18 - mulhdu 18,16,15 - adde 26,26,19 - - mulhdu 19,17,15 - addc 25,25,20 - mulld 20,17,16 - adde 26,26,21 - mulhdu 21,17,16 - addze 27,0 - addc 26,26,18 - cmpld 6,4 - adde 27,27,19 - - addc 27,27,20 - sub 18,6,8 - addze 28,0 - add 28,28,21 - - beq .Lsqr8x_outer_break - - mr 7,9 - ld 9,8*1(5) - ld 10,8*2(5) - ld 11,8*3(5) - ld 12,8*4(5) - ld 14,8*5(5) - ld 15,8*6(5) - ld 16,8*7(5) - ld 17,8*8(5) - addc 22,22,9 - ld 9,8*1(4) - adde 23,23,10 - ld 10,8*2(4) - adde 24,24,11 - ld 11,8*3(4) - adde 25,25,12 - ld 12,8*4(4) - adde 26,26,14 - ld 14,8*5(4) - adde 27,27,15 - ld 15,8*6(4) - adde 28,28,16 - ld 16,8*7(4) - subi 3,4,8*7 - addze 29,17 - ldu 17,8*8(4) - - li 30,0 - b .Lsqr8x_mul - - - - - - - - - - - - - - - - - - - - - - - -.align 5 -.Lsqr8x_mul: - mulld 18,9,7 - addze 31,0 - mulld 19,10,7 - addi 30,30,8 - mulld 20,11,7 - andi. 30,30,8*8-1 - mulld 21,12,7 - addc 22,22,18 - mulld 18,14,7 - adde 23,23,19 - mulld 19,15,7 - adde 24,24,20 - mulld 20,16,7 - adde 25,25,21 - mulld 21,17,7 - adde 26,26,18 - mulhdu 18,9,7 - adde 27,27,19 - mulhdu 19,10,7 - adde 28,28,20 - mulhdu 20,11,7 - adde 29,29,21 - mulhdu 21,12,7 - addze 31,31 - stdu 22,8(5) - addc 22,23,18 - mulhdu 18,14,7 - adde 23,24,19 - mulhdu 19,15,7 - adde 24,25,20 - mulhdu 20,16,7 - adde 25,26,21 - mulhdu 21,17,7 - ldx 7,3,30 - adde 26,27,18 - adde 27,28,19 - adde 28,29,20 - adde 29,31,21 - - bne .Lsqr8x_mul - - - cmpld 4,6 - beq .Lsqr8x_break - - ld 9,8*1(5) - ld 10,8*2(5) - ld 11,8*3(5) - ld 12,8*4(5) - ld 14,8*5(5) - ld 15,8*6(5) - ld 16,8*7(5) - ld 17,8*8(5) - addc 22,22,9 - ld 9,8*1(4) - adde 23,23,10 - ld 10,8*2(4) - adde 24,24,11 - ld 11,8*3(4) - adde 25,25,12 - ld 12,8*4(4) - adde 26,26,14 - ld 14,8*5(4) - adde 27,27,15 - ld 15,8*6(4) - adde 28,28,16 - ld 16,8*7(4) - adde 29,29,17 - ldu 17,8*8(4) - - b .Lsqr8x_mul - -.align 5 -.Lsqr8x_break: - ld 9,8*8(3) - addi 4,3,8*15 - ld 10,8*9(3) - sub. 18,6,4 - ld 11,8*10(3) - sub 19,5,18 - ld 12,8*11(3) - ld 14,8*12(3) - ld 15,8*13(3) - ld 16,8*14(3) - ld 17,8*15(3) - beq .Lsqr8x_outer_loop - - std 22,8*1(5) - ld 22,8*1(19) - std 23,8*2(5) - ld 23,8*2(19) - std 24,8*3(5) - ld 24,8*3(19) - std 25,8*4(5) - ld 25,8*4(19) - std 26,8*5(5) - ld 26,8*5(19) - std 27,8*6(5) - ld 27,8*6(19) - std 28,8*7(5) - ld 28,8*7(19) - std 29,8*8(5) - ld 29,8*8(19) - mr 5,19 - b .Lsqr8x_outer_loop - -.align 5 -.Lsqr8x_outer_break: - - - ld 10,8*1(18) - ld 12,8*2(18) - ld 15,8*3(18) - ld 17,8*4(18) - addi 4,18,8*4 - - ld 19,8*13(1) - ld 20,8*14(1) - ld 21,8*15(1) - ld 18,8*16(1) - - std 22,8*1(5) - srwi 30,8,5 - std 23,8*2(5) - subi 30,30,1 - std 24,8*3(5) - std 25,8*4(5) - std 26,8*5(5) - std 27,8*6(5) - std 28,8*7(5) - - addi 5,1,8*11 - mulld 22,10,10 - mulhdu 10,10,10 - add 23,19,19 - srdi 19,19,64-1 - mulld 11,12,12 - mulhdu 12,12,12 - addc 23,23,10 - add 24,20,20 - srdi 20,20,64-1 - add 25,21,21 - srdi 21,21,64-1 - or 24,24,19 - - mtctr 30 -.Lsqr4x_shift_n_add: - mulld 14,15,15 - mulhdu 15,15,15 - ld 19,8*6(5) - ld 10,8*1(4) - adde 24,24,11 - add 26,18,18 - srdi 18,18,64-1 - or 25,25,20 - ld 20,8*7(5) - adde 25,25,12 - ld 12,8*2(4) - add 27,19,19 - srdi 19,19,64-1 - or 26,26,21 - ld 21,8*8(5) - mulld 16,17,17 - mulhdu 17,17,17 - adde 26,26,14 - add 28,20,20 - srdi 20,20,64-1 - or 27,27,18 - ld 18,8*9(5) - adde 27,27,15 - ld 15,8*3(4) - add 29,21,21 - srdi 21,21,64-1 - or 28,28,19 - ld 19,8*10(5) - mulld 9,10,10 - mulhdu 10,10,10 - adde 28,28,16 - std 22,8*1(5) - add 22,18,18 - srdi 18,18,64-1 - or 29,29,20 - ld 20,8*11(5) - adde 29,29,17 - ldu 17,8*4(4) - std 23,8*2(5) - add 23,19,19 - srdi 19,19,64-1 - or 22,22,21 - ld 21,8*12(5) - mulld 11,12,12 - mulhdu 12,12,12 - adde 22,22,9 - std 24,8*3(5) - add 24,20,20 - srdi 20,20,64-1 - or 23,23,18 - ld 18,8*13(5) - adde 23,23,10 - std 25,8*4(5) - std 26,8*5(5) - std 27,8*6(5) - std 28,8*7(5) - stdu 29,8*8(5) - add 25,21,21 - srdi 21,21,64-1 - or 24,24,19 - bdnz .Lsqr4x_shift_n_add - ld 4,8*7(1) - ld 7,8*8(1) - - mulld 14,15,15 - mulhdu 15,15,15 - std 22,8*1(5) - ld 22,8*12(1) - ld 19,8*6(5) - adde 24,24,11 - add 26,18,18 - srdi 18,18,64-1 - or 25,25,20 - ld 20,8*7(5) - adde 25,25,12 - add 27,19,19 - srdi 19,19,64-1 - or 26,26,21 - mulld 16,17,17 - mulhdu 17,17,17 - adde 26,26,14 - add 28,20,20 - srdi 20,20,64-1 - or 27,27,18 - std 23,8*2(5) - ld 23,8*13(1) - adde 27,27,15 - or 28,28,19 - ld 9,8*1(4) - ld 10,8*2(4) - adde 28,28,16 - ld 11,8*3(4) - ld 12,8*4(4) - adde 29,17,20 - ld 14,8*5(4) - ld 15,8*6(4) - - - - mulld 31,7,22 - li 30,8 - ld 16,8*7(4) - add 6,4,8 - ldu 17,8*8(4) - std 24,8*3(5) - ld 24,8*14(1) - std 25,8*4(5) - ld 25,8*15(1) - std 26,8*5(5) - ld 26,8*16(1) - std 27,8*6(5) - ld 27,8*17(1) - std 28,8*7(5) - ld 28,8*18(1) - std 29,8*8(5) - ld 29,8*19(1) - addi 5,1,8*11 - mtctr 30 - b .Lsqr8x_reduction - -.align 5 -.Lsqr8x_reduction: - - mulld 19,10,31 - mulld 20,11,31 - stdu 31,8(5) - mulld 21,12,31 - - addic 22,22,-1 - mulld 18,14,31 - adde 22,23,19 - mulld 19,15,31 - adde 23,24,20 - mulld 20,16,31 - adde 24,25,21 - mulld 21,17,31 - adde 25,26,18 - mulhdu 18,9,31 - adde 26,27,19 - mulhdu 19,10,31 - adde 27,28,20 - mulhdu 20,11,31 - adde 28,29,21 - mulhdu 21,12,31 - addze 29,0 - addc 22,22,18 - mulhdu 18,14,31 - adde 23,23,19 - mulhdu 19,15,31 - adde 24,24,20 - mulhdu 20,16,31 - adde 25,25,21 - mulhdu 21,17,31 - mulld 31,7,22 - adde 26,26,18 - adde 27,27,19 - adde 28,28,20 - adde 29,29,21 - bdnz .Lsqr8x_reduction - - ld 18,8*1(5) - ld 19,8*2(5) - ld 20,8*3(5) - ld 21,8*4(5) - subi 3,5,8*7 - cmpld 6,4 - addc 22,22,18 - ld 18,8*5(5) - adde 23,23,19 - ld 19,8*6(5) - adde 24,24,20 - ld 20,8*7(5) - adde 25,25,21 - ld 21,8*8(5) - adde 26,26,18 - adde 27,27,19 - adde 28,28,20 - adde 29,29,21 - - beq .Lsqr8x8_post_condition - - ld 7,8*0(3) - ld 9,8*1(4) - ld 10,8*2(4) - ld 11,8*3(4) - ld 12,8*4(4) - ld 14,8*5(4) - ld 15,8*6(4) - ld 16,8*7(4) - ldu 17,8*8(4) - li 30,0 - -.align 5 -.Lsqr8x_tail: - mulld 18,9,7 - addze 31,0 - mulld 19,10,7 - addi 30,30,8 - mulld 20,11,7 - andi. 30,30,8*8-1 - mulld 21,12,7 - addc 22,22,18 - mulld 18,14,7 - adde 23,23,19 - mulld 19,15,7 - adde 24,24,20 - mulld 20,16,7 - adde 25,25,21 - mulld 21,17,7 - adde 26,26,18 - mulhdu 18,9,7 - adde 27,27,19 - mulhdu 19,10,7 - adde 28,28,20 - mulhdu 20,11,7 - adde 29,29,21 - mulhdu 21,12,7 - addze 31,31 - stdu 22,8(5) - addc 22,23,18 - mulhdu 18,14,7 - adde 23,24,19 - mulhdu 19,15,7 - adde 24,25,20 - mulhdu 20,16,7 - adde 25,26,21 - mulhdu 21,17,7 - ldx 7,3,30 - adde 26,27,18 - adde 27,28,19 - adde 28,29,20 - adde 29,31,21 - - bne .Lsqr8x_tail - - - ld 9,8*1(5) - ld 31,8*10(1) - cmpld 6,4 - ld 10,8*2(5) - sub 20,6,8 - ld 11,8*3(5) - ld 12,8*4(5) - ld 14,8*5(5) - ld 15,8*6(5) - ld 16,8*7(5) - ld 17,8*8(5) - beq .Lsqr8x_tail_break - - addc 22,22,9 - ld 9,8*1(4) - adde 23,23,10 - ld 10,8*2(4) - adde 24,24,11 - ld 11,8*3(4) - adde 25,25,12 - ld 12,8*4(4) - adde 26,26,14 - ld 14,8*5(4) - adde 27,27,15 - ld 15,8*6(4) - adde 28,28,16 - ld 16,8*7(4) - adde 29,29,17 - ldu 17,8*8(4) - - b .Lsqr8x_tail - -.align 5 -.Lsqr8x_tail_break: - ld 7,8*8(1) - ld 21,8*9(1) - addi 30,5,8*8 - - addic 31,31,-1 - adde 18,22,9 - ld 22,8*8(3) - ld 9,8*1(20) - adde 19,23,10 - ld 23,8*9(3) - ld 10,8*2(20) - adde 24,24,11 - ld 11,8*3(20) - adde 25,25,12 - ld 12,8*4(20) - adde 26,26,14 - ld 14,8*5(20) - adde 27,27,15 - ld 15,8*6(20) - adde 28,28,16 - ld 16,8*7(20) - adde 29,29,17 - ld 17,8*8(20) - addi 4,20,8*8 - addze 20,0 - mulld 31,7,22 - std 18,8*1(5) - cmpld 30,21 - std 19,8*2(5) - li 30,8 - std 24,8*3(5) - ld 24,8*10(3) - std 25,8*4(5) - ld 25,8*11(3) - std 26,8*5(5) - ld 26,8*12(3) - std 27,8*6(5) - ld 27,8*13(3) - std 28,8*7(5) - ld 28,8*14(3) - std 29,8*8(5) - ld 29,8*15(3) - std 20,8*10(1) - addi 5,3,8*7 - mtctr 30 - bne .Lsqr8x_reduction - - - - - - - ld 3,8*6(1) - srwi 30,8,6 - mr 7,5 - addi 5,5,8*8 - subi 30,30,1 - subfc 18,9,22 - subfe 19,10,23 - mr 31,20 - mr 6,3 - - mtctr 30 - b .Lsqr8x_sub - -.align 5 -.Lsqr8x_sub: - ld 9,8*1(4) - ld 22,8*1(5) - ld 10,8*2(4) - ld 23,8*2(5) - subfe 20,11,24 - ld 11,8*3(4) - ld 24,8*3(5) - subfe 21,12,25 - ld 12,8*4(4) - ld 25,8*4(5) - std 18,8*1(3) - subfe 18,14,26 - ld 14,8*5(4) - ld 26,8*5(5) - std 19,8*2(3) - subfe 19,15,27 - ld 15,8*6(4) - ld 27,8*6(5) - std 20,8*3(3) - subfe 20,16,28 - ld 16,8*7(4) - ld 28,8*7(5) - std 21,8*4(3) - subfe 21,17,29 - ldu 17,8*8(4) - ldu 29,8*8(5) - std 18,8*5(3) - subfe 18,9,22 - std 19,8*6(3) - subfe 19,10,23 - std 20,8*7(3) - stdu 21,8*8(3) - bdnz .Lsqr8x_sub - - srwi 30,8,5 - ld 9,8*1(6) - ld 22,8*1(7) - subi 30,30,1 - ld 10,8*2(6) - ld 23,8*2(7) - subfe 20,11,24 - ld 11,8*3(6) - ld 24,8*3(7) - subfe 21,12,25 - ld 12,8*4(6) - ldu 25,8*4(7) - std 18,8*1(3) - subfe 18,14,26 - std 19,8*2(3) - subfe 19,15,27 - std 20,8*3(3) - subfe 20,16,28 - std 21,8*4(3) - subfe 21,17,29 - std 18,8*5(3) - subfe 31,0,31 - std 19,8*6(3) - std 20,8*7(3) - std 21,8*8(3) - - addi 5,1,8*11 - mtctr 30 - -.Lsqr4x_cond_copy: - andc 9,9,31 - std 0,-8*3(7) - and 22,22,31 - std 0,-8*2(7) - andc 10,10,31 - std 0,-8*1(7) - and 23,23,31 - std 0,-8*0(7) - andc 11,11,31 - std 0,8*1(5) - and 24,24,31 - std 0,8*2(5) - andc 12,12,31 - std 0,8*3(5) - and 25,25,31 - stdu 0,8*4(5) - or 18,9,22 - ld 9,8*5(6) - ld 22,8*1(7) - or 19,10,23 - ld 10,8*6(6) - ld 23,8*2(7) - or 20,11,24 - ld 11,8*7(6) - ld 24,8*3(7) - or 21,12,25 - ld 12,8*8(6) - ldu 25,8*4(7) - std 18,8*1(6) - std 19,8*2(6) - std 20,8*3(6) - stdu 21,8*4(6) - bdnz .Lsqr4x_cond_copy - - ld 4,0(1) - andc 9,9,31 - and 22,22,31 - andc 10,10,31 - and 23,23,31 - andc 11,11,31 - and 24,24,31 - andc 12,12,31 - and 25,25,31 - or 18,9,22 - or 19,10,23 - or 20,11,24 - or 21,12,25 - std 18,8*1(6) - std 19,8*2(6) - std 20,8*3(6) - std 21,8*4(6) - - b .Lsqr8x_done - -.align 5 -.Lsqr8x8_post_condition: - ld 3,8*6(1) - ld 4,0(1) - addze 31,0 - - - subfc 22,9,22 - subfe 23,10,23 - std 0,8*12(1) - std 0,8*13(1) - subfe 24,11,24 - std 0,8*14(1) - std 0,8*15(1) - subfe 25,12,25 - std 0,8*16(1) - std 0,8*17(1) - subfe 26,14,26 - std 0,8*18(1) - std 0,8*19(1) - subfe 27,15,27 - std 0,8*20(1) - std 0,8*21(1) - subfe 28,16,28 - std 0,8*22(1) - std 0,8*23(1) - subfe 29,17,29 - std 0,8*24(1) - std 0,8*25(1) - subfe 31,0,31 - std 0,8*26(1) - std 0,8*27(1) - - and 9,9,31 - and 10,10,31 - addc 22,22,9 - and 11,11,31 - adde 23,23,10 - and 12,12,31 - adde 24,24,11 - and 14,14,31 - adde 25,25,12 - and 15,15,31 - adde 26,26,14 - and 16,16,31 - adde 27,27,15 - and 17,17,31 - adde 28,28,16 - adde 29,29,17 - std 22,8*1(3) - std 23,8*2(3) - std 24,8*3(3) - std 25,8*4(3) - std 26,8*5(3) - std 27,8*6(3) - std 28,8*7(3) - std 29,8*8(3) - -.Lsqr8x_done: - std 0,8*8(1) - std 0,8*10(1) - - ld 14,-8*18(4) - li 3,1 - ld 15,-8*17(4) - ld 16,-8*16(4) - ld 17,-8*15(4) - ld 18,-8*14(4) - ld 19,-8*13(4) - ld 20,-8*12(4) - ld 21,-8*11(4) - ld 22,-8*10(4) - ld 23,-8*9(4) - ld 24,-8*8(4) - ld 25,-8*7(4) - ld 26,-8*6(4) - ld 27,-8*5(4) - ld 28,-8*4(4) - ld 29,-8*3(4) - ld 30,-8*2(4) - ld 31,-8*1(4) - mr 1,4 - blr -.long 0 -.byte 0,12,4,0x20,0x80,18,6,0 -.long 0 -.size __bn_sqr8x_mont,.-__bn_sqr8x_mont -.byte 77,111,110,116,103,111,109,101,114,121,32,77,117,108,116,105,112,108,105,99,97,116,105,111,110,32,102,111,114,32,80,80,67,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 diff --git a/sys/crypto/openssl/powerpc64le/ppc.S b/sys/crypto/openssl/powerpc64le/ppc.S deleted file mode 100644 index 50805d3d52b..00000000000 --- a/sys/crypto/openssl/powerpc64le/ppc.S +++ /dev/null @@ -1,1876 +0,0 @@ -/* Do not modify. This file is auto-generated from ppc.pl. */ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -.globl bn_sqr_comba4 -.type bn_sqr_comba4,@function -.globl bn_sqr_comba8 -.type bn_sqr_comba8,@function -.globl bn_mul_comba4 -.type bn_mul_comba4,@function -.globl bn_mul_comba8 -.type bn_mul_comba8,@function -.globl bn_sub_words -.type bn_sub_words,@function -.globl bn_add_words -.type bn_add_words,@function -.globl bn_div_words -.type bn_div_words,@function -.globl bn_sqr_words -.type bn_sqr_words,@function -.globl bn_mul_words -.type bn_mul_words,@function -.globl bn_mul_add_words -.type bn_mul_add_words,@function - - - -.machine "any" -.abiversion 2 -.text - - - - - - - - -.align 4 -bn_sqr_comba4: -.localentry bn_sqr_comba4,0 - - - - - - - - - - - - - - - - - xor 0,0,0 - - - - ld 5,0(4) - mulld 9,5,5 - mulhdu 10,5,5 - - - - - std 9,0(3) - - ld 6,8(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 7,7,7 - adde 8,8,8 - addze 9,0 - - - addc 10,7,10 - addze 11,8 - addze 9,9 - - std 10,8(3) - - mulld 7,6,6 - mulhdu 8,6,6 - addc 11,7,11 - adde 9,8,9 - addze 10,0 - - ld 6,16(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 7,7,7 - adde 8,8,8 - addze 10,10 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - std 11,16(3) - - ld 6,24(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 7,7,7 - adde 8,8,8 - addze 11,0 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - ld 5,8(4) - ld 6,16(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 7,7,7 - adde 8,8,8 - addze 11,11 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - std 9,24(3) - - mulld 7,6,6 - mulhdu 8,6,6 - addc 10,7,10 - adde 11,8,11 - addze 9,0 - - ld 6,24(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 7,7,7 - adde 8,8,8 - addze 9,9 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - std 10,32(3) - - ld 5,16(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 7,7,7 - adde 8,8,8 - addze 10,0 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - std 11,40(3) - - mulld 7,6,6 - mulhdu 8,6,6 - addc 9,7,9 - adde 10,8,10 - - std 9,48(3) - std 10,56(3) - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size bn_sqr_comba4,.-bn_sqr_comba4 - - - - - - - - -.align 4 -bn_sqr_comba8: -.localentry bn_sqr_comba8,0 - - - - - - - - - - - - - - - - - - - - - xor 0,0,0 - - - - ld 5,0(4) - mulld 9,5,5 - mulhdu 10,5,5 - std 9,0(3) - - ld 6,8(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 10,7,10 - adde 11,8,0 - addze 9,0 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - std 10,8(3) - - - mulld 7,6,6 - mulhdu 8,6,6 - addc 11,7,11 - adde 9,8,9 - addze 10,0 - - ld 6,16(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - std 11,16(3) - - ld 6,24(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 9,7,9 - adde 10,8,10 - addze 11,0 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - ld 5,8(4) - ld 6,16(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - std 9,24(3) - - mulld 7,6,6 - mulhdu 8,6,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,0 - - ld 6,24(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - ld 5,0(4) - ld 6,32(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - std 10,32(3) - - ld 6,40(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 11,7,11 - adde 9,8,9 - addze 10,0 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - ld 5,8(4) - ld 6,32(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - ld 5,16(4) - ld 6,24(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - std 11,40(3) - - mulld 7,6,6 - mulhdu 8,6,6 - addc 9,7,9 - adde 10,8,10 - addze 11,0 - - ld 6,32(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - ld 5,8(4) - ld 6,40(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - ld 5,0(4) - ld 6,48(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - std 9,48(3) - - ld 6,56(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,0 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - ld 5,8(4) - ld 6,48(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - ld 5,16(4) - ld 6,40(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - ld 5,24(4) - ld 6,32(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 10,7,10 - adde 11,8,11 - addze 9,9 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - std 10,56(3) - - mulld 7,6,6 - mulhdu 8,6,6 - addc 11,7,11 - adde 9,8,9 - addze 10,0 - - ld 6,40(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - ld 5,16(4) - ld 6,48(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - ld 5,8(4) - ld 6,56(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - std 11,64(3) - - ld 5,16(4) - mulld 7,5,6 - mulhdu 8,5,6 - - addc 9,7,9 - adde 10,8,10 - addze 11,0 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - ld 5,24(4) - ld 6,48(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - - ld 5,32(4) - ld 6,40(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - std 9,72(3) - - mulld 7,6,6 - mulhdu 8,6,6 - addc 10,7,10 - adde 11,8,11 - addze 9,0 - - ld 6,48(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - - ld 5,24(4) - ld 6,56(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - std 10,80(3) - - ld 5,32(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 11,7,11 - adde 9,8,9 - addze 10,0 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - - ld 5,40(4) - ld 6,48(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - addc 11,7,11 - adde 9,8,9 - addze 10,10 - std 11,88(3) - - mulld 7,6,6 - mulhdu 8,6,6 - addc 9,7,9 - adde 10,8,10 - addze 11,0 - - ld 6,56(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - addc 9,7,9 - adde 10,8,10 - addze 11,11 - std 9,96(3) - - - ld 5,48(4) - mulld 7,5,6 - mulhdu 8,5,6 - addc 10,7,10 - adde 11,8,11 - addze 9,0 - addc 10,7,10 - adde 11,8,11 - addze 9,9 - std 10,104(3) - - mulld 7,6,6 - mulhdu 8,6,6 - addc 11,7,11 - adde 9,8,9 - std 11,112(3) - std 9, 120(3) - - - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size bn_sqr_comba8,.-bn_sqr_comba8 - - - - - - - - -.align 4 -bn_mul_comba4: -.localentry bn_mul_comba4,0 - - - - - - - - - - - - - xor 0,0,0 - - ld 6,0(4) - ld 7,0(5) - mulld 10,6,7 - mulhdu 11,6,7 - std 10,0(3) - - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,8,11 - adde 12,9,0 - addze 10,0 - - ld 6, 8(4) - ld 7, 0(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,8,11 - adde 12,9,12 - addze 10,10 - std 11,8(3) - - ld 6,16(4) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,8,12 - adde 10,9,10 - addze 11,0 - - ld 6,8(4) - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,8,12 - adde 10,9,10 - addze 11,11 - - ld 6,0(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,8,12 - adde 10,9,10 - addze 11,11 - std 12,16(3) - - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,8,10 - adde 11,9,11 - addze 12,0 - - ld 6,8(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,8,10 - adde 11,9,11 - addze 12,12 - - ld 6,16(4) - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,8,10 - adde 11,9,11 - addze 12,12 - - ld 6,24(4) - ld 7,0(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,8,10 - adde 11,9,11 - addze 12,12 - std 10,24(3) - - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,8,11 - adde 12,9,12 - addze 10,0 - - ld 6,16(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,8,11 - adde 12,9,12 - addze 10,10 - - ld 6,8(4) - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,8,11 - adde 12,9,12 - addze 10,10 - std 11,32(3) - - ld 6,16(4) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,8,12 - adde 10,9,10 - addze 11,0 - - ld 6,24(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,8,12 - adde 10,9,10 - addze 11,11 - std 12,40(3) - - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,8,10 - adde 11,9,11 - - std 10,48(3) - std 11,56(3) - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size bn_mul_comba4,.-bn_mul_comba4 - - - - - - - - -.align 4 -bn_mul_comba8: -.localentry bn_mul_comba8,0 - - - - - - - - - - - - - xor 0,0,0 - - - ld 6,0(4) - ld 7,0(5) - mulld 10,6,7 - mulhdu 11,6,7 - std 10,0(3) - - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - addze 12,9 - addze 10,0 - - ld 6,8(4) - ld 7,0(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - std 11,8(3) - - ld 6,16(4) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,0 - - ld 6,8(4) - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,0(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - std 12,16(3) - - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,0 - - ld 6,8(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - - ld 6,16(4) - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,24(4) - ld 7,0(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - std 10,24(3) - - ld 6,32(4) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,0 - - ld 6,24(4) - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,16(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,8(4) - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,0(4) - ld 7,32(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - std 11,32(3) - - ld 7,40(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,0 - - ld 6,8(4) - ld 7,32(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,16(4) - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,24(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,32(4) - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,40(4) - ld 7,0(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - std 12,40(3) - - ld 6,48(4) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,0 - - ld 6,40(4) - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,32(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,24(4) - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,16(4) - ld 7,32(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,8(4) - ld 7,40(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,0(4) - ld 7,48(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - std 10,48(3) - - ld 7,56(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,0 - - ld 6,8(4) - ld 7,48(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,16(4) - ld 7,40(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,24(4) - ld 7,32(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,32(4) - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,40(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,48(4) - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,56(4) - ld 7,0(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - std 11,56(3) - - ld 7,8(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,0 - - ld 6,48(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,40(4) - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,32(4) - ld 7,32(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,24(4) - ld 7,40(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,16(4) - ld 7,48(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,8(4) - ld 7,56(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - std 12,64(3) - - ld 6,16(4) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,0 - - ld 6,24(4) - ld 7,48(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,32(4) - ld 7,40(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,40(4) - ld 7,32(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,48(4) - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,56(4) - ld 7,16(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - std 10,72(3) - - ld 7,24(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,0 - - ld 6,48(4) - ld 7,32(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,40(4) - ld 7,40(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,32(4) - ld 7,48(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - - ld 6,24(4) - ld 7,56(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - std 11,80(3) - - ld 6,32(4) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,0 - - ld 6,40(4) - ld 7,48(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,48(4) - ld 7,40(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - - ld 6,56(4) - ld 7,32(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - addze 11,11 - std 12,88(3) - - ld 7,40(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,0 - - ld 6,48(4) - ld 7,48(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - - ld 6,40(4) - ld 7,56(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 10,10,8 - adde 11,11,9 - addze 12,12 - std 10,96(3) - - ld 6,48(4) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,0 - - ld 6,56(4) - ld 7,48(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 11,11,8 - adde 12,12,9 - addze 10,10 - std 11,104(3) - - ld 7,56(5) - mulld 8,6,7 - mulhdu 9,6,7 - addc 12,12,8 - adde 10,10,9 - std 12,112(3) - std 10,120(3) - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size bn_mul_comba8,.-bn_mul_comba8 - - - - - - - - -.align 4 -bn_sub_words: -.localentry bn_sub_words,0 - - - - - - - - - - - - - - - xor 0,0,0 - - - - subfc. 7,0,6 - - - beq .Lppcasm_sub_adios - addi 4,4,-8 - addi 3,3,-8 - addi 5,5,-8 - mtctr 6 -.Lppcasm_sub_mainloop: - ldu 7,8(4) - ldu 8,8(5) - subfe 6,8,7 - - - stdu 6,8(3) - bdnz .Lppcasm_sub_mainloop -.Lppcasm_sub_adios: - subfze 3,0 - andi. 3,3,1 - blr -.long 0 -.byte 0,12,0x14,0,0,0,4,0 -.long 0 -.size bn_sub_words,.-bn_sub_words - - - - - - - - -.align 4 -bn_add_words: -.localentry bn_add_words,0 - - - - - - - - - - - - - - - xor 0,0,0 - - - - addic. 6,6,0 - beq .Lppcasm_add_adios - addi 4,4,-8 - addi 3,3,-8 - addi 5,5,-8 - mtctr 6 -.Lppcasm_add_mainloop: - ldu 7,8(4) - ldu 8,8(5) - adde 8,7,8 - stdu 8,8(3) - bdnz .Lppcasm_add_mainloop -.Lppcasm_add_adios: - addze 3,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,4,0 -.long 0 -.size bn_add_words,.-bn_add_words - - - - - - - - -.align 4 -bn_div_words: -.localentry bn_div_words,0 - - - - - - - - - - - - - cmpldi 0,5,0 - bne .Lppcasm_div1 - li 3,-1 - blr -.Lppcasm_div1: - xor 0,0,0 - li 8,64 - cntlzd. 7,5 - beq .Lppcasm_div2 - subf 8,7,8 - srd. 9,3,8 - td 16,9,0 -.Lppcasm_div2: - cmpld 0,3,5 - blt .Lppcasm_div3 - subf 3,5,3 -.Lppcasm_div3: - cmpi 0,0,7,0 - beq .Lppcasm_div4 - sld 3,3,7 - srd 8,4,8 - sld 5,5,7 - or 3,3,8 - sld 4,4,7 -.Lppcasm_div4: - srdi 9,5,32 - - - li 6,2 - mtctr 6 -.Lppcasm_divouterloop: - srdi 8,3,32 - srdi 11,4,32 - - cmpld 0,8,9 - bne .Lppcasm_div5 - - li 8,-1 - clrldi 8,8,32 - b .Lppcasm_div6 -.Lppcasm_div5: - divdu 8,3,9 -.Lppcasm_div6: - mulld 12,9,8 - clrldi 10,5,32 - mulld 6,8,10 - -.Lppcasm_divinnerloop: - subf 10,12,3 - srdi 7,10,32 - addic. 7,7,0 - - - - sldi 7,10,32 - or 7,7,11 - cmpld 1,6,7 - bne .Lppcasm_divinnerexit - ble 1,.Lppcasm_divinnerexit - addi 8,8,-1 - subf 12,9,12 - clrldi 10,5,32 - subf 6,10,6 - b .Lppcasm_divinnerloop -.Lppcasm_divinnerexit: - srdi 10,6,32 - sldi 11,6,32 - cmpld 1,4,11 - add 12,12,10 - bge 1,.Lppcasm_div7 - addi 12,12,1 -.Lppcasm_div7: - subf 11,11,4 - cmpld 1,3,12 - bge 1,.Lppcasm_div8 - addi 8,8,-1 - add 3,5,3 -.Lppcasm_div8: - subf 12,12,3 - sldi 4,11,32 - - - - insrdi 11,12,32,32 - rotldi 3,11,32 - bdz .Lppcasm_div9 - sldi 0,8,32 - b .Lppcasm_divouterloop -.Lppcasm_div9: - or 3,8,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size bn_div_words,.-bn_div_words - - - - - - - -.align 4 -bn_sqr_words: -.localentry bn_sqr_words,0 - - - - - - - - - - - - - - - - addic. 5,5,0 - beq .Lppcasm_sqr_adios - addi 4,4,-8 - addi 3,3,-8 - mtctr 5 -.Lppcasm_sqr_mainloop: - - ldu 6,8(4) - mulld 7,6,6 - mulhdu 8,6,6 - stdu 7,8(3) - stdu 8,8(3) - bdnz .Lppcasm_sqr_mainloop -.Lppcasm_sqr_adios: - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size bn_sqr_words,.-bn_sqr_words - - - - - - - - -.align 4 -bn_mul_words: -.localentry bn_mul_words,0 - - - - - - - - - xor 0,0,0 - xor 12,12,12 - rlwinm. 7,5,30,2,31 - beq .Lppcasm_mw_REM - mtctr 7 -.Lppcasm_mw_LOOP: - - ld 8,0(4) - mulld 9,6,8 - mulhdu 10,6,8 - addc 9,9,12 - - - - - std 9,0(3) - - ld 8,8(4) - mulld 11,6,8 - mulhdu 12,6,8 - adde 11,11,10 - - std 11,8(3) - - ld 8,16(4) - mulld 9,6,8 - mulhdu 10,6,8 - adde 9,9,12 - - std 9,16(3) - - ld 8,24(4) - mulld 11,6,8 - mulhdu 12,6,8 - adde 11,11,10 - addze 12,12 - - std 11,24(3) - - addi 3,3,32 - addi 4,4,32 - bdnz .Lppcasm_mw_LOOP - -.Lppcasm_mw_REM: - andi. 5,5,0x3 - beq .Lppcasm_mw_OVER - - ld 8,0(4) - mulld 9,6,8 - mulhdu 10,6,8 - addc 9,9,12 - addze 10,10 - std 9,0(3) - addi 12,10,0 - - addi 5,5,-1 - cmpli 0,0,5,0 - beq .Lppcasm_mw_OVER - - - - ld 8,8(4) - mulld 9,6,8 - mulhdu 10,6,8 - addc 9,9,12 - addze 10,10 - std 9,8(3) - addi 12,10,0 - - addi 5,5,-1 - cmpli 0,0,5,0 - beq .Lppcasm_mw_OVER - - - ld 8,16(4) - mulld 9,6,8 - mulhdu 10,6,8 - addc 9,9,12 - addze 10,10 - std 9,16(3) - addi 12,10,0 - -.Lppcasm_mw_OVER: - addi 3,12,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,4,0 -.long 0 -.size bn_mul_words,.-bn_mul_words - - - - - - - - -.align 4 -bn_mul_add_words: -.localentry bn_mul_add_words,0 - - - - - - - - - - - - xor 0,0,0 - xor 12,12,12 - rlwinm. 7,5,30,2,31 - beq .Lppcasm_maw_leftover - mtctr 7 -.Lppcasm_maw_mainloop: - - ld 8,0(4) - ld 11,0(3) - mulld 9,6,8 - mulhdu 10,6,8 - addc 9,9,12 - addze 10,10 - addc 9,9,11 - - - - - - - std 9,0(3) - - - ld 8,8(4) - ld 9,8(3) - mulld 11,6,8 - mulhdu 12,6,8 - adde 11,11,10 - addze 12,12 - addc 11,11,9 - - std 11,8(3) - - - ld 8,16(4) - mulld 9,6,8 - ld 11,16(3) - mulhdu 10,6,8 - adde 9,9,12 - addze 10,10 - addc 9,9,11 - - std 9,16(3) - - - ld 8,24(4) - mulld 11,6,8 - ld 9,24(3) - mulhdu 12,6,8 - adde 11,11,10 - addze 12,12 - addc 11,11,9 - addze 12,12 - std 11,24(3) - addi 3,3,32 - addi 4,4,32 - bdnz .Lppcasm_maw_mainloop - -.Lppcasm_maw_leftover: - andi. 5,5,0x3 - beq .Lppcasm_maw_adios - addi 3,3,-8 - addi 4,4,-8 - - mtctr 5 - ldu 8,8(4) - mulld 9,6,8 - mulhdu 10,6,8 - ldu 11,8(3) - addc 9,9,11 - addze 10,10 - addc 9,9,12 - addze 12,10 - std 9,0(3) - - bdz .Lppcasm_maw_adios - - ldu 8,8(4) - mulld 9,6,8 - mulhdu 10,6,8 - ldu 11,8(3) - addc 9,9,11 - addze 10,10 - addc 9,9,12 - addze 12,10 - std 9,0(3) - - bdz .Lppcasm_maw_adios - - ldu 8,8(4) - mulld 9,6,8 - mulhdu 10,6,8 - ldu 11,8(3) - addc 9,9,11 - addze 10,10 - addc 9,9,12 - addze 12,10 - std 9,0(3) - -.Lppcasm_maw_adios: - addi 3,12,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,4,0 -.long 0 -.size bn_mul_add_words,.-bn_mul_add_words -.align 4 diff --git a/sys/crypto/openssl/powerpc64le/ppccpuid.S b/sys/crypto/openssl/powerpc64le/ppccpuid.S deleted file mode 100644 index d352a41008b..00000000000 --- a/sys/crypto/openssl/powerpc64le/ppccpuid.S +++ /dev/null @@ -1,387 +0,0 @@ -/* Do not modify. This file is auto-generated from ppccpuid.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl OPENSSL_fpu_probe -.type OPENSSL_fpu_probe,@function -.align 4 -OPENSSL_fpu_probe: -.localentry OPENSSL_fpu_probe,0 - - fmr 0,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_fpu_probe,.-OPENSSL_fpu_probe -.globl OPENSSL_ppc64_probe -.type OPENSSL_ppc64_probe,@function -.align 4 -OPENSSL_ppc64_probe: -.localentry OPENSSL_ppc64_probe,0 - - fcfid 1,1 - rldicl 0,0,32,32 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_ppc64_probe,.-OPENSSL_ppc64_probe - -.globl OPENSSL_altivec_probe -.type OPENSSL_altivec_probe,@function -.align 4 -OPENSSL_altivec_probe: -.localentry OPENSSL_altivec_probe,0 - -.long 0x10000484 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_altivec_probe,.-OPENSSL_altivec_probe - -.globl OPENSSL_crypto207_probe -.type OPENSSL_crypto207_probe,@function -.align 4 -OPENSSL_crypto207_probe: -.localentry OPENSSL_crypto207_probe,0 - - .long 0x7C000E99 - .long 0x10000508 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_crypto207_probe,.-OPENSSL_crypto207_probe - -.globl OPENSSL_madd300_probe -.type OPENSSL_madd300_probe,@function -.align 4 -OPENSSL_madd300_probe: -.localentry OPENSSL_madd300_probe,0 - - xor 0,0,0 - .long 0x10600033 - .long 0x10600031 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.globl OPENSSL_wipe_cpu -.type OPENSSL_wipe_cpu,@function -.align 4 -OPENSSL_wipe_cpu: -.localentry OPENSSL_wipe_cpu,0 - - xor 0,0,0 - fmr 0,31 - fmr 1,31 - fmr 2,31 - mr 3,1 - fmr 3,31 - xor 4,4,4 - fmr 4,31 - xor 5,5,5 - fmr 5,31 - xor 6,6,6 - fmr 6,31 - xor 7,7,7 - fmr 7,31 - xor 8,8,8 - fmr 8,31 - xor 9,9,9 - fmr 9,31 - xor 10,10,10 - fmr 10,31 - xor 11,11,11 - fmr 11,31 - xor 12,12,12 - fmr 12,31 - fmr 13,31 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu - -.globl OPENSSL_atomic_add -.type OPENSSL_atomic_add,@function -.align 4 -OPENSSL_atomic_add: -.localentry OPENSSL_atomic_add,0 - -.Ladd: lwarx 5,0,3 - add 0,4,5 - stwcx. 0,0,3 - bne- .Ladd - extsw 3,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size OPENSSL_atomic_add,.-OPENSSL_atomic_add - -.globl OPENSSL_rdtsc_mftb -.type OPENSSL_rdtsc_mftb,@function -.align 4 -OPENSSL_rdtsc_mftb: -.localentry OPENSSL_rdtsc_mftb,0 - - mftb 3 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_rdtsc_mftb,.-OPENSSL_rdtsc_mftb - -.globl OPENSSL_rdtsc_mfspr268 -.type OPENSSL_rdtsc_mfspr268,@function -.align 4 -OPENSSL_rdtsc_mfspr268: -.localentry OPENSSL_rdtsc_mfspr268,0 - - mfspr 3,268 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size OPENSSL_rdtsc_mfspr268,.-OPENSSL_rdtsc_mfspr268 - -.globl OPENSSL_cleanse -.type OPENSSL_cleanse,@function -.align 4 -OPENSSL_cleanse: -.localentry OPENSSL_cleanse,0 - - cmpldi 4,7 - li 0,0 - bge .Lot - cmpldi 4,0 - .long 0x4DC20020 -.Little: mtctr 4 - stb 0,0(3) - addi 3,3,1 - bdnz $-8 - blr -.Lot: andi. 5,3,3 - beq .Laligned - stb 0,0(3) - subi 4,4,1 - addi 3,3,1 - b .Lot -.Laligned: - srdi 5,4,2 - mtctr 5 - stw 0,0(3) - addi 3,3,4 - bdnz $-8 - andi. 4,4,3 - bne .Little - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size OPENSSL_cleanse,.-OPENSSL_cleanse - -.globl CRYPTO_memcmp -.type CRYPTO_memcmp,@function -.align 4 -CRYPTO_memcmp: -.localentry CRYPTO_memcmp,0 - - cmpldi 5,0 - li 0,0 - beq .Lno_data - mtctr 5 -.Loop_cmp: - lbz 6,0(3) - addi 3,3,1 - lbz 7,0(4) - addi 4,4,1 - xor 6,6,7 - or 0,0,6 - bdnz .Loop_cmp - -.Lno_data: - li 3,0 - sub 3,3,0 - extrwi 3,3,1,0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size CRYPTO_memcmp,.-CRYPTO_memcmp -.globl OPENSSL_instrument_bus_mftb -.type OPENSSL_instrument_bus_mftb,@function -.align 4 -OPENSSL_instrument_bus_mftb: -.localentry OPENSSL_instrument_bus_mftb,0 - - mtctr 4 - - mftb 7 - li 8,0 - - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - -.Loop: mftb 6 - sub 8,6,7 - mr 7,6 - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - addi 3,3,4 - bdnz .Loop - - mr 3,4 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size OPENSSL_instrument_bus_mftb,.-OPENSSL_instrument_bus_mftb - -.globl OPENSSL_instrument_bus2_mftb -.type OPENSSL_instrument_bus2_mftb,@function -.align 4 -OPENSSL_instrument_bus2_mftb: -.localentry OPENSSL_instrument_bus2_mftb,0 - - mr 0,4 - slwi 4,4,2 - - mftb 7 - li 8,0 - - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - - mftb 6 - sub 8,6,7 - mr 7,6 - mr 9,8 -.Loop2: - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - - addic. 5,5,-1 - beq .Ldone2 - - mftb 6 - sub 8,6,7 - mr 7,6 - cmplw 7,8,9 - mr 9,8 - - mfcr 6 - not 6,6 - rlwinm 6,6,1,29,29 - - sub. 4,4,6 - add 3,3,6 - bne .Loop2 - -.Ldone2: - srwi 4,4,2 - sub 3,0,4 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size OPENSSL_instrument_bus2_mftb,.-OPENSSL_instrument_bus2_mftb - -.globl OPENSSL_instrument_bus_mfspr268 -.type OPENSSL_instrument_bus_mfspr268,@function -.align 4 -OPENSSL_instrument_bus_mfspr268: -.localentry OPENSSL_instrument_bus_mfspr268,0 - - mtctr 4 - - mfspr 7,268 - li 8,0 - - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - -.Loop3: mfspr 6,268 - sub 8,6,7 - mr 7,6 - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - addi 3,3,4 - bdnz .Loop3 - - mr 3,4 - blr -.long 0 -.byte 0,12,0x14,0,0,0,2,0 -.long 0 -.size OPENSSL_instrument_bus_mfspr268,.-OPENSSL_instrument_bus_mfspr268 - -.globl OPENSSL_instrument_bus2_mfspr268 -.type OPENSSL_instrument_bus2_mfspr268,@function -.align 4 -OPENSSL_instrument_bus2_mfspr268: -.localentry OPENSSL_instrument_bus2_mfspr268,0 - - mr 0,4 - slwi 4,4,2 - - mfspr 7,268 - li 8,0 - - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - - mfspr 6,268 - sub 8,6,7 - mr 7,6 - mr 9,8 -.Loop4: - dcbf 0,3 - lwarx 6,0,3 - add 6,6,8 - stwcx. 6,0,3 - stwx 6,0,3 - - addic. 5,5,-1 - beq .Ldone4 - - mfspr 6,268 - sub 8,6,7 - mr 7,6 - cmplw 7,8,9 - mr 9,8 - - mfcr 6 - not 6,6 - rlwinm 6,6,1,29,29 - - sub. 4,4,6 - add 3,3,6 - bne .Loop4 - -.Ldone4: - srwi 4,4,2 - sub 3,0,4 - blr -.long 0 -.byte 0,12,0x14,0,0,0,3,0 -.long 0 -.size OPENSSL_instrument_bus2_mfspr268,.-OPENSSL_instrument_bus2_mfspr268 diff --git a/sys/crypto/openssl/powerpc64le/sha1-ppc.S b/sys/crypto/openssl/powerpc64le/sha1-ppc.S deleted file mode 100644 index 35d3141a6ed..00000000000 --- a/sys/crypto/openssl/powerpc64le/sha1-ppc.S +++ /dev/null @@ -1,1169 +0,0 @@ -/* Do not modify. This file is auto-generated from sha1-ppc.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl sha1_block_data_order -.type sha1_block_data_order,@function -.align 4 -sha1_block_data_order: -.localentry sha1_block_data_order,0 - - stdu 1,-256(1) - mflr 0 - std 15,120(1) - std 16,128(1) - std 17,136(1) - std 18,144(1) - std 19,152(1) - std 20,160(1) - std 21,168(1) - std 22,176(1) - std 23,184(1) - std 24,192(1) - std 25,200(1) - std 26,208(1) - std 27,216(1) - std 28,224(1) - std 29,232(1) - std 30,240(1) - std 31,248(1) - std 0,272(1) - lwz 7,0(3) - lwz 8,4(3) - lwz 9,8(3) - lwz 10,12(3) - lwz 11,16(3) - andi. 0,4,3 - bne .Lunaligned -.Laligned: - mtctr 5 - bl .Lsha1_block_private - b .Ldone - - - - - - - -.align 4 -.Lunaligned: - subfic 6,4,4096 - andi. 6,6,4095 - srwi. 6,6,6 - beq .Lcross_page - cmpld 5,6 - ble .Laligned - mtctr 6 - subfc 5,6,5 - bl .Lsha1_block_private -.Lcross_page: - li 6,16 - mtctr 6 - addi 20,1,48 -.Lmemcpy: - lbz 16,0(4) - lbz 17,1(4) - lbz 18,2(4) - lbz 19,3(4) - addi 4,4,4 - stb 16,0(20) - stb 17,1(20) - stb 18,2(20) - stb 19,3(20) - addi 20,20,4 - bdnz .Lmemcpy - - std 4,112(1) - li 6,1 - addi 4,1,48 - mtctr 6 - bl .Lsha1_block_private - ld 4,112(1) - addic. 5,5,-1 - bne .Lunaligned - -.Ldone: - ld 0,272(1) - ld 15,120(1) - ld 16,128(1) - ld 17,136(1) - ld 18,144(1) - ld 19,152(1) - ld 20,160(1) - ld 21,168(1) - ld 22,176(1) - ld 23,184(1) - ld 24,192(1) - ld 25,200(1) - ld 26,208(1) - ld 27,216(1) - ld 28,224(1) - ld 29,232(1) - ld 30,240(1) - ld 31,248(1) - mtlr 0 - addi 1,1,256 - blr -.long 0 -.byte 0,12,4,1,0x80,18,3,0 -.long 0 -.align 4 -.Lsha1_block_private: - lis 0,0x5a82 - ori 0,0,0x7999 - lwz 12,0(4) - rotlwi 16,12,8 - rlwimi 16,12,24,0,7 - rlwimi 16,12,24,16,23 - lwz 12,4(4) - rotlwi 17,12,8 - rlwimi 17,12,24,0,7 - rlwimi 17,12,24,16,23 - add 12,0,11 - rotlwi 11,7,5 - add 12,12,16 - and 15,9,8 - add 12,12,11 - andc 6,10,8 - rotlwi 8,8,30 - or 15,15,6 - add 12,12,15 - lwz 11,8(4) - rotlwi 18,11,8 - rlwimi 18,11,24,0,7 - rlwimi 18,11,24,16,23 - add 11,0,10 - rotlwi 10,12,5 - add 11,11,17 - and 15,8,7 - add 11,11,10 - andc 6,9,7 - rotlwi 7,7,30 - or 15,15,6 - add 11,11,15 - lwz 10,12(4) - rotlwi 19,10,8 - rlwimi 19,10,24,0,7 - rlwimi 19,10,24,16,23 - add 10,0,9 - rotlwi 9,11,5 - add 10,10,18 - and 15,7,12 - add 10,10,9 - andc 6,8,12 - rotlwi 12,12,30 - or 15,15,6 - add 10,10,15 - lwz 9,16(4) - rotlwi 20,9,8 - rlwimi 20,9,24,0,7 - rlwimi 20,9,24,16,23 - add 9,0,8 - rotlwi 8,10,5 - add 9,9,19 - and 15,12,11 - add 9,9,8 - andc 6,7,11 - rotlwi 11,11,30 - or 15,15,6 - add 9,9,15 - lwz 8,20(4) - rotlwi 21,8,8 - rlwimi 21,8,24,0,7 - rlwimi 21,8,24,16,23 - add 8,0,7 - rotlwi 7,9,5 - add 8,8,20 - and 15,11,10 - add 8,8,7 - andc 6,12,10 - rotlwi 10,10,30 - or 15,15,6 - add 8,8,15 - lwz 7,24(4) - rotlwi 22,7,8 - rlwimi 22,7,24,0,7 - rlwimi 22,7,24,16,23 - add 7,0,12 - rotlwi 12,8,5 - add 7,7,21 - and 15,10,9 - add 7,7,12 - andc 6,11,9 - rotlwi 9,9,30 - or 15,15,6 - add 7,7,15 - lwz 12,28(4) - rotlwi 23,12,8 - rlwimi 23,12,24,0,7 - rlwimi 23,12,24,16,23 - add 12,0,11 - rotlwi 11,7,5 - add 12,12,22 - and 15,9,8 - add 12,12,11 - andc 6,10,8 - rotlwi 8,8,30 - or 15,15,6 - add 12,12,15 - lwz 11,32(4) - rotlwi 24,11,8 - rlwimi 24,11,24,0,7 - rlwimi 24,11,24,16,23 - add 11,0,10 - rotlwi 10,12,5 - add 11,11,23 - and 15,8,7 - add 11,11,10 - andc 6,9,7 - rotlwi 7,7,30 - or 15,15,6 - add 11,11,15 - lwz 10,36(4) - rotlwi 25,10,8 - rlwimi 25,10,24,0,7 - rlwimi 25,10,24,16,23 - add 10,0,9 - rotlwi 9,11,5 - add 10,10,24 - and 15,7,12 - add 10,10,9 - andc 6,8,12 - rotlwi 12,12,30 - or 15,15,6 - add 10,10,15 - lwz 9,40(4) - rotlwi 26,9,8 - rlwimi 26,9,24,0,7 - rlwimi 26,9,24,16,23 - add 9,0,8 - rotlwi 8,10,5 - add 9,9,25 - and 15,12,11 - add 9,9,8 - andc 6,7,11 - rotlwi 11,11,30 - or 15,15,6 - add 9,9,15 - lwz 8,44(4) - rotlwi 27,8,8 - rlwimi 27,8,24,0,7 - rlwimi 27,8,24,16,23 - add 8,0,7 - rotlwi 7,9,5 - add 8,8,26 - and 15,11,10 - add 8,8,7 - andc 6,12,10 - rotlwi 10,10,30 - or 15,15,6 - add 8,8,15 - lwz 7,48(4) - rotlwi 28,7,8 - rlwimi 28,7,24,0,7 - rlwimi 28,7,24,16,23 - add 7,0,12 - rotlwi 12,8,5 - add 7,7,27 - and 15,10,9 - add 7,7,12 - andc 6,11,9 - rotlwi 9,9,30 - or 15,15,6 - add 7,7,15 - lwz 12,52(4) - rotlwi 29,12,8 - rlwimi 29,12,24,0,7 - rlwimi 29,12,24,16,23 - add 12,0,11 - rotlwi 11,7,5 - add 12,12,28 - and 15,9,8 - add 12,12,11 - andc 6,10,8 - rotlwi 8,8,30 - or 15,15,6 - add 12,12,15 - lwz 11,56(4) - rotlwi 30,11,8 - rlwimi 30,11,24,0,7 - rlwimi 30,11,24,16,23 - add 11,0,10 - rotlwi 10,12,5 - add 11,11,29 - and 15,8,7 - add 11,11,10 - andc 6,9,7 - rotlwi 7,7,30 - or 15,15,6 - add 11,11,15 - lwz 10,60(4) - rotlwi 31,10,8 - rlwimi 31,10,24,0,7 - rlwimi 31,10,24,16,23 - add 10,0,9 - rotlwi 9,11,5 - add 10,10,30 - and 15,7,12 - add 10,10,9 - andc 6,8,12 - rotlwi 12,12,30 - or 15,15,6 - add 10,10,15 - add 9,0,8 - rotlwi 8,10,5 - xor 16,16,18 - add 9,9,31 - and 15,12,11 - xor 16,16,24 - add 9,9,8 - andc 6,7,11 - rotlwi 11,11,30 - or 15,15,6 - xor 16,16,29 - add 9,9,15 - rotlwi 16,16,1 - add 8,0,7 - rotlwi 7,9,5 - xor 17,17,19 - add 8,8,16 - and 15,11,10 - xor 17,17,25 - add 8,8,7 - andc 6,12,10 - rotlwi 10,10,30 - or 15,15,6 - xor 17,17,30 - add 8,8,15 - rotlwi 17,17,1 - add 7,0,12 - rotlwi 12,8,5 - xor 18,18,20 - add 7,7,17 - and 15,10,9 - xor 18,18,26 - add 7,7,12 - andc 6,11,9 - rotlwi 9,9,30 - or 15,15,6 - xor 18,18,31 - add 7,7,15 - rotlwi 18,18,1 - add 12,0,11 - rotlwi 11,7,5 - xor 19,19,21 - add 12,12,18 - and 15,9,8 - xor 19,19,27 - add 12,12,11 - andc 6,10,8 - rotlwi 8,8,30 - or 15,15,6 - xor 19,19,16 - add 12,12,15 - rotlwi 19,19,1 - add 11,0,10 - rotlwi 10,12,5 - xor 20,20,22 - add 11,11,19 - and 15,8,7 - xor 20,20,28 - add 11,11,10 - andc 6,9,7 - rotlwi 7,7,30 - or 15,15,6 - xor 20,20,17 - add 11,11,15 - rotlwi 20,20,1 - lis 0,0x6ed9 - ori 0,0,0xeba1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 21,21,23 - add 10,10,20 - xor 15,15,7 - xor 21,21,29 - add 10,10,15 - rotlwi 12,12,30 - xor 21,21,18 - add 10,10,9 - rotlwi 21,21,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 22,22,24 - add 9,9,21 - xor 15,15,12 - xor 22,22,30 - add 9,9,15 - rotlwi 11,11,30 - xor 22,22,19 - add 9,9,8 - rotlwi 22,22,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 23,23,25 - add 8,8,22 - xor 15,15,11 - xor 23,23,31 - add 8,8,15 - rotlwi 10,10,30 - xor 23,23,20 - add 8,8,7 - rotlwi 23,23,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 24,24,26 - add 7,7,23 - xor 15,15,10 - xor 24,24,16 - add 7,7,15 - rotlwi 9,9,30 - xor 24,24,21 - add 7,7,12 - rotlwi 24,24,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 25,25,27 - add 12,12,24 - xor 15,15,9 - xor 25,25,17 - add 12,12,15 - rotlwi 8,8,30 - xor 25,25,22 - add 12,12,11 - rotlwi 25,25,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 26,26,28 - add 11,11,25 - xor 15,15,8 - xor 26,26,18 - add 11,11,15 - rotlwi 7,7,30 - xor 26,26,23 - add 11,11,10 - rotlwi 26,26,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 27,27,29 - add 10,10,26 - xor 15,15,7 - xor 27,27,19 - add 10,10,15 - rotlwi 12,12,30 - xor 27,27,24 - add 10,10,9 - rotlwi 27,27,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 28,28,30 - add 9,9,27 - xor 15,15,12 - xor 28,28,20 - add 9,9,15 - rotlwi 11,11,30 - xor 28,28,25 - add 9,9,8 - rotlwi 28,28,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 29,29,31 - add 8,8,28 - xor 15,15,11 - xor 29,29,21 - add 8,8,15 - rotlwi 10,10,30 - xor 29,29,26 - add 8,8,7 - rotlwi 29,29,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 30,30,16 - add 7,7,29 - xor 15,15,10 - xor 30,30,22 - add 7,7,15 - rotlwi 9,9,30 - xor 30,30,27 - add 7,7,12 - rotlwi 30,30,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 31,31,17 - add 12,12,30 - xor 15,15,9 - xor 31,31,23 - add 12,12,15 - rotlwi 8,8,30 - xor 31,31,28 - add 12,12,11 - rotlwi 31,31,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 16,16,18 - add 11,11,31 - xor 15,15,8 - xor 16,16,24 - add 11,11,15 - rotlwi 7,7,30 - xor 16,16,29 - add 11,11,10 - rotlwi 16,16,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 17,17,19 - add 10,10,16 - xor 15,15,7 - xor 17,17,25 - add 10,10,15 - rotlwi 12,12,30 - xor 17,17,30 - add 10,10,9 - rotlwi 17,17,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 18,18,20 - add 9,9,17 - xor 15,15,12 - xor 18,18,26 - add 9,9,15 - rotlwi 11,11,30 - xor 18,18,31 - add 9,9,8 - rotlwi 18,18,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 19,19,21 - add 8,8,18 - xor 15,15,11 - xor 19,19,27 - add 8,8,15 - rotlwi 10,10,30 - xor 19,19,16 - add 8,8,7 - rotlwi 19,19,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 20,20,22 - add 7,7,19 - xor 15,15,10 - xor 20,20,28 - add 7,7,15 - rotlwi 9,9,30 - xor 20,20,17 - add 7,7,12 - rotlwi 20,20,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 21,21,23 - add 12,12,20 - xor 15,15,9 - xor 21,21,29 - add 12,12,15 - rotlwi 8,8,30 - xor 21,21,18 - add 12,12,11 - rotlwi 21,21,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 22,22,24 - add 11,11,21 - xor 15,15,8 - xor 22,22,30 - add 11,11,15 - rotlwi 7,7,30 - xor 22,22,19 - add 11,11,10 - rotlwi 22,22,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 23,23,25 - add 10,10,22 - xor 15,15,7 - xor 23,23,31 - add 10,10,15 - rotlwi 12,12,30 - xor 23,23,20 - add 10,10,9 - rotlwi 23,23,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 24,24,26 - add 9,9,23 - xor 15,15,12 - xor 24,24,16 - add 9,9,15 - rotlwi 11,11,30 - xor 24,24,21 - add 9,9,8 - rotlwi 24,24,1 - lis 0,0x8f1b - ori 0,0,0xbcdc - add 8,0,7 - rotlwi 7,9,5 - xor 25,25,27 - add 8,8,24 - and 15,10,11 - xor 25,25,17 - add 8,8,7 - or 6,10,11 - rotlwi 10,10,30 - xor 25,25,22 - and 6,6,12 - or 15,15,6 - rotlwi 25,25,1 - add 8,8,15 - add 7,0,12 - rotlwi 12,8,5 - xor 26,26,28 - add 7,7,25 - and 15,9,10 - xor 26,26,18 - add 7,7,12 - or 6,9,10 - rotlwi 9,9,30 - xor 26,26,23 - and 6,6,11 - or 15,15,6 - rotlwi 26,26,1 - add 7,7,15 - add 12,0,11 - rotlwi 11,7,5 - xor 27,27,29 - add 12,12,26 - and 15,8,9 - xor 27,27,19 - add 12,12,11 - or 6,8,9 - rotlwi 8,8,30 - xor 27,27,24 - and 6,6,10 - or 15,15,6 - rotlwi 27,27,1 - add 12,12,15 - add 11,0,10 - rotlwi 10,12,5 - xor 28,28,30 - add 11,11,27 - and 15,7,8 - xor 28,28,20 - add 11,11,10 - or 6,7,8 - rotlwi 7,7,30 - xor 28,28,25 - and 6,6,9 - or 15,15,6 - rotlwi 28,28,1 - add 11,11,15 - add 10,0,9 - rotlwi 9,11,5 - xor 29,29,31 - add 10,10,28 - and 15,12,7 - xor 29,29,21 - add 10,10,9 - or 6,12,7 - rotlwi 12,12,30 - xor 29,29,26 - and 6,6,8 - or 15,15,6 - rotlwi 29,29,1 - add 10,10,15 - add 9,0,8 - rotlwi 8,10,5 - xor 30,30,16 - add 9,9,29 - and 15,11,12 - xor 30,30,22 - add 9,9,8 - or 6,11,12 - rotlwi 11,11,30 - xor 30,30,27 - and 6,6,7 - or 15,15,6 - rotlwi 30,30,1 - add 9,9,15 - add 8,0,7 - rotlwi 7,9,5 - xor 31,31,17 - add 8,8,30 - and 15,10,11 - xor 31,31,23 - add 8,8,7 - or 6,10,11 - rotlwi 10,10,30 - xor 31,31,28 - and 6,6,12 - or 15,15,6 - rotlwi 31,31,1 - add 8,8,15 - add 7,0,12 - rotlwi 12,8,5 - xor 16,16,18 - add 7,7,31 - and 15,9,10 - xor 16,16,24 - add 7,7,12 - or 6,9,10 - rotlwi 9,9,30 - xor 16,16,29 - and 6,6,11 - or 15,15,6 - rotlwi 16,16,1 - add 7,7,15 - add 12,0,11 - rotlwi 11,7,5 - xor 17,17,19 - add 12,12,16 - and 15,8,9 - xor 17,17,25 - add 12,12,11 - or 6,8,9 - rotlwi 8,8,30 - xor 17,17,30 - and 6,6,10 - or 15,15,6 - rotlwi 17,17,1 - add 12,12,15 - add 11,0,10 - rotlwi 10,12,5 - xor 18,18,20 - add 11,11,17 - and 15,7,8 - xor 18,18,26 - add 11,11,10 - or 6,7,8 - rotlwi 7,7,30 - xor 18,18,31 - and 6,6,9 - or 15,15,6 - rotlwi 18,18,1 - add 11,11,15 - add 10,0,9 - rotlwi 9,11,5 - xor 19,19,21 - add 10,10,18 - and 15,12,7 - xor 19,19,27 - add 10,10,9 - or 6,12,7 - rotlwi 12,12,30 - xor 19,19,16 - and 6,6,8 - or 15,15,6 - rotlwi 19,19,1 - add 10,10,15 - add 9,0,8 - rotlwi 8,10,5 - xor 20,20,22 - add 9,9,19 - and 15,11,12 - xor 20,20,28 - add 9,9,8 - or 6,11,12 - rotlwi 11,11,30 - xor 20,20,17 - and 6,6,7 - or 15,15,6 - rotlwi 20,20,1 - add 9,9,15 - add 8,0,7 - rotlwi 7,9,5 - xor 21,21,23 - add 8,8,20 - and 15,10,11 - xor 21,21,29 - add 8,8,7 - or 6,10,11 - rotlwi 10,10,30 - xor 21,21,18 - and 6,6,12 - or 15,15,6 - rotlwi 21,21,1 - add 8,8,15 - add 7,0,12 - rotlwi 12,8,5 - xor 22,22,24 - add 7,7,21 - and 15,9,10 - xor 22,22,30 - add 7,7,12 - or 6,9,10 - rotlwi 9,9,30 - xor 22,22,19 - and 6,6,11 - or 15,15,6 - rotlwi 22,22,1 - add 7,7,15 - add 12,0,11 - rotlwi 11,7,5 - xor 23,23,25 - add 12,12,22 - and 15,8,9 - xor 23,23,31 - add 12,12,11 - or 6,8,9 - rotlwi 8,8,30 - xor 23,23,20 - and 6,6,10 - or 15,15,6 - rotlwi 23,23,1 - add 12,12,15 - add 11,0,10 - rotlwi 10,12,5 - xor 24,24,26 - add 11,11,23 - and 15,7,8 - xor 24,24,16 - add 11,11,10 - or 6,7,8 - rotlwi 7,7,30 - xor 24,24,21 - and 6,6,9 - or 15,15,6 - rotlwi 24,24,1 - add 11,11,15 - add 10,0,9 - rotlwi 9,11,5 - xor 25,25,27 - add 10,10,24 - and 15,12,7 - xor 25,25,17 - add 10,10,9 - or 6,12,7 - rotlwi 12,12,30 - xor 25,25,22 - and 6,6,8 - or 15,15,6 - rotlwi 25,25,1 - add 10,10,15 - add 9,0,8 - rotlwi 8,10,5 - xor 26,26,28 - add 9,9,25 - and 15,11,12 - xor 26,26,18 - add 9,9,8 - or 6,11,12 - rotlwi 11,11,30 - xor 26,26,23 - and 6,6,7 - or 15,15,6 - rotlwi 26,26,1 - add 9,9,15 - add 8,0,7 - rotlwi 7,9,5 - xor 27,27,29 - add 8,8,26 - and 15,10,11 - xor 27,27,19 - add 8,8,7 - or 6,10,11 - rotlwi 10,10,30 - xor 27,27,24 - and 6,6,12 - or 15,15,6 - rotlwi 27,27,1 - add 8,8,15 - add 7,0,12 - rotlwi 12,8,5 - xor 28,28,30 - add 7,7,27 - and 15,9,10 - xor 28,28,20 - add 7,7,12 - or 6,9,10 - rotlwi 9,9,30 - xor 28,28,25 - and 6,6,11 - or 15,15,6 - rotlwi 28,28,1 - add 7,7,15 - lis 0,0xca62 - ori 0,0,0xc1d6 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 29,29,31 - add 12,12,28 - xor 15,15,9 - xor 29,29,21 - add 12,12,15 - rotlwi 8,8,30 - xor 29,29,26 - add 12,12,11 - rotlwi 29,29,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 30,30,16 - add 11,11,29 - xor 15,15,8 - xor 30,30,22 - add 11,11,15 - rotlwi 7,7,30 - xor 30,30,27 - add 11,11,10 - rotlwi 30,30,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 31,31,17 - add 10,10,30 - xor 15,15,7 - xor 31,31,23 - add 10,10,15 - rotlwi 12,12,30 - xor 31,31,28 - add 10,10,9 - rotlwi 31,31,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 16,16,18 - add 9,9,31 - xor 15,15,12 - xor 16,16,24 - add 9,9,15 - rotlwi 11,11,30 - xor 16,16,29 - add 9,9,8 - rotlwi 16,16,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 17,17,19 - add 8,8,16 - xor 15,15,11 - xor 17,17,25 - add 8,8,15 - rotlwi 10,10,30 - xor 17,17,30 - add 8,8,7 - rotlwi 17,17,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 18,18,20 - add 7,7,17 - xor 15,15,10 - xor 18,18,26 - add 7,7,15 - rotlwi 9,9,30 - xor 18,18,31 - add 7,7,12 - rotlwi 18,18,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 19,19,21 - add 12,12,18 - xor 15,15,9 - xor 19,19,27 - add 12,12,15 - rotlwi 8,8,30 - xor 19,19,16 - add 12,12,11 - rotlwi 19,19,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 20,20,22 - add 11,11,19 - xor 15,15,8 - xor 20,20,28 - add 11,11,15 - rotlwi 7,7,30 - xor 20,20,17 - add 11,11,10 - rotlwi 20,20,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 21,21,23 - add 10,10,20 - xor 15,15,7 - xor 21,21,29 - add 10,10,15 - rotlwi 12,12,30 - xor 21,21,18 - add 10,10,9 - rotlwi 21,21,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 22,22,24 - add 9,9,21 - xor 15,15,12 - xor 22,22,30 - add 9,9,15 - rotlwi 11,11,30 - xor 22,22,19 - add 9,9,8 - rotlwi 22,22,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 23,23,25 - add 8,8,22 - xor 15,15,11 - xor 23,23,31 - add 8,8,15 - rotlwi 10,10,30 - xor 23,23,20 - add 8,8,7 - rotlwi 23,23,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 24,24,26 - add 7,7,23 - xor 15,15,10 - xor 24,24,16 - add 7,7,15 - rotlwi 9,9,30 - xor 24,24,21 - add 7,7,12 - rotlwi 24,24,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 25,25,27 - add 12,12,24 - xor 15,15,9 - xor 25,25,17 - add 12,12,15 - rotlwi 8,8,30 - xor 25,25,22 - add 12,12,11 - rotlwi 25,25,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - xor 26,26,28 - add 11,11,25 - xor 15,15,8 - xor 26,26,18 - add 11,11,15 - rotlwi 7,7,30 - xor 26,26,23 - add 11,11,10 - rotlwi 26,26,1 - add 10,0,9 - xor 15,12,8 - rotlwi 9,11,5 - xor 27,27,29 - add 10,10,26 - xor 15,15,7 - xor 27,27,19 - add 10,10,15 - rotlwi 12,12,30 - xor 27,27,24 - add 10,10,9 - rotlwi 27,27,1 - add 9,0,8 - xor 15,11,7 - rotlwi 8,10,5 - xor 28,28,30 - add 9,9,27 - xor 15,15,12 - xor 28,28,20 - add 9,9,15 - rotlwi 11,11,30 - xor 28,28,25 - add 9,9,8 - rotlwi 28,28,1 - add 8,0,7 - xor 15,10,12 - rotlwi 7,9,5 - xor 29,29,31 - add 8,8,28 - xor 15,15,11 - xor 29,29,21 - add 8,8,15 - rotlwi 10,10,30 - xor 29,29,26 - add 8,8,7 - rotlwi 29,29,1 - add 7,0,12 - xor 15,9,11 - rotlwi 12,8,5 - xor 30,30,16 - add 7,7,29 - xor 15,15,10 - xor 30,30,22 - add 7,7,15 - rotlwi 9,9,30 - xor 30,30,27 - add 7,7,12 - rotlwi 30,30,1 - add 12,0,11 - xor 15,8,10 - rotlwi 11,7,5 - xor 31,31,17 - add 12,12,30 - xor 15,15,9 - xor 31,31,23 - add 12,12,15 - rotlwi 8,8,30 - xor 31,31,28 - add 12,12,11 - rotlwi 31,31,1 - add 11,0,10 - xor 15,7,9 - rotlwi 10,12,5 - lwz 16,0(3) - add 11,11,31 - xor 15,15,8 - lwz 17,4(3) - add 11,11,15 - rotlwi 7,7,30 - lwz 18,8(3) - lwz 19,12(3) - add 11,11,10 - lwz 20,16(3) - add 16,16,11 - add 17,17,12 - add 18,18,7 - add 19,19,8 - add 20,20,9 - stw 16,0(3) - mr 7,16 - stw 17,4(3) - mr 8,17 - stw 18,8(3) - mr 9,18 - stw 19,12(3) - mr 10,19 - stw 20,16(3) - mr 11,20 - addi 4,4,64 - bdnz .Lsha1_block_private - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size sha1_block_data_order,.-sha1_block_data_order -.byte 83,72,65,49,32,98,108,111,99,107,32,116,114,97,110,115,102,111,114,109,32,102,111,114,32,80,80,67,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,102,121,46,99,104,97,108,109,101,114,115,46,115,101,62,0 -.align 2 diff --git a/sys/crypto/openssl/powerpc64le/sha256-ppc.S b/sys/crypto/openssl/powerpc64le/sha256-ppc.S deleted file mode 100644 index ffde833812e..00000000000 --- a/sys/crypto/openssl/powerpc64le/sha256-ppc.S +++ /dev/null @@ -1,1372 +0,0 @@ -/* Do not modify. This file is auto-generated from sha512-ppc.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl sha256_block_ppc -.type sha256_block_ppc,@function -.align 6 -sha256_block_ppc: -.localentry sha256_block_ppc,0 - - stdu 1,-320(1) - mflr 0 - sldi 5,5,6 - - std 3,144(1) - - std 14,176(1) - std 15,184(1) - std 16,192(1) - std 17,200(1) - std 18,208(1) - std 19,216(1) - std 20,224(1) - std 21,232(1) - std 22,240(1) - std 23,248(1) - std 24,256(1) - std 25,264(1) - std 26,272(1) - std 27,280(1) - std 28,288(1) - std 29,296(1) - std 30,304(1) - std 31,312(1) - std 0,336(1) - lwz 8,0(3) - mr 31,4 - lwz 9,4(3) - lwz 10,8(3) - lwz 11,12(3) - lwz 12,16(3) - lwz 6,20(3) - lwz 14,24(3) - lwz 15,28(3) - bl .LPICmeup -.LPICedup: - andi. 0,31,3 - bne .Lunaligned -.Laligned: - add 5,31,5 - std 5,128(1) - std 31,136(1) - bl .Lsha2_block_private - b .Ldone - - - - - - - -.align 4 -.Lunaligned: - subfic 0,31,4096 - andi. 0,0,4032 - beq .Lcross_page - cmpld 5,0 - ble .Laligned - subfc 5,0,5 - add 0,31,0 - std 5,120(1) - std 0,128(1) - std 31,136(1) - bl .Lsha2_block_private - - ld 5,120(1) -.Lcross_page: - li 0,16 - mtctr 0 - addi 20,1,48 -.Lmemcpy: - lbz 16,0(31) - lbz 17,1(31) - lbz 18,2(31) - lbz 19,3(31) - addi 31,31,4 - stb 16,0(20) - stb 17,1(20) - stb 18,2(20) - stb 19,3(20) - addi 20,20,4 - bdnz .Lmemcpy - std 31,112(1) - addi 0,1,112 - addi 31,1,48 - std 5,120(1) - std 0,128(1) - std 31,136(1) - bl .Lsha2_block_private - ld 31,112(1) - ld 5,120(1) - addic. 5,5,-64 - bne .Lunaligned - -.Ldone: - ld 0,336(1) - ld 14,176(1) - ld 15,184(1) - ld 16,192(1) - ld 17,200(1) - ld 18,208(1) - ld 19,216(1) - ld 20,224(1) - ld 21,232(1) - ld 22,240(1) - ld 23,248(1) - ld 24,256(1) - ld 25,264(1) - ld 26,272(1) - ld 27,280(1) - ld 28,288(1) - ld 29,296(1) - ld 30,304(1) - ld 31,312(1) - mtlr 0 - addi 1,1,320 - blr -.long 0 -.byte 0,12,4,1,0x80,18,3,0 -.long 0 -.align 4 -.Lsha2_block_private: - lwz 0,0(7) - lwz 3,0(31) - rotlwi 16,3,8 - rlwimi 16,3,24,0,7 - rlwimi 16,3,24,16,23 - rotrwi 3,12,6 - rotrwi 4,12,11 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrwi 4,4,14 - or 5,5,0 - add 15,15,16 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrwi 3,8,2 - rotrwi 4,8,13 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - lwz 0,4(7) - add 15,15,3 - add 15,15,5 - - lwz 3,4(31) - rotlwi 17,3,8 - rlwimi 17,3,24,0,7 - rlwimi 17,3,24,16,23 - rotrwi 3,11,6 - rotrwi 4,11,11 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrwi 4,4,14 - or 5,5,0 - add 14,14,17 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrwi 3,15,2 - rotrwi 4,15,13 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - lwz 0,8(7) - add 14,14,3 - add 14,14,5 - - lwz 3,8(31) - rotlwi 18,3,8 - rlwimi 18,3,24,0,7 - rlwimi 18,3,24,16,23 - rotrwi 3,10,6 - rotrwi 4,10,11 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrwi 4,4,14 - or 5,5,0 - add 6,6,18 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrwi 3,14,2 - rotrwi 4,14,13 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - lwz 0,12(7) - add 6,6,3 - add 6,6,5 - - lwz 3,12(31) - rotlwi 19,3,8 - rlwimi 19,3,24,0,7 - rlwimi 19,3,24,16,23 - rotrwi 3,9,6 - rotrwi 4,9,11 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrwi 4,4,14 - or 5,5,0 - add 12,12,19 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrwi 3,6,2 - rotrwi 4,6,13 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - lwz 0,16(7) - add 12,12,3 - add 12,12,5 - - lwz 3,16(31) - rotlwi 20,3,8 - rlwimi 20,3,24,0,7 - rlwimi 20,3,24,16,23 - rotrwi 3,8,6 - rotrwi 4,8,11 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrwi 4,4,14 - or 5,5,0 - add 11,11,20 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrwi 3,12,2 - rotrwi 4,12,13 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - lwz 0,20(7) - add 11,11,3 - add 11,11,5 - - lwz 3,20(31) - rotlwi 21,3,8 - rlwimi 21,3,24,0,7 - rlwimi 21,3,24,16,23 - rotrwi 3,15,6 - rotrwi 4,15,11 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrwi 4,4,14 - or 5,5,0 - add 10,10,21 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrwi 3,11,2 - rotrwi 4,11,13 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - lwz 0,24(7) - add 10,10,3 - add 10,10,5 - - lwz 3,24(31) - rotlwi 22,3,8 - rlwimi 22,3,24,0,7 - rlwimi 22,3,24,16,23 - rotrwi 3,14,6 - rotrwi 4,14,11 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrwi 4,4,14 - or 5,5,0 - add 9,9,22 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrwi 3,10,2 - rotrwi 4,10,13 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - lwz 0,28(7) - add 9,9,3 - add 9,9,5 - - lwz 3,28(31) - rotlwi 23,3,8 - rlwimi 23,3,24,0,7 - rlwimi 23,3,24,16,23 - rotrwi 3,6,6 - rotrwi 4,6,11 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrwi 4,4,14 - or 5,5,0 - add 8,8,23 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrwi 3,9,2 - rotrwi 4,9,13 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - lwz 0,32(7) - add 8,8,3 - add 8,8,5 - - lwz 3,32(31) - rotlwi 24,3,8 - rlwimi 24,3,24,0,7 - rlwimi 24,3,24,16,23 - rotrwi 3,12,6 - rotrwi 4,12,11 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrwi 4,4,14 - or 5,5,0 - add 15,15,24 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrwi 3,8,2 - rotrwi 4,8,13 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - lwz 0,36(7) - add 15,15,3 - add 15,15,5 - - lwz 3,36(31) - rotlwi 25,3,8 - rlwimi 25,3,24,0,7 - rlwimi 25,3,24,16,23 - rotrwi 3,11,6 - rotrwi 4,11,11 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrwi 4,4,14 - or 5,5,0 - add 14,14,25 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrwi 3,15,2 - rotrwi 4,15,13 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - lwz 0,40(7) - add 14,14,3 - add 14,14,5 - - lwz 3,40(31) - rotlwi 26,3,8 - rlwimi 26,3,24,0,7 - rlwimi 26,3,24,16,23 - rotrwi 3,10,6 - rotrwi 4,10,11 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrwi 4,4,14 - or 5,5,0 - add 6,6,26 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrwi 3,14,2 - rotrwi 4,14,13 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - lwz 0,44(7) - add 6,6,3 - add 6,6,5 - - lwz 3,44(31) - rotlwi 27,3,8 - rlwimi 27,3,24,0,7 - rlwimi 27,3,24,16,23 - rotrwi 3,9,6 - rotrwi 4,9,11 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrwi 4,4,14 - or 5,5,0 - add 12,12,27 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrwi 3,6,2 - rotrwi 4,6,13 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - lwz 0,48(7) - add 12,12,3 - add 12,12,5 - - lwz 3,48(31) - rotlwi 28,3,8 - rlwimi 28,3,24,0,7 - rlwimi 28,3,24,16,23 - rotrwi 3,8,6 - rotrwi 4,8,11 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrwi 4,4,14 - or 5,5,0 - add 11,11,28 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrwi 3,12,2 - rotrwi 4,12,13 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - lwz 0,52(7) - add 11,11,3 - add 11,11,5 - - lwz 3,52(31) - rotlwi 29,3,8 - rlwimi 29,3,24,0,7 - rlwimi 29,3,24,16,23 - rotrwi 3,15,6 - rotrwi 4,15,11 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrwi 4,4,14 - or 5,5,0 - add 10,10,29 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrwi 3,11,2 - rotrwi 4,11,13 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - lwz 0,56(7) - add 10,10,3 - add 10,10,5 - - lwz 3,56(31) - rotlwi 30,3,8 - rlwimi 30,3,24,0,7 - rlwimi 30,3,24,16,23 - rotrwi 3,14,6 - rotrwi 4,14,11 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrwi 4,4,14 - or 5,5,0 - add 9,9,30 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrwi 3,10,2 - rotrwi 4,10,13 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - lwz 0,60(7) - add 9,9,3 - add 9,9,5 - - lwz 3,60(31) - rotlwi 31,3,8 - rlwimi 31,3,24,0,7 - rlwimi 31,3,24,16,23 - rotrwi 3,6,6 - rotrwi 4,6,11 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrwi 4,4,14 - or 5,5,0 - add 8,8,31 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrwi 3,9,2 - rotrwi 4,9,13 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - add 8,8,3 - add 8,8,5 - - li 5,3 - mtctr 5 -.align 4 -.Lrounds: - addi 7,7,64 - rotrwi 3,17,7 - rotrwi 4,17,18 - rotrwi 5,30,17 - rotrwi 0,30,19 - xor 3,3,4 - srwi 4,17,3 - xor 5,5,0 - srwi 0,30,10 - add 16,16,25 - xor 3,3,4 - xor 5,5,0 - lwz 0,0(7) - add 16,16,3 - add 16,16,5 - rotrwi 3,12,6 - rotrwi 4,12,11 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrwi 4,4,14 - or 5,5,0 - add 15,15,16 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrwi 3,8,2 - rotrwi 4,8,13 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - add 15,15,3 - add 15,15,5 - - rotrwi 3,18,7 - rotrwi 4,18,18 - rotrwi 5,31,17 - rotrwi 0,31,19 - xor 3,3,4 - srwi 4,18,3 - xor 5,5,0 - srwi 0,31,10 - add 17,17,26 - xor 3,3,4 - xor 5,5,0 - lwz 0,4(7) - add 17,17,3 - add 17,17,5 - rotrwi 3,11,6 - rotrwi 4,11,11 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrwi 4,4,14 - or 5,5,0 - add 14,14,17 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrwi 3,15,2 - rotrwi 4,15,13 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - add 14,14,3 - add 14,14,5 - - rotrwi 3,19,7 - rotrwi 4,19,18 - rotrwi 5,16,17 - rotrwi 0,16,19 - xor 3,3,4 - srwi 4,19,3 - xor 5,5,0 - srwi 0,16,10 - add 18,18,27 - xor 3,3,4 - xor 5,5,0 - lwz 0,8(7) - add 18,18,3 - add 18,18,5 - rotrwi 3,10,6 - rotrwi 4,10,11 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrwi 4,4,14 - or 5,5,0 - add 6,6,18 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrwi 3,14,2 - rotrwi 4,14,13 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - add 6,6,3 - add 6,6,5 - - rotrwi 3,20,7 - rotrwi 4,20,18 - rotrwi 5,17,17 - rotrwi 0,17,19 - xor 3,3,4 - srwi 4,20,3 - xor 5,5,0 - srwi 0,17,10 - add 19,19,28 - xor 3,3,4 - xor 5,5,0 - lwz 0,12(7) - add 19,19,3 - add 19,19,5 - rotrwi 3,9,6 - rotrwi 4,9,11 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrwi 4,4,14 - or 5,5,0 - add 12,12,19 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrwi 3,6,2 - rotrwi 4,6,13 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - add 12,12,3 - add 12,12,5 - - rotrwi 3,21,7 - rotrwi 4,21,18 - rotrwi 5,18,17 - rotrwi 0,18,19 - xor 3,3,4 - srwi 4,21,3 - xor 5,5,0 - srwi 0,18,10 - add 20,20,29 - xor 3,3,4 - xor 5,5,0 - lwz 0,16(7) - add 20,20,3 - add 20,20,5 - rotrwi 3,8,6 - rotrwi 4,8,11 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrwi 4,4,14 - or 5,5,0 - add 11,11,20 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrwi 3,12,2 - rotrwi 4,12,13 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - add 11,11,3 - add 11,11,5 - - rotrwi 3,22,7 - rotrwi 4,22,18 - rotrwi 5,19,17 - rotrwi 0,19,19 - xor 3,3,4 - srwi 4,22,3 - xor 5,5,0 - srwi 0,19,10 - add 21,21,30 - xor 3,3,4 - xor 5,5,0 - lwz 0,20(7) - add 21,21,3 - add 21,21,5 - rotrwi 3,15,6 - rotrwi 4,15,11 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrwi 4,4,14 - or 5,5,0 - add 10,10,21 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrwi 3,11,2 - rotrwi 4,11,13 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - add 10,10,3 - add 10,10,5 - - rotrwi 3,23,7 - rotrwi 4,23,18 - rotrwi 5,20,17 - rotrwi 0,20,19 - xor 3,3,4 - srwi 4,23,3 - xor 5,5,0 - srwi 0,20,10 - add 22,22,31 - xor 3,3,4 - xor 5,5,0 - lwz 0,24(7) - add 22,22,3 - add 22,22,5 - rotrwi 3,14,6 - rotrwi 4,14,11 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrwi 4,4,14 - or 5,5,0 - add 9,9,22 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrwi 3,10,2 - rotrwi 4,10,13 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - add 9,9,3 - add 9,9,5 - - rotrwi 3,24,7 - rotrwi 4,24,18 - rotrwi 5,21,17 - rotrwi 0,21,19 - xor 3,3,4 - srwi 4,24,3 - xor 5,5,0 - srwi 0,21,10 - add 23,23,16 - xor 3,3,4 - xor 5,5,0 - lwz 0,28(7) - add 23,23,3 - add 23,23,5 - rotrwi 3,6,6 - rotrwi 4,6,11 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrwi 4,4,14 - or 5,5,0 - add 8,8,23 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrwi 3,9,2 - rotrwi 4,9,13 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - add 8,8,3 - add 8,8,5 - - rotrwi 3,25,7 - rotrwi 4,25,18 - rotrwi 5,22,17 - rotrwi 0,22,19 - xor 3,3,4 - srwi 4,25,3 - xor 5,5,0 - srwi 0,22,10 - add 24,24,17 - xor 3,3,4 - xor 5,5,0 - lwz 0,32(7) - add 24,24,3 - add 24,24,5 - rotrwi 3,12,6 - rotrwi 4,12,11 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrwi 4,4,14 - or 5,5,0 - add 15,15,24 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrwi 3,8,2 - rotrwi 4,8,13 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - add 15,15,3 - add 15,15,5 - - rotrwi 3,26,7 - rotrwi 4,26,18 - rotrwi 5,23,17 - rotrwi 0,23,19 - xor 3,3,4 - srwi 4,26,3 - xor 5,5,0 - srwi 0,23,10 - add 25,25,18 - xor 3,3,4 - xor 5,5,0 - lwz 0,36(7) - add 25,25,3 - add 25,25,5 - rotrwi 3,11,6 - rotrwi 4,11,11 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrwi 4,4,14 - or 5,5,0 - add 14,14,25 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrwi 3,15,2 - rotrwi 4,15,13 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - add 14,14,3 - add 14,14,5 - - rotrwi 3,27,7 - rotrwi 4,27,18 - rotrwi 5,24,17 - rotrwi 0,24,19 - xor 3,3,4 - srwi 4,27,3 - xor 5,5,0 - srwi 0,24,10 - add 26,26,19 - xor 3,3,4 - xor 5,5,0 - lwz 0,40(7) - add 26,26,3 - add 26,26,5 - rotrwi 3,10,6 - rotrwi 4,10,11 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrwi 4,4,14 - or 5,5,0 - add 6,6,26 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrwi 3,14,2 - rotrwi 4,14,13 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - add 6,6,3 - add 6,6,5 - - rotrwi 3,28,7 - rotrwi 4,28,18 - rotrwi 5,25,17 - rotrwi 0,25,19 - xor 3,3,4 - srwi 4,28,3 - xor 5,5,0 - srwi 0,25,10 - add 27,27,20 - xor 3,3,4 - xor 5,5,0 - lwz 0,44(7) - add 27,27,3 - add 27,27,5 - rotrwi 3,9,6 - rotrwi 4,9,11 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrwi 4,4,14 - or 5,5,0 - add 12,12,27 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrwi 3,6,2 - rotrwi 4,6,13 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - add 12,12,3 - add 12,12,5 - - rotrwi 3,29,7 - rotrwi 4,29,18 - rotrwi 5,26,17 - rotrwi 0,26,19 - xor 3,3,4 - srwi 4,29,3 - xor 5,5,0 - srwi 0,26,10 - add 28,28,21 - xor 3,3,4 - xor 5,5,0 - lwz 0,48(7) - add 28,28,3 - add 28,28,5 - rotrwi 3,8,6 - rotrwi 4,8,11 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrwi 4,4,14 - or 5,5,0 - add 11,11,28 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrwi 3,12,2 - rotrwi 4,12,13 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - add 11,11,3 - add 11,11,5 - - rotrwi 3,30,7 - rotrwi 4,30,18 - rotrwi 5,27,17 - rotrwi 0,27,19 - xor 3,3,4 - srwi 4,30,3 - xor 5,5,0 - srwi 0,27,10 - add 29,29,22 - xor 3,3,4 - xor 5,5,0 - lwz 0,52(7) - add 29,29,3 - add 29,29,5 - rotrwi 3,15,6 - rotrwi 4,15,11 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrwi 4,4,14 - or 5,5,0 - add 10,10,29 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrwi 3,11,2 - rotrwi 4,11,13 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - add 10,10,3 - add 10,10,5 - - rotrwi 3,31,7 - rotrwi 4,31,18 - rotrwi 5,28,17 - rotrwi 0,28,19 - xor 3,3,4 - srwi 4,31,3 - xor 5,5,0 - srwi 0,28,10 - add 30,30,23 - xor 3,3,4 - xor 5,5,0 - lwz 0,56(7) - add 30,30,3 - add 30,30,5 - rotrwi 3,14,6 - rotrwi 4,14,11 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrwi 4,4,14 - or 5,5,0 - add 9,9,30 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrwi 3,10,2 - rotrwi 4,10,13 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - add 9,9,3 - add 9,9,5 - - rotrwi 3,16,7 - rotrwi 4,16,18 - rotrwi 5,29,17 - rotrwi 0,29,19 - xor 3,3,4 - srwi 4,16,3 - xor 5,5,0 - srwi 0,29,10 - add 31,31,24 - xor 3,3,4 - xor 5,5,0 - lwz 0,60(7) - add 31,31,3 - add 31,31,5 - rotrwi 3,6,6 - rotrwi 4,6,11 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrwi 4,4,14 - or 5,5,0 - add 8,8,31 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrwi 3,9,2 - rotrwi 4,9,13 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrwi 4,4,9 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - add 8,8,3 - add 8,8,5 - - bdnz .Lrounds - - ld 3,144(1) - ld 31,136(1) - ld 5,128(1) - subi 7,7,192 - - lwz 16,0(3) - lwz 17,4(3) - lwz 18,8(3) - lwz 19,12(3) - lwz 20,16(3) - lwz 21,20(3) - lwz 22,24(3) - addi 31,31,64 - lwz 23,28(3) - add 8,8,16 - add 9,9,17 - std 31,136(1) - add 10,10,18 - stw 8,0(3) - add 11,11,19 - stw 9,4(3) - add 12,12,20 - stw 10,8(3) - add 6,6,21 - stw 11,12(3) - add 14,14,22 - stw 12,16(3) - add 15,15,23 - stw 6,20(3) - stw 14,24(3) - cmpld 31,5 - stw 15,28(3) - bne .Lsha2_block_private - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size sha256_block_ppc,.-sha256_block_ppc -.align 6 -.LPICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 7 - addi 7,7,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.long 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5 -.long 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5 -.long 0xd807aa98,0x12835b01,0x243185be,0x550c7dc3 -.long 0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174 -.long 0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc -.long 0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da -.long 0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7 -.long 0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967 -.long 0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13 -.long 0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85 -.long 0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3 -.long 0xd192e819,0xd6990624,0xf40e3585,0x106aa070 -.long 0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5 -.long 0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3 -.long 0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208 -.long 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2 diff --git a/sys/crypto/openssl/powerpc64le/sha256p8-ppc.S b/sys/crypto/openssl/powerpc64le/sha256p8-ppc.S deleted file mode 100644 index 008313c9df8..00000000000 --- a/sys/crypto/openssl/powerpc64le/sha256p8-ppc.S +++ /dev/null @@ -1,746 +0,0 @@ -/* Do not modify. This file is auto-generated from sha512p8-ppc.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl sha256_block_p8 -.type sha256_block_p8,@function -.align 6 -sha256_block_p8: -.localentry sha256_block_p8,0 - - stdu 1,-384(1) - mflr 8 - li 10,207 - li 11,223 - stvx 24,10,1 - addi 10,10,32 - li 12,-1 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - li 11,-4096+255 - stw 12,332(1) - li 10,0x10 - std 26,336(1) - li 26,0x20 - std 27,344(1) - li 27,0x30 - std 28,352(1) - li 28,0x40 - std 29,360(1) - li 29,0x50 - std 30,368(1) - li 30,0x60 - std 31,376(1) - li 31,0x70 - std 8,400(1) - or 11,11,11 - - bl .LPICmeup - addi 11,1,79 - li 7,8 - lvsl 31,0,7 - vspltisb 28,0x0f - vxor 31,31,28 - .long 0x7C001E19 - .long 0x7C8A1E19 - vsldoi 1,0,0,4 - vsldoi 2,0,0,8 - vsldoi 3,0,0,12 - vsldoi 5,4,4,4 - vsldoi 6,4,4,8 - vsldoi 7,4,4,12 - li 0,3 - b .Loop -.align 5 -.Loop: - lvx 28,0,6 - .long 0x7D002699 - addi 4,4,16 - mr 7,6 - stvx 0,0,11 - stvx 1,10,11 - stvx 2,26,11 - stvx 3,27,11 - stvx 4,28,11 - stvx 5,29,11 - stvx 6,30,11 - stvx 7,31,11 - vadduwm 7,7,28 - lvx 28,10,6 - vperm 8,8,8,31 - vadduwm 7,7,8 - vsel 29,6,5,4 - vadduwm 6,6,28 - vadduwm 7,7,29 - .long 0x13C4FE82 - vadduwm 7,7,30 - vxor 29,0,1 - vsel 29,1,2,29 - vadduwm 3,3,7 - .long 0x13C08682 - vadduwm 30,30,29 - vadduwm 7,7,30 - lvx 28,26,7 - vsldoi 9,8,8,4 - vadduwm 6,6,9 - vsel 29,5,4,3 - vadduwm 5,5,28 - vadduwm 6,6,29 - .long 0x13C3FE82 - vadduwm 6,6,30 - vxor 29,7,0 - vsel 29,0,1,29 - vadduwm 2,2,6 - .long 0x13C78682 - vadduwm 30,30,29 - vadduwm 6,6,30 - lvx 28,27,7 - vsldoi 10,9,9,4 - vadduwm 5,5,10 - vsel 29,4,3,2 - vadduwm 4,4,28 - vadduwm 5,5,29 - .long 0x13C2FE82 - vadduwm 5,5,30 - vxor 29,6,7 - vsel 29,7,0,29 - vadduwm 1,1,5 - .long 0x13C68682 - vadduwm 30,30,29 - vadduwm 5,5,30 - lvx 28,28,7 - .long 0x7D802699 - addi 4,4,16 - vsldoi 11,10,10,4 - vadduwm 4,4,11 - vsel 29,3,2,1 - vadduwm 3,3,28 - vadduwm 4,4,29 - .long 0x13C1FE82 - vadduwm 4,4,30 - vxor 29,5,6 - vsel 29,6,7,29 - vadduwm 0,0,4 - .long 0x13C58682 - vadduwm 30,30,29 - vadduwm 4,4,30 - lvx 28,29,7 - vperm 12,12,12,31 - vadduwm 3,3,12 - vsel 29,2,1,0 - vadduwm 2,2,28 - vadduwm 3,3,29 - .long 0x13C0FE82 - vadduwm 3,3,30 - vxor 29,4,5 - vsel 29,5,6,29 - vadduwm 7,7,3 - .long 0x13C48682 - vadduwm 30,30,29 - vadduwm 3,3,30 - lvx 28,30,7 - vsldoi 13,12,12,4 - vadduwm 2,2,13 - vsel 29,1,0,7 - vadduwm 1,1,28 - vadduwm 2,2,29 - .long 0x13C7FE82 - vadduwm 2,2,30 - vxor 29,3,4 - vsel 29,4,5,29 - vadduwm 6,6,2 - .long 0x13C38682 - vadduwm 30,30,29 - vadduwm 2,2,30 - lvx 28,31,7 - addi 7,7,0x80 - vsldoi 14,13,13,4 - vadduwm 1,1,14 - vsel 29,0,7,6 - vadduwm 0,0,28 - vadduwm 1,1,29 - .long 0x13C6FE82 - vadduwm 1,1,30 - vxor 29,2,3 - vsel 29,3,4,29 - vadduwm 5,5,1 - .long 0x13C28682 - vadduwm 30,30,29 - vadduwm 1,1,30 - lvx 28,0,7 - .long 0x7E002699 - addi 4,4,16 - vsldoi 15,14,14,4 - vadduwm 0,0,15 - vsel 29,7,6,5 - vadduwm 7,7,28 - vadduwm 0,0,29 - .long 0x13C5FE82 - vadduwm 0,0,30 - vxor 29,1,2 - vsel 29,2,3,29 - vadduwm 4,4,0 - .long 0x13C18682 - vadduwm 30,30,29 - vadduwm 0,0,30 - lvx 28,10,7 - vperm 16,16,16,31 - vadduwm 7,7,16 - vsel 29,6,5,4 - vadduwm 6,6,28 - vadduwm 7,7,29 - .long 0x13C4FE82 - vadduwm 7,7,30 - vxor 29,0,1 - vsel 29,1,2,29 - vadduwm 3,3,7 - .long 0x13C08682 - vadduwm 30,30,29 - vadduwm 7,7,30 - lvx 28,26,7 - vsldoi 17,16,16,4 - vadduwm 6,6,17 - vsel 29,5,4,3 - vadduwm 5,5,28 - vadduwm 6,6,29 - .long 0x13C3FE82 - vadduwm 6,6,30 - vxor 29,7,0 - vsel 29,0,1,29 - vadduwm 2,2,6 - .long 0x13C78682 - vadduwm 30,30,29 - vadduwm 6,6,30 - lvx 28,27,7 - vsldoi 18,17,17,4 - vadduwm 5,5,18 - vsel 29,4,3,2 - vadduwm 4,4,28 - vadduwm 5,5,29 - .long 0x13C2FE82 - vadduwm 5,5,30 - vxor 29,6,7 - vsel 29,7,0,29 - vadduwm 1,1,5 - .long 0x13C68682 - vadduwm 30,30,29 - vadduwm 5,5,30 - lvx 28,28,7 - .long 0x7F002699 - addi 4,4,16 - vsldoi 19,18,18,4 - vadduwm 4,4,19 - vsel 29,3,2,1 - vadduwm 3,3,28 - vadduwm 4,4,29 - .long 0x13C1FE82 - vadduwm 4,4,30 - vxor 29,5,6 - vsel 29,6,7,29 - vadduwm 0,0,4 - .long 0x13C58682 - vadduwm 30,30,29 - vadduwm 4,4,30 - lvx 28,29,7 - vperm 24,24,24,31 - vadduwm 3,3,24 - vsel 29,2,1,0 - vadduwm 2,2,28 - vadduwm 3,3,29 - .long 0x13C0FE82 - vadduwm 3,3,30 - vxor 29,4,5 - vsel 29,5,6,29 - vadduwm 7,7,3 - .long 0x13C48682 - vadduwm 30,30,29 - vadduwm 3,3,30 - lvx 28,30,7 - vsldoi 25,24,24,4 - vadduwm 2,2,25 - vsel 29,1,0,7 - vadduwm 1,1,28 - vadduwm 2,2,29 - .long 0x13C7FE82 - vadduwm 2,2,30 - vxor 29,3,4 - vsel 29,4,5,29 - vadduwm 6,6,2 - .long 0x13C38682 - vadduwm 30,30,29 - vadduwm 2,2,30 - lvx 28,31,7 - addi 7,7,0x80 - vsldoi 26,25,25,4 - vadduwm 1,1,26 - vsel 29,0,7,6 - vadduwm 0,0,28 - vadduwm 1,1,29 - .long 0x13C6FE82 - vadduwm 1,1,30 - vxor 29,2,3 - vsel 29,3,4,29 - vadduwm 5,5,1 - .long 0x13C28682 - vadduwm 30,30,29 - vadduwm 1,1,30 - lvx 28,0,7 - vsldoi 27,26,26,4 - .long 0x13C90682 - vadduwm 8,8,30 - .long 0x13DA7E82 - vadduwm 8,8,30 - vadduwm 8,8,17 - vadduwm 0,0,27 - vsel 29,7,6,5 - vadduwm 7,7,28 - vadduwm 0,0,29 - .long 0x13C5FE82 - vadduwm 0,0,30 - vxor 29,1,2 - vsel 29,2,3,29 - vadduwm 4,4,0 - .long 0x13C18682 - vadduwm 30,30,29 - vadduwm 0,0,30 - lvx 28,10,7 - mtctr 0 - b .L16_xx -.align 5 -.L16_xx: - .long 0x13CA0682 - vadduwm 9,9,30 - .long 0x13DB7E82 - vadduwm 9,9,30 - vadduwm 9,9,18 - vadduwm 7,7,8 - vsel 29,6,5,4 - vadduwm 6,6,28 - vadduwm 7,7,29 - .long 0x13C4FE82 - vadduwm 7,7,30 - vxor 29,0,1 - vsel 29,1,2,29 - vadduwm 3,3,7 - .long 0x13C08682 - vadduwm 30,30,29 - vadduwm 7,7,30 - lvx 28,26,7 - .long 0x13CB0682 - vadduwm 10,10,30 - .long 0x13C87E82 - vadduwm 10,10,30 - vadduwm 10,10,19 - vadduwm 6,6,9 - vsel 29,5,4,3 - vadduwm 5,5,28 - vadduwm 6,6,29 - .long 0x13C3FE82 - vadduwm 6,6,30 - vxor 29,7,0 - vsel 29,0,1,29 - vadduwm 2,2,6 - .long 0x13C78682 - vadduwm 30,30,29 - vadduwm 6,6,30 - lvx 28,27,7 - .long 0x13CC0682 - vadduwm 11,11,30 - .long 0x13C97E82 - vadduwm 11,11,30 - vadduwm 11,11,24 - vadduwm 5,5,10 - vsel 29,4,3,2 - vadduwm 4,4,28 - vadduwm 5,5,29 - .long 0x13C2FE82 - vadduwm 5,5,30 - vxor 29,6,7 - vsel 29,7,0,29 - vadduwm 1,1,5 - .long 0x13C68682 - vadduwm 30,30,29 - vadduwm 5,5,30 - lvx 28,28,7 - .long 0x13CD0682 - vadduwm 12,12,30 - .long 0x13CA7E82 - vadduwm 12,12,30 - vadduwm 12,12,25 - vadduwm 4,4,11 - vsel 29,3,2,1 - vadduwm 3,3,28 - vadduwm 4,4,29 - .long 0x13C1FE82 - vadduwm 4,4,30 - vxor 29,5,6 - vsel 29,6,7,29 - vadduwm 0,0,4 - .long 0x13C58682 - vadduwm 30,30,29 - vadduwm 4,4,30 - lvx 28,29,7 - .long 0x13CE0682 - vadduwm 13,13,30 - .long 0x13CB7E82 - vadduwm 13,13,30 - vadduwm 13,13,26 - vadduwm 3,3,12 - vsel 29,2,1,0 - vadduwm 2,2,28 - vadduwm 3,3,29 - .long 0x13C0FE82 - vadduwm 3,3,30 - vxor 29,4,5 - vsel 29,5,6,29 - vadduwm 7,7,3 - .long 0x13C48682 - vadduwm 30,30,29 - vadduwm 3,3,30 - lvx 28,30,7 - .long 0x13CF0682 - vadduwm 14,14,30 - .long 0x13CC7E82 - vadduwm 14,14,30 - vadduwm 14,14,27 - vadduwm 2,2,13 - vsel 29,1,0,7 - vadduwm 1,1,28 - vadduwm 2,2,29 - .long 0x13C7FE82 - vadduwm 2,2,30 - vxor 29,3,4 - vsel 29,4,5,29 - vadduwm 6,6,2 - .long 0x13C38682 - vadduwm 30,30,29 - vadduwm 2,2,30 - lvx 28,31,7 - addi 7,7,0x80 - .long 0x13D00682 - vadduwm 15,15,30 - .long 0x13CD7E82 - vadduwm 15,15,30 - vadduwm 15,15,8 - vadduwm 1,1,14 - vsel 29,0,7,6 - vadduwm 0,0,28 - vadduwm 1,1,29 - .long 0x13C6FE82 - vadduwm 1,1,30 - vxor 29,2,3 - vsel 29,3,4,29 - vadduwm 5,5,1 - .long 0x13C28682 - vadduwm 30,30,29 - vadduwm 1,1,30 - lvx 28,0,7 - .long 0x13D10682 - vadduwm 16,16,30 - .long 0x13CE7E82 - vadduwm 16,16,30 - vadduwm 16,16,9 - vadduwm 0,0,15 - vsel 29,7,6,5 - vadduwm 7,7,28 - vadduwm 0,0,29 - .long 0x13C5FE82 - vadduwm 0,0,30 - vxor 29,1,2 - vsel 29,2,3,29 - vadduwm 4,4,0 - .long 0x13C18682 - vadduwm 30,30,29 - vadduwm 0,0,30 - lvx 28,10,7 - .long 0x13D20682 - vadduwm 17,17,30 - .long 0x13CF7E82 - vadduwm 17,17,30 - vadduwm 17,17,10 - vadduwm 7,7,16 - vsel 29,6,5,4 - vadduwm 6,6,28 - vadduwm 7,7,29 - .long 0x13C4FE82 - vadduwm 7,7,30 - vxor 29,0,1 - vsel 29,1,2,29 - vadduwm 3,3,7 - .long 0x13C08682 - vadduwm 30,30,29 - vadduwm 7,7,30 - lvx 28,26,7 - .long 0x13D30682 - vadduwm 18,18,30 - .long 0x13D07E82 - vadduwm 18,18,30 - vadduwm 18,18,11 - vadduwm 6,6,17 - vsel 29,5,4,3 - vadduwm 5,5,28 - vadduwm 6,6,29 - .long 0x13C3FE82 - vadduwm 6,6,30 - vxor 29,7,0 - vsel 29,0,1,29 - vadduwm 2,2,6 - .long 0x13C78682 - vadduwm 30,30,29 - vadduwm 6,6,30 - lvx 28,27,7 - .long 0x13D80682 - vadduwm 19,19,30 - .long 0x13D17E82 - vadduwm 19,19,30 - vadduwm 19,19,12 - vadduwm 5,5,18 - vsel 29,4,3,2 - vadduwm 4,4,28 - vadduwm 5,5,29 - .long 0x13C2FE82 - vadduwm 5,5,30 - vxor 29,6,7 - vsel 29,7,0,29 - vadduwm 1,1,5 - .long 0x13C68682 - vadduwm 30,30,29 - vadduwm 5,5,30 - lvx 28,28,7 - .long 0x13D90682 - vadduwm 24,24,30 - .long 0x13D27E82 - vadduwm 24,24,30 - vadduwm 24,24,13 - vadduwm 4,4,19 - vsel 29,3,2,1 - vadduwm 3,3,28 - vadduwm 4,4,29 - .long 0x13C1FE82 - vadduwm 4,4,30 - vxor 29,5,6 - vsel 29,6,7,29 - vadduwm 0,0,4 - .long 0x13C58682 - vadduwm 30,30,29 - vadduwm 4,4,30 - lvx 28,29,7 - .long 0x13DA0682 - vadduwm 25,25,30 - .long 0x13D37E82 - vadduwm 25,25,30 - vadduwm 25,25,14 - vadduwm 3,3,24 - vsel 29,2,1,0 - vadduwm 2,2,28 - vadduwm 3,3,29 - .long 0x13C0FE82 - vadduwm 3,3,30 - vxor 29,4,5 - vsel 29,5,6,29 - vadduwm 7,7,3 - .long 0x13C48682 - vadduwm 30,30,29 - vadduwm 3,3,30 - lvx 28,30,7 - .long 0x13DB0682 - vadduwm 26,26,30 - .long 0x13D87E82 - vadduwm 26,26,30 - vadduwm 26,26,15 - vadduwm 2,2,25 - vsel 29,1,0,7 - vadduwm 1,1,28 - vadduwm 2,2,29 - .long 0x13C7FE82 - vadduwm 2,2,30 - vxor 29,3,4 - vsel 29,4,5,29 - vadduwm 6,6,2 - .long 0x13C38682 - vadduwm 30,30,29 - vadduwm 2,2,30 - lvx 28,31,7 - addi 7,7,0x80 - .long 0x13C80682 - vadduwm 27,27,30 - .long 0x13D97E82 - vadduwm 27,27,30 - vadduwm 27,27,16 - vadduwm 1,1,26 - vsel 29,0,7,6 - vadduwm 0,0,28 - vadduwm 1,1,29 - .long 0x13C6FE82 - vadduwm 1,1,30 - vxor 29,2,3 - vsel 29,3,4,29 - vadduwm 5,5,1 - .long 0x13C28682 - vadduwm 30,30,29 - vadduwm 1,1,30 - lvx 28,0,7 - .long 0x13C90682 - vadduwm 8,8,30 - .long 0x13DA7E82 - vadduwm 8,8,30 - vadduwm 8,8,17 - vadduwm 0,0,27 - vsel 29,7,6,5 - vadduwm 7,7,28 - vadduwm 0,0,29 - .long 0x13C5FE82 - vadduwm 0,0,30 - vxor 29,1,2 - vsel 29,2,3,29 - vadduwm 4,4,0 - .long 0x13C18682 - vadduwm 30,30,29 - vadduwm 0,0,30 - lvx 28,10,7 - bdnz .L16_xx - - lvx 10,0,11 - subic. 5,5,1 - lvx 11,10,11 - vadduwm 0,0,10 - lvx 12,26,11 - vadduwm 1,1,11 - lvx 13,27,11 - vadduwm 2,2,12 - lvx 14,28,11 - vadduwm 3,3,13 - lvx 15,29,11 - vadduwm 4,4,14 - lvx 16,30,11 - vadduwm 5,5,15 - lvx 17,31,11 - vadduwm 6,6,16 - vadduwm 7,7,17 - bne .Loop - lvx 8,26,7 - vperm 0,0,1,28 - lvx 9,27,7 - vperm 4,4,5,28 - vperm 0,0,2,8 - vperm 4,4,6,8 - vperm 0,0,3,9 - vperm 4,4,7,9 - .long 0x7C001F19 - .long 0x7C8A1F19 - addi 11,1,207 - mtlr 8 - or 12,12,12 - lvx 24,0,11 - lvx 25,10,11 - lvx 26,26,11 - lvx 27,27,11 - lvx 28,28,11 - lvx 29,29,11 - lvx 30,30,11 - lvx 31,31,11 - ld 26,336(1) - ld 27,344(1) - ld 28,352(1) - ld 29,360(1) - ld 30,368(1) - ld 31,376(1) - addi 1,1,384 - blr -.long 0 -.byte 0,12,4,1,0x80,6,3,0 -.long 0 -.size sha256_block_p8,.-sha256_block_p8 -.align 6 -.LPICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 6 - addi 6,6,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.long 0x428a2f98,0x428a2f98,0x428a2f98,0x428a2f98 -.long 0x71374491,0x71374491,0x71374491,0x71374491 -.long 0xb5c0fbcf,0xb5c0fbcf,0xb5c0fbcf,0xb5c0fbcf -.long 0xe9b5dba5,0xe9b5dba5,0xe9b5dba5,0xe9b5dba5 -.long 0x3956c25b,0x3956c25b,0x3956c25b,0x3956c25b -.long 0x59f111f1,0x59f111f1,0x59f111f1,0x59f111f1 -.long 0x923f82a4,0x923f82a4,0x923f82a4,0x923f82a4 -.long 0xab1c5ed5,0xab1c5ed5,0xab1c5ed5,0xab1c5ed5 -.long 0xd807aa98,0xd807aa98,0xd807aa98,0xd807aa98 -.long 0x12835b01,0x12835b01,0x12835b01,0x12835b01 -.long 0x243185be,0x243185be,0x243185be,0x243185be -.long 0x550c7dc3,0x550c7dc3,0x550c7dc3,0x550c7dc3 -.long 0x72be5d74,0x72be5d74,0x72be5d74,0x72be5d74 -.long 0x80deb1fe,0x80deb1fe,0x80deb1fe,0x80deb1fe -.long 0x9bdc06a7,0x9bdc06a7,0x9bdc06a7,0x9bdc06a7 -.long 0xc19bf174,0xc19bf174,0xc19bf174,0xc19bf174 -.long 0xe49b69c1,0xe49b69c1,0xe49b69c1,0xe49b69c1 -.long 0xefbe4786,0xefbe4786,0xefbe4786,0xefbe4786 -.long 0x0fc19dc6,0x0fc19dc6,0x0fc19dc6,0x0fc19dc6 -.long 0x240ca1cc,0x240ca1cc,0x240ca1cc,0x240ca1cc -.long 0x2de92c6f,0x2de92c6f,0x2de92c6f,0x2de92c6f -.long 0x4a7484aa,0x4a7484aa,0x4a7484aa,0x4a7484aa -.long 0x5cb0a9dc,0x5cb0a9dc,0x5cb0a9dc,0x5cb0a9dc -.long 0x76f988da,0x76f988da,0x76f988da,0x76f988da -.long 0x983e5152,0x983e5152,0x983e5152,0x983e5152 -.long 0xa831c66d,0xa831c66d,0xa831c66d,0xa831c66d -.long 0xb00327c8,0xb00327c8,0xb00327c8,0xb00327c8 -.long 0xbf597fc7,0xbf597fc7,0xbf597fc7,0xbf597fc7 -.long 0xc6e00bf3,0xc6e00bf3,0xc6e00bf3,0xc6e00bf3 -.long 0xd5a79147,0xd5a79147,0xd5a79147,0xd5a79147 -.long 0x06ca6351,0x06ca6351,0x06ca6351,0x06ca6351 -.long 0x14292967,0x14292967,0x14292967,0x14292967 -.long 0x27b70a85,0x27b70a85,0x27b70a85,0x27b70a85 -.long 0x2e1b2138,0x2e1b2138,0x2e1b2138,0x2e1b2138 -.long 0x4d2c6dfc,0x4d2c6dfc,0x4d2c6dfc,0x4d2c6dfc -.long 0x53380d13,0x53380d13,0x53380d13,0x53380d13 -.long 0x650a7354,0x650a7354,0x650a7354,0x650a7354 -.long 0x766a0abb,0x766a0abb,0x766a0abb,0x766a0abb -.long 0x81c2c92e,0x81c2c92e,0x81c2c92e,0x81c2c92e -.long 0x92722c85,0x92722c85,0x92722c85,0x92722c85 -.long 0xa2bfe8a1,0xa2bfe8a1,0xa2bfe8a1,0xa2bfe8a1 -.long 0xa81a664b,0xa81a664b,0xa81a664b,0xa81a664b -.long 0xc24b8b70,0xc24b8b70,0xc24b8b70,0xc24b8b70 -.long 0xc76c51a3,0xc76c51a3,0xc76c51a3,0xc76c51a3 -.long 0xd192e819,0xd192e819,0xd192e819,0xd192e819 -.long 0xd6990624,0xd6990624,0xd6990624,0xd6990624 -.long 0xf40e3585,0xf40e3585,0xf40e3585,0xf40e3585 -.long 0x106aa070,0x106aa070,0x106aa070,0x106aa070 -.long 0x19a4c116,0x19a4c116,0x19a4c116,0x19a4c116 -.long 0x1e376c08,0x1e376c08,0x1e376c08,0x1e376c08 -.long 0x2748774c,0x2748774c,0x2748774c,0x2748774c -.long 0x34b0bcb5,0x34b0bcb5,0x34b0bcb5,0x34b0bcb5 -.long 0x391c0cb3,0x391c0cb3,0x391c0cb3,0x391c0cb3 -.long 0x4ed8aa4a,0x4ed8aa4a,0x4ed8aa4a,0x4ed8aa4a -.long 0x5b9cca4f,0x5b9cca4f,0x5b9cca4f,0x5b9cca4f -.long 0x682e6ff3,0x682e6ff3,0x682e6ff3,0x682e6ff3 -.long 0x748f82ee,0x748f82ee,0x748f82ee,0x748f82ee -.long 0x78a5636f,0x78a5636f,0x78a5636f,0x78a5636f -.long 0x84c87814,0x84c87814,0x84c87814,0x84c87814 -.long 0x8cc70208,0x8cc70208,0x8cc70208,0x8cc70208 -.long 0x90befffa,0x90befffa,0x90befffa,0x90befffa -.long 0xa4506ceb,0xa4506ceb,0xa4506ceb,0xa4506ceb -.long 0xbef9a3f7,0xbef9a3f7,0xbef9a3f7,0xbef9a3f7 -.long 0xc67178f2,0xc67178f2,0xc67178f2,0xc67178f2 -.long 0,0,0,0 -.long 0x10111213,0x10111213,0x10111213,0x00010203 -.long 0x10111213,0x10111213,0x04050607,0x00010203 -.long 0x10111213,0x08090a0b,0x04050607,0x00010203 -.byte 83,72,65,50,53,54,32,102,111,114,32,80,111,119,101,114,73,83,65,32,50,46,48,55,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 2 diff --git a/sys/crypto/openssl/powerpc64le/sha512-ppc.S b/sys/crypto/openssl/powerpc64le/sha512-ppc.S deleted file mode 100644 index c58a070bc8e..00000000000 --- a/sys/crypto/openssl/powerpc64le/sha512-ppc.S +++ /dev/null @@ -1,1516 +0,0 @@ -/* Do not modify. This file is auto-generated from sha512-ppc.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl sha512_block_ppc -.type sha512_block_ppc,@function -.align 6 -sha512_block_ppc: -.localentry sha512_block_ppc,0 - - stdu 1,-384(1) - mflr 0 - sldi 5,5,7 - - std 3,208(1) - - std 14,240(1) - std 15,248(1) - std 16,256(1) - std 17,264(1) - std 18,272(1) - std 19,280(1) - std 20,288(1) - std 21,296(1) - std 22,304(1) - std 23,312(1) - std 24,320(1) - std 25,328(1) - std 26,336(1) - std 27,344(1) - std 28,352(1) - std 29,360(1) - std 30,368(1) - std 31,376(1) - std 0,400(1) - ld 8,0(3) - mr 31,4 - ld 9,8(3) - ld 10,16(3) - ld 11,24(3) - ld 12,32(3) - ld 6,40(3) - ld 14,48(3) - ld 15,56(3) - bl .LPICmeup -.LPICedup: - andi. 0,31,3 - bne .Lunaligned -.Laligned: - add 5,31,5 - std 5,192(1) - std 31,200(1) - bl .Lsha2_block_private - b .Ldone - - - - - - - -.align 4 -.Lunaligned: - subfic 0,31,4096 - andi. 0,0,3968 - beq .Lcross_page - cmpld 5,0 - ble .Laligned - subfc 5,0,5 - add 0,31,0 - std 5,184(1) - std 0,192(1) - std 31,200(1) - bl .Lsha2_block_private - - ld 5,184(1) -.Lcross_page: - li 0,32 - mtctr 0 - addi 20,1,48 -.Lmemcpy: - lbz 16,0(31) - lbz 17,1(31) - lbz 18,2(31) - lbz 19,3(31) - addi 31,31,4 - stb 16,0(20) - stb 17,1(20) - stb 18,2(20) - stb 19,3(20) - addi 20,20,4 - bdnz .Lmemcpy - std 31,176(1) - addi 0,1,176 - addi 31,1,48 - std 5,184(1) - std 0,192(1) - std 31,200(1) - bl .Lsha2_block_private - ld 31,176(1) - ld 5,184(1) - addic. 5,5,-128 - bne .Lunaligned - -.Ldone: - ld 0,400(1) - ld 14,240(1) - ld 15,248(1) - ld 16,256(1) - ld 17,264(1) - ld 18,272(1) - ld 19,280(1) - ld 20,288(1) - ld 21,296(1) - ld 22,304(1) - ld 23,312(1) - ld 24,320(1) - ld 25,328(1) - ld 26,336(1) - ld 27,344(1) - ld 28,352(1) - ld 29,360(1) - ld 30,368(1) - ld 31,376(1) - mtlr 0 - addi 1,1,384 - blr -.long 0 -.byte 0,12,4,1,0x80,18,3,0 -.long 0 -.align 4 -.Lsha2_block_private: - ld 0,0(7) - lwz 3,0(31) - lwz 4,4(31) - rotlwi 5,3,8 - rotlwi 16,4,8 - rlwimi 5,3,24,0,7 - rlwimi 16,4,24,0,7 - rlwimi 5,3,24,16,23 - rlwimi 16,4,24,16,23 - insrdi 16,5,32,0 - rotrdi 3,12,14 - rotrdi 4,12,18 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrdi 4,4,23 - or 5,5,0 - add 15,15,16 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrdi 3,8,28 - rotrdi 4,8,34 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - ld 0,8(7) - add 15,15,3 - add 15,15,5 - - lwz 3,8(31) - lwz 4,12(31) - rotlwi 5,3,8 - rotlwi 17,4,8 - rlwimi 5,3,24,0,7 - rlwimi 17,4,24,0,7 - rlwimi 5,3,24,16,23 - rlwimi 17,4,24,16,23 - insrdi 17,5,32,0 - rotrdi 3,11,14 - rotrdi 4,11,18 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrdi 4,4,23 - or 5,5,0 - add 14,14,17 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrdi 3,15,28 - rotrdi 4,15,34 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - ld 0,16(7) - add 14,14,3 - add 14,14,5 - - lwz 3,16(31) - lwz 4,20(31) - rotlwi 5,3,8 - rotlwi 18,4,8 - rlwimi 5,3,24,0,7 - rlwimi 18,4,24,0,7 - rlwimi 5,3,24,16,23 - rlwimi 18,4,24,16,23 - insrdi 18,5,32,0 - rotrdi 3,10,14 - rotrdi 4,10,18 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrdi 4,4,23 - or 5,5,0 - add 6,6,18 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrdi 3,14,28 - rotrdi 4,14,34 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - ld 0,24(7) - add 6,6,3 - add 6,6,5 - - lwz 3,24(31) - lwz 4,28(31) - rotlwi 5,3,8 - rotlwi 19,4,8 - rlwimi 5,3,24,0,7 - rlwimi 19,4,24,0,7 - rlwimi 5,3,24,16,23 - rlwimi 19,4,24,16,23 - insrdi 19,5,32,0 - rotrdi 3,9,14 - rotrdi 4,9,18 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrdi 4,4,23 - or 5,5,0 - add 12,12,19 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrdi 3,6,28 - rotrdi 4,6,34 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - ld 0,32(7) - add 12,12,3 - add 12,12,5 - - lwz 3,32(31) - lwz 4,36(31) - rotlwi 5,3,8 - rotlwi 20,4,8 - rlwimi 5,3,24,0,7 - rlwimi 20,4,24,0,7 - rlwimi 5,3,24,16,23 - rlwimi 20,4,24,16,23 - insrdi 20,5,32,0 - rotrdi 3,8,14 - rotrdi 4,8,18 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrdi 4,4,23 - or 5,5,0 - add 11,11,20 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrdi 3,12,28 - rotrdi 4,12,34 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - ld 0,40(7) - add 11,11,3 - add 11,11,5 - - lwz 3,40(31) - lwz 4,44(31) - rotlwi 5,3,8 - rotlwi 21,4,8 - rlwimi 5,3,24,0,7 - rlwimi 21,4,24,0,7 - rlwimi 5,3,24,16,23 - rlwimi 21,4,24,16,23 - insrdi 21,5,32,0 - rotrdi 3,15,14 - rotrdi 4,15,18 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrdi 4,4,23 - or 5,5,0 - add 10,10,21 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrdi 3,11,28 - rotrdi 4,11,34 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - ld 0,48(7) - add 10,10,3 - add 10,10,5 - - lwz 3,48(31) - lwz 4,52(31) - rotlwi 5,3,8 - rotlwi 22,4,8 - rlwimi 5,3,24,0,7 - rlwimi 22,4,24,0,7 - rlwimi 5,3,24,16,23 - rlwimi 22,4,24,16,23 - insrdi 22,5,32,0 - rotrdi 3,14,14 - rotrdi 4,14,18 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrdi 4,4,23 - or 5,5,0 - add 9,9,22 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrdi 3,10,28 - rotrdi 4,10,34 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - ld 0,56(7) - add 9,9,3 - add 9,9,5 - - lwz 3,56(31) - lwz 4,60(31) - rotlwi 5,3,8 - rotlwi 23,4,8 - rlwimi 5,3,24,0,7 - rlwimi 23,4,24,0,7 - rlwimi 5,3,24,16,23 - rlwimi 23,4,24,16,23 - insrdi 23,5,32,0 - rotrdi 3,6,14 - rotrdi 4,6,18 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrdi 4,4,23 - or 5,5,0 - add 8,8,23 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrdi 3,9,28 - rotrdi 4,9,34 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - ld 0,64(7) - add 8,8,3 - add 8,8,5 - - lwz 3,64(31) - lwz 4,68(31) - rotlwi 5,3,8 - rotlwi 24,4,8 - rlwimi 5,3,24,0,7 - rlwimi 24,4,24,0,7 - rlwimi 5,3,24,16,23 - rlwimi 24,4,24,16,23 - insrdi 24,5,32,0 - rotrdi 3,12,14 - rotrdi 4,12,18 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrdi 4,4,23 - or 5,5,0 - add 15,15,24 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrdi 3,8,28 - rotrdi 4,8,34 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - ld 0,72(7) - add 15,15,3 - add 15,15,5 - - lwz 3,72(31) - lwz 4,76(31) - rotlwi 5,3,8 - rotlwi 25,4,8 - rlwimi 5,3,24,0,7 - rlwimi 25,4,24,0,7 - rlwimi 5,3,24,16,23 - rlwimi 25,4,24,16,23 - insrdi 25,5,32,0 - rotrdi 3,11,14 - rotrdi 4,11,18 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrdi 4,4,23 - or 5,5,0 - add 14,14,25 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrdi 3,15,28 - rotrdi 4,15,34 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - ld 0,80(7) - add 14,14,3 - add 14,14,5 - - lwz 3,80(31) - lwz 4,84(31) - rotlwi 5,3,8 - rotlwi 26,4,8 - rlwimi 5,3,24,0,7 - rlwimi 26,4,24,0,7 - rlwimi 5,3,24,16,23 - rlwimi 26,4,24,16,23 - insrdi 26,5,32,0 - rotrdi 3,10,14 - rotrdi 4,10,18 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrdi 4,4,23 - or 5,5,0 - add 6,6,26 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrdi 3,14,28 - rotrdi 4,14,34 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - ld 0,88(7) - add 6,6,3 - add 6,6,5 - - lwz 3,88(31) - lwz 4,92(31) - rotlwi 5,3,8 - rotlwi 27,4,8 - rlwimi 5,3,24,0,7 - rlwimi 27,4,24,0,7 - rlwimi 5,3,24,16,23 - rlwimi 27,4,24,16,23 - insrdi 27,5,32,0 - rotrdi 3,9,14 - rotrdi 4,9,18 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrdi 4,4,23 - or 5,5,0 - add 12,12,27 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrdi 3,6,28 - rotrdi 4,6,34 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - ld 0,96(7) - add 12,12,3 - add 12,12,5 - - lwz 3,96(31) - lwz 4,100(31) - rotlwi 5,3,8 - rotlwi 28,4,8 - rlwimi 5,3,24,0,7 - rlwimi 28,4,24,0,7 - rlwimi 5,3,24,16,23 - rlwimi 28,4,24,16,23 - insrdi 28,5,32,0 - rotrdi 3,8,14 - rotrdi 4,8,18 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrdi 4,4,23 - or 5,5,0 - add 11,11,28 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrdi 3,12,28 - rotrdi 4,12,34 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - ld 0,104(7) - add 11,11,3 - add 11,11,5 - - lwz 3,104(31) - lwz 4,108(31) - rotlwi 5,3,8 - rotlwi 29,4,8 - rlwimi 5,3,24,0,7 - rlwimi 29,4,24,0,7 - rlwimi 5,3,24,16,23 - rlwimi 29,4,24,16,23 - insrdi 29,5,32,0 - rotrdi 3,15,14 - rotrdi 4,15,18 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrdi 4,4,23 - or 5,5,0 - add 10,10,29 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrdi 3,11,28 - rotrdi 4,11,34 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - ld 0,112(7) - add 10,10,3 - add 10,10,5 - - lwz 3,112(31) - lwz 4,116(31) - rotlwi 5,3,8 - rotlwi 30,4,8 - rlwimi 5,3,24,0,7 - rlwimi 30,4,24,0,7 - rlwimi 5,3,24,16,23 - rlwimi 30,4,24,16,23 - insrdi 30,5,32,0 - rotrdi 3,14,14 - rotrdi 4,14,18 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrdi 4,4,23 - or 5,5,0 - add 9,9,30 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrdi 3,10,28 - rotrdi 4,10,34 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - ld 0,120(7) - add 9,9,3 - add 9,9,5 - - lwz 3,120(31) - lwz 4,124(31) - rotlwi 5,3,8 - rotlwi 31,4,8 - rlwimi 5,3,24,0,7 - rlwimi 31,4,24,0,7 - rlwimi 5,3,24,16,23 - rlwimi 31,4,24,16,23 - insrdi 31,5,32,0 - rotrdi 3,6,14 - rotrdi 4,6,18 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrdi 4,4,23 - or 5,5,0 - add 8,8,31 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrdi 3,9,28 - rotrdi 4,9,34 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - add 8,8,3 - add 8,8,5 - - li 5,4 - mtctr 5 -.align 4 -.Lrounds: - addi 7,7,128 - rotrdi 3,17,1 - rotrdi 4,17,8 - rotrdi 5,30,19 - rotrdi 0,30,61 - xor 3,3,4 - srdi 4,17,7 - xor 5,5,0 - srdi 0,30,6 - add 16,16,25 - xor 3,3,4 - xor 5,5,0 - ld 0,0(7) - add 16,16,3 - add 16,16,5 - rotrdi 3,12,14 - rotrdi 4,12,18 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrdi 4,4,23 - or 5,5,0 - add 15,15,16 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrdi 3,8,28 - rotrdi 4,8,34 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - add 15,15,3 - add 15,15,5 - - rotrdi 3,18,1 - rotrdi 4,18,8 - rotrdi 5,31,19 - rotrdi 0,31,61 - xor 3,3,4 - srdi 4,18,7 - xor 5,5,0 - srdi 0,31,6 - add 17,17,26 - xor 3,3,4 - xor 5,5,0 - ld 0,8(7) - add 17,17,3 - add 17,17,5 - rotrdi 3,11,14 - rotrdi 4,11,18 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrdi 4,4,23 - or 5,5,0 - add 14,14,17 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrdi 3,15,28 - rotrdi 4,15,34 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - add 14,14,3 - add 14,14,5 - - rotrdi 3,19,1 - rotrdi 4,19,8 - rotrdi 5,16,19 - rotrdi 0,16,61 - xor 3,3,4 - srdi 4,19,7 - xor 5,5,0 - srdi 0,16,6 - add 18,18,27 - xor 3,3,4 - xor 5,5,0 - ld 0,16(7) - add 18,18,3 - add 18,18,5 - rotrdi 3,10,14 - rotrdi 4,10,18 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrdi 4,4,23 - or 5,5,0 - add 6,6,18 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrdi 3,14,28 - rotrdi 4,14,34 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - add 6,6,3 - add 6,6,5 - - rotrdi 3,20,1 - rotrdi 4,20,8 - rotrdi 5,17,19 - rotrdi 0,17,61 - xor 3,3,4 - srdi 4,20,7 - xor 5,5,0 - srdi 0,17,6 - add 19,19,28 - xor 3,3,4 - xor 5,5,0 - ld 0,24(7) - add 19,19,3 - add 19,19,5 - rotrdi 3,9,14 - rotrdi 4,9,18 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrdi 4,4,23 - or 5,5,0 - add 12,12,19 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrdi 3,6,28 - rotrdi 4,6,34 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - add 12,12,3 - add 12,12,5 - - rotrdi 3,21,1 - rotrdi 4,21,8 - rotrdi 5,18,19 - rotrdi 0,18,61 - xor 3,3,4 - srdi 4,21,7 - xor 5,5,0 - srdi 0,18,6 - add 20,20,29 - xor 3,3,4 - xor 5,5,0 - ld 0,32(7) - add 20,20,3 - add 20,20,5 - rotrdi 3,8,14 - rotrdi 4,8,18 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrdi 4,4,23 - or 5,5,0 - add 11,11,20 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrdi 3,12,28 - rotrdi 4,12,34 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - add 11,11,3 - add 11,11,5 - - rotrdi 3,22,1 - rotrdi 4,22,8 - rotrdi 5,19,19 - rotrdi 0,19,61 - xor 3,3,4 - srdi 4,22,7 - xor 5,5,0 - srdi 0,19,6 - add 21,21,30 - xor 3,3,4 - xor 5,5,0 - ld 0,40(7) - add 21,21,3 - add 21,21,5 - rotrdi 3,15,14 - rotrdi 4,15,18 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrdi 4,4,23 - or 5,5,0 - add 10,10,21 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrdi 3,11,28 - rotrdi 4,11,34 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - add 10,10,3 - add 10,10,5 - - rotrdi 3,23,1 - rotrdi 4,23,8 - rotrdi 5,20,19 - rotrdi 0,20,61 - xor 3,3,4 - srdi 4,23,7 - xor 5,5,0 - srdi 0,20,6 - add 22,22,31 - xor 3,3,4 - xor 5,5,0 - ld 0,48(7) - add 22,22,3 - add 22,22,5 - rotrdi 3,14,14 - rotrdi 4,14,18 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrdi 4,4,23 - or 5,5,0 - add 9,9,22 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrdi 3,10,28 - rotrdi 4,10,34 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - add 9,9,3 - add 9,9,5 - - rotrdi 3,24,1 - rotrdi 4,24,8 - rotrdi 5,21,19 - rotrdi 0,21,61 - xor 3,3,4 - srdi 4,24,7 - xor 5,5,0 - srdi 0,21,6 - add 23,23,16 - xor 3,3,4 - xor 5,5,0 - ld 0,56(7) - add 23,23,3 - add 23,23,5 - rotrdi 3,6,14 - rotrdi 4,6,18 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrdi 4,4,23 - or 5,5,0 - add 8,8,23 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrdi 3,9,28 - rotrdi 4,9,34 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - add 8,8,3 - add 8,8,5 - - rotrdi 3,25,1 - rotrdi 4,25,8 - rotrdi 5,22,19 - rotrdi 0,22,61 - xor 3,3,4 - srdi 4,25,7 - xor 5,5,0 - srdi 0,22,6 - add 24,24,17 - xor 3,3,4 - xor 5,5,0 - ld 0,64(7) - add 24,24,3 - add 24,24,5 - rotrdi 3,12,14 - rotrdi 4,12,18 - and 5,6,12 - xor 3,3,4 - add 15,15,0 - andc 0,14,12 - rotrdi 4,4,23 - or 5,5,0 - add 15,15,24 - xor 3,3,4 - add 15,15,5 - add 15,15,3 - - rotrdi 3,8,28 - rotrdi 4,8,34 - and 5,8,9 - and 0,8,10 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,9,10 - xor 3,3,4 - add 11,11,15 - xor 5,5,0 - add 15,15,3 - add 15,15,5 - - rotrdi 3,26,1 - rotrdi 4,26,8 - rotrdi 5,23,19 - rotrdi 0,23,61 - xor 3,3,4 - srdi 4,26,7 - xor 5,5,0 - srdi 0,23,6 - add 25,25,18 - xor 3,3,4 - xor 5,5,0 - ld 0,72(7) - add 25,25,3 - add 25,25,5 - rotrdi 3,11,14 - rotrdi 4,11,18 - and 5,12,11 - xor 3,3,4 - add 14,14,0 - andc 0,6,11 - rotrdi 4,4,23 - or 5,5,0 - add 14,14,25 - xor 3,3,4 - add 14,14,5 - add 14,14,3 - - rotrdi 3,15,28 - rotrdi 4,15,34 - and 5,15,8 - and 0,15,9 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,8,9 - xor 3,3,4 - add 10,10,14 - xor 5,5,0 - add 14,14,3 - add 14,14,5 - - rotrdi 3,27,1 - rotrdi 4,27,8 - rotrdi 5,24,19 - rotrdi 0,24,61 - xor 3,3,4 - srdi 4,27,7 - xor 5,5,0 - srdi 0,24,6 - add 26,26,19 - xor 3,3,4 - xor 5,5,0 - ld 0,80(7) - add 26,26,3 - add 26,26,5 - rotrdi 3,10,14 - rotrdi 4,10,18 - and 5,11,10 - xor 3,3,4 - add 6,6,0 - andc 0,12,10 - rotrdi 4,4,23 - or 5,5,0 - add 6,6,26 - xor 3,3,4 - add 6,6,5 - add 6,6,3 - - rotrdi 3,14,28 - rotrdi 4,14,34 - and 5,14,15 - and 0,14,8 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,15,8 - xor 3,3,4 - add 9,9,6 - xor 5,5,0 - add 6,6,3 - add 6,6,5 - - rotrdi 3,28,1 - rotrdi 4,28,8 - rotrdi 5,25,19 - rotrdi 0,25,61 - xor 3,3,4 - srdi 4,28,7 - xor 5,5,0 - srdi 0,25,6 - add 27,27,20 - xor 3,3,4 - xor 5,5,0 - ld 0,88(7) - add 27,27,3 - add 27,27,5 - rotrdi 3,9,14 - rotrdi 4,9,18 - and 5,10,9 - xor 3,3,4 - add 12,12,0 - andc 0,11,9 - rotrdi 4,4,23 - or 5,5,0 - add 12,12,27 - xor 3,3,4 - add 12,12,5 - add 12,12,3 - - rotrdi 3,6,28 - rotrdi 4,6,34 - and 5,6,14 - and 0,6,15 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,14,15 - xor 3,3,4 - add 8,8,12 - xor 5,5,0 - add 12,12,3 - add 12,12,5 - - rotrdi 3,29,1 - rotrdi 4,29,8 - rotrdi 5,26,19 - rotrdi 0,26,61 - xor 3,3,4 - srdi 4,29,7 - xor 5,5,0 - srdi 0,26,6 - add 28,28,21 - xor 3,3,4 - xor 5,5,0 - ld 0,96(7) - add 28,28,3 - add 28,28,5 - rotrdi 3,8,14 - rotrdi 4,8,18 - and 5,9,8 - xor 3,3,4 - add 11,11,0 - andc 0,10,8 - rotrdi 4,4,23 - or 5,5,0 - add 11,11,28 - xor 3,3,4 - add 11,11,5 - add 11,11,3 - - rotrdi 3,12,28 - rotrdi 4,12,34 - and 5,12,6 - and 0,12,14 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,6,14 - xor 3,3,4 - add 15,15,11 - xor 5,5,0 - add 11,11,3 - add 11,11,5 - - rotrdi 3,30,1 - rotrdi 4,30,8 - rotrdi 5,27,19 - rotrdi 0,27,61 - xor 3,3,4 - srdi 4,30,7 - xor 5,5,0 - srdi 0,27,6 - add 29,29,22 - xor 3,3,4 - xor 5,5,0 - ld 0,104(7) - add 29,29,3 - add 29,29,5 - rotrdi 3,15,14 - rotrdi 4,15,18 - and 5,8,15 - xor 3,3,4 - add 10,10,0 - andc 0,9,15 - rotrdi 4,4,23 - or 5,5,0 - add 10,10,29 - xor 3,3,4 - add 10,10,5 - add 10,10,3 - - rotrdi 3,11,28 - rotrdi 4,11,34 - and 5,11,12 - and 0,11,6 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,12,6 - xor 3,3,4 - add 14,14,10 - xor 5,5,0 - add 10,10,3 - add 10,10,5 - - rotrdi 3,31,1 - rotrdi 4,31,8 - rotrdi 5,28,19 - rotrdi 0,28,61 - xor 3,3,4 - srdi 4,31,7 - xor 5,5,0 - srdi 0,28,6 - add 30,30,23 - xor 3,3,4 - xor 5,5,0 - ld 0,112(7) - add 30,30,3 - add 30,30,5 - rotrdi 3,14,14 - rotrdi 4,14,18 - and 5,15,14 - xor 3,3,4 - add 9,9,0 - andc 0,8,14 - rotrdi 4,4,23 - or 5,5,0 - add 9,9,30 - xor 3,3,4 - add 9,9,5 - add 9,9,3 - - rotrdi 3,10,28 - rotrdi 4,10,34 - and 5,10,11 - and 0,10,12 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,11,12 - xor 3,3,4 - add 6,6,9 - xor 5,5,0 - add 9,9,3 - add 9,9,5 - - rotrdi 3,16,1 - rotrdi 4,16,8 - rotrdi 5,29,19 - rotrdi 0,29,61 - xor 3,3,4 - srdi 4,16,7 - xor 5,5,0 - srdi 0,29,6 - add 31,31,24 - xor 3,3,4 - xor 5,5,0 - ld 0,120(7) - add 31,31,3 - add 31,31,5 - rotrdi 3,6,14 - rotrdi 4,6,18 - and 5,14,6 - xor 3,3,4 - add 8,8,0 - andc 0,15,6 - rotrdi 4,4,23 - or 5,5,0 - add 8,8,31 - xor 3,3,4 - add 8,8,5 - add 8,8,3 - - rotrdi 3,9,28 - rotrdi 4,9,34 - and 5,9,10 - and 0,9,11 - xor 3,3,4 - rotrdi 4,4,5 - xor 5,5,0 - and 0,10,11 - xor 3,3,4 - add 12,12,8 - xor 5,5,0 - add 8,8,3 - add 8,8,5 - - bdnz .Lrounds - - ld 3,208(1) - ld 31,200(1) - ld 5,192(1) - subi 7,7,512 - - ld 16,0(3) - ld 17,8(3) - ld 18,16(3) - ld 19,24(3) - ld 20,32(3) - ld 21,40(3) - ld 22,48(3) - addi 31,31,128 - ld 23,56(3) - add 8,8,16 - add 9,9,17 - std 31,200(1) - add 10,10,18 - std 8,0(3) - add 11,11,19 - std 9,8(3) - add 12,12,20 - std 10,16(3) - add 6,6,21 - std 11,24(3) - add 14,14,22 - std 12,32(3) - add 15,15,23 - std 6,40(3) - std 14,48(3) - cmpld 31,5 - std 15,56(3) - bne .Lsha2_block_private - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.size sha512_block_ppc,.-sha512_block_ppc -.align 6 -.LPICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 7 - addi 7,7,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.long 0xd728ae22,0x428a2f98 -.long 0x23ef65cd,0x71374491 -.long 0xec4d3b2f,0xb5c0fbcf -.long 0x8189dbbc,0xe9b5dba5 -.long 0xf348b538,0x3956c25b -.long 0xb605d019,0x59f111f1 -.long 0xaf194f9b,0x923f82a4 -.long 0xda6d8118,0xab1c5ed5 -.long 0xa3030242,0xd807aa98 -.long 0x45706fbe,0x12835b01 -.long 0x4ee4b28c,0x243185be -.long 0xd5ffb4e2,0x550c7dc3 -.long 0xf27b896f,0x72be5d74 -.long 0x3b1696b1,0x80deb1fe -.long 0x25c71235,0x9bdc06a7 -.long 0xcf692694,0xc19bf174 -.long 0x9ef14ad2,0xe49b69c1 -.long 0x384f25e3,0xefbe4786 -.long 0x8b8cd5b5,0x0fc19dc6 -.long 0x77ac9c65,0x240ca1cc -.long 0x592b0275,0x2de92c6f -.long 0x6ea6e483,0x4a7484aa -.long 0xbd41fbd4,0x5cb0a9dc -.long 0x831153b5,0x76f988da -.long 0xee66dfab,0x983e5152 -.long 0x2db43210,0xa831c66d -.long 0x98fb213f,0xb00327c8 -.long 0xbeef0ee4,0xbf597fc7 -.long 0x3da88fc2,0xc6e00bf3 -.long 0x930aa725,0xd5a79147 -.long 0xe003826f,0x06ca6351 -.long 0x0a0e6e70,0x14292967 -.long 0x46d22ffc,0x27b70a85 -.long 0x5c26c926,0x2e1b2138 -.long 0x5ac42aed,0x4d2c6dfc -.long 0x9d95b3df,0x53380d13 -.long 0x8baf63de,0x650a7354 -.long 0x3c77b2a8,0x766a0abb -.long 0x47edaee6,0x81c2c92e -.long 0x1482353b,0x92722c85 -.long 0x4cf10364,0xa2bfe8a1 -.long 0xbc423001,0xa81a664b -.long 0xd0f89791,0xc24b8b70 -.long 0x0654be30,0xc76c51a3 -.long 0xd6ef5218,0xd192e819 -.long 0x5565a910,0xd6990624 -.long 0x5771202a,0xf40e3585 -.long 0x32bbd1b8,0x106aa070 -.long 0xb8d2d0c8,0x19a4c116 -.long 0x5141ab53,0x1e376c08 -.long 0xdf8eeb99,0x2748774c -.long 0xe19b48a8,0x34b0bcb5 -.long 0xc5c95a63,0x391c0cb3 -.long 0xe3418acb,0x4ed8aa4a -.long 0x7763e373,0x5b9cca4f -.long 0xd6b2b8a3,0x682e6ff3 -.long 0x5defb2fc,0x748f82ee -.long 0x43172f60,0x78a5636f -.long 0xa1f0ab72,0x84c87814 -.long 0x1a6439ec,0x8cc70208 -.long 0x23631e28,0x90befffa -.long 0xde82bde9,0xa4506ceb -.long 0xb2c67915,0xbef9a3f7 -.long 0xe372532b,0xc67178f2 -.long 0xea26619c,0xca273ece -.long 0x21c0c207,0xd186b8c7 -.long 0xcde0eb1e,0xeada7dd6 -.long 0xee6ed178,0xf57d4f7f -.long 0x72176fba,0x06f067aa -.long 0xa2c898a6,0x0a637dc5 -.long 0xbef90dae,0x113f9804 -.long 0x131c471b,0x1b710b35 -.long 0x23047d84,0x28db77f5 -.long 0x40c72493,0x32caab7b -.long 0x15c9bebc,0x3c9ebe0a -.long 0x9c100d4c,0x431d67c4 -.long 0xcb3e42b6,0x4cc5d4be -.long 0xfc657e2a,0x597f299c -.long 0x3ad6faec,0x5fcb6fab -.long 0x4a475817,0x6c44198c diff --git a/sys/crypto/openssl/powerpc64le/sha512p8-ppc.S b/sys/crypto/openssl/powerpc64le/sha512p8-ppc.S deleted file mode 100644 index 55b5d83ce2a..00000000000 --- a/sys/crypto/openssl/powerpc64le/sha512p8-ppc.S +++ /dev/null @@ -1,848 +0,0 @@ -/* Do not modify. This file is auto-generated from sha512p8-ppc.pl. */ -.machine "any" -.abiversion 2 -.text - -.globl sha512_block_p8 -.type sha512_block_p8,@function -.align 6 -sha512_block_p8: -.localentry sha512_block_p8,0 - - stdu 1,-384(1) - mflr 8 - li 10,207 - li 11,223 - stvx 24,10,1 - addi 10,10,32 - li 12,-1 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - li 11,-4096+255 - stw 12,332(1) - li 10,0x10 - std 26,336(1) - li 26,0x20 - std 27,344(1) - li 27,0x30 - std 28,352(1) - li 28,0x40 - std 29,360(1) - li 29,0x50 - std 30,368(1) - li 30,0x60 - std 31,376(1) - li 31,0x70 - std 8,400(1) - or 11,11,11 - - bl .LPICmeup - addi 11,1,79 - li 7,8 - lvsl 31,0,7 - vspltisb 28,0x0f - vxor 31,31,28 - .long 0x7C001E99 - .long 0x7C4A1E99 - .long 0x7C9A1E99 - vsldoi 1,0,0,8 - .long 0x7CDB1E99 - vsldoi 3,2,2,8 - vsldoi 5,4,4,8 - vsldoi 7,6,6,8 - li 0,4 - b .Loop -.align 5 -.Loop: - lvx 28,0,6 - .long 0x7D002699 - addi 4,4,16 - mr 7,6 - stvx 0,0,11 - stvx 1,10,11 - stvx 2,26,11 - stvx 3,27,11 - stvx 4,28,11 - stvx 5,29,11 - stvx 6,30,11 - stvx 7,31,11 - .long 0x10E7E0C0 - lvx 28,10,6 - vperm 8,8,8,31 - .long 0x10E740C0 - vsel 29,6,5,4 - .long 0x10C6E0C0 - .long 0x10E7E8C0 - .long 0x13C4FEC2 - .long 0x10E7F0C0 - vxor 29,0,1 - vsel 29,1,2,29 - .long 0x106338C0 - .long 0x13C086C2 - .long 0x13DEE8C0 - .long 0x10E7F0C0 - lvx 28,26,7 - .long 0x7D402699 - addi 4,4,16 - vsldoi 9,8,8,8 - .long 0x10C648C0 - vsel 29,5,4,3 - .long 0x10A5E0C0 - .long 0x10C6E8C0 - .long 0x13C3FEC2 - .long 0x10C6F0C0 - vxor 29,7,0 - vsel 29,0,1,29 - .long 0x104230C0 - .long 0x13C786C2 - .long 0x13DEE8C0 - .long 0x10C6F0C0 - lvx 28,27,7 - vperm 10,10,10,31 - .long 0x10A550C0 - vsel 29,4,3,2 - .long 0x1084E0C0 - .long 0x10A5E8C0 - .long 0x13C2FEC2 - .long 0x10A5F0C0 - vxor 29,6,7 - vsel 29,7,0,29 - .long 0x102128C0 - .long 0x13C686C2 - .long 0x13DEE8C0 - .long 0x10A5F0C0 - lvx 28,28,7 - .long 0x7D802699 - addi 4,4,16 - vsldoi 11,10,10,8 - .long 0x108458C0 - vsel 29,3,2,1 - .long 0x1063E0C0 - .long 0x1084E8C0 - .long 0x13C1FEC2 - .long 0x1084F0C0 - vxor 29,5,6 - vsel 29,6,7,29 - .long 0x100020C0 - .long 0x13C586C2 - .long 0x13DEE8C0 - .long 0x1084F0C0 - lvx 28,29,7 - vperm 12,12,12,31 - .long 0x106360C0 - vsel 29,2,1,0 - .long 0x1042E0C0 - .long 0x1063E8C0 - .long 0x13C0FEC2 - .long 0x1063F0C0 - vxor 29,4,5 - vsel 29,5,6,29 - .long 0x10E718C0 - .long 0x13C486C2 - .long 0x13DEE8C0 - .long 0x1063F0C0 - lvx 28,30,7 - .long 0x7DC02699 - addi 4,4,16 - vsldoi 13,12,12,8 - .long 0x104268C0 - vsel 29,1,0,7 - .long 0x1021E0C0 - .long 0x1042E8C0 - .long 0x13C7FEC2 - .long 0x1042F0C0 - vxor 29,3,4 - vsel 29,4,5,29 - .long 0x10C610C0 - .long 0x13C386C2 - .long 0x13DEE8C0 - .long 0x1042F0C0 - lvx 28,31,7 - addi 7,7,0x80 - vperm 14,14,14,31 - .long 0x102170C0 - vsel 29,0,7,6 - .long 0x1000E0C0 - .long 0x1021E8C0 - .long 0x13C6FEC2 - .long 0x1021F0C0 - vxor 29,2,3 - vsel 29,3,4,29 - .long 0x10A508C0 - .long 0x13C286C2 - .long 0x13DEE8C0 - .long 0x1021F0C0 - lvx 28,0,7 - .long 0x7E002699 - addi 4,4,16 - vsldoi 15,14,14,8 - .long 0x100078C0 - vsel 29,7,6,5 - .long 0x10E7E0C0 - .long 0x1000E8C0 - .long 0x13C5FEC2 - .long 0x1000F0C0 - vxor 29,1,2 - vsel 29,2,3,29 - .long 0x108400C0 - .long 0x13C186C2 - .long 0x13DEE8C0 - .long 0x1000F0C0 - lvx 28,10,7 - vperm 16,16,16,31 - .long 0x10E780C0 - vsel 29,6,5,4 - .long 0x10C6E0C0 - .long 0x10E7E8C0 - .long 0x13C4FEC2 - .long 0x10E7F0C0 - vxor 29,0,1 - vsel 29,1,2,29 - .long 0x106338C0 - .long 0x13C086C2 - .long 0x13DEE8C0 - .long 0x10E7F0C0 - lvx 28,26,7 - .long 0x7E402699 - addi 4,4,16 - vsldoi 17,16,16,8 - .long 0x10C688C0 - vsel 29,5,4,3 - .long 0x10A5E0C0 - .long 0x10C6E8C0 - .long 0x13C3FEC2 - .long 0x10C6F0C0 - vxor 29,7,0 - vsel 29,0,1,29 - .long 0x104230C0 - .long 0x13C786C2 - .long 0x13DEE8C0 - .long 0x10C6F0C0 - lvx 28,27,7 - vperm 18,18,18,31 - .long 0x10A590C0 - vsel 29,4,3,2 - .long 0x1084E0C0 - .long 0x10A5E8C0 - .long 0x13C2FEC2 - .long 0x10A5F0C0 - vxor 29,6,7 - vsel 29,7,0,29 - .long 0x102128C0 - .long 0x13C686C2 - .long 0x13DEE8C0 - .long 0x10A5F0C0 - lvx 28,28,7 - .long 0x7F002699 - addi 4,4,16 - vsldoi 19,18,18,8 - .long 0x108498C0 - vsel 29,3,2,1 - .long 0x1063E0C0 - .long 0x1084E8C0 - .long 0x13C1FEC2 - .long 0x1084F0C0 - vxor 29,5,6 - vsel 29,6,7,29 - .long 0x100020C0 - .long 0x13C586C2 - .long 0x13DEE8C0 - .long 0x1084F0C0 - lvx 28,29,7 - vperm 24,24,24,31 - .long 0x1063C0C0 - vsel 29,2,1,0 - .long 0x1042E0C0 - .long 0x1063E8C0 - .long 0x13C0FEC2 - .long 0x1063F0C0 - vxor 29,4,5 - vsel 29,5,6,29 - .long 0x10E718C0 - .long 0x13C486C2 - .long 0x13DEE8C0 - .long 0x1063F0C0 - lvx 28,30,7 - .long 0x7F402699 - addi 4,4,16 - vsldoi 25,24,24,8 - .long 0x1042C8C0 - vsel 29,1,0,7 - .long 0x1021E0C0 - .long 0x1042E8C0 - .long 0x13C7FEC2 - .long 0x1042F0C0 - vxor 29,3,4 - vsel 29,4,5,29 - .long 0x10C610C0 - .long 0x13C386C2 - .long 0x13DEE8C0 - .long 0x1042F0C0 - lvx 28,31,7 - addi 7,7,0x80 - vperm 26,26,26,31 - .long 0x1021D0C0 - vsel 29,0,7,6 - .long 0x1000E0C0 - .long 0x1021E8C0 - .long 0x13C6FEC2 - .long 0x1021F0C0 - vxor 29,2,3 - vsel 29,3,4,29 - .long 0x10A508C0 - .long 0x13C286C2 - .long 0x13DEE8C0 - .long 0x1021F0C0 - lvx 28,0,7 - vsldoi 27,26,26,8 - .long 0x13C906C2 - .long 0x1108F0C0 - .long 0x13DA7EC2 - .long 0x1108F0C0 - .long 0x110888C0 - .long 0x1000D8C0 - vsel 29,7,6,5 - .long 0x10E7E0C0 - .long 0x1000E8C0 - .long 0x13C5FEC2 - .long 0x1000F0C0 - vxor 29,1,2 - vsel 29,2,3,29 - .long 0x108400C0 - .long 0x13C186C2 - .long 0x13DEE8C0 - .long 0x1000F0C0 - lvx 28,10,7 - mtctr 0 - b .L16_xx -.align 5 -.L16_xx: - .long 0x13CA06C2 - .long 0x1129F0C0 - .long 0x13DB7EC2 - .long 0x1129F0C0 - .long 0x112990C0 - .long 0x10E740C0 - vsel 29,6,5,4 - .long 0x10C6E0C0 - .long 0x10E7E8C0 - .long 0x13C4FEC2 - .long 0x10E7F0C0 - vxor 29,0,1 - vsel 29,1,2,29 - .long 0x106338C0 - .long 0x13C086C2 - .long 0x13DEE8C0 - .long 0x10E7F0C0 - lvx 28,26,7 - .long 0x13CB06C2 - .long 0x114AF0C0 - .long 0x13C87EC2 - .long 0x114AF0C0 - .long 0x114A98C0 - .long 0x10C648C0 - vsel 29,5,4,3 - .long 0x10A5E0C0 - .long 0x10C6E8C0 - .long 0x13C3FEC2 - .long 0x10C6F0C0 - vxor 29,7,0 - vsel 29,0,1,29 - .long 0x104230C0 - .long 0x13C786C2 - .long 0x13DEE8C0 - .long 0x10C6F0C0 - lvx 28,27,7 - .long 0x13CC06C2 - .long 0x116BF0C0 - .long 0x13C97EC2 - .long 0x116BF0C0 - .long 0x116BC0C0 - .long 0x10A550C0 - vsel 29,4,3,2 - .long 0x1084E0C0 - .long 0x10A5E8C0 - .long 0x13C2FEC2 - .long 0x10A5F0C0 - vxor 29,6,7 - vsel 29,7,0,29 - .long 0x102128C0 - .long 0x13C686C2 - .long 0x13DEE8C0 - .long 0x10A5F0C0 - lvx 28,28,7 - .long 0x13CD06C2 - .long 0x118CF0C0 - .long 0x13CA7EC2 - .long 0x118CF0C0 - .long 0x118CC8C0 - .long 0x108458C0 - vsel 29,3,2,1 - .long 0x1063E0C0 - .long 0x1084E8C0 - .long 0x13C1FEC2 - .long 0x1084F0C0 - vxor 29,5,6 - vsel 29,6,7,29 - .long 0x100020C0 - .long 0x13C586C2 - .long 0x13DEE8C0 - .long 0x1084F0C0 - lvx 28,29,7 - .long 0x13CE06C2 - .long 0x11ADF0C0 - .long 0x13CB7EC2 - .long 0x11ADF0C0 - .long 0x11ADD0C0 - .long 0x106360C0 - vsel 29,2,1,0 - .long 0x1042E0C0 - .long 0x1063E8C0 - .long 0x13C0FEC2 - .long 0x1063F0C0 - vxor 29,4,5 - vsel 29,5,6,29 - .long 0x10E718C0 - .long 0x13C486C2 - .long 0x13DEE8C0 - .long 0x1063F0C0 - lvx 28,30,7 - .long 0x13CF06C2 - .long 0x11CEF0C0 - .long 0x13CC7EC2 - .long 0x11CEF0C0 - .long 0x11CED8C0 - .long 0x104268C0 - vsel 29,1,0,7 - .long 0x1021E0C0 - .long 0x1042E8C0 - .long 0x13C7FEC2 - .long 0x1042F0C0 - vxor 29,3,4 - vsel 29,4,5,29 - .long 0x10C610C0 - .long 0x13C386C2 - .long 0x13DEE8C0 - .long 0x1042F0C0 - lvx 28,31,7 - addi 7,7,0x80 - .long 0x13D006C2 - .long 0x11EFF0C0 - .long 0x13CD7EC2 - .long 0x11EFF0C0 - .long 0x11EF40C0 - .long 0x102170C0 - vsel 29,0,7,6 - .long 0x1000E0C0 - .long 0x1021E8C0 - .long 0x13C6FEC2 - .long 0x1021F0C0 - vxor 29,2,3 - vsel 29,3,4,29 - .long 0x10A508C0 - .long 0x13C286C2 - .long 0x13DEE8C0 - .long 0x1021F0C0 - lvx 28,0,7 - .long 0x13D106C2 - .long 0x1210F0C0 - .long 0x13CE7EC2 - .long 0x1210F0C0 - .long 0x121048C0 - .long 0x100078C0 - vsel 29,7,6,5 - .long 0x10E7E0C0 - .long 0x1000E8C0 - .long 0x13C5FEC2 - .long 0x1000F0C0 - vxor 29,1,2 - vsel 29,2,3,29 - .long 0x108400C0 - .long 0x13C186C2 - .long 0x13DEE8C0 - .long 0x1000F0C0 - lvx 28,10,7 - .long 0x13D206C2 - .long 0x1231F0C0 - .long 0x13CF7EC2 - .long 0x1231F0C0 - .long 0x123150C0 - .long 0x10E780C0 - vsel 29,6,5,4 - .long 0x10C6E0C0 - .long 0x10E7E8C0 - .long 0x13C4FEC2 - .long 0x10E7F0C0 - vxor 29,0,1 - vsel 29,1,2,29 - .long 0x106338C0 - .long 0x13C086C2 - .long 0x13DEE8C0 - .long 0x10E7F0C0 - lvx 28,26,7 - .long 0x13D306C2 - .long 0x1252F0C0 - .long 0x13D07EC2 - .long 0x1252F0C0 - .long 0x125258C0 - .long 0x10C688C0 - vsel 29,5,4,3 - .long 0x10A5E0C0 - .long 0x10C6E8C0 - .long 0x13C3FEC2 - .long 0x10C6F0C0 - vxor 29,7,0 - vsel 29,0,1,29 - .long 0x104230C0 - .long 0x13C786C2 - .long 0x13DEE8C0 - .long 0x10C6F0C0 - lvx 28,27,7 - .long 0x13D806C2 - .long 0x1273F0C0 - .long 0x13D17EC2 - .long 0x1273F0C0 - .long 0x127360C0 - .long 0x10A590C0 - vsel 29,4,3,2 - .long 0x1084E0C0 - .long 0x10A5E8C0 - .long 0x13C2FEC2 - .long 0x10A5F0C0 - vxor 29,6,7 - vsel 29,7,0,29 - .long 0x102128C0 - .long 0x13C686C2 - .long 0x13DEE8C0 - .long 0x10A5F0C0 - lvx 28,28,7 - .long 0x13D906C2 - .long 0x1318F0C0 - .long 0x13D27EC2 - .long 0x1318F0C0 - .long 0x131868C0 - .long 0x108498C0 - vsel 29,3,2,1 - .long 0x1063E0C0 - .long 0x1084E8C0 - .long 0x13C1FEC2 - .long 0x1084F0C0 - vxor 29,5,6 - vsel 29,6,7,29 - .long 0x100020C0 - .long 0x13C586C2 - .long 0x13DEE8C0 - .long 0x1084F0C0 - lvx 28,29,7 - .long 0x13DA06C2 - .long 0x1339F0C0 - .long 0x13D37EC2 - .long 0x1339F0C0 - .long 0x133970C0 - .long 0x1063C0C0 - vsel 29,2,1,0 - .long 0x1042E0C0 - .long 0x1063E8C0 - .long 0x13C0FEC2 - .long 0x1063F0C0 - vxor 29,4,5 - vsel 29,5,6,29 - .long 0x10E718C0 - .long 0x13C486C2 - .long 0x13DEE8C0 - .long 0x1063F0C0 - lvx 28,30,7 - .long 0x13DB06C2 - .long 0x135AF0C0 - .long 0x13D87EC2 - .long 0x135AF0C0 - .long 0x135A78C0 - .long 0x1042C8C0 - vsel 29,1,0,7 - .long 0x1021E0C0 - .long 0x1042E8C0 - .long 0x13C7FEC2 - .long 0x1042F0C0 - vxor 29,3,4 - vsel 29,4,5,29 - .long 0x10C610C0 - .long 0x13C386C2 - .long 0x13DEE8C0 - .long 0x1042F0C0 - lvx 28,31,7 - addi 7,7,0x80 - .long 0x13C806C2 - .long 0x137BF0C0 - .long 0x13D97EC2 - .long 0x137BF0C0 - .long 0x137B80C0 - .long 0x1021D0C0 - vsel 29,0,7,6 - .long 0x1000E0C0 - .long 0x1021E8C0 - .long 0x13C6FEC2 - .long 0x1021F0C0 - vxor 29,2,3 - vsel 29,3,4,29 - .long 0x10A508C0 - .long 0x13C286C2 - .long 0x13DEE8C0 - .long 0x1021F0C0 - lvx 28,0,7 - .long 0x13C906C2 - .long 0x1108F0C0 - .long 0x13DA7EC2 - .long 0x1108F0C0 - .long 0x110888C0 - .long 0x1000D8C0 - vsel 29,7,6,5 - .long 0x10E7E0C0 - .long 0x1000E8C0 - .long 0x13C5FEC2 - .long 0x1000F0C0 - vxor 29,1,2 - vsel 29,2,3,29 - .long 0x108400C0 - .long 0x13C186C2 - .long 0x13DEE8C0 - .long 0x1000F0C0 - lvx 28,10,7 - bdnz .L16_xx - - lvx 10,0,11 - subic. 5,5,1 - lvx 11,10,11 - .long 0x100050C0 - lvx 12,26,11 - .long 0x102158C0 - lvx 13,27,11 - .long 0x104260C0 - lvx 14,28,11 - .long 0x106368C0 - lvx 15,29,11 - .long 0x108470C0 - lvx 16,30,11 - .long 0x10A578C0 - lvx 17,31,11 - .long 0x10C680C0 - .long 0x10E788C0 - bne .Loop - vperm 0,0,1,28 - vperm 2,2,3,28 - vperm 4,4,5,28 - vperm 6,6,7,28 - .long 0x7C001F99 - .long 0x7C4A1F99 - .long 0x7C9A1F99 - .long 0x7CDB1F99 - addi 11,1,207 - mtlr 8 - or 12,12,12 - lvx 24,0,11 - lvx 25,10,11 - lvx 26,26,11 - lvx 27,27,11 - lvx 28,28,11 - lvx 29,29,11 - lvx 30,30,11 - lvx 31,31,11 - ld 26,336(1) - ld 27,344(1) - ld 28,352(1) - ld 29,360(1) - ld 30,368(1) - ld 31,376(1) - addi 1,1,384 - blr -.long 0 -.byte 0,12,4,1,0x80,6,3,0 -.long 0 -.size sha512_block_p8,.-sha512_block_p8 -.align 6 -.LPICmeup: - mflr 0 - bcl 20,31,$+4 - mflr 6 - addi 6,6,56 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.space 28 -.long 0xd728ae22,0x428a2f98 -.long 0xd728ae22,0x428a2f98 -.long 0x23ef65cd,0x71374491 -.long 0x23ef65cd,0x71374491 -.long 0xec4d3b2f,0xb5c0fbcf -.long 0xec4d3b2f,0xb5c0fbcf -.long 0x8189dbbc,0xe9b5dba5 -.long 0x8189dbbc,0xe9b5dba5 -.long 0xf348b538,0x3956c25b -.long 0xf348b538,0x3956c25b -.long 0xb605d019,0x59f111f1 -.long 0xb605d019,0x59f111f1 -.long 0xaf194f9b,0x923f82a4 -.long 0xaf194f9b,0x923f82a4 -.long 0xda6d8118,0xab1c5ed5 -.long 0xda6d8118,0xab1c5ed5 -.long 0xa3030242,0xd807aa98 -.long 0xa3030242,0xd807aa98 -.long 0x45706fbe,0x12835b01 -.long 0x45706fbe,0x12835b01 -.long 0x4ee4b28c,0x243185be -.long 0x4ee4b28c,0x243185be -.long 0xd5ffb4e2,0x550c7dc3 -.long 0xd5ffb4e2,0x550c7dc3 -.long 0xf27b896f,0x72be5d74 -.long 0xf27b896f,0x72be5d74 -.long 0x3b1696b1,0x80deb1fe -.long 0x3b1696b1,0x80deb1fe -.long 0x25c71235,0x9bdc06a7 -.long 0x25c71235,0x9bdc06a7 -.long 0xcf692694,0xc19bf174 -.long 0xcf692694,0xc19bf174 -.long 0x9ef14ad2,0xe49b69c1 -.long 0x9ef14ad2,0xe49b69c1 -.long 0x384f25e3,0xefbe4786 -.long 0x384f25e3,0xefbe4786 -.long 0x8b8cd5b5,0x0fc19dc6 -.long 0x8b8cd5b5,0x0fc19dc6 -.long 0x77ac9c65,0x240ca1cc -.long 0x77ac9c65,0x240ca1cc -.long 0x592b0275,0x2de92c6f -.long 0x592b0275,0x2de92c6f -.long 0x6ea6e483,0x4a7484aa -.long 0x6ea6e483,0x4a7484aa -.long 0xbd41fbd4,0x5cb0a9dc -.long 0xbd41fbd4,0x5cb0a9dc -.long 0x831153b5,0x76f988da -.long 0x831153b5,0x76f988da -.long 0xee66dfab,0x983e5152 -.long 0xee66dfab,0x983e5152 -.long 0x2db43210,0xa831c66d -.long 0x2db43210,0xa831c66d -.long 0x98fb213f,0xb00327c8 -.long 0x98fb213f,0xb00327c8 -.long 0xbeef0ee4,0xbf597fc7 -.long 0xbeef0ee4,0xbf597fc7 -.long 0x3da88fc2,0xc6e00bf3 -.long 0x3da88fc2,0xc6e00bf3 -.long 0x930aa725,0xd5a79147 -.long 0x930aa725,0xd5a79147 -.long 0xe003826f,0x06ca6351 -.long 0xe003826f,0x06ca6351 -.long 0x0a0e6e70,0x14292967 -.long 0x0a0e6e70,0x14292967 -.long 0x46d22ffc,0x27b70a85 -.long 0x46d22ffc,0x27b70a85 -.long 0x5c26c926,0x2e1b2138 -.long 0x5c26c926,0x2e1b2138 -.long 0x5ac42aed,0x4d2c6dfc -.long 0x5ac42aed,0x4d2c6dfc -.long 0x9d95b3df,0x53380d13 -.long 0x9d95b3df,0x53380d13 -.long 0x8baf63de,0x650a7354 -.long 0x8baf63de,0x650a7354 -.long 0x3c77b2a8,0x766a0abb -.long 0x3c77b2a8,0x766a0abb -.long 0x47edaee6,0x81c2c92e -.long 0x47edaee6,0x81c2c92e -.long 0x1482353b,0x92722c85 -.long 0x1482353b,0x92722c85 -.long 0x4cf10364,0xa2bfe8a1 -.long 0x4cf10364,0xa2bfe8a1 -.long 0xbc423001,0xa81a664b -.long 0xbc423001,0xa81a664b -.long 0xd0f89791,0xc24b8b70 -.long 0xd0f89791,0xc24b8b70 -.long 0x0654be30,0xc76c51a3 -.long 0x0654be30,0xc76c51a3 -.long 0xd6ef5218,0xd192e819 -.long 0xd6ef5218,0xd192e819 -.long 0x5565a910,0xd6990624 -.long 0x5565a910,0xd6990624 -.long 0x5771202a,0xf40e3585 -.long 0x5771202a,0xf40e3585 -.long 0x32bbd1b8,0x106aa070 -.long 0x32bbd1b8,0x106aa070 -.long 0xb8d2d0c8,0x19a4c116 -.long 0xb8d2d0c8,0x19a4c116 -.long 0x5141ab53,0x1e376c08 -.long 0x5141ab53,0x1e376c08 -.long 0xdf8eeb99,0x2748774c -.long 0xdf8eeb99,0x2748774c -.long 0xe19b48a8,0x34b0bcb5 -.long 0xe19b48a8,0x34b0bcb5 -.long 0xc5c95a63,0x391c0cb3 -.long 0xc5c95a63,0x391c0cb3 -.long 0xe3418acb,0x4ed8aa4a -.long 0xe3418acb,0x4ed8aa4a -.long 0x7763e373,0x5b9cca4f -.long 0x7763e373,0x5b9cca4f -.long 0xd6b2b8a3,0x682e6ff3 -.long 0xd6b2b8a3,0x682e6ff3 -.long 0x5defb2fc,0x748f82ee -.long 0x5defb2fc,0x748f82ee -.long 0x43172f60,0x78a5636f -.long 0x43172f60,0x78a5636f -.long 0xa1f0ab72,0x84c87814 -.long 0xa1f0ab72,0x84c87814 -.long 0x1a6439ec,0x8cc70208 -.long 0x1a6439ec,0x8cc70208 -.long 0x23631e28,0x90befffa -.long 0x23631e28,0x90befffa -.long 0xde82bde9,0xa4506ceb -.long 0xde82bde9,0xa4506ceb -.long 0xb2c67915,0xbef9a3f7 -.long 0xb2c67915,0xbef9a3f7 -.long 0xe372532b,0xc67178f2 -.long 0xe372532b,0xc67178f2 -.long 0xea26619c,0xca273ece -.long 0xea26619c,0xca273ece -.long 0x21c0c207,0xd186b8c7 -.long 0x21c0c207,0xd186b8c7 -.long 0xcde0eb1e,0xeada7dd6 -.long 0xcde0eb1e,0xeada7dd6 -.long 0xee6ed178,0xf57d4f7f -.long 0xee6ed178,0xf57d4f7f -.long 0x72176fba,0x06f067aa -.long 0x72176fba,0x06f067aa -.long 0xa2c898a6,0x0a637dc5 -.long 0xa2c898a6,0x0a637dc5 -.long 0xbef90dae,0x113f9804 -.long 0xbef90dae,0x113f9804 -.long 0x131c471b,0x1b710b35 -.long 0x131c471b,0x1b710b35 -.long 0x23047d84,0x28db77f5 -.long 0x23047d84,0x28db77f5 -.long 0x40c72493,0x32caab7b -.long 0x40c72493,0x32caab7b -.long 0x15c9bebc,0x3c9ebe0a -.long 0x15c9bebc,0x3c9ebe0a -.long 0x9c100d4c,0x431d67c4 -.long 0x9c100d4c,0x431d67c4 -.long 0xcb3e42b6,0x4cc5d4be -.long 0xcb3e42b6,0x4cc5d4be -.long 0xfc657e2a,0x597f299c -.long 0xfc657e2a,0x597f299c -.long 0x3ad6faec,0x5fcb6fab -.long 0x3ad6faec,0x5fcb6fab -.long 0x4a475817,0x6c44198c -.long 0x4a475817,0x6c44198c -.long 0,0 -.long 0,0 -.long 0x14151617,0x10111213 -.long 0x04050607,0x00010203 -.byte 83,72,65,53,49,50,32,102,111,114,32,80,111,119,101,114,73,83,65,32,50,46,48,55,44,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0 -.align 2 -.align 2 diff --git a/sys/crypto/openssl/powerpc64le/vpaes-ppc.S b/sys/crypto/openssl/powerpc64le/vpaes-ppc.S deleted file mode 100644 index 718232627e6..00000000000 --- a/sys/crypto/openssl/powerpc64le/vpaes-ppc.S +++ /dev/null @@ -1,1479 +0,0 @@ -/* Do not modify. This file is auto-generated from vpaes-ppc.pl. */ -.machine "any" - -.abiversion 2 -.text - -.align 7 -_vpaes_consts: -.Lk_mc_forward: -.byte 0x0e,0x0d,0x0c,0x0f,0x0a,0x09,0x08,0x0b,0x06,0x05,0x04,0x07,0x02,0x01,0x00,0x03 -.byte 0x0a,0x09,0x08,0x0b,0x06,0x05,0x04,0x07,0x02,0x01,0x00,0x03,0x0e,0x0d,0x0c,0x0f -.byte 0x06,0x05,0x04,0x07,0x02,0x01,0x00,0x03,0x0e,0x0d,0x0c,0x0f,0x0a,0x09,0x08,0x0b -.byte 0x02,0x01,0x00,0x03,0x0e,0x0d,0x0c,0x0f,0x0a,0x09,0x08,0x0b,0x06,0x05,0x04,0x07 -.Lk_mc_backward: -.byte 0x0c,0x0f,0x0e,0x0d,0x08,0x0b,0x0a,0x09,0x04,0x07,0x06,0x05,0x00,0x03,0x02,0x01 -.byte 0x00,0x03,0x02,0x01,0x0c,0x0f,0x0e,0x0d,0x08,0x0b,0x0a,0x09,0x04,0x07,0x06,0x05 -.byte 0x04,0x07,0x06,0x05,0x00,0x03,0x02,0x01,0x0c,0x0f,0x0e,0x0d,0x08,0x0b,0x0a,0x09 -.byte 0x08,0x0b,0x0a,0x09,0x04,0x07,0x06,0x05,0x00,0x03,0x02,0x01,0x0c,0x0f,0x0e,0x0d -.Lk_sr: -.byte 0x0f,0x0e,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00 -.byte 0x0f,0x0a,0x05,0x00,0x0b,0x06,0x01,0x0c,0x07,0x02,0x0d,0x08,0x03,0x0e,0x09,0x04 -.byte 0x0f,0x06,0x0d,0x04,0x0b,0x02,0x09,0x00,0x07,0x0e,0x05,0x0c,0x03,0x0a,0x01,0x08 -.byte 0x0f,0x02,0x05,0x08,0x0b,0x0e,0x01,0x04,0x07,0x0a,0x0d,0x00,0x03,0x06,0x09,0x0c - - - - -.Lk_inv: -.byte 0x04,0x07,0x03,0x09,0x0a,0x0b,0x0c,0x02,0x0e,0x05,0x06,0x0f,0x0d,0x08,0x01,0xf0 -.byte 0x03,0x0d,0x0e,0x0c,0x02,0x05,0x08,0x09,0x01,0x04,0x0a,0x06,0x0f,0x0b,0x07,0xf0 -.Lk_ipt: -.byte 0xca,0xba,0xe0,0x90,0x52,0x22,0x78,0x08,0xc2,0xb2,0xe8,0x98,0x5a,0x2a,0x70,0x00 -.byte 0xcd,0x80,0xb1,0xfc,0xb0,0xfd,0xcc,0x81,0x4c,0x01,0x30,0x7d,0x31,0x7c,0x4d,0x00 -.Lk_sbo: -.byte 0x15,0xaa,0xbf,0x7a,0xc5,0x02,0xa8,0x78,0xd0,0xd2,0x6d,0x17,0x6f,0xbd,0xc7,0x00 -.byte 0x8e,0x1e,0x90,0xd1,0x41,0x2b,0x35,0xfa,0xcf,0xe4,0x74,0xa5,0x5f,0xbb,0x6a,0x00 -.Lk_sb1: -.byte 0x3b,0xf7,0xcc,0xc1,0x0d,0x2e,0xd9,0xef,0x36,0x18,0xd4,0x15,0xfa,0xe2,0x23,0x00 -.byte 0xa5,0xdf,0x7a,0x6e,0x14,0x2a,0xf5,0x44,0xb1,0x9b,0xe1,0x8f,0xcb,0x50,0x3e,0x00 -.Lk_sb2: -.byte 0xc2,0xa1,0x63,0xc8,0xab,0x82,0x23,0x4a,0x69,0xeb,0x88,0x40,0x0a,0xe1,0x29,0x00 -.byte 0x5e,0xb7,0xe9,0x55,0xbc,0x98,0x2f,0xcd,0xe2,0x7a,0x93,0xc6,0x0b,0x71,0x24,0x00 - - - - -.Lk_dipt: -.byte 0x15,0x4a,0x41,0x1e,0x11,0x4e,0x45,0x1a,0x0f,0x50,0x5b,0x04,0x0b,0x54,0x5f,0x00 -.byte 0x12,0x77,0x17,0x72,0xf4,0x91,0xf1,0x94,0x86,0xe3,0x83,0xe6,0x60,0x05,0x65,0x00 -.Lk_dsbo: -.byte 0xc7,0xaa,0x6d,0xb9,0xd4,0x94,0x3e,0x2d,0x13,0x87,0xea,0x53,0x7e,0xf9,0x40,0x00 -.byte 0xca,0x4b,0x81,0x59,0xd8,0xc5,0x8e,0x9c,0x12,0xd7,0x56,0x0f,0x93,0x44,0x1d,0x00 -.Lk_dsb9: -.byte 0xca,0xd5,0x1f,0x50,0x4f,0x99,0x4c,0xc9,0x85,0x1c,0x03,0x53,0x9a,0x86,0xd6,0x00 -.byte 0x72,0x5e,0x2c,0x9e,0xb2,0xfb,0xa5,0x65,0xc0,0x3b,0x17,0x89,0xec,0xd7,0x49,0x00 -.Lk_dsbd: -.byte 0xf5,0x6e,0x9b,0x13,0x88,0x2a,0x44,0x39,0x7d,0x57,0xcc,0xdf,0xe6,0xb1,0xa2,0x00 -.byte 0x29,0x31,0x18,0x0d,0x15,0xde,0xef,0xd3,0x3c,0xe2,0xfa,0xf7,0x24,0xc6,0xcb,0x00 -.Lk_dsbb: -.byte 0x60,0x26,0x46,0xf6,0xb0,0xf2,0xd4,0x04,0xd0,0x22,0x64,0x92,0x96,0xb4,0x42,0x00 -.byte 0xf3,0xff,0x0c,0x3e,0x32,0x55,0xaa,0x6b,0xc1,0x94,0x98,0xa6,0xcd,0x59,0x67,0x00 -.Lk_dsbe: -.byte 0x22,0x42,0x60,0x04,0x64,0xb4,0xf6,0xb0,0x46,0xf2,0x92,0x96,0x26,0xd4,0xd0,0x00 -.byte 0x94,0x67,0xf3,0x6b,0x98,0x59,0x3e,0x32,0x0c,0x55,0xa6,0xcd,0xff,0xaa,0xc1,0x00 - - - - -.Lk_dksd: -.byte 0x07,0x40,0xe3,0xa4,0x5a,0x1d,0xbe,0xf9,0xfe,0xb9,0x1a,0x5d,0xa3,0xe4,0x47,0x00 -.byte 0x5f,0xdc,0x69,0xea,0xab,0x28,0x9d,0x1e,0x41,0xc2,0x77,0xf4,0xb5,0x36,0x83,0x00 -.Lk_dksb: -.byte 0x03,0xd6,0x53,0x86,0x1c,0xc9,0x4c,0x99,0x9a,0x4f,0xca,0x1f,0x85,0x50,0xd5,0x00 -.byte 0xd9,0x93,0x25,0x6f,0x7e,0x34,0x82,0xc8,0x11,0x5b,0xed,0xa7,0xb6,0xfc,0x4a,0x00 -.Lk_dkse: -.byte 0x53,0x85,0x9a,0x4c,0x99,0x4f,0x50,0x86,0xd5,0x03,0x1c,0xca,0x1f,0xc9,0xd6,0x00 -.byte 0xcd,0x5e,0xf9,0x6a,0x20,0xb3,0x14,0x87,0xa2,0x31,0x96,0x05,0x4f,0xdc,0x7b,0xe8 -.Lk_dks9: -.byte 0x4a,0xed,0x93,0x34,0x82,0x25,0x5b,0xfc,0xb6,0x11,0x6f,0xc8,0x7e,0xd9,0xa7,0x00 -.byte 0x8b,0xb8,0x9f,0xac,0xe9,0xda,0xfd,0xce,0x45,0x76,0x51,0x62,0x27,0x14,0x33,0x00 - -.Lk_rcon: -.byte 0xb6,0xee,0x9d,0xaf,0xb9,0x91,0x83,0x1f,0x81,0x7d,0x7c,0x4d,0x08,0x98,0x2a,0x70 -.Lk_s63: -.byte 0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b,0x5b - -.Lk_opt: -.byte 0xf7,0x97,0x41,0x21,0xde,0xbe,0x68,0x08,0xff,0x9f,0x49,0x29,0xd6,0xb6,0x60,0x00 -.byte 0xe1,0x0d,0x5d,0xb1,0xb0,0x5c,0x0c,0xe0,0x01,0xed,0xbd,0x51,0x50,0xbc,0xec,0x00 -.Lk_deskew: -.byte 0x1d,0xfe,0xb9,0x5a,0x5d,0xbe,0xf9,0x1a,0x07,0xe4,0xa3,0x40,0x47,0xa4,0xe3,0x00 -.byte 0x28,0x41,0xc2,0xab,0xf4,0x9d,0x1e,0x77,0x5f,0x36,0xb5,0xdc,0x83,0xea,0x69,0x00 -.align 5 -.Lconsts: - mflr 0 - bcl 20,31,$+4 - mflr 12 - addi 12,12,-0x308 - mtlr 0 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 -.byte 86,101,99,116,111,114,32,80,101,114,109,117,116,97,116,105,111,110,32,65,69,83,32,102,111,114,32,65,108,116,105,86,101,99,44,77,105,107,101,32,72,97,109,98,117,114,103,32,40,83,116,97,110,102,111,114,100,32,85,110,105,118,101,114,115,105,116,121,41,0 -.align 2 -.align 6 - - - - - - -.align 4 -_vpaes_encrypt_preheat: - mflr 8 - bl .Lconsts - mtlr 8 - li 11, 0xc0 - li 10, 0xd0 - li 9, 0xe0 - li 8, 0xf0 - vxor 7, 7, 7 - vspltisb 8,4 - vspltisb 9,0x0f - lvx 10, 12, 11 - li 11, 0x100 - lvx 11, 12, 10 - li 10, 0x110 - lvx 12, 12, 9 - li 9, 0x120 - lvx 13, 12, 8 - li 8, 0x130 - lvx 14, 12, 11 - li 11, 0x140 - lvx 15, 12, 10 - li 10, 0x150 - lvx 16, 12, 9 - lvx 17, 12, 8 - lvx 18, 12, 11 - lvx 19, 12, 10 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - - - - - - - - - - -.align 5 -_vpaes_encrypt_core: - lwz 8, 240(5) - li 9, 16 - lvx 5, 0, 5 - li 11, 0x10 - lvx 6, 9, 5 - addi 9, 9, 16 - vperm 5, 6, 5, 31 - addi 10, 11, 0x40 - vsrb 1, 0, 8 - vperm 0, 12, 12, 0 - vperm 1, 13, 13, 1 - vxor 0, 0, 5 - vxor 0, 0, 1 - mtctr 8 - b .Lenc_entry - -.align 4 -.Lenc_loop: - - vperm 4, 17, 7, 2 - lvx 1, 12, 11 - addi 11, 11, 16 - vperm 0, 16, 7, 3 - vxor 4, 4, 5 - andi. 11, 11, 0x30 - vperm 5, 19, 7, 2 - vxor 0, 0, 4 - vperm 2, 18, 7, 3 - lvx 4, 12, 10 - addi 10, 11, 0x40 - vperm 3, 0, 7, 1 - vxor 2, 2, 5 - vperm 0, 0, 7, 4 - vxor 3, 3, 2 - vperm 4, 3, 7, 1 - vxor 0, 0, 3 - vxor 0, 0, 4 - -.Lenc_entry: - - vsrb 1, 0, 8 - vperm 5, 11, 11, 0 - vxor 0, 0, 1 - vperm 3, 10, 10, 1 - vperm 4, 10, 10, 0 - vand 0, 0, 9 - vxor 3, 3, 5 - vxor 4, 4, 5 - vperm 2, 10, 7, 3 - vor 5,6,6 - lvx 6, 9, 5 - vperm 3, 10, 7, 4 - addi 9, 9, 16 - vxor 2, 2, 0 - vperm 5, 6, 5, 31 - vxor 3, 3, 1 - bdnz .Lenc_loop - - - addi 10, 11, 0x80 - - - vperm 4, 14, 7, 2 - lvx 1, 12, 10 - vperm 0, 15, 7, 3 - vxor 4, 4, 5 - vxor 0, 0, 4 - vperm 0, 0, 7, 1 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.globl vpaes_encrypt -.type vpaes_encrypt,@function -.align 5 -vpaes_encrypt: -.localentry vpaes_encrypt,0 - - stdu 1,-256(1) - li 10,63 - li 11,79 - mflr 6 - li 7,-1 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 7,252(1) - li 0, -1 - std 6,272(1) - or 0,0,0 - - bl _vpaes_encrypt_preheat - - lvsr 27, 0, 3 - lvx 0, 0, 3 - addi 3, 3, 15 - lvsl 29, 0, 4 - lvsr 31, 0, 5 - lvx 26, 0, 3 - vperm 0, 26, 0, 27 - - bl _vpaes_encrypt_core - - andi. 8, 4, 15 - li 9, 16 - beq .Lenc_out_aligned - - vperm 0, 0, 0, 29 - mtctr 9 -.Lenc_out_unaligned: - stvebx 0, 0, 4 - addi 4, 4, 1 - bdnz .Lenc_out_unaligned - b .Lenc_done - -.align 4 -.Lenc_out_aligned: - stvx 0, 0, 4 -.Lenc_done: - - li 10,63 - li 11,79 - mtlr 6 - or 7,7,7 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - addi 1,1,256 - blr -.long 0 -.byte 0,12,0x04,1,0x80,0,3,0 -.long 0 -.size vpaes_encrypt,.-vpaes_encrypt - -.align 4 -_vpaes_decrypt_preheat: - mflr 8 - bl .Lconsts - mtlr 8 - li 11, 0xc0 - li 10, 0xd0 - li 9, 0x160 - li 8, 0x170 - vxor 7, 7, 7 - vspltisb 8,4 - vspltisb 9,0x0f - lvx 10, 12, 11 - li 11, 0x180 - lvx 11, 12, 10 - li 10, 0x190 - lvx 12, 12, 9 - li 9, 0x1a0 - lvx 13, 12, 8 - li 8, 0x1b0 - lvx 14, 12, 11 - li 11, 0x1c0 - lvx 15, 12, 10 - li 10, 0x1d0 - lvx 16, 12, 9 - li 9, 0x1e0 - lvx 17, 12, 8 - li 8, 0x1f0 - lvx 18, 12, 11 - li 11, 0x200 - lvx 19, 12, 10 - li 10, 0x210 - lvx 20, 12, 9 - lvx 21, 12, 8 - lvx 22, 12, 11 - lvx 23, 12, 10 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - -.align 4 -_vpaes_decrypt_core: - lwz 8, 240(5) - li 9, 16 - lvx 5, 0, 5 - li 11, 0x30 - lvx 6, 9, 5 - addi 9, 9, 16 - vperm 5, 6, 5, 31 - vsrb 1, 0, 8 - vperm 0, 12, 12, 0 - vperm 1, 13, 13, 1 - vxor 0, 0, 5 - vxor 0, 0, 1 - mtctr 8 - b .Ldec_entry - -.align 4 -.Ldec_loop: - - - - lvx 0, 12, 11 - - - vperm 4, 16, 7, 2 - subi 11, 11, 16 - vperm 1, 17, 7, 3 - andi. 11, 11, 0x30 - vxor 5, 5, 4 - - vxor 5, 5, 1 - - - vperm 4, 18, 7, 2 - vperm 5, 5, 7, 0 - vperm 1, 19, 7, 3 - vxor 5, 5, 4 - - vxor 5, 5, 1 - - - vperm 4, 20, 7, 2 - vperm 5, 5, 7, 0 - vperm 1, 21, 7, 3 - vxor 5, 5, 4 - - vxor 5, 5, 1 - - - vperm 4, 22, 7, 2 - vperm 5, 5, 7, 0 - vperm 1, 23, 7, 3 - vxor 0, 5, 4 - vxor 0, 0, 1 - -.Ldec_entry: - - vsrb 1, 0, 8 - vperm 2, 11, 11, 0 - vxor 0, 0, 1 - vperm 3, 10, 10, 1 - vperm 4, 10, 10, 0 - vand 0, 0, 9 - vxor 3, 3, 2 - vxor 4, 4, 2 - vperm 2, 10, 7, 3 - vor 5,6,6 - lvx 6, 9, 5 - vperm 3, 10, 7, 4 - addi 9, 9, 16 - vxor 2, 2, 0 - vperm 5, 6, 5, 31 - vxor 3, 3, 1 - bdnz .Ldec_loop - - - addi 10, 11, 0x80 - - vperm 4, 14, 7, 2 - - lvx 2, 12, 10 - vperm 1, 15, 7, 3 - vxor 4, 4, 5 - vxor 0, 1, 4 - vperm 0, 0, 7, 2 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.globl vpaes_decrypt -.type vpaes_decrypt,@function -.align 5 -vpaes_decrypt: -.localentry vpaes_decrypt,0 - - stdu 1,-256(1) - li 10,63 - li 11,79 - mflr 6 - li 7,-1 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 7,252(1) - li 0, -1 - std 6,272(1) - or 0,0,0 - - bl _vpaes_decrypt_preheat - - lvsr 27, 0, 3 - lvx 0, 0, 3 - addi 3, 3, 15 - lvsl 29, 0, 4 - lvsr 31, 0, 5 - lvx 26, 0, 3 - vperm 0, 26, 0, 27 - - bl _vpaes_decrypt_core - - andi. 8, 4, 15 - li 9, 16 - beq .Ldec_out_aligned - - vperm 0, 0, 0, 29 - mtctr 9 -.Ldec_out_unaligned: - stvebx 0, 0, 4 - addi 4, 4, 1 - bdnz .Ldec_out_unaligned - b .Ldec_done - -.align 4 -.Ldec_out_aligned: - stvx 0, 0, 4 -.Ldec_done: - - li 10,63 - li 11,79 - mtlr 6 - or 7,7,7 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - addi 1,1,256 - blr -.long 0 -.byte 0,12,0x04,1,0x80,0,3,0 -.long 0 -.size vpaes_decrypt,.-vpaes_decrypt - -.globl vpaes_cbc_encrypt -.type vpaes_cbc_encrypt,@function -.align 5 -vpaes_cbc_encrypt: -.localentry vpaes_cbc_encrypt,0 - - cmpldi 5,16 - .long 0x4dc00020 - - stdu 1,-272(1) - mflr 0 - li 10,63 - li 11,79 - li 12,-1 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 12,252(1) - std 30,256(1) - std 31,264(1) - li 9, -16 - std 0, 288(1) - - and 30, 5, 9 - andi. 9, 4, 15 - mr 5, 6 - mr 31, 7 - li 6, -1 - mcrf 1, 0 - mr 7, 12 - or 6,6,6 - - lvx 24, 0, 31 - li 9, 15 - lvsr 27, 0, 31 - lvx 25, 9, 31 - vperm 24, 25, 24, 27 - - cmpwi 8, 0 - neg 8, 3 - vxor 7, 7, 7 - lvsr 31, 0, 5 - lvsl 29, 0, 4 - lvsl 27, 0, 8 - vnor 30, 7, 7 - lvx 26, 0, 3 - vperm 30, 30, 7, 29 - addi 3, 3, 15 - - beq .Lcbc_decrypt - - bl _vpaes_encrypt_preheat - li 0, 16 - - beq 1, .Lcbc_enc_loop - - vor 0,26,26 - lvx 26, 0, 3 - addi 3, 3, 16 - vperm 0, 26, 0, 27 - vxor 0, 0, 24 - - bl _vpaes_encrypt_core - - andi. 8, 4, 15 - vor 24,0,0 - sub 9, 4, 8 - vperm 28, 0, 0, 29 - -.Lcbc_enc_head: - stvebx 28, 8, 9 - cmpwi 8, 15 - addi 8, 8, 1 - bne .Lcbc_enc_head - - sub. 30, 30, 0 - addi 4, 4, 16 - beq .Lcbc_unaligned_done - -.Lcbc_enc_loop: - vor 0,26,26 - lvx 26, 0, 3 - addi 3, 3, 16 - vperm 0, 26, 0, 27 - vxor 0, 0, 24 - - bl _vpaes_encrypt_core - - vor 24,0,0 - sub. 30, 30, 0 - vperm 0, 0, 0, 29 - vsel 1, 28, 0, 30 - vor 28,0,0 - stvx 1, 0, 4 - addi 4, 4, 16 - bne .Lcbc_enc_loop - - b .Lcbc_done - -.align 5 -.Lcbc_decrypt: - bl _vpaes_decrypt_preheat - li 0, 16 - - beq 1, .Lcbc_dec_loop - - vor 0,26,26 - lvx 26, 0, 3 - addi 3, 3, 16 - vperm 0, 26, 0, 27 - vor 25,0,0 - - bl _vpaes_decrypt_core - - andi. 8, 4, 15 - vxor 0, 0, 24 - vor 24,25,25 - sub 9, 4, 8 - vperm 28, 0, 0, 29 - -.Lcbc_dec_head: - stvebx 28, 8, 9 - cmpwi 8, 15 - addi 8, 8, 1 - bne .Lcbc_dec_head - - sub. 30, 30, 0 - addi 4, 4, 16 - beq .Lcbc_unaligned_done - -.Lcbc_dec_loop: - vor 0,26,26 - lvx 26, 0, 3 - addi 3, 3, 16 - vperm 0, 26, 0, 27 - vor 25,0,0 - - bl _vpaes_decrypt_core - - vxor 0, 0, 24 - vor 24,25,25 - sub. 30, 30, 0 - vperm 0, 0, 0, 29 - vsel 1, 28, 0, 30 - vor 28,0,0 - stvx 1, 0, 4 - addi 4, 4, 16 - bne .Lcbc_dec_loop - -.Lcbc_done: - beq 1, .Lcbc_write_iv - -.Lcbc_unaligned_done: - andi. 8, 4, 15 - sub 4, 4, 8 - li 9, 0 -.Lcbc_tail: - stvebx 28, 9, 4 - addi 9, 9, 1 - cmpw 9, 8 - bne .Lcbc_tail - -.Lcbc_write_iv: - neg 8, 31 - li 10, 4 - lvsr 29, 0, 8 - li 11, 8 - li 12, 12 - vperm 24, 24, 24, 29 - stvewx 24, 0, 31 - stvewx 24, 10, 31 - stvewx 24, 11, 31 - stvewx 24, 12, 31 - - or 7,7,7 - li 10,63 - li 11,79 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 -.Lcbc_abort: - ld 0, 288(1) - ld 30,256(1) - ld 31,264(1) - mtlr 0 - addi 1,1,272 - blr -.long 0 -.byte 0,12,0x04,1,0x80,2,6,0 -.long 0 -.size vpaes_cbc_encrypt,.-vpaes_cbc_encrypt - - - - - -.align 4 -_vpaes_key_preheat: - mflr 8 - bl .Lconsts - mtlr 8 - li 11, 0xc0 - li 10, 0xd0 - li 9, 0xe0 - li 8, 0xf0 - - vspltisb 8,4 - vxor 9,9,9 - lvx 10, 12, 11 - li 11, 0x120 - lvx 11, 12, 10 - li 10, 0x130 - lvx 12, 12, 9 - li 9, 0x220 - lvx 13, 12, 8 - li 8, 0x230 - - lvx 14, 12, 11 - li 11, 0x240 - lvx 15, 12, 10 - li 10, 0x250 - - lvx 16, 12, 9 - li 9, 0x260 - lvx 17, 12, 8 - li 8, 0x270 - lvx 18, 12, 11 - li 11, 0x280 - lvx 19, 12, 10 - li 10, 0x290 - lvx 20, 12, 9 - li 9, 0x2a0 - lvx 21, 12, 8 - li 8, 0x2b0 - lvx 22, 12, 11 - lvx 23, 12, 10 - - lvx 24, 12, 9 - lvx 25, 0, 12 - lvx 26, 12, 8 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.align 4 -_vpaes_schedule_core: - mflr 7 - - bl _vpaes_key_preheat - - - neg 8, 3 - lvx 0, 0, 3 - addi 3, 3, 15 - lvsl 27, 0, 8 - lvx 6, 0, 3 - addi 3, 3, 8 - vperm 0, 6, 0, 27 - - - vor 3,0,0 - bl _vpaes_schedule_transform - vor 7,0,0 - - bne 1, .Lschedule_am_decrypting - - - li 8, 0x30 - li 9, 4 - li 10, 8 - li 11, 12 - - lvsl 29, 0, 5 - vnor 30, 9, 9 - vperm 30, 30, 9, 29 - - - vperm 28, 0, 0, 29 - stvewx 28, 0, 5 - stvewx 28, 9, 5 - stvewx 28, 10, 5 - addi 10, 12, 0x80 - stvewx 28, 11, 5 - b .Lschedule_go - -.Lschedule_am_decrypting: - srwi 8, 4, 1 - andi. 8, 8, 32 - xori 8, 8, 32 - addi 10, 12, 0x80 - - lvx 1, 8, 10 - li 9, 4 - li 10, 8 - li 11, 12 - vperm 4, 3, 3, 1 - - neg 0, 5 - lvsr 29, 0, 0 - vnor 30, 9, 9 - vperm 30, 9, 30, 29 - - - vperm 28, 4, 4, 29 - stvewx 28, 0, 5 - stvewx 28, 9, 5 - stvewx 28, 10, 5 - addi 10, 12, 0x80 - stvewx 28, 11, 5 - addi 5, 5, 15 - xori 8, 8, 0x30 - -.Lschedule_go: - cmplwi 4, 192 - bgt .Lschedule_256 - beq .Lschedule_192 - - - - - - - - - - -.Lschedule_128: - li 0, 10 - mtctr 0 - -.Loop_schedule_128: - bl _vpaes_schedule_round - bdz .Lschedule_mangle_last - bl _vpaes_schedule_mangle - b .Loop_schedule_128 - - - - - - - - - - - - - - - - -.align 4 -.Lschedule_192: - li 0, 4 - lvx 0, 0, 3 - vperm 0, 0, 6, 27 - vsldoi 0, 0, 3, 16-8 - bl _vpaes_schedule_transform - vsldoi 6, 9, 0, 16-8 - vsldoi 6, 6, 9, 16-8 - mtctr 0 - -.Loop_schedule_192: - bl _vpaes_schedule_round - vsldoi 0, 0, 6, 16-8 - bl _vpaes_schedule_mangle - bl _vpaes_schedule_192_smear - bl _vpaes_schedule_mangle - bl _vpaes_schedule_round - bdz .Lschedule_mangle_last - bl _vpaes_schedule_mangle - bl _vpaes_schedule_192_smear - b .Loop_schedule_192 - - - - - - - - - - - -.align 4 -.Lschedule_256: - li 0, 7 - addi 3, 3, 8 - lvx 0, 0, 3 - vperm 0, 0, 6, 27 - bl _vpaes_schedule_transform - mtctr 0 - -.Loop_schedule_256: - bl _vpaes_schedule_mangle - vor 6,0,0 - - - bl _vpaes_schedule_round - bdz .Lschedule_mangle_last - bl _vpaes_schedule_mangle - - - vspltw 0, 0, 3-3 - vor 5,7,7 - vor 7,6,6 - bl _vpaes_schedule_low_round - vor 7,5,5 - - b .Loop_schedule_256 - - - - - - - - - - -.align 4 -.Lschedule_mangle_last: - - li 11, 0x2e0 - li 9, 0x2f0 - bne 1, .Lschedule_mangle_last_dec - - - lvx 1, 8, 10 - li 11, 0x2c0 - li 9, 0x2d0 - vperm 0, 0, 0, 1 - - lvx 12, 11, 12 - lvx 13, 9, 12 - addi 5, 5, 16 - vxor 0, 0, 26 - bl _vpaes_schedule_transform - - - vperm 0, 0, 0, 29 - li 10, 4 - vsel 2, 28, 0, 30 - li 11, 8 - stvx 2, 0, 5 - li 12, 12 - stvewx 0, 0, 5 - stvewx 0, 10, 5 - stvewx 0, 11, 5 - stvewx 0, 12, 5 - b .Lschedule_mangle_done - -.align 4 -.Lschedule_mangle_last_dec: - lvx 12, 11, 12 - lvx 13, 9, 12 - addi 5, 5, -16 - vxor 0, 0, 26 - bl _vpaes_schedule_transform - - - addi 9, 5, -15 - vperm 0, 0, 0, 29 - li 10, 4 - vsel 2, 28, 0, 30 - li 11, 8 - stvx 2, 0, 5 - li 12, 12 - stvewx 0, 0, 9 - stvewx 0, 10, 9 - stvewx 0, 11, 9 - stvewx 0, 12, 9 - - -.Lschedule_mangle_done: - mtlr 7 - - vxor 0, 0, 0 - vxor 1, 1, 1 - vxor 2, 2, 2 - vxor 3, 3, 3 - vxor 4, 4, 4 - vxor 5, 5, 5 - vxor 6, 6, 6 - vxor 7, 7, 7 - - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - - - - - - - - - - -.align 4 -_vpaes_schedule_192_smear: - vspltw 0, 7, 3-3 - vsldoi 1, 6, 9, 16-12 - vsldoi 0, 0, 7, 16-8 - vxor 6, 6, 1 - vxor 6, 6, 0 - vor 0,6,6 - vsldoi 6, 9, 6, 16-8 - vsldoi 6, 6, 9, 16-8 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - - - - - - - - - - - - - - -.align 4 -_vpaes_schedule_round: - - - vsldoi 1, 9, 24, 16-15 - vsldoi 24, 24, 24, 16-15 - vxor 7, 7, 1 - - - vspltw 0, 0, 3-3 - vsldoi 0, 0, 0, 16-1 - - - - -_vpaes_schedule_low_round: - - vsldoi 1, 7, 9, 16-12 - vxor 7, 7, 1 - vspltisb 1, 0x0f - vsldoi 4, 7, 9, 16-8 - - - vand 1, 1, 0 - vsrb 0, 0, 8 - vxor 7, 7, 4 - vperm 2, 11, 9, 1 - vxor 1, 1, 0 - vperm 3, 10, 9, 0 - vxor 3, 3, 2 - vperm 4, 10, 9, 1 - vxor 7, 7, 26 - vperm 3, 10, 9, 3 - vxor 4, 4, 2 - vperm 2, 10, 9, 4 - vxor 3, 3, 1 - vxor 2, 2, 0 - vperm 4, 15, 9, 3 - vperm 1, 14, 9, 2 - vxor 1, 1, 4 - - - vxor 0, 1, 7 - vxor 7, 1, 7 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - - - - - -.align 4 -_vpaes_schedule_transform: - - vsrb 2, 0, 8 - - vperm 0, 12, 12, 0 - - vperm 2, 13, 13, 2 - vxor 0, 0, 2 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - - - - - - - - - - - - - - - - - - - - - - - - -.align 4 -_vpaes_schedule_mangle: - - - bne 1, .Lschedule_mangle_dec - - - vxor 4, 0, 26 - addi 5, 5, 16 - vperm 4, 4, 4, 25 - vperm 1, 4, 4, 25 - vperm 3, 1, 1, 25 - vxor 4, 4, 1 - lvx 1, 8, 10 - vxor 3, 3, 4 - - vperm 3, 3, 3, 1 - addi 8, 8, -16 - andi. 8, 8, 0x30 - - - vperm 1, 3, 3, 29 - vsel 2, 28, 1, 30 - vor 28,1,1 - stvx 2, 0, 5 - blr - -.align 4 -.Lschedule_mangle_dec: - - - vsrb 1, 0, 8 - - - - vperm 2, 16, 16, 0 - - vperm 3, 17, 17, 1 - vxor 3, 3, 2 - vperm 3, 3, 9, 25 - - - vperm 2, 18, 18, 0 - vxor 2, 2, 3 - - vperm 3, 19, 19, 1 - vxor 3, 3, 2 - vperm 3, 3, 9, 25 - - - vperm 2, 20, 20, 0 - vxor 2, 2, 3 - - vperm 3, 21, 21, 1 - vxor 3, 3, 2 - - - vperm 2, 22, 22, 0 - vperm 3, 3, 9, 25 - - vperm 4, 23, 23, 1 - lvx 1, 8, 10 - vxor 2, 2, 3 - vxor 3, 4, 2 - - addi 5, 5, -16 - - vperm 3, 3, 3, 1 - addi 8, 8, -16 - andi. 8, 8, 0x30 - - - vperm 1, 3, 3, 29 - vsel 2, 28, 1, 30 - vor 28,1,1 - stvx 2, 0, 5 - blr -.long 0 -.byte 0,12,0x14,0,0,0,0,0 - -.globl vpaes_set_encrypt_key -.type vpaes_set_encrypt_key,@function -.align 5 -vpaes_set_encrypt_key: -.localentry vpaes_set_encrypt_key,0 - - stdu 1,-256(1) - li 10,63 - li 11,79 - mflr 0 - li 6,-1 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 6,252(1) - li 7, -1 - std 0, 272(1) - or 7,7,7 - - srwi 9, 4, 5 - addi 9, 9, 6 - stw 9, 240(5) - - cmplw 1,4,4 - li 8, 0x30 - bl _vpaes_schedule_core - - ld 0, 272(1) - li 10,63 - li 11,79 - or 6,6,6 - mtlr 0 - xor 3, 3, 3 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - addi 1,1,256 - blr -.long 0 -.byte 0,12,0x04,1,0x80,0,3,0 -.long 0 -.size vpaes_set_encrypt_key,.-vpaes_set_encrypt_key - -.globl vpaes_set_decrypt_key -.type vpaes_set_decrypt_key,@function -.align 4 -vpaes_set_decrypt_key: -.localentry vpaes_set_decrypt_key,0 - - stdu 1,-256(1) - li 10,63 - li 11,79 - mflr 0 - li 6,-1 - stvx 20,10,1 - addi 10,10,32 - stvx 21,11,1 - addi 11,11,32 - stvx 22,10,1 - addi 10,10,32 - stvx 23,11,1 - addi 11,11,32 - stvx 24,10,1 - addi 10,10,32 - stvx 25,11,1 - addi 11,11,32 - stvx 26,10,1 - addi 10,10,32 - stvx 27,11,1 - addi 11,11,32 - stvx 28,10,1 - addi 10,10,32 - stvx 29,11,1 - addi 11,11,32 - stvx 30,10,1 - stvx 31,11,1 - stw 6,252(1) - li 7, -1 - std 0, 272(1) - or 7,7,7 - - srwi 9, 4, 5 - addi 9, 9, 6 - stw 9, 240(5) - - slwi 9, 9, 4 - add 5, 5, 9 - - cmplwi 1, 4, 0 - srwi 8, 4, 1 - andi. 8, 8, 32 - xori 8, 8, 32 - bl _vpaes_schedule_core - - ld 0, 272(1) - li 10,63 - li 11,79 - or 6,6,6 - mtlr 0 - xor 3, 3, 3 - lvx 20,10,1 - addi 10,10,32 - lvx 21,11,1 - addi 11,11,32 - lvx 22,10,1 - addi 10,10,32 - lvx 23,11,1 - addi 11,11,32 - lvx 24,10,1 - addi 10,10,32 - lvx 25,11,1 - addi 11,11,32 - lvx 26,10,1 - addi 10,10,32 - lvx 27,11,1 - addi 11,11,32 - lvx 28,10,1 - addi 10,10,32 - lvx 29,11,1 - addi 11,11,32 - lvx 30,10,1 - lvx 31,11,1 - addi 1,1,256 - blr -.long 0 -.byte 0,12,0x04,1,0x80,0,3,0 -.long 0 -.size vpaes_set_decrypt_key,.-vpaes_set_decrypt_key diff --git a/sys/crypto/openssl/powerpc64le/x25519-ppc64.S b/sys/crypto/openssl/powerpc64le/x25519-ppc64.S deleted file mode 100644 index 17762f84c23..00000000000 --- a/sys/crypto/openssl/powerpc64le/x25519-ppc64.S +++ /dev/null @@ -1,349 +0,0 @@ -/* Do not modify. This file is auto-generated from x25519-ppc64.pl. */ -.abiversion 2 -.text - -.globl x25519_fe51_mul -.type x25519_fe51_mul,@function -.type x25519_fe51_mul,@function -.align 5 -x25519_fe51_mul: -.localentry x25519_fe51_mul,0 - - stdu 1,-144(1) - std 21,56(1) - std 22,64(1) - std 23,72(1) - std 24,80(1) - std 25,88(1) - std 26,96(1) - std 27,104(1) - std 28,112(1) - std 29,120(1) - std 30,128(1) - std 31,136(1) - - ld 6,0(5) - ld 7,0(4) - ld 8,8(4) - ld 9,16(4) - ld 10,24(4) - ld 11,32(4) - - mulld 22,7,6 - mulhdu 23,7,6 - - mulld 24,8,6 - mulhdu 25,8,6 - - mulld 30,11,6 - mulhdu 31,11,6 - ld 4,8(5) - mulli 11,11,19 - - mulld 26,9,6 - mulhdu 27,9,6 - - mulld 28,10,6 - mulhdu 29,10,6 - mulld 12,11,4 - mulhdu 21,11,4 - addc 22,22,12 - adde 23,23,21 - - mulld 12,7,4 - mulhdu 21,7,4 - addc 24,24,12 - adde 25,25,21 - - mulld 12,10,4 - mulhdu 21,10,4 - ld 6,16(5) - mulli 10,10,19 - addc 30,30,12 - adde 31,31,21 - - mulld 12,8,4 - mulhdu 21,8,4 - addc 26,26,12 - adde 27,27,21 - - mulld 12,9,4 - mulhdu 21,9,4 - addc 28,28,12 - adde 29,29,21 - mulld 12,10,6 - mulhdu 21,10,6 - addc 22,22,12 - adde 23,23,21 - - mulld 12,11,6 - mulhdu 21,11,6 - addc 24,24,12 - adde 25,25,21 - - mulld 12,9,6 - mulhdu 21,9,6 - ld 4,24(5) - mulli 9,9,19 - addc 30,30,12 - adde 31,31,21 - - mulld 12,7,6 - mulhdu 21,7,6 - addc 26,26,12 - adde 27,27,21 - - mulld 12,8,6 - mulhdu 21,8,6 - addc 28,28,12 - adde 29,29,21 - mulld 12,9,4 - mulhdu 21,9,4 - addc 22,22,12 - adde 23,23,21 - - mulld 12,10,4 - mulhdu 21,10,4 - addc 24,24,12 - adde 25,25,21 - - mulld 12,8,4 - mulhdu 21,8,4 - ld 6,32(5) - mulli 8,8,19 - addc 30,30,12 - adde 31,31,21 - - mulld 12,11,4 - mulhdu 21,11,4 - addc 26,26,12 - adde 27,27,21 - - mulld 12,7,4 - mulhdu 21,7,4 - addc 28,28,12 - adde 29,29,21 - mulld 12,8,6 - mulhdu 21,8,6 - addc 22,22,12 - adde 23,23,21 - - mulld 12,9,6 - mulhdu 21,9,6 - addc 24,24,12 - adde 25,25,21 - - mulld 12,10,6 - mulhdu 21,10,6 - addc 26,26,12 - adde 27,27,21 - - mulld 12,11,6 - mulhdu 21,11,6 - addc 28,28,12 - adde 29,29,21 - - mulld 12,7,6 - mulhdu 21,7,6 - addc 30,30,12 - adde 31,31,21 - -.Lfe51_reduce: - li 0,-1 - srdi 0,0,13 - - srdi 12,26,51 - and 9,26,0 - insrdi 12,27,51,0 - srdi 21,22,51 - and 7,22,0 - insrdi 21,23,51,0 - addc 28,28,12 - addze 29,29 - addc 24,24,21 - addze 25,25 - - srdi 12,28,51 - and 10,28,0 - insrdi 12,29,51,0 - srdi 21,24,51 - and 8,24,0 - insrdi 21,25,51,0 - addc 30,30,12 - addze 31,31 - add 9,9,21 - - srdi 12,30,51 - and 11,30,0 - insrdi 12,31,51,0 - mulli 12,12,19 - - add 7,7,12 - - srdi 21,9,51 - and 9,9,0 - add 10,10,21 - - srdi 12,7,51 - and 7,7,0 - add 8,8,12 - - std 9,16(3) - std 10,24(3) - std 11,32(3) - std 7,0(3) - std 8,8(3) - - ld 21,56(1) - ld 22,64(1) - ld 23,72(1) - ld 24,80(1) - ld 25,88(1) - ld 26,96(1) - ld 27,104(1) - ld 28,112(1) - ld 29,120(1) - ld 30,128(1) - ld 31,136(1) - addi 1,1,144 - blr -.long 0 -.byte 0,12,4,0,0x80,11,3,0 -.long 0 -.size x25519_fe51_mul,.-x25519_fe51_mul -.globl x25519_fe51_sqr -.type x25519_fe51_sqr,@function -.type x25519_fe51_sqr,@function -.align 5 -x25519_fe51_sqr: -.localentry x25519_fe51_sqr,0 - - stdu 1,-144(1) - std 21,56(1) - std 22,64(1) - std 23,72(1) - std 24,80(1) - std 25,88(1) - std 26,96(1) - std 27,104(1) - std 28,112(1) - std 29,120(1) - std 30,128(1) - std 31,136(1) - - ld 7,0(4) - ld 8,8(4) - ld 9,16(4) - ld 10,24(4) - ld 11,32(4) - - add 6,7,7 - mulli 21,11,19 - - mulld 22,7,7 - mulhdu 23,7,7 - mulld 24,8,6 - mulhdu 25,8,6 - mulld 26,9,6 - mulhdu 27,9,6 - mulld 28,10,6 - mulhdu 29,10,6 - mulld 30,11,6 - mulhdu 31,11,6 - add 6,8,8 - mulld 12,11,21 - mulhdu 11,11,21 - addc 28,28,12 - adde 29,29,11 - - mulli 5,10,19 - - mulld 12,8,8 - mulhdu 11,8,8 - addc 26,26,12 - adde 27,27,11 - mulld 12,9,6 - mulhdu 11,9,6 - addc 28,28,12 - adde 29,29,11 - mulld 12,10,6 - mulhdu 11,10,6 - addc 30,30,12 - adde 31,31,11 - mulld 12,21,6 - mulhdu 11,21,6 - add 6,10,10 - addc 22,22,12 - adde 23,23,11 - mulld 12,10,5 - mulhdu 10,10,5 - addc 24,24,12 - adde 25,25,10 - mulld 12,6,21 - mulhdu 10,6,21 - add 6,9,9 - addc 26,26,12 - adde 27,27,10 - - mulld 12,9,9 - mulhdu 10,9,9 - addc 30,30,12 - adde 31,31,10 - mulld 12,5,6 - mulhdu 10,5,6 - addc 22,22,12 - adde 23,23,10 - mulld 12,21,6 - mulhdu 10,21,6 - addc 24,24,12 - adde 25,25,10 - - b .Lfe51_reduce -.long 0 -.byte 0,12,4,0,0x80,11,2,0 -.long 0 -.size x25519_fe51_sqr,.-x25519_fe51_sqr -.globl x25519_fe51_mul121666 -.type x25519_fe51_mul121666,@function -.type x25519_fe51_mul121666,@function -.align 5 -x25519_fe51_mul121666: -.localentry x25519_fe51_mul121666,0 - - stdu 1,-144(1) - std 21,56(1) - std 22,64(1) - std 23,72(1) - std 24,80(1) - std 25,88(1) - std 26,96(1) - std 27,104(1) - std 28,112(1) - std 29,120(1) - std 30,128(1) - std 31,136(1) - - lis 6,1 - ori 6,6,56130 - ld 7,0(4) - ld 8,8(4) - ld 9,16(4) - ld 10,24(4) - ld 11,32(4) - - mulld 22,7,6 - mulhdu 23,7,6 - mulld 24,8,6 - mulhdu 25,8,6 - mulld 26,9,6 - mulhdu 27,9,6 - mulld 28,10,6 - mulhdu 29,10,6 - mulld 30,11,6 - mulhdu 31,11,6 - - b .Lfe51_reduce -.long 0 -.byte 0,12,4,0,0x80,11,2,0 -.long 0 -.size x25519_fe51_mul121666,.-x25519_fe51_mul121666 diff --git a/sys/dev/evdev/evdev.c b/sys/dev/evdev/evdev.c index 87cdaeb91e4..b18279472cd 100644 --- a/sys/dev/evdev/evdev.c +++ b/sys/dev/evdev/evdev.c @@ -67,12 +67,7 @@ enum evdev_sparse_result MALLOC_DEFINE(M_EVDEV, "evdev", "evdev memory"); -/* adb keyboard driver used on powerpc does not support evdev yet */ -#if defined(__powerpc__) && !defined(__powerpc64__) -int evdev_rcpt_mask = EVDEV_RCPT_KBDMUX | EVDEV_RCPT_HW_MOUSE; -#else int evdev_rcpt_mask = EVDEV_RCPT_HW_MOUSE | EVDEV_RCPT_HW_KBD; -#endif int evdev_sysmouse_t_axis = 0; SYSCTL_NODE(_kern, OID_AUTO, evdev, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, diff --git a/sys/dev/hwpmc/hwpmc_beri.c b/sys/dev/hwpmc/hwpmc_beri.c deleted file mode 100644 index 632b7ef3c2f..00000000000 --- a/sys/dev/hwpmc/hwpmc_beri.c +++ /dev/null @@ -1,522 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2019 Ruslan Bukin - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory (Department of Computer Science and - * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the - * DARPA SSITH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_hwpmc_hooks.h" - -#include -#include - -#include - -#define BERI_NCOUNTERS 56 -#define BERI_PMC_CAPS (PMC_CAP_USER | PMC_CAP_SYSTEM | \ - PMC_CAP_READ | PMC_CAP_WRITE ) - -struct beri_event_code_map { - uint32_t pe_ev; /* enum value */ - uint64_t (*get_func)(void); -}; - -const struct beri_event_code_map beri_event_codes[BERI_NCOUNTERS] = { - { PMC_EV_BERI_CYCLE, - statcounters_get_cycle_count }, - { PMC_EV_BERI_INST, - statcounters_get_inst_count }, - { PMC_EV_BERI_INST_USER, - statcounters_get_inst_user_count }, - { PMC_EV_BERI_INST_KERNEL, - statcounters_get_inst_kernel_count }, - { PMC_EV_BERI_IMPRECISE_SETBOUNDS, - statcounters_get_imprecise_setbounds_count }, - { PMC_EV_BERI_UNREPRESENTABLE_CAPS, - statcounters_get_unrepresentable_caps_count }, - { PMC_EV_BERI_ITLB_MISS, - statcounters_get_itlb_miss_count }, - { PMC_EV_BERI_DTLB_MISS, - statcounters_get_dtlb_miss_count }, - { PMC_EV_BERI_ICACHE_WRITE_HIT, - statcounters_get_icache_write_hit_count }, - { PMC_EV_BERI_ICACHE_WRITE_MISS, - statcounters_get_icache_write_miss_count }, - { PMC_EV_BERI_ICACHE_READ_HIT, - statcounters_get_icache_read_hit_count }, - { PMC_EV_BERI_ICACHE_READ_MISS, - statcounters_get_icache_read_miss_count }, - { PMC_EV_BERI_ICACHE_EVICT, - statcounters_get_icache_evict_count }, - { PMC_EV_BERI_DCACHE_WRITE_HIT, - statcounters_get_dcache_write_hit_count }, - { PMC_EV_BERI_DCACHE_WRITE_MISS, - statcounters_get_dcache_write_miss_count }, - { PMC_EV_BERI_DCACHE_READ_HIT, - statcounters_get_dcache_read_hit_count }, - { PMC_EV_BERI_DCACHE_READ_MISS, - statcounters_get_dcache_read_miss_count }, - { PMC_EV_BERI_DCACHE_EVICT, - statcounters_get_dcache_evict_count }, - { PMC_EV_BERI_DCACHE_SET_TAG_WRITE, - statcounters_get_dcache_set_tag_write_count }, - { PMC_EV_BERI_DCACHE_SET_TAG_READ, - statcounters_get_dcache_set_tag_read_count }, - { PMC_EV_BERI_L2CACHE_WRITE_HIT, - statcounters_get_l2cache_write_hit_count }, - { PMC_EV_BERI_L2CACHE_WRITE_MISS, - statcounters_get_l2cache_write_miss_count }, - { PMC_EV_BERI_L2CACHE_READ_HIT, - statcounters_get_l2cache_read_hit_count }, - { PMC_EV_BERI_L2CACHE_READ_MISS, - statcounters_get_l2cache_read_miss_count }, - { PMC_EV_BERI_L2CACHE_EVICT, - statcounters_get_l2cache_evict_count }, - { PMC_EV_BERI_L2CACHE_SET_TAG_WRITE, - statcounters_get_l2cache_set_tag_write_count }, - { PMC_EV_BERI_L2CACHE_SET_TAG_READ, - statcounters_get_l2cache_set_tag_read_count }, - { PMC_EV_BERI_MEM_BYTE_READ, - statcounters_get_mem_byte_read_count }, - { PMC_EV_BERI_MEM_BYTE_WRITE, - statcounters_get_mem_byte_write_count }, - { PMC_EV_BERI_MEM_HWORD_READ, - statcounters_get_mem_hword_read_count }, - { PMC_EV_BERI_MEM_HWORD_WRITE, - statcounters_get_mem_hword_write_count }, - { PMC_EV_BERI_MEM_WORD_READ, - statcounters_get_mem_word_read_count }, - { PMC_EV_BERI_MEM_WORD_WRITE, - statcounters_get_mem_word_write_count }, - { PMC_EV_BERI_MEM_DWORD_READ, - statcounters_get_mem_dword_read_count }, - { PMC_EV_BERI_MEM_DWORD_WRITE, - statcounters_get_mem_dword_write_count }, - { PMC_EV_BERI_MEM_CAP_READ, - statcounters_get_mem_cap_read_count }, - { PMC_EV_BERI_MEM_CAP_WRITE, - statcounters_get_mem_cap_write_count }, - { PMC_EV_BERI_MEM_CAP_READ_TAG_SET, - statcounters_get_mem_cap_read_tag_set_count }, - { PMC_EV_BERI_MEM_CAP_WRITE_TAG_SET, - statcounters_get_mem_cap_write_tag_set_count }, - { PMC_EV_BERI_TAGCACHE_WRITE_HIT, - statcounters_get_tagcache_write_hit_count }, - { PMC_EV_BERI_TAGCACHE_WRITE_MISS, - statcounters_get_tagcache_write_miss_count }, - { PMC_EV_BERI_TAGCACHE_READ_HIT, - statcounters_get_tagcache_read_hit_count }, - { PMC_EV_BERI_TAGCACHE_READ_MISS, - statcounters_get_tagcache_read_miss_count }, - { PMC_EV_BERI_TAGCACHE_EVICT, - statcounters_get_tagcache_evict_count }, - { PMC_EV_BERI_L2CACHEMASTER_READ_REQ, - statcounters_get_l2cachemaster_read_req_count }, - { PMC_EV_BERI_L2CACHEMASTER_WRITE_REQ, - statcounters_get_l2cachemaster_write_req_count }, - { PMC_EV_BERI_L2CACHEMASTER_WRITE_REQ_FLIT, - statcounters_get_l2cachemaster_write_req_flit_count }, - { PMC_EV_BERI_L2CACHEMASTER_READ_RSP, - statcounters_get_l2cachemaster_read_rsp_count }, - { PMC_EV_BERI_L2CACHEMASTER_READ_RSP_FLIT, - statcounters_get_l2cachemaster_read_rsp_flit_count }, - { PMC_EV_BERI_L2CACHEMASTER_WRITE_RSP, - statcounters_get_l2cachemaster_write_rsp_count }, - { PMC_EV_BERI_TAGCACHEMASTER_READ_REQ, - statcounters_get_tagcachemaster_read_req_count }, - { PMC_EV_BERI_TAGCACHEMASTER_WRITE_REQ, - statcounters_get_tagcachemaster_write_req_count }, - { PMC_EV_BERI_TAGCACHEMASTER_WRITE_REQ_FLIT, - statcounters_get_tagcachemaster_write_req_flit_count }, - { PMC_EV_BERI_TAGCACHEMASTER_READ_RSP, - statcounters_get_tagcachemaster_read_rsp_count }, - { PMC_EV_BERI_TAGCACHEMASTER_READ_RSP_FLIT, - statcounters_get_tagcachemaster_read_rsp_flit_count }, - { PMC_EV_BERI_TAGCACHEMASTER_WRITE_RSP, - statcounters_get_tagcachemaster_write_rsp_count }, -}; - -struct mips_pmc_spec beri_pmc_spec = { - .ps_cpuclass = PMC_CLASS_BERI, - .ps_cputype = PMC_CPU_MIPS_BERI, - .ps_capabilities = BERI_PMC_CAPS, - .ps_counter_width = 64 -}; - -/* - * Per-processor information. - */ -struct beri_cpu { - struct pmc_hw *pc_beripmcs; - uint64_t start_values[BERI_NCOUNTERS]; - uint64_t stop_values[BERI_NCOUNTERS]; - uint64_t saved_values[BERI_NCOUNTERS]; -}; - -int beri_npmcs; -static struct beri_cpu **beri_pcpu; - -static int -beri_allocate_pmc(int cpu, int ri, struct pmc *pm, - const struct pmc_op_pmcallocate *a) -{ - uint32_t config; - int i; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[beri,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < beri_npmcs, - ("[beri,%d] illegal row index %d", __LINE__, ri)); - - if (a->pm_class != beri_pmc_spec.ps_cpuclass) - return (EINVAL); - - for (i = 0; i < BERI_NCOUNTERS; i++) { - if (beri_event_codes[i].pe_ev == a->pm_ev) { - config = i; - break; - } - } - - if (i == BERI_NCOUNTERS) - return (EINVAL); - - pm->pm_md.pm_mips_evsel = config; - - PMCDBG2(MDP,ALL,2,"beri-allocate ri=%d -> config=0x%x", ri, config); - - return (0); -} - -static int -beri_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v) -{ - uint32_t config; - pmc_value_t new; - pmc_value_t start_val; - pmc_value_t stop_val; - pmc_value_t saved_val; - pmc_value_t result; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[beri,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < beri_npmcs, - ("[beri,%d] illegal row index %d", __LINE__, ri)); - - config = pm->pm_md.pm_mips_evsel; - - start_val = beri_pcpu[cpu]->start_values[config]; - if (PMC_IS_SYSTEM_MODE(PMC_TO_MODE(pm))) { - stop_val = beri_event_codes[config].get_func(); - } else - stop_val = beri_pcpu[cpu]->stop_values[config]; - - if (start_val <= stop_val) - result = stop_val - start_val; - else { - if (config == 0) /* CYCLE counter is 48 bit */ - result = 0x00ffffffffffffffUL; - else - result = 0xffffffffffffffffUL; - result -= start_val; - result += stop_val; - } - - saved_val = beri_pcpu[cpu]->saved_values[config]; - - *v = result + saved_val; - - return (0); -} - -static int -beri_write_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t v) -{ - uint32_t config; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[beri,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < beri_npmcs, - ("[beri,%d] illegal row-index %d", __LINE__, ri)); - - config = pm->pm_md.pm_mips_evsel; - - if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) - v = (1UL << (beri_pmc_spec.ps_counter_width - 1)) - v; - - PMCDBG3(MDP,WRI,1,"beri-write cpu=%d ri=%d v=%jx", cpu, ri, v); - - if (PMC_IS_SYSTEM_MODE(PMC_TO_MODE(pm))) - beri_pcpu[cpu]->saved_values[config] = 0; - else - beri_pcpu[cpu]->saved_values[config] = v; - - return (0); -} - -static int -beri_config_pmc(int cpu, int ri, struct pmc *pm) -{ - struct pmc_hw *phw; - - PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[beri,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < beri_npmcs, - ("[beri,%d] illegal row-index %d", __LINE__, ri)); - - phw = &beri_pcpu[cpu]->pc_beripmcs[ri]; - - KASSERT(pm == NULL || phw->phw_pmc == NULL, - ("[beri,%d] pm=%p phw->pm=%p hwpmc not unconfigured", - __LINE__, pm, phw->phw_pmc)); - - phw->phw_pmc = pm; - - return (0); -} - -static int -beri_start_pmc(int cpu, int ri, struct pmc *pm) -{ - uint32_t config; - pmc_value_t v; - - config = pm->pm_md.pm_mips_evsel; - - v = beri_event_codes[config].get_func(); - beri_pcpu[cpu]->start_values[config] = v; - - return (0); -} - -static int -beri_stop_pmc(int cpu, int ri, struct pmc *pm) -{ - uint32_t config; - pmc_value_t v; - - config = pm->pm_md.pm_mips_evsel; - - v = beri_event_codes[config].get_func(); - beri_pcpu[cpu]->stop_values[config] = v; - - return (0); -} - -static int -beri_release_pmc(int cpu, int ri, struct pmc *pmc) -{ - struct pmc_hw *phw; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[beri,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < beri_npmcs, - ("[beri,%d] illegal row-index %d", __LINE__, ri)); - - phw = &beri_pcpu[cpu]->pc_beripmcs[ri]; - KASSERT(phw->phw_pmc == NULL, - ("[beri,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc)); - - return (0); -} - -static int -beri_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc) -{ - struct pmc_hw *phw; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[beri,%d], illegal CPU %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < beri_npmcs, - ("[beri,%d] row-index %d out of range", __LINE__, ri)); - - phw = &beri_pcpu[cpu]->pc_beripmcs[ri]; - - snprintf(pi->pm_name, sizeof(pi->pm_name), "MIPS-%d", ri); - pi->pm_class = beri_pmc_spec.ps_cpuclass; - if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) { - pi->pm_enabled = TRUE; - *ppmc = phw->phw_pmc; - } else { - pi->pm_enabled = FALSE; - *ppmc = NULL; - } - - return (0); -} - -static int -beri_get_config(int cpu, int ri, struct pmc **ppm) -{ - - *ppm = beri_pcpu[cpu]->pc_beripmcs[ri].phw_pmc; - - return (0); -} - -static int -beri_pmc_switch_in(struct pmc_cpu *pc, struct pmc_process *pp) -{ - - return (0); -} - -static int -beri_pmc_switch_out(struct pmc_cpu *pc, struct pmc_process *pp) -{ - - return (0); -} - -static int -beri_pcpu_init(struct pmc_mdep *md, int cpu) -{ - int first_ri, i; - struct pmc_cpu *pc; - struct beri_cpu *pac; - struct pmc_hw *phw; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[beri,%d] wrong cpu number %d", __LINE__, cpu)); - PMCDBG1(MDP,INI,1,"beri-init cpu=%d", cpu); - - beri_pcpu[cpu] = pac = malloc(sizeof(struct beri_cpu), M_PMC, - M_WAITOK|M_ZERO); - pac->pc_beripmcs = malloc(sizeof(struct pmc_hw) * beri_npmcs, - M_PMC, M_WAITOK|M_ZERO); - pc = pmc_pcpu[cpu]; - first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_MIPS].pcd_ri; - KASSERT(pc != NULL, ("[beri,%d] NULL per-cpu pointer", __LINE__)); - - for (i = 0, phw = pac->pc_beripmcs; i < beri_npmcs; i++, phw++) { - phw->phw_state = PMC_PHW_FLAG_IS_ENABLED | - PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(i); - phw->phw_pmc = NULL; - pc->pc_hwpmcs[i + first_ri] = phw; - } - - return (0); -} - -static int -beri_pcpu_fini(struct pmc_mdep *md, int cpu) -{ - - return (0); -} - -struct pmc_mdep * -pmc_beri_initialize() -{ - struct pmc_mdep *pmc_mdep; - struct pmc_classdep *pcd; - - snprintf(pmc_cpuid, sizeof(pmc_cpuid), "beri"); - - beri_npmcs = 2; - - PMCDBG1(MDP,INI,1,"beri-init npmcs=%d", beri_npmcs); - - /* - * Allocate space for pointers to PMC HW descriptors and for - * the MDEP structure used by MI code. - */ - beri_pcpu = malloc(sizeof(struct beri_cpu *) * pmc_cpu_max(), M_PMC, - M_WAITOK|M_ZERO); - - /* Just one class */ - pmc_mdep = pmc_mdep_alloc(1); - - pmc_mdep->pmd_cputype = beri_pmc_spec.ps_cputype; - - pcd = &pmc_mdep->pmd_classdep[PMC_MDEP_CLASS_INDEX_MIPS]; - pcd->pcd_caps = beri_pmc_spec.ps_capabilities; - pcd->pcd_class = beri_pmc_spec.ps_cpuclass; - pcd->pcd_num = beri_npmcs; - pcd->pcd_ri = pmc_mdep->pmd_npmc; - pcd->pcd_width = beri_pmc_spec.ps_counter_width; - - pcd->pcd_allocate_pmc = beri_allocate_pmc; - pcd->pcd_config_pmc = beri_config_pmc; - pcd->pcd_pcpu_fini = beri_pcpu_fini; - pcd->pcd_pcpu_init = beri_pcpu_init; - pcd->pcd_describe = beri_describe; - pcd->pcd_get_config = beri_get_config; - pcd->pcd_read_pmc = beri_read_pmc; - pcd->pcd_release_pmc = beri_release_pmc; - pcd->pcd_start_pmc = beri_start_pmc; - pcd->pcd_stop_pmc = beri_stop_pmc; - pcd->pcd_write_pmc = beri_write_pmc; - - pmc_mdep->pmd_intr = NULL; - pmc_mdep->pmd_switch_in = beri_pmc_switch_in; - pmc_mdep->pmd_switch_out = beri_pmc_switch_out; - - pmc_mdep->pmd_npmc += beri_npmcs; - - return (pmc_mdep); -} - -void -pmc_beri_finalize(struct pmc_mdep *md) -{ - -} - -struct pmc_mdep * -pmc_md_initialize() -{ - - return (pmc_beri_initialize()); -} - -void -pmc_md_finalize(struct pmc_mdep *md) -{ - - return (pmc_beri_finalize(md)); -} - -int -pmc_save_kernel_callchain(uintptr_t *cc, int nframes, - struct trapframe *tf) -{ - - return (0); -} - -int -pmc_save_user_callchain(uintptr_t *cc, int nframes, - struct trapframe *tf) -{ - - return (0); -} diff --git a/sys/dev/hwpmc/hwpmc_beri.h b/sys/dev/hwpmc/hwpmc_beri.h deleted file mode 100644 index e67ad4aa3f9..00000000000 --- a/sys/dev/hwpmc/hwpmc_beri.h +++ /dev/null @@ -1,105 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2019 Alex Richardson - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory (Department of Computer Science and - * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the - * DARPA SSITH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _DEV_HWPMC_HWPMC_BERI_H_ -#define _DEV_HWPMC_HWPMC_BERI_H_ - -#define STATCOUNTER_ITEM(name, X, Y) \ -static inline uint64_t statcounters_get_##name##_count(void) \ -{ \ - uint64_t ret; \ - __asm __volatile( \ - ".word (0x1f << 26) | (0x0 << 21) | \ - (12 << 16) | ("#X" << 11) | \ - ( "#Y" << 6) | 0x3b\n\t" \ - "move %0,$12" : "=r" (ret) :: "$12"); \ - return (ret); \ -} - -STATCOUNTER_ITEM(cycle,2,0) -STATCOUNTER_ITEM(inst,4,0) -STATCOUNTER_ITEM(inst_user,4,1) -STATCOUNTER_ITEM(inst_kernel,4,2) -STATCOUNTER_ITEM(imprecise_setbounds,4,3) -STATCOUNTER_ITEM(unrepresentable_caps,4,4) -STATCOUNTER_ITEM(itlb_miss,5,0) -STATCOUNTER_ITEM(dtlb_miss,6,0) -STATCOUNTER_ITEM(icache_write_hit,8,0) -STATCOUNTER_ITEM(icache_write_miss,8,1) -STATCOUNTER_ITEM(icache_read_hit,8,2) -STATCOUNTER_ITEM(icache_read_miss,8,3) -STATCOUNTER_ITEM(icache_evict,8,6) -STATCOUNTER_ITEM(dcache_write_hit,9,0) -STATCOUNTER_ITEM(dcache_write_miss,9,1) -STATCOUNTER_ITEM(dcache_read_hit,9,2) -STATCOUNTER_ITEM(dcache_read_miss,9,3) -STATCOUNTER_ITEM(dcache_evict,9,6) -STATCOUNTER_ITEM(dcache_set_tag_write,9,8) -STATCOUNTER_ITEM(dcache_set_tag_read,9,9) -STATCOUNTER_ITEM(l2cache_write_hit,10,0) -STATCOUNTER_ITEM(l2cache_write_miss,10,1) -STATCOUNTER_ITEM(l2cache_read_hit,10,2) -STATCOUNTER_ITEM(l2cache_read_miss,10,3) -STATCOUNTER_ITEM(l2cache_evict,10,6) -STATCOUNTER_ITEM(l2cache_set_tag_write,10,8) -STATCOUNTER_ITEM(l2cache_set_tag_read,10,9) -STATCOUNTER_ITEM(mem_byte_read,11,0) -STATCOUNTER_ITEM(mem_byte_write,11,1) -STATCOUNTER_ITEM(mem_hword_read,11,2) -STATCOUNTER_ITEM(mem_hword_write,11,3) -STATCOUNTER_ITEM(mem_word_read,11,4) -STATCOUNTER_ITEM(mem_word_write,11,5) -STATCOUNTER_ITEM(mem_dword_read,11,6) -STATCOUNTER_ITEM(mem_dword_write,11,7) -STATCOUNTER_ITEM(mem_cap_read,11,8) -STATCOUNTER_ITEM(mem_cap_write,11,9) -STATCOUNTER_ITEM(mem_cap_read_tag_set,11,10) -STATCOUNTER_ITEM(mem_cap_write_tag_set,11,11) -STATCOUNTER_ITEM(tagcache_write_hit,12,0) -STATCOUNTER_ITEM(tagcache_write_miss,12,1) -STATCOUNTER_ITEM(tagcache_read_hit,12,2) -STATCOUNTER_ITEM(tagcache_read_miss,12,3) -STATCOUNTER_ITEM(tagcache_evict,12,6) -STATCOUNTER_ITEM(l2cachemaster_read_req,13,0) -STATCOUNTER_ITEM(l2cachemaster_write_req,13,1) -STATCOUNTER_ITEM(l2cachemaster_write_req_flit,13,2) -STATCOUNTER_ITEM(l2cachemaster_read_rsp,13,3) -STATCOUNTER_ITEM(l2cachemaster_read_rsp_flit,13,4) -STATCOUNTER_ITEM(l2cachemaster_write_rsp,13,5) -STATCOUNTER_ITEM(tagcachemaster_read_req,14,0) -STATCOUNTER_ITEM(tagcachemaster_write_req,14,1) -STATCOUNTER_ITEM(tagcachemaster_write_req_flit,14,2) -STATCOUNTER_ITEM(tagcachemaster_read_rsp,14,3) -STATCOUNTER_ITEM(tagcachemaster_read_rsp_flit,14,4) -STATCOUNTER_ITEM(tagcachemaster_write_rsp,14,5) - -#endif /* !_DEV_HWPMC_HWPMC_BERI_H_ */ diff --git a/sys/dev/hwpmc/hwpmc_e500.c b/sys/dev/hwpmc/hwpmc_e500.c deleted file mode 100644 index 29e6826d7f7..00000000000 --- a/sys/dev/hwpmc/hwpmc_e500.c +++ /dev/null @@ -1,473 +0,0 @@ -/*- - * Copyright (c) 2015 Justin Hibbits - * Copyright (c) 2005, Joseph Koshy - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include "hwpmc_powerpc.h" - -struct e500_event_code_map { - enum pmc_event pe_ev; /* enum value */ - uint8_t pe_counter_mask; /* Which counter this can be counted in. */ - uint8_t pe_code; /* numeric code */ - uint8_t pe_cpu; /* e500 core (v1,v2,mc), mask */ -}; - -#define E500_MAX_PMCS 4 -#define PMC_PPC_MASK0 0 -#define PMC_PPC_MASK1 1 -#define PMC_PPC_MASK2 2 -#define PMC_PPC_MASK3 3 -#define PMC_PPC_MASK_ALL 0x0f -#define PMC_PPC_E500V1 1 -#define PMC_PPC_E500V2 2 -#define PMC_PPC_E500MC 4 -#define PMC_PPC_E500_ANY 7 -#define PMC_E500_EVENT(id, mask, number, core) \ - [PMC_EV_E500_##id - PMC_EV_E500_FIRST] = \ - { .pe_ev = PMC_EV_E500_##id, .pe_counter_mask = mask, \ - .pe_code = number, .pe_cpu = core } -#define PMC_E500MC_ONLY(id, number) \ - PMC_E500_EVENT(id, PMC_PPC_MASK_ALL, number, PMC_PPC_E500MC) -#define PMC_E500_COMMON(id, number) \ - PMC_E500_EVENT(id, PMC_PPC_MASK_ALL, number, PMC_PPC_E500_ANY) - -static struct e500_event_code_map e500_event_codes[] = { - PMC_E500_COMMON(CYCLES, 1), - PMC_E500_COMMON(INSTR_COMPLETED, 2), - PMC_E500_COMMON(UOPS_COMPLETED, 3), - PMC_E500_COMMON(INSTR_FETCHED, 4), - PMC_E500_COMMON(UOPS_DECODED, 5), - PMC_E500_COMMON(PM_EVENT_TRANSITIONS, 6), - PMC_E500_COMMON(PM_EVENT_CYCLES, 7), - PMC_E500_COMMON(BRANCH_INSTRS_COMPLETED, 8), - PMC_E500_COMMON(LOAD_UOPS_COMPLETED, 9), - PMC_E500_COMMON(STORE_UOPS_COMPLETED, 10), - PMC_E500_COMMON(CQ_REDIRECTS, 11), - PMC_E500_COMMON(BRANCHES_FINISHED, 12), - PMC_E500_COMMON(TAKEN_BRANCHES_FINISHED, 13), - PMC_E500_COMMON(FINISHED_UNCOND_BRANCHES_MISS_BTB, 14), - PMC_E500_COMMON(BRANCH_MISPRED, 15), - PMC_E500_COMMON(BTB_BRANCH_MISPRED_FROM_DIRECTION, 16), - PMC_E500_COMMON(BTB_HITS_PSEUDO_HITS, 17), - PMC_E500_COMMON(CYCLES_DECODE_STALLED, 18), - PMC_E500_COMMON(CYCLES_ISSUE_STALLED, 19), - PMC_E500_COMMON(CYCLES_BRANCH_ISSUE_STALLED, 20), - PMC_E500_COMMON(CYCLES_SU1_SCHED_STALLED, 21), - PMC_E500_COMMON(CYCLES_SU2_SCHED_STALLED, 22), - PMC_E500_COMMON(CYCLES_MU_SCHED_STALLED, 23), - PMC_E500_COMMON(CYCLES_LRU_SCHED_STALLED, 24), - PMC_E500_COMMON(CYCLES_BU_SCHED_STALLED, 25), - PMC_E500_COMMON(TOTAL_TRANSLATED, 26), - PMC_E500_COMMON(LOADS_TRANSLATED, 27), - PMC_E500_COMMON(STORES_TRANSLATED, 28), - PMC_E500_COMMON(TOUCHES_TRANSLATED, 29), - PMC_E500_COMMON(CACHEOPS_TRANSLATED, 30), - PMC_E500_COMMON(CACHE_INHIBITED_ACCESS_TRANSLATED, 31), - PMC_E500_COMMON(GUARDED_LOADS_TRANSLATED, 32), - PMC_E500_COMMON(WRITE_THROUGH_STORES_TRANSLATED, 33), - PMC_E500_COMMON(MISALIGNED_LOAD_STORE_ACCESS_TRANSLATED, 34), - PMC_E500_COMMON(TOTAL_ALLOCATED_TO_DLFB, 35), - PMC_E500_COMMON(LOADS_TRANSLATED_ALLOCATED_TO_DLFB, 36), - PMC_E500_COMMON(STORES_COMPLETED_ALLOCATED_TO_DLFB, 37), - PMC_E500_COMMON(TOUCHES_TRANSLATED_ALLOCATED_TO_DLFB, 38), - PMC_E500_COMMON(STORES_COMPLETED, 39), - PMC_E500_COMMON(DATA_L1_CACHE_LOCKS, 40), - PMC_E500_COMMON(DATA_L1_CACHE_RELOADS, 41), - PMC_E500_COMMON(DATA_L1_CACHE_CASTOUTS, 42), - PMC_E500_COMMON(LOAD_MISS_DLFB_FULL, 43), - PMC_E500_COMMON(LOAD_MISS_LDQ_FULL, 44), - PMC_E500_COMMON(LOAD_GUARDED_MISS, 45), - PMC_E500_COMMON(STORE_TRANSLATE_WHEN_QUEUE_FULL, 46), - PMC_E500_COMMON(ADDRESS_COLLISION, 47), - PMC_E500_COMMON(DATA_MMU_MISS, 48), - PMC_E500_COMMON(DATA_MMU_BUSY, 49), - PMC_E500_COMMON(PART2_MISALIGNED_CACHE_ACCESS, 50), - PMC_E500_COMMON(LOAD_MISS_DLFB_FULL_CYCLES, 51), - PMC_E500_COMMON(LOAD_MISS_LDQ_FULL_CYCLES, 52), - PMC_E500_COMMON(LOAD_GUARDED_MISS_CYCLES, 53), - PMC_E500_COMMON(STORE_TRANSLATE_WHEN_QUEUE_FULL_CYCLES, 54), - PMC_E500_COMMON(ADDRESS_COLLISION_CYCLES, 55), - PMC_E500_COMMON(DATA_MMU_MISS_CYCLES, 56), - PMC_E500_COMMON(DATA_MMU_BUSY_CYCLES, 57), - PMC_E500_COMMON(PART2_MISALIGNED_CACHE_ACCESS_CYCLES, 58), - PMC_E500_COMMON(INSTR_L1_CACHE_LOCKS, 59), - PMC_E500_COMMON(INSTR_L1_CACHE_RELOADS, 60), - PMC_E500_COMMON(INSTR_L1_CACHE_FETCHES, 61), - PMC_E500_COMMON(INSTR_MMU_TLB4K_RELOADS, 62), - PMC_E500_COMMON(INSTR_MMU_VSP_RELOADS, 63), - PMC_E500_COMMON(DATA_MMU_TLB4K_RELOADS, 64), - PMC_E500_COMMON(DATA_MMU_VSP_RELOADS, 65), - PMC_E500_COMMON(L2MMU_MISSES, 66), - PMC_E500_COMMON(BIU_MASTER_REQUESTS, 67), - PMC_E500_COMMON(BIU_MASTER_INSTR_SIDE_REQUESTS, 68), - PMC_E500_COMMON(BIU_MASTER_DATA_SIDE_REQUESTS, 69), - PMC_E500_COMMON(BIU_MASTER_DATA_SIDE_CASTOUT_REQUESTS, 70), - PMC_E500_COMMON(BIU_MASTER_RETRIES, 71), - PMC_E500_COMMON(SNOOP_REQUESTS, 72), - PMC_E500_COMMON(SNOOP_HITS, 73), - PMC_E500_COMMON(SNOOP_PUSHES, 74), - PMC_E500_COMMON(SNOOP_RETRIES, 75), - PMC_E500_EVENT(DLFB_LOAD_MISS_CYCLES, PMC_PPC_MASK0|PMC_PPC_MASK1, - 76, PMC_PPC_E500_ANY), - PMC_E500_EVENT(ILFB_FETCH_MISS_CYCLES, PMC_PPC_MASK0|PMC_PPC_MASK1, - 77, PMC_PPC_E500_ANY), - PMC_E500_EVENT(EXT_INPU_INTR_LATENCY_CYCLES, PMC_PPC_MASK0|PMC_PPC_MASK1, - 78, PMC_PPC_E500_ANY), - PMC_E500_EVENT(CRIT_INPUT_INTR_LATENCY_CYCLES, PMC_PPC_MASK0|PMC_PPC_MASK1, - 79, PMC_PPC_E500_ANY), - PMC_E500_EVENT(EXT_INPUT_INTR_PENDING_LATENCY_CYCLES, - PMC_PPC_MASK0|PMC_PPC_MASK1, 80, PMC_PPC_E500_ANY), - PMC_E500_EVENT(CRIT_INPUT_INTR_PENDING_LATENCY_CYCLES, - PMC_PPC_MASK0|PMC_PPC_MASK1, 81, PMC_PPC_E500_ANY), - PMC_E500_COMMON(PMC0_OVERFLOW, 82), - PMC_E500_COMMON(PMC1_OVERFLOW, 83), - PMC_E500_COMMON(PMC2_OVERFLOW, 84), - PMC_E500_COMMON(PMC3_OVERFLOW, 85), - PMC_E500_COMMON(INTERRUPTS_TAKEN, 86), - PMC_E500_COMMON(EXT_INPUT_INTR_TAKEN, 87), - PMC_E500_COMMON(CRIT_INPUT_INTR_TAKEN, 88), - PMC_E500_COMMON(SYSCALL_TRAP_INTR, 89), - PMC_E500_EVENT(TLB_BIT_TRANSITIONS, PMC_PPC_MASK_ALL, 90, - PMC_PPC_E500V2 | PMC_PPC_E500MC), - PMC_E500MC_ONLY(L2_LINEFILL_BUFFER, 91), - PMC_E500MC_ONLY(LV2_VS, 92), - PMC_E500MC_ONLY(CASTOUTS_RELEASED, 93), - PMC_E500MC_ONLY(INTV_ALLOCATIONS, 94), - PMC_E500MC_ONLY(DLFB_RETRIES_TO_MBAR, 95), - PMC_E500MC_ONLY(STORE_RETRIES, 96), - PMC_E500MC_ONLY(STASH_L1_HITS, 97), - PMC_E500MC_ONLY(STASH_L2_HITS, 98), - PMC_E500MC_ONLY(STASH_BUSY_1, 99), - PMC_E500MC_ONLY(STASH_BUSY_2, 100), - PMC_E500MC_ONLY(STASH_BUSY_3, 101), - PMC_E500MC_ONLY(STASH_HITS, 102), - PMC_E500MC_ONLY(STASH_HIT_DLFB, 103), - PMC_E500MC_ONLY(STASH_REQUESTS, 106), - PMC_E500MC_ONLY(STASH_REQUESTS_L1, 107), - PMC_E500MC_ONLY(STASH_REQUESTS_L2, 108), - PMC_E500MC_ONLY(STALLS_NO_CAQ_OR_COB, 109), - PMC_E500MC_ONLY(L2_CACHE_ACCESSES, 110), - PMC_E500MC_ONLY(L2_HIT_CACHE_ACCESSES, 111), - PMC_E500MC_ONLY(L2_CACHE_DATA_ACCESSES, 112), - PMC_E500MC_ONLY(L2_CACHE_DATA_HITS, 113), - PMC_E500MC_ONLY(L2_CACHE_INSTR_ACCESSES, 114), - PMC_E500MC_ONLY(L2_CACHE_INSTR_HITS, 115), - PMC_E500MC_ONLY(L2_CACHE_ALLOCATIONS, 116), - PMC_E500MC_ONLY(L2_CACHE_DATA_ALLOCATIONS, 117), - PMC_E500MC_ONLY(L2_CACHE_DIRTY_DATA_ALLOCATIONS, 118), - PMC_E500MC_ONLY(L2_CACHE_INSTR_ALLOCATIONS, 119), - PMC_E500MC_ONLY(L2_CACHE_UPDATES, 120), - PMC_E500MC_ONLY(L2_CACHE_CLEAN_UPDATES, 121), - PMC_E500MC_ONLY(L2_CACHE_DIRTY_UPDATES, 122), - PMC_E500MC_ONLY(L2_CACHE_CLEAN_REDUNDANT_UPDATES, 123), - PMC_E500MC_ONLY(L2_CACHE_DIRTY_REDUNDANT_UPDATES, 124), - PMC_E500MC_ONLY(L2_CACHE_LOCKS, 125), - PMC_E500MC_ONLY(L2_CACHE_CASTOUTS, 126), - PMC_E500MC_ONLY(L2_CACHE_DATA_DIRTY_HITS, 127), - PMC_E500MC_ONLY(INSTR_LFB_WENT_HIGH_PRIORITY, 128), - PMC_E500MC_ONLY(SNOOP_THROTTLING_TURNED_ON, 129), - PMC_E500MC_ONLY(L2_CLEAN_LINE_INVALIDATIONS, 130), - PMC_E500MC_ONLY(L2_INCOHERENT_LINE_INVALIDATIONS, 131), - PMC_E500MC_ONLY(L2_COHERENT_LINE_INVALIDATIONS, 132), - PMC_E500MC_ONLY(COHERENT_LOOKUP_MISS_DUE_TO_VALID_BUT_INCOHERENT_MATCHES, 133), - PMC_E500MC_ONLY(IAC1S_DETECTED, 140), - PMC_E500MC_ONLY(IAC2S_DETECTED, 141), - PMC_E500MC_ONLY(DAC1S_DTECTED, 144), - PMC_E500MC_ONLY(DAC2S_DTECTED, 145), - PMC_E500MC_ONLY(DVT0_DETECTED, 148), - PMC_E500MC_ONLY(DVT1_DETECTED, 149), - PMC_E500MC_ONLY(DVT2_DETECTED, 150), - PMC_E500MC_ONLY(DVT3_DETECTED, 151), - PMC_E500MC_ONLY(DVT4_DETECTED, 152), - PMC_E500MC_ONLY(DVT5_DETECTED, 153), - PMC_E500MC_ONLY(DVT6_DETECTED, 154), - PMC_E500MC_ONLY(DVT7_DETECTED, 155), - PMC_E500MC_ONLY(CYCLES_COMPLETION_STALLED_NEXUS_FIFO_FULL, 156), - PMC_E500MC_ONLY(FPU_DOUBLE_PUMP, 160), - PMC_E500MC_ONLY(FPU_FINISH, 161), - PMC_E500MC_ONLY(FPU_DIVIDE_CYCLES, 162), - PMC_E500MC_ONLY(FPU_DENORM_INPUT_CYCLES, 163), - PMC_E500MC_ONLY(FPU_RESULT_STALL_CYCLES, 164), - PMC_E500MC_ONLY(FPU_FPSCR_FULL_STALL, 165), - PMC_E500MC_ONLY(FPU_PIPE_SYNC_STALLS, 166), - PMC_E500MC_ONLY(FPU_INPUT_DATA_STALLS, 167), - PMC_E500MC_ONLY(DECORATED_LOADS, 176), - PMC_E500MC_ONLY(DECORATED_STORES, 177), - PMC_E500MC_ONLY(LOAD_RETRIES, 178), - PMC_E500MC_ONLY(STWCX_SUCCESSES, 179), - PMC_E500MC_ONLY(STWCX_FAILURES, 180), -}; - -static pmc_value_t -e500_pmcn_read(unsigned int pmc) -{ - switch (pmc) { - case 0: - return (mfpmr(PMR_PMC0)); - case 1: - return (mfpmr(PMR_PMC1)); - case 2: - return (mfpmr(PMR_PMC2)); - case 3: - return (mfpmr(PMR_PMC3)); - default: - panic("Invalid PMC number: %d\n", pmc); - } -} - -static void -e500_pmcn_write(unsigned int pmc, uint32_t val) -{ - switch (pmc) { - case 0: - mtpmr(PMR_PMC0, val); - break; - case 1: - mtpmr(PMR_PMC1, val); - break; - case 2: - mtpmr(PMR_PMC2, val); - break; - case 3: - mtpmr(PMR_PMC3, val); - break; - default: - panic("Invalid PMC number: %d\n", pmc); - } -} - -static void -e500_set_pmc(int cpu, int ri, int config) -{ - struct pmc *pm; - struct pmc_hw *phw; - register_t pmc_pmlc; - - phw = &powerpc_pcpu[cpu]->pc_ppcpmcs[ri]; - pm = phw->phw_pmc; - config &= ~POWERPC_PMC_ENABLE; - - if (config != PMCN_NONE) { - if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) - config |= PMLCax_CE; - - /* Enable the PMC. */ - switch (ri) { - case 0: - mtpmr(PMR_PMLCa0, config); - break; - case 1: - mtpmr(PMR_PMLCa1, config); - break; - case 2: - mtpmr(PMR_PMLCa2, config); - break; - case 3: - mtpmr(PMR_PMLCa3, config); - break; - } - } else { - /* Disable the PMC. */ - switch (ri) { - case 0: - pmc_pmlc = mfpmr(PMR_PMLCa0); - pmc_pmlc |= PMLCax_FC; - mtpmr(PMR_PMLCa0, pmc_pmlc); - break; - case 1: - pmc_pmlc = mfpmr(PMR_PMLCa1); - pmc_pmlc |= PMLCax_FC; - mtpmr(PMR_PMLCa1, pmc_pmlc); - break; - case 2: - pmc_pmlc = mfpmr(PMR_PMLCa2); - pmc_pmlc |= PMLCax_FC; - mtpmr(PMR_PMLCa2, pmc_pmlc); - break; - case 3: - pmc_pmlc = mfpmr(PMR_PMLCa3); - pmc_pmlc |= PMLCax_FC; - mtpmr(PMR_PMLCa3, pmc_pmlc); - break; - } - } -} - -static int -e500_pcpu_init(struct pmc_mdep *md, int cpu) -{ - int i; - - powerpc_pcpu_init(md, cpu); - - /* Freeze all counters. */ - mtpmr(PMR_PMGC0, PMGC_FAC | PMGC_PMIE | PMGC_FCECE); - - for (i = 0; i < E500_MAX_PMCS; i++) - /* Initialize the PMC to stopped */ - e500_set_pmc(cpu, i, PMCN_NONE); - - /* Unfreeze global register. */ - mtpmr(PMR_PMGC0, PMGC_PMIE | PMGC_FCECE); - - return (0); -} - -static int -e500_pcpu_fini(struct pmc_mdep *md, int cpu) -{ - uint32_t pmgc0 = mfpmr(PMR_PMGC0); - - pmgc0 |= PMGC_FAC; - mtpmr(PMR_PMGC0, pmgc0); - mtmsr(mfmsr() & ~PSL_PMM); - - return (powerpc_pcpu_fini(md, cpu)); -} - -static int -e500_allocate_pmc(int cpu, int ri, struct pmc *pm, - const struct pmc_op_pmcallocate *a) -{ - enum pmc_event pe; - uint32_t caps, config, counter; - struct e500_event_code_map *ev; - uint16_t vers; - uint8_t pe_cpu_mask; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < E500_MAX_PMCS, - ("[powerpc,%d] illegal row index %d", __LINE__, ri)); - - if (a->pm_class != PMC_CLASS_E500) - return (EINVAL); - - caps = a->pm_caps; - - pe = a->pm_ev; - config = PMLCax_FCS | PMLCax_FCU | - PMLCax_FCM1 | PMLCax_FCM1; - - if (pe < PMC_EV_E500_FIRST || pe > PMC_EV_E500_LAST) - return (EINVAL); - - ev = &e500_event_codes[pe-PMC_EV_E500_FIRST]; - if (ev->pe_code == 0) - return (EINVAL); - - vers = mfpvr() >> 16; - switch (vers) { - case FSL_E500v1: - pe_cpu_mask = ev->pe_cpu & PMC_PPC_E500V1; - break; - case FSL_E500v2: - pe_cpu_mask = ev->pe_cpu & PMC_PPC_E500V2; - break; - case FSL_E500mc: - case FSL_E5500: - pe_cpu_mask = ev->pe_cpu & PMC_PPC_E500MC; - break; - } - if (pe_cpu_mask == 0) - return (EINVAL); - - config |= PMLCax_EVENT(ev->pe_code); - counter = ev->pe_counter_mask; - if ((counter & (1 << ri)) == 0) - return (EINVAL); - - if (caps & PMC_CAP_SYSTEM) - config &= ~PMLCax_FCS; - if (caps & PMC_CAP_USER) - config &= ~PMLCax_FCU; - if ((caps & (PMC_CAP_USER | PMC_CAP_SYSTEM)) == 0) - config &= ~(PMLCax_FCS|PMLCax_FCU); - - pm->pm_md.pm_powerpc.pm_powerpc_evsel = config; - - PMCDBG2(MDP,ALL,2,"powerpc-allocate ri=%d -> config=0x%x", ri, config); - - return 0; -} - -static void -e500_resume_pmc(bool ie) -{ - /* Re-enable PERF exceptions. */ - if (ie) - mtpmr(PMR_PMGC0, (mfpmr(PMR_PMGC0) & ~PMGC_FAC) | PMGC_PMIE); -} - -int -pmc_e500_initialize(struct pmc_mdep *pmc_mdep) -{ - struct pmc_classdep *pcd; - - pmc_mdep->pmd_cputype = PMC_CPU_PPC_E500; - - pcd = &pmc_mdep->pmd_classdep[PMC_MDEP_CLASS_INDEX_POWERPC]; - pcd->pcd_caps = POWERPC_PMC_CAPS; - pcd->pcd_class = PMC_CLASS_E500; - pcd->pcd_num = E500_MAX_PMCS; - pcd->pcd_ri = pmc_mdep->pmd_npmc; - pcd->pcd_width = 32; - - pcd->pcd_allocate_pmc = e500_allocate_pmc; - pcd->pcd_config_pmc = powerpc_config_pmc; - pcd->pcd_pcpu_fini = e500_pcpu_fini; - pcd->pcd_pcpu_init = e500_pcpu_init; - pcd->pcd_describe = powerpc_describe; - pcd->pcd_get_config = powerpc_get_config; - pcd->pcd_read_pmc = powerpc_read_pmc; - pcd->pcd_release_pmc = powerpc_release_pmc; - pcd->pcd_start_pmc = powerpc_start_pmc; - pcd->pcd_stop_pmc = powerpc_stop_pmc; - pcd->pcd_write_pmc = powerpc_write_pmc; - - pmc_mdep->pmd_npmc += E500_MAX_PMCS; - pmc_mdep->pmd_intr = powerpc_pmc_intr; - - ppc_max_pmcs = E500_MAX_PMCS; - - powerpc_set_pmc = e500_set_pmc; - powerpc_pmcn_read = e500_pmcn_read; - powerpc_pmcn_write = e500_pmcn_write; - powerpc_resume_pmc = e500_resume_pmc; - - return (0); -} diff --git a/sys/dev/hwpmc/hwpmc_mips.c b/sys/dev/hwpmc/hwpmc_mips.c deleted file mode 100644 index 1bc8574c53f..00000000000 --- a/sys/dev/hwpmc/hwpmc_mips.c +++ /dev/null @@ -1,789 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010, George V. Neville-Neil - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include "opt_hwpmc_hooks.h" - -#include -#include -#include -#include - -#include -#include -#include -#include - -int mips_npmcs; - -/* - * Per-processor information. - */ -struct mips_cpu { - struct pmc_hw *pc_mipspmcs; -}; - -static struct mips_cpu **mips_pcpu; - -#if defined(__mips_n64) -# define MIPS_IS_VALID_KERNELADDR(reg) ((((reg) & 3) == 0) && \ - ((vm_offset_t)(reg) >= MIPS_XKPHYS_START)) -#else -# define MIPS_IS_VALID_KERNELADDR(reg) ((((reg) & 3) == 0) && \ - ((vm_offset_t)(reg) >= MIPS_KSEG0_START)) -#endif - -/* - * We need some reasonable default to prevent backtrace code - * from wandering too far - */ -#define MAX_FUNCTION_SIZE 0x10000 -#define MAX_PROLOGUE_SIZE 0x100 - -static int -mips_allocate_pmc(int cpu, int ri, struct pmc *pm, - const struct pmc_op_pmcallocate *a) -{ - enum pmc_event pe; - uint32_t caps, config, counter; - uint32_t event; - int i; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[mips,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < mips_npmcs, - ("[mips,%d] illegal row index %d", __LINE__, ri)); - - caps = a->pm_caps; - if (a->pm_class != mips_pmc_spec.ps_cpuclass) - return (EINVAL); - pe = a->pm_ev; - counter = MIPS_CTR_ALL; - event = 0; - for (i = 0; i < mips_event_codes_size; i++) { - if (mips_event_codes[i].pe_ev == pe) { - event = mips_event_codes[i].pe_code; - counter = mips_event_codes[i].pe_counter; - break; - } - } - - if (i == mips_event_codes_size) - return (EINVAL); - - if ((counter != MIPS_CTR_ALL) && (counter != ri)) - return (EINVAL); - - config = mips_get_perfctl(cpu, ri, event, caps); - - pm->pm_md.pm_mips_evsel = config; - - PMCDBG2(MDP,ALL,2,"mips-allocate ri=%d -> config=0x%x", ri, config); - - return 0; -} - - -static int -mips_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v) -{ - pmc_value_t tmp; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[mips,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < mips_npmcs, - ("[mips,%d] illegal row index %d", __LINE__, ri)); - - tmp = mips_pmcn_read(ri); - PMCDBG2(MDP,REA,2,"mips-read id=%d -> %jd", ri, tmp); - - if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) - *v = tmp - (1UL << (mips_pmc_spec.ps_counter_width - 1)); - else - *v = tmp; - - return 0; -} - -static int -mips_write_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t v) -{ - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[mips,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < mips_npmcs, - ("[mips,%d] illegal row-index %d", __LINE__, ri)); - - if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) - v = (1UL << (mips_pmc_spec.ps_counter_width - 1)) - v; - - PMCDBG3(MDP,WRI,1,"mips-write cpu=%d ri=%d v=%jx", cpu, ri, v); - - mips_pmcn_write(ri, v); - - return 0; -} - -static int -mips_config_pmc(int cpu, int ri, struct pmc *pm) -{ - struct pmc_hw *phw; - - PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[mips,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < mips_npmcs, - ("[mips,%d] illegal row-index %d", __LINE__, ri)); - - phw = &mips_pcpu[cpu]->pc_mipspmcs[ri]; - - KASSERT(pm == NULL || phw->phw_pmc == NULL, - ("[mips,%d] pm=%p phw->pm=%p hwpmc not unconfigured", - __LINE__, pm, phw->phw_pmc)); - - phw->phw_pmc = pm; - - return 0; -} - -static int -mips_start_pmc(int cpu, int ri, struct pmc *pm) -{ - uint32_t config; - - config = pm->pm_md.pm_mips_evsel; - - /* Enable the PMC. */ - switch (ri) { - case 0: - mips_wr_perfcnt0(config); - break; - case 1: - mips_wr_perfcnt2(config); - break; - default: - break; - } - - return 0; -} - -static int -mips_stop_pmc(int cpu, int ri, struct pmc *pm __unused) -{ - - /* - * Disable the PMCs. - * - * Clearing the entire register turns the counter off as well - * as removes the previously sampled event. - */ - switch (ri) { - case 0: - mips_wr_perfcnt0(0); - break; - case 1: - mips_wr_perfcnt2(0); - break; - default: - break; - } - return 0; -} - -static int -mips_release_pmc(int cpu, int ri, struct pmc *pmc) -{ - struct pmc_hw *phw; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[mips,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < mips_npmcs, - ("[mips,%d] illegal row-index %d", __LINE__, ri)); - - phw = &mips_pcpu[cpu]->pc_mipspmcs[ri]; - KASSERT(phw->phw_pmc == NULL, - ("[mips,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc)); - - return 0; -} - -static int -mips_pmc_intr(struct trapframe *tf) -{ - int error; - int retval, ri, cpu; - struct pmc *pm; - struct mips_cpu *pc; - uint32_t r0, r2; - pmc_value_t r; - - cpu = curcpu; - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[mips,%d] CPU %d out of range", __LINE__, cpu)); - - retval = 0; - pc = mips_pcpu[cpu]; - - /* Stop PMCs without clearing the counter */ - r0 = mips_rd_perfcnt0(); - mips_wr_perfcnt0(r0 & ~(0x1f)); - r2 = mips_rd_perfcnt2(); - mips_wr_perfcnt2(r2 & ~(0x1f)); - - for (ri = 0; ri < mips_npmcs; ri++) { - pm = mips_pcpu[cpu]->pc_mipspmcs[ri].phw_pmc; - if (pm == NULL) - continue; - if (! PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) - continue; - - r = mips_pmcn_read(ri); - - /* If bit 31 is set, the counter has overflowed */ - if ((r & (1UL << (mips_pmc_spec.ps_counter_width - 1))) == 0) - continue; - - retval = 1; - if (pm->pm_state != PMC_STATE_RUNNING) - continue; - error = pmc_process_interrupt(PMC_HR, pm, tf); - if (error) { - /* Clear/disable the relevant counter */ - if (ri == 0) - r0 = 0; - else if (ri == 1) - r2 = 0; - mips_stop_pmc(cpu, ri, pm); - } - - /* Reload sampling count */ - mips_write_pmc(cpu, ri, pm, pm->pm_sc.pm_reloadcount); - } - - /* - * Re-enable the PMC counters where they left off. - * - * Any counter which overflowed will have its sample count - * reloaded in the loop above. - */ - mips_wr_perfcnt0(r0); - mips_wr_perfcnt2(r2); - - return retval; -} - -static int -mips_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc) -{ - struct pmc_hw *phw; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[mips,%d], illegal CPU %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < mips_npmcs, - ("[mips,%d] row-index %d out of range", __LINE__, ri)); - - phw = &mips_pcpu[cpu]->pc_mipspmcs[ri]; - - snprintf(pi->pm_name, sizeof(pi->pm_name), "MIPS-%d", ri); - pi->pm_class = mips_pmc_spec.ps_cpuclass; - if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) { - pi->pm_enabled = TRUE; - *ppmc = phw->phw_pmc; - } else { - pi->pm_enabled = FALSE; - *ppmc = NULL; - } - - return (0); -} - -static int -mips_get_config(int cpu, int ri, struct pmc **ppm) -{ - *ppm = mips_pcpu[cpu]->pc_mipspmcs[ri].phw_pmc; - - return 0; -} - -/* - * XXX don't know what we should do here. - */ -static int -mips_pmc_switch_in(struct pmc_cpu *pc, struct pmc_process *pp) -{ - return 0; -} - -static int -mips_pmc_switch_out(struct pmc_cpu *pc, struct pmc_process *pp) -{ - return 0; -} - -static int -mips_pcpu_init(struct pmc_mdep *md, int cpu) -{ - int first_ri, i; - struct pmc_cpu *pc; - struct mips_cpu *pac; - struct pmc_hw *phw; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[mips,%d] wrong cpu number %d", __LINE__, cpu)); - PMCDBG1(MDP,INI,1,"mips-init cpu=%d", cpu); - - mips_pcpu[cpu] = pac = malloc(sizeof(struct mips_cpu), M_PMC, - M_WAITOK|M_ZERO); - pac->pc_mipspmcs = malloc(sizeof(struct pmc_hw) * mips_npmcs, - M_PMC, M_WAITOK|M_ZERO); - pc = pmc_pcpu[cpu]; - first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_MIPS].pcd_ri; - KASSERT(pc != NULL, ("[mips,%d] NULL per-cpu pointer", __LINE__)); - - for (i = 0, phw = pac->pc_mipspmcs; i < mips_npmcs; i++, phw++) { - phw->phw_state = PMC_PHW_FLAG_IS_ENABLED | - PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(i); - phw->phw_pmc = NULL; - pc->pc_hwpmcs[i + first_ri] = phw; - } - - /* - * Clear the counter control register which has the effect - * of disabling counting. - */ - for (i = 0; i < mips_npmcs; i++) - mips_pmcn_write(i, 0); - - return 0; -} - -static int -mips_pcpu_fini(struct pmc_mdep *md, int cpu) -{ - return 0; -} - -struct pmc_mdep * -pmc_mips_initialize() -{ - struct pmc_mdep *pmc_mdep; - struct pmc_classdep *pcd; - - /* - * TODO: Use More bit of PerfCntlX register to detect actual - * number of counters - */ - mips_npmcs = 2; - - PMCDBG1(MDP,INI,1,"mips-init npmcs=%d", mips_npmcs); - - /* - * Allocate space for pointers to PMC HW descriptors and for - * the MDEP structure used by MI code. - */ - mips_pcpu = malloc(sizeof(struct mips_cpu *) * pmc_cpu_max(), M_PMC, - M_WAITOK|M_ZERO); - - /* Just one class */ - pmc_mdep = pmc_mdep_alloc(1); - - pmc_mdep->pmd_cputype = mips_pmc_spec.ps_cputype; - - pcd = &pmc_mdep->pmd_classdep[PMC_MDEP_CLASS_INDEX_MIPS]; - pcd->pcd_caps = mips_pmc_spec.ps_capabilities; - pcd->pcd_class = mips_pmc_spec.ps_cpuclass; - pcd->pcd_num = mips_npmcs; - pcd->pcd_ri = pmc_mdep->pmd_npmc; - pcd->pcd_width = mips_pmc_spec.ps_counter_width; - - pcd->pcd_allocate_pmc = mips_allocate_pmc; - pcd->pcd_config_pmc = mips_config_pmc; - pcd->pcd_pcpu_fini = mips_pcpu_fini; - pcd->pcd_pcpu_init = mips_pcpu_init; - pcd->pcd_describe = mips_describe; - pcd->pcd_get_config = mips_get_config; - pcd->pcd_read_pmc = mips_read_pmc; - pcd->pcd_release_pmc = mips_release_pmc; - pcd->pcd_start_pmc = mips_start_pmc; - pcd->pcd_stop_pmc = mips_stop_pmc; - pcd->pcd_write_pmc = mips_write_pmc; - - pmc_mdep->pmd_intr = mips_pmc_intr; - pmc_mdep->pmd_switch_in = mips_pmc_switch_in; - pmc_mdep->pmd_switch_out = mips_pmc_switch_out; - - pmc_mdep->pmd_npmc += mips_npmcs; - - return (pmc_mdep); -} - -void -pmc_mips_finalize(struct pmc_mdep *md) -{ - (void) md; -} - -#ifdef HWPMC_MIPS_BACKTRACE - -static int -pmc_next_frame(register_t *pc, register_t *sp) -{ - InstFmt i; - uintptr_t va; - uint32_t instr, mask; - int more, stksize; - register_t ra = 0; - - /* Jump here after a nonstandard (interrupt handler) frame */ - stksize = 0; - - /* check for bad SP: could foul up next frame */ - if (!MIPS_IS_VALID_KERNELADDR(*sp)) { - goto error; - } - - /* check for bad PC */ - if (!MIPS_IS_VALID_KERNELADDR(*pc)) { - goto error; - } - - /* - * Find the beginning of the current subroutine by scanning - * backwards from the current PC for the end of the previous - * subroutine. - */ - va = *pc - sizeof(int); - while (1) { - instr = *((uint32_t *)va); - - /* [d]addiu sp,sp,-X */ - if (((instr & 0xffff8000) == 0x27bd8000) - || ((instr & 0xffff8000) == 0x67bd8000)) - break; - - /* jr ra */ - if (instr == 0x03e00008) { - /* skip over branch-delay slot instruction */ - va += 2 * sizeof(int); - break; - } - - va -= sizeof(int); - } - - /* skip over nulls which might separate .o files */ - while ((instr = *((uint32_t *)va)) == 0) - va += sizeof(int); - - /* scan forwards to find stack size and any saved registers */ - stksize = 0; - more = 3; - mask = 0; - for (; more; va += sizeof(int), - more = (more == 3) ? 3 : more - 1) { - /* stop if hit our current position */ - if (va >= *pc) - break; - instr = *((uint32_t *)va); - i.word = instr; - switch (i.JType.op) { - case OP_SPECIAL: - switch (i.RType.func) { - case OP_JR: - case OP_JALR: - more = 2; /* stop after next instruction */ - break; - - case OP_SYSCALL: - case OP_BREAK: - more = 1; /* stop now */ - } - break; - - case OP_BCOND: - case OP_J: - case OP_JAL: - case OP_BEQ: - case OP_BNE: - case OP_BLEZ: - case OP_BGTZ: - more = 2; /* stop after next instruction */ - break; - - case OP_COP0: - case OP_COP1: - case OP_COP2: - case OP_COP3: - switch (i.RType.rs) { - case OP_BCx: - case OP_BCy: - more = 2; /* stop after next instruction */ - } - break; - - case OP_SW: - case OP_SD: - /* - * SP is being saved using S8(FP). Most likely it indicates - * that SP is modified in the function and we can't get - * its value safely without emulating code backward - * So just bail out on functions like this - */ - if ((i.IType.rs == 30) && (i.IType.rt = 29)) - return (-1); - - /* look for saved registers on the stack */ - if (i.IType.rs != 29) - break; - /* only restore the first one */ - if (mask & (1 << i.IType.rt)) - break; - mask |= (1 << i.IType.rt); - if (i.IType.rt == 31) - ra = *((register_t *)(*sp + (short)i.IType.imm)); - break; - - case OP_ADDI: - case OP_ADDIU: - case OP_DADDI: - case OP_DADDIU: - /* look for stack pointer adjustment */ - if (i.IType.rs != 29 || i.IType.rt != 29) - break; - stksize = -((short)i.IType.imm); - } - } - - if (!MIPS_IS_VALID_KERNELADDR(ra)) - return (-1); - - *pc = ra; - *sp += stksize; - - return (0); - -error: - return (-1); -} - -static int -pmc_next_uframe(register_t *pc, register_t *sp, register_t *ra) -{ - int offset, registers_on_stack; - uint32_t opcode, mask; - register_t function_start; - int stksize; - InstFmt i; - - registers_on_stack = 0; - mask = 0; - function_start = 0; - offset = 0; - stksize = 0; - - while (offset < MAX_FUNCTION_SIZE) { - opcode = fuword32((void *)(*pc - offset)); - - /* [d]addiu sp, sp, -X*/ - if (((opcode & 0xffff8000) == 0x27bd8000) - || ((opcode & 0xffff8000) == 0x67bd8000)) { - function_start = *pc - offset; - registers_on_stack = 1; - break; - } - - /* lui gp, X */ - if ((opcode & 0xffff8000) == 0x3c1c0000) { - /* - * Function might start with this instruction - * Keep an eye on "jr ra" and sp correction - * with positive value further on - */ - function_start = *pc - offset; - } - - if (function_start) { - /* - * Stop looking further. Possible end of - * function instruction: it means there is no - * stack modifications, sp is unchanged - */ - - /* [d]addiu sp,sp,X */ - if (((opcode & 0xffff8000) == 0x27bd0000) - || ((opcode & 0xffff8000) == 0x67bd0000)) - break; - - if (opcode == 0x03e00008) - break; - } - - offset += sizeof(int); - } - - if (!function_start) - return (-1); - - if (registers_on_stack) { - offset = 0; - while ((offset < MAX_PROLOGUE_SIZE) - && ((function_start + offset) < *pc)) { - i.word = fuword32((void *)(function_start + offset)); - switch (i.JType.op) { - case OP_SW: - /* look for saved registers on the stack */ - if (i.IType.rs != 29) - break; - /* only restore the first one */ - if (mask & (1 << i.IType.rt)) - break; - mask |= (1 << i.IType.rt); - if (i.IType.rt == 31) - *ra = fuword32((void *)(*sp + (short)i.IType.imm)); - break; - -#if defined(__mips_n64) - case OP_SD: - /* look for saved registers on the stack */ - if (i.IType.rs != 29) - break; - /* only restore the first one */ - if (mask & (1 << i.IType.rt)) - break; - mask |= (1 << i.IType.rt); - /* ra */ - if (i.IType.rt == 31) - *ra = fuword64((void *)(*sp + (short)i.IType.imm)); - break; -#endif - - case OP_ADDI: - case OP_ADDIU: - case OP_DADDI: - case OP_DADDIU: - /* look for stack pointer adjustment */ - if (i.IType.rs != 29 || i.IType.rt != 29) - break; - stksize = -((short)i.IType.imm); - } - - offset += sizeof(int); - } - } - - /* - * We reached the end of backtrace - */ - if (*pc == *ra) - return (-1); - - *pc = *ra; - *sp += stksize; - - return (0); -} - -#endif /* HWPMC_MIPS_BACKTRACE */ - -struct pmc_mdep * -pmc_md_initialize() -{ - return pmc_mips_initialize(); -} - -void -pmc_md_finalize(struct pmc_mdep *md) -{ - return pmc_mips_finalize(md); -} - -int -pmc_save_kernel_callchain(uintptr_t *cc, int nframes, - struct trapframe *tf) -{ - register_t pc, ra, sp; - int frames = 0; - - pc = tf->pc; - sp = tf->sp; - ra = tf->ra; - - cc[frames++] = pc; - -#ifdef HWPMC_MIPS_BACKTRACE - /* - * Unwind, and unwind, and unwind - */ - while (1) { - if (frames >= nframes) - break; - - if (pmc_next_frame(&pc, &sp) < 0) - break; - - cc[frames++] = pc; - } -#endif - - return (frames); -} - -int -pmc_save_user_callchain(uintptr_t *cc, int nframes, - struct trapframe *tf) -{ - register_t pc, ra, sp; - int frames = 0; - - pc = tf->pc; - sp = tf->sp; - ra = tf->ra; - - cc[frames++] = pc; - -#ifdef HWPMC_MIPS_BACKTRACE - - /* - * Unwind, and unwind, and unwind - */ - while (1) { - if (frames >= nframes) - break; - - if (pmc_next_uframe(&pc, &sp, &ra) < 0) - break; - - cc[frames++] = pc; - } -#endif - - return (frames); -} diff --git a/sys/dev/hwpmc/hwpmc_mips24k.c b/sys/dev/hwpmc/hwpmc_mips24k.c deleted file mode 100644 index 9dbdac4cf8b..00000000000 --- a/sys/dev/hwpmc/hwpmc_mips24k.c +++ /dev/null @@ -1,228 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 George V. Neville-Neil - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#define MIPS24K_PMC_CAPS (PMC_CAP_INTERRUPT | PMC_CAP_USER | \ - PMC_CAP_SYSTEM | PMC_CAP_EDGE | \ - PMC_CAP_THRESHOLD | PMC_CAP_READ | \ - PMC_CAP_WRITE | PMC_CAP_INVERT | \ - PMC_CAP_QUALIFIER) - -#define MIPS24K_PMC_INTERRUPT_ENABLE 0x10 /* Enable interrupts */ -#define MIPS24K_PMC_USER_ENABLE 0x08 /* Count in USER mode */ -#define MIPS24K_PMC_SUPER_ENABLE 0x04 /* Count in SUPERVISOR mode */ -#define MIPS24K_PMC_KERNEL_ENABLE 0x02 /* Count in KERNEL mode */ -#define MIPS24K_PMC_ENABLE (MIPS24K_PMC_USER_ENABLE | \ - MIPS24K_PMC_SUPER_ENABLE | \ - MIPS24K_PMC_KERNEL_ENABLE) - -#define MIPS24K_PMC_SELECT 5 /* Which bit position the event starts at. */ - -const struct mips_event_code_map mips_event_codes[] = { - { PMC_EV_MIPS24K_CYCLE, MIPS_CTR_ALL, 0}, - { PMC_EV_MIPS24K_INSTR_EXECUTED, MIPS_CTR_ALL, 1}, - { PMC_EV_MIPS24K_BRANCH_COMPLETED, MIPS_CTR_0, 2}, - { PMC_EV_MIPS24K_BRANCH_MISPRED, MIPS_CTR_1, 2}, - { PMC_EV_MIPS24K_RETURN, MIPS_CTR_0, 3}, - { PMC_EV_MIPS24K_RETURN_MISPRED, MIPS_CTR_1, 3}, - { PMC_EV_MIPS24K_RETURN_NOT_31, MIPS_CTR_0, 4}, - { PMC_EV_MIPS24K_RETURN_NOTPRED, MIPS_CTR_1, 4}, - { PMC_EV_MIPS24K_ITLB_ACCESS, MIPS_CTR_0, 5}, - { PMC_EV_MIPS24K_ITLB_MISS, MIPS_CTR_1, 5}, - { PMC_EV_MIPS24K_DTLB_ACCESS, MIPS_CTR_0, 6}, - { PMC_EV_MIPS24K_DTLB_MISS, MIPS_CTR_1, 6}, - { PMC_EV_MIPS24K_JTLB_IACCESS, MIPS_CTR_0, 7}, - { PMC_EV_MIPS24K_JTLB_IMISS, MIPS_CTR_1, 7}, - { PMC_EV_MIPS24K_JTLB_DACCESS, MIPS_CTR_0, 8}, - { PMC_EV_MIPS24K_JTLB_DMISS, MIPS_CTR_1, 8}, - { PMC_EV_MIPS24K_IC_FETCH, MIPS_CTR_0, 9}, - { PMC_EV_MIPS24K_IC_MISS, MIPS_CTR_1, 9}, - { PMC_EV_MIPS24K_DC_LOADSTORE, MIPS_CTR_0, 10}, - { PMC_EV_MIPS24K_DC_WRITEBACK, MIPS_CTR_1, 10}, - { PMC_EV_MIPS24K_DC_MISS, MIPS_CTR_ALL, 11}, - /* 12 reserved */ - { PMC_EV_MIPS24K_STORE_MISS, MIPS_CTR_0, 13}, - { PMC_EV_MIPS24K_LOAD_MISS, MIPS_CTR_1, 13}, - { PMC_EV_MIPS24K_INTEGER_COMPLETED, MIPS_CTR_0, 14}, - { PMC_EV_MIPS24K_FP_COMPLETED, MIPS_CTR_1, 14}, - { PMC_EV_MIPS24K_LOAD_COMPLETED, MIPS_CTR_0, 15}, - { PMC_EV_MIPS24K_STORE_COMPLETED, MIPS_CTR_1, 15}, - { PMC_EV_MIPS24K_BARRIER_COMPLETED, MIPS_CTR_0, 16}, - { PMC_EV_MIPS24K_MIPS16_COMPLETED, MIPS_CTR_1, 16}, - { PMC_EV_MIPS24K_NOP_COMPLETED, MIPS_CTR_0, 17}, - { PMC_EV_MIPS24K_INTEGER_MULDIV_COMPLETED, MIPS_CTR_1, 17}, - { PMC_EV_MIPS24K_RF_STALL, MIPS_CTR_0, 18}, - { PMC_EV_MIPS24K_INSTR_REFETCH, MIPS_CTR_1, 18}, - { PMC_EV_MIPS24K_STORE_COND_COMPLETED, MIPS_CTR_0, 19}, - { PMC_EV_MIPS24K_STORE_COND_FAILED, MIPS_CTR_1, 19}, - { PMC_EV_MIPS24K_ICACHE_REQUESTS, MIPS_CTR_0, 20}, - { PMC_EV_MIPS24K_ICACHE_HIT, MIPS_CTR_1, 20}, - { PMC_EV_MIPS24K_L2_WRITEBACK, MIPS_CTR_0, 21}, - { PMC_EV_MIPS24K_L2_ACCESS, MIPS_CTR_1, 21}, - { PMC_EV_MIPS24K_L2_MISS, MIPS_CTR_0, 22}, - { PMC_EV_MIPS24K_L2_ERR_CORRECTED, MIPS_CTR_1, 22}, - { PMC_EV_MIPS24K_EXCEPTIONS, MIPS_CTR_0, 23}, - /* Event 23 on COP0 1/3 is undefined */ - { PMC_EV_MIPS24K_RF_CYCLES_STALLED, MIPS_CTR_0, 24}, - { PMC_EV_MIPS24K_IFU_CYCLES_STALLED, MIPS_CTR_0, 25}, - { PMC_EV_MIPS24K_ALU_CYCLES_STALLED, MIPS_CTR_1, 25}, - /* Events 26 through 32 undefined or reserved to customers */ - { PMC_EV_MIPS24K_UNCACHED_LOAD, MIPS_CTR_0, 33}, - { PMC_EV_MIPS24K_UNCACHED_STORE, MIPS_CTR_1, 33}, - { PMC_EV_MIPS24K_CP2_REG_TO_REG_COMPLETED, MIPS_CTR_0, 35}, - { PMC_EV_MIPS24K_MFTC_COMPLETED, MIPS_CTR_1, 35}, - /* Event 36 reserved */ - { PMC_EV_MIPS24K_IC_BLOCKED_CYCLES, MIPS_CTR_0, 37}, - { PMC_EV_MIPS24K_DC_BLOCKED_CYCLES, MIPS_CTR_1, 37}, - { PMC_EV_MIPS24K_L2_IMISS_STALL_CYCLES, MIPS_CTR_0, 38}, - { PMC_EV_MIPS24K_L2_DMISS_STALL_CYCLES, MIPS_CTR_1, 38}, - { PMC_EV_MIPS24K_DMISS_CYCLES, MIPS_CTR_0, 39}, - { PMC_EV_MIPS24K_L2_MISS_CYCLES, MIPS_CTR_1, 39}, - { PMC_EV_MIPS24K_UNCACHED_BLOCK_CYCLES, MIPS_CTR_0, 40}, - { PMC_EV_MIPS24K_MDU_STALL_CYCLES, MIPS_CTR_0, 41}, - { PMC_EV_MIPS24K_FPU_STALL_CYCLES, MIPS_CTR_1, 41}, - { PMC_EV_MIPS24K_CP2_STALL_CYCLES, MIPS_CTR_0, 42}, - { PMC_EV_MIPS24K_COREXTEND_STALL_CYCLES, MIPS_CTR_1, 42}, - { PMC_EV_MIPS24K_ISPRAM_STALL_CYCLES, MIPS_CTR_0, 43}, - { PMC_EV_MIPS24K_DSPRAM_STALL_CYCLES, MIPS_CTR_1, 43}, - { PMC_EV_MIPS24K_CACHE_STALL_CYCLES, MIPS_CTR_0, 44}, - /* Event 44 undefined on 1/3 */ - { PMC_EV_MIPS24K_LOAD_TO_USE_STALLS, MIPS_CTR_0, 45}, - { PMC_EV_MIPS24K_BASE_MISPRED_STALLS, MIPS_CTR_1, 45}, - { PMC_EV_MIPS24K_CPO_READ_STALLS, MIPS_CTR_0, 46}, - { PMC_EV_MIPS24K_BRANCH_MISPRED_CYCLES, MIPS_CTR_1, 46}, - /* Event 47 reserved */ - { PMC_EV_MIPS24K_IFETCH_BUFFER_FULL, MIPS_CTR_0, 48}, - { PMC_EV_MIPS24K_FETCH_BUFFER_ALLOCATED, MIPS_CTR_1, 48}, - { PMC_EV_MIPS24K_EJTAG_ITRIGGER, MIPS_CTR_0, 49}, - { PMC_EV_MIPS24K_EJTAG_DTRIGGER, MIPS_CTR_1, 49}, - { PMC_EV_MIPS24K_FSB_LT_QUARTER, MIPS_CTR_0, 50}, - { PMC_EV_MIPS24K_FSB_QUARTER_TO_HALF, MIPS_CTR_1, 50}, - { PMC_EV_MIPS24K_FSB_GT_HALF, MIPS_CTR_0, 51}, - { PMC_EV_MIPS24K_FSB_FULL_PIPELINE_STALLS, MIPS_CTR_1, 51}, - { PMC_EV_MIPS24K_LDQ_LT_QUARTER, MIPS_CTR_0, 52}, - { PMC_EV_MIPS24K_LDQ_QUARTER_TO_HALF, MIPS_CTR_1, 52}, - { PMC_EV_MIPS24K_LDQ_GT_HALF, MIPS_CTR_0, 53}, - { PMC_EV_MIPS24K_LDQ_FULL_PIPELINE_STALLS, MIPS_CTR_1, 53}, - { PMC_EV_MIPS24K_WBB_LT_QUARTER, MIPS_CTR_0, 54}, - { PMC_EV_MIPS24K_WBB_QUARTER_TO_HALF, MIPS_CTR_1, 54}, - { PMC_EV_MIPS24K_WBB_GT_HALF, MIPS_CTR_0, 55}, - { PMC_EV_MIPS24K_WBB_FULL_PIPELINE_STALLS, MIPS_CTR_1, 55}, - /* Events 56-63 reserved */ - { PMC_EV_MIPS24K_REQUEST_LATENCY, MIPS_CTR_0, 61}, - { PMC_EV_MIPS24K_REQUEST_COUNT, MIPS_CTR_1, 61} - -}; - -const int mips_event_codes_size = nitems(mips_event_codes); - -struct mips_pmc_spec mips_pmc_spec = { - .ps_cpuclass = PMC_CLASS_MIPS24K, - .ps_cputype = PMC_CPU_MIPS_24K, - .ps_capabilities = MIPS24K_PMC_CAPS, - .ps_counter_width = 32 -}; - -/* - * Performance Count Register N - */ -uint64_t -mips_pmcn_read(unsigned int pmc) -{ - uint32_t reg = 0; - - KASSERT(pmc < mips_npmcs, ("[mips24k,%d] illegal PMC number %d", - __LINE__, pmc)); - - /* The counter value is the next value after the control register. */ - switch (pmc) { - case 0: - reg = mips_rd_perfcnt1(); - break; - case 1: - reg = mips_rd_perfcnt3(); - break; - default: - return 0; - } - return (reg); -} - -uint64_t -mips_pmcn_write(unsigned int pmc, uint64_t reg) -{ - - KASSERT(pmc < mips_npmcs, ("[mips24k,%d] illegal PMC number %d", - __LINE__, pmc)); - - switch (pmc) { - case 0: - mips_wr_perfcnt1(reg); - break; - case 1: - mips_wr_perfcnt3(reg); - break; - default: - return 0; - } - return (reg); -} - -uint32_t -mips_get_perfctl(int cpu, int ri, uint32_t event, uint32_t caps) -{ - uint32_t config; - - config = event; - - config <<= MIPS24K_PMC_SELECT; - - if (caps & PMC_CAP_SYSTEM) - config |= (MIPS24K_PMC_SUPER_ENABLE | - MIPS24K_PMC_KERNEL_ENABLE); - if (caps & PMC_CAP_USER) - config |= MIPS24K_PMC_USER_ENABLE; - if ((caps & (PMC_CAP_USER | PMC_CAP_SYSTEM)) == 0) - config |= MIPS24K_PMC_ENABLE; - if (caps & PMC_CAP_INTERRUPT) - config |= MIPS24K_PMC_INTERRUPT_ENABLE; - - PMCDBG2(MDP,ALL,2,"mips24k-get_perfctl ri=%d -> config=0x%x", ri, config); - - return (config); -} diff --git a/sys/dev/hwpmc/hwpmc_mips74k.c b/sys/dev/hwpmc/hwpmc_mips74k.c deleted file mode 100644 index 30fdf8ab1ad..00000000000 --- a/sys/dev/hwpmc/hwpmc_mips74k.c +++ /dev/null @@ -1,258 +0,0 @@ -/*- - * Copyright (c) 2010 George V. Neville-Neil - * Copyright (c) 2015 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#define MIPS74K_PMC_CAPS (PMC_CAP_INTERRUPT | PMC_CAP_USER | \ - PMC_CAP_SYSTEM | PMC_CAP_EDGE | \ - PMC_CAP_THRESHOLD | PMC_CAP_READ | \ - PMC_CAP_WRITE | PMC_CAP_INVERT | \ - PMC_CAP_QUALIFIER) - -/* 0x1 - Exception_enable */ -#define MIPS74K_PMC_INTERRUPT_ENABLE 0x10 /* Enable interrupts */ -#define MIPS74K_PMC_USER_ENABLE 0x08 /* Count in USER mode */ -#define MIPS74K_PMC_SUPER_ENABLE 0x04 /* Count in SUPERVISOR mode */ -#define MIPS74K_PMC_KERNEL_ENABLE 0x02 /* Count in KERNEL mode */ -#define MIPS74K_PMC_ENABLE (MIPS74K_PMC_USER_ENABLE | \ - MIPS74K_PMC_SUPER_ENABLE | \ - MIPS74K_PMC_KERNEL_ENABLE) - -#define MIPS74K_PMC_SELECT 5 /* Which bit position the event starts at. */ - -const struct mips_event_code_map mips_event_codes[] = { - { PMC_EV_MIPS74K_CYCLES, MIPS_CTR_ALL, 0 }, - { PMC_EV_MIPS74K_INSTR_EXECUTED, MIPS_CTR_ALL, 1 }, - { PMC_EV_MIPS74K_PREDICTED_JR_31, MIPS_CTR_0, 2 }, - { PMC_EV_MIPS74K_JR_31_MISPREDICTIONS, MIPS_CTR_1, 2 }, - { PMC_EV_MIPS74K_REDIRECT_STALLS, MIPS_CTR_0, 3 }, - { PMC_EV_MIPS74K_JR_31_NO_PREDICTIONS, MIPS_CTR_1, 3 }, - { PMC_EV_MIPS74K_ITLB_ACCESSES, MIPS_CTR_0, 4 }, - { PMC_EV_MIPS74K_ITLB_MISSES, MIPS_CTR_1, 4 }, - { PMC_EV_MIPS74K_JTLB_INSN_MISSES, MIPS_CTR_1, 5 }, - { PMC_EV_MIPS74K_ICACHE_ACCESSES, MIPS_CTR_0, 6 }, - { PMC_EV_MIPS74K_ICACHE_MISSES, MIPS_CTR_1, 6 }, - { PMC_EV_MIPS74K_ICACHE_MISS_STALLS, MIPS_CTR_0, 7 }, - { PMC_EV_MIPS74K_UNCACHED_IFETCH_STALLS, MIPS_CTR_0, 8 }, - { PMC_EV_MIPS74K_PDTRACE_BACK_STALLS, MIPS_CTR_1, 8 }, - { PMC_EV_MIPS74K_IFU_REPLAYS, MIPS_CTR_0, 9 }, - { PMC_EV_MIPS74K_KILLED_FETCH_SLOTS, MIPS_CTR_1, 9 }, - { PMC_EV_MIPS74K_IFU_IDU_MISS_PRED_UPSTREAM_CYCLES, MIPS_CTR_0, 11 }, - { PMC_EV_MIPS74K_IFU_IDU_NO_FETCH_CYCLES, MIPS_CTR_1, 11 }, - { PMC_EV_MIPS74K_IFU_IDU_CLOGED_DOWNSTREAM_CYCLES, MIPS_CTR_0, 12 }, - { PMC_EV_MIPS74K_DDQ0_FULL_DR_STALLS, MIPS_CTR_0, 13 }, - { PMC_EV_MIPS74K_DDQ1_FULL_DR_STALLS, MIPS_CTR_1, 13 }, - { PMC_EV_MIPS74K_ALCB_FULL_DR_STALLS, MIPS_CTR_0, 14 }, - { PMC_EV_MIPS74K_AGCB_FULL_DR_STALLS, MIPS_CTR_1, 14 }, - { PMC_EV_MIPS74K_CLDQ_FULL_DR_STALLS, MIPS_CTR_0, 15 }, - { PMC_EV_MIPS74K_IODQ_FULL_DR_STALLS, MIPS_CTR_1, 15 }, - { PMC_EV_MIPS74K_ALU_EMPTY_CYCLES, MIPS_CTR_0, 16 }, - { PMC_EV_MIPS74K_AGEN_EMPTY_CYCLES, MIPS_CTR_1, 16 }, - { PMC_EV_MIPS74K_ALU_OPERANDS_NOT_READY_CYCLES, MIPS_CTR_0, 17 }, - { PMC_EV_MIPS74K_AGEN_OPERANDS_NOT_READY_CYCLES, MIPS_CTR_1, 17 }, - { PMC_EV_MIPS74K_ALU_NO_ISSUES_CYCLES, MIPS_CTR_0, 18 }, - { PMC_EV_MIPS74K_AGEN_NO_ISSUES_CYCLES, MIPS_CTR_1, 18 }, - { PMC_EV_MIPS74K_ALU_BUBBLE_CYCLES, MIPS_CTR_0, 19 }, - { PMC_EV_MIPS74K_AGEN_BUBBLE_CYCLES, MIPS_CTR_1, 19 }, - { PMC_EV_MIPS74K_SINGLE_ISSUE_CYCLES, MIPS_CTR_0, 20 }, - { PMC_EV_MIPS74K_DUAL_ISSUE_CYCLES, MIPS_CTR_1, 20 }, - { PMC_EV_MIPS74K_OOO_ALU_ISSUE_CYCLES, MIPS_CTR_0, 21 }, - { PMC_EV_MIPS74K_OOO_AGEN_ISSUE_CYCLES, MIPS_CTR_1, 21 }, - { PMC_EV_MIPS74K_JALR_JALR_HB_INSNS, MIPS_CTR_0, 22 }, - { PMC_EV_MIPS74K_DCACHE_LINE_REFILL_REQUESTS, MIPS_CTR_1, 22 }, - { PMC_EV_MIPS74K_DCACHE_LOAD_ACCESSES, MIPS_CTR_0, 23 }, - { PMC_EV_MIPS74K_DCACHE_ACCESSES, MIPS_CTR_1, 23 }, - { PMC_EV_MIPS74K_DCACHE_WRITEBACKS, MIPS_CTR_0, 24 }, - { PMC_EV_MIPS74K_DCACHE_MISSES, MIPS_CTR_1, 24 }, - { PMC_EV_MIPS74K_JTLB_DATA_ACCESSES, MIPS_CTR_0, 25 }, - { PMC_EV_MIPS74K_JTLB_DATA_MISSES, MIPS_CTR_1, 25 }, - { PMC_EV_MIPS74K_LOAD_STORE_REPLAYS, MIPS_CTR_0, 26 }, - { PMC_EV_MIPS74K_VA_TRANSALTION_CORNER_CASES, MIPS_CTR_1, 26 }, - { PMC_EV_MIPS74K_LOAD_STORE_BLOCKED_CYCLES, MIPS_CTR_0, 27 }, - { PMC_EV_MIPS74K_LOAD_STORE_NO_FILL_REQUESTS, MIPS_CTR_1, 27 }, - { PMC_EV_MIPS74K_L2_CACHE_WRITEBACKS, MIPS_CTR_0, 28 }, - { PMC_EV_MIPS74K_L2_CACHE_ACCESSES, MIPS_CTR_1, 28 }, - { PMC_EV_MIPS74K_L2_CACHE_MISSES, MIPS_CTR_0, 29 }, - { PMC_EV_MIPS74K_L2_CACHE_MISS_CYCLES, MIPS_CTR_1, 29 }, - { PMC_EV_MIPS74K_FSB_FULL_STALLS, MIPS_CTR_0, 30 }, - { PMC_EV_MIPS74K_FSB_OVER_50_FULL, MIPS_CTR_1, 30 }, - { PMC_EV_MIPS74K_LDQ_FULL_STALLS, MIPS_CTR_0, 31 }, - { PMC_EV_MIPS74K_LDQ_OVER_50_FULL, MIPS_CTR_1, 31 }, - { PMC_EV_MIPS74K_WBB_FULL_STALLS, MIPS_CTR_0, 32 }, - { PMC_EV_MIPS74K_WBB_OVER_50_FULL, MIPS_CTR_1, 32 }, - { PMC_EV_MIPS74K_LOAD_MISS_CONSUMER_REPLAYS, MIPS_CTR_0, 35 }, - { PMC_EV_MIPS74K_CP1_CP2_LOAD_INSNS, MIPS_CTR_1, 35 }, - { PMC_EV_MIPS74K_JR_NON_31_INSNS, MIPS_CTR_0, 36 }, - { PMC_EV_MIPS74K_MISPREDICTED_JR_31_INSNS, MIPS_CTR_1, 36 }, - { PMC_EV_MIPS74K_BRANCH_INSNS, MIPS_CTR_0, 37 }, - { PMC_EV_MIPS74K_CP1_CP2_COND_BRANCH_INSNS, MIPS_CTR_1, 37 }, - { PMC_EV_MIPS74K_BRANCH_LIKELY_INSNS, MIPS_CTR_0, 38 }, - { PMC_EV_MIPS74K_MISPREDICTED_BRANCH_LIKELY_INSNS, MIPS_CTR_1, 38 }, - { PMC_EV_MIPS74K_COND_BRANCH_INSNS, MIPS_CTR_0, 39 }, - { PMC_EV_MIPS74K_MISPREDICTED_BRANCH_INSNS, MIPS_CTR_1, 39 }, - { PMC_EV_MIPS74K_INTEGER_INSNS, MIPS_CTR_0, 40 }, - { PMC_EV_MIPS74K_FPU_INSNS, MIPS_CTR_1, 40 }, - { PMC_EV_MIPS74K_LOAD_INSNS, MIPS_CTR_0, 41 }, - { PMC_EV_MIPS74K_STORE_INSNS, MIPS_CTR_1, 41 }, - { PMC_EV_MIPS74K_J_JAL_INSNS, MIPS_CTR_0, 42 }, - { PMC_EV_MIPS74K_MIPS16_INSNS, MIPS_CTR_1, 42 }, - { PMC_EV_MIPS74K_NOP_INSNS, MIPS_CTR_0, 43 }, - { PMC_EV_MIPS74K_NT_MUL_DIV_INSNS, MIPS_CTR_1, 43 }, - { PMC_EV_MIPS74K_DSP_INSNS, MIPS_CTR_0, 44 }, - { PMC_EV_MIPS74K_ALU_DSP_SATURATION_INSNS, MIPS_CTR_1, 44 }, - { PMC_EV_MIPS74K_DSP_BRANCH_INSNS, MIPS_CTR_0, 45 }, - { PMC_EV_MIPS74K_MDU_DSP_SATURATION_INSNS, MIPS_CTR_1, 45 }, - { PMC_EV_MIPS74K_UNCACHED_LOAD_INSNS, MIPS_CTR_0, 46 }, - { PMC_EV_MIPS74K_UNCACHED_STORE_INSNS, MIPS_CTR_1, 46 }, - { PMC_EV_MIPS74K_EJTAG_INSN_TRIGGERS, MIPS_CTR_0, 49 }, - { PMC_EV_MIPS74K_CP1_BRANCH_MISPREDICTIONS, MIPS_CTR_0, 50 }, - { PMC_EV_MIPS74K_SC_INSNS, MIPS_CTR_0, 51 }, - { PMC_EV_MIPS74K_FAILED_SC_INSNS, MIPS_CTR_1, 51 }, - { PMC_EV_MIPS74K_PREFETCH_INSNS, MIPS_CTR_0, 52 }, - { PMC_EV_MIPS74K_CACHE_HIT_PREFETCH_INSNS, MIPS_CTR_1, 52 }, - { PMC_EV_MIPS74K_NO_INSN_CYCLES, MIPS_CTR_0, 53 }, - { PMC_EV_MIPS74K_LOAD_MISS_INSNS, MIPS_CTR_1, 53 }, - { PMC_EV_MIPS74K_ONE_INSN_CYCLES, MIPS_CTR_0, 54 }, - { PMC_EV_MIPS74K_TWO_INSNS_CYCLES, MIPS_CTR_1, 54 }, - { PMC_EV_MIPS74K_GFIFO_BLOCKED_CYCLES, MIPS_CTR_0, 55 }, - { PMC_EV_MIPS74K_CP1_CP2_STORE_INSNS, MIPS_CTR_1, 55 }, - { PMC_EV_MIPS74K_MISPREDICTION_STALLS, MIPS_CTR_0, 56 }, - { PMC_EV_MIPS74K_MISPREDICTED_BRANCH_INSNS_CYCLES, MIPS_CTR_0, 57 }, - { PMC_EV_MIPS74K_EXCEPTIONS_TAKEN, MIPS_CTR_0, 58 }, - { PMC_EV_MIPS74K_GRADUATION_REPLAYS, MIPS_CTR_1, 58 }, - { PMC_EV_MIPS74K_COREEXTEND_EVENTS, MIPS_CTR_0, 59 }, - { PMC_EV_MIPS74K_ISPRAM_EVENTS, MIPS_CTR_0, 62 }, - { PMC_EV_MIPS74K_DSPRAM_EVENTS, MIPS_CTR_1, 62 }, - { PMC_EV_MIPS74K_L2_CACHE_SINGLE_BIT_ERRORS, MIPS_CTR_0, 63 }, - { PMC_EV_MIPS74K_SYSTEM_EVENT_0, MIPS_CTR_0, 64 }, - { PMC_EV_MIPS74K_SYSTEM_EVENT_1, MIPS_CTR_1, 64 }, - { PMC_EV_MIPS74K_SYSTEM_EVENT_2, MIPS_CTR_0, 65 }, - { PMC_EV_MIPS74K_SYSTEM_EVENT_3, MIPS_CTR_1, 65 }, - { PMC_EV_MIPS74K_SYSTEM_EVENT_4, MIPS_CTR_0, 66 }, - { PMC_EV_MIPS74K_SYSTEM_EVENT_5, MIPS_CTR_1, 66 }, - { PMC_EV_MIPS74K_SYSTEM_EVENT_6, MIPS_CTR_0, 67 }, - { PMC_EV_MIPS74K_SYSTEM_EVENT_7, MIPS_CTR_1, 67 }, - { PMC_EV_MIPS74K_OCP_ALL_REQUESTS, MIPS_CTR_0, 68 }, - { PMC_EV_MIPS74K_OCP_ALL_CACHEABLE_REQUESTS, MIPS_CTR_1, 68 }, - { PMC_EV_MIPS74K_OCP_READ_REQUESTS, MIPS_CTR_0, 69 }, - { PMC_EV_MIPS74K_OCP_READ_CACHEABLE_REQUESTS, MIPS_CTR_1, 69 }, - { PMC_EV_MIPS74K_OCP_WRITE_REQUESTS, MIPS_CTR_0, 70 }, - { PMC_EV_MIPS74K_OCP_WRITE_CACHEABLE_REQUESTS, MIPS_CTR_1, 70 }, - { PMC_EV_MIPS74K_FSB_LESS_25_FULL, MIPS_CTR_0, 74 }, - { PMC_EV_MIPS74K_FSB_25_50_FULL, MIPS_CTR_1, 74 }, - { PMC_EV_MIPS74K_LDQ_LESS_25_FULL, MIPS_CTR_0, 75 }, - { PMC_EV_MIPS74K_LDQ_25_50_FULL, MIPS_CTR_1, 75 }, - { PMC_EV_MIPS74K_WBB_LESS_25_FULL, MIPS_CTR_0, 76 }, - { PMC_EV_MIPS74K_WBB_25_50_FULL, MIPS_CTR_1, 76 }, -}; - -const int mips_event_codes_size = nitems(mips_event_codes); - -struct mips_pmc_spec mips_pmc_spec = { - .ps_cpuclass = PMC_CLASS_MIPS74K, - .ps_cputype = PMC_CPU_MIPS_74K, - .ps_capabilities = MIPS74K_PMC_CAPS, - .ps_counter_width = 32 -}; - -/* - * Performance Count Register N - */ -uint64_t -mips_pmcn_read(unsigned int pmc) -{ - uint32_t reg = 0; - - KASSERT(pmc < mips_npmcs, ("[mips74k,%d] illegal PMC number %d", - __LINE__, pmc)); - - /* The counter value is the next value after the control register. */ - switch (pmc) { - case 0: - reg = mips_rd_perfcnt1(); - break; - case 1: - reg = mips_rd_perfcnt3(); - break; - default: - return 0; - } - return (reg); -} - -uint64_t -mips_pmcn_write(unsigned int pmc, uint64_t reg) -{ - - KASSERT(pmc < mips_npmcs, ("[mips74k,%d] illegal PMC number %d", - __LINE__, pmc)); - - switch (pmc) { - case 0: - mips_wr_perfcnt1(reg); - break; - case 1: - mips_wr_perfcnt3(reg); - break; - default: - return 0; - } - return (reg); -} - -uint32_t -mips_get_perfctl(int cpu, int ri, uint32_t event, uint32_t caps) -{ - uint32_t config; - - config = event; - - config <<= MIPS74K_PMC_SELECT; - - if (caps & PMC_CAP_SYSTEM) - config |= (MIPS74K_PMC_SUPER_ENABLE | - MIPS74K_PMC_KERNEL_ENABLE); - if (caps & PMC_CAP_USER) - config |= MIPS74K_PMC_USER_ENABLE; - if ((caps & (PMC_CAP_USER | PMC_CAP_SYSTEM)) == 0) - config |= MIPS74K_PMC_ENABLE; - if (caps & PMC_CAP_INTERRUPT) - config |= MIPS74K_PMC_INTERRUPT_ENABLE; - - PMCDBG2(MDP,ALL,2,"mips74k-get_perfctl ri=%d -> config=0x%x", ri, config); - - return (config); -} diff --git a/sys/dev/hwpmc/hwpmc_mpc7xxx.c b/sys/dev/hwpmc/hwpmc_mpc7xxx.c deleted file mode 100644 index 3265aaac719..00000000000 --- a/sys/dev/hwpmc/hwpmc_mpc7xxx.c +++ /dev/null @@ -1,480 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011 Justin Hibbits - * Copyright (c) 2005, Joseph Koshy - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "hwpmc_powerpc.h" - -#define PPC_SET_PMC1SEL(r, x) ((r & ~(SPR_MMCR0_74XX_PMC1SEL(0x3f))) | \ - SPR_MMCR0_74XX_PMC1SEL(x)) -#define PPC_SET_PMC2SEL(r, x) ((r & ~(SPR_MMCR0_74XX_PMC2SEL(0x3f))) | \ - SPR_MMCR0_74XX_PMC2SEL(x)) -#define PPC_SET_PMC3SEL(r, x) ((r & ~(SPR_MMCR1_PMC3SEL(0x1f))) | SPR_MMCR1_PMC3SEL(x)) -#define PPC_SET_PMC4SEL(r, x) ((r & ~(SPR_MMCR1_PMC4SEL(0x1f))) | SPR_MMCR1_PMC4SEL(x)) -#define PPC_SET_PMC5SEL(r, x) ((r & ~(SPR_MMCR1_PMC5SEL(0x1f))) | SPR_MMCR1_PMC5SEL(x)) -#define PPC_SET_PMC6SEL(r, x) ((r & ~(SPR_MMCR1_74XX_PMC6SEL(0x3f))) | \ - SPR_MMCR1_74XX_PMC6SEL(x)) - -/* Change this when we support more than just the 7450. */ -#define MPC7XXX_MAX_PMCS 6 - -/* - * Things to improve on this: - * - It stops (clears to 0) the PMC and resets it at every context switch - * currently. - */ - -/* - * This should work for every 32-bit PowerPC implementation I know of (G3 and G4 - * specifically). - */ - -#define PPC_PMC_MASK_ALL 0x3f -#define PMC_POWERPC_EVENT(id, mask, number) \ - { .pe_event = PMC_EV_PPC7450_##id, .pe_flags = mask, .pe_code = number } - -static struct pmc_ppc_event mpc7xxx_event_codes[] = { - PMC_POWERPC_EVENT(CYCLE,PPC_PMC_MASK_ALL, 1), - PMC_POWERPC_EVENT(INSTR_COMPLETED, 0x0f, 2), - PMC_POWERPC_EVENT(TLB_BIT_TRANSITIONS, 0x0f, 3), - PMC_POWERPC_EVENT(INSTR_DISPATCHED, 0x0f, 4), - PMC_POWERPC_EVENT(PMON_EXCEPT, 0x0f, 5), - PMC_POWERPC_EVENT(PMON_SIG, 0x0f, 7), - PMC_POWERPC_EVENT(VPU_INSTR_COMPLETED, 0x03, 8), - PMC_POWERPC_EVENT(VFPU_INSTR_COMPLETED, 0x03, 9), - PMC_POWERPC_EVENT(VIU1_INSTR_COMPLETED, 0x03, 10), - PMC_POWERPC_EVENT(VIU2_INSTR_COMPLETED, 0x03, 11), - PMC_POWERPC_EVENT(MTVSCR_INSTR_COMPLETED, 0x03, 12), - PMC_POWERPC_EVENT(MTVRSAVE_INSTR_COMPLETED, 0x03, 13), - PMC_POWERPC_EVENT(VPU_INSTR_WAIT_CYCLES, 0x03, 14), - PMC_POWERPC_EVENT(VFPU_INSTR_WAIT_CYCLES, 0x03, 15), - PMC_POWERPC_EVENT(VIU1_INSTR_WAIT_CYCLES, 0x03, 16), - PMC_POWERPC_EVENT(VIU2_INSTR_WAIT_CYCLES, 0x03, 17), - PMC_POWERPC_EVENT(MFVSCR_SYNC_CYCLES, 0x03, 18), - PMC_POWERPC_EVENT(VSCR_SAT_SET, 0x03, 19), - PMC_POWERPC_EVENT(STORE_INSTR_COMPLETED, 0x03, 20), - PMC_POWERPC_EVENT(L1_INSTR_CACHE_MISSES, 0x03, 21), - PMC_POWERPC_EVENT(L1_DATA_SNOOPS, 0x03, 22), - PMC_POWERPC_EVENT(UNRESOLVED_BRANCHES, 0x01, 23), - PMC_POWERPC_EVENT(SPEC_BUFFER_CYCLES, 0x01, 24), - PMC_POWERPC_EVENT(BRANCH_UNIT_STALL_CYCLES, 0x01, 25), - PMC_POWERPC_EVENT(TRUE_BRANCH_TARGET_HITS, 0x01, 26), - PMC_POWERPC_EVENT(BRANCH_LINK_STAC_PREDICTED, 0x01, 27), - PMC_POWERPC_EVENT(GPR_ISSUE_QUEUE_DISPATCHES, 0x01, 28), - PMC_POWERPC_EVENT(CYCLES_THREE_INSTR_DISPATCHED, 0x01, 29), - PMC_POWERPC_EVENT(THRESHOLD_INSTR_QUEUE_ENTRIES_CYCLES, 0x01, 30), - PMC_POWERPC_EVENT(THRESHOLD_VEC_INSTR_QUEUE_ENTRIES_CYCLES, 0x01, 31), - PMC_POWERPC_EVENT(CYCLES_NO_COMPLETED_INSTRS, 0x01, 32), - PMC_POWERPC_EVENT(IU2_INSTR_COMPLETED, 0x01, 33), - PMC_POWERPC_EVENT(BRANCHES_COMPLETED, 0x01, 34), - PMC_POWERPC_EVENT(EIEIO_INSTR_COMPLETED, 0x01, 35), - PMC_POWERPC_EVENT(MTSPR_INSTR_COMPLETED, 0x01, 36), - PMC_POWERPC_EVENT(SC_INSTR_COMPLETED, 0x01, 37), - PMC_POWERPC_EVENT(LS_LM_COMPLETED, 0x01, 38), - PMC_POWERPC_EVENT(ITLB_HW_TABLE_SEARCH_CYCLES, 0x01, 39), - PMC_POWERPC_EVENT(DTLB_HW_SEARCH_CYCLES_OVER_THRESHOLD, 0x01, 40), - PMC_POWERPC_EVENT(L1_INSTR_CACHE_ACCESSES, 0x01, 41), - PMC_POWERPC_EVENT(INSTR_BKPT_MATCHES, 0x01, 42), - PMC_POWERPC_EVENT(L1_DATA_CACHE_LOAD_MISS_CYCLES_OVER_THRESHOLD, 0x01, 43), - PMC_POWERPC_EVENT(L1_DATA_SNOOP_HIT_ON_MODIFIED, 0x01, 44), - PMC_POWERPC_EVENT(LOAD_MISS_ALIAS, 0x01, 45), - PMC_POWERPC_EVENT(LOAD_MISS_ALIAS_ON_TOUCH, 0x01, 46), - PMC_POWERPC_EVENT(TOUCH_ALIAS, 0x01, 47), - PMC_POWERPC_EVENT(L1_DATA_SNOOP_HIT_CASTOUT_QUEUE, 0x01, 48), - PMC_POWERPC_EVENT(L1_DATA_SNOOP_HIT_CASTOUT, 0x01, 49), - PMC_POWERPC_EVENT(L1_DATA_SNOOP_HITS, 0x01, 50), - PMC_POWERPC_EVENT(WRITE_THROUGH_STORES, 0x01, 51), - PMC_POWERPC_EVENT(CACHE_INHIBITED_STORES, 0x01, 52), - PMC_POWERPC_EVENT(L1_DATA_LOAD_HIT, 0x01, 53), - PMC_POWERPC_EVENT(L1_DATA_TOUCH_HIT, 0x01, 54), - PMC_POWERPC_EVENT(L1_DATA_STORE_HIT, 0x01, 55), - PMC_POWERPC_EVENT(L1_DATA_TOTAL_HITS, 0x01, 56), - PMC_POWERPC_EVENT(DST_INSTR_DISPATCHED, 0x01, 57), - PMC_POWERPC_EVENT(REFRESHED_DSTS, 0x01, 58), - PMC_POWERPC_EVENT(SUCCESSFUL_DST_TABLE_SEARCHES, 0x01, 59), - PMC_POWERPC_EVENT(DSS_INSTR_COMPLETED, 0x01, 60), - PMC_POWERPC_EVENT(DST_STREAM_0_CACHE_LINE_FETCHES, 0x01, 61), - PMC_POWERPC_EVENT(VTQ_SUSPENDS_DUE_TO_CTX_CHANGE, 0x01, 62), - PMC_POWERPC_EVENT(VTQ_LINE_FETCH_HIT, 0x01, 63), - PMC_POWERPC_EVENT(VEC_LOAD_INSTR_COMPLETED, 0x01, 64), - PMC_POWERPC_EVENT(FP_STORE_INSTR_COMPLETED_IN_LSU, 0x01, 65), - PMC_POWERPC_EVENT(FPU_RENORMALIZATION, 0x01, 66), - PMC_POWERPC_EVENT(FPU_DENORMALIZATION, 0x01, 67), - PMC_POWERPC_EVENT(FP_STORE_CAUSES_STALL_IN_LSU, 0x01, 68), - PMC_POWERPC_EVENT(LD_ST_TRUE_ALIAS_STALL, 0x01, 70), - PMC_POWERPC_EVENT(LSU_INDEXED_ALIAS_STALL, 0x01, 71), - PMC_POWERPC_EVENT(LSU_ALIAS_VS_FSQ_WB0_WB1, 0x01, 72), - PMC_POWERPC_EVENT(LSU_ALIAS_VS_CSQ, 0x01, 73), - PMC_POWERPC_EVENT(LSU_LOAD_HIT_LINE_ALIAS_VS_CSQ0, 0x01, 74), - PMC_POWERPC_EVENT(LSU_LOAD_MISS_LINE_ALIAS_VS_CSQ0, 0x01, 75), - PMC_POWERPC_EVENT(LSU_TOUCH_LINE_ALIAS_VS_FSQ_WB0_WB1, 0x01, 76), - PMC_POWERPC_EVENT(LSU_TOUCH_ALIAS_VS_CSQ, 0x01, 77), - PMC_POWERPC_EVENT(LSU_LMQ_FULL_STALL, 0x01, 78), - PMC_POWERPC_EVENT(FP_LOAD_INSTR_COMPLETED_IN_LSU, 0x01, 79), - PMC_POWERPC_EVENT(FP_LOAD_SINGLE_INSTR_COMPLETED_IN_LSU, 0x01, 80), - PMC_POWERPC_EVENT(FP_LOAD_DOUBLE_COMPLETED_IN_LSU, 0x01, 81), - PMC_POWERPC_EVENT(LSU_RA_LATCH_STALL, 0x01, 82), - PMC_POWERPC_EVENT(LSU_LOAD_VS_STORE_QUEUE_ALIAS_STALL, 0x01, 83), - PMC_POWERPC_EVENT(LSU_LMQ_INDEX_ALIAS, 0x01, 84), - PMC_POWERPC_EVENT(LSU_STORE_QUEUE_INDEX_ALIAS, 0x01, 85), - PMC_POWERPC_EVENT(LSU_CSQ_FORWARDING, 0x01, 86), - PMC_POWERPC_EVENT(LSU_MISALIGNED_LOAD_FINISH, 0x01, 87), - PMC_POWERPC_EVENT(LSU_MISALIGN_STORE_COMPLETED, 0x01, 88), - PMC_POWERPC_EVENT(LSU_MISALIGN_STALL, 0x01, 89), - PMC_POWERPC_EVENT(FP_ONE_QUARTER_FPSCR_RENAMES_BUSY, 0x01, 90), - PMC_POWERPC_EVENT(FP_ONE_HALF_FPSCR_RENAMES_BUSY, 0x01, 91), - PMC_POWERPC_EVENT(FP_THREE_QUARTERS_FPSCR_RENAMES_BUSY, 0x01, 92), - PMC_POWERPC_EVENT(FP_ALL_FPSCR_RENAMES_BUSY, 0x01, 93), - PMC_POWERPC_EVENT(FP_DENORMALIZED_RESULT, 0x01, 94), - PMC_POWERPC_EVENT(L1_DATA_TOTAL_MISSES, 0x02, 23), - PMC_POWERPC_EVENT(DISPATCHES_TO_FPR_ISSUE_QUEUE, 0x02, 24), - PMC_POWERPC_EVENT(LSU_INSTR_COMPLETED, 0x02, 25), - PMC_POWERPC_EVENT(LOAD_INSTR_COMPLETED, 0x02, 26), - PMC_POWERPC_EVENT(SS_SM_INSTR_COMPLETED, 0x02, 27), - PMC_POWERPC_EVENT(TLBIE_INSTR_COMPLETED, 0x02, 28), - PMC_POWERPC_EVENT(LWARX_INSTR_COMPLETED, 0x02, 29), - PMC_POWERPC_EVENT(MFSPR_INSTR_COMPLETED, 0x02, 30), - PMC_POWERPC_EVENT(REFETCH_SERIALIZATION, 0x02, 31), - PMC_POWERPC_EVENT(COMPLETION_QUEUE_ENTRIES_OVER_THRESHOLD, 0x02, 32), - PMC_POWERPC_EVENT(CYCLES_ONE_INSTR_DISPATCHED, 0x02, 33), - PMC_POWERPC_EVENT(CYCLES_TWO_INSTR_COMPLETED, 0x02, 34), - PMC_POWERPC_EVENT(ITLB_NON_SPECULATIVE_MISSES, 0x02, 35), - PMC_POWERPC_EVENT(CYCLES_WAITING_FROM_L1_INSTR_CACHE_MISS, 0x02, 36), - PMC_POWERPC_EVENT(L1_DATA_LOAD_ACCESS_MISS, 0x02, 37), - PMC_POWERPC_EVENT(L1_DATA_TOUCH_MISS, 0x02, 38), - PMC_POWERPC_EVENT(L1_DATA_STORE_MISS, 0x02, 39), - PMC_POWERPC_EVENT(L1_DATA_TOUCH_MISS_CYCLES, 0x02, 40), - PMC_POWERPC_EVENT(L1_DATA_CYCLES_USED, 0x02, 41), - PMC_POWERPC_EVENT(DST_STREAM_1_CACHE_LINE_FETCHES, 0x02, 42), - PMC_POWERPC_EVENT(VTQ_STREAM_CANCELED_PREMATURELY, 0x02, 43), - PMC_POWERPC_EVENT(VTQ_RESUMES_DUE_TO_CTX_CHANGE, 0x02, 44), - PMC_POWERPC_EVENT(VTQ_LINE_FETCH_MISS, 0x02, 45), - PMC_POWERPC_EVENT(VTQ_LINE_FETCH, 0x02, 46), - PMC_POWERPC_EVENT(TLBIE_SNOOPS, 0x02, 47), - PMC_POWERPC_EVENT(L1_INSTR_CACHE_RELOADS, 0x02, 48), - PMC_POWERPC_EVENT(L1_DATA_CACHE_RELOADS, 0x02, 49), - PMC_POWERPC_EVENT(L1_DATA_CACHE_CASTOUTS_TO_L2, 0x02, 50), - PMC_POWERPC_EVENT(STORE_MERGE_GATHER, 0x02, 51), - PMC_POWERPC_EVENT(CACHEABLE_STORE_MERGE_TO_32_BYTES, 0x02, 52), - PMC_POWERPC_EVENT(DATA_BKPT_MATCHES, 0x02, 53), - PMC_POWERPC_EVENT(FALL_THROUGH_BRANCHES_PROCESSED, 0x02, 54), - PMC_POWERPC_EVENT(FIRST_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLY, 0x02, 55), - PMC_POWERPC_EVENT(SECOND_SPECULATION_BUFFER_ACTIVE, 0x02, 56), - PMC_POWERPC_EVENT(BPU_STALL_ON_LR_DEPENDENCY, 0x02, 57), - PMC_POWERPC_EVENT(BTIC_MISS, 0x02, 58), - PMC_POWERPC_EVENT(BRANCH_LINK_STACK_CORRECTLY_RESOLVED, 0x02, 59), - PMC_POWERPC_EVENT(FPR_ISSUE_STALLED, 0x02, 60), - PMC_POWERPC_EVENT(SWITCHES_BETWEEN_PRIV_USER, 0x02, 61), - PMC_POWERPC_EVENT(LSU_COMPLETES_FP_STORE_SINGLE, 0x02, 62), - PMC_POWERPC_EVENT(CYCLES_TWO_INSTR_COMPLETED, 0x04, 8), - PMC_POWERPC_EVENT(CYCLES_ONE_INSTR_DISPATCHED, 0x04, 9), - PMC_POWERPC_EVENT(VR_ISSUE_QUEUE_DISPATCHES, 0x04, 10), - PMC_POWERPC_EVENT(VR_STALLS, 0x04, 11), - PMC_POWERPC_EVENT(GPR_RENAME_BUFFER_ENTRIES_OVER_THRESHOLD, 0x04, 12), - PMC_POWERPC_EVENT(FPR_ISSUE_QUEUE_ENTRIES, 0x04, 13), - PMC_POWERPC_EVENT(FPU_INSTR_COMPLETED, 0x04, 14), - PMC_POWERPC_EVENT(STWCX_INSTR_COMPLETED, 0x04, 15), - PMC_POWERPC_EVENT(LS_LM_INSTR_PIECES, 0x04, 16), - PMC_POWERPC_EVENT(ITLB_HW_SEARCH_CYCLES_OVER_THRESHOLD, 0x04, 17), - PMC_POWERPC_EVENT(DTLB_MISSES, 0x04, 18), - PMC_POWERPC_EVENT(CANCELLED_L1_INSTR_CACHE_MISSES, 0x04, 19), - PMC_POWERPC_EVENT(L1_DATA_CACHE_OP_HIT, 0x04, 20), - PMC_POWERPC_EVENT(L1_DATA_LOAD_MISS_CYCLES, 0x04, 21), - PMC_POWERPC_EVENT(L1_DATA_PUSHES, 0x04, 22), - PMC_POWERPC_EVENT(L1_DATA_TOTAL_MISS, 0x04, 23), - PMC_POWERPC_EVENT(VT2_FETCHES, 0x04, 24), - PMC_POWERPC_EVENT(TAKEN_BRANCHES_PROCESSED, 0x04, 25), - PMC_POWERPC_EVENT(BRANCH_FLUSHES, 0x04, 26), - PMC_POWERPC_EVENT(SECOND_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLY, 0x04, 27), - PMC_POWERPC_EVENT(THIRD_SPECULATION_BUFFER_ACTIVE, 0x04, 28), - PMC_POWERPC_EVENT(BRANCH_UNIT_STALL_ON_CTR_DEPENDENCY, 0x04, 29), - PMC_POWERPC_EVENT(FAST_BTIC_HIT, 0x04, 30), - PMC_POWERPC_EVENT(BRANCH_LINK_STACK_MISPREDICTED, 0x04, 31), - PMC_POWERPC_EVENT(CYCLES_THREE_INSTR_COMPLETED, 0x08, 14), - PMC_POWERPC_EVENT(CYCLES_NO_INSTR_DISPATCHED, 0x08, 15), - PMC_POWERPC_EVENT(GPR_ISSUE_QUEUE_ENTRIES_OVER_THRESHOLD, 0x08, 16), - PMC_POWERPC_EVENT(GPR_ISSUE_QUEUE_STALLED, 0x08, 17), - PMC_POWERPC_EVENT(IU1_INSTR_COMPLETED, 0x08, 18), - PMC_POWERPC_EVENT(DSSALL_INSTR_COMPLETED, 0x08, 19), - PMC_POWERPC_EVENT(TLBSYNC_INSTR_COMPLETED, 0x08, 20), - PMC_POWERPC_EVENT(SYNC_INSTR_COMPLETED, 0x08, 21), - PMC_POWERPC_EVENT(SS_SM_INSTR_PIECES, 0x08, 22), - PMC_POWERPC_EVENT(DTLB_HW_SEARCH_CYCLES, 0x08, 23), - PMC_POWERPC_EVENT(SNOOP_RETRIES, 0x08, 24), - PMC_POWERPC_EVENT(SUCCESSFUL_STWCX, 0x08, 25), - PMC_POWERPC_EVENT(DST_STREAM_3_CACHE_LINE_FETCHES, 0x08, 26), - PMC_POWERPC_EVENT(THIRD_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLY, 0x08, 27), - PMC_POWERPC_EVENT(MISPREDICTED_BRANCHES, 0x08, 28), - PMC_POWERPC_EVENT(FOLDED_BRANCHES, 0x08, 29), - PMC_POWERPC_EVENT(FP_STORE_DOUBLE_COMPLETES_IN_LSU, 0x08, 30), - PMC_POWERPC_EVENT(L2_CACHE_HITS, 0x30, 2), - PMC_POWERPC_EVENT(L3_CACHE_HITS, 0x30, 3), - PMC_POWERPC_EVENT(L2_INSTR_CACHE_MISSES, 0x30, 4), - PMC_POWERPC_EVENT(L3_INSTR_CACHE_MISSES, 0x30, 5), - PMC_POWERPC_EVENT(L2_DATA_CACHE_MISSES, 0x30, 6), - PMC_POWERPC_EVENT(L3_DATA_CACHE_MISSES, 0x30, 7), - PMC_POWERPC_EVENT(L2_LOAD_HITS, 0x10, 8), - PMC_POWERPC_EVENT(L2_STORE_HITS, 0x10, 9), - PMC_POWERPC_EVENT(L3_LOAD_HITS, 0x10, 10), - PMC_POWERPC_EVENT(L3_STORE_HITS, 0x10, 11), - PMC_POWERPC_EVENT(L2_TOUCH_HITS, 0x30, 13), - PMC_POWERPC_EVENT(L3_TOUCH_HITS, 0x30, 14), - PMC_POWERPC_EVENT(SNOOP_RETRIES, 0x30, 15), - PMC_POWERPC_EVENT(SNOOP_MODIFIED, 0x10, 16), - PMC_POWERPC_EVENT(SNOOP_VALID, 0x10, 17), - PMC_POWERPC_EVENT(INTERVENTION, 0x30, 18), - PMC_POWERPC_EVENT(L2_CACHE_MISSES, 0x10, 19), - PMC_POWERPC_EVENT(L3_CACHE_MISSES, 0x10, 20), - PMC_POWERPC_EVENT(L2_CACHE_CASTOUTS, 0x20, 8), - PMC_POWERPC_EVENT(L3_CACHE_CASTOUTS, 0x20, 9), - PMC_POWERPC_EVENT(L2SQ_FULL_CYCLES, 0x20, 10), - PMC_POWERPC_EVENT(L3SQ_FULL_CYCLES, 0x20, 11), - PMC_POWERPC_EVENT(RAQ_FULL_CYCLES, 0x20, 16), - PMC_POWERPC_EVENT(WAQ_FULL_CYCLES, 0x20, 17), - PMC_POWERPC_EVENT(L1_EXTERNAL_INTERVENTIONS, 0x20, 19), - PMC_POWERPC_EVENT(L2_EXTERNAL_INTERVENTIONS, 0x20, 20), - PMC_POWERPC_EVENT(L3_EXTERNAL_INTERVENTIONS, 0x20, 21), - PMC_POWERPC_EVENT(EXTERNAL_INTERVENTIONS, 0x20, 22), - PMC_POWERPC_EVENT(EXTERNAL_PUSHES, 0x20, 23), - PMC_POWERPC_EVENT(EXTERNAL_SNOOP_RETRY, 0x20, 24), - PMC_POWERPC_EVENT(DTQ_FULL_CYCLES, 0x20, 25), - PMC_POWERPC_EVENT(BUS_RETRY, 0x20, 26), - PMC_POWERPC_EVENT(L2_VALID_REQUEST, 0x20, 27), - PMC_POWERPC_EVENT(BORDQ_FULL, 0x20, 28), - PMC_POWERPC_EVENT(BUS_TAS_FOR_READS, 0x20, 42), - PMC_POWERPC_EVENT(BUS_TAS_FOR_WRITES, 0x20, 43), - PMC_POWERPC_EVENT(BUS_READS_NOT_RETRIED, 0x20, 44), - PMC_POWERPC_EVENT(BUS_WRITES_NOT_RETRIED, 0x20, 45), - PMC_POWERPC_EVENT(BUS_READS_WRITES_NOT_RETRIED, 0x20, 46), - PMC_POWERPC_EVENT(BUS_RETRY_DUE_TO_L1_RETRY, 0x20, 47), - PMC_POWERPC_EVENT(BUS_RETRY_DUE_TO_PREVIOUS_ADJACENT, 0x20, 48), - PMC_POWERPC_EVENT(BUS_RETRY_DUE_TO_COLLISION, 0x20, 49), - PMC_POWERPC_EVENT(BUS_RETRY_DUE_TO_INTERVENTION_ORDERING, 0x20, 50), - PMC_POWERPC_EVENT(SNOOP_REQUESTS, 0x20, 51), - PMC_POWERPC_EVENT(PREFETCH_ENGINE_REQUEST, 0x20, 52), - PMC_POWERPC_EVENT(PREFETCH_ENGINE_COLLISION_VS_LOAD, 0x20, 53), - PMC_POWERPC_EVENT(PREFETCH_ENGINE_COLLISION_VS_STORE, 0x20, 54), - PMC_POWERPC_EVENT(PREFETCH_ENGINE_COLLISION_VS_INSTR_FETCH, 0x20, 55), - PMC_POWERPC_EVENT(PREFETCH_ENGINE_COLLISION_VS_LOAD_STORE_INSTR_FETCH, 0x20, 56), - PMC_POWERPC_EVENT(PREFETCH_ENGINE_FULL, 0x20, 57) -}; -static size_t mpc7xxx_event_codes_size = nitems(mpc7xxx_event_codes); - -static pmc_value_t -mpc7xxx_pmcn_read(unsigned int pmc) -{ - switch (pmc) { - case 0: - return (mfspr(SPR_PMC1_74XX)); - case 1: - return (mfspr(SPR_PMC2_74XX)); - case 2: - return (mfspr(SPR_PMC3_74XX)); - case 3: - return (mfspr(SPR_PMC4_74XX)); - case 4: - return (mfspr(SPR_PMC5_74XX)); - case 5: - return (mfspr(SPR_PMC6_74XX)); - default: - panic("Invalid PMC number: %d\n", pmc); - } -} - -static void -mpc7xxx_pmcn_write(unsigned int pmc, uint32_t val) -{ - switch (pmc) { - case 0: - mtspr(SPR_PMC1_74XX, val); - break; - case 1: - mtspr(SPR_PMC2_74XX, val); - break; - case 2: - mtspr(SPR_PMC3_74XX, val); - break; - case 3: - mtspr(SPR_PMC4_74XX, val); - break; - case 4: - mtspr(SPR_PMC5_74XX, val); - break; - case 5: - mtspr(SPR_PMC6_74XX, val); - break; - default: - panic("Invalid PMC number: %d\n", pmc); - } -} - -static void -mpc7xxx_set_pmc(int cpu, int ri, int config) -{ - struct pmc *pm; - struct pmc_hw *phw; - register_t pmc_mmcr; - uint32_t config_mask; - - phw = &powerpc_pcpu[cpu]->pc_ppcpmcs[ri]; - pm = phw->phw_pmc; - /* The mask is inverted (enable is 1) compared to the flags in - * MMCR0, which are Freeze flags. - */ - config_mask = ~config & POWERPC_PMC_ENABLE; - config &= ~POWERPC_PMC_ENABLE; - - /* Enable/disable the PMC. */ - switch (ri) { - case 0: - pmc_mmcr = mfspr(SPR_MMCR0_74XX); - pmc_mmcr = PPC_SET_PMC1SEL(pmc_mmcr, config); - mtspr(SPR_MMCR0_74XX, pmc_mmcr); - break; - case 1: - pmc_mmcr = mfspr(SPR_MMCR0_74XX); - pmc_mmcr = PPC_SET_PMC2SEL(pmc_mmcr, config); - mtspr(SPR_MMCR0_74XX, pmc_mmcr); - break; - case 2: - pmc_mmcr = mfspr(SPR_MMCR1_74XX); - pmc_mmcr = PPC_SET_PMC3SEL(pmc_mmcr, config); - mtspr(SPR_MMCR1_74XX, pmc_mmcr); - break; - case 3: - pmc_mmcr = mfspr(SPR_MMCR0_74XX); - pmc_mmcr = PPC_SET_PMC4SEL(pmc_mmcr, config); - mtspr(SPR_MMCR0_74XX, pmc_mmcr); - break; - case 4: - pmc_mmcr = mfspr(SPR_MMCR1_74XX); - pmc_mmcr = PPC_SET_PMC5SEL(pmc_mmcr, config); - mtspr(SPR_MMCR1_74XX, pmc_mmcr); - break; - case 5: - pmc_mmcr = mfspr(SPR_MMCR1_74XX); - pmc_mmcr = PPC_SET_PMC6SEL(pmc_mmcr, config); - mtspr(SPR_MMCR1_74XX, pmc_mmcr); - break; - } - - if (config != PMCN_NONE) { - pmc_mmcr = mfspr(SPR_MMCR0_74XX); - pmc_mmcr &= ~SPR_MMCR0_FC; - pmc_mmcr |= config; - mtspr(SPR_MMCR0_74XX, pmc_mmcr); - } -} - -static int -mpc7xxx_pcpu_init(struct pmc_mdep *md, int cpu) -{ - powerpc_pcpu_init(md, cpu); - - /* Clear the MMCRs, and set FC, to disable all PMCs. */ - mtspr(SPR_MMCR0_74XX, SPR_MMCR0_FC | SPR_MMCR0_PMXE | - SPR_MMCR0_FCECE | SPR_MMCR0_PMC1CE | SPR_MMCR0_PMCNCE); - mtspr(SPR_MMCR1_74XX, 0); - - return (0); -} - -static int -mpc7xxx_pcpu_fini(struct pmc_mdep *md, int cpu) -{ - uint32_t mmcr0 = mfspr(SPR_MMCR0_74XX); - - mtmsr(mfmsr() & ~PSL_PMM); - mmcr0 |= SPR_MMCR0_FC; - mtspr(SPR_MMCR0_74XX, mmcr0); - - return (powerpc_pcpu_fini(md, cpu)); -} - -static void -mpc7xxx_resume_pmc(bool ie) -{ - /* Re-enable PERF exceptions. */ - if (ie) - mtspr(SPR_MMCR0_74XX, - (mfspr(SPR_MMCR0_74XX) & ~SPR_MMCR0_FC) | SPR_MMCR0_PMXE); -} - -int -pmc_mpc7xxx_initialize(struct pmc_mdep *pmc_mdep) -{ - struct pmc_classdep *pcd; - - pmc_mdep->pmd_cputype = PMC_CPU_PPC_7450; - - pcd = &pmc_mdep->pmd_classdep[PMC_MDEP_CLASS_INDEX_POWERPC]; - pcd->pcd_caps = POWERPC_PMC_CAPS; - pcd->pcd_class = PMC_CLASS_PPC7450; - pcd->pcd_num = MPC7XXX_MAX_PMCS; - pcd->pcd_ri = pmc_mdep->pmd_npmc; - pcd->pcd_width = 32; /* All PMCs, even in ppc970, are 32-bit */ - - pcd->pcd_allocate_pmc = powerpc_allocate_pmc; - pcd->pcd_config_pmc = powerpc_config_pmc; - pcd->pcd_pcpu_fini = mpc7xxx_pcpu_fini; - pcd->pcd_pcpu_init = mpc7xxx_pcpu_init; - pcd->pcd_describe = powerpc_describe; - pcd->pcd_get_config = powerpc_get_config; - pcd->pcd_read_pmc = powerpc_read_pmc; - pcd->pcd_release_pmc = powerpc_release_pmc; - pcd->pcd_start_pmc = powerpc_start_pmc; - pcd->pcd_stop_pmc = powerpc_stop_pmc; - pcd->pcd_write_pmc = powerpc_write_pmc; - - pmc_mdep->pmd_npmc += MPC7XXX_MAX_PMCS; - pmc_mdep->pmd_intr = powerpc_pmc_intr; - - ppc_event_codes = mpc7xxx_event_codes; - ppc_event_codes_size = mpc7xxx_event_codes_size; - ppc_event_first = PMC_EV_PPC7450_FIRST; - ppc_event_last = PMC_EV_PPC7450_LAST; - ppc_max_pmcs = MPC7XXX_MAX_PMCS; - ppc_class = pcd->pcd_class; - - powerpc_set_pmc = mpc7xxx_set_pmc; - powerpc_pmcn_read = mpc7xxx_pmcn_read; - powerpc_pmcn_write = mpc7xxx_pmcn_write; - powerpc_resume_pmc = mpc7xxx_resume_pmc; - - return (0); -} diff --git a/sys/dev/hwpmc/hwpmc_octeon.c b/sys/dev/hwpmc/hwpmc_octeon.c deleted file mode 100644 index 9e9b4c24bed..00000000000 --- a/sys/dev/hwpmc/hwpmc_octeon.c +++ /dev/null @@ -1,195 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012 Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#define OCTEON_PMC_CAPS (PMC_CAP_INTERRUPT | PMC_CAP_USER | \ - PMC_CAP_SYSTEM | PMC_CAP_EDGE | \ - PMC_CAP_THRESHOLD | PMC_CAP_READ | \ - PMC_CAP_WRITE | PMC_CAP_INVERT | \ - PMC_CAP_QUALIFIER) - -const struct mips_event_code_map mips_event_codes[] = -{ - { PMC_EV_OCTEON_CLK, MIPS_CTR_ALL, CVMX_CORE_PERF_CLK }, - { PMC_EV_OCTEON_ISSUE, MIPS_CTR_ALL, CVMX_CORE_PERF_ISSUE }, - { PMC_EV_OCTEON_RET, MIPS_CTR_ALL, CVMX_CORE_PERF_RET }, - { PMC_EV_OCTEON_NISSUE, MIPS_CTR_ALL, CVMX_CORE_PERF_NISSUE }, - { PMC_EV_OCTEON_SISSUE, MIPS_CTR_ALL, CVMX_CORE_PERF_SISSUE }, - { PMC_EV_OCTEON_DISSUE, MIPS_CTR_ALL, CVMX_CORE_PERF_DISSUE }, - { PMC_EV_OCTEON_IFI, MIPS_CTR_ALL, CVMX_CORE_PERF_IFI }, - { PMC_EV_OCTEON_BR, MIPS_CTR_ALL, CVMX_CORE_PERF_BR }, - { PMC_EV_OCTEON_BRMIS, MIPS_CTR_ALL, CVMX_CORE_PERF_BRMIS }, - { PMC_EV_OCTEON_J, MIPS_CTR_ALL, CVMX_CORE_PERF_J }, - { PMC_EV_OCTEON_JMIS, MIPS_CTR_ALL, CVMX_CORE_PERF_JMIS }, - { PMC_EV_OCTEON_REPLAY, MIPS_CTR_ALL, CVMX_CORE_PERF_REPLAY }, - { PMC_EV_OCTEON_IUNA, MIPS_CTR_ALL, CVMX_CORE_PERF_IUNA }, - { PMC_EV_OCTEON_TRAP, MIPS_CTR_ALL, CVMX_CORE_PERF_TRAP }, - { PMC_EV_OCTEON_UULOAD, MIPS_CTR_ALL, CVMX_CORE_PERF_UULOAD }, - { PMC_EV_OCTEON_UUSTORE, MIPS_CTR_ALL, CVMX_CORE_PERF_UUSTORE }, - { PMC_EV_OCTEON_ULOAD, MIPS_CTR_ALL, CVMX_CORE_PERF_ULOAD }, - { PMC_EV_OCTEON_USTORE, MIPS_CTR_ALL, CVMX_CORE_PERF_USTORE }, - { PMC_EV_OCTEON_EC, MIPS_CTR_ALL, CVMX_CORE_PERF_EC }, - { PMC_EV_OCTEON_MC, MIPS_CTR_ALL, CVMX_CORE_PERF_MC }, - { PMC_EV_OCTEON_CC, MIPS_CTR_ALL, CVMX_CORE_PERF_CC }, - { PMC_EV_OCTEON_CSRC, MIPS_CTR_ALL, CVMX_CORE_PERF_CSRC }, - { PMC_EV_OCTEON_CFETCH, MIPS_CTR_ALL, CVMX_CORE_PERF_CFETCH }, - { PMC_EV_OCTEON_CPREF, MIPS_CTR_ALL, CVMX_CORE_PERF_CPREF }, - { PMC_EV_OCTEON_ICA, MIPS_CTR_ALL, CVMX_CORE_PERF_ICA }, - { PMC_EV_OCTEON_II, MIPS_CTR_ALL, CVMX_CORE_PERF_II }, - { PMC_EV_OCTEON_IP, MIPS_CTR_ALL, CVMX_CORE_PERF_IP }, - { PMC_EV_OCTEON_CIMISS, MIPS_CTR_ALL, CVMX_CORE_PERF_CIMISS }, - { PMC_EV_OCTEON_WBUF, MIPS_CTR_ALL, CVMX_CORE_PERF_WBUF }, - { PMC_EV_OCTEON_WDAT, MIPS_CTR_ALL, CVMX_CORE_PERF_WDAT }, - { PMC_EV_OCTEON_WBUFLD, MIPS_CTR_ALL, CVMX_CORE_PERF_WBUFLD }, - { PMC_EV_OCTEON_WBUFFL, MIPS_CTR_ALL, CVMX_CORE_PERF_WBUFFL }, - { PMC_EV_OCTEON_WBUFTR, MIPS_CTR_ALL, CVMX_CORE_PERF_WBUFTR }, - { PMC_EV_OCTEON_BADD, MIPS_CTR_ALL, CVMX_CORE_PERF_BADD }, - { PMC_EV_OCTEON_BADDL2, MIPS_CTR_ALL, CVMX_CORE_PERF_BADDL2 }, - { PMC_EV_OCTEON_BFILL, MIPS_CTR_ALL, CVMX_CORE_PERF_BFILL }, - { PMC_EV_OCTEON_DDIDS, MIPS_CTR_ALL, CVMX_CORE_PERF_DDIDS }, - { PMC_EV_OCTEON_IDIDS, MIPS_CTR_ALL, CVMX_CORE_PERF_IDIDS }, - { PMC_EV_OCTEON_DIDNA, MIPS_CTR_ALL, CVMX_CORE_PERF_DIDNA }, - { PMC_EV_OCTEON_LDS, MIPS_CTR_ALL, CVMX_CORE_PERF_LDS }, - { PMC_EV_OCTEON_LMLDS, MIPS_CTR_ALL, CVMX_CORE_PERF_LMLDS }, - { PMC_EV_OCTEON_IOLDS, MIPS_CTR_ALL, CVMX_CORE_PERF_IOLDS }, - { PMC_EV_OCTEON_DMLDS, MIPS_CTR_ALL, CVMX_CORE_PERF_DMLDS }, - { PMC_EV_OCTEON_STS, MIPS_CTR_ALL, CVMX_CORE_PERF_STS }, - { PMC_EV_OCTEON_LMSTS, MIPS_CTR_ALL, CVMX_CORE_PERF_LMSTS }, - { PMC_EV_OCTEON_IOSTS, MIPS_CTR_ALL, CVMX_CORE_PERF_IOSTS }, - { PMC_EV_OCTEON_IOBDMA, MIPS_CTR_ALL, CVMX_CORE_PERF_IOBDMA }, - { PMC_EV_OCTEON_DTLB, MIPS_CTR_ALL, CVMX_CORE_PERF_DTLB }, - { PMC_EV_OCTEON_DTLBAD, MIPS_CTR_ALL, CVMX_CORE_PERF_DTLBAD }, - { PMC_EV_OCTEON_ITLB, MIPS_CTR_ALL, CVMX_CORE_PERF_ITLB }, - { PMC_EV_OCTEON_SYNC, MIPS_CTR_ALL, CVMX_CORE_PERF_SYNC }, - { PMC_EV_OCTEON_SYNCIOB, MIPS_CTR_ALL, CVMX_CORE_PERF_SYNCIOB }, - { PMC_EV_OCTEON_SYNCW, MIPS_CTR_ALL, CVMX_CORE_PERF_SYNCW }, -}; - -const int mips_event_codes_size = nitems(mips_event_codes); - -struct mips_pmc_spec mips_pmc_spec = { - .ps_cpuclass = PMC_CLASS_OCTEON, - .ps_cputype = PMC_CPU_MIPS_OCTEON, - .ps_capabilities = OCTEON_PMC_CAPS, - .ps_counter_width = 64 -}; - -/* - * Performance Count Register N - */ -uint64_t -mips_pmcn_read(unsigned int pmc) -{ - uint64_t reg = 0; - - KASSERT(pmc < mips_npmcs, ("[mips,%d] illegal PMC number %d", - __LINE__, pmc)); - - /* The counter value is the next value after the control register. */ - switch (pmc) { - case 0: - CVMX_MF_COP0(reg, COP0_PERFVALUE0); - break; - case 1: - CVMX_MF_COP0(reg, COP0_PERFVALUE1); - break; - default: - return 0; - } - return (reg); -} - -uint64_t -mips_pmcn_write(unsigned int pmc, uint64_t reg) -{ - - KASSERT(pmc < mips_npmcs, ("[mips,%d] illegal PMC number %d", - __LINE__, pmc)); - - switch (pmc) { - case 0: - CVMX_MT_COP0(reg, COP0_PERFVALUE0); - break; - case 1: - CVMX_MT_COP0(reg, COP0_PERFVALUE1); - break; - default: - return 0; - } - return (reg); -} - -uint32_t -mips_get_perfctl(int cpu, int ri, uint32_t event, uint32_t caps) -{ - cvmx_core_perf_control_t control; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[mips,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < mips_npmcs, - ("[mips,%d] illegal row index %d", __LINE__, ri)); - - control.s.event = event; - - if (caps & PMC_CAP_SYSTEM) { - control.s.k = 1; - control.s.s = 1; - control.s.ex = 1; - } - - if (caps & PMC_CAP_USER) - control.s.u = 1; - - if ((caps & (PMC_CAP_USER | PMC_CAP_SYSTEM)) == 0) { - control.s.k = 1; - control.s.s = 1; - control.s.u = 1; - control.s.ex = 1; - } - - if (caps & PMC_CAP_INTERRUPT) - control.s.ie = 1; - - PMCDBG2(MDP,ALL,2,"mips-allocate ri=%d -> config=0x%x", ri, - control.u32); - - return (control.u32); -} diff --git a/sys/dev/hwpmc/hwpmc_power8.c b/sys/dev/hwpmc/hwpmc_power8.c deleted file mode 100644 index 49db52b9e34..00000000000 --- a/sys/dev/hwpmc/hwpmc_power8.c +++ /dev/null @@ -1,317 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2013 Justin Hibbits - * Copyright (c) 2020 Leandro Lupori - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "hwpmc_powerpc.h" - -#define POWER8_MAX_PMCS 6 - -static struct pmc_ppc_event power8_event_codes[] = { - {PMC_EV_POWER8_INSTR_COMPLETED, - .pe_flags = PMC_FLAG_PMC5, - .pe_code = 0x00 - }, - /* - * PMC1 can also count cycles, but as PMC6 can only count cycles - * it's better to always use it and leave PMC1 free to count - * other events. - */ - {PMC_EV_POWER8_CYCLES, - .pe_flags = PMC_FLAG_PMC6, - .pe_code = 0xf0 - }, - {PMC_EV_POWER8_CYCLES_WITH_INSTRS_COMPLETED, - .pe_flags = PMC_FLAG_PMC1, - .pe_code = 0xf2 - }, - {PMC_EV_POWER8_FPU_INSTR_COMPLETED, - .pe_flags = PMC_FLAG_PMC1, - .pe_code = 0xf4 - }, - {PMC_EV_POWER8_ERAT_INSTR_MISS, - .pe_flags = PMC_FLAG_PMC1, - .pe_code = 0xf6 - }, - {PMC_EV_POWER8_CYCLES_IDLE, - .pe_flags = PMC_FLAG_PMC1, - .pe_code = 0xf8 - }, - {PMC_EV_POWER8_CYCLES_WITH_ANY_THREAD_RUNNING, - .pe_flags = PMC_FLAG_PMC1, - .pe_code = 0xfa - }, - {PMC_EV_POWER8_STORE_COMPLETED, - .pe_flags = PMC_FLAG_PMC2, - .pe_code = 0xf0 - }, - {PMC_EV_POWER8_INSTR_DISPATCHED, - .pe_flags = PMC_FLAG_PMC2 | PMC_FLAG_PMC3, - .pe_code = 0xf2 - }, - {PMC_EV_POWER8_CYCLES_RUNNING, - .pe_flags = PMC_FLAG_PMC2, - .pe_code = 0xf4 - }, - {PMC_EV_POWER8_ERAT_DATA_MISS, - .pe_flags = PMC_FLAG_PMC2, - .pe_code = 0xf6 - }, - {PMC_EV_POWER8_EXTERNAL_INTERRUPT, - .pe_flags = PMC_FLAG_PMC2, - .pe_code = 0xf8 - }, - {PMC_EV_POWER8_BRANCH_TAKEN, - .pe_flags = PMC_FLAG_PMC2, - .pe_code = 0xfa - }, - {PMC_EV_POWER8_L1_INSTR_MISS, - .pe_flags = PMC_FLAG_PMC2, - .pe_code = 0xfc - }, - {PMC_EV_POWER8_L2_LOAD_MISS, - .pe_flags = PMC_FLAG_PMC2, - .pe_code = 0xfe - }, - {PMC_EV_POWER8_STORE_NO_REAL_ADDR, - .pe_flags = PMC_FLAG_PMC3, - .pe_code = 0xf0 - }, - {PMC_EV_POWER8_INSTR_COMPLETED_WITH_ALL_THREADS_RUNNING, - .pe_flags = PMC_FLAG_PMC3, - .pe_code = 0xf4 - }, - {PMC_EV_POWER8_L1_LOAD_MISS, - .pe_flags = PMC_FLAG_PMC3, - .pe_code = 0xf6 - }, - {PMC_EV_POWER8_TIMEBASE_EVENT, - .pe_flags = PMC_FLAG_PMC3, - .pe_code = 0xf8 - }, - {PMC_EV_POWER8_L3_INSTR_MISS, - .pe_flags = PMC_FLAG_PMC3, - .pe_code = 0xfa - }, - {PMC_EV_POWER8_TLB_DATA_MISS, - .pe_flags = PMC_FLAG_PMC3, - .pe_code = 0xfc - }, - {PMC_EV_POWER8_L3_LOAD_MISS, - .pe_flags = PMC_FLAG_PMC3, - .pe_code = 0xfe - }, - {PMC_EV_POWER8_LOAD_NO_REAL_ADDR, - .pe_flags = PMC_FLAG_PMC4, - .pe_code = 0xf0 - }, - {PMC_EV_POWER8_CYCLES_WITH_INSTRS_DISPATCHED, - .pe_flags = PMC_FLAG_PMC4, - .pe_code = 0xf2 - }, - {PMC_EV_POWER8_CYCLES_RUNNING_PURR_INC, - .pe_flags = PMC_FLAG_PMC4, - .pe_code = 0xf4 - }, - {PMC_EV_POWER8_BRANCH_MISPREDICTED, - .pe_flags = PMC_FLAG_PMC4, - .pe_code = 0xf6 - }, - {PMC_EV_POWER8_PREFETCHED_INSTRS_DISCARDED, - .pe_flags = PMC_FLAG_PMC4, - .pe_code = 0xf8 - }, - {PMC_EV_POWER8_INSTR_COMPLETED_RUNNING, - .pe_flags = PMC_FLAG_PMC4, - .pe_code = 0xfa - }, - {PMC_EV_POWER8_TLB_INSTR_MISS, - .pe_flags = PMC_FLAG_PMC4, - .pe_code = 0xfc - }, - {PMC_EV_POWER8_CACHE_LOAD_MISS, - .pe_flags = PMC_FLAG_PMC4, - .pe_code = 0xfe - } -}; -static size_t power8_event_codes_size = nitems(power8_event_codes); - -static void -power8_set_pmc(int cpu, int ri, int config) -{ - register_t mmcr; - - /* Select event */ - switch (ri) { - case 0: - case 1: - case 2: - case 3: - mmcr = mfspr(SPR_MMCR1); - mmcr &= ~SPR_MMCR1_P8_PMCNSEL_MASK(ri); - mmcr |= SPR_MMCR1_P8_PMCNSEL(ri, config & ~POWERPC_PMC_ENABLE); - mtspr(SPR_MMCR1, mmcr); - break; - } - - /* - * By default, freeze counter in all states. - * If counter is being started, unfreeze it in selected states. - */ - mmcr = mfspr(SPR_MMCR2) | SPR_MMCR2_FCNHSP(ri); - if (config != PMCN_NONE) { - if (config & POWERPC_PMC_USER_ENABLE) - mmcr &= ~(SPR_MMCR2_FCNP0(ri) | - SPR_MMCR2_FCNP1(ri)); - if (config & POWERPC_PMC_KERNEL_ENABLE) - mmcr &= ~(SPR_MMCR2_FCNH(ri) | - SPR_MMCR2_FCNS(ri)); - } - mtspr(SPR_MMCR2, mmcr); -} - -static int -power8_pcpu_init(struct pmc_mdep *md, int cpu) -{ - register_t mmcr0; - int i; - - powerpc_pcpu_init(md, cpu); - - /* Freeze all counters before modifying PMC registers */ - mmcr0 = mfspr(SPR_MMCR0) | SPR_MMCR0_FC; - mtspr(SPR_MMCR0, mmcr0); - - /* - * Now setup MMCR0: - * - PMAO=0: clear alerts - * - FCPC=0, FCP=0: don't freeze counters in problem state - * - FCECE: Freeze Counters on Enabled Condition or Event - * - PMC1CE/PMCNCE: PMC1/N Condition Enable - */ - mmcr0 &= ~(SPR_MMCR0_PMAO | SPR_MMCR0_FCPC | SPR_MMCR0_FCP); - mmcr0 |= SPR_MMCR0_FCECE | SPR_MMCR0_PMC1CE | SPR_MMCR0_PMCNCE; - mtspr(SPR_MMCR0, mmcr0); - - /* Clear all PMCs to prevent enabled condition interrupts */ - for (i = 0; i < POWER8_MAX_PMCS; i++) - powerpc_pmcn_write(i, 0); - - /* Disable events in PMCs 1-4 */ - mtspr(SPR_MMCR1, mfspr(SPR_MMCR1) & ~SPR_MMCR1_P8_PMCSEL_ALL); - - /* Freeze each counter, in all states */ - mtspr(SPR_MMCR2, mfspr(SPR_MMCR2) | - SPR_MMCR2_FCNHSP(0) | SPR_MMCR2_FCNHSP(1) | SPR_MMCR2_FCNHSP(2) | - SPR_MMCR2_FCNHSP(3) | SPR_MMCR2_FCNHSP(4) | SPR_MMCR2_FCNHSP(5)); - - /* Enable interrupts, unset global freeze */ - mmcr0 &= ~SPR_MMCR0_FC; - mmcr0 |= SPR_MMCR0_PMAE; - mtspr(SPR_MMCR0, mmcr0); - return (0); -} - -static int -power8_pcpu_fini(struct pmc_mdep *md, int cpu) -{ - register_t mmcr0; - - /* Freeze counters, disable interrupts */ - mmcr0 = mfspr(SPR_MMCR0); - mmcr0 &= ~SPR_MMCR0_PMAE; - mmcr0 |= SPR_MMCR0_FC; - mtspr(SPR_MMCR0, mmcr0); - - return (powerpc_pcpu_fini(md, cpu)); -} - -static void -power8_resume_pmc(bool ie) -{ - register_t mmcr0; - - /* Unfreeze counters and re-enable PERF exceptions if requested. */ - mmcr0 = mfspr(SPR_MMCR0); - mmcr0 &= ~(SPR_MMCR0_FC | SPR_MMCR0_PMAO | SPR_MMCR0_PMAE); - if (ie) - mmcr0 |= SPR_MMCR0_PMAE; - mtspr(SPR_MMCR0, mmcr0); -} - -int -pmc_power8_initialize(struct pmc_mdep *pmc_mdep) -{ - struct pmc_classdep *pcd; - - pmc_mdep->pmd_cputype = PMC_CPU_PPC_POWER8; - - pcd = &pmc_mdep->pmd_classdep[PMC_MDEP_CLASS_INDEX_POWERPC]; - pcd->pcd_caps = POWERPC_PMC_CAPS; - pcd->pcd_class = PMC_CLASS_POWER8; - pcd->pcd_num = POWER8_MAX_PMCS; - pcd->pcd_ri = pmc_mdep->pmd_npmc; - pcd->pcd_width = 32; - - pcd->pcd_pcpu_init = power8_pcpu_init; - pcd->pcd_pcpu_fini = power8_pcpu_fini; - pcd->pcd_allocate_pmc = powerpc_allocate_pmc; - pcd->pcd_release_pmc = powerpc_release_pmc; - pcd->pcd_start_pmc = powerpc_start_pmc; - pcd->pcd_stop_pmc = powerpc_stop_pmc; - pcd->pcd_get_config = powerpc_get_config; - pcd->pcd_config_pmc = powerpc_config_pmc; - pcd->pcd_describe = powerpc_describe; - pcd->pcd_read_pmc = powerpc_read_pmc; - pcd->pcd_write_pmc = powerpc_write_pmc; - - pmc_mdep->pmd_npmc += POWER8_MAX_PMCS; - pmc_mdep->pmd_intr = powerpc_pmc_intr; - - ppc_event_codes = power8_event_codes; - ppc_event_codes_size = power8_event_codes_size; - ppc_event_first = PMC_EV_POWER8_FIRST; - ppc_event_last = PMC_EV_POWER8_LAST; - ppc_max_pmcs = POWER8_MAX_PMCS; - - powerpc_set_pmc = power8_set_pmc; - powerpc_pmcn_read = powerpc_pmcn_read_default; - powerpc_pmcn_write = powerpc_pmcn_write_default; - powerpc_resume_pmc = power8_resume_pmc; - - return (0); -} diff --git a/sys/dev/hwpmc/hwpmc_powerpc.c b/sys/dev/hwpmc/hwpmc_powerpc.c deleted file mode 100644 index a7e872f2954..00000000000 --- a/sys/dev/hwpmc/hwpmc_powerpc.c +++ /dev/null @@ -1,617 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011,2013 Justin Hibbits - * Copyright (c) 2005, Joseph Koshy - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "hwpmc_powerpc.h" - -#ifdef __powerpc64__ -#define OFFSET 4 /* Account for the TOC reload slot */ -#else -#define OFFSET 0 -#endif - -struct powerpc_cpu **powerpc_pcpu; -struct pmc_ppc_event *ppc_event_codes; -size_t ppc_event_codes_size; -int ppc_event_first; -int ppc_event_last; -int ppc_max_pmcs; -enum pmc_class ppc_class; - -void (*powerpc_set_pmc)(int cpu, int ri, int config); -pmc_value_t (*powerpc_pmcn_read)(unsigned int pmc); -void (*powerpc_pmcn_write)(unsigned int pmc, uint32_t val); -void (*powerpc_resume_pmc)(bool ie); - - -int -pmc_save_kernel_callchain(uintptr_t *cc, int maxsamples, - struct trapframe *tf) -{ - uintptr_t *osp, *sp; - uintptr_t pc; - int frames = 0; - - cc[frames++] = PMC_TRAPFRAME_TO_PC(tf); - sp = (uintptr_t *)PMC_TRAPFRAME_TO_FP(tf); - osp = (uintptr_t *)PAGE_SIZE; - - for (; frames < maxsamples; frames++) { - if (sp <= osp) - break; - #ifdef __powerpc64__ - pc = sp[2]; - #else - pc = sp[1]; - #endif - if ((pc & 3) || (pc < 0x100)) - break; - - /* - * trapexit() and asttrapexit() are sentinels - * for kernel stack tracing. - * */ - if (pc + OFFSET == (uintptr_t) &trapexit || - pc + OFFSET == (uintptr_t) &asttrapexit) - break; - - cc[frames] = pc; - osp = sp; - sp = (uintptr_t *)*sp; - } - return (frames); -} - -int -powerpc_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc) -{ - struct pmc_hw *phw; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[powerpc,%d], illegal CPU %d", __LINE__, cpu)); - - phw = &powerpc_pcpu[cpu]->pc_ppcpmcs[ri]; - - snprintf(pi->pm_name, sizeof(pi->pm_name), "POWERPC-%d", ri); - pi->pm_class = powerpc_pcpu[cpu]->pc_class; - - if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) { - pi->pm_enabled = TRUE; - *ppmc = phw->phw_pmc; - } else { - pi->pm_enabled = FALSE; - *ppmc = NULL; - } - - return (0); -} - -int -powerpc_get_config(int cpu, int ri, struct pmc **ppm) -{ - - *ppm = powerpc_pcpu[cpu]->pc_ppcpmcs[ri].phw_pmc; - - return (0); -} - -int -powerpc_pcpu_init(struct pmc_mdep *md, int cpu) -{ - struct pmc_cpu *pc; - struct powerpc_cpu *pac; - struct pmc_hw *phw; - int first_ri, i; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[powerpc,%d] wrong cpu number %d", __LINE__, cpu)); - PMCDBG1(MDP,INI,1,"powerpc-init cpu=%d", cpu); - - powerpc_pcpu[cpu] = pac = malloc(sizeof(struct powerpc_cpu) + - ppc_max_pmcs * sizeof(struct pmc_hw), M_PMC, M_WAITOK | M_ZERO); - pac->pc_class = - md->pmd_classdep[PMC_MDEP_CLASS_INDEX_POWERPC].pcd_class; - - pc = pmc_pcpu[cpu]; - first_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_POWERPC].pcd_ri; - KASSERT(pc != NULL, ("[powerpc,%d] NULL per-cpu pointer", __LINE__)); - - for (i = 0, phw = pac->pc_ppcpmcs; i < ppc_max_pmcs; i++, phw++) { - phw->phw_state = PMC_PHW_FLAG_IS_ENABLED | - PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(i); - phw->phw_pmc = NULL; - pc->pc_hwpmcs[i + first_ri] = phw; - } - - return (0); -} - -int -powerpc_pcpu_fini(struct pmc_mdep *md, int cpu) -{ - PMCDBG1(MDP,INI,1,"powerpc-fini cpu=%d", cpu); - - free(powerpc_pcpu[cpu], M_PMC); - powerpc_pcpu[cpu] = NULL; - - return (0); -} - -int -powerpc_allocate_pmc(int cpu, int ri, struct pmc *pm, - const struct pmc_op_pmcallocate *a) -{ - enum pmc_event pe; - uint32_t caps, config = 0, counter = 0; - int i; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < ppc_max_pmcs, - ("[powerpc,%d] illegal row index %d", __LINE__, ri)); - - if (a->pm_class != ppc_class) - return (EINVAL); - - caps = a->pm_caps; - - pe = a->pm_ev; - - if (pe < ppc_event_first || pe > ppc_event_last) - return (EINVAL); - - for (i = 0; i < ppc_event_codes_size; i++) { - if (ppc_event_codes[i].pe_event == pe) { - config = ppc_event_codes[i].pe_code; - counter = ppc_event_codes[i].pe_flags; - break; - } - } - if (i == ppc_event_codes_size) - return (EINVAL); - - if ((counter & (1 << ri)) == 0) - return (EINVAL); - - if (caps & PMC_CAP_SYSTEM) - config |= POWERPC_PMC_KERNEL_ENABLE; - if (caps & PMC_CAP_USER) - config |= POWERPC_PMC_USER_ENABLE; - if ((caps & (PMC_CAP_USER | PMC_CAP_SYSTEM)) == 0) - config |= POWERPC_PMC_ENABLE; - - pm->pm_md.pm_powerpc.pm_powerpc_evsel = config; - - PMCDBG3(MDP,ALL,1,"powerpc-allocate cpu=%d ri=%d -> config=0x%x", - cpu, ri, config); - return (0); -} - -int -powerpc_release_pmc(int cpu, int ri, struct pmc *pmc) -{ - struct pmc_hw *phw; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < ppc_max_pmcs, - ("[powerpc,%d] illegal row-index %d", __LINE__, ri)); - - phw = &powerpc_pcpu[cpu]->pc_ppcpmcs[ri]; - KASSERT(phw->phw_pmc == NULL, - ("[powerpc,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc)); - - return (0); -} - -int -powerpc_start_pmc(int cpu, int ri, struct pmc *pm) -{ - - PMCDBG2(MDP,STA,1,"powerpc-start cpu=%d ri=%d", cpu, ri); - powerpc_set_pmc(cpu, ri, pm->pm_md.pm_powerpc.pm_powerpc_evsel); - - return (0); -} - -int -powerpc_stop_pmc(int cpu, int ri, struct pmc *pm __unused) -{ - PMCDBG2(MDP,STO,1, "powerpc-stop cpu=%d ri=%d", cpu, ri); - powerpc_set_pmc(cpu, ri, PMCN_NONE); - return (0); -} - -int -powerpc_config_pmc(int cpu, int ri, struct pmc *pm) -{ - struct pmc_hw *phw; - - PMCDBG3(MDP,CFG,1, "powerpc-config cpu=%d ri=%d pm=%p", cpu, ri, pm); - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < ppc_max_pmcs, - ("[powerpc,%d] illegal row-index %d", __LINE__, ri)); - - phw = &powerpc_pcpu[cpu]->pc_ppcpmcs[ri]; - - KASSERT(pm == NULL || phw->phw_pmc == NULL, - ("[powerpc,%d] pm=%p phw->pm=%p hwpmc not unconfigured", - __LINE__, pm, phw->phw_pmc)); - - phw->phw_pmc = pm; - - return (0); -} - -pmc_value_t -powerpc_pmcn_read_default(unsigned int pmc) -{ - pmc_value_t val; - - if (pmc > ppc_max_pmcs) - panic("Invalid PMC number: %d\n", pmc); - - switch (pmc) { - case 0: - val = mfspr(SPR_PMC1); - break; - case 1: - val = mfspr(SPR_PMC2); - break; - case 2: - val = mfspr(SPR_PMC3); - break; - case 3: - val = mfspr(SPR_PMC4); - break; - case 4: - val = mfspr(SPR_PMC5); - break; - case 5: - val = mfspr(SPR_PMC6); - break; - case 6: - val = mfspr(SPR_PMC7); - break; - case 7: - val = mfspr(SPR_PMC8); - break; - } - - return (val); -} - -void -powerpc_pmcn_write_default(unsigned int pmc, uint32_t val) -{ - if (pmc > ppc_max_pmcs) - panic("Invalid PMC number: %d\n", pmc); - - switch (pmc) { - case 0: - mtspr(SPR_PMC1, val); - break; - case 1: - mtspr(SPR_PMC2, val); - break; - case 2: - mtspr(SPR_PMC3, val); - break; - case 3: - mtspr(SPR_PMC4, val); - break; - case 4: - mtspr(SPR_PMC5, val); - break; - case 5: - mtspr(SPR_PMC6, val); - break; - case 6: - mtspr(SPR_PMC7, val); - break; - case 7: - mtspr(SPR_PMC8, val); - break; - } -} - -int -powerpc_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v) -{ - pmc_value_t p, r, tmp; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < ppc_max_pmcs, - ("[powerpc,%d] illegal row index %d", __LINE__, ri)); - - /* - * After an interrupt occurs because of a PMC overflow, the PMC value - * is not always MAX_PMC_VALUE + 1, but may be a little above it. - * This may mess up calculations and frustrate machine independent - * layer expectations, such as that no value read should be greater - * than reload count in sampling mode. - * To avoid these issues, use MAX_PMC_VALUE as an upper limit. - */ - p = MIN(powerpc_pmcn_read(ri), POWERPC_MAX_PMC_VALUE); - r = pm->pm_sc.pm_reloadcount; - - if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) { - /* - * Special case 1: r is too big - * This usually happens when a PMC write fails, the PMC is - * stopped and then it is read. - * - * Special case 2: PMC was reseted or has a value - * that should not be possible with current r. - * - * In the above cases, just return 0 instead of an arbitrary - * value. - */ - if (r > POWERPC_MAX_PMC_VALUE || p + r <= POWERPC_MAX_PMC_VALUE) - tmp = 0; - else - tmp = POWERPC_PERFCTR_VALUE_TO_RELOAD_COUNT(p); - } else - tmp = p + (POWERPC_MAX_PMC_VALUE + 1) * PPC_OVERFLOWCNT(pm); - - PMCDBG5(MDP,REA,1,"ppc-read cpu=%d ri=%d -> %jx (%jx,%jx)", - cpu, ri, (uintmax_t)tmp, (uintmax_t)PPC_OVERFLOWCNT(pm), - (uintmax_t)p); - *v = tmp; - return (0); -} - -int -powerpc_write_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t v) -{ - pmc_value_t vlo; - - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[powerpc,%d] illegal CPU value %d", __LINE__, cpu)); - KASSERT(ri >= 0 && ri < ppc_max_pmcs, - ("[powerpc,%d] illegal row-index %d", __LINE__, ri)); - - if (PMC_IS_COUNTING_MODE(PMC_TO_MODE(pm))) { - PPC_OVERFLOWCNT(pm) = v / (POWERPC_MAX_PMC_VALUE + 1); - vlo = v % (POWERPC_MAX_PMC_VALUE + 1); - } else if (v > POWERPC_MAX_PMC_VALUE) { - PMCDBG3(MDP,WRI,2, - "powerpc-write cpu=%d ri=%d: PMC value is too big: %jx", - cpu, ri, (uintmax_t)v); - return (EINVAL); - } else - vlo = POWERPC_RELOAD_COUNT_TO_PERFCTR_VALUE(v); - - PMCDBG5(MDP,WRI,1,"powerpc-write cpu=%d ri=%d -> %jx (%jx,%jx)", - cpu, ri, (uintmax_t)v, (uintmax_t)PPC_OVERFLOWCNT(pm), - (uintmax_t)vlo); - - powerpc_pmcn_write(ri, vlo); - return (0); -} - -int -powerpc_pmc_intr(struct trapframe *tf) -{ - struct pmc *pm; - struct powerpc_cpu *pc; - int cpu, error, i, retval; - - cpu = curcpu; - KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), - ("[powerpc,%d] out of range CPU %d", __LINE__, cpu)); - - PMCDBG3(MDP,INT,1, "cpu=%d tf=%p um=%d", cpu, (void *) tf, - TRAPF_USERMODE(tf)); - - retval = 0; - pc = powerpc_pcpu[cpu]; - - /* - * Look for a running, sampling PMC which has overflowed - * and which has a valid 'struct pmc' association. - */ - for (i = 0; i < ppc_max_pmcs; i++) { - if (!POWERPC_PMC_HAS_OVERFLOWED(i)) - continue; - retval = 1; /* Found an interrupting PMC. */ - - /* - * Always clear the PMC, to make it stop interrupting. - * If pm is available and in sampling mode, use reload - * count, to make PMC read after stop correct. - * Otherwise, just reset the PMC. - */ - if ((pm = pc->pc_ppcpmcs[i].phw_pmc) != NULL && - PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) { - if (pm->pm_state != PMC_STATE_RUNNING) { - powerpc_write_pmc(cpu, i, pm, - pm->pm_sc.pm_reloadcount); - continue; - } - } else { - if (pm != NULL) { /* !PMC_IS_SAMPLING_MODE */ - PPC_OVERFLOWCNT(pm) = (PPC_OVERFLOWCNT(pm) + - 1) % PPC_OVERFLOWCNT_MAX; - PMCDBG3(MDP,INT,2, - "cpu=%d ri=%d: overflowcnt=%d", - cpu, i, PPC_OVERFLOWCNT(pm)); - } - - powerpc_pmcn_write(i, 0); - continue; - } - - error = pmc_process_interrupt(PMC_HR, pm, tf); - if (error != 0) { - PMCDBG3(MDP,INT,3, - "cpu=%d ri=%d: error %d processing interrupt", - cpu, i, error); - powerpc_stop_pmc(cpu, i, pm); - } - - /* Reload sampling count */ - powerpc_write_pmc(cpu, i, pm, pm->pm_sc.pm_reloadcount); - } - - if (retval) - counter_u64_add(pmc_stats.pm_intr_processed, 1); - else - counter_u64_add(pmc_stats.pm_intr_ignored, 1); - - /* - * Re-enable PERF exceptions if we were able to find the interrupt - * source and handle it. Otherwise, it's better to disable PERF - * interrupts, to avoid the risk of processing the same interrupt - * forever. - */ - powerpc_resume_pmc(retval != 0); - if (retval == 0) - log(LOG_WARNING, - "pmc_intr: couldn't find interrupting PMC on cpu %d - " - "disabling PERF interrupts\n", cpu); - - return (retval); -} - -struct pmc_mdep * -pmc_md_initialize(void) -{ - struct pmc_mdep *pmc_mdep; - int error; - uint16_t vers; - - /* - * Allocate space for pointers to PMC HW descriptors and for - * the MDEP structure used by MI code. - */ - powerpc_pcpu = malloc(sizeof(struct powerpc_cpu *) * pmc_cpu_max(), M_PMC, - M_WAITOK|M_ZERO); - - /* Just one class */ - pmc_mdep = pmc_mdep_alloc(1); - - vers = mfpvr() >> 16; - - switch (vers) { - case MPC7447A: - case MPC7448: - case MPC7450: - case MPC7455: - case MPC7457: - error = pmc_mpc7xxx_initialize(pmc_mdep); - break; - case IBM970: - case IBM970FX: - case IBM970MP: - error = pmc_ppc970_initialize(pmc_mdep); - break; - case IBMPOWER8E: - case IBMPOWER8NVL: - case IBMPOWER8: - case IBMPOWER9: - error = pmc_power8_initialize(pmc_mdep); - break; - case FSL_E500v1: - case FSL_E500v2: - case FSL_E500mc: - case FSL_E5500: - error = pmc_e500_initialize(pmc_mdep); - break; - default: - error = -1; - break; - } - - if (error != 0) { - pmc_mdep_free(pmc_mdep); - pmc_mdep = NULL; - } - - return (pmc_mdep); -} - -void -pmc_md_finalize(struct pmc_mdep *md) -{ - - free(powerpc_pcpu, M_PMC); - powerpc_pcpu = NULL; -} - -int -pmc_save_user_callchain(uintptr_t *cc, int maxsamples, - struct trapframe *tf) -{ - uintptr_t *osp, *sp; - int frames = 0; - - cc[frames++] = PMC_TRAPFRAME_TO_PC(tf); - sp = (uintptr_t *)PMC_TRAPFRAME_TO_FP(tf); - osp = NULL; - - for (; frames < maxsamples; frames++) { - if (sp <= osp) - break; - osp = sp; -#ifdef __powerpc64__ - /* Check if 32-bit mode. */ - if (!(tf->srr1 & PSL_SF)) { - cc[frames] = fuword32((uint32_t *)sp + 1); - sp = (uintptr_t *)(uintptr_t)fuword32(sp); - } else { - cc[frames] = fuword(sp + 2); - sp = (uintptr_t *)fuword(sp); - } -#else - cc[frames] = fuword32((uint32_t *)sp + 1); - sp = (uintptr_t *)fuword32(sp); -#endif - } - - return (frames); -} diff --git a/sys/dev/hwpmc/hwpmc_powerpc.h b/sys/dev/hwpmc/hwpmc_powerpc.h deleted file mode 100644 index 2a4ca356ddf..00000000000 --- a/sys/dev/hwpmc/hwpmc_powerpc.h +++ /dev/null @@ -1,113 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2013 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _DEV_HWPMC_POWERPC_H_ -#define _DEV_HWPMC_POWERPC_H_ 1 - -#ifdef _KERNEL - -#define POWERPC_PMC_CAPS (PMC_CAP_INTERRUPT | PMC_CAP_USER | \ - PMC_CAP_SYSTEM | PMC_CAP_EDGE | \ - PMC_CAP_THRESHOLD | PMC_CAP_READ | \ - PMC_CAP_WRITE | PMC_CAP_INVERT | \ - PMC_CAP_QUALIFIER) - -#define POWERPC_PMC_KERNEL_ENABLE (0x1 << 30) -#define POWERPC_PMC_USER_ENABLE (0x1 << 31) - -#define POWERPC_PMC_ENABLE (POWERPC_PMC_KERNEL_ENABLE | POWERPC_PMC_USER_ENABLE) -#define POWERPC_RELOAD_COUNT_TO_PERFCTR_VALUE(V) (0x80000000-(V)) -#define POWERPC_PERFCTR_VALUE_TO_RELOAD_COUNT(P) (0x80000000-(P)) - -#define POWERPC_MAX_PMC_VALUE 0x7fffffffUL - -#define POWERPC_PMC_HAS_OVERFLOWED(n) (powerpc_pmcn_read(n) & (0x1 << 31)) - -/* - * PMC value is used with OVERFLOWCNT to simulate a 64-bit counter to the - * machine independent part of hwpmc. - */ -#define PPC_OVERFLOWCNT(pm) (pm)->pm_md.pm_powerpc.pm_powerpc_overflowcnt -#define PPC_OVERFLOWCNT_MAX 0x200000000UL - -struct powerpc_cpu { - enum pmc_class pc_class; - struct pmc_hw pc_ppcpmcs[]; -}; - -struct pmc_ppc_event { - enum pmc_event pe_event; - uint32_t pe_flags; -#define PMC_FLAG_PMC1 0x01 -#define PMC_FLAG_PMC2 0x02 -#define PMC_FLAG_PMC3 0x04 -#define PMC_FLAG_PMC4 0x08 -#define PMC_FLAG_PMC5 0x10 -#define PMC_FLAG_PMC6 0x20 -#define PMC_FLAG_PMC7 0x40 -#define PMC_FLAG_PMC8 0x80 - uint32_t pe_code; -}; - -extern struct powerpc_cpu **powerpc_pcpu; -extern struct pmc_ppc_event *ppc_event_codes; -extern size_t ppc_event_codes_size; -extern int ppc_event_first; -extern int ppc_event_last; -extern int ppc_max_pmcs; -extern enum pmc_class ppc_class; - -extern void (*powerpc_set_pmc)(int cpu, int ri, int config); -extern pmc_value_t (*powerpc_pmcn_read)(unsigned int pmc); -extern void (*powerpc_pmcn_write)(unsigned int pmc, uint32_t val); -extern void (*powerpc_resume_pmc)(bool ie); - -int pmc_e500_initialize(struct pmc_mdep *pmc_mdep); -int pmc_mpc7xxx_initialize(struct pmc_mdep *pmc_mdep); -int pmc_ppc970_initialize(struct pmc_mdep *pmc_mdep); -int pmc_power8_initialize(struct pmc_mdep *pmc_mdep); - -int powerpc_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc); -int powerpc_get_config(int cpu, int ri, struct pmc **ppm); -int powerpc_pcpu_init(struct pmc_mdep *md, int cpu); -int powerpc_pcpu_fini(struct pmc_mdep *md, int cpu); -int powerpc_allocate_pmc(int cpu, int ri, struct pmc *pm, - const struct pmc_op_pmcallocate *a); -int powerpc_release_pmc(int cpu, int ri, struct pmc *pmc); -int powerpc_start_pmc(int cpu, int ri, struct pmc *pm); -int powerpc_stop_pmc(int cpu, int ri, struct pmc *pm); -int powerpc_config_pmc(int cpu, int ri, struct pmc *pm); -pmc_value_t powerpc_pmcn_read_default(unsigned int pmc); -void powerpc_pmcn_write_default(unsigned int pmc, uint32_t val); -int powerpc_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v); -int powerpc_write_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t v); -int powerpc_pmc_intr(struct trapframe *tf); - -#endif /* _KERNEL */ - -#endif /* _DEV_HWPMC_POWERPC_H_ */ diff --git a/sys/dev/hwpmc/hwpmc_ppc970.c b/sys/dev/hwpmc/hwpmc_ppc970.c deleted file mode 100644 index 5697e8aead5..00000000000 --- a/sys/dev/hwpmc/hwpmc_ppc970.c +++ /dev/null @@ -1,389 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2013 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "hwpmc_powerpc.h" - -#define PPC970_MAX_PMCS 8 -#define PMC_PPC970_FLAG_PMCS 0x000000ff - -/* MMCR0, PMC1 is 8 bytes in, PMC2 is 1 byte in. */ -#define PPC970_SET_MMCR0_PMCSEL(r, x, i) \ - ((r & ~(0x1f << (7 * (1 - i) + 1))) | (x << (7 * (1 - i) + 1))) -/* MMCR1 has 6 PMC*SEL items (PMC3->PMC8), in sequence. */ -#define PPC970_SET_MMCR1_PMCSEL(r, x, i) \ - ((r & ~(0x1f << (5 * (7 - i) + 2))) | (x << (5 * (7 - i) + 2))) - -/* How PMC works on PPC970: - * - * Any PMC can count a direct event. Indirect events are handled specially. - * Direct events: As published. - * - * Encoding 00 000 -- Add byte lane bit counters - * MMCR1[24:31] -- select bit matching PMC being an adder. - * Bus events: - * PMCxSEL: 1x -- select from byte lane: 10 == lower lane (0/1), 11 == upper - * lane (2/3). - * PMCxSEL[2:4] -- bit in the byte lane selected. - * - * PMC[1,2,5,6] == lane 0/lane 2 - * PMC[3,4,7,8] == lane 1,3 - * - * - * Lanes: - * Lane 0 -- TTM0(FPU,ISU,IFU,VPU) - * TTM1(IDU,ISU,STS) - * LSU0 byte 0 - * LSU1 byte 0 - * Lane 1 -- TTM0 - * TTM1 - * LSU0 byte 1 - * LSU1 byte 1 - * Lane 2 -- TTM0 - * TTM1 - * LSU0 byte 2 - * LSU1 byte 2 or byte 6 - * Lane 3 -- TTM0 - * TTM1 - * LSU0 byte 3 - * LSU1 byte 3 or byte 7 - * - * Adders: - * Add byte lane for PMC (above), bit 0+4, 1+5, 2+6, 3+7 - */ - -static struct pmc_ppc_event ppc970_event_codes[] = { - {PMC_EV_PPC970_INSTR_COMPLETED, - .pe_flags = PMC_PPC970_FLAG_PMCS, - .pe_code = 0x09 - }, - {PMC_EV_PPC970_MARKED_GROUP_DISPATCH, - .pe_flags = PMC_FLAG_PMC1, - .pe_code = 0x2 - }, - {PMC_EV_PPC970_MARKED_STORE_COMPLETED, - .pe_flags = PMC_FLAG_PMC1, - .pe_code = 0x03 - }, - {PMC_EV_PPC970_GCT_EMPTY, - .pe_flags = PMC_FLAG_PMC1, - .pe_code = 0x04 - }, - {PMC_EV_PPC970_RUN_CYCLES, - .pe_flags = PMC_FLAG_PMC1, - .pe_code = 0x05 - }, - {PMC_EV_PPC970_OVERFLOW, - .pe_flags = PMC_PPC970_FLAG_PMCS, - .pe_code = 0x0a - }, - {PMC_EV_PPC970_CYCLES, - .pe_flags = PMC_PPC970_FLAG_PMCS, - .pe_code = 0x0f - }, - {PMC_EV_PPC970_THRESHOLD_TIMEOUT, - .pe_flags = PMC_FLAG_PMC2, - .pe_code = 0x3 - }, - {PMC_EV_PPC970_GROUP_DISPATCH, - .pe_flags = PMC_FLAG_PMC2, - .pe_code = 0x4 - }, - {PMC_EV_PPC970_BR_MARKED_INSTR_FINISH, - .pe_flags = PMC_FLAG_PMC2, - .pe_code = 0x5 - }, - {PMC_EV_PPC970_GCT_EMPTY_BY_SRQ_FULL, - .pe_flags = PMC_FLAG_PMC2, - .pe_code = 0xb - }, - {PMC_EV_PPC970_STOP_COMPLETION, - .pe_flags = PMC_FLAG_PMC3, - .pe_code = 0x1 - }, - {PMC_EV_PPC970_LSU_EMPTY, - .pe_flags = PMC_FLAG_PMC3, - .pe_code = 0x2 - }, - {PMC_EV_PPC970_MARKED_STORE_WITH_INTR, - .pe_flags = PMC_FLAG_PMC3, - .pe_code = 0x3 - }, - {PMC_EV_PPC970_CYCLES_IN_SUPER, - .pe_flags = PMC_FLAG_PMC3, - .pe_code = 0x4 - }, - {PMC_EV_PPC970_VPU_MARKED_INSTR_COMPLETED, - .pe_flags = PMC_FLAG_PMC3, - .pe_code = 0x5 - }, - {PMC_EV_PPC970_FXU0_IDLE_FXU1_BUSY, - .pe_flags = PMC_FLAG_PMC4, - .pe_code = 0x2 - }, - {PMC_EV_PPC970_SRQ_EMPTY, - .pe_flags = PMC_FLAG_PMC4, - .pe_code = 0x3 - }, - {PMC_EV_PPC970_MARKED_GROUP_COMPLETED, - .pe_flags = PMC_FLAG_PMC4, - .pe_code = 0x4 - }, - {PMC_EV_PPC970_CR_MARKED_INSTR_FINISH, - .pe_flags = PMC_FLAG_PMC4, - .pe_code = 0x5 - }, - {PMC_EV_PPC970_DISPATCH_SUCCESS, - .pe_flags = PMC_FLAG_PMC5, - .pe_code = 0x1 - }, - {PMC_EV_PPC970_FXU0_IDLE_FXU1_IDLE, - .pe_flags = PMC_FLAG_PMC5, - .pe_code = 0x2 - }, - {PMC_EV_PPC970_ONE_PLUS_INSTR_COMPLETED, - .pe_flags = PMC_FLAG_PMC5, - .pe_code = 0x3 - }, - {PMC_EV_PPC970_GROUP_MARKED_IDU, - .pe_flags = PMC_FLAG_PMC5, - .pe_code = 0x4 - }, - {PMC_EV_PPC970_MARKED_GROUP_COMPLETE_TIMEOUT, - .pe_flags = PMC_FLAG_PMC5, - .pe_code = 0x5 - }, - {PMC_EV_PPC970_FXU0_BUSY_FXU1_BUSY, - .pe_flags = PMC_FLAG_PMC6, - .pe_code = 0x2 - }, - {PMC_EV_PPC970_MARKED_STORE_SENT_TO_STS, - .pe_flags = PMC_FLAG_PMC6, - .pe_code = 0x3 - }, - {PMC_EV_PPC970_FXU_MARKED_INSTR_FINISHED, - .pe_flags = PMC_FLAG_PMC6, - .pe_code = 0x4 - }, - {PMC_EV_PPC970_MARKED_GROUP_ISSUED, - .pe_flags = PMC_FLAG_PMC6, - .pe_code = 0x5 - }, - {PMC_EV_PPC970_FXU0_BUSY_FXU1_IDLE, - .pe_flags = PMC_FLAG_PMC7, - .pe_code = 0x2 - }, - {PMC_EV_PPC970_GROUP_COMPLETED, - .pe_flags = PMC_FLAG_PMC7, - .pe_code = 0x3 - }, - {PMC_EV_PPC970_FPU_MARKED_INSTR_COMPLETED, - .pe_flags = PMC_FLAG_PMC7, - .pe_code = 0x4 - }, - {PMC_EV_PPC970_MARKED_INSTR_FINISH_ANY_UNIT, - .pe_flags = PMC_FLAG_PMC7, - .pe_code = 0x5 - }, - {PMC_EV_PPC970_EXTERNAL_INTERRUPT, - .pe_flags = PMC_FLAG_PMC8, - .pe_code = 0x2 - }, - {PMC_EV_PPC970_GROUP_DISPATCH_REJECT, - .pe_flags = PMC_FLAG_PMC8, - .pe_code = 0x3 - }, - {PMC_EV_PPC970_LSU_MARKED_INSTR_FINISH, - .pe_flags = PMC_FLAG_PMC8, - .pe_code = 0x4 - }, - {PMC_EV_PPC970_TIMEBASE_EVENT, - .pe_flags = PMC_FLAG_PMC8, - .pe_code = 0x5 - }, -#if 0 - {PMC_EV_PPC970_LSU_COMPLETION_STALL, }, - {PMC_EV_PPC970_FXU_COMPLETION_STALL, }, - {PMC_EV_PPC970_DCACHE_MISS_COMPLETION_STALL, }, - {PMC_EV_PPC970_FPU_COMPLETION_STALL, }, - {PMC_EV_PPC970_FXU_LONG_INSTR_COMPLETION_STALL, }, - {PMC_EV_PPC970_REJECT_COMPLETION_STALL, }, - {PMC_EV_PPC970_FPU_LONG_INSTR_COMPLETION_STALL, }, - {PMC_EV_PPC970_GCT_EMPTY_BY_ICACHE_MISS, }, - {PMC_EV_PPC970_REJECT_COMPLETION_STALL_ERAT_MISS, }, - {PMC_EV_PPC970_GCT_EMPTY_BY_BRANCH_MISS_PREDICT, }, -#endif -}; -static size_t ppc970_event_codes_size = nitems(ppc970_event_codes); - -static void -ppc970_set_pmc(int cpu, int ri, int config) -{ - struct pmc *pm; - struct pmc_hw *phw; - register_t pmc_mmcr; - int config_mask; - - phw = &powerpc_pcpu[cpu]->pc_ppcpmcs[ri]; - pm = phw->phw_pmc; - - if (config == PMCN_NONE) - config = PMC970N_NONE; - - /* - * The mask is inverted (enable is 1) compared to the flags in MMCR0, - * which are Freeze flags. - */ - config_mask = ~config & POWERPC_PMC_ENABLE; - config &= ~POWERPC_PMC_ENABLE; - - /* - * Disable the PMCs. - */ - switch (ri) { - case 0: - case 1: - pmc_mmcr = mfspr(SPR_MMCR0); - pmc_mmcr = PPC970_SET_MMCR0_PMCSEL(pmc_mmcr, config, ri); - mtspr(SPR_MMCR0, pmc_mmcr); - break; - case 2: - case 3: - case 4: - case 5: - case 6: - case 7: - pmc_mmcr = mfspr(SPR_MMCR1); - pmc_mmcr = PPC970_SET_MMCR1_PMCSEL(pmc_mmcr, config, ri); - mtspr(SPR_MMCR1, pmc_mmcr); - break; - } - - if (config != PMC970N_NONE) { - pmc_mmcr = mfspr(SPR_MMCR0); - pmc_mmcr &= ~SPR_MMCR0_FC; - pmc_mmcr |= config_mask; - mtspr(SPR_MMCR0, pmc_mmcr); - } -} - -static int -ppc970_pcpu_init(struct pmc_mdep *md, int cpu) -{ - powerpc_pcpu_init(md, cpu); - - /* Clear the MMCRs, and set FC, to disable all PMCs. */ - /* 970 PMC is not counted when set to 0x08 */ - mtspr(SPR_MMCR0, SPR_MMCR0_FC | SPR_MMCR0_PMXE | - SPR_MMCR0_FCECE | SPR_MMCR0_PMC1CE | SPR_MMCR0_PMCNCE | - SPR_MMCR0_PMC1SEL(0x8) | SPR_MMCR0_PMC2SEL(0x8)); - mtspr(SPR_MMCR1, 0x4218420); - - return (0); -} - -static int -ppc970_pcpu_fini(struct pmc_mdep *md, int cpu) -{ - register_t mmcr0; - - /* Freeze counters, disable interrupts */ - mmcr0 = mfspr(SPR_MMCR0); - mmcr0 &= ~SPR_MMCR0_PMXE; - mmcr0 |= SPR_MMCR0_FC; - mtspr(SPR_MMCR0, mmcr0); - - return (powerpc_pcpu_fini(md, cpu)); -} - -static void -ppc970_resume_pmc(bool ie) -{ - register_t mmcr0; - - /* Unfreeze counters and re-enable PERF exceptions if requested. */ - mmcr0 = mfspr(SPR_MMCR0); - mmcr0 &= ~(SPR_MMCR0_FC | SPR_MMCR0_PMXE); - if (ie) - mmcr0 |= SPR_MMCR0_PMXE; - mtspr(SPR_MMCR0, mmcr0); -} - -int -pmc_ppc970_initialize(struct pmc_mdep *pmc_mdep) -{ - struct pmc_classdep *pcd; - - pmc_mdep->pmd_cputype = PMC_CPU_PPC_970; - - pcd = &pmc_mdep->pmd_classdep[PMC_MDEP_CLASS_INDEX_POWERPC]; - pcd->pcd_caps = POWERPC_PMC_CAPS; - pcd->pcd_class = PMC_CLASS_PPC970; - pcd->pcd_num = PPC970_MAX_PMCS; - pcd->pcd_ri = pmc_mdep->pmd_npmc; - pcd->pcd_width = 32; - - pcd->pcd_allocate_pmc = powerpc_allocate_pmc; - pcd->pcd_config_pmc = powerpc_config_pmc; - pcd->pcd_pcpu_fini = ppc970_pcpu_fini; - pcd->pcd_pcpu_init = ppc970_pcpu_init; - pcd->pcd_describe = powerpc_describe; - pcd->pcd_get_config = powerpc_get_config; - pcd->pcd_read_pmc = powerpc_read_pmc; - pcd->pcd_release_pmc = powerpc_release_pmc; - pcd->pcd_start_pmc = powerpc_start_pmc; - pcd->pcd_stop_pmc = powerpc_stop_pmc; - pcd->pcd_write_pmc = powerpc_write_pmc; - - pmc_mdep->pmd_npmc += PPC970_MAX_PMCS; - pmc_mdep->pmd_intr = powerpc_pmc_intr; - - ppc_event_codes = ppc970_event_codes; - ppc_event_codes_size = ppc970_event_codes_size; - ppc_event_first = PMC_EV_PPC970_FIRST; - ppc_event_last = PMC_EV_PPC970_LAST; - ppc_max_pmcs = PPC970_MAX_PMCS; - ppc_class = pcd->pcd_class; - - powerpc_set_pmc = ppc970_set_pmc; - powerpc_pmcn_read = powerpc_pmcn_read_default; - powerpc_pmcn_write = powerpc_pmcn_write_default; - powerpc_resume_pmc = ppc970_resume_pmc; - - return (0); -} diff --git a/sys/dev/ipmi/ipmi_opal.c b/sys/dev/ipmi/ipmi_opal.c deleted file mode 100644 index 2cc58fe2c46..00000000000 --- a/sys/dev/ipmi/ipmi_opal.c +++ /dev/null @@ -1,328 +0,0 @@ -/*- - * Copyright (C) 2018 Justin Hibbits - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include - -#include -#include - -#include - -/* - * OPAL_IPMI_DEBUG - * - * 0 - disabled - * 1 - enable error messages (EPRINTF) - * 2 - enable error and debug messages (DPRINTF) - */ -#define OPAL_IPMI_DEBUG 0 -#if OPAL_IPMI_DEBUG >= 2 -/* debug printf */ -#define DPRINTF(fmt, ...) printf("ipmi: " fmt "\n", ## __VA_ARGS__) -#else -#define DPRINTF(fmt, ...) ((void)0) -#endif -#if OPAL_IPMI_DEBUG >= 1 -/* error printf: to print messages only when something fails */ -#define EPRINTF(fmt, ...) printf("ipmi: " fmt "\n", ## __VA_ARGS__) -#else -#define EPRINTF(fmt, ...) ((void)0) -#endif - -struct opal_ipmi_softc { - struct ipmi_softc ipmi; - uint64_t sc_interface; - int sc_timedout; - struct opal_ipmi_msg *sc_msg; /* Protected by IPMI lock */ -}; - -static MALLOC_DEFINE(M_IPMI, "ipmi", "OPAL IPMI"); - -static int -opal_ipmi_recv(struct opal_ipmi_softc *sc, uint64_t *msg_len, int timo) -{ - int err; - - if (timo == 0) - timo = MAX_TIMEOUT; - timo *= 10; /* Timeout is in milliseconds, we delay in 100us */ - - for (;;) { - *msg_len = sizeof(struct opal_ipmi_msg) + IPMI_MAX_RX; - /* Crank the OPAL state machine while we poll for a reply. */ - opal_call(OPAL_POLL_EVENTS, NULL); - err = opal_call(OPAL_IPMI_RECV, sc->sc_interface, - vtophys(sc->sc_msg), vtophys(msg_len)); - if (err != OPAL_EMPTY) - break; - - DELAY(100); - if (timo-- <= 0) { - sc->sc_timedout = 1; - break; - } - } - - if (err != OPAL_SUCCESS) - EPRINTF("RECV: error: %d", err); - - switch (err) { - case OPAL_SUCCESS: - DPRINTF("RECV: rv=%02x len=%ld", - sc->sc_msg->data[0], *msg_len); - return (0); - case OPAL_RESOURCE: - return (ENOMEM); - case OPAL_EMPTY: - return (EAGAIN); - default: - return (EIO); - } -} - -static void -opal_ipmi_discard_msgs(struct opal_ipmi_softc *sc) -{ - uint64_t msg_len; - int err, i = 0; - - /* OPAL_IPMI_RECV fails when msg version is not set. */ - sc->sc_msg->version = OPAL_IPMI_MSG_FORMAT_VERSION_1; - - /* Wait up to 100ms for the 1st timedout message. */ - err = opal_ipmi_recv(sc, &msg_len, 100); - while (err == 0) { - i++; - /* Wait only 10ms for the remaining messages. */ - err = opal_ipmi_recv(sc, &msg_len, 10); - } - if (i > 0) - EPRINTF("Discarded %d message(s)", i); - sc->sc_timedout = 0; -} - -static int -opal_ipmi_polled_request(struct opal_ipmi_softc *sc, struct ipmi_request *req, - int timo) -{ - uint64_t msg_len; - int err; - - /* - * Discard timed out messages before sending a new one, to avoid - * them being confused with the reply of the new message. - */ - if (sc->sc_timedout) - opal_ipmi_discard_msgs(sc); - - /* Construct and send the message. */ - sc->sc_msg->version = OPAL_IPMI_MSG_FORMAT_VERSION_1; - sc->sc_msg->netfn = req->ir_addr; - sc->sc_msg->cmd = req->ir_command; - - if (req->ir_requestlen > IPMI_MAX_RX) { - err = ENOMEM; - goto out; - } - memcpy(sc->sc_msg->data, req->ir_request, req->ir_requestlen); - - msg_len = sizeof(*sc->sc_msg) + req->ir_requestlen; - err = opal_call(OPAL_IPMI_SEND, sc->sc_interface, vtophys(sc->sc_msg), - msg_len); - - DPRINTF("SEND: cmd=%02x netfn=%02x len=%ld -> %d", - sc->sc_msg->cmd, sc->sc_msg->netfn, msg_len, err); - - if (err != OPAL_SUCCESS) - EPRINTF("SEND: error: %d", err); - - switch (err) { - case OPAL_SUCCESS: - break; - case OPAL_PARAMETER: - case OPAL_UNSUPPORTED: - err = EINVAL; - goto out; - case OPAL_RESOURCE: - err = ENOMEM; - goto out; - case OPAL_HARDWARE: - default: - err = EIO; - goto out; - } - - if ((err = opal_ipmi_recv(sc, &msg_len, timo)) == 0) { - /* Subtract one extra for the completion code. */ - req->ir_replylen = msg_len - sizeof(struct opal_ipmi_msg) - 1; - req->ir_replylen = min(req->ir_replylen, req->ir_replybuflen); - memcpy(req->ir_reply, &sc->sc_msg->data[1], req->ir_replylen); - req->ir_compcode = sc->sc_msg->data[0]; - } - -out: - return (err); -} - -static int -opal_ipmi_probe(device_t dev) -{ - if (!ofw_bus_is_compatible(dev, "ibm,opal-ipmi")) - return (ENXIO); - - device_set_desc(dev, "OPAL IPMI System Interface"); - - return (BUS_PROBE_DEFAULT); -} - -static void -opal_ipmi_loop(void *arg) -{ - struct opal_ipmi_softc *sc = arg; - struct ipmi_request *req; - int i, err; - - IPMI_LOCK(&sc->ipmi); - while ((req = ipmi_dequeue_request(&sc->ipmi)) != NULL) { - IPMI_UNLOCK(&sc->ipmi); - err = EIO; - for (i = 0; i < 3 && err != 0; i++) { - IPMI_IO_LOCK(&sc->ipmi); - err = opal_ipmi_polled_request(sc, req, MAX_TIMEOUT); - IPMI_IO_UNLOCK(&sc->ipmi); - } - req->ir_error = err == 0 ? 0 : EIO; - IPMI_LOCK(&sc->ipmi); - ipmi_complete_request(&sc->ipmi, req); - } - IPMI_UNLOCK(&sc->ipmi); - kproc_exit(0); -} - -static int -opal_ipmi_startup(struct ipmi_softc *sc) -{ - - return (kproc_create(opal_ipmi_loop, sc, &sc->ipmi_kthread, 0, 0, - "%s: opal", device_get_nameunit(sc->ipmi_dev))); -} - -static int -opal_ipmi_driver_request(struct ipmi_softc *isc, struct ipmi_request *req, - int timo) -{ - struct opal_ipmi_softc *sc = (struct opal_ipmi_softc *)isc; - int i, err; - - for (i = 0; i < 3; i++) { - IPMI_LOCK(&sc->ipmi); - err = opal_ipmi_polled_request(sc, req, timo); - IPMI_UNLOCK(&sc->ipmi); - if (err == 0) - break; - } - - req->ir_error = err; - - return (err); -} - -static int -opal_ipmi_attach(device_t dev) -{ - struct opal_ipmi_softc *sc; - pcell_t ifid; - - sc = device_get_softc(dev); - - if (OF_getencprop(ofw_bus_get_node(dev), "ibm,ipmi-interface-id", - &ifid, sizeof(ifid)) < 0) { - device_printf(dev, "Missing interface id\n"); - return (ENXIO); - } - sc->sc_interface = ifid; - sc->ipmi.ipmi_startup = opal_ipmi_startup; - sc->ipmi.ipmi_driver_request = opal_ipmi_driver_request; - sc->ipmi.ipmi_enqueue_request = ipmi_polled_enqueue_request; - sc->ipmi.ipmi_driver_requests_polled = 1; - sc->ipmi.ipmi_dev = dev; - - sc->sc_msg = malloc(sizeof(struct opal_ipmi_msg) + IPMI_MAX_RX, M_IPMI, - M_WAITOK | M_ZERO); - - /* Discard old messages that may have remained in receive queue. */ - opal_ipmi_discard_msgs(sc); - - return (ipmi_attach(dev)); -} - -static int -opal_ipmi_detach(device_t dev) -{ - struct opal_ipmi_softc *sc; - int err; - - sc = device_get_softc(dev); - err = ipmi_detach(dev); - if (err == 0) - free(sc->sc_msg, M_IPMI); - - return (err); -} - -static device_method_t opal_ipmi_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, opal_ipmi_probe), - DEVMETHOD(device_attach, opal_ipmi_attach), - DEVMETHOD(device_detach, opal_ipmi_detach), - DEVMETHOD_END -}; - -static driver_t opal_ipmi_driver = { - "ipmi", - opal_ipmi_methods, - sizeof(struct opal_ipmi_softc) -}; - -DRIVER_MODULE(opal_ipmi, opal, opal_ipmi_driver, ipmi_devclass, NULL, NULL); diff --git a/sys/dev/nvram2env/nvram2env_mips.c b/sys/dev/nvram2env/nvram2env_mips.c deleted file mode 100644 index 002dc61f3b7..00000000000 --- a/sys/dev/nvram2env/nvram2env_mips.c +++ /dev/null @@ -1,67 +0,0 @@ -/*- - * Copyright (c) 2010 Aleksandr Rybalko. - * Copyright (c) 2016 Michael Zhilin. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Implementation of pseudo driver for MIPS to copy the NVRAM settings - * from various sources into the kernel environment. - */ - -#include -#include -#include -#include -#include - -#include - -#include "nvram2env.h" - -static int -nvram2env_mips_probe(device_t dev) -{ - struct nvram2env_softc *sc; - - sc = device_get_softc(dev); - sc->bst = mips_bus_space_generic; - - return (nvram2env_probe(dev)); -} - -static device_method_t nvram2env_mips_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, nvram2env_mips_probe), - - DEVMETHOD_END -}; - -DEFINE_CLASS_1(nvram2env, nvram2env_mips_driver, nvram2env_mips_methods, - sizeof(struct nvram2env_softc), nvram2env_driver); -DRIVER_MODULE(nvram2env_mips, nexus, nvram2env_mips_driver, nvram2env_devclass, - NULL, NULL); - -MODULE_VERSION(nvram2env_mips, 1); -MODULE_DEPEND(nvram2env_mips, nvram2env, 1, 1, 1); diff --git a/sys/dev/powermac_nvram/powermac_nvram.c b/sys/dev/powermac_nvram/powermac_nvram.c deleted file mode 100644 index 89729260830..00000000000 --- a/sys/dev/powermac_nvram/powermac_nvram.c +++ /dev/null @@ -1,543 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Maxim Sobolev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include - -#include - -#include - -#include -#include - -/* - * Device interface. - */ -static int powermac_nvram_probe(device_t); -static int powermac_nvram_attach(device_t); -static int powermac_nvram_detach(device_t); - -/* Helper functions */ -static int powermac_nvram_check(void *data); -static int chrp_checksum(int sum, uint8_t *, uint8_t *); -static uint32_t adler_checksum(uint8_t *, int); -static int erase_bank(device_t, uint8_t *); -static int write_bank(device_t, uint8_t *, uint8_t *); - -/* - * Driver methods. - */ -static device_method_t powermac_nvram_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, powermac_nvram_probe), - DEVMETHOD(device_attach, powermac_nvram_attach), - DEVMETHOD(device_detach, powermac_nvram_detach), - { 0, 0 } -}; - -static driver_t powermac_nvram_driver = { - "powermac_nvram", - powermac_nvram_methods, - sizeof(struct powermac_nvram_softc) -}; - -static devclass_t powermac_nvram_devclass; - -DRIVER_MODULE(powermac_nvram, ofwbus, powermac_nvram_driver, powermac_nvram_devclass, 0, 0); - -/* - * Cdev methods. - */ - -static d_open_t powermac_nvram_open; -static d_close_t powermac_nvram_close; -static d_read_t powermac_nvram_read; -static d_write_t powermac_nvram_write; - -static struct cdevsw powermac_nvram_cdevsw = { - .d_version = D_VERSION, - .d_open = powermac_nvram_open, - .d_close = powermac_nvram_close, - .d_read = powermac_nvram_read, - .d_write = powermac_nvram_write, - .d_name = "powermac_nvram", -}; - -static int -powermac_nvram_probe(device_t dev) -{ - const char *type, *compatible; - - type = ofw_bus_get_type(dev); - compatible = ofw_bus_get_compat(dev); - - if (type == NULL || compatible == NULL) - return ENXIO; - - if (strcmp(type, "nvram") != 0) - return ENXIO; - if (strcmp(compatible, "amd-0137") != 0 && - !ofw_bus_is_compatible(dev, "nvram,flash")) - return ENXIO; - - device_set_desc(dev, "Apple NVRAM"); - return 0; -} - -static int -powermac_nvram_attach(device_t dev) -{ - struct powermac_nvram_softc *sc; - const char *compatible; - phandle_t node; - u_int32_t reg[3]; - int gen0, gen1, i; - - node = ofw_bus_get_node(dev); - sc = device_get_softc(dev); - - if ((i = OF_getprop(node, "reg", reg, sizeof(reg))) < 8) - return ENXIO; - - sc->sc_dev = dev; - sc->sc_node = node; - - compatible = ofw_bus_get_compat(dev); - if (strcmp(compatible, "amd-0137") == 0) - sc->sc_type = FLASH_TYPE_AMD; - else - sc->sc_type = FLASH_TYPE_SM; - - /* - * Find which byte of reg corresponds to the 32-bit physical address. - * We should probably read #address-cells from /chosen instead. - */ - i = (i/4) - 2; - - sc->sc_bank0 = (vm_offset_t)pmap_mapdev(reg[i], NVRAM_SIZE * 2); - sc->sc_bank1 = sc->sc_bank0 + NVRAM_SIZE; - - gen0 = powermac_nvram_check((void *)sc->sc_bank0); - gen1 = powermac_nvram_check((void *)sc->sc_bank1); - - if (gen0 == -1 && gen1 == -1) { - if ((void *)sc->sc_bank0 != NULL) - pmap_unmapdev(sc->sc_bank0, NVRAM_SIZE * 2); - device_printf(dev, "both banks appear to be corrupt\n"); - return ENXIO; - } - device_printf(dev, "bank0 generation %d, bank1 generation %d\n", - gen0, gen1); - - sc->sc_bank = (gen0 > gen1) ? sc->sc_bank0 : sc->sc_bank1; - bcopy((void *)sc->sc_bank, (void *)sc->sc_data, NVRAM_SIZE); - - sc->sc_cdev = make_dev(&powermac_nvram_cdevsw, 0, 0, 0, 0600, - "powermac_nvram"); - sc->sc_cdev->si_drv1 = sc; - - sx_init(&sc->sc_lock, "powermac_nvram"); - - return 0; -} - -static int -powermac_nvram_detach(device_t dev) -{ - struct powermac_nvram_softc *sc; - - sc = device_get_softc(dev); - - if ((void *)sc->sc_bank0 != NULL) - pmap_unmapdev(sc->sc_bank0, NVRAM_SIZE * 2); - - if (sc->sc_cdev != NULL) - destroy_dev(sc->sc_cdev); - - sx_destroy(&sc->sc_lock); - - return 0; -} - -static int -powermac_nvram_open(struct cdev *dev, int flags, int fmt, struct thread *td) -{ - struct powermac_nvram_softc *sc = dev->si_drv1; - int err; - - err = 0; - sx_xlock(&sc->sc_lock); - if (sc->sc_isopen) - err = EBUSY; - else - sc->sc_isopen = 1; - sc->sc_rpos = sc->sc_wpos = 0; - sx_xunlock(&sc->sc_lock); - - return (err); -} - -static int -powermac_nvram_close(struct cdev *dev, int fflag, int devtype, struct thread *td) -{ - struct powermac_nvram_softc *sc = dev->si_drv1; - struct core99_header *header; - vm_offset_t bank; - - sx_xlock(&sc->sc_lock); - if (sc->sc_wpos != sizeof(sc->sc_data)) { - /* Short write, restore in-memory copy */ - bcopy((void *)sc->sc_bank, (void *)sc->sc_data, NVRAM_SIZE); - sc->sc_isopen = 0; - sx_xunlock(&sc->sc_lock); - return 0; - } - - header = (struct core99_header *)sc->sc_data; - - header->generation = ((struct core99_header *)sc->sc_bank)->generation; - header->generation++; - header->chrp_header.signature = CORE99_SIGNATURE; - - header->adler_checksum = - adler_checksum((uint8_t *)&(header->generation), - NVRAM_SIZE - offsetof(struct core99_header, generation)); - header->chrp_header.chrp_checksum = chrp_checksum(header->chrp_header.signature, - (uint8_t *)&(header->chrp_header.length), - (uint8_t *)&(header->adler_checksum)); - - bank = (sc->sc_bank == sc->sc_bank0) ? sc->sc_bank1 : sc->sc_bank0; - if (erase_bank(sc->sc_dev, (uint8_t *)bank) != 0 || - write_bank(sc->sc_dev, (uint8_t *)bank, sc->sc_data) != 0) { - sc->sc_isopen = 0; - sx_xunlock(&sc->sc_lock); - return ENOSPC; - } - sc->sc_bank = bank; - sc->sc_isopen = 0; - sx_xunlock(&sc->sc_lock); - return 0; -} - -static int -powermac_nvram_read(struct cdev *dev, struct uio *uio, int ioflag) -{ - int rv, amnt, data_available; - struct powermac_nvram_softc *sc = dev->si_drv1; - - rv = 0; - - sx_xlock(&sc->sc_lock); - while (uio->uio_resid > 0) { - data_available = sizeof(sc->sc_data) - sc->sc_rpos; - if (data_available > 0) { - amnt = MIN(uio->uio_resid, data_available); - rv = uiomove((void *)(sc->sc_data + sc->sc_rpos), - amnt, uio); - if (rv != 0) - break; - sc->sc_rpos += amnt; - } else { - break; - } - } - sx_xunlock(&sc->sc_lock); - - return rv; -} - -static int -powermac_nvram_write(struct cdev *dev, struct uio *uio, int ioflag) -{ - int rv, amnt, data_available; - struct powermac_nvram_softc *sc = dev->si_drv1; - - if (sc->sc_wpos >= sizeof(sc->sc_data)) - return EINVAL; - - rv = 0; - - sx_xlock(&sc->sc_lock); - while (uio->uio_resid > 0) { - data_available = sizeof(sc->sc_data) - sc->sc_wpos; - if (data_available > 0) { - amnt = MIN(uio->uio_resid, data_available); - rv = uiomove((void *)(sc->sc_data + sc->sc_wpos), - amnt, uio); - if (rv != 0) - break; - sc->sc_wpos += amnt; - } else { - break; - } - } - sx_xunlock(&sc->sc_lock); - - return rv; -} - -static int -powermac_nvram_check(void *data) -{ - struct core99_header *header; - - header = (struct core99_header *)data; - - if (header->chrp_header.signature != CORE99_SIGNATURE) - return -1; - if (header->chrp_header.chrp_checksum != - chrp_checksum(header->chrp_header.signature, - (uint8_t *)&(header->chrp_header.length), - (uint8_t *)&(header->adler_checksum))) - return -1; - if (header->adler_checksum != - adler_checksum((uint8_t *)&(header->generation), - NVRAM_SIZE - offsetof(struct core99_header, generation))) - return -1; - return header->generation; -} - -static int -chrp_checksum(int sum, uint8_t *data, uint8_t *end) -{ - - for (; data < end; data++) - sum += data[0]; - while (sum > 0xff) - sum = (sum & 0xff) + (sum >> 8); - return sum; -} - -static uint32_t -adler_checksum(uint8_t *data, int len) -{ - uint32_t low, high; - int i; - - low = 1; - high = 0; - for (i = 0; i < len; i++) { - if ((i % 5000) == 0) { - low %= 65521UL; - high %= 65521UL; - } - low += data[i]; - high += low; - } - low %= 65521UL; - high %= 65521UL; - - return (high << 16) | low; -} - -#define OUTB_DELAY(a, v) outb(a, v); DELAY(1); - -static int -wait_operation_complete_amd(uint8_t *bank) -{ - int i; - - for (i = 1000000; i != 0; i--) - if ((inb(bank) ^ inb(bank)) == 0) - return 0; - return -1; -} - -static int -erase_bank_amd(device_t dev, uint8_t *bank) -{ - unsigned int i; - - /* Unlock 1 */ - OUTB_DELAY(bank + 0x555, 0xaa); - /* Unlock 2 */ - OUTB_DELAY(bank + 0x2aa, 0x55); - - /* Sector-Erase */ - OUTB_DELAY(bank + 0x555, 0x80); - OUTB_DELAY(bank + 0x555, 0xaa); - OUTB_DELAY(bank + 0x2aa, 0x55); - OUTB_DELAY(bank, 0x30); - - if (wait_operation_complete_amd(bank) != 0) { - device_printf(dev, "flash erase timeout\n"); - return -1; - } - - /* Reset */ - OUTB_DELAY(bank, 0xf0); - - for (i = 0; i < NVRAM_SIZE; i++) { - if (bank[i] != 0xff) { - device_printf(dev, "flash erase has failed\n"); - return -1; - } - } - return 0; -} - -static int -write_bank_amd(device_t dev, uint8_t *bank, uint8_t *data) -{ - unsigned int i; - - for (i = 0; i < NVRAM_SIZE; i++) { - /* Unlock 1 */ - OUTB_DELAY(bank + 0x555, 0xaa); - /* Unlock 2 */ - OUTB_DELAY(bank + 0x2aa, 0x55); - - /* Write single word */ - OUTB_DELAY(bank + 0x555, 0xa0); - OUTB_DELAY(bank + i, data[i]); - if (wait_operation_complete_amd(bank) != 0) { - device_printf(dev, "flash write timeout\n"); - return -1; - } - } - - /* Reset */ - OUTB_DELAY(bank, 0xf0); - - for (i = 0; i < NVRAM_SIZE; i++) { - if (bank[i] != data[i]) { - device_printf(dev, "flash write has failed\n"); - return -1; - } - } - return 0; -} - -static int -wait_operation_complete_sm(uint8_t *bank) -{ - int i; - - for (i = 1000000; i != 0; i--) { - outb(bank, SM_FLASH_CMD_READ_STATUS); - if (inb(bank) & SM_FLASH_STATUS_DONE) - return (0); - } - return (-1); -} - -static int -erase_bank_sm(device_t dev, uint8_t *bank) -{ - unsigned int i; - - outb(bank, SM_FLASH_CMD_ERASE_SETUP); - outb(bank, SM_FLASH_CMD_ERASE_CONFIRM); - - if (wait_operation_complete_sm(bank) != 0) { - device_printf(dev, "flash erase timeout\n"); - return (-1); - } - - outb(bank, SM_FLASH_CMD_CLEAR_STATUS); - outb(bank, SM_FLASH_CMD_RESET); - - for (i = 0; i < NVRAM_SIZE; i++) { - if (bank[i] != 0xff) { - device_printf(dev, "flash write has failed\n"); - return (-1); - } - } - return (0); -} - -static int -write_bank_sm(device_t dev, uint8_t *bank, uint8_t *data) -{ - unsigned int i; - - for (i = 0; i < NVRAM_SIZE; i++) { - OUTB_DELAY(bank + i, SM_FLASH_CMD_WRITE_SETUP); - outb(bank + i, data[i]); - if (wait_operation_complete_sm(bank) != 0) { - device_printf(dev, "flash write error/timeout\n"); - break; - } - } - - outb(bank, SM_FLASH_CMD_CLEAR_STATUS); - outb(bank, SM_FLASH_CMD_RESET); - - for (i = 0; i < NVRAM_SIZE; i++) { - if (bank[i] != data[i]) { - device_printf(dev, "flash write has failed\n"); - return (-1); - } - } - return (0); -} - -static int -erase_bank(device_t dev, uint8_t *bank) -{ - struct powermac_nvram_softc *sc; - - sc = device_get_softc(dev); - - sx_assert(&sc->sc_lock, SA_XLOCKED); - if (sc->sc_type == FLASH_TYPE_AMD) - return (erase_bank_amd(dev, bank)); - else - return (erase_bank_sm(dev, bank)); -} - -static int -write_bank(device_t dev, uint8_t *bank, uint8_t *data) -{ - struct powermac_nvram_softc *sc; - - sc = device_get_softc(dev); - - sx_assert(&sc->sc_lock, SA_XLOCKED); - if (sc->sc_type == FLASH_TYPE_AMD) - return (write_bank_amd(dev, bank, data)); - else - return (write_bank_sm(dev, bank, data)); -} diff --git a/sys/dev/powermac_nvram/powermac_nvramvar.h b/sys/dev/powermac_nvram/powermac_nvramvar.h deleted file mode 100644 index 77b1495e87b..00000000000 --- a/sys/dev/powermac_nvram/powermac_nvramvar.h +++ /dev/null @@ -1,82 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Maxim Sobolev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _POWERPC_POWERMAC_POWERMAC_NVRAMVAR_H_ -#define _POWERPC_POWERMAC_POWERMAC_NVRAMVAR_H_ - -#define NVRAM_SIZE 0x2000 - -#define CORE99_SIGNATURE 0x5a - -#define SM_FLASH_CMD_ERASE_CONFIRM 0xd0 -#define SM_FLASH_CMD_ERASE_SETUP 0x20 -#define SM_FLASH_CMD_RESET 0xff -#define SM_FLASH_CMD_WRITE_SETUP 0x40 -#define SM_FLASH_CMD_CLEAR_STATUS 0x50 -#define SM_FLASH_CMD_READ_STATUS 0x70 - -#define SM_FLASH_STATUS_DONE 0x80 -#define SM_FLASH_STATUS_ERR 0x38 - -#ifdef _KERNEL - -struct powermac_nvram_softc { - device_t sc_dev; - struct sx sc_lock; - phandle_t sc_node; - vm_offset_t sc_bank; - vm_offset_t sc_bank0; - vm_offset_t sc_bank1; - uint8_t sc_data[NVRAM_SIZE]; - - struct cdev * sc_cdev; - int sc_type; -#define FLASH_TYPE_SM 0 -#define FLASH_TYPE_AMD 1 - int sc_isopen; - int sc_rpos; - int sc_wpos; -}; - -#endif /* _KERNEL */ - -struct chrp_header { - uint8_t signature; - uint8_t chrp_checksum; - uint16_t length; - char name[12]; -}; - -struct core99_header { - struct chrp_header chrp_header; - uint32_t adler_checksum; - uint32_t generation; - uint32_t reserved[2]; -}; - -#endif /* _POWERPC_POWERMAC_POWERMAC_NVRAMVAR_H_ */ diff --git a/sys/dev/scc/scc_bfe_macio.c b/sys/dev/scc/scc_bfe_macio.c deleted file mode 100644 index a051007c856..00000000000 --- a/sys/dev/scc/scc_bfe_macio.c +++ /dev/null @@ -1,94 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include - -#define MACIO_REGSHFT 4 -#define MACIO_RCLK 230400 - -static int -scc_macio_probe(device_t dev) -{ - struct scc_softc *sc; - const char *nm; - - sc = device_get_softc(dev); - nm = ofw_bus_get_name(dev); - /* Attach to modern escc (channel shift 4 bits) */ - if (!strcmp(nm, "escc")) { - device_set_desc(dev, "Zilog Z8530 dual channel SCC"); - sc->sc_class = &scc_z8530_escc_class; - return (scc_bfe_probe(dev, MACIO_REGSHFT, MACIO_RCLK, 0)); - } - return (ENXIO); -} - -static int -scc_macio_attach(device_t dev) -{ - - return (scc_bfe_attach(dev, 3)); -} - -static device_method_t scc_macio_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, scc_macio_probe), - DEVMETHOD(device_attach, scc_macio_attach), - DEVMETHOD(device_detach, scc_bfe_detach), - - DEVMETHOD(bus_alloc_resource, scc_bus_alloc_resource), - DEVMETHOD(bus_release_resource, scc_bus_release_resource), - DEVMETHOD(bus_get_resource, scc_bus_get_resource), - DEVMETHOD(bus_read_ivar, scc_bus_read_ivar), - DEVMETHOD(bus_setup_intr, scc_bus_setup_intr), - DEVMETHOD(bus_teardown_intr, scc_bus_teardown_intr), - - DEVMETHOD_END -}; - -static driver_t scc_macio_driver = { - scc_driver_name, - scc_macio_methods, - sizeof(struct scc_softc), -}; - -DRIVER_MODULE(scc, macio, scc_macio_driver, scc_devclass, NULL, NULL); diff --git a/sys/dev/sound/macio/aoa.c b/sys/dev/sound/macio/aoa.c deleted file mode 100644 index 067469242e5..00000000000 --- a/sys/dev/sound/macio/aoa.c +++ /dev/null @@ -1,388 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2008 by Marco Trillo. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Apple Onboard Audio (AOA). - */ - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef HAVE_KERNEL_OPTION_HEADERS -#include "opt_snd.h" -#endif - -#include -#include - -#include "mixer_if.h" - -struct aoa_dma { - struct mtx mutex; - struct resource *reg; /* DBDMA registers */ - dbdma_channel_t *channel; /* DBDMA channel */ - bus_dma_tag_t tag; /* bus_dma tag */ - struct pcm_channel *pcm; /* PCM channel */ - struct snd_dbuf *buf; /* PCM buffer */ - u_int slots; /* # of slots */ - u_int slot; /* current slot */ - u_int bufsz; /* buffer size */ - u_int blksz; /* block size */ - int running; -}; - -static void -aoa_dma_set_program(struct aoa_dma *dma) -{ - u_int32_t addr; - int i; - - addr = (u_int32_t) sndbuf_getbufaddr(dma->buf); - KASSERT(dma->bufsz == sndbuf_getsize(dma->buf), ("bad size")); - - dma->slots = dma->bufsz / dma->blksz; - - for (i = 0; i < dma->slots; ++i) { - dbdma_insert_command(dma->channel, - i, /* slot */ - DBDMA_OUTPUT_MORE, /* command */ - 0, /* stream */ - addr, /* data */ - dma->blksz, /* count */ - DBDMA_ALWAYS, /* interrupt */ - DBDMA_COND_TRUE, /* branch */ - DBDMA_NEVER, /* wait */ - dma->slots + 1 /* branch_slot */ - ); - - addr += dma->blksz; - } - - /* Branch back to beginning. */ - dbdma_insert_branch(dma->channel, dma->slots, 0); - - /* STOP command to branch when S0 is asserted. */ - dbdma_insert_stop(dma->channel, dma->slots + 1); - - /* Set S0 as the condition to branch to STOP. */ - dbdma_set_branch_selector(dma->channel, 1 << 0, 1 << 0); - dbdma_set_device_status(dma->channel, 1 << 0, 0); - - dbdma_sync_commands(dma->channel, BUS_DMASYNC_PREWRITE); -} - -#define AOA_BUFFER_SIZE 65536 - -static struct aoa_dma * -aoa_dma_create(struct aoa_softc *sc) -{ - struct aoa_dma *dma; - bus_dma_tag_t tag; - int err; - device_t self; - - self = sc->sc_dev; - err = bus_dma_tag_create(bus_get_dma_tag(self), - 4, 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, - AOA_BUFFER_SIZE, 1, AOA_BUFFER_SIZE, 0, NULL, NULL, &tag); - if (err != 0) - return (NULL); - - dma = malloc(sizeof(*dma), M_DEVBUF, M_WAITOK | M_ZERO); - dma->tag = tag; - dma->bufsz = AOA_BUFFER_SIZE; - dma->blksz = PAGE_SIZE; /* initial blocksize */ - - mtx_init(&dma->mutex, "AOA", NULL, MTX_DEF); - - sc->sc_intrp = dma; - - return (dma); -} - -static void -aoa_dma_delete(struct aoa_dma *dma) -{ - bus_dma_tag_destroy(dma->tag); - mtx_destroy(&dma->mutex); - free(dma, M_DEVBUF); -} - -static u_int32_t -aoa_chan_setblocksize(kobj_t obj, void *data, u_int32_t blocksz) -{ - struct aoa_dma *dma = data; - int err, lz; - - DPRINTF(("aoa_chan_setblocksize: blocksz = %u, dma->blksz = %u\n", - blocksz, dma->blksz)); - KASSERT(!dma->running, ("dma is running")); - KASSERT(blocksz > 0, ("bad blocksz")); - - /* Round blocksz down to a power of two... */ - __asm volatile ("cntlzw %0,%1" : "=r"(lz) : "r"(blocksz)); - blocksz = 1 << (31 - lz); - DPRINTF(("blocksz = %u\n", blocksz)); - - /* ...but no more than the buffer. */ - if (blocksz > dma->bufsz) - blocksz = dma->bufsz; - - err = sndbuf_resize(dma->buf, dma->bufsz / blocksz, blocksz); - if (err != 0) { - DPRINTF(("sndbuf_resize returned %d\n", err)); - return (0); - } - - if (blocksz == dma->blksz) - return (dma->blksz); - - /* One slot per block plus branch to 0 plus STOP. */ - err = dbdma_resize_channel(dma->channel, 2 + dma->bufsz / blocksz); - if (err != 0) { - DPRINTF(("dbdma_resize_channel returned %d\n", err)); - return (0); - } - - /* Set the new blocksize. */ - dma->blksz = blocksz; - aoa_dma_set_program(dma); - - return (dma->blksz); -} - -static int -aoa_chan_setformat(kobj_t obj, void *data, u_int32_t format) -{ - DPRINTF(("aoa_chan_setformat: format = %u\n", format)); - - if (format != SND_FORMAT(AFMT_S16_BE, 2, 0)) - return (EINVAL); - - return (0); -} - -static u_int32_t -aoa_chan_setspeed(kobj_t obj, void *data, u_int32_t speed) -{ - DPRINTF(("aoa_chan_setspeed: speed = %u\n", speed)); - - return (44100); -} - -static u_int32_t -aoa_chan_getptr(kobj_t obj, void *data) -{ - struct aoa_dma *dma = data; - - if (!dma->running) - return (0); - - return (dma->slot * dma->blksz); -} - -static void * -aoa_chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, - struct pcm_channel *c, int dir) -{ - struct aoa_softc *sc = devinfo; - struct aoa_dma *dma; - int max_slots, err; - - KASSERT(dir == PCMDIR_PLAY, ("bad dir")); - - dma = aoa_dma_create(sc); - if (!dma) - return (NULL); - dma->pcm = c; - dma->buf = b; - dma->reg = sc->sc_odma; - - /* One slot per block, plus branch to 0 plus STOP. */ - max_slots = 2 + dma->bufsz / dma->blksz; - err = dbdma_allocate_channel(dma->reg, 0, bus_get_dma_tag(sc->sc_dev), - max_slots, &dma->channel ); - if (err != 0) { - aoa_dma_delete(dma); - return (NULL); - } - - if (sndbuf_alloc(dma->buf, dma->tag, 0, dma->bufsz) != 0) { - dbdma_free_channel(dma->channel); - aoa_dma_delete(dma); - return (NULL); - } - - aoa_dma_set_program(dma); - - return (dma); -} - -static int -aoa_chan_trigger(kobj_t obj, void *data, int go) -{ - struct aoa_dma *dma = data; - int i; - - switch (go) { - case PCMTRIG_START: - - /* Start the DMA. */ - dma->running = 1; - - dma->slot = 0; - dbdma_set_current_cmd(dma->channel, dma->slot); - - dbdma_run(dma->channel); - - return (0); - - case PCMTRIG_STOP: - case PCMTRIG_ABORT: - - mtx_lock(&dma->mutex); - - dma->running = 0; - - /* Make it branch to the STOP command. */ - dbdma_set_device_status(dma->channel, 1 << 0, 1 << 0); - - /* XXX should wait for DBDMA_ACTIVE to clear. */ - DELAY(40000); - - /* Reset the DMA. */ - dbdma_stop(dma->channel); - dbdma_set_device_status(dma->channel, 1 << 0, 0); - - for (i = 0; i < dma->slots; ++i) - dbdma_clear_cmd_status(dma->channel, i); - - mtx_unlock(&dma->mutex); - - return (0); - } - - return (0); -} - -static int -aoa_chan_free(kobj_t obj, void *data) -{ - struct aoa_dma *dma = data; - - sndbuf_free(dma->buf); - dbdma_free_channel(dma->channel); - aoa_dma_delete(dma); - - return (0); -} - -void -aoa_interrupt(void *xsc) -{ - struct aoa_softc *sc = xsc; - struct aoa_dma *dma; - - if (!(dma = sc->sc_intrp) || !dma->running) - return; - - mtx_lock(&dma->mutex); - - while (dbdma_get_cmd_status(dma->channel, dma->slot)) { - dbdma_clear_cmd_status(dma->channel, dma->slot); - dma->slot = (dma->slot + 1) % dma->slots; - - mtx_unlock(&dma->mutex); - chn_intr(dma->pcm); - mtx_lock(&dma->mutex); - } - - mtx_unlock(&dma->mutex); -} - -static u_int32_t sc_fmt[] = { - SND_FORMAT(AFMT_S16_BE, 2, 0), - 0 -}; -static struct pcmchan_caps aoa_caps = {44100, 44100, sc_fmt, 0}; - -static struct pcmchan_caps * -aoa_chan_getcaps(kobj_t obj, void *data) -{ - return (&aoa_caps); -} - -static kobj_method_t aoa_chan_methods[] = { - KOBJMETHOD(channel_init, aoa_chan_init), - KOBJMETHOD(channel_free, aoa_chan_free), - KOBJMETHOD(channel_setformat, aoa_chan_setformat), - KOBJMETHOD(channel_setspeed, aoa_chan_setspeed), - KOBJMETHOD(channel_setblocksize,aoa_chan_setblocksize), - KOBJMETHOD(channel_trigger, aoa_chan_trigger), - KOBJMETHOD(channel_getptr, aoa_chan_getptr), - KOBJMETHOD(channel_getcaps, aoa_chan_getcaps), - KOBJMETHOD_END -}; -CHANNEL_DECLARE(aoa_chan); - -int -aoa_attach(void *xsc) -{ - char status[SND_STATUSLEN]; - struct aoa_softc *sc; - device_t self; - int err; - - sc = xsc; - self = sc->sc_dev; - - if (pcm_register(self, sc, 1, 0)) - return (ENXIO); - - err = pcm_getbuffersize(self, AOA_BUFFER_SIZE, AOA_BUFFER_SIZE, - AOA_BUFFER_SIZE); - DPRINTF(("pcm_getbuffersize returned %d\n", err)); - - pcm_addchan(self, PCMDIR_PLAY, &aoa_chan_class, sc); - - snprintf(status, sizeof(status), "at %s", ofw_bus_get_name(self)); - pcm_setstatus(self, status); - - return (0); -} diff --git a/sys/dev/sound/macio/aoa.h b/sys/dev/sound/macio/aoa.h deleted file mode 100644 index 511fe345d74..00000000000 --- a/sys/dev/sound/macio/aoa.h +++ /dev/null @@ -1,46 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2008 by Marco Trillo. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef SOUND_AOA_H -#define SOUND_AOA_H - -#ifndef AOA_DEBUG -#define DPRINTF(x) /* nothing */ -#else -#define DPRINTF(x) printf x -#endif - -struct aoa_softc { - device_t sc_dev; - void *sc_intrp; - struct resource *sc_odma; -}; - -void aoa_interrupt(void *); -int aoa_attach(void *xsc); - -#endif /* SOUND_AOA_H */ diff --git a/sys/dev/sound/macio/davbus.c b/sys/dev/sound/macio/davbus.c deleted file mode 100644 index 6e4995bd187..00000000000 --- a/sys/dev/sound/macio/davbus.c +++ /dev/null @@ -1,597 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2008 by Marco Trillo. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Apple DAVbus audio controller. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#ifdef HAVE_KERNEL_OPTION_HEADERS -#include "opt_snd.h" -#endif - -#include - -#include -#include - -#include -#include -#include - -#include "mixer_if.h" - -struct davbus_softc { - struct aoa_softc aoa; - phandle_t node; - phandle_t soundnode; - struct resource *reg; - struct mtx mutex; - int device_id; - u_int output_mask; - u_int (*read_status)(struct davbus_softc *, u_int); - void (*set_outputs)(struct davbus_softc *, u_int); -}; - -static int davbus_probe(device_t); -static int davbus_attach(device_t); -static void davbus_cint(void *); - -static device_method_t pcm_davbus_methods[] = { - /* Device interface. */ - DEVMETHOD(device_probe, davbus_probe), - DEVMETHOD(device_attach, davbus_attach), - { 0, 0 } -}; - -static driver_t pcm_davbus_driver = { - "pcm", - pcm_davbus_methods, - PCM_SOFTC_SIZE -}; - -DRIVER_MODULE(pcm_davbus, macio, pcm_davbus_driver, pcm_devclass, 0, 0); -MODULE_DEPEND(pcm_davbus, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); - -/***************************************************************************** - Probe and attachment routines. - *****************************************************************************/ -static int -davbus_probe(device_t self) -{ - const char *name; - - name = ofw_bus_get_name(self); - if (!name) - return (ENXIO); - - if (strcmp(name, "davbus") != 0) - return (ENXIO); - - device_set_desc(self, "Apple DAVBus Audio Controller"); - - return (0); -} - -/* - * Burgundy codec control - */ - -static int burgundy_init(struct snd_mixer *m); -static int burgundy_uninit(struct snd_mixer *m); -static int burgundy_reinit(struct snd_mixer *m); -static void burgundy_write_locked(struct davbus_softc *, u_int, u_int); -static void burgundy_set_outputs(struct davbus_softc *d, u_int mask); -static u_int burgundy_read_status(struct davbus_softc *d, u_int status); -static int burgundy_set(struct snd_mixer *m, unsigned dev, unsigned left, - unsigned right); -static u_int32_t burgundy_setrecsrc(struct snd_mixer *m, u_int32_t src); - -static kobj_method_t burgundy_mixer_methods[] = { - KOBJMETHOD(mixer_init, burgundy_init), - KOBJMETHOD(mixer_uninit, burgundy_uninit), - KOBJMETHOD(mixer_reinit, burgundy_reinit), - KOBJMETHOD(mixer_set, burgundy_set), - KOBJMETHOD(mixer_setrecsrc, burgundy_setrecsrc), - KOBJMETHOD_END -}; - -MIXER_DECLARE(burgundy_mixer); - -static int -burgundy_init(struct snd_mixer *m) -{ - struct davbus_softc *d; - - d = mix_getdevinfo(m); - - d->read_status = burgundy_read_status; - d->set_outputs = burgundy_set_outputs; - - /* - * We configure the Burgundy codec as follows: - * - * o Input subframe 0 is connected to input digital - * stream A (ISA). - * o Stream A (ISA) is mixed in mixer 2 (MIX2). - * o Output of mixer 2 (MIX2) is routed to output sources - * OS0 and OS1 which can be converted to analog. - * - */ - mtx_lock(&d->mutex); - - burgundy_write_locked(d, 0x16700, 0x40); - - burgundy_write_locked(d, BURGUNDY_MIX0_REG, 0); - burgundy_write_locked(d, BURGUNDY_MIX1_REG, 0); - burgundy_write_locked(d, BURGUNDY_MIX2_REG, BURGUNDY_MIX_ISA); - burgundy_write_locked(d, BURGUNDY_MIX3_REG, 0); - - burgundy_write_locked(d, BURGUNDY_OS_REG, BURGUNDY_OS0_MIX2 | - BURGUNDY_OS1_MIX2); - - burgundy_write_locked(d, BURGUNDY_SDIN_REG, BURGUNDY_ISA_SF0); - - /* Set several digital scalers to unity gain. */ - burgundy_write_locked(d, BURGUNDY_MXS2L_REG, BURGUNDY_MXS_UNITY); - burgundy_write_locked(d, BURGUNDY_MXS2R_REG, BURGUNDY_MXS_UNITY); - burgundy_write_locked(d, BURGUNDY_OSS0L_REG, BURGUNDY_OSS_UNITY); - burgundy_write_locked(d, BURGUNDY_OSS0R_REG, BURGUNDY_OSS_UNITY); - burgundy_write_locked(d, BURGUNDY_OSS1L_REG, BURGUNDY_OSS_UNITY); - burgundy_write_locked(d, BURGUNDY_OSS1R_REG, BURGUNDY_OSS_UNITY); - burgundy_write_locked(d, BURGUNDY_ISSAL_REG, BURGUNDY_ISS_UNITY); - burgundy_write_locked(d, BURGUNDY_ISSAR_REG, BURGUNDY_ISS_UNITY); - - burgundy_set_outputs(d, burgundy_read_status(d, - bus_read_4(d->reg, DAVBUS_CODEC_STATUS))); - - mtx_unlock(&d->mutex); - - mix_setdevs(m, SOUND_MASK_VOLUME); - - return (0); -} - -static int -burgundy_uninit(struct snd_mixer *m) -{ - return (0); -} - -static int -burgundy_reinit(struct snd_mixer *m) -{ - return (0); -} - -static void -burgundy_write_locked(struct davbus_softc *d, u_int reg, u_int val) -{ - u_int size, addr, offset, data, i; - - size = (reg & 0x00FF0000) >> 16; - addr = (reg & 0x0000FF00) >> 8; - offset = reg & 0xFF; - - for (i = offset; i < offset + size; ++i) { - data = BURGUNDY_CTRL_WRITE | (addr << 12) | - ((size + offset - 1) << 10) | (i << 8) | (val & 0xFF); - if (i == offset) - data |= BURGUNDY_CTRL_RESET; - - bus_write_4(d->reg, DAVBUS_CODEC_CTRL, data); - - while (bus_read_4(d->reg, DAVBUS_CODEC_CTRL) & - DAVBUS_CODEC_BUSY) - DELAY(1); - - val >>= 8; /* next byte. */ - } -} - -/* Must be called with d->mutex held. */ -static void -burgundy_set_outputs(struct davbus_softc *d, u_int mask) -{ - u_int x = 0; - - if (mask == d->output_mask) - return; - - /* - * Bordeaux card wirings: - * Port 15: RCA out - * Port 16: Minijack out - * Port 17: Internal speaker - * - * B&W G3 wirings: - * Port 14: Minijack out - * Port 17: Internal speaker - */ - - DPRINTF(("Enabled outputs:")); - if (mask & (1 << 0)) { - DPRINTF((" SPEAKER")); - x |= BURGUNDY_P17M_EN; - } - if (mask & (1 << 1)) { - DPRINTF((" HEADPHONES")); - x |= BURGUNDY_P14L_EN | BURGUNDY_P14R_EN; - } - DPRINTF(("\n")); - - burgundy_write_locked(d, BURGUNDY_MUTE_REG, x); - d->output_mask = mask; -} - -static u_int -burgundy_read_status(struct davbus_softc *d, u_int status) -{ - if (status & 0x4) - return (1 << 1); - else - return (1 << 0); -} - -static int -burgundy_set(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) -{ - struct davbus_softc *d; - int lval, rval; - - lval = ((100 - left) * 15 / 100) & 0xf; - rval = ((100 - right) * 15 / 100) & 0xf; - DPRINTF(("volume %d %d\n", lval, rval)); - - d = mix_getdevinfo(m); - - switch (dev) { - case SOUND_MIXER_VOLUME: - mtx_lock(&d->mutex); - - burgundy_write_locked(d, BURGUNDY_OL13_REG, lval); - burgundy_write_locked(d, BURGUNDY_OL14_REG, (rval << 4) | lval); - burgundy_write_locked(d, BURGUNDY_OL15_REG, (rval << 4) | lval); - burgundy_write_locked(d, BURGUNDY_OL16_REG, (rval << 4) | lval); - burgundy_write_locked(d, BURGUNDY_OL17_REG, lval); - - mtx_unlock(&d->mutex); - - return (left | (right << 8)); - } - - return (0); -} - -static u_int32_t -burgundy_setrecsrc(struct snd_mixer *m, u_int32_t src) -{ - return (0); -} - -/* - * Screamer Codec Control - */ - -static int screamer_init(struct snd_mixer *m); -static int screamer_uninit(struct snd_mixer *m); -static int screamer_reinit(struct snd_mixer *m); -static void screamer_write_locked(struct davbus_softc *, u_int, u_int); -static void screamer_set_outputs(struct davbus_softc *d, u_int mask); -static u_int screamer_read_status(struct davbus_softc *d, u_int status); -static int screamer_set(struct snd_mixer *m, unsigned dev, unsigned left, - unsigned right); -static u_int32_t screamer_setrecsrc(struct snd_mixer *m, u_int32_t src); - -static kobj_method_t screamer_mixer_methods[] = { - KOBJMETHOD(mixer_init, screamer_init), - KOBJMETHOD(mixer_uninit, screamer_uninit), - KOBJMETHOD(mixer_reinit, screamer_reinit), - KOBJMETHOD(mixer_set, screamer_set), - KOBJMETHOD(mixer_setrecsrc, screamer_setrecsrc), - KOBJMETHOD_END -}; - -MIXER_DECLARE(screamer_mixer); - -static int -screamer_init(struct snd_mixer *m) -{ - struct davbus_softc *d; - - d = mix_getdevinfo(m); - - d->read_status = screamer_read_status; - d->set_outputs = screamer_set_outputs; - - mtx_lock(&d->mutex); - - screamer_write_locked(d, SCREAMER_CODEC_ADDR0, SCREAMER_INPUT_CD | - SCREAMER_DEFAULT_CD_GAIN); - - screamer_set_outputs(d, screamer_read_status(d, - bus_read_4(d->reg, DAVBUS_CODEC_STATUS))); - - screamer_write_locked(d, SCREAMER_CODEC_ADDR2, 0); - screamer_write_locked(d, SCREAMER_CODEC_ADDR4, 0); - screamer_write_locked(d, SCREAMER_CODEC_ADDR5, 0); - screamer_write_locked(d, SCREAMER_CODEC_ADDR6, 0); - - mtx_unlock(&d->mutex); - - mix_setdevs(m, SOUND_MASK_VOLUME); - - return (0); -} - -static int -screamer_uninit(struct snd_mixer *m) -{ - return (0); -} - -static int -screamer_reinit(struct snd_mixer *m) -{ - return (0); -} - -static void -screamer_write_locked(struct davbus_softc *d, u_int reg, u_int val) -{ - u_int x; - - KASSERT(val == (val & 0xfff), ("bad val")); - - while (bus_read_4(d->reg, DAVBUS_CODEC_CTRL) & DAVBUS_CODEC_BUSY) - DELAY(100); - - x = reg; - x |= SCREAMER_CODEC_EMSEL0; - x |= val; - bus_write_4(d->reg, DAVBUS_CODEC_CTRL, x); - - while (bus_read_4(d->reg, DAVBUS_CODEC_CTRL) & DAVBUS_CODEC_BUSY) - DELAY(100); -} - -/* Must be called with d->mutex held. */ -static void -screamer_set_outputs(struct davbus_softc *d, u_int mask) -{ - u_int x; - - if (mask == d->output_mask) { - return; - } - - x = SCREAMER_MUTE_SPEAKER | SCREAMER_MUTE_HEADPHONES; - - DPRINTF(("Enabled outputs: ")); - - if (mask & (1 << 0)) { - DPRINTF(("SPEAKER ")); - x &= ~SCREAMER_MUTE_SPEAKER; - } - if (mask & (1 << 1)) { - DPRINTF(("HEADPHONES ")); - x &= ~SCREAMER_MUTE_HEADPHONES; - } - - DPRINTF(("\n")); - - if (d->device_id == 5 || d->device_id == 11) { - DPRINTF(("Enabling programmable output.\n")); - x |= SCREAMER_PROG_OUTPUT0; - } - if (d->device_id == 8 || d->device_id == 11) { - x &= ~SCREAMER_MUTE_SPEAKER; - - if (mask & (1 << 0)) - x |= SCREAMER_PROG_OUTPUT1; /* enable speaker. */ - } - - screamer_write_locked(d, SCREAMER_CODEC_ADDR1, x); - d->output_mask = mask; -} - -static u_int -screamer_read_status(struct davbus_softc *d, u_int status) -{ - int headphones; - - switch (d->device_id) { - case 5: /* Sawtooth */ - headphones = (status & 0x4); - break; - - case 8: - case 11: /* iMac DV */ - /* The iMac DV has 2 headphone outputs. */ - headphones = (status & 0x7); - break; - - default: - headphones = (status & 0x8); - } - - if (headphones) - return (1 << 1); - else - return (1 << 0); -} - -static int -screamer_set(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) -{ - struct davbus_softc *d; - int lval, rval; - - lval = ((100 - left) * 15 / 100) & 0xf; - rval = ((100 - right) * 15 / 100) & 0xf; - DPRINTF(("volume %d %d\n", lval, rval)); - - d = mix_getdevinfo(m); - - switch (dev) { - case SOUND_MIXER_VOLUME: - mtx_lock(&d->mutex); - screamer_write_locked(d, SCREAMER_CODEC_ADDR2, (lval << 6) | - rval); - screamer_write_locked(d, SCREAMER_CODEC_ADDR4, (lval << 6) | - rval); - mtx_unlock(&d->mutex); - - return (left | (right << 8)); - } - - return (0); -} - -static u_int32_t -screamer_setrecsrc(struct snd_mixer *m, u_int32_t src) -{ - return (0); -} - -static int -davbus_attach(device_t self) -{ - struct davbus_softc *sc; - struct resource *dbdma_irq, *cintr; - void *cookie; - char compat[64]; - int rid, oirq, err; - - sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); - - sc->aoa.sc_dev = self; - sc->node = ofw_bus_get_node(self); - sc->soundnode = OF_child(sc->node); - - /* Map the controller register space. */ - rid = 0; - sc->reg = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE); - if (sc->reg == NULL) - return (ENXIO); - - /* Map the DBDMA channel register space. */ - rid = 1; - sc->aoa.sc_odma = bus_alloc_resource_any(self, SYS_RES_MEMORY, - &rid, RF_ACTIVE); - if (sc->aoa.sc_odma == NULL) - return (ENXIO); - - /* Establish the DBDMA channel edge-triggered interrupt. */ - rid = 1; - dbdma_irq = bus_alloc_resource_any(self, SYS_RES_IRQ, - &rid, RF_SHAREABLE | RF_ACTIVE); - if (dbdma_irq == NULL) - return (ENXIO); - - oirq = rman_get_start(dbdma_irq); - - DPRINTF(("interrupting at irq %d\n", oirq)); - - err = powerpc_config_intr(oirq, INTR_TRIGGER_EDGE, INTR_POLARITY_LOW); - if (err != 0) - return (err); - - snd_setup_intr(self, dbdma_irq, INTR_MPSAFE, aoa_interrupt, - sc, &cookie); - - /* Now initialize the controller. */ - - bzero(compat, sizeof(compat)); - OF_getprop(sc->soundnode, "compatible", compat, sizeof(compat)); - OF_getprop(sc->soundnode, "device-id", &sc->device_id, sizeof(u_int)); - - mtx_init(&sc->mutex, "DAVbus", NULL, MTX_DEF); - - device_printf(self, "codec: <%s>\n", compat); - - /* Setup the control interrupt. */ - rid = 0; - cintr = bus_alloc_resource_any(self, SYS_RES_IRQ, - &rid, RF_SHAREABLE | RF_ACTIVE); - if (cintr != NULL) - bus_setup_intr(self, cintr, INTR_TYPE_MISC | INTR_MPSAFE, - NULL, davbus_cint, sc, &cookie); - - /* Initialize controller registers. */ - bus_write_4(sc->reg, DAVBUS_SOUND_CTRL, DAVBUS_INPUT_SUBFRAME0 | - DAVBUS_OUTPUT_SUBFRAME0 | DAVBUS_RATE_44100 | DAVBUS_INTR_PORTCHG); - - /* Attach DBDMA engine and PCM layer */ - err = aoa_attach(sc); - if (err) - return (err); - - /* Install codec module */ - if (strcmp(compat, "screamer") == 0) - mixer_init(self, &screamer_mixer_class, sc); - else if (strcmp(compat, "burgundy") == 0) - mixer_init(self, &burgundy_mixer_class, sc); - - return (0); -} - -static void -davbus_cint(void *ptr) -{ - struct davbus_softc *d = ptr; - u_int reg, status, mask; - - mtx_lock(&d->mutex); - - reg = bus_read_4(d->reg, DAVBUS_SOUND_CTRL); - if (reg & DAVBUS_PORTCHG) { - - status = bus_read_4(d->reg, DAVBUS_CODEC_STATUS); - - if (d->read_status && d->set_outputs) { - mask = (*d->read_status)(d, status); - (*d->set_outputs)(d, mask); - } - - /* Clear the interrupt. */ - bus_write_4(d->reg, DAVBUS_SOUND_CTRL, reg); - } - - mtx_unlock(&d->mutex); -} diff --git a/sys/dev/sound/macio/davbusreg.h b/sys/dev/sound/macio/davbusreg.h deleted file mode 100644 index d05beb05d01..00000000000 --- a/sys/dev/sound/macio/davbusreg.h +++ /dev/null @@ -1,282 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2008 by Marco Trillo. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Apple DAVbus audio controller. - */ - -#ifndef _SOUND_DAVBUS_H -#define _SOUND_DAVBUS_H - -/* DAVbus controller registers. */ -#define DAVBUS_SOUND_CTRL 0x00 -#define DAVBUS_CODEC_CTRL 0x10 -#define DAVBUS_CODEC_STATUS 0x20 -#define DAVBUS_CLIP_COUNT 0x30 -#define DAVBUS_BYTE_SWAP 0x40 - -/* - * The DAVbus uses a serial bus time multiplexed in four subframes, - * but the controller itself uses subframe 0 to communicate with the codec. - * In some machines, the other subframes may be used by external devices - * thorugh the DAV interface. - */ -/* DAVBUS_SOUND_CTRL bit definitions. */ -#define DAVBUS_INPUT_SUBFRAME0 0x00000001 -#define DAVBUS_INPUT_SUBFRAME1 0x00000002 -#define DAVBUS_INPUT_SUBFRAME2 0x00000004 -#define DAVBUS_INPUT_SUBFRAME3 0x00000008 - -#define DAVBUS_OUTPUT_SUBFRAME0 0x00000010 -#define DAVBUS_OUTPUT_SUBFRAME1 0x00000020 -#define DAVBUS_OUTPUT_SUBFRAME2 0x00000040 -#define DAVBUS_OUTPUT_SUBFRAME3 0x00000080 - -#define DAVBUS_RATE_44100 0x00000000 -#define DAVBUS_RATE_29400 0x00000100 -#define DAVBUS_RATE_22050 0x00000200 -#define DAVBUS_RATE_17640 0x00000300 -#define DAVBUS_RATE_14700 0x00000400 -#define DAVBUS_RATE_11025 0x00000500 -#define DAVBUS_RATE_8820 0x00000600 -#define DAVBUS_RATE_7350 0x00000700 -#define DAVBUS_RATE_MASK 0x00000700 - -#define DAVBUS_ERROR 0x00000800 -#define DAVBUS_PORTCHG 0x00001000 -#define DAVBUS_INTR_ERROR 0x00002000 /* interrupt on error */ -#define DAVBUS_INTR_PORTCHG 0x00004000 /* interrupt on port change */ - -#define DAVBUS_STATUS_SUBFRAME 0x00018000 /* mask */ - -/* DAVBUS_CODEC_CTRL bit definitions. */ -#define DAVBUS_CODEC_BUSY 0x01000000 - -/* - * Burgundy Codec Control Bits - */ - -/* Burgundy transaction bits. */ -#define BURGUNDY_CTRL_RESET 0x00100000 -#define BURGUNDY_CTRL_WRITE 0x00200000 - -/* Mute control for each analog output port. */ -#define BURGUNDY_MUTE_REG 0x16000 -#define BURGUNDY_P13M_EN 0x01 -#define BURGUNDY_P14L_EN 0x02 -#define BURGUNDY_P14R_EN 0x04 -#define BURGUNDY_P15L_EN 0x08 -#define BURGUNDY_P15R_EN 0x10 -#define BURGUNDY_P16L_EN 0x20 -#define BURGUNDY_P16R_EN 0x40 -#define BURGUNDY_P17M_EN 0x80 - -/* Attenuation of each analog output port. */ -#define BURGUNDY_OL13_REG 0x16100 -#define BURGUNDY_OL14_REG 0x16200 -#define BURGUNDY_OL15_REG 0x16300 -#define BURGUNDY_OL16_REG 0x16400 -#define BURGUNDY_OL17_REG 0x16500 - -/* Inputs of four digital mixers. */ -#define BURGUNDY_MIX0_REG 0x42900 -#define BURGUNDY_MIX1_REG 0x42A00 -#define BURGUNDY_MIX2_REG 0x42B00 -#define BURGUNDY_MIX3_REG 0x42C00 -#define BURGUNDY_MIX_IS0 0x00010001 -#define BURGUNDY_MIX_IS1 0x00020002 -#define BURGUNDY_MIX_IS2 0x00040004 -#define BURGUNDY_MIX_IS3 0x00080008 -#define BURGUNDY_MIX_IS4 0x00100010 -#define BURGUNDY_MIX_ISA 0x01000100 /* Digital stream ISA. */ -#define BURGUNDY_MIX_ISB 0x02000200 /* Digital stream ISB. */ -#define BURGUNDY_MIX_ISC 0x04000400 /* Digital stream ISC. */ -#define BURGUNDY_MIX_ISD 0x08000800 /* Digital stream ISD. */ -#define BURGUNDY_MIX_ISE 0x10001000 /* Digital stream ISE. */ -#define BURGUNDY_MIX_ISF 0x20002000 /* Digital stream ISF. */ -#define BURGUNDY_MIX_ISG 0x40004000 /* Digital stream ISG. */ -#define BURGUNDY_MIX_ISH 0x80008000 /* Digital stream ISH. */ - -/* A digital scalar at the output of each mixer. */ -#define BURGUNDY_MXS0L_REG 0x12D00 -#define BURGUNDY_MXS0R_REG 0x12D01 -#define BURGUNDY_MXS1L_REG 0x12D02 -#define BURGUNDY_MXS1R_REG 0x12D03 -#define BURGUNDY_MXS2L_REG 0x12E00 -#define BURGUNDY_MXS2R_REG 0x12E01 -#define BURGUNDY_MXS3L_REG 0x12E02 -#define BURGUNDY_MXS3R_REG 0x12E03 -#define BURGUNDY_MXS_UNITY 0xDF - -/* Demultiplexer. Routes the mixer 0-3 (see above) to output sources. - Output sources 0-2 can be converted to analog. */ -#define BURGUNDY_OS_REG 0x42F00 -#define BURGUNDY_OS0_MIX0 0x00000000 -#define BURGUNDY_OS0_MIX1 0x00000001 -#define BURGUNDY_OS0_MIX2 0x00000002 -#define BURGUNDY_OS0_MIX3 0x00000003 -#define BURGUNDY_OS1_MIX0 0x00000000 -#define BURGUNDY_OS1_MIX1 0x00000004 -#define BURGUNDY_OS1_MIX2 0x00000008 -#define BURGUNDY_OS1_MIX3 0x0000000C -#define BURGUNDY_OS2_MIX0 0x00000000 -#define BURGUNDY_OS2_MIX1 0x00000010 -#define BURGUNDY_OS2_MIX2 0x00000020 -#define BURGUNDY_OS2_MIX3 0x00000030 -#define BURGUNDY_OS3_MIX0 0x00000000 -#define BURGUNDY_OS3_MIX1 0x00000040 -#define BURGUNDY_OS3_MIX2 0x00000080 -#define BURGUNDY_OS3_MIX3 0x000000C0 -#define BURGUNDY_OSA_MIX0 0x00000000 -#define BURGUNDY_OSA_MIX1 0x00010000 -#define BURGUNDY_OSA_MIX2 0x00020000 -#define BURGUNDY_OSA_MIX3 0x00030000 -#define BURGUNDY_OSB_MIX0 0x00000000 -#define BURGUNDY_OSB_MIX1 0x00040000 -#define BURGUNDY_OSB_MIX2 0x00080000 -#define BURGUNDY_OSB_MIX3 0x000C0000 -#define BURGUNDY_OSC_MIX0 0x00000000 -#define BURGUNDY_OSC_MIX1 0x00100000 -#define BURGUNDY_OSC_MIX2 0x00200000 -#define BURGUNDY_OSC_MIX3 0x00300000 -#define BURGUNDY_OSD_MIX0 0x00000000 -#define BURGUNDY_OSD_MIX1 0x00400000 -#define BURGUNDY_OSD_MIX2 0x00800000 -#define BURGUNDY_OSD_MIX3 0x00C00000 -#define BURGUNDY_OSE_MIX0 0x00000000 -#define BURGUNDY_OSE_MIX1 0x01000000 -#define BURGUNDY_OSE_MIX2 0x02000000 -#define BURGUNDY_OSE_MIX3 0x03000000 -#define BURGUNDY_OSF_MIX0 0x00000000 -#define BURGUNDY_OSF_MIX1 0x04000000 -#define BURGUNDY_OSF_MIX2 0x08000000 -#define BURGUNDY_OSF_MIX3 0x0C000000 -#define BURGUNDY_OSG_MIX0 0x00000000 -#define BURGUNDY_OSG_MIX1 0x10000000 -#define BURGUNDY_OSG_MIX2 0x20000000 -#define BURGUNDY_OSG_MIX3 0x30000000 -#define BURGUNDY_OSH_MIX0 0x00000000 -#define BURGUNDY_OSH_MIX1 0x40000000 -#define BURGUNDY_OSH_MIX2 0x80000000 -#define BURGUNDY_OSH_MIX3 0xC0000000 - -/* A digital scalar for output sources 0 to 3. */ -#define BURGUNDY_OSS0L_REG 0x13000 -#define BURGUNDY_OSS0R_REG 0x13001 -#define BURGUNDY_OSS1L_REG 0x13002 -#define BURGUNDY_OSS1R_REG 0x13003 -#define BURGUNDY_OSS2L_REG 0x13100 -#define BURGUNDY_OSS2R_REG 0x13101 -#define BURGUNDY_OSS3L_REG 0x13102 -#define BURGUNDY_OSS3R_REG 0x13103 -#define BURGUNDY_OSS_UNITY 0xDF - -/* Digital input streams ISA-ISC. A stream may be derived from data coming - from the controller in subframes 0 to 3 as well as from internal - output sources OSA-OSD. */ -#define BURGUNDY_SDIN_REG 0x17800 -#define BURGUNDY_ISA_SF0 0x00 -#define BURGUNDY_ISA_OSA 0x02 -#define BURGUNDY_ISB_SF1 0x00 -#define BURGUNDY_ISB_OSB 0x08 -#define BURGUNDY_ISC_SF2 0x00 -#define BURGUNDY_ISC_OSC 0x20 -#define BURGUNDY_ISD_SF3 0x00 -#define BURGUNDY_ISD_OSD 0x80 - -/* A digital scaler for input streams 0-4 A-H. */ -#define BURGUNDY_ISSAL_REG 0x12500 -#define BURGUNDY_ISSAR_REG 0x12501 -#define BURGUNDY_ISS_UNITY 0xDF - -/* - * Screamer codec control bits - * This codec has the following 12-bit control registers: - * cc0 cc1 cc2 cc4 cc5 cc6 cc7 - */ - -/* screamer transaction bits. */ -#define SCREAMER_CODEC_ADDR0 0x00000000 -#define SCREAMER_CODEC_ADDR1 0x00001000 -#define SCREAMER_CODEC_ADDR2 0x00002000 -#define SCREAMER_CODEC_ADDR4 0x00004000 -#define SCREAMER_CODEC_ADDR5 0x00005000 -#define SCREAMER_CODEC_ADDR6 0x00006000 -#define SCREAMER_CODEC_ADDR7 0x00007000 -#define SCREAMER_CODEC_EMSEL0 0x00000000 -#define SCREAMER_CODEC_EMSEL1 0x00400000 -#define SCREAMER_CODEC_EMSEL2 0x00800000 -#define SCREAMER_CODEC_EMSEL4 0x00c00000 - -/* cc0 */ -/* - * Bits 7-4 specify the left ADC input gain; - * bits 3-0 specify the right ADC input gain. - * - * The gain is a 4-bit value expressed in units of 1.5 dB, - * ranging from 0 dB (0) to +22.5 dB (15). - */ -#define SCREAMER_DEFAULT_CD_GAIN 0x000000bb /* +16.5 dB */ -#define SCREAMER_INPUT_CD 0x00000200 -#define SCREAMER_INPUT_LINE 0x00000400 -#define SCREAMER_INPUT_MICROPHONE 0x00000800 -#define SCREAMER_INPUT_MASK 0x00000e00 - -/* cc1 */ -#define SCREAMER_LOOP_THROUGH 0x00000040 -#define SCREAMER_MUTE_SPEAKER 0x00000080 -#define SCREAMER_MUTE_HEADPHONES 0x00000200 -#define SCREAMER_PARALLEL_OUTPUT 0x00000c00 -#define SCREAMER_PROG_OUTPUT0 0x00000400 -#define SCREAMER_PROG_OUTPUT1 0x00000800 - -/* cc2: headphones/external port attenuation */ -/* cc4: internal speaker attenuation */ -/* - * Bits 9-6 specify left DAC output attenuation. - * Bits 3-0 specify right DAC output attenuation. - * - * The attenuation is a 4-bit value expressed in units of -1.5 dB, - * ranging from 0 dB (0) to -22.5 dB (15). - */ - -/* screamer codec status bits. */ -#define SCREAMER_STATUS_MASK 0x00FFFFFF -#define SCREAMER_STATUS_SENSEMASK 0x0000000F -#define SCREAMER_STATUS_SENSE0 0x00000008 -#define SCREAMER_STATUS_SENSE1 0x00000004 -#define SCREAMER_STATUS_SENSE2 0x00000002 -#define SCREAMER_STATUS_SENSE3 0x00000001 -#define SCREAMER_STATUS_PARTMASK 0x00000300 -#define SCREAMER_STATUS_PARTSHFT 8 -#define SCREAMER_PART_CRYSTAL 0x00000100 -#define SCREAMER_PART_NATIONAL 0x00000200 -#define SCREAMER_PART_TI 0x00000300 -#define SCREAMER_STATUS_REVMASK 0x0000F000 -#define SCREAMER_STATUS_REVSHFT 12 - -#endif /* _SOUND_DAVBUS_H */ diff --git a/sys/dev/sound/macio/i2s.c b/sys/dev/sound/macio/i2s.c deleted file mode 100644 index 814bdd7e6bd..00000000000 --- a/sys/dev/sound/macio/i2s.c +++ /dev/null @@ -1,755 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause AND BSD-3-Clause - * - * Copyright 2008 by Marco Trillo. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/*- - * Copyright (c) 2002, 2003 Tsubai Masanari. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * NetBSD: snapper.c,v 1.28 2008/05/16 03:49:54 macallan Exp - * Id: snapper.c,v 1.11 2002/10/31 17:42:13 tsubai Exp - */ - -/* - * Apple I2S audio controller. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef HAVE_KERNEL_OPTION_HEADERS -#include "opt_snd.h" -#endif - -#include -#include - -#include - -struct i2s_softc { - struct aoa_softc aoa; - phandle_t node; - phandle_t soundnode; - struct resource *reg; - u_int output_mask; - struct mtx port_mtx; -}; - -static int i2s_probe(device_t); -static int i2s_attach(device_t); -static void i2s_postattach(void *); -static int i2s_setup(struct i2s_softc *, u_int, u_int, u_int); -static void i2s_mute_headphone (struct i2s_softc *, int); -static void i2s_mute_lineout (struct i2s_softc *, int); -static void i2s_mute_speaker (struct i2s_softc *, int); -static void i2s_set_outputs(void *, u_int); - -static struct intr_config_hook *i2s_delayed_attach = NULL; - -kobj_class_t i2s_mixer_class = NULL; -device_t i2s_mixer = NULL; - -static device_method_t pcm_i2s_methods[] = { - /* Device interface. */ - DEVMETHOD(device_probe, i2s_probe), - DEVMETHOD(device_attach, i2s_attach), - { 0, 0 } -}; - -static driver_t pcm_i2s_driver = { - "pcm", - pcm_i2s_methods, - PCM_SOFTC_SIZE -}; - -DRIVER_MODULE(pcm_i2s, macio, pcm_i2s_driver, pcm_devclass, 0, 0); -MODULE_DEPEND(pcm_i2s, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); - -static int aoagpio_probe(device_t); -static int aoagpio_attach(device_t); - -static device_method_t aoagpio_methods[] = { - /* Device interface. */ - DEVMETHOD(device_probe, aoagpio_probe), - DEVMETHOD(device_attach, aoagpio_attach), - { 0, 0 } -}; - -struct aoagpio_softc { - device_t dev; - int ctrl; - int detect_active; /* for extint-gpio */ - int level; /* for extint-gpio */ - struct i2s_softc *i2s; /* for extint-gpio */ -}; - -static driver_t aoagpio_driver = { - "aoagpio", - aoagpio_methods, - sizeof(struct aoagpio_softc) -}; -static devclass_t aoagpio_devclass; - -DRIVER_MODULE(aoagpio, macgpio, aoagpio_driver, aoagpio_devclass, 0, 0); - -/***************************************************************************** - Probe and attachment routines. - *****************************************************************************/ -static int -i2s_probe(device_t self) -{ - const char *name; - phandle_t subchild; - char subchildname[255]; - - name = ofw_bus_get_name(self); - if (!name) - return (ENXIO); - - if (strcmp(name, "i2s") != 0) - return (ENXIO); - - /* - * Do not attach to "lightshow" I2S devices on Xserves. This controller - * is used there to control the LEDs on the front panel, and this - * driver can't handle it. - */ - subchild = OF_child(OF_child(ofw_bus_get_node(self))); - if (subchild != 0 && OF_getprop(subchild, "name", subchildname, - sizeof(subchildname)) > 0 && strcmp(subchildname, "lightshow") == 0) - return (ENXIO); - - device_set_desc(self, "Apple I2S Audio Controller"); - - return (0); -} - -static phandle_t of_find_firstchild_byname(phandle_t, const char *); - -static int -i2s_attach(device_t self) -{ - struct i2s_softc *sc; - struct resource *dbdma_irq; - void *dbdma_ih; - int rid, oirq, err; - phandle_t port; - - sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); - - sc->aoa.sc_dev = self; - sc->node = ofw_bus_get_node(self); - - port = of_find_firstchild_byname(sc->node, "i2s-a"); - if (port == -1) - return (ENXIO); - sc->soundnode = of_find_firstchild_byname(port, "sound"); - if (sc->soundnode == -1) - return (ENXIO); - - mtx_init(&sc->port_mtx, "port_mtx", NULL, MTX_DEF); - - /* Map the controller register space. */ - rid = 0; - sc->reg = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE); - if (sc->reg == NULL) - return ENXIO; - - /* Map the DBDMA channel register space. */ - rid = 1; - sc->aoa.sc_odma = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (sc->aoa.sc_odma == NULL) - return ENXIO; - - /* Establish the DBDMA channel edge-triggered interrupt. */ - rid = 1; - dbdma_irq = bus_alloc_resource_any(self, SYS_RES_IRQ, - &rid, RF_SHAREABLE | RF_ACTIVE); - if (dbdma_irq == NULL) - return (ENXIO); - - /* Now initialize the controller. */ - err = i2s_setup(sc, 44100, 16, 64); - if (err != 0) - return (err); - - snd_setup_intr(self, dbdma_irq, INTR_MPSAFE, aoa_interrupt, - sc, &dbdma_ih); - - oirq = rman_get_start(dbdma_irq); - err = powerpc_config_intr(oirq, INTR_TRIGGER_EDGE, INTR_POLARITY_LOW); - if (err != 0) - return (err); - - /* - * Register a hook for delayed attach in order to allow - * the I2C controller to attach. - */ - i2s_delayed_attach = malloc(sizeof(struct intr_config_hook), - M_TEMP, M_WAITOK | M_ZERO); - i2s_delayed_attach->ich_func = i2s_postattach; - i2s_delayed_attach->ich_arg = sc; - - if (config_intrhook_establish(i2s_delayed_attach) != 0) - return (ENOMEM); - - return (aoa_attach(sc)); -} - -/***************************************************************************** - GPIO routines. - *****************************************************************************/ - -enum gpio_ctrl { - AMP_MUTE, - HEADPHONE_MUTE, - LINEOUT_MUTE, - AUDIO_HW_RESET, - HEADPHONE_DETECT, - LINEOUT_DETECT, - GPIO_CTRL_NUM -}; - -#define GPIO_CTRL_EXTINT_SET \ - ((1 << HEADPHONE_DETECT) | \ - (1 << LINEOUT_DETECT)) - -static struct aoagpio_softc *gpio_ctrls[GPIO_CTRL_NUM] = - {NULL, NULL, NULL, NULL, NULL, NULL}; - -static struct gpio_match { - const char *name; - enum gpio_ctrl ctrl; -} gpio_controls[] = { - {"headphone-mute", HEADPHONE_MUTE}, - {"lineout-mute", LINEOUT_MUTE}, - {"amp-mute", AMP_MUTE}, - {"headphone-detect", HEADPHONE_DETECT}, - {"lineout-detect", LINEOUT_DETECT}, - {"line-output-detect", LINEOUT_DETECT}, - {"audio-hw-reset", AUDIO_HW_RESET}, - {"hw-reset", AUDIO_HW_RESET}, - {NULL, GPIO_CTRL_NUM} -}; - -static void i2s_cint(struct i2s_softc *); - -static void -aoagpio_int(void *cookie) -{ - device_t self = cookie; - struct aoagpio_softc *sc; - - sc = device_get_softc(self); - - if (macgpio_read(self) & GPIO_LEVEL_RO) - sc->level = sc->detect_active; - else - sc->level = !(sc->detect_active); - - if (sc->i2s) - i2s_cint(sc->i2s); -} - -static int -aoagpio_probe(device_t gpio) -{ - phandle_t node; - char bname[32]; - const char *name; - struct gpio_match *m; - struct aoagpio_softc *sc; - - node = ofw_bus_get_node(gpio); - if (node == 0 || node == -1) - return (EINVAL); - - bzero(bname, sizeof(bname)); - if (OF_getprop(node, "audio-gpio", bname, sizeof(bname)) > 2) - name = bname; - else - name = ofw_bus_get_name(gpio); - - /* Try to find a match. */ - for (m = gpio_controls; m->name != NULL; m++) { - if (strcmp(name, m->name) == 0) { - sc = device_get_softc(gpio); - gpio_ctrls[m->ctrl] = sc; - sc->dev = gpio; - sc->ctrl = m->ctrl; - sc->level = 0; - sc->detect_active = 0; - sc->i2s = NULL; - - OF_getprop(node, "audio-gpio-active-state", - &sc->detect_active, sizeof(sc->detect_active)); - - if ((1 << m->ctrl) & GPIO_CTRL_EXTINT_SET) - aoagpio_int(gpio); - - device_set_desc(gpio, m->name); - device_quiet(gpio); - return (0); - } - } - - return (ENXIO); -} - -static int -aoagpio_attach(device_t gpio) -{ - struct aoagpio_softc *sc; - struct resource *r; - void *cookie; - int irq, rid = 0; - - sc = device_get_softc(gpio); - - if ((1 << sc->ctrl) & GPIO_CTRL_EXTINT_SET) { - r = bus_alloc_resource_any(gpio, SYS_RES_IRQ, &rid, RF_ACTIVE); - if (r == NULL) - return (ENXIO); - - irq = rman_get_start(r); - DPRINTF(("interrupting at irq %d\n", irq)); - - if (powerpc_config_intr(irq, INTR_TRIGGER_EDGE, - INTR_POLARITY_LOW) != 0) - return (ENXIO); - - bus_setup_intr(gpio, r, INTR_TYPE_MISC | INTR_MPSAFE | - INTR_ENTROPY, NULL, aoagpio_int, gpio, &cookie); - } - - return (0); -} - -/* - * I2S module registers - */ -#define I2S_INT 0x00 -#define I2S_FORMAT 0x10 -#define I2S_FRAMECOUNT 0x40 -#define I2S_FRAMEMATCH 0x50 -#define I2S_WORDSIZE 0x60 - -/* I2S_INT register definitions */ -#define I2S_INT_CLKSTOPPEND 0x01000000 /* clock-stop interrupt pending */ - -/* I2S_FORMAT register definitions */ -#define CLKSRC_49MHz 0x80000000 /* Use 49152000Hz Osc. */ -#define CLKSRC_45MHz 0x40000000 /* Use 45158400Hz Osc. */ -#define CLKSRC_18MHz 0x00000000 /* Use 18432000Hz Osc. */ -#define MCLK_DIV_MASK 0x1f000000 /* MCLK = SRC / DIV */ -#define SCLK_DIV_MASK 0x00f00000 /* SCLK = MCLK / DIV */ -#define SCLK_MASTER 0x00080000 /* Master mode */ -#define SCLK_SLAVE 0x00000000 /* Slave mode */ -#define SERIAL_FORMAT 0x00070000 -#define SERIAL_SONY 0x00000000 -#define SERIAL_64x 0x00010000 -#define SERIAL_32x 0x00020000 -#define SERIAL_DAV 0x00040000 -#define SERIAL_SILICON 0x00050000 - -/* I2S_WORDSIZE register definitions */ -#define INPUT_STEREO (2 << 24) -#define INPUT_MONO (1 << 24) -#define INPUT_16BIT (0 << 16) -#define INPUT_24BIT (3 << 16) -#define OUTPUT_STEREO (2 << 8) -#define OUTPUT_MONO (1 << 8) -#define OUTPUT_16BIT (0 << 0) -#define OUTPUT_24BIT (3 << 0) - -/* Master clock, needed by some codecs. We hardcode this - to 256 * fs as this is valid for most codecs. */ -#define MCLK_FS 256 - -/* Number of clock sources we can use. */ -#define NCLKS 3 -static const struct i2s_clksrc { - u_int cs_clock; - u_int cs_reg; -} clksrc[NCLKS] = { - {49152000, CLKSRC_49MHz}, - {45158400, CLKSRC_45MHz}, - {18432000, CLKSRC_18MHz} -}; - -/* Configure the I2S controller for the required settings. - 'rate' is the frame rate. - 'wordsize' is the sample size (usually 16 bits). - 'sclk_fs' is the SCLK/framerate ratio, which needs to be equal - or greater to the number of bits per frame. */ - -static int -i2s_setup(struct i2s_softc *sc, u_int rate, u_int wordsize, u_int sclk_fs) -{ - u_int mclk, mdiv, sdiv; - u_int reg = 0, x, wordformat; - u_int i; - - /* Make sure the settings are consistent... */ - if ((wordsize * 2) > sclk_fs) - return (EINVAL); - - if (sclk_fs != 32 && sclk_fs != 64) - return (EINVAL); - - /* - * Find a clock source to derive the master clock (MCLK) - * and the I2S bit block (SCLK) and set the divisors as - * appropriate. - */ - mclk = rate * MCLK_FS; - sdiv = MCLK_FS / sclk_fs; - - for (i = 0; i < NCLKS; ++i) { - if ((clksrc[i].cs_clock % mclk) == 0) { - reg = clksrc[i].cs_reg; - mdiv = clksrc[i].cs_clock / mclk; - break; - } - } - if (reg == 0) - return (EINVAL); - - switch (mdiv) { - /* exception cases */ - case 1: - x = 14; - break; - case 3: - x = 13; - break; - case 5: - x = 12; - break; - default: - x = (mdiv / 2) - 1; - break; - } - reg |= (x << 24) & MCLK_DIV_MASK; - - switch (sdiv) { - case 1: - x = 8; - break; - case 3: - x = 9; - break; - default: - x = (sdiv / 2) - 1; - break; - } - reg |= (x << 20) & SCLK_DIV_MASK; - - /* - * XXX use master mode for now. This needs to be - * revisited if we want to add recording from SPDIF some day. - */ - reg |= SCLK_MASTER; - - switch (sclk_fs) { - case 64: - reg |= SERIAL_64x; - break; - case 32: - reg |= SERIAL_32x; - break; - } - - /* stereo input and output */ - wordformat = INPUT_STEREO | OUTPUT_STEREO; - - switch (wordsize) { - case 16: - wordformat |= INPUT_16BIT | OUTPUT_16BIT; - break; - case 24: - wordformat |= INPUT_24BIT | OUTPUT_24BIT; - break; - default: - return (EINVAL); - } - - x = bus_read_4(sc->reg, I2S_WORDSIZE); - if (x != wordformat) - bus_write_4(sc->reg, I2S_WORDSIZE, wordformat); - - x = bus_read_4(sc->reg, I2S_FORMAT); - if (x != reg) { - /* - * XXX to change the format we need to stop the clock - * via the FCR registers. For now, rely on the firmware - * to set sane defaults (44100). - */ - printf("i2s_setup: changing format not supported yet.\n"); - return (ENOTSUP); - -#ifdef notyet - if (obio_fcr_isset(OBIO_FCR1, I2S0CLKEN)) { - - bus_space_write_4(sc->sc_tag, sc->sc_bsh, I2S_INT, - I2S_INT_CLKSTOPPEND); - - obio_fcr_clear(OBIO_FCR1, I2S0CLKEN); - - for (timo = 1000; timo > 0; timo--) { - if (bus_space_read_4(sc->sc_tag, sc->sc_bsh, - I2S_INT) & I2S_INT_CLKSTOPPEND) - break; - - DELAY(10); - } - - if (timo == 0) - printf("%s: timeout waiting for clock to stop\n", - sc->sc_dev.dv_xname); - } - - bus_space_write_4(sc->sc_tag, sc->sc_bsh, I2S_FORMAT, reg); - - obio_fcr_set(OBIO_FCR1, I2S0CLKEN); -#endif - } - - return (0); -} - -/* XXX this does not belong here. */ -static phandle_t -of_find_firstchild_byname(phandle_t node, const char *req_name) -{ - char name[32]; /* max name len per OF spec. */ - phandle_t n; - - for (n = OF_child(node); n != -1; n = OF_peer(n)) { - bzero(name, sizeof(name)); - OF_getprop(n, "name", name, sizeof(name)); - - if (strcmp(name, req_name) == 0) - return (n); - } - - return (-1); -} - -static u_int -gpio_read(enum gpio_ctrl ctrl) -{ - struct aoagpio_softc *sc; - - if ((sc = gpio_ctrls[ctrl]) == NULL) - return (0); - - return (macgpio_read(sc->dev) & GPIO_DATA); -} - -static void -gpio_write(enum gpio_ctrl ctrl, u_int x) -{ - struct aoagpio_softc *sc; - u_int reg; - - if ((sc = gpio_ctrls[ctrl]) == NULL) - return; - - reg = GPIO_DDR_OUTPUT; - if (x) - reg |= GPIO_DATA; - - macgpio_write(sc->dev, reg); -} - -static void -i2s_cint(struct i2s_softc *sc) -{ - u_int mask = 0; - - if (gpio_ctrls[HEADPHONE_DETECT] && - gpio_ctrls[HEADPHONE_DETECT]->level) - mask |= 1 << 1; - - if (gpio_ctrls[LINEOUT_DETECT] && - gpio_ctrls[LINEOUT_DETECT]->level) - mask |= 1 << 2; - - if (mask == 0) - mask = 1 << 0; /* fall back to speakers. */ - - i2s_set_outputs(sc, mask); -} - -#define reset_active 0 - -/* these values are in microseconds */ -#define RESET_SETUP_TIME 5000 -#define RESET_HOLD_TIME 20000 -#define RESET_RELEASE_TIME 10000 - -static void -i2s_audio_hw_reset(struct i2s_softc *sc) -{ - if (gpio_ctrls[AUDIO_HW_RESET]) { - DPRINTF(("resetting codec\n")); - - gpio_write(AUDIO_HW_RESET, !reset_active); /* Negate RESET */ - DELAY(RESET_SETUP_TIME); - - gpio_write(AUDIO_HW_RESET, reset_active); /* Assert RESET */ - DELAY(RESET_HOLD_TIME); - - gpio_write(AUDIO_HW_RESET, !reset_active); /* Negate RESET */ - DELAY(RESET_RELEASE_TIME); - - } else { - DPRINTF(("no audio_hw_reset\n")); - } -} - -#define AMP_ACTIVE 0 /* XXX OF */ -#define HEADPHONE_ACTIVE 0 /* XXX OF */ -#define LINEOUT_ACTIVE 0 /* XXX OF */ - -#define MUTE_CONTROL(xxx, yyy) \ -static void \ -i2s_mute_##xxx(struct i2s_softc *sc, int mute) \ -{ \ - int x; \ - \ - if (gpio_ctrls[yyy##_MUTE] == NULL) \ - return; \ - if (mute) \ - x = yyy##_ACTIVE; \ - else \ - x = ! yyy##_ACTIVE; \ - \ - if (x != gpio_read(yyy##_MUTE)) \ - gpio_write(yyy##_MUTE, x); \ -} - -MUTE_CONTROL(speaker, AMP) -MUTE_CONTROL(headphone, HEADPHONE) -MUTE_CONTROL(lineout, LINEOUT) - -static void -i2s_set_outputs(void *ptr, u_int mask) -{ - struct i2s_softc *sc = ptr; - - if (mask == sc->output_mask) - return; - - mtx_lock(&sc->port_mtx); - - i2s_mute_speaker(sc, 1); - i2s_mute_headphone(sc, 1); - i2s_mute_lineout(sc, 1); - - DPRINTF(("enabled outputs: ")); - - if (mask & (1 << 0)) { - DPRINTF(("SPEAKER ")); - i2s_mute_speaker(sc, 0); - } - if (mask & (1 << 1)) { - DPRINTF(("HEADPHONE ")); - i2s_mute_headphone(sc, 0); - } - if (mask & (1 << 2)) { - DPRINTF(("LINEOUT ")); - i2s_mute_lineout(sc, 0); - } - - DPRINTF(("\n")); - sc->output_mask = mask; - - mtx_unlock(&sc->port_mtx); -} - -static void -i2s_postattach(void *xsc) -{ - struct i2s_softc *sc = xsc; - device_t self; - int i; - - self = sc->aoa.sc_dev; - - /* Reset the codec. */ - i2s_audio_hw_reset(sc); - - /* If we have a codec, initialize it. */ - if (i2s_mixer) - mixer_init(self, i2s_mixer_class, i2s_mixer); - - /* Read initial port status. */ - i2s_cint(sc); - - /* Enable GPIO interrupt callback. */ - for (i = 0; i < GPIO_CTRL_NUM; i++) - if (gpio_ctrls[i]) - gpio_ctrls[i]->i2s = sc; - - config_intrhook_disestablish(i2s_delayed_attach); - free(i2s_delayed_attach, M_TEMP); -} diff --git a/sys/dev/sound/macio/onyx.c b/sys/dev/sound/macio/onyx.c deleted file mode 100644 index 67e4f098e73..00000000000 --- a/sys/dev/sound/macio/onyx.c +++ /dev/null @@ -1,315 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2012 by Andreas Tobler. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Apple PCM3052 aka Onyx audio codec. - * - * Datasheet: http://www.ti.com/product/pcm3052a - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#ifdef HAVE_KERNEL_OPTION_HEADERS -#include "opt_snd.h" -#endif - -#include - -#include "mixer_if.h" - -extern kobj_class_t i2s_mixer_class; -extern device_t i2s_mixer; - -struct onyx_softc -{ - device_t sc_dev; - uint32_t sc_addr; -}; - -static int onyx_probe(device_t); -static int onyx_attach(device_t); -static int onyx_init(struct snd_mixer *m); -static int onyx_uninit(struct snd_mixer *m); -static int onyx_reinit(struct snd_mixer *m); -static int onyx_set(struct snd_mixer *m, unsigned dev, unsigned left, - unsigned right); -static u_int32_t onyx_setrecsrc(struct snd_mixer *m, u_int32_t src); - -static device_method_t onyx_methods[] = { - /* Device interface. */ - DEVMETHOD(device_probe, onyx_probe), - DEVMETHOD(device_attach, onyx_attach), - { 0, 0 } -}; - -static driver_t onyx_driver = { - "onyx", - onyx_methods, - sizeof(struct onyx_softc) -}; -static devclass_t onyx_devclass; - -DRIVER_MODULE(onyx, iicbus, onyx_driver, onyx_devclass, 0, 0); -MODULE_VERSION(onyx, 1); -MODULE_DEPEND(onyx, iicbus, 1, 1, 1); - -static kobj_method_t onyx_mixer_methods[] = { - KOBJMETHOD(mixer_init, onyx_init), - KOBJMETHOD(mixer_uninit, onyx_uninit), - KOBJMETHOD(mixer_reinit, onyx_reinit), - KOBJMETHOD(mixer_set, onyx_set), - KOBJMETHOD(mixer_setrecsrc, onyx_setrecsrc), - KOBJMETHOD_END -}; - -MIXER_DECLARE(onyx_mixer); - -#define PCM3052_IICADDR 0x8C /* Hard-coded I2C slave addr */ - -/* - * PCM3052 registers. - * Numbering in decimal as used in the data sheet. - */ -#define PCM3052_REG_LEFT_ATTN 65 -#define PCM3052_REG_RIGHT_ATTN 66 -#define PCM3052_REG_CONTROL 67 -#define PCM3052_MRST (1 << 7) -#define PCM3052_SRST (1 << 6) -#define PCM3052_REG_DAC_CONTROL 68 -#define PCM3052_OVR1 (1 << 6) -#define PCM3052_MUTE_L (1 << 1) -#define PCM3052_MUTE_R (1 << 0) -#define PCM3052_REG_DAC_DEEMPH 69 -#define PCM3052_REG_DAC_FILTER 70 -#define PCM3052_DAC_FILTER_ALWAYS (1 << 2) -#define PCM3052_REG_OUT_PHASE 71 -#define PCM3052_REG_ADC_CONTROL 72 -#define PCM3052_REG_ADC_HPF_BP 75 -#define PCM3052_HPF_ALWAYS (1 << 2) -#define PCM3052_REG_INFO_1 77 -#define PCM3052_REG_INFO_2 78 -#define PCM3052_REG_INFO_3 79 -#define PCM3052_REG_INFO_4 80 - -struct onyx_reg { - u_char LEFT_ATTN; - u_char RIGHT_ATTN; - u_char CONTROL; - u_char DAC_CONTROL; - u_char DAC_DEEMPH; - u_char DAC_FILTER; - u_char OUT_PHASE; - u_char ADC_CONTROL; - u_char ADC_HPF_BP; - u_char INFO_1; - u_char INFO_2; - u_char INFO_3; - u_char INFO_4; -}; - -static const struct onyx_reg onyx_initdata = { - 0x80, /* LEFT_ATTN, Mute default */ - 0x80, /* RIGHT_ATTN, Mute default */ - PCM3052_MRST | PCM3052_SRST, /* CONTROL */ - 0, /* DAC_CONTROL */ - 0, /* DAC_DEEMPH */ - PCM3052_DAC_FILTER_ALWAYS, /* DAC_FILTER */ - 0, /* OUT_PHASE */ - (-1 /* dB */ + 8) & 0xf, /* ADC_CONTROL */ - PCM3052_HPF_ALWAYS, /* ADC_HPF_BP */ - (1 << 2), /* INFO_1 */ - 2, /* INFO_2, */ - 0, /* INFO_3, CLK 0 (level II), - SF 0 (44.1 kHz) */ - 1 /* INFO_4, VALIDL/R 0, - WL 24-bit depth */ -}; - -static int -onyx_write(struct onyx_softc *sc, uint8_t reg, const uint8_t value) -{ - u_int size; - uint8_t buf[16]; - - struct iic_msg msg[] = { - { sc->sc_addr, IIC_M_WR, 0, buf } - }; - - size = 1; - msg[0].len = size + 1; - buf[0] = reg; - buf[1] = value; - - iicbus_transfer(sc->sc_dev, msg, 1); - - return (0); -} - -static int -onyx_probe(device_t dev) -{ - const char *name, *compat; - - name = ofw_bus_get_name(dev); - if (name == NULL) - return (ENXIO); - - if (strcmp(name, "codec") == 0) { - if (iicbus_get_addr(dev) != PCM3052_IICADDR) - return (ENXIO); - } else if (strcmp(name, "codec") == 0) { - compat = ofw_bus_get_compat(dev); - if (compat == NULL || strcmp(compat, "pcm3052") != 0) - return (ENXIO); - } else - return (ENXIO); - - device_set_desc(dev, "Texas Instruments PCM3052 Audio Codec"); - return (0); -} - -static int -onyx_attach(device_t dev) -{ - struct onyx_softc *sc; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - sc->sc_addr = iicbus_get_addr(dev); - - i2s_mixer_class = &onyx_mixer_class; - i2s_mixer = dev; - - return (0); -} - -static int -onyx_init(struct snd_mixer *m) -{ - struct onyx_softc *sc; - u_int x = 0; - - sc = device_get_softc(mix_getdevinfo(m)); - - onyx_write(sc, PCM3052_REG_LEFT_ATTN, onyx_initdata.LEFT_ATTN); - onyx_write(sc, PCM3052_REG_RIGHT_ATTN, onyx_initdata.RIGHT_ATTN); - onyx_write(sc, PCM3052_REG_CONTROL, onyx_initdata.CONTROL); - onyx_write(sc, PCM3052_REG_DAC_CONTROL, - onyx_initdata.DAC_CONTROL); - onyx_write(sc, PCM3052_REG_DAC_DEEMPH, onyx_initdata.DAC_DEEMPH); - onyx_write(sc, PCM3052_REG_DAC_FILTER, onyx_initdata.DAC_FILTER); - onyx_write(sc, PCM3052_REG_OUT_PHASE, onyx_initdata.OUT_PHASE); - onyx_write(sc, PCM3052_REG_ADC_CONTROL, - onyx_initdata.ADC_CONTROL); - onyx_write(sc, PCM3052_REG_ADC_HPF_BP, onyx_initdata.ADC_HPF_BP); - onyx_write(sc, PCM3052_REG_INFO_1, onyx_initdata.INFO_1); - onyx_write(sc, PCM3052_REG_INFO_2, onyx_initdata.INFO_2); - onyx_write(sc, PCM3052_REG_INFO_3, onyx_initdata.INFO_3); - onyx_write(sc, PCM3052_REG_INFO_4, onyx_initdata.INFO_4); - - x |= SOUND_MASK_VOLUME; - mix_setdevs(m, x); - - return (0); -} - -static int -onyx_uninit(struct snd_mixer *m) -{ - return (0); -} - -static int -onyx_reinit(struct snd_mixer *m) -{ - return (0); -} - -static int -onyx_set(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) -{ - struct onyx_softc *sc; - struct mtx *mixer_lock; - int locked; - uint8_t l, r; - - sc = device_get_softc(mix_getdevinfo(m)); - mixer_lock = mixer_get_lock(m); - locked = mtx_owned(mixer_lock); - - switch (dev) { - case SOUND_MIXER_VOLUME: - - /* - * We need to unlock the mixer lock because iicbus_transfer() - * may sleep. The mixer lock itself is unnecessary here - * because it is meant to serialize hardware access, which - * is taken care of by the I2C layer, so this is safe. - */ - if (left > 100 || right > 100) - return (0); - - l = left + 128; - r = right + 128; - - if (locked) - mtx_unlock(mixer_lock); - - onyx_write(sc, PCM3052_REG_LEFT_ATTN, l); - onyx_write(sc, PCM3052_REG_RIGHT_ATTN, r); - - if (locked) - mtx_lock(mixer_lock); - - return (left | (right << 8)); - } - - return (0); -} - -static u_int32_t -onyx_setrecsrc(struct snd_mixer *m, u_int32_t src) -{ - return (0); -} diff --git a/sys/dev/sound/macio/snapper.c b/sys/dev/sound/macio/snapper.c deleted file mode 100644 index efb03da67e3..00000000000 --- a/sys/dev/sound/macio/snapper.c +++ /dev/null @@ -1,489 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause AND BSD-3-Clause - * - * Copyright 2008 by Marco Trillo. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/*- - * Copyright (c) 2002, 2003 Tsubai Masanari. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * NetBSD: snapper.c,v 1.28 2008/05/16 03:49:54 macallan Exp - * Id: snapper.c,v 1.11 2002/10/31 17:42:13 tsubai Exp - */ - -/* - * Apple Snapper audio. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#ifdef HAVE_KERNEL_OPTION_HEADERS -#include "opt_snd.h" -#endif - -#include - -#include "mixer_if.h" - -extern kobj_class_t i2s_mixer_class; -extern device_t i2s_mixer; - -struct snapper_softc -{ - device_t sc_dev; - uint32_t sc_addr; -}; - -static int snapper_probe(device_t); -static int snapper_attach(device_t); -static int snapper_init(struct snd_mixer *m); -static int snapper_uninit(struct snd_mixer *m); -static int snapper_reinit(struct snd_mixer *m); -static int snapper_set(struct snd_mixer *m, unsigned dev, unsigned left, - unsigned right); -static u_int32_t snapper_setrecsrc(struct snd_mixer *m, u_int32_t src); - -static device_method_t snapper_methods[] = { - /* Device interface. */ - DEVMETHOD(device_probe, snapper_probe), - DEVMETHOD(device_attach, snapper_attach), - { 0, 0 } -}; - -static driver_t snapper_driver = { - "snapper", - snapper_methods, - sizeof(struct snapper_softc) -}; -static devclass_t snapper_devclass; - -DRIVER_MODULE(snapper, iicbus, snapper_driver, snapper_devclass, 0, 0); -MODULE_VERSION(snapper, 1); -MODULE_DEPEND(snapper, iicbus, 1, 1, 1); - -static kobj_method_t snapper_mixer_methods[] = { - KOBJMETHOD(mixer_init, snapper_init), - KOBJMETHOD(mixer_uninit, snapper_uninit), - KOBJMETHOD(mixer_reinit, snapper_reinit), - KOBJMETHOD(mixer_set, snapper_set), - KOBJMETHOD(mixer_setrecsrc, snapper_setrecsrc), - KOBJMETHOD_END -}; - -MIXER_DECLARE(snapper_mixer); - -#define SNAPPER_IICADDR 0x6a /* Hard-coded I2C slave addr */ - -/* Snapper (Texas Instruments TAS3004) registers. */ -#define SNAPPER_MCR1 0x01 /* Main control register 1 (1byte) */ -#define SNAPPER_DRC 0x02 /* Dynamic range compression (6bytes) */ -#define SNAPPER_VOLUME 0x04 /* Volume (6bytes) */ -#define SNAPPER_TREBLE 0x05 /* Treble control (1byte) */ -#define SNAPPER_BASS 0x06 /* Bass control (1byte) */ -#define SNAPPER_MIXER_L 0x07 /* Mixer left gain (9bytes) */ -#define SNAPPER_MIXER_R 0x08 /* Mixer right gain (9bytes) */ -#define SNAPPER_LB0 0x0a /* Left biquad 0 (15bytes) */ -#define SNAPPER_LB1 0x0b /* Left biquad 1 (15bytes) */ -#define SNAPPER_LB2 0x0c /* Left biquad 2 (15bytes) */ -#define SNAPPER_LB3 0x0d /* Left biquad 3 (15bytes) */ -#define SNAPPER_LB4 0x0e /* Left biquad 4 (15bytes) */ -#define SNAPPER_LB5 0x0f /* Left biquad 5 (15bytes) */ -#define SNAPPER_LB6 0x10 /* Left biquad 6 (15bytes) */ -#define SNAPPER_RB0 0x13 /* Right biquad 0 (15bytes) */ -#define SNAPPER_RB1 0x14 /* Right biquad 1 (15bytes) */ -#define SNAPPER_RB2 0x15 /* Right biquad 2 (15bytes) */ -#define SNAPPER_RB3 0x16 /* Right biquad 3 (15bytes) */ -#define SNAPPER_RB4 0x17 /* Right biquad 4 (15bytes) */ -#define SNAPPER_RB5 0x18 /* Right biquad 5 (15bytes) */ -#define SNAPPER_RB6 0x19 /* Right biquad 6 (15bytes) */ -#define SNAPPER_LLB 0x21 /* Left loudness biquad (15bytes) */ -#define SNAPPER_RLB 0x22 /* Right loudness biquad (15bytes) */ -#define SNAPPER_LLB_GAIN 0x23 /* Left loudness biquad gain (3bytes) */ -#define SNAPPER_RLB_GAIN 0x24 /* Right loudness biquad gain (3bytes) */ -#define SNAPPER_ACR 0x40 /* Analog control register (1byte) */ -#define SNAPPER_MCR2 0x43 /* Main control register 2 (1byte) */ -#define SNAPPER_MCR1_FL 0x80 /* Fast load */ -#define SNAPPER_MCR1_SC 0x40 /* SCLK frequency */ -#define SNAPPER_MCR1_SC_32 0x00 /* 32fs */ -#define SNAPPER_MCR1_SC_64 0x40 /* 64fs */ -#define SNAPPER_MCR1_SM 0x30 /* Output serial port mode */ -#define SNAPPER_MCR1_SM_L 0x00 /* Left justified */ -#define SNAPPER_MCR1_SM_R 0x10 /* Right justified */ -#define SNAPPER_MCR1_SM_I2S 0x20 /* I2S */ -#define SNAPPER_MCR1_W 0x03 /* Serial port word length */ -#define SNAPPER_MCR1_W_16 0x00 /* 16 bit */ -#define SNAPPER_MCR1_W_18 0x01 /* 18 bit */ -#define SNAPPER_MCR1_W_20 0x02 /* 20 bit */ -#define SNAPPER_MCR1_W_24 0x03 /* 24 bit */ -#define SNAPPER_MCR2_DL 0x80 /* Download */ -#define SNAPPER_MCR2_AP 0x02 /* All pass mode */ -#define SNAPPER_ACR_ADM 0x80 /* ADC output mode */ -#define SNAPPER_ACR_LRB 0x40 /* Select B input */ -#define SNAPPER_ACR_DM 0x0c /* De-emphasis control */ -#define SNAPPER_ACR_DM_OFF 0x00 /* off */ -#define SNAPPER_ACR_DM_48 0x04 /* fs = 48kHz */ -#define SNAPPER_ACR_DM_44 0x08 /* fs = 44.1kHz */ -#define SNAPPER_ACR_INP 0x02 /* Analog input select */ -#define SNAPPER_ACR_INP_A 0x00 /* A */ -#define SNAPPER_ACR_INP_B 0x02 /* B */ -#define SNAPPER_ACR_APD 0x01 /* Analog power down */ - -struct snapper_reg { - u_char MCR1[1]; - u_char DRC[6]; - u_char VOLUME[6]; - u_char TREBLE[1]; - u_char BASS[1]; - u_char MIXER_L[9]; - u_char MIXER_R[9]; - u_char LB0[15]; - u_char LB1[15]; - u_char LB2[15]; - u_char LB3[15]; - u_char LB4[15]; - u_char LB5[15]; - u_char LB6[15]; - u_char RB0[15]; - u_char RB1[15]; - u_char RB2[15]; - u_char RB3[15]; - u_char RB4[15]; - u_char RB5[15]; - u_char RB6[15]; - u_char LLB[15]; - u_char RLB[15]; - u_char LLB_GAIN[3]; - u_char RLB_GAIN[3]; - u_char ACR[1]; - u_char MCR2[1]; -}; - -static const struct snapper_reg snapper_initdata = { - { SNAPPER_MCR1_SC_64 | SNAPPER_MCR1_SM_I2S | - SNAPPER_MCR1_W_16 }, /* MCR1 */ - { 1, 0, 0, 0, 0, 0 }, /* DRC */ - { 0, 0, 0, 0, 0, 0 }, /* VOLUME */ - { 0x72 }, /* TREBLE */ - { 0x72 }, /* BASS */ - { 0x10, 0x00, 0x00, 0, 0, 0, 0, 0, 0 }, /* MIXER_L */ - { 0x10, 0x00, 0x00, 0, 0, 0, 0, 0, 0 }, /* MIXER_R */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0, 0, 0 }, /* LLB_GAIN */ - { 0, 0, 0 }, /* RLB_GAIN */ - { SNAPPER_ACR_ADM | SNAPPER_ACR_LRB | SNAPPER_ACR_INP_B },/* ACR */ - { SNAPPER_MCR2_AP } /* MCR2 */ -}; - -static const char snapper_regsize[] = { - 0, /* 0x00 */ - sizeof snapper_initdata.MCR1, /* 0x01 */ - sizeof snapper_initdata.DRC, /* 0x02 */ - 0, /* 0x03 */ - sizeof snapper_initdata.VOLUME, /* 0x04 */ - sizeof snapper_initdata.TREBLE, /* 0x05 */ - sizeof snapper_initdata.BASS, /* 0x06 */ - sizeof snapper_initdata.MIXER_L, /* 0x07 */ - sizeof snapper_initdata.MIXER_R, /* 0x08 */ - 0, /* 0x09 */ - sizeof snapper_initdata.LB0, /* 0x0a */ - sizeof snapper_initdata.LB1, /* 0x0b */ - sizeof snapper_initdata.LB2, /* 0x0c */ - sizeof snapper_initdata.LB3, /* 0x0d */ - sizeof snapper_initdata.LB4, /* 0x0e */ - sizeof snapper_initdata.LB5, /* 0x0f */ - sizeof snapper_initdata.LB6, /* 0x10 */ - 0, /* 0x11 */ - 0, /* 0x12 */ - sizeof snapper_initdata.RB0, /* 0x13 */ - sizeof snapper_initdata.RB1, /* 0x14 */ - sizeof snapper_initdata.RB2, /* 0x15 */ - sizeof snapper_initdata.RB3, /* 0x16 */ - sizeof snapper_initdata.RB4, /* 0x17 */ - sizeof snapper_initdata.RB5, /* 0x18 */ - sizeof snapper_initdata.RB6, /* 0x19 */ - 0,0,0,0, 0,0, - 0, /* 0x20 */ - sizeof snapper_initdata.LLB, /* 0x21 */ - sizeof snapper_initdata.RLB, /* 0x22 */ - sizeof snapper_initdata.LLB_GAIN, /* 0x23 */ - sizeof snapper_initdata.RLB_GAIN, /* 0x24 */ - 0,0,0,0, 0,0,0,0, 0,0,0, - 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0, - sizeof snapper_initdata.ACR, /* 0x40 */ - 0, /* 0x41 */ - 0, /* 0x42 */ - sizeof snapper_initdata.MCR2 /* 0x43 */ -}; - -/* dB = 20 * log (x) table. */ -static u_int snapper_volume_table[100] = { - 0x00000148, 0x0000015C, 0x00000171, 0x00000186, // -46.0, -45.5, -45.0, -44.5, - 0x0000019E, 0x000001B6, 0x000001D0, 0x000001EB, // -44.0, -43.5, -43.0, -42.5, - 0x00000209, 0x00000227, 0x00000248, 0x0000026B, // -42.0, -41.5, -41.0, -40.5, - 0x0000028F, 0x000002B6, 0x000002DF, 0x0000030B, // -40.0, -39.5, -39.0, -38.5, - 0x00000339, 0x0000036A, 0x0000039E, 0x000003D5, // -38.0, -37.5, -37.0, -36.5, - 0x0000040F, 0x0000044C, 0x0000048D, 0x000004D2, // -36.0, -35.5, -35.0, -34.5, - 0x0000051C, 0x00000569, 0x000005BB, 0x00000612, // -34.0, -33.5, -33.0, -32.5, - 0x0000066E, 0x000006D0, 0x00000737, 0x000007A5, // -32.0, -31.5, -31.0, -30.5, - 0x00000818, 0x00000893, 0x00000915, 0x0000099F, // -30.0, -29.5, -29.0, -28.5, - 0x00000A31, 0x00000ACC, 0x00000B6F, 0x00000C1D, // -28.0, -27.5, -27.0, -26.5, - 0x00000CD5, 0x00000D97, 0x00000E65, 0x00000F40, // -26.0, -25.5, -25.0, -24.5, - 0x00001027, 0x0000111C, 0x00001220, 0x00001333, // -24.0, -23.5, -23.0, -22.5, - 0x00001456, 0x0000158A, 0x000016D1, 0x0000182B, // -22.0, -21.5, -21.0, -20.5, - 0x0000199A, 0x00001B1E, 0x00001CB9, 0x00001E6D, // -20.0, -19.5, -19.0, -18.5, - 0x0000203A, 0x00002223, 0x00002429, 0x0000264E, // -18.0, -17.5, -17.0, -16.5, - 0x00002893, 0x00002AFA, 0x00002D86, 0x00003039, // -16.0, -15.5, -15.0, -14.5, - 0x00003314, 0x0000361B, 0x00003950, 0x00003CB5, // -14.0, -13.5, -13.0, -12.5, - 0x0000404E, 0x0000441D, 0x00004827, 0x00004C6D, // -12.0, -11.5, -11.0, -10.5, - 0x000050F4, 0x000055C0, 0x00005AD5, 0x00006037, // -10.0, -9.5, -9.0, -8.5, - 0x000065EA, 0x00006BF4, 0x0000725A, 0x00007920, // -8.0, -7.5, -7.0, -6.5, - 0x0000804E, 0x000087EF, 0x00008FF6, 0x0000987D, // -6.0, -5.5, -5.0, -4.5, - 0x0000A186, 0x0000AB19, 0x0000B53C, 0x0000BFF9, // -4.0, -3.5, -3.0, -2.5, - 0x0000CB59, 0x0000D766, 0x0000E429, 0x0000F1AE, // -2.0, -1.5, -1.0, -0.5, - 0x00010000, 0x00010F2B, 0x00011F3D, 0x00013042, // 0.0, +0.5, +1.0, +1.5, - 0x00014249, 0x00015562, 0x0001699C, 0x00017F09 // 2.0, +2.5, +3.0, +3.5, -}; - -static int -snapper_write(struct snapper_softc *sc, uint8_t reg, const void *data) -{ - u_int size; - uint8_t buf[16]; - - struct iic_msg msg[] = { - { sc->sc_addr, IIC_M_WR, 0, buf } - }; - - KASSERT(reg < sizeof(snapper_regsize), ("bad reg")); - size = snapper_regsize[reg]; - msg[0].len = size + 1; - buf[0] = reg; - memcpy(&buf[1], data, size); - - iicbus_transfer(sc->sc_dev, msg, 1); - - return (0); -} - -static int -snapper_probe(device_t dev) -{ - const char *name, *compat; - - name = ofw_bus_get_name(dev); - if (name == NULL) - return (ENXIO); - - if (strcmp(name, "deq") == 0) { - if (iicbus_get_addr(dev) != SNAPPER_IICADDR) - return (ENXIO); - } else if (strcmp(name, "codec") == 0) { - compat = ofw_bus_get_compat(dev); - if (compat == NULL || strcmp(compat, "tas3004") != 0) - return (ENXIO); - } else { - return (ENXIO); - } - - device_set_desc(dev, "Texas Instruments TAS3004 Audio Codec"); - return (0); -} - -static int -snapper_attach(device_t dev) -{ - struct snapper_softc *sc; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - sc->sc_addr = iicbus_get_addr(dev); - - i2s_mixer_class = &snapper_mixer_class; - i2s_mixer = dev; - - return (0); -} - -static int -snapper_init(struct snd_mixer *m) -{ - struct snapper_softc *sc; - u_int x = 0; - - sc = device_get_softc(mix_getdevinfo(m)); - - snapper_write(sc, SNAPPER_LB0, snapper_initdata.LB0); - snapper_write(sc, SNAPPER_LB1, snapper_initdata.LB1); - snapper_write(sc, SNAPPER_LB2, snapper_initdata.LB2); - snapper_write(sc, SNAPPER_LB3, snapper_initdata.LB3); - snapper_write(sc, SNAPPER_LB4, snapper_initdata.LB4); - snapper_write(sc, SNAPPER_LB5, snapper_initdata.LB5); - snapper_write(sc, SNAPPER_LB6, snapper_initdata.LB6); - snapper_write(sc, SNAPPER_RB0, snapper_initdata.RB0); - snapper_write(sc, SNAPPER_RB1, snapper_initdata.RB1); - snapper_write(sc, SNAPPER_RB1, snapper_initdata.RB1); - snapper_write(sc, SNAPPER_RB2, snapper_initdata.RB2); - snapper_write(sc, SNAPPER_RB3, snapper_initdata.RB3); - snapper_write(sc, SNAPPER_RB4, snapper_initdata.RB4); - snapper_write(sc, SNAPPER_RB5, snapper_initdata.RB5); - snapper_write(sc, SNAPPER_RB6, snapper_initdata.RB6); - snapper_write(sc, SNAPPER_MCR1, snapper_initdata.MCR1); - snapper_write(sc, SNAPPER_MCR2, snapper_initdata.MCR2); - snapper_write(sc, SNAPPER_DRC, snapper_initdata.DRC); - snapper_write(sc, SNAPPER_VOLUME, snapper_initdata.VOLUME); - snapper_write(sc, SNAPPER_TREBLE, snapper_initdata.TREBLE); - snapper_write(sc, SNAPPER_BASS, snapper_initdata.BASS); - snapper_write(sc, SNAPPER_MIXER_L, snapper_initdata.MIXER_L); - snapper_write(sc, SNAPPER_MIXER_R, snapper_initdata.MIXER_R); - snapper_write(sc, SNAPPER_LLB, snapper_initdata.LLB); - snapper_write(sc, SNAPPER_RLB, snapper_initdata.RLB); - snapper_write(sc, SNAPPER_LLB_GAIN, snapper_initdata.LLB_GAIN); - snapper_write(sc, SNAPPER_RLB_GAIN, snapper_initdata.RLB_GAIN); - snapper_write(sc, SNAPPER_ACR, snapper_initdata.ACR); - - x |= SOUND_MASK_VOLUME; - mix_setdevs(m, x); - - return (0); -} - -static int -snapper_uninit(struct snd_mixer *m) -{ - return (0); -} - -static int -snapper_reinit(struct snd_mixer *m) -{ - return (0); -} - -static int -snapper_set(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) -{ - struct snapper_softc *sc; - struct mtx *mixer_lock; - int locked; - u_int l, r; - u_char reg[6]; - - sc = device_get_softc(mix_getdevinfo(m)); - mixer_lock = mixer_get_lock(m); - locked = mtx_owned(mixer_lock); - - if (left > 100 || right > 100) - return (0); - - l = (left == 0) ? 0 : snapper_volume_table[left - 1]; - r = (right == 0) ? 0 : snapper_volume_table[right - 1]; - - switch (dev) { - case SOUND_MIXER_VOLUME: - reg[0] = (l & 0xff0000) >> 16; - reg[1] = (l & 0x00ff00) >> 8; - reg[2] = l & 0x0000ff; - reg[3] = (r & 0xff0000) >> 16; - reg[4] = (r & 0x00ff00) >> 8; - reg[5] = r & 0x0000ff; - - /* - * We need to unlock the mixer lock because iicbus_transfer() - * may sleep. The mixer lock itself is unnecessary here - * because it is meant to serialize hardware access, which - * is taken care of by the I2C layer, so this is safe. - */ - - if (locked) - mtx_unlock(mixer_lock); - - snapper_write(sc, SNAPPER_VOLUME, reg); - - if (locked) - mtx_lock(mixer_lock); - - return (left | (right << 8)); - } - - return (0); -} - -static u_int32_t -snapper_setrecsrc(struct snd_mixer *m, u_int32_t src) -{ - return (0); -} diff --git a/sys/dev/sound/macio/tumbler.c b/sys/dev/sound/macio/tumbler.c deleted file mode 100644 index d1cfe97332a..00000000000 --- a/sys/dev/sound/macio/tumbler.c +++ /dev/null @@ -1,436 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause AND BSD-3-Clause - * - * Copyright 2008 by Marco Trillo. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/*- - * Copyright (c) 2002, 2003 Tsubai Masanari. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * NetBSD: tumbler.c,v 1.28 2008/05/16 03:49:54 macallan Exp - * Id: tumbler.c,v 1.11 2002/10/31 17:42:13 tsubai Exp - */ - -/* - * Apple I2S audio controller. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#ifdef HAVE_KERNEL_OPTION_HEADERS -#include "opt_snd.h" -#endif - -#include - -#include "mixer_if.h" - -extern kobj_class_t i2s_mixer_class; -extern device_t i2s_mixer; - -struct tumbler_softc -{ - device_t sc_dev; - uint32_t sc_addr; -}; - -static int tumbler_probe(device_t); -static int tumbler_attach(device_t); -static int tumbler_init(struct snd_mixer *m); -static int tumbler_uninit(struct snd_mixer *m); -static int tumbler_reinit(struct snd_mixer *m); -static int tumbler_set(struct snd_mixer *m, unsigned dev, unsigned left, - unsigned right); -static u_int32_t tumbler_setrecsrc(struct snd_mixer *m, u_int32_t src); - -static device_method_t tumbler_methods[] = { - /* Device interface. */ - DEVMETHOD(device_probe, tumbler_probe), - DEVMETHOD(device_attach, tumbler_attach), - { 0, 0 } -}; - -static driver_t tumbler_driver = { - "tumbler", - tumbler_methods, - sizeof(struct tumbler_softc) -}; -static devclass_t tumbler_devclass; - -DRIVER_MODULE(tumbler, iicbus, tumbler_driver, tumbler_devclass, 0, 0); -MODULE_VERSION(tumbler, 1); -MODULE_DEPEND(tumbler, iicbus, 1, 1, 1); - -static kobj_method_t tumbler_mixer_methods[] = { - KOBJMETHOD(mixer_init, tumbler_init), - KOBJMETHOD(mixer_uninit, tumbler_uninit), - KOBJMETHOD(mixer_reinit, tumbler_reinit), - KOBJMETHOD(mixer_set, tumbler_set), - KOBJMETHOD(mixer_setrecsrc, tumbler_setrecsrc), - KOBJMETHOD_END -}; - -MIXER_DECLARE(tumbler_mixer); - -#define TUMBLER_IICADDR 0x68 /* Tumbler I2C slave address */ - -/* Tumbler (Texas Instruments TAS3001) registers. */ -#define TUMBLER_MCR 0x01 /* Main control register (1byte) */ -#define TUMBLER_DRC 0x02 /* Dynamic Range Compression (2bytes) */ -#define TUMBLER_VOLUME 0x04 /* Volume (6bytes) */ -#define TUMBLER_TREBLE 0x05 /* Treble control (1byte) */ -#define TUMBLER_BASS 0x06 /* Bass control (1byte) */ -#define TUMBLER_MIXER1 0x07 /* Mixer1 (3bytes) */ -#define TUMBLER_MIXER2 0x08 /* Mixer2 (3bytes) */ -#define TUMBLER_LB0 0x0a /* Left biquad 0 (15bytes) */ -#define TUMBLER_LB1 0x0b /* Left biquad 1 (15bytes) */ -#define TUMBLER_LB2 0x0c /* Left biquad 2 (15bytes) */ -#define TUMBLER_LB3 0x0d /* Left biquad 3 (15bytes) */ -#define TUMBLER_LB4 0x0e /* Left biquad 4 (15bytes) */ -#define TUMBLER_LB5 0x0f /* Left biquad 5 (15bytes) */ -#define TUMBLER_RB0 0x13 /* Right biquad 0 (15bytes) */ -#define TUMBLER_RB1 0x14 /* Right biquad 1 (15bytes) */ -#define TUMBLER_RB2 0x15 /* Right biquad 2 (15bytes) */ -#define TUMBLER_RB3 0x16 /* Right biquad 3 (15bytes) */ -#define TUMBLER_RB4 0x17 /* Right biquad 4 (15bytes) */ -#define TUMBLER_RB5 0x18 /* Right biquad 5 (15bytes) */ -#define TUMBLER_MCR_FL 0x80 /* Fast load */ -#define TUMBLER_MCR_SC 0x40 /* SCLK frequency */ -#define TUMBLER_MCR_SC_32 0x00 /* 32fs */ -#define TUMBLER_MCR_SC_64 0x40 /* 64fs */ -#define TUMBLER_MCR_SM 0x30 /* Output serial port mode */ -#define TUMBLER_MCR_SM_L 0x00 /* Left justified */ -#define TUMBLER_MCR_SM_R 0x10 /* Right justified */ -#define TUMBLER_MCR_SM_I2S 0x20 /* I2S */ -#define TUMBLER_MCR_ISM 0x0C /* Input serial mode */ -#define TUMBLER_MCR_ISM_L 0x00 -#define TUMBLER_MCR_ISM_R 0x04 -#define TUMBLER_MCR_ISM_I2S 0x08 -#define TUMBLER_MCR_W 0x03 /* Serial port word length */ -#define TUMBLER_MCR_W_16 0x00 /* 16 bit */ -#define TUMBLER_MCR_W_18 0x01 /* 18 bit */ -#define TUMBLER_MCR_W_20 0x02 /* 20 bit */ -#define TUMBLER_DRC_COMP_31 0xc0 /* 3:1 compression */ -#define TUMBLER_DRC_ENABLE 0x01 /* enable DRC */ -#define TUMBLER_DRC_DEFL_TH 0xa0 /* default compression threshold */ - -/* - * Tumbler codec. - */ - -struct tumbler_reg { - u_char MCR[1]; - u_char DRC[2]; - u_char VOLUME[6]; - u_char TREBLE[1]; - u_char BASS[1]; - u_char MIXER1[3]; - u_char MIXER2[3]; - u_char LB0[15]; - u_char LB1[15]; - u_char LB2[15]; - u_char LB3[15]; - u_char LB4[15]; - u_char LB5[15]; - u_char RB0[15]; - u_char RB1[15]; - u_char RB2[15]; - u_char RB3[15]; - u_char RB4[15]; - u_char RB5[15]; -}; - -const struct tumbler_reg tumbler_initdata = { - { TUMBLER_MCR_SC_64 | TUMBLER_MCR_SM_I2S | - TUMBLER_MCR_ISM_I2S | TUMBLER_MCR_W_16 }, /* MCR */ - { TUMBLER_DRC_COMP_31, TUMBLER_DRC_DEFL_TH }, /* DRC */ - { 0, 0, 0, 0, 0, 0 }, /* VOLUME */ - { 0x72 }, /* TREBLE */ - { 0x3e }, /* BASS */ - { 0x10, 0x00, 0x00 }, /* MIXER1 */ - { 0x00, 0x00, 0x00 }, /* MIXER2 */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* BIQUAD */ - { 0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } /* BIQUAD */ -}; - -const char tumbler_regsize[] = { - 0, /* 0x00 */ - sizeof tumbler_initdata.MCR, /* 0x01 */ - sizeof tumbler_initdata.DRC, /* 0x02 */ - 0, /* 0x03 */ - sizeof tumbler_initdata.VOLUME, /* 0x04 */ - sizeof tumbler_initdata.TREBLE, /* 0x05 */ - sizeof tumbler_initdata.BASS, /* 0x06 */ - sizeof tumbler_initdata.MIXER1, /* 0x07 */ - sizeof tumbler_initdata.MIXER2, /* 0x08 */ - 0, /* 0x09 */ - sizeof tumbler_initdata.LB0, /* 0x0a */ - sizeof tumbler_initdata.LB1, /* 0x0b */ - sizeof tumbler_initdata.LB2, /* 0x0c */ - sizeof tumbler_initdata.LB3, /* 0x0d */ - sizeof tumbler_initdata.LB4, /* 0x0e */ - sizeof tumbler_initdata.LB5, /* 0x0f */ - 0, /* 0x10 */ - 0, /* 0x11 */ - 0, /* 0x12 */ - sizeof tumbler_initdata.RB0, /* 0x13 */ - sizeof tumbler_initdata.RB1, /* 0x14 */ - sizeof tumbler_initdata.RB2, /* 0x15 */ - sizeof tumbler_initdata.RB3, /* 0x16 */ - sizeof tumbler_initdata.RB4, /* 0x17 */ - sizeof tumbler_initdata.RB5 /* 0x18 */ -}; - -/* dB = 20 * log (x) table. */ -static u_int tumbler_volume_table[100] = { - 0x00000148, 0x0000015C, 0x00000171, 0x00000186, // -46.0, -45.5, -45.0, -44.5, - 0x0000019E, 0x000001B6, 0x000001D0, 0x000001EB, // -44.0, -43.5, -43.0, -42.5, - 0x00000209, 0x00000227, 0x00000248, 0x0000026B, // -42.0, -41.5, -41.0, -40.5, - 0x0000028F, 0x000002B6, 0x000002DF, 0x0000030B, // -40.0, -39.5, -39.0, -38.5, - 0x00000339, 0x0000036A, 0x0000039E, 0x000003D5, // -38.0, -37.5, -37.0, -36.5, - 0x0000040F, 0x0000044C, 0x0000048D, 0x000004D2, // -36.0, -35.5, -35.0, -34.5, - 0x0000051C, 0x00000569, 0x000005BB, 0x00000612, // -34.0, -33.5, -33.0, -32.5, - 0x0000066E, 0x000006D0, 0x00000737, 0x000007A5, // -32.0, -31.5, -31.0, -30.5, - 0x00000818, 0x00000893, 0x00000915, 0x0000099F, // -30.0, -29.5, -29.0, -28.5, - 0x00000A31, 0x00000ACC, 0x00000B6F, 0x00000C1D, // -28.0, -27.5, -27.0, -26.5, - 0x00000CD5, 0x00000D97, 0x00000E65, 0x00000F40, // -26.0, -25.5, -25.0, -24.5, - 0x00001027, 0x0000111C, 0x00001220, 0x00001333, // -24.0, -23.5, -23.0, -22.5, - 0x00001456, 0x0000158A, 0x000016D1, 0x0000182B, // -22.0, -21.5, -21.0, -20.5, - 0x0000199A, 0x00001B1E, 0x00001CB9, 0x00001E6D, // -20.0, -19.5, -19.0, -18.5, - 0x0000203A, 0x00002223, 0x00002429, 0x0000264E, // -18.0, -17.5, -17.0, -16.5, - 0x00002893, 0x00002AFA, 0x00002D86, 0x00003039, // -16.0, -15.5, -15.0, -14.5, - 0x00003314, 0x0000361B, 0x00003950, 0x00003CB5, // -14.0, -13.5, -13.0, -12.5, - 0x0000404E, 0x0000441D, 0x00004827, 0x00004C6D, // -12.0, -11.5, -11.0, -10.5, - 0x000050F4, 0x000055C0, 0x00005AD5, 0x00006037, // -10.0, -9.5, -9.0, -8.5, - 0x000065EA, 0x00006BF4, 0x0000725A, 0x00007920, // -8.0, -7.5, -7.0, -6.5, - 0x0000804E, 0x000087EF, 0x00008FF6, 0x0000987D, // -6.0, -5.5, -5.0, -4.5, - 0x0000A186, 0x0000AB19, 0x0000B53C, 0x0000BFF9, // -4.0, -3.5, -3.0, -2.5, - 0x0000CB59, 0x0000D766, 0x0000E429, 0x0000F1AE, // -2.0, -1.5, -1.0, -0.5, - 0x00010000, 0x00010F2B, 0x00011F3D, 0x00013042, // 0.0, +0.5, +1.0, +1.5, - 0x00014249, 0x00015562, 0x0001699C, 0x00017F09 // 2.0, +2.5, +3.0, +3.5, -}; - -static int -tumbler_write(struct tumbler_softc *sc, uint8_t reg, const void *data) -{ - u_int size; - uint8_t buf[16]; - - struct iic_msg msg[] = { - { sc->sc_addr, IIC_M_WR, 0, buf } - }; - - KASSERT(reg < sizeof(tumbler_regsize), ("bad reg")); - size = tumbler_regsize[reg]; - msg[0].len = size + 1; - buf[0] = reg; - memcpy(&buf[1], data, size); - - iicbus_transfer(sc->sc_dev, msg, 1); - - return (0); -} - -static int -tumbler_probe(device_t dev) -{ - const char *name; - - name = ofw_bus_get_name(dev); - if (name == NULL) - return (ENXIO); - - if (strcmp(name, "deq") == 0 && iicbus_get_addr(dev) == - TUMBLER_IICADDR) { - device_set_desc(dev, "Texas Instruments TAS3001 Audio Codec"); - return (0); - } - - return (ENXIO); -} - -static int -tumbler_attach(device_t dev) -{ - struct tumbler_softc *sc; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - sc->sc_addr = iicbus_get_addr(dev); - - i2s_mixer_class = &tumbler_mixer_class; - i2s_mixer = dev; - - return (0); -} - -static int -tumbler_init(struct snd_mixer *m) -{ - struct tumbler_softc *sc; - u_int x = 0; - - sc = device_get_softc(mix_getdevinfo(m)); - - tumbler_write(sc, TUMBLER_LB0, tumbler_initdata.LB0); - tumbler_write(sc, TUMBLER_LB1, tumbler_initdata.LB1); - tumbler_write(sc, TUMBLER_LB2, tumbler_initdata.LB2); - tumbler_write(sc, TUMBLER_LB3, tumbler_initdata.LB3); - tumbler_write(sc, TUMBLER_LB4, tumbler_initdata.LB4); - tumbler_write(sc, TUMBLER_LB5, tumbler_initdata.LB5); - tumbler_write(sc, TUMBLER_RB0, tumbler_initdata.RB0); - tumbler_write(sc, TUMBLER_RB1, tumbler_initdata.RB1); - tumbler_write(sc, TUMBLER_RB1, tumbler_initdata.RB1); - tumbler_write(sc, TUMBLER_RB2, tumbler_initdata.RB2); - tumbler_write(sc, TUMBLER_RB3, tumbler_initdata.RB3); - tumbler_write(sc, TUMBLER_RB4, tumbler_initdata.RB4); - tumbler_write(sc, TUMBLER_RB5, tumbler_initdata.RB5); - tumbler_write(sc, TUMBLER_MCR, tumbler_initdata.MCR); - tumbler_write(sc, TUMBLER_DRC, tumbler_initdata.DRC); - tumbler_write(sc, TUMBLER_VOLUME, tumbler_initdata.VOLUME); - tumbler_write(sc, TUMBLER_TREBLE, tumbler_initdata.TREBLE); - tumbler_write(sc, TUMBLER_BASS, tumbler_initdata.BASS); - tumbler_write(sc, TUMBLER_MIXER1, tumbler_initdata.MIXER1); - tumbler_write(sc, TUMBLER_MIXER2, tumbler_initdata.MIXER2); - - x |= SOUND_MASK_VOLUME; - mix_setdevs(m, x); - - return (0); -} - -static int -tumbler_uninit(struct snd_mixer *m) -{ - return (0); -} - -static int -tumbler_reinit(struct snd_mixer *m) -{ - return (0); -} - -static int -tumbler_set(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) -{ - struct tumbler_softc *sc; - struct mtx *mixer_lock; - int locked; - u_int l, r; - u_char reg[6]; - - sc = device_get_softc(mix_getdevinfo(m)); - mixer_lock = mixer_get_lock(m); - locked = mtx_owned(mixer_lock); - - switch (dev) { - case SOUND_MIXER_VOLUME: - if (left > 100 || right > 100) - return (0); - - l = (left == 0 ? 0 : tumbler_volume_table[left - 1]); - r = (right == 0 ? 0 : tumbler_volume_table[right - 1]); - - reg[0] = (l & 0xff0000) >> 16; - reg[1] = (l & 0x00ff00) >> 8; - reg[2] = l & 0x0000ff; - reg[3] = (r & 0xff0000) >> 16; - reg[4] = (r & 0x00ff00) >> 8; - reg[5] = r & 0x0000ff; - - /* - * We need to unlock the mixer lock because iicbus_transfer() - * may sleep. The mixer lock itself is unnecessary here - * because it is meant to serialize hardware access, which - * is taken care of by the I2C layer, so this is safe. - */ - - if (locked) - mtx_unlock(mixer_lock); - - tumbler_write(sc, TUMBLER_VOLUME, reg); - - if (locked) - mtx_lock(mixer_lock); - - return (left | (right << 8)); - } - - return (0); -} - -static u_int32_t -tumbler_setrecsrc(struct snd_mixer *m, u_int32_t src) -{ - return (0); -} diff --git a/sys/dev/uart/uart_cpu_powerpc.c b/sys/dev/uart/uart_cpu_powerpc.c deleted file mode 100644 index 30a89c740ce..00000000000 --- a/sys/dev/uart/uart_cpu_powerpc.c +++ /dev/null @@ -1,202 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -bus_space_tag_t uart_bus_space_io = &bs_le_tag; -bus_space_tag_t uart_bus_space_mem = &bs_le_tag; - -int -uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2) -{ - - return ((pmap_kextract(b1->bsh) == pmap_kextract(b2->bsh)) ? 1 : 0); -} - -static int -ofw_get_uart_console(phandle_t opts, phandle_t *result, const char *inputdev, - const char *outputdev) -{ - char buf[64]; - phandle_t input; - - if (OF_getprop(opts, inputdev, buf, sizeof(buf)) == -1) - return (ENXIO); - input = OF_finddevice(buf); - if (input == -1) - return (ENXIO); - - if (outputdev != NULL) { - if (OF_getprop(opts, outputdev, buf, sizeof(buf)) == -1) - return (ENXIO); - if (OF_finddevice(buf) != input) - return (ENXIO); - } - - *result = input; - return (0); -} - -static int -ofw_get_console_phandle_path(phandle_t node, phandle_t *result, - const char *prop) -{ - union { - char buf[64]; - phandle_t ref; - } field; - phandle_t output; - ssize_t size; - - size = OF_getproplen(node, prop); - if (size == -1) - return (ENXIO); - OF_getprop(node, prop, &field, sizeof(field)); - - /* This property might be either a ihandle or path. Hooray. */ - - output = -1; - if (field.buf[size - 1] == 0) - output = OF_finddevice(field.buf); - if (output == -1 && size == 4) - output = OF_instance_to_package(field.ref); - - if (output != -1) { - *result = output; - return (0); - } - - return (ENXIO); -} - -int -uart_cpu_getdev(int devtype, struct uart_devinfo *di) -{ - char buf[64]; - struct uart_class *class; - phandle_t input, opts, chosen; - int error; - - opts = OF_finddevice("/options"); - chosen = OF_finddevice("/chosen"); - switch (devtype) { - case UART_DEV_CONSOLE: - error = ENXIO; - if (chosen != -1 && error != 0) - error = ofw_get_uart_console(chosen, &input, - "stdout-path", NULL); - if (chosen != -1 && error != 0) - error = ofw_get_uart_console(chosen, &input, - "linux,stdout-path", NULL); - if (chosen != -1 && error != 0) - error = ofw_get_console_phandle_path(chosen, &input, - "stdout"); - if (chosen != -1 && error != 0) - error = ofw_get_uart_console(chosen, &input, - "stdin-path", NULL); - if (chosen != -1 && error != 0) - error = ofw_get_console_phandle_path(chosen, &input, - "stdin"); - if (opts != -1 && error != 0) - error = ofw_get_uart_console(opts, &input, - "input-device", "output-device"); - if (opts != -1 && error != 0) - error = ofw_get_uart_console(opts, &input, - "input-device-1", "output-device-1"); - if (error != 0) { - input = OF_finddevice("serial0"); /* Last ditch */ - if (input == -1) - error = (ENXIO); - } - - if (error != 0) - return (error); - break; - case UART_DEV_DBGPORT: - if (!getenv_string("hw.uart.dbgport", buf, sizeof(buf))) - return (ENXIO); - input = OF_finddevice(buf); - if (input == -1) - return (ENXIO); - break; - default: - return (EINVAL); - } - - if (OF_getprop(input, "device_type", buf, sizeof(buf)) == -1) - return (ENXIO); - if (strcmp(buf, "serial") != 0) - return (ENXIO); - - if (ofw_bus_node_is_compatible(input, "chrp,es")) { - class = &uart_z8530_class; - di->bas.regshft = 4; - di->bas.chan = 1; - } else if (ofw_bus_node_is_compatible(input,"ns16550") || - ofw_bus_node_is_compatible(input,"ns8250")) { - class = &uart_ns8250_class; - di->bas.regshft = 0; - di->bas.chan = 0; - } else - return (ENXIO); - - if (class == NULL) - return (ENXIO); - - error = OF_decode_addr(input, 0, &di->bas.bst, &di->bas.bsh, NULL); - if (error) - return (error); - - di->ops = uart_getops(class); - - if (OF_getprop(input, "clock-frequency", &di->bas.rclk, - sizeof(di->bas.rclk)) == -1) - di->bas.rclk = 230400; - if (OF_getprop(input, "current-speed", &di->baudrate, - sizeof(di->baudrate)) == -1) - di->baudrate = 0; - OF_getprop(input, "reg-shift", &di->bas.regshft, - sizeof(di->bas.regshft)); - - di->databits = 8; - di->stopbits = 1; - di->parity = UART_PARITY_NONE; - return (0); -} diff --git a/sys/dev/usb/usb_freebsd.h b/sys/dev/usb/usb_freebsd.h index 98498c6cd2b..ed8fb463036 100644 --- a/sys/dev/usb/usb_freebsd.h +++ b/sys/dev/usb/usb_freebsd.h @@ -63,8 +63,8 @@ #if (!defined(USB_HOST_ALIGN)) || (USB_HOST_ALIGN <= 0) /* Use default value. */ #undef USB_HOST_ALIGN -#if defined(__arm__) || defined(__mips__) || defined(__powerpc__) -#define USB_HOST_ALIGN 32 /* Arm and MIPS need at least this much, if not more */ +#if defined(__arm__) +#define USB_HOST_ALIGN 32 /* Arm needs at least this much, if not more */ #else #define USB_HOST_ALIGN 8 /* bytes, must be power of two */ #endif diff --git a/sys/dts/Makefile b/sys/dts/Makefile index b12317302e2..527e42238e2 100644 --- a/sys/dts/Makefile +++ b/sys/dts/Makefile @@ -1,4 +1,4 @@ -SUBDIR=arm mips powerpc +SUBDIR=arm .include diff --git a/sys/dts/mips/Makefile b/sys/dts/mips/Makefile deleted file mode 100644 index fd046873943..00000000000 --- a/sys/dts/mips/Makefile +++ /dev/null @@ -1,6 +0,0 @@ - -DTS!=ls ${.CURDIR}/*.dts - -all: test-dts - -.include diff --git a/sys/dts/mips/beri-netfpga.dts b/sys/dts/mips/beri-netfpga.dts deleted file mode 100644 index bc47af51ecb..00000000000 --- a/sys/dts/mips/beri-netfpga.dts +++ /dev/null @@ -1,160 +0,0 @@ -/*- - * Copyright (c) 2012-2013 Robert N. M. Watson - * Copyright (c) 2013 SRI International - * Copyright (c) 2013-2014 Bjoern A. Zeeb - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-11-C-0249) - * ("MRC2"), as part of the DARPA MRC research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/dts-v1/; - -/* - * Device names here have been largely made up on the spot, especially for the - * "compatible" strings, and might want to be revised. - */ - -/ { - model = "SRI/Cambridge Beri (NetFPGA)"; - compatible = "sri-cambridge,beri-netfpga"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <1>; - - /* - * Secondary CPUs all start disabled and use the - * spin-table enable method. cpu-release-addr must be - * specified for each cpu other than cpu@0. Values of - * cpu-release-addr grow down from 0x100000 (kernel). - */ - status = "disabled"; - enable-method = "spin-table"; - - cpu@0 { - device-type = "cpu"; - compatible = "sri-cambridge,beri"; - - reg = <0 1>; - status = "okay"; - }; - -/* - cpu@1 { - device-type = "cpu"; - compatible = "sri-cambridge,beri"; - - reg = <1 1>; - // XXX: should we need cached prefix? - cpu-release-addr = <0xffffffff 0x800fffe0>; - }; -*/ - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0FFFFFFF>; // ~256M at 0x0 - }; - - cpuintc: cpuintc@0 { - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - compatible = "mti,cpu-interrupt-controller"; - }; - - beripic: beripic@7f804000 { - compatible = "sri-cambridge,beri-pic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x7f804000 0x400 - 0x7f806000 0x10 - 0x7f806080 0x10 - 0x7f806100 0x10>; - interrupts = < 2 3 4 5 6 >; - hard-interrupt-sources = <64>; - soft-interrupt-sources = <64>; - interrupt-parent = <&cpuintc>; - }; - - soc { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <1>; - - compatible = "simple-bus", "mips,mips4k"; - ranges; - - serial0: serial@7f000000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f000000 0x40>; -/* - interrupts = <0>; - interrupt-parent = <&beripic>; -*/ - }; - -/* - serial0: serial@7f002100 { - compatible = "ns16550"; - reg = <0x7f002100 0x20>; - reg-shift = <2>; - clock-frequency = <100000000>; - interrupts = <8>; - interrupt-parent = <&beripic>; - }; -*/ - - ethernet@7f005000 { - compatible = "netfpag10g,nf10bmac"; - // LOOP, TX, RX, INTR - reg = <0x7f005000 0x20 - 0x7f005020 0x30 - 0x7f005050 0x30 - 0x7f005100 0x10>; - // RX - interrupts = <1>; - interrupt-parent = <&beripic>; - }; - }; - - aliases { - serial0 = &serial0; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - bootargs = "-v"; - }; -}; diff --git a/sys/dts/mips/beri-sim.dts b/sys/dts/mips/beri-sim.dts deleted file mode 100644 index 91051d23806..00000000000 --- a/sys/dts/mips/beri-sim.dts +++ /dev/null @@ -1,158 +0,0 @@ -/*- - * Copyright (c) 2012-2013 Robert N. M. Watson - * Copyright (c) 2013 SRI International - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/dts-v1/; - -/* - * Device names here have been largely made up on the spot, especially for the - * "compatible" strings, and might want to be revised. - * - * For now, use 32-bit addressing as our Avalon bus is 32-bit. However, in - * the future, we should likely change to 64-bit. - */ - -/ { - model = "SRI/Cambridge BERI simulation"; - compatible = "sri-cambridge,beri-sim"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <1>; - - /* - * Secondary CPUs all start disabled and use the - * spin-table enable method. cpu-release-addr must be - * specified for each cpu other than cpu@0. Values of - * cpu-release-addr grow down from 0x100000 (kernel). - */ - status = "disabled"; - enable-method = "spin-table"; - - cpu@0 { - device-type = "cpu"; - compatible = "sri-cambridge,beri"; - - reg = <0 1>; - status = "okay"; - }; - -/* - cpu@1 { - device-type = "cpu"; - compatible = "sri-cambridge,beri"; - - reg = <1 1>; - // XXX: should we need cached prefix? - cpu-release-addr = <0xffffffff 0x800fffe0>; - }; -*/ - }; - - memory { - device_type = "memory"; - reg = <0x0 0x4000000>; // 64M at 0x0 - }; - - cpuintc: cpuintc@0 { - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - compatible = "mti,cpu-interrupt-controller"; - }; - - beripic0: beripic@7f804000 { - compatible = "sri-cambridge,beri-pic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x7f804000 0x400 - 0x7f806000 0x10 - 0x7f806080 0x10 - 0x7f806100 0x10>; - interrupts = < 2 3 4 5 6 >; - hard-interrupt-sources = <64>; - soft-interrupt-sources = <64>; - interrupt-parent = <&cpuintc>; - }; - - soc { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <1>; - - compatible = "simple-bus", "mips,mips4k"; - ranges; - - serial@7f000000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f000000 0x40>; - interrupts = <0>; - interrupt-parent = <&beripic0>; - }; - - serial@7f001000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f001000 0x40>; - }; - - serial@7f002000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f002000 0x40>; - }; - - virtio_mmio_platform0: virtio_mmio_platform@0 { - compatible = "beri,virtio_mmio_platform"; - interrupts = <1>; - interrupt-parent = <&beripic0>; - }; - - virtio_block@7f020000 { - compatible = "virtio,mmio"; - reg = <0x7f020000 0x1000>; - platform = <&virtio_mmio_platform0>; - }; - - sdcard@7f008000 { - compatible = "altera,sdcard_11_2011"; - reg = <0x7f008000 0x400>; - }; - - avgen@0x7f00a000 { - compatible = "sri-cambridge,avgen"; - reg = <0x7f00a000 0x14>; - sri-cambridge,width = <4>; - sri-cambridge,fileio = "rw"; - sri-cambridge,devname = "berirom"; - }; - }; -}; diff --git a/sys/dts/mips/beripad-de4.dts b/sys/dts/mips/beripad-de4.dts deleted file mode 100644 index bdff0d734b7..00000000000 --- a/sys/dts/mips/beripad-de4.dts +++ /dev/null @@ -1,334 +0,0 @@ -/*- - * Copyright (c) 2012-2013 Robert N. M. Watson - * Copyright (c) 2013 SRI International - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/dts-v1/; - -/* - * Device names here have been largely made up on the spot, especially for the - * "compatible" strings, and might want to be revised. - * - * For now, use 32-bit addressing as our Avalon bus is 32-bit. However, in - * the future, we should likely change to 64-bit. - */ - -/ { - model = "SRI/Cambridge BeriPad (DE4)"; - compatible = "sri-cambridge,beripad-de4"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <1>; - - /* - * Secondary CPUs all start disabled and use the - * spin-table enable method. cpu-release-addr must be - * specified for each cpu other than cpu@0. Values of - * cpu-release-addr grow down from 0x100000 (kernel). - */ - status = "disabled"; - enable-method = "spin-table"; - - cpu@0 { - device-type = "cpu"; - compatible = "sri-cambridge,beri"; - - reg = <0 1>; - status = "okay"; - }; - -/* - cpu@1 { - device-type = "cpu"; - compatible = "sri-cambridge,beri"; - - reg = <1 1>; - // XXX: should we need cached prefix? - cpu-release-addr = <0xffffffff 0x800fffe0>; - }; -*/ - }; - - memory { - device_type = "memory"; - reg = <0x0 0x40000000>; // 1G at 0x0 - }; - - cpuintc: cpuintc@0 { - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - compatible = "mti,cpu-interrupt-controller"; - }; - - beripic0: beripic@7f804000 { - compatible = "sri-cambridge,beri-pic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x7f804000 0x400 - 0x7f806000 0x10 - 0x7f806080 0x10 - 0x7f806100 0x10>; - interrupts = < 2 3 4 5 6 >; - hard-interrupt-sources = <64>; - soft-interrupt-sources = <64>; - interrupt-parent = <&cpuintc>; - }; - -/* - beripic1: beripic@7f808000 { - compatible = "sri-cambridge,beri-pic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x7f808000 0x400 - 0x7f80a000 0x10 - 0x7f80a080 0x10 - 0x7f80a100 0x10>; - interrupts = < 2 3 4 5 6 >; - hard-interrupt-sources = <64>; - soft-interrupt-sources = <64>; - interrupt-parent = <&cpuintc>; - }; -*/ - - soc { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <1>; - - compatible = "simple-bus", "mips,mips4k"; - ranges; - - serial@7f002100 { - compatible = "ns16550"; - reg = <0x7f002100 0x20>; - reg-shift = <2>; - clock-frequency = <50000000>; - interrupts = <6>; - interrupt-parent = <&beripic0>; - }; - - serial@7f000000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f000000 0x40>; - interrupts = <0>; - interrupt-parent = <&beripic0>; - }; - - serial@7f001000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f001000 0x40>; - }; - - serial@7f002000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f002000 0x40>; - }; - - sdcard@7f008000 { - compatible = "altera,sdcard_11_2011"; - reg = <0x7f008000 0x400>; - }; - - led@7f006000 { - compatible = "sri-cambridge,de4led"; - reg = <0x7f006000 0x1>; - }; - - /* - * XXX-BZ keep flash before ethernet so that atse can read the - * Ethernet addresses for now. - */ - flash@74000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x74000000 0x4000000>; - - /* Board configuration */ - partition@0 { - reg = <0x0 0x20000>; - label = "config"; - }; - - /* Power up FPGA image */ - partition@20000 { - reg = <0x20000 0xc00000>; - label = "fpga0"; - }; - - /* Secondary FPGA image (on RE_CONFIGn button) */ - partition@C20000 { - reg = <0xc20000 0xc00000>; - label = "fpga1"; - }; - - /* Space for operating system use */ - partition@1820000 { - reg = <0x1820000 0x027c0000>; - label = "os"; - }; - - /* Second stage bootloader */ - parition@3fe0000 { - reg = <0x3fe0000 0x20000>; - label = "boot"; - }; - }; - - msgdma0: msgdma@80004080 { - compatible = "altr,msgdma-16.0", "altr,msgdma-1.0"; - reg = <0x80004080 0x00000020>, - <0x800040a0 0x00000020>; - reg-names = "csr", "descriptor_slave"; - interrupts = <14>; - interrupt-parent = <&beripic0>; - #dma-cells = <3>; - }; - - msgdma1: msgdma@80004000 { - compatible = "altr,msgdma-16.0", "altr,msgdma-1.0"; - reg = <0x80004000 0x00000020>, - <0x80004020 0x00000020>; - reg-names = "csr", "descriptor_slave"; - interrupts = <13>; - interrupt-parent = <&beripic0>; - #dma-cells = <3>; - }; - - softdma0: softdma@7f007400 { - compatible = "altr,softdma"; - reg = < 0x7f007400 0x8 /* tx */ - 0x7f007420 0x20 >; /* txc */ - interrupts = <2>; - interrupt-parent = <&beripic0>; - #dma-cells = <3>; - }; - - softdma1: softdma@7f007500 { - compatible = "altr,softdma"; - reg = < 0x7f007500 0x8 /* rx */ - 0x7f007520 0x20 >; /* rxc */ - interrupts = <1>; - interrupt-parent = <&beripic0>; - #dma-cells = <3>; - }; - - softdma2: softdma@7f005400 { - compatible = "altr,softdma"; - reg = < 0x7f005400 0x8 /* tx */ - 0x7f005420 0x20 >; /* txc */ - interrupts = <12>; - interrupt-parent = <&beripic0>; - #dma-cells = <3>; - }; - - softdma3: softdma@7f005500 { - compatible = "altr,softdma"; - reg = < 0x7f005500 0x8 /* rx */ - 0x7f005520 0x20 >; /* rxc */ - interrupts = <11>; - interrupt-parent = <&beripic0>; - #dma-cells = <3>; - }; - - ethernet@80007000 { - compatible = "altera,atse"; - reg = <0x80007000 0x400>; /* mac */ - dmas = <&msgdma0 0 0 0xffffffff>, - <&msgdma1 1 1 0xffffffff>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - ethernet@7f007000 { - compatible = "altera,atse"; - reg = <0x7f007000 0x400>; /* mac */ - dmas = <&softdma0 0 0 0xffffffff>, - <&softdma1 1 1 0xffffffff>; - dma-names = "tx", "rx"; - status = "okay"; - }; - - ethernet@7f005000 { - compatible = "altera,atse"; - reg = <0x7f005000 0x400>; - dmas = <&softdma2 0 0 0xffffffff>, - <&softdma3 1 1 0xffffffff>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - touchscreen@70400000 { - compatible = "sri-cambridge,mtl"; - panel-size = < 800 480 >; - reg = <0x70400000 0x1000 - 0x70000000 0x177000 - 0x70177000 0x2000>; - }; - - usb@0x7f100000 { - compatible = "nxp,usb-isp1761"; - reg = <0x7f100000 0x40000 - 0x7f140000 0x4>; - // IRQ 4 is DC, IRQ 5 is HC. - interrupts = <4 5>; - interrupt-parent = <&beripic0>; - }; - - avgen@0x7f009000 { - compatible = "sri-cambridge,avgen"; - reg = <0x7f009000 0x2>; - sri-cambridge,width = <1>; - sri-cambridge,fileio = "r"; - sri-cambridge,devname = "de4bsw"; - }; - - avgen@0x7f00a000 { - compatible = "sri-cambridge,avgen"; - reg = <0x7f00a000 0x14>; - sri-cambridge,width = <4>; - sri-cambridge,fileio = "rw"; - sri-cambridge,devname = "berirom"; - }; - - avgen@0x7f00c000 { - compatible = "sri-cambridge,avgen"; - reg = <0x7f00c000 0x8>; - sri-cambridge,width = <4>; - sri-cambridge,fileio = "rw"; - sri-cambridge,devname = "de4tempfan"; - }; - }; -}; diff --git a/sys/dts/mips/beripad-sockit.dts b/sys/dts/mips/beripad-sockit.dts deleted file mode 100644 index 6aa437df5e2..00000000000 --- a/sys/dts/mips/beripad-sockit.dts +++ /dev/null @@ -1,221 +0,0 @@ -/*- - * Copyright (c) 2012-2013 Robert N. M. Watson - * Copyright (c) 2013-2014 SRI International - * Copyright (c) 2014 Ruslan Bukin - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/dts-v1/; - -/* - * Device names here have been largely made up on the spot, especially for the - * "compatible" strings, and might want to be revised. - */ - -/ { - model = "SRI/Cambridge BeriPad (SoCKit)"; - compatible = "sri-cambridge,beripad-sockit"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <1>; - - /* - * Secondary CPUs all start disabled and use the - * spin-table enable method. cpu-release-addr must be - * specified for each cpu other than cpu@0. Values of - * cpu-release-addr grow down from 0x100000 (kernel). - */ - status = "disabled"; - enable-method = "spin-table"; - - cpu@0 { - device-type = "cpu"; - compatible = "sri-cambridge,beri"; - - reg = <0 1>; - status = "okay"; - }; - -/* - cpu@1 { - device-type = "cpu"; - compatible = "sri-cambridge,beri"; - - reg = <1 1>; - // XXX: should we need cached prefix? - cpu-release-addr = <0xffffffff 0x800fffe0>; - }; -*/ - }; - - memory { - device_type = "memory"; - reg = <0x0 0x10000000>; /* 256MB at 0x0 */ - }; - - cpuintc: cpuintc@0 { - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - compatible = "mti,cpu-interrupt-controller"; - }; - - beripic0: beripic@7f804000 { - compatible = "sri-cambridge,beri-pic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x0 0x7f804000 0x0 0x400 - 0x0 0x7f806000 0x0 0x10 - 0x0 0x7f806080 0x0 0x10 - 0x0 0x7f806100 0x0 0x10>; - interrupts = < 2 3 4 5 6 >; - hard-interrupt-sources = <64>; - soft-interrupt-sources = <64>; - interrupt-parent = <&cpuintc>; - }; - - soc { - #address-cells = <2>; - #size-cells = <2>; - #interrupt-cells = <1>; - - compatible = "simple-bus", "mips,mips4k"; - ranges; - - pio0: pio@7f020000 { - compatible = "altr,pio"; - reg = <0x0 0x7f020000 0x0 0x1000>; /* send */ - interrupts = <4>; /* not used */ - interrupt-parent = <&beripic0>; - }; - - pio1: pio@7f021000 { - compatible = "altr,pio"; - reg = <0x0 0x7f021000 0x0 0x1000>; /* recv */ - interrupts = <10>; - interrupt-parent = <&beripic0>; - }; - - pio2: pio@7f022000 { - compatible = "altr,pio"; - reg = <0x0 0x7f022000 0x0 0x1000>; /* send */ - interrupts = <5>; /* not used */ - interrupt-parent = <&beripic0>; - }; - - pio3: pio@7f023000 { - compatible = "altr,pio"; - reg = <0x0 0x7f023000 0x0 0x1000>; /* recv */ - interrupts = <11>; - interrupt-parent = <&beripic0>; - }; - - virtio_mmio_platform0: virtio_mmio_platform@0 { - compatible = "beri,virtio_mmio_platform"; - pio-send = <&pio0>; - pio-recv = <&pio1>; - }; - - virtio_mmio_platform1: virtio_mmio_platform@1 { - compatible = "beri,virtio_mmio_platform"; - pio-send = <&pio2>; - pio-recv = <&pio3>; - }; - - virtio_block@200001000 { - compatible = "virtio,mmio"; - reg = <0x2 0x1000 0x0 0x1000>; - platform = <&virtio_mmio_platform0>; - status = "okay"; - }; - - virtio_net@200002000 { - compatible = "virtio,mmio"; - reg = <0x2 0x2000 0x0 0x1000>; - platform = <&virtio_mmio_platform1>; - status = "okay"; - }; - - serial@7f000000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x0 0x7f000000 0x0 0x40>; - interrupts = <0>; - interrupt-parent = <&beripic0>; - }; - -/* - serial@7f001000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f001000 0x40>; - }; - - serial@7f002000 { - compatible = "altera,jtag_uart-11_0"; - reg = <0x7f002000 0x40>; - }; -*/ - -/* - led@7f006000 { - compatible = "sri-cambridge,de4led"; - reg = <0x7f006000 0x1>; - }; -*/ - -/* - avgen@0x7f009000 { - compatible = "sri-cambridge,avgen"; - reg = <0x7f009000 0x2>; - sri-cambridge,width = <1>; - sri-cambridge,fileio = "r"; - sri-cambridge,devname = "de4bsw"; - }; -*/ - -/* - berirom@0x7f00a000 { - compatible = "sri-cambridge,berirom"; - reg = <0x7f00a000 0x1000>; - }; -*/ - -/* - avgen@0x7f00c000 { - compatible = "sri-cambridge,avgen"; - reg = <0x7f00c000 0x8>; - sri-cambridge,width = <4>; - sri-cambridge,fileio = "rw"; - sri-cambridge,devname = "de4tempfan"; - }; -*/ - }; -}; diff --git a/sys/dts/mips/fbsd-mt7620a.dtsi b/sys/dts/mips/fbsd-mt7620a.dtsi deleted file mode 100644 index 6ef95d11a66..00000000000 --- a/sys/dts/mips/fbsd-mt7620a.dtsi +++ /dev/null @@ -1,8 +0,0 @@ - -&pcie { - /* - * Our driver is different that OpenWRT's, so we need slightly - * different values for the reg property - */ - reg = <0x10140000 0x10000>; -}; diff --git a/sys/dts/mips/fbsd-mt7621.dtsi b/sys/dts/mips/fbsd-mt7621.dtsi deleted file mode 100644 index eb51442650c..00000000000 --- a/sys/dts/mips/fbsd-mt7621.dtsi +++ /dev/null @@ -1,48 +0,0 @@ - -&palmbus { - gpio@600 { - /* - * Mark gpio as compatible to simple-bus and override - * its #size-cells and provide a default ranges property - * so we can attach instances of our mtk_gpio_v2 driver - * to it for now. Provide exactly the same resources to - * the instances of mtk_gpio_v2. - */ - compatible = "simple-bus"; - ranges = <0x0 0x600 0x100>; - #size-cells = <1>; - - interrupt-parent = <&gic>; - - gpio0: bank@0 { - reg = <0x0 0x100>; - interrupts = <0 6 4>; - }; - - gpio1: bank@1 { - reg = <0x0 0x100>; - interrupts = <0 6 4>; - }; - - gpio2: bank@2 { - reg = <0x0 0x100>; - interrupts = <0 6 4>; - }; - }; -}; - -&xhci { - /* - * A slightly different value for reg size is needed by our - * driver for the moment - */ - reg = <0x1e1c0000 0x20000>; -}; - -&pcie { - /* - * Our driver is different that OpenWRT's, so we need slightly - * different values for the reg property - */ - reg = <0x1e140000 0x10000>; -}; diff --git a/sys/dts/mips/fbsd-mt7628an.dtsi b/sys/dts/mips/fbsd-mt7628an.dtsi deleted file mode 100644 index a8ecc9f1720..00000000000 --- a/sys/dts/mips/fbsd-mt7628an.dtsi +++ /dev/null @@ -1,39 +0,0 @@ - -&palmbus { - gpio@600 { - /* - * Mark gpio as compatible to simple-bus and override - * its #size-cells and provide a default ranges property - * so we can attach instances of our mtk_gpio_v2 driver - * to it for now. Provide exactly the same resources to - * the instances of mtk_gpio_v2. - */ - compatible = "simple-bus"; - ranges = <0x0 0x600 0x100>; - #size-cells = <1>; - - gpio0: bank@0 { - reg = <0x0 0x100>; - interrupts = <6>; - }; - - gpio1: bank@1 { - reg = <0x0 0x100>; - interrupts = <6>; - }; - - gpio2: bank@2 { - reg = <0x0 0x100>; - interrupts = <6>; - }; - }; -}; - -&pcie { - /* - * Our driver is different that OpenWRT's, so we need slightly - * different values for the reg property - */ - reg = <0x10140000 0x10000>; - compatible = "mediatek,mt7628-pci"; -}; diff --git a/sys/dts/mips/fbsd-rt3883.dtsi b/sys/dts/mips/fbsd-rt3883.dtsi deleted file mode 100644 index 8572a9f7fa1..00000000000 --- a/sys/dts/mips/fbsd-rt3883.dtsi +++ /dev/null @@ -1,15 +0,0 @@ - -&pci { - #address-cells = <3>; - #size-cells = <2>; - ranges = < - 0x02000000 0 0x00000000 0x20000000 0 0x10000000 - 0x01000000 0 0x00000000 0x10160000 0 0x00010000 - >; - - interrupt-parent = <&cpuintc>; - interrupts = <4>; - - resets = <&rstctrl 23>; - clocks = <&clkctrl 21>; -}; diff --git a/sys/dts/mips/xlp-basic.dts b/sys/dts/mips/xlp-basic.dts deleted file mode 100644 index f2fa4a12e8a..00000000000 --- a/sys/dts/mips/xlp-basic.dts +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Copyright (c) 2010 The FreeBSD Foundation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Netlogic Microsystems XLP8xx Device Tree Source. - */ - -/dts-v1/; - -/ { - model = "netl,XLP8XX"; - compatible = "XLP8XX"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - serial0 = &serial0; - }; - - soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges = <0x0 0x18000000 0x04000000>; - bus-frequency = <0>; - - pic: pic@4000 { - compatible = "netlogic,xlp-pic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x4000 0x200>; - }; - - serial0: serial@30100 { - compatible = "ns16550"; - reg = <0x30100 0x200>; - reg-shift = <2>; - current-speed = <115200>; - clock-frequency = <133000000>; - interrupt-parent = <&pic>; - interrupts = <17>; - }; - - pci0: pci@18000000 { - compatible = "netlogic,xlp-pci", "pci"; - reg = <0xd0000000 0x10000000>; - }; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - cpumask = <0xffffffff>; - bootargs = "-v"; - }; -}; diff --git a/sys/dts/powerpc/Makefile b/sys/dts/powerpc/Makefile deleted file mode 100644 index fd046873943..00000000000 --- a/sys/dts/powerpc/Makefile +++ /dev/null @@ -1,6 +0,0 @@ - -DTS!=ls ${.CURDIR}/*.dts - -all: test-dts - -.include diff --git a/sys/dts/powerpc/mpc8555cds.dts b/sys/dts/powerpc/mpc8555cds.dts deleted file mode 100644 index cf0c0869f22..00000000000 --- a/sys/dts/powerpc/mpc8555cds.dts +++ /dev/null @@ -1,441 +0,0 @@ -/* - * MPC8555 CDS Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. All rights reserved - * - * Neither the name of Freescale Semiconductor, Inc nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * Freescale hereby publishes it under the following licenses: - * - * BSD License - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND - * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * GNU General Public License, version 2 - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - * - * You may select the license of your choice. - *------------------------------------------------------------------ - */ - -/dts-v1/; - -/ { - model = "MPC8555CDS"; - compatible = "MPC8555CDS", "MPC85xxCDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8555@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // 166 MHz - clock-frequency = <0>; // 825 MHz, from uboot - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x10000000>; // 256M at 0x0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,lbc", "fsl,elbc"; - reg = <0xe0005000 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0x0 0x0 0xff800000 0x00800000 - 0x1 0x0 0xff000000 0x00800000 - 0x2 0x0 0xf8000000 0x00008000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x00800000>; - bank-width = <2>; - device-width = <1>; - }; - - nor@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x1 0x0 0x00800000>; - bank-width = <2>; - device-width = <1>; - }; - - rtc@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "dallas,ds1553"; - reg = <0x2 0x0 0x00008000>; - bank-width = <1>; - device-width = <1>; - }; - }; - - soc8555@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8555-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,8555-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,8555-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - cpm@80000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-cpm", "fsl,cpm2"; - reg = <0x80000 0x20000>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - }; - }; - - pci0: pci@e0008000 { - interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x10 */ - 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x12 (Slot 1) */ - 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x13 (Slot 2) */ - 0x9800 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x9800 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x9800 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x9800 0x0 0x0 0x4 &mpic 0x0 0x1 - - /* IDSEL 0x14 (Slot 3) */ - 0xa000 0x0 0x0 0x1 &mpic 0x2 0x1 - 0xa000 0x0 0x0 0x2 &mpic 0x3 0x1 - 0xa000 0x0 0x0 0x3 &mpic 0x0 0x1 - 0xa000 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x15 (Slot 4) */ - 0xa800 0x0 0x0 0x1 &mpic 0x3 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0x0 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0x1 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* Bus 1 (Tundra Bridge) */ - /* IDSEL 0x12 (ISA bridge) */ - 0x19000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x19000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x19000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x1000000 0x0 0x0 0xfee00000 0x0 0x00010000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - - i8259@19000 { - interrupt-controller; - device_type = "interrupt-controller"; - reg = <0x19000 0x0 0x0 0x0 0x1>; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <1>; - interrupt-parent = <&pci0>; - }; - }; - - pci1: pci@e0009000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x1000000 0x0 0x0 0xfee10000 0x0 0x00010000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0009000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - }; -}; diff --git a/sys/dts/powerpc/mpc8572ds.dts b/sys/dts/powerpc/mpc8572ds.dts deleted file mode 100644 index 34751db53ba..00000000000 --- a/sys/dts/powerpc/mpc8572ds.dts +++ /dev/null @@ -1,893 +0,0 @@ -/* - * MPC8572 DS Device Tree Source - * - * Copyright 2007-2009 Freescale Semiconductor Inc. All rights reserved - * - * Neither the name of Freescale Semiconductor, Inc nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * Freescale hereby publishes it under the following licenses: - * - * BSD License - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND - * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * GNU General Public License, version 2 - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - * - * You may select the license of your choice. - *------------------------------------------------------------------ - */ - -/dts-v1/; -/ { - model = "fsl,MPC8572DS"; - compatible = "fsl,MPC8572DS"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8572@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - - PowerPC,8572@1 { - device_type = "cpu"; - reg = <0x1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - }; - - localbus@ffe05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; - reg = <0 0xffe05000 0 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0x0 0x0 0x0 0xe8000000 0x08000000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - reg = <0x0 0x03000000>; - label = "ramdisk-nor"; - read-only; - }; - - partition@3000000 { - reg = <0x03000000 0x00e00000>; - label = "diagnostic-nor"; - read-only; - }; - - partition@3e00000 { - reg = <0x03e00000 0x00200000>; - label = "dink-nor"; - read-only; - }; - - partition@4000000 { - reg = <0x04000000 0x00400000>; - label = "kernel-nor"; - read-only; - }; - - partition@4400000 { - reg = <0x04400000 0x03b00000>; - label = "jffs2-nor"; - }; - - partition@7f00000 { - reg = <0x07f00000 0x00080000>; - label = "dtb-nor"; - read-only; - }; - - partition@7f80000 { - reg = <0x07f80000 0x00080000>; - label = "u-boot-nor"; - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - reg = <0x0 0x02000000>; - label = "u-boot-nand"; - read-only; - }; - - partition@2000000 { - reg = <0x02000000 0x10000000>; - label = "jffs2-nand"; - }; - - partition@12000000 { - reg = <0x12000000 0x08000000>; - label = "ramdisk-nand"; - read-only; - }; - - partition@1a000000 { - reg = <0x1a000000 0x04000000>; - label = "kernel-nand"; - }; - - partition@1e000000 { - reg = <0x1e000000 0x01000000>; - label = "dtb-nand"; - read-only; - }; - - partition@1f000000 { - reg = <0x1f000000 0x21000000>; - label = "reserved-nand"; - }; - }; - - nand@4,0 { - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x4 0x0 0x40000>; - }; - - nand@5,0 { - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x5 0x0 0x40000>; - }; - - nand@6,0 { - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x6 0x0 0x40000>; - }; - }; - - soc8572@ffe00000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0 0xffe00000 0x100000>; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8572-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - memory-controller@6000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x6000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8572-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x100000>; // L2, 1M - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0xc300 0x4>; - ranges = <0x0 0xc100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <76 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <77 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <78 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <79 2>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - ptp_timer: ptimer@24e00 { - compatible = "fsl,gianfar-ptp-timer"; - reg = <0x24e00 0xb0>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - ptimer-handle = < &ptp_timer >; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <0x1>; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <0x2>; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <0x3>; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - ptimer-handle = < &ptp_timer >; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - ptimer-handle = < &ptp_timer >; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities block - compatible = "fsl,mpc8572-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - power@e0070{ - compatible = "fsl,mpc8548-pmc"; - reg = <0xe0070 0x14>; - }; - - timer@41100 { - compatible = "fsl,mpic-global-timer"; - reg = <0x41100 0x204>; - interrupts = <0xf7 0x2>; - interrupt-parent = <&mpic>; - }; - - msi@41600 { - compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 58 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - }; - - /* PME (pattern-matcher) */ - pme@10000 { - device_type = "pme"; - compatible = "pme8572"; - reg = <0x10000 0x5000>; - interrupts = <0x39 0x2 0x40 0x2 0x41 0x2 0x42 0x2 0x43 0x2>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - pci0: pcie@ffe08000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xffe08000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xfee20000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - interrupt-map-mask = <0xff00 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x11 func 0 - PCI slot 1 */ - 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x11 func 1 - PCI slot 1 */ - 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x11 func 2 - PCI slot 1 */ - 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x11 func 3 - PCI slot 1 */ - 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x11 func 4 - PCI slot 1 */ - 0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x11 func 5 - PCI slot 1 */ - 0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x11 func 6 - PCI slot 1 */ - 0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x11 func 7 - PCI slot 1 */ - 0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x12 func 0 - PCI slot 2 */ - 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x12 func 1 - PCI slot 2 */ - 0x9100 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9100 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9100 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x9100 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x12 func 2 - PCI slot 2 */ - 0x9200 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9200 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9200 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x9200 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x12 func 3 - PCI slot 2 */ - 0x9300 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9300 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9300 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x9300 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x12 func 4 - PCI slot 2 */ - 0x9400 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9400 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9400 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x9400 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x12 func 5 - PCI slot 2 */ - 0x9500 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9500 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9500 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x9500 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x12 func 6 - PCI slot 2 */ - 0x9600 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9600 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9600 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x9600 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x12 func 7 - PCI slot 2 */ - 0x9700 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9700 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9700 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x9700 0x0 0x0 0x4 &mpic 0x2 0x1 - - // IDSEL 0x1c USB - 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2 - 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2 - 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2 - 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2 - - // IDSEL 0x1d Audio - 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2 - - // IDSEL 0x1e Legacy - 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2 - 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2 - - // IDSEL 0x1f IDE/SATA - 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2 - 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2 - - >; - - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - uli1575@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - isa@1e { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0x0 0x0 0x0 0x0>; - ranges = <0x1 0x0 0x1000000 0x0 0x0 - 0x1000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - reg = <0x1 0x20 0x2 - 0x1 0xa0 0x2 - 0x1 0x4d0 0x2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <9 2>; - interrupt-parent = <&mpic>; - }; - - i8042@60 { - #size-cells = <0>; - #address-cells = <1>; - reg = <0x1 0x60 0x1 0x1 0x64 0x1>; - interrupts = <1 3 12 3>; - interrupt-parent = - <&i8259>; - - keyboard@0 { - reg = <0x0>; - compatible = "pnpPNP,303"; - }; - - mouse@1 { - reg = <0x1>; - compatible = "pnpPNP,f03"; - }; - }; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <0x1 0x70 0x2>; - }; - - gpio@400 { - reg = <0x1 0x400 0x80>; - }; - }; - }; - }; - - }; - - pci1: pcie@ffe09000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xffe09000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xfee10000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0x90000000 - 0x2000000 0x0 0x90000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci2: pcie@ffe0a000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xffe0a000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xfee00000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <26 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; -}; diff --git a/sys/dts/powerpc/p1020rdb.dts b/sys/dts/powerpc/p1020rdb.dts deleted file mode 100644 index 80bc575db16..00000000000 --- a/sys/dts/powerpc/p1020rdb.dts +++ /dev/null @@ -1,626 +0,0 @@ -/* - * P1020 RDB Device Tree Source - * - * Copyright 2009 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; - -/ { - model = "fsl,P1020"; - compatible = "fsl,P1020RDB"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,P1020@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - - PowerPC,P1020@1 { - device_type = "cpu"; - reg = <0x1>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - }; - - localbus@ffe05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus"; - reg = <0 0xffe05000 0 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - /* NOR, NAND Flashes and Vitesse 5 port L2 switch */ - ranges = <0x0 0x0 0x0 0xef000000 0x01000000 - 0x1 0x0 0x0 0xffa00000 0x00040000 - 0x2 0x0 0x0 0xffb00000 0x00020000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* This location must not be altered */ - /* 256KB for Vitesse 7385 Switch firmware */ - reg = <0x0 0x00040000>; - label = "NOR (RO) Vitesse-7385 Firmware"; - read-only; - }; - - partition@40000 { - /* 256KB for DTB Image */ - reg = <0x00040000 0x00040000>; - label = "NOR (RO) DTB Image"; - read-only; - }; - - partition@80000 { - /* 3.5 MB for Linux Kernel Image */ - reg = <0x00080000 0x00380000>; - label = "NOR (RO) Linux Kernel Image"; - read-only; - }; - - partition@400000 { - /* 11MB for JFFS2 based Root file System */ - reg = <0x00400000 0x00b00000>; - label = "NOR (RW) JFFS2 Root File System"; - }; - - partition@f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x00f00000 0x00100000>; - label = "NOR (RO) U-Boot Image"; - read-only; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1020-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x40000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND (RO) U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND (RO) DTB Image"; - read-only; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND (RO) Linux Kernel Image"; - read-only; - }; - - partition@600000 { - /* 4MB for Compressed Root file System Image */ - reg = <0x00600000 0x00400000>; - label = "NAND (RO) Compressed RFS Image"; - read-only; - }; - - partition@a00000 { - /* 7MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00700000>; - label = "NAND (RW) JFFS2 Root File System"; - }; - - partition@1100000 { - /* 15MB for JFFS2 based Root file System */ - reg = <0x01100000 0x00f00000>; - label = "NAND (RW) Writable User area"; - }; - }; - - L2switch@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "vitesse-7385"; - reg = <0x2 0x0 0x20000>; - }; - - }; - - soc@ffe00000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,p1020-immr", "simple-bus"; - ranges = <0x0 0x0 0xffe00000 0x100000>; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,p1020-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <16 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,p1020-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - spi@7000 { - cell-index = <0>; - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,espi"; - reg = <0x7000 0x1000>; - interrupts = <59 0x2>; - interrupt-parent = <&mpic>; - mode = "cpu"; - - fsl_m25p80@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,espi-flash"; - reg = <0>; - linux,modalias = "fsl_m25p80"; - modal = "s25sl128b"; - spi-max-frequency = <50000000>; - mode = <0>; - - partition@0 { - /* 512KB for u-boot Bootloader Image */ - reg = <0x0 0x00080000>; - label = "SPI (RO) U-Boot Image"; - read-only; - }; - - partition@80000 { - /* 512KB for DTB Image */ - reg = <0x00080000 0x00080000>; - label = "SPI (RO) DTB Image"; - read-only; - }; - - partition@100000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00100000 0x00400000>; - label = "SPI (RO) Linux Kernel Image"; - read-only; - }; - - partition@500000 { - /* 4MB for Compressed RFS Image */ - reg = <0x00500000 0x00400000>; - label = "SPI (RO) Compressed RFS Image"; - read-only; - }; - - partition@900000 { - /* 7MB for JFFS2 based RFS */ - reg = <0x00900000 0x00700000>; - label = "SPI (RW) JFFS2 RFS"; - }; - }; - }; - - gpio: gpio-controller@f000 { - #gpio-cells = <2>; - compatible = "fsl,mpc8572-gpio"; - reg = <0xf000 0x100>; - interrupts = <47 0x2>; - interrupt-parent = <&mpic>; - gpio-controller; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,p1020-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2,256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - mdio@24000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,etsec2-mdio"; - reg = <0x24000 0x1000 0xb0030 0x4>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <3 1>; - reg = <0x0>; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <2 1>; - reg = <0x1>; - }; - }; - - mdio@25000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,etsec2-tbi"; - reg = <0x25000 0x1000 0xb1030 0x4>; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@b0000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "fsl,etsec2"; - fsl,num_rx_queues = <0x8>; - fsl,num_tx_queues = <0x8>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupt-parent = <&mpic>; - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "rgmii-id"; - - queue-group@0 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb0000 0x1000>; - interrupts = <29 2 30 2 34 2>; - }; - - queue-group@1 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb4000 0x1000>; - interrupts = <17 2 18 2 24 2>; - }; - }; - - enet1: ethernet@b1000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "fsl,etsec2"; - fsl,num_rx_queues = <0x8>; - fsl,num_tx_queues = <0x8>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupt-parent = <&mpic>; - phy-handle = <&phy0>; - tbi-handle = <&tbi0>; - phy-connection-type = "sgmii"; - - queue-group@0 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb1000 0x1000>; - interrupts = <35 2 36 2 40 2>; - }; - - queue-group@1 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb5000 0x1000>; - interrupts = <51 2 52 2 67 2>; - }; - }; - - enet2: ethernet@b2000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "fsl,etsec2"; - fsl,num_rx_queues = <0x8>; - fsl,num_tx_queues = <0x8>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupt-parent = <&mpic>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - - queue-group@0 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb2000 0x1000>; - interrupts = <31 2 32 2 33 2>; - }; - - queue-group@1 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb6000 0x1000>; - interrupts = <25 2 26 2 27 2>; - }; - }; - - usb@22000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-usb2-dr"; - reg = <0x22000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <28 0x2>; - phy_type = "ulpi"; - }; - - /* USB2 is shared with localbus, so it must be disabled - by default. We can't put 'status = "disabled";' here - since U-Boot doesn't clear the status property when - it enables USB2. OTOH, U-Boot does create a new node - when there isn't any. So, just comment it out. - usb@23000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <46 0x2>; - phy_type = "ulpi"; - }; - */ - - sdhci@2e000 { - compatible = "fsl,p1020-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <72 0x2>; - interrupt-parent = <&mpic>; - /* Filled in by U-Boot */ - clock-frequency = <0>; - }; - - crypto@30000 { - compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4", - "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 58 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0xbfe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi@41600 { - compatible = "fsl,p1020-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities block - compatible = "fsl,p1020-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - }; - - pci0: pcie@ffe09000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xffe09000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <16 2>; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xffe0a000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <16 2>; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; diff --git a/sys/dts/powerpc/p2020ds.dts b/sys/dts/powerpc/p2020ds.dts deleted file mode 100644 index 53aa5243a65..00000000000 --- a/sys/dts/powerpc/p2020ds.dts +++ /dev/null @@ -1,753 +0,0 @@ -/* - * P2020 DS Device Tree Source - * - * Copyright 2009 Freescale Semiconductor Inc. - * - * Neither the name of Freescale Semiconductor, Inc nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * Freescale hereby publishes it under the following licenses: - * - * BSD License - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND - * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * GNU General Public License, version 2 - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - * - * You may select the license of your choice. - *------------------------------------------------------------------ - */ - -/dts-v1/; -/ { - model = "fsl,P2020"; - compatible = "fsl,P2020DS"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,P2020@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - - PowerPC,P2020@1 { - device_type = "cpu"; - reg = <0x1>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - }; - - localbus@ffe05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,elbc", "simple-bus"; - reg = <0 0xffe05000 0 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 - 0x1 0x0 0x0 0xe0000000 0x08000000 - 0x2 0x0 0x0 0xffa00000 0x00040000 - 0x3 0x0 0x0 0xffdf0000 0x00008000 - 0x4 0x0 0x0 0xffa40000 0x00040000 - 0x5 0x0 0x0 0xffa80000 0x00040000 - 0x6 0x0 0x0 0xffac0000 0x00040000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - - ramdisk@0 { - reg = <0x0 0x03000000>; - read-only; - }; - - diagnostic@3000000 { - reg = <0x03000000 0x00e00000>; - read-only; - }; - - dink@3e00000 { - reg = <0x03e00000 0x00200000>; - read-only; - }; - - kernel@4000000 { - reg = <0x04000000 0x00400000>; - read-only; - }; - - jffs2@4400000 { - reg = <0x04400000 0x03b00000>; - }; - - dtb@7f00000 { - reg = <0x07f00000 0x00080000>; - read-only; - }; - - u-boot@7f80000 { - reg = <0x07f80000 0x00080000>; - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - u-boot@0 { - reg = <0x0 0x02000000>; - read-only; - }; - - jffs2@2000000 { - reg = <0x02000000 0x10000000>; - }; - - ramdisk@12000000 { - reg = <0x12000000 0x08000000>; - read-only; - }; - - kernel@1a000000 { - reg = <0x1a000000 0x04000000>; - }; - - dtb@1e000000 { - reg = <0x1e000000 0x01000000>; - read-only; - }; - - empty@1f000000 { - reg = <0x1f000000 0x21000000>; - }; - }; - - nand@4,0 { - compatible = "fsl,elbc-fcm-nand"; - reg = <0x4 0x0 0x40000>; - }; - - nand@5,0 { - compatible = "fsl,elbc-fcm-nand"; - reg = <0x5 0x0 0x40000>; - }; - - nand@6,0 { - compatible = "fsl,elbc-fcm-nand"; - reg = <0x6 0x0 0x40000>; - }; - }; - - soc@ffe00000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,p2020-immr", "simple-bus"; - ranges = <0x0 0 0xffe00000 0x100000>; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,p2020-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,p2020-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - spi@7000 { - compatible = "fsl,espi"; - reg = <0x7000 0x1000>; - interrupts = <59 0x2>; - interrupt-parent = <&mpic>; - }; - - dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,eloplus-dma"; - reg = <0xc300 0x4>; - ranges = <0x0 0xc100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <76 2>; - }; - dma-channel@80 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <77 2>; - }; - dma-channel@100 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <78 2>; - }; - dma-channel@180 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <79 2>; - }; - }; - - gpio: gpio-controller@f000 { - #gpio-cells = <2>; - compatible = "fsl,mpc8572-gpio"; - reg = <0xf000 0x100>; - interrupts = <47 0x2>; - interrupt-parent = <&mpic>; - gpio-controller; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,p2020-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512k - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - usb@22000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-usb2-dr"; - reg = <0x22000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <28 0x2>; - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <3 1>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <3 1>; - reg = <0x1>; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <3 1>; - reg = <0x2>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - sdhci@2e000 { - compatible = "fsl,p2020-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <72 0x2>; - interrupt-parent = <&mpic>; - /* Filled in by U-Boot */ - clock-frequency = <0>; - }; - - crypto@30000 { - compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4", - "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 58 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0xbfe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi@41600 { - compatible = "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities block - compatible = "fsl,p2020-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - }; - - pci0: pcie@ffe08000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xffe08000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x8 0x1 - 0000 0x0 0x0 0x2 &mpic 0x9 0x1 - 0000 0x0 0x0 0x3 &mpic 0xa 0x1 - 0000 0x0 0x0 0x4 &mpic 0xb 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci1: pcie@ffe09000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xffe09000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - interrupt-map-mask = <0xff00 0x0 0x0 0x7>; - interrupt-map = < - - // IDSEL 0x11 func 0 - PCI slot 1 - 0x8800 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8800 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 1 - PCI slot 1 - 0x8900 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8900 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 2 - PCI slot 1 - 0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 3 - PCI slot 1 - 0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 4 - PCI slot 1 - 0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 5 - PCI slot 1 - 0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 6 - PCI slot 1 - 0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 7 - PCI slot 1 - 0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x1d Audio - 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2 - - // IDSEL 0x1e Legacy - 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2 - 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2 - - // IDSEL 0x1f IDE/SATA - 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2 - 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2 - >; - - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - uli1575@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - isa@1e { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0x0 0x0 0x0 0x0>; - ranges = <0x1 0x0 0x1000000 0x0 0x0 - 0x1000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - reg = <0x1 0x20 0x2 - 0x1 0xa0 0x2 - 0x1 0x4d0 0x2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <4 1>; - interrupt-parent = <&mpic>; - }; - - i8042@60 { - #size-cells = <0>; - #address-cells = <1>; - reg = <0x1 0x60 0x1 0x1 0x64 0x1>; - interrupts = <1 3 12 3>; - interrupt-parent = - <&i8259>; - - keyboard@0 { - reg = <0x0>; - compatible = "pnpPNP,303"; - }; - - mouse@1 { - reg = <0x1>; - compatible = "pnpPNP,f03"; - }; - }; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <0x1 0x70 0x2>; - }; - - gpio@400 { - reg = <0x1 0x400 0x80>; - }; - }; - }; - }; - - }; - - pci2: pcie@ffe0a000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xffe0a000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <26 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; -}; diff --git a/sys/dts/powerpc/p2041rdb.dts b/sys/dts/powerpc/p2041rdb.dts deleted file mode 100644 index 434dd3fa38d..00000000000 --- a/sys/dts/powerpc/p2041rdb.dts +++ /dev/null @@ -1,448 +0,0 @@ -/* - * P2041RDB Device Tree Source - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "p2041si.dtsi" - -/ { - model = "fsl,P2041RDB"; - compatible = "fsl,P2041RDB"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - phy_rgmii_0 = &phy_rgmii_0; - phy_rgmii_1 = &phy_rgmii_1; - phy_sgmii_2 = &phy_sgmii_2; - phy_sgmii_3 = &phy_sgmii_3; - phy_sgmii_4 = &phy_sgmii_4; - phy_sgmii_1c = &phy_sgmii_1c; - phy_sgmii_1d = &phy_sgmii_1d; - phy_sgmii_1e = &phy_sgmii_1e; - phy_sgmii_1f = &phy_sgmii_1f; - phy_xgmii_2 = &phy_xgmii_2; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000 0x80000000>; - }; - - dcsr: dcsr@f00000000 { - ranges = <0x00000000 0xf 0x00000000 0x01008000>; - }; - - bman-portals@ff4000000 { - bman-portal@0 { - cpu-handle = <&cpu0>; - }; - bman-portal@4000 { - cpu-handle = <&cpu1>; - }; - bman-portal@8000 { - cpu-handle = <&cpu2>; - }; - bman-portal@c000 { - cpu-handle = <&cpu3>; - }; - bman-portal@10000 { - }; - bman-portal@14000 { - }; - bman-portal@18000 { - }; - bman-portal@1c000 { - }; - bman-portal@20000 { - }; - bman-portal@24000 { - }; - - buffer-pool@0 { - compatible = "fsl,p2041-bpool", "fsl,bpool"; - fsl,bpid = <0>; - fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; - }; - }; - - qman-portals@ff4200000 { - qportal0: qman-portal@0 { - cpu-handle = <&cpu0>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal1: qman-portal@4000 { - cpu-handle = <&cpu1>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal2: qman-portal@8000 { - cpu-handle = <&cpu2>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal3: qman-portal@c000 { - cpu-handle = <&cpu3>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal4: qman-portal@10000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal5: qman-portal@14000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal6: qman-portal@18000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal7: qman-portal@1c000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal8: qman-portal@20000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal9: qman-portal@24000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - }; - - soc: soc@ffe000000 { - spi@110000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - i2c@118000 { - lm75b@48 { - compatible = "nxp,lm75a"; - reg = <0x48>; - }; - eeprom@50 { - compatible = "at24,24c256"; - reg = <0x50>; - }; - rtc@68 { - compatible = "pericom,pt7c4338"; - reg = <0x68>; - }; - }; - - i2c@118100 { - eeprom@50 { - compatible = "at24,24c256"; - reg = <0x50>; - }; - }; - - usb1: usb@211000 { - dr_mode = "host"; - }; - - pme: pme@316000 { - /* Commented out, use default allocation */ - /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ - /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ - }; - - qman: qman@318000 { - /* Commented out, use default allocation */ - /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ - /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ - }; - - bman: bman@31a000 { - /* Same as fsl,qman-*, use default allocation */ - /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ - }; - - fman0: fman@400000 { - enet0: ethernet@e0000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy_sgmii_2>; - phy-connection-type = "sgmii"; - }; - - mdio0: mdio@e1120 { - tbi0: tbi-phy@8 { - reg = <0x8>; - device_type = "tbi-phy"; - }; - - phy_rgmii_0: ethernet-phy@0 { - reg = <0x0>; - }; - phy_rgmii_1: ethernet-phy@1 { - reg = <0x1>; - }; - phy_sgmii_2: ethernet-phy@2 { - reg = <0x2>; - }; - phy_sgmii_3: ethernet-phy@3 { - reg = <0x3>; - }; - phy_sgmii_4: ethernet-phy@4 { - reg = <0x4>; - }; - phy_sgmii_1c: ethernet-phy@1c { - reg = <0x1c>; - }; - phy_sgmii_1d: ethernet-phy@1d { - reg = <0x1d>; - }; - phy_sgmii_1e: ethernet-phy@1e { - reg = <0x1e>; - }; - phy_sgmii_1f: ethernet-phy@1f { - reg = <0x1f>; - }; - }; - - enet1: ethernet@e2000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy_sgmii_3>; - phy-connection-type = "sgmii"; - }; - - mdio@e3120 { - tbi1: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@e4000 { - tbi-handle = <&tbi2>; - phy-handle = <&phy_sgmii_4>; - phy-connection-type = "sgmii"; - }; - - mdio@e5120 { - tbi2: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet3: ethernet@e6000 { - tbi-handle = <&tbi3>; - phy-handle = <&phy_rgmii_1>; - phy-connection-type = "rgmii"; - }; - - mdio@e7120 { - tbi3: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet4: ethernet@e8000 { - tbi-handle = <&tbi4>; - phy-handle = <&phy_rgmii_0>; - phy-connection-type = "rgmii"; - }; - - mdio@e9120 { - tbi4: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet5: ethernet@f0000 { - /* - * phy-handle will be updated by U-Boot to - * reflect the actual slot the XAUI card is in. - */ - phy-handle = <&phy_xgmii_2>; - phy-connection-type = "xgmii"; - }; - - mdio@f1000 { - /* XAUI card in slot 2 */ - phy_xgmii_2: ethernet-phy@0 { - reg = <0x0>; - }; - }; - }; - }; - - rapidio@ffe0c0000 { - reg = <0xf 0xfe0c0000 0 0x11000>; - - port1 { - ranges = <0 0 0xc 0x20000000 0 0x10000000>; - }; - port2 { - ranges = <0 0 0xc 0x30000000 0 0x10000000>; - }; - }; - - localbus@ffe124000 { - reg = <0xf 0xfe124000 0 0x1000>; - ranges = <0 0 0xf 0xb8000000 0x04000000>; - - flash@0,0 { - compatible = "cfi-flash"; - /* - * Map 64Mb of 128MB NOR flash memory. Since highest - * line of address of NOR flash memory are set by - * FPGA, memory are divided into two pages equal to - * 64MB. One of the pages can be accessed at once. - */ - reg = <0 0 0x04000000>; - bank-width = <2>; - device-width = <2>; - }; - }; - - pci0: pcie@ffe200000 { - reg = <0xf 0xfe200000 0 0x1000>; - ranges = <0x02000000 0 0x80000000 0x0 0x80000000 0x0 0x10000000 - 0x01000000 0 0x00000000 0x0 0xff000000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0x80000000 - 0x02000000 0 0x80000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff000000 - 0 0x00010000>; - }; - }; - - pci1: pcie@ffe201000 { - reg = <0xf 0xfe201000 0 0x1000>; - ranges = <0x02000000 0x0 0x90000000 0x0 0x90000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0x0 0xff010000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0x90000000 - 0x02000000 0 0x90000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff010000 - 0 0x00010000>; - }; - }; - - pci2: pcie@ffe202000 { - reg = <0xf 0xfe202000 0 0x1000>; - ranges = <0x02000000 0 0xa0000000 0x0 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0x0 0xff020000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xa0000000 - 0x02000000 0 0xa0000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff020000 - 0 0x00010000>; - }; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; -}; diff --git a/sys/dts/powerpc/p2041si.dtsi b/sys/dts/powerpc/p2041si.dtsi deleted file mode 100644 index 40ce67f5001..00000000000 --- a/sys/dts/powerpc/p2041si.dtsi +++ /dev/null @@ -1,1295 +0,0 @@ -/* - * P2041 Silicon Device Tree Source - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; - -/ { - compatible = "fsl,P2041"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ccsr = &soc; - dcsr = &dcsr; - - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - ethernet4 = &enet4; - ethernet5 = &enet5; - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - bman = &bman; - qman = &qman; - pme = &pme; - rman = &rman; - sdhc = &sdhc; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - - fman0 = &fman0; - fman0_oh0 = &fman0_oh0; - fman0_oh1 = &fman0_oh1; - fman0_oh2 = &fman0_oh2; - fman0_oh3 = &fman0_oh3; - fman0_oh4 = &fman0_oh4; - fman0_oh5 = &fman0_oh5; - fman0_oh6 = &fman0_oh6; - fman0_rx0 = &fman0_rx0; - fman0_rx1 = &fman0_rx1; - fman0_rx2 = &fman0_rx2; - fman0_rx3 = &fman0_rx3; - fman0_rx4 = &fman0_rx4; - fman0_rx5 = &fman0_rx5; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e500mc@0 { - device_type = "cpu"; - reg = <0>; - bus-frequency = <749999996>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e500mc@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu2: PowerPC,e500mc@2 { - device_type = "cpu"; - reg = <2>; - next-level-cache = <&L2_2>; - L2_2: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu3: PowerPC,e500mc@3 { - device_type = "cpu"; - reg = <3>; - next-level-cache = <&L2_3>; - L2_3: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; - - dcsr: dcsr@f00000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,dcsr", "simple-bus"; - - dcsr-epu@0 { - compatible = "fsl,dcsr-epu"; - interrupts = <52 2 0 0 - 84 2 0 0 - 85 2 0 0>; - interrupt-parent = <&mpic>; - reg = <0x0 0x1000>; - }; - dcsr-npc { - compatible = "fsl,dcsr-npc"; - reg = <0x1000 0x1000 0x1000000 0x8000>; - }; - dcsr-nxc@2000 { - compatible = "fsl,dcsr-nxc"; - reg = <0x2000 0x1000>; - }; - dcsr-corenet { - compatible = "fsl,dcsr-corenet"; - reg = <0x8000 0x1000 0xB0000 0x1000>; - }; - dcsr-dpaa@9000 { - compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa"; - reg = <0x9000 0x1000>; - }; - dcsr-ocn@11000 { - compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn"; - reg = <0x11000 0x1000>; - }; - dcsr-ddr@12000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr>; - reg = <0x12000 0x1000>; - }; - dcsr-nal@18000 { - compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal"; - reg = <0x18000 0x1000>; - }; - dcsr-rcpm@22000 { - compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm"; - reg = <0x22000 0x1000>; - }; - dcsr-cpu-sb-proxy@40000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu0>; - reg = <0x40000 0x1000>; - }; - dcsr-cpu-sb-proxy@41000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu1>; - reg = <0x41000 0x1000>; - }; - dcsr-cpu-sb-proxy@42000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu2>; - reg = <0x42000 0x1000>; - }; - dcsr-cpu-sb-proxy@43000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu3>; - reg = <0x43000 0x1000>; - }; - }; - - bman-portals@ff4000000 { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "fsl,bman-portals"; - ranges = <0x0 0xf 0xfde00000 0x200000>; - bman-portal@0 { - cell-index = <0x0>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x0 0x4000 0x100000 0x1000>; - interrupts = <105 2 0 0>; - }; - bman-portal@4000 { - cell-index = <0x1>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x4000 0x4000 0x101000 0x1000>; - interrupts = <107 2 0 0>; - }; - bman-portal@8000 { - cell-index = <2>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x8000 0x4000 0x102000 0x1000>; - interrupts = <109 2 0 0>; - }; - bman-portal@c000 { - cell-index = <0x3>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0xc000 0x4000 0x103000 0x1000>; - interrupts = <111 2 0 0>; - }; - bman-portal@10000 { - cell-index = <0x4>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x10000 0x4000 0x104000 0x1000>; - interrupts = <113 2 0 0>; - }; - bman-portal@14000 { - cell-index = <0x5>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x14000 0x4000 0x105000 0x1000>; - interrupts = <115 2 0 0>; - }; - bman-portal@18000 { - cell-index = <0x6>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x18000 0x4000 0x106000 0x1000>; - interrupts = <117 2 0 0>; - }; - bman-portal@1c000 { - cell-index = <0x7>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x1c000 0x4000 0x107000 0x1000>; - interrupts = <119 2 0 0>; - }; - bman-portal@20000 { - cell-index = <0x8>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x20000 0x4000 0x108000 0x1000>; - interrupts = <121 2 0 0>; - }; - bman-portal@24000 { - cell-index = <0x9>; - compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; - reg = <0x24000 0x4000 0x109000 0x1000>; - interrupts = <123 2 0 0>; - }; - - buffer-pool@0 { - compatible = "fsl,p2041-bpool", "fsl,bpool"; - fsl,bpid = <0>; - fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; - }; - }; - - qman-portals@ff4200000 { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "fsl,qman-portals"; - ranges = <0x0 0xf 0xfdc00000 0x200000>; - qportal0: qman-portal@0 { - cell-index = <0x0>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x0 0x4000 0x100000 0x1000>; - interrupts = <104 0x2 0 0>; - fsl,qman-channel-id = <0x0>; - }; - - qportal1: qman-portal@4000 { - cell-index = <0x1>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x4000 0x4000 0x101000 0x1000>; - interrupts = <106 0x2 0 0>; - fsl,qman-channel-id = <0x1>; - }; - - qportal2: qman-portal@8000 { - cell-index = <0x2>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x8000 0x4000 0x102000 0x1000>; - interrupts = <108 0x2 0 0>; - fsl,qman-channel-id = <0x2>; - }; - - qportal3: qman-portal@c000 { - cell-index = <0x3>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0xc000 0x4000 0x103000 0x1000>; - interrupts = <110 0x2 0 0>; - fsl,qman-channel-id = <0x3>; - }; - - qportal4: qman-portal@10000 { - cell-index = <0x4>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x10000 0x4000 0x104000 0x1000>; - interrupts = <112 0x2 0 0>; - fsl,qman-channel-id = <0x4>; - }; - - qportal5: qman-portal@14000 { - cell-index = <0x5>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x14000 0x4000 0x105000 0x1000>; - interrupts = <114 0x2 0 0>; - fsl,qman-channel-id = <0x5>; - }; - - qportal6: qman-portal@18000 { - cell-index = <0x6>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x18000 0x4000 0x106000 0x1000>; - interrupts = <116 0x2 0 0>; - fsl,qman-channel-id = <0x6>; - }; - - qportal7: qman-portal@1c000 { - cell-index = <0x7>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x1c000 0x4000 0x107000 0x1000>; - interrupts = <118 0x2 0 0>; - fsl,qman-channel-id = <0x7>; - }; - - qportal8: qman-portal@20000 { - cell-index = <0x8>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x20000 0x4000 0x108000 0x1000>; - interrupts = <120 0x2 0 0>; - fsl,qman-channel-id = <0x8>; - }; - - qportal9: qman-portal@24000 { - cell-index = <0x9>; - compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; - reg = <0x24000 0x4000 0x109000 0x1000>; - interrupts = <122 0x2 0 0>; - fsl,qman-channel-id = <0x9>; - }; - - qpool1: qman-pool@1 { - cell-index = <1>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x21>; - }; - - qpool2: qman-pool@2 { - cell-index = <2>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x22>; - }; - - qpool3: qman-pool@3 { - cell-index = <3>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x23>; - }; - - qpool4: qman-pool@4 { - cell-index = <4>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x24>; - }; - - qpool5: qman-pool@5 { - cell-index = <5>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x25>; - }; - - qpool6: qman-pool@6 { - cell-index = <6>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x26>; - }; - - qpool7: qman-pool@7 { - cell-index = <7>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x27>; - }; - - qpool8: qman-pool@8 { - cell-index = <8>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x28>; - }; - - qpool9: qman-pool@9 { - cell-index = <9>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x29>; - }; - - qpool10: qman-pool@10 { - cell-index = <10>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2a>; - }; - - qpool11: qman-pool@11 { - cell-index = <11>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2b>; - }; - - qpool12: qman-pool@12 { - cell-index = <12>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2c>; - }; - - qpool13: qman-pool@13 { - cell-index = <13>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2d>; - }; - - qpool14: qman-pool@14 { - cell-index = <14>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2e>; - }; - - qpool15: qman-pool@15 { - cell-index = <15>; - compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2f>; - }; - }; - - soc: soc@ffe000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - - bus-frequency = <0>; // Filled out by kernel. - - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - ddr: memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; - reg = <0x10000 0x1000>; - interrupts = <16 2 1 27>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x4000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - - mpic: pic@40000 { - clock-frequency = <0>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <4>; - reg = <0x40000 0x40000>; - compatible = "fsl,mpic", "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi0: msi@41600 { - compatible = "fsl,mpic-msi"; - reg = <0x41600 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 0 0 - 0xe1 0 0 0 - 0xe2 0 0 0 - 0xe3 0 0 0 - 0xe4 0 0 0 - 0xe5 0 0 0 - 0xe6 0 0 0 - 0xe7 0 0 0>; - }; - - msi1: msi@41800 { - compatible = "fsl,mpic-msi"; - reg = <0x41800 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe8 0 0 0 - 0xe9 0 0 0 - 0xea 0 0 0 - 0xeb 0 0 0 - 0xec 0 0 0 - 0xed 0 0 0 - 0xee 0 0 0 - 0xef 0 0 0>; - }; - - msi2: msi@41a00 { - compatible = "fsl,mpic-msi"; - reg = <0x41a00 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xf0 0 0 0 - 0xf1 0 0 0 - 0xf2 0 0 0 - 0xf3 0 0 0 - 0xf4 0 0 0 - 0xf5 0 0 0 - 0xf6 0 0 0 - 0xf7 0 0 0>; - }; - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p2041-serdes"; - reg = <0xea000 0x1000>; - }; - - dma0: dma@100300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p2041-dma", "fsl,eloplus-dma"; - reg = <0x100300 0x4>; - ranges = <0x0 0x100100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,p2041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <28 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,p2041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <29 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,p2041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <30 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,p2041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <31 2 0 0>; - }; - }; - - dma1: dma@101300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p2041-dma", "fsl,eloplus-dma"; - reg = <0x101300 0x4>; - ranges = <0x0 0x101100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,p2041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <32 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,p2041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <33 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,p2041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <34 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,p2041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <35 2 0 0>; - }; - }; - - spi@110000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,p2041-espi", "fsl,mpc8536-espi"; - reg = <0x110000 0x1000>; - interrupts = <53 0x2 0 0>; - fsl,espi-num-chipselects = <4>; - }; - - sdhc: sdhc@114000 { - compatible = "fsl,p2041-esdhc", "fsl,esdhc"; - reg = <0x114000 0x1000>; - interrupts = <48 2 0 0>; - sdhci,auto-cmd12; - clock-frequency = <0>; - }; - - i2c@118000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x118000 0x100>; - interrupts = <38 2 0 0>; - dfsrr; - }; - - i2c@118100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x118100 0x100>; - interrupts = <38 2 0 0>; - dfsrr; - }; - - i2c@119000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <2>; - compatible = "fsl-i2c"; - reg = <0x119000 0x100>; - interrupts = <39 2 0 0>; - dfsrr; - }; - - i2c@119100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <3>; - compatible = "fsl-i2c"; - reg = <0x119100 0x100>; - interrupts = <39 2 0 0>; - dfsrr; - }; - - serial0: serial@11c500 { - cell-index = <0>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11c500 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; - }; - - serial1: serial@11c600 { - cell-index = <1>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11c600 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; - }; - - serial2: serial@11d500 { - cell-index = <2>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11d500 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; - }; - - serial3: serial@11d600 { - cell-index = <3>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11d600 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; - }; - - gpio0: gpio@130000 { - compatible = "fsl,p2041-gpio", "fsl,qoriq-gpio"; - reg = <0x130000 0x1000>; - interrupts = <55 2 0 0>; - #gpio-cells = <2>; - gpio-controller; - }; - - rman: rman@1e0000 { - compatible = "fsl,rman"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x1e0000 0x20000>; - reg = <0x1e0000 0x20000>; - interrupts = <16 2 1 11>; /* err_irq */ - fsl,qman-channels-id = <0x62 0x63>; - - inbound-block@0 { - compatible = "fsl,rman-inbound-block"; - reg = <0x0 0x800>; - }; - global-cfg@b00 { - compatible = "fsl,rman-global-cfg"; - reg = <0xb00 0x500>; - }; - inbound-block@1000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x1000 0x800>; - }; - inbound-block@2000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x2000 0x800>; - }; - inbound-block@3000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x3000 0x800>; - }; - }; - - usb0: usb@210000 { - compatible = "fsl,p2041-usb2-mph", - "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; - reg = <0x210000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <44 0x2 0 0>; - phy_type = "utmi"; - port0; - }; - - usb1: usb@211000 { - compatible = "fsl,p2041-usb2-dr", - "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - reg = <0x211000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <45 0x2 0 0>; - phy_type = "utmi"; - }; - - sata@220000 { - compatible = "fsl,p2041-sata", "fsl,pq-sata-v2"; - reg = <0x220000 0x1000>; - interrupts = <68 0x2 0 0>; - }; - - sata@221000 { - compatible = "fsl,p2041-sata", "fsl,pq-sata-v2"; - reg = <0x221000 0x1000>; - interrupts = <69 0x2 0 0>; - }; - - crypto: crypto@300000 { - compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x300000 0x10000>; - ranges = <0 0x300000 0x10000>; - interrupts = <92 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <88 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <89 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <90 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <91 2 0 0>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.2-rtic", - "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; - }; - - sec_mon: sec_mon@314000 { - compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; - reg = <0x314000 0x1000>; - interrupts = <93 2 0 0>; - }; - - pme: pme@316000 { - compatible = "fsl,pme"; - reg = <0x316000 0x10000>; - /* "fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ - /* "fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ - interrupts = <16 2 1 5>; - }; - - qman: qman@318000 { - compatible = "fsl,p2041-qman", "fsl,qman"; - reg = <0x318000 0x1000>; - interrupts = <16 2 1 3>; - /* Commented out, use default allocation */ - /* "fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ - /* "fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ - }; - - bman: bman@31a000 { - compatible = "fsl,p2041-bman", "fsl,bman"; - reg = <0x31a000 0x1000>; - interrupts = <16 2 1 2>; - /* Same as "fsl,qman-*, use default allocation */ - /* "fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ - }; - - fman0: fman@400000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - compatible = "fsl,p2041-fman", "fsl,fman", "simple-bus"; - ranges = <0 0x400000 0x100000>; - reg = <0x400000 0x100000>; - clock-frequency = <0>; - interrupts = < - 96 2 0 0 - 16 2 1 1>; - - cc@0 { - compatible = "fsl,p2041-fman-cc", "fsl,fman-cc"; - }; - - parser@c7000 { - compatible = "fsl,p2041-fman-parser", "fsl,fman-parser"; - reg = <0xc7000 0x1000>; - }; - - keygen@c1000 { - compatible = "fsl,p2041-fman-keygen", "fsl,fman-keygen"; - reg = <0xc1000 0x1000>; - }; - - policer@c0000 { - compatible = "fsl,p2041-fman-policer", "fsl,fman-policer"; - reg = <0xc0000 0x1000>; - }; - - muram@0 { - compatible = "fsl,p2041-fman-muram", "fsl,fman-muram"; - reg = <0x0 0x28000>; - }; - - bmi@80000 { - compatible = "fsl,p2041-fman-bmi", "fsl,fman-bmi"; - reg = <0x80000 0x400>; - }; - - qmi@80400 { - compatible = "fsl,p2041-fman-qmi", "fsl,fman-qmi"; - reg = <0x80400 0x400>; - }; - - fman0_rx0: port@88000 { - cell-index = <0>; - compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x88000 0x1000>; - }; - fman0_rx1: port@89000 { - cell-index = <1>; - compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x89000 0x1000>; - }; - fman0_rx2: port@8a000 { - cell-index = <2>; - compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8a000 0x1000>; - }; - fman0_rx3: port@8b000 { - cell-index = <3>; - compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8b000 0x1000>; - }; - fman0_rx4: port@8c000 { - cell-index = <4>; - compatible = "fsl,p2041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8c000 0x1000>; - }; - fman0_rx5: port@90000 { - cell-index = <0>; - compatible = "fsl,p2041-fman-port-10g-rx", "fsl,fman-port-10g-rx"; - reg = <0x90000 0x1000>; - }; - - fman0_tx5: port@b0000 { - cell-index = <0>; - compatible = "fsl,p2041-fman-port-10g-tx", "fsl,fman-port-10g-tx"; - reg = <0xb0000 0x1000>; - fsl,qman-channel-id = <0x40>; - }; - fman0_tx0: port@a8000 { - cell-index = <0>; - compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xa8000 0x1000>; - fsl,qman-channel-id = <0x41>; - }; - fman0_tx1: port@a9000 { - cell-index = <1>; - compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xa9000 0x1000>; - fsl,qman-channel-id = <0x42>; - }; - fman0_tx2: port@aa000 { - cell-index = <2>; - compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xaa000 0x1000>; - fsl,qman-channel-id = <0x43>; - }; - fman0_tx3: port@ab000 { - cell-index = <3>; - compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xab000 0x1000>; - fsl,qman-channel-id = <0x44>; - }; - fman0_tx4: port@ac000 { - cell-index = <4>; - compatible = "fsl,p2041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xac000 0x1000>; - fsl,qman-channel-id = <0x45>; - }; - - fman0_oh0: port@81000 { - cell-index = <0>; - compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x81000 0x1000>; - fsl,qman-channel-id = <0x46>; - }; - fman0_oh1: port@82000 { - cell-index = <1>; - compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x82000 0x1000>; - fsl,qman-channel-id = <0x47>; - }; - fman0_oh2: port@83000 { - cell-index = <2>; - compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x83000 0x1000>; - fsl,qman-channel-id = <0x48>; - }; - fman0_oh3: port@84000 { - cell-index = <3>; - compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x84000 0x1000>; - fsl,qman-channel-id = <0x49>; - }; - fman0_oh4: port@85000 { - cell-index = <4>; - compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x85000 0x1000>; - fsl,qman-channel-id = <0x4a>; - }; - fman0_oh5: port@86000 { - cell-index = <5>; - compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x86000 0x1000>; - fsl,qman-channel-id = <0x4b>; - }; - fman0_oh6: port@87000 { - cell-index = <6>; - compatible = "fsl,p2041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x87000 0x1000>; - }; - - enet0: ethernet@e0000 { - cell-index = <0>; - compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe0000 0x1000>; - fsl,port-handles = <&fman0_rx0 &fman0_tx0>; - }; - - mdio0: mdio@e1120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-mdio"; - reg = <0xe1120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet1: ethernet@e2000 { - cell-index = <1>; - compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe2000 0x1000>; - fsl,port-handles = <&fman0_rx1 &fman0_tx1>; - }; - - mdio@e3120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe3120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet2: ethernet@e4000 { - cell-index = <2>; - compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe4000 0x1000>; - fsl,port-handles = <&fman0_rx2 &fman0_tx2>; - }; - - mdio@e5120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe5120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet3: ethernet@e6000 { - cell-index = <3>; - compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe6000 0x1000>; - fsl,port-handles = <&fman0_rx3 &fman0_tx3>; - }; - - mdio@e7120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe7120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet4: ethernet@e8000 { - cell-index = <4>; - compatible = "fsl,p2041-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe8000 0x1000>; - fsl,port-handles = <&fman0_rx4 &fman0_tx4>; - }; - - mdio@e9120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe9120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet5: ethernet@f0000 { - cell-index = <0>; - compatible = "fsl,p2041-fman-10g-mac", "fsl,fman-10g-mac", "fsl,fman-xgec"; - reg = <0xf0000 0x1000>; - fsl,port-handles = <&fman0_rx5 &fman0_tx5>; - }; - - mdio@f1000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-xmdio"; - reg = <0xf1000 0x1000>; - interrupts = <100 1 0 0>; - }; - }; - }; - - rapidio@ffe0c0000 { - compatible = "fsl,srio"; - interrupts = <16 2 1 11>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; - }; - - localbus@ffe124000 { - compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus"; - interrupts = <25 2 0 0>; - #address-cells = <2>; - #size-cells = <1>; - }; - - pci0: pcie@ffe200000 { - compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "disabled"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - fsl,msi = <&msi0>; - interrupts = <16 2 1 15>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - }; - }; - - pci1: pcie@ffe201000 { - compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "okay"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 0xff>; - clock-frequency = <33333333>; - fsl,msi = <&msi1>; - interrupts = <16 2 1 14>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - }; - }; - - pci2: pcie@ffe202000 { - compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "disabled"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - fsl,msi = <&msi2>; - interrupts = <16 2 1 13>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 13>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 42 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 1 0 0 - >; - }; - }; -}; diff --git a/sys/dts/powerpc/p3041ds.dts b/sys/dts/powerpc/p3041ds.dts deleted file mode 100644 index 188cd2bee6d..00000000000 --- a/sys/dts/powerpc/p3041ds.dts +++ /dev/null @@ -1,545 +0,0 @@ -/* - * P3041DS Device Tree Source - * - * Copyright 2010-2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "p3041si.dtsi" - -/ { - model = "fsl,P3041DS"; - compatible = "fsl,P3041DS"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - phy_rgmii_0 = &phy_rgmii_0; - phy_rgmii_1 = &phy_rgmii_1; - phy_sgmii_1c = &phy_sgmii_1c; - phy_sgmii_1d = &phy_sgmii_1d; - phy_sgmii_1e = &phy_sgmii_1e; - phy_sgmii_1f = &phy_sgmii_1f; - phy_xgmii_1 = &phy_xgmii_1; - phy_xgmii_2 = &phy_xgmii_2; - emi1_rgmii = &hydra_mdio_rgmii; - emi1_sgmii = &hydra_mdio_sgmii; - emi2_xgmii = &hydra_mdio_xgmii; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000 0x80000000>; - }; - - dcsr: dcsr@f00000000 { - ranges = <0x00000000 0xf 0x00000000 0x01008000>; - }; - - bman-portals@ff4000000 { - bman-portal@0 { - cpu-handle = <&cpu0>; - }; - bman-portal@4000 { - cpu-handle = <&cpu1>; - }; - bman-portal@8000 { - cpu-handle = <&cpu2>; - }; - bman-portal@c000 { - cpu-handle = <&cpu3>; - }; - bman-portal@10000 { - }; - bman-portal@14000 { - }; - bman-portal@18000 { - }; - bman-portal@1c000 { - }; - bman-portal@20000 { - }; - bman-portal@24000 { - }; - - buffer-pool@0 { - compatible = "fsl,p3041-bpool", "fsl,bpool"; - fsl,bpid = <0>; - fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; - }; - }; - - qman-portals@ff4200000 { - qportal0: qman-portal@0 { - cpu-handle = <&cpu0>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal1: qman-portal@4000 { - cpu-handle = <&cpu1>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal2: qman-portal@8000 { - cpu-handle = <&cpu2>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal3: qman-portal@c000 { - cpu-handle = <&cpu3>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal4: qman-portal@10000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal5: qman-portal@14000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal6: qman-portal@18000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal7: qman-portal@1c000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal8: qman-portal@20000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal9: qman-portal@24000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - }; - - soc: soc@ffe000000 { - spi@110000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <35000000>; /* input clock */ - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - i2c@118100 { - eeprom@51 { - compatible = "at24,24c256"; - reg = <0x51>; - }; - eeprom@52 { - compatible = "at24,24c256"; - reg = <0x52>; - }; - }; - - i2c@119100 { - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - interrupts = <0x1 0x1 0 0>; - }; - }; - - pme: pme@316000 { - /* Commented out, use default allocation */ - /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ - /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ - }; - - qman: qman@318000 { - /* Commented out, use default allocation */ - /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ - /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ - }; - - bman: bman@31a000 { - /* Same as fsl,qman-*, use default allocation */ - /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ - }; - - fman0: fman@400000 { - enet0: ethernet@e0000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy_rgmii_0>; - phy-connection-type = "rgmii"; - }; - - mdio0: mdio@e1120 { - tbi0: tbi-phy@8 { - reg = <0x8>; - device_type = "tbi-phy"; - }; - - /* - * Virtual MDIO for the two on-board RGMII - * ports. The fsl,hydra-mdio-muxval property - * is already correct. - */ - hydra_mdio_rgmii: hydra-mdio-rgmii { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,hydra-mdio"; - fsl,mdio-handle = <&mdio0>; - fsl,hydra-mdio-muxval = <0x00>; - status = "disabled"; - - phy_rgmii_0: ethernet-phy@0 { - reg = <0x0>; - }; - phy_rgmii_1: ethernet-phy@1 { - reg = <0x1>; - }; - }; - - /* - * Virtual MDIO for the four-port SGMII card. - * The fsl,hydra-mdio-muxval property will be - * fixed-up by U-Boot based on the slot that - * the SGMII card is in. - * - * Note: we do not support DTSEC5 connected to - * SGMII, so this is the only SGMII node. - */ - hydra_mdio_sgmii: hydra-mdio-sgmii { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,hydra-mdio"; - fsl,mdio-handle = <&mdio0>; - fsl,hydra-mdio-muxval = <0x00>; - status = "disabled"; - - phy_sgmii_1c: ethernet-phy@1c { - reg = <0x1c>; - }; - phy_sgmii_1d: ethernet-phy@1d { - reg = <0x1d>; - }; - phy_sgmii_1e: ethernet-phy@1e { - reg = <0x1e>; - }; - phy_sgmii_1f: ethernet-phy@1f { - reg = <0x1f>; - }; - }; - }; - - enet1: ethernet@e2000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy_sgmii_1d>; - phy-connection-type = "sgmii"; - }; - - mdio@e3120 { - tbi1: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@e4000 { - tbi-handle = <&tbi2>; - phy-handle = <&phy_sgmii_1e>; - phy-connection-type = "sgmii"; - }; - - mdio@e5120 { - tbi2: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet3: ethernet@e6000 { - tbi-handle = <&tbi3>; - phy-handle = <&phy_sgmii_1f>; - phy-connection-type = "sgmii"; - }; - - mdio@e7120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe7120 0xee0>; - interrupts = <100 1 0 0>; - - tbi3: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet4: ethernet@e8000 { - tbi-handle = <&tbi4>; - phy-handle = <&phy_rgmii_1>; - phy-connection-type = "rgmii"; - }; - - mdio@e9120 { - tbi4: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet5: ethernet@f0000 { - /* - * phy-handle will be updated by U-Boot to - * reflect the actual slot the XAUI card is in. - */ - phy-handle = <&phy_xgmii_1>; - phy-connection-type = "xgmii"; - }; - - /* - * We only support one XAUI card, so the MDIO muxing - * is set by U-Boot, and Linux never touches it. - * Therefore, we don't need a virtual MDIO node. - * However, the phy address depends on the slot, so - * only one of the ethernet-phy nodes below will be - * used. - */ - hydra_mdio_xgmii: mdio@f1000 { - status = "disabled"; - - /* XAUI card in slot 1 */ - phy_xgmii_1: ethernet-phy@4 { - reg = <0x4>; - }; - - /* XAUI card in slot 2 */ - phy_xgmii_2: ethernet-phy@0 { - reg = <0x0>; - }; - }; - }; - }; - - rapidio@ffe0c0000 { - reg = <0xf 0xfe0c0000 0 0x11000>; - - port1 { - ranges = <0 0 0xc 0x20000000 0 0x10000000>; - }; - port2 { - ranges = <0 0 0xc 0x30000000 0 0x10000000>; - }; - }; - - localbus@ffe124000 { - reg = <0xf 0xfe124000 0 0x1000>; - ranges = <0 0 0xf 0xb8000000 0x04000000>; - - flash@0,0 { - compatible = "cfi-flash"; - /* - * Map 64Mb of 128MB NOR flash memory. Since highest - * line of address of NOR flash memory are set by - * FPGA, memory are divided into two pages equal to - * 64MB. One of the pages can be accessed at once. - */ - reg = <0 0 0x04000000>; - bank-width = <2>; - device-width = <2>; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - label = "NAND U-Boot Image"; - reg = <0x0 0x02000000>; - read-only; - }; - - partition@2000000 { - label = "NAND Root File System"; - reg = <0x02000000 0x10000000>; - }; - - partition@12000000 { - label = "NAND Compressed RFS Image"; - reg = <0x12000000 0x08000000>; - }; - - partition@1a000000 { - label = "NAND Linux Kernel Image"; - reg = <0x1a000000 0x04000000>; - }; - - partition@1e000000 { - label = "NAND DTB Image"; - reg = <0x1e000000 0x01000000>; - }; - - partition@1f000000 { - label = "NAND Writable User area"; - reg = <0x1f000000 0x21000000>; - }; - }; - - board-control@3,0 { - compatible = "fsl,p3041ds-fpga", "fsl,fpga-ngpixis"; - reg = <3 0 0x30>; - }; - }; - - pci0: pcie@ffe200000 { - reg = <0xf 0xfe200000 0 0x1000>; - ranges = <0x02000000 0 0x80000000 0x0 0x80000000 0x0 0x10000000 - 0x01000000 0 0x00000000 0x0 0xff000000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0x80000000 - 0x02000000 0 0x80000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff000000 - 0 0x00010000>; - }; - }; - - pci1: pcie@ffe201000 { - reg = <0xf 0xfe201000 0 0x1000>; - ranges = <0x02000000 0x0 0x90000000 0x0 0x90000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0x0 0xff010000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0x90000000 - 0x02000000 0 0x90000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff010000 - 0 0x00010000>; - }; - }; - - pci2: pcie@ffe202000 { - reg = <0xf 0xfe202000 0 0x1000>; - ranges = <0x02000000 0 0xa0000000 0x0 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0x0 0xff020000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xa0000000 - 0x02000000 0 0xa0000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff020000 - 0 0x00010000>; - }; - }; - - pci3: pcie@ffe203000 { - reg = <0xf 0xfe203000 0 0x1000>; - ranges = <0x02000000 0 0xb0000000 0x0 0xb0000000 0 0x08000000 - 0x01000000 0 0x00000000 0x0 0xff030000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xb0000000 - 0x02000000 0 0xb0000000 - 0 0x08000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff030000 - 0 0x00010000>; - }; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; -}; diff --git a/sys/dts/powerpc/p3041si.dtsi b/sys/dts/powerpc/p3041si.dtsi deleted file mode 100644 index ef09283f531..00000000000 --- a/sys/dts/powerpc/p3041si.dtsi +++ /dev/null @@ -1,1344 +0,0 @@ -/* - * P3041 Silicon Device Tree Source - * - * Copyright 2010-2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; - -/ { - compatible = "fsl,P3041"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ccsr = &soc; - dcsr = &dcsr; - - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - ethernet4 = &enet4; - ethernet5 = &enet5; - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - pci3 = &pci3; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - bman = &bman; - qman = &qman; - pme = &pme; - rman = &rman; - sdhc = &sdhc; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - - fman0 = &fman0; - fman0_oh0 = &fman0_oh0; - fman0_oh1 = &fman0_oh1; - fman0_oh2 = &fman0_oh2; - fman0_oh3 = &fman0_oh3; - fman0_oh4 = &fman0_oh4; - fman0_oh5 = &fman0_oh5; - fman0_oh6 = &fman0_oh6; - fman0_rx0 = &fman0_rx0; - fman0_rx1 = &fman0_rx1; - fman0_rx2 = &fman0_rx2; - fman0_rx3 = &fman0_rx3; - fman0_rx4 = &fman0_rx4; - fman0_rx5 = &fman0_rx5; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e500mc@0 { - device_type = "cpu"; - reg = <0>; - bus-frequency = <749999996>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e500mc@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu2: PowerPC,e500mc@2 { - device_type = "cpu"; - reg = <2>; - next-level-cache = <&L2_2>; - L2_2: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu3: PowerPC,e500mc@3 { - device_type = "cpu"; - reg = <3>; - next-level-cache = <&L2_3>; - L2_3: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; - - dcsr: dcsr@f00000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,dcsr", "simple-bus"; - - dcsr-epu@0 { - compatible = "fsl,dcsr-epu"; - interrupts = <52 2 0 0 - 84 2 0 0 - 85 2 0 0>; - interrupt-parent = <&mpic>; - reg = <0x0 0x1000>; - }; - dcsr-npc { - compatible = "fsl,dcsr-npc"; - reg = <0x1000 0x1000 0x1000000 0x8000>; - }; - dcsr-nxc@2000 { - compatible = "fsl,dcsr-nxc"; - reg = <0x2000 0x1000>; - }; - dcsr-corenet { - compatible = "fsl,dcsr-corenet"; - reg = <0x8000 0x1000 0xB0000 0x1000>; - }; - dcsr-dpaa@9000 { - compatible = "fsl,p43041-dcsr-dpaa", "fsl,dcsr-dpaa"; - reg = <0x9000 0x1000>; - }; - dcsr-ocn@11000 { - compatible = "fsl,p43041-dcsr-ocn", "fsl,dcsr-ocn"; - reg = <0x11000 0x1000>; - }; - dcsr-ddr@12000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr>; - reg = <0x12000 0x1000>; - }; - dcsr-nal@18000 { - compatible = "fsl,p43041-dcsr-nal", "fsl,dcsr-nal"; - reg = <0x18000 0x1000>; - }; - dcsr-rcpm@22000 { - compatible = "fsl,p43041-dcsr-rcpm", "fsl,dcsr-rcpm"; - reg = <0x22000 0x1000>; - }; - dcsr-cpu-sb-proxy@40000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu0>; - reg = <0x40000 0x1000>; - }; - dcsr-cpu-sb-proxy@41000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu1>; - reg = <0x41000 0x1000>; - }; - dcsr-cpu-sb-proxy@42000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu2>; - reg = <0x42000 0x1000>; - }; - dcsr-cpu-sb-proxy@43000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu3>; - reg = <0x43000 0x1000>; - }; - }; - - bman-portals@ff4000000 { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "fsl,bman-portals"; - ranges = <0x0 0xf 0xfde00000 0x200000>; - bman-portal@0 { - cell-index = <0x0>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x0 0x4000 0x100000 0x1000>; - interrupts = <105 2 0 0>; - }; - bman-portal@4000 { - cell-index = <0x1>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x4000 0x4000 0x101000 0x1000>; - interrupts = <107 2 0 0>; - }; - bman-portal@8000 { - cell-index = <2>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x8000 0x4000 0x102000 0x1000>; - interrupts = <109 2 0 0>; - }; - bman-portal@c000 { - cell-index = <0x3>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0xc000 0x4000 0x103000 0x1000>; - interrupts = <111 2 0 0>; - }; - bman-portal@10000 { - cell-index = <0x4>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x10000 0x4000 0x104000 0x1000>; - interrupts = <113 2 0 0>; - }; - bman-portal@14000 { - cell-index = <0x5>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x14000 0x4000 0x105000 0x1000>; - interrupts = <115 2 0 0>; - }; - bman-portal@18000 { - cell-index = <0x6>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x18000 0x4000 0x106000 0x1000>; - interrupts = <117 2 0 0>; - }; - bman-portal@1c000 { - cell-index = <0x7>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x1c000 0x4000 0x107000 0x1000>; - interrupts = <119 2 0 0>; - }; - bman-portal@20000 { - cell-index = <0x8>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x20000 0x4000 0x108000 0x1000>; - interrupts = <121 2 0 0>; - }; - bman-portal@24000 { - cell-index = <0x9>; - compatible = "fsl,p3041-bman-portal", "fsl,bman-portal"; - reg = <0x24000 0x4000 0x109000 0x1000>; - interrupts = <123 2 0 0>; - }; - - buffer-pool@0 { - compatible = "fsl,p3041-bpool", "fsl,bpool"; - fsl,bpid = <0>; - fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; - }; - }; - - qman-portals@ff4200000 { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "fsl,qman-portals"; - ranges = <0x0 0xf 0xfdc00000 0x200000>; - qportal0: qman-portal@0 { - cell-index = <0x0>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x0 0x4000 0x100000 0x1000>; - interrupts = <104 0x2 0 0>; - fsl,qman-channel-id = <0x0>; - }; - - qportal1: qman-portal@4000 { - cell-index = <0x1>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x4000 0x4000 0x101000 0x1000>; - interrupts = <106 0x2 0 0>; - fsl,qman-channel-id = <0x1>; - }; - - qportal2: qman-portal@8000 { - cell-index = <0x2>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x8000 0x4000 0x102000 0x1000>; - interrupts = <108 0x2 0 0>; - fsl,qman-channel-id = <0x2>; - }; - - qportal3: qman-portal@c000 { - cell-index = <0x3>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0xc000 0x4000 0x103000 0x1000>; - interrupts = <110 0x2 0 0>; - fsl,qman-channel-id = <0x3>; - }; - - qportal4: qman-portal@10000 { - cell-index = <0x4>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x10000 0x4000 0x104000 0x1000>; - interrupts = <112 0x2 0 0>; - fsl,qman-channel-id = <0x4>; - }; - - qportal5: qman-portal@14000 { - cell-index = <0x5>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x14000 0x4000 0x105000 0x1000>; - interrupts = <114 0x2 0 0>; - fsl,qman-channel-id = <0x5>; - }; - - qportal6: qman-portal@18000 { - cell-index = <0x6>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x18000 0x4000 0x106000 0x1000>; - interrupts = <116 0x2 0 0>; - fsl,qman-channel-id = <0x6>; - }; - - qportal7: qman-portal@1c000 { - cell-index = <0x7>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x1c000 0x4000 0x107000 0x1000>; - interrupts = <118 0x2 0 0>; - fsl,qman-channel-id = <0x7>; - }; - - qportal8: qman-portal@20000 { - cell-index = <0x8>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x20000 0x4000 0x108000 0x1000>; - interrupts = <120 0x2 0 0>; - fsl,qman-channel-id = <0x8>; - }; - - qportal9: qman-portal@24000 { - cell-index = <0x9>; - compatible = "fsl,p3041-qman-portal", "fsl,qman-portal"; - reg = <0x24000 0x4000 0x109000 0x1000>; - interrupts = <122 0x2 0 0>; - fsl,qman-channel-id = <0x9>; - }; - - qpool1: qman-pool@1 { - cell-index = <1>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x21>; - }; - - qpool2: qman-pool@2 { - cell-index = <2>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x22>; - }; - - qpool3: qman-pool@3 { - cell-index = <3>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x23>; - }; - - qpool4: qman-pool@4 { - cell-index = <4>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x24>; - }; - - qpool5: qman-pool@5 { - cell-index = <5>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x25>; - }; - - qpool6: qman-pool@6 { - cell-index = <6>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x26>; - }; - - qpool7: qman-pool@7 { - cell-index = <7>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x27>; - }; - - qpool8: qman-pool@8 { - cell-index = <8>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x28>; - }; - - qpool9: qman-pool@9 { - cell-index = <9>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x29>; - }; - - qpool10: qman-pool@10 { - cell-index = <10>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2a>; - }; - - qpool11: qman-pool@11 { - cell-index = <11>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2b>; - }; - - qpool12: qman-pool@12 { - cell-index = <12>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2c>; - }; - - qpool13: qman-pool@13 { - cell-index = <13>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2d>; - }; - - qpool14: qman-pool@14 { - cell-index = <14>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2e>; - }; - - qpool15: qman-pool@15 { - cell-index = <15>; - compatible = "fsl,p3041-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2f>; - }; - }; - - soc: soc@ffe000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - - bus-frequency = <0>; // Filled out by kernel. - - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - ddr: memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; - reg = <0x10000 0x1000>; - interrupts = <16 2 1 27>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x4000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - - mpic: pic@40000 { - clock-frequency = <0>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <4>; - reg = <0x40000 0x40000>; - compatible = "fsl,mpic", "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi0: msi@41600 { - compatible = "fsl,mpic-msi"; - reg = <0x41600 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 0 0 - 0xe1 0 0 0 - 0xe2 0 0 0 - 0xe3 0 0 0 - 0xe4 0 0 0 - 0xe5 0 0 0 - 0xe6 0 0 0 - 0xe7 0 0 0>; - }; - - msi1: msi@41800 { - compatible = "fsl,mpic-msi"; - reg = <0x41800 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe8 0 0 0 - 0xe9 0 0 0 - 0xea 0 0 0 - 0xeb 0 0 0 - 0xec 0 0 0 - 0xed 0 0 0 - 0xee 0 0 0 - 0xef 0 0 0>; - }; - - msi2: msi@41a00 { - compatible = "fsl,mpic-msi"; - reg = <0x41a00 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xf0 0 0 0 - 0xf1 0 0 0 - 0xf2 0 0 0 - 0xf3 0 0 0 - 0xf4 0 0 0 - 0xf5 0 0 0 - 0xf6 0 0 0 - 0xf7 0 0 0>; - }; - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p3041-serdes"; - reg = <0xea000 0x1000>; - }; - - dma0: dma@100300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p3041-dma", "fsl,eloplus-dma"; - reg = <0x100300 0x4>; - ranges = <0x0 0x100100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <28 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <29 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <30 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <31 2 0 0>; - }; - }; - - dma1: dma@101300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p3041-dma", "fsl,eloplus-dma"; - reg = <0x101300 0x4>; - ranges = <0x0 0x101100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <32 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <33 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <34 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,p3041-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <35 2 0 0>; - }; - }; - - spi@110000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,p3041-espi", "fsl,mpc8536-espi"; - reg = <0x110000 0x1000>; - interrupts = <53 0x2 0 0>; - fsl,espi-num-chipselects = <4>; - }; - - sdhc: sdhc@114000 { - compatible = "fsl,p3041-esdhc", "fsl,esdhc"; - reg = <0x114000 0x1000>; - interrupts = <48 2 0 0>; - sdhci,auto-cmd12; - clock-frequency = <0>; - }; - - i2c@118000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x118000 0x100>; - interrupts = <38 2 0 0>; - dfsrr; - }; - - i2c@118100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x118100 0x100>; - interrupts = <38 2 0 0>; - dfsrr; - }; - - i2c@119000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <2>; - compatible = "fsl-i2c"; - reg = <0x119000 0x100>; - interrupts = <39 2 0 0>; - dfsrr; - }; - - i2c@119100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <3>; - compatible = "fsl-i2c"; - reg = <0x119100 0x100>; - interrupts = <39 2 0 0>; - dfsrr; - }; - - serial0: serial@11c500 { - cell-index = <0>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11c500 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; - }; - - serial1: serial@11c600 { - cell-index = <1>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11c600 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; - }; - - serial2: serial@11d500 { - cell-index = <2>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11d500 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; - }; - - serial3: serial@11d600 { - cell-index = <3>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11d600 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; - }; - - gpio0: gpio@130000 { - compatible = "fsl,p3041-gpio", "fsl,qoriq-gpio"; - reg = <0x130000 0x1000>; - interrupts = <55 2 0 0>; - #gpio-cells = <2>; - gpio-controller; - }; - - rman: rman@1e0000 { - compatible = "fsl,rman"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x1e0000 0x20000>; - reg = <0x1e0000 0x20000>; - interrupts = <16 2 1 11>; /* err_irq */ - fsl,qman-channels-id = <0x62 0x63>; - - inbound-block@0 { - compatible = "fsl,rman-inbound-block"; - reg = <0x0 0x800>; - }; - global-cfg@b00 { - compatible = "fsl,rman-global-cfg"; - reg = <0xb00 0x500>; - }; - inbound-block@1000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x1000 0x800>; - }; - inbound-block@2000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x2000 0x800>; - }; - inbound-block@3000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x3000 0x800>; - }; - }; - - usb0: usb@210000 { - compatible = "fsl,p3041-usb2-mph", - "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; - reg = <0x210000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <44 0x2 0 0>; - phy_type = "utmi"; - port0; - }; - - usb1: usb@211000 { - compatible = "fsl,p3041-usb2-dr", - "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - reg = <0x211000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <45 0x2 0 0>; - dr_mode = "host"; - phy_type = "utmi"; - }; - - sata@220000 { - compatible = "fsl,p3041-sata", "fsl,pq-sata-v2"; - reg = <0x220000 0x1000>; - interrupts = <68 0x2 0 0>; - }; - - sata@221000 { - compatible = "fsl,p3041-sata", "fsl,pq-sata-v2"; - reg = <0x221000 0x1000>; - interrupts = <69 0x2 0 0>; - }; - - crypto: crypto@300000 { - compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x300000 0x10000>; - ranges = <0 0x300000 0x10000>; - interrupts = <92 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <88 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <89 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <90 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <91 2 0 0>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.2-rtic", - "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; - }; - - sec_mon: sec_mon@314000 { - compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; - reg = <0x314000 0x1000>; - interrupts = <93 2 0 0>; - }; - - pme: pme@316000 { - compatible = "fsl,pme"; - reg = <0x316000 0x10000>; - /* "fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ - /* "fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ - interrupts = <16 2 1 5>; - }; - - qman: qman@318000 { - compatible = "fsl,p3041-qman", "fsl,qman"; - reg = <0x318000 0x1000>; - interrupts = <16 2 1 3>; - /* Commented out, use default allocation */ - /* "fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ - /* "fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ - }; - - bman: bman@31a000 { - compatible = "fsl,p3041-bman", "fsl,bman"; - reg = <0x31a000 0x1000>; - interrupts = <16 2 1 2>; - /* Same as "fsl,qman-*, use default allocation */ - /* "fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ - }; - - fman0: fman@400000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - compatible = "fsl,p3041-fman", "fsl,fman", "simple-bus"; - ranges = <0 0x400000 0x100000>; - reg = <0x400000 0x100000>; - clock-frequency = <0>; - interrupts = < - 96 2 0 0 - 16 2 1 1>; - - cc@0 { - compatible = "fsl,p3041-fman-cc", "fsl,fman-cc"; - }; - - parser@c7000 { - compatible = "fsl,p3041-fman-parser", "fsl,fman-parser"; - reg = <0xc7000 0x1000>; - }; - - keygen@c1000 { - compatible = "fsl,p3041-fman-keygen", "fsl,fman-keygen"; - reg = <0xc1000 0x1000>; - }; - - policer@c0000 { - compatible = "fsl,p3041-fman-policer", "fsl,fman-policer"; - reg = <0xc0000 0x1000>; - }; - - muram@0 { - compatible = "fsl,p3041-fman-muram", "fsl,fman-muram"; - reg = <0x0 0x28000>; - }; - - bmi@80000 { - compatible = "fsl,p3041-fman-bmi", "fsl,fman-bmi"; - reg = <0x80000 0x400>; - }; - - qmi@80400 { - compatible = "fsl,p3041-fman-qmi", "fsl,fman-qmi"; - reg = <0x80400 0x400>; - }; - - fman0_rx0: port@88000 { - cell-index = <0>; - compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x88000 0x1000>; - }; - fman0_rx1: port@89000 { - cell-index = <1>; - compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x89000 0x1000>; - }; - fman0_rx2: port@8a000 { - cell-index = <2>; - compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8a000 0x1000>; - }; - fman0_rx3: port@8b000 { - cell-index = <3>; - compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8b000 0x1000>; - }; - fman0_rx4: port@8c000 { - cell-index = <4>; - compatible = "fsl,p3041-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8c000 0x1000>; - }; - fman0_rx5: port@90000 { - cell-index = <0>; - compatible = "fsl,p3041-fman-port-10g-rx", "fsl,fman-port-10g-rx"; - reg = <0x90000 0x1000>; - }; - - fman0_tx5: port@b0000 { - cell-index = <0>; - compatible = "fsl,p3041-fman-port-10g-tx", "fsl,fman-port-10g-tx"; - reg = <0xb0000 0x1000>; - fsl,qman-channel-id = <0x40>; - }; - fman0_tx0: port@a8000 { - cell-index = <0>; - compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xa8000 0x1000>; - fsl,qman-channel-id = <0x41>; - }; - fman0_tx1: port@a9000 { - cell-index = <1>; - compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xa9000 0x1000>; - fsl,qman-channel-id = <0x42>; - }; - fman0_tx2: port@aa000 { - cell-index = <2>; - compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xaa000 0x1000>; - fsl,qman-channel-id = <0x43>; - }; - fman0_tx3: port@ab000 { - cell-index = <3>; - compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xab000 0x1000>; - fsl,qman-channel-id = <0x44>; - }; - fman0_tx4: port@ac000 { - cell-index = <4>; - compatible = "fsl,p3041-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xac000 0x1000>; - fsl,qman-channel-id = <0x45>; - }; - - fman0_oh0: port@81000 { - cell-index = <0>; - compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x81000 0x1000>; - fsl,qman-channel-id = <0x46>; - }; - fman0_oh1: port@82000 { - cell-index = <1>; - compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x82000 0x1000>; - fsl,qman-channel-id = <0x47>; - }; - fman0_oh2: port@83000 { - cell-index = <2>; - compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x83000 0x1000>; - fsl,qman-channel-id = <0x48>; - }; - fman0_oh3: port@84000 { - cell-index = <3>; - compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x84000 0x1000>; - fsl,qman-channel-id = <0x49>; - }; - fman0_oh4: port@85000 { - cell-index = <4>; - compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x85000 0x1000>; - fsl,qman-channel-id = <0x4a>; - }; - fman0_oh5: port@86000 { - cell-index = <5>; - compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x86000 0x1000>; - fsl,qman-channel-id = <0x4b>; - }; - fman0_oh6: port@87000 { - cell-index = <6>; - compatible = "fsl,p3041-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x87000 0x1000>; - }; - - enet0: ethernet@e0000 { - cell-index = <0>; - compatible = "fsl,p3041-fman-1g-mac", - "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe0000 0x1000>; - fsl,port-handles = <&fman0_rx0 &fman0_tx0>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio0: mdio@e1120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-mdio"; - reg = <0xe1120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet1: ethernet@e2000 { - cell-index = <1>; - compatible = "fsl,p3041-fman-1g-mac", - "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe2000 0x1000>; - fsl,port-handles = <&fman0_rx1 &fman0_tx1>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio@e3120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe3120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet2: ethernet@e4000 { - cell-index = <2>; - compatible = "fsl,p3041-fman-1g-mac", - "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe4000 0x1000>; - fsl,port-handles = <&fman0_rx2 &fman0_tx2>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio@e5120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe5120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet3: ethernet@e6000 { - cell-index = <3>; - compatible = "fsl,p3041-fman-1g-mac", - "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe6000 0x1000>; - fsl,port-handles = <&fman0_rx3 &fman0_tx3>; - }; - - mdio@e7120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe7120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet4: ethernet@e8000 { - cell-index = <4>; - compatible = "fsl,p3041-fman-1g-mac", - "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe8000 0x1000>; - fsl,port-handles = <&fman0_rx4 &fman0_tx4>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio@e9120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe9120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet5: ethernet@f0000 { - cell-index = <0>; - compatible = "fsl,p3041-fman-10g-mac", - "fsl,fman-10g-mac", "fsl,fman-xgec"; - reg = <0xf0000 0x1000>; - fsl,port-handles = <&fman0_rx5 &fman0_tx5>; - }; - - mdio@f1000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-xmdio"; - reg = <0xf1000 0x1000>; - interrupts = <100 1 0 0>; - }; - - ptp_timer0: rtc@fe000 { - compatible = "fsl,fman-rtc"; - reg = <0xfe000 0x1000>; - }; - }; - }; - - rapidio@ffe0c0000 { - compatible = "fsl,srio"; - interrupts = <16 2 1 11>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; - }; - - localbus@ffe124000 { - compatible = "fsl,p3041-rev1.0-elbc", "simple-bus", "fsl,elbc"; - interrupts = < - 25 2 0 0 - 16 2 1 19 - >; - #address-cells = <2>; - #size-cells = <1>; - }; - - pci0: pcie@ffe200000 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "okay"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi0>; - interrupts = <16 2 1 15>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - }; - }; - - pci1: pcie@ffe201000 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "disabled"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 0xff>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi1>; - interrupts = <16 2 1 14>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - }; - }; - - pci2: pcie@ffe202000 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "okay"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi2>; - interrupts = <16 2 1 13>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 13>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 42 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 1 0 0 - >; - }; - }; - - pci3: pcie@ffe203000 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "disabled"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi2>; - interrupts = <16 2 1 12>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 12>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 43 1 0 0 - 0000 0 0 2 &mpic 0 1 0 0 - 0000 0 0 3 &mpic 4 1 0 0 - 0000 0 0 4 &mpic 8 1 0 0 - >; - }; - }; -}; diff --git a/sys/dts/powerpc/p5020ds.dts b/sys/dts/powerpc/p5020ds.dts deleted file mode 100644 index 73e2cdf1e97..00000000000 --- a/sys/dts/powerpc/p5020ds.dts +++ /dev/null @@ -1,541 +0,0 @@ -/* - * P5020DS Device Tree Source - * - * Copyright 2010-2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "p5020si.dtsi" - -/ { - model = "fsl,P5020DS"; - compatible = "fsl,P5020DS"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - phy_rgmii_0 = &phy_rgmii_0; - phy_rgmii_1 = &phy_rgmii_1; - phy_sgmii_1c = &phy_sgmii_1c; - phy_sgmii_1d = &phy_sgmii_1d; - phy_sgmii_1e = &phy_sgmii_1e; - phy_sgmii_1f = &phy_sgmii_1f; - phy_xgmii_1 = &phy_xgmii_1; - phy_xgmii_2 = &phy_xgmii_2; - emi1_rgmii = &hydra_mdio_rgmii; - emi1_sgmii = &hydra_mdio_sgmii; - emi2_xgmii = &hydra_mdio_xgmii; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000 0x80000000>; - }; - - dcsr: dcsr@f00000000 { - ranges = <0x00000000 0xf 0x00000000 0x01008000>; - }; - - bman-portals@ff4000000 { - bman-portal@0 { - cpu-handle = <&cpu0>; - }; - bman-portal@4000 { - cpu-handle = <&cpu1>; - }; - bman-portal@8000 { - }; - bman-portal@c000 { - }; - bman-portal@10000 { - }; - bman-portal@14000 { - }; - bman-portal@18000 { - }; - bman-portal@1c000 { - }; - bman-portal@20000 { - }; - bman-portal@24000 { - }; - - buffer-pool@0 { - compatible = "fsl,p5020-bpool", "fsl,bpool"; - fsl,bpid = <0>; - fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; - }; - }; - - qman-portals@ff4200000 { - qportal0: qman-portal@0 { - cpu-handle = <&cpu0>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal1: qman-portal@4000 { - cpu-handle = <&cpu1>; - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal2: qman-portal@8000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal3: qman-portal@c000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal4: qman-portal@10000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal5: qman-portal@14000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal6: qman-portal@18000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal7: qman-portal@1c000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal8: qman-portal@20000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - - qportal9: qman-portal@24000 { - fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 - &qpool4 &qpool5 &qpool6 - &qpool7 &qpool8 &qpool9 - &qpool10 &qpool11 &qpool12 - &qpool13 &qpool14 &qpool15>; - }; - }; - - soc: soc@ffe000000 { - spi@110000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - i2c@118100 { - eeprom@51 { - compatible = "at24,24c256"; - reg = <0x51>; - }; - eeprom@52 { - compatible = "at24,24c256"; - reg = <0x52>; - }; - }; - - i2c@119100 { - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - interrupts = <0x1 0x1 0 0>; - }; - }; - - pme: pme@316000 { - /* Commented out, use default allocation */ - /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ - /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ - }; - - qman: qman@318000 { - /* Commented out, use default allocation */ - /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ - /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ - }; - - bman: bman@31a000 { - /* Same as fsl,qman-*, use default allocation */ - /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ - }; - - fman0: fman@400000 { - enet0: ethernet@e0000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy_rgmii_0>; - phy-connection-type = "rgmii"; - }; - - mdio0: mdio@e1120 { - tbi0: tbi-phy@8 { - reg = <0x8>; - device_type = "tbi-phy"; - }; - - /* - * Virtual MDIO for the two on-board RGMII - * ports. The fsl,hydra-mdio-muxval property - * is already correct. - */ - hydra_mdio_rgmii: hydra-mdio-rgmii { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,hydra-mdio"; - fsl,mdio-handle = <&mdio0>; - fsl,hydra-mdio-muxval = <0x00>; - status = "disabled"; - - phy_rgmii_0: ethernet-phy@0 { - reg = <0x0>; - }; - phy_rgmii_1: ethernet-phy@1 { - reg = <0x1>; - }; - }; - - /* - * Virtual MDIO for the four-port SGMII card. - * The fsl,hydra-mdio-muxval property will be - * fixed-up by U-Boot based on the slot that - * the SGMII card is in. - * - * Note: we do not support DTSEC5 connected to - * SGMII, so this is the only SGMII node. - */ - hydra_mdio_sgmii: hydra-mdio-sgmii { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,hydra-mdio"; - fsl,mdio-handle = <&mdio0>; - fsl,hydra-mdio-muxval = <0x00>; - status = "disabled"; - - phy_sgmii_1c: ethernet-phy@1c { - reg = <0x1c>; - }; - phy_sgmii_1d: ethernet-phy@1d { - reg = <0x1d>; - }; - phy_sgmii_1e: ethernet-phy@1e { - reg = <0x1e>; - }; - phy_sgmii_1f: ethernet-phy@1f { - reg = <0x1f>; - }; - }; - }; - - enet1: ethernet@e2000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy_sgmii_1d>; - phy-connection-type = "sgmii"; - }; - - mdio@e3120 { - tbi1: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@e4000 { - tbi-handle = <&tbi2>; - phy-handle = <&phy_sgmii_1e>; - phy-connection-type = "sgmii"; - }; - - mdio@e5120 { - tbi2: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet3: ethernet@e6000 { - tbi-handle = <&tbi3>; - phy-handle = <&phy_sgmii_1f>; - phy-connection-type = "sgmii"; - }; - - mdio@e7120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe7120 0xee0>; - interrupts = <100 1 0 0>; - - tbi3: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet4: ethernet@e8000 { - tbi-handle = <&tbi4>; - phy-handle = <&phy_rgmii_1>; - phy-connection-type = "rgmii"; - }; - - mdio@e9120 { - tbi4: tbi-phy@8 { - reg = <8>; - device_type = "tbi-phy"; - }; - }; - - enet5: ethernet@f0000 { - /* - * phy-handle will be updated by U-Boot to - * reflect the actual slot the XAUI card is in. - */ - phy-handle = <&phy_xgmii_1>; - phy-connection-type = "xgmii"; - }; - - /* - * We only support one XAUI card, so the MDIO muxing - * is set by U-Boot, and Linux never touches it. - * Therefore, we don't need a virtual MDIO node. - * However, the phy address depends on the slot, so - * only one of the ethernet-phy nodes below will be - * used. - */ - hydra_mdio_xgmii: mdio@f1000 { - status = "disabled"; - - /* XAUI card in slot 1 */ - phy_xgmii_1: ethernet-phy@4 { - reg = <0x4>; - }; - - /* XAUI card in slot 2 */ - phy_xgmii_2: ethernet-phy@0 { - reg = <0x0>; - }; - }; - }; - }; - - rapidio@ffe0c0000 { - reg = <0xf 0xfe0c0000 0 0x11000>; - - port1 { - ranges = <0 0 0xc 0x20000000 0 0x10000000>; - }; - port2 { - ranges = <0 0 0xc 0x30000000 0 0x10000000>; - }; - }; - - localbus@ffe124000 { - reg = <0xf 0xfe124000 0 0x1000>; - ranges = <0 0 0xf 0xb8000000 0x04000000>; - - flash@0,0 { - compatible = "cfi-flash"; - /* - * Map 64Mb of 128MB NOR flash memory. Since highest - * line of address of NOR flash memory are set by - * FPGA, memory are divided into two pages equal to - * 64MB. One of the pages can be accessed at once. - */ - reg = <0 0 0x04000000>; - bank-width = <2>; - device-width = <2>; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - label = "NAND U-Boot Image"; - reg = <0x0 0x02000000>; - read-only; - }; - - partition@2000000 { - label = "NAND Root File System"; - reg = <0x02000000 0x10000000>; - }; - - partition@12000000 { - label = "NAND Compressed RFS Image"; - reg = <0x12000000 0x08000000>; - }; - - partition@1a000000 { - label = "NAND Linux Kernel Image"; - reg = <0x1a000000 0x04000000>; - }; - - partition@1e000000 { - label = "NAND DTB Image"; - reg = <0x1e000000 0x01000000>; - }; - - partition@1f000000 { - label = "NAND Writable User area"; - reg = <0x1f000000 0x21000000>; - }; - }; - - board-control@3,0 { - compatible = "fsl,p5020ds-fpga", "fsl,fpga-ngpixis"; - reg = <3 0 0x30>; - }; - }; - - pci0: pcie@ffe200000 { - reg = <0xf 0xfe200000 0 0x1000>; - ranges = <0x02000000 0 0x80000000 0x0 0x80000000 0x0 0x10000000 - 0x01000000 0 0x00000000 0x0 0xff000000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0x80000000 - 0x02000000 0 0x80000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff000000 - 0 0x00010000>; - }; - }; - - pci1: pcie@ffe201000 { - reg = <0xf 0xfe201000 0 0x1000>; - ranges = <0x02000000 0x0 0x90000000 0x0 0x90000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0x0 0xff010000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0x90000000 - 0x02000000 0 0x90000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff010000 - 0 0x00010000>; - }; - }; - - pci2: pcie@ffe202000 { - reg = <0xf 0xfe202000 0 0x1000>; - ranges = <0x02000000 0 0xa0000000 0x0 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0x0 0xff020000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xa0000000 - 0x02000000 0 0xa0000000 - 0 0x10000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff020000 - 0 0x00010000>; - }; - }; - - pci3: pcie@ffe203000 { - reg = <0xf 0xfe203000 0 0x1000>; - ranges = <0x02000000 0 0xb0000000 0x0 0xb0000000 0 0x08000000 - 0x01000000 0 0x00000000 0x0 0xff030000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xb0000000 - 0x02000000 0 0xb0000000 - 0 0x08000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0xff030000 - 0 0x00010000>; - }; - }; - - chosen { - stdin = "serial0"; - stdout = "serial0"; - }; -}; diff --git a/sys/dts/powerpc/p5020si.dtsi b/sys/dts/powerpc/p5020si.dtsi deleted file mode 100644 index e47b985d4f4..00000000000 --- a/sys/dts/powerpc/p5020si.dtsi +++ /dev/null @@ -1,1388 +0,0 @@ -/* - * P5020 Silicon Device Tree Source - * - * Copyright 2010-2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; - -/ { - compatible = "fsl,P5020"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ccsr = &soc; - dcsr = &dcsr; - - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - ethernet4 = &enet4; - ethernet5 = &enet5; - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - pci3 = &pci3; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - bman = &bman; - qman = &qman; - pme = &pme; - rman = &rman; - sdhc = &sdhc; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - - raideng = &raideng; - raideng_jr0 = &raideng_jr0; - raideng_jr1 = &raideng_jr1; - raideng_jr2 = &raideng_jr2; - raideng_jr3 = &raideng_jr3; - - fman0 = &fman0; - fman0_oh0 = &fman0_oh0; - fman0_oh1 = &fman0_oh1; - fman0_oh2 = &fman0_oh2; - fman0_oh3 = &fman0_oh3; - fman0_oh4 = &fman0_oh4; - fman0_oh5 = &fman0_oh5; - fman0_oh6 = &fman0_oh6; - fman0_rx0 = &fman0_rx0; - fman0_rx1 = &fman0_rx1; - fman0_rx2 = &fman0_rx2; - fman0_rx3 = &fman0_rx3; - fman0_rx4 = &fman0_rx4; - fman0_rx5 = &fman0_rx5; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e5500@0 { - device_type = "cpu"; - reg = <0>; - bus-frequency = <799999998>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e5500@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; - - dcsr: dcsr@f00000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,dcsr", "simple-bus"; - - dcsr-epu@0 { - compatible = "fsl,dcsr-epu"; - interrupts = <52 2 0 0 - 84 2 0 0 - 85 2 0 0>; - interrupt-parent = <&mpic>; - reg = <0x0 0x1000>; - }; - dcsr-npc { - compatible = "fsl,dcsr-npc"; - reg = <0x1000 0x1000 0x1000000 0x8000>; - }; - dcsr-nxc@2000 { - compatible = "fsl,dcsr-nxc"; - reg = <0x2000 0x1000>; - }; - dcsr-corenet { - compatible = "fsl,dcsr-corenet"; - reg = <0x8000 0x1000 0xB0000 0x1000>; - }; - dcsr-dpaa@9000 { - compatible = "fsl,p5020-dcsr-dpaa", "fsl,dcsr-dpaa"; - reg = <0x9000 0x1000>; - }; - dcsr-ocn@11000 { - compatible = "fsl,p5020-dcsr-ocn", "fsl,dcsr-ocn"; - reg = <0x11000 0x1000>; - }; - dcsr-ddr@12000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr1>; - reg = <0x12000 0x1000>; - }; - dcsr-ddr@13000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr2>; - reg = <0x13000 0x1000>; - }; - dcsr-nal@18000 { - compatible = "fsl,p5020-dcsr-nal", "fsl,dcsr-nal"; - reg = <0x18000 0x1000>; - }; - dcsr-rcpm@22000 { - compatible = "fsl,p5020-dcsr-rcpm", "fsl,dcsr-rcpm"; - reg = <0x22000 0x1000>; - }; - dcsr-cpu-sb-proxy@40000 { - compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu0>; - reg = <0x40000 0x1000>; - }; - dcsr-cpu-sb-proxy@41000 { - compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu1>; - reg = <0x41000 0x1000>; - }; - }; - - bman-portals@ff4000000 { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "fsl,bman-portals"; - ranges = <0x0 0xf 0xfde00000 0x200000>; - bman-portal@0 { - cell-index = <0x0>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x0 0x4000 0x100000 0x1000>; - interrupts = <105 2 0 0>; - }; - bman-portal@4000 { - cell-index = <0x1>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x4000 0x4000 0x101000 0x1000>; - interrupts = <107 2 0 0>; - }; - bman-portal@8000 { - cell-index = <2>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x8000 0x4000 0x102000 0x1000>; - interrupts = <109 2 0 0>; - }; - bman-portal@c000 { - cell-index = <0x3>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0xc000 0x4000 0x103000 0x1000>; - interrupts = <111 2 0 0>; - }; - bman-portal@10000 { - cell-index = <0x4>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x10000 0x4000 0x104000 0x1000>; - interrupts = <113 2 0 0>; - }; - bman-portal@14000 { - cell-index = <0x5>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x14000 0x4000 0x105000 0x1000>; - interrupts = <115 2 0 0>; - }; - bman-portal@18000 { - cell-index = <0x6>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x18000 0x4000 0x106000 0x1000>; - interrupts = <117 2 0 0>; - }; - bman-portal@1c000 { - cell-index = <0x7>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x1c000 0x4000 0x107000 0x1000>; - interrupts = <119 2 0 0>; - }; - bman-portal@20000 { - cell-index = <0x8>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x20000 0x4000 0x108000 0x1000>; - interrupts = <121 2 0 0>; - }; - bman-portal@24000 { - cell-index = <0x9>; - compatible = "fsl,p5020-bman-portal", "fsl,bman-portal"; - reg = <0x24000 0x4000 0x109000 0x1000>; - interrupts = <123 2 0 0>; - }; - - buffer-pool@0 { - compatible = "fsl,p5020-bpool", "fsl,bpool"; - fsl,bpid = <0>; - fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; - }; - }; - - qman-portals@ff4200000 { - #address-cells = <0x1>; - #size-cells = <0x1>; - compatible = "fsl,qman-portals"; - ranges = <0x0 0xf 0xfdc00000 0x200000>; - qportal0: qman-portal@0 { - cell-index = <0x0>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x0 0x4000 0x100000 0x1000>; - interrupts = <104 0x2 0 0>; - fsl,qman-channel-id = <0x0>; - }; - - qportal1: qman-portal@4000 { - cell-index = <0x1>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x4000 0x4000 0x101000 0x1000>; - interrupts = <106 0x2 0 0>; - fsl,qman-channel-id = <0x1>; - }; - - qportal2: qman-portal@8000 { - cell-index = <0x2>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x8000 0x4000 0x102000 0x1000>; - interrupts = <108 0x2 0 0>; - fsl,qman-channel-id = <0x2>; - }; - - qportal3: qman-portal@c000 { - cell-index = <0x3>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0xc000 0x4000 0x103000 0x1000>; - interrupts = <110 0x2 0 0>; - fsl,qman-channel-id = <0x3>; - }; - - qportal4: qman-portal@10000 { - cell-index = <0x4>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x10000 0x4000 0x104000 0x1000>; - interrupts = <112 0x2 0 0>; - fsl,qman-channel-id = <0x4>; - }; - - qportal5: qman-portal@14000 { - cell-index = <0x5>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x14000 0x4000 0x105000 0x1000>; - interrupts = <114 0x2 0 0>; - fsl,qman-channel-id = <0x5>; - }; - - qportal6: qman-portal@18000 { - cell-index = <0x6>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x18000 0x4000 0x106000 0x1000>; - interrupts = <116 0x2 0 0>; - fsl,qman-channel-id = <0x6>; - }; - - qportal7: qman-portal@1c000 { - cell-index = <0x7>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x1c000 0x4000 0x107000 0x1000>; - interrupts = <118 0x2 0 0>; - fsl,qman-channel-id = <0x7>; - }; - - qportal8: qman-portal@20000 { - cell-index = <0x8>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x20000 0x4000 0x108000 0x1000>; - interrupts = <120 0x2 0 0>; - fsl,qman-channel-id = <0x8>; - }; - - qportal9: qman-portal@24000 { - cell-index = <0x9>; - compatible = "fsl,p5020-qman-portal", "fsl,qman-portal"; - reg = <0x24000 0x4000 0x109000 0x1000>; - interrupts = <122 0x2 0 0>; - fsl,qman-channel-id = <0x9>; - }; - - qpool1: qman-pool@1 { - cell-index = <1>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x21>; - }; - - qpool2: qman-pool@2 { - cell-index = <2>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x22>; - }; - - qpool3: qman-pool@3 { - cell-index = <3>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x23>; - }; - - qpool4: qman-pool@4 { - cell-index = <4>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x24>; - }; - - qpool5: qman-pool@5 { - cell-index = <5>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x25>; - }; - - qpool6: qman-pool@6 { - cell-index = <6>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x26>; - }; - - qpool7: qman-pool@7 { - cell-index = <7>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x27>; - }; - - qpool8: qman-pool@8 { - cell-index = <8>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x28>; - }; - - qpool9: qman-pool@9 { - cell-index = <9>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x29>; - }; - - qpool10: qman-pool@10 { - cell-index = <10>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2a>; - }; - - qpool11: qman-pool@11 { - cell-index = <11>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2b>; - }; - - qpool12: qman-pool@12 { - cell-index = <12>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2c>; - }; - - qpool13: qman-pool@13 { - cell-index = <13>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2d>; - }; - - qpool14: qman-pool@14 { - cell-index = <14>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2e>; - }; - - qpool15: qman-pool@15 { - cell-index = <15>; - compatible = "fsl,p5020-qman-pool-channel", "fsl,qman-pool-channel"; - fsl,qman-channel-id = <0x2f>; - }; - }; - - soc: soc@ffe000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - - bus-frequency = <0>; // Filled out by kernel. - - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - ddr1: memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - ddr2: memory-controller@9000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x9000 0x1000>; - interrupts = <16 2 1 22>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; - reg = <0x10000 0x1000 - 0x11000 0x1000>; - interrupts = <16 2 1 27 - 16 2 1 26>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x4000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - - mpic: pic@40000 { - clock-frequency = <0>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <4>; - reg = <0x40000 0x40000>; - compatible = "fsl,mpic", "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi0: msi@41600 { - compatible = "fsl,mpic-msi"; - reg = <0x41600 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 0 0 - 0xe1 0 0 0 - 0xe2 0 0 0 - 0xe3 0 0 0 - 0xe4 0 0 0 - 0xe5 0 0 0 - 0xe6 0 0 0 - 0xe7 0 0 0>; - }; - - msi1: msi@41800 { - compatible = "fsl,mpic-msi"; - reg = <0x41800 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe8 0 0 0 - 0xe9 0 0 0 - 0xea 0 0 0 - 0xeb 0 0 0 - 0xec 0 0 0 - 0xed 0 0 0 - 0xee 0 0 0 - 0xef 0 0 0>; - }; - - msi2: msi@41a00 { - compatible = "fsl,mpic-msi"; - reg = <0x41a00 0x200>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xf0 0 0 0 - 0xf1 0 0 0 - 0xf2 0 0 0 - 0xf3 0 0 0 - 0xf4 0 0 0 - 0xf5 0 0 0 - 0xf6 0 0 0 - 0xf7 0 0 0>; - }; - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p5020-serdes"; - reg = <0xea000 0x1000>; - }; - - dma0: dma@100300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p5020-dma", "fsl,eloplus-dma"; - reg = <0x100300 0x4>; - ranges = <0x0 0x100100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <28 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <29 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <30 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <31 2 0 0>; - }; - }; - - dma1: dma@101300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p5020-dma", "fsl,eloplus-dma"; - reg = <0x101300 0x4>; - ranges = <0x0 0x101100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <32 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <33 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <34 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,p5020-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <35 2 0 0>; - }; - }; - - spi@110000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,p5020-espi", "fsl,mpc8536-espi"; - reg = <0x110000 0x1000>; - interrupts = <53 0x2 0 0>; - fsl,espi-num-chipselects = <4>; - }; - - sdhc: sdhc@114000 { - compatible = "fsl,p5020-esdhc", "fsl,esdhc"; - reg = <0x114000 0x1000>; - interrupts = <48 2 0 0>; - sdhci,auto-cmd12; - clock-frequency = <0>; - }; - - i2c@118000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x118000 0x100>; - interrupts = <38 2 0 0>; - dfsrr; - }; - - i2c@118100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x118100 0x100>; - interrupts = <38 2 0 0>; - dfsrr; - }; - - i2c@119000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <2>; - compatible = "fsl-i2c"; - reg = <0x119000 0x100>; - interrupts = <39 2 0 0>; - dfsrr; - }; - - i2c@119100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <3>; - compatible = "fsl-i2c"; - reg = <0x119100 0x100>; - interrupts = <39 2 0 0>; - dfsrr; - }; - - serial0: serial@11c500 { - cell-index = <0>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11c500 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; - }; - - serial1: serial@11c600 { - cell-index = <1>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11c600 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; - }; - - serial2: serial@11d500 { - cell-index = <2>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11d500 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; - }; - - serial3: serial@11d600 { - cell-index = <3>; - device_type = "serial"; - compatible = "ns16550"; - reg = <0x11d600 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; - }; - - gpio0: gpio@130000 { - compatible = "fsl,p5020-gpio", "fsl,qoriq-gpio"; - reg = <0x130000 0x1000>; - interrupts = <55 2 0 0>; - #gpio-cells = <2>; - gpio-controller; - }; - - rman: rman@1e0000 { - compatible = "fsl,rman"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x1e0000 0x20000>; - reg = <0x1e0000 0x20000>; - interrupts = <16 2 1 11>; /* err_irq */ - fsl,qman-channels-id = <0x62 0x63>; - - inbound-block@0 { - compatible = "fsl,rman-inbound-block"; - reg = <0x0 0x800>; - }; - global-cfg@b00 { - compatible = "fsl,rman-global-cfg"; - reg = <0xb00 0x500>; - }; - inbound-block@1000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x1000 0x800>; - }; - inbound-block@2000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x2000 0x800>; - }; - inbound-block@3000 { - compatible = "fsl,rman-inbound-block"; - reg = <0x3000 0x800>; - }; - }; - - usb0: usb@210000 { - compatible = "fsl,p5020-usb2-mph", - "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; - reg = <0x210000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <44 0x2 0 0>; - phy_type = "utmi"; - port0; - }; - - usb1: usb@211000 { - compatible = "fsl,p5020-usb2-dr", - "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - reg = <0x211000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <45 0x2 0 0>; - dr_mode = "host"; - phy_type = "utmi"; - }; - - sata@220000 { - compatible = "fsl,p5020-sata", "fsl,pq-sata-v2"; - reg = <0x220000 0x1000>; - interrupts = <68 0x2 0 0>; - }; - - sata@221000 { - compatible = "fsl,p5020-sata", "fsl,pq-sata-v2"; - reg = <0x221000 0x1000>; - interrupts = <69 0x2 0 0>; - }; - - crypto: crypto@300000 { - compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x300000 0x10000>; - ranges = <0 0x300000 0x10000>; - interrupts = <92 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <88 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <89 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <90 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <91 2 0 0>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.2-rtic", - "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; - }; - - sec_mon: sec_mon@314000 { - compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; - reg = <0x314000 0x1000>; - interrupts = <93 2 0 0>; - }; - - raideng: raideng@320000 { - compatible = "fsl,raideng-v1.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x320000 0x10000>; - ranges = <0 0x320000 0x10000>; - - raideng_jq0@1000 { - compatible = "fsl,raideng-v1.0-job-queue"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x1000 0x1000>; - ranges = <0x0 0x1000 0x1000>; - - raideng_jr0: jr@0 { - compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring"; - reg = <0x0 0x400>; - interrupts = <139 2 0 0>; - interrupt-parent = <&mpic>; - }; - - raideng_jr1: jr@400 { - compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring"; - reg = <0x400 0x400>; - interrupts = <140 2 0 0>; - interrupt-parent = <&mpic>; - }; - }; - - raideng_jq1@2000 { - compatible = "fsl,raideng-v1.0-job-queue"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x2000 0x1000>; - ranges = <0x0 0x2000 0x1000>; - - raideng_jr2: jr@0 { - compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring"; - reg = <0x0 0x400>; - interrupts = <141 2 0 0>; - interrupt-parent = <&mpic>; - }; - - raideng_jr3: jr@400 { - compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring"; - reg = <0x400 0x400>; - interrupts = <142 2 0 0>; - interrupt-parent = <&mpic>; - }; - }; - }; - - pme: pme@316000 { - compatible = "fsl,pme"; - reg = <0x316000 0x10000>; - /* "fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ - /* "fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ - interrupts = <16 2 1 5>; - }; - - qman: qman@318000 { - compatible = "fsl,p5020-qman", "fsl,qman"; - reg = <0x318000 0x1000>; - interrupts = <16 2 1 3>; - /* Commented out, use default allocation */ - /* "fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ - /* "fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ - }; - - bman: bman@31a000 { - compatible = "fsl,p5020-bman", "fsl,bman"; - reg = <0x31a000 0x1000>; - interrupts = <16 2 1 2>; - /* Same as "fsl,qman-*, use default allocation */ - /* "fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ - }; - - fman0: fman@400000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - compatible = "fsl,p5020-fman", "fsl,fman", "simple-bus"; - ranges = <0 0x400000 0x100000>; - reg = <0x400000 0x100000>; - clock-frequency = <0>; - interrupts = < - 96 2 0 0 - 16 2 1 1>; - - cc@0 { - compatible = "fsl,p5020-fman-cc", "fsl,fman-cc"; - }; - - parser@c7000 { - compatible = "fsl,p5020-fman-parser", "fsl,fman-parser"; - reg = <0xc7000 0x1000>; - }; - - keygen@c1000 { - compatible = "fsl,p5020-fman-keygen", "fsl,fman-keygen"; - reg = <0xc1000 0x1000>; - }; - - policer@c0000 { - compatible = "fsl,p5020-fman-policer", "fsl,fman-policer"; - reg = <0xc0000 0x1000>; - }; - - muram@0 { - compatible = "fsl,p5020-fman-muram", "fsl,fman-muram"; - reg = <0x0 0x28000>; - }; - - bmi@80000 { - compatible = "fsl,p5020-fman-bmi", "fsl,fman-bmi"; - reg = <0x80000 0x400>; - }; - - qmi@80400 { - compatible = "fsl,p5020-fman-qmi", "fsl,fman-qmi"; - reg = <0x80400 0x400>; - }; - - fman0_rx0: port@88000 { - cell-index = <0>; - compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x88000 0x1000>; - }; - fman0_rx1: port@89000 { - cell-index = <1>; - compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x89000 0x1000>; - }; - fman0_rx2: port@8a000 { - cell-index = <2>; - compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8a000 0x1000>; - }; - fman0_rx3: port@8b000 { - cell-index = <3>; - compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8b000 0x1000>; - }; - fman0_rx4: port@8c000 { - cell-index = <4>; - compatible = "fsl,p5020-fman-port-1g-rx", "fsl,fman-port-1g-rx", "fsl,fman-v2-port-rx"; - reg = <0x8c000 0x1000>; - }; - fman0_rx5: port@90000 { - cell-index = <0>; - compatible = "fsl,p5020-fman-port-10g-rx", "fsl,fman-port-10g-rx"; - reg = <0x90000 0x1000>; - }; - - fman0_tx5: port@b0000 { - cell-index = <0>; - compatible = "fsl,p5020-fman-port-10g-tx", "fsl,fman-port-10g-tx"; - reg = <0xb0000 0x1000>; - fsl,qman-channel-id = <0x40>; - }; - fman0_tx0: port@a8000 { - cell-index = <0>; - compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xa8000 0x1000>; - fsl,qman-channel-id = <0x41>; - }; - fman0_tx1: port@a9000 { - cell-index = <1>; - compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xa9000 0x1000>; - fsl,qman-channel-id = <0x42>; - }; - fman0_tx2: port@aa000 { - cell-index = <2>; - compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xaa000 0x1000>; - fsl,qman-channel-id = <0x43>; - }; - fman0_tx3: port@ab000 { - cell-index = <3>; - compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xab000 0x1000>; - fsl,qman-channel-id = <0x44>; - }; - fman0_tx4: port@ac000 { - cell-index = <4>; - compatible = "fsl,p5020-fman-port-1g-tx", "fsl,fman-port-1g-tx", "fsl,fman-v2-port-tx"; - reg = <0xac000 0x1000>; - fsl,qman-channel-id = <0x45>; - }; - - fman0_oh0: port@81000 { - cell-index = <0>; - compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x81000 0x1000>; - fsl,qman-channel-id = <0x46>; - }; - fman0_oh1: port@82000 { - cell-index = <1>; - compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x82000 0x1000>; - fsl,qman-channel-id = <0x47>; - }; - fman0_oh2: port@83000 { - cell-index = <2>; - compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x83000 0x1000>; - fsl,qman-channel-id = <0x48>; - }; - fman0_oh3: port@84000 { - cell-index = <3>; - compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x84000 0x1000>; - fsl,qman-channel-id = <0x49>; - }; - fman0_oh4: port@85000 { - cell-index = <4>; - compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x85000 0x1000>; - fsl,qman-channel-id = <0x4a>; - }; - fman0_oh5: port@86000 { - cell-index = <5>; - compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x86000 0x1000>; - fsl,qman-channel-id = <0x4b>; - }; - fman0_oh6: port@87000 { - cell-index = <6>; - compatible = "fsl,p5020-fman-port-oh", "fsl,fman-port-oh"; - reg = <0x87000 0x1000>; - }; - - enet0: ethernet@e0000 { - cell-index = <0>; - compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe0000 0x1000>; - fsl,port-handles = <&fman0_rx0 &fman0_tx0>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio0: mdio@e1120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-mdio"; - reg = <0xe1120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet1: ethernet@e2000 { - cell-index = <1>; - compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe2000 0x1000>; - fsl,port-handles = <&fman0_rx1 &fman0_tx1>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio@e3120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe3120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet2: ethernet@e4000 { - cell-index = <2>; - compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe4000 0x1000>; - fsl,port-handles = <&fman0_rx2 &fman0_tx2>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio@e5120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe5120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet3: ethernet@e6000 { - cell-index = <3>; - compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe6000 0x1000>; - fsl,port-handles = <&fman0_rx3 &fman0_tx3>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio@e7120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe7120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet4: ethernet@e8000 { - cell-index = <4>; - compatible = "fsl,p5020-fman-1g-mac", "fsl,fman-1g-mac", "fsl,fman-dtsec"; - reg = <0xe8000 0x1000>; - fsl,port-handles = <&fman0_rx4 &fman0_tx4>; - ptimer-handle = <&ptp_timer0>; - }; - - mdio@e9120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-tbi"; - reg = <0xe9120 0xee0>; - interrupts = <100 1 0 0>; - }; - - enet5: ethernet@f0000 { - cell-index = <0>; - compatible = "fsl,p5020-fman-10g-mac", "fsl,fman-10g-mac", "fsl,fman-xgec"; - reg = <0xf0000 0x1000>; - fsl,port-handles = <&fman0_rx5 &fman0_tx5>; - }; - - mdio@f1000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,fman-xmdio"; - reg = <0xf1000 0x1000>; - interrupts = <100 1 0 0>; - }; - - ptp_timer0: rtc@fe000 { - compatible = "fsl,fman-rtc"; - reg = <0xfe000 0x1000>; - }; - }; - }; - - rapidio@ffe0c0000 { - compatible = "fsl,srio"; - interrupts = <16 2 1 11>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; - }; - - localbus@ffe124000 { - compatible = "fsl,p5020-rev1.0-elbc", "simple-bus", "fsl,elbc"; - interrupts = < - 25 2 0 0 - 16 2 1 19 - >; - #address-cells = <2>; - #size-cells = <1>; - }; - - pci0: pcie@ffe200000 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "okay"; - #size-cells = <2>; - #address-cells = <3>; - cell-index = <0>; - bus-range = <0x0 0xff>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi0>; - interrupts = <16 2 1 15>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - }; - }; - - pci1: pcie@ffe201000 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "disabled"; - #size-cells = <2>; - #address-cells = <3>; - cell-index = <1>; - bus-range = <0 0xff>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi1>; - interrupts = <16 2 1 14>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - }; - }; - - pci2: pcie@ffe202000 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "okay"; - #size-cells = <2>; - #address-cells = <3>; - cell-index = <2>; - bus-range = <0x0 0xff>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi2>; - interrupts = <16 2 1 13>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 13>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 42 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 1 0 0 - >; - }; - }; - - pci3: pcie@ffe203000 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - status = "disabled"; - #size-cells = <2>; - #address-cells = <3>; - cell-index = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <0x1fca055>; - fsl,msi = <&msi2>; - interrupts = <16 2 1 12>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 12>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 43 1 0 0 - 0000 0 0 2 &mpic 0 1 0 0 - 0000 0 0 3 &mpic 4 1 0 0 - 0000 0 0 4 &mpic 8 1 0 0 - >; - }; - }; -}; diff --git a/sys/kern/kern_cpuset.c b/sys/kern/kern_cpuset.c index 326e88239b2..0317690aaf6 100644 --- a/sys/kern/kern_cpuset.c +++ b/sys/kern/kern_cpuset.c @@ -1783,42 +1783,10 @@ cpuset_check_capabilities(struct thread *td, cpulevel_t level, cpuwhich_t which, return (0); } -#if defined(__powerpc__) -/* - * TODO: At least powerpc64 and powerpc64le kernels panic with - * exception 0x480 (instruction segment exception) when copyin/copyout, - * are set as a function pointer in cpuset_copy_cb struct and called by - * an external module (like pfsync). Tip: copyin/copyout have an ifunc - * resolver function. - * - * Bisect of LLVM shows that the behavior changed on LLVM 10.0 with - * https://reviews.llvm.org/rGdc06b0bc9ad055d06535462d91bfc2a744b2f589 - * - * This is a hack/workaround while problem is being discussed with LLVM - * community - */ -static int -cpuset_copyin(const void *uaddr, void *kaddr, size_t len) -{ - return(copyin(uaddr, kaddr, len)); -} - -static int -cpuset_copyout(const void *kaddr, void *uaddr, size_t len) -{ - return(copyout(kaddr, uaddr, len)); -} - -static const struct cpuset_copy_cb copy_set = { - .cpuset_copyin = cpuset_copyin, - .cpuset_copyout = cpuset_copyout -}; -#else static const struct cpuset_copy_cb copy_set = { .cpuset_copyin = copyin, .cpuset_copyout = copyout }; -#endif #ifndef _SYS_SYSPROTO_H_ struct cpuset_args { diff --git a/sys/kern/uipc_mbuf.c b/sys/kern/uipc_mbuf.c index 6d22e8e918a..953f8bed7d7 100644 --- a/sys/kern/uipc_mbuf.c +++ b/sys/kern/uipc_mbuf.c @@ -173,13 +173,8 @@ CTASSERT(sizeof(struct m_ext) == 160); #else CTASSERT(offsetof(struct mbuf, m_dat) == 24); CTASSERT(sizeof(struct pkthdr) == 48); -#if defined(__powerpc__) && defined(BOOKE) -/* PowerPC booke has 64-bit physical pointers. */ -CTASSERT(sizeof(struct m_ext) == 184); -#else CTASSERT(sizeof(struct m_ext) == 180); #endif -#endif /* * Assert that the queue(3) macros produce code of the same size as an old diff --git a/sys/kern/vfs_bio.c b/sys/kern/vfs_bio.c index 78dc6f511a4..30f55545d16 100644 --- a/sys/kern/vfs_bio.c +++ b/sys/kern/vfs_bio.c @@ -4167,7 +4167,7 @@ getblkx(struct vnode *vp, daddr_t blkno, daddr_t dblkno, int size, int slpflag, * enough to work under very low memory conditions. * * There's an issue on low memory, 4BSD+non-preempt - * systems (eg MIPS routers with 32MB RAM) where buffer + * systems with very little RAM where buffer * exhaustion occurs without sleeping for buffer * reclaimation. This just sticks in a loop and * constantly attempts to allocate a buffer, which @@ -5208,24 +5208,7 @@ bdata2bio(struct buf *bp, struct bio *bip) } } -/* - * The MIPS pmap code currently doesn't handle aliased pages. - * The VIPT caches may not handle page aliasing themselves, leading - * to data corruption. - * - * As such, this code makes a system extremely unhappy if said - * system doesn't support unaliasing the above situation in hardware. - * Some "recent" systems (eg some mips24k/mips74k cores) don't enable - * this feature at build time, so it has to be handled in software. - * - * Once the MIPS pmap/cache code grows to support this function on - * earlier chips, it should be flipped back off. - */ -#ifdef __mips__ -static int buf_pager_relbuf = 1; -#else static int buf_pager_relbuf = 0; -#endif SYSCTL_INT(_vfs, OID_AUTO, buf_pager_relbuf, CTLFLAG_RWTUN, &buf_pager_relbuf, 0, "Make buffer pager release buffers after reading"); diff --git a/sys/kern/vfs_cache.c b/sys/kern/vfs_cache.c index a7f8179ceb5..5db6f3f52c1 100644 --- a/sys/kern/vfs_cache.c +++ b/sys/kern/vfs_cache.c @@ -298,10 +298,9 @@ struct namecache_ts { TAILQ_HEAD(cache_freebatch, namecache); /* - * At least mips n32 performs 64-bit accesses to timespec as found - * in namecache_ts and requires them to be aligned. Since others - * may be in the same spot suffer a little bit and enforce the - * alignment for everyone. Note this is a nop for 64-bit platforms. + * Some ILP32 targets perform 64-bit accesses to timespec as found in + * namecache_ts and require them to be aligned. Enforce the alignment for + * every target; this is a no-op for 64-bit platforms. */ #define CACHE_ZONE_ALIGNMENT UMA_ALIGNOF(time_t) diff --git a/sys/mips/atheros/apb.c b/sys/mips/atheros/apb.c deleted file mode 100644 index 1aabbf5e9ac..00000000000 --- a/sys/mips/atheros/apb.c +++ /dev/null @@ -1,535 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#define APB_INTR_PMC 5 - -#undef APB_DEBUG -#ifdef APB_DEBUG -#define dprintf printf -#else -#define dprintf(x, arg...) -#endif /* APB_DEBUG */ - -#define DEVTOAPB(dev) ((struct apb_ivar *) device_get_ivars(dev)) - -static int apb_activate_resource(device_t, device_t, int, int, - struct resource *); -static device_t apb_add_child(device_t, u_int, const char *, int); -static struct resource * - apb_alloc_resource(device_t, device_t, int, int *, rman_res_t, - rman_res_t, rman_res_t, u_int); -static int apb_attach(device_t); -static int apb_deactivate_resource(device_t, device_t, int, int, - struct resource *); -static struct resource_list * - apb_get_resource_list(device_t, device_t); -static void apb_hinted_child(device_t, const char *, int); -static int apb_filter(void *); -static int apb_probe(device_t); -static int apb_release_resource(device_t, device_t, int, int, - struct resource *); -static int apb_setup_intr(device_t, device_t, struct resource *, int, - driver_filter_t *, driver_intr_t *, void *, void **); -static int apb_teardown_intr(device_t, device_t, struct resource *, - void *); - -static void -apb_mask_irq(void *source) -{ - unsigned int irq = (unsigned int)source; - uint32_t reg; - - reg = ATH_READ_REG(AR71XX_MISC_INTR_MASK); - ATH_WRITE_REG(AR71XX_MISC_INTR_MASK, reg & ~(1 << irq)); - -} - -static void -apb_unmask_irq(void *source) -{ - uint32_t reg; - unsigned int irq = (unsigned int)source; - - reg = ATH_READ_REG(AR71XX_MISC_INTR_MASK); - ATH_WRITE_REG(AR71XX_MISC_INTR_MASK, reg | (1 << irq)); -} - -static int -apb_probe(device_t dev) -{ - - return (BUS_PROBE_NOWILDCARD); -} - -static int -apb_attach(device_t dev) -{ - struct apb_softc *sc = device_get_softc(dev); - int rid = 0; - - device_set_desc(dev, "APB Bus bridge"); - - sc->apb_mem_rman.rm_type = RMAN_ARRAY; - sc->apb_mem_rman.rm_descr = "APB memory window"; - - if (rman_init(&sc->apb_mem_rman) != 0 || - rman_manage_region(&sc->apb_mem_rman, - AR71XX_APB_BASE, - AR71XX_APB_BASE + AR71XX_APB_SIZE - 1) != 0) - panic("apb_attach: failed to set up memory rman"); - - sc->apb_irq_rman.rm_type = RMAN_ARRAY; - sc->apb_irq_rman.rm_descr = "APB IRQ"; - - if (rman_init(&sc->apb_irq_rman) != 0 || - rman_manage_region(&sc->apb_irq_rman, - APB_IRQ_BASE, APB_IRQ_END) != 0) - panic("apb_attach: failed to set up IRQ rman"); - - if ((sc->sc_misc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE)) == NULL) { - device_printf(dev, "unable to allocate IRQ resource\n"); - return (ENXIO); - } - - if ((bus_setup_intr(dev, sc->sc_misc_irq, INTR_TYPE_MISC, - apb_filter, NULL, sc, &sc->sc_misc_ih))) { - device_printf(dev, - "WARNING: unable to register interrupt handler\n"); - return (ENXIO); - } - - bus_generic_probe(dev); - bus_enumerate_hinted_children(dev); - bus_generic_attach(dev); - - /* - * Unmask performance counter IRQ - */ - apb_unmask_irq((void*)APB_INTR_PMC); - sc->sc_intr_counter[APB_INTR_PMC] = mips_intrcnt_create("apb irq5: pmc"); - - return (0); -} - -static struct resource * -apb_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct apb_softc *sc = device_get_softc(bus); - struct apb_ivar *ivar = device_get_ivars(child); - struct resource *rv; - struct resource_list_entry *rle; - struct rman *rm; - int isdefault, needactivate, passthrough; - - isdefault = (RMAN_IS_DEFAULT_RANGE(start, end)); - needactivate = flags & RF_ACTIVE; - /* - * Pass memory requests to nexus device - */ - passthrough = (device_get_parent(child) != bus); - rle = NULL; - - dprintf("%s: entry (%p, %p, %d, %d, %p, %p, %jd, %d)\n", - __func__, bus, child, type, *rid, (void *)(intptr_t)start, - (void *)(intptr_t)end, count, flags); - - if (passthrough) - return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type, - rid, start, end, count, flags)); - - /* - * If this is an allocation of the "default" range for a given RID, - * and we know what the resources for this device are (ie. they aren't - * maintained by a child bus), then work out the start/end values. - */ - - if (isdefault) { - rle = resource_list_find(&ivar->resources, type, *rid); - if (rle == NULL) { - return (NULL); - } - - if (rle->res != NULL) { - panic("%s: resource entry is busy", __func__); - } - start = rle->start; - end = rle->end; - count = rle->count; - - dprintf("%s: default resource (%p, %p, %ld)\n", - __func__, (void *)(intptr_t)start, - (void *)(intptr_t)end, count); - } - - switch (type) { - case SYS_RES_IRQ: - rm = &sc->apb_irq_rman; - break; - case SYS_RES_MEMORY: - rm = &sc->apb_mem_rman; - break; - default: - printf("%s: unknown resource type %d\n", __func__, type); - return (0); - } - - rv = rman_reserve_resource(rm, start, end, count, flags, child); - if (rv == NULL) { - printf("%s: could not reserve resource\n", __func__); - return (0); - } - - rman_set_rid(rv, *rid); - - if (needactivate) { - if (bus_activate_resource(child, type, *rid, rv)) { - printf("%s: could not activate resource\n", __func__); - rman_release_resource(rv); - return (0); - } - } - - return (rv); -} - -static int -apb_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - - /* XXX: should we mask/unmask IRQ here? */ - return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), child, - type, rid, r)); -} - -static int -apb_deactivate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - - /* XXX: should we mask/unmask IRQ here? */ - return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus), child, - type, rid, r)); -} - -static int -apb_release_resource(device_t dev, device_t child, int type, - int rid, struct resource *r) -{ - struct resource_list *rl; - struct resource_list_entry *rle; - - rl = apb_get_resource_list(dev, child); - if (rl == NULL) - return (EINVAL); - rle = resource_list_find(rl, type, rid); - if (rle == NULL) - return (EINVAL); - rman_release_resource(r); - rle->res = NULL; - - return (0); -} - -static int -apb_setup_intr(device_t bus, device_t child, struct resource *ires, - int flags, driver_filter_t *filt, driver_intr_t *handler, - void *arg, void **cookiep) -{ - struct apb_softc *sc = device_get_softc(bus); - struct intr_event *event; - int irq, error; - - irq = rman_get_start(ires); - - if (irq > APB_IRQ_END) - panic("%s: bad irq %d", __func__, irq); - - event = sc->sc_eventstab[irq]; - if (event == NULL) { - error = intr_event_create(&event, (void *)irq, 0, irq, - apb_mask_irq, apb_unmask_irq, - NULL, NULL, - "apb intr%d:", irq); - - if (error == 0) { - sc->sc_eventstab[irq] = event; - sc->sc_intr_counter[irq] = - mips_intrcnt_create(event->ie_name); - } - else - return (error); - } - - intr_event_add_handler(event, device_get_nameunit(child), filt, - handler, arg, intr_priority(flags), flags, cookiep); - mips_intrcnt_setname(sc->sc_intr_counter[irq], event->ie_fullname); - - apb_unmask_irq((void*)irq); - - return (0); -} - -static int -apb_teardown_intr(device_t dev, device_t child, struct resource *ires, - void *cookie) -{ - struct apb_softc *sc = device_get_softc(dev); - int irq, result; - - irq = rman_get_start(ires); - if (irq > APB_IRQ_END) - panic("%s: bad irq %d", __func__, irq); - - if (sc->sc_eventstab[irq] == NULL) - panic("Trying to teardown unoccupied IRQ"); - - apb_mask_irq((void*)irq); - - result = intr_event_remove_handler(cookie); - if (!result) - sc->sc_eventstab[irq] = NULL; - - return (result); -} - -static int -apb_filter(void *arg) -{ - struct apb_softc *sc = arg; - struct intr_event *event; - uint32_t reg, irq; - struct thread *td; - struct trapframe *tf; - - reg = ATH_READ_REG(AR71XX_MISC_INTR_STATUS); - for (irq = 0; irq < APB_NIRQS; irq++) { - if (reg & (1 << irq)) { - switch (ar71xx_soc) { - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - case AR71XX_SOC_QCA9533: - case AR71XX_SOC_QCA9533_V2: - case AR71XX_SOC_QCA9556: - case AR71XX_SOC_QCA9558: - /* ACK/clear the given interrupt */ - ATH_WRITE_REG(AR71XX_MISC_INTR_STATUS, - (1 << irq)); - break; - default: - /* fallthrough */ - break; - } - - event = sc->sc_eventstab[irq]; - /* always count interrupts; spurious or otherwise */ - mips_intrcnt_inc(sc->sc_intr_counter[irq]); - if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) { - if (irq == APB_INTR_PMC) { - td = PCPU_GET(curthread); - tf = td->td_intr_frame; - - if (pmc_intr) - (*pmc_intr)(tf); - continue; - } - /* Ignore timer interrupts */ - if (irq != 0 && irq != 8 && irq != 9 && irq != 10) - printf("Stray APB IRQ %d\n", irq); - continue; - } - - intr_event_handle(event, PCPU_GET(curthread)->td_intr_frame); - } - } - - return (FILTER_HANDLED); -} - -static void -apb_hinted_child(device_t bus, const char *dname, int dunit) -{ - device_t child; - long maddr; - int msize; - int irq; - int result; - int mem_hints_count; - - child = BUS_ADD_CHILD(bus, 0, dname, dunit); - - /* - * Set hard-wired resources for hinted child using - * specific RIDs. - */ - mem_hints_count = 0; - if (resource_long_value(dname, dunit, "maddr", &maddr) == 0) - mem_hints_count++; - if (resource_int_value(dname, dunit, "msize", &msize) == 0) - mem_hints_count++; - - /* check if all info for mem resource has been provided */ - if ((mem_hints_count > 0) && (mem_hints_count < 2)) { - printf("Either maddr or msize hint is missing for %s%d\n", - dname, dunit); - } else if (mem_hints_count) { - result = bus_set_resource(child, SYS_RES_MEMORY, 0, - maddr, msize); - if (result != 0) - device_printf(bus, - "warning: bus_set_resource() failed\n"); - } - - if (resource_int_value(dname, dunit, "irq", &irq) == 0) { - result = bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1); - if (result != 0) - device_printf(bus, - "warning: bus_set_resource() failed\n"); - } -} - -static device_t -apb_add_child(device_t bus, u_int order, const char *name, int unit) -{ - device_t child; - struct apb_ivar *ivar; - - ivar = malloc(sizeof(struct apb_ivar), M_DEVBUF, M_WAITOK | M_ZERO); - resource_list_init(&ivar->resources); - - child = device_add_child_ordered(bus, order, name, unit); - if (child == NULL) { - printf("Can't add child %s%d ordered\n", name, unit); - return (0); - } - - device_set_ivars(child, ivar); - - return (child); -} - -/* - * Helper routine for bus_generic_rl_get_resource/bus_generic_rl_set_resource - * Provides pointer to resource_list for these routines - */ -static struct resource_list * -apb_get_resource_list(device_t dev, device_t child) -{ - struct apb_ivar *ivar; - - ivar = device_get_ivars(child); - return (&(ivar->resources)); -} - -static int -apb_print_all_resources(device_t dev) -{ - struct apb_ivar *ndev = DEVTOAPB(dev); - struct resource_list *rl = &ndev->resources; - int retval = 0; - - if (STAILQ_FIRST(rl)) - retval += printf(" at"); - - retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); - retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); - - return (retval); -} - -static int -apb_print_child(device_t bus, device_t child) -{ - int retval = 0; - - retval += bus_print_child_header(bus, child); - retval += apb_print_all_resources(child); - if (device_get_flags(child)) - retval += printf(" flags %#x", device_get_flags(child)); - retval += printf(" on %s\n", device_get_nameunit(bus)); - - return (retval); -} - -static device_method_t apb_methods[] = { - DEVMETHOD(bus_activate_resource, apb_activate_resource), - DEVMETHOD(bus_add_child, apb_add_child), - DEVMETHOD(bus_alloc_resource, apb_alloc_resource), - DEVMETHOD(bus_deactivate_resource, apb_deactivate_resource), - DEVMETHOD(bus_get_resource_list, apb_get_resource_list), - DEVMETHOD(bus_hinted_child, apb_hinted_child), - DEVMETHOD(bus_release_resource, apb_release_resource), - DEVMETHOD(bus_setup_intr, apb_setup_intr), - DEVMETHOD(bus_teardown_intr, apb_teardown_intr), - DEVMETHOD(device_attach, apb_attach), - DEVMETHOD(device_probe, apb_probe), - DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), - DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), - DEVMETHOD(bus_print_child, apb_print_child), - - DEVMETHOD_END -}; - -static driver_t apb_driver = { - "apb", - apb_methods, - sizeof(struct apb_softc), -}; -static devclass_t apb_devclass; - -DRIVER_MODULE(apb, nexus, apb_driver, apb_devclass, 0, 0); diff --git a/sys/mips/atheros/apbvar.h b/sys/mips/atheros/apbvar.h deleted file mode 100644 index 20389590e0b..00000000000 --- a/sys/mips/atheros/apbvar.h +++ /dev/null @@ -1,52 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _APBVAR_H_ -#define _APBVAR_H_ - -#define APB_IRQ_BASE 0 -#define APB_IRQ_END 31 -#define APB_NIRQS 32 - -struct apb_softc { - struct rman apb_irq_rman; - struct rman apb_mem_rman; - /* IRQ events structs for child devices */ - struct intr_event *sc_eventstab[APB_NIRQS]; - mips_intrcnt_t sc_intr_counter[APB_NIRQS]; - /* Resources and cookies for MIPS CPU INTs */ - struct resource *sc_misc_irq; - void *sc_misc_ih; -}; - -struct apb_ivar { - struct resource_list resources; -}; - -#endif /* _APBVAR_H_ */ diff --git a/sys/mips/atheros/ar531x/apb.c b/sys/mips/atheros/ar531x/apb.c deleted file mode 100644 index 4210a540840..00000000000 --- a/sys/mips/atheros/ar531x/apb.c +++ /dev/null @@ -1,751 +0,0 @@ -/*- - * Copyright (c) 2016, Hiroki Mori - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include "opt_platform.h" -#include "opt_ar531x.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#ifdef INTRNG -#include -#else -#include -#endif - -#ifdef INTRNG -#include "pic_if.h" - -#define PIC_INTR_ISRC(sc, irq) (&(sc)->pic_irqs[(irq)].isrc) -#endif - -#include -#include -#include -#include - -#ifdef AR531X_APB_DEBUG -#define dprintf printf -#else -#define dprintf(x, arg...) -#endif /* AR531X_APB_DEBUG */ - -static int apb_activate_resource(device_t, device_t, int, int, - struct resource *); -static device_t apb_add_child(device_t, u_int, const char *, int); -static struct resource * - apb_alloc_resource(device_t, device_t, int, int *, rman_res_t, - rman_res_t, rman_res_t, u_int); -static int apb_attach(device_t); -static int apb_deactivate_resource(device_t, device_t, int, int, - struct resource *); -static struct resource_list * - apb_get_resource_list(device_t, device_t); -static void apb_hinted_child(device_t, const char *, int); -static int apb_filter(void *); -static int apb_probe(device_t); -static int apb_release_resource(device_t, device_t, int, int, - struct resource *); -#ifndef INTRNG -static int apb_setup_intr(device_t, device_t, struct resource *, int, - driver_filter_t *, driver_intr_t *, void *, void **); -static int apb_teardown_intr(device_t, device_t, struct resource *, - void *); -#endif - -static void -apb_mask_irq(void *source) -{ - unsigned int irq = (unsigned int)source; - uint32_t reg; - - if(ar531x_soc >= AR531X_SOC_AR5315) { - reg = ATH_READ_REG(AR5315_SYSREG_BASE + - AR5315_SYSREG_MISC_INTMASK); - ATH_WRITE_REG(AR5315_SYSREG_BASE - + AR5315_SYSREG_MISC_INTMASK, reg & ~(1 << irq)); - } else { - reg = ATH_READ_REG(AR5312_SYSREG_BASE + - AR5312_SYSREG_MISC_INTMASK); - ATH_WRITE_REG(AR5312_SYSREG_BASE - + AR5312_SYSREG_MISC_INTMASK, reg & ~(1 << irq)); - } -} - -static void -apb_unmask_irq(void *source) -{ - uint32_t reg; - unsigned int irq = (unsigned int)source; - - if(ar531x_soc >= AR531X_SOC_AR5315) { - reg = ATH_READ_REG(AR5315_SYSREG_BASE + - AR5315_SYSREG_MISC_INTMASK); - ATH_WRITE_REG(AR5315_SYSREG_BASE + - AR5315_SYSREG_MISC_INTMASK, reg | (1 << irq)); - } else { - reg = ATH_READ_REG(AR5312_SYSREG_BASE + - AR5312_SYSREG_MISC_INTMASK); - ATH_WRITE_REG(AR5312_SYSREG_BASE + - AR5312_SYSREG_MISC_INTMASK, reg | (1 << irq)); - } -} - -#ifdef INTRNG -static int -apb_pic_register_isrcs(struct apb_softc *sc) -{ - int error; - uint32_t irq; - struct intr_irqsrc *isrc; - const char *name; - - name = device_get_nameunit(sc->apb_dev); - for (irq = 0; irq < APB_NIRQS; irq++) { - sc->pic_irqs[irq].irq = irq; - isrc = PIC_INTR_ISRC(sc, irq); - error = intr_isrc_register(isrc, sc->apb_dev, 0, "%s", name); - if (error != 0) { - /* XXX call intr_isrc_deregister */ - device_printf(sc->apb_dev, "%s failed", __func__); - return (error); - } - } - - return (0); -} - -static inline intptr_t -pic_xref(device_t dev) -{ - return (0); -} -#endif - -static int -apb_probe(device_t dev) -{ -#ifdef INTRNG - device_set_desc(dev, "APB Bus bridge INTRNG"); -#else - device_set_desc(dev, "APB Bus bridge"); -#endif - - return (0); -} - -static int -apb_attach(device_t dev) -{ - struct apb_softc *sc = device_get_softc(dev); -#ifdef INTRNG - intptr_t xref = pic_xref(dev); - int miscirq; -#else - int rid = 0; -#endif - - sc->apb_dev = dev; - - sc->apb_mem_rman.rm_type = RMAN_ARRAY; - sc->apb_mem_rman.rm_descr = "APB memory window"; - - if(ar531x_soc >= AR531X_SOC_AR5315) { - if (rman_init(&sc->apb_mem_rman) != 0 || - rman_manage_region(&sc->apb_mem_rman, - AR5315_APB_BASE, - AR5315_APB_BASE + AR5315_APB_SIZE - 1) != 0) - panic("apb_attach: failed to set up memory rman"); - } else { - if (rman_init(&sc->apb_mem_rman) != 0 || - rman_manage_region(&sc->apb_mem_rman, - AR5312_APB_BASE, - AR5312_APB_BASE + AR5312_APB_SIZE - 1) != 0) - panic("apb_attach: failed to set up memory rman"); - } - - sc->apb_irq_rman.rm_type = RMAN_ARRAY; - sc->apb_irq_rman.rm_descr = "APB IRQ"; - - if (rman_init(&sc->apb_irq_rman) != 0 || - rman_manage_region(&sc->apb_irq_rman, - APB_IRQ_BASE, APB_IRQ_END) != 0) - panic("apb_attach: failed to set up IRQ rman"); - -#ifndef INTRNG - if ((sc->sc_misc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE)) == NULL) { - device_printf(dev, "unable to allocate IRQ resource\n"); - return (ENXIO); - } - - if ((bus_setup_intr(dev, sc->sc_misc_irq, INTR_TYPE_MISC, - apb_filter, NULL, sc, &sc->sc_misc_ih))) { - device_printf(dev, - "WARNING: unable to register interrupt handler\n"); - return (ENXIO); - } -#else - /* Register the interrupts */ - if (apb_pic_register_isrcs(sc) != 0) { - device_printf(dev, "could not register PIC ISRCs\n"); - return (ENXIO); - } - - /* - * Now, when everything is initialized, it's right time to - * register interrupt controller to interrupt framefork. - */ - if (intr_pic_register(dev, xref) == NULL) { - device_printf(dev, "could not register PIC\n"); - return (ENXIO); - } - - if(ar531x_soc >= AR531X_SOC_AR5315) { - miscirq = AR5315_CPU_IRQ_MISC; - } else { - miscirq = AR5312_IRQ_MISC; - } - cpu_establish_hardintr("aric", apb_filter, NULL, sc, miscirq, - INTR_TYPE_MISC, NULL); -#endif - - /* mask all misc interrupt */ - if(ar531x_soc >= AR531X_SOC_AR5315) { - ATH_WRITE_REG(AR5315_SYSREG_BASE - + AR5315_SYSREG_MISC_INTMASK, 0); - } else { - ATH_WRITE_REG(AR5312_SYSREG_BASE - + AR5312_SYSREG_MISC_INTMASK, 0); - } - - bus_generic_probe(dev); - bus_enumerate_hinted_children(dev); - bus_generic_attach(dev); - - return (0); -} - -static struct resource * -apb_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct apb_softc *sc = device_get_softc(bus); - struct apb_ivar *ivar = device_get_ivars(child); - struct resource *rv; - struct resource_list_entry *rle; - struct rman *rm; - int isdefault, needactivate, passthrough; - - isdefault = (RMAN_IS_DEFAULT_RANGE(start, end)); - needactivate = flags & RF_ACTIVE; - /* - * Pass memory requests to nexus device - */ - passthrough = (device_get_parent(child) != bus); - rle = NULL; - - dprintf("%s: entry (%p, %p, %d, %d, %p, %p, %jd, %d)\n", - __func__, bus, child, type, *rid, (void *)(intptr_t)start, - (void *)(intptr_t)end, count, flags); - - if (passthrough) - return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type, - rid, start, end, count, flags)); - - /* - * If this is an allocation of the "default" range for a given RID, - * and we know what the resources for this device are (ie. they aren't - * maintained by a child bus), then work out the start/end values. - */ - - if (isdefault) { - rle = resource_list_find(&ivar->resources, type, *rid); - if (rle == NULL) { - return (NULL); - } - - if (rle->res != NULL) { - panic("%s: resource entry is busy", __func__); - } - start = rle->start; - end = rle->end; - count = rle->count; - - dprintf("%s: default resource (%p, %p, %jd)\n", - __func__, (void *)(intptr_t)start, - (void *)(intptr_t)end, count); - } - - switch (type) { - case SYS_RES_IRQ: - rm = &sc->apb_irq_rman; - break; - case SYS_RES_MEMORY: - rm = &sc->apb_mem_rman; - break; - default: - printf("%s: unknown resource type %d\n", __func__, type); - return (0); - } - - rv = rman_reserve_resource(rm, start, end, count, flags, child); - if (rv == NULL) { - printf("%s: could not reserve resource %d\n", __func__, type); - return (0); - } - - rman_set_rid(rv, *rid); - - if (needactivate) { - if (bus_activate_resource(child, type, *rid, rv)) { - printf("%s: could not activate resource\n", __func__); - rman_release_resource(rv); - return (0); - } - } - - return (rv); -} - -static int -apb_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - - /* XXX: should we mask/unmask IRQ here? */ - return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), child, - type, rid, r)); -} - -static int -apb_deactivate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - - /* XXX: should we mask/unmask IRQ here? */ - return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus), child, - type, rid, r)); -} - -static int -apb_release_resource(device_t dev, device_t child, int type, - int rid, struct resource *r) -{ - struct resource_list *rl; - struct resource_list_entry *rle; - - rl = apb_get_resource_list(dev, child); - if (rl == NULL) - return (EINVAL); - rle = resource_list_find(rl, type, rid); - if (rle == NULL) - return (EINVAL); - rman_release_resource(r); - rle->res = NULL; - - return (0); -} - -static int -apb_setup_intr(device_t bus, device_t child, struct resource *ires, - int flags, driver_filter_t *filt, driver_intr_t *handler, - void *arg, void **cookiep) -{ - struct apb_softc *sc = device_get_softc(bus); - int error; - int irq; -#ifndef INTRNG - struct intr_event *event; -#endif - -#ifdef INTRNG - struct intr_irqsrc *isrc; - const char *name; - - if ((rman_get_flags(ires) & RF_SHAREABLE) == 0) - flags |= INTR_EXCL; - - irq = rman_get_start(ires); - isrc = PIC_INTR_ISRC(sc, irq); - if(isrc->isrc_event == 0) { - error = intr_event_create(&isrc->isrc_event, (void *)irq, - 0, irq, apb_mask_irq, apb_unmask_irq, - NULL, NULL, "apb intr%d:", irq); - if(error != 0) - return(error); - } - name = device_get_nameunit(child); - error = intr_event_add_handler(isrc->isrc_event, name, filt, handler, - arg, intr_priority(flags), flags, cookiep); - return(error); -#else - irq = rman_get_start(ires); - - if (irq > APB_IRQ_END) - panic("%s: bad irq %d", __func__, irq); - - event = sc->sc_eventstab[irq]; - if (event == NULL) { - error = intr_event_create(&event, (void *)irq, 0, irq, - apb_mask_irq, apb_unmask_irq, - NULL, NULL, - "apb intr%d:", irq); - - if (error == 0) { - sc->sc_eventstab[irq] = event; - sc->sc_intr_counter[irq] = - mips_intrcnt_create(event->ie_name); - } - else - return (error); - } - - intr_event_add_handler(event, device_get_nameunit(child), filt, - handler, arg, intr_priority(flags), flags, cookiep); - mips_intrcnt_setname(sc->sc_intr_counter[irq], event->ie_fullname); - - apb_unmask_irq((void*)irq); - - return (0); -#endif -} - -#ifndef INTRNG -static int -apb_teardown_intr(device_t dev, device_t child, struct resource *ires, - void *cookie) -{ -#ifdef INTRNG - return (intr_teardown_irq(child, ires, cookie)); -#else - struct apb_softc *sc = device_get_softc(dev); - int irq, result; - - irq = rman_get_start(ires); - if (irq > APB_IRQ_END) - panic("%s: bad irq %d", __func__, irq); - - if (sc->sc_eventstab[irq] == NULL) - panic("Trying to teardown unoccupied IRQ"); - - apb_mask_irq((void*)irq); - - result = intr_event_remove_handler(cookie); - if (!result) - sc->sc_eventstab[irq] = NULL; - - return (result); -#endif -} - -static int -apb_filter(void *arg) -{ - struct apb_softc *sc = arg; - struct intr_event *event; - uint32_t reg, irq; - - if(ar531x_soc >= AR531X_SOC_AR5315) - reg = ATH_READ_REG(AR5315_SYSREG_BASE + - AR5315_SYSREG_MISC_INTSTAT); - else - reg = ATH_READ_REG(AR5312_SYSREG_BASE + - AR5312_SYSREG_MISC_INTSTAT); - - for (irq = 0; irq < APB_NIRQS; irq++) { - if (reg & (1 << irq)) { - if(ar531x_soc >= AR531X_SOC_AR5315) { - ATH_WRITE_REG(AR5315_SYSREG_BASE + - AR5315_SYSREG_MISC_INTSTAT, - reg & ~(1 << irq)); - } else { - ATH_WRITE_REG(AR5312_SYSREG_BASE + - AR5312_SYSREG_MISC_INTSTAT, - reg & ~(1 << irq)); - } - - event = sc->sc_eventstab[irq]; - if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) { - if(irq == 1 && ar531x_soc < AR531X_SOC_AR5315) { - ATH_READ_REG(AR5312_SYSREG_BASE + - AR5312_SYSREG_AHBPERR); - ATH_READ_REG(AR5312_SYSREG_BASE + - AR5312_SYSREG_AHBDMAE); - } - /* Ignore non handle interrupts */ - if (irq != 0 && irq != 6) - printf("Stray APB IRQ %d\n", irq); - - continue; - } - - intr_event_handle(event, PCPU_GET(curthread)->td_intr_frame); - mips_intrcnt_inc(sc->sc_intr_counter[irq]); - } - } - - return (FILTER_HANDLED); -} -#else -static int -apb_filter(void *arg) -{ - struct apb_softc *sc = arg; - struct thread *td; - uint32_t i, intr; - - td = curthread; - /* Workaround: do not inflate intr nesting level */ - td->td_intr_nesting_level--; - - if(ar531x_soc >= AR531X_SOC_AR5315) - intr = ATH_READ_REG(AR5315_SYSREG_BASE + - AR5315_SYSREG_MISC_INTSTAT); - else - intr = ATH_READ_REG(AR5312_SYSREG_BASE + - AR5312_SYSREG_MISC_INTSTAT); - - while ((i = fls(intr)) != 0) { - i--; - intr &= ~(1u << i); - - if(i == 1 && ar531x_soc < AR531X_SOC_AR5315) { - ATH_READ_REG(AR5312_SYSREG_BASE + - AR5312_SYSREG_AHBPERR); - ATH_READ_REG(AR5312_SYSREG_BASE + - AR5312_SYSREG_AHBDMAE); - } - - if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i), - curthread->td_intr_frame) != 0) { - device_printf(sc->apb_dev, - "Stray interrupt %u detected\n", i); - apb_mask_irq((void*)i); - continue; - } - } - - KASSERT(i == 0, ("all interrupts handled")); - - td->td_intr_nesting_level++; - - return (FILTER_HANDLED); - -} - -#endif - -static void -apb_hinted_child(device_t bus, const char *dname, int dunit) -{ - device_t child; - long maddr; - int msize; - int irq; - int result; - int mem_hints_count; - - child = BUS_ADD_CHILD(bus, 0, dname, dunit); - - /* - * Set hard-wired resources for hinted child using - * specific RIDs. - */ - mem_hints_count = 0; - if (resource_long_value(dname, dunit, "maddr", &maddr) == 0) - mem_hints_count++; - if (resource_int_value(dname, dunit, "msize", &msize) == 0) - mem_hints_count++; - - /* check if all info for mem resource has been provided */ - if ((mem_hints_count > 0) && (mem_hints_count < 2)) { - printf("Either maddr or msize hint is missing for %s%d\n", - dname, dunit); - } else if (mem_hints_count) { - result = bus_set_resource(child, SYS_RES_MEMORY, 0, - maddr, msize); - if (result != 0) - device_printf(bus, - "warning: bus_set_resource() failed\n"); - } - - if (resource_int_value(dname, dunit, "irq", &irq) == 0) { - result = bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1); - if (result != 0) - device_printf(bus, - "warning: bus_set_resource() failed\n"); - } -} - -static device_t -apb_add_child(device_t bus, u_int order, const char *name, int unit) -{ - device_t child; - struct apb_ivar *ivar; - - ivar = malloc(sizeof(struct apb_ivar), M_DEVBUF, M_WAITOK | M_ZERO); - if (ivar == NULL) { - printf("Failed to allocate ivar\n"); - return (0); - } - resource_list_init(&ivar->resources); - - child = device_add_child_ordered(bus, order, name, unit); - if (child == NULL) { - printf("Can't add child %s%d ordered\n", name, unit); - return (0); - } - - device_set_ivars(child, ivar); - - return (child); -} - -/* - * Helper routine for bus_generic_rl_get_resource/bus_generic_rl_set_resource - * Provides pointer to resource_list for these routines - */ -static struct resource_list * -apb_get_resource_list(device_t dev, device_t child) -{ - struct apb_ivar *ivar; - - ivar = device_get_ivars(child); - return (&(ivar->resources)); -} - -#ifdef INTRNG -static void -apb_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - u_int irq; - - irq = ((struct apb_pic_irqsrc *)isrc)->irq; - apb_unmask_irq((void*)irq); -} - -static void -apb_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - u_int irq; - - irq = ((struct apb_pic_irqsrc *)isrc)->irq; - apb_mask_irq((void*)irq); -} - -static void -apb_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - apb_pic_disable_intr(dev, isrc); -} - -static void -apb_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - apb_pic_enable_intr(dev, isrc); -} - -static void -apb_pic_post_filter(device_t dev, struct intr_irqsrc *isrc) -{ - uint32_t reg, irq; - - irq = ((struct apb_pic_irqsrc *)isrc)->irq; - if(ar531x_soc >= AR531X_SOC_AR5315) { - reg = ATH_READ_REG(AR5315_SYSREG_BASE + - AR5315_SYSREG_MISC_INTSTAT); - ATH_WRITE_REG(AR5315_SYSREG_BASE + AR5315_SYSREG_MISC_INTSTAT, - reg & ~(1 << irq)); - } else { - reg = ATH_READ_REG(AR5312_SYSREG_BASE + - AR5312_SYSREG_MISC_INTSTAT); - ATH_WRITE_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_MISC_INTSTAT, - reg & ~(1 << irq)); - } -} - -static int -apb_pic_map_intr(device_t dev, struct intr_map_data *data, - struct intr_irqsrc **isrcp) -{ - return (ENOTSUP); -} - -#endif - -static device_method_t apb_methods[] = { - DEVMETHOD(bus_activate_resource, apb_activate_resource), - DEVMETHOD(bus_add_child, apb_add_child), - DEVMETHOD(bus_alloc_resource, apb_alloc_resource), - DEVMETHOD(bus_deactivate_resource, apb_deactivate_resource), - DEVMETHOD(bus_get_resource_list, apb_get_resource_list), - DEVMETHOD(bus_hinted_child, apb_hinted_child), - DEVMETHOD(bus_release_resource, apb_release_resource), - DEVMETHOD(device_attach, apb_attach), - DEVMETHOD(device_probe, apb_probe), - DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), - DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), -#ifdef INTRNG - DEVMETHOD(pic_disable_intr, apb_pic_disable_intr), - DEVMETHOD(pic_enable_intr, apb_pic_enable_intr), - DEVMETHOD(pic_map_intr, apb_pic_map_intr), - DEVMETHOD(pic_post_filter, apb_pic_post_filter), - DEVMETHOD(pic_post_ithread, apb_pic_post_ithread), - DEVMETHOD(pic_pre_ithread, apb_pic_pre_ithread), - -// DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), -#else - DEVMETHOD(bus_teardown_intr, apb_teardown_intr), -#endif - DEVMETHOD(bus_setup_intr, apb_setup_intr), - - DEVMETHOD_END -}; - -static driver_t apb_driver = { - "apb", - apb_methods, - sizeof(struct apb_softc), -}; -static devclass_t apb_devclass; - -EARLY_DRIVER_MODULE(apb, nexus, apb_driver, apb_devclass, 0, 0, - BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); diff --git a/sys/mips/atheros/ar531x/apbvar.h b/sys/mips/atheros/ar531x/apbvar.h deleted file mode 100644 index 50c83f65616..00000000000 --- a/sys/mips/atheros/ar531x/apbvar.h +++ /dev/null @@ -1,61 +0,0 @@ -/*- - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _APBVAR_H_ -#define _APBVAR_H_ - -#define APB_IRQ_BASE 0 -#define APB_IRQ_END 31 -#define APB_NIRQS 32 - -struct apb_pic_irqsrc { - struct intr_irqsrc isrc; - u_int irq; -}; - -struct apb_softc { - device_t apb_dev; - struct rman apb_irq_rman; - struct rman apb_mem_rman; - /* IRQ events structs for child devices */ - struct intr_event *sc_eventstab[APB_NIRQS]; -#ifndef INTRNG - mips_intrcnt_t sc_intr_counter[APB_NIRQS]; -#endif - /* Resources and cookies for MIPS CPU INTs */ - struct resource *sc_misc_irq; - void *sc_misc_ih; -#ifdef INTRNG - struct apb_pic_irqsrc pic_irqs[APB_NIRQS]; -#endif -}; - -struct apb_ivar { - struct resource_list resources; -}; - -#endif /* _APBVAR_H_ */ diff --git a/sys/mips/atheros/ar531x/ar5312_chip.c b/sys/mips/atheros/ar531x/ar5312_chip.c deleted file mode 100644 index ce1408ca0a0..00000000000 --- a/sys/mips/atheros/ar531x/ar5312_chip.c +++ /dev/null @@ -1,206 +0,0 @@ -/*- - * Copyright (c) 2016 Hiroki Mori - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -static void -ar5312_chip_detect_mem_size(void) -{ - uint32_t memsize; - uint32_t memcfg, bank0, bank1; - - /* - * Determine the memory size as established by system - * firmware. - * - * NB: we allow compile time override - */ - memcfg = ATH_READ_REG(AR5312_SDRAMCTL_BASE + AR5312_SDRAMCTL_MEM_CFG1); - bank0 = __SHIFTOUT(memcfg, AR5312_MEM_CFG1_BANK0); - bank1 = __SHIFTOUT(memcfg, AR5312_MEM_CFG1_BANK1); - - memsize = (bank0 ? (1 << (bank0 + 1)) : 0) + - (bank1 ? (1 << (bank1 + 1)) : 0); - memsize <<= 20; - - realmem = memsize; -} - -static void -ar5312_chip_detect_sys_frequency(void) -{ - uint32_t predivisor; - uint32_t multiplier; - - const uint32_t clockctl = ATH_READ_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_CLOCKCTL); - if(ar531x_soc == AR531X_SOC_AR5313) { - predivisor = __SHIFTOUT(clockctl, AR2313_CLOCKCTL_PREDIVIDE); - multiplier = __SHIFTOUT(clockctl, AR2313_CLOCKCTL_MULTIPLIER); - } else { - predivisor = __SHIFTOUT(clockctl, AR5312_CLOCKCTL_PREDIVIDE); - multiplier = __SHIFTOUT(clockctl, AR5312_CLOCKCTL_MULTIPLIER); - } - - const uint32_t divisor = (0x5421 >> (predivisor * 4)) & 15; - - const uint32_t cpufreq = (40000000 / divisor) * multiplier; - - u_ar531x_cpu_freq = cpufreq; - u_ar531x_ahb_freq = cpufreq / 4; - u_ar531x_ddr_freq = 0; -} - -/* - * This does not lock the CPU whilst doing the work! - */ -static void -ar5312_chip_device_reset(void) -{ - ATH_WRITE_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_RESETCTL, - AR5312_RESET_SYSTEM); -} - -static void -ar5312_chip_device_start(void) -{ - uint32_t cfg0, cfg1; - uint32_t bank0, bank1; - uint32_t size0, size1; - - cfg0 = ATH_READ_REG(AR5312_SDRAMCTL_BASE + AR5312_SDRAMCTL_MEM_CFG0); - cfg1 = ATH_READ_REG(AR5312_SDRAMCTL_BASE + AR5312_SDRAMCTL_MEM_CFG1); - - bank0 = __SHIFTOUT(cfg1, AR5312_MEM_CFG1_BANK0); - bank1 = __SHIFTOUT(cfg1, AR5312_MEM_CFG1_BANK1); - - size0 = bank0 ? (1 << (bank0 + 1)) : 0; - size1 = bank1 ? (1 << (bank1 + 1)) : 0; - - size0 <<= 20; - size1 <<= 20; - - printf("SDRMCTL %x %x %x %x\n", cfg0, cfg1, size0, size1); - - ATH_READ_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_AHBPERR); - ATH_READ_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_AHBDMAE); -// ATH_WRITE_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_WDOG_CTL, 0); - ATH_WRITE_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_ENABLE, 0); - - ATH_WRITE_REG(AR5312_SYSREG_BASE+AR5312_SYSREG_ENABLE, - ATH_READ_REG(AR5312_SYSREG_BASE+AR5312_SYSREG_ENABLE) | - AR5312_ENABLE_ENET0 | AR5312_ENABLE_ENET1); - -} - -static int -ar5312_chip_device_stopped(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_RESETCTL); - return ((reg & mask) == mask); -} - -static void -ar5312_chip_set_mii_speed(uint32_t unit, uint32_t speed) -{ -} - -/* Speed is either 10, 100 or 1000 */ -static void -ar5312_chip_set_pll_ge(int unit, int speed) -{ -} - -static void -ar5312_chip_ddr_flush_ge(int unit) -{ -} - -static void -ar5312_chip_soc_init(void) -{ - - u_ar531x_uart_addr = MIPS_PHYS_TO_KSEG1(AR5312_UART0_BASE); - - u_ar531x_gpio_di = AR5312_GPIO_DI; - u_ar531x_gpio_do = AR5312_GPIO_DO; - u_ar531x_gpio_cr = AR5312_GPIO_CR; - u_ar531x_gpio_pins = AR5312_GPIO_PINS; - - u_ar531x_wdog_ctl = AR5312_SYSREG_WDOG_CTL; - u_ar531x_wdog_timer = AR5312_SYSREG_WDOG_TIMER; - -} - -static uint32_t -ar5312_chip_get_eth_pll(unsigned int mac, int speed) -{ - return 0; -} - -struct ar5315_cpu_def ar5312_chip_def = { - &ar5312_chip_detect_mem_size, - &ar5312_chip_detect_sys_frequency, - &ar5312_chip_device_reset, - &ar5312_chip_device_start, - &ar5312_chip_device_stopped, - &ar5312_chip_set_pll_ge, - &ar5312_chip_set_mii_speed, - &ar5312_chip_ddr_flush_ge, - &ar5312_chip_get_eth_pll, - &ar5312_chip_soc_init, -}; diff --git a/sys/mips/atheros/ar531x/ar5312_chip.h b/sys/mips/atheros/ar531x/ar5312_chip.h deleted file mode 100644 index 354f8f4e4e9..00000000000 --- a/sys/mips/atheros/ar531x/ar5312_chip.h +++ /dev/null @@ -1,33 +0,0 @@ -/*- - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef __AR5312_CHIP_H__ -#define __AR5312_CHIP_H__ - -extern struct ar5315_cpu_def ar5312_chip_def; - -#endif diff --git a/sys/mips/atheros/ar531x/ar5312reg.h b/sys/mips/atheros/ar531x/ar5312reg.h deleted file mode 100644 index 988fb4d115d..00000000000 --- a/sys/mips/atheros/ar531x/ar5312reg.h +++ /dev/null @@ -1,237 +0,0 @@ -/* $Id: ar5312reg.h,v 1.4 2011/07/07 05:06:44 matt Exp $ */ -/* - * Copyright (c) 2006 Urbana-Champaign Independent Media Center. - * Copyright (c) 2006 Garrett D'Amore. - * All rights reserved. - * - * This code was written by Garrett D'Amore for the Champaign-Urbana - * Community Wireless Network Project. - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * 3. All advertising materials mentioning features or use of this - * software must display the following acknowledgements: - * This product includes software developed by the Urbana-Champaign - * Independent Media Center. - * This product includes software developed by Garrett D'Amore. - * 4. Urbana-Champaign Independent Media Center's name and Garrett - * D'Amore's name may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT - * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT - * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MIPS_ATHEROS_AR5312REG_H_ -#define _MIPS_ATHEROS_AR5312REG_H_ - -#define AR5312_MEM0_BASE 0x00000000 /* sdram */ -#define AR5312_MEM1_BASE 0x08000000 /* sdram/flash */ -#define AR5312_MEM3_BASE 0x10000000 /* flash */ -#define AR5312_WLAN0_BASE 0x18000000 -#define AR5312_ENET0_BASE 0x18100000 -#define AR5312_ENET1_BASE 0x18200000 -#define AR5312_SDRAMCTL_BASE 0x18300000 -#define AR5312_FLASHCTL_BASE 0x18400000 -#define AR5312_WLAN1_BASE 0x18500000 -#define AR5312_UART0_BASE 0x1C000000 /* high speed */ -#define AR5312_UART1_BASE 0x1C001000 -#define AR5312_GPIO_BASE 0x1C002000 -#define AR5312_SYSREG_BASE 0x1C003000 -#define AR5312_UARTDMA_BASE 0x1C004000 -#define AR5312_FLASH_BASE 0x1E000000 -#define AR5312_FLASH_END 0x20000000 /* possibly aliased */ - -/* - * FLASHCTL registers -- offset relative to AR531X_FLASHCTL_BASE - */ -#define AR5312_FLASHCTL_0 0x00 -#define AR5312_FLASHCTL_1 0x04 -#define AR5312_FLASHCTL_2 0x08 - -#define AR5312_FLASHCTL_IDCY __BITS(0,3) /* idle cycle turn */ -#define AR5312_FLASHCTL_WST1 __BITS(5,9) /* wait state 1 */ -#define AR5312_FLASHCTL_RBLE __BIT(10) /* rd byte enable */ -#define AR5312_FLASHCTL_WST2 __BITS(11,15) /* wait state 1 */ -#define AR5312_FLASHCTL_AC __BITS(16,18) /* addr chk */ -#define AR5312_FLASHCTL_AC_128K 0 -#define AR5312_FLASHCTL_AC_256K 1 -#define AR5312_FLASHCTL_AC_512K 2 -#define AR5312_FLASHCTL_AC_1M 3 -#define AR5312_FLASHCTL_AC_2M 4 -#define AR5312_FLASHCTL_AC_4M 5 -#define AR5312_FLASHCTL_AC_8M 6 -#define AR5312_FLASHCTL_AC_16M 7 -#define AR5312_FLASHCTL_E __BIT(19) /* enable */ -#define AR5312_FLASHCTL_BUSERR __BIT(24) /* buserr */ -#define AR5312_FLASHCTL_WPERR __BIT(25) /* wperr */ -#define AR5312_FLASHCTL_WP __BIT(26) /* wp */ -#define AR5312_FLASHCTL_BM __BIT(27) /* bm */ -#define AR5312_FLASHCTL_MW __BITS(28,29) /* mem width */ -#define AR5312_FLASHCTL_AT __BITS(31,30) /* access type */ - -/* - * GPIO registers -- offset relative to AR531X_GPIO_BASE - */ -#define AR5312_GPIO_DO 0 -#define AR5312_GPIO_DI 4 -#define AR5312_GPIO_CR 8 - -#define AR5312_GPIO_PINS 8 - -/* - * SYSREG registers -- offset relative to AR531X_SYSREG_BASE - */ -#define AR5312_SYSREG_TIMER 0x0000 -#define AR5312_SYSREG_TIMER_RELOAD 0x0004 -#define AR5312_SYSREG_WDOG_CTL 0x0008 -#define AR5312_SYSREG_WDOG_TIMER 0x000c -#define AR5312_SYSREG_MISC_INTSTAT 0x0010 -#define AR5312_SYSREG_MISC_INTMASK 0x0014 -#define AR5312_SYSREG_INTSTAT 0x0018 -#define AR5312_SYSREG_RESETCTL 0x0020 -#define AR5312_SYSREG_CLOCKCTL 0x0064 -#define AR5312_SYSREG_SCRATCH 0x006c -#define AR5312_SYSREG_AHBPERR 0x0070 -#define AR5312_SYSREG_PROC 0x0074 -#define AR5312_SYSREG_AHBDMAE 0x0078 -#define AR5312_SYSREG_ENABLE 0x0080 -#define AR5312_SYSREG_REVISION 0x0090 - -/* WDOG_CTL watchdog control bits */ -#define AR5312_WDOG_CTL_IGNORE 0x0000 -#define AR5312_WDOG_CTL_NMI 0x0001 -#define AR5312_WDOG_CTL_RESET 0x0002 - -/* Resets */ -#define AR5312_RESET_SYSTEM __BIT(0) -#define AR5312_RESET_CPU __BIT(1) -#define AR5312_RESET_WLAN0 __BIT(2) /* mac & bb */ -#define AR5312_RESET_PHY0 __BIT(3) /* enet phy */ -#define AR5312_RESET_PHY1 __BIT(4) /* enet phy */ -#define AR5312_RESET_ENET0 __BIT(5) /* mac */ -#define AR5312_RESET_ENET1 __BIT(6) /* mac */ -#define AR5312_RESET_UART0 __BIT(8) /* mac */ -#define AR5312_RESET_WLAN1 __BIT(9) /* mac & bb */ -#define AR5312_RESET_APB __BIT(10) /* bridge */ -#define AR5312_RESET_WARM_CPU __BIT(16) -#define AR5312_RESET_WARM_WLAN0_MAC __BIT(17) -#define AR5312_RESET_WARM_WLAN0_BB __BIT(18) -#define AR5312_RESET_NMI __BIT(20) -#define AR5312_RESET_WARM_WLAN1_MAC __BIT(21) -#define AR5312_RESET_WARM_WLAN1_BB __BIT(22) -#define AR5312_RESET_LOCAL_BUS __BIT(23) -#define AR5312_RESET_WDOG __BIT(24) - -/* AR5312/2312 clockctl bits */ -#define AR5312_CLOCKCTL_PREDIVIDE __BITS(4,5) -#define AR5312_CLOCKCTL_MULTIPLIER __BITS(8,12) -#define AR5312_CLOCKCTL_DOUBLER __BIT(16) - -/* AR2313 clockctl */ -#define AR2313_CLOCKCTL_PREDIVIDE __BITS(12,13) -#define AR2313_CLOCKCTL_MULTIPLIER __BITS(16,20) - -/* Enables */ -#define AR5312_ENABLE_WLAN0 __BIT(0) -#define AR5312_ENABLE_ENET0 __BIT(1) -#define AR5312_ENABLE_ENET1 __BIT(2) -#define AR5312_ENABLE_WLAN1 __BITS(7,8) /* both DMA and PIO */ - -/* Revision ids */ -#define AR5312_REVISION_WMAC_MAJOR(x) (((x) >> 12) & 0xf) -#define AR5312_REVISION_WMAC_MINOR(x) (((x) >> 8) & 0xf) -#define AR5312_REVISION_WMAC(x) (((x) >> 8) & 0xff) -#define AR5312_REVISION_MAJOR(x) (((x) >> 4) & 0xf) -#define AR5312_REVISION_MINOR(x) (((x) >> 0) & 0xf) - -#define AR5312_REVISION_MAJ_AR5311 0x1 -#define AR5312_REVISION_MAJ_AR5312 0x4 -#define AR5312_REVISION_MAJ_AR2313 0x5 -#define AR5312_REVISION_MAJ_AR5315 0xB - -/* - * SDRAMCTL registers -- offset relative to SDRAMCTL - */ -#define AR5312_SDRAMCTL_MEM_CFG0 0x0000 -#define AR5312_SDRAMCTL_MEM_CFG1 0x0004 - -/* memory config 1 bits */ -#define AR5312_MEM_CFG1_BANK0 __BITS(8,10) -#define AR5312_MEM_CFG1_BANK1 __BITS(12,15) - -/* helper macro for accessing system registers without bus space */ -#define REGVAL(x) *((volatile uint32_t *)(MIPS_PHYS_TO_KSEG1((x)))) -#define GETSYSREG(x) REGVAL((x) + AR5312_SYSREG_BASE) -#define PUTSYSREG(x,v) (REGVAL((x) + AR5312_SYSREG_BASE)) = (v) -#define GETSDRAMREG(x) REGVAL((x) + AR5312_SDRAMCTL_BASE) -#define PUTSDRAMREG(x,v) (REGVAL((x) + AR5312_SDRAMCTL_BASE)) = (v) - -/* - * Interrupts. - */ -#define AR5312_IRQ_WLAN0 0 -#define AR5312_IRQ_ENET0 1 -#define AR5312_IRQ_ENET1 2 -#define AR5312_IRQ_WLAN1 3 -#define AR5312_IRQ_MISC 4 - -#define AR5312_MISC_IRQ_TIMER 1 -#define AR5312_MISC_IRQ_AHBPERR 2 -#define AR5312_MISC_IRQ_AHBDMAE 3 -#define AR5312_MISC_IRQ_GPIO 4 -#define AR5312_MISC_IRQ_UART0 5 -#define AR5312_MISC_IRQ_UART0_DMA 6 -#define AR5312_MISC_IRQ_WDOG 7 - -/* - * Board data. This is located in flash somewhere, ar531x_board_info - * locates it. - */ -#include /* XXX really doesn't belong in hal */ - -/* XXX write-around for now */ -#define AR5312_BOARD_MAGIC AR531X_BD_MAGIC - -/* config bits */ -#define AR5312_BOARD_CONFIG_ENET0 BD_ENET0 -#define AR5312_BOARD_CONFIG_ENET1 BD_ENET1 -#define AR5312_BOARD_CONFIG_UART1 BD_UART1 -#define AR5312_BOARD_CONFIG_UART0 BD_UART0 -#define AR5312_BOARD_CONFIG_RSTFACTORY BD_RSTFACTORY -#define AR5312_BOARD_CONFIG_SYSLED BD_SYSLED -#define AR5312_BOARD_CONFIG_EXTUARTCLK BD_EXTUARTCLK -#define AR5312_BOARD_CONFIG_CPUFREQ BD_CPUFREQ -#define AR5312_BOARD_CONFIG_SYSFREQ BD_SYSFREQ -#define AR5312_BOARD_CONFIG_WLAN0 BD_WLAN0 -#define AR5312_BOARD_CONFIG_MEMCAP BD_MEMCAP -#define AR5312_BOARD_CONFIG_DISWDOG BD_DISWATCHDOG -#define AR5312_BOARD_CONFIG_WLAN1 BD_WLAN1 -#define AR5312_BOARD_CONFIG_AR2312 BD_ISCASPER -#define AR5312_BOARD_CONFIG_WLAN0_2G BD_WLAN0_2G_EN -#define AR5312_BOARD_CONFIG_WLAN0_5G BD_WLAN0_5G_EN -#define AR5312_BOARD_CONFIG_WLAN1_2G BD_WLAN1_2G_EN -#define AR5312_BOARD_CONFIG_WLAN1_5G BD_WLAN1_5G_EN - -#define AR5312_APB_BASE AR5312_UART0_BASE -#define AR5312_APB_SIZE 0x02000000 - -#endif /* _MIPS_ATHEROS_AR531XREG_H_ */ diff --git a/sys/mips/atheros/ar531x/ar5315_chip.c b/sys/mips/atheros/ar531x/ar5315_chip.c deleted file mode 100644 index 59fbf5e5688..00000000000 --- a/sys/mips/atheros/ar531x/ar5315_chip.c +++ /dev/null @@ -1,254 +0,0 @@ -/*- - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * Copyright (c) 2016, Hiroki Mori - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -/* XXX these shouldn't be in here - this file is a per-chip file */ -/* XXX these should be in the top-level ar5315 type, not ar5315 -chip */ -uint32_t u_ar531x_cpu_freq; -uint32_t u_ar531x_ahb_freq; -uint32_t u_ar531x_ddr_freq; - -uint32_t u_ar531x_uart_addr; - -uint32_t u_ar531x_gpio_di; -uint32_t u_ar531x_gpio_do; -uint32_t u_ar531x_gpio_cr; -uint32_t u_ar531x_gpio_pins; - -uint32_t u_ar531x_wdog_ctl; -uint32_t u_ar531x_wdog_timer; - -static void -ar5315_chip_detect_mem_size(void) -{ - uint32_t memsize = 0; - uint32_t memcfg, cw, rw, dw; - - /* - * Determine the memory size. We query the board info. - */ - memcfg = ATH_READ_REG(AR5315_SDRAMCTL_BASE + AR5315_SDRAMCTL_MEM_CFG); - cw = __SHIFTOUT(memcfg, AR5315_MEM_CFG_COL_WIDTH); - cw += 1; - rw = __SHIFTOUT(memcfg, AR5315_MEM_CFG_ROW_WIDTH); - rw += 1; - - /* XXX: according to redboot, this could be wrong if DDR SDRAM */ - dw = __SHIFTOUT(memcfg, AR5315_MEM_CFG_DATA_WIDTH); - dw += 1; - dw *= 8; /* bits */ - - /* not too sure about this math, but it _seems_ to add up */ - memsize = (1 << cw) * (1 << rw) * dw; -#if 0 - printf("SDRAM_MEM_CFG =%x, cw=%d rw=%d dw=%d xmemsize=%d\n", memcfg, - cw, rw, dw, memsize); -#endif - realmem = memsize; -} - -static void -ar5315_chip_detect_sys_frequency(void) -{ - uint32_t freq_ref, freq_pll; - static const uint8_t pll_divide_table[] = { - 2, 3, 4, 6, 3, - /* - * these entries are bogus, but it avoids a possible - * bad table dereference - */ - 1, 1, 1 - }; - static const uint8_t pre_divide_table[] = { - 1, 2, 4, 5 - }; - - const uint32_t pllc = ATH_READ_REG(AR5315_SYSREG_BASE + - AR5315_SYSREG_PLLC_CTL); - - const uint32_t refdiv = pre_divide_table[AR5315_PLLC_REF_DIV(pllc)]; - const uint32_t fbdiv = AR5315_PLLC_FB_DIV(pllc); - const uint32_t div2 = (AR5315_PLLC_DIV_2(pllc) + 1) * 2; /* results in 2 or 4 */ - - freq_ref = 40000000; - - /* 40MHz reference clk, reference and feedback dividers */ - freq_pll = (freq_ref / refdiv) * div2 * fbdiv; - - const uint32_t pllout[4] = { - /* CLKM select */ - [0] = freq_pll / pll_divide_table[AR5315_PLLC_CLKM(pllc)], - [1] = freq_pll / pll_divide_table[AR5315_PLLC_CLKM(pllc)], - - /* CLKC select */ - [2] = freq_pll / pll_divide_table[AR5315_PLLC_CLKC(pllc)], - - /* ref_clk select */ - [3] = freq_ref, /* use original reference clock */ - }; - - const uint32_t amba_clkctl = ATH_READ_REG(AR5315_SYSREG_BASE + - AR5315_SYSREG_AMBACLK); - uint32_t ambadiv = AR5315_CLOCKCTL_DIV(amba_clkctl); - ambadiv = ambadiv ? (ambadiv * 2) : 1; - u_ar531x_ahb_freq = pllout[AR5315_CLOCKCTL_SELECT(amba_clkctl)] / ambadiv; - - const uint32_t cpu_clkctl = ATH_READ_REG(AR5315_SYSREG_BASE + - AR5315_SYSREG_CPUCLK); - uint32_t cpudiv = AR5315_CLOCKCTL_DIV(cpu_clkctl); - cpudiv = cpudiv ? (cpudiv * 2) : 1; - u_ar531x_cpu_freq = pllout[AR5315_CLOCKCTL_SELECT(cpu_clkctl)] / cpudiv; - - u_ar531x_ddr_freq = 0; -} - -/* - * This does not lock the CPU whilst doing the work! - */ -static void -ar5315_chip_device_reset(void) -{ - ATH_WRITE_REG(AR5315_SYSREG_BASE + AR5315_SYSREG_COLDRESET, - AR5315_COLD_AHB | AR5315_COLD_APB | AR5315_COLD_CPU); -} - -static void -ar5315_chip_device_start(void) -{ - ATH_WRITE_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_AHB_ERR0, - AR5315_AHB_ERROR_DET); - ATH_READ_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_AHB_ERR1); - ATH_WRITE_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_WDOG_CTL, - AR5315_WDOG_CTL_IGNORE); - - // set Ethernet AHB master arbitration control - // Maybe RedBoot was enabled. But to make sure. - ATH_WRITE_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_AHB_ARB_CTL, - ATH_READ_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_AHB_ARB_CTL) | - AR5315_ARB_ENET); - - // set Ethernet controller byteswap control -/* - ATH_WRITE_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_ENDIAN, - ATH_READ_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_ENDIAN) | - AR5315_ENDIAN_ENET); -*/ - /* Disable interrupts for all gpio pins. */ - ATH_WRITE_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_GPIO_INT, 0); - - printf("AHB Master Arbitration Control %08x\n", - ATH_READ_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_AHB_ARB_CTL)); - printf("Byteswap Control %08x\n", - ATH_READ_REG(AR5315_SYSREG_BASE+AR5315_SYSREG_ENDIAN)); -} - -static int -ar5315_chip_device_stopped(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR5315_SYSREG_BASE + AR5315_SYSREG_COLDRESET); - return ((reg & mask) == mask); -} - -static void -ar5315_chip_set_mii_speed(uint32_t unit, uint32_t speed) -{ -} - -/* Speed is either 10, 100 or 1000 */ -static void -ar5315_chip_set_pll_ge(int unit, int speed) -{ -} - -static void -ar5315_chip_ddr_flush_ge(int unit) -{ -} - -static void -ar5315_chip_soc_init(void) -{ - u_ar531x_uart_addr = MIPS_PHYS_TO_KSEG1(AR5315_UART_BASE); - - u_ar531x_gpio_di = AR5315_SYSREG_GPIO_DI; - u_ar531x_gpio_do = AR5315_SYSREG_GPIO_DO; - u_ar531x_gpio_cr = AR5315_SYSREG_GPIO_CR; - u_ar531x_gpio_pins = AR5315_GPIO_PINS; - - u_ar531x_wdog_ctl = AR5315_SYSREG_WDOG_CTL; - u_ar531x_wdog_timer = AR5315_SYSREG_WDOG_TIMER; -} - -static uint32_t -ar5315_chip_get_eth_pll(unsigned int mac, int speed) -{ - return 0; -} - -struct ar5315_cpu_def ar5315_chip_def = { - &ar5315_chip_detect_mem_size, - &ar5315_chip_detect_sys_frequency, - &ar5315_chip_device_reset, - &ar5315_chip_device_start, - &ar5315_chip_device_stopped, - &ar5315_chip_set_pll_ge, - &ar5315_chip_set_mii_speed, - &ar5315_chip_ddr_flush_ge, - &ar5315_chip_get_eth_pll, - &ar5315_chip_soc_init, -}; diff --git a/sys/mips/atheros/ar531x/ar5315_chip.h b/sys/mips/atheros/ar531x/ar5315_chip.h deleted file mode 100644 index 4b7acc2a2db..00000000000 --- a/sys/mips/atheros/ar531x/ar5315_chip.h +++ /dev/null @@ -1,33 +0,0 @@ -/*- - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef __AR5315_CHIP_H__ -#define __AR5315_CHIP_H__ - -extern struct ar5315_cpu_def ar5315_chip_def; - -#endif diff --git a/sys/mips/atheros/ar531x/ar5315_cpudef.h b/sys/mips/atheros/ar531x/ar5315_cpudef.h deleted file mode 100644 index 0f3f9fde58d..00000000000 --- a/sys/mips/atheros/ar531x/ar5315_cpudef.h +++ /dev/null @@ -1,134 +0,0 @@ -/*- - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef __AR5315_CPUDEF_H__ -#define __AR5315_CPUDEF_H__ - -struct ar5315_cpu_def { - void (* detect_mem_size) (void); - void (* detect_sys_frequency) (void); - void (* ar5315_chip_device_reset) (void); - void (* ar5315_chip_device_start) (void); - int (* ar5315_chip_device_stopped) (uint32_t); - void (* ar5315_chip_set_pll_ge) (int, int); - void (* ar5315_chip_set_mii_speed) (uint32_t, uint32_t); - void (* ar5315_chip_ddr_flush_ge) (int); - uint32_t (* ar5315_chip_get_eth_pll) (unsigned int, int); - void (* ar5315_chip_soc_init) (void); - - /* - * Allow to change MII bus mode: - * AR5315_ARGE_MII_MODE_MII - * AR5315_ARGE_MII_MODE_RMII - * AR5315_ARGE_MII_MODE_GMII - * AR5315_ARGE_MII_MODE_RGMII - * mii_mode(unit, mode); - */ -#define AR5315_ARGE_MII_MODE_MII 0x0100 -#define AR5315_ARGE_MII_MODE_RMII 0x0101 -#define AR5315_ARGE_MII_MODE_GMII 0x1000 -#define AR5315_ARGE_MII_MODE_RGMII 0x1001 - void (* ar5315_chip_set_mii_mode) (int, int, int); -}; - -extern struct ar5315_cpu_def * ar5315_cpu_ops; - -static inline void ar531x_detect_mem_size(void) -{ - ar5315_cpu_ops->detect_mem_size(); -} - -static inline void ar531x_detect_sys_frequency(void) -{ - ar5315_cpu_ops->detect_sys_frequency(); -} - -static inline void ar531x_device_reset(void) -{ - ar5315_cpu_ops->ar5315_chip_device_reset(); -} - -static inline void ar531x_device_start(void) -{ - ar5315_cpu_ops->ar5315_chip_device_start(); -} - -static inline int ar531x_device_stopped(uint32_t mask) -{ - return ar5315_cpu_ops->ar5315_chip_device_stopped(mask); -} - -static inline void ar531x_device_set_pll_ge(int unit, int speed) -{ - ar5315_cpu_ops->ar5315_chip_set_pll_ge(unit, speed); -} - -static inline void ar531x_device_set_mii_speed(int unit, int speed) -{ - ar5315_cpu_ops->ar5315_chip_set_mii_speed(unit, speed); -} - -static inline void ar531x_device_flush_ddr_ge(int unit) -{ - ar5315_cpu_ops->ar5315_chip_ddr_flush_ge(unit); -} - -static inline void ar531x_device_soc_init(void) -{ - ar5315_cpu_ops->ar5315_chip_soc_init(); -} - -static inline void ar531x_device_set_mii_mode(int unit, int mode, int speed) -{ - ar5315_cpu_ops->ar5315_chip_set_mii_mode(unit, mode, speed); -} - -/* XXX shouldn't be here! */ -extern uint32_t u_ar531x_cpu_freq; -extern uint32_t u_ar531x_ahb_freq; -extern uint32_t u_ar531x_ddr_freq; - -extern uint32_t u_ar531x_uart_addr; - -extern uint32_t u_ar531x_gpio_di; -extern uint32_t u_ar531x_gpio_do; -extern uint32_t u_ar531x_gpio_cr; -extern uint32_t u_ar531x_gpio_pins; - -extern uint32_t u_ar531x_wdog_ctl; -extern uint32_t u_ar531x_wdog_timer; -static inline uint32_t ar531x_cpu_freq(void) { return u_ar531x_cpu_freq; } -static inline uint32_t ar531x_ahb_freq(void) { return u_ar531x_ahb_freq; } -static inline uint32_t ar531x_ddr_freq(void) { return u_ar531x_ddr_freq; } -static inline uint32_t ar531x_uart_addr(void) { return u_ar531x_uart_addr; } -static inline uint32_t ar531x_gpio_di(void) { return u_ar531x_gpio_di; } -static inline uint32_t ar531x_gpio_cr(void) { return u_ar531x_gpio_cr; } -static inline uint32_t ar531x_gpio_do(void) { return u_ar531x_gpio_do; } -static inline uint32_t ar531x_gpio_pins(void) { return u_ar531x_gpio_pins; } -static inline uint32_t ar531x_wdog_ctl(void) { return u_ar531x_wdog_ctl; } -static inline uint32_t ar531x_wdog_timer(void) { return u_ar531x_wdog_timer; } -#endif diff --git a/sys/mips/atheros/ar531x/ar5315_gpio.c b/sys/mips/atheros/ar531x/ar5315_gpio.c deleted file mode 100644 index 631d282fe30..00000000000 --- a/sys/mips/atheros/ar531x/ar5315_gpio.c +++ /dev/null @@ -1,530 +0,0 @@ -/*- - * Copyright (c) 2016, Hiroki Mori - * Copyright (c) 2009, Oleksandr Tymoshenko - * Copyright (c) 2009, Luiz Otavio O Souza. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * GPIO driver for AR5315 - */ - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "gpio_if.h" - -#define DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT) - -/* - * Helpers - */ -static void ar5315_gpio_function_enable(struct ar5315_gpio_softc *sc, - uint32_t mask); -static void ar5315_gpio_function_disable(struct ar5315_gpio_softc *sc, - uint32_t mask); -static void ar5315_gpio_pin_configure(struct ar5315_gpio_softc *sc, - struct gpio_pin *pin, uint32_t flags); - -/* - * Driver stuff - */ -static int ar5315_gpio_probe(device_t dev); -static int ar5315_gpio_attach(device_t dev); -static int ar5315_gpio_detach(device_t dev); -static int ar5315_gpio_filter(void *arg); -static void ar5315_gpio_intr(void *arg); - -/* - * GPIO interface - */ -static device_t ar5315_gpio_get_bus(device_t); -static int ar5315_gpio_pin_max(device_t dev, int *maxpin); -static int ar5315_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps); -static int ar5315_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t - *flags); -static int ar5315_gpio_pin_getname(device_t dev, uint32_t pin, char *name); -static int ar5315_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags); -static int ar5315_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value); -static int ar5315_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val); -static int ar5315_gpio_pin_toggle(device_t dev, uint32_t pin); - -/* - * Enable/disable the GPIO function control space. - * - * This is primarily for the AR5315, which has SPI CS1/CS2, UART, SLIC, I2S - * as GPIO pin options. - */ -static void -ar5315_gpio_function_enable(struct ar5315_gpio_softc *sc, uint32_t mask) -{ -// GPIO_SET_BITS(sc, AR5315_GPIO_FUNCTION, mask); -} - -static void -ar5315_gpio_function_disable(struct ar5315_gpio_softc *sc, uint32_t mask) -{ -// GPIO_CLEAR_BITS(sc, AR5315_GPIO_FUNCTION, mask); -} - -static void -ar5315_gpio_pin_configure(struct ar5315_gpio_softc *sc, struct gpio_pin *pin, - unsigned int flags) -{ - uint32_t mask; - - mask = 1 << pin->gp_pin; - - /* - * Manage input/output - */ - if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) { - pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT); - if (flags & GPIO_PIN_OUTPUT) { - pin->gp_flags |= GPIO_PIN_OUTPUT; - GPIO_SET_BITS(sc, ar531x_gpio_cr(), mask); - } - else { - pin->gp_flags |= GPIO_PIN_INPUT; - GPIO_CLEAR_BITS(sc, ar531x_gpio_cr(), mask); - } - } -} - -static device_t -ar5315_gpio_get_bus(device_t dev) -{ - struct ar5315_gpio_softc *sc; - - sc = device_get_softc(dev); - - return (sc->busdev); -} - -static int -ar5315_gpio_pin_max(device_t dev, int *maxpin) -{ - - *maxpin = ar531x_gpio_pins() - 1; - return (0); -} - -static int -ar5315_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) -{ - struct ar5315_gpio_softc *sc = device_get_softc(dev); - int i; - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - GPIO_LOCK(sc); - *caps = sc->gpio_pins[i].gp_caps; - GPIO_UNLOCK(sc); - - return (0); -} - -static int -ar5315_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) -{ - struct ar5315_gpio_softc *sc = device_get_softc(dev); - int i; - int dir; - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - dir = GPIO_READ(sc, ar531x_gpio_cr()) & (1 << pin); - - *flags = dir ? GPIO_PIN_OUTPUT : GPIO_PIN_INPUT; - -/* - GPIO_LOCK(sc); - *flags = sc->gpio_pins[i].gp_flags; - GPIO_UNLOCK(sc); -*/ - - return (0); -} - -static int -ar5315_gpio_pin_getname(device_t dev, uint32_t pin, char *name) -{ - struct ar5315_gpio_softc *sc = device_get_softc(dev); - int i; - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - GPIO_LOCK(sc); - memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME); - GPIO_UNLOCK(sc); - - return (0); -} - -static int -ar5315_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) -{ - int i; - struct ar5315_gpio_softc *sc = device_get_softc(dev); - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - ar5315_gpio_pin_configure(sc, &sc->gpio_pins[i], flags); - - return (0); -} - -static int -ar5315_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) -{ - struct ar5315_gpio_softc *sc = device_get_softc(dev); - uint32_t state; - - state = GPIO_READ(sc, ar531x_gpio_do()); - - if(value == 1) { - state |= (1 << pin); - } else { - state &= ~(1 << pin); - } - - GPIO_WRITE(sc, ar531x_gpio_do(), state); - - return (0); -} - -static int -ar5315_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) -{ - struct ar5315_gpio_softc *sc = device_get_softc(dev); - int i; - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - *val = (GPIO_READ(sc, ar531x_gpio_di()) & (1 << pin)) ? 1 : 0; - - return (0); -} - -static int -ar5315_gpio_pin_toggle(device_t dev, uint32_t pin) -{ - int res, i; - struct ar5315_gpio_softc *sc = device_get_softc(dev); - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - res = (GPIO_READ(sc, ar531x_gpio_do()) & (1 << pin)) ? 1 : 0; - if (res) - GPIO_CLEAR_BITS(sc, ar531x_gpio_do(), pin); - else - GPIO_SET_BITS(sc, ar531x_gpio_do(), pin); - - return (0); -} - -static int -ar5315_gpio_filter(void *arg) -{ - - /* TODO: something useful */ - return (FILTER_STRAY); -} - -static void -ar5315_gpio_intr(void *arg) -{ - struct ar5315_gpio_softc *sc = arg; - GPIO_LOCK(sc); - /* TODO: something useful */ - GPIO_UNLOCK(sc); -} - -static int -ar5315_gpio_probe(device_t dev) -{ - - device_set_desc(dev, "Atheros AR531x GPIO driver"); - return (0); -} - -static int -ar5315_gpio_attach(device_t dev) -{ - struct ar5315_gpio_softc *sc = device_get_softc(dev); - int i, j, maxpin; - int mask, pinon; - uint32_t oe; - - KASSERT((device_get_unit(dev) == 0), - ("ar5315_gpio: Only one gpio module supported")); - - mtx_init(&sc->gpio_mtx, device_get_nameunit(dev), NULL, MTX_DEF); - - /* Map control/status registers. */ - sc->gpio_mem_rid = 0; - sc->gpio_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->gpio_mem_rid, RF_ACTIVE); - - if (sc->gpio_mem_res == NULL) { - device_printf(dev, "couldn't map memory\n"); - ar5315_gpio_detach(dev); - return (ENXIO); - } - - if ((sc->gpio_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, - &sc->gpio_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) { - device_printf(dev, "unable to allocate IRQ resource\n"); - ar5315_gpio_detach(dev); - return (ENXIO); - } - - if ((bus_setup_intr(dev, sc->gpio_irq_res, INTR_TYPE_MISC, - ar5315_gpio_filter, ar5315_gpio_intr, sc, &sc->gpio_ih))) { - device_printf(dev, - "WARNING: unable to register interrupt handler\n"); - ar5315_gpio_detach(dev); - return (ENXIO); - } - - sc->dev = dev; - - /* Enable function bits that are required */ - if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "function_set", &mask) == 0) { - device_printf(dev, "function_set: 0x%x\n", mask); - ar5315_gpio_function_enable(sc, mask); - } - /* Disable function bits that are required */ - if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "function_clear", &mask) == 0) { - device_printf(dev, "function_clear: 0x%x\n", mask); - ar5315_gpio_function_disable(sc, mask); - } - - /* Initialise all pins specified in the mask, up to the pin count */ - (void) ar5315_gpio_pin_max(dev, &maxpin); - if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "pinmask", &mask) != 0) - mask = 0; - if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "pinon", &pinon) != 0) - pinon = 0; - device_printf(dev, "gpio pinmask=0x%x\n", mask); - for (j = 0; j <= maxpin; j++) { - if ((mask & (1 << j)) == 0) - continue; - sc->gpio_npins++; - } - - /* Iniatilize the GPIO pins, keep the loader settings. */ - oe = GPIO_READ(sc, ar531x_gpio_cr()); - sc->gpio_pins = malloc(sizeof(struct gpio_pin) * sc->gpio_npins, - M_DEVBUF, M_WAITOK | M_ZERO); - for (i = 0, j = 0; j <= maxpin; j++) { - if ((mask & (1 << j)) == 0) - continue; - snprintf(sc->gpio_pins[i].gp_name, GPIOMAXNAME, - "pin %d", j); - sc->gpio_pins[i].gp_pin = j; - sc->gpio_pins[i].gp_caps = DEFAULT_CAPS; - if (oe & (1 << j)) - sc->gpio_pins[i].gp_flags = GPIO_PIN_OUTPUT; - else - sc->gpio_pins[i].gp_flags = GPIO_PIN_INPUT; - i++; - } - -#if 0 - /* Turn on the hinted pins. */ - for (i = 0; i < sc->gpio_npins; i++) { - j = sc->gpio_pins[i].gp_pin; - if ((pinon & (1 << j)) != 0) { - ar5315_gpio_pin_setflags(dev, j, GPIO_PIN_OUTPUT); - ar5315_gpio_pin_set(dev, j, 1); - } - } - - /* - * Search through the function hints, in case there's some - * overrides such as LNA control. - * - * hint.gpio.X.func..gpiofunc= - * hint.gpio.X.func..gpiomode=1 (for output, default low) - */ - for (i = 0; i <= maxpin; i++) { - char buf[32]; - int gpiofunc, gpiomode; - - snprintf(buf, 32, "func.%d.gpiofunc", i); - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), - buf, - &gpiofunc) != 0) - continue; - /* Get the mode too */ - snprintf(buf, 32, "func.%d.gpiomode", i); - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), - buf, - &gpiomode) != 0) - continue; - - /* We only handle mode=1 for now */ - if (gpiomode != 1) - continue; - - device_printf(dev, "%s: GPIO %d: func=%d, mode=%d\n", - __func__, - i, - gpiofunc, - gpiomode); - - /* Set output (bit == 0) */ - oe = GPIO_READ(sc, ar531x_gpio_cr()); - oe &= ~ (1 << i); - GPIO_WRITE(sc, ar531x_gpio_cr(), oe); - - /* Set pin value = 0, so it stays low by default */ - oe = GPIO_READ(sc, ar531x_gpio_do()); - oe &= ~ (1 << i); - GPIO_WRITE(sc, ar531x_gpio_do(), oe); - - /* Finally: Set the output config */ -// ar5315_gpio_ouput_configure(i, gpiofunc); - } -#endif - - sc->busdev = gpiobus_attach_bus(dev); - if (sc->busdev == NULL) { - ar5315_gpio_detach(dev); - return (ENXIO); - } - - return (0); -} - -static int -ar5315_gpio_detach(device_t dev) -{ - struct ar5315_gpio_softc *sc = device_get_softc(dev); - - KASSERT(mtx_initialized(&sc->gpio_mtx), ("gpio mutex not initialized")); - - gpiobus_detach_bus(dev); - if (sc->gpio_ih) - bus_teardown_intr(dev, sc->gpio_irq_res, sc->gpio_ih); - if (sc->gpio_irq_res) - bus_release_resource(dev, SYS_RES_IRQ, sc->gpio_irq_rid, - sc->gpio_irq_res); - if (sc->gpio_mem_res) - bus_release_resource(dev, SYS_RES_MEMORY, sc->gpio_mem_rid, - sc->gpio_mem_res); - if (sc->gpio_pins) - free(sc->gpio_pins, M_DEVBUF); - mtx_destroy(&sc->gpio_mtx); - - return(0); -} - -static device_method_t ar5315_gpio_methods[] = { - DEVMETHOD(device_probe, ar5315_gpio_probe), - DEVMETHOD(device_attach, ar5315_gpio_attach), - DEVMETHOD(device_detach, ar5315_gpio_detach), - - /* GPIO protocol */ - DEVMETHOD(gpio_get_bus, ar5315_gpio_get_bus), - DEVMETHOD(gpio_pin_max, ar5315_gpio_pin_max), - DEVMETHOD(gpio_pin_getname, ar5315_gpio_pin_getname), - DEVMETHOD(gpio_pin_getflags, ar5315_gpio_pin_getflags), - DEVMETHOD(gpio_pin_getcaps, ar5315_gpio_pin_getcaps), - DEVMETHOD(gpio_pin_setflags, ar5315_gpio_pin_setflags), - DEVMETHOD(gpio_pin_get, ar5315_gpio_pin_get), - DEVMETHOD(gpio_pin_set, ar5315_gpio_pin_set), - DEVMETHOD(gpio_pin_toggle, ar5315_gpio_pin_toggle), - {0, 0}, -}; - -static driver_t ar5315_gpio_driver = { - "gpio", - ar5315_gpio_methods, - sizeof(struct ar5315_gpio_softc), -}; -static devclass_t ar5315_gpio_devclass; - -DRIVER_MODULE(ar5315_gpio, apb, ar5315_gpio_driver, ar5315_gpio_devclass, 0, 0); diff --git a/sys/mips/atheros/ar531x/ar5315_gpiovar.h b/sys/mips/atheros/ar531x/ar5315_gpiovar.h deleted file mode 100644 index d30af528855..00000000000 --- a/sys/mips/atheros/ar531x/ar5315_gpiovar.h +++ /dev/null @@ -1,73 +0,0 @@ -/*- - * Copyright (c) 2009, Oleksandr Tymoshenko - * Copyright (c) 2009, Luiz Otavio O Souza. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#ifndef __AR5315_GPIOVAR_H__ -#define __AR5315_GPIOVAR_H__ - -#include - -#define GPIO_LOCK(_sc) mtx_lock(&(_sc)->gpio_mtx) -#define GPIO_UNLOCK(_sc) mtx_unlock(&(_sc)->gpio_mtx) -#define GPIO_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->gpio_mtx, MA_OWNED) - -/* - * register space access macros - */ -#define GPIO_WRITE(sc, reg, val) do { \ - bus_write_4(sc->gpio_mem_res, (reg), (val)); \ - } while (0) - -#define GPIO_READ(sc, reg) bus_read_4(sc->gpio_mem_res, (reg)) - -#define GPIO_SET_BITS(sc, reg, bits) \ - GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg)) | (bits)) - -#define GPIO_CLEAR_BITS(sc, reg, bits) \ - GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg)) & ~(bits)) - -#define AR5315_GPIO_PINS 23 -#define AR5312_GPIO_PINS 8 - -struct ar5315_gpio_softc { - device_t dev; - device_t busdev; - struct mtx gpio_mtx; - struct resource *gpio_mem_res; - int gpio_mem_rid; - struct resource *gpio_irq_res; - int gpio_irq_rid; - void *gpio_ih; - int gpio_npins; - struct gpio_pin *gpio_pins; - int gpio_ppspin; - struct pps_state gpio_pps; - uint32_t gpio_ppsenable; -}; - -#endif /* __AR5315_GPIOVAR_H__ */ diff --git a/sys/mips/atheros/ar531x/ar5315_machdep.c b/sys/mips/atheros/ar531x/ar5315_machdep.c deleted file mode 100644 index d9a14f2f015..00000000000 --- a/sys/mips/atheros/ar531x/ar5315_machdep.c +++ /dev/null @@ -1,321 +0,0 @@ -/*- - * Copyright (c) 2016, Hiroki Mori - * Copyright (c) 2009 Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" -#include "opt_ar531x.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -extern char edata[], end[]; - -uint32_t ar711_base_mac[ETHER_ADDR_LEN]; -/* 4KB static data aread to keep a copy of the bootload env until - the dynamic kenv is setup */ -char boot1_env[4096]; - -void -platform_cpu_init() -{ - /* Nothing special */ -} - -void -platform_reset(void) -{ - ar531x_device_reset(); - /* Wait for reset */ - while(1) - ; -} - -/* - * Obtain the MAC address via the Redboot environment. - */ -static void -ar5315_redboot_get_macaddr(void) -{ - char *var; - int count = 0; - - /* - * "ethaddr" is passed via envp on RedBoot platforms - * "kmac" is passed via argv on RouterBOOT platforms - */ - if ((var = kern_getenv("ethaddr")) != NULL || - (var = kern_getenv("kmac")) != NULL) { - count = sscanf(var, "%x%*c%x%*c%x%*c%x%*c%x%*c%x", - &ar711_base_mac[0], &ar711_base_mac[1], - &ar711_base_mac[2], &ar711_base_mac[3], - &ar711_base_mac[4], &ar711_base_mac[5]); - if (count < 6) - memset(ar711_base_mac, 0, - sizeof(ar711_base_mac)); - freeenv(var); - } -} - -#if defined(SOC_VENDOR) || defined(SOC_MODEL) || defined(SOC_REV) -static SYSCTL_NODE(_hw, OID_AUTO, soc, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, - "System on Chip information"); -#endif -#if defined(SOC_VENDOR) -static char hw_soc_vendor[] = SOC_VENDOR; -SYSCTL_STRING(_hw_soc, OID_AUTO, vendor, CTLFLAG_RD, hw_soc_vendor, 0, - "SoC vendor"); -#endif -#if defined(SOC_MODEL) -static char hw_soc_model[] = SOC_MODEL; -SYSCTL_STRING(_hw_soc, OID_AUTO, model, CTLFLAG_RD, hw_soc_model, 0, - "SoC model"); -#endif -#if defined(SOC_REV) -static char hw_soc_revision[] = SOC_REV; -SYSCTL_STRING(_hw_soc, OID_AUTO, revision, CTLFLAG_RD, hw_soc_revision, 0, - "SoC revision"); -#endif - -#if defined(DEVICE_VENDOR) || defined(DEVICE_MODEL) || defined(DEVICE_REV) -static SYSCTL_NODE(_hw, OID_AUTO, device, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, - "Board information"); -#endif -#if defined(DEVICE_VENDOR) -static char hw_device_vendor[] = DEVICE_VENDOR; -SYSCTL_STRING(_hw_device, OID_AUTO, vendor, CTLFLAG_RD, hw_device_vendor, 0, - "Board vendor"); -#endif -#if defined(DEVICE_MODEL) -static char hw_device_model[] = DEVICE_MODEL; -SYSCTL_STRING(_hw_device, OID_AUTO, model, CTLFLAG_RD, hw_device_model, 0, - "Board model"); -#endif -#if defined(DEVICE_REV) -static char hw_device_revision[] = DEVICE_REV; -SYSCTL_STRING(_hw_device, OID_AUTO, revision, CTLFLAG_RD, hw_device_revision, 0, - "Board revision"); -#endif - -void -platform_start(__register_t a0 __unused, __register_t a1 __unused, - __register_t a2 __unused, __register_t a3 __unused) -{ - uint64_t platform_counter_freq; - int argc = 0, i; - char **argv = NULL; -#ifndef AR531X_ENV_UBOOT - char **envp = NULL; -#endif - vm_offset_t kernend; - - /* - * clear the BSS and SBSS segments, this should be first call in - * the function - */ - kernend = (vm_offset_t)&end; - memset(&edata, 0, kernend - (vm_offset_t)(&edata)); - - mips_postboot_fixup(); - - /* Initialize pcpu stuff */ - mips_pcpu0_init(); - - /* - * Until some more sensible abstractions for uboot/redboot - * environment handling, we have to make this a compile-time - * hack. The existing code handles the uboot environment - * very incorrectly so we should just ignore initialising - * the relevant pointers. - */ -#ifndef AR531X_ENV_UBOOT - argc = a0; - argv = (char**)a1; - envp = (char**)a2; -#endif - /* - * Protect ourselves from garbage in registers - */ - if (MIPS_IS_VALID_PTR(envp)) { - for (i = 0; envp[i]; i += 2) { - if (strcmp(envp[i], "memsize") == 0) - realmem = btoc(strtoul(envp[i+1], NULL, 16)); - } - } - - ar5315_detect_sys_type(); - -// RedBoot SDRAM Detect is missing -// ar531x_detect_mem_size(); - - /* - * Just wild guess. RedBoot let us down and didn't reported - * memory size - */ - if (realmem == 0) - realmem = btoc(16*1024*1024); - - /* - * Allow build-time override in case Redboot lies - * or in other situations (eg where there's u-boot) - * where there isn't (yet) a convienent method of - * being told how much RAM is available. - * - * This happens on at least the Ubiquiti LS-SR71A - * board, where redboot says there's 16mb of RAM - * but in fact there's 32mb. - */ -#if defined(AR531X_REALMEM) - realmem = btoc(AR531X_REALMEM); -#endif - - /* phys_avail regions are in bytes */ - phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end); - phys_avail[1] = ctob(realmem); - - dump_avail[0] = phys_avail[0]; - dump_avail[1] = phys_avail[1] - phys_avail[0]; - - physmem = realmem; - - /* - * ns8250 uart code uses DELAY so ticker should be inititalized - * before cninit. And tick_init_params refers to hz, so * init_param1 - * should be called first. - */ - init_param1(); - boothowto |= (RB_SERIAL | RB_MULTIPLE); /* Use multiple consoles */ -// boothowto |= RB_VERBOSE; -// boothowto |= (RB_SINGLE); - - /* Detect the system type - this is needed for subsequent chipset-specific calls */ - - ar531x_device_soc_init(); - ar531x_detect_sys_frequency(); - - platform_counter_freq = ar531x_cpu_freq(); - mips_timer_init_params(platform_counter_freq, 1); - cninit(); - init_static_kenv(boot1_env, sizeof(boot1_env)); - - printf("CPU platform: %s\n", ar5315_get_system_type()); - printf("CPU Frequency=%d MHz\n", ar531x_cpu_freq() / 1000000); - printf("CPU DDR Frequency=%d MHz\n", ar531x_ddr_freq() / 1000000); - printf("CPU AHB Frequency=%d MHz\n", ar531x_ahb_freq() / 1000000); - - printf("platform frequency: %lld\n", platform_counter_freq); - printf("arguments: \n"); - printf(" a0 = %08x\n", a0); - printf(" a1 = %08x\n", a1); - printf(" a2 = %08x\n", a2); - printf(" a3 = %08x\n", a3); - - strcpy(cpu_model, ar5315_get_system_type()); - - /* - * XXX this code is very redboot specific. - */ - printf("Cmd line:"); - if (MIPS_IS_VALID_PTR(argv)) { - for (i = 0; i < argc; i++) { - printf(" %s", argv[i]); - boothowto |= boot_parse_arg(argv[i]); - } - } - else - printf ("argv is invalid"); - printf("\n"); - - printf("Environment:\n"); -#if 0 - if (MIPS_IS_VALID_PTR(envp)) { - if (envp[0] && strchr(envp[0], '=') ) { - char *env_val; // - for (i = 0; envp[i]; i++) { - env_val = strchr(envp[i], '='); - /* Not sure if we correct to change data, but env in RAM */ - *(env_val++) = '\0'; - printf("= %s = %s\n", envp[i], env_val); - kern_setenv(envp[i], env_val); - } - } else { - for (i = 0; envp[i]; i+=2) { - printf(" %s = %s\n", envp[i], envp[i+1]); - kern_setenv(envp[i], envp[i+1]); - } - } - } - else - printf ("envp is invalid\n"); -#else - printf ("envp skiped\n"); -#endif - - /* Redboot if_are MAC address is in the environment */ - ar5315_redboot_get_macaddr(); - - init_param2(physmem); - mips_cpu_init(); - pmap_bootstrap(); - mips_proc0_init(); - mutex_init(); - - ar531x_device_start(); - - kdb_init(); -#ifdef KDB - if (boothowto & RB_KDB) - kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); -#endif - -} diff --git a/sys/mips/atheros/ar531x/ar5315_setup.c b/sys/mips/atheros/ar531x/ar5315_setup.c deleted file mode 100644 index 47784013d9d..00000000000 --- a/sys/mips/atheros/ar531x/ar5315_setup.c +++ /dev/null @@ -1,158 +0,0 @@ -/*- - * Copyright (c) 2016, Hiroki Mori - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" -#include "opt_ar531x.h" - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include -#include -#include -#include - -#include - -#define AR5315_SYS_TYPE_LEN 128 - -static char ar5315_sys_type[AR5315_SYS_TYPE_LEN]; -enum ar531x_soc_type ar531x_soc; -struct ar5315_cpu_def * ar5315_cpu_ops = NULL; - -void -ar5315_detect_sys_type(void) -{ - char *chip = "????"; - uint32_t ver = 0; - uint32_t rev = 0; -#if 0 - const uint8_t *ptr, *end; - static const struct ar531x_boarddata *board = NULL; - - ptr = (const uint8_t *) MIPS_PHYS_TO_KSEG1(AR5315_CONFIG_END - - 0x1000); - - end = (const uint8_t *)AR5315_CONFIG_BASE; - - for (; ptr > end; ptr -= 0x1000) { - if (*(const uint32_t *)ptr == AR531X_BD_MAGIC) { - board = (const struct ar531x_boarddata *) ptr; - rev = board->major; - break; - } - } -#endif - int soctype; - -#ifdef AR531X_1ST_GENERATION - soctype = AR_FIRST_GEN; -#else - soctype = AR_SECOND_GEN; -#endif - - if(soctype == AR_SECOND_GEN) { - ar5315_cpu_ops = &ar5315_chip_def; - - ver = ATH_READ_REG(AR5315_SYSREG_BASE + - AR5315_SYSREG_SREV); - - switch (ver) { - case 0x86: - ar531x_soc = AR531X_SOC_AR5315; - chip = "2315"; - break; - case 0x87: - ar531x_soc = AR531X_SOC_AR5316; - chip = "2316"; - break; - case 0x90: - ar531x_soc = AR531X_SOC_AR5317; - chip = "2317"; - break; - case 0x91: - ar531x_soc = AR531X_SOC_AR5318; - chip = "2318"; - break; - } - } else { - ar5315_cpu_ops = &ar5312_chip_def; - - ver = ATH_READ_REG(AR5312_SYSREG_BASE + - AR5312_SYSREG_REVISION); - rev = AR5312_REVISION_MINOR(ver); - - switch (AR5312_REVISION_MAJOR(ver)) { - case AR5312_REVISION_MAJ_AR5311: - ar531x_soc = AR531X_SOC_AR5311; - chip = "5311"; - break; - case AR5312_REVISION_MAJ_AR5312: - ar531x_soc = AR531X_SOC_AR5312; - chip = "5312"; - break; - case AR5312_REVISION_MAJ_AR2313: - ar531x_soc = AR531X_SOC_AR5313; - chip = "2313"; - break; - } - } - - sprintf(ar5315_sys_type, "Atheros AR%s rev %u", chip, rev); -} - -const char * -ar5315_get_system_type(void) -{ - return ar5315_sys_type; -} diff --git a/sys/mips/atheros/ar531x/ar5315_setup.h b/sys/mips/atheros/ar531x/ar5315_setup.h deleted file mode 100644 index b06edbf186d..00000000000 --- a/sys/mips/atheros/ar531x/ar5315_setup.h +++ /dev/null @@ -1,50 +0,0 @@ -/*- - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef __AR5315_SETUP_H__ -#define __AR5315_SETUP_H__ - -enum ar531x_soc_type { - AR531X_SOC_UNKNOWN, - AR531X_SOC_AR5311, - AR531X_SOC_AR5312, - AR531X_SOC_AR5313, - AR531X_SOC_AR5314, - AR531X_SOC_AR5315, - AR531X_SOC_AR5316, - AR531X_SOC_AR5317, - AR531X_SOC_AR5318, -}; -extern enum ar531x_soc_type ar531x_soc; - -extern void ar5315_detect_sys_type(void); -extern const char *ar5315_get_system_type(void); - -#define AR_FIRST_GEN 1 -#define AR_SECOND_GEN 2 - -#endif diff --git a/sys/mips/atheros/ar531x/ar5315_spi.c b/sys/mips/atheros/ar531x/ar5315_spi.c deleted file mode 100644 index 49d4c74ce6a..00000000000 --- a/sys/mips/atheros/ar531x/ar5315_spi.c +++ /dev/null @@ -1,288 +0,0 @@ -/*- - * Copyright (c) 2016, Hiroki Mori - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include -#include -#include "spibus_if.h" - -#include -#include - -#undef AR531X_SPI_DEBUG -#ifdef AR531X_SPI_DEBUG -#define dprintf printf -#else -#define dprintf(x, arg...) -#endif - -/* - * register space access macros - */ -#define SPI_WRITE(sc, reg, val) do { \ - bus_write_4(sc->sc_mem_res, (reg), (val)); \ - } while (0) - -#define SPI_READ(sc, reg) bus_read_4(sc->sc_mem_res, (reg)) - -#define SPI_SET_BITS(sc, reg, bits) \ - SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) | (bits)) - -#define SPI_CLEAR_BITS(sc, reg, bits) \ - SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) & ~(bits)) - -struct ar5315_spi_softc { - device_t sc_dev; - struct resource *sc_mem_res; - uint32_t sc_reg_ctrl; - uint32_t sc_debug; -}; - -static void -ar5315_spi_attach_sysctl(device_t dev) -{ - struct ar5315_spi_softc *sc; - struct sysctl_ctx_list *ctx; - struct sysctl_oid *tree; - - sc = device_get_softc(dev); - ctx = device_get_sysctl_ctx(dev); - tree = device_get_sysctl_tree(dev); - - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "debug", CTLFLAG_RW, &sc->sc_debug, 0, - "ar5315_spi debugging flags"); -} - -static int -ar5315_spi_probe(device_t dev) -{ - device_set_desc(dev, "AR5315 SPI"); - return (0); -} - -static int -ar5315_spi_attach(device_t dev) -{ - struct ar5315_spi_softc *sc = device_get_softc(dev); - int rid; - - sc->sc_dev = dev; - rid = 0; - sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (!sc->sc_mem_res) { - device_printf(dev, "Could not map memory\n"); - return (ENXIO); - } - - device_add_child(dev, "spibus", -1); - ar5315_spi_attach_sysctl(dev); - - return (bus_generic_attach(dev)); -} - -static void -ar5315_spi_chip_activate(struct ar5315_spi_softc *sc, int cs) -{ -} - -static void -ar5315_spi_chip_deactivate(struct ar5315_spi_softc *sc, int cs) -{ -} - -static int -ar5315_spi_get_block(off_t offset, caddr_t data, off_t count) -{ - int i; - for(i = 0; i < count / 4; ++i) { - *((uint32_t *)data + i) = ATH_READ_REG(AR5315_MEM1_BASE + offset + i * 4); - } -// printf("ar5315_spi_get_blockr: %x %x %x\n", -// (int)offset, (int)count, *(uint32_t *)data); - return (0); -} - -static int -ar5315_spi_transfer(device_t dev, device_t child, struct spi_command *cmd) -{ - struct ar5315_spi_softc *sc; - uint8_t *buf_in, *buf_out; - int lin, lout; - uint32_t ctl, cnt, op, rdat, cs; - int i, j; - - sc = device_get_softc(dev); - - if (sc->sc_debug & 0x8000) - printf("ar5315_spi_transfer: CMD "); - - spibus_get_cs(child, &cs); - - cs &= ~SPIBUS_CS_HIGH; - - /* Open SPI controller interface */ - ar5315_spi_chip_activate(sc, cs); - - do { - ctl = SPI_READ(sc, ARSPI_REG_CTL); - } while (ctl & ARSPI_CTL_BUSY); - - /* - * Transfer command - */ - buf_out = (uint8_t *)cmd->tx_cmd; - op = buf_out[0]; - if(op == 0x0b) { - int offset = buf_out[1] << 16 | buf_out[2] << 8 | buf_out[3]; - ar5315_spi_get_block(offset, cmd->rx_data, cmd->rx_data_sz); - return (0); - } - do { - ctl = SPI_READ(sc, ARSPI_REG_CTL); - } while (ctl & ARSPI_CTL_BUSY); - if (sc->sc_debug & 0x8000) { - printf("%08x ", op); - printf("tx_cmd_sz=%d rx_cmd_sz=%d ", cmd->tx_cmd_sz, - cmd->rx_cmd_sz); - if(cmd->tx_cmd_sz != 1) { - printf("%08x ", *((uint32_t *)cmd->tx_cmd)); - printf("%08x ", *((uint32_t *)cmd->tx_cmd + 1)); - } - } - SPI_WRITE(sc, ARSPI_REG_OPCODE, op); - - /* clear all of the tx and rx bits */ - ctl &= ~(ARSPI_CTL_TXCNT_MASK | ARSPI_CTL_RXCNT_MASK); - - /* now set txcnt */ - cnt = 1; - - ctl |= (cnt << ARSPI_CTL_TXCNT_SHIFT); - - cnt = 24; - /* now set txcnt */ - if(cmd->rx_cmd_sz < 24) - cnt = cmd->rx_cmd_sz; - ctl |= (cnt << ARSPI_CTL_RXCNT_SHIFT); - - ctl |= ARSPI_CTL_START; - - SPI_WRITE(sc, ARSPI_REG_CTL, ctl); - - if(op == 0x0b) - SPI_WRITE(sc, ARSPI_REG_DATA, 0); - if (sc->sc_debug & 0x8000) - printf("\nDATA "); - /* - * Receive/transmit data (depends on command) - */ -// buf_out = (uint8_t *)cmd->tx_data; - buf_in = (uint8_t *)cmd->rx_cmd; -// lout = cmd->tx_data_sz; - lin = cmd->rx_cmd_sz; - if (sc->sc_debug & 0x8000) - printf("t%d r%d ", lout, lin); - for(i = 0; i <= (cnt - 1) / 4; ++i) { - do { - ctl = SPI_READ(sc, ARSPI_REG_CTL); - } while (ctl & ARSPI_CTL_BUSY); - - rdat = SPI_READ(sc, ARSPI_REG_DATA); - if (sc->sc_debug & 0x8000) - printf("I%08x ", rdat); - - for(j = 0; j < 4; ++j) { - buf_in[i * 4 + j + 1] = 0xff & (rdat >> (8 * j)); - if(i * 4 + j + 2 == cnt) - break; - } - } - - ar5315_spi_chip_deactivate(sc, cs); - /* - * Close SPI controller interface, restore flash memory mapped access. - */ - if (sc->sc_debug & 0x8000) - printf("\n"); - - return (0); -} - -static int -ar5315_spi_detach(device_t dev) -{ - struct ar5315_spi_softc *sc = device_get_softc(dev); - - if (sc->sc_mem_res) - bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); - - return (0); -} - -static device_method_t ar5315_spi_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ar5315_spi_probe), - DEVMETHOD(device_attach, ar5315_spi_attach), - DEVMETHOD(device_detach, ar5315_spi_detach), - - DEVMETHOD(spibus_transfer, ar5315_spi_transfer), -// DEVMETHOD(spibus_get_block, ar5315_spi_get_block), - - DEVMETHOD_END -}; - -static driver_t ar5315_spi_driver = { - "spi", - ar5315_spi_methods, - sizeof(struct ar5315_spi_softc), -}; - -static devclass_t ar5315_spi_devclass; - -DRIVER_MODULE(ar5315_spi, nexus, ar5315_spi_driver, ar5315_spi_devclass, 0, 0); diff --git a/sys/mips/atheros/ar531x/ar5315_wdog.c b/sys/mips/atheros/ar531x/ar5315_wdog.c deleted file mode 100644 index 1c1d9d92287..00000000000 --- a/sys/mips/atheros/ar531x/ar5315_wdog.c +++ /dev/null @@ -1,148 +0,0 @@ -/*- - * Copyright (c) 2016, Hiroki Mori - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Watchdog driver for AR5315 - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -struct ar5315_wdog_softc { - device_t dev; - int armed; - int reboot_from_watchdog; - int debug; -}; - -static void -ar5315_wdog_watchdog_fn(void *private, u_int cmd, int *error) -{ - struct ar5315_wdog_softc *sc = private; - uint64_t timer_val; - - cmd &= WD_INTERVAL; - if (sc->debug) - device_printf(sc->dev, "ar5315_wdog_watchdog_fn: cmd: %x\n", cmd); - if (cmd > 0) { - timer_val = (uint64_t)(1ULL << cmd) * ar531x_ahb_freq() / - 1000000000; - if (sc->debug) - device_printf(sc->dev, "ar5315_wdog_watchdog_fn: programming timer: %jx\n", (uintmax_t) timer_val); - /* - * Load timer with large enough value to prevent spurious - * reset - */ - ATH_WRITE_REG(ar531x_wdog_timer(), - ar531x_ahb_freq() * 10); - ATH_WRITE_REG(ar531x_wdog_ctl(), - AR5315_WDOG_CTL_RESET); - ATH_WRITE_REG(ar531x_wdog_timer(), - (timer_val & 0xffffffff)); - sc->armed = 1; - *error = 0; - } else { - if (sc->debug) - device_printf(sc->dev, "ar5315_wdog_watchdog_fn: disarming\n"); - if (sc->armed) { - ATH_WRITE_REG(ar531x_wdog_ctl(), - AR5315_WDOG_CTL_IGNORE); - sc->armed = 0; - } - } -} - -static int -ar5315_wdog_probe(device_t dev) -{ - - device_set_desc(dev, "Atheros AR531x watchdog timer"); - return (0); -} - -static void -ar5315_wdog_sysctl(device_t dev) -{ - struct ar5315_wdog_softc *sc = device_get_softc(dev); - - struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); - struct sysctl_oid *tree = device_get_sysctl_tree(sc->dev); - - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "debug", CTLFLAG_RW, &sc->debug, 0, - "enable watchdog debugging"); - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "armed", CTLFLAG_RD, &sc->armed, 0, - "whether the watchdog is armed"); - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "reboot_from_watchdog", CTLFLAG_RD, &sc->reboot_from_watchdog, 0, - "whether the system rebooted from the watchdog"); -} - -static int -ar5315_wdog_attach(device_t dev) -{ - struct ar5315_wdog_softc *sc = device_get_softc(dev); - - /* Initialise */ - sc->reboot_from_watchdog = 0; - sc->armed = 0; - sc->debug = 0; - ATH_WRITE_REG(ar531x_wdog_ctl(), AR5315_WDOG_CTL_IGNORE); - - sc->dev = dev; - EVENTHANDLER_REGISTER(watchdog_list, ar5315_wdog_watchdog_fn, sc, 0); - ar5315_wdog_sysctl(dev); - - return (0); -} - -static device_method_t ar5315_wdog_methods[] = { - DEVMETHOD(device_probe, ar5315_wdog_probe), - DEVMETHOD(device_attach, ar5315_wdog_attach), - DEVMETHOD_END -}; - -static driver_t ar5315_wdog_driver = { - "ar5315_wdog", - ar5315_wdog_methods, - sizeof(struct ar5315_wdog_softc), -}; -static devclass_t ar5315_wdog_devclass; - -DRIVER_MODULE(ar5315_wdog, apb, ar5315_wdog_driver, ar5315_wdog_devclass, 0, 0); diff --git a/sys/mips/atheros/ar531x/ar5315reg.h b/sys/mips/atheros/ar531x/ar5315reg.h deleted file mode 100644 index 42b3074c63a..00000000000 --- a/sys/mips/atheros/ar531x/ar5315reg.h +++ /dev/null @@ -1,242 +0,0 @@ -/* $Id: ar5315reg.h,v 1.3 2011/07/07 05:06:44 matt Exp $ */ -/* - * Copyright (c) 2006 Urbana-Champaign Independent Media Center. - * Copyright (c) 2006 Garrett D'Amore. - * All rights reserved. - * - * This code was written by Garrett D'Amore for the Champaign-Urbana - * Community Wireless Network Project. - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * 3. All advertising materials mentioning features or use of this - * software must display the following acknowledgements: - * This product includes software developed by the Urbana-Champaign - * Independent Media Center. - * This product includes software developed by Garrett D'Amore. - * 4. Urbana-Champaign Independent Media Center's name and Garrett - * D'Amore's name may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT - * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT - * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MIPS_ATHEROS_AR5315REG_H_ -#define _MIPS_ATHEROS_AR5315REG_H_ - -#define AR5315_MEM0_BASE 0x00000000 /* sdram */ -#define AR5315_MEM1_BASE 0x08000000 /* spi flash */ -#define AR5315_WLAN_BASE 0x10000000 -#define AR5315_PCI_BASE 0x10100000 -#define AR5315_SDRAMCTL_BASE 0x10300000 -#define AR5315_LOCAL_BASE 0x10400000 /* local bus */ -#define AR5315_ENET_BASE 0x10500000 -#define AR5315_SYSREG_BASE 0x11000000 -#define AR5315_UART_BASE 0x11100000 -#define AR5315_SPI_BASE 0x11300000 /* spi flash */ -#define AR5315_BOOTROM_BASE 0x1FC00000 /* boot rom */ -#define AR5315_CONFIG_BASE 0x087D0000 /* flash start */ -#define AR5315_CONFIG_END 0x087FF000 /* flash end */ -#define AR5315_RADIO_END 0x1FFFF000 /* radio end */ - -#if 0 -#define AR5315_PCIEXT_BASE 0x80000000 /* pci external */ -#define AR5315_RAM2_BASE 0xc0000000 -#define AR5315_RAM3_BASE 0xe0000000 -#endif - -/* - * SYSREG registers -- offset relative to AR531X_SYSREG_BASE - */ -#define AR5315_SYSREG_COLDRESET 0x0000 -#define AR5315_SYSREG_RESETCTL 0x0004 -#define AR5315_SYSREG_AHB_ARB_CTL 0x0008 -#define AR5315_SYSREG_ENDIAN 0x000c -#define AR5315_SYSREG_NMI_CTL 0x0010 -#define AR5315_SYSREG_SREV 0x0014 -#define AR5315_SYSREG_IF_CTL 0x0018 -#define AR5315_SYSREG_MISC_INTSTAT 0x0020 -#define AR5315_SYSREG_MISC_INTMASK 0x0024 -#define AR5315_SYSREG_GISR 0x0028 -#define AR5315_SYSREG_TIMER 0x0030 -#define AR5315_SYSREG_RELOAD 0x0034 -#define AR5315_SYSREG_WDOG_TIMER 0x0038 -#define AR5315_SYSREG_WDOG_CTL 0x003c -#define AR5315_SYSREG_PERFCNT0 0x0048 -#define AR5315_SYSREG_PERFCNT1 0x004c -#define AR5315_SYSREG_AHB_ERR0 0x0050 -#define AR5315_SYSREG_AHB_ERR1 0x0054 -#define AR5315_SYSREG_AHB_ERR2 0x0058 -#define AR5315_SYSREG_AHB_ERR3 0x005c -#define AR5315_SYSREG_AHB_ERR4 0x0060 -#define AR5315_SYSREG_PLLC_CTL 0x0064 -#define AR5315_SYSREG_PLLV_CTL 0x0068 -#define AR5315_SYSREG_CPUCLK 0x006c -#define AR5315_SYSREG_AMBACLK 0x0070 -#define AR5315_SYSREG_SYNCCLK 0x0074 -#define AR5315_SYSREG_DSL_SLEEP_CTL 0x0080 -#define AR5315_SYSREG_DSL_SLEEP_DUR 0x0084 -#define AR5315_SYSREG_GPIO_DI 0x0088 -#define AR5315_SYSREG_GPIO_DO 0x0090 -#define AR5315_SYSREG_GPIO_CR 0x0098 -#define AR5315_SYSREG_GPIO_INT 0x00a0 - -#define AR5315_GPIO_PINS 23 - -/* Cold resets (AR5315_SYSREG_COLDRESET) */ -#define AR5315_COLD_AHB 0x00000001 -#define AR5315_COLD_APB 0x00000002 -#define AR5315_COLD_CPU 0x00000004 -#define AR5315_COLD_CPU_WARM 0x00000008 - -/* Resets (AR5315_SYSREG_RESETCTL) */ -#define AR5315_RESET_WARM_WLAN0_MAC 0x00000001 -#define AR5315_RESET_WARM_WLAN0_BB 0x00000002 -#define AR5315_RESET_MPEGTS 0x00000004 /* MPEG-TS */ -#define AR5315_RESET_PCIDMA 0x00000008 /* PCI dma */ -#define AR5315_RESET_MEMCTL 0x00000010 -#define AR5315_RESET_LOCAL 0x00000020 /* local bus */ -#define AR5315_RESET_I2C 0x00000040 /* i2c */ -#define AR5315_RESET_SPI 0x00000080 /* SPI */ -#define AR5315_RESET_UART 0x00000100 -#define AR5315_RESET_IR 0x00000200 /* infrared */ -#define AR5315_RESET_PHY0 0x00000400 /* enet phy */ -#define AR5315_RESET_ENET0 0x00000800 - -/* Watchdog control (AR5315_SYSREG_WDOG_CTL) */ -#define AR5315_WDOG_CTL_IGNORE 0x0000 -#define AR5315_WDOG_CTL_NMI 0x0001 -#define AR5315_WDOG_CTL_RESET 0x0002 - -/* AR5315 AHB arbitration control (AR5315_SYSREG_AHB_ARB_CTL) */ -#define AR5315_ARB_CPU 0x00001 -#define AR5315_ARB_WLAN 0x00002 -#define AR5315_ARB_MPEGTS 0x00004 -#define AR5315_ARB_LOCAL 0x00008 -#define AR5315_ARB_PCI 0x00010 -#define AR5315_ARB_ENET 0x00020 -#define AR5315_ARB_RETRY 0x00100 - -/* AR5315 endianness control (AR5315_SYSREG_ENDIAN) */ -#define AR5315_ENDIAN_AHB 0x00001 -#define AR5315_ENDIAN_WLAN 0x00002 -#define AR5315_ENDIAN_MPEGTS 0x00004 -#define AR5315_ENDIAN_PCI 0x00008 -#define AR5315_ENDIAN_MEMCTL 0x00010 -#define AR5315_ENDIAN_LOCAL 0x00020 -#define AR5315_ENDIAN_ENET 0x00040 -#define AR5315_ENDIAN_MERGE 0x00200 -#define AR5315_ENDIAN_CPU 0x00400 -#define AR5315_ENDIAN_PCIAHB 0x00800 -#define AR5315_ENDIAN_PCIAHB_BRIDGE 0x01000 -#define AR5315_ENDIAN_SPI 0x08000 -#define AR5315_ENDIAN_CPU_DRAM 0x10000 -#define AR5315_ENDIAN_CPU_PCI 0x20000 -#define AR5315_ENDIAN_CPU_MMR 0x40000 - -/* AR5315 AHB error bits */ -#define AR5315_AHB_ERROR_DET 1 /* error detected */ -#define AR5315_AHB_ERROR_OVR 2 /* AHB overflow */ -#define AR5315_AHB_ERROR_WDT 4 /* wdt (not hresp) */ - -/* AR5315 clocks */ -#define AR5315_PLLC_REF_DIV(reg) ((reg) & 0x3) -#define AR5315_PLLC_FB_DIV(reg) (((reg) & 0x7c) >> 2) -#define AR5315_PLLC_DIV_2(reg) (((reg) & 0x80) >> 7) -#define AR5315_PLLC_CLKC(reg) (((reg) & 0x1c000) >> 14) -#define AR5315_PLLC_CLKM(reg) (((reg) & 0x700000) >> 20) - -#define AR5315_CLOCKCTL_SELECT(reg) ((reg) & 0x3) -#define AR5315_CLOCKCTL_DIV(reg) (((reg) & 0xc) >> 2) - -/* - * SDRAMCTL registers -- offset relative to SDRAMCTL - */ -#define AR5315_SDRAMCTL_MEM_CFG 0x0000 -#define AR5315_MEM_CFG_DATA_WIDTH __BITS(13,14) -#define AR5315_MEM_CFG_COL_WIDTH __BITS(9,12) -#define AR5315_MEM_CFG_ROW_WIDTH __BITS(5,8) - -/* memory config 1 bits */ -#define AR531X_MEM_CFG1_BANK0 __BITS(8,10) -#define AR531X_MEM_CFG1_BANK1 __BITS(12,14) - -/* - * PCI configuration stuff. I don't pretend to fully understand these - * registers, they seem to be magic numbers in the Linux code. - */ -#define AR5315_PCI_MAC_RC 0x4000 -#define AR5315_PCI_MAC_SCR 0x4004 -#define AR5315_PCI_MAC_INTPEND 0x4008 -#define AR5315_PCI_MAC_SFR 0x400c -#define AR5315_PCI_MAC_PCICFG 0x4010 -#define AR5315_PCI_MAC_SREV 0x4020 - -#define PCI_MAC_RC_MAC 0x1 -#define PCI_MAC_RC_BB 0x2 - -#define PCI_MAC_SCR_SLM_MASK 0x00030000 -#define PCI_MAC_SCR_SLM_FWAKE 0x00000000 -#define PCI_MAC_SCR_SLM_FSLEEP 0x00010000 -#define PCI_MAC_SCR_SLM_NORMAL 0x00020000 - -#define PCI_MAC_PCICFG_SPWR_DN 0x00010000 - -/* IRQS */ -#define AR5315_CPU_IRQ_MISC 0 -#define AR5315_CPU_IRQ_WLAN 1 -#define AR5315_CPU_IRQ_ENET 2 - -#define AR5315_MISC_IRQ_UART 0 -#define AR5315_MISC_IRQ_I2C 1 -#define AR5315_MISC_IRQ_SPI 2 -#define AR5315_MISC_IRQ_AHBE 3 -#define AR5315_MISC_IRQ_AHPE 4 -#define AR5315_MISC_IRQ_TIMER 5 -#define AR5315_MISC_IRQ_GPIO 6 -#define AR5315_MISC_IRQ_WDOG 7 -#define AR5315_MISC_IRQ_IR 8 - -#define AR5315_APB_BASE AR5315_SYSREG_BASE -#define AR5315_APB_SIZE 0x06000000 - -#define ATH_READ_REG(reg) \ - *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((reg))) - -#define ATH_WRITE_REG(reg, val) \ - *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((reg))) = (val) - -/* Helpers from NetBSD cdefs.h */ -/* __BIT(n): nth bit, where __BIT(0) == 0x1. */ -#define __BIT(__n) \ - (((__n) >= NBBY * sizeof(uintmax_t)) ? 0 : ((uintmax_t)1 << (__n))) - -/* __BITS(m, n): bits m through n, m < n. */ -#define __BITS(__m, __n) \ - ((__BIT(MAX((__m), (__n)) + 1) - 1) ^ (__BIT(MIN((__m), (__n))) - 1)) - -/* find least significant bit that is set */ -#define __LOWEST_SET_BIT(__mask) ((((__mask) - 1) & (__mask)) ^ (__mask)) - -#define __SHIFTOUT(__x, __mask) (((__x) & (__mask)) / __LOWEST_SET_BIT(__mask)) -#define __SHIFTOUT_MASK(__mask) __SHIFTOUT((__mask), (__mask)) -#endif /* _MIPS_ATHEROS_AR531XREG_H_ */ diff --git a/sys/mips/atheros/ar531x/arspireg.h b/sys/mips/atheros/ar531x/arspireg.h deleted file mode 100644 index 30da9a72807..00000000000 --- a/sys/mips/atheros/ar531x/arspireg.h +++ /dev/null @@ -1,60 +0,0 @@ -/* $NetBSD: arspireg.h,v 1.1 2006/10/14 15:33:23 gdamore Exp $ */ - -/*- - * Copyright (c) 2006 Urbana-Champaign Independent Media Center. - * Copyright (c) 2006 Garrett D'Amore. - * All rights reserved. - * - * Portions of this code were written by Garrett D'Amore for the - * Champaign-Urbana Community Wireless Network Project. - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * 3. All advertising materials mentioning features or use of this - * software must display the following acknowledgements: - * This product includes software developed by the Urbana-Champaign - * Independent Media Center. - * This product includes software developed by Garrett D'Amore. - * 4. Urbana-Champaign Independent Media Center's name and Garrett - * D'Amore's name may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT - * MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT - * MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MIPS_ATHEROS_DEV_ARSPIREG_H -#define _MIPS_ATHEROS_DEV_ARSPIREG_H - -#define ARSPI_REG_CTL 0x00 -#define ARSPI_REG_OPCODE 0x04 -#define ARSPI_REG_DATA 0x08 - -#define ARSPI_CTL_START 0x00000100 -#define ARSPI_CTL_BUSY 0x00010000 -#define ARSPI_CTL_TXCNT_MASK 0x0000000f -#define ARSPI_CTL_TXCNT_SHIFT 0 -#define ARSPI_CTL_RXCNT_MASK 0x000000f0 -#define ARSPI_CTL_RXCNT_SHIFT 4 -#define ARSPI_CTL_SIZE_MASK 0x00060000 -#define ARSPI_CTL_CLKSEL_MASK 0x03000000 - -#endif /* _MIPS_ATHEROS_DEV_ARSPIREG_H */ diff --git a/sys/mips/atheros/ar531x/files.ar5315 b/sys/mips/atheros/ar531x/files.ar5315 deleted file mode 100644 index 8b661fe8bbb..00000000000 --- a/sys/mips/atheros/ar531x/files.ar5315 +++ /dev/null @@ -1,19 +0,0 @@ - -mips/atheros/ar531x/apb.c standard -mips/atheros/ar531x/if_are.c optional are -mips/atheros/ar531x/ar5315_spi.c optional ar5315_spi -mips/atheros/ar531x/ar5315_wdog.c optional ar5315_wdog -mips/atheros/ar531x/ar5315_gpio.c optional gpio -mips/atheros/ar531x/ar5315_machdep.c standard -mips/atheros/ar531x/ar5315_chip.c standard -mips/atheros/ar531x/ar5315_setup.c standard -mips/atheros/ar531x/uart_bus_ar5315.c optional uart_ar5315 -mips/atheros/ar531x/uart_cpu_ar5315.c optional uart_ar5315 - -mips/atheros/ar531x/ar5312_chip.c standard - -mips/atheros/ar71xx_bus_space_reversed.c standard -mips/mips/tick.c standard - -# Non Intrng -mips/mips/intr_machdep.c optional !intrng diff --git a/sys/mips/atheros/ar531x/if_are.c b/sys/mips/atheros/ar531x/if_are.c deleted file mode 100644 index b131ffb2c57..00000000000 --- a/sys/mips/atheros/ar531x/if_are.c +++ /dev/null @@ -1,1756 +0,0 @@ -/*- - * Copyright (c) 2016 Hiroki Mori. All rights reserved. - * Copyright (C) 2007 - * Oleksandr Tymoshenko . All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * $Id: $ - * - */ - -#include "opt_platform.h" -#include "opt_ar531x.h" - -#include -/* - * AR531x Ethernet interface driver - * copy from mips/idt/if_kr.c and netbsd code - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include - -#ifdef INTRNG -#include -#endif - -#include -#include - -#ifdef ARE_MDIO -#include -#include -#include "mdio_if.h" -#endif - -MODULE_DEPEND(are, ether, 1, 1, 1); -MODULE_DEPEND(are, miibus, 1, 1, 1); - -#include "miibus_if.h" - -#include -#include -#include -#include - -#ifdef ARE_DEBUG -void dump_txdesc(struct are_softc *, int); -void dump_status_reg(struct are_softc *); -#endif - -static int are_attach(device_t); -static int are_detach(device_t); -static int are_ifmedia_upd(struct ifnet *); -static void are_ifmedia_sts(struct ifnet *, struct ifmediareq *); -static int are_ioctl(struct ifnet *, u_long, caddr_t); -static void are_init(void *); -static void are_init_locked(struct are_softc *); -static void are_link_task(void *, int); -static int are_miibus_readreg(device_t, int, int); -static void are_miibus_statchg(device_t); -static int are_miibus_writereg(device_t, int, int, int); -static int are_probe(device_t); -static void are_reset(struct are_softc *); -static int are_resume(device_t); -static int are_rx_ring_init(struct are_softc *); -static int are_tx_ring_init(struct are_softc *); -static int are_shutdown(device_t); -static void are_start(struct ifnet *); -static void are_start_locked(struct ifnet *); -static void are_stop(struct are_softc *); -static int are_suspend(device_t); - -static void are_rx(struct are_softc *); -static void are_tx(struct are_softc *); -static void are_intr(void *); -static void are_tick(void *); - -static void are_dmamap_cb(void *, bus_dma_segment_t *, int, int); -static int are_dma_alloc(struct are_softc *); -static void are_dma_free(struct are_softc *); -static int are_newbuf(struct are_softc *, int); -static __inline void are_fixup_rx(struct mbuf *); - -static void are_hinted_child(device_t bus, const char *dname, int dunit); - -static device_method_t are_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, are_probe), - DEVMETHOD(device_attach, are_attach), - DEVMETHOD(device_detach, are_detach), - DEVMETHOD(device_suspend, are_suspend), - DEVMETHOD(device_resume, are_resume), - DEVMETHOD(device_shutdown, are_shutdown), - - /* MII interface */ - DEVMETHOD(miibus_readreg, are_miibus_readreg), - DEVMETHOD(miibus_writereg, are_miibus_writereg), - DEVMETHOD(miibus_statchg, are_miibus_statchg), - - /* bus interface */ - DEVMETHOD(bus_add_child, device_add_child_ordered), - DEVMETHOD(bus_hinted_child, are_hinted_child), - - DEVMETHOD_END -}; - -static driver_t are_driver = { - "are", - are_methods, - sizeof(struct are_softc) -}; - -static devclass_t are_devclass; - -DRIVER_MODULE(are, nexus, are_driver, are_devclass, 0, 0); -#ifdef ARE_MII -DRIVER_MODULE(miibus, are, miibus_driver, miibus_devclass, 0, 0); -#endif - -#ifdef ARE_MDIO -static int aremdio_probe(device_t); -static int aremdio_attach(device_t); -static int aremdio_detach(device_t); - -/* - * Declare an additional, separate driver for accessing the MDIO bus. - */ -static device_method_t aremdio_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, aremdio_probe), - DEVMETHOD(device_attach, aremdio_attach), - DEVMETHOD(device_detach, aremdio_detach), - - /* bus interface */ - DEVMETHOD(bus_add_child, device_add_child_ordered), - - /* MDIO access */ - DEVMETHOD(mdio_readreg, are_miibus_readreg), - DEVMETHOD(mdio_writereg, are_miibus_writereg), -}; - -DEFINE_CLASS_0(aremdio, aremdio_driver, aremdio_methods, - sizeof(struct are_softc)); -static devclass_t aremdio_devclass; - -DRIVER_MODULE(miiproxy, are, miiproxy_driver, miiproxy_devclass, 0, 0); -DRIVER_MODULE(aremdio, nexus, aremdio_driver, aremdio_devclass, 0, 0); -DRIVER_MODULE(mdio, aremdio, mdio_driver, mdio_devclass, 0, 0); -#endif - -static int -are_probe(device_t dev) -{ - - device_set_desc(dev, "AR531x Ethernet interface"); - return (0); -} - -static int -are_attach(device_t dev) -{ - struct ifnet *ifp; - struct are_softc *sc; - int error = 0; -#ifdef INTRNG - int enetirq; -#else - int rid; -#endif - int unit; - char * local_macstr; - int count; - int i; - - sc = device_get_softc(dev); - unit = device_get_unit(dev); - sc->are_dev = dev; - - /* hardcode macaddress */ - sc->are_eaddr[0] = 0x00; - sc->are_eaddr[1] = 0x0C; - sc->are_eaddr[2] = 0x42; - sc->are_eaddr[3] = 0x09; - sc->are_eaddr[4] = 0x5E; - sc->are_eaddr[5] = 0x6B; - - /* try to get from hints */ - if (!resource_string_value(device_get_name(dev), - device_get_unit(dev), "macaddr", (const char **)&local_macstr)) { - uint32_t tmpmac[ETHER_ADDR_LEN]; - - /* Have a MAC address; should use it */ - device_printf(dev, "Overriding MAC address from environment: '%s'\n", - local_macstr); - - /* Extract out the MAC address */ - /* XXX this should all be a generic method */ - count = sscanf(local_macstr, "%x%*c%x%*c%x%*c%x%*c%x%*c%x", - &tmpmac[0], &tmpmac[1], - &tmpmac[2], &tmpmac[3], - &tmpmac[4], &tmpmac[5]); - if (count == 6) { - /* Valid! */ - for (i = 0; i < ETHER_ADDR_LEN; i++) - sc->are_eaddr[i] = tmpmac[i]; - } - } - - mtx_init(&sc->are_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, - MTX_DEF); - callout_init_mtx(&sc->are_stat_callout, &sc->are_mtx, 0); - TASK_INIT(&sc->are_link_task, 0, are_link_task, sc); - - /* Map control/status registers. */ - sc->are_rid = 0; - sc->are_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->are_rid, - RF_ACTIVE | RF_SHAREABLE); - - if (sc->are_res == NULL) { - device_printf(dev, "couldn't map memory\n"); - error = ENXIO; - goto fail; - } - - sc->are_btag = rman_get_bustag(sc->are_res); - sc->are_bhandle = rman_get_bushandle(sc->are_res); - -#ifndef INTRNG - /* Allocate interrupts */ - rid = 0; - sc->are_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE); - - if (sc->are_irq == NULL) { - device_printf(dev, "couldn't map interrupt\n"); - error = ENXIO; - goto fail; - } -#endif - - /* Allocate ifnet structure. */ - ifp = sc->are_ifp = if_alloc(IFT_ETHER); - - if (ifp == NULL) { - device_printf(dev, "couldn't allocate ifnet structure\n"); - error = ENOSPC; - goto fail; - } - ifp->if_softc = sc; - if_initname(ifp, device_get_name(dev), device_get_unit(dev)); - ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; - ifp->if_ioctl = are_ioctl; - ifp->if_start = are_start; - ifp->if_init = are_init; - sc->are_if_flags = ifp->if_flags; - - /* ifqmaxlen is sysctl value in net/if.c */ - IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); - ifp->if_snd.ifq_maxlen = ifqmaxlen; - IFQ_SET_READY(&ifp->if_snd); - - /* Tell the upper layer(s) we support long frames. */ - ifp->if_capabilities |= IFCAP_VLAN_MTU; - - ifp->if_capenable = ifp->if_capabilities; - - if (are_dma_alloc(sc) != 0) { - error = ENXIO; - goto fail; - } - - CSR_WRITE_4(sc, CSR_BUSMODE, BUSMODE_SWR); - DELAY(1000); - -#ifdef ARE_MDIO - sc->are_miiproxy = mii_attach_proxy(sc->are_dev); -#endif - -#ifdef ARE_MII - /* Do MII setup. */ - error = mii_attach(dev, &sc->are_miibus, ifp, are_ifmedia_upd, - are_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY, MII_OFFSET_ANY, 0); - if (error != 0) { - device_printf(dev, "attaching PHYs failed\n"); - goto fail; - } -#else - ifmedia_init(&sc->are_ifmedia, 0, are_ifmedia_upd, are_ifmedia_sts); - - ifmedia_add(&sc->are_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); - ifmedia_set(&sc->are_ifmedia, IFM_ETHER | IFM_AUTO); -#endif - - /* Call MI attach routine. */ - ether_ifattach(ifp, sc->are_eaddr); - -#ifdef INTRNG - char *name; - if (ar531x_soc >= AR531X_SOC_AR5315) { - enetirq = AR5315_CPU_IRQ_ENET; - name = "enet"; - } else { - if (device_get_unit(dev) == 0) { - enetirq = AR5312_IRQ_ENET0; - name = "enet0"; - } else { - enetirq = AR5312_IRQ_ENET1; - name = "enet1"; - } - } - cpu_establish_hardintr(name, NULL, are_intr, sc, enetirq, - INTR_TYPE_NET, NULL); -#else - /* Hook interrupt last to avoid having to lock softc */ - error = bus_setup_intr(dev, sc->are_irq, INTR_TYPE_NET | INTR_MPSAFE, - NULL, are_intr, sc, &sc->are_intrhand); - - if (error) { - device_printf(dev, "couldn't set up irq\n"); - ether_ifdetach(ifp); - goto fail; - } -#endif - -fail: - if (error) - are_detach(dev); - - return (error); -} - -static int -are_detach(device_t dev) -{ - struct are_softc *sc = device_get_softc(dev); - struct ifnet *ifp = sc->are_ifp; - - KASSERT(mtx_initialized(&sc->are_mtx), ("vr mutex not initialized")); - - /* These should only be active if attach succeeded */ - if (device_is_attached(dev)) { - ARE_LOCK(sc); - sc->are_detach = 1; - are_stop(sc); - ARE_UNLOCK(sc); - taskqueue_drain(taskqueue_swi, &sc->are_link_task); - ether_ifdetach(ifp); - } -#ifdef ARE_MII - if (sc->are_miibus) - device_delete_child(dev, sc->are_miibus); -#endif - bus_generic_detach(dev); - - if (sc->are_intrhand) - bus_teardown_intr(dev, sc->are_irq, sc->are_intrhand); - if (sc->are_irq) - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->are_irq); - - if (sc->are_res) - bus_release_resource(dev, SYS_RES_MEMORY, sc->are_rid, - sc->are_res); - - if (ifp) - if_free(ifp); - - are_dma_free(sc); - - mtx_destroy(&sc->are_mtx); - - return (0); - -} - -static int -are_suspend(device_t dev) -{ - - panic("%s", __func__); - return 0; -} - -static int -are_resume(device_t dev) -{ - - panic("%s", __func__); - return 0; -} - -static int -are_shutdown(device_t dev) -{ - struct are_softc *sc; - - sc = device_get_softc(dev); - - ARE_LOCK(sc); - are_stop(sc); - ARE_UNLOCK(sc); - - return (0); -} - -static int -are_miibus_readreg(device_t dev, int phy, int reg) -{ - struct are_softc * sc = device_get_softc(dev); - uint32_t addr; - int i; - - addr = (phy << MIIADDR_PHY_SHIFT) | (reg << MIIADDR_REG_SHIFT); - CSR_WRITE_4(sc, CSR_MIIADDR, addr); - for (i = 0; i < 100000000; i++) { - if ((CSR_READ_4(sc, CSR_MIIADDR) & MIIADDR_BUSY) == 0) - break; - } - - return (CSR_READ_4(sc, CSR_MIIDATA) & 0xffff); -} - -static int -are_miibus_writereg(device_t dev, int phy, int reg, int data) -{ - struct are_softc * sc = device_get_softc(dev); - uint32_t addr; - int i; - - /* write the data register */ - CSR_WRITE_4(sc, CSR_MIIDATA, data); - - /* write the address to latch it in */ - addr = (phy << MIIADDR_PHY_SHIFT) | (reg << MIIADDR_REG_SHIFT) | - MIIADDR_WRITE; - CSR_WRITE_4(sc, CSR_MIIADDR, addr); - - for (i = 0; i < 100000000; i++) { - if ((CSR_READ_4(sc, CSR_MIIADDR) & MIIADDR_BUSY) == 0) - break; - } - - return (0); -} - -static void -are_miibus_statchg(device_t dev) -{ - struct are_softc *sc; - - sc = device_get_softc(dev); - taskqueue_enqueue(taskqueue_swi, &sc->are_link_task); -} - -static void -are_link_task(void *arg, int pending) -{ -#ifdef ARE_MII - struct are_softc *sc; - struct mii_data *mii; - struct ifnet *ifp; - /* int lfdx, mfdx; */ - - sc = (struct are_softc *)arg; - - ARE_LOCK(sc); - mii = device_get_softc(sc->are_miibus); - ifp = sc->are_ifp; - if (mii == NULL || ifp == NULL || - (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { - ARE_UNLOCK(sc); - return; - } - - if (mii->mii_media_status & IFM_ACTIVE) { - if (IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) - sc->are_link_status = 1; - } else - sc->are_link_status = 0; - - ARE_UNLOCK(sc); -#endif -} - -static void -are_reset(struct are_softc *sc) -{ - int i; - - CSR_WRITE_4(sc, CSR_BUSMODE, BUSMODE_SWR); - - /* - * The chip doesn't take itself out of reset automatically. - * We need to do so after 2us. - */ - DELAY(10); - CSR_WRITE_4(sc, CSR_BUSMODE, 0); - - for (i = 0; i < 1000; i++) { - /* - * Wait a bit for the reset to complete before peeking - * at the chip again. - */ - DELAY(10); - if ((CSR_READ_4(sc, CSR_BUSMODE) & BUSMODE_SWR) == 0) - break; - } - - if (CSR_READ_4(sc, CSR_BUSMODE) & BUSMODE_SWR) - device_printf(sc->are_dev, "reset time out\n"); - - DELAY(1000); -} - -static void -are_init(void *xsc) -{ - struct are_softc *sc = xsc; - - ARE_LOCK(sc); - are_init_locked(sc); - ARE_UNLOCK(sc); -} - -static void -are_init_locked(struct are_softc *sc) -{ - struct ifnet *ifp = sc->are_ifp; -#ifdef ARE_MII - struct mii_data *mii; -#endif - - ARE_LOCK_ASSERT(sc); - -#ifdef ARE_MII - mii = device_get_softc(sc->are_miibus); -#endif - - are_stop(sc); - are_reset(sc); - - /* Init circular RX list. */ - if (are_rx_ring_init(sc) != 0) { - device_printf(sc->are_dev, - "initialization failed: no memory for rx buffers\n"); - are_stop(sc); - return; - } - - /* Init tx descriptors. */ - are_tx_ring_init(sc); - - /* - * Initialize the BUSMODE register. - */ - CSR_WRITE_4(sc, CSR_BUSMODE, - /* XXX: not sure if this is a good thing or not... */ - BUSMODE_BAR | BUSMODE_BLE | BUSMODE_PBL_4LW); - - /* - * Initialize the interrupt mask and enable interrupts. - */ - /* normal interrupts */ - sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS; - - /* abnormal interrupts */ - sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF | - STATUS_RU | STATUS_RPS | STATUS_SE | STATUS_AIS; - - sc->sc_rxint_mask = STATUS_RI|STATUS_RU; - sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT; - - sc->sc_rxint_mask &= sc->sc_inten; - sc->sc_txint_mask &= sc->sc_inten; - - CSR_WRITE_4(sc, CSR_INTEN, sc->sc_inten); - CSR_WRITE_4(sc, CSR_STATUS, 0xffffffff); - - /* - * Give the transmit and receive rings to the chip. - */ - CSR_WRITE_4(sc, CSR_TXLIST, ARE_TX_RING_ADDR(sc, 0)); - CSR_WRITE_4(sc, CSR_RXLIST, ARE_RX_RING_ADDR(sc, 0)); - - /* - * Set the station address. - */ - CSR_WRITE_4(sc, CSR_MACHI, sc->are_eaddr[5] << 16 | sc->are_eaddr[4]); - CSR_WRITE_4(sc, CSR_MACLO, sc->are_eaddr[3] << 24 | - sc->are_eaddr[2] << 16 | sc->are_eaddr[1] << 8 | sc->are_eaddr[0]); - - /* - * Start the mac. - */ - CSR_WRITE_4(sc, CSR_FLOWC, FLOWC_FCE); - CSR_WRITE_4(sc, CSR_MACCTL, MACCTL_RE | MACCTL_TE | - MACCTL_PM | MACCTL_FDX | MACCTL_HBD | MACCTL_RA); - - /* - * Write out the opmode. - */ - CSR_WRITE_4(sc, CSR_OPMODE, OPMODE_SR | OPMODE_ST | OPMODE_SF | - OPMODE_TR_64); - - /* - * Start the receive process. - */ - CSR_WRITE_4(sc, CSR_RXPOLL, RXPOLL_RPD); - - sc->are_link_status = 1; -#ifdef ARE_MII - mii_mediachg(mii); -#endif - - ifp->if_drv_flags |= IFF_DRV_RUNNING; - ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; - - callout_reset(&sc->are_stat_callout, hz, are_tick, sc); -} - -static void -are_start(struct ifnet *ifp) -{ - struct are_softc *sc; - - sc = ifp->if_softc; - - ARE_LOCK(sc); - are_start_locked(ifp); - ARE_UNLOCK(sc); -} - -/* - * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data - * pointers to the fragment pointers. - */ -static int -are_encap(struct are_softc *sc, struct mbuf **m_head) -{ - struct are_txdesc *txd; - struct are_desc *desc, *prev_desc; - struct mbuf *m; - bus_dma_segment_t txsegs[ARE_MAXFRAGS]; - uint32_t link_addr; - int error, i, nsegs, prod, si, prev_prod; - int txstat; - int startcount; - int padlen; - - startcount = sc->are_cdata.are_tx_cnt; - - ARE_LOCK_ASSERT(sc); - - /* - * Some VIA Rhine wants packet buffers to be longword - * aligned, but very often our mbufs aren't. Rather than - * waste time trying to decide when to copy and when not - * to copy, just do it all the time. - */ - m = m_defrag(*m_head, M_NOWAIT); - if (m == NULL) { - device_printf(sc->are_dev, "are_encap m_defrag error\n"); - m_freem(*m_head); - *m_head = NULL; - return (ENOBUFS); - } - *m_head = m; - - /* - * The Rhine chip doesn't auto-pad, so we have to make - * sure to pad short frames out to the minimum frame length - * ourselves. - */ - if ((*m_head)->m_pkthdr.len < ARE_MIN_FRAMELEN) { - m = *m_head; - padlen = ARE_MIN_FRAMELEN - m->m_pkthdr.len; - if (M_WRITABLE(m) == 0) { - /* Get a writable copy. */ - m = m_dup(*m_head, M_NOWAIT); - m_freem(*m_head); - if (m == NULL) { - device_printf(sc->are_dev, "are_encap m_dup error\n"); - *m_head = NULL; - return (ENOBUFS); - } - *m_head = m; - } - if (m->m_next != NULL || M_TRAILINGSPACE(m) < padlen) { - m = m_defrag(m, M_NOWAIT); - if (m == NULL) { - device_printf(sc->are_dev, "are_encap m_defrag error\n"); - m_freem(*m_head); - *m_head = NULL; - return (ENOBUFS); - } - } - /* - * Manually pad short frames, and zero the pad space - * to avoid leaking data. - */ - bzero(mtod(m, char *) + m->m_pkthdr.len, padlen); - m->m_pkthdr.len += padlen; - m->m_len = m->m_pkthdr.len; - *m_head = m; - } - - prod = sc->are_cdata.are_tx_prod; - txd = &sc->are_cdata.are_txdesc[prod]; - error = bus_dmamap_load_mbuf_sg(sc->are_cdata.are_tx_tag, - txd->tx_dmamap, *m_head, txsegs, &nsegs, BUS_DMA_NOWAIT); - if (error == EFBIG) { - device_printf(sc->are_dev, "are_encap EFBIG error\n"); - m = m_defrag(*m_head, M_NOWAIT); - if (m == NULL) { - m_freem(*m_head); - *m_head = NULL; - return (ENOBUFS); - } - *m_head = m; - error = bus_dmamap_load_mbuf_sg(sc->are_cdata.are_tx_tag, - txd->tx_dmamap, *m_head, txsegs, &nsegs, BUS_DMA_NOWAIT); - if (error != 0) { - m_freem(*m_head); - *m_head = NULL; - return (error); - } - - } else if (error != 0) - return (error); - if (nsegs == 0) { - m_freem(*m_head); - *m_head = NULL; - return (EIO); - } - - /* Check number of available descriptors. */ - if (sc->are_cdata.are_tx_cnt + nsegs >= (ARE_TX_RING_CNT - 1)) { - bus_dmamap_unload(sc->are_cdata.are_tx_tag, txd->tx_dmamap); - return (ENOBUFS); - } - - txd->tx_m = *m_head; - bus_dmamap_sync(sc->are_cdata.are_tx_tag, txd->tx_dmamap, - BUS_DMASYNC_PREWRITE); - - si = prod; - - /* - * Make a list of descriptors for this packet. DMA controller will - * walk through it while are_link is not zero. The last one should - * have COF flag set, to pickup next chain from NDPTR - */ - prev_prod = prod; - desc = prev_desc = NULL; - for (i = 0; i < nsegs; i++) { - desc = &sc->are_rdata.are_tx_ring[prod]; - desc->are_stat = ADSTAT_OWN; - desc->are_devcs = ARE_DMASIZE(txsegs[i].ds_len); - desc->are_addr = txsegs[i].ds_addr; - /* link with previous descriptor */ - /* end of descriptor */ - if (prod == ARE_TX_RING_CNT - 1) - desc->are_devcs |= ADCTL_ER; - - sc->are_cdata.are_tx_cnt++; - prev_desc = desc; - ARE_INC(prod, ARE_TX_RING_CNT); - } - - /* - * Set mark last fragment with LD flag - */ - if (desc) { - desc->are_devcs |= ADCTL_Tx_IC; - desc->are_devcs |= ADCTL_Tx_LS; - } - - /* Update producer index. */ - sc->are_cdata.are_tx_prod = prod; - - /* Sync descriptors. */ - bus_dmamap_sync(sc->are_cdata.are_tx_ring_tag, - sc->are_cdata.are_tx_ring_map, - BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); - - /* Start transmitting */ - /* Check if new list is queued in NDPTR */ - txstat = (CSR_READ_4(sc, CSR_STATUS) >> 20) & 7; - if (startcount == 0 && (txstat == 0 || txstat == 6)) { - desc = &sc->are_rdata.are_tx_ring[si]; - desc->are_devcs |= ADCTL_Tx_FS; - } - else { - link_addr = ARE_TX_RING_ADDR(sc, si); - /* Get previous descriptor */ - si = (si + ARE_TX_RING_CNT - 1) % ARE_TX_RING_CNT; - desc = &sc->are_rdata.are_tx_ring[si]; - desc->are_devcs &= ~(ADCTL_Tx_IC | ADCTL_Tx_LS); - } - - return (0); -} - -static void -are_start_locked(struct ifnet *ifp) -{ - struct are_softc *sc; - struct mbuf *m_head; - int enq; - int txstat; - - sc = ifp->if_softc; - - ARE_LOCK_ASSERT(sc); - - if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != - IFF_DRV_RUNNING || sc->are_link_status == 0 ) - return; - - for (enq = 0; !IFQ_DRV_IS_EMPTY(&ifp->if_snd) && - sc->are_cdata.are_tx_cnt < ARE_TX_RING_CNT - 2; ) { - IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); - if (m_head == NULL) - break; - /* - * Pack the data into the transmit ring. If we - * don't have room, set the OACTIVE flag and wait - * for the NIC to drain the ring. - */ - if (are_encap(sc, &m_head)) { - if (m_head == NULL) - break; - IFQ_DRV_PREPEND(&ifp->if_snd, m_head); - ifp->if_drv_flags |= IFF_DRV_OACTIVE; - break; - } - - enq++; - /* - * If there's a BPF listener, bounce a copy of this frame - * to him. - */ - ETHER_BPF_MTAP(ifp, m_head); - } - - if (enq > 0) { - txstat = (CSR_READ_4(sc, CSR_STATUS) >> 20) & 7; - if (txstat == 0 || txstat == 6) { - /* Transmit Process Stat is stop or suspended */ - CSR_WRITE_4(sc, CSR_TXPOLL, TXPOLL_TPD); - } - } -} - -static void -are_stop(struct are_softc *sc) -{ - struct ifnet *ifp; - - ARE_LOCK_ASSERT(sc); - - ifp = sc->are_ifp; - ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); - callout_stop(&sc->are_stat_callout); - - /* Disable interrupts. */ - CSR_WRITE_4(sc, CSR_INTEN, 0); - - /* Stop the transmit and receive processes. */ - CSR_WRITE_4(sc, CSR_OPMODE, 0); - CSR_WRITE_4(sc, CSR_RXLIST, 0); - CSR_WRITE_4(sc, CSR_TXLIST, 0); - CSR_WRITE_4(sc, CSR_MACCTL, - CSR_READ_4(sc, CSR_MACCTL) & ~(MACCTL_TE | MACCTL_RE)); - -} - -static int -are_set_filter(struct are_softc *sc) -{ - struct ifnet *ifp; - int mchash[2]; - int macctl; - - ifp = sc->are_ifp; - - macctl = CSR_READ_4(sc, CSR_MACCTL); - macctl &= ~(MACCTL_PR | MACCTL_PM); - macctl |= MACCTL_HBD; - - if (ifp->if_flags & IFF_PROMISC) - macctl |= MACCTL_PR; - - /* Todo: hash table set. - * But I don't know how to use multicast hash table at this soc. - */ - - /* this is allmulti */ - mchash[0] = mchash[1] = 0xffffffff; - macctl |= MACCTL_PM; - - CSR_WRITE_4(sc, CSR_HTLO, mchash[0]); - CSR_WRITE_4(sc, CSR_HTHI, mchash[1]); - CSR_WRITE_4(sc, CSR_MACCTL, macctl); - - return 0; -} - -static int -are_ioctl(struct ifnet *ifp, u_long command, caddr_t data) -{ - struct are_softc *sc = ifp->if_softc; - struct ifreq *ifr = (struct ifreq *) data; -#ifdef ARE_MII - struct mii_data *mii; -#endif - int error; - - switch (command) { - case SIOCSIFFLAGS: - ARE_LOCK(sc); - if (ifp->if_flags & IFF_UP) { - if (ifp->if_drv_flags & IFF_DRV_RUNNING) { - if ((ifp->if_flags ^ sc->are_if_flags) & - (IFF_PROMISC | IFF_ALLMULTI)) - are_set_filter(sc); - } else { - if (sc->are_detach == 0) - are_init_locked(sc); - } - } else { - if (ifp->if_drv_flags & IFF_DRV_RUNNING) - are_stop(sc); - } - sc->are_if_flags = ifp->if_flags; - ARE_UNLOCK(sc); - error = 0; - break; - case SIOCADDMULTI: - case SIOCDELMULTI: - ARE_LOCK(sc); - are_set_filter(sc); - ARE_UNLOCK(sc); - error = 0; - break; - case SIOCGIFMEDIA: - case SIOCSIFMEDIA: -#ifdef ARE_MII - mii = device_get_softc(sc->are_miibus); - error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command); -#else - error = ifmedia_ioctl(ifp, ifr, &sc->are_ifmedia, command); -#endif - break; - case SIOCSIFCAP: - error = 0; - break; - default: - error = ether_ioctl(ifp, command, data); - break; - } - - return (error); -} - -/* - * Set media options. - */ -static int -are_ifmedia_upd(struct ifnet *ifp) -{ -#ifdef ARE_MII - struct are_softc *sc; - struct mii_data *mii; - struct mii_softc *miisc; - int error; - - sc = ifp->if_softc; - ARE_LOCK(sc); - mii = device_get_softc(sc->are_miibus); - LIST_FOREACH(miisc, &mii->mii_phys, mii_list) - PHY_RESET(miisc); - error = mii_mediachg(mii); - ARE_UNLOCK(sc); - - return (error); -#else - return (0); -#endif -} - -/* - * Report current media status. - */ -static void -are_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) -{ -#ifdef ARE_MII - struct are_softc *sc = ifp->if_softc; - struct mii_data *mii; - - mii = device_get_softc(sc->are_miibus); - ARE_LOCK(sc); - mii_pollstat(mii); - ifmr->ifm_active = mii->mii_media_active; - ifmr->ifm_status = mii->mii_media_status; - ARE_UNLOCK(sc); -#else - ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; -#endif -} - -struct are_dmamap_arg { - bus_addr_t are_busaddr; -}; - -static void -are_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) -{ - struct are_dmamap_arg *ctx; - - if (error != 0) - return; - ctx = arg; - ctx->are_busaddr = segs[0].ds_addr; -} - -static int -are_dma_alloc(struct are_softc *sc) -{ - struct are_dmamap_arg ctx; - struct are_txdesc *txd; - struct are_rxdesc *rxd; - int error, i; - - /* Create parent DMA tag. */ - error = bus_dma_tag_create( - bus_get_dma_tag(sc->are_dev), /* parent */ - 1, 0, /* alignment, boundary */ - BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, NULL, /* filter, filterarg */ - BUS_SPACE_MAXSIZE_32BIT, /* maxsize */ - 0, /* nsegments */ - BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ - 0, /* flags */ - NULL, NULL, /* lockfunc, lockarg */ - &sc->are_cdata.are_parent_tag); - if (error != 0) { - device_printf(sc->are_dev, "failed to create parent DMA tag\n"); - goto fail; - } - /* Create tag for Tx ring. */ - error = bus_dma_tag_create( - sc->are_cdata.are_parent_tag, /* parent */ - ARE_RING_ALIGN, 0, /* alignment, boundary */ - BUS_SPACE_MAXADDR, /* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, NULL, /* filter, filterarg */ - ARE_TX_RING_SIZE, /* maxsize */ - 1, /* nsegments */ - ARE_TX_RING_SIZE, /* maxsegsize */ - 0, /* flags */ - NULL, NULL, /* lockfunc, lockarg */ - &sc->are_cdata.are_tx_ring_tag); - if (error != 0) { - device_printf(sc->are_dev, "failed to create Tx ring DMA tag\n"); - goto fail; - } - - /* Create tag for Rx ring. */ - error = bus_dma_tag_create( - sc->are_cdata.are_parent_tag, /* parent */ - ARE_RING_ALIGN, 0, /* alignment, boundary */ - BUS_SPACE_MAXADDR, /* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, NULL, /* filter, filterarg */ - ARE_RX_RING_SIZE, /* maxsize */ - 1, /* nsegments */ - ARE_RX_RING_SIZE, /* maxsegsize */ - 0, /* flags */ - NULL, NULL, /* lockfunc, lockarg */ - &sc->are_cdata.are_rx_ring_tag); - if (error != 0) { - device_printf(sc->are_dev, "failed to create Rx ring DMA tag\n"); - goto fail; - } - - /* Create tag for Tx buffers. */ - error = bus_dma_tag_create( - sc->are_cdata.are_parent_tag, /* parent */ - sizeof(uint32_t), 0, /* alignment, boundary */ - BUS_SPACE_MAXADDR, /* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, NULL, /* filter, filterarg */ - MCLBYTES * ARE_MAXFRAGS, /* maxsize */ - ARE_MAXFRAGS, /* nsegments */ - MCLBYTES, /* maxsegsize */ - 0, /* flags */ - NULL, NULL, /* lockfunc, lockarg */ - &sc->are_cdata.are_tx_tag); - if (error != 0) { - device_printf(sc->are_dev, "failed to create Tx DMA tag\n"); - goto fail; - } - - /* Create tag for Rx buffers. */ - error = bus_dma_tag_create( - sc->are_cdata.are_parent_tag, /* parent */ - ARE_RX_ALIGN, 0, /* alignment, boundary */ - BUS_SPACE_MAXADDR, /* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, NULL, /* filter, filterarg */ - MCLBYTES, /* maxsize */ - 1, /* nsegments */ - MCLBYTES, /* maxsegsize */ - 0, /* flags */ - NULL, NULL, /* lockfunc, lockarg */ - &sc->are_cdata.are_rx_tag); - if (error != 0) { - device_printf(sc->are_dev, "failed to create Rx DMA tag\n"); - goto fail; - } - - /* Allocate DMA'able memory and load the DMA map for Tx ring. */ - error = bus_dmamem_alloc(sc->are_cdata.are_tx_ring_tag, - (void **)&sc->are_rdata.are_tx_ring, BUS_DMA_WAITOK | - BUS_DMA_COHERENT | BUS_DMA_ZERO, &sc->are_cdata.are_tx_ring_map); - if (error != 0) { - device_printf(sc->are_dev, - "failed to allocate DMA'able memory for Tx ring\n"); - goto fail; - } - - ctx.are_busaddr = 0; - error = bus_dmamap_load(sc->are_cdata.are_tx_ring_tag, - sc->are_cdata.are_tx_ring_map, sc->are_rdata.are_tx_ring, - ARE_TX_RING_SIZE, are_dmamap_cb, &ctx, 0); - if (error != 0 || ctx.are_busaddr == 0) { - device_printf(sc->are_dev, - "failed to load DMA'able memory for Tx ring\n"); - goto fail; - } - sc->are_rdata.are_tx_ring_paddr = ctx.are_busaddr; - - /* Allocate DMA'able memory and load the DMA map for Rx ring. */ - error = bus_dmamem_alloc(sc->are_cdata.are_rx_ring_tag, - (void **)&sc->are_rdata.are_rx_ring, BUS_DMA_WAITOK | - BUS_DMA_COHERENT | BUS_DMA_ZERO, &sc->are_cdata.are_rx_ring_map); - if (error != 0) { - device_printf(sc->are_dev, - "failed to allocate DMA'able memory for Rx ring\n"); - goto fail; - } - - ctx.are_busaddr = 0; - error = bus_dmamap_load(sc->are_cdata.are_rx_ring_tag, - sc->are_cdata.are_rx_ring_map, sc->are_rdata.are_rx_ring, - ARE_RX_RING_SIZE, are_dmamap_cb, &ctx, 0); - if (error != 0 || ctx.are_busaddr == 0) { - device_printf(sc->are_dev, - "failed to load DMA'able memory for Rx ring\n"); - goto fail; - } - sc->are_rdata.are_rx_ring_paddr = ctx.are_busaddr; - - /* Create DMA maps for Tx buffers. */ - for (i = 0; i < ARE_TX_RING_CNT; i++) { - txd = &sc->are_cdata.are_txdesc[i]; - txd->tx_m = NULL; - txd->tx_dmamap = NULL; - error = bus_dmamap_create(sc->are_cdata.are_tx_tag, 0, - &txd->tx_dmamap); - if (error != 0) { - device_printf(sc->are_dev, - "failed to create Tx dmamap\n"); - goto fail; - } - } - /* Create DMA maps for Rx buffers. */ - if ((error = bus_dmamap_create(sc->are_cdata.are_rx_tag, 0, - &sc->are_cdata.are_rx_sparemap)) != 0) { - device_printf(sc->are_dev, - "failed to create spare Rx dmamap\n"); - goto fail; - } - for (i = 0; i < ARE_RX_RING_CNT; i++) { - rxd = &sc->are_cdata.are_rxdesc[i]; - rxd->rx_m = NULL; - rxd->rx_dmamap = NULL; - error = bus_dmamap_create(sc->are_cdata.are_rx_tag, 0, - &rxd->rx_dmamap); - if (error != 0) { - device_printf(sc->are_dev, - "failed to create Rx dmamap\n"); - goto fail; - } - } - -fail: - return (error); -} - -static void -are_dma_free(struct are_softc *sc) -{ - struct are_txdesc *txd; - struct are_rxdesc *rxd; - int i; - - /* Tx ring. */ - if (sc->are_cdata.are_tx_ring_tag) { - if (sc->are_rdata.are_tx_ring_paddr) - bus_dmamap_unload(sc->are_cdata.are_tx_ring_tag, - sc->are_cdata.are_tx_ring_map); - if (sc->are_rdata.are_tx_ring) - bus_dmamem_free(sc->are_cdata.are_tx_ring_tag, - sc->are_rdata.are_tx_ring, - sc->are_cdata.are_tx_ring_map); - sc->are_rdata.are_tx_ring = NULL; - sc->are_rdata.are_tx_ring_paddr = 0; - bus_dma_tag_destroy(sc->are_cdata.are_tx_ring_tag); - sc->are_cdata.are_tx_ring_tag = NULL; - } - /* Rx ring. */ - if (sc->are_cdata.are_rx_ring_tag) { - if (sc->are_rdata.are_rx_ring_paddr) - bus_dmamap_unload(sc->are_cdata.are_rx_ring_tag, - sc->are_cdata.are_rx_ring_map); - if (sc->are_rdata.are_rx_ring) - bus_dmamem_free(sc->are_cdata.are_rx_ring_tag, - sc->are_rdata.are_rx_ring, - sc->are_cdata.are_rx_ring_map); - sc->are_rdata.are_rx_ring = NULL; - sc->are_rdata.are_rx_ring_paddr = 0; - bus_dma_tag_destroy(sc->are_cdata.are_rx_ring_tag); - sc->are_cdata.are_rx_ring_tag = NULL; - } - /* Tx buffers. */ - if (sc->are_cdata.are_tx_tag) { - for (i = 0; i < ARE_TX_RING_CNT; i++) { - txd = &sc->are_cdata.are_txdesc[i]; - if (txd->tx_dmamap) { - bus_dmamap_destroy(sc->are_cdata.are_tx_tag, - txd->tx_dmamap); - txd->tx_dmamap = NULL; - } - } - bus_dma_tag_destroy(sc->are_cdata.are_tx_tag); - sc->are_cdata.are_tx_tag = NULL; - } - /* Rx buffers. */ - if (sc->are_cdata.are_rx_tag) { - for (i = 0; i < ARE_RX_RING_CNT; i++) { - rxd = &sc->are_cdata.are_rxdesc[i]; - if (rxd->rx_dmamap) { - bus_dmamap_destroy(sc->are_cdata.are_rx_tag, - rxd->rx_dmamap); - rxd->rx_dmamap = NULL; - } - } - if (sc->are_cdata.are_rx_sparemap) { - bus_dmamap_destroy(sc->are_cdata.are_rx_tag, - sc->are_cdata.are_rx_sparemap); - sc->are_cdata.are_rx_sparemap = 0; - } - bus_dma_tag_destroy(sc->are_cdata.are_rx_tag); - sc->are_cdata.are_rx_tag = NULL; - } - - if (sc->are_cdata.are_parent_tag) { - bus_dma_tag_destroy(sc->are_cdata.are_parent_tag); - sc->are_cdata.are_parent_tag = NULL; - } -} - -/* - * Initialize the transmit descriptors. - */ -static int -are_tx_ring_init(struct are_softc *sc) -{ - struct are_ring_data *rd; - struct are_txdesc *txd; - bus_addr_t addr; - int i; - - sc->are_cdata.are_tx_prod = 0; - sc->are_cdata.are_tx_cons = 0; - sc->are_cdata.are_tx_cnt = 0; - sc->are_cdata.are_tx_pkts = 0; - - rd = &sc->are_rdata; - bzero(rd->are_tx_ring, ARE_TX_RING_SIZE); - for (i = 0; i < ARE_TX_RING_CNT; i++) { - if (i == ARE_TX_RING_CNT - 1) - addr = ARE_TX_RING_ADDR(sc, 0); - else - addr = ARE_TX_RING_ADDR(sc, i + 1); - rd->are_tx_ring[i].are_stat = 0; - rd->are_tx_ring[i].are_devcs = 0; - rd->are_tx_ring[i].are_addr = 0; - rd->are_tx_ring[i].are_link = addr; - txd = &sc->are_cdata.are_txdesc[i]; - txd->tx_m = NULL; - } - - bus_dmamap_sync(sc->are_cdata.are_tx_ring_tag, - sc->are_cdata.are_tx_ring_map, - BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); - - return (0); -} - -/* - * Initialize the RX descriptors and allocate mbufs for them. Note that - * we arrange the descriptors in a closed ring, so that the last descriptor - * points back to the first. - */ -static int -are_rx_ring_init(struct are_softc *sc) -{ - struct are_ring_data *rd; - struct are_rxdesc *rxd; - bus_addr_t addr; - int i; - - sc->are_cdata.are_rx_cons = 0; - - rd = &sc->are_rdata; - bzero(rd->are_rx_ring, ARE_RX_RING_SIZE); - for (i = 0; i < ARE_RX_RING_CNT; i++) { - rxd = &sc->are_cdata.are_rxdesc[i]; - rxd->rx_m = NULL; - rxd->desc = &rd->are_rx_ring[i]; - if (i == ARE_RX_RING_CNT - 1) - addr = ARE_RX_RING_ADDR(sc, 0); - else - addr = ARE_RX_RING_ADDR(sc, i + 1); - rd->are_rx_ring[i].are_stat = ADSTAT_OWN; - rd->are_rx_ring[i].are_devcs = ADCTL_CH; - if (i == ARE_RX_RING_CNT - 1) - rd->are_rx_ring[i].are_devcs |= ADCTL_ER; - rd->are_rx_ring[i].are_addr = 0; - rd->are_rx_ring[i].are_link = addr; - if (are_newbuf(sc, i) != 0) - return (ENOBUFS); - } - - bus_dmamap_sync(sc->are_cdata.are_rx_ring_tag, - sc->are_cdata.are_rx_ring_map, - BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); - - return (0); -} - -/* - * Initialize an RX descriptor and attach an MBUF cluster. - */ -static int -are_newbuf(struct are_softc *sc, int idx) -{ - struct are_desc *desc; - struct are_rxdesc *rxd; - struct mbuf *m; - bus_dma_segment_t segs[1]; - bus_dmamap_t map; - int nsegs; - - m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); - if (m == NULL) - return (ENOBUFS); - m->m_len = m->m_pkthdr.len = MCLBYTES; - - /* tcp header boundary margin */ - m_adj(m, 4); - - if (bus_dmamap_load_mbuf_sg(sc->are_cdata.are_rx_tag, - sc->are_cdata.are_rx_sparemap, m, segs, &nsegs, 0) != 0) { - m_freem(m); - return (ENOBUFS); - } - KASSERT(nsegs == 1, ("%s: %d segments returned!", __func__, nsegs)); - - rxd = &sc->are_cdata.are_rxdesc[idx]; - if (rxd->rx_m != NULL) { - /* - * THis is if_kr.c original code but make bug. Make scranble on buffer data. - * bus_dmamap_sync(sc->are_cdata.are_rx_tag, rxd->rx_dmamap, - * BUS_DMASYNC_POSTREAD); - */ - bus_dmamap_unload(sc->are_cdata.are_rx_tag, rxd->rx_dmamap); - } - map = rxd->rx_dmamap; - rxd->rx_dmamap = sc->are_cdata.are_rx_sparemap; - sc->are_cdata.are_rx_sparemap = map; - bus_dmamap_sync(sc->are_cdata.are_rx_tag, rxd->rx_dmamap, - BUS_DMASYNC_PREREAD); - rxd->rx_m = m; - desc = rxd->desc; - desc->are_addr = segs[0].ds_addr; - desc->are_devcs |= ARE_DMASIZE(segs[0].ds_len); - rxd->saved_ca = desc->are_addr ; - rxd->saved_ctl = desc->are_stat ; - - return (0); -} - -static __inline void -are_fixup_rx(struct mbuf *m) -{ - int i; - uint16_t *src, *dst; - - src = mtod(m, uint16_t *); - dst = src - 1; - - for (i = 0; i < m->m_len / sizeof(uint16_t); i++) { - *dst++ = *src++; - } - - if (m->m_len % sizeof(uint16_t)) - *(uint8_t *)dst = *(uint8_t *)src; - - m->m_data -= ETHER_ALIGN; -} - -static void -are_tx(struct are_softc *sc) -{ - struct are_txdesc *txd; - struct are_desc *cur_tx; - struct ifnet *ifp; - uint32_t ctl, devcs; - int cons, prod; - - ARE_LOCK_ASSERT(sc); - - cons = sc->are_cdata.are_tx_cons; - prod = sc->are_cdata.are_tx_prod; - if (cons == prod) - return; - - bus_dmamap_sync(sc->are_cdata.are_tx_ring_tag, - sc->are_cdata.are_tx_ring_map, - BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); - - ifp = sc->are_ifp; - /* - * Go through our tx list and free mbufs for those - * frames that have been transmitted. - */ - for (; cons != prod; ARE_INC(cons, ARE_TX_RING_CNT)) { - cur_tx = &sc->are_rdata.are_tx_ring[cons]; - ctl = cur_tx->are_stat; - devcs = cur_tx->are_devcs; - /* Check if descriptor has "finished" flag */ - if (ARE_DMASIZE(devcs) == 0) - break; - - sc->are_cdata.are_tx_cnt--; - ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; - - txd = &sc->are_cdata.are_txdesc[cons]; - - if ((ctl & ADSTAT_Tx_ES) == 0) - if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); - else { - if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); - } - - bus_dmamap_sync(sc->are_cdata.are_tx_tag, txd->tx_dmamap, - BUS_DMASYNC_POSTWRITE); - bus_dmamap_unload(sc->are_cdata.are_tx_tag, txd->tx_dmamap); - - /* Free only if it's first descriptor in list */ - if (txd->tx_m) - m_freem(txd->tx_m); - txd->tx_m = NULL; - - /* reset descriptor */ - cur_tx->are_stat = 0; - cur_tx->are_devcs = 0; - cur_tx->are_addr = 0; - } - - sc->are_cdata.are_tx_cons = cons; - - bus_dmamap_sync(sc->are_cdata.are_tx_ring_tag, - sc->are_cdata.are_tx_ring_map, BUS_DMASYNC_PREWRITE); -} - -static void -are_rx(struct are_softc *sc) -{ - struct are_rxdesc *rxd; - struct ifnet *ifp = sc->are_ifp; - int cons, prog, packet_len, error; - struct are_desc *cur_rx; - struct mbuf *m; - - ARE_LOCK_ASSERT(sc); - - cons = sc->are_cdata.are_rx_cons; - - bus_dmamap_sync(sc->are_cdata.are_rx_ring_tag, - sc->are_cdata.are_rx_ring_map, - BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); - - for (prog = 0; prog < ARE_RX_RING_CNT; ARE_INC(cons, ARE_RX_RING_CNT)) { - cur_rx = &sc->are_rdata.are_rx_ring[cons]; - rxd = &sc->are_cdata.are_rxdesc[cons]; - m = rxd->rx_m; - - if ((cur_rx->are_stat & ADSTAT_OWN) == ADSTAT_OWN) - break; - - prog++; - - packet_len = ADSTAT_Rx_LENGTH(cur_rx->are_stat); - /* Assume it's error */ - error = 1; - - if (packet_len < 64) - if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); - else if ((cur_rx->are_stat & ADSTAT_Rx_DE) == 0) { - error = 0; - bus_dmamap_sync(sc->are_cdata.are_rx_tag, rxd->rx_dmamap, - BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); - m = rxd->rx_m; - /* Skip 4 bytes of CRC */ - m->m_pkthdr.len = m->m_len = packet_len - ETHER_CRC_LEN; - are_fixup_rx(m); - m->m_pkthdr.rcvif = ifp; - if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1); - - ARE_UNLOCK(sc); - (*ifp->if_input)(ifp, m); - ARE_LOCK(sc); - } - - if (error) { - /* Restore CONTROL and CA values, reset DEVCS */ - cur_rx->are_stat = rxd->saved_ctl; - cur_rx->are_addr = rxd->saved_ca; - cur_rx->are_devcs = 0; - } - else { - /* Reinit descriptor */ - cur_rx->are_stat = ADSTAT_OWN; - cur_rx->are_devcs = 0; - if (cons == ARE_RX_RING_CNT - 1) - cur_rx->are_devcs |= ADCTL_ER; - cur_rx->are_addr = 0; - if (are_newbuf(sc, cons) != 0) { - device_printf(sc->are_dev, - "Failed to allocate buffer\n"); - break; - } - } - - bus_dmamap_sync(sc->are_cdata.are_rx_ring_tag, - sc->are_cdata.are_rx_ring_map, - BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); - } - - if (prog > 0) { - sc->are_cdata.are_rx_cons = cons; - - bus_dmamap_sync(sc->are_cdata.are_rx_ring_tag, - sc->are_cdata.are_rx_ring_map, - BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); - } -} - -static void -are_intr(void *arg) -{ - struct are_softc *sc = arg; - uint32_t status; - struct ifnet *ifp = sc->are_ifp; - - ARE_LOCK(sc); - - /* mask out interrupts */ - - status = CSR_READ_4(sc, CSR_STATUS); - if (status) { - CSR_WRITE_4(sc, CSR_STATUS, status); - } - if (status & sc->sc_rxint_mask) { - are_rx(sc); - } - if (status & sc->sc_txint_mask) { - are_tx(sc); - } - - /* Try to get more packets going. */ - are_start(ifp); - - ARE_UNLOCK(sc); -} - -static void -are_tick(void *xsc) -{ -#ifdef ARE_MII - struct are_softc *sc = xsc; - struct mii_data *mii; - - ARE_LOCK_ASSERT(sc); - - mii = device_get_softc(sc->are_miibus); - mii_tick(mii); - callout_reset(&sc->are_stat_callout, hz, are_tick, sc); -#endif -} - -static void -are_hinted_child(device_t bus, const char *dname, int dunit) -{ - BUS_ADD_CHILD(bus, 0, dname, dunit); - device_printf(bus, "hinted child %s%d\n", dname, dunit); -} - -#ifdef ARE_MDIO -static int -aremdio_probe(device_t dev) -{ - device_set_desc(dev, "Atheros AR531x built-in ethernet interface, MDIO controller"); - return(0); -} - -static int -aremdio_attach(device_t dev) -{ - struct are_softc *sc; - int error = 0; - - sc = device_get_softc(dev); - sc->are_dev = dev; - sc->are_rid = 0; - sc->are_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->are_rid, RF_ACTIVE | RF_SHAREABLE); - if (sc->are_res == NULL) { - device_printf(dev, "couldn't map memory\n"); - error = ENXIO; - goto fail; - } - - sc->are_btag = rman_get_bustag(sc->are_res); - sc->are_bhandle = rman_get_bushandle(sc->are_res); - - bus_generic_probe(dev); - bus_enumerate_hinted_children(dev); - error = bus_generic_attach(dev); -fail: - return (error); -} - -static int -aremdio_detach(device_t dev) -{ - return(0); -} -#endif - -#ifdef ARE_DEBUG -void -dump_txdesc(struct are_softc *sc, int pos) -{ - struct are_desc *desc; - - desc = &sc->are_rdata.are_tx_ring[pos]; - device_printf(sc->are_dev, "CSR_TXLIST %08x\n", CSR_READ_4(sc, CSR_TXLIST)); - device_printf(sc->are_dev, "CSR_HTBA %08x\n", CSR_READ_4(sc, CSR_HTBA)); - device_printf(sc->are_dev, "%d TDES0:%08x TDES1:%08x TDES2:%08x TDES3:%08x\n", - pos, desc->are_stat, desc->are_devcs, desc->are_addr, desc->are_link); -} - -void -dump_status_reg(struct are_softc *sc) -{ - uint32_t status; - - /* mask out interrupts */ - - device_printf(sc->are_dev, "CSR_HTBA %08x\n", CSR_READ_4(sc, CSR_HTBA)); - status = CSR_READ_4(sc, CSR_STATUS); - device_printf(sc->are_dev, "CSR5 Status Register EB:%d TS:%d RS:%d NIS:%d AIS:%d ER:%d SE:%d LNF:%d TM:%d RWT:%d RPS:%d RU:%d RI:%d UNF:%d LNP/ANC:%d TJT:%d TU:%d TPS:%d TI:%d\n", - (status >> 23 ) & 7, - (status >> 20 ) & 7, - (status >> 17 ) & 7, - (status >> 16 ) & 1, - (status >> 15 ) & 1, - (status >> 14 ) & 1, - (status >> 13 ) & 1, - (status >> 12 ) & 1, - (status >> 11 ) & 1, - (status >> 9 ) & 1, - (status >> 8 ) & 1, - (status >> 7 ) & 1, - (status >> 6 ) & 1, - (status >> 5 ) & 1, - (status >> 4 ) & 1, - (status >> 3 ) & 1, - (status >> 2 ) & 1, - (status >> 1 ) & 1, - (status >> 0 ) & 1); - -} -#endif diff --git a/sys/mips/atheros/ar531x/if_arereg.h b/sys/mips/atheros/ar531x/if_arereg.h deleted file mode 100644 index 958adec9c96..00000000000 --- a/sys/mips/atheros/ar531x/if_arereg.h +++ /dev/null @@ -1,399 +0,0 @@ -/*- - * Copyright (C) 2007 - * Oleksandr Tymoshenko . All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef __IF_AREREG_H__ -#define __IF_AREREG_H__ - -struct are_desc { - uint32_t are_stat; - uint32_t are_devcs; - uint32_t are_addr; - uint32_t are_link; -}; - -#define ARE_DMASIZE(len) ((len) & ((1 << 11)-1)) -#define ARE_PKTSIZE(len) ((len & 0xffff0000) >> 16) - -#define ARE_RX_RING_CNT 128 -#define ARE_TX_RING_CNT 128 -#define ARE_TX_RING_SIZE sizeof(struct are_desc) * ARE_TX_RING_CNT -#define ARE_RX_RING_SIZE sizeof(struct are_desc) * ARE_RX_RING_CNT - -#define ARE_MIN_FRAMELEN 60 -#define ARE_RING_ALIGN sizeof(struct are_desc) -#define ARE_RX_ALIGN sizeof(uint32_t) -#define ARE_MAXFRAGS 8 -#define ARE_TX_INTR_THRESH 8 - -#define ARE_TX_RING_ADDR(sc, i) \ - ((sc)->are_rdata.are_tx_ring_paddr + sizeof(struct are_desc) * (i)) -#define ARE_RX_RING_ADDR(sc, i) \ - ((sc)->are_rdata.are_rx_ring_paddr + sizeof(struct are_desc) * (i)) -#define ARE_INC(x,y) (x) = (((x) + 1) % y) - -struct are_txdesc { - struct mbuf *tx_m; - bus_dmamap_t tx_dmamap; -}; - -struct are_rxdesc { - struct mbuf *rx_m; - bus_dmamap_t rx_dmamap; - struct are_desc *desc; - /* Use this values on error instead of allocating new mbuf */ - uint32_t saved_ctl, saved_ca; -}; - -struct are_chain_data { - bus_dma_tag_t are_parent_tag; - bus_dma_tag_t are_tx_tag; - struct are_txdesc are_txdesc[ARE_TX_RING_CNT]; - bus_dma_tag_t are_rx_tag; - struct are_rxdesc are_rxdesc[ARE_RX_RING_CNT]; - bus_dma_tag_t are_tx_ring_tag; - bus_dma_tag_t are_rx_ring_tag; - bus_dmamap_t are_tx_ring_map; - bus_dmamap_t are_rx_ring_map; - bus_dmamap_t are_rx_sparemap; - int are_tx_pkts; - int are_tx_prod; - int are_tx_cons; - int are_tx_cnt; - int are_rx_cons; -}; - -struct are_ring_data { - struct are_desc *are_rx_ring; - struct are_desc *are_tx_ring; - bus_addr_t are_rx_ring_paddr; - bus_addr_t are_tx_ring_paddr; -}; - -struct are_softc { - struct ifnet *are_ifp; /* interface info */ - bus_space_handle_t are_bhandle; /* bus space handle */ - bus_space_tag_t are_btag; /* bus space tag */ - device_t are_dev; - uint8_t are_eaddr[ETHER_ADDR_LEN]; - struct resource *are_res; - int are_rid; - struct resource *are_irq; - void *are_intrhand; - u_int32_t sc_inten; /* copy of CSR_INTEN */ - u_int32_t sc_rxint_mask; /* mask of Rx interrupts we want */ - u_int32_t sc_txint_mask; /* mask of Tx interrupts we want */ -#ifdef ARE_MII - device_t are_miibus; -#else - struct ifmedia are_ifmedia; -#endif -#ifdef ARE_MDIO - device_t are_miiproxy; -#endif - bus_dma_tag_t are_parent_tag; - bus_dma_tag_t are_tag; - struct mtx are_mtx; - struct callout are_stat_callout; - struct task are_link_task; - struct are_chain_data are_cdata; - struct are_ring_data are_rdata; - int are_link_status; - int are_detach; - int are_if_flags; /* last if flags */ -}; - -#define ARE_LOCK(_sc) mtx_lock(&(_sc)->are_mtx) -#define ARE_UNLOCK(_sc) mtx_unlock(&(_sc)->are_mtx) -#define ARE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->are_mtx, MA_OWNED) - -/* - * register space access macros - */ -#define CSR_WRITE_4(sc, reg, val) \ - bus_space_write_4(sc->are_btag, sc->are_bhandle, reg, val) - -#define CSR_READ_4(sc, reg) \ - bus_space_read_4(sc->are_btag, sc->are_bhandle, reg) - -/* $NetBSD: aereg.h,v 1.2 2008/04/28 20:23:28 martin Exp $ */ - -/*- - * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, - * NASA Ames Research Center. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Descriptor Status bits common to transmit and receive. - */ -#define ADSTAT_OWN 0x80000000 /* Tulip owns descriptor */ -#define ADSTAT_ES 0x00008000 /* Error Summary */ - -/* - * Descriptor Status bits for Receive Descriptor. - */ -#define ADSTAT_Rx_FF 0x40000000 /* Filtering Fail */ -#define ADSTAT_Rx_FL 0x3fff0000 /* Frame Length including CRC */ -#define ADSTAT_Rx_DE 0x00004000 /* Descriptor Error */ -#define ADSTAT_Rx_LE 0x00001000 /* Length Error */ -#define ADSTAT_Rx_RF 0x00000800 /* Runt Frame */ -#define ADSTAT_Rx_MF 0x00000400 /* Multicast Frame */ -#define ADSTAT_Rx_FS 0x00000200 /* First Descriptor */ -#define ADSTAT_Rx_LS 0x00000100 /* Last Descriptor */ -#define ADSTAT_Rx_TL 0x00000080 /* Frame Too Long */ -#define ADSTAT_Rx_CS 0x00000040 /* Collision Seen */ -#define ADSTAT_Rx_RT 0x00000020 /* Frame Type */ -#define ADSTAT_Rx_RW 0x00000010 /* Receive Watchdog */ -#define ADSTAT_Rx_RE 0x00000008 /* Report on MII Error */ -#define ADSTAT_Rx_DB 0x00000004 /* Dribbling Bit */ -#define ADSTAT_Rx_CE 0x00000002 /* CRC Error */ -#define ADSTAT_Rx_ZER 0x00000001 /* Zero (always 0) */ - -#define ADSTAT_Rx_LENGTH(x) (((x) & ADSTAT_Rx_FL) >> 16) - -/* - * Descriptor Status bits for Transmit Descriptor. - */ -#define ADSTAT_Tx_ES 0x00008000 /* Error Summary */ -#define ADSTAT_Tx_TO 0x00004000 /* Transmit Jabber Timeout */ -#define ADSTAT_Tx_LO 0x00000800 /* Loss of Carrier */ -#define ADSTAT_Tx_NC 0x00000400 /* No Carrier */ -#define ADSTAT_Tx_LC 0x00000200 /* Late Collision */ -#define ADSTAT_Tx_EC 0x00000100 /* Excessive Collisions */ -#define ADSTAT_Tx_HF 0x00000080 /* Heartbeat Fail */ -#define ADSTAT_Tx_CC 0x00000078 /* Collision Count */ -#define ADSTAT_Tx_ED 0x00000004 /* Excessive Deferral */ -#define ADSTAT_Tx_UF 0x00000002 /* Underflow Error */ -#define ADSTAT_Tx_DE 0x00000001 /* Deferred */ - -#define ADSTAT_Tx_COLLISIONS(x) (((x) & ADSTAT_Tx_CC) >> 3) - -/* - * Descriptor Control bits common to transmit and receive. - */ -#define ADCTL_SIZE1 0x000007ff /* Size of buffer 1 */ -#define ADCTL_SIZE1_SHIFT 0 - -#define ADCTL_SIZE2 0x003ff800 /* Size of buffer 2 */ -#define ADCTL_SIZE2_SHIFT 11 - -#define ADCTL_ER 0x02000000 /* End of Ring */ -#define ADCTL_CH 0x01000000 /* Second Address Chained */ - -/* - * Descriptor Control bits for Transmit Descriptor. - */ -#define ADCTL_Tx_IC 0x80000000 /* Interrupt on Completion */ -#define ADCTL_Tx_LS 0x40000000 /* Last Segment */ -#define ADCTL_Tx_FS 0x20000000 /* First Segment */ -#define ADCTL_Tx_AC 0x04000000 /* Add CRC Disable */ -#define ADCTL_Tx_DPD 0x00800000 /* Disabled Padding */ - -/* - * Control registers. - */ - -/* tese are registers only found on this part */ -#define CSR_MACCTL 0x0000 /* mac control */ -#define CSR_MACHI 0x0004 -#define CSR_MACLO 0x0008 -#define CSR_HTHI 0x000C /* multicast table high */ -#define CSR_HTLO 0x0010 /* multicast table low */ -#define CSR_MIIADDR 0x0014 /* mii address */ -#define CSR_MIIDATA 0x0018 /* mii data */ -#define CSR_FLOWC 0x001C /* flow control */ -#define CSR_VL1 0x0020 /* vlan 1 tag */ - -/* these are more or less normal Tulip registers */ -#define CSR_BUSMODE 0x1000 /* bus mode */ -#define CSR_TXPOLL 0x1004 /* tx poll demand */ -#define CSR_RXPOLL 0x1008 /* rx poll demand */ -#define CSR_RXLIST 0x100C /* rx base descriptor address */ -#define CSR_TXLIST 0x1010 /* tx base descriptor address */ -#define CSR_STATUS 0x1014 /* (interrupt) status */ -#define CSR_OPMODE 0x1018 /* operation mode */ -#define CSR_INTEN 0x101C /* interrupt enable */ -#define CSR_MISSED 0x1020 /* missed frame counter */ -#define CSR_HTBA 0x1050 /* host tx buffer address (ro) */ -#define CSR_HRBA 0x1054 /* host rx buffer address (ro) */ - -/* CSR_MACCTL - Mac Control */ -#define MACCTL_RE 0x00000004 /* rx enable */ -#define MACCTL_TE 0x00000008 /* tx enable */ -#define MACCTL_DC 0x00000020 /* deferral check */ -#define MACCTL_PSTR 0x00000100 /* automatic pad strip */ -#define MACCTL_DTRY 0x00000400 /* disable retry */ -#define MACCTL_DBF 0x00000800 /* disable broadcast frames */ -#define MACCTL_LCC 0x00001000 /* late collision control */ -#define MACCTL_HASH 0x00002000 /* hash filtering enable */ -#define MACCTL_HO 0x00008000 /* disable perfect filtering */ -#define MACCTL_PB 0x00010000 /* pass bad frames */ -#define MACCTL_IF 0x00020000 /* inverse filtering */ -#define MACCTL_PR 0x00040000 /* promiscuous mode */ -#define MACCTL_PM 0x00080000 /* pass all multicast */ -#define MACCTL_FDX 0x00100000 /* full duplex mode */ -#define MACCTL_LOOP 0x00600000 /* loopback mask */ -#define MACCTL_LOOP_INT 0x00200000 /* internal loopback */ -#define MACCTL_LOOP_EXT 0x00400000 /* external loopback */ -#define MACCTL_LOOP_NONE 0x00000000 -#define MACCTL_DRO 0x00800000 /* disable receive own */ -#define MACCTL_PS 0x08000000 /* port select, 0 = mii */ -#define MACCTL_HBD 0x10000000 /* heartbeat disable */ -#define MACCTL_BLE 0x40000000 /* mac big endian */ -#define MACCTL_RA 0x80000000 /* receive all packets */ - -/* CSR_MIIADDR - MII Addess */ -#define MIIADDR_BUSY 0x00000001 /* mii busy */ -#define MIIADDR_WRITE 0x00000002 /* mii write */ -#define MIIADDR_REG_MASK 0x000007C0 /* mii register */ -#define MIIADDR_REG_SHIFT 6 -#define MIIADDR_PHY_MASK 0x0000F800 /* mii phy */ -#define MIIADDR_PHY_SHIFT 11 - -#define MIIADDR_GETREG(x) (((x) & MIIADDR_REG) >> 6) -#define MIIADDR_PUTREG(x) (((x) << 6) & MIIADR_REG) -#define MIIADDR_GETPHY(x) (((x) & MIIADDR_PHY) >> 11) -#define MIIADDR_PUTPHY(x) (((x) << 6) & MIIADR_PHY) - -/* CSR_FLOWC - Flow Control */ -#define FLOWC_FCB 0x00000001 /* flow control busy */ -#define FLOWC_FCE 0x00000002 /* flow control enable */ -#define FLOWC_PCF 0x00000004 /* pass control frames */ -#define FLOWC_PT 0xffff0000 /* pause time */ - -/* CSR_BUSMODE - Bus Mode */ -#define BUSMODE_SWR 0x00000001 /* software reset */ -#define BUSMODE_BAR 0x00000002 /* bus arbitration */ -#define BUSMODE_DSL 0x0000007c /* descriptor skip length */ -#define BUSMODE_BLE 0x00000080 /* data buf endian */ - /* programmable burst length */ -#define BUSMODE_PBL_DEFAULT 0x00000000 /* default value */ -#define BUSMODE_PBL_1LW 0x00000100 /* 1 longword */ -#define BUSMODE_PBL_2LW 0x00000200 /* 2 longwords */ -#define BUSMODE_PBL_4LW 0x00000400 /* 4 longwords */ -#define BUSMODE_PBL_8LW 0x00000800 /* 8 longwords */ -#define BUSMODE_PBL_16LW 0x00001000 /* 16 longwords */ -#define BUSMODE_PBL_32LW 0x00002000 /* 32 longwords */ -#define BUSMODE_DBO 0x00100000 /* descriptor endian */ -#define BUSMODE_ALIGN_16B 0x01000000 /* force oddhw rx buf align */ - -/* CSR_TXPOLL - Transmit Poll Demand */ -#define TXPOLL_TPD 0x00000001 /* transmit poll demand */ - -/* CSR_RXPOLL - Receive Poll Demand */ -#define RXPOLL_RPD 0x00000001 /* receive poll demand */ - -/* CSR_STATUS - Status */ -#define STATUS_TI 0x00000001 /* transmit interrupt */ -#define STATUS_TPS 0x00000002 /* transmit process stopped */ -#define STATUS_TU 0x00000004 /* transmit buffer unavail */ -#define STATUS_TJT 0x00000008 /* transmit jabber timeout */ -#define STATUS_UNF 0x00000020 /* transmit underflow */ -#define STATUS_RI 0x00000040 /* receive interrupt */ -#define STATUS_RU 0x00000080 /* receive buffer unavail */ -#define STATUS_RPS 0x00000100 /* receive process stopped */ -#define STATUS_ETI 0x00000400 /* early transmit interrupt */ -#define STATUS_SE 0x00002000 /* system error */ -#define STATUS_ER 0x00004000 /* early receive (21041) */ -#define STATUS_AIS 0x00008000 /* abnormal intr summary */ -#define STATUS_NIS 0x00010000 /* normal interrupt summary */ -#define STATUS_RS 0x000e0000 /* receive process state */ -#define STATUS_RS_STOPPED 0x00000000 /* Stopped */ -#define STATUS_RS_FETCH 0x00020000 /* Running - fetch receive - descriptor */ -#define STATUS_RS_CHECK 0x00040000 /* Running - check for end - of receive */ -#define STATUS_RS_WAIT 0x00060000 /* Running - wait for packet */ -#define STATUS_RS_SUSPENDED 0x00080000 /* Suspended */ -#define STATUS_RS_CLOSE 0x000a0000 /* Running - close receive - descriptor */ -#define STATUS_RS_FLUSH 0x000c0000 /* Running - flush current - frame from FIFO */ -#define STATUS_RS_QUEUE 0x000e0000 /* Running - queue current - frame from FIFO into - buffer */ -#define STATUS_TS 0x00700000 /* transmit process state */ -#define STATUS_TS_STOPPED 0x00000000 /* Stopped */ -#define STATUS_TS_FETCH 0x00100000 /* Running - fetch transmit - descriptor */ -#define STATUS_TS_WAIT 0x00200000 /* Running - wait for end - of transmission */ -#define STATUS_TS_READING 0x00300000 /* Running - read buffer from - memory and queue into - FIFO */ -#define STATUS_TS_SUSPENDED 0x00600000 /* Suspended */ -#define STATUS_TS_CLOSE 0x00700000 /* Running - close transmit - descriptor */ -#define STATUS_TX_ABORT 0x00800000 /* Transmit bus abort */ -#define STATUS_RX_ABORT 0x01000000 /* Transmit bus abort */ - -/* CSR_OPMODE - Operation Mode */ -#define OPMODE_SR 0x00000002 /* start receive */ -#define OPMODE_OSF 0x00000004 /* operate on second frame */ -#define OPMODE_ST 0x00002000 /* start transmitter */ -#define OPMODE_TR 0x0000c000 /* threshold control */ -#define OPMODE_TR_32 0x00000000 /* 32 words */ -#define OPMODE_TR_64 0x00004000 /* 64 words */ -#define OPMODE_TR_128 0x00008000 /* 128 words */ -#define OPMODE_TR_256 0x0000c000 /* 256 words */ -#define OPMODE_SF 0x00200000 /* store and forward mode */ - -/* CSR_INTEN - Interrupt Enable */ - /* See bits for CSR_STATUS -- Status */ - -/* CSR_MISSED - Missed Frames */ -#define MISSED_MFC 0xffff0000 /* missed packet count */ -#define MISSED_FOC 0x0000ffff /* fifo overflow counter */ - -#define MISSED_GETMFC(x) ((x) & MISSED_MFC) -#define MISSED_GETFOC(x) (((x) & MISSED_FOC) >> 16) - -#endif /* __IF_AREREG_H__ */ diff --git a/sys/mips/atheros/ar531x/uart_bus_ar5315.c b/sys/mips/atheros/ar531x/uart_bus_ar5315.c deleted file mode 100644 index b34e0622ac0..00000000000 --- a/sys/mips/atheros/ar531x/uart_bus_ar5315.c +++ /dev/null @@ -1,87 +0,0 @@ -/*- - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - */ -#include "opt_uart.h" - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include -#include - -#include "uart_if.h" - -static int uart_ar5315_probe(device_t dev); -extern struct uart_class uart_ar5315_uart_class; - -static device_method_t uart_ar5315_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, uart_ar5315_probe), - DEVMETHOD(device_attach, uart_bus_attach), - DEVMETHOD(device_detach, uart_bus_detach), - DEVMETHOD_END -}; - -static driver_t uart_ar5315_driver = { - uart_driver_name, - uart_ar5315_methods, - sizeof(struct uart_softc), -}; - -extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs; - -static int -uart_ar5315_probe(device_t dev) -{ - struct uart_softc *sc; - uint64_t freq; - - freq = ar531x_ahb_freq(); - - sc = device_get_softc(dev); - sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs); - sc->sc_class = &uart_ns8250_class; - bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); - sc->sc_sysdev->bas.regshft = 2; - sc->sc_sysdev->bas.bst = mips_bus_space_generic; - sc->sc_sysdev->bas.bsh = ar531x_uart_addr() + 3; - sc->sc_bas.regshft = 2; - sc->sc_bas.bst = mips_bus_space_generic; - sc->sc_bas.bsh = ar531x_uart_addr() + 3; - - return (uart_bus_probe(dev, 2, 0, freq, 0, 0, 0)); -} - -DRIVER_MODULE(uart, apb, uart_ar5315_driver, uart_devclass, 0, 0); diff --git a/sys/mips/atheros/ar531x/uart_cpu_ar5315.c b/sys/mips/atheros/ar531x/uart_cpu_ar5315.c deleted file mode 100644 index cdb8a2421e6..00000000000 --- a/sys/mips/atheros/ar531x/uart_cpu_ar5315.c +++ /dev/null @@ -1,74 +0,0 @@ -/*- - * Copyright (c) 2009 Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ -#include "opt_uart.h" - -#include -#include -#include -#include - -#include - -#include -#include - -#include -#include -#include - -bus_space_tag_t uart_bus_space_io; -bus_space_tag_t uart_bus_space_mem; - -int -uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2) -{ - return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0); -} - -int -uart_cpu_getdev(int devtype, struct uart_devinfo *di) -{ - uint64_t freq; - - freq = ar531x_ahb_freq(); - - di->ops = uart_getops(&uart_ns8250_class); - di->bas.chan = 0; - di->bas.bst = ar71xx_bus_space_reversed; - di->bas.regshft = 2; - di->bas.rclk = freq; - di->baudrate = 9600; // RedBoot default is 9600 - di->databits = 8; - di->stopbits = 1; - - di->parity = UART_PARITY_NONE; - - uart_bus_space_io = NULL; - uart_bus_space_mem = ar71xx_bus_space_reversed; - di->bas.bsh = ar531x_uart_addr(); - return (0); -} diff --git a/sys/mips/atheros/ar71xx_bus_space_reversed.c b/sys/mips/atheros/ar71xx_bus_space_reversed.c deleted file mode 100644 index 28e91818a19..00000000000 --- a/sys/mips/atheros/ar71xx_bus_space_reversed.c +++ /dev/null @@ -1,181 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#include -#include -#include -#include - -#include -#include - -static bs_r_1_proto(reversed); -static bs_r_2_proto(reversed); -static bs_w_1_proto(reversed); -static bs_w_2_proto(reversed); - -/* - * Bus space that handles offsets in word for 1/2 bytes read/write access. - * Byte order of values is handled by device drivers itself. - */ -static struct bus_space bus_space_reversed = { - /* cookie */ - (void *) 0, - - /* mapping/unmapping */ - generic_bs_map, - generic_bs_unmap, - generic_bs_subregion, - - /* allocation/deallocation */ - NULL, - NULL, - - /* barrier */ - generic_bs_barrier, - - /* read (single) */ - reversed_bs_r_1, - reversed_bs_r_2, - generic_bs_r_4, - NULL, - - /* read multiple */ - generic_bs_rm_1, - generic_bs_rm_2, - generic_bs_rm_4, - NULL, - - /* read region */ - generic_bs_rr_1, - generic_bs_rr_2, - generic_bs_rr_4, - NULL, - - /* write (single) */ - reversed_bs_w_1, - reversed_bs_w_2, - generic_bs_w_4, - NULL, - - /* write multiple */ - generic_bs_wm_1, - generic_bs_wm_2, - generic_bs_wm_4, - NULL, - - /* write region */ - NULL, - generic_bs_wr_2, - generic_bs_wr_4, - NULL, - - /* set multiple */ - NULL, - NULL, - NULL, - NULL, - - /* set region */ - NULL, - generic_bs_sr_2, - generic_bs_sr_4, - NULL, - - /* copy */ - NULL, - generic_bs_c_2, - NULL, - NULL, - - /* read (single) stream */ - generic_bs_r_1, - generic_bs_r_2, - generic_bs_r_4, - NULL, - - /* read multiple stream */ - generic_bs_rm_1, - generic_bs_rm_2, - generic_bs_rm_4, - NULL, - - /* read region stream */ - generic_bs_rr_1, - generic_bs_rr_2, - generic_bs_rr_4, - NULL, - - /* write (single) stream */ - generic_bs_w_1, - generic_bs_w_2, - generic_bs_w_4, - NULL, - - /* write multiple stream */ - generic_bs_wm_1, - generic_bs_wm_2, - generic_bs_wm_4, - NULL, - - /* write region stream */ - NULL, - generic_bs_wr_2, - generic_bs_wr_4, - NULL, -}; - -bus_space_tag_t ar71xx_bus_space_reversed = &bus_space_reversed; - -static uint8_t -reversed_bs_r_1(void *t, bus_space_handle_t h, bus_size_t o) -{ - - return readb(h + (o &~ 3) + (3 - (o & 3))); -} - -static void -reversed_bs_w_1(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v) -{ - - writeb(h + (o &~ 3) + (3 - (o & 3)), v); -} - -static uint16_t -reversed_bs_r_2(void *t, bus_space_handle_t h, bus_size_t o) -{ - - return readw(h + (o &~ 3) + (2 - (o & 3))); -} - -static void -reversed_bs_w_2(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v) -{ - - writew(h + (o &~ 3) + (2 - (o & 3)), v); -} diff --git a/sys/mips/atheros/ar71xx_bus_space_reversed.h b/sys/mips/atheros/ar71xx_bus_space_reversed.h deleted file mode 100644 index a8cc35c566b..00000000000 --- a/sys/mips/atheros/ar71xx_bus_space_reversed.h +++ /dev/null @@ -1,35 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef __AR71XX_BUS_SPACE_REVERSEDH__ -#define __AR71XX_BUS_SPACE_REVERSEDH__ - -extern bus_space_tag_t ar71xx_bus_space_reversed; - -#endif /* __AR71XX_BUS_SPACE_REVERSEDH__ */ diff --git a/sys/mips/atheros/ar71xx_caldata.c b/sys/mips/atheros/ar71xx_caldata.c deleted file mode 100644 index 00bca664781..00000000000 --- a/sys/mips/atheros/ar71xx_caldata.c +++ /dev/null @@ -1,174 +0,0 @@ -/*- - * Copyright (c) 2017, Adrian Chadd . - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ar71xx.h" - -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include -#include - -struct ar71xx_caldata_softc { - device_t sc_dev; -}; - -static int -ar71xx_caldata_probe(device_t dev) -{ - - return (BUS_PROBE_NOWILDCARD); -} - -/* XXX TODO: unify with what's in ar71xx_fixup.c */ - -/* - * Create a calibration block from memory mapped SPI data for use by - * various drivers. Right now it's just ath(4) but later board support - * will include 802.11ac NICs with calibration data in NOR flash. - * - * (Yes, there are a handful of QCA MIPS boards with QCA9880v2 802.11ac chips - * with calibration data in flash..) - */ -static void -ar71xx_platform_create_cal_data(device_t dev, int id, long int flash_addr, - int size) -{ - char buf[64]; - uint16_t *cal_data = (uint16_t *) MIPS_PHYS_TO_KSEG1(flash_addr); - void *eeprom = NULL; - const struct firmware *fw = NULL; - - device_printf(dev, "EEPROM firmware: 0x%lx @ %d bytes\n", - flash_addr, size); - - eeprom = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO); - if (! eeprom) { - device_printf(dev, "%s: malloc failed for '%s', aborting EEPROM\n", - __func__, buf); - return; - } - - memcpy(eeprom, cal_data, size); - - /* - * Generate a flash EEPROM 'firmware' from the given memory - * region. Since the SPI controller will eventually - * go into port-IO mode instead of memory-mapped IO - * mode, a copy of the EEPROM contents is required. - */ - - snprintf(buf, sizeof(buf), "%s.%d.map.%d.eeprom_firmware", - device_get_name(dev), - device_get_unit(dev), - id); - - fw = firmware_register(buf, eeprom, size, 1, NULL); - if (fw == NULL) { - device_printf(dev, "%s: firmware_register (%s) failed\n", - __func__, buf); - free(eeprom, M_DEVBUF); - return; - } - device_printf(dev, "device EEPROM '%s' registered\n", buf); -} - -/* - * Iterate through a list of early-boot hints creating calibration - * data firmware chunks for AHB (ie, non-PCI) devices with calibration - * data. - */ -static int -ar71xx_platform_check_eeprom_hints(device_t dev) -{ - char buf[64]; - long int addr; - int size; - int i; - - for (i = 0; i < 8; i++) { - snprintf(buf, sizeof(buf), "map.%d.ath_fixup_addr", i); - if (resource_long_value(device_get_name(dev), - device_get_unit(dev), buf, &addr) != 0) - break; - snprintf(buf, sizeof(buf), "map.%d.ath_fixup_size", i); - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), buf, &size) != 0) - break; - device_printf(dev, "map.%d.ath_fixup_addr=0x%08x; size=%d\n", - i, (int) addr, size); - (void) ar71xx_platform_create_cal_data(dev, i, addr, size); - } - - return (0); -} - -static int -ar71xx_caldata_attach(device_t dev) -{ - - device_add_child(dev, "nexus", -1); - ar71xx_platform_check_eeprom_hints(dev); - return (bus_generic_attach(dev)); -} - -static device_method_t ar71xx_caldata_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ar71xx_caldata_probe), - DEVMETHOD(device_attach, ar71xx_caldata_attach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - DEVMETHOD_END -}; - -static driver_t ar71xx_caldata_driver = { - "ar71xx_caldata", - ar71xx_caldata_methods, - sizeof(struct ar71xx_caldata_softc), -}; - -static devclass_t ar71xx_caldata_devclass; - -DRIVER_MODULE(ar71xx_caldata, nexus, ar71xx_caldata_driver, ar71xx_caldata_devclass, 0, 0); diff --git a/sys/mips/atheros/ar71xx_chip.c b/sys/mips/atheros/ar71xx_chip.c deleted file mode 100644 index 52cabef2329..00000000000 --- a/sys/mips/atheros/ar71xx_chip.c +++ /dev/null @@ -1,337 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -/* XXX these should replace the current definitions in ar71xxreg.h */ -/* XXX perhaps an ar71xx_chip.h header file? */ -#define AR71XX_PLL_REG_CPU_CONFIG AR71XX_PLL_CPU_BASE + 0x00 -#define AR71XX_PLL_REG_SEC_CONFIG AR71XX_PLL_CPU_BASE + 0x04 -#define AR71XX_PLL_REG_ETH0_INT_CLOCK AR71XX_PLL_CPU_BASE + 0x10 -#define AR71XX_PLL_REG_ETH1_INT_CLOCK AR71XX_PLL_CPU_BASE + 0x14 - -#define AR71XX_PLL_DIV_SHIFT 3 -#define AR71XX_PLL_DIV_MASK 0x1f -#define AR71XX_CPU_DIV_SHIFT 16 -#define AR71XX_CPU_DIV_MASK 0x3 -#define AR71XX_DDR_DIV_SHIFT 18 -#define AR71XX_DDR_DIV_MASK 0x3 -#define AR71XX_AHB_DIV_SHIFT 20 -#define AR71XX_AHB_DIV_MASK 0x7 - -/* XXX these shouldn't be in here - this file is a per-chip file */ -/* XXX these should be in the top-level ar71xx type, not ar71xx -chip */ -uint32_t u_ar71xx_cpu_freq; -uint32_t u_ar71xx_ahb_freq; -uint32_t u_ar71xx_ddr_freq; -uint32_t u_ar71xx_uart_freq; -uint32_t u_ar71xx_wdt_freq; -uint32_t u_ar71xx_refclk; -uint32_t u_ar71xx_mdio_freq; - -static void -ar71xx_chip_detect_mem_size(void) -{ -} - -static void -ar71xx_chip_detect_sys_frequency(void) -{ - uint32_t pll; - uint32_t freq; - uint32_t div; - - u_ar71xx_mdio_freq = u_ar71xx_refclk = AR71XX_BASE_FREQ; - - pll = ATH_READ_REG(AR71XX_PLL_REG_CPU_CONFIG); - - div = ((pll >> AR71XX_PLL_DIV_SHIFT) & AR71XX_PLL_DIV_MASK) + 1; - freq = div * AR71XX_BASE_FREQ; - - div = ((pll >> AR71XX_CPU_DIV_SHIFT) & AR71XX_CPU_DIV_MASK) + 1; - u_ar71xx_cpu_freq = freq / div; - - div = ((pll >> AR71XX_DDR_DIV_SHIFT) & AR71XX_DDR_DIV_MASK) + 1; - u_ar71xx_ddr_freq = freq / div; - - div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2; - u_ar71xx_ahb_freq = u_ar71xx_cpu_freq / div; - u_ar71xx_wdt_freq = u_ar71xx_cpu_freq / div; - u_ar71xx_uart_freq = u_ar71xx_cpu_freq / div; -} - -/* - * This does not lock the CPU whilst doing the work! - */ -static void -ar71xx_chip_device_stop(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR71XX_RST_RESET); - ATH_WRITE_REG(AR71XX_RST_RESET, reg | mask); -} - -static void -ar71xx_chip_device_start(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR71XX_RST_RESET); - ATH_WRITE_REG(AR71XX_RST_RESET, reg & ~mask); -} - -static int -ar71xx_chip_device_stopped(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR71XX_RST_RESET); - return ((reg & mask) == mask); -} - -void -ar71xx_chip_set_mii_speed(uint32_t unit, uint32_t speed) -{ - uint32_t val, reg, ctrl; - - switch (unit) { - case 0: - reg = AR71XX_MII0_CTRL; - break; - case 1: - reg = AR71XX_MII1_CTRL; - break; - default: - printf("%s: invalid MII unit set for arge unit: %d\n", - __func__, unit); - return; - } - - switch (speed) { - case 10: - ctrl = MII_CTRL_SPEED_10; - break; - case 100: - ctrl = MII_CTRL_SPEED_100; - break; - case 1000: - ctrl = MII_CTRL_SPEED_1000; - break; - default: - printf("%s: invalid MII speed (%d) set for arge unit: %d\n", - __func__, speed, unit); - return; - } - - val = ATH_READ_REG(reg); - val &= ~(MII_CTRL_SPEED_MASK << MII_CTRL_SPEED_SHIFT); - val |= (ctrl & MII_CTRL_SPEED_MASK) << MII_CTRL_SPEED_SHIFT; - ATH_WRITE_REG(reg, val); -} - -void -ar71xx_chip_set_mii_if(uint32_t unit, uint32_t mii_mode) -{ - uint32_t val, reg, mii_if; - - switch (unit) { - case 0: - reg = AR71XX_MII0_CTRL; - if (mii_mode == AR71XX_MII_MODE_GMII) - mii_if = MII0_CTRL_IF_GMII; - else if (mii_mode == AR71XX_MII_MODE_MII) - mii_if = MII0_CTRL_IF_MII; - else if (mii_mode == AR71XX_MII_MODE_RGMII) - mii_if = MII0_CTRL_IF_RGMII; - else if (mii_mode == AR71XX_MII_MODE_RMII) - mii_if = MII0_CTRL_IF_RMII; - else { - printf("%s: invalid MII mode (%d) for unit %d\n", - __func__, mii_mode, unit); - return; - } - break; - case 1: - reg = AR71XX_MII1_CTRL; - if (mii_mode == AR71XX_MII_MODE_RGMII) - mii_if = MII1_CTRL_IF_RGMII; - else if (mii_mode == AR71XX_MII_MODE_RMII) - mii_if = MII1_CTRL_IF_RMII; - else { - printf("%s: invalid MII mode (%d) for unit %d\n", - __func__, mii_mode, unit); - return; - } - break; - default: - printf("%s: invalid MII unit set for arge unit: %d\n", - __func__, unit); - return; - } - - val = ATH_READ_REG(reg); - val &= ~(MII_CTRL_IF_MASK << MII_CTRL_IF_SHIFT); - val |= (mii_if & MII_CTRL_IF_MASK) << MII_CTRL_IF_SHIFT; - ATH_WRITE_REG(reg, val); -} - -/* Speed is either 10, 100 or 1000 */ -static void -ar71xx_chip_set_pll_ge(int unit, int speed, uint32_t pll) -{ - - switch (unit) { - case 0: - ar71xx_write_pll(AR71XX_PLL_SEC_CONFIG, - AR71XX_PLL_ETH_INT0_CLK, pll, - AR71XX_PLL_ETH0_SHIFT); - break; - case 1: - ar71xx_write_pll(AR71XX_PLL_SEC_CONFIG, - AR71XX_PLL_ETH_INT1_CLK, pll, - AR71XX_PLL_ETH1_SHIFT); - break; - default: - printf("%s: invalid PLL set for arge unit: %d\n", - __func__, unit); - return; - } -} - -static void -ar71xx_chip_ddr_flush(ar71xx_flush_ddr_id_t id) -{ - - switch (id) { - case AR71XX_CPU_DDR_FLUSH_GE0: - ar71xx_ddr_flush(AR71XX_WB_FLUSH_GE0); - break; - case AR71XX_CPU_DDR_FLUSH_GE1: - ar71xx_ddr_flush(AR71XX_WB_FLUSH_GE1); - break; - case AR71XX_CPU_DDR_FLUSH_USB: - ar71xx_ddr_flush(AR71XX_WB_FLUSH_USB); - break; - case AR71XX_CPU_DDR_FLUSH_PCIE: - ar71xx_ddr_flush(AR71XX_WB_FLUSH_PCI); - break; - default: - printf("%s: invalid DDR flush id (%d)\n", __func__, id); - break; - } -} - -static uint32_t -ar71xx_chip_get_eth_pll(unsigned int mac, int speed) -{ - uint32_t pll; - - switch (speed) { - case 10: - pll = PLL_ETH_INT_CLK_10; - break; - case 100: - pll = PLL_ETH_INT_CLK_100; - break; - case 1000: - pll = PLL_ETH_INT_CLK_1000; - break; - default: - printf("%s%d: invalid speed %d\n", __func__, mac, speed); - pll = 0; - } - - return (pll); -} - -static void -ar71xx_chip_init_usb_peripheral(void) -{ - - ar71xx_device_stop(RST_RESET_USB_OHCI_DLL | - RST_RESET_USB_HOST | RST_RESET_USB_PHY); - DELAY(1000); - - ar71xx_device_start(RST_RESET_USB_OHCI_DLL | - RST_RESET_USB_HOST | RST_RESET_USB_PHY); - DELAY(1000); - - ATH_WRITE_REG(AR71XX_USB_CTRL_CONFIG, - USB_CTRL_CONFIG_OHCI_DES_SWAP | - USB_CTRL_CONFIG_OHCI_BUF_SWAP | - USB_CTRL_CONFIG_EHCI_DES_SWAP | - USB_CTRL_CONFIG_EHCI_BUF_SWAP); - - ATH_WRITE_REG(AR71XX_USB_CTRL_FLADJ, - (32 << USB_CTRL_FLADJ_HOST_SHIFT) | - (3 << USB_CTRL_FLADJ_A5_SHIFT)); - - DELAY(1000); -} - -struct ar71xx_cpu_def ar71xx_chip_def = { - &ar71xx_chip_detect_mem_size, - &ar71xx_chip_detect_sys_frequency, - &ar71xx_chip_device_stop, - &ar71xx_chip_device_start, - &ar71xx_chip_device_stopped, - &ar71xx_chip_set_pll_ge, - &ar71xx_chip_set_mii_speed, - &ar71xx_chip_set_mii_if, - &ar71xx_chip_get_eth_pll, - &ar71xx_chip_ddr_flush, - &ar71xx_chip_init_usb_peripheral, -}; diff --git a/sys/mips/atheros/ar71xx_chip.h b/sys/mips/atheros/ar71xx_chip.h deleted file mode 100644 index a10fc859c0b..00000000000 --- a/sys/mips/atheros/ar71xx_chip.h +++ /dev/null @@ -1,37 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef __AR71XX_CHIP_H__ -#define __AR71XX_CHIP_H__ - -extern struct ar71xx_cpu_def ar71xx_chip_def; -extern void ar71xx_chip_set_mii_speed(uint32_t unit, uint32_t speed); -extern void ar71xx_chip_set_mii_if(uint32_t unit, uint32_t mii_if); - -#endif diff --git a/sys/mips/atheros/ar71xx_cpudef.h b/sys/mips/atheros/ar71xx_cpudef.h deleted file mode 100644 index 88616b69b32..00000000000 --- a/sys/mips/atheros/ar71xx_cpudef.h +++ /dev/null @@ -1,181 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef __AR71XX_CPUDEF_H__ -#define __AR71XX_CPUDEF_H__ - -typedef enum { - AR71XX_CPU_DDR_FLUSH_GE0, - AR71XX_CPU_DDR_FLUSH_GE1, - AR71XX_CPU_DDR_FLUSH_USB, - AR71XX_CPU_DDR_FLUSH_PCIE, - AR71XX_CPU_DDR_FLUSH_WMAC, - AR71XX_CPU_DDR_FLUSH_PCIE_EP, - AR71XX_CPU_DDR_FLUSH_CHECKSUM, -} ar71xx_flush_ddr_id_t; - -struct ar71xx_cpu_def { - void (* detect_mem_size) (void); - void (* detect_sys_frequency) (void); - void (* ar71xx_chip_device_stop) (uint32_t); - void (* ar71xx_chip_device_start) (uint32_t); - int (* ar71xx_chip_device_stopped) (uint32_t); - void (* ar71xx_chip_set_pll_ge) (int, int, uint32_t); - void (* ar71xx_chip_set_mii_speed) (uint32_t, uint32_t); - void (* ar71xx_chip_set_mii_if) (uint32_t, ar71xx_mii_mode); - uint32_t (* ar71xx_chip_get_eth_pll) (unsigned int, int); - - /* - * From Linux - Handling this IRQ is a bit special. - * AR71xx - AR71XX_DDR_REG_FLUSH_PCI - * AR724x - AR724X_DDR_REG_FLUSH_PCIE - * AR91xx - AR91XX_DDR_REG_FLUSH_WMAC - * - * These are set when STATUSF_IP2 is set in regiser c0. - * This flush is done before the IRQ is handled to make - * sure the driver correctly sees any memory updates. - */ - void (* ar71xx_chip_ddr_flush) (ar71xx_flush_ddr_id_t id); - /* - * The USB peripheral init code is subtly different for - * each chip. - */ - void (* ar71xx_chip_init_usb_peripheral) (void); - - void (* ar71xx_chip_reset_ethernet_switch) (void); - - void (* ar71xx_chip_reset_wmac) (void); - - void (* ar71xx_chip_init_gmac) (void); - - void (* ar71xx_chip_reset_nfc) (int); - - void (* ar71xx_chip_gpio_out_configure) (int, uint8_t); -}; - -extern struct ar71xx_cpu_def * ar71xx_cpu_ops; - -static inline void ar71xx_detect_sys_frequency(void) -{ - ar71xx_cpu_ops->detect_sys_frequency(); -} - -static inline void ar71xx_device_stop(uint32_t mask) -{ - ar71xx_cpu_ops->ar71xx_chip_device_stop(mask); -} - -static inline void ar71xx_device_start(uint32_t mask) -{ - ar71xx_cpu_ops->ar71xx_chip_device_start(mask); -} - -static inline int ar71xx_device_stopped(uint32_t mask) -{ - return ar71xx_cpu_ops->ar71xx_chip_device_stopped(mask); -} - -static inline void ar71xx_device_set_pll_ge(int unit, int speed, uint32_t pll) -{ - ar71xx_cpu_ops->ar71xx_chip_set_pll_ge(unit, speed, pll); -} - -static inline void ar71xx_device_set_mii_speed(int unit, int speed) -{ - ar71xx_cpu_ops->ar71xx_chip_set_mii_speed(unit, speed); -} - -static inline void ar71xx_device_set_mii_if(int unit, ar71xx_mii_mode mii_cfg) -{ - ar71xx_cpu_ops->ar71xx_chip_set_mii_if(unit, mii_cfg); -} - -static inline void ar71xx_device_flush_ddr(ar71xx_flush_ddr_id_t id) -{ - ar71xx_cpu_ops->ar71xx_chip_ddr_flush(id); -} - -static inline uint32_t ar71xx_device_get_eth_pll(unsigned int unit, int speed) -{ - return (ar71xx_cpu_ops->ar71xx_chip_get_eth_pll(unit, speed)); -} - -static inline void ar71xx_init_usb_peripheral(void) -{ - ar71xx_cpu_ops->ar71xx_chip_init_usb_peripheral(); -} - -static inline void ar71xx_reset_ethernet_switch(void) -{ - if (ar71xx_cpu_ops->ar71xx_chip_reset_ethernet_switch) - ar71xx_cpu_ops->ar71xx_chip_reset_ethernet_switch(); -} - -static inline void ar71xx_reset_wmac(void) -{ - if (ar71xx_cpu_ops->ar71xx_chip_reset_wmac) - ar71xx_cpu_ops->ar71xx_chip_reset_wmac(); -} - -static inline void ar71xx_init_gmac(void) -{ - if (ar71xx_cpu_ops->ar71xx_chip_init_gmac) - ar71xx_cpu_ops->ar71xx_chip_init_gmac(); -} - -static inline void ar71xx_reset_nfc(int active) -{ - - if (ar71xx_cpu_ops->ar71xx_chip_reset_nfc) - ar71xx_cpu_ops->ar71xx_chip_reset_nfc(active); -} - -static inline void ar71xx_gpio_ouput_configure(int gpio, uint8_t func) -{ - if (ar71xx_cpu_ops->ar71xx_chip_gpio_out_configure) - ar71xx_cpu_ops->ar71xx_chip_gpio_out_configure(gpio, func); -} - -/* XXX shouldn't be here! */ -extern uint32_t u_ar71xx_refclk; -extern uint32_t u_ar71xx_cpu_freq; -extern uint32_t u_ar71xx_ahb_freq; -extern uint32_t u_ar71xx_ddr_freq; -extern uint32_t u_ar71xx_uart_freq; -extern uint32_t u_ar71xx_wdt_freq; -extern uint32_t u_ar71xx_mdio_freq; -static inline uint64_t ar71xx_refclk(void) { return u_ar71xx_refclk; } -static inline uint64_t ar71xx_cpu_freq(void) { return u_ar71xx_cpu_freq; } -static inline uint64_t ar71xx_ahb_freq(void) { return u_ar71xx_ahb_freq; } -static inline uint64_t ar71xx_ddr_freq(void) { return u_ar71xx_ddr_freq; } -static inline uint64_t ar71xx_uart_freq(void) { return u_ar71xx_uart_freq; } -static inline uint64_t ar71xx_wdt_freq(void) { return u_ar71xx_wdt_freq; } -static inline uint64_t ar71xx_mdio_freq(void) { return u_ar71xx_mdio_freq; } - -#endif diff --git a/sys/mips/atheros/ar71xx_ehci.c b/sys/mips/atheros/ar71xx_ehci.c deleted file mode 100644 index c19e917f22b..00000000000 --- a/sys/mips/atheros/ar71xx_ehci.c +++ /dev/null @@ -1,291 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2008 Sam Leffler. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * AR71XX attachment driver for the USB Enhanced Host Controller. - */ - -#include -#include "opt_bus.h" - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include /* for stuff in ar71xx_cpudef.h */ -#include -#include - -#define EHCI_HC_DEVSTR "AR71XX Integrated USB 2.0 controller" - -#define EHCI_USBMODE 0x68 /* USB Device mode register */ -#define EHCI_UM_CM 0x00000003 /* R/WO Controller Mode */ -#define EHCI_UM_CM_HOST 0x3 /* Host Controller */ - -struct ar71xx_ehci_softc { - ehci_softc_t base; /* storage for EHCI code */ -}; - -static device_attach_t ar71xx_ehci_attach; -static device_detach_t ar71xx_ehci_detach; - -bs_r_1_proto(reversed); -bs_w_1_proto(reversed); - -static void -ar71xx_ehci_post_reset(struct ehci_softc *ehci_softc) -{ - uint32_t usbmode; - - /* Force HOST mode */ - usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM); - usbmode &= ~EHCI_UM_CM; - usbmode |= EHCI_UM_CM_HOST; - EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode); -} - -static int -ar71xx_ehci_probe(device_t self) -{ - - device_set_desc(self, EHCI_HC_DEVSTR); - - return (BUS_PROBE_NOWILDCARD); -} - -static void -ar71xx_ehci_intr(void *arg) -{ - - /* XXX TODO: should really see if this was our interrupt.. */ - ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_USB); - ehci_interrupt(arg); -} - -static int -ar71xx_ehci_attach(device_t self) -{ - struct ar71xx_ehci_softc *isc = device_get_softc(self); - ehci_softc_t *sc = &isc->base; - int err; - int rid; - - /* initialise some bus fields */ - sc->sc_bus.parent = self; - sc->sc_bus.devices = sc->sc_devices; - sc->sc_bus.devices_max = EHCI_MAX_DEVICES; - sc->sc_bus.dma_bits = 32; - - /* get all DMA memory */ - if (usb_bus_mem_alloc_all(&sc->sc_bus, - USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) { - return (ENOMEM); - } - - sc->sc_bus.usbrev = USB_REV_2_0; - - /* NB: hints fix the memory location and irq */ - - rid = 0; - sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE); - if (!sc->sc_io_res) { - device_printf(self, "Could not map memory\n"); - goto error; - } - - /* - * Craft special resource for bus space ops that handle - * byte-alignment of non-word addresses. - */ - sc->sc_io_tag = ar71xx_bus_space_reversed; - sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); - sc->sc_io_size = rman_get_size(sc->sc_io_res); - - rid = 0; - sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, - RF_ACTIVE | RF_SHAREABLE); - if (sc->sc_irq_res == NULL) { - device_printf(self, "Could not allocate irq\n"); - goto error; - } - sc->sc_bus.bdev = device_add_child(self, "usbus", -1); - if (!sc->sc_bus.bdev) { - device_printf(self, "Could not add USB device\n"); - goto error; - } - device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); - device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR); - - sprintf(sc->sc_vendor, "Atheros"); - - err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, - NULL, ar71xx_ehci_intr, sc, &sc->sc_intr_hdl); - if (err) { - device_printf(self, "Could not setup irq, %d\n", err); - sc->sc_intr_hdl = NULL; - goto error; - } - - /* - * Arrange to force Host mode, select big-endian byte alignment, - * and arrange to not terminate reset operations (the adapter - * will ignore it if we do but might as well save a reg write). - * Also, the controller has an embedded Transaction Translator - * which means port speed must be read from the Port Status - * register following a port enable. - */ - sc->sc_flags = 0; - sc->sc_vendor_post_reset = ar71xx_ehci_post_reset; - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - case AR71XX_SOC_QCA9533: - case AR71XX_SOC_QCA9533_V2: - case AR71XX_SOC_QCA9556: - case AR71XX_SOC_QCA9558: - sc->sc_flags |= EHCI_SCFLG_TT | EHCI_SCFLG_NORESTERM; - sc->sc_vendor_get_port_speed = - ehci_get_port_speed_portsc; - break; - default: - /* fallthrough */ - break; - } - - /* - * ehci_reset() needs the correct offset to access the host controller - * registers. The AR724x/AR913x offsets aren't 0. - */ - sc->sc_offs = EHCI_CAPLENGTH(EREAD4(sc, EHCI_CAPLEN_HCIVERSION)); - - (void) ehci_reset(sc); - - err = ehci_init(sc); - if (!err) { - err = device_probe_and_attach(sc->sc_bus.bdev); - } - if (err) { - device_printf(self, "USB init failed err=%d\n", err); - goto error; - } - return (0); - -error: - ar71xx_ehci_detach(self); - return (ENXIO); -} - -static int -ar71xx_ehci_detach(device_t self) -{ - struct ar71xx_ehci_softc *isc = device_get_softc(self); - ehci_softc_t *sc = &isc->base; - int err; - - /* during module unload there are lots of children leftover */ - device_delete_children(self); - - if (sc->sc_irq_res && sc->sc_intr_hdl) { - /* - * only call ehci_detach() after ehci_init() - */ - ehci_detach(sc); - - err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); - - if (err) - /* XXX or should we panic? */ - device_printf(self, "Could not tear down irq, %d\n", - err); - sc->sc_intr_hdl = NULL; - } - - if (sc->sc_irq_res) { - bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res); - sc->sc_irq_res = NULL; - } - if (sc->sc_io_res) { - bus_release_resource(self, SYS_RES_MEMORY, 0, - sc->sc_io_res); - sc->sc_io_res = NULL; - } - usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); - - return (0); -} - -static device_method_t ehci_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ar71xx_ehci_probe), - DEVMETHOD(device_attach, ar71xx_ehci_attach), - DEVMETHOD(device_detach, ar71xx_ehci_detach), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - - DEVMETHOD_END -}; - -static driver_t ehci_driver = { - .name = "ehci", - .methods = ehci_methods, - .size = sizeof(struct ar71xx_ehci_softc), -}; - -static devclass_t ehci_devclass; - -DRIVER_MODULE(ehci, nexus, ehci_driver, ehci_devclass, 0, 0); -DRIVER_MODULE(ehci, apb, ehci_driver, ehci_devclass, 0, 0); - -MODULE_DEPEND(ehci, usb, 1, 1, 1); diff --git a/sys/mips/atheros/ar71xx_fixup.c b/sys/mips/atheros/ar71xx_fixup.c deleted file mode 100644 index f1563d5095d..00000000000 --- a/sys/mips/atheros/ar71xx_fixup.c +++ /dev/null @@ -1,112 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ar71xx.h" - -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include -#include "pcib_if.h" - -#include -#include - -#include - -#include -#include - -#include - -/* - * Take a copy of the EEPROM contents and squirrel it away in a firmware. - * The SPI flash will eventually cease to be memory-mapped, so we need - * to take a copy of this before the SPI driver initialises. - */ -void -ar71xx_pci_slot_create_eeprom_firmware(device_t dev, u_int bus, u_int slot, - u_int func, long int flash_addr, int size) -{ - char buf[64]; - uint16_t *cal_data = (uint16_t *) MIPS_PHYS_TO_KSEG1(flash_addr); - void *eeprom = NULL; - const struct firmware *fw = NULL; - - device_printf(dev, "EEPROM firmware: 0x%lx @ %d bytes\n", - flash_addr, size); - - eeprom = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO); - if (! eeprom) { - device_printf(dev, - "%s: malloc failed for '%s', aborting EEPROM\n", - __func__, buf); - return; - } - - memcpy(eeprom, cal_data, size); - - /* - * Generate a flash EEPROM 'firmware' from the given memory - * region. Since the SPI controller will eventually - * go into port-IO mode instead of memory-mapped IO - * mode, a copy of the EEPROM contents is required. - */ - snprintf(buf, sizeof(buf), "%s.%d.bus.%d.%d.%d.eeprom_firmware", - device_get_name(dev), device_get_unit(dev), bus, slot, func); - fw = firmware_register(buf, eeprom, size, 1, NULL); - if (fw == NULL) { - device_printf(dev, "%s: firmware_register (%s) failed\n", - __func__, buf); - free(eeprom, M_DEVBUF); - return; - } - device_printf(dev, "device EEPROM '%s' registered\n", buf); -} diff --git a/sys/mips/atheros/ar71xx_fixup.h b/sys/mips/atheros/ar71xx_fixup.h deleted file mode 100644 index 3d1e9c7fba0..00000000000 --- a/sys/mips/atheros/ar71xx_fixup.h +++ /dev/null @@ -1,36 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012, Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef __ATHEROS_AR71XX_FIXUP_H__ -#define __ATHEROS_AR71XX_FIXUP_H__ - -extern void ar71xx_pci_slot_create_eeprom_firmware(device_t dev, - u_int bus, u_int slot, u_int func, long int flash_addr, int size); - -#endif /* __ATHEROS_AR71XX_FIXUP_H__ */ diff --git a/sys/mips/atheros/ar71xx_gpio.c b/sys/mips/atheros/ar71xx_gpio.c deleted file mode 100644 index e60be523807..00000000000 --- a/sys/mips/atheros/ar71xx_gpio.c +++ /dev/null @@ -1,639 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * Copyright (c) 2009, Luiz Otavio O Souza. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * GPIO driver for AR71xx - */ - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "gpio_if.h" - -#define DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT) - -/* - * Helpers - */ -static void ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc, - uint32_t mask); -static void ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc, - uint32_t mask); -static void ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc, - struct gpio_pin *pin, uint32_t flags); - -/* - * Driver stuff - */ -static int ar71xx_gpio_probe(device_t dev); -static int ar71xx_gpio_attach(device_t dev); -static int ar71xx_gpio_detach(device_t dev); -static int ar71xx_gpio_filter(void *arg); -static void ar71xx_gpio_intr(void *arg); - -/* - * GPIO interface - */ -static device_t ar71xx_gpio_get_bus(device_t); -static int ar71xx_gpio_pin_max(device_t dev, int *maxpin); -static int ar71xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps); -static int ar71xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t - *flags); -static int ar71xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name); -static int ar71xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags); -static int ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value); -static int ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val); -static int ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin); - -/* - * Enable/disable the GPIO function control space. - * - * This is primarily for the AR71xx, which has SPI CS1/CS2, UART, SLIC, I2S - * as GPIO pin options. - */ -static void -ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc, uint32_t mask) -{ - - /* - * XXX TODO: refactor this out into a per-chipset method. - */ - if (ar71xx_soc == AR71XX_SOC_AR9341 || - ar71xx_soc == AR71XX_SOC_AR9342 || - ar71xx_soc == AR71XX_SOC_AR9344 || - ar71xx_soc == AR71XX_SOC_QCA9533 || - ar71xx_soc == AR71XX_SOC_QCA9533_V2 || - ar71xx_soc == AR71XX_SOC_QCA9556 || - ar71xx_soc == AR71XX_SOC_QCA9558) - GPIO_SET_BITS(sc, AR934X_GPIO_REG_FUNC, mask); - else - GPIO_SET_BITS(sc, AR71XX_GPIO_FUNCTION, mask); -} - -static void -ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc, uint32_t mask) -{ - - /* - * XXX TODO: refactor this out into a per-chipset method. - */ - if (ar71xx_soc == AR71XX_SOC_AR9341 || - ar71xx_soc == AR71XX_SOC_AR9342 || - ar71xx_soc == AR71XX_SOC_AR9344 || - ar71xx_soc == AR71XX_SOC_QCA9533 || - ar71xx_soc == AR71XX_SOC_QCA9533_V2 || - ar71xx_soc == AR71XX_SOC_QCA9556 || - ar71xx_soc == AR71XX_SOC_QCA9558) - GPIO_CLEAR_BITS(sc, AR934X_GPIO_REG_FUNC, mask); - else - GPIO_CLEAR_BITS(sc, AR71XX_GPIO_FUNCTION, mask); -} - -/* - * On most platforms, GPIO_OE is a bitmap where the bit set - * means "enable output." - * - * On AR934x and QCA953x, it's the opposite - the bit set means - * "input enable". - */ -static int -ar71xx_gpio_oe_is_high(void) -{ - switch (ar71xx_soc) { - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - case AR71XX_SOC_QCA9533: - case AR71XX_SOC_QCA9533_V2: - return 0; - default: - return 1; - } -} - -static void -ar71xx_gpio_oe_set_output(struct ar71xx_gpio_softc *sc, int b) -{ - uint32_t mask; - - mask = 1 << b; - - if (ar71xx_gpio_oe_is_high()) - GPIO_SET_BITS(sc, AR71XX_GPIO_OE, mask); - else - GPIO_CLEAR_BITS(sc, AR71XX_GPIO_OE, mask); -} - -static void -ar71xx_gpio_oe_set_input(struct ar71xx_gpio_softc *sc, int b) -{ - uint32_t mask; - - mask = 1 << b; - - if (ar71xx_gpio_oe_is_high()) - GPIO_CLEAR_BITS(sc, AR71XX_GPIO_OE, mask); - else - GPIO_SET_BITS(sc, AR71XX_GPIO_OE, mask); -} - -static void -ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc, struct gpio_pin *pin, - unsigned int flags) -{ - - /* - * Manage input/output - */ - if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) { - pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT); - if (flags & GPIO_PIN_OUTPUT) { - pin->gp_flags |= GPIO_PIN_OUTPUT; - ar71xx_gpio_oe_set_output(sc, pin->gp_pin); - } else { - pin->gp_flags |= GPIO_PIN_INPUT; - ar71xx_gpio_oe_set_input(sc, pin->gp_pin); - } - } -} - -static device_t -ar71xx_gpio_get_bus(device_t dev) -{ - struct ar71xx_gpio_softc *sc; - - sc = device_get_softc(dev); - - return (sc->busdev); -} - -static int -ar71xx_gpio_pin_max(device_t dev, int *maxpin) -{ - - switch (ar71xx_soc) { - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - *maxpin = AR91XX_GPIO_PINS - 1; - break; - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7242: - *maxpin = AR724X_GPIO_PINS - 1; - break; - case AR71XX_SOC_AR7241: - *maxpin = AR7241_GPIO_PINS - 1; - break; - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - *maxpin = AR933X_GPIO_COUNT - 1; - break; - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - *maxpin = AR934X_GPIO_COUNT - 1; - break; - case AR71XX_SOC_QCA9533: - case AR71XX_SOC_QCA9533_V2: - *maxpin = QCA953X_GPIO_COUNT - 1; - break; - case AR71XX_SOC_QCA9556: - case AR71XX_SOC_QCA9558: - *maxpin = QCA955X_GPIO_COUNT - 1; - break; - default: - *maxpin = AR71XX_GPIO_PINS - 1; - } - return (0); -} - -static int -ar71xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) -{ - struct ar71xx_gpio_softc *sc = device_get_softc(dev); - int i; - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - GPIO_LOCK(sc); - *caps = sc->gpio_pins[i].gp_caps; - GPIO_UNLOCK(sc); - - return (0); -} - -static int -ar71xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) -{ - struct ar71xx_gpio_softc *sc = device_get_softc(dev); - int i; - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - GPIO_LOCK(sc); - *flags = sc->gpio_pins[i].gp_flags; - GPIO_UNLOCK(sc); - - return (0); -} - -static int -ar71xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name) -{ - struct ar71xx_gpio_softc *sc = device_get_softc(dev); - int i; - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - GPIO_LOCK(sc); - memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME); - GPIO_UNLOCK(sc); - - return (0); -} - -static int -ar71xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) -{ - int i; - struct ar71xx_gpio_softc *sc = device_get_softc(dev); - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - ar71xx_gpio_pin_configure(sc, &sc->gpio_pins[i], flags); - - return (0); -} - -static int -ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) -{ - struct ar71xx_gpio_softc *sc = device_get_softc(dev); - int i; - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - if (value) - GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin)); - else - GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin)); - - return (0); -} - -static int -ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) -{ - struct ar71xx_gpio_softc *sc = device_get_softc(dev); - int i; - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - *val = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0; - - return (0); -} - -static int -ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin) -{ - int res, i; - struct ar71xx_gpio_softc *sc = device_get_softc(dev); - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - res = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0; - if (res) - GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin)); - else - GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin)); - - return (0); -} - -static int -ar71xx_gpio_filter(void *arg) -{ - - /* TODO: something useful */ - return (FILTER_STRAY); -} - -static void -ar71xx_gpio_intr(void *arg) -{ - struct ar71xx_gpio_softc *sc = arg; - GPIO_LOCK(sc); - /* TODO: something useful */ - GPIO_UNLOCK(sc); -} - -static int -ar71xx_gpio_probe(device_t dev) -{ - - device_set_desc(dev, "Atheros AR71XX GPIO driver"); - return (0); -} - -static int -ar71xx_gpio_attach(device_t dev) -{ - struct ar71xx_gpio_softc *sc = device_get_softc(dev); - int i, j, maxpin; - int mask, pinon; - uint32_t oe; - - KASSERT((device_get_unit(dev) == 0), - ("ar71xx_gpio: Only one gpio module supported")); - - mtx_init(&sc->gpio_mtx, device_get_nameunit(dev), NULL, MTX_DEF); - - /* Map control/status registers. */ - sc->gpio_mem_rid = 0; - sc->gpio_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->gpio_mem_rid, RF_ACTIVE); - - if (sc->gpio_mem_res == NULL) { - device_printf(dev, "couldn't map memory\n"); - ar71xx_gpio_detach(dev); - return (ENXIO); - } - - if ((sc->gpio_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, - &sc->gpio_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) { - device_printf(dev, "unable to allocate IRQ resource\n"); - ar71xx_gpio_detach(dev); - return (ENXIO); - } - - if ((bus_setup_intr(dev, sc->gpio_irq_res, INTR_TYPE_MISC, - ar71xx_gpio_filter, ar71xx_gpio_intr, sc, &sc->gpio_ih))) { - device_printf(dev, - "WARNING: unable to register interrupt handler\n"); - ar71xx_gpio_detach(dev); - return (ENXIO); - } - - sc->dev = dev; - - /* Enable function bits that are required */ - if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "function_set", &mask) == 0) { - device_printf(dev, "function_set: 0x%x\n", mask); - ar71xx_gpio_function_enable(sc, mask); - } - /* Disable function bits that are required */ - if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "function_clear", &mask) == 0) { - device_printf(dev, "function_clear: 0x%x\n", mask); - ar71xx_gpio_function_disable(sc, mask); - } - - /* Disable interrupts for all pins. */ - GPIO_WRITE(sc, AR71XX_GPIO_INT_MASK, 0); - - /* Initialise all pins specified in the mask, up to the pin count */ - (void) ar71xx_gpio_pin_max(dev, &maxpin); - if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "pinmask", &mask) != 0) - mask = 0; - if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "pinon", &pinon) != 0) - pinon = 0; - device_printf(dev, "gpio pinmask=0x%x\n", mask); - for (j = 0; j <= maxpin; j++) { - if ((mask & (1 << j)) == 0) - continue; - sc->gpio_npins++; - } - /* Iniatilize the GPIO pins, keep the loader settings. */ - oe = GPIO_READ(sc, AR71XX_GPIO_OE); - /* - * For AR934x and QCA953x, the meaning of oe is inverted; - * so flip it the right way around so we can parse the GPIO - * state. - */ - if (!ar71xx_gpio_oe_is_high()) - oe = ~oe; - - sc->gpio_pins = malloc(sizeof(*sc->gpio_pins) * sc->gpio_npins, - M_DEVBUF, M_WAITOK | M_ZERO); - for (i = 0, j = 0; j <= maxpin; j++) { - if ((mask & (1 << j)) == 0) - continue; - snprintf(sc->gpio_pins[i].gp_name, GPIOMAXNAME, - "pin %d", j); - sc->gpio_pins[i].gp_pin = j; - sc->gpio_pins[i].gp_caps = DEFAULT_CAPS; - if (oe & (1 << j)) - sc->gpio_pins[i].gp_flags = GPIO_PIN_OUTPUT; - else - sc->gpio_pins[i].gp_flags = GPIO_PIN_INPUT; - i++; - } - - /* Turn on the hinted pins. */ - for (i = 0; i < sc->gpio_npins; i++) { - j = sc->gpio_pins[i].gp_pin; - if ((pinon & (1 << j)) != 0) { - ar71xx_gpio_pin_setflags(dev, j, GPIO_PIN_OUTPUT); - ar71xx_gpio_pin_set(dev, j, 1); - } - } - - /* - * Search through the function hints, in case there's some - * overrides such as LNA control. - * - * hint.gpio.X.func..gpiofunc= - * hint.gpio.X.func..gpiomode=1 (for output, default low) - */ - for (i = 0; i <= maxpin; i++) { - char buf[32]; - int gpiofunc, gpiomode; - - snprintf(buf, 32, "func.%d.gpiofunc", i); - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), - buf, - &gpiofunc) != 0) - continue; - /* Get the mode too */ - snprintf(buf, 32, "func.%d.gpiomode", i); - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), - buf, - &gpiomode) != 0) - continue; - - /* We only handle mode=1 (output) for now */ - if (gpiomode != 1) - continue; - - device_printf(dev, "%s: GPIO %d: func=%d, mode=%d\n", - __func__, - i, - gpiofunc, - gpiomode); - - /* Set pin value = 0, so it stays low by default */ - oe = GPIO_READ(sc, AR71XX_GPIO_OUT); - oe &= ~ (1 << i); - GPIO_WRITE(sc, AR71XX_GPIO_OUT, oe); - - /* Set output */ - ar71xx_gpio_oe_set_output(sc, i); - - /* Finally: Set the output config */ - ar71xx_gpio_ouput_configure(i, gpiofunc); - } - - sc->busdev = gpiobus_attach_bus(dev); - if (sc->busdev == NULL) { - ar71xx_gpio_detach(dev); - return (ENXIO); - } - - return (0); -} - -static int -ar71xx_gpio_detach(device_t dev) -{ - struct ar71xx_gpio_softc *sc = device_get_softc(dev); - - KASSERT(mtx_initialized(&sc->gpio_mtx), ("gpio mutex not initialized")); - - gpiobus_detach_bus(dev); - if (sc->gpio_ih) - bus_teardown_intr(dev, sc->gpio_irq_res, sc->gpio_ih); - if (sc->gpio_irq_res) - bus_release_resource(dev, SYS_RES_IRQ, sc->gpio_irq_rid, - sc->gpio_irq_res); - if (sc->gpio_mem_res) - bus_release_resource(dev, SYS_RES_MEMORY, sc->gpio_mem_rid, - sc->gpio_mem_res); - if (sc->gpio_pins) - free(sc->gpio_pins, M_DEVBUF); - mtx_destroy(&sc->gpio_mtx); - - return(0); -} - -static device_method_t ar71xx_gpio_methods[] = { - DEVMETHOD(device_probe, ar71xx_gpio_probe), - DEVMETHOD(device_attach, ar71xx_gpio_attach), - DEVMETHOD(device_detach, ar71xx_gpio_detach), - - /* GPIO protocol */ - DEVMETHOD(gpio_get_bus, ar71xx_gpio_get_bus), - DEVMETHOD(gpio_pin_max, ar71xx_gpio_pin_max), - DEVMETHOD(gpio_pin_getname, ar71xx_gpio_pin_getname), - DEVMETHOD(gpio_pin_getflags, ar71xx_gpio_pin_getflags), - DEVMETHOD(gpio_pin_getcaps, ar71xx_gpio_pin_getcaps), - DEVMETHOD(gpio_pin_setflags, ar71xx_gpio_pin_setflags), - DEVMETHOD(gpio_pin_get, ar71xx_gpio_pin_get), - DEVMETHOD(gpio_pin_set, ar71xx_gpio_pin_set), - DEVMETHOD(gpio_pin_toggle, ar71xx_gpio_pin_toggle), - {0, 0}, -}; - -static driver_t ar71xx_gpio_driver = { - "gpio", - ar71xx_gpio_methods, - sizeof(struct ar71xx_gpio_softc), -}; -static devclass_t ar71xx_gpio_devclass; - -DRIVER_MODULE(ar71xx_gpio, apb, ar71xx_gpio_driver, ar71xx_gpio_devclass, 0, 0); diff --git a/sys/mips/atheros/ar71xx_gpiovar.h b/sys/mips/atheros/ar71xx_gpiovar.h deleted file mode 100644 index 6384aef02d3..00000000000 --- a/sys/mips/atheros/ar71xx_gpiovar.h +++ /dev/null @@ -1,72 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * Copyright (c) 2009, Luiz Otavio O Souza. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#ifndef __AR71XX_GPIOVAR_H__ -#define __AR71XX_GPIOVAR_H__ - -#define GPIO_LOCK(_sc) mtx_lock(&(_sc)->gpio_mtx) -#define GPIO_UNLOCK(_sc) mtx_unlock(&(_sc)->gpio_mtx) -#define GPIO_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->gpio_mtx, MA_OWNED) - -/* - * register space access macros - */ -#define GPIO_WRITE(sc, reg, val) do { \ - bus_write_4(sc->gpio_mem_res, (reg), (val)); \ - } while (0) - -#define GPIO_READ(sc, reg) bus_read_4(sc->gpio_mem_res, (reg)) - -#define GPIO_SET_BITS(sc, reg, bits) \ - GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg)) | (bits)) - -#define GPIO_CLEAR_BITS(sc, reg, bits) \ - GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg)) & ~(bits)) - -#define AR71XX_GPIO_PINS 12 -#define AR724X_GPIO_PINS 18 -#define AR7241_GPIO_PINS 20 -#define AR91XX_GPIO_PINS 22 - -struct ar71xx_gpio_softc { - device_t dev; - device_t busdev; - struct mtx gpio_mtx; - struct resource *gpio_mem_res; - int gpio_mem_rid; - struct resource *gpio_irq_res; - int gpio_irq_rid; - void *gpio_ih; - int gpio_npins; - struct gpio_pin *gpio_pins; -}; - -#endif /* __AR71XX_GPIOVAR_H__ */ diff --git a/sys/mips/atheros/ar71xx_macaddr.c b/sys/mips/atheros/ar71xx_macaddr.c deleted file mode 100644 index 31758524bb9..00000000000 --- a/sys/mips/atheros/ar71xx_macaddr.c +++ /dev/null @@ -1,99 +0,0 @@ -/*- - * Copyright (c) 2015, Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include - -#include - -#include - -/* - * Some boards don't have a separate MAC address for each individual - * device on-board, but instead need to derive them from a single MAC - * address stored somewhere. - */ -uint8_t ar71xx_board_mac_addr[ETHER_ADDR_LEN]; - -/* - * Initialise a MAC address 'dst' from a MAC address 'src'. - * - * 'offset' is added to the low three bytes to allow for sequential - * MAC addresses to be derived from a single one. - * - * 'is_local' is whether this 'dst' should be made a local MAC address. - * - * Returns 0 if it was successfully initialised, -1 on error. - */ -int -ar71xx_mac_addr_init(unsigned char *dst, const unsigned char *src, - int offset, int is_local) -{ - int t; - - if (dst == NULL || src == NULL) - return (-1); - - /* XXX TODO: validate 'src' is a valid MAC address */ - - t = (((uint32_t) src[3]) << 16) - + (((uint32_t) src[4]) << 8) - + ((uint32_t) src[5]); - - /* Note: this is handles both positive and negative offsets */ - t += offset; - - dst[0] = src[0]; - dst[1] = src[1]; - dst[2] = src[2]; - dst[3] = (t >> 16) & 0xff; - dst[4] = (t >> 8) & 0xff; - dst[5] = t & 0xff; - - if (is_local) - dst[0] |= 0x02; - - /* Everything's okay */ - return (0); -} - -/* - * Initialise a random MAC address for use by if_arge.c and whatever - * else requires it. - * - * Returns 0 on success, -1 on error. - */ -int -ar71xx_mac_addr_random_init(struct ifnet *ifp, struct ether_addr *dst) -{ - - ether_gen_addr(ifp, dst); - return (0); -} diff --git a/sys/mips/atheros/ar71xx_macaddr.h b/sys/mips/atheros/ar71xx_macaddr.h deleted file mode 100644 index 5b1b0397bc6..00000000000 --- a/sys/mips/atheros/ar71xx_macaddr.h +++ /dev/null @@ -1,37 +0,0 @@ -/*- - * Copyright (c) 2015, Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef __ATHEROS_AR71XX_MACADDR_H__ -#define __ATHEROS_AR71XX_MACADDR_H__ - -extern uint8_t ar71xx_board_mac_addr[ETHER_ADDR_LEN]; - -extern int ar71xx_mac_addr_init(unsigned char *dst, const unsigned char *src, - int offset, int is_local); -extern int ar71xx_mac_addr_random_init(struct ifnet *ifp, struct ether_addr *dst); - -#endif /* __ATHEROS_AR71XX_MACADDR_H__ */ diff --git a/sys/mips/atheros/ar71xx_machdep.c b/sys/mips/atheros/ar71xx_machdep.c deleted file mode 100644 index d08c29b360b..00000000000 --- a/sys/mips/atheros/ar71xx_machdep.c +++ /dev/null @@ -1,452 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009 Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" -#include "opt_ar71xx.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -extern char edata[], end[]; - -/* 4KB static data aread to keep a copy of the bootload env until - the dynamic kenv is setup */ -char boot1_env[4096]; - -void -platform_cpu_init() -{ - /* Nothing special */ -} - -void -platform_reset(void) -{ - ar71xx_device_stop(RST_RESET_FULL_CHIP); - /* Wait for reset */ - while(1) - ; -} - -/* - * Obtain the MAC address via the Redboot environment. - */ -static int -ar71xx_redboot_get_macaddr(void) -{ - char *var; - int count = 0, i; - uint32_t macaddr[ETHER_ADDR_LEN]; - uint8_t tmpmac[ETHER_ADDR_LEN]; - - /* - * "ethaddr" is passed via envp on RedBoot platforms - * "kmac" is passed via argv on RouterBOOT platforms - */ - if ((var = kern_getenv("ethaddr")) != NULL || - (var = kern_getenv("kmac")) != NULL) { - count = sscanf(var, "%x%*c%x%*c%x%*c%x%*c%x%*c%x", - &macaddr[0], &macaddr[1], - &macaddr[2], &macaddr[3], - &macaddr[4], &macaddr[5]); - - if (count < 6) { - memset(macaddr, 0, - sizeof(macaddr)); - } else { - for (i = 0; i < ETHER_ADDR_LEN; i++) - tmpmac[i] = macaddr[i] & 0xff; - (void) ar71xx_mac_addr_init(ar71xx_board_mac_addr, - tmpmac, - 0, /* offset */ - 0); /* is_local */ - } - freeenv(var); - return (0); - } - return (-1); -} - -#ifdef AR71XX_ENV_ROUTERBOOT -/* - * RouterBoot gives us the board memory in a command line argument. - */ -static int -ar71xx_routerboot_get_mem(int argc, char **argv) -{ - int i, board_mem; - - /* - * Protect ourselves from garbage in registers. - */ - if (!MIPS_IS_VALID_PTR(argv)) - return (0); - - for (i = 0; i < argc; i++) { - if (argv[i] == NULL) - continue; - if (strncmp(argv[i], "mem=", 4) == 0) { - if (sscanf(argv[i] + 4, "%dM", &board_mem) == 1) - return (btoc(board_mem * 1024 * 1024)); - } - } - - return (0); -} -#endif - -/* - * Handle initialising the MAC address from a specific EEPROM - * offset. - * - * This is done during (very) early boot. - * - * hint.ar71xx.0.eeprom_mac_addr=
- * hint.ar71xx.0.eeprom_mac_isascii=<0|1> - */ -static int -ar71xx_platform_read_eeprom_mac(void) -{ - long eeprom_mac_addr = 0; - const char *mac; - int i, readascii = 0; - uint8_t macaddr[ETHER_ADDR_LEN]; - - if (resource_long_value("ar71xx", 0, "eeprom_mac_addr", - &eeprom_mac_addr) != 0) - return (-1); - - /* get a pointer to the EEPROM MAC address */ - - mac = (const char *) MIPS_PHYS_TO_KSEG1(eeprom_mac_addr); - - /* Check if it's ASCII or not */ - if (resource_int_value("ar71xx", 0, "eeprom_mac_isascii", - &readascii) == 0 && readascii == 1) { - printf("ar71xx: Overriding MAC from EEPROM (ascii)\n"); - for (i = 0; i < 6; i++) { - macaddr[i] = strtol(&(mac[i*3]), NULL, 16); - } - } else { - printf("ar71xx: Overriding MAC from EEPROM\n"); - for (i = 0; i < 6; i++) { - macaddr[i] = mac[i]; - } - } - - /* Set the default board MAC */ - (void) ar71xx_mac_addr_init(ar71xx_board_mac_addr, - macaddr, - 0, /* offset */ - 0); /* is_local */ - printf("ar71xx: Board MAC: %6D\n", ar71xx_board_mac_addr, ":"); - return (0); -} - -/* - * Populate a kenv hint for the given device based on the given - * MAC address and offset. - * - * Returns 0 if ok, < 0 on error. - */ -static int -ar71xx_platform_set_mac_hint(const char *dev, int unit, - const uint8_t *macaddr, int offset, int islocal) -{ - char macstr[32]; - uint8_t lclmac[ETHER_ADDR_LEN]; - char devstr[32]; - - /* Initialise the MAC address, plus/minus the offset */ - if (ar71xx_mac_addr_init(lclmac, macaddr, offset, islocal) != 0) { - return (-1); - } - - /* Turn it into a string */ - snprintf(macstr, 32, "%6D", lclmac, ":"); - snprintf(devstr, 32, "hint.%s.%d.macaddr", dev, unit); - - printf(" %s => %s\n", devstr, macstr); - - /* Call setenv */ - if (kern_setenv(devstr, macstr) != 0) { - printf("%s: failed to set hint (%s => %s)\n", - __func__, - devstr, - macstr); - return (-1); - } - - return (0); -} - -/* - * Iterate through the list of boot time hints that populate - * a device MAC address hint based on the "board" MAC address. - * - * ar71xx_mac_map.X.devid= - * ar71xx_mac_map.X.unitid= - * ar71xx_mac_map.X.offset= - * ar71xx_mac_map.X.is_local=<1 or 0> - */ -static int -ar71xx_platform_check_mac_hints(void) -{ - int i; - const char *devid; - int offset, is_local, unitid; - - for (i = 0; i < 8; i++) { - if (resource_string_value("ar71xx_mac_map", i, "devid", - &devid) != 0) - break; - if (resource_int_value("ar71xx_mac_map", i, "unitid", - &unitid) != 0) - break; - if (resource_int_value("ar71xx_mac_map", i, "offset", - &offset) != 0) - break; - if (resource_int_value("ar71xx_mac_map", i, "is_local", - &is_local) != 0) - break; - printf("ar71xx: devid '%s.%d', MAC offset '%d'\n", - devid, unitid, offset); - (void) ar71xx_platform_set_mac_hint(devid, unitid, - ar71xx_board_mac_addr, offset, is_local); - } - - return (0); -} - -void -platform_start(__register_t a0 __unused, __register_t a1 __unused, - __register_t a2 __unused, __register_t a3 __unused) -{ - uint64_t platform_counter_freq; - int argc = 0, i; - char **argv = NULL, **envp = NULL; - vm_offset_t kernend; - - /* - * clear the BSS and SBSS segments, this should be first call in - * the function - */ - kernend = (vm_offset_t)&end; - memset(&edata, 0, kernend - (vm_offset_t)(&edata)); - - mips_postboot_fixup(); - - /* Initialize pcpu stuff */ - mips_pcpu0_init(); - - /* - * Until some more sensible abstractions for uboot/redboot - * environment handling, we have to make this a compile-time - * hack. The existing code handles the uboot environment - * very incorrectly so we should just ignore initialising - * the relevant pointers. - */ -#ifndef AR71XX_ENV_UBOOT - argc = a0; - argv = (char**)a1; - envp = (char**)a2; -#endif - /* - * Protect ourselves from garbage in registers - */ - if (MIPS_IS_VALID_PTR(envp)) { - for (i = 0; envp[i]; i += 2) { - if (strcmp(envp[i], "memsize") == 0) - realmem = btoc(strtoul(envp[i+1], NULL, 16)); - else if (strcmp(envp[i], "bootverbose") == 0) - bootverbose = btoc(strtoul(envp[i+1], NULL, 10)); - } - } - bootverbose = 1; - -#ifdef AR71XX_ENV_ROUTERBOOT - /* - * RouterBoot informs the board memory as a command line argument. - */ - if (realmem == 0) - realmem = ar71xx_routerboot_get_mem(argc, argv); -#endif - - /* - * Just wild guess. RedBoot let us down and didn't reported - * memory size - */ - if (realmem == 0) - realmem = btoc(32*1024*1024); - - /* - * Allow build-time override in case Redboot lies - * or in other situations (eg where there's u-boot) - * where there isn't (yet) a convienent method of - * being told how much RAM is available. - * - * This happens on at least the Ubiquiti LS-SR71A - * board, where redboot says there's 16mb of RAM - * but in fact there's 32mb. - */ -#if defined(AR71XX_REALMEM) - realmem = btoc(AR71XX_REALMEM); -#endif - - /* phys_avail regions are in bytes */ - phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end); - phys_avail[1] = ctob(realmem); - - dump_avail[0] = 0; - dump_avail[1] = phys_avail[1]; - - physmem = realmem; - - /* - * ns8250 uart code uses DELAY so ticker should be inititalized - * before cninit. And tick_init_params refers to hz, so * init_param1 - * should be called first. - */ - init_param1(); - - /* Detect the system type - this is needed for subsequent chipset-specific calls */ - ar71xx_detect_sys_type(); - ar71xx_detect_sys_frequency(); - - platform_counter_freq = ar71xx_cpu_freq(); - mips_timer_init_params(platform_counter_freq, 1); - cninit(); - init_static_kenv(boot1_env, sizeof(boot1_env)); - - printf("CPU platform: %s\n", ar71xx_get_system_type()); - printf("CPU Frequency=%d MHz\n", u_ar71xx_cpu_freq / 1000000); - printf("CPU DDR Frequency=%d MHz\n", u_ar71xx_ddr_freq / 1000000); - printf("CPU AHB Frequency=%d MHz\n", u_ar71xx_ahb_freq / 1000000); - printf("platform frequency: %lld MHz\n", platform_counter_freq / 1000000); - printf("CPU reference clock: %d MHz\n", u_ar71xx_refclk / 1000000); - printf("CPU MDIO clock: %d MHz\n", u_ar71xx_mdio_freq / 1000000); - printf("arguments: \n"); - printf(" a0 = %08x\n", a0); - printf(" a1 = %08x\n", a1); - printf(" a2 = %08x\n", a2); - printf(" a3 = %08x\n", a3); - - strcpy(cpu_model, ar71xx_get_system_type()); - - /* - * XXX this code is very redboot specific. - */ - printf("Cmd line:"); - if (MIPS_IS_VALID_PTR(argv)) { - for (i = 0; i < argc; i++) { - printf(" %s", argv[i]); - boothowto |= boot_parse_arg(argv[i]); - } - } - else - printf ("argv is invalid"); - printf("\n"); - - printf("Environment:\n"); - if (MIPS_IS_VALID_PTR(envp)) { - for (i = 0; envp[i]; i+=2) { - printf(" %s = %s\n", envp[i], envp[i+1]); - kern_setenv(envp[i], envp[i+1]); - } - } - else - printf ("envp is invalid\n"); - - /* Platform setup */ - init_param2(physmem); - mips_cpu_init(); - pmap_bootstrap(); - mips_proc0_init(); - mutex_init(); - - /* - * Reset USB devices - */ - ar71xx_init_usb_peripheral(); - - /* - * Reset internal ethernet switch, if one exists - */ - ar71xx_reset_ethernet_switch(); - - /* - * Initialise the gmac driver. - */ - ar71xx_init_gmac(); - - /* Redboot if_arge MAC address is in the environment */ - (void) ar71xx_redboot_get_macaddr(); - - /* Various other boards need things to come out of EEPROM */ - (void) ar71xx_platform_read_eeprom_mac(); - - /* Initialise the MAC address hint map */ - ar71xx_platform_check_mac_hints(); - - kdb_init(); -#ifdef KDB - if (boothowto & RB_KDB) - kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); -#endif -} diff --git a/sys/mips/atheros/ar71xx_ohci.c b/sys/mips/atheros/ar71xx_ohci.c deleted file mode 100644 index 30e0b74a100..00000000000 --- a/sys/mips/atheros/ar71xx_ohci.c +++ /dev/null @@ -1,219 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include - -#include /* for stuff in ar71xx_cpudef.h */ -#include - -static int ar71xx_ohci_attach(device_t dev); -static int ar71xx_ohci_detach(device_t dev); -static int ar71xx_ohci_probe(device_t dev); - -struct ar71xx_ohci_softc -{ - struct ohci_softc sc_ohci; -}; - -static int -ar71xx_ohci_probe(device_t dev) -{ - device_set_desc(dev, "AR71XX integrated OHCI controller"); - return (BUS_PROBE_DEFAULT); -} - -static void -ar71xx_ohci_intr(void *arg) -{ - - /* XXX TODO: should really see if this was our interrupt.. */ - ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_USB); - ohci_interrupt(arg); -} - -static int -ar71xx_ohci_attach(device_t dev) -{ - struct ar71xx_ohci_softc *sc = device_get_softc(dev); - int err; - int rid; - - /* initialise some bus fields */ - sc->sc_ohci.sc_bus.parent = dev; - sc->sc_ohci.sc_bus.devices = sc->sc_ohci.sc_devices; - sc->sc_ohci.sc_bus.devices_max = OHCI_MAX_DEVICES; - sc->sc_ohci.sc_bus.dma_bits = 32; - - /* get all DMA memory */ - if (usb_bus_mem_alloc_all(&sc->sc_ohci.sc_bus, - USB_GET_DMA_TAG(dev), &ohci_iterate_hw_softc)) { - return (ENOMEM); - } - - sc->sc_ohci.sc_dev = dev; - - rid = 0; - sc->sc_ohci.sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (sc->sc_ohci.sc_io_res == NULL) { - err = ENOMEM; - goto error; - } - sc->sc_ohci.sc_io_tag = rman_get_bustag(sc->sc_ohci.sc_io_res); - sc->sc_ohci.sc_io_hdl = rman_get_bushandle(sc->sc_ohci.sc_io_res); - sc->sc_ohci.sc_io_size = rman_get_size(sc->sc_ohci.sc_io_res); - - rid = 0; - sc->sc_ohci.sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_ACTIVE); - if (sc->sc_ohci.sc_irq_res == NULL) { - err = ENOMEM; - goto error; - } - sc->sc_ohci.sc_bus.bdev = device_add_child(dev, "usbus", -1); - if (sc->sc_ohci.sc_bus.bdev == NULL) { - err = ENOMEM; - goto error; - } - device_set_ivars(sc->sc_ohci.sc_bus.bdev, &sc->sc_ohci.sc_bus); - - err = bus_setup_intr(dev, sc->sc_ohci.sc_irq_res, - INTR_TYPE_BIO | INTR_MPSAFE, NULL, - ar71xx_ohci_intr, sc, &sc->sc_ohci.sc_intr_hdl); - if (err) { - err = ENXIO; - goto error; - } - - strlcpy(sc->sc_ohci.sc_vendor, "Atheros", sizeof(sc->sc_ohci.sc_vendor)); - - bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl, OHCI_CONTROL, 0); - - err = ohci_init(&sc->sc_ohci); - if (!err) - err = device_probe_and_attach(sc->sc_ohci.sc_bus.bdev); - - if (err) - goto error; - return (0); - -error: - if (err) { - ar71xx_ohci_detach(dev); - return (err); - } - return (err); -} - -static int -ar71xx_ohci_detach(device_t dev) -{ - struct ar71xx_ohci_softc *sc = device_get_softc(dev); - - /* during module unload there are lots of children leftover */ - device_delete_children(dev); - - /* - * Put the controller into reset, then disable clocks and do - * the MI tear down. We have to disable the clocks/hardware - * after we do the rest of the teardown. We also disable the - * clocks in the opposite order we acquire them, but that - * doesn't seem to be absolutely necessary. We free up the - * clocks after we disable them, so the system could, in - * theory, reuse them. - */ - bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl, - OHCI_CONTROL, 0); - - if (sc->sc_ohci.sc_intr_hdl) { - bus_teardown_intr(dev, sc->sc_ohci.sc_irq_res, sc->sc_ohci.sc_intr_hdl); - sc->sc_ohci.sc_intr_hdl = NULL; - } - - if (sc->sc_ohci.sc_irq_res && sc->sc_ohci.sc_intr_hdl) { - /* - * only call ohci_detach() after ohci_init() - */ - ohci_detach(&sc->sc_ohci); - - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_ohci.sc_irq_res); - sc->sc_ohci.sc_irq_res = NULL; - } - if (sc->sc_ohci.sc_io_res) { - bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_ohci.sc_io_res); - sc->sc_ohci.sc_io_res = NULL; - sc->sc_ohci.sc_io_tag = 0; - sc->sc_ohci.sc_io_hdl = 0; - } - usb_bus_mem_free_all(&sc->sc_ohci.sc_bus, &ohci_iterate_hw_softc); - - return (0); -} - -static device_method_t ohci_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ar71xx_ohci_probe), - DEVMETHOD(device_attach, ar71xx_ohci_attach), - DEVMETHOD(device_detach, ar71xx_ohci_detach), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - - DEVMETHOD_END -}; - -static driver_t ohci_driver = { - .name = "ohci", - .methods = ohci_methods, - .size = sizeof(struct ar71xx_ohci_softc), -}; - -static devclass_t ohci_devclass; - -DRIVER_MODULE(ohci, apb, ohci_driver, ohci_devclass, 0, 0); diff --git a/sys/mips/atheros/ar71xx_pci.c b/sys/mips/atheros/ar71xx_pci.c deleted file mode 100644 index 70dde22d1e2..00000000000 --- a/sys/mips/atheros/ar71xx_pci.c +++ /dev/null @@ -1,704 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ar71xx.h" - -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include -#include "pcib_if.h" - -#include -#include - -#include - -#ifdef AR71XX_ATH_EEPROM -#include -#endif /* AR71XX_ATH_EEPROM */ - -#undef AR71XX_PCI_DEBUG -#ifdef AR71XX_PCI_DEBUG -#define dprintf printf -#else -#define dprintf(x, arg...) -#endif - -struct mtx ar71xx_pci_mtx; -MTX_SYSINIT(ar71xx_pci_mtx, &ar71xx_pci_mtx, "ar71xx PCI space mutex", - MTX_SPIN); - -struct ar71xx_pci_softc { - device_t sc_dev; - - int sc_busno; - int sc_baseslot; - struct rman sc_mem_rman; - struct rman sc_irq_rman; - - struct intr_event *sc_eventstab[AR71XX_PCI_NIRQS]; - mips_intrcnt_t sc_intr_counter[AR71XX_PCI_NIRQS]; - struct resource *sc_irq; - void *sc_ih; -}; - -static int ar71xx_pci_setup_intr(device_t, device_t, struct resource *, int, - driver_filter_t *, driver_intr_t *, void *, void **); -static int ar71xx_pci_teardown_intr(device_t, device_t, struct resource *, - void *); -static int ar71xx_pci_intr(void *); - -static void -ar71xx_pci_mask_irq(void *source) -{ - uint32_t reg; - unsigned int irq = (unsigned int)source; - - /* XXX is the PCI lock required here? */ - reg = ATH_READ_REG(AR71XX_PCI_INTR_MASK); - /* flush */ - reg = ATH_READ_REG(AR71XX_PCI_INTR_MASK); - ATH_WRITE_REG(AR71XX_PCI_INTR_MASK, reg & ~(1 << irq)); -} - -static void -ar71xx_pci_unmask_irq(void *source) -{ - uint32_t reg; - unsigned int irq = (unsigned int)source; - - /* XXX is the PCI lock required here? */ - reg = ATH_READ_REG(AR71XX_PCI_INTR_MASK); - ATH_WRITE_REG(AR71XX_PCI_INTR_MASK, reg | (1 << irq)); - /* flush */ - reg = ATH_READ_REG(AR71XX_PCI_INTR_MASK); -} - -/* - * get bitmask for bytes of interest: - * 0 - we want this byte, 1 - ignore it. e.g: we read 1 byte - * from register 7. Bitmask would be: 0111 - */ -static uint32_t -ar71xx_get_bytes_to_read(int reg, int bytes) -{ - uint32_t bytes_to_read = 0; - - if ((bytes % 4) == 0) - bytes_to_read = 0; - else if ((bytes % 4) == 1) - bytes_to_read = (~(1 << (reg % 4))) & 0xf; - else if ((bytes % 4) == 2) - bytes_to_read = (~(3 << (reg % 4))) & 0xf; - else - panic("%s: wrong combination", __func__); - - return (bytes_to_read); -} - -static int -ar71xx_pci_check_bus_error(void) -{ - uint32_t error, addr, has_errors = 0; - - mtx_assert(&ar71xx_pci_mtx, MA_OWNED); - - error = ATH_READ_REG(AR71XX_PCI_ERROR) & 0x3; - dprintf("%s: PCI error = %02x\n", __func__, error); - if (error) { - addr = ATH_READ_REG(AR71XX_PCI_ERROR_ADDR); - - /* Do not report it yet */ -#if 0 - printf("PCI bus error %d at addr 0x%08x\n", error, addr); -#endif - ATH_WRITE_REG(AR71XX_PCI_ERROR, error); - has_errors = 1; - } - - error = ATH_READ_REG(AR71XX_PCI_AHB_ERROR) & 0x1; - dprintf("%s: AHB error = %02x\n", __func__, error); - if (error) { - addr = ATH_READ_REG(AR71XX_PCI_AHB_ERROR_ADDR); - /* Do not report it yet */ -#if 0 - printf("AHB bus error %d at addr 0x%08x\n", error, addr); -#endif - ATH_WRITE_REG(AR71XX_PCI_AHB_ERROR, error); - has_errors = 1; - } - - return (has_errors); -} - -static uint32_t -ar71xx_pci_make_addr(int bus, int slot, int func, int reg) -{ - if (bus == 0) { - return ((1 << slot) | (func << 8) | (reg & ~3)); - } else { - return ((bus << 16) | (slot << 11) | (func << 8) - | (reg & ~3) | 1); - } -} - -static int -ar71xx_pci_conf_setup(int bus, int slot, int func, int reg, int bytes, - uint32_t cmd) -{ - uint32_t addr = ar71xx_pci_make_addr(bus, slot, func, (reg & ~3)); - - mtx_assert(&ar71xx_pci_mtx, MA_OWNED); - - cmd |= (ar71xx_get_bytes_to_read(reg, bytes) << 4); - ATH_WRITE_REG(AR71XX_PCI_CONF_ADDR, addr); - ATH_WRITE_REG(AR71XX_PCI_CONF_CMD, cmd); - - dprintf("%s: tag (%x, %x, %x) %d/%d addr=%08x, cmd=%08x\n", __func__, - bus, slot, func, reg, bytes, addr, cmd); - - return ar71xx_pci_check_bus_error(); -} - -static uint32_t -ar71xx_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func, - u_int reg, int bytes) -{ - uint32_t data; - uint32_t shift, mask; - - /* register access is 32-bit aligned */ - shift = (reg & 3) * 8; - - /* Create a mask based on the width, post-shift */ - if (bytes == 2) - mask = 0xffff; - else if (bytes == 1) - mask = 0xff; - else - mask = 0xffffffff; - - dprintf("%s: tag (%x, %x, %x) reg %d(%d)\n", __func__, bus, slot, - func, reg, bytes); - - mtx_lock_spin(&ar71xx_pci_mtx); - if (ar71xx_pci_conf_setup(bus, slot, func, reg, bytes, - PCI_CONF_CMD_READ) == 0) - data = ATH_READ_REG(AR71XX_PCI_CONF_READ_DATA); - else - data = -1; - mtx_unlock_spin(&ar71xx_pci_mtx); - - /* get request bytes from 32-bit word */ - data = (data >> shift) & mask; - - dprintf("%s: read 0x%x\n", __func__, data); - - return (data); -} - -static void -ar71xx_pci_local_write(device_t dev, uint32_t reg, uint32_t data, int bytes) -{ - uint32_t cmd; - - dprintf("%s: local write reg %d(%d)\n", __func__, reg, bytes); - - data = data << (8*(reg % 4)); - cmd = PCI_LCONF_CMD_WRITE | (reg & ~3); - cmd |= (ar71xx_get_bytes_to_read(reg, bytes) << 20); - mtx_lock_spin(&ar71xx_pci_mtx); - ATH_WRITE_REG(AR71XX_PCI_LCONF_CMD, cmd); - ATH_WRITE_REG(AR71XX_PCI_LCONF_WRITE_DATA, data); - mtx_unlock_spin(&ar71xx_pci_mtx); -} - -static void -ar71xx_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func, - u_int reg, uint32_t data, int bytes) -{ - - dprintf("%s: tag (%x, %x, %x) reg %d(%d)\n", __func__, bus, slot, - func, reg, bytes); - - data = data << (8*(reg % 4)); - mtx_lock_spin(&ar71xx_pci_mtx); - if (ar71xx_pci_conf_setup(bus, slot, func, reg, bytes, - PCI_CONF_CMD_WRITE) == 0) - ATH_WRITE_REG(AR71XX_PCI_CONF_WRITE_DATA, data); - mtx_unlock_spin(&ar71xx_pci_mtx); -} - -#ifdef AR71XX_ATH_EEPROM -/* - * Some embedded boards (eg AP94) have the MAC attached via PCI but they - * don't have the MAC-attached EEPROM. The register initialisation - * values and calibration data are stored in the on-board flash. - * This routine initialises the NIC via the EEPROM register contents - * before the probe/attach routines get a go at things. - */ -static void -ar71xx_pci_fixup(device_t dev, u_int bus, u_int slot, u_int func, - long flash_addr, int len) -{ - uint16_t *cal_data = (uint16_t *) MIPS_PHYS_TO_KSEG1(flash_addr); - uint32_t reg, val, bar0; - - if (bootverbose) - device_printf(dev, "%s: flash_addr=%lx, cal_data=%p\n", - __func__, flash_addr, cal_data); - - /* XXX check 0xa55a */ - /* Save bar(0) address - just to flush bar(0) (SoC WAR) ? */ - bar0 = ar71xx_pci_read_config(dev, bus, slot, func, PCIR_BAR(0), 4); - ar71xx_pci_write_config(dev, bus, slot, func, PCIR_BAR(0), - AR71XX_PCI_MEM_BASE, 4); - - val = ar71xx_pci_read_config(dev, bus, slot, func, PCIR_COMMAND, 2); - val |= (PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN); - ar71xx_pci_write_config(dev, bus, slot, func, PCIR_COMMAND, val, 2); - - cal_data += 3; - while (*cal_data != 0xffff) { - reg = *cal_data++; - val = *cal_data++; - val |= (*cal_data++) << 16; - if (bootverbose) - printf(" reg: %x, val=%x\n", reg, val); - - /* Write eeprom fixup data to device memory */ - ATH_WRITE_REG(AR71XX_PCI_MEM_BASE + reg, val); - DELAY(100); - } - - val = ar71xx_pci_read_config(dev, bus, slot, func, PCIR_COMMAND, 2); - val &= ~(PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN); - ar71xx_pci_write_config(dev, bus, slot, func, PCIR_COMMAND, val, 2); - - /* Write the saved bar(0) address */ - ar71xx_pci_write_config(dev, bus, slot, func, PCIR_BAR(0), bar0, 4); -} - -static void -ar71xx_pci_slot_fixup(device_t dev, u_int bus, u_int slot, u_int func) -{ - long int flash_addr; - char buf[64]; - int size; - - /* - * Check whether the given slot has a hint to poke. - */ - if (bootverbose) - device_printf(dev, "%s: checking dev %s, %d/%d/%d\n", - __func__, device_get_nameunit(dev), bus, slot, func); - - snprintf(buf, sizeof(buf), "bus.%d.%d.%d.ath_fixup_addr", - bus, slot, func); - - if (resource_long_value(device_get_name(dev), device_get_unit(dev), - buf, &flash_addr) == 0) { - snprintf(buf, sizeof(buf), "bus.%d.%d.%d.ath_fixup_size", - bus, slot, func); - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), buf, &size) != 0) { - device_printf(dev, - "%s: missing hint '%s', aborting EEPROM\n", - __func__, buf); - return; - } - - device_printf(dev, "found EEPROM at 0x%lx on %d.%d.%d\n", - flash_addr, bus, slot, func); - ar71xx_pci_fixup(dev, bus, slot, func, flash_addr, size); - ar71xx_pci_slot_create_eeprom_firmware(dev, bus, slot, func, - flash_addr, size); - } -} -#endif /* AR71XX_ATH_EEPROM */ - -static int -ar71xx_pci_probe(device_t dev) -{ - - return (BUS_PROBE_NOWILDCARD); -} - -static int -ar71xx_pci_attach(device_t dev) -{ - int rid = 0; - struct ar71xx_pci_softc *sc = device_get_softc(dev); - - sc->sc_mem_rman.rm_type = RMAN_ARRAY; - sc->sc_mem_rman.rm_descr = "ar71xx PCI memory window"; - if (rman_init(&sc->sc_mem_rman) != 0 || - rman_manage_region(&sc->sc_mem_rman, AR71XX_PCI_MEM_BASE, - AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1) != 0) { - panic("ar71xx_pci_attach: failed to set up I/O rman"); - } - - sc->sc_irq_rman.rm_type = RMAN_ARRAY; - sc->sc_irq_rman.rm_descr = "ar71xx PCI IRQs"; - if (rman_init(&sc->sc_irq_rman) != 0 || - rman_manage_region(&sc->sc_irq_rman, AR71XX_PCI_IRQ_START, - AR71XX_PCI_IRQ_END) != 0) - panic("ar71xx_pci_attach: failed to set up IRQ rman"); - - /* - * Check if there is a base slot hint. Otherwise use default value. - */ - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), "baseslot", &sc->sc_baseslot) != 0) { - device_printf(dev, - "%s: missing hint '%s', default to AR71XX_PCI_BASE_SLOT\n", - __func__, "baseslot"); - sc->sc_baseslot = AR71XX_PCI_BASE_SLOT; - } - - ATH_WRITE_REG(AR71XX_PCI_INTR_STATUS, 0); - ATH_WRITE_REG(AR71XX_PCI_INTR_MASK, 0); - - /* Hook up our interrupt handler. */ - if ((sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE)) == NULL) { - device_printf(dev, "unable to allocate IRQ resource\n"); - return ENXIO; - } - - if ((bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC, - ar71xx_pci_intr, NULL, sc, &sc->sc_ih))) { - device_printf(dev, - "WARNING: unable to register interrupt handler\n"); - return ENXIO; - } - - /* reset PCI core and PCI bus */ - ar71xx_device_stop(RST_RESET_PCI_CORE | RST_RESET_PCI_BUS); - DELAY(100000); - - ar71xx_device_start(RST_RESET_PCI_CORE | RST_RESET_PCI_BUS); - DELAY(100000); - - /* Init PCI windows */ - ATH_WRITE_REG(AR71XX_PCI_WINDOW0, PCI_WINDOW0_ADDR); - ATH_WRITE_REG(AR71XX_PCI_WINDOW1, PCI_WINDOW1_ADDR); - ATH_WRITE_REG(AR71XX_PCI_WINDOW2, PCI_WINDOW2_ADDR); - ATH_WRITE_REG(AR71XX_PCI_WINDOW3, PCI_WINDOW3_ADDR); - ATH_WRITE_REG(AR71XX_PCI_WINDOW4, PCI_WINDOW4_ADDR); - ATH_WRITE_REG(AR71XX_PCI_WINDOW5, PCI_WINDOW5_ADDR); - ATH_WRITE_REG(AR71XX_PCI_WINDOW6, PCI_WINDOW6_ADDR); - ATH_WRITE_REG(AR71XX_PCI_WINDOW7, PCI_WINDOW7_CONF_ADDR); - DELAY(100000); - - mtx_lock_spin(&ar71xx_pci_mtx); - ar71xx_pci_check_bus_error(); - mtx_unlock_spin(&ar71xx_pci_mtx); - - /* Fixup internal PCI bridge */ - ar71xx_pci_local_write(dev, PCIR_COMMAND, - PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN - | PCIM_CMD_SERRESPEN | PCIM_CMD_BACKTOBACK - | PCIM_CMD_PERRESPEN | PCIM_CMD_MWRICEN, 4); - -#ifdef AR71XX_ATH_EEPROM - /* - * Hard-code a check for slot 17 and 18 - these are - * the two PCI slots which may have a PCI device that - * requires "fixing". - */ - ar71xx_pci_slot_fixup(dev, 0, 17, 0); - ar71xx_pci_slot_fixup(dev, 0, 18, 0); -#endif /* AR71XX_ATH_EEPROM */ - - device_add_child(dev, "pci", -1); - return (bus_generic_attach(dev)); -} - -static int -ar71xx_pci_read_ivar(device_t dev, device_t child, int which, - uintptr_t *result) -{ - struct ar71xx_pci_softc *sc = device_get_softc(dev); - - switch (which) { - case PCIB_IVAR_DOMAIN: - *result = 0; - return (0); - case PCIB_IVAR_BUS: - *result = sc->sc_busno; - return (0); - } - - return (ENOENT); -} - -static int -ar71xx_pci_write_ivar(device_t dev, device_t child, int which, - uintptr_t result) -{ - struct ar71xx_pci_softc * sc = device_get_softc(dev); - - switch (which) { - case PCIB_IVAR_BUS: - sc->sc_busno = result; - return (0); - } - - return (ENOENT); -} - -static struct resource * -ar71xx_pci_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - - struct ar71xx_pci_softc *sc = device_get_softc(bus); - struct resource *rv; - struct rman *rm; - - switch (type) { - case SYS_RES_IRQ: - rm = &sc->sc_irq_rman; - break; - case SYS_RES_MEMORY: - rm = &sc->sc_mem_rman; - break; - default: - return (NULL); - } - - rv = rman_reserve_resource(rm, start, end, count, flags, child); - - if (rv == NULL) - return (NULL); - - rman_set_rid(rv, *rid); - - if (flags & RF_ACTIVE) { - if (bus_activate_resource(child, type, *rid, rv)) { - rman_release_resource(rv); - return (NULL); - } - } - return (rv); -} - -static int -ar71xx_pci_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - int res = (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), - child, type, rid, r)); - - if (!res) { - switch(type) { - case SYS_RES_MEMORY: - case SYS_RES_IOPORT: - rman_set_bustag(r, ar71xx_bus_space_pcimem); - break; - } - } - return (res); -} - -static int -ar71xx_pci_setup_intr(device_t bus, device_t child, struct resource *ires, - int flags, driver_filter_t *filt, driver_intr_t *handler, - void *arg, void **cookiep) -{ - struct ar71xx_pci_softc *sc = device_get_softc(bus); - struct intr_event *event; - int irq, error; - - irq = rman_get_start(ires); - - if (irq > AR71XX_PCI_IRQ_END) - panic("%s: bad irq %d", __func__, irq); - - event = sc->sc_eventstab[irq]; - if (event == NULL) { - error = intr_event_create(&event, (void *)irq, 0, irq, - ar71xx_pci_mask_irq, ar71xx_pci_unmask_irq, NULL, NULL, - "pci intr%d:", irq); - - if (error == 0) { - sc->sc_eventstab[irq] = event; - sc->sc_intr_counter[irq] = - mips_intrcnt_create(event->ie_name); - } - else - return (error); - } - - intr_event_add_handler(event, device_get_nameunit(child), filt, - handler, arg, intr_priority(flags), flags, cookiep); - mips_intrcnt_setname(sc->sc_intr_counter[irq], event->ie_fullname); - - ar71xx_pci_unmask_irq((void*)irq); - - return (0); -} - -static int -ar71xx_pci_teardown_intr(device_t dev, device_t child, struct resource *ires, - void *cookie) -{ - struct ar71xx_pci_softc *sc = device_get_softc(dev); - int irq, result; - - irq = rman_get_start(ires); - if (irq > AR71XX_PCI_IRQ_END) - panic("%s: bad irq %d", __func__, irq); - - if (sc->sc_eventstab[irq] == NULL) - panic("Trying to teardown unoccupied IRQ"); - - ar71xx_pci_mask_irq((void*)irq); - - result = intr_event_remove_handler(cookie); - if (!result) - sc->sc_eventstab[irq] = NULL; - - return (result); -} - -static int -ar71xx_pci_intr(void *arg) -{ - struct ar71xx_pci_softc *sc = arg; - struct intr_event *event; - uint32_t reg, irq, mask; - - reg = ATH_READ_REG(AR71XX_PCI_INTR_STATUS); - mask = ATH_READ_REG(AR71XX_PCI_INTR_MASK); - /* - * Handle only unmasked interrupts - */ - reg &= mask; - for (irq = AR71XX_PCI_IRQ_START; irq <= AR71XX_PCI_IRQ_END; irq++) { - if (reg & (1 << irq)) { - event = sc->sc_eventstab[irq]; - if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) { - /* Ignore timer interrupts */ - if (irq != 0) - printf("Stray IRQ %d\n", irq); - continue; - } - - /* Flush DDR FIFO for PCI/PCIe */ - ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_PCIE); - - /* TODO: frame instead of NULL? */ - intr_event_handle(event, NULL); - mips_intrcnt_inc(sc->sc_intr_counter[irq]); - } - } - - return (FILTER_HANDLED); -} - -static int -ar71xx_pci_maxslots(device_t dev) -{ - - return (PCI_SLOTMAX); -} - -static int -ar71xx_pci_route_interrupt(device_t pcib, device_t device, int pin) -{ - struct ar71xx_pci_softc *sc = device_get_softc(pcib); - - if (pci_get_slot(device) < sc->sc_baseslot) - panic("%s: PCI slot %d is less then AR71XX_PCI_BASE_SLOT", - __func__, pci_get_slot(device)); - - return (pci_get_slot(device) - sc->sc_baseslot); -} - -static device_method_t ar71xx_pci_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ar71xx_pci_probe), - DEVMETHOD(device_attach, ar71xx_pci_attach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* Bus interface */ - DEVMETHOD(bus_read_ivar, ar71xx_pci_read_ivar), - DEVMETHOD(bus_write_ivar, ar71xx_pci_write_ivar), - DEVMETHOD(bus_alloc_resource, ar71xx_pci_alloc_resource), - DEVMETHOD(bus_release_resource, bus_generic_release_resource), - DEVMETHOD(bus_activate_resource, ar71xx_pci_activate_resource), - DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), - DEVMETHOD(bus_setup_intr, ar71xx_pci_setup_intr), - DEVMETHOD(bus_teardown_intr, ar71xx_pci_teardown_intr), - - /* pcib interface */ - DEVMETHOD(pcib_maxslots, ar71xx_pci_maxslots), - DEVMETHOD(pcib_read_config, ar71xx_pci_read_config), - DEVMETHOD(pcib_write_config, ar71xx_pci_write_config), - DEVMETHOD(pcib_route_interrupt, ar71xx_pci_route_interrupt), - DEVMETHOD(pcib_request_feature, pcib_request_feature_allow), - - DEVMETHOD_END -}; - -static driver_t ar71xx_pci_driver = { - "pcib", - ar71xx_pci_methods, - sizeof(struct ar71xx_pci_softc), -}; - -static devclass_t ar71xx_pci_devclass; - -DRIVER_MODULE(ar71xx_pci, nexus, ar71xx_pci_driver, ar71xx_pci_devclass, 0, 0); diff --git a/sys/mips/atheros/ar71xx_pci_bus_space.c b/sys/mips/atheros/ar71xx_pci_bus_space.c deleted file mode 100644 index 8ac100806d4..00000000000 --- a/sys/mips/atheros/ar71xx_pci_bus_space.c +++ /dev/null @@ -1,198 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#include -#include -#include -#include -#include - -#include -#include - -static bs_r_1_s_proto(pcimem); -static bs_r_2_s_proto(pcimem); -static bs_r_4_s_proto(pcimem); -static bs_w_1_s_proto(pcimem); -static bs_w_2_s_proto(pcimem); -static bs_w_4_s_proto(pcimem); - -/* - * Bus space that handles offsets in word for 1/2 bytes read/write access. - * Byte order of values is handled by device drivers itself. - */ -static struct bus_space bus_space_pcimem = { - /* cookie */ - (void *) 0, - - /* mapping/unmapping */ - generic_bs_map, - generic_bs_unmap, - generic_bs_subregion, - - /* allocation/deallocation */ - NULL, - NULL, - - /* barrier */ - generic_bs_barrier, - - /* read (single) */ - generic_bs_r_1, - generic_bs_r_2, - generic_bs_r_4, - NULL, - - /* read multiple */ - generic_bs_rm_1, - generic_bs_rm_2, - generic_bs_rm_4, - NULL, - - /* read region */ - generic_bs_rr_1, - generic_bs_rr_2, - generic_bs_rr_4, - NULL, - - /* write (single) */ - generic_bs_w_1, - generic_bs_w_2, - generic_bs_w_4, - NULL, - - /* write multiple */ - generic_bs_wm_1, - generic_bs_wm_2, - generic_bs_wm_4, - NULL, - - /* write region */ - NULL, - generic_bs_wr_2, - generic_bs_wr_4, - NULL, - - /* set multiple */ - NULL, - NULL, - NULL, - NULL, - - /* set region */ - NULL, - generic_bs_sr_2, - generic_bs_sr_4, - NULL, - - /* copy */ - NULL, - generic_bs_c_2, - NULL, - NULL, - - /* read (single) stream */ - pcimem_bs_r_1_s, - pcimem_bs_r_2_s, - pcimem_bs_r_4_s, - NULL, - - /* read multiple stream */ - generic_bs_rm_1, - generic_bs_rm_2, - generic_bs_rm_4, - NULL, - - /* read region stream */ - generic_bs_rr_1, - generic_bs_rr_2, - generic_bs_rr_4, - NULL, - - /* write (single) stream */ - pcimem_bs_w_1_s, - pcimem_bs_w_2_s, - pcimem_bs_w_4_s, - NULL, - - /* write multiple stream */ - generic_bs_wm_1, - generic_bs_wm_2, - generic_bs_wm_4, - NULL, - - /* write region stream */ - NULL, - generic_bs_wr_2, - generic_bs_wr_4, - NULL, -}; - -bus_space_tag_t ar71xx_bus_space_pcimem = &bus_space_pcimem; - -static uint8_t -pcimem_bs_r_1_s(void *t, bus_space_handle_t h, bus_size_t o) -{ - - return readb(h + (o &~ 3) + (3 - (o & 3))); -} - -static void -pcimem_bs_w_1_s(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v) -{ - - writeb(h + (o &~ 3) + (3 - (o & 3)), v); -} - -static uint16_t -pcimem_bs_r_2_s(void *t, bus_space_handle_t h, bus_size_t o) -{ - - return readw(h + (o &~ 3) + (2 - (o & 3))); -} - -static void -pcimem_bs_w_2_s(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v) -{ - - writew(h + (o &~ 3) + (2 - (o & 3)), v); -} - -static uint32_t -pcimem_bs_r_4_s(void *t, bus_space_handle_t h, bus_size_t o) -{ - - return le32toh(readl(h + o)); -} - -static void -pcimem_bs_w_4_s(void *t, bus_space_handle_t h, bus_size_t o, uint32_t v) -{ - - writel(h + o, htole32(v)); -} diff --git a/sys/mips/atheros/ar71xx_pci_bus_space.h b/sys/mips/atheros/ar71xx_pci_bus_space.h deleted file mode 100644 index c7a4d2f7292..00000000000 --- a/sys/mips/atheros/ar71xx_pci_bus_space.h +++ /dev/null @@ -1,35 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef __AR71XX_PCI_BUS_SPACEH__ -#define __AR71XX_PCI_BUS_SPACEH__ - -extern bus_space_tag_t ar71xx_bus_space_pcimem; - -#endif /* __AR71XX_PCI_BUS_SPACEH__ */ diff --git a/sys/mips/atheros/ar71xx_setup.c b/sys/mips/atheros/ar71xx_setup.c deleted file mode 100644 index 414314fd0e1..00000000000 --- a/sys/mips/atheros/ar71xx_setup.c +++ /dev/null @@ -1,234 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include - -#include - -#include -#include -#include -#include -#include -#include -#include - -#define AR71XX_SYS_TYPE_LEN 128 - -static char ar71xx_sys_type[AR71XX_SYS_TYPE_LEN]; -enum ar71xx_soc_type ar71xx_soc; -struct ar71xx_cpu_def * ar71xx_cpu_ops = NULL; - -void -ar71xx_detect_sys_type(void) -{ - char *chip = "????"; - uint32_t id; - uint32_t major; - uint32_t minor; - uint32_t rev = 0; - - id = ATH_READ_REG(AR71XX_RST_RESET_REG_REV_ID); - major = id & REV_ID_MAJOR_MASK; - - switch (major) { - case REV_ID_MAJOR_AR71XX: - minor = id & AR71XX_REV_ID_MINOR_MASK; - rev = id >> AR71XX_REV_ID_REVISION_SHIFT; - rev &= AR71XX_REV_ID_REVISION_MASK; - ar71xx_cpu_ops = &ar71xx_chip_def; - switch (minor) { - case AR71XX_REV_ID_MINOR_AR7130: - ar71xx_soc = AR71XX_SOC_AR7130; - chip = "7130"; - break; - - case AR71XX_REV_ID_MINOR_AR7141: - ar71xx_soc = AR71XX_SOC_AR7141; - chip = "7141"; - break; - - case AR71XX_REV_ID_MINOR_AR7161: - ar71xx_soc = AR71XX_SOC_AR7161; - chip = "7161"; - break; - } - break; - - case REV_ID_MAJOR_AR7240: - ar71xx_soc = AR71XX_SOC_AR7240; - chip = "7240"; - ar71xx_cpu_ops = &ar724x_chip_def; - rev = (id & AR724X_REV_ID_REVISION_MASK); - break; - - case REV_ID_MAJOR_AR7241: - ar71xx_soc = AR71XX_SOC_AR7241; - chip = "7241"; - ar71xx_cpu_ops = &ar724x_chip_def; - rev = (id & AR724X_REV_ID_REVISION_MASK); - break; - - case REV_ID_MAJOR_AR7242: - ar71xx_soc = AR71XX_SOC_AR7242; - chip = "7242"; - ar71xx_cpu_ops = &ar724x_chip_def; - rev = (id & AR724X_REV_ID_REVISION_MASK); - break; - - case REV_ID_MAJOR_AR913X: - minor = id & AR91XX_REV_ID_MINOR_MASK; - rev = id >> AR91XX_REV_ID_REVISION_SHIFT; - rev &= AR91XX_REV_ID_REVISION_MASK; - ar71xx_cpu_ops = &ar91xx_chip_def; - switch (minor) { - case AR91XX_REV_ID_MINOR_AR9130: - ar71xx_soc = AR71XX_SOC_AR9130; - chip = "9130"; - break; - - case AR91XX_REV_ID_MINOR_AR9132: - ar71xx_soc = AR71XX_SOC_AR9132; - chip = "9132"; - break; - } - break; - case REV_ID_MAJOR_AR9330: - minor = 0; - rev = (id & AR933X_REV_ID_REVISION_MASK); - chip = "9330"; - ar71xx_cpu_ops = &ar933x_chip_def; - ar71xx_soc = AR71XX_SOC_AR9330; - break; - case REV_ID_MAJOR_AR9331: - minor = 1; - rev = (id & AR933X_REV_ID_REVISION_MASK); - chip = "9331"; - ar71xx_soc = AR71XX_SOC_AR9331; - ar71xx_cpu_ops = &ar933x_chip_def; - break; - - case REV_ID_MAJOR_AR9341: - minor = 0; - rev = (id & AR934X_REV_ID_REVISION_MASK); - chip = "9341"; - ar71xx_soc = AR71XX_SOC_AR9341; - ar71xx_cpu_ops = &ar934x_chip_def; - break; - - case REV_ID_MAJOR_AR9342: - minor = 0; - rev = (id & AR934X_REV_ID_REVISION_MASK); - chip = "9342"; - ar71xx_soc = AR71XX_SOC_AR9342; - ar71xx_cpu_ops = &ar934x_chip_def; - break; - - case REV_ID_MAJOR_AR9344: - minor = 0; - rev = (id & AR934X_REV_ID_REVISION_MASK); - chip = "9344"; - ar71xx_soc = AR71XX_SOC_AR9344; - ar71xx_cpu_ops = &ar934x_chip_def; - break; - - case REV_ID_MAJOR_QCA9533: - minor = 0; - rev = (id & QCA953X_REV_ID_REVISION_MASK); - chip = "9533"; - ar71xx_soc = AR71XX_SOC_QCA9533; - ar71xx_cpu_ops = &qca953x_chip_def; - break; - - case REV_ID_MAJOR_QCA9533_V2: - minor = 0; - rev = (id & QCA953X_REV_ID_REVISION_MASK); - chip = "9533v2"; - ar71xx_soc = AR71XX_SOC_QCA9533_V2; - ar71xx_cpu_ops = &qca953x_chip_def; - break; - - case REV_ID_MAJOR_QCA9556: - minor = 0; - rev = (id & QCA955X_REV_ID_REVISION_MASK); - chip = "9556"; - ar71xx_soc = AR71XX_SOC_QCA9556; - ar71xx_cpu_ops = &qca955x_chip_def; - break; - - case REV_ID_MAJOR_QCA9558: - minor = 0; - rev = (id & QCA955X_REV_ID_REVISION_MASK); - chip = "9558"; - ar71xx_soc = AR71XX_SOC_QCA9558; - ar71xx_cpu_ops = &qca955x_chip_def; - break; - - default: - panic("ar71xx: unknown chip id:0x%08x\n", id); - } - - sprintf(ar71xx_sys_type, "Atheros AR%s rev %u", chip, rev); -} - -const char * -ar71xx_get_system_type(void) -{ - return ar71xx_sys_type; -} diff --git a/sys/mips/atheros/ar71xx_setup.h b/sys/mips/atheros/ar71xx_setup.h deleted file mode 100644 index 51a58dbf058..00000000000 --- a/sys/mips/atheros/ar71xx_setup.h +++ /dev/null @@ -1,58 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef __AR71XX_SETUP_H__ -#define __AR71XX_SETUP_H__ - -enum ar71xx_soc_type { - AR71XX_SOC_UNKNOWN, - AR71XX_SOC_AR7130, - AR71XX_SOC_AR7141, - AR71XX_SOC_AR7161, - AR71XX_SOC_AR7240, - AR71XX_SOC_AR7241, - AR71XX_SOC_AR7242, - AR71XX_SOC_AR9130, - AR71XX_SOC_AR9132, - AR71XX_SOC_AR9330, - AR71XX_SOC_AR9331, - AR71XX_SOC_AR9341, - AR71XX_SOC_AR9342, - AR71XX_SOC_AR9344, - AR71XX_SOC_QCA9556, - AR71XX_SOC_QCA9558, - AR71XX_SOC_QCA9533, - AR71XX_SOC_QCA9533_V2, -}; -extern enum ar71xx_soc_type ar71xx_soc; - -extern void ar71xx_detect_sys_type(void); -extern const char *ar71xx_get_system_type(void); - -#endif diff --git a/sys/mips/atheros/ar71xx_spi.c b/sys/mips/atheros/ar71xx_spi.c deleted file mode 100644 index fd90188a84a..00000000000 --- a/sys/mips/atheros/ar71xx_spi.c +++ /dev/null @@ -1,294 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include -#include -#include "spibus_if.h" - -#include - -#undef AR71XX_SPI_DEBUG -#ifdef AR71XX_SPI_DEBUG -#define dprintf printf -#else -#define dprintf(x, arg...) -#endif - -/* - * register space access macros - */ - -#define SPI_BARRIER_WRITE(sc) bus_barrier((sc)->sc_mem_res, 0, 0, \ - BUS_SPACE_BARRIER_WRITE) -#define SPI_BARRIER_READ(sc) bus_barrier((sc)->sc_mem_res, 0, 0, \ - BUS_SPACE_BARRIER_READ) -#define SPI_BARRIER_RW(sc) bus_barrier((sc)->sc_mem_res, 0, 0, \ - BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE) - -#define SPI_WRITE(sc, reg, val) do { \ - bus_write_4(sc->sc_mem_res, (reg), (val)); \ - } while (0) - -#define SPI_READ(sc, reg) bus_read_4(sc->sc_mem_res, (reg)) - -#define SPI_SET_BITS(sc, reg, bits) \ - SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) | (bits)) - -#define SPI_CLEAR_BITS(sc, reg, bits) \ - SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) & ~(bits)) - -struct ar71xx_spi_softc { - device_t sc_dev; - struct resource *sc_mem_res; - uint32_t sc_reg_ctrl; -}; - -static int -ar71xx_spi_probe(device_t dev) -{ - device_set_desc(dev, "AR71XX SPI"); - return (BUS_PROBE_NOWILDCARD); -} - -static int -ar71xx_spi_attach(device_t dev) -{ - struct ar71xx_spi_softc *sc = device_get_softc(dev); - int rid; - - sc->sc_dev = dev; - rid = 0; - sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (!sc->sc_mem_res) { - device_printf(dev, "Could not map memory\n"); - return (ENXIO); - } - - SPI_WRITE(sc, AR71XX_SPI_FS, 1); - - /* Flush out read before reading the control register */ - SPI_BARRIER_WRITE(sc); - - sc->sc_reg_ctrl = SPI_READ(sc, AR71XX_SPI_CTRL); - - /* - * XXX TODO: document what the SPI control register does. - */ - SPI_WRITE(sc, AR71XX_SPI_CTRL, 0x43); - - /* - * Ensure the config register write has gone out before configuring - * the chip select mask. - */ - SPI_BARRIER_WRITE(sc); - SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, SPI_IO_CTRL_CSMASK); - - /* - * .. and ensure the write has gone out before continuing. - */ - SPI_BARRIER_WRITE(sc); - - device_add_child(dev, "spibus", -1); - return (bus_generic_attach(dev)); -} - -static void -ar71xx_spi_chip_activate(struct ar71xx_spi_softc *sc, int cs) -{ - uint32_t ioctrl = SPI_IO_CTRL_CSMASK; - /* - * Put respective CSx to low - */ - ioctrl &= ~(SPI_IO_CTRL_CS0 << cs); - - /* - * Make sure any other writes have gone out to the - * device before changing the chip select line; - * then ensure that it has made it out to the device - * before continuing. - */ - SPI_BARRIER_WRITE(sc); - SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, ioctrl); - SPI_BARRIER_WRITE(sc); -} - -static void -ar71xx_spi_chip_deactivate(struct ar71xx_spi_softc *sc, int cs) -{ - /* - * Put all CSx to high - */ - SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, SPI_IO_CTRL_CSMASK); -} - -static uint8_t -ar71xx_spi_txrx(struct ar71xx_spi_softc *sc, int cs, uint8_t data) -{ - int bit; - /* CS0 */ - uint32_t ioctrl = SPI_IO_CTRL_CSMASK; - /* - * low-level for selected CS - */ - ioctrl &= ~(SPI_IO_CTRL_CS0 << cs); - - uint32_t iod, rds; - for (bit = 7; bit >=0; bit--) { - if (data & (1 << bit)) - iod = ioctrl | SPI_IO_CTRL_DO; - else - iod = ioctrl & ~SPI_IO_CTRL_DO; - SPI_BARRIER_WRITE(sc); - SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, iod); - SPI_BARRIER_WRITE(sc); - SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, iod | SPI_IO_CTRL_CLK); - } - - /* - * Provide falling edge for connected device by clear clock bit. - */ - SPI_BARRIER_WRITE(sc); - SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, iod); - SPI_BARRIER_WRITE(sc); - rds = SPI_READ(sc, AR71XX_SPI_RDS); - - return (rds & 0xff); -} - -static int -ar71xx_spi_transfer(device_t dev, device_t child, struct spi_command *cmd) -{ - struct ar71xx_spi_softc *sc; - uint32_t cs; - uint8_t *buf_in, *buf_out; - int i; - - sc = device_get_softc(dev); - - spibus_get_cs(child, &cs); - - cs &= ~SPIBUS_CS_HIGH; - - ar71xx_spi_chip_activate(sc, cs); - - KASSERT(cmd->tx_cmd_sz == cmd->rx_cmd_sz, - ("TX/RX command sizes should be equal")); - KASSERT(cmd->tx_data_sz == cmd->rx_data_sz, - ("TX/RX data sizes should be equal")); - - /* - * Transfer command - */ - buf_out = (uint8_t *)cmd->tx_cmd; - buf_in = (uint8_t *)cmd->rx_cmd; - for (i = 0; i < cmd->tx_cmd_sz; i++) - buf_in[i] = ar71xx_spi_txrx(sc, cs, buf_out[i]); - - /* - * Receive/transmit data (depends on command) - */ - buf_out = (uint8_t *)cmd->tx_data; - buf_in = (uint8_t *)cmd->rx_data; - for (i = 0; i < cmd->tx_data_sz; i++) - buf_in[i] = ar71xx_spi_txrx(sc, cs, buf_out[i]); - - ar71xx_spi_chip_deactivate(sc, cs); - - return (0); -} - -static int -ar71xx_spi_detach(device_t dev) -{ - struct ar71xx_spi_softc *sc = device_get_softc(dev); - - /* - * Ensure any other writes to the device are finished - * before we tear down the SPI device. - */ - SPI_BARRIER_WRITE(sc); - - /* - * Restore the control register; ensure it has hit the - * hardware before continuing. - */ - SPI_WRITE(sc, AR71XX_SPI_CTRL, sc->sc_reg_ctrl); - SPI_BARRIER_WRITE(sc); - - /* - * And now, put the flash back into mapped IO mode and - * ensure _that_ has completed before we finish up. - */ - SPI_WRITE(sc, AR71XX_SPI_FS, 0); - SPI_BARRIER_WRITE(sc); - - if (sc->sc_mem_res) - bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); - - return (0); -} - -static device_method_t ar71xx_spi_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ar71xx_spi_probe), - DEVMETHOD(device_attach, ar71xx_spi_attach), - DEVMETHOD(device_detach, ar71xx_spi_detach), - - DEVMETHOD(spibus_transfer, ar71xx_spi_transfer), - {0, 0} -}; - -static driver_t ar71xx_spi_driver = { - "spi", - ar71xx_spi_methods, - sizeof(struct ar71xx_spi_softc), -}; - -static devclass_t ar71xx_spi_devclass; - -DRIVER_MODULE(ar71xx_spi, nexus, ar71xx_spi_driver, ar71xx_spi_devclass, 0, 0); diff --git a/sys/mips/atheros/ar71xx_wdog.c b/sys/mips/atheros/ar71xx_wdog.c deleted file mode 100644 index 7640f96741e..00000000000 --- a/sys/mips/atheros/ar71xx_wdog.c +++ /dev/null @@ -1,182 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Watchdog driver for AR71xx - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -struct ar71xx_wdog_softc { - device_t dev; - int armed; - int reboot_from_watchdog; - int watchdog_nmi; - int debug; -}; - -static void -ar71xx_wdog_watchdog_fn(void *private, u_int cmd, int *error) -{ - struct ar71xx_wdog_softc *sc = private; - uint64_t timer_val; - int action; - - action = RST_WDOG_ACTION_RESET; - if (sc->watchdog_nmi != 0) - action = RST_WDOG_ACTION_NMI; - - cmd &= WD_INTERVAL; - if (sc->debug) - device_printf(sc->dev, "%s: : cmd: %x\n", __func__, cmd); - if (cmd > 0) { - timer_val = (uint64_t)(1ULL << cmd) * ar71xx_ahb_freq() / - 1000000000; - - /* - * Clamp the timer value in case we overflow. - */ - if (timer_val > 0xffffffff) - timer_val = 0xffffffff; - if (sc->debug) - device_printf(sc->dev, "%s: programming timer: %jx\n", - __func__, (uintmax_t) timer_val); - /* - * Make sure the watchdog is set to NOACTION and give it - * time to take. - */ - ATH_WRITE_REG(AR71XX_RST_WDOG_CONTROL, RST_WDOG_ACTION_NOACTION); - wmb(); - DELAY(100); - - /* - * Update the timer value. It's already clamped at this - * point so we don't have to wrap/clamp it here. - */ - ATH_WRITE_REG(AR71XX_RST_WDOG_TIMER, timer_val); - wmb(); - DELAY(100); - - /* - * And now, arm. - */ - ATH_WRITE_REG(AR71XX_RST_WDOG_CONTROL, action); - sc->armed = 1; - *error = 0; - } else { - if (sc->debug) - device_printf(sc->dev, "%s: disarming\n", __func__); - if (sc->armed) { - ATH_WRITE_REG(AR71XX_RST_WDOG_CONTROL, - RST_WDOG_ACTION_NOACTION); - sc->armed = 0; - } - } -} - -static int -ar71xx_wdog_probe(device_t dev) -{ - - device_set_desc(dev, "Atheros AR71XX watchdog timer"); - return (BUS_PROBE_NOWILDCARD); -} - -static void -ar71xx_wdog_sysctl(device_t dev) -{ - struct ar71xx_wdog_softc *sc = device_get_softc(dev); - - struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev); - struct sysctl_oid *tree = device_get_sysctl_tree(sc->dev); - - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "debug", CTLFLAG_RW, &sc->debug, 0, - "enable watchdog debugging"); - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "nmi", CTLFLAG_RW, &sc->watchdog_nmi, 0, - "watchdog triggers NMI instead of reset"); - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "armed", CTLFLAG_RD, &sc->armed, 0, - "whether the watchdog is armed"); - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "reboot_from_watchdog", CTLFLAG_RD, &sc->reboot_from_watchdog, 0, - "whether the system rebooted from the watchdog"); -} - -static int -ar71xx_wdog_attach(device_t dev) -{ - struct ar71xx_wdog_softc *sc = device_get_softc(dev); - - /* Initialise */ - sc->reboot_from_watchdog = 0; - sc->armed = 0; - sc->debug = 0; - - if (ATH_READ_REG(AR71XX_RST_WDOG_CONTROL) & RST_WDOG_LAST) { - device_printf (dev, - "Previous reset was due to watchdog timeout\n"); - sc->reboot_from_watchdog = 1; - } - - ATH_WRITE_REG(AR71XX_RST_WDOG_CONTROL, RST_WDOG_ACTION_NOACTION); - - sc->dev = dev; - EVENTHANDLER_REGISTER(watchdog_list, ar71xx_wdog_watchdog_fn, sc, 0); - ar71xx_wdog_sysctl(dev); - - return (0); -} - -static device_method_t ar71xx_wdog_methods[] = { - DEVMETHOD(device_probe, ar71xx_wdog_probe), - DEVMETHOD(device_attach, ar71xx_wdog_attach), - {0, 0}, -}; - -static driver_t ar71xx_wdog_driver = { - "ar71xx_wdog", - ar71xx_wdog_methods, - sizeof(struct ar71xx_wdog_softc), -}; -static devclass_t ar71xx_wdog_devclass; - -DRIVER_MODULE(ar71xx_wdog, nexus, ar71xx_wdog_driver, ar71xx_wdog_devclass, 0, 0); diff --git a/sys/mips/atheros/ar71xxreg.h b/sys/mips/atheros/ar71xxreg.h deleted file mode 100644 index 27246771de7..00000000000 --- a/sys/mips/atheros/ar71xxreg.h +++ /dev/null @@ -1,575 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009 Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef _AR71XX_REG_H_ -#define _AR71XX_REG_H_ - -/* PCI region */ -#define AR71XX_PCI_MEM_BASE 0x10000000 -/* - * PCI mem windows is 0x08000000 bytes long but we exclude control - * region from the resource manager - */ -#define AR71XX_PCI_MEM_SIZE 0x07000000 -#define AR71XX_PCI_IRQ_START 0 -#define AR71XX_PCI_IRQ_END 2 -#define AR71XX_PCI_NIRQS 3 -/* - * PCI devices slots are starting from this number - */ -#define AR71XX_PCI_BASE_SLOT 17 - -/* PCI config registers */ -#define AR71XX_PCI_LCONF_CMD 0x17010000 -#define PCI_LCONF_CMD_READ 0x00000000 -#define PCI_LCONF_CMD_WRITE 0x00010000 -#define AR71XX_PCI_LCONF_WRITE_DATA 0x17010004 -#define AR71XX_PCI_LCONF_READ_DATA 0x17010008 -#define AR71XX_PCI_CONF_ADDR 0x1701000C -#define AR71XX_PCI_CONF_CMD 0x17010010 -#define PCI_CONF_CMD_READ 0x0000000A -#define PCI_CONF_CMD_WRITE 0x0000000B -#define AR71XX_PCI_CONF_WRITE_DATA 0x17010014 -#define AR71XX_PCI_CONF_READ_DATA 0x17010018 -#define AR71XX_PCI_ERROR 0x1701001C -#define AR71XX_PCI_ERROR_ADDR 0x17010020 -#define AR71XX_PCI_AHB_ERROR 0x17010024 -#define AR71XX_PCI_AHB_ERROR_ADDR 0x17010028 - -/* APB region */ -/* - * Size is not really true actual APB window size is - * 0x01000000 but it should handle OHCI memory as well - * because this controller's interrupt is routed through - * APB. - */ -#define AR71XX_APB_BASE 0x18000000 -#define AR71XX_APB_SIZE 0x06000000 - -/* DDR registers */ -#define AR71XX_DDR_CONFIG 0x18000000 -#define AR71XX_DDR_CONFIG2 0x18000004 -#define AR71XX_DDR_MODE_REGISTER 0x18000008 -#define AR71XX_DDR_EXT_MODE_REGISTER 0x1800000C -#define AR71XX_DDR_CONTROL 0x18000010 -#define AR71XX_DDR_REFRESH 0x18000014 -#define AR71XX_DDR_RD_DATA_THIS_CYCLE 0x18000018 -#define AR71XX_TAP_CONTROL0 0x1800001C -#define AR71XX_TAP_CONTROL1 0x18000020 -#define AR71XX_TAP_CONTROL2 0x18000024 -#define AR71XX_TAP_CONTROL3 0x18000028 -#define AR71XX_PCI_WINDOW0 0x1800007C -#define AR71XX_PCI_WINDOW1 0x18000080 -#define AR71XX_PCI_WINDOW2 0x18000084 -#define AR71XX_PCI_WINDOW3 0x18000088 -#define AR71XX_PCI_WINDOW4 0x1800008C -#define AR71XX_PCI_WINDOW5 0x18000090 -#define AR71XX_PCI_WINDOW6 0x18000094 -#define AR71XX_PCI_WINDOW7 0x18000098 -#define AR71XX_WB_FLUSH_GE0 0x1800009C -#define AR71XX_WB_FLUSH_GE1 0x180000A0 -#define AR71XX_WB_FLUSH_USB 0x180000A4 -#define AR71XX_WB_FLUSH_PCI 0x180000A8 - -/* - * Values for PCI_WINDOW_X registers - */ -#define PCI_WINDOW0_ADDR 0x10000000 -#define PCI_WINDOW1_ADDR 0x11000000 -#define PCI_WINDOW2_ADDR 0x12000000 -#define PCI_WINDOW3_ADDR 0x13000000 -#define PCI_WINDOW4_ADDR 0x14000000 -#define PCI_WINDOW5_ADDR 0x15000000 -#define PCI_WINDOW6_ADDR 0x16000000 -#define PCI_WINDOW7_ADDR 0x17000000 -/* This value enables acces to PCI config registers */ -#define PCI_WINDOW7_CONF_ADDR 0x07000000 - -#define AR71XX_UART_ADDR 0x18020000 -#define AR71XX_UART_THR 0x0 -#define AR71XX_UART_LSR 0x14 -#define AR71XX_UART_LSR_THRE (1 << 5) -#define AR71XX_UART_LSR_TEMT (1 << 6) - -#define AR71XX_USB_CTRL_FLADJ 0x18030000 -#define USB_CTRL_FLADJ_HOST_SHIFT 12 -#define USB_CTRL_FLADJ_A5_SHIFT 10 -#define USB_CTRL_FLADJ_A4_SHIFT 8 -#define USB_CTRL_FLADJ_A3_SHIFT 6 -#define USB_CTRL_FLADJ_A2_SHIFT 4 -#define USB_CTRL_FLADJ_A1_SHIFT 2 -#define USB_CTRL_FLADJ_A0_SHIFT 0 -#define AR71XX_USB_CTRL_CONFIG 0x18030004 -#define USB_CTRL_CONFIG_OHCI_DES_SWAP (1 << 19) -#define USB_CTRL_CONFIG_OHCI_BUF_SWAP (1 << 18) -#define USB_CTRL_CONFIG_EHCI_DES_SWAP (1 << 17) -#define USB_CTRL_CONFIG_EHCI_BUF_SWAP (1 << 16) -#define USB_CTRL_CONFIG_DISABLE_XTL (1 << 13) -#define USB_CTRL_CONFIG_OVERRIDE_XTL (1 << 12) -#define USB_CTRL_CONFIG_CLK_SEL_SHIFT 4 -#define USB_CTRL_CONFIG_CLK_SEL_MASK 3 -#define USB_CTRL_CONFIG_CLK_SEL_12 0 -#define USB_CTRL_CONFIG_CLK_SEL_24 1 -#define USB_CTRL_CONFIG_CLK_SEL_48 2 -#define USB_CTRL_CONFIG_OVER_CURRENT_AS_GPIO (1 << 8) -#define USB_CTRL_CONFIG_SS_SIMULATION_MODE (1 << 2) -#define USB_CTRL_CONFIG_RESUME_UTMI_PLS_DIS (1 << 1) -#define USB_CTRL_CONFIG_UTMI_BACKWARD_ENB (1 << 0) - -#define AR71XX_GPIO_BASE 0x18040000 -#define AR71XX_GPIO_OE 0x00 -#define AR71XX_GPIO_IN 0x04 -#define AR71XX_GPIO_OUT 0x08 -#define AR71XX_GPIO_SET 0x0c -#define AR71XX_GPIO_CLEAR 0x10 -#define AR71XX_GPIO_INT 0x14 -#define AR71XX_GPIO_INT_TYPE 0x18 -#define AR71XX_GPIO_INT_POLARITY 0x1c -#define AR71XX_GPIO_INT_PENDING 0x20 -#define AR71XX_GPIO_INT_MASK 0x24 -#define AR71XX_GPIO_FUNCTION 0x28 -#define GPIO_FUNC_STEREO_EN (1 << 17) -#define GPIO_FUNC_SLIC_EN (1 << 16) -#define GPIO_FUNC_SPI_CS2_EN (1 << 13) - /* CS2 is shared with GPIO_1 */ -#define GPIO_FUNC_SPI_CS1_EN (1 << 12) - /* CS1 is shared with GPIO_0 */ -#define GPIO_FUNC_UART_EN (1 << 8) -#define GPIO_FUNC_USB_OC_EN (1 << 4) -#define GPIO_FUNC_USB_CLK_EN (0) - -#define AR71XX_BASE_FREQ 40000000 -#define AR71XX_PLL_CPU_BASE 0x18050000 -#define AR71XX_PLL_CPU_CONFIG 0x18050000 -#define PLL_SW_UPDATE (1U << 31) -#define PLL_LOCKED (1 << 30) -#define PLL_AHB_DIV_SHIFT 20 -#define PLL_AHB_DIV_MASK 7 -#define PLL_DDR_DIV_SEL_SHIFT 18 -#define PLL_DDR_DIV_SEL_MASK 3 -#define PLL_CPU_DIV_SEL_SHIFT 16 -#define PLL_CPU_DIV_SEL_MASK 3 -#define PLL_LOOP_BW_SHIFT 12 -#define PLL_LOOP_BW_MASK 0xf -#define PLL_DIV_IN_SHIFT 10 -#define PLL_DIV_IN_MASK 3 -#define PLL_DIV_OUT_SHIFT 8 -#define PLL_DIV_OUT_MASK 3 -#define PLL_FB_SHIFT 3 -#define PLL_FB_MASK 0x1f -#define PLL_BYPASS (1 << 1) -#define PLL_POWER_DOWN (1 << 0) -#define AR71XX_PLL_SEC_CONFIG 0x18050004 -#define AR71XX_PLL_ETH0_SHIFT 17 -#define AR71XX_PLL_ETH1_SHIFT 19 -#define AR71XX_PLL_CPU_CLK_CTRL 0x18050008 -#define AR71XX_PLL_ETH_INT0_CLK 0x18050010 -#define AR71XX_PLL_ETH_INT1_CLK 0x18050014 -#define XPLL_ETH_INT_CLK_10 0x00991099 -#define XPLL_ETH_INT_CLK_100 0x00441011 -#define XPLL_ETH_INT_CLK_1000 0x13110000 -#define XPLL_ETH_INT_CLK_1000_GMII 0x14110000 -#define PLL_ETH_INT_CLK_10 0x00991099 -#define PLL_ETH_INT_CLK_100 0x00001099 -#define PLL_ETH_INT_CLK_1000 0x00110000 -#define AR71XX_PLL_ETH_EXT_CLK 0x18050018 -#define AR71XX_PLL_PCI_CLK 0x1805001C - -/* Reset block */ -#define AR71XX_RST_BLOCK_BASE 0x18060000 - -#define AR71XX_RST_WDOG_CONTROL 0x18060008 -#define RST_WDOG_LAST (1U << 31) -#define RST_WDOG_ACTION_MASK 3 -#define RST_WDOG_ACTION_RESET 3 -#define RST_WDOG_ACTION_NMI 2 -#define RST_WDOG_ACTION_GP_INTR 1 -#define RST_WDOG_ACTION_NOACTION 0 - -#define AR71XX_RST_WDOG_TIMER 0x1806000C -/* - * APB interrupt status and mask register and interrupt bit numbers for - */ -#define AR71XX_MISC_INTR_STATUS 0x18060010 -#define AR71XX_MISC_INTR_MASK 0x18060014 -#define MISC_INTR_TIMER 0 -#define MISC_INTR_ERROR 1 -#define MISC_INTR_GPIO 2 -#define MISC_INTR_UART 3 -#define MISC_INTR_WATCHDOG 4 -#define MISC_INTR_PERF 5 -#define MISC_INTR_OHCI 6 -#define MISC_INTR_DMA 7 - -#define AR71XX_PCI_INTR_STATUS 0x18060018 -#define AR71XX_PCI_INTR_MASK 0x1806001C -#define PCI_INTR_CORE (1 << 4) - -#define AR71XX_RST_RESET 0x18060024 -#define RST_RESET_FULL_CHIP (1 << 24) /* Same as pulling - the reset pin */ -#define RST_RESET_CPU_COLD (1 << 20) /* Cold reset */ -#define RST_RESET_GE1_MAC (1 << 13) -#define RST_RESET_GE1_PHY (1 << 12) -#define RST_RESET_GE0_MAC (1 << 9) -#define RST_RESET_GE0_PHY (1 << 8) -#define RST_RESET_USB_OHCI_DLL (1 << 6) -#define RST_RESET_USB_HOST (1 << 5) -#define RST_RESET_USB_PHY (1 << 4) -#define RST_RESET_PCI_BUS (1 << 1) -#define RST_RESET_PCI_CORE (1 << 0) - -/* Chipset revision details */ -#define AR71XX_RST_RESET_REG_REV_ID 0x18060090 -#define REV_ID_MAJOR_MASK 0xfff0 -#define REV_ID_MAJOR_AR71XX 0x00a0 -#define REV_ID_MAJOR_AR913X 0x00b0 -#define REV_ID_MAJOR_AR7240 0x00c0 -#define REV_ID_MAJOR_AR7241 0x0100 -#define REV_ID_MAJOR_AR7242 0x1100 - -/* AR71XX chipset revision details */ -#define AR71XX_REV_ID_MINOR_MASK 0x3 -#define AR71XX_REV_ID_MINOR_AR7130 0x0 -#define AR71XX_REV_ID_MINOR_AR7141 0x1 -#define AR71XX_REV_ID_MINOR_AR7161 0x2 -#define AR71XX_REV_ID_REVISION_MASK 0x3 -#define AR71XX_REV_ID_REVISION_SHIFT 2 - -/* AR724X chipset revision details */ -#define AR724X_REV_ID_REVISION_MASK 0x3 - -/* AR91XX chipset revision details */ -#define AR91XX_REV_ID_MINOR_MASK 0x3 -#define AR91XX_REV_ID_MINOR_AR9130 0x0 -#define AR91XX_REV_ID_MINOR_AR9132 0x1 -#define AR91XX_REV_ID_REVISION_MASK 0x3 -#define AR91XX_REV_ID_REVISION_SHIFT 2 - -typedef enum { - AR71XX_MII_MODE_NONE = 0, - AR71XX_MII_MODE_GMII, - AR71XX_MII_MODE_MII, - AR71XX_MII_MODE_RGMII, - AR71XX_MII_MODE_RMII, - AR71XX_MII_MODE_SGMII /* not hardware defined, though! */ -} ar71xx_mii_mode; - -/* - * AR71xx MII control region - */ -#define AR71XX_MII0_CTRL 0x18070000 -#define MII_CTRL_SPEED_SHIFT 4 -#define MII_CTRL_SPEED_MASK 3 -#define MII_CTRL_SPEED_10 0 -#define MII_CTRL_SPEED_100 1 -#define MII_CTRL_SPEED_1000 2 -#define MII_CTRL_IF_MASK 3 -#define MII_CTRL_IF_SHIFT 0 -#define MII0_CTRL_IF_GMII 0 -#define MII0_CTRL_IF_MII 1 -#define MII0_CTRL_IF_RGMII 2 -#define MII0_CTRL_IF_RMII 3 - -#define AR71XX_MII1_CTRL 0x18070004 - -#define MII1_CTRL_IF_RGMII 0 -#define MII1_CTRL_IF_RMII 1 - -/* - * GigE adapters region - */ -#define AR71XX_MAC0_BASE 0x19000000 -#define AR71XX_MAC1_BASE 0x1A000000 - -#define AR71XX_MAC_CFG1 0x00 -#define MAC_CFG1_SOFT_RESET (1U << 31) -#define MAC_CFG1_SIMUL_RESET (1 << 30) -#define MAC_CFG1_MAC_RX_BLOCK_RESET (1 << 19) -#define MAC_CFG1_MAC_TX_BLOCK_RESET (1 << 18) -#define MAC_CFG1_RX_FUNC_RESET (1 << 17) -#define MAC_CFG1_TX_FUNC_RESET (1 << 16) -#define MAC_CFG1_LOOPBACK (1 << 8) -#define MAC_CFG1_RXFLOW_CTRL (1 << 5) -#define MAC_CFG1_TXFLOW_CTRL (1 << 4) -#define MAC_CFG1_SYNC_RX (1 << 3) -#define MAC_CFG1_RX_ENABLE (1 << 2) -#define MAC_CFG1_SYNC_TX (1 << 1) -#define MAC_CFG1_TX_ENABLE (1 << 0) -#define AR71XX_MAC_CFG2 0x04 -#define MAC_CFG2_PREAMBLE_LEN_MASK 0xf -#define MAC_CFG2_PREAMBLE_LEN_SHIFT 12 -#define MAC_CFG2_IFACE_MODE_1000 (2 << 8) -#define MAC_CFG2_IFACE_MODE_10_100 (1 << 8) -#define MAC_CFG2_IFACE_MODE_SHIFT 8 -#define MAC_CFG2_IFACE_MODE_MASK 3 -#define MAC_CFG2_HUGE_FRAME (1 << 5) -#define MAC_CFG2_LENGTH_FIELD (1 << 4) -#define MAC_CFG2_ENABLE_PADCRC (1 << 2) -#define MAC_CFG2_ENABLE_CRC (1 << 1) -#define MAC_CFG2_FULL_DUPLEX (1 << 0) -#define AR71XX_MAC_IFG 0x08 -#define AR71XX_MAC_HDUPLEX 0x0C -#define AR71XX_MAC_MAX_FRAME_LEN 0x10 -#define AR71XX_MAC_MII_CFG 0x20 -#define MAC_MII_CFG_RESET (1U << 31) -#define MAC_MII_CFG_SCAN_AUTO_INC (1 << 5) -#define MAC_MII_CFG_PREAMBLE_SUP (1 << 4) -#define MAC_MII_CFG_CLOCK_SELECT_MASK 0x7 -#define MAC_MII_CFG_CLOCK_SELECT_MASK_AR933X 0xf -#define MAC_MII_CFG_CLOCK_DIV_4 0 -#define MAC_MII_CFG_CLOCK_DIV_6 2 -#define MAC_MII_CFG_CLOCK_DIV_8 3 -#define MAC_MII_CFG_CLOCK_DIV_10 4 -#define MAC_MII_CFG_CLOCK_DIV_14 5 -#define MAC_MII_CFG_CLOCK_DIV_20 6 -#define MAC_MII_CFG_CLOCK_DIV_28 7 - -/* .. and the AR933x/AR934x extensions */ -#define MAC_MII_CFG_CLOCK_DIV_34 8 -#define MAC_MII_CFG_CLOCK_DIV_42 9 -#define MAC_MII_CFG_CLOCK_DIV_50 10 -#define MAC_MII_CFG_CLOCK_DIV_58 11 -#define MAC_MII_CFG_CLOCK_DIV_66 12 -#define MAC_MII_CFG_CLOCK_DIV_74 13 -#define MAC_MII_CFG_CLOCK_DIV_82 14 -#define MAC_MII_CFG_CLOCK_DIV_98 15 - -#define AR71XX_MAC_MII_CMD 0x24 -#define MAC_MII_CMD_SCAN_CYCLE (1 << 1) -#define MAC_MII_CMD_READ 1 -#define MAC_MII_CMD_WRITE 0 -#define AR71XX_MAC_MII_ADDR 0x28 -#define MAC_MII_PHY_ADDR_SHIFT 8 -#define MAC_MII_PHY_ADDR_MASK 0xff -#define MAC_MII_REG_MASK 0x1f -#define AR71XX_MAC_MII_CONTROL 0x2C -#define MAC_MII_CONTROL_MASK 0xffff -#define AR71XX_MAC_MII_STATUS 0x30 -#define MAC_MII_STATUS_MASK 0xffff -#define AR71XX_MAC_MII_INDICATOR 0x34 -#define MAC_MII_INDICATOR_NOT_VALID (1 << 2) -#define MAC_MII_INDICATOR_SCANNING (1 << 1) -#define MAC_MII_INDICATOR_BUSY (1 << 0) -#define AR71XX_MAC_IFCONTROL 0x38 -#define MAC_IFCONTROL_SPEED (1 << 16) -#define AR71XX_MAC_STA_ADDR1 0x40 -#define AR71XX_MAC_STA_ADDR2 0x44 -#define AR71XX_MAC_FIFO_CFG0 0x48 -#define FIFO_CFG0_TX_FABRIC (1 << 4) -#define FIFO_CFG0_TX_SYSTEM (1 << 3) -#define FIFO_CFG0_RX_FABRIC (1 << 2) -#define FIFO_CFG0_RX_SYSTEM (1 << 1) -#define FIFO_CFG0_WATERMARK (1 << 0) -#define FIFO_CFG0_ALL ((1 << 5) - 1) -#define FIFO_CFG0_ENABLE_SHIFT 8 -#define AR71XX_MAC_FIFO_CFG1 0x4C -#define AR71XX_MAC_FIFO_CFG2 0x50 -#define AR71XX_MAC_FIFO_TX_THRESHOLD 0x54 -#define AR71XX_MAC_FIFO_RX_FILTMATCH 0x58 -/* - * These flags applicable both to AR71XX_MAC_FIFO_RX_FILTMASK and - * to AR71XX_MAC_FIFO_RX_FILTMATCH - */ -#define FIFO_RX_MATCH_UNICAST (1 << 17) -#define FIFO_RX_MATCH_TRUNC_FRAME (1 << 16) -#define FIFO_RX_MATCH_VLAN_TAG (1 << 15) -#define FIFO_RX_MATCH_UNSUP_OPCODE (1 << 14) -#define FIFO_RX_MATCH_PAUSE_FRAME (1 << 13) -#define FIFO_RX_MATCH_CTRL_FRAME (1 << 12) -#define FIFO_RX_MATCH_LONG_EVENT (1 << 11) -#define FIFO_RX_MATCH_DRIBBLE_NIBBLE (1 << 10) -#define FIFO_RX_MATCH_BCAST (1 << 9) -#define FIFO_RX_MATCH_MCAST (1 << 8) -#define FIFO_RX_MATCH_OK (1 << 7) -#define FIFO_RX_MATCH_OORANGE (1 << 6) -#define FIFO_RX_MATCH_LEN_MSMTCH (1 << 5) -#define FIFO_RX_MATCH_CRC_ERROR (1 << 4) -#define FIFO_RX_MATCH_CODE_ERROR (1 << 3) -#define FIFO_RX_MATCH_FALSE_CARRIER (1 << 2) -#define FIFO_RX_MATCH_RX_DV_EVENT (1 << 1) -#define FIFO_RX_MATCH_DROP_EVENT (1 << 0) -/* - * Exclude unicast and truncated frames from matching - */ -#define FIFO_RX_FILTMATCH_DEFAULT \ - (FIFO_RX_MATCH_VLAN_TAG | \ - FIFO_RX_MATCH_UNSUP_OPCODE | \ - FIFO_RX_MATCH_PAUSE_FRAME | \ - FIFO_RX_MATCH_CTRL_FRAME | \ - FIFO_RX_MATCH_LONG_EVENT | \ - FIFO_RX_MATCH_DRIBBLE_NIBBLE | \ - FIFO_RX_MATCH_BCAST | \ - FIFO_RX_MATCH_MCAST | \ - FIFO_RX_MATCH_OK | \ - FIFO_RX_MATCH_OORANGE | \ - FIFO_RX_MATCH_LEN_MSMTCH | \ - FIFO_RX_MATCH_CRC_ERROR | \ - FIFO_RX_MATCH_CODE_ERROR | \ - FIFO_RX_MATCH_FALSE_CARRIER | \ - FIFO_RX_MATCH_RX_DV_EVENT | \ - FIFO_RX_MATCH_DROP_EVENT) -#define AR71XX_MAC_FIFO_RX_FILTMASK 0x5C -#define FIFO_RX_MASK_BYTE_MODE (1 << 19) -#define FIFO_RX_MASK_NO_SHORT_FRAME (1 << 18) -#define FIFO_RX_MASK_BIT17 (1 << 17) -#define FIFO_RX_MASK_BIT16 (1 << 16) -#define FIFO_RX_MASK_TRUNC_FRAME (1 << 15) -#define FIFO_RX_MASK_LONG_EVENT (1 << 14) -#define FIFO_RX_MASK_VLAN_TAG (1 << 13) -#define FIFO_RX_MASK_UNSUP_OPCODE (1 << 12) -#define FIFO_RX_MASK_PAUSE_FRAME (1 << 11) -#define FIFO_RX_MASK_CTRL_FRAME (1 << 10) -#define FIFO_RX_MASK_DRIBBLE_NIBBLE (1 << 9) -#define FIFO_RX_MASK_BCAST (1 << 8) -#define FIFO_RX_MASK_MCAST (1 << 7) -#define FIFO_RX_MASK_OK (1 << 6) -#define FIFO_RX_MASK_OORANGE (1 << 5) -#define FIFO_RX_MASK_LEN_MSMTCH (1 << 4) -#define FIFO_RX_MASK_CODE_ERROR (1 << 3) -#define FIFO_RX_MASK_FALSE_CARRIER (1 << 2) -#define FIFO_RX_MASK_RX_DV_EVENT (1 << 1) -#define FIFO_RX_MASK_DROP_EVENT (1 << 0) - -/* - * Len. mismatch, unsup. opcode and short frmae bits excluded - */ -#define FIFO_RX_FILTMASK_DEFAULT \ - (FIFO_RX_MASK_NO_SHORT_FRAME | \ - FIFO_RX_MASK_BIT17 | \ - FIFO_RX_MASK_BIT16 | \ - FIFO_RX_MASK_TRUNC_FRAME | \ - FIFO_RX_MASK_LONG_EVENT | \ - FIFO_RX_MASK_VLAN_TAG | \ - FIFO_RX_MASK_PAUSE_FRAME | \ - FIFO_RX_MASK_CTRL_FRAME | \ - FIFO_RX_MASK_DRIBBLE_NIBBLE | \ - FIFO_RX_MASK_BCAST | \ - FIFO_RX_MASK_MCAST | \ - FIFO_RX_MASK_OK | \ - FIFO_RX_MASK_OORANGE | \ - FIFO_RX_MASK_CODE_ERROR | \ - FIFO_RX_MASK_FALSE_CARRIER | \ - FIFO_RX_MASK_RX_DV_EVENT | \ - FIFO_RX_MASK_DROP_EVENT) - -#define AR71XX_MAC_FIFO_RAM0 0x60 -#define AR71XX_MAC_FIFO_RAM1 0x64 -#define AR71XX_MAC_FIFO_RAM2 0x68 -#define AR71XX_MAC_FIFO_RAM3 0x6C -#define AR71XX_MAC_FIFO_RAM4 0x70 -#define AR71XX_MAC_FIFO_RAM5 0x74 -#define AR71XX_MAC_FIFO_RAM6 0x78 -#define AR71XX_DMA_TX_CONTROL 0x180 -#define DMA_TX_CONTROL_EN (1 << 0) -#define AR71XX_DMA_TX_DESC 0x184 -#define AR71XX_DMA_TX_STATUS 0x188 -#define DMA_TX_STATUS_PCOUNT_MASK 0xff -#define DMA_TX_STATUS_PCOUNT_SHIFT 16 -#define DMA_TX_STATUS_BUS_ERROR (1 << 3) -#define DMA_TX_STATUS_UNDERRUN (1 << 1) -#define DMA_TX_STATUS_PKT_SENT (1 << 0) -#define AR71XX_DMA_RX_CONTROL 0x18C -#define DMA_RX_CONTROL_EN (1 << 0) -#define AR71XX_DMA_RX_DESC 0x190 -#define AR71XX_DMA_RX_STATUS 0x194 -#define DMA_RX_STATUS_PCOUNT_MASK 0xff -#define DMA_RX_STATUS_PCOUNT_SHIFT 16 -#define DMA_RX_STATUS_BUS_ERROR (1 << 3) -#define DMA_RX_STATUS_OVERFLOW (1 << 2) -#define DMA_RX_STATUS_PKT_RECVD (1 << 0) -#define AR71XX_DMA_INTR 0x198 -#define AR71XX_DMA_INTR_STATUS 0x19C -#define DMA_INTR_ALL ((1 << 8) - 1) -#define DMA_INTR_RX_BUS_ERROR (1 << 7) -#define DMA_INTR_RX_OVERFLOW (1 << 6) -#define DMA_INTR_RX_PKT_RCVD (1 << 4) -#define DMA_INTR_TX_BUS_ERROR (1 << 3) -#define DMA_INTR_TX_UNDERRUN (1 << 1) -#define DMA_INTR_TX_PKT_SENT (1 << 0) - -#define AR71XX_SPI_BASE 0x1f000000 -#define AR71XX_SPI_FS 0x00 -#define AR71XX_SPI_CTRL 0x04 -#define SPI_CTRL_REMAP_DISABLE (1 << 6) -#define SPI_CTRL_CLOCK_DIVIDER_MASK ((1 << 6) - 1) -#define AR71XX_SPI_IO_CTRL 0x08 -#define SPI_IO_CTRL_CS2 (1 << 18) -#define SPI_IO_CTRL_CS1 (1 << 17) -#define SPI_IO_CTRL_CS0 (1 << 16) -#define SPI_IO_CTRL_CSMASK (7 << 16) -#define SPI_IO_CTRL_CLK (1 << 8) -#define SPI_IO_CTRL_DO 1 -#define AR71XX_SPI_RDS 0x0C - -#define ATH_READ_REG(reg) \ - *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((reg))) -/* - * Note: Don't put a flush read here; some users (eg the AR724x PCI fixup code) - * requires write-only space to certain registers. Doing the read afterwards - * causes things to break. - */ -#define ATH_WRITE_REG(reg, val) \ - *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((reg))) = (val) - -static inline void -ar71xx_ddr_flush(uint32_t reg) -{ - ATH_WRITE_REG(reg, 1); - while ((ATH_READ_REG(reg) & 0x1)) - ; - ATH_WRITE_REG(reg, 1); - while ((ATH_READ_REG(reg) & 0x1)) - ; -} - -static inline void -ar71xx_write_pll(uint32_t cfg_reg, uint32_t pll_reg, uint32_t pll, uint32_t pll_reg_shift) -{ - uint32_t sec_cfg; - - /* set PLL registers */ - sec_cfg = ATH_READ_REG(cfg_reg); - sec_cfg &= ~(3 << pll_reg_shift); - sec_cfg |= (2 << pll_reg_shift); - - ATH_WRITE_REG(cfg_reg, sec_cfg); - DELAY(100); - - ATH_WRITE_REG(pll_reg, pll); - sec_cfg |= (3 << pll_reg_shift); - ATH_WRITE_REG(cfg_reg, sec_cfg); - DELAY(100); - - sec_cfg &= ~(3 << pll_reg_shift); - ATH_WRITE_REG(cfg_reg, sec_cfg); - DELAY(100); -} - -#endif /* _AR71XX_REG_H_ */ diff --git a/sys/mips/atheros/ar724x_chip.c b/sys/mips/atheros/ar724x_chip.c deleted file mode 100644 index 1a57c734cb6..00000000000 --- a/sys/mips/atheros/ar724x_chip.c +++ /dev/null @@ -1,244 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -static void -ar724x_chip_detect_mem_size(void) -{ -} - -static void -ar724x_chip_detect_sys_frequency(void) -{ - uint32_t pll; - uint32_t freq; - uint32_t div; - - u_ar71xx_mdio_freq = u_ar71xx_refclk = AR724X_BASE_FREQ; - - pll = ATH_READ_REG(AR724X_PLL_REG_CPU_CONFIG); - - div = ((pll >> AR724X_PLL_DIV_SHIFT) & AR724X_PLL_DIV_MASK); - freq = div * AR724X_BASE_FREQ; - - div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK); - freq *= div; - - u_ar71xx_cpu_freq = freq; - - div = ((pll >> AR724X_DDR_DIV_SHIFT) & AR724X_DDR_DIV_MASK) + 1; - u_ar71xx_ddr_freq = freq / div; - - div = (((pll >> AR724X_AHB_DIV_SHIFT) & AR724X_AHB_DIV_MASK) + 1) * 2; - u_ar71xx_ahb_freq = u_ar71xx_cpu_freq / div; - u_ar71xx_wdt_freq = u_ar71xx_cpu_freq / div; - u_ar71xx_uart_freq = u_ar71xx_cpu_freq / div; -} - -static void -ar724x_chip_device_stop(uint32_t mask) -{ - uint32_t mask_inv, reg; - - mask_inv = mask & AR724X_RESET_MODULE_USB_OHCI_DLL; - reg = ATH_READ_REG(AR724X_RESET_REG_RESET_MODULE); - reg |= mask; - reg &= ~mask_inv; - ATH_WRITE_REG(AR724X_RESET_REG_RESET_MODULE, reg); -} - -static void -ar724x_chip_device_start(uint32_t mask) -{ - uint32_t mask_inv, reg; - - mask_inv = mask & AR724X_RESET_MODULE_USB_OHCI_DLL; - reg = ATH_READ_REG(AR724X_RESET_REG_RESET_MODULE); - reg &= ~mask; - reg |= mask_inv; - ATH_WRITE_REG(AR724X_RESET_REG_RESET_MODULE, reg); -} - -static int -ar724x_chip_device_stopped(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR724X_RESET_REG_RESET_MODULE); - return ((reg & mask) == mask); -} - -static void -ar724x_chip_set_mii_speed(uint32_t unit, uint32_t speed) -{ - - /* XXX TODO */ - return; -} - -/* - * XXX TODO: set the PLL for arge0 only on AR7242. - * The PLL/clock requirements are different. - * - * Otherwise, it's a NULL function for AR7240, AR7241 and - * AR7242 arge1. - */ -static void -ar724x_chip_set_pll_ge(int unit, int speed, uint32_t pll) -{ - - switch (unit) { - case 0: - /* XXX TODO */ - break; - case 1: - /* XXX TODO */ - break; - default: - printf("%s: invalid PLL set for arge unit: %d\n", - __func__, unit); - return; - } -} - -static void -ar724x_chip_ddr_flush(ar71xx_flush_ddr_id_t id) -{ - - switch (id) { - case AR71XX_CPU_DDR_FLUSH_GE0: - ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0); - break; - case AR71XX_CPU_DDR_FLUSH_GE1: - ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1); - break; - case AR71XX_CPU_DDR_FLUSH_USB: - ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_USB); - break; - case AR71XX_CPU_DDR_FLUSH_PCIE: - ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_PCIE); - break; - default: - printf("%s: invalid DDR flush id (%d)\n", __func__, id); - break; - } -} - -static uint32_t -ar724x_chip_get_eth_pll(unsigned int mac, int speed) -{ - - return (0); -} - -static void -ar724x_chip_init_usb_peripheral(void) -{ - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7240: - ar71xx_device_stop(AR724X_RESET_MODULE_USB_OHCI_DLL | - AR724X_RESET_USB_HOST); - DELAY(1000); - - ar71xx_device_start(AR724X_RESET_MODULE_USB_OHCI_DLL | - AR724X_RESET_USB_HOST); - DELAY(1000); - - /* - * WAR for HW bug. Here it adjusts the duration - * between two SOFS. - */ - ATH_WRITE_REG(AR71XX_USB_CTRL_FLADJ, - (3 << USB_CTRL_FLADJ_A0_SHIFT)); - - break; - - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - ar71xx_device_start(AR724X_RESET_MODULE_USB_OHCI_DLL); - DELAY(100); - - ar71xx_device_start(AR724X_RESET_USB_HOST); - DELAY(100); - - ar71xx_device_start(AR724X_RESET_USB_PHY); - DELAY(100); - - break; - - default: - break; - } -} - -struct ar71xx_cpu_def ar724x_chip_def = { - &ar724x_chip_detect_mem_size, - &ar724x_chip_detect_sys_frequency, - &ar724x_chip_device_stop, - &ar724x_chip_device_start, - &ar724x_chip_device_stopped, - &ar724x_chip_set_pll_ge, - &ar724x_chip_set_mii_speed, - &ar71xx_chip_set_mii_if, - &ar724x_chip_get_eth_pll, - &ar724x_chip_ddr_flush, - &ar724x_chip_init_usb_peripheral -}; diff --git a/sys/mips/atheros/ar724x_chip.h b/sys/mips/atheros/ar724x_chip.h deleted file mode 100644 index d6b34511ecb..00000000000 --- a/sys/mips/atheros/ar724x_chip.h +++ /dev/null @@ -1,35 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef __AR724X_CHIP_H__ -#define __AR724X_CHIP_H__ - -extern struct ar71xx_cpu_def ar724x_chip_def; - -#endif diff --git a/sys/mips/atheros/ar724x_pci.c b/sys/mips/atheros/ar724x_pci.c deleted file mode 100644 index b56fb24fe24..00000000000 --- a/sys/mips/atheros/ar724x_pci.c +++ /dev/null @@ -1,670 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * Copyright (c) 2011, Luiz Otavio O Souza. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ar71xx.h" - -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include -#include "pcib_if.h" - -#include -#include -#include -#include - -#include - -#ifdef AR71XX_ATH_EEPROM -#include -#endif /* AR71XX_ATH_EEPROM */ - -#undef AR724X_PCI_DEBUG -#ifdef AR724X_PCI_DEBUG -#define dprintf printf -#else -#define dprintf(x, arg...) -#endif - -struct ar71xx_pci_softc { - device_t sc_dev; - - int sc_busno; - struct rman sc_mem_rman; - struct rman sc_irq_rman; - - struct intr_event *sc_eventstab[AR71XX_PCI_NIRQS]; - mips_intrcnt_t sc_intr_counter[AR71XX_PCI_NIRQS]; - struct resource *sc_irq; - void *sc_ih; -}; - -static int ar724x_pci_setup_intr(device_t, device_t, struct resource *, int, - driver_filter_t *, driver_intr_t *, void *, void **); -static int ar724x_pci_teardown_intr(device_t, device_t, struct resource *, - void *); -static int ar724x_pci_intr(void *); - -static void -ar724x_pci_write(uint32_t reg, uint32_t offset, uint32_t data, int bytes) -{ - uint32_t val, mask, shift; - - /* Register access is 32-bit aligned */ - shift = (offset & 3) * 8; - if (bytes % 4) - mask = (1 << (bytes * 8)) - 1; - else - mask = 0xffffffff; - - rmb(); - val = ATH_READ_REG(reg + (offset & ~3)); - val &= ~(mask << shift); - val |= ((data & mask) << shift); - ATH_WRITE_REG(reg + (offset & ~3), val); - wmb(); - - dprintf("%s: %#x/%#x addr=%#x, data=%#x(%#x), bytes=%d\n", __func__, - reg, reg + (offset & ~3), offset, data, val, bytes); -} - -static uint32_t -ar724x_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func, - u_int reg, int bytes) -{ - uint32_t data, shift, mask; - - /* Register access is 32-bit aligned */ - shift = (reg & 3) * 8; - - /* Create a mask based on the width, post-shift */ - if (bytes == 2) - mask = 0xffff; - else if (bytes == 1) - mask = 0xff; - else - mask = 0xffffffff; - - dprintf("%s: tag (%x, %x, %x) reg %d(%d)\n", __func__, bus, slot, - func, reg, bytes); - - rmb(); - if ((bus == 0) && (slot == 0) && (func == 0)) - data = ATH_READ_REG(AR724X_PCI_CFG_BASE + (reg & ~3)); - else - data = -1; - - /* Get request bytes from 32-bit word */ - data = (data >> shift) & mask; - - dprintf("%s: read 0x%x\n", __func__, data); - - return (data); -} - -static void -ar724x_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func, - u_int reg, uint32_t data, int bytes) -{ - - dprintf("%s: tag (%x, %x, %x) reg %d(%d): %x\n", __func__, bus, slot, - func, reg, bytes, data); - - if ((bus != 0) || (slot != 0) || (func != 0)) - return; - - /* - * WAR for BAR issue on AR7240 - We are unable to access the PCI - * device space if we set the BAR with proper base address. - * - * However, we _do_ want to allow programming in the probe value - * (0xffffffff) so the PCI code can find out how big the memory - * map is for this device. Without it, it'll think the memory - * map is 32 bits wide, the PCI code will then end up thinking - * the register window is '0' and fail to allocate resources. - * - * Note: Test on AR7241/AR7242/AR9344! Those use a WAR value of - * 0x1000ffff. - */ - if (reg == PCIR_BAR(0) && bytes == 4 - && ar71xx_soc == AR71XX_SOC_AR7240 - && data != 0xffffffff) - ar724x_pci_write(AR724X_PCI_CFG_BASE, reg, 0xffff, bytes); - else - ar724x_pci_write(AR724X_PCI_CFG_BASE, reg, data, bytes); -} - -static void -ar724x_pci_mask_irq(void *source) -{ - uint32_t reg; - unsigned int irq = (unsigned int)source; - - /* XXX - Only one interrupt ? Only one device ? */ - if (irq != AR71XX_PCI_IRQ_START) - return; - - /* Update the interrupt mask reg */ - reg = ATH_READ_REG(AR724X_PCI_INTR_MASK); - ATH_WRITE_REG(AR724X_PCI_INTR_MASK, - reg & ~AR724X_PCI_INTR_DEV0); - - /* Clear any pending interrupt */ - reg = ATH_READ_REG(AR724X_PCI_INTR_STATUS); - ATH_WRITE_REG(AR724X_PCI_INTR_STATUS, - reg | AR724X_PCI_INTR_DEV0); -} - -static void -ar724x_pci_unmask_irq(void *source) -{ - uint32_t reg; - unsigned int irq = (unsigned int)source; - - /* XXX */ - if (irq != AR71XX_PCI_IRQ_START) - return; - - /* Update the interrupt mask reg */ - reg = ATH_READ_REG(AR724X_PCI_INTR_MASK); - ATH_WRITE_REG(AR724X_PCI_INTR_MASK, - reg | AR724X_PCI_INTR_DEV0); -} - -static int -ar724x_pci_setup(device_t dev) -{ - uint32_t reg; - - /* setup COMMAND register */ - reg = PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN | PCIM_CMD_SERRESPEN | - PCIM_CMD_BACKTOBACK | PCIM_CMD_PERRESPEN | PCIM_CMD_MWRICEN; - - ar724x_pci_write(AR724X_PCI_CRP_BASE, PCIR_COMMAND, reg, 2); - ar724x_pci_write(AR724X_PCI_CRP_BASE, 0x20, 0x1ff01000, 4); - ar724x_pci_write(AR724X_PCI_CRP_BASE, 0x24, 0x1ff01000, 4); - - reg = ATH_READ_REG(AR724X_PCI_RESET); - if (reg != 0x7) { - DELAY(100000); - ATH_WRITE_REG(AR724X_PCI_RESET, 0); - DELAY(100); - ATH_WRITE_REG(AR724X_PCI_RESET, 4); - DELAY(100000); - } - - if (ar71xx_soc == AR71XX_SOC_AR7240) - reg = AR724X_PCI_APP_LTSSM_ENABLE; - else - reg = 0x1ffc1; - ATH_WRITE_REG(AR724X_PCI_APP, reg); - /* Flush write */ - (void) ATH_READ_REG(AR724X_PCI_APP); - - DELAY(1000); - - reg = ATH_READ_REG(AR724X_PCI_RESET); - if ((reg & AR724X_PCI_RESET_LINK_UP) == 0) { - device_printf(dev, "no PCIe controller found\n"); - return (ENXIO); - } - - if (ar71xx_soc == AR71XX_SOC_AR7241 || - ar71xx_soc == AR71XX_SOC_AR7242) { - reg = ATH_READ_REG(AR724X_PCI_APP); - reg |= (1 << 16); - ATH_WRITE_REG(AR724X_PCI_APP, reg); - } - - return (0); -} - -#ifdef AR71XX_ATH_EEPROM -#define AR5416_EEPROM_MAGIC 0xa55a - -/* - * XXX - This should not be here ! And this looks like Atheros (if_ath) only. - */ -static void -ar724x_pci_fixup(device_t dev, long flash_addr, int len) -{ - uint32_t bar0, reg, val; - uint16_t *cal_data = (uint16_t *) MIPS_PHYS_TO_KSEG1(flash_addr); - -#if 0 - if (cal_data[0] != AR5416_EEPROM_MAGIC) { - device_printf(dev, "%s: Invalid calibration data from 0x%x\n", - __func__, (uintptr_t) flash_addr); - return; - } -#endif - - /* Save bar(0) address - just to flush bar(0) (SoC WAR) ? */ - bar0 = ar724x_pci_read_config(dev, 0, 0, 0, PCIR_BAR(0), 4); - - /* Write temporary BAR0 to map the NIC into a fixed location */ - /* XXX AR7240: 0xffff; 7241/7242/9344: 0x1000ffff */ - ar724x_pci_write_config(dev, 0, 0, 0, PCIR_BAR(0), - AR71XX_PCI_MEM_BASE, 4); - - val = ar724x_pci_read_config(dev, 0, 0, 0, PCIR_COMMAND, 2); - val |= (PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN); - ar724x_pci_write_config(dev, 0, 0, 0, PCIR_COMMAND, val, 2); - - /* set pointer to first reg address */ - cal_data += 3; - while (*cal_data != 0xffff) { - reg = *cal_data++; - val = *cal_data++; - val |= (*cal_data++) << 16; - - if (bootverbose) - printf(" 0x%08x=0x%08x\n", reg, val); - - /* Write eeprom fixup data to device memory */ - ATH_WRITE_REG(AR71XX_PCI_MEM_BASE + reg, val); - DELAY(100); - } - - val = ar724x_pci_read_config(dev, 0, 0, 0, PCIR_COMMAND, 2); - val &= ~(PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN); - ar724x_pci_write_config(dev, 0, 0, 0, PCIR_COMMAND, val, 2); - - /* Write the saved bar(0) address */ - ar724x_pci_write_config(dev, 0, 0, 0, PCIR_BAR(0), bar0, 4); -} -#undef AR5416_EEPROM_MAGIC - -/* - * XXX This is (mostly) duplicated with ar71xx_pci.c. - * It should at some point be fixed. - */ -static void -ar724x_pci_slot_fixup(device_t dev) -{ - long int flash_addr; - char buf[64]; - int size; - - /* - * Check whether the given slot has a hint to poke. - */ - if (bootverbose) - device_printf(dev, "%s: checking dev %s, %d/%d/%d\n", - __func__, device_get_nameunit(dev), 0, 0, 0); - - snprintf(buf, sizeof(buf), "bus.%d.%d.%d.ath_fixup_addr", - 0, 0, 0); - - if (resource_long_value(device_get_name(dev), device_get_unit(dev), - buf, &flash_addr) == 0) { - snprintf(buf, sizeof(buf), "bus.%d.%d.%d.ath_fixup_size", - 0, 0, 0); - if (resource_int_value(device_get_name(dev), - device_get_unit(dev), buf, &size) != 0) { - device_printf(dev, - "%s: missing hint '%s', aborting EEPROM\n", - __func__, buf); - return; - } - - device_printf(dev, "found EEPROM at 0x%lx on %d.%d.%d\n", - flash_addr, 0, 0, 0); - ar724x_pci_fixup(dev, flash_addr, size); - ar71xx_pci_slot_create_eeprom_firmware(dev, 0, 0, 0, - flash_addr, size); - } -} -#endif /* AR71XX_ATH_EEPROM */ - -static int -ar724x_pci_probe(device_t dev) -{ - - return (BUS_PROBE_NOWILDCARD); -} - -static int -ar724x_pci_attach(device_t dev) -{ - struct ar71xx_pci_softc *sc = device_get_softc(dev); - int rid = 0; - - sc->sc_mem_rman.rm_type = RMAN_ARRAY; - sc->sc_mem_rman.rm_descr = "ar724x PCI memory window"; - if (rman_init(&sc->sc_mem_rman) != 0 || - rman_manage_region(&sc->sc_mem_rman, AR71XX_PCI_MEM_BASE, - AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1) != 0) { - panic("ar724x_pci_attach: failed to set up I/O rman"); - } - - sc->sc_irq_rman.rm_type = RMAN_ARRAY; - sc->sc_irq_rman.rm_descr = "ar724x PCI IRQs"; - if (rman_init(&sc->sc_irq_rman) != 0 || - rman_manage_region(&sc->sc_irq_rman, AR71XX_PCI_IRQ_START, - AR71XX_PCI_IRQ_END) != 0) - panic("ar724x_pci_attach: failed to set up IRQ rman"); - - /* Disable interrupts */ - ATH_WRITE_REG(AR724X_PCI_INTR_STATUS, 0); - ATH_WRITE_REG(AR724X_PCI_INTR_MASK, 0); - - /* Hook up our interrupt handler. */ - if ((sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE)) == NULL) { - device_printf(dev, "unable to allocate IRQ resource\n"); - return (ENXIO); - } - - if ((bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC, - ar724x_pci_intr, NULL, sc, &sc->sc_ih))) { - device_printf(dev, - "WARNING: unable to register interrupt handler\n"); - return (ENXIO); - } - - /* Reset PCIe core and PCIe PHY */ - ar71xx_device_stop(AR724X_RESET_PCIE); - ar71xx_device_stop(AR724X_RESET_PCIE_PHY); - ar71xx_device_stop(AR724X_RESET_PCIE_PHY_SERIAL); - DELAY(100); - - ar71xx_device_start(AR724X_RESET_PCIE_PHY_SERIAL); - DELAY(100); - ar71xx_device_start(AR724X_RESET_PCIE_PHY); - ar71xx_device_start(AR724X_RESET_PCIE); - - if (ar724x_pci_setup(dev)) - return (ENXIO); - -#ifdef AR71XX_ATH_EEPROM - ar724x_pci_slot_fixup(dev); -#endif /* AR71XX_ATH_EEPROM */ - - /* Fixup internal PCI bridge */ - ar724x_pci_write_config(dev, 0, 0, 0, PCIR_COMMAND, - PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN - | PCIM_CMD_SERRESPEN | PCIM_CMD_BACKTOBACK - | PCIM_CMD_PERRESPEN | PCIM_CMD_MWRICEN, 2); - - device_add_child(dev, "pci", -1); - return (bus_generic_attach(dev)); -} - -static int -ar724x_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) -{ - struct ar71xx_pci_softc *sc = device_get_softc(dev); - - switch (which) { - case PCIB_IVAR_DOMAIN: - *result = 0; - return (0); - case PCIB_IVAR_BUS: - *result = sc->sc_busno; - return (0); - } - - return (ENOENT); -} - -static int -ar724x_pci_write_ivar(device_t dev, device_t child, int which, uintptr_t result) -{ - struct ar71xx_pci_softc * sc = device_get_softc(dev); - - switch (which) { - case PCIB_IVAR_BUS: - sc->sc_busno = result; - return (0); - } - - return (ENOENT); -} - -static struct resource * -ar724x_pci_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct ar71xx_pci_softc *sc = device_get_softc(bus); - struct resource *rv; - struct rman *rm; - - switch (type) { - case SYS_RES_IRQ: - rm = &sc->sc_irq_rman; - break; - case SYS_RES_MEMORY: - rm = &sc->sc_mem_rman; - break; - default: - return (NULL); - } - - rv = rman_reserve_resource(rm, start, end, count, flags, child); - - if (rv == NULL) - return (NULL); - - rman_set_rid(rv, *rid); - - if (flags & RF_ACTIVE) { - if (bus_activate_resource(child, type, *rid, rv)) { - rman_release_resource(rv); - return (NULL); - } - } - - return (rv); -} - -static int -ar724x_pci_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - int res = (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), - child, type, rid, r)); - - if (!res) { - switch(type) { - case SYS_RES_MEMORY: - case SYS_RES_IOPORT: - - rman_set_bustag(r, ar71xx_bus_space_pcimem); - break; - } - } - - return (res); -} - -static int -ar724x_pci_setup_intr(device_t bus, device_t child, struct resource *ires, - int flags, driver_filter_t *filt, driver_intr_t *handler, - void *arg, void **cookiep) -{ - struct ar71xx_pci_softc *sc = device_get_softc(bus); - struct intr_event *event; - int irq, error; - - irq = rman_get_start(ires); - if (irq > AR71XX_PCI_IRQ_END) - panic("%s: bad irq %d", __func__, irq); - - event = sc->sc_eventstab[irq]; - if (event == NULL) { - error = intr_event_create(&event, (void *)irq, 0, irq, - ar724x_pci_mask_irq, ar724x_pci_unmask_irq, NULL, NULL, - "pci intr%d:", irq); - - if (error == 0) { - sc->sc_eventstab[irq] = event; - sc->sc_intr_counter[irq] = - mips_intrcnt_create(event->ie_name); - } - else - return error; - } - - intr_event_add_handler(event, device_get_nameunit(child), filt, - handler, arg, intr_priority(flags), flags, cookiep); - mips_intrcnt_setname(sc->sc_intr_counter[irq], event->ie_fullname); - - ar724x_pci_unmask_irq((void*)irq); - - return (0); -} - -static int -ar724x_pci_teardown_intr(device_t dev, device_t child, struct resource *ires, - void *cookie) -{ - struct ar71xx_pci_softc *sc = device_get_softc(dev); - int irq, result; - - irq = rman_get_start(ires); - if (irq > AR71XX_PCI_IRQ_END) - panic("%s: bad irq %d", __func__, irq); - - if (sc->sc_eventstab[irq] == NULL) - panic("Trying to teardown unoccupied IRQ"); - - ar724x_pci_mask_irq((void*)irq); - - result = intr_event_remove_handler(cookie); - if (!result) - sc->sc_eventstab[irq] = NULL; - - return (result); -} - -static int -ar724x_pci_intr(void *arg) -{ - struct ar71xx_pci_softc *sc = arg; - struct intr_event *event; - uint32_t reg, irq, mask; - - reg = ATH_READ_REG(AR724X_PCI_INTR_STATUS); - mask = ATH_READ_REG(AR724X_PCI_INTR_MASK); - /* - * Handle only unmasked interrupts - */ - reg &= mask; - if (reg & AR724X_PCI_INTR_DEV0) { - irq = AR71XX_PCI_IRQ_START; - event = sc->sc_eventstab[irq]; - if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) { - printf("Stray IRQ %d\n", irq); - return (FILTER_STRAY); - } - - /* Flush pending memory transactions */ - ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_PCIE); - - /* TODO: frame instead of NULL? */ - intr_event_handle(event, NULL); - mips_intrcnt_inc(sc->sc_intr_counter[irq]); - } - - return (FILTER_HANDLED); -} - -static int -ar724x_pci_maxslots(device_t dev) -{ - - return (PCI_SLOTMAX); -} - -static int -ar724x_pci_route_interrupt(device_t pcib, device_t device, int pin) -{ - - return (pci_get_slot(device)); -} - -static device_method_t ar724x_pci_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ar724x_pci_probe), - DEVMETHOD(device_attach, ar724x_pci_attach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* Bus interface */ - DEVMETHOD(bus_read_ivar, ar724x_pci_read_ivar), - DEVMETHOD(bus_write_ivar, ar724x_pci_write_ivar), - DEVMETHOD(bus_alloc_resource, ar724x_pci_alloc_resource), - DEVMETHOD(bus_release_resource, bus_generic_release_resource), - DEVMETHOD(bus_activate_resource, ar724x_pci_activate_resource), - DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), - DEVMETHOD(bus_setup_intr, ar724x_pci_setup_intr), - DEVMETHOD(bus_teardown_intr, ar724x_pci_teardown_intr), - - /* pcib interface */ - DEVMETHOD(pcib_maxslots, ar724x_pci_maxslots), - DEVMETHOD(pcib_read_config, ar724x_pci_read_config), - DEVMETHOD(pcib_write_config, ar724x_pci_write_config), - DEVMETHOD(pcib_route_interrupt, ar724x_pci_route_interrupt), - DEVMETHOD(pcib_request_feature, pcib_request_feature_allow), - - DEVMETHOD_END -}; - -static driver_t ar724x_pci_driver = { - "pcib", - ar724x_pci_methods, - sizeof(struct ar71xx_pci_softc), -}; - -static devclass_t ar724x_pci_devclass; - -DRIVER_MODULE(ar724x_pci, nexus, ar724x_pci_driver, ar724x_pci_devclass, 0, 0); diff --git a/sys/mips/atheros/ar724xreg.h b/sys/mips/atheros/ar724xreg.h deleted file mode 100644 index ff871b2c553..00000000000 --- a/sys/mips/atheros/ar724xreg.h +++ /dev/null @@ -1,109 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef __AR72XX_REG_H__ -#define __AR72XX_REG_H__ - -#define AR724X_PLL_REG_CPU_CONFIG AR71XX_PLL_CPU_BASE + 0x00 -#define AR724X_PLL_REG_PCIE_CONFIG AR71XX_PLL_CPU_BASE + 0x18 - -#define AR724X_PLL_DIV_SHIFT 0 -#define AR724X_PLL_DIV_MASK 0x3ff -#define AR724X_PLL_REF_DIV_SHIFT 10 -#define AR724X_PLL_REF_DIV_MASK 0xf -#define AR724X_AHB_DIV_SHIFT 19 -#define AR724X_AHB_DIV_MASK 0x1 -#define AR724X_DDR_DIV_SHIFT 22 -#define AR724X_DDR_DIV_MASK 0x3 - -#define AR724X_PLL_VAL_1000 0x00110000 -#define AR724X_PLL_VAL_100 0x00001099 -#define AR724X_PLL_VAL_10 0x00991099 - -#define AR724X_BASE_FREQ 5000000 - -#define AR724X_DDR_REG_FLUSH_GE0 (AR71XX_DDR_CONFIG + 0x7c) -#define AR724X_DDR_REG_FLUSH_GE1 (AR71XX_DDR_CONFIG + 0x80) -#define AR724X_DDR_REG_FLUSH_USB (AR71XX_DDR_CONFIG + 0x84) -#define AR724X_DDR_REG_FLUSH_PCIE (AR71XX_DDR_CONFIG + 0x88) - -#define AR724X_RESET_REG_RESET_MODULE AR71XX_RST_BLOCK_BASE + 0x1c -#define AR724X_RESET_USB_HOST (1 << 5) -#define AR724X_RESET_USB_PHY (1 << 4) -#define AR724X_RESET_MODULE_USB_OHCI_DLL (1 << 3) - -#define AR724X_RESET_GE1_MDIO (1 << 23) -#define AR724X_RESET_GE0_MDIO (1 << 22) -#define AR724X_RESET_PCIE_PHY_SERIAL (1 << 10) -#define AR724X_RESET_PCIE_PHY (1 << 7) -#define AR724X_RESET_PCIE (1 << 6) -#define AR724X_RESET_USB_HOST (1 << 5) -#define AR724X_RESET_USB_PHY (1 << 4) -#define AR724X_RESET_USBSUS_OVERRIDE (1 << 3) - -/* XXX so USB requires different init code? -adrian */ -#define AR7240_OHCI_BASE 0x1b000000 -#define AR7240_OHCI_SIZE 0x01000000 - -#define AR724X_PCI_CRP_BASE (AR71XX_APB_BASE + 0x000C0000) -#define AR724X_PCI_CRP_SIZE 0x100 -#define AR724X_PCI_CFG_BASE 0x14000000 -#define AR724X_PCI_CFG_SIZE 0x1000 - -#define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000F0000) -#define AR724X_PCI_CTRL_SIZE 0x100 - -/* PCI config registers - AR724X_PCI_CTRL_BASE */ -#define AR724X_PCI_APP 0x180f0000 -#define AR724X_PCI_APP_LTSSM_ENABLE (1 << 0) -#define AR724X_PCI_RESET 0x180f0018 -#define AR724X_PCI_RESET_LINK_UP (1 << 0) -#define AR724X_PCI_INTR_STATUS 0x180f004c -#define AR724X_PCI_INTR_MASK 0x180f0050 -#define AR724X_PCI_INTR_DEV0 (1 << 14) - -#define AR724X_GPIO_FUNC_GE0_MII_CLK_EN (1 << 19) -#define AR724X_GPIO_FUNC_SPI_EN (1 << 18) -#define AR724X_GPIO_FUNC_SPI_CS_EN2 (1 << 14) -#define AR724X_GPIO_FUNC_SPI_CS_EN1 (1 << 13) -#define AR724X_GPIO_FUNC_CLK_OBS5_EN (1 << 12) -#define AR724X_GPIO_FUNC_CLK_OBS4_EN (1 << 11) -#define AR724X_GPIO_FUNC_CLK_OBS3_EN (1 << 10) -#define AR724X_GPIO_FUNC_CLK_OBS2_EN (1 << 9) -#define AR724X_GPIO_FUNC_CLK_OBS1_EN (1 << 8) -#define AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN (1 << 7) -#define AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN (1 << 6) -#define AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN (1 << 5) -#define AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN (1 << 4) -#define AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN (1 << 3) -#define AR724X_GPIO_FUNC_UART_RTS_CTS_EN (1 << 2) -#define AR724X_GPIO_FUNC_UART_EN (1 << 1) -#define AR724X_GPIO_FUNC_JTAG_DISABLE (1 << 0) - -#endif diff --git a/sys/mips/atheros/ar91xx_chip.c b/sys/mips/atheros/ar91xx_chip.c deleted file mode 100644 index af01981fb21..00000000000 --- a/sys/mips/atheros/ar91xx_chip.c +++ /dev/null @@ -1,217 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -static void -ar91xx_chip_detect_mem_size(void) -{ -} - -static void -ar91xx_chip_detect_sys_frequency(void) -{ - uint32_t pll; - uint32_t freq; - uint32_t div; - - u_ar71xx_mdio_freq = u_ar71xx_refclk = AR91XX_BASE_FREQ; - - pll = ATH_READ_REG(AR91XX_PLL_REG_CPU_CONFIG); - - div = ((pll >> AR91XX_PLL_DIV_SHIFT) & AR91XX_PLL_DIV_MASK); - freq = div * AR91XX_BASE_FREQ; - u_ar71xx_cpu_freq = freq; - - div = ((pll >> AR91XX_DDR_DIV_SHIFT) & AR91XX_DDR_DIV_MASK) + 1; - u_ar71xx_ddr_freq = freq / div; - - div = (((pll >> AR91XX_AHB_DIV_SHIFT) & AR91XX_AHB_DIV_MASK) + 1) * 2; - u_ar71xx_ahb_freq = u_ar71xx_cpu_freq / div; - u_ar71xx_uart_freq = u_ar71xx_cpu_freq / div; - u_ar71xx_wdt_freq = u_ar71xx_cpu_freq / div; -} - -static void -ar91xx_chip_device_stop(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR91XX_RESET_REG_RESET_MODULE); - ATH_WRITE_REG(AR91XX_RESET_REG_RESET_MODULE, reg | mask); -} - -static void -ar91xx_chip_device_start(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR91XX_RESET_REG_RESET_MODULE); - ATH_WRITE_REG(AR91XX_RESET_REG_RESET_MODULE, reg & ~mask); -} - -static int -ar91xx_chip_device_stopped(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR91XX_RESET_REG_RESET_MODULE); - return ((reg & mask) == mask); -} - -static void -ar91xx_chip_set_pll_ge(int unit, int speed, uint32_t pll) -{ - - switch (unit) { - case 0: - ar71xx_write_pll(AR91XX_PLL_REG_ETH_CONFIG, - AR91XX_PLL_REG_ETH0_INT_CLOCK, pll, - AR91XX_ETH0_PLL_SHIFT); - break; - case 1: - ar71xx_write_pll(AR91XX_PLL_REG_ETH_CONFIG, - AR91XX_PLL_REG_ETH1_INT_CLOCK, pll, - AR91XX_ETH1_PLL_SHIFT); - break; - default: - printf("%s: invalid PLL set for arge unit: %d\n", - __func__, unit); - return; - } -} - -static void -ar91xx_chip_ddr_flush(ar71xx_flush_ddr_id_t id) -{ - - switch (id) { - case AR71XX_CPU_DDR_FLUSH_GE0: - ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0); - break; - case AR71XX_CPU_DDR_FLUSH_GE1: - ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1); - break; - case AR71XX_CPU_DDR_FLUSH_USB: - ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_USB); - break; - case AR71XX_CPU_DDR_FLUSH_WMAC: - ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_WMAC); - break; - default: - printf("%s: invalid DDR flush id (%d)\n", __func__, id); - break; - } -} - -static uint32_t -ar91xx_chip_get_eth_pll(unsigned int mac, int speed) -{ - uint32_t pll; - - switch(speed) { - case 10: - pll = AR91XX_PLL_VAL_10; - break; - case 100: - pll = AR91XX_PLL_VAL_100; - break; - case 1000: - pll = AR91XX_PLL_VAL_1000; - break; - default: - printf("%s%d: invalid speed %d\n", __func__, mac, speed); - pll = 0; - } - - return (pll); -} - -static void -ar91xx_chip_init_usb_peripheral(void) -{ - - ar71xx_device_stop(AR91XX_RST_RESET_MODULE_USBSUS_OVERRIDE); - DELAY(100); - - ar71xx_device_start(RST_RESET_USB_HOST); - DELAY(100); - - ar71xx_device_start(RST_RESET_USB_PHY); - DELAY(100); - - /* Wireless */ - ar71xx_device_stop(AR91XX_RST_RESET_MODULE_AMBA2WMAC); - DELAY(1000); - - ar71xx_device_start(AR91XX_RST_RESET_MODULE_AMBA2WMAC); - DELAY(1000); -} - -struct ar71xx_cpu_def ar91xx_chip_def = { - &ar91xx_chip_detect_mem_size, - &ar91xx_chip_detect_sys_frequency, - &ar91xx_chip_device_stop, - &ar91xx_chip_device_start, - &ar91xx_chip_device_stopped, - &ar91xx_chip_set_pll_ge, - &ar71xx_chip_set_mii_speed, - &ar71xx_chip_set_mii_if, - &ar91xx_chip_get_eth_pll, - &ar91xx_chip_ddr_flush, - &ar91xx_chip_init_usb_peripheral, -}; diff --git a/sys/mips/atheros/ar91xx_chip.h b/sys/mips/atheros/ar91xx_chip.h deleted file mode 100644 index 424fc2df366..00000000000 --- a/sys/mips/atheros/ar91xx_chip.h +++ /dev/null @@ -1,35 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef __AR91XX_CHIP_H__ -#define __AR91XX_CHIP_H__ - -extern struct ar71xx_cpu_def ar91xx_chip_def; - -#endif diff --git a/sys/mips/atheros/ar91xxreg.h b/sys/mips/atheros/ar91xxreg.h deleted file mode 100644 index 2f9ad2cd47f..00000000000 --- a/sys/mips/atheros/ar91xxreg.h +++ /dev/null @@ -1,85 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef __AR91XX_REG_H__ -#define __AR91XX_REG_H__ - -#define AR91XX_BASE_FREQ 5000000 - -/* reset block */ -#define AR91XX_RESET_REG_RESET_MODULE AR71XX_RST_BLOCK_BASE + 0x1c - -#define AR91XX_RST_RESET_MODULE_USBSUS_OVERRIDE (1 << 10) -#define AR91XX_RST_RESET_MODULE_AMBA2WMAC (1 << 22) - -/* PLL block */ -#define AR91XX_PLL_REG_CPU_CONFIG AR71XX_PLL_CPU_BASE + 0x00 -#define AR91XX_PLL_REG_ETH_CONFIG AR71XX_PLL_CPU_BASE + 0x04 -#define AR91XX_PLL_REG_ETH0_INT_CLOCK AR71XX_PLL_CPU_BASE + 0x14 -#define AR91XX_PLL_REG_ETH1_INT_CLOCK AR71XX_PLL_CPU_BASE + 0x18 - -#define AR91XX_PLL_DIV_SHIFT 0 -#define AR91XX_PLL_DIV_MASK 0x3ff -#define AR91XX_DDR_DIV_SHIFT 22 -#define AR91XX_DDR_DIV_MASK 0x3 -#define AR91XX_AHB_DIV_SHIFT 19 -#define AR91XX_AHB_DIV_MASK 0x1 - -#define AR91XX_ETH0_PLL_SHIFT 20 -#define AR91XX_ETH1_PLL_SHIFT 22 - -#define AR91XX_PLL_VAL_1000 0x1a000000 -#define AR91XX_PLL_VAL_100 0x13000a44 -#define AR91XX_PLL_VAL_10 0x00441099 - -/* DDR block */ -#define AR91XX_DDR_CTRLBASE (AR71XX_APB_BASE + 0) -#define AR91XX_DDR_CTRL_SIZE 0x10000 -#define AR91XX_DDR_REG_FLUSH_GE0 AR91XX_DDR_CTRLBASE + 0x7c -#define AR91XX_DDR_REG_FLUSH_GE1 AR91XX_DDR_CTRLBASE + 0x80 -#define AR91XX_DDR_REG_FLUSH_USB AR91XX_DDR_CTRLBASE + 0x84 -#define AR91XX_DDR_REG_FLUSH_WMAC AR91XX_DDR_CTRLBASE + 0x88 - -/* WMAC stuff */ -#define AR91XX_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000) -#define AR91XX_WMAC_SIZE 0x30000 - -/* GPIO stuff */ -#define AR91XX_GPIO_FUNC_WMAC_LED_EN (1 << 22) -#define AR91XX_GPIO_FUNC_EXP_PORT_CS_EN (1 << 21) -#define AR91XX_GPIO_FUNC_I2S_REFCLKEN (1 << 20) -#define AR91XX_GPIO_FUNC_I2S_MCKEN (1 << 19) -#define AR91XX_GPIO_FUNC_I2S1_EN (1 << 18) -#define AR91XX_GPIO_FUNC_I2S0_EN (1 << 17) -#define AR91XX_GPIO_FUNC_SLIC_EN (1 << 16) -#define AR91XX_GPIO_FUNC_UART_RTSCTS_EN (1 << 9) -#define AR91XX_GPIO_FUNC_UART_EN (1 << 8) -#define AR91XX_GPIO_FUNC_USB_CLK_EN (1 << 4) - -#endif diff --git a/sys/mips/atheros/ar933x_chip.c b/sys/mips/atheros/ar933x_chip.c deleted file mode 100644 index 67d4d2f09d4..00000000000 --- a/sys/mips/atheros/ar933x_chip.c +++ /dev/null @@ -1,355 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include -#include - -static void -ar933x_chip_detect_mem_size(void) -{ -} - -static void -ar933x_chip_detect_sys_frequency(void) -{ - uint32_t clock_ctrl; - uint32_t cpu_config; - uint32_t freq; - uint32_t t; - - t = ATH_READ_REG(AR933X_RESET_REG_BOOTSTRAP); - if (t & AR933X_BOOTSTRAP_REF_CLK_40) - u_ar71xx_refclk = (40 * 1000 * 1000); - else - u_ar71xx_refclk = (25 * 1000 * 1000); - - clock_ctrl = ATH_READ_REG(AR933X_PLL_CLOCK_CTRL_REG); - if (clock_ctrl & AR933X_PLL_CLOCK_CTRL_BYPASS) { - u_ar71xx_cpu_freq = u_ar71xx_refclk; - u_ar71xx_ahb_freq = u_ar71xx_refclk; - u_ar71xx_ddr_freq = u_ar71xx_refclk; - } else { - cpu_config = ATH_READ_REG(AR933X_PLL_CPU_CONFIG_REG); - - t = (cpu_config >> AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT) & - AR933X_PLL_CPU_CONFIG_REFDIV_MASK; - freq = u_ar71xx_refclk / t; - - t = (cpu_config >> AR933X_PLL_CPU_CONFIG_NINT_SHIFT) & - AR933X_PLL_CPU_CONFIG_NINT_MASK; - freq *= t; - - t = (cpu_config >> AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & - AR933X_PLL_CPU_CONFIG_OUTDIV_MASK; - if (t == 0) - t = 1; - - freq >>= t; - - t = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT) & - AR933X_PLL_CLOCK_CTRL_CPU_DIV_MASK) + 1; - u_ar71xx_cpu_freq = freq / t; - - t = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT) & - AR933X_PLL_CLOCK_CTRL_DDR_DIV_MASK) + 1; - u_ar71xx_ddr_freq = freq / t; - - t = ((clock_ctrl >> AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT) & - AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK) + 1; - u_ar71xx_ahb_freq = freq / t; - } - - /* - * On the AR933x, the UART frequency is the reference clock, - * not the AHB bus clock. - */ - u_ar71xx_uart_freq = u_ar71xx_refclk; - - /* - * XXX TODO: check whether the mdio frequency is always the - * refclock frequency, or whether it's variable like on the - * AR934x. - */ - u_ar71xx_mdio_freq = u_ar71xx_refclk; - - /* - * XXX check what the watchdog frequency should be? - */ - u_ar71xx_wdt_freq = u_ar71xx_ahb_freq; -} - -static void -ar933x_chip_device_stop(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR933X_RESET_REG_RESET_MODULE); - ATH_WRITE_REG(AR933X_RESET_REG_RESET_MODULE, reg | mask); -} - -static void -ar933x_chip_device_start(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR933X_RESET_REG_RESET_MODULE); - ATH_WRITE_REG(AR933X_RESET_REG_RESET_MODULE, reg & ~mask); -} - -static int -ar933x_chip_device_stopped(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR933X_RESET_REG_RESET_MODULE); - return ((reg & mask) == mask); -} - -static void -ar933x_chip_set_mii_speed(uint32_t unit, uint32_t speed) -{ - - /* XXX TODO */ - return; -} - -/* - * XXX TODO !! - */ -static void -ar933x_chip_set_pll_ge(int unit, int speed, uint32_t pll) -{ - - switch (unit) { - case 0: - /* XXX TODO */ - break; - case 1: - /* XXX TODO */ - break; - default: - printf("%s: invalid PLL set for arge unit: %d\n", - __func__, unit); - return; - } -} - -static void -ar933x_chip_ddr_flush(ar71xx_flush_ddr_id_t id) -{ - - switch (id) { - case AR71XX_CPU_DDR_FLUSH_GE0: - ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_GE0); - break; - case AR71XX_CPU_DDR_FLUSH_GE1: - ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_GE1); - break; - case AR71XX_CPU_DDR_FLUSH_USB: - ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_USB); - break; - case AR71XX_CPU_DDR_FLUSH_WMAC: - ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_WMAC); - break; - default: - printf("%s: invalid DDR flush id (%d)\n", __func__, id); - break; - } -} - -static uint32_t -ar933x_chip_get_eth_pll(unsigned int mac, int speed) -{ - uint32_t pll; - - switch (speed) { - case 10: - pll = AR933X_PLL_VAL_10; - break; - case 100: - pll = AR933X_PLL_VAL_100; - break; - case 1000: - pll = AR933X_PLL_VAL_1000; - break; - default: - printf("%s%d: invalid speed %d\n", __func__, mac, speed); - pll = 0; - } - return (pll); -} - -static void -ar933x_chip_init_usb_peripheral(void) -{ - ar71xx_device_stop(AR933X_RESET_USBSUS_OVERRIDE); - DELAY(100); - - ar71xx_device_start(AR933X_RESET_USB_HOST); - DELAY(100); - - ar71xx_device_start(AR933X_RESET_USB_PHY); - DELAY(100); -} - -static void -ar933x_configure_gmac(uint32_t gmac_cfg) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR933X_GMAC_REG_ETH_CFG); - - /* - * The relevant bits here include: - * - * + AR933X_ETH_CFG_SW_PHY_SWAP - * + AR933X_ETH_CFG_SW_PHY_ADDR_SWAP - * - * There are other things; look at what openwrt exposes so - * it can be correctly exposed. - * - * TODO: what about ethernet switch support? How's that work? - */ - if (bootverbose) - printf("%s: GMAC config was 0x%08x\n", __func__, reg); - reg &= ~(AR933X_ETH_CFG_SW_PHY_SWAP | AR933X_ETH_CFG_SW_PHY_ADDR_SWAP); - reg |= gmac_cfg; - if (bootverbose) - printf("%s: GMAC setting is 0x%08x; register is now 0x%08x\n", - __func__, - gmac_cfg, - reg); - ATH_WRITE_REG(AR933X_GMAC_REG_ETH_CFG, reg); -} - -static void -ar933x_chip_init_gmac(void) -{ - int val; - uint32_t gmac_cfg = 0; - - /* - * These two bits need a bit better explanation. - * - * The default configuration in the hardware is to map both - * ports to the internal switch. - * - * Here, GE0 == arge0, GE1 == arge1. - * - * The internal switch has: - * + 5 MAC ports, MAC0->MAC4. - * + 5 PHY ports, PHY0->PHY4, - * + MAC0 connects to GE1; - * + GE0 connects to PHY4; - * + The other mappings are MAC1->PHY0, MAC2->PHY1 .. MAC4->PHY3. - * - * The GE1 port is linked in via 1000MBit/full, supplying what is - * normally the 'WAN' switch ports. - * - * The switch is connected the MDIO bus on GE1. It looks like - * a normal AR7240 on-board switch. - * - * The GE0 port is connected via MII to PHY4, and can operate in - * 10/100mbit, full/half duplex. Ie, you can speak to PHY4 on - * the MDIO bus and everything will simply 'work'. - * - * So far so good. This looks just like an AR7240 SoC. - * - * However, some configurations will just expose one or two - * physical ports. In this case, some configuration bits can - * be set to tweak this. - * - * + CFG_SW_PHY_ADDR_SWAP swaps PHY port 0 with PHY port 4. - * Ie, GE0's PHY shows up as PHY 0. So if there's only - * one physical port, there's no need to involve the - * switch framework - it can just show up as a default, - * normal single PHY. - * - * + CFG_SW_PHY_SWAP swaps the internal switch connection - * between PHY0 and PHY4. Ie, PHY4 connects to MAc1, - * PHY0 connects to GE0. - */ - if ((resource_int_value("ar933x_gmac", 0, "override_phy", &val) == 0) - && (val == 0)) - return; - if ((resource_int_value("ar933x_gmac", 0, "swap_phy", &val) == 0) - && (val == 1)) - gmac_cfg |= AR933X_ETH_CFG_SW_PHY_SWAP; - if ((resource_int_value("ar933x_gmac", 0, "swap_phy_addr", &val) == 0) - && (val == 1)) - gmac_cfg |= AR933X_ETH_CFG_SW_PHY_ADDR_SWAP; - ar933x_configure_gmac(gmac_cfg); -} - -struct ar71xx_cpu_def ar933x_chip_def = { - &ar933x_chip_detect_mem_size, - &ar933x_chip_detect_sys_frequency, - &ar933x_chip_device_stop, - &ar933x_chip_device_start, - &ar933x_chip_device_stopped, - &ar933x_chip_set_pll_ge, - &ar933x_chip_set_mii_speed, - &ar71xx_chip_set_mii_if, - &ar933x_chip_get_eth_pll, - &ar933x_chip_ddr_flush, - &ar933x_chip_init_usb_peripheral, - NULL, - NULL, - &ar933x_chip_init_gmac, -}; diff --git a/sys/mips/atheros/ar933x_chip.h b/sys/mips/atheros/ar933x_chip.h deleted file mode 100644 index e78b8406160..00000000000 --- a/sys/mips/atheros/ar933x_chip.h +++ /dev/null @@ -1,35 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef __AR933X_CHIP_H__ -#define __AR933X_CHIP_H__ - -extern struct ar71xx_cpu_def ar933x_chip_def; - -#endif diff --git a/sys/mips/atheros/ar933x_uart.h b/sys/mips/atheros/ar933x_uart.h deleted file mode 100644 index 7db07355580..00000000000 --- a/sys/mips/atheros/ar933x_uart.h +++ /dev/null @@ -1,91 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Atheros AR933x SoC UART registers - */ -#ifndef __AR933X_UART_H__ -#define __AR933X_UART_H__ - -#define AR933X_UART_REGS_SIZE 20 -#define AR933X_UART_FIFO_SIZE 16 - -#define AR933X_UART_DATA_REG 0x00 -#define AR933X_UART_CS_REG 0x04 -#define AR933X_UART_CLOCK_REG 0x08 -#define AR933X_UART_INT_REG 0x0c -#define AR933X_UART_INT_EN_REG 0x10 - -#define AR933X_UART_DATA_TX_RX_MASK 0xff -#define AR933X_UART_DATA_RX_CSR (1 << 8) -#define AR933X_UART_DATA_TX_CSR (1 << 9) - -#define AR933X_UART_CS_PARITY_S 0 -#define AR933X_UART_CS_PARITY_M 0x3 -#define AR933X_UART_CS_PARITY_NONE 0 -#define AR933X_UART_CS_PARITY_ODD 1 -#define AR933X_UART_CS_PARITY_EVEN 2 -#define AR933X_UART_CS_IF_MODE_S 2 -#define AR933X_UART_CS_IF_MODE_M 0x3 -#define AR933X_UART_CS_IF_MODE_NONE 0 -#define AR933X_UART_CS_IF_MODE_DTE 1 -#define AR933X_UART_CS_IF_MODE_DCE 2 -#define AR933X_UART_CS_FLOW_CTRL_S 4 -#define AR933X_UART_CS_FLOW_CTRL_M 0x3 -#define AR933X_UART_CS_DMA_EN (1 << 6) -#define AR933X_UART_CS_TX_READY_ORIDE (1 << 7) -#define AR933X_UART_CS_RX_READY_ORIDE (1 << 8) -#define AR933X_UART_CS_TX_READY (1 << 9) -#define AR933X_UART_CS_RX_BREAK (1 << 10) -#define AR933X_UART_CS_TX_BREAK (1 << 11) -#define AR933X_UART_CS_HOST_INT (1 << 12) -#define AR933X_UART_CS_HOST_INT_EN (1 << 13) -#define AR933X_UART_CS_TX_BUSY (1 << 14) -#define AR933X_UART_CS_RX_BUSY (1 << 15) - -#define AR933X_UART_CLOCK_SCALE_M 0xff -#define AR933X_UART_CLOCK_SCALE_S 16 -#define AR933X_UART_CLOCK_STEP_M 0xffff -#define AR933X_UART_CLOCK_STEP_S 0 - -#define AR933X_UART_MAX_SCALE 0xff -#define AR933X_UART_MAX_STEP 0xffff - -#define AR933X_UART_INT_RX_VALID (1 << 0) -#define AR933X_UART_INT_TX_READY (1 << 1) -#define AR933X_UART_INT_RX_FRAMING_ERR (1 << 2) -#define AR933X_UART_INT_RX_OFLOW_ERR (1 << 3) -#define AR933X_UART_INT_TX_OFLOW_ERR (1 << 4) -#define AR933X_UART_INT_RX_PARITY_ERR (1 << 5) -#define AR933X_UART_INT_RX_BREAK_ON (1 << 6) -#define AR933X_UART_INT_RX_BREAK_OFF (1 << 7) -#define AR933X_UART_INT_RX_FULL (1 << 8) -#define AR933X_UART_INT_TX_EMPTY (1 << 9) -#define AR933X_UART_INT_ALLINTS 0x3ff - -#endif /* __AR933X_UART_H__ */ diff --git a/sys/mips/atheros/ar933xreg.h b/sys/mips/atheros/ar933xreg.h deleted file mode 100644 index 0f6e057b96a..00000000000 --- a/sys/mips/atheros/ar933xreg.h +++ /dev/null @@ -1,100 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef __AR93XX_REG_H__ -#define __AR93XX_REG_H__ - -#define REV_ID_MAJOR_AR9330 0x0110 -#define REV_ID_MAJOR_AR9331 0x1110 - -#define AR933X_REV_ID_REVISION_MASK 0x3 - -#define AR933X_GPIO_COUNT 30 - -#define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000) -#define AR933X_UART_SIZE 0x14 - -#define AR933X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -#define AR933X_GMAC_SIZE 0x04 - -#define AR933X_GMAC_REG_ETH_CFG (AR933X_GMAC_BASE + 0x00) - -#define AR933X_ETH_CFG_RGMII_GE0 (1 << 0) -#define AR933X_ETH_CFG_MII_GE0 (1 << 1) -#define AR933X_ETH_CFG_GMII_GE0 (1 << 2) -#define AR933X_ETH_CFG_MII_GE0_MASTER (1 << 3) -#define AR933X_ETH_CFG_MII_GE0_SLAVE (1 << 4) -#define AR933X_ETH_CFG_MII_GE0_ERR_EN (1 << 5) -#define AR933X_ETH_CFG_SW_PHY_SWAP (1 << 7) -#define AR933X_ETH_CFG_SW_PHY_ADDR_SWAP (1 << 8) -#define AR933X_ETH_CFG_RMII_GE0 (1 << 9) -#define AR933X_ETH_CFG_RMII_GE0_SPD_10 0 -#define AR933X_ETH_CFG_RMII_GE0_SPD_100 (1 << 10) - -#define AR933X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) -#define AR933X_WMAC_SIZE 0x20000 -#define AR933X_EHCI_BASE 0x1b000000 -#define AR933X_EHCI_SIZE 0x1000 - -#define AR933X_DDR_REG_FLUSH_GE0 (AR71XX_APB_BASE + 0x7c) -#define AR933X_DDR_REG_FLUSH_GE1 (AR71XX_APB_BASE + 0x80) -#define AR933X_DDR_REG_FLUSH_USB (AR71XX_APB_BASE + 0x84) -#define AR933X_DDR_REG_FLUSH_WMAC (AR71XX_APB_BASE + 0x88) - -#define AR933X_PLL_CPU_CONFIG_REG (AR71XX_PLL_CPU_BASE + 0x00) -#define AR933X_PLL_CLOCK_CTRL_REG (AR71XX_PLL_CPU_BASE + 0x08) - -#define AR933X_PLL_CPU_CONFIG_NINT_SHIFT 10 -#define AR933X_PLL_CPU_CONFIG_NINT_MASK 0x3f -#define AR933X_PLL_CPU_CONFIG_REFDIV_SHIFT 16 -#define AR933X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f -#define AR933X_PLL_CPU_CONFIG_OUTDIV_SHIFT 23 -#define AR933X_PLL_CPU_CONFIG_OUTDIV_MASK 0x7 - -#define AR933X_PLL_CLOCK_CTRL_BYPASS (1 << 2) -#define AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT 5 -#define AR933X_PLL_CLOCK_CTRL_CPU_DIV_MASK 0x3 -#define AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT 10 -#define AR933X_PLL_CLOCK_CTRL_DDR_DIV_MASK 0x3 -#define AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT 15 -#define AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK 0x7 - -#define AR933X_RESET_REG_RESET_MODULE (AR71XX_RST_BLOCK_BASE + 0x1c) -#define AR933X_RESET_REG_BOOTSTRAP (AR71XX_RST_BLOCK_BASE + 0xac) -#define AR933X_RESET_WMAC (1 << 11) -#define AR933X_RESET_USB_HOST (1 << 5) -#define AR933X_RESET_USB_PHY (1 << 4) -#define AR933X_RESET_USBSUS_OVERRIDE (1 << 3) - -#define AR933X_BOOTSTRAP_REF_CLK_40 (1 << 0) - -#define AR933X_PLL_VAL_1000 0x00110000 -#define AR933X_PLL_VAL_100 0x00001099 -#define AR933X_PLL_VAL_10 0x00991099 - -#endif /* __AR93XX_REG_H__ */ diff --git a/sys/mips/atheros/ar934x_chip.c b/sys/mips/atheros/ar934x_chip.c deleted file mode 100644 index eec58fef19a..00000000000 --- a/sys/mips/atheros/ar934x_chip.c +++ /dev/null @@ -1,473 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2013 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include -#include - -static void -ar934x_chip_detect_mem_size(void) -{ -} - -static uint32_t -ar934x_get_pll_freq(uint32_t ref, uint32_t ref_div, uint32_t nint, - uint32_t nfrac, uint32_t frac, uint32_t out_div) -{ - uint64_t t; - uint32_t ret; - - t = u_ar71xx_refclk; - t *= nint; - t = t / ref_div; - ret = t; - - t = u_ar71xx_refclk; - t *= nfrac; - t = t / (ref_div * frac); - ret += t; - - ret /= (1 << out_div); - return (ret); -} - -static void -ar934x_chip_detect_sys_frequency(void) -{ - uint32_t pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv; - uint32_t cpu_pll, ddr_pll; - uint32_t bootstrap; - uint32_t reg; - - bootstrap = ATH_READ_REG(AR934X_RESET_REG_BOOTSTRAP); - if (bootstrap & AR934X_BOOTSTRAP_REF_CLK_40) - u_ar71xx_refclk = 40 * 1000 * 1000; - else - u_ar71xx_refclk = 25 * 1000 * 1000; - - pll = ATH_READ_REG(AR934X_SRIF_CPU_DPLL2_REG); - if (pll & AR934X_SRIF_DPLL2_LOCAL_PLL) { - out_div = (pll >> AR934X_SRIF_DPLL2_OUTDIV_SHIFT) & - AR934X_SRIF_DPLL2_OUTDIV_MASK; - pll = ATH_READ_REG(AR934X_SRIF_CPU_DPLL1_REG); - nint = (pll >> AR934X_SRIF_DPLL1_NINT_SHIFT) & - AR934X_SRIF_DPLL1_NINT_MASK; - nfrac = pll & AR934X_SRIF_DPLL1_NFRAC_MASK; - ref_div = (pll >> AR934X_SRIF_DPLL1_REFDIV_SHIFT) & - AR934X_SRIF_DPLL1_REFDIV_MASK; - frac = 1 << 18; - } else { - pll = ATH_READ_REG(AR934X_PLL_CPU_CONFIG_REG); - out_div = (pll >> AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & - AR934X_PLL_CPU_CONFIG_OUTDIV_MASK; - ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) & - AR934X_PLL_CPU_CONFIG_REFDIV_MASK; - nint = (pll >> AR934X_PLL_CPU_CONFIG_NINT_SHIFT) & - AR934X_PLL_CPU_CONFIG_NINT_MASK; - nfrac = (pll >> AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT) & - AR934X_PLL_CPU_CONFIG_NFRAC_MASK; - frac = 1 << 6; - } - - cpu_pll = ar934x_get_pll_freq(u_ar71xx_refclk, ref_div, nint, - nfrac, frac, out_div); - - pll = ATH_READ_REG(AR934X_SRIF_DDR_DPLL2_REG); - if (pll & AR934X_SRIF_DPLL2_LOCAL_PLL) { - out_div = (pll >> AR934X_SRIF_DPLL2_OUTDIV_SHIFT) & - AR934X_SRIF_DPLL2_OUTDIV_MASK; - pll = ATH_READ_REG(AR934X_SRIF_DDR_DPLL1_REG); - nint = (pll >> AR934X_SRIF_DPLL1_NINT_SHIFT) & - AR934X_SRIF_DPLL1_NINT_MASK; - nfrac = pll & AR934X_SRIF_DPLL1_NFRAC_MASK; - ref_div = (pll >> AR934X_SRIF_DPLL1_REFDIV_SHIFT) & - AR934X_SRIF_DPLL1_REFDIV_MASK; - frac = 1 << 18; - } else { - pll = ATH_READ_REG(AR934X_PLL_DDR_CONFIG_REG); - out_div = (pll >> AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & - AR934X_PLL_DDR_CONFIG_OUTDIV_MASK; - ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) & - AR934X_PLL_DDR_CONFIG_REFDIV_MASK; - nint = (pll >> AR934X_PLL_DDR_CONFIG_NINT_SHIFT) & - AR934X_PLL_DDR_CONFIG_NINT_MASK; - nfrac = (pll >> AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT) & - AR934X_PLL_DDR_CONFIG_NFRAC_MASK; - frac = 1 << 10; - } - - ddr_pll = ar934x_get_pll_freq(u_ar71xx_refclk, ref_div, nint, - nfrac, frac, out_div); - - clk_ctrl = ATH_READ_REG(AR934X_PLL_CPU_DDR_CLK_CTRL_REG); - - postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) & - AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK; - - if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS) - u_ar71xx_cpu_freq = u_ar71xx_refclk; - else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL) - u_ar71xx_cpu_freq = cpu_pll / (postdiv + 1); - else - u_ar71xx_cpu_freq = ddr_pll / (postdiv + 1); - - postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT) & - AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK; - - if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS) - u_ar71xx_ddr_freq = u_ar71xx_refclk; - else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL) - u_ar71xx_ddr_freq = ddr_pll / (postdiv + 1); - else - u_ar71xx_ddr_freq = cpu_pll / (postdiv + 1); - - postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT) & - AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK; - - if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS) - u_ar71xx_ahb_freq = u_ar71xx_refclk; - else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL) - u_ar71xx_ahb_freq = ddr_pll / (postdiv + 1); - else - u_ar71xx_ahb_freq = cpu_pll / (postdiv + 1); - - u_ar71xx_wdt_freq = u_ar71xx_refclk; - u_ar71xx_uart_freq = u_ar71xx_refclk; - - /* - * Next, fetch reference clock speed for MDIO bus. - */ - reg = ATH_READ_REG(AR934X_PLL_SWITCH_CLOCK_CONTROL_REG); - if (reg & AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL) { - printf("%s: mdio=100MHz\n", __func__); - u_ar71xx_mdio_freq = (100 * 1000 * 1000); - } else { - printf("%s: mdio=%d Hz\n", __func__, u_ar71xx_refclk); - u_ar71xx_mdio_freq = u_ar71xx_refclk; - } -} - -static void -ar934x_chip_device_stop(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR934X_RESET_REG_RESET_MODULE); - ATH_WRITE_REG(AR934X_RESET_REG_RESET_MODULE, reg | mask); -} - -static void -ar934x_chip_device_start(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR934X_RESET_REG_RESET_MODULE); - ATH_WRITE_REG(AR934X_RESET_REG_RESET_MODULE, reg & ~mask); -} - -static int -ar934x_chip_device_stopped(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR934X_RESET_REG_RESET_MODULE); - return ((reg & mask) == mask); -} - -static void -ar934x_chip_set_mii_speed(uint32_t unit, uint32_t speed) -{ - - /* XXX TODO */ - return; -} - -/* - * XXX TODO !! - */ -static void -ar934x_chip_set_pll_ge(int unit, int speed, uint32_t pll) -{ - - switch (unit) { - case 0: - ATH_WRITE_REG(AR934X_PLL_ETH_XMII_CONTROL_REG, pll); - break; - case 1: - /* XXX nothing */ - break; - default: - printf("%s: invalid PLL set for arge unit: %d\n", - __func__, unit); - return; - } -} - -static void -ar934x_chip_ddr_flush(ar71xx_flush_ddr_id_t id) -{ - - switch (id) { - case AR71XX_CPU_DDR_FLUSH_GE0: - ar71xx_ddr_flush(AR934X_DDR_REG_FLUSH_GE0); - break; - case AR71XX_CPU_DDR_FLUSH_GE1: - ar71xx_ddr_flush(AR934X_DDR_REG_FLUSH_GE1); - break; - case AR71XX_CPU_DDR_FLUSH_USB: - ar71xx_ddr_flush(AR934X_DDR_REG_FLUSH_USB); - break; - case AR71XX_CPU_DDR_FLUSH_PCIE: - ar71xx_ddr_flush(AR934X_DDR_REG_FLUSH_PCIE); - break; - case AR71XX_CPU_DDR_FLUSH_WMAC: - ar71xx_ddr_flush(AR934X_DDR_REG_FLUSH_WMAC); - break; - default: - printf("%s: invalid DDR flush id (%d)\n", __func__, id); - break; - } -} - -static uint32_t -ar934x_chip_get_eth_pll(unsigned int mac, int speed) -{ - uint32_t pll; - - switch (speed) { - case 10: - pll = AR934X_PLL_VAL_10; - break; - case 100: - pll = AR934X_PLL_VAL_100; - break; - case 1000: - pll = AR934X_PLL_VAL_1000; - break; - default: - printf("%s%d: invalid speed %d\n", __func__, mac, speed); - pll = 0; - } - return (pll); -} - -static void -ar934x_chip_reset_ethernet_switch(void) -{ - - ar71xx_device_stop(AR934X_RESET_ETH_SWITCH); - DELAY(100); - ar71xx_device_start(AR934X_RESET_ETH_SWITCH); - DELAY(100); - ar71xx_device_stop(AR934X_RESET_ETH_SWITCH_ANALOG); - DELAY(100); - ar71xx_device_start(AR934X_RESET_ETH_SWITCH_ANALOG); - DELAY(100); -} - -static void -ar934x_configure_gmac(uint32_t gmac_cfg) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR934X_GMAC_REG_ETH_CFG); - printf("%s: ETH_CFG=0x%08x\n", __func__, reg); - - reg &= ~(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_MII_GMAC0 | - AR934X_ETH_CFG_MII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE | - AR934X_ETH_CFG_SW_PHY_SWAP); - - reg |= gmac_cfg; - - ATH_WRITE_REG(AR934X_GMAC_REG_ETH_CFG, reg); -} - -static void -ar934x_chip_init_usb_peripheral(void) -{ - uint32_t reg; - - reg = ATH_READ_REG(AR934X_RESET_REG_BOOTSTRAP); - if (reg & AR934X_BOOTSTRAP_USB_MODE_DEVICE) - return; - - ar71xx_device_stop(AR934X_RESET_USBSUS_OVERRIDE); - DELAY(100); - - ar71xx_device_start(AR934X_RESET_USB_PHY); - DELAY(100); - - ar71xx_device_start(AR934X_RESET_USB_PHY_ANALOG); - DELAY(100); - - ar71xx_device_start(AR934X_RESET_USB_HOST); - DELAY(100); -} - -static void -ar934x_chip_set_mii_if(uint32_t unit, uint32_t mii_mode) -{ - - /* - * XXX ! - * - * Nothing to see here; although gmac0 can have its - * MII configuration changed, the register values - * are slightly different. - */ -} - -/* - * XXX TODO: fetch default MII divider configuration - */ - -static void -ar934x_chip_reset_wmac(void) -{ - - /* XXX TODO */ -} - -static void -ar934x_chip_init_gmac(void) -{ - long gmac_cfg; - - if (resource_long_value("ar934x_gmac", 0, "gmac_cfg", - &gmac_cfg) == 0) { - printf("%s: gmac_cfg=0x%08lx\n", - __func__, - (long) gmac_cfg); - ar934x_configure_gmac((uint32_t) gmac_cfg); - } -} - -/* - * Reset the NAND Flash Controller. - * - * + active=1 means "make it active". - * + active=0 means "make it inactive". - */ -static void -ar934x_chip_reset_nfc(int active) -{ - - if (active) { - ar71xx_device_start(AR934X_RESET_NANDF); - DELAY(100); - - ar71xx_device_start(AR934X_RESET_ETH_SWITCH_ANALOG); - DELAY(250); - } else { - ar71xx_device_stop(AR934X_RESET_ETH_SWITCH_ANALOG); - DELAY(250); - - ar71xx_device_stop(AR934X_RESET_NANDF); - DELAY(100); - } -} - -/* - * Configure the GPIO output mux setup. - * - * The AR934x introduced an output mux which allowed - * certain functions to be configured on any pin. - * Specifically, the switch PHY link LEDs and - * WMAC external RX LNA switches are not limited to - * a specific GPIO pin. - */ -static void -ar934x_chip_gpio_output_configure(int gpio, uint8_t func) -{ - uint32_t reg, s; - uint32_t t; - - if (gpio > AR934X_GPIO_COUNT) - return; - - reg = AR934X_GPIO_REG_OUT_FUNC0 + rounddown(gpio, 4); - s = 8 * (gpio % 4); - - /* read-modify-write */ - t = ATH_READ_REG(AR71XX_GPIO_BASE + reg); - t &= ~(0xff << s); - t |= func << s; - ATH_WRITE_REG(AR71XX_GPIO_BASE + reg, t); - - /* flush write */ - ATH_READ_REG(AR71XX_GPIO_BASE + reg); -} - -struct ar71xx_cpu_def ar934x_chip_def = { - &ar934x_chip_detect_mem_size, - &ar934x_chip_detect_sys_frequency, - &ar934x_chip_device_stop, - &ar934x_chip_device_start, - &ar934x_chip_device_stopped, - &ar934x_chip_set_pll_ge, - &ar934x_chip_set_mii_speed, - &ar934x_chip_set_mii_if, - &ar934x_chip_get_eth_pll, - &ar934x_chip_ddr_flush, - &ar934x_chip_init_usb_peripheral, - &ar934x_chip_reset_ethernet_switch, - &ar934x_chip_reset_wmac, - &ar934x_chip_init_gmac, - &ar934x_chip_reset_nfc, - &ar934x_chip_gpio_output_configure, -}; diff --git a/sys/mips/atheros/ar934x_chip.h b/sys/mips/atheros/ar934x_chip.h deleted file mode 100644 index 47cc81d534f..00000000000 --- a/sys/mips/atheros/ar934x_chip.h +++ /dev/null @@ -1,35 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2013 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef __AR934X_CHIP_H__ -#define __AR934X_CHIP_H__ - -extern struct ar71xx_cpu_def ar934x_chip_def; - -#endif diff --git a/sys/mips/atheros/ar934x_nfcreg.h b/sys/mips/atheros/ar934x_nfcreg.h deleted file mode 100644 index 51a971934aa..00000000000 --- a/sys/mips/atheros/ar934x_nfcreg.h +++ /dev/null @@ -1,175 +0,0 @@ -/* - * Copyright (c) 2014 Adrian Chadd . - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* - * Register definitions for the built-in NAND controller - * of the Atheros AR934x and QCA955x SoCs. - * - * This file is based on the AR934x SoC driver from OpenWRT. - * - * Copyright (C) 2011-2013 Gabor Juhos - * - * Used with permission. - */ -#ifndef __AR934X_NFCREG_H__ -#define __AR934X_NFCREG_H__ - -#define BIT(x) (1 << (x)) - -#define AR934X_NFC_REG_CMD 0x00 -#define AR934X_NFC_REG_CTRL 0x04 -#define AR934X_NFC_REG_STATUS 0x08 -#define AR934X_NFC_REG_INT_MASK 0x0c -#define AR934X_NFC_REG_INT_STATUS 0x10 -#define AR934X_NFC_REG_ECC_CTRL 0x14 -#define AR934X_NFC_REG_ECC_OFFSET 0x18 -#define AR934X_NFC_REG_ADDR0_0 0x1c -#define AR934X_NFC_REG_ADDR0_1 0x24 -#define AR934X_NFC_REG_ADDR1_0 0x20 -#define AR934X_NFC_REG_ADDR1_1 0x28 -#define AR934X_NFC_REG_SPARE_SIZE 0x30 -#define AR934X_NFC_REG_PROTECT 0x38 -#define AR934X_NFC_REG_LOOKUP_EN 0x40 -#define AR934X_NFC_REG_LOOKUP(_x) (0x44 + (_i) * 4) -#define AR934X_NFC_REG_DMA_ADDR 0x64 -#define AR934X_NFC_REG_DMA_COUNT 0x68 -#define AR934X_NFC_REG_DMA_CTRL 0x6c -#define AR934X_NFC_REG_MEM_CTRL 0x80 -#define AR934X_NFC_REG_DATA_SIZE 0x84 -#define AR934X_NFC_REG_READ_STATUS 0x88 -#define AR934X_NFC_REG_TIME_SEQ 0x8c -#define AR934X_NFC_REG_TIMINGS_ASYN 0x90 -#define AR934X_NFC_REG_TIMINGS_SYN 0x94 -#define AR934X_NFC_REG_FIFO_DATA 0x98 -#define AR934X_NFC_REG_TIME_MODE 0x9c -#define AR934X_NFC_REG_DMA_ADDR_OFFS 0xa0 -#define AR934X_NFC_REG_FIFO_INIT 0xb0 -#define AR934X_NFC_REG_GEN_SEQ_CTRL 0xb4 - -#define AR934X_NFC_CMD_CMD_SEQ_S 0 -#define AR934X_NFC_CMD_CMD_SEQ_M 0x3f -#define AR934X_NFC_CMD_SEQ_1C 0x00 -#define AR934X_NFC_CMD_SEQ_ERASE 0x0e -#define AR934X_NFC_CMD_SEQ_12 0x0c -#define AR934X_NFC_CMD_SEQ_1C1AXR 0x21 -#define AR934X_NFC_CMD_SEQ_S 0x24 -#define AR934X_NFC_CMD_SEQ_1C3AXR 0x27 -#define AR934X_NFC_CMD_SEQ_1C5A1CXR 0x2a -#define AR934X_NFC_CMD_SEQ_18 0x32 -#define AR934X_NFC_CMD_INPUT_SEL_SIU 0 -#define AR934X_NFC_CMD_INPUT_SEL_DMA BIT(6) -#define AR934X_NFC_CMD_ADDR_SEL_0 0 -#define AR934X_NFC_CMD_ADDR_SEL_1 BIT(7) -#define AR934X_NFC_CMD_CMD0_S 8 -#define AR934X_NFC_CMD_CMD0_M 0xff -#define AR934X_NFC_CMD_CMD1_S 16 -#define AR934X_NFC_CMD_CMD1_M 0xff -#define AR934X_NFC_CMD_CMD2_S 24 -#define AR934X_NFC_CMD_CMD2_M 0xff - -#define AR934X_NFC_CTRL_ADDR_CYCLE0_M 0x7 -#define AR934X_NFC_CTRL_ADDR_CYCLE0_S 0 -#define AR934X_NFC_CTRL_SPARE_EN BIT(3) -#define AR934X_NFC_CTRL_INT_EN BIT(4) -#define AR934X_NFC_CTRL_ECC_EN BIT(5) -#define AR934X_NFC_CTRL_BLOCK_SIZE_S 6 -#define AR934X_NFC_CTRL_BLOCK_SIZE_M 0x3 -#define AR934X_NFC_CTRL_BLOCK_SIZE_32 0 -#define AR934X_NFC_CTRL_BLOCK_SIZE_64 1 -#define AR934X_NFC_CTRL_BLOCK_SIZE_128 2 -#define AR934X_NFC_CTRL_BLOCK_SIZE_256 3 -#define AR934X_NFC_CTRL_PAGE_SIZE_S 8 -#define AR934X_NFC_CTRL_PAGE_SIZE_M 0x7 -#define AR934X_NFC_CTRL_PAGE_SIZE_256 0 -#define AR934X_NFC_CTRL_PAGE_SIZE_512 1 -#define AR934X_NFC_CTRL_PAGE_SIZE_1024 2 -#define AR934X_NFC_CTRL_PAGE_SIZE_2048 3 -#define AR934X_NFC_CTRL_PAGE_SIZE_4096 4 -#define AR934X_NFC_CTRL_PAGE_SIZE_8192 5 -#define AR934X_NFC_CTRL_PAGE_SIZE_16384 6 -#define AR934X_NFC_CTRL_CUSTOM_SIZE_EN BIT(11) -#define AR934X_NFC_CTRL_IO_WIDTH_8BITS 0 -#define AR934X_NFC_CTRL_IO_WIDTH_16BITS BIT(12) -#define AR934X_NFC_CTRL_LOOKUP_EN BIT(13) -#define AR934X_NFC_CTRL_PROT_EN BIT(14) -#define AR934X_NFC_CTRL_WORK_MODE_ASYNC 0 -#define AR934X_NFC_CTRL_WORK_MODE_SYNC BIT(15) -#define AR934X_NFC_CTRL_ADDR0_AUTO_INC BIT(16) -#define AR934X_NFC_CTRL_ADDR1_AUTO_INC BIT(17) -#define AR934X_NFC_CTRL_ADDR_CYCLE1_M 0x7 -#define AR934X_NFC_CTRL_ADDR_CYCLE1_S 18 -#define AR934X_NFC_CTRL_SMALL_PAGE BIT(21) - -#define AR934X_NFC_DMA_CTRL_DMA_START BIT(7) -#define AR934X_NFC_DMA_CTRL_DMA_DIR_WRITE 0 -#define AR934X_NFC_DMA_CTRL_DMA_DIR_READ BIT(6) -#define AR934X_NFC_DMA_CTRL_DMA_MODE_SG BIT(5) -#define AR934X_NFC_DMA_CTRL_DMA_BURST_S 2 -#define AR934X_NFC_DMA_CTRL_DMA_BURST_0 0 -#define AR934X_NFC_DMA_CTRL_DMA_BURST_1 1 -#define AR934X_NFC_DMA_CTRL_DMA_BURST_2 2 -#define AR934X_NFC_DMA_CTRL_DMA_BURST_3 3 -#define AR934X_NFC_DMA_CTRL_DMA_BURST_4 4 -#define AR934X_NFC_DMA_CTRL_DMA_BURST_5 5 -#define AR934X_NFC_DMA_CTRL_ERR_FLAG BIT(1) -#define AR934X_NFC_DMA_CTRL_DMA_READY BIT(0) - -#define AR934X_NFC_INT_DEV_RDY(_x) BIT(4 + (_x)) -#define AR934X_NFC_INT_CMD_END BIT(1) - -#define AR934X_NFC_ECC_CTRL_ERR_THRES_S 8 -#define AR934X_NFC_ECC_CTRL_ERR_THRES_M 0x1f -#define AR934X_NFC_ECC_CTRL_ECC_CAP_S 5 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_M 0x7 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_2 0 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_4 1 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_6 2 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_8 3 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_10 4 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_12 5 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_14 6 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_16 7 -#define AR934X_NFC_ECC_CTRL_ERR_OVER BIT(2) -#define AR934X_NFC_ECC_CTRL_ERR_UNCORRECT BIT(1) -#define AR934X_NFC_ECC_CTRL_ERR_CORRECT BIT(0) - -#define AR934X_NFC_ECC_OFFS_OFSET_M 0xffff - -/* default timing values */ -#define AR934X_NFC_TIME_SEQ_DEFAULT 0x7fff -#define AR934X_NFC_TIMINGS_ASYN_DEFAULT 0x22 -#define AR934X_NFC_TIMINGS_SYN_DEFAULT 0xf - -#define AR934X_NFC_ID_BUF_SIZE 8 -#define AR934X_NFC_DEV_READY_TIMEOUT 25 /* msecs */ -#define AR934X_NFC_DMA_READY_TIMEOUT 25 /* msecs */ -#define AR934X_NFC_DONE_TIMEOUT 1000 -#define AR934X_NFC_DMA_RETRIES 20 - -#define AR934X_NFC_IRQ_MASK AR934X_NFC_INT_DEV_RDY(0) - -#define AR934X_NFC_GENSEQ_SMALL_PAGE_READ 0x30043 - -#endif /* __AR934X_NFCREG_H__ */ diff --git a/sys/mips/atheros/ar934xreg.h b/sys/mips/atheros/ar934xreg.h deleted file mode 100644 index ae0cf9e263f..00000000000 --- a/sys/mips/atheros/ar934xreg.h +++ /dev/null @@ -1,239 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2013 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef __AR934X_REG_H__ -#define __AR934X_REG_H__ - -#define AR934X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -#define AR934X_GMAC_SIZE 0x14 -#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) -#define AR934X_WMAC_SIZE 0x20000 -#define AR934X_EHCI_BASE 0x1b000000 -#define AR934X_EHCI_SIZE 0x200 -#define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) -#define AR934X_SRIF_SIZE 0x1000 - -/* AR934x GMAC configuration */ -#define AR934X_GMAC_REG_ETH_CFG (AR934X_GMAC_BASE + 0x00) - -#define AR934X_ETH_CFG_RGMII_GMAC0 (1 << 0) -#define AR934X_ETH_CFG_MII_GMAC0 (1 << 1) -#define AR934X_ETH_CFG_GMII_GMAC0 (1 << 2) -#define AR934X_ETH_CFG_MII_GMAC0_MASTER (1 << 3) -#define AR934X_ETH_CFG_MII_GMAC0_SLAVE (1 << 4) -#define AR934X_ETH_CFG_MII_GMAC0_ERR_EN (1 << 5) -#define AR934X_ETH_CFG_SW_ONLY_MODE (1 << 6) -#define AR934X_ETH_CFG_SW_PHY_SWAP (1 << 7) -#define AR934X_ETH_CFG_SW_APB_ACCESS (1 << 9) -#define AR934X_ETH_CFG_RMII_GMAC0 (1 << 10) -#define AR933X_ETH_CFG_MII_CNTL_SPEED (1 << 11) -#define AR934X_ETH_CFG_RMII_GMAC0_MASTER (1 << 12) -#define AR934X_ETH_CFG_SW_ACC_MSB_FIRST (1 << 13) - -#define AR934X_DDR_REG_FLUSH_GE0 (AR71XX_APB_BASE + 0x9c) -#define AR934X_DDR_REG_FLUSH_GE1 (AR71XX_APB_BASE + 0xa0) -#define AR934X_DDR_REG_FLUSH_USB (AR71XX_APB_BASE + 0xa4) -#define AR934X_DDR_REG_FLUSH_PCIE (AR71XX_APB_BASE + 0xa8) -#define AR934X_DDR_REG_FLUSH_WMAC (AR71XX_APB_BASE + 0xac) - -#define AR934X_PLL_CPU_CONFIG_REG (AR71XX_PLL_CPU_BASE + 0x00) -#define AR934X_PLL_DDR_CONFIG_REG (AR71XX_PLL_CPU_BASE + 0x04) -#define AR934X_PLL_CPU_DDR_CLK_CTRL_REG (AR71XX_PLL_CPU_BASE + 0x08) -#define AR934X_PLL_SWITCH_CLOCK_CONTROL_REG (AR71XX_PLL_CPU_BASE + 0x24) -#define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL (1 << 6) -#define AR934X_PLL_ETH_XMII_CONTROL_REG (AR71XX_PLL_CPU_BASE + 0x2c) - -#define AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 -#define AR934X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f -#define AR934X_PLL_CPU_CONFIG_NINT_SHIFT 6 -#define AR934X_PLL_CPU_CONFIG_NINT_MASK 0x3f -#define AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 -#define AR934X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f -#define AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 -#define AR934X_PLL_CPU_CONFIG_OUTDIV_MASK 0x3 - -#define AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT 0 -#define AR934X_PLL_DDR_CONFIG_NFRAC_MASK 0x3ff -#define AR934X_PLL_DDR_CONFIG_NINT_SHIFT 10 -#define AR934X_PLL_DDR_CONFIG_NINT_MASK 0x3f -#define AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT 16 -#define AR934X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f -#define AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23 -#define AR934X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7 - -#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS (1 << 2) -#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS (1 << 3) -#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS (1 << 4) -#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT 5 -#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK 0x1f -#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT 10 -#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_MASK 0x1f -#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT 15 -#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_MASK 0x1f -#define AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL (1 << 20) -#define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL (1 << 21) -#define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL (1 << 24) - -#define AR934X_RESET_REG_RESET_MODULE (AR71XX_RST_BLOCK_BASE + 0x1c) -#define AR934X_RESET_REG_BOOTSTRAP (AR71XX_RST_BLOCK_BASE + 0xb0) -#define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS (AR71XX_RST_BLOCK_BASE + 0xac) - -#define AR934X_RESET_HOST (1U << 31) -#define AR934X_RESET_SLIC (1 << 30) -#define AR934X_RESET_HDMA (1 << 29) -#define AR934X_RESET_EXTERNAL (1 << 28) -#define AR934X_RESET_RTC (1 << 27) -#define AR934X_RESET_PCIE_EP_INT (1 << 26) -#define AR934X_RESET_CHKSUM_ACC (1 << 25) -#define AR934X_RESET_FULL_CHIP (1 << 24) -#define AR934X_RESET_GE1_MDIO (1 << 23) -#define AR934X_RESET_GE0_MDIO (1 << 22) -#define AR934X_RESET_CPU_NMI (1 << 21) -#define AR934X_RESET_CPU_COLD (1 << 20) -#define AR934X_RESET_HOST_RESET_INT (1 << 19) -#define AR934X_RESET_PCIE_EP (1 << 18) -#define AR934X_RESET_UART1 (1 << 17) -#define AR934X_RESET_DDR (1 << 16) -#define AR934X_RESET_USB_PHY_PLL_PWD_EXT (1 << 15) -#define AR934X_RESET_NANDF (1 << 14) -#define AR934X_RESET_GE1_MAC (1 << 13) -#define AR934X_RESET_ETH_SWITCH_ANALOG (1 << 12) -#define AR934X_RESET_USB_PHY_ANALOG (1 << 11) -#define AR934X_RESET_HOST_DMA_INT (1 << 10) -#define AR934X_RESET_GE0_MAC (1 << 9) -#define AR934X_RESET_ETH_SWITCH (1 << 8) -#define AR934X_RESET_PCIE_PHY (1 << 7) -#define AR934X_RESET_PCIE (1 << 6) -#define AR934X_RESET_USB_HOST (1 << 5) -#define AR934X_RESET_USB_PHY (1 << 4) -#define AR934X_RESET_USBSUS_OVERRIDE (1 << 3) -#define AR934X_RESET_LUT (1 << 2) -#define AR934X_RESET_MBOX (1 << 1) -#define AR934X_RESET_I2S (1 << 0) - -#define AR934X_BOOTSTRAP_SW_OPTION8 (1 << 23) -#define AR934X_BOOTSTRAP_SW_OPTION7 (1 << 22) -#define AR934X_BOOTSTRAP_SW_OPTION6 (1 << 21) -#define AR934X_BOOTSTRAP_SW_OPTION5 (1 << 20) -#define AR934X_BOOTSTRAP_SW_OPTION4 (1 << 19) -#define AR934X_BOOTSTRAP_SW_OPTION3 (1 << 18) -#define AR934X_BOOTSTRAP_SW_OPTION2 (1 << 17) -#define AR934X_BOOTSTRAP_SW_OPTION1 (1 << 16) -#define AR934X_BOOTSTRAP_USB_MODE_DEVICE (1 << 7) -#define AR934X_BOOTSTRAP_PCIE_RC (1 << 6) -#define AR934X_BOOTSTRAP_EJTAG_MODE (1 << 5) -#define AR934X_BOOTSTRAP_REF_CLK_40 (1 << 4) -#define AR934X_BOOTSTRAP_BOOT_FROM_SPI (1 << 2) -#define AR934X_BOOTSTRAP_SDRAM_DISABLED (1 << 1) -#define AR934X_BOOTSTRAP_DDR1 (1 << 0) - -#define AR934X_PCIE_WMAC_INT_WMAC_MISC (1 << 0) -#define AR934X_PCIE_WMAC_INT_WMAC_TX (1 << 1) -#define AR934X_PCIE_WMAC_INT_WMAC_RXLP (1 << 2) -#define AR934X_PCIE_WMAC_INT_WMAC_RXHP (1 << 3) -#define AR934X_PCIE_WMAC_INT_PCIE_RC (1 << 4) -#define AR934X_PCIE_WMAC_INT_PCIE_RC0 (1 << 5) -#define AR934X_PCIE_WMAC_INT_PCIE_RC1 (1 << 6) -#define AR934X_PCIE_WMAC_INT_PCIE_RC2 (1 << 7) -#define AR934X_PCIE_WMAC_INT_PCIE_RC3 (1 << 8) -#define AR934X_PCIE_WMAC_INT_WMAC_ALL \ - (AR934X_PCIE_WMAC_INT_WMAC_MISC | AR934X_PCIE_WMAC_INT_WMAC_TX | \ - AR934X_PCIE_WMAC_INT_WMAC_RXLP | AR934X_PCIE_WMAC_INT_WMAC_RXHP) - -#define AR934X_PCIE_WMAC_INT_PCIE_ALL \ - (AR934X_PCIE_WMAC_INT_PCIE_RC | AR934X_PCIE_WMAC_INT_PCIE_RC0 | \ - AR934X_PCIE_WMAC_INT_PCIE_RC1 | AR934X_PCIE_WMAC_INT_PCIE_RC2 | \ - AR934X_PCIE_WMAC_INT_PCIE_RC3) - -#define REV_ID_MAJOR_AR9341 0x0120 -#define REV_ID_MAJOR_AR9342 0x1120 -#define REV_ID_MAJOR_AR9344 0x2120 - -#define AR934X_REV_ID_REVISION_MASK 0xf - -/* - * GPIO block - */ -#define AR934X_GPIO_REG_OUT_FUNC0 0x2c -#define AR934X_GPIO_REG_OUT_FUNC1 0x30 -#define AR934X_GPIO_REG_OUT_FUNC2 0x34 -#define AR934X_GPIO_REG_OUT_FUNC3 0x38 -#define AR934X_GPIO_REG_OUT_FUNC4 0x3c -#define AR934X_GPIO_REG_OUT_FUNC5 0x40 -#define AR934X_GPIO_REG_FUNC 0x6c -#define AR934X_GPIO_COUNT 23 - -/* GPIO functions */ -#define AR934X_GPIO_FUNC_CLK_OBS7_EN (1 << 9) -#define AR934X_GPIO_FUNC_CLK_OBS6_EN (1 << 8) -#define AR934X_GPIO_FUNC_CLK_OBS5_EN (1 << 7) -#define AR934X_GPIO_FUNC_CLK_OBS4_EN (1 << 6) -#define AR934X_GPIO_FUNC_CLK_OBS3_EN (1 << 5) -#define AR934X_GPIO_FUNC_CLK_OBS2_EN (1 << 4) -#define AR934X_GPIO_FUNC_CLK_OBS1_EN (1 << 3) -#define AR934X_GPIO_FUNC_CLK_OBS0_EN (1 << 2) -#define AR934X_GPIO_FUNC_JTAG_DISABLE (1 << 1) - -/* GPIO MUX output function: AR934X_GPIO_REG_OUT_FUNCx */ -#define AR934X_GPIO_OUT_GPIO 0 /* I'm a GPIO */ -#define AR934X_GPIO_OUT_SPI_CS1 7 /* I'm SPI CS1 */ -#define AR934X_GPIO_OUT_LED_LINK0 41 /* I'm switch phy link0 */ -#define AR934X_GPIO_OUT_LED_LINK1 42 -#define AR934X_GPIO_OUT_LED_LINK2 43 -#define AR934X_GPIO_OUT_LED_LINK3 44 -#define AR934X_GPIO_OUT_LED_LINK4 45 -#define AR934X_GPIO_OUT_EXT_LNA0 46 /* I'm WMAC EXT LNA chain 0 */ -#define AR934X_GPIO_OUT_EXT_LNA1 47 /* I'm WMAC EXT LNA chain 1 */ - -/* - * SRIF block - */ -#define AR934X_SRIF_CPU_DPLL1_REG (AR934X_SRIF_BASE + 0x1c0) -#define AR934X_SRIF_CPU_DPLL2_REG (AR934X_SRIF_BASE + 0x1c4) -#define AR934X_SRIF_CPU_DPLL3_REG (AR934X_SRIF_BASE + 0x1c8) - -#define AR934X_SRIF_DDR_DPLL1_REG (AR934X_SRIF_BASE + 0x240) -#define AR934X_SRIF_DDR_DPLL2_REG (AR934X_SRIF_BASE + 0x244) -#define AR934X_SRIF_DDR_DPLL3_REG (AR934X_SRIF_BASE + 0x248) - -#define AR934X_SRIF_DPLL1_REFDIV_SHIFT 27 -#define AR934X_SRIF_DPLL1_REFDIV_MASK 0x1f -#define AR934X_SRIF_DPLL1_NINT_SHIFT 18 -#define AR934X_SRIF_DPLL1_NINT_MASK 0x1ff -#define AR934X_SRIF_DPLL1_NFRAC_MASK 0x0003ffff - -#define AR934X_SRIF_DPLL2_LOCAL_PLL (1 << 30) -#define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13 -#define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7 - -/* XXX verify! */ -#define AR934X_PLL_VAL_1000 0x16000000 -#define AR934X_PLL_VAL_100 0x00000101 -#define AR934X_PLL_VAL_10 0x00001616 - -#endif /* __AR934X_REG_H__ */ diff --git a/sys/mips/atheros/files.ar71xx b/sys/mips/atheros/files.ar71xx deleted file mode 100644 index 71b3a951fe9..00000000000 --- a/sys/mips/atheros/files.ar71xx +++ /dev/null @@ -1,34 +0,0 @@ - -mips/atheros/apb.c optional ar71xx_apb -mips/atheros/ar71xx_caldata.c optional ar71xx_caldata -mips/atheros/ar71xx_gpio.c optional gpio -mips/atheros/ar71xx_machdep.c standard -mips/atheros/ar71xx_ehci.c optional ehci -mips/atheros/ar71xx_ohci.c optional ohci -mips/atheros/ar71xx_pci.c optional ar71xx_pci pci -mips/atheros/ar724x_pci.c optional ar724x_pci pci -mips/atheros/ar71xx_pci_bus_space.c optional pci -mips/atheros/ar71xx_spi.c optional ar71xx_spi -mips/atheros/ar71xx_macaddr.c standard -mips/atheros/pcf2123_rtc.c optional pcf2123_rtc ar71xx_spi -mips/atheros/ar71xx_wdog.c optional ar71xx_wdog -mips/atheros/if_arge.c optional arge -mips/atheros/uart_bus_ar71xx.c optional uart_ar71xx -mips/atheros/uart_cpu_ar71xx.c optional uart_ar71xx -mips/atheros/uart_bus_ar933x.c optional uart_ar933x -mips/atheros/uart_cpu_ar933x.c optional uart_ar933x -mips/atheros/uart_dev_ar933x.c optional uart_ar933x -mips/atheros/ar71xx_bus_space_reversed.c standard -mips/mips/intr_machdep.c standard -mips/mips/tick.c standard -mips/atheros/ar71xx_setup.c standard -mips/atheros/ar71xx_chip.c standard -mips/atheros/ar724x_chip.c standard -mips/atheros/ar91xx_chip.c standard -mips/atheros/ar933x_chip.c standard -mips/atheros/ar934x_chip.c standard -mips/atheros/qca953x_chip.c standard -mips/atheros/qca955x_chip.c standard -mips/atheros/ar71xx_fixup.c optional ar71xx_ath_eeprom -mips/atheros/qca955x_apb.c optional qca955x_apb -mips/atheros/qca955x_pci.c optional qca955x_pci pci diff --git a/sys/mips/atheros/if_arge.c b/sys/mips/atheros/if_arge.c deleted file mode 100644 index e5cd0840dcd..00000000000 --- a/sys/mips/atheros/if_arge.c +++ /dev/null @@ -1,2794 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -/* - * AR71XX gigabit ethernet driver - */ -#ifdef HAVE_KERNEL_OPTION_HEADERS -#include "opt_device_polling.h" -#endif - -#include "opt_arge.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include "opt_arge.h" - -#if defined(ARGE_MDIO) -#include -#include -#include "mdio_if.h" -#endif - -MODULE_DEPEND(arge, ether, 1, 1, 1); -MODULE_DEPEND(arge, miibus, 1, 1, 1); -MODULE_VERSION(arge, 1); - -#include "miibus_if.h" - -#include - -#include -#include /* XXX tsk! */ -#include /* XXX tsk! */ -#include /* XXX tsk! */ -#include -#include -#include -#include - -typedef enum { - ARGE_DBG_MII = 0x00000001, - ARGE_DBG_INTR = 0x00000002, - ARGE_DBG_TX = 0x00000004, - ARGE_DBG_RX = 0x00000008, - ARGE_DBG_ERR = 0x00000010, - ARGE_DBG_RESET = 0x00000020, - ARGE_DBG_PLL = 0x00000040, - ARGE_DBG_ANY = 0xffffffff, -} arge_debug_flags; - -static const char * arge_miicfg_str[] = { - "NONE", - "GMII", - "MII", - "RGMII", - "RMII", - "SGMII" -}; - -#ifdef ARGE_DEBUG -#define ARGEDEBUG(_sc, _m, ...) \ - do { \ - if (((_m) & (_sc)->arge_debug) || ((_m) == ARGE_DBG_ANY)) \ - device_printf((_sc)->arge_dev, __VA_ARGS__); \ - } while (0) -#else -#define ARGEDEBUG(_sc, _m, ...) -#endif - -static int arge_attach(device_t); -static int arge_detach(device_t); -static void arge_flush_ddr(struct arge_softc *); -static int arge_ifmedia_upd(struct ifnet *); -static void arge_ifmedia_sts(struct ifnet *, struct ifmediareq *); -static int arge_ioctl(struct ifnet *, u_long, caddr_t); -static void arge_init(void *); -static void arge_init_locked(struct arge_softc *); -static void arge_link_task(void *, int); -static void arge_update_link_locked(struct arge_softc *sc); -static void arge_set_pll(struct arge_softc *, int, int); -static int arge_miibus_readreg(device_t, int, int); -static void arge_miibus_statchg(device_t); -static int arge_miibus_writereg(device_t, int, int, int); -static int arge_probe(device_t); -static void arge_reset_dma(struct arge_softc *); -static int arge_resume(device_t); -static int arge_rx_ring_init(struct arge_softc *); -static void arge_rx_ring_free(struct arge_softc *sc); -static int arge_tx_ring_init(struct arge_softc *); -static void arge_tx_ring_free(struct arge_softc *); -#ifdef DEVICE_POLLING -static int arge_poll(struct ifnet *, enum poll_cmd, int); -#endif -static int arge_shutdown(device_t); -static void arge_start(struct ifnet *); -static void arge_start_locked(struct ifnet *); -static void arge_stop(struct arge_softc *); -static int arge_suspend(device_t); - -static int arge_rx_locked(struct arge_softc *); -static void arge_tx_locked(struct arge_softc *); -static void arge_intr(void *); -static int arge_intr_filter(void *); -static void arge_tick(void *); - -static void arge_hinted_child(device_t bus, const char *dname, int dunit); - -/* - * ifmedia callbacks for multiPHY MAC - */ -void arge_multiphy_mediastatus(struct ifnet *, struct ifmediareq *); -int arge_multiphy_mediachange(struct ifnet *); - -static void arge_dmamap_cb(void *, bus_dma_segment_t *, int, int); -static int arge_dma_alloc(struct arge_softc *); -static void arge_dma_free(struct arge_softc *); -static int arge_newbuf(struct arge_softc *, int); -static __inline void arge_fixup_rx(struct mbuf *); - -static device_method_t arge_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, arge_probe), - DEVMETHOD(device_attach, arge_attach), - DEVMETHOD(device_detach, arge_detach), - DEVMETHOD(device_suspend, arge_suspend), - DEVMETHOD(device_resume, arge_resume), - DEVMETHOD(device_shutdown, arge_shutdown), - - /* MII interface */ - DEVMETHOD(miibus_readreg, arge_miibus_readreg), - DEVMETHOD(miibus_writereg, arge_miibus_writereg), - DEVMETHOD(miibus_statchg, arge_miibus_statchg), - - /* bus interface */ - DEVMETHOD(bus_add_child, device_add_child_ordered), - DEVMETHOD(bus_hinted_child, arge_hinted_child), - - DEVMETHOD_END -}; - -static driver_t arge_driver = { - "arge", - arge_methods, - sizeof(struct arge_softc) -}; - -static devclass_t arge_devclass; - -DRIVER_MODULE(arge, nexus, arge_driver, arge_devclass, 0, 0); -DRIVER_MODULE(miibus, arge, miibus_driver, miibus_devclass, 0, 0); - -#if defined(ARGE_MDIO) -static int argemdio_probe(device_t); -static int argemdio_attach(device_t); -static int argemdio_detach(device_t); - -/* - * Declare an additional, separate driver for accessing the MDIO bus. - */ -static device_method_t argemdio_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, argemdio_probe), - DEVMETHOD(device_attach, argemdio_attach), - DEVMETHOD(device_detach, argemdio_detach), - - /* bus interface */ - DEVMETHOD(bus_add_child, device_add_child_ordered), - - /* MDIO access */ - DEVMETHOD(mdio_readreg, arge_miibus_readreg), - DEVMETHOD(mdio_writereg, arge_miibus_writereg), -}; - -DEFINE_CLASS_0(argemdio, argemdio_driver, argemdio_methods, - sizeof(struct arge_softc)); -static devclass_t argemdio_devclass; - -DRIVER_MODULE(miiproxy, arge, miiproxy_driver, miiproxy_devclass, 0, 0); -DRIVER_MODULE(argemdio, nexus, argemdio_driver, argemdio_devclass, 0, 0); -DRIVER_MODULE(mdio, argemdio, mdio_driver, mdio_devclass, 0, 0); -#endif - -static struct mtx miibus_mtx; - -MTX_SYSINIT(miibus_mtx, &miibus_mtx, "arge mii lock", MTX_DEF); - -/* - * Flushes all - * - * XXX this needs to be done at interrupt time! Grr! - */ -static void -arge_flush_ddr(struct arge_softc *sc) -{ - switch (sc->arge_mac_unit) { - case 0: - ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_GE0); - break; - case 1: - ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_GE1); - break; - default: - device_printf(sc->arge_dev, "%s: unknown unit (%d)\n", - __func__, - sc->arge_mac_unit); - break; - } -} - -static int -arge_probe(device_t dev) -{ - - device_set_desc(dev, "Atheros AR71xx built-in ethernet interface"); - return (BUS_PROBE_NOWILDCARD); -} - -#ifdef ARGE_DEBUG -static void -arge_attach_intr_sysctl(device_t dev, struct sysctl_oid_list *parent) -{ - struct arge_softc *sc = device_get_softc(dev); - struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); - struct sysctl_oid *tree = device_get_sysctl_tree(dev); - struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); - char sn[8]; - int i; - - tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "intr", - CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Interrupt statistics"); - child = SYSCTL_CHILDREN(tree); - for (i = 0; i < 32; i++) { - snprintf(sn, sizeof(sn), "%d", i); - SYSCTL_ADD_UINT(ctx, child, OID_AUTO, sn, CTLFLAG_RD, - &sc->intr_stats.count[i], 0, ""); - } -} -#endif - -static void -arge_attach_sysctl(device_t dev) -{ - struct arge_softc *sc = device_get_softc(dev); - struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); - struct sysctl_oid *tree = device_get_sysctl_tree(dev); - -#ifdef ARGE_DEBUG - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "debug", CTLFLAG_RW, &sc->arge_debug, 0, - "arge interface debugging flags"); - arge_attach_intr_sysctl(dev, SYSCTL_CHILDREN(tree)); -#endif - - SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "tx_pkts_aligned", CTLFLAG_RW, &sc->stats.tx_pkts_aligned, 0, - "number of TX aligned packets"); - - SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "tx_pkts_unaligned", CTLFLAG_RW, &sc->stats.tx_pkts_unaligned, - 0, "number of TX unaligned packets"); - - SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "tx_pkts_unaligned_start", CTLFLAG_RW, &sc->stats.tx_pkts_unaligned_start, - 0, "number of TX unaligned packets (start)"); - - SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "tx_pkts_unaligned_len", CTLFLAG_RW, &sc->stats.tx_pkts_unaligned_len, - 0, "number of TX unaligned packets (len)"); - - SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "tx_pkts_unaligned_tooshort", CTLFLAG_RW, - &sc->stats.tx_pkts_unaligned_tooshort, - 0, "number of TX unaligned packets (mbuf length < 4 bytes)"); - - SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "tx_pkts_nosegs", CTLFLAG_RW, &sc->stats.tx_pkts_nosegs, - 0, "number of TX packets fail with no ring slots avail"); - - SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "intr_stray_filter", CTLFLAG_RW, &sc->stats.intr_stray, - 0, "number of stray interrupts (filter)"); - - SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "intr_stray_intr", CTLFLAG_RW, &sc->stats.intr_stray2, - 0, "number of stray interrupts (intr)"); - - SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "intr_ok", CTLFLAG_RW, &sc->stats.intr_ok, - 0, "number of OK interrupts"); - - SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "tx_underflow", CTLFLAG_RW, &sc->stats.tx_underflow, - 0, "Number of TX underflows"); - SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "rx_overflow", CTLFLAG_RW, &sc->stats.rx_overflow, - 0, "Number of RX overflows"); -#ifdef ARGE_DEBUG - SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "tx_prod", - CTLFLAG_RW, &sc->arge_cdata.arge_tx_prod, 0, ""); - SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "tx_cons", - CTLFLAG_RW, &sc->arge_cdata.arge_tx_cons, 0, ""); - SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "tx_cnt", - CTLFLAG_RW, &sc->arge_cdata.arge_tx_cnt, 0, ""); -#endif -} - -static void -arge_reset_mac(struct arge_softc *sc) -{ - uint32_t reg; - uint32_t reset_reg; - - ARGEDEBUG(sc, ARGE_DBG_RESET, "%s called\n", __func__); - - /* Step 1. Soft-reset MAC */ - ARGE_SET_BITS(sc, AR71XX_MAC_CFG1, MAC_CFG1_SOFT_RESET); - DELAY(20); - - /* Step 2. Punt the MAC core from the central reset register */ - /* - * XXX TODO: migrate this (and other) chip specific stuff into - * a chipdef method. - */ - if (sc->arge_mac_unit == 0) { - reset_reg = RST_RESET_GE0_MAC; - } else { - reset_reg = RST_RESET_GE1_MAC; - } - - /* - * AR934x (and later) also needs the MDIO block reset. - * XXX should methodize this! - */ - if (ar71xx_soc == AR71XX_SOC_AR9341 || - ar71xx_soc == AR71XX_SOC_AR9342 || - ar71xx_soc == AR71XX_SOC_AR9344) { - if (sc->arge_mac_unit == 0) { - reset_reg |= AR934X_RESET_GE0_MDIO; - } else { - reset_reg |= AR934X_RESET_GE1_MDIO; - } - } - - if (ar71xx_soc == AR71XX_SOC_QCA9556 || - ar71xx_soc == AR71XX_SOC_QCA9558) { - if (sc->arge_mac_unit == 0) { - reset_reg |= QCA955X_RESET_GE0_MDIO; - } else { - reset_reg |= QCA955X_RESET_GE1_MDIO; - } - } - - if (ar71xx_soc == AR71XX_SOC_QCA9533 || - ar71xx_soc == AR71XX_SOC_QCA9533_V2) { - if (sc->arge_mac_unit == 0) { - reset_reg |= QCA953X_RESET_GE0_MDIO; - } else { - reset_reg |= QCA953X_RESET_GE1_MDIO; - } - } - - ar71xx_device_stop(reset_reg); - DELAY(100); - ar71xx_device_start(reset_reg); - - /* Step 3. Reconfigure MAC block */ - ARGE_WRITE(sc, AR71XX_MAC_CFG1, - MAC_CFG1_SYNC_RX | MAC_CFG1_RX_ENABLE | - MAC_CFG1_SYNC_TX | MAC_CFG1_TX_ENABLE); - - reg = ARGE_READ(sc, AR71XX_MAC_CFG2); - reg |= MAC_CFG2_ENABLE_PADCRC | MAC_CFG2_LENGTH_FIELD ; - ARGE_WRITE(sc, AR71XX_MAC_CFG2, reg); - - ARGE_WRITE(sc, AR71XX_MAC_MAX_FRAME_LEN, 1536); -} - -/* - * These values map to the divisor values programmed into - * AR71XX_MAC_MII_CFG. - * - * The index of each value corresponds to the divisor section - * value in AR71XX_MAC_MII_CFG (ie, table[0] means '0' in - * AR71XX_MAC_MII_CFG, table[1] means '1', etc.) - */ -static const uint32_t ar71xx_mdio_div_table[] = { - 4, 4, 6, 8, 10, 14, 20, 28, -}; - -static const uint32_t ar7240_mdio_div_table[] = { - 2, 2, 4, 6, 8, 12, 18, 26, 32, 40, 48, 56, 62, 70, 78, 96, -}; - -static const uint32_t ar933x_mdio_div_table[] = { - 4, 4, 6, 8, 10, 14, 20, 28, 34, 42, 50, 58, 66, 74, 82, 98, -}; - -/* - * Lookup the divisor to use based on the given frequency. - * - * Returns the divisor to use, or -ve on error. - */ -static int -arge_mdio_get_divider(struct arge_softc *sc, unsigned long mdio_clock) -{ - unsigned long ref_clock, t; - const uint32_t *table; - int ndivs; - int i; - - /* - * This is the base MDIO frequency on the SoC. - * The dividers .. well, divide. Duh. - */ - ref_clock = ar71xx_mdio_freq(); - - /* - * If either clock is undefined, just tell the - * caller to fall through to the defaults. - */ - if (ref_clock == 0 || mdio_clock == 0) - return (-EINVAL); - - /* - * Pick the correct table! - */ - switch (ar71xx_soc) { - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - case AR71XX_SOC_QCA9533: - case AR71XX_SOC_QCA9533_V2: - case AR71XX_SOC_QCA9556: - case AR71XX_SOC_QCA9558: - table = ar933x_mdio_div_table; - ndivs = nitems(ar933x_mdio_div_table); - break; - - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - table = ar7240_mdio_div_table; - ndivs = nitems(ar7240_mdio_div_table); - break; - - default: - table = ar71xx_mdio_div_table; - ndivs = nitems(ar71xx_mdio_div_table); - } - - /* - * Now, walk through the list and find the first divisor - * that falls under the target MDIO frequency. - * - * The divisors go up, but the corresponding frequencies - * are actually decreasing. - */ - for (i = 0; i < ndivs; i++) { - t = ref_clock / table[i]; - if (t <= mdio_clock) { - return (i); - } - } - - ARGEDEBUG(sc, ARGE_DBG_RESET, - "No divider found; MDIO=%lu Hz; target=%lu Hz\n", - ref_clock, mdio_clock); - return (-ENOENT); -} - -/* - * Fetch the MDIO bus clock rate. - * - * For now, the default is DIV_28 for everything - * bar AR934x, which will be DIV_58. - * - * It will definitely need updating to take into account - * the MDIO bus core clock rate and the target clock - * rate for the chip. - */ -static uint32_t -arge_fetch_mdiobus_clock_rate(struct arge_softc *sc) -{ - int mdio_freq, div; - - /* - * Is the MDIO frequency defined? If so, find a divisor that - * makes reasonable sense. Don't overshoot the frequency. - */ - if (resource_int_value(device_get_name(sc->arge_dev), - device_get_unit(sc->arge_dev), - "mdio_freq", - &mdio_freq) == 0) { - sc->arge_mdiofreq = mdio_freq; - div = arge_mdio_get_divider(sc, sc->arge_mdiofreq); - if (bootverbose) - device_printf(sc->arge_dev, - "%s: mdio ref freq=%llu Hz, target freq=%llu Hz," - " divisor index=%d\n", - __func__, - (unsigned long long) ar71xx_mdio_freq(), - (unsigned long long) mdio_freq, - div); - if (div >= 0) - return (div); - } - - /* - * Default value(s). - * - * XXX obviously these need .. fixing. - * - * From Linux/OpenWRT: - * - * + 7240? DIV_6 - * + Builtin-switch port and not 934x? DIV_10 - * + Not built-in switch port and 934x? DIV_58 - * + .. else DIV_28. - */ - switch (ar71xx_soc) { - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - case AR71XX_SOC_QCA9533: - case AR71XX_SOC_QCA9533_V2: - case AR71XX_SOC_QCA9556: - case AR71XX_SOC_QCA9558: - return (MAC_MII_CFG_CLOCK_DIV_58); - break; - default: - return (MAC_MII_CFG_CLOCK_DIV_28); - } -} - -static void -arge_reset_miibus(struct arge_softc *sc) -{ - uint32_t mdio_div; - - mdio_div = arge_fetch_mdiobus_clock_rate(sc); - - /* - * XXX AR934x and later; should we be also resetting the - * MDIO block(s) using the reset register block? - */ - - /* Reset MII bus; program in the default divisor */ - ARGE_WRITE(sc, AR71XX_MAC_MII_CFG, MAC_MII_CFG_RESET | mdio_div); - DELAY(100); - ARGE_WRITE(sc, AR71XX_MAC_MII_CFG, mdio_div); - DELAY(100); -} - -static void -arge_fetch_pll_config(struct arge_softc *sc) -{ - long int val; - - if (resource_long_value(device_get_name(sc->arge_dev), - device_get_unit(sc->arge_dev), - "pll_10", &val) == 0) { - sc->arge_pllcfg.pll_10 = val; - device_printf(sc->arge_dev, "%s: pll_10 = 0x%x\n", - __func__, (int) val); - } - if (resource_long_value(device_get_name(sc->arge_dev), - device_get_unit(sc->arge_dev), - "pll_100", &val) == 0) { - sc->arge_pllcfg.pll_100 = val; - device_printf(sc->arge_dev, "%s: pll_100 = 0x%x\n", - __func__, (int) val); - } - if (resource_long_value(device_get_name(sc->arge_dev), - device_get_unit(sc->arge_dev), - "pll_1000", &val) == 0) { - sc->arge_pllcfg.pll_1000 = val; - device_printf(sc->arge_dev, "%s: pll_1000 = 0x%x\n", - __func__, (int) val); - } -} - -static int -arge_attach(device_t dev) -{ - struct ifnet *ifp; - struct arge_softc *sc; - int error = 0, rid, i; - uint32_t hint; - long eeprom_mac_addr = 0; - int miicfg = 0; - int readascii = 0; - int local_mac = 0; - uint8_t local_macaddr[ETHER_ADDR_LEN]; - char * local_macstr; - char devid_str[32]; - int count; - - sc = device_get_softc(dev); - sc->arge_dev = dev; - sc->arge_mac_unit = device_get_unit(dev); - - /* - * See if there's a "board" MAC address hint available for - * this particular device. - * - * This is in the environment - it'd be nice to use the resource_*() - * routines, but at the moment the system is booting, the resource hints - * are set to the 'static' map so they're not pulling from kenv. - */ - snprintf(devid_str, 32, "hint.%s.%d.macaddr", - device_get_name(dev), - device_get_unit(dev)); - if ((local_macstr = kern_getenv(devid_str)) != NULL) { - uint32_t tmpmac[ETHER_ADDR_LEN]; - - /* Have a MAC address; should use it */ - device_printf(dev, "Overriding MAC address from environment: '%s'\n", - local_macstr); - - /* Extract out the MAC address */ - /* XXX this should all be a generic method */ - count = sscanf(local_macstr, "%x%*c%x%*c%x%*c%x%*c%x%*c%x", - &tmpmac[0], &tmpmac[1], - &tmpmac[2], &tmpmac[3], - &tmpmac[4], &tmpmac[5]); - if (count == 6) { - /* Valid! */ - local_mac = 1; - for (i = 0; i < ETHER_ADDR_LEN; i++) - local_macaddr[i] = tmpmac[i]; - } - /* Done! */ - freeenv(local_macstr); - local_macstr = NULL; - } - - /* - * Hardware workarounds. - */ - switch (ar71xx_soc) { - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - case AR71XX_SOC_QCA9533: - case AR71XX_SOC_QCA9533_V2: - case AR71XX_SOC_QCA9556: - case AR71XX_SOC_QCA9558: - /* Arbitrary alignment */ - sc->arge_hw_flags |= ARGE_HW_FLG_TX_DESC_ALIGN_1BYTE; - sc->arge_hw_flags |= ARGE_HW_FLG_RX_DESC_ALIGN_1BYTE; - break; - default: - sc->arge_hw_flags |= ARGE_HW_FLG_TX_DESC_ALIGN_4BYTE; - sc->arge_hw_flags |= ARGE_HW_FLG_RX_DESC_ALIGN_4BYTE; - break; - } - - /* - * Some units (eg the TP-Link WR-1043ND) do not have a convenient - * EEPROM location to read the ethernet MAC address from. - * OpenWRT simply snaffles it from a fixed location. - * - * Since multiple units seem to use this feature, include - * a method of setting the MAC address based on an flash location - * in CPU address space. - * - * Some vendors have decided to store the mac address as a literal - * string of 18 characters in xx:xx:xx:xx:xx:xx format instead of - * an array of numbers. Expose a hint to turn on this conversion - * feature via strtol() - */ - if (local_mac == 0 && resource_long_value(device_get_name(dev), - device_get_unit(dev), "eeprommac", &eeprom_mac_addr) == 0) { - local_mac = 1; - int i; - const char *mac = - (const char *) MIPS_PHYS_TO_KSEG1(eeprom_mac_addr); - device_printf(dev, "Overriding MAC from EEPROM\n"); - if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "readascii", &readascii) == 0) { - device_printf(dev, "Vendor stores MAC in ASCII format\n"); - for (i = 0; i < 6; i++) { - local_macaddr[i] = strtol(&(mac[i*3]), NULL, 16); - } - } else { - for (i = 0; i < 6; i++) { - local_macaddr[i] = mac[i]; - } - } - } - - KASSERT(((sc->arge_mac_unit == 0) || (sc->arge_mac_unit == 1)), - ("if_arge: Only MAC0 and MAC1 supported")); - - /* - * Fetch the PLL configuration. - */ - arge_fetch_pll_config(sc); - - /* - * Get the MII configuration, if applicable. - */ - if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "miimode", &miicfg) == 0) { - /* XXX bounds check? */ - device_printf(dev, "%s: overriding MII mode to '%s'\n", - __func__, arge_miicfg_str[miicfg]); - sc->arge_miicfg = miicfg; - } - - /* - * Get which PHY of 5 available we should use for this unit - */ - if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "phymask", &sc->arge_phymask) != 0) { - /* - * Use port 4 (WAN) for GE0. For any other port use - * its PHY the same as its unit number - */ - if (sc->arge_mac_unit == 0) - sc->arge_phymask = (1 << 4); - else - /* Use all phys up to 4 */ - sc->arge_phymask = (1 << 4) - 1; - - device_printf(dev, "No PHY specified, using mask %d\n", sc->arge_phymask); - } - - /* - * Get default/hard-coded media & duplex mode. - */ - if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "media", &hint) != 0) - hint = 0; - - if (hint == 1000) - sc->arge_media_type = IFM_1000_T; - else if (hint == 100) - sc->arge_media_type = IFM_100_TX; - else if (hint == 10) - sc->arge_media_type = IFM_10_T; - else - sc->arge_media_type = 0; - - if (resource_int_value(device_get_name(dev), device_get_unit(dev), - "fduplex", &hint) != 0) - hint = 1; - - if (hint) - sc->arge_duplex_mode = IFM_FDX; - else - sc->arge_duplex_mode = 0; - - mtx_init(&sc->arge_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, - MTX_DEF); - callout_init_mtx(&sc->arge_stat_callout, &sc->arge_mtx, 0); - TASK_INIT(&sc->arge_link_task, 0, arge_link_task, sc); - - /* Map control/status registers. */ - sc->arge_rid = 0; - sc->arge_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->arge_rid, RF_ACTIVE | RF_SHAREABLE); - - if (sc->arge_res == NULL) { - device_printf(dev, "couldn't map memory\n"); - error = ENXIO; - goto fail; - } - - /* Allocate interrupts */ - rid = 0; - sc->arge_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE); - - if (sc->arge_irq == NULL) { - device_printf(dev, "couldn't map interrupt\n"); - error = ENXIO; - goto fail; - } - - /* Allocate ifnet structure. */ - ifp = sc->arge_ifp = if_alloc(IFT_ETHER); - - if (ifp == NULL) { - device_printf(dev, "couldn't allocate ifnet structure\n"); - error = ENOSPC; - goto fail; - } - - ifp->if_softc = sc; - if_initname(ifp, device_get_name(dev), device_get_unit(dev)); - ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; - ifp->if_ioctl = arge_ioctl; - ifp->if_start = arge_start; - ifp->if_init = arge_init; - sc->arge_if_flags = ifp->if_flags; - - /* XXX: add real size */ - IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); - ifp->if_snd.ifq_maxlen = ifqmaxlen; - IFQ_SET_READY(&ifp->if_snd); - - /* Tell the upper layer(s) we support long frames. */ - ifp->if_capabilities |= IFCAP_VLAN_MTU; - - ifp->if_capenable = ifp->if_capabilities; -#ifdef DEVICE_POLLING - ifp->if_capabilities |= IFCAP_POLLING; -#endif - - /* If there's a local mac defined, copy that in */ - if (local_mac == 1) { - (void) ar71xx_mac_addr_init(sc->arge_eaddr, - local_macaddr, 0, 0); - } else { - /* - * No MAC address configured. Generate the random one. - */ - if (bootverbose) - device_printf(dev, - "Generating random ethernet address.\n"); - if (ar71xx_mac_addr_random_init(ifp, (void *) sc->arge_eaddr) < 0) { - device_printf(dev, "Failed to choose random MAC address\n"); - error = EINVAL; - goto fail; - } - } - - if (arge_dma_alloc(sc) != 0) { - error = ENXIO; - goto fail; - } - - /* - * Don't do this for the MDIO bus case - it's already done - * as part of the MDIO bus attachment. - * - * XXX TODO: if we don't do this, we don't ever release the MAC - * from reset and we can't use the port. Now, if we define ARGE_MDIO - * but we /don't/ define two MDIO busses, then we can't actually - * use both MACs. - */ -#if !defined(ARGE_MDIO) - /* Initialize the MAC block */ - arge_reset_mac(sc); - arge_reset_miibus(sc); -#endif - - /* Configure MII mode, just for convienence */ - if (sc->arge_miicfg != 0) - ar71xx_device_set_mii_if(sc->arge_mac_unit, sc->arge_miicfg); - - /* - * Set all Ethernet address registers to the same initial values - * set all four addresses to 66-88-aa-cc-dd-ee - */ - ARGE_WRITE(sc, AR71XX_MAC_STA_ADDR1, (sc->arge_eaddr[2] << 24) - | (sc->arge_eaddr[3] << 16) | (sc->arge_eaddr[4] << 8) - | sc->arge_eaddr[5]); - ARGE_WRITE(sc, AR71XX_MAC_STA_ADDR2, (sc->arge_eaddr[0] << 8) - | sc->arge_eaddr[1]); - - ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG0, - FIFO_CFG0_ALL << FIFO_CFG0_ENABLE_SHIFT); - - /* - * SoC specific bits. - */ - switch (ar71xx_soc) { - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - case AR71XX_SOC_QCA9533: - case AR71XX_SOC_QCA9533_V2: - case AR71XX_SOC_QCA9556: - case AR71XX_SOC_QCA9558: - ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG1, 0x0010ffff); - ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG2, 0x015500aa); - break; - /* AR71xx, AR913x */ - default: - ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG1, 0x0fff0000); - ARGE_WRITE(sc, AR71XX_MAC_FIFO_CFG2, 0x00001fff); - } - - ARGE_WRITE(sc, AR71XX_MAC_FIFO_RX_FILTMATCH, - FIFO_RX_FILTMATCH_DEFAULT); - - ARGE_WRITE(sc, AR71XX_MAC_FIFO_RX_FILTMASK, - FIFO_RX_FILTMASK_DEFAULT); - -#if defined(ARGE_MDIO) - sc->arge_miiproxy = mii_attach_proxy(sc->arge_dev); -#endif - - device_printf(sc->arge_dev, "finishing attachment, phymask %04x" - ", proxy %s \n", sc->arge_phymask, sc->arge_miiproxy == NULL ? - "null" : "set"); - for (i = 0; i < ARGE_NPHY; i++) { - if (((1 << i) & sc->arge_phymask) != 0) { - error = mii_attach(sc->arge_miiproxy != NULL ? - sc->arge_miiproxy : sc->arge_dev, - &sc->arge_miibus, sc->arge_ifp, - arge_ifmedia_upd, arge_ifmedia_sts, - BMSR_DEFCAPMASK, i, MII_OFFSET_ANY, 0); - if (error != 0) { - device_printf(sc->arge_dev, "unable to attach" - " PHY %d: %d\n", i, error); - goto fail; - } - } - } - - if (sc->arge_miibus == NULL) { - /* no PHY, so use hard-coded values */ - ifmedia_init(&sc->arge_ifmedia, 0, - arge_multiphy_mediachange, - arge_multiphy_mediastatus); - ifmedia_add(&sc->arge_ifmedia, - IFM_ETHER | sc->arge_media_type | sc->arge_duplex_mode, - 0, NULL); - ifmedia_set(&sc->arge_ifmedia, - IFM_ETHER | sc->arge_media_type | sc->arge_duplex_mode); - arge_set_pll(sc, sc->arge_media_type, sc->arge_duplex_mode); - } - - /* Call MI attach routine. */ - ether_ifattach(sc->arge_ifp, sc->arge_eaddr); - - /* Hook interrupt last to avoid having to lock softc */ - error = bus_setup_intr(sc->arge_dev, sc->arge_irq, INTR_TYPE_NET | INTR_MPSAFE, - arge_intr_filter, arge_intr, sc, &sc->arge_intrhand); - - if (error) { - device_printf(sc->arge_dev, "couldn't set up irq\n"); - ether_ifdetach(sc->arge_ifp); - goto fail; - } - - /* setup sysctl variables */ - arge_attach_sysctl(sc->arge_dev); - -fail: - if (error) - arge_detach(dev); - - return (error); -} - -static int -arge_detach(device_t dev) -{ - struct arge_softc *sc = device_get_softc(dev); - struct ifnet *ifp = sc->arge_ifp; - - KASSERT(mtx_initialized(&sc->arge_mtx), - ("arge mutex not initialized")); - - /* These should only be active if attach succeeded */ - if (device_is_attached(dev)) { - ARGE_LOCK(sc); - sc->arge_detach = 1; -#ifdef DEVICE_POLLING - if (ifp->if_capenable & IFCAP_POLLING) - ether_poll_deregister(ifp); -#endif - - arge_stop(sc); - ARGE_UNLOCK(sc); - taskqueue_drain(taskqueue_swi, &sc->arge_link_task); - ether_ifdetach(ifp); - } - - if (sc->arge_miibus) - device_delete_child(dev, sc->arge_miibus); - - if (sc->arge_miiproxy) - device_delete_child(dev, sc->arge_miiproxy); - - bus_generic_detach(dev); - - if (sc->arge_intrhand) - bus_teardown_intr(dev, sc->arge_irq, sc->arge_intrhand); - - if (sc->arge_res) - bus_release_resource(dev, SYS_RES_MEMORY, sc->arge_rid, - sc->arge_res); - - if (ifp) - if_free(ifp); - - arge_dma_free(sc); - - mtx_destroy(&sc->arge_mtx); - - return (0); - -} - -static int -arge_suspend(device_t dev) -{ - - panic("%s", __func__); - return 0; -} - -static int -arge_resume(device_t dev) -{ - - panic("%s", __func__); - return 0; -} - -static int -arge_shutdown(device_t dev) -{ - struct arge_softc *sc; - - sc = device_get_softc(dev); - - ARGE_LOCK(sc); - arge_stop(sc); - ARGE_UNLOCK(sc); - - return (0); -} - -static void -arge_hinted_child(device_t bus, const char *dname, int dunit) -{ - BUS_ADD_CHILD(bus, 0, dname, dunit); - device_printf(bus, "hinted child %s%d\n", dname, dunit); -} - -static int -arge_mdio_busy(struct arge_softc *sc) -{ - int i,result; - - for (i = 0; i < ARGE_MII_TIMEOUT; i++) { - DELAY(5); - ARGE_MDIO_BARRIER_READ(sc); - result = ARGE_MDIO_READ(sc, AR71XX_MAC_MII_INDICATOR); - if (! result) - return (0); - DELAY(5); - } - return (-1); -} - -static int -arge_miibus_readreg(device_t dev, int phy, int reg) -{ - struct arge_softc * sc = device_get_softc(dev); - int result; - uint32_t addr = (phy << MAC_MII_PHY_ADDR_SHIFT) - | (reg & MAC_MII_REG_MASK); - - mtx_lock(&miibus_mtx); - ARGE_MDIO_BARRIER_RW(sc); - ARGE_MDIO_WRITE(sc, AR71XX_MAC_MII_CMD, MAC_MII_CMD_WRITE); - ARGE_MDIO_BARRIER_WRITE(sc); - ARGE_MDIO_WRITE(sc, AR71XX_MAC_MII_ADDR, addr); - ARGE_MDIO_BARRIER_WRITE(sc); - ARGE_MDIO_WRITE(sc, AR71XX_MAC_MII_CMD, MAC_MII_CMD_READ); - - if (arge_mdio_busy(sc) != 0) { - mtx_unlock(&miibus_mtx); - ARGEDEBUG(sc, ARGE_DBG_ANY, "%s timedout\n", __func__); - /* XXX: return ERRNO istead? */ - return (-1); - } - - ARGE_MDIO_BARRIER_READ(sc); - result = ARGE_MDIO_READ(sc, AR71XX_MAC_MII_STATUS) & MAC_MII_STATUS_MASK; - ARGE_MDIO_BARRIER_RW(sc); - ARGE_MDIO_WRITE(sc, AR71XX_MAC_MII_CMD, MAC_MII_CMD_WRITE); - mtx_unlock(&miibus_mtx); - - ARGEDEBUG(sc, ARGE_DBG_MII, - "%s: phy=%d, reg=%02x, value[%08x]=%04x\n", - __func__, phy, reg, addr, result); - - return (result); -} - -static int -arge_miibus_writereg(device_t dev, int phy, int reg, int data) -{ - struct arge_softc * sc = device_get_softc(dev); - uint32_t addr = - (phy << MAC_MII_PHY_ADDR_SHIFT) | (reg & MAC_MII_REG_MASK); - - ARGEDEBUG(sc, ARGE_DBG_MII, "%s: phy=%d, reg=%02x, value=%04x\n", __func__, - phy, reg, data); - - mtx_lock(&miibus_mtx); - ARGE_MDIO_BARRIER_RW(sc); - ARGE_MDIO_WRITE(sc, AR71XX_MAC_MII_ADDR, addr); - ARGE_MDIO_BARRIER_WRITE(sc); - ARGE_MDIO_WRITE(sc, AR71XX_MAC_MII_CONTROL, data); - ARGE_MDIO_BARRIER_WRITE(sc); - - if (arge_mdio_busy(sc) != 0) { - mtx_unlock(&miibus_mtx); - ARGEDEBUG(sc, ARGE_DBG_ANY, "%s timedout\n", __func__); - /* XXX: return ERRNO istead? */ - return (-1); - } - - mtx_unlock(&miibus_mtx); - return (0); -} - -static void -arge_miibus_statchg(device_t dev) -{ - struct arge_softc *sc; - - sc = device_get_softc(dev); - taskqueue_enqueue(taskqueue_swi, &sc->arge_link_task); -} - -static void -arge_link_task(void *arg, int pending) -{ - struct arge_softc *sc; - sc = (struct arge_softc *)arg; - - ARGE_LOCK(sc); - arge_update_link_locked(sc); - ARGE_UNLOCK(sc); -} - -static void -arge_update_link_locked(struct arge_softc *sc) -{ - struct mii_data *mii; - struct ifnet *ifp; - uint32_t media, duplex; - - mii = device_get_softc(sc->arge_miibus); - ifp = sc->arge_ifp; - if (mii == NULL || ifp == NULL || - (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { - return; - } - - /* - * If we have a static media type configured, then - * use that. Some PHY configurations (eg QCA955x -> AR8327) - * use a static speed/duplex between the SoC and switch, - * even though the front-facing PHY speed changes. - */ - if (sc->arge_media_type != 0) { - ARGEDEBUG(sc, ARGE_DBG_MII, "%s: fixed; media=%d, duplex=%d\n", - __func__, - sc->arge_media_type, - sc->arge_duplex_mode); - if (mii->mii_media_status & IFM_ACTIVE) { - sc->arge_link_status = 1; - } else { - sc->arge_link_status = 0; - } - arge_set_pll(sc, sc->arge_media_type, sc->arge_duplex_mode); - } - - if (mii->mii_media_status & IFM_ACTIVE) { - media = IFM_SUBTYPE(mii->mii_media_active); - if (media != IFM_NONE) { - sc->arge_link_status = 1; - duplex = mii->mii_media_active & IFM_GMASK; - ARGEDEBUG(sc, ARGE_DBG_MII, "%s: media=%d, duplex=%d\n", - __func__, - media, - duplex); - arge_set_pll(sc, media, duplex); - } - } else { - sc->arge_link_status = 0; - } -} - -static void -arge_set_pll(struct arge_softc *sc, int media, int duplex) -{ - uint32_t cfg, ifcontrol, rx_filtmask; - uint32_t fifo_tx, pll; - int if_speed; - - /* - * XXX Verify - is this valid for all chips? - * QCA955x (and likely some of the earlier chips!) define - * this as nibble mode and byte mode, and those have to do - * with the interface type (MII/SMII versus GMII/RGMII.) - */ - ARGEDEBUG(sc, ARGE_DBG_PLL, "set_pll(%04x, %s)\n", media, - duplex == IFM_FDX ? "full" : "half"); - cfg = ARGE_READ(sc, AR71XX_MAC_CFG2); - cfg &= ~(MAC_CFG2_IFACE_MODE_1000 - | MAC_CFG2_IFACE_MODE_10_100 - | MAC_CFG2_FULL_DUPLEX); - - if (duplex == IFM_FDX) - cfg |= MAC_CFG2_FULL_DUPLEX; - - ifcontrol = ARGE_READ(sc, AR71XX_MAC_IFCONTROL); - ifcontrol &= ~MAC_IFCONTROL_SPEED; - rx_filtmask = - ARGE_READ(sc, AR71XX_MAC_FIFO_RX_FILTMASK); - rx_filtmask &= ~FIFO_RX_MASK_BYTE_MODE; - - switch(media) { - case IFM_10_T: - cfg |= MAC_CFG2_IFACE_MODE_10_100; - if_speed = 10; - break; - case IFM_100_TX: - cfg |= MAC_CFG2_IFACE_MODE_10_100; - ifcontrol |= MAC_IFCONTROL_SPEED; - if_speed = 100; - break; - case IFM_1000_T: - case IFM_1000_SX: - cfg |= MAC_CFG2_IFACE_MODE_1000; - rx_filtmask |= FIFO_RX_MASK_BYTE_MODE; - if_speed = 1000; - break; - default: - if_speed = 100; - device_printf(sc->arge_dev, - "Unknown media %d\n", media); - } - - ARGEDEBUG(sc, ARGE_DBG_PLL, "%s: if_speed=%d\n", __func__, if_speed); - - switch (ar71xx_soc) { - case AR71XX_SOC_AR7240: - case AR71XX_SOC_AR7241: - case AR71XX_SOC_AR7242: - case AR71XX_SOC_AR9330: - case AR71XX_SOC_AR9331: - case AR71XX_SOC_AR9341: - case AR71XX_SOC_AR9342: - case AR71XX_SOC_AR9344: - case AR71XX_SOC_QCA9533: - case AR71XX_SOC_QCA9533_V2: - case AR71XX_SOC_QCA9556: - case AR71XX_SOC_QCA9558: - fifo_tx = 0x01f00140; - break; - case AR71XX_SOC_AR9130: - case AR71XX_SOC_AR9132: - fifo_tx = 0x00780fff; - break; - /* AR71xx */ - default: - fifo_tx = 0x008001ff; - } - - ARGE_WRITE(sc, AR71XX_MAC_CFG2, cfg); - ARGE_WRITE(sc, AR71XX_MAC_IFCONTROL, ifcontrol); - ARGE_WRITE(sc, AR71XX_MAC_FIFO_RX_FILTMASK, - rx_filtmask); - ARGE_WRITE(sc, AR71XX_MAC_FIFO_TX_THRESHOLD, fifo_tx); - - /* fetch PLL registers */ - pll = ar71xx_device_get_eth_pll(sc->arge_mac_unit, if_speed); - ARGEDEBUG(sc, ARGE_DBG_PLL, "%s: pll=0x%x\n", __func__, pll); - - /* Override if required by platform data */ - if (if_speed == 10 && sc->arge_pllcfg.pll_10 != 0) - pll = sc->arge_pllcfg.pll_10; - else if (if_speed == 100 && sc->arge_pllcfg.pll_100 != 0) - pll = sc->arge_pllcfg.pll_100; - else if (if_speed == 1000 && sc->arge_pllcfg.pll_1000 != 0) - pll = sc->arge_pllcfg.pll_1000; - ARGEDEBUG(sc, ARGE_DBG_PLL, "%s: final pll=0x%x\n", __func__, pll); - - /* XXX ensure pll != 0 */ - ar71xx_device_set_pll_ge(sc->arge_mac_unit, if_speed, pll); - - /* set MII registers */ - /* - * This was introduced to match what the Linux ag71xx ethernet - * driver does. For the AR71xx case, it does set the port - * MII speed. However, if this is done, non-gigabit speeds - * are not at all reliable when speaking via RGMII through - * 'bridge' PHY port that's pretending to be a local PHY. - * - * Until that gets root caused, and until an AR71xx + normal - * PHY board is tested, leave this disabled. - */ -#if 0 - ar71xx_device_set_mii_speed(sc->arge_mac_unit, if_speed); -#endif -} - -static void -arge_reset_dma(struct arge_softc *sc) -{ - uint32_t val; - - ARGEDEBUG(sc, ARGE_DBG_RESET, "%s: called\n", __func__); - - ARGE_WRITE(sc, AR71XX_DMA_RX_CONTROL, 0); - ARGE_WRITE(sc, AR71XX_DMA_TX_CONTROL, 0); - - /* Give hardware a chance to finish */ - DELAY(1000); - - ARGE_WRITE(sc, AR71XX_DMA_RX_DESC, 0); - ARGE_WRITE(sc, AR71XX_DMA_TX_DESC, 0); - - ARGEDEBUG(sc, ARGE_DBG_RESET, "%s: RX_STATUS=%08x, TX_STATUS=%08x\n", - __func__, - ARGE_READ(sc, AR71XX_DMA_RX_STATUS), - ARGE_READ(sc, AR71XX_DMA_TX_STATUS)); - - /* Clear all possible RX interrupts */ - while(ARGE_READ(sc, AR71XX_DMA_RX_STATUS) & DMA_RX_STATUS_PKT_RECVD) - ARGE_WRITE(sc, AR71XX_DMA_RX_STATUS, DMA_RX_STATUS_PKT_RECVD); - - /* - * Clear all possible TX interrupts - */ - while(ARGE_READ(sc, AR71XX_DMA_TX_STATUS) & DMA_TX_STATUS_PKT_SENT) - ARGE_WRITE(sc, AR71XX_DMA_TX_STATUS, DMA_TX_STATUS_PKT_SENT); - - /* - * Now Rx/Tx errors - */ - ARGE_WRITE(sc, AR71XX_DMA_RX_STATUS, - DMA_RX_STATUS_BUS_ERROR | DMA_RX_STATUS_OVERFLOW); - ARGE_WRITE(sc, AR71XX_DMA_TX_STATUS, - DMA_TX_STATUS_BUS_ERROR | DMA_TX_STATUS_UNDERRUN); - - /* - * Force a DDR flush so any pending data is properly - * flushed to RAM before underlying buffers are freed. - */ - arge_flush_ddr(sc); - - /* Check if we cleared RX status */ - val = ARGE_READ(sc, AR71XX_DMA_RX_STATUS); - if (val != 0) { - device_printf(sc->arge_dev, - "%s: unable to clear DMA_RX_STATUS: %08x\n", - __func__, val); - } - - /* Check if we cleared TX status */ - val = ARGE_READ(sc, AR71XX_DMA_TX_STATUS); - /* Mask out reserved bits */ - val = val & 0x00ffffff; - if (val != 0) { - device_printf(sc->arge_dev, - "%s: unable to clear DMA_TX_STATUS: %08x\n", - __func__, val); - } -} - -static void -arge_init(void *xsc) -{ - struct arge_softc *sc = xsc; - - ARGE_LOCK(sc); - arge_init_locked(sc); - ARGE_UNLOCK(sc); -} - -static void -arge_init_locked(struct arge_softc *sc) -{ - struct ifnet *ifp = sc->arge_ifp; - struct mii_data *mii; - - ARGE_LOCK_ASSERT(sc); - - ARGEDEBUG(sc, ARGE_DBG_RESET, "%s: called\n", __func__); - - if ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING)) - return; - - ARGEDEBUG(sc, ARGE_DBG_RESET, "%s: init'ing\n", __func__); - - /* Init circular RX list. */ - if (arge_rx_ring_init(sc) != 0) { - device_printf(sc->arge_dev, - "initialization failed: no memory for rx buffers\n"); - arge_stop(sc); - return; - } - - /* Init tx descriptors. */ - arge_tx_ring_init(sc); - - /* Restart DMA */ - arge_reset_dma(sc); - - if (sc->arge_miibus) { - mii = device_get_softc(sc->arge_miibus); - mii_mediachg(mii); - } - else { - /* - * Sun always shines over multiPHY interface - */ - sc->arge_link_status = 1; - } - - ifp->if_drv_flags |= IFF_DRV_RUNNING; - ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; - - if (sc->arge_miibus) { - callout_reset(&sc->arge_stat_callout, hz, arge_tick, sc); - arge_update_link_locked(sc); - } - - ARGEDEBUG(sc, ARGE_DBG_RESET, "%s: desc ring; TX=0x%x, RX=0x%x\n", - __func__, - ARGE_TX_RING_ADDR(sc, 0), - ARGE_RX_RING_ADDR(sc, 0)); - - ARGE_WRITE(sc, AR71XX_DMA_TX_DESC, ARGE_TX_RING_ADDR(sc, 0)); - ARGE_WRITE(sc, AR71XX_DMA_RX_DESC, ARGE_RX_RING_ADDR(sc, 0)); - - /* Start listening */ - ARGE_WRITE(sc, AR71XX_DMA_RX_CONTROL, DMA_RX_CONTROL_EN); - - /* Enable interrupts */ - ARGE_WRITE(sc, AR71XX_DMA_INTR, DMA_INTR_ALL); -} - -/* - * Return whether the mbuf chain is correctly aligned - * for the arge TX engine. - * - * All the MACs have a length requirement: any non-final - * fragment (ie, descriptor with MORE bit set) needs to have - * a length divisible by 4. - * - * The AR71xx, AR913x require the start address also be - * DWORD aligned. The later MACs don't. - */ -static int -arge_mbuf_chain_is_tx_aligned(struct arge_softc *sc, struct mbuf *m0) -{ - struct mbuf *m; - - for (m = m0; m != NULL; m = m->m_next) { - /* - * Only do this for chips that require it. - */ - if ((sc->arge_hw_flags & ARGE_HW_FLG_TX_DESC_ALIGN_4BYTE) && - (mtod(m, intptr_t) & 3) != 0) { - sc->stats.tx_pkts_unaligned_start++; - return 0; - } - - /* - * All chips have this requirement for length. - */ - if ((m->m_next != NULL) && ((m->m_len & 0x03) != 0)) { - sc->stats.tx_pkts_unaligned_len++; - return 0; - } - - /* - * All chips have this requirement for length being greater - * than 4. - */ - if ((m->m_next != NULL) && ((m->m_len < 4))) { - sc->stats.tx_pkts_unaligned_tooshort++; - return 0; - } - } - return 1; -} - -/* - * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data - * pointers to the fragment pointers. - */ -static int -arge_encap(struct arge_softc *sc, struct mbuf **m_head) -{ - struct arge_txdesc *txd; - struct arge_desc *desc, *prev_desc; - bus_dma_segment_t txsegs[ARGE_MAXFRAGS]; - int error, i, nsegs, prod, prev_prod; - struct mbuf *m; - - ARGE_LOCK_ASSERT(sc); - - /* - * Fix mbuf chain based on hardware alignment constraints. - */ - m = *m_head; - if (! arge_mbuf_chain_is_tx_aligned(sc, m)) { - sc->stats.tx_pkts_unaligned++; - m = m_defrag(*m_head, M_NOWAIT); - if (m == NULL) { - m_freem(*m_head); - *m_head = NULL; - return (ENOBUFS); - } - *m_head = m; - } else - sc->stats.tx_pkts_aligned++; - - prod = sc->arge_cdata.arge_tx_prod; - txd = &sc->arge_cdata.arge_txdesc[prod]; - error = bus_dmamap_load_mbuf_sg(sc->arge_cdata.arge_tx_tag, - txd->tx_dmamap, *m_head, txsegs, &nsegs, BUS_DMA_NOWAIT); - - if (error == EFBIG) { - panic("EFBIG"); - } else if (error != 0) - return (error); - - if (nsegs == 0) { - m_freem(*m_head); - *m_head = NULL; - return (EIO); - } - - /* Check number of available descriptors. */ - if (sc->arge_cdata.arge_tx_cnt + nsegs >= (ARGE_TX_RING_COUNT - 2)) { - bus_dmamap_unload(sc->arge_cdata.arge_tx_tag, txd->tx_dmamap); - sc->stats.tx_pkts_nosegs++; - return (ENOBUFS); - } - - txd->tx_m = *m_head; - bus_dmamap_sync(sc->arge_cdata.arge_tx_tag, txd->tx_dmamap, - BUS_DMASYNC_PREWRITE); - - /* - * Make a list of descriptors for this packet. DMA controller will - * walk through it while arge_link is not zero. - * - * Since we're in a endless circular buffer, ensure that - * the first descriptor in a multi-descriptor ring is always - * set to EMPTY, then un-do it when we're done populating. - */ - prev_prod = prod; - desc = prev_desc = NULL; - for (i = 0; i < nsegs; i++) { - uint32_t tmp; - - desc = &sc->arge_rdata.arge_tx_ring[prod]; - - /* - * Set DESC_EMPTY so the hardware (hopefully) stops at this - * point. We don't want it to start transmitting descriptors - * before we've finished fleshing this out. - */ - tmp = ARGE_DMASIZE(txsegs[i].ds_len); - if (i == 0) - tmp |= ARGE_DESC_EMPTY; - desc->packet_ctrl = tmp; - - ARGEDEBUG(sc, ARGE_DBG_TX, " [%d / %d] addr=0x%x, len=%d\n", - i, - prod, - (uint32_t) txsegs[i].ds_addr, (int) txsegs[i].ds_len); - - /* XXX Note: only relevant for older MACs; but check length! */ - if ((sc->arge_hw_flags & ARGE_HW_FLG_TX_DESC_ALIGN_4BYTE) && - (txsegs[i].ds_addr & 3)) - panic("TX packet address unaligned\n"); - - desc->packet_addr = txsegs[i].ds_addr; - - /* link with previous descriptor */ - if (prev_desc) - prev_desc->packet_ctrl |= ARGE_DESC_MORE; - - sc->arge_cdata.arge_tx_cnt++; - prev_desc = desc; - ARGE_INC(prod, ARGE_TX_RING_COUNT); - } - - /* Update producer index. */ - sc->arge_cdata.arge_tx_prod = prod; - - /* - * The descriptors are updated, so enable the first one. - */ - desc = &sc->arge_rdata.arge_tx_ring[prev_prod]; - desc->packet_ctrl &= ~ ARGE_DESC_EMPTY; - - /* Sync descriptors. */ - bus_dmamap_sync(sc->arge_cdata.arge_tx_ring_tag, - sc->arge_cdata.arge_tx_ring_map, - BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); - - /* Flush writes */ - ARGE_BARRIER_WRITE(sc); - - /* Start transmitting */ - ARGEDEBUG(sc, ARGE_DBG_TX, "%s: setting DMA_TX_CONTROL_EN\n", - __func__); - ARGE_WRITE(sc, AR71XX_DMA_TX_CONTROL, DMA_TX_CONTROL_EN); - return (0); -} - -static void -arge_start(struct ifnet *ifp) -{ - struct arge_softc *sc; - - sc = ifp->if_softc; - - ARGE_LOCK(sc); - arge_start_locked(ifp); - ARGE_UNLOCK(sc); -} - -static void -arge_start_locked(struct ifnet *ifp) -{ - struct arge_softc *sc; - struct mbuf *m_head; - int enq = 0; - - sc = ifp->if_softc; - - ARGE_LOCK_ASSERT(sc); - - ARGEDEBUG(sc, ARGE_DBG_TX, "%s: beginning\n", __func__); - - if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != - IFF_DRV_RUNNING || sc->arge_link_status == 0 ) - return; - - /* - * Before we go any further, check whether we're already full. - * The below check errors out immediately if the ring is full - * and never gets a chance to set this flag. Although it's - * likely never needed, this at least avoids an unexpected - * situation. - */ - if (sc->arge_cdata.arge_tx_cnt >= ARGE_TX_RING_COUNT - 2) { - ifp->if_drv_flags |= IFF_DRV_OACTIVE; - ARGEDEBUG(sc, ARGE_DBG_ERR, - "%s: tx_cnt %d >= max %d; setting IFF_DRV_OACTIVE\n", - __func__, sc->arge_cdata.arge_tx_cnt, - ARGE_TX_RING_COUNT - 2); - return; - } - - arge_flush_ddr(sc); - - for (enq = 0; !IFQ_DRV_IS_EMPTY(&ifp->if_snd) && - sc->arge_cdata.arge_tx_cnt < ARGE_TX_RING_COUNT - 2; ) { - IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); - if (m_head == NULL) - break; - - /* - * Pack the data into the transmit ring. - */ - if (arge_encap(sc, &m_head)) { - if (m_head == NULL) - break; - IFQ_DRV_PREPEND(&ifp->if_snd, m_head); - ifp->if_drv_flags |= IFF_DRV_OACTIVE; - break; - } - - enq++; - /* - * If there's a BPF listener, bounce a copy of this frame - * to him. - */ - ETHER_BPF_MTAP(ifp, m_head); - } - ARGEDEBUG(sc, ARGE_DBG_TX, "%s: finished; queued %d packets\n", - __func__, enq); -} - -static void -arge_stop(struct arge_softc *sc) -{ - struct ifnet *ifp; - - ARGE_LOCK_ASSERT(sc); - - ifp = sc->arge_ifp; - ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); - if (sc->arge_miibus) - callout_stop(&sc->arge_stat_callout); - - /* mask out interrupts */ - ARGE_WRITE(sc, AR71XX_DMA_INTR, 0); - - arge_reset_dma(sc); - - /* Flush FIFO and free any existing mbufs */ - arge_flush_ddr(sc); - arge_rx_ring_free(sc); - arge_tx_ring_free(sc); -} - -static int -arge_ioctl(struct ifnet *ifp, u_long command, caddr_t data) -{ - struct arge_softc *sc = ifp->if_softc; - struct ifreq *ifr = (struct ifreq *) data; - struct mii_data *mii; - int error; -#ifdef DEVICE_POLLING - int mask; -#endif - - switch (command) { - case SIOCSIFFLAGS: - ARGE_LOCK(sc); - if ((ifp->if_flags & IFF_UP) != 0) { - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) { - if (((ifp->if_flags ^ sc->arge_if_flags) - & (IFF_PROMISC | IFF_ALLMULTI)) != 0) { - /* XXX: handle promisc & multi flags */ - } - - } else { - if (!sc->arge_detach) - arge_init_locked(sc); - } - } else if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) { - ifp->if_drv_flags &= ~IFF_DRV_RUNNING; - arge_stop(sc); - } - sc->arge_if_flags = ifp->if_flags; - ARGE_UNLOCK(sc); - error = 0; - break; - case SIOCADDMULTI: - case SIOCDELMULTI: - /* XXX: implement SIOCDELMULTI */ - error = 0; - break; - case SIOCGIFMEDIA: - case SIOCSIFMEDIA: - if (sc->arge_miibus) { - mii = device_get_softc(sc->arge_miibus); - error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, - command); - } - else - error = ifmedia_ioctl(ifp, ifr, &sc->arge_ifmedia, - command); - break; - case SIOCSIFCAP: - /* XXX: Check other capabilities */ -#ifdef DEVICE_POLLING - mask = ifp->if_capenable ^ ifr->ifr_reqcap; - if (mask & IFCAP_POLLING) { - if (ifr->ifr_reqcap & IFCAP_POLLING) { - ARGE_WRITE(sc, AR71XX_DMA_INTR, 0); - error = ether_poll_register(arge_poll, ifp); - if (error) - return error; - ARGE_LOCK(sc); - ifp->if_capenable |= IFCAP_POLLING; - ARGE_UNLOCK(sc); - } else { - ARGE_WRITE(sc, AR71XX_DMA_INTR, DMA_INTR_ALL); - error = ether_poll_deregister(ifp); - ARGE_LOCK(sc); - ifp->if_capenable &= ~IFCAP_POLLING; - ARGE_UNLOCK(sc); - } - } - error = 0; - break; -#endif - default: - error = ether_ioctl(ifp, command, data); - break; - } - - return (error); -} - -/* - * Set media options. - */ -static int -arge_ifmedia_upd(struct ifnet *ifp) -{ - struct arge_softc *sc; - struct mii_data *mii; - struct mii_softc *miisc; - int error; - - sc = ifp->if_softc; - ARGE_LOCK(sc); - mii = device_get_softc(sc->arge_miibus); - LIST_FOREACH(miisc, &mii->mii_phys, mii_list) - PHY_RESET(miisc); - error = mii_mediachg(mii); - ARGE_UNLOCK(sc); - - return (error); -} - -/* - * Report current media status. - */ -static void -arge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) -{ - struct arge_softc *sc = ifp->if_softc; - struct mii_data *mii; - - mii = device_get_softc(sc->arge_miibus); - ARGE_LOCK(sc); - mii_pollstat(mii); - ifmr->ifm_active = mii->mii_media_active; - ifmr->ifm_status = mii->mii_media_status; - ARGE_UNLOCK(sc); -} - -struct arge_dmamap_arg { - bus_addr_t arge_busaddr; -}; - -static void -arge_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) -{ - struct arge_dmamap_arg *ctx; - - if (error != 0) - return; - ctx = arg; - ctx->arge_busaddr = segs[0].ds_addr; -} - -static int -arge_dma_alloc(struct arge_softc *sc) -{ - struct arge_dmamap_arg ctx; - struct arge_txdesc *txd; - struct arge_rxdesc *rxd; - int error, i; - int arge_tx_align, arge_rx_align; - - /* Assume 4 byte alignment by default */ - arge_tx_align = 4; - arge_rx_align = 4; - - if (sc->arge_hw_flags & ARGE_HW_FLG_TX_DESC_ALIGN_1BYTE) - arge_tx_align = 1; - if (sc->arge_hw_flags & ARGE_HW_FLG_RX_DESC_ALIGN_1BYTE) - arge_rx_align = 1; - - /* Create parent DMA tag. */ - error = bus_dma_tag_create( - bus_get_dma_tag(sc->arge_dev), /* parent */ - 1, 0, /* alignment, boundary */ - BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, NULL, /* filter, filterarg */ - BUS_SPACE_MAXSIZE_32BIT, /* maxsize */ - 0, /* nsegments */ - BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ - 0, /* flags */ - NULL, NULL, /* lockfunc, lockarg */ - &sc->arge_cdata.arge_parent_tag); - if (error != 0) { - device_printf(sc->arge_dev, - "failed to create parent DMA tag\n"); - goto fail; - } - /* Create tag for Tx ring. */ - error = bus_dma_tag_create( - sc->arge_cdata.arge_parent_tag, /* parent */ - ARGE_RING_ALIGN, 0, /* alignment, boundary */ - BUS_SPACE_MAXADDR, /* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, NULL, /* filter, filterarg */ - ARGE_TX_DMA_SIZE, /* maxsize */ - 1, /* nsegments */ - ARGE_TX_DMA_SIZE, /* maxsegsize */ - 0, /* flags */ - NULL, NULL, /* lockfunc, lockarg */ - &sc->arge_cdata.arge_tx_ring_tag); - if (error != 0) { - device_printf(sc->arge_dev, - "failed to create Tx ring DMA tag\n"); - goto fail; - } - - /* Create tag for Rx ring. */ - error = bus_dma_tag_create( - sc->arge_cdata.arge_parent_tag, /* parent */ - ARGE_RING_ALIGN, 0, /* alignment, boundary */ - BUS_SPACE_MAXADDR, /* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, NULL, /* filter, filterarg */ - ARGE_RX_DMA_SIZE, /* maxsize */ - 1, /* nsegments */ - ARGE_RX_DMA_SIZE, /* maxsegsize */ - 0, /* flags */ - NULL, NULL, /* lockfunc, lockarg */ - &sc->arge_cdata.arge_rx_ring_tag); - if (error != 0) { - device_printf(sc->arge_dev, - "failed to create Rx ring DMA tag\n"); - goto fail; - } - - /* Create tag for Tx buffers. */ - error = bus_dma_tag_create( - sc->arge_cdata.arge_parent_tag, /* parent */ - arge_tx_align, 0, /* alignment, boundary */ - BUS_SPACE_MAXADDR, /* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, NULL, /* filter, filterarg */ - MCLBYTES * ARGE_MAXFRAGS, /* maxsize */ - ARGE_MAXFRAGS, /* nsegments */ - MCLBYTES, /* maxsegsize */ - 0, /* flags */ - NULL, NULL, /* lockfunc, lockarg */ - &sc->arge_cdata.arge_tx_tag); - if (error != 0) { - device_printf(sc->arge_dev, "failed to create Tx DMA tag\n"); - goto fail; - } - - /* Create tag for Rx buffers. */ - error = bus_dma_tag_create( - sc->arge_cdata.arge_parent_tag, /* parent */ - arge_rx_align, 0, /* alignment, boundary */ - BUS_SPACE_MAXADDR, /* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, NULL, /* filter, filterarg */ - MCLBYTES, /* maxsize */ - ARGE_MAXFRAGS, /* nsegments */ - MCLBYTES, /* maxsegsize */ - 0, /* flags */ - NULL, NULL, /* lockfunc, lockarg */ - &sc->arge_cdata.arge_rx_tag); - if (error != 0) { - device_printf(sc->arge_dev, "failed to create Rx DMA tag\n"); - goto fail; - } - - /* Allocate DMA'able memory and load the DMA map for Tx ring. */ - error = bus_dmamem_alloc(sc->arge_cdata.arge_tx_ring_tag, - (void **)&sc->arge_rdata.arge_tx_ring, BUS_DMA_WAITOK | - BUS_DMA_COHERENT | BUS_DMA_ZERO, - &sc->arge_cdata.arge_tx_ring_map); - if (error != 0) { - device_printf(sc->arge_dev, - "failed to allocate DMA'able memory for Tx ring\n"); - goto fail; - } - - ctx.arge_busaddr = 0; - error = bus_dmamap_load(sc->arge_cdata.arge_tx_ring_tag, - sc->arge_cdata.arge_tx_ring_map, sc->arge_rdata.arge_tx_ring, - ARGE_TX_DMA_SIZE, arge_dmamap_cb, &ctx, 0); - if (error != 0 || ctx.arge_busaddr == 0) { - device_printf(sc->arge_dev, - "failed to load DMA'able memory for Tx ring\n"); - goto fail; - } - sc->arge_rdata.arge_tx_ring_paddr = ctx.arge_busaddr; - - /* Allocate DMA'able memory and load the DMA map for Rx ring. */ - error = bus_dmamem_alloc(sc->arge_cdata.arge_rx_ring_tag, - (void **)&sc->arge_rdata.arge_rx_ring, BUS_DMA_WAITOK | - BUS_DMA_COHERENT | BUS_DMA_ZERO, - &sc->arge_cdata.arge_rx_ring_map); - if (error != 0) { - device_printf(sc->arge_dev, - "failed to allocate DMA'able memory for Rx ring\n"); - goto fail; - } - - ctx.arge_busaddr = 0; - error = bus_dmamap_load(sc->arge_cdata.arge_rx_ring_tag, - sc->arge_cdata.arge_rx_ring_map, sc->arge_rdata.arge_rx_ring, - ARGE_RX_DMA_SIZE, arge_dmamap_cb, &ctx, 0); - if (error != 0 || ctx.arge_busaddr == 0) { - device_printf(sc->arge_dev, - "failed to load DMA'able memory for Rx ring\n"); - goto fail; - } - sc->arge_rdata.arge_rx_ring_paddr = ctx.arge_busaddr; - - /* Create DMA maps for Tx buffers. */ - for (i = 0; i < ARGE_TX_RING_COUNT; i++) { - txd = &sc->arge_cdata.arge_txdesc[i]; - txd->tx_m = NULL; - txd->tx_dmamap = NULL; - error = bus_dmamap_create(sc->arge_cdata.arge_tx_tag, 0, - &txd->tx_dmamap); - if (error != 0) { - device_printf(sc->arge_dev, - "failed to create Tx dmamap\n"); - goto fail; - } - } - /* Create DMA maps for Rx buffers. */ - if ((error = bus_dmamap_create(sc->arge_cdata.arge_rx_tag, 0, - &sc->arge_cdata.arge_rx_sparemap)) != 0) { - device_printf(sc->arge_dev, - "failed to create spare Rx dmamap\n"); - goto fail; - } - for (i = 0; i < ARGE_RX_RING_COUNT; i++) { - rxd = &sc->arge_cdata.arge_rxdesc[i]; - rxd->rx_m = NULL; - rxd->rx_dmamap = NULL; - error = bus_dmamap_create(sc->arge_cdata.arge_rx_tag, 0, - &rxd->rx_dmamap); - if (error != 0) { - device_printf(sc->arge_dev, - "failed to create Rx dmamap\n"); - goto fail; - } - } - -fail: - return (error); -} - -static void -arge_dma_free(struct arge_softc *sc) -{ - struct arge_txdesc *txd; - struct arge_rxdesc *rxd; - int i; - - /* Tx ring. */ - if (sc->arge_cdata.arge_tx_ring_tag) { - if (sc->arge_rdata.arge_tx_ring_paddr) - bus_dmamap_unload(sc->arge_cdata.arge_tx_ring_tag, - sc->arge_cdata.arge_tx_ring_map); - if (sc->arge_rdata.arge_tx_ring) - bus_dmamem_free(sc->arge_cdata.arge_tx_ring_tag, - sc->arge_rdata.arge_tx_ring, - sc->arge_cdata.arge_tx_ring_map); - sc->arge_rdata.arge_tx_ring = NULL; - sc->arge_rdata.arge_tx_ring_paddr = 0; - bus_dma_tag_destroy(sc->arge_cdata.arge_tx_ring_tag); - sc->arge_cdata.arge_tx_ring_tag = NULL; - } - /* Rx ring. */ - if (sc->arge_cdata.arge_rx_ring_tag) { - if (sc->arge_rdata.arge_rx_ring_paddr) - bus_dmamap_unload(sc->arge_cdata.arge_rx_ring_tag, - sc->arge_cdata.arge_rx_ring_map); - if (sc->arge_rdata.arge_rx_ring) - bus_dmamem_free(sc->arge_cdata.arge_rx_ring_tag, - sc->arge_rdata.arge_rx_ring, - sc->arge_cdata.arge_rx_ring_map); - sc->arge_rdata.arge_rx_ring = NULL; - sc->arge_rdata.arge_rx_ring_paddr = 0; - bus_dma_tag_destroy(sc->arge_cdata.arge_rx_ring_tag); - sc->arge_cdata.arge_rx_ring_tag = NULL; - } - /* Tx buffers. */ - if (sc->arge_cdata.arge_tx_tag) { - for (i = 0; i < ARGE_TX_RING_COUNT; i++) { - txd = &sc->arge_cdata.arge_txdesc[i]; - if (txd->tx_dmamap) { - bus_dmamap_destroy(sc->arge_cdata.arge_tx_tag, - txd->tx_dmamap); - txd->tx_dmamap = NULL; - } - } - bus_dma_tag_destroy(sc->arge_cdata.arge_tx_tag); - sc->arge_cdata.arge_tx_tag = NULL; - } - /* Rx buffers. */ - if (sc->arge_cdata.arge_rx_tag) { - for (i = 0; i < ARGE_RX_RING_COUNT; i++) { - rxd = &sc->arge_cdata.arge_rxdesc[i]; - if (rxd->rx_dmamap) { - bus_dmamap_destroy(sc->arge_cdata.arge_rx_tag, - rxd->rx_dmamap); - rxd->rx_dmamap = NULL; - } - } - if (sc->arge_cdata.arge_rx_sparemap) { - bus_dmamap_destroy(sc->arge_cdata.arge_rx_tag, - sc->arge_cdata.arge_rx_sparemap); - sc->arge_cdata.arge_rx_sparemap = 0; - } - bus_dma_tag_destroy(sc->arge_cdata.arge_rx_tag); - sc->arge_cdata.arge_rx_tag = NULL; - } - - if (sc->arge_cdata.arge_parent_tag) { - bus_dma_tag_destroy(sc->arge_cdata.arge_parent_tag); - sc->arge_cdata.arge_parent_tag = NULL; - } -} - -/* - * Initialize the transmit descriptors. - */ -static int -arge_tx_ring_init(struct arge_softc *sc) -{ - struct arge_ring_data *rd; - struct arge_txdesc *txd; - bus_addr_t addr; - int i; - - sc->arge_cdata.arge_tx_prod = 0; - sc->arge_cdata.arge_tx_cons = 0; - sc->arge_cdata.arge_tx_cnt = 0; - - rd = &sc->arge_rdata; - bzero(rd->arge_tx_ring, sizeof(*rd->arge_tx_ring)); - for (i = 0; i < ARGE_TX_RING_COUNT; i++) { - if (i == ARGE_TX_RING_COUNT - 1) - addr = ARGE_TX_RING_ADDR(sc, 0); - else - addr = ARGE_TX_RING_ADDR(sc, i + 1); - rd->arge_tx_ring[i].packet_ctrl = ARGE_DESC_EMPTY; - rd->arge_tx_ring[i].next_desc = addr; - txd = &sc->arge_cdata.arge_txdesc[i]; - txd->tx_m = NULL; - } - - bus_dmamap_sync(sc->arge_cdata.arge_tx_ring_tag, - sc->arge_cdata.arge_tx_ring_map, - BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); - - return (0); -} - -/* - * Free the Tx ring, unload any pending dma transaction and free the mbuf. - */ -static void -arge_tx_ring_free(struct arge_softc *sc) -{ - struct arge_txdesc *txd; - int i; - - /* Free the Tx buffers. */ - for (i = 0; i < ARGE_TX_RING_COUNT; i++) { - txd = &sc->arge_cdata.arge_txdesc[i]; - if (txd->tx_dmamap) { - bus_dmamap_sync(sc->arge_cdata.arge_tx_tag, - txd->tx_dmamap, BUS_DMASYNC_POSTWRITE); - bus_dmamap_unload(sc->arge_cdata.arge_tx_tag, - txd->tx_dmamap); - } - if (txd->tx_m) - m_freem(txd->tx_m); - txd->tx_m = NULL; - } -} - -/* - * Initialize the RX descriptors and allocate mbufs for them. Note that - * we arrange the descriptors in a closed ring, so that the last descriptor - * points back to the first. - */ -static int -arge_rx_ring_init(struct arge_softc *sc) -{ - struct arge_ring_data *rd; - struct arge_rxdesc *rxd; - bus_addr_t addr; - int i; - - sc->arge_cdata.arge_rx_cons = 0; - - rd = &sc->arge_rdata; - bzero(rd->arge_rx_ring, sizeof(*rd->arge_rx_ring)); - for (i = 0; i < ARGE_RX_RING_COUNT; i++) { - rxd = &sc->arge_cdata.arge_rxdesc[i]; - if (rxd->rx_m != NULL) { - device_printf(sc->arge_dev, - "%s: ring[%d] rx_m wasn't free?\n", - __func__, - i); - } - rxd->rx_m = NULL; - rxd->desc = &rd->arge_rx_ring[i]; - if (i == ARGE_RX_RING_COUNT - 1) - addr = ARGE_RX_RING_ADDR(sc, 0); - else - addr = ARGE_RX_RING_ADDR(sc, i + 1); - rd->arge_rx_ring[i].next_desc = addr; - if (arge_newbuf(sc, i) != 0) { - return (ENOBUFS); - } - } - - bus_dmamap_sync(sc->arge_cdata.arge_rx_ring_tag, - sc->arge_cdata.arge_rx_ring_map, - BUS_DMASYNC_PREWRITE); - - return (0); -} - -/* - * Free all the buffers in the RX ring. - * - * TODO: ensure that DMA is disabled and no pending DMA - * is lurking in the FIFO. - */ -static void -arge_rx_ring_free(struct arge_softc *sc) -{ - int i; - struct arge_rxdesc *rxd; - - ARGE_LOCK_ASSERT(sc); - - for (i = 0; i < ARGE_RX_RING_COUNT; i++) { - rxd = &sc->arge_cdata.arge_rxdesc[i]; - /* Unmap the mbuf */ - if (rxd->rx_m != NULL) { - bus_dmamap_unload(sc->arge_cdata.arge_rx_tag, - rxd->rx_dmamap); - m_free(rxd->rx_m); - rxd->rx_m = NULL; - } - } -} - -/* - * Initialize an RX descriptor and attach an MBUF cluster. - */ -static int -arge_newbuf(struct arge_softc *sc, int idx) -{ - struct arge_desc *desc; - struct arge_rxdesc *rxd; - struct mbuf *m; - bus_dma_segment_t segs[1]; - bus_dmamap_t map; - int nsegs; - - /* XXX TODO: should just allocate an explicit 2KiB buffer */ - m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); - if (m == NULL) - return (ENOBUFS); - m->m_len = m->m_pkthdr.len = MCLBYTES; - - /* - * Add extra space to "adjust" (copy) the packet back to be aligned - * for purposes of IPv4/IPv6 header contents. - */ - if (sc->arge_hw_flags & ARGE_HW_FLG_RX_DESC_ALIGN_4BYTE) - m_adj(m, sizeof(uint64_t)); - /* - * If it's a 1-byte aligned buffer, then just offset it two bytes - * and that will give us a hopefully correctly DWORD aligned - * L3 payload - and we won't have to undo it afterwards. - */ - else if (sc->arge_hw_flags & ARGE_HW_FLG_RX_DESC_ALIGN_1BYTE) - m_adj(m, sizeof(uint16_t)); - - if (bus_dmamap_load_mbuf_sg(sc->arge_cdata.arge_rx_tag, - sc->arge_cdata.arge_rx_sparemap, m, segs, &nsegs, 0) != 0) { - m_freem(m); - return (ENOBUFS); - } - KASSERT(nsegs == 1, ("%s: %d segments returned!", __func__, nsegs)); - - rxd = &sc->arge_cdata.arge_rxdesc[idx]; - if (rxd->rx_m != NULL) { - bus_dmamap_unload(sc->arge_cdata.arge_rx_tag, rxd->rx_dmamap); - } - map = rxd->rx_dmamap; - rxd->rx_dmamap = sc->arge_cdata.arge_rx_sparemap; - sc->arge_cdata.arge_rx_sparemap = map; - rxd->rx_m = m; - desc = rxd->desc; - if ((sc->arge_hw_flags & ARGE_HW_FLG_RX_DESC_ALIGN_4BYTE) && - segs[0].ds_addr & 3) - panic("RX packet address unaligned"); - desc->packet_addr = segs[0].ds_addr; - desc->packet_ctrl = ARGE_DESC_EMPTY | ARGE_DMASIZE(segs[0].ds_len); - - bus_dmamap_sync(sc->arge_cdata.arge_rx_ring_tag, - sc->arge_cdata.arge_rx_ring_map, - BUS_DMASYNC_PREWRITE); - - return (0); -} - -/* - * Move the data backwards 16 bits to (hopefully!) ensure the - * IPv4/IPv6 payload is aligned. - * - * This is required for earlier hardware where the RX path - * requires DWORD aligned buffers. - */ -static __inline void -arge_fixup_rx(struct mbuf *m) -{ - int i; - uint16_t *src, *dst; - - src = mtod(m, uint16_t *); - dst = src - 1; - - for (i = 0; i < m->m_len / sizeof(uint16_t); i++) { - *dst++ = *src++; - } - - if (m->m_len % sizeof(uint16_t)) - *(uint8_t *)dst = *(uint8_t *)src; - - m->m_data -= ETHER_ALIGN; -} - -#ifdef DEVICE_POLLING -static int -arge_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) -{ - struct arge_softc *sc = ifp->if_softc; - int rx_npkts = 0; - - if (ifp->if_drv_flags & IFF_DRV_RUNNING) { - ARGE_LOCK(sc); - arge_tx_locked(sc); - rx_npkts = arge_rx_locked(sc); - ARGE_UNLOCK(sc); - } - - return (rx_npkts); -} -#endif /* DEVICE_POLLING */ - -static void -arge_tx_locked(struct arge_softc *sc) -{ - struct arge_txdesc *txd; - struct arge_desc *cur_tx; - struct ifnet *ifp; - uint32_t ctrl; - int cons, prod; - - ARGE_LOCK_ASSERT(sc); - - cons = sc->arge_cdata.arge_tx_cons; - prod = sc->arge_cdata.arge_tx_prod; - - ARGEDEBUG(sc, ARGE_DBG_TX, "%s: cons=%d, prod=%d\n", __func__, cons, - prod); - - if (cons == prod) - return; - - bus_dmamap_sync(sc->arge_cdata.arge_tx_ring_tag, - sc->arge_cdata.arge_tx_ring_map, - BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); - - ifp = sc->arge_ifp; - /* - * Go through our tx list and free mbufs for those - * frames that have been transmitted. - */ - for (; cons != prod; ARGE_INC(cons, ARGE_TX_RING_COUNT)) { - cur_tx = &sc->arge_rdata.arge_tx_ring[cons]; - ctrl = cur_tx->packet_ctrl; - /* Check if descriptor has "finished" flag */ - if ((ctrl & ARGE_DESC_EMPTY) == 0) - break; - - ARGE_WRITE(sc, AR71XX_DMA_TX_STATUS, DMA_TX_STATUS_PKT_SENT); - - sc->arge_cdata.arge_tx_cnt--; - ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; - - txd = &sc->arge_cdata.arge_txdesc[cons]; - - if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); - - bus_dmamap_sync(sc->arge_cdata.arge_tx_tag, txd->tx_dmamap, - BUS_DMASYNC_POSTWRITE); - bus_dmamap_unload(sc->arge_cdata.arge_tx_tag, txd->tx_dmamap); - - /* Free only if it's first descriptor in list */ - if (txd->tx_m) - m_freem(txd->tx_m); - txd->tx_m = NULL; - - /* reset descriptor */ - cur_tx->packet_addr = 0; - } - - sc->arge_cdata.arge_tx_cons = cons; - - bus_dmamap_sync(sc->arge_cdata.arge_tx_ring_tag, - sc->arge_cdata.arge_tx_ring_map, BUS_DMASYNC_PREWRITE); -} - -static int -arge_rx_locked(struct arge_softc *sc) -{ - struct arge_rxdesc *rxd; - struct ifnet *ifp = sc->arge_ifp; - int cons, prog, packet_len, i; - struct arge_desc *cur_rx; - struct mbuf *m; - int rx_npkts = 0; - - ARGE_LOCK_ASSERT(sc); - - cons = sc->arge_cdata.arge_rx_cons; - - bus_dmamap_sync(sc->arge_cdata.arge_rx_ring_tag, - sc->arge_cdata.arge_rx_ring_map, - BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); - - for (prog = 0; prog < ARGE_RX_RING_COUNT; - ARGE_INC(cons, ARGE_RX_RING_COUNT)) { - cur_rx = &sc->arge_rdata.arge_rx_ring[cons]; - rxd = &sc->arge_cdata.arge_rxdesc[cons]; - m = rxd->rx_m; - - if ((cur_rx->packet_ctrl & ARGE_DESC_EMPTY) != 0) - break; - - ARGE_WRITE(sc, AR71XX_DMA_RX_STATUS, DMA_RX_STATUS_PKT_RECVD); - - prog++; - - packet_len = ARGE_DMASIZE(cur_rx->packet_ctrl); - bus_dmamap_sync(sc->arge_cdata.arge_rx_tag, rxd->rx_dmamap, - BUS_DMASYNC_POSTREAD); - m = rxd->rx_m; - - /* - * If the MAC requires 4 byte alignment then the RX setup - * routine will have pre-offset things; so un-offset it here. - */ - if (sc->arge_hw_flags & ARGE_HW_FLG_RX_DESC_ALIGN_4BYTE) - arge_fixup_rx(m); - - m->m_pkthdr.rcvif = ifp; - /* Skip 4 bytes of CRC */ - m->m_pkthdr.len = m->m_len = packet_len - ETHER_CRC_LEN; - if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1); - rx_npkts++; - - ARGE_UNLOCK(sc); - (*ifp->if_input)(ifp, m); - ARGE_LOCK(sc); - cur_rx->packet_addr = 0; - } - - if (prog > 0) { - i = sc->arge_cdata.arge_rx_cons; - for (; prog > 0 ; prog--) { - if (arge_newbuf(sc, i) != 0) { - device_printf(sc->arge_dev, - "Failed to allocate buffer\n"); - break; - } - ARGE_INC(i, ARGE_RX_RING_COUNT); - } - - bus_dmamap_sync(sc->arge_cdata.arge_rx_ring_tag, - sc->arge_cdata.arge_rx_ring_map, - BUS_DMASYNC_PREWRITE); - - sc->arge_cdata.arge_rx_cons = cons; - } - - return (rx_npkts); -} - -static int -arge_intr_filter(void *arg) -{ - struct arge_softc *sc = arg; - uint32_t status, ints; - - status = ARGE_READ(sc, AR71XX_DMA_INTR_STATUS); - ints = ARGE_READ(sc, AR71XX_DMA_INTR); - - ARGEDEBUG(sc, ARGE_DBG_INTR, "int mask(filter) = %b\n", ints, - "\20\10RX_BUS_ERROR\7RX_OVERFLOW\5RX_PKT_RCVD" - "\4TX_BUS_ERROR\2TX_UNDERRUN\1TX_PKT_SENT"); - ARGEDEBUG(sc, ARGE_DBG_INTR, "status(filter) = %b\n", status, - "\20\10RX_BUS_ERROR\7RX_OVERFLOW\5RX_PKT_RCVD" - "\4TX_BUS_ERROR\2TX_UNDERRUN\1TX_PKT_SENT"); - - if (status & DMA_INTR_ALL) { - sc->arge_intr_status |= status; - ARGE_WRITE(sc, AR71XX_DMA_INTR, 0); - sc->stats.intr_ok++; - return (FILTER_SCHEDULE_THREAD); - } - - sc->arge_intr_status = 0; - sc->stats.intr_stray++; - return (FILTER_STRAY); -} - -static void -arge_intr(void *arg) -{ - struct arge_softc *sc = arg; - uint32_t status; - struct ifnet *ifp = sc->arge_ifp; -#ifdef ARGE_DEBUG - int i; -#endif - - status = ARGE_READ(sc, AR71XX_DMA_INTR_STATUS); - status |= sc->arge_intr_status; - - ARGEDEBUG(sc, ARGE_DBG_INTR, "int status(intr) = %b\n", status, - "\20\10\7RX_OVERFLOW\5RX_PKT_RCVD" - "\4TX_BUS_ERROR\2TX_UNDERRUN\1TX_PKT_SENT"); - - /* - * Is it our interrupt at all? - */ - if (status == 0) { - sc->stats.intr_stray2++; - return; - } - -#ifdef ARGE_DEBUG - for (i = 0; i < 32; i++) { - if (status & (1U << i)) { - sc->intr_stats.count[i]++; - } - } -#endif - - if (status & DMA_INTR_RX_BUS_ERROR) { - ARGE_WRITE(sc, AR71XX_DMA_RX_STATUS, DMA_RX_STATUS_BUS_ERROR); - device_printf(sc->arge_dev, "RX bus error"); - return; - } - - if (status & DMA_INTR_TX_BUS_ERROR) { - ARGE_WRITE(sc, AR71XX_DMA_TX_STATUS, DMA_TX_STATUS_BUS_ERROR); - device_printf(sc->arge_dev, "TX bus error"); - return; - } - - ARGE_LOCK(sc); - arge_flush_ddr(sc); - - if (status & DMA_INTR_RX_PKT_RCVD) - arge_rx_locked(sc); - - /* - * RX overrun disables the receiver. - * Clear indication and re-enable rx. - */ - if ( status & DMA_INTR_RX_OVERFLOW) { - ARGE_WRITE(sc, AR71XX_DMA_RX_STATUS, DMA_RX_STATUS_OVERFLOW); - ARGE_WRITE(sc, AR71XX_DMA_RX_CONTROL, DMA_RX_CONTROL_EN); - sc->stats.rx_overflow++; - } - - if (status & DMA_INTR_TX_PKT_SENT) - arge_tx_locked(sc); - /* - * Underrun turns off TX. Clear underrun indication. - * If there's anything left in the ring, reactivate the tx. - */ - if (status & DMA_INTR_TX_UNDERRUN) { - ARGE_WRITE(sc, AR71XX_DMA_TX_STATUS, DMA_TX_STATUS_UNDERRUN); - sc->stats.tx_underflow++; - ARGEDEBUG(sc, ARGE_DBG_TX, "%s: TX underrun; tx_cnt=%d\n", - __func__, sc->arge_cdata.arge_tx_cnt); - if (sc->arge_cdata.arge_tx_cnt > 0 ) { - ARGE_WRITE(sc, AR71XX_DMA_TX_CONTROL, - DMA_TX_CONTROL_EN); - } - } - - /* - * If we've finished RX /or/ TX and there's space for more packets - * to be queued for TX, do so. Otherwise we may end up in a - * situation where the interface send queue was filled - * whilst the hardware queue was full, then the hardware - * queue was drained by the interface send queue wasn't, - * and thus if_start() is never called to kick-start - * the send process (and all subsequent packets are simply - * discarded. - * - * XXX TODO: make sure that the hardware deals nicely - * with the possibility of the queue being enabled above - * after a TX underrun, then having the hardware queue added - * to below. - */ - if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0) { - if (!IFQ_IS_EMPTY(&ifp->if_snd)) - arge_start_locked(ifp); - } - - /* - * We handled all bits, clear status - */ - sc->arge_intr_status = 0; - ARGE_UNLOCK(sc); - /* - * re-enable all interrupts - */ - ARGE_WRITE(sc, AR71XX_DMA_INTR, DMA_INTR_ALL); -} - -static void -arge_tick(void *xsc) -{ - struct arge_softc *sc = xsc; - struct mii_data *mii; - - ARGE_LOCK_ASSERT(sc); - - if (sc->arge_miibus) { - mii = device_get_softc(sc->arge_miibus); - mii_tick(mii); - callout_reset(&sc->arge_stat_callout, hz, arge_tick, sc); - } -} - -int -arge_multiphy_mediachange(struct ifnet *ifp) -{ - struct arge_softc *sc = ifp->if_softc; - struct ifmedia *ifm = &sc->arge_ifmedia; - struct ifmedia_entry *ife = ifm->ifm_cur; - - if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) - return (EINVAL); - - if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { - device_printf(sc->arge_dev, - "AUTO is not supported for multiphy MAC"); - return (EINVAL); - } - - /* - * Ignore everything - */ - return (0); -} - -void -arge_multiphy_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr) -{ - struct arge_softc *sc = ifp->if_softc; - - ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE; - ifmr->ifm_active = IFM_ETHER | sc->arge_media_type | - sc->arge_duplex_mode; -} - -#if defined(ARGE_MDIO) -static int -argemdio_probe(device_t dev) -{ - device_set_desc(dev, "Atheros AR71xx built-in ethernet interface, MDIO controller"); - return (0); -} - -static int -argemdio_attach(device_t dev) -{ - struct arge_softc *sc; - int error = 0; -#ifdef ARGE_DEBUG - struct sysctl_ctx_list *ctx; - struct sysctl_oid *tree; -#endif - sc = device_get_softc(dev); - sc->arge_dev = dev; - sc->arge_mac_unit = device_get_unit(dev); - sc->arge_rid = 0; - sc->arge_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->arge_rid, RF_ACTIVE | RF_SHAREABLE); - if (sc->arge_res == NULL) { - device_printf(dev, "couldn't map memory\n"); - error = ENXIO; - goto fail; - } - -#ifdef ARGE_DEBUG - ctx = device_get_sysctl_ctx(dev); - tree = device_get_sysctl_tree(dev); - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "debug", CTLFLAG_RW, &sc->arge_debug, 0, - "argemdio interface debugging flags"); -#endif - - /* Reset MAC - required for AR71xx MDIO to successfully occur */ - arge_reset_mac(sc); - /* Reset MII bus */ - arge_reset_miibus(sc); - - bus_generic_probe(dev); - bus_enumerate_hinted_children(dev); - error = bus_generic_attach(dev); -fail: - return (error); -} - -static int -argemdio_detach(device_t dev) -{ - return (0); -} - -#endif diff --git a/sys/mips/atheros/if_argevar.h b/sys/mips/atheros/if_argevar.h deleted file mode 100644 index a81a8791f8e..00000000000 --- a/sys/mips/atheros/if_argevar.h +++ /dev/null @@ -1,220 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef __IF_ARGEVAR_H__ -#define __IF_ARGEVAR_H__ - -#define ARGE_NPHY 32 -#define ARGE_TX_RING_COUNT 128 -#define ARGE_RX_RING_COUNT 128 -#define ARGE_RX_DMA_SIZE ARGE_RX_RING_COUNT * sizeof(struct arge_desc) -#define ARGE_TX_DMA_SIZE ARGE_TX_RING_COUNT * sizeof(struct arge_desc) -#define ARGE_MAXFRAGS 8 -#define ARGE_RING_ALIGN sizeof(struct arge_desc) -#define ARGE_RX_ALIGN_4BYTE sizeof(uint32_t) -#define ARGE_RX_ALIGN_1BYTE sizeof(char) -#define ARGE_TX_ALIGN_4BYTE sizeof(uint32_t) -#define ARGE_TX_ALIGN_1BYTE sizeof(char) -#define ARGE_MAXFRAGS 8 -#define ARGE_TX_RING_ADDR(sc, i) \ - ((sc)->arge_rdata.arge_tx_ring_paddr + sizeof(struct arge_desc) * (i)) -#define ARGE_RX_RING_ADDR(sc, i) \ - ((sc)->arge_rdata.arge_rx_ring_paddr + sizeof(struct arge_desc) * (i)) -#define ARGE_INC(x,y) (x) = (((x) + 1) % y) - -#define ARGE_MII_TIMEOUT 1000 - -#define ARGE_LOCK(_sc) mtx_lock(&(_sc)->arge_mtx) -#define ARGE_UNLOCK(_sc) mtx_unlock(&(_sc)->arge_mtx) -#define ARGE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->arge_mtx, MA_OWNED) - -/* - * register space access macros - */ -#define ARGE_BARRIER_READ(sc) bus_barrier(sc->arge_res, 0, 0, \ - BUS_SPACE_BARRIER_READ) -#define ARGE_BARRIER_WRITE(sc) bus_barrier(sc->arge_res, 0, 0, \ - BUS_SPACE_BARRIER_WRITE) -#define ARGE_BARRIER_RW(sc) bus_barrier(sc->arge_res, 0, 0, \ - BUS_SPACE_BARRIER_READ | \ - BUS_SPACE_BARRIER_WRITE) -#define ARGE_WRITE(sc, reg, val) do { \ - bus_write_4(sc->arge_res, (reg), (val)); \ - ARGE_BARRIER_WRITE((sc)); \ - ARGE_READ((sc), (reg)); \ - } while (0) -#define ARGE_READ(sc, reg) bus_read_4(sc->arge_res, (reg)) - -#define ARGE_SET_BITS(sc, reg, bits) \ - ARGE_WRITE(sc, reg, ARGE_READ(sc, (reg)) | (bits)) - -#define ARGE_CLEAR_BITS(sc, reg, bits) \ - ARGE_WRITE(sc, reg, ARGE_READ(sc, (reg)) & ~(bits)) - -/* - * The linux driver code for the MDIO bus does a read-after-write - * which seems to be required on MIPS74k platforms for correct - * behaviour. - * - * So, ARGE_WRITE() does the write + barrier, and the following - * ARGE_READ() seems to flush the thing all the way through the device - * FIFO(s) before we continue issuing MDIO bus updates. - */ -#define ARGE_MDIO_WRITE(_sc, _reg, _val) \ - ARGE_WRITE((_sc), (_reg), (_val)) -#define ARGE_MDIO_READ(_sc, _reg) \ - ARGE_READ((_sc), (_reg)) -#define ARGE_MDIO_BARRIER_READ(_sc) ARGE_BARRIER_READ(_sc) -#define ARGE_MDIO_BARRIER_WRITE(_sc) ARGE_BARRIER_WRITE(_sc) -#define ARGE_MDIO_BARRIER_RW(_sc) ARGE_BARRIER_RW(_sc) - -#define ARGE_DESC_EMPTY (1U << 31) -#define ARGE_DESC_MORE (1 << 24) -#define ARGE_DESC_SIZE_MASK ((1 << 12) - 1) -#define ARGE_DMASIZE(len) ((len) & ARGE_DESC_SIZE_MASK) -struct arge_desc { - uint32_t packet_addr; - uint32_t packet_ctrl; - uint32_t next_desc; - uint32_t padding; -}; - -struct arge_txdesc { - struct mbuf *tx_m; - bus_dmamap_t tx_dmamap; -}; - -struct arge_rxdesc { - struct mbuf *rx_m; - bus_dmamap_t rx_dmamap; - struct arge_desc *desc; -}; - -struct arge_chain_data { - bus_dma_tag_t arge_parent_tag; - bus_dma_tag_t arge_tx_tag; - struct arge_txdesc arge_txdesc[ARGE_TX_RING_COUNT]; - bus_dma_tag_t arge_rx_tag; - struct arge_rxdesc arge_rxdesc[ARGE_RX_RING_COUNT]; - bus_dma_tag_t arge_tx_ring_tag; - bus_dma_tag_t arge_rx_ring_tag; - bus_dmamap_t arge_tx_ring_map; - bus_dmamap_t arge_rx_ring_map; - bus_dmamap_t arge_rx_sparemap; - int arge_tx_prod; - int arge_tx_cons; - int arge_tx_cnt; - int arge_rx_cons; -}; - -struct arge_ring_data { - struct arge_desc *arge_rx_ring; - struct arge_desc *arge_tx_ring; - bus_addr_t arge_rx_ring_paddr; - bus_addr_t arge_tx_ring_paddr; -}; - -/* - * Allow PLL values to be overridden. - */ -struct arge_pll_data { - uint32_t pll_10; - uint32_t pll_100; - uint32_t pll_1000; -}; - -/* - * Hardware specific behaviours. - */ - -/* - * Older chips support 4 byte only transmit and receive - * addresses. - * - * Later chips support arbitrary TX and later later, - * arbitrary RX addresses. - */ -#define ARGE_HW_FLG_TX_DESC_ALIGN_4BYTE 0x00000001 -#define ARGE_HW_FLG_RX_DESC_ALIGN_4BYTE 0x00000002 -#define ARGE_HW_FLG_TX_DESC_ALIGN_1BYTE 0x00000004 -#define ARGE_HW_FLG_RX_DESC_ALIGN_1BYTE 0x00000008 - -struct arge_softc { - struct ifnet *arge_ifp; /* interface info */ - device_t arge_dev; - struct ifmedia arge_ifmedia; - /* - * Media & duples settings for multiPHY MAC - */ - uint32_t arge_media_type; - uint32_t arge_duplex_mode; - uint32_t arge_phymask; - uint8_t arge_eaddr[ETHER_ADDR_LEN]; - struct resource *arge_res; - int arge_rid; - struct resource *arge_irq; - void *arge_intrhand; - device_t arge_miibus; - device_t arge_miiproxy; - ar71xx_mii_mode arge_miicfg; - struct arge_pll_data arge_pllcfg; - bus_dma_tag_t arge_parent_tag; - bus_dma_tag_t arge_tag; - struct mtx arge_mtx; - struct callout arge_stat_callout; - struct task arge_link_task; - struct arge_chain_data arge_cdata; - struct arge_ring_data arge_rdata; - int arge_link_status; - int arge_detach; - uint32_t arge_intr_status; - int arge_mac_unit; - int arge_if_flags; - uint32_t arge_hw_flags; - uint32_t arge_debug; - uint32_t arge_mdiofreq; - struct { - uint32_t tx_pkts_unaligned; - uint32_t tx_pkts_unaligned_start; - uint32_t tx_pkts_unaligned_len; - uint32_t tx_pkts_unaligned_tooshort; - uint32_t tx_pkts_nosegs; - uint32_t tx_pkts_aligned; - uint32_t rx_overflow; - uint32_t tx_underflow; - uint32_t intr_stray; - uint32_t intr_stray2; - uint32_t intr_ok; - } stats; - struct { - uint32_t count[32]; - } intr_stats; -}; - -#endif /* __IF_ARGEVAR_H__ */ diff --git a/sys/mips/atheros/pcf2123_rtc.c b/sys/mips/atheros/pcf2123_rtc.c deleted file mode 100644 index e3f1ff7945a..00000000000 --- a/sys/mips/atheros/pcf2123_rtc.c +++ /dev/null @@ -1,204 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include "spibus_if.h" - -#include "clock_if.h" - -#define YEAR_BASE 1970 -#define PCF2123_DELAY 50 - -struct pcf2123_rtc_softc { - device_t dev; -}; - -static int pcf2123_rtc_probe(device_t dev); -static int pcf2123_rtc_attach(device_t dev); - -static int pcf2123_rtc_gettime(device_t dev, struct timespec *ts); -static int pcf2123_rtc_settime(device_t dev, struct timespec *ts); - -static int -pcf2123_rtc_probe(device_t dev) -{ - - device_set_desc(dev, "PCF2123 SPI RTC"); - return (0); -} - -static int -pcf2123_rtc_attach(device_t dev) -{ - struct pcf2123_rtc_softc *sc; - struct spi_command cmd; - unsigned char rxBuf[3]; - unsigned char txBuf[3]; - int err; - - sc = device_get_softc(dev); - sc->dev = dev; - - clock_register(dev, 1000000); - - memset(&cmd, 0, sizeof(cmd)); - memset(rxBuf, 0, sizeof(rxBuf)); - memset(txBuf, 0, sizeof(txBuf)); - - /* Make sure Ctrl1 and Ctrl2 are zeroes */ - txBuf[0] = PCF2123_WRITE(PCF2123_REG_CTRL1); - cmd.rx_cmd = rxBuf; - cmd.tx_cmd = txBuf; - cmd.rx_cmd_sz = sizeof(rxBuf); - cmd.tx_cmd_sz = sizeof(txBuf); - err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); - DELAY(PCF2123_DELAY); - - return (0); -} - -static int -pcf2123_rtc_gettime(device_t dev, struct timespec *ts) -{ - struct clocktime ct; - struct spi_command cmd; - unsigned char rxTimedate[8]; - unsigned char txTimedate[8]; - int err; - - memset(&cmd, 0, sizeof(cmd)); - memset(rxTimedate, 0, sizeof(rxTimedate)); - memset(txTimedate, 0, sizeof(txTimedate)); - - /* - * Counter is stopped when access to time registers is in progress - * So there is no need to stop/start counter - */ - /* Start reading from seconds */ - txTimedate[0] = PCF2123_READ(PCF2123_REG_SECONDS); - cmd.rx_cmd = rxTimedate; - cmd.tx_cmd = txTimedate; - cmd.rx_cmd_sz = sizeof(rxTimedate); - cmd.tx_cmd_sz = sizeof(txTimedate); - err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); - DELAY(PCF2123_DELAY); - - ct.nsec = 0; - ct.sec = FROMBCD(rxTimedate[1] & 0x7f); - ct.min = FROMBCD(rxTimedate[2] & 0x7f); - ct.hour = FROMBCD(rxTimedate[3] & 0x3f); - - ct.dow = FROMBCD(rxTimedate[5] & 0x3f); - - ct.day = FROMBCD(rxTimedate[4] & 0x3f); - ct.mon = FROMBCD(rxTimedate[6] & 0x1f); - ct.year = YEAR_BASE + FROMBCD(rxTimedate[7]); - - return (clock_ct_to_ts(&ct, ts)); -} - -static int -pcf2123_rtc_settime(device_t dev, struct timespec *ts) -{ - struct clocktime ct; - struct pcf2123_rtc_softc *sc; - struct spi_command cmd; - unsigned char rxTimedate[8]; - unsigned char txTimedate[8]; - int err; - - sc = device_get_softc(dev); - - /* Resolution: 1 sec */ - if (ts->tv_nsec >= 500000000) - ts->tv_sec++; - ts->tv_nsec = 0; - clock_ts_to_ct(ts, &ct); - - memset(&cmd, 0, sizeof(cmd)); - memset(rxTimedate, 0, sizeof(rxTimedate)); - memset(txTimedate, 0, sizeof(txTimedate)); - - /* Start reading from seconds */ - cmd.rx_cmd = rxTimedate; - cmd.tx_cmd = txTimedate; - cmd.rx_cmd_sz = sizeof(rxTimedate); - cmd.tx_cmd_sz = sizeof(txTimedate); - - /* - * Counter is stopped when access to time registers is in progress - * So there is no need to stop/start counter - */ - txTimedate[0] = PCF2123_WRITE(PCF2123_REG_SECONDS); - txTimedate[1] = TOBCD(ct.sec); - txTimedate[2] = TOBCD(ct.min); - txTimedate[3] = TOBCD(ct.hour); - txTimedate[4] = TOBCD(ct.day); - txTimedate[5] = TOBCD(ct.dow); - txTimedate[6] = TOBCD(ct.mon); - txTimedate[7] = TOBCD(ct.year - YEAR_BASE); - - err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); - DELAY(PCF2123_DELAY); - - return (err); -} - -static device_method_t pcf2123_rtc_methods[] = { - DEVMETHOD(device_probe, pcf2123_rtc_probe), - DEVMETHOD(device_attach, pcf2123_rtc_attach), - - DEVMETHOD(clock_gettime, pcf2123_rtc_gettime), - DEVMETHOD(clock_settime, pcf2123_rtc_settime), - - { 0, 0 }, -}; - -static driver_t pcf2123_rtc_driver = { - "rtc", - pcf2123_rtc_methods, - sizeof(struct pcf2123_rtc_softc), -}; -static devclass_t pcf2123_rtc_devclass; - -DRIVER_MODULE(pcf2123_rtc, spibus, pcf2123_rtc_driver, pcf2123_rtc_devclass, 0, 0); diff --git a/sys/mips/atheros/pcf2123reg.h b/sys/mips/atheros/pcf2123reg.h deleted file mode 100644 index 7939b15ddee..00000000000 --- a/sys/mips/atheros/pcf2123reg.h +++ /dev/null @@ -1,67 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef __PCF2123REG_H__ -#define __PCF2123REG_H__ - -/* Control and status */ -#define PCF2123_REG_CTRL1 0x0 -#define PCF2123_REG_CTRL2 0x1 - -/* Time and date */ -#define PCF2123_REG_SECONDS 0x2 -#define PCF2123_REG_MINUTES 0x3 -#define PCF2123_REG_HOURS 0x4 -#define PCF2123_REG_DAYS 0x5 -#define PCF2123_REG_WEEKDAYS 0x6 -#define PCF2123_REG_MONTHS 0x7 -#define PCF2123_REG_YEARS 0x8 - -/* Alarm registers */ -#define PCF2123_REG_MINUTE_ALARM 0x9 -#define PCF2123_REG_HOUR_ALARM 0xA -#define PCF2123_REG_DAY_ALARM 0xB -#define PCF2123_REG_WEEKDAY_ALARM 0xC - -/* Offset */ -#define PCF2123_REG_OFFSET 0xD - -/* Timer */ -#define PCF2123_REG_TIMER_CLKOUT 0xE -#define PCF2123_REG_COUNTDOWN_TIMER 0xF - -/* Commands */ -#define PCF2123_CMD_READ (1 << 7) -#define PCF2123_CMD_WRITE (0 << 7) - -#define PCF2123_READ(reg) (PCF2123_CMD_READ | (1 << 4) | (reg)) -#define PCF2123_WRITE(reg) (PCF2123_CMD_WRITE | (1 << 4) | (reg)) - -#endif /* __PCF2123REG_H__ */ diff --git a/sys/mips/atheros/qca953x_chip.c b/sys/mips/atheros/qca953x_chip.c deleted file mode 100644 index a3c639782d9..00000000000 --- a/sys/mips/atheros/qca953x_chip.c +++ /dev/null @@ -1,391 +0,0 @@ -/*- - * Copyright (c) 2015 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include - -#include - -static void -qca953x_chip_detect_mem_size(void) -{ -} - -static void -qca953x_chip_detect_sys_frequency(void) -{ - unsigned long ref_rate; - unsigned long cpu_rate; - unsigned long ddr_rate; - unsigned long ahb_rate; - uint32_t pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; - uint32_t cpu_pll, ddr_pll; - uint32_t bootstrap; - - bootstrap = ATH_READ_REG(QCA953X_RESET_REG_BOOTSTRAP); - if (bootstrap & QCA953X_BOOTSTRAP_REF_CLK_40) - ref_rate = 40 * 1000 * 1000; - else - ref_rate = 25 * 1000 * 1000; - - pll = ATH_READ_REG(QCA953X_PLL_CPU_CONFIG_REG); - out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & - QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK; - ref_div = (pll >> QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT) & - QCA953X_PLL_CPU_CONFIG_REFDIV_MASK; - nint = (pll >> QCA953X_PLL_CPU_CONFIG_NINT_SHIFT) & - QCA953X_PLL_CPU_CONFIG_NINT_MASK; - frac = (pll >> QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT) & - QCA953X_PLL_CPU_CONFIG_NFRAC_MASK; - - cpu_pll = nint * ref_rate / ref_div; - cpu_pll += frac * (ref_rate >> 6) / ref_div; - cpu_pll /= (1 << out_div); - - pll = ATH_READ_REG(QCA953X_PLL_DDR_CONFIG_REG); - out_div = (pll >> QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & - QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK; - ref_div = (pll >> QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT) & - QCA953X_PLL_DDR_CONFIG_REFDIV_MASK; - nint = (pll >> QCA953X_PLL_DDR_CONFIG_NINT_SHIFT) & - QCA953X_PLL_DDR_CONFIG_NINT_MASK; - frac = (pll >> QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT) & - QCA953X_PLL_DDR_CONFIG_NFRAC_MASK; - - ddr_pll = nint * ref_rate / ref_div; - ddr_pll += frac * (ref_rate >> 6) / (ref_div << 4); - ddr_pll /= (1 << out_div); - - clk_ctrl = ATH_READ_REG(QCA953X_PLL_CLK_CTRL_REG); - - postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & - QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; - - if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS) - cpu_rate = ref_rate; - else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL) - cpu_rate = cpu_pll / (postdiv + 1); - else - cpu_rate = ddr_pll / (postdiv + 1); - - postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & - QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK; - - if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS) - ddr_rate = ref_rate; - else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL) - ddr_rate = ddr_pll / (postdiv + 1); - else - ddr_rate = cpu_pll / (postdiv + 1); - - postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & - QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK; - - if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS) - ahb_rate = ref_rate; - else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL) - ahb_rate = ddr_pll / (postdiv + 1); - else - ahb_rate = cpu_pll / (postdiv + 1); - - u_ar71xx_ddr_freq = ddr_rate; - u_ar71xx_cpu_freq = cpu_rate; - u_ar71xx_ahb_freq = ahb_rate; - - u_ar71xx_wdt_freq = ref_rate; - u_ar71xx_uart_freq = ref_rate; - u_ar71xx_mdio_freq = ref_rate; - u_ar71xx_refclk = ref_rate; -} - -static void -qca953x_chip_device_stop(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(QCA953X_RESET_REG_RESET_MODULE); - ATH_WRITE_REG(QCA953X_RESET_REG_RESET_MODULE, reg | mask); -} - -static void -qca953x_chip_device_start(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(QCA953X_RESET_REG_RESET_MODULE); - ATH_WRITE_REG(QCA953X_RESET_REG_RESET_MODULE, reg & ~mask); -} - -static int -qca953x_chip_device_stopped(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(QCA953X_RESET_REG_RESET_MODULE); - return ((reg & mask) == mask); -} - -static void -qca953x_chip_set_mii_speed(uint32_t unit, uint32_t speed) -{ - - /* XXX TODO */ - return; -} - -static void -qca953x_chip_set_pll_ge(int unit, int speed, uint32_t pll) -{ - switch (unit) { - case 0: - ATH_WRITE_REG(QCA953X_PLL_ETH_XMII_CONTROL_REG, pll); - break; - case 1: - /* nothing */ - break; - default: - printf("%s: invalid PLL set for arge unit: %d\n", - __func__, unit); - return; - } -} - -static void -qca953x_chip_ddr_flush(ar71xx_flush_ddr_id_t id) -{ - - switch (id) { - case AR71XX_CPU_DDR_FLUSH_GE0: - ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_GE0); - break; - case AR71XX_CPU_DDR_FLUSH_GE1: - ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_GE1); - break; - case AR71XX_CPU_DDR_FLUSH_USB: - ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_USB); - break; - case AR71XX_CPU_DDR_FLUSH_PCIE: - ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_PCIE); - break; - case AR71XX_CPU_DDR_FLUSH_WMAC: - ar71xx_ddr_flush(QCA953X_DDR_REG_FLUSH_WMAC); - break; - default: - printf("%s: invalid flush (%d)\n", __func__, id); - } -} - -static uint32_t -qca953x_chip_get_eth_pll(unsigned int mac, int speed) -{ - uint32_t pll; - - switch (speed) { - case 10: - pll = QCA953X_PLL_VAL_10; - break; - case 100: - pll = QCA953X_PLL_VAL_100; - break; - case 1000: - pll = QCA953X_PLL_VAL_1000; - break; - default: - printf("%s%d: invalid speed %d\n", __func__, mac, speed); - pll = 0; - } - return (pll); -} - -static void -qca953x_chip_reset_ethernet_switch(void) -{ -} - -static void -qca953x_configure_gmac(uint32_t gmac_cfg) -{ - uint32_t reg; - - reg = ATH_READ_REG(QCA953X_GMAC_REG_ETH_CFG); - printf("%s: ETH_CFG=0x%08x\n", __func__, reg); - reg &= ~(QCA953X_ETH_CFG_SW_ONLY_MODE | - QCA953X_ETH_CFG_SW_PHY_SWAP | - QCA953X_ETH_CFG_SW_APB_ACCESS | - QCA953X_ETH_CFG_SW_ACC_MSB_FIRST); - - reg |= gmac_cfg; - ATH_WRITE_REG(QCA953X_GMAC_REG_ETH_CFG, reg); -} - -static void -qca953x_chip_init_usb_peripheral(void) -{ - uint32_t bootstrap; - - bootstrap = ATH_READ_REG(QCA953X_RESET_REG_BOOTSTRAP); - - ar71xx_device_stop(QCA953X_RESET_USBSUS_OVERRIDE); - DELAY(1000); - - ar71xx_device_start(QCA953X_RESET_USB_PHY); - DELAY(1000); - - ar71xx_device_start(QCA953X_RESET_USB_PHY_ANALOG); - DELAY(1000); - - ar71xx_device_start(QCA953X_RESET_USB_HOST); - DELAY(1000); -} - -static void -qca953x_chip_set_mii_if(uint32_t unit, uint32_t mii_mode) -{ - - /* - * XXX ! - * - * Nothing to see here; although gmac0 can have its - * MII configuration changed, the register values - * are slightly different. - */ -} - -/* - * XXX TODO: fetch default MII divider configuration - */ - -static void -qca953x_chip_reset_wmac(void) -{ - - /* XXX TODO */ -} - -static void -qca953x_chip_init_gmac(void) -{ - long gmac_cfg; - - if (resource_long_value("qca953x_gmac", 0, "gmac_cfg", - &gmac_cfg) == 0) { - printf("%s: gmac_cfg=0x%08lx\n", - __func__, - (long) gmac_cfg); - qca953x_configure_gmac((uint32_t) gmac_cfg); - } -} - -/* - * Reset the NAND Flash Controller. - * - * + active=1 means "make it active". - * + active=0 means "make it inactive". - */ -static void -qca953x_chip_reset_nfc(int active) -{ -} - -/* - * Configure the GPIO output mux setup. - * - * The QCA953x has an output mux which allowed - * certain functions to be configured on any pin. - * Specifically, the switch PHY link LEDs and - * WMAC external RX LNA switches are not limited to - * a specific GPIO pin. - */ -static void -qca953x_chip_gpio_output_configure(int gpio, uint8_t func) -{ - uint32_t reg, s; - uint32_t t; - - if (gpio > QCA953X_GPIO_COUNT) - return; - - reg = QCA953X_GPIO_REG_OUT_FUNC0 + rounddown(gpio, 4); - s = 8 * (gpio % 4); - - /* read-modify-write */ - t = ATH_READ_REG(AR71XX_GPIO_BASE + reg); - t &= ~(0xff << s); - t |= func << s; - ATH_WRITE_REG(AR71XX_GPIO_BASE + reg, t); - - /* flush write */ - ATH_READ_REG(AR71XX_GPIO_BASE + reg); -} - -struct ar71xx_cpu_def qca953x_chip_def = { - &qca953x_chip_detect_mem_size, - &qca953x_chip_detect_sys_frequency, - &qca953x_chip_device_stop, - &qca953x_chip_device_start, - &qca953x_chip_device_stopped, - &qca953x_chip_set_pll_ge, - &qca953x_chip_set_mii_speed, - &qca953x_chip_set_mii_if, - &qca953x_chip_get_eth_pll, - &qca953x_chip_ddr_flush, - &qca953x_chip_init_usb_peripheral, - &qca953x_chip_reset_ethernet_switch, - &qca953x_chip_reset_wmac, - &qca953x_chip_init_gmac, - &qca953x_chip_reset_nfc, - &qca953x_chip_gpio_output_configure, -}; diff --git a/sys/mips/atheros/qca953x_chip.h b/sys/mips/atheros/qca953x_chip.h deleted file mode 100644 index 10e693dc343..00000000000 --- a/sys/mips/atheros/qca953x_chip.h +++ /dev/null @@ -1,33 +0,0 @@ -/*- - * Copyright (c) 2015 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef __QCA953X_CHIP_H__ -#define __QCA953X_CHIP_H__ - -extern struct ar71xx_cpu_def qca953x_chip_def; - -#endif diff --git a/sys/mips/atheros/qca953xreg.h b/sys/mips/atheros/qca953xreg.h deleted file mode 100644 index 4ef8c915a7d..00000000000 --- a/sys/mips/atheros/qca953xreg.h +++ /dev/null @@ -1,193 +0,0 @@ -/*- - * Copyright (c) 2015 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#ifndef __QCA953XREG_H__ -#define __QCA953XREG_H__ - -#define BIT(x) (1 << (x)) - -/* Revision ID information */ -#define REV_ID_MAJOR_QCA9533 0x0140 -#define REV_ID_MAJOR_QCA9533_V2 0x0160 -#define QCA953X_REV_ID_REVISION_MASK 0xf - -/* Big enough to cover APB and SPI, and most peripherals */ -/* - * it needs to cover SPI because right now the if_ath_ahb - * code uses rman to map in the SPI address into memory - * to read data instead of us squirreling it away at early - * boot-time and using the firmware interface. - * - * if_ath_ahb.c should use the same firmware interface - * that if_ath_pci.c uses. - */ -#define QCA953X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -#define QCA953X_GMAC_SIZE 0x14 -#define QCA953X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) -#define QCA953X_WMAC_SIZE 0x20000 -#define QCA953X_EHCI_BASE 0x1b000000 -#define QCA953X_EHCI_SIZE 0x200 -#define QCA953X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) -#define QCA953X_SRIF_SIZE 0x1000 - -#define QCA953X_PCI_CFG_BASE0 0x14000000 -#define QCA953X_PCI_CTRL_BASE0 (AR71XX_APB_BASE + 0x000f0000) -#define QCA953X_PCI_CRP_BASE0 (AR71XX_APB_BASE + 0x000c0000) -#define QCA953X_PCI_MEM_BASE0 0x10000000 -#define QCA953X_PCI_MEM_SIZE 0x02000000 - -/* PLL Block */ -#define QCA953X_PLL_CPU_CONFIG_REG (AR71XX_PLL_CPU_BASE + 0x00) -#define QCA953X_PLL_DDR_CONFIG_REG (AR71XX_PLL_CPU_BASE + 0x04) -#define QCA953X_PLL_CLK_CTRL_REG (AR71XX_PLL_CPU_BASE + 0x08) - -#define QCA953X_PLL_ETH_XMII_CONTROL_REG (AR71XX_PLL_CPU_BASE + 0x2c) -#define QCA953X_PLL_ETH_SGMII_CONTROL_REG (AR71XX_PLL_CPU_BASE + 0x48) - -#define QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 -#define QCA953X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f -#define QCA953X_PLL_CPU_CONFIG_NINT_SHIFT 6 -#define QCA953X_PLL_CPU_CONFIG_NINT_MASK 0x3f -#define QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 -#define QCA953X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f -#define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 -#define QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK 0x3 - -#define QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT 0 -#define QCA953X_PLL_DDR_CONFIG_NFRAC_MASK 0x3ff -#define QCA953X_PLL_DDR_CONFIG_NINT_SHIFT 10 -#define QCA953X_PLL_DDR_CONFIG_NINT_MASK 0x3f -#define QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT 16 -#define QCA953X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f -#define QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23 -#define QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7 - -#define QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS BIT(2) -#define QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3) -#define QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS BIT(4) -#define QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT 5 -#define QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK 0x1f -#define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10 -#define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f -#define QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT 15 -#define QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK 0x1f -#define QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL BIT(20) -#define QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) -#define QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) - -#define QCA953X_PLL_VAL_1000 0x16000000 -#define QCA953X_PLL_VAL_100 0x00000101 -#define QCA953X_PLL_VAL_10 0x00001616 - -/* Reset block */ - -#define QCA953X_RESET_REG_RESET_MODULE (AR71XX_RST_BLOCK_BASE + 0x1c) -#define QCA953X_RESET_USB_EXT_PWR BIT(29) -#define QCA953X_RESET_EXTERNAL BIT(28) -#define QCA953X_RESET_RTC BIT(27) -#define QCA953X_RESET_FULL_CHIP BIT(24) -#define QCA953X_RESET_GE1_MDIO BIT(23) -#define QCA953X_RESET_GE0_MDIO BIT(22) -#define QCA953X_RESET_CPU_NMI BIT(21) -#define QCA953X_RESET_CPU_COLD BIT(20) -#define QCA953X_RESET_DDR BIT(16) -#define QCA953X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) -#define QCA953X_RESET_GE1_MAC BIT(13) -#define QCA953X_RESET_ETH_SWITCH_ANALOG BIT(12) -#define QCA953X_RESET_USB_PHY_ANALOG BIT(11) -#define QCA953X_RESET_GE0_MAC BIT(9) -#define QCA953X_RESET_ETH_SWITCH BIT(8) -#define QCA953X_RESET_PCIE_PHY BIT(7) -#define QCA953X_RESET_PCIE BIT(6) -#define QCA953X_RESET_USB_HOST BIT(5) -#define QCA953X_RESET_USB_PHY BIT(4) -#define QCA953X_RESET_USBSUS_OVERRIDE BIT(3) - -#define QCA953X_RESET_REG_BOOTSTRAP (AR71XX_RST_BLOCK_BASE + 0xb0) -#define QCA953X_BOOTSTRAP_SW_OPTION2 BIT(12) -#define QCA953X_BOOTSTRAP_SW_OPTION1 BIT(11) -#define QCA953X_BOOTSTRAP_EJTAG_MODE BIT(5) -#define QCA953X_BOOTSTRAP_REF_CLK_40 BIT(4) -#define QCA953X_BOOTSTRAP_SDRAM_DISABLED BIT(1) -#define QCA953X_BOOTSTRAP_DDR1 BIT(0) - -#define QCA953X_RESET_REG_EXT_INT_STATUS (AR71XX_RST_BLOCK_BASE + 0xac) - -#define QCA953X_DDR_REG_FLUSH_GE0 (AR71XX_APB_BASE + 0x9c) -#define QCA953X_DDR_REG_FLUSH_GE1 (AR71XX_APB_BASE + 0xa0) -#define QCA953X_DDR_REG_FLUSH_USB (AR71XX_APB_BASE + 0xa4) -#define QCA953X_DDR_REG_FLUSH_PCIE (AR71XX_APB_BASE + 0xa8) -#define QCA953X_DDR_REG_FLUSH_WMAC (AR71XX_APB_BASE + 0xac) - -/* GPIO block */ -#define QCA953X_GPIO_REG_OUT_FUNC0 0x2c -#define QCA953X_GPIO_REG_OUT_FUNC1 0x30 -#define QCA953X_GPIO_REG_OUT_FUNC2 0x34 -#define QCA953X_GPIO_REG_OUT_FUNC3 0x38 -#define QCA953X_GPIO_REG_OUT_FUNC4 0x3c -#define QCA953X_GPIO_REG_IN_ENABLE0 0x44 -#define QCA953X_GPIO_REG_FUNC 0x6c - -#define QCA953X_GPIO_OUT_MUX_SPI_CS1 10 -#define QCA953X_GPIO_OUT_MUX_SPI_CS2 11 -#define QCA953X_GPIO_OUT_MUX_SPI_CS0 9 -#define QCA953X_GPIO_OUT_MUX_SPI_CLK 8 -#define QCA953X_GPIO_OUT_MUX_SPI_MOSI 12 -#define QCA953X_GPIO_OUT_MUX_LED_LINK1 41 -#define QCA953X_GPIO_OUT_MUX_LED_LINK2 42 -#define QCA953X_GPIO_OUT_MUX_LED_LINK3 43 -#define QCA953X_GPIO_OUT_MUX_LED_LINK4 44 -#define QCA953X_GPIO_OUT_MUX_LED_LINK5 45 - -#define QCA953X_GPIO_COUNT 18 - -/* GMAC block */ -#define QCA953X_GMAC_REG_ETH_CFG (QCA953X_GMAC_BASE + 0x00) - -#define QCA953X_ETH_CFG_SW_ONLY_MODE BIT(6) -#define QCA953X_ETH_CFG_SW_PHY_SWAP BIT(7) -#define QCA953X_ETH_CFG_SW_APB_ACCESS BIT(9) -#define QCA953X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13) - -/* SRIF block */ -#define QCA953X_SRIF_CPU_DPLL1_REG 0x1c0 -#define QCA953X_SRIF_CPU_DPLL2_REG 0x1c4 -#define QCA953X_SRIF_CPU_DPLL3_REG 0x1c8 - -#define QCA953X_SRIF_DDR_DPLL1_REG 0x240 -#define QCA953X_SRIF_DDR_DPLL2_REG 0x244 -#define QCA953X_SRIF_DDR_DPLL3_REG 0x248 - -#define QCA953X_SRIF_DPLL1_REFDIV_SHIFT 27 -#define QCA953X_SRIF_DPLL1_REFDIV_MASK 0x1f -#define QCA953X_SRIF_DPLL1_NINT_SHIFT 18 -#define QCA953X_SRIF_DPLL1_NINT_MASK 0x1ff -#define QCA953X_SRIF_DPLL1_NFRAC_MASK 0x0003ffff - -#define QCA953X_SRIF_DPLL2_LOCAL_PLL BIT(30) -#define QCA953X_SRIF_DPLL2_OUTDIV_SHIFT 13 -#define QCA953X_SRIF_DPLL2_OUTDIV_MASK 0x7 - -#endif /* __QCA953XREG_H__ */ diff --git a/sys/mips/atheros/qca955x_chip.c b/sys/mips/atheros/qca955x_chip.c deleted file mode 100644 index 7e9df8ed1ad..00000000000 --- a/sys/mips/atheros/qca955x_chip.c +++ /dev/null @@ -1,400 +0,0 @@ -/*- - * Copyright (c) 2015 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -//#include -#include - -#include -#include - -#include - -#include - -static void -qca955x_chip_detect_mem_size(void) -{ -} - -static void -qca955x_chip_detect_sys_frequency(void) -{ - unsigned long ref_rate; - unsigned long cpu_rate; - unsigned long ddr_rate; - unsigned long ahb_rate; - uint32_t pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; - uint32_t cpu_pll, ddr_pll; - uint32_t bootstrap; - - bootstrap = ATH_READ_REG(QCA955X_RESET_REG_BOOTSTRAP); - if (bootstrap & QCA955X_BOOTSTRAP_REF_CLK_40) - ref_rate = 40 * 1000 * 1000; - else - ref_rate = 25 * 1000 * 1000; - - pll = ATH_READ_REG(QCA955X_PLL_CPU_CONFIG_REG); - out_div = (pll >> QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & - QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK; - ref_div = (pll >> QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT) & - QCA955X_PLL_CPU_CONFIG_REFDIV_MASK; - nint = (pll >> QCA955X_PLL_CPU_CONFIG_NINT_SHIFT) & - QCA955X_PLL_CPU_CONFIG_NINT_MASK; - frac = (pll >> QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT) & - QCA955X_PLL_CPU_CONFIG_NFRAC_MASK; - - cpu_pll = nint * ref_rate / ref_div; - cpu_pll += frac * ref_rate / (ref_div * (1 << 6)); - cpu_pll /= (1 << out_div); - - pll = ATH_READ_REG(QCA955X_PLL_DDR_CONFIG_REG); - out_div = (pll >> QCA955X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & - QCA955X_PLL_DDR_CONFIG_OUTDIV_MASK; - ref_div = (pll >> QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT) & - QCA955X_PLL_DDR_CONFIG_REFDIV_MASK; - nint = (pll >> QCA955X_PLL_DDR_CONFIG_NINT_SHIFT) & - QCA955X_PLL_DDR_CONFIG_NINT_MASK; - frac = (pll >> QCA955X_PLL_DDR_CONFIG_NFRAC_SHIFT) & - QCA955X_PLL_DDR_CONFIG_NFRAC_MASK; - - ddr_pll = nint * ref_rate / ref_div; - ddr_pll += frac * ref_rate / (ref_div * (1 << 10)); - ddr_pll /= (1 << out_div); - - clk_ctrl = ATH_READ_REG(QCA955X_PLL_CLK_CTRL_REG); - - postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & - QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; - - if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS) - cpu_rate = ref_rate; - else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL) - cpu_rate = ddr_pll / (postdiv + 1); - else - cpu_rate = cpu_pll / (postdiv + 1); - - postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & - QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_MASK; - - if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS) - ddr_rate = ref_rate; - else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL) - ddr_rate = cpu_pll / (postdiv + 1); - else - ddr_rate = ddr_pll / (postdiv + 1); - - postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & - QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_MASK; - - if (clk_ctrl & QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS) - ahb_rate = ref_rate; - else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL) - ahb_rate = ddr_pll / (postdiv + 1); - else - ahb_rate = cpu_pll / (postdiv + 1); - - u_ar71xx_ddr_freq = ddr_rate; - u_ar71xx_cpu_freq = cpu_rate; - u_ar71xx_ahb_freq = ahb_rate; - - u_ar71xx_wdt_freq = ref_rate; - u_ar71xx_uart_freq = ref_rate; - u_ar71xx_mdio_freq = ref_rate; - u_ar71xx_refclk = ref_rate; -} - -static void -qca955x_chip_device_stop(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(QCA955X_RESET_REG_RESET_MODULE); - ATH_WRITE_REG(QCA955X_RESET_REG_RESET_MODULE, reg | mask); -} - -static void -qca955x_chip_device_start(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(QCA955X_RESET_REG_RESET_MODULE); - ATH_WRITE_REG(QCA955X_RESET_REG_RESET_MODULE, reg & ~mask); -} - -static int -qca955x_chip_device_stopped(uint32_t mask) -{ - uint32_t reg; - - reg = ATH_READ_REG(QCA955X_RESET_REG_RESET_MODULE); - return ((reg & mask) == mask); -} - -static void -qca955x_chip_set_mii_speed(uint32_t unit, uint32_t speed) -{ - - /* XXX TODO */ - return; -} - -static void -qca955x_chip_set_pll_ge(int unit, int speed, uint32_t pll) -{ - switch (unit) { - case 0: - ATH_WRITE_REG(QCA955X_PLL_ETH_XMII_CONTROL_REG, pll); - break; - case 1: - ATH_WRITE_REG(QCA955X_PLL_ETH_SGMII_CONTROL_REG, pll); - break; - default: - printf("%s: invalid PLL set for arge unit: %d\n", - __func__, unit); - return; - } -} - -static void -qca955x_chip_ddr_flush(ar71xx_flush_ddr_id_t id) -{ - - switch (id) { - case AR71XX_CPU_DDR_FLUSH_GE0: - ar71xx_ddr_flush(QCA955X_DDR_REG_FLUSH_GE0); - break; - case AR71XX_CPU_DDR_FLUSH_GE1: - ar71xx_ddr_flush(QCA955X_DDR_REG_FLUSH_GE1); - break; - case AR71XX_CPU_DDR_FLUSH_USB: - ar71xx_ddr_flush(QCA955X_DDR_REG_FLUSH_USB); - break; - case AR71XX_CPU_DDR_FLUSH_PCIE: - ar71xx_ddr_flush(QCA955X_DDR_REG_FLUSH_PCIE); - break; - case AR71XX_CPU_DDR_FLUSH_WMAC: - ar71xx_ddr_flush(QCA955X_DDR_REG_FLUSH_WMAC); - break; - case AR71XX_CPU_DDR_FLUSH_PCIE_EP: - ar71xx_ddr_flush(QCA955X_DDR_REG_FLUSH_SRC1); - break; - case AR71XX_CPU_DDR_FLUSH_CHECKSUM: - ar71xx_ddr_flush(QCA955X_DDR_REG_FLUSH_SRC2); - break; - default: - printf("%s: invalid flush (%d)\n", __func__, id); - } -} - -static uint32_t -qca955x_chip_get_eth_pll(unsigned int mac, int speed) -{ - uint32_t pll; - - switch (speed) { - case 10: - pll = QCA955X_PLL_VAL_10; - break; - case 100: - pll = QCA955X_PLL_VAL_100; - break; - case 1000: - pll = QCA955X_PLL_VAL_1000; - break; - default: - printf("%s%d: invalid speed %d\n", __func__, mac, speed); - pll = 0; - } - return (pll); -} - -static void -qca955x_chip_reset_ethernet_switch(void) -{ -#if 0 - ar71xx_device_stop(AR934X_RESET_ETH_SWITCH); - DELAY(100); - ar71xx_device_start(AR934X_RESET_ETH_SWITCH); - DELAY(100); -#endif -} - -static void -qca955x_configure_gmac(uint32_t gmac_cfg) -{ - uint32_t reg; - - reg = ATH_READ_REG(QCA955X_GMAC_REG_ETH_CFG); - printf("%s: ETH_CFG=0x%08x\n", __func__, reg); - reg &= ~(QCA955X_ETH_CFG_RGMII_EN | QCA955X_ETH_CFG_GE0_SGMII); - reg |= gmac_cfg; - ATH_WRITE_REG(QCA955X_GMAC_REG_ETH_CFG, reg); -} - -static void -qca955x_chip_init_usb_peripheral(void) -{ -} - -static void -qca955x_chip_set_mii_if(uint32_t unit, uint32_t mii_mode) -{ - - /* - * XXX ! - * - * Nothing to see here; although gmac0 can have its - * MII configuration changed, the register values - * are slightly different. - */ -} - -/* - * XXX TODO: fetch default MII divider configuration - */ - -static void -qca955x_chip_reset_wmac(void) -{ - - /* XXX TODO */ -} - -static void -qca955x_chip_init_gmac(void) -{ - long gmac_cfg; - - if (resource_long_value("qca955x_gmac", 0, "gmac_cfg", - &gmac_cfg) == 0) { - printf("%s: gmac_cfg=0x%08lx\n", - __func__, - (long) gmac_cfg); - qca955x_configure_gmac((uint32_t) gmac_cfg); - } -} - -/* - * Reset the NAND Flash Controller. - * - * + active=1 means "make it active". - * + active=0 means "make it inactive". - */ -static void -qca955x_chip_reset_nfc(int active) -{ -#if 0 - if (active) { - ar71xx_device_start(AR934X_RESET_NANDF); - DELAY(100); - - ar71xx_device_start(AR934X_RESET_ETH_SWITCH_ANALOG); - DELAY(250); - } else { - ar71xx_device_stop(AR934X_RESET_ETH_SWITCH_ANALOG); - DELAY(250); - - ar71xx_device_stop(AR934X_RESET_NANDF); - DELAY(100); - } -#endif -} - -/* - * Configure the GPIO output mux setup. - * - * The QCA955x has an output mux which allowed - * certain functions to be configured on any pin. - * Specifically, the switch PHY link LEDs and - * WMAC external RX LNA switches are not limited to - * a specific GPIO pin. - */ -static void -qca955x_chip_gpio_output_configure(int gpio, uint8_t func) -{ - uint32_t reg, s; - uint32_t t; - - if (gpio > QCA955X_GPIO_COUNT) - return; - - reg = QCA955X_GPIO_REG_OUT_FUNC0 + rounddown(gpio, 4); - s = 8 * (gpio % 4); - - /* read-modify-write */ - t = ATH_READ_REG(AR71XX_GPIO_BASE + reg); - t &= ~(0xff << s); - t |= func << s; - ATH_WRITE_REG(AR71XX_GPIO_BASE + reg, t); - - /* flush write */ - ATH_READ_REG(AR71XX_GPIO_BASE + reg); -} - -struct ar71xx_cpu_def qca955x_chip_def = { - &qca955x_chip_detect_mem_size, - &qca955x_chip_detect_sys_frequency, - &qca955x_chip_device_stop, - &qca955x_chip_device_start, - &qca955x_chip_device_stopped, - &qca955x_chip_set_pll_ge, - &qca955x_chip_set_mii_speed, - &qca955x_chip_set_mii_if, - &qca955x_chip_get_eth_pll, - &qca955x_chip_ddr_flush, - &qca955x_chip_init_usb_peripheral, - &qca955x_chip_reset_ethernet_switch, - &qca955x_chip_reset_wmac, - &qca955x_chip_init_gmac, - &qca955x_chip_reset_nfc, - &qca955x_chip_gpio_output_configure, -}; diff --git a/sys/mips/atheros/qca955x_chip.h b/sys/mips/atheros/qca955x_chip.h deleted file mode 100644 index 046b61256ce..00000000000 --- a/sys/mips/atheros/qca955x_chip.h +++ /dev/null @@ -1,33 +0,0 @@ -/*- - * Copyright (c) 2015 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - - -#ifndef __QCA955X_CHIP_H__ -#define __QCA955X_CHIP_H__ - -extern struct ar71xx_cpu_def qca955x_chip_def; - -#endif diff --git a/sys/mips/atheros/qca955x_pci.c b/sys/mips/atheros/qca955x_pci.c deleted file mode 100644 index c5381a9cee7..00000000000 --- a/sys/mips/atheros/qca955x_pci.c +++ /dev/null @@ -1,604 +0,0 @@ -/*- - * Copyright (c) 2009, Oleksandr Tymoshenko - * Copyright (c) 2011, Luiz Otavio O Souza. - * Copyright (c) 2015, Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ar71xx.h" - -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include -#include "pcib_if.h" - -#include /* XXX aim to eliminate this! */ -#include -#include -#include - -#include - -#undef AR724X_PCI_DEBUG -//#define AR724X_PCI_DEBUG -#ifdef AR724X_PCI_DEBUG -#define dprintf printf -#else -#define dprintf(x, arg...) -#endif - -/* - * This is a PCI controller for the QCA955x and later SoCs. - * It needs to be aware of >1 PCIe host endpoints. - * - * XXX TODO; it may be nice to merge this with ar724x_pci.c; - * they're very similar. - */ -struct ar71xx_pci_irq { - struct ar71xx_pci_softc *sc; - int irq; -}; - -struct ar71xx_pci_softc { - device_t sc_dev; - - int sc_busno; - struct rman sc_mem_rman; - struct rman sc_irq_rman; - - uint32_t sc_pci_reg_base; /* XXX until bus stuff is done */ - uint32_t sc_pci_crp_base; /* XXX until bus stuff is done */ - uint32_t sc_pci_ctrl_base; /* XXX until bus stuff is done */ - uint32_t sc_pci_mem_base; /* XXX until bus stuff is done */ - uint32_t sc_pci_membase_limit; - - struct intr_event *sc_eventstab[AR71XX_PCI_NIRQS]; - mips_intrcnt_t sc_intr_counter[AR71XX_PCI_NIRQS]; - struct ar71xx_pci_irq sc_pci_irq[AR71XX_PCI_NIRQS]; - struct resource *sc_irq; - void *sc_ih; -}; - -static int qca955x_pci_setup_intr(device_t, device_t, struct resource *, int, - driver_filter_t *, driver_intr_t *, void *, void **); -static int qca955x_pci_teardown_intr(device_t, device_t, struct resource *, - void *); -static int qca955x_pci_intr(void *); - -static void -qca955x_pci_write(uint32_t reg, uint32_t offset, uint32_t data, int bytes) -{ - uint32_t val, mask, shift; - - /* Register access is 32-bit aligned */ - shift = (offset & 3) * 8; - if (bytes % 4) - mask = (1 << (bytes * 8)) - 1; - else - mask = 0xffffffff; - - val = ATH_READ_REG(reg + (offset & ~3)); - val &= ~(mask << shift); - val |= ((data & mask) << shift); - ATH_WRITE_REG(reg + (offset & ~3), val); - - dprintf("%s: %#x/%#x addr=%#x, data=%#x(%#x), bytes=%d\n", __func__, - reg, reg + (offset & ~3), offset, data, val, bytes); -} - -static uint32_t -qca955x_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func, - u_int reg, int bytes) -{ - struct ar71xx_pci_softc *sc = device_get_softc(dev); - uint32_t data, shift, mask; - - /* Register access is 32-bit aligned */ - shift = (reg & 3) * 8; - - /* Create a mask based on the width, post-shift */ - if (bytes == 2) - mask = 0xffff; - else if (bytes == 1) - mask = 0xff; - else - mask = 0xffffffff; - - dprintf("%s: tag (%x, %x, %x) reg %d(%d)\n", __func__, bus, slot, - func, reg, bytes); - - if ((bus == 0) && (slot == 0) && (func == 0)) - data = ATH_READ_REG(sc->sc_pci_reg_base + (reg & ~3)); - else - data = -1; - - /* Get request bytes from 32-bit word */ - data = (data >> shift) & mask; - - dprintf("%s: read 0x%x\n", __func__, data); - - return (data); -} - -static void -qca955x_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func, - u_int reg, uint32_t data, int bytes) -{ - struct ar71xx_pci_softc *sc = device_get_softc(dev); - - dprintf("%s: tag (%x, %x, %x) reg %d(%d): %x\n", __func__, bus, slot, - func, reg, bytes, data); - - if ((bus != 0) || (slot != 0) || (func != 0)) - return; - - qca955x_pci_write(sc->sc_pci_reg_base, reg, data, bytes); -} - -static void -qca955x_pci_mask_irq(void *source) -{ - uint32_t reg; - struct ar71xx_pci_irq *pirq = source; - struct ar71xx_pci_softc *sc = pirq->sc; - - /* XXX - Only one interrupt ? Only one device ? */ - if (pirq->irq != AR71XX_PCI_IRQ_START) - return; - - /* Update the interrupt mask reg */ - reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK); - ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK, - reg & ~QCA955X_PCI_INTR_DEV0); - - /* Clear any pending interrupt */ - reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_STATUS); - ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_STATUS, - reg | QCA955X_PCI_INTR_DEV0); -} - -static void -qca955x_pci_unmask_irq(void *source) -{ - uint32_t reg; - struct ar71xx_pci_irq *pirq = source; - struct ar71xx_pci_softc *sc = pirq->sc; - - if (pirq->irq != AR71XX_PCI_IRQ_START) - return; - - /* Update the interrupt mask reg */ - reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK); - ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK, - reg | QCA955X_PCI_INTR_DEV0); -} - -static int -qca955x_pci_setup(device_t dev) -{ - struct ar71xx_pci_softc *sc = device_get_softc(dev); - uint32_t reg; - - /* setup COMMAND register */ - reg = PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN | PCIM_CMD_SERRESPEN | - PCIM_CMD_BACKTOBACK | PCIM_CMD_PERRESPEN | PCIM_CMD_MWRICEN; - - qca955x_pci_write(sc->sc_pci_crp_base, PCIR_COMMAND, reg, 2); - - /* These are the memory/prefetch base/limit parameters */ - qca955x_pci_write(sc->sc_pci_crp_base, 0x20, sc->sc_pci_membase_limit, 4); - qca955x_pci_write(sc->sc_pci_crp_base, 0x24, sc->sc_pci_membase_limit, 4); - - reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET); - if (reg != 0x7) { - DELAY(100000); - ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET, 0); - ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET); - DELAY(100); - ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET, 4); - ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET); - DELAY(100000); - } - - ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_APP, 0x1ffc1); - /* Flush write */ - (void) ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_APP); - - DELAY(1000); - - reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_RESET); - if ((reg & QCA955X_PCI_RESET_LINK_UP) == 0) { - device_printf(dev, "no PCIe controller found\n"); - return (ENXIO); - } - - return (0); -} - -static int -qca955x_pci_probe(device_t dev) -{ - - return (BUS_PROBE_NOWILDCARD); -} - -static int -qca955x_pci_attach(device_t dev) -{ - struct ar71xx_pci_softc *sc = device_get_softc(dev); - int unit = device_get_unit(dev); - int rid = 0; - - /* Dirty; maybe these could all just be hints */ - if (unit == 0) { - sc->sc_pci_reg_base = QCA955X_PCI_CFG_BASE0; - sc->sc_pci_crp_base = QCA955X_PCI_CRP_BASE0; - sc->sc_pci_ctrl_base = QCA955X_PCI_CTRL_BASE0; - sc->sc_pci_mem_base = QCA955X_PCI_MEM_BASE0; - /* XXX verify */ - sc->sc_pci_membase_limit = 0x11f01000; - } else if (unit == 1) { - sc->sc_pci_reg_base = QCA955X_PCI_CFG_BASE1; - sc->sc_pci_crp_base = QCA955X_PCI_CRP_BASE1; - sc->sc_pci_ctrl_base = QCA955X_PCI_CTRL_BASE1; - sc->sc_pci_mem_base = QCA955X_PCI_MEM_BASE1; - /* XXX verify */ - sc->sc_pci_membase_limit = 0x12f01200; - } else { - device_printf(dev, "%s: invalid unit (%d)\n", __func__, unit); - return (ENXIO); - } - - sc->sc_mem_rman.rm_type = RMAN_ARRAY; - sc->sc_mem_rman.rm_descr = "qca955x PCI memory window"; - if (rman_init(&sc->sc_mem_rman) != 0 || - rman_manage_region(&sc->sc_mem_rman, - sc->sc_pci_mem_base, - sc->sc_pci_mem_base + QCA955X_PCI_MEM_SIZE - 1) != 0) { - panic("qca955x_pci_attach: failed to set up I/O rman"); - } - - sc->sc_irq_rman.rm_type = RMAN_ARRAY; - sc->sc_irq_rman.rm_descr = "qca955x PCI IRQs"; - if (rman_init(&sc->sc_irq_rman) != 0 || - rman_manage_region(&sc->sc_irq_rman, AR71XX_PCI_IRQ_START, - AR71XX_PCI_IRQ_END) != 0) - panic("qca955x_pci_attach: failed to set up IRQ rman"); - - /* Disable interrupts */ - ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_STATUS, 0); - ATH_WRITE_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK, 0); - - /* Hook up our interrupt handler. */ - if ((sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE)) == NULL) { - device_printf(dev, "unable to allocate IRQ resource\n"); - return (ENXIO); - } - - if ((bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC, - qca955x_pci_intr, NULL, sc, &sc->sc_ih))) { - device_printf(dev, - "WARNING: unable to register interrupt handler\n"); - return (ENXIO); - } - - /* Reset PCIe core and PCIe PHY */ - ar71xx_device_stop(QCA955X_RESET_PCIE); - ar71xx_device_stop(QCA955X_RESET_PCIE_PHY); - DELAY(100); - ar71xx_device_start(QCA955X_RESET_PCIE_PHY); - ar71xx_device_start(QCA955X_RESET_PCIE); - - if (qca955x_pci_setup(dev)) - return (ENXIO); - - /* - * Write initial base address. - * - * I'm not yet sure why this is required and/or why it isn't - * initialised like this. The AR71xx PCI code initialises - * the PCI windows for each device, but neither it or the - * 724x PCI bridge modules explicitly initialise the BAR. - * - * So before this gets committed, have a chat with jhb@ or - * someone else who knows PCI well and figure out whether - * the initial BAR is supposed to be determined by /other/ - * means. - */ - qca955x_pci_write_config(dev, 0, 0, 0, PCIR_BAR(0), - sc->sc_pci_mem_base, - 4); - - /* Fixup internal PCI bridge */ - qca955x_pci_write_config(dev, 0, 0, 0, PCIR_COMMAND, - PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN - | PCIM_CMD_SERRESPEN | PCIM_CMD_BACKTOBACK - | PCIM_CMD_PERRESPEN | PCIM_CMD_MWRICEN, 2); - - device_add_child(dev, "pci", -1); - return (bus_generic_attach(dev)); -} - -static int -qca955x_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) -{ - struct ar71xx_pci_softc *sc = device_get_softc(dev); - - switch (which) { - case PCIB_IVAR_DOMAIN: - *result = 0; - return (0); - case PCIB_IVAR_BUS: - *result = sc->sc_busno; - return (0); - } - - return (ENOENT); -} - -static int -qca955x_pci_write_ivar(device_t dev, device_t child, int which, uintptr_t result) -{ - struct ar71xx_pci_softc * sc = device_get_softc(dev); - - switch (which) { - case PCIB_IVAR_BUS: - sc->sc_busno = result; - return (0); - } - - return (ENOENT); -} - -static struct resource * -qca955x_pci_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct ar71xx_pci_softc *sc = device_get_softc(bus); - struct resource *rv; - struct rman *rm; - - switch (type) { - case SYS_RES_IRQ: - rm = &sc->sc_irq_rman; - break; - case SYS_RES_MEMORY: - rm = &sc->sc_mem_rman; - break; - default: - return (NULL); - } - - rv = rman_reserve_resource(rm, start, end, count, flags, child); - - if (rv == NULL) - return (NULL); - - rman_set_rid(rv, *rid); - - if (flags & RF_ACTIVE) { - if (bus_activate_resource(child, type, *rid, rv)) { - rman_release_resource(rv); - return (NULL); - } - } - - return (rv); -} - -static int -qca955x_pci_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - int res = (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), - child, type, rid, r)); - - if (!res) { - switch(type) { - case SYS_RES_MEMORY: - case SYS_RES_IOPORT: - - rman_set_bustag(r, ar71xx_bus_space_pcimem); - break; - } - } - - return (res); -} - -static int -qca955x_pci_setup_intr(device_t bus, device_t child, struct resource *ires, - int flags, driver_filter_t *filt, driver_intr_t *handler, - void *arg, void **cookiep) -{ - struct ar71xx_pci_softc *sc = device_get_softc(bus); - struct intr_event *event; - int irq, error; - - irq = rman_get_start(ires); - if (irq > AR71XX_PCI_IRQ_END) - panic("%s: bad irq %d", __func__, irq); - - event = sc->sc_eventstab[irq]; - if (event == NULL) { - sc->sc_pci_irq[irq].sc = sc; - sc->sc_pci_irq[irq].irq = irq; - error = intr_event_create(&event, (void *)&sc->sc_pci_irq[irq], - 0, irq, - qca955x_pci_mask_irq, - qca955x_pci_unmask_irq, - NULL, NULL, - "pci intr%d:", irq); - - if (error == 0) { - sc->sc_eventstab[irq] = event; - sc->sc_intr_counter[irq] = - mips_intrcnt_create(event->ie_name); - } - else - return error; - } - - intr_event_add_handler(event, device_get_nameunit(child), filt, - handler, arg, intr_priority(flags), flags, cookiep); - mips_intrcnt_setname(sc->sc_intr_counter[irq], event->ie_fullname); - - qca955x_pci_unmask_irq(&sc->sc_pci_irq[irq]); - - return (0); -} - -static int -qca955x_pci_teardown_intr(device_t dev, device_t child, struct resource *ires, - void *cookie) -{ - struct ar71xx_pci_softc *sc = device_get_softc(dev); - int irq, result; - - irq = rman_get_start(ires); - if (irq > AR71XX_PCI_IRQ_END) - panic("%s: bad irq %d", __func__, irq); - - if (sc->sc_eventstab[irq] == NULL) - panic("Trying to teardown unoccupied IRQ"); - - qca955x_pci_mask_irq(&sc->sc_pci_irq[irq]); - - result = intr_event_remove_handler(cookie); - if (!result) - sc->sc_eventstab[irq] = NULL; - - return (result); -} - -static int -qca955x_pci_intr(void *arg) -{ - struct ar71xx_pci_softc *sc = arg; - struct intr_event *event; - uint32_t reg, irq, mask; - - /* There's only one PCIe DDR flush for both PCIe EPs */ - ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_PCIE); - - reg = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_STATUS); - mask = ATH_READ_REG(sc->sc_pci_ctrl_base + QCA955X_PCI_INTR_MASK); - - /* - * Handle only unmasked interrupts - */ - reg &= mask; - /* - * XXX TODO: handle >1 PCIe end point! - */ - if (reg & QCA955X_PCI_INTR_DEV0) { - irq = AR71XX_PCI_IRQ_START; - event = sc->sc_eventstab[irq]; - if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) { - printf("Stray IRQ %d\n", irq); - return (FILTER_STRAY); - } - - /* TODO: frame instead of NULL? */ - intr_event_handle(event, NULL); - mips_intrcnt_inc(sc->sc_intr_counter[irq]); - } - - return (FILTER_HANDLED); -} - -static int -qca955x_pci_maxslots(device_t dev) -{ - - return (PCI_SLOTMAX); -} - -static int -qca955x_pci_route_interrupt(device_t pcib, device_t device, int pin) -{ - - return (pci_get_slot(device)); -} - -static device_method_t qca955x_pci_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, qca955x_pci_probe), - DEVMETHOD(device_attach, qca955x_pci_attach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* Bus interface */ - DEVMETHOD(bus_read_ivar, qca955x_pci_read_ivar), - DEVMETHOD(bus_write_ivar, qca955x_pci_write_ivar), - DEVMETHOD(bus_alloc_resource, qca955x_pci_alloc_resource), - DEVMETHOD(bus_release_resource, bus_generic_release_resource), - DEVMETHOD(bus_activate_resource, qca955x_pci_activate_resource), - DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), - DEVMETHOD(bus_setup_intr, qca955x_pci_setup_intr), - DEVMETHOD(bus_teardown_intr, qca955x_pci_teardown_intr), - - /* pcib interface */ - DEVMETHOD(pcib_maxslots, qca955x_pci_maxslots), - DEVMETHOD(pcib_read_config, qca955x_pci_read_config), - DEVMETHOD(pcib_write_config, qca955x_pci_write_config), - DEVMETHOD(pcib_route_interrupt, qca955x_pci_route_interrupt), - DEVMETHOD(pcib_request_feature, pcib_request_feature_allow), - - DEVMETHOD_END -}; - -static driver_t qca955x_pci_driver = { - "pcib", - qca955x_pci_methods, - sizeof(struct ar71xx_pci_softc), -}; - -static devclass_t qca955x_pci_devclass; - -DRIVER_MODULE(qca955x_pci, nexus, qca955x_pci_driver, qca955x_pci_devclass, 0, 0); -DRIVER_MODULE(qca955x_pci, apb, qca955x_pci_driver, qca955x_pci_devclass, 0, 0); diff --git a/sys/mips/atheros/qca955xreg.h b/sys/mips/atheros/qca955xreg.h deleted file mode 100644 index cd0f6ab9604..00000000000 --- a/sys/mips/atheros/qca955xreg.h +++ /dev/null @@ -1,226 +0,0 @@ -/*- - * Copyright (c) 2013 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#ifndef __QCA955XREG_H__ -#define __QCA955XREG_H__ - -#define BIT(x) (1 << (x)) - -/* Revision ID information */ -#define REV_ID_MAJOR_QCA9556 0x0130 -#define REV_ID_MAJOR_QCA9558 0x1130 -#define QCA955X_REV_ID_REVISION_MASK 0xf - -/* Big enough to cover APB and SPI, and most peripherals */ -/* - * it needs to cover SPI because right now the if_ath_ahb - * code uses rman to map in the SPI address into memory - * to read data instead of us squirreling it away at early - * boot-time and using the firmware interface. - * - * if_ath_ahb.c should use the same firmware interface - * that if_ath_pci.c uses. - */ -#define QCA955X_APB_BASE 0x18000000 -#define QCA955X_APB_SIZE 0x08000000 - -#define QCA955X_PCI_MEM_BASE0 0x10000000 -#define QCA955X_PCI_MEM_BASE1 0x12000000 -#define QCA955X_PCI_MEM_SIZE 0x02000000 -#define QCA955X_PCI_CFG_BASE0 0x14000000 -#define QCA955X_PCI_CFG_BASE1 0x16000000 -#define QCA955X_PCI_CFG_SIZE 0x1000 -#define QCA955X_PCI_CRP_BASE0 (AR71XX_APB_BASE + 0x000c0000) -#define QCA955X_PCI_CRP_BASE1 (AR71XX_APB_BASE + 0x00250000) -#define QCA955X_PCI_CRP_SIZE 0x1000 -#define QCA955X_PCI_CTRL_BASE0 (AR71XX_APB_BASE + 0x000f0000) -#define QCA955X_PCI_CTRL_BASE1 (AR71XX_APB_BASE + 0x00280000) -#define QCA955X_PCI_CTRL_SIZE 0x100 - -#define QCA955X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) -#define QCA955X_WMAC_SIZE 0x20000 -#define QCA955X_EHCI0_BASE 0x1b000000 -#define QCA955X_EHCI1_BASE 0x1b400000 -#define QCA955X_EHCI_SIZE 0x1000 - -/* PLL block */ - -#define QCA955X_PLL_CPU_CONFIG_REG (AR71XX_PLL_CPU_BASE + 0x00) -#define QCA955X_PLL_DDR_CONFIG_REG (AR71XX_PLL_CPU_BASE + 0x04) -#define QCA955X_PLL_CLK_CTRL_REG (AR71XX_PLL_CPU_BASE + 0x08) - -#define QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 -#define QCA955X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f -#define QCA955X_PLL_CPU_CONFIG_NINT_SHIFT 6 -#define QCA955X_PLL_CPU_CONFIG_NINT_MASK 0x3f -#define QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 -#define QCA955X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f -#define QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 -#define QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK 0x3 - -#define QCA955X_PLL_DDR_CONFIG_NFRAC_SHIFT 0 -#define QCA955X_PLL_DDR_CONFIG_NFRAC_MASK 0x3ff -#define QCA955X_PLL_DDR_CONFIG_NINT_SHIFT 10 -#define QCA955X_PLL_DDR_CONFIG_NINT_MASK 0x3f -#define QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT 16 -#define QCA955X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f -#define QCA955X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23 -#define QCA955X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7 - -#define QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS BIT(2) -#define QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3) -#define QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS BIT(4) -#define QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT 5 -#define QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_MASK 0x1f -#define QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10 -#define QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f -#define QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT 15 -#define QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_MASK 0x1f -#define QCA955X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL BIT(20) -#define QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) -#define QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) - -#define QCA955X_PLL_ETH_XMII_CONTROL_REG (AR71XX_PLL_CPU_BASE + 0x28) -#define QCA955X_PLL_ETH_SGMII_CONTROL_REG (AR71XX_PLL_CPU_BASE + 0x48) - -/* Reset block */ -#define QCA955X_RESET_REG_RESET_MODULE (AR71XX_RST_BLOCK_BASE + 0x1c) -#define QCA955X_RESET_REG_BOOTSTRAP (AR71XX_RST_BLOCK_BASE + 0xb0) -#define QCA955X_RESET_REG_EXT_INT_STATUS (AR71XX_RST_BLOCK_BASE + 0xac) - -#define QCA955X_BOOTSTRAP_REF_CLK_40 BIT(4) - -#define QCA955X_EXT_INT_WMAC_MISC BIT(0) -#define QCA955X_EXT_INT_WMAC_TX BIT(1) -#define QCA955X_EXT_INT_WMAC_RXLP BIT(2) -#define QCA955X_EXT_INT_WMAC_RXHP BIT(3) -#define QCA955X_EXT_INT_PCIE_RC1 BIT(4) -#define QCA955X_EXT_INT_PCIE_RC1_INT0 BIT(5) -#define QCA955X_EXT_INT_PCIE_RC1_INT1 BIT(6) -#define QCA955X_EXT_INT_PCIE_RC1_INT2 BIT(7) -#define QCA955X_EXT_INT_PCIE_RC1_INT3 BIT(8) -#define QCA955X_EXT_INT_PCIE_RC2 BIT(12) -#define QCA955X_EXT_INT_PCIE_RC2_INT0 BIT(13) -#define QCA955X_EXT_INT_PCIE_RC2_INT1 BIT(14) -#define QCA955X_EXT_INT_PCIE_RC2_INT2 BIT(15) -#define QCA955X_EXT_INT_PCIE_RC2_INT3 BIT(16) -#define QCA955X_EXT_INT_USB1 BIT(24) -#define QCA955X_EXT_INT_USB2 BIT(28) - -#define QCA955X_EXT_INT_WMAC_ALL \ - (QCA955X_EXT_INT_WMAC_MISC | QCA955X_EXT_INT_WMAC_TX | \ - QCA955X_EXT_INT_WMAC_RXLP | QCA955X_EXT_INT_WMAC_RXHP) - -#define QCA955X_EXT_INT_PCIE_RC1_ALL \ - (QCA955X_EXT_INT_PCIE_RC1 | QCA955X_EXT_INT_PCIE_RC1_INT0 | \ - QCA955X_EXT_INT_PCIE_RC1_INT1 | QCA955X_EXT_INT_PCIE_RC1_INT2 | \ - QCA955X_EXT_INT_PCIE_RC1_INT3) - -#define QCA955X_EXT_INT_PCIE_RC2_ALL \ - (QCA955X_EXT_INT_PCIE_RC2 | QCA955X_EXT_INT_PCIE_RC2_INT0 | \ - QCA955X_EXT_INT_PCIE_RC2_INT1 | QCA955X_EXT_INT_PCIE_RC2_INT2 | \ - QCA955X_EXT_INT_PCIE_RC2_INT3) - -#define QCA955X_RESET_HOST BIT(31) -#define QCA955X_RESET_SLIC BIT(30) -#define QCA955X_RESET_HDMA BIT(29) -#define QCA955X_RESET_EXTERNAL BIT(28) -#define QCA955X_RESET_RTC BIT(27) -#define QCA955X_RESET_PCIE_EP_INT BIT(26) -#define QCA955X_RESET_CHKSUM_ACC BIT(25) -#define QCA955X_RESET_FULL_CHIP BIT(24) -#define QCA955X_RESET_GE1_MDIO BIT(23) -#define QCA955X_RESET_GE0_MDIO BIT(22) -#define QCA955X_RESET_CPU_NMI BIT(21) -#define QCA955X_RESET_CPU_COLD BIT(20) -#define QCA955X_RESET_HOST_RESET_INT BIT(19) -#define QCA955X_RESET_PCIE_EP BIT(18) -#define QCA955X_RESET_UART1 BIT(17) -#define QCA955X_RESET_DDR BIT(16) -#define QCA955X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) -#define QCA955X_RESET_NANDF BIT(14) -#define QCA955X_RESET_GE1_MAC BIT(13) -#define QCA955X_RESET_SGMII_ANALOG BIT(12) -#define QCA955X_RESET_USB_PHY_ANALOG BIT(11) -#define QCA955X_RESET_HOST_DMA_INT BIT(10) -#define QCA955X_RESET_GE0_MAC BIT(9) -#define QCA955X_RESET_SGMII BIT(8) -#define QCA955X_RESET_PCIE_PHY BIT(7) -#define QCA955X_RESET_PCIE BIT(6) -#define QCA955X_RESET_USB_HOST BIT(5) -#define QCA955X_RESET_USB_PHY BIT(4) -#define QCA955X_RESET_USBSUS_OVERRIDE BIT(3) -#define QCA955X_RESET_LUT BIT(2) -#define QCA955X_RESET_MBOX BIT(1) -#define QCA955X_RESET_I2S BIT(0) - -/* GPIO block */ -#define QCA955X_GPIO_REG_OUT_FUNC0 0x2c -#define QCA955X_GPIO_REG_OUT_FUNC1 0x30 -#define QCA955X_GPIO_REG_OUT_FUNC2 0x34 -#define QCA955X_GPIO_REG_OUT_FUNC3 0x38 -#define QCA955X_GPIO_REG_OUT_FUNC4 0x3c -#define QCA955X_GPIO_REG_OUT_FUNC5 0x40 -#define QCA955X_GPIO_REG_FUNC 0x6c -#define QCA955X_GPIO_COUNT 24 - -#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -#define QCA955X_GMAC_SIZE 0x40 -#define QCA955X_NFC_BASE 0x1b800200 -#define QCA955X_NFC_SIZE 0xb8 - -/* GMAC Interface */ -#define QCA955X_GMAC_REG_ETH_CFG (QCA955X_GMAC_BASE + 0x00) - -#define QCA955X_ETH_CFG_RGMII_EN BIT(0) -#define QCA955X_ETH_CFG_GE0_SGMII BIT(6) - -/* XXX Same as AR934x values */ -#define QCA955X_PLL_VAL_1000 0x16000000 -#define QCA955X_PLL_VAL_100 0x00000101 -#define QCA955X_PLL_VAL_10 0x00001616 - -/* DDR block */ -#define QCA955X_DDR_REG_FLUSH_GE0 (AR71XX_APB_BASE + 0x9c) -#define QCA955X_DDR_REG_FLUSH_GE1 (AR71XX_APB_BASE + 0xa0) -#define QCA955X_DDR_REG_FLUSH_USB (AR71XX_APB_BASE + 0xa4) -#define QCA955X_DDR_REG_FLUSH_PCIE (AR71XX_APB_BASE + 0xa8) -#define QCA955X_DDR_REG_FLUSH_WMAC (AR71XX_APB_BASE + 0xac) -/* PCIe EP */ -#define QCA955X_DDR_REG_FLUSH_SRC1 (AR71XX_APB_BASE + 0xb0) -/* checksum engine */ -#define QCA955X_DDR_REG_FLUSH_SRC2 (AR71XX_APB_BASE + 0xb2) - -/* PCIe control block - relative to PCI_CTRL_BASE0/PCI_CTRL_BASE1 */ - -#define QCA955X_PCI_APP 0x0 -#define QCA955X_PCI_APP_LTSSM_ENABLE (1 << 0) -#define QCA955X_PCI_RESET 0x18 -#define QCA955X_PCI_RESET_LINK_UP (1 << 0) -#define QCA955X_PCI_INTR_STATUS 0x4c -#define QCA955X_PCI_INTR_MASK 0x50 -#define QCA955X_PCI_INTR_DEV0 (1 << 14) - -#endif /* __QCA955XREG_H__ */ diff --git a/sys/mips/atheros/std.ar71xx b/sys/mips/atheros/std.ar71xx deleted file mode 100644 index 789a08ed60e..00000000000 --- a/sys/mips/atheros/std.ar71xx +++ /dev/null @@ -1,7 +0,0 @@ -# -# standard config for all ar71xx based kernels. - -files "../atheros/files.ar71xx" - -machine mips mips -cpu CPU_MIPS4KC diff --git a/sys/mips/atheros/uart_bus_ar71xx.c b/sys/mips/atheros/uart_bus_ar71xx.c deleted file mode 100644 index 9baa8be1ae5..00000000000 --- a/sys/mips/atheros/uart_bus_ar71xx.c +++ /dev/null @@ -1,106 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - */ -#include "opt_uart.h" - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include -#include - -#include "uart_if.h" - -static int uart_ar71xx_probe(device_t dev); -extern struct uart_class uart_ar71xx_uart_class; - -static device_method_t uart_ar71xx_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, uart_ar71xx_probe), - DEVMETHOD(device_attach, uart_bus_attach), - DEVMETHOD(device_detach, uart_bus_detach), - { 0, 0 } -}; - -static driver_t uart_ar71xx_driver = { - uart_driver_name, - uart_ar71xx_methods, - sizeof(struct uart_softc), -}; - -extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs; - -static int -uart_ar71xx_probe(device_t dev) -{ - struct uart_softc *sc; - uint64_t freq; - - freq = ar71xx_uart_freq(); - - sc = device_get_softc(dev); - sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs); - sc->sc_class = &uart_ns8250_class; - bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); - sc->sc_sysdev->bas.regshft = 2; - sc->sc_sysdev->bas.bst = mips_bus_space_generic; - sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR) + 3; - sc->sc_bas.regshft = 2; - sc->sc_bas.bst = mips_bus_space_generic; - sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR) + 3; - - return (uart_bus_probe(dev, 2, 0, freq, 0, 0, 0)); -} - -#ifdef EARLY_PRINTF -static void -ar71xx_early_putc(int c) -{ - int i; - - for (i = 0; i < 1000; i++) { - if (ATH_READ_REG(AR71XX_UART_ADDR + AR71XX_UART_LSR) - & AR71XX_UART_LSR_THRE) - break; - } - - ATH_WRITE_REG(AR71XX_UART_ADDR + AR71XX_UART_THR, (c & 0xff)); -} -early_putc_t *early_putc = ar71xx_early_putc; -#endif - -DRIVER_MODULE(uart, apb, uart_ar71xx_driver, uart_devclass, 0, 0); diff --git a/sys/mips/atheros/uart_bus_ar933x.c b/sys/mips/atheros/uart_bus_ar933x.c deleted file mode 100644 index a53b9cae8a2..00000000000 --- a/sys/mips/atheros/uart_bus_ar933x.c +++ /dev/null @@ -1,115 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012, Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - */ -#include "opt_uart.h" - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include -#include - -#include -#ifdef EARLY_PRINTF -#include -#endif - -#include "uart_if.h" - -static int uart_ar933x_probe(device_t dev); -extern struct uart_class uart_ar933x_uart_class; - -static device_method_t uart_ar933x_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, uart_ar933x_probe), - DEVMETHOD(device_attach, uart_bus_attach), - DEVMETHOD(device_detach, uart_bus_detach), - { 0, 0 } -}; - -static driver_t uart_ar933x_driver = { - uart_driver_name, - uart_ar933x_methods, - sizeof(struct uart_softc), -}; - -extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs; - -static int -uart_ar933x_probe(device_t dev) -{ - struct uart_softc *sc; - uint64_t freq; - - freq = ar71xx_uart_freq(); - - sc = device_get_softc(dev); - sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs); - sc->sc_class = &uart_ar933x_class; - bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); - sc->sc_sysdev->bas.regshft = 0; - sc->sc_sysdev->bas.bst = mips_bus_space_generic; - sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR); - sc->sc_bas.regshft = 0; - sc->sc_bas.bst = mips_bus_space_generic; - sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR); - - return (uart_bus_probe(dev, 2, 0, freq, 0, 0, 0)); -} - -/* - * Assume the UART is setup by the bootloader and just echo that. - */ -#if defined(EARLY_PRINTF) -static void -ar933x_early_putc(int c) -{ - int i = 1000; - - /* Wait until FIFO is clear */ - while ((i > 0) && (ATH_READ_REG(AR71XX_UART_ADDR + AR933X_UART_CS_REG) & - AR933X_UART_CS_TX_BUSY)) - i--; - - /* Write it out */ - ATH_WRITE_REG(AR71XX_UART_ADDR + AR933X_UART_DATA_REG, - (c & 0xff)| AR933X_UART_DATA_TX_CSR); -} -early_putc_t *early_putc = ar933x_early_putc; -#endif /* EARLY_PRINTF */ - -DRIVER_MODULE(uart, apb, uart_ar933x_driver, uart_devclass, 0, 0); diff --git a/sys/mips/atheros/uart_cpu_ar71xx.c b/sys/mips/atheros/uart_cpu_ar71xx.c deleted file mode 100644 index c1e1bf40580..00000000000 --- a/sys/mips/atheros/uart_cpu_ar71xx.c +++ /dev/null @@ -1,76 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009 Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ -#include "opt_uart.h" - -#include -#include -#include -#include - -#include - -#include -#include - -#include -#include -#include - -bus_space_tag_t uart_bus_space_io; -bus_space_tag_t uart_bus_space_mem; - -int -uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2) -{ - return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0); -} - -int -uart_cpu_getdev(int devtype, struct uart_devinfo *di) -{ - uint64_t freq; - - freq = ar71xx_uart_freq(); - - di->ops = uart_getops(&uart_ns8250_class); - di->bas.chan = 0; - di->bas.bst = ar71xx_bus_space_reversed; - di->bas.regshft = 2; - di->bas.rclk = freq; - di->baudrate = 115200; - di->databits = 8; - di->stopbits = 1; - - di->parity = UART_PARITY_NONE; - - uart_bus_space_io = NULL; - uart_bus_space_mem = ar71xx_bus_space_reversed; - di->bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR); - return (0); -} diff --git a/sys/mips/atheros/uart_cpu_ar933x.c b/sys/mips/atheros/uart_cpu_ar933x.c deleted file mode 100644 index 9d596ae6338..00000000000 --- a/sys/mips/atheros/uart_cpu_ar933x.c +++ /dev/null @@ -1,78 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ -#include "opt_uart.h" - -#include -#include -#include -#include - -#include - -#include -#include - -#include -#include -#include - -#include - -bus_space_tag_t uart_bus_space_io; -bus_space_tag_t uart_bus_space_mem; - -int -uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2) -{ - return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0); -} - -int -uart_cpu_getdev(int devtype, struct uart_devinfo *di) -{ - uint64_t freq; - - freq = ar71xx_uart_freq(); - - di->ops = uart_getops(&uart_ar933x_class); - di->bas.chan = 0; - di->bas.bst = ar71xx_bus_space_reversed; - di->bas.regshft = 0; /* We'll do "correct" dword addressing here */ - di->bas.rclk = freq; - di->baudrate = 115200; - di->databits = 8; - di->stopbits = 1; - - di->parity = UART_PARITY_NONE; - - uart_bus_space_io = NULL; - uart_bus_space_mem = ar71xx_bus_space_reversed; - di->bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR); - return (0); -} diff --git a/sys/mips/atheros/uart_dev_ar933x.c b/sys/mips/atheros/uart_dev_ar933x.c deleted file mode 100644 index 512a17806d1..00000000000 --- a/sys/mips/atheros/uart_dev_ar933x.c +++ /dev/null @@ -1,734 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2013 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include "uart_if.h" - -/* - * Default system clock is 25MHz; see ar933x_chip.c for how - * the startup process determines whether it's 25MHz or 40MHz. - */ -#define DEFAULT_RCLK (25 * 1000 * 1000) - -#define ar933x_getreg(bas, reg) \ - bus_space_read_4((bas)->bst, (bas)->bsh, reg) -#define ar933x_setreg(bas, reg, value) \ - bus_space_write_4((bas)->bst, (bas)->bsh, reg, value) - -static int -ar933x_drain(struct uart_bas *bas, int what) -{ - int limit; - - if (what & UART_DRAIN_TRANSMITTER) { - limit = 10*1024; - - /* Loop over until the TX FIFO shows entirely clear */ - while (--limit) { - if ((ar933x_getreg(bas, AR933X_UART_CS_REG) - & AR933X_UART_CS_TX_BUSY) == 0) - break; - } - if (limit == 0) { - return (EIO); - } - } - - if (what & UART_DRAIN_RECEIVER) { - limit=10*4096; - while (--limit) { - /* XXX duplicated from ar933x_getc() */ - /* XXX TODO: refactor! */ - - /* If there's nothing to read, stop! */ - if ((ar933x_getreg(bas, AR933X_UART_DATA_REG) & - AR933X_UART_DATA_RX_CSR) == 0) { - break; - } - - /* Read the top of the RX FIFO */ - (void) ar933x_getreg(bas, AR933X_UART_DATA_REG); - - /* Remove that entry from said RX FIFO */ - ar933x_setreg(bas, AR933X_UART_DATA_REG, - AR933X_UART_DATA_RX_CSR); - - uart_barrier(bas); - DELAY(2); - } - if (limit == 0) { - return (EIO); - } - } - return (0); -} - -/* - * Calculate the baud from the given chip configuration parameters. - */ -static unsigned long -ar933x_uart_get_baud(unsigned int clk, unsigned int scale, - unsigned int step) -{ - uint64_t t; - uint32_t div; - - div = (2 << 16) * (scale + 1); - t = clk; - t *= step; - t += (div / 2); - t = t / div; - - return (t); -} - -/* - * Calculate the scale/step with the lowest possible deviation from - * the target baudrate. - */ -static void -ar933x_uart_get_scale_step(struct uart_bas *bas, unsigned int baud, - unsigned int *scale, unsigned int *step) -{ - unsigned int tscale; - uint32_t clk; - long min_diff; - - clk = bas->rclk; - *scale = 0; - *step = 0; - - min_diff = baud; - for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) { - uint64_t tstep; - int diff; - - tstep = baud * (tscale + 1); - tstep *= (2 << 16); - tstep = tstep / clk; - - if (tstep > AR933X_UART_MAX_STEP) - break; - - diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud); - if (diff < min_diff) { - min_diff = diff; - *scale = tscale; - *step = tstep; - } - } -} - -static int -ar933x_param(struct uart_bas *bas, int baudrate, int databits, int stopbits, - int parity) -{ - /* UART always 8 bits */ - - /* UART always 1 stop bit */ - - /* UART parity is controllable by bits 0:1, ignore for now */ - - /* Set baudrate if required. */ - if (baudrate > 0) { - uint32_t clock_scale, clock_step; - - /* Find the best fit for the given baud rate */ - ar933x_uart_get_scale_step(bas, baudrate, &clock_scale, - &clock_step); - - /* - * Program the clock register in its entirety - no need - * for Read-Modify-Write. - */ - ar933x_setreg(bas, AR933X_UART_CLOCK_REG, - ((clock_scale & AR933X_UART_CLOCK_SCALE_M) - << AR933X_UART_CLOCK_SCALE_S) | - (clock_step & AR933X_UART_CLOCK_STEP_M)); - } - - uart_barrier(bas); - return (0); -} - -/* - * Low-level UART interface. - */ -static int ar933x_probe(struct uart_bas *bas); -static void ar933x_init(struct uart_bas *bas, int, int, int, int); -static void ar933x_term(struct uart_bas *bas); -static void ar933x_putc(struct uart_bas *bas, int); -static int ar933x_rxready(struct uart_bas *bas); -static int ar933x_getc(struct uart_bas *bas, struct mtx *); - -static struct uart_ops uart_ar933x_ops = { - .probe = ar933x_probe, - .init = ar933x_init, - .term = ar933x_term, - .putc = ar933x_putc, - .rxready = ar933x_rxready, - .getc = ar933x_getc, -}; - -static int -ar933x_probe(struct uart_bas *bas) -{ - - /* We always know this will be here */ - return (0); -} - -static void -ar933x_init(struct uart_bas *bas, int baudrate, int databits, int stopbits, - int parity) -{ - uint32_t reg; - - /* Setup default parameters */ - ar933x_param(bas, baudrate, databits, stopbits, parity); - - /* XXX Force enable UART in case it was disabled */ - - /* Disable all interrupts */ - ar933x_setreg(bas, AR933X_UART_INT_EN_REG, 0x00000000); - - /* Disable the host interrupt */ - reg = ar933x_getreg(bas, AR933X_UART_CS_REG); - reg &= ~AR933X_UART_CS_HOST_INT_EN; - ar933x_setreg(bas, AR933X_UART_CS_REG, reg); - - uart_barrier(bas); - - /* XXX Set RTS/DTR? */ -} - -/* - * Detach from console. - */ -static void -ar933x_term(struct uart_bas *bas) -{ - - /* XXX TODO */ -} - -static void -ar933x_putc(struct uart_bas *bas, int c) -{ - int limit; - - limit = 250000; - - /* Wait for space in the TX FIFO */ - while ( ((ar933x_getreg(bas, AR933X_UART_DATA_REG) & - AR933X_UART_DATA_TX_CSR) == 0) && --limit) - DELAY(4); - - /* Write the actual byte */ - ar933x_setreg(bas, AR933X_UART_DATA_REG, - (c & 0xff) | AR933X_UART_DATA_TX_CSR); -} - -static int -ar933x_rxready(struct uart_bas *bas) -{ - - /* Wait for a character to come ready */ - return (!!(ar933x_getreg(bas, AR933X_UART_DATA_REG) - & AR933X_UART_DATA_RX_CSR)); -} - -static int -ar933x_getc(struct uart_bas *bas, struct mtx *hwmtx) -{ - int c; - - uart_lock(hwmtx); - - /* Wait for a character to come ready */ - while ((ar933x_getreg(bas, AR933X_UART_DATA_REG) & - AR933X_UART_DATA_RX_CSR) == 0) { - uart_unlock(hwmtx); - DELAY(4); - uart_lock(hwmtx); - } - - /* Read the top of the RX FIFO */ - c = ar933x_getreg(bas, AR933X_UART_DATA_REG) & 0xff; - - /* Remove that entry from said RX FIFO */ - ar933x_setreg(bas, AR933X_UART_DATA_REG, AR933X_UART_DATA_RX_CSR); - - uart_unlock(hwmtx); - - return (c); -} - -/* - * High-level UART interface. - */ -struct ar933x_softc { - struct uart_softc base; - - uint32_t u_ier; -}; - -static int ar933x_bus_attach(struct uart_softc *); -static int ar933x_bus_detach(struct uart_softc *); -static int ar933x_bus_flush(struct uart_softc *, int); -static int ar933x_bus_getsig(struct uart_softc *); -static int ar933x_bus_ioctl(struct uart_softc *, int, intptr_t); -static int ar933x_bus_ipend(struct uart_softc *); -static int ar933x_bus_param(struct uart_softc *, int, int, int, int); -static int ar933x_bus_probe(struct uart_softc *); -static int ar933x_bus_receive(struct uart_softc *); -static int ar933x_bus_setsig(struct uart_softc *, int); -static int ar933x_bus_transmit(struct uart_softc *); -static void ar933x_bus_grab(struct uart_softc *); -static void ar933x_bus_ungrab(struct uart_softc *); - -static kobj_method_t ar933x_methods[] = { - KOBJMETHOD(uart_attach, ar933x_bus_attach), - KOBJMETHOD(uart_detach, ar933x_bus_detach), - KOBJMETHOD(uart_flush, ar933x_bus_flush), - KOBJMETHOD(uart_getsig, ar933x_bus_getsig), - KOBJMETHOD(uart_ioctl, ar933x_bus_ioctl), - KOBJMETHOD(uart_ipend, ar933x_bus_ipend), - KOBJMETHOD(uart_param, ar933x_bus_param), - KOBJMETHOD(uart_probe, ar933x_bus_probe), - KOBJMETHOD(uart_receive, ar933x_bus_receive), - KOBJMETHOD(uart_setsig, ar933x_bus_setsig), - KOBJMETHOD(uart_transmit, ar933x_bus_transmit), - KOBJMETHOD(uart_grab, ar933x_bus_grab), - KOBJMETHOD(uart_ungrab, ar933x_bus_ungrab), - { 0, 0 } -}; - -struct uart_class uart_ar933x_class = { - "ar933x", - ar933x_methods, - sizeof(struct ar933x_softc), - .uc_ops = &uart_ar933x_ops, - .uc_range = 8, - .uc_rclk = DEFAULT_RCLK, - .uc_rshift = 0 -}; - -#define SIGCHG(c, i, s, d) \ - if (c) { \ - i |= (i & s) ? s : s | d; \ - } else { \ - i = (i & s) ? (i & ~s) | d : i; \ - } - -static int -ar933x_bus_attach(struct uart_softc *sc) -{ - struct ar933x_softc *u = (struct ar933x_softc *)sc; - struct uart_bas *bas = &sc->sc_bas; - uint32_t reg; - - /* XXX TODO: flush transmitter */ - - /* - * Setup initial interrupt notifications. - * - * XXX for now, just RX FIFO valid. - * Later on (when they're handled), also handle - * RX errors/overflow. - */ - u->u_ier = AR933X_UART_INT_RX_VALID; - - /* Enable RX interrupts to kick-start things */ - ar933x_setreg(bas, AR933X_UART_INT_EN_REG, u->u_ier); - - /* Enable the host interrupt now */ - reg = ar933x_getreg(bas, AR933X_UART_CS_REG); - reg |= AR933X_UART_CS_HOST_INT_EN; - ar933x_setreg(bas, AR933X_UART_CS_REG, reg); - - return (0); -} - -static int -ar933x_bus_detach(struct uart_softc *sc) -{ - struct uart_bas *bas = &sc->sc_bas; - uint32_t reg; - - /* Disable all interrupts */ - ar933x_setreg(bas, AR933X_UART_INT_EN_REG, 0x00000000); - - /* Disable the host interrupt */ - reg = ar933x_getreg(bas, AR933X_UART_CS_REG); - reg &= ~AR933X_UART_CS_HOST_INT_EN; - ar933x_setreg(bas, AR933X_UART_CS_REG, reg); - uart_barrier(bas); - - return (0); -} - -static int -ar933x_bus_flush(struct uart_softc *sc, int what) -{ - struct uart_bas *bas; - - bas = &sc->sc_bas; - uart_lock(sc->sc_hwmtx); - ar933x_drain(bas, what); - uart_unlock(sc->sc_hwmtx); - - return (0); -} - -static int -ar933x_bus_getsig(struct uart_softc *sc) -{ - uint32_t sig = sc->sc_hwsig; - - /* - * For now, let's just return that DSR/DCD/CTS is asserted. - */ - SIGCHG(1, sig, SER_DSR, SER_DDSR); - SIGCHG(1, sig, SER_CTS, SER_DCTS); - SIGCHG(1, sig, SER_DCD, SER_DDCD); - SIGCHG(1, sig, SER_RI, SER_DRI); - - sc->sc_hwsig = sig & ~SER_MASK_DELTA; - - return (sig); -} - -/* - * XXX TODO: actually implement the rest of this! - */ -static int -ar933x_bus_ioctl(struct uart_softc *sc, int request, intptr_t data) -{ - int error = 0; - - /* XXX lock */ - switch (request) { - case UART_IOCTL_BREAK: - case UART_IOCTL_IFLOW: - case UART_IOCTL_OFLOW: - break; - case UART_IOCTL_BAUD: - *(int*)data = 115200; - break; - default: - error = EINVAL; - break; - } - - /* XXX unlock */ - - return (error); -} - -/* - * Bus interrupt handler. - * - * For now, system interrupts are disabled. - * So this is just called from a callout in uart_core.c - * to poll various state. - */ -static int -ar933x_bus_ipend(struct uart_softc *sc) -{ - struct ar933x_softc *u = (struct ar933x_softc *)sc; - struct uart_bas *bas = &sc->sc_bas; - int ipend = 0; - uint32_t isr; - - uart_lock(sc->sc_hwmtx); - - /* - * Fetch/ACK the ISR status. - */ - isr = ar933x_getreg(bas, AR933X_UART_INT_REG); - ar933x_setreg(bas, AR933X_UART_INT_REG, isr); - uart_barrier(bas); - - /* - * RX ready - notify upper layer. - */ - if (isr & AR933X_UART_INT_RX_VALID) { - ipend |= SER_INT_RXREADY; - } - - /* - * If we get this interrupt, we should disable - * it from the interrupt mask and inform the uart - * driver appropriately. - * - * We can't keep setting SER_INT_TXIDLE or SER_INT_SIGCHG - * all the time or IO stops working. So we will always - * clear this interrupt if we get it, then we only signal - * the upper layer if we were doing active TX in the - * first place. - * - * Also, the name is misleading. This actually means - * "the FIFO is almost empty." So if we just write some - * more data to the FIFO without checking whether it can - * take said data, we'll overflow the thing. - * - * Unfortunately the FreeBSD uart device has no concept of - * partial UART writes - it expects that the whole buffer - * is written to the hardware. Thus for now, ar933x_bus_transmit() - * will wait for the FIFO to finish draining before it pushes - * more frames into it. - */ - if (isr & AR933X_UART_INT_TX_EMPTY) { - /* - * Update u_ier to disable TX notifications; update hardware - */ - u->u_ier &= ~AR933X_UART_INT_TX_EMPTY; - ar933x_setreg(bas, AR933X_UART_INT_EN_REG, u->u_ier); - uart_barrier(bas); - } - - /* - * Only signal TX idle if we're not busy transmitting. - * - * XXX I never get _out_ of txbusy? Debug that! - */ - if (sc->sc_txbusy) { - if (isr & AR933X_UART_INT_TX_EMPTY) { - ipend |= SER_INT_TXIDLE; - } else { - ipend |= SER_INT_SIGCHG; - } - } - - uart_unlock(sc->sc_hwmtx); - return (ipend); -} - -static int -ar933x_bus_param(struct uart_softc *sc, int baudrate, int databits, - int stopbits, int parity) -{ - struct uart_bas *bas; - int error; - - bas = &sc->sc_bas; - uart_lock(sc->sc_hwmtx); - error = ar933x_param(bas, baudrate, databits, stopbits, parity); - uart_unlock(sc->sc_hwmtx); - return (error); -} - -static int -ar933x_bus_probe(struct uart_softc *sc) -{ - struct uart_bas *bas; - int error; - - bas = &sc->sc_bas; - - error = ar933x_probe(bas); - if (error) - return (error); - - /* Reset FIFOs. */ - ar933x_drain(bas, UART_FLUSH_RECEIVER|UART_FLUSH_TRANSMITTER); - - /* XXX TODO: actually find out what the FIFO depth is! */ - sc->sc_rxfifosz = 16; - sc->sc_txfifosz = 16; - - return (0); -} - -static int -ar933x_bus_receive(struct uart_softc *sc) -{ - struct uart_bas *bas = &sc->sc_bas; - int xc; - - uart_lock(sc->sc_hwmtx); - - /* Loop over until we are full, or no data is available */ - while (ar933x_rxready(bas)) { - if (uart_rx_full(sc)) { - sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; - break; - } - - /* Read the top of the RX FIFO */ - xc = ar933x_getreg(bas, AR933X_UART_DATA_REG) & 0xff; - - /* Remove that entry from said RX FIFO */ - ar933x_setreg(bas, AR933X_UART_DATA_REG, - AR933X_UART_DATA_RX_CSR); - uart_barrier(bas); - - /* XXX frame, parity error */ - uart_rx_put(sc, xc); - } - - /* - * XXX TODO: Discard everything left in the Rx FIFO? - * XXX only if we've hit an overrun condition? - */ - - uart_unlock(sc->sc_hwmtx); - - return (0); -} - -static int -ar933x_bus_setsig(struct uart_softc *sc, int sig) -{ -#if 0 - struct ar933x_softc *ns8250 = (struct ar933x_softc*)sc; - struct uart_bas *bas; - uint32_t new, old; - - bas = &sc->sc_bas; - do { - old = sc->sc_hwsig; - new = old; - if (sig & SER_DDTR) { - SIGCHG(sig & SER_DTR, new, SER_DTR, - SER_DDTR); - } - if (sig & SER_DRTS) { - SIGCHG(sig & SER_RTS, new, SER_RTS, - SER_DRTS); - } - } while (!atomic_cmpset_32(&sc->sc_hwsig, old, new)); - uart_lock(sc->sc_hwmtx); - ns8250->mcr &= ~(MCR_DTR|MCR_RTS); - if (new & SER_DTR) - ns8250->mcr |= MCR_DTR; - if (new & SER_RTS) - ns8250->mcr |= MCR_RTS; - uart_setreg(bas, REG_MCR, ns8250->mcr); - uart_barrier(bas); - uart_unlock(sc->sc_hwmtx); -#endif - return (0); -} - -/* - * Write the current transmit buffer to the TX FIFO. - * - * Unfortunately the FreeBSD uart device has no concept of - * partial UART writes - it expects that the whole buffer - * is written to the hardware. Thus for now, this will wait for - * the FIFO to finish draining before it pushes more frames into it. - * - * If non-blocking operation is truely needed here, either - * the FreeBSD uart device will need to handle partial writes - * in xxx_bus_transmit(), or we'll need to do TX FIFO buffering - * of our own here. - */ -static int -ar933x_bus_transmit(struct uart_softc *sc) -{ - struct uart_bas *bas = &sc->sc_bas; - struct ar933x_softc *u = (struct ar933x_softc *)sc; - int i; - - uart_lock(sc->sc_hwmtx); - - /* Wait for the FIFO to be clear - see above */ - while (ar933x_getreg(bas, AR933X_UART_CS_REG) & - AR933X_UART_CS_TX_BUSY) - ; - - /* - * Write some data! - */ - for (i = 0; i < sc->sc_txdatasz; i++) { - /* Write the TX data */ - ar933x_setreg(bas, AR933X_UART_DATA_REG, - (sc->sc_txbuf[i] & 0xff) | AR933X_UART_DATA_TX_CSR); - uart_barrier(bas); - } - - /* - * Now that we're transmitting, get interrupt notification - * when the FIFO is (almost) empty - see above. - */ - u->u_ier |= AR933X_UART_INT_TX_EMPTY; - ar933x_setreg(bas, AR933X_UART_INT_EN_REG, u->u_ier); - uart_barrier(bas); - - /* - * Inform the upper layer that we are presently transmitting - * data to the hardware; this will be cleared when the - * TXIDLE interrupt occurs. - */ - sc->sc_txbusy = 1; - uart_unlock(sc->sc_hwmtx); - - return (0); -} - -static void -ar933x_bus_grab(struct uart_softc *sc) -{ - struct uart_bas *bas = &sc->sc_bas; - uint32_t reg; - - /* Disable the host interrupt now */ - uart_lock(sc->sc_hwmtx); - reg = ar933x_getreg(bas, AR933X_UART_CS_REG); - reg &= ~AR933X_UART_CS_HOST_INT_EN; - ar933x_setreg(bas, AR933X_UART_CS_REG, reg); - uart_unlock(sc->sc_hwmtx); -} - -static void -ar933x_bus_ungrab(struct uart_softc *sc) -{ - struct uart_bas *bas = &sc->sc_bas; - uint32_t reg; - - /* Enable the host interrupt now */ - uart_lock(sc->sc_hwmtx); - reg = ar933x_getreg(bas, AR933X_UART_CS_REG); - reg |= AR933X_UART_CS_HOST_INT_EN; - ar933x_setreg(bas, AR933X_UART_CS_REG, reg); - uart_unlock(sc->sc_hwmtx); -} diff --git a/sys/mips/atheros/uart_dev_ar933x.h b/sys/mips/atheros/uart_dev_ar933x.h deleted file mode 100644 index 2c7c1427e51..00000000000 --- a/sys/mips/atheros/uart_dev_ar933x.h +++ /dev/null @@ -1,33 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2013 Adrian Chadd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef __UART_DEV_AR933X__ -#define __UART_DEV_AR933X__ - -extern struct uart_class uart_ar933x_class; - -#endif diff --git a/sys/mips/beri/beri_iommu.c b/sys/mips/beri/beri_iommu.c deleted file mode 100644 index acf67b63053..00000000000 --- a/sys/mips/beri/beri_iommu.c +++ /dev/null @@ -1,233 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2019 Ruslan Bukin - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory (Department of Computer Science and - * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the - * DARPA SSITH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include - -#include - -#include "xdma_if.h" - -#define IOMMU_INVALIDATE 0x00 -#define IOMMU_SET_BASE 0x08 - -struct beri_iommu_softc { - struct resource *res[1]; - device_t dev; - bus_space_tag_t bst_data; - bus_space_handle_t bsh_data; - uint32_t offs; -}; - -static struct resource_spec beri_iommu_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { -1, 0 } -}; - -static void -beri_iommu_invalidate(struct beri_iommu_softc *sc, vm_offset_t addr) -{ - - bus_write_8(sc->res[0], IOMMU_INVALIDATE, htole64(addr)); -} - -static void -beri_iommu_set_base(struct beri_iommu_softc *sc, vm_offset_t addr) -{ - - bus_write_8(sc->res[0], IOMMU_SET_BASE, htole64(addr)); -} - -static int -beri_iommu_release(device_t dev, struct xdma_iommu *xio) -{ - struct beri_iommu_softc *sc; - - sc = device_get_softc(dev); - - beri_iommu_set_base(sc, 0); - - return (0); -} - -static int -beri_iommu_init(device_t dev, struct xdma_iommu *xio) -{ - struct beri_iommu_softc *sc; - - sc = device_get_softc(dev); - - beri_iommu_set_base(sc, (uintptr_t)xio->p.pm_segtab); - - return (0); -} - -static int -beri_iommu_remove(device_t dev, struct xdma_iommu *xio, vm_offset_t va) -{ - struct beri_iommu_softc *sc; - - sc = device_get_softc(dev); - - beri_iommu_invalidate(sc, va); - - return (0); -} - -static int -beri_iommu_enter(device_t dev, struct xdma_iommu *xio, vm_offset_t va, - vm_paddr_t pa) -{ - struct beri_iommu_softc *sc; - pt_entry_t opte, npte; - pt_entry_t *pte; - pmap_t p; - - sc = device_get_softc(dev); - p = &xio->p; - - pte = pmap_pte(p, va); - if (pte == NULL) - panic("pte is NULL\n"); - - /* Make pte uncacheable. */ - opte = *pte; - npte = opte & ~PTE_C_MASK; - npte |= PTE_C(VM_MEMATTR_UNCACHEABLE); - *pte = npte; - - /* Write back, invalidate pte. */ - mips_dcache_wbinv_range((vm_offset_t)pte, sizeof(vm_offset_t)); - - /* Invalidate the entry. */ - if (pte_test(&opte, PTE_V) && opte != npte) - beri_iommu_invalidate(sc, va); - - return (0); -} - -static int -beri_iommu_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "beri,iommu")) - return (ENXIO); - - device_set_desc(dev, "BERI IOMMU"); - - return (BUS_PROBE_DEFAULT); -} - -static int -beri_iommu_attach(device_t dev) -{ - struct beri_iommu_softc *sc; - phandle_t xref, node; - - sc = device_get_softc(dev); - sc->dev = dev; - - if (bus_alloc_resources(dev, beri_iommu_spec, sc->res)) { - device_printf(dev, "could not allocate resources\n"); - return (ENXIO); - } - - /* Memory interface */ - sc->bst_data = rman_get_bustag(sc->res[0]); - sc->bsh_data = rman_get_bushandle(sc->res[0]); - - node = ofw_bus_get_node(dev); - xref = OF_xref_from_node(node); - OF_device_register_xref(xref, dev); - - return (0); -} - -static int -beri_iommu_detach(device_t dev) -{ - struct beri_iommu_softc *sc; - - sc = device_get_softc(dev); - - bus_release_resources(dev, beri_iommu_spec, sc->res); - - return (0); -} - -static device_method_t beri_iommu_methods[] = { - /* xDMA IOMMU interface */ - DEVMETHOD(xdma_iommu_init, beri_iommu_init), - DEVMETHOD(xdma_iommu_release, beri_iommu_release), - DEVMETHOD(xdma_iommu_enter, beri_iommu_enter), - DEVMETHOD(xdma_iommu_remove, beri_iommu_remove), - - /* Device interface */ - DEVMETHOD(device_probe, beri_iommu_probe), - DEVMETHOD(device_attach, beri_iommu_attach), - DEVMETHOD(device_detach, beri_iommu_detach), - { 0, 0 } -}; - -static driver_t beri_iommu_driver = { - "beri_iommu", - beri_iommu_methods, - sizeof(struct beri_iommu_softc), -}; - -static devclass_t beri_iommu_devclass; - -DRIVER_MODULE(beri_iommu, simplebus, beri_iommu_driver, - beri_iommu_devclass, 0, 0); diff --git a/sys/mips/beri/beri_machdep.c b/sys/mips/beri/beri_machdep.c deleted file mode 100644 index 5fac8cf2d63..00000000000 --- a/sys/mips/beri/beri_machdep.c +++ /dev/null @@ -1,277 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Wojciech A. Koszek - * Copyright (c) 2012-2014 Robert N. M. Watson - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#include -#include "opt_ddb.h" -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef FDT -#include -#include -#include -#endif - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -extern int *edata; -extern int *end; - -void -platform_cpu_init() -{ - /* Nothing special */ -} - -static void -mips_init(void) -{ - int i; -#ifdef FDT - struct mem_region mr[FDT_MEM_REGIONS]; - uint64_t val; - int mr_cnt; - int j; -#endif - - for (i = 0; i < 10; i++) { - phys_avail[i] = 0; - } - - /* phys_avail regions are in bytes */ - phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end); - phys_avail[1] = ctob(realmem); - - dump_avail[0] = phys_avail[0]; - dump_avail[1] = phys_avail[1]; - - physmem = realmem; - -#ifdef FDT - if (fdt_get_mem_regions(mr, &mr_cnt, &val) == 0) { - physmem = btoc(val); - - KASSERT((phys_avail[0] >= mr[0].mr_start) && \ - (phys_avail[0] < (mr[0].mr_start + mr[0].mr_size)), - ("First region is not within FDT memory range")); - - /* Limit size of the first region */ - phys_avail[1] = (mr[0].mr_start + MIN(mr[0].mr_size, ctob(realmem))); - dump_avail[1] = phys_avail[1]; - - /* Add the rest of regions */ - for (i = 1, j = 2; i < mr_cnt; i++, j+=2) { - phys_avail[j] = mr[i].mr_start; - phys_avail[j+1] = (mr[i].mr_start + mr[i].mr_size); - dump_avail[j] = phys_avail[j]; - dump_avail[j+1] = phys_avail[j+1]; - } - } -#endif - - init_param1(); - init_param2(physmem); - mips_cpu_init(); - pmap_bootstrap(); - mips_proc0_init(); - mutex_init(); - kdb_init(); -#ifdef KDB - if (boothowto & RB_KDB) - kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); -#endif -} - -/* - * Perform a board-level soft-reset. - */ -void -platform_reset(void) -{ - - /* XXX SMP will likely require us to do more. */ - __asm__ __volatile__( - "mfc0 $k0, $12\n\t" - "li $k1, 0x00100000\n\t" - "or $k0, $k0, $k1\n\t" - "mtc0 $k0, $12\n"); - for( ; ; ) - __asm__ __volatile("wait"); -} - -void -platform_start(__register_t a0, __register_t a1, __register_t a2, - __register_t a3) -{ - struct bootinfo *bootinfop; - vm_offset_t kernend; - uint64_t platform_counter_freq; - int argc = a0; - char **argv = (char **)a1; - char **envp = (char **)a2; - long memsize; -#ifdef FDT - vm_offset_t dtbp; - void *kmdp; -#endif - int i; - - /* clear the BSS and SBSS segments */ - kernend = (vm_offset_t)&end; - memset(&edata, 0, kernend - (vm_offset_t)(&edata)); - - mips_postboot_fixup(); - - mips_pcpu0_init(); - - /* - * Over time, we've changed out boot-time binary interface for the - * kernel. Miniboot simply provides a 'memsize' in a3, whereas the - * FreeBSD boot loader provides a 'bootinfo *' in a3. While slightly - * grody, we support both here by detecting 'pointer-like' values in - * a3 and assuming physical memory can never be that back. - * - * XXXRW: Pull more values than memsize out of bootinfop -- e.g., - * module information. - */ - if (a3 >= 0x9800000000000000ULL) { - bootinfop = (void *)a3; - memsize = bootinfop->bi_memsize; - preload_metadata = (caddr_t)bootinfop->bi_modulep; - } else { - bootinfop = NULL; - memsize = a3; - } - -#ifdef FDT - /* - * Find the dtb passed in by the boot loader (currently fictional). - */ - kmdp = preload_search_by_type("elf kernel"); - dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); - -#if defined(FDT_DTB_STATIC) - /* - * In case the device tree blob was not retrieved (from metadata) try - * to use the statically embedded one. - */ - if (dtbp == (vm_offset_t)NULL) - dtbp = (vm_offset_t)&fdt_static_dtb; -#else -#error "Non-static FDT not yet supported on BERI" -#endif - - if (OF_install(OFW_FDT, 0) == FALSE) - while (1); - if (OF_init((void *)dtbp) != 0) - while (1); - - /* - * Configure more boot-time parameters passed in by loader. - */ - boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); - init_static_kenv(MD_FETCH(kmdp, MODINFOMD_ENVP, char *), 0); - - /* - * Get bootargs from FDT if specified. - */ - ofw_parse_bootargs(); -#endif - - /* - * XXXRW: We have no way to compare wallclock time to cycle rate on - * BERI, so for now assume we run at the MALTA default (100MHz). - */ - platform_counter_freq = MIPS_DEFAULT_HZ; - mips_timer_early_init(platform_counter_freq); - - cninit(); - printf("entry: platform_start()\n"); - - bootverbose = 1; - if (bootverbose) { - printf("cmd line: "); - for (i = 0; i < argc; i++) - printf("%s ", argv[i]); - printf("\n"); - - printf("envp:\n"); - for (i = 0; envp[i]; i += 2) - printf("\t%s = %s\n", envp[i], envp[i+1]); - - if (bootinfop != NULL) - printf("bootinfo found at %p\n", bootinfop); - - printf("memsize = %p\n", (void *)memsize); - } - - realmem = btoc(memsize); - mips_init(); - - mips_timer_init_params(platform_counter_freq, 0); -} diff --git a/sys/mips/beri/beri_mp.c b/sys/mips/beri/beri_mp.c deleted file mode 100644 index c7183df1518..00000000000 --- a/sys/mips/beri/beri_mp.c +++ /dev/null @@ -1,306 +0,0 @@ -/*- - * Copyright (c) 2017 Ruslan Bukin - * Copyright (c) 2012-2015 Robert N. M. Watson - * Copyright (c) 2013 SRI International - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include - -#include -#include - -#include - -#include - -struct spin_entry { - uint64_t entry_addr; - uint64_t a0; - uint32_t rsvd1; - uint32_t pir; - uint64_t rsvd2; -}; - -static phandle_t cpu_of_nodes[MAXCPU]; -static device_t picmap[MAXCPU]; - -int -platform_processor_id(void) -{ - int cpu; - - cpu = beri_get_cpu(); - - return (cpu); -} - -void -platform_cpu_mask(cpuset_t *mask) -{ - int ncores, ncpus, nthreads; - phandle_t cpus, cpu; - pcell_t reg; - char prop[16]; - struct spin_entry *se; - - ncores = beri_get_ncores(); - nthreads = beri_get_nthreads(); - KASSERT(ncores <= 0x10000, ("%s: too many cores %d", __func__, ncores)); - KASSERT(nthreads <= 0x10000, ("%s: too many threads %d", __func__, - nthreads)); - KASSERT(ncores < 0xffff || nthreads < 0xffff, - ("%s: cores x thread (%d x %d) would overflow", __func__, ncores, - nthreads)); - ncpus = ncores * nthreads; - if (MAXCPU > 1 && ncpus > MAXCPU) - printf("%s: Hardware supports more CPUs (%d) than kernel (%d)\n", - __func__, ncpus, MAXCPU); - printf("%s: hardware has %d cores with %d threads each\n", __func__, - ncores, nthreads); - - if ((cpus = OF_finddevice("/cpus")) <= 0) { - printf("%s: no \"/cpus\" device found in FDT\n", __func__); - goto error; - } - if ((cpu = OF_child(cpus)) <= 0) { - printf("%s: no children of \"/cpus\" found in FDT\n", __func__); - goto error; - } - CPU_ZERO(mask); - do { - if (OF_getprop(cpu, "reg", ®, sizeof(reg)) <= 0) { - printf("%s: cpu device with no reg property\n", - __func__); - goto error; - } - if (reg > MAXCPU) { - printf("%s: cpu ID too large (%d > %d)\n", __func__, - reg, MAXCPU); - continue; - } - cpu_of_nodes[reg] = cpu; - - if (reg != 0) { - if (OF_getprop(cpu, "enable-method", &prop, - sizeof(prop)) <= 0 && OF_getprop(OF_parent(cpu), - "enable-method", &prop, sizeof(prop)) <= 0) { - printf("%s: CPU %d has no enable-method " - "property\n", __func__, reg); - continue; - } - if (strcmp("spin-table", prop) != 0) { - printf("%s: CPU %d enable-method is '%s' not " - "'spin-table'\n", __func__, reg, prop); - continue; - } - - if (OF_getprop(cpu, "cpu-release-addr", &se, - sizeof(se)) <= 0) { - printf("%s: CPU %d has missing or invalid " - "cpu-release-addr\n", __func__, reg); - continue; - } - if (se->entry_addr != 1) { - printf("%s: CPU %d has uninitialized spin " - "entry\n", __func__, reg); - continue; - } - } - - CPU_SET(reg, mask); - } while ((cpu = OF_peer(cpu)) > 0); - return; - -error: - /* - * If we run into any problems determining the CPU layout, - * fall back to UP. - * - * XXX: panic instead? - */ - CPU_ZERO(mask); - CPU_SET(0, mask); -} - -void -platform_init_secondary(int cpuid) -{ - device_t ic; - int ipi; - - ipi = platform_ipi_hardintr_num(); - - ic = devclass_get_device(devclass_find("beripic"), cpuid); - picmap[cpuid] = ic; - beripic_setup_ipi(ic, cpuid, ipi); - - /* Unmask the interrupt */ - if (cpuid != 0) { - mips_wr_status(mips_rd_status() | (((1 << ipi) << 8) << 2)); - } -} - -void -platform_ipi_send(int cpuid) -{ - - mips_sync(); /* Ordering, liveness. */ - - beripic_send_ipi(picmap[cpuid], cpuid); -} - -void -platform_ipi_clear(void) -{ - int cpuid; - - cpuid = platform_processor_id(); - - beripic_clear_ipi(picmap[cpuid], cpuid); -} - -/* - * XXXBED: Set via FDT? - */ -int -platform_ipi_hardintr_num(void) -{ - - return (4); -} - -int -platform_ipi_softintr_num(void) -{ - - return (-1); -} - -/* - * XXXBED: Fine for MT, will need something better for multi-core. - */ -struct cpu_group * -platform_smp_topo(void) -{ - - return (smp_topo_none()); -} - -void -platform_init_ap(int cpuid) -{ - uint32_t status; - u_int clock_int_mask; - - KASSERT(cpuid < MAXCPU, ("%s: invalid CPU id %d", __func__, cpuid)); - - /* Make sure coprocessors are enabled. */ - status = mips_rd_status(); - status |= (MIPS_SR_COP_0_BIT | MIPS_SR_COP_1_BIT); -#if defined(CPU_CHERI) - status |= MIPS_SR_COP_2_BIT; -#endif - mips_wr_status(status); - -#if 0 - register_t hwrena; - /* Enable HDWRD instruction in userspace. Also enables statcounters. */ - hwrena = mips_rd_hwrena(); - hwrena |= (MIPS_HWRENA_CC | MIPS_HWRENA_CCRES | MIPS_HWRENA_CPUNUM | - MIPS_HWRENA_BERI_STATCOUNTERS_MASK); - mips_wr_hwrena(hwrena); -#endif - - /* - * Enable per-thread timer. - */ - clock_int_mask = hard_int_mask(5); - set_intr_mask(clock_int_mask); -} - -/* - * BERI startup conforms to the spin-table start method defined in the - * ePAPR 1.0 spec. The initial spin waiting for an address is started - * by the CPU firmware. - */ -int -platform_start_ap(int cpuid) -{ - phandle_t cpu; - char prop[16]; - struct spin_entry *se; - - KASSERT(cpuid != 0, ("%s: can't start CPU 0!\n", __func__)); - KASSERT((cpuid > 0 && cpuid < MAXCPU), - ("%s: invalid CPU id %d", __func__, cpuid)); - - cpu = cpu_of_nodes[cpuid]; - if (OF_getprop(cpu, "status", &prop, sizeof(prop)) <= 0) { - if (bootverbose) - printf("%s: CPU %d has no status property, " - "trying parent\n", __func__, cpuid); - if (OF_getprop(OF_parent(cpu), "status", &prop, - sizeof(prop)) <= 0) - panic("%s: CPU %d has no status property", __func__, - cpuid); - } - if (strcmp("disabled", prop) != 0) - panic("%s: CPU %d status is '%s' not 'disabled'", - __func__, cpuid, prop); - - if (OF_getprop(cpu, "enable-method", &prop, sizeof(prop)) <= 0) { - if (bootverbose) - printf("%s: CPU %d has no enable-method, " - "trying parent\n", __func__, cpuid); - if (OF_getprop(OF_parent(cpu), "enable-method", &prop, - sizeof(prop)) <= 0) - panic("%s: CPU %d has no enable-method property", - __func__, cpuid); - } - if (strcmp("spin-table", prop) != 0) - panic("%s: CPU %d enable-method is '%s' not " - "'spin-table'", __func__, cpuid, prop); - - if (OF_getprop(cpu, "cpu-release-addr", &se, sizeof(se)) <= 0) - panic("%s: CPU %d has missing or invalid cpu-release-addr", - __func__, cpuid); - se->pir = cpuid; - if (bootverbose) - printf("%s: writing %p to %p\n", __func__, mpentry, - &se->entry_addr); - - mips_sync(); /* Ordering. */ - se->entry_addr = (intptr_t)mpentry; - mips_sync(); /* Liveness. */ - - return (0); -} diff --git a/sys/mips/beri/beri_mp.h b/sys/mips/beri/beri_mp.h deleted file mode 100644 index c08cc84cce4..00000000000 --- a/sys/mips/beri/beri_mp.h +++ /dev/null @@ -1,83 +0,0 @@ -/*- - * Copyright (c) 2014 SRI International - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-11-C-0249) - * ("MRC2"), as part of the DARPA MRC research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -static inline int -beri_get_core(void) -{ - uint32_t cinfo; - - cinfo = mips_rd_cinfo(); - return (cinfo & 0xffff); -} - -static inline int -beri_get_ncores(void) -{ - uint32_t cinfo; - - cinfo = mips_rd_cinfo(); - return ((cinfo >> 16) + 1); -} - -static inline int -beri_get_thread(void) -{ - uint32_t tinfo; - - tinfo = mips_rd_tinfo(); - return (tinfo & 0xffff); -} - -static inline int -beri_get_nthreads(void) -{ - uint32_t tinfo; - - tinfo = mips_rd_tinfo(); - return ((tinfo >> 16) + 1); -} - -static inline int -beri_get_cpu(void) -{ - - return ((beri_get_core() * beri_get_nthreads()) + beri_get_thread()); -} - -static inline int -beri_get_ncpus(void) -{ - - return(beri_get_ncores() * beri_get_nthreads()); -} - -void beripic_setup_ipi(device_t dev, u_int tid, u_int ipi_irq); -void beripic_send_ipi(device_t dev, u_int tid); -void beripic_clear_ipi(device_t dev, u_int tid); diff --git a/sys/mips/beri/beri_pic.c b/sys/mips/beri/beri_pic.c deleted file mode 100644 index 9968de75d23..00000000000 --- a/sys/mips/beri/beri_pic.c +++ /dev/null @@ -1,368 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2017 Ruslan Bukin - * Copyright (c) 2013 SRI International - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#ifdef SMP -#include -#endif - -#include -#include -#include -#include - -#include "pic_if.h" - -#define BP_NUM_HARD_IRQS 5 -#define BP_NUM_IRQS 32 -/* We use hard irqs 15-31 as soft */ -#define BP_FIRST_SOFT 16 - -#define BP_CFG_IRQ_S 0 -#define BP_CFG_IRQ_M (0xf << BP_CFG_IRQ_S) -#define BP_CFG_TID_S 8 -#define BP_CFG_TID_M (0x7FFFFF << BP_CFG_TID_S) -#define BP_CFG_ENABLE (1 << 31) - -enum { - BP_CFG, - BP_IP_READ, - BP_IP_SET, - BP_IP_CLEAR -}; - -struct beripic_softc; - -struct beri_pic_isrc { - struct intr_irqsrc isrc; - u_int irq; - uint32_t mips_hard_irq; -}; - -struct hirq { - uint32_t irq; - struct beripic_softc *sc; -}; - -struct beripic_softc { - device_t dev; - uint32_t nirqs; - struct beri_pic_isrc irqs[BP_NUM_IRQS]; - struct resource *res[4 + BP_NUM_HARD_IRQS]; - void *ih[BP_NUM_HARD_IRQS]; - struct hirq hirq[BP_NUM_HARD_IRQS]; - uint8_t mips_hard_irq_idx; -}; - -static struct resource_spec beri_pic_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { SYS_RES_MEMORY, 1, RF_ACTIVE }, - { SYS_RES_MEMORY, 2, RF_ACTIVE }, - { SYS_RES_MEMORY, 3, RF_ACTIVE }, - { SYS_RES_IRQ, 0, RF_ACTIVE }, - { SYS_RES_IRQ, 1, RF_ACTIVE }, - { SYS_RES_IRQ, 2, RF_ACTIVE }, - { SYS_RES_IRQ, 3, RF_ACTIVE }, - { SYS_RES_IRQ, 4, RF_ACTIVE }, - { -1, 0 } -}; - -static int -beri_pic_intr(void *arg) -{ - struct beripic_softc *sc; - struct intr_irqsrc *isrc; - struct hirq *h; - uint64_t intr; - uint64_t reg; - int i; - - h = arg; - sc = h->sc; - - intr = bus_read_8(sc->res[BP_IP_READ], 0); - while ((i = fls(intr)) != 0) { - i--; - intr &= ~(1u << i); - - isrc = &sc->irqs[i].isrc; - - reg = bus_read_8(sc->res[BP_CFG], i * 8); - if ((reg & BP_CFG_IRQ_M) != h->irq) { - continue; - } - if ((reg & (BP_CFG_ENABLE)) == 0) { - continue; - } - - if (intr_isrc_dispatch(isrc, curthread->td_intr_frame) != 0) { - device_printf(sc->dev, "Stray interrupt %u detected\n", i); - } - - bus_write_8(sc->res[BP_IP_CLEAR], 0, (1 << i)); - } - - return (FILTER_HANDLED); -} - -static int -beripic_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "sri-cambridge,beri-pic")) - return (ENXIO); - - device_set_desc(dev, "BERI Programmable Interrupt Controller"); - - return (BUS_PROBE_DEFAULT); -} - -static int -beripic_attach(device_t dev) -{ - struct beripic_softc *sc; - struct beri_pic_isrc *pic_isrc; - const char *name; - struct intr_irqsrc *isrc; - intptr_t xref; - uint32_t unit; - int err; - int i; - - sc = device_get_softc(dev); - sc->dev = dev; - - if (bus_alloc_resources(dev, beri_pic_spec, sc->res)) { - device_printf(dev, "could not allocate resources\n"); - return (ENXIO); - } - - xref = OF_xref_from_node(ofw_bus_get_node(dev)); - name = device_get_nameunit(dev); - unit = device_get_unit(dev); - sc->nirqs = BP_NUM_IRQS; - - for (i = 0; i < sc->nirqs; i++) { - sc->irqs[i].irq = i; - isrc = &sc->irqs[i].isrc; - - /* Assign mips hard irq number. */ - pic_isrc = (struct beri_pic_isrc *)isrc; - pic_isrc->mips_hard_irq = sc->mips_hard_irq_idx++; - /* Last IRQ is used for IPIs. */ - if (sc->mips_hard_irq_idx >= (BP_NUM_HARD_IRQS - 1)) { - sc->mips_hard_irq_idx = 0; - } - - err = intr_isrc_register(isrc, sc->dev, - 0, "pic%d,%d", unit, i); - bus_write_8(sc->res[BP_CFG], i * 8, 0); - } - - /* - * Now, when everything is initialized, it's right time to - * register interrupt controller to interrupt framefork. - */ - if (intr_pic_register(dev, xref) == NULL) { - device_printf(dev, "could not register PIC\n"); - return (ENXIO); - } - - /* Last IRQ is used for IPIs. */ - for (i = 0; i < (BP_NUM_HARD_IRQS - 1); i++) { - sc->hirq[i].sc = sc; - sc->hirq[i].irq = i; - if (bus_setup_intr(dev, sc->res[4+i], INTR_TYPE_CLK, - beri_pic_intr, NULL, &sc->hirq[i], sc->ih[i])) { - device_printf(dev, "could not setup irq handler\n"); - intr_pic_deregister(dev, xref); - return (ENXIO); - } - } - - return (0); -} - -static void -beri_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - struct beri_pic_isrc *pic_isrc; - struct beripic_softc *sc; - uint64_t reg; - - sc = device_get_softc(dev); - pic_isrc = (struct beri_pic_isrc *)isrc; - - reg = BP_CFG_ENABLE; - reg |= (pic_isrc->mips_hard_irq << BP_CFG_IRQ_S); - bus_write_8(sc->res[BP_CFG], pic_isrc->irq * 8, reg); -} - -static void -beri_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - struct beri_pic_isrc *pic_isrc; - struct beripic_softc *sc; - uint64_t reg; - - sc = device_get_softc(dev); - pic_isrc = (struct beri_pic_isrc *)isrc; - - reg = bus_read_8(sc->res[BP_CFG], pic_isrc->irq * 8); - reg &= ~BP_CFG_ENABLE; - bus_write_8(sc->res[BP_CFG], pic_isrc->irq * 8, reg); -} - -static int -beri_pic_map_intr(device_t dev, struct intr_map_data *data, - struct intr_irqsrc **isrcp) -{ - struct beripic_softc *sc; - struct intr_map_data_fdt *daf; - uint32_t irq; - - sc = device_get_softc(dev); - daf = (struct intr_map_data_fdt *)data; - - if (data == NULL || data->type != INTR_MAP_DATA_FDT || - daf->ncells != 1 || daf->cells[0] >= sc->nirqs) - return (EINVAL); - - irq = daf->cells[0]; - - *isrcp = &sc->irqs[irq].isrc; - - return (0); -} - -static void -beri_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - beri_pic_enable_intr(dev, isrc); -} - -static void -beri_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - beri_pic_disable_intr(dev, isrc); -} - -#ifdef SMP -void -beripic_setup_ipi(device_t dev, u_int tid, u_int ipi_irq) -{ - struct beripic_softc *sc; - uint64_t reg; - - sc = device_get_softc(dev); - - reg = (BP_CFG_ENABLE); - reg |= (ipi_irq << BP_CFG_IRQ_S); - reg |= (tid << BP_CFG_TID_S); - bus_write_8(sc->res[BP_CFG], ((BP_FIRST_SOFT + tid) * 8), reg); -} - -void -beripic_send_ipi(device_t dev, u_int tid) -{ - struct beripic_softc *sc; - uint64_t bit; - - sc = device_get_softc(dev); - - bit = (BP_FIRST_SOFT + tid); - KASSERT(bit < BP_NUM_IRQS, ("tid (%d) to large\n", tid)); - - bus_write_8(sc->res[BP_IP_SET], 0x0, (1 << bit)); -} - -void -beripic_clear_ipi(device_t dev, u_int tid) -{ - struct beripic_softc *sc; - uint64_t bit; - - sc = device_get_softc(dev); - - bit = (BP_FIRST_SOFT + tid); - KASSERT(bit < BP_NUM_IRQS, ("tid (%d) to large\n", tid)); - - bus_write_8(sc->res[BP_IP_CLEAR], 0x0, (1 << bit)); -} -#endif - -static device_method_t beripic_fdt_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, beripic_probe), - DEVMETHOD(device_attach, beripic_attach), - - /* Interrupt controller interface */ - DEVMETHOD(pic_enable_intr, beri_pic_enable_intr), - DEVMETHOD(pic_disable_intr, beri_pic_disable_intr), - DEVMETHOD(pic_map_intr, beri_pic_map_intr), - DEVMETHOD(pic_post_ithread, beri_pic_post_ithread), - DEVMETHOD(pic_pre_ithread, beri_pic_pre_ithread), - - DEVMETHOD_END -}; - -devclass_t beripic_devclass; - -static driver_t beripic_driver = { - "beripic", - beripic_fdt_methods, - sizeof(struct beripic_softc) -}; - -EARLY_DRIVER_MODULE(beripic, ofwbus, beripic_driver, beripic_devclass, 0, 0, - BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); diff --git a/sys/mips/beri/files.beri b/sys/mips/beri/files.beri deleted file mode 100644 index 303293d495b..00000000000 --- a/sys/mips/beri/files.beri +++ /dev/null @@ -1,26 +0,0 @@ -dev/altera/atse/if_atse.c optional altera_atse -dev/altera/atse/if_atse_fdt.c optional altera_atse fdt -dev/altera/atse/if_atse_nexus.c optional altera_atse -dev/altera/jtag_uart/altera_jtag_uart_cons.c optional altera_jtag_uart -dev/altera/jtag_uart/altera_jtag_uart_tty.c optional altera_jtag_uart -dev/altera/jtag_uart/altera_jtag_uart_fdt.c optional altera_jtag_uart fdt -dev/altera/jtag_uart/altera_jtag_uart_nexus.c optional altera_jtag_uart -dev/beri/virtio/virtio_mmio_platform.c optional virtio_mmio -dev/netfpga10g/nf10bmac/if_nf10bmac_fdt.c optional netfpga10g_nf10bmac fdt -dev/netfpga10g/nf10bmac/if_nf10bmac.c optional netfpga10g_nf10bmac -dev/terasic/de4led/terasic_de4led.c optional terasic_de4led -dev/terasic/de4led/terasic_de4led_fdt.c optional terasic_de4led fdt -dev/terasic/de4led/terasic_de4led_nexus.c optional terasic_de4led -dev/terasic/mtl/terasic_mtl.c optional terasic_mtl -dev/terasic/mtl/terasic_mtl_fdt.c optional terasic_mtl fdt -dev/terasic/mtl/terasic_mtl_nexus.c optional terasic_mtl -dev/terasic/mtl/terasic_mtl_pixel.c optional terasic_mtl -dev/terasic/mtl/terasic_mtl_reg.c optional terasic_mtl -dev/terasic/mtl/terasic_mtl_syscons.c optional terasic_mtl sc -dev/terasic/mtl/terasic_mtl_text.c optional terasic_mtl -dev/terasic/mtl/terasic_mtl_vt.c optional terasic_mtl vt -mips/beri/beri_iommu.c optional xdma -mips/beri/beri_machdep.c standard -mips/beri/beri_mp.c optional smp -mips/beri/beri_pic.c optional fdt -mips/mips/tick.c standard diff --git a/sys/mips/beri/std.beri b/sys/mips/beri/std.beri deleted file mode 100644 index b8a1ec68960..00000000000 --- a/sys/mips/beri/std.beri +++ /dev/null @@ -1,6 +0,0 @@ -files "../beri/files.beri" - -cpu CPU_MIPS4KC - -options BERI_LARGE_TLB -options PLATFORM_INIT_SECONDARY diff --git a/sys/mips/broadcom/bcm_bmips.c b/sys/mips/broadcom/bcm_bmips.c deleted file mode 100644 index bdecee90e62..00000000000 --- a/sys/mips/broadcom/bcm_bmips.c +++ /dev/null @@ -1,417 +0,0 @@ -/*- - * Copyright (c) 2016 Landon Fuller - * Copyright (c) 2017 The FreeBSD Foundation - * All rights reserved. - * - * Portions of this software were developed by Landon Fuller - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce at minimum a disclaimer - * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any - * redistribution must be conditioned upon including a substantially - * similar Disclaimer requirement for further binary redistribution. - * - * NO WARRANTY - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER - * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGES. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include -#include - -#include "pic_if.h" - -#include "bcm_mipsvar.h" -#include "bcm_bmipsreg.h" - -/* - * BMIPS32 and BMIPS3300 core driver. - * - * These cores are only found on siba(4) chipsets, allowing - * us to assume the availability of siba interrupt registers. - */ - -struct bcm_bmips_softc; - -static int bcm_bmips_pic_intr(void *arg); -static void bcm_bmips_mask_irq(struct bcm_bmips_softc *sc, u_int mips_irq, - u_int ivec); -static void bcm_bmips_unmask_irq(struct bcm_bmips_softc *sc, u_int mips_irq, - u_int ivec); - -static const struct bhnd_device bcm_bmips_devs[] = { - BHND_DEVICE(BCM, MIPS33, NULL, NULL, BHND_DF_SOC), - BHND_DEVICE_END -}; - -struct bcm_bmips_softc { - struct bcm_mips_softc bcm_mips; /**< parent softc */ - device_t dev; - struct resource *mem; /**< cpu core registers */ - int mem_rid; - struct resource *cfg; /**< cpu core's cfg0 register block */ - int cfg_rid; -}; - -#define BCM_BMIPS_NCPU_IRQS 5 /**< MIPS HW IRQs 0-4 are assignable */ -#define BCM_BMIPS_TIMER_IRQ 5 /**< MIPS HW IRQ5 is always assigned to the timer */ - -static int -bcm_bmips_probe(device_t dev) -{ - const struct bhnd_device *id; - - id = bhnd_device_lookup(dev, bcm_bmips_devs, sizeof(bcm_bmips_devs[0])); - if (id == NULL) - return (ENXIO); - - /* Check the chip type; should only be found on siba(4) chipsets */ - if (bhnd_get_chipid(dev)->chip_type != BHND_CHIPTYPE_SIBA) - return (ENXIO); - - bhnd_set_default_core_desc(dev); - return (BUS_PROBE_DEFAULT); -} - -static int -bcm_bmips_attach(device_t dev) -{ - struct bcm_bmips_softc *sc; - int error; - - sc = device_get_softc(dev); - sc->dev = dev; - - /* Allocate our core's register block */ - sc->mem_rid = 0; - sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid, - RF_ACTIVE); - if (sc->mem == NULL) { - device_printf(dev, "failed to allocate cpu register block\n"); - error = ENXIO; - goto failed; - } - - /* Determine the resource ID for our siba CFG0 registers */ - sc->cfg_rid = bhnd_get_port_rid(dev, BHND_PORT_AGENT, 0, 0); - if (sc->cfg_rid == -1) { - device_printf(dev, "missing required cfg0 register block\n"); - error = ENXIO; - goto failed; - } - - /* Allocate our CFG0 register block */ - sc->cfg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->cfg_rid, - RF_ACTIVE|RF_SHAREABLE); - if (sc->cfg == NULL) { - device_printf(dev, "failed to allocate cfg0 register block\n"); - error = ENXIO; - goto failed; - } - - /* Clear interrupt map */ - bus_write_4(sc->cfg, SIBA_CFG0_INTVEC, 0x0); /* MIPS IRQ0 */ - bus_write_4(sc->cfg, SIBA_CFG0_IPSFLAG, 0x0); /* MIPS IRQ1-4 */ - - /* Initialize the generic BHND MIPS driver state */ - error = bcm_mips_attach(dev, BCM_BMIPS_NCPU_IRQS, BCM_BMIPS_TIMER_IRQ, - bcm_bmips_pic_intr); - if (error) - goto failed; - - return (0); - -failed: - if (sc->mem != NULL) - bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem); - - if (sc->cfg != NULL) - bus_release_resource(dev, SYS_RES_MEMORY, sc->cfg_rid, sc->cfg); - - return (error); -} - -static int -bcm_bmips_detach(device_t dev) -{ - struct bcm_bmips_softc *sc; - int error; - - sc = device_get_softc(dev); - - if ((error = bcm_mips_detach(dev))) - return (error); - - bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem); - bus_release_resource(dev, SYS_RES_MEMORY, sc->cfg_rid, sc->cfg); - - return (0); -} - -/* PIC_DISABLE_INTR() */ -static void -bcm_bmips_pic_disable_intr(device_t dev, struct intr_irqsrc *irqsrc) -{ - struct bcm_bmips_softc *sc; - struct bcm_mips_irqsrc *isrc; - - sc = device_get_softc(dev); - isrc = (struct bcm_mips_irqsrc *)irqsrc; - - KASSERT(isrc->cpuirq != NULL, ("no assigned MIPS IRQ")); - - bcm_bmips_mask_irq(sc, isrc->cpuirq->mips_irq, isrc->ivec); -} - -/* PIC_ENABLE_INTR() */ -static void -bcm_bmips_pic_enable_intr(device_t dev, struct intr_irqsrc *irqsrc) -{ - struct bcm_bmips_softc *sc; - struct bcm_mips_irqsrc *isrc; - - sc = device_get_softc(dev); - isrc = (struct bcm_mips_irqsrc *)irqsrc; - - KASSERT(isrc->cpuirq != NULL, ("no assigned MIPS IRQ")); - - bcm_bmips_unmask_irq(sc, isrc->cpuirq->mips_irq, isrc->ivec); -} - -/* PIC_PRE_ITHREAD() */ -static void -bcm_bmips_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - bcm_bmips_pic_disable_intr(dev, isrc); -} - -/* PIC_POST_ITHREAD() */ -static void -bcm_bmips_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - bcm_bmips_pic_enable_intr(dev, isrc); -} - -/* PIC_POST_FILTER() */ -static void -bcm_bmips_pic_post_filter(device_t dev, struct intr_irqsrc *isrc) -{ -} - -/** - * Disable routing of backplane interrupt vector @p ivec to MIPS IRQ - * @p mips_irq. - */ -static void -bcm_bmips_mask_irq(struct bcm_bmips_softc *sc, u_int mips_irq, u_int ivec) -{ - KASSERT(ivec < SIBA_MAX_INTR, ("invalid sbflag# ivec")); - KASSERT(mips_irq < sc->bcm_mips.num_cpuirqs, ("invalid MIPS IRQ %u", - mips_irq)); - - if (mips_irq == 0) { - uint32_t sbintvec; - - sbintvec = bus_read_4(sc->cfg, SIBA_CFG0_INTVEC); - sbintvec &= ~(1 << ivec); - bus_write_4(sc->cfg, SIBA_CFG0_INTVEC, sbintvec); - } else { - uint32_t ipsflag; - - /* Can we route this via ipsflag? */ - KASSERT(((1 << ivec) & SIBA_IPS_INT1_MASK) != 0, - ("cannot route high sbflag# ivec %u", ivec)); - - ipsflag = bus_read_4(sc->cfg, SIBA_CFG0_IPSFLAG); - ipsflag &= ~( - ((1 << ivec) << SIBA_IPS_INT_SHIFT(mips_irq)) & - SIBA_IPS_INT_MASK(mips_irq)); - bus_write_4(sc->cfg, SIBA_CFG0_IPSFLAG, ipsflag); - } - -} - -/** - * Enable routing of an interrupt. - */ -static void -bcm_bmips_unmask_irq(struct bcm_bmips_softc *sc, u_int mips_irq, u_int ivec) -{ - KASSERT(ivec < SIBA_MAX_INTR, ("invalid sbflag# ivec")); - KASSERT(mips_irq < sc->bcm_mips.num_cpuirqs, ("invalid MIPS IRQ %u", - mips_irq)); - - if (mips_irq == 0) { - uint32_t sbintvec; - - sbintvec = bus_read_4(sc->cfg, SIBA_CFG0_INTVEC); - sbintvec |= (1 << ivec); - bus_write_4(sc->cfg, SIBA_CFG0_INTVEC, sbintvec); - } else { - uint32_t ipsflag; - - /* Can we route this via ipsflag? */ - KASSERT(((1 << ivec) & SIBA_IPS_INT1_MASK) != 0, - ("cannot route high sbflag# ivec %u", ivec)); - - ipsflag = bus_read_4(sc->cfg, SIBA_CFG0_IPSFLAG); - ipsflag |= (ivec << SIBA_IPS_INT_SHIFT(mips_irq)) & - SIBA_IPS_INT_MASK(mips_irq); - bus_write_4(sc->cfg, SIBA_CFG0_IPSFLAG, ipsflag); - } -} - -/* our MIPS CPU interrupt filter */ -static int -bcm_bmips_pic_intr(void *arg) -{ - struct bcm_bmips_softc *sc; - struct bcm_mips_cpuirq *cpuirq; - struct bcm_mips_irqsrc *isrc_solo; - uint32_t sbintvec, sbstatus; - u_int mips_irq, i; - int error; - - cpuirq = arg; - sc = (struct bcm_bmips_softc*)cpuirq->sc; - - /* Fetch current interrupt state */ - sbstatus = bus_read_4(sc->cfg, SIBA_CFG0_FLAGST); - - /* Fetch mask of interrupt vectors routed to this MIPS IRQ */ - mips_irq = cpuirq->mips_irq; - if (mips_irq == 0) { - sbintvec = bus_read_4(sc->cfg, SIBA_CFG0_INTVEC); - } else { - uint32_t ipsflag; - - ipsflag = bus_read_4(sc->cfg, SIBA_CFG0_IPSFLAG); - - /* Map to an intvec-compatible representation */ - switch (mips_irq) { - case 1: - sbintvec = (ipsflag & SIBA_IPS_INT1_MASK) >> - SIBA_IPS_INT1_SHIFT; - break; - case 2: - sbintvec = (ipsflag & SIBA_IPS_INT2_MASK) >> - SIBA_IPS_INT2_SHIFT; - break; - case 3: - sbintvec = (ipsflag & SIBA_IPS_INT3_MASK) >> - SIBA_IPS_INT3_SHIFT; - break; - case 4: - sbintvec = (ipsflag & SIBA_IPS_INT4_MASK) >> - SIBA_IPS_INT4_SHIFT; - break; - default: - panic("invalid irq %u", mips_irq); - } - } - - /* Ignore interrupts not routed to this MIPS IRQ */ - sbstatus &= sbintvec; - - /* Handle isrc_solo direct dispatch path */ - isrc_solo = cpuirq->isrc_solo; - if (isrc_solo != NULL) { - if (sbstatus & BCM_MIPS_IVEC_MASK(isrc_solo)) { - error = intr_isrc_dispatch(&isrc_solo->isrc, - curthread->td_intr_frame); - if (error) { - device_printf(sc->dev, "Stray interrupt %u " - "detected\n", isrc_solo->ivec); - bcm_bmips_pic_disable_intr(sc->dev, - &isrc_solo->isrc); - } - } - - sbstatus &= ~(BCM_MIPS_IVEC_MASK(isrc_solo)); - if (sbstatus == 0) - return (FILTER_HANDLED); - - /* Report and mask additional stray interrupts */ - while ((i = fls(sbstatus)) != 0) { - i--; /* Get a 0-offset interrupt. */ - sbstatus &= ~(1 << i); - - device_printf(sc->dev, "Stray interrupt %u " - "detected\n", i); - bcm_bmips_mask_irq(sc, mips_irq, i); - } - - return (FILTER_HANDLED); - } - - /* Standard dispatch path */ - while ((i = fls(sbstatus)) != 0) { - i--; /* Get a 0-offset interrupt. */ - sbstatus &= ~(1 << i); - - KASSERT(i < nitems(sc->bcm_mips.isrcs), ("invalid ivec %u", i)); - - error = intr_isrc_dispatch(&sc->bcm_mips.isrcs[i].isrc, - curthread->td_intr_frame); - if (error) { - device_printf(sc->dev, "Stray interrupt %u detected\n", - i); - bcm_bmips_mask_irq(sc, mips_irq, i); - continue; - } - } - - return (FILTER_HANDLED); -} - -static device_method_t bcm_bmips_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, bcm_bmips_probe), - DEVMETHOD(device_attach, bcm_bmips_attach), - DEVMETHOD(device_detach, bcm_bmips_detach), - - /* Interrupt controller interface */ - DEVMETHOD(pic_disable_intr, bcm_bmips_pic_disable_intr), - DEVMETHOD(pic_enable_intr, bcm_bmips_pic_enable_intr), - DEVMETHOD(pic_pre_ithread, bcm_bmips_pic_pre_ithread), - DEVMETHOD(pic_post_ithread, bcm_bmips_pic_post_ithread), - DEVMETHOD(pic_post_filter, bcm_bmips_pic_post_filter), - - DEVMETHOD_END -}; - -static devclass_t bcm_mips_devclass; - -DEFINE_CLASS_1(bcm_mips, bcm_bmips_driver, bcm_bmips_methods, sizeof(struct bcm_bmips_softc), bcm_mips_driver); -EARLY_DRIVER_MODULE(bcm_bmips, bhnd, bcm_bmips_driver, bcm_mips_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); - -MODULE_VERSION(bcm_bmips, 1); -MODULE_DEPEND(bcm_bmips, bhnd, 1, 1, 1); diff --git a/sys/mips/broadcom/bcm_bmips_exts.h b/sys/mips/broadcom/bcm_bmips_exts.h deleted file mode 100644 index 3f3e0e1df6f..00000000000 --- a/sys/mips/broadcom/bcm_bmips_exts.h +++ /dev/null @@ -1,187 +0,0 @@ -/*- - * Copyright 2000,2001,2002,2003 Broadcom Corporation. - * All rights reserved. - * - * This file is derived from the sbmips32.h header distributed - * by Broadcom with the CFE 1.4.2 sources. - * - * This software is furnished under license and may be used and - * copied only in accordance with the following terms and - * conditions. Subject to these conditions, you may download, - * copy, install, use, modify and distribute modified or unmodified - * copies of this software in source and/or binary form. No title - * or ownership is transferred hereby. - * - * 1) Any source code used, modified or distributed must reproduce - * and retain this copyright notice and list of conditions - * as they appear in the source file. - * - * 2) No right is granted to use any trade name, trademark, or - * logo of Broadcom Corporation. The "Broadcom Corporation" - * name may not be used to endorse or promote products derived - * from this software without the prior written permission of - * Broadcom Corporation. - * - * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED - * WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR - * PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT - * SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN - * PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY - * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* ********************************************************************* - * Broadcom Common Firmware Environment (CFE) - * - * MIPS32 CPU definitions File: sbmips32.h - * - * This module contains constants and macros specific to the - * Broadcom MIPS32 core. In addition to generic MIPS32, it - * includes definitions for the MIP32-01 and MIPS3302 OCP cores - * for the Silicon Backplane. - * - *********************************************************************/ - -#ifndef _MIPS_BROADCOM_BCM_BMIPS_EXTS_H_ -#define _MIPS_BROADCOM_BCM_BMIPS_EXTS_H_ - -#include - -/* - * The following Broadcom Custom CP0 Registers appear in the Broadcom - * BMIPS330x MIPS32 core. - */ - -#define BMIPS_COP_0_BCMCFG 22 - -/* - * Custom CP0 Accessors - */ - -#define BCM_BMIPS_RW32_COP0_SEL(n,r,s) \ -static __inline uint32_t \ -bcm_bmips_rd_ ## n(void) \ -{ \ - int v0; \ - __asm __volatile ("mfc0 %[v0], $"__XSTRING(r)", "__XSTRING(s)";" \ - : [v0] "=&r"(v0)); \ - mips_barrier(); \ - return (v0); \ -} \ -static __inline void \ -bcm_bmips_wr_ ## n(uint32_t a0) \ -{ \ - __asm __volatile ("mtc0 %[a0], $"__XSTRING(r)", "__XSTRING(s)";" \ - __XSTRING(COP0_SYNC)";" \ - "nop;" \ - "nop;" \ - : \ - : [a0] "r"(a0)); \ - mips_barrier(); \ -} struct __hack - -BCM_BMIPS_RW32_COP0_SEL(pllcfg1, MIPS_COP_0_CONFIG, 1); -BCM_BMIPS_RW32_COP0_SEL(pllcfg2, MIPS_COP_0_CONFIG, 2); -BCM_BMIPS_RW32_COP0_SEL(clksync, MIPS_COP_0_CONFIG, 3); -BCM_BMIPS_RW32_COP0_SEL(pllcfg3, MIPS_COP_0_CONFIG, 4); -BCM_BMIPS_RW32_COP0_SEL(rstcfg, MIPS_COP_0_CONFIG, 5); - -/* - * Broadcom PLLConfig1 Register (22, select 1) - */ - -/* SoftMIPSPLLCfg */ -#define BMIPS_BCMCFG_PLLCFG1_MC_SHIFT 10 -#define BMIPS_BCMCFG_PLLCFG1_MC_MASK 0xFFFFFC00 - -/* SoftISBPLLCfg */ -#define BMIPS_BCMCFG_PLLCFG1_BC_SHIFT 5 -#define BMIPS_BCMCFG_PLLCFG1_BC_MASK 0x000003E0 - -/* SoftRefPLLCfg */ -#define BMIPS_BCMCFG_PLLCFG1_PC_SHIFT 0 -#define BMIPS_BCMCFG_PLLCFG1_PC_MASK 0x0000001F - -/* - * Broadcom PLLConfig2 Register (22, select 2) - */ - -/* Soft1to1ClkRatio */ -#define BMIPS_BCMCFG_PLLCFG2_CR (1<<23) - -/* SoftUSBxPLLCfg */ -#define BMIPS_BCMCFG_PLLCFG2_UC_SHIFT 15 -#define BMIPS_BCMCFG_PLLCFG2_UC_MASK 0x007F8000 - -/* SoftIDExPLLCfg */ -#define BMIPS_BCMCFG_PLLCFG2_IC_SHIFT 7 -#define BMIPS_BCMCFG_PLLCFG2_IC_MASK 0x00007F80 - -#define BMIPS_BCMCFG_PLLCFG2_BE (1<<6) /* ISBxSoftCfgEnable */ -#define BMIPS_BCMCFG_PLLCFG2_UE (1<<5) /* USBxSoftCfgEnable */ -#define BMIPS_BCMCFG_PLLCFG2_IE (1<<4) /* IDExSoftCfgEnable */ -#define BMIPS_BCMCFG_PLLCFG2_CA (1<<3) /* CfgActive */ -#define BMIPS_BCMCFG_PLLCFG2_CF (1<<2) /* RefSoftCfgEnable */ -#define BMIPS_BCMCFG_PLLCFG2_CI (1<<1) /* ISBSoftCfgEnable */ -#define BMIPS_BCMCFG_PLLCFG2_CC (1<<0) /* MIPSSoftCfgEnable */ - -/* - * Broadcom ClkSync Register (22, select 3) - */ -/* SoftClkCfgHigh */ -#define BMIPS_BCMCFG_CLKSYNC_CH_SHIFT 16 -#define BMIPS_BCMCFG_CLKSYNC_CH_MASK 0xFFFF0000 - -/* SoftClkCfgLow */ -#define BMIPS_BCMCFG_CLKSYNC_CL_SHIFT 0 -#define BMIPS_BCMCFG_CLKSYNC_CL_MASK 0x0000FFFF - -/* - * Broadcom ISBxPLLConfig3 Register (22, select 4) - */ - -/* AsyncClkRatio */ -#define BMIPS_BCMCFG_PLLCFG3_AR_SHIFT 23 -#define BMIPS_BCMCFG_PLLCFG3_AR_MASK 0x01800000 - -#define BMIPS_BCMCFG_PLLCFG3_SM (1<<22) /* SyncMode */ - -/* SoftISBxPLLCfg */ -#define BMIPS_BCMCFG_PLLCFG3_IC_SHIFT 0 -#define BMIPS_BCMCFG_PLLCFG3_IC_MASK 0x003FFFFF - -/* - * Broadcom BRCMRstConfig Register (22, select 5) - */ - -#define BMIPS_BCMCFG_RSTCFG_SR (1<<18) /* SSMR */ -#define BMIPS_BCMCFG_RSTCFG_DT (1<<16) /* BHTD */ - -/* RStSt */ -#define BMIPS_BCMCFG_RSTCFG_RS_SHIFT 8 -#define BMIPS_BCMCFG_RSTCFG_RS_MASK 0x00001F00 -#define BMIPS_BCMCFG_RST_OTHER 0x00 -#define BMIPS_BCMCFG_RST_SH 0x01 -#define BMIPS_BCMCFG_RST_SS 0x02 -#define BMIPS_BCMCFG_RST_EJTAG 0x04 -#define BMIPS_BCMCFG_RST_WDOG 0x08 -#define BMIPS_BCMCFG_RST_CRC 0x10 - -#define BMIPS_BCMCFG_RSTCFG_CR (1<<7) /* RStCr */ - -/* WBMD */ -#define BMIPS_BCMCFG_RSTCFG_WD_SHIFT 3 -#define BMIPS_BCMCFG_RSTCFG_WD_MASK 0x00000078 - -#define BMIPS_BCMCFG_RSTCFG_SS (1<<2) /* SSR */ -#define BMIPS_BCMCFG_RSTCFG_SH (1<<1) /* SHR */ -#define BMIPS_BCMCFG_RSTCFG_BR (1<<0) /* BdR */ - -#endif /* _MIPS_BROADCOM_BCM_BMIPS_EXTS_H_ */ diff --git a/sys/mips/broadcom/bcm_bmipsreg.h b/sys/mips/broadcom/bcm_bmipsreg.h deleted file mode 100644 index c8228b3bcfa..00000000000 --- a/sys/mips/broadcom/bcm_bmipsreg.h +++ /dev/null @@ -1,72 +0,0 @@ -/*- - * Copyright (c) 2016 Landon Fuller - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce at minimum a disclaimer - * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any - * redistribution must be conditioned upon including a substantially - * similar Disclaimer requirement for further binary redistribution. - * - * NO WARRANTY - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER - * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGES. - * - */ - -#ifndef _MIPS_BROADCOM_BMIPSREG_H_ -#define _MIPS_BROADCOM_BMIPSREG_H_ - -/* - * Common BMIPS32/BMIPS3300 Registers - */ -#define BCM_BMIPS_CORECTL 0x00 /**< core control */ -#define BCM_BMIPS_CORECTL_FORCE_RST 0x01 /**< force reset */ -#define BCM_BMIPS_CORECTL_NO_FLSH_EXC 0x02 /**< flash exception disable */ -#define BCM_BMIPS_INTR_STATUS 0x20 /**< interrupt status */ -#define BCM_BMIPS_INTR_MASK 0x24 /**< interrupt mask */ -#define BCM_BMIPS_TIMER_INTMASK 0x01 /**< timer interrupt mask */ -#define BCM_BMIPS_TIMER_CTRL 0x28 /**< timer interval (?) */ - -/* - * Broadcom BMIPS32 (BHND_COREID_MIPS) - */ - -#define BCM_BMIPS32_CORECTL BCM_BMIPS_CORECTL -#define BCM_BMIPS32_BIST_STATUS 0x04 /**< built-in self-test status */ -#define BCM_BMIPS32_INTR_STATUS BCM_BMIPS_INTR_STATUS -#define BCM_BMIPS32_INTR_MASK BCM_BMIPS_INTR_MASK -#define BCM_BMIPS32_TIMER_CTRL BCM_BMIPS_TIMER_CTRL - -/* - * Broadcom BMIPS3300+ (BHND_COREID_MIPS33) - */ - -#define BCM_BMIPS33_CORECTL BCM_BMIPS_CORECTL -#define BCM_BMIPS33_BIST_CTRL 0x04 /**< build-in self-test control */ -#define BCM_BMIPS33_BIST_CTRL_DUMP 0x01 /**< BIST dump */ -#define BCM_BMIPS33_BIST_CTRL_DEBUG 0x02 /**< BIST debug */ -#define BCM_BMIPS33_BIST_CTRL_HOLD 0x04 /**< BIST hold */ -#define BCM_BMIPS33_BIST_STATUS 0x08 /**< built-in self-test status */ -#define BCM_BMIPS33_INTR_STATUS BCM_BMIPS_INTR_STATUS -#define BCM_BMIPS33_INTR_MASK BCM_BMIPS_INTR_MASK -#define BCM_BMIPS33_TIMER_CTRL BCM_BMIPS_TIMER_CTRL -#define BCM_BMIPS33_TEST_MUX_SEL 0x30 /**< test multiplexer select (?) */ -#define BCM_BMIPS33_TEST_MUX_EN 0x34 /**< test multiplexer enable (?) */ -#define BCM_BMIPS33_EJTAG_GPIO_EN 0x2C /**< ejtag gpio enable */ - -#endif /* _MIPS_BROADCOM_BMIPSREG_H_ */ diff --git a/sys/mips/broadcom/bcm_machdep.c b/sys/mips/broadcom/bcm_machdep.c deleted file mode 100644 index c312e4cb614..00000000000 --- a/sys/mips/broadcom/bcm_machdep.c +++ /dev/null @@ -1,651 +0,0 @@ -/*- - * Copyright (c) 2007 Bruce M. Simpson. - * Copyright (c) 2016 Michael Zhilin - * Copyright (c) 2016 Landon Fuller - * Copyright (c) 2017 The FreeBSD Foundation - * All rights reserved. - * - * Portions of this software were developed by Landon Fuller - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include -#include - -#include -#include - -#include "bcm_machdep.h" -#include "bcm_bmips_exts.h" - -#ifdef CFE -#include -#include -#endif - -#if 0 -#define BCM_TRACE(_fmt, ...) printf(_fmt, ##__VA_ARGS__) -#else -#define BCM_TRACE(_fmt, ...) -#endif - -static int bcm_init_platform_data(struct bcm_platform *bp); - -static int bcm_find_core(struct bcm_platform *bp, - const struct bhnd_core_match *descs, size_t num_descs, - struct bhnd_core_info *info, uintptr_t *addr); - -static int bcm_erom_probe_and_attach(bhnd_erom_class_t **erom_cls, - kobj_ops_t erom_ops, bhnd_erom_t *erom, size_t esize, - struct bhnd_erom_io *eio, struct bhnd_chipid *cid); - -extern int *edata; -extern int *end; - -static struct bcm_platform bcm_platform_data; -static bool bcm_platform_data_avail = false; - -#ifdef CFE -static struct bcm_nvram_iocfe bcm_cfe_nvram; -#endif - -static const struct bhnd_core_match bcm_chipc_cores[] = { - { BHND_MATCH_CORE(BHND_MFGID_BCM, BHND_COREID_CC) }, - { BHND_MATCH_CORE(BHND_MFGID_BCM, BHND_COREID_4706_CC) }, -}; - -static const struct bhnd_core_match bcm_cpu0_cores[] = { - { - BHND_MATCH_CORE_CLASS(BHND_DEVCLASS_CPU), - BHND_MATCH_CORE_UNIT(0) - } -}; - -static const struct bhnd_core_match bcm_pmu_cores[] = { - { BHND_MATCH_CORE(BHND_MFGID_BCM, BHND_COREID_PMU) }, -}; - -struct bcm_platform * -bcm_get_platform(void) -{ - if (!bcm_platform_data_avail) - panic("platform data not available"); - - return (&bcm_platform_data); -} - -static bus_addr_t -bcm_get_bus_addr(void) -{ - long maddr; - - if (resource_long_value("bhnd", 0, "maddr", &maddr) == 0) - return ((u_long)maddr); - - return (BHND_DEFAULT_CHIPC_ADDR); -} - -static bus_size_t -bcm_get_bus_size(void) -{ - long msize; - - if (resource_long_value("bhnd", 0, "msize", &msize) == 0) - return ((u_long)msize); - - return (BHND_DEFAULT_ENUM_SIZE); -} - -/** - * Search the device enumeration table for a core matching @p descs, - * - * @param bp Platform state containing a valid EROM parser. - * @param descs The core match descriptor table. - * @param num_descs The number of match descriptors in @p descs. - * @param[out] info If non-NULL, will be populated with the core - * info. - * @param[out] addr If non-NULL, will be populated with the core's - * physical register address. - */ -static int -bcm_find_core(struct bcm_platform *bp, const struct bhnd_core_match *descs, - size_t num_descs, struct bhnd_core_info *info, uintptr_t *addr) -{ - bhnd_addr_t b_addr; - bhnd_size_t b_size; - int error; - - /* Fetch core info */ - for (size_t i = 0; i < num_descs; i++) { - error = bhnd_erom_lookup_core_addr(&bp->erom.obj, &descs[i], - BHND_PORT_DEVICE, 0, 0, info, &b_addr, &b_size); - - /* Terminate search on first match */ - if (error == 0) - break; - - /* Terminate on first error (other than core not found) */ - if (error != ENOENT) - return (error); - - /* Continue search ... */ - } - - /* Provide the core's base address */ - if (addr != NULL && b_addr > UINTPTR_MAX) { - BCM_ERR("core address %#jx overflows native address width\n", - (uintmax_t)b_addr); - return (ERANGE); - } - - if (addr != NULL) - *addr = b_addr; - - return (0); -} - -/** - * Read a variable directly from NVRAM, decoding as @p type. - * - * @param bp Platform state. - * @param name The raw name of the variable to be fetched, - * including any device path (/pci/1/1/varname) or - * alias prefix (0:varname). - * @param[out] buf On success, the requested value will be written - * to this buffer. This argment may be NULL if - * the value is not desired. - * @param[in,out] len The capacity of @p buf. On success, will be set - * to the actual size of the requested value. - * @param type The data type to be written to @p buf. - * - * @retval 0 success - * @retval ENOMEM If @p buf is non-NULL and a buffer of @p len is too - * small to hold the requested value. - * @retval ENOENT If @p name is not found. - * @retval EFTYPE If the variable data cannot be coerced to @p type. - * @retval ERANGE If value coercion would overflow @p type. - * @retval non-zero If parsing NVRAM otherwise fails, a regular unix error - * code will be returned. - */ -int -bcm_get_nvram(struct bcm_platform *bp, const char *name, void *buf, size_t *len, - bhnd_nvram_type type) -{ - if (bp->nvram_io == NULL || bp->nvram_cls == NULL) - return (ENOENT); - - return (bhnd_nvram_data_getvar_direct(bp->nvram_cls, bp->nvram_io, name, - buf, len, type)); -} - -/** - * Probe and attach a bhnd_erom parser instance for the bhnd bus. - * - * @param[out] erom_cls The probed EROM class. - * @param[out] erom_ops The storage to be used when compiling - * @p erom_cls. - * @param[out] erom The storage to be used when initializing the - * static instance of @p erom_cls. - * @param esize The total available number of bytes allocated - * for @p erom. If this is less than is required - * by @p erom_cls ENOMEM will be returned. - * @param eio EROM I/O callbacks to be used. - * @param[out] cid On success, the probed chip identification. - */ -static int -bcm_erom_probe_and_attach(bhnd_erom_class_t **erom_cls, kobj_ops_t erom_ops, - bhnd_erom_t *erom, size_t esize, struct bhnd_erom_io *eio, - struct bhnd_chipid *cid) -{ - bhnd_erom_class_t **clsp; - bus_addr_t bus_addr; - int error, prio, result; - - *erom_cls = NULL; - prio = 0; - - /* Map our first bus core for the erom probe */ - bus_addr = bcm_get_bus_addr(); - if ((error = bhnd_erom_io_map(eio, bus_addr, BHND_DEFAULT_CORE_SIZE))) { - BCM_ERR("failed to map first core at %#jx+%#jx: %d\n", - (uintmax_t)bus_addr, (uintmax_t)BHND_DEFAULT_CORE_SIZE, - error); - - return (error); - } - - SET_FOREACH(clsp, bhnd_erom_class_set) { - struct bhnd_chipid pcid; - bhnd_erom_class_t *cls; - struct kobj_ops kops; - - cls = *clsp; - - /* Compile the class' ops table */ - kobj_class_compile_static(cls, &kops); - - /* Probe the bus address */ - result = bhnd_erom_probe(cls, eio, NULL, &pcid); - - /* Drop pointer to stack allocated ops table */ - cls->ops = NULL; - - /* The parser did not match if an error was returned */ - if (result > 0) - continue; - - /* Check for a new highest priority match */ - if (*erom_cls == NULL || result > prio) { - prio = result; - - *cid = pcid; - *erom_cls = cls; - } - - /* Terminate immediately on BUS_PROBE_SPECIFIC */ - if (result == BUS_PROBE_SPECIFIC) - break; - } - - /* Valid EROM class probed? */ - if (*erom_cls == NULL) { - BCM_ERR("no erom parser found for root bus at %#jx\n", - (uintmax_t)bus_addr); - - return (ENOENT); - } - - /* Using the provided storage, recompile the erom class ... */ - kobj_class_compile_static(*erom_cls, erom_ops); - - /* ... and initialize the erom parser instance */ - error = bhnd_erom_init_static(*erom_cls, erom, esize, cid, eio); - - return (error); -} - -/** - * Populate platform configuration data. - */ -static int -bcm_init_platform_data(struct bcm_platform *bp) -{ - bus_addr_t bus_addr, bus_size; - bus_space_tag_t erom_bst; - bus_space_handle_t erom_bsh; - bool aob, pmu; - int error; - - bus_addr = bcm_get_bus_addr(); - bus_size = bcm_get_bus_size(); - -#ifdef CFE - /* Fetch CFE console handle (if any). Must be initialized before - * any calls to printf/early_putc. */ - if ((bp->cfe_console = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE)) < 0) - bp->cfe_console = -1; - - /* Probe CFE NVRAM sources */ - bp->nvram_io = &bcm_cfe_nvram.io; - error = bcm_nvram_find_cfedev(&bcm_cfe_nvram, &bp->nvram_cls); - if (error) { - bp->nvram_io = NULL; - bp->nvram_cls = NULL; - } -#endif /* CFE */ - - /* Probe and attach device table provider, populating our - * chip identification */ - erom_bst = mips_bus_space_generic; - erom_bsh = BCM_SOC_BSH(bus_addr, 0); - - error = bhnd_erom_iobus_init(&bp->erom_io, bus_addr, bus_size, erom_bst, - erom_bsh); - if (error) { - BCM_ERR("failed to initialize erom I/O callbacks: %d\n", error); - return (error); - } - - error = bcm_erom_probe_and_attach(&bp->erom_impl, &bp->erom_ops, - &bp->erom.obj, sizeof(bp->erom), &bp->erom_io.eio, &bp->cid); - if (error) { - BCM_ERR("error attaching erom parser: %d\n", error); - bhnd_erom_io_fini(&bp->erom_io.eio); - return (error); - } - - if (bootverbose) - bhnd_erom_dump(&bp->erom.obj); - - /* Fetch chipcommon core info */ - error = bcm_find_core(bp, bcm_chipc_cores, nitems(bcm_chipc_cores), - &bp->cc_id, &bp->cc_addr); - if (error) { - BCM_ERR("error locating chipc core: %d\n", error); - return (error); - } - - /* Fetch chipc capability flags */ - bp->cc_caps = BCM_SOC_READ_4(bp->cc_addr, CHIPC_CAPABILITIES); - bp->cc_caps_ext = 0x0; - - if (CHIPC_HWREV_HAS_CAP_EXT(bp->cc_id.hwrev)) - bp->cc_caps_ext = BCM_CHIPC_READ_4(bp, CHIPC_CAPABILITIES_EXT); - - /* Fetch PMU info */ - pmu = CHIPC_GET_FLAG(bp->cc_caps, CHIPC_CAP_PMU); - aob = CHIPC_GET_FLAG(bp->cc_caps_ext, CHIPC_CAP2_AOB); - - if (pmu && aob) { - /* PMU block mapped to a PMU core on the Always-on-Bus (aob) */ - error = bcm_find_core(bp, bcm_pmu_cores, nitems(bcm_pmu_cores), - &bp->pmu_id, &bp->pmu_addr); - if (error) { - BCM_ERR("error locating pmu core: %d\n", error); - return (error); - } - } else if (pmu) { - /* PMU block mapped to chipc */ - bp->pmu_addr = bp->cc_addr; - bp->pmu_id = bp->cc_id; - } else { - /* No PMU */ - bp->pmu_addr = 0x0; - memset(&bp->pmu_id, 0, sizeof(bp->pmu_id)); - } - - /* Initialize PMU query state */ - if (pmu) { - error = bhnd_pmu_query_init(&bp->pmu, NULL, bp->cid, - &bcm_pmu_soc_io, bp); - if (error) { - BCM_ERR("bhnd_pmu_query_init() failed: %d\n", error); - return (error); - } - } - - /* Find CPU core info */ - error = bcm_find_core(bp, bcm_cpu0_cores, nitems(bcm_cpu0_cores), - &bp->cpu_id, &bp->cpu_addr); - if (error) { - BCM_ERR("error locating CPU core: %d\n", error); - return (error); - } - - /* Initialize our platform service registry */ - if ((error = bhnd_service_registry_init(&bp->services))) { - BCM_ERR("error initializing service registry: %d\n", error); - return (error); - } - - bcm_platform_data_avail = true; - return (0); -} - -void -platform_cpu_init() -{ - /* Nothing special */ -} - -static void -mips_init(void) -{ - int i, j; - - printf("entry: mips_init()\n"); - -#ifdef CFE - /* - * Query DRAM memory map from CFE. - */ - physmem = 0; - for (i = 0; i < 10; i += 2) { - int result; - uint64_t addr, len, type; - - result = cfe_enummem(i / 2, 0, &addr, &len, &type); - if (result < 0) { - BCM_TRACE("There is no phys memory for: %d\n", i); - phys_avail[i] = phys_avail[i + 1] = 0; - break; - } - if (type != CFE_MI_AVAILABLE) { - BCM_TRACE("phys memory is not available: %d\n", i); - continue; - } - - phys_avail[i] = addr; - if (i == 0 && addr == 0) { - /* - * If this is the first physical memory segment probed - * from CFE, omit the region at the start of physical - * memory where the kernel has been loaded. - */ - phys_avail[i] += MIPS_KSEG0_TO_PHYS(kernel_kseg0_end); - } - - BCM_TRACE("phys memory is available for: %d\n", i); - BCM_TRACE(" => addr = %jx\n", addr); - BCM_TRACE(" => len = %jd\n", len); - - phys_avail[i + 1] = addr + len; - physmem += len; - } - - BCM_TRACE("Total phys memory is : %ld\n", physmem); - realmem = btoc(physmem); -#endif - - for (j = 0; j < i; j++) - dump_avail[j] = phys_avail[j]; - - physmem = realmem; - - init_param1(); - init_param2(physmem); - mips_cpu_init(); - pmap_bootstrap(); - mips_proc0_init(); - mutex_init(); - kdb_init(); -#ifdef KDB - if (boothowto & RB_KDB) - kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); -#endif -} - -void -platform_reset(void) -{ - struct bcm_platform *bp; - bool bcm4785war; - - printf("bcm::platform_reset()\n"); - intr_disable(); - -#ifdef CFE - /* Fall back on CFE if reset requested during platform - * data initialization */ - if (!bcm_platform_data_avail) { - cfe_exit(0, 0); - while (1); - } -#endif - - bp = bcm_get_platform(); - bcm4785war = false; - - /* Handle BCM4785-specific behavior */ - if (bp->cid.chip_id == BHND_CHIPID_BCM4785) { - bcm4785war = true; - - /* Switch to async mode */ - bcm_bmips_wr_pllcfg3(BMIPS_BCMCFG_PLLCFG3_SM); - } - - /* Set watchdog (PMU or ChipCommon) */ - if (bp->pmu_addr != 0x0) { - BCM_PMU_WRITE_4(bp, BHND_PMU_WATCHDOG, 1); - } else - BCM_CHIPC_WRITE_4(bp, CHIPC_WATCHDOG, 1); - - /* BCM4785 */ - if (bcm4785war) { - mips_sync(); - __asm __volatile("wait"); - } - - while (1); -} - -void -platform_start(__register_t a0, __register_t a1, __register_t a2, - __register_t a3) -{ - vm_offset_t kernend; - uint64_t platform_counter_freq; - int error; - - /* clear the BSS and SBSS segments */ - kernend = (vm_offset_t)&end; - memset(&edata, 0, kernend - (vm_offset_t)(&edata)); - - mips_postboot_fixup(); - - /* Initialize pcpu stuff */ - mips_pcpu0_init(); - -#ifdef CFE - /* - * Initialize CFE firmware trampolines. This must be done - * before any CFE APIs are called, including writing - * to the CFE console. - * - * CFE passes the following values in registers: - * a0: firmware handle - * a2: firmware entry point - * a3: entry point seal - */ - if (a3 == CFE_EPTSEAL) - cfe_init(a0, a2); -#endif - - /* Init BCM platform data */ - if ((error = bcm_init_platform_data(&bcm_platform_data))) - panic("bcm_init_platform_data() failed: %d", error); - - platform_counter_freq = bcm_get_cpufreq(bcm_get_platform()); - - /* CP0 ticks every two cycles */ - mips_timer_early_init(platform_counter_freq / 2); - - cninit(); - - mips_init(); - - mips_timer_init_params(platform_counter_freq, 1); -} - -/* - * CFE-based EARLY_PRINTF support. To use, add the following to the kernel - * config: - * option EARLY_PRINTF - * option CFE - * device cfe - */ -#if defined(EARLY_PRINTF) && defined(CFE) -static void -bcm_cfe_eputc(int c) -{ - unsigned char ch; - int handle; - - ch = (unsigned char) c; - - /* bcm_get_platform() cannot be used here, as we may be called - * from bcm_init_platform_data(). */ - if ((handle = bcm_platform_data.cfe_console) < 0) - return; - - if (ch == '\n') - early_putc('\r'); - - while ((cfe_write(handle, &ch, 1)) == 0) - continue; -} - -early_putc_t *early_putc = bcm_cfe_eputc; -#endif /* EARLY_PRINTF */ diff --git a/sys/mips/broadcom/bcm_machdep.h b/sys/mips/broadcom/bcm_machdep.h deleted file mode 100644 index 8e1228d5bdb..00000000000 --- a/sys/mips/broadcom/bcm_machdep.h +++ /dev/null @@ -1,137 +0,0 @@ -/*- - * Copyright (c) 2016 Landon Fuller - * Copyright (c) 2017 The FreeBSD Foundation - * All rights reserved. - * - * Portions of this software were developed by Landon Fuller - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce at minimum a disclaimer - * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any - * redistribution must be conditioned upon including a substantially - * similar Disclaimer requirement for further binary redistribution. - * - * NO WARRANTY - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER - * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGES. - * - */ - -#ifndef _MIPS_BROADCOM_BCM_MACHDEP_H_ -#define _MIPS_BROADCOM_BCM_MACHDEP_H_ - -#include -#include - -#include -#include - -#include - -#include "bcm_nvram_cfevar.h" - -extern const struct bhnd_pmu_io bcm_pmu_soc_io; - -struct bcm_platform { - struct bhnd_chipid cid; /**< chip id */ - struct bhnd_core_info cc_id; /**< chipc core info */ - uintptr_t cc_addr; /**< chipc core phys address */ - uint32_t cc_caps; /**< chipc capabilities */ - uint32_t cc_caps_ext; /**< chipc extended capabilies */ - - struct bhnd_core_info cpu_id; /**< cpu core info */ - uintptr_t cpu_addr; /**< cpu core phys address */ - - /* On non-AOB devices, the PMU register block is mapped to chipc; - * the pmu_id and pmu_addr values will be copied from cc_id - * and cc_addr. */ - struct bhnd_core_info pmu_id; /**< PMU core info */ - uintptr_t pmu_addr; /**< PMU core phys address, or - 0x0 if no PMU */ - - struct bhnd_pmu_query pmu; /**< PMU query instance */ - - bhnd_erom_class_t *erom_impl; /**< erom parser class */ - struct kobj_ops erom_ops; /**< compiled kobj opcache */ - struct bhnd_erom_iobus erom_io; /**< erom I/O callbacks */ - union { - bhnd_erom_static_t data; - bhnd_erom_t obj; - } erom; - - struct bhnd_nvram_io *nvram_io; /**< NVRAM I/O context, or NULL if unavailable */ - bhnd_nvram_data_class *nvram_cls; /**< NVRAM data class, or NULL if unavailable */ - - struct bhnd_service_registry services; /**< platform service providers */ - -#ifdef CFE - int cfe_console; /**< Console handle, or -1 */ -#endif -}; - -struct bcm_platform *bcm_get_platform(void); - -uint64_t bcm_get_cpufreq(struct bcm_platform *bp); -uint64_t bcm_get_sifreq(struct bcm_platform *bp); -uint64_t bcm_get_alpfreq(struct bcm_platform *bp); -uint64_t bcm_get_ilpfreq(struct bcm_platform *bp); - -u_int bcm_get_uart_rclk(struct bcm_platform *bp); - -int bcm_get_nvram(struct bcm_platform *bp, - const char *name, void *outp, size_t *olen, - bhnd_nvram_type type); - -#define BCM_ERR(fmt, ...) \ - printf("%s: " fmt, __FUNCTION__, ##__VA_ARGS__) - -#define BCM_SOC_BSH(_addr, _offset) \ - ((bus_space_handle_t)BCM_SOC_ADDR((_addr), (_offset))) - -#define BCM_SOC_ADDR(_addr, _offset) \ - MIPS_PHYS_TO_KSEG1((_addr) + (_offset)) - -#define BCM_SOC_READ_4(_addr, _offset) \ - readl(BCM_SOC_ADDR((_addr), (_offset))) -#define BCM_SOC_WRITE_4(_addr, _reg, _val) \ - writel(BCM_SOC_ADDR((_addr), (_offset)), (_val)) - -#define BCM_CORE_ADDR(_bp, _name, _reg) \ - BCM_SOC_ADDR(_bp->_name, (_reg)) - -#define BCM_CORE_READ_4(_bp, _name, _reg) \ - readl(BCM_CORE_ADDR(_bp, _name, (_reg))) -#define BCM_CORE_WRITE_4(_bp, _name, _reg, _val) \ - writel(BCM_CORE_ADDR(_bp, _name, (_reg)), (_val)) - -#define BCM_CHIPC_READ_4(_bp, _reg) \ - BCM_CORE_READ_4(_bp, cc_addr, (_reg)) -#define BCM_CHIPC_WRITE_4(_bp, _reg, _val) \ - BCM_CORE_WRITE_4(_bp, cc_addr, (_reg), (_val)) - -#define BCM_CPU_READ_4(_bp, _reg) \ - BCM_CORE_READ_4(_bp, cpu_addr, (_reg)) -#define BCM_CPU_WRITE_4(_bp, _reg, _val) \ - BCM_CORE_WRITE_4(_bp, cpu_addr, (_reg), (_val)) - -#define BCM_PMU_READ_4(_bp, _reg) \ - BCM_CORE_READ_4(_bp, pmu_addr, (_reg)) -#define BCM_PMU_WRITE_4(_bp, _reg, _val) \ - BCM_CORE_WRITE_4(_bp, pmu_addr, (_reg), (_val)) - -#endif /* _MIPS_BROADCOM_BCM_MACHDEP_H_ */ diff --git a/sys/mips/broadcom/bcm_mips.c b/sys/mips/broadcom/bcm_mips.c deleted file mode 100644 index 48cd50e700a..00000000000 --- a/sys/mips/broadcom/bcm_mips.c +++ /dev/null @@ -1,694 +0,0 @@ -/*- - * Copyright (c) 2017 The FreeBSD Foundation - * - * This software was developed by Landon Fuller under sponsorship from - * the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include - -#include "pic_if.h" - -#include "bcm_mipsvar.h" - -/* - * Broadcom MIPS core driver. - * - * Abstract driver for Broadcom MIPS CPU/PIC cores. - */ - -static uintptr_t bcm_mips_pic_xref(struct bcm_mips_softc *sc); -static device_t bcm_mips_find_bhnd_parent(device_t dev); -static int bcm_mips_retain_cpu_intr(struct bcm_mips_softc *sc, - struct bcm_mips_irqsrc *isrc, struct resource *res); -static int bcm_mips_release_cpu_intr(struct bcm_mips_softc *sc, - struct bcm_mips_irqsrc *isrc, struct resource *res); - -static const int bcm_mips_debug = 0; - -#define DPRINTF(fmt, ...) do { \ - if (bcm_mips_debug) \ - printf("%s: " fmt, __FUNCTION__, ##__VA_ARGS__); \ -} while (0) - -#define DENTRY(dev, fmt, ...) do { \ - if (bcm_mips_debug) \ - printf("%s(%s, " fmt ")\n", __FUNCTION__, \ - device_get_nameunit(dev), ##__VA_ARGS__); \ -} while (0) - -/** - * Register all interrupt source definitions. - */ -static int -bcm_mips_register_isrcs(struct bcm_mips_softc *sc) -{ - const char *name; - uintptr_t xref; - int error; - - xref = bcm_mips_pic_xref(sc); - - name = device_get_nameunit(sc->dev); - for (size_t ivec = 0; ivec < nitems(sc->isrcs); ivec++) { - sc->isrcs[ivec].ivec = ivec; - sc->isrcs[ivec].cpuirq = NULL; - sc->isrcs[ivec].refs = 0; - - error = intr_isrc_register(&sc->isrcs[ivec].isrc, sc->dev, - xref, "%s,%u", name, ivec); - if (error) { - for (size_t i = 0; i < ivec; i++) - intr_isrc_deregister(&sc->isrcs[i].isrc); - - device_printf(sc->dev, "error registering IRQ %zu: " - "%d\n", ivec, error); - return (error); - } - } - - return (0); -} - -/** - * Initialize the given @p cpuirq state as unavailable. - * - * @param sc BHND MIPS driver instance state. - * @param cpuirq The CPU IRQ state to be initialized. - * - * @retval 0 success - * @retval non-zero if initializing @p cpuirq otherwise fails, a regular - * unix error code will be returned. - */ -static int -bcm_mips_init_cpuirq_unavail(struct bcm_mips_softc *sc, - struct bcm_mips_cpuirq *cpuirq) -{ - BCM_MIPS_LOCK(sc); - - KASSERT(cpuirq->sc == NULL, ("cpuirq already initialized")); - cpuirq->sc = sc; - cpuirq->mips_irq = 0; - cpuirq->irq_rid = -1; - cpuirq->irq_res = NULL; - cpuirq->irq_cookie = NULL; - cpuirq->isrc_solo = NULL; - cpuirq->refs = 0; - - BCM_MIPS_UNLOCK(sc); - - return (0); -} - -/** - * Allocate required resources and initialize the given @p cpuirq state. - * - * @param sc BHND MIPS driver instance state. - * @param cpuirq The CPU IRQ state to be initialized. - * @param rid The resource ID to be assigned for the CPU IRQ resource, - * or -1 if no resource should be assigned. - * @param irq The MIPS HW IRQ# to be allocated. - * @param filter The interrupt filter to be setup. - * - * @retval 0 success - * @retval non-zero if initializing @p cpuirq otherwise fails, a regular - * unix error code will be returned. - */ -static int -bcm_mips_init_cpuirq(struct bcm_mips_softc *sc, struct bcm_mips_cpuirq *cpuirq, - int rid, u_int irq, driver_filter_t filter) -{ - struct resource *res; - void *cookie; - u_int irq_real; - int error; - - /* Must fall within MIPS HW IRQ range */ - if (irq >= NHARD_IRQS) - return (EINVAL); - - /* HW IRQs are numbered relative to SW IRQs */ - irq_real = irq + NSOFT_IRQS; - - /* Try to assign and allocate the resource */ - BCM_MIPS_LOCK(sc); - - KASSERT(cpuirq->sc == NULL, ("cpuirq already initialized")); - - error = bus_set_resource(sc->dev, SYS_RES_IRQ, rid, irq_real, 1); - if (error) { - BCM_MIPS_UNLOCK(sc); - device_printf(sc->dev, "failed to assign interrupt %u: " - "%d\n", irq, error); - return (error); - } - - res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, &rid, RF_ACTIVE); - if (res == NULL) { - BCM_MIPS_UNLOCK(sc); - device_printf(sc->dev, "failed to allocate interrupt " - "%u resource\n", irq); - bus_delete_resource(sc->dev, SYS_RES_IRQ, rid); - return (ENXIO); - } - - error = bus_setup_intr(sc->dev, res, - INTR_TYPE_MISC | INTR_MPSAFE | INTR_EXCL, filter, NULL, cpuirq, - &cookie); - if (error) { - BCM_MIPS_UNLOCK(sc); - - printf("failed to setup internal interrupt handler: %d\n", - error); - - bus_release_resource(sc->dev, SYS_RES_IRQ, rid, res); - bus_delete_resource(sc->dev, SYS_RES_IRQ, rid); - - return (error); - } - - /* Initialize CPU IRQ state */ - cpuirq->sc = sc; - cpuirq->mips_irq = irq; - cpuirq->irq_rid = rid; - cpuirq->irq_res = res; - cpuirq->irq_cookie = cookie; - cpuirq->isrc_solo = NULL; - cpuirq->refs = 0; - - BCM_MIPS_UNLOCK(sc); - return (0); -} - -/** - * Free any resources associated with the given @p cpuirq state. - * - * @param sc BHND MIPS driver instance state. - * @param cpuirq A CPU IRQ instance previously successfully initialized - * via bcm_mips_init_cpuirq(). - * - * @retval 0 success - * @retval non-zero if finalizing @p cpuirq otherwise fails, a regular - * unix error code will be returned. - */ -static int -bcm_mips_fini_cpuirq(struct bcm_mips_softc *sc, struct bcm_mips_cpuirq *cpuirq) -{ - int error; - - BCM_MIPS_LOCK(sc); - - if (cpuirq->sc == NULL) { - KASSERT(cpuirq->irq_res == NULL, ("leaking cpuirq resource")); - - BCM_MIPS_UNLOCK(sc); - return (0); /* not initialized */ - } - - if (cpuirq->refs != 0) { - BCM_MIPS_UNLOCK(sc); - return (EBUSY); - } - - if (cpuirq->irq_cookie != NULL) { - KASSERT(cpuirq->irq_res != NULL, ("resource missing")); - - error = bus_teardown_intr(sc->dev, cpuirq->irq_res, - cpuirq->irq_cookie); - if (error) { - BCM_MIPS_UNLOCK(sc); - return (error); - } - - cpuirq->irq_cookie = NULL; - } - - if (cpuirq->irq_res != NULL) { - bus_release_resource(sc->dev, SYS_RES_IRQ, cpuirq->irq_rid, - cpuirq->irq_res); - cpuirq->irq_res = NULL; - } - - if (cpuirq->irq_rid != -1) { - bus_delete_resource(sc->dev, SYS_RES_IRQ, cpuirq->irq_rid); - cpuirq->irq_rid = -1; - } - - BCM_MIPS_UNLOCK(sc); - - return (0); -} - -static int -bcm_mips_attach_default(device_t dev) -{ - /* subclassing drivers must provide an implementation of - * DEVICE_ATTACH() */ - panic("device_attach() unimplemented"); -} - -/** - * BHND MIPS device attach. - * - * This must be called from subclass drivers' DEVICE_ATTACH(). - * - * @param dev BHND MIPS device. - * @param num_cpuirqs The number of usable MIPS HW IRQs. - * @param timer_irq The MIPS HW IRQ assigned to the MIPS CPU timer. - * @param filter The subclass's core-specific IRQ dispatch filter. Will be - * passed the associated bcm_mips_cpuirq instance as its argument. - */ -int -bcm_mips_attach(device_t dev, u_int num_cpuirqs, u_int timer_irq, - driver_filter_t filter) -{ - struct bcm_mips_softc *sc; - struct intr_pic *pic; - uintptr_t xref; - u_int irq_rid; - rman_res_t irq; - int error; - - sc = device_get_softc(dev); - sc->dev = dev; - sc->num_cpuirqs = num_cpuirqs; - sc->timer_irq = timer_irq; - - /* Must not exceed the actual size of our fixed IRQ array */ - if (sc->num_cpuirqs > nitems(sc->cpuirqs)) { - device_printf(dev, "%u nirqs exceeds maximum supported %zu", - sc->num_cpuirqs, nitems(sc->cpuirqs)); - return (ENXIO); - } - - pic = NULL; - xref = bcm_mips_pic_xref(sc); - - BCM_MIPS_LOCK_INIT(sc); - - /* Register our interrupt sources */ - if ((error = bcm_mips_register_isrcs(sc))) { - BCM_MIPS_LOCK_DESTROY(sc); - return (error); - } - - /* Initialize our CPU interrupt state */ - irq_rid = bhnd_get_intr_count(dev); /* last bhnd-assigned RID + 1 */ - irq = 0; - for (u_int i = 0; i < sc->num_cpuirqs; i++) { - /* Must not overflow signed resource ID representation */ - if (irq_rid >= INT_MAX) { - device_printf(dev, "exhausted IRQ resource IDs\n"); - error = ENOMEM; - goto failed; - } - - if (irq == sc->timer_irq) { - /* Mark the CPU timer's IRQ as unavailable */ - error = bcm_mips_init_cpuirq_unavail(sc, - &sc->cpuirqs[i]); - } else { - /* Initialize state */ - error = bcm_mips_init_cpuirq(sc, &sc->cpuirqs[i], - irq_rid, irq, filter); - } - - if (error) - goto failed; - - /* Increment IRQ and resource ID for next allocation */ - irq_rid++; - irq++; - } - - /* Sanity check; our shared IRQ must be available */ - if (sc->num_cpuirqs <= BCM_MIPS_IRQ_SHARED) - panic("missing shared interrupt %d\n", BCM_MIPS_IRQ_SHARED); - - if (sc->cpuirqs[BCM_MIPS_IRQ_SHARED].irq_rid == -1) - panic("shared interrupt %d unavailable", BCM_MIPS_IRQ_SHARED); - - /* Register PIC */ - if ((pic = intr_pic_register(dev, xref)) == NULL) { - device_printf(dev, "error registering PIC\n"); - error = ENXIO; - goto failed; - } - - return (0); - -failed: - /* Deregister PIC before performing any other cleanup */ - if (pic != NULL) - intr_pic_deregister(dev, 0); - - /* Deregister all interrupt sources */ - for (size_t i = 0; i < nitems(sc->isrcs); i++) - intr_isrc_deregister(&sc->isrcs[i].isrc); - - /* Free our MIPS CPU interrupt handler state */ - for (u_int i = 0; i < sc->num_cpuirqs; i++) - bcm_mips_fini_cpuirq(sc, &sc->cpuirqs[i]); - - BCM_MIPS_LOCK_DESTROY(sc); - return (error); -} - -int -bcm_mips_detach(device_t dev) -{ - struct bcm_mips_softc *sc; - - sc = device_get_softc(dev); - - /* Deregister PIC before performing any other cleanup */ - intr_pic_deregister(dev, 0); - - /* Deregister all interrupt sources */ - for (size_t i = 0; i < nitems(sc->isrcs); i++) - intr_isrc_deregister(&sc->isrcs[i].isrc); - - /* Free our MIPS CPU interrupt handler state */ - for (u_int i = 0; i < sc->num_cpuirqs; i++) - bcm_mips_fini_cpuirq(sc, &sc->cpuirqs[i]); - - return (0); -} - -/* PIC_MAP_INTR() */ -static int -bcm_mips_pic_map_intr(device_t dev, struct intr_map_data *d, - struct intr_irqsrc **isrcp) -{ - struct bcm_mips_softc *sc; - struct bcm_mips_intr_map_data *data; - - sc = device_get_softc(dev); - - if (d->type != INTR_MAP_DATA_BCM_MIPS) { - DENTRY(dev, "type=%d", d->type); - return (ENOTSUP); - } - - data = (struct bcm_mips_intr_map_data *)d; - DENTRY(dev, "type=%d, ivec=%u", d->type, data->ivec); - if (data->ivec < 0 || data->ivec >= nitems(sc->isrcs)) - return (EINVAL); - - *isrcp = &sc->isrcs[data->ivec].isrc; - return (0); -} - -/* PIC_SETUP_INTR() */ -static int -bcm_mips_pic_setup_intr(device_t dev, struct intr_irqsrc *irqsrc, - struct resource *res, struct intr_map_data *data) -{ - struct bcm_mips_softc *sc; - struct bcm_mips_irqsrc *isrc; - int error; - - sc = device_get_softc(dev); - isrc = (struct bcm_mips_irqsrc *)irqsrc; - - /* Assign a CPU interrupt */ - BCM_MIPS_LOCK(sc); - error = bcm_mips_retain_cpu_intr(sc, isrc, res); - BCM_MIPS_UNLOCK(sc); - - return (error); -} - -/* PIC_TEARDOWN_INTR() */ -static int -bcm_mips_pic_teardown_intr(device_t dev, struct intr_irqsrc *irqsrc, - struct resource *res, struct intr_map_data *data) -{ - struct bcm_mips_softc *sc; - struct bcm_mips_irqsrc *isrc; - int error; - - sc = device_get_softc(dev); - isrc = (struct bcm_mips_irqsrc *)irqsrc; - - /* Release the CPU interrupt */ - BCM_MIPS_LOCK(sc); - error = bcm_mips_release_cpu_intr(sc, isrc, res); - BCM_MIPS_UNLOCK(sc); - - return (error); -} - -/** return our PIC's xref */ -static uintptr_t -bcm_mips_pic_xref(struct bcm_mips_softc *sc) -{ - uintptr_t xref; - - /* Determine our interrupt domain */ - xref = BHND_BUS_GET_INTR_DOMAIN(device_get_parent(sc->dev), sc->dev, - true); - KASSERT(xref != 0, ("missing interrupt domain")); - - return (xref); -} - -/** - * Walk up the device tree from @p dev until we find a bhnd-attached core, - * returning either the core, or NULL if @p dev is not attached under a bhnd - * bus. - */ -static device_t -bcm_mips_find_bhnd_parent(device_t dev) -{ - device_t core, bus; - devclass_t bhnd_class; - - bhnd_class = devclass_find("bhnd"); - core = dev; - while ((bus = device_get_parent(core)) != NULL) { - if (device_get_devclass(bus) == bhnd_class) - return (core); - - core = bus; - } - - /* Not found */ - return (NULL); -} - -/** - * Retain @p isrc and assign a MIPS CPU interrupt on behalf of @p res; if - * the @p isrc already has a MIPS CPU interrupt assigned, the existing - * reference will be left unmodified. - * - * @param sc BHND MIPS driver state. - * @param isrc The interrupt source corresponding to @p res. - * @param res The interrupt resource for which a MIPS CPU IRQ will be - * assigned. - */ -static int -bcm_mips_retain_cpu_intr(struct bcm_mips_softc *sc, - struct bcm_mips_irqsrc *isrc, struct resource *res) -{ - struct bcm_mips_cpuirq *cpuirq; - bhnd_devclass_t devclass; - device_t core; - - BCM_MIPS_LOCK_ASSERT(sc, MA_OWNED); - - /* Prefer existing assignment */ - if (isrc->cpuirq != NULL) { - KASSERT(isrc->cpuirq->refs > 0, ("assigned IRQ has no " - "references")); - - /* Increment our reference count */ - if (isrc->refs == UINT_MAX) - return (ENOMEM); /* would overflow */ - - isrc->refs++; - return (0); - } - - /* Use the device class of the bhnd core to which the interrupt - * vector is routed to determine whether a shared interrupt should - * be preferred. */ - devclass = BHND_DEVCLASS_OTHER; - core = bcm_mips_find_bhnd_parent(rman_get_device(res)); - if (core != NULL) - devclass = bhnd_get_class(core); - - switch (devclass) { - case BHND_DEVCLASS_CC: - case BHND_DEVCLASS_CC_B: - case BHND_DEVCLASS_PMU: - case BHND_DEVCLASS_RAM: - case BHND_DEVCLASS_MEMC: - case BHND_DEVCLASS_CPU: - case BHND_DEVCLASS_SOC_ROUTER: - case BHND_DEVCLASS_SOC_BRIDGE: - case BHND_DEVCLASS_EROM: - case BHND_DEVCLASS_NVRAM: - /* Always use a shared interrupt for these devices */ - cpuirq = &sc->cpuirqs[BCM_MIPS_IRQ_SHARED]; - break; - - case BHND_DEVCLASS_PCI: - case BHND_DEVCLASS_PCIE: - case BHND_DEVCLASS_PCCARD: - case BHND_DEVCLASS_ENET: - case BHND_DEVCLASS_ENET_MAC: - case BHND_DEVCLASS_ENET_PHY: - case BHND_DEVCLASS_WLAN: - case BHND_DEVCLASS_WLAN_MAC: - case BHND_DEVCLASS_WLAN_PHY: - case BHND_DEVCLASS_USB_HOST: - case BHND_DEVCLASS_USB_DEV: - case BHND_DEVCLASS_USB_DUAL: - case BHND_DEVCLASS_OTHER: - case BHND_DEVCLASS_INVALID: - default: - /* Fall back on a shared interrupt */ - cpuirq = &sc->cpuirqs[BCM_MIPS_IRQ_SHARED]; - - /* Try to assign a dedicated MIPS HW interrupt */ - for (u_int i = 0; i < sc->num_cpuirqs; i++) { - if (i == BCM_MIPS_IRQ_SHARED) - continue; - - if (sc->cpuirqs[i].irq_rid == -1) - continue; /* unavailable */ - - if (sc->cpuirqs[i].refs != 0) - continue; /* already assigned */ - - /* Found an unused CPU IRQ */ - cpuirq = &sc->cpuirqs[i]; - break; - } - - break; - } - - DPRINTF("routing backplane interrupt vector %u to MIPS IRQ %u\n", - isrc->ivec, cpuirq->mips_irq); - - KASSERT(isrc->cpuirq == NULL, ("CPU IRQ already assigned")); - KASSERT(isrc->refs == 0, ("isrc has active references with no " - "assigned CPU IRQ")); - KASSERT(cpuirq->refs == 1 || cpuirq->isrc_solo == NULL, - ("single isrc dispatch enabled on cpuirq with multiple refs")); - - /* Verify that bumping the cpuirq refcount below will not overflow */ - if (cpuirq->refs == UINT_MAX) - return (ENOMEM); - - /* Increment cpuirq refcount on behalf of the isrc */ - cpuirq->refs++; - - /* Increment isrc refcount on behalf of the caller */ - isrc->refs++; - - /* Assign the IRQ to the isrc */ - isrc->cpuirq = cpuirq; - - /* Can we enable the single isrc dispatch path? */ - if (cpuirq->refs == 1 && cpuirq->mips_irq != BCM_MIPS_IRQ_SHARED) - cpuirq->isrc_solo = isrc; - - return (0); -} - -/** - * Release the MIPS CPU interrupt assigned to @p isrc on behalf of @p res. - * - * @param sc BHND MIPS driver state. - * @param isrc The interrupt source corresponding to @p res. - * @param res The interrupt resource being activated. - */ -static int -bcm_mips_release_cpu_intr(struct bcm_mips_softc *sc, - struct bcm_mips_irqsrc *isrc, struct resource *res) -{ - struct bcm_mips_cpuirq *cpuirq; - - BCM_MIPS_LOCK_ASSERT(sc, MA_OWNED); - - /* Decrement the refcount */ - KASSERT(isrc->refs > 0, ("isrc over-release")); - isrc->refs--; - - /* Nothing else to do if the isrc is still actively referenced */ - if (isrc->refs > 0) - return (0); - - /* Otherwise, we need to release our CPU IRQ reference */ - cpuirq = isrc->cpuirq; - isrc->cpuirq = NULL; - - KASSERT(cpuirq != NULL, ("no assigned IRQ")); - KASSERT(cpuirq->refs > 0, ("cpuirq over-release")); - - /* Disable single isrc dispatch path */ - if (cpuirq->refs == 1 && cpuirq->isrc_solo != NULL) { - KASSERT(cpuirq->isrc_solo == isrc, ("invalid solo isrc")); - cpuirq->isrc_solo = NULL; - } - - cpuirq->refs--; - - return (0); -} - -static device_method_t bcm_mips_methods[] = { - /* Device interface */ - DEVMETHOD(device_attach, bcm_mips_attach_default), - DEVMETHOD(device_detach, bcm_mips_detach), - - /* Interrupt controller interface */ - DEVMETHOD(pic_map_intr, bcm_mips_pic_map_intr), - DEVMETHOD(pic_setup_intr, bcm_mips_pic_setup_intr), - DEVMETHOD(pic_teardown_intr, bcm_mips_pic_teardown_intr), - - DEVMETHOD_END -}; - -DEFINE_CLASS_0(bcm_mips, bcm_mips_driver, bcm_mips_methods, sizeof(struct bcm_mips_softc)); - -MODULE_VERSION(bcm_mips, 1); -MODULE_DEPEND(bcm_mips, bhnd, 1, 1, 1); diff --git a/sys/mips/broadcom/bcm_mips74k.c b/sys/mips/broadcom/bcm_mips74k.c deleted file mode 100644 index b0d1649edc8..00000000000 --- a/sys/mips/broadcom/bcm_mips74k.c +++ /dev/null @@ -1,389 +0,0 @@ -/*- - * Copyright (c) 2016 Michael Zhilin - * Copyright (c) 2016 Landon Fuller - * Copyright (c) 2017 The FreeBSD Foundation - * All rights reserved. - * - * Portions of this software were developed by Landon Fuller - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce at minimum a disclaimer - * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any - * redistribution must be conditioned upon including a substantially - * similar Disclaimer requirement for further binary redistribution. - * - * NO WARRANTY - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER - * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGES. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include -#include - -#include "pic_if.h" - -#include "bcm_machdep.h" - -#include "bcm_mipsvar.h" -#include "bcm_mips74kreg.h" - -/* - * Broadcom MIPS74K Core - * - * These cores are only found on bcma(4) chipsets. - */ - -struct bcm_mips74k_softc; - -static int bcm_mips74k_pic_intr(void *arg); -static void bcm_mips74k_mask_irq(struct bcm_mips74k_softc *sc, - u_int mips_irq, u_int ivec); -static void bcm_mips74k_unmask_irq(struct bcm_mips74k_softc *sc, - u_int mips_irq, u_int ivec); - -static const struct bhnd_device bcm_mips74k_devs[] = { - BHND_DEVICE(MIPS, MIPS74K, NULL, NULL, BHND_DF_SOC), - BHND_DEVICE_END -}; - -struct bcm_mips74k_softc { - struct bcm_mips_softc bcm_mips; /**< parent softc */ - device_t dev; - struct resource *mem; /**< cpu core registers */ - int mem_rid; -}; - -/* Early routing of the CPU timer interrupt is required */ -static void -bcm_mips74k_timer_init(void *unused) -{ - struct bcm_platform *bp; - u_int irq; - uint32_t mask; - - bp = bcm_get_platform(); - - /* Must be a MIPS74K core attached to a BCMA interconnect */ - if (!bhnd_core_matches(&bp->cpu_id, &(struct bhnd_core_match) { - BHND_MATCH_CORE(BHND_MFGID_MIPS, BHND_COREID_MIPS74K) - })) { - if (bootverbose) { - BCM_ERR("not a MIPS74K core: %s %s\n", - bhnd_vendor_name(bp->cpu_id.vendor), - bhnd_core_name(&bp->cpu_id)); - } - - return; - } - - if (!BHND_CHIPTYPE_IS_BCMA_COMPATIBLE(bp->cid.chip_type)) { - if (bootverbose) - BCM_ERR("not a BCMA device\n"); - return; - } - - /* Route the timer bus ivec to the CPU's timer IRQ, and disable any - * other vectors assigned to the IRQ. */ - irq = BCM_MIPS74K_GET_TIMER_IRQ(); - mask = BCM_MIPS74K_INTR_SEL_FLAG(BCM_MIPS74K_TIMER_IVEC); - - BCM_CPU_WRITE_4(bp, BCM_MIPS74K_INTR_SEL(irq), mask); -} - -static int -bcm_mips74k_probe(device_t dev) -{ - const struct bhnd_device *id; - const struct bhnd_chipid *cid; - - id = bhnd_device_lookup(dev, bcm_mips74k_devs, - sizeof(bcm_mips74k_devs[0])); - if (id == NULL) - return (ENXIO); - - /* Check the chip type; the MIPS74K core should only be found - * on bcma(4) chipsets (and we rely on bcma OOB interrupt - * routing). */ - cid = bhnd_get_chipid(dev); - if (!BHND_CHIPTYPE_IS_BCMA_COMPATIBLE(cid->chip_type)) - return (ENXIO); - - bhnd_set_default_core_desc(dev); - return (BUS_PROBE_DEFAULT); -} - -static int -bcm_mips74k_attach(device_t dev) -{ - struct bcm_mips74k_softc *sc; - u_int timer_irq; - int error; - - sc = device_get_softc(dev); - sc->dev = dev; - - /* Allocate our core's register block */ - sc->mem_rid = 0; - sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid, - RF_ACTIVE); - if (sc->mem == NULL) { - device_printf(dev, "failed to allocate cpu register block\n"); - return (ENXIO); - } - - /* Clear interrupt map */ - timer_irq = BCM_MIPS74K_GET_TIMER_IRQ(); - for (size_t i = 0; i < BCM_MIPS74K_NUM_INTR; i++) { - /* We don't use the timer IRQ; leave it routed to the - * MIPS CPU */ - if (i == timer_irq) - continue; - - bus_write_4(sc->mem, BCM_MIPS74K_INTR_SEL(i), 0); - } - - /* Initialize the generic BHND MIPS driver state */ - error = bcm_mips_attach(dev, BCM_MIPS74K_NUM_INTR, timer_irq, - bcm_mips74k_pic_intr); - if (error) { - bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem); - return (error); - } - - return (0); -} - -static int -bcm_mips74k_detach(device_t dev) -{ - struct bcm_mips74k_softc *sc; - int error; - - sc = device_get_softc(dev); - - if ((error = bcm_mips_detach(dev))) - return (error); - - bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem); - - return (0); -} - -/* PIC_DISABLE_INTR() */ -static void -bcm_mips74k_pic_disable_intr(device_t dev, struct intr_irqsrc *irqsrc) -{ - struct bcm_mips74k_softc *sc; - struct bcm_mips_irqsrc *isrc; - - sc = device_get_softc(dev); - isrc = (struct bcm_mips_irqsrc *)irqsrc; - - KASSERT(isrc->cpuirq != NULL, ("no assigned MIPS IRQ")); - - bcm_mips74k_mask_irq(sc, isrc->cpuirq->mips_irq, isrc->ivec); -} - -/* PIC_ENABLE_INTR() */ -static void -bcm_mips74k_pic_enable_intr(device_t dev, struct intr_irqsrc *irqsrc) -{ - struct bcm_mips74k_softc *sc; - struct bcm_mips_irqsrc *isrc; - - sc = device_get_softc(dev); - isrc = (struct bcm_mips_irqsrc *)irqsrc; - - KASSERT(isrc->cpuirq != NULL, ("no assigned MIPS IRQ")); - - bcm_mips74k_unmask_irq(sc, isrc->cpuirq->mips_irq, isrc->ivec); -} - -/* PIC_PRE_ITHREAD() */ -static void -bcm_mips74k_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - bcm_mips74k_pic_disable_intr(dev, isrc); -} - -/* PIC_POST_ITHREAD() */ -static void -bcm_mips74k_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - bcm_mips74k_pic_enable_intr(dev, isrc); -} - -/* PIC_POST_FILTER() */ -static void -bcm_mips74k_pic_post_filter(device_t dev, struct intr_irqsrc *isrc) -{ -} - -/** - * Disable routing of backplane interrupt vector @p ivec to MIPS IRQ - * @p mips_irq. - */ -static void -bcm_mips74k_mask_irq(struct bcm_mips74k_softc *sc, u_int mips_irq, u_int ivec) -{ - uint32_t oobsel; - - KASSERT(mips_irq < sc->bcm_mips.num_cpuirqs, ("invalid MIPS IRQ %u", - mips_irq)); - KASSERT(mips_irq < BCM_MIPS74K_NUM_INTR, ("unsupported MIPS IRQ %u", - mips_irq)); - KASSERT(ivec < BCMA_OOB_NUM_BUSLINES, ("invalid backplane ivec")); - - oobsel = bus_read_4(sc->mem, BCM_MIPS74K_INTR_SEL(mips_irq)); - oobsel &= ~(BCM_MIPS74K_INTR_SEL_FLAG(ivec)); - bus_write_4(sc->mem, BCM_MIPS74K_INTR_SEL(mips_irq), oobsel); -} - -/** - * Enable routing of an interrupt. - */ -static void -bcm_mips74k_unmask_irq(struct bcm_mips74k_softc *sc, u_int mips_irq, u_int ivec) -{ - uint32_t oobsel; - - KASSERT(mips_irq < sc->bcm_mips.num_cpuirqs, ("invalid MIPS IRQ %u", - mips_irq)); - KASSERT(mips_irq < BCM_MIPS74K_NUM_INTR, ("unsupported MIPS IRQ %u", - mips_irq)); - KASSERT(ivec < BCMA_OOB_NUM_BUSLINES, ("invalid backplane ivec")); - - oobsel = bus_read_4(sc->mem, BCM_MIPS74K_INTR_SEL(mips_irq)); - oobsel |= BCM_MIPS74K_INTR_SEL_FLAG(ivec); - bus_write_4(sc->mem, BCM_MIPS74K_INTR_SEL(mips_irq), oobsel); -} - -/* our MIPS CPU interrupt filter */ -static int -bcm_mips74k_pic_intr(void *arg) -{ - struct bcm_mips74k_softc *sc; - struct bcm_mips_cpuirq *cpuirq; - struct bcm_mips_irqsrc *isrc_solo; - uint32_t oobsel, intr; - u_int i; - int error; - - cpuirq = arg; - sc = (struct bcm_mips74k_softc*)cpuirq->sc; - - /* Fetch current interrupt state */ - intr = bus_read_4(sc->mem, BCM_MIPS74K_INTR_STATUS); - - /* Fetch mask of interrupt vectors routed to this MIPS IRQ */ - KASSERT(cpuirq->mips_irq < BCM_MIPS74K_NUM_INTR, - ("invalid irq %u", cpuirq->mips_irq)); - - oobsel = bus_read_4(sc->mem, BCM_MIPS74K_INTR_SEL(cpuirq->mips_irq)); - - /* Ignore interrupts not routed to this MIPS IRQ */ - intr &= oobsel; - - /* Handle isrc_solo direct dispatch path */ - isrc_solo = cpuirq->isrc_solo; - if (isrc_solo != NULL) { - if (intr & BCM_MIPS_IVEC_MASK(isrc_solo)) { - error = intr_isrc_dispatch(&isrc_solo->isrc, - curthread->td_intr_frame); - if (error) { - device_printf(sc->dev, "Stray interrupt %u " - "detected\n", isrc_solo->ivec); - bcm_mips74k_pic_disable_intr(sc->dev, - &isrc_solo->isrc); - } - } - - intr &= ~(BCM_MIPS_IVEC_MASK(isrc_solo)); - if (intr == 0) - return (FILTER_HANDLED); - - /* Report and mask additional stray interrupts */ - while ((i = fls(intr)) != 0) { - i--; /* Get a 0-offset interrupt. */ - intr &= ~(1 << i); - - device_printf(sc->dev, "Stray interrupt %u " - "detected\n", i); - bcm_mips74k_mask_irq(sc, cpuirq->mips_irq, i); - } - - return (FILTER_HANDLED); - } - - /* Standard dispatch path */ - while ((i = fls(intr)) != 0) { - i--; /* Get a 0-offset interrupt. */ - intr &= ~(1 << i); - - KASSERT(i < nitems(sc->bcm_mips.isrcs), ("invalid ivec %u", i)); - - error = intr_isrc_dispatch(&sc->bcm_mips.isrcs[i].isrc, - curthread->td_intr_frame); - if (error) { - device_printf(sc->dev, "Stray interrupt %u detected\n", - i); - bcm_mips74k_mask_irq(sc, cpuirq->mips_irq, i); - continue; - } - } - - return (FILTER_HANDLED); -} - -static device_method_t bcm_mips74k_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, bcm_mips74k_probe), - DEVMETHOD(device_attach, bcm_mips74k_attach), - DEVMETHOD(device_detach, bcm_mips74k_detach), - - /* Interrupt controller interface */ - DEVMETHOD(pic_disable_intr, bcm_mips74k_pic_disable_intr), - DEVMETHOD(pic_enable_intr, bcm_mips74k_pic_enable_intr), - DEVMETHOD(pic_pre_ithread, bcm_mips74k_pic_pre_ithread), - DEVMETHOD(pic_post_ithread, bcm_mips74k_pic_post_ithread), - DEVMETHOD(pic_post_filter, bcm_mips74k_pic_post_filter), - - DEVMETHOD_END -}; - -static devclass_t bcm_mips_devclass; - -DEFINE_CLASS_1(bcm_mips, bcm_mips74k_driver, bcm_mips74k_methods, sizeof(struct bcm_mips_softc), bcm_mips_driver); -EARLY_DRIVER_MODULE(bcm_mips74k, bhnd, bcm_mips74k_driver, bcm_mips_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); -SYSINIT(cpu_init, SI_SUB_CPU, SI_ORDER_FIRST, bcm_mips74k_timer_init, NULL); -MODULE_VERSION(bcm_mips74k, 1); -MODULE_DEPEND(bcm_mips74k, bhnd, 1, 1, 1); diff --git a/sys/mips/broadcom/bcm_mips74kreg.h b/sys/mips/broadcom/bcm_mips74kreg.h deleted file mode 100644 index 7ab75917163..00000000000 --- a/sys/mips/broadcom/bcm_mips74kreg.h +++ /dev/null @@ -1,66 +0,0 @@ -/*- - * Copyright (c) 2016 Landon Fuller - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce at minimum a disclaimer - * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any - * redistribution must be conditioned upon including a substantially - * similar Disclaimer requirement for further binary redistribution. - * - * NO WARRANTY - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER - * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGES. - * - */ - -#ifndef _MIPS_BROADCOM_MIPS74KREG_H_ -#define _MIPS_BROADCOM_MIPS74KREG_H_ - -#define BCM_MIPS74K_CORECTL 0x00 /**< core control */ -#define BCM_MIPS74K_EXCBASE 0x04 /**< exception base */ - -#define BCM_MIPS74K_BIST_STATUS 0x0C /**< built-in self-test status */ -#define BCM_MIPS74K_INTR_STATUS 0x10 /**< interrupt status */ - -/* INTR(0-5)_MASK map bcma(4) OOB interrupt bus lines to MIPS hardware - * interrupts. */ -#define BCM_MIPS74K_INTR0_SEL 0x14 /**< IRQ0 OOBSEL mask */ -#define BCM_MIPS74K_INTR1_SEL 0x18 /**< IRQ1 OOBSEL mask */ -#define BCM_MIPS74K_INTR2_SEL 0x1C /**< IRQ2 OOBSEL mask */ -#define BCM_MIPS74K_INTR3_SEL 0x20 /**< IRQ3 OOBSEL mask */ -#define BCM_MIPS74K_INTR4_SEL 0x24 /**< IRQ4 OOBSEL mask */ -#define BCM_MIPS74K_INTR5_SEL 0x28 /**< IRQ5 OOBSEL mask */ -#define BCM_MIPS74K_NUM_INTR 6 /**< routable CPU interrupt count */ - -#define BCM_MIPS74K_INTR_SEL(_intr) \ - (BCM_MIPS74K_INTR0_SEL + ((_intr) * 4)) -#define BCM_MIPS74K_INTR_SEL_FLAG(_i) (1<<_i) - -#define BCM_MIPS74K_TIMER_IVEC 31 /**< MIPS timer's bus interrupt vector */ - -#define BCM_MIPS74K_NMI_MASK 0x2C /**< nmi mask */ - -#define BCM_MIPS74K_GPIO_SEL 0x40 /**< gpio select */ -#define BCM_MIPS74K_GPIO_OUT 0x44 /**< gpio output enable */ -#define BCM_MIPS74K_GPIO_EN 0x48 /**< gpio enable */ - -/** The MIPS timer interrupt IRQ assignment */ -#define BCM_MIPS74K_GET_TIMER_IRQ() \ - ((mips_rd_intctl() & MIPS_INTCTL_IPTI_MASK) >> MIPS_INTCTL_IPTI_SHIFT) - -#endif /* _MIPS_BROADCOM_MIPS74KREG_H_ */ diff --git a/sys/mips/broadcom/bcm_mipsvar.h b/sys/mips/broadcom/bcm_mipsvar.h deleted file mode 100644 index a1a22ea06ce..00000000000 --- a/sys/mips/broadcom/bcm_mipsvar.h +++ /dev/null @@ -1,110 +0,0 @@ -/*- - * Copyright (c) 2017 The FreeBSD Foundation - * - * This software was developed by Landon Fuller under sponsorship from - * the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce at minimum a disclaimer - * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any - * redistribution must be conditioned upon including a substantially - * similar Disclaimer requirement for further binary redistribution. - * - * NO WARRANTY - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER - * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGES. - * - */ - -#ifndef _MIPS_BROADCOM_BCM_MIPSVAR_H_ -#define _MIPS_BROADCOM_BCM_MIPSVAR_H_ - -#include -#include -#include -#include - -#include - -DECLARE_CLASS(bcm_mips_driver); - -struct bcm_mips_irqsrc; -struct bcm_mips_softc; - -#define BCM_MIPS_NINTR 32 /**< maximum number of addressable backplane interrupt vectors */ -#define BCM_MIPS_IRQ_SHARED 0 /**< MIPS CPU IRQ reserved for shared interrupt handling */ -#define INTR_MAP_DATA_BCM_MIPS INTR_MAP_DATA_PLAT_2 /**< Broadcom MIPS PIC interrupt map data type */ - -int bcm_mips_attach(device_t dev, u_int num_cpuirqs, u_int timer_irq, - driver_filter_t filter); -int bcm_mips_detach(device_t dev); - -/** - * Broadcom MIPS PIC interrupt map data. - */ -struct bcm_mips_intr_map_data { - struct intr_map_data mdata; - u_int ivec; /**< bus interrupt vector */ -}; - -/** - * Nested MIPS CPU interrupt handler state. - */ -struct bcm_mips_cpuirq { - struct bcm_mips_softc *sc; /**< driver instance state, or NULL if uninitialized. */ - u_int mips_irq; /**< mips hardware interrupt number (relative to NSOFT_IRQ) */ - int irq_rid; /**< mips IRQ resource id, or -1 if this entry is unavailable */ - struct resource *irq_res; /**< mips interrupt resource */ - void *irq_cookie; /**< mips interrupt handler cookie, or NULL */ - struct bcm_mips_irqsrc *isrc_solo; /**< solo isrc assigned to this interrupt, or NULL */ - u_int refs; /**< isrc consumer refcount */ -}; - -/** - * Broadcom MIPS PIC interrupt source definition. - */ -struct bcm_mips_irqsrc { - struct intr_irqsrc isrc; - u_int ivec; /**< bus interrupt vector */ - u_int refs; /**< active reference count */ - struct bcm_mips_cpuirq *cpuirq; /**< assigned MIPS HW IRQ, or NULL if no assignment */ -}; - -/** - * bcm_mips driver instance state. Must be first member of all subclass - * softc structures. - */ -struct bcm_mips_softc { - device_t dev; - struct bcm_mips_cpuirq cpuirqs[NREAL_IRQS]; /**< nested CPU IRQ handlers */ - u_int num_cpuirqs; /**< number of nested CPU IRQ handlers */ - u_int timer_irq; /**< CPU timer IRQ */ - struct bcm_mips_irqsrc isrcs[BCM_MIPS_NINTR]; - struct mtx mtx; -}; - -#define BCM_MIPS_IVEC_MASK(_isrc) (1 << ((_isrc)->ivec)) - -#define BCM_MIPS_LOCK_INIT(sc) \ - mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \ - "bhnd mips driver lock", MTX_DEF) -#define BCM_MIPS_LOCK(sc) mtx_lock(&(sc)->mtx) -#define BCM_MIPS_UNLOCK(sc) mtx_unlock(&(sc)->mtx) -#define BCM_MIPS_LOCK_ASSERT(sc, what) mtx_assert(&(sc)->mtx, what) -#define BCM_MIPS_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx) - -#endif /* _MIPS_BROADCOM_BCM_MIPSVAR_H_ */ diff --git a/sys/mips/broadcom/bcm_nvram_cfe.c b/sys/mips/broadcom/bcm_nvram_cfe.c deleted file mode 100644 index 494ef285d5d..00000000000 --- a/sys/mips/broadcom/bcm_nvram_cfe.c +++ /dev/null @@ -1,499 +0,0 @@ -/*- - * Copyright (c) 2016 Landon Fuller - * Copyright (c) 2017 The FreeBSD Foundation - * All rights reserved. - * - * Portions of this software were developed by Landon Fuller - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce at minimum a disclaimer - * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any - * redistribution must be conditioned upon including a substantially - * similar Disclaimer requirement for further binary redistribution. - * - * NO WARRANTY - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER - * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGES. - */ - -#include -/* - * BHND CFE NVRAM driver. - * - * Provides access to device NVRAM via CFE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include -#include -#include - -#include "bhnd_nvram_if.h" - -#include "bcm_machdep.h" -#include "bcm_nvram_cfevar.h" - -BHND_NVRAM_IOPS_DEFN(iocfe) - -#define IOCFE_LOG(_io, _fmt, ...) \ - printf("%s/%s: " _fmt, __FUNCTION__, (_io)->dname, ##__VA_ARGS__) - -static int bcm_nvram_iocfe_init(struct bcm_nvram_iocfe *iocfe, - char *dname); - -/** Known CFE NVRAM device names, in probe order. */ -static char *nvram_cfe_devs[] = { - "nflash0.nvram", /* NAND */ - "nflash1.nvram", - "flash0.nvram", - "flash1.nvram", -}; - -/** Supported CFE NVRAM formats, in probe order. */ -static bhnd_nvram_data_class * const nvram_cfe_fmts[] = { - &bhnd_nvram_bcm_class, - &bhnd_nvram_tlv_class -}; - -static int -bhnd_nvram_cfe_probe(device_t dev) -{ - struct bcm_platform *bp; - - /* Fetch platform NVRAM I/O context */ - bp = bcm_get_platform(); - if (bp->nvram_io == NULL) - return (ENXIO); - - KASSERT(bp->nvram_cls != NULL, ("missing NVRAM class")); - - /* Set the device description */ - device_set_desc(dev, bhnd_nvram_data_class_desc(bp->nvram_cls)); - - /* Refuse wildcard attachments */ - return (BUS_PROBE_NOWILDCARD); -} - -static int -bhnd_nvram_cfe_attach(device_t dev) -{ - struct bcm_platform *bp; - struct bhnd_nvram_cfe_softc *sc; - int error; - - bp = bcm_get_platform(); - KASSERT(bp->nvram_io != NULL, ("missing NVRAM I/O context")); - KASSERT(bp->nvram_cls != NULL, ("missing NVRAM class")); - - sc = device_get_softc(dev); - sc->dev = dev; - - error = bhnd_nvram_store_parse_new(&sc->store, bp->nvram_io, - bp->nvram_cls); - if (error) - return (error); - - error = bhnd_service_registry_add(&bp->services, dev, - BHND_SERVICE_NVRAM, 0); - if (error) { - bhnd_nvram_store_free(sc->store); - return (error); - } - - return (error); -} - -static int -bhnd_nvram_cfe_resume(device_t dev) -{ - return (0); -} - -static int -bhnd_nvram_cfe_suspend(device_t dev) -{ - return (0); -} - -static int -bhnd_nvram_cfe_detach(device_t dev) -{ - struct bcm_platform *bp; - struct bhnd_nvram_cfe_softc *sc; - int error; - - bp = bcm_get_platform(); - sc = device_get_softc(dev); - - error = bhnd_service_registry_remove(&bp->services, dev, - BHND_SERVICE_ANY); - if (error) - return (error); - - bhnd_nvram_store_free(sc->store); - - return (0); -} - -static int -bhnd_nvram_cfe_getvar(device_t dev, const char *name, void *buf, size_t *len, - bhnd_nvram_type type) -{ - struct bhnd_nvram_cfe_softc *sc = device_get_softc(dev); - - return (bhnd_nvram_store_getvar(sc->store, name, buf, len, type)); -} - -static int -bhnd_nvram_cfe_setvar(device_t dev, const char *name, const void *buf, - size_t len, bhnd_nvram_type type) -{ - struct bhnd_nvram_cfe_softc *sc = device_get_softc(dev); - - return (bhnd_nvram_store_setvar(sc->store, name, buf, len, type)); -} - -/** - * Find, open, identify, and initialize an I/O context mapping the CFE NVRAM - * device. - * - * @param[out] iocfe On success, an I/O context mapping the CFE NVRAM - * device. - * @param[out] cls On success, the identified NVRAM data format - * class. - * - * @retval 0 success. the caller inherits ownership of @p iocfe. - * @retval non-zero if no usable CFE NVRAM device can be found, a standard - * unix error will be returned. - */ -int -bcm_nvram_find_cfedev(struct bcm_nvram_iocfe *iocfe, - bhnd_nvram_data_class **cls) -{ - char *dname; - int devinfo; - int error, result; - - for (u_int i = 0; i < nitems(nvram_cfe_fmts); i++) { - *cls = nvram_cfe_fmts[i]; - - for (u_int j = 0; j < nitems(nvram_cfe_devs); j++) { - dname = nvram_cfe_devs[j]; - - /* Does the device exist? */ - if ((devinfo = cfe_getdevinfo(dname)) < 0) { - if (devinfo != CFE_ERR_DEVNOTFOUND) { - BCM_ERR("cfe_getdevinfo(%s) failed: " - "%d\n", dname, devinfo); - } - - continue; - } - - /* Open for reading */ - if ((error = bcm_nvram_iocfe_init(iocfe, dname))) - continue; - - /* Probe */ - result = bhnd_nvram_data_probe(*cls, &iocfe->io); - if (result <= 0) { - /* Found a supporting NVRAM data class */ - return (0); - } - - /* Keep searching */ - bhnd_nvram_io_free(&iocfe->io); - } - } - - return (ENODEV); -} - -/** - * Initialize a new CFE device-backed I/O context. - * - * The caller is responsible for releasing all resources held by the returned - * I/O context via bhnd_nvram_io_free(). - * - * @param[out] io On success, will be initialized as an I/O context for - * CFE device @p dname. - * @param dname The name of the CFE device to be opened for reading. - * - * @retval 0 success. - * @retval non-zero if opening @p dname otherwise fails, a standard unix - * error will be returned. - */ -static int -bcm_nvram_iocfe_init(struct bcm_nvram_iocfe *iocfe, char *dname) -{ - nvram_info_t nvram_info; - int cerr, devinfo, dtype, rlen; - int64_t nv_offset; - u_int nv_size; - bool req_blk_erase; - int error; - - iocfe->io.iops = &bhnd_nvram_iocfe_ops; - iocfe->dname = dname; - - /* Try to open the device */ - iocfe->fd = cfe_open(dname); - if (iocfe->fd <= 0) { - IOCFE_LOG(iocfe, "cfe_open() failed: %d\n", iocfe->fd); - - return (ENXIO); - } - - /* Try to fetch device info */ - if ((devinfo = cfe_getdevinfo(iocfe->dname)) < 0) { - IOCFE_LOG(iocfe, "cfe_getdevinfo() failed: %d\n", devinfo); - error = ENXIO; - goto failed; - } - - /* Verify device type */ - dtype = devinfo & CFE_DEV_MASK; - switch (dtype) { - case CFE_DEV_FLASH: - case CFE_DEV_NVRAM: - /* Valid device type */ - break; - default: - IOCFE_LOG(iocfe, "unknown device type: %d\n", dtype); - error = ENXIO; - goto failed; - } - - /* Try to fetch nvram info from CFE */ - cerr = cfe_ioctl(iocfe->fd, IOCTL_NVRAM_GETINFO, - (unsigned char *)&nvram_info, sizeof(nvram_info), &rlen, 0); - if (cerr == CFE_OK) { - /* Sanity check the result; must not be a negative integer */ - if (nvram_info.nvram_size < 0 || - nvram_info.nvram_offset < 0) - { - IOCFE_LOG(iocfe, "invalid NVRAM layout (%d/%d)\n", - nvram_info.nvram_size, nvram_info.nvram_offset); - error = ENXIO; - goto failed; - } - - nv_offset = nvram_info.nvram_offset; - nv_size = nvram_info.nvram_size; - req_blk_erase = (nvram_info.nvram_eraseflg != 0); - } else if (cerr != CFE_OK && cerr != CFE_ERR_INV_COMMAND) { - IOCFE_LOG(iocfe, "IOCTL_NVRAM_GETINFO failed: %d\n", cerr); - error = ENXIO; - goto failed; - } - - /* Fall back on flash info. - * - * This is known to be required on the Asus RT-N53 (CFE 5.70.55.33, - * BBP 1.0.37, BCM5358UB0), where IOCTL_NVRAM_GETINFO returns - * CFE_ERR_INV_COMMAND. - */ - if (cerr == CFE_ERR_INV_COMMAND) { - flash_info_t fi; - - cerr = cfe_ioctl(iocfe->fd, IOCTL_FLASH_GETINFO, - (unsigned char *)&fi, sizeof(fi), &rlen, 0); - - if (cerr != CFE_OK) { - IOCFE_LOG(iocfe, "IOCTL_FLASH_GETINFO failed %d\n", - cerr); - error = ENXIO; - goto failed; - } - - nv_offset = 0x0; - nv_size = fi.flash_size; - req_blk_erase = !(fi.flash_flags & FLASH_FLAG_NOERASE); - } - - /* Verify that the full NVRAM layout can be represented via size_t */ - if (nv_size > SIZE_MAX || SIZE_MAX - nv_size < nv_offset) { - IOCFE_LOG(iocfe, "invalid NVRAM layout (%#x/%#jx)\n", - nv_size, (intmax_t)nv_offset); - error = ENXIO; - goto failed; - } - - iocfe->offset = nv_offset; - iocfe->size = nv_size; - iocfe->req_blk_erase = req_blk_erase; - - return (CFE_OK); - -failed: - if (iocfe->fd >= 0) - cfe_close(iocfe->fd); - - return (error); -} - -static void -bhnd_nvram_iocfe_free(struct bhnd_nvram_io *io) -{ - struct bcm_nvram_iocfe *iocfe = (struct bcm_nvram_iocfe *)io; - - /* CFE I/O instances are statically allocated; we do not need to free - * the instance itself */ - cfe_close(iocfe->fd); -} - -static size_t -bhnd_nvram_iocfe_getsize(struct bhnd_nvram_io *io) -{ - struct bcm_nvram_iocfe *iocfe = (struct bcm_nvram_iocfe *)io; - return (iocfe->size); -} - -static int -bhnd_nvram_iocfe_setsize(struct bhnd_nvram_io *io, size_t size) -{ - /* unsupported */ - return (ENODEV); -} - -static int -bhnd_nvram_iocfe_read_ptr(struct bhnd_nvram_io *io, size_t offset, - const void **ptr, size_t nbytes, size_t *navail) -{ - /* unsupported */ - return (ENODEV); -} - -static int -bhnd_nvram_iocfe_write_ptr(struct bhnd_nvram_io *io, size_t offset, - void **ptr, size_t nbytes, size_t *navail) -{ - /* unsupported */ - return (ENODEV); -} - -static int -bhnd_nvram_iocfe_write(struct bhnd_nvram_io *io, size_t offset, void *buffer, - size_t nbytes) -{ - /* unsupported */ - return (ENODEV); -} - -static int -bhnd_nvram_iocfe_read(struct bhnd_nvram_io *io, size_t offset, void *buffer, - size_t nbytes) -{ - struct bcm_nvram_iocfe *iocfe; - size_t remain; - int64_t cfe_offset; - int nr, nreq; - - iocfe = (struct bcm_nvram_iocfe *)io; - - /* Determine (and validate) the base CFE offset */ -#if (SIZE_MAX > INT64_MAX) - if (iocfe->offset > INT64_MAX || offset > INT64_MAX) - return (ENXIO); -#endif - - if (INT64_MAX - offset < iocfe->offset) - return (ENXIO); - - cfe_offset = iocfe->offset + offset; - - /* Verify that cfe_offset + nbytes is representable */ - if (INT64_MAX - cfe_offset < nbytes) - return (ENXIO); - - /* Perform the read */ - for (remain = nbytes; remain > 0;) { - void *p; - size_t nread; - int64_t cfe_noff; - - nread = (nbytes - remain); - cfe_noff = cfe_offset + nread; - p = ((uint8_t *)buffer + nread); - nreq = ummin(INT_MAX, remain); - - nr = cfe_readblk(iocfe->fd, cfe_noff, p, nreq); - if (nr < 0) { - IOCFE_LOG(iocfe, "cfe_readblk() failed: %d\n", nr); - return (ENXIO); - } - - /* Check for unexpected short read */ - if (nr == 0 && remain > 0) { - /* If the request fits entirely within the CFE - * device range, we shouldn't hit EOF */ - if (remain < iocfe->size && - iocfe->size - remain > offset) - { - IOCFE_LOG(iocfe, "cfe_readblk() returned " - "unexpected short read (%d/%d)\n", nr, - nreq); - return (ENXIO); - } - } - - if (nr == 0) - break; - - remain -= nr; - } - - /* Check for short read */ - if (remain > 0) - return (ENXIO); - - return (0); -} - -static device_method_t bhnd_nvram_cfe_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, bhnd_nvram_cfe_probe), - DEVMETHOD(device_attach, bhnd_nvram_cfe_attach), - DEVMETHOD(device_resume, bhnd_nvram_cfe_resume), - DEVMETHOD(device_suspend, bhnd_nvram_cfe_suspend), - DEVMETHOD(device_detach, bhnd_nvram_cfe_detach), - - /* NVRAM interface */ - DEVMETHOD(bhnd_nvram_getvar, bhnd_nvram_cfe_getvar), - DEVMETHOD(bhnd_nvram_setvar, bhnd_nvram_cfe_setvar), - - DEVMETHOD_END -}; - -DEFINE_CLASS_0(bhnd_nvram, bhnd_nvram_cfe, bhnd_nvram_cfe_methods, - sizeof(struct bhnd_nvram_cfe_softc)); -EARLY_DRIVER_MODULE(bhnd_nvram_cfe, nexus, bhnd_nvram_cfe, - bhnd_nvram_devclass, NULL, NULL, BUS_PASS_BUS + BUS_PASS_ORDER_EARLY); diff --git a/sys/mips/broadcom/bcm_nvram_cfevar.h b/sys/mips/broadcom/bcm_nvram_cfevar.h deleted file mode 100644 index 590dac4402a..00000000000 --- a/sys/mips/broadcom/bcm_nvram_cfevar.h +++ /dev/null @@ -1,66 +0,0 @@ -/*- - * Copyright (c) 2015-2016 Landon Fuller - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce at minimum a disclaimer - * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any - * redistribution must be conditioned upon including a substantially - * similar Disclaimer requirement for further binary redistribution. - * - * NO WARRANTY - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER - * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGES. - * - */ - -#ifndef _MIPS_BROADCOM_BCM_NVRAM_CFE_H_ -#define _MIPS_BROADCOM_BCM_NVRAM_CFE_H_ - -#include -#include - -#include -#include -#include - -struct bcm_nvram_iocfe; - -int bcm_nvram_find_cfedev(struct bcm_nvram_iocfe *iocfe, - bhnd_nvram_data_class **cls); - -/** - * CFE-backed bhnd_nvram_io implementation. - */ -struct bcm_nvram_iocfe { - struct bhnd_nvram_io io; /**< common I/O instance state */ - - char *dname; /**< CFE device name (borrowed) */ - int fd; /**< CFE file descriptor */ - size_t offset; /**< base offset */ - size_t size; /**< device size */ - bool req_blk_erase; /**< flash blocks must be erased - before writing */ -}; - -/** bhnd_nvram_cfe driver instance state. */ -struct bhnd_nvram_cfe_softc { - device_t dev; - struct bhnd_nvram_store *store; /**< nvram store */ -}; - -#endif /* _MIPS_BROADCOM_BCM_NVRAM_CFE_H_ */ diff --git a/sys/mips/broadcom/bcm_pmu.c b/sys/mips/broadcom/bcm_pmu.c deleted file mode 100644 index 410724d02ea..00000000000 --- a/sys/mips/broadcom/bcm_pmu.c +++ /dev/null @@ -1,295 +0,0 @@ -/*- - * Copyright (c) 2016 Landon Fuller - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include - -#include - -#include - -#include -#include - -#include "bcm_machdep.h" - -static struct bhnd_pmu_query *bcm_get_pmu(struct bcm_platform *bp); -static bool bcm_has_pmu(struct bcm_platform *bp); - -static uint32_t bcm_pmu_read4(bus_size_t reg, void *ctx); -static void bcm_pmu_write4(bus_size_t reg, uint32_t val, - void *ctx); -static uint32_t bcm_pmu_read_chipst(void *ctx); - -const struct bhnd_pmu_io bcm_pmu_soc_io = { - .rd4 = bcm_pmu_read4, - .wr4 = bcm_pmu_write4, - .rd_chipst = bcm_pmu_read_chipst -}; - -/** - * Supported UART clock sources. - */ -typedef enum { - BCM_UART_RCLK_PLL_T1 = 0, /**< UART uses PLL m2 (mii/uart/mipsref) with no divisor */ - BCM_UART_RCLK_ALP = 1, /**< UART uses ALP rclk with no divisor */ - BCM_UART_RCLK_EXT = 2, /**< UART uses 1.8423 MHz external clock */ - BCM_UART_RCLK_SI = 3, /**< UART uses backplane clock with divisor of two */ - BCM_UART_RCLK_FIXED = 4, /**< UART uses fixed 88Mhz backplane clock with a divisor of 48 */ -} bcm_uart_clksrc; - -/** - * UART clock configuration. - */ -struct bcm_uart_clkcfg { - bcm_uart_clksrc src; /**< clock source */ - uint32_t div; /**< clock divisor */ - uint32_t freq; /**< clock frequency (Hz) */ -}; - -#define BCM_UART_RCLK_PLL_T1_DIV 1 -#define BCM_UART_RCLK_ALP_DIV 1 -#define BCM_UART_RCLK_EXT_HZ 1842300 /* 1.8423MHz */ -#define BCM_UART_RCLK_EXT_DIV 1 -#define BCM_UART_RCLK_FIXED_HZ 88000000 /* 88MHz */ -#define BCM_UART_RCLK_FIXED_DIV 48 - -/* Fetch PLL type from ChipCommon capability flags */ -#define BCM_PMU_PLL_TYPE(_bp) \ - CHIPC_GET_BITS(_bp->cc_caps, CHIPC_CAP_PLL) - -/** - * Return the PMU instance, or NULL if no PMU. - */ -static struct bhnd_pmu_query * -bcm_get_pmu(struct bcm_platform *bp) -{ - if (!bcm_has_pmu(bp)) - return (NULL); - return (&bp->pmu); -} - -/** - * Return true if a PMU is available, false otherwise. - */ -static bool -bcm_has_pmu(struct bcm_platform *bp) -{ - return (bp->pmu_addr != 0); -} - -/** - * Determine the UART clock source for @p bp and return the - * corresponding clock configuration, if any. - */ -static struct bcm_uart_clkcfg -bcm_get_uart_clkcfg(struct bcm_platform *bp) -{ - struct bcm_uart_clkcfg cfg; - struct bhnd_core_info *cc_id; - - cc_id = &bp->cc_id; - - /* These tests are ordered by precedence. */ - - /* PLL M2 clock source? */ - if (!bcm_has_pmu(bp) && BCM_PMU_PLL_TYPE(bp) == CHIPC_PLL_TYPE1) { - uint32_t n, m; - - n = BCM_CHIPC_READ_4(bp, CHIPC_CLKC_N); - m = BCM_CHIPC_READ_4(bp, CHIPC_CLKC_M2); - - cfg = (struct bcm_uart_clkcfg) { - BCM_UART_RCLK_PLL_T1, - BCM_UART_RCLK_PLL_T1_DIV, - bhnd_pwrctl_clock_rate(BCM_PMU_PLL_TYPE(bp), n, m) - }; - - return (cfg); - } - - /* ALP clock source? */ - if (cc_id->hwrev != 15 && cc_id->hwrev >= 11) { - cfg = (struct bcm_uart_clkcfg) { - BCM_UART_RCLK_ALP, - BCM_UART_RCLK_ALP_DIV, - bcm_get_alpfreq(bp) - }; - return (cfg); - } - - /* External clock? */ - if (CHIPC_HWREV_HAS_CORECTRL(cc_id->hwrev)) { - uint32_t corectrl, uclksel; - bool uintclk0; - - /* Fetch UART clock support flag */ - uclksel = CHIPC_GET_BITS(bp->cc_caps, CHIPC_CAP_UCLKSEL); - - /* Is UART using internal clock? */ - corectrl = BCM_CHIPC_READ_4(bp, CHIPC_CORECTRL); - uintclk0 = CHIPC_GET_FLAG(corectrl, CHIPC_UARTCLKO); - - if (uintclk0 && uclksel == CHIPC_CAP_UCLKSEL_UINTCLK) { - cfg = (struct bcm_uart_clkcfg) { - BCM_UART_RCLK_EXT, - BCM_UART_RCLK_EXT_DIV, - BCM_UART_RCLK_EXT_HZ - }; - return (cfg); - } - } - - /* UART uses backplane clock? */ - if (cc_id->hwrev == 15 || (cc_id->hwrev >= 3 && cc_id->hwrev <= 10)) { - cfg = (struct bcm_uart_clkcfg) { - BCM_UART_RCLK_SI, - BCM_CHIPC_READ_4(bp, CHIPC_CLKDIV) & CHIPC_CLKD_UART, - bcm_get_sifreq(bp) - }; - - return (cfg); - } - - /* UART uses fixed clock? */ - if (cc_id->hwrev <= 2) { - cfg = (struct bcm_uart_clkcfg) { - BCM_UART_RCLK_FIXED, - BCM_UART_RCLK_FIXED_DIV, - BCM_UART_RCLK_FIXED_HZ - }; - - return (cfg); - } - - /* All cases must be accounted for above */ - panic("unreachable - no clock config"); -} - -/** - * Return the UART reference clock frequency (in Hz). - */ -u_int -bcm_get_uart_rclk(struct bcm_platform *bp) -{ - struct bcm_uart_clkcfg cfg; - - cfg = bcm_get_uart_clkcfg(bp); - return (cfg.freq / cfg.div); -} - -/** ALP clock frequency (in Hz) */ -uint64_t -bcm_get_alpfreq(struct bcm_platform *bp) { - if (!bcm_has_pmu(bp)) - return (BHND_PMU_ALP_CLOCK); - - return (bhnd_pmu_alp_clock(bcm_get_pmu(bp))); -} - -/** ILP clock frequency (in Hz) */ -uint64_t -bcm_get_ilpfreq(struct bcm_platform *bp) { - if (!bcm_has_pmu(bp)) - return (BHND_PMU_ILP_CLOCK); - - return (bhnd_pmu_ilp_clock(bcm_get_pmu(bp))); -} - -/** CPU clock frequency (in Hz) */ -uint64_t -bcm_get_cpufreq(struct bcm_platform *bp) -{ - uint32_t fixed_hz; - uint32_t n, m; - bus_size_t mreg; - uint8_t pll_type; - - /* PMU support */ - if (bcm_has_pmu(bp)) - return (bhnd_pmu_cpu_clock(bcm_get_pmu(bp))); - - /* - * PWRCTL support - */ - pll_type = CHIPC_GET_BITS(bp->cc_caps, CHIPC_CAP_PLL); - mreg = bhnd_pwrctl_cpu_clkreg_m(&bp->cid, pll_type, &fixed_hz); - if (mreg == 0) - return (fixed_hz); - - n = BCM_CHIPC_READ_4(bp, CHIPC_CLKC_N); - m = BCM_CHIPC_READ_4(bp, mreg); - - return (bhnd_pwrctl_cpu_clock_rate(&bp->cid, pll_type, n, m)); - -} - -/** Backplane clock frequency (in Hz) */ -uint64_t -bcm_get_sifreq(struct bcm_platform *bp) -{ - uint32_t fixed_hz; - uint32_t n, m; - bus_size_t mreg; - uint8_t pll_type; - - /* PMU support */ - if (bcm_has_pmu(bp)) - return (bhnd_pmu_si_clock(bcm_get_pmu(bp))); - - /* - * PWRCTL support - */ - pll_type = CHIPC_GET_BITS(bp->cc_caps, CHIPC_CAP_PLL); - mreg = bhnd_pwrctl_si_clkreg_m(&bp->cid, pll_type, &fixed_hz); - if (mreg == 0) - return (fixed_hz); - - n = BCM_CHIPC_READ_4(bp, CHIPC_CLKC_N); - m = BCM_CHIPC_READ_4(bp, mreg); - - return (bhnd_pwrctl_si_clock_rate(&bp->cid, pll_type, n, m)); -} - -static uint32_t -bcm_pmu_read4(bus_size_t reg, void *ctx) { - struct bcm_platform *bp = ctx; - return (readl(BCM_SOC_ADDR(bp->pmu_addr, reg))); -} - -static void -bcm_pmu_write4(bus_size_t reg, uint32_t val, void *ctx) { - struct bcm_platform *bp = ctx; - writel(BCM_SOC_ADDR(bp->pmu_addr, reg), val); -} - -static uint32_t -bcm_pmu_read_chipst(void *ctx) -{ - struct bcm_platform *bp = ctx; - return (readl(BCM_SOC_ADDR(bp->cc_addr, CHIPC_CHIPST))); -} diff --git a/sys/mips/broadcom/bcma_nexus.c b/sys/mips/broadcom/bcma_nexus.c deleted file mode 100644 index 3b98adbce59..00000000000 --- a/sys/mips/broadcom/bcma_nexus.c +++ /dev/null @@ -1,116 +0,0 @@ -/*- - * Copyright (c) 2016 Michael Zhilin - * Copyright (c) 2015-2016 Landon Fuller - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce at minimum a disclaimer - * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any - * redistribution must be conditioned upon including a substantially - * similar Disclaimer requirement for further binary redistribution. - * - * NO WARRANTY - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER - * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGES. - * - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include -#include - -#include "bcm_mipsvar.h" -#include "bcm_machdep.h" - -#include "bhnd_nexusvar.h" - -/* - * Supports bcma(4) attachment to a MIPS nexus bus. - */ - -static int bcma_nexus_attach(device_t); -static int bcma_nexus_probe(device_t); - -_Static_assert(BCMA_OOB_NUM_BUSLINES == BCM_MIPS_NINTR, "BCMA incompatible " - "with generic NINTR"); - -static int -bcma_nexus_probe(device_t dev) -{ - int error; - - switch (bcm_get_platform()->cid.chip_type) { - case BHND_CHIPTYPE_BCMA: - case BHND_CHIPTYPE_BCMA_ALT: - case BHND_CHIPTYPE_UBUS: - break; - default: - return (ENXIO); - } - - if ((error = bcma_probe(dev)) > 0) - return (error); - - /* Set device description */ - bhnd_set_default_bus_desc(dev, &bcm_get_platform()->cid); - - return (BUS_PROBE_SPECIFIC); -} - -static int -bcma_nexus_attach(device_t dev) -{ - int error; - - /* Perform initial attach and enumerate our children. */ - if ((error = bcma_attach(dev))) - goto failed; - - /* Delegate remainder to standard bhnd method implementation */ - if ((error = bhnd_generic_attach(dev))) - goto failed; - - return (0); - -failed: - device_delete_children(dev); - return (error); -} - -static device_method_t bcma_nexus_methods[] = { - DEVMETHOD(device_probe, bcma_nexus_probe), - DEVMETHOD(device_attach, bcma_nexus_attach), - - DEVMETHOD_END -}; - -DEFINE_CLASS_2(bhnd, bcma_nexus_driver, bcma_nexus_methods, - sizeof(struct bcma_softc), bhnd_nexus_driver, bcma_driver); - -EARLY_DRIVER_MODULE(bcma_nexus, nexus, bcma_nexus_driver, bhnd_devclass, 0, 0, - BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); diff --git a/sys/mips/broadcom/bhnd_nexus.c b/sys/mips/broadcom/bhnd_nexus.c deleted file mode 100644 index 365be459007..00000000000 --- a/sys/mips/broadcom/bhnd_nexus.c +++ /dev/null @@ -1,278 +0,0 @@ -/*- - * Copyright (c) 2015-2016 Landon Fuller - * Copyright (c) 2017 The FreeBSD Foundation - * All rights reserved. - * - * Portions of this software were developed by Landon Fuller - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce at minimum a disclaimer - * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any - * redistribution must be conditioned upon including a substantially - * similar Disclaimer requirement for further binary redistribution. - * - * NO WARRANTY - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER - * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGES. - * - */ - -#include -/* - * bhnd(4) driver mix-in providing shared common methods for - * bhnd bus devices attached via a MIPS root nexus. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include - -#include "bcm_machdep.h" -#include "bcm_mipsvar.h" - -#include "bhnd_nexusvar.h" - -/** - * Default bhnd_nexus implementation of BHND_BUS_GET_SERVICE_REGISTRY(). - */ -static struct bhnd_service_registry * -bhnd_nexus_get_service_registry(device_t dev, device_t child) -{ - struct bcm_platform *bp = bcm_get_platform(); - return (&bp->services); -} - -/** - * Default bhnd_nexus implementation of BHND_BUS_ACTIVATE_RESOURCE(). - */ -static int -bhnd_nexus_activate_resource(device_t dev, device_t child, int type, int rid, - struct bhnd_resource *r) -{ - int error; - - /* Always direct */ - if ((error = bus_activate_resource(child, type, rid, r->res))) - return (error); - - r->direct = true; - return (0); -} - -/** - * Default bhnd_nexus implementation of BHND_BUS_DEACTIVATE_RESOURCE(). - */ -static int -bhnd_nexus_deactivate_resource(device_t dev, device_t child, - int type, int rid, struct bhnd_resource *r) -{ - int error; - - /* Always direct */ - KASSERT(r->direct, ("indirect resource delegated to bhnd_nexus\n")); - - if ((error = bus_deactivate_resource(child, type, rid, r->res))) - return (error); - - r->direct = false; - return (0); -} - -/** - * Default bhnd_nexus implementation of BHND_BUS_IS_HW_DISABLED(). - */ -static bool -bhnd_nexus_is_hw_disabled(device_t dev, device_t child) -{ - struct bcm_platform *bp; - struct bhnd_chipid *cid; - - bp = bcm_get_platform(); - cid = &bp->cid; - - /* The BCM4706 low-cost package leaves secondary GMAC cores - * floating */ - if (cid->chip_id == BHND_CHIPID_BCM4706 && - cid->chip_pkg == BHND_PKGID_BCM4706L && - bhnd_get_device(child) == BHND_COREID_4706_GMAC && - bhnd_get_core_unit(child) != 0) - { - return (true); - } - - return (false); -} - -/** - * Default bhnd_nexus implementation of BHND_BUS_AGET_ATTACH_TYPE(). - */ -static bhnd_attach_type -bhnd_nexus_get_attach_type(device_t dev, device_t child) -{ - return (BHND_ATTACH_NATIVE); -} - -/** - * Default bhnd_nexus implementation of BHND_BUS_GET_CHIPID(). - */ -static const struct bhnd_chipid * -bhnd_nexus_get_chipid(device_t dev, device_t child) -{ - return (&bcm_get_platform()->cid); -} - -/** - * Default bhnd_nexus implementation of BHND_BUS_READ_BOARD_INFO(). - */ -static int -bhnd_nexus_read_board_info(device_t dev, device_t child, - struct bhnd_board_info *info) -{ - int error; - - /* Initialize with NVRAM-derived values */ - if ((error = bhnd_bus_generic_read_board_info(dev, child, info))) - return (error); - - /* The board vendor should default to PCI_VENDOR_BROADCOM if not - * otherwise specified */ - if (info->board_vendor == 0) - info->board_vendor = PCI_VENDOR_BROADCOM; - - return (0); -} - -/** - * Default bhnd_nexus implementation of BHND_BUS_MAP_INTR(). - */ -static int -bhnd_nexus_map_intr(device_t dev, device_t child, u_int intr, rman_res_t *irq) -{ - struct bcm_mips_intr_map_data *imd; - u_int ivec; - uintptr_t xref; - int error; - - /* Fetch the backplane interrupt vector */ - if ((error = bhnd_get_intr_ivec(child, intr, &ivec))) { - device_printf(dev, "error fetching ivec for intr %u: %d\n", - intr, error); - return (error); - } - - /* Determine our interrupt domain */ - xref = BHND_BUS_GET_INTR_DOMAIN(dev, child, false); - KASSERT(xref != 0, ("missing interrupt domain")); - - /* Allocate our map data */ - imd = (struct bcm_mips_intr_map_data *)intr_alloc_map_data( - INTR_MAP_DATA_BCM_MIPS, sizeof(*imd), M_WAITOK | M_ZERO); - imd->ivec = ivec; - - /* Map the IRQ */ - *irq = intr_map_irq(NULL, xref, &imd->mdata); - return (0); -} - -/** - * Default bhnd_nexus implementation of BHND_BUS_UNMAP_INTR(). - */ -static void -bhnd_nexus_unmap_intr(device_t dev, device_t child, rman_res_t irq) -{ - if (irq > UINT_MAX) - panic("invalid irq: %ju", (uintmax_t)irq); - - intr_unmap_irq(irq); -} - -/** - * Default bhnd_nexus implementation of BHND_BUS_GET_DMA_TRANSLATION(). - */ -static int -bhnd_nexus_get_dma_translation(device_t dev, device_t child, - u_int width, uint32_t flags, bus_dma_tag_t *dmat, - struct bhnd_dma_translation *translation) -{ - struct bcm_platform *bp = bcm_get_platform(); - - /* We don't (currently) support any flags */ - if (flags != 0x0) - return (ENOENT); - - KASSERT(width > 0 && width <= BHND_DMA_ADDR_64BIT, - ("invalid width %u", width)); - - /* Is the requested width supported? */ - if (width > BHND_DMA_ADDR_32BIT) { - /* Backplane must support 64-bit addressing */ - if (!(bp->cid.chip_caps & BHND_CAP_BP64)) - width = BHND_DMA_ADDR_32BIT; - } - - /* No DMA address translation required */ - if (dmat != NULL) - *dmat = bus_get_dma_tag(dev); - - if (translation != NULL) { - *translation = (struct bhnd_dma_translation) { - .base_addr = 0x0, - .addr_mask = BHND_DMA_ADDR_BITMASK(width), - .addrext_mask = 0 - }; - } - - return (0); -} - -static device_method_t bhnd_nexus_methods[] = { - /* bhnd interface */ - DEVMETHOD(bhnd_bus_get_service_registry,bhnd_nexus_get_service_registry), - DEVMETHOD(bhnd_bus_register_provider, bhnd_bus_generic_sr_register_provider), - DEVMETHOD(bhnd_bus_deregister_provider, bhnd_bus_generic_sr_deregister_provider), - DEVMETHOD(bhnd_bus_retain_provider, bhnd_bus_generic_sr_retain_provider), - DEVMETHOD(bhnd_bus_release_provider, bhnd_bus_generic_sr_release_provider), - DEVMETHOD(bhnd_bus_activate_resource, bhnd_nexus_activate_resource), - DEVMETHOD(bhnd_bus_deactivate_resource, bhnd_nexus_deactivate_resource), - DEVMETHOD(bhnd_bus_is_hw_disabled, bhnd_nexus_is_hw_disabled), - DEVMETHOD(bhnd_bus_get_attach_type, bhnd_nexus_get_attach_type), - DEVMETHOD(bhnd_bus_get_chipid, bhnd_nexus_get_chipid), - DEVMETHOD(bhnd_bus_get_dma_translation, bhnd_nexus_get_dma_translation), - DEVMETHOD(bhnd_bus_get_intr_domain, bhnd_bus_generic_get_intr_domain), - DEVMETHOD(bhnd_bus_map_intr, bhnd_nexus_map_intr), - DEVMETHOD(bhnd_bus_read_board_info, bhnd_nexus_read_board_info), - DEVMETHOD(bhnd_bus_unmap_intr, bhnd_nexus_unmap_intr), - - DEVMETHOD_END -}; - -DEFINE_CLASS_0(bhnd, bhnd_nexus_driver, bhnd_nexus_methods, - sizeof(struct bhnd_softc)); diff --git a/sys/mips/broadcom/bhnd_nexusvar.h b/sys/mips/broadcom/bhnd_nexusvar.h deleted file mode 100644 index 6bb953bc01b..00000000000 --- a/sys/mips/broadcom/bhnd_nexusvar.h +++ /dev/null @@ -1,39 +0,0 @@ -/*- - * Copyright (c) 2016 Landon Fuller - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce at minimum a disclaimer - * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any - * redistribution must be conditioned upon including a substantially - * similar Disclaimer requirement for further binary redistribution. - * - * NO WARRANTY - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY - * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER - * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGES. - * - */ - -#ifndef _MIPS_BROADCOM_BHND_NEXUSVAR_H_ -#define _MIPS_BROADCOM_BHND_NEXUSVAR_H_ - -#include -#include - -DECLARE_CLASS(bhnd_nexus_driver); - -#endif /* _MIPS_BROADCOM_BHND_NEXUSVAR_H_ */ diff --git a/sys/mips/broadcom/files.broadcom b/sys/mips/broadcom/files.broadcom deleted file mode 100644 index 497014d2a3b..00000000000 --- a/sys/mips/broadcom/files.broadcom +++ /dev/null @@ -1,31 +0,0 @@ - -# TODO: Add attachment elsewhere in the tree -# for USB 1.1 OHCI, Ethernet and IPSEC cores -# which are believed to be devices we have drivers for -# which just need to be tweaked for attachment to an BHND system bus. -mips/broadcom/bcm_machdep.c standard -mips/broadcom/bcm_bmips.c optional siba_nexus siba -mips/broadcom/bcm_mips74k.c optional bcma_nexus bcma -mips/broadcom/bcm_mips.c optional siba_nexus siba | \ - bcma_nexus bcma -mips/broadcom/bcm_nvram_cfe.c optional bhnd siba_nexus cfe | \ - bhnd bcma_nexus cfe -mips/broadcom/bcm_pmu.c standard - -mips/broadcom/bhnd_nexus.c optional bhnd siba_nexus | \ - bhnd bcma_nexus -mips/broadcom/bcma_nexus.c optional bcma_nexus bcma bhnd -mips/broadcom/siba_nexus.c optional siba_nexus siba bhnd - -mips/mips/tick.c standard - -mips/broadcom/uart_cpu_chipc.c optional uart -mips/broadcom/uart_bus_chipc.c optional uart - -# TODO: Replace with BCM47xx/57xx/etc-aware geom_map -geom/geom_flashmap.c standard - -# USB bits -dev/bhnd/cores/usb/bhnd_usb.c optional usb -dev/bhnd/cores/usb/bhnd_ehci.c optional ehci -dev/bhnd/cores/usb/bhnd_ohci.c optional ohci diff --git a/sys/mips/broadcom/siba_nexus.c b/sys/mips/broadcom/siba_nexus.c deleted file mode 100644 index 0fe26e5aa75..00000000000 --- a/sys/mips/broadcom/siba_nexus.c +++ /dev/null @@ -1,106 +0,0 @@ -/*- - * Copyright (c) 2015-2016 Landon Fuller - * Copyright (c) 2007 Bruce M. Simpson. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include -#include - -#include "bcm_machdep.h" -#include "bcm_mipsvar.h" - -#include "bhnd_nexusvar.h" - -/* - * Supports siba(4) attachment to a MIPS nexus bus. - * - * Derived from Bruce M. Simpson' original siba(4) driver. - */ - -_Static_assert(SIBA_MAX_INTR == BCM_MIPS_NINTR, "SIBA incompatible with " - "generic NINTR"); - -static int -siba_nexus_probe(device_t dev) -{ - int error; - - if (bcm_get_platform()->cid.chip_type != BHND_CHIPTYPE_SIBA) - return (ENXIO); - - if ((error = siba_probe(dev)) > 0) - return (error); - - /* Set device description */ - bhnd_set_default_bus_desc(dev, &bcm_get_platform()->cid); - - return (BUS_PROBE_SPECIFIC); -} - -static int -siba_nexus_attach(device_t dev) -{ - int error; - - /* Perform initial attach and enumerate our children. */ - if ((error = siba_attach(dev))) - return (error); - - /* Delegate remainder to standard bhnd method implementation */ - if ((error = bhnd_generic_attach(dev))) - goto failed; - - return (0); - -failed: - siba_detach(dev); - return (error); -} - -static device_method_t siba_nexus_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, siba_nexus_probe), - DEVMETHOD(device_attach, siba_nexus_attach), - - DEVMETHOD_END -}; - -DEFINE_CLASS_2(bhnd, siba_nexus_driver, siba_nexus_methods, - sizeof(struct siba_softc), bhnd_nexus_driver, siba_driver); - -EARLY_DRIVER_MODULE(siba_nexus, nexus, siba_nexus_driver, bhnd_devclass, 0, 0, - BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); diff --git a/sys/mips/broadcom/std.broadcom b/sys/mips/broadcom/std.broadcom deleted file mode 100644 index 2888bef0134..00000000000 --- a/sys/mips/broadcom/std.broadcom +++ /dev/null @@ -1,8 +0,0 @@ -# - -machine mips mipsel - -makeoptions INTRNG -options INTRNG - -files "../broadcom/files.broadcom" diff --git a/sys/mips/broadcom/uart_bus_chipc.c b/sys/mips/broadcom/uart_bus_chipc.c deleted file mode 100644 index e5633f92896..00000000000 --- a/sys/mips/broadcom/uart_bus_chipc.c +++ /dev/null @@ -1,78 +0,0 @@ -/*- - * Copyright (c) 2016 Michael Zhilin - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_uart.h" - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include "uart_if.h" -#include "bhnd_chipc_if.h" - -#include "bcm_machdep.h" - -static int -uart_chipc_probe(device_t dev) -{ - struct uart_softc *sc; - u_int rclk; - - sc = device_get_softc(dev); - sc->sc_class = &uart_ns8250_class; - - rclk = bcm_get_uart_rclk(bcm_get_platform()); - return (uart_bus_probe(dev, 0, 0, rclk, 0, 0, 0)); -} - -static device_method_t uart_chipc_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, uart_chipc_probe), - DEVMETHOD(device_attach, uart_bus_attach), - DEVMETHOD(device_detach, uart_bus_detach), - { 0, 0 } -}; - -static driver_t uart_chipc_driver = { - uart_driver_name, - uart_chipc_methods, - sizeof(struct uart_softc), -}; - -DRIVER_MODULE(uart, bhnd_chipc, uart_chipc_driver, uart_devclass, 0, 0); diff --git a/sys/mips/broadcom/uart_cpu_chipc.c b/sys/mips/broadcom/uart_cpu_chipc.c deleted file mode 100644 index 0e4aa1dd85b..00000000000 --- a/sys/mips/broadcom/uart_cpu_chipc.c +++ /dev/null @@ -1,169 +0,0 @@ -/*- - * Copyright (c) 2016 Michael Zhilin - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_uart.h" - -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include -#include -#include - -#ifdef CFE -#include -#include -#include -#endif - -#include "bcm_machdep.h" - -bus_space_tag_t uart_bus_space_io; -bus_space_tag_t uart_bus_space_mem; - -static struct uart_class *chipc_uart_class = &uart_ns8250_class; - -#define CHIPC_UART_BAUDRATE 115200 - -int -uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2) -{ - return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0); -} - -static int -uart_cpu_init(struct uart_devinfo *di, u_int uart, int baudrate) -{ - if (uart >= CHIPC_UART_MAX) - return (EINVAL); - - di->ops = uart_getops(chipc_uart_class); - di->bas.chan = 0; - di->bas.bst = uart_bus_space_mem; - di->bas.bsh = (bus_space_handle_t) BCM_CORE_ADDR(bcm_get_platform(), - cc_addr, CHIPC_UART(uart)); - di->bas.regshft = 0; - di->bas.rclk = bcm_get_uart_rclk(bcm_get_platform()); - di->baudrate = baudrate; - di->databits = 8; - di->stopbits = 1; - di->parity = UART_PARITY_NONE; - - return (0); -} - -#ifdef CFE -static int -uart_getenv_cfe(int devtype, struct uart_devinfo *di) -{ - char device[sizeof("uartXX")]; - int baud, fd, len; - int ret; - u_int uart; - - /* CFE only vends console configuration */ - if (devtype != UART_DEV_CONSOLE) - return (ENODEV); - - /* Fetch console device */ - ret = cfe_getenv("BOOT_CONSOLE", device, sizeof(device)); - if (ret != CFE_OK) - return (ENXIO); - - /* Parse serial console unit. Fails on non-uart devices. */ - if (sscanf(device, "uart%u", &uart) != 1) - return (ENXIO); - - /* Fetch device handle */ - fd = bcm_get_platform()->cfe_console; - if (fd < 0) - return (ENXIO); - - /* Fetch serial configuration */ - ret = cfe_ioctl(fd, IOCTL_SERIAL_GETSPEED, (unsigned char *)&baud, - sizeof(baud), &len, 0); - if (ret != CFE_OK) - baud = CHIPC_UART_BAUDRATE; - - /* Initialize device info */ - return (uart_cpu_init(di, uart, baud)); -} -#endif /* CFE */ - -int -uart_cpu_getdev(int devtype, struct uart_devinfo *di) -{ - int ivar; - - uart_bus_space_io = NULL; - uart_bus_space_mem = mips_bus_space_generic; - -#ifdef CFE - /* Check the CFE environment */ - if (uart_getenv_cfe(devtype, di) == 0) - return (0); -#endif /* CFE */ - - /* Check the kernel environment. */ - if (uart_getenv(devtype, di, chipc_uart_class) == 0) - return (0); - - /* Scan the device hints for the first matching device */ - for (u_int i = 0; i < CHIPC_UART_MAX; i++) { - if (resource_int_value("uart", i, "flags", &ivar)) - continue; - - /* Check usability */ - if (devtype == UART_DEV_CONSOLE && !UART_FLAGS_CONSOLE(ivar)) - continue; - - if (devtype == UART_DEV_DBGPORT && !UART_FLAGS_DBGPORT(ivar)) - continue; - - if (resource_int_value("uart", i, "disabled", &ivar) == 0 && - ivar == 0) - continue; - - /* Found */ - if (resource_int_value("uart", i, "baud", &ivar) != 0) - ivar = CHIPC_UART_BAUDRATE; - - return (uart_cpu_init(di, i, ivar)); - } - - /* Default to uart0/115200 */ - return (uart_cpu_init(di, 0, CHIPC_UART_BAUDRATE)); -} diff --git a/sys/mips/cavium/asm_octeon.S b/sys/mips/cavium/asm_octeon.S deleted file mode 100644 index f13015498a7..00000000000 --- a/sys/mips/cavium/asm_octeon.S +++ /dev/null @@ -1,64 +0,0 @@ -/*- - * Copyright (c) 2004-2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include - - .set noreorder - -#ifdef SMP -/* - * This function must be implemented in assembly because it is called early - * in AP boot without a valid stack. - */ -LEAF(platform_processor_id) - .set push - .set mips32r2 - jr ra - rdhwr v0, $0 - .set pop -END(platform_processor_id) - -/* - * Called on APs to wait until they are told to launch. - */ -LEAF(octeon_ap_wait) - jal platform_processor_id - nop - -1: ll t0, octeon_ap_boot - bne v0, t0, 1b - nop - - move t0, zero - sc t0, octeon_ap_boot - - beqz t0, 1b - nop - - j mpentry - nop -END(octeon_ap_wait) -#endif diff --git a/sys/mips/cavium/ciu.c b/sys/mips/cavium/ciu.c deleted file mode 100644 index 98a3ef052f8..00000000000 --- a/sys/mips/cavium/ciu.c +++ /dev/null @@ -1,484 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -/* - * This bus sits between devices/buses and nexus and handles CIU interrupts - * and passes everything else through. It should really be a nexus subclass - * or something, but for now this will be sufficient. - */ - -#define CIU_IRQ_HARD (0) - -#define CIU_IRQ_EN0_BEGIN OCTEON_IRQ_WORKQ0 -#define CIU_IRQ_EN0_END OCTEON_IRQ_BOOTDMA -#define CIU_IRQ_EN0_COUNT ((CIU_IRQ_EN0_END - CIU_IRQ_EN0_BEGIN) + 1) - -#define CIU_IRQ_EN1_BEGIN OCTEON_IRQ_WDOG0 -#define CIU_IRQ_EN1_END OCTEON_IRQ_DFM -#define CIU_IRQ_EN1_COUNT ((CIU_IRQ_EN1_END - CIU_IRQ_EN1_BEGIN) + 1) - -struct ciu_softc { - struct rman irq_rman; - struct resource *ciu_irq; -}; - -static mips_intrcnt_t ciu_en0_intrcnt[CIU_IRQ_EN0_COUNT]; -static mips_intrcnt_t ciu_en1_intrcnt[CIU_IRQ_EN1_COUNT]; - -static struct intr_event *ciu_en0_intr_events[CIU_IRQ_EN0_COUNT]; -static struct intr_event *ciu_en1_intr_events[CIU_IRQ_EN1_COUNT]; - -static int ciu_probe(device_t); -static int ciu_attach(device_t); -static struct resource *ciu_alloc_resource(device_t, device_t, int, int *, - rman_res_t, rman_res_t, rman_res_t, - u_int); -static int ciu_setup_intr(device_t, device_t, struct resource *, - int, driver_filter_t *, driver_intr_t *, - void *, void **); -static int ciu_teardown_intr(device_t, device_t, - struct resource *, void *); -static int ciu_bind_intr(device_t, device_t, struct resource *, - int); -static int ciu_describe_intr(device_t, device_t, - struct resource *, void *, - const char *); -static void ciu_hinted_child(device_t, const char *, int); - -static void ciu_en0_intr_mask(void *); -static void ciu_en0_intr_unmask(void *); -#ifdef SMP -static int ciu_en0_intr_bind(void *, int); -#endif - -static void ciu_en1_intr_mask(void *); -static void ciu_en1_intr_unmask(void *); -#ifdef SMP -static int ciu_en1_intr_bind(void *, int); -#endif - -static int ciu_intr(void *); - -static int -ciu_probe(device_t dev) -{ - if (device_get_unit(dev) != 0) - return (ENXIO); - - device_set_desc(dev, "Cavium Octeon Central Interrupt Unit"); - return (BUS_PROBE_NOWILDCARD); -} - -static int -ciu_attach(device_t dev) -{ - char name[MAXCOMLEN + 1]; - struct ciu_softc *sc; - unsigned i; - int error; - int rid; - - sc = device_get_softc(dev); - - rid = 0; - sc->ciu_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, CIU_IRQ_HARD, - CIU_IRQ_HARD, 1, RF_ACTIVE); - if (sc->ciu_irq == NULL) { - device_printf(dev, "could not allocate irq%d\n", CIU_IRQ_HARD); - return (ENXIO); - } - - error = bus_setup_intr(dev, sc->ciu_irq, INTR_TYPE_MISC, ciu_intr, - NULL, sc, NULL); - if (error != 0) { - device_printf(dev, "bus_setup_intr failed: %d\n", error); - return (error); - } - - sc->irq_rman.rm_type = RMAN_ARRAY; - sc->irq_rman.rm_descr = "CIU IRQ"; - - error = rman_init(&sc->irq_rman); - if (error != 0) - return (error); - - /* - * We have two contiguous IRQ regions, use a single rman. - */ - error = rman_manage_region(&sc->irq_rman, CIU_IRQ_EN0_BEGIN, - CIU_IRQ_EN1_END); - if (error != 0) - return (error); - - for (i = 0; i < CIU_IRQ_EN0_COUNT; i++) { - snprintf(name, sizeof name, "int%d:", i + CIU_IRQ_EN0_BEGIN); - ciu_en0_intrcnt[i] = mips_intrcnt_create(name); - } - - for (i = 0; i < CIU_IRQ_EN1_COUNT; i++) { - snprintf(name, sizeof name, "int%d:", i + CIU_IRQ_EN1_BEGIN); - ciu_en1_intrcnt[i] = mips_intrcnt_create(name); - } - - bus_generic_probe(dev); - bus_generic_attach(dev); - - return (0); -} - -static struct resource * -ciu_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct resource *res; - struct ciu_softc *sc; - - sc = device_get_softc(bus); - - switch (type) { - case SYS_RES_IRQ: - break; - default: - return (bus_alloc_resource(device_get_parent(bus), type, rid, - start, end, count, flags)); - } - - /* - * One interrupt at a time for now. - */ - if (start != end) - return (NULL); - - res = rman_reserve_resource(&sc->irq_rman, start, end, count, flags, - child); - if (res != NULL) - return (res); - - return (NULL); -} - -static int -ciu_setup_intr(device_t bus, device_t child, struct resource *res, int flags, - driver_filter_t *filter, driver_intr_t *intr, void *arg, - void **cookiep) -{ - struct intr_event *event, **eventp; - void (*mask_func)(void *); - void (*unmask_func)(void *); - int (*bind_func)(void *, int); - mips_intrcnt_t intrcnt; - int error; - int irq; - - irq = rman_get_start(res); - if (irq <= CIU_IRQ_EN0_END) { - eventp = &ciu_en0_intr_events[irq - CIU_IRQ_EN0_BEGIN]; - intrcnt = ciu_en0_intrcnt[irq - CIU_IRQ_EN0_BEGIN]; - mask_func = ciu_en0_intr_mask; - unmask_func = ciu_en0_intr_unmask; -#ifdef SMP - bind_func = ciu_en0_intr_bind; -#endif - } else { - eventp = &ciu_en1_intr_events[irq - CIU_IRQ_EN1_BEGIN]; - intrcnt = ciu_en1_intrcnt[irq - CIU_IRQ_EN1_BEGIN]; - mask_func = ciu_en1_intr_mask; - unmask_func = ciu_en1_intr_unmask; -#ifdef SMP - bind_func = ciu_en1_intr_bind; -#endif - } -#if !defined(SMP) - bind_func = NULL; -#endif - - if ((event = *eventp) == NULL) { - error = intr_event_create(eventp, (void *)(uintptr_t)irq, 0, - irq, mask_func, unmask_func, NULL, bind_func, "int%d", irq); - if (error != 0) - return (error); - - event = *eventp; - - unmask_func((void *)(uintptr_t)irq); - } - - intr_event_add_handler(event, device_get_nameunit(child), - filter, intr, arg, intr_priority(flags), flags, cookiep); - - mips_intrcnt_setname(intrcnt, event->ie_fullname); - - return (0); -} - -static int -ciu_teardown_intr(device_t bus, device_t child, struct resource *res, - void *cookie) -{ - int error; - - error = intr_event_remove_handler(cookie); - if (error != 0) - return (error); - - return (0); -} - -#ifdef SMP -static int -ciu_bind_intr(device_t bus, device_t child, struct resource *res, int cpu) -{ - struct intr_event *event; - int irq; - - irq = rman_get_start(res); - if (irq <= CIU_IRQ_EN0_END) - event = ciu_en0_intr_events[irq - CIU_IRQ_EN0_BEGIN]; - else - event = ciu_en1_intr_events[irq - CIU_IRQ_EN1_BEGIN]; - - return (intr_event_bind(event, cpu)); -} -#endif - -static int -ciu_describe_intr(device_t bus, device_t child, struct resource *res, - void *cookie, const char *descr) -{ - struct intr_event *event; - mips_intrcnt_t intrcnt; - int error; - int irq; - - irq = rman_get_start(res); - if (irq <= CIU_IRQ_EN0_END) { - event = ciu_en0_intr_events[irq - CIU_IRQ_EN0_BEGIN]; - intrcnt = ciu_en0_intrcnt[irq - CIU_IRQ_EN0_BEGIN]; - } else { - event = ciu_en1_intr_events[irq - CIU_IRQ_EN1_BEGIN]; - intrcnt = ciu_en1_intrcnt[irq - CIU_IRQ_EN1_BEGIN]; - } - - error = intr_event_describe_handler(event, cookie, descr); - if (error != 0) - return (error); - - mips_intrcnt_setname(intrcnt, event->ie_fullname); - - return (0); -} - -static void -ciu_hinted_child(device_t bus, const char *dname, int dunit) -{ - BUS_ADD_CHILD(bus, 0, dname, dunit); -} - -static void -ciu_en0_intr_mask(void *arg) -{ - uint64_t mask; - int irq; - - irq = (uintptr_t)arg; - mask = cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2)); - mask &= ~(1ull << (irq - CIU_IRQ_EN0_BEGIN)); - cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2), mask); -} - -static void -ciu_en0_intr_unmask(void *arg) -{ - uint64_t mask; - int irq; - - irq = (uintptr_t)arg; - mask = cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2)); - mask |= 1ull << (irq - CIU_IRQ_EN0_BEGIN); - cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2), mask); -} - -#ifdef SMP -static int -ciu_en0_intr_bind(void *arg, int target) -{ - uint64_t mask; - int core; - int irq; - - irq = (uintptr_t)arg; - CPU_FOREACH(core) { - mask = cvmx_read_csr(CVMX_CIU_INTX_EN0(core*2)); - if (core == target) - mask |= 1ull << (irq - CIU_IRQ_EN0_BEGIN); - else - mask &= ~(1ull << (irq - CIU_IRQ_EN0_BEGIN)); - cvmx_write_csr(CVMX_CIU_INTX_EN0(core*2), mask); - } - - return (0); -} -#endif - -static void -ciu_en1_intr_mask(void *arg) -{ - uint64_t mask; - int irq; - - irq = (uintptr_t)arg; - mask = cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2)); - mask &= ~(1ull << (irq - CIU_IRQ_EN1_BEGIN)); - cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2), mask); -} - -static void -ciu_en1_intr_unmask(void *arg) -{ - uint64_t mask; - int irq; - - irq = (uintptr_t)arg; - mask = cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2)); - mask |= 1ull << (irq - CIU_IRQ_EN1_BEGIN); - cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2), mask); -} - -#ifdef SMP -static int -ciu_en1_intr_bind(void *arg, int target) -{ - uint64_t mask; - int core; - int irq; - - irq = (uintptr_t)arg; - CPU_FOREACH(core) { - mask = cvmx_read_csr(CVMX_CIU_INTX_EN1(core*2)); - if (core == target) - mask |= 1ull << (irq - CIU_IRQ_EN1_BEGIN); - else - mask &= ~(1ull << (irq - CIU_IRQ_EN1_BEGIN)); - cvmx_write_csr(CVMX_CIU_INTX_EN1(core*2), mask); - } - - return (0); -} -#endif - -static int -ciu_intr(void *arg) -{ - struct ciu_softc *sc; - uint64_t en0_sum, en1_sum; - uint64_t en0_mask, en1_mask; - int irq_index; - int error; - - sc = arg; - (void)sc; - - en0_sum = cvmx_read_csr(CVMX_CIU_INTX_SUM0(cvmx_get_core_num()*2)); - en1_sum = cvmx_read_csr(CVMX_CIU_INT_SUM1); - - en0_mask = cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2)); - en1_mask = cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2)); - - en0_sum &= en0_mask; - en1_sum &= en1_mask; - - if (en0_sum == 0 && en1_sum == 0) - return (FILTER_STRAY); - - for (irq_index = 0; en0_sum != 0; irq_index++, en0_sum >>= 1) { - if ((en0_sum & 1) == 0) - continue; - - mips_intrcnt_inc(ciu_en0_intrcnt[irq_index]); - - error = intr_event_handle(ciu_en0_intr_events[irq_index], NULL); - if (error != 0) - printf("%s: stray en0 irq%d\n", __func__, irq_index); - } - - for (irq_index = 0; en1_sum != 0; irq_index++, en1_sum >>= 1) { - if ((en1_sum & 1) == 0) - continue; - - mips_intrcnt_inc(ciu_en1_intrcnt[irq_index]); - - error = intr_event_handle(ciu_en1_intr_events[irq_index], NULL); - if (error != 0) - printf("%s: stray en1 irq%d\n", __func__, irq_index); - } - - return (FILTER_HANDLED); -} - -static device_method_t ciu_methods[] = { - DEVMETHOD(device_probe, ciu_probe), - DEVMETHOD(device_attach, ciu_attach), - - DEVMETHOD(bus_alloc_resource, ciu_alloc_resource), - DEVMETHOD(bus_activate_resource,bus_generic_activate_resource), - DEVMETHOD(bus_setup_intr, ciu_setup_intr), - DEVMETHOD(bus_teardown_intr, ciu_teardown_intr), -#ifdef SMP - DEVMETHOD(bus_bind_intr, ciu_bind_intr), -#endif - DEVMETHOD(bus_describe_intr, ciu_describe_intr), - - DEVMETHOD(bus_add_child, bus_generic_add_child), - DEVMETHOD(bus_hinted_child, ciu_hinted_child), - { 0, 0 } -}; - -static driver_t ciu_driver = { - "ciu", - ciu_methods, - sizeof(struct ciu_softc), -}; -static devclass_t ciu_devclass; -DRIVER_MODULE(ciu, nexus, ciu_driver, ciu_devclass, 0, 0); diff --git a/sys/mips/cavium/cryptocteon/cavium_crypto.c b/sys/mips/cavium/cryptocteon/cavium_crypto.c deleted file mode 100644 index d8397d63b28..00000000000 --- a/sys/mips/cavium/cryptocteon/cavium_crypto.c +++ /dev/null @@ -1,943 +0,0 @@ -/* - * vim:sw=4 ts=8 - */ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 2009 David McCullough - * - * Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Cavium Networks - * 4. Cavium Networks' name may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * This Software, including technical data, may be subject to U.S. export - * control laws, including the U.S. Export Administration Act and its - * associated regulations, and may be subject to export or import regulations - * in other countries. You warrant that You will comply strictly in all - * respects with all such regulations and acknowledge that you have the - * responsibility to obtain licenses to export, re-export or import the - * Software. - * - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" AND - * WITH ALL FAULTS AND CAVIUM MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, - * EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE - * SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR - * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM - * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, - * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF - * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR - * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR - * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. -*/ -/****************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include - -/****************************************************************************/ - -#define IOV_INIT(iov, ptr, idx, len) \ - do { \ - (idx) = 0; \ - (ptr) = (iov)[(idx)].iov_base; \ - (len) = (iov)[(idx)].iov_len; \ - } while (0) - -/* - * XXX - * It would be better if this were an IOV_READ/IOV_WRITE macro instead so - * that we could detect overflow before it happens rather than right after, - * which is especially bad since there is usually no IOV_CONSUME after the - * final read or write. - */ -#define IOV_CONSUME(iov, ptr, idx, len) \ - do { \ - if ((len) > sizeof *(ptr)) { \ - (len) -= sizeof *(ptr); \ - (ptr)++; \ - } else { \ - if ((len) != sizeof *(ptr)) \ - panic("%s: went past end of iovec.", __func__); \ - (idx)++; \ - (ptr) = (iov)[(idx)].iov_base; \ - (len) = (iov)[(idx)].iov_len; \ - } \ - } while (0) - -#define ESP_HEADER_LENGTH 8 -#define AES_CBC_IV_LENGTH 16 -#define ESP_HMAC_LEN 12 - -#define ESP_HEADER_LENGTH 8 - -/****************************************************************************/ - -#define CVM_LOAD_SHA_UNIT(dat, next) { \ - if (next == 0) { \ - next = 1; \ - CVMX_MT_HSH_DAT (dat, 0); \ - } else if (next == 1) { \ - next = 2; \ - CVMX_MT_HSH_DAT (dat, 1); \ - } else if (next == 2) { \ - next = 3; \ - CVMX_MT_HSH_DAT (dat, 2); \ - } else if (next == 3) { \ - next = 4; \ - CVMX_MT_HSH_DAT (dat, 3); \ - } else if (next == 4) { \ - next = 5; \ - CVMX_MT_HSH_DAT (dat, 4); \ - } else if (next == 5) { \ - next = 6; \ - CVMX_MT_HSH_DAT (dat, 5); \ - } else if (next == 6) { \ - next = 7; \ - CVMX_MT_HSH_DAT (dat, 6); \ - } else { \ - CVMX_MT_HSH_STARTSHA (dat); \ - next = 0; \ - } \ -} - -#define CVM_LOAD2_SHA_UNIT(dat1, dat2, next) { \ - if (next == 0) { \ - CVMX_MT_HSH_DAT (dat1, 0); \ - CVMX_MT_HSH_DAT (dat2, 1); \ - next = 2; \ - } else if (next == 1) { \ - CVMX_MT_HSH_DAT (dat1, 1); \ - CVMX_MT_HSH_DAT (dat2, 2); \ - next = 3; \ - } else if (next == 2) { \ - CVMX_MT_HSH_DAT (dat1, 2); \ - CVMX_MT_HSH_DAT (dat2, 3); \ - next = 4; \ - } else if (next == 3) { \ - CVMX_MT_HSH_DAT (dat1, 3); \ - CVMX_MT_HSH_DAT (dat2, 4); \ - next = 5; \ - } else if (next == 4) { \ - CVMX_MT_HSH_DAT (dat1, 4); \ - CVMX_MT_HSH_DAT (dat2, 5); \ - next = 6; \ - } else if (next == 5) { \ - CVMX_MT_HSH_DAT (dat1, 5); \ - CVMX_MT_HSH_DAT (dat2, 6); \ - next = 7; \ - } else if (next == 6) { \ - CVMX_MT_HSH_DAT (dat1, 6); \ - CVMX_MT_HSH_STARTSHA (dat2); \ - next = 0; \ - } else { \ - CVMX_MT_HSH_STARTSHA (dat1); \ - CVMX_MT_HSH_DAT (dat2, 0); \ - next = 1; \ - } \ -} - -/****************************************************************************/ - -#define CVM_LOAD_MD5_UNIT(dat, next) { \ - if (next == 0) { \ - next = 1; \ - CVMX_MT_HSH_DAT (dat, 0); \ - } else if (next == 1) { \ - next = 2; \ - CVMX_MT_HSH_DAT (dat, 1); \ - } else if (next == 2) { \ - next = 3; \ - CVMX_MT_HSH_DAT (dat, 2); \ - } else if (next == 3) { \ - next = 4; \ - CVMX_MT_HSH_DAT (dat, 3); \ - } else if (next == 4) { \ - next = 5; \ - CVMX_MT_HSH_DAT (dat, 4); \ - } else if (next == 5) { \ - next = 6; \ - CVMX_MT_HSH_DAT (dat, 5); \ - } else if (next == 6) { \ - next = 7; \ - CVMX_MT_HSH_DAT (dat, 6); \ - } else { \ - CVMX_MT_HSH_STARTMD5 (dat); \ - next = 0; \ - } \ -} - -#define CVM_LOAD2_MD5_UNIT(dat1, dat2, next) { \ - if (next == 0) { \ - CVMX_MT_HSH_DAT (dat1, 0); \ - CVMX_MT_HSH_DAT (dat2, 1); \ - next = 2; \ - } else if (next == 1) { \ - CVMX_MT_HSH_DAT (dat1, 1); \ - CVMX_MT_HSH_DAT (dat2, 2); \ - next = 3; \ - } else if (next == 2) { \ - CVMX_MT_HSH_DAT (dat1, 2); \ - CVMX_MT_HSH_DAT (dat2, 3); \ - next = 4; \ - } else if (next == 3) { \ - CVMX_MT_HSH_DAT (dat1, 3); \ - CVMX_MT_HSH_DAT (dat2, 4); \ - next = 5; \ - } else if (next == 4) { \ - CVMX_MT_HSH_DAT (dat1, 4); \ - CVMX_MT_HSH_DAT (dat2, 5); \ - next = 6; \ - } else if (next == 5) { \ - CVMX_MT_HSH_DAT (dat1, 5); \ - CVMX_MT_HSH_DAT (dat2, 6); \ - next = 7; \ - } else if (next == 6) { \ - CVMX_MT_HSH_DAT (dat1, 6); \ - CVMX_MT_HSH_STARTMD5 (dat2); \ - next = 0; \ - } else { \ - CVMX_MT_HSH_STARTMD5 (dat1); \ - CVMX_MT_HSH_DAT (dat2, 0); \ - next = 1; \ - } \ -} - -/****************************************************************************/ - -void -octo_calc_hash(uint8_t auth, unsigned char *key, uint64_t *inner, uint64_t *outer) -{ - uint8_t hash_key[64]; - uint64_t *key1; - register uint64_t xor1 = 0x3636363636363636ULL; - register uint64_t xor2 = 0x5c5c5c5c5c5c5c5cULL; - - dprintf("%s()\n", __func__); - - memset(hash_key, 0, sizeof(hash_key)); - memcpy(hash_key, (uint8_t *) key, (auth ? 20 : 16)); - key1 = (uint64_t *) hash_key; - if (auth) { - CVMX_MT_HSH_IV(0x67452301EFCDAB89ULL, 0); - CVMX_MT_HSH_IV(0x98BADCFE10325476ULL, 1); - CVMX_MT_HSH_IV(0xC3D2E1F000000000ULL, 2); - } else { - CVMX_MT_HSH_IV(0x0123456789ABCDEFULL, 0); - CVMX_MT_HSH_IV(0xFEDCBA9876543210ULL, 1); - } - - CVMX_MT_HSH_DAT((*key1 ^ xor1), 0); - key1++; - CVMX_MT_HSH_DAT((*key1 ^ xor1), 1); - key1++; - CVMX_MT_HSH_DAT((*key1 ^ xor1), 2); - key1++; - CVMX_MT_HSH_DAT((*key1 ^ xor1), 3); - key1++; - CVMX_MT_HSH_DAT((*key1 ^ xor1), 4); - key1++; - CVMX_MT_HSH_DAT((*key1 ^ xor1), 5); - key1++; - CVMX_MT_HSH_DAT((*key1 ^ xor1), 6); - key1++; - if (auth) - CVMX_MT_HSH_STARTSHA((*key1 ^ xor1)); - else - CVMX_MT_HSH_STARTMD5((*key1 ^ xor1)); - - CVMX_MF_HSH_IV(inner[0], 0); - CVMX_MF_HSH_IV(inner[1], 1); - if (auth) { - inner[2] = 0; - CVMX_MF_HSH_IV(((uint64_t *) inner)[2], 2); - } - - memset(hash_key, 0, sizeof(hash_key)); - memcpy(hash_key, (uint8_t *) key, (auth ? 20 : 16)); - key1 = (uint64_t *) hash_key; - if (auth) { - CVMX_MT_HSH_IV(0x67452301EFCDAB89ULL, 0); - CVMX_MT_HSH_IV(0x98BADCFE10325476ULL, 1); - CVMX_MT_HSH_IV(0xC3D2E1F000000000ULL, 2); - } else { - CVMX_MT_HSH_IV(0x0123456789ABCDEFULL, 0); - CVMX_MT_HSH_IV(0xFEDCBA9876543210ULL, 1); - } - - CVMX_MT_HSH_DAT((*key1 ^ xor2), 0); - key1++; - CVMX_MT_HSH_DAT((*key1 ^ xor2), 1); - key1++; - CVMX_MT_HSH_DAT((*key1 ^ xor2), 2); - key1++; - CVMX_MT_HSH_DAT((*key1 ^ xor2), 3); - key1++; - CVMX_MT_HSH_DAT((*key1 ^ xor2), 4); - key1++; - CVMX_MT_HSH_DAT((*key1 ^ xor2), 5); - key1++; - CVMX_MT_HSH_DAT((*key1 ^ xor2), 6); - key1++; - if (auth) - CVMX_MT_HSH_STARTSHA((*key1 ^ xor2)); - else - CVMX_MT_HSH_STARTMD5((*key1 ^ xor2)); - - CVMX_MF_HSH_IV(outer[0], 0); - CVMX_MF_HSH_IV(outer[1], 1); - if (auth) { - outer[2] = 0; - CVMX_MF_HSH_IV(outer[2], 2); - } - return; -} - -/****************************************************************************/ -/* AES functions */ - -int -octo_aes_cbc_encrypt( - struct octo_sess *od, - struct iovec *iov, size_t iovcnt, size_t iovlen, - int auth_off, int auth_len, - int crypt_off, int crypt_len, - uint8_t *icv, uint8_t *ivp) -{ - uint64_t *data, *pdata; - int data_i, data_l; - - dprintf("%s()\n", __func__); - - if (__predict_false(od == NULL || iov==NULL || iovlen==0 || ivp==NULL || - (crypt_off & 0x7) || (crypt_off + crypt_len > iovlen))) { - dprintf("%s: Bad parameters od=%p iov=%p iovlen=%jd " - "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " - "icv=%p ivp=%p\n", __func__, od, iov, iovlen, - auth_off, auth_len, crypt_off, crypt_len, icv, ivp); - return -EINVAL; - } - - IOV_INIT(iov, data, data_i, data_l); - - CVMX_PREFETCH0(ivp); - CVMX_PREFETCH0(od->octo_enckey); - - /* load AES Key */ - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0); - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1); - - if (od->octo_encklen == 16) { - CVMX_MT_AES_KEY(0x0, 2); - CVMX_MT_AES_KEY(0x0, 3); - } else if (od->octo_encklen == 24) { - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); - CVMX_MT_AES_KEY(0x0, 3); - } else if (od->octo_encklen == 32) { - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3); - } else { - dprintf("%s: Bad key length %d\n", __func__, od->octo_encklen); - return -EINVAL; - } - CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1); - - CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0); - CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1); - - while (crypt_off > 0) { - IOV_CONSUME(iov, data, data_i, data_l); - crypt_off -= 8; - } - - while (crypt_len > 0) { - pdata = data; - CVMX_MT_AES_ENC_CBC0(*data); - IOV_CONSUME(iov, data, data_i, data_l); - CVMX_MT_AES_ENC_CBC1(*data); - CVMX_MF_AES_RESULT(*pdata, 0); - CVMX_MF_AES_RESULT(*data, 1); - IOV_CONSUME(iov, data, data_i, data_l); - crypt_len -= 16; - } - - return 0; -} - -int -octo_aes_cbc_decrypt( - struct octo_sess *od, - struct iovec *iov, size_t iovcnt, size_t iovlen, - int auth_off, int auth_len, - int crypt_off, int crypt_len, - uint8_t *icv, uint8_t *ivp) -{ - uint64_t *data, *pdata; - int data_i, data_l; - - dprintf("%s()\n", __func__); - - if (__predict_false(od == NULL || iov==NULL || iovlen==0 || ivp==NULL || - (crypt_off & 0x7) || (crypt_off + crypt_len > iovlen))) { - dprintf("%s: Bad parameters od=%p iov=%p iovlen=%jd " - "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " - "icv=%p ivp=%p\n", __func__, od, iov, iovlen, - auth_off, auth_len, crypt_off, crypt_len, icv, ivp); - return -EINVAL; - } - - IOV_INIT(iov, data, data_i, data_l); - - CVMX_PREFETCH0(ivp); - CVMX_PREFETCH0(od->octo_enckey); - - /* load AES Key */ - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0); - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1); - - if (od->octo_encklen == 16) { - CVMX_MT_AES_KEY(0x0, 2); - CVMX_MT_AES_KEY(0x0, 3); - } else if (od->octo_encklen == 24) { - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); - CVMX_MT_AES_KEY(0x0, 3); - } else if (od->octo_encklen == 32) { - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3); - } else { - dprintf("%s: Bad key length %d\n", __func__, od->octo_encklen); - return -EINVAL; - } - CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1); - - CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0); - CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1); - - while (crypt_off > 0) { - IOV_CONSUME(iov, data, data_i, data_l); - crypt_off -= 8; - } - - while (crypt_len > 0) { - pdata = data; - CVMX_MT_AES_DEC_CBC0(*data); - IOV_CONSUME(iov, data, data_i, data_l); - CVMX_MT_AES_DEC_CBC1(*data); - CVMX_MF_AES_RESULT(*pdata, 0); - CVMX_MF_AES_RESULT(*data, 1); - IOV_CONSUME(iov, data, data_i, data_l); - crypt_len -= 16; - } - - return 0; -} - -/****************************************************************************/ -/* SHA1 */ - -int -octo_null_sha1_encrypt( - struct octo_sess *od, - struct iovec *iov, size_t iovcnt, size_t iovlen, - int auth_off, int auth_len, - int crypt_off, int crypt_len, - uint8_t *icv, uint8_t *ivp) -{ - int next = 0; - uint64_t *data; - uint64_t tmp1, tmp2, tmp3; - int data_i, data_l, alen = auth_len; - - dprintf("%s()\n", __func__); - - if (__predict_false(od == NULL || iov==NULL || iovlen==0 || - (auth_off & 0x7) || (auth_off + auth_len > iovlen))) { - dprintf("%s: Bad parameters od=%p iov=%p iovlen=%jd " - "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " - "icv=%p ivp=%p\n", __func__, od, iov, iovlen, - auth_off, auth_len, crypt_off, crypt_len, icv, ivp); - return -EINVAL; - } - - IOV_INIT(iov, data, data_i, data_l); - - /* Load SHA1 IV */ - CVMX_MT_HSH_IV(od->octo_hminner[0], 0); - CVMX_MT_HSH_IV(od->octo_hminner[1], 1); - CVMX_MT_HSH_IV(od->octo_hminner[2], 2); - - while (auth_off > 0) { - IOV_CONSUME(iov, data, data_i, data_l); - auth_off -= 8; - } - - while (auth_len > 0) { - CVM_LOAD_SHA_UNIT(*data, next); - auth_len -= 8; - IOV_CONSUME(iov, data, data_i, data_l); - } - - /* finish the hash */ - CVMX_PREFETCH0(od->octo_hmouter); -#if 0 - if (__predict_false(inplen)) { - uint64_t tmp = 0; - uint8_t *p = (uint8_t *) & tmp; - p[inplen] = 0x80; - do { - inplen--; - p[inplen] = ((uint8_t *) data)[inplen]; - } while (inplen); - CVM_LOAD_MD5_UNIT(tmp, next); - } else { - CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); - } -#else - CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next); -#endif - - /* Finish Inner hash */ - while (next != 7) { - CVM_LOAD_SHA_UNIT(((uint64_t) 0x0ULL), next); - } - CVM_LOAD_SHA_UNIT((uint64_t) ((alen + 64) << 3), next); - - /* Get the inner hash of HMAC */ - CVMX_MF_HSH_IV(tmp1, 0); - CVMX_MF_HSH_IV(tmp2, 1); - tmp3 = 0; - CVMX_MF_HSH_IV(tmp3, 2); - - /* Initialize hash unit */ - CVMX_MT_HSH_IV(od->octo_hmouter[0], 0); - CVMX_MT_HSH_IV(od->octo_hmouter[1], 1); - CVMX_MT_HSH_IV(od->octo_hmouter[2], 2); - - CVMX_MT_HSH_DAT(tmp1, 0); - CVMX_MT_HSH_DAT(tmp2, 1); - tmp3 |= 0x0000000080000000; - CVMX_MT_HSH_DAT(tmp3, 2); - CVMX_MT_HSH_DATZ(3); - CVMX_MT_HSH_DATZ(4); - CVMX_MT_HSH_DATZ(5); - CVMX_MT_HSH_DATZ(6); - CVMX_MT_HSH_STARTSHA((uint64_t) ((64 + 20) << 3)); - - /* save the HMAC */ - data = (uint64_t *)icv; - CVMX_MF_HSH_IV(*data, 0); - data++; - CVMX_MF_HSH_IV(tmp1, 1); - *(uint32_t *)data = (uint32_t) (tmp1 >> 32); - - return 0; -} - -/****************************************************************************/ -/* AES SHA1 */ - -int -octo_aes_cbc_sha1_encrypt( - struct octo_sess *od, - struct iovec *iov, size_t iovcnt, size_t iovlen, - int auth_off, int auth_len, - int crypt_off, int crypt_len, - uint8_t *icv, uint8_t *ivp) -{ - int next = 0; - union { - uint32_t data32[2]; - uint64_t data64[1]; - } mydata[2]; - uint64_t *pdata = &mydata[0].data64[0]; - uint64_t *data = &mydata[1].data64[0]; - uint32_t *data32; - uint64_t tmp1, tmp2, tmp3; - int data_i, data_l, alen = auth_len; - - dprintf("%s()\n", __func__); - - if (__predict_false(od == NULL || iov==NULL || iovlen==0 || ivp==NULL || - (crypt_off & 0x3) || (crypt_off + crypt_len > iovlen) || - (crypt_len & 0x7) || - (auth_len & 0x7) || - (auth_off & 0x3) || (auth_off + auth_len > iovlen))) { - dprintf("%s: Bad parameters od=%p iov=%p iovlen=%jd " - "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " - "icv=%p ivp=%p\n", __func__, od, iov, iovlen, - auth_off, auth_len, crypt_off, crypt_len, icv, ivp); - return -EINVAL; - } - - IOV_INIT(iov, data32, data_i, data_l); - - CVMX_PREFETCH0(ivp); - CVMX_PREFETCH0(od->octo_enckey); - - /* load AES Key */ - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0); - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1); - - if (od->octo_encklen == 16) { - CVMX_MT_AES_KEY(0x0, 2); - CVMX_MT_AES_KEY(0x0, 3); - } else if (od->octo_encklen == 24) { - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); - CVMX_MT_AES_KEY(0x0, 3); - } else if (od->octo_encklen == 32) { - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3); - } else { - dprintf("%s: Bad key length %d\n", __func__, od->octo_encklen); - return -EINVAL; - } - CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1); - - CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0); - CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1); - - /* Load SHA IV */ - CVMX_MT_HSH_IV(od->octo_hminner[0], 0); - CVMX_MT_HSH_IV(od->octo_hminner[1], 1); - CVMX_MT_HSH_IV(od->octo_hminner[2], 2); - - while (crypt_off > 0 && auth_off > 0) { - IOV_CONSUME(iov, data32, data_i, data_l); - crypt_off -= 4; - auth_off -= 4; - } - - while (crypt_len > 0 || auth_len > 0) { - uint32_t *pdata32[3]; - - pdata32[0] = data32; - mydata[0].data32[0] = *data32; - IOV_CONSUME(iov, data32, data_i, data_l); - pdata32[1] = data32; - mydata[0].data32[1] = *data32; - IOV_CONSUME(iov, data32, data_i, data_l); - pdata32[2] = data32; - mydata[1].data32[0] = *data32; - IOV_CONSUME(iov, data32, data_i, data_l); - mydata[1].data32[1] = *data32; - - if (crypt_off <= 0) { - if (crypt_len > 0) { - CVMX_MT_AES_ENC_CBC0(*pdata); - CVMX_MT_AES_ENC_CBC1(*data); - CVMX_MF_AES_RESULT(*pdata, 0); - CVMX_MF_AES_RESULT(*data, 1); - crypt_len -= 16; - } - } else - crypt_off -= 16; - - if (auth_off <= 0) { - if (auth_len > 0) { - CVM_LOAD_SHA_UNIT(*pdata, next); - CVM_LOAD_SHA_UNIT(*data, next); - auth_len -= 16; - } - } else - auth_off -= 16; - - *pdata32[0] = mydata[0].data32[0]; - *pdata32[1] = mydata[0].data32[1]; - *pdata32[2] = mydata[1].data32[0]; - *data32 = mydata[1].data32[1]; - - IOV_CONSUME(iov, data32, data_i, data_l); - } - - /* finish the hash */ - CVMX_PREFETCH0(od->octo_hmouter); -#if 0 - if (__predict_false(inplen)) { - uint64_t tmp = 0; - uint8_t *p = (uint8_t *) & tmp; - p[inplen] = 0x80; - do { - inplen--; - p[inplen] = ((uint8_t *) data)[inplen]; - } while (inplen); - CVM_LOAD_SHA_UNIT(tmp, next); - } else { - CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next); - } -#else - CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next); -#endif - - /* Finish Inner hash */ - while (next != 7) { - CVM_LOAD_SHA_UNIT(((uint64_t) 0x0ULL), next); - } - CVM_LOAD_SHA_UNIT((uint64_t) ((alen + 64) << 3), next); - - /* Get the inner hash of HMAC */ - CVMX_MF_HSH_IV(tmp1, 0); - CVMX_MF_HSH_IV(tmp2, 1); - tmp3 = 0; - CVMX_MF_HSH_IV(tmp3, 2); - - /* Initialize hash unit */ - CVMX_MT_HSH_IV(od->octo_hmouter[0], 0); - CVMX_MT_HSH_IV(od->octo_hmouter[1], 1); - CVMX_MT_HSH_IV(od->octo_hmouter[2], 2); - - CVMX_MT_HSH_DAT(tmp1, 0); - CVMX_MT_HSH_DAT(tmp2, 1); - tmp3 |= 0x0000000080000000; - CVMX_MT_HSH_DAT(tmp3, 2); - CVMX_MT_HSH_DATZ(3); - CVMX_MT_HSH_DATZ(4); - CVMX_MT_HSH_DATZ(5); - CVMX_MT_HSH_DATZ(6); - CVMX_MT_HSH_STARTSHA((uint64_t) ((64 + 20) << 3)); - - /* finish the hash */ - CVMX_PREFETCH0(od->octo_hmouter); -#if 0 - if (__predict_false(inplen)) { - uint64_t tmp = 0; - uint8_t *p = (uint8_t *) & tmp; - p[inplen] = 0x80; - do { - inplen--; - p[inplen] = ((uint8_t *) data)[inplen]; - } while (inplen); - CVM_LOAD_MD5_UNIT(tmp, next); - } else { - CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); - } -#else - CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -#endif - - /* save the HMAC */ - data32 = (uint32_t *)icv; - CVMX_MF_HSH_IV(tmp1, 0); - *data32 = (uint32_t) (tmp1 >> 32); - data32++; - *data32 = (uint32_t) tmp1; - data32++; - CVMX_MF_HSH_IV(tmp1, 1); - *data32 = (uint32_t) (tmp1 >> 32); - - return 0; -} - -int -octo_aes_cbc_sha1_decrypt( - struct octo_sess *od, - struct iovec *iov, size_t iovcnt, size_t iovlen, - int auth_off, int auth_len, - int crypt_off, int crypt_len, - uint8_t *icv, uint8_t *ivp) -{ - int next = 0; - union { - uint32_t data32[2]; - uint64_t data64[1]; - } mydata[2]; - uint64_t *pdata = &mydata[0].data64[0]; - uint64_t *data = &mydata[1].data64[0]; - uint32_t *data32; - uint64_t tmp1, tmp2, tmp3; - int data_i, data_l, alen = auth_len; - - dprintf("%s()\n", __func__); - - if (__predict_false(od == NULL || iov==NULL || iovlen==0 || ivp==NULL || - (crypt_off & 0x3) || (crypt_off + crypt_len > iovlen) || - (crypt_len & 0x7) || - (auth_len & 0x7) || - (auth_off & 0x3) || (auth_off + auth_len > iovlen))) { - dprintf("%s: Bad parameters od=%p iov=%p iovlen=%jd " - "auth_off=%d auth_len=%d crypt_off=%d crypt_len=%d " - "icv=%p ivp=%p\n", __func__, od, iov, iovlen, - auth_off, auth_len, crypt_off, crypt_len, icv, ivp); - return -EINVAL; - } - - IOV_INIT(iov, data32, data_i, data_l); - - CVMX_PREFETCH0(ivp); - CVMX_PREFETCH0(od->octo_enckey); - - /* load AES Key */ - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[0], 0); - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[1], 1); - - if (od->octo_encklen == 16) { - CVMX_MT_AES_KEY(0x0, 2); - CVMX_MT_AES_KEY(0x0, 3); - } else if (od->octo_encklen == 24) { - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); - CVMX_MT_AES_KEY(0x0, 3); - } else if (od->octo_encklen == 32) { - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[2], 2); - CVMX_MT_AES_KEY(((uint64_t *) od->octo_enckey)[3], 3); - } else { - dprintf("%s: Bad key length %d\n", __func__, od->octo_encklen); - return -EINVAL; - } - CVMX_MT_AES_KEYLENGTH(od->octo_encklen / 8 - 1); - - CVMX_MT_AES_IV(((uint64_t *) ivp)[0], 0); - CVMX_MT_AES_IV(((uint64_t *) ivp)[1], 1); - - /* Load MD5 IV */ - CVMX_MT_HSH_IV(od->octo_hminner[0], 0); - CVMX_MT_HSH_IV(od->octo_hminner[1], 1); - CVMX_MT_HSH_IV(od->octo_hminner[2], 2); - - while (crypt_off > 0 && auth_off > 0) { - IOV_CONSUME(iov, data32, data_i, data_l); - crypt_off -= 4; - auth_off -= 4; - } - - while (crypt_len > 0 || auth_len > 0) { - uint32_t *pdata32[3]; - - pdata32[0] = data32; - mydata[0].data32[0] = *data32; - IOV_CONSUME(iov, data32, data_i, data_l); - pdata32[1] = data32; - mydata[0].data32[1] = *data32; - IOV_CONSUME(iov, data32, data_i, data_l); - pdata32[2] = data32; - mydata[1].data32[0] = *data32; - IOV_CONSUME(iov, data32, data_i, data_l); - mydata[1].data32[1] = *data32; - - if (auth_off <= 0) { - if (auth_len > 0) { - CVM_LOAD_SHA_UNIT(*pdata, next); - CVM_LOAD_SHA_UNIT(*data, next); - auth_len -= 16; - } - } else - auth_off -= 16; - - if (crypt_off <= 0) { - if (crypt_len > 0) { - CVMX_MT_AES_DEC_CBC0(*pdata); - CVMX_MT_AES_DEC_CBC1(*data); - CVMX_MF_AES_RESULT(*pdata, 0); - CVMX_MF_AES_RESULT(*data, 1); - crypt_len -= 16; - } - } else - crypt_off -= 16; - - *pdata32[0] = mydata[0].data32[0]; - *pdata32[1] = mydata[0].data32[1]; - *pdata32[2] = mydata[1].data32[0]; - *data32 = mydata[1].data32[1]; - - IOV_CONSUME(iov, data32, data_i, data_l); - } - - /* finish the hash */ - CVMX_PREFETCH0(od->octo_hmouter); -#if 0 - if (__predict_false(inplen)) { - uint64_t tmp = 0; - uint8_t *p = (uint8_t *) & tmp; - p[inplen] = 0x80; - do { - inplen--; - p[inplen] = ((uint8_t *) data)[inplen]; - } while (inplen); - CVM_LOAD_SHA_UNIT(tmp, next); - } else { - CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next); - } -#else - CVM_LOAD_SHA_UNIT(0x8000000000000000ULL, next); -#endif - - /* Finish Inner hash */ - while (next != 7) { - CVM_LOAD_SHA_UNIT(((uint64_t) 0x0ULL), next); - } - CVM_LOAD_SHA_UNIT((uint64_t) ((alen + 64) << 3), next); - - /* Get the inner hash of HMAC */ - CVMX_MF_HSH_IV(tmp1, 0); - CVMX_MF_HSH_IV(tmp2, 1); - tmp3 = 0; - CVMX_MF_HSH_IV(tmp3, 2); - - /* Initialize hash unit */ - CVMX_MT_HSH_IV(od->octo_hmouter[0], 0); - CVMX_MT_HSH_IV(od->octo_hmouter[1], 1); - CVMX_MT_HSH_IV(od->octo_hmouter[2], 2); - - CVMX_MT_HSH_DAT(tmp1, 0); - CVMX_MT_HSH_DAT(tmp2, 1); - tmp3 |= 0x0000000080000000; - CVMX_MT_HSH_DAT(tmp3, 2); - CVMX_MT_HSH_DATZ(3); - CVMX_MT_HSH_DATZ(4); - CVMX_MT_HSH_DATZ(5); - CVMX_MT_HSH_DATZ(6); - CVMX_MT_HSH_STARTSHA((uint64_t) ((64 + 20) << 3)); - - /* finish the hash */ - CVMX_PREFETCH0(od->octo_hmouter); -#if 0 - if (__predict_false(inplen)) { - uint64_t tmp = 0; - uint8_t *p = (uint8_t *) & tmp; - p[inplen] = 0x80; - do { - inplen--; - p[inplen] = ((uint8_t *) data)[inplen]; - } while (inplen); - CVM_LOAD_MD5_UNIT(tmp, next); - } else { - CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); - } -#else - CVM_LOAD_MD5_UNIT(0x8000000000000000ULL, next); -#endif - - /* save the HMAC */ - data32 = (uint32_t *)icv; - CVMX_MF_HSH_IV(tmp1, 0); - *data32 = (uint32_t) (tmp1 >> 32); - data32++; - *data32 = (uint32_t) tmp1; - data32++; - CVMX_MF_HSH_IV(tmp1, 1); - *data32 = (uint32_t) (tmp1 >> 32); - - return 0; -} - -/****************************************************************************/ diff --git a/sys/mips/cavium/cryptocteon/cryptocteon.c b/sys/mips/cavium/cryptocteon/cryptocteon.c deleted file mode 100644 index fe0bd29b8ed..00000000000 --- a/sys/mips/cavium/cryptocteon/cryptocteon.c +++ /dev/null @@ -1,422 +0,0 @@ -/* - * Octeon Crypto for OCF - * - * Written by David McCullough - * Copyright (C) 2009 David McCullough - * - * LICENSE TERMS - * - * The free distribution and use of this software in both source and binary - * form is allowed (with or without changes) provided that: - * - * 1. distributions of this source code include the above copyright - * notice, this list of conditions and the following disclaimer; - * - * 2. distributions in binary form include the above copyright - * notice, this list of conditions and the following disclaimer - * in the documentation and/or other associated materials; - * - * 3. the copyright holder's name is not used to endorse products - * built using this software without specific written permission. - * - * DISCLAIMER - * - * This software is provided 'as is' with no explicit or implied warranties - * in respect of its properties, including, but not limited to, correctness - * and/or fitness for purpose. - * --------------------------------------------------------------------------- - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include - -#include "cryptodev_if.h" - -struct cryptocteon_softc { - int32_t sc_cid; /* opencrypto id */ -}; - -int cryptocteon_debug = 0; -TUNABLE_INT("hw.cryptocteon.debug", &cryptocteon_debug); - -static void cryptocteon_identify(driver_t *, device_t); -static int cryptocteon_probe(device_t); -static int cryptocteon_attach(device_t); - -static int cryptocteon_process(device_t, struct cryptop *, int); -static int cryptocteon_probesession(device_t, - const struct crypto_session_params *); -static int cryptocteon_newsession(device_t, crypto_session_t, - const struct crypto_session_params *); - -static void -cryptocteon_identify(driver_t *drv, device_t parent) -{ - if (octeon_has_feature(OCTEON_FEATURE_CRYPTO)) - BUS_ADD_CHILD(parent, 0, "cryptocteon", 0); -} - -static int -cryptocteon_probe(device_t dev) -{ - device_set_desc(dev, "Octeon Secure Coprocessor"); - return (0); -} - -static int -cryptocteon_attach(device_t dev) -{ - struct cryptocteon_softc *sc; - - sc = device_get_softc(dev); - - sc->sc_cid = crypto_get_driverid(dev, sizeof(struct octo_sess), - CRYPTOCAP_F_SOFTWARE | CRYPTOCAP_F_SYNC | - CRYPTOCAP_F_ACCEL_SOFTWARE); - if (sc->sc_cid < 0) { - device_printf(dev, "crypto_get_driverid ret %d\n", sc->sc_cid); - return (ENXIO); - } - - return (0); -} - -static bool -cryptocteon_auth_supported(const struct crypto_session_params *csp) -{ - u_int hash_len; - - switch (csp->csp_auth_alg) { - case CRYPTO_SHA1_HMAC: - hash_len = SHA1_HASH_LEN; - break; - default: - return (false); - } - - if (csp->csp_auth_klen > hash_len) - return (false); - return (true); -} - -static bool -cryptocteon_cipher_supported(const struct crypto_session_params *csp) -{ - - switch (csp->csp_cipher_alg) { - case CRYPTO_AES_CBC: - if (csp->csp_ivlen != 16) - return (false); - if (csp->csp_cipher_klen != 16 && - csp->csp_cipher_klen != 24 && - csp->csp_cipher_klen != 32) - return (false); - break; - default: - return (false); - } - - return (true); -} - -static int -cryptocteon_probesession(device_t dev, const struct crypto_session_params *csp) -{ - - if (csp->csp_flags != 0) - return (EINVAL); - switch (csp->csp_mode) { - case CSP_MODE_DIGEST: - if (!cryptocteon_auth_supported(csp)) - return (EINVAL); - break; - case CSP_MODE_CIPHER: - if (!cryptocteon_cipher_supported(csp)) - return (EINVAL); - break; - case CSP_MODE_ETA: - if (!cryptocteon_auth_supported(csp) || - !cryptocteon_cipher_supported(csp)) - return (EINVAL); - break; - default: - return (EINVAL); - } - return (CRYPTODEV_PROBE_ACCEL_SOFTWARE); -} - -static void -cryptocteon_calc_hash(const struct crypto_session_params *csp, const char *key, - struct octo_sess *ocd) -{ - char hash_key[SHA1_HASH_LEN]; - - memset(hash_key, 0, sizeof(hash_key)); - memcpy(hash_key, key, csp->csp_auth_klen); - octo_calc_hash(csp->csp_auth_alg == CRYPTO_SHA1_HMAC, hash_key, - ocd->octo_hminner, ocd->octo_hmouter); -} - -/* Generate a new octo session. */ -static int -cryptocteon_newsession(device_t dev, crypto_session_t cses, - const struct crypto_session_params *csp) -{ - struct cryptocteon_softc *sc; - struct octo_sess *ocd; - - sc = device_get_softc(dev); - - ocd = crypto_get_driver_session(cses); - - ocd->octo_encklen = csp->csp_cipher_klen; - if (csp->csp_cipher_key != NULL) - memcpy(ocd->octo_enckey, csp->csp_cipher_key, - ocd->octo_encklen); - - if (csp->csp_auth_key != NULL) - cryptocteon_calc_hash(csp, csp->csp_auth_key, ocd); - - ocd->octo_mlen = csp->csp_auth_mlen; - if (csp->csp_auth_mlen == 0) { - switch (csp->csp_auth_alg) { - case CRYPTO_SHA1_HMAC: - ocd->octo_mlen = SHA1_HASH_LEN; - break; - } - } - - switch (csp->csp_mode) { - case CSP_MODE_DIGEST: - switch (csp->csp_auth_alg) { - case CRYPTO_SHA1_HMAC: - ocd->octo_encrypt = octo_null_sha1_encrypt; - ocd->octo_decrypt = octo_null_sha1_encrypt; - break; - } - break; - case CSP_MODE_CIPHER: - switch (csp->csp_cipher_alg) { - case CRYPTO_AES_CBC: - ocd->octo_encrypt = octo_aes_cbc_encrypt; - ocd->octo_decrypt = octo_aes_cbc_decrypt; - break; - } - break; - case CSP_MODE_ETA: - switch (csp->csp_cipher_alg) { - case CRYPTO_AES_CBC: - switch (csp->csp_auth_alg) { - case CRYPTO_SHA1_HMAC: - ocd->octo_encrypt = octo_aes_cbc_sha1_encrypt; - ocd->octo_decrypt = octo_aes_cbc_sha1_decrypt; - break; - } - break; - } - break; - } - - KASSERT(ocd->octo_encrypt != NULL && ocd->octo_decrypt != NULL, - ("%s: missing function pointers", __func__)); - - return (0); -} - -/* - * Process a request. - */ -static int -cryptocteon_process(device_t dev, struct cryptop *crp, int hint) -{ - const struct crypto_session_params *csp; - struct octo_sess *od; - size_t iovcnt, iovlen; - struct mbuf *m = NULL; - struct uio *uiop = NULL; - unsigned char *ivp = NULL; - unsigned char iv_data[16]; - unsigned char icv[SHA1_HASH_LEN], icv2[SHA1_HASH_LEN]; - int auth_off, auth_len, crypt_off, crypt_len; - struct cryptocteon_softc *sc; - - sc = device_get_softc(dev); - - crp->crp_etype = 0; - - od = crypto_get_driver_session(crp->crp_session); - csp = crypto_get_params(crp->crp_session); - - /* - * The crypto routines assume that the regions to auth and - * cipher are exactly 8 byte multiples and aligned on 8 - * byte logical boundaries within the iovecs. - */ - if (crp->crp_aad_length % 8 != 0 || crp->crp_payload_length % 8 != 0) { - crp->crp_etype = EFBIG; - goto done; - } - - /* - * As currently written, the crypto routines assume the AAD and - * payload are adjacent. - */ - if (crp->crp_aad_length != 0 && crp->crp_payload_start != - crp->crp_aad_start + crp->crp_aad_length) { - crp->crp_etype = EFBIG; - goto done; - } - - crypt_off = crp->crp_payload_start; - crypt_len = crp->crp_payload_length; - if (crp->crp_aad_length != 0) { - auth_off = crp->crp_aad_start; - auth_len = crp->crp_aad_length + crp->crp_payload_length; - } else { - auth_off = crypt_off; - auth_len = crypt_len; - } - - /* - * do some error checking outside of the loop for m and IOV processing - * this leaves us with valid m or uiop pointers for later - */ - switch (crp->crp_buf.cb_type) { - case CRYPTO_BUF_MBUF: - { - unsigned frags; - - m = crp->crp_buf.cb_mbuf; - for (frags = 0; m != NULL; frags++) - m = m->m_next; - - if (frags >= UIO_MAXIOV) { - printf("%s,%d: %d frags > UIO_MAXIOV", __FILE__, __LINE__, frags); - crp->crp_etype = EFBIG; - goto done; - } - - m = crp->crp_buf.cb_mbuf; - break; - } - case CRYPTO_BUF_UIO: - uiop = crp->crp_buf.cb_uio; - if (uiop->uio_iovcnt > UIO_MAXIOV) { - printf("%s,%d: %d uio_iovcnt > UIO_MAXIOV", __FILE__, __LINE__, - uiop->uio_iovcnt); - crp->crp_etype = EFBIG; - goto done; - } - break; - default: - break; - } - - if (csp->csp_cipher_alg != 0) { - if (crp->crp_flags & CRYPTO_F_IV_SEPARATE) - ivp = crp->crp_iv; - else { - crypto_copydata(crp, crp->crp_iv_start, csp->csp_ivlen, - iv_data); - ivp = iv_data; - } - } - - /* - * setup the I/O vector to cover the buffer - */ - switch (crp->crp_buf.cb_type) { - case CRYPTO_BUF_MBUF: - iovcnt = 0; - iovlen = 0; - - while (m != NULL) { - od->octo_iov[iovcnt].iov_base = mtod(m, void *); - od->octo_iov[iovcnt].iov_len = m->m_len; - - m = m->m_next; - iovlen += od->octo_iov[iovcnt++].iov_len; - } - break; - case CRYPTO_BUF_UIO: - iovlen = 0; - for (iovcnt = 0; iovcnt < uiop->uio_iovcnt; iovcnt++) { - od->octo_iov[iovcnt].iov_base = uiop->uio_iov[iovcnt].iov_base; - od->octo_iov[iovcnt].iov_len = uiop->uio_iov[iovcnt].iov_len; - - iovlen += od->octo_iov[iovcnt].iov_len; - } - break; - case CRYPTO_BUF_CONTIG: - iovlen = crp->crp_buf.cb_buf_len; - od->octo_iov[0].iov_base = crp->crp_buf.cb_buf; - od->octo_iov[0].iov_len = crp->crp_buf.cb_buf_len; - iovcnt = 1; - break; - default: - panic("can't happen"); - } - - /* - * setup a new explicit key - */ - if (crp->crp_cipher_key != NULL) - memcpy(od->octo_enckey, crp->crp_cipher_key, od->octo_encklen); - if (crp->crp_auth_key != NULL) - cryptocteon_calc_hash(csp, crp->crp_auth_key, od); - - if (CRYPTO_OP_IS_ENCRYPT(crp->crp_op)) - (*od->octo_encrypt)(od, od->octo_iov, iovcnt, iovlen, - auth_off, auth_len, crypt_off, crypt_len, icv, ivp); - else - (*od->octo_decrypt)(od, od->octo_iov, iovcnt, iovlen, - auth_off, auth_len, crypt_off, crypt_len, icv, ivp); - - if (csp->csp_auth_alg != 0) { - if (crp->crp_op & CRYPTO_OP_VERIFY_DIGEST) { - crypto_copydata(crp, crp->crp_digest_start, - od->octo_mlen, icv2); - if (timingsafe_bcmp(icv, icv2, od->octo_mlen) != 0) - crp->crp_etype = EBADMSG; - } else - crypto_copyback(crp, crp->crp_digest_start, - od->octo_mlen, icv); - } -done: - crypto_done(crp); - return (0); -} - -static device_method_t cryptocteon_methods[] = { - /* device methods */ - DEVMETHOD(device_identify, cryptocteon_identify), - DEVMETHOD(device_probe, cryptocteon_probe), - DEVMETHOD(device_attach, cryptocteon_attach), - - /* crypto device methods */ - DEVMETHOD(cryptodev_probesession, cryptocteon_probesession), - DEVMETHOD(cryptodev_newsession, cryptocteon_newsession), - DEVMETHOD(cryptodev_process, cryptocteon_process), - { 0, 0 } -}; - -static driver_t cryptocteon_driver = { - "cryptocteon", - cryptocteon_methods, - sizeof (struct cryptocteon_softc), -}; -static devclass_t cryptocteon_devclass; -DRIVER_MODULE(cryptocteon, nexus, cryptocteon_driver, cryptocteon_devclass, 0, 0); diff --git a/sys/mips/cavium/cryptocteon/cryptocteonvar.h b/sys/mips/cavium/cryptocteon/cryptocteonvar.h deleted file mode 100644 index 66169d18cfd..00000000000 --- a/sys/mips/cavium/cryptocteon/cryptocteonvar.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Octeon Crypto for OCF - * - * Written by David McCullough - * Copyright (C) 2009 David McCullough - * - * LICENSE TERMS - * - * The free distribution and use of this software in both source and binary - * form is allowed (with or without changes) provided that: - * - * 1. distributions of this source code include the above copyright - * notice, this list of conditions and the following disclaimer; - * - * 2. distributions in binary form include the above copyright - * notice, this list of conditions and the following disclaimer - * in the documentation and/or other associated materials; - * - * 3. the copyright holder's name is not used to endorse products - * built using this software without specific written permission. - * - * DISCLAIMER - * - * This software is provided 'as is' with no explicit or implied warranties - * in respect of its properties, including, but not limited to, correctness - * and/or fitness for purpose. - * --------------------------------------------------------------------------- - */ - -#ifndef _MIPS_CAVIUM_CRYPTOCTEON_CRYPTOCTEONVAR_H_ -#define _MIPS_CAVIUM_CRYPTOCTEON_CRYPTOCTEONVAR_H_ - -struct octo_sess; - -typedef int octo_encrypt_t(struct octo_sess *od, struct iovec *iov, size_t iovcnt, size_t iovlen, int auth_off, int auth_len, int crypt_off, int crypt_len, uint8_t *icv, uint8_t *ivp); -typedef int octo_decrypt_t(struct octo_sess *od, struct iovec *iov, size_t iovcnt, size_t iovlen, int auth_off, int auth_len, int crypt_off, int crypt_len, uint8_t *icv, uint8_t *ivp); - -struct octo_sess { - #define MAX_CIPHER_KEYLEN 64 - char octo_enckey[MAX_CIPHER_KEYLEN]; - int octo_encklen; - - int octo_mlen; - - octo_encrypt_t *octo_encrypt; - octo_decrypt_t *octo_decrypt; - - uint64_t octo_hminner[3]; - uint64_t octo_hmouter[3]; - - struct iovec octo_iov[UIO_MAXIOV]; -}; - -#define dprintf(fmt, ...) \ - do { \ - if (cryptocteon_debug) \ - printf("%s: " fmt, __func__, ## __VA_ARGS__); \ - } while (0) - -extern int cryptocteon_debug; - -void octo_calc_hash(uint8_t, unsigned char *, uint64_t *, uint64_t *); - -/* XXX Actually just hashing functions, not encryption. */ -octo_encrypt_t octo_null_sha1_encrypt; - -octo_encrypt_t octo_aes_cbc_encrypt; -octo_encrypt_t octo_aes_cbc_sha1_encrypt; - -octo_decrypt_t octo_aes_cbc_decrypt; -octo_decrypt_t octo_aes_cbc_sha1_decrypt; - -#endif /* !_MIPS_CAVIUM_CRYPTOCTEON_CRYPTOCTEONVAR_H_ */ diff --git a/sys/mips/cavium/cvmx_config.h b/sys/mips/cavium/cvmx_config.h deleted file mode 100644 index d6273c3b848..00000000000 --- a/sys/mips/cavium/cvmx_config.h +++ /dev/null @@ -1,198 +0,0 @@ -/***********************license start*************** - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights - * reserved. - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * - * * Neither the name of Cavium Networks nor the names of - * its contributors may be used to endorse or promote products - * derived from this software without specific prior written - * permission. - * - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" - * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES - * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR - * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET - * POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT - * OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - * - * - * For any questions regarding licensing please contact marketing@caviumnetworks.com - * - ***********************license end**************************************/ - -#ifndef _CVMX_CONFIG_H -#define _CVMX_CONFIG_H - -#include "opt_cvmx.h" - -#include -#include -#include -#include - -#include -#include - -#include - -#define asm __asm - -#define CVMX_DONT_INCLUDE_CONFIG - -/* Define to enable the use of simple executive packet output functions. -** For packet I/O setup enable the helper functions below. -*/ -#define CVMX_ENABLE_PKO_FUNCTIONS - -/* Define to enable the use of simple executive helper functions. These -** include many hardware setup functions. See cvmx-helper.[ch] for -** details. -*/ -#define CVMX_ENABLE_HELPER_FUNCTIONS - -/* CVMX_HELPER_FIRST_MBUFF_SKIP is the number of bytes to reserve before -** the beginning of the packet. If necessary, override the default -** here. See the IPD section of the hardware manual for MBUFF SKIP -** details.*/ -#define CVMX_HELPER_FIRST_MBUFF_SKIP 184 - -/* CVMX_HELPER_NOT_FIRST_MBUFF_SKIP is the number of bytes to reserve in each -** chained packet element. If necessary, override the default here */ -#define CVMX_HELPER_NOT_FIRST_MBUFF_SKIP 0 - -/* CVMX_HELPER_ENABLE_BACK_PRESSURE controls whether back pressure is enabled -** for all input ports. This controls if IPD sends backpressure to all ports if -** Octeon's FPA pools don't have enough packet or work queue entries. Even when -** this is off, it is still possible to get backpressure from individual -** hardware ports. When configuring backpressure, also check -** CVMX_HELPER_DISABLE_*_BACKPRESSURE below. If necessary, override the default -** here */ -#define CVMX_HELPER_ENABLE_BACK_PRESSURE 1 - -/* CVMX_HELPER_ENABLE_IPD controls if the IPD is enabled in the helper -** function. Once it is enabled the hardware starts accepting packets. You -** might want to skip the IPD enable if configuration changes are need -** from the default helper setup. If necessary, override the default here */ -#define CVMX_HELPER_ENABLE_IPD 1 - -/* CVMX_HELPER_INPUT_TAG_TYPE selects the type of tag that the IPD assigns -** to incoming packets. */ -#define CVMX_HELPER_INPUT_TAG_TYPE CVMX_POW_TAG_TYPE_ORDERED - -/* The following select which fields are used by the PIP to generate -** the tag on INPUT -** 0: don't include -** 1: include */ -#define CVMX_HELPER_INPUT_TAG_IPV6_SRC_IP 0 -#define CVMX_HELPER_INPUT_TAG_IPV6_DST_IP 0 -#define CVMX_HELPER_INPUT_TAG_IPV6_SRC_PORT 0 -#define CVMX_HELPER_INPUT_TAG_IPV6_DST_PORT 0 -#define CVMX_HELPER_INPUT_TAG_IPV6_NEXT_HEADER 0 -#define CVMX_HELPER_INPUT_TAG_IPV4_SRC_IP 0 -#define CVMX_HELPER_INPUT_TAG_IPV4_DST_IP 0 -#define CVMX_HELPER_INPUT_TAG_IPV4_SRC_PORT 0 -#define CVMX_HELPER_INPUT_TAG_IPV4_DST_PORT 0 -#define CVMX_HELPER_INPUT_TAG_IPV4_PROTOCOL 0 -#define CVMX_HELPER_INPUT_TAG_INPUT_PORT 1 - -/* Select skip mode for input ports */ -#define CVMX_HELPER_INPUT_PORT_SKIP_MODE CVMX_PIP_PORT_CFG_MODE_SKIPL2 - -/* Define the number of queues per output port */ -#define CVMX_HELPER_PKO_QUEUES_PER_PORT_INTERFACE0 1 -#define CVMX_HELPER_PKO_QUEUES_PER_PORT_INTERFACE1 1 - -/* Configure PKO to use per-core queues (PKO lockless operation). -** Please see the related SDK documentation for PKO that illustrates -** how to enable and configure this option. */ -//#define CVMX_ENABLE_PKO_LOCKLESS_OPERATION 1 -//#define CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0 8 -//#define CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1 8 - -/* Force backpressure to be disabled. This overrides all other -** backpressure configuration */ -#define CVMX_HELPER_DISABLE_RGMII_BACKPRESSURE 1 - -/* Disable the SPI4000's processing of backpressure packets and backpressure -** generation. When this is 1, the SPI4000 will not stop sending packets when -** receiving backpressure. It will also not generate backpressure packets when -** its internal FIFOs are full. */ -#define CVMX_HELPER_DISABLE_SPI4000_BACKPRESSURE 1 - -/* CVMX_HELPER_SPI_TIMEOUT is used to determine how long the SPI initialization -** routines wait for SPI training. You can override the value using -** executive-config.h if necessary */ -#define CVMX_HELPER_SPI_TIMEOUT 10 - -/* Select the number of low latency memory ports (interfaces) that -** will be configured. Valid values are 1 and 2. -*/ -#define CVMX_LLM_CONFIG_NUM_PORTS 2 - -/* Enable the fix for PKI-100 errata ("Size field is 8 too large in WQE and next -** pointers"). If CVMX_ENABLE_LEN_M8_FIX is set to 0, the fix for this errata will -** not be enabled. -** 0: Fix is not enabled -** 1: Fix is enabled, if supported by hardware -*/ -#define CVMX_ENABLE_LEN_M8_FIX 1 - -#if defined(CVMX_ENABLE_HELPER_FUNCTIONS) && !defined(CVMX_ENABLE_PKO_FUNCTIONS) -#define CVMX_ENABLE_PKO_FUNCTIONS -#endif - -/* Enable debug and informational printfs */ -#define CVMX_CONFIG_ENABLE_DEBUG_PRINTS 1 - -/************************* Config Specific Defines ************************/ -#define CVMX_LLM_NUM_PORTS 1 -#define CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 1 /**< PKO queues per port for interface 0 (ports 0-15) */ -#define CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 1 /**< PKO queues per port for interface 1 (ports 16-31) */ -#define CVMX_PKO_MAX_PORTS_INTERFACE0 CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0 /**< Limit on the number of PKO ports enabled for interface 0 */ -#define CVMX_PKO_MAX_PORTS_INTERFACE1 CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1 /**< Limit on the number of PKO ports enabled for interface 1 */ -#define CVMX_PKO_QUEUES_PER_PORT_PCI 1 /**< PKO queues per port for PCI (ports 32-35) */ -#define CVMX_PKO_QUEUES_PER_PORT_LOOP 1 /**< PKO queues per port for Loop devices (ports 36-39) */ - -/************************* FPA allocation *********************************/ -/* Pool sizes in bytes, must be multiple of a cache line */ -#define CVMX_FPA_POOL_0_SIZE (15 * CVMX_CACHE_LINE_SIZE) -#define CVMX_FPA_POOL_1_SIZE (1 * CVMX_CACHE_LINE_SIZE) -#define CVMX_FPA_POOL_2_SIZE (8 * CVMX_CACHE_LINE_SIZE) -#define CVMX_FPA_POOL_3_SIZE (0 * CVMX_CACHE_LINE_SIZE) -#define CVMX_FPA_POOL_4_SIZE (0 * CVMX_CACHE_LINE_SIZE) -#define CVMX_FPA_POOL_5_SIZE (0 * CVMX_CACHE_LINE_SIZE) -#define CVMX_FPA_POOL_6_SIZE (0 * CVMX_CACHE_LINE_SIZE) -#define CVMX_FPA_POOL_7_SIZE (0 * CVMX_CACHE_LINE_SIZE) - -/* Pools in use */ -#define CVMX_FPA_PACKET_POOL (0) /**< Packet buffers */ -#define CVMX_FPA_PACKET_POOL_SIZE CVMX_FPA_POOL_0_SIZE -#define CVMX_FPA_WQE_POOL (1) /**< Work queue entrys */ -#define CVMX_FPA_WQE_POOL_SIZE CVMX_FPA_POOL_1_SIZE -#define CVMX_FPA_OUTPUT_BUFFER_POOL (2) /**< PKO queue command buffers */ -#define CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE CVMX_FPA_POOL_2_SIZE - -/************************* FAU allocation ********************************/ -#define CVMX_FAU_REG_END 2048 - -#define CVMX_SCR_SCRATCH 0 - -#endif /* !_CVMX_CONFIG_H */ diff --git a/sys/mips/cavium/files.octeon1 b/sys/mips/cavium/files.octeon1 deleted file mode 100644 index 88aec24e1df..00000000000 --- a/sys/mips/cavium/files.octeon1 +++ /dev/null @@ -1,98 +0,0 @@ -# Octeon Support Files -# -mips/cavium/asm_octeon.S optional smp -mips/cavium/ciu.c standard -mips/cavium/obio.c optional uart -mips/cavium/octeon_ds1337.c standard -mips/cavium/octeon_ebt3000_cf.c optional cf -mips/cavium/octeon_machdep.c standard -mips/cavium/octeon_mp.c optional smp -mips/cavium/octeon_pmc.c optional hwpmc -mips/cavium/octeon_rtc.c standard -mips/cavium/uart_bus_octeonusart.c optional uart -mips/cavium/uart_cpu_octeonusart.c optional uart -mips/cavium/uart_dev_oct16550.c optional uart -mips/mips/intr_machdep.c standard -mips/mips/tick.c standard - -mips/cavium/octeon_rnd.c optional random -mips/cavium/octeon_wdog.c optional octeon_wdog -mips/cavium/octeon_nmi.S optional octeon_wdog - -mips/cavium/cryptocteon/cavium_crypto.c optional cryptocteon -mips/cavium/cryptocteon/cryptocteon.c optional cryptocteon -mips/mips/octeon_cop2_swtch.S standard -mips/mips/octeon_cop2.c standard - -mips/cavium/if_octm.c optional octm -contrib/octeon-sdk/cvmx-mgmt-port.c optional octm - -mips/cavium/octe/ethernet.c optional octe -mips/cavium/octe/ethernet-mv88e61xx.c optional octe octeon_vendor_lanner -mips/cavium/octe/ethernet-common.c optional octe -mips/cavium/octe/ethernet-mdio.c optional octe -mips/cavium/octe/ethernet-mem.c optional octe -mips/cavium/octe/ethernet-rgmii.c optional octe -mips/cavium/octe/ethernet-rx.c optional octe -mips/cavium/octe/ethernet-sgmii.c optional octe -mips/cavium/octe/ethernet-spi.c optional octe -mips/cavium/octe/ethernet-tx.c optional octe -mips/cavium/octe/ethernet-xaui.c optional octe -mips/cavium/octe/mv88e61xxphy.c optional octe mv88e61xxphy -mips/cavium/octe/octe.c optional octe -mips/cavium/octe/octebus.c optional octe - -mips/cavium/octopci.c optional pci -mips/cavium/octopci_bus_space.c optional pci -mips/cavium/octeon_pci_console.c optional pci -contrib/octeon-sdk/octeon-pci-console.c optional pci - -mips/cavium/usb/octusb.c optional usb octusb -mips/cavium/usb/octusb_octeon.c optional usb octusb - -contrib/octeon-sdk/cvmx-usb.c optional octusb - -mips/cavium/octeon_gpio.c optional gpio - -# XXX Some files could be excluded in some configurations. Making them -# optional but on in the default config would seem reasonable. -contrib/octeon-sdk/cvmx-cmd-queue.c standard -contrib/octeon-sdk/cvmx-bootmem.c standard -contrib/octeon-sdk/cvmx-clock.c standard -contrib/octeon-sdk/cvmx-ebt3000.c standard -contrib/octeon-sdk/cvmx-fpa.c standard -contrib/octeon-sdk/cvmx-helper.c standard -contrib/octeon-sdk/cvmx-helper-cfg.c standard -contrib/octeon-sdk/cvmx-helper-board.c standard -contrib/octeon-sdk/cvmx-helper-cfg.c standard -contrib/octeon-sdk/cvmx-helper-errata.c standard -contrib/octeon-sdk/cvmx-helper-fpa.c standard -contrib/octeon-sdk/cvmx-helper-ilk.c standard -contrib/octeon-sdk/cvmx-helper-jtag.c standard -contrib/octeon-sdk/cvmx-helper-loop.c standard -contrib/octeon-sdk/cvmx-helper-npi.c standard -contrib/octeon-sdk/cvmx-helper-rgmii.c standard -contrib/octeon-sdk/cvmx-helper-sgmii.c standard -contrib/octeon-sdk/cvmx-helper-spi.c standard -contrib/octeon-sdk/cvmx-helper-srio.c standard -contrib/octeon-sdk/cvmx-helper-util.c standard -contrib/octeon-sdk/cvmx-helper-xaui.c standard -contrib/octeon-sdk/cvmx-ilk.c standard -contrib/octeon-sdk/cvmx-ipd.c standard -contrib/octeon-sdk/cvmx-l2c.c standard -contrib/octeon-sdk/cvmx-pcie.c standard -contrib/octeon-sdk/cvmx-pko.c standard -contrib/octeon-sdk/cvmx-qlm.c standard -contrib/octeon-sdk/cvmx-qlm-tables.c standard -contrib/octeon-sdk/cvmx-spi.c standard -contrib/octeon-sdk/cvmx-spi4000.c standard -contrib/octeon-sdk/cvmx-srio.c standard -contrib/octeon-sdk/cvmx-sysinfo.c standard -contrib/octeon-sdk/cvmx-thunder.c standard -contrib/octeon-sdk/cvmx-twsi.c standard -contrib/octeon-sdk/cvmx-warn.c standard -contrib/octeon-sdk/octeon-feature.c standard -contrib/octeon-sdk/octeon-model.c standard - -# HWPMC -dev/hwpmc/hwpmc_octeon.c optional hwpmc diff --git a/sys/mips/cavium/if_octm.c b/sys/mips/cavium/if_octm.c deleted file mode 100644 index 4430936f0b8..00000000000 --- a/sys/mips/cavium/if_octm.c +++ /dev/null @@ -1,536 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010-2011 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Cavium Octeon management port Ethernet devices. - */ - -#include "opt_inet.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef INET -#include -#include -#endif - -#include -#include -#include - -struct octm_softc { - struct ifnet *sc_ifp; - device_t sc_dev; - unsigned sc_port; - int sc_flags; - struct ifmedia sc_ifmedia; - struct resource *sc_intr; - void *sc_intr_cookie; -}; - -static void octm_identify(driver_t *, device_t); -static int octm_probe(device_t); -static int octm_attach(device_t); -static int octm_detach(device_t); -static int octm_shutdown(device_t); - -static void octm_init(void *); -static int octm_transmit(struct ifnet *, struct mbuf *); - -static int octm_medchange(struct ifnet *); -static void octm_medstat(struct ifnet *, struct ifmediareq *); - -static int octm_ioctl(struct ifnet *, u_long, caddr_t); - -static void octm_rx_intr(void *); - -static device_method_t octm_methods[] = { - /* Device interface */ - DEVMETHOD(device_identify, octm_identify), - DEVMETHOD(device_probe, octm_probe), - DEVMETHOD(device_attach, octm_attach), - DEVMETHOD(device_detach, octm_detach), - DEVMETHOD(device_shutdown, octm_shutdown), - { 0, 0 } -}; - -static driver_t octm_driver = { - "octm", - octm_methods, - sizeof (struct octm_softc), -}; - -static devclass_t octm_devclass; - -DRIVER_MODULE(octm, ciu, octm_driver, octm_devclass, 0, 0); - -static void -octm_identify(driver_t *drv, device_t parent) -{ - unsigned i; - - if (!octeon_has_feature(OCTEON_FEATURE_MGMT_PORT)) - return; - - for (i = 0; i < CVMX_MGMT_PORT_NUM_PORTS; i++) - BUS_ADD_CHILD(parent, 0, "octm", i); -} - -static int -octm_probe(device_t dev) -{ - cvmx_mgmt_port_result_t result; - - result = cvmx_mgmt_port_initialize(device_get_unit(dev)); - switch (result) { - case CVMX_MGMT_PORT_SUCCESS: - break; - case CVMX_MGMT_PORT_NO_MEMORY: - return (ENOBUFS); - case CVMX_MGMT_PORT_INVALID_PARAM: - return (ENXIO); - case CVMX_MGMT_PORT_INIT_ERROR: - return (EIO); - } - - device_set_desc(dev, "Cavium Octeon Management Ethernet"); - - return (0); -} - -static int -octm_attach(device_t dev) -{ - struct ifnet *ifp; - struct octm_softc *sc; - cvmx_mixx_irhwm_t mixx_irhwm; - cvmx_mixx_intena_t mixx_intena; - uint64_t mac; - int error; - int irq; - int rid; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - sc->sc_port = device_get_unit(dev); - - switch (sc->sc_port) { - case 0: - irq = OCTEON_IRQ_MII; - break; - case 1: - irq = OCTEON_IRQ_MII1; - break; - default: - device_printf(dev, "unsupported management port %u.\n", sc->sc_port); - return (ENXIO); - } - - /* - * Set MAC address for this management port. - */ - mac = 0; - memcpy((u_int8_t *)&mac + 2, cvmx_sysinfo_get()->mac_addr_base, 6); - mac += sc->sc_port; - - cvmx_mgmt_port_set_mac(sc->sc_port, mac); - - /* No watermark for input ring. */ - mixx_irhwm.u64 = 0; - cvmx_write_csr(CVMX_MIXX_IRHWM(sc->sc_port), mixx_irhwm.u64); - - /* Enable input ring interrupts. */ - mixx_intena.u64 = 0; - mixx_intena.s.ithena = 1; - cvmx_write_csr(CVMX_MIXX_INTENA(sc->sc_port), mixx_intena.u64); - - /* Allocate and establish interrupt. */ - rid = 0; - sc->sc_intr = bus_alloc_resource(sc->sc_dev, SYS_RES_IRQ, &rid, - irq, irq, 1, RF_ACTIVE); - if (sc->sc_intr == NULL) { - device_printf(dev, "unable to allocate IRQ.\n"); - return (ENXIO); - } - - error = bus_setup_intr(sc->sc_dev, sc->sc_intr, INTR_TYPE_NET, NULL, - octm_rx_intr, sc, &sc->sc_intr_cookie); - if (error != 0) { - device_printf(dev, "unable to setup interrupt.\n"); - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_intr); - return (ENXIO); - } - - bus_describe_intr(sc->sc_dev, sc->sc_intr, sc->sc_intr_cookie, "rx"); - - /* XXX Possibly should enable TX interrupts. */ - - ifp = if_alloc(IFT_ETHER); - if (ifp == NULL) { - device_printf(dev, "cannot allocate ifnet.\n"); - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_intr); - return (ENOMEM); - } - - if_initname(ifp, device_get_name(dev), device_get_unit(dev)); - ifp->if_mtu = ETHERMTU; - ifp->if_init = octm_init; - ifp->if_softc = sc; - ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST | IFF_ALLMULTI; - ifp->if_ioctl = octm_ioctl; - - sc->sc_ifp = ifp; - sc->sc_flags = ifp->if_flags; - - ifmedia_init(&sc->sc_ifmedia, 0, octm_medchange, octm_medstat); - - ifmedia_add(&sc->sc_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); - ifmedia_set(&sc->sc_ifmedia, IFM_ETHER | IFM_AUTO); - - ether_ifattach(ifp, (const u_int8_t *)&mac + 2); - - ifp->if_transmit = octm_transmit; - - ifp->if_hdrlen = sizeof(struct ether_vlan_header); - ifp->if_capabilities = IFCAP_VLAN_MTU; - ifp->if_capenable = ifp->if_capabilities; - - IFQ_SET_MAXLEN(&ifp->if_snd, CVMX_MGMT_PORT_NUM_TX_BUFFERS); - ifp->if_snd.ifq_drv_maxlen = CVMX_MGMT_PORT_NUM_TX_BUFFERS; - IFQ_SET_READY(&ifp->if_snd); - - return (bus_generic_attach(dev)); -} - -static int -octm_detach(device_t dev) -{ - struct octm_softc *sc; - cvmx_mgmt_port_result_t result; - - sc = device_get_softc(dev); - - result = cvmx_mgmt_port_initialize(sc->sc_port); - switch (result) { - case CVMX_MGMT_PORT_SUCCESS: - break; - case CVMX_MGMT_PORT_NO_MEMORY: - return (ENOBUFS); - case CVMX_MGMT_PORT_INVALID_PARAM: - return (ENXIO); - case CVMX_MGMT_PORT_INIT_ERROR: - return (EIO); - } - - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_intr); - /* XXX Incomplete. */ - - return (0); -} - -static int -octm_shutdown(device_t dev) -{ - return (octm_detach(dev)); -} - -static void -octm_init(void *arg) -{ - struct ifnet *ifp; - struct octm_softc *sc; - cvmx_mgmt_port_netdevice_flags_t flags; - uint64_t mac; - - sc = arg; - ifp = sc->sc_ifp; - - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) { - cvmx_mgmt_port_disable(sc->sc_port); - - ifp->if_drv_flags &= ~IFF_DRV_RUNNING; - } - - /* - * NB: - * MAC must be set before allmulti and promisc below, as - * cvmx_mgmt_port_set_mac will always enable the CAM, and turning on - * promiscuous mode only works with the CAM disabled. - */ - mac = 0; - memcpy((u_int8_t *)&mac + 2, IF_LLADDR(ifp), 6); - cvmx_mgmt_port_set_mac(sc->sc_port, mac); - - /* - * This is done unconditionally, rather than only if sc_flags have - * changed because of set_mac's effect on the CAM noted above. - */ - flags = 0; - if ((ifp->if_flags & IFF_ALLMULTI) != 0) - flags |= CVMX_IFF_ALLMULTI; - if ((ifp->if_flags & IFF_PROMISC) != 0) - flags |= CVMX_IFF_PROMISC; - cvmx_mgmt_port_set_multicast_list(sc->sc_port, flags); - - /* XXX link state? */ - - if ((ifp->if_flags & IFF_UP) != 0) - cvmx_mgmt_port_enable(sc->sc_port); - - ifp->if_drv_flags |= IFF_DRV_RUNNING; - ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; -} - -static int -octm_transmit(struct ifnet *ifp, struct mbuf *m) -{ - struct octm_softc *sc; - cvmx_mgmt_port_result_t result; - - sc = ifp->if_softc; - - if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != - IFF_DRV_RUNNING) { - m_freem(m); - return (0); - } - - result = cvmx_mgmt_port_sendm(sc->sc_port, m); - - if (result == CVMX_MGMT_PORT_SUCCESS) { - ETHER_BPF_MTAP(ifp, m); - - if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); - if_inc_counter(ifp, IFCOUNTER_OBYTES, m->m_pkthdr.len); - } else - if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); - - m_freem(m); - - switch (result) { - case CVMX_MGMT_PORT_SUCCESS: - return (0); - case CVMX_MGMT_PORT_NO_MEMORY: - return (ENOBUFS); - case CVMX_MGMT_PORT_INVALID_PARAM: - return (ENXIO); - case CVMX_MGMT_PORT_INIT_ERROR: - return (EIO); - default: - return (EDOOFUS); - } -} - -static int -octm_medchange(struct ifnet *ifp) -{ - return (ENOTSUP); -} - -static void -octm_medstat(struct ifnet *ifp, struct ifmediareq *ifm) -{ - struct octm_softc *sc; - cvmx_helper_link_info_t link_info; - - sc = ifp->if_softc; - - ifm->ifm_status = IFM_AVALID; - ifm->ifm_active = IFT_ETHER; - - link_info = cvmx_mgmt_port_link_get(sc->sc_port); - if (!link_info.s.link_up) - return; - - ifm->ifm_status |= IFM_ACTIVE; - - switch (link_info.s.speed) { - case 10: - ifm->ifm_active |= IFM_10_T; - break; - case 100: - ifm->ifm_active |= IFM_100_TX; - break; - case 1000: - ifm->ifm_active |= IFM_1000_T; - break; - case 10000: - ifm->ifm_active |= IFM_10G_T; - break; - } - - if (link_info.s.full_duplex) - ifm->ifm_active |= IFM_FDX; - else - ifm->ifm_active |= IFM_HDX; -} - -static int -octm_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) -{ - struct octm_softc *sc; - struct ifreq *ifr; -#ifdef INET - struct ifaddr *ifa; -#endif - int error; - - sc = ifp->if_softc; - ifr = (struct ifreq *)data; -#ifdef INET - ifa = (struct ifaddr *)data; -#endif - - switch (cmd) { - case SIOCSIFADDR: -#ifdef INET - /* - * Avoid reinitialization unless it's necessary. - */ - if (ifa->ifa_addr->sa_family == AF_INET) { - ifp->if_flags |= IFF_UP; - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) - octm_init(sc); - arp_ifinit(ifp, ifa); - - return (0); - } -#endif - error = ether_ioctl(ifp, cmd, data); - if (error != 0) - return (error); - return (0); - - case SIOCSIFFLAGS: - if (ifp->if_flags == sc->sc_flags) - return (0); - if ((ifp->if_flags & IFF_UP) != 0) { - octm_init(sc); - } else { - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) { - cvmx_mgmt_port_disable(sc->sc_port); - - ifp->if_drv_flags &= ~IFF_DRV_RUNNING; - } - } - sc->sc_flags = ifp->if_flags; - return (0); - - case SIOCSIFCAP: - /* - * Just change the capabilities in software, currently none - * require reprogramming hardware, they just toggle whether we - * make use of already-present facilities in software. - */ - ifp->if_capenable = ifr->ifr_reqcap; - return (0); - - case SIOCSIFMTU: - cvmx_mgmt_port_set_max_packet_size(sc->sc_port, ifr->ifr_mtu + ifp->if_hdrlen); - return (0); - - case SIOCSIFMEDIA: - case SIOCGIFMEDIA: - error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, cmd); - if (error != 0) - return (error); - return (0); - - default: - error = ether_ioctl(ifp, cmd, data); - if (error != 0) - return (error); - return (0); - } -} - -static void -octm_rx_intr(void *arg) -{ - struct octm_softc *sc = arg; - cvmx_mixx_isr_t mixx_isr; - int len; - - mixx_isr.u64 = cvmx_read_csr(CVMX_MIXX_ISR(sc->sc_port)); - if (!mixx_isr.s.irthresh) { - device_printf(sc->sc_dev, "stray interrupt.\n"); - return; - } - - for (;;) { - struct mbuf *m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); - if (m == NULL) { - device_printf(sc->sc_dev, "no memory for receive mbuf.\n"); - return; - } - - len = cvmx_mgmt_port_receive(sc->sc_port, MCLBYTES, m->m_data); - if (len > 0) { - m->m_pkthdr.rcvif = sc->sc_ifp; - m->m_pkthdr.len = m->m_len = len; - - if_inc_counter(sc->sc_ifp, IFCOUNTER_IPACKETS, 1); - - (*sc->sc_ifp->if_input)(sc->sc_ifp, m); - - continue; - } - - m_freem(m); - - if (len == 0) - break; - - if_inc_counter(sc->sc_ifp, IFCOUNTER_IERRORS, 1); - } - - /* Acknowledge interrupts. */ - cvmx_write_csr(CVMX_MIXX_ISR(sc->sc_port), mixx_isr.u64); - cvmx_read_csr(CVMX_MIXX_ISR(sc->sc_port)); -} diff --git a/sys/mips/cavium/obio.c b/sys/mips/cavium/obio.c deleted file mode 100644 index 737272f5ac4..00000000000 --- a/sys/mips/cavium/obio.c +++ /dev/null @@ -1,207 +0,0 @@ -/* $NetBSD: obio.c,v 1.11 2003/07/15 00:25:05 lukem Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Jason R. Thorpe for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * On-board device autoconfiguration support for Cavium OCTEON 1 family of - * SoC devices. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include -#include - -extern struct bus_space octeon_uart_tag; - -static void obio_identify(driver_t *, device_t); -static int obio_probe(device_t); -static int obio_attach(device_t); - -static void -obio_identify(driver_t *drv, device_t parent) -{ - BUS_ADD_CHILD(parent, 0, "obio", 0); -} - -static int -obio_probe(device_t dev) -{ - if (device_get_unit(dev) != 0) - return (ENXIO); - return (0); -} - -static int -obio_attach(device_t dev) -{ - struct obio_softc *sc = device_get_softc(dev); - - sc->oba_st = mips_bus_space_generic; - /* - * XXX - * Here and elsewhere using RBR as a base address because it kind of - * is, but that feels pretty sloppy. Should consider adding a define - * that's more semantic, at least. - */ - sc->oba_addr = CVMX_MIO_UARTX_RBR(0); - sc->oba_size = 0x10000; - sc->oba_rman.rm_type = RMAN_ARRAY; - sc->oba_rman.rm_descr = "OBIO I/O"; - if (rman_init(&sc->oba_rman) != 0 || - rman_manage_region(&sc->oba_rman, - sc->oba_addr, sc->oba_addr + sc->oba_size) != 0) - panic("obio_attach: failed to set up I/O rman"); - sc->oba_irq_rman.rm_type = RMAN_ARRAY; - sc->oba_irq_rman.rm_descr = "OBIO IRQ"; - - /* - * This module is intended for UART purposes only and - * manages IRQs for UART0 and UART1. - */ - if (rman_init(&sc->oba_irq_rman) != 0 || - rman_manage_region(&sc->oba_irq_rman, OCTEON_IRQ_UART0, OCTEON_IRQ_UART1) != 0) - panic("obio_attach: failed to set up IRQ rman"); - - device_add_child(dev, "uart", 1); /* Setup Uart-1 first. */ - device_add_child(dev, "uart", 0); /* Uart-0 next. So it is first in console list */ - bus_generic_probe(dev); - bus_generic_attach(dev); - return (0); -} - -static struct resource * -obio_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct resource *rv; - struct rman *rm; - bus_space_tag_t bt = 0; - bus_space_handle_t bh = 0; - struct obio_softc *sc = device_get_softc(bus); - - switch (type) { - case SYS_RES_IRQ: - switch (device_get_unit(child)) { - case 0: - start = end = OCTEON_IRQ_UART0; - break; - case 1: - start = end = OCTEON_IRQ_UART1; - break; - default: - return (NULL); - } - rm = &sc->oba_irq_rman; - break; - case SYS_RES_MEMORY: - return (NULL); - case SYS_RES_IOPORT: - rm = &sc->oba_rman; - bt = &octeon_uart_tag; - bh = CVMX_MIO_UARTX_RBR(device_get_unit(child)); - start = bh; - break; - default: - return (NULL); - } - - rv = rman_reserve_resource(rm, start, end, count, flags, child); - if (rv == NULL) { - return (NULL); - } - if (type == SYS_RES_IRQ) { - return (rv); - } - rman_set_rid(rv, *rid); - rman_set_bustag(rv, bt); - rman_set_bushandle(rv, bh); - - if (0) { - if (bus_activate_resource(child, type, *rid, rv)) { - rman_release_resource(rv); - return (NULL); - } - } - return (rv); - -} - -static int -obio_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - return (0); -} -static device_method_t obio_methods[] = { - /* Device methods */ - DEVMETHOD(device_identify, obio_identify), - DEVMETHOD(device_probe, obio_probe), - DEVMETHOD(device_attach, obio_attach), - - /* Bus methods */ - DEVMETHOD(bus_alloc_resource, obio_alloc_resource), - DEVMETHOD(bus_activate_resource,obio_activate_resource), - DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - - DEVMETHOD(bus_add_child, bus_generic_add_child), - - {0, 0}, -}; - -static driver_t obio_driver = { - "obio", - obio_methods, - sizeof(struct obio_softc), -}; -static devclass_t obio_devclass; - -DRIVER_MODULE(obio, ciu, obio_driver, obio_devclass, 0, 0); diff --git a/sys/mips/cavium/obiovar.h b/sys/mips/cavium/obiovar.h deleted file mode 100644 index fb2085c17b9..00000000000 --- a/sys/mips/cavium/obiovar.h +++ /dev/null @@ -1,55 +0,0 @@ -/* $NetBSD: obiovar.h,v 1.4 2003/06/16 17:40:53 thorpej Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 2002, 2003 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Jason R. Thorpe for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef _OCTEON_OBIOVAR_H_ -#define _OCTEON_OBIOVAR_H_ - -#include - -struct obio_softc { - bus_space_tag_t oba_st; /* bus space tag */ - bus_addr_t oba_addr; /* address of device */ - bus_size_t oba_size; /* size of device */ - struct rman oba_rman; - struct rman oba_irq_rman; - -}; - -#endif /* _OCTEON_OBIOVAR_H_ */ diff --git a/sys/mips/cavium/octe/cavium-ethernet.h b/sys/mips/cavium/octe/cavium-ethernet.h deleted file mode 100644 index 8d5555736f6..00000000000 --- a/sys/mips/cavium/octe/cavium-ethernet.h +++ /dev/null @@ -1,100 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -/** - * @file - * External interface for the Cavium Octeon ethernet driver. - * - * $Id: cavium-ethernet.h 41589 2009-03-19 19:58:58Z cchavva $ - * - */ -#ifndef CAVIUM_ETHERNET_H -#define CAVIUM_ETHERNET_H - -#include -#include -#include - -/** - * This is the definition of the Ethernet driver's private - * driver state stored in ifp->if_softc. - */ -typedef struct { - /* XXX FreeBSD device softcs must start with an ifnet pointer. */ - struct ifnet *ifp; - - int port; /* PKO hardware output port */ - int queue; /* PKO hardware queue for the port */ - int fau; /* Hardware fetch and add to count outstanding tx buffers */ - int imode; /* Type of port. This is one of the enums in cvmx_helper_interface_mode_t */ -#if 0 - struct ifnet_stats stats; /* Device statistics */ -#endif - uint64_t link_info; /* Last negotiated link state */ - void (*poll)(struct ifnet *ifp); /* Called periodically to check link status */ - - /* - * FreeBSD additions. - */ - device_t dev; - device_t miibus; - - int (*open)(struct ifnet *ifp); - int (*stop)(struct ifnet *ifp); - - int (*init)(struct ifnet *ifp); - void (*uninit)(struct ifnet *ifp); - - uint8_t mac[6]; - int phy_id; - const char *phy_device; - int (*mdio_read)(struct ifnet *, int, int); - void (*mdio_write)(struct ifnet *, int, int, int); - - struct ifqueue tx_free_queue[16]; - - int need_link_update; - struct task link_task; - struct ifmedia media; - int if_flags; - - struct mtx tx_mtx; -} cvm_oct_private_t; - -/** - * Free a work queue entry received in a intercept callback. - * - * @param work_queue_entry - * Work queue entry to free - * @return Zero on success, Negative on failure. - */ -int cvm_oct_free_work(void *work_queue_entry); - -#endif diff --git a/sys/mips/cavium/octe/ethernet-common.c b/sys/mips/cavium/octe/ethernet-common.c deleted file mode 100644 index ef9b1f21401..00000000000 --- a/sys/mips/cavium/octe/ethernet-common.c +++ /dev/null @@ -1,338 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "wrapper-cvmx-includes.h" -#include "ethernet-headers.h" - -static uint64_t cvm_oct_mac_addr = 0; -static uint32_t cvm_oct_mac_addr_offset = 0; - -/** - * Set the multicast list. Currently unimplemented. - * - * @param dev Device to work on - */ -void cvm_oct_common_set_multicast_list(struct ifnet *ifp) -{ - cvmx_gmxx_prtx_cfg_t gmx_cfg; - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - int interface = INTERFACE(priv->port); - int index = INDEX(priv->port); - - if ((interface < 2) && (cvmx_helper_interface_get_mode(interface) != CVMX_HELPER_INTERFACE_MODE_SPI)) { - cvmx_gmxx_rxx_adr_ctl_t control; - control.u64 = 0; - control.s.bcst = 1; /* Allow broadcast MAC addresses */ - - if (/*ifp->mc_list || */(ifp->if_flags&IFF_ALLMULTI) || - (ifp->if_flags & IFF_PROMISC)) - control.s.mcst = 2; /* Force accept multicast packets */ - else - control.s.mcst = 1; /* Force reject multicat packets */ - - if (ifp->if_flags & IFF_PROMISC) - control.s.cam_mode = 0; /* Reject matches if promisc. Since CAM is shut off, should accept everything */ - else - control.s.cam_mode = 1; /* Filter packets based on the CAM */ - - gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface)); - cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64 & ~1ull); - - cvmx_write_csr(CVMX_GMXX_RXX_ADR_CTL(index, interface), control.u64); - if (ifp->if_flags&IFF_PROMISC) - cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN(index, interface), 0); - else - cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN(index, interface), 1); - - cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64); - } -} - -/** - * Assign a MAC addres from the pool of available MAC addresses - * Can return as either a 64-bit value and/or 6 octets. - * - * @param macp Filled in with the assigned address if non-NULL - * @param octets Filled in with the assigned address if non-NULL - * @return Zero on success - */ -int cvm_assign_mac_address(uint64_t *macp, uint8_t *octets) -{ - /* Initialize from global MAC address base; fail if not set */ - if (cvm_oct_mac_addr == 0) { - memcpy((uint8_t *)&cvm_oct_mac_addr + 2, - cvmx_sysinfo_get()->mac_addr_base, 6); - - if (cvm_oct_mac_addr == 0) - return ENXIO; - - cvm_oct_mac_addr_offset = cvmx_mgmt_port_num_ports(); - cvm_oct_mac_addr += cvm_oct_mac_addr_offset; - } - - if (cvm_oct_mac_addr_offset >= cvmx_sysinfo_get()->mac_addr_count) - return ENXIO; /* Out of addresses to assign */ - - if (macp) - *macp = cvm_oct_mac_addr; - if (octets) - memcpy(octets, (u_int8_t *)&cvm_oct_mac_addr + 2, 6); - - cvm_oct_mac_addr++; - cvm_oct_mac_addr_offset++; - - return 0; -} - -/** - * Set the hardware MAC address for a device - * - * @param dev Device to change the MAC address for - * @param addr Address structure to change it too. - */ -void cvm_oct_common_set_mac_address(struct ifnet *ifp, const void *addr) -{ - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - cvmx_gmxx_prtx_cfg_t gmx_cfg; - int interface = INTERFACE(priv->port); - int index = INDEX(priv->port); - - memcpy(priv->mac, addr, 6); - - if ((interface < 2) && (cvmx_helper_interface_get_mode(interface) != CVMX_HELPER_INTERFACE_MODE_SPI)) { - int i; - const uint8_t *ptr = addr; - uint64_t mac = 0; - for (i = 0; i < 6; i++) - mac = (mac<<8) | (uint64_t)(ptr[i]); - - gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface)); - cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64 & ~1ull); - - cvmx_write_csr(CVMX_GMXX_SMACX(index, interface), mac); - cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM0(index, interface), ptr[0]); - cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM1(index, interface), ptr[1]); - cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM2(index, interface), ptr[2]); - cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM3(index, interface), ptr[3]); - cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM4(index, interface), ptr[4]); - cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM5(index, interface), ptr[5]); - cvm_oct_common_set_multicast_list(ifp); - cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64); - } -} - -/** - * Change the link MTU. Unimplemented - * - * @param dev Device to change - * @param new_mtu The new MTU - * @return Zero on success - */ -int cvm_oct_common_change_mtu(struct ifnet *ifp, int new_mtu) -{ - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - int interface = INTERFACE(priv->port); - int index = INDEX(priv->port); - int vlan_bytes = 4; - - /* Limit the MTU to make sure the ethernet packets are between 64 bytes - and 65535 bytes */ - if ((new_mtu + 14 + 4 + vlan_bytes < 64) || (new_mtu + 14 + 4 + vlan_bytes > 65392)) { - printf("MTU must be between %d and %d.\n", 64-14-4-vlan_bytes, 65392-14-4-vlan_bytes); - return -EINVAL; - } - ifp->if_mtu = new_mtu; - - if ((interface < 2) && (cvmx_helper_interface_get_mode(interface) != CVMX_HELPER_INTERFACE_MODE_SPI)) { - int max_packet = new_mtu + 14 + 4 + vlan_bytes; /* Add ethernet header and FCS, and VLAN if configured. */ - - if (OCTEON_IS_MODEL(OCTEON_CN3XXX) || OCTEON_IS_MODEL(OCTEON_CN58XX)) { - /* Signal errors on packets larger than the MTU */ - cvmx_write_csr(CVMX_GMXX_RXX_FRM_MAX(index, interface), max_packet); - } else { - /* Set the hardware to truncate packets larger than the MTU and - smaller the 64 bytes */ - cvmx_pip_frm_len_chkx_t frm_len_chk; - frm_len_chk.u64 = 0; - frm_len_chk.s.minlen = 64; - frm_len_chk.s.maxlen = max_packet; - cvmx_write_csr(CVMX_PIP_FRM_LEN_CHKX(interface), frm_len_chk.u64); - } - /* Set the hardware to truncate packets larger than the MTU. The - jabber register must be set to a multiple of 8 bytes, so round up */ - cvmx_write_csr(CVMX_GMXX_RXX_JABBER(index, interface), (max_packet + 7) & ~7u); - } - return 0; -} - -/** - * Enable port. - */ -int cvm_oct_common_open(struct ifnet *ifp) -{ - cvmx_gmxx_prtx_cfg_t gmx_cfg; - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - int interface = INTERFACE(priv->port); - int index = INDEX(priv->port); - cvmx_helper_link_info_t link_info; - - gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface)); - gmx_cfg.s.en = 1; - cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64); - - /* - * Set the link state unless we are using MII. - */ - if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM && priv->miibus == NULL) { - link_info = cvmx_helper_link_get(priv->port); - if (!link_info.s.link_up) - if_link_state_change(ifp, LINK_STATE_DOWN); - else - if_link_state_change(ifp, LINK_STATE_UP); - } - - return 0; -} - -/** - * Disable port. - */ -int cvm_oct_common_stop(struct ifnet *ifp) -{ - cvmx_gmxx_prtx_cfg_t gmx_cfg; - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - int interface = INTERFACE(priv->port); - int index = INDEX(priv->port); - - gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface)); - gmx_cfg.s.en = 0; - cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64); - return 0; -} - -/** - * Poll for link status change. - */ -void cvm_oct_common_poll(struct ifnet *ifp) -{ - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - cvmx_helper_link_info_t link_info; - - /* - * If this is a simulation, do nothing. - */ - if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) - return; - - /* - * If there is a device-specific poll method, use it. - */ - if (priv->poll != NULL) { - priv->poll(ifp); - return; - } - - /* - * If an MII bus is attached, don't use the Simple Executive's link - * state routines. - */ - if (priv->miibus != NULL) - return; - - /* - * Use the Simple Executive's link state routines. - */ - link_info = cvmx_helper_link_get(priv->port); - if (link_info.u64 == priv->link_info) - return; - - link_info = cvmx_helper_link_autoconf(priv->port); - priv->link_info = link_info.u64; - priv->need_link_update = 1; -} - -/** - * Per network device initialization - * - * @param dev Device to initialize - * @return Zero on success - */ -int cvm_oct_common_init(struct ifnet *ifp) -{ - uint8_t mac[6]; - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - - if (cvm_assign_mac_address(NULL, mac) != 0) - return ENXIO; - - ifp->if_mtu = ETHERMTU; - - cvm_oct_mdio_setup_device(ifp); - - cvm_oct_common_set_mac_address(ifp, mac); - cvm_oct_common_change_mtu(ifp, ifp->if_mtu); - - /* - * Do any last-minute board-specific initialization. - */ - switch (cvmx_sysinfo_get()->board_type) { -#if defined(OCTEON_VENDOR_LANNER) - case CVMX_BOARD_TYPE_CUST_LANNER_MR320: - case CVMX_BOARD_TYPE_CUST_LANNER_MR321X: - if (priv->phy_id == 16) - cvm_oct_mv88e61xx_setup_device(ifp); - break; -#endif - default: - break; - } - - device_attach(priv->dev); - - return 0; -} - -void cvm_oct_common_uninit(struct ifnet *ifp) -{ - /* Currently nothing to do */ -} diff --git a/sys/mips/cavium/octe/ethernet-common.h b/sys/mips/cavium/octe/ethernet-common.h deleted file mode 100644 index 3c0826ee9b8..00000000000 --- a/sys/mips/cavium/octe/ethernet-common.h +++ /dev/null @@ -1,54 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -int cvm_oct_common_open(struct ifnet *ifp); -int cvm_oct_common_stop(struct ifnet *ifp); -void cvm_oct_common_poll(struct ifnet *ifp); -int cvm_oct_common_init(struct ifnet *ifp); -void cvm_oct_common_uninit(struct ifnet *ifp); - -int cvm_oct_common_change_mtu(struct ifnet *ifp, int new_mtu); -void cvm_oct_common_set_multicast_list(struct ifnet *ifp); -void cvm_oct_common_set_mac_address(struct ifnet *ifp, const void *); -int cvm_assign_mac_address(uint64_t *, uint8_t *); - -int cvm_oct_init_module(device_t); -void cvm_oct_cleanup_module(device_t); - -/* - * XXX/juli - * These belong elsewhere but we can't stomach the nested extern. - */ -int cvm_oct_rgmii_init(struct ifnet *ifp); -void cvm_oct_rgmii_uninit(struct ifnet *ifp); -int cvm_oct_sgmii_init(struct ifnet *ifp); -int cvm_oct_spi_init(struct ifnet *ifp); -void cvm_oct_spi_uninit(struct ifnet *ifp); -int cvm_oct_xaui_init(struct ifnet *ifp); diff --git a/sys/mips/cavium/octe/ethernet-defines.h b/sys/mips/cavium/octe/ethernet-defines.h deleted file mode 100644 index 9a325942f33..00000000000 --- a/sys/mips/cavium/octe/ethernet-defines.h +++ /dev/null @@ -1,50 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -/* - * A few defines are used to control the operation of this driver: - * CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS - * This kernel config option allows the user to control the number of - * packet and work queue buffers allocated by the driver. If this is zero, - * the driver uses the default from below. - */ - -#define INTERRUPT_LIMIT 1000 /* Max interrupts per second per core */ -/*#define INTERRUPT_LIMIT 0 *//* Don't limit the number of interrupts */ -#define USE_RED 1 /* Enable Random Early Dropping under load */ -#define USE_10MBPS_PREAMBLE_WORKAROUND 1 /* Allow SW based preamble removal at 10Mbps to workaround PHYs giving us bad preambles */ -#define DONT_WRITEBACK(x) (x) /* Use this to have all FPA frees also tell the L2 not to write data to memory */ -/*#define DONT_WRITEBACK(x) 0 *//* Use this to not have FPA frees control L2 */ - -#define MAX_RX_PACKETS 1024 /* Maximum number of packets to process per interrupt. */ -#define MAX_OUT_QUEUE_DEPTH 1000 - -#define FAU_NUM_PACKET_BUFFERS_TO_FREE (CVMX_FAU_REG_END - sizeof(uint32_t)) -#define TOTAL_NUMBER_OF_PORTS (CVMX_PIP_NUM_INPUT_PORTS+1) diff --git a/sys/mips/cavium/octe/ethernet-headers.h b/sys/mips/cavium/octe/ethernet-headers.h deleted file mode 100644 index b8dc2aad760..00000000000 --- a/sys/mips/cavium/octe/ethernet-headers.h +++ /dev/null @@ -1,50 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -#ifndef __ETHERNET_HEADERS_H__ -#define __ETHERNET_HEADERS_H__ - -#include "cavium-ethernet.h" -#include "ethernet-common.h" -#include "ethernet-defines.h" -#include "ethernet-mdio.h" -#include "ethernet-mem.h" -#include "ethernet-rx.h" -#include "ethernet-tx.h" -#include "ethernet-util.h" - -/* - * Any board- or vendor-specific includes. - */ -#ifdef OCTEON_VENDOR_LANNER -#include "ethernet-mv88e61xx.h" -#endif - -#endif diff --git a/sys/mips/cavium/octe/ethernet-mdio.c b/sys/mips/cavium/octe/ethernet-mdio.c deleted file mode 100644 index 409f3264b83..00000000000 --- a/sys/mips/cavium/octe/ethernet-mdio.c +++ /dev/null @@ -1,133 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "wrapper-cvmx-includes.h" -#include "ethernet-headers.h" - -struct mtx cvm_oct_mdio_mtx; -MTX_SYSINIT(cvm_oct_mdio, &cvm_oct_mdio_mtx, "MDIO", MTX_DEF); - -/** - * Perform an MII read. Called by the generic MII routines - * - * @param dev Device to perform read for - * @param phy_id The MII phy id - * @param location Register location to read - * @return Result from the read or zero on failure - */ -int cvm_oct_mdio_read(struct ifnet *ifp, int phy_id, int location) -{ - cvmx_smi_cmd_t smi_cmd; - cvmx_smi_rd_dat_t smi_rd; - - MDIO_LOCK(); - smi_cmd.u64 = 0; - smi_cmd.s.phy_op = 1; - smi_cmd.s.phy_adr = phy_id; - smi_cmd.s.reg_adr = location; - cvmx_write_csr(CVMX_SMI_CMD, smi_cmd.u64); - - do { - cvmx_wait(1000); - smi_rd.u64 = cvmx_read_csr(CVMX_SMI_RD_DAT); - } while (smi_rd.s.pending); - - MDIO_UNLOCK(); - - if (smi_rd.s.val) - return smi_rd.s.dat; - else - return 0; -} - -/** - * Perform an MII write. Called by the generic MII routines - * - * @param dev Device to perform write for - * @param phy_id The MII phy id - * @param location Register location to write - * @param val Value to write - */ -void cvm_oct_mdio_write(struct ifnet *ifp, int phy_id, int location, int val) -{ - cvmx_smi_cmd_t smi_cmd; - cvmx_smi_wr_dat_t smi_wr; - - MDIO_LOCK(); - smi_wr.u64 = 0; - smi_wr.s.dat = val; - cvmx_write_csr(CVMX_SMI_WR_DAT, smi_wr.u64); - - smi_cmd.u64 = 0; - smi_cmd.s.phy_op = 0; - smi_cmd.s.phy_adr = phy_id; - smi_cmd.s.reg_adr = location; - cvmx_write_csr(CVMX_SMI_CMD, smi_cmd.u64); - - do { - cvmx_wait(1000); - smi_wr.u64 = cvmx_read_csr(CVMX_SMI_WR_DAT); - } while (smi_wr.s.pending); - MDIO_UNLOCK(); -} - -/** - * Setup the MDIO device structures - * - * @param dev Device to setup - * - * @return Zero on success, negative on failure - */ -int cvm_oct_mdio_setup_device(struct ifnet *ifp) -{ - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - - priv->phy_id = cvmx_helper_board_get_mii_address(priv->port); - priv->phy_device = NULL; - priv->mdio_read = NULL; - priv->mdio_write = NULL; - - return 0; -} diff --git a/sys/mips/cavium/octe/ethernet-mdio.h b/sys/mips/cavium/octe/ethernet-mdio.h deleted file mode 100644 index 7252d4da872..00000000000 --- a/sys/mips/cavium/octe/ethernet-mdio.h +++ /dev/null @@ -1,39 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -extern struct mtx cvm_oct_mdio_mtx; - -#define MDIO_LOCK() mtx_lock(&cvm_oct_mdio_mtx) -#define MDIO_UNLOCK() mtx_unlock(&cvm_oct_mdio_mtx) -#define MDIO_TRYLOCK() mtx_trylock(&cvm_oct_mdio_mtx) - -int cvm_oct_mdio_read(struct ifnet *ifp, int phy_id, int location); -void cvm_oct_mdio_write(struct ifnet *ifp, int phy_id, int location, int val); -int cvm_oct_mdio_setup_device(struct ifnet *ifp); diff --git a/sys/mips/cavium/octe/ethernet-mem.c b/sys/mips/cavium/octe/ethernet-mem.c deleted file mode 100644 index 15a837054f3..00000000000 --- a/sys/mips/cavium/octe/ethernet-mem.c +++ /dev/null @@ -1,98 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "wrapper-cvmx-includes.h" -#include "ethernet-headers.h" - -/** - * Fill the supplied hardware pool with mbufs - * - * @param pool Pool to allocate an mbuf for - * @param size Size of the buffer needed for the pool - * @param elements Number of buffers to allocate - */ -int cvm_oct_mem_fill_fpa(int pool, int size, int elements) -{ - int freed = elements; - while (freed) { - KASSERT(size <= MCLBYTES - 128, ("mbuf clusters are too small")); - - struct mbuf *m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); - if (__predict_false(m == NULL)) { - printf("Failed to allocate mbuf for hardware pool %d\n", pool); - break; - } - - m->m_data += 128 - (((uintptr_t)m->m_data) & 0x7f); - *(struct mbuf **)(m->m_data - sizeof(void *)) = m; - cvmx_fpa_free(m->m_data, pool, DONT_WRITEBACK(size/128)); - freed--; - } - return (elements - freed); -} - -/** - * Free the supplied hardware pool of mbufs - * - * @param pool Pool to allocate an mbuf for - * @param size Size of the buffer needed for the pool - * @param elements Number of buffers to allocate - */ -void cvm_oct_mem_empty_fpa(int pool, int size, int elements) -{ - char *memory; - - do { - memory = cvmx_fpa_alloc(pool); - if (memory) { - struct mbuf *m = *(struct mbuf **)(memory - sizeof(void *)); - elements--; - m_freem(m); - } - } while (memory); - - if (elements < 0) - printf("Warning: Freeing of pool %u had too many mbufs (%d)\n", pool, elements); - else if (elements > 0) - printf("Warning: Freeing of pool %u is missing %d mbufs\n", pool, elements); -} diff --git a/sys/mips/cavium/octe/ethernet-mem.h b/sys/mips/cavium/octe/ethernet-mem.h deleted file mode 100644 index cd9b1e5532b..00000000000 --- a/sys/mips/cavium/octe/ethernet-mem.h +++ /dev/null @@ -1,32 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -int cvm_oct_mem_fill_fpa(int pool, int size, int elements); -void cvm_oct_mem_empty_fpa(int pool, int size, int elements); diff --git a/sys/mips/cavium/octe/ethernet-mv88e61xx.c b/sys/mips/cavium/octe/ethernet-mv88e61xx.c deleted file mode 100644 index 1e9bc61657d..00000000000 --- a/sys/mips/cavium/octe/ethernet-mv88e61xx.c +++ /dev/null @@ -1,126 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Interface to the Marvell 88E61XX SMI/MDIO. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include "wrapper-cvmx-includes.h" -#include "ethernet-headers.h" - -#define MV88E61XX_SMI_REG_CMD 0x00 /* Indirect command register. */ -#define MV88E61XX_SMI_CMD_BUSY 0x8000 /* Busy bit. */ -#define MV88E61XX_SMI_CMD_22 0x1000 /* Clause 22 (default 45.) */ -#define MV88E61XX_SMI_CMD_READ 0x0800 /* Read command. */ -#define MV88E61XX_SMI_CMD_WRITE 0x0400 /* Write command. */ -#define MV88E61XX_SMI_CMD_PHY(phy) (((phy) & 0x1f) << 5) -#define MV88E61XX_SMI_CMD_REG(reg) ((reg) & 0x1f) - -#define MV88E61XX_SMI_REG_DAT 0x01 /* Indirect data register. */ - -static int cvm_oct_mv88e61xx_smi_read(struct ifnet *, int, int); -static void cvm_oct_mv88e61xx_smi_write(struct ifnet *, int, int, int); -static int cvm_oct_mv88e61xx_smi_wait(struct ifnet *); - -int -cvm_oct_mv88e61xx_setup_device(struct ifnet *ifp) -{ - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - - priv->mdio_read = cvm_oct_mv88e61xx_smi_read; - priv->mdio_write = cvm_oct_mv88e61xx_smi_write; - priv->phy_device = "mv88e61xxphy"; - - return (0); -} - -static int -cvm_oct_mv88e61xx_smi_read(struct ifnet *ifp, int phy_id, int location) -{ - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - int error; - - error = cvm_oct_mv88e61xx_smi_wait(ifp); - if (error != 0) - return (0); - - cvm_oct_mdio_write(ifp, priv->phy_id, MV88E61XX_SMI_REG_CMD, - MV88E61XX_SMI_CMD_BUSY | MV88E61XX_SMI_CMD_22 | - MV88E61XX_SMI_CMD_READ | MV88E61XX_SMI_CMD_PHY(phy_id) | - MV88E61XX_SMI_CMD_REG(location)); - - error = cvm_oct_mv88e61xx_smi_wait(ifp); - if (error != 0) - return (0); - - return (cvm_oct_mdio_read(ifp, priv->phy_id, MV88E61XX_SMI_REG_DAT)); -} - -static void -cvm_oct_mv88e61xx_smi_write(struct ifnet *ifp, int phy_id, int location, int val) -{ - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - - cvm_oct_mv88e61xx_smi_wait(ifp); - cvm_oct_mdio_write(ifp, priv->phy_id, MV88E61XX_SMI_REG_DAT, val); - cvm_oct_mdio_write(ifp, priv->phy_id, MV88E61XX_SMI_REG_CMD, - MV88E61XX_SMI_CMD_BUSY | MV88E61XX_SMI_CMD_22 | - MV88E61XX_SMI_CMD_WRITE | MV88E61XX_SMI_CMD_PHY(phy_id) | - MV88E61XX_SMI_CMD_REG(location)); - cvm_oct_mv88e61xx_smi_wait(ifp); -} - -static int -cvm_oct_mv88e61xx_smi_wait(struct ifnet *ifp) -{ - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - uint16_t cmd; - unsigned i; - - for (i = 0; i < 10000; i++) { - cmd = cvm_oct_mdio_read(ifp, priv->phy_id, MV88E61XX_SMI_REG_CMD); - if ((cmd & MV88E61XX_SMI_CMD_BUSY) == 0) - return (0); - } - return (ETIMEDOUT); -} diff --git a/sys/mips/cavium/octe/ethernet-mv88e61xx.h b/sys/mips/cavium/octe/ethernet-mv88e61xx.h deleted file mode 100644 index b20d1a8740f..00000000000 --- a/sys/mips/cavium/octe/ethernet-mv88e61xx.h +++ /dev/null @@ -1,34 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _CAVIUM_OCTE_ETHERNET_MV88E61XX_H_ -#define _CAVIUM_OCTE_ETHERNET_MV88E61XX_H_ - -int cvm_oct_mv88e61xx_setup_device(struct ifnet *ifp); - -#endif /* !_CAVIUM_OCTE_ETHERNET_MV88E61XX_H_ */ diff --git a/sys/mips/cavium/octe/ethernet-rgmii.c b/sys/mips/cavium/octe/ethernet-rgmii.c deleted file mode 100644 index 921e3d0b617..00000000000 --- a/sys/mips/cavium/octe/ethernet-rgmii.c +++ /dev/null @@ -1,290 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "wrapper-cvmx-includes.h" -#include "ethernet-headers.h" - -#include "octebusvar.h" - -extern struct ifnet *cvm_oct_device[]; - -static struct mtx global_register_lock; -MTX_SYSINIT(global_register_lock, &global_register_lock, - "RGMII Global", MTX_SPIN); - -static int number_rgmii_ports; - -static void cvm_oct_rgmii_poll(struct ifnet *ifp) -{ - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - cvmx_helper_link_info_t link_info; - - /* Take the global register lock since we are going to touch - registers that affect more than one port */ - mtx_lock_spin(&global_register_lock); - - link_info = cvmx_helper_link_get(priv->port); - if (link_info.u64 == priv->link_info) { - /* If the 10Mbps preamble workaround is supported and we're - at 10Mbps we may need to do some special checking */ - if (USE_10MBPS_PREAMBLE_WORKAROUND && (link_info.s.speed == 10)) { - /* Read the GMXX_RXX_INT_REG[PCTERR] bit and - see if we are getting preamble errors */ - int interface = INTERFACE(priv->port); - int index = INDEX(priv->port); - cvmx_gmxx_rxx_int_reg_t gmxx_rxx_int_reg; - gmxx_rxx_int_reg.u64 = cvmx_read_csr(CVMX_GMXX_RXX_INT_REG(index, interface)); - if (gmxx_rxx_int_reg.s.pcterr) { - /* We are getting preamble errors at 10Mbps. - Most likely the PHY is giving us packets - with mis aligned preambles. In order to get - these packets we need to disable preamble - checking and do it in software */ - cvmx_gmxx_rxx_frm_ctl_t gmxx_rxx_frm_ctl; - cvmx_ipd_sub_port_fcs_t ipd_sub_port_fcs; - - /* Disable preamble checking */ - gmxx_rxx_frm_ctl.u64 = cvmx_read_csr(CVMX_GMXX_RXX_FRM_CTL(index, interface)); - gmxx_rxx_frm_ctl.s.pre_chk = 0; - cvmx_write_csr(CVMX_GMXX_RXX_FRM_CTL(index, interface), gmxx_rxx_frm_ctl.u64); - - /* Disable FCS stripping */ - ipd_sub_port_fcs.u64 = cvmx_read_csr(CVMX_IPD_SUB_PORT_FCS); - ipd_sub_port_fcs.s.port_bit &= 0xffffffffull ^ (1ull<port); - cvmx_write_csr(CVMX_IPD_SUB_PORT_FCS, ipd_sub_port_fcs.u64); - - /* Clear any error bits */ - cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, interface), gmxx_rxx_int_reg.u64); - DEBUGPRINT("%s: Using 10Mbps with software preamble removal\n", if_name(ifp)); - } - } - mtx_unlock_spin(&global_register_lock); - return; - } - - /* If the 10Mbps preamble workaround is allowed we need to on - preamble checking, FCS stripping, and clear error bits on - every speed change. If errors occur during 10Mbps operation - the above code will change this stuff */ - if (USE_10MBPS_PREAMBLE_WORKAROUND) { - cvmx_gmxx_rxx_frm_ctl_t gmxx_rxx_frm_ctl; - cvmx_ipd_sub_port_fcs_t ipd_sub_port_fcs; - cvmx_gmxx_rxx_int_reg_t gmxx_rxx_int_reg; - int interface = INTERFACE(priv->port); - int index = INDEX(priv->port); - - /* Enable preamble checking */ - gmxx_rxx_frm_ctl.u64 = cvmx_read_csr(CVMX_GMXX_RXX_FRM_CTL(index, interface)); - gmxx_rxx_frm_ctl.s.pre_chk = 1; - cvmx_write_csr(CVMX_GMXX_RXX_FRM_CTL(index, interface), gmxx_rxx_frm_ctl.u64); - /* Enable FCS stripping */ - ipd_sub_port_fcs.u64 = cvmx_read_csr(CVMX_IPD_SUB_PORT_FCS); - ipd_sub_port_fcs.s.port_bit |= 1ull<port; - cvmx_write_csr(CVMX_IPD_SUB_PORT_FCS, ipd_sub_port_fcs.u64); - /* Clear any error bits */ - gmxx_rxx_int_reg.u64 = cvmx_read_csr(CVMX_GMXX_RXX_INT_REG(index, interface)); - cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, interface), gmxx_rxx_int_reg.u64); - } - - if (priv->miibus == NULL) { - link_info = cvmx_helper_link_autoconf(priv->port); - priv->link_info = link_info.u64; - priv->need_link_update = 1; - } - mtx_unlock_spin(&global_register_lock); -} - -static int cvm_oct_rgmii_rml_interrupt(void *dev_id) -{ - cvmx_npi_rsl_int_blocks_t rsl_int_blocks; - int index; - int return_status = FILTER_STRAY; - - rsl_int_blocks.u64 = cvmx_read_csr(CVMX_NPI_RSL_INT_BLOCKS); - - /* Check and see if this interrupt was caused by the GMX0 block */ - if (rsl_int_blocks.s.gmx0) { - int interface = 0; - /* Loop through every port of this interface */ - for (index = 0; index < cvmx_helper_ports_on_interface(interface); index++) { - /* Read the GMX interrupt status bits */ - cvmx_gmxx_rxx_int_reg_t gmx_rx_int_reg; - gmx_rx_int_reg.u64 = cvmx_read_csr(CVMX_GMXX_RXX_INT_REG(index, interface)); - gmx_rx_int_reg.u64 &= cvmx_read_csr(CVMX_GMXX_RXX_INT_EN(index, interface)); - /* Poll the port if inband status changed */ - if (gmx_rx_int_reg.s.phy_dupx || gmx_rx_int_reg.s.phy_link || gmx_rx_int_reg.s.phy_spd) { - struct ifnet *ifp = cvm_oct_device[cvmx_helper_get_ipd_port(interface, index)]; - if (ifp) - cvm_oct_rgmii_poll(ifp); - gmx_rx_int_reg.u64 = 0; - gmx_rx_int_reg.s.phy_dupx = 1; - gmx_rx_int_reg.s.phy_link = 1; - gmx_rx_int_reg.s.phy_spd = 1; - cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, interface), gmx_rx_int_reg.u64); - return_status = FILTER_HANDLED; - } - } - } - - /* Check and see if this interrupt was caused by the GMX1 block */ - if (rsl_int_blocks.s.gmx1) { - int interface = 1; - /* Loop through every port of this interface */ - for (index = 0; index < cvmx_helper_ports_on_interface(interface); index++) { - /* Read the GMX interrupt status bits */ - cvmx_gmxx_rxx_int_reg_t gmx_rx_int_reg; - gmx_rx_int_reg.u64 = cvmx_read_csr(CVMX_GMXX_RXX_INT_REG(index, interface)); - gmx_rx_int_reg.u64 &= cvmx_read_csr(CVMX_GMXX_RXX_INT_EN(index, interface)); - /* Poll the port if inband status changed */ - if (gmx_rx_int_reg.s.phy_dupx || gmx_rx_int_reg.s.phy_link || gmx_rx_int_reg.s.phy_spd) { - struct ifnet *ifp = cvm_oct_device[cvmx_helper_get_ipd_port(interface, index)]; - if (ifp) - cvm_oct_rgmii_poll(ifp); - gmx_rx_int_reg.u64 = 0; - gmx_rx_int_reg.s.phy_dupx = 1; - gmx_rx_int_reg.s.phy_link = 1; - gmx_rx_int_reg.s.phy_spd = 1; - cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, interface), gmx_rx_int_reg.u64); - return_status = FILTER_HANDLED; - } - } - } - return return_status; -} - -int cvm_oct_rgmii_init(struct ifnet *ifp) -{ - struct octebus_softc *sc; - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - int error; - int rid; - - if (cvm_oct_common_init(ifp) != 0) - return ENXIO; - - priv->open = cvm_oct_common_open; - priv->stop = cvm_oct_common_stop; - priv->stop(ifp); - - /* Due to GMX errata in CN3XXX series chips, it is necessary to take the - link down immediately whne the PHY changes state. In order to do this - we call the poll function every time the RGMII inband status changes. - This may cause problems if the PHY doesn't implement inband status - properly */ - if (number_rgmii_ports == 0) { - sc = device_get_softc(device_get_parent(priv->dev)); - - rid = 0; - sc->sc_rgmii_irq = bus_alloc_resource(sc->sc_dev, SYS_RES_IRQ, - &rid, OCTEON_IRQ_RML, - OCTEON_IRQ_RML, 1, - RF_ACTIVE); - if (sc->sc_rgmii_irq == NULL) { - device_printf(sc->sc_dev, "could not allocate RGMII irq"); - return ENXIO; - } - - error = bus_setup_intr(sc->sc_dev, sc->sc_rgmii_irq, - INTR_TYPE_NET | INTR_MPSAFE, - cvm_oct_rgmii_rml_interrupt, NULL, - &number_rgmii_ports, NULL); - if (error != 0) { - device_printf(sc->sc_dev, "could not setup RGMII irq"); - return error; - } - } - number_rgmii_ports++; - - /* Only true RGMII ports need to be polled. In GMII mode, port 0 is really - a RGMII port */ - if (((priv->imode == CVMX_HELPER_INTERFACE_MODE_GMII) && (priv->port == 0)) || - (priv->imode == CVMX_HELPER_INTERFACE_MODE_RGMII)) { - if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) { - cvmx_gmxx_rxx_int_en_t gmx_rx_int_en; - int interface = INTERFACE(priv->port); - int index = INDEX(priv->port); - - /* Enable interrupts on inband status changes for this port */ - gmx_rx_int_en.u64 = cvmx_read_csr(CVMX_GMXX_RXX_INT_EN(index, interface)); - gmx_rx_int_en.s.phy_dupx = 1; - gmx_rx_int_en.s.phy_link = 1; - gmx_rx_int_en.s.phy_spd = 1; - cvmx_write_csr(CVMX_GMXX_RXX_INT_EN(index, interface), gmx_rx_int_en.u64); - priv->poll = cvm_oct_rgmii_poll; - } - } - - return 0; -} - -void cvm_oct_rgmii_uninit(struct ifnet *ifp) -{ - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - cvm_oct_common_uninit(ifp); - - /* Only true RGMII ports need to be polled. In GMII mode, port 0 is really - a RGMII port */ - if (((priv->imode == CVMX_HELPER_INTERFACE_MODE_GMII) && (priv->port == 0)) || - (priv->imode == CVMX_HELPER_INTERFACE_MODE_RGMII)) { - if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) { - cvmx_gmxx_rxx_int_en_t gmx_rx_int_en; - int interface = INTERFACE(priv->port); - int index = INDEX(priv->port); - - /* Disable interrupts on inband status changes for this port */ - gmx_rx_int_en.u64 = cvmx_read_csr(CVMX_GMXX_RXX_INT_EN(index, interface)); - gmx_rx_int_en.s.phy_dupx = 0; - gmx_rx_int_en.s.phy_link = 0; - gmx_rx_int_en.s.phy_spd = 0; - cvmx_write_csr(CVMX_GMXX_RXX_INT_EN(index, interface), gmx_rx_int_en.u64); - } - } - - /* Remove the interrupt handler when the last port is removed */ - number_rgmii_ports--; - if (number_rgmii_ports == 0) - panic("%s: need to implement IRQ release.", __func__); -} diff --git a/sys/mips/cavium/octe/ethernet-rx.c b/sys/mips/cavium/octe/ethernet-rx.c deleted file mode 100644 index ec97fc4199f..00000000000 --- a/sys/mips/cavium/octe/ethernet-rx.c +++ /dev/null @@ -1,377 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "wrapper-cvmx-includes.h" -#include "ethernet-headers.h" - -extern int pow_receive_group; -extern struct ifnet *cvm_oct_device[]; - -static struct task cvm_oct_task; -static struct taskqueue *cvm_oct_taskq; - -/** - * Interrupt handler. The interrupt occurs whenever the POW - * transitions from 0->1 packets in our group. - * - * @param cpl - * @param dev_id - * @param regs - * @return - */ -int cvm_oct_do_interrupt(void *dev_id) -{ - /* Acknowledge the interrupt */ - if (INTERRUPT_LIMIT) - cvmx_write_csr(CVMX_POW_WQ_INT, 1<word2.snoip.err_code == 10) && (work->word1.s.len <= 64)) { - /* Ignore length errors on min size packets. Some equipment - incorrectly pads packets to 64+4FCS instead of 60+4FCS. - Note these packets still get counted as frame errors. */ - } else - if (USE_10MBPS_PREAMBLE_WORKAROUND && ((work->word2.snoip.err_code == 5) || (work->word2.snoip.err_code == 7))) { - /* We received a packet with either an alignment error or a - FCS error. This may be signalling that we are running - 10Mbps with GMXX_RXX_FRM_CTL[PRE_CHK} off. If this is the - case we need to parse the packet to determine if we can - remove a non spec preamble and generate a correct packet */ - int interface = cvmx_helper_get_interface_num(work->word1.cn38xx.ipprt); - int index = cvmx_helper_get_interface_index_num(work->word1.cn38xx.ipprt); - cvmx_gmxx_rxx_frm_ctl_t gmxx_rxx_frm_ctl; - gmxx_rxx_frm_ctl.u64 = cvmx_read_csr(CVMX_GMXX_RXX_FRM_CTL(index, interface)); - if (gmxx_rxx_frm_ctl.s.pre_chk == 0) { - uint8_t *ptr = cvmx_phys_to_ptr(work->packet_ptr.s.addr); - int i = 0; - - while (i < work->word1.s.len-1) { - if (*ptr != 0x55) - break; - ptr++; - i++; - } - - if (*ptr == 0xd5) { - /* - DEBUGPRINT("Port %d received 0xd5 preamble\n", work->word1.cn38xx.ipprt); - */ - work->packet_ptr.s.addr += i+1; - work->word1.s.len -= i+5; - } else - if ((*ptr & 0xf) == 0xd) { - /* - DEBUGPRINT("Port %d received 0x?d preamble\n", work->word1.cn38xx.ipprt); - */ - work->packet_ptr.s.addr += i; - work->word1.s.len -= i+4; - for (i = 0; i < work->word1.s.len; i++) { - *ptr = ((*ptr&0xf0)>>4) | ((*(ptr+1)&0xf)<<4); - ptr++; - } - } else { - DEBUGPRINT("Port %d unknown preamble, packet dropped\n", work->word1.cn38xx.ipprt); - /* - cvmx_helper_dump_packet(work); - */ - cvm_oct_free_work(work); - return 1; - } - } - } else { - DEBUGPRINT("Port %d receive error code %d, packet dropped\n", work->word1.cn38xx.ipprt, work->word2.snoip.err_code); - cvm_oct_free_work(work); - return 1; - } - - return 0; -} - -/** - * Tasklet function that is scheduled on a core when an interrupt occurs. - * - * @param unused - */ -void cvm_oct_tasklet_rx(void *context, int pending) -{ - int coreid; - uint64_t old_group_mask; - int rx_count = 0; - int number_to_free; - int num_freed; - int packet_not_copied; - - coreid = cvmx_get_core_num(); - - /* Prefetch cvm_oct_device since we know we need it soon */ - CVMX_PREFETCH(cvm_oct_device, 0); - - /* Only allow work for our group (and preserve priorities) */ - old_group_mask = cvmx_read_csr(CVMX_POW_PP_GRP_MSKX(coreid)); - cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid), - (old_group_mask & ~0xFFFFull) | 1<word2.s.bufs == 1; - if ((mbuf_in_hw)) { - m = *(struct mbuf **)(cvm_oct_get_buffer_ptr(work->packet_ptr) - sizeof(void *)); - CVMX_PREFETCH(m, offsetof(struct mbuf, m_data)); - CVMX_PREFETCH(m, offsetof(struct mbuf, m_pkthdr)); - } - CVMX_PREFETCH(cvm_oct_device[work->word1.cn38xx.ipprt], 0); - //CVMX_PREFETCH(m, 0); - - rx_count++; - /* Immediately throw away all packets with receive errors */ - if ((work->word2.snoip.rcv_error)) { - if (cvm_oct_check_rcv_error(work)) - continue; - } - - /* We can only use the zero copy path if mbufs are in the FPA pool - and the packet fits in a single buffer */ - if ((mbuf_in_hw)) { - CVMX_PREFETCH(m->m_data, 0); - - m->m_pkthdr.len = m->m_len = work->word1.s.len; - - packet_not_copied = 1; - - /* - * Adjust the data pointer based on the offset - * of the packet within the buffer. - */ - m->m_data += (work->packet_ptr.s.back << 7) + (work->packet_ptr.s.addr & 0x7f); - } else { - /* We have to copy the packet. First allocate an - mbuf for it */ - MGETHDR(m, M_NOWAIT, MT_DATA); - if (m == NULL) { - DEBUGPRINT("Port %d failed to allocate mbuf, packet dropped\n", work->word1.cn38xx.ipprt); - cvm_oct_free_work(work); - continue; - } - - /* Check if we've received a packet that was entirely - stored in the work entry. This is untested */ - if ((work->word2.s.bufs == 0)) { - uint8_t *ptr = work->packet_data; - - if (cvmx_likely(!work->word2.s.not_IP)) { - /* The beginning of the packet moves - for IP packets */ - if (work->word2.s.is_v6) - ptr += 2; - else - ptr += 6; - } - panic("%s: not yet implemented; copy in small packet.", __func__); - /* No packet buffers to free */ - } else { - int segments = work->word2.s.bufs; - cvmx_buf_ptr_t segment_ptr = work->packet_ptr; - int len = work->word1.s.len; - - while (segments--) { - cvmx_buf_ptr_t next_ptr = *(cvmx_buf_ptr_t *)cvmx_phys_to_ptr(segment_ptr.s.addr-8); - /* Octeon Errata PKI-100: The segment - size is wrong. Until it is fixed, - calculate the segment size based on - the packet pool buffer size. When - it is fixed, the following line - should be replaced with this one: - int segment_size = segment_ptr.s.size; */ - int segment_size = CVMX_FPA_PACKET_POOL_SIZE - (segment_ptr.s.addr - (((segment_ptr.s.addr >> 7) - segment_ptr.s.back) << 7)); - /* Don't copy more than what is left - in the packet */ - if (segment_size > len) - segment_size = len; - /* Copy the data into the packet */ - panic("%s: not yet implemented; copy in packet segments.", __func__); -#if 0 - memcpy(m_put(m, segment_size), cvmx_phys_to_ptr(segment_ptr.s.addr), segment_size); -#endif - /* Reduce the amount of bytes left - to copy */ - len -= segment_size; - segment_ptr = next_ptr; - } - } - packet_not_copied = 0; - } - - if (((work->word1.cn38xx.ipprt < TOTAL_NUMBER_OF_PORTS) && - cvm_oct_device[work->word1.cn38xx.ipprt])) { - struct ifnet *ifp = cvm_oct_device[work->word1.cn38xx.ipprt]; - - /* Only accept packets for devices - that are currently up */ - if ((ifp->if_flags & IFF_UP)) { - m->m_pkthdr.rcvif = ifp; - - if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) { - if ((work->word2.s.not_IP || work->word2.s.IP_exc || work->word2.s.L4_error)) - m->m_pkthdr.csum_flags = 0; /* XXX */ - else { - m->m_pkthdr.csum_flags = CSUM_IP_CHECKED | CSUM_IP_VALID | CSUM_DATA_VALID | CSUM_PSEUDO_HDR; - m->m_pkthdr.csum_data = 0xffff; - } - } else { - m->m_pkthdr.csum_flags = 0; /* XXX */ - } - - if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1); - - (*ifp->if_input)(ifp, m); - } else { - /* Drop any packet received for a device that isn't up */ - /* - DEBUGPRINT("%s: Device not up, packet dropped\n", - if_name(ifp)); - */ - m_freem(m); - } - } else { - /* Drop any packet received for a device that - doesn't exist */ - DEBUGPRINT("Port %d not controlled by FreeBSD, packet dropped\n", work->word1.cn38xx.ipprt); - m_freem(m); - } - - /* Check to see if the mbuf and work share - the same packet buffer */ - if ((packet_not_copied)) { - /* This buffer needs to be replaced, increment - the number of buffers we need to free by one */ - cvmx_fau_atomic_add32( - FAU_NUM_PACKET_BUFFERS_TO_FREE, 1); - - cvmx_fpa_free(work, CVMX_FPA_WQE_POOL, - DONT_WRITEBACK(1)); - } else - cvm_oct_free_work(work); - } - - /* - * If we hit our limit, schedule another task while we clean up. - */ - if (INTERRUPT_LIMIT != 0 && rx_count == MAX_RX_PACKETS) { - taskqueue_enqueue(cvm_oct_taskq, &cvm_oct_task); - } - - /* Restore the original POW group mask */ - cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid), old_group_mask); - - /* Refill the packet buffer pool */ - number_to_free = - cvmx_fau_fetch_and_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0); - - if (number_to_free > 0) { - cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, - -number_to_free); - num_freed = - cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, - CVMX_FPA_PACKET_POOL_SIZE, - number_to_free); - if (num_freed != number_to_free) { - cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, - number_to_free - num_freed); - } - } -} - -void cvm_oct_rx_initialize(void) -{ - int cpu; - TASK_INIT(&cvm_oct_task, 0, cvm_oct_tasklet_rx, NULL); - - cvm_oct_taskq = taskqueue_create_fast("oct_rx", M_NOWAIT, - taskqueue_thread_enqueue, - &cvm_oct_taskq); - - CPU_FOREACH(cpu) { - cpuset_t cpu_mask; - CPU_SETOF(cpu, &cpu_mask); - taskqueue_start_threads_cpuset(&cvm_oct_taskq, 1, PI_NET, - &cpu_mask, "octe taskq"); - } -} - -void cvm_oct_rx_shutdown(void) -{ - panic("%s: not yet implemented.", __func__); -} diff --git a/sys/mips/cavium/octe/ethernet-rx.h b/sys/mips/cavium/octe/ethernet-rx.h deleted file mode 100644 index b32db70111f..00000000000 --- a/sys/mips/cavium/octe/ethernet-rx.h +++ /dev/null @@ -1,36 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -int cvm_oct_do_interrupt(void *dev_id); -void cvm_oct_poll_controller(struct ifnet *ifp); -void cvm_oct_tasklet_rx(void *context, int pending); - -void cvm_oct_rx_initialize(void); -void cvm_oct_rx_shutdown(void); diff --git a/sys/mips/cavium/octe/ethernet-sgmii.c b/sys/mips/cavium/octe/ethernet-sgmii.c deleted file mode 100644 index fbf3c28d08b..00000000000 --- a/sys/mips/cavium/octe/ethernet-sgmii.c +++ /dev/null @@ -1,60 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "wrapper-cvmx-includes.h" -#include "ethernet-headers.h" - -int cvm_oct_sgmii_init(struct ifnet *ifp) -{ - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - - if (cvm_oct_common_init(ifp) != 0) - return ENXIO; - - priv->open = cvm_oct_common_open; - priv->stop = cvm_oct_common_stop; - priv->stop(ifp); - - /* FIXME: Need autoneg logic */ - return 0; -} diff --git a/sys/mips/cavium/octe/ethernet-spi.c b/sys/mips/cavium/octe/ethernet-spi.c deleted file mode 100644 index 2aaeffbf80c..00000000000 --- a/sys/mips/cavium/octe/ethernet-spi.c +++ /dev/null @@ -1,303 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "wrapper-cvmx-includes.h" -#include "ethernet-headers.h" - -#include "octebusvar.h" - -static int number_spi_ports; -static int need_retrain[2] = {0, 0}; - -static int cvm_oct_spi_rml_interrupt(void *dev_id) -{ - int return_status = FILTER_STRAY; - cvmx_npi_rsl_int_blocks_t rsl_int_blocks; - - /* Check and see if this interrupt was caused by the GMX block */ - rsl_int_blocks.u64 = cvmx_read_csr(CVMX_NPI_RSL_INT_BLOCKS); - if (rsl_int_blocks.s.spx1) { /* 19 - SPX1_INT_REG & STX1_INT_REG */ - - cvmx_spxx_int_reg_t spx_int_reg; - cvmx_stxx_int_reg_t stx_int_reg; - - spx_int_reg.u64 = cvmx_read_csr(CVMX_SPXX_INT_REG(1)); - cvmx_write_csr(CVMX_SPXX_INT_REG(1), spx_int_reg.u64); - if (!need_retrain[1]) { - spx_int_reg.u64 &= cvmx_read_csr(CVMX_SPXX_INT_MSK(1)); - if (spx_int_reg.s.spf) - printf("SPI1: SRX Spi4 interface down\n"); - if (spx_int_reg.s.calerr) - printf("SPI1: SRX Spi4 Calendar table parity error\n"); - if (spx_int_reg.s.syncerr) - printf("SPI1: SRX Consecutive Spi4 DIP4 errors have exceeded SPX_ERR_CTL[ERRCNT]\n"); - if (spx_int_reg.s.diperr) - printf("SPI1: SRX Spi4 DIP4 error\n"); - if (spx_int_reg.s.tpaovr) - printf("SPI1: SRX Selected port has hit TPA overflow\n"); - if (spx_int_reg.s.rsverr) - printf("SPI1: SRX Spi4 reserved control word detected\n"); - if (spx_int_reg.s.drwnng) - printf("SPI1: SRX Spi4 receive FIFO drowning/overflow\n"); - if (spx_int_reg.s.clserr) - printf("SPI1: SRX Spi4 packet closed on non-16B alignment without EOP\n"); - if (spx_int_reg.s.spiovr) - printf("SPI1: SRX Spi4 async FIFO overflow\n"); - if (spx_int_reg.s.abnorm) - printf("SPI1: SRX Abnormal packet termination (ERR bit)\n"); - if (spx_int_reg.s.prtnxa) - printf("SPI1: SRX Port out of range\n"); - } - - stx_int_reg.u64 = cvmx_read_csr(CVMX_STXX_INT_REG(1)); - cvmx_write_csr(CVMX_STXX_INT_REG(1), stx_int_reg.u64); - if (!need_retrain[1]) { - stx_int_reg.u64 &= cvmx_read_csr(CVMX_STXX_INT_MSK(1)); - if (stx_int_reg.s.syncerr) - printf("SPI1: STX Interface encountered a fatal error\n"); - if (stx_int_reg.s.frmerr) - printf("SPI1: STX FRMCNT has exceeded STX_DIP_CNT[MAXFRM]\n"); - if (stx_int_reg.s.unxfrm) - printf("SPI1: STX Unexpected framing sequence\n"); - if (stx_int_reg.s.nosync) - printf("SPI1: STX ERRCNT has exceeded STX_DIP_CNT[MAXDIP]\n"); - if (stx_int_reg.s.diperr) - printf("SPI1: STX DIP2 error on the Spi4 Status channel\n"); - if (stx_int_reg.s.datovr) - printf("SPI1: STX Spi4 FIFO overflow error\n"); - if (stx_int_reg.s.ovrbst) - printf("SPI1: STX Transmit packet burst too big\n"); - if (stx_int_reg.s.calpar1) - printf("SPI1: STX Calendar Table Parity Error Bank1\n"); - if (stx_int_reg.s.calpar0) - printf("SPI1: STX Calendar Table Parity Error Bank0\n"); - } - - cvmx_write_csr(CVMX_SPXX_INT_MSK(1), 0); - cvmx_write_csr(CVMX_STXX_INT_MSK(1), 0); - need_retrain[1] = 1; - return_status = FILTER_HANDLED; - } - - if (rsl_int_blocks.s.spx0) { /* 18 - SPX0_INT_REG & STX0_INT_REG */ - cvmx_spxx_int_reg_t spx_int_reg; - cvmx_stxx_int_reg_t stx_int_reg; - - spx_int_reg.u64 = cvmx_read_csr(CVMX_SPXX_INT_REG(0)); - cvmx_write_csr(CVMX_SPXX_INT_REG(0), spx_int_reg.u64); - if (!need_retrain[0]) { - spx_int_reg.u64 &= cvmx_read_csr(CVMX_SPXX_INT_MSK(0)); - if (spx_int_reg.s.spf) - printf("SPI0: SRX Spi4 interface down\n"); - if (spx_int_reg.s.calerr) - printf("SPI0: SRX Spi4 Calendar table parity error\n"); - if (spx_int_reg.s.syncerr) - printf("SPI0: SRX Consecutive Spi4 DIP4 errors have exceeded SPX_ERR_CTL[ERRCNT]\n"); - if (spx_int_reg.s.diperr) - printf("SPI0: SRX Spi4 DIP4 error\n"); - if (spx_int_reg.s.tpaovr) - printf("SPI0: SRX Selected port has hit TPA overflow\n"); - if (spx_int_reg.s.rsverr) - printf("SPI0: SRX Spi4 reserved control word detected\n"); - if (spx_int_reg.s.drwnng) - printf("SPI0: SRX Spi4 receive FIFO drowning/overflow\n"); - if (spx_int_reg.s.clserr) - printf("SPI0: SRX Spi4 packet closed on non-16B alignment without EOP\n"); - if (spx_int_reg.s.spiovr) - printf("SPI0: SRX Spi4 async FIFO overflow\n"); - if (spx_int_reg.s.abnorm) - printf("SPI0: SRX Abnormal packet termination (ERR bit)\n"); - if (spx_int_reg.s.prtnxa) - printf("SPI0: SRX Port out of range\n"); - } - - stx_int_reg.u64 = cvmx_read_csr(CVMX_STXX_INT_REG(0)); - cvmx_write_csr(CVMX_STXX_INT_REG(0), stx_int_reg.u64); - if (!need_retrain[0]) { - stx_int_reg.u64 &= cvmx_read_csr(CVMX_STXX_INT_MSK(0)); - if (stx_int_reg.s.syncerr) - printf("SPI0: STX Interface encountered a fatal error\n"); - if (stx_int_reg.s.frmerr) - printf("SPI0: STX FRMCNT has exceeded STX_DIP_CNT[MAXFRM]\n"); - if (stx_int_reg.s.unxfrm) - printf("SPI0: STX Unexpected framing sequence\n"); - if (stx_int_reg.s.nosync) - printf("SPI0: STX ERRCNT has exceeded STX_DIP_CNT[MAXDIP]\n"); - if (stx_int_reg.s.diperr) - printf("SPI0: STX DIP2 error on the Spi4 Status channel\n"); - if (stx_int_reg.s.datovr) - printf("SPI0: STX Spi4 FIFO overflow error\n"); - if (stx_int_reg.s.ovrbst) - printf("SPI0: STX Transmit packet burst too big\n"); - if (stx_int_reg.s.calpar1) - printf("SPI0: STX Calendar Table Parity Error Bank1\n"); - if (stx_int_reg.s.calpar0) - printf("SPI0: STX Calendar Table Parity Error Bank0\n"); - } - - cvmx_write_csr(CVMX_SPXX_INT_MSK(0), 0); - cvmx_write_csr(CVMX_STXX_INT_MSK(0), 0); - need_retrain[0] = 1; - return_status = FILTER_HANDLED; - } - - return return_status; -} - -static void cvm_oct_spi_enable_error_reporting(int interface) -{ - cvmx_spxx_int_msk_t spxx_int_msk; - cvmx_stxx_int_msk_t stxx_int_msk; - - spxx_int_msk.u64 = cvmx_read_csr(CVMX_SPXX_INT_MSK(interface)); - spxx_int_msk.s.calerr = 1; - spxx_int_msk.s.syncerr = 1; - spxx_int_msk.s.diperr = 1; - spxx_int_msk.s.tpaovr = 1; - spxx_int_msk.s.rsverr = 1; - spxx_int_msk.s.drwnng = 1; - spxx_int_msk.s.clserr = 1; - spxx_int_msk.s.spiovr = 1; - spxx_int_msk.s.abnorm = 1; - spxx_int_msk.s.prtnxa = 1; - cvmx_write_csr(CVMX_SPXX_INT_MSK(interface), spxx_int_msk.u64); - - stxx_int_msk.u64 = cvmx_read_csr(CVMX_STXX_INT_MSK(interface)); - stxx_int_msk.s.frmerr = 1; - stxx_int_msk.s.unxfrm = 1; - stxx_int_msk.s.nosync = 1; - stxx_int_msk.s.diperr = 1; - stxx_int_msk.s.datovr = 1; - stxx_int_msk.s.ovrbst = 1; - stxx_int_msk.s.calpar1 = 1; - stxx_int_msk.s.calpar0 = 1; - cvmx_write_csr(CVMX_STXX_INT_MSK(interface), stxx_int_msk.u64); -} - -static void cvm_oct_spi_poll(struct ifnet *ifp) -{ - static int spi4000_port; - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - int interface; - - for (interface = 0; interface < 2; interface++) { - if ((priv->port == interface*16) && need_retrain[interface]) { - if (cvmx_spi_restart_interface(interface, CVMX_SPI_MODE_DUPLEX, 10) == 0) { - need_retrain[interface] = 0; - cvm_oct_spi_enable_error_reporting(interface); - } - } - - /* The SPI4000 TWSI interface is very slow. In order not to - bring the system to a crawl, we only poll a single port - every second. This means negotiation speed changes - take up to 10 seconds, but at least we don't waste - absurd amounts of time waiting for TWSI */ - if (priv->port == spi4000_port) { - /* This function does nothing if it is called on an - interface without a SPI4000 */ - cvmx_spi4000_check_speed(interface, priv->port); - /* Normal ordering increments. By decrementing - we only match once per iteration */ - spi4000_port--; - if (spi4000_port < 0) - spi4000_port = 10; - } - } -} - -int cvm_oct_spi_init(struct ifnet *ifp) -{ - struct octebus_softc *sc; - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - int error; - int rid; - - if (number_spi_ports == 0) { - sc = device_get_softc(device_get_parent(priv->dev)); - - rid = 0; - sc->sc_spi_irq = bus_alloc_resource(sc->sc_dev, SYS_RES_IRQ, - &rid, OCTEON_IRQ_RML, - OCTEON_IRQ_RML, 1, - RF_ACTIVE); - if (sc->sc_spi_irq == NULL) { - device_printf(sc->sc_dev, "could not allocate SPI irq"); - return ENXIO; - } - - error = bus_setup_intr(sc->sc_dev, sc->sc_spi_irq, - INTR_TYPE_NET | INTR_MPSAFE, - cvm_oct_spi_rml_interrupt, NULL, - &number_spi_ports, NULL); - if (error != 0) { - device_printf(sc->sc_dev, "could not setup SPI irq"); - return error; - } - } - number_spi_ports++; - - if ((priv->port == 0) || (priv->port == 16)) { - cvm_oct_spi_enable_error_reporting(INTERFACE(priv->port)); - priv->poll = cvm_oct_spi_poll; - } - if (cvm_oct_common_init(ifp) != 0) - return ENXIO; - return 0; -} - -void cvm_oct_spi_uninit(struct ifnet *ifp) -{ - int interface; - - cvm_oct_common_uninit(ifp); - number_spi_ports--; - if (number_spi_ports == 0) { - for (interface = 0; interface < 2; interface++) { - cvmx_write_csr(CVMX_SPXX_INT_MSK(interface), 0); - cvmx_write_csr(CVMX_STXX_INT_MSK(interface), 0); - } - panic("%s: IRQ release not yet implemented.", __func__); - } -} diff --git a/sys/mips/cavium/octe/ethernet-tx.c b/sys/mips/cavium/octe/ethernet-tx.c deleted file mode 100644 index a0529f1f46f..00000000000 --- a/sys/mips/cavium/octe/ethernet-tx.c +++ /dev/null @@ -1,269 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "wrapper-cvmx-includes.h" -#include "ethernet-headers.h" - -/* You can define GET_MBUF_QOS() to override how the mbuf output function - determines which output queue is used. The default implementation - always uses the base queue for the port. If, for example, you wanted - to use the m->priority fieid, define GET_MBUF_QOS as: - #define GET_MBUF_QOS(m) ((m)->priority) */ -#ifndef GET_MBUF_QOS - #define GET_MBUF_QOS(m) 0 -#endif - -/** - * Packet transmit - * - * @param m Packet to send - * @param dev Device info structure - * @return Always returns zero - */ -int cvm_oct_xmit(struct mbuf *m, struct ifnet *ifp) -{ - cvmx_pko_command_word0_t pko_command; - cvmx_buf_ptr_t hw_buffer; - int dropped; - int qos; - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - int32_t in_use; - int32_t buffers_to_free; - cvmx_wqe_t *work; - - /* Prefetch the private data structure. - It is larger that one cache line */ - CVMX_PREFETCH(priv, 0); - - /* Start off assuming no drop */ - dropped = 0; - - /* The check on CVMX_PKO_QUEUES_PER_PORT_* is designed to completely - remove "qos" in the event neither interface supports multiple queues - per port */ - if ((CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 > 1) || - (CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 > 1)) { - qos = GET_MBUF_QOS(m); - if (qos <= 0) - qos = 0; - else if (qos >= cvmx_pko_get_num_queues(priv->port)) - qos = 0; - } else - qos = 0; - - /* The CN3XXX series of parts has an errata (GMX-401) which causes the - GMX block to hang if a collision occurs towards the end of a - <68 byte packet. As a workaround for this, we pad packets to be - 68 bytes whenever we are in half duplex mode. We don't handle - the case of having a small packet but no room to add the padding. - The kernel should always give us at least a cache line */ - if (__predict_false(m->m_pkthdr.len < 64) && OCTEON_IS_MODEL(OCTEON_CN3XXX)) { - cvmx_gmxx_prtx_cfg_t gmx_prt_cfg; - int interface = INTERFACE(priv->port); - int index = INDEX(priv->port); - - if (interface < 2) { - /* We only need to pad packet in half duplex mode */ - gmx_prt_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface)); - if (gmx_prt_cfg.s.duplex == 0) { - static uint8_t pad[64]; - - if (!m_append(m, sizeof pad - m->m_pkthdr.len, pad)) - printf("%s: unable to padd small packet.", __func__); - } - } - } - -#ifdef OCTEON_VENDOR_RADISYS - /* - * The RSYS4GBE will hang if asked to transmit a packet less than 60 bytes. - */ - if (__predict_false(m->m_pkthdr.len < 60) && - cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_CUST_RADISYS_RSYS4GBE) { - static uint8_t pad[60]; - - if (!m_append(m, sizeof pad - m->m_pkthdr.len, pad)) - printf("%s: unable to pad small packet.", __func__); - } -#endif - - /* - * If the packet is not fragmented. - */ - if (m->m_pkthdr.len == m->m_len) { - /* Build the PKO buffer pointer */ - hw_buffer.u64 = 0; - hw_buffer.s.addr = cvmx_ptr_to_phys(m->m_data); - hw_buffer.s.pool = 0; - hw_buffer.s.size = m->m_len; - - /* Build the PKO command */ - pko_command.u64 = 0; - pko_command.s.segs = 1; - pko_command.s.dontfree = 1; /* Do not put this buffer into the FPA. */ - - work = NULL; - } else { - struct mbuf *n; - unsigned segs; - uint64_t *gp; - - /* - * The packet is fragmented, we need to send a list of segments - * in memory we borrow from the WQE pool. - */ - work = cvmx_fpa_alloc(CVMX_FPA_WQE_POOL); - if (work == NULL) { - m_freem(m); - if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); - return 1; - } - - segs = 0; - gp = (uint64_t *)work; - for (n = m; n != NULL; n = n->m_next) { - if (segs == CVMX_FPA_WQE_POOL_SIZE / sizeof (uint64_t)) - panic("%s: too many segments in packet; call m_collapse().", __func__); - - /* Build the PKO buffer pointer */ - hw_buffer.u64 = 0; - hw_buffer.s.i = 1; /* Do not put this buffer into the FPA. */ - hw_buffer.s.addr = cvmx_ptr_to_phys(n->m_data); - hw_buffer.s.pool = 0; - hw_buffer.s.size = n->m_len; - - *gp++ = hw_buffer.u64; - segs++; - } - - /* Build the PKO buffer gather list pointer */ - hw_buffer.u64 = 0; - hw_buffer.s.addr = cvmx_ptr_to_phys(work); - hw_buffer.s.pool = CVMX_FPA_WQE_POOL; - hw_buffer.s.size = segs; - - /* Build the PKO command */ - pko_command.u64 = 0; - pko_command.s.segs = segs; - pko_command.s.gather = 1; - pko_command.s.dontfree = 0; /* Put the WQE above back into the FPA. */ - } - - /* Finish building the PKO command */ - pko_command.s.n2 = 1; /* Don't pollute L2 with the outgoing packet */ - pko_command.s.reg0 = priv->fau+qos*4; - pko_command.s.total_bytes = m->m_pkthdr.len; - pko_command.s.size0 = CVMX_FAU_OP_SIZE_32; - pko_command.s.subone0 = 1; - - /* Check if we can use the hardware checksumming */ - if ((m->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP)) != 0) { - /* Use hardware checksum calc */ - pko_command.s.ipoffp1 = ETHER_HDR_LEN + 1; - } - - /* - * XXX - * Could use a different free queue (and different FAU address) per - * core instead of per QoS, to reduce contention here. - */ - IF_LOCK(&priv->tx_free_queue[qos]); - /* Get the number of mbufs in use by the hardware */ - in_use = cvmx_fau_fetch_and_add32(priv->fau+qos*4, 1); - buffers_to_free = cvmx_fau_fetch_and_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0); - - cvmx_pko_send_packet_prepare(priv->port, priv->queue + qos, CVMX_PKO_LOCK_CMD_QUEUE); - - /* Drop this packet if we have too many already queued to the HW */ - if (_IF_QFULL(&priv->tx_free_queue[qos])) { - dropped = 1; - } - /* Send the packet to the output queue */ - else - if (__predict_false(cvmx_pko_send_packet_finish(priv->port, priv->queue + qos, pko_command, hw_buffer, CVMX_PKO_LOCK_CMD_QUEUE))) { - DEBUGPRINT("%s: Failed to send the packet\n", if_name(ifp)); - dropped = 1; - } - - if (__predict_false(dropped)) { - m_freem(m); - cvmx_fau_atomic_add32(priv->fau+qos*4, -1); - if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); - } else { - /* Put this packet on the queue to be freed later */ - _IF_ENQUEUE(&priv->tx_free_queue[qos], m); - - /* Pass it to any BPF listeners. */ - ETHER_BPF_MTAP(ifp, m); - - if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); - if_inc_counter(ifp, IFCOUNTER_OBYTES, m->m_pkthdr.len); - } - - /* Free mbufs not in use by the hardware */ - if (_IF_QLEN(&priv->tx_free_queue[qos]) > in_use) { - while (_IF_QLEN(&priv->tx_free_queue[qos]) > in_use) { - _IF_DEQUEUE(&priv->tx_free_queue[qos], m); - m_freem(m); - } - } - IF_UNLOCK(&priv->tx_free_queue[qos]); - - return dropped; -} - -/** - * This function frees all mbufs that are currenty queued for TX. - * - * @param dev Device being shutdown - */ -void cvm_oct_tx_shutdown(struct ifnet *ifp) -{ - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - int qos; - - for (qos = 0; qos < 16; qos++) { - IF_DRAIN(&priv->tx_free_queue[qos]); - } -} diff --git a/sys/mips/cavium/octe/ethernet-tx.h b/sys/mips/cavium/octe/ethernet-tx.h deleted file mode 100644 index 500df4d8185..00000000000 --- a/sys/mips/cavium/octe/ethernet-tx.h +++ /dev/null @@ -1,32 +0,0 @@ -/************************************************************************* - SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -int cvm_oct_xmit(struct mbuf *m, struct ifnet *ifp); -void cvm_oct_tx_shutdown(struct ifnet *ifp); diff --git a/sys/mips/cavium/octe/ethernet-util.h b/sys/mips/cavium/octe/ethernet-util.h deleted file mode 100644 index 35fdf92f383..00000000000 --- a/sys/mips/cavium/octe/ethernet-util.h +++ /dev/null @@ -1,81 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -#define DEBUGPRINT(format, ...) printf(format, ##__VA_ARGS__) - -/** - * Given a packet data address, return a pointer to the - * beginning of the packet buffer. - * - * @param packet_ptr Packet data hardware address - * @return Packet buffer pointer - */ -static inline char *cvm_oct_get_buffer_ptr(cvmx_buf_ptr_t packet_ptr) -{ - return cvmx_phys_to_ptr(((packet_ptr.s.addr >> 7) - packet_ptr.s.back) << 7); -} - -/** - * Given an IPD/PKO port number, return the logical interface it is - * on. - * - * @param ipd_port Port to check - * - * @return Logical interface - */ -static inline int INTERFACE(int ipd_port) -{ - if (ipd_port < 32) /* Interface 0 or 1 for RGMII,GMII,SPI, etc */ - return ipd_port>>4; - else if (ipd_port < 36) /* Interface 2 for NPI */ - return 2; - else if (ipd_port < 40) /* Interface 3 for loopback */ - return 3; - else if (ipd_port == 40) /* Non existent interface for POW0 */ - return 4; - else - panic("Illegal ipd_port %d passed to INTERFACE\n", ipd_port); -} - -/** - * Given an IPD/PKO port number, return the port's index on a - * logical interface. - * - * @param ipd_port Port to check - * - * @return Index into interface port list - */ -static inline int INDEX(int ipd_port) -{ - if (ipd_port < 32) - return ipd_port & 15; - else - return ipd_port & 3; -} diff --git a/sys/mips/cavium/octe/ethernet-xaui.c b/sys/mips/cavium/octe/ethernet-xaui.c deleted file mode 100644 index 3222613f71a..00000000000 --- a/sys/mips/cavium/octe/ethernet-xaui.c +++ /dev/null @@ -1,59 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "wrapper-cvmx-includes.h" -#include "ethernet-headers.h" - -int cvm_oct_xaui_init(struct ifnet *ifp) -{ - cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc; - - if (cvm_oct_common_init(ifp) != 0) - return ENXIO; - - priv->open = cvm_oct_common_open; - priv->stop = cvm_oct_common_stop; - priv->stop(ifp); - - return 0; -} diff --git a/sys/mips/cavium/octe/ethernet.c b/sys/mips/cavium/octe/ethernet.c deleted file mode 100644 index 2d414199e49..00000000000 --- a/sys/mips/cavium/octe/ethernet.c +++ /dev/null @@ -1,502 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. -*************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "wrapper-cvmx-includes.h" -#include "ethernet-headers.h" - -#include "octebusvar.h" - -/* - * XXX/juli - * Convert 0444 to tunables, 0644 to sysctls. - */ -#if defined(CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS) && CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS -int num_packet_buffers = CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS; -#else -int num_packet_buffers = 2048; -#endif -TUNABLE_INT("hw.octe.num_packet_buffers", &num_packet_buffers); -/* - "\t\tNumber of packet buffers to allocate and store in the\n" - "\t\tFPA. By default, 1024 packet buffers are used unless\n" - "\t\tCONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS is defined." */ - -int pow_receive_group = 15; -TUNABLE_INT("hw.octe.pow_receive_group", &pow_receive_group); -/* - "\t\tPOW group to receive packets from. All ethernet hardware\n" - "\t\twill be configured to send incomming packets to this POW\n" - "\t\tgroup. Also any other software can submit packets to this\n" - "\t\tgroup for the kernel to process." */ - -/** - * Periodic timer to check auto negotiation - */ -static struct callout cvm_oct_poll_timer; - -/** - * Array of every ethernet device owned by this driver indexed by - * the ipd input port number. - */ -struct ifnet *cvm_oct_device[TOTAL_NUMBER_OF_PORTS]; - -/** - * Task to handle link status changes. - */ -static struct taskqueue *cvm_oct_link_taskq; - -/* - * Number of buffers in output buffer pool. - */ -static int cvm_oct_num_output_buffers; - -/** - * Function to update link status. - */ -static void cvm_oct_update_link(void *context, int pending) -{ - cvm_oct_private_t *priv = (cvm_oct_private_t *)context; - struct ifnet *ifp = priv->ifp; - cvmx_helper_link_info_t link_info; - - link_info.u64 = priv->link_info; - - if (link_info.s.link_up) { - if_link_state_change(ifp, LINK_STATE_UP); - DEBUGPRINT("%s: %u Mbps %s duplex, port %2d, queue %2d\n", - if_name(ifp), link_info.s.speed, - (link_info.s.full_duplex) ? "Full" : "Half", - priv->port, priv->queue); - } else { - if_link_state_change(ifp, LINK_STATE_DOWN); - DEBUGPRINT("%s: Link down\n", if_name(ifp)); - } - priv->need_link_update = 0; -} - -/** - * Periodic timer tick for slow management operations - * - * @param arg Device to check - */ -static void cvm_do_timer(void *arg) -{ - static int port; - static int updated; - if (port < CVMX_PIP_NUM_INPUT_PORTS) { - if (cvm_oct_device[port]) { - int queues_per_port; - int qos; - cvm_oct_private_t *priv = (cvm_oct_private_t *)cvm_oct_device[port]->if_softc; - - cvm_oct_common_poll(priv->ifp); - if (priv->need_link_update) { - updated++; - taskqueue_enqueue(cvm_oct_link_taskq, &priv->link_task); - } - - queues_per_port = cvmx_pko_get_num_queues(port); - /* Drain any pending packets in the free list */ - for (qos = 0; qos < queues_per_port; qos++) { - if (_IF_QLEN(&priv->tx_free_queue[qos]) > 0) { - IF_LOCK(&priv->tx_free_queue[qos]); - while (_IF_QLEN(&priv->tx_free_queue[qos]) > cvmx_fau_fetch_and_add32(priv->fau+qos*4, 0)) { - struct mbuf *m; - - _IF_DEQUEUE(&priv->tx_free_queue[qos], m); - m_freem(m); - } - IF_UNLOCK(&priv->tx_free_queue[qos]); - - /* - * XXX locking! - */ - priv->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; - } - } - } - port++; - /* Poll the next port in a 50th of a second. - This spreads the polling of ports out a little bit */ - callout_reset(&cvm_oct_poll_timer, hz / 50, cvm_do_timer, NULL); - } else { - port = 0; - /* If any updates were made in this run, continue iterating at - * 1/50th of a second, so that if a link has merely gone down - * temporarily (e.g. because of interface reinitialization) it - * will not be forced to stay down for an entire second. - */ - if (updated > 0) { - updated = 0; - callout_reset(&cvm_oct_poll_timer, hz / 50, cvm_do_timer, NULL); - } else { - /* All ports have been polled. Start the next iteration through - the ports in one second */ - callout_reset(&cvm_oct_poll_timer, hz, cvm_do_timer, NULL); - } - } -} - -/** - * Configure common hardware for all interfaces - */ -static void cvm_oct_configure_common_hw(device_t bus) -{ - struct octebus_softc *sc; - int pko_queues; - int error; - int rid; - - sc = device_get_softc(bus); - - /* Setup the FPA */ - cvmx_fpa_enable(); - cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE, - num_packet_buffers); - cvm_oct_mem_fill_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE, - num_packet_buffers); - if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL) { - /* - * If the FPA uses different pools for output buffers and - * packets, size the output buffer pool based on the number - * of PKO queues. - */ - if (OCTEON_IS_MODEL(OCTEON_CN38XX)) - pko_queues = 128; - else if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) - pko_queues = 32; - else if (OCTEON_IS_MODEL(OCTEON_CN50XX)) - pko_queues = 32; - else - pko_queues = 256; - - cvm_oct_num_output_buffers = 4 * pko_queues; - cvm_oct_mem_fill_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL, - CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, - cvm_oct_num_output_buffers); - } - - if (USE_RED) - cvmx_helper_setup_red(num_packet_buffers/4, - num_packet_buffers/8); - - /* Enable the MII interface */ - if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) - cvmx_write_csr(CVMX_SMI_EN, 1); - - /* Register an IRQ hander for to receive POW interrupts */ - rid = 0; - sc->sc_rx_irq = bus_alloc_resource(bus, SYS_RES_IRQ, &rid, - OCTEON_IRQ_WORKQ0 + pow_receive_group, - OCTEON_IRQ_WORKQ0 + pow_receive_group, - 1, RF_ACTIVE); - if (sc->sc_rx_irq == NULL) { - device_printf(bus, "could not allocate workq irq"); - return; - } - - error = bus_setup_intr(bus, sc->sc_rx_irq, INTR_TYPE_NET | INTR_MPSAFE, - cvm_oct_do_interrupt, NULL, cvm_oct_device, - &sc->sc_rx_intr_cookie); - if (error != 0) { - device_printf(bus, "could not setup workq irq"); - return; - } - -#ifdef SMP - { - cvmx_ciu_intx0_t en; - int core; - - CPU_FOREACH(core) { - if (core == PCPU_GET(cpuid)) - continue; - - en.u64 = cvmx_read_csr(CVMX_CIU_INTX_EN0(core*2)); - en.s.workq |= (1<word2.s.bufs; - cvmx_buf_ptr_t segment_ptr = work->packet_ptr; - - while (segments--) { - cvmx_buf_ptr_t next_ptr = *(cvmx_buf_ptr_t *)cvmx_phys_to_ptr(segment_ptr.s.addr-8); - if (__predict_false(!segment_ptr.s.i)) - cvmx_fpa_free(cvm_oct_get_buffer_ptr(segment_ptr), segment_ptr.s.pool, DONT_WRITEBACK(CVMX_FPA_PACKET_POOL_SIZE/128)); - segment_ptr = next_ptr; - } - cvmx_fpa_free(work, CVMX_FPA_WQE_POOL, DONT_WRITEBACK(1)); - - return 0; -} - -/** - * Module/ driver initialization. Creates the linux network - * devices. - * - * @return Zero on success - */ -int cvm_oct_init_module(device_t bus) -{ - device_t dev; - int ifnum; - int num_interfaces; - int interface; - int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE; - int qos; - - cvm_oct_rx_initialize(); - cvm_oct_configure_common_hw(bus); - - cvmx_helper_initialize_packet_io_global(); - - /* Change the input group for all ports before input is enabled */ - num_interfaces = cvmx_helper_get_number_of_interfaces(); - for (interface = 0; interface < num_interfaces; interface++) { - int num_ports = cvmx_helper_ports_on_interface(interface); - int port; - - for (port = 0; port < num_ports; port++) { - cvmx_pip_prt_tagx_t pip_prt_tagx; - int pkind = cvmx_helper_get_ipd_port(interface, port); - - pip_prt_tagx.u64 = cvmx_read_csr(CVMX_PIP_PRT_TAGX(pkind)); - pip_prt_tagx.s.grp = pow_receive_group; - cvmx_write_csr(CVMX_PIP_PRT_TAGX(pkind), pip_prt_tagx.u64); - } - } - - cvmx_helper_ipd_and_packet_input_enable(); - - memset(cvm_oct_device, 0, sizeof(cvm_oct_device)); - - cvm_oct_link_taskq = taskqueue_create("octe link", M_NOWAIT, - taskqueue_thread_enqueue, &cvm_oct_link_taskq); - taskqueue_start_threads(&cvm_oct_link_taskq, 1, PI_NET, - "octe link taskq"); - - /* Initialize the FAU used for counting packet buffers that need to be freed */ - cvmx_fau_atomic_write32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0); - - ifnum = 0; - num_interfaces = cvmx_helper_get_number_of_interfaces(); - for (interface = 0; interface < num_interfaces; interface++) { - cvmx_helper_interface_mode_t imode = cvmx_helper_interface_get_mode(interface); - int num_ports = cvmx_helper_ports_on_interface(interface); - int port; - - for (port = cvmx_helper_get_ipd_port(interface, 0); - port < cvmx_helper_get_ipd_port(interface, num_ports); - ifnum++, port++) { - cvm_oct_private_t *priv; - struct ifnet *ifp; - - dev = BUS_ADD_CHILD(bus, 0, "octe", ifnum); - if (dev != NULL) - ifp = if_alloc(IFT_ETHER); - if (dev == NULL || ifp == NULL) { - printf("Failed to allocate ethernet device for interface %d port %d\n", interface, port); - continue; - } - - /* Initialize the device private structure. */ - device_probe(dev); - priv = device_get_softc(dev); - priv->dev = dev; - priv->ifp = ifp; - priv->imode = imode; - priv->port = port; - priv->queue = cvmx_pko_get_base_queue(priv->port); - priv->fau = fau - cvmx_pko_get_num_queues(port) * 4; - for (qos = 0; qos < cvmx_pko_get_num_queues(port); qos++) - cvmx_fau_atomic_write32(priv->fau+qos*4, 0); - TASK_INIT(&priv->link_task, 0, cvm_oct_update_link, priv); - - switch (priv->imode) { - /* These types don't support ports to IPD/PKO */ - case CVMX_HELPER_INTERFACE_MODE_DISABLED: - case CVMX_HELPER_INTERFACE_MODE_PCIE: - case CVMX_HELPER_INTERFACE_MODE_PICMG: - break; - - case CVMX_HELPER_INTERFACE_MODE_NPI: - priv->init = cvm_oct_common_init; - priv->uninit = cvm_oct_common_uninit; - device_set_desc(dev, "Cavium Octeon NPI Ethernet"); - break; - - case CVMX_HELPER_INTERFACE_MODE_XAUI: - priv->init = cvm_oct_xaui_init; - priv->uninit = cvm_oct_common_uninit; - device_set_desc(dev, "Cavium Octeon XAUI Ethernet"); - break; - - case CVMX_HELPER_INTERFACE_MODE_LOOP: - priv->init = cvm_oct_common_init; - priv->uninit = cvm_oct_common_uninit; - device_set_desc(dev, "Cavium Octeon LOOP Ethernet"); - break; - - case CVMX_HELPER_INTERFACE_MODE_SGMII: - priv->init = cvm_oct_sgmii_init; - priv->uninit = cvm_oct_common_uninit; - device_set_desc(dev, "Cavium Octeon SGMII Ethernet"); - break; - - case CVMX_HELPER_INTERFACE_MODE_SPI: - priv->init = cvm_oct_spi_init; - priv->uninit = cvm_oct_spi_uninit; - device_set_desc(dev, "Cavium Octeon SPI Ethernet"); - break; - - case CVMX_HELPER_INTERFACE_MODE_RGMII: - priv->init = cvm_oct_rgmii_init; - priv->uninit = cvm_oct_rgmii_uninit; - device_set_desc(dev, "Cavium Octeon RGMII Ethernet"); - break; - - case CVMX_HELPER_INTERFACE_MODE_GMII: - priv->init = cvm_oct_rgmii_init; - priv->uninit = cvm_oct_rgmii_uninit; - device_set_desc(dev, "Cavium Octeon GMII Ethernet"); - break; - } - - ifp->if_softc = priv; - - if (!priv->init) { - printf("octe%d: unsupported device type interface %d, port %d\n", - ifnum, interface, priv->port); - if_free(ifp); - } else if (priv->init(ifp) != 0) { - printf("octe%d: failed to register device for interface %d, port %d\n", - ifnum, interface, priv->port); - if_free(ifp); - } else { - cvm_oct_device[priv->port] = ifp; - fau -= cvmx_pko_get_num_queues(priv->port) * sizeof(uint32_t); - } - } - } - - if (INTERRUPT_LIMIT) { - /* Set the POW timer rate to give an interrupt at most INTERRUPT_LIMIT times per second */ - cvmx_write_csr(CVMX_POW_WQ_INT_PC, cvmx_clock_get_rate(CVMX_CLOCK_CORE)/((INTERRUPT_LIMIT+1)*16*256)<<8); - - /* Enable POW timer interrupt. It will count when there are packets available */ - cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0x1ful<<24); - } else { - /* Enable POW interrupt when our port has at least one packet */ - cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0x1001); - } - - callout_init(&cvm_oct_poll_timer, 1); - callout_reset(&cvm_oct_poll_timer, hz, cvm_do_timer, NULL); - - return 0; -} - -/** - * Module / driver shutdown - * - * @return Zero on success - */ -void cvm_oct_cleanup_module(device_t bus) -{ - int port; - struct octebus_softc *sc = device_get_softc(bus); - - /* Disable POW interrupt */ - cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0); - - /* Free the interrupt handler */ - bus_teardown_intr(bus, sc->sc_rx_irq, sc->sc_rx_intr_cookie); - - callout_stop(&cvm_oct_poll_timer); - cvm_oct_rx_shutdown(); - - cvmx_helper_shutdown_packet_io_global(); - - /* Free the ethernet devices */ - for (port = 0; port < TOTAL_NUMBER_OF_PORTS; port++) { - if (cvm_oct_device[port]) { - cvm_oct_tx_shutdown(cvm_oct_device[port]); -#if 0 - unregister_netdev(cvm_oct_device[port]); - kfree(cvm_oct_device[port]); -#else - panic("%s: need to detach and free interface.", __func__); -#endif - cvm_oct_device[port] = NULL; - } - } - /* Free the HW pools */ - cvm_oct_mem_empty_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE, num_packet_buffers); - cvm_oct_mem_empty_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE, num_packet_buffers); - - if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL) - cvm_oct_mem_empty_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL, CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, cvm_oct_num_output_buffers); - - /* Disable FPA, all buffers are free, not done by helper shutdown. */ - cvmx_fpa_disable(); -} diff --git a/sys/mips/cavium/octe/mv88e61xxphy.c b/sys/mips/cavium/octe/mv88e61xxphy.c deleted file mode 100644 index ed159fade7c..00000000000 --- a/sys/mips/cavium/octe/mv88e61xxphy.c +++ /dev/null @@ -1,627 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -/* - * Driver for the Marvell 88E61xx family of switch PHYs - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "miibus_if.h" - -#include "mv88e61xxphyreg.h" - -struct mv88e61xxphy_softc; - -struct mv88e61xxphy_port_softc { - struct mv88e61xxphy_softc *sc_switch; - unsigned sc_port; - unsigned sc_domain; - unsigned sc_vlan; - unsigned sc_priority; - unsigned sc_flags; -}; - -#define MV88E61XXPHY_PORT_FLAG_VTU_UPDATE (0x0001) - -struct mv88e61xxphy_softc { - device_t sc_dev; - struct mv88e61xxphy_port_softc sc_ports[MV88E61XX_PORTS]; -}; - -enum mv88e61xxphy_vtu_membership_type { - MV88E61XXPHY_VTU_UNMODIFIED, - MV88E61XXPHY_VTU_UNTAGGED, - MV88E61XXPHY_VTU_TAGGED, - MV88E61XXPHY_VTU_DISCARDED, -}; - -enum mv88e61xxphy_sysctl_link_type { - MV88E61XXPHY_LINK_SYSCTL_DUPLEX, - MV88E61XXPHY_LINK_SYSCTL_LINK, - MV88E61XXPHY_LINK_SYSCTL_MEDIA, -}; - -enum mv88e61xxphy_sysctl_port_type { - MV88E61XXPHY_PORT_SYSCTL_DOMAIN, - MV88E61XXPHY_PORT_SYSCTL_VLAN, - MV88E61XXPHY_PORT_SYSCTL_PRIORITY, -}; - -/* - * Register access macros. - */ -#define MV88E61XX_READ(sc, phy, reg) \ - MIIBUS_READREG(device_get_parent((sc)->sc_dev), (phy), (reg)) - -#define MV88E61XX_WRITE(sc, phy, reg, val) \ - MIIBUS_WRITEREG(device_get_parent((sc)->sc_dev), (phy), (reg), (val)) - -#define MV88E61XX_READ_PORT(psc, reg) \ - MV88E61XX_READ((psc)->sc_switch, MV88E61XX_PORT((psc)->sc_port), (reg)) - -#define MV88E61XX_WRITE_PORT(psc, reg, val) \ - MV88E61XX_WRITE((psc)->sc_switch, MV88E61XX_PORT((psc)->sc_port), (reg), (val)) - -static int mv88e61xxphy_probe(device_t); -static int mv88e61xxphy_attach(device_t); - -static void mv88e61xxphy_init(struct mv88e61xxphy_softc *); -static void mv88e61xxphy_init_port(struct mv88e61xxphy_port_softc *); -static void mv88e61xxphy_init_vtu(struct mv88e61xxphy_softc *); -static int mv88e61xxphy_sysctl_link_proc(SYSCTL_HANDLER_ARGS); -static int mv88e61xxphy_sysctl_port_proc(SYSCTL_HANDLER_ARGS); -static void mv88e61xxphy_vtu_load(struct mv88e61xxphy_softc *, uint16_t); -static void mv88e61xxphy_vtu_set_membership(struct mv88e61xxphy_softc *, unsigned, enum mv88e61xxphy_vtu_membership_type); -static void mv88e61xxphy_vtu_wait(struct mv88e61xxphy_softc *); - -static int -mv88e61xxphy_probe(device_t dev) -{ - uint16_t val; - - val = MIIBUS_READREG(device_get_parent(dev), MV88E61XX_PORT(0), - MV88E61XX_PORT_REVISION); - switch (val >> 4) { - case 0x121: - device_set_desc(dev, "Marvell Link Street 88E6123 3-Port Gigabit Switch"); - return (0); - case 0x161: - device_set_desc(dev, "Marvell Link Street 88E6161 6-Port Gigabit Switch"); - return (0); - case 0x165: - device_set_desc(dev, "Marvell Link Street 88E6161 6-Port Advanced Gigabit Switch"); - return (0); - default: - return (ENXIO); - } -} - -static int -mv88e61xxphy_attach(device_t dev) -{ - char portbuf[] = "N"; - struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(dev); - struct sysctl_oid *tree = device_get_sysctl_tree(dev); - struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree); - struct sysctl_oid *port_node, *portN_node; - struct sysctl_oid_list *port_tree, *portN_tree; - struct mv88e61xxphy_softc *sc; - unsigned port; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - - /* - * Initialize port softcs. - */ - for (port = 0; port < MV88E61XX_PORTS; port++) { - struct mv88e61xxphy_port_softc *psc; - - psc = &sc->sc_ports[port]; - psc->sc_switch = sc; - psc->sc_port = port; - psc->sc_domain = 0; /* One broadcast domain by default. */ - psc->sc_vlan = port + 1; /* Tag VLANs by default. */ - psc->sc_priority = 0; /* No default special priority. */ - psc->sc_flags = 0; - } - - /* - * Add per-port sysctl tree/handlers. - */ - port_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "port", - CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Switch Ports"); - port_tree = SYSCTL_CHILDREN(port_node); - for (port = 0; port < MV88E61XX_PORTS; port++) { - struct mv88e61xxphy_port_softc *psc; - - psc = &sc->sc_ports[port]; - - portbuf[0] = '0' + port; - portN_node = SYSCTL_ADD_NODE(ctx, port_tree, OID_AUTO, portbuf, - CTLFLAG_RD | CTLFLAG_MPSAFE, NULL, "Switch Port"); - portN_tree = SYSCTL_CHILDREN(portN_node); - - SYSCTL_ADD_PROC(ctx, portN_tree, OID_AUTO, "duplex", - CTLFLAG_RD | CTLTYPE_INT | CTLFLAG_NEEDGIANT, psc, - MV88E61XXPHY_LINK_SYSCTL_DUPLEX, - mv88e61xxphy_sysctl_link_proc, "IU", - "Media duplex status (0 = half duplex; 1 = full duplex)"); - - SYSCTL_ADD_PROC(ctx, portN_tree, OID_AUTO, "link", - CTLFLAG_RD | CTLTYPE_INT | CTLFLAG_NEEDGIANT, psc, - MV88E61XXPHY_LINK_SYSCTL_LINK, - mv88e61xxphy_sysctl_link_proc, "IU", - "Link status (0 = down; 1 = up)"); - - SYSCTL_ADD_PROC(ctx, portN_tree, OID_AUTO, "media", - CTLFLAG_RD | CTLTYPE_INT | CTLFLAG_NEEDGIANT, psc, - MV88E61XXPHY_LINK_SYSCTL_MEDIA, - mv88e61xxphy_sysctl_link_proc, "IU", - "Media speed (0 = unknown; 10 = 10Mbps; 100 = 100Mbps; 1000 = 1Gbps)"); - - SYSCTL_ADD_PROC(ctx, portN_tree, OID_AUTO, "domain", - CTLFLAG_RW | CTLTYPE_INT | CTLFLAG_NEEDGIANT, psc, - MV88E61XXPHY_PORT_SYSCTL_DOMAIN, - mv88e61xxphy_sysctl_port_proc, "IU", - "Broadcast domain (ports can only talk to other ports in the same domain)"); - - SYSCTL_ADD_PROC(ctx, portN_tree, OID_AUTO, "vlan", - CTLFLAG_RW | CTLTYPE_INT | CTLFLAG_NEEDGIANT, psc, - MV88E61XXPHY_PORT_SYSCTL_VLAN, - mv88e61xxphy_sysctl_port_proc, "IU", - "Tag packets from/for this port with a given VLAN."); - - SYSCTL_ADD_PROC(ctx, portN_tree, OID_AUTO, "priority", - CTLFLAG_RW | CTLTYPE_INT | CTLFLAG_NEEDGIANT, psc, - MV88E61XXPHY_PORT_SYSCTL_PRIORITY, - mv88e61xxphy_sysctl_port_proc, "IU", - "Default packet priority for this port."); - } - - mv88e61xxphy_init(sc); - - return (0); -} - -static void -mv88e61xxphy_init(struct mv88e61xxphy_softc *sc) -{ - unsigned port; - uint16_t val; - unsigned i; - - /* Disable all ports. */ - for (port = 0; port < MV88E61XX_PORTS; port++) { - struct mv88e61xxphy_port_softc *psc; - - psc = &sc->sc_ports[port]; - - val = MV88E61XX_READ_PORT(psc, MV88E61XX_PORT_CONTROL); - val &= ~0x3; - MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL, val); - } - - DELAY(2000); - - /* Reset the switch. */ - MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_CONTROL, 0xc400); - for (i = 0; i < 100; i++) { - val = MV88E61XX_READ(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_STATUS); - if ((val & 0xc800) == 0xc800) - break; - DELAY(10); - } - if (i == 100) { - device_printf(sc->sc_dev, "%s: switch reset timed out.\n", __func__); - return; - } - - /* Disable PPU. */ - MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_CONTROL, 0x0000); - - /* Configure host port and send monitor frames to it. */ - MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_MONITOR, - (MV88E61XX_HOST_PORT << 12) | (MV88E61XX_HOST_PORT << 8) | - (MV88E61XX_HOST_PORT << 4)); - - /* Disable remote management. */ - MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_REMOTE_MGMT, 0x0000); - - /* Send all specifically-addressed frames to the host port. */ - MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL2, MV88E61XX_GLOBAL2_MANAGE_2X, 0xffff); - MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL2, MV88E61XX_GLOBAL2_MANAGE_0X, 0xffff); - - /* Remove provider-supplied tag and use it for switching. */ - MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL2, MV88E61XX_GLOBAL2_CONTROL2, - MV88E61XX_GLOBAL2_CONTROL2_REMOVE_PTAG); - - /* Configure all ports. */ - for (port = 0; port < MV88E61XX_PORTS; port++) { - struct mv88e61xxphy_port_softc *psc; - - psc = &sc->sc_ports[port]; - mv88e61xxphy_init_port(psc); - } - - /* Reprogram VLAN table (VTU.) */ - mv88e61xxphy_init_vtu(sc); - - /* Enable all ports. */ - for (port = 0; port < MV88E61XX_PORTS; port++) { - struct mv88e61xxphy_port_softc *psc; - - psc = &sc->sc_ports[port]; - - val = MV88E61XX_READ_PORT(psc, MV88E61XX_PORT_CONTROL); - val |= 0x3; - MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL, val); - } -} - -static void -mv88e61xxphy_init_port(struct mv88e61xxphy_port_softc *psc) -{ - struct mv88e61xxphy_softc *sc; - unsigned allow_mask; - - sc = psc->sc_switch; - - /* Set media type and flow control. */ - if (psc->sc_port != MV88E61XX_HOST_PORT) { - /* Don't force any media type or flow control. */ - MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_FORCE_MAC, 0x0003); - } else { - /* Make CPU port 1G FDX. */ - MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_FORCE_MAC, 0x003e); - } - - /* Don't limit flow control pauses. */ - MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_PAUSE_CONTROL, 0x0000); - - /* Set various port functions per Linux. */ - if (psc->sc_port != MV88E61XX_HOST_PORT) { - MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL, 0x04bc); - } else { - /* - * Send frames for unknown unicast and multicast groups to - * host, too. - */ - MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL, 0x063f); - } - - if (psc->sc_port != MV88E61XX_HOST_PORT) { - /* Disable trunking. */ - MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL2, 0x0000); - } else { - /* Disable trunking and send learn messages to host. */ - MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_CONTROL2, 0x8000); - } - - /* - * Port-based VLAN map; isolates MAC tables and forces ports to talk - * only to the host. - * - * Always allow the host to send to all ports and allow all ports to - * send to the host. - */ - if (psc->sc_port != MV88E61XX_HOST_PORT) { - allow_mask = 1 << MV88E61XX_HOST_PORT; - } else { - allow_mask = (1 << MV88E61XX_PORTS) - 1; - allow_mask &= ~(1 << MV88E61XX_HOST_PORT); - } - MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_VLAN_MAP, - (psc->sc_domain << 12) | allow_mask); - - /* VLAN tagging. Set default priority and VLAN tag (or none.) */ - MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_VLAN, - (psc->sc_priority << 14) | psc->sc_vlan); - - if (psc->sc_port == MV88E61XX_HOST_PORT) { - /* Set provider ingress tag. */ - MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_PROVIDER_PROTO, - ETHERTYPE_VLAN); - - /* Set provider egress tag. */ - MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_ETHER_PROTO, - ETHERTYPE_VLAN); - - /* Use secure 802.1q mode and accept only tagged frames. */ - MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_FILTER, - MV88E61XX_PORT_FILTER_MAP_DEST | - MV88E61XX_PORT_FILTER_8021Q_SECURE | - MV88E61XX_PORT_FILTER_DISCARD_UNTAGGED); - } else { - /* Don't allow tagged frames. */ - MV88E61XX_WRITE_PORT(psc, MV88E61XX_PORT_FILTER, - MV88E61XX_PORT_FILTER_MAP_DEST | - MV88E61XX_PORT_FILTER_DISCARD_TAGGED); - } -} - -static void -mv88e61xxphy_init_vtu(struct mv88e61xxphy_softc *sc) -{ - unsigned port; - - /* - * Start flush of the VTU. - */ - mv88e61xxphy_vtu_wait(sc); - MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_VTU_OP, - MV88E61XX_GLOBAL_VTU_OP_BUSY | MV88E61XX_GLOBAL_VTU_OP_OP_FLUSH); - - /* - * Queue each port's VLAN to be programmed. - */ - for (port = 0; port < MV88E61XX_PORTS; port++) { - struct mv88e61xxphy_port_softc *psc; - - psc = &sc->sc_ports[port]; - psc->sc_flags &= ~MV88E61XXPHY_PORT_FLAG_VTU_UPDATE; - if (psc->sc_vlan == 0) - continue; - psc->sc_flags |= MV88E61XXPHY_PORT_FLAG_VTU_UPDATE; - } - - /* - * Program each VLAN that is in use. - */ - for (port = 0; port < MV88E61XX_PORTS; port++) { - struct mv88e61xxphy_port_softc *psc; - - psc = &sc->sc_ports[port]; - if ((psc->sc_flags & MV88E61XXPHY_PORT_FLAG_VTU_UPDATE) == 0) - continue; - mv88e61xxphy_vtu_load(sc, psc->sc_vlan); - } - - /* - * Wait for last pending VTU operation to complete. - */ - mv88e61xxphy_vtu_wait(sc); -} - -static int -mv88e61xxphy_sysctl_link_proc(SYSCTL_HANDLER_ARGS) -{ - struct mv88e61xxphy_port_softc *psc = arg1; - enum mv88e61xxphy_sysctl_link_type type = arg2; - uint16_t val; - unsigned out; - - val = MV88E61XX_READ_PORT(psc, MV88E61XX_PORT_STATUS); - switch (type) { - case MV88E61XXPHY_LINK_SYSCTL_DUPLEX: - if ((val & MV88E61XX_PORT_STATUS_DUPLEX) != 0) - out = 1; - else - out = 0; - break; - case MV88E61XXPHY_LINK_SYSCTL_LINK: - if ((val & MV88E61XX_PORT_STATUS_LINK) != 0) - out = 1; - else - out = 0; - break; - case MV88E61XXPHY_LINK_SYSCTL_MEDIA: - switch (val & MV88E61XX_PORT_STATUS_MEDIA) { - case MV88E61XX_PORT_STATUS_MEDIA_10M: - out = 10; - break; - case MV88E61XX_PORT_STATUS_MEDIA_100M: - out = 100; - break; - case MV88E61XX_PORT_STATUS_MEDIA_1G: - out = 1000; - break; - default: - out = 0; - break; - } - break; - default: - return (EINVAL); - } - return (sysctl_handle_int(oidp, NULL, out, req)); -} - -static int -mv88e61xxphy_sysctl_port_proc(SYSCTL_HANDLER_ARGS) -{ - struct mv88e61xxphy_port_softc *psc = arg1; - enum mv88e61xxphy_sysctl_port_type type = arg2; - struct mv88e61xxphy_softc *sc = psc->sc_switch; - unsigned max, val, *valp; - int error; - - switch (type) { - case MV88E61XXPHY_PORT_SYSCTL_DOMAIN: - valp = &psc->sc_domain; - max = 0xf; - break; - case MV88E61XXPHY_PORT_SYSCTL_VLAN: - valp = &psc->sc_vlan; - max = 0x1000; - break; - case MV88E61XXPHY_PORT_SYSCTL_PRIORITY: - valp = &psc->sc_priority; - max = 3; - break; - default: - return (EINVAL); - } - - val = *valp; - error = sysctl_handle_int(oidp, &val, 0, req); - if (error != 0 || req->newptr == NULL) - return (error); - - /* Bounds check value. */ - if (val >= max) - return (EINVAL); - - /* Reinitialize switch with new value. */ - *valp = val; - mv88e61xxphy_init(sc); - - return (0); -} - -static void -mv88e61xxphy_vtu_load(struct mv88e61xxphy_softc *sc, uint16_t vid) -{ - unsigned port; - - /* - * Wait for previous operation to complete. - */ - mv88e61xxphy_vtu_wait(sc); - - /* - * Set VID. - */ - MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_VTU_VID, - MV88E61XX_GLOBAL_VTU_VID_VALID | vid); - - /* - * Add ports to this VTU. - */ - for (port = 0; port < MV88E61XX_PORTS; port++) { - struct mv88e61xxphy_port_softc *psc; - - psc = &sc->sc_ports[port]; - if (psc->sc_vlan == vid) { - /* - * Send this port its VLAN traffic untagged. - */ - psc->sc_flags &= ~MV88E61XXPHY_PORT_FLAG_VTU_UPDATE; - mv88e61xxphy_vtu_set_membership(sc, port, MV88E61XXPHY_VTU_UNTAGGED); - } else if (psc->sc_port == MV88E61XX_HOST_PORT) { - /* - * The host sees all VLANs tagged. - */ - mv88e61xxphy_vtu_set_membership(sc, port, MV88E61XXPHY_VTU_TAGGED); - } else { - /* - * This port isn't on this VLAN. - */ - mv88e61xxphy_vtu_set_membership(sc, port, MV88E61XXPHY_VTU_DISCARDED); - } - } - - /* - * Start adding this entry. - */ - MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_VTU_OP, - MV88E61XX_GLOBAL_VTU_OP_BUSY | - MV88E61XX_GLOBAL_VTU_OP_OP_VTU_LOAD); -} - -static void -mv88e61xxphy_vtu_set_membership(struct mv88e61xxphy_softc *sc, unsigned port, - enum mv88e61xxphy_vtu_membership_type type) -{ - unsigned shift, reg; - uint16_t bits; - uint16_t val; - - switch (type) { - case MV88E61XXPHY_VTU_UNMODIFIED: - bits = 0; - break; - case MV88E61XXPHY_VTU_UNTAGGED: - bits = 1; - break; - case MV88E61XXPHY_VTU_TAGGED: - bits = 2; - break; - case MV88E61XXPHY_VTU_DISCARDED: - bits = 3; - break; - default: - return; - } - - if (port < 4) { - reg = MV88E61XX_GLOBAL_VTU_DATA_P0P3; - shift = port * 4; - } else { - reg = MV88E61XX_GLOBAL_VTU_DATA_P4P5; - shift = (port - 4) * 4; - } - - val = MV88E61XX_READ(sc, MV88E61XX_GLOBAL, reg); - val |= bits << shift; - MV88E61XX_WRITE(sc, MV88E61XX_GLOBAL, reg, val); -} - -static void -mv88e61xxphy_vtu_wait(struct mv88e61xxphy_softc *sc) -{ - uint16_t val; - - for (;;) { - val = MV88E61XX_READ(sc, MV88E61XX_GLOBAL, MV88E61XX_GLOBAL_VTU_OP); - if ((val & MV88E61XX_GLOBAL_VTU_OP_BUSY) == 0) - return; - } -} - -static device_method_t mv88e61xxphy_methods[] = { - /* device interface */ - DEVMETHOD(device_probe, mv88e61xxphy_probe), - DEVMETHOD(device_attach, mv88e61xxphy_attach), - DEVMETHOD(device_detach, bus_generic_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - { 0, 0 } -}; - -static devclass_t mv88e61xxphy_devclass; - -static driver_t mv88e61xxphy_driver = { - "mv88e61xxphy", - mv88e61xxphy_methods, - sizeof(struct mv88e61xxphy_softc) -}; - -DRIVER_MODULE(mv88e61xxphy, octe, mv88e61xxphy_driver, mv88e61xxphy_devclass, 0, 0); diff --git a/sys/mips/cavium/octe/mv88e61xxphyreg.h b/sys/mips/cavium/octe/mv88e61xxphyreg.h deleted file mode 100644 index 00130495df2..00000000000 --- a/sys/mips/cavium/octe/mv88e61xxphyreg.h +++ /dev/null @@ -1,149 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Register definitions for Marvell MV88E61XX - * - * Note that names and definitions were gleaned from Linux and U-Boot patches - * released by Marvell, often by looking at contextual use of the registers - * involved, and may not be representative of the full functionality of those - * registers and are certainly not an exhaustive enumeration of registers. - * - * For an exhaustive enumeration of registers, check out the QD-DSDT package - * included in the Marvell ARM Feroceon Board Support Package for Linux. - */ - -#ifndef _MIPS_CAVIUM_OCTE_MV88E61XXPHYREG_H_ -#define _MIPS_CAVIUM_OCTE_MV88E61XXPHYREG_H_ - -/* - * Port addresses & per-port registers. - */ -#define MV88E61XX_PORT(x) (0x10 + (x)) -#define MV88E61XX_HOST_PORT (5) -#define MV88E61XX_PORTS (6) - -#define MV88E61XX_PORT_STATUS (0x00) -#define MV88E61XX_PORT_FORCE_MAC (0x01) -#define MV88E61XX_PORT_PAUSE_CONTROL (0x02) -#define MV88E61XX_PORT_REVISION (0x03) -#define MV88E61XX_PORT_CONTROL (0x04) -#define MV88E61XX_PORT_CONTROL2 (0x05) -#define MV88E61XX_PORT_VLAN_MAP (0x06) -#define MV88E61XX_PORT_VLAN (0x07) -#define MV88E61XX_PORT_FILTER (0x08) -#define MV88E61XX_PORT_EGRESS_CONTROL (0x09) -#define MV88E61XX_PORT_EGRESS_CONTROL2 (0x0a) -#define MV88E61XX_PORT_PORT_LEARN (0x0b) -#define MV88E61XX_PORT_ATU_CONTROL (0x0c) -#define MV88E61XX_PORT_PRIORITY_CONTROL (0x0d) -#define MV88E61XX_PORT_ETHER_PROTO (0x0f) -#define MV88E61XX_PORT_PROVIDER_PROTO (0x1a) -#define MV88E61XX_PORT_PRIORITY_MAP (0x18) -#define MV88E61XX_PORT_PRIORITY_MAP2 (0x19) - -/* - * Fields and values in each register. - */ -#define MV88E61XX_PORT_STATUS_MEDIA (0x0300) -#define MV88E61XX_PORT_STATUS_MEDIA_10M (0x0000) -#define MV88E61XX_PORT_STATUS_MEDIA_100M (0x0100) -#define MV88E61XX_PORT_STATUS_MEDIA_1G (0x0200) -#define MV88E61XX_PORT_STATUS_DUPLEX (0x0400) -#define MV88E61XX_PORT_STATUS_LINK (0x0800) -#define MV88E61XX_PORT_STATUS_FC (0x8000) - -#define MV88E61XX_PORT_CONTROL_DOUBLE_TAG (0x0200) - -#define MV88E61XX_PORT_FILTER_MAP_DEST (0x0080) -#define MV88E61XX_PORT_FILTER_DISCARD_UNTAGGED (0x0100) -#define MV88E61XX_PORT_FILTER_DISCARD_TAGGED (0x0200) -#define MV88E61XX_PORT_FILTER_8021Q_MODE (0x0c00) -#define MV88E61XX_PORT_FILTER_8021Q_DISABLED (0x0000) -#define MV88E61XX_PORT_FILTER_8021Q_FALLBACK (0x0400) -#define MV88E61XX_PORT_FILTER_8021Q_CHECK (0x0800) -#define MV88E61XX_PORT_FILTER_8021Q_SECURE (0x0c00) - -/* - * Global address & global registers. - */ -#define MV88E61XX_GLOBAL (0x1b) - -#define MV88E61XX_GLOBAL_STATUS (0x00) -#define MV88E61XX_GLOBAL_CONTROL (0x04) -#define MV88E61XX_GLOBAL_VTU_OP (0x05) -#define MV88E61XX_GLOBAL_VTU_VID (0x06) -#define MV88E61XX_GLOBAL_VTU_DATA_P0P3 (0x07) -#define MV88E61XX_GLOBAL_VTU_DATA_P4P5 (0x08) -#define MV88E61XX_GLOBAL_ATU_CONTROL (0x0a) -#define MV88E61XX_GLOBAL_PRIORITY_MAP (0x18) -#define MV88E61XX_GLOBAL_MONITOR (0x1a) -#define MV88E61XX_GLOBAL_REMOTE_MGMT (0x1c) -#define MV88E61XX_GLOBAL_STATS (0x1d) - -/* - * Fields and values in each register. - */ -#define MV88E61XX_GLOBAL_VTU_OP_BUSY (0x8000) -#define MV88E61XX_GLOBAL_VTU_OP_OP (0x7000) -#define MV88E61XX_GLOBAL_VTU_OP_OP_FLUSH (0x1000) -#define MV88E61XX_GLOBAL_VTU_OP_OP_VTU_LOAD (0x3000) - -#define MV88E61XX_GLOBAL_VTU_VID_VALID (0x1000) - -/* - * Second global address & second global registers. - */ -#define MV88E61XX_GLOBAL2 (0x1c) - -#define MV88E61XX_GLOBAL2_MANAGE_2X (0x02) -#define MV88E61XX_GLOBAL2_MANAGE_0X (0x03) -#define MV88E61XX_GLOBAL2_CONTROL2 (0x05) -#define MV88E61XX_GLOBAL2_TRUNK_MASK (0x07) -#define MV88E61XX_GLOBAL2_TRUNK_MAP (0x08) -#define MV88E61XX_GLOBAL2_RATELIMIT (0x09) -#define MV88E61XX_GLOBAL2_VLAN_CONTROL (0x0b) -#define MV88E61XX_GLOBAL2_MAC_ADDRESS (0x0d) - -/* - * Fields and values in each register. - */ -#define MV88E61XX_GLOBAL2_CONTROL2_DOUBLE_USE (0x8000) -#define MV88E61XX_GLOBAL2_CONTROL2_LOOP_PREVENT (0x4000) -#define MV88E61XX_GLOBAL2_CONTROL2_FLOW_MESSAGE (0x2000) -#define MV88E61XX_GLOBAL2_CONTROL2_FLOOD_BC (0x1000) -#define MV88E61XX_GLOBAL2_CONTROL2_REMOVE_PTAG (0x0800) -#define MV88E61XX_GLOBAL2_CONTROL2_AGE_INT (0x0400) -#define MV88E61XX_GLOBAL2_CONTROL2_FLOW_TAG (0x0200) -#define MV88E61XX_GLOBAL2_CONTROL2_ALWAYS_VTU (0x0100) -#define MV88E61XX_GLOBAL2_CONTROL2_FORCE_FC_PRI (0x0080) -#define MV88E61XX_GLOBAL2_CONTROL2_FC_PRI (0x0070) -#define MV88E61XX_GLOBAL2_CONTROL2_MGMT_TO_HOST (0x0008) -#define MV88E61XX_GLOBAL2_CONTROL2_MGMT_PRI (0x0007) - -#endif /* !_MIPS_CAVIUM_OCTE_MV88E61XXPHYREG_H_ */ diff --git a/sys/mips/cavium/octe/octe.c b/sys/mips/cavium/octe/octe.c deleted file mode 100644 index f5ed94c26a5..00000000000 --- a/sys/mips/cavium/octe/octe.c +++ /dev/null @@ -1,490 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Cavium Octeon Ethernet devices. - * - * XXX This file should be moved to if_octe.c - * XXX The driver may have sufficient locking but we need locking to protect - * the interfaces presented here, right? - */ - -#include "opt_inet.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef INET -#include -#include -#endif - -#include -#include - -#include "wrapper-cvmx-includes.h" -#include "cavium-ethernet.h" - -#include "ethernet-common.h" -#include "ethernet-defines.h" -#include "ethernet-mdio.h" -#include "ethernet-tx.h" - -#include "miibus_if.h" - -#define OCTE_TX_LOCK(priv) mtx_lock(&(priv)->tx_mtx) -#define OCTE_TX_UNLOCK(priv) mtx_unlock(&(priv)->tx_mtx) - -static int octe_probe(device_t); -static int octe_attach(device_t); -static int octe_detach(device_t); -static int octe_shutdown(device_t); - -static int octe_miibus_readreg(device_t, int, int); -static int octe_miibus_writereg(device_t, int, int, int); - -static void octe_init(void *); -static void octe_stop(void *); -static int octe_transmit(struct ifnet *, struct mbuf *); - -static int octe_mii_medchange(struct ifnet *); -static void octe_mii_medstat(struct ifnet *, struct ifmediareq *); - -static int octe_medchange(struct ifnet *); -static void octe_medstat(struct ifnet *, struct ifmediareq *); - -static int octe_ioctl(struct ifnet *, u_long, caddr_t); - -static device_method_t octe_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, octe_probe), - DEVMETHOD(device_attach, octe_attach), - DEVMETHOD(device_detach, octe_detach), - DEVMETHOD(device_shutdown, octe_shutdown), - - /* MII interface */ - DEVMETHOD(miibus_readreg, octe_miibus_readreg), - DEVMETHOD(miibus_writereg, octe_miibus_writereg), - { 0, 0 } -}; - -static driver_t octe_driver = { - "octe", - octe_methods, - sizeof (cvm_oct_private_t), -}; - -static devclass_t octe_devclass; - -DRIVER_MODULE(octe, octebus, octe_driver, octe_devclass, 0, 0); -DRIVER_MODULE(miibus, octe, miibus_driver, miibus_devclass, 0, 0); - -static int -octe_probe(device_t dev) -{ - return (0); -} - -static int -octe_attach(device_t dev) -{ - struct ifnet *ifp; - cvm_oct_private_t *priv; - device_t child; - unsigned qos; - int error; - - priv = device_get_softc(dev); - ifp = priv->ifp; - - if_initname(ifp, device_get_name(dev), device_get_unit(dev)); - - if (priv->phy_id != -1) { - if (priv->phy_device == NULL) { - error = mii_attach(dev, &priv->miibus, ifp, - octe_mii_medchange, octe_mii_medstat, - BMSR_DEFCAPMASK, priv->phy_id, MII_OFFSET_ANY, 0); - if (error != 0) - device_printf(dev, "attaching PHYs failed\n"); - } else { - child = device_add_child(dev, priv->phy_device, -1); - if (child == NULL) - device_printf(dev, "missing phy %u device %s\n", priv->phy_id, priv->phy_device); - } - } - - if (priv->miibus == NULL) { - ifmedia_init(&priv->media, 0, octe_medchange, octe_medstat); - - ifmedia_add(&priv->media, IFM_ETHER | IFM_AUTO, 0, NULL); - ifmedia_set(&priv->media, IFM_ETHER | IFM_AUTO); - } - - /* - * XXX - * We don't support programming the multicast filter right now, although it - * ought to be easy enough. (Presumably it's just a matter of putting - * multicast addresses in the CAM?) - */ - ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST | IFF_ALLMULTI; - ifp->if_init = octe_init; - ifp->if_ioctl = octe_ioctl; - - priv->if_flags = ifp->if_flags; - - mtx_init(&priv->tx_mtx, ifp->if_xname, "octe tx send queue", MTX_DEF); - - for (qos = 0; qos < 16; qos++) { - mtx_init(&priv->tx_free_queue[qos].ifq_mtx, ifp->if_xname, "octe tx free queue", MTX_DEF); - IFQ_SET_MAXLEN(&priv->tx_free_queue[qos], MAX_OUT_QUEUE_DEPTH); - } - - ether_ifattach(ifp, priv->mac); - - ifp->if_transmit = octe_transmit; - - ifp->if_hdrlen = sizeof(struct ether_vlan_header); - ifp->if_capabilities = IFCAP_VLAN_MTU | IFCAP_HWCSUM; - ifp->if_capenable = ifp->if_capabilities; - ifp->if_hwassist = CSUM_TCP | CSUM_UDP; - - OCTE_TX_LOCK(priv); - IFQ_SET_MAXLEN(&ifp->if_snd, MAX_OUT_QUEUE_DEPTH); - ifp->if_snd.ifq_drv_maxlen = MAX_OUT_QUEUE_DEPTH; - IFQ_SET_READY(&ifp->if_snd); - OCTE_TX_UNLOCK(priv); - - return (bus_generic_attach(dev)); -} - -static int -octe_detach(device_t dev) -{ - return (0); -} - -static int -octe_shutdown(device_t dev) -{ - return (octe_detach(dev)); -} - -static int -octe_miibus_readreg(device_t dev, int phy, int reg) -{ - cvm_oct_private_t *priv; - - priv = device_get_softc(dev); - - /* - * Try interface-specific MII routine. - */ - if (priv->mdio_read != NULL) - return (priv->mdio_read(priv->ifp, phy, reg)); - - /* - * Try generic MII routine. - */ - KASSERT(phy == priv->phy_id, - ("read from phy %u but our phy is %u", phy, priv->phy_id)); - return (cvm_oct_mdio_read(priv->ifp, phy, reg)); -} - -static int -octe_miibus_writereg(device_t dev, int phy, int reg, int val) -{ - cvm_oct_private_t *priv; - - priv = device_get_softc(dev); - - /* - * Try interface-specific MII routine. - */ - if (priv->mdio_write != NULL) { - priv->mdio_write(priv->ifp, phy, reg, val); - return (0); - } - - /* - * Try generic MII routine. - */ - KASSERT(phy == priv->phy_id, - ("write to phy %u but our phy is %u", phy, priv->phy_id)); - cvm_oct_mdio_write(priv->ifp, phy, reg, val); - - return (0); -} - -static void -octe_init(void *arg) -{ - struct ifnet *ifp; - cvm_oct_private_t *priv; - - priv = arg; - ifp = priv->ifp; - - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) - octe_stop(priv); - - if (priv->open != NULL) - priv->open(ifp); - - if (((ifp->if_flags ^ priv->if_flags) & (IFF_ALLMULTI | IFF_MULTICAST | IFF_PROMISC)) != 0) - cvm_oct_common_set_multicast_list(ifp); - - cvm_oct_common_set_mac_address(ifp, IF_LLADDR(ifp)); - - cvm_oct_common_poll(ifp); - - if (priv->miibus != NULL) - mii_mediachg(device_get_softc(priv->miibus)); - - ifp->if_drv_flags |= IFF_DRV_RUNNING; - ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; -} - -static void -octe_stop(void *arg) -{ - struct ifnet *ifp; - cvm_oct_private_t *priv; - - priv = arg; - ifp = priv->ifp; - - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) - return; - - if (priv->stop != NULL) - priv->stop(ifp); - - ifp->if_drv_flags &= ~IFF_DRV_RUNNING; -} - -static int -octe_transmit(struct ifnet *ifp, struct mbuf *m) -{ - cvm_oct_private_t *priv; - - priv = ifp->if_softc; - - if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != - IFF_DRV_RUNNING) { - m_freem(m); - return (0); - } - - return (cvm_oct_xmit(m, ifp)); -} - -static int -octe_mii_medchange(struct ifnet *ifp) -{ - cvm_oct_private_t *priv; - struct mii_data *mii; - struct mii_softc *miisc; - - priv = ifp->if_softc; - mii = device_get_softc(priv->miibus); - LIST_FOREACH(miisc, &mii->mii_phys, mii_list) - PHY_RESET(miisc); - mii_mediachg(mii); - - return (0); -} - -static void -octe_mii_medstat(struct ifnet *ifp, struct ifmediareq *ifm) -{ - cvm_oct_private_t *priv; - struct mii_data *mii; - - priv = ifp->if_softc; - mii = device_get_softc(priv->miibus); - - mii_pollstat(mii); - ifm->ifm_active = mii->mii_media_active; - ifm->ifm_status = mii->mii_media_status; -} - -static int -octe_medchange(struct ifnet *ifp) -{ - return (ENOTSUP); -} - -static void -octe_medstat(struct ifnet *ifp, struct ifmediareq *ifm) -{ - cvm_oct_private_t *priv; - cvmx_helper_link_info_t link_info; - - priv = ifp->if_softc; - - ifm->ifm_status = IFM_AVALID; - ifm->ifm_active = IFT_ETHER; - - if (priv->poll == NULL) - return; - priv->poll(ifp); - - link_info.u64 = priv->link_info; - - if (!link_info.s.link_up) - return; - - ifm->ifm_status |= IFM_ACTIVE; - - switch (link_info.s.speed) { - case 10: - ifm->ifm_active |= IFM_10_T; - break; - case 100: - ifm->ifm_active |= IFM_100_TX; - break; - case 1000: - ifm->ifm_active |= IFM_1000_T; - break; - case 10000: - ifm->ifm_active |= IFM_10G_T; - break; - } - - if (link_info.s.full_duplex) - ifm->ifm_active |= IFM_FDX; - else - ifm->ifm_active |= IFM_HDX; -} - -static int -octe_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) -{ - cvm_oct_private_t *priv; - struct mii_data *mii; - struct ifreq *ifr; -#ifdef INET - struct ifaddr *ifa; -#endif - int error; - - priv = ifp->if_softc; - ifr = (struct ifreq *)data; -#ifdef INET - ifa = (struct ifaddr *)data; -#endif - - switch (cmd) { - case SIOCSIFADDR: -#ifdef INET - /* - * Avoid reinitialization unless it's necessary. - */ - if (ifa->ifa_addr->sa_family == AF_INET) { - ifp->if_flags |= IFF_UP; - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) - octe_init(priv); - arp_ifinit(ifp, ifa); - - return (0); - } -#endif - error = ether_ioctl(ifp, cmd, data); - if (error != 0) - return (error); - return (0); - - case SIOCSIFFLAGS: - if (ifp->if_flags == priv->if_flags) - return (0); - if ((ifp->if_flags & IFF_UP) != 0) { - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) - octe_init(priv); - } else { - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) - octe_stop(priv); - } - priv->if_flags = ifp->if_flags; - return (0); - - case SIOCSIFCAP: - /* - * Just change the capabilities in software, currently none - * require reprogramming hardware, they just toggle whether we - * make use of already-present facilities in software. - */ - ifp->if_capenable = ifr->ifr_reqcap; - return (0); - - case SIOCSIFMTU: - error = cvm_oct_common_change_mtu(ifp, ifr->ifr_mtu); - if (error != 0) - return (EINVAL); - return (0); - - case SIOCSIFMEDIA: - case SIOCGIFMEDIA: - if (priv->miibus != NULL) { - mii = device_get_softc(priv->miibus); - error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, cmd); - if (error != 0) - return (error); - return (0); - } - error = ifmedia_ioctl(ifp, ifr, &priv->media, cmd); - if (error != 0) - return (error); - return (0); - - default: - error = ether_ioctl(ifp, cmd, data); - if (error != 0) - return (error); - return (0); - } -} diff --git a/sys/mips/cavium/octe/octebus.c b/sys/mips/cavium/octe/octebus.c deleted file mode 100644 index 65f37719311..00000000000 --- a/sys/mips/cavium/octe/octebus.c +++ /dev/null @@ -1,122 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Cavium Octeon Ethernet pseudo-bus attachment. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "ethernet-common.h" - -#include "octebusvar.h" - -static void octebus_identify(driver_t *drv, device_t parent); -static int octebus_probe(device_t dev); -static int octebus_attach(device_t dev); -static int octebus_detach(device_t dev); -static int octebus_shutdown(device_t dev); - -static device_method_t octebus_methods[] = { - /* Device interface */ - DEVMETHOD(device_identify, octebus_identify), - DEVMETHOD(device_probe, octebus_probe), - DEVMETHOD(device_attach, octebus_attach), - DEVMETHOD(device_detach, octebus_detach), - DEVMETHOD(device_shutdown, octebus_shutdown), - - /* Bus interface. */ - DEVMETHOD(bus_add_child, bus_generic_add_child), - { 0, 0 } -}; - -static driver_t octebus_driver = { - "octebus", - octebus_methods, - sizeof (struct octebus_softc), -}; - -static devclass_t octebus_devclass; - -DRIVER_MODULE(octebus, ciu, octebus_driver, octebus_devclass, 0, 0); - -static void -octebus_identify(driver_t *drv, device_t parent) -{ - BUS_ADD_CHILD(parent, 0, "octebus", 0); -} - -static int -octebus_probe(device_t dev) -{ - if (device_get_unit(dev) != 0) - return (ENXIO); - device_set_desc(dev, "Cavium Octeon Ethernet pseudo-bus"); - return (0); -} - -static int -octebus_attach(device_t dev) -{ - struct octebus_softc *sc; - int rv; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - - rv = cvm_oct_init_module(dev); - if (rv != 0) - return (ENXIO); - - return (0); -} - -static int -octebus_detach(device_t dev) -{ - cvm_oct_cleanup_module(dev); - return (0); -} - -static int -octebus_shutdown(device_t dev) -{ - return (octebus_detach(dev)); -} diff --git a/sys/mips/cavium/octe/octebusvar.h b/sys/mips/cavium/octe/octebusvar.h deleted file mode 100644 index da8315d5c6b..00000000000 --- a/sys/mips/cavium/octe/octebusvar.h +++ /dev/null @@ -1,42 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _CAVIUM_OCTE_OCTEBUSVAR_H_ -#define _CAVIUM_OCTE_OCTEBUSVAR_H_ - -struct octebus_softc { - device_t sc_dev; - - struct resource *sc_rx_irq; - void *sc_rx_intr_cookie; - - struct resource *sc_rgmii_irq; - struct resource *sc_spi_irq; -}; - -#endif /* !_CAVIUM_OCTE_OCTEBUSVAR_H_ */ diff --git a/sys/mips/cavium/octe/wrapper-cvmx-includes.h b/sys/mips/cavium/octe/wrapper-cvmx-includes.h deleted file mode 100644 index 844c4970839..00000000000 --- a/sys/mips/cavium/octe/wrapper-cvmx-includes.h +++ /dev/null @@ -1,51 +0,0 @@ -/************************************************************************* -SPDX-License-Identifier: BSD-3-Clause - -Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights -reserved. - -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are -met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - - * Redistributions in binary form must reproduce the above - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. - - * Neither the name of Cavium Networks nor the names of - its contributors may be used to endorse or promote products - derived from this software without specific prior written - permission. - -This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries. - -TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" -AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - -*************************************************************************/ - -#ifndef __WRAPPER_CVMX_INCLUDES_H__ -#define __WRAPPER_CVMX_INCLUDES_H__ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#endif diff --git a/sys/mips/cavium/octeon_cop2.S b/sys/mips/cavium/octeon_cop2.S deleted file mode 100644 index 7582346e36f..00000000000 --- a/sys/mips/cavium/octeon_cop2.S +++ /dev/null @@ -1,223 +0,0 @@ -/*- - * Copyright (c) 2011 Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include - -#include "assym.inc" - -.set noreorder - -#define SAVE_COP2_REGISTER(reg) \ - dmfc2 t1, reg; sd t1, reg##_OFFSET(a0) - - -#define RESTORE_COP2_REGISTER(reg) \ - ld t1, reg##_OFFSET(a0); dmtc2 t1, reg##_SET - -LEAF(octeon_cop2_save) - /* Get CvmCtl register */ - dmfc0 t0, $9, 7 - - /* CRC state */ - SAVE_COP2_REGISTER(COP2_CRC_IV) - SAVE_COP2_REGISTER(COP2_CRC_LENGTH) - SAVE_COP2_REGISTER(COP2_CRC_POLY) - - /* if CvmCtl[NODFA_CP2] -> save_nodfa */ - bbit1 t0, 28, save_nodfa - nop - - /* LLM state */ - SAVE_COP2_REGISTER(COP2_LLM_DAT0) - SAVE_COP2_REGISTER(COP2_LLM_DAT1) - -save_nodfa: - /* crypto stuff is irrelevant if CvmCtl[NOCRYPTO] */ - bbit1 t0, 26, save_done - nop - - SAVE_COP2_REGISTER(COP2_3DES_IV) - SAVE_COP2_REGISTER(COP2_3DES_KEY0) - SAVE_COP2_REGISTER(COP2_3DES_KEY1) - SAVE_COP2_REGISTER(COP2_3DES_KEY2) - SAVE_COP2_REGISTER(COP2_3DES_RESULT) - - SAVE_COP2_REGISTER(COP2_AES_INP0) - SAVE_COP2_REGISTER(COP2_AES_IV0) - SAVE_COP2_REGISTER(COP2_AES_IV1) - SAVE_COP2_REGISTER(COP2_AES_KEY0) - SAVE_COP2_REGISTER(COP2_AES_KEY1) - SAVE_COP2_REGISTER(COP2_AES_KEY2) - SAVE_COP2_REGISTER(COP2_AES_KEY3) - SAVE_COP2_REGISTER(COP2_AES_KEYLEN) - SAVE_COP2_REGISTER(COP2_AES_RESULT0) - SAVE_COP2_REGISTER(COP2_AES_RESULT1) - - dmfc0 t0, $15 - li t1, 0x000d0000 /* Octeon Pass1 */ - beq t0, t1, save_pass1 - nop - - SAVE_COP2_REGISTER(COP2_HSH_DATW0) - SAVE_COP2_REGISTER(COP2_HSH_DATW1) - SAVE_COP2_REGISTER(COP2_HSH_DATW2) - SAVE_COP2_REGISTER(COP2_HSH_DATW3) - SAVE_COP2_REGISTER(COP2_HSH_DATW4) - SAVE_COP2_REGISTER(COP2_HSH_DATW5) - SAVE_COP2_REGISTER(COP2_HSH_DATW6) - SAVE_COP2_REGISTER(COP2_HSH_DATW7) - SAVE_COP2_REGISTER(COP2_HSH_DATW8) - SAVE_COP2_REGISTER(COP2_HSH_DATW9) - SAVE_COP2_REGISTER(COP2_HSH_DATW10) - SAVE_COP2_REGISTER(COP2_HSH_DATW11) - SAVE_COP2_REGISTER(COP2_HSH_DATW12) - SAVE_COP2_REGISTER(COP2_HSH_DATW13) - SAVE_COP2_REGISTER(COP2_HSH_DATW14) - SAVE_COP2_REGISTER(COP2_HSH_IVW0) - SAVE_COP2_REGISTER(COP2_HSH_IVW1) - SAVE_COP2_REGISTER(COP2_HSH_IVW2) - SAVE_COP2_REGISTER(COP2_HSH_IVW3) - SAVE_COP2_REGISTER(COP2_HSH_IVW4) - SAVE_COP2_REGISTER(COP2_HSH_IVW5) - SAVE_COP2_REGISTER(COP2_HSH_IVW6) - SAVE_COP2_REGISTER(COP2_HSH_IVW7) - SAVE_COP2_REGISTER(COP2_GFM_MULT0) - SAVE_COP2_REGISTER(COP2_GFM_MULT1) - SAVE_COP2_REGISTER(COP2_GFM_POLY) - SAVE_COP2_REGISTER(COP2_GFM_RESULT0) - SAVE_COP2_REGISTER(COP2_GFM_RESULT1) - jr ra - nop - -save_pass1: - SAVE_COP2_REGISTER(COP2_HSH_DATW0_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_DATW1_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_DATW2_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_DATW3_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_DATW4_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_DATW5_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_DATW6_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_IVW0_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_IVW1_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_IVW2_PASS1) - -save_done: - jr ra - nop -END(octeon_cop2_save) - -LEAF(octeon_cop2_restore) - /* Get CvmCtl register */ - dmfc0 t0, $9, 7 - - /* CRC state */ - RESTORE_COP2_REGISTER(COP2_CRC_IV) - RESTORE_COP2_REGISTER(COP2_CRC_LENGTH) - RESTORE_COP2_REGISTER(COP2_CRC_POLY) - - /* if CvmCtl[NODFA_CP2] -> save_nodfa */ - bbit1 t0, 28, restore_nodfa - nop - - /* LLM state */ - RESTORE_COP2_REGISTER(COP2_LLM_DAT0) - RESTORE_COP2_REGISTER(COP2_LLM_DAT1) - -restore_nodfa: - /* crypto stuff is irrelevant if CvmCtl[NOCRYPTO] */ - bbit1 t0, 26, restore_done - nop - - RESTORE_COP2_REGISTER(COP2_3DES_IV) - RESTORE_COP2_REGISTER(COP2_3DES_KEY0) - RESTORE_COP2_REGISTER(COP2_3DES_KEY1) - RESTORE_COP2_REGISTER(COP2_3DES_KEY2) - RESTORE_COP2_REGISTER(COP2_3DES_RESULT) - - RESTORE_COP2_REGISTER(COP2_AES_INP0) - RESTORE_COP2_REGISTER(COP2_AES_IV0) - RESTORE_COP2_REGISTER(COP2_AES_IV1) - RESTORE_COP2_REGISTER(COP2_AES_KEY0) - RESTORE_COP2_REGISTER(COP2_AES_KEY1) - RESTORE_COP2_REGISTER(COP2_AES_KEY2) - RESTORE_COP2_REGISTER(COP2_AES_KEY3) - RESTORE_COP2_REGISTER(COP2_AES_KEYLEN) - RESTORE_COP2_REGISTER(COP2_AES_RESULT0) - RESTORE_COP2_REGISTER(COP2_AES_RESULT1) - - dmfc0 t0, $15 - li t1, 0x000d0000 /* Octeon Pass1 */ - beq t0, t1, restore_pass1 - nop - - RESTORE_COP2_REGISTER(COP2_HSH_DATW0) - RESTORE_COP2_REGISTER(COP2_HSH_DATW1) - RESTORE_COP2_REGISTER(COP2_HSH_DATW2) - RESTORE_COP2_REGISTER(COP2_HSH_DATW3) - RESTORE_COP2_REGISTER(COP2_HSH_DATW4) - RESTORE_COP2_REGISTER(COP2_HSH_DATW5) - RESTORE_COP2_REGISTER(COP2_HSH_DATW6) - RESTORE_COP2_REGISTER(COP2_HSH_DATW7) - RESTORE_COP2_REGISTER(COP2_HSH_DATW8) - RESTORE_COP2_REGISTER(COP2_HSH_DATW9) - RESTORE_COP2_REGISTER(COP2_HSH_DATW10) - RESTORE_COP2_REGISTER(COP2_HSH_DATW11) - RESTORE_COP2_REGISTER(COP2_HSH_DATW12) - RESTORE_COP2_REGISTER(COP2_HSH_DATW13) - RESTORE_COP2_REGISTER(COP2_HSH_DATW14) - RESTORE_COP2_REGISTER(COP2_HSH_IVW0) - RESTORE_COP2_REGISTER(COP2_HSH_IVW1) - RESTORE_COP2_REGISTER(COP2_HSH_IVW2) - RESTORE_COP2_REGISTER(COP2_HSH_IVW3) - RESTORE_COP2_REGISTER(COP2_HSH_IVW4) - RESTORE_COP2_REGISTER(COP2_HSH_IVW5) - RESTORE_COP2_REGISTER(COP2_HSH_IVW6) - RESTORE_COP2_REGISTER(COP2_HSH_IVW7) - RESTORE_COP2_REGISTER(COP2_GFM_MULT0) - RESTORE_COP2_REGISTER(COP2_GFM_MULT1) - RESTORE_COP2_REGISTER(COP2_GFM_POLY) - RESTORE_COP2_REGISTER(COP2_GFM_RESULT0) - RESTORE_COP2_REGISTER(COP2_GFM_RESULT1) - jr ra - nop - -restore_pass1: - RESTORE_COP2_REGISTER(COP2_HSH_DATW0_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_DATW1_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_DATW2_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_DATW3_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_DATW4_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_DATW5_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_DATW6_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_IVW0_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_IVW1_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_IVW2_PASS1) - -restore_done: - jr ra - nop -END(octeon_cop2_restore) diff --git a/sys/mips/cavium/octeon_cop2.h b/sys/mips/cavium/octeon_cop2.h deleted file mode 100644 index 976830ce8ac..00000000000 --- a/sys/mips/cavium/octeon_cop2.h +++ /dev/null @@ -1,210 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#ifndef __OCTEON_COP2_H__ -#define __OCTEON_COP2_H__ - -/* - * COP2 registers of interest - */ -#define COP2_CRC_IV 0x201 -#define COP2_CRC_IV_SET COP2_CRC_IV -#define COP2_CRC_LENGTH 0x202 -#define COP2_CRC_LENGTH_SET 0x1202 -#define COP2_CRC_POLY 0x200 -#define COP2_CRC_POLY_SET 0x4200 -#define COP2_LLM_DAT0 0x402 -#define COP2_LLM_DAT0_SET COP2_LLM_DAT0 -#define COP2_LLM_DAT1 0x40A -#define COP2_LLM_DAT1_SET COP2_LLM_DAT1 -#define COP2_3DES_IV 0x084 -#define COP2_3DES_IV_SET COP2_3DES_IV -#define COP2_3DES_KEY0 0x080 -#define COP2_3DES_KEY0_SET COP2_3DES_KEY0 -#define COP2_3DES_KEY1 0x081 -#define COP2_3DES_KEY1_SET COP2_3DES_KEY1 -#define COP2_3DES_KEY2 0x082 -#define COP2_3DES_KEY2_SET COP2_3DES_KEY2 -#define COP2_3DES_RESULT 0x088 -#define COP2_3DES_RESULT_SET 0x098 -#define COP2_AES_INP0 0x111 -#define COP2_AES_INP0_SET COP2_AES_INP0 -#define COP2_AES_IV0 0x102 -#define COP2_AES_IV0_SET COP2_AES_IV0 -#define COP2_AES_IV1 0x103 -#define COP2_AES_IV1_SET COP2_AES_IV1 -#define COP2_AES_KEY0 0x104 -#define COP2_AES_KEY0_SET COP2_AES_KEY0 -#define COP2_AES_KEY1 0x105 -#define COP2_AES_KEY1_SET COP2_AES_KEY1 -#define COP2_AES_KEY2 0x106 -#define COP2_AES_KEY2_SET COP2_AES_KEY2 -#define COP2_AES_KEY3 0x107 -#define COP2_AES_KEY3_SET COP2_AES_KEY3 -#define COP2_AES_KEYLEN 0x110 -#define COP2_AES_KEYLEN_SET COP2_AES_KEYLEN -#define COP2_AES_RESULT0 0x100 -#define COP2_AES_RESULT0_SET COP2_AES_RESULT0 -#define COP2_AES_RESULT1 0x101 -#define COP2_AES_RESULT1_SET COP2_AES_RESULT1 -#define COP2_HSH_DATW0 0x240 -#define COP2_HSH_DATW0_SET COP2_HSH_DATW0 -#define COP2_HSH_DATW1 0x241 -#define COP2_HSH_DATW1_SET COP2_HSH_DATW1 -#define COP2_HSH_DATW2 0x242 -#define COP2_HSH_DATW2_SET COP2_HSH_DATW2 -#define COP2_HSH_DATW3 0x243 -#define COP2_HSH_DATW3_SET COP2_HSH_DATW3 -#define COP2_HSH_DATW4 0x244 -#define COP2_HSH_DATW4_SET COP2_HSH_DATW4 -#define COP2_HSH_DATW5 0x245 -#define COP2_HSH_DATW5_SET COP2_HSH_DATW5 -#define COP2_HSH_DATW6 0x246 -#define COP2_HSH_DATW6_SET COP2_HSH_DATW6 -#define COP2_HSH_DATW7 0x247 -#define COP2_HSH_DATW7_SET COP2_HSH_DATW7 -#define COP2_HSH_DATW8 0x248 -#define COP2_HSH_DATW8_SET COP2_HSH_DATW8 -#define COP2_HSH_DATW9 0x249 -#define COP2_HSH_DATW9_SET COP2_HSH_DATW9 -#define COP2_HSH_DATW10 0x24A -#define COP2_HSH_DATW10_SET COP2_HSH_DATW10 -#define COP2_HSH_DATW11 0x24B -#define COP2_HSH_DATW11_SET COP2_HSH_DATW11 -#define COP2_HSH_DATW12 0x24C -#define COP2_HSH_DATW12_SET COP2_HSH_DATW12 -#define COP2_HSH_DATW13 0x24D -#define COP2_HSH_DATW13_SET COP2_HSH_DATW13 -#define COP2_HSH_DATW14 0x24E -#define COP2_HSH_DATW14_SET COP2_HSH_DATW14 -#define COP2_HSH_IVW0 0x250 -#define COP2_HSH_IVW0_SET COP2_HSH_IVW0 -#define COP2_HSH_IVW1 0x251 -#define COP2_HSH_IVW1_SET COP2_HSH_IVW1 -#define COP2_HSH_IVW2 0x252 -#define COP2_HSH_IVW2_SET COP2_HSH_IVW2 -#define COP2_HSH_IVW3 0x253 -#define COP2_HSH_IVW3_SET COP2_HSH_IVW3 -#define COP2_HSH_IVW4 0x254 -#define COP2_HSH_IVW4_SET COP2_HSH_IVW4 -#define COP2_HSH_IVW5 0x255 -#define COP2_HSH_IVW5_SET COP2_HSH_IVW5 -#define COP2_HSH_IVW6 0x256 -#define COP2_HSH_IVW6_SET COP2_HSH_IVW6 -#define COP2_HSH_IVW7 0x257 -#define COP2_HSH_IVW7_SET COP2_HSH_IVW7 -#define COP2_GFM_MULT0 0x258 -#define COP2_GFM_MULT0_SET COP2_GFM_MULT0 -#define COP2_GFM_MULT1 0x259 -#define COP2_GFM_MULT1_SET COP2_GFM_MULT1 -#define COP2_GFM_POLY 0x25E -#define COP2_GFM_POLY_SET COP2_GFM_POLY -#define COP2_GFM_RESULT0 0x25A -#define COP2_GFM_RESULT0_SET COP2_GFM_RESULT0 -#define COP2_GFM_RESULT1 0x25B -#define COP2_GFM_RESULT1_SET COP2_GFM_RESULT1 -#define COP2_HSH_DATW0_PASS1 0x040 -#define COP2_HSH_DATW0_PASS1_SET COP2_HSH_DATW0_PASS1 -#define COP2_HSH_DATW1_PASS1 0x041 -#define COP2_HSH_DATW1_PASS1_SET COP2_HSH_DATW1_PASS1 -#define COP2_HSH_DATW2_PASS1 0x042 -#define COP2_HSH_DATW2_PASS1_SET COP2_HSH_DATW2_PASS1 -#define COP2_HSH_DATW3_PASS1 0x043 -#define COP2_HSH_DATW3_PASS1_SET COP2_HSH_DATW3_PASS1 -#define COP2_HSH_DATW4_PASS1 0x044 -#define COP2_HSH_DATW4_PASS1_SET COP2_HSH_DATW4_PASS1 -#define COP2_HSH_DATW5_PASS1 0x045 -#define COP2_HSH_DATW5_PASS1_SET COP2_HSH_DATW5_PASS1 -#define COP2_HSH_DATW6_PASS1 0x046 -#define COP2_HSH_DATW6_PASS1_SET COP2_HSH_DATW6_PASS1 -#define COP2_HSH_IVW0_PASS1 0x048 -#define COP2_HSH_IVW0_PASS1_SET COP2_HSH_IVW0_PASS1 -#define COP2_HSH_IVW1_PASS1 0x049 -#define COP2_HSH_IVW1_PASS1_SET COP2_HSH_IVW1_PASS1 -#define COP2_HSH_IVW2_PASS1 0x04A -#define COP2_HSH_IVW2_PASS1_SET COP2_HSH_IVW2_PASS1 - -#ifndef LOCORE - -struct octeon_cop2_state { - /* 3DES */ - /* 0x0084 */ - unsigned long _3des_iv; - /* 0x0080..0x0082 */ - unsigned long _3des_key[3]; - /* 0x0088, set: 0x0098 */ - unsigned long _3des_result; - - /* AES */ - /* 0x0111 */ - unsigned long aes_inp0; - /* 0x0102..0x0103 */ - unsigned long aes_iv[2]; - /* 0x0104..0x0107 */ - unsigned long aes_key[4]; - /* 0x0110 */ - unsigned long aes_keylen; - /* 0x0100..0x0101 */ - unsigned long aes_result[2]; - - /* CRC */ - /* 0x0201 */ - unsigned long crc_iv; - /* 0x0202, set: 0x1202 */ - unsigned long crc_length; - /* 0x0200, set: 0x4200 */ - unsigned long crc_poly; - - /* Low-latency memory stuff */ - /* 0x0402, 0x040A */ - unsigned long llm_dat[2]; - - /* SHA & MD5 */ - /* 0x0240..0x024E */ - unsigned long hsh_datw[15]; - /* 0x0250..0x0257 */ - unsigned long hsh_ivw[8]; - - /* GFM */ - /* 0x0258..0x0259 */ - unsigned long gfm_mult[2]; - /* 0x025E */ - unsigned long gfm_poly; - /* 0x025A..0x025B */ - unsigned long gfm_result[2]; -}; - -/* Prototypes */ - -void octeon_cop2_save(struct octeon_cop2_state *); -void octeon_cop2_restore(struct octeon_cop2_state *); - -#endif /* LOCORE */ -#endif /* __OCTEON_COP2_H__ */ diff --git a/sys/mips/cavium/octeon_ds1337.c b/sys/mips/cavium/octeon_ds1337.c deleted file mode 100644 index 27d751b8c1b..00000000000 --- a/sys/mips/cavium/octeon_ds1337.c +++ /dev/null @@ -1,215 +0,0 @@ -/***********************license start*************** - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights - * reserved. - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * - * * Neither the name of Cavium Networks nor the names of - * its contributors may be used to endorse or promote products - * derived from this software without specific prior written - * permission. - * - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" - * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES - * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR - * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET - * POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT - * OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - * - * - * For any questions regarding licensing please contact marketing@caviumnetworks.com - * - ***********************license end**************************************/ - -/** - * @file - * - * Interface to the EBH-30xx specific devices - * - *
$Revision: 41586 $
- * - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#define CT_CHECK(_expr, _msg) \ - do { \ - if (_expr) { \ - cvmx_dprintf("Warning: RTC has invalid %s field\n", (_msg)); \ - rc = -1; \ - } \ - } while(0); - -static int validate_ct_struct(struct clocktime *ct) -{ - int rc = 0; - - if (!ct) - return -1; - - CT_CHECK(ct->sec < 0 || ct->sec > 60, "second"); /* + Leap sec */ - CT_CHECK(ct->min < 0 || ct->min > 59, "minute"); - CT_CHECK(ct->hour < 0 || ct->hour > 23, "hour"); - CT_CHECK(ct->day < 1 || ct->day > 31, "day"); - CT_CHECK(ct->dow < 0 || ct->dow > 6, "day of week"); - CT_CHECK(ct->mon < 1 || ct->mon > 12, "month"); - CT_CHECK(ct->year > 2037,"year"); - - return rc; -} - -/* - * Board-specifc RTC read - * Time is expressed in seconds from epoch (Jan 1 1970 at 00:00:00 UTC) - * and converted internally to calendar format. - */ -uint32_t cvmx_rtc_ds1337_read(void) -{ - int i, retry; - uint8_t reg[8]; - uint8_t sec; - struct clocktime ct; - struct timespec ts; - - memset(®, 0, sizeof(reg)); - memset(&ct, 0, sizeof(ct)); - - for(retry=0; retry<2; retry++) - { - /* Lockless read: detects the infrequent roll-over and retries */ - reg[0] = cvmx_twsi_read8(CVMX_RTC_DS1337_ADDR, 0x0); - for(i=1; i<7; i++) - reg[i] = cvmx_twsi_read8_cur_addr(CVMX_RTC_DS1337_ADDR); - - sec = cvmx_twsi_read8(CVMX_RTC_DS1337_ADDR, 0x0); - if ((sec & 0xf) == (reg[0] & 0xf)) - break; /* Time did not roll-over, value is correct */ - } - - ct.sec = bcd2bin(reg[0] & 0x7f); - ct.min = bcd2bin(reg[1] & 0x7f); - ct.hour = bcd2bin(reg[2] & 0x3f); - if ((reg[2] & 0x40) && (reg[2] & 0x20)) /* AM/PM format and is PM time */ - { - ct.hour = (ct.hour + 12) % 24; - } - ct.dow = (reg[3] & 0x7) - 1; /* Day of week field is 0..6 */ - ct.day = bcd2bin(reg[4] & 0x3f); - ct.mon = bcd2bin(reg[5] & 0x1f); /* Month field is 1..12 */ -#if defined(OCTEON_BOARD_CAPK_0100ND) - /* - * CAPK-0100ND uses DS1307 that does not have century bit - */ - ct.year = 2000 + bcd2bin(reg[6]); -#else - ct.year = ((reg[5] & 0x80) ? 2000 : 1900) + bcd2bin(reg[6]); -#endif - - if (validate_ct_struct(&ct)) - cvmx_dprintf("Warning: RTC calendar is not configured properly\n"); - - if (clock_ct_to_ts(&ct, &ts) != 0) { - cvmx_dprintf("Warning: RTC calendar is not configured properly\n"); - return 0; - } - - return ts.tv_sec; -} - -/* - * Board-specific RTC write - * Time returned is in seconds from epoch (Jan 1 1970 at 00:00:00 UTC) - */ -int cvmx_rtc_ds1337_write(uint32_t time) -{ - struct clocktime ct; - struct timespec ts; - int i, rc, retry; - uint8_t reg[8]; - uint8_t sec; - - ts.tv_sec = time; - ts.tv_nsec = 0; - - clock_ts_to_ct(&ts, &ct); - - if (validate_ct_struct(&ct)) - { - cvmx_dprintf("Error: RTC was passed wrong calendar values, write failed\n"); - goto ct_invalid; - } - - reg[0] = bin2bcd(ct.sec); - reg[1] = bin2bcd(ct.min); - reg[2] = bin2bcd(ct.hour); /* Force 0..23 format even if using AM/PM */ - reg[3] = bin2bcd(ct.dow + 1); - reg[4] = bin2bcd(ct.day); - reg[5] = bin2bcd(ct.mon); -#if !defined(OCTEON_BOARD_CAPK_0100ND) - if (ct.year >= 2000) /* Set century bit*/ - { - reg[5] |= 0x80; - } -#endif - reg[6] = bin2bcd(ct.year % 100); - - /* Lockless write: detects the infrequent roll-over and retries */ - for(retry=0; retry<2; retry++) - { - rc = 0; - for(i=0; i<7; i++) - { - rc |= cvmx_twsi_write8(CVMX_RTC_DS1337_ADDR, i, reg[i]); - } - - sec = cvmx_twsi_read8(CVMX_RTC_DS1337_ADDR, 0x0); - if ((sec & 0xf) == (reg[0] & 0xf)) - break; /* Time did not roll-over, value is correct */ - } - - return (rc ? -1 : 0); - - ct_invalid: - return -1; -} - -#ifdef CVMX_RTC_DEBUG - -void cvmx_rtc_ds1337_dump_state(void) -{ - int i = 0; - - printf("RTC:\n"); - printf("%d : %02X ", i, cvmx_twsi_read8(CVMX_RTC_DS1337_ADDR, 0x0)); - for(i=1; i<16; i++) { - printf("%02X ", cvmx_twsi_read8_cur_addr(CVMX_RTC_DS1337_ADDR)); - } - printf("\n"); -} - -#endif /* CVMX_RTC_DEBUG */ diff --git a/sys/mips/cavium/octeon_ebt3000_cf.c b/sys/mips/cavium/octeon_ebt3000_cf.c deleted file mode 100644 index 5ce9e34cff3..00000000000 --- a/sys/mips/cavium/octeon_ebt3000_cf.c +++ /dev/null @@ -1,728 +0,0 @@ -/***********************license start*************** - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights - * reserved. - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * - * * Neither the name of Cavium Networks nor the names of - * its contributors may be used to endorse or promote products - * derived from this software without specific prior written - * permission. - * - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" - * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES - * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR - * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET - * POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT - * OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - * - * - * For any questions regarding licensing please contact marketing@caviumnetworks.com - * - ***********************license end**************************************/ - -/* - * octeon_ebt3000_cf.c - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include - -#include - -#include - -/* ATA Commands */ -#define CMD_READ_SECTOR 0x20 -#define CMD_WRITE_SECTOR 0x30 -#define CMD_IDENTIFY 0xEC - -/* The ATA Task File */ -#define TF_DATA 0x00 -#define TF_ERROR 0x01 -#define TF_PRECOMP 0x01 -#define TF_SECTOR_COUNT 0x02 -#define TF_SECTOR_NUMBER 0x03 -#define TF_CYL_LSB 0x04 -#define TF_CYL_MSB 0x05 -#define TF_DRV_HEAD 0x06 -#define TF_STATUS 0x07 -#define TF_COMMAND 0x07 - -/* Status Register */ -#define STATUS_BSY 0x80 /* Drive is busy */ -#define STATUS_RDY 0x40 /* Drive is ready */ -#define STATUS_DF 0x20 /* Device fault */ -#define STATUS_DRQ 0x08 /* Data can be transferred */ - -/* Miscelaneous */ -#define SECTOR_SIZE 512 -#define WAIT_DELAY 1000 -#define NR_TRIES 1000 -#define SWAP_SHORT(x) ((x << 8) | (x >> 8)) -#define MODEL_STR_SIZE 40 - -/* Globals */ -/* - * There's three bus types supported by this driver. - * - * CF_8 -- Traditional PC Card IDE interface on an 8-bit wide bus. We assume - * the bool loader has configure attribute memory properly. We then access - * the device like old-school 8-bit IDE card (which is all a traditional PC Card - * interface really is). - * CF_16 -- Traditional PC Card IDE interface on a 16-bit wide bus. Registers on - * this bus are 16-bits wide too. When accessing registers in the task file, you - * have to do it in 16-bit chunks, and worry about masking out what you don't want - * or ORing together the traditional 8-bit values. We assume the bootloader does - * the right attribute memory initialization dance. - * CF_TRUE_IDE_8 - CF Card wired to True IDE mode. There's no Attribute memory - * space at all. Instead all the traditional 8-bit registers are there, but - * on a 16-bit bus where addr0 isn't wired. This means we need to read/write them - * 16-bit chunks, but only the lower 8 bits are valid. We do not (and can not) - * access this like CF_16 with the comingled registers. Yet we can't access - * this like CF_8 because of the register offset. Except the TF_DATA register - * appears to be full width? - */ -void *base_addr; -int bus_type; -#define CF_8 1 /* 8-bit bus, no offsets - PC Card */ -#define CF_16 2 /* 16-bit bus, registers shared - PC Card */ -#define CF_TRUE_IDE_8 3 /* 16-bit bus, only lower 8-bits, TrueIDE */ -const char *const cf_type[] = { - "impossible type", - "CF 8-bit", - "CF 16-bit", - "True IDE" -}; - -/* Device parameters */ -struct drive_param{ - union { - char buf[SECTOR_SIZE]; - struct ata_params driveid; - } u; - - char model[MODEL_STR_SIZE]; - uint32_t nr_sectors; - uint16_t sector_size; - uint16_t heads; - uint16_t tracks; - uint16_t sec_track; -}; - -/* Device softc */ -struct cf_priv { - device_t dev; - struct drive_param drive_param; - - struct bio_queue_head cf_bq; - struct g_geom *cf_geom; - struct g_provider *cf_provider; - -}; - -/* GEOM class implementation */ -static g_access_t cf_access; -static g_start_t cf_start; -static g_ioctl_t cf_ioctl; - -struct g_class g_cf_class = { - .name = "CF", - .version = G_VERSION, - .start = cf_start, - .access = cf_access, - .ioctl = cf_ioctl, -}; - -DECLARE_GEOM_CLASS(g_cf_class, g_cf); - -/* Device methods */ -static int cf_probe(device_t); -static void cf_identify(driver_t *, device_t); -static int cf_attach(device_t); -static void cf_attach_geom(void *, int); - -/* ATA methods */ -static int cf_cmd_identify(struct cf_priv *); -static int cf_cmd_write(uint32_t, uint32_t, void *); -static int cf_cmd_read(uint32_t, uint32_t, void *); -static int cf_wait_busy(void); -static int cf_send_cmd(uint32_t, uint8_t); - -/* Miscelenous */ -static void cf_swap_ascii(unsigned char[], char[]); - -/* ------------------------------------------------------------------- * - * cf_access() * - * ------------------------------------------------------------------- */ -static int cf_access (struct g_provider *pp, int r, int w, int e) -{ - return (0); -} - -/* ------------------------------------------------------------------- * - * cf_start() * - * ------------------------------------------------------------------- */ -static void cf_start (struct bio *bp) -{ - struct cf_priv *cf_priv; - int error; - - cf_priv = bp->bio_to->geom->softc; - - /* - * Handle actual I/O requests. The request is passed down through - * the bio struct. - */ - - switch (bp->bio_cmd) { - case BIO_GETATTR: - if (g_handleattr_int(bp, "GEOM::fwsectors", cf_priv->drive_param.sec_track)) - return; - if (g_handleattr_int(bp, "GEOM::fwheads", cf_priv->drive_param.heads)) - return; - g_io_deliver(bp, ENOIOCTL); - return; - - case BIO_READ: - error = cf_cmd_read(bp->bio_length / cf_priv->drive_param.sector_size, - bp->bio_offset / cf_priv->drive_param.sector_size, bp->bio_data); - break; - case BIO_WRITE: - error = cf_cmd_write(bp->bio_length / cf_priv->drive_param.sector_size, - bp->bio_offset/cf_priv->drive_param.sector_size, bp->bio_data); - break; - - default: - printf("%s: unrecognized bio_cmd %x.\n", __func__, bp->bio_cmd); - error = ENOTSUP; - break; - } - - if (error != 0) { - g_io_deliver(bp, error); - return; - } - - bp->bio_resid = 0; - bp->bio_completed = bp->bio_length; - g_io_deliver(bp, 0); -} - -static int cf_ioctl (struct g_provider *pp, u_long cmd, void *data, int fflag, struct thread *td) -{ - return (0); -} - -static uint8_t cf_inb_8(int port) -{ - /* - * Traditional 8-bit PC Card/CF bus access. - */ - if (bus_type == CF_8) { - volatile uint8_t *task_file = (volatile uint8_t *)base_addr; - return task_file[port]; - } - - /* - * True IDE access. lower 8 bits on a 16-bit bus (see above). - */ - volatile uint16_t *task_file = (volatile uint16_t *)base_addr; - return task_file[port] & 0xff; -} - -static void cf_outb_8(int port, uint8_t val) -{ - /* - * Traditional 8-bit PC Card/CF bus access. - */ - if (bus_type == CF_8) { - volatile uint8_t *task_file = (volatile uint8_t *)base_addr; - task_file[port] = val; - return; - } - - /* - * True IDE access. lower 8 bits on a 16-bit bus (see above). - */ - volatile uint16_t *task_file = (volatile uint16_t *)base_addr; - task_file[port] = val & 0xff; -} - -static uint8_t cf_inb_16(int port) -{ - volatile uint16_t *task_file = (volatile uint16_t *)base_addr; - uint16_t val = task_file[port / 2]; - if (port & 1) - return (val >> 8) & 0xff; - return val & 0xff; -} - -static uint16_t cf_inw_16(int port) -{ - volatile uint16_t *task_file = (volatile uint16_t *)base_addr; - uint16_t val = task_file[port / 2]; - return val; -} - -static void cf_outw_16(int port, uint16_t val) -{ - volatile uint16_t *task_file = (volatile uint16_t *)base_addr; - task_file[port / 2] = val; -} - -/* ------------------------------------------------------------------- * - * cf_cmd_read() * - * ------------------------------------------------------------------- * - * - * Read nr_sectors from the device starting from start_sector. - */ -static int cf_cmd_read (uint32_t nr_sectors, uint32_t start_sector, void *buf) -{ - unsigned long lba; - uint32_t count; - uint16_t *ptr_16; - uint8_t *ptr_8; - int error; - - ptr_8 = (uint8_t*)buf; - ptr_16 = (uint16_t*)buf; - lba = start_sector; - - while (nr_sectors--) { - error = cf_send_cmd(lba, CMD_READ_SECTOR); - if (error != 0) { - printf("%s: cf_send_cmd(CMD_READ_SECTOR) failed: %d\n", __func__, error); - return (error); - } - - switch (bus_type) - { - case CF_8: - for (count = 0; count < SECTOR_SIZE; count++) { - *ptr_8++ = cf_inb_8(TF_DATA); - if ((count & 0xf) == 0) - (void)cf_inb_8(TF_STATUS); - } - break; - case CF_TRUE_IDE_8: - case CF_16: - default: - for (count = 0; count < SECTOR_SIZE; count+=2) { - uint16_t temp; - temp = cf_inw_16(TF_DATA); - *ptr_16++ = SWAP_SHORT(temp); - if ((count & 0xf) == 0) - (void)cf_inb_16(TF_STATUS); - } - break; - } - - lba++; - } - return (0); -} - -/* ------------------------------------------------------------------- * - * cf_cmd_write() * - * ------------------------------------------------------------------- * - * - * Write nr_sectors to the device starting from start_sector. - */ -static int cf_cmd_write (uint32_t nr_sectors, uint32_t start_sector, void *buf) -{ - uint32_t lba; - uint32_t count; - uint16_t *ptr_16; - uint8_t *ptr_8; - int error; - - lba = start_sector; - ptr_8 = (uint8_t*)buf; - ptr_16 = (uint16_t*)buf; - - while (nr_sectors--) { - error = cf_send_cmd(lba, CMD_WRITE_SECTOR); - if (error != 0) { - printf("%s: cf_send_cmd(CMD_WRITE_SECTOR) failed: %d\n", __func__, error); - return (error); - } - - switch (bus_type) - { - case CF_8: - for (count = 0; count < SECTOR_SIZE; count++) { - cf_outb_8(TF_DATA, *ptr_8++); - if ((count & 0xf) == 0) - (void)cf_inb_8(TF_STATUS); - } - break; - case CF_TRUE_IDE_8: - case CF_16: - default: - for (count = 0; count < SECTOR_SIZE; count+=2) { - uint16_t temp = *ptr_16++; - cf_outw_16(TF_DATA, SWAP_SHORT(temp)); - if ((count & 0xf) == 0) - (void)cf_inb_16(TF_STATUS); - } - break; - } - - lba++; - } - return (0); -} - -/* ------------------------------------------------------------------- * - * cf_cmd_identify() * - * ------------------------------------------------------------------- * - * - * Read parameters and other information from the drive and store - * it in the drive_param structure - * - */ -static int cf_cmd_identify(struct cf_priv *cf_priv) -{ - int count; - int error; - - error = cf_send_cmd(0, CMD_IDENTIFY); - if (error != 0) { - printf("%s: identify failed: %d\n", __func__, error); - return (error); - } - switch (bus_type) - { - case CF_8: - for (count = 0; count < SECTOR_SIZE; count++) - cf_priv->drive_param.u.buf[count] = cf_inb_8(TF_DATA); - break; - case CF_TRUE_IDE_8: - case CF_16: - default: - for (count = 0; count < SECTOR_SIZE; count += 2) { - uint16_t temp; - temp = cf_inw_16(TF_DATA); - - /* endianess will be swapped below */ - cf_priv->drive_param.u.buf[count] = (temp & 0xff); - cf_priv->drive_param.u.buf[count + 1] = (temp & 0xff00) >> 8; - } - break; - } - - cf_swap_ascii(cf_priv->drive_param.u.driveid.model, cf_priv->drive_param.model); - - cf_priv->drive_param.sector_size = 512; //= SWAP_SHORT (cf_priv->drive_param.u.driveid.sector_bytes); - cf_priv->drive_param.heads = SWAP_SHORT (cf_priv->drive_param.u.driveid.current_heads); - cf_priv->drive_param.tracks = SWAP_SHORT (cf_priv->drive_param.u.driveid.current_cylinders); - cf_priv->drive_param.sec_track = SWAP_SHORT (cf_priv->drive_param.u.driveid.current_sectors); - cf_priv->drive_param.nr_sectors = (uint32_t)SWAP_SHORT (cf_priv->drive_param.u.driveid.lba_size_1) | - ((uint32_t)SWAP_SHORT (cf_priv->drive_param.u.driveid.lba_size_2)); - if (bootverbose) { - printf(" model %s\n", cf_priv->drive_param.model); - printf(" heads %d tracks %d sec_tracks %d sectors %d\n", - cf_priv->drive_param.heads, cf_priv->drive_param.tracks, - cf_priv->drive_param.sec_track, cf_priv->drive_param.nr_sectors); - } - - return (0); -} - -/* ------------------------------------------------------------------- * - * cf_send_cmd() * - * ------------------------------------------------------------------- * - * - * Send command to read/write one sector specified by lba. - * - */ -static int cf_send_cmd (uint32_t lba, uint8_t cmd) -{ - switch (bus_type) - { - case CF_8: - case CF_TRUE_IDE_8: - while (cf_inb_8(TF_STATUS) & STATUS_BSY) - DELAY(WAIT_DELAY); - cf_outb_8(TF_SECTOR_COUNT, 1); - cf_outb_8(TF_SECTOR_NUMBER, lba & 0xff); - cf_outb_8(TF_CYL_LSB, (lba >> 8) & 0xff); - cf_outb_8(TF_CYL_MSB, (lba >> 16) & 0xff); - cf_outb_8(TF_DRV_HEAD, ((lba >> 24) & 0xff) | 0xe0); - cf_outb_8(TF_COMMAND, cmd); - break; - case CF_16: - default: - while (cf_inb_16(TF_STATUS) & STATUS_BSY) - DELAY(WAIT_DELAY); - cf_outw_16(TF_SECTOR_COUNT, 1 | ((lba & 0xff) << 8)); - cf_outw_16(TF_CYL_LSB, ((lba >> 8) & 0xff) | (((lba >> 16) & 0xff) << 8)); - cf_outw_16(TF_DRV_HEAD, (((lba >> 24) & 0xff) | 0xe0) | (cmd << 8)); - break; - } - - return (cf_wait_busy()); -} - -/* ------------------------------------------------------------------- * - * cf_wait_busy() * - * ------------------------------------------------------------------- * - * - * Wait until the drive finishes a given command and data is - * ready to be transferred. This is done by repeatedly checking - * the BSY bit of the status register. When the controller is ready for - * data transfer, it clears the BSY bit and sets the DRQ bit. - * - * If the DF bit is ever set, we return error. - * - * This code originally spun on DRQ. If that behavior turns out to be - * necessary, a flag can be added or this function can be called - * repeatedly as long as it is returning ENXIO. - */ -static int cf_wait_busy (void) -{ - uint8_t status; - - switch (bus_type) - { - case CF_8: - case CF_TRUE_IDE_8: - status = cf_inb_8(TF_STATUS); - while ((status & STATUS_BSY) == STATUS_BSY) { - if ((status & STATUS_DF) != 0) { - printf("%s: device fault (status=%x)\n", __func__, status); - return (EIO); - } - DELAY(WAIT_DELAY); - status = cf_inb_8(TF_STATUS); - } - break; - case CF_16: - default: - status = cf_inb_16(TF_STATUS); - while ((status & STATUS_BSY) == STATUS_BSY) { - if ((status & STATUS_DF) != 0) { - printf("%s: device fault (status=%x)\n", __func__, status); - return (EIO); - } - DELAY(WAIT_DELAY); - status = cf_inb_16(TF_STATUS); - } - break; - } - - /* DRQ is only for when read data is actually available; check BSY */ - /* Some vendors do assert DRQ, but not all. Check BSY instead. */ - if (status & STATUS_BSY) { - printf("%s: device not ready (status=%x)\n", __func__, status); - return (ENXIO); - } - - return (0); -} - -/* ------------------------------------------------------------------- * - * cf_swap_ascii() * - * ------------------------------------------------------------------- * - * - * The ascii string returned by the controller specifying - * the model of the drive is byte-swaped. This routine - * corrects the byte ordering. - * - */ -static void cf_swap_ascii (unsigned char str1[], char str2[]) -{ - int i; - - for(i = 0; i < MODEL_STR_SIZE; i++) - str2[i] = str1[i ^ 1]; -} - -/* ------------------------------------------------------------------- * - * cf_probe() * - * ------------------------------------------------------------------- */ - -static int cf_probe (device_t dev) -{ - if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) - return (ENXIO); - - if (device_get_unit(dev) != 0) { - panic("can't attach more devices\n"); - } - - device_set_desc(dev, "Octeon Compact Flash Driver"); - - return (BUS_PROBE_NOWILDCARD); -} - -/* ------------------------------------------------------------------- * - * cf_identify() * - * ------------------------------------------------------------------- * - * - * Find the bootbus region for the CF to determine - * 16 or 8 bit and check to see if device is - * inserted. - * - */ -static void cf_identify (driver_t *drv, device_t parent) -{ - int bus_region; - int count = 0; - cvmx_mio_boot_reg_cfgx_t cfg; - uint64_t phys_base; - - if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) - return; - - phys_base = cvmx_sysinfo_get()->compact_flash_common_base_addr; - if (phys_base == 0) - return; - base_addr = cvmx_phys_to_ptr(phys_base); - - for (bus_region = 0; bus_region < 8; bus_region++) - { - cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(bus_region)); - if (cfg.s.base == phys_base >> 16) - { - if (cvmx_sysinfo_get()->compact_flash_attribute_base_addr == 0) - bus_type = CF_TRUE_IDE_8; - else - bus_type = (cfg.s.width) ? CF_16 : CF_8; - printf("Compact flash found in bootbus region %d (%s).\n", bus_region, cf_type[bus_type]); - break; - } - } - - switch (bus_type) - { - case CF_8: - case CF_TRUE_IDE_8: - /* Check if CF is inserted */ - while (cf_inb_8(TF_STATUS) & STATUS_BSY) { - if ((count++) == NR_TRIES ) { - printf("Compact Flash not present\n"); - return; - } - DELAY(WAIT_DELAY); - } - break; - case CF_16: - default: - /* Check if CF is inserted */ - while (cf_inb_16(TF_STATUS) & STATUS_BSY) { - if ((count++) == NR_TRIES ) { - printf("Compact Flash not present\n"); - return; - } - DELAY(WAIT_DELAY); - } - break; - } - - BUS_ADD_CHILD(parent, 0, "cf", 0); -} - -/* ------------------------------------------------------------------- * - * cf_attach_geom() * - * ------------------------------------------------------------------- */ - -static void cf_attach_geom (void *arg, int flag) -{ - struct cf_priv *cf_priv; - - cf_priv = (struct cf_priv *) arg; - cf_priv->cf_geom = g_new_geomf(&g_cf_class, "cf%d", device_get_unit(cf_priv->dev)); - cf_priv->cf_geom->softc = cf_priv; - cf_priv->cf_provider = g_new_providerf(cf_priv->cf_geom, "%s", - cf_priv->cf_geom->name); - cf_priv->cf_provider->sectorsize = cf_priv->drive_param.sector_size; - cf_priv->cf_provider->mediasize = cf_priv->drive_param.nr_sectors * cf_priv->cf_provider->sectorsize; - g_error_provider(cf_priv->cf_provider, 0); -} - -/* ------------------------------------------------------------------- * - * cf_attach() * - * ------------------------------------------------------------------- */ - -static int cf_attach (device_t dev) -{ - struct cf_priv *cf_priv; - int error; - - if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) - return (ENXIO); - - cf_priv = device_get_softc(dev); - cf_priv->dev = dev; - - error = cf_cmd_identify(cf_priv); - if (error != 0) { - device_printf(dev, "cf_cmd_identify failed: %d\n", error); - return (error); - } - - g_post_event(cf_attach_geom, cf_priv, M_WAITOK, NULL); - bioq_init(&cf_priv->cf_bq); - - return 0; -} - -static device_method_t cf_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, cf_probe), - DEVMETHOD(device_identify, cf_identify), - DEVMETHOD(device_attach, cf_attach), - DEVMETHOD(device_detach, bus_generic_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - { 0, 0 } -}; - -static driver_t cf_driver = { - "cf", - cf_methods, - sizeof(struct cf_priv) -}; - -static devclass_t cf_devclass; - -DRIVER_MODULE(cf, nexus, cf_driver, cf_devclass, 0, 0); diff --git a/sys/mips/cavium/octeon_gpio.c b/sys/mips/cavium/octeon_gpio.c deleted file mode 100644 index 24f9cdf8125..00000000000 --- a/sys/mips/cavium/octeon_gpio.c +++ /dev/null @@ -1,506 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * GPIO driver for Cavium Octeon - */ - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include -#include - -#include "gpio_if.h" - -#define DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT) - -struct octeon_gpio_pin { - const char *name; - int pin; - int flags; -}; - -/* - * on CAP100 GPIO 7 is "Factory defaults" button - * - */ -static struct octeon_gpio_pin octeon_gpio_pins[] = { - { "F/D", 7, GPIO_PIN_INPUT}, - { NULL, 0, 0}, -}; - -/* - * Helpers - */ -static void octeon_gpio_pin_configure(struct octeon_gpio_softc *sc, - struct gpio_pin *pin, uint32_t flags); - -/* - * Driver stuff - */ -static void octeon_gpio_identify(driver_t *, device_t); -static int octeon_gpio_probe(device_t dev); -static int octeon_gpio_attach(device_t dev); -static int octeon_gpio_detach(device_t dev); -static int octeon_gpio_filter(void *arg); -static void octeon_gpio_intr(void *arg); - -/* - * GPIO interface - */ -static device_t octeon_gpio_get_bus(device_t); -static int octeon_gpio_pin_max(device_t dev, int *maxpin); -static int octeon_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps); -static int octeon_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t - *flags); -static int octeon_gpio_pin_getname(device_t dev, uint32_t pin, char *name); -static int octeon_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags); -static int octeon_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value); -static int octeon_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val); -static int octeon_gpio_pin_toggle(device_t dev, uint32_t pin); - -static void -octeon_gpio_pin_configure(struct octeon_gpio_softc *sc, struct gpio_pin *pin, - unsigned int flags) -{ - uint32_t mask; - cvmx_gpio_bit_cfgx_t gpio_cfgx; - - mask = 1 << pin->gp_pin; - GPIO_LOCK(sc); - - /* - * Manage input/output - */ - if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) { - gpio_cfgx.u64 = cvmx_read_csr(CVMX_GPIO_BIT_CFGX(pin->gp_pin)); - pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT); - if (flags & GPIO_PIN_OUTPUT) { - pin->gp_flags |= GPIO_PIN_OUTPUT; - gpio_cfgx.s.tx_oe = 1; - } - else { - pin->gp_flags |= GPIO_PIN_INPUT; - gpio_cfgx.s.tx_oe = 0; - } - if (flags & GPIO_PIN_INVIN) - gpio_cfgx.s.rx_xor = 1; - else - gpio_cfgx.s.rx_xor = 0; - cvmx_write_csr(CVMX_GPIO_BIT_CFGX(pin->gp_pin), gpio_cfgx.u64); - } - - GPIO_UNLOCK(sc); -} - -static device_t -octeon_gpio_get_bus(device_t dev) -{ - struct octeon_gpio_softc *sc; - - sc = device_get_softc(dev); - - return (sc->busdev); -} - -static int -octeon_gpio_pin_max(device_t dev, int *maxpin) -{ - - *maxpin = OCTEON_GPIO_PINS - 1; - return (0); -} - -static int -octeon_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) -{ - struct octeon_gpio_softc *sc = device_get_softc(dev); - int i; - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - GPIO_LOCK(sc); - *caps = sc->gpio_pins[i].gp_caps; - GPIO_UNLOCK(sc); - - return (0); -} - -static int -octeon_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) -{ - struct octeon_gpio_softc *sc = device_get_softc(dev); - int i; - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - GPIO_LOCK(sc); - *flags = sc->gpio_pins[i].gp_flags; - GPIO_UNLOCK(sc); - - return (0); -} - -static int -octeon_gpio_pin_getname(device_t dev, uint32_t pin, char *name) -{ - struct octeon_gpio_softc *sc = device_get_softc(dev); - int i; - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - GPIO_LOCK(sc); - memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME); - GPIO_UNLOCK(sc); - - return (0); -} - -static int -octeon_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) -{ - int i; - struct octeon_gpio_softc *sc = device_get_softc(dev); - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - octeon_gpio_pin_configure(sc, &sc->gpio_pins[i], flags); - - return (0); -} - -static int -octeon_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) -{ - struct octeon_gpio_softc *sc = device_get_softc(dev); - int i; - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - GPIO_LOCK(sc); - if (value) - cvmx_gpio_set(1 << pin); - else - cvmx_gpio_clear(1 << pin); - GPIO_UNLOCK(sc); - - return (0); -} - -static int -octeon_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) -{ - struct octeon_gpio_softc *sc = device_get_softc(dev); - int i; - uint64_t state; - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - GPIO_LOCK(sc); - state = cvmx_gpio_read(); - *val = (state & (1 << pin)) ? 1 : 0; - GPIO_UNLOCK(sc); - - return (0); -} - -static int -octeon_gpio_pin_toggle(device_t dev, uint32_t pin) -{ - int i; - uint64_t state; - struct octeon_gpio_softc *sc = device_get_softc(dev); - - for (i = 0; i < sc->gpio_npins; i++) { - if (sc->gpio_pins[i].gp_pin == pin) - break; - } - - if (i >= sc->gpio_npins) - return (EINVAL); - - GPIO_LOCK(sc); - /* - * XXX: Need to check if read returns actual state of output - * pins or we need to keep this information by ourself - */ - state = cvmx_gpio_read(); - if (state & (1 << pin)) - cvmx_gpio_clear(1 << pin); - else - cvmx_gpio_set(1 << pin); - GPIO_UNLOCK(sc); - - return (0); -} - -static int -octeon_gpio_filter(void *arg) -{ - cvmx_gpio_bit_cfgx_t gpio_cfgx; - void **cookie = arg; - struct octeon_gpio_softc *sc = *cookie; - long int irq = (cookie - sc->gpio_intr_cookies); - - if ((irq < 0) || (irq >= OCTEON_GPIO_IRQS)) - return (FILTER_STRAY); - - gpio_cfgx.u64 = cvmx_read_csr(CVMX_GPIO_BIT_CFGX(irq)); - /* Clear rising edge detector */ - if (gpio_cfgx.s.int_type == OCTEON_GPIO_IRQ_EDGE) - cvmx_gpio_interrupt_clear(1 << irq); - /* disable interrupt */ - gpio_cfgx.s.int_en = 0; - cvmx_write_csr(CVMX_GPIO_BIT_CFGX(irq), gpio_cfgx.u64); - - return (FILTER_SCHEDULE_THREAD); -} - -static void -octeon_gpio_intr(void *arg) -{ - cvmx_gpio_bit_cfgx_t gpio_cfgx; - void **cookie = arg; - struct octeon_gpio_softc *sc = *cookie; - long int irq = (cookie - sc->gpio_intr_cookies); - - if ((irq < 0) || (irq >= OCTEON_GPIO_IRQS)) { - printf("%s: invalid GPIO IRQ: %ld\n", - __func__, irq); - return; - } - - GPIO_LOCK(sc); - gpio_cfgx.u64 = cvmx_read_csr(CVMX_GPIO_BIT_CFGX(irq)); - /* disable interrupt */ - gpio_cfgx.s.int_en = 1; - cvmx_write_csr(CVMX_GPIO_BIT_CFGX(irq), gpio_cfgx.u64); - - /* TODO: notify bus here or something */ - printf("GPIO IRQ for pin %ld\n", irq); - GPIO_UNLOCK(sc); -} - -static void -octeon_gpio_identify(driver_t *drv, device_t parent) -{ - - BUS_ADD_CHILD(parent, 0, "gpio", 0); -} - -static int -octeon_gpio_probe(device_t dev) -{ - - device_set_desc(dev, "Cavium Octeon GPIO driver"); - return (0); -} - -static int -octeon_gpio_attach(device_t dev) -{ - struct octeon_gpio_softc *sc = device_get_softc(dev); - struct octeon_gpio_pin *pinp; - cvmx_gpio_bit_cfgx_t gpio_cfgx; - - int i; - - KASSERT((device_get_unit(dev) == 0), - ("octeon_gpio: Only one gpio module supported")); - - mtx_init(&sc->gpio_mtx, device_get_nameunit(dev), NULL, MTX_DEF); - - for ( i = 0; i < OCTEON_GPIO_IRQS; i++) { - if ((sc->gpio_irq_res[i] = bus_alloc_resource(dev, - SYS_RES_IRQ, &sc->gpio_irq_rid[i], - OCTEON_IRQ_GPIO0 + i, OCTEON_IRQ_GPIO0 + i, 1, - RF_SHAREABLE | RF_ACTIVE)) == NULL) { - device_printf(dev, "unable to allocate IRQ resource\n"); - octeon_gpio_detach(dev); - return (ENXIO); - } - - sc->gpio_intr_cookies[i] = sc; - if ((bus_setup_intr(dev, sc->gpio_irq_res[i], INTR_TYPE_MISC, - octeon_gpio_filter, octeon_gpio_intr, - &(sc->gpio_intr_cookies[i]), &sc->gpio_ih[i]))) { - device_printf(dev, - "WARNING: unable to register interrupt handler\n"); - octeon_gpio_detach(dev); - return (ENXIO); - } - } - - sc->dev = dev; - /* Configure all pins as input */ - /* disable interrupts for all pins */ - pinp = octeon_gpio_pins; - i = 0; - while (pinp->name) { - strncpy(sc->gpio_pins[i].gp_name, pinp->name, GPIOMAXNAME); - sc->gpio_pins[i].gp_pin = pinp->pin; - sc->gpio_pins[i].gp_caps = DEFAULT_CAPS; - sc->gpio_pins[i].gp_flags = 0; - octeon_gpio_pin_configure(sc, &sc->gpio_pins[i], pinp->flags); - pinp++; - i++; - } - - sc->gpio_npins = i; - -#if 0 - /* - * Sample: how to enable edge-triggered interrupt - * for GPIO pin - */ - gpio_cfgx.u64 = cvmx_read_csr(CVMX_GPIO_BIT_CFGX(7)); - gpio_cfgx.s.int_en = 1; - gpio_cfgx.s.int_type = OCTEON_GPIO_IRQ_EDGE; - cvmx_write_csr(CVMX_GPIO_BIT_CFGX(7), gpio_cfgx.u64); -#endif - - if (bootverbose) { - for (i = 0; i < 16; i++) { - gpio_cfgx.u64 = cvmx_read_csr(CVMX_GPIO_BIT_CFGX(i)); - device_printf(dev, "[pin%d] output=%d, invinput=%d, intr=%d, intr_type=%s\n", - i, gpio_cfgx.s.tx_oe, gpio_cfgx.s.rx_xor, - gpio_cfgx.s.int_en, gpio_cfgx.s.int_type ? "rising edge" : "level"); - } - } - sc->busdev = gpiobus_attach_bus(dev); - if (sc->busdev == NULL) { - octeon_gpio_detach(dev); - return (ENXIO); - } - - return (0); -} - -static int -octeon_gpio_detach(device_t dev) -{ - struct octeon_gpio_softc *sc = device_get_softc(dev); - int i; - - KASSERT(mtx_initialized(&sc->gpio_mtx), ("gpio mutex not initialized")); - - for ( i = 0; i < OCTEON_GPIO_IRQS; i++) { - if (sc->gpio_ih[i]) - bus_teardown_intr(dev, sc->gpio_irq_res[i], - sc->gpio_ih[i]); - if (sc->gpio_irq_res[i]) - bus_release_resource(dev, SYS_RES_IRQ, - sc->gpio_irq_rid[i], sc->gpio_irq_res[i]); - } - gpiobus_detach_bus(dev); - mtx_destroy(&sc->gpio_mtx); - - return(0); -} - -static device_method_t octeon_gpio_methods[] = { - DEVMETHOD(device_identify, octeon_gpio_identify), - DEVMETHOD(device_probe, octeon_gpio_probe), - DEVMETHOD(device_attach, octeon_gpio_attach), - DEVMETHOD(device_detach, octeon_gpio_detach), - - /* GPIO protocol */ - DEVMETHOD(gpio_get_bus, octeon_gpio_get_bus), - DEVMETHOD(gpio_pin_max, octeon_gpio_pin_max), - DEVMETHOD(gpio_pin_getname, octeon_gpio_pin_getname), - DEVMETHOD(gpio_pin_getflags, octeon_gpio_pin_getflags), - DEVMETHOD(gpio_pin_getcaps, octeon_gpio_pin_getcaps), - DEVMETHOD(gpio_pin_setflags, octeon_gpio_pin_setflags), - DEVMETHOD(gpio_pin_get, octeon_gpio_pin_get), - DEVMETHOD(gpio_pin_set, octeon_gpio_pin_set), - DEVMETHOD(gpio_pin_toggle, octeon_gpio_pin_toggle), - {0, 0}, -}; - -static driver_t octeon_gpio_driver = { - "gpio", - octeon_gpio_methods, - sizeof(struct octeon_gpio_softc), -}; -static devclass_t octeon_gpio_devclass; - -DRIVER_MODULE(octeon_gpio, ciu, octeon_gpio_driver, octeon_gpio_devclass, 0, 0); diff --git a/sys/mips/cavium/octeon_gpiovar.h b/sys/mips/cavium/octeon_gpiovar.h deleted file mode 100644 index 073e4292131..00000000000 --- a/sys/mips/cavium/octeon_gpiovar.h +++ /dev/null @@ -1,56 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#ifndef __OCTEON_GPIOVAR_H__ -#define __OCTEON_GPIOVAR_H__ - -#define GPIO_LOCK(_sc) mtx_lock(&(_sc)->gpio_mtx) -#define GPIO_UNLOCK(_sc) mtx_unlock(&(_sc)->gpio_mtx) -#define GPIO_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->gpio_mtx, MA_OWNED) - -#define OCTEON_GPIO_IRQ_LEVEL 0 -#define OCTEON_GPIO_IRQ_EDGE 1 - -#define OCTEON_GPIO_PINS 24 -#define OCTEON_GPIO_IRQS 16 - -struct octeon_gpio_softc { - device_t dev; - device_t busdev; - struct mtx gpio_mtx; - struct resource *gpio_irq_res[OCTEON_GPIO_IRQS]; - int gpio_irq_rid[OCTEON_GPIO_IRQS]; - void *gpio_ih[OCTEON_GPIO_IRQS]; - void *gpio_intr_cookies[OCTEON_GPIO_IRQS]; - int gpio_npins; - struct gpio_pin gpio_pins[OCTEON_GPIO_PINS]; -}; - -#endif /* __OCTEON_GPIOVAR_H__ */ diff --git a/sys/mips/cavium/octeon_irq.h b/sys/mips/cavium/octeon_irq.h deleted file mode 100644 index 9b2dde4458e..00000000000 --- a/sys/mips/cavium/octeon_irq.h +++ /dev/null @@ -1,182 +0,0 @@ -/***********************license start*************** - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights - * reserved. - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - - * * Neither the name of Cavium Networks nor the names of - * its contributors may be used to endorse or promote products - * derived from this software without specific prior written - * permission. - - * This Software, including technical data, may be subject to U.S. export control - * laws, including the U.S. Export Administration Act and its associated - * regulations, and may be subject to export or import regulations in other - * countries. - - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" - * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR - * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO - * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR - * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM - * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, - * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF - * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR - * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR - * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - ***********************license end**************************************/ - -#ifndef __OCTEON_IRQ_H__ -#define __OCTEON_IRQ_H__ - -/* - */ - -/** - * Enumeration of Interrupt numbers - */ -typedef enum -{ - /* 0 - 7 represent the 8 MIPS standard interrupt sources */ - OCTEON_IRQ_SW0 = 0, - OCTEON_IRQ_SW1 = 1, - OCTEON_IRQ_CIU0 = 2, - OCTEON_IRQ_CIU1 = 3, - OCTEON_IRQ_4 = 4, - OCTEON_IRQ_5 = 5, - OCTEON_IRQ_6 = 6, - OCTEON_IRQ_7 = 7, - - /* 8 - 71 represent the sources in CIU_INTX_EN0 */ - OCTEON_IRQ_WORKQ0 = 8, - OCTEON_IRQ_WORKQ1 = 9, - OCTEON_IRQ_WORKQ2 = 10, - OCTEON_IRQ_WORKQ3 = 11, - OCTEON_IRQ_WORKQ4 = 12, - OCTEON_IRQ_WORKQ5 = 13, - OCTEON_IRQ_WORKQ6 = 14, - OCTEON_IRQ_WORKQ7 = 15, - OCTEON_IRQ_WORKQ8 = 16, - OCTEON_IRQ_WORKQ9 = 17, - OCTEON_IRQ_WORKQ10 = 18, - OCTEON_IRQ_WORKQ11 = 19, - OCTEON_IRQ_WORKQ12 = 20, - OCTEON_IRQ_WORKQ13 = 21, - OCTEON_IRQ_WORKQ14 = 22, - OCTEON_IRQ_WORKQ15 = 23, - OCTEON_IRQ_GPIO0 = 24, - OCTEON_IRQ_GPIO1 = 25, - OCTEON_IRQ_GPIO2 = 26, - OCTEON_IRQ_GPIO3 = 27, - OCTEON_IRQ_GPIO4 = 28, - OCTEON_IRQ_GPIO5 = 29, - OCTEON_IRQ_GPIO6 = 30, - OCTEON_IRQ_GPIO7 = 31, - OCTEON_IRQ_GPIO8 = 32, - OCTEON_IRQ_GPIO9 = 33, - OCTEON_IRQ_GPIO10 = 34, - OCTEON_IRQ_GPIO11 = 35, - OCTEON_IRQ_GPIO12 = 36, - OCTEON_IRQ_GPIO13 = 37, - OCTEON_IRQ_GPIO14 = 38, - OCTEON_IRQ_GPIO15 = 39, - OCTEON_IRQ_MBOX0 = 40, - OCTEON_IRQ_MBOX1 = 41, - OCTEON_IRQ_UART0 = 42, - OCTEON_IRQ_UART1 = 43, - OCTEON_IRQ_PCI_INT0 = 44, - OCTEON_IRQ_PCI_INT1 = 45, - OCTEON_IRQ_PCI_INT2 = 46, - OCTEON_IRQ_PCI_INT3 = 47, - OCTEON_IRQ_PCI_MSI0 = 48, - OCTEON_IRQ_PCI_MSI1 = 49, - OCTEON_IRQ_PCI_MSI2 = 50, - OCTEON_IRQ_PCI_MSI3 = 51, - OCTEON_IRQ_RESERVED44 = 52, - OCTEON_IRQ_TWSI = 53, - OCTEON_IRQ_RML = 54, - OCTEON_IRQ_TRACE = 55, - OCTEON_IRQ_GMX_DRP0 = 56, - OCTEON_IRQ_GMX_DRP1 = 57, /* Doesn't apply on CN52XX or CN63XX */ - OCTEON_IRQ_IPD_DRP = 58, - OCTEON_IRQ_KEY_ZERO = 59, /* Doesn't apply on CN52XX or CN63XX */ - OCTEON_IRQ_TIMER0 = 60, - OCTEON_IRQ_TIMER1 = 61, - OCTEON_IRQ_TIMER2 = 62, - OCTEON_IRQ_TIMER3 = 63, - OCTEON_IRQ_USB0 = 64, /* Doesn't apply on CN38XX or CN58XX */ - OCTEON_IRQ_PCM = 65, /* Doesn't apply on CN52XX or CN63XX */ - OCTEON_IRQ_MPI = 66, /* Doesn't apply on CN52XX or CN63XX */ - OCTEON_IRQ_TWSI2 = 67, /* Added in CN56XX */ - OCTEON_IRQ_POWIQ = 68, /* Added in CN56XX */ - OCTEON_IRQ_IPDPPTHR = 69, /* Added in CN56XX */ - OCTEON_IRQ_MII = 70, /* Added in CN56XX */ - OCTEON_IRQ_BOOTDMA = 71, /* Added in CN56XX */ - - /* 72 - 135 represent the sources in CIU_INTX_EN1 */ - OCTEON_IRQ_WDOG0 = 72, - OCTEON_IRQ_WDOG1 = 73, - OCTEON_IRQ_WDOG2 = 74, - OCTEON_IRQ_WDOG3 = 75, - OCTEON_IRQ_WDOG4 = 76, - OCTEON_IRQ_WDOG5 = 77, - OCTEON_IRQ_WDOG6 = 78, - OCTEON_IRQ_WDOG7 = 79, - OCTEON_IRQ_WDOG8 = 80, - OCTEON_IRQ_WDOG9 = 81, - OCTEON_IRQ_WDOG10= 82, - OCTEON_IRQ_WDOG11= 83, - OCTEON_IRQ_WDOG12= 84, - OCTEON_IRQ_WDOG13= 85, - OCTEON_IRQ_WDOG14= 86, - OCTEON_IRQ_WDOG15= 87, - OCTEON_IRQ_UART2 = 88, /* Added in CN52XX */ - OCTEON_IRQ_USB1 = 89, /* Added in CN52XX */ - OCTEON_IRQ_MII1 = 90, /* Added in CN52XX */ - OCTEON_IRQ_NAND = 91, /* Added in CN52XX */ - OCTEON_IRQ_MIO = 92, /* Added in CN63XX */ - OCTEON_IRQ_IOB = 93, /* Added in CN63XX */ - OCTEON_IRQ_FPA = 94, /* Added in CN63XX */ - OCTEON_IRQ_POW = 95, /* Added in CN63XX */ - OCTEON_IRQ_L2C = 96, /* Added in CN63XX */ - OCTEON_IRQ_IPD = 97, /* Added in CN63XX */ - OCTEON_IRQ_PIP = 98, /* Added in CN63XX */ - OCTEON_IRQ_PKO = 99, /* Added in CN63XX */ - OCTEON_IRQ_ZIP = 100, /* Added in CN63XX */ - OCTEON_IRQ_TIM = 101, /* Added in CN63XX */ - OCTEON_IRQ_RAD = 102, /* Added in CN63XX */ - OCTEON_IRQ_KEY = 103, /* Added in CN63XX */ - OCTEON_IRQ_DFA = 104, /* Added in CN63XX */ - OCTEON_IRQ_USB = 105, /* Added in CN63XX */ - OCTEON_IRQ_SLI = 106, /* Added in CN63XX */ - OCTEON_IRQ_DPI = 107, /* Added in CN63XX */ - OCTEON_IRQ_AGX0 = 108, /* Added in CN63XX */ - /* 109 - 117 are reserved */ - OCTEON_IRQ_AGL = 118, /* Added in CN63XX */ - OCTEON_IRQ_PTP = 119, /* Added in CN63XX */ - OCTEON_IRQ_PEM0 = 120, /* Added in CN63XX */ - OCTEON_IRQ_PEM1 = 121, /* Added in CN63XX */ - OCTEON_IRQ_SRIO0 = 122, /* Added in CN63XX */ - OCTEON_IRQ_SRIO1 = 123, /* Added in CN63XX */ - OCTEON_IRQ_LMC0 = 124, /* Added in CN63XX */ - /* Interrupts 125 - 127 are reserved */ - OCTEON_IRQ_DFM = 128, /* Added in CN63XX */ - /* Interrupts 129 - 135 are reserved */ -} octeon_irq_t; - -#define OCTEON_PMC_IRQ OCTEON_IRQ_4 - -#endif diff --git a/sys/mips/cavium/octeon_machdep.c b/sys/mips/cavium/octeon_machdep.c deleted file mode 100644 index 9bcc1b1c3f3..00000000000 --- a/sys/mips/cavium/octeon_machdep.c +++ /dev/null @@ -1,694 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Wojciech A. Koszek - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include - -#if defined(__mips_n64) -#define MAX_APP_DESC_ADDR 0xffffffffafffffff -#else -#define MAX_APP_DESC_ADDR 0xafffffff -#endif - -struct octeon_feature_description { - octeon_feature_t ofd_feature; - const char *ofd_string; -}; - -extern int *end; -static char octeon_kenv[0x2000]; - -static const struct octeon_feature_description octeon_feature_descriptions[] = { - { OCTEON_FEATURE_SAAD, "SAAD" }, - { OCTEON_FEATURE_ZIP, "ZIP" }, - { OCTEON_FEATURE_CRYPTO, "CRYPTO" }, - { OCTEON_FEATURE_DORM_CRYPTO, "DORM_CRYPTO" }, - { OCTEON_FEATURE_PCIE, "PCIE" }, - { OCTEON_FEATURE_SRIO, "SRIO" }, - { OCTEON_FEATURE_KEY_MEMORY, "KEY_MEMORY" }, - { OCTEON_FEATURE_LED_CONTROLLER, "LED_CONTROLLER" }, - { OCTEON_FEATURE_TRA, "TRA" }, - { OCTEON_FEATURE_MGMT_PORT, "MGMT_PORT" }, - { OCTEON_FEATURE_RAID, "RAID" }, - { OCTEON_FEATURE_USB, "USB" }, - { OCTEON_FEATURE_NO_WPTR, "NO_WPTR" }, - { OCTEON_FEATURE_DFA, "DFA" }, - { OCTEON_FEATURE_MDIO_CLAUSE_45, "MDIO_CLAUSE_45" }, - { OCTEON_FEATURE_NPEI, "NPEI" }, - { OCTEON_FEATURE_ILK, "ILK" }, - { OCTEON_FEATURE_HFA, "HFA" }, - { OCTEON_FEATURE_DFM, "DFM" }, - { OCTEON_FEATURE_CIU2, "CIU2" }, - { OCTEON_FEATURE_DICI_MODE, "DICI_MODE" }, - { OCTEON_FEATURE_BIT_EXTRACTOR, "BIT_EXTRACTOR" }, - { OCTEON_FEATURE_NAND, "NAND" }, - { OCTEON_FEATURE_MMC, "MMC" }, - { OCTEON_FEATURE_PKND, "PKND" }, - { OCTEON_FEATURE_CN68XX_WQE, "CN68XX_WQE" }, - { 0, NULL } -}; - -static uint64_t octeon_get_ticks(void); -static unsigned octeon_get_timecount(struct timecounter *tc); - -static void octeon_boot_params_init(register_t ptr); -static void octeon_init_kenv(register_t ptr); - -static struct timecounter octeon_timecounter = { - octeon_get_timecount, /* get_timecount */ - 0, /* no poll_pps */ - 0xffffffffu, /* octeon_mask */ - 0, /* frequency */ - "Octeon", /* name */ - 900, /* quality (adjusted in code) */ -}; - -void -platform_cpu_init() -{ - /* Nothing special yet */ -} - -/* - * Perform a board-level soft-reset. - */ -void -platform_reset(void) -{ - cvmx_write_csr(CVMX_CIU_SOFT_RST, 1); -} - -/* - * octeon_debug_symbol - * - * Does nothing. - * Used to mark the point for simulator to begin tracing - */ -void -octeon_debug_symbol(void) -{ -} - -/* - * octeon_ciu_reset - * - * Shutdown all CIU to IP2, IP3 mappings - */ -void -octeon_ciu_reset(void) -{ - uint64_t cvmctl; - - /* Disable all CIU interrupts by default */ - cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2), 0); - cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2+1), 0); - cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2), 0); - cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2+1), 0); - -#ifdef SMP - /* Enable the MBOX interrupts. */ - cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2+1), - (1ull << (OCTEON_IRQ_MBOX0 - 8)) | - (1ull << (OCTEON_IRQ_MBOX1 - 8))); -#endif - - /* - * Move the Performance Counter interrupt to OCTEON_PMC_IRQ - */ - cvmctl = mips_rd_cvmctl(); - cvmctl &= ~(7 << 7); - cvmctl |= (OCTEON_PMC_IRQ + 2) << 7; - mips_wr_cvmctl(cvmctl); -} - -static void -octeon_memory_init(void) -{ - vm_paddr_t phys_end; - int64_t addr; - unsigned i, j; - - phys_end = round_page(MIPS_KSEG0_TO_PHYS((vm_offset_t)&end)); - - if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) { - /* Simulator we limit to 96 meg */ - phys_avail[0] = phys_end; - phys_avail[1] = 96 << 20; - - dump_avail[0] = phys_avail[0]; - dump_avail[1] = phys_avail[1]; - - realmem = physmem = btoc(phys_avail[1] - phys_avail[0]); - return; - } - - /* - * Allocate memory from bootmem 1MB at a time and merge - * adjacent entries. - */ - i = 0; - while (i < PHYS_AVAIL_ENTRIES) { - /* - * If there is less than 2MB of memory available in 128-byte - * blocks, do not steal any more memory. We need to leave some - * memory for the command queues to be allocated out of. - */ - if (cvmx_bootmem_available_mem(128) < 2 << 20) - break; - - addr = cvmx_bootmem_phy_alloc(1 << 20, phys_end, - ~(vm_paddr_t)0, PAGE_SIZE, 0); - if (addr == -1) - break; - - /* - * The SDK needs to be able to easily map any memory that might - * come to it e.g. in the form of an mbuf. Because on !n64 we - * can't direct-map some addresses and we don't want to manage - * temporary mappings within the SDK, don't feed memory that - * can't be direct-mapped to the kernel. - */ -#if !defined(__mips_n64) - if (!MIPS_DIRECT_MAPPABLE(addr + (1 << 20) - 1)) - continue; -#endif - - physmem += btoc(1 << 20); - - if (i > 0 && phys_avail[i - 1] == addr) { - phys_avail[i - 1] += 1 << 20; - continue; - } - - phys_avail[i + 0] = addr; - phys_avail[i + 1] = addr + (1 << 20); - - i += 2; - } - - for (j = 0; j < i; j++) - dump_avail[j] = phys_avail[j]; - - realmem = physmem; -} - -void -platform_start(__register_t a0, __register_t a1, __register_t a2 __unused, - __register_t a3) -{ - const struct octeon_feature_description *ofd; - uint64_t platform_counter_freq; - int rv; - - mips_postboot_fixup(); - - /* - * Initialize boot parameters so that we can determine things like - * which console we shoud use, etc. - */ - octeon_boot_params_init(a3); - - /* Initialize pcpu stuff */ - mips_pcpu0_init(); - mips_timer_early_init(cvmx_sysinfo_get()->cpu_clock_hz); - - /* Initialize console. */ - cninit(); - - /* - * Display information about the CPU. - */ -#if !defined(OCTEON_MODEL) - printf("Using runtime CPU model checks.\n"); -#else - printf("Compiled for CPU model: " __XSTRING(OCTEON_MODEL) "\n"); -#endif - strcpy(cpu_model, octeon_model_get_string(cvmx_get_proc_id())); - printf("CPU Model: %s\n", cpu_model); - printf("CPU clock: %uMHz Core Mask: %#x\n", - cvmx_sysinfo_get()->cpu_clock_hz / 1000000, - cvmx_sysinfo_get()->core_mask); - rv = octeon_model_version_check(cvmx_get_proc_id()); - if (rv == -1) - panic("%s: kernel not compatible with this processor.", __func__); - - /* - * Display information about the board. - */ -#if defined(OCTEON_BOARD_CAPK_0100ND) - strcpy(cpu_board, "CAPK-0100ND"); - if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_CN3010_EVB_HS5) { - panic("Compiled for %s, but board type is %s.", cpu_board, - cvmx_board_type_to_string(cvmx_sysinfo_get()->board_type)); - } -#else - strcpy(cpu_board, - cvmx_board_type_to_string(cvmx_sysinfo_get()->board_type)); -#endif - printf("Board: %s\n", cpu_board); - printf("Board Type: %u Revision: %u/%u\n", - cvmx_sysinfo_get()->board_type, - cvmx_sysinfo_get()->board_rev_major, - cvmx_sysinfo_get()->board_rev_minor); - printf("Serial number: %s\n", cvmx_sysinfo_get()->board_serial_number); - - /* - * Additional on-chip hardware/settings. - * - * XXX Display PCI host/target? What else? - */ - printf("MAC address base: %6D (%u configured)\n", - cvmx_sysinfo_get()->mac_addr_base, ":", - cvmx_sysinfo_get()->mac_addr_count); - - octeon_ciu_reset(); - /* - * Convert U-Boot 'bootoctlinux' loader command line arguments into - * boot flags and kernel environment variables. - */ - bootverbose = 1; - octeon_init_kenv(a3); - - /* - * For some reason on the cn38xx simulator ebase register is set to - * 0x80001000 at bootup time. Move it back to the default, but - * when we move to having support for multiple executives, we need - * to rethink this. - */ - mips_wr_ebase(0x80000000); - - octeon_memory_init(); - init_param1(); - init_param2(physmem); - mips_cpu_init(); - pmap_bootstrap(); - mips_proc0_init(); - mutex_init(); - kdb_init(); -#ifdef KDB - if (boothowto & RB_KDB) - kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); -#endif - cpu_clock = cvmx_sysinfo_get()->cpu_clock_hz; - platform_counter_freq = cpu_clock; - octeon_timecounter.tc_frequency = cpu_clock; - platform_timecounter = &octeon_timecounter; - mips_timer_init_params(platform_counter_freq, 0); - set_cputicker(octeon_get_ticks, cpu_clock, 0); - -#ifdef SMP - /* - * Clear any pending IPIs. - */ - cvmx_write_csr(CVMX_CIU_MBOX_CLRX(0), 0xffffffff); -#endif - - printf("Octeon SDK: %s\n", OCTEON_SDK_VERSION_STRING); - printf("Available Octeon features:"); - for (ofd = octeon_feature_descriptions; ofd->ofd_string != NULL; ofd++) - if (octeon_has_feature(ofd->ofd_feature)) - printf(" %s", ofd->ofd_string); - printf("\n"); -} - -static uint64_t -octeon_get_ticks(void) -{ - uint64_t cvmcount; - - CVMX_MF_CYCLE(cvmcount); - return (cvmcount); -} - -static unsigned -octeon_get_timecount(struct timecounter *tc) -{ - return ((unsigned)octeon_get_ticks()); -} - -static int -sysctl_machdep_led_display(SYSCTL_HANDLER_ARGS) -{ - size_t buflen; - char buf[9]; - int error; - - if (req->newptr == NULL) - return (EINVAL); - - if (cvmx_sysinfo_get()->led_display_base_addr == 0) - return (ENODEV); - - /* - * Revision 1.x of the EBT3000 only supports 4 characters, but - * other devices support 8. - */ - if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 && - cvmx_sysinfo_get()->board_rev_major == 1) - buflen = 4; - else - buflen = 8; - - if (req->newlen > buflen) - return (E2BIG); - - error = SYSCTL_IN(req, buf, req->newlen); - if (error != 0) - return (error); - - buf[req->newlen] = '\0'; - ebt3000_str_write(buf); - - return (0); -} - -SYSCTL_PROC(_machdep, OID_AUTO, led_display, - CTLTYPE_STRING | CTLFLAG_WR | CTLFLAG_NEEDGIANT, NULL, 0, - sysctl_machdep_led_display, "A", - "String to display on LED display"); - -void -cvmx_dvprintf(const char *fmt, va_list ap) -{ - if (!bootverbose) - return; - vprintf(fmt, ap); -} - -void -cvmx_dprintf(const char *fmt, ...) -{ - va_list ap; - - va_start(ap, fmt); - cvmx_dvprintf(fmt, ap); - va_end(ap); -} - -/** - * version of printf that works better in exception context. - * - * @param format - * - * XXX If this function weren't in cvmx-interrupt.c, we'd use the SDK version. - */ -void cvmx_safe_printf(const char *format, ...) -{ - char buffer[256]; - char *ptr = buffer; - int count; - va_list args; - - va_start(args, format); -#ifndef __U_BOOT__ - count = vsnprintf(buffer, sizeof(buffer), format, args); -#else - count = vsprintf(buffer, format, args); -#endif - va_end(args); - - while (count-- > 0) - { - cvmx_uart_lsr_t lsrval; - - /* Spin until there is room */ - do - { - lsrval.u64 = cvmx_read_csr(CVMX_MIO_UARTX_LSR(0)); -#if !defined(CONFIG_OCTEON_SIM_SPEED) - if (lsrval.s.temt == 0) - cvmx_wait(10000); /* Just to reduce the load on the system */ -#endif - } - while (lsrval.s.temt == 0); - - if (*ptr == '\n') - cvmx_write_csr(CVMX_MIO_UARTX_THR(0), '\r'); - cvmx_write_csr(CVMX_MIO_UARTX_THR(0), *ptr++); - } -} - -/* impSTART: This stuff should move back into the Cavium SDK */ -/* - **************************************************************************************** - * - * APP/BOOT DESCRIPTOR STUFF - * - **************************************************************************************** - */ - -/* Define the struct that is initialized by the bootloader used by the - * startup code. - * - * Copyright (c) 2004, 2005, 2006 Cavium Networks. - * - * The authors hereby grant permission to use, copy, modify, distribute, - * and license this software and its documentation for any purpose, provided - * that existing copyright notices are retained in all copies and that this - * notice is included verbatim in any distributions. No written agreement, - * license, or royalty fee is required for any of the authorized uses. - * Modifications to this software may be copyrighted by their authors - * and need not follow the licensing terms described here, provided that - * the new terms are clearly indicated on the first page of each file where - * they apply. - */ - -#define OCTEON_CURRENT_DESC_VERSION 6 -#define OCTEON_ARGV_MAX_ARGS (64) -#define OCTOEN_SERIAL_LEN 20 - -typedef struct { - /* Start of block referenced by assembly code - do not change! */ - uint32_t desc_version; - uint32_t desc_size; - - uint64_t stack_top; - uint64_t heap_base; - uint64_t heap_end; - uint64_t entry_point; /* Only used by bootloader */ - uint64_t desc_vaddr; - /* End of This block referenced by assembly code - do not change! */ - - uint32_t exception_base_addr; - uint32_t stack_size; - uint32_t heap_size; - uint32_t argc; /* Argc count for application */ - uint32_t argv[OCTEON_ARGV_MAX_ARGS]; - uint32_t flags; - uint32_t core_mask; - uint32_t dram_size; /**< DRAM size in megabyes */ - uint32_t phy_mem_desc_addr; /**< physical address of free memory descriptor block*/ - uint32_t debugger_flags_base_addr; /**< used to pass flags from app to debugger */ - uint32_t eclock_hz; /**< CPU clock speed, in hz */ - uint32_t dclock_hz; /**< DRAM clock speed, in hz */ - uint32_t spi_clock_hz; /**< SPI4 clock in hz */ - uint16_t board_type; - uint8_t board_rev_major; - uint8_t board_rev_minor; - uint16_t chip_type; - uint8_t chip_rev_major; - uint8_t chip_rev_minor; - char board_serial_number[OCTOEN_SERIAL_LEN]; - uint8_t mac_addr_base[6]; - uint8_t mac_addr_count; - uint64_t cvmx_desc_vaddr; -} octeon_boot_descriptor_t; - -static cvmx_bootinfo_t * -octeon_process_app_desc_ver_6(octeon_boot_descriptor_t *app_desc_ptr) -{ - cvmx_bootinfo_t *octeon_bootinfo; - - /* XXX Why is 0x00000000ffffffffULL a bad value? */ - if (app_desc_ptr->cvmx_desc_vaddr == 0 || - app_desc_ptr->cvmx_desc_vaddr == 0xfffffffful) { - cvmx_safe_printf("Bad octeon_bootinfo %#jx\n", - (uintmax_t)app_desc_ptr->cvmx_desc_vaddr); - return (NULL); - } - - octeon_bootinfo = cvmx_phys_to_ptr(app_desc_ptr->cvmx_desc_vaddr); - if (octeon_bootinfo->major_version != 1) { - cvmx_safe_printf("Incompatible CVMX descriptor from bootloader: %d.%d %p\n", - (int) octeon_bootinfo->major_version, - (int) octeon_bootinfo->minor_version, octeon_bootinfo); - return (NULL); - } - - cvmx_sysinfo_minimal_initialize(octeon_bootinfo->phy_mem_desc_addr, - octeon_bootinfo->board_type, - octeon_bootinfo->board_rev_major, - octeon_bootinfo->board_rev_minor, - octeon_bootinfo->eclock_hz); - memcpy(cvmx_sysinfo_get()->mac_addr_base, - octeon_bootinfo->mac_addr_base, 6); - cvmx_sysinfo_get()->mac_addr_count = octeon_bootinfo->mac_addr_count; - cvmx_sysinfo_get()->compact_flash_common_base_addr = - octeon_bootinfo->compact_flash_common_base_addr; - cvmx_sysinfo_get()->compact_flash_attribute_base_addr = - octeon_bootinfo->compact_flash_attribute_base_addr; - cvmx_sysinfo_get()->core_mask = octeon_bootinfo->core_mask; - cvmx_sysinfo_get()->led_display_base_addr = - octeon_bootinfo->led_display_base_addr; - memcpy(cvmx_sysinfo_get()->board_serial_number, - octeon_bootinfo->board_serial_number, - sizeof cvmx_sysinfo_get()->board_serial_number); - return (octeon_bootinfo); -} - -static void -octeon_boot_params_init(register_t ptr) -{ - octeon_boot_descriptor_t *app_desc_ptr; - cvmx_bootinfo_t *octeon_bootinfo; - - if (ptr == 0 || ptr >= MAX_APP_DESC_ADDR) { - cvmx_safe_printf("app descriptor passed at invalid address %#jx\n", - (uintmax_t)ptr); - platform_reset(); - } - - app_desc_ptr = (octeon_boot_descriptor_t *)(intptr_t)ptr; - if (app_desc_ptr->desc_version < 6) { - cvmx_safe_printf("Your boot code is too old to be supported.\n"); - platform_reset(); - } - octeon_bootinfo = octeon_process_app_desc_ver_6(app_desc_ptr); - if (octeon_bootinfo == NULL) { - cvmx_safe_printf("Could not parse boot descriptor.\n"); - platform_reset(); - } - - if (cvmx_sysinfo_get()->led_display_base_addr != 0) { - /* - * Revision 1.x of the EBT3000 only supports 4 characters, but - * other devices support 8. - */ - if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 && - cvmx_sysinfo_get()->board_rev_major == 1) - ebt3000_str_write("FBSD"); - else - ebt3000_str_write("FreeBSD!"); - } - - if (cvmx_sysinfo_get()->phy_mem_desc_addr == (uint64_t)0) { - cvmx_safe_printf("Your boot loader did not supply a memory descriptor.\n"); - platform_reset(); - } - cvmx_bootmem_init(cvmx_sysinfo_get()->phy_mem_desc_addr); - - octeon_feature_init(); - - __cvmx_helper_cfg_init(); -} -/* impEND: This stuff should move back into the Cavium SDK */ - -/* - * The boot loader command line may specify kernel environment variables or - * applicable boot flags of boot(8). - */ -static void -octeon_init_kenv(register_t ptr) -{ - int i; - char *n; - char *v; - octeon_boot_descriptor_t *app_desc_ptr; - - app_desc_ptr = (octeon_boot_descriptor_t *)(intptr_t)ptr; - memset(octeon_kenv, 0, sizeof(octeon_kenv)); - init_static_kenv(octeon_kenv, sizeof(octeon_kenv)); - - for (i = 0; i < app_desc_ptr->argc; i++) { - v = cvmx_phys_to_ptr(app_desc_ptr->argv[i]); - if (v == NULL) - continue; - if (*v == '-') { - boothowto |= boot_parse_arg(v); - continue; - } - n = strsep(&v, "="); - if (v == NULL) - kern_setenv(n, "1"); - else - kern_setenv(n, v); - } -} diff --git a/sys/mips/cavium/octeon_mp.c b/sys/mips/cavium/octeon_mp.c deleted file mode 100644 index 21f05a0e6cf..00000000000 --- a/sys/mips/cavium/octeon_mp.c +++ /dev/null @@ -1,152 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004-2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include -#include - -unsigned octeon_ap_boot = ~0; - -void -platform_ipi_send(int cpuid) -{ - cvmx_write_csr(CVMX_CIU_MBOX_SETX(cpuid), 1); - mips_wbflush(); -} - -void -platform_ipi_clear(void) -{ - uint64_t action; - - action = cvmx_read_csr(CVMX_CIU_MBOX_CLRX(PCPU_GET(cpuid))); - KASSERT(action == 1, ("unexpected IPIs: %#jx", (uintmax_t)action)); - cvmx_write_csr(CVMX_CIU_MBOX_CLRX(PCPU_GET(cpuid)), action); -} - -int -platform_ipi_hardintr_num(void) -{ - - return (1); -} - -int -platform_ipi_softintr_num(void) -{ - - return (-1); -} - -void -platform_init_ap(int cpuid) -{ - unsigned ciu_int_mask, clock_int_mask, ipi_int_mask; - - /* - * Set the exception base. - */ - mips_wr_ebase(0x80000000); - - /* - * Clear any pending IPIs. - */ - cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cpuid), 0xffffffff); - - /* - * Set up interrupts. - */ - octeon_ciu_reset(); - - /* - * Unmask the clock, ipi and ciu interrupts. - */ - ciu_int_mask = hard_int_mask(0); - clock_int_mask = hard_int_mask(5); - ipi_int_mask = hard_int_mask(platform_ipi_hardintr_num()); - set_intr_mask(ciu_int_mask | clock_int_mask | ipi_int_mask); - - mips_wbflush(); -} - -void -platform_cpu_mask(cpuset_t *mask) -{ - uint64_t core_mask = cvmx_sysinfo_get()->core_mask; - uint64_t i, m; - - CPU_ZERO(mask); - for (i = 0, m = 1 ; i < MAXCPU; i++, m <<= 1) - if (core_mask & m) - CPU_SET(i, mask); -} - -struct cpu_group * -platform_smp_topo(void) -{ - return (smp_topo_none()); -} - -int -platform_start_ap(int cpuid) -{ - uint64_t cores_in_reset; - - /* - * Release the core if it is in reset, and let it rev up a bit. - * The real synchronization happens below via octeon_ap_boot. - */ - cores_in_reset = cvmx_read_csr(CVMX_CIU_PP_RST); - if (cores_in_reset & (1ULL << cpuid)) { - if (bootverbose) - printf ("AP #%d still in reset\n", cpuid); - cores_in_reset &= ~(1ULL << cpuid); - cvmx_write_csr(CVMX_CIU_PP_RST, (uint64_t)(cores_in_reset)); - DELAY(2000); /* Give it a moment to start */ - } - - if (atomic_cmpset_32(&octeon_ap_boot, ~0, cpuid) == 0) - return (-1); - for (;;) { - DELAY(1000); - if (atomic_cmpset_32(&octeon_ap_boot, 0, ~0) != 0) - return (0); - printf("Waiting for cpu%d to start\n", cpuid); - } -} diff --git a/sys/mips/cavium/octeon_nmi.S b/sys/mips/cavium/octeon_nmi.S deleted file mode 100644 index 902ec589aec..00000000000 --- a/sys/mips/cavium/octeon_nmi.S +++ /dev/null @@ -1,45 +0,0 @@ -/*- - * Copyright (c) 2010 Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include - -.set noreorder - -/* - * Only first 128 bytes of handler is used - */ -NESTED_NOPROFILE(octeon_wdog_nmi_handler, 32, ra) - .set push - .set noat - PTR_LA k0, _C_LABEL(octeon_wdog_nmi) - jr k0 - nop -1: - nop - j 1b - nop - .set at -END(octeon_wdog_nmi_handler) diff --git a/sys/mips/cavium/octeon_pci_console.c b/sys/mips/cavium/octeon_pci_console.c deleted file mode 100644 index 1921ee62e6d..00000000000 --- a/sys/mips/cavium/octeon_pci_console.c +++ /dev/null @@ -1,234 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#ifdef OCTEON_VENDOR_RADISYS -#define OPCIC_FLAG_RSYS (0x00000001) - -#define OPCIC_RSYS_FIFO_SIZE (0x2000) -#endif - -struct opcic_softc { - unsigned sc_flags; - uint64_t sc_base_addr; -}; - -static struct opcic_softc opcic_instance; - -static cn_probe_t opcic_cnprobe; -static cn_init_t opcic_cninit; -static cn_term_t opcic_cnterm; -static cn_getc_t opcic_cngetc; -static cn_putc_t opcic_cnputc; -static cn_grab_t opcic_cngrab; -static cn_ungrab_t opcic_cnungrab; - -#ifdef OCTEON_VENDOR_RADISYS -static int opcic_rsys_cngetc(struct opcic_softc *); -static void opcic_rsys_cnputc(struct opcic_softc *, int); -#endif - -CONSOLE_DRIVER(opcic); - -static void -opcic_cnprobe(struct consdev *cp) -{ - const struct cvmx_bootmem_named_block_desc *pci_console_block; - struct opcic_softc *sc; - - sc = &opcic_instance; - sc->sc_flags = 0; - sc->sc_base_addr = 0; - - cp->cn_pri = CN_DEAD; - - switch (cvmx_sysinfo_get()->board_type) { -#ifdef OCTEON_VENDOR_RADISYS - case CVMX_BOARD_TYPE_CUST_RADISYS_RSYS4GBE: - pci_console_block = - cvmx_bootmem_find_named_block("rsys_gbl_memory"); - if (pci_console_block != NULL) { - sc->sc_flags |= OPCIC_FLAG_RSYS; - sc->sc_base_addr = pci_console_block->base_addr; - break; - } -#endif - default: - pci_console_block = - cvmx_bootmem_find_named_block(OCTEON_PCI_CONSOLE_BLOCK_NAME); - if (pci_console_block == NULL) - return; - sc->sc_base_addr = pci_console_block->base_addr; - break; - } - - cp->cn_arg = sc; - snprintf(cp->cn_name, sizeof cp->cn_name, "opcic@%p", cp->cn_arg); - cp->cn_pri = (boothowto & RB_SERIAL) ? CN_REMOTE : CN_NORMAL; -} - -static void -opcic_cninit(struct consdev *cp) -{ - (void)cp; -} - -static void -opcic_cnterm(struct consdev *cp) -{ - (void)cp; -} - -static int -opcic_cngetc(struct consdev *cp) -{ - struct opcic_softc *sc; - char ch; - int rv; - - sc = cp->cn_arg; - -#ifdef OCTEON_VENDOR_RADISYS - if ((sc->sc_flags & OPCIC_FLAG_RSYS) != 0) - return (opcic_rsys_cngetc(sc)); -#endif - - rv = octeon_pci_console_read(sc->sc_base_addr, 0, &ch, 1, - OCT_PCI_CON_FLAG_NONBLOCK); - if (rv != 1) - return (-1); - return (ch); -} - -static void -opcic_cnputc(struct consdev *cp, int c) -{ - struct opcic_softc *sc; - char ch; - int rv; - - sc = cp->cn_arg; - ch = c; - -#ifdef OCTEON_VENDOR_RADISYS - if ((sc->sc_flags & OPCIC_FLAG_RSYS) != 0) { - opcic_rsys_cnputc(sc, c); - return; - } -#endif - - rv = octeon_pci_console_write(sc->sc_base_addr, 0, &ch, 1, 0); - if (rv == -1) - panic("%s: octeon_pci_console_write failed.", __func__); -} - -static void -opcic_cngrab(struct consdev *cp) -{ - (void)cp; -} - -static void -opcic_cnungrab(struct consdev *cp) -{ - (void)cp; -} - -#ifdef OCTEON_VENDOR_RADISYS -static int -opcic_rsys_cngetc(struct opcic_softc *sc) -{ - uint64_t gbl_base; - uint64_t console_base; - uint64_t console_rbuf; - uint64_t console_rcnt[2]; - uint16_t rcnt[2]; - uint16_t roff; - int c; - - gbl_base = CVMX_ADD_IO_SEG(sc->sc_base_addr); - console_base = gbl_base + 0x10; - - console_rbuf = console_base + 0x2018; - console_rcnt[0] = console_base + 0x08; - console_rcnt[1] = console_base + 0x0a; - - /* Check if there is anything new in the FIFO. */ - rcnt[0] = cvmx_read64_uint16(console_rcnt[0]); - rcnt[1] = cvmx_read64_uint16(console_rcnt[1]); - if (rcnt[0] == rcnt[1]) - return (-1); - - /* Get first new character in the FIFO. */ - if (rcnt[0] != 0) - roff = rcnt[0] - 1; - else - roff = OPCIC_RSYS_FIFO_SIZE - 1; - c = cvmx_read64_uint8(console_rbuf + roff); - - /* Advance FIFO. */ - rcnt[1] = (rcnt[1] + 1) % OPCIC_RSYS_FIFO_SIZE; - cvmx_write64_uint16(console_rcnt[1], rcnt[1]); - - return (c); -} - -static void -opcic_rsys_cnputc(struct opcic_softc *sc, int c) -{ - uint64_t gbl_base; - uint64_t console_base; - uint64_t console_wbuf; - uint64_t console_wcnt; - uint16_t wcnt; - - gbl_base = CVMX_ADD_IO_SEG(sc->sc_base_addr); - console_base = gbl_base + 0x10; - - console_wbuf = console_base + 0x0018; - console_wcnt = console_base + 0x0c; - - /* Append character to FIFO. */ - wcnt = cvmx_read64_uint16(console_wcnt) % OPCIC_RSYS_FIFO_SIZE; - cvmx_write64_uint8(console_wbuf + wcnt, (uint8_t)c); - cvmx_write64_uint16(console_wcnt, wcnt + 1); -} -#endif diff --git a/sys/mips/cavium/octeon_pcmap_regs.h b/sys/mips/cavium/octeon_pcmap_regs.h deleted file mode 100644 index c3887a81b6c..00000000000 --- a/sys/mips/cavium/octeon_pcmap_regs.h +++ /dev/null @@ -1,60 +0,0 @@ -/***********************license start*************** - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights - * reserved. - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * - * * Neither the name of Cavium Networks nor the names of - * its contributors may be used to endorse or promote products - * derived from this software without specific prior written - * permission. - * - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" - * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES - * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR - * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET - * POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT - * OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - * - * - * For any questions regarding licensing please contact marketing@caviumnetworks.com - * - ***********************license end**************************************/ - -/* - * This product includes software developed by the University of - * California, Berkeley and its contributors." - */ - - -#ifndef __OCTEON_PCMAP_REGS_H__ -#define __OCTEON_PCMAP_REGS_H__ - -#ifndef LOCORE -/* - * octeon_machdep.c - * - * Direct to Board Support level. - */ -void octeon_debug_symbol(void); -void octeon_ciu_reset(void); -#endif /* LOCORE */ - -#endif /* !OCTEON_PCMAP_REGS_H__ */ diff --git a/sys/mips/cavium/octeon_pmc.c b/sys/mips/cavium/octeon_pmc.c deleted file mode 100644 index a64ed7e2133..00000000000 --- a/sys/mips/cavium/octeon_pmc.c +++ /dev/null @@ -1,128 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012 Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -struct octeon_pmc_softc { - struct rman irq_rman; - struct resource *octeon_pmc_irq; -}; - -static void octeon_pmc_identify(driver_t *, device_t); -static int octeon_pmc_probe(device_t); -static int octeon_pmc_attach(device_t); -static int octeon_pmc_intr(void *); - -static void -octeon_pmc_identify(driver_t *drv, device_t parent) -{ - if (octeon_has_feature(OCTEON_FEATURE_USB)) - BUS_ADD_CHILD(parent, 0, "pmc", 0); -} - -static int -octeon_pmc_probe(device_t dev) -{ - if (device_get_unit(dev) != 0) - return (ENXIO); - - device_set_desc(dev, "Cavium Octeon Performance Counters"); - return (BUS_PROBE_NOWILDCARD); -} - -static int -octeon_pmc_attach(device_t dev) -{ - struct octeon_pmc_softc *sc; - int error; - int rid; - - sc = device_get_softc(dev); - - rid = 0; - sc->octeon_pmc_irq = bus_alloc_resource(dev, - SYS_RES_IRQ, &rid, OCTEON_PMC_IRQ, - OCTEON_PMC_IRQ, 1, RF_ACTIVE); - - if (sc->octeon_pmc_irq == NULL) { - device_printf(dev, "could not allocate irq%d\n", OCTEON_PMC_IRQ); - return (ENXIO); - } - - error = bus_setup_intr(dev, sc->octeon_pmc_irq, - INTR_TYPE_MISC, octeon_pmc_intr, NULL, sc, NULL); - if (error != 0) { - device_printf(dev, "bus_setup_intr failed: %d\n", error); - return (error); - } - - return (0); -} - -static int -octeon_pmc_intr(void *arg) -{ - struct trapframe *tf = PCPU_GET(curthread)->td_intr_frame; - - if (pmc_intr) - (*pmc_intr)(tf); - - return (FILTER_HANDLED); -} - -static device_method_t octeon_pmc_methods[] = { - DEVMETHOD(device_identify, octeon_pmc_identify), - DEVMETHOD(device_probe, octeon_pmc_probe), - DEVMETHOD(device_attach, octeon_pmc_attach), - { 0, 0 } -}; - -static driver_t octeon_pmc_driver = { - "pmc", - octeon_pmc_methods, - sizeof(struct octeon_pmc_softc), -}; -static devclass_t octeon_pmc_devclass; -DRIVER_MODULE(octeon_pmc, nexus, octeon_pmc_driver, octeon_pmc_devclass, 0, 0); diff --git a/sys/mips/cavium/octeon_rnd.c b/sys/mips/cavium/octeon_rnd.c deleted file mode 100644 index a3201e38c19..00000000000 --- a/sys/mips/cavium/octeon_rnd.c +++ /dev/null @@ -1,129 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#define OCTEON_RND_WORDS 2 - -struct octeon_rnd_softc { - uint64_t sc_entropy[OCTEON_RND_WORDS]; - struct callout sc_callout; -}; - -static void octeon_rnd_identify(driver_t *drv, device_t parent); -static int octeon_rnd_attach(device_t dev); -static int octeon_rnd_probe(device_t dev); -static int octeon_rnd_detach(device_t dev); - -static void octeon_rnd_harvest(void *); - -static device_method_t octeon_rnd_methods[] = { - /* Device interface */ - DEVMETHOD(device_identify, octeon_rnd_identify), - DEVMETHOD(device_probe, octeon_rnd_probe), - DEVMETHOD(device_attach, octeon_rnd_attach), - DEVMETHOD(device_detach, octeon_rnd_detach), - { 0, 0 } -}; - -static driver_t octeon_rnd_driver = { - "rnd", - octeon_rnd_methods, - sizeof (struct octeon_rnd_softc) -}; -static devclass_t octeon_rnd_devclass; -DRIVER_MODULE(rnd, nexus, octeon_rnd_driver, octeon_rnd_devclass, 0, 0); - -static void -octeon_rnd_identify(driver_t *drv, device_t parent) -{ - BUS_ADD_CHILD(parent, 0, "rnd", 0); -} - -static int -octeon_rnd_probe(device_t dev) -{ - if (device_get_unit(dev) != 0) - return (ENXIO); - - device_set_desc(dev, "Cavium Octeon Random Number Generator"); - return (BUS_PROBE_NOWILDCARD); -} - -static int -octeon_rnd_attach(device_t dev) -{ - struct octeon_rnd_softc *sc; - - sc = device_get_softc(dev); - callout_init(&sc->sc_callout, 1); - callout_reset(&sc->sc_callout, hz * 5, octeon_rnd_harvest, sc); - - cvmx_rng_enable(); - - return (0); -} - -static int -octeon_rnd_detach(device_t dev) -{ - struct octeon_rnd_softc *sc; - - sc = device_get_softc(dev); - - callout_stop(&sc->sc_callout); - - return (0); -} - -static void -octeon_rnd_harvest(void *arg) -{ - struct octeon_rnd_softc *sc; - unsigned i; - - sc = arg; - - for (i = 0; i < OCTEON_RND_WORDS; i++) - sc->sc_entropy[i] = cvmx_rng_get_random64(); - /* MarkM: FIX!! Check that this does not swamp the harvester! */ - random_harvest_queue(sc->sc_entropy, sizeof sc->sc_entropy, RANDOM_PURE_OCTEON); - - callout_reset(&sc->sc_callout, hz * 5, octeon_rnd_harvest, sc); -} diff --git a/sys/mips/cavium/octeon_rtc.c b/sys/mips/cavium/octeon_rtc.c deleted file mode 100644 index 5dd12797e7e..00000000000 --- a/sys/mips/cavium/octeon_rtc.c +++ /dev/null @@ -1,127 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "clock_if.h" - -static int octeon_rtc_attach(device_t dev); -static int octeon_rtc_probe(device_t dev); - -static int octeon_rtc_settime(device_t dev, struct timespec *ts); -static int octeon_rtc_gettime(device_t dev, struct timespec *ts); - -static device_method_t octeon_rtc_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, octeon_rtc_probe), - DEVMETHOD(device_attach, octeon_rtc_attach), - - /* clock interface */ - DEVMETHOD(clock_gettime, octeon_rtc_gettime), - DEVMETHOD(clock_settime, octeon_rtc_settime), - { 0, 0 } -}; - -static driver_t octeon_rtc_driver = { - "rtc", - octeon_rtc_methods, - 0 -}; -static devclass_t octeon_rtc_devclass; -DRIVER_MODULE(rtc, nexus, octeon_rtc_driver, octeon_rtc_devclass, 0, 0); - -static int -octeon_rtc_probe(device_t dev) -{ - cvmx_rtc_options_t supported; - - if (device_get_unit(dev) != 0) - return (ENXIO); - - supported = cvmx_rtc_supported(); - if (supported == 0) - return (ENXIO); - - device_set_desc(dev, "Cavium Octeon Realtime Clock"); - return (BUS_PROBE_NOWILDCARD); -} - -static int -octeon_rtc_attach(device_t dev) -{ - cvmx_rtc_options_t supported; - - supported = cvmx_rtc_supported(); - if ((supported & CVMX_RTC_READ) == 0) - return (ENXIO); - - clock_register(dev, 1000000); - return (0); -} - -static int -octeon_rtc_settime(device_t dev, struct timespec *ts) -{ - cvmx_rtc_options_t supported; - uint32_t status; - - supported = cvmx_rtc_supported(); - if ((supported & CVMX_RTC_WRITE) == 0) - return (ENOTSUP); - - status = cvmx_rtc_write(ts->tv_sec); - if (status != 0) - return (EINVAL); - - return (0); -} - -static int -octeon_rtc_gettime(device_t dev, struct timespec *ts) -{ - uint32_t secs; - - secs = cvmx_rtc_read(); - if (secs == 0) - return (ENOTSUP); - - ts->tv_sec = secs; - ts->tv_nsec = 0; - - return (0); -} diff --git a/sys/mips/cavium/octeon_wdog.c b/sys/mips/cavium/octeon_wdog.c deleted file mode 100644 index 1b46030d521..00000000000 --- a/sys/mips/cavium/octeon_wdog.c +++ /dev/null @@ -1,276 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * Copyright (c) 2010-2011, Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Watchdog driver for Cavium Octeon - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#define DEFAULT_TIMER_VAL 65535 - -struct octeon_wdog_softc { - device_t sc_dev; - struct octeon_wdog_core_softc { - int csc_core; - struct resource *csc_intr; - void *csc_intr_cookie; - } sc_cores[MAXCPU]; - int sc_armed; - int sc_debug; -}; - -extern void octeon_wdog_nmi_handler(void); -void octeon_wdog_nmi(void); - -static void octeon_watchdog_arm_core(int); -static void octeon_watchdog_disarm_core(int); -static int octeon_wdog_attach(device_t); -static void octeon_wdog_identify(driver_t *, device_t); -static int octeon_wdog_intr(void *); -static int octeon_wdog_probe(device_t); -static void octeon_wdog_setup(struct octeon_wdog_softc *, int); -static void octeon_wdog_sysctl(device_t); -static void octeon_wdog_watchdog_fn(void *, u_int, int *); - -void -octeon_wdog_nmi(void) -{ - int core; - - core = cvmx_get_core_num(); - - printf("cpu%u: NMI detected\n", core); - printf("cpu%u: Exception PC: %p\n", core, (void *)mips_rd_excpc()); - printf("cpu%u: status %#x cause %#x\n", core, mips_rd_status(), mips_rd_cause()); - - /* - * This is the end - * Beautiful friend - * - * Just wait for Soft Reset to come and take us - */ - for (;;) - continue; -} - -static void -octeon_watchdog_arm_core(int core) -{ - cvmx_ciu_wdogx_t ciu_wdog; - - /* Poke it! */ - cvmx_write_csr(CVMX_CIU_PP_POKEX(core), 1); - - /* - * XXX - * Perhaps if KDB is enabled, we should use mode=2 and drop into the - * debugger on NMI? - * - * XXX - * Timer should be calculated based on CPU frquency - */ - ciu_wdog.u64 = 0; - ciu_wdog.s.len = DEFAULT_TIMER_VAL; - ciu_wdog.s.mode = 3; - cvmx_write_csr(CVMX_CIU_WDOGX(core), ciu_wdog.u64); -} - -static void -octeon_watchdog_disarm_core(int core) -{ - - cvmx_write_csr(CVMX_CIU_WDOGX(core), 0); -} - -static void -octeon_wdog_watchdog_fn(void *private, u_int cmd, int *error) -{ - struct octeon_wdog_softc *sc = private; - int core; - - cmd &= WD_INTERVAL; - if (sc->sc_debug) - device_printf(sc->sc_dev, "%s: cmd: %x\n", __func__, cmd); - if (cmd > 0) { - CPU_FOREACH(core) - octeon_watchdog_arm_core(core); - sc->sc_armed = 1; - *error = 0; - } else { - if (sc->sc_armed) { - CPU_FOREACH(core) - octeon_watchdog_disarm_core(core); - sc->sc_armed = 0; - } - } -} - -static void -octeon_wdog_sysctl(device_t dev) -{ - struct octeon_wdog_softc *sc = device_get_softc(dev); - - struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); - struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); - - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "debug", CTLFLAG_RW, &sc->sc_debug, 0, - "enable watchdog debugging"); - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "armed", CTLFLAG_RD, &sc->sc_armed, 0, - "whether the watchdog is armed"); -} - -static void -octeon_wdog_setup(struct octeon_wdog_softc *sc, int core) -{ - struct octeon_wdog_core_softc *csc; - int rid, error; - - csc = &sc->sc_cores[core]; - - csc->csc_core = core; - - /* Interrupt part */ - rid = 0; - csc->csc_intr = bus_alloc_resource(sc->sc_dev, SYS_RES_IRQ, &rid, - OCTEON_IRQ_WDOG0 + core, OCTEON_IRQ_WDOG0 + core, 1, RF_ACTIVE); - if (csc->csc_intr == NULL) - panic("%s: bus_alloc_resource for core %u failed", - __func__, core); - - error = bus_setup_intr(sc->sc_dev, csc->csc_intr, INTR_TYPE_MISC, - octeon_wdog_intr, NULL, csc, &csc->csc_intr_cookie); - if (error != 0) - panic("%s: bus_setup_intr for core %u: %d", __func__, core, - error); - - bus_bind_intr(sc->sc_dev, csc->csc_intr, core); - bus_describe_intr(sc->sc_dev, csc->csc_intr, csc->csc_intr_cookie, - "cpu%u", core); - - if (sc->sc_armed) { - /* Armed by default. */ - octeon_watchdog_arm_core(core); - } else { - /* Disarmed by default. */ - octeon_watchdog_disarm_core(core); - } -} - -static int -octeon_wdog_intr(void *arg) -{ - struct octeon_wdog_core_softc *csc = arg; - - KASSERT(csc->csc_core == cvmx_get_core_num(), - ("got watchdog interrupt for core %u on core %u.", - csc->csc_core, cvmx_get_core_num())); - - (void)csc; - - /* Poke it! */ - cvmx_write_csr(CVMX_CIU_PP_POKEX(cvmx_get_core_num()), 1); - - return (FILTER_HANDLED); -} - -static int -octeon_wdog_probe(device_t dev) -{ - - device_set_desc(dev, "Cavium Octeon watchdog timer"); - return (0); -} - -static int -octeon_wdog_attach(device_t dev) -{ - struct octeon_wdog_softc *sc = device_get_softc(dev); - uint64_t *nmi_handler = (uint64_t*)octeon_wdog_nmi_handler; - int core, i; - - /* Initialise */ - sc->sc_armed = 0; /* XXX Ought to be a tunable / config option. */ - sc->sc_debug = 0; - - sc->sc_dev = dev; - EVENTHANDLER_REGISTER(watchdog_list, octeon_wdog_watchdog_fn, sc, 0); - octeon_wdog_sysctl(dev); - - for (i = 0; i < 16; i++) { - cvmx_write_csr(CVMX_MIO_BOOT_LOC_ADR, i * 8); - cvmx_write_csr(CVMX_MIO_BOOT_LOC_DAT, nmi_handler[i]); - } - - cvmx_write_csr(CVMX_MIO_BOOT_LOC_CFGX(0), 0x81fc0000); - - CPU_FOREACH(core) - octeon_wdog_setup(sc, core); - return (0); -} - -static void -octeon_wdog_identify(driver_t *drv, device_t parent) -{ - - BUS_ADD_CHILD(parent, 0, "owdog", 0); -} - -static device_method_t octeon_wdog_methods[] = { - DEVMETHOD(device_identify, octeon_wdog_identify), - - DEVMETHOD(device_probe, octeon_wdog_probe), - DEVMETHOD(device_attach, octeon_wdog_attach), - {0, 0}, -}; - -static driver_t octeon_wdog_driver = { - "owdog", - octeon_wdog_methods, - sizeof(struct octeon_wdog_softc), -}; -static devclass_t octeon_wdog_devclass; - -DRIVER_MODULE(owdog, ciu, octeon_wdog_driver, octeon_wdog_devclass, 0, 0); diff --git a/sys/mips/cavium/octopci.c b/sys/mips/cavium/octopci.c deleted file mode 100644 index 70b87d619a4..00000000000 --- a/sys/mips/cavium/octopci.c +++ /dev/null @@ -1,990 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010-2011 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include -#include - -#include - -#include -#include - -#include "pcib_if.h" - -#define NPI_WRITE(addr, value) cvmx_write64_uint32((addr) ^ 4, (value)) -#define NPI_READ(addr) cvmx_read64_uint32((addr) ^ 4) - -struct octopci_softc { - device_t sc_dev; - - unsigned sc_domain; - unsigned sc_bus; - - bus_addr_t sc_io_base; - unsigned sc_io_next; - struct rman sc_io; - - bus_addr_t sc_mem1_base; - unsigned sc_mem1_next; - struct rman sc_mem1; -}; - -static void octopci_identify(driver_t *, device_t); -static int octopci_probe(device_t); -static int octopci_attach(device_t); -static int octopci_read_ivar(device_t, device_t, int, - uintptr_t *); -static struct resource *octopci_alloc_resource(device_t, device_t, int, int *, - rman_res_t, rman_res_t, - rman_res_t, u_int); -static int octopci_activate_resource(device_t, device_t, int, int, - struct resource *); -static int octopci_maxslots(device_t); -static uint32_t octopci_read_config(device_t, u_int, u_int, u_int, u_int, int); -static void octopci_write_config(device_t, u_int, u_int, u_int, u_int, - uint32_t, int); -static int octopci_route_interrupt(device_t, device_t, int); - -static unsigned octopci_init_bar(device_t, unsigned, unsigned, unsigned, unsigned, uint8_t *); -static unsigned octopci_init_device(device_t, unsigned, unsigned, unsigned, unsigned); -static unsigned octopci_init_bus(device_t, unsigned); -static void octopci_init_pci(device_t); -static uint64_t octopci_cs_addr(unsigned, unsigned, unsigned, unsigned); - -static void -octopci_identify(driver_t *drv, device_t parent) -{ - BUS_ADD_CHILD(parent, 0, "pcib", 0); - if (octeon_has_feature(OCTEON_FEATURE_PCIE)) - BUS_ADD_CHILD(parent, 0, "pcib", 1); -} - -static int -octopci_probe(device_t dev) -{ - if (octeon_has_feature(OCTEON_FEATURE_PCIE)) { - device_set_desc(dev, "Cavium Octeon PCIe bridge"); - return (0); - } - - /* Check whether we are a PCI host. */ - if ((cvmx_sysinfo_get()->bootloader_config_flags & CVMX_BOOTINFO_CFG_FLAG_PCI_HOST) == 0) - return (ENXIO); - - if (device_get_unit(dev) != 0) - return (ENXIO); - - device_set_desc(dev, "Cavium Octeon PCI bridge"); - return (0); -} - -static int -octopci_attach(device_t dev) -{ - struct octopci_softc *sc; - unsigned subbus; - int error; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - - if (octeon_has_feature(OCTEON_FEATURE_PCIE)) { - sc->sc_domain = device_get_unit(dev); - - error = cvmx_pcie_rc_initialize(sc->sc_domain); - if (error != 0) { - device_printf(dev, "Failed to put PCIe bus in host mode.\n"); - return (ENXIO); - } - - /* - * In RC mode, the Simple Executive programs the first bus to - * be numbered as bus 1, because some IDT bridges used in - * Octeon systems object to being attached to bus 0. - */ - sc->sc_bus = 1; - - sc->sc_io_base = CVMX_ADD_IO_SEG(cvmx_pcie_get_io_base_address(sc->sc_domain)); - sc->sc_io.rm_descr = "Cavium Octeon PCIe I/O Ports"; - - sc->sc_mem1_base = CVMX_ADD_IO_SEG(cvmx_pcie_get_mem_base_address(sc->sc_domain)); - sc->sc_mem1.rm_descr = "Cavium Octeon PCIe Memory"; - } else { - octopci_init_pci(dev); - - sc->sc_domain = 0; - sc->sc_bus = 0; - - sc->sc_io_base = CVMX_ADDR_DID(CVMX_FULL_DID(CVMX_OCT_DID_PCI, CVMX_OCT_SUBDID_PCI_IO)); - sc->sc_io.rm_descr = "Cavium Octeon PCI I/O Ports"; - - sc->sc_mem1_base = CVMX_ADDR_DID(CVMX_FULL_DID(CVMX_OCT_DID_PCI, CVMX_OCT_SUBDID_PCI_MEM1)); - sc->sc_mem1.rm_descr = "Cavium Octeon PCI Memory"; - } - - sc->sc_io.rm_type = RMAN_ARRAY; - error = rman_init(&sc->sc_io); - if (error != 0) - return (error); - - error = rman_manage_region(&sc->sc_io, CVMX_OCT_PCI_IO_BASE, - CVMX_OCT_PCI_IO_BASE + CVMX_OCT_PCI_IO_SIZE); - if (error != 0) - return (error); - - sc->sc_mem1.rm_type = RMAN_ARRAY; - error = rman_init(&sc->sc_mem1); - if (error != 0) - return (error); - - error = rman_manage_region(&sc->sc_mem1, CVMX_OCT_PCI_MEM1_BASE, - CVMX_OCT_PCI_MEM1_BASE + CVMX_OCT_PCI_MEM1_SIZE); - if (error != 0) - return (error); - - /* - * Next offsets for resource allocation in octopci_init_bar. - */ - sc->sc_io_next = 0; - sc->sc_mem1_next = 0; - - /* - * Configure devices. - */ - octopci_write_config(dev, sc->sc_bus, 0, 0, PCIR_SUBBUS_1, 0xff, 1); - subbus = octopci_init_bus(dev, sc->sc_bus); - octopci_write_config(dev, sc->sc_bus, 0, 0, PCIR_SUBBUS_1, subbus, 1); - - device_add_child(dev, "pci", -1); - - return (bus_generic_attach(dev)); -} - -static int -octopci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) -{ - struct octopci_softc *sc; - - sc = device_get_softc(dev); - - switch (which) { - case PCIB_IVAR_DOMAIN: - *result = sc->sc_domain; - return (0); - case PCIB_IVAR_BUS: - *result = sc->sc_bus; - return (0); - - } - return (ENOENT); -} - -static struct resource * -octopci_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct octopci_softc *sc; - struct resource *res; - struct rman *rm; - int error; - - sc = device_get_softc(bus); - - switch (type) { - case SYS_RES_IRQ: - res = bus_generic_alloc_resource(bus, child, type, rid, start, - end, count, flags); - if (res != NULL) - return (res); - return (NULL); - case SYS_RES_MEMORY: - rm = &sc->sc_mem1; - break; - case SYS_RES_IOPORT: - rm = &sc->sc_io; - break; - default: - return (NULL); - } - - res = rman_reserve_resource(rm, start, end, count, flags, child); - if (res == NULL) - return (NULL); - - rman_set_rid(res, *rid); - rman_set_bustag(res, octopci_bus_space); - - switch (type) { - case SYS_RES_MEMORY: - rman_set_bushandle(res, sc->sc_mem1_base + rman_get_start(res)); - break; - case SYS_RES_IOPORT: - rman_set_bushandle(res, sc->sc_io_base + rman_get_start(res)); -#if __mips_n64 - rman_set_virtual(res, (void *)rman_get_bushandle(res)); -#else - /* - * XXX - * We can't access ports via a 32-bit pointer. - */ - rman_set_virtual(res, NULL); -#endif - break; - } - - if ((flags & RF_ACTIVE) != 0) { - error = bus_activate_resource(child, type, *rid, res); - if (error != 0) { - rman_release_resource(res); - return (NULL); - } - } - - return (res); -} - -static int -octopci_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *res) -{ - bus_space_handle_t bh; - int error; - - switch (type) { - case SYS_RES_IRQ: - error = bus_generic_activate_resource(bus, child, type, rid, - res); - if (error != 0) - return (error); - return (0); - case SYS_RES_MEMORY: - case SYS_RES_IOPORT: - error = bus_space_map(rman_get_bustag(res), - rman_get_bushandle(res), rman_get_size(res), 0, &bh); - if (error != 0) - return (error); - rman_set_bushandle(res, bh); - break; - default: - return (ENXIO); - } - - error = rman_activate_resource(res); - if (error != 0) - return (error); - return (0); -} - -static int -octopci_maxslots(device_t dev) -{ - return (PCI_SLOTMAX); -} - -static uint32_t -octopci_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, - int bytes) -{ - struct octopci_softc *sc; - uint64_t addr; - uint32_t data; - - sc = device_get_softc(dev); - - if (octeon_has_feature(OCTEON_FEATURE_PCIE)) { - if (bus == 0 && slot == 0 && func == 0) - return ((uint32_t)-1); - - switch (bytes) { - case 4: - return (cvmx_pcie_config_read32(sc->sc_domain, bus, slot, func, reg)); - case 2: - return (cvmx_pcie_config_read16(sc->sc_domain, bus, slot, func, reg)); - case 1: - return (cvmx_pcie_config_read8(sc->sc_domain, bus, slot, func, reg)); - default: - return ((uint32_t)-1); - } - } - - addr = octopci_cs_addr(bus, slot, func, reg); - - switch (bytes) { - case 4: - data = le32toh(cvmx_read64_uint32(addr)); - return (data); - case 2: - data = le16toh(cvmx_read64_uint16(addr)); - return (data); - case 1: - data = cvmx_read64_uint8(addr); - return (data); - default: - return ((uint32_t)-1); - } -} - -static void -octopci_write_config(device_t dev, u_int bus, u_int slot, u_int func, - u_int reg, uint32_t data, int bytes) -{ - struct octopci_softc *sc; - uint64_t addr; - - sc = device_get_softc(dev); - - if (octeon_has_feature(OCTEON_FEATURE_PCIE)) { - switch (bytes) { - case 4: - cvmx_pcie_config_write32(sc->sc_domain, bus, slot, func, reg, data); - return; - case 2: - cvmx_pcie_config_write16(sc->sc_domain, bus, slot, func, reg, data); - return; - case 1: - cvmx_pcie_config_write8(sc->sc_domain, bus, slot, func, reg, data); - return; - default: - return; - } - } - - addr = octopci_cs_addr(bus, slot, func, reg); - - switch (bytes) { - case 4: - cvmx_write64_uint32(addr, htole32(data)); - return; - case 2: - cvmx_write64_uint16(addr, htole16(data)); - return; - case 1: - cvmx_write64_uint8(addr, data); - return; - default: - return; - } -} - -static int -octopci_route_interrupt(device_t dev, device_t child, int pin) -{ - struct octopci_softc *sc; - unsigned bus, slot, func; - unsigned irq; - - sc = device_get_softc(dev); - - if (octeon_has_feature(OCTEON_FEATURE_PCIE)) - return (OCTEON_IRQ_PCI_INT0 + pin - 1); - - bus = pci_get_bus(child); - slot = pci_get_slot(child); - func = pci_get_function(child); - - /* - * Board types we have to know at compile-time. - */ -#if defined(OCTEON_BOARD_CAPK_0100ND) - if (bus == 0 && slot == 12 && func == 0) - return (OCTEON_IRQ_PCI_INT2); -#endif - - /* - * For board types we can determine at runtime. - */ - switch (cvmx_sysinfo_get()->board_type) { -#if defined(OCTEON_VENDOR_LANNER) - case CVMX_BOARD_TYPE_CUST_LANNER_MR955: - return (OCTEON_IRQ_PCI_INT0 + pin - 1); - case CVMX_BOARD_TYPE_CUST_LANNER_MR320: - if (slot < 32) { - if (slot == 3 || slot == 9) - irq = pin; - else - irq = pin - 1; - return (OCTEON_IRQ_PCI_INT0 + (irq & 3)); - } - break; -#endif - default: - break; - } - - irq = slot + pin - 3; - - return (OCTEON_IRQ_PCI_INT0 + (irq & 3)); -} - -static unsigned -octopci_init_bar(device_t dev, unsigned b, unsigned s, unsigned f, unsigned barnum, uint8_t *commandp) -{ - struct octopci_softc *sc; - uint64_t bar; - unsigned size; - int barsize; - - sc = device_get_softc(dev); - - octopci_write_config(dev, b, s, f, PCIR_BAR(barnum), 0xffffffff, 4); - bar = octopci_read_config(dev, b, s, f, PCIR_BAR(barnum), 4); - - if (bar == 0) { - /* Bar not implemented; got to next bar. */ - return (barnum + 1); - } - - if (PCI_BAR_IO(bar)) { - size = ~(bar & PCIM_BAR_IO_BASE) + 1; - - sc->sc_io_next = roundup2(sc->sc_io_next, size); - if (sc->sc_io_next + size > CVMX_OCT_PCI_IO_SIZE) { - device_printf(dev, "%02x.%02x:%02x: no ports for BAR%u.\n", - b, s, f, barnum); - return (barnum + 1); - } - octopci_write_config(dev, b, s, f, PCIR_BAR(barnum), - CVMX_OCT_PCI_IO_BASE + sc->sc_io_next, 4); - sc->sc_io_next += size; - - /* - * Enable I/O ports. - */ - *commandp |= PCIM_CMD_PORTEN; - - return (barnum + 1); - } else { - if (PCIR_BAR(barnum) == PCIR_BIOS) { - /* - * ROM BAR is always 32-bit. - */ - barsize = 1; - } else { - switch (bar & PCIM_BAR_MEM_TYPE) { - case PCIM_BAR_MEM_64: - /* - * XXX - * High 32 bits are all zeroes for now. - */ - octopci_write_config(dev, b, s, f, PCIR_BAR(barnum + 1), 0, 4); - barsize = 2; - break; - default: - barsize = 1; - break; - } - } - - size = ~(bar & (uint32_t)PCIM_BAR_MEM_BASE) + 1; - - sc->sc_mem1_next = roundup2(sc->sc_mem1_next, size); - if (sc->sc_mem1_next + size > CVMX_OCT_PCI_MEM1_SIZE) { - device_printf(dev, "%02x.%02x:%02x: no memory for BAR%u.\n", - b, s, f, barnum); - return (barnum + barsize); - } - octopci_write_config(dev, b, s, f, PCIR_BAR(barnum), - CVMX_OCT_PCI_MEM1_BASE + sc->sc_mem1_next, 4); - sc->sc_mem1_next += size; - - /* - * Enable memory access. - */ - *commandp |= PCIM_CMD_MEMEN; - - return (barnum + barsize); - } -} - -static unsigned -octopci_init_device(device_t dev, unsigned b, unsigned s, unsigned f, unsigned secbus) -{ - unsigned barnum, bars; - uint8_t brctl; - uint8_t class, subclass; - uint8_t command; - uint8_t hdrtype; - - /* Read header type (again.) */ - hdrtype = octopci_read_config(dev, b, s, f, PCIR_HDRTYPE, 1); - - /* - * Disable memory and I/O while programming BARs. - */ - command = octopci_read_config(dev, b, s, f, PCIR_COMMAND, 1); - command &= ~(PCIM_CMD_MEMEN | PCIM_CMD_PORTEN); - octopci_write_config(dev, b, s, f, PCIR_COMMAND, command, 1); - - DELAY(10000); - - /* Program BARs. */ - switch (hdrtype & PCIM_HDRTYPE) { - case PCIM_HDRTYPE_NORMAL: - bars = 6; - break; - case PCIM_HDRTYPE_BRIDGE: - bars = 2; - break; - case PCIM_HDRTYPE_CARDBUS: - bars = 0; - break; - default: - device_printf(dev, "%02x.%02x:%02x: invalid header type %#x\n", - b, s, f, hdrtype); - return (secbus); - } - - barnum = 0; - while (barnum < bars) - barnum = octopci_init_bar(dev, b, s, f, barnum, &command); - - /* Enable bus mastering. */ - command |= PCIM_CMD_BUSMASTEREN; - - /* Enable whatever facilities the BARs require. */ - octopci_write_config(dev, b, s, f, PCIR_COMMAND, command, 1); - - DELAY(10000); - - /* - * Set cache line size. On Octeon it should be 128 bytes, - * but according to Linux some Intel bridges have trouble - * with values over 64 bytes, so use 64 bytes. - */ - octopci_write_config(dev, b, s, f, PCIR_CACHELNSZ, 16, 1); - - /* Set latency timer. */ - octopci_write_config(dev, b, s, f, PCIR_LATTIMER, 48, 1); - - /* Board-specific or device-specific fixups and workarounds. */ - switch (cvmx_sysinfo_get()->board_type) { -#if defined(OCTEON_VENDOR_LANNER) - case CVMX_BOARD_TYPE_CUST_LANNER_MR955: - if (b == 1 && s == 7 && f == 0) { - bus_addr_t busaddr, unitbusaddr; - uint32_t bar; - uint32_t tmp; - unsigned unit; - - /* - * Set Tx DMA power. - */ - bar = octopci_read_config(dev, b, s, f, - PCIR_BAR(3), 4); - busaddr = CVMX_ADDR_DID(CVMX_FULL_DID(CVMX_OCT_DID_PCI, - CVMX_OCT_SUBDID_PCI_MEM1)); - busaddr += (bar & (uint32_t)PCIM_BAR_MEM_BASE); - for (unit = 0; unit < 4; unit++) { - unitbusaddr = busaddr + 0x430 + (unit << 8); - tmp = le32toh(cvmx_read64_uint32(unitbusaddr)); - tmp &= ~0x700; - tmp |= 0x300; - cvmx_write64_uint32(unitbusaddr, htole32(tmp)); - } - } - break; -#endif - default: - break; - } - - /* Configure PCI-PCI bridges. */ - class = octopci_read_config(dev, b, s, f, PCIR_CLASS, 1); - if (class != PCIC_BRIDGE) - return (secbus); - - subclass = octopci_read_config(dev, b, s, f, PCIR_SUBCLASS, 1); - if (subclass != PCIS_BRIDGE_PCI) - return (secbus); - - /* Enable memory and I/O access. */ - command |= PCIM_CMD_MEMEN | PCIM_CMD_PORTEN; - octopci_write_config(dev, b, s, f, PCIR_COMMAND, command, 1); - - /* Enable errors and parity checking. Do a bus reset. */ - brctl = octopci_read_config(dev, b, s, f, PCIR_BRIDGECTL_1, 1); - brctl |= PCIB_BCR_PERR_ENABLE | PCIB_BCR_SERR_ENABLE; - - /* Perform a secondary bus reset. */ - brctl |= PCIB_BCR_SECBUS_RESET; - octopci_write_config(dev, b, s, f, PCIR_BRIDGECTL_1, brctl, 1); - DELAY(100000); - brctl &= ~PCIB_BCR_SECBUS_RESET; - octopci_write_config(dev, b, s, f, PCIR_BRIDGECTL_1, brctl, 1); - - secbus++; - - /* Program memory and I/O ranges. */ - octopci_write_config(dev, b, s, f, PCIR_MEMBASE_1, - CVMX_OCT_PCI_MEM1_BASE >> 16, 2); - octopci_write_config(dev, b, s, f, PCIR_MEMLIMIT_1, - (CVMX_OCT_PCI_MEM1_BASE + CVMX_OCT_PCI_MEM1_SIZE - 1) >> 16, 2); - - octopci_write_config(dev, b, s, f, PCIR_IOBASEL_1, - CVMX_OCT_PCI_IO_BASE >> 8, 1); - octopci_write_config(dev, b, s, f, PCIR_IOBASEH_1, - CVMX_OCT_PCI_IO_BASE >> 16, 2); - - octopci_write_config(dev, b, s, f, PCIR_IOLIMITL_1, - (CVMX_OCT_PCI_IO_BASE + CVMX_OCT_PCI_IO_SIZE - 1) >> 8, 1); - octopci_write_config(dev, b, s, f, PCIR_IOLIMITH_1, - (CVMX_OCT_PCI_IO_BASE + CVMX_OCT_PCI_IO_SIZE - 1) >> 16, 2); - - /* Program prefetchable memory decoder. */ - /* XXX */ - - /* Probe secondary/subordinate buses. */ - octopci_write_config(dev, b, s, f, PCIR_PRIBUS_1, b, 1); - octopci_write_config(dev, b, s, f, PCIR_SECBUS_1, secbus, 1); - octopci_write_config(dev, b, s, f, PCIR_SUBBUS_1, 0xff, 1); - - /* Perform a secondary bus reset. */ - brctl |= PCIB_BCR_SECBUS_RESET; - octopci_write_config(dev, b, s, f, PCIR_BRIDGECTL_1, brctl, 1); - DELAY(100000); - brctl &= ~PCIB_BCR_SECBUS_RESET; - octopci_write_config(dev, b, s, f, PCIR_BRIDGECTL_1, brctl, 1); - - /* Give the bus time to settle now before reading configspace. */ - DELAY(100000); - - secbus = octopci_init_bus(dev, secbus); - - octopci_write_config(dev, b, s, f, PCIR_SUBBUS_1, secbus, 1); - - return (secbus); -} - -static unsigned -octopci_init_bus(device_t dev, unsigned b) -{ - unsigned s, f; - uint8_t hdrtype; - unsigned secbus; - - secbus = b; - - for (s = 0; s <= PCI_SLOTMAX; s++) { - for (f = 0; f <= PCI_FUNCMAX; f++) { - hdrtype = octopci_read_config(dev, b, s, f, PCIR_HDRTYPE, 1); - - if (hdrtype == 0xff) { - if (f == 0) - break; /* Next slot. */ - continue; /* Next function. */ - } - - secbus = octopci_init_device(dev, b, s, f, secbus); - - if (f == 0 && (hdrtype & PCIM_MFDEV) == 0) - break; /* Next slot. */ - } - } - - return (secbus); -} - -static uint64_t -octopci_cs_addr(unsigned bus, unsigned slot, unsigned func, unsigned reg) -{ - octeon_pci_config_space_address_t pci_addr; - - pci_addr.u64 = 0; - pci_addr.s.upper = 2; - pci_addr.s.io = 1; - pci_addr.s.did = 3; - pci_addr.s.subdid = CVMX_OCT_SUBDID_PCI_CFG; - pci_addr.s.endian_swap = 1; - pci_addr.s.bus = bus; - pci_addr.s.dev = slot; - pci_addr.s.func = func; - pci_addr.s.reg = reg; - - return (pci_addr.u64); -} - -static void -octopci_init_pci(device_t dev) -{ - cvmx_npi_mem_access_subid_t npi_mem_access_subid; - cvmx_npi_pci_int_arb_cfg_t npi_pci_int_arb_cfg; - cvmx_npi_ctl_status_t npi_ctl_status; - cvmx_pci_ctl_status_2_t pci_ctl_status_2; - cvmx_pci_cfg56_t pci_cfg56; - cvmx_pci_cfg22_t pci_cfg22; - cvmx_pci_cfg16_t pci_cfg16; - cvmx_pci_cfg19_t pci_cfg19; - cvmx_pci_cfg01_t pci_cfg01; - unsigned i; - - /* - * Reset the PCI bus. - */ - cvmx_write_csr(CVMX_CIU_SOFT_PRST, 0x1); - cvmx_read_csr(CVMX_CIU_SOFT_PRST); - - DELAY(2000); - - npi_ctl_status.u64 = 0; - npi_ctl_status.s.max_word = 1; - npi_ctl_status.s.timer = 1; - cvmx_write_csr(CVMX_NPI_CTL_STATUS, npi_ctl_status.u64); - - /* - * Set host mode. - */ - switch (cvmx_sysinfo_get()->board_type) { -#if defined(OCTEON_VENDOR_LANNER) - case CVMX_BOARD_TYPE_CUST_LANNER_MR320: - case CVMX_BOARD_TYPE_CUST_LANNER_MR955: - /* 32-bit PCI-X */ - cvmx_write_csr(CVMX_CIU_SOFT_PRST, 0x0); - break; -#endif - default: - /* 64-bit PCI-X */ - cvmx_write_csr(CVMX_CIU_SOFT_PRST, 0x4); - break; - } - cvmx_read_csr(CVMX_CIU_SOFT_PRST); - - DELAY(2000); - - /* - * Enable BARs and configure big BAR mode. - */ - pci_ctl_status_2.u32 = 0; - pci_ctl_status_2.s.bb1_hole = 5; /* 256MB hole in BAR1 */ - pci_ctl_status_2.s.bb1_siz = 1; /* BAR1 is 2GB */ - pci_ctl_status_2.s.bb_ca = 1; /* Bypass cache for big BAR */ - pci_ctl_status_2.s.bb_es = 1; /* Do big BAR byte-swapping */ - pci_ctl_status_2.s.bb1 = 1; /* BAR1 is big */ - pci_ctl_status_2.s.bb0 = 1; /* BAR0 is big */ - pci_ctl_status_2.s.bar2pres = 1; /* BAR2 present */ - pci_ctl_status_2.s.pmo_amod = 1; /* Round-robin priority */ - pci_ctl_status_2.s.tsr_hwm = 1; - pci_ctl_status_2.s.bar2_enb = 1; /* Enable BAR2 */ - pci_ctl_status_2.s.bar2_esx = 1; /* Do BAR2 byte-swapping */ - pci_ctl_status_2.s.bar2_cax = 1; /* Bypass cache for BAR2 */ - - NPI_WRITE(CVMX_NPI_PCI_CTL_STATUS_2, pci_ctl_status_2.u32); - - DELAY(2000); - - pci_ctl_status_2.u32 = NPI_READ(CVMX_NPI_PCI_CTL_STATUS_2); - - device_printf(dev, "%u-bit PCI%s bus.\n", - pci_ctl_status_2.s.ap_64ad ? 64 : 32, - pci_ctl_status_2.s.ap_pcix ? "-X" : ""); - - /* - * Set up transaction splitting, etc., parameters. - */ - pci_cfg19.u32 = 0; - pci_cfg19.s.mrbcm = 1; - if (pci_ctl_status_2.s.ap_pcix) { - pci_cfg19.s.mdrrmc = 0; - pci_cfg19.s.tdomc = 4; - } else { - pci_cfg19.s.mdrrmc = 2; - pci_cfg19.s.tdomc = 1; - } - NPI_WRITE(CVMX_NPI_PCI_CFG19, pci_cfg19.u32); - NPI_READ(CVMX_NPI_PCI_CFG19); - - /* - * Set up PCI error handling and memory access. - */ - pci_cfg01.u32 = 0; - pci_cfg01.s.fbbe = 1; - pci_cfg01.s.see = 1; - pci_cfg01.s.pee = 1; - pci_cfg01.s.me = 1; - pci_cfg01.s.msae = 1; - if (pci_ctl_status_2.s.ap_pcix) { - pci_cfg01.s.fbb = 0; - } else { - pci_cfg01.s.fbb = 1; - } - NPI_WRITE(CVMX_NPI_PCI_CFG01, pci_cfg01.u32); - NPI_READ(CVMX_NPI_PCI_CFG01); - - /* - * Enable the Octeon bus arbiter. - */ - npi_pci_int_arb_cfg.u64 = 0; - npi_pci_int_arb_cfg.s.en = 1; - cvmx_write_csr(CVMX_NPI_PCI_INT_ARB_CFG, npi_pci_int_arb_cfg.u64); - - /* - * Disable master latency timer. - */ - pci_cfg16.u32 = 0; - pci_cfg16.s.mltd = 1; - NPI_WRITE(CVMX_NPI_PCI_CFG16, pci_cfg16.u32); - NPI_READ(CVMX_NPI_PCI_CFG16); - - /* - * Configure master arbiter. - */ - pci_cfg22.u32 = 0; - pci_cfg22.s.flush = 1; - pci_cfg22.s.mrv = 255; - NPI_WRITE(CVMX_NPI_PCI_CFG22, pci_cfg22.u32); - NPI_READ(CVMX_NPI_PCI_CFG22); - - /* - * Set up PCI-X capabilities. - */ - if (pci_ctl_status_2.s.ap_pcix) { - pci_cfg56.u32 = 0; - pci_cfg56.s.most = 3; - pci_cfg56.s.roe = 1; /* Enable relaxed ordering */ - pci_cfg56.s.dpere = 1; - pci_cfg56.s.ncp = 0xe8; - pci_cfg56.s.pxcid = 7; - NPI_WRITE(CVMX_NPI_PCI_CFG56, pci_cfg56.u32); - NPI_READ(CVMX_NPI_PCI_CFG56); - } - - NPI_WRITE(CVMX_NPI_PCI_READ_CMD_6, 0x22); - NPI_READ(CVMX_NPI_PCI_READ_CMD_6); - NPI_WRITE(CVMX_NPI_PCI_READ_CMD_C, 0x33); - NPI_READ(CVMX_NPI_PCI_READ_CMD_C); - NPI_WRITE(CVMX_NPI_PCI_READ_CMD_E, 0x33); - NPI_READ(CVMX_NPI_PCI_READ_CMD_E); - - /* - * Configure MEM1 sub-DID access. - */ - npi_mem_access_subid.u64 = 0; - npi_mem_access_subid.s.esr = 1; /* Byte-swap on read */ - npi_mem_access_subid.s.esw = 1; /* Byte-swap on write */ - switch (cvmx_sysinfo_get()->board_type) { -#if defined(OCTEON_VENDOR_LANNER) - case CVMX_BOARD_TYPE_CUST_LANNER_MR955: - npi_mem_access_subid.s.shortl = 1; - break; -#endif - default: - break; - } - cvmx_write_csr(CVMX_NPI_MEM_ACCESS_SUBID3, npi_mem_access_subid.u64); - - /* - * Configure BAR2. Linux says this has to come first. - */ - NPI_WRITE(CVMX_NPI_PCI_CFG08, 0x00000000); - NPI_READ(CVMX_NPI_PCI_CFG08); - NPI_WRITE(CVMX_NPI_PCI_CFG09, 0x00000080); - NPI_READ(CVMX_NPI_PCI_CFG09); - - /* - * Disable BAR1 IndexX. - */ - for (i = 0; i < 32; i++) { - NPI_WRITE(CVMX_NPI_PCI_BAR1_INDEXX(i), 0); - NPI_READ(CVMX_NPI_PCI_BAR1_INDEXX(i)); - } - - /* - * Configure BAR0 and BAR1. - */ - NPI_WRITE(CVMX_NPI_PCI_CFG04, 0x00000000); - NPI_READ(CVMX_NPI_PCI_CFG04); - NPI_WRITE(CVMX_NPI_PCI_CFG05, 0x00000000); - NPI_READ(CVMX_NPI_PCI_CFG05); - - NPI_WRITE(CVMX_NPI_PCI_CFG06, 0x80000000); - NPI_READ(CVMX_NPI_PCI_CFG06); - NPI_WRITE(CVMX_NPI_PCI_CFG07, 0x00000000); - NPI_READ(CVMX_NPI_PCI_CFG07); - - /* - * Clear PCI interrupts. - */ - cvmx_write_csr(CVMX_NPI_PCI_INT_SUM2, 0xffffffffffffffffull); -} - -static device_method_t octopci_methods[] = { - /* Device interface */ - DEVMETHOD(device_identify, octopci_identify), - DEVMETHOD(device_probe, octopci_probe), - DEVMETHOD(device_attach, octopci_attach), - - /* Bus interface */ - DEVMETHOD(bus_read_ivar, octopci_read_ivar), - DEVMETHOD(bus_alloc_resource, octopci_alloc_resource), - DEVMETHOD(bus_release_resource, bus_generic_release_resource), - DEVMETHOD(bus_activate_resource,octopci_activate_resource), - DEVMETHOD(bus_deactivate_resource,bus_generic_deactivate_resource), - DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - - DEVMETHOD(bus_add_child, bus_generic_add_child), - - /* pcib interface */ - DEVMETHOD(pcib_maxslots, octopci_maxslots), - DEVMETHOD(pcib_read_config, octopci_read_config), - DEVMETHOD(pcib_write_config, octopci_write_config), - DEVMETHOD(pcib_route_interrupt, octopci_route_interrupt), - DEVMETHOD(pcib_request_feature, pcib_request_feature_allow), - - DEVMETHOD_END -}; - -static driver_t octopci_driver = { - "pcib", - octopci_methods, - sizeof(struct octopci_softc), -}; -static devclass_t octopci_devclass; -DRIVER_MODULE(octopci, ciu, octopci_driver, octopci_devclass, 0, 0); diff --git a/sys/mips/cavium/octopci_bus_space.c b/sys/mips/cavium/octopci_bus_space.c deleted file mode 100644 index 5637387d4cd..00000000000 --- a/sys/mips/cavium/octopci_bus_space.c +++ /dev/null @@ -1,572 +0,0 @@ -/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */ -/*- - * $Id: bus.h,v 1.6 2007/08/09 11:23:32 katta Exp $ - * - * SPDX-License-Identifier: BSD-2-Clause AND BSD-4-Clause - * - * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, - * NASA Ames Research Center. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Copyright (c) 1996 Charles M. Hannum. All rights reserved. - * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Christopher G. Demetriou - * for the NetBSD Project. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * from: src/sys/alpha/include/bus.h,v 1.5 1999/08/28 00:38:40 peter - */ -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include - -#include - -#include - -static struct bus_space octopci_space = { - /* cookie */ - (void *) 0, - - /* mapping/unmapping */ - octopci_bs_map, - octopci_bs_unmap, - octopci_bs_subregion, - - /* allocation/deallocation */ - NULL, - NULL, - - /* barrier */ - octopci_bs_barrier, - - /* read (single) */ - octopci_bs_r_1, - octopci_bs_r_2, - octopci_bs_r_4, - NULL, - - /* read multiple */ - octopci_bs_rm_1, - octopci_bs_rm_2, - octopci_bs_rm_4, - NULL, - - /* read region */ - octopci_bs_rr_1, - octopci_bs_rr_2, - octopci_bs_rr_4, - NULL, - - /* write (single) */ - octopci_bs_w_1, - octopci_bs_w_2, - octopci_bs_w_4, - NULL, - - /* write multiple */ - octopci_bs_wm_1, - octopci_bs_wm_2, - octopci_bs_wm_4, - NULL, - - /* write region */ - NULL, - octopci_bs_wr_2, - octopci_bs_wr_4, - NULL, - - /* set multiple */ - NULL, - NULL, - NULL, - NULL, - - /* set region */ - NULL, - octopci_bs_sr_2, - octopci_bs_sr_4, - NULL, - - /* copy */ - NULL, - octopci_bs_c_2, - NULL, - NULL, - - /* read (single) stream */ - octopci_bs_r_1, - octopci_bs_r_2, - octopci_bs_r_4, - NULL, - - /* read multiple stream */ - octopci_bs_rm_1, - octopci_bs_rm_2, - octopci_bs_rm_4, - NULL, - - /* read region stream */ - octopci_bs_rr_1, - octopci_bs_rr_2, - octopci_bs_rr_4, - NULL, - - /* write (single) stream */ - octopci_bs_w_1, - octopci_bs_w_2, - octopci_bs_w_4, - NULL, - - /* write multiple stream */ - octopci_bs_wm_1, - octopci_bs_wm_2, - octopci_bs_wm_4, - NULL, - - /* write region stream */ - NULL, - octopci_bs_wr_2, - octopci_bs_wr_4, - NULL, -}; - -#define rd8(a) cvmx_read64_uint8(a) -#define rd16(a) le16toh(cvmx_read64_uint16(a)) -#define rd32(a) le32toh(cvmx_read64_uint32(a)) -#define wr8(a, v) cvmx_write64_uint8(a, v) -#define wr16(a, v) cvmx_write64_uint16(a, htole16(v)) -#define wr32(a, v) cvmx_write64_uint32(a, htole32(v)) - -/* octopci bus_space tag */ -bus_space_tag_t octopci_bus_space = &octopci_space; - -int -octopci_bs_map(void *t __unused, bus_addr_t addr, - bus_size_t size __unused, int flags __unused, - bus_space_handle_t *bshp) -{ - - *bshp = addr; - return (0); -} - -void -octopci_bs_unmap(void *t __unused, bus_space_handle_t bh __unused, - bus_size_t size __unused) -{ - - /* Do nothing */ -} - -int -octopci_bs_subregion(void *t __unused, bus_space_handle_t handle, - bus_size_t offset, bus_size_t size __unused, - bus_space_handle_t *bshp) -{ - - *bshp = handle + offset; - return (0); -} - -uint8_t -octopci_bs_r_1(void *t, bus_space_handle_t handle, - bus_size_t offset) -{ - - return (rd8(handle + offset)); -} - -uint16_t -octopci_bs_r_2(void *t, bus_space_handle_t handle, - bus_size_t offset) -{ - - return (rd16(handle + offset)); -} - -uint32_t -octopci_bs_r_4(void *t, bus_space_handle_t handle, - bus_size_t offset) -{ - - return (rd32(handle + offset)); -} - -void -octopci_bs_rm_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint8_t *addr, size_t count) -{ - - while (count--) - *addr++ = rd8(bsh + offset); -} - -void -octopci_bs_rm_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint16_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) - *addr++ = rd16(baddr); -} - -void -octopci_bs_rm_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint32_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) - *addr++ = rd32(baddr); -} - -/* - * Read `count' 1, 2, 4, or 8 byte quantities from bus space - * described by tag/handle and starting at `offset' and copy into - * buffer provided. - */ -void -octopci_bs_rr_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint8_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - *addr++ = rd8(baddr); - baddr += 1; - } -} - -void -octopci_bs_rr_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint16_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - *addr++ = rd16(baddr); - baddr += 2; - } -} - -void -octopci_bs_rr_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint32_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - *addr++ = rd32(baddr); - baddr += 4; - } -} - -/* - * Write the 1, 2, 4, or 8 byte value `value' to bus space - * described by tag/handle/offset. - */ -void -octopci_bs_w_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint8_t value) -{ - - wr8(bsh + offset, value); -} - -void -octopci_bs_w_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint16_t value) -{ - - wr16(bsh + offset, value); -} - -void -octopci_bs_w_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint32_t value) -{ - - wr32(bsh + offset, value); -} - -/* - * Write `count' 1, 2, 4, or 8 byte quantities from the buffer - * provided to bus space described by tag/handle/offset. - */ -void -octopci_bs_wm_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, const uint8_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) - wr8(baddr, *addr++); -} - -void -octopci_bs_wm_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, const uint16_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) - wr16(baddr, *addr++); -} - -void -octopci_bs_wm_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, const uint32_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) - wr32(baddr, *addr++); -} - -/* - * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided - * to bus space described by tag/handle starting at `offset'. - */ -void -octopci_bs_wr_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, const uint8_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - wr8(baddr, *addr++); - baddr += 1; - } -} - -void -octopci_bs_wr_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, const uint16_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - wr16(baddr, *addr++); - baddr += 2; - } -} - -void -octopci_bs_wr_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, const uint32_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - wr32(baddr, *addr++); - baddr += 4; - } -} - -/* - * Write the 1, 2, 4, or 8 byte value `val' to bus space described - * by tag/handle/offset `count' times. - */ -void -octopci_bs_sm_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint8_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - while (count--) - wr8(addr, value); -} - -void -octopci_bs_sm_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint16_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - while (count--) - wr16(addr, value); -} - -void -octopci_bs_sm_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint32_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - while (count--) - wr32(addr, value); -} - -/* - * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described - * by tag/handle starting at `offset'. - */ -void -octopci_bs_sr_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint8_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - for (; count != 0; count--, addr++) - wr8(addr, value); -} - -void -octopci_bs_sr_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint16_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - for (; count != 0; count--, addr += 2) - wr16(addr, value); -} - -void -octopci_bs_sr_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint32_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - for (; count != 0; count--, addr += 4) - wr32(addr, value); -} - -/* - * Copy `count' 1, 2, 4, or 8 byte values from bus space starting - * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. - */ -void -octopci_bs_c_1(void *t, bus_space_handle_t bsh1, - bus_size_t off1, bus_space_handle_t bsh2, - bus_size_t off2, size_t count) -{ - bus_addr_t addr1 = bsh1 + off1; - bus_addr_t addr2 = bsh2 + off2; - - if (addr1 >= addr2) { - /* src after dest: copy forward */ - for (; count != 0; count--, addr1++, addr2++) - wr8(addr2, rd8(addr1)); - } else { - /* dest after src: copy backwards */ - for (addr1 += (count - 1), addr2 += (count - 1); - count != 0; count--, addr1--, addr2--) - wr8(addr2, rd8(addr1)); - } -} - -void -octopci_bs_c_2(void *t, bus_space_handle_t bsh1, - bus_size_t off1, bus_space_handle_t bsh2, - bus_size_t off2, size_t count) -{ - bus_addr_t addr1 = bsh1 + off1; - bus_addr_t addr2 = bsh2 + off2; - - if (addr1 >= addr2) { - /* src after dest: copy forward */ - for (; count != 0; count--, addr1 += 2, addr2 += 2) - wr16(addr2, rd16(addr1)); - } else { - /* dest after src: copy backwards */ - for (addr1 += 2 * (count - 1), addr2 += 2 * (count - 1); - count != 0; count--, addr1 -= 2, addr2 -= 2) - wr16(addr2, rd16(addr1)); - } -} - -void -octopci_bs_c_4(void *t, bus_space_handle_t bsh1, - bus_size_t off1, bus_space_handle_t bsh2, - bus_size_t off2, size_t count) -{ - bus_addr_t addr1 = bsh1 + off1; - bus_addr_t addr2 = bsh2 + off2; - - if (addr1 >= addr2) { - /* src after dest: copy forward */ - for (; count != 0; count--, addr1 += 4, addr2 += 4) - wr32(addr2, rd32(addr1)); - } else { - /* dest after src: copy backwards */ - for (addr1 += 4 * (count - 1), addr2 += 4 * (count - 1); - count != 0; count--, addr1 -= 4, addr2 -= 4) - wr32(addr2, rd32(addr1)); - } -} - -void -octopci_bs_barrier(void *t __unused, - bus_space_handle_t bsh __unused, - bus_size_t offset __unused, bus_size_t len __unused, - int flags) -{ -#if 0 - if (flags & BUS_SPACE_BARRIER_WRITE) - mips_dcache_wbinv_all(); -#endif -} diff --git a/sys/mips/cavium/octopcireg.h b/sys/mips/cavium/octopcireg.h deleted file mode 100644 index 28efbb36b92..00000000000 --- a/sys/mips/cavium/octopcireg.h +++ /dev/null @@ -1,105 +0,0 @@ -/***********************license start************************************ - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2005-2007 Cavium Networks (support@cavium.com). All rights - * reserved. - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * * Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * - * * Neither the name of Cavium Networks nor the names of - * its contributors may be used to endorse or promote products - * derived from this software without specific prior written - * permission. - * - * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" - * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS - * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH - * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY - * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT - * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES - * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR - * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET - * POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT - * OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. - * - * - * For any questions regarding licensing please contact marketing@caviumnetworks.com - * - ***********************license end**************************************/ - -#ifndef _CAVIUM_OCTOPCIREG_H_ -#define _CAVIUM_OCTOPCIREG_H_ - -/** - * This is the bit decoding used for the Octeon PCI controller addresses for config space - */ -typedef union -{ - uint64_t u64; - uint64_t * u64_ptr; - uint32_t * u32_ptr; - uint16_t * u16_ptr; - uint8_t * u8_ptr; - struct - { - uint64_t upper : 2; - uint64_t reserved : 13; - uint64_t io : 1; - uint64_t did : 5; - uint64_t subdid : 3; - uint64_t reserved2 : 4; - uint64_t endian_swap : 2; - uint64_t reserved3 : 10; - uint64_t bus : 8; - uint64_t dev : 5; - uint64_t func : 3; - uint64_t reg : 8; - } s; -} octeon_pci_config_space_address_t; - -typedef union -{ - uint64_t u64; - uint32_t * u32_ptr; - uint16_t * u16_ptr; - uint8_t * u8_ptr; - struct - { - uint64_t upper : 2; - uint64_t reserved : 13; - uint64_t io : 1; - uint64_t did : 5; - uint64_t subdid : 3; - uint64_t reserved2 : 4; - uint64_t endian_swap : 2; - uint64_t res1 : 1; - uint64_t port : 1; - uint64_t addr : 32; - } s; -} octeon_pci_io_space_address_t; - -#define CVMX_OCT_SUBDID_PCI_CFG 1 -#define CVMX_OCT_SUBDID_PCI_IO 2 -#define CVMX_OCT_SUBDID_PCI_MEM1 3 -#define CVMX_OCT_SUBDID_PCI_MEM2 4 -#define CVMX_OCT_SUBDID_PCI_MEM3 5 -#define CVMX_OCT_SUBDID_PCI_MEM4 6 - -#define CVMX_OCT_PCI_IO_BASE 0x00004000 -#define CVMX_OCT_PCI_IO_SIZE 0x08000000 - -#define CVMX_OCT_PCI_MEM1_BASE 0xf0000000 -#define CVMX_OCT_PCI_MEM1_SIZE 0x0f000000 - -#endif /* !_CAVIUM_OCTOPCIREG_H_ */ diff --git a/sys/mips/cavium/octopcivar.h b/sys/mips/cavium/octopcivar.h deleted file mode 100644 index ad6ab27a2dc..00000000000 --- a/sys/mips/cavium/octopcivar.h +++ /dev/null @@ -1,35 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#ifndef _MIPS_CAVIUM_OCTOPCIVAR_H -#define _MIPS_CAVIUM_OCTOPCIVAR_H - -DECLARE_BUS_SPACE_PROTOTYPES(octopci); - -extern bus_space_tag_t octopci_bus_space; - -#endif /* !_MIPS_CAVIUM_OCTOPCIVAR_H */ diff --git a/sys/mips/cavium/std.octeon1 b/sys/mips/cavium/std.octeon1 deleted file mode 100644 index af984a2e709..00000000000 --- a/sys/mips/cavium/std.octeon1 +++ /dev/null @@ -1,9 +0,0 @@ -# -files "../cavium/files.octeon1" -machine mips mips64 -cpu CPU_CNMIPS - -makeoptions CFLAGS_PARAM_INLINE_UNIT_GROWTH=10000 -makeoptions CFLAGS_PARAM_LARGE_FUNCTION_GROWTH=100000 -makeoptions CFLAGS_ARCH_PARAMS="--param max-inline-insns-single=10000" -makeoptions "CWARNFLAGS.clang"+="-Wno-parentheses-equality -Wno-pointer-sign" diff --git a/sys/mips/cavium/uart_bus_octeonusart.c b/sys/mips/cavium/uart_bus_octeonusart.c deleted file mode 100644 index b2e5ee7a69b..00000000000 --- a/sys/mips/cavium/uart_bus_octeonusart.c +++ /dev/null @@ -1,111 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Wojciech A. Koszek - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * $Id$ - */ -/* - * Skeleton of this file was based on respective code for ARM - * code written by Olivier Houchard. - */ - -/* - * XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is - * experimental and was written for MIPS32 port. - */ -#include "opt_uart.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include - -#include - -#include "uart_if.h" - -extern struct uart_class uart_oct16550_class; - -static int uart_octeon_probe(device_t dev); - -static device_method_t uart_octeon_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, uart_octeon_probe), - DEVMETHOD(device_attach, uart_bus_attach), - DEVMETHOD(device_detach, uart_bus_detach), - {0, 0} -}; - -static driver_t uart_octeon_driver = { - uart_driver_name, - uart_octeon_methods, - sizeof(struct uart_softc), -}; - -extern -SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs; - -static int -uart_octeon_probe(device_t dev) -{ - struct uart_softc *sc; - int unit; - - unit = device_get_unit(dev); - sc = device_get_softc(dev); - sc->sc_class = &uart_oct16550_class; - - /* - * We inherit the settings from the systme console. Note, the bst - * bad bus_space_map are bogus here, but obio doesn't yet support - * them, it seems. - */ - sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs); - bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); - sc->sc_bas.bst = uart_bus_space_mem; - /* - * XXX - * RBR isn't really a great base address. - */ - if (bus_space_map(sc->sc_bas.bst, CVMX_MIO_UARTX_RBR(0), - uart_getrange(sc->sc_class), 0, &sc->sc_bas.bsh) != 0) - return (ENXIO); - return (uart_bus_probe(dev, sc->sc_bas.regshft, 0, 0, 0, unit, 0)); -} - -DRIVER_MODULE(uart, obio, uart_octeon_driver, uart_devclass, 0, 0); diff --git a/sys/mips/cavium/uart_cpu_octeonusart.c b/sys/mips/cavium/uart_cpu_octeonusart.c deleted file mode 100644 index cea60f3b9c7..00000000000 --- a/sys/mips/cavium/uart_cpu_octeonusart.c +++ /dev/null @@ -1,173 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Wojciech A. Koszek All rights reserved. - * Copyright (c) 2009 M. Warner Losh - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $Id$ - */ -#include "opt_uart.h" - -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include - -#include - -bus_space_tag_t uart_bus_space_io; -bus_space_tag_t uart_bus_space_mem; - -/* - * Specailized uart bus space. We present a 1 apart byte oriented - * bus to the outside world, but internally translate to/from the 8-apart - * 64-bit word bus that's on the octeon. We only support simple read/write - * in this space. Everything else is undefined. - */ -static uint8_t -ou_bs_r_1(void *t, bus_space_handle_t handle, bus_size_t offset) -{ - - return (cvmx_read64_uint64(handle + offset)); -} - -static uint16_t -ou_bs_r_2(void *t, bus_space_handle_t handle, bus_size_t offset) -{ - - return (cvmx_read64_uint64(handle + offset)); -} - -static uint32_t -ou_bs_r_4(void *t, bus_space_handle_t handle, bus_size_t offset) -{ - - return (cvmx_read64_uint64(handle + offset)); -} - -static uint64_t -ou_bs_r_8(void *t, bus_space_handle_t handle, bus_size_t offset) -{ - - return (cvmx_read64_uint64(handle + offset)); -} - -static void -ou_bs_w_1(void *t, bus_space_handle_t bsh, bus_size_t offset, uint8_t value) -{ - - cvmx_write64_uint64(bsh + offset, value); -} - -static void -ou_bs_w_2(void *t, bus_space_handle_t bsh, bus_size_t offset, uint16_t value) -{ - - cvmx_write64_uint64(bsh + offset, value); -} - -static void -ou_bs_w_4(void *t, bus_space_handle_t bsh, bus_size_t offset, uint32_t value) -{ - - cvmx_write64_uint64(bsh + offset, value); -} - -static void -ou_bs_w_8(void *t, bus_space_handle_t bsh, bus_size_t offset, uint64_t value) -{ - - cvmx_write64_uint64(bsh + offset, value); -} - -struct bus_space octeon_uart_tag = { - .bs_map = generic_bs_map, - .bs_unmap = generic_bs_unmap, - .bs_subregion = generic_bs_subregion, - .bs_barrier = generic_bs_barrier, - .bs_r_1 = ou_bs_r_1, - .bs_r_2 = ou_bs_r_2, - .bs_r_4 = ou_bs_r_4, - .bs_r_8 = ou_bs_r_8, - .bs_w_1 = ou_bs_w_1, - .bs_w_2 = ou_bs_w_2, - .bs_w_4 = ou_bs_w_4, - .bs_w_8 = ou_bs_w_8, -}; - -extern struct uart_class uart_oct16550_class; - -int -uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2) -{ - - return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0); -} - -int -uart_cpu_getdev(int devtype, struct uart_devinfo *di) -{ - struct uart_class *class = &uart_oct16550_class; - - /* - * These fields need to be setup corretly for uart_getenv to - * work in all cases. - */ - uart_bus_space_io = NULL; /* No io map for this device */ - uart_bus_space_mem = &octeon_uart_tag; - di->bas.bst = uart_bus_space_mem; - - /* - * If env specification for UART exists it takes precedence: - * hw.uart.console="mm:0xf1012000" or similar - */ - if (uart_getenv(devtype, di, class) == 0) - return (0); - - /* - * Fallback to UART0 for console. - */ - di->ops = uart_getops(class); - di->bas.chan = 0; - /* XXX */ - if (bus_space_map(di->bas.bst, CVMX_MIO_UARTX_RBR(0), - uart_getrange(class), 0, &di->bas.bsh) != 0) - return (ENXIO); - di->bas.regshft = 3; - di->bas.rclk = 0; - di->baudrate = 115200; - di->databits = 8; - di->stopbits = 1; - di->parity = UART_PARITY_NONE; - - return (0); -} diff --git a/sys/mips/cavium/uart_dev_oct16550.c b/sys/mips/cavium/uart_dev_oct16550.c deleted file mode 100644 index bb977635281..00000000000 --- a/sys/mips/cavium/uart_dev_oct16550.c +++ /dev/null @@ -1,855 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause AND BSD-2-Clause - * - * Copyright (c) 2003 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * uart_dev_oct16550.c - * - * Derived from uart_dev_ns8250.c - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include - -#include - -#include "uart_if.h" - -/* - * Clear pending interrupts. THRE is cleared by reading IIR. Data - * that may have been received gets lost here. - */ -static void -oct16550_clrint (struct uart_bas *bas) -{ - uint8_t iir; - - iir = uart_getreg(bas, REG_IIR); - while ((iir & IIR_NOPEND) == 0) { - iir &= IIR_IMASK; - if (iir == IIR_RLS) - (void)uart_getreg(bas, REG_LSR); - else if (iir == IIR_RXRDY || iir == IIR_RXTOUT) - (void)uart_getreg(bas, REG_DATA); - else if (iir == IIR_MLSC) - (void)uart_getreg(bas, REG_MSR); - else if (iir == IIR_BUSY) - (void) uart_getreg(bas, REG_USR); - uart_barrier(bas); - iir = uart_getreg(bas, REG_IIR); - } -} - -static int delay_changed = 1; - -static int -oct16550_delay (struct uart_bas *bas) -{ - int divisor; - u_char lcr; - static int delay = 0; - - if (!delay_changed) return delay; - delay_changed = 0; - lcr = uart_getreg(bas, REG_LCR); - uart_setreg(bas, REG_LCR, lcr | LCR_DLAB); - uart_barrier(bas); - divisor = uart_getreg(bas, REG_DLL) | (uart_getreg(bas, REG_DLH) << 8); - uart_barrier(bas); - uart_setreg(bas, REG_LCR, lcr); - uart_barrier(bas); - - if(!bas->rclk) - return 10; /* return an approx delay value */ - - /* 1/10th the time to transmit 1 character (estimate). */ - if (divisor <= 134) - return (16000000 * divisor / bas->rclk); - return (16000 * divisor / (bas->rclk / 1000)); - -} - -static int -oct16550_divisor (int rclk, int baudrate) -{ - int actual_baud, divisor; - int error; - - if (baudrate == 0) - return (0); - - divisor = (rclk / (baudrate << 3) + 1) >> 1; - if (divisor == 0 || divisor >= 65536) - return (0); - actual_baud = rclk / (divisor << 4); - - /* 10 times error in percent: */ - error = ((actual_baud - baudrate) * 2000 / baudrate + 1) >> 1; - - /* 3.0% maximum error tolerance: */ - if (error < -30 || error > 30) - return (0); - - return (divisor); -} - -static int -oct16550_drain (struct uart_bas *bas, int what) -{ - int delay, limit; - - delay = oct16550_delay(bas); - - if (what & UART_DRAIN_TRANSMITTER) { - /* - * Pick an arbitrary high limit to avoid getting stuck in - * an infinite loop when the hardware is broken. Make the - * limit high enough to handle large FIFOs. - */ - limit = 10*10*10*1024; - while ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0 && --limit) - DELAY(delay); - if (limit == 0) { - /* printf("oct16550: transmitter appears stuck... "); */ - return (0); - } - } - - if (what & UART_DRAIN_RECEIVER) { - /* - * Pick an arbitrary high limit to avoid getting stuck in - * an infinite loop when the hardware is broken. Make the - * limit high enough to handle large FIFOs and integrated - * UARTs. The HP rx2600 for example has 3 UARTs on the - * management board that tend to get a lot of data send - * to it when the UART is first activated. - */ - limit=10*4096; - while ((uart_getreg(bas, REG_LSR) & LSR_RXRDY) && --limit) { - (void)uart_getreg(bas, REG_DATA); - uart_barrier(bas); - DELAY(delay << 2); - } - if (limit == 0) { - /* printf("oct16550: receiver appears broken... "); */ - return (EIO); - } - } - - return (0); -} - -/* - * We can only flush UARTs with FIFOs. UARTs without FIFOs should be - * drained. WARNING: this function clobbers the FIFO setting! - */ -static void -oct16550_flush (struct uart_bas *bas, int what) -{ - uint8_t fcr; - - fcr = FCR_ENABLE; - if (what & UART_FLUSH_TRANSMITTER) - fcr |= FCR_XMT_RST; - if (what & UART_FLUSH_RECEIVER) - fcr |= FCR_RCV_RST; - uart_setreg(bas, REG_FCR, fcr); - uart_barrier(bas); -} - -static int -oct16550_param (struct uart_bas *bas, int baudrate, int databits, int stopbits, - int parity) -{ - int divisor; - uint8_t lcr; - - lcr = 0; - if (databits >= 8) - lcr |= LCR_8BITS; - else if (databits == 7) - lcr |= LCR_7BITS; - else if (databits == 6) - lcr |= LCR_6BITS; - else - lcr |= LCR_5BITS; - if (stopbits > 1) - lcr |= LCR_STOPB; - lcr |= parity << 3; - - /* Set baudrate. */ - if (baudrate > 0) { - divisor = oct16550_divisor(bas->rclk, baudrate); - if (divisor == 0) - return (EINVAL); - uart_setreg(bas, REG_LCR, lcr | LCR_DLAB); - uart_barrier(bas); - uart_setreg(bas, REG_DLL, divisor & 0xff); - uart_setreg(bas, REG_DLH, (divisor >> 8) & 0xff); - uart_barrier(bas); - delay_changed = 1; - } - - /* Set LCR and clear DLAB. */ - uart_setreg(bas, REG_LCR, lcr); - uart_barrier(bas); - return (0); -} - -/* - * Low-level UART interface. - */ -static int oct16550_probe(struct uart_bas *bas); -static void oct16550_init(struct uart_bas *bas, int, int, int, int); -static void oct16550_term(struct uart_bas *bas); -static void oct16550_putc(struct uart_bas *bas, int); -static int oct16550_rxready(struct uart_bas *bas); -static int oct16550_getc(struct uart_bas *bas, struct mtx *); - -struct uart_ops uart_oct16550_ops = { - .probe = oct16550_probe, - .init = oct16550_init, - .term = oct16550_term, - .putc = oct16550_putc, - .rxready = oct16550_rxready, - .getc = oct16550_getc, -}; - -static int -oct16550_probe (struct uart_bas *bas) -{ - u_char val; - - /* Check known 0 bits that don't depend on DLAB. */ - val = uart_getreg(bas, REG_IIR); - if (val & 0x30) - return (ENXIO); - val = uart_getreg(bas, REG_MCR); - if (val & 0xc0) - return (ENXIO); - val = uart_getreg(bas, REG_USR); - if (val & 0xe0) - return (ENXIO); - return (0); -} - -static void -oct16550_init (struct uart_bas *bas, int baudrate, int databits, int stopbits, - int parity) -{ - u_char ier; - - oct16550_param(bas, baudrate, databits, stopbits, parity); - - /* Disable all interrupt sources. */ - ier = uart_getreg(bas, REG_IER) & 0x0; - uart_setreg(bas, REG_IER, ier); - uart_barrier(bas); - - /* Disable the FIFO (if present). */ -// uart_setreg(bas, REG_FCR, 0); - uart_barrier(bas); - - /* Set RTS & DTR. */ - uart_setreg(bas, REG_MCR, MCR_RTS | MCR_DTR); - uart_barrier(bas); - - oct16550_clrint(bas); -} - -static void -oct16550_term (struct uart_bas *bas) -{ - - /* Clear RTS & DTR. */ - uart_setreg(bas, REG_MCR, 0); - uart_barrier(bas); -} - -static inline void oct16550_wait_txhr_empty (struct uart_bas *bas, int limit, int delay) -{ - while (((uart_getreg(bas, REG_LSR) & LSR_THRE) == 0) && - ((uart_getreg(bas, REG_USR) & USR_TXFIFO_NOTFULL) == 0)) - DELAY(delay); -} - -static void -oct16550_putc (struct uart_bas *bas, int c) -{ - int delay; - - /* 1/10th the time to transmit 1 character (estimate). */ - delay = oct16550_delay(bas); - oct16550_wait_txhr_empty(bas, 100, delay); - uart_setreg(bas, REG_DATA, c); - uart_barrier(bas); - oct16550_wait_txhr_empty(bas, 100, delay); -} - -static int -oct16550_rxready (struct uart_bas *bas) -{ - - return ((uart_getreg(bas, REG_LSR) & LSR_RXRDY) != 0 ? 1 : 0); -} - -static int -oct16550_getc (struct uart_bas *bas, struct mtx *hwmtx) -{ - int c, delay; - - uart_lock(hwmtx); - - /* 1/10th the time to transmit 1 character (estimate). */ - delay = oct16550_delay(bas); - - while ((uart_getreg(bas, REG_LSR) & LSR_RXRDY) == 0) { - uart_unlock(hwmtx); - DELAY(delay); - uart_lock(hwmtx); - } - - c = uart_getreg(bas, REG_DATA); - - uart_unlock(hwmtx); - - return (c); -} - -/* - * High-level UART interface. - */ -struct oct16550_softc { - struct uart_softc base; - uint8_t fcr; - uint8_t ier; - uint8_t mcr; -}; - -static int oct16550_bus_attach(struct uart_softc *); -static int oct16550_bus_detach(struct uart_softc *); -static int oct16550_bus_flush(struct uart_softc *, int); -static int oct16550_bus_getsig(struct uart_softc *); -static int oct16550_bus_ioctl(struct uart_softc *, int, intptr_t); -static int oct16550_bus_ipend(struct uart_softc *); -static int oct16550_bus_param(struct uart_softc *, int, int, int, int); -static int oct16550_bus_probe(struct uart_softc *); -static int oct16550_bus_receive(struct uart_softc *); -static int oct16550_bus_setsig(struct uart_softc *, int); -static int oct16550_bus_transmit(struct uart_softc *); -static bool oct16550_bus_txbusy(struct uart_softc *); -static void oct16550_bus_grab(struct uart_softc *); -static void oct16550_bus_ungrab(struct uart_softc *); - -static kobj_method_t oct16550_methods[] = { - KOBJMETHOD(uart_attach, oct16550_bus_attach), - KOBJMETHOD(uart_detach, oct16550_bus_detach), - KOBJMETHOD(uart_flush, oct16550_bus_flush), - KOBJMETHOD(uart_getsig, oct16550_bus_getsig), - KOBJMETHOD(uart_ioctl, oct16550_bus_ioctl), - KOBJMETHOD(uart_ipend, oct16550_bus_ipend), - KOBJMETHOD(uart_param, oct16550_bus_param), - KOBJMETHOD(uart_probe, oct16550_bus_probe), - KOBJMETHOD(uart_receive, oct16550_bus_receive), - KOBJMETHOD(uart_setsig, oct16550_bus_setsig), - KOBJMETHOD(uart_transmit, oct16550_bus_transmit), - KOBJMETHOD(uart_txbusy, oct16550_bus_txbusy), - KOBJMETHOD(uart_grab, oct16550_bus_grab), - KOBJMETHOD(uart_ungrab, oct16550_bus_ungrab), - KOBJMETHOD_END -}; - -struct uart_class uart_oct16550_class = { - "oct16550 class", - oct16550_methods, - sizeof(struct oct16550_softc), - .uc_ops = &uart_oct16550_ops, - .uc_range = 8 << 3, - .uc_rclk = 0, - .uc_rshift = 0 -}; - -#define SIGCHG(c, i, s, d) \ - if (c) { \ - i |= (i & s) ? s : s | d; \ - } else { \ - i = (i & s) ? (i & ~s) | d : i; \ - } - -static int -oct16550_bus_attach (struct uart_softc *sc) -{ - struct oct16550_softc *oct16550 = (struct oct16550_softc*)sc; - struct uart_bas *bas; - int unit; - - unit = device_get_unit(sc->sc_dev); - bas = &sc->sc_bas; - - oct16550_drain(bas, UART_DRAIN_TRANSMITTER); - oct16550->mcr = uart_getreg(bas, REG_MCR); - oct16550->fcr = FCR_ENABLE | FCR_RX_HIGH; - uart_setreg(bas, REG_FCR, oct16550->fcr); - uart_barrier(bas); - oct16550_bus_flush(sc, UART_FLUSH_RECEIVER|UART_FLUSH_TRANSMITTER); - - if (oct16550->mcr & MCR_DTR) - sc->sc_hwsig |= SER_DTR; - if (oct16550->mcr & MCR_RTS) - sc->sc_hwsig |= SER_RTS; - oct16550_bus_getsig(sc); - - oct16550_clrint(bas); - oct16550->ier = uart_getreg(bas, REG_IER) & 0xf0; - oct16550->ier |= IER_EMSC | IER_ERLS | IER_ERXRDY; - uart_setreg(bas, REG_IER, oct16550->ier); - uart_barrier(bas); - - return (0); -} - -static int -oct16550_bus_detach (struct uart_softc *sc) -{ - struct uart_bas *bas; - u_char ier; - - bas = &sc->sc_bas; - ier = uart_getreg(bas, REG_IER) & 0xf0; - uart_setreg(bas, REG_IER, ier); - uart_barrier(bas); - oct16550_clrint(bas); - return (0); -} - -static int -oct16550_bus_flush (struct uart_softc *sc, int what) -{ - struct oct16550_softc *oct16550 = (struct oct16550_softc*)sc; - struct uart_bas *bas; - int error; - - bas = &sc->sc_bas; - uart_lock(sc->sc_hwmtx); - if (sc->sc_rxfifosz > 1) { - oct16550_flush(bas, what); - uart_setreg(bas, REG_FCR, oct16550->fcr); - uart_barrier(bas); - error = 0; - } else - error = oct16550_drain(bas, what); - uart_unlock(sc->sc_hwmtx); - return (error); -} - -static int -oct16550_bus_getsig (struct uart_softc *sc) -{ - uint32_t new, old, sig; - uint8_t msr; - - do { - old = sc->sc_hwsig; - sig = old; - uart_lock(sc->sc_hwmtx); - msr = uart_getreg(&sc->sc_bas, REG_MSR); - uart_unlock(sc->sc_hwmtx); - SIGCHG(msr & MSR_DSR, sig, SER_DSR, SER_DDSR); - SIGCHG(msr & MSR_CTS, sig, SER_CTS, SER_DCTS); - SIGCHG(msr & MSR_DCD, sig, SER_DCD, SER_DDCD); - SIGCHG(msr & MSR_RI, sig, SER_RI, SER_DRI); - new = sig & ~SER_MASK_DELTA; - } while (!atomic_cmpset_32(&sc->sc_hwsig, old, new)); - return (sig); -} - -static int -oct16550_bus_ioctl (struct uart_softc *sc, int request, intptr_t data) -{ - struct uart_bas *bas; - int baudrate, divisor, error; - uint8_t efr, lcr; - - bas = &sc->sc_bas; - error = 0; - uart_lock(sc->sc_hwmtx); - switch (request) { - case UART_IOCTL_BREAK: - lcr = uart_getreg(bas, REG_LCR); - if (data) - lcr |= LCR_SBREAK; - else - lcr &= ~LCR_SBREAK; - uart_setreg(bas, REG_LCR, lcr); - uart_barrier(bas); - break; - case UART_IOCTL_IFLOW: - lcr = uart_getreg(bas, REG_LCR); - uart_barrier(bas); - uart_setreg(bas, REG_LCR, 0xbf); - uart_barrier(bas); - efr = uart_getreg(bas, REG_EFR); - if (data) - efr |= EFR_RTS; - else - efr &= ~EFR_RTS; - uart_setreg(bas, REG_EFR, efr); - uart_barrier(bas); - uart_setreg(bas, REG_LCR, lcr); - uart_barrier(bas); - break; - case UART_IOCTL_OFLOW: - lcr = uart_getreg(bas, REG_LCR); - uart_barrier(bas); - uart_setreg(bas, REG_LCR, 0xbf); - uart_barrier(bas); - efr = uart_getreg(bas, REG_EFR); - if (data) - efr |= EFR_CTS; - else - efr &= ~EFR_CTS; - uart_setreg(bas, REG_EFR, efr); - uart_barrier(bas); - uart_setreg(bas, REG_LCR, lcr); - uart_barrier(bas); - break; - case UART_IOCTL_BAUD: - lcr = uart_getreg(bas, REG_LCR); - uart_setreg(bas, REG_LCR, lcr | LCR_DLAB); - uart_barrier(bas); - divisor = uart_getreg(bas, REG_DLL) | - (uart_getreg(bas, REG_DLH) << 8); - uart_barrier(bas); - uart_setreg(bas, REG_LCR, lcr); - uart_barrier(bas); - baudrate = (divisor > 0) ? bas->rclk / divisor / 16 : 0; - delay_changed = 1; - if (baudrate > 0) - *(int*)data = baudrate; - else - error = ENXIO; - break; - default: - error = EINVAL; - break; - } - uart_unlock(sc->sc_hwmtx); - return (error); -} - -static int -oct16550_bus_ipend(struct uart_softc *sc) -{ - struct uart_bas *bas; - int ipend = 0; - uint8_t iir, lsr; - - bas = &sc->sc_bas; - uart_lock(sc->sc_hwmtx); - - iir = uart_getreg(bas, REG_IIR) & IIR_IMASK; - if (iir != IIR_NOPEND) { - if (iir == IIR_RLS) { - lsr = uart_getreg(bas, REG_LSR); - if (lsr & LSR_OE) - ipend |= SER_INT_OVERRUN; - if (lsr & LSR_BI) - ipend |= SER_INT_BREAK; - if (lsr & LSR_RXRDY) - ipend |= SER_INT_RXREADY; - - } else if (iir == IIR_RXRDY) { - ipend |= SER_INT_RXREADY; - - } else if (iir == IIR_RXTOUT) { - ipend |= SER_INT_RXREADY; - - } else if (iir == IIR_TXRDY) { - ipend |= SER_INT_TXIDLE; - - } else if (iir == IIR_MLSC) { - ipend |= SER_INT_SIGCHG; - - } else if (iir == IIR_BUSY) { - (void) uart_getreg(bas, REG_USR); - } - } - uart_unlock(sc->sc_hwmtx); - - return (ipend); -} - -static int -oct16550_bus_param (struct uart_softc *sc, int baudrate, int databits, - int stopbits, int parity) -{ - struct uart_bas *bas; - int error; - - bas = &sc->sc_bas; - uart_lock(sc->sc_hwmtx); - error = oct16550_param(bas, baudrate, databits, stopbits, parity); - uart_unlock(sc->sc_hwmtx); - return (error); -} - -static int -oct16550_bus_probe (struct uart_softc *sc) -{ - struct uart_bas *bas; - int error; - - bas = &sc->sc_bas; - bas->rclk = uart_oct16550_class.uc_rclk = cvmx_clock_get_rate(CVMX_CLOCK_SCLK); - - error = oct16550_probe(bas); - if (error) { - return (error); - } - - uart_setreg(bas, REG_MCR, (MCR_DTR | MCR_RTS)); - - /* - * Enable FIFOs. And check that the UART has them. If not, we're - * done. Since this is the first time we enable the FIFOs, we reset - * them. - */ - oct16550_drain(bas, UART_DRAIN_TRANSMITTER); -#define ENABLE_OCTEON_FIFO 1 -#ifdef ENABLE_OCTEON_FIFO - uart_setreg(bas, REG_FCR, FCR_ENABLE | FCR_XMT_RST | FCR_RCV_RST); -#endif - uart_barrier(bas); - - oct16550_flush(bas, UART_FLUSH_RECEIVER|UART_FLUSH_TRANSMITTER); - - if (device_get_unit(sc->sc_dev)) { - device_set_desc(sc->sc_dev, "Octeon-16550 channel 1"); - } else { - device_set_desc(sc->sc_dev, "Octeon-16550 channel 0"); - } -#ifdef ENABLE_OCTEON_FIFO - sc->sc_rxfifosz = 64; - sc->sc_txfifosz = 64; -#else - sc->sc_rxfifosz = 1; - sc->sc_txfifosz = 1; -#endif - -#if 0 - /* - * XXX there are some issues related to hardware flow control and - * it's likely that uart(4) is the cause. This basicly needs more - * investigation, but we avoid using for hardware flow control - * until then. - */ - /* 16650s or higher have automatic flow control. */ - if (sc->sc_rxfifosz > 16) { - sc->sc_hwiflow = 1; - sc->sc_hwoflow = 1; - } -#endif - - return (0); -} - -static int -oct16550_bus_receive (struct uart_softc *sc) -{ - struct uart_bas *bas; - int xc; - uint8_t lsr; - - bas = &sc->sc_bas; - uart_lock(sc->sc_hwmtx); - lsr = uart_getreg(bas, REG_LSR); - - while (lsr & LSR_RXRDY) { - if (uart_rx_full(sc)) { - sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; - break; - } - xc = uart_getreg(bas, REG_DATA); - if (lsr & LSR_FE) - xc |= UART_STAT_FRAMERR; - if (lsr & LSR_PE) - xc |= UART_STAT_PARERR; - uart_rx_put(sc, xc); - lsr = uart_getreg(bas, REG_LSR); - } - /* Discard everything left in the Rx FIFO. */ - /* - * First do a dummy read/discard anyway, in case the UART was lying to us. - * This problem was seen on board, when IIR said RBR, but LSR said no RXRDY - * Results in a stuck ipend loop. - */ - (void)uart_getreg(bas, REG_DATA); - while (lsr & LSR_RXRDY) { - (void)uart_getreg(bas, REG_DATA); - uart_barrier(bas); - lsr = uart_getreg(bas, REG_LSR); - } - uart_unlock(sc->sc_hwmtx); - return (0); -} - -static int -oct16550_bus_setsig (struct uart_softc *sc, int sig) -{ - struct oct16550_softc *oct16550 = (struct oct16550_softc*)sc; - struct uart_bas *bas; - uint32_t new, old; - - bas = &sc->sc_bas; - do { - old = sc->sc_hwsig; - new = old; - if (sig & SER_DDTR) { - SIGCHG(sig & SER_DTR, new, SER_DTR, - SER_DDTR); - } - if (sig & SER_DRTS) { - SIGCHG(sig & SER_RTS, new, SER_RTS, - SER_DRTS); - } - } while (!atomic_cmpset_32(&sc->sc_hwsig, old, new)); - uart_lock(sc->sc_hwmtx); - oct16550->mcr &= ~(MCR_DTR|MCR_RTS); - if (new & SER_DTR) - oct16550->mcr |= MCR_DTR; - if (new & SER_RTS) - oct16550->mcr |= MCR_RTS; - uart_setreg(bas, REG_MCR, oct16550->mcr); - uart_barrier(bas); - uart_unlock(sc->sc_hwmtx); - return (0); -} - -static int -oct16550_bus_transmit (struct uart_softc *sc) -{ - struct oct16550_softc *oct16550 = (struct oct16550_softc*)sc; - struct uart_bas *bas; - int i; - - bas = &sc->sc_bas; - uart_lock(sc->sc_hwmtx); -#ifdef NO_UART_INTERRUPTS - for (i = 0; i < sc->sc_txdatasz; i++) { - oct16550_putc(bas, sc->sc_txbuf[i]); - } -#else - - oct16550_wait_txhr_empty(bas, 100, oct16550_delay(bas)); - uart_setreg(bas, REG_IER, oct16550->ier | IER_ETXRDY); - uart_barrier(bas); - - for (i = 0; i < sc->sc_txdatasz; i++) { - uart_setreg(bas, REG_DATA, sc->sc_txbuf[i]); - uart_barrier(bas); - } - sc->sc_txbusy = 1; -#endif - uart_unlock(sc->sc_hwmtx); - return (0); -} - -static bool -oct16550_bus_txbusy(struct uart_softc *sc) -{ - struct uart_bas *bas = &sc->sc_bas; - - if ((uart_getreg(bas, REG_LSR) & (LSR_TEMT | LSR_THRE)) != - (LSR_TEMT | LSR_THRE)) - return (true); - return (false); -} - -static void -oct16550_bus_grab(struct uart_softc *sc) -{ - struct uart_bas *bas = &sc->sc_bas; - - /* - * turn off all interrupts to enter polling mode. Leave the - * saved mask alone. We'll restore whatever it was in ungrab. - * All pending interupt signals are reset when IER is set to 0. - */ - uart_lock(sc->sc_hwmtx); - uart_setreg(bas, REG_IER, 0); - uart_barrier(bas); - uart_unlock(sc->sc_hwmtx); -} - -static void -oct16550_bus_ungrab(struct uart_softc *sc) -{ - struct oct16550_softc *oct16550 = (struct oct16550_softc*)sc; - struct uart_bas *bas = &sc->sc_bas; - - /* - * Restore previous interrupt mask - */ - uart_lock(sc->sc_hwmtx); - uart_setreg(bas, REG_IER, oct16550->ier); - uart_barrier(bas); - uart_unlock(sc->sc_hwmtx); -} diff --git a/sys/mips/cavium/usb/octusb.c b/sys/mips/cavium/usb/octusb.c deleted file mode 100644 index 42edea21ad4..00000000000 --- a/sys/mips/cavium/usb/octusb.c +++ /dev/null @@ -1,1933 +0,0 @@ -#include -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * This file contains the driver for Octeon Executive Library USB - * Controller driver API. - */ - -/* TODO: The root HUB port callback is not yet implemented. */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#define USB_DEBUG_VAR octusbdebug - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include - -#define OCTUSB_BUS2SC(bus) \ - ((struct octusb_softc *)(((uint8_t *)(bus)) - \ - ((uint8_t *)&(((struct octusb_softc *)0)->sc_bus)))) - -#ifdef USB_DEBUG -static int octusbdebug = 0; - -static SYSCTL_NODE(_hw_usb, OID_AUTO, octusb, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, - "OCTUSB"); -SYSCTL_INT(_hw_usb_octusb, OID_AUTO, debug, CTLFLAG_RWTUN, - &octusbdebug, 0, "OCTUSB debug level"); -#endif - -struct octusb_std_temp { - octusb_cmd_t *func; - struct octusb_td *td; - struct octusb_td *td_next; - struct usb_page_cache *pc; - uint32_t offset; - uint32_t len; - uint8_t short_pkt; - uint8_t setup_alt_next; -}; - -extern struct usb_bus_methods octusb_bus_methods; -extern struct usb_pipe_methods octusb_device_bulk_methods; -extern struct usb_pipe_methods octusb_device_ctrl_methods; -extern struct usb_pipe_methods octusb_device_intr_methods; -extern struct usb_pipe_methods octusb_device_isoc_methods; - -static void octusb_standard_done(struct usb_xfer *); -static void octusb_device_done(struct usb_xfer *, usb_error_t); -static void octusb_timeout(void *); -static void octusb_do_poll(struct usb_bus *); - -static cvmx_usb_speed_t -octusb_convert_speed(enum usb_dev_speed speed) -{ - ; /* indent fix */ - switch (speed) { - case USB_SPEED_HIGH: - return (CVMX_USB_SPEED_HIGH); - case USB_SPEED_FULL: - return (CVMX_USB_SPEED_FULL); - default: - return (CVMX_USB_SPEED_LOW); - } -} - -static cvmx_usb_transfer_t -octusb_convert_ep_type(uint8_t ep_type) -{ - ; /* indent fix */ - switch (ep_type & UE_XFERTYPE) { - case UE_CONTROL: - return (CVMX_USB_TRANSFER_CONTROL); - case UE_INTERRUPT: - return (CVMX_USB_TRANSFER_INTERRUPT); - case UE_ISOCHRONOUS: - return (CVMX_USB_TRANSFER_ISOCHRONOUS); - case UE_BULK: - return (CVMX_USB_TRANSFER_BULK); - default: - return (0); /* should not happen */ - } -} - -static uint8_t -octusb_host_alloc_endpoint(struct octusb_td *td) -{ - struct octusb_softc *sc; - int ep_handle; - - if (td->qh->fixup_pending) - return (1); /* busy */ - - if (td->qh->ep_allocated) - return (0); /* success */ - - /* get softc */ - sc = td->qh->sc; - - ep_handle = cvmx_usb_open_pipe( - &sc->sc_port[td->qh->root_port_index].state, - 0, - td->qh->dev_addr, - td->qh->ep_num & UE_ADDR, - octusb_convert_speed(td->qh->dev_speed), - td->qh->max_packet_size, - octusb_convert_ep_type(td->qh->ep_type), - (td->qh->ep_num & UE_DIR_IN) ? CVMX_USB_DIRECTION_IN : - CVMX_USB_DIRECTION_OUT, - td->qh->ep_interval, - (td->qh->dev_speed == USB_SPEED_HIGH) ? td->qh->ep_mult : 0, - td->qh->hs_hub_addr, - td->qh->hs_hub_port); - - if (ep_handle < 0) { - DPRINTFN(1, "cvmx_usb_open_pipe failed: %d\n", ep_handle); - return (1); /* busy */ - } - - cvmx_usb_set_toggle( - &sc->sc_port[td->qh->root_port_index].state, - ep_handle, td->qh->ep_toggle_next); - - td->qh->fixup_handle = -1; - td->qh->fixup_complete = 0; - td->qh->fixup_len = 0; - td->qh->fixup_off = 0; - td->qh->fixup_pending = 0; - td->qh->fixup_actlen = 0; - - td->qh->ep_handle = ep_handle; - td->qh->ep_allocated = 1; - - return (0); /* success */ -} - -static void -octusb_host_free_endpoint(struct octusb_td *td) -{ - struct octusb_softc *sc; - - if (td->qh->ep_allocated == 0) - return; - - /* get softc */ - sc = td->qh->sc; - - if (td->qh->fixup_handle >= 0) { - /* cancel, if any */ - cvmx_usb_cancel(&sc->sc_port[td->qh->root_port_index].state, - td->qh->ep_handle, td->qh->fixup_handle); - } - cvmx_usb_close_pipe(&sc->sc_port[td->qh->root_port_index].state, td->qh->ep_handle); - - td->qh->ep_allocated = 0; -} - -static void -octusb_complete_cb(cvmx_usb_state_t *state, - cvmx_usb_callback_t reason, - cvmx_usb_complete_t status, - int pipe_handle, int submit_handle, - int bytes_transferred, void *user_data) -{ - struct octusb_td *td; - - if (reason != CVMX_USB_CALLBACK_TRANSFER_COMPLETE) - return; - - td = user_data; - - td->qh->fixup_complete = 1; - td->qh->fixup_pending = 0; - td->qh->fixup_actlen = bytes_transferred; - td->qh->fixup_handle = -1; - - switch (status) { - case CVMX_USB_COMPLETE_SUCCESS: - case CVMX_USB_COMPLETE_SHORT: - td->error_any = 0; - td->error_stall = 0; - break; - case CVMX_USB_COMPLETE_STALL: - td->error_stall = 1; - td->error_any = 1; - break; - default: - td->error_any = 1; - break; - } -} - -static uint8_t -octusb_host_control_header_tx(struct octusb_td *td) -{ - int status; - - /* allocate endpoint and check pending */ - if (octusb_host_alloc_endpoint(td)) - return (1); /* busy */ - - /* check error */ - if (td->error_any) - return (0); /* done */ - - if (td->qh->fixup_complete != 0) { - /* clear complete flag */ - td->qh->fixup_complete = 0; - - /* flush data */ - usb_pc_cpu_invalidate(td->qh->fixup_pc); - return (0); /* done */ - } - /* verify length */ - if (td->remainder != 8) { - td->error_any = 1; - return (0); /* done */ - } - usbd_copy_out(td->pc, td->offset, td->qh->fixup_buf, 8); - - /* update offset and remainder */ - td->offset += 8; - td->remainder -= 8; - - /* setup data length and offset */ - td->qh->fixup_len = UGETW(td->qh->fixup_buf + 6); - td->qh->fixup_off = 0; - - if (td->qh->fixup_len > (OCTUSB_MAX_FIXUP - 8)) { - td->error_any = 1; - return (0); /* done */ - } - /* do control IN request */ - if (td->qh->fixup_buf[0] & UE_DIR_IN) { - struct octusb_softc *sc; - - /* get softc */ - sc = td->qh->sc; - - /* flush data */ - usb_pc_cpu_flush(td->qh->fixup_pc); - - status = cvmx_usb_submit_control( - &sc->sc_port[td->qh->root_port_index].state, - td->qh->ep_handle, td->qh->fixup_phys, - td->qh->fixup_phys + 8, td->qh->fixup_len, - &octusb_complete_cb, td); - /* check status */ - if (status < 0) { - td->error_any = 1; - return (0); /* done */ - } - td->qh->fixup_handle = status; - td->qh->fixup_pending = 1; - td->qh->fixup_complete = 0; - - return (1); /* busy */ - } - return (0); /* done */ -} - -static uint8_t -octusb_host_control_data_tx(struct octusb_td *td) -{ - uint32_t rem; - - /* allocate endpoint and check pending */ - if (octusb_host_alloc_endpoint(td)) - return (1); /* busy */ - - /* check error */ - if (td->error_any) - return (0); /* done */ - - rem = td->qh->fixup_len - td->qh->fixup_off; - - if (td->remainder > rem) { - td->error_any = 1; - DPRINTFN(1, "Excess setup transmit data\n"); - return (0); /* done */ - } - usbd_copy_out(td->pc, td->offset, td->qh->fixup_buf + - td->qh->fixup_off + 8, td->remainder); - - td->offset += td->remainder; - td->qh->fixup_off += td->remainder; - td->remainder = 0; - - return (0); /* done */ -} - -static uint8_t -octusb_host_control_data_rx(struct octusb_td *td) -{ - uint32_t rem; - - /* allocate endpoint and check pending */ - if (octusb_host_alloc_endpoint(td)) - return (1); /* busy */ - - /* check error */ - if (td->error_any) - return (0); /* done */ - - /* copy data from buffer */ - rem = td->qh->fixup_actlen - td->qh->fixup_off; - - if (rem > td->remainder) - rem = td->remainder; - - usbd_copy_in(td->pc, td->offset, td->qh->fixup_buf + - td->qh->fixup_off + 8, rem); - - td->offset += rem; - td->remainder -= rem; - td->qh->fixup_off += rem; - - return (0); /* done */ -} - -static uint8_t -octusb_host_control_status_tx(struct octusb_td *td) -{ - int status; - - /* allocate endpoint and check pending */ - if (octusb_host_alloc_endpoint(td)) - return (1); /* busy */ - - /* check error */ - if (td->error_any) - return (0); /* done */ - - if (td->qh->fixup_complete != 0) { - /* clear complete flag */ - td->qh->fixup_complete = 0; - /* done */ - return (0); - } - /* do control IN request */ - if (!(td->qh->fixup_buf[0] & UE_DIR_IN)) { - struct octusb_softc *sc; - - /* get softc */ - sc = td->qh->sc; - - /* flush data */ - usb_pc_cpu_flush(td->qh->fixup_pc); - - /* start USB transfer */ - status = cvmx_usb_submit_control( - &sc->sc_port[td->qh->root_port_index].state, - td->qh->ep_handle, td->qh->fixup_phys, - td->qh->fixup_phys + 8, td->qh->fixup_len, - &octusb_complete_cb, td); - - /* check status */ - if (status < 0) { - td->error_any = 1; - return (0); /* done */ - } - td->qh->fixup_handle = status; - td->qh->fixup_pending = 1; - td->qh->fixup_complete = 0; - - return (1); /* busy */ - } - return (0); /* done */ -} - -static uint8_t -octusb_non_control_data_tx(struct octusb_td *td) -{ - struct octusb_softc *sc; - uint32_t rem; - int status; - - /* allocate endpoint and check pending */ - if (octusb_host_alloc_endpoint(td)) - return (1); /* busy */ - - /* check error */ - if (td->error_any) - return (0); /* done */ - - if ((td->qh->fixup_complete != 0) && - ((td->qh->ep_type & UE_XFERTYPE) == UE_ISOCHRONOUS)) { - td->qh->fixup_complete = 0; - return (0); /* done */ - } - /* check complete */ - if (td->remainder == 0) { - if (td->short_pkt) - return (0); /* complete */ - /* else need to send a zero length packet */ - rem = 0; - td->short_pkt = 1; - } else { - /* get maximum length */ - rem = OCTUSB_MAX_FIXUP % td->qh->max_frame_size; - rem = OCTUSB_MAX_FIXUP - rem; - - if (rem == 0) { - /* should not happen */ - DPRINTFN(1, "Fixup buffer is too small\n"); - td->error_any = 1; - return (0); /* done */ - } - /* get minimum length */ - if (rem > td->remainder) { - rem = td->remainder; - if ((rem == 0) || (rem % td->qh->max_frame_size)) - td->short_pkt = 1; - } - /* copy data into fixup buffer */ - usbd_copy_out(td->pc, td->offset, td->qh->fixup_buf, rem); - - /* flush data */ - usb_pc_cpu_flush(td->qh->fixup_pc); - - /* pre-increment TX buffer offset */ - td->offset += rem; - td->remainder -= rem; - } - - /* get softc */ - sc = td->qh->sc; - - switch (td->qh->ep_type & UE_XFERTYPE) { - case UE_ISOCHRONOUS: - td->qh->iso_pkt.offset = 0; - td->qh->iso_pkt.length = rem; - td->qh->iso_pkt.status = 0; - /* start USB transfer */ - status = cvmx_usb_submit_isochronous(&sc->sc_port[td->qh->root_port_index].state, - td->qh->ep_handle, 1, CVMX_USB_ISOCHRONOUS_FLAGS_ALLOW_SHORT | - CVMX_USB_ISOCHRONOUS_FLAGS_ASAP, 1, &td->qh->iso_pkt, - td->qh->fixup_phys, rem, &octusb_complete_cb, td); - break; - case UE_BULK: - /* start USB transfer */ - status = cvmx_usb_submit_bulk(&sc->sc_port[td->qh->root_port_index].state, - td->qh->ep_handle, td->qh->fixup_phys, rem, &octusb_complete_cb, td); - break; - case UE_INTERRUPT: - /* start USB transfer (interrupt or interrupt) */ - status = cvmx_usb_submit_interrupt(&sc->sc_port[td->qh->root_port_index].state, - td->qh->ep_handle, td->qh->fixup_phys, rem, &octusb_complete_cb, td); - break; - default: - status = -1; - break; - } - - /* check status */ - if (status < 0) { - td->error_any = 1; - return (0); /* done */ - } - td->qh->fixup_handle = status; - td->qh->fixup_len = rem; - td->qh->fixup_pending = 1; - td->qh->fixup_complete = 0; - - return (1); /* busy */ -} - -static uint8_t -octusb_non_control_data_rx(struct octusb_td *td) -{ - struct octusb_softc *sc; - uint32_t rem; - int status; - uint8_t got_short; - - /* allocate endpoint and check pending */ - if (octusb_host_alloc_endpoint(td)) - return (1); /* busy */ - - /* check error */ - if (td->error_any) - return (0); /* done */ - - got_short = 0; - - if (td->qh->fixup_complete != 0) { - /* invalidate data */ - usb_pc_cpu_invalidate(td->qh->fixup_pc); - - rem = td->qh->fixup_actlen; - - /* verify transfer length */ - if (rem != td->qh->fixup_len) { - if (rem < td->qh->fixup_len) { - /* we have a short packet */ - td->short_pkt = 1; - got_short = 1; - } else { - /* invalid USB packet */ - td->error_any = 1; - return (0); /* we are complete */ - } - } - /* copy data into fixup buffer */ - usbd_copy_in(td->pc, td->offset, td->qh->fixup_buf, rem); - - /* post-increment RX buffer offset */ - td->offset += rem; - td->remainder -= rem; - - td->qh->fixup_complete = 0; - - if ((td->qh->ep_type & UE_XFERTYPE) == UE_ISOCHRONOUS) - return (0); /* done */ - } - /* check if we are complete */ - if ((td->remainder == 0) || got_short) { - if (td->short_pkt) { - /* we are complete */ - return (0); - } - /* else need to receive a zero length packet */ - rem = 0; - td->short_pkt = 1; - } else { - /* get maximum length */ - rem = OCTUSB_MAX_FIXUP % td->qh->max_frame_size; - rem = OCTUSB_MAX_FIXUP - rem; - - if (rem == 0) { - /* should not happen */ - DPRINTFN(1, "Fixup buffer is too small\n"); - td->error_any = 1; - return (0); /* done */ - } - /* get minimum length */ - if (rem > td->remainder) - rem = td->remainder; - } - - /* invalidate data */ - usb_pc_cpu_invalidate(td->qh->fixup_pc); - - /* get softc */ - sc = td->qh->sc; - - switch (td->qh->ep_type & UE_XFERTYPE) { - case UE_ISOCHRONOUS: - td->qh->iso_pkt.offset = 0; - td->qh->iso_pkt.length = rem; - td->qh->iso_pkt.status = 0; - /* start USB transfer */ - status = cvmx_usb_submit_isochronous(&sc->sc_port[td->qh->root_port_index].state, - td->qh->ep_handle, 1, CVMX_USB_ISOCHRONOUS_FLAGS_ALLOW_SHORT | - CVMX_USB_ISOCHRONOUS_FLAGS_ASAP, 1, &td->qh->iso_pkt, - td->qh->fixup_phys, rem, &octusb_complete_cb, td); - break; - case UE_BULK: - /* start USB transfer */ - status = cvmx_usb_submit_bulk(&sc->sc_port[td->qh->root_port_index].state, - td->qh->ep_handle, td->qh->fixup_phys, rem, &octusb_complete_cb, td); - break; - case UE_INTERRUPT: - /* start USB transfer */ - status = cvmx_usb_submit_interrupt(&sc->sc_port[td->qh->root_port_index].state, - td->qh->ep_handle, td->qh->fixup_phys, rem, &octusb_complete_cb, td); - break; - default: - status = -1; - break; - } - - /* check status */ - if (status < 0) { - td->error_any = 1; - return (0); /* done */ - } - td->qh->fixup_handle = status; - td->qh->fixup_len = rem; - td->qh->fixup_pending = 1; - td->qh->fixup_complete = 0; - - return (1); /* busy */ -} - -static uint8_t -octusb_xfer_do_fifo(struct usb_xfer *xfer) -{ - struct octusb_td *td; - - DPRINTFN(8, "\n"); - - td = xfer->td_transfer_cache; - - while (1) { - if ((td->func) (td)) { - /* operation in progress */ - break; - } - if (((void *)td) == xfer->td_transfer_last) { - goto done; - } - if (td->error_any) { - goto done; - } else if (td->remainder > 0) { - /* - * We had a short transfer. If there is no - * alternate next, stop processing ! - */ - if (td->alt_next == 0) - goto done; - } - /* - * Fetch the next transfer descriptor and transfer - * some flags to the next transfer descriptor - */ - td = td->obj_next; - xfer->td_transfer_cache = td; - } - return (1); /* not complete */ - -done: - /* compute all actual lengths */ - - octusb_standard_done(xfer); - - return (0); /* complete */ -} - -static usb_error_t -octusb_standard_done_sub(struct usb_xfer *xfer) -{ - struct octusb_td *td; - uint32_t len; - usb_error_t error; - - DPRINTFN(8, "\n"); - - td = xfer->td_transfer_cache; - - do { - len = td->remainder; - - if (xfer->aframes != xfer->nframes) { - /* - * Verify the length and subtract - * the remainder from "frlengths[]": - */ - if (len > xfer->frlengths[xfer->aframes]) { - td->error_any = 1; - } else { - xfer->frlengths[xfer->aframes] -= len; - } - } - /* Check for transfer error */ - if (td->error_any) { - /* the transfer is finished */ - error = td->error_stall ? USB_ERR_STALLED : USB_ERR_IOERROR; - td = NULL; - break; - } - /* Check for short transfer */ - if (len > 0) { - if (xfer->flags_int.short_frames_ok) { - /* follow alt next */ - if (td->alt_next) { - td = td->obj_next; - } else { - td = NULL; - } - } else { - /* the transfer is finished */ - td = NULL; - } - error = 0; - break; - } - td = td->obj_next; - - /* this USB frame is complete */ - error = 0; - break; - - } while (0); - - /* update transfer cache */ - - xfer->td_transfer_cache = td; - - return (error); -} - -static void -octusb_standard_done(struct usb_xfer *xfer) -{ - struct octusb_softc *sc; - struct octusb_qh *qh; - usb_error_t error = 0; - - DPRINTFN(12, "xfer=%p endpoint=%p transfer done\n", - xfer, xfer->endpoint); - - /* reset scanner */ - - xfer->td_transfer_cache = xfer->td_transfer_first; - - if (xfer->flags_int.control_xfr) { - if (xfer->flags_int.control_hdr) - error = octusb_standard_done_sub(xfer); - - xfer->aframes = 1; - - if (xfer->td_transfer_cache == NULL) - goto done; - } - while (xfer->aframes != xfer->nframes) { - error = octusb_standard_done_sub(xfer); - - xfer->aframes++; - - if (xfer->td_transfer_cache == NULL) - goto done; - } - - if (xfer->flags_int.control_xfr && - !xfer->flags_int.control_act) - error = octusb_standard_done_sub(xfer); - -done: - /* update data toggle */ - - qh = xfer->qh_start[0]; - sc = qh->sc; - - xfer->endpoint->toggle_next = - cvmx_usb_get_toggle( - &sc->sc_port[qh->root_port_index].state, - qh->ep_handle) ? 1 : 0; - - octusb_device_done(xfer, error); -} - -static void -octusb_interrupt_poll(struct octusb_softc *sc) -{ - struct usb_xfer *xfer; - uint8_t x; - - /* poll all ports */ - for (x = 0; x != sc->sc_noport; x++) - cvmx_usb_poll(&sc->sc_port[x].state); - -repeat: - TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) { - if (!octusb_xfer_do_fifo(xfer)) { - /* queue has been modified */ - goto repeat; - } - } -} - -static void -octusb_start_standard_chain(struct usb_xfer *xfer) -{ - DPRINTFN(8, "\n"); - - /* poll one time */ - if (octusb_xfer_do_fifo(xfer)) { - /* put transfer on interrupt queue */ - usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer); - - /* start timeout, if any */ - if (xfer->timeout != 0) { - usbd_transfer_timeout_ms(xfer, - &octusb_timeout, xfer->timeout); - } - } -} - -void -octusb_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb) -{ - -} - -usb_error_t -octusb_init(struct octusb_softc *sc) -{ - cvmx_usb_initialize_flags_t flags; - int status; - uint8_t x; - - /* flush all cache into memory */ - - usb_bus_mem_flush_all(&sc->sc_bus, &octusb_iterate_hw_softc); - - /* set up the bus struct */ - sc->sc_bus.methods = &octusb_bus_methods; - - /* get number of ports */ - sc->sc_noport = cvmx_usb_get_num_ports(); - - /* check number of ports */ - if (sc->sc_noport > OCTUSB_MAX_PORTS) - sc->sc_noport = OCTUSB_MAX_PORTS; - - /* set USB revision */ - sc->sc_bus.usbrev = USB_REV_2_0; - - /* flags for port initialization */ - flags = CVMX_USB_INITIALIZE_FLAGS_CLOCK_AUTO; -#ifdef USB_DEBUG - if (octusbdebug > 100) - flags |= CVMX_USB_INITIALIZE_FLAGS_DEBUG_ALL; -#endif - - USB_BUS_LOCK(&sc->sc_bus); - - /* setup all ports */ - for (x = 0; x != sc->sc_noport; x++) { - status = cvmx_usb_initialize(&sc->sc_port[x].state, x, flags); - if (status < 0) - sc->sc_port[x].disabled = 1; - } - - USB_BUS_UNLOCK(&sc->sc_bus); - - /* catch lost interrupts */ - octusb_do_poll(&sc->sc_bus); - - return (0); -} - -usb_error_t -octusb_uninit(struct octusb_softc *sc) -{ - uint8_t x; - - USB_BUS_LOCK(&sc->sc_bus); - - for (x = 0; x != sc->sc_noport; x++) { - if (sc->sc_port[x].disabled == 0) - cvmx_usb_shutdown(&sc->sc_port[x].state); - } - USB_BUS_UNLOCK(&sc->sc_bus); - - return (0); - -} - -static void -octusb_suspend(struct octusb_softc *sc) -{ - /* TODO */ -} - -static void -octusb_resume(struct octusb_softc *sc) -{ - /* TODO */ -} - -/*------------------------------------------------------------------------* - * octusb_interrupt - OCTUSB interrupt handler - *------------------------------------------------------------------------*/ -void -octusb_interrupt(struct octusb_softc *sc) -{ - USB_BUS_LOCK(&sc->sc_bus); - - DPRINTFN(16, "real interrupt\n"); - - /* poll all the USB transfers */ - octusb_interrupt_poll(sc); - - USB_BUS_UNLOCK(&sc->sc_bus); -} - -/*------------------------------------------------------------------------* - * octusb_timeout - OCTUSB transfer timeout handler - *------------------------------------------------------------------------*/ -static void -octusb_timeout(void *arg) -{ - struct usb_xfer *xfer = arg; - - DPRINTF("xfer=%p\n", xfer); - - USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED); - - /* transfer is transferred */ - octusb_device_done(xfer, USB_ERR_TIMEOUT); -} - -/*------------------------------------------------------------------------* - * octusb_do_poll - OCTUSB poll transfers - *------------------------------------------------------------------------*/ -static void -octusb_do_poll(struct usb_bus *bus) -{ - struct octusb_softc *sc = OCTUSB_BUS2SC(bus); - - USB_BUS_LOCK(&sc->sc_bus); - octusb_interrupt_poll(sc); - USB_BUS_UNLOCK(&sc->sc_bus); -} - -static void -octusb_setup_standard_chain_sub(struct octusb_std_temp *temp) -{ - struct octusb_td *td; - - /* get current Transfer Descriptor */ - td = temp->td_next; - temp->td = td; - - /* prepare for next TD */ - temp->td_next = td->obj_next; - - /* fill out the Transfer Descriptor */ - td->func = temp->func; - td->pc = temp->pc; - td->offset = temp->offset; - td->remainder = temp->len; - td->error_any = 0; - td->error_stall = 0; - td->short_pkt = temp->short_pkt; - td->alt_next = temp->setup_alt_next; -} - -static void -octusb_setup_standard_chain(struct usb_xfer *xfer) -{ - struct octusb_std_temp temp; - struct octusb_td *td; - uint32_t x; - - DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n", - xfer->address, UE_GET_ADDR(xfer->endpointno), - xfer->sumlen, usbd_get_speed(xfer->xroot->udev)); - - /* setup starting point */ - td = xfer->td_start[0]; - xfer->td_transfer_first = td; - xfer->td_transfer_cache = td; - - temp.td = NULL; - temp.td_next = td; - temp.setup_alt_next = xfer->flags_int.short_frames_ok; - temp.offset = 0; - - /* check if we should prepend a setup message */ - - if (xfer->flags_int.control_xfr) { - if (xfer->flags_int.control_hdr) { - temp.func = &octusb_host_control_header_tx; - temp.len = xfer->frlengths[0]; - temp.pc = xfer->frbuffers + 0; - temp.short_pkt = temp.len ? 1 : 0; - - /* check for last frame */ - if (xfer->nframes == 1) { - /* - * no STATUS stage yet, SETUP is - * last - */ - if (xfer->flags_int.control_act) - temp.setup_alt_next = 0; - } - octusb_setup_standard_chain_sub(&temp); - } - x = 1; - } else { - x = 0; - } - - if (x != xfer->nframes) { - if (xfer->endpointno & UE_DIR_IN) { - if (xfer->flags_int.control_xfr) - temp.func = &octusb_host_control_data_rx; - else - temp.func = &octusb_non_control_data_rx; - } else { - if (xfer->flags_int.control_xfr) - temp.func = &octusb_host_control_data_tx; - else - temp.func = &octusb_non_control_data_tx; - } - - /* setup "pc" pointer */ - temp.pc = xfer->frbuffers + x; - } - while (x != xfer->nframes) { - /* DATA0 or DATA1 message */ - - temp.len = xfer->frlengths[x]; - - x++; - - if (x == xfer->nframes) { - if (xfer->flags_int.control_xfr) { - /* no STATUS stage yet, DATA is last */ - if (xfer->flags_int.control_act) - temp.setup_alt_next = 0; - } else { - temp.setup_alt_next = 0; - } - } - if (temp.len == 0) { - /* make sure that we send an USB packet */ - - temp.short_pkt = 0; - - } else { - /* regular data transfer */ - - temp.short_pkt = (xfer->flags.force_short_xfer) ? 0 : 1; - } - - octusb_setup_standard_chain_sub(&temp); - - if (xfer->flags_int.isochronous_xfr) { - /* get next data offset */ - temp.offset += temp.len; - } else { - /* get next Page Cache pointer */ - temp.pc = xfer->frbuffers + x; - } - } - - /* check if we should append a status stage */ - - if (xfer->flags_int.control_xfr && - !xfer->flags_int.control_act) { - temp.func = &octusb_host_control_status_tx; - temp.len = 0; - temp.pc = NULL; - temp.short_pkt = 0; - temp.setup_alt_next = 0; - - octusb_setup_standard_chain_sub(&temp); - } - /* must have at least one frame! */ - td = temp.td; - xfer->td_transfer_last = td; - - /* properly setup QH */ - - td->qh->ep_allocated = 0; - td->qh->ep_toggle_next = xfer->endpoint->toggle_next ? 1 : 0; -} - -/*------------------------------------------------------------------------* - * octusb_device_done - OCTUSB transfers done code - * - * NOTE: This function can be called more than one time in a row. - *------------------------------------------------------------------------*/ -static void -octusb_device_done(struct usb_xfer *xfer, usb_error_t error) -{ - USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED); - - DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n", - xfer, xfer->endpoint, error); - - /* - * 1) Free any endpoints. - * 2) Control transfers can be split and we should not re-open - * the data pipe between transactions unless there is an error. - */ - if ((xfer->flags_int.control_act == 0) || (error != 0)) { - struct octusb_td *td; - - td = xfer->td_start[0]; - - octusb_host_free_endpoint(td); - } - /* dequeue transfer and start next transfer */ - usbd_transfer_done(xfer, error); -} - -/*------------------------------------------------------------------------* - * octusb bulk support - *------------------------------------------------------------------------*/ -static void -octusb_device_bulk_open(struct usb_xfer *xfer) -{ - return; -} - -static void -octusb_device_bulk_close(struct usb_xfer *xfer) -{ - octusb_device_done(xfer, USB_ERR_CANCELLED); -} - -static void -octusb_device_bulk_enter(struct usb_xfer *xfer) -{ - return; -} - -static void -octusb_device_bulk_start(struct usb_xfer *xfer) -{ - /* setup TDs */ - octusb_setup_standard_chain(xfer); - octusb_start_standard_chain(xfer); -} - -struct usb_pipe_methods octusb_device_bulk_methods = -{ - .open = octusb_device_bulk_open, - .close = octusb_device_bulk_close, - .enter = octusb_device_bulk_enter, - .start = octusb_device_bulk_start, -}; - -/*------------------------------------------------------------------------* - * octusb control support - *------------------------------------------------------------------------*/ -static void -octusb_device_ctrl_open(struct usb_xfer *xfer) -{ - return; -} - -static void -octusb_device_ctrl_close(struct usb_xfer *xfer) -{ - octusb_device_done(xfer, USB_ERR_CANCELLED); -} - -static void -octusb_device_ctrl_enter(struct usb_xfer *xfer) -{ - return; -} - -static void -octusb_device_ctrl_start(struct usb_xfer *xfer) -{ - /* setup TDs */ - octusb_setup_standard_chain(xfer); - octusb_start_standard_chain(xfer); -} - -struct usb_pipe_methods octusb_device_ctrl_methods = -{ - .open = octusb_device_ctrl_open, - .close = octusb_device_ctrl_close, - .enter = octusb_device_ctrl_enter, - .start = octusb_device_ctrl_start, -}; - -/*------------------------------------------------------------------------* - * octusb interrupt support - *------------------------------------------------------------------------*/ -static void -octusb_device_intr_open(struct usb_xfer *xfer) -{ - return; -} - -static void -octusb_device_intr_close(struct usb_xfer *xfer) -{ - octusb_device_done(xfer, USB_ERR_CANCELLED); -} - -static void -octusb_device_intr_enter(struct usb_xfer *xfer) -{ - return; -} - -static void -octusb_device_intr_start(struct usb_xfer *xfer) -{ - /* setup TDs */ - octusb_setup_standard_chain(xfer); - octusb_start_standard_chain(xfer); -} - -struct usb_pipe_methods octusb_device_intr_methods = -{ - .open = octusb_device_intr_open, - .close = octusb_device_intr_close, - .enter = octusb_device_intr_enter, - .start = octusb_device_intr_start, -}; - -/*------------------------------------------------------------------------* - * octusb isochronous support - *------------------------------------------------------------------------*/ -static void -octusb_device_isoc_open(struct usb_xfer *xfer) -{ - return; -} - -static void -octusb_device_isoc_close(struct usb_xfer *xfer) -{ - octusb_device_done(xfer, USB_ERR_CANCELLED); -} - -static void -octusb_device_isoc_enter(struct usb_xfer *xfer) -{ - struct octusb_softc *sc = OCTUSB_BUS2SC(xfer->xroot->bus); - uint32_t temp; - uint32_t frame_count; - uint32_t fs_frames; - - DPRINTFN(5, "xfer=%p next=%d nframes=%d\n", - xfer, xfer->endpoint->isoc_next, xfer->nframes); - - /* get the current frame index */ - - frame_count = cvmx_usb_get_frame_number( - &sc->sc_port[xfer->xroot->udev->port_index].state); - - /* - * check if the frame index is within the window where the frames - * will be inserted - */ - temp = (frame_count - xfer->endpoint->isoc_next) & 0x7FF; - - if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_HIGH) { - fs_frames = (xfer->nframes + 7) / 8; - } else { - fs_frames = xfer->nframes; - } - - if ((xfer->endpoint->is_synced == 0) || (temp < fs_frames)) { - /* - * If there is data underflow or the pipe queue is - * empty we schedule the transfer a few frames ahead - * of the current frame position. Else two isochronous - * transfers might overlap. - */ - xfer->endpoint->isoc_next = (frame_count + 3) & 0x7FF; - xfer->endpoint->is_synced = 1; - DPRINTFN(2, "start next=%d\n", xfer->endpoint->isoc_next); - } - /* - * compute how many milliseconds the insertion is ahead of the - * current frame position: - */ - temp = (xfer->endpoint->isoc_next - frame_count) & 0x7FF; - - /* - * pre-compute when the isochronous transfer will be finished: - */ - xfer->isoc_time_complete = - usb_isoc_time_expand(&sc->sc_bus, frame_count) + temp + - fs_frames; - - /* compute frame number for next insertion */ - xfer->endpoint->isoc_next += fs_frames; -} - -static void -octusb_device_isoc_start(struct usb_xfer *xfer) -{ - /* setup TDs */ - octusb_setup_standard_chain(xfer); - octusb_start_standard_chain(xfer); -} - -struct usb_pipe_methods octusb_device_isoc_methods = -{ - .open = octusb_device_isoc_open, - .close = octusb_device_isoc_close, - .enter = octusb_device_isoc_enter, - .start = octusb_device_isoc_start, -}; - -/*------------------------------------------------------------------------* - * OCTUSB root HUB support - *------------------------------------------------------------------------* - * Simulate a hardware HUB by handling all the necessary requests. - *------------------------------------------------------------------------*/ -static const -struct usb_device_descriptor octusb_devd = { - .bLength = sizeof(octusb_devd), - .bDescriptorType = UDESC_DEVICE, - .bcdUSB = {0x00, 0x02}, - .bDeviceClass = UDCLASS_HUB, - .bDeviceSubClass = UDSUBCLASS_HUB, - .bDeviceProtocol = UDPROTO_FSHUB, - .bMaxPacketSize = 64, - .idVendor = {0}, - .idProduct = {0}, - .bcdDevice = {0x00, 0x01}, - .iManufacturer = 1, - .iProduct = 2, - .iSerialNumber = 0, - .bNumConfigurations = 1, -}; - -static const -struct usb_device_qualifier octusb_odevd = { - .bLength = sizeof(octusb_odevd), - .bDescriptorType = UDESC_DEVICE_QUALIFIER, - .bcdUSB = {0x00, 0x02}, - .bDeviceClass = UDCLASS_HUB, - .bDeviceSubClass = UDSUBCLASS_HUB, - .bDeviceProtocol = UDPROTO_FSHUB, - .bMaxPacketSize0 = 0, - .bNumConfigurations = 0, - .bReserved = 0, -}; - -static const -struct octusb_config_desc octusb_confd = { - .confd = { - .bLength = sizeof(struct usb_config_descriptor), - .bDescriptorType = UDESC_CONFIG, - .wTotalLength[0] = sizeof(octusb_confd), - .bNumInterface = 1, - .bConfigurationValue = 1, - .iConfiguration = 0, - .bmAttributes = UC_SELF_POWERED, - .bMaxPower = 0 /* max power */ - }, - .ifcd = { - .bLength = sizeof(struct usb_interface_descriptor), - .bDescriptorType = UDESC_INTERFACE, - .bNumEndpoints = 1, - .bInterfaceClass = UICLASS_HUB, - .bInterfaceSubClass = UISUBCLASS_HUB, - .bInterfaceProtocol = UIPROTO_FSHUB, - }, - .endpd = { - .bLength = sizeof(struct usb_endpoint_descriptor), - .bDescriptorType = UDESC_ENDPOINT, - .bEndpointAddress = UE_DIR_IN | OCTUSB_INTR_ENDPT, - .bmAttributes = UE_INTERRUPT, - .wMaxPacketSize[0] = 8, /* max packet (63 ports) */ - .bInterval = 255, - }, -}; - -static const -struct usb_hub_descriptor_min octusb_hubd = -{ - .bDescLength = sizeof(octusb_hubd), - .bDescriptorType = UDESC_HUB, - .bNbrPorts = 2, - .wHubCharacteristics = {UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0}, - .bPwrOn2PwrGood = 50, - .bHubContrCurrent = 0, - .DeviceRemovable = {0x00}, /* all ports are removable */ -}; - -static usb_error_t -octusb_roothub_exec(struct usb_device *udev, - struct usb_device_request *req, const void **pptr, uint16_t *plength) -{ - struct octusb_softc *sc = OCTUSB_BUS2SC(udev->bus); - const void *ptr; - const char *str_ptr; - uint16_t value; - uint16_t index; - uint16_t status; - uint16_t change; - uint16_t len; - usb_error_t err; - cvmx_usb_port_status_t usb_port_status; - - USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED); - - /* XXX disable power save mode, hence it is not supported */ - udev->power_mode = USB_POWER_MODE_ON; - - /* buffer reset */ - ptr = (const void *)&sc->sc_hub_desc.temp; - len = 0; - err = 0; - - value = UGETW(req->wValue); - index = UGETW(req->wIndex); - - DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x " - "wValue=0x%04x wIndex=0x%04x\n", - req->bmRequestType, req->bRequest, - UGETW(req->wLength), value, index); - -#define C(x,y) ((x) | ((y) << 8)) - switch (C(req->bRequest, req->bmRequestType)) { - case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): - case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): - case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): - break; - case C(UR_GET_CONFIG, UT_READ_DEVICE): - len = 1; - sc->sc_hub_desc.temp[0] = sc->sc_conf; - break; - case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): - switch (value >> 8) { - case UDESC_DEVICE: - if ((value & 0xff) != 0) { - err = USB_ERR_IOERROR; - goto done; - } - len = sizeof(octusb_devd); - - ptr = (const void *)&octusb_devd; - break; - - case UDESC_DEVICE_QUALIFIER: - if ((value & 0xff) != 0) { - err = USB_ERR_IOERROR; - goto done; - } - len = sizeof(octusb_odevd); - ptr = (const void *)&octusb_odevd; - break; - - case UDESC_CONFIG: - if ((value & 0xff) != 0) { - err = USB_ERR_IOERROR; - goto done; - } - len = sizeof(octusb_confd); - ptr = (const void *)&octusb_confd; - break; - - case UDESC_STRING: - switch (value & 0xff) { - case 0: /* Language table */ - str_ptr = "\001"; - break; - - case 1: /* Vendor */ - str_ptr = "Cavium Networks"; - break; - - case 2: /* Product */ - str_ptr = "OCTUSB Root HUB"; - break; - - default: - str_ptr = ""; - break; - } - - len = usb_make_str_desc(sc->sc_hub_desc.temp, - sizeof(sc->sc_hub_desc.temp), str_ptr); - break; - - default: - err = USB_ERR_IOERROR; - goto done; - } - break; - case C(UR_GET_INTERFACE, UT_READ_INTERFACE): - len = 1; - sc->sc_hub_desc.temp[0] = 0; - break; - case C(UR_GET_STATUS, UT_READ_DEVICE): - len = 2; - USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED); - break; - case C(UR_GET_STATUS, UT_READ_INTERFACE): - case C(UR_GET_STATUS, UT_READ_ENDPOINT): - len = 2; - USETW(sc->sc_hub_desc.stat.wStatus, 0); - break; - case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): - if (value >= OCTUSB_MAX_DEVICES) { - err = USB_ERR_IOERROR; - goto done; - } - sc->sc_addr = value; - break; - case C(UR_SET_CONFIG, UT_WRITE_DEVICE): - if ((value != 0) && (value != 1)) { - err = USB_ERR_IOERROR; - goto done; - } - sc->sc_conf = value; - break; - case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): - break; - case C(UR_SET_FEATURE, UT_WRITE_DEVICE): - case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): - case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): - err = USB_ERR_IOERROR; - goto done; - case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): - break; - case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): - break; - /* Hub requests */ - case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): - break; - case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): - DPRINTFN(4, "UR_CLEAR_PORT_FEATURE " - "port=%d feature=%d\n", - index, value); - if ((index < 1) || - (index > sc->sc_noport) || - sc->sc_port[index - 1].disabled) { - err = USB_ERR_IOERROR; - goto done; - } - index--; - - switch (value) { - case UHF_PORT_ENABLE: - cvmx_usb_disable(&sc->sc_port[index].state); - break; - case UHF_PORT_SUSPEND: - case UHF_PORT_RESET: - break; - case UHF_C_PORT_CONNECTION: - cvmx_usb_set_status(&sc->sc_port[index].state, - cvmx_usb_get_status(&sc->sc_port[index].state)); - break; - case UHF_C_PORT_ENABLE: - cvmx_usb_set_status(&sc->sc_port[index].state, - cvmx_usb_get_status(&sc->sc_port[index].state)); - break; - case UHF_C_PORT_OVER_CURRENT: - cvmx_usb_set_status(&sc->sc_port[index].state, - cvmx_usb_get_status(&sc->sc_port[index].state)); - break; - case UHF_C_PORT_RESET: - sc->sc_isreset = 0; - goto done; - case UHF_C_PORT_SUSPEND: - break; - case UHF_PORT_CONNECTION: - case UHF_PORT_OVER_CURRENT: - case UHF_PORT_POWER: - case UHF_PORT_LOW_SPEED: - default: - err = USB_ERR_IOERROR; - goto done; - } - break; - case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): - if ((value & 0xff) != 0) { - err = USB_ERR_IOERROR; - goto done; - } - sc->sc_hubd = octusb_hubd; - sc->sc_hubd.bNbrPorts = sc->sc_noport; - len = sizeof(sc->sc_hubd); - ptr = (const void *)&sc->sc_hubd; - break; - case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): - len = 16; - memset(sc->sc_hub_desc.temp, 0, 16); - break; - case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): - if ((index < 1) || - (index > sc->sc_noport) || - sc->sc_port[index - 1].disabled) { - err = USB_ERR_IOERROR; - goto done; - } - index--; - - usb_port_status = cvmx_usb_get_status(&sc->sc_port[index].state); - - status = change = 0; - if (usb_port_status.connected) - status |= UPS_CURRENT_CONNECT_STATUS; - if (usb_port_status.port_enabled) - status |= UPS_PORT_ENABLED; - if (usb_port_status.port_over_current) - status |= UPS_OVERCURRENT_INDICATOR; - if (usb_port_status.port_powered) - status |= UPS_PORT_POWER; - - switch (usb_port_status.port_speed) { - case CVMX_USB_SPEED_HIGH: - status |= UPS_HIGH_SPEED; - break; - case CVMX_USB_SPEED_FULL: - break; - default: - status |= UPS_LOW_SPEED; - break; - } - - if (usb_port_status.connect_change) - change |= UPS_C_CONNECT_STATUS; - if (sc->sc_isreset) - change |= UPS_C_PORT_RESET; - - USETW(sc->sc_hub_desc.ps.wPortStatus, status); - USETW(sc->sc_hub_desc.ps.wPortChange, change); - - len = sizeof(sc->sc_hub_desc.ps); - break; - case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): - err = USB_ERR_IOERROR; - goto done; - case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): - break; - case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): - if ((index < 1) || - (index > sc->sc_noport) || - sc->sc_port[index - 1].disabled) { - err = USB_ERR_IOERROR; - goto done; - } - index--; - - switch (value) { - case UHF_PORT_ENABLE: - break; - case UHF_PORT_RESET: - cvmx_usb_disable(&sc->sc_port[index].state); - if (cvmx_usb_enable(&sc->sc_port[index].state)) { - err = USB_ERR_IOERROR; - goto done; - } - sc->sc_isreset = 1; - goto done; - case UHF_PORT_POWER: - /* pretend we turned on power */ - goto done; - case UHF_PORT_SUSPEND: - case UHF_C_PORT_CONNECTION: - case UHF_C_PORT_ENABLE: - case UHF_C_PORT_OVER_CURRENT: - case UHF_PORT_CONNECTION: - case UHF_PORT_OVER_CURRENT: - case UHF_PORT_LOW_SPEED: - case UHF_C_PORT_SUSPEND: - case UHF_C_PORT_RESET: - default: - err = USB_ERR_IOERROR; - goto done; - } - break; - default: - err = USB_ERR_IOERROR; - goto done; - } -done: - *plength = len; - *pptr = ptr; - return (err); -} - -static void -octusb_xfer_setup(struct usb_setup_params *parm) -{ - struct usb_page_search page_info; - struct usb_page_cache *pc; - struct octusb_softc *sc; - struct octusb_qh *qh; - struct usb_xfer *xfer; - struct usb_device *hub; - void *last_obj; - uint32_t n; - uint32_t ntd; - - sc = OCTUSB_BUS2SC(parm->udev->bus); - xfer = parm->curr_xfer; - qh = NULL; - - /* - * NOTE: This driver does not use any of the parameters that - * are computed from the following values. Just set some - * reasonable dummies: - */ - - parm->hc_max_packet_size = 0x400; - parm->hc_max_packet_count = 3; - parm->hc_max_frame_size = 0xC00; - - usbd_transfer_setup_sub(parm); - - if (parm->err) - return; - - /* Allocate a queue head */ - - if (usbd_transfer_setup_sub_malloc( - parm, &pc, sizeof(struct octusb_qh), - USB_HOST_ALIGN, 1)) { - parm->err = USB_ERR_NOMEM; - return; - } - if (parm->buf) { - usbd_get_page(pc, 0, &page_info); - - qh = page_info.buffer; - - /* fill out QH */ - - qh->sc = OCTUSB_BUS2SC(xfer->xroot->bus); - qh->max_frame_size = xfer->max_frame_size; - qh->max_packet_size = xfer->max_packet_size; - qh->ep_num = xfer->endpointno; - qh->ep_type = xfer->endpoint->edesc->bmAttributes; - qh->dev_addr = xfer->address; - qh->dev_speed = usbd_get_speed(xfer->xroot->udev); - qh->root_port_index = xfer->xroot->udev->port_index; - /* We need Octeon USB HUB's port index, not the local port */ - hub = xfer->xroot->udev->parent_hub; - while(hub && hub->parent_hub) { - qh->root_port_index = hub->port_index; - hub = hub->parent_hub; - } - - switch (xfer->endpoint->edesc->bmAttributes & UE_XFERTYPE) { - case UE_INTERRUPT: - if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_HIGH) - qh->ep_interval = xfer->interval * 8; - else - qh->ep_interval = xfer->interval * 1; - break; - case UE_ISOCHRONOUS: - qh->ep_interval = 1 << xfer->fps_shift; - break; - default: - qh->ep_interval = 0; - break; - } - - qh->ep_mult = xfer->max_packet_count & 3; - qh->hs_hub_addr = xfer->xroot->udev->hs_hub_addr; - qh->hs_hub_port = xfer->xroot->udev->hs_port_no; - } - xfer->qh_start[0] = qh; - - /* Allocate a fixup buffer */ - - if (usbd_transfer_setup_sub_malloc( - parm, &pc, OCTUSB_MAX_FIXUP, - OCTUSB_MAX_FIXUP, 1)) { - parm->err = USB_ERR_NOMEM; - return; - } - if (parm->buf) { - usbd_get_page(pc, 0, &page_info); - - qh->fixup_phys = page_info.physaddr; - qh->fixup_pc = pc; - qh->fixup_buf = page_info.buffer; - } - /* Allocate transfer descriptors */ - - last_obj = NULL; - - ntd = xfer->nframes + 1 /* STATUS */ + 1 /* SYNC */ ; - - if (usbd_transfer_setup_sub_malloc( - parm, &pc, sizeof(struct octusb_td), - USB_HOST_ALIGN, ntd)) { - parm->err = USB_ERR_NOMEM; - return; - } - if (parm->buf) { - for (n = 0; n != ntd; n++) { - struct octusb_td *td; - - usbd_get_page(pc + n, 0, &page_info); - - td = page_info.buffer; - - td->qh = qh; - td->obj_next = last_obj; - - last_obj = td; - } - } - xfer->td_start[0] = last_obj; -} - -static void -octusb_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc, - struct usb_endpoint *ep) -{ - struct octusb_softc *sc = OCTUSB_BUS2SC(udev->bus); - - DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n", - ep, udev->address, edesc->bEndpointAddress, - udev->flags.usb_mode, sc->sc_addr); - - if (udev->device_index != sc->sc_addr) { - switch (edesc->bmAttributes & UE_XFERTYPE) { - case UE_CONTROL: - ep->methods = &octusb_device_ctrl_methods; - break; - case UE_INTERRUPT: - ep->methods = &octusb_device_intr_methods; - break; - case UE_ISOCHRONOUS: - if (udev->speed != USB_SPEED_LOW) - ep->methods = &octusb_device_isoc_methods; - break; - case UE_BULK: - ep->methods = &octusb_device_bulk_methods; - break; - default: - /* do nothing */ - break; - } - } -} - -static void -octusb_xfer_unsetup(struct usb_xfer *xfer) -{ - DPRINTF("Nothing to do.\n"); -} - -static void -octusb_get_dma_delay(struct usb_device *udev, uint32_t *pus) -{ - /* DMA delay - wait until any use of memory is finished */ - *pus = (2125); /* microseconds */ -} - -static void -octusb_device_resume(struct usb_device *udev) -{ - DPRINTF("Nothing to do.\n"); -} - -static void -octusb_device_suspend(struct usb_device *udev) -{ - DPRINTF("Nothing to do.\n"); -} - -static void -octusb_set_hw_power(struct usb_bus *bus) -{ - DPRINTF("Nothing to do.\n"); -} - -static void -octusb_set_hw_power_sleep(struct usb_bus *bus, uint32_t state) -{ - struct octusb_softc *sc = OCTUSB_BUS2SC(bus); - - switch (state) { - case USB_HW_POWER_SUSPEND: - octusb_suspend(sc); - break; - case USB_HW_POWER_SHUTDOWN: - octusb_uninit(sc); - break; - case USB_HW_POWER_RESUME: - octusb_resume(sc); - break; - default: - break; - } -} - -struct usb_bus_methods octusb_bus_methods = { - .endpoint_init = octusb_ep_init, - .xfer_setup = octusb_xfer_setup, - .xfer_unsetup = octusb_xfer_unsetup, - .get_dma_delay = octusb_get_dma_delay, - .device_resume = octusb_device_resume, - .device_suspend = octusb_device_suspend, - .set_hw_power = octusb_set_hw_power, - .set_hw_power_sleep = octusb_set_hw_power_sleep, - .roothub_exec = octusb_roothub_exec, - .xfer_poll = octusb_do_poll, -}; diff --git a/sys/mips/cavium/usb/octusb.h b/sys/mips/cavium/usb/octusb.h deleted file mode 100644 index 208fa7f64cf..00000000000 --- a/sys/mips/cavium/usb/octusb.h +++ /dev/null @@ -1,137 +0,0 @@ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Hans Petter Selasky. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _OCTUSB_H_ -#define _OCTUSB_H_ - -#define OCTUSB_MAX_DEVICES MIN(USB_MAX_DEVICES, 64) -#define OCTUSB_MAX_PORTS 2 /* hardcoded */ -#define OCTUSB_MAX_FIXUP 4096 /* bytes */ -#define OCTUSB_INTR_ENDPT 0x01 - -struct octusb_qh; -struct octusb_td; -struct octusb_softc; - -typedef uint8_t (octusb_cmd_t)(struct octusb_td *td); - -struct octusb_td { - struct octusb_qh *qh; - struct octusb_td *obj_next; - struct usb_page_cache *pc; - octusb_cmd_t *func; - - uint32_t remainder; - uint32_t offset; - - uint8_t error_any:1; - uint8_t error_stall:1; - uint8_t short_pkt:1; - uint8_t alt_next:1; - uint8_t reserved:4; -}; - -struct octusb_qh { - uint64_t fixup_phys; - - struct octusb_softc *sc; - struct usb_page_cache *fixup_pc; - uint8_t *fixup_buf; - - cvmx_usb_iso_packet_t iso_pkt; - - uint32_t fixup_off; - - uint16_t max_frame_size; - uint16_t max_packet_size; - uint16_t fixup_actlen; - uint16_t fixup_len; - uint16_t ep_interval; - - uint8_t dev_addr; - uint8_t dev_speed; - uint8_t ep_allocated; - uint8_t ep_mult; - uint8_t ep_num; - uint8_t ep_type; - uint8_t ep_toggle_next; - uint8_t root_port_index; - uint8_t fixup_complete; - uint8_t fixup_pending; - uint8_t hs_hub_addr; - uint8_t hs_hub_port; - - int fixup_handle; - int ep_handle; -}; - -struct octusb_config_desc { - struct usb_config_descriptor confd; - struct usb_interface_descriptor ifcd; - struct usb_endpoint_descriptor endpd; -} __packed; - -union octusb_hub_desc { - struct usb_status stat; - struct usb_port_status ps; - uint8_t temp[128]; -}; - -struct octusb_port { - cvmx_usb_state_t state; - uint8_t disabled; -}; - -struct octusb_softc { - struct usb_bus sc_bus; /* base device */ - union octusb_hub_desc sc_hub_desc; - - struct usb_device *sc_devices[OCTUSB_MAX_DEVICES]; - - struct resource *sc_irq_res[OCTUSB_MAX_PORTS]; - void *sc_intr_hdl[OCTUSB_MAX_PORTS]; - - struct octusb_port sc_port[OCTUSB_MAX_PORTS]; - device_t sc_dev; - - struct usb_hub_descriptor_min sc_hubd; - - uint8_t sc_noport; /* number of ports */ - uint8_t sc_addr; /* device address */ - uint8_t sc_conf; /* device configuration */ - uint8_t sc_isreset; /* set if current port is reset */ - - uint8_t sc_hub_idata[1]; -}; - -usb_bus_mem_cb_t octusb_iterate_hw_softc; -usb_error_t octusb_init(struct octusb_softc *); -usb_error_t octusb_uninit(struct octusb_softc *); -void octusb_interrupt(struct octusb_softc *); - -#endif /* _OCTUSB_H_ */ diff --git a/sys/mips/cavium/usb/octusb_octeon.c b/sys/mips/cavium/usb/octusb_octeon.c deleted file mode 100644 index 95ec23a5204..00000000000 --- a/sys/mips/cavium/usb/octusb_octeon.c +++ /dev/null @@ -1,216 +0,0 @@ -#include -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2007-2008 Hans Petter Selasky. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include - -#define MEM_RID 0 - -static device_identify_t octusb_octeon_identify; -static device_probe_t octusb_octeon_probe; -static device_attach_t octusb_octeon_attach; -static device_detach_t octusb_octeon_detach; - -struct octusb_octeon_softc { - struct octusb_softc sc_dci; /* must be first */ -}; - -static void -octusb_octeon_identify(driver_t *drv, device_t parent) -{ - if (octeon_has_feature(OCTEON_FEATURE_USB)) - BUS_ADD_CHILD(parent, 0, "octusb", 0); -} - -static int -octusb_octeon_probe(device_t dev) -{ - device_set_desc(dev, "Cavium Octeon USB controller"); - return (0); -} - -static int -octusb_octeon_attach(device_t dev) -{ - struct octusb_octeon_softc *sc = device_get_softc(dev); - int err; - int rid; - int nports; - int i; - - /* setup controller interface softc */ - - /* initialise some bus fields */ - sc->sc_dci.sc_bus.parent = dev; - sc->sc_dci.sc_bus.devices = sc->sc_dci.sc_devices; - sc->sc_dci.sc_bus.devices_max = OCTUSB_MAX_DEVICES; - sc->sc_dci.sc_bus.dma_bits = 32; - - /* get all DMA memory */ - if (usb_bus_mem_alloc_all(&sc->sc_dci.sc_bus, - USB_GET_DMA_TAG(dev), NULL)) { - return (ENOMEM); - } - nports = cvmx_usb_get_num_ports(); - if (nports > OCTUSB_MAX_PORTS) - panic("octusb: too many USB ports %d", nports); - for (i = 0; i < nports; i++) { - rid = 0; - sc->sc_dci.sc_irq_res[i] = - bus_alloc_resource(dev, SYS_RES_IRQ, &rid, - OCTEON_IRQ_USB0 + i, OCTEON_IRQ_USB0 + i, 1, RF_ACTIVE); - if (!(sc->sc_dci.sc_irq_res[i])) { - goto error; - } - -#if (__FreeBSD_version >= 700031) - err = bus_setup_intr(dev, sc->sc_dci.sc_irq_res[i], INTR_TYPE_BIO | INTR_MPSAFE, - NULL, (driver_intr_t *)octusb_interrupt, sc, &sc->sc_dci.sc_intr_hdl[i]); -#else - err = bus_setup_intr(dev, sc->sc_dci.sc_irq_res[i], INTR_TYPE_BIO | INTR_MPSAFE, - (driver_intr_t *)octusb_interrupt, sc, &sc->sc_dci.sc_intr_hdl[i]); -#endif - if (err) { - sc->sc_dci.sc_intr_hdl[i] = NULL; - goto error; - } - } - - sc->sc_dci.sc_bus.bdev = device_add_child(dev, "usbus", -1); - if (!(sc->sc_dci.sc_bus.bdev)) { - goto error; - } - device_set_ivars(sc->sc_dci.sc_bus.bdev, &sc->sc_dci.sc_bus); - - err = octusb_init(&sc->sc_dci); - if (!err) { - err = device_probe_and_attach(sc->sc_dci.sc_bus.bdev); - } - if (err) { - goto error; - } - return (0); - -error: - octusb_octeon_detach(dev); - return (ENXIO); -} - -static int -octusb_octeon_detach(device_t dev) -{ - struct octusb_octeon_softc *sc = device_get_softc(dev); - int err; - int nports; - int i; - - /* during module unload there are lots of children leftover */ - device_delete_children(dev); - - if (sc->sc_dci.sc_irq_res[0] && sc->sc_dci.sc_intr_hdl[0]) - /* - * only call octusb_octeon_uninit() after octusb_octeon_init() - */ - octusb_uninit(&sc->sc_dci); - - nports = cvmx_usb_get_num_ports(); - if (nports > OCTUSB_MAX_PORTS) - panic("octusb: too many USB ports %d", nports); - for (i = 0; i < nports; i++) { - if (sc->sc_dci.sc_irq_res[i] && sc->sc_dci.sc_intr_hdl[i]) { - err = bus_teardown_intr(dev, sc->sc_dci.sc_irq_res[i], - sc->sc_dci.sc_intr_hdl[i]); - sc->sc_dci.sc_intr_hdl[i] = NULL; - } - if (sc->sc_dci.sc_irq_res[i]) { - bus_release_resource(dev, SYS_RES_IRQ, 0, - sc->sc_dci.sc_irq_res[i]); - sc->sc_dci.sc_irq_res[i] = NULL; - } - } - usb_bus_mem_free_all(&sc->sc_dci.sc_bus, NULL); - - return (0); -} - -static device_method_t octusb_octeon_methods[] = { - /* Device interface */ - DEVMETHOD(device_identify, octusb_octeon_identify), - DEVMETHOD(device_probe, octusb_octeon_probe), - DEVMETHOD(device_attach, octusb_octeon_attach), - DEVMETHOD(device_detach, octusb_octeon_detach), - DEVMETHOD(device_resume, bus_generic_resume), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - - DEVMETHOD_END -}; - -static driver_t octusb_octeon_driver = { - .name = "octusb", - .methods = octusb_octeon_methods, - .size = sizeof(struct octusb_octeon_softc), -}; - -static devclass_t octusb_octeon_devclass; - -DRIVER_MODULE(octusb, ciu, octusb_octeon_driver, octusb_octeon_devclass, 0, 0); diff --git a/sys/mips/conf/ALFA_HORNET_UB b/sys/mips/conf/ALFA_HORNET_UB deleted file mode 100644 index ec40333dd86..00000000000 --- a/sys/mips/conf/ALFA_HORNET_UB +++ /dev/null @@ -1,58 +0,0 @@ -# -# Alfa Networks Hornet UB - an AR933x based SoC wifi device. -# -# http://www.alfa.com.tw/products_show.php?pc=99&ps=50 -# -# This is for the 64MB RAM/16MB flash part. They also -# do various other versions; they have different RAM/flash -# configurations. -# -# * AR9330 SoC -# * 64MB RAM -# * 16MB flash -# * Integrated 1x1 2GHz wifi and 10/100 bridge -# -# - -#NO_UNIVERSE - -# Include the default AR933x parameters -include "std.AR933X" - -ident ALFA_HORNET_UB - -# Override hints with board values -hints "ALFA_HORNET_UB.hints" - -# Board memory - 64MB -options AR71XX_REALMEM=(64*1024*1024) - -# i2c GPIO bus -#device gpioiic -#device iicbb -#device iicbus -#device iic - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# read MSDOS formatted disks - USB -#options MSDOSFS - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# uzip - to boot natively from flash -device xz -options GEOM_UZIP - -# Used for the static uboot partition map -device geom_map - -# Boot off of the rootfs, as defined in the geom_map setup. -options ROOTDEVNAME=\"ufs:map/rootfs.uzip\" diff --git a/sys/mips/conf/ALFA_HORNET_UB.hints b/sys/mips/conf/ALFA_HORNET_UB.hints deleted file mode 100644 index 1a6e298fc84..00000000000 --- a/sys/mips/conf/ALFA_HORNET_UB.hints +++ /dev/null @@ -1,104 +0,0 @@ -# -# This file adds to the values in AR933X_BASE.hints -# - -# mdiobus on arge1 -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x1a000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# There's no need to set the ar933x GMAC configuration bits. -# This just creates a switch instance and correctly uses it. - -# Embedded Atheros Switch -hint.arswitch.0.at="mdio0" - -# XXX this should really say it's an AR933x switch, as there -# are some vlan specific differences here! -hint.arswitch.0.is_7240=1 -hint.arswitch.0.numphys=4 -hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY -hint.arswitch.0.is_rgmii=0 -hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII - -# arge0 - MII, autoneg, phy(4) -hint.arge.0.phymask=0x10 # PHY4 -hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus - -# arge1 - GMII, 1000/full -hint.arge.1.phymask=0x0 # No directly mapped PHYs -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 - -# Where the ART is - last 64k in the flash -# 0x9fff1000 ? -hint.ath.0.eepromaddr=0x1fff0000 -hint.ath.0.eepromsize=16384 - -# The board 16MiB flash layout in uboot env: -# -# 256k (uboot), 64k (uboot-env), 14336k (rootfs), 1600k (kernel), 64k (NVRAM), 64k (ART) - -# However, it boots from 0x9f050000, which is the front of the flsah! -# Thus the kernel/rootfs are switched around. - -# 256KB -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x000040000 -hint.map.0.name="uboot" -hint.map.0.readonly=1 - -# 64KB -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end=0x00050000 -hint.map.1.name="uboot-env" -hint.map.1.readonly=0 - -# 1600KB -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00050000 -hint.map.2.end=0x001e0000 -hint.map.2.name="kernel" -hint.map.2.readonly=0 - -# 14336KB -hint.map.3.at="flash/spi0" -hint.map.3.start=0x001e0000 -hint.map.3.end=0x00fe0000 -hint.map.3.name="rootfs" -hint.map.3.readonly=0 - -# NVRAM -hint.map.4.at="flash/spi0" -hint.map.4.start=0x00fe0000 -hint.map.4.end=0x00ff0000 -hint.map.4.name="cfg" -hint.map.4.readonly=0 - -# This is radio calibration section. It is (or should be!) unique -# for each board, to take into account thermal and electrical differences -# as well as the regulatory compliance data. -# -hint.map.5.at="flash/spi0" -hint.map.5.start=0x00ff0000 -hint.map.5.end=0x01000000 -hint.map.5.name="art" -hint.map.5.readonly=1 - -# GPIO specific configuration block - -# Don't flip on anything that isn't already enabled. -# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're -# not used here. -hint.gpio.0.function_set=0x00000000 -hint.gpio.0.function_clear=0x00000000 - -# These are the GPIO LEDs and buttons which can be software controlled. -#hint.gpio.0.pinmask=0x001c02ae -#hint.gpio.0.pinmask=0x00001803 - -# XXX TODO: the button and LEDs! - diff --git a/sys/mips/conf/AP121 b/sys/mips/conf/AP121 deleted file mode 100644 index a8381451339..00000000000 --- a/sys/mips/conf/AP121 +++ /dev/null @@ -1,52 +0,0 @@ -# -# AP121 - the AP121 reference board from Qualcomm Atheros includes: -# -# * AR9330 SoC -# * 16MB RAM -# * 4MB flash -# * Integrated 1x1 2GHz wifi and 10/100 bridge -# -# - -#NO_UNIVERSE - -# Include the default AR933x parameters -include "std.AR933X" - -ident AP121 - -# Override hints with board values -hints "AP121.hints" - -# Force the board memory - the base AP121 only has 16MB RAM -options AR71XX_REALMEM=(16*1024*1024) - -# i2c GPIO bus -#device gpioiic -#device iicbb -#device iicbus -#device iic - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# read MSDOS formatted disks - USB -#options MSDOSFS - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# uzip - to boot natively from flash -device xz -options GEOM_UZIP - -# Used for the static uboot partition map -device geom_map - -# Boot off of the rootfs, as defined in the geom_map setup. -options ROOTDEVNAME=\"ufs:map/rootfs.uzip\" diff --git a/sys/mips/conf/AP121.hints b/sys/mips/conf/AP121.hints deleted file mode 100644 index af4647933f6..00000000000 --- a/sys/mips/conf/AP121.hints +++ /dev/null @@ -1,106 +0,0 @@ -# -# This file adds to the values in AR91XX_BASE.hints. -# - -# mdiobus on arge1 -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x1a000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# Embedded Atheros Switch -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=1 -hint.arswitch.0.numphys=4 -hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY -hint.arswitch.0.is_rgmii=0 -hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII - -# arge0 - MII, autoneg, phy(4) -hint.arge.0.phymask=0x10 # PHY4 -hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus - -# arge1 - GMII, 1000/full -hint.arge.1.phymask=0x0 # No directly mapped PHYs -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 - -# The AP121 4MB flash layout: -# -# bootargs=console=ttyS0,115200 root=31:02 rootfstype=squashfs -# init=/sbin/init mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env), -# 2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART) -# -# So: -# 256k: uboot -# 64: uboot-env -# 2752k: rootfs -# 896k: kernel -# 64k: config -# 64k: ART - -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x000040000 -hint.map.0.name="uboot" -hint.map.0.readonly=1 - -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end=0x00050000 -hint.map.1.name="uboot-env" -hint.map.1.readonly=0 - -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00050000 -hint.map.2.end=0x00300000 -hint.map.2.name="rootfs" -hint.map.2.readonly=0 - -hint.map.3.at="flash/spi0" -hint.map.3.start=0x00300000 -hint.map.3.end=0x003e0000 -hint.map.3.name="kernel" -hint.map.3.readonly=0 - -hint.map.4.at="flash/spi0" -hint.map.4.start=0x003e0000 -hint.map.4.end=0x003f0000 -hint.map.4.name="cfg" -hint.map.4.readonly=0 - -# This is radio calibration section. It is (or should be!) unique -# for each board, to take into account thermal and electrical differences -# as well as the regulatory compliance data. -# -hint.map.5.at="flash/spi0" -hint.map.5.start=0x003f0000 -hint.map.5.end=0x00400000 -hint.map.5.name="art" -hint.map.5.readonly=1 - -# GPIO specific configuration block - -# Don't flip on anything that isn't already enabled. -# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're -# not used here. -hint.gpio.0.function_set=0x00000000 -hint.gpio.0.function_clear=0x00000000 - -# These are the GPIO LEDs and buttons which can be software controlled. -#hint.gpio.0.pinmask=0x001c02ae -hint.gpio.0.pinmask=0x00001803 - -# gpio0 - WLAN LED -# gpio1 - USB LED -# gpio11 - Jumpstart button -# gpio12 - Reset button - -# LEDs are configured separately and driven by the LED device -hint.gpioled.0.at="gpiobus0" -hint.gpioled.0.name="wlan" -hint.gpioled.0.pins=0x0001 - -hint.gpioled.1.at="gpiobus0" -hint.gpioled.1.name="usb" -hint.gpioled.1.pins=0x0002 diff --git a/sys/mips/conf/AP135 b/sys/mips/conf/AP135 deleted file mode 100644 index 5ed118b42f7..00000000000 --- a/sys/mips/conf/AP135 +++ /dev/null @@ -1,65 +0,0 @@ -# -# AP135 - the QCA955x SoC reference design -# -# This contains a QCA9558 MIPS74k SoC with on-board 3x3 2GHz wifi, -# 128MiB RAM, an AR8327 5-port gigabit ethernet switch and -# a QCA 11ac 5GHz AP NIC. -# -# The to things not currently support are the QCA 11ac NIC and -# PCIe host controllers - there's two of them, and the existing -# PCIe code here doesn't support that just yet. -# -# - -#NO_UNIVERSE - -# Include the default QCA955x parameters -include "std.QCA955X" - -ident AP135 - -# Override hints with board values -hints "AP135.hints" - -# Force the board memory - the base AP135 has 128MB RAM -options AR71XX_REALMEM=(128*1024*1024) - -# i2c GPIO bus -#device gpioiic -#device iicbb -#device iicbus -#device iic - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# read MSDOS formatted disks - USB -#options MSDOSFS - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# uzip - to boot natively from flash -device xz -options GEOM_UZIP - -# Used for the static uboot partition map -device geom_map - -# yes, this board has a PCIe connected atheros device -# add ath_pci so it can at least attach things when there's a -# ath(4) in there, rather than the 11ac chip we don't support. -device pci -device qca955x_pci - -device firmware # Used by the above -options AR71XX_ATH_EEPROM -options ATH_EEPROM_FIRMWARE - -# Boot off of the rootfs, as defined in the geom_map setup. -options ROOTDEVNAME=\"ufs:map/rootfs.uzip\" diff --git a/sys/mips/conf/AP135.hints b/sys/mips/conf/AP135.hints deleted file mode 100644 index 63b77124bd9..00000000000 --- a/sys/mips/conf/AP135.hints +++ /dev/null @@ -1,177 +0,0 @@ -# This is a placeholder until the hardware support is complete. - -# I'm assuming this is an AP135-020. The AP136-010 in openwrt has -# the ethernet ports wired up to the switch in the reverse way. - -# QCA955X_ETH_CFG_RGMII_EN (1 << 0) -hint.qca955x_gmac.0.gmac_cfg=0x1 - -# mdiobus0 on arge0 -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# mdiobus1 on arge1 - required to bring up arge1? -hint.argemdio.1.at="nexus0" -hint.argemdio.1.maddr=0x1a000000 -hint.argemdio.1.msize=0x1000 -hint.argemdio.1.order=0 - -# AR8327 - connected via mdiobus0 on arge0 -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=0 # definitely not the internal switch! -hint.arswitch.0.is_9340=0 # not the internal switch! -hint.arswitch.0.numphys=5 # all ports are PHYs -hint.arswitch.0.phy4cpu=0 -hint.arswitch.0.is_rgmii=0 # not needed -hint.arswitch.0.is_gmii=0 # not needed - -# This is where it gets a bit odd. port 0 and port 6 are CPU ports. -# The current code only supports one CPU port. So hm, what should -# we do to hook PAD6 up to be RGMII but a PHY, not a MAC? - -# The other trick - how do we get arge1 (hooked up to GMAC0) to work? -# That's currently supposed to be hooked up to CPU port 0. - -# Other AR8327 configuration parameters - -# AP136-020 parameters - -# GMAC0 AR8327 -> GMAC1 (arge1) SoC, SGMII - -# AR8327_PAD_MAC_SGMII -hint.arswitch.0.pad.0.mode=3 -#hint.arswitch.0.pad.0.rxclk_delay_sel=0 -hint.arswitch.0.pad.0.sgmii_delay_en=1 - -# GMAC6 AR8327 -> GMAC0 (arge0) SoC, RGMII - -# AR8327_PAD_MAC_RGMII -# XXX I think this hooks it up to the internal MAC6 -hint.arswitch.0.pad.6.mode=6 -hint.arswitch.0.pad.6.txclk_delay_en=1 -hint.arswitch.0.pad.6.rxclk_delay_en=1 -# AR8327_CLK_DELAY_SEL1 -hint.arswitch.0.pad.6.txclk_delay_sel=1 -# AR8327_CLK_DELAY_SEL2 -hint.arswitch.0.pad.6.rxclk_delay_sel=2 - -# XXX there's no LED management just yet! -hint.arswitch.0.led.ctrl0=0x00000000 -hint.arswitch.0.led.ctrl1=0xc737c737 -hint.arswitch.0.led.ctrl2=0x00000000 -hint.arswitch.0.led.ctrl3=0x00c30c00 -hint.arswitch.0.led.open_drain=1 - -# force_link=1 is required for the rest of the parameters -# to be configured. -hint.arswitch.0.port.0.force_link=1 -hint.arswitch.0.port.0.speed=1000 -hint.arswitch.0.port.0.duplex=1 -hint.arswitch.0.port.0.txpause=1 -hint.arswitch.0.port.0.rxpause=1 - -# force_link=1 is required for the rest of the parameters -# to be configured. -hint.arswitch.0.port.6.force_link=1 -hint.arswitch.0.port.6.speed=1000 -hint.arswitch.0.port.6.duplex=1 -hint.arswitch.0.port.6.txpause=1 -hint.arswitch.0.port.6.rxpause=1 - -# arge0 - hooked up to AR8327 GMAC6, RGMII -# set at 1000/full to the switch. -# so, lock both sides of this connect up to 1000/full; -# if_arge thus wont change the PLL configuration -# upon a link status change. -hint.arge.0.phymask=0x0 -hint.arge.0.miimode=3 # RGMII -hint.arge.0.media=1000 -hint.arge.0.fduplex=1 -hint.arge.0.pll_1000=0x56000000 - -# MAC for arge0 is the first 6 bytes of the ART -hint.arge.0.eeprommac=0x1fff0000 - -# arge1 - lock up to 1000/full -hint.arge.1.phymask=0x0 -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 -hint.arge.1.miimode=5 # SGMII -hint.arge.1.pll_1000=0x03000101 - -# MAC for arge1 is the second 6 bytes of the ART -hint.arge.1.eeprommac=0x1fff0006 - -# Where the ART is - last 64k in the first 8MB of flash -hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000 -hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384 - -# And now tell the ath(4) driver where to look! -hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware" - -# flash layout: -# -# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),8256k(mib0),64k(ART) - -# The default flash layout isn't enough to fit a freebsd kernel -# now, so the layout has been shuffled around. -# -# By default it's set to: -# 256KB uboot, 64KB uboot-env, 6336KB rootfs, 1344KB kernel, 64KB cfg, 8256MB mib0, 64KB ART -# With 'bootcmd=bootm 0x9f680000' in the environment. -# -# Instead, now let's make it: -# 256KB uboot, 64KB uboot-env, 2048MB kernel, 6144MB rootfs, 7644KB mib0, 64KB cfg, 64KB ART -# .. and then you change the boot env to be: -# 'bootcmd=bootm 0x9f050000' - -# 256KiB u-boot -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00040000 # 256k u-boot -hint.map.0.name="u-boot" -hint.map.0.readonly=1 - -# 64KiB u-boot-env -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end=0x00050000 # 64k u-boot-env -hint.map.1.name="u-boot-env" -hint.map.1.readonly=1 - -# 2048KiB kernel -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00050000 -hint.map.2.end=0x00250000 # 2048k rootfs -hint.map.2.name="kernel" -hint.map.2.readonly=1 - -# 6144KiB rootfs -hint.map.3.at="flash/spi0" -hint.map.3.start=0x00250000 -hint.map.3.end=0x00850000 -hint.map.3.name="rootfs" -hint.map.3.readonly=1 - -# 7644KiB mib0 -hint.map.4.at="flash/spi0" -hint.map.4.start=0x00850000 -hint.map.4.end=0x00fe0000 -hint.map.4.name="mib0" -hint.map.4.readonly=0 - -# 64KiB cfg -hint.map.5.at="flash/spi0" -hint.map.5.start=0x00fe0000 -hint.map.5.end=0x00ff0000 -hint.map.5.name="cfg" -hint.map.5.readonly=0 - -# 64KiB ART -hint.map.6.at="flash/spi0" -hint.map.6.start=0x00ff0000 -hint.map.6.end=0x01000000 # 64k ART -hint.map.6.name="ART" -hint.map.6.readonly=1 diff --git a/sys/mips/conf/AP143 b/sys/mips/conf/AP143 deleted file mode 100644 index d56a6e97115..00000000000 --- a/sys/mips/conf/AP143 +++ /dev/null @@ -1,52 +0,0 @@ -# -# AP143 - the AP143 reference board from Qualcomm Atheros includes: -# -# * AR9330 SoC -# * 32MB RAM -# * 4MB flash -# * Integrated 1x1 2GHz wifi and 10/100 bridge -# -# - -#NO_UNIVERSE - -# Include the default QCA953x parameters -include "QCA953X_BASE" - -ident AP143 - -# Override hints with board values -hints "AP143.hints" - -# Force the board memory - the base AP121 only has 16MB RAM -options AR71XX_REALMEM=(32*1024*1024) - -# i2c GPIO bus -#device gpioiic -#device iicbb -#device iicbus -#device iic - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# read MSDOS formatted disks - USB -#options MSDOSFS - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# uzip - to boot natively from flash -device xz -options GEOM_UZIP - -# Used for the static uboot partition map -device geom_map - -# Boot off of the rootfs, as defined in the geom_map setup. -options ROOTDEVNAME=\"ufs:map/rootfs.uzip\" diff --git a/sys/mips/conf/AP143.hints b/sys/mips/conf/AP143.hints deleted file mode 100644 index 5f4ae1876c4..00000000000 --- a/sys/mips/conf/AP143.hints +++ /dev/null @@ -1,111 +0,0 @@ -# -# This file adds to the values in QCA953X_BASE.hints. -# - -# Embedded Atheros Switch -hint.arswitch.0.at="mdio1" -hint.arswitch.0.is_7240=0 -hint.arswitch.0.is_9340=1 -hint.arswitch.0.numphys=4 -hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY -hint.arswitch.0.is_rgmii=0 -hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII - -# arge0 - MII, autoneg, phy(4) -# MAC for arge0 is the first 6 bytes of the ART -hint.arge.0.eeprommac=0x1fff0000 -hint.arge.0.phymask=0x10 # PHY4 -hint.arge.0.mdio=mdioproxy2 # .. off of the switch mdiobus - -# arge1 - GMII, 1000/full -hint.arge.1.eeprommac=0x1fff0006 -hint.arge.1.phymask=0x0 # No directly mapped PHYs -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 - -# Where the ART is - last 64k in the first 8MB of flash -hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000 -hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384 - -# And now tell the ath(4) driver where to look! -hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware" - -# The AP121 4MB flash layout: -# -# bootargs=console=ttyS0,115200 root=31:02 rootfstype=squashfs -# init=/sbin/init mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env), -# 2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART) -# -# So: -# 256k: uboot -# 64: uboot-env -# 2752k: rootfs -# 896k: kernel -# 64k: config -# 64k: ART - -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x000040000 -hint.map.0.name="uboot" -hint.map.0.readonly=1 - -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end=0x00050000 -hint.map.1.name="uboot-env" -hint.map.1.readonly=0 - -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00050000 -hint.map.2.end=0x00300000 -hint.map.2.name="rootfs" -hint.map.2.readonly=0 - -hint.map.3.at="flash/spi0" -hint.map.3.start=0x00300000 -hint.map.3.end=0x003e0000 -hint.map.3.name="kernel" -hint.map.3.readonly=0 - -hint.map.4.at="flash/spi0" -hint.map.4.start=0x003e0000 -hint.map.4.end=0x003f0000 -hint.map.4.name="cfg" -hint.map.4.readonly=0 - -# This is radio calibration section. It is (or should be!) unique -# for each board, to take into account thermal and electrical differences -# as well as the regulatory compliance data. -# -hint.map.5.at="flash/spi0" -hint.map.5.start=0x003f0000 -hint.map.5.end=0x00400000 -hint.map.5.name="art" -hint.map.5.readonly=1 - -# GPIO specific configuration block - -# Don't flip on anything that isn't already enabled. -# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're -# not used here. -hint.gpio.0.function_set=0x00000000 -hint.gpio.0.function_clear=0x00000000 - -# These are the GPIO LEDs and buttons which can be software controlled. -#hint.gpio.0.pinmask=0x001c02ae -# hint.gpio.0.pinmask=0x00001803 - -# gpio0 - WLAN LED -# gpio1 - USB LED -# gpio11 - Jumpstart button -# gpio12 - Reset button - -# LEDs are configured separately and driven by the LED device -#hint.gpioled.0.at="gpiobus0" -#hint.gpioled.0.name="wlan" -#hint.gpioled.0.pins=0x0001 - -#hint.gpioled.1.at="gpiobus0" -#hint.gpioled.1.name="usb" -#hint.gpioled.1.pins=0x0002 diff --git a/sys/mips/conf/AP91 b/sys/mips/conf/AP91 deleted file mode 100644 index 04714d6083d..00000000000 --- a/sys/mips/conf/AP91 +++ /dev/null @@ -1,64 +0,0 @@ -# -# Specific board setup for the Atheros AP91 reference board. -# -# The AP91 has the following hardware: -# -# + AR7241 CPU SoC -# + AR9287 Wifi -# + Integrated switch (XXX speed?) -# + 4MB flash -# + 16MB RAM -# + uboot environment - -#NO_UNIVERSE - -include "std.AR724X" -ident "AP91" -hints "AP91.hints" - -options AR71XX_REALMEM=16*1024*1024 - -options AR71XX_ENV_UBOOT - -# Limit inlines -makeoptions INLINE_LIMIT=768 - -# We bite the performance overhead for now; the kernel won't -# fit if the mutexes are inlined. -options MUTEX_NOINLINE -options RWLOCK_NOINLINE -options SX_NOINLINE - -# There's no need to enable swapping on this platform. -options NO_SWAPPING - -# For DOS - enable if required -# options MSDOSFS - -# uncompress - to boot read-only lzma natively from flash -device xz -options GEOM_UZIP -options ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\" - -# Not enough space for these.. -nooptions INVARIANTS -nooptions INVARIANT_SUPPORT -nooptions WITNESS -nooptions WITNESS_SKIPSPIN -nooptions DEBUG_REDZONE -nooptions DEBUG_MEMGUARD - -# Used for the static uboot partition map -device geom_map - -# Options needed for the EEPROM based calibration/PCI configuration data. -options AR71XX_ATH_EEPROM # Fetch EEPROM/PCI config from flash -options ATH_EEPROM_FIRMWARE # Use EEPROM from flash -device firmware # Used by the above - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch diff --git a/sys/mips/conf/AP91.hints b/sys/mips/conf/AP91.hints deleted file mode 100644 index 12cd5eff233..00000000000 --- a/sys/mips/conf/AP91.hints +++ /dev/null @@ -1,103 +0,0 @@ - -# arge0 MDIO bus -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# arge1 MDIO bus doesn't exist on the AR7240 - -# arge0: MII; dedicated PHY 4 on switch, connected via internal switch -# MDIO bus. - -hint.arge.0.at="nexus0" -hint.arge.0.maddr=0x19000000 -hint.arge.0.msize=0x1000 -hint.arge.0.irq=2 -# hint.arge.0.eeprommac=0x83fe9ff0 -hint.arge.0.phymask=0x10 # PHY 4 -# hint.arge.0.miimode=2 # MII -hint.arge.0.mdio=mdioproxy1 # Hanging off the arswitch MDIO bus - -# arge1: connected to the LAN switch MAC, at 1000BaseTX / GMII. - -hint.arge.1.phymask=0x0 -# hint.arge.1.miimode=1 # GMII -hint.arge.1.media=1000 # Force to 1000BaseTX/full -hint.arge.1.fduplex=1 - -# -# AR7240 switch config -# -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=1 # We need to be explicitly told this -hint.arswitch.0.numphys=4 # 4 active switch PHYs (PHY 0 -> 3) -hint.arswitch.0.phy4cpu=1 # Yes, PHY 4 == dedicated PHY -hint.arswitch.0.is_rgmii=0 # No, not RGMII -hint.arswitch.0.is_gmii=0 # No, not GMII - -# ath0 hint - pcie slot 0 -hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff1000 -hint.pcib.0.bus.0.0.0.ath_fixup_size=4096 - -# ath -hint.ath.0.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware" - -# Signal leds -hint.gpioled.0.at="gpiobus0" -hint.gpioled.0.name="sig1" -hint.gpioled.0.pins=0x0001 # pin 0 -hint.gpioled.1.at="gpiobus0" -hint.gpioled.1.name="sig2" -hint.gpioled.1.pins=0x0002 # pin 1 -hint.gpioled.2.at="gpiobus0" -hint.gpioled.2.name="sig3" -hint.gpioled.2.pins=0x0800 # pin 11 -hint.gpioled.3.at="gpiobus0" -hint.gpioled.3.name="sig4" -hint.gpioled.3.pins=0x0080 # pin 7 - -# nvram mapping - XXX ? -hint.nvram.0.base=0x1f030000 -hint.nvram.0.maxsize=0x2000 -hint.nvram.0.flags=3 # 1 = No check, 2 = Format Generic -hint.nvram.1.base=0x1f032000 -hint.nvram.1.maxsize=0x4000 -hint.nvram.1.flags=3 # 1 = No check, 2 = Format Generic - -# GEOM_MAP -# -# From my AP91 environment: -# -# mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),2752k(rootfs), -# 960k(uImage),64k(ART) - -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00040000 # 256k u-boot -hint.map.0.name="u-boot" -hint.map.0.readonly=1 - -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end=0x00050000 # 64k u-boot-env -hint.map.1.name="u-boot-env" -hint.map.1.readonly=0 - -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00050000 -hint.map.2.end=0x00300000 # 2752k rootfs -hint.map.2.name="rootfs" -hint.map.2.readonly=1 - -hint.map.3.at="flash/spi0" -hint.map.3.start=0x00300000 -hint.map.3.end=0x003f0000 # 896k uImage -hint.map.3.name="uImage" -hint.map.3.readonly=1 - -hint.map.4.at="flash/spi0" -hint.map.4.start=0x003f0000 -hint.map.4.end=0x00400000 # 64k ART -hint.map.4.name="ART" -hint.map.4.readonly=1 diff --git a/sys/mips/conf/AP93 b/sys/mips/conf/AP93 deleted file mode 100644 index 0051fb7d50d..00000000000 --- a/sys/mips/conf/AP93 +++ /dev/null @@ -1,44 +0,0 @@ -# -# Specific board setup for the Atheros AP91 reference board. -# -# The AP93 has the following hardware: -# -# + AR7240 CPU SoC -# + AR9280 Wifi -# + Integrated switch (XXX speed?) -# + 16MB flash -# + 64MB RAM -# + uboot environment - -#NO_UNIVERSE - -include "std.AR724X" -ident "AP93" -hints "AP93.hints" - -options AR71XX_REALMEM=64*1024*1024 - -options AR71XX_ENV_UBOOT - -# For DOS - enable if required -options MSDOSFS - -# uncompress - to boot read-only lzma natively from flash -device xz -options GEOM_UZIP -options ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\" - -# Used for the static uboot partition map -device geom_map - -# Options needed for the EEPROM based calibration/PCI configuration data. -options AR71XX_ATH_EEPROM # Fetch EEPROM/PCI config from flash -options ATH_EEPROM_FIRMWARE # Use EEPROM from flash -device firmware # Used by the above - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch diff --git a/sys/mips/conf/AP93.hints b/sys/mips/conf/AP93.hints deleted file mode 100644 index aaf18441ba6..00000000000 --- a/sys/mips/conf/AP93.hints +++ /dev/null @@ -1,138 +0,0 @@ - -# arge0 MDIO bus -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# arge1 MDIO bus doesn't exist on the AR7240 - -# arge0: MII; dedicated PHY 4 on switch, connected via internal switch -# MDIO bus. - -# hint.arge.0.eeprommac=0x83fe9ff0 -hint.arge.0.phymask=0x10 # PHY 4 -# hint.arge.0.miimode=2 # MII -hint.arge.0.mdio=mdioproxy1 # Hanging off the arswitch MDIO bus -hint.arge.0.eeprommac=0x1fff0000 - -# arge1: connected to the LAN switch MAC, at 1000BaseTX / GMII. -hint.arge.1.phymask=0x0 -# hint.arge.1.miimode=1 # GMII -hint.arge.1.media=1000 # Force to 1000BaseTX/full -hint.arge.1.fduplex=1 -hint.arge.1.eeprommac=0x1fff0006 - -# -# AR7240 switch config -# -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=1 # We need to be explicitly told this -hint.arswitch.0.numphys=4 # 4 active switch PHYs (PHY 0 -> 3) -hint.arswitch.0.phy4cpu=1 # Yes, PHY 4 == dedicated PHY -hint.arswitch.0.is_rgmii=0 # No, not RGMII -hint.arswitch.0.is_gmii=0 # No, not GMII - -# ath0 hint - pcie slot 0 -hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff1000 -hint.pcib.0.bus.0.0.0.ath_fixup_size=4096 - -# ath0 - eeprom comes from here -hint.ath.0.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware" - -# Signal leds -hint.gpioled.0.at="gpiobus0" -hint.gpioled.0.name="sig1" -hint.gpioled.0.pins=0x0001 # pin 0 -hint.gpioled.1.at="gpiobus0" -hint.gpioled.1.name="sig2" -hint.gpioled.1.pins=0x0002 # pin 1 -hint.gpioled.2.at="gpiobus0" -hint.gpioled.2.name="sig3" -hint.gpioled.2.pins=0x0800 # pin 11 -hint.gpioled.3.at="gpiobus0" -hint.gpioled.3.name="sig4" -hint.gpioled.3.pins=0x0080 # pin 7 - -# nvram mapping - XXX ? -hint.nvram.0.base=0x1f030000 -hint.nvram.0.maxsize=0x2000 -hint.nvram.0.flags=3 # 1 = No check, 2 = Format Generic -hint.nvram.1.base=0x1f032000 -hint.nvram.1.maxsize=0x4000 -hint.nvram.1.flags=3 # 1 = No check, 2 = Format Generic - -# GEOM_MAP -# -# From my AP93 environment: -# -# 256k - uboot -# 256k - uboot-env -# 3072k - spare-rootfs -# 1024k - spare-uImage -# 3072k - rootfs -# 1024k - uImage -# 64k - mib0 -# 64k - mib1 -# 4096k - ct -# 3392k - var -# 64k - ART - -# To make it useful for FreeBSD for now, treat spare rootfs, spare -# uimage and rootfs as 'rootfs'. - -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00040000 -hint.map.0.name="uboot" -hint.map.0.readonly=1 - -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end=0x00080000 -hint.map.1.name="uboot-env" -hint.map.1.readonly=1 - -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00080000 -hint.map.2.end="search:0x00080000:0x10000:.!/bin/sh" -hint.map.2.name="kernel" -hint.map.2.readonly=0 - -hint.map.3.at="flash/spi0" -hint.map.3.start="search:0x00080000:0x10000:.!/bin/sh" -hint.map.3.end=0x00880000 -hint.map.3.name="rootfs" -hint.map.3.readonly=0 - -hint.map.4.at="flash/spi0" -hint.map.4.start=0x00880000 -hint.map.4.end=0x00890000 -# hint.map.4.name="mib0" -hint.map.4.name="cfg" -# hint.map.4.readonly=1 - -hint.map.5.at="flash/spi0" -hint.map.5.start=0x00890000 -hint.map.5.end=0x008a0000 -hint.map.5.name="mib1" -hint.map.5.readonly=1 - -hint.map.6.at="flash/spi0" -hint.map.6.start=0x008a0000 -hint.map.6.end=0x00ca0000 -hint.map.6.name="ct" -hint.map.6.readonly=1 - -hint.map.7.at="flash/spi0" -hint.map.7.start=0x00ca0000 -hint.map.7.end=0x00ff0000 -hint.map.7.name="var" -hint.map.7.readonly=1 - -hint.map.8.at="flash/spi0" -hint.map.8.start=0x00ff0000 -hint.map.8.end=0x01000000 # 64k ART -hint.map.8.name="ART" -hint.map.8.readonly=1 - diff --git a/sys/mips/conf/AP94 b/sys/mips/conf/AP94 deleted file mode 100644 index 577c47a24e4..00000000000 --- a/sys/mips/conf/AP94 +++ /dev/null @@ -1,35 +0,0 @@ -# -# Specific board setup for the Atheros AP94 reference board. -# -# The AP94 has the following hardware: -# -# + AR7161 CPU SoC -# + AR9223 2.4GHz 11n -# + AR9220 5GHz 11n -# + AR8216 10/100 switch -# + m25p64 based 8MB flash -# + 32mb RAM -# + uboot environment - -#NO_UNIVERSE - -include "AR71XX_BASE" -ident "AP94" -hints "AP94.hints" - -# GEOM modules -device geom_redboot # to get access to the SPI flash partitions -device xz -options GEOM_UZIP - -options ROOTDEVNAME=\"ufs:md0.uzip\" -options AR71XX_REALMEM=32*1024*1024 - -options AR71XX_ENV_UBOOT - -# options MD_ROOT -# options MD_ROOT_SIZE="6144" - -options AR71XX_ATH_EEPROM # Fetch EEPROM/PCI config from flash -options ATH_EEPROM_FIRMWARE # Use EEPROM from flash -device firmware # Used by the above diff --git a/sys/mips/conf/AP94.hints b/sys/mips/conf/AP94.hints deleted file mode 100644 index 9f160b7a2cd..00000000000 --- a/sys/mips/conf/AP94.hints +++ /dev/null @@ -1,27 +0,0 @@ - -hint.arge.0.phymask=0x000c -hint.arge.0.media=100 -hint.arge.0.fduplex=1 - -# XXX grab these from uboot? -# hint.arge.0.eeprommac=0x1f01fc00 - -# The ath NICs have calibration data in flash. -# PCI slot 17 -# hint.ath.0.eepromaddr=0x1fff1000 -# PCI slot 18 -# hint.ath.1.eepromaddr=0x1fff5000 - -# ath0 - slot 17 -hint.pcib.0.bus.0.17.0.ath_fixup_addr=0x1fff1000 -hint.pcib.0.bus.0.17.0.ath_fixup_size=4096 - -# ath1 - slot 18 -hint.pcib.0.bus.0.18.0.ath_fixup_addr=0x1fff5000 -hint.pcib.0.bus.0.18.0.ath_fixup_size=4096 - -# .. and now, telling each ath(4) NIC where to find the firmware -# image. -hint.ath.0.eeprom_firmware="pcib.0.bus.0.17.0.eeprom_firmware" -hint.ath.1.eeprom_firmware="pcib.0.bus.0.18.0.eeprom_firmware" - diff --git a/sys/mips/conf/AP96 b/sys/mips/conf/AP96 deleted file mode 100644 index 76833a55e15..00000000000 --- a/sys/mips/conf/AP96 +++ /dev/null @@ -1,45 +0,0 @@ -# -# Specific board setup for the Atheros AP96 reference board. -# -# The AP96 has the following hardware: -# -# + AR7161 CPU SoC -# + AR9223 2.4GHz 11n -# + AR9220 5GHz 11n -# + AR8316 10/100/1000 switch -# + m25p64 based 8MB flash -# + 64mb RAM -# + uboot environment - -#NO_UNIVERSE - -include "AR71XX_BASE" -ident "AP96" -hints "AP96.hints" - -options AR71XX_REALMEM=64*1024*1024 - -options AR71XX_ENV_UBOOT - -# For DOS - enable if required -options MSDOSFS - -# uncompress - to boot read-only lzma natively from flash -device xz -options GEOM_UZIP -options ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\" - -# Used for the static uboot partition map -device geom_map - -# Options needed for the EEPROM based calibration/PCI configuration data. -options AR71XX_ATH_EEPROM # Fetch EEPROM/PCI config from flash -options ATH_EEPROM_FIRMWARE # Use EEPROM from flash -device firmware # Used by the above - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch diff --git a/sys/mips/conf/AP96.hints b/sys/mips/conf/AP96.hints deleted file mode 100644 index fe8f7236642..00000000000 --- a/sys/mips/conf/AP96.hints +++ /dev/null @@ -1,96 +0,0 @@ - -# arge0 MDIO bus - there's no arge1 MDIO bus for AR71xx -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 -# This creates an automatic mdioproxy0! - - -# The switch automatically probes off of mdio0, and will -# create an mdioproxy1. - -# TODO: RGMII -hint.arge.0.phymask=0x0 # Nothing attached here (XXX?) -hint.arge.0.media=1000 -hint.arge.0.fduplex=1 -hint.arge.0.miimode=3 # RGMII - -# TODO: RGMII -hint.arge.1.phymask=0x10 -# hint.arge.1.pll_1000 = 0x1f000000 -# For now, rendezouvs this on the arge0 mdiobus. -# Later, this will rendezvous via the AR8316 switch. -hint.arge.1.miimode=3 # RGMII -hint.arge.1.mdio=mdioproxy1 # off the switch mdiobus - -# AR8316 switch on MDIO0 -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=0 -hint.arswitch.0.numphys=4 -hint.arswitch.0.phy4cpu=1 -hint.arswitch.0.is_rgmii=1 -hint.arswitch.0.is_gmii=0 - -# ath0 - slot 17 -hint.pcib.0.bus.0.17.0.ath_fixup_addr=0x1fff1000 -hint.pcib.0.bus.0.17.0.ath_fixup_size=4096 - -# ath1 - slot 18 -hint.pcib.0.bus.0.18.0.ath_fixup_addr=0x1fff5000 -hint.pcib.0.bus.0.18.0.ath_fixup_size=4096 - -# .. and now, telling each ath(4) NIC where to find the firmware -# image. -hint.ath.0.eeprom_firmware="pcib.0.bus.0.17.0.eeprom_firmware" -hint.ath.1.eeprom_firmware="pcib.0.bus.0.18.0.eeprom_firmware" - -# The default flash layout: -# uboot: 192k -# env: 64k -# rootfs: 6144k -# uimage (kernel): 1728k -# caldata: 64k -# -# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init -# mtdparts=ar7100-nor0:192k(uboot),64k(env),6144k(rootfs),1728k(uImage),64k(caldata) mem=64M - -# -# We steal 64k from the end of rootfs to store the local config. - -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x000030000 -hint.map.0.name="uboot" -hint.map.0.readonly=1 - -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00030000 -hint.map.1.end=0x00040000 -hint.map.1.name="uboot-env" -hint.map.1.readonly=1 - -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00040000 -hint.map.2.end=0x00630000 -hint.map.2.name="rootfs" -hint.map.2.readonly=1 - -hint.map.3.at="flash/spi0" -hint.map.3.start=0x00630000 -hint.map.3.end=0x00640000 -hint.map.3.name="cfg" -hint.map.3.readonly=0 - -hint.map.4.at="flash/spi0" -hint.map.4.start=0x00640000 -hint.map.4.end=0x007f0000 -hint.map.4.name="kernel" -hint.map.4.readonly=1 - -hint.map.5.at="flash/spi0" -hint.map.5.start=0x007f0000 -hint.map.5.end=0x00800000 -hint.map.5.name="art" -hint.map.5.readonly=1 - diff --git a/sys/mips/conf/AR5312_BASE.hints b/sys/mips/conf/AR5312_BASE.hints deleted file mode 100644 index e22a170504e..00000000000 --- a/sys/mips/conf/AR5312_BASE.hints +++ /dev/null @@ -1,28 +0,0 @@ -hint.apb.0.at="nexus0" -hint.apb.0.irq=4 - -# uart0 -hint.uart.0.at="apb0" -# see atheros/uart_cpu_ar71xx.c why +3 -hint.uart.0.maddr=0x1C000003 -hint.uart.0.msize=0x20 -#hint.uart.0.irq=4 -#hint.uart.0.flags="0x30" - -# Watchdog -hint.ar5315_wdog.0.at="apb0" -hint.ar5315_wdog.0.irq=6 - -# Ethernet -hint.are.0.at="nexus0" -hint.are.0.maddr=0x18100000 -hint.are.0.msize=0x00100000 -hint.are.0.irq=1 - -hint.are.1.at="nexus0" -hint.are.1.maddr=0x18200000 -hint.are.1.msize=0x00100000 -hint.are.1.irq=2 - -# GEOM redboot FIS directory offset -#hint.redboot.0.fisoffset="0x007e0000" diff --git a/sys/mips/conf/AR5315_BASE.hints b/sys/mips/conf/AR5315_BASE.hints deleted file mode 100644 index 4fcdfcd155a..00000000000 --- a/sys/mips/conf/AR5315_BASE.hints +++ /dev/null @@ -1,33 +0,0 @@ -hint.apb.0.at="nexus0" -hint.apb.0.irq=0 - -# uart0 -hint.uart.0.at="apb0" -hint.uart.0.maddr=0x11100003 -hint.uart.0.msize=0x20 -#hint.uart.0.irq=0 -#hint.uart.0.flags="0x30" - -# Watchdog -hint.ar5315_wdog.0.at="apb0" -hint.ar5315_wdog.0.irq=7 - -# SPI -hint.spi.0.at="nexus0" -hint.spi.0.maddr=0x11300000 -hint.spi.0.msize=0x0000000c -#hint.spi.0.irq=2 - -# Ethernet -hint.are.0.at="nexus0" -hint.are.0.maddr=0x10500000 -hint.are.0.msize=0x500000 -hint.are.0.irq=2 - -# Flash -hint.mx25l.0.at="spibus0" -hint.mx25l.0.cs=0 - -# GEOM redboot FIS directory offset -#hint.redboot.0.fisoffset="0x007e0000" - diff --git a/sys/mips/conf/AR71XX_BASE b/sys/mips/conf/AR71XX_BASE deleted file mode 100644 index a14fdce1828..00000000000 --- a/sys/mips/conf/AR71XX_BASE +++ /dev/null @@ -1,66 +0,0 @@ -# -# AR71XX -- Kernel configuration file for FreeBSD/MIPS for Atheros 71xx systems -# -# This includes all the common drivers for the AR71XX boards along with -# the usb, net80211 and atheros driver code. -# -# - -machine mips mips -ident AR71XX_BASE -cpu CPU_MIPS24K -makeoptions KERNLOADADDR=0x80050000 -options HZ=1000 -options HWPMC_HOOKS - -files "../atheros/files.ar71xx" - -# For now, hints are per-board. - -hints "AR71XX_BASE.hints" - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols - -options DDB -options KDB - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -options INET6 # IPv6 -options TCP_HHOOK # hhook(9) framework for TCP - -# options NFSCL #Network Filesystem Client - -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions - -# options NFS_LEGACYRPC -# Debugging for use in -current -options INVARIANTS -options INVARIANT_SUPPORT -options WITNESS -options WITNESS_SKIPSPIN -options DEBUG_REDZONE -options DEBUG_MEMGUARD - -options FFS #Berkeley Fast Filesystem -# options SOFTUPDATES #Enable FFS soft updates support -# options UFS_ACL #Support for access control lists -# options UFS_DIRHASH #Improve performance on big directories -# options MSDOSFS # Read MSDOS filesystems; useful for USB/CF - -include "std.AR_MIPS_BASE" -makeoptions MODULES_OVERRIDE+="hwpmc_mips24k" - -device pci -device ar71xx_pci - -device usb -device ehci - -device scbus -device umass -device da - -device uart_ar71xx -device ar71xx_apb diff --git a/sys/mips/conf/AR71XX_BASE.hints b/sys/mips/conf/AR71XX_BASE.hints deleted file mode 100644 index c33b5c59998..00000000000 --- a/sys/mips/conf/AR71XX_BASE.hints +++ /dev/null @@ -1,65 +0,0 @@ -# -# -hint.apb.0.at="nexus0" -hint.apb.0.irq=4 - -# uart0 -hint.uart.0.at="apb0" -# see atheros/uart_cpu_ar71xx.c why +3 -hint.uart.0.maddr=0x18020003 -hint.uart.0.msize=0x18 -hint.uart.0.irq=3 - -#ohci -hint.ohci.0.at="apb0" -hint.ohci.0.maddr=0x1c000000 -hint.ohci.0.msize=0x01000000 -hint.ohci.0.irq=6 - -#ehci -hint.ehci.0.at="nexus0" -hint.ehci.0.maddr=0x1b000000 -hint.ehci.0.msize=0x01000000 -hint.ehci.0.irq=1 - -# pci -hint.pcib.0.at="nexus0" -hint.pcib.0.irq=0 - -hint.arge.0.at="nexus0" -hint.arge.0.maddr=0x19000000 -hint.arge.0.msize=0x1000 -hint.arge.0.irq=2 - -# phymask, media and fduplex depend upon the specific -# board. -# So each board will override the settings as needed. - -hint.arge.1.at="nexus0" -hint.arge.1.maddr=0x1a000000 -hint.arge.1.msize=0x1000 -hint.arge.1.irq=3 - -# SPI flash -hint.spi.0.at="nexus0" -hint.spi.0.maddr=0x1f000000 -hint.spi.0.msize=0x10 - -hint.mx25l.0.at="spibus0" -hint.mx25l.0.cs=0 - -# Watchdog -hint.ar71xx_wdog.0.at="nexus0" - -# GPIO -hint.gpio.0.at="apb0" -hint.gpio.0.maddr=0x18040000 -hint.gpio.0.msize=0x1000 -hint.gpio.0.irq=2 - -# Each board should override the GPIO bus pins with the configuration -# relevant to it. Thus no pins are defined here. - -# hwpmc device -hint.ar71xx_pmc.0.at="apb0" -hint.ar71xx_pmc.0.irq=5 diff --git a/sys/mips/conf/AR724X_BASE.hints b/sys/mips/conf/AR724X_BASE.hints deleted file mode 100644 index 00ef136ba25..00000000000 --- a/sys/mips/conf/AR724X_BASE.hints +++ /dev/null @@ -1,65 +0,0 @@ -# -# -hint.apb.0.at="nexus0" -hint.apb.0.irq=4 - -# uart0 -hint.uart.0.at="apb0" -# see atheros/uart_cpu_ar71xx.c why +3 -hint.uart.0.maddr=0x18020003 -hint.uart.0.msize=0x18 -hint.uart.0.irq=3 - -#ohci -hint.ohci.0.at="apb0" -hint.ohci.0.maddr=0x1c000000 -hint.ohci.0.msize=0x01000000 -hint.ohci.0.irq=6 - -#ehci -hint.ehci.0.at="nexus0" -hint.ehci.0.maddr=0x1b000100 -hint.ehci.0.msize=0x01000000 -hint.ehci.0.irq=1 - -# pci -hint.pcib.0.at="nexus0" -hint.pcib.0.irq=0 - -hint.arge.0.at="nexus0" -hint.arge.0.maddr=0x19000000 -hint.arge.0.msize=0x1000 -hint.arge.0.irq=2 - -# phymask, media and fduplex depend upon the specific -# board. -# So each board will override the settings as needed. - -hint.arge.1.at="nexus0" -hint.arge.1.maddr=0x1a000000 -hint.arge.1.msize=0x1000 -hint.arge.1.irq=3 - -# SPI flash -hint.spi.0.at="nexus0" -hint.spi.0.maddr=0x1f000000 -hint.spi.0.msize=0x10 - -hint.mx25l.0.at="spibus0" -hint.mx25l.0.cs=0 - -# Watchdog -hint.ar71xx_wdog.0.at="nexus0" - -# GPIO -hint.gpio.0.at="apb0" -hint.gpio.0.maddr=0x18040000 -hint.gpio.0.msize=0x1000 -hint.gpio.0.irq=2 - -# Each board should override the GPIO bus pins with the configuration -# relevant to it. Thus no pins are defined here. - -# hwpmc device -hint.ar71xx_pmc.0.at="apb0" -hint.ar71xx_pmc.0.irq=5 diff --git a/sys/mips/conf/AR91XX_BASE.hints b/sys/mips/conf/AR91XX_BASE.hints deleted file mode 100644 index 6c3f7a2da53..00000000000 --- a/sys/mips/conf/AR91XX_BASE.hints +++ /dev/null @@ -1,57 +0,0 @@ -# This file (and the kernel config file accompanying it) are not designed -# to be used by themselves. Instead, users of this file should create a -# kernel # config file which includes this file (which gets the basic hints), -# then override the default options (adding devices as needed) and adding -# hints as needed (for example, the GPIO and LAN PHY.) - -hint.apb.0.at="nexus0" -hint.apb.0.irq=4 - -# uart0 -hint.uart.0.at="apb0" -# see atheros/uart_cpu_ar71xx.c why +3 -hint.uart.0.maddr=0x18020003 -hint.uart.0.msize=0x18 -hint.uart.0.irq=3 - -#ehci - note the 0x100 offset for the AR913x/AR724x -hint.ehci.0.at="nexus0" -hint.ehci.0.maddr=0x1b000100 -hint.ehci.0.msize=0x00ffff00 -hint.ehci.0.irq=1 - -hint.arge.0.at="nexus0" -hint.arge.0.maddr=0x19000000 -hint.arge.0.msize=0x1000 -hint.arge.0.irq=2 - -hint.arge.1.at="nexus0" -hint.arge.1.maddr=0x1a000000 -hint.arge.1.msize=0x1000 -hint.arge.1.irq=3 - -# XXX The ath device hangs off of the AHB, rather than the Nexus. -hint.ath.0.at="nexus0" -hint.ath.0.maddr=0x180c0000 -hint.ath.0.msize=0x30000 -hint.ath.0.irq=0 -# Set this to define where the ath calibration data -# should be fetched from in physical memory. -# hint.ath.0.eepromaddr=0x1fff1000 - -# SPI flash -hint.spi.0.at="nexus0" -hint.spi.0.maddr=0x1f000000 -hint.spi.0.msize=0x10 - -hint.mx25l.0.at="spibus0" -hint.mx25l.0.cs=0 - -# Watchdog -hint.ar71xx_wdog.0.at="nexus0" - -# The GPIO function and pin mask is configured per-board -hint.gpio.0.at="apb0" -hint.gpio.0.maddr=0x18040000 -hint.gpio.0.msize=0x1000 -hint.gpio.0.irq=2 diff --git a/sys/mips/conf/AR933X_BASE.hints b/sys/mips/conf/AR933X_BASE.hints deleted file mode 100644 index cb8f7eb9173..00000000000 --- a/sys/mips/conf/AR933X_BASE.hints +++ /dev/null @@ -1,67 +0,0 @@ -# This file (and the kernel config file accompanying it) are not designed -# to be used by themselves. Instead, users of this file should create a -# kernel # config file which includes this file (which gets the basic hints), -# then override the default options (adding devices as needed) and adding -# hints as needed (for example, the GPIO and LAN PHY.) - -hint.apb.0.at="nexus0" -hint.apb.0.irq=4 - -# ART calibration data mapping device -hint.ar71xx_caldata.0.at="nexus0" -hint.ar71xx_caldata.0.order=0 - -# uart0 -hint.uart.0.at="apb0" -# NB: This isn't an ns8250 UART -hint.uart.0.maddr=0x18020000 -hint.uart.0.msize=0x18 -hint.uart.0.irq=3 - -#ehci - note the 0x100 offset for the AR913x/AR724x -hint.ehci.0.at="nexus0" -hint.ehci.0.maddr=0x1b000100 -hint.ehci.0.msize=0x00ffff00 -hint.ehci.0.irq=1 - -hint.arge.0.at="nexus0" -hint.arge.0.maddr=0x19000000 -hint.arge.0.msize=0x1000 -hint.arge.0.irq=2 - -hint.arge.1.at="nexus0" -hint.arge.1.maddr=0x1a000000 -hint.arge.1.msize=0x1000 -hint.arge.1.irq=3 - -# XXX The ath device hangs off of the AHB, rather than the Nexus. -hint.ath.0.at="nexus0" -hint.ath.0.maddr=0x18100000 -hint.ath.0.msize=0x20000 -hint.ath.0.irq=0 -hint.ath.0.vendor_id=0x168c -hint.ath.0.device_id=0x0035 - -# Where the ART is - last 64k in the first 8MB of flash -#hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000 -#hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384 - -# And now tell the ath(4) driver where to look! -#hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware" - -# SPI flash -hint.spi.0.at="nexus0" -hint.spi.0.maddr=0x1f000000 -hint.spi.0.msize=0x10 - -hint.mx25l.0.at="spibus0" -hint.mx25l.0.cs=0 - -# Watchdog -hint.ar71xx_wdog.0.at="nexus0" - -# The GPIO function and pin mask is configured per-board -hint.gpio.0.at="apb0" -hint.gpio.0.maddr=0x18040000 -hint.gpio.0.msize=0x1000 -hint.gpio.0.irq=2 diff --git a/sys/mips/conf/AR934X_BASE.hints b/sys/mips/conf/AR934X_BASE.hints deleted file mode 100644 index e5ea861a20d..00000000000 --- a/sys/mips/conf/AR934X_BASE.hints +++ /dev/null @@ -1,74 +0,0 @@ -# This file (and the kernel config file accompanying it) are not designed -# to be used by themselves. Instead, users of this file should create a -# kernel # config file which includes this file (which gets the basic hints), -# then override the default options (adding devices as needed) and adding -# hints as needed (for example, the GPIO and LAN PHY.) - -hint.apb.0.at="nexus0" -hint.apb.0.irq=4 - -# ART calibration data mapping device -hint.ar71xx_caldata.0.at="nexus0" -hint.ar71xx_caldata.0.order=0 - -# uart0 -hint.uart.0.at="apb0" -# NB: This isn't an ns8250 UART -hint.uart.0.maddr=0x18020003 -hint.uart.0.msize=0x18 -hint.uart.0.irq=3 - -#ehci - note the 0x100 offset for the AR913x/AR724x -hint.ehci.0.at="nexus0" -hint.ehci.0.maddr=0x1b000100 -hint.ehci.0.msize=0x00001000 -hint.ehci.0.irq=1 - -# pci -hint.pcib.0.at="nexus0" -hint.pcib.0.irq=0 - -hint.arge.0.at="nexus0" -hint.arge.0.maddr=0x19000000 -hint.arge.0.msize=0x1000 -hint.arge.0.irq=2 - -hint.arge.1.at="nexus0" -hint.arge.1.maddr=0x1a000000 -hint.arge.1.msize=0x1000 -hint.arge.1.irq=3 - -# XXX The ath device hangs off of the AHB, rather than the Nexus. -hint.ath.0.at="nexus0" -hint.ath.0.maddr=0x18100000 -hint.ath.0.msize=0x20000 -hint.ath.0.irq=0 -hint.ath.0.vendor_id=0x168c -hint.ath.0.device_id=0x0031 -# Set this to define where the ath calibration data -# should be fetched from in physical memory. -# hint.ath.0.eepromaddr=0x1fff1000 - -# Where the ART is - last 64k in the first 8MB of flash -#hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000 -#hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384 - -# And now tell the ath(4) driver where to look! -#hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware" - -# SPI flash -hint.spi.0.at="nexus0" -hint.spi.0.maddr=0x1f000000 -hint.spi.0.msize=0x10 - -hint.mx25l.0.at="spibus0" -hint.mx25l.0.cs=0 - -# Watchdog -hint.ar71xx_wdog.0.at="nexus0" - -# The GPIO function and pin mask is configured per-board -hint.gpio.0.at="apb0" -hint.gpio.0.maddr=0x18040000 -hint.gpio.0.msize=0x1000 -hint.gpio.0.irq=2 diff --git a/sys/mips/conf/BCM b/sys/mips/conf/BCM deleted file mode 100644 index d0d0ee3b01f..00000000000 --- a/sys/mips/conf/BCM +++ /dev/null @@ -1,109 +0,0 @@ -# -# -# The Broadcom 470x/471x/535x series of processors and boards is very commonly -# used in COTS hardware including the ASUS RT-N12, RT-N16, RT-N53. -# - -ident BCM -cpu CPU_MIPS74K - -hints "BCM.hints" -include "../broadcom/std.broadcom" - -# ships with cfe firmware -options CFE -device cfe - -options ALT_BREAK_TO_DEBUGGER -options BREAK_TO_DEBUGGER -options BOOTVERBOSE=0 - -makeoptions TRAMPLOADADDR=0x80800000 -makeoptions DEBUG="-g3" #Build kernel with gdb(1) debug symbols -makeoptions MODULES_OVERRIDE="" - -options DDB -options KDB - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -options TCP_HHOOK # hhook(9) framework for TCP -options NFSCL #Network Filesystem Client -#options NFS_ROOT #NFS usable as /, requires NFSCL -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions - -options FFS #Berkeley Fast Filesystem -options SOFTUPDATES #Enable FFS soft updates support -options UFS_ACL #Support for access control lists -options UFS_DIRHASH #Improve performance on big directories - -device xz -options GEOM_UZIP -options GEOM_LABEL # Providers labelization. -options ROOTDEVNAME=\"ufs:ufs/FBSD\" # assumes FW built by - # freebsd-build-wifi - -# Debugging for use in -current -#options DEADLKRES -options INVARIANTS -options INVARIANT_SUPPORT - -#options BHND_LOGLEVEL=BHND_DEBUG_LEVEL -#options BUS_DEBUG -#makeoptions BUS_DEBUG -options EARLY_PRINTF -#options VERBOSE_SYSINIT -#makeoptions VERBOSE_SYSINIT - -# bhnd(4) -device bhnd -device bcma # bcma backplane -device bcma_nexus - -device pci -device bhnd_pcib # PCIe-G1 core - -#device bgmac # Broadcom GMAC - not yet - -device gpio -device mdio - -#Flash -device spibus -device mx25l # Serial Flash -device cfi # Parallel Flash -device cfid - -#UART -device uart - -#Base -device loop -device ether -device md - -#Performance -#options HWPMC_HOOKS -#device hwpmc -#device hwpmc_mips74k - -#Ethernet -# device bfe # XXX will build both pci and siba -device miibus # attachments - -# pci devices - -# USB -options USB_DEBUG # enable debug msgs -# taken from atheros -options USB_EHCI_BIG_ENDIAN_DESC # handle big-endian byte order -options USB_HOST_ALIGN=32 # AR71XX (MIPS in general?) requires this - -device usb # USB Bus (required) -device ohci # OHCI interface -device ehci # EHCI interface (USB 2.0) - -device scbus -device umass -device da diff --git a/sys/mips/conf/BCM.hints b/sys/mips/conf/BCM.hints deleted file mode 100644 index f895d46203d..00000000000 --- a/sys/mips/conf/BCM.hints +++ /dev/null @@ -1,6 +0,0 @@ -hint.bhnd.0.at="nexus0" -hint.bhnd.0.maddr="0x18000000" -hint.bhnd.0.msize="0x00100000" - -# NVRAM via CFE -hint.bhnd_nvram.0.at="nexus0" diff --git a/sys/mips/conf/BERI_DE4.hints b/sys/mips/conf/BERI_DE4.hints deleted file mode 100644 index d37aeccb35c..00000000000 --- a/sys/mips/conf/BERI_DE4.hints +++ /dev/null @@ -1,25 +0,0 @@ - -# Hardwired location of bitfile -hint.map.0.at="cfid0s.fpga0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00c00000 -hint.map.0.name="fpga" - -# Kernel on the second chip -hint.map.1.at="cfid0s.os" -hint.map.1.start=0x007e0000 -hint.map.1.end=0x01fe0000 -hint.map.1.name="kernel" - -# Altera Triple-Speed Ethernet Mac, present in tPad and DE-4 configurations -# configured from fdt(4) but PHYs are still described in here. -# Currently configured for individual tse_mac cores. -hint.e1000phy.0.at="miibus0" -hint.e1000phy.0.phyno=0 -hint.e1000phy.1.at="miibus0" -hint.e1000phy.1.phyno=0 -hint.e1000phy.2.at="miibus0" -hint.e1000phy.2.phyno=0 -hint.e1000phy.3.at="miibus0" -hint.e1000phy.3.phyno=0 - diff --git a/sys/mips/conf/BERI_DE4_BASE b/sys/mips/conf/BERI_DE4_BASE deleted file mode 100644 index a6043f6122c..00000000000 --- a/sys/mips/conf/BERI_DE4_BASE +++ /dev/null @@ -1,59 +0,0 @@ -# -# BERI_DE4_BASE -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible RISC -# Implementation) FPGA soft core, as configured in its Terasic DE-4 reference -# configuration. This kernel configration must be further specialized to -# to include a root filesystem specification. -# -# - -#NO_UNIVERSE - -include "std.BERI" - -options NFSCL # Network Filesystem Client -options NFSLOCKD # Network Lock Manager -options NFS_ROOT # NFS usable as /, requires NFSCL - -options FDT -options FDT_DTB_STATIC -makeoptions FDT_DTS_FILE=beripad-de4.dts - -hints "BERI_DE4.hints" # Flash partitions still use hints. - -device altera_atse -device altera_avgen -device altera_jtag_uart -device altera_sdcard -device terasic_de4led -device terasic_mtl - -device bpf -device cfi -device cfid -options CFI_SUPPORT_STRATAFLASH -options ATSE_CFI_HACK -device vt -device kbdmux - -device uart - -device miibus -options DEVICE_POLLING - -# -# DMA support -# -options ALTERA_MSGDMA_DESC_PF_STD -device xdma -device altera_softdma -device altera_msgdma - -# -# USB support -# -#options USB_DEBUG -#options USB_REQ_DEBUG -#options USB_VERBOSE -device usb -device saf1761otg - diff --git a/sys/mips/conf/BERI_DE4_MDROOT b/sys/mips/conf/BERI_DE4_MDROOT deleted file mode 100644 index 33f10639627..00000000000 --- a/sys/mips/conf/BERI_DE4_MDROOT +++ /dev/null @@ -1,20 +0,0 @@ -# -# BERI_DE4_MDROOT -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible -# RISC # Implementation) FPGA soft core, as configured in its Terasic DE-4 -# reference configuration. -# -# - -#NO_UNIVERSE - -include "BERI_DE4_BASE" - -ident BERI_DE4_MDROOT - -# -# This kernel configuration uses an embedded 8MB memory root file system. -# Adjust the following path based on local requirements. -# -options MD_ROOT # MD is a potential root device -options MD_ROOT_SIZE=26112 # 25.5MB -options ROOTDEVNAME=\"ufs:md0\" diff --git a/sys/mips/conf/BERI_DE4_SDROOT b/sys/mips/conf/BERI_DE4_SDROOT deleted file mode 100644 index 0e407edaa5f..00000000000 --- a/sys/mips/conf/BERI_DE4_SDROOT +++ /dev/null @@ -1,15 +0,0 @@ -# -# BERI_DE4_SDROOT -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible -# RISC Implementation) FPGA soft core, as configured in its Terasic DE-4 -# reference configuration. -# -# - -include "BERI_DE4_BASE" - -ident BERI_DE4_SDROOT - -# -# This kernel expects to find its root filesystem on the SD Card. -# -options ROOTDEVNAME=\"ufs:/dev/altera_sdcard0\" diff --git a/sys/mips/conf/BERI_NETFPGA_MDROOT b/sys/mips/conf/BERI_NETFPGA_MDROOT deleted file mode 100644 index 753b09e5ad0..00000000000 --- a/sys/mips/conf/BERI_NETFPGA_MDROOT +++ /dev/null @@ -1,36 +0,0 @@ -# -# BERI_NETFPGA_MDROOT -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible -# RISC Implementation) FPGA soft core, as configured in its NetFPGA reference -# configuration. -# -# - -include "std.BERI" - -ident BERI_NETFPGA_MDROOT - -options HZ=100 - -options FDT -options FDT_DTB_STATIC -makeoptions FDT_DTS_FILE=beri-netfpga.dts - -#device uart -device altera_jtag_uart - -device bpf - -options DEVICE_POLLING -device netfpga10g_nf10bmac -options NF10BMAC_64BIT - -# -# This kernel configuration uses an embedded memory root file system. -# Adjust the following path and size based on local requirements. -# -options MD_ROOT # MD is a potential root device -options MD_ROOT_SIZE=26112 # 25.5MB -options ROOTDEVNAME=\"ufs:md0\" -#makeoptions MFS_IMAGE=/foo/baz/baz/mdroot.img - -# end diff --git a/sys/mips/conf/BERI_SIM_BASE b/sys/mips/conf/BERI_SIM_BASE deleted file mode 100644 index cd7edb9f73e..00000000000 --- a/sys/mips/conf/BERI_SIM_BASE +++ /dev/null @@ -1,20 +0,0 @@ -# -# BERI_SIM_BASE -- Base kernel for the SRI/Cambridge "BERI" (Bluespec -# Extensible RISC Implementation) FPGA soft core, as configured for -# simulation. -# -# - -#NO_UNIVERSE - -include "std.BERI" - -options FDT -options FDT_DTB_STATIC -makeoptions FDT_DTS_FILE=beri-sim.dts - -options ALTERA_SDCARD_FAST_SIM - -device altera_avgen -device altera_jtag_uart -device altera_sdcard diff --git a/sys/mips/conf/BERI_SIM_MDROOT b/sys/mips/conf/BERI_SIM_MDROOT deleted file mode 100644 index bd8a6ce6a9f..00000000000 --- a/sys/mips/conf/BERI_SIM_MDROOT +++ /dev/null @@ -1,19 +0,0 @@ -# -# BERI_SIM_MDROOT -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible -# RISC Implementation) FPGA soft core, as configured for simulation. -# -# - -#NO_UNIVERSE - -include "BERI_SIM_BASE" - -ident BERI_SIM_MDROOT - -# -# This kernel configuration uses an embedded memory root file system. -# Adjust the following path based on local requirements. -# -options MD_ROOT # MD is a potential root device -options MD_ROOT_SIZE=26112 # 25.5MB -options ROOTDEVNAME=\"ufs:md0\" diff --git a/sys/mips/conf/BERI_SIM_SDROOT b/sys/mips/conf/BERI_SIM_SDROOT deleted file mode 100644 index 6fc0086d83a..00000000000 --- a/sys/mips/conf/BERI_SIM_SDROOT +++ /dev/null @@ -1,16 +0,0 @@ -# -# BERI_SIM_SDROOT -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible -# RISC Implementation) FPGA soft core, as configured for simulation. -# -# - -#NO_UNIVERSE - -include "BERI_SIM_BASE" - -ident BERI_SIM_SDROOT - -# -# This kernel expects to find its root filesystem on the SD Card. -# -options ROOTDEVNAME=\"ufs:/dev/altera_sdcard0\" diff --git a/sys/mips/conf/BERI_SIM_VIRTIO b/sys/mips/conf/BERI_SIM_VIRTIO deleted file mode 100644 index 875a35ae07e..00000000000 --- a/sys/mips/conf/BERI_SIM_VIRTIO +++ /dev/null @@ -1,21 +0,0 @@ -# -# BERI_SIM_VIRTIO -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible -# RISC Implementation) FPGA soft core, as configured for simulation. -# -# - -#NO_UNIVERSE - -include "BERI_SIM_BASE" - -ident BERI_SIM_VIRTIO - -device virtio -device virtio_blk -device virtio_mmio -device altera_pio - -# -# This kernel expects to find its root filesystem on the SD Card. -# -options ROOTDEVNAME=\"ufs:/dev/vtbd0\" diff --git a/sys/mips/conf/BERI_SOCKIT b/sys/mips/conf/BERI_SOCKIT deleted file mode 100644 index 31eb30567fd..00000000000 --- a/sys/mips/conf/BERI_SOCKIT +++ /dev/null @@ -1,25 +0,0 @@ -# -# BERI_SOCKIT -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible -# RISC Implementation) FPGA soft core, as configured in its Terasic SoCKit -# reference configuration. This kernel configration must be further -# specialized to include a root filesystem specification. -# -# - -include "std.BERI" - -ident BERI_SOCKIT - -options ROOTDEVNAME=\"ufs:vtbd0\" - -device altera_pio -device altera_jtag_uart - -device virtio -device virtio_blk -device vtnet -device virtio_mmio - -options FDT -options FDT_DTB_STATIC -makeoptions FDT_DTS_FILE=beripad-sockit.dts diff --git a/sys/mips/conf/BERI_TPAD.hints b/sys/mips/conf/BERI_TPAD.hints deleted file mode 100644 index d6f5a077517..00000000000 --- a/sys/mips/conf/BERI_TPAD.hints +++ /dev/null @@ -1,50 +0,0 @@ - -# -# Altera JTAG UARTs configured for console, debugging, and data putput on the -# Terasic tPad. -# -hint.altera_jtag_uart.0.at="nexus0" -hint.altera_jtag_uart.0.maddr=0x7f000000 -hint.altera_jtag_uart.0.msize=0x40 -hint.altera_jtag_uart.0.irq=0 - -hint.altera_jtag_uart.1.at="nexus0" -hint.altera_jtag_uart.1.maddr=0x7f001000 -hint.altera_jtag_uart.1.msize=0x40 - -hint.altera_jtag_uart.2.at="nexus0" -hint.altera_jtag_uart.2.maddr=0x7f002000 -hint.altera_jtag_uart.2.msize=0x40 - -# -# Expose the tPad touchscreen device via an Avalon "generic" device. Observe -# that this is a portion of DRAM, so some care may be required in how memory -# is exposed to FreeBSD to avoid use of that DRAM for both the touch screen -# and FreeBSD use. -# -# Two separate devices are used here because alignment/width requirements for -# I/O differ: the frame buffer accepts 16-bit I/O, and the touch input device -# requires 32-bit I/O. -# -hint.altera_avgen.0.at="nexus0" -hint.altera_avgen.0.maddr=0x04000000 -hint.altera_avgen.0.msize=0x01000000 -hint.altera_avgen.0.width=2 -hint.altera_avgen.0.fileio="rw" -hint.altera_avgen.0.mmapio="rw" -hint.altera_avgen.0.devname="display" - -hint.altera_avgen.1.at="nexus0" -hint.altera_avgen.1.maddr=0x05000000 -hint.altera_avgen.1.msize=0x00000020 -hint.altera_avgen.1.width=4 -hint.altera_avgen.1.fileio="rw" -hint.altera_avgen.1.mmapio="rw" -hint.altera_avgen.1.devname="touch" - -# -# On-board DE4 and tPad SD Card IP core -# -hint.altera_sdcardc.0.at="nexus0" -hint.altera_sdcardc.0.maddr=0x7f008000 -hint.altera_sdcardc.0.msize=0x400 diff --git a/sys/mips/conf/CANNA b/sys/mips/conf/CANNA deleted file mode 100644 index a52223d2778..00000000000 --- a/sys/mips/conf/CANNA +++ /dev/null @@ -1,32 +0,0 @@ -# CANNA -- Kernel config for Ingenic CANNA board -# - -#NO_UNIVERSE - -include "X1000" -ident CANNA - -options FDT_DTB_STATIC -makeoptions FDT_DTS_FILE=ingenic/canna.dts - -#options KTR -#options KTR_CPUMASK=0x3 -#options KTR_MASK=(KTR_GEN) -#options KTR_COMPILE=(KTR_GEN) -#options KTR_VERBOSE - -# Uncomment for NFS root -#options BOOTP -#options BOOTP_NFSROOT -#options BOOTP_NFSV3 -#options BOOTP_WIRED_TO=dme0 -#options BOOTP_COMPAT -options ROOTDEVNAME=\"ufs:mmcsd0s3\" - -makeoptions TRAMPLOADADDR=0x88000000 - -device sound -device xdma - -#options VERBOSE_SYSINIT -options PRINTF_BUFR_SIZE=256 diff --git a/sys/mips/conf/CARAMBOLA2 b/sys/mips/conf/CARAMBOLA2 deleted file mode 100644 index b5c1b144560..00000000000 --- a/sys/mips/conf/CARAMBOLA2 +++ /dev/null @@ -1,57 +0,0 @@ -# -# Carambola 2 - an AR933x based SoC wifi device. -# -# http://shop.8devices.com/wifi4things/carambola2 -# -# * AR9330 SoC -# * 64MB RAM -# * 16MB flash -# * Integrated 1x1 2GHz wifi and 10/100 bridge -# -# - -#NO_UNIVERSE - -# Include the default AR933x parameters -include "std.AR933X" - -ident CARAMBOLA2 - -# Override hints with board values -hints "CARAMBOLA2.hints" - -# Board memory - 64MB -options AR71XX_REALMEM=(64*1024*1024) - -options EARLY_PRINTF - -# i2c GPIO bus -#device gpioiic -#device iicbb -#device iicbus -#device iic - -# Options required for miiproxy and mdiobus -options ARGE_DEBUG -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# read MSDOS formatted disks - USB -#options MSDOSFS - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# uzip - to boot natively from flash -device xz -options GEOM_UZIP - -# Used for the static uboot partition map -device geom_map - -# Boot off of the rootfs, as defined in the geom_map setup. -options ROOTDEVNAME=\"ufs:map/rootfs.uzip\" diff --git a/sys/mips/conf/CARAMBOLA2.hints b/sys/mips/conf/CARAMBOLA2.hints deleted file mode 100644 index dd46fcab4bf..00000000000 --- a/sys/mips/conf/CARAMBOLA2.hints +++ /dev/null @@ -1,106 +0,0 @@ -# -# This file adds to the values in AR91XX_BASE.hints. -# - -# mdiobus on arge1 -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x1a000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# Embedded Atheros Switch -hint.arswitch.0.at="mdio0" - -# XXX this should really say it's an AR933x switch, as there -# are some vlan specific differences here! -hint.arswitch.0.is_7240=1 -hint.arswitch.0.numphys=4 -hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY -hint.arswitch.0.is_rgmii=0 -hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII - -# arge0 - MII, autoneg, phy(4) -hint.arge.0.phymask=0x10 # PHY4 -hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus -hint.arge.0.eeprommac=0x1fff0000 - -# arge1 - GMII, 1000/full -hint.arge.1.phymask=0x0 # No directly mapped PHYs -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 -hint.arge.1.eeprommac=0x1fff0006 - - -# ART calibration data mapping -hint.ar71xx_caldata.0.at="nexus0" -hint.ar71xx_caldata.0.order=0 -# Where the ART is - last 64k in the first 8MB of flash -hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000 -hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384 - -# And now tell the ath(4) driver where to look! -hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware" - -# The AP121 16MB flash layout: -# -# [ 0.700000] 0x000000000000-0x000000040000 : "u-boot" -# [ 0.710000] 0x000000040000-0x000000050000 : "u-boot-env" -# [ 0.710000] 0x000000050000-0x000000250000 : "kernel" -# [ 0.720000] 0x000000250000-0x000000fe0000 : "rootfs" -# [ 0.720000] mtd: partition "rootfs" set to be root filesystem -# [ 0.730000] mtd: partition "rootfs_data" created automatically, ofs=480000, len=B60000 -# [ 0.740000] 0x000000480000-0x000000fe0000 : "rootfs_data" -# [ 0.740000] 0x000000fe0000-0x000000ff0000 : "nvram" -# [ 0.750000] 0x000000ff0000-0x000001000000 : "art" -# [ 0.750000] 0x000000050000-0x000000fe0000 : "firmware" - -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x000040000 -hint.map.0.name="uboot" -hint.map.0.readonly=1 - -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end=0x00050000 -hint.map.1.name="uboot-env" -hint.map.1.readonly=0 - -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00050000 -hint.map.2.end="search:0x00050000:0x10000:.!/bin/sh" -hint.map.2.name="kernel" -hint.map.2.readonly=0 - -hint.map.3.at="flash/spi0" -hint.map.3.start="search:0x00050000:0x10000:.!/bin/sh" -hint.map.3.end=0x00fe0000 -hint.map.3.name="rootfs" -hint.map.3.readonly=0 - -hint.map.4.at="flash/spi0" -hint.map.4.start=0x00fe0000 -hint.map.4.end=0x00ff0000 -hint.map.4.name="cfg" -hint.map.4.readonly=0 - -# This is radio calibration section. It is (or should be!) unique -# for each board, to take into account thermal and electrical differences -# as well as the regulatory compliance data. -# -hint.map.5.at="flash/spi0" -hint.map.5.start=0x00ff0000 -hint.map.5.end=0x01000000 -hint.map.5.name="art" -hint.map.5.readonly=1 - -# GPIO specific configuration block - -# Don't flip on anything that isn't already enabled. -# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're -# not used here. -hint.gpio.0.function_set=0x00000000 -hint.gpio.0.function_clear=0x00000000 - -# These are the GPIO LEDs and buttons which can be software controlled. -hint.gpio.0.pinmask=0x00fc1803 diff --git a/sys/mips/conf/CI20 b/sys/mips/conf/CI20 deleted file mode 100644 index b0d8a3d0bc0..00000000000 --- a/sys/mips/conf/CI20 +++ /dev/null @@ -1,35 +0,0 @@ -# CI20 -- Kernel config for Creator CI20 board -# - -#NO_UNIVERSE - -# Note: SMP on 32-bit mips is no longer supported, which affects this config file. - -include "JZ4780" -ident CI20 - -options FDT_DTB_STATIC -makeoptions FDT_DTS_FILE=ingenic/ci20.dts - -#options KTR -#options KTR_CPUMASK=0x3 -#options KTR_MASK=(KTR_GEN) -#options KTR_COMPILE=(KTR_GEN) -#options KTR_VERBOSE - -# Uncomment for NFS root -#options BOOTP -#options BOOTP_NFSROOT -#options BOOTP_NFSV3 -#options BOOTP_WIRED_TO=dme0 -#options BOOTP_COMPAT - -options ROOTDEVNAME=\"ufs:mmcsd0\" - -device sound -device xdma - -makeoptions TRAMPLOADADDR=0x88000000 - -#options VERBOSE_SYSINIT -options PRINTF_BUFR_SIZE=256 diff --git a/sys/mips/conf/DB120 b/sys/mips/conf/DB120 deleted file mode 100644 index 6970d412f20..00000000000 --- a/sys/mips/conf/DB120 +++ /dev/null @@ -1,52 +0,0 @@ -# -# DB120 - the AR9344 SoC reference design -# -# - -# Include the default AR934x parameters -include "std.AR934X" - -#NO_UNIVERSE - -ident DB120 - -# Override hints with board values -hints "DB120.hints" - -# Force the board memory - the base DB120 has 128MB RAM -options AR71XX_REALMEM=(128*1024*1024) - -# i2c GPIO bus -#device gpioiic -#device iicbb -#device iicbus -#device iic - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# read MSDOS formatted disks - USB -#options MSDOSFS - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# uzip - to boot natively from flash -device xz -options GEOM_UZIP - -# Used for the static uboot partition map -device geom_map - -# yes, this board has a PCI connected atheros device -options AR71XX_ATH_EEPROM -device firmware # Used by the above -options ATH_EEPROM_FIRMWARE - -# Boot off of the rootfs, as defined in the geom_map setup. -options ROOTDEVNAME=\"ufs:map/rootfs.uzip\" diff --git a/sys/mips/conf/DB120.hints b/sys/mips/conf/DB120.hints deleted file mode 100644 index 5c740fb5d47..00000000000 --- a/sys/mips/conf/DB120.hints +++ /dev/null @@ -1,161 +0,0 @@ - -# This is a placeholder until the hardware support is complete. - -# mdiobus0 on arge0 -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# DB120 GMAC configuration -# + AR934X_ETH_CFG_RGMII_GMAC0 (1 << 0) -# + AR934X_ETH_CFG_SW_ONLY_MODE (1 << 6) -hint.ar934x_gmac.0.gmac_cfg=0x41 - -# GMAC0 here - connected to an AR8327 -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=0 -hint.arswitch.0.is_9340=0 # not the internal switch! -hint.arswitch.0.numphys=5 -hint.arswitch.0.phy4cpu=0 -hint.arswitch.0.is_rgmii=1 -hint.arswitch.0.is_gmii=0 - -# Other AR8327 configuration parameters - -# AR8327_PAD_MAC_RGMII -hint.arswitch.0.pad.0.mode=6 -hint.arswitch.0.pad.0.txclk_delay_en=1 -hint.arswitch.0.pad.0.rxclk_delay_en=1 -# AR8327_CLK_DELAY_SEL1 -hint.arswitch.0.pad.0.txclk_delay_sel=1 -# AR8327_CLK_DELAY_SEL2 -hint.arswitch.0.pad.0.rxclk_delay_sel=2 - -# XXX there's no LED management just yet! -hint.arswitch.0.led.ctrl0=0x00000000 -hint.arswitch.0.led.ctrl1=0xc737c737 -hint.arswitch.0.led.ctrl2=0x00000000 -hint.arswitch.0.led.ctrl3=0x00c30c00 -hint.arswitch.0.led.open_drain=1 - -# force_link=1 is required for the rest of the parameters -# to be configured. -hint.arswitch.0.port.0.force_link=1 -hint.arswitch.0.port.0.speed=1000 -hint.arswitch.0.port.0.duplex=1 -hint.arswitch.0.port.0.txpause=1 -hint.arswitch.0.port.0.rxpause=1 - -# XXX OpenWRT DB120 BSP doesn't have media/duplex set? -hint.arge.0.phymask=0x0 -hint.arge.0.media=1000 -hint.arge.0.fduplex=1 -hint.arge.0.miimode=3 # RGMII -hint.arge.0.pll_1000=0x06000000 - -# MAC for arge0 is the first 6 bytes of the ART -hint.arge.0.eeprommac=0x1f7f0000 - -# mdiobus1 on arge1 -hint.argemdio.1.at="nexus0" -hint.argemdio.1.maddr=0x1a000000 -hint.argemdio.1.msize=0x1000 -hint.argemdio.1.order=0 - -# Embedded switch on the AR9344 -# mdio1 is actually created as the AR8327 internal bus; so -# this pops up as mdio2. -hint.arswitch.1.at="mdio2" -hint.arswitch.1.is_7240=0 -hint.arswitch.1.is_9340=1 -hint.arswitch.1.numphys=5 -hint.arswitch.1.phy4cpu=0 # phy 4 is not a "CPU port" PHY here -hint.arswitch.1.is_rgmii=0 -hint.arswitch.1.is_gmii=1 # arge1 <-> switch PHY is GMII - -# arge1 - lock up to 1000/full -hint.arge.1.phymask=0x0 # Nothing attached here (XXX?) -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 -hint.arge.1.miimode=1 # GMII - -# MAC for arge1 is the second 6 bytes of the ART -hint.arge.1.eeprommac=0x1f7f0006 - -# ART calibration data mapping - for the AR934x AHB device -hint.ar71xx_caldata.0.at="nexus0" -hint.ar71xx_caldata.0.order=0 -# Where the ART is - last 64k in the first 8MB of flash -hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000 -hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384 - -# And now tell the ath(4) driver where to look! -hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware" - -# ath1: it's different; it's a PCIe attached device, so -# we instead need to teach the PCIe bridge code about it -# (ie, the 'early pci fixup' stuff that programs the PCIe -# host registers on the NIC) and then we teach ath where -# to find it. - -# ath1 hint - pcie slot 0 -hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff4000 -hint.pcib.0.bus.0.0.0.ath_fixup_size=16384 - -# ath0 - eeprom comes from here -hint.ath.1.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware" - -# flash layout: -# -# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),64k(mib0),64k(ART) - -# 256KiB u-boot -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00040000 # 256k u-boot -hint.map.0.name="u-boot" -hint.map.0.readonly=1 - -# 64KiB u-boot-env -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end=0x00050000 # 64k u-boot-env -hint.map.1.name="u-boot-env" -hint.map.1.readonly=1 - -# 6336KiB rootfs + 1344KiB uImage; turn into a single long -# combo image for FreeBSD. - -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00050000 -hint.map.2.end="search:0x00050000:0x10000:.!/bin/sh" -hint.map.2.name="kernel" -hint.map.2.readonly=0 - -hint.map.3.at="flash/spi0" -hint.map.3.start="search:0x00050000:0x10000:.!/bin/sh" -hint.map.3.end=0x007d0000 -hint.map.3.name="rootfs" -hint.map.3.readonly=0 - -# 64KiB cfg -hint.map.4.at="flash/spi0" -hint.map.4.start=0x007d0000 -hint.map.4.end=0x007e0000 -hint.map.4.name="cfg" -hint.map.4.readonly=0 - -# 64KiB mib0 -hint.map.5.at="flash/spi0" -hint.map.5.start=0x007e0000 -hint.map.5.end=0x007f0000 # 64k mib0 -hint.map.5.name="mib0" -hint.map.5.readonly=1 - -# 64KiB ART -hint.map.6.at="flash/spi0" -hint.map.6.start=0x007f0000 -hint.map.6.end=0x00800000 # 64k ART -hint.map.6.name="ART" -hint.map.6.readonly=1 diff --git a/sys/mips/conf/DEFAULTS b/sys/mips/conf/DEFAULTS deleted file mode 100644 index 3d1b4279ed3..00000000000 --- a/sys/mips/conf/DEFAULTS +++ /dev/null @@ -1,10 +0,0 @@ -# -# DEFAULTS -- Default kernel configuration file for FreeBSD/mips -# - -device mem - -device uart_ns8250 - -options GEOM_PART_BSD -options GEOM_PART_MBR diff --git a/sys/mips/conf/DIR-655A1 b/sys/mips/conf/DIR-655A1 deleted file mode 100644 index e10189d937c..00000000000 --- a/sys/mips/conf/DIR-655A1 +++ /dev/null @@ -1,57 +0,0 @@ -# -# DIR-655A1 - 3x3 2GHz D-Link AP -# -# This contains a QCA9558 MIPS74k SoC with on-board 3x3 2GHz wifi, -# 128MiB RAM, an AR8327 5-port gigabit ethernet switch. -# -# - -#NO_UNIVERSE - -# Include the default QCA955x parameters -include "std.QCA955X" - -ident DIR-655A1 - -# Override hints with board values -hints "DIR-655A1.hints" - -# Force the board memory - the base AP135 has 128MB RAM -options AR71XX_REALMEM=(128*1024*1024) - -# i2c GPIO bus -#device gpioiic -#device iicbb -#device iicbus -#device iic - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# read MSDOS formatted disks - USB -#options MSDOSFS - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# uzip - to boot natively from flash -device xz -options GEOM_UZIP - -# Used for the static uboot partition map -device geom_map - -options AR71XX_ATH_EEPROM -device firmware # Used by the above -options ATH_EEPROM_FIRMWARE - -# Boot off of the rootfs, as defined in the geom_map setup. -options ROOTDEVNAME=\"ufs:map/rootfs.uzip\" - -# Default to accept -options IPFIREWALL_DEFAULT_TO_ACCEPT diff --git a/sys/mips/conf/DIR-655A1.hints b/sys/mips/conf/DIR-655A1.hints deleted file mode 100644 index c907bca0cae..00000000000 --- a/sys/mips/conf/DIR-655A1.hints +++ /dev/null @@ -1,177 +0,0 @@ - -# I'm assuming this is an AP135-020. The AP136-010 in openwrt has -# the ethernet ports wired up to the switch in the reverse way. - -# QCA955X_ETH_CFG_RGMII_EN (1 << 0) -hint.qca955x_gmac.0.gmac_cfg=0x1 - -# Use this to derive ath0 from arge0 MAC address. -# 0x1ffe0004 is the arge0 MAC; but it's also the "unit MAC". -# So make that the ath0 MAC, and make arge0 -1 from that. -# ath0: offset 0 -# arge0: offset -1 -# arge1: use +1 from the arge0 MAC, even though -# there's a secondary MAC address configured in EEPROM -# at 0x1ffe0018. -hint.ar71xx.0.eeprom_mac_addr=0x1ffe0004 -hint.ar71xx.0.eeprom_mac_isascii=1 - -hint.ar71xx_mac_map.0.devid=ath -hint.ar71xx_mac_map.0.unitid=0 -hint.ar71xx_mac_map.0.offset=0 -hint.ar71xx_mac_map.0.is_local=0 - -hint.ar71xx_mac_map.1.devid=arge -hint.ar71xx_mac_map.1.unitid=0 -hint.ar71xx_mac_map.1.offset=-1 -hint.ar71xx_mac_map.1.is_local=0 - -hint.ar71xx_mac_map.2.devid=arge -hint.ar71xx_mac_map.2.unitid=1 -hint.ar71xx_mac_map.2.offset=1 -hint.ar71xx_mac_map.2.is_local=0 - -# mdiobus0 on arge0 -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# mdiobus1 on arge1 - required to bring up arge1? -hint.argemdio.1.at="nexus0" -hint.argemdio.1.maddr=0x1a000000 -hint.argemdio.1.msize=0x1000 -hint.argemdio.1.order=0 - -# AR8327 - connected via mdiobus0 on arge0 -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=0 # definitely not the internal switch! -hint.arswitch.0.is_9340=0 # not the internal switch! -hint.arswitch.0.numphys=5 # all ports are PHYs -hint.arswitch.0.phy4cpu=0 -hint.arswitch.0.is_rgmii=0 # not needed -hint.arswitch.0.is_gmii=0 # not needed - -# This is where it gets a bit odd. port 0 and port 6 are CPU ports. -# The current code only supports one CPU port. So hm, what should -# we do to hook PAD6 up to be RGMII but a PHY, not a MAC? - -# The other trick - how do we get arge1 (hooked up to GMAC0) to work? -# That's currently supposed to be hooked up to CPU port 0. - -# Other AR8327 configuration parameters - -# AP136-020 parameters - -# GMAC0 AR8327 -> GMAC1 (arge1) SoC, SGMII - -# AR8327_PAD_MAC_SGMII -hint.arswitch.0.pad.0.mode=3 -#hint.arswitch.0.pad.0.rxclk_delay_sel=0 -hint.arswitch.0.pad.0.sgmii_delay_en=1 - -# GMAC6 AR8327 -> GMAC0 (arge0) SoC, RGMII - -# AR8327_PAD_MAC_RGMII -# XXX I think this hooks it up to the internal MAC6 -hint.arswitch.0.pad.6.mode=6 -hint.arswitch.0.pad.6.txclk_delay_en=1 -hint.arswitch.0.pad.6.rxclk_delay_en=1 -# AR8327_CLK_DELAY_SEL1 -hint.arswitch.0.pad.6.txclk_delay_sel=1 -# AR8327_CLK_DELAY_SEL2 -hint.arswitch.0.pad.6.rxclk_delay_sel=2 - -# XXX there's no LED management just yet! -hint.arswitch.0.led.ctrl0=0x00000000 -hint.arswitch.0.led.ctrl1=0xc737c737 -hint.arswitch.0.led.ctrl2=0x00000000 -hint.arswitch.0.led.ctrl3=0x00c30c00 -hint.arswitch.0.led.open_drain=1 - -# force_link=1 is required for the rest of the parameters -# to be configured. -hint.arswitch.0.port.0.force_link=1 -hint.arswitch.0.port.0.speed=1000 -hint.arswitch.0.port.0.duplex=1 -hint.arswitch.0.port.0.txpause=1 -hint.arswitch.0.port.0.rxpause=1 - -# force_link=1 is required for the rest of the parameters -# to be configured. -hint.arswitch.0.port.6.force_link=1 -hint.arswitch.0.port.6.speed=1000 -hint.arswitch.0.port.6.duplex=1 -hint.arswitch.0.port.6.txpause=1 -hint.arswitch.0.port.6.rxpause=1 - -# arge0 - hooked up to AR8327 GMAC6, RGMII -# set at 1000/full to the switch. -# so, lock both sides of this connect up to 1000/full; -# if_arge thus wont change the PLL configuration -# upon a link status change. -hint.arge.0.phymask=0x0 -hint.arge.0.miimode=3 # RGMII -hint.arge.0.media=1000 -hint.arge.0.fduplex=1 -hint.arge.0.pll_1000=0x56000000 -# hint.arge.0.eeprommac=0x1ffe0004 -# hint.arge.0.readascii=1 - -# arge1 - lock up to 1000/full -hint.arge.1.phymask=0x0 -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 -hint.arge.1.miimode=5 # SGMII -hint.arge.1.pll_1000=0x03000101 -#hint.arge.1.eeprommac=0x1ffe0018 -#hint.arge.1.readascii=1 - -# ath0: Where the ART is - last 64k in the flash -# Note: ath0 MAC is default (00:11:22:33:44:55) and thus -# requires replacing via the board MAC address map. -hint.ath.0.eepromaddr=0x1fff0000 -hint.ath.0.eepromsize=16384 - -# 256KiB u-boot -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00040000 # 256k u-boot -hint.map.0.name="u-boot" -hint.map.0.readonly=1 - -# kernel -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end="search:0x00040000:0x10000:.!/bin/sh" -hint.map.1.name="kernel" -hint.map.1.readonly=1 - -# rootfs -hint.map.2.at="flash/spi0" -hint.map.2.start="search:0x00040000:0x10000:.!/bin/sh" -hint.map.2.end=0x007d0000 -hint.map.2.name="rootfs" -hint.map.2.readonly=1 - -# 64KiB cfg -hint.map.3.at="flash/spi0" -hint.map.3.start=0x007d0000 -hint.map.3.end=0x007e0000 -hint.map.3.name="cfg" -hint.map.3.readonly=0 - -# 8256 KiB mib0 -hint.map.4.at="flash/spi0" -hint.map.4.start=0x007e0000 -hint.map.4.end=0x00ff0000 # 64k mib0 -hint.map.4.name="mib0" -hint.map.4.readonly=1 - -# 64KiB ART -# XXX TODO: is this really here? -hint.map.5.at="flash/spi0" -hint.map.5.start=0x00ff0000 -hint.map.5.end=0x01000000 # 64k ART -hint.map.5.name="ART" -hint.map.5.readonly=1 diff --git a/sys/mips/conf/DIR-825B1 b/sys/mips/conf/DIR-825B1 deleted file mode 100644 index e8184fe72e8..00000000000 --- a/sys/mips/conf/DIR-825B1 +++ /dev/null @@ -1,63 +0,0 @@ -# -# Specific board setup for the D-Link DIR-825B1 router. -# -# The DIR-825B1 has the following hardware: -# -# + AR7161 CPU SoC -# + AR9223 2.4GHz 11n -# + AR9220 5GHz 11n -# + RealTek RTL8366S Gigabit switch -# + m25p64 based 8MB flash -# + 64MB RAM -# + uboot environment - -#NO_UNIVERSE - -include "AR71XX_BASE" -ident "DIR-825B1" -hints "DIR-825B1.hints" - -# Since the kernel image must fit inside 1024KiB, we have to build almost -# everything as modules. -nodevice gpio -nodevice gpioled -nodevice gif -nodevice gre -nodevice if_bridge -nodevice usb -nodevice ehci -nodevice wlan -nodevice wlan_xauth -nodevice wlan_acl -nodevice wlan_wep -nodevice wlan_tkip -nodevice wlan_ccmp -nodevice wlan_rssadapt -nodevice wlan_amrr -nodevice ath -nodevice ath_pci -nodevice ath_hal -nodevice umass -nodevice ath_rate_sample - -nooptions INET6 - -# GEOM modules -device geom_map # to get access to the SPI flash partitions -device xz -options GEOM_UZIP -options GEOM_PART_GPT - -options ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\" -options AR71XX_REALMEM=64*1024*1024 - -options AR71XX_ENV_UBOOT - -# options MSDOSFS # Read MSDOS filesystems; useful for USB/CF - -# options MD_ROOT -# options MD_ROOT_SIZE="6144" - -options AR71XX_ATH_EEPROM # Fetch EEPROM/PCI config from flash -options ATH_EEPROM_FIRMWARE # Use EEPROM from flash -device firmware # Used by the above diff --git a/sys/mips/conf/DIR-825B1.hints b/sys/mips/conf/DIR-825B1.hints deleted file mode 100644 index 56a39361876..00000000000 --- a/sys/mips/conf/DIR-825B1.hints +++ /dev/null @@ -1,139 +0,0 @@ - -# arge0 is connected to the LAN side of the switch PHY. -# arge1 is connected to the single port WAN side of the switch PHY. - -hint.arge.0.phymask=0x0 -hint.arge.0.media=1000 -hint.arge.0.fduplex=1 -hint.arge.0.eeprommac=0x1f66ffa0 -hint.arge.0.readascii=1 - -hint.arge.1.phymask=0x0 -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 -hint.arge.1.eeprommac=0x1f66ffb4 -hint.arge.1.readascii=1 - -# ath0 - slot 17 -hint.pcib.0.bus.0.17.0.ath_fixup_addr=0x1f661000 -hint.pcib.0.bus.0.17.0.ath_fixup_size=4096 - -# ath1 - slot 18 -hint.pcib.0.bus.0.18.0.ath_fixup_addr=0x1f665000 -hint.pcib.0.bus.0.18.0.ath_fixup_size=4096 - -# .. and now, telling each ath(4) NIC where to find the firmware -# image. -hint.ath.0.eeprom_firmware="pcib.0.bus.0.17.0.eeprom_firmware" -hint.ath.1.eeprom_firmware="pcib.0.bus.0.18.0.eeprom_firmware" - -# Geom MAP - -# The DIR-825B1 has an 8MB flash part - HOWEVER, the 64k caldata isn't -# at the end of the flash. It's ~ 6MB into the flash image. - -# mtdparts=ar7100-nor0:256k(uboot),64k(Config),1024k(vmlinux),5184k(rootfs), -# 64k(caldata) - -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x000040000 -hint.map.0.name="uboot" -hint.map.0.readonly=1 - -# This config partition is the D-Link specific configuration area. -# I'm re-purposing it for FreeBSD. -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end=0x00050000 -hint.map.1.name="cfg" -hint.map.1.readonly=0 - -hint.map.2.at="flash/spi0" -hint.map.2.start=0x0050000 -hint.map.2.end="search:0x00050000:0x10000:.!/bin/sh" -hint.map.2.name="kernel" -hint.map.2.readonly=1 - -hint.map.3.at="flash/spi0" -hint.map.3.start="search:0x00050000:0x10000:.!/bin/sh" -hint.map.3.end=0x00660000 -hint.map.3.name="rootfs" -hint.map.3.readonly=0 - -hint.map.4.at="flash/spi0" -hint.map.4.start=0x00660000 -hint.map.4.end=0x00670000 -hint.map.4.name="art" -hint.map.4.readonly=1 - -# GPIO specific configuration block - -# Don't flip on anything that isn't already enabled. -# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're -# not used here. -hint.gpio.0.function_set=0x00000000 - -hint.gpio.0.function_clear=0x00000000 - -# These are the GPIO LEDs and buttons which can be software controlled. -hint.gpio.0.pinmask=0x000009ff - -# Pin 1 - USB (LED blue) --> works -# Pin 2 - Power (LED orange) --> works -# Pin 3 - Power (LED blue) --> works -# Pin 4 - Button (RESET) --> works -# Pin 5 - WPS (LED blue) --> works -# Pin 6 - RTL8366RB switch data line -# Pin 7 - Planet (LED orange)--> works -# Pin 8 - RTL8366RB switch clock line -# Pin 9 - Button (WPS) --> works after set to high -# Pin 10 - N/C -# Pin 11 - N/C -# Pin 12 - Planet (LED blue) --> works - -# LEDs are configured separately and driven by the LED device -# usb tested good -hint.gpioled.0.at="gpiobus0" -hint.gpioled.0.name="usb-blue" -hint.gpioled.0.pins=0x0001 - -# no orange power led? -hint.gpioled.1.at="gpiobus0" -hint.gpioled.1.name="power-orange" -hint.gpioled.1.pins=0x0002 - -# blue power tested good -hint.gpioled.2.at="gpiobus0" -hint.gpioled.2.name="power-blue" -hint.gpioled.2.pins=0x0004 - -# wps tested good -hint.gpioled.3.at="gpiobus0" -hint.gpioled.3.name="wps-blue" -hint.gpioled.3.pins=0x0010 - -# orage globe tested good -hint.gpioled.4.at="gpiobus0" -hint.gpioled.4.name="planet-orange" -hint.gpioled.4.pins=0x0040 - -# no blue planet LED on this unit -hint.gpioled.5.at="gpiobus0" -hint.gpioled.5.name="planet-blue" -hint.gpioled.5.pins=0x0800 - -# GPIO I2C bus -hint.gpioiic.0.at="gpiobus0" -hint.gpioiic.0.pins=0x00a0 -hint.gpioiic.0.sda=0 -hint.gpioiic.0.scl=1 - -# I2C bus -# Don't be strict about I2C protocol - the relaxed semantics are required -# by the realtek switch PHY. -hint.iicbus.0.strict=0 - -# Bit bang bus - override default delay -#hint.iicbb.0.udelay=3 - diff --git a/sys/mips/conf/DIR-825C1 b/sys/mips/conf/DIR-825C1 deleted file mode 100644 index 9c7b4f04001..00000000000 --- a/sys/mips/conf/DIR-825C1 +++ /dev/null @@ -1,56 +0,0 @@ -# -# Specific board setup for the D-Link DIR-825C1 router. -# -# The DIR-825C1 has the following hardware: -# -# + AR9344 CPU SoC 74k MIPS -# + ARxxx 2.4GHz 11n -# + ARXXX 5GHz 11n -# + AR8327 Gigabit switch -# + m25p80 based 16MB flash -# + 128MB RAM -# + uboot environment - -#NO_UNIVERSE - -# Include the default AR934x parameters -include "std.AR934X" -ident DIR825C1 - -# Override hints with board values -hints "DIR-825C1.hints" - -# Force the board memory - the base DB120 has 128MB RAM -options AR71XX_REALMEM=(128*1024*1024) - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# read MSDOS formatted disks - USB -options MSDOSFS - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# Used for the static uboot partition map -device geom_map - -# uzip - to boot natively from flash -options GEOM_UZIP -options GEOM_PART_GPT -device xz - -# Boot off of the rootfs, as defined in the geom_map setup. -options ROOTDEVNAME=\"ufs:map/rootfs.uzip\" - -# In order to netboot, you have to build the mfsroot into the kernel -# 19443712 or 19M is the biggest rootfs via netboot this thing supports -#options MD_ROOT # md device usable as a potential root device -#options MD_ROOT_SIZE=19444 -#makeoptions MFS_IMAGE=/tftpboot/mfsroot-dir825c1.img.ulzma -#options ROOTDEVNAME=\"ufs:md0.uzip\" diff --git a/sys/mips/conf/DIR-825C1.hints b/sys/mips/conf/DIR-825C1.hints deleted file mode 100644 index e15a2698656..00000000000 --- a/sys/mips/conf/DIR-825C1.hints +++ /dev/null @@ -1,156 +0,0 @@ - -# mdiobus0 on arge0 -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# 0x1ffe0004 is the "unit MAC". -# 0x1ffe0018 is the second "MAC". -# Right now this doesn't have any option for more than one -# "unit MACs", so: -# ath0: unit MAC -# ath1: unit MAC + 1 -# arge0: unit MAC + 2 -# arge1: leave as default; not used. -hint.ar71xx.0.eeprom_mac_addr=0x1ffe0004 -hint.ar71xx.0.eeprom_mac_isascii=1 - -hint.ar71xx_mac_map.0.devid=ath -hint.ar71xx_mac_map.0.unitid=0 -hint.ar71xx_mac_map.0.offset=0 -hint.ar71xx_mac_map.0.is_local=0 - -hint.ar71xx_mac_map.1.devid=ath -hint.ar71xx_mac_map.1.unitid=1 -hint.ar71xx_mac_map.1.offset=1 -hint.ar71xx_mac_map.1.is_local=0 - -hint.ar71xx_mac_map.2.devid=arge -hint.ar71xx_mac_map.2.unitid=0 -hint.ar71xx_mac_map.2.offset=2 -hint.ar71xx_mac_map.2.is_local=0 - -# DIR-825C1 GMAC configuration -# + AR934X_ETH_CFG_RGMII_GMAC0 (1 << 0) -# Onboard AR9344 10/100 switch is not wired up -hint.ar934x_gmac.0.gmac_cfg=0x1 - -# GMAC0 here - connected to an AR8327 -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=0 -hint.arswitch.0.is_9340=0 # not the internal switch! -hint.arswitch.0.numphys=5 -hint.arswitch.0.phy4cpu=0 -hint.arswitch.0.is_rgmii=1 -hint.arswitch.0.is_gmii=0 - -# Other AR8327 configuration parameters - -# AR8327_PAD_MAC_RGMII -hint.arswitch.0.pad.0.mode=6 -hint.arswitch.0.pad.0.txclk_delay_en=1 -hint.arswitch.0.pad.0.rxclk_delay_en=1 - -# AR8327_CLK_DELAY_SEL1 -hint.arswitch.0.pad.0.txclk_delay_sel=1 -# AR8327_CLK_DELAY_SEL2 -hint.arswitch.0.pad.0.rxclk_delay_sel=2 - -# XXX there's no LED management just yet! -hint.arswitch.0.led.ctrl0=0x00000000 -hint.arswitch.0.led.ctrl1=0xc737c737 -hint.arswitch.0.led.ctrl2=0x00000000 -hint.arswitch.0.led.ctrl3=0x00c30c00 -hint.arswitch.0.led.open_drain=1 - -# force_link=1 is required for the rest of the parameters -# to be configured. -hint.arswitch.0.port.0.force_link=1 -hint.arswitch.0.port.0.speed=1000 -hint.arswitch.0.port.0.duplex=1 -hint.arswitch.0.port.0.txpause=1 -hint.arswitch.0.port.0.rxpause=1 - -# XXX OpenWRT DB120 BSP doesn't have media/duplex set? -hint.arge.0.phymask=0x0 -hint.arge.0.media=1000 -hint.arge.0.fduplex=1 -hint.arge.0.miimode=3 # RGMII -hint.arge.0.pll_1000=0x06000000 - -# Where the ART is - last 64k in the first 8MB of flash -hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000 -hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384 - -# And now tell the ath(4) driver where to look! -hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware" - -# ath1: it's different; it's a PCIe attached device, so -# we instead need to teach the PCIe bridge code about it -# (ie, the 'early pci fixup' stuff that programs the PCIe -# host registers on the NIC) and then we teach ath where -# to find it. - -# ath1 hint - pcie slot 0 -hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff4000 -hint.pcib.0.bus.0.0.0.ath_fixup_size=16384 - -# ath0 - eeprom comes from here -hint.ath.1.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware" - -# flash layout: -# m25p80 spi0.0: mx25l12805d (16384 Kbytes) -# -# uBoot firmware variables: -# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init -# mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),64k(mib0),64k(ART) - -# 64KiB u-boot -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00010000 -hint.map.0.name="u-boot" -hint.map.0.readonly=1 - -# 64KiB u-boot-env -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00010000 -hint.map.1.end=0x00020000 -hint.map.1.name="u-boot-env" -hint.map.1.readonly=1 - -# 1344KiB kernel -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00020000 -hint.map.2.end="search:0x00020000:0x10000:.!/bin/sh" -hint.map.2.name="kernel" -hint.map.2.readonly=1 - -# 14592KiB rootfs -hint.map.3.at="flash/spi0" -hint.map.3.start="search:0x00020000:0x10000:.!/bin/sh" -hint.map.3.end=0x00fb0000 -hint.map.3.name="rootfs" -hint.map.3.readonly=1 - -# 192KiB lang -- remapped to cfg -hint.map.4.at="flash/spi0" -hint.map.4.start=0x00fb0000 -hint.map.4.end=0x00fe0000 -hint.map.4.name="cfg" -hint.map.4.readonly=0 - -# 64KiB mac -hint.map.5.at="flash/spi0" -hint.map.5.start=0x00fe0000 -hint.map.5.end=0x00ff0000 -hint.map.5.name="mac" -hint.map.5.readonly=1 - -# 64KiB art -hint.map.6.at="flash/spi0" -hint.map.6.start=0x00ff0000 -hint.map.6.end=0x01000000 -hint.map.6.name="art" -hint.map.6.readonly=1 diff --git a/sys/mips/conf/ENH200 b/sys/mips/conf/ENH200 deleted file mode 100644 index b168c565403..00000000000 --- a/sys/mips/conf/ENH200 +++ /dev/null @@ -1,44 +0,0 @@ -# -# Specific board setup for the Engenius ENH-200 802.11bgn mesh node. -# -# The Engenius ENH-200 has the following hardware: -# -# + AR7240 CPU SoC -# + AR9285 Wifi -# + Integrated switch -# + 8MB flash -# + 32MB RAM -# + uboot environment - -#NO_UNIVERSE - -include "std.AR724X" -ident "ENH200" -hints "ENH200.hints" - -options AR71XX_REALMEM=32*1024*1024 - -options AR71XX_ENV_UBOOT - -# For DOS - enable if required -options MSDOSFS - -# uncompress - to boot read-only lzma natively from flash -device xz -options GEOM_UZIP -options ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\" - -# Used for the static uboot partition map -device geom_map - -# Options needed for the EEPROM based calibration/PCI configuration data. -options AR71XX_ATH_EEPROM # Fetch EEPROM/PCI config from flash -options ATH_EEPROM_FIRMWARE # Use EEPROM from flash -device firmware # Used by the above - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch diff --git a/sys/mips/conf/ENH200.hints b/sys/mips/conf/ENH200.hints deleted file mode 100644 index 317e9bb39ff..00000000000 --- a/sys/mips/conf/ENH200.hints +++ /dev/null @@ -1,123 +0,0 @@ - -# arge0 MDIO bus -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# arge1 MDIO bus doesn't exist on the AR7240 - -# arge0: MII; dedicated PHY 4 on switch, connected via internal switch -# MDIO bus. - -# hint.arge.0.eeprommac=0x83fe9ff0 -hint.arge.0.phymask=0x10 # PHY 4 -# hint.arge.0.miimode=2 # MII -hint.arge.0.mdio=mdioproxy1 # Hanging off the arswitch MDIO bus - -# arge1: connected to the LAN switch MAC, at 1000BaseTX / GMII. -hint.arge.1.phymask=0x0 -# hint.arge.1.miimode=1 # GMII -hint.arge.1.media=1000 # Force to 1000BaseTX/full -hint.arge.1.fduplex=1 - -# -# AR7240 switch config -# -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=1 # We need to be explicitly told this -hint.arswitch.0.numphys=4 # 4 active switch PHYs (PHY 0 -> 3) -hint.arswitch.0.phy4cpu=1 # Yes, PHY 4 == dedicated PHY -hint.arswitch.0.is_rgmii=0 # No, not RGMII -hint.arswitch.0.is_gmii=0 # No, not GMII - -# ath0 hint - pcie slot 0 -hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff1000 -hint.pcib.0.bus.0.0.0.ath_fixup_size=4096 - -# ath0 - eeprom comes from here -hint.ath.0.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware" - -# Signal leds -hint.gpioled.0.at="gpiobus0" -hint.gpioled.0.name="sig1" -hint.gpioled.0.pins=0x0001 # pin 0 -hint.gpioled.1.at="gpiobus0" -hint.gpioled.1.name="sig2" -hint.gpioled.1.pins=0x0002 # pin 1 -hint.gpioled.2.at="gpiobus0" -hint.gpioled.2.name="sig3" -hint.gpioled.2.pins=0x0800 # pin 11 -hint.gpioled.3.at="gpiobus0" -hint.gpioled.3.name="sig4" -hint.gpioled.3.pins=0x0080 # pin 7 - -# nvram mapping - XXX ? -#hint.nvram.0.base=0x1f030000 -#hint.nvram.0.maxsize=0x2000 -#hint.nvram.0.flags=3 # 1 = No check, 2 = Format Generic -#hint.nvram.1.base=0x1f032000 -#hint.nvram.1.maxsize=0x4000 -#hint.nvram.1.flags=3 # 1 = No check, 2 = Format Generic - -# GEOM_MAP -# -# The default bootargs: -# -# bootargs=console=ttyS0,115200 root=31:04 rootfstype=squashfs init=/etc/preinit mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),320k(custom),1024k(kernel),4928k(rootfs),1536k(failsafe),64k(ART) board=ENH200 -# -# However there's not a lot of space in this image layout. -# -# Thus, an alternate layout will be used, complete with reconfiguring -# uboot to use the new base address. -# -# 256k - uboot (0x000000 -> 0x040000) -# 64k - uboot-env (0x040000 -> 0x050000) -# 1728k - kernel (0x050000 -> 0x200000) -# 6016k - rootfs (0x200000 -> 0x7e0000) -# 64k - config (0x7e0000 -> 0x7f0000) -# 64k - ART (0x7f0000 -> 0x800000) -# -# For this, the 'bootcmd' environment variable needs to be -# changed to point to the new location: -# -# ar7240> setenv bootcmd 'bootm 0x9f050000' - -# uboot (256k) -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00040000 -hint.map.0.name="uboot" -hint.map.0.readonly=1 - -# uboot-env (64k) -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end=0x00050000 -hint.map.1.name="uboot-env" -hint.map.1.readonly=1 - -# kernel (1728k) -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00050000 -hint.map.2.end=0x00200000 -hint.map.2.name="kernel" - -# rootfs (6016k) -hint.map.3.at="flash/spi0" -hint.map.3.start=0x00200000 -hint.map.3.end=0x007e0000 -hint.map.3.name="rootfs" - -# config (64k) -hint.map.4.at="flash/spi0" -hint.map.4.start=0x007e0000 -hint.map.4.end=0x007f0000 -hint.map.4.name="cfg" - -# ART (64k) -hint.map.5.at="flash/spi0" -hint.map.5.start=0x007f0000 -hint.map.5.end=0x00800000 -hint.map.5.name="ART" -hint.map.5.readonly=1 diff --git a/sys/mips/conf/ERL b/sys/mips/conf/ERL deleted file mode 100644 index fa468ae1a1a..00000000000 --- a/sys/mips/conf/ERL +++ /dev/null @@ -1,217 +0,0 @@ -# -# ERL - EdgeRouter Lite kernel config -# Based on configuration from http://rtfm.net/FreeBSD/ERL -# -# For more information on this file, please read the config(5) manual page, -# and/or the handbook section on Kernel Configuration Files: -# -# https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config -# -# The handbook is also available locally in /usr/share/doc/handbook -# if you've installed the doc distribution, otherwise always see the -# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the -# latest information. -# -# An exhaustive list of options and more detailed explanations of the -# device lines is also present in the ../../conf/NOTES and NOTES files. -# If you are in doubt as to the purpose or necessity of a line, check first -# in NOTES. -# - -ident ERL - -makeoptions ARCH_FLAGS="-march=octeon+" -makeoptions LDSCRIPT_NAME=ldscript.mips.octeon1 - -makeoptions KERNLOADADDR=0xffffffff80100000 - -# We don't need to build a trampolined version of the kernel. -makeoptions WITHOUT_KERNEL_TRAMPOLINE=1 - -include "../cavium/std.octeon1" - -hints "OCTEON1.hints" #Default places to look for devices. - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols - -# Board-specific support that cannot be auto-detected at runtime. -#options OCTEON_VENDOR_LANNER # Support for Lanner boards. -#options OCTEON_VENDOR_RADISYS # Support for Radisys boards. -options OCTEON_VENDOR_UBIQUITI # Support for Ubiquiti boards. -#options OCTEON_VENDOR_GEFES # Support for GE LANIC boards -#options OCTEON_BOARD_CAPK_0100ND # Support for CAPK-0100nd. - -# Compile for a specified Octeon model. If not specified, support for -# detection at runtime will be used instead, which may give inferior -# performance. -# -# See sys/contrib/octeon-sdk/octeon-model.h for possible values. -options OCTEON_MODEL=OCTEON_CN50XX_PASS1 - -options SCHED_ULE # ULE scheduler -options PREEMPTION # Enable kernel thread preemption -options INET # InterNETworking -options INET6 # IPv6 communications protocols -options IPSEC # IP (v4/v6) security -options TCP_HHOOK # hhook(9) framework for TCP -options SCTP_SUPPORT # Allow kldload of SCTP -options FFS # Berkeley Fast Filesystem -options SOFTUPDATES # Enable FFS soft updates support -options UFS_ACL # Support for access control lists -options UFS_DIRHASH # Improve performance on big directories -options UFS_GJOURNAL # Enable gjournal-based UFS journaling -options MD_ROOT # MD is a potential root device -options NFSCL # Network Filesystem Client -options NFSD # Network Filesystem Server -options NFSLOCKD # Network Lock Manager -options NFS_ROOT # NFS usable as /, requires NFSCL -options MSDOSFS # MSDOS Filesystem -options CD9660 # ISO 9660 Filesystem -options PROCFS # Process filesystem (requires PSEUDOFS) -options PSEUDOFS # Pseudo-filesystem framework -options GEOM_PART_GPT # GUID Partition Tables. -options GEOM_LABEL # Provides labelization -options COMPAT_FREEBSD32 # Compatible with o32 binaries -options COMPAT_FREEBSD10 # Compatible with FreeBSD10 -options COMPAT_FREEBSD11 # Compatible with FreeBSD11 -options COMPAT_FREEBSD12 # Compatible with FreeBSD12 -options SCSI_DELAY=5000 # Delay (in ms) before probing SCSI -options KTRACE # ktrace(1) support -options STACK # stack(9) support -options SYSVSHM # SYSV-style shared memory -options SYSVMSG # SYSV-style message queues -options SYSVSEM # SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions -options PRINTF_BUFR_SIZE=128 # Prevent printf output being interspersed. -options HWPMC_HOOKS # Necessary kernel hooks for hwpmc(4) -options AUDIT # Security event auditing -options MAC # TrustedBSD MAC Framework -options KDTRACE_FRAME # Ensure frames are compiled in -options KDTRACE_HOOKS # Kernel DTrace hooks -options DDB_CTF # Kernel ELF linker loads CTF data -options INCLUDE_CONFIG_FILE # Include this file in kernel -options TMPFS # Temporary file system -options CAPABILITY_MODE # Capsicum capability mode -options CAPABILITIES # Capsicum capabilities - -# Debugging for use in -current -#options KDB # Enable kernel debugger support. -options DDB # Support DDB. -#options GDB # Support remote GDB. -#options DEADLKRES # Enable the deadlock resolver -#options INVARIANTS # Enable calls of extra sanity checking -#options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS -#options WITNESS # Enable checks to detect deadlocks and cycles -#options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed -#options MALLOC_DEBUG_MAXZONES=8 # Separate malloc(9) zones - -# Make an SMP-capable kernel by default -options SMP # Symmetric MultiProcessor Kernel - -options ROOTDEVNAME=\"ufs:da0s2a\" # Default root filesystem. - -# ATA/SCSI peripherals -device scbus # SCSI bus (required for ATA/SCSI) -device ch # SCSI media changers -device da # Direct Access (disks) -device sa # Sequential Access (tape etc) -device cd # CD -device pass # Passthrough device (direct ATA/SCSI access) -device ses # Enclosure Services (SES and SAF-TE) - -# Serial (COM) ports -device uart # Generic UART driver - -# On-board Cavium Octeon Ethernet. -# NOTE: Be sure to keep the 'device miibus' line in order to use these NICs! -device octe - -# Cavium Octeon management Ethernet. -device octm - -# Switch PHY support for the octe driver. These currently present a VLAN per -# physical port, but may eventually provide support for DSA or similar instead. -#device mv88e61xxphy # Marvell 88E61XX - -# Wireless NIC cards -device wlan # 802.11 support -options IEEE80211_DEBUG # enable debug msgs -options IEEE80211_SUPPORT_MESH # enable 802.11s draft support -device wlan_wep # 802.11 WEP support -device wlan_ccmp # 802.11 CCMP support -device wlan_tkip # 802.11 TKIP support -device wlan_amrr # AMRR transmit rate control algorithm -#device ath # Atheros NIC's -#device ath_pci # Atheros pci/cardbus glue -#device ath_hal # pci/cardbus chip support -#device ath_rate_sample # SampleRate tx rate control for ath - -# Pseudo devices. -device loop # Network loopback -device ether # Ethernet support -device vlan # 802.1Q VLAN support -device tuntap # Packet tunnel. -device md # Memory "disks" -device gif # IPv6 and IPv4 tunneling -device firmware # firmware assist module - -# The `bpf' device enables the Berkeley Packet Filter. -# Be aware of the administrative consequences of enabling this! -# Note that 'bpf' is required for DHCP. -device bpf # Berkeley packet filter - -# Hardware watchdog support. -#device octeon_wdog # Octeon hardware watchdog - -# USB support -options USB_DEBUG # enable debug msgs -device octusb # Cavium Octeon on-board USB interface (USB 2.0) -device uhci # UHCI PCI->USB interface -device ohci # OHCI PCI->USB interface -device ehci # EHCI PCI->USB interface (USB 2.0) -device usb # USB Bus (required) -#device udbp # USB Double Bulk Pipe devices -device uhid # "Human Interface Devices" -device ulpt # Printer -device umass # Disks/Mass storage - Requires scbus and da -device ums # Mouse -device urio # Diamond Rio 500 MP3 player -# USB Serial devices -device u3g # USB-based 3G modems (Option, Huawei, Sierra) -device uark # Technologies ARK3116 based serial adapters -device ubsa # Belkin F5U103 and compatible serial adapters -device uftdi # For FTDI usb serial adapters -device uipaq # Some WinCE based devices -device uplcom # Prolific PL-2303 serial adapters -device uslcom # SI Labs CP2101/CP2102 serial adapters -device uvisor # Visor and Palm devices -device uvscom # USB serial support for DDI pocket's PHS -# USB Ethernet, requires miibus -device miibus # MII bus support -device aue # ADMtek USB Ethernet -device axe # ASIX Electronics USB Ethernet -device cdce # Generic USB over Ethernet -device cue # CATC USB Ethernet -device kue # Kawasaki LSI USB Ethernet -device rue # RealTek RTL8150 USB Ethernet -device udav # Davicom DM9601E USB -# USB Wireless -device rum # Ralink Technology RT2501USB wireless NICs -device uath # Atheros AR5523 wireless NICs -device ural # Ralink Technology RT2500USB wireless NICs -device zyd # ZyDAS zd1211/zd1211b wireless NICs - -# crypto subsystem -device crypto # core crypto support (required for IPSEC) -device cryptodev # /dev/crypto for access to h/w -device cryptocteon # Octeon coprocessor 2 crypto offload - -# GPIO support -#device gpio - -# PMC support -#device hwpmc - -# HID support -options HID_DEBUG # enable debug msgs -device hid # Generic HID support diff --git a/sys/mips/conf/JZ4780 b/sys/mips/conf/JZ4780 deleted file mode 100644 index 742982ada3a..00000000000 --- a/sys/mips/conf/JZ4780 +++ /dev/null @@ -1,115 +0,0 @@ -# JZ4780 -- Kernel config for Ingenic JZ47XX boards -# - -#NO_UNIVERSE - -# Note: SMP on 32-bit mips is no longer supported, which affects this config file. - -ident JZ4780 -machine mips mipselhf -cpu CPU_XBURST -cpu CPU_MIPS4KC - -makeoptions KERNLOADADDR=0x80020000 -makeoptions ARCH_FLAGS="-march=mips32r2" - -# Don't build any modules yet. -makeoptions MODULES_OVERRIDE="" - -files "../ingenic/files.jz4780" -hints "JZ4780.hints" #Default places to look for devices. - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols - -options INTRNG # Borrow interrupt code from ARM -options MIPS_NIRQ=264 # 8 cpuintc + 64 intc + 6 * 23 gpio - -options DDB -options KDB -options BREAK_TO_DEBUGGER - -options COMPAT_FREEBSD10 -options COMPAT_FREEBSD11 -options COMPAT_FREEBSD12 - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -options NFSCL #Network Filesystem Client -options NFS_ROOT #NFS usable as /, requires NFSCL -options NFSLOCKD #Network Lock Manager -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions - -options FFS #Berkeley Fast Filesystem -options SOFTUPDATES #Enable FFS soft updates support -options UFS_ACL #Support for access control lists -options UFS_DIRHASH #Improve performance on big directories -#options ROOTDEVNAME=\"ufs:ada0\" - -options GEOM_LABEL # Provides labelization -options GEOM_PART_GPT # GUID Partition Tables. -#options GEOM_RAID # Soft RAID functionality. - -# Debugging for use in -current -#options DEADLKRES #Enable the deadlock resolver -options INVARIANTS #Enable calls of extra sanity checking -options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS -#options WITNESS #Enable checks to detect deadlocks and cycles -#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed - -# Make an SMP-capable kernel by default -options SMP # Symmetric MultiProcessor Kernel - -device loop -device ether -#device le -device miibus -device bpf -device md -device uart - -device fdt_pinctrl - -device clk -device regulator - -device gpio - -device scbus -device da - -device mmc -device mmcsd - -device dme - -device iic -device iicbus - -# Framebuffer console support -device vt -device kbdmux -device hdmi -device videomode -device pty - -# USB support -options USB_DEBUG # enable debug msgs -options USB_HOST_ALIGN=128 # L2 cache line size -device ohci # OHCI PCI->USB interface -device ehci # EHCI PCI->USB interface (USB 2.0) -device dwcotg # DesignWare HS OTG controller -device usb # USB Bus (required) -#device udbp # USB Double Bulk Pipe devices -device uhid # "Human Interface Devices" -device ukbd # Allow keyboard like HIDs to control console -#device ulpt # Printer -device umass # Disks/Mass storage - Requires scbus and da -device ums # Mouse - -# HID support -options HID_DEBUG # enable debug msgs -device hid # Generic HID support - -# FDT support -options FDT diff --git a/sys/mips/conf/JZ4780.hints b/sys/mips/conf/JZ4780.hints deleted file mode 100644 index 37d477c6b68..00000000000 --- a/sys/mips/conf/JZ4780.hints +++ /dev/null @@ -1 +0,0 @@ -# device.hints diff --git a/sys/mips/conf/MALTA b/sys/mips/conf/MALTA deleted file mode 100644 index f831c582cfa..00000000000 --- a/sys/mips/conf/MALTA +++ /dev/null @@ -1,10 +0,0 @@ -# MALTA -- Kernel config for MALTA endian-big boards -# - -ident MALTA - -include "std.MALTA" - -machine mips mips - -makeoptions KERNLOADADDR=0x80100000 diff --git a/sys/mips/conf/MALTA.hints b/sys/mips/conf/MALTA.hints deleted file mode 100644 index 42f93b99d54..00000000000 --- a/sys/mips/conf/MALTA.hints +++ /dev/null @@ -1,4 +0,0 @@ -# device.hints -# hint.uart.0.at="nexus" -# hint.uart.0.maddr="0x180003f8" -# hint.uart.0.flags="0x90" diff --git a/sys/mips/conf/MALTA64 b/sys/mips/conf/MALTA64 deleted file mode 100644 index 20f41fa961d..00000000000 --- a/sys/mips/conf/MALTA64 +++ /dev/null @@ -1,12 +0,0 @@ -# MALTA64 -- 64-bit kernel config for MALTA endian-big boards -# - -ident MALTA64 - -include "std.MALTA" - -machine mips mips64 - -makeoptions KERNLOADADDR=0xffffffff80100000 - -options COMPAT_FREEBSD32 # Compatible with o32 binaries diff --git a/sys/mips/conf/MALTA64EL b/sys/mips/conf/MALTA64EL deleted file mode 100644 index 16808ddb2d5..00000000000 --- a/sys/mips/conf/MALTA64EL +++ /dev/null @@ -1,10 +0,0 @@ -# MALTA64 -- 64-bit kernel config for MALTA endian-little boards -# - -ident MALTA64 - -include "std.MALTA" - -machine mips mips64el - -makeoptions KERNLOADADDR=0xffffffff80100000 diff --git a/sys/mips/conf/MALTAEL b/sys/mips/conf/MALTAEL deleted file mode 100644 index a0f353a3b08..00000000000 --- a/sys/mips/conf/MALTAEL +++ /dev/null @@ -1,10 +0,0 @@ -# MALTA -- Kernel config for MALTA endian-little boards -# - -ident MALTA - -include "std.MALTA" - -machine mips mipsel - -makeoptions KERNLOADADDR=0x80100000 diff --git a/sys/mips/conf/MT7620.hints b/sys/mips/conf/MT7620.hints deleted file mode 100644 index accb20fb72e..00000000000 --- a/sys/mips/conf/MT7620.hints +++ /dev/null @@ -1,142 +0,0 @@ -# device.hints -hint.obio.0.at="nexus0" -hint.obio.0.maddr=0x10000000 -hint.obio.0.msize=0x10000000 - -hint.pcib.0.at="nexus0" -hint.pcib.0.maddr=0x10140000 -hint.pcib.0.msize=0x30000 - -hint.mx25l.0.at="spibus0" - -#hint.nvram.0.sig=0xe5e60a74 -#hint.nvram.0.base=0x1f030000 -#hint.nvram.0.maxsize=0x2000 -#hint.nvram.0.flags=3 # 1 = No check, 2 = Format Generic -#hint.nvram.1.sig=0x5a045e94 -#hint.nvram.1.base=0x1f032000 -#hint.nvram.1.maxsize=0x4000 -#hint.nvram.1.flags=3 # 1 = No check, 2 = Format Generic - -# on-board Ralink Frame Engine -hint.rt.0.at="nexus0" -hint.rt.0.maddr=0x10100000 -hint.rt.0.msize=0x10000 -hint.rt.0.irq=3 -# macaddr can be statically set -#hint.rt.0.macaddr="xx:xx:xx:xx:xx:xx" - -# on-board Ralink 2872 802.11n core -hint.rt2860.0.at="nexus0" -hint.rt2860.0.maddr=0x10180000 -hint.rt2860.0.msize=0x40000 -hint.rt2860.0.irq=4 - -# uart0 -#hint.uart.0.at="obio0" -#hint.uart.0.maddr=0x10000C00 -#hint.uart.0.msize=0x100 -#hint.uart.0.irq=12 -#hint.uart.0.flags="0x30" - -# uart1 -#hint.uart.1.at="obio0" -#hint.uart.1.maddr=0x10000500 -#hint.uart.1.msize=0x100 -#hint.uart.1.irq=5 -#hint.uart.1.flags="0x30" - - -# gpio -# GPIO0 - WPS BTN IN II IO -#hint.gpiobutton.0.at="gpiobus0" -#hint.gpiobutton.0.pins="0x01" -#hint.gpiobutton.0.name="wps" -#hint.gpiobutton.0.flags="0x0581" - -# GPIO7 - MODE SW AP IN II IO -#hint.gpiobutton.1.at="gpiobus0" -#hint.gpiobutton.1.pins="0x80" -#hint.gpiobutton.1.name="mode_ap" -#hint.gpiobutton.1.flags="0x0581" - -# GPIO8 - ST LEDRED OUT /* 2pin BiDir RED/BLUE LED */ -# GPIO9 - ST LEDBLUE OUT -#hint.gpioled.0.at="gpiobus0" -#hint.gpioled.0.pins="0x100" -#hint.gpioled.0.name="status_red" -#hint.gpioled.0.flags="0x0002" -#hint.gpioled.1.at="gpiobus0" -#hint.gpioled.1.pins="0x200" -#hint.gpioled.1.name="status_blue" -#hint.gpioled.1.name="status" -#hint.gpioled.1.flags="0x0002" - -# GPIO10 - RST BTN IN II IO -#hint.gpiobutton.2.at="gpiobus0" -#hint.gpiobutton.2.pins="0x400" -##hint.gpiobutton.2.name="reset" -#hint.gpiobutton.2.flags="0x0581" - -# GPIO11 - MODE SW CL IN II IO -#hint.gpiobutton.3.at="gpiobus0" -#hint.gpiobutton.3.pins="0x800" -#hint.gpiobutton.3.name="mode_wlan_client" -#hint.gpiobutton.3.flags="0x0581" - -# GPIO14 - WPS LED OUT II IO -#hint.gpioled.2.at="gpiobus0" -#hint.gpioled.2.pins="0x4000" -#hint.gpioled.2.name="wps" -#hint.gpioled.2.flags="0x0182" - - - -#0x00000000-0x00030000 : "Bootloader" -#0x00030000-0x00040000 : "Factory" -#0x00040000-0x00070000 : "Config" -#0x00070000-0x000b0000 : "Language" -#0x000b0000-0x001a0000 : "Kernel" -#0x001a0000-0x01000000 : "RootFS" - -#hint.map.0.at="cfid0" -#hint.map.0.start=0x00000000 -#hint.map.0.end=0x00030000 -#hint.map.0.name="bootloader" -#hint.map.0.readonly=1 - -#hint.map.1.at="cfid0" -#hint.map.1.start=0x00030000 -#hint.map.1.end=0x00040000 -#hint.map.1.name="factory" - -#hint.map.2.at="cfid0" -#hint.map.2.start=0x00040000 -#hint.map.2.end=0x00800000 -#hint.map.2.name="upgrade" - -#hint.map.3.at="cfid0" -#hint.map.3.start=0x00040000 -#hint.map.3.end=0x00050000 -#hint.map.3.name="config" - -#hint.map.4.at="cfid0" -#hint.map.4.start=0x00000000 -#hint.map.4.end=0x00000000 -#hint.map.4.name="language" - -#hint.map.5.at="cfid0" -#hint.map.5.start=0x00050000 -#hint.map.5.end=0x00150000 -#hint.map.5.name="kernel" - -#hint.map.6.at="cfid0" -#hint.map.6.start=0x00150000 -#hint.map.6.end=0x00800000 -#hint.map.6.name="rootfs" - - -#hint.rt.0.phymask=0x1f -#hint.rt.0.media=100 -#hint.rt.0.fduplex=1 - diff --git a/sys/mips/conf/MT7620A_FDT b/sys/mips/conf/MT7620A_FDT deleted file mode 100644 index 2174cbc8ca0..00000000000 --- a/sys/mips/conf/MT7620A_FDT +++ /dev/null @@ -1,75 +0,0 @@ -# -# MT7620A_FDT -- Kernel configuration file for FreeBSD/MIPS MT7620A SoC -# -# This includes all the configurable parts of the kernel. -# -# - -#NO_UNIVERSE - -# -# FDT_DTS_FILE should be modified to suit the target board type. -# -#makeoptions FDT_DTS_FILE=MT7620a.dts - -# Start with a base configuration -include "../mediatek/std.mediatek" - -ident MT7620A -cpu CPU_MIPS24K - -# Don't build any modules by default -makeoptions MODULES_OVERRIDE="" - -# Default rootfs device configuration, should be changed to suit target board -options ROOTDEVNAME=\"ufs:md0.uzip\" - -# Support geom_uzip(4) compressed disk images -device xz -options GEOM_UZIP - -# Support md(4) and md-based rootfs -device md -options MD_ROOT - -# Interrupt controller support -device mtk_intr_v1 - -# UART device support -nodevice uart_ns8250 -device uart_dev_mtk - -# SPI and SPI flash support -device mtk_spi_v1 -device spibus -device mx25l - -# GPIO and gpioled support -device mtk_gpio_v1 -device gpio -device gpioled - -# PCI support -device pci - -# USB (ehci, ohci) support -device usb -device mtk_usb_phy -device ehci -device ohci - -# USB umass(4) storage and da(4) support -device umass -device da - -# CAM support, required if umass(4) is enabled above -device pass -device scbus - -# Ethernet, BPF and bridge support -device rt -device bpf -device if_bridge - -# Extres -device clk diff --git a/sys/mips/conf/MT7620N_FDT b/sys/mips/conf/MT7620N_FDT deleted file mode 100644 index 5043c2cfe8c..00000000000 --- a/sys/mips/conf/MT7620N_FDT +++ /dev/null @@ -1,72 +0,0 @@ -# -# MT7620N_FDT -- Kernel configuration file for FreeBSD/MIPS MT7620N SoC -# -# This includes all the configurable parts of the kernel. -# -# - -#NO_UNIVERSE - -# -# FDT_DTS_FILE should be modified to suit the target board type. -# -#makeoptions FDT_DTS_FILE=WRTNODE.dts - -# Start with a base configuration -include "../mediatek/std.mediatek" - -ident MT7620N -cpu CPU_MIPS24K - -# Don't build any modules by default -makeoptions MODULES_OVERRIDE="" - -# Default rootfs device configuration, should be changed to suit target board -options ROOTDEVNAME=\"ufs:md0.uzip\" - -# Support geom_uzip(4) compressed disk images -device xz -options GEOM_UZIP - -# Support md(4) and md-based rootfs -device md -options MD_ROOT - -# Interrupt controller support -device mtk_intr_v1 - -# UART device support -nodevice uart_ns8250 -device uart_dev_mtk - -# SPI and SPI flash support -device mtk_spi_v1 -device spibus -device mx25l - -# GPIO and gpioled support -device mtk_gpio_v1 -device gpio -device gpioled - -# USB (ehci, ohci) support -device usb -device mtk_usb_phy -device ehci -device ohci - -# USB umass(4) storage and da(4) support -device umass -device da - -# CAM support, required if umass(4) is enabled above -device pass -device scbus - -# Ethernet, BPF and bridge support -device rt -device bpf -device if_bridge - -# Extres -device clk diff --git a/sys/mips/conf/MT7621_FDT b/sys/mips/conf/MT7621_FDT deleted file mode 100644 index c5e4881c2a5..00000000000 --- a/sys/mips/conf/MT7621_FDT +++ /dev/null @@ -1,71 +0,0 @@ -# -# MT7621_FDT -- Kernel configuration file for FreeBSD/MIPS MT7621 SoC -# -# This includes all the configurable parts of the kernel. -# -# - -#NO_UNIVERSE - -# -# FDT_DTS_FILE should be modified to suit the target board type. -# -#makeoptions FDT_DTS_FILE=WITI.dts - -# Start with a base configuration -include "../mediatek/std.mediatek" - -ident MT7621 -cpu CPU_MIPS1004K - -# Don't build any modules by default -makeoptions MODULES_OVERRIDE="" - -# Default rootfs device configuration, should be changed to suit target board -options ROOTDEVNAME=\"ufs:md0.uzip\" - -# Support geom_uzip(4) compressed disk images -device xz -options GEOM_UZIP - -# Support md(4) and md-based rootfs -device md -options MD_ROOT - -# Interrupt controller support -device mtk_intr_gic - -# UART device support is compiled in when uart_ns8250 is selected (default) - -# SPI and SPI flash support -device mtk_spi_v2 -device spibus -device mx25l - -# GPIO and gpioled support -device mtk_gpio_v2 -device gpio -device gpioled - -# PCI support -device pci - -# USB (ehci, ohci) support -device usb -device xhci - -# USB umass(4) storage and da(4) support -device umass -device da - -# CAM support, required if umass(4) is enabled above -device pass -device scbus - -# Ethernet, BPF and bridge support -device rt -device bpf -device if_bridge - -# Extres -device clk diff --git a/sys/mips/conf/MT7628_FDT b/sys/mips/conf/MT7628_FDT deleted file mode 100644 index 963629d74b6..00000000000 --- a/sys/mips/conf/MT7628_FDT +++ /dev/null @@ -1,74 +0,0 @@ -# -# MT7628_FDT -- Kernel configuration file for FreeBSD/MIPS MT7628 and MT7688 -# SoCs -# -# This includes all the configurable parts of the kernel. -# -# - -#NO_UNIVERSE - -# -# FDT_DTS_FILE should be modified to suit the target board type. -# -#makeoptions FDT_DTS_FILE=LINKIT7688.dts - -# Start with a base configuration -include "../mediatek/std.mediatek" - -ident MT7628 -cpu CPU_MIPS24K - -# Don't build any modules by default -makeoptions MODULES_OVERRIDE="" - -# Default rootfs device configuration, should be changed to suit target board -options ROOTDEVNAME=\"ufs:md0.uzip\" - -# Support geom_uzip(4) compressed disk images -device xz -options GEOM_UZIP - -# Support md(4) and md-based rootfs -device md -options MD_ROOT - -# Interrupt controller support -device mtk_intr_v2 - -# UART device support is compiled in when uart_ns8250 is selected (default) - -# SPI and SPI flash support -device mtk_spi_v2 -device spibus -device mx25l - -# GPIO and gpioled support -device mtk_gpio_v2 -device gpio -device gpioled - -# PCI support -device pci - -# USB (ehci, ohci) support -device usb -device mtk_usb_phy -device ehci -device ohci - -# USB umass(4) storage and da(4) support -device umass -device da - -# CAM support, required if umass(4) is enabled above -device pass -device scbus - -# Ethernet, BPF and bridge support -device rt -device bpf -device if_bridge - -# Extres -device clk diff --git a/sys/mips/conf/OCTEON1 b/sys/mips/conf/OCTEON1 deleted file mode 100644 index 8ef8c7ac613..00000000000 --- a/sys/mips/conf/OCTEON1 +++ /dev/null @@ -1,242 +0,0 @@ -# -# OCTEON1 -- Generic kernel configuration file for FreeBSD/MIPS on Cavium Octeon -# -# For more information on this file, please read the config(5) manual page, -# and/or the handbook section on Kernel Configuration Files: -# -# https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config -# -# The handbook is also available locally in /usr/share/doc/handbook -# if you've installed the doc distribution, otherwise always see the -# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the -# latest information. -# -# An exhaustive list of options and more detailed explanations of the -# device lines is also present in the ../../conf/NOTES and NOTES files. -# If you are in doubt as to the purpose or necessity of a line, check first -# in NOTES. -# - -ident OCTEON1 - -makeoptions ARCH_FLAGS="-march=octeon+" -makeoptions LDSCRIPT_NAME=ldscript.mips.octeon1 - -# Don't build any modules yet. -makeoptions MODULES_OVERRIDE="" -makeoptions KERNLOADADDR=0xffffffff80100000 - -# We don't need to build a trampolined version of the kernel. -makeoptions WITHOUT_KERNEL_TRAMPOLINE=1 - -include "../cavium/std.octeon1" - -hints "OCTEON1.hints" #Default places to look for devices. - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols - -# Board-specific support that cannot be auto-detected at runtime. -#options OCTEON_VENDOR_LANNER # Support for Lanner boards. -#options OCTEON_VENDOR_RADISYS # Support for Radisys boards. -#options OCTEON_VENDOR_UBIQUITI # Support for Ubiquiti boards. -#options OCTEON_VENDOR_GEFES # Support for GE LANIC boards -#options OCTEON_BOARD_CAPK_0100ND # Support for CAPK-0100nd. - -# Compile for a specified Octeon model. If not specified, support for -# detection at runtime will be used instead, which may give inferior -# performance. -# -# See sys/contrib/octeon-sdk/octeon-model.h for possible values. -#options OCTEON_MODEL=OCTEON_CN58XX_PASS1_1 - -options SCHED_ULE # ULE scheduler -options PREEMPTION # Enable kernel thread preemption -options INET # InterNETworking -options INET6 # IPv6 communications protocols -options TCP_HHOOK # hhook(9) framework for TCP -options SCTP_SUPPORT # Allow kldload of SCTP -options FFS # Berkeley Fast Filesystem -options SOFTUPDATES # Enable FFS soft updates support -options UFS_ACL # Support for access control lists -options UFS_DIRHASH # Improve performance on big directories -options UFS_GJOURNAL # Enable gjournal-based UFS journaling -options MD_ROOT # MD is a potential root device -options NFSCL # Network Filesystem Client -options NFSD # Network Filesystem Server -options NFSLOCKD # Network Lock Manager -options NFS_ROOT # NFS usable as /, requires NFSCL -options MSDOSFS # MSDOS Filesystem -options CD9660 # ISO 9660 Filesystem -options PROCFS # Process filesystem (requires PSEUDOFS) -options PSEUDOFS # Pseudo-filesystem framework -options GEOM_PART_GPT # GUID Partition Tables. -options GEOM_LABEL # Provides labelization -options COMPAT_FREEBSD32 # Compatible with o32 binaries -options SCSI_DELAY=5000 # Delay (in ms) before probing SCSI -options KTRACE # ktrace(1) support -options STACK # stack(9) support -options SYSVSHM # SYSV-style shared memory -options SYSVMSG # SYSV-style message queues -options SYSVSEM # SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions -options PRINTF_BUFR_SIZE=128 # Prevent printf output being interspersed. -options HWPMC_HOOKS # Necessary kernel hooks for hwpmc(4) -options AUDIT # Security event auditing -options MAC # TrustedBSD MAC Framework -#options KDTRACE_FRAME # Ensure frames are compiled in -#options KDTRACE_HOOKS # Kernel DTrace hooks -options INCLUDE_CONFIG_FILE # Include this file in kernel -options NO_SWAPPING # Disable support for paging - -# Debugging for use in -current -options KDB # Enable kernel debugger support. -options DDB # Support DDB. -options GDB # Support remote GDB. -options DEADLKRES # Enable the deadlock resolver -options INVARIANTS # Enable calls of extra sanity checking -options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS -options WITNESS # Enable checks to detect deadlocks and cycles -options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed -options MALLOC_DEBUG_MAXZONES=8 # Separate malloc(9) zones - -# Make an SMP-capable kernel by default -options SMP # Symmetric MultiProcessor Kernel - -# Bus support. -device pci - -# ATA controllers -device ahci # AHCI-compatible SATA controllers -device ata # Legacy ATA/SATA controllers - -# On-board Compact Flash driver. -device cf -options ROOTDEVNAME=\"ufs:cf0s2a\" # Default root filesystem. - -# SCSI Controllers -device ahc # AHA2940 and onboard AIC7xxx devices -device mpt # LSI-Logic MPT-Fusion - -# ATA/SCSI peripherals -device scbus # SCSI bus (required for ATA/SCSI) -device ch # SCSI media changers -device da # Direct Access (disks) -device sa # Sequential Access (tape etc) -device cd # CD -device pass # Passthrough device (direct ATA/SCSI access) -device ses # Enclosure Services (SES and SAF-TE) - -# RAID controllers interfaced to the SCSI subsystem -device ciss # Compaq Smart RAID 5* - -# PCCARD (PCMCIA) support -# PCMCIA and cardbus bridge support -device cbb # cardbus (yenta) bridge -device pccard # PC Card (16-bit) bus -device cardbus # CardBus (32-bit) bus - -# Serial (COM) ports -device uart # Generic UART driver - -# If you've got a "dumb" serial or parallel PCI card that is -# supported by the puc(4) glue driver, uncomment the following -# line to enable it (connects to sio, uart and/or ppc drivers): -#device puc - -# On-board Cavium Octeon Ethernet. -# NOTE: Be sure to keep the 'device miibus' line in order to use these NICs! -device octe - -# Cavium Octeon management Ethernet. -device octm - -# Switch PHY support for the octe driver. These currently present a VLAN per -# physical port, but may eventually provide support for DSA or similar instead. -#device mv88e61xxphy # Marvell 88E61XX - -device iflib - -# PCI Ethernet NICs. -device em # Intel PRO/1000 Gigabit Ethernet Family -device ix # Intel PRO/10GbE PF PCIE Ethernet Family -device ixv # Intel PRO/10GbE VF PCIE Ethernet Family - -# PCI Ethernet NICs that use the common MII bus controller code. -# NOTE: Be sure to keep the 'device miibus' line in order to use these NICs! -device miibus # MII bus support -device bce # Broadcom BCM5706/BCM5708 Gigabit Ethernet -device bfe # Broadcom BCM440x 10/100 Ethernet -device bge # Broadcom BCM570xx Gigabit Ethernet - -device wlan # 802.11 support -options IEEE80211_DEBUG # enable debug msgs -options IEEE80211_SUPPORT_MESH # enable 802.11s draft support -device wlan_wep # 802.11 WEP support -device wlan_ccmp # 802.11 CCMP support -device wlan_tkip # 802.11 TKIP support -device wlan_amrr # AMRR transmit rate control algorithm -device ath # Atheros NIC's -device ath_pci # Atheros pci/cardbus glue -device ath_hal # pci/cardbus chip support -device ath_rate_sample # SampleRate tx rate control for ath -device ral # Ralink Technology RT2500 wireless NICs. - -# Pseudo devices. -device loop # Network loopback -device ether # Ethernet support -device vlan # 802.1Q VLAN support -device tuntap # Packet tunnel. -device md # Memory "disks" -device gif # IPv6 and IPv4 tunneling -device firmware # firmware assist module - -# The `bpf' device enables the Berkeley Packet Filter. -# Be aware of the administrative consequences of enabling this! -# Note that 'bpf' is required for DHCP. -device bpf # Berkeley packet filter - -# Hardware watchdog support. -#device octeon_wdog # Octeon hardware watchdog - -# USB support -options USB_DEBUG # enable debug msgs -device octusb # Cavium Octeon on-board USB interface (USB 2.0) -device uhci # UHCI PCI->USB interface -device ohci # OHCI PCI->USB interface -device ehci # EHCI PCI->USB interface (USB 2.0) -device usb # USB Bus (required) -#device udbp # USB Double Bulk Pipe devices -device uhid # "Human Interface Devices" -device ulpt # Printer -device umass # Disks/Mass storage - Requires scbus and da -device ums # Mouse -# USB Serial devices -device u3g # USB-based 3G modems (Option, Huawei, Sierra) -device uark # Technologies ARK3116 based serial adapters -device ubsa # Belkin F5U103 and compatible serial adapters -device uftdi # For FTDI usb serial adapters -device uipaq # Some WinCE based devices -device uplcom # Prolific PL-2303 serial adapters -device uslcom # SI Labs CP2101/CP2102 serial adapters -device uvisor # Visor and Palm devices -device uvscom # USB serial support for DDI pocket's PHS -# USB Wireless -device rum # Ralink Technology RT2501USB wireless NICs -device uath # Atheros AR5523 wireless NICs -device ural # Ralink Technology RT2500USB wireless NICs -device zyd # ZyDAS zd1211/zd1211b wireless NICs - -# crypto subsystem -device crypto # core crypto support -device cryptodev # /dev/crypto for access to h/w -device cryptocteon # Octeon coprocessor 2 crypto offload - -# GPIO support -#device gpio - -# PMC support -#device hwpmc - -# HID support -options HID_DEBUG # enable debug msgs -device hid # Generic HID support diff --git a/sys/mips/conf/OCTEON1.hints b/sys/mips/conf/OCTEON1.hints deleted file mode 100644 index 0113ed62d8d..00000000000 --- a/sys/mips/conf/OCTEON1.hints +++ /dev/null @@ -1,12 +0,0 @@ -# device.hints -# All these values are complete nonsense... -hw.uart.console="io:0x1" -hint.ciu.0.at="nexus" -hint.rtc.0.at="nexus" -hint.obio.0.at="ciu" -hint.obio.0.maddr="0x1" -hint.obio.0.msize="0x1" -hint.obio.0.flags="0x1" -hint.uart.0.at="obio" -hint.uart.0.maddr="0x1" -hint.uart.0.flags="0x1" diff --git a/sys/mips/conf/ONIONOMEGA b/sys/mips/conf/ONIONOMEGA deleted file mode 100644 index 91d5e54cb04..00000000000 --- a/sys/mips/conf/ONIONOMEGA +++ /dev/null @@ -1,54 +0,0 @@ -# -# Onion Omega - an AR9330 based SoC -# -# https://onion.io/omega/ -# -# * AR9330 SoC -# * 64MB RAM -# * 16MB flash -# * Integrated 1x1 2GHz wifi and optional 10/100 ethernet -# -# - -#NO_UNIVERSE - -# Include the default AR933x parameters -include "std.AR933X" - -ident ONIONOMEGA - -# Override hints with board values -hints "ONIONOMEGA.hints" - -# Board memory - 64MB -options AR71XX_REALMEM=(64*1024*1024) - -# i2c GPIO bus -#device gpioiic -#device iicbb -#device iicbus -#device iic - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# read MSDOS formatted disks - USB -#options MSDOSFS - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# uzip - to boot natively from flash -device xz -options GEOM_UZIP - -# Used for the static uboot partition map -device geom_map - -# Boot off of the rootfs, as defined in the geom_map setup. -options ROOTDEVNAME=\"ufs:map/rootfs.uzip\" diff --git a/sys/mips/conf/ONIONOMEGA.hints b/sys/mips/conf/ONIONOMEGA.hints deleted file mode 100644 index 274a6aedec0..00000000000 --- a/sys/mips/conf/ONIONOMEGA.hints +++ /dev/null @@ -1,131 +0,0 @@ -# -# This file adds to the values in AR933X_BASE.hints. -# - -# mdiobus on arge1 -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x1a000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# Embedded Atheros Switch -hint.arswitch.0.at="mdio0" - -# XXX this should really say it's an AR933x switch, as there -# are some vlan specific differences here! -hint.arswitch.0.is_7240=1 -hint.arswitch.0.numphys=4 -hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY -hint.arswitch.0.is_rgmii=0 -hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII - -# arge0 - MII, autoneg, phy(4) -hint.arge.0.phymask=0x10 # PHY4 -hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus -hint.arge.0.eeprommac=0x1fff0000 - -# arge1 - GMII, 1000/full -hint.arge.1.phymask=0x0 # No directly mapped PHYs -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 -hint.arge.1.eeprommac=0x1fff0006 - -# ath0 -hint.ath.0.eepromaddr=0x1fff0000 -hint.ath.0.eepromsize=16384 - -# 16MB flash layout: -# [ 0.510000] 5 tp-link partitions found on MTD device spi0.0 -# [ 0.510000] Creating 5 MTD partitions on "spi0.0": -# [ 0.520000] 0x000000000000-0x000000020000 : "u-boot" -# [ 0.520000] 0x000000020000-0x000000136468 : "kernel" -# [ 0.530000] 0x000000136468-0x000000ff0000 : "rootfs" -# [ 0.530000] mtd: device 2 (rootfs) set to be root filesystem -# [ 0.540000] 1 squashfs-split partitions found on MTD device rootfs -# [ 0.540000] 0x000000730000-0x000000fe0000 : "rootfs_data" -# [ 0.540000] 0x000000fe0000-0x000000ff0000 : "nvram" -# [ 0.550000] 0x000000ff0000-0x000001000000 : "art" -# [ 0.560000] 0x000000020000-0x000000fe0000 : "firmware" - -# 64KiB uboot -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00010000 -hint.map.0.name="u-boot" -hint.map.0.readonly=1 - -# 64KiB uboot -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00010000 -hint.map.1.end=0x00020000 -hint.map.1.name="uboot-env" -hint.map.1.readonly=1 - -# kernel -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00020000 -hint.map.2.end="search:0x00020000:0x10000:.!/bin/sh" -hint.map.2.name="kernel" -hint.map.2.readonly=1 - -# rootfs ulzma -hint.map.3.at="flash/spi0" -hint.map.3.start="search:0x00020000:0x10000:.!/bin/sh" -hint.map.3.end=0x00fe0000 -hint.map.3.name="rootfs" -hint.map.3.readonly=1 - -# 64KiB cfg -hint.map.4.at="flash/spi0" -hint.map.4.start=0x00fe0000 -hint.map.4.end=0x00ff0000 -hint.map.4.name="cfg" -hint.map.4.readonly=0 - -# all firmware 16000KiB -hint.map.5.at="flash/spi0" -hint.map.5.start=0x00020000 -hint.map.5.end=0x00ff0000 -hint.map.5.name="firmware" -hint.map.5.readonly=0 - -# 64KiB ART -hint.map.6.at="flash/spi0" -hint.map.6.start=0x00ff0000 -hint.map.6.end=0x01000000 -hint.map.6.name="ART" -hint.map.6.readonly=1 - -# GPIO -hint.gpio.0.pinmask=0x0c8ff1c3 - -hint.gpioled.0.at="gpiobus0" -hint.gpioled.0.pins=0x08000000 -hint.gpioled.0.name="board" -hint.gpioled.0.invert=0 - -#Red -hint.gpioled.1.at="gpiobus0" -hint.gpioled.1.pins=0x00020000 -hint.gpioled.1.name="red" -hint.gpioled.1.invert=0 - -#Green -hint.gpioled.2.at="gpiobus0" -hint.gpioled.2.pins=0x00010000 -hint.gpioled.2.name="green" -hint.gpioled.2.invert=0 - -#Blue -hint.gpioled.3.at="gpiobus0" -hint.gpioled.3.pins=0x00008000 -hint.gpioled.3.name="blue" -hint.gpioled.3.invert=0 - -# I2C -# 0x20 - 0x27 = Relay Controllers (0x27 is default) -# 0x5a = PWM/Servo Controller -hint.gpioiic.0.at="gpiobus0" -hint.gpioiic.0.pins=0x300000 # pins 20 and 21 -hint.gpioiic.0.scl=0 # pin 20 -hint.gpioiic.0.sda=1 # pin 21 diff --git a/sys/mips/conf/PB47 b/sys/mips/conf/PB47 deleted file mode 100644 index 314737c840a..00000000000 --- a/sys/mips/conf/PB47 +++ /dev/null @@ -1,41 +0,0 @@ -# -# Atheros PB47 reference board. -# -# * one MiniPCI+ slot (modified to allow two idsel lines -# on the one slot, for a specific kind of internal-only -# NIC; -# * one XMII slot -# * One ethernet PHY -# * Akros Silicon AS1834 -# * 8MB NOR SPI flash -# * 64MB RAM -# -# - -#NO_UNIVERSE - -include "AR71XX_BASE" -ident "PB47" -hints "PB47.hints" - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# XXX TODO: add uboot boot parameter parsing to extract MAC, RAM. -# Right now it will just detect 32mb out of 64mb, as well as -# return a garbage MAC address. -options AR71XX_REALMEM=64*1024*1024 - -# For DOS - enable if required -options MSDOSFS - -# uncompress - to boot read-only lzma natively from flash -device xz -options GEOM_UZIP - -# Used for the static uboot partition map -device geom_map - -# Boot off of the rootfs, as defined in the geom_map setup. -options ROOTDEVNAME=\"ufs:map/rootfs.uzip\" diff --git a/sys/mips/conf/PB47.hints b/sys/mips/conf/PB47.hints deleted file mode 100644 index 0385954e27a..00000000000 --- a/sys/mips/conf/PB47.hints +++ /dev/null @@ -1,77 +0,0 @@ - -# There's two interfaces, but only one socket is populated. -# -# There's an AR8021 PHY attached to arge1. -# -# XXX TODO: figure out where to extract the MAC from. -hint.arge.1.phymask=0x01 - -# XXX TODO: pass in hints for the GPIO -> LED mapping for the -# minipci slot. The specific customer reference design NIC -# wires GPIO5 from each AR9220 to one of two GPIO pins on the -# MiniPCI bus. However, this may be very specific to the NIC -# being used. - -# The default flash layout: -# uboot: 192k -# env: 64k -# rootfs: 6144k -# uimage (kernel): 1728k -# caldata: 64k -# -# We steal 64k from the end of rootfs to store the local config. - -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x000030000 -hint.map.0.name="uboot" -hint.map.0.readonly=1 - -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00030000 -hint.map.1.end=0x00040000 -hint.map.1.name="uboot-env" -hint.map.1.readonly=1 - -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00040000 -hint.map.2.end=0x00630000 -hint.map.2.name="rootfs" -hint.map.2.readonly=1 - -hint.map.3.at="flash/spi0" -hint.map.3.start=0x00630000 -hint.map.3.end=0x00640000 -hint.map.3.name="cfg" -hint.map.3.readonly=0 - -hint.map.4.at="flash/spi0" -hint.map.4.start=0x00640000 -hint.map.4.end=0x007f0000 -hint.map.4.name="kernel" -hint.map.4.readonly=1 - -hint.map.5.at="flash/spi0" -hint.map.5.start=0x007f0000 -hint.map.5.end=0x00800000 -hint.map.5.name="art" -hint.map.5.readonly=1 - -# Don't flip on anything that isn't already enabled by the -# bootloader. -hint.gpio.0.function_set=0x00000000 -hint.gpio.0.function_clear=0x00000000 - -# Which GPIO lines to enable - just GPIO2/3 for the LEDs. -hint.gpio.0.pinmask=0x0000000c - -# GPIO2 and GPIO3 are LEDs, where 0=on and 1=off. -# XXX TODO: teach gpioled about polarity? -hint.gpioled.0.at="gpiobus0" -hint.gpioled.0.pins="0x0004" -hint.gpioled.0.name="led1" - -hint.gpioled.1.at="gpiobus0" -hint.gpioled.1.pins="0x0008" -hint.gpioled.1.name="led2" - diff --git a/sys/mips/conf/PB92 b/sys/mips/conf/PB92 deleted file mode 100644 index 5aeba83887e..00000000000 --- a/sys/mips/conf/PB92 +++ /dev/null @@ -1,135 +0,0 @@ -# -# PB92 -- Kernel configuration file for FreeBSD/mips for Atheros PB92 reference -# board (AR7242) -# -# - -ident PB92 -# XXX The default load address in the Uboot environment is 0x80010000 -makeoptions KERNLOADADDR=0x80050000 -options HZ=1000 - -# The PB92 has 32mb of RAM; hard-code that -options AR71XX_REALMEM=32*1024*1024 - -# It's UBOOT, not Redboot - without this, things will hang at startup -options AR71XX_ENV_UBOOT - -# We have to build most things as modules rather than in the kernel. -# The PB92 has 4MB of SPI flash and the default kernel "partition" -# is only 892KiB. In order to try and squeeze into that (so people -# who already are using it without modifying the default flash layout) -# we need to cut down on a lot of things. - -makeoptions MODULES_OVERRIDE="ath ath_pci ath_ahb bridgestp if_bridge if_gif if_gre wlan wlan_acl wlan_amrr wlan_ccmp wlan_rssadapt wlan_tkip wlan_wep wlan_xauth usb ar71xx" - -hints "PB92.hints" -include "../atheros/std.ar71xx" - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols -makeoptions MODULES_OVERRIDE="" - -options DDB -options KDB - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -# Can't do IPv6 - it just doesn't fit. -# options INET6 -options TCP_HHOOK # hhook(9) framework for TCP -# options NFSCL #Network Filesystem Client -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions -options ALQ - -# Debugging for use in -current -options DEADLKRES -options INVARIANTS -options INVARIANT_SUPPORT -options WITNESS -options WITNESS_SKIPSPIN -options FFS #Berkeley Fast Filesystem -#options SOFTUPDATES #Enable FFS soft updates support -#options UFS_ACL #Support for access control lists -#options UFS_DIRHASH #Improve performance on big directories - -# Support uncompress lzma rootfs -device xz -options GEOM_UZIP -options ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\" - -# PCI bus -device pci -device ar724x_pci - -# NVRAM U-Boot Environment -> Kernel environment -device nvram2env - -# Wireless NIC cards -options IEEE80211_DEBUG -options IEEE80211_SUPPORT_MESH -options IEEE80211_SUPPORT_TDMA -options IEEE80211_ALQ -#device wlan # 802.11 support -#device wlan_wep # 802.11 WEP support -#device wlan_ccmp # 802.11 CCMP support -#device wlan_tkip # 802.11 TKIP support -#device wlan_xauth # 802.11 hostap support - -#device ath # Atheros pci/cardbus NIC's -#device ath_pci # PCI/PCIe bus glue -options ATH_DEBUG -options ATH_ENABLE_11N -options ATH_DIAGAPI - -# device ath_hal -options AH_DEBUG -options AH_DEBUG_ALQ - -# device ath_rate_sample - -device mii -device arge - -# USB devices - PB92 has EHCI only - -#device usb -options USB_EHCI_BIG_ENDIAN_DESC # handle big-endian byte order -options USB_DEBUG -options USB_HOST_ALIGN=32 -#device ehci - -# Mass storage -#device scbus -#device umass -#device da - -# Read MSDOS formatted disks -# options MSDOSFS - -# GPIO Bus -#device gpio -#device gpioled - -# SPI and flash -device spibus -device ar71xx_spi -device mx25l - -# The flash is statically partitioned; add in that -device geom_map - -device ar71xx_wdog - -# Serial -device uart -device uart_ar71xx - -device ar71xx_apb - -# Network twiddling -device loop -device ether -#device md -#device bpf -#device if_bridge diff --git a/sys/mips/conf/PB92.hints b/sys/mips/conf/PB92.hints deleted file mode 100644 index ea256351299..00000000000 --- a/sys/mips/conf/PB92.hints +++ /dev/null @@ -1,112 +0,0 @@ -hint.apb.0.at="nexus0" -hint.apb.0.irq=4 - -# uart0 -hint.uart.0.at="apb0" -# see atheros/uart_cpu_ar71xx.c why +3 -hint.uart.0.maddr=0x18020003 -hint.uart.0.msize=0x18 -hint.uart.0.irq=3 - -#ehci - note the 0x100 offset for the AR913x/AR724x -hint.ehci.0.at="nexus0" -hint.ehci.0.maddr=0x1b000100 -hint.ehci.0.msize=0x00ffff00 -hint.ehci.0.irq=1 - -# pci -hint.pcib.0.at="nexus0" -hint.pcib.0.irq=0 - -# arge0 -hint.arge.0.at="nexus0" -hint.arge.0.maddr=0x19000000 -hint.arge.0.msize=0x1000 -hint.arge.0.irq=2 - -# AR8316 workaround for now -hint.arge.0.media=1000 -hint.arge.0.fduplex=1 -hint.arge.0.phymask=0x3 - -# GPIO -hint.gpio.0.at="apb0" -hint.gpio.0.maddr=0x18040000 -hint.gpio.0.msize=0x1000 -hint.gpio.0.irq=2 - -# Signal leds -hint.gpioled.0.at="gpiobus0" -hint.gpioled.0.name="sig1" -hint.gpioled.0.pins=0x0001 # pin 0 -hint.gpioled.1.at="gpiobus0" -hint.gpioled.1.name="sig2" -hint.gpioled.1.pins=0x0002 # pin 1 -hint.gpioled.2.at="gpiobus0" -hint.gpioled.2.name="sig3" -hint.gpioled.2.pins=0x0800 # pin 11 -hint.gpioled.3.at="gpiobus0" -hint.gpioled.3.name="sig4" -hint.gpioled.3.pins=0x0080 # pin 7 - -# SPI controller/bus -hint.spi.0.at="nexus0" -hint.spi.0.maddr=0x1f000000 -hint.spi.0.msize=0x10 - -# SPI flash -hint.mx25l.0.at="spibus0" -hint.mx25l.0.cs=0 - -# Watchdog -hint.ar71xx_wdog.0.at="nexus0" - -# nvram mapping - XXX ? -hint.nvram.0.base=0x1f030000 -hint.nvram.0.maxsize=0x2000 -hint.nvram.0.flags=3 # 1 = No check, 2 = Format Generic -hint.nvram.1.base=0x1f032000 -hint.nvram.1.maxsize=0x4000 -hint.nvram.1.flags=3 # 1 = No check, 2 = Format Generic - -# GEOM_MAP -# -# From my PB92 environment: -# -# mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART) - -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00040000 # 256k u-boot -hint.map.0.name="u-boot" -hint.map.0.readonly=1 - -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end=0x00050000 # 64k u-boot-env -hint.map.1.name="u-boot-env" -hint.map.1.readonly=0 - -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00050000 -hint.map.2.end=0x00300000 # 2752k rootfs -hint.map.2.name="rootfs" -hint.map.2.readonly=1 - -hint.map.3.at="flash/spi0" -hint.map.3.start=0x00300000 -hint.map.3.end=0x003e0000 # 896k uImage -hint.map.3.name="uImage" -hint.map.3.readonly=0 - -hint.map.4.at="flash/spi0" -hint.map.4.start=0x003e0000 -hint.map.4.end=0x003f0000 # 64k NVRAM -hint.map.4.name="NVRAM" -hint.map.4.readonly=0 - -hint.map.5.at="flash/spi0" -hint.map.5.start=0x003f0000 -hint.map.5.end=0x00400000 # 64k ART -hint.map.5.name="ART" -hint.map.5.readonly=1 diff --git a/sys/mips/conf/PICOSTATION_M2HP b/sys/mips/conf/PICOSTATION_M2HP deleted file mode 100644 index 60594962698..00000000000 --- a/sys/mips/conf/PICOSTATION_M2HP +++ /dev/null @@ -1,68 +0,0 @@ -# -# Specific board setup for the Picostation M2 HP board. -# -# This board has the following hardware: -# -# + AR7241 CPU SoC -# + AR9287 Wifi -# + Integrated switch (XXX speed?) -# + 8MB flash -# + 32MB RAM -# + uboot environment - -#NO_UNIVERSE - -include "std.AR724X" -ident "PICOSTATION_M2HP" -hints "PICOSTATION_M2HP.hints" - -options AR71XX_REALMEM=32*1024*1024 - -options AR71XX_ENV_UBOOT - -# Limit inlines -makeoptions INLINE_LIMIT=768 - -# We bite the performance overhead for now; the kernel won't -# fit if the mutexes are inlined. -options MUTEX_NOINLINE -options RWLOCK_NOINLINE -options SX_NOINLINE - -# There's no need to enable swapping on this platform. -options NO_SWAPPING - -# For DOS - enable if required -# options MSDOSFS - -# uncompress - to boot read-only lzma natively from flash -device xz -options GEOM_UZIP -options ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\" - -# Not enough space for these.. -nooptions INVARIANTS -nooptions INVARIANT_SUPPORT -nooptions WITNESS -nooptions WITNESS_SKIPSPIN -nooptions DEBUG_REDZONE -nooptions DEBUG_MEMGUARD - -# Used for the static uboot partition map -device geom_map - -# Options needed for the EEPROM based calibration/PCI configuration data. -options AR71XX_ATH_EEPROM # Fetch EEPROM/PCI config from flash -options ATH_EEPROM_FIRMWARE # Use EEPROM from flash -device firmware # Used by the above - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# Enable GPIO -device gpio -device gpioled diff --git a/sys/mips/conf/PICOSTATION_M2HP.hints b/sys/mips/conf/PICOSTATION_M2HP.hints deleted file mode 100644 index 9b37d960068..00000000000 --- a/sys/mips/conf/PICOSTATION_M2HP.hints +++ /dev/null @@ -1,102 +0,0 @@ - -# arge0 MDIO bus -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# Override MAC Address with the one on EEPROM -hint.arge.0.eeprommac=0x1fff0000 - -# arge0: dedicated switch port; RMII; dedicated PHY 4 on switch, connected -# via internal switch MDIO bus. -hint.arge.0.media=100 # Map to 100/full -hint.arge.0.fduplex=1 # -hint.arge.0.phymask=0x10 # PHY4 -hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus - -# arge1: nail to 1000/full, RMII - connected to the switch -hint.arge.1.media=1000 # Map to 1000/full -hint.arge.1.fduplex=1 # -hint.arge.1.phymask=0x0 # no directly mapped PHYs - -# -# AR7240 switch config -# -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=1 # We need to be explicitly told this -hint.arswitch.0.numphys=4 # 4 active switch PHYs (PHY 0 -> 3) -hint.arswitch.0.phy4cpu=1 # Yes, PHY 4 == dedicated PHY -hint.arswitch.0.is_rgmii=0 # No, not RGMII -hint.arswitch.0.is_gmii=0 # No, not GMII - -# ath0 hint - pcie slot 0 -hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff1000 -hint.pcib.0.bus.0.0.0.ath_fixup_size=4096 - -# ath -hint.ath.0.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware" - -# GPIO pins -# Pin 0: red led (sig1) -# Pin 1: yellow led (sig2) -# Pin 11: green len (sig3) -# Pin 7: green len (sig4) -# Pin 12: Reset switch -hint.gpio.0.pinmask=0x1883 - -# Signal leds -hint.gpioled.0.at="gpiobus0" -hint.gpioled.0.name="sig1" -hint.gpioled.0.pins=0x0001 # pin 0 -hint.gpioled.1.at="gpiobus0" -hint.gpioled.1.name="sig2" -hint.gpioled.1.pins=0x0002 # pin 1 -hint.gpioled.2.at="gpiobus0" -hint.gpioled.2.name="sig3" -hint.gpioled.2.pins=0x0800 # pin 11 -hint.gpioled.3.at="gpiobus0" -hint.gpioled.3.name="sig4" -hint.gpioled.3.pins=0x0080 # pin 7 - -# GEOM_MAP -# -# Picostation M2 HP -# -# mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),1024k(kernel),6528k(rootfs),256k(cfg),64k(EEPROM) - -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00040000 # 256k u-boot -hint.map.0.name="u-boot" -hint.map.0.readonly=1 - -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end=0x00050000 # 64k u-boot-env -hint.map.1.name="u-boot-env" -hint.map.1.readonly=1 - -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00050000 -hint.map.2.end="search:0x00100000:0x10000:.!/bin/sh" -hint.map.2.name="kernel" -hint.map.2.readonly=1 - -hint.map.3.at="flash/spi0" -hint.map.3.start="search:0x00100000:0x10000:.!/bin/sh" -hint.map.3.end=0x007b0000 -hint.map.3.name="rootfs" -hint.map.3.readonly=0 - -hint.map.4.at="flash/spi0" -hint.map.4.start=0x007b0000 -hint.map.4.end=0x007f0000 # 256k cfg -hint.map.4.name="cfg" -hint.map.4.readonly=0 - -hint.map.5.at="flash/spi0" -hint.map.5.start=0x007f0000 -hint.map.5.end=0x00800000 # 64k EEPROM -hint.map.5.name="eeprom" -hint.map.5.readonly=1 diff --git a/sys/mips/conf/QCA953X_BASE b/sys/mips/conf/QCA953X_BASE deleted file mode 100644 index c2b4d4aeb8b..00000000000 --- a/sys/mips/conf/QCA953X_BASE +++ /dev/null @@ -1,78 +0,0 @@ -# -# QCA953x -- Kernel configuration base file for the Qualcomm Atheros QCA953x SoC. -# -# This file (and the hints file accompanying it) are not designed to be -# used by themselves. Instead, users of this file should create a kernel -# config file which includes this file (which gets the basic hints), then -# override the default options (adding devices as needed) and adding -# hints as needed (for example, the GPIO and LAN PHY.) -# -# - -machine mips mips -ident QCA953X_BASE -cpu CPU_MIPS24K -makeoptions KERNLOADADDR=0x80050000 -options HZ=1000 - -files "../atheros/files.ar71xx" -hints "QCA953X_BASE.hints" - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols -makeoptions MODULES_OVERRIDE="gpio ar71xx if_gif if_vlan if_gre if_bridge bridgestp usb wlan wlan_xauth wlan_acl wlan_wep wlan_tkip wlan_ccmp wlan_rssadapt wlan_amrr hwpmc ipfw" - -options DDB -options KDB -options ALQ -options BREAK_TO_DEBUGGER - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -#options INET6 #InterNETworking -options TCP_HHOOK # hhook(9) framework for TCP -#options NFSCL #Network Filesystem Client -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions - -# PMC -options HWPMC_HOOKS - -# options NFS_LEGACYRPC -# Debugging for use in -current -options INVARIANTS -options INVARIANT_SUPPORT -options WITNESS -options WITNESS_SKIPSPIN -options FFS #Berkeley Fast Filesystem -#options SOFTUPDATES #Enable FFS soft updates support -#options UFS_ACL #Support for access control lists -#options UFS_DIRHASH #Improve performance on big directories -options NO_FFS_SNAPSHOT # We don't require snapshot support - -include "std.AR_MIPS_BASE" -makeoptions MODULES_OVERRIDE+="hwpmc_mips24k" - -# EEPROM caldata for AHB connected device -options AR71XX_ATH_EEPROM -device ar71xx_caldata -device firmware - -# Support QCA9530 in the HAL -options AH_SUPPORT_QCA9530 # Chipset support - -# Support EEPROM caldata in AHB devices -options ATH_EEPROM_FIRMWARE - -device usb -device ehci - -device scbus -device umass -device da - -# Handle 25MHz refclock by allowing a higher baudrate error tolerance. -device uart_ar71xx -options UART_DEV_TOLERANCE_PCT=50 - -device ar71xx_apb - diff --git a/sys/mips/conf/QCA953X_BASE.hints b/sys/mips/conf/QCA953X_BASE.hints deleted file mode 100644 index 6d6b81cd6a6..00000000000 --- a/sys/mips/conf/QCA953X_BASE.hints +++ /dev/null @@ -1,78 +0,0 @@ -# This file (and the kernel config file accompanying it) are not designed -# to be used by themselves. Instead, users of this file should create a -# kernel # config file which includes this file (which gets the basic hints), -# then override the default options (adding devices as needed) and adding -# hints as needed (for example, the GPIO and LAN PHY.) - -hint.apb.0.at="nexus0" -hint.apb.0.irq=4 - -# ART calibration data mapping device -hint.ar71xx_caldata.0.at="nexus0" -hint.ar71xx_caldata.0.order=0 - -# mdiobus on arge0 - required to bring up arge0 -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# mdiobus on arge1 - this is what the internal switch is hooked into. -hint.argemdio.1.at="nexus0" -hint.argemdio.1.maddr=0x1a000000 -hint.argemdio.1.msize=0x1000 -hint.argemdio.1.order=0 - -# uart0 -hint.uart.0.at="apb0" -# see atheros/uart_cpu_ar71xx.c why +3 -hint.uart.0.maddr=0x18020003 -hint.uart.0.msize=0x18 -hint.uart.0.irq=3 - -# ehci - on IP3 -hint.ehci.0.at="nexus0" -hint.ehci.0.maddr=0x1b000100 -hint.ehci.0.msize=0x00ffff00 -hint.ehci.0.irq=1 - -hint.arge.0.at="nexus0" -hint.arge.0.maddr=0x19000000 -hint.arge.0.msize=0x1000 -hint.arge.0.irq=2 - -hint.arge.1.at="nexus0" -hint.arge.1.maddr=0x1a000000 -hint.arge.1.msize=0x1000 -hint.arge.1.irq=3 - -# XXX The ath device hangs off of the AHB, rather than the Nexus. -hint.ath.0.at="nexus0" -hint.ath.0.maddr=0x18100000 -hint.ath.0.msize=0x20000 -hint.ath.0.irq=0 -hint.ath.0.vendor_id=0x168c -hint.ath.0.device_id=0x003d -# Where the ART is - last 64k in the first 8MB of flash -#hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000 -#hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384 - -# And now tell the ath(4) driver where to look! -#hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware" - -# SPI flash -hint.spi.0.at="nexus0" -hint.spi.0.maddr=0x1f000000 -hint.spi.0.msize=0x10 - -hint.mx25l.0.at="spibus0" -hint.mx25l.0.cs=0 - -# Watchdog -hint.ar71xx_wdog.0.at="nexus0" - -# The GPIO function and pin mask is configured per-board -hint.gpio.0.at="apb0" -hint.gpio.0.maddr=0x18040000 -hint.gpio.0.msize=0x1000 -hint.gpio.0.irq=2 diff --git a/sys/mips/conf/QCA955X_BASE.hints b/sys/mips/conf/QCA955X_BASE.hints deleted file mode 100644 index 1bfcea63b36..00000000000 --- a/sys/mips/conf/QCA955X_BASE.hints +++ /dev/null @@ -1,87 +0,0 @@ -# This file (and the kernel config file accompanying it) are not designed -# to be used by themselves. Instead, users of this file should create a -# kernel config file which includes this file (which gets the basic hints), -# then override the default options (adding devices as needed) and adding -# hints as needed (for example, the GPIO and LAN PHY.) - -hint.apb.0.at="nexus0" -# The default APB is on IP6 (irq4); we need to add -# the two new ones (IP2, IP3) to this and extend -# the irq ranges appropriately. -hint.apb.0.irq=4 - -# ART calibration data mapping device -hint.ar71xx_caldata.0.at="nexus0" -hint.ar71xx_caldata.0.order=0 - -# uart0 -hint.uart.0.at="apb0" -# NB: This isn't an ns8250 UART -hint.uart.0.maddr=0x18020003 -hint.uart.0.msize=0x18 -hint.uart.0.irq=3 - -# ehci - on IP3 -hint.ehci.0.at="nexus0" -hint.ehci.0.maddr=0x1b000100 -hint.ehci.0.msize=0x00001000 -hint.ehci.0.irq=1 - -hint.ehci.1.at="nexus0" -hint.ehci.1.maddr=0x1b400100 -hint.ehci.1.msize=0x00001000 -hint.ehci.1.irq=1 - -# PCIe 1: qca955x_int0 (IP2) - -# pci - XXX no maddr/msize, grr! -hint.pcib.0.at="nexus0" -hint.pcib.0.irq=0 - -# PCIe 1: qca955x_int1 (IP3) -hint.pcib.1.at="nexus0" -hint.pcib.1.irq=1 - -# IP4 -hint.arge.0.at="nexus0" -hint.arge.0.maddr=0x19000000 -hint.arge.0.msize=0x1000 -hint.arge.0.irq=2 - -# IP5 -hint.arge.1.at="nexus0" -hint.arge.1.maddr=0x1a000000 -hint.arge.1.msize=0x1000 -hint.arge.1.irq=3 - -# ath0 - connected via IP2 mux -hint.ath.0.at="nexus0" -hint.ath.0.maddr=0x18100000 -hint.ath.0.msize=0x20000 -hint.ath.0.irq=0 -hint.ath.0.vendor_id=0x168c -hint.ath.0.device_id=0x0039 - -# Where the ART is - last 64k in the first 8MB of flash -#hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000 -#hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384 - -# And now tell the ath(4) driver where to look! -#hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware" - -# SPI flash -hint.spi.0.at="nexus0" -hint.spi.0.maddr=0x1f000000 -hint.spi.0.msize=0x10 - -hint.mx25l.0.at="spibus0" -hint.mx25l.0.cs=0 - -# Watchdog -hint.ar71xx_wdog.0.at="nexus0" - -# The GPIO function and pin mask is configured per-board -hint.gpio.0.at="apb0" -hint.gpio.0.maddr=0x18040000 -hint.gpio.0.msize=0x1000 -hint.gpio.0.irq=2 diff --git a/sys/mips/conf/ROCKET_M2HP b/sys/mips/conf/ROCKET_M2HP deleted file mode 100644 index b42602666f1..00000000000 --- a/sys/mips/conf/ROCKET_M2HP +++ /dev/null @@ -1,68 +0,0 @@ -# -# Specific board setup for the Rocket M2 HP board. -# -# This board has the following hardware: -# -# + AR7241 CPU SoC -# + AR9287 Wifi -# + Integrated switch (XXX speed?) -# + 8MB flash -# + 32MB RAM -# + uboot environment - -#NO_UNIVERSE - -include "std.AR724X" -ident "ROCKET_M2HP" -hints "ROCKET_M2HP.hints" - -options AR71XX_REALMEM=32*1024*1024 - -options AR71XX_ENV_UBOOT - -# Limit inlines -makeoptions INLINE_LIMIT=768 - -# We bite the performance overhead for now; the kernel won't -# fit if the mutexes are inlined. -options MUTEX_NOINLINE -options RWLOCK_NOINLINE -options SX_NOINLINE - -# There's no need to enable swapping on this platform. -options NO_SWAPPING - -# For DOS - enable if required -# options MSDOSFS - -# uncompress - to boot read-only lzma natively from flash -device xz -options GEOM_UZIP -options ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\" - -# Not enough space for these.. -nooptions INVARIANTS -nooptions INVARIANT_SUPPORT -nooptions WITNESS -nooptions WITNESS_SKIPSPIN -nooptions DEBUG_REDZONE -nooptions DEBUG_MEMGUARD - -# Used for the static uboot partition map -device geom_map - -# Options needed for the EEPROM based calibration/PCI configuration data. -options AR71XX_ATH_EEPROM # Fetch EEPROM/PCI config from flash -options ATH_EEPROM_FIRMWARE # Use EEPROM from flash -device firmware # Used by the above - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# Enable GPIO -device gpio -device gpioled diff --git a/sys/mips/conf/ROCKET_M2HP.hints b/sys/mips/conf/ROCKET_M2HP.hints deleted file mode 100644 index b5ff5e3e1d5..00000000000 --- a/sys/mips/conf/ROCKET_M2HP.hints +++ /dev/null @@ -1,102 +0,0 @@ - -# arge1 MDIO bus -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x1a000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# Override MAC Address with the one on EEPROM -hint.arge.0.eeprommac=0x1fff0000 - -# arge0: dedicated switch port; RMII; dedicated PHY 4 on switch, connected -# via internal switch MDIO bus. -hint.arge.0.media=100 # Map to 100/full -hint.arge.0.fduplex=1 # -hint.arge.0.phymask=0x10 # PHY4 -hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus - -# arge1: nail to 1000/full, RMII - connected to the switch -hint.arge.1.media=1000 # Map to 1000/full -hint.arge.1.fduplex=1 # -hint.arge.1.phymask=0x0 # no directly mapped PHYs - -# -# AR7240 switch config -# -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=1 # We need to be explicitly told this -hint.arswitch.0.numphys=4 # 4 active switch PHYs (PHY 0 -> 3) -hint.arswitch.0.phy4cpu=1 # Yes, PHY 4 == dedicated PHY -hint.arswitch.0.is_rgmii=0 # No, not RGMII -hint.arswitch.0.is_gmii=0 # No, not GMII - -# ath0 hint - pcie slot 0 -hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff1000 -hint.pcib.0.bus.0.0.0.ath_fixup_size=4096 - -# ath -hint.ath.0.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware" - -# GPIO pins -# Pin 0: red led (sig1) -# Pin 1: yellow led (sig2) -# Pin 11: green len (sig3) -# Pin 7: green len (sig4) -# Pin 12: Reset switch -hint.gpio.0.pinmask=0x1883 - -# Signal leds -hint.gpioled.0.at="gpiobus0" -hint.gpioled.0.name="sig1" -hint.gpioled.0.pins=0x0001 # pin 0 -hint.gpioled.1.at="gpiobus0" -hint.gpioled.1.name="sig2" -hint.gpioled.1.pins=0x0002 # pin 1 -hint.gpioled.2.at="gpiobus0" -hint.gpioled.2.name="sig3" -hint.gpioled.2.pins=0x0800 # pin 11 -hint.gpioled.3.at="gpiobus0" -hint.gpioled.3.name="sig4" -hint.gpioled.3.pins=0x0080 # pin 7 - -# GEOM_MAP -# -# Rocket M2 HP -# -# mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),1024k(kernel),6528k(rootfs),256k(cfg),64k(EEPROM) - -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00040000 # 256k u-boot -hint.map.0.name="u-boot" -hint.map.0.readonly=1 - -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end=0x00050000 # 64k u-boot-env -hint.map.1.name="u-boot-env" -hint.map.1.readonly=1 - -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00050000 -hint.map.2.end="search:0x00100000:0x10000:.!/bin/sh" -hint.map.2.name="kernel" -hint.map.2.readonly=1 - -hint.map.3.at="flash/spi0" -hint.map.3.start="search:0x00100000:0x10000:.!/bin/sh" -hint.map.3.end=0x007b0000 -hint.map.3.name="rootfs" -hint.map.3.readonly=0 - -hint.map.4.at="flash/spi0" -hint.map.4.start=0x007b0000 -hint.map.4.end=0x007f0000 # 256k cfg -hint.map.4.name="cfg" -hint.map.4.readonly=0 - -hint.map.5.at="flash/spi0" -hint.map.5.start=0x007f0000 -hint.map.5.end=0x00800000 # 64k EEPROM -hint.map.5.name="eeprom" -hint.map.5.readonly=1 diff --git a/sys/mips/conf/ROUTERSTATION b/sys/mips/conf/ROUTERSTATION deleted file mode 100644 index a4823604f7a..00000000000 --- a/sys/mips/conf/ROUTERSTATION +++ /dev/null @@ -1,29 +0,0 @@ -# -# Ubiquiti Routerstation: Boot from onboard flash -# -# - -#NO_UNIVERSE - -include "AR71XX_BASE" -ident "ROUTERSTATION" -hints "ROUTERSTATION.hints" - -# XXX Is there an RTC on the RS? - -# GEOM modules -device geom_redboot # to get access to the SPI flash partitions -device xz -options GEOM_UZIP - -# For DOS -options MSDOSFS - -# Etherswitch support -options ARGE_MDIO -device miiproxy -device etherswitch -device ukswitch - -# Boot path - redboot MFS -options ROOTDEVNAME=\"ufs:redboot/rootfs.uzip\" diff --git a/sys/mips/conf/ROUTERSTATION.hints b/sys/mips/conf/ROUTERSTATION.hints deleted file mode 100644 index e331273dbc3..00000000000 --- a/sys/mips/conf/ROUTERSTATION.hints +++ /dev/null @@ -1,47 +0,0 @@ -# -# - -# arge0 mdio bus -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# Uncomment this hint for RS (not PRO) -# PHY20 = 1 << 20 -hint.arge.0.phymask=0x100000 -hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus - -# should be 100 for RS -hint.arge.1.media=100 -hint.arge.1.fduplex=1 -hint.arge.1.phymask=0x0 -hint.arge.1.mdio=mdioproxy1 # .. off of the switch mdiobus - -# ukswitch -hint.ukswitch.0.at="mdio0" -hint.ukswitch.0.phymask=0x30000 - -# Don't flip on anything that isn't already enabled. -# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're -# not used here. -hint.gpio.0.function_set=0x00000000 -hint.gpio.0.function_clear=0x00000000 - -# These are the GPIO LEDs and buttons which can be software controlled. -hint.gpio.0.pinmask=0x000000ff - -# GPIO 0: Pin 1 -# GPIO 1: Pin 2 -# GPIO 2: RF LED -# GPIO 3: Pin 3 -# GPIO 4: Pin 4 -# GPIO 5: Pin 5 -# GPIO 6: Pin 6 -# GPIO 7: Pin 7 - -# RF led -hint.gpioled.0.at="gpiobus0" -hint.gpioled.0.name="rf" -# pin 2 -hint.gpioled.0.pins=0x0004 diff --git a/sys/mips/conf/ROUTERSTATION_MFS b/sys/mips/conf/ROUTERSTATION_MFS deleted file mode 100644 index dbce57556b3..00000000000 --- a/sys/mips/conf/ROUTERSTATION_MFS +++ /dev/null @@ -1,20 +0,0 @@ -# -# Ubiquiti Routerstation: boot from MFS -# -# - -#NO_UNIVERSE - -include "AR71XX_BASE" -ident "ROUTERSTATION_MFS" -hints "ROUTERSTATION.hints" - -# GEOM modules -device geom_redboot # to get access to the SPI flash partitions -device xz -options GEOM_UZIP - -options ROOTDEVNAME=\"ufs:md0.uzip\" - -options MD_ROOT -options MD_ROOT_SIZE="6144" diff --git a/sys/mips/conf/RSPRO b/sys/mips/conf/RSPRO deleted file mode 100644 index 5971460a9c7..00000000000 --- a/sys/mips/conf/RSPRO +++ /dev/null @@ -1,31 +0,0 @@ -# -# Routerstation Pro: boot from on-board flash -# -# - -#NO_UNIVERSE - -include "AR71XX_BASE" -ident "RSPRO" -hints "RSPRO.hints" - -# RTC - requires hackery in the spibus code to work -device pcf2123_rtc - -# GEOM modules -device geom_redboot # to get access to the SPI flash partitions -device xz -options GEOM_UZIP - -# For DOS -options MSDOSFS - -# For etherswitch support -options ARGE_MDIO -device miiproxy -device etherswitch -device arswitch - -# Boot off of flash -options ROOTDEVNAME=\"ufs:redboot/rootfs.uzip\" - diff --git a/sys/mips/conf/RSPRO.hints b/sys/mips/conf/RSPRO.hints deleted file mode 100644 index 3b99884c3b8..00000000000 --- a/sys/mips/conf/RSPRO.hints +++ /dev/null @@ -1,48 +0,0 @@ - -# arge0 mdio bus -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# arge0: dedicated switch port -hint.arge.0.phymask=0x10 # PHY4 -hint.arge.0.miimode=3 # RGMII -hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus - -# arge1: nail to 1000/full, RGMII - connected to the switch -hint.arge.1.media=1000 # Map to 1000/full -hint.arge.1.fduplex=1 # -hint.arge.1.phymask=0x0 # no directly mapped PHYs -hint.arge.1.miimode=3 # RGMII - -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=0 -hint.arswitch.0.numphys=4 -hint.arswitch.0.phy4cpu=1 -hint.arswitch.0.is_rgmii=1 -hint.arswitch.0.is_gmii=0 - -# Don't flip on anything that isn't already enabled. -# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're -# not used here. -hint.gpio.0.function_set=0x00000000 -hint.gpio.0.function_clear=0x00000000 - -# These are the GPIO LEDs and buttons which can be software controlled. -hint.gpio.0.pinmask=0x000000ff - -# GPIO 0: Pin 1 -# GPIO 1: Pin 2 -# GPIO 2: RF LED -# GPIO 3: Pin 3 -# GPIO 4: Pin 4 -# GPIO 5: Pin 5 -# GPIO 6: Pin 6 -# GPIO 7: Pin 7 - -# RF led -hint.gpioled.0.at="gpiobus0" -hint.gpioled.0.name="rf" -# pin 2 -hint.gpioled.0.pins=0x0004 diff --git a/sys/mips/conf/RSPRO_MFS b/sys/mips/conf/RSPRO_MFS deleted file mode 100644 index 4cccaf92d4b..00000000000 --- a/sys/mips/conf/RSPRO_MFS +++ /dev/null @@ -1,24 +0,0 @@ -# -# Ubiquiti Routerstation Pro: boot from MFS -# -# - -#NO_UNIVERSE - -include "AR71XX_BASE" -ident "RSPRO_MFS" -hints "RSPRO.hints" - -# RTC - requires hackery in the spibus code to work -device pcf2123_rtc - -# GEOM modules -device geom_redboot # to get access to the SPI flash partitions -device xz -options GEOM_UZIP - -# Boot from the first MFS uzip -options ROOTDEVNAME=\"ufs:md0.uzip\" - -options MD_ROOT -options MD_ROOT_SIZE="6144" diff --git a/sys/mips/conf/RSPRO_STANDALONE b/sys/mips/conf/RSPRO_STANDALONE deleted file mode 100644 index fcfcbf3dcbd..00000000000 --- a/sys/mips/conf/RSPRO_STANDALONE +++ /dev/null @@ -1,23 +0,0 @@ -# -# Ubiquiti Routerstation Pro: boot from first DOS-partitioned, BSD -# sliced flash disk. -# -# - -include "AR71XX_BASE" -ident "RSPRO_STANDALONE" -hints "RSPRO.hints" - -# RTC - requires hackery in the spibus code to work -device pcf2123_rtc - -# GEOM modules -device geom_redboot # to get access to the SPI flash partitions -device xz -options GEOM_UZIP - -# For DOS -options MSDOSFS - -# .. first DOS-partitioned, BSD sliced flash disk -options ROOTDEVNAME=\"ufs:da0s1a\" diff --git a/sys/mips/conf/RT2880_FDT b/sys/mips/conf/RT2880_FDT deleted file mode 100644 index 3060bb195d0..00000000000 --- a/sys/mips/conf/RT2880_FDT +++ /dev/null @@ -1,75 +0,0 @@ -# -# RT2880_FDT -- Kernel configuration file for FreeBSD/MIPS RT2880 SoC -# -# This includes all the configurable parts of the kernel. -# -# - -#NO_UNIVERSE - -# -# FDT_DTS_FILE should be modified to suit the target board type. -# -#makeoptions FDT_DTS_FILE=MZK-W04N-XX.dts - -# Start with a base configuration -include "../mediatek/std.rt2880" - -ident RT2880 -cpu CPU_MIPS4KC - -# Don't build any modules by default -makeoptions MODULES_OVERRIDE="" - -# Default rootfs device configuration, should be changed to suit target board -options ROOTDEVNAME=\""ufs:md0.uzip\" - -# Support geom_uzip(4) compressed disk images -device geom_map -options GEOM_UZIP - -# Support md(4) and md-based rootfs -device md -options MD_ROOT - -# Interrupt controller support -device mtk_intr_v1 - -# UART device support -nodevice uart_ns8250 -device uart_dev_mtk - -# SPI and SPI flash support -device mtk_spi_v1 -device spibus -device mx25l - -# CFI support -device cfi -device cfid - -# GPIO and gpioled support -device mtk_gpio_v1 -device gpio -device gpioled - -# USB (dwcotg) support -device usb -device mtk_usb_phy -device dwcotg - -# USB umass(4) storage and da(4) support -device umass -device da - -# CAM support, required if umass(4) is enabled above -device pass -device scbus - -# Ethernet, BPF and bridge support -device rt -device bpf -device if_bridge - -# Extres -device clk diff --git a/sys/mips/conf/RT3050_FDT b/sys/mips/conf/RT3050_FDT deleted file mode 100644 index b0e4feffde0..00000000000 --- a/sys/mips/conf/RT3050_FDT +++ /dev/null @@ -1,76 +0,0 @@ -# -# RT3050_FDT -- Kernel configuration file for FreeBSD/MIPS RT3050, RT3052 and -# RT3350 SoCs -# -# This includes all the configurable parts of the kernel. -# -# - -#NO_UNIVERSE - -# -# FDT_DTS_FILE should be modified to suit the target board type. -# -#makeoptions FDT_DTS_FILE=DIR-600-B1.dts - -# Start with a base configuration -include "../mediatek/std.mediatek" - -ident RT3050 -cpu CPU_MIPS24K - -# Don't build any modules by default -makeoptions MODULES_OVERRIDE="" - -# Default rootfs device configuration, should be changed to suit target board -options ROOTDEVNAME=\"ufs:md0.uzip\" - -# Support geom_uzip(4) compressed disk images -device xz -options GEOM_UZIP - -# Support md(4) and md-based rootfs -device md -options MD_ROOT - -# Interrupt controller support -device mtk_intr_v1 - -# UART device support -nodevice uart_ns8250 -device uart_dev_mtk - -# SPI and SPI flash support -device mtk_spi_v1 -device spibus -device mx25l - -# CFI support -device cfi -device cfid - -# GPIO and gpioled support -device mtk_gpio_v1 -device gpio -device gpioled - -# USB (dwcotg) support -device usb -device mtk_usb_phy -device dwcotg - -# USB umass(4) storage and da(4) support -device umass -device da - -# CAM support, required if umass(4) is enabled above -device pass -device scbus - -# Ethernet, BPF and bridge support -device rt -device bpf -device if_bridge - -# Extres -device clk diff --git a/sys/mips/conf/RT305X.hints b/sys/mips/conf/RT305X.hints deleted file mode 100644 index df2892f0425..00000000000 --- a/sys/mips/conf/RT305X.hints +++ /dev/null @@ -1,136 +0,0 @@ -# device.hints -hint.obio.0.at="nexus0" -hint.obio.0.maddr=0x10000000 -hint.obio.0.msize=0x10000000 - -hint.nvram.0.sig=0xe5e60a74 -hint.nvram.0.base=0x1f030000 -hint.nvram.0.maxsize=0x2000 -hint.nvram.0.flags=3 # 1 = No check, 2 = Format Generic -hint.nvram.1.sig=0x5a045e94 -hint.nvram.1.base=0x1f032000 -hint.nvram.1.maxsize=0x4000 -hint.nvram.1.flags=3 # 1 = No check, 2 = Format Generic - -# on-board Ralink Frame Engine -hint.rt.0.at="nexus0" -hint.rt.0.maddr=0x10100000 -hint.rt.0.msize=0x10000 -hint.rt.0.irq=3 -# macaddr can be statically set -#hint.rt.0.macaddr="xx:xx:xx:xx:xx:xx" - -# on-board Ralink 2872 802.11n core -hint.rt2860.0.at="nexus0" -hint.rt2860.0.maddr=0x10180000 -hint.rt2860.0.msize=0x40000 -hint.rt2860.0.irq=4 - -# uart0 -#hint.uart.0.at="obio0" -#hint.uart.0.maddr=0x10000C00 -#hint.uart.0.msize=0x100 -#hint.uart.0.irq=12 -#hint.uart.0.flags="0x30" - -# uart1 -#hint.uart.1.at="obio0" -#hint.uart.1.maddr=0x10000500 -#hint.uart.1.msize=0x100 -#hint.uart.1.irq=5 -#hint.uart.1.flags="0x30" - - -# gpio -# GPIO0 - WPS BTN IN II IO -hint.gpiobutton.0.at="gpiobus0" -hint.gpiobutton.0.pins="0x01" -hint.gpiobutton.0.name="wps" -hint.gpiobutton.0.flags="0x0581" - -# GPIO7 - MODE SW AP IN II IO -hint.gpiobutton.1.at="gpiobus0" -hint.gpiobutton.1.pins="0x80" -hint.gpiobutton.1.name="mode_ap" -hint.gpiobutton.1.flags="0x0581" - -# GPIO8 - ST LEDRED OUT /* 2pin BiDir RED/BLUE LED */ -# GPIO9 - ST LEDBLUE OUT -hint.gpioled.0.at="gpiobus0" -hint.gpioled.0.pins="0x100" -hint.gpioled.0.name="status_red" -hint.gpioled.0.flags="0x0002" -hint.gpioled.1.at="gpiobus0" -hint.gpioled.1.pins="0x200" -#hint.gpioled.1.name="status_blue" -hint.gpioled.1.name="status" -hint.gpioled.1.flags="0x0002" - -# GPIO10 - RST BTN IN II IO -hint.gpiobutton.2.at="gpiobus0" -hint.gpiobutton.2.pins="0x400" -hint.gpiobutton.2.name="reset" -hint.gpiobutton.2.flags="0x0581" - -# GPIO11 - MODE SW CL IN II IO -hint.gpiobutton.3.at="gpiobus0" -hint.gpiobutton.3.pins="0x800" -hint.gpiobutton.3.name="mode_wlan_client" -hint.gpiobutton.3.flags="0x0581" - -# GPIO14 - WPS LED OUT II IO -hint.gpioled.2.at="gpiobus0" -hint.gpioled.2.pins="0x4000" -hint.gpioled.2.name="wps" -hint.gpioled.2.flags="0x0182" - - - -#0x00000000-0x00030000 : "Bootloader" -#0x00030000-0x00040000 : "Factory" -#0x00040000-0x00070000 : "Config" -#0x00070000-0x000b0000 : "Language" -#0x000b0000-0x001a0000 : "Kernel" -#0x001a0000-0x01000000 : "RootFS" - -hint.map.0.at="cfid0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00030000 -hint.map.0.name="bootloader" -hint.map.0.readonly=1 - -hint.map.1.at="cfid0" -hint.map.1.start=0x00030000 -hint.map.1.end=0x00040000 -hint.map.1.name="factory" - -hint.map.2.at="cfid0" -hint.map.2.start=0x00040000 -hint.map.2.end=0x00800000 -hint.map.2.name="upgrade" - -hint.map.3.at="cfid0" -hint.map.3.start=0x00040000 -hint.map.3.end=0x00050000 -hint.map.3.name="config" - -hint.map.4.at="cfid0" -hint.map.4.start=0x00000000 -hint.map.4.end=0x00000000 -hint.map.4.name="language" - -hint.map.5.at="cfid0" -hint.map.5.start=0x00050000 -hint.map.5.end=0x00150000 -hint.map.5.name="kernel" - -hint.map.6.at="cfid0" -hint.map.6.start=0x00150000 -hint.map.6.end=0x00800000 -hint.map.6.name="rootfs" - - -hint.rt.0.phymask=0x1f -hint.rt.0.media=100 -hint.rt.0.fduplex=1 - diff --git a/sys/mips/conf/RT3352_FDT b/sys/mips/conf/RT3352_FDT deleted file mode 100644 index a461a2a6c42..00000000000 --- a/sys/mips/conf/RT3352_FDT +++ /dev/null @@ -1,72 +0,0 @@ -# -# RT3352_FDT -- Kernel configuration file for FreeBSD/MIPS RT3352 SoC -# -# This includes all the configurable parts of the kernel. -# -# - -#NO_UNIVERSE - -# -# FDT_DTS_FILE should be modified to suit the target board type. -# -#makeoptions FDT_DTS_FILE=DIR-615-H1.dts - -# Start with a base configuration -include "../mediatek/std.mediatek" - -ident RT3352 -cpu CPU_MIPS24K - -# Don't build any modules by default -makeoptions MODULES_OVERRIDE="" - -# Default rootfs device configuration, should be changed to suit target board -options ROOTDEVNAME=\"ufs:md0.uzip\" - -# Support geom_uzip(4) compressed disk images -device xz -options GEOM_UZIP - -# Support md(4) and md-based rootfs -device md -options MD_ROOT - -# Interrupt controller support -device mtk_intr_v1 - -# UART device support -nodevice uart_ns8250 -device uart_dev_mtk - -# SPI and SPI flash support -device mtk_spi_v1 -device spibus -device mx25l - -# GPIO and gpioled support -device mtk_gpio_v1 -device gpio -device gpioled - -# USB (ehci, ohci) support -device usb -device mtk_usb_phy -device ehci -device ohci - -# USB umass(4) storage and da(4) support -device umass -device da - -# CAM support, required if umass(4) is enabled above -device pass -device scbus - -# Ethernet, BPF and bridge support -device rt -device bpf -device if_bridge - -# Extres -device clk diff --git a/sys/mips/conf/RT3883_FDT b/sys/mips/conf/RT3883_FDT deleted file mode 100644 index 8f4ff85d119..00000000000 --- a/sys/mips/conf/RT3883_FDT +++ /dev/null @@ -1,80 +0,0 @@ -# -# RT3883_FDT -- Kernel configuration file for FreeBSD/MIPS RT3662 and RT3883 -# SoCs -# -# This includes all the configurable parts of the kernel. -# -# - -#NO_UNIVERSE - -# -# FDT_DTS_FILE should be modified to suit the target board type. -# -#makeoptions FDT_DTS_FILE=DIR-645.dts - -# Start with a base configuration -include "../mediatek/std.mediatek" - -ident RT3883 -cpu CPU_MIPS74K - -# Don't build any modules by default -makeoptions MODULES_OVERRIDE="" - -# Default rootfs device configuration, should be changed to suit target board -options ROOTDEVNAME=\"ufs:md0.uzip\" - -# Support geom_uzip(4) compressed disk images -device xz -options GEOM_UZIP - -# Support md(4) and md-based rootfs -device md -options MD_ROOT - -# Interrupt controller support -device mtk_intr_v1 - -# UART device support -nodevice uart_ns8250 -device uart_dev_mtk - -# SPI and SPI flash support -device mtk_spi_v1 -device spibus -device mx25l - -# CFI support -#device cfi -#device cfid - -# GPIO and gpioled support -device mtk_gpio_v1 -device gpio -device gpioled - -# USB (dwcotg) support -device usb -device mtk_usb_phy -device dwcotg - -# USB umass(4) storage and da(4) support -device umass -device da - -# CAM support, required if umass(4) is enabled above -device pass -device scbus - -# Ethernet, BPF and bridge support -device rt -device bpf -device if_bridge - -# Extres -device clk - -# For now there's no etherswitch support for RT3662/RT3883 -nodevice etherswitch -nodevice mtkswitch diff --git a/sys/mips/conf/RT5350.hints b/sys/mips/conf/RT5350.hints deleted file mode 100644 index 297ca478cba..00000000000 --- a/sys/mips/conf/RT5350.hints +++ /dev/null @@ -1,34 +0,0 @@ -# device.hints -hint.obio.0.at="nexus0" -hint.obio.0.maddr=0x10000000 -hint.obio.0.msize=0x10000000 - -hint.mx25l.0.at="spibus0" - -#hint.nvram.0.sig=0xe5e60a74 -#hint.nvram.0.base=0x1f030000 -#hint.nvram.0.maxsize=0x2000 -#hint.nvram.0.flags=3 # 1 = No check, 2 = Format Generic -#hint.nvram.1.sig=0x5a045e94 -#hint.nvram.1.base=0x1f032000 -#hint.nvram.1.maxsize=0x4000 -#hint.nvram.1.flags=3 # 1 = No check, 2 = Format Generic - -# on-board Ralink Frame Engine -hint.rt.0.at="nexus0" -hint.rt.0.maddr=0x10100000 -hint.rt.0.msize=0x10000 -hint.rt.0.irq=3 -# macaddr can be statically set -#hint.rt.0.macaddr="xx:xx:xx:xx:xx:xx" - -# on-board Ralink 2872 802.11n core -hint.rt2860.0.at="nexus0" -hint.rt2860.0.maddr=0x10180000 -hint.rt2860.0.msize=0x40000 -hint.rt2860.0.irq=4 - -hint.rt.0.phymask=0x1f -hint.rt.0.media=100 -hint.rt.0.fduplex=1 - diff --git a/sys/mips/conf/RT5350_FDT b/sys/mips/conf/RT5350_FDT deleted file mode 100644 index 080449579ce..00000000000 --- a/sys/mips/conf/RT5350_FDT +++ /dev/null @@ -1,72 +0,0 @@ -# -# RT5350_FDT -- Kernel configuration file for FreeBSD/MIPS RT5350 SoC -# -# This includes all the configurable parts of the kernel. -# -# - -#NO_UNIVERSE - -# -# FDT_DTS_FILE should be modified to suit the target board type. -# -#makeoptions FDT_DTS_FILE=DIR-610-A1.dts - -# Start with a base configuration -include "../mediatek/std.mediatek" - -ident RT5350 -cpu CPU_MIPS24K - -# Don't build any modules by default -makeoptions MODULES_OVERRIDE="" - -# Default rootfs device configuration, should be changed to suit target board -options ROOTDEVNAME=\"ufs:md0.uzip\" - -# Support geom_uzip(4) compressed disk images -device xz -options GEOM_UZIP - -# Support md(4) and md-based rootfs -device md -options MD_ROOT - -# Interrupt controller support -device mtk_intr_v1 - -# UART device support -nodevice uart_ns8250 -device uart_dev_mtk - -# SPI and SPI flash support -device mtk_spi_v1 -device spibus -device mx25l - -# GPIO and gpioled support -device mtk_gpio_v1 -device gpio -device gpioled - -# USB (ehci, ohci) support -device usb -device mtk_usb_phy -device ehci -device ohci - -# USB umass(4) storage and da(4) support -device umass -device da - -# CAM support, required if umass(4) is enabled above -device pass -device scbus - -# Ethernet, BPF and bridge support -device rt -device bpf -device if_bridge - -# Extres -device clk diff --git a/sys/mips/conf/TL-ARCHERC7V2 b/sys/mips/conf/TL-ARCHERC7V2 deleted file mode 100644 index b9f81ee79d5..00000000000 --- a/sys/mips/conf/TL-ARCHERC7V2 +++ /dev/null @@ -1,69 +0,0 @@ -# -# TP-Link Archer C7 - based on the AP135 reference design. -# -# This contains a QCA9558 MIPS74k SoC with on-board 3x3 2GHz wifi, -# 128MiB RAM, an AR8327 5-port gigabit ethernet switch and -# a QCA 11ac 5GHz AP NIC. -# -# The to things not currently support are the QCA 11ac NIC and -# PCIe host controllers - there's two of them, and the existing -# PCIe code here doesn't support that just yet. -# -# - -#NO_UNIVERSE - -# Include the default QCA955x parameters -include "std.QCA955X" - -ident TL-ARCHERC7V2 - -# Override hints with board values -hints "TL-ARCHERC7V2.hints" - -# Force the board memory - this has 128MiB RAM -options AR71XX_REALMEM=(128*1024*1024) - -# i2c GPIO bus -#device gpioiic -#device iicbb -#device iicbus -#device iic - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# read MSDOS formatted disks - USB -options MSDOSFS - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# uzip - to boot natively from flash -device xz -options GEOM_UZIP - -# Used for the static uboot partition map -device geom_map - -# yes, this board has a PCIe connected atheros device -# add ath_pci so it can at least attach things when there's a -# ath(4) in there, rather than the 11ac chip we don't support. -device pci -device qca955x_pci - -device ath_pci -options AR71XX_ATH_EEPROM -device firmware # Used by the above -options ATH_EEPROM_FIRMWARE - -# Boot off of the rootfs, as defined in the geom_map setup. -options ROOTDEVNAME=\"ufs:map/rootfs.uzip\" - -# Default to accept -options IPFIREWALL_DEFAULT_TO_ACCEPT diff --git a/sys/mips/conf/TL-ARCHERC7V2.hints b/sys/mips/conf/TL-ARCHERC7V2.hints deleted file mode 100644 index 81a08afba09..00000000000 --- a/sys/mips/conf/TL-ARCHERC7V2.hints +++ /dev/null @@ -1,199 +0,0 @@ -# The Archer C7 v2 is based on the AP135-020 board, with -# TP-Link specific bits (eg flash layout, MAC address, etc.) - -# QCA955X_ETH_CFG_RGMII_EN (1 << 0) -hint.qca955x_gmac.0.gmac_cfg=0x1 - -# Use base mac address for wifi; +1 and +2 for arge0/arge1. -hint.ar71xx.0.eeprom_mac_addr=0x1f01fc00 -hint.ar71xx.0.eeprom_mac_isascii=0 - -hint.ar71xx_mac_map.0.devid=ath -hint.ar71xx_mac_map.0.unitid=0 -hint.ar71xx_mac_map.0.offset=0 -hint.ar71xx_mac_map.0.is_local=0 - -hint.ar71xx_mac_map.1.devid=arge -hint.ar71xx_mac_map.1.unitid=0 -hint.ar71xx_mac_map.1.offset=1 -hint.ar71xx_mac_map.1.is_local=0 - -hint.ar71xx_mac_map.2.devid=arge -hint.ar71xx_mac_map.2.unitid=1 -hint.ar71xx_mac_map.2.offset=2 -hint.ar71xx_mac_map.2.is_local=0 - -# mdiobus0 on arge0 -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# mdiobus1 on arge1 - required to bring up arge1? -hint.argemdio.1.at="nexus0" -hint.argemdio.1.maddr=0x1a000000 -hint.argemdio.1.msize=0x1000 -hint.argemdio.1.order=0 - -# AR8327 - connected via mdiobus0 on arge0 -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=0 # definitely not the internal switch! -hint.arswitch.0.is_9340=0 # not the internal switch! -hint.arswitch.0.numphys=5 # all ports are PHYs -hint.arswitch.0.phy4cpu=0 -hint.arswitch.0.is_rgmii=0 # not needed -hint.arswitch.0.is_gmii=0 # not needed - -# This is where it gets a bit odd. port 0 and port 6 are CPU ports. -# The current code only supports one CPU port. So hm, what should -# we do to hook PAD6 up to be RGMII but a PHY, not a MAC? - -# The other trick - how do we get arge1 (hooked up to GMAC0) to work? -# That's currently supposed to be hooked up to CPU port 0. - -# Other AR8327 configuration parameters - -# AP136-020 parameters - -# GMAC0 AR8327 -> GMAC1 (arge1) SoC, SGMII - -# AR8327_PAD_MAC_SGMII -hint.arswitch.0.pad.0.mode=3 -#hint.arswitch.0.pad.0.rxclk_delay_sel=0 -hint.arswitch.0.pad.0.sgmii_delay_en=1 - -# GMAC6 AR8327 -> GMAC0 (arge0) SoC, RGMII - -# AR8327_PAD_MAC_RGMII -# XXX I think this hooks it up to the internal MAC6 -hint.arswitch.0.pad.6.mode=6 -hint.arswitch.0.pad.6.txclk_delay_en=1 -hint.arswitch.0.pad.6.rxclk_delay_en=1 -# AR8327_CLK_DELAY_SEL1 -hint.arswitch.0.pad.6.txclk_delay_sel=1 -# AR8327_CLK_DELAY_SEL2 -hint.arswitch.0.pad.6.rxclk_delay_sel=2 - -# XXX there's no LED management just yet! -hint.arswitch.0.led.ctrl0=0xc737c737 -hint.arswitch.0.led.ctrl1=0x00000000 -hint.arswitch.0.led.ctrl2=0x00000000 -hint.arswitch.0.led.ctrl3=0x00c30c00 -hint.arswitch.0.led.open_drain=0 - -# force_link=1 is required for the rest of the parameters -# to be configured. -hint.arswitch.0.port.0.force_link=1 -hint.arswitch.0.port.0.speed=1000 -hint.arswitch.0.port.0.duplex=1 -hint.arswitch.0.port.0.txpause=1 -hint.arswitch.0.port.0.rxpause=1 - -# force_link=1 is required for the rest of the parameters -# to be configured. -hint.arswitch.0.port.6.force_link=1 -hint.arswitch.0.port.6.speed=1000 -hint.arswitch.0.port.6.duplex=1 -hint.arswitch.0.port.6.txpause=1 -hint.arswitch.0.port.6.rxpause=1 - -# arge0 - hooked up to AR8327 GMAC6, RGMII -# set at 1000/full to the switch. -# so, lock both sides of this connect up to 1000/full; -# if_arge thus wont change the PLL configuration -# upon a link status change. -hint.arge.0.phymask=0x0 -hint.arge.0.miimode=3 # RGMII -hint.arge.0.media=1000 -hint.arge.0.fduplex=1 -hint.arge.0.pll_1000=0x56000000 - -# MAC for arge0 is the first 6 bytes of the ART -hint.arge.0.eeprommac=0x1fff0000 - -# arge1 - lock up to 1000/full -hint.arge.1.phymask=0x0 -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 -hint.arge.1.miimode=5 # SGMII -hint.arge.1.pll_1000=0x03000101 - -# MAC for arge1 is the second 6 bytes of the ART -hint.arge.1.eeprommac=0x1fff0006 - -# ath0: Where the ART is - last 64k in the flash -hint.ath.0.eepromaddr=0x1fff0000 -hint.ath.0.eepromsize=16384 - -# ath1: it's different; it's a PCIe attached device, so -# we instead need to teach the PCIe bridge code about it -# (ie, the 'early pci fixup' stuff that programs the PCIe -# host registers on the NIC) and then we teach ath where -# to find it. - -# ath1 hint - pcie slot 0 -# hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff4000 -# hint.pcib.0.bus.0.0.0.ath_fixup_size=16384 - -# ath0 - eeprom comes from here -# hint.ath.1.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware" - -# Flash layout - the tplink layout differs to what's passed -# in via the kernel environment. What's passed in is based on -# the AP135, but.. well, TP-Link. - -# 128 KiB u-boot -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00020000 # 128k u-boot -hint.map.0.name="u-boot" -hint.map.0.readonly=1 - -# Kernel -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00020000 -hint.map.1.end="search:0x00020000:0x10000:.!/bin/sh" -hint.map.1.name="kernel" -hint.map.1.readonly=1 - -# Root -hint.map.2.at="flash/spi0" -hint.map.2.start="search:0x00020000:0x10000:.!/bin/sh" -hint.map.2.end=0x007d0000 -hint.map.2.name="rootfs" -hint.map.2.readonly=1 - -# 64KiB cfg -hint.map.4.at="flash/spi0" -hint.map.4.start=0x00fe0000 -hint.map.4.end=0x00ff0000 -hint.map.4.name="cfg" -hint.map.4.readonly=0 - -# 64KiB ART -hint.map.6.at="flash/spi0" -hint.map.6.start=0x00ff0000 -hint.map.6.end=0x01000000 # 64k ART -hint.map.6.name="ART" -hint.map.6.readonly=1 - -# TODO: GPIO config -# These are the GPIO LEDs and buttons which can be software controlled. -hint.gpio.0.pinmask=0x00600000 - -# Enable GPIO21, GPIO22 output and high - for USB power -hint.gpio.0.pinon=0x00600000 - -# TODO: GPIO pin config: -# LED_WLAN2G 12 -# BTN_RFKILL 13 -# LED_SYSTEM 14 -# LED_QSS 15 -# BTN_RESET 16 -# LED_WLAN5G 17 -# LED_USB1 18 -# LED_USB2 19 -# USB2_POWER 21 -# USB1_POWER 22 - -# TODO: PCIe isn't showing link; maybe uboot isn't initialising diff --git a/sys/mips/conf/TL-WDR4300 b/sys/mips/conf/TL-WDR4300 deleted file mode 100644 index a1db0d07535..00000000000 --- a/sys/mips/conf/TL-WDR4300 +++ /dev/null @@ -1,60 +0,0 @@ -# -# TPLink TL-WDR4300 - AR9344 based dual-band 2x2 wifi -# -# - -#NO_UNIVERSE - -# Include the default AR934x parameters -include "std.AR934X" - -ident TL-WDR4300 - -# Override hints with board values -hints "TL-WDR4300.hints" - -# Force the board memory - the base DB120 has 128MB RAM -options AR71XX_REALMEM=(128*1024*1024) - -# i2c GPIO bus -#device gpioiic -#device iicbb -#device iicbus -#device iic - -# Options required for miiproxy and mdiobus -options ARGE_DEBUG -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# read MSDOS formatted disks - USB -options MSDOSFS - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# uzip - to boot natively from flash -device xz -options GEOM_UZIP - -# Used for the static uboot partition map -device geom_map - -# Yes, this board has a PCI connected atheros device -options AR71XX_ATH_EEPROM -device firmware # Used by the above -options ATH_EEPROM_FIRMWARE - -options ATH_DEBUG_ALQ - -# Boot off of the rootfs, as defined in the geom_map setup. -options ROOTDEVNAME=\"ufs:map/rootfs.uzip\" - -# This is required for the 2GHz LNAs on the AR9340 SoC. -# Without this the 2GHz radio is Quite Deaf. -device gpio -device gpioled diff --git a/sys/mips/conf/TL-WDR4300.hints b/sys/mips/conf/TL-WDR4300.hints deleted file mode 100644 index c0e643f7256..00000000000 --- a/sys/mips/conf/TL-WDR4300.hints +++ /dev/null @@ -1,236 +0,0 @@ - -# MAC/ART ? - they're 00:02:03:04:05:06 :( - -# ath0 chain0 EXTERNAL_LNA0: 18 -# ath0 chain1 EXTERNAL_LNA1: 19 -# These are configured as GPIO output, init low, then -# set the GPIO 'type' AR934X_GPIO_OUT_EXT_LNA0/AR934X_GPIO_OUT_EXT_LNA1. - -# XXX There's no arge1 on this! - -# XXX RFKILL? - -# mdiobus0 on arge0 -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# DB120 GMAC configuration -# + AR934X_ETH_CFG_RGMII_GMAC0 (1 << 0) -hint.ar934x_gmac.0.gmac_cfg=0x1 - -# Board mac address is at 0x1f01fc00. -# ath0: offset 0 -# ath1: offset -1 -# arge0: offset -2 -# arge1: not hooked up; doesn't matter -hint.ar71xx.0.eeprom_mac_addr=0x1f01fc00 -hint.ar71xx.0.eeprom_mac_isascii=0 - -hint.ar71xx_mac_map.0.devid=ath -hint.ar71xx_mac_map.0.unitid=0 -hint.ar71xx_mac_map.0.offset=0 -hint.ar71xx_mac_map.0.is_local=0 - -hint.ar71xx_mac_map.1.devid=ath -hint.ar71xx_mac_map.1.unitid=1 -hint.ar71xx_mac_map.1.offset=-1 -hint.ar71xx_mac_map.1.is_local=0 - -hint.ar71xx_mac_map.2.devid=arge -hint.ar71xx_mac_map.2.unitid=0 -hint.ar71xx_mac_map.2.offset=-2 -hint.ar71xx_mac_map.2.is_local=0 - -# GMAC0 here - connected to an AR8327 -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=0 -hint.arswitch.0.is_9340=0 # not the internal switch! -hint.arswitch.0.numphys=5 -hint.arswitch.0.phy4cpu=0 -hint.arswitch.0.is_rgmii=0 -hint.arswitch.0.is_gmii=0 - -# Other AR8327 configuration parameters - -# AR8327_PAD_MAC_RGMII -hint.arswitch.0.pad.0.mode=6 -hint.arswitch.0.pad.0.txclk_delay_en=1 -hint.arswitch.0.pad.0.rxclk_delay_en=1 -# AR8327_CLK_DELAY_SEL1 -hint.arswitch.0.pad.0.txclk_delay_sel=1 -# AR8327_CLK_DELAY_SEL2 -hint.arswitch.0.pad.0.rxclk_delay_sel=2 - -# XXX there's no LED management just yet! -hint.arswitch.0.led.ctrl0=0xc737c737 -hint.arswitch.0.led.ctrl1=0x00000000 -hint.arswitch.0.led.ctrl2=0x00000000 -hint.arswitch.0.led.ctrl3=0x0030c300 -hint.arswitch.0.led.open_drain=0 - -# force_link=1 is required for the rest of the parameters -# to be configured. -hint.arswitch.0.port.0.force_link=1 -hint.arswitch.0.port.0.speed=1000 -hint.arswitch.0.port.0.duplex=1 -hint.arswitch.0.port.0.txpause=1 -hint.arswitch.0.port.0.rxpause=1 - -# XXX OpenWRT DB120 BSP doesn't have media/duplex set? -hint.arge.0.phymask=0x0 -hint.arge.0.media=1000 -hint.arge.0.fduplex=1 -hint.arge.0.miimode=3 # RGMII -hint.arge.0.pll_1000=0x06000000 - -# mdiobus1 on arge1 -hint.argemdio.1.at="nexus0" -hint.argemdio.1.maddr=0x1a000000 -hint.argemdio.1.msize=0x1000 -hint.argemdio.1.order=0 - -# Embedded switch on the AR9344 -# mdio1 is actually created as the AR8327 internal bus; so -# this pops up as mdio2. -# -# XXX TODO: there's no need for AR9344 internal switch; it isn't exposed -hint.arswitch.1.at="mdio2" -hint.arswitch.1.is_7240=0 -hint.arswitch.1.is_9340=1 -hint.arswitch.1.numphys=5 -hint.arswitch.1.phy4cpu=0 # phy 4 is not a "CPU port" PHY here -hint.arswitch.1.is_rgmii=0 -hint.arswitch.1.is_gmii=1 # arge1 <-> switch PHY is GMII - -# arge1 - lock up to 1000/full -hint.arge.1.phymask=0x0 # Nothing attached here (XXX?) -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 -hint.arge.1.miimode=1 # GMII - -# MAC for arge1 is the second 6 bytes of the ART -# hint.arge.1.eeprommac=0x1f7f0006 - -# ART calibration data mapping - for the AR934x AHB device -hint.ar71xx_caldata.0.at="nexus0" -hint.ar71xx_caldata.0.order=0 -# Where the ART is - last 64k in the first 8MB of flash -hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000 -hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384 - -# And now tell the ath(4) driver where to look! -hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware" - -# ath1: it's different; it's a PCIe attached device, so -# we instead need to teach the PCIe bridge code about it -# (ie, the 'early pci fixup' stuff that programs the PCIe -# host registers on the NIC) and then we teach ath where -# to find it. - -# ath1 hint - pcie slot 0 -hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff4000 -hint.pcib.0.bus.0.0.0.ath_fixup_size=16384 - -# ath0 - eeprom comes from here -hint.ath.1.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware" - -# flash layout: -# -# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),64k(mib0),64k(ART) - -# 128KiB uboot -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00020000 # 128k u-boot -hint.map.0.name="u-boot" -hint.map.0.readonly=1 - -# kernel -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00020000 -hint.map.2.end="search:0x00020000:0x10000:.!/bin/sh" -hint.map.2.name="kernel" -hint.map.2.readonly=1 - -# 1344KiB uImage -hint.map.3.at="flash/spi0" -hint.map.3.start="search:0x00020000:0x10000:.!/bin/sh" -hint.map.3.end=0x007d0000 -hint.map.3.name="rootfs" -hint.map.3.readonly=1 - -# 64KiB cfg -hint.map.4.at="flash/spi0" -hint.map.4.start=0x007d0000 -hint.map.4.end=0x007e0000 -hint.map.4.name="cfg" -hint.map.4.readonly=0 - -# 64KiB mib0 -hint.map.5.at="flash/spi0" -hint.map.5.start=0x007e0000 -hint.map.5.end=0x007f0000 # 64k mib0 -hint.map.5.name="mib0" -hint.map.5.readonly=1 - -# 64KiB ART -hint.map.6.at="flash/spi0" -hint.map.6.start=0x007f0000 -hint.map.6.end=0x00800000 # 64k ART -hint.map.6.name="ART" -hint.map.6.readonly=1 - -# GPIO configuration -# GPIO21 and GPIO22 - USB1 and USB2 power -# ath0 chain0 EXTERNAL_LNA0: 18, output -# ath0 chain1 EXTERNAL_LNA1: 19, output - -# These are the GPIO LEDs and buttons which can be software controlled. -hint.gpio.0.pinmask=0x0063f800 - -# Enable GPIO21, GPIO22 output and high - for USB power -hint.gpio.0.pinon=0x00600000 - -hint.gpio.0.func.18.gpiofunc=46 -hint.gpio.0.func.18.gpiomode=1 # output, default low - -hint.gpio.0.func.19.gpiofunc=47 -hint.gpio.0.func.19.gpiomode=1 # output, default low - -# LED QSS - 15 -# LED SYSTEM - 14 -# LED USB1 - 11 -# LED USB2 - 12 -# LED WLAN2G - 13 - -# SWITCH WPS - 16 -# SWITCH RFKILL - 17 - -hint.gpioled.0.at="gpiobus0" -hint.gpioled.0.name="USB1" -hint.gpioled.0.pins=0x0800 -hint.gpioled.0.invert=1 - -hint.gpioled.1.at="gpiobus0" -hint.gpioled.1.name="USB2" -hint.gpioled.1.pins=0x1000 -hint.gpioled.1.invert=1 - -hint.gpioled.2.at="gpiobus0" -hint.gpioled.2.name="WLAN2G" -hint.gpioled.2.pins=0x2000 -hint.gpioled.2.invert=1 - -hint.gpioled.3.at="gpiobus0" -hint.gpioled.3.name="SYSTEM" -hint.gpioled.3.pins=0x4000 -hint.gpioled.3.invert=1 - -hint.gpioled.4.at="gpiobus0" -hint.gpioled.4.name="QSS" -hint.gpioled.4.pins=0x8000 -hint.gpioled.4.invert=1 - -# XXX TODO: WPS/RFKILL switch diff --git a/sys/mips/conf/TL-WR1043NDv2 b/sys/mips/conf/TL-WR1043NDv2 deleted file mode 100644 index 329b472a1ee..00000000000 --- a/sys/mips/conf/TL-WR1043NDv2 +++ /dev/null @@ -1,52 +0,0 @@ -# -# TP-Link TL-WR1043nd v2 - based on the AP135 reference design. -# -# This contains a QCA9558 MIPS74k SoC with on-board 3x3 2GHz wifi, -# 64MiB RAM and an AR8327 5-port gigabit ethernet switch. -# -# - -#NO_UNIVERSE - -# Include the default QCA955x parameters -include "std.QCA955X" - -ident TL-WR1043NDv2 - -# Override hints with board values -hints "TL-WR1043NDv2.hints" - -options AR71XX_REALMEM=(64*1024*1024) - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# read MSDOS formatted disks - USB -options MSDOSFS - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# uzip - to boot natively from flash -device xz -options GEOM_UZIP - -# Used for the static uboot partition map -device geom_map - -# yes, this board has a PCI connected atheros device -#device ath_pci -#options AR71XX_ATH_EEPROM -#device firmware # Used by the above -#options ATH_EEPROM_FIRMWARE - -# Boot off of the rootfs, as defined in the geom_map setup. -options ROOTDEVNAME=\"ufs:map/rootfs.uzip\" - -# Default to accept -options IPFIREWALL_DEFAULT_TO_ACCEPT diff --git a/sys/mips/conf/TL-WR1043NDv2.hints b/sys/mips/conf/TL-WR1043NDv2.hints deleted file mode 100644 index 4b9a18b1b59..00000000000 --- a/sys/mips/conf/TL-WR1043NDv2.hints +++ /dev/null @@ -1,164 +0,0 @@ -# The TP-Link 1043NDv2 is based on the AP135 with a couple of minor -# differences - well, besides having no 11ac. - -# QCA955X_ETH_CFG_RGMII_EN (1 << 0) -hint.qca955x_gmac.0.gmac_cfg=0x1 - -# Use base mac address for wifi; +1 and +2 for arge0/arge1. -hint.ar71xx.0.eeprom_mac_addr=0x1f01fc00 -hint.ar71xx.0.eeprom_mac_isascii=0 - -hint.ar71xx_mac_map.0.devid=ath -hint.ar71xx_mac_map.0.unitid=0 -hint.ar71xx_mac_map.0.offset=0 -hint.ar71xx_mac_map.0.is_local=0 - -hint.ar71xx_mac_map.1.devid=arge -hint.ar71xx_mac_map.1.unitid=0 -hint.ar71xx_mac_map.1.offset=1 -hint.ar71xx_mac_map.1.is_local=0 - -hint.ar71xx_mac_map.2.devid=arge -hint.ar71xx_mac_map.2.unitid=1 -hint.ar71xx_mac_map.2.offset=2 -hint.ar71xx_mac_map.2.is_local=0 - -# mdiobus0 on arge0 -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# mdiobus1 on arge1 - required to bring up arge1? -hint.argemdio.1.at="nexus0" -hint.argemdio.1.maddr=0x1a000000 -hint.argemdio.1.msize=0x1000 -hint.argemdio.1.order=0 - -# AR8327 - connected via mdiobus0 on arge0 -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=0 # definitely not the internal switch! -hint.arswitch.0.is_9340=0 # not the internal switch! -hint.arswitch.0.numphys=5 # all ports are PHYs -hint.arswitch.0.phy4cpu=0 -hint.arswitch.0.is_rgmii=0 # not needed -hint.arswitch.0.is_gmii=0 # not needed - -# This is where it gets a bit odd. port 0 and port 6 are CPU ports. -# The current code only supports one CPU port. So hm, what should -# we do to hook PAD6 up to be RGMII but a PHY, not a MAC? - -# The other trick - how do we get arge1 (hooked up to GMAC0) to work? -# That's currently supposed to be hooked up to CPU port 0. - -# Other AR8327 configuration parameters - -# AP136-020 parameters - -# GMAC0 AR8327 -> GMAC1 (arge1) SoC, SGMII - -# AR8327_PAD_MAC_SGMII -hint.arswitch.0.pad.0.mode=3 -#hint.arswitch.0.pad.0.rxclk_delay_sel=0 -hint.arswitch.0.pad.0.sgmii_delay_en=1 - -# GMAC6 AR8327 -> GMAC0 (arge0) SoC, RGMII - -# AR8327_PAD_MAC_RGMII -hint.arswitch.0.pad.6.mode=6 -hint.arswitch.0.pad.6.txclk_delay_en=1 -hint.arswitch.0.pad.6.rxclk_delay_en=1 -# AR8327_CLK_DELAY_SEL1 -hint.arswitch.0.pad.6.txclk_delay_sel=1 -# AR8327_CLK_DELAY_SEL2 -hint.arswitch.0.pad.6.rxclk_delay_sel=2 - -hint.arswitch.0.led.ctrl0=0xcc35cc35 -hint.arswitch.0.led.ctrl1=0xca35ca35 -hint.arswitch.0.led.ctrl2=0xc935c935 -hint.arswitch.0.led.ctrl3=0x03ffff00 -int.arswitch.0.led.open_drain=1 - -# force_link=1 is required for the rest of the parameters -# to be configured. -hint.arswitch.0.port.0.force_link=1 -hint.arswitch.0.port.0.speed=1000 -hint.arswitch.0.port.0.duplex=1 -hint.arswitch.0.port.0.txpause=1 -hint.arswitch.0.port.0.rxpause=1 - -# force_link=1 is required for the rest of the parameters -# to be configured. -hint.arswitch.0.port.6.force_link=1 -hint.arswitch.0.port.6.speed=1000 -hint.arswitch.0.port.6.duplex=1 -hint.arswitch.0.port.6.txpause=1 -hint.arswitch.0.port.6.rxpause=1 - -# arge0 - hooked up to AR8327 GMAC6, RGMII -# set at 1000/full to the switch. -# so, lock both sides of this connect up to 1000/full; -# if_arge thus wont change the PLL configuration -# upon a link status change. -hint.arge.0.phymask=0x0 -hint.arge.0.miimode=3 # RGMII -hint.arge.0.media=1000 -hint.arge.0.fduplex=1 -hint.arge.0.pll_1000=0x56000000 - -# arge1 - lock up to 1000/full -hint.arge.1.phymask=0x0 -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 -hint.arge.1.miimode=5 # SGMII -hint.arge.1.pll_1000=0x03000101 - -# hint.arge.1.eeprommac=0x1f01fc06 - -# ath0: Where the ART is - last 64k in the flash -hint.ath.0.eepromaddr=0x1fff0000 -hint.ath.0.eepromsize=16384 - -# 128 KiB u-boot -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00020000 # 128k u-boot -hint.map.0.name="u-boot" -hint.map.0.readonly=1 - -# The TP-Link firmware will put the kernel first (variable size); -# then the rootfs will be placed hopefully at a 64KiB alignment -# by whatever calls mktplinkfw. - -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00020000 -hint.map.1.end="search:0x00020000:0x10000:.!/bin/sh" -hint.map.1.name="kernel" -hint.map.1.readonly=1 - -hint.map.2.at="flash/spi0" -hint.map.2.start="search:0x00020000:0x10000:.!/bin/sh" -hint.map.2.end=0x007d0000 -hint.map.2.name="rootfs" -hint.map.2.readonly=1 - -# 64KiB cfg -hint.map.3.at="flash/spi0" -hint.map.3.start=0x007d0000 -hint.map.3.end=0x007e0000 -hint.map.3.name="cfg" -hint.map.3.readonly=0 - -# 64KiB mib0 -hint.map.4.at="flash/spi0" -hint.map.4.start=0x007e0000 -hint.map.4.end=0x007f0000 -hint.map.4.name="mib0" -hint.map.4.readonly=1 - -# 64KiB ART -hint.map.5.at="flash/spi0" -hint.map.5.start=0x007f0000 -hint.map.5.end=0x00800000 # 64k ART -hint.map.5.name="ART" -hint.map.5.readonly=1 diff --git a/sys/mips/conf/TL-WR740Nv4 b/sys/mips/conf/TL-WR740Nv4 deleted file mode 100644 index cfac6dfc8af..00000000000 --- a/sys/mips/conf/TL-WR740Nv4 +++ /dev/null @@ -1,54 +0,0 @@ -# -# TP-Link WR740N v4 -# -# * AR9330 SoC -# * 32MB RAM -# * 4MB flash -# * Integrated 1x1 2GHz wifi and 10/100 bridge -# -# - -#NO_UNIVERSE - -# Include the default AR933x parameters -include "std.AR933X" - -ident TL-WR740Nv4 - -# Override hints with board values -hints "TL-WR740Nv4.hints" - -# Board memory - 32MB -options AR71XX_REALMEM=(32*1024*1024) - -# i2c GPIO bus -#device gpioiic -#device iicbb -#device iicbus -#device iic - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# read MSDOS formatted disks - USB -#options MSDOSFS - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# uzip - to boot natively from flash -device xz -options GEOM_UZIP - -# Used for the static uboot partition map -device geom_map - -# Boot off of the rootfs, as defined in the geom_map setup. -# options ROOTDEVNAME=\"ufs:map/rootfs.uzip\" -# Note: we don't fit in 4MB flash, so the rootfs must be on USB for now -options ROOTDEVNAME=\"ufs:da0\" diff --git a/sys/mips/conf/TL-WR740Nv4.hints b/sys/mips/conf/TL-WR740Nv4.hints deleted file mode 100644 index 87262d414f1..00000000000 --- a/sys/mips/conf/TL-WR740Nv4.hints +++ /dev/null @@ -1,86 +0,0 @@ -# -# This file adds to the values in AR933X_BASE.hints -# - -# mdiobus on arge1 -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x1a000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# Embedded Atheros Switch -hint.arswitch.0.at="mdio0" - -# XXX this should really say it's an AR933x switch, as there -# are some vlan specific differences here! -hint.arswitch.0.is_7240=1 -hint.arswitch.0.numphys=4 -hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY -hint.arswitch.0.is_rgmii=0 -hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII - -# arge0 - MII, autoneg, phy(4) -hint.arge.0.phymask=0x10 # PHY4 -hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus -hint.arge.0.eeprommac=0x1fff0000 - -# arge1 - GMII, 1000/full -hint.arge.1.phymask=0x0 # No directly mapped PHYs -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 -hint.arge.1.eeprommac=0x1fff0006 - -# Where the ART is - last 64k in the flash -# 0x9fff1000 ? -hint.ath.0.eepromaddr=0x1fff0000 -hint.ath.0.eepromsize=16384 - -# The TL-WR740N v4 is a default AP121 - it comes with 4MB flash. -# -# The boot parameters: -# bootargs=console=ttyS0,115200 root=31:02 rootfstype=squashfs init=/sbin/init -# mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),2752k(rootfs), -# 896k(uImage),64k(NVRAM),64k(ART) -# bootcmd=bootm 0x9f020000 -# -# .. so uboot is 128K, there's no ubootenv, and the runtime image starts -# at 0x9f020000. - -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x000020000 -hint.map.0.name="uboot" -hint.map.0.readonly=1 - -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00020000 -hint.map.1.end=0x003e0000 -hint.map.1.name="kernel" -hint.map.1.readonly=0 - -hint.map.2.at="flash/spi0" -hint.map.2.start=0x003e0000 -hint.map.2.end=0x003f0000 -hint.map.2.name="cfg" -hint.map.2.readonly=0 - -# This is radio calibration section. It is (or should be!) unique -# for each board, to take into account thermal and electrical differences -# as well as the regulatory compliance data. -# -hint.map.3.at="flash/spi0" -hint.map.3.start=0x003f0000 -hint.map.3.end=0x0x400000 -hint.map.3.name="art" -hint.map.3.readonly=1 - -# GPIO specific configuration block - -# Don't flip on anything that isn't already enabled. -# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're -# not used here. -hint.gpio.0.function_set=0x00000000 -hint.gpio.0.function_clear=0x00000000 - -# These are the GPIO LEDs and buttons which can be software controlled. -# hint.gpio.0.pinmask=0x00fc1803 diff --git a/sys/mips/conf/TP-MR3020 b/sys/mips/conf/TP-MR3020 deleted file mode 100644 index 76bdd3538f9..00000000000 --- a/sys/mips/conf/TP-MR3020 +++ /dev/null @@ -1,56 +0,0 @@ -# -# TP Link MR3020 - an AR9331 based SoC wifi device. -# -# This is for the 32 RAM/4 flash part. There is little to no -# chance that this will ever boot FreeBSD directly from the 3.5MB -# of flash. The kernel can fit into the space, but userland is just -# too big even when stripped down to its limits. -# -# * AR9331 SoC -# * 32MB RAM -# * 4MB flash -# * Integrated 1x1 2GHz wifi and 10/100 bridge -# * USB powered -# * USB storage -# -# - -#NO_UNIVERSE - -# Include the default AR933x parameters -include "std.AR933X" - -ident TP-MR3020 - -# Override hints with board values -hints "TP-MR3020.hints" - -# Board memory - 32MB -options AR71XX_REALMEM=(32*1024*1024) - -# Disable support for paging -options NO_SWAPPING - -# i2c GPIO bus -device gpioiic -device iicbb -device iicbus -device iic - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# Used for the static uboot partition map -device geom_map - -# With only 4MB of flash, we are stuck using USB -# for the rootfs. -options ROOTDEVNAME=\"ufs:da0\" diff --git a/sys/mips/conf/TP-MR3020.hints b/sys/mips/conf/TP-MR3020.hints deleted file mode 100644 index c4e4fc8dbad..00000000000 --- a/sys/mips/conf/TP-MR3020.hints +++ /dev/null @@ -1,95 +0,0 @@ -# -# This file adds to the values in AR933X_BASE.hints -# - -# mdiobus on arge1 -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x1a000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# There's no need to set the ar933x GMAC configuration bits. -# This just creates a switch instance and correctly uses it. - -# Embedded Atheros Switch -hint.arswitch.0.at="mdio0" - -# XXX this should really say it's an AR933x switch, as there -# are some vlan specific differences here! -hint.arswitch.0.is_7240=1 -hint.arswitch.0.numphys=4 -hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY -hint.arswitch.0.is_rgmii=0 -hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII - -# arge0 - MII, autoneg, phy(4) -hint.arge.0.phymask=0x10 # PHY4 -hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus -hint.arge.0.eeprommac=0x1fff0000 - -# arge1 - GMII, 1000/full -hint.arge.1.phymask=0x0 # No directly mapped PHYs -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 -hint.arge.1.eeprommac=0x1fff0006 - -# Where the ART is - last 64k in the flash -# 0x9fff1000 ? -hint.ath.0.eepromaddr=0x1fff0000 -hint.ath.0.eepromsize=16384 - -# The board 4MiB flash layout in uboot env: -# -# 256k(u-boot),64k(u-boot-env),2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART) - -# However, it boots from 0x9f050000, which is the front of the flsah! -# Thus the kernel/rootfs are switched around. - -# 256KB -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00040000 -hint.map.0.name="uboot" -hint.map.0.readonly=1 - -# 64KB -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end=0x00050000 -hint.map.1.name="uboot-env" -hint.map.1.readonly=1 - -# 3648KB -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00050000 -hint.map.2.end=0x003e0000 -hint.map.2.name="kernel" -hint.map.2.readonly=1 - -# 64K NVRAM -hint.map.3.at="flash/spi0" -hint.map.3.start=0x003e0000 -hint.map.3.end=0x003f0000 -hint.map.3.name="cfg" -hint.map.3.readonly=0 - -# 64K ART -hint.map.4.at="flash/spi0" -hint.map.4.start=0x003f0000 -hint.map.4.end=0x00400000 -hint.map.4.name="art" -hint.map.4.readonly=1 - -# GPIO specific configuration block - -# Don't flip on anything that isn't already enabled. -# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're -# not used here. -hint.gpio.0.function_set=0x00000000 -hint.gpio.0.function_clear=0x00000000 - -# These are the GPIO LEDs and buttons which can be software controlled. -#hint.gpio.0.pinmask=0x001c02ae -#hint.gpio.0.pinmask=0x00001803 - -# XXX TODO: the button and LEDs! diff --git a/sys/mips/conf/TP-MR3040 b/sys/mips/conf/TP-MR3040 deleted file mode 100644 index f7291200967..00000000000 --- a/sys/mips/conf/TP-MR3040 +++ /dev/null @@ -1,68 +0,0 @@ -# -# TP Link MR3040 - an AR9331 based SoC wifi device. -# -# This is for the 32 RAM/4 flash part. There is little to no -# chance that this will ever boot FreeBSD directly from the 3.5MB -# of flash. The kernel can fit into the space, but userland is just -# too big even when stripped down to its limits. -# -# * AR9331 SoC -# * 32MB RAM -# * 4MB flash -# * Integrated 1x1 2GHz wifi and 10/100 bridge -# * USB powered -# * USB storage -# -# - -#NO_UNIVERSE - -# Include the default AR933x parameters -include "std.AR933X" - -ident TP-MR3040 - -# Override hints with board values -hints "TP-MR3040.hints" - -# Board memory - 32MB -options AR71XX_REALMEM=(32*1024*1024) - -# i2c GPIO bus -device gpioiic -device iicbb -device iicbus -device iic - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# uzip - to boot read-only lzma natively from flash -device xz -options GEOM_UZIP -options ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\" - -# Used for the static uboot partition map -device geom_map - -# Boot off of the rootfs, as defined in the geom_map setup. -# Probably, this should be a USB device as the memory available -# compressed rootfs is simply too small for FreeBSD -#options ROOTDEVNAME=\"ufs:map/rootfs.uncompress\" - -# Boot off of a uboot tftp ramdisk kernel image. Because the flash -# on this unit is so small, this is the only way to do dev work. -# For full deployment, you will *have* to use a usb storage device -# as a rootfs and use the flash to hold the kernel only. -#options MD_ROOT # md device usable as a potential root device -#options MD_ROOT_SIZE=10240 -#makeoptions MFS_IMAGE=/tftpboot/mfsroot-tl-mr3040.img.ulzma -options ROOTDEVNAME=\"ufs:da0\" diff --git a/sys/mips/conf/TP-MR3040.hints b/sys/mips/conf/TP-MR3040.hints deleted file mode 100644 index a2b80718c54..00000000000 --- a/sys/mips/conf/TP-MR3040.hints +++ /dev/null @@ -1,100 +0,0 @@ -# -# This file adds to the values in AR933X_BASE.hints -# - -# mdiobus on arge1 -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x1a000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -# There's no need to set the ar933x GMAC configuration bits. -# This just creates a switch instance and correctly uses it. - -# Embedded Atheros Switch -hint.arswitch.0.at="mdio0" - -# XXX this should really say it's an AR933x switch, as there -# are some vlan specific differences here! -hint.arswitch.0.is_7240=1 -hint.arswitch.0.numphys=4 -hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY -hint.arswitch.0.is_rgmii=0 -hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII - -# arge0 - MII, autoneg, phy(4) -hint.arge.0.phymask=0x10 # PHY4 -hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus - -# arge1 - GMII, 1000/full -hint.arge.1.phymask=0x0 # No directly mapped PHYs -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 - -# Where the ART is - last 64k in the flash -# 0x9fff1000 ? -hint.ath.0.eepromaddr=0x1fff0000 -hint.ath.0.eepromsize=16384 - -# The board 16MiB flash layout in uboot env: -# -# 256k(u-boot),64k(u-boot-env),2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART) - -# However, it boots from 0x9f050000, which is the front of the flsah! -# Thus the kernel/rootfs are switched around. - -# 256KB -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00040000 -hint.map.0.name="uboot" -hint.map.0.readonly=1 - -# 64KB -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end=0x00050000 -hint.map.1.name="uboot-env" -hint.map.1.readonly=0 - -# 2752KB -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00050000 -hint.map.2.end="search:0x00100000:0x10000:.!/bin/sh" -hint.map.2.name="kernel" -hint.map.2.readonly=0 - -# 896KB -hint.map.3.at="flash/spi0" -hint.map.3.start="search:0x00100000:0x10000:.!/bin/sh" -hint.map.3.end=0x003e0000 -hint.map.3.name="rootfs" -hint.map.3.readonly=0 - -# 64K NVRAM -hint.map.4.at="flash/spi0" -hint.map.4.start=0x003e0000 -hint.map.4.end=0x003f0000 -hint.map.4.name="cfg" -hint.map.4.readonly=0 - -# 64K ART -hint.map.5.at="flash/spi0" -hint.map.5.start=0x003f0000 -hint.map.5.end=0x00400000 -hint.map.5.name="art" -hint.map.5.readonly=1 - -# GPIO specific configuration block - -# Don't flip on anything that isn't already enabled. -# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're -# not used here. -hint.gpio.0.function_set=0x00000000 -hint.gpio.0.function_clear=0x00000000 - -# These are the GPIO LEDs and buttons which can be software controlled. -#hint.gpio.0.pinmask=0x001c02ae -#hint.gpio.0.pinmask=0x00001803 - -# XXX TODO: the button and LEDs! diff --git a/sys/mips/conf/TP-WN1043ND b/sys/mips/conf/TP-WN1043ND deleted file mode 100644 index d275280ab9d..00000000000 --- a/sys/mips/conf/TP-WN1043ND +++ /dev/null @@ -1,62 +0,0 @@ -# -# TP-1043ND -- Kernel configuration file for the TP-Link WR-1043ND -# -# - -#NO_UNIVERSE - -# Include the default AR913x parameters common to all AR913x SoC users. -include "std.AR91XX" - -ident TP-WN1043ND - -# Override hints with board values -hints "TP-WN1043ND.hints" - -# Force the board memory - 32mb -options AR71XX_REALMEM=32*1024*1024 - -# i2c GPIO bus -device gpio -device gpioiic -device iicbb -device iicbus -device iic - -# ethernet switch device -device etherswitch - -# RTL8366RB support -device mdio -device rtl8366rb - -# read MSDOS formatted disks - USB -options MSDOSFS - -# Enable the uboot environment stuff rather then the -# redboot stuff. -options AR71XX_ENV_UBOOT - -# uncompress - to boot natively from flash -device xz -options GEOM_UZIP - -# Used for the static uboot partition map -device geom_map - -# Boot off of the rootfs, as defined in the geom_map setup. -options ROOTDEVNAME=\"ufs:map/rootfs.uzip\" - -# We bite the performance overhead for now; the kernel won't -# fit if the mutexes are inlined. -options MUTEX_NOINLINE -options RWLOCK_NOINLINE -options SX_NOINLINE - -# Remove everything we don't need. We need a _really_ small kernel! -nooptions INVARIANTS -nooptions INVARIANT_SUPPORT -nooptions WITNESS -nooptions WITNESS_SKIPSPIN -nooptions DEBUG_REDZONE -nooptions DEBUG_MEMGUARD diff --git a/sys/mips/conf/TP-WN1043ND.hints b/sys/mips/conf/TP-WN1043ND.hints deleted file mode 100644 index c2f3ed8521c..00000000000 --- a/sys/mips/conf/TP-WN1043ND.hints +++ /dev/null @@ -1,132 +0,0 @@ -# -# This file adds to the values in AR91XX_BASE.hints. -# - -# Hard-code the PHY for now, until there's switch phy support. -# hint.arge.0.phymask=0x000c -hint.arge.0.phymask=0x0000 -hint.arge.0.media=1000 -hint.arge.0.fduplex=1 -# Where is the MAC address stored in flash for this particular unit. -hint.arge.0.eeprommac=0x1f01fc00 - -# This isn't used, but configure it anyway. -# This should eventually just not be configured, but the if then -# needs to be properly disabled or spurious interrupts occur. -hint.arge.1.phymask=0x0 - -# Where the ART is -hint.ath.0.eepromaddr=0x1fff1000 - -# -# Define a slightly custom flash layout. - -# The default flash layout: -# -# 128k: uboot -# 1024k: kernel -# 4096k: rootfs -# 2816: unknown -# 64k: board config? -# 64k: ART -# -# from printenv: -# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init -# mtdparts=ar9100-nor0:128k(u-boot),1024k(kernel),4096k(rootfs),64k(art) - -# This isn't a lot of space! -# So: -# 128k: uboot -# 2048k: kernel -# 5888k: rootfs -# 64k: config -# 64k: ART - -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00020000 -hint.map.0.name="uboot" -hint.map.0.readonly=1 - -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00020000 -hint.map.1.end="search:0x00100000:0x10000:.!/bin/sh" -hint.map.1.name="kernel" -hint.map.1.readonly=1 - -hint.map.2.at="flash/spi0" -hint.map.2.start="search:0x00100000:0x10000:.!/bin/sh" -hint.map.2.end=0x007e0000 -hint.map.2.name="rootfs" -hint.map.2.readonly=1 - -hint.map.3.at="flash/spi0" -hint.map.3.start=0x007e0000 -hint.map.3.end=0x007f0000 -hint.map.3.name="cfg" -hint.map.3.readonly=0 - -# This is radio calibration section. It is (or should be!) unique -# for each board, to take into account thermal and electrical differences -# as well as the regulatory compliance data. -# -hint.map.4.at="flash/spi0" -hint.map.4.start=0x007f0000 -hint.map.4.end=0x00800000 -hint.map.4.name="art" -hint.map.4.readonly=1 - -# GPIO specific configuration block - -# Don't flip on anything that isn't already enabled. -# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're -# not used here. -hint.gpio.0.function_set=0x00002000 -hint.gpio.0.function_clear=0x00000000 - -# These are the GPIO LEDs and buttons which can be software controlled. -hint.gpio.0.pinmask=0x001c02ae - -# pin 1 - USB (LED) -# pin 2 - System (LED) -# Pin 3 - Reset (input) -# Pin 5 - QSS (LED) -# Pin 7 - QSS Button (input) -# Pin 8 - wired into the chip reset line -# Pin 9 - WLAN -# Pin 10 - UART TX (not GPIO) -# Pin 13 - UART RX (not GPIO) -# Pin 18 - RTL8366RB switch data line -# Pin 19 - RTL8366RB switch clock line -# Pin 20 - "GPIO20" - -# LEDs are configured separately and driven by the LED device -#hint.gpioled.0.at="gpiobus0" -#hint.gpioled.0.name="usb" -#hint.gpioled.0.pins=0x0002 - -hint.gpioled.1.at="gpiobus0" -hint.gpioled.1.name="system" -hint.gpioled.1.pins=0x0004 - -hint.gpioled.2.at="gpiobus0" -hint.gpioled.2.name="qss" -hint.gpioled.2.pins=0x0020 - -hint.gpioled.3.at="gpiobus0" -hint.gpioled.3.name="wlan" -hint.gpioled.3.pins=0x0200 - -# GPIO I2C bus -hint.gpioiic.0.at="gpiobus0" -hint.gpioiic.0.pins=0xc0000 -hint.gpioiic.0.scl=1 -hint.gpioiic.0.sda=0 - -# I2C bus -# Don't be strict about I2C protocol - the relaxed semantics are required -# by the realtek switch PHY. -hint.iicbus.0.strict=0 - -# Bit bang bus - override default delay -#hint.iicbb.0.udelay=3 diff --git a/sys/mips/conf/WZR-300HP b/sys/mips/conf/WZR-300HP deleted file mode 100644 index f6afb3e36b3..00000000000 --- a/sys/mips/conf/WZR-300HP +++ /dev/null @@ -1,50 +0,0 @@ -# -# Specific board setup for the Buffalo Airstation WZR-300HP -# -# The WZR-300HP has the following hardware: -# -# + AR7242 CPU SoC -# + AR9280 5GHz 11n -# + AR8136 Gigabit switch -# + 2 m25ll128 based 16MB flash -# + 64MB RAM -# + uboot environment - -#NO_UNIVERSE - -include "std.AR724X" -ident "WZR-300HP" -hints "WZR-300HP.hints" - -options AR71XX_REALMEM=64*1024*1024 - -options AR71XX_ENV_UBOOT - -options BOOTVERBOSE - -# GEOM modules -device geom_map # to get access to the SPI flash partitions -device xz -options GEOM_UZIP - -options ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\" - -options AR71XX_ATH_EEPROM # Fetch EEPROM/PCI config from flash -options ATH_EEPROM_FIRMWARE # Use EEPROM from flash -device firmware # Used by the above - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# hwpmc -device hwpmc_mips24k -device hwpmc - -# load these via modules, shrink kernel -nodevice if_bridge -nodevice bridgestp -options RANDOM_LOADABLE diff --git a/sys/mips/conf/WZR-300HP.hints b/sys/mips/conf/WZR-300HP.hints deleted file mode 100644 index 40cf86fc030..00000000000 --- a/sys/mips/conf/WZR-300HP.hints +++ /dev/null @@ -1,186 +0,0 @@ - -# arge0 is connected to the LAN side of the switch PHY. -# arge1 is connected to the single port WAN side of the switch PHY. - -# arge1 MDIO bus -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -hint.arge.0.phymask=0x1 -hint.arge.0.media=1000 -hint.arge.0.fduplex=1 -hint.arge.0.eeprommac=0x1f05120c -hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus - - -# arge1: nail to 1000/full, RMII - connected to the switch -#hint.arge.1.media=1000 # Map to 1000/full -#hint.arge.1.fduplex=1 # -#hint.arge.1.phymask=0x0 # no directly mapped PHYs - -# -# AR7240 switch config -# -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=1 # We need to be explicitly told this -hint.arswitch.0.numphys=4 # 4 active switch PHYs (PHY 0 -> 3) -hint.arswitch.0.phy4cpu=1 # Yes, PHY 4 == dedicated PHY -hint.arswitch.0.is_rgmii=1 # No, not RGMII -hint.arswitch.0.is_gmii=0 # No, not GMII - -# ath0 - slot 0 -hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1f051000 -hint.pcib.0.bus.0.0.0.ath_fixup_size=4096 - -# .. and now, telling each ath(4) NIC where to find the firmware -# image. -hint.ath.0.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware" - -# Inherited from AR724X_BASE.hints -#hint.mx25l.0.at="spibus0" -#hint.mx25l.0.cs=0 -# This board has two 16 MB flash devices on difference Chip Select pins -hint.mx25l.1.at="spibus0" -hint.mx25l.1.cs=1 - - -# Geom MAP - -# The WRZ-300HP has 2 16MB flash part - HOWEVER, the 64k caldata isn't -# at the end of the flash. It's ~ 328KB into the flash image. - -# mtdparts=ar7240-nor0: -# 256k(u-boot) -# 64k(u-boot-env) -# 64k@320k(ART) -# 1152k@384k(uImage) -# 6592k@1536k(rootfs) -# 64k@8128k(properties) - -# Uboot lies like a lying liar. OpenWRT does this: -# [ 0.570000] Concatenating MTD devices: -# [ 0.570000] (0): "spi0.0" -# [ 0.570000] (1): "spi0.1" -# [ 0.580000] into device "flash" -# [ 0.580000] Creating 7 MTD partitions on "flash": -# [ 0.590000] 0x000000000000-0x000000040000 : "u-boot" -# [ 0.600000] 0x000000040000-0x000000050000 : "u-boot-env" -# [ 0.600000] 0x000000050000-0x000000060000 : "art" -# [ 0.610000] 0x000000060000-0x000000160000 : "kernel" -# [ 0.620000] 0x000000160000-0x000001ff0000 : "rootfs" -# [ 0.620000] mtd: partition "rootfs" set to be root filesystem -# [ 0.630000] mtd: partition "rootfs_data" created automatically, ofs=330000, len=1CC0000 -# [ 0.640000] 0x000000330000-0x000001ff0000 : "rootfs_data" -# [ 0.650000] 0x000001ff0000-0x000002000000 : "user_property" -# [ 0.650000] 0x000000060000-0x000001ff0000 : "firmware" - -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end= 0x00040000 -hint.map.0.name="uboot" -hint.map.0.readonly=1 - -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end= 0x00050000 # 64k u-boot-env -hint.map.1.name="u-boot-env" -hint.map.1.readonly=1 - -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00050000 -hint.map.2.end= 0x00060000 # 64k ART -hint.map.2.name="ART" -hint.map.2.readonly=1 - -hint.map.3.at="flash/spi0" -hint.map.3.start=0x00060000 -hint.map.3.end= "search:0x00100000:0x10000:.!/bin/sh" -hint.map.3.name="kernel" -hint.map.3.readonly=1 - -hint.map.4.at="flash/spi0" -hint.map.4.start="search:0x00100000:0x10000:.!/bin/sh" -hint.map.4.end= 0x00FF0000 -hint.map.4.name="rootfs" -hint.map.4.readonly=1 - -#hint.map.5.at="flash/spi1" -hint.map.5.at="flash/spi1" -hint.map.5.start=0x00FF0000 -hint.map.5.end= 0x01000000 -hint.map.5.name="cfg" -hint.map.5.readonly=0 - -# GPIO specific configuration block - -#define GPIO_PIN_INPUT 0x0001 /* input direction */ -#define GPIO_PIN_OUTPUT 0x0002 /* output direction */ -#define GPIO_PIN_OPENDRAIN 0x0004 /* open-drain output */ -#define GPIO_PIN_PUSHPULL 0x0008 /* push-pull output */ -#define GPIO_PIN_TRISTATE 0x0010 /* output disabled */ -#define GPIO_PIN_PULLUP 0x0020 /* internal pull-up enabled */ -#define GPIO_PIN_PULLDOWN 0x0040 /* internal pull-down enabled */ -#define GPIO_PIN_INVIN 0x0080 /* invert input */ -#define GPIO_PIN_INVOUT 0x0100 /* invert output */ -#define GPIO_PIN_PULSATE 0x0200 /* pulsate in hardware */ - -# Pin 1 - SCK -# Pin 2 - SDA -# Pin 3 - test 2 -# Pin 4 - test 3 -# Pin 5 - USB (LED Blue) -# Pin 6 - test a -# Pin 7 - Security (LED Orange) -# Pin 8 - Router (LED Green) -# Pin 9 - Movie Engine On (LED Blue) -# Pin 10 - Movie Engine Off (LED Blue) -# Pin 11 - test a -# Pin 12 - test a -# Pin 13 - test a -# Pin 14 - USB Power (turn on by default) -# Pin 15 - test a -# Pin 16 - test a -# Pin 17 - diag (LED red) - -# Don't flip on anything that isn't already enabled. -# Force on USB power pin 14 -#hint.gpio.0.function_set=0x00000000 -#hint.gpio.0.function_clear=0x00000000 - -# These are the GPIO LEDs and buttons which can be software controlled. -hint.gpio.0.pinmask=0x000103D0 - -hint.gpio.0.pinon=0x00000000 - -hint.gpioiic.0.at="gpiobus0" -hint.gpioiic.0.pins=0x0003 -hint.gpioiic.0.sda=0 -hint.gpioiic.0.scl=1 - -# LEDs are configured separately and driven by the LED device -# usb tested good -hint.gpioled.0.at="gpiobus0" -hint.gpioled.0.name="blue-usb" -hint.gpioled.0.pins=0x00000010 - -hint.gpioled.1.at="gpiobus0" -hint.gpioled.1.name="orange-security" -hint.gpioled.1.pins=0x00000040 - -hint.gpioled.2.at="gpiobus0" -hint.gpioled.2.name="green-router" -hint.gpioled.2.pins=0x00000080 - -hint.gpioled.3.at="gpiobus0" -hint.gpioled.3.name="blue-movie-engine-on" -hint.gpioled.3.pins=0x00000100 - -hint.gpioled.4.at="gpiobus0" -hint.gpioled.4.name="blue-movie-engine-off" -hint.gpioled.4.pins=0x00000200 - -hint.gpioled.5.at="gpiobus0" -hint.gpioled.5.name="red-diag" -hint.gpioled.5.pins=0x00010000 diff --git a/sys/mips/conf/WZR-HPAG300H b/sys/mips/conf/WZR-HPAG300H deleted file mode 100644 index 92a0654c9d3..00000000000 --- a/sys/mips/conf/WZR-HPAG300H +++ /dev/null @@ -1,50 +0,0 @@ -# -# Specific board setup for the Buffalo Airstation WZR-HPAG300H -# -# The WZR-HPAG300H has the following hardware: -# -# + AR7161 CPU SoC -# + 2x AR9280 5GHz 11n -# + AR8136 Gigabit switch -# + 2 m25ll128(really w25q128) based 16MB flash -# + 128MB RAM -# + uboot environment - -#NO_UNIVERSE - -include "AR71XX_BASE" -ident "WZR-HPAG300H" -hints "WZR-HPAG300H.hints" - -options AR71XX_REALMEM=128*1024*1024 - -options AR71XX_ENV_UBOOT - -options BOOTVERBOSE - -# GEOM modules -device xz -options GEOM_UZIP -device geom_map # to get access to the SPI flash partitions - -options ROOTDEVNAME=\"ufs:/dev/map/rootfs.uzip\" - -options AR71XX_ATH_EEPROM # Fetch EEPROM/PCI config from flash -options ATH_EEPROM_FIRMWARE # Use EEPROM from flash -device firmware # Used by the above - -# Options required for miiproxy and mdiobus -options ARGE_MDIO # Export an MDIO bus separate from arge -device miiproxy # MDIO bus <-> MII PHY rendezvous - -device etherswitch -device arswitch - -# hwpmc -device hwpmc_mips24k -device hwpmc - -# load these via modules, shrink kernel -nodevice if_bridge -nodevice bridgestp -options RANDOM_LOADABLE diff --git a/sys/mips/conf/WZR-HPAG300H.hints b/sys/mips/conf/WZR-HPAG300H.hints deleted file mode 100644 index 8f000b71462..00000000000 --- a/sys/mips/conf/WZR-HPAG300H.hints +++ /dev/null @@ -1,131 +0,0 @@ - -# arge0 is connected to the LAN side of the switch PHY. -# arge1 is connected to the single port WAN side of the switch PHY. - -hint.argemdio.0.at="nexus0" -hint.argemdio.0.maddr=0x19000000 -hint.argemdio.0.msize=0x1000 -hint.argemdio.0.order=0 - -hint.arge.0.phymask=0x0 -hint.arge.0.media=1000 -hint.arge.0.fduplex=1 -hint.arge.0.eeprommac=0x1f05120c -hint.arge.0.mdio=mdioproxy0 # .. off of the switch mdiobus -hint.arge.0.miimode=3 - -hint.arge.1.phymask=0x10 -hint.arge.1.media=1000 -hint.arge.1.fduplex=1 -hint.arge.1.eeprommac=0x1f05520c -hint.arge.1.mdio=mdioproxy1 # .. off of the switch mdiobus -hint.arge.1.miimode=3 - -# -# AR8316 switch config -# -hint.arswitch.0.at="mdio0" -hint.arswitch.0.is_7240=0 # We need to be explicitly told this -hint.arswitch.0.numphys=4 # 5 active switch PHYs (PHY 0 -> 4) -hint.arswitch.0.phy4cpu=1 # No, PHY 4 == dedicated PHY -hint.arswitch.0.is_rgmii=1 # Yes, is RGMII -hint.arswitch.0.is_gmii=0 # No, not GMII - -# ath0 - slot 17 -hint.pcib.0.bus.0.17.0.ath_fixup_addr=0x1f051000 -hint.pcib.0.bus.0.17.0.ath_fixup_size=4096 - -# ath1 - slot 18 -hint.pcib.0.bus.0.18.0.ath_fixup_addr=0x1f055000 -hint.pcib.0.bus.0.18.0.ath_fixup_size=4096 -# .. and now, telling each ath(4) NIC where to find the firmware -# image. -hint.ath.0.eeprom_firmware="pcib.0.bus.0.17.0.eeprom_firmware" -hint.ath.1.eeprom_firmware="pcib.0.bus.0.18.0.eeprom_firmware" - -# Inherited from AR71XX_BASE.hints -#hint.mx25l.0.at="spibus0" -#hint.mx25l.0.cs=0 -# This board has two 16 MB flash devices on difference Chip Select pins -hint.mx25l.1.at="spibus0" -hint.mx25l.1.cs=1 - - -# Geom MAP - -hint.map.0.at="flash/spi0" -hint.map.0.start=0x00000000 -hint.map.0.end=0x00040000 -hint.map.0.name="uboot" -hint.map.0.readonly=1 - -hint.map.1.at="flash/spi0" -hint.map.1.start=0x00040000 -hint.map.1.end=0x00050000 -hint.map.1.name="u-boot-env" -hint.map.1.readonly=1 - -hint.map.2.at="flash/spi0" -hint.map.2.start=0x00050000 -hint.map.2.end=0x00060000 -hint.map.2.name="ART" -hint.map.2.readonly=1 - -# requires a 1M alignment and padding in the image. -# make sure you are using conv=sync and bs=1M in your dd -hint.map.3.at="flash/spi0" -hint.map.3.start=0x00060000 -hint.map.3.end="search:0x00160000:0x100000:.!/bin/sh" -hint.map.3.name="kernel" -hint.map.3.readonly=1 - -hint.map.4.at="flash/spi0" -hint.map.4.start="search:0x00160000:0x100000:.!/bin/sh" -hint.map.4.end=0x01000000 -hint.map.4.name="rootfs" -hint.map.4.readonly=1 - -hint.map.5.at="flash/spi1" -hint.map.5.start=0x00FF0000 -hint.map.5.end=0x01000000 -hint.map.5.name="cfg" -hint.map.5.readonly=0 - -# Pin 1 - SCK -# Pin 2 - SDA -# Pin 3 - usb -# Pin 4 - -# Pin 5 - aoss -# Pin 6 - router auto -# Pin 7 - router off -# Pin 8 - movie engine -# Pin 9 - -# Pin 10 - -# Pin 11 - reset button -# Pin 12 - CS0 -# Pin 13 - CS1 -# Pin 14 - -# Pin 15 - -# Pin 16 - -# Pin 17 - - -# Don't flip on anything that isn't already enabled. -# Force on CS lines for flash devices, apparently this isn't done -# by uboot in normal booting. No idea why. -hint.gpio.0.function_set=0x00003004 -hint.gpio.0.function_clear=0x00000000 - -# These are the GPIO LEDs and buttons which can be software controlled. -hint.gpio.0.pinmask=0x0001 - -hint.gpio.0.pinon=0x00000004 - -hint.gpioiic.0.at="gpiobus0" -#hint.gpioiic.0.pins=0x0003 -hint.gpioiic.0.sda=0 -hint.gpioiic.0.scl=1 - -# LEDs are configured separately and driven by the LED device -hint.gpioled.0.at="gpiobus0" -hint.gpioled.0.name="red-diag" -hint.gpioled.0.pins=0x0001 diff --git a/sys/mips/conf/X1000 b/sys/mips/conf/X1000 deleted file mode 100644 index 0a22ffdb44a..00000000000 --- a/sys/mips/conf/X1000 +++ /dev/null @@ -1,93 +0,0 @@ -# X1000 -- Kernel config for Ingenic X1000 boards -# - -#NO_UNIVERSE - -ident X1000 -machine mips mipsel -cpu CPU_XBURST -cpu CPU_MIPS4KC - -makeoptions KERNLOADADDR=0x80020000 -makeoptions ARCH_FLAGS="-march=mips32r2" - -# Don't build any modules yet. -makeoptions MODULES_OVERRIDE="" - -files "../ingenic/files.x1000" -hints "X1000.hints" #Default places to look for devices. - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols - -options INTRNG # Borrow interrupt code from ARM -options MIPS_NIRQ=264 # 8 cpuintc + 64 intc + 6 * 23 gpio - -options DDB -options KDB -options BREAK_TO_DEBUGGER - -options COMPAT_FREEBSD10 -options COMPAT_FREEBSD11 -options COMPAT_FREEBSD12 - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -options NFSCL #Network Filesystem Client -options NFS_ROOT #NFS usable as /, requires NFSCL -options NFSLOCKD #Network Lock Manager -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions - -options FFS #Berkeley Fast Filesystem -options SOFTUPDATES #Enable FFS soft updates support -options UFS_ACL #Support for access control lists -options UFS_DIRHASH #Improve performance on big directories -#options ROOTDEVNAME=\"ufs:ada0\" - -options GEOM_LABEL # Provides labelization -options GEOM_PART_GPT # GUID Partition Tables. -#options GEOM_RAID # Soft RAID functionality. - -# Debugging for use in -current -#options DEADLKRES #Enable the deadlock resolver -options INVARIANTS #Enable calls of extra sanity checking -options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS -#options WITNESS #Enable checks to detect deadlocks and cycles -#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed - -device loop -device ether -#device le -device miibus -device bpf -device md -device uart - -device fdt_pinctrl - -device clk -device regulator - -device gpio - -device scbus -device da - -device mmc -device mmcsd - -# USB support -#options USB_DEBUG # enable debug msgs -#options USB_HOST_ALIGN=128 # L2 cache line size -#device ohci # OHCI PCI->USB interface -#device ehci # EHCI PCI->USB interface (USB 2.0) -#device dwcotg # DesignWare HS OTG controller -#device usb # USB Bus (required) -#device udbp # USB Double Bulk Pipe devices -#device uhid # "Human Interface Devices" -#device ulpt # Printer -#device umass # Disks/Mass storage - Requires scbus and da -#device ums # Mouse - -# FDT support -options FDT diff --git a/sys/mips/conf/X1000.hints b/sys/mips/conf/X1000.hints deleted file mode 100644 index 37d477c6b68..00000000000 --- a/sys/mips/conf/X1000.hints +++ /dev/null @@ -1 +0,0 @@ -# device.hints diff --git a/sys/mips/conf/XLP.hints b/sys/mips/conf/XLP.hints deleted file mode 100644 index 10f2459ab3b..00000000000 --- a/sys/mips/conf/XLP.hints +++ /dev/null @@ -1,5 +0,0 @@ - -# RTC -hint.ds13rtc.0.at="iicbus1" -hint.ds13rtc.0.addr=0xd0 -hint.ds13rtc.0.compatible="dallas,ds1374" diff --git a/sys/mips/conf/XLP64 b/sys/mips/conf/XLP64 deleted file mode 100644 index 140faaae647..00000000000 --- a/sys/mips/conf/XLP64 +++ /dev/null @@ -1,28 +0,0 @@ -# XLP64 -- Generic kernel configuration file for FreeBSD/mips -# -# For more information on this file, please read the handbook section on -# Kernel Configuration Files: -# -# https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config -# -# The handbook is also available locally in /usr/share/doc/handbook -# if you've installed the doc distribution, otherwise always see the -# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the -# latest information. -# -# An exhaustive list of options and more detailed explanations of the -# device lines is also present in the ../../conf/NOTES and NOTES files. -# If you are in doubt as to the purpose or necessity of a line, check first -# in NOTES. -# - -machine mips mips64 -ident XLP64 - -makeoptions ARCH_FLAGS="-march=mips64r2" -makeoptions KERNLOADADDR=0xffffffff80100000 - -include "std.XLP" - -makeoptions TRAMPLOADADDR=0xffffffff85000000 -makeoptions TRAMP_ARCH_FLAGS="-mabi=64 -march=mips64" diff --git a/sys/mips/conf/XLPN32 b/sys/mips/conf/XLPN32 deleted file mode 100644 index 58eabe500ba..00000000000 --- a/sys/mips/conf/XLPN32 +++ /dev/null @@ -1,33 +0,0 @@ -# XLPN32 -- Generic kernel configuration file for FreeBSD/mips -# -# For more information on this file, please read the handbook section on -# Kernel Configuration Files: -# -# https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config -# -# The handbook is also available locally in /usr/share/doc/handbook -# if you've installed the doc distribution, otherwise always see the -# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the -# latest information. -# -# An exhaustive list of options and more detailed explanations of the -# device lines is also present in the ../../conf/NOTES and NOTES files. -# If you are in doubt as to the purpose or necessity of a line, check first -# in NOTES. -# - -machine mips mipsn32 -ident XLPN32 - -makeoptions KERNLOADADDR=0x80100000 - -include "std.XLP" - -nooption DDB -nooption KDB -nooption GDB -nooption BREAK_TO_DEBUGGER -nooption ALT_BREAK_TO_DEBUGGER - -makeoptions TRAMPLOADADDR=0xffffffff85000000 -makeoptions TRAMP_ARCH_FLAGS="-mabi=64 -march=mips64" diff --git a/sys/mips/conf/std.AR5312 b/sys/mips/conf/std.AR5312 deleted file mode 100644 index bd070e93fa0..00000000000 --- a/sys/mips/conf/std.AR5312 +++ /dev/null @@ -1,79 +0,0 @@ -# -# AR5312 -- Kernel configuration file for FreeBSD/MIPS for Atheros 5312 systems -# -# This includes all the common drivers for the AR5312 boards -# -# - -machine mips mips -#ident AR5312_BASE -cpu CPU_MIPS4KC -makeoptions KERNLOADADDR=0x80050000 -options HZ=1000 - -makeoptions MODULES_OVERRIDE="" - -files "../atheros/ar531x/files.ar5315" - -options INTRNG -options AR531X_1ST_GENERATION - -# For now, hints are per-board. - -hints "AR5312_BASE.hints" - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols - -# For small memory footprints -options VM_KMEM_SIZE_SCALE=1 - -options DDB -options KDB - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -options INET6 # IPv6 -options TCP_HHOOK # hhook(9) framework for TCP - -# options NFSCL #Network Filesystem Client - -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions - -# options NFS_LEGACYRPC -# Debugging for use in -current -options INVARIANTS -options INVARIANT_SUPPORT -options WITNESS -options WITNESS_SKIPSPIN -options DEBUG_REDZONE -options DEBUG_MEMGUARD - -options FFS #Berkeley Fast Filesystem -# options SOFTUPDATES #Enable FFS soft updates support -# options UFS_ACL #Support for access control lists -# options UFS_DIRHASH #Improve performance on big directories -# options MSDOSFS # Read MSDOS filesystems; useful for USB/CF - -device mii -device are - -device cfi -options CFI_HARDWAREBYTESWAP -device geom_redboot - -device ar5315_wdog - -device uart -device uart_ar5315 - -device loop -device ether -device md -device bpf - -options ARGE_DEBUG # Enable if_arge debugging for now - -# Enable GPIO -device gpio -device gpioled diff --git a/sys/mips/conf/std.AR5315 b/sys/mips/conf/std.AR5315 deleted file mode 100644 index 00744e31756..00000000000 --- a/sys/mips/conf/std.AR5315 +++ /dev/null @@ -1,79 +0,0 @@ -# -# AR5315 -- Kernel configuration file for FreeBSD/MIPS for Atheros 5315 systems -# -# This includes all the common drivers for the AR5315 boards -# -# - -machine mips mips -#ident AR5315_BASE -cpu CPU_MIPS4KC -makeoptions KERNLOADADDR=0x80050000 -options HZ=1000 - -makeoptions MODULES_OVERRIDE="" - -files "../atheros/ar531x/files.ar5315" - -options INTRNG - -# For now, hints are per-board. - -hints "AR5315_BASE.hints" - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols - -# For small memory footprints -options VM_KMEM_SIZE_SCALE=1 - -options DDB -options KDB - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -options INET6 # IPv6 -options TCP_HHOOK # hhook(9) framework for TCP - -# options NFSCL #Network Filesystem Client - -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions - -# options NFS_LEGACYRPC -# Debugging for use in -current -options INVARIANTS -options INVARIANT_SUPPORT -options WITNESS -options WITNESS_SKIPSPIN -options DEBUG_REDZONE -options DEBUG_MEMGUARD - -options FFS #Berkeley Fast Filesystem -# options SOFTUPDATES #Enable FFS soft updates support -# options UFS_ACL #Support for access control lists -# options UFS_DIRHASH #Improve performance on big directories -# options MSDOSFS # Read MSDOS filesystems; useful for USB/CF - -device mii -device are - -device ar5315_spi -device spibus -device mx25l -device geom_redboot - -device ar5315_wdog - -device uart -device uart_ar5315 - -device loop -device ether -device md -device bpf - -options ARGE_DEBUG # Enable if_arge debugging for now - -# Enable GPIO -device gpio -device gpioled diff --git a/sys/mips/conf/std.AR724X b/sys/mips/conf/std.AR724X deleted file mode 100644 index 04e5732d7a8..00000000000 --- a/sys/mips/conf/std.AR724X +++ /dev/null @@ -1,73 +0,0 @@ -# -# AR724X -- Kernel configuration file for FreeBSD/MIPS for Atheros 724x systems -# -# This includes all the common drivers for the AR724x boards. -# Since the AR724x boards tend to have minimal flash (sometimes 4MB!), -# the majority of the kernel framework will be built as modules. -# -# - -machine mips mips -#ident AR724X_BASE -cpu CPU_MIPS24K -makeoptions KERNLOADADDR=0x80050000 -options HZ=1000 -options HWPMC_HOOKS - -files "../atheros/files.ar71xx" - -# For now, hints are per-board. - -hints "AR724X_BASE.hints" - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols - -options DDB -options KDB -options EARLY_PRINTF - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -#options INET6 # IPv6 -options TCP_HHOOK # hhook(9) framework for TCP -#options NFSCL #Network Filesystem Client -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions - -# PMC -options HWPMC_HOOKS - - -#options NFS_LEGACYRPC -# Debugging for use in -current -options INVARIANTS -options INVARIANT_SUPPORT -options WITNESS -options WITNESS_SKIPSPIN -options DEBUG_REDZONE -options DEBUG_MEMGUARD - -options FFS #Berkeley Fast Filesystem -options NO_FFS_SNAPSHOT - -# options SOFTUPDATES #Enable FFS soft updates support -# options UFS_ACL #Support for access control lists -# options UFS_DIRHASH #Improve performance on big directories -# options MSDOSFS # Read MSDOS filesystems; useful for USB/CF - -include "std.AR_MIPS_BASE" - -makeoptions MODULES_OVERRIDE+="hwpmc_mips24k" - -device pci -device ar724x_pci - -device usb -device ehci - -device umass -device scbus -device da - -device uart_ar71xx -device ar71xx_apb diff --git a/sys/mips/conf/std.AR91XX b/sys/mips/conf/std.AR91XX deleted file mode 100644 index 3b5b46e4131..00000000000 --- a/sys/mips/conf/std.AR91XX +++ /dev/null @@ -1,64 +0,0 @@ -# -# AR91XX -- Kernel configuration base file for the Atheros AR913x SoC. -# -# This file (and the hints file accompanying it) are not designed to be -# used by themselves. Instead, users of this file should create a kernel -# config file which includes this file (which gets the basic hints), then -# override the default options (adding devices as needed) and adding -# hints as needed (for example, the GPIO and LAN PHY.) -# -# - -machine mips mips -#ident std.AR91XX -cpu CPU_MIPS24K -makeoptions KERNLOADADDR=0x80050000 -options HZ=1000 - -files "../atheros/files.ar71xx" -hints "AR91XX_BASE.hints" - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols - -options DDB -options KDB -options ALQ - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -options INET6 #InterNETworking -options TCP_HHOOK # hhook(9) framework for TCP -#options NFSCL #Network Filesystem Client -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions - -# PMC -options HWPMC_HOOKS - -# options NFS_LEGACYRPC -# Debugging for use in -current -options INVARIANTS -options INVARIANT_SUPPORT -options WITNESS -options WITNESS_SKIPSPIN -options FFS #Berkeley Fast Filesystem -#options SOFTUPDATES #Enable FFS soft updates support -#options UFS_ACL #Support for access control lists -#options UFS_DIRHASH #Improve performance on big directories -options NO_FFS_SNAPSHOT # We don't require snapshot support - -include "std.AR_MIPS_BASE" - -option AH_SUPPORT_AR9130 # Makes other chipsets not function! -# interrupt mitigation not possible on AR9130 -nooption AH_AR5416_INTERRUPT_MITIGATION - -device usb -device ehci - -device scbus -device umass -device da - -device uart_ar71xx -device ar71xx_apb diff --git a/sys/mips/conf/std.AR933X b/sys/mips/conf/std.AR933X deleted file mode 100644 index fb65178f8e4..00000000000 --- a/sys/mips/conf/std.AR933X +++ /dev/null @@ -1,76 +0,0 @@ -# -# AR91XX -- Kernel configuration base file for the Atheros AR913x SoC. -# -# This file (and the hints file accompanying it) are not designed to be -# used by themselves. Instead, users of this file should create a kernel -# config file which includes this file (which gets the basic hints), then -# override the default options (adding devices as needed) and adding -# hints as needed (for example, the GPIO and LAN PHY.) -# -# - -machine mips mips -#ident std.AR933X -cpu CPU_MIPS24K -makeoptions KERNLOADADDR=0x80050000 -options HZ=1000 - -files "../atheros/files.ar71xx" -hints "AR933X_BASE.hints" - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols - -options DDB -options KDB -options ALQ - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -#options INET6 #InterNETworking -options TCP_HHOOK # hhook(9) framework for TCP -#options NFSCL #Network Filesystem Client -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions - -# Enable boot time calibration hints -options AR71XX_ATH_EEPROM -device ar71xx_caldata -device firmware - -# PMC -options HWPMC_HOOKS - -# options NFS_LEGACYRPC -# Debugging for use in -current -#options INVARIANTS -#options INVARIANT_SUPPORT -#options WITNESS -#options WITNESS_SKIPSPIN -options FFS #Berkeley Fast Filesystem -#options SOFTUPDATES #Enable FFS soft updates support -#options UFS_ACL #Support for access control lists -#options UFS_DIRHASH #Improve performance on big directories -options NO_FFS_SNAPSHOT # We don't require snapshot support - -include "std.AR_MIPS_BASE" - -makeoptions MODULES_OVERRIDE+="hwpmc_mips24k" - -# AR9330 support - everything shipping uses EEPROM for calibration data, -# so always include this. -option AH_SUPPORT_AR9330 # Chipset support -option ATH_EEPROM_FIRMWARE # Use EEPROM from flash - -# Support EEPROM caldata in AHB devices -options ATH_EEPROM_FIRMWARE - -device usb -device ehci - -device scbus -device umass -device da - -device ar71xx_apb - -device uart_ar933x diff --git a/sys/mips/conf/std.AR934X b/sys/mips/conf/std.AR934X deleted file mode 100644 index e2433a15d6d..00000000000 --- a/sys/mips/conf/std.AR934X +++ /dev/null @@ -1,77 +0,0 @@ -# -# AR91XX -- Kernel configuration base file for the Atheros AR913x SoC. -# -# This file (and the hints file accompanying it) are not designed to be -# used by themselves. Instead, users of this file should create a kernel -# config file which includes this file (which gets the basic hints), then -# override the default options (adding devices as needed) and adding -# hints as needed (for example, the GPIO and LAN PHY.) -# -# - -machine mips mips -#ident std.AR934X -cpu CPU_MIPS74K -makeoptions KERNLOADADDR=0x80050000 -options HZ=1000 - -files "../atheros/files.ar71xx" -hints "AR934X_BASE.hints" - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols - -options DDB -options KDB -options ALQ - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -#options INET6 #InterNETworking -options TCP_HHOOK # hhook(9) framework for TCP -#options NFSCL #Network Filesystem Client -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions - -# PMC -options HWPMC_HOOKS - -# options NFS_LEGACYRPC -# Debugging for use in -current -#options INVARIANTS -#options INVARIANT_SUPPORT -#options WITNESS -#options WITNESS_SKIPSPIN -options FFS #Berkeley Fast Filesystem -#options SOFTUPDATES #Enable FFS soft updates support -#options UFS_ACL #Support for access control lists -#options UFS_DIRHASH #Improve performance on big directories -options NO_FFS_SNAPSHOT # We don't require snapshot support - -include "std.AR_MIPS_BASE" -makeoptions MODULES_OVERRIDE+="hwpmc_mips74k" - -# EEPROM caldata for AHB connected device -options AR71XX_ATH_EEPROM -device ar71xx_caldata -device firmware - -# Support AR9340 support in AR9300 HAL -options AH_SUPPORT_AR9340 - -# Support EEPROM caldata in AHB devices -options ATH_EEPROM_FIRMWARE - -device pci -device ar724x_pci -device uart_ar71xx - -# XXX for now; later a separate APB mux is needed to demux PCI/WLAN interrupts. -device ar71xx_apb - -device usb -device ehci - -device scbus -device umass -device da - diff --git a/sys/mips/conf/std.AR_MIPS_BASE b/sys/mips/conf/std.AR_MIPS_BASE deleted file mode 100644 index bcc0f12d377..00000000000 --- a/sys/mips/conf/std.AR_MIPS_BASE +++ /dev/null @@ -1,91 +0,0 @@ -# These are the base base bits shared between all of the various Atheros -# MIPS bases. -# -# This allows a shared set of configuration and drivers to be built for -# all of the Atheros MIPS platforms without a lot of configuration file -# duplication. -# - -# debugging -options EARLY_PRINTF -options ALT_BREAK_TO_DEBUGGER - -# For small memory footprints -options VM_KMEM_SIZE_SCALE=1 -options UMTX_CHAINS=16 -options NBUF=128 -# Don't include the SCSI/CAM strings in the default build -options SCSI_NO_SENSE_STRINGS -options SCSI_NO_OP_STRINGS -# .. And no sysctl strings -options NO_SYSCTL_DESCR - -makeoptions MODULES_OVERRIDE+="gpio ar71xx if_gif if_vlan if_gre if_tuntap" -makeoptions MODULES_OVERRIDE+="if_bridge bridgestp usb" -makeoptions MODULES_OVERRIDE+="alq" - -# net80211 -options IEEE80211_DEBUG -options IEEE80211_SUPPORT_MESH -options IEEE80211_SUPPORT_TDMA -options IEEE80211_SUPPORT_SUPERG -options IEEE80211_ALQ # 802.11 ALQ logging support - -makeoptions MODULES_OVERRIDE+="wlan wlan_xauth wlan_acl wlan_wep" -makeoptions MODULES_OVERRIDE+="wlan_tkip wlan_ccmp wlan_rssadapt wlan_amrr" - -# firewalling -options IPFIREWALL_DEFAULT_TO_ACCEPT - -makeoptions MODULES_OVERRIDE+="ipfw ipfw_nat libalias ipfw_nptv6" - -# USB wifi device drivers -makeoptions MODULES_OVERRIDE+="rtwn rtwn_usb rtwnfw" -makeoptions MODULES_OVERRIDE+="otus otusfw" - -# Atheros wifi device drivers -options ATH_DEBUG -options ATH_DIAGAPI -options ATH_ENABLE_11N -options ATH_ENABLE_DFS - -options AH_DEBUG_ALQ -options AH_DEBUG -options AH_AR5416_INTERRUPT_MITIGATION -options AH_RXCFG_SDMAMW_4BYTES - -makeoptions MODULES_OVERRIDE+="ath_main ath_pci ath_ahb ath_rate ath_dfs" -makeoptions MODULES_OVERRIDE+="ath_hal_ar5210 ath_hal_ar5211" -makeoptions MODULES_OVERRIDE+="ath_hal_ar5212 ath_hal_ar5416" -makeoptions MODULES_OVERRIDE+="ath_hal_ar9300 ath_hal" - -# USB configuration -options USB_EHCI_BIG_ENDIAN_DESC # handle big-endian byte order -options USB_DEBUG -options USB_HOST_ALIGN=32 # AR71XX (MIPS in general?) requires this - -# Ethernet configuration -device mii -device arge -options ARGE_DEBUG - -# SPI, flash -device spibus -device ar71xx_spi -device mx25l -device ar71xx_wdog - -# Serial driver -device uart - -# Networking -device loop -device ether -device md -device bpf -#device if_bridge - -# GPIO - normally it's okay as a module -#device gpio -#device gpioled - diff --git a/sys/mips/conf/std.BERI b/sys/mips/conf/std.BERI deleted file mode 100644 index 17810dd39f2..00000000000 --- a/sys/mips/conf/std.BERI +++ /dev/null @@ -1,61 +0,0 @@ -# -# BERI_TEMPLATE -- a template kernel configuration for the SRI/Cambridge -# "BERI" (Bluespec Extensible RISC Implementation) FPGA soft core CPU. This -# kernel configuration file will be included by other board-specific files, -# and so contains only BERI features common across all board targets. -# -# - -machine mips mips64 - -cpu CPU_BERI - -options HZ=200 - -makeoptions KERNLOADADDR=0xffffffff80100000 - -include "../beri/std.beri" - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols - -makeoptions MODULES_OVERRIDE="" - -options DDB -options KDB -options ALT_BREAK_TO_DEBUGGER -options KTRACE - -options CAPABILITY_MODE -options CAPABILITIES - -options COMPAT_FREEBSD10 -options COMPAT_FREEBSD11 -options COMPAT_FREEBSD12 - -options INTRNG -options SCHED_ULE - -options FFS #Berkeley Fast Filesystem - -options INET -options INET6 -options TCP_HHOOK # hhook(9) framework for TCP -options KGSSAPI -options NFSCL -options NFSLOCKD -options NFS_ROOT - -# Debugging for use in -current -#options DEADLKRES #Enable the deadlock resolver -options INVARIANTS #Enable calls of extra sanity checking -options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS -#options WITNESS #Enable checks to detect deadlocks and cycles -#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed - -device crypto -device cryptodev -device ether -device geom_map -device loop -device md -device snp diff --git a/sys/mips/conf/std.MALTA b/sys/mips/conf/std.MALTA deleted file mode 100644 index d15cf78ed31..00000000000 --- a/sys/mips/conf/std.MALTA +++ /dev/null @@ -1,63 +0,0 @@ -# MALTA_COMMON -- Common kernel config options for MALTA boards -# - -options YAMON - -options TICK_USE_YAMON_FREQ=defined -#options TICK_USE_MALTA_RTC=defined - -include "../malta/std.malta" - -hints "MALTA.hints" #Default places to look for devices. - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols - -options DDB -options KDB - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -options TCP_HHOOK # hhook(9) framework for TCP -options NFSCL #Network Filesystem Client -options NFS_ROOT #NFS usable as /, requires NFSCL -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions -options CAPABILITY_MODE # Capsicum capability mode -options CAPABILITIES # Capsicum capabilities - -options TMPFS #Efficient memory filesystem - -options FFS #Berkeley Fast Filesystem -options SOFTUPDATES #Enable FFS soft updates support -options UFS_ACL #Support for access control lists -options UFS_DIRHASH #Improve performance on big directories -options ROOTDEVNAME=\"ufs:ada0\" - -options GEOM_LABEL # Provides labelization -options GEOM_PART_GPT # GUID Partition Tables. -options GEOM_RAID # Soft RAID functionality. - -# Debugging for use in -current -#options DEADLKRES #Enable the deadlock resolver -options INVARIANTS #Enable calls of extra sanity checking -options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS -#options WITNESS #Enable checks to detect deadlocks and cycles -#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed - -# Kernel dump features. -options ZSTDIO # zstd-compressed kernel and user dumps - -device loop -device ether -device le -device miibus -device bpf -device md -device uart - -# VirtIO support -device virtio # Generic VirtIO bus (required) -device virtio_pci # VirtIO PCI Interface -device vtnet # VirtIO Ethernet device -device virtio_blk # VirtIO Block device -device virtio_random # VirtIO Entropy device diff --git a/sys/mips/conf/std.QCA955X b/sys/mips/conf/std.QCA955X deleted file mode 100644 index 138b4bf8076..00000000000 --- a/sys/mips/conf/std.QCA955X +++ /dev/null @@ -1,76 +0,0 @@ -# -# QCA955X_BASE -- Kernel configuration base file for the Qualcomm Atheros -# QCA955x SoC. -# -# This file (and the hints file accompanying it) are not designed to be -# used by themselves. Instead, users of this file should create a kernel -# config file which includes this file (which gets the basic hints), then -# override the default options (adding devices as needed) and adding -# hints as needed (for example, the GPIO and LAN PHY.) -# -# - -machine mips mips -#ident std.QCA955X -cpu CPU_MIPS74K -makeoptions KERNLOADADDR=0x80050000 -options HZ=1000 - -files "../atheros/files.ar71xx" -hints "QCA955X_BASE.hints" - -options DDB -options KDB -options ALQ - -options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -#options INET6 #InterNETworking -options TCP_HHOOK # hhook(9) framework for TCP -#options NFSCL #Network Filesystem Client -options PSEUDOFS #Pseudo-filesystem framework -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions - -# PMC - fow now there's no hwpmc module for mips74k -options HWPMC_HOOKS - -# options NFS_LEGACYRPC -# Debugging for use in -current -#options INVARIANTS -#options INVARIANT_SUPPORT -#options WITNESS -#options WITNESS_SKIPSPIN -options FFS #Berkeley Fast Filesystem -#options SOFTUPDATES #Enable FFS soft updates support -#options UFS_ACL #Support for access control lists -#options UFS_DIRHASH #Improve performance on big directories -options NO_FFS_SNAPSHOT # We don't require snapshot support - -include "std.AR_MIPS_BASE" -makeoptions MODULES_OVERRIDE+="hwpmc_mips74k" - -# EEPROM caldata for AHB connected device -options AR71XX_ATH_EEPROM -device ar71xx_caldata -device firmware - -# Support QCA955x in the HAL -option AH_SUPPORT_QCA9550 # Chipset support - -# Support EEPROM caldata in AHB devices -options ATH_EEPROM_FIRMWARE - -device uart_ar71xx - -device ar71xx_apb -# Until some better interrupt handling is shoehorned into qca955x_apb, -# we'll have to stick to shared interrupts for IP2/IP3 demux. -# device qca955x_apb - -device usb -device ehci - -device scbus -device umass -device da - diff --git a/sys/mips/conf/std.XLP b/sys/mips/conf/std.XLP deleted file mode 100644 index c01a5cac396..00000000000 --- a/sys/mips/conf/std.XLP +++ /dev/null @@ -1,120 +0,0 @@ - -include "../nlm/std.xlp" -makeoptions MODULES_OVERRIDE="" -makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols -#profile 2 - -hints "XLP.hints" - -options SCHED_ULE # ULE scheduler -#options VERBOSE_SYSINIT -#options SCHED_4BSD # 4BSD scheduler -options SMP -options PREEMPTION # Enable kernel thread preemption -#options FULL_PREEMPTION # Enable kernel thread preemption -options INET # InterNETworking -options INET6 # IPv6 communications protocols -options TCP_HHOOK # hhook(9) framework for TCP -options FFS # Berkeley Fast Filesystem -#options SOFTUPDATES # Enable FFS soft updates support -options UFS_ACL # Support for access control lists -options UFS_DIRHASH # Improve performance on big directories -options NFSCL -options NFS_ROOT -options MSDOSFS #MSDOS Filesystem -# -#options BOOTP -#options BOOTP_NFSROOT -#options BOOTP_NFSV3 -#options BOOTP_WIRED_TO=nlge0 -#options BOOTP_COMPAT -#options ROOTDEVNAME=\"nfs:10.1.1.8:/usr/extra/nfsroot\" - -options MD_ROOT # MD is a potential root device -options MD_ROOT_SIZE=132000 -options ROOTDEVNAME=\"ufs:md0\" -options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions -options HZ=1000 -options NO_SWAPPING - -# Debugging options -options KTRACE # ktrace(1) support -options DDB -options KDB -options GDB -options BREAK_TO_DEBUGGER -options ALT_BREAK_TO_DEBUGGER -#options DEADLKRES # Enable the deadlock resolver -#options INVARIANTS -#options INVARIANT_SUPPORT -#options WITNESS # Detect deadlocks and cycles -#options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed -#options KTR # ktr(4) and ktrdump(8) support -#options KTR_COMPILE=(KTR_LOCK|KTR_PROC|KTR_INTR|KTR_CALLOUT|KTR_UMA|KTR_SYSC) -#options KTR_ENTRIES=131072 -#options LOCK_DEBUG -#options LOCK_PROFILING - -device xz -options GEOM_UZIP - -device clk - -# Device tree -options FDT -options FDT_DTB_STATIC -makeoptions FDT_DTS_FILE=xlp-basic.dts - -# Pseudo -device loop -device md -device bpf - -# Network -device miibus -device ether -device xlpge -#device re -device msk -device iflib -device em - -# Disks -device siis -device da -device scbus -#device ata - -# USB -device usb # USB Bus (required) -device ehci # EHCI PCI->USB interface (USB 2.0) -#options USB_DEBUG # enable debug msgs -#device ugen # Generic -#device uhid # "Human Interface Devices" -device umass # Requires scbus and da - -# i2c driver and devices -device iic -device iicbus -device iicoc -device ds13rtc # RTC on XLP boards - -# Crypto -device crypto -device cryptodev -device nlmsec -device nlmrsa - -# Options that use crypto -options IPSEC -options GEOM_ELI - -# NOR -device cfi -device cfid - -# MMC/SD -device gpio -device mmc # MMC/SD bus -device mmcsd # MMC/SD memory card -device sdhci # Generic PCI SD Host Controller diff --git a/sys/mips/include/_align.h b/sys/mips/include/_align.h deleted file mode 100644 index 6a93d1d408c..00000000000 --- a/sys/mips/include/_align.h +++ /dev/null @@ -1,54 +0,0 @@ -/* $OpenBSD: param.h,v 1.11 1998/08/30 22:05:35 millert Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: Utah Hdr: machparam.h 1.11 89/08/14 - * from: @(#)param.h 8.1 (Berkeley) 6/10/93 - * JNPR: param.h,v 1.6.2.1 2007/09/10 07:49:36 girish - */ - -#ifndef _MIPS_INCLUDE__ALIGN_H_ -#define _MIPS_INCLUDE__ALIGN_H_ - -/* - * Round p (pointer or byte index) up to a correctly-aligned value for all - * data types (int, long, ...). The result is u_long and must be cast to - * any desired pointer type. - */ -#define _ALIGNBYTES 7 -#define _ALIGN(p) (((u_long)(p) + _ALIGNBYTES) &~ _ALIGNBYTES) - -#endif /* !_MIPS_INCLUDE__ALIGN_H_ */ diff --git a/sys/mips/include/_bus.h b/sys/mips/include/_bus.h deleted file mode 100644 index 0ca616af0df..00000000000 --- a/sys/mips/include/_bus.h +++ /dev/null @@ -1,50 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2005 M. Warner Losh - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: src/sys/i386/include/_bus.h,v 1.1 2005/04/18 21:45:33 imp - */ - -#ifndef MIPS_INCLUDE__BUS_H -#define MIPS_INCLUDE__BUS_H - -/* - * Bus address and size types - */ -#if defined(CPU_CNMIPS) && !defined(__mips_n64) -typedef uint64_t bus_addr_t; -#else -typedef uintptr_t bus_addr_t; -#endif -typedef uintptr_t bus_size_t; - -/* - * Access methods for bus resources and address space. - */ -typedef struct bus_space *bus_space_tag_t; -typedef bus_addr_t bus_space_handle_t; -#endif /* MIPS_INCLUDE__BUS_H */ diff --git a/sys/mips/include/_inttypes.h b/sys/mips/include/_inttypes.h deleted file mode 100644 index 8a852027978..00000000000 --- a/sys/mips/include/_inttypes.h +++ /dev/null @@ -1,223 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2001 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Klaus Klein. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * From: $NetBSD: int_fmtio.h,v 1.2 2001/04/26 16:25:21 kleink Exp $ - * from: src/sys/i386/include/_inttypes.h,v 1.2 2002/06/30 05:48:02 mike - */ - -#ifndef _MACHINE_INTTYPES_H_ -#define _MACHINE_INTTYPES_H_ - -/* - * Macros for format specifiers. - */ - -#ifdef __mips_n64 -#define __PRI64 "l" -#define __PRIptr "l" -#else -#define __PRI64 "ll" -#define __PRIptr -#endif - -/* fprintf(3) macros for signed integers. */ - -#define PRId8 "d" /* int8_t */ -#define PRId16 "d" /* int16_t */ -#define PRId32 "d" /* int32_t */ -#define PRId64 __PRI64"d" /* int64_t */ -#define PRIdLEAST8 "d" /* int_least8_t */ -#define PRIdLEAST16 "d" /* int_least16_t */ -#define PRIdLEAST32 "d" /* int_least32_t */ -#define PRIdLEAST64 __PRI64"d" /* int_least64_t */ -#define PRIdFAST8 "d" /* int_fast8_t */ -#define PRIdFAST16 "d" /* int_fast16_t */ -#define PRIdFAST32 "d" /* int_fast32_t */ -#define PRIdFAST64 __PRI64"d" /* int_fast64_t */ -#define PRIdMAX "jd" /* intmax_t */ -#define PRIdPTR __PRIptr"d" /* intptr_t */ - -#define PRIi8 "i" /* int8_t */ -#define PRIi16 "i" /* int16_t */ -#define PRIi32 "i" /* int32_t */ -#define PRIi64 __PRI64"i" /* int64_t */ -#define PRIiLEAST8 "i" /* int_least8_t */ -#define PRIiLEAST16 "i" /* int_least16_t */ -#define PRIiLEAST32 "i" /* int_least32_t */ -#define PRIiLEAST64 __PRI64"i" /* int_least64_t */ -#define PRIiFAST8 "i" /* int_fast8_t */ -#define PRIiFAST16 "i" /* int_fast16_t */ -#define PRIiFAST32 "i" /* int_fast32_t */ -#define PRIiFAST64 __PRI64"i" /* int_fast64_t */ -#define PRIiMAX "ji" /* intmax_t */ -#define PRIiPTR __PRIptr"i" /* intptr_t */ - -/* fprintf(3) macros for unsigned integers. */ - -#define PRIo8 "o" /* uint8_t */ -#define PRIo16 "o" /* uint16_t */ -#define PRIo32 "o" /* uint32_t */ -#define PRIo64 __PRI64"o" /* uint64_t */ -#define PRIoLEAST8 "o" /* uint_least8_t */ -#define PRIoLEAST16 "o" /* uint_least16_t */ -#define PRIoLEAST32 "o" /* uint_least32_t */ -#define PRIoLEAST64 __PRI64"o" /* uint_least64_t */ -#define PRIoFAST8 "o" /* uint_fast8_t */ -#define PRIoFAST16 "o" /* uint_fast16_t */ -#define PRIoFAST32 "o" /* uint_fast32_t */ -#define PRIoFAST64 __PRI64"o" /* uint_fast64_t */ -#define PRIoMAX "jo" /* uintmax_t */ -#define PRIoPTR __PRIptr"o" /* uintptr_t */ - -#define PRIu8 "u" /* uint8_t */ -#define PRIu16 "u" /* uint16_t */ -#define PRIu32 "u" /* uint32_t */ -#define PRIu64 __PRI64"u" /* uint64_t */ -#define PRIuLEAST8 "u" /* uint_least8_t */ -#define PRIuLEAST16 "u" /* uint_least16_t */ -#define PRIuLEAST32 "u" /* uint_least32_t */ -#define PRIuLEAST64 __PRI64"u" /* uint_least64_t */ -#define PRIuFAST8 "u" /* uint_fast8_t */ -#define PRIuFAST16 "u" /* uint_fast16_t */ -#define PRIuFAST32 "u" /* uint_fast32_t */ -#define PRIuFAST64 __PRI64"u" /* uint_fast64_t */ -#define PRIuMAX "ju" /* uintmax_t */ -#define PRIuPTR __PRIptr"u" /* uintptr_t */ - -#define PRIx8 "x" /* uint8_t */ -#define PRIx16 "x" /* uint16_t */ -#define PRIx32 "x" /* uint32_t */ -#define PRIx64 __PRI64"x" /* uint64_t */ -#define PRIxLEAST8 "x" /* uint_least8_t */ -#define PRIxLEAST16 "x" /* uint_least16_t */ -#define PRIxLEAST32 "x" /* uint_least32_t */ -#define PRIxLEAST64 __PRI64"x" /* uint_least64_t */ -#define PRIxFAST8 "x" /* uint_fast8_t */ -#define PRIxFAST16 "x" /* uint_fast16_t */ -#define PRIxFAST32 "x" /* uint_fast32_t */ -#define PRIxFAST64 __PRI64"x" /* uint_fast64_t */ -#define PRIxMAX "jx" /* uintmax_t */ -#define PRIxPTR __PRIptr"x" /* uintptr_t */ - -#define PRIX8 "X" /* uint8_t */ -#define PRIX16 "X" /* uint16_t */ -#define PRIX32 "X" /* uint32_t */ -#define PRIX64 __PRI64"X" /* uint64_t */ -#define PRIXLEAST8 "X" /* uint_least8_t */ -#define PRIXLEAST16 "X" /* uint_least16_t */ -#define PRIXLEAST32 "X" /* uint_least32_t */ -#define PRIXLEAST64 __PRI64"X" /* uint_least64_t */ -#define PRIXFAST8 "X" /* uint_fast8_t */ -#define PRIXFAST16 "X" /* uint_fast16_t */ -#define PRIXFAST32 "X" /* uint_fast32_t */ -#define PRIXFAST64 __PRI64"X" /* uint_fast64_t */ -#define PRIXMAX "jX" /* uintmax_t */ -#define PRIXPTR __PRIptr"X" /* uintptr_t */ - -/* fscanf(3) macros for signed integers. */ - -#define SCNd8 "hhd" /* int8_t */ -#define SCNd16 "hd" /* int16_t */ -#define SCNd32 "d" /* int32_t */ -#define SCNd64 __PRI64"d" /* int64_t */ -#define SCNdLEAST8 "hhd" /* int_least8_t */ -#define SCNdLEAST16 "hd" /* int_least16_t */ -#define SCNdLEAST32 "d" /* int_least32_t */ -#define SCNdLEAST64 __PRI64"d" /* int_least64_t */ -#define SCNdFAST8 "d" /* int_fast8_t */ -#define SCNdFAST16 "d" /* int_fast16_t */ -#define SCNdFAST32 "d" /* int_fast32_t */ -#define SCNdFAST64 __PRI64"d" /* int_fast64_t */ -#define SCNdMAX "jd" /* intmax_t */ -#define SCNdPTR __PRIptr"d" /* intptr_t */ - -#define SCNi8 "hhi" /* int8_t */ -#define SCNi16 "hi" /* int16_t */ -#define SCNi32 "i" /* int32_t */ -#define SCNi64 __PRI64"i" /* int64_t */ -#define SCNiLEAST8 "hhi" /* int_least8_t */ -#define SCNiLEAST16 "hi" /* int_least16_t */ -#define SCNiLEAST32 "i" /* int_least32_t */ -#define SCNiLEAST64 __PRI64"i" /* int_least64_t */ -#define SCNiFAST8 "i" /* int_fast8_t */ -#define SCNiFAST16 "i" /* int_fast16_t */ -#define SCNiFAST32 "i" /* int_fast32_t */ -#define SCNiFAST64 __PRI64"i" /* int_fast64_t */ -#define SCNiMAX "ji" /* intmax_t */ -#define SCNiPTR __PRIptr"i" /* intptr_t */ - -/* fscanf(3) macros for unsigned integers. */ - -#define SCNo8 "hho" /* uint8_t */ -#define SCNo16 "ho" /* uint16_t */ -#define SCNo32 "o" /* uint32_t */ -#define SCNo64 __PRI64"o" /* uint64_t */ -#define SCNoLEAST8 "hho" /* uint_least8_t */ -#define SCNoLEAST16 "ho" /* uint_least16_t */ -#define SCNoLEAST32 "o" /* uint_least32_t */ -#define SCNoLEAST64 __PRI64"o" /* uint_least64_t */ -#define SCNoFAST8 "o" /* uint_fast8_t */ -#define SCNoFAST16 "o" /* uint_fast16_t */ -#define SCNoFAST32 "o" /* uint_fast32_t */ -#define SCNoFAST64 __PRI64"o" /* uint_fast64_t */ -#define SCNoMAX "jo" /* uintmax_t */ -#define SCNoPTR __PRIptr"o" /* uintptr_t */ - -#define SCNu8 "hhu" /* uint8_t */ -#define SCNu16 "hu" /* uint16_t */ -#define SCNu32 "u" /* uint32_t */ -#define SCNu64 __PRI64"u" /* uint64_t */ -#define SCNuLEAST8 "hhu" /* uint_least8_t */ -#define SCNuLEAST16 "hu" /* uint_least16_t */ -#define SCNuLEAST32 "u" /* uint_least32_t */ -#define SCNuLEAST64 __PRI64"u" /* uint_least64_t */ -#define SCNuFAST8 "u" /* uint_fast8_t */ -#define SCNuFAST16 "u" /* uint_fast16_t */ -#define SCNuFAST32 "u" /* uint_fast32_t */ -#define SCNuFAST64 __PRI64"u" /* uint_fast64_t */ -#define SCNuMAX "ju" /* uintmax_t */ -#define SCNuPTR __PRIptr"u" /* uintptr_t */ - -#define SCNx8 "hhx" /* uint8_t */ -#define SCNx16 "hx" /* uint16_t */ -#define SCNx32 "x" /* uint32_t */ -#define SCNx64 __PRI64"x" /* uint64_t */ -#define SCNxLEAST8 "hhx" /* uint_least8_t */ -#define SCNxLEAST16 "hx" /* uint_least16_t */ -#define SCNxLEAST32 "x" /* uint_least32_t */ -#define SCNxLEAST64 __PRI64"x" /* uint_least64_t */ -#define SCNxFAST8 "x" /* uint_fast8_t */ -#define SCNxFAST16 "x" /* uint_fast16_t */ -#define SCNxFAST32 "x" /* uint_fast32_t */ -#define SCNxFAST64 __PRI64"x" /* uint_fast64_t */ -#define SCNxMAX "jx" /* uintmax_t */ -#define SCNxPTR __PRIptr"x" /* uintptr_t */ - -#endif /* !_MACHINE_INTTYPES_H_ */ diff --git a/sys/mips/include/_limits.h b/sys/mips/include/_limits.h deleted file mode 100644 index c241d0eb17f..00000000000 --- a/sys/mips/include/_limits.h +++ /dev/null @@ -1,101 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1988, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)limits.h 8.3 (Berkeley) 1/4/94 - * from: src/sys/i386/include/_limits.h,v 1.27 2005/01/06 22:18:15 imp - */ - -#ifndef _MACHINE__LIMITS_H_ -#define _MACHINE__LIMITS_H_ - -/* - * According to ANSI (section 2.2.4.2), the values below must be usable by - * #if preprocessing directives. Additionally, the expression must have the - * same type as would an expression that is an object of the corresponding - * type converted according to the integral promotions. The subtraction for - * INT_MIN, etc., is so the value is not unsigned; e.g., 0x80000000 is an - * unsigned int for 32-bit two's complement ANSI compilers (section 3.1.3.2). - */ - -#define __CHAR_BIT 8 /* number of bits in a char */ - -#define __SCHAR_MAX 0x7f /* max value for a signed char */ -#define __SCHAR_MIN (-0x7f - 1) /* min value for a signed char */ - -#define __UCHAR_MAX 0xff /* max value for an unsigned char */ - -#define __USHRT_MAX 0xffff /* max value for an unsigned short */ -#define __SHRT_MAX 0x7fff /* max value for a short */ -#define __SHRT_MIN (-0x7fff - 1) /* min value for a short */ - -#define __UINT_MAX 0xffffffff /* max value for an unsigned int */ -#define __INT_MAX 0x7fffffff /* max value for an int */ -#define __INT_MIN (-0x7fffffff - 1) /* min value for an int */ - -#ifdef __mips_n64 -#define __ULONG_MAX 0xffffffffffffffff -#define __LONG_MAX 0x7fffffffffffffff -#define __LONG_MIN (-0x7fffffffffffffff - 1) -#define __LONG_BIT 64 -#else -#define __ULONG_MAX 0xffffffffUL /* max value for an unsigned long */ -#define __LONG_MAX 0x7fffffffL /* max value for a long */ -#define __LONG_MIN (-0x7fffffffL - 1) /* min value for a long */ -#define __LONG_BIT 32 -#endif - - /* max value for an unsigned long long */ -#define __ULLONG_MAX 0xffffffffffffffffULL -#define __LLONG_MAX 0x7fffffffffffffffLL /* max value for a long long */ -#define __LLONG_MIN (-0x7fffffffffffffffLL - 1) /* min for a long long */ - -#ifdef __mips_n64 -#define __SSIZE_MAX __LONG_MAX /* max value for a ssize_t */ -#define __SIZE_T_MAX __ULONG_MAX /* max value for a size_t */ -#define __OFF_MAX __LONG_MAX /* max value for an off_t */ -#define __OFF_MIN __LONG_MIN /* min value for an off_t */ -#define __UQUAD_MAX __ULONG_MAX /* max value for a uquad_t */ -#define __QUAD_MAX __LONG_MAX /* max value for a quad_t */ -#define __QUAD_MIN __LONG_MIN /* min value for a quad_t */ -#else -#define __SSIZE_MAX __INT_MAX -#define __SIZE_T_MAX __UINT_MAX -#define __OFF_MAX __LLONG_MAX -#define __OFF_MIN __LLONG_MIN -#define __UQUAD_MAX __ULLONG_MAX -#define __QUAD_MAX __LLONG_MAX -#define __QUAD_MIN __LLONG_MIN -#endif - -#define __WORD_BIT 32 - -#define __MINSIGSTKSZ (512 * 4) - -#endif /* !_MACHINE__LIMITS_H_ */ diff --git a/sys/mips/include/_stdint.h b/sys/mips/include/_stdint.h deleted file mode 100644 index 801b67b84f1..00000000000 --- a/sys/mips/include/_stdint.h +++ /dev/null @@ -1,198 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 2001, 2002 Mike Barcroft - * Copyright (c) 2001 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Klaus Klein. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the NetBSD - * Foundation, Inc. and its contributors. - * 4. Neither the name of The NetBSD Foundation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * from: src/sys/i386/include/_stdint.h,v 1.2 2004/05/18 16:04:57 stefanf - */ - -#ifndef _MACHINE__STDINT_H_ -#define _MACHINE__STDINT_H_ - -#if !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS) - -#define INT8_C(c) (c) -#define INT16_C(c) (c) -#define INT32_C(c) (c) - -#define UINT8_C(c) (c) -#define UINT16_C(c) (c) -#define UINT32_C(c) (c ## U) - -#ifdef __mips_n64 -#define INT64_C(c) (c ## L) -#define UINT64_C(c) (c ## UL) -#else -#define INT64_C(c) (c ## LL) -#define UINT64_C(c) (c ## ULL) -#endif - -#define INTMAX_C(c) INT64_C(c) -#define UINTMAX_C(c) UINT64_C(c) - -#endif /* !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS) */ - -#if !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS) - -#ifndef __INT64_C -#ifdef __mips_n64 -#define __INT64_C(c) (c ## L) -#define __UINT64_C(c) (c ## UL) -#else -#define __INT64_C(c) (c ## LL) -#define __UINT64_C(c) (c ## ULL) -#endif -#endif - -/* - * ISO/IEC 9899:1999 - * 7.18.2.1 Limits of exact-width integer types - */ -/* Minimum values of exact-width signed integer types. */ -#define INT8_MIN (-0x7f-1) -#define INT16_MIN (-0x7fff-1) -#define INT32_MIN (-0x7fffffff-1) -#define INT64_MIN (-__INT64_C(0x7fffffffffffffff)-1) - -/* Maximum values of exact-width signed integer types. */ -#define INT8_MAX 0x7f -#define INT16_MAX 0x7fff -#define INT32_MAX 0x7fffffff -#define INT64_MAX __INT64_C(0x7fffffffffffffff) - -/* Maximum values of exact-width unsigned integer types. */ -#define UINT8_MAX 0xff -#define UINT16_MAX 0xffff -#define UINT32_MAX 0xffffffff -#define UINT64_MAX __UINT64_C(0xffffffffffffffff) - -/* - * ISO/IEC 9899:1999 - * 7.18.2.2 Limits of minimum-width integer types - */ -/* Minimum values of minimum-width signed integer types. */ -#define INT_LEAST8_MIN INT8_MIN -#define INT_LEAST16_MIN INT16_MIN -#define INT_LEAST32_MIN INT32_MIN -#define INT_LEAST64_MIN INT64_MIN - -/* Maximum values of minimum-width signed integer types. */ -#define INT_LEAST8_MAX INT8_MAX -#define INT_LEAST16_MAX INT16_MAX -#define INT_LEAST32_MAX INT32_MAX -#define INT_LEAST64_MAX INT64_MAX - -/* Maximum values of minimum-width unsigned integer types. */ -#define UINT_LEAST8_MAX UINT8_MAX -#define UINT_LEAST16_MAX UINT16_MAX -#define UINT_LEAST32_MAX UINT32_MAX -#define UINT_LEAST64_MAX UINT64_MAX - -/* - * ISO/IEC 9899:1999 - * 7.18.2.3 Limits of fastest minimum-width integer types - */ -/* Minimum values of fastest minimum-width signed integer types. */ -#define INT_FAST8_MIN INT32_MIN -#define INT_FAST16_MIN INT32_MIN -#define INT_FAST32_MIN INT32_MIN -#define INT_FAST64_MIN INT64_MIN - -/* Maximum values of fastest minimum-width signed integer types. */ -#define INT_FAST8_MAX INT32_MAX -#define INT_FAST16_MAX INT32_MAX -#define INT_FAST32_MAX INT32_MAX -#define INT_FAST64_MAX INT64_MAX - -/* Maximum values of fastest minimum-width unsigned integer types. */ -#define UINT_FAST8_MAX UINT32_MAX -#define UINT_FAST16_MAX UINT32_MAX -#define UINT_FAST32_MAX UINT32_MAX -#define UINT_FAST64_MAX UINT64_MAX - -/* - * ISO/IEC 9899:1999 - * 7.18.2.4 Limits of integer types capable of holding object pointers - */ -#ifdef __mips_n64 -#define INTPTR_MIN INT64_MIN -#define INTPTR_MAX INT64_MAX -#define UINTPTR_MAX UINT64_MAX -#else -#define INTPTR_MIN INT32_MIN -#define INTPTR_MAX INT32_MAX -#define UINTPTR_MAX UINT32_MAX -#endif - -/* - * ISO/IEC 9899:1999 - * 7.18.2.5 Limits of greatest-width integer types - */ -#define INTMAX_MIN INT64_MIN -#define INTMAX_MAX INT64_MAX -#define UINTMAX_MAX UINT64_MAX - -/* - * ISO/IEC 9899:1999 - * 7.18.3 Limits of other integer types - */ -#ifdef __mips_n64 -/* Limits of ptrdiff_t. */ -#define PTRDIFF_MIN INT64_MIN -#define PTRDIFF_MAX INT64_MAX - -/* Limit of size_t. */ -#define SIZE_MAX UINT64_MAX -#else -/* Limits of ptrdiff_t. */ -#define PTRDIFF_MIN INT32_MIN -#define PTRDIFF_MAX INT32_MAX - -/* Limit of size_t. */ -#define SIZE_MAX UINT32_MAX -#endif - -/* Limits of sig_atomic_t. */ -#define SIG_ATOMIC_MIN INT32_MIN -#define SIG_ATOMIC_MAX INT32_MAX - -/* Limits of wint_t. */ -#define WINT_MIN INT32_MIN -#define WINT_MAX INT32_MAX - -#endif /* !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS) */ - -#endif /* !_MACHINE__STDINT_H_ */ diff --git a/sys/mips/include/_types.h b/sys/mips/include/_types.h deleted file mode 100644 index 9aea1fc98be..00000000000 --- a/sys/mips/include/_types.h +++ /dev/null @@ -1,154 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 2002 Mike Barcroft - * Copyright (c) 1990, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * From: @(#)ansi.h 8.2 (Berkeley) 1/4/94 - * From: @(#)types.h 8.3 (Berkeley) 1/5/94 - * from: src/sys/i386/include/_types.h,v 1.12 2005/07/02 23:13:31 thompsa - */ - -#ifndef _MACHINE__TYPES_H_ -#define _MACHINE__TYPES_H_ - -#ifndef _SYS_CDEFS_H_ -#error this file needs sys/cdefs.h as a prerequisite -#endif - -/* - * Basic types upon which most other types are built. - */ -typedef signed char __int8_t; -typedef unsigned char __uint8_t; -typedef short __int16_t; -typedef unsigned short __uint16_t; -typedef int __int32_t; -typedef unsigned int __uint32_t; -#ifdef __mips_n64 -typedef long __int64_t; -typedef unsigned long __uint64_t; -#else -#ifndef lint -__extension__ -#endif -/* LONGLONG */ -typedef long long __int64_t; -#ifndef lint -__extension__ -#endif -/* LONGLONG */ -typedef unsigned long long __uint64_t; -#endif - -/* - * Standard type definitions. - */ -typedef __int32_t __clock_t; /* clock()... */ -#ifndef _STANDALONE -typedef double __double_t; -typedef float __float_t; -#endif -#ifdef __mips_n64 -typedef __int64_t __critical_t; -typedef __int64_t __intfptr_t; -typedef __int64_t __intptr_t; -#else -typedef __int32_t __critical_t; -typedef __int32_t __intfptr_t; -typedef __int32_t __intptr_t; -#endif -typedef __int64_t __intmax_t; -typedef __int32_t __int_fast8_t; -typedef __int32_t __int_fast16_t; -typedef __int32_t __int_fast32_t; -typedef __int64_t __int_fast64_t; -typedef __int8_t __int_least8_t; -typedef __int16_t __int_least16_t; -typedef __int32_t __int_least32_t; -typedef __int64_t __int_least64_t; -#if defined(__mips_n64) || defined(__mips_n32) -typedef __int64_t __register_t; -typedef __int64_t f_register_t; -#else -typedef __int32_t __register_t; -typedef __int32_t f_register_t; -#endif -#ifdef __mips_n64 -typedef __int64_t __ptrdiff_t; -typedef __int64_t __segsz_t; -typedef __uint64_t __size_t; -typedef __int64_t __ssize_t; -typedef __uint64_t __uintfptr_t; -typedef __uint64_t __uintptr_t; -#else -typedef __int32_t __ptrdiff_t; /* ptr1 - ptr2 */ -typedef __int32_t __segsz_t; /* segment size (in pages) */ -typedef __uint32_t __size_t; /* sizeof() */ -typedef __int32_t __ssize_t; /* byte count or error */ -typedef __uint32_t __uintfptr_t; -typedef __uint32_t __uintptr_t; -#endif -typedef __int64_t __time_t; /* time()... */ -typedef __uint64_t __uintmax_t; -typedef __uint32_t __uint_fast8_t; -typedef __uint32_t __uint_fast16_t; -typedef __uint32_t __uint_fast32_t; -typedef __uint64_t __uint_fast64_t; -typedef __uint8_t __uint_least8_t; -typedef __uint16_t __uint_least16_t; -typedef __uint32_t __uint_least32_t; -typedef __uint64_t __uint_least64_t; -#if defined(__mips_n64) || defined(__mips_n32) -typedef __uint64_t __u_register_t; -#else -typedef __uint32_t __u_register_t; -#endif -#ifdef __mips_n64 -typedef __uint64_t __vm_offset_t; -typedef __uint64_t __vm_size_t; -#else -typedef __uint32_t __vm_offset_t; -typedef __uint32_t __vm_size_t; -#endif -#if defined(__mips_n64) || defined(__mips_n32) /* PHYSADDR_64_BIT */ -typedef __uint64_t __vm_paddr_t; -#else -typedef __uint32_t __vm_paddr_t; -#endif - -typedef int ___wchar_t; - -#define __WCHAR_MIN __INT_MIN /* min value for a wchar_t */ -#define __WCHAR_MAX __INT_MAX /* max value for a wchar_t */ - -#endif /* !_MACHINE__TYPES_H_ */ diff --git a/sys/mips/include/abi.h b/sys/mips/include/abi.h deleted file mode 100644 index d7b98565dc9..00000000000 --- a/sys/mips/include/abi.h +++ /dev/null @@ -1,94 +0,0 @@ -/* $NetBSD: asm.h,v 1.29 2000/12/14 21:29:51 jeffs Exp $ */ - -/* - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93 - * JNPR: asm.h,v 1.10 2007/08/09 11:23:32 katta - */ - -/* - * machAsmDefs.h -- - * - * Macros used when writing assembler programs. - * - * Copyright (C) 1989 Digital Equipment Corporation. - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose and without fee is hereby granted, - * provided that the above copyright notice appears in all copies. - * Digital Equipment Corporation makes no representations about the - * suitability of this software for any purpose. It is provided "as is" - * without express or implied warranty. - * - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h, - * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL) - */ - -#ifndef _MACHINE_ABI_H_ -#define _MACHINE_ABI_H_ - -#if defined(__mips_o32) -#define SZREG 4 -#else -#define SZREG 8 -#endif - -#if defined(__mips_o32) || defined(__mips_o64) -#define STACK_ALIGN 8 -#else -#define STACK_ALIGN 16 -#endif - -/* - * standard callframe { - * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1) - * register_t cf_args[4]; arg0 - arg3 (only on o32 and o64) - * register_t cf_gp; global pointer (only on n32 and n64) - * register_t cf_sp; frame pointer - * register_t cf_ra; return address - * }; - */ -#if defined(__mips_o32) || defined(__mips_o64) -#define CALLFRAME_SIZ (SZREG * (4 + 2)) -#define CALLFRAME_S0 0 -#elif defined(__mips_n32) || defined(__mips_n64) -#define CALLFRAME_SIZ (SZREG * 4) -#define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG) -#endif -#ifndef _KERNEL -#define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG) -#endif -#define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG) -#define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG) - -#endif /* !_MACHINE_ABI_H_ */ diff --git a/sys/mips/include/asm.h b/sys/mips/include/asm.h deleted file mode 100644 index 7e9e95ef9f1..00000000000 --- a/sys/mips/include/asm.h +++ /dev/null @@ -1,685 +0,0 @@ -/* $NetBSD: asm.h,v 1.29 2000/12/14 21:29:51 jeffs Exp $ */ - -/* - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93 - * JNPR: asm.h,v 1.10 2007/08/09 11:23:32 katta - */ - -/* - * machAsmDefs.h -- - * - * Macros used when writing assembler programs. - * - * Copyright (C) 1989 Digital Equipment Corporation. - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose and without fee is hereby granted, - * provided that the above copyright notice appears in all copies. - * Digital Equipment Corporation makes no representations about the - * suitability of this software for any purpose. It is provided "as is" - * without express or implied warranty. - * - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h, - * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL) - */ - -#ifndef _MACHINE_ASM_H_ -#define _MACHINE_ASM_H_ - -#include -#include -#include -#include - -#undef __FBSDID -#if !defined(lint) && !defined(STRIP_FBSDID) -#define __FBSDID(s) .ident s -#else -#define __FBSDID(s) /* nothing */ -#endif - -/* - * Define -pg profile entry code. - * Must always be noreorder, must never use a macro instruction - * Final addiu to t9 must always equal the size of this _KERN_MCOUNT - */ -#define _KERN_MCOUNT \ - .set push; \ - .set noreorder; \ - .set noat; \ - subu sp,sp,16; \ - sw t9,12(sp); \ - move AT,ra; \ - lui t9,%hi(_mcount); \ - addiu t9,t9,%lo(_mcount); \ - jalr t9; \ - nop; \ - lw t9,4(sp); \ - addiu sp,sp,8; \ - addiu t9,t9,40; \ - .set pop; - -#ifdef GPROF -#define MCOUNT _KERN_MCOUNT -#else -#define MCOUNT -#endif - -#define _C_LABEL(x) x - -#ifdef USE_AENT -#define AENT(x) \ - .aent x, 0 -#else -#define AENT(x) -#endif - -/* - * WARN_REFERENCES: create a warning if the specified symbol is referenced - */ -#define WARN_REFERENCES(_sym,_msg) \ - .section .gnu.warning. ## _sym ; .ascii _msg ; .text - -#ifdef __ELF__ -# define _C_LABEL(x) x -#else -# define _C_LABEL(x) _ ## x -#endif - -/* - * WEAK_ALIAS: create a weak alias. - */ -#define WEAK_ALIAS(alias,sym) \ - .weak alias; \ - alias = sym - -/* - * STRONG_ALIAS: create a strong alias. - */ -#define STRONG_ALIAS(alias,sym) \ - .globl alias; \ - alias = sym - -#define GLOBAL(sym) \ - .globl sym; sym: - -#define ENTRY(sym) \ - .text; .globl sym; .ent sym; sym: - -#define ASM_ENTRY(sym) \ - .text; .globl sym; .type sym,@function; sym: - -/* - * LEAF - * A leaf routine does - * - call no other function, - * - never use any register that callee-saved (S0-S8), and - * - not use any local stack storage. - */ -#define LEAF(x) \ - .globl _C_LABEL(x); \ - .ent _C_LABEL(x), 0; \ -_C_LABEL(x): ; \ - .frame sp, 0, ra; \ - MCOUNT - -/* - * LEAF_NOPROFILE - * No profilable leaf routine. - */ -#define LEAF_NOPROFILE(x) \ - .globl _C_LABEL(x); \ - .ent _C_LABEL(x), 0; \ -_C_LABEL(x): ; \ - .frame sp, 0, ra - -/* - * XLEAF - * declare alternate entry to leaf routine - */ -#define XLEAF(x) \ - .globl _C_LABEL(x); \ - AENT (_C_LABEL(x)); \ -_C_LABEL(x): - -/* - * NESTED - * A function calls other functions and needs - * therefore stack space to save/restore registers. - */ -#define NESTED(x, fsize, retpc) \ - .globl _C_LABEL(x); \ - .ent _C_LABEL(x), 0; \ -_C_LABEL(x): ; \ - .frame sp, fsize, retpc; \ - MCOUNT - -/* - * NESTED_NOPROFILE(x) - * No profilable nested routine. - */ -#define NESTED_NOPROFILE(x, fsize, retpc) \ - .globl _C_LABEL(x); \ - .ent _C_LABEL(x), 0; \ -_C_LABEL(x): ; \ - .frame sp, fsize, retpc - -/* - * XNESTED - * declare alternate entry point to nested routine. - */ -#define XNESTED(x) \ - .globl _C_LABEL(x); \ - AENT (_C_LABEL(x)); \ -_C_LABEL(x): - -/* - * END - * Mark end of a procedure. - */ -#define END(x) \ - .end _C_LABEL(x) - -/* - * IMPORT -- import external symbol - */ -#define IMPORT(sym, size) \ - .extern _C_LABEL(sym),size - -/* - * EXPORT -- export definition of symbol - */ -#define EXPORT(x) \ - .globl _C_LABEL(x); \ -_C_LABEL(x): - -/* - * VECTOR - * exception vector entrypoint - * XXX: regmask should be used to generate .mask - */ -#define VECTOR(x, regmask) \ - .ent _C_LABEL(x),0; \ - EXPORT(x); \ - -#define VECTOR_END(x) \ - EXPORT(x ## End); \ - END(x) - -/* - * Macros to panic and printf from assembly language. - */ -#define PANIC(msg) \ - PTR_LA a0, 9f; \ - jal _C_LABEL(panic); \ - nop; \ - MSG(msg) - -#define PANIC_KSEG0(msg, reg) PANIC(msg) - -#define PRINTF(msg) \ - PTR_LA a0, 9f; \ - jal _C_LABEL(printf); \ - nop; \ - MSG(msg) - -#define MSG(msg) \ - .rdata; \ -9: .asciiz msg; \ - .text - -#define ASMSTR(str) \ - .asciiz str; \ - .align 3 - -#if defined(__mips_o32) || defined(__mips_o64) -#define ALSK 7 /* stack alignment */ -#define ALMASK -7 /* stack alignment */ -#define SZFPREG 4 -#define FP_L lwc1 -#define FP_S swc1 -#else -#define ALSK 15 /* stack alignment */ -#define ALMASK -15 /* stack alignment */ -#define SZFPREG 8 -#define FP_L ldc1 -#define FP_S sdc1 -#endif - -/* - * Endian-independent assembly-code aliases for unaligned memory accesses. - */ -#if _BYTE_ORDER == _LITTLE_ENDIAN -# define LWHI lwr -# define LWLO lwl -# define SWHI swr -# define SWLO swl -# if SZREG == 4 -# define REG_LHI lwr -# define REG_LLO lwl -# define REG_SHI swr -# define REG_SLO swl -# else -# define REG_LHI ldr -# define REG_LLO ldl -# define REG_SHI sdr -# define REG_SLO sdl -# endif -#endif - -#if _BYTE_ORDER == _BIG_ENDIAN -# define LWHI lwl -# define LWLO lwr -# define SWHI swl -# define SWLO swr -# if SZREG == 4 -# define REG_LHI lwl -# define REG_LLO lwr -# define REG_SHI swl -# define REG_SLO swr -# else -# define REG_LHI ldl -# define REG_LLO ldr -# define REG_SHI sdl -# define REG_SLO sdr -# endif -#endif - -/* - * While it would be nice to be compatible with the SGI - * REG_L and REG_S macros, because they do not take parameters, it - * is impossible to use them with the _MIPS_SIM_ABIX32 model. - * - * These macros hide the use of mips3 instructions from the - * assembler to prevent the assembler from generating 64-bit style - * ABI calls. - */ -#if _MIPS_SZPTR == 32 -#define PTR_ADD add -#define PTR_ADDI addi -#define PTR_ADDU addu -#define PTR_ADDIU addiu -#define PTR_SUB add -#define PTR_SUBI subi -#define PTR_SUBU subu -#define PTR_SUBIU subu -#define PTR_L lw -#define PTR_LA la -#define PTR_LI li -#define PTR_S sw -#define PTR_SLL sll -#define PTR_SLLV sllv -#define PTR_SRL srl -#define PTR_SRLV srlv -#define PTR_SRA sra -#define PTR_SRAV srav -#define PTR_LL ll -#define PTR_SC sc -#define PTR_WORD .word -#define PTR_SCALESHIFT 2 -#else /* _MIPS_SZPTR == 64 */ -#define PTR_ADD dadd -#define PTR_ADDI daddi -#define PTR_ADDU daddu -#define PTR_ADDIU daddiu -#define PTR_SUB dadd -#define PTR_SUBI dsubi -#define PTR_SUBU dsubu -#define PTR_SUBIU dsubu -#define PTR_L ld -#define PTR_LA dla -#define PTR_LI dli -#define PTR_S sd -#define PTR_SLL dsll -#define PTR_SLLV dsllv -#define PTR_SRL dsrl -#define PTR_SRLV dsrlv -#define PTR_SRA dsra -#define PTR_SRAV dsrav -#define PTR_LL lld -#define PTR_SC scd -#define PTR_WORD .dword -#define PTR_SCALESHIFT 3 -#endif /* _MIPS_SZPTR == 64 */ - -#if _MIPS_SZINT == 32 -#define INT_ADD add -#define INT_ADDI addi -#define INT_ADDU addu -#define INT_ADDIU addiu -#define INT_SUB add -#define INT_SUBI subi -#define INT_SUBU subu -#define INT_SUBIU subu -#define INT_L lw -#define INT_LA la -#define INT_S sw -#define INT_SLL sll -#define INT_SLLV sllv -#define INT_SRL srl -#define INT_SRLV srlv -#define INT_SRA sra -#define INT_SRAV srav -#define INT_LL ll -#define INT_SC sc -#define INT_WORD .word -#define INT_SCALESHIFT 2 -#else -#define INT_ADD dadd -#define INT_ADDI daddi -#define INT_ADDU daddu -#define INT_ADDIU daddiu -#define INT_SUB dadd -#define INT_SUBI dsubi -#define INT_SUBU dsubu -#define INT_SUBIU dsubu -#define INT_L ld -#define INT_LA dla -#define INT_S sd -#define INT_SLL dsll -#define INT_SLLV dsllv -#define INT_SRL dsrl -#define INT_SRLV dsrlv -#define INT_SRA dsra -#define INT_SRAV dsrav -#define INT_LL lld -#define INT_SC scd -#define INT_WORD .dword -#define INT_SCALESHIFT 3 -#endif - -#if _MIPS_SZLONG == 32 -#define LONG_ADD add -#define LONG_ADDI addi -#define LONG_ADDU addu -#define LONG_ADDIU addiu -#define LONG_SUB add -#define LONG_SUBI subi -#define LONG_SUBU subu -#define LONG_SUBIU subu -#define LONG_L lw -#define LONG_LA la -#define LONG_S sw -#define LONG_SLL sll -#define LONG_SLLV sllv -#define LONG_SRL srl -#define LONG_SRLV srlv -#define LONG_SRA sra -#define LONG_SRAV srav -#define LONG_LL ll -#define LONG_SC sc -#define LONG_WORD .word -#define LONG_SCALESHIFT 2 -#else -#define LONG_ADD dadd -#define LONG_ADDI daddi -#define LONG_ADDU daddu -#define LONG_ADDIU daddiu -#define LONG_SUB dadd -#define LONG_SUBI dsubi -#define LONG_SUBU dsubu -#define LONG_SUBIU dsubu -#define LONG_L ld -#define LONG_LA dla -#define LONG_S sd -#define LONG_SLL dsll -#define LONG_SLLV dsllv -#define LONG_SRL dsrl -#define LONG_SRLV dsrlv -#define LONG_SRA dsra -#define LONG_SRAV dsrav -#define LONG_LL lld -#define LONG_SC scd -#define LONG_WORD .dword -#define LONG_SCALESHIFT 3 -#endif - -#if SZREG == 4 -#define REG_L lw -#define REG_S sw -#define REG_LI li -#define REG_ADDU addu -#define REG_SLL sll -#define REG_SLLV sllv -#define REG_SRL srl -#define REG_SRLV srlv -#define REG_SRA sra -#define REG_SRAV srav -#define REG_LL ll -#define REG_SC sc -#define REG_SCALESHIFT 2 -#else -#define REG_L ld -#define REG_S sd -#define REG_LI dli -#define REG_ADDU daddu -#define REG_SLL dsll -#define REG_SLLV dsllv -#define REG_SRL dsrl -#define REG_SRLV dsrlv -#define REG_SRA dsra -#define REG_SRAV dsrav -#define REG_LL lld -#define REG_SC scd -#define REG_SCALESHIFT 3 -#endif - -#if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \ - _MIPS_ISA == _MIPS_ISA_MIPS32 -#define MFC0 mfc0 -#define MTC0 mtc0 -#endif -#if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \ - _MIPS_ISA == _MIPS_ISA_MIPS64 -#define MFC0 dmfc0 -#define MTC0 dmtc0 -#endif - -#if defined(__mips_o32) || defined(__mips_o64) - -#ifdef __ABICALLS__ -#define CPRESTORE(r) .cprestore r -#define CPLOAD(r) .cpload r -#else -#define CPRESTORE(r) /* not needed */ -#define CPLOAD(r) /* not needed */ -#endif - -#define SETUP_GP \ - .set push; \ - .set noreorder; \ - .cpload t9; \ - .set pop -#define SETUP_GPX(r) \ - .set push; \ - .set noreorder; \ - move r,ra; /* save old ra */ \ - bal 7f; \ - nop; \ - 7: .cpload ra; \ - move ra,r; \ - .set pop -#define SETUP_GPX_L(r,lbl) \ - .set push; \ - .set noreorder; \ - move r,ra; /* save old ra */ \ - bal lbl; \ - nop; \ - lbl: .cpload ra; \ - move ra,r; \ - .set pop -#define SAVE_GP(x) .cprestore x - -#define SETUP_GP64(a,b) /* n32/n64 specific */ -#define SETUP_GP64_R(a,b) /* n32/n64 specific */ -#define SETUP_GPX64(a,b) /* n32/n64 specific */ -#define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */ -#define RESTORE_GP64 /* n32/n64 specific */ -#define USE_ALT_CP(a) /* n32/n64 specific */ -#endif /* __mips_o32 || __mips_o64 */ - -#if defined(__mips_o32) || defined(__mips_o64) -#define REG_PROLOGUE .set push -#define REG_EPILOGUE .set pop -#endif -#if defined(__mips_n32) || defined(__mips_n64) -#define REG_PROLOGUE .set push ; .set mips3 -#define REG_EPILOGUE .set pop -#endif - -#if defined(__mips_n32) || defined(__mips_n64) -#define SETUP_GP /* o32 specific */ -#define SETUP_GPX(r) /* o32 specific */ -#define SETUP_GPX_L(r,lbl) /* o32 specific */ -#define SAVE_GP(x) /* o32 specific */ -#define SETUP_GP64(a,b) .cpsetup $25, a, b -#define SETUP_GPX64(a,b) \ - .set push; \ - move b,ra; \ - .set noreorder; \ - bal 7f; \ - nop; \ - 7: .set pop; \ - .cpsetup ra, a, 7b; \ - move ra,b -#define SETUP_GPX64_L(a,b,c) \ - .set push; \ - move b,ra; \ - .set noreorder; \ - bal c; \ - nop; \ - c: .set pop; \ - .cpsetup ra, a, c; \ - move ra,b -#define RESTORE_GP64 .cpreturn -#define USE_ALT_CP(a) .cplocal a -#endif /* __mips_n32 || __mips_n64 */ - -#define GET_CPU_PCPU(reg) \ - PTR_L reg, _C_LABEL(pcpup); - -/* - * Description of the setjmp buffer - * - * word 0 magic number (dependant on creator) - * 1 RA - * 2 S0 - * 3 S1 - * 4 S2 - * 5 S3 - * 6 S4 - * 7 S5 - * 8 S6 - * 9 S7 - * 10 SP - * 11 S8 - * 12 GP (dependent on ABI) - * 13 signal mask (dependant on magic) - * 14 (con't) - * 15 (con't) - * 16 (con't) - * - * The magic number number identifies the jmp_buf and - * how the buffer was created as well as providing - * a sanity check - * - */ - -#define _JB_MAGIC__SETJMP 0xBADFACED -#define _JB_MAGIC_SETJMP 0xFACEDBAD - -/* Valid for all jmp_buf's */ - -#define _JB_MAGIC 0 -#define _JB_REG_RA 1 -#define _JB_REG_S0 2 -#define _JB_REG_S1 3 -#define _JB_REG_S2 4 -#define _JB_REG_S3 5 -#define _JB_REG_S4 6 -#define _JB_REG_S5 7 -#define _JB_REG_S6 8 -#define _JB_REG_S7 9 -#define _JB_REG_SP 10 -#define _JB_REG_S8 11 -#if defined(__mips_n32) || defined(__mips_n64) -#define _JB_REG_GP 12 -#endif - -/* Only valid with the _JB_MAGIC_SETJMP magic */ - -#define _JB_SIGMASK 13 -#define __JB_SIGMASK_REMAINDER 14 /* sigmask_t is 128-bits */ - -#define _JB_FPREG_F20 15 -#define _JB_FPREG_F21 16 -#define _JB_FPREG_F22 17 -#define _JB_FPREG_F23 18 -#define _JB_FPREG_F24 19 -#define _JB_FPREG_F25 20 -#define _JB_FPREG_F26 21 -#define _JB_FPREG_F27 22 -#define _JB_FPREG_F28 23 -#define _JB_FPREG_F29 24 -#define _JB_FPREG_F30 25 -#define _JB_FPREG_F31 26 -#define _JB_FPREG_FCSR 27 - -/* - * Various macros for dealing with TLB hazards - * (a) why so many? - * (b) when to use? - * (c) why not used everywhere? - */ -/* - * Assume that w alaways need nops to escape CP0 hazard - * TODO: Make hazard delays configurable. Stuck with 5 cycles on the moment - * For more info on CP0 hazards see Chapter 7 (p.99) of "MIPS32 Architecture - * For Programmers Volume III: The MIPS32 Privileged Resource Architecture" - */ -#if defined(CPU_NLM) -#define HAZARD_DELAY sll $0,3 -#define ITLBNOPFIX sll $0,3 -#elif defined(CPU_RMI) -#define HAZARD_DELAY -#define ITLBNOPFIX -#elif defined(CPU_MIPS74K) -#define HAZARD_DELAY sll $0,$0,3 -#define ITLBNOPFIX sll $0,$0,3 -#else -#define ITLBNOPFIX nop;nop;nop;nop;nop;nop;nop;nop;nop;sll $0,$0,3; -#define HAZARD_DELAY nop;nop;nop;nop;sll $0,$0,3; -#endif - -#endif /* !_MACHINE_ASM_H_ */ diff --git a/sys/mips/include/atomic.h b/sys/mips/include/atomic.h deleted file mode 100644 index f14fa3de65f..00000000000 --- a/sys/mips/include/atomic.h +++ /dev/null @@ -1,850 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1998 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: src/sys/alpha/include/atomic.h,v 1.21.2.3 2005/10/06 18:12:05 jhb - */ - -#ifndef _MACHINE_ATOMIC_H_ -#define _MACHINE_ATOMIC_H_ - -#ifndef _SYS_CDEFS_H_ -#error this file needs sys/cdefs.h as a prerequisite -#endif - -#include - -#if !defined(__mips_n64) && !defined(__mips_n32) -#include -#endif - -/* - * Note: All the 64-bit atomic operations are only atomic when running - * in 64-bit mode. It is assumed that code compiled for n32 and n64 - * fits into this definition and no further safeties are needed. - * - * It is also assumed that the add, subtract and other arithmetic is - * done on numbers not pointers. The special rules for n32 pointers - * do not have atomic operations defined for them, but generally shouldn't - * need atomic operations. - */ -#ifndef __MIPS_PLATFORM_SYNC_NOPS -#define __MIPS_PLATFORM_SYNC_NOPS "" -#endif - -static __inline void -mips_sync(void) -{ - __asm __volatile (".set noreorder\n" - "\tsync\n" - __MIPS_PLATFORM_SYNC_NOPS - ".set reorder\n" - : : : "memory"); -} - -#define mb() mips_sync() -#define wmb() mips_sync() -#define rmb() mips_sync() - -/* - * Various simple arithmetic on memory which is atomic in the presence - * of interrupts and SMP safe. - */ - -void atomic_set_8(__volatile uint8_t *, uint8_t); -void atomic_clear_8(__volatile uint8_t *, uint8_t); -void atomic_add_8(__volatile uint8_t *, uint8_t); -void atomic_subtract_8(__volatile uint8_t *, uint8_t); - -void atomic_set_16(__volatile uint16_t *, uint16_t); -void atomic_clear_16(__volatile uint16_t *, uint16_t); -void atomic_add_16(__volatile uint16_t *, uint16_t); -void atomic_subtract_16(__volatile uint16_t *, uint16_t); - -static __inline int atomic_cmpset_8(__volatile uint8_t *, uint8_t, uint8_t); -static __inline int atomic_fcmpset_8(__volatile uint8_t *, uint8_t *, uint8_t); -static __inline int atomic_cmpset_16(__volatile uint16_t *, uint16_t, uint16_t); -static __inline int atomic_fcmpset_16(__volatile uint16_t *, uint16_t *, uint16_t); - -static __inline void -atomic_set_32(__volatile uint32_t *p, uint32_t v) -{ - uint32_t temp; - - __asm __volatile ( - "1:\tll %0, %3\n\t" /* load old value */ - "or %0, %2, %0\n\t" /* calculate new value */ - "sc %0, %1\n\t" /* attempt to store */ - "beqz %0, 1b\n\t" /* spin if failed */ - : "=&r" (temp), "=m" (*p) - : "r" (v), "m" (*p) - : "memory"); - -} - -static __inline void -atomic_clear_32(__volatile uint32_t *p, uint32_t v) -{ - uint32_t temp; - v = ~v; - - __asm __volatile ( - "1:\tll %0, %3\n\t" /* load old value */ - "and %0, %2, %0\n\t" /* calculate new value */ - "sc %0, %1\n\t" /* attempt to store */ - "beqz %0, 1b\n\t" /* spin if failed */ - : "=&r" (temp), "=m" (*p) - : "r" (v), "m" (*p) - : "memory"); -} - -static __inline void -atomic_add_32(__volatile uint32_t *p, uint32_t v) -{ - uint32_t temp; - - __asm __volatile ( - "1:\tll %0, %3\n\t" /* load old value */ - "addu %0, %2, %0\n\t" /* calculate new value */ - "sc %0, %1\n\t" /* attempt to store */ - "beqz %0, 1b\n\t" /* spin if failed */ - : "=&r" (temp), "=m" (*p) - : "r" (v), "m" (*p) - : "memory"); -} - -static __inline void -atomic_subtract_32(__volatile uint32_t *p, uint32_t v) -{ - uint32_t temp; - - __asm __volatile ( - "1:\tll %0, %3\n\t" /* load old value */ - "subu %0, %2\n\t" /* calculate new value */ - "sc %0, %1\n\t" /* attempt to store */ - "beqz %0, 1b\n\t" /* spin if failed */ - : "=&r" (temp), "=m" (*p) - : "r" (v), "m" (*p) - : "memory"); -} - -static __inline uint32_t -atomic_readandclear_32(__volatile uint32_t *addr) -{ - uint32_t result,temp; - - __asm __volatile ( - "1:\tll %0,%3\n\t" /* load current value, asserting lock */ - "li %1,0\n\t" /* value to store */ - "sc %1,%2\n\t" /* attempt to store */ - "beqz %1, 1b\n\t" /* if the store failed, spin */ - : "=&r"(result), "=&r"(temp), "=m" (*addr) - : "m" (*addr) - : "memory"); - - return result; -} - -static __inline uint32_t -atomic_readandset_32(__volatile uint32_t *addr, uint32_t value) -{ - uint32_t result,temp; - - __asm __volatile ( - "1:\tll %0,%3\n\t" /* load current value, asserting lock */ - "or %1,$0,%4\n\t" - "sc %1,%2\n\t" /* attempt to store */ - "beqz %1, 1b\n\t" /* if the store failed, spin */ - : "=&r"(result), "=&r"(temp), "=m" (*addr) - : "m" (*addr), "r" (value) - : "memory"); - - return result; -} - -#if defined(__mips_n64) || defined(__mips_n32) -static __inline void -atomic_set_64(__volatile uint64_t *p, uint64_t v) -{ - uint64_t temp; - - __asm __volatile ( - "1:\n\t" - "lld %0, %3\n\t" /* load old value */ - "or %0, %2, %0\n\t" /* calculate new value */ - "scd %0, %1\n\t" /* attempt to store */ - "beqz %0, 1b\n\t" /* spin if failed */ - : "=&r" (temp), "=m" (*p) - : "r" (v), "m" (*p) - : "memory"); - -} - -static __inline void -atomic_clear_64(__volatile uint64_t *p, uint64_t v) -{ - uint64_t temp; - v = ~v; - - __asm __volatile ( - "1:\n\t" - "lld %0, %3\n\t" /* load old value */ - "and %0, %2, %0\n\t" /* calculate new value */ - "scd %0, %1\n\t" /* attempt to store */ - "beqz %0, 1b\n\t" /* spin if failed */ - : "=&r" (temp), "=m" (*p) - : "r" (v), "m" (*p) - : "memory"); -} - -static __inline void -atomic_add_64(__volatile uint64_t *p, uint64_t v) -{ - uint64_t temp; - - __asm __volatile ( - "1:\n\t" - "lld %0, %3\n\t" /* load old value */ - "daddu %0, %2, %0\n\t" /* calculate new value */ - "scd %0, %1\n\t" /* attempt to store */ - "beqz %0, 1b\n\t" /* spin if failed */ - : "=&r" (temp), "=m" (*p) - : "r" (v), "m" (*p) - : "memory"); -} - -static __inline void -atomic_subtract_64(__volatile uint64_t *p, uint64_t v) -{ - uint64_t temp; - - __asm __volatile ( - "1:\n\t" - "lld %0, %3\n\t" /* load old value */ - "dsubu %0, %2\n\t" /* calculate new value */ - "scd %0, %1\n\t" /* attempt to store */ - "beqz %0, 1b\n\t" /* spin if failed */ - : "=&r" (temp), "=m" (*p) - : "r" (v), "m" (*p) - : "memory"); -} - -static __inline uint64_t -atomic_readandclear_64(__volatile uint64_t *addr) -{ - uint64_t result,temp; - - __asm __volatile ( - "1:\n\t" - "lld %0, %3\n\t" /* load old value */ - "li %1, 0\n\t" /* value to store */ - "scd %1, %2\n\t" /* attempt to store */ - "beqz %1, 1b\n\t" /* if the store failed, spin */ - : "=&r"(result), "=&r"(temp), "=m" (*addr) - : "m" (*addr) - : "memory"); - - return result; -} - -static __inline uint64_t -atomic_readandset_64(__volatile uint64_t *addr, uint64_t value) -{ - uint64_t result,temp; - - __asm __volatile ( - "1:\n\t" - "lld %0,%3\n\t" /* Load old value*/ - "or %1,$0,%4\n\t" - "scd %1,%2\n\t" /* attempt to store */ - "beqz %1, 1b\n\t" /* if the store failed, spin */ - : "=&r"(result), "=&r"(temp), "=m" (*addr) - : "m" (*addr), "r" (value) - : "memory"); - - return result; -} -#endif - -#define ATOMIC_ACQ_REL(NAME, WIDTH) \ -static __inline void \ -atomic_##NAME##_acq_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\ -{ \ - atomic_##NAME##_##WIDTH(p, v); \ - mips_sync(); \ -} \ - \ -static __inline void \ -atomic_##NAME##_rel_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\ -{ \ - mips_sync(); \ - atomic_##NAME##_##WIDTH(p, v); \ -} - -/* Variants of simple arithmetic with memory barriers. */ -ATOMIC_ACQ_REL(set, 8) -ATOMIC_ACQ_REL(clear, 8) -ATOMIC_ACQ_REL(add, 8) -ATOMIC_ACQ_REL(subtract, 8) -ATOMIC_ACQ_REL(set, 16) -ATOMIC_ACQ_REL(clear, 16) -ATOMIC_ACQ_REL(add, 16) -ATOMIC_ACQ_REL(subtract, 16) -ATOMIC_ACQ_REL(set, 32) -ATOMIC_ACQ_REL(clear, 32) -ATOMIC_ACQ_REL(add, 32) -ATOMIC_ACQ_REL(subtract, 32) -#if defined(__mips_n64) || defined(__mips_n32) -ATOMIC_ACQ_REL(set, 64) -ATOMIC_ACQ_REL(clear, 64) -ATOMIC_ACQ_REL(add, 64) -ATOMIC_ACQ_REL(subtract, 64) -#endif - -#undef ATOMIC_ACQ_REL - -/* - * We assume that a = b will do atomic loads and stores. - */ -#define ATOMIC_STORE_LOAD(WIDTH) \ -static __inline uint##WIDTH##_t \ -atomic_load_acq_##WIDTH(__volatile uint##WIDTH##_t *p) \ -{ \ - uint##WIDTH##_t v; \ - \ - v = *p; \ - mips_sync(); \ - return (v); \ -} \ - \ -static __inline void \ -atomic_store_rel_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\ -{ \ - mips_sync(); \ - *p = v; \ -} - -ATOMIC_STORE_LOAD(32) -#if defined(__mips_n64) || defined(__mips_n32) -ATOMIC_STORE_LOAD(64) -#endif -#undef ATOMIC_STORE_LOAD - -/* - * MIPS n32 is not a LP64 API, so atomic_load_64 isn't defined there. Define it - * here since n32 is an oddball !LP64 but that can do 64-bit atomics. - */ -#if defined(__mips_n32) -#define atomic_load_64 atomic_load_acq_64 -#endif - -/* - * Atomically compare the value stored at *p with cmpval and if the - * two values are equal, update the value of *p with newval. Returns - * zero if the compare failed, nonzero otherwise. - */ -static __inline int -atomic_cmpset_32(__volatile uint32_t *p, uint32_t cmpval, uint32_t newval) -{ - int ret; - - __asm __volatile ( - "1:\tll %0, %4\n\t" /* load old value */ - "bne %0, %2, 2f\n\t" /* compare */ - "move %0, %3\n\t" /* value to store */ - "sc %0, %1\n\t" /* attempt to store */ - "beqz %0, 1b\n\t" /* if it failed, spin */ - "j 3f\n\t" - "2:\n\t" - "li %0, 0\n\t" - "3:\n" - : "=&r" (ret), "=m" (*p) - : "r" (cmpval), "r" (newval), "m" (*p) - : "memory"); - - return ret; -} - -/* - * Atomically compare the value stored at *p with cmpval and if the - * two values are equal, update the value of *p with newval. Returns - * zero if the compare failed, nonzero otherwise. - */ -static __inline int -atomic_fcmpset_32(__volatile uint32_t *p, uint32_t *cmpval, uint32_t newval) -{ - int ret; - - /* - * The following sequence (similar to that in atomic_fcmpset_64) will - * attempt to update the value of *p with newval if the comparison - * succeeds. Note that they'll exit regardless of whether the store - * actually succeeded, leaving *cmpval untouched. This is in line with - * the documentation of atomic_fcmpset_() in atomic(9) for ll/sc - * architectures. - */ - __asm __volatile ( - "ll %0, %1\n\t" /* load old value */ - "bne %0, %4, 1f\n\t" /* compare */ - "move %0, %3\n\t" /* value to store */ - "sc %0, %1\n\t" /* attempt to store */ - "j 2f\n\t" /* exit regardless of success */ - "nop\n\t" /* avoid delay slot accident */ - "1:\n\t" - "sw %0, %2\n\t" /* save old value */ - "li %0, 0\n\t" - "2:\n" - : "=&r" (ret), "+m" (*p), "=m" (*cmpval) - : "r" (newval), "r" (*cmpval) - : "memory"); - return ret; -} - -#define ATOMIC_CMPSET_ACQ_REL(WIDTH) \ -static __inline int \ -atomic_cmpset_acq_##WIDTH(__volatile uint##WIDTH##_t *p, \ - uint##WIDTH##_t cmpval, uint##WIDTH##_t newval) \ -{ \ - int retval; \ - \ - retval = atomic_cmpset_##WIDTH(p, cmpval, newval); \ - mips_sync(); \ - return (retval); \ -} \ - \ -static __inline int \ -atomic_cmpset_rel_##WIDTH(__volatile uint##WIDTH##_t *p, \ - uint##WIDTH##_t cmpval, uint##WIDTH##_t newval) \ -{ \ - mips_sync(); \ - return (atomic_cmpset_##WIDTH(p, cmpval, newval)); \ -} - -#define ATOMIC_FCMPSET_ACQ_REL(WIDTH) \ -static __inline int \ -atomic_fcmpset_acq_##WIDTH(__volatile uint##WIDTH##_t *p, \ - uint##WIDTH##_t *cmpval, uint##WIDTH##_t newval) \ -{ \ - int retval; \ - \ - retval = atomic_fcmpset_##WIDTH(p, cmpval, newval); \ - mips_sync(); \ - return (retval); \ -} \ - \ -static __inline int \ -atomic_fcmpset_rel_##WIDTH(__volatile uint##WIDTH##_t *p, \ - uint##WIDTH##_t *cmpval, uint##WIDTH##_t newval) \ -{ \ - mips_sync(); \ - return (atomic_fcmpset_##WIDTH(p, cmpval, newval)); \ -} - -/* - * Atomically compare the value stored at *p with cmpval and if the - * two values are equal, update the value of *p with newval. Returns - * zero if the compare failed, nonzero otherwise. - */ -ATOMIC_CMPSET_ACQ_REL(8); -ATOMIC_CMPSET_ACQ_REL(16); -ATOMIC_CMPSET_ACQ_REL(32); -ATOMIC_FCMPSET_ACQ_REL(8); -ATOMIC_FCMPSET_ACQ_REL(16); -ATOMIC_FCMPSET_ACQ_REL(32); - -/* - * Atomically add the value of v to the integer pointed to by p and return - * the previous value of *p. - */ -static __inline uint32_t -atomic_fetchadd_32(__volatile uint32_t *p, uint32_t v) -{ - uint32_t value, temp; - - __asm __volatile ( - "1:\tll %0, %1\n\t" /* load old value */ - "addu %2, %3, %0\n\t" /* calculate new value */ - "sc %2, %1\n\t" /* attempt to store */ - "beqz %2, 1b\n\t" /* spin if failed */ - : "=&r" (value), "=m" (*p), "=&r" (temp) - : "r" (v), "m" (*p)); - return (value); -} - -#if defined(__mips_n64) || defined(__mips_n32) -/* - * Atomically compare the value stored at *p with cmpval and if the - * two values are equal, update the value of *p with newval. Returns - * zero if the compare failed, nonzero otherwise. - */ -static __inline int -atomic_cmpset_64(__volatile uint64_t *p, uint64_t cmpval, uint64_t newval) -{ - int ret; - - __asm __volatile ( - "1:\n\t" - "lld %0, %4\n\t" /* load old value */ - "bne %0, %2, 2f\n\t" /* compare */ - "move %0, %3\n\t" /* value to store */ - "scd %0, %1\n\t" /* attempt to store */ - "beqz %0, 1b\n\t" /* if it failed, spin */ - "j 3f\n\t" - "2:\n\t" - "li %0, 0\n\t" - "3:\n" - : "=&r" (ret), "=m" (*p) - : "r" (cmpval), "r" (newval), "m" (*p) - : "memory"); - - return ret; -} - -static __inline int -atomic_fcmpset_64(__volatile uint64_t *p, uint64_t *cmpval, uint64_t newval) -{ - int ret; - - __asm __volatile ( - "lld %0, %1\n\t" /* load old value */ - "bne %0, %4, 1f\n\t" /* compare */ - "move %0, %3\n\t" /* value to store */ - "scd %0, %1\n\t" /* attempt to store */ - "j 2f\n\t" /* exit regardless of success */ - "nop\n\t" /* avoid delay slot accident */ - "1:\n\t" - "sd %0, %2\n\t" /* save old value */ - "li %0, 0\n\t" - "2:\n" - : "=&r" (ret), "+m" (*p), "=m" (*cmpval) - : "r" (newval), "r" (*cmpval) - : "memory"); - - return ret; -} - -/* - * Atomically compare the value stored at *p with cmpval and if the - * two values are equal, update the value of *p with newval. Returns - * zero if the compare failed, nonzero otherwise. - */ -ATOMIC_CMPSET_ACQ_REL(64); -ATOMIC_FCMPSET_ACQ_REL(64); - -/* - * Atomically add the value of v to the integer pointed to by p and return - * the previous value of *p. - */ -static __inline uint64_t -atomic_fetchadd_64(__volatile uint64_t *p, uint64_t v) -{ - uint64_t value, temp; - - __asm __volatile ( - "1:\n\t" - "lld %0, %1\n\t" /* load old value */ - "daddu %2, %3, %0\n\t" /* calculate new value */ - "scd %2, %1\n\t" /* attempt to store */ - "beqz %2, 1b\n\t" /* spin if failed */ - : "=&r" (value), "=m" (*p), "=&r" (temp) - : "r" (v), "m" (*p)); - return (value); -} -#endif - -static __inline void -atomic_thread_fence_acq(void) -{ - - mips_sync(); -} - -static __inline void -atomic_thread_fence_rel(void) -{ - - mips_sync(); -} - -static __inline void -atomic_thread_fence_acq_rel(void) -{ - - mips_sync(); -} - -static __inline void -atomic_thread_fence_seq_cst(void) -{ - - mips_sync(); -} - -/* Operations on chars. */ -#define atomic_set_char atomic_set_8 -#define atomic_set_acq_char atomic_set_acq_8 -#define atomic_set_rel_char atomic_set_rel_8 -#define atomic_clear_char atomic_clear_8 -#define atomic_clear_acq_char atomic_clear_acq_8 -#define atomic_clear_rel_char atomic_clear_rel_8 -#define atomic_add_char atomic_add_8 -#define atomic_add_acq_char atomic_add_acq_8 -#define atomic_add_rel_char atomic_add_rel_8 -#define atomic_subtract_char atomic_subtract_8 -#define atomic_subtract_acq_char atomic_subtract_acq_8 -#define atomic_subtract_rel_char atomic_subtract_rel_8 -#define atomic_cmpset_char atomic_cmpset_8 -#define atomic_cmpset_acq_char atomic_cmpset_acq_8 -#define atomic_cmpset_rel_char atomic_cmpset_rel_8 -#define atomic_fcmpset_char atomic_fcmpset_8 -#define atomic_fcmpset_acq_char atomic_fcmpset_acq_8 -#define atomic_fcmpset_rel_char atomic_fcmpset_rel_8 - -/* Operations on shorts. */ -#define atomic_set_short atomic_set_16 -#define atomic_set_acq_short atomic_set_acq_16 -#define atomic_set_rel_short atomic_set_rel_16 -#define atomic_clear_short atomic_clear_16 -#define atomic_clear_acq_short atomic_clear_acq_16 -#define atomic_clear_rel_short atomic_clear_rel_16 -#define atomic_add_short atomic_add_16 -#define atomic_add_acq_short atomic_add_acq_16 -#define atomic_add_rel_short atomic_add_rel_16 -#define atomic_subtract_short atomic_subtract_16 -#define atomic_subtract_acq_short atomic_subtract_acq_16 -#define atomic_subtract_rel_short atomic_subtract_rel_16 -#define atomic_cmpset_short atomic_cmpset_16 -#define atomic_cmpset_acq_short atomic_cmpset_acq_16 -#define atomic_cmpset_rel_short atomic_cmpset_rel_16 -#define atomic_fcmpset_short atomic_fcmpset_16 -#define atomic_fcmpset_acq_short atomic_fcmpset_acq_16 -#define atomic_fcmpset_rel_short atomic_fcmpset_rel_16 - -/* Operations on ints. */ -#define atomic_set_int atomic_set_32 -#define atomic_set_acq_int atomic_set_acq_32 -#define atomic_set_rel_int atomic_set_rel_32 -#define atomic_clear_int atomic_clear_32 -#define atomic_clear_acq_int atomic_clear_acq_32 -#define atomic_clear_rel_int atomic_clear_rel_32 -#define atomic_add_int atomic_add_32 -#define atomic_add_acq_int atomic_add_acq_32 -#define atomic_add_rel_int atomic_add_rel_32 -#define atomic_subtract_int atomic_subtract_32 -#define atomic_subtract_acq_int atomic_subtract_acq_32 -#define atomic_subtract_rel_int atomic_subtract_rel_32 -#define atomic_cmpset_int atomic_cmpset_32 -#define atomic_cmpset_acq_int atomic_cmpset_acq_32 -#define atomic_cmpset_rel_int atomic_cmpset_rel_32 -#define atomic_fcmpset_int atomic_fcmpset_32 -#define atomic_fcmpset_acq_int atomic_fcmpset_acq_32 -#define atomic_fcmpset_rel_int atomic_fcmpset_rel_32 -#define atomic_load_acq_int atomic_load_acq_32 -#define atomic_store_rel_int atomic_store_rel_32 -#define atomic_readandclear_int atomic_readandclear_32 -#define atomic_readandset_int atomic_readandset_32 -#define atomic_fetchadd_int atomic_fetchadd_32 - -/* - * I think the following is right, even for n32. For n32 the pointers - * are still 32-bits, so we need to operate on them as 32-bit quantities, - * even though they are sign extended in operation. For longs, there's - * no question because they are always 32-bits. - */ -#ifdef __mips_n64 -/* Operations on longs. */ -#define atomic_set_long atomic_set_64 -#define atomic_set_acq_long atomic_set_acq_64 -#define atomic_set_rel_long atomic_set_rel_64 -#define atomic_clear_long atomic_clear_64 -#define atomic_clear_acq_long atomic_clear_acq_64 -#define atomic_clear_rel_long atomic_clear_rel_64 -#define atomic_add_long atomic_add_64 -#define atomic_add_acq_long atomic_add_acq_64 -#define atomic_add_rel_long atomic_add_rel_64 -#define atomic_subtract_long atomic_subtract_64 -#define atomic_subtract_acq_long atomic_subtract_acq_64 -#define atomic_subtract_rel_long atomic_subtract_rel_64 -#define atomic_cmpset_long atomic_cmpset_64 -#define atomic_cmpset_acq_long atomic_cmpset_acq_64 -#define atomic_cmpset_rel_long atomic_cmpset_rel_64 -#define atomic_fcmpset_long atomic_fcmpset_64 -#define atomic_fcmpset_acq_long atomic_fcmpset_acq_64 -#define atomic_fcmpset_rel_long atomic_fcmpset_rel_64 -#define atomic_load_acq_long atomic_load_acq_64 -#define atomic_store_rel_long atomic_store_rel_64 -#define atomic_fetchadd_long atomic_fetchadd_64 -#define atomic_readandclear_long atomic_readandclear_64 - -#else /* !__mips_n64 */ - -/* Operations on longs. */ -#define atomic_set_long(p, v) \ - atomic_set_32((volatile u_int *)(p), (u_int)(v)) -#define atomic_set_acq_long(p, v) \ - atomic_set_acq_32((volatile u_int *)(p), (u_int)(v)) -#define atomic_set_rel_long(p, v) \ - atomic_set_rel_32((volatile u_int *)(p), (u_int)(v)) -#define atomic_clear_long(p, v) \ - atomic_clear_32((volatile u_int *)(p), (u_int)(v)) -#define atomic_clear_acq_long(p, v) \ - atomic_clear_acq_32((volatile u_int *)(p), (u_int)(v)) -#define atomic_clear_rel_long(p, v) \ - atomic_clear_rel_32((volatile u_int *)(p), (u_int)(v)) -#define atomic_add_long(p, v) \ - atomic_add_32((volatile u_int *)(p), (u_int)(v)) -#define atomic_add_acq_long(p, v) \ - atomic_add_32((volatile u_int *)(p), (u_int)(v)) -#define atomic_add_rel_long(p, v) \ - atomic_add_32((volatile u_int *)(p), (u_int)(v)) -#define atomic_subtract_long(p, v) \ - atomic_subtract_32((volatile u_int *)(p), (u_int)(v)) -#define atomic_subtract_acq_long(p, v) \ - atomic_subtract_acq_32((volatile u_int *)(p), (u_int)(v)) -#define atomic_subtract_rel_long(p, v) \ - atomic_subtract_rel_32((volatile u_int *)(p), (u_int)(v)) -#define atomic_cmpset_long(p, cmpval, newval) \ - atomic_cmpset_32((volatile u_int *)(p), (u_int)(cmpval), \ - (u_int)(newval)) -#define atomic_cmpset_acq_long(p, cmpval, newval) \ - atomic_cmpset_acq_32((volatile u_int *)(p), (u_int)(cmpval), \ - (u_int)(newval)) -#define atomic_cmpset_rel_long(p, cmpval, newval) \ - atomic_cmpset_rel_32((volatile u_int *)(p), (u_int)(cmpval), \ - (u_int)(newval)) -#define atomic_fcmpset_long(p, cmpval, newval) \ - atomic_fcmpset_32((volatile u_int *)(p), (u_int *)(cmpval), \ - (u_int)(newval)) -#define atomic_fcmpset_acq_long(p, cmpval, newval) \ - atomic_fcmpset_acq_32((volatile u_int *)(p), (u_int *)(cmpval), \ - (u_int)(newval)) -#define atomic_fcmpset_rel_long(p, cmpval, newval) \ - atomic_fcmpset_rel_32((volatile u_int *)(p), (u_int *)(cmpval), \ - (u_int)(newval)) -#define atomic_load_acq_long(p) \ - (u_long)atomic_load_acq_32((volatile u_int *)(p)) -#define atomic_store_rel_long(p, v) \ - atomic_store_rel_32((volatile u_int *)(p), (u_int)(v)) -#define atomic_fetchadd_long(p, v) \ - atomic_fetchadd_32((volatile u_int *)(p), (u_int)(v)) -#define atomic_readandclear_long(p) \ - atomic_readandclear_32((volatile u_int *)(p)) - -#endif /* __mips_n64 */ - -/* Operations on pointers. */ -#define atomic_set_ptr atomic_set_long -#define atomic_set_acq_ptr atomic_set_acq_long -#define atomic_set_rel_ptr atomic_set_rel_long -#define atomic_clear_ptr atomic_clear_long -#define atomic_clear_acq_ptr atomic_clear_acq_long -#define atomic_clear_rel_ptr atomic_clear_rel_long -#define atomic_add_ptr atomic_add_long -#define atomic_add_acq_ptr atomic_add_acq_long -#define atomic_add_rel_ptr atomic_add_rel_long -#define atomic_subtract_ptr atomic_subtract_long -#define atomic_subtract_acq_ptr atomic_subtract_acq_long -#define atomic_subtract_rel_ptr atomic_subtract_rel_long -#define atomic_cmpset_ptr atomic_cmpset_long -#define atomic_cmpset_acq_ptr atomic_cmpset_acq_long -#define atomic_cmpset_rel_ptr atomic_cmpset_rel_long -#define atomic_fcmpset_ptr atomic_fcmpset_long -#define atomic_fcmpset_acq_ptr atomic_fcmpset_acq_long -#define atomic_fcmpset_rel_ptr atomic_fcmpset_rel_long -#define atomic_load_acq_ptr atomic_load_acq_long -#define atomic_store_rel_ptr atomic_store_rel_long -#define atomic_readandclear_ptr atomic_readandclear_long - -static __inline unsigned int -atomic_swap_int(volatile unsigned int *ptr, const unsigned int value) -{ - unsigned int retval; - - retval = *ptr; - - while (!atomic_fcmpset_int(ptr, &retval, value)) - ; - return (retval); -} - -static __inline uint32_t -atomic_swap_32(volatile uint32_t *ptr, const uint32_t value) -{ - uint32_t retval; - - retval = *ptr; - - while (!atomic_fcmpset_32(ptr, &retval, value)) - ; - return (retval); -} - -#if defined(__mips_n64) || defined(__mips_n32) -static __inline uint64_t -atomic_swap_64(volatile uint64_t *ptr, const uint64_t value) -{ - uint64_t retval; - - retval = *ptr; - - while (!atomic_fcmpset_64(ptr, &retval, value)) - ; - return (retval); -} -#endif - -#ifdef __mips_n64 -static __inline unsigned long -atomic_swap_long(volatile unsigned long *ptr, const unsigned long value) -{ - unsigned long retval; - - retval = *ptr; - - while (!atomic_fcmpset_64((volatile uint64_t *)ptr, - (uint64_t *)&retval, value)) - ; - return (retval); -} -#else -static __inline unsigned long -atomic_swap_long(volatile unsigned long *ptr, const unsigned long value) -{ - unsigned long retval; - - retval = *ptr; - - while (!atomic_fcmpset_32((volatile uint32_t *)ptr, - (uint32_t *)&retval, value)) - ; - return (retval); -} -#endif -#define atomic_swap_ptr(ptr, value) atomic_swap_long((unsigned long *)(ptr), value) - -#include - -#endif /* ! _MACHINE_ATOMIC_H_ */ diff --git a/sys/mips/include/bootinfo.h b/sys/mips/include/bootinfo.h deleted file mode 100644 index b115a7d2990..00000000000 --- a/sys/mips/include/bootinfo.h +++ /dev/null @@ -1,85 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 2013 Robert N. M. Watson - * Copyright (C) 1994 by Rodney W. Grimes, Milwaukie, Oregon 97222 - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer as - * the first lines of this file unmodified. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Rodney W. Grimes. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY RODNEY W. GRIMES ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL RODNEY W. GRIMES BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_BOOTINFO_H_ -#define _MACHINE_BOOTINFO_H_ - -/* Only change the version number if you break compatibility. */ -#define BOOTINFO_VERSION 2 - -#define MIPS_BOOTINFO_MAGIC 0xCDEACDEA - -#if defined(__mips_n32) || defined(__mips_n64) -typedef uint64_t bi_ptr_t; -#else -typedef uint32_t bi_ptr_t; -#endif - -/* - * A zero bootinfo field often means that there is no info available. - * Flags are used to indicate the validity of fields where zero is a - * normal value. - */ -struct bootinfo { - /* bootinfo meta-data. */ - uint32_t bi_version; - uint32_t bi_size; - - /* bootinfo contents. */ - uint64_t bi_boot2opts; /* boot2 flags to loader. */ - bi_ptr_t bi_kernelname; /* Pointer to name. */ - bi_ptr_t bi_nfs_diskless;/* Pointer to NFS data. */ - bi_ptr_t bi_dtb; /* Pointer to dtb. */ - bi_ptr_t bi_memsize; /* Physical memory size in bytes. */ - bi_ptr_t bi_modulep; /* Preloaded modules. */ - bi_ptr_t bi_boot_dev_type; /* Boot-device type. */ - bi_ptr_t bi_boot_dev_unitptr; /* Boot-device unit/pointer. */ -}; - -/* - * Possible boot-device types passed from boot2 to loader, loader to kernel. - * In most cases, the object pointed to will hold a filesystem; one exception - * is BOOTINFO_DEV_TYPE_DRAM, which points to a pre-loaded object (e.g., - * loader, kernel). - */ -#define BOOTINFO_DEV_TYPE_DRAM 0 /* DRAM loader/kernel (ptr). */ -#define BOOTINFO_DEV_TYPE_CFI 1 /* CFI flash (unit). */ -#define BOOTINFO_DEV_TYPE_SDCARD 2 /* SD card (unit). */ - -#ifdef _KERNEL -extern struct bootinfo bootinfo; -#endif - -#endif /* !_MACHINE_BOOTINFO_H_ */ diff --git a/sys/mips/include/bus.h b/sys/mips/include/bus.h deleted file mode 100644 index 97654a0c021..00000000000 --- a/sys/mips/include/bus.h +++ /dev/null @@ -1,751 +0,0 @@ -/* $NetBSD: bus.h,v 1.11 2003/07/28 17:35:54 thorpej Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause AND BSD-4-Clause - * - * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, - * NASA Ames Research Center. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/*- - * Copyright (c) 1996 Charles M. Hannum. All rights reserved. - * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Christopher G. Demetriou - * for the NetBSD Project. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE_BUS_H_ -#define _MACHINE_BUS_H_ - -#include - -struct bus_space { - /* cookie */ - void *bs_cookie; - - /* mapping/unmapping */ - int (*bs_map) (void *, bus_addr_t, bus_size_t, - int, bus_space_handle_t *); - void (*bs_unmap) (void *, bus_space_handle_t, bus_size_t); - int (*bs_subregion) (void *, bus_space_handle_t, - bus_size_t, bus_size_t, bus_space_handle_t *); - - /* allocation/deallocation */ - int (*bs_alloc) (void *, bus_addr_t, bus_addr_t, - bus_size_t, bus_size_t, bus_size_t, int, - bus_addr_t *, bus_space_handle_t *); - void (*bs_free) (void *, bus_space_handle_t, - bus_size_t); - - /* get kernel virtual address */ - /* barrier */ - void (*bs_barrier) (void *, bus_space_handle_t, - bus_size_t, bus_size_t, int); - - /* read (single) */ - u_int8_t (*bs_r_1) (void *, bus_space_handle_t, bus_size_t); - u_int16_t (*bs_r_2) (void *, bus_space_handle_t, bus_size_t); - u_int32_t (*bs_r_4) (void *, bus_space_handle_t, bus_size_t); - u_int64_t (*bs_r_8) (void *, bus_space_handle_t, bus_size_t); - - /* read multiple */ - void (*bs_rm_1) (void *, bus_space_handle_t, bus_size_t, - u_int8_t *, bus_size_t); - void (*bs_rm_2) (void *, bus_space_handle_t, bus_size_t, - u_int16_t *, bus_size_t); - void (*bs_rm_4) (void *, bus_space_handle_t, - bus_size_t, u_int32_t *, bus_size_t); - void (*bs_rm_8) (void *, bus_space_handle_t, - bus_size_t, u_int64_t *, bus_size_t); - - /* read region */ - void (*bs_rr_1) (void *, bus_space_handle_t, - bus_size_t, u_int8_t *, bus_size_t); - void (*bs_rr_2) (void *, bus_space_handle_t, - bus_size_t, u_int16_t *, bus_size_t); - void (*bs_rr_4) (void *, bus_space_handle_t, - bus_size_t, u_int32_t *, bus_size_t); - void (*bs_rr_8) (void *, bus_space_handle_t, - bus_size_t, u_int64_t *, bus_size_t); - - /* write (single) */ - void (*bs_w_1) (void *, bus_space_handle_t, - bus_size_t, u_int8_t); - void (*bs_w_2) (void *, bus_space_handle_t, - bus_size_t, u_int16_t); - void (*bs_w_4) (void *, bus_space_handle_t, - bus_size_t, u_int32_t); - void (*bs_w_8) (void *, bus_space_handle_t, - bus_size_t, u_int64_t); - - /* write multiple */ - void (*bs_wm_1) (void *, bus_space_handle_t, - bus_size_t, const u_int8_t *, bus_size_t); - void (*bs_wm_2) (void *, bus_space_handle_t, - bus_size_t, const u_int16_t *, bus_size_t); - void (*bs_wm_4) (void *, bus_space_handle_t, - bus_size_t, const u_int32_t *, bus_size_t); - void (*bs_wm_8) (void *, bus_space_handle_t, - bus_size_t, const u_int64_t *, bus_size_t); - - /* write region */ - void (*bs_wr_1) (void *, bus_space_handle_t, - bus_size_t, const u_int8_t *, bus_size_t); - void (*bs_wr_2) (void *, bus_space_handle_t, - bus_size_t, const u_int16_t *, bus_size_t); - void (*bs_wr_4) (void *, bus_space_handle_t, - bus_size_t, const u_int32_t *, bus_size_t); - void (*bs_wr_8) (void *, bus_space_handle_t, - bus_size_t, const u_int64_t *, bus_size_t); - - /* set multiple */ - void (*bs_sm_1) (void *, bus_space_handle_t, - bus_size_t, u_int8_t, bus_size_t); - void (*bs_sm_2) (void *, bus_space_handle_t, - bus_size_t, u_int16_t, bus_size_t); - void (*bs_sm_4) (void *, bus_space_handle_t, - bus_size_t, u_int32_t, bus_size_t); - void (*bs_sm_8) (void *, bus_space_handle_t, - bus_size_t, u_int64_t, bus_size_t); - - /* set region */ - void (*bs_sr_1) (void *, bus_space_handle_t, - bus_size_t, u_int8_t, bus_size_t); - void (*bs_sr_2) (void *, bus_space_handle_t, - bus_size_t, u_int16_t, bus_size_t); - void (*bs_sr_4) (void *, bus_space_handle_t, - bus_size_t, u_int32_t, bus_size_t); - void (*bs_sr_8) (void *, bus_space_handle_t, - bus_size_t, u_int64_t, bus_size_t); - - /* copy */ - void (*bs_c_1) (void *, bus_space_handle_t, bus_size_t, - bus_space_handle_t, bus_size_t, bus_size_t); - void (*bs_c_2) (void *, bus_space_handle_t, bus_size_t, - bus_space_handle_t, bus_size_t, bus_size_t); - void (*bs_c_4) (void *, bus_space_handle_t, bus_size_t, - bus_space_handle_t, bus_size_t, bus_size_t); - void (*bs_c_8) (void *, bus_space_handle_t, bus_size_t, - bus_space_handle_t, bus_size_t, bus_size_t); - - /* read stream (single) */ - u_int8_t (*bs_r_1_s) (void *, bus_space_handle_t, bus_size_t); - u_int16_t (*bs_r_2_s) (void *, bus_space_handle_t, bus_size_t); - u_int32_t (*bs_r_4_s) (void *, bus_space_handle_t, bus_size_t); - u_int64_t (*bs_r_8_s) (void *, bus_space_handle_t, bus_size_t); - - /* read multiple stream */ - void (*bs_rm_1_s) (void *, bus_space_handle_t, bus_size_t, - u_int8_t *, bus_size_t); - void (*bs_rm_2_s) (void *, bus_space_handle_t, bus_size_t, - u_int16_t *, bus_size_t); - void (*bs_rm_4_s) (void *, bus_space_handle_t, - bus_size_t, u_int32_t *, bus_size_t); - void (*bs_rm_8_s) (void *, bus_space_handle_t, - bus_size_t, u_int64_t *, bus_size_t); - - /* read region stream */ - void (*bs_rr_1_s) (void *, bus_space_handle_t, - bus_size_t, u_int8_t *, bus_size_t); - void (*bs_rr_2_s) (void *, bus_space_handle_t, - bus_size_t, u_int16_t *, bus_size_t); - void (*bs_rr_4_s) (void *, bus_space_handle_t, - bus_size_t, u_int32_t *, bus_size_t); - void (*bs_rr_8_s) (void *, bus_space_handle_t, - bus_size_t, u_int64_t *, bus_size_t); - - /* write stream (single) */ - void (*bs_w_1_s) (void *, bus_space_handle_t, - bus_size_t, u_int8_t); - void (*bs_w_2_s) (void *, bus_space_handle_t, - bus_size_t, u_int16_t); - void (*bs_w_4_s) (void *, bus_space_handle_t, - bus_size_t, u_int32_t); - void (*bs_w_8_s) (void *, bus_space_handle_t, - bus_size_t, u_int64_t); - - /* write multiple stream */ - void (*bs_wm_1_s) (void *, bus_space_handle_t, - bus_size_t, const u_int8_t *, bus_size_t); - void (*bs_wm_2_s) (void *, bus_space_handle_t, - bus_size_t, const u_int16_t *, bus_size_t); - void (*bs_wm_4_s) (void *, bus_space_handle_t, - bus_size_t, const u_int32_t *, bus_size_t); - void (*bs_wm_8_s) (void *, bus_space_handle_t, - bus_size_t, const u_int64_t *, bus_size_t); - - /* write region stream */ - void (*bs_wr_1_s) (void *, bus_space_handle_t, - bus_size_t, const u_int8_t *, bus_size_t); - void (*bs_wr_2_s) (void *, bus_space_handle_t, - bus_size_t, const u_int16_t *, bus_size_t); - void (*bs_wr_4_s) (void *, bus_space_handle_t, - bus_size_t, const u_int32_t *, bus_size_t); - void (*bs_wr_8_s) (void *, bus_space_handle_t, - bus_size_t, const u_int64_t *, bus_size_t); -}; - -/* - * Utility macros; INTERNAL USE ONLY. - */ -#define __bs_c(a,b) __CONCAT(a,b) -#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size) - -#define __bs_rs(sz, t, h, o) \ - (*(t)->__bs_opname(r,sz))((t)->bs_cookie, h, o) -#define __bs_ws(sz, t, h, o, v) \ - (*(t)->__bs_opname(w,sz))((t)->bs_cookie, h, o, v) -#define __bs_nonsingle(type, sz, t, h, o, a, c) \ - (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, a, c) -#define __bs_set(type, sz, t, h, o, v, c) \ - (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v, c) -#define __bs_copy(sz, t, h1, o1, h2, o2, cnt) \ - (*(t)->__bs_opname(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt) - -#define __bs_opname_s(op,size) __bs_c(__bs_c(__bs_c(__bs_c(bs_,op),_),size),_s) -#define __bs_rs_s(sz, t, h, o) \ - (*(t)->__bs_opname_s(r,sz))((t)->bs_cookie, h, o) -#define __bs_ws_s(sz, t, h, o, v) \ - (*(t)->__bs_opname_s(w,sz))((t)->bs_cookie, h, o, v) -#define __bs_nonsingle_s(type, sz, t, h, o, a, c) \ - (*(t)->__bs_opname_s(type,sz))((t)->bs_cookie, h, o, a, c) - -/* - * Mapping and unmapping operations. - */ -#define bus_space_map(t, a, s, c, hp) \ - (*(t)->bs_map)((t)->bs_cookie, (a), (s), (c), (hp)) -#define bus_space_unmap(t, h, s) \ - (*(t)->bs_unmap)((t)->bs_cookie, (h), (s)) -#define bus_space_subregion(t, h, o, s, hp) \ - (*(t)->bs_subregion)((t)->bs_cookie, (h), (o), (s), (hp)) - -/* - * Allocation and deallocation operations. - */ -#define bus_space_alloc(t, rs, re, s, a, b, c, ap, hp) \ - (*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b), \ - (c), (ap), (hp)) -#define bus_space_free(t, h, s) \ - (*(t)->bs_free)((t)->bs_cookie, (h), (s)) - -/* - * Bus barrier operations. - */ -#define bus_space_barrier(t, h, o, l, f) \ - (*(t)->bs_barrier)((t)->bs_cookie, (h), (o), (l), (f)) - -#define BUS_SPACE_BARRIER_READ 0x01 -#define BUS_SPACE_BARRIER_WRITE 0x02 - -/* - * Bus read (single) operations. - */ -#define bus_space_read_1(t, h, o) __bs_rs(1,(t),(h),(o)) -#define bus_space_read_2(t, h, o) __bs_rs(2,(t),(h),(o)) -#define bus_space_read_4(t, h, o) __bs_rs(4,(t),(h),(o)) -#define bus_space_read_8(t, h, o) __bs_rs(8,(t),(h),(o)) - -#define bus_space_read_stream_1(t, h, o) __bs_rs_s(1,(t), (h), (o)) -#define bus_space_read_stream_2(t, h, o) __bs_rs_s(2,(t), (h), (o)) -#define bus_space_read_stream_4(t, h, o) __bs_rs_s(4,(t), (h), (o)) -#define bus_space_read_stream_8(t, h, o) __bs_rs_s(8,8,(t),(h),(o)) - -/* - * Bus read multiple operations. - */ -#define bus_space_read_multi_1(t, h, o, a, c) \ - __bs_nonsingle(rm,1,(t),(h),(o),(a),(c)) -#define bus_space_read_multi_2(t, h, o, a, c) \ - __bs_nonsingle(rm,2,(t),(h),(o),(a),(c)) -#define bus_space_read_multi_4(t, h, o, a, c) \ - __bs_nonsingle(rm,4,(t),(h),(o),(a),(c)) -#define bus_space_read_multi_8(t, h, o, a, c) \ - __bs_nonsingle(rm,8,(t),(h),(o),(a),(c)) - -#define bus_space_read_multi_stream_1(t, h, o, a, c) \ - __bs_nonsingle_s(rm,1,(t),(h),(o),(a),(c)) -#define bus_space_read_multi_stream_2(t, h, o, a, c) \ - __bs_nonsingle_s(rm,2,(t),(h),(o),(a),(c)) -#define bus_space_read_multi_stream_4(t, h, o, a, c) \ - __bs_nonsingle_s(rm,4,(t),(h),(o),(a),(c)) -#define bus_space_read_multi_stream_8(t, h, o, a, c) \ - __bs_nonsingle_s(rm,8,(t),(h),(o),(a),(c)) - -/* - * Bus read region operations. - */ -#define bus_space_read_region_1(t, h, o, a, c) \ - __bs_nonsingle(rr,1,(t),(h),(o),(a),(c)) -#define bus_space_read_region_2(t, h, o, a, c) \ - __bs_nonsingle(rr,2,(t),(h),(o),(a),(c)) -#define bus_space_read_region_4(t, h, o, a, c) \ - __bs_nonsingle(rr,4,(t),(h),(o),(a),(c)) -#define bus_space_read_region_8(t, h, o, a, c) \ - __bs_nonsingle(rr,8,(t),(h),(o),(a),(c)) - -#define bus_space_read_region_stream_1(t, h, o, a, c) \ - __bs_nonsingle_s(rr,1,(t),(h),(o),(a),(c)) -#define bus_space_read_region_stream_2(t, h, o, a, c) \ - __bs_nonsingle_s(rr,2,(t),(h),(o),(a),(c)) -#define bus_space_read_region_stream_4(t, h, o, a, c) \ - __bs_nonsingle_s(rr,4,(t),(h),(o),(a),(c)) -#define bus_space_read_region_stream_8(t, h, o, a, c) \ - __bs_nonsingle_s(rr,8,(t),(h),(o),(a),(c)) - -/* - * Bus write (single) operations. - */ -#define bus_space_write_1(t, h, o, v) __bs_ws(1,(t),(h),(o),(v)) -#define bus_space_write_2(t, h, o, v) __bs_ws(2,(t),(h),(o),(v)) -#define bus_space_write_4(t, h, o, v) __bs_ws(4,(t),(h),(o),(v)) -#define bus_space_write_8(t, h, o, v) __bs_ws(8,(t),(h),(o),(v)) - -#define bus_space_write_stream_1(t, h, o, v) __bs_ws_s(1,(t),(h),(o),(v)) -#define bus_space_write_stream_2(t, h, o, v) __bs_ws_s(2,(t),(h),(o),(v)) -#define bus_space_write_stream_4(t, h, o, v) __bs_ws_s(4,(t),(h),(o),(v)) -#define bus_space_write_stream_8(t, h, o, v) __bs_ws_s(8,(t),(h),(o),(v)) - -/* - * Bus write multiple operations. - */ -#define bus_space_write_multi_1(t, h, o, a, c) \ - __bs_nonsingle(wm,1,(t),(h),(o),(a),(c)) -#define bus_space_write_multi_2(t, h, o, a, c) \ - __bs_nonsingle(wm,2,(t),(h),(o),(a),(c)) -#define bus_space_write_multi_4(t, h, o, a, c) \ - __bs_nonsingle(wm,4,(t),(h),(o),(a),(c)) -#define bus_space_write_multi_8(t, h, o, a, c) \ - __bs_nonsingle(wm,8,(t),(h),(o),(a),(c)) - -#define bus_space_write_multi_stream_1(t, h, o, a, c) \ - __bs_nonsingle_s(wm,1,(t),(h),(o),(a),(c)) -#define bus_space_write_multi_stream_2(t, h, o, a, c) \ - __bs_nonsingle_s(wm,2,(t),(h),(o),(a),(c)) -#define bus_space_write_multi_stream_4(t, h, o, a, c) \ - __bs_nonsingle_s(wm,4,(t),(h),(o),(a),(c)) -#define bus_space_write_multi_stream_8(t, h, o, a, c) \ - __bs_nonsingle_s(wm,8,(t),(h),(o),(a),(c)) - -/* - * Bus write region operations. - */ -#define bus_space_write_region_1(t, h, o, a, c) \ - __bs_nonsingle(wr,1,(t),(h),(o),(a),(c)) -#define bus_space_write_region_2(t, h, o, a, c) \ - __bs_nonsingle(wr,2,(t),(h),(o),(a),(c)) -#define bus_space_write_region_4(t, h, o, a, c) \ - __bs_nonsingle(wr,4,(t),(h),(o),(a),(c)) -#define bus_space_write_region_8(t, h, o, a, c) \ - __bs_nonsingle(wr,8,(t),(h),(o),(a),(c)) - -#define bus_space_write_region_stream_1(t, h, o, a, c) \ - __bs_nonsingle_s(wr,1,(t),(h),(o),(a),(c)) -#define bus_space_write_region_stream_2(t, h, o, a, c) \ - __bs_nonsingle_s(wr,2,(t),(h),(o),(a),(c)) -#define bus_space_write_region_stream_4(t, h, o, a, c) \ - __bs_nonsingle_s(wr,4,(t),(h),(o),(a),(c)) -#define bus_space_write_region_stream_8(t, h, o, a, c) \ - __bs_nonsingle_s(wr,8,(t),(h),(o),(a),(c)) - -/* - * Set multiple operations. - */ -#define bus_space_set_multi_1(t, h, o, v, c) \ - __bs_set(sm,1,(t),(h),(o),(v),(c)) -#define bus_space_set_multi_2(t, h, o, v, c) \ - __bs_set(sm,2,(t),(h),(o),(v),(c)) -#define bus_space_set_multi_4(t, h, o, v, c) \ - __bs_set(sm,4,(t),(h),(o),(v),(c)) -#define bus_space_set_multi_8(t, h, o, v, c) \ - __bs_set(sm,8,(t),(h),(o),(v),(c)) - -/* - * Set region operations. - */ -#define bus_space_set_region_1(t, h, o, v, c) \ - __bs_set(sr,1,(t),(h),(o),(v),(c)) -#define bus_space_set_region_2(t, h, o, v, c) \ - __bs_set(sr,2,(t),(h),(o),(v),(c)) -#define bus_space_set_region_4(t, h, o, v, c) \ - __bs_set(sr,4,(t),(h),(o),(v),(c)) -#define bus_space_set_region_8(t, h, o, v, c) \ - __bs_set(sr,8,(t),(h),(o),(v),(c)) - -/* - * Copy operations. - */ -#define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \ - __bs_copy(1, t, h1, o1, h2, o2, c) -#define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \ - __bs_copy(2, t, h1, o1, h2, o2, c) -#define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \ - __bs_copy(4, t, h1, o1, h2, o2, c) -#define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \ - __bs_copy(8, t, h1, o1, h2, o2, c) - -/* - * Macros to provide prototypes for all the functions used in the - * bus_space structure - */ - -#define bs_map_proto(f) \ -int __bs_c(f,_bs_map) (void *t, bus_addr_t addr, \ - bus_size_t size, int cacheable, bus_space_handle_t *bshp); - -#define bs_unmap_proto(f) \ -void __bs_c(f,_bs_unmap) (void *t, bus_space_handle_t bsh, \ - bus_size_t size); - -#define bs_subregion_proto(f) \ -int __bs_c(f,_bs_subregion) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, bus_size_t size, \ - bus_space_handle_t *nbshp); - -#define bs_alloc_proto(f) \ -int __bs_c(f,_bs_alloc) (void *t, bus_addr_t rstart, \ - bus_addr_t rend, bus_size_t size, bus_size_t align, \ - bus_size_t boundary, int cacheable, bus_addr_t *addrp, \ - bus_space_handle_t *bshp); - -#define bs_free_proto(f) \ -void __bs_c(f,_bs_free) (void *t, bus_space_handle_t bsh, \ - bus_size_t size); - -#define bs_barrier_proto(f) \ -void __bs_c(f,_bs_barrier) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, bus_size_t len, int flags); - -#define bs_r_1_proto(f) \ -u_int8_t __bs_c(f,_bs_r_1) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset); - -#define bs_r_2_proto(f) \ -u_int16_t __bs_c(f,_bs_r_2) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset); - -#define bs_r_4_proto(f) \ -u_int32_t __bs_c(f,_bs_r_4) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset); - -#define bs_r_8_proto(f) \ -u_int64_t __bs_c(f,_bs_r_8) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset); - -#define bs_r_1_s_proto(f) \ -u_int8_t __bs_c(f,_bs_r_1_s) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset); - -#define bs_r_2_s_proto(f) \ -u_int16_t __bs_c(f,_bs_r_2_s) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset); - -#define bs_r_4_s_proto(f) \ -u_int32_t __bs_c(f,_bs_r_4_s) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset); - -#define bs_w_1_proto(f) \ -void __bs_c(f,_bs_w_1) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int8_t value); - -#define bs_w_2_proto(f) \ -void __bs_c(f,_bs_w_2) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int16_t value); - -#define bs_w_4_proto(f) \ -void __bs_c(f,_bs_w_4) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int32_t value); - -#define bs_w_8_proto(f) \ -void __bs_c(f,_bs_w_8) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int64_t value); - -#define bs_w_1_s_proto(f) \ -void __bs_c(f,_bs_w_1_s) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int8_t value); - -#define bs_w_2_s_proto(f) \ -void __bs_c(f,_bs_w_2_s) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int16_t value); - -#define bs_w_4_s_proto(f) \ -void __bs_c(f,_bs_w_4_s) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int32_t value); - -#define bs_rm_1_proto(f) \ -void __bs_c(f,_bs_rm_1) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int8_t *addr, bus_size_t count); - -#define bs_rm_2_proto(f) \ -void __bs_c(f,_bs_rm_2) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int16_t *addr, bus_size_t count); - -#define bs_rm_4_proto(f) \ -void __bs_c(f,_bs_rm_4) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int32_t *addr, bus_size_t count); - -#define bs_rm_8_proto(f) \ -void __bs_c(f,_bs_rm_8) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int64_t *addr, bus_size_t count); - -#define bs_wm_1_proto(f) \ -void __bs_c(f,_bs_wm_1) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, const u_int8_t *addr, bus_size_t count); - -#define bs_wm_2_proto(f) \ -void __bs_c(f,_bs_wm_2) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, const u_int16_t *addr, bus_size_t count); - -#define bs_wm_4_proto(f) \ -void __bs_c(f,_bs_wm_4) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, const u_int32_t *addr, bus_size_t count); - -#define bs_wm_8_proto(f) \ -void __bs_c(f,_bs_wm_8) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, const u_int64_t *addr, bus_size_t count); - -#define bs_rr_1_proto(f) \ -void __bs_c(f, _bs_rr_1) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int8_t *addr, bus_size_t count); - -#define bs_rr_2_proto(f) \ -void __bs_c(f, _bs_rr_2) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int16_t *addr, bus_size_t count); - -#define bs_rr_4_proto(f) \ -void __bs_c(f, _bs_rr_4) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int32_t *addr, bus_size_t count); - -#define bs_rr_8_proto(f) \ -void __bs_c(f, _bs_rr_8) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int64_t *addr, bus_size_t count); - -#define bs_wr_1_proto(f) \ -void __bs_c(f, _bs_wr_1) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, const u_int8_t *addr, bus_size_t count); - -#define bs_wr_2_proto(f) \ -void __bs_c(f, _bs_wr_2) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, const u_int16_t *addr, bus_size_t count); - -#define bs_wr_4_proto(f) \ -void __bs_c(f, _bs_wr_4) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, const u_int32_t *addr, bus_size_t count); - -#define bs_wr_8_proto(f) \ -void __bs_c(f, _bs_wr_8) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, const u_int64_t *addr, bus_size_t count); - -#define bs_sm_1_proto(f) \ -void __bs_c(f,_bs_sm_1) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int8_t value, bus_size_t count); - -#define bs_sm_2_proto(f) \ -void __bs_c(f,_bs_sm_2) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int16_t value, bus_size_t count); - -#define bs_sm_4_proto(f) \ -void __bs_c(f,_bs_sm_4) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int32_t value, bus_size_t count); - -#define bs_sm_8_proto(f) \ -void __bs_c(f,_bs_sm_8) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int64_t value, bus_size_t count); - -#define bs_sr_1_proto(f) \ -void __bs_c(f,_bs_sr_1) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int8_t value, bus_size_t count); - -#define bs_sr_2_proto(f) \ -void __bs_c(f,_bs_sr_2) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int16_t value, bus_size_t count); - -#define bs_sr_4_proto(f) \ -void __bs_c(f,_bs_sr_4) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int32_t value, bus_size_t count); - -#define bs_sr_8_proto(f) \ -void __bs_c(f,_bs_sr_8) (void *t, bus_space_handle_t bsh, \ - bus_size_t offset, u_int64_t value, bus_size_t count); - -#define bs_c_1_proto(f) \ -void __bs_c(f,_bs_c_1) (void *t, bus_space_handle_t bsh1, \ - bus_size_t offset1, bus_space_handle_t bsh2, \ - bus_size_t offset2, bus_size_t count); - -#define bs_c_2_proto(f) \ -void __bs_c(f,_bs_c_2) (void *t, bus_space_handle_t bsh1, \ - bus_size_t offset1, bus_space_handle_t bsh2, \ - bus_size_t offset2, bus_size_t count); - -#define bs_c_4_proto(f) \ -void __bs_c(f,_bs_c_4) (void *t, bus_space_handle_t bsh1, \ - bus_size_t offset1, bus_space_handle_t bsh2, \ - bus_size_t offset2, bus_size_t count); - -#define bs_c_8_proto(f) \ -void __bs_c(f,_bs_c_8) (void *t, bus_space_handle_t bsh1, \ - bus_size_t offset1, bus_space_handle_t bsh2, \ - bus_size_t offset2, bus_size_t count); - -#define DECLARE_BUS_SPACE_PROTOTYPES(f) \ - bs_map_proto(f); \ - bs_unmap_proto(f); \ - bs_subregion_proto(f); \ - bs_alloc_proto(f); \ - bs_free_proto(f); \ - bs_barrier_proto(f); \ - bs_r_1_proto(f); \ - bs_r_2_proto(f); \ - bs_r_4_proto(f); \ - bs_r_8_proto(f); \ - bs_r_1_s_proto(f); \ - bs_r_2_s_proto(f); \ - bs_r_4_s_proto(f); \ - bs_w_1_proto(f); \ - bs_w_2_proto(f); \ - bs_w_4_proto(f); \ - bs_w_8_proto(f); \ - bs_w_1_s_proto(f); \ - bs_w_2_s_proto(f); \ - bs_w_4_s_proto(f); \ - bs_rm_1_proto(f); \ - bs_rm_2_proto(f); \ - bs_rm_4_proto(f); \ - bs_rm_8_proto(f); \ - bs_wm_1_proto(f); \ - bs_wm_2_proto(f); \ - bs_wm_4_proto(f); \ - bs_wm_8_proto(f); \ - bs_rr_1_proto(f); \ - bs_rr_2_proto(f); \ - bs_rr_4_proto(f); \ - bs_rr_8_proto(f); \ - bs_wr_1_proto(f); \ - bs_wr_2_proto(f); \ - bs_wr_4_proto(f); \ - bs_wr_8_proto(f); \ - bs_sm_1_proto(f); \ - bs_sm_2_proto(f); \ - bs_sm_4_proto(f); \ - bs_sm_8_proto(f); \ - bs_sr_1_proto(f); \ - bs_sr_2_proto(f); \ - bs_sr_4_proto(f); \ - bs_sr_8_proto(f); \ - bs_c_1_proto(f); \ - bs_c_2_proto(f); \ - bs_c_4_proto(f); \ - bs_c_8_proto(f); - -#define BUS_PEEK_FUNC(width, type) \ - static inline int \ - bus_space_peek_##width(bus_space_tag_t tag, \ - bus_space_handle_t hnd, bus_size_t offset, type *value) \ - { \ - type tmp; \ - tmp = bus_space_read_##width(tag, hnd, offset); \ - *value = (type)tmp; \ - return (0); \ - } -BUS_PEEK_FUNC(1, uint8_t) -BUS_PEEK_FUNC(2, uint16_t) -BUS_PEEK_FUNC(4, uint32_t) -BUS_PEEK_FUNC(8, uint64_t) - -#define BUS_POKE_FUNC(width, type) \ - static inline int \ - bus_space_poke_##width(bus_space_tag_t tag, \ - bus_space_handle_t hnd, bus_size_t offset, type value) \ - { \ - bus_space_write_##width(tag, hnd, offset, value); \ - return (0); \ - } -BUS_POKE_FUNC(1, uint8_t) -BUS_POKE_FUNC(2, uint16_t) -BUS_POKE_FUNC(4, uint32_t) -BUS_POKE_FUNC(8, uint64_t) - -#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) - -#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF -#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF - -#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF -#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF - -#if defined(__mips_n64) -#define BUS_SPACE_MAXADDR 0xFFFFFFFFFFFFFFFFUL -#define BUS_SPACE_MAXSIZE 0xFFFFFFFFFFFFFFFFUL -#else -#define BUS_SPACE_MAXADDR 0xFFFFFFFFUL -#define BUS_SPACE_MAXSIZE 0xFFFFFFFFUL -#endif - -#define BUS_SPACE_UNRESTRICTED (~0) - -/* - * declare generic bus space, it suits all needs in - */ -DECLARE_BUS_SPACE_PROTOTYPES(generic); -extern bus_space_tag_t mips_bus_space_generic; - -/* Special bus space for RMI processors */ -#if defined(CPU_RMI) || defined (CPU_NLM) -extern bus_space_tag_t rmi_bus_space; -extern bus_space_tag_t rmi_pci_bus_space; -extern bus_space_tag_t rmi_uart_bus_space; -#endif - -#include - -#endif /* _MACHINE_BUS_H_ */ diff --git a/sys/mips/include/bus_dma.h b/sys/mips/include/bus_dma.h deleted file mode 100644 index b6bfe2fb615..00000000000 --- a/sys/mips/include/bus_dma.h +++ /dev/null @@ -1,35 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2005 Scott Long - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MIPS_BUS_DMA_H_ -#define _MIPS_BUS_DMA_H_ - -#include -#include - -#endif /* _MIPS_BUS_DMA_H_ */ diff --git a/sys/mips/include/cache.h b/sys/mips/include/cache.h deleted file mode 100644 index 0d4867189a8..00000000000 --- a/sys/mips/include/cache.h +++ /dev/null @@ -1,224 +0,0 @@ -/* $NetBSD: cache.h,v 1.6 2003/02/17 11:35:01 simonb Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright 2001 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Jason R. Thorpe for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE_CACHE_H_ -#define _MACHINE_CACHE_H_ - -/* - * Cache operations. - * - * We define the following primitives: - * - * --- Instruction cache synchronization (mandatory): - * - * icache_sync_all Synchronize I-cache - * - * icache_sync_range Synchronize I-cache range - * - * icache_sync_range_index (index ops) - * - * --- Primary data cache (mandatory): - * - * pdcache_wbinv_all Write-back Invalidate primary D-cache - * - * pdcache_wbinv_range Write-back Invalidate primary D-cache range - * - * pdcache_wbinv_range_index (index ops) - * - * pdcache_inv_range Invalidate primary D-cache range - * - * pdcache_wb_range Write-back primary D-cache range - * - * --- Secondary data cache (optional): - * - * sdcache_wbinv_all Write-back Invalidate secondary D-cache - * - * sdcache_wbinv_range Write-back Invalidate secondary D-cache range - * - * sdcache_wbinv_range_index (index ops) - * - * sdcache_inv_range Invalidate secondary D-cache range - * - * sdcache_wb_range Write-back secondary D-cache range - * - * There are some rules that must be followed: - * - * I-cache Synch (all or range): - * The goal is to synchronize the instruction stream, - * so you may need to write-back dirty data cache - * blocks first. If a range is requested, and you - * can't synchronize just a range, you have to hit - * the whole thing. - * - * D-cache Write-back Invalidate range: - * If you can't WB-Inv a range, you must WB-Inv the - * entire D-cache. - * - * D-cache Invalidate: - * If you can't Inv the D-cache without doing a - * Write-back, YOU MUST PANIC. This is to catch - * errors in calling code. Callers must be aware - * of this scenario, and must handle it appropriately - * (consider the bus_dma(9) operations). - * - * D-cache Write-back: - * If you can't Write-back without doing an invalidate, - * that's fine. Then treat this as a WB-Inv. Skipping - * the invalidate is merely an optimization. - * - * All operations: - * Valid virtual addresses must be passed to the - * cache operation. - * - * Finally, these primitives are grouped together in reasonable - * ways. For all operations described here, first the primary - * cache is frobbed, then the secondary cache frobbed, if the - * operation for the secondary cache exists. - * - * mips_icache_sync_all Synchronize I-cache - * - * mips_icache_sync_range Synchronize I-cache range - * - * mips_icache_sync_range_index (index ops) - * - * mips_dcache_wbinv_all Write-back Invalidate D-cache - * - * mips_dcache_wbinv_range Write-back Invalidate D-cache range - * - * mips_dcache_wbinv_range_index (index ops) - * - * mips_dcache_inv_range Invalidate D-cache range - * - * mips_dcache_wb_range Write-back D-cache range - */ - -struct mips_cache_ops { - void (*mco_icache_sync_all)(void); - void (*mco_icache_sync_range)(vm_offset_t, vm_size_t); - void (*mco_icache_sync_range_index)(vm_offset_t, vm_size_t); - - void (*mco_pdcache_wbinv_all)(void); - void (*mco_pdcache_wbinv_range)(vm_offset_t, vm_size_t); - void (*mco_pdcache_wbinv_range_index)(vm_offset_t, vm_size_t); - void (*mco_pdcache_inv_range)(vm_offset_t, vm_size_t); - void (*mco_pdcache_wb_range)(vm_offset_t, vm_size_t); - - /* These are called only by the (mipsNN) icache functions. */ - void (*mco_intern_pdcache_wbinv_all)(void); - void (*mco_intern_pdcache_wbinv_range_index)(vm_offset_t, vm_size_t); - void (*mco_intern_pdcache_wb_range)(vm_offset_t, vm_size_t); - - void (*mco_sdcache_wbinv_all)(void); - void (*mco_sdcache_wbinv_range)(vm_offset_t, vm_size_t); - void (*mco_sdcache_wbinv_range_index)(vm_offset_t, vm_size_t); - void (*mco_sdcache_inv_range)(vm_offset_t, vm_size_t); - void (*mco_sdcache_wb_range)(vm_offset_t, vm_size_t); - - /* These are called only by the (mipsNN) icache functions. */ - void (*mco_intern_sdcache_wbinv_all)(void); - void (*mco_intern_sdcache_wbinv_range_index)(vm_offset_t, vm_size_t); - void (*mco_intern_sdcache_wb_range)(vm_offset_t, vm_size_t); -}; - -extern struct mips_cache_ops mips_cache_ops; - -/* PRIMARY CACHE VARIABLES */ -extern int mips_picache_linesize; -extern int mips_pdcache_linesize; -extern int mips_sdcache_linesize; -extern int mips_dcache_max_linesize; - -#define __mco_noargs(prefix, x) \ -do { \ - (*mips_cache_ops.mco_ ## prefix ## p ## x )(); \ - if (*mips_cache_ops.mco_ ## prefix ## s ## x ) \ - (*mips_cache_ops.mco_ ## prefix ## s ## x )(); \ -} while (/*CONSTCOND*/0) - -#define __mco_2args(prefix, x, a, b) \ -do { \ - (*mips_cache_ops.mco_ ## prefix ## p ## x )((a), (b)); \ - if (*mips_cache_ops.mco_ ## prefix ## s ## x ) \ - (*mips_cache_ops.mco_ ## prefix ## s ## x )((a), (b)); \ -} while (/*CONSTCOND*/0) - -#define mips_icache_sync_all() \ - (*mips_cache_ops.mco_icache_sync_all)() - -#define mips_icache_sync_range(v, s) \ - (*mips_cache_ops.mco_icache_sync_range)((v), (s)) - -#define mips_icache_sync_range_index(v, s) \ - (*mips_cache_ops.mco_icache_sync_range_index)((v), (s)) - -#define mips_dcache_wbinv_all() \ - __mco_noargs(, dcache_wbinv_all) - -#define mips_dcache_wbinv_range(v, s) \ - __mco_2args(, dcache_wbinv_range, (v), (s)) - -#define mips_dcache_wbinv_range_index(v, s) \ - __mco_2args(, dcache_wbinv_range_index, (v), (s)) - -#define mips_dcache_inv_range(v, s) \ - __mco_2args(, dcache_inv_range, (v), (s)) - -#define mips_dcache_wb_range(v, s) \ - __mco_2args(, dcache_wb_range, (v), (s)) - -/* - * Private D-cache functions only called from (currently only the - * mipsNN) I-cache functions. - */ -#define mips_intern_dcache_wbinv_all() \ - __mco_noargs(intern_, dcache_wbinv_all) - -#define mips_intern_dcache_wbinv_range_index(v, s) \ - __mco_2args(intern_, dcache_wbinv_range_index, (v), (s)) - -#define mips_intern_dcache_wb_range(v, s) \ - __mco_2args(intern_, dcache_wb_range, (v), (s)) - -/* forward declaration */ -struct mips_cpuinfo; - -void mips_config_cache(struct mips_cpuinfo *); - -#include -#endif /* _MACHINE_CACHE_H_ */ diff --git a/sys/mips/include/cache_mipsNN.h b/sys/mips/include/cache_mipsNN.h deleted file mode 100644 index 4f5d240ff2a..00000000000 --- a/sys/mips/include/cache_mipsNN.h +++ /dev/null @@ -1,92 +0,0 @@ -/* $NetBSD: cache_mipsNN.h,v 1.4 2003/02/17 11:35:02 simonb Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright 2002 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Simon Burge for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef _MACHINE_CACHE_MIPSNN_H_ -#define _MACHINE_CACHE_MIPSNN_H_ - -void mipsNN_cache_init(struct mips_cpuinfo *); - -void mipsNN_icache_sync_all_16(void); -void mipsNN_icache_sync_all_32(void); -void mipsNN_icache_sync_all_64(void); -void mipsNN_icache_sync_all_128(void); -void mipsNN_icache_sync_range_16(vm_offset_t, vm_size_t); -void mipsNN_icache_sync_range_32(vm_offset_t, vm_size_t); -void mipsNN_icache_sync_range_64(vm_offset_t, vm_size_t); -void mipsNN_icache_sync_range_128(vm_offset_t, vm_size_t); -void mipsNN_icache_sync_range_index_16(vm_offset_t, vm_size_t); -void mipsNN_icache_sync_range_index_32(vm_offset_t, vm_size_t); -void mipsNN_icache_sync_range_index_64(vm_offset_t, vm_size_t); -void mipsNN_icache_sync_range_index_128(vm_offset_t, vm_size_t); -void mipsNN_pdcache_wbinv_all_16(void); -void mipsNN_pdcache_wbinv_all_32(void); -void mipsNN_pdcache_wbinv_all_64(void); -void mipsNN_pdcache_wbinv_all_128(void); -void mipsNN_pdcache_wbinv_range_16(vm_offset_t, vm_size_t); -void mipsNN_pdcache_wbinv_range_32(vm_offset_t, vm_size_t); -void mipsNN_pdcache_wbinv_range_64(vm_offset_t, vm_size_t); -void mipsNN_pdcache_wbinv_range_128(vm_offset_t, vm_size_t); -void mipsNN_pdcache_wbinv_range_index_16(vm_offset_t, vm_size_t); -void mipsNN_pdcache_wbinv_range_index_32(vm_offset_t, vm_size_t); -void mipsNN_pdcache_wbinv_range_index_64(vm_offset_t, vm_size_t); -void mipsNN_pdcache_wbinv_range_index_128(vm_offset_t, vm_size_t); -void mipsNN_pdcache_inv_range_16(vm_offset_t, vm_size_t); -void mipsNN_pdcache_inv_range_32(vm_offset_t, vm_size_t); -void mipsNN_pdcache_inv_range_64(vm_offset_t, vm_size_t); -void mipsNN_pdcache_inv_range_128(vm_offset_t, vm_size_t); -void mipsNN_pdcache_wb_range_16(vm_offset_t, vm_size_t); -void mipsNN_pdcache_wb_range_32(vm_offset_t, vm_size_t); -void mipsNN_pdcache_wb_range_64(vm_offset_t, vm_size_t); -void mipsNN_pdcache_wb_range_128(vm_offset_t, vm_size_t); -void mipsNN_sdcache_wbinv_all_32(void); -void mipsNN_sdcache_wbinv_all_64(void); -void mipsNN_sdcache_wbinv_all_128(void); -void mipsNN_sdcache_wbinv_range_32(vm_offset_t, vm_size_t); -void mipsNN_sdcache_wbinv_range_64(vm_offset_t, vm_size_t); -void mipsNN_sdcache_wbinv_range_128(vm_offset_t, vm_size_t); -void mipsNN_sdcache_wbinv_range_index_32(vm_offset_t, vm_size_t); -void mipsNN_sdcache_wbinv_range_index_64(vm_offset_t, vm_size_t); -void mipsNN_sdcache_wbinv_range_index_128(vm_offset_t, vm_size_t); -void mipsNN_sdcache_inv_range_32(vm_offset_t, vm_size_t); -void mipsNN_sdcache_inv_range_64(vm_offset_t, vm_size_t); -void mipsNN_sdcache_inv_range_128(vm_offset_t, vm_size_t); -void mipsNN_sdcache_wb_range_32(vm_offset_t, vm_size_t); -void mipsNN_sdcache_wb_range_64(vm_offset_t, vm_size_t); -void mipsNN_sdcache_wb_range_128(vm_offset_t, vm_size_t); - -#endif /* _MACHINE_CACHE_MIPSNN_H_ */ diff --git a/sys/mips/include/cache_r4k.h b/sys/mips/include/cache_r4k.h deleted file mode 100644 index 0672505498b..00000000000 --- a/sys/mips/include/cache_r4k.h +++ /dev/null @@ -1,434 +0,0 @@ -/* $NetBSD: cache_r4k.h,v 1.10 2003/03/08 04:43:26 rafal Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright 2001 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Jason R. Thorpe for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Cache definitions/operations for R4000-style caches. - */ - -#define CACHE_R4K_I 0 -#define CACHE_R4K_D 1 -#define CACHE_R4K_SI 2 -#define CACHE_R4K_SD 3 - -#define CACHEOP_R4K_INDEX_INV (0 << 2) /* I, SI */ -#define CACHEOP_R4K_INDEX_WB_INV (0 << 2) /* D, SD */ -#define CACHEOP_R4K_INDEX_LOAD_TAG (1 << 2) /* all */ -#define CACHEOP_R4K_INDEX_STORE_TAG (2 << 2) /* all */ -#define CACHEOP_R4K_CREATE_DIRTY_EXCL (3 << 2) /* D, SD */ -#define CACHEOP_R4K_HIT_INV (4 << 2) /* all */ -#define CACHEOP_R4K_HIT_WB_INV (5 << 2) /* D, SD */ -#define CACHEOP_R4K_FILL (5 << 2) /* I */ -#define CACHEOP_R4K_HIT_WB (6 << 2) /* I, D, SD */ -#define CACHEOP_R4K_HIT_SET_VIRTUAL (7 << 2) /* SI, SD */ - -#if !defined(LOCORE) - -/* - * cache_r4k_op_line: - * - * Perform the specified cache operation on a single line. - */ -#define cache_op_r4k_line(va, op) \ -do { \ - __asm __volatile( \ - ".set noreorder \n\t" \ - "cache %1, 0(%0) \n\t" \ - ".set reorder" \ - : \ - : "r" (va), "i" (op) \ - : "memory"); \ -} while (/*CONSTCOND*/0) - -/* - * cache_r4k_op_8lines_16: - * - * Perform the specified cache operation on 8 16-byte cache lines. - */ -#define cache_r4k_op_8lines_16(va, op) \ -do { \ - __asm __volatile( \ - ".set noreorder \n\t" \ - "cache %1, 0x00(%0); cache %1, 0x10(%0) \n\t" \ - "cache %1, 0x20(%0); cache %1, 0x30(%0) \n\t" \ - "cache %1, 0x40(%0); cache %1, 0x50(%0) \n\t" \ - "cache %1, 0x60(%0); cache %1, 0x70(%0) \n\t" \ - ".set reorder" \ - : \ - : "r" (va), "i" (op) \ - : "memory"); \ -} while (/*CONSTCOND*/0) - -/* - * cache_r4k_op_8lines_32: - * - * Perform the specified cache operation on 8 32-byte cache lines. - */ -#define cache_r4k_op_8lines_32(va, op) \ -do { \ - __asm __volatile( \ - ".set noreorder \n\t" \ - "cache %1, 0x00(%0); cache %1, 0x20(%0) \n\t" \ - "cache %1, 0x40(%0); cache %1, 0x60(%0) \n\t" \ - "cache %1, 0x80(%0); cache %1, 0xa0(%0) \n\t" \ - "cache %1, 0xc0(%0); cache %1, 0xe0(%0) \n\t" \ - ".set reorder" \ - : \ - : "r" (va), "i" (op) \ - : "memory"); \ -} while (/*CONSTCOND*/0) - -/* - * cache_r4k_op_8lines_64: - * - * Perform the specified cache operation on 8 64-byte cache lines. - */ -#define cache_r4k_op_8lines_64(va, op) \ -do { \ - __asm __volatile( \ - ".set noreorder \n\t" \ - "cache %1, 0x000(%0); cache %1, 0x040(%0) \n\t" \ - "cache %1, 0x080(%0); cache %1, 0x0c0(%0) \n\t" \ - "cache %1, 0x100(%0); cache %1, 0x140(%0) \n\t" \ - "cache %1, 0x180(%0); cache %1, 0x1c0(%0) \n\t" \ - ".set reorder" \ - : \ - : "r" (va), "i" (op) \ - : "memory"); \ -} while (/*CONSTCOND*/0) - -/* - * cache_r4k_op_32lines_16: - * - * Perform the specified cache operation on 32 16-byte - * cache lines. - */ -#define cache_r4k_op_32lines_16(va, op) \ -do { \ - __asm __volatile( \ - ".set noreorder \n\t" \ - "cache %1, 0x000(%0); cache %1, 0x010(%0); \n\t" \ - "cache %1, 0x020(%0); cache %1, 0x030(%0); \n\t" \ - "cache %1, 0x040(%0); cache %1, 0x050(%0); \n\t" \ - "cache %1, 0x060(%0); cache %1, 0x070(%0); \n\t" \ - "cache %1, 0x080(%0); cache %1, 0x090(%0); \n\t" \ - "cache %1, 0x0a0(%0); cache %1, 0x0b0(%0); \n\t" \ - "cache %1, 0x0c0(%0); cache %1, 0x0d0(%0); \n\t" \ - "cache %1, 0x0e0(%0); cache %1, 0x0f0(%0); \n\t" \ - "cache %1, 0x100(%0); cache %1, 0x110(%0); \n\t" \ - "cache %1, 0x120(%0); cache %1, 0x130(%0); \n\t" \ - "cache %1, 0x140(%0); cache %1, 0x150(%0); \n\t" \ - "cache %1, 0x160(%0); cache %1, 0x170(%0); \n\t" \ - "cache %1, 0x180(%0); cache %1, 0x190(%0); \n\t" \ - "cache %1, 0x1a0(%0); cache %1, 0x1b0(%0); \n\t" \ - "cache %1, 0x1c0(%0); cache %1, 0x1d0(%0); \n\t" \ - "cache %1, 0x1e0(%0); cache %1, 0x1f0(%0); \n\t" \ - ".set reorder" \ - : \ - : "r" (va), "i" (op) \ - : "memory"); \ -} while (/*CONSTCOND*/0) - -/* - * cache_r4k_op_32lines_32: - * - * Perform the specified cache operation on 32 32-byte - * cache lines. - */ -#define cache_r4k_op_32lines_32(va, op) \ -do { \ - __asm __volatile( \ - ".set noreorder \n\t" \ - "cache %1, 0x000(%0); cache %1, 0x020(%0); \n\t" \ - "cache %1, 0x040(%0); cache %1, 0x060(%0); \n\t" \ - "cache %1, 0x080(%0); cache %1, 0x0a0(%0); \n\t" \ - "cache %1, 0x0c0(%0); cache %1, 0x0e0(%0); \n\t" \ - "cache %1, 0x100(%0); cache %1, 0x120(%0); \n\t" \ - "cache %1, 0x140(%0); cache %1, 0x160(%0); \n\t" \ - "cache %1, 0x180(%0); cache %1, 0x1a0(%0); \n\t" \ - "cache %1, 0x1c0(%0); cache %1, 0x1e0(%0); \n\t" \ - "cache %1, 0x200(%0); cache %1, 0x220(%0); \n\t" \ - "cache %1, 0x240(%0); cache %1, 0x260(%0); \n\t" \ - "cache %1, 0x280(%0); cache %1, 0x2a0(%0); \n\t" \ - "cache %1, 0x2c0(%0); cache %1, 0x2e0(%0); \n\t" \ - "cache %1, 0x300(%0); cache %1, 0x320(%0); \n\t" \ - "cache %1, 0x340(%0); cache %1, 0x360(%0); \n\t" \ - "cache %1, 0x380(%0); cache %1, 0x3a0(%0); \n\t" \ - "cache %1, 0x3c0(%0); cache %1, 0x3e0(%0); \n\t" \ - ".set reorder" \ - : \ - : "r" (va), "i" (op) \ - : "memory"); \ -} while (/*CONSTCOND*/0) - -/* - * cache_r4k_op_32lines_64: - * - * Perform the specified cache operation on 32 64-byte - * cache lines. - */ -#define cache_r4k_op_32lines_64(va, op) \ -do { \ - __asm __volatile( \ - ".set noreorder \n\t" \ - "cache %1, 0x000(%0); cache %1, 0x040(%0); \n\t" \ - "cache %1, 0x080(%0); cache %1, 0x0c0(%0); \n\t" \ - "cache %1, 0x100(%0); cache %1, 0x140(%0); \n\t" \ - "cache %1, 0x180(%0); cache %1, 0x1c0(%0); \n\t" \ - "cache %1, 0x200(%0); cache %1, 0x240(%0); \n\t" \ - "cache %1, 0x280(%0); cache %1, 0x2c0(%0); \n\t" \ - "cache %1, 0x300(%0); cache %1, 0x340(%0); \n\t" \ - "cache %1, 0x380(%0); cache %1, 0x3c0(%0); \n\t" \ - "cache %1, 0x400(%0); cache %1, 0x440(%0); \n\t" \ - "cache %1, 0x480(%0); cache %1, 0x4c0(%0); \n\t" \ - "cache %1, 0x500(%0); cache %1, 0x540(%0); \n\t" \ - "cache %1, 0x580(%0); cache %1, 0x5c0(%0); \n\t" \ - "cache %1, 0x600(%0); cache %1, 0x640(%0); \n\t" \ - "cache %1, 0x680(%0); cache %1, 0x6c0(%0); \n\t" \ - "cache %1, 0x700(%0); cache %1, 0x740(%0); \n\t" \ - "cache %1, 0x780(%0); cache %1, 0x7c0(%0); \n\t" \ - ".set reorder" \ - : \ - : "r" (va), "i" (op) \ - : "memory"); \ -} while (/*CONSTCOND*/0) - -/* - * cache_r4k_op_32lines_128: - * - * Perform the specified cache operation on 32 128-byte - * cache lines. - */ -#define cache_r4k_op_32lines_128(va, op) \ -do { \ - __asm __volatile( \ - ".set noreorder \n\t" \ - "cache %1, 0x0000(%0); cache %1, 0x0080(%0); \n\t" \ - "cache %1, 0x0100(%0); cache %1, 0x0180(%0); \n\t" \ - "cache %1, 0x0200(%0); cache %1, 0x0280(%0); \n\t" \ - "cache %1, 0x0300(%0); cache %1, 0x0380(%0); \n\t" \ - "cache %1, 0x0400(%0); cache %1, 0x0480(%0); \n\t" \ - "cache %1, 0x0500(%0); cache %1, 0x0580(%0); \n\t" \ - "cache %1, 0x0600(%0); cache %1, 0x0680(%0); \n\t" \ - "cache %1, 0x0700(%0); cache %1, 0x0780(%0); \n\t" \ - "cache %1, 0x0800(%0); cache %1, 0x0880(%0); \n\t" \ - "cache %1, 0x0900(%0); cache %1, 0x0980(%0); \n\t" \ - "cache %1, 0x0a00(%0); cache %1, 0x0a80(%0); \n\t" \ - "cache %1, 0x0b00(%0); cache %1, 0x0b80(%0); \n\t" \ - "cache %1, 0x0c00(%0); cache %1, 0x0c80(%0); \n\t" \ - "cache %1, 0x0d00(%0); cache %1, 0x0d80(%0); \n\t" \ - "cache %1, 0x0e00(%0); cache %1, 0x0e80(%0); \n\t" \ - "cache %1, 0x0f00(%0); cache %1, 0x0f80(%0); \n\t" \ - ".set reorder" \ - : \ - : "r" (va), "i" (op) \ - : "memory"); \ -} while (/*CONSTCOND*/0) - -/* - * cache_r4k_op_16lines_16_2way: - * - * Perform the specified cache operation on 16 16-byte - * cache lines, 2-ways. - */ -#define cache_r4k_op_16lines_16_2way(va1, va2, op) \ -do { \ - __asm __volatile( \ - ".set noreorder \n\t" \ - "cache %2, 0x000(%0); cache %2, 0x000(%1); \n\t" \ - "cache %2, 0x010(%0); cache %2, 0x010(%1); \n\t" \ - "cache %2, 0x020(%0); cache %2, 0x020(%1); \n\t" \ - "cache %2, 0x030(%0); cache %2, 0x030(%1); \n\t" \ - "cache %2, 0x040(%0); cache %2, 0x040(%1); \n\t" \ - "cache %2, 0x050(%0); cache %2, 0x050(%1); \n\t" \ - "cache %2, 0x060(%0); cache %2, 0x060(%1); \n\t" \ - "cache %2, 0x070(%0); cache %2, 0x070(%1); \n\t" \ - "cache %2, 0x080(%0); cache %2, 0x080(%1); \n\t" \ - "cache %2, 0x090(%0); cache %2, 0x090(%1); \n\t" \ - "cache %2, 0x0a0(%0); cache %2, 0x0a0(%1); \n\t" \ - "cache %2, 0x0b0(%0); cache %2, 0x0b0(%1); \n\t" \ - "cache %2, 0x0c0(%0); cache %2, 0x0c0(%1); \n\t" \ - "cache %2, 0x0d0(%0); cache %2, 0x0d0(%1); \n\t" \ - "cache %2, 0x0e0(%0); cache %2, 0x0e0(%1); \n\t" \ - "cache %2, 0x0f0(%0); cache %2, 0x0f0(%1); \n\t" \ - ".set reorder" \ - : \ - : "r" (va1), "r" (va2), "i" (op) \ - : "memory"); \ -} while (/*CONSTCOND*/0) - -/* - * cache_r4k_op_16lines_32_2way: - * - * Perform the specified cache operation on 16 32-byte - * cache lines, 2-ways. - */ -#define cache_r4k_op_16lines_32_2way(va1, va2, op) \ -do { \ - __asm __volatile( \ - ".set noreorder \n\t" \ - "cache %2, 0x000(%0); cache %2, 0x000(%1); \n\t" \ - "cache %2, 0x020(%0); cache %2, 0x020(%1); \n\t" \ - "cache %2, 0x040(%0); cache %2, 0x040(%1); \n\t" \ - "cache %2, 0x060(%0); cache %2, 0x060(%1); \n\t" \ - "cache %2, 0x080(%0); cache %2, 0x080(%1); \n\t" \ - "cache %2, 0x0a0(%0); cache %2, 0x0a0(%1); \n\t" \ - "cache %2, 0x0c0(%0); cache %2, 0x0c0(%1); \n\t" \ - "cache %2, 0x0e0(%0); cache %2, 0x0e0(%1); \n\t" \ - "cache %2, 0x100(%0); cache %2, 0x100(%1); \n\t" \ - "cache %2, 0x120(%0); cache %2, 0x120(%1); \n\t" \ - "cache %2, 0x140(%0); cache %2, 0x140(%1); \n\t" \ - "cache %2, 0x160(%0); cache %2, 0x160(%1); \n\t" \ - "cache %2, 0x180(%0); cache %2, 0x180(%1); \n\t" \ - "cache %2, 0x1a0(%0); cache %2, 0x1a0(%1); \n\t" \ - "cache %2, 0x1c0(%0); cache %2, 0x1c0(%1); \n\t" \ - "cache %2, 0x1e0(%0); cache %2, 0x1e0(%1); \n\t" \ - ".set reorder" \ - : \ - : "r" (va1), "r" (va2), "i" (op) \ - : "memory"); \ -} while (/*CONSTCOND*/0) - -/* - * cache_r4k_op_8lines_16_4way: - * - * Perform the specified cache operation on 8 16-byte - * cache lines, 4-ways. - */ -#define cache_r4k_op_8lines_16_4way(va1, va2, va3, va4, op) \ -do { \ - __asm __volatile( \ - ".set noreorder \n\t" \ - "cache %4, 0x000(%0); cache %4, 0x000(%1); \n\t" \ - "cache %4, 0x000(%2); cache %4, 0x000(%3); \n\t" \ - "cache %4, 0x010(%0); cache %4, 0x010(%1); \n\t" \ - "cache %4, 0x010(%2); cache %4, 0x010(%3); \n\t" \ - "cache %4, 0x020(%0); cache %4, 0x020(%1); \n\t" \ - "cache %4, 0x020(%2); cache %4, 0x020(%3); \n\t" \ - "cache %4, 0x030(%0); cache %4, 0x030(%1); \n\t" \ - "cache %4, 0x030(%2); cache %4, 0x030(%3); \n\t" \ - "cache %4, 0x040(%0); cache %4, 0x040(%1); \n\t" \ - "cache %4, 0x040(%2); cache %4, 0x040(%3); \n\t" \ - "cache %4, 0x050(%0); cache %4, 0x050(%1); \n\t" \ - "cache %4, 0x050(%2); cache %4, 0x050(%3); \n\t" \ - "cache %4, 0x060(%0); cache %4, 0x060(%1); \n\t" \ - "cache %4, 0x060(%2); cache %4, 0x060(%3); \n\t" \ - "cache %4, 0x070(%0); cache %4, 0x070(%1); \n\t" \ - "cache %4, 0x070(%2); cache %4, 0x070(%3); \n\t" \ - ".set reorder" \ - : \ - : "r" (va1), "r" (va2), "r" (va3), "r" (va4), "i" (op) \ - : "memory"); \ -} while (/*CONSTCOND*/0) - -/* - * cache_r4k_op_8lines_32_4way: - * - * Perform the specified cache operation on 8 32-byte - * cache lines, 4-ways. - */ -#define cache_r4k_op_8lines_32_4way(va1, va2, va3, va4, op) \ -do { \ - __asm __volatile( \ - ".set noreorder \n\t" \ - "cache %4, 0x000(%0); cache %4, 0x000(%1); \n\t" \ - "cache %4, 0x000(%2); cache %4, 0x000(%3); \n\t" \ - "cache %4, 0x020(%0); cache %4, 0x020(%1); \n\t" \ - "cache %4, 0x020(%2); cache %4, 0x020(%3); \n\t" \ - "cache %4, 0x040(%0); cache %4, 0x040(%1); \n\t" \ - "cache %4, 0x040(%2); cache %4, 0x040(%3); \n\t" \ - "cache %4, 0x060(%0); cache %4, 0x060(%1); \n\t" \ - "cache %4, 0x060(%2); cache %4, 0x060(%3); \n\t" \ - "cache %4, 0x080(%0); cache %4, 0x080(%1); \n\t" \ - "cache %4, 0x080(%2); cache %4, 0x080(%3); \n\t" \ - "cache %4, 0x0a0(%0); cache %4, 0x0a0(%1); \n\t" \ - "cache %4, 0x0a0(%2); cache %4, 0x0a0(%3); \n\t" \ - "cache %4, 0x0c0(%0); cache %4, 0x0c0(%1); \n\t" \ - "cache %4, 0x0c0(%2); cache %4, 0x0c0(%3); \n\t" \ - "cache %4, 0x0e0(%0); cache %4, 0x0e0(%1); \n\t" \ - "cache %4, 0x0e0(%2); cache %4, 0x0e0(%3); \n\t" \ - ".set reorder" \ - : \ - : "r" (va1), "r" (va2), "r" (va3), "r" (va4), "i" (op) \ - : "memory"); \ -} while (/*CONSTCOND*/0) - -void r4k_icache_sync_all_16(void); -void r4k_icache_sync_range_16(vm_paddr_t, vm_size_t); -void r4k_icache_sync_range_index_16(vm_paddr_t, vm_size_t); - -void r4k_icache_sync_all_32(void); -void r4k_icache_sync_range_32(vm_paddr_t, vm_size_t); -void r4k_icache_sync_range_index_32(vm_paddr_t, vm_size_t); - -void r4k_pdcache_wbinv_all_16(void); -void r4k_pdcache_wbinv_range_16(vm_paddr_t, vm_size_t); -void r4k_pdcache_wbinv_range_index_16(vm_paddr_t, vm_size_t); - -void r4k_pdcache_inv_range_16(vm_paddr_t, vm_size_t); -void r4k_pdcache_wb_range_16(vm_paddr_t, vm_size_t); - -void r4k_pdcache_wbinv_all_32(void); -void r4k_pdcache_wbinv_range_32(vm_paddr_t, vm_size_t); -void r4k_pdcache_wbinv_range_index_32(vm_paddr_t, vm_size_t); - -void r4k_pdcache_inv_range_32(vm_paddr_t, vm_size_t); -void r4k_pdcache_wb_range_32(vm_paddr_t, vm_size_t); - -void r4k_sdcache_wbinv_all_32(void); -void r4k_sdcache_wbinv_range_32(vm_paddr_t, vm_size_t); -void r4k_sdcache_wbinv_range_index_32(vm_paddr_t, vm_size_t); - -void r4k_sdcache_inv_range_32(vm_paddr_t, vm_size_t); -void r4k_sdcache_wb_range_32(vm_paddr_t, vm_size_t); - -void r4k_sdcache_wbinv_all_128(void); -void r4k_sdcache_wbinv_range_128(vm_paddr_t, vm_size_t); -void r4k_sdcache_wbinv_range_index_128(vm_paddr_t, vm_size_t); - -void r4k_sdcache_inv_range_128(vm_paddr_t, vm_size_t); -void r4k_sdcache_wb_range_128(vm_paddr_t, vm_size_t); - -void r4k_sdcache_wbinv_all_generic(void); -void r4k_sdcache_wbinv_range_generic(vm_paddr_t, vm_size_t); -void r4k_sdcache_wbinv_range_index_generic(vm_paddr_t, vm_size_t); - -void r4k_sdcache_inv_range_generic(vm_paddr_t, vm_size_t); -void r4k_sdcache_wb_range_generic(vm_paddr_t, vm_size_t); - -#endif /* !LOCORE */ diff --git a/sys/mips/include/cca.h b/sys/mips/include/cca.h deleted file mode 100644 index 92cab734e9a..00000000000 --- a/sys/mips/include/cca.h +++ /dev/null @@ -1,151 +0,0 @@ -/* $NetBSD: cpuregs.h,v 1.70 2006/05/15 02:26:54 simonb Exp $ */ - -/* - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell and Rick Macklem. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)machConst.h 8.1 (Berkeley) 6/10/93 - * - * machConst.h -- - * - * Machine dependent constants. - * - * Copyright (C) 1989 Digital Equipment Corporation. - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose and without fee is hereby granted, - * provided that the above copyright notice appears in all copies. - * Digital Equipment Corporation makes no representations about the - * suitability of this software for any purpose. It is provided "as is" - * without express or implied warranty. - * - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machConst.h, - * v 9.2 89/10/21 15:55:22 jhh Exp SPRITE (DECWRL) - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAddrs.h, - * v 1.2 89/08/15 18:28:21 rab Exp SPRITE (DECWRL) - * from: Header: /sprite/src/kernel/vm/ds3100.md/RCS/vmPmaxConst.h, - * v 9.1 89/09/18 17:33:00 shirriff Exp SPRITE (DECWRL) - */ - -#ifndef _MIPS_CCA_H_ -#define _MIPS_CCA_H_ - -/* - * Cache Coherency Attributes: - * UC: Uncached. - * UA: Uncached accelerated. - * C: Cacheable, coherency unspecified. - * CNC: Cacheable non-coherent. - * CC: Cacheable coherent. - * CCS: Cacheable coherent, shared read. - * CCE: Cacheable coherent, exclusive read. - * CCEW: Cacheable coherent, exclusive write. - * CCUOW: Cacheable coherent, update on write. - * - * Note that some bits vary in meaning across implementations (and that the - * listing here is no doubt incomplete) and that the optimal cached mode varies - * between implementations. 0x02 is required to be UC and 0x03 is required to - * be a least C. - * - * We define the following logical bits: - * UNCACHED: - * The optimal uncached mode for the target CPU type. This must - * be suitable for use in accessing memory-mapped devices. - * CACHED: The optional cached mode for the target CPU type. - */ - -#define MIPS_CCA_UC 0x02 /* Uncached. */ -#define MIPS_CCA_C 0x03 /* Cacheable, coherency unspecified. */ - -#if defined(CPU_R4000) || defined(CPU_R10000) -#define MIPS_CCA_CNC 0x03 -#define MIPS_CCA_CCE 0x04 -#define MIPS_CCA_CCEW 0x05 - -#ifdef CPU_R4000 -#define MIPS_CCA_CCUOW 0x06 -#endif - -#ifdef CPU_R10000 -#define MIPS_CCA_UA 0x07 -#endif - -#define MIPS_CCA_CACHED MIPS_CCA_CCEW -#endif /* defined(CPU_R4000) || defined(CPU_R10000) */ - -#if defined(CPU_SB1) -#define MIPS_CCA_CC 0x05 /* Cacheable Coherent. */ -#endif - -#if defined(CPU_MIPS74K) -#define MIPS_CCA_UNCACHED 0x02 -#define MIPS_CCA_CACHED 0x03 -#endif - -/* - * 1004K and 1074K cores, as well as interAptiv and proAptiv cores, support - * Cacheable Coherent CCAs 0x04 and 0x05, as well as Cacheable non-Coherent - * CCA 0x03 and Uncached Accelerated CCA 0x07 - */ -#if defined(CPU_MIPS1004K) || defined(CPU_MIPS1074K) || \ - defined(CPU_INTERAPTIV) || defined(CPU_PROAPTIV) -#define MIPS_CCA_CNC 0x03 -#define MIPS_CCA_CCE 0x04 -#define MIPS_CCA_CCS 0x05 -#define MIPS_CCA_UA 0x07 - -/* We use shared read CCA for CACHED CCA */ -#define MIPS_CCA_CACHED MIPS_CCA_CCS -#endif - -#if defined(CPU_XBURST) -#define MIPS_CCA_UA 0x01 -#define MIPS_CCA_WC MIPS_CCA_UA -#endif - -#ifndef MIPS_CCA_UNCACHED -#define MIPS_CCA_UNCACHED MIPS_CCA_UC -#endif - -/* - * If we don't know which cached mode to use and there is a cache coherent - * mode, use it. If there is not a cache coherent mode, use the required - * cacheable mode. - */ -#ifndef MIPS_CCA_CACHED -#ifdef MIPS_CCA_CC -#define MIPS_CCA_CACHED MIPS_CCA_CC -#else -#define MIPS_CCA_CACHED MIPS_CCA_C -#endif -#endif - -#endif diff --git a/sys/mips/include/cdefs.h b/sys/mips/include/cdefs.h deleted file mode 100644 index 50fe58b45d2..00000000000 --- a/sys/mips/include/cdefs.h +++ /dev/null @@ -1,76 +0,0 @@ -/* $NetBSD: cdefs.h,v 1.12 2006/08/27 19:04:30 matt Exp $ */ - -/*- - * SPDX-License-Identifier: MIT-CMU - * - * Copyright (c) 1995 Carnegie-Mellon University. - * All rights reserved. - * - * Author: Chris G. Demetriou - * - * Permission to use, copy, modify and distribute this software and - * its documentation is hereby granted, provided that both the copyright - * notice and this permission notice appear in all copies of the - * software, derivative works or modified versions, and any portions - * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND - * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * - * Carnegie Mellon requests users of this software to return to - * - * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU - * School of Computer Science - * Carnegie Mellon University - * Pittsburgh PA 15213-3890 - * - * any improvements or extensions that they make and grant Carnegie the - * rights to redistribute these changes. - */ - -#ifndef _MIPS_CDEFS_H_ -#define _MIPS_CDEFS_H_ - -/* - * These are depreciated. Use __mips_{o32,o64,n32,n64} instead. - */ -/* MIPS Subprogram Interface Model */ -#define _MIPS_SIM_ABIX32 4 /* 64 bit safe, ILP32 o32 model */ -#define _MIPS_SIM_ABI64 3 -#define _MIPS_SIM_NABI32 2 /* 64bit safe, ILP32 n32 model */ -#define _MIPS_SIM_ABI32 1 - -#define _MIPS_BSD_API_LP32 _MIPS_SIM_ABI32 -#define _MIPS_BSD_API_LP32_64CLEAN _MIPS_SIM_ABIX32 -#define _MIPS_BSD_API_LP64 _MIPS_SIM_ABI64 - -#define _MIPS_BSD_API_O32 _MIPS_SIM_ABI32 -#define _MIPS_BSD_API_O64 _MIPS_SIM_ABIX32 -#define _MIPS_BSD_API_N32 _MIPS_SIM_NABI32 -#define _MIPS_BSD_API_N64 _MIPS_SIM_ABI64 - -#define _MIPS_SIM_NEWABI_P(abi) ((abi) == _MIPS_SIM_NABI32 || \ - (abi) == _MIPS_SIM_ABI64) - -#define _MIPS_SIM_LP64_P(abi) ((abi) == _MIPS_SIM_ABIX32 || \ - (abi) == _MIPS_SIM_ABI64) - -#if defined(__mips_n64) -#define _MIPS_BSD_API _MIPS_BSD_API_N64 -#elif defined(__mips_n32) -#define _MIPS_BSD_API _MIPS_BSD_API_N32 -#elif defined(__mips_o64) -#define _MIPS_BSD_API _MIPS_BSD_API_O64 -#else -#define _MIPS_BSD_API _MIPS_BSD_API_O32 -#endif - -#define _MIPS_ISA_MIPS1 1 -#define _MIPS_ISA_MIPS2 2 -#define _MIPS_ISA_MIPS3 3 -#define _MIPS_ISA_MIPS4 4 -#define _MIPS_ISA_MIPS32 5 -#define _MIPS_ISA_MIPS64 6 - -#endif /* !_MIPS_CDEFS_H_ */ diff --git a/sys/mips/include/clock.h b/sys/mips/include/clock.h deleted file mode 100644 index 68296d05903..00000000000 --- a/sys/mips/include/clock.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Garrett Wollman, September 1994. - * This file is in the public domain. - * Kernel interface to machine-dependent clock driver. - * - * JNPR: clock.h,v 1.6.2.1 2007/08/29 09:36:05 girish - * from: src/sys/alpha/include/clock.h,v 1.5 1999/12/29 04:27:55 peter - */ - -#ifndef _MACHINE_CLOCK_H_ -#define _MACHINE_CLOCK_H_ - -#include - -#ifdef _KERNEL - -extern int cpu_clock; - -#define wall_cmos_clock 0 -#define adjkerntz 0 - -/* - * Default is to assume a CPU pipeline clock of 100Mhz, and - * that CP0_COUNT increments every 2 cycles. - */ -#define MIPS_DEFAULT_HZ (100 * 1000 * 1000) - -void mips_timer_early_init(uint64_t clock_hz); -void mips_timer_init_params(uint64_t, int); - -extern uint64_t counter_freq; -extern int clocks_running; - -/* - * The 'platform_timecounter' pointer may be used to register a - * platform-specific timecounter. - * - * A default timecounter based on the CP0 COUNT register is always registered. - */ -extern struct timecounter *platform_timecounter; - -#endif - -#endif /* !_MACHINE_CLOCK_H_ */ diff --git a/sys/mips/include/counter.h b/sys/mips/include/counter.h deleted file mode 100644 index 0d14ad29423..00000000000 --- a/sys/mips/include/counter.h +++ /dev/null @@ -1,96 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012 Konstantin Belousov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef __MACHINE_COUNTER_H__ -#define __MACHINE_COUNTER_H__ - -#include -#ifdef INVARIANTS -#include -#endif - -#define EARLY_COUNTER &((struct pcpu *)pcpu_space)->pc_early_dummy_counter - -#define counter_enter() critical_enter() -#define counter_exit() critical_exit() - -#ifdef IN_SUBR_COUNTER_C -/* XXXKIB non-atomic 64bit read on 32bit */ -static inline uint64_t -counter_u64_read_one(uint64_t *p, int cpu) -{ - - return (*(uint64_t *)((char *)p + UMA_PCPU_ALLOC_SIZE * cpu)); -} - -static inline uint64_t -counter_u64_fetch_inline(uint64_t *p) -{ - uint64_t r; - int i; - - r = 0; - for (i = 0; i < mp_ncpus; i++) - r += counter_u64_read_one((uint64_t *)p, i); - - return (r); -} - -/* XXXKIB non-atomic 64bit store on 32bit, might interrupt increment */ -static void -counter_u64_zero_one_cpu(void *arg) -{ - - *((uint64_t *)((char *)arg + UMA_PCPU_ALLOC_SIZE * - PCPU_GET(cpuid))) = 0; -} - -static inline void -counter_u64_zero_inline(counter_u64_t c) -{ - - smp_rendezvous(smp_no_rendezvous_barrier, counter_u64_zero_one_cpu, - smp_no_rendezvous_barrier, c); -} -#endif - -#define counter_u64_add_protected(c, inc) do { \ - CRITICAL_ASSERT(curthread); \ - *(uint64_t *)zpcpu_get(c) += (inc); \ -} while (0) - -static inline void -counter_u64_add(counter_u64_t c, int64_t inc) -{ - - counter_enter(); - counter_u64_add_protected(c, inc); - counter_exit(); -} - -#endif /* ! __MACHINE_COUNTER_H__ */ diff --git a/sys/mips/include/cpu.h b/sys/mips/include/cpu.h deleted file mode 100644 index 264c27982f3..00000000000 --- a/sys/mips/include/cpu.h +++ /dev/null @@ -1,90 +0,0 @@ -/* $OpenBSD: cpu.h,v 1.4 1998/09/15 10:50:12 pefo Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell and Rick Macklem. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Copyright (C) 1989 Digital Equipment Corporation. - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose and without fee is hereby granted, - * provided that the above copyright notice appears in all copies. - * Digital Equipment Corporation makes no representations about the - * suitability of this software for any purpose. It is provided "as is" - * without express or implied warranty. - * - * from: @(#)cpu.h 8.4 (Berkeley) 1/4/94 - * JNPR: cpu.h,v 1.9.2.2 2007/09/10 08:23:46 girish - */ - -#ifndef _MACHINE_CPU_H_ -#define _MACHINE_CPU_H_ - -#include - -/* BEGIN: these are going away */ - -#define soft_int_mask(softintr) (1 << ((softintr) + 8)) -#define hard_int_mask(hardintr) (1 << ((hardintr) + 10)) - -/* END: These are going away */ - -/* - * Exported definitions unique to mips cpu support. - */ - -#ifndef _LOCORE -#include -#include - -#define TRAPF_USERMODE(framep) (((framep)->sr & MIPS_SR_KSU_USER) != 0) -#define TRAPF_PC(framep) ((framep)->pc) -#define cpu_getstack(td) ((td)->td_frame->sp) -#define cpu_setstack(td, nsp) ((td)->td_frame->sp = (nsp)) -#define cpu_spinwait() /* nothing */ -#define cpu_lock_delay() DELAY(1) - -/* - * A machine-independent interface to the CPU's counter. - */ -#define get_cyclecount() mips_rd_count() -#endif /* !_LOCORE */ - -#if defined(_KERNEL) && !defined(_LOCORE) - -extern char btext[]; -extern char etext[]; - -void cpu_halt(void); -void cpu_reset(void); - -#endif /* _KERNEL */ -#endif /* !_MACHINE_CPU_H_ */ diff --git a/sys/mips/include/cpufunc.h b/sys/mips/include/cpufunc.h deleted file mode 100644 index c7dd402f333..00000000000 --- a/sys/mips/include/cpufunc.h +++ /dev/null @@ -1,389 +0,0 @@ -/* $OpenBSD: pio.h,v 1.2 1998/09/15 10:50:12 pefo Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause AND BSD-4-Clause - * - * Copyright (c) 2002-2004 Juli Mallett. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* - * Copyright (c) 1995-1999 Per Fogelstrom. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Per Fogelstrom. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * JNPR: cpufunc.h,v 1.5 2007/08/09 11:23:32 katta - */ - -#ifndef _MACHINE_CPUFUNC_H_ -#define _MACHINE_CPUFUNC_H_ - -#include -#include - -/* - * These functions are required by user-land atomi ops - */ - -static __inline void -mips_barrier(void) -{ -#if defined(CPU_CNMIPS) || defined(CPU_RMI) || defined(CPU_NLM) - __compiler_membar(); -#else - __asm __volatile (".set noreorder\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - ".set reorder\n\t" - : : : "memory"); -#endif -} - -static __inline void -mips_cp0_sync(void) -{ - __asm __volatile (__XSTRING(COP0_SYNC)); -} - -static __inline void -mips_wbflush(void) -{ -#if defined(CPU_CNMIPS) - __asm __volatile (".set noreorder\n\t" - "syncw\n\t" - ".set reorder\n" - : : : "memory"); -#else - __asm __volatile ("sync" : : : "memory"); - mips_barrier(); -#endif -} - -static __inline void -breakpoint(void) -{ - __asm __volatile ("break"); -} - -#ifdef _KERNEL -/* - * XXX - * It would be nice to add variants that read/write register_t, to avoid some - * ABI checks. - */ -#if defined(__mips_n32) || defined(__mips_n64) -#define MIPS_RW64_COP0(n,r) \ -static __inline uint64_t \ -mips_rd_ ## n (void) \ -{ \ - uint64_t v0; \ - __asm __volatile ("dmfc0 %[v0], $"__XSTRING(r)";" \ - : [v0] "=&r"(v0)); \ - mips_barrier(); \ - return (v0); \ -} \ -static __inline void \ -mips_wr_ ## n (uint64_t a0) \ -{ \ - __asm __volatile ("dmtc0 %[a0], $"__XSTRING(r)";" \ - __XSTRING(COP0_SYNC)";" \ - "nop;" \ - "nop;" \ - : \ - : [a0] "r"(a0)); \ - mips_barrier(); \ -} struct __hack - -#define MIPS_RW64_COP0_SEL(n,r,s) \ -static __inline uint64_t \ -mips_rd_ ## n(void) \ -{ \ - uint64_t v0; \ - __asm __volatile ("dmfc0 %[v0], $"__XSTRING(r)", "__XSTRING(s)";" \ - : [v0] "=&r"(v0)); \ - mips_barrier(); \ - return (v0); \ -} \ -static __inline void \ -mips_wr_ ## n(uint64_t a0) \ -{ \ - __asm __volatile ("dmtc0 %[a0], $"__XSTRING(r)", "__XSTRING(s)";" \ - __XSTRING(COP0_SYNC)";" \ - : \ - : [a0] "r"(a0)); \ - mips_barrier(); \ -} struct __hack - -#if defined(__mips_n64) -MIPS_RW64_COP0(excpc, MIPS_COP_0_EXC_PC); -MIPS_RW64_COP0(entryhi, MIPS_COP_0_TLB_HI); -MIPS_RW64_COP0(pagemask, MIPS_COP_0_TLB_PG_MASK); -MIPS_RW64_COP0_SEL(userlocal, MIPS_COP_0_USERLOCAL, 2); -#ifdef CPU_CNMIPS -MIPS_RW64_COP0_SEL(cvmcount, MIPS_COP_0_COUNT, 6); -MIPS_RW64_COP0_SEL(cvmctl, MIPS_COP_0_COUNT, 7); -MIPS_RW64_COP0_SEL(cvmmemctl, MIPS_COP_0_COMPARE, 7); -MIPS_RW64_COP0_SEL(icache_err, MIPS_COP_0_CACHE_ERR, 0); -MIPS_RW64_COP0_SEL(dcache_err, MIPS_COP_0_CACHE_ERR, 1); -#endif -#endif -#if defined(__mips_n64) || defined(__mips_n32) /* PHYSADDR_64_BIT */ -MIPS_RW64_COP0(entrylo0, MIPS_COP_0_TLB_LO0); -MIPS_RW64_COP0(entrylo1, MIPS_COP_0_TLB_LO1); -#endif -MIPS_RW64_COP0(xcontext, MIPS_COP_0_TLB_XCONTEXT); - -#undef MIPS_RW64_COP0 -#undef MIPS_RW64_COP0_SEL -#endif - -#define MIPS_RW32_COP0(n,r) \ -static __inline uint32_t \ -mips_rd_ ## n (void) \ -{ \ - uint32_t v0; \ - __asm __volatile ("mfc0 %[v0], $"__XSTRING(r)";" \ - : [v0] "=&r"(v0)); \ - mips_barrier(); \ - return (v0); \ -} \ -static __inline void \ -mips_wr_ ## n (uint32_t a0) \ -{ \ - __asm __volatile ("mtc0 %[a0], $"__XSTRING(r)";" \ - __XSTRING(COP0_SYNC)";" \ - "nop;" \ - "nop;" \ - : \ - : [a0] "r"(a0)); \ - mips_barrier(); \ -} struct __hack - -#define MIPS_RW32_COP0_SEL(n,r,s) \ -static __inline uint32_t \ -mips_rd_ ## n(void) \ -{ \ - uint32_t v0; \ - __asm __volatile ("mfc0 %[v0], $"__XSTRING(r)", "__XSTRING(s)";" \ - : [v0] "=&r"(v0)); \ - mips_barrier(); \ - return (v0); \ -} \ -static __inline void \ -mips_wr_ ## n(uint32_t a0) \ -{ \ - __asm __volatile ("mtc0 %[a0], $"__XSTRING(r)", "__XSTRING(s)";" \ - __XSTRING(COP0_SYNC)";" \ - "nop;" \ - "nop;" \ - : \ - : [a0] "r"(a0)); \ - mips_barrier(); \ -} struct __hack - -#ifdef CPU_CNMIPS -static __inline void mips_sync_icache (void) -{ - __asm __volatile ( - ".set push\n" - ".set mips64\n" - ".word 0x041f0000\n" /* xxx ICACHE */ - "nop\n" - ".set pop\n" - : : ); -} -#endif - -MIPS_RW32_COP0(compare, MIPS_COP_0_COMPARE); -MIPS_RW32_COP0(config, MIPS_COP_0_CONFIG); -MIPS_RW32_COP0_SEL(config1, MIPS_COP_0_CONFIG, 1); -MIPS_RW32_COP0_SEL(config2, MIPS_COP_0_CONFIG, 2); -MIPS_RW32_COP0_SEL(config3, MIPS_COP_0_CONFIG, 3); -#ifdef CPU_CNMIPS -MIPS_RW32_COP0_SEL(config4, MIPS_COP_0_CONFIG, 4); -#endif -#ifdef BERI_LARGE_TLB -MIPS_RW32_COP0_SEL(config5, MIPS_COP_0_CONFIG, 5); -#endif -#if defined(CPU_NLM) || defined(BERI_LARGE_TLB) -MIPS_RW32_COP0_SEL(config6, MIPS_COP_0_CONFIG, 6); -#endif -#if defined(CPU_NLM) || defined(CPU_MIPS1004K) || defined (CPU_MIPS74K) || \ - defined(CPU_MIPS24K) -MIPS_RW32_COP0_SEL(config7, MIPS_COP_0_CONFIG, 7); -#endif -MIPS_RW32_COP0(count, MIPS_COP_0_COUNT); -MIPS_RW32_COP0(index, MIPS_COP_0_TLB_INDEX); -MIPS_RW32_COP0(wired, MIPS_COP_0_TLB_WIRED); -MIPS_RW32_COP0(cause, MIPS_COP_0_CAUSE); -#if !defined(__mips_n64) -MIPS_RW32_COP0(excpc, MIPS_COP_0_EXC_PC); -#endif -MIPS_RW32_COP0(status, MIPS_COP_0_STATUS); -MIPS_RW32_COP0_SEL(cmgcrbase, 15, 3); - -/* XXX: Some of these registers are specific to MIPS32. */ -#if !defined(__mips_n64) -MIPS_RW32_COP0(entryhi, MIPS_COP_0_TLB_HI); -MIPS_RW32_COP0(pagemask, MIPS_COP_0_TLB_PG_MASK); -MIPS_RW32_COP0_SEL(userlocal, MIPS_COP_0_USERLOCAL, 2); -#endif -#ifdef CPU_NLM -MIPS_RW32_COP0_SEL(pagegrain, MIPS_COP_0_TLB_PG_MASK, 1); -#endif -#if !defined(__mips_n64) && !defined(__mips_n32) /* !PHYSADDR_64_BIT */ -MIPS_RW32_COP0(entrylo0, MIPS_COP_0_TLB_LO0); -MIPS_RW32_COP0(entrylo1, MIPS_COP_0_TLB_LO1); -#endif -MIPS_RW32_COP0(prid, MIPS_COP_0_PRID); -MIPS_RW32_COP0_SEL(cinfo, MIPS_COP_0_PRID, 6); -MIPS_RW32_COP0_SEL(tinfo, MIPS_COP_0_PRID, 7); -/* XXX 64-bit? */ -MIPS_RW32_COP0_SEL(ebase, MIPS_COP_0_PRID, 1); - -#if defined(CPU_MIPS24K) || defined(CPU_MIPS34K) || \ - defined(CPU_MIPS74K) || defined(CPU_MIPS1004K) || \ - defined(CPU_MIPS1074K) || defined(CPU_INTERAPTIV) || \ - defined(CPU_PROAPTIV) -/* MIPS32/64 r2 intctl */ -MIPS_RW32_COP0_SEL(intctl, MIPS_COP_0_INTCTL, 1); -#endif - -#ifdef CPU_XBURST -MIPS_RW32_COP0_SEL(xburst_mbox0, MIPS_COP_0_XBURST_MBOX, 0); -MIPS_RW32_COP0_SEL(xburst_mbox1, MIPS_COP_0_XBURST_MBOX, 1); -MIPS_RW32_COP0_SEL(xburst_core_ctl, MIPS_COP_0_XBURST_C12, 2); -MIPS_RW32_COP0_SEL(xburst_core_sts, MIPS_COP_0_XBURST_C12, 3); -MIPS_RW32_COP0_SEL(xburst_reim, MIPS_COP_0_XBURST_C12, 4); -#endif -MIPS_RW32_COP0(watchlo, MIPS_COP_0_WATCH_LO); -MIPS_RW32_COP0_SEL(watchlo1, MIPS_COP_0_WATCH_LO, 1); -MIPS_RW32_COP0_SEL(watchlo2, MIPS_COP_0_WATCH_LO, 2); -MIPS_RW32_COP0_SEL(watchlo3, MIPS_COP_0_WATCH_LO, 3); -MIPS_RW32_COP0(watchhi, MIPS_COP_0_WATCH_HI); -MIPS_RW32_COP0_SEL(watchhi1, MIPS_COP_0_WATCH_HI, 1); -MIPS_RW32_COP0_SEL(watchhi2, MIPS_COP_0_WATCH_HI, 2); -MIPS_RW32_COP0_SEL(watchhi3, MIPS_COP_0_WATCH_HI, 3); - -MIPS_RW32_COP0_SEL(perfcnt0, MIPS_COP_0_PERFCNT, 0); -MIPS_RW32_COP0_SEL(perfcnt1, MIPS_COP_0_PERFCNT, 1); -MIPS_RW32_COP0_SEL(perfcnt2, MIPS_COP_0_PERFCNT, 2); -MIPS_RW32_COP0_SEL(perfcnt3, MIPS_COP_0_PERFCNT, 3); -MIPS_RW32_COP0(hwrena, MIPS_COP_0_HWRENA); - -#undef MIPS_RW32_COP0 -#undef MIPS_RW32_COP0_SEL - -static __inline register_t -intr_disable(void) -{ - register_t s; - - s = mips_rd_status(); - mips_wr_status(s & ~MIPS_SR_INT_IE); - - return (s & MIPS_SR_INT_IE); -} - -static __inline register_t -intr_enable(void) -{ - register_t s; - - s = mips_rd_status(); - mips_wr_status(s | MIPS_SR_INT_IE); - - return (s); -} - -static __inline void -intr_restore(register_t ie) -{ - if (ie == MIPS_SR_INT_IE) { - intr_enable(); - } -} - -static __inline uint32_t -set_intr_mask(uint32_t mask) -{ - uint32_t ostatus; - - ostatus = mips_rd_status(); - mask = (ostatus & ~MIPS_SR_INT_MASK) | (mask & MIPS_SR_INT_MASK); - mips_wr_status(mask); - return (ostatus); -} - -static __inline uint32_t -get_intr_mask(void) -{ - - return (mips_rd_status() & MIPS_SR_INT_MASK); -} - -#endif /* _KERNEL */ - -#define readb(va) (*(volatile uint8_t *) (va)) -#define readw(va) (*(volatile uint16_t *) (va)) -#define readl(va) (*(volatile uint32_t *) (va)) -#if !defined(__mips_o32) -#define readq(a) (*(volatile uint64_t *)(a)) -#endif - -#define writeb(va, d) (*(volatile uint8_t *) (va) = (d)) -#define writew(va, d) (*(volatile uint16_t *) (va) = (d)) -#define writel(va, d) (*(volatile uint32_t *) (va) = (d)) -#if !defined(__mips_o32) -#define writeq(va, d) (*(volatile uint64_t *) (va) = (d)) -#endif - -#endif /* !_MACHINE_CPUFUNC_H_ */ diff --git a/sys/mips/include/cpuinfo.h b/sys/mips/include/cpuinfo.h deleted file mode 100644 index b4d19450475..00000000000 --- a/sys/mips/include/cpuinfo.h +++ /dev/null @@ -1,85 +0,0 @@ -/* $NetBSD: cpu.h,v 1.70 2003/01/17 23:36:08 thorpej Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell and Rick Macklem. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * @(#)cpu.h 8.4 (Berkeley) 1/4/94 - */ - -#ifndef _CPUINFO_H_ -#define _CPUINFO_H_ - -/* - * Exported definitions unique to NetBSD/mips cpu support. - */ - -#ifdef _KERNEL -#ifndef LOCORE - -struct mips_cpuinfo { - u_int8_t cpu_vendor; - u_int8_t cpu_rev; - u_int8_t cpu_impl; - u_int8_t tlb_type; - u_int32_t tlb_pgmask; - u_int16_t tlb_nentries; - u_int8_t icache_virtual; - boolean_t cache_coherent_dma; - boolean_t userlocal_reg; - struct { - u_int32_t ic_size; - u_int8_t ic_linesize; - u_int8_t ic_nways; - u_int16_t ic_nsets; - u_int32_t dc_size; - u_int8_t dc_linesize; - u_int8_t dc_nways; - u_int16_t dc_nsets; - } l1; - struct { - u_int32_t dc_size; - u_int8_t dc_linesize; - u_int8_t dc_nways; - u_int16_t dc_nsets; - } l2; - u_int32_t fpu_id; -}; - -extern struct mips_cpuinfo cpuinfo; - -#endif /* !LOCORE */ -#endif /* _KERNEL */ -#endif /* _CPUINFO_H_ */ diff --git a/sys/mips/include/cpuregs.h b/sys/mips/include/cpuregs.h deleted file mode 100644 index c929ad56411..00000000000 --- a/sys/mips/include/cpuregs.h +++ /dev/null @@ -1,641 +0,0 @@ -/* $NetBSD: cpuregs.h,v 1.70 2006/05/15 02:26:54 simonb Exp $ */ - -/* - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell and Rick Macklem. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)machConst.h 8.1 (Berkeley) 6/10/93 - * - * machConst.h -- - * - * Machine dependent constants. - * - * Copyright (C) 1989 Digital Equipment Corporation. - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose and without fee is hereby granted, - * provided that the above copyright notice appears in all copies. - * Digital Equipment Corporation makes no representations about the - * suitability of this software for any purpose. It is provided "as is" - * without express or implied warranty. - * - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machConst.h, - * v 9.2 89/10/21 15:55:22 jhh Exp SPRITE (DECWRL) - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAddrs.h, - * v 1.2 89/08/15 18:28:21 rab Exp SPRITE (DECWRL) - * from: Header: /sprite/src/kernel/vm/ds3100.md/RCS/vmPmaxConst.h, - * v 9.1 89/09/18 17:33:00 shirriff Exp SPRITE (DECWRL) - */ - -#ifndef _MIPS_CPUREGS_H_ -#define _MIPS_CPUREGS_H_ - -#ifndef _KVM_MINIDUMP -#include -#endif - -/* - * Address space. - * 32-bit mips CPUS partition their 32-bit address space into four segments: - * - * kuseg 0x00000000 - 0x7fffffff User virtual mem, mapped - * kseg0 0x80000000 - 0x9fffffff Physical memory, cached, unmapped - * kseg1 0xa0000000 - 0xbfffffff Physical memory, uncached, unmapped - * kseg2 0xc0000000 - 0xffffffff kernel-virtual, mapped - * - * Caching of mapped addresses is controlled by bits in the TLB entry. - */ - -#define MIPS_KSEG0_LARGEST_PHYS (0x20000000) -#define MIPS_KSEG0_PHYS_MASK (0x1fffffff) -#define MIPS_XKPHYS_LARGEST_PHYS (0x10000000000) /* 40 bit PA */ -#define MIPS_XKPHYS_PHYS_MASK (0x0ffffffffff) - -#ifndef LOCORE -#define MIPS_KUSEG_START 0x00000000 -#define MIPS_KSEG0_START ((intptr_t)(int32_t)0x80000000) -#define MIPS_KSEG0_END ((intptr_t)(int32_t)0x9fffffff) -#define MIPS_KSEG1_START ((intptr_t)(int32_t)0xa0000000) -#define MIPS_KSEG1_END ((intptr_t)(int32_t)0xbfffffff) -#define MIPS_KSSEG_START ((intptr_t)(int32_t)0xc0000000) -#define MIPS_KSSEG_END ((intptr_t)(int32_t)0xdfffffff) -#define MIPS_KSEG3_START ((intptr_t)(int32_t)0xe0000000) -#define MIPS_KSEG3_END ((intptr_t)(int32_t)0xffffffff) -#define MIPS_KSEG2_START MIPS_KSSEG_START -#define MIPS_KSEG2_END MIPS_KSSEG_END -#endif - -#define MIPS_PHYS_TO_KSEG0(x) ((uintptr_t)(x) | MIPS_KSEG0_START) -#define MIPS_PHYS_TO_KSEG1(x) ((uintptr_t)(x) | MIPS_KSEG1_START) -#define MIPS_KSEG0_TO_PHYS(x) ((uintptr_t)(x) & MIPS_KSEG0_PHYS_MASK) -#define MIPS_KSEG1_TO_PHYS(x) ((uintptr_t)(x) & MIPS_KSEG0_PHYS_MASK) - -#define MIPS_IS_KSEG0_ADDR(x) \ - (((vm_offset_t)(x) >= MIPS_KSEG0_START) && \ - ((vm_offset_t)(x) <= MIPS_KSEG0_END)) -#define MIPS_IS_KSEG1_ADDR(x) \ - (((vm_offset_t)(x) >= MIPS_KSEG1_START) && \ - ((vm_offset_t)(x) <= MIPS_KSEG1_END)) -#define MIPS_IS_VALID_PTR(x) (MIPS_IS_KSEG0_ADDR(x) || \ - MIPS_IS_KSEG1_ADDR(x)) - -#define MIPS_PHYS_TO_XKPHYS(cca,x) \ - ((0x2ULL << 62) | ((unsigned long long)(cca) << 59) | (x)) -#define MIPS_PHYS_TO_XKPHYS_CACHED(x) \ - ((0x2ULL << 62) | ((unsigned long long)(MIPS_CCA_CACHED) << 59) | (x)) -#define MIPS_PHYS_TO_XKPHYS_UNCACHED(x) \ - ((0x2ULL << 62) | ((unsigned long long)(MIPS_CCA_UNCACHED) << 59) | (x)) - -#define MIPS_XKPHYS_TO_PHYS(x) ((uintptr_t)(x) & MIPS_XKPHYS_PHYS_MASK) - -#define MIPS_XKPHYS_START 0x8000000000000000 -#define MIPS_XKPHYS_END 0xbfffffffffffffff -#define MIPS_XUSEG_START 0x0000000000000000 -#define MIPS_XUSEG_END 0x0000010000000000 -#define MIPS_XKSEG_START 0xc000000000000000 -#define MIPS_XKSEG_END 0xc00000ff80000000 -#define MIPS_XKSEG_COMPAT32_START 0xffffffff80000000 -#define MIPS_XKSEG_COMPAT32_END 0xffffffffffffffff -#define MIPS_XKSEG_TO_COMPAT32(va) ((va) & 0xffffffff) - -#ifdef __mips_n64 -#define MIPS_DIRECT_MAPPABLE(pa) 1 -#define MIPS_PHYS_TO_DIRECT(pa) MIPS_PHYS_TO_XKPHYS_CACHED(pa) -#define MIPS_PHYS_TO_DIRECT_UNCACHED(pa) MIPS_PHYS_TO_XKPHYS_UNCACHED(pa) -#define MIPS_DIRECT_TO_PHYS(va) MIPS_XKPHYS_TO_PHYS(va) -#else -#define MIPS_DIRECT_MAPPABLE(pa) ((pa) < MIPS_KSEG0_LARGEST_PHYS) -#define MIPS_PHYS_TO_DIRECT(pa) MIPS_PHYS_TO_KSEG0(pa) -#define MIPS_PHYS_TO_DIRECT_UNCACHED(pa) MIPS_PHYS_TO_KSEG1(pa) -#define MIPS_DIRECT_TO_PHYS(va) MIPS_KSEG0_TO_PHYS(va) -#endif - -/* CPU dependent mtc0 hazard hook */ -#if defined(CPU_CNMIPS) || defined(CPU_RMI) -#define COP0_SYNC -#elif defined(CPU_NLM) -#define COP0_SYNC .word 0xc0 /* ehb */ -#elif defined(CPU_SB1) -#define COP0_SYNC ssnop; ssnop; ssnop; ssnop; ssnop; ssnop; ssnop; ssnop; ssnop -#elif defined(CPU_MIPS24K) || defined(CPU_MIPS34K) || \ - defined(CPU_MIPS74K) || defined(CPU_MIPS1004K) || \ - defined(CPU_MIPS1074K) || defined(CPU_INTERAPTIV) || \ - defined(CPU_PROAPTIV) -/* - * According to MIPS32tm Architecture for Programmers, Vol.II, rev. 2.00: - * "As EHB becomes standard in MIPS implementations, the previous SSNOPs can be - * removed, leaving only the EHB". - * Also, all MIPS32 Release 2 implementations have the EHB instruction, which - * resolves all execution hazards. The same goes for MIPS32 Release 3. - */ -#define COP0_SYNC .word 0xc0 /* ehb */ -#else -/* - * Pick a reasonable default based on the "typical" spacing described in the - * "CP0 Hazards" chapter of MIPS Architecture Book Vol III. - */ -#define COP0_SYNC ssnop; ssnop; ssnop; ssnop; .word 0xc0; -#endif -#define COP0_HAZARD_FPUENABLE nop; nop; nop; nop; - -/* - * The bits in the cause register. - * - * Bits common to r3000 and r4000: - * - * MIPS_CR_BR_DELAY Exception happened in branch delay slot. - * MIPS_CR_COP_ERR Coprocessor error. - * MIPS_CR_IP Interrupt pending bits defined below. - * (same meaning as in CAUSE register). - * MIPS_CR_EXC_CODE The exception type (see exception codes below). - * - * Differences: - * r3k has 4 bits of execption type, r4k has 5 bits. - */ -#define MIPS_CR_BR_DELAY 0x80000000 -#define MIPS_CR_COP_ERR 0x30000000 -#define MIPS_CR_EXC_CODE 0x0000007C /* five bits */ -#define MIPS_CR_IP 0x0000FF00 -#define MIPS_CR_EXC_CODE_SHIFT 2 -#define MIPS_CR_COP_ERR_SHIFT 28 - -/* - * The bits in the status register. All bits are active when set to 1. - * - * R3000 status register fields: - * MIPS_SR_COP_USABILITY Control the usability of the four coprocessors. - * MIPS_SR_TS TLB shutdown. - * - * MIPS_SR_INT_IE Master (current) interrupt enable bit. - * - * Differences: - * r3k has cache control is via frobbing SR register bits, whereas the - * r4k cache control is via explicit instructions. - * r3k has a 3-entry stack of kernel/user bits, whereas the - * r4k has kernel/supervisor/user. - */ -#define MIPS_SR_COP_USABILITY 0xf0000000 -#define MIPS_SR_COP_0_BIT 0x10000000 -#define MIPS_SR_COP_1_BIT 0x20000000 -#define MIPS_SR_COP_2_BIT 0x40000000 - - /* r4k and r3k differences, see below */ - -#define MIPS_SR_MX 0x01000000 /* MIPS64 */ -#define MIPS_SR_PX 0x00800000 /* MIPS64 */ -#define MIPS_SR_BEV 0x00400000 /* Use boot exception vector */ -#define MIPS_SR_TS 0x00200000 -#define MIPS_SR_DE 0x00010000 - -#define MIPS_SR_INT_IE 0x00000001 -/*#define MIPS_SR_MBZ 0x0f8000c0*/ /* Never used, true for r3k */ -#define MIPS_SR_INT_MASK 0x0000ff00 - -/* - * R4000 status register bit definitions, - * where different from r2000/r3000. - */ -#define MIPS_SR_XX 0x80000000 -#define MIPS_SR_RP 0x08000000 -#define MIPS_SR_FR 0x04000000 -#define MIPS_SR_RE 0x02000000 - -#define MIPS_SR_DIAG_DL 0x01000000 /* QED 52xx */ -#define MIPS_SR_DIAG_IL 0x00800000 /* QED 52xx */ -#define MIPS_SR_SR 0x00100000 -#define MIPS_SR_NMI 0x00080000 /* MIPS32/64 */ -#define MIPS_SR_DIAG_CH 0x00040000 -#define MIPS_SR_DIAG_CE 0x00020000 -#define MIPS_SR_DIAG_PE 0x00010000 -#define MIPS_SR_EIE 0x00010000 /* TX79/R5900 */ -#define MIPS_SR_KX 0x00000080 -#define MIPS_SR_SX 0x00000040 -#define MIPS_SR_UX 0x00000020 -#define MIPS_SR_KSU_MASK 0x00000018 -#define MIPS_SR_KSU_USER 0x00000010 -#define MIPS_SR_KSU_SUPER 0x00000008 -#define MIPS_SR_KSU_KERNEL 0x00000000 -#define MIPS_SR_ERL 0x00000004 -#define MIPS_SR_EXL 0x00000002 - -/* - * The interrupt masks. - * If a bit in the mask is 1 then the interrupt is enabled (or pending). - */ -#define MIPS_INT_MASK 0xff00 -#define MIPS_INT_MASK_5 0x8000 -#define MIPS_INT_MASK_4 0x4000 -#define MIPS_INT_MASK_3 0x2000 -#define MIPS_INT_MASK_2 0x1000 -#define MIPS_INT_MASK_1 0x0800 -#define MIPS_INT_MASK_0 0x0400 -#define MIPS_HARD_INT_MASK 0xfc00 -#define MIPS_SOFT_INT_MASK_1 0x0200 -#define MIPS_SOFT_INT_MASK_0 0x0100 - -/* - * The bits in the MIPS3 config register. - * - * bit 0..5: R/W, Bit 6..31: R/O - */ - -/* kseg0 coherency algorithm - see MIPS3_TLB_ATTR values */ -#define MIPS_CONFIG_K0_MASK 0x00000007 - -/* - * R/W Update on Store Conditional - * 0: Store Conditional uses coherency algorithm specified by TLB - * 1: Store Conditional uses cacheable coherent update on write - */ -#define MIPS_CONFIG_CU 0x00000008 - -#define MIPS_CONFIG_DB 0x00000010 /* Primary D-cache line size */ -#define MIPS_CONFIG_IB 0x00000020 /* Primary I-cache line size */ -#define MIPS_CONFIG_CACHE_L1_LSIZE(config, bit) \ - (((config) & (bit)) ? 32 : 16) - -#define MIPS_CONFIG_DC_MASK 0x000001c0 /* Primary D-cache size */ -#define MIPS_CONFIG_DC_SHIFT 6 -#define MIPS_CONFIG_IC_MASK 0x00000e00 /* Primary I-cache size */ -#define MIPS_CONFIG_IC_SHIFT 9 -#define MIPS_CONFIG_C_DEFBASE 0x1000 /* default base 2^12 */ - -/* Cache size mode indication: available only on Vr41xx CPUs */ -#define MIPS_CONFIG_CS 0x00001000 -#define MIPS_CONFIG_C_4100BASE 0x0400 /* base is 2^10 if CS=1 */ -#define MIPS_CONFIG_CACHE_SIZE(config, mask, base, shift) \ - ((base) << (((config) & (mask)) >> (shift))) - -/* External cache enable: Controls L2 for R5000/Rm527x and L3 for Rm7000 */ -#define MIPS_CONFIG_SE 0x00001000 - -/* Block ordering: 0: sequential, 1: sub-block */ -#define MIPS_CONFIG_EB 0x00002000 - -/* ECC mode - 0: ECC mode, 1: parity mode */ -#define MIPS_CONFIG_EM 0x00004000 - -/* BigEndianMem - 0: kernel and memory are little endian, 1: big endian */ -#define MIPS_CONFIG_BE 0x00008000 - -/* Dirty Shared coherency state - 0: enabled, 1: disabled */ -#define MIPS_CONFIG_SM 0x00010000 - -/* Secondary Cache - 0: present, 1: not present */ -#define MIPS_CONFIG_SC 0x00020000 - -/* System Port width - 0: 64-bit, 1: 32-bit (QED RM523x), 2,3: reserved */ -#define MIPS_CONFIG_EW_MASK 0x000c0000 -#define MIPS_CONFIG_EW_SHIFT 18 - -/* Secondary Cache port width - 0: 128-bit data path to S-cache, 1: reserved */ -#define MIPS_CONFIG_SW 0x00100000 - -/* Split Secondary Cache Mode - 0: I/D mixed, 1: I/D separated by SCAddr(17) */ -#define MIPS_CONFIG_SS 0x00200000 - -/* Secondary Cache line size */ -#define MIPS_CONFIG_SB_MASK 0x00c00000 -#define MIPS_CONFIG_SB_SHIFT 22 -#define MIPS_CONFIG_CACHE_L2_LSIZE(config) \ - (0x10 << (((config) & MIPS_CONFIG_SB_MASK) >> MIPS_CONFIG_SB_SHIFT)) - -/* Write back data rate */ -#define MIPS_CONFIG_EP_MASK 0x0f000000 -#define MIPS_CONFIG_EP_SHIFT 24 - -/* System clock ratio - this value is CPU dependent */ -#define MIPS_CONFIG_EC_MASK 0x70000000 -#define MIPS_CONFIG_EC_SHIFT 28 - -/* Master-Checker Mode - 1: enabled */ -#define MIPS_CONFIG_CM 0x80000000 - -/* - * The bits in the MIPS4 config register. - */ - -/* - * Location of exception vectors. - * - * Common vectors: reset and UTLB miss. - */ -#define MIPS_RESET_EXC_VEC ((intptr_t)(int32_t)0xBFC00000) -#define MIPS_UTLB_MISS_EXC_VEC ((intptr_t)(int32_t)0x80000000) - -/* - * MIPS-III exception vectors - */ -#define MIPS_XTLB_MISS_EXC_VEC ((intptr_t)(int32_t)0x80000080) -#define MIPS_CACHE_ERR_EXC_VEC ((intptr_t)(int32_t)0x80000100) -#define MIPS_GEN_EXC_VEC ((intptr_t)(int32_t)0x80000180) - -/* - * MIPS32/MIPS64 (and some MIPS3) dedicated interrupt vector. - */ -#define MIPS_INTR_EXC_VEC 0x80000200 - -/* - * Coprocessor 0 registers: - * - * v--- width for mips I,III,32,64 - * (3=32bit, 6=64bit, i=impl dep) - * 0 MIPS_COP_0_TLB_INDEX 3333 TLB Index. - * 1 MIPS_COP_0_TLB_RANDOM 3333 TLB Random. - * 2 MIPS_COP_0_TLB_LO0 .636 r4k TLB entry low. - * 3 MIPS_COP_0_TLB_LO1 .636 r4k TLB entry low, extended. - * 4 MIPS_COP_0_TLB_CONTEXT 3636 TLB Context. - * 4/2 MIPS_COP_0_USERLOCAL ..36 UserLocal. - * 5 MIPS_COP_0_TLB_PG_MASK .333 TLB Page Mask register. - * 6 MIPS_COP_0_TLB_WIRED .333 Wired TLB number. - * 7 MIPS_COP_0_HWRENA ..33 rdHWR Enable. - * 8 MIPS_COP_0_BAD_VADDR 3636 Bad virtual address. - * 9 MIPS_COP_0_COUNT .333 Count register. - * 10 MIPS_COP_0_TLB_HI 3636 TLB entry high. - * 11 MIPS_COP_0_COMPARE .333 Compare (against Count). - * 12 MIPS_COP_0_STATUS 3333 Status register. - * 12/1 MIPS_COP_0_INTCTL ..33 Interrupt setup (MIPS32/64 r2). - * 13 MIPS_COP_0_CAUSE 3333 Exception cause register. - * 14 MIPS_COP_0_EXC_PC 3636 Exception PC. - * 15 MIPS_COP_0_PRID 3333 Processor revision identifier. - * 16 MIPS_COP_0_CONFIG 3333 Configuration register. - * 16/1 MIPS_COP_0_CONFIG1 ..33 Configuration register 1. - * 16/2 MIPS_COP_0_CONFIG2 ..33 Configuration register 2. - * 16/3 MIPS_COP_0_CONFIG3 ..33 Configuration register 3. - * 16/4 MIPS_COP_0_CONFIG4 ..33 Configuration register 4. - * 17 MIPS_COP_0_LLADDR .336 Load Linked Address. - * 18 MIPS_COP_0_WATCH_LO .336 WatchLo register. - * 19 MIPS_COP_0_WATCH_HI .333 WatchHi register. - * 20 MIPS_COP_0_TLB_XCONTEXT .6.6 TLB XContext register. - * 23 MIPS_COP_0_DEBUG .... Debug JTAG register. - * 24 MIPS_COP_0_DEPC .... DEPC JTAG register. - * 25 MIPS_COP_0_PERFCNT ..36 Performance Counter register. - * 26 MIPS_COP_0_ECC .3ii ECC / Error Control register. - * 27 MIPS_COP_0_CACHE_ERR .3ii Cache Error register. - * 28/0 MIPS_COP_0_TAG_LO .3ii Cache TagLo register (instr). - * 28/1 MIPS_COP_0_DATA_LO ..ii Cache DataLo register (instr). - * 28/2 MIPS_COP_0_TAG_LO ..ii Cache TagLo register (data). - * 28/3 MIPS_COP_0_DATA_LO ..ii Cache DataLo register (data). - * 29/0 MIPS_COP_0_TAG_HI .3ii Cache TagHi register (instr). - * 29/1 MIPS_COP_0_DATA_HI ..ii Cache DataHi register (instr). - * 29/2 MIPS_COP_0_TAG_HI ..ii Cache TagHi register (data). - * 29/3 MIPS_COP_0_DATA_HI ..ii Cache DataHi register (data). - * 30 MIPS_COP_0_ERROR_PC .636 Error EPC register. - * 31 MIPS_COP_0_DESAVE .... DESAVE JTAG register. - */ - -/* Deal with inclusion from an assembly file. */ -#if defined(_LOCORE) || defined(LOCORE) -#define _(n) $n -#else -#define _(n) n -#endif - -#define MIPS_COP_0_TLB_INDEX _(0) -#define MIPS_COP_0_TLB_RANDOM _(1) - /* Name and meaning of TLB bits for $2 differ on r3k and r4k. */ - -#define MIPS_COP_0_TLB_CONTEXT _(4) - /* $5 and $6 new with MIPS-III */ -#define MIPS_COP_0_BAD_VADDR _(8) -#define MIPS_COP_0_TLB_HI _(10) -#define MIPS_COP_0_STATUS _(12) -#define MIPS_COP_0_CAUSE _(13) -#define MIPS_COP_0_EXC_PC _(14) -#define MIPS_COP_0_PRID _(15) - -/* MIPS-III */ -#define MIPS_COP_0_TLB_LO0 _(2) -#define MIPS_COP_0_TLB_LO1 _(3) - -#define MIPS_COP_0_TLB_PG_MASK _(5) -#define MIPS_COP_0_TLB_WIRED _(6) - -#define MIPS_COP_0_COUNT _(9) -#define MIPS_COP_0_COMPARE _(11) -#ifdef CPU_XBURST -#define MIPS_COP_0_XBURST_C12 _(12) -#endif -#define MIPS_COP_0_CONFIG _(16) -#define MIPS_COP_0_LLADDR _(17) -#define MIPS_COP_0_WATCH_LO _(18) -#define MIPS_COP_0_WATCH_HI _(19) -#define MIPS_COP_0_TLB_XCONTEXT _(20) -#ifdef CPU_XBURST -#define MIPS_COP_0_XBURST_MBOX _(20) -#endif - -#define MIPS_COP_0_ECC _(26) -#define MIPS_COP_0_CACHE_ERR _(27) -#define MIPS_COP_0_TAG_LO _(28) -#define MIPS_COP_0_TAG_HI _(29) -#define MIPS_COP_0_ERROR_PC _(30) - -/* MIPS32/64 */ -#define MIPS_COP_0_USERLOCAL _(4) /* sel 2 is userlevel register */ -#define MIPS_COP_0_HWRENA _(7) -#define MIPS_COP_0_INTCTL _(12) -#define MIPS_COP_0_DEBUG _(23) -#define MIPS_COP_0_DEPC _(24) -#define MIPS_COP_0_PERFCNT _(25) -#define MIPS_COP_0_DATA_LO _(28) -#define MIPS_COP_0_DATA_HI _(29) -#define MIPS_COP_0_DESAVE _(31) - -/* MIPS32 Config register definitions */ -#define MIPS_MMU_NONE 0x00 /* No MMU present */ -#define MIPS_MMU_TLB 0x01 /* Standard TLB */ -#define MIPS_MMU_BAT 0x02 /* Standard BAT */ -#define MIPS_MMU_FIXED 0x03 /* Standard fixed mapping */ - -/* - * IntCtl Register Fields - */ -#define MIPS_INTCTL_IPTI_MASK 0xE0000000 /* bits 31..29 timer intr # */ -#define MIPS_INTCTL_IPTI_SHIFT 29 -#define MIPS_INTCTL_IPPCI_MASK 0x1C000000 /* bits 26..29 perf counter intr # */ -#define MIPS_INTCTL_IPPCI_SHIFT 26 -#define MIPS_INTCTL_VS_MASK 0x000001F0 /* bits 5..9 vector spacing */ -#define MIPS_INTCTL_VS_SHIFT 4 - -/* - * Config Register Fields - * (See "MIPS Architecture for Programmers Volume III", MD00091, Table 9.39) - */ -#define MIPS_CONFIG0_M 0x80000000 /* Flag: Config1 is present. */ -#define MIPS_CONFIG0_MT_MASK 0x00000380 /* bits 9..7 MMU Type */ -#define MIPS_CONFIG0_MT_SHIFT 7 -#define MIPS_CONFIG0_BE 0x00008000 /* data is big-endian */ -#define MIPS_CONFIG0_VI 0x00000008 /* inst cache is virtual */ - -/* - * Config1 Register Fields - * (See "MIPS Architecture for Programmers Volume III", MD00091, Table 9-1) - */ -#define MIPS_CONFIG1_M 0x80000000 /* Flag: Config2 is present. */ -#define MIPS_CONFIG1_TLBSZ_MASK 0x7E000000 /* bits 30..25 # tlb entries minus one */ -#define MIPS_CONFIG1_TLBSZ_SHIFT 25 - -#define MIPS_CONFIG1_IS_MASK 0x01C00000 /* bits 24..22 icache sets per way */ -#define MIPS_CONFIG1_IS_SHIFT 22 -#define MIPS_CONFIG1_IL_MASK 0x00380000 /* bits 21..19 icache line size */ -#define MIPS_CONFIG1_IL_SHIFT 19 -#define MIPS_CONFIG1_IA_MASK 0x00070000 /* bits 18..16 icache associativity */ -#define MIPS_CONFIG1_IA_SHIFT 16 -#define MIPS_CONFIG1_DS_MASK 0x0000E000 /* bits 15..13 dcache sets per way */ -#define MIPS_CONFIG1_DS_SHIFT 13 -#define MIPS_CONFIG1_DL_MASK 0x00001C00 /* bits 12..10 dcache line size */ -#define MIPS_CONFIG1_DL_SHIFT 10 -#define MIPS_CONFIG1_DA_MASK 0x00000380 /* bits 9.. 7 dcache associativity */ -#define MIPS_CONFIG1_DA_SHIFT 7 -#define MIPS_CONFIG1_LOWBITS 0x0000007F -#define MIPS_CONFIG1_C2 0x00000040 /* Coprocessor 2 implemented */ -#define MIPS_CONFIG1_MD 0x00000020 /* MDMX ASE implemented (MIPS64) */ -#define MIPS_CONFIG1_PC 0x00000010 /* Performance counters implemented */ -#define MIPS_CONFIG1_WR 0x00000008 /* Watch registers implemented */ -#define MIPS_CONFIG1_CA 0x00000004 /* MIPS16e ISA implemented */ -#define MIPS_CONFIG1_EP 0x00000002 /* EJTAG implemented */ -#define MIPS_CONFIG1_FP 0x00000001 /* FPU implemented */ - -#define MIPS_CONFIG2_SA_SHIFT 0 /* Secondary cache associativity */ -#define MIPS_CONFIG2_SA_MASK 0xf -#define MIPS_CONFIG2_SL_SHIFT 4 /* Secondary cache line size */ -#define MIPS_CONFIG2_SL_MASK 0xf -#define MIPS_CONFIG2_SS_SHIFT 8 /* Secondary cache sets per way */ -#define MIPS_CONFIG2_SS_MASK 0xf - -#define MIPS_CONFIG3_CMGCR_MASK (1 << 29) /* Coherence manager present */ - -/* - * Config2 Register Fields - * (See "MIPS Architecture for Programmers Volume III", MD00091, Table 9.40) - */ -#define MIPS_CONFIG2_M 0x80000000 /* Flag: Config3 is present. */ - -/* - * Config3 Register Fields - * (See "MIPS Architecture for Programmers Volume III", MD00091, Table 9.41) - */ -#define MIPS_CONFIG3_M 0x80000000 /* Flag: Config4 is present */ -#define MIPS_CONFIG3_ULR 0x00002000 /* UserLocal reg implemented */ - -#define MIPS_CONFIG4_MMUSIZEEXT 0x000000FF /* bits 7.. 0 MMU Size Extension */ -#define MIPS_CONFIG4_MMUEXTDEF 0x0000C000 /* bits 15.14 MMU Extension Definition */ -#define MIPS_CONFIG4_MMUEXTDEF_MMUSIZEEXT 0x00004000 /* This values denotes CONFIG4 bits */ - -/* - * Values for the code field in a break instruction. - */ -#define MIPS_BREAK_INSTR 0x0000000d -#define MIPS_BREAK_VAL_MASK 0x03ff0000 -#define MIPS_BREAK_VAL_SHIFT 16 -#define MIPS_BREAK_KDB_VAL 512 -#define MIPS_BREAK_SSTEP_VAL 513 -#define MIPS_BREAK_BRKPT_VAL 514 -#define MIPS_BREAK_SOVER_VAL 515 -#define MIPS_BREAK_DDB_VAL 516 -#define MIPS_BREAK_KDB (MIPS_BREAK_INSTR | \ - (MIPS_BREAK_KDB_VAL << MIPS_BREAK_VAL_SHIFT)) -#define MIPS_BREAK_SSTEP (MIPS_BREAK_INSTR | \ - (MIPS_BREAK_SSTEP_VAL << MIPS_BREAK_VAL_SHIFT)) -#define MIPS_BREAK_BRKPT (MIPS_BREAK_INSTR | \ - (MIPS_BREAK_BRKPT_VAL << MIPS_BREAK_VAL_SHIFT)) -#define MIPS_BREAK_SOVER (MIPS_BREAK_INSTR | \ - (MIPS_BREAK_SOVER_VAL << MIPS_BREAK_VAL_SHIFT)) -#define MIPS_BREAK_DDB (MIPS_BREAK_INSTR | \ - (MIPS_BREAK_DDB_VAL << MIPS_BREAK_VAL_SHIFT)) - -/* - * Mininum and maximum cache sizes. - */ -#define MIPS_MIN_CACHE_SIZE (16 * 1024) -#define MIPS_MAX_CACHE_SIZE (256 * 1024) -#define MIPS_MAX_PCACHE_SIZE (32 * 1024) /* max. primary cache size */ - -/* - * The floating point version and status registers. - */ -#define MIPS_FPU_ID $0 -#define MIPS_FPU_CSR $31 - -/* - * The floating point coprocessor status register bits. - */ -#define MIPS_FPU_ROUNDING_BITS 0x00000003 -#define MIPS_FPU_ROUND_RN 0x00000000 -#define MIPS_FPU_ROUND_RZ 0x00000001 -#define MIPS_FPU_ROUND_RP 0x00000002 -#define MIPS_FPU_ROUND_RM 0x00000003 -#define MIPS_FPU_STICKY_BITS 0x0000007c -#define MIPS_FPU_STICKY_INEXACT 0x00000004 -#define MIPS_FPU_STICKY_UNDERFLOW 0x00000008 -#define MIPS_FPU_STICKY_OVERFLOW 0x00000010 -#define MIPS_FPU_STICKY_DIV0 0x00000020 -#define MIPS_FPU_STICKY_INVALID 0x00000040 -#define MIPS_FPU_ENABLE_BITS 0x00000f80 -#define MIPS_FPU_ENABLE_INEXACT 0x00000080 -#define MIPS_FPU_ENABLE_UNDERFLOW 0x00000100 -#define MIPS_FPU_ENABLE_OVERFLOW 0x00000200 -#define MIPS_FPU_ENABLE_DIV0 0x00000400 -#define MIPS_FPU_ENABLE_INVALID 0x00000800 -#define MIPS_FPU_EXCEPTION_BITS 0x0003f000 -#define MIPS_FPU_EXCEPTION_INEXACT 0x00001000 -#define MIPS_FPU_EXCEPTION_UNDERFLOW 0x00002000 -#define MIPS_FPU_EXCEPTION_OVERFLOW 0x00004000 -#define MIPS_FPU_EXCEPTION_DIV0 0x00008000 -#define MIPS_FPU_EXCEPTION_INVALID 0x00010000 -#define MIPS_FPU_EXCEPTION_UNIMPL 0x00020000 -#define MIPS_FPU_COND_BIT 0x00800000 -#define MIPS_FPU_FLUSH_BIT 0x01000000 /* r4k, MBZ on r3k */ -#define MIPS_FPC_MBZ_BITS 0xfe7c0000 - -/* - * Constants to determine if have a floating point instruction. - */ -#define MIPS_OPCODE_SHIFT 26 -#define MIPS_OPCODE_C1 0x11 - -/* Coherence manager constants */ -#define MIPS_CMGCRB_BASE 11 -#define MIPS_CMGCRF_BASE (~((1 << MIPS_CMGCRB_BASE) - 1)) - -/* - * Bits defined for for the HWREna (CP0 register 7, select 0). - */ -#define MIPS_HWRENA_CPUNUM (1<<0) /* CPU number program is running on */ -#define MIPS_HWRENA_SYNCI_STEP (1<<1) /* Address step sized used with SYNCI */ -#define MIPS_HWRENA_CC (1<<2) /* Hi Res cycle counter */ -#define MIPS_HWRENA_CCRES (1<<3) /* Cycle counter resolution */ -#define MIPS_HWRENA_UL (1<<29) /* UserLocal Register */ -#define MIPS_HWRENA_IMPL30 (1<<30) /* Implementation-dependent 30 */ -#define MIPS_HWRENA_IMPL31 (1<<31) /* Implementation-dependent 31 */ - -#endif /* _MIPS_CPUREGS_H_ */ diff --git a/sys/mips/include/db_machdep.h b/sys/mips/include/db_machdep.h deleted file mode 100644 index 2d81635aca0..00000000000 --- a/sys/mips/include/db_machdep.h +++ /dev/null @@ -1,90 +0,0 @@ -/* $OpenBSD: db_machdep.h,v 1.2 1998/09/15 10:50:12 pefo Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 1998 Per Fogelstrom, Opsycon AB - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed under OpenBSD by - * Per Fogelstrom, Opsycon AB, Sweden. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * JNPR: db_machdep.h,v 1.7 2006/10/16 12:30:34 katta - */ - -#ifndef _MIPS_DB_MACHDEP_H_ -#define _MIPS_DB_MACHDEP_H_ - -#include -#include - -typedef struct trapframe db_regs_t; -extern db_regs_t ddb_regs; /* register state */ - -typedef vm_offset_t db_addr_t; /* address - unsigned */ -typedef register_t db_expr_t; /* expression - signed */ - -#define SOFTWARE_SSTEP /* Need software single step */ -#define SOFTWARE_SSTEP_EMUL /* next_instr_address() emulates 100% */ -db_addr_t next_instr_address(db_addr_t, boolean_t); -#define BKPT_SIZE (4) -#define BKPT_SET(ins) (MIPS_BREAK_DDB) -#define DB_VALID_BREAKPOINT(addr) (((addr) & 3) == 0) - -#define IS_BREAKPOINT_TRAP(type, code) ((type) == T_BREAK) -#define IS_WATCHPOINT_TRAP(type, code) (0) /* XXX mips3 watchpoint */ - -#define PC_REGS() ((db_addr_t)kdb_thrctx->pcb_regs.pc) -#define BKPT_SKIP \ - do { \ - if((db_get_value(kdb_frame->pc, sizeof(int), FALSE) & \ - ~MIPS_BREAK_VAL_MASK) == MIPS_BREAK_INSTR) { \ - kdb_frame->pc += BKPT_SIZE; \ - kdb_thrctx->pcb_regs.pc += BKPT_SIZE; \ - } \ - } while (0); - -/* - * Test of instructions to see class. - */ -#define IT_CALL 0x01 -#define IT_BRANCH 0x02 -#define IT_LOAD 0x03 -#define IT_STORE 0x04 - -#define inst_branch(i) (db_inst_type(i) == IT_BRANCH) -#define inst_trap_return(i) ((i) & 0) -#define inst_call(i) (db_inst_type(i) == IT_CALL) -#define inst_return(i) ((i) == 0x03e00008) -#define inst_load(i) (db_inst_type(i) == IT_LOAD) -#define inst_store(i) (db_inst_type(i) == IT_STORE) - -int db_inst_type(int); -db_addr_t branch_taken(int inst, db_addr_t pc); -int32_t kdbpeek(int *); -int64_t kdbpeekd(int *); - -#endif /* !_MIPS_DB_MACHDEP_H_ */ diff --git a/sys/mips/include/dump.h b/sys/mips/include/dump.h deleted file mode 100644 index 0f98f3350e0..00000000000 --- a/sys/mips/include/dump.h +++ /dev/null @@ -1,77 +0,0 @@ -/*- - * Copyright (c) 2014 EMC Corp. - * Author: Conrad Meyer - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_DUMP_H_ -#define _MACHINE_DUMP_H_ - -#define KERNELDUMP_ARCH_VERSION KERNELDUMP_MIPS_VERSION -#define EM_VALUE EM_MIPS -/* XXX: I suppose 20 should be enough. */ -#define DUMPSYS_MD_PA_NPAIRS 20 -#define DUMPSYS_NUM_AUX_HDRS 0 - -/* How often to check the dump progress bar? */ -#define DUMPSYS_PB_CHECK_BITS 22 /* Every 4MB */ - -void dumpsys_wbinv_all(void); - -static inline void -dumpsys_pa_init(void) -{ - - dumpsys_gen_pa_init(); -} - -static inline struct dump_pa * -dumpsys_pa_next(struct dump_pa *p) -{ - - return (dumpsys_gen_pa_next(p)); -} - -static inline void -dumpsys_unmap_chunk(vm_paddr_t pa, size_t s, void *va) -{ - - dumpsys_gen_unmap_chunk(pa, s, va); -} - -static inline int -dumpsys_write_aux_headers(struct dumperinfo *di) -{ - - return (dumpsys_gen_write_aux_headers(di)); -} - -static inline int -dumpsys(struct dumperinfo *di) -{ - - return (dumpsys_generic(di)); -} - -#endif /* !_MACHINE_DUMP_H_ */ diff --git a/sys/mips/include/efi.h b/sys/mips/include/efi.h deleted file mode 100644 index 3a2a59cd0ab..00000000000 --- a/sys/mips/include/efi.h +++ /dev/null @@ -1,12 +0,0 @@ -/*- - * This file is in the public domain since it's just boilerplate. - */ - -#ifndef __MIPS_INCLUDE_EFI_H_ -#define __MIPS_INCLUDE_EFI_H_ - -#define EFIABI_ATTR - -/* Note: we don't actually support this on mips */ - -#endif /* __MIPS_INCLUDE_EFI_H_ */ diff --git a/sys/mips/include/elf.h b/sys/mips/include/elf.h deleted file mode 100644 index 83cfa42fcbf..00000000000 --- a/sys/mips/include/elf.h +++ /dev/null @@ -1,215 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause AND BSD-2-Clause - * - * Copyright (c) 2013 M. Warner Losh - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/*- - * Copyright (c) 2013 The NetBSD Foundation, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * See below starting with the line with $NetBSD...$ for code this applies to. - */ - -#ifndef __MIPS_ELF_H -#define __MIPS_ELF_H - -/* FreeBSD specific bits - derived from FreeBSD specific files and changes to old elf.h */ - -/* - * Define __ELF_WORD_SIZE based on the ABI, if not defined yet. This sets - * the proper defaults when we're not trying to do 32-bit on 64-bit systems. - * We include both 32 and 64 bit versions so we can support multiple ABIs. - */ -#ifndef __ELF_WORD_SIZE -#if defined(__mips_n64) -#define __ELF_WORD_SIZE 64 -#else -#define __ELF_WORD_SIZE 32 -#endif -#endif -#include -#include -#include - -#define ELF_ARCH EM_MIPS -#define ELF_ARCH32 EM_MIPS - -#define ELF_MACHINE_OK(x) ((x) == ELF_ARCH) - -/* Define "machine" characteristics */ -#if __ELF_WORD_SIZE == 32 -#define ELF_TARG_CLASS ELFCLASS32 -#else -#define ELF_TARG_CLASS ELFCLASS64 -#endif -#ifdef __MIPSEB__ -#define ELF_TARG_DATA ELFDATA2MSB -#else -#define ELF_TARG_DATA ELFDATA2LSB -#endif -#define ELF_TARG_MACH EM_MIPS -#define ELF_TARG_VER 1 - -/* - * Auxiliary vector entries for passing information to the interpreter. - * - * The i386 supplement to the SVR4 ABI specification names this "auxv_t", - * but POSIX lays claim to all symbols ending with "_t". - */ -typedef struct { /* Auxiliary vector entry on initial stack */ - int a_type; /* Entry type. */ - union { - int a_val; /* Integer value. */ -#if defined(__mips_o32) || defined(__mips_n32) - void *a_ptr; /* Address. */ - void (*a_fcn)(void); /* Function pointer (not used). */ -#endif - } a_un; -} Elf32_Auxinfo; - -typedef struct { /* Auxiliary vector entry on initial stack */ - long a_type; /* Entry type. */ - union { - long a_val; /* Integer value. */ - void *a_ptr; /* Address. */ - void (*a_fcn)(void); /* Function pointer (not used). */ - } a_un; -} Elf64_Auxinfo; - -__ElfType(Auxinfo); - -#define ET_DYN_LOAD_ADDR 0x0120000 - -/* - * Constant to mark start of symtab/strtab saved by trampoline - */ -#define SYMTAB_MAGIC 0x64656267 - -/* from NetBSD's sys/mips/include/elf_machdep.h $NetBSD: elf_machdep.h,v 1.18 2013/05/23 21:39:49 christos Exp $ */ - -/* mips relocs. */ - -#define R_MIPS_NONE 0 -#define R_MIPS_16 1 -#define R_MIPS_32 2 -#define R_MIPS_REL32 3 -#define R_MIPS_REL R_MIPS_REL32 -#define R_MIPS_26 4 -#define R_MIPS_HI16 5 /* high 16 bits of symbol value */ -#define R_MIPS_LO16 6 /* low 16 bits of symbol value */ -#define R_MIPS_GPREL16 7 /* GP-relative reference */ -#define R_MIPS_LITERAL 8 /* Reference to literal section */ -#define R_MIPS_GOT16 9 /* Reference to global offset table */ -#define R_MIPS_GOT R_MIPS_GOT16 -#define R_MIPS_PC16 10 /* 16 bit PC relative reference */ -#define R_MIPS_CALL16 11 /* 16 bit call thru glbl offset tbl */ -#define R_MIPS_CALL R_MIPS_CALL16 -#define R_MIPS_GPREL32 12 - -/* 13, 14, 15 are not defined at this point. */ -#define R_MIPS_UNUSED1 13 -#define R_MIPS_UNUSED2 14 -#define R_MIPS_UNUSED3 15 - -/* - * The remaining relocs are apparently part of the 64-bit Irix ELF ABI. - */ -#define R_MIPS_SHIFT5 16 -#define R_MIPS_SHIFT6 17 - -#define R_MIPS_64 18 -#define R_MIPS_GOT_DISP 19 -#define R_MIPS_GOT_PAGE 20 -#define R_MIPS_GOT_OFST 21 -#define R_MIPS_GOT_HI16 22 -#define R_MIPS_GOT_LO16 23 -#define R_MIPS_SUB 24 -#define R_MIPS_INSERT_A 25 -#define R_MIPS_INSERT_B 26 -#define R_MIPS_DELETE 27 -#define R_MIPS_HIGHER 28 -#define R_MIPS_HIGHEST 29 -#define R_MIPS_CALL_HI16 30 -#define R_MIPS_CALL_LO16 31 -#define R_MIPS_SCN_DISP 32 -#define R_MIPS_REL16 33 -#define R_MIPS_ADD_IMMEDIATE 34 -#define R_MIPS_PJUMP 35 -#define R_MIPS_RELGOT 36 -#define R_MIPS_JALR 37 -/* TLS relocations */ - -#define R_MIPS_TLS_DTPMOD32 38 /* Module number 32 bit */ -#define R_MIPS_TLS_DTPREL32 39 /* Module-relative offset 32 bit */ -#define R_MIPS_TLS_DTPMOD64 40 /* Module number 64 bit */ -#define R_MIPS_TLS_DTPREL64 41 /* Module-relative offset 64 bit */ -#define R_MIPS_TLS_GD 42 /* 16 bit GOT offset for GD */ -#define R_MIPS_TLS_LDM 43 /* 16 bit GOT offset for LDM */ -#define R_MIPS_TLS_DTPREL_HI16 44 /* Module-relative offset, high 16 bits */ -#define R_MIPS_TLS_DTPREL_LO16 45 /* Module-relative offset, low 16 bits */ -#define R_MIPS_TLS_GOTTPREL 46 /* 16 bit GOT offset for IE */ -#define R_MIPS_TLS_TPREL32 47 /* TP-relative offset, 32 bit */ -#define R_MIPS_TLS_TPREL64 48 /* TP-relative offset, 64 bit */ -#define R_MIPS_TLS_TPREL_HI16 49 /* TP-relative offset, high 16 bits */ -#define R_MIPS_TLS_TPREL_LO16 50 /* TP-relative offset, low 16 bits */ - -#define R_MIPS_max 51 - -#define R_TYPE(name) __CONCAT(R_MIPS_,name) - -#define R_MIPS16_min 100 -#define R_MIPS16_26 100 -#define R_MIPS16_GPREL 101 -#define R_MIPS16_GOT16 102 -#define R_MIPS16_CALL16 103 -#define R_MIPS16_HI16 104 -#define R_MIPS16_LO16 105 -#define R_MIPS16_max 106 - -#define R_MIPS_COPY 126 -#define R_MIPS_JUMP_SLOT 127 - -#endif /* __MIPS_ELF_H */ diff --git a/sys/mips/include/endian.h b/sys/mips/include/endian.h deleted file mode 100644 index 9e8179913ca..00000000000 --- a/sys/mips/include/endian.h +++ /dev/null @@ -1,43 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1987, 1991 Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)endian.h 7.8 (Berkeley) 4/3/91 - */ - -#ifndef _MACHINE_ENDIAN_H_ -#define _MACHINE_ENDIAN_H_ - -#include -#ifndef __ASSEMBLER__ -#include -#endif -#include - -#endif /* !_MACHINE_ENDIAN_H_ */ diff --git a/sys/mips/include/exec.h b/sys/mips/include/exec.h deleted file mode 100644 index 4eb6ef0b524..00000000000 --- a/sys/mips/include/exec.h +++ /dev/null @@ -1,41 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)exec.h 8.1 (Berkeley) 6/11/93 - * from: src/sys/i386/include/exec.h,v 1.8 1999/08/28 00:44:11 peter - * JNPR: exec.h,v 1.3 2006/08/07 05:38:57 katta - */ - -#ifndef _MACHINE_EXEC_H_ -#define _MACHINE_EXEC_H_ - -#define __LDPGSZ 4096 - -#endif /* !_MACHINE_EXEC_H_ */ diff --git a/sys/mips/include/fdt.h b/sys/mips/include/fdt.h deleted file mode 100644 index 9986b2cef28..00000000000 --- a/sys/mips/include/fdt.h +++ /dev/null @@ -1,45 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 The FreeBSD Foundation - * - * This software was developed by Semihalf under sponsorship from - * the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_FDT_H_ -#define _MACHINE_FDT_H_ - -#include - -/* - * Bus space tag. XXX endianess info needs to be derived from the blob. - */ -#if defined(CPU_RMI) || defined(CPU_NLM) -#define fdtbus_bs_tag rmi_uart_bus_space -#else -#define fdtbus_bs_tag mips_bus_space_generic -#endif - -#endif /* _MACHINE_FDT_H_ */ diff --git a/sys/mips/include/float.h b/sys/mips/include/float.h deleted file mode 100644 index 39d2ffae14c..00000000000 --- a/sys/mips/include/float.h +++ /dev/null @@ -1,98 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1989 Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)float.h 7.1 (Berkeley) 5/8/90 - * from: src/sys/i386/include/float.h,v 1.8 1999/08/28 00:44:11 peter - * JNPR: float.h,v 1.4 2006/12/02 09:53:41 katta - */ - -#ifndef _MACHINE_FLOAT_H_ -#define _MACHINE_FLOAT_H_ 1 - -#include - -__BEGIN_DECLS -extern int __flt_rounds(void); -__END_DECLS - -#define FLT_RADIX 2 /* b */ -#define FLT_ROUNDS __flt_rounds() /* FP addition rounds to nearest */ - -#if __ISO_C_VISIBLE >= 1999 -#define FLT_EVAL_METHOD 0 -#define DECIMAL_DIG 17 -#endif - -#define FLT_MANT_DIG 24 /* p */ -#define FLT_EPSILON 1.19209290E-07F /* b**(1-p) */ -#define FLT_DIG 6 /* floor((p-1)*log10(b))+(b == 10) */ -#define FLT_MIN_EXP (-125) /* emin */ -#define FLT_MIN 1.17549435E-38F /* b**(emin-1) */ -#define FLT_MIN_10_EXP (-37) /* ceil(log10(b**(emin-1))) */ -#define FLT_MAX_EXP 128 /* emax */ -#define FLT_MAX 3.40282347E+38F /* (1-b**(-p))*b**emax */ -#define FLT_MAX_10_EXP 38 /* floor(log10((1-b**(-p))*b**emax)) */ -#if __ISO_C_VISIBLE >= 2011 -#define FLT_TRUE_MIN 1.40129846E-45F /* b**(emin-p) */ -#define FLT_DECIMAL_DIG 9 /* ceil(1+p*log10(b)) */ -#define FLT_HAS_SUBNORM 1 -#endif /* __ISO_C_VISIBLE >= 2011 */ - -#define DBL_MANT_DIG 53 -#define DBL_EPSILON 2.2204460492503131E-16 -#define DBL_DIG 15 -#define DBL_MIN_EXP (-1021) -#define DBL_MIN 2.2250738585072014E-308 -#define DBL_MIN_10_EXP (-307) -#define DBL_MAX_EXP 1024 -#define DBL_MAX 1.7976931348623157E+308 -#define DBL_MAX_10_EXP 308 -#if __ISO_C_VISIBLE >= 2011 -#define DBL_TRUE_MIN 4.9406564584124654E-324 -#define DBL_DECIMAL_DIG 17 -#define DBL_HAS_SUBNORM 1 -#endif /* __ISO_C_VISIBLE >= 2011 */ - -#define LDBL_MANT_DIG DBL_MANT_DIG -#define LDBL_EPSILON ((long double)DBL_EPSILON) -#define LDBL_DIG DBL_DIG -#define LDBL_MIN_EXP DBL_MIN_EXP -#define LDBL_MIN ((long double)DBL_MIN) -#define LDBL_MIN_10_EXP DBL_MIN_10_EXP -#define LDBL_MAX_EXP DBL_MAX_EXP -#define LDBL_MAX ((long double)DBL_MAX) -#define LDBL_MAX_10_EXP DBL_MAX_10_EXP -#if __ISO_C_VISIBLE >= 2011 -#define LDBL_TRUE_MIN ((long double)DBL_TRUE_MIN) -#define LDBL_DECIMAL_DIG DBL_DECIMAL_DIG -#define LDBL_HAS_SUBNORM DBL_HAS_SUBNORM -#endif /* __ISO_C_VISIBLE >= 2011 */ - -#endif /* _MACHINE_FLOAT_H_ */ diff --git a/sys/mips/include/floatingpoint.h b/sys/mips/include/floatingpoint.h deleted file mode 100644 index 392fb1957fa..00000000000 --- a/sys/mips/include/floatingpoint.h +++ /dev/null @@ -1,44 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 1993 Andrew Moore, Talke Studio - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#) floatingpoint.h 1.0 (Berkeley) 9/23/93 - */ - -#ifndef _FLOATINGPOINT_H_ -#define _FLOATINGPOINT_H_ - -#include -#include - -#endif /* !_FLOATINGPOINT_H_ */ diff --git a/sys/mips/include/fls64.h b/sys/mips/include/fls64.h deleted file mode 100644 index 5737522e8cd..00000000000 --- a/sys/mips/include/fls64.h +++ /dev/null @@ -1,48 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2003-2009 RMI Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of RMI Corporation, nor the names of its contributors, - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * RMI_BSD */ -#ifndef _MIPS_FLS64_H_ -#define _MIPS_FLS64_H_ - -/* - * Find Last Set bit (64 bit) - */ -static inline int -fls64(__uint64_t mask) -{ - int bit; - - if (mask == 0) - return (0); - for (bit = 1; ((mask & 0x1ULL) == 0); bit++) - mask = mask >> 1; - return (bit); -} -#endif diff --git a/sys/mips/include/fpu.h b/sys/mips/include/fpu.h deleted file mode 100644 index b30bc665c5b..00000000000 --- a/sys/mips/include/fpu.h +++ /dev/null @@ -1,7 +0,0 @@ -/*- - * This file is in the public domain. - */ -#ifndef _MACHINE_FPU_H_ -#define _MACHINE_FPU_H_ - -#endif /* !_MACHINE_FPU_H_ */ diff --git a/sys/mips/include/frame.h b/sys/mips/include/frame.h deleted file mode 100644 index 7f63e8669d5..00000000000 --- a/sys/mips/include/frame.h +++ /dev/null @@ -1,141 +0,0 @@ -/* $OpenBSD: frame.h,v 1.3 1998/09/15 10:50:12 pefo Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 1998 Per Fogelstrom, Opsycon AB - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed under OpenBSD by - * Per Fogelstrom, Opsycon AB, Sweden. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * JNPR: frame.h,v 1.6.2.1 2007/09/10 08:14:57 girish - * - */ -#ifndef _MACHINE_FRAME_H_ -#define _MACHINE_FRAME_H_ - -/* Note: This must also match regnum.h and regdef.h */ - -struct trapframe { - register_t zero; - register_t ast; - register_t v0; - register_t v1; - register_t a0; - register_t a1; - register_t a2; - register_t a3; -#if defined(__mips_n32) || defined(__mips_n64) - register_t a4; - register_t a5; - register_t a6; - register_t a7; - register_t t0; - register_t t1; - register_t t2; - register_t t3; -#else - register_t t0; - register_t t1; - register_t t2; - register_t t3; - register_t t4; - register_t t5; - register_t t6; - register_t t7; -#endif - register_t s0; - register_t s1; - register_t s2; - register_t s3; - register_t s4; - register_t s5; - register_t s6; - register_t s7; - register_t t8; - register_t t9; - register_t k0; - register_t k1; - register_t gp; - register_t sp; - register_t s8; - register_t ra; - register_t sr; - register_t mullo; - register_t mulhi; - register_t badvaddr; - register_t cause; - register_t pc; - /* - * FREEBSD_DEVELOPERS_FIXME: - * Include any other registers which are CPU-Specific and - * need to be part of the frame here. - * - * Also, be sure this matches what is defined in regnum.h - */ - register_t ic; /* RM7k and RM9k specific */ - register_t dummy; /* Alignment for 32-bit case */ - -/* From here and on, only saved user processes. */ - - f_register_t f0; - f_register_t f1; - f_register_t f2; - f_register_t f3; - f_register_t f4; - f_register_t f5; - f_register_t f6; - f_register_t f7; - f_register_t f8; - f_register_t f9; - f_register_t f10; - f_register_t f11; - f_register_t f12; - f_register_t f13; - f_register_t f14; - f_register_t f15; - f_register_t f16; - f_register_t f17; - f_register_t f18; - f_register_t f19; - f_register_t f20; - f_register_t f21; - f_register_t f22; - f_register_t f23; - f_register_t f24; - f_register_t f25; - f_register_t f26; - f_register_t f27; - f_register_t f28; - f_register_t f29; - f_register_t f30; - f_register_t f31; - register_t fsr; - register_t fir; -}; - -#endif /* !_MACHINE_FRAME_H_ */ diff --git a/sys/mips/include/gdb_machdep.h b/sys/mips/include/gdb_machdep.h deleted file mode 100644 index 7739d2c62ef..00000000000 --- a/sys/mips/include/gdb_machdep.h +++ /dev/null @@ -1,76 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * from: src/sys/alpha/include/gdb_machdep.h,v 1.3 2005/01/05 20:05:50 imp - * JNPR: gdb_machdep.h,v 1.1 2007/08/09 12:25:25 katta - */ - -#ifndef _MACHINE_GDB_MACHDEP_H_ -#define _MACHINE_GDB_MACHDEP_H_ - -#define GDB_BUFSZ 600 -#define GDB_NREGS 90 -#define GDB_REG_PC 37 - -static __inline size_t -gdb_cpu_regsz(int regnum) -{ - - return (sizeof(long)); -} - -static __inline int -gdb_cpu_query(void) -{ - - return (0); -} - -static __inline void * -gdb_begin_write(void) -{ - - return (NULL); -} - -static __inline void -gdb_end_write(void *arg __unused) -{ - -} - -static __inline void -gdb_cpu_stop_reason(int type __unused, int code __unused) -{ - -} - -void *gdb_cpu_getreg(int, size_t *); -void gdb_cpu_setreg(int, void *); -int gdb_cpu_signal(int, int); - -#endif /* !_MACHINE_GDB_MACHDEP_H_ */ diff --git a/sys/mips/include/hwfunc.h b/sys/mips/include/hwfunc.h deleted file mode 100644 index 0636e343c62..00000000000 --- a/sys/mips/include/hwfunc.h +++ /dev/null @@ -1,109 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2004 Juli Mallett. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_HWFUNC_H_ -#define _MACHINE_HWFUNC_H_ - -#include - -struct timecounter; - -/* - * Hooks downward into platform functionality. - */ -void platform_reset(void); -void platform_start(__register_t, __register_t, __register_t, __register_t); - -/* For clocks and ticks and such */ -void platform_initclocks(void); -uint64_t platform_get_frequency(void); -unsigned platform_get_timecount(struct timecounter *); - -/* For hardware specific CPU initialization */ -void platform_cpu_init(void); - -#ifdef SMP - -/* - * Spin up the AP so that it starts executing MP bootstrap entry point: mpentry - * - * Returns 0 on sucess and non-zero on failure. - */ -int platform_start_ap(int processor_id); - -/* - * Platform-specific initialization that needs to be done when an AP starts - * running. This function is called from the MP bootstrap code in mpboot.S - */ -void platform_init_ap(int processor_id); - -/* - * Return a plaform-specific interrrupt number that is used to deliver IPIs. - * - * This hardware interrupt is used to deliver IPIs exclusively and must - * not be used for any other interrupt source. - */ -int platform_ipi_hardintr_num(void); -int platform_ipi_softintr_num(void); - -#ifdef PLATFORM_INIT_SECONDARY -/* - * Set up IPIs for this CPU. - */ -void platform_init_secondary(int cpuid); -#endif - -/* - * Trigger a IPI interrupt on 'cpuid'. - */ -void platform_ipi_send(int cpuid); - -/* - * Quiesce the IPI interrupt source on the current cpu. - */ -void platform_ipi_clear(void); - -/* - * Return the processor id. - * - * Note that this function is called in early boot when stack is not available. - */ -extern int platform_processor_id(void); - -/* - * Return the cpumask of available processors. - */ -extern void platform_cpu_mask(cpuset_t *mask); - -/* - * Return the topology of processors on this platform - */ -struct cpu_group *platform_smp_topo(void); - -#endif /* SMP */ - -#endif /* !_MACHINE_HWFUNC_H_ */ diff --git a/sys/mips/include/ieee.h b/sys/mips/include/ieee.h deleted file mode 100644 index bcd44306e29..00000000000 --- a/sys/mips/include/ieee.h +++ /dev/null @@ -1,154 +0,0 @@ -/* $NetBSD: ieee754.h,v 1.4 2003/10/27 02:30:26 simonb Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This software was developed by the Computer Systems Engineering group - * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and - * contributed to Berkeley. - * - * All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Lawrence Berkeley Laboratory. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)ieee.h 8.1 (Berkeley) 6/11/93 - * - */ - -/* - * NOTICE: This is not a standalone file. To use it, #include it in - * your port's ieee.h header. - */ - -#include - -/* - * defines the layout of IEEE 754 floating point types. - * Only single-precision and double-precision types are defined here; - * extended types, if available, are defined in the machine-dependent - * header. - */ - -/* - * Define the number of bits in each fraction and exponent. - * - * k k+1 - * Note that 1.0 x 2 == 0.1 x 2 and that denorms are represented - * - * (-exp_bias+1) - * as fractions that look like 0.fffff x 2 . This means that - * - * -126 - * the number 0.10000 x 2 , for instance, is the same as the normalized - * - * -127 -128 - * float 1.0 x 2 . Thus, to represent 2 , we need one leading zero - * - * -129 - * in the fraction; to represent 2 , we need two, and so on. This - * - * (-exp_bias-fracbits+1) - * implies that the smallest denormalized number is 2 - * - * for whichever format we are talking about: for single precision, for - * - * -126 -149 - * instance, we get .00000000000000000000001 x 2 , or 1.0 x 2 , and - * - * -149 == -127 - 23 + 1. - */ -#define SNG_EXPBITS 8 -#define SNG_FRACBITS 23 - -#define DBL_EXPBITS 11 -#define DBL_FRACBITS 52 - -struct ieee_single { -#if _BYTE_ORDER == _BIG_ENDIAN - u_int sng_sign:1; - u_int sng_exp:8; - u_int sng_frac:23; -#else - u_int sng_frac:23; - u_int sng_exp:8; - u_int sng_sign:1; -#endif -}; - -struct ieee_double { -#if _BYTE_ORDER == _BIG_ENDIAN - u_int dbl_sign:1; - u_int dbl_exp:11; - u_int dbl_frach:20; - u_int dbl_fracl; -#else - u_int dbl_fracl; - u_int dbl_frach:20; - u_int dbl_exp:11; - u_int dbl_sign:1; -#endif -}; - -/* - * Floats whose exponent is in [1..INFNAN) (of whatever type) are - * `normal'. Floats whose exponent is INFNAN are either Inf or NaN. - * Floats whose exponent is zero are either zero (iff all fraction - * bits are zero) or subnormal values. - * - * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its - * high fraction; if the bit is set, it is a `quiet NaN'. - */ -#define SNG_EXP_INFNAN 255 -#define DBL_EXP_INFNAN 2047 - -#if 0 -#define SNG_QUIETNAN (1 << 22) -#define DBL_QUIETNAN (1 << 19) -#endif - -/* - * Exponent biases. - */ -#define SNG_EXP_BIAS 127 -#define DBL_EXP_BIAS 1023 - -/* - * Convenience data structures. - */ -union ieee_single_u { - float sngu_f; - struct ieee_single sngu_sng; -}; - -union ieee_double_u { - double dblu_d; - struct ieee_double dblu_dbl; -}; diff --git a/sys/mips/include/ieeefp.h b/sys/mips/include/ieeefp.h deleted file mode 100644 index ebc746ef1d9..00000000000 --- a/sys/mips/include/ieeefp.h +++ /dev/null @@ -1,33 +0,0 @@ -/* $OpenBSD: ieeefp.h,v 1.2 1999/01/27 04:46:05 imp Exp $ */ - -/*- - * Written by J.T. Conklin, Apr 11, 1995 - * Public domain. - * - * JNPR: ieeefp.h,v 1.1 2006/08/07 05:38:57 katta - */ - -#ifndef _MACHINE_IEEEFP_H_ -#define _MACHINE_IEEEFP_H_ - -/* Deprecated historical FPU control interface */ - -typedef int fp_except; -typedef int fp_except_t; - -#define FP_X_IMP 0x01 /* imprecise (loss of precision) */ -#define FP_X_UFL 0x02 /* underflow exception */ -#define FP_X_OFL 0x04 /* overflow exception */ -#define FP_X_DZ 0x08 /* divide-by-zero exception */ -#define FP_X_INV 0x10 /* invalid operation exception */ - -typedef enum { - FP_RN=0, /* round to nearest representable number */ - FP_RZ=1, /* round to zero (truncate) */ - FP_RP=2, /* round toward positive infinity */ - FP_RM=3 /* round toward negative infinity */ -} fp_rnd; - -typedef fp_rnd fp_rnd_t; - -#endif /* !_MACHINE_IEEEFP_H_ */ diff --git a/sys/mips/include/in_cksum.h b/sys/mips/include/in_cksum.h deleted file mode 100644 index 56dfcb4a8d3..00000000000 --- a/sys/mips/include/in_cksum.h +++ /dev/null @@ -1,53 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1990 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from tahoe: in_cksum.c 1.2 86/01/05 - * from: @(#)in_cksum.c 1.3 (Berkeley) 1/19/91 - * from: Id: in_cksum.c,v 1.8 1995/12/03 18:35:19 bde Exp - * from: src/sys/alpha/include/in_cksum.h,v 1.7 2005/03/02 21:33:20 joerg - */ - -#ifndef _MACHINE_IN_CKSUM_H_ -#define _MACHINE_IN_CKSUM_H_ 1 - -#include - -#define in_cksum(m, len) in_cksum_skip(m, len, 0) - -#ifdef _KERNEL -#if defined(IPVERSION) && (IPVERSION == 4) -u_int in_cksum_hdr(const struct ip *ip); -#endif -u_short in_addword(u_short sum, u_short b); -u_short in_pseudo(u_int sum, u_int b, u_int c); -u_short in_cksum_skip(struct mbuf *m, int len, int skip); -#endif - -#endif /* _MACHINE_IN_CKSUM_H_ */ diff --git a/sys/mips/include/intr.h b/sys/mips/include/intr.h deleted file mode 100644 index 1db3e844685..00000000000 --- a/sys/mips/include/intr.h +++ /dev/null @@ -1,82 +0,0 @@ -/* $NetBSD: intr.h,v 1.7 2003/06/16 20:01:00 thorpej Exp $ */ - -/*- - * Copyright (c) 1997 Mark Brinicombe. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Mark Brinicombe - * for the NetBSD Project. - * 4. The name of the company nor the name of the author may be used to - * endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#ifndef _MACHINE_INTR_H_ -#define _MACHINE_INTR_H_ - -#ifdef INTRNG - -#ifdef FDT -#include -#endif - -#include - -#ifndef MIPS_NIRQ -#define MIPS_NIRQ 128 -#endif - -#ifndef NIRQ -#define NIRQ MIPS_NIRQ -#endif - -#ifndef FDT -#define MIPS_PIC_XREF 1 /**< unique xref */ -#endif - -#define NHARD_IRQS 6 -#define NSOFT_IRQS 2 -#define NREAL_IRQS (NHARD_IRQS + NSOFT_IRQS) - -#define INTR_IRQ_NSPC_SWI 4 - -/* MIPS32 PIC APIs */ -int mips_pic_map_fixed_intrs(void); -int mips_pic_activate_intr(device_t child, struct resource *r); -int mips_pic_deactivate_intr(device_t child, struct resource *r); - -/* MIPS compatibility for legacy mips code */ -void cpu_init_interrupts(void); -void cpu_establish_hardintr(const char *, driver_filter_t *, driver_intr_t *, - void *, int, int, void **); -void cpu_establish_softintr(const char *, driver_filter_t *, void (*)(void*), - void *, int, int, void **); -/* MIPS interrupt C entry point */ -void cpu_intr(struct trapframe *); - -#endif /* INTRNG */ - -#endif /* _MACHINE_INTR_H */ diff --git a/sys/mips/include/intr_machdep.h b/sys/mips/include/intr_machdep.h deleted file mode 100644 index f977055f9ef..00000000000 --- a/sys/mips/include/intr_machdep.h +++ /dev/null @@ -1,76 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_INTR_MACHDEP_H_ -#define _MACHINE_INTR_MACHDEP_H_ - -#include -#include - -#if defined(CPU_RMI) || defined(CPU_NLM) -#define XLR_MAX_INTR 64 -#else -#define NHARD_IRQS 6 -#define NSOFT_IRQS 2 -#endif - -struct trapframe; - -void cpu_init_interrupts(void); -void cpu_establish_hardintr(const char *, driver_filter_t *, driver_intr_t *, - void *, int, int, void **); -void cpu_establish_softintr(const char *, driver_filter_t *, void (*)(void*), - void *, int, int, void **); -void cpu_intr(struct trapframe *); - -/* - * Allow a platform to override the default hard interrupt mask and unmask - * functions. The 'arg' can be cast safely to an 'int' and holds the mips - * hard interrupt number to mask or unmask. - */ -typedef void (*cpu_intr_mask_t)(void *arg); -typedef void (*cpu_intr_unmask_t)(void *arg); -void cpu_set_hardintr_mask_func(cpu_intr_mask_t func); -void cpu_set_hardintr_unmask_func(cpu_intr_unmask_t func); - -/* - * Opaque datatype that represents intr counter - */ -typedef unsigned long* mips_intrcnt_t; - -mips_intrcnt_t mips_intrcnt_create(const char *); -void mips_intrcnt_setname(mips_intrcnt_t, const char *); - -static __inline void -mips_intrcnt_inc(mips_intrcnt_t counter) -{ - if (counter) - atomic_add_long(counter, 1); - VM_CNT_INC(v_intr); -} -#endif /* !_MACHINE_INTR_MACHDEP_H_ */ diff --git a/sys/mips/include/kdb.h b/sys/mips/include/kdb.h deleted file mode 100644 index 034dd0dc029..00000000000 --- a/sys/mips/include/kdb.h +++ /dev/null @@ -1,72 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * from: src/sys/alpha/include/kdb.h,v 1.2 2005/01/05 20:05:50 imp - */ - -#ifndef _MACHINE_KDB_H_ -#define _MACHINE_KDB_H_ - -#include - -#define KDB_STOPPEDPCB(pc) &stoppcbs[pc->pc_cpuid] - -static __inline void -kdb_cpu_clear_singlestep(void) -{ -} - -static __inline void -kdb_cpu_set_singlestep(void) -{ -} - -static __inline void -kdb_cpu_trap(int vector, int _) -{ -} - -static __inline void -kdb_cpu_sync_icache(unsigned char *addr, size_t size) -{ -} - -static __inline int -kdb_cpu_set_watchpoint(vm_offset_t addr, vm_size_t size, int access) -{ - - return (ENXIO); -} - -static __inline int -kdb_cpu_clr_watchpoint(vm_offset_t addr, vm_size_t size) -{ - - return (0); -} - -#endif /* _MACHINE_KDB_H_ */ diff --git a/sys/mips/include/limits.h b/sys/mips/include/limits.h deleted file mode 100644 index 01d75a29c19..00000000000 --- a/sys/mips/include/limits.h +++ /dev/null @@ -1,46 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1988, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)limits.h 8.3 (Berkeley) 1/4/94 - * from: src/sys/i386/include/limits.h,v 1.27 2005/03/02 21:33:26 joerg - */ - -#ifndef _MACHINE_LIMITS_H_ -#define _MACHINE_LIMITS_H_ - -#include - -#ifdef __CC_SUPPORTS_WARNING -#warning "machine/limits.h is deprecated. Include sys/limits.h instead." -#endif - -#include - -#endif /* !_MACHINE_LIMITS_H_ */ diff --git a/sys/mips/include/locore.h b/sys/mips/include/locore.h deleted file mode 100644 index 64ce4cbb776..00000000000 --- a/sys/mips/include/locore.h +++ /dev/null @@ -1,65 +0,0 @@ -/* $NetBSD: locore.h,v 1.78 2007/10/17 19:55:36 garbled Exp $ */ - -/* - * Copyright 1996 The Board of Trustees of The Leland Stanford - * Junior University. All Rights Reserved. - * - * Permission to use, copy, modify, and distribute this - * software and its documentation for any purpose and without - * fee is hereby granted, provided that the above copyright - * notice appear in all copies. Stanford University - * makes no representations about the suitability of this - * software for any purpose. It is provided "as is" without - * express or implied warranty. - */ - -/* - * Jump table for MIPS cpu locore functions that are implemented - * differently on different generations, or instruction-level - * archtecture (ISA) level, the Mips family. - * - * We currently provide support for MIPS I and MIPS III. - */ - -#ifndef _MIPS_LOCORE_H -#define _MIPS_LOCORE_H - -#include -#include -#include -#include - -/* - * CPU identification, from PRID register. - */ - -#define MIPS_PRID_REV(x) (((x) >> 0) & 0x00ff) -#define MIPS_PRID_IMPL(x) (((x) >> 8) & 0x00ff) - -/* pre-MIPS32/64 */ -#define MIPS_PRID_RSVD(x) (((x) >> 16) & 0xffff) -#define MIPS_PRID_REV_MIN(x) ((MIPS_PRID_REV(x) >> 0) & 0x0f) -#define MIPS_PRID_REV_MAJ(x) ((MIPS_PRID_REV(x) >> 4) & 0x0f) - -/* MIPS32/64 */ -#define MIPS_PRID_CID(x) (((x) >> 16) & 0x00ff) /* Company ID */ -#define MIPS_PRID_CID_PREHISTORIC 0x00 /* Not MIPS32/64 */ -#define MIPS_PRID_CID_MTI 0x01 /* MIPS Technologies, Inc. */ -#define MIPS_PRID_CID_BROADCOM 0x02 /* Broadcom */ -#define MIPS_PRID_CID_ALCHEMY 0x03 /* Alchemy Semiconductor */ -#define MIPS_PRID_CID_SIBYTE 0x04 /* SiByte */ -#define MIPS_PRID_CID_SANDCRAFT 0x05 /* SandCraft */ -#define MIPS_PRID_CID_PHILIPS 0x06 /* Philips */ -#define MIPS_PRID_CID_TOSHIBA 0x07 /* Toshiba */ -#define MIPS_PRID_CID_LSI 0x08 /* LSI */ - /* 0x09 unannounced */ - /* 0x0a unannounced */ -#define MIPS_PRID_CID_LEXRA 0x0b /* Lexra */ -#define MIPS_PRID_CID_RMI 0x0c /* RMI */ -#define MIPS_PRID_CID_CAVIUM 0x0d /* Cavium */ -#define MIPS_PRID_CID_INGENIC 0xe1 /* Ingenic */ -#define MIPS_PRID_CID_INGENIC2 0xd1 /* Ingenic */ - -#define MIPS_PRID_COPTS(x) (((x) >> 24) & 0x00ff) /* Company Options */ - -#endif /* _MIPS_LOCORE_H */ diff --git a/sys/mips/include/md_var.h b/sys/mips/include/md_var.h deleted file mode 100644 index ac2b7b69213..00000000000 --- a/sys/mips/include/md_var.h +++ /dev/null @@ -1,84 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1995 Bruce D. Evans. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: src/sys/i386/include/md_var.h,v 1.35 2000/02/20 20:51:23 bsd - * JNPR: md_var.h,v 1.4 2006/10/16 12:30:34 katta - */ - -#ifndef _MACHINE_MD_VAR_H_ -#define _MACHINE_MD_VAR_H_ - -#include - -/* - * Miscellaneous machine-dependent declarations. - */ -extern long Maxmem; -extern char cpu_board[]; -extern char cpu_model[]; -extern char sigcode[]; -extern int szsigcode; -#if defined(__mips_n32) || defined(__mips_n64) -extern char sigcode32[]; -extern int szsigcode32; -#endif - -extern vm_offset_t kstack0; -extern vm_offset_t kernel_kseg0_end; - -uint32_t MipsFPID(void); -void MipsSaveCurFPState(struct thread *); -void fork_trampoline(void); -uintptr_t MipsEmulateBranch(struct trapframe *, uintptr_t, int, uintptr_t); -void MipsSwitchFPState(struct thread *, struct trapframe *); -int is_cacheable_mem(vm_paddr_t addr); -void mips_wait(void); - -#define MIPS_DEBUG 0 - -#if MIPS_DEBUG -#define MIPS_DEBUG_PRINT(fmt, args...) printf("%s: " fmt "\n" , __FUNCTION__ , ## args) -#else -#define MIPS_DEBUG_PRINT(fmt, args...) -#endif - -void mips_vector_init(void); -void mips_cpu_init(void); -void mips_pcpu0_init(void); -void mips_proc0_init(void); -void mips_postboot_fixup(void); -void cpu_identify(void); -void cpu_switch_set_userlocal(void) __asm(__STRING(cpu_switch_set_userlocal)); - -struct dumperinfo; -struct minidumpstate; -int cpu_minidumpsys(struct dumperinfo *, const struct minidumpstate *); - -#endif /* !_MACHINE_MD_VAR_H_ */ diff --git a/sys/mips/include/memdev.h b/sys/mips/include/memdev.h deleted file mode 100644 index c0fb9b171a8..00000000000 --- a/sys/mips/include/memdev.h +++ /dev/null @@ -1,42 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 Mark R V Murray - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer - * in this position and unchanged. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * from: src/sys/alpha/include/memdev.h,v 1.2 2004/08/01 18:51:44 markm - */ - -#ifndef _MACHINE_MEMDEV_H_ -#define _MACHINE_MEMDEV_H_ - -#define CDEV_MINOR_MEM 0 -#define CDEV_MINOR_KMEM 1 - -d_open_t memopen; -d_read_t memrw; -d_ioctl_t memioctl_md; -d_mmap_t memmmap; - -#endif /* _MACHINE_MEMDEV_H_ */ diff --git a/sys/mips/include/metadata.h b/sys/mips/include/metadata.h deleted file mode 100644 index e59df8e3464..00000000000 --- a/sys/mips/include/metadata.h +++ /dev/null @@ -1,35 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003 Peter Wemm - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_METADATA_H_ -#define _MACHINE_METADATA_H_ - -#define MODINFOMD_SMAP 0x1001 -#define MODINFOMD_DTBP 0x1002 - -#endif /* !_MACHINE_METADATA_H_ */ diff --git a/sys/mips/include/minidump.h b/sys/mips/include/minidump.h deleted file mode 100644 index a37ba39ad2f..00000000000 --- a/sys/mips/include/minidump.h +++ /dev/null @@ -1,47 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Peter Wemm - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE_MINIDUMP_H_ -#define _MACHINE_MINIDUMP_H_ 1 - -#define MINIDUMP_MAGIC "minidump FreeBSD/mips" -#define MINIDUMP_VERSION 2 - -struct minidumphdr { - char magic[24]; - uint32_t version; - uint32_t msgbufsize; - uint32_t bitmapsize; - uint32_t ptesize; - uint64_t kernbase; - uint64_t dmapbase; - uint64_t dmapend; - uint32_t dumpavailsize; -}; - -#endif /* _MACHINE_MINIDUMP_H_ */ diff --git a/sys/mips/include/mips_opcode.h b/sys/mips/include/mips_opcode.h deleted file mode 100644 index 5a98487785c..00000000000 --- a/sys/mips/include/mips_opcode.h +++ /dev/null @@ -1,423 +0,0 @@ -/* $OpenBSD: mips_opcode.h,v 1.2 1999/01/27 04:46:05 imp Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)mips_opcode.h 8.1 (Berkeley) 6/10/93 - * JNPR: mips_opcode.h,v 1.1 2006/08/07 05:38:57 katta - */ - -#ifndef _MACHINE_MIPS_OPCODE_H_ -#define _MACHINE_MIPS_OPCODE_H_ - -/* - * Define the instruction formats and opcode values for the - * MIPS instruction set. - */ -#include - -/* - * Define the instruction formats. - */ -typedef union { - unsigned word; - -#if BYTE_ORDER == BIG_ENDIAN - struct { - unsigned op: 6; - unsigned rs: 5; - unsigned rt: 5; - unsigned imm: 16; - } IType; - - struct { - unsigned op: 6; - unsigned target: 26; - } JType; - - struct { - unsigned op: 6; - unsigned rs: 5; - unsigned rt: 5; - unsigned rd: 5; - unsigned shamt: 5; - unsigned func: 6; - } RType; - - struct { - unsigned op: 6; /* always '0x11' */ - unsigned : 1; /* always '1' */ - unsigned fmt: 4; - unsigned ft: 5; - unsigned fs: 5; - unsigned fd: 5; - unsigned func: 6; - } FRType; -#endif -#if BYTE_ORDER == LITTLE_ENDIAN - struct { - unsigned imm: 16; - unsigned rt: 5; - unsigned rs: 5; - unsigned op: 6; - } IType; - - struct { - unsigned target: 26; - unsigned op: 6; - } JType; - - struct { - unsigned func: 6; - unsigned shamt: 5; - unsigned rd: 5; - unsigned rt: 5; - unsigned rs: 5; - unsigned op: 6; - } RType; - - struct { - unsigned func: 6; - unsigned fd: 5; - unsigned fs: 5; - unsigned ft: 5; - unsigned fmt: 4; - unsigned : 1; /* always '1' */ - unsigned op: 6; /* always '0x11' */ - } FRType; -#endif -} InstFmt; - -/* instruction field decoding macros */ -#define MIPS_INST_OPCODE(val) (val >> 26) -#define MIPS_INST_RS(val) ((val & 0x03e00000) >> 21) -#define MIPS_INST_RT(val) ((val & 0x001f0000) >> 16) -#define MIPS_INST_IMM(val) ((val & 0x0000ffff)) - -#define MIPS_INST_RD(val) ((val & 0x0000f800) >> 11) -#define MIPS_INST_SA(val) ((val & 0x000007c0) >> 6) -#define MIPS_INST_FUNC(val) (val & 0x0000003f) - -#define MIPS_INST_INDEX(val) (val & 0x03ffffff) - -/* - * the mips opcode and function table use a 3bit row and 3bit col - * number we define the following macro for easy transcribing - */ - -#define MIPS_OPCODE(r, c) (((r & 0x07) << 3) | (c & 0x07)) - -/* - * Values for the 'op' field. - */ -#define OP_SPECIAL 000 -#define OP_BCOND 001 -#define OP_J 002 -#define OP_JAL 003 -#define OP_BEQ 004 -#define OP_BNE 005 -#define OP_BLEZ 006 -#define OP_BGTZ 007 - -#define OP_REGIMM OP_BCOND - -#define OP_ADDI 010 -#define OP_ADDIU 011 -#define OP_SLTI 012 -#define OP_SLTIU 013 -#define OP_ANDI 014 -#define OP_ORI 015 -#define OP_XORI 016 -#define OP_LUI 017 - -#define OP_COP0 020 -#define OP_COP1 021 -#define OP_COP2 022 -#define OP_COP3 023 -#define OP_BEQL 024 -#define OP_BNEL 025 -#define OP_BLEZL 026 -#define OP_BGTZL 027 - -#define OP_COP1X OP_COP3 - -#define OP_DADDI 030 -#define OP_DADDIU 031 -#define OP_LDL 032 -#define OP_LDR 033 - -#define OP_SPECIAL2 034 -#define OP_JALX 035 - -#define OP_SPECIAL3 037 - -#define OP_LB 040 -#define OP_LH 041 -#define OP_LWL 042 -#define OP_LW 043 -#define OP_LBU 044 -#define OP_LHU 045 -#define OP_LWR 046 -#define OP_LWU 047 - -#define OP_SB 050 -#define OP_SH 051 -#define OP_SWL 052 -#define OP_SW 053 -#define OP_SDL 054 -#define OP_SDR 055 -#define OP_SWR 056 -#define OP_CACHE 057 - -#define OP_LL 060 -#define OP_LWC1 061 -#define OP_LWC2 062 -#define OP_LWC3 063 -#define OP_LLD 064 -#define OP_LDC1 065 -#define OP_LDC2 066 -#define OP_LD 067 - -#define OP_PREF OP_LWC3 - -#define OP_SC 070 -#define OP_SWC1 071 -#define OP_SWC2 072 -#define OP_SWC3 073 -#define OP_SCD 074 -#define OP_SDC1 075 -#define OP_SDC2 076 -#define OP_SD 077 - -/* - * Values for the 'func' field when 'op' == OP_SPECIAL. - */ -#define OP_SLL 000 -#define OP_MOVCI 001 -#define OP_SRL 002 -#define OP_SRA 003 -#define OP_SLLV 004 -#define OP_SRLV 006 -#define OP_SRAV 007 - -#define OP_F_SLL OP_SLL -#define OP_F_MOVCI OP_MOVCI -#define OP_F_SRL OP_SRL -#define OP_F_SRA OP_SRA -#define OP_F_SLLV OP_SLLV -#define OP_F_SRLV OP_SRLV -#define OP_F_SRAV OP_SRAV - -#define OP_JR 010 -#define OP_JALR 011 -#define OP_MOVZ 012 -#define OP_MOVN 013 -#define OP_SYSCALL 014 -#define OP_BREAK 015 -#define OP_SYNC 017 - -#define OP_F_JR OP_JR -#define OP_F_JALR OP_JALR -#define OP_F_MOVZ OP_MOVZ -#define OP_F_MOVN OP_MOVN -#define OP_F_SYSCALL OP_SYSCALL -#define OP_F_BREAK OP_BREAK -#define OP_F_SYNC OP_SYNC - -#define OP_MFHI 020 -#define OP_MTHI 021 -#define OP_MFLO 022 -#define OP_MTLO 023 -#define OP_DSLLV 024 -#define OP_DSRLV 026 -#define OP_DSRAV 027 - -#define OP_F_MFHI OP_MFHI -#define OP_F_MTHI OP_MTHI -#define OP_F_MFLO OP_MFLO -#define OP_F_MTLO OP_MTLO -#define OP_F_DSLLV OP_DSLLV -#define OP_F_DSRLV OP_DSRLV -#define OP_F_DSRAV OP_DSRAV - -#define OP_MULT 030 -#define OP_MULTU 031 -#define OP_DIV 032 -#define OP_DIVU 033 -#define OP_DMULT 034 -#define OP_DMULTU 035 -#define OP_DDIV 036 -#define OP_DDIVU 037 - -#define OP_F_MULT OP_MULT -#define OP_F_MULTU OP_MULTU -#define OP_F_DIV OP_DIV -#define OP_F_DIVU OP_DIVU -#define OP_F_DMULT OP_DMULT -#define OP_F_DMULTU OP_DMULTU -#define OP_F_DDIV OP_DDIV -#define OP_F_DDIVU OP_DDIVU - -#define OP_ADD 040 -#define OP_ADDU 041 -#define OP_SUB 042 -#define OP_SUBU 043 -#define OP_AND 044 -#define OP_OR 045 -#define OP_XOR 046 -#define OP_NOR 047 - -#define OP_F_ADD OP_ADD -#define OP_F_ADDU OP_ADDU -#define OP_F_SUB OP_SUB -#define OP_F_SUBU OP_SUBU -#define OP_F_AND OP_AND -#define OP_F_OR OP_OR -#define OP_F_XOR OP_XOR -#define OP_F_NOR OP_NOR - -#define OP_SLT 052 -#define OP_SLTU 053 -#define OP_DADD 054 -#define OP_DADDU 055 -#define OP_DSUB 056 -#define OP_DSUBU 057 - -#define OP_F_SLT OP_SLT -#define OP_F_SLTU OP_SLTU -#define OP_F_DADD OP_DADD -#define OP_F_DADDU OP_DADDU -#define OP_F_DSUB OP_DSUB -#define OP_F_DSUBU OP_DSUBU - -#define OP_TGE 060 -#define OP_TGEU 061 -#define OP_TLT 062 -#define OP_TLTU 063 -#define OP_TEQ 064 -#define OP_TNE 066 - -#define OP_F_TGE OP_TGE -#define OP_F_TGEU OP_TGEU -#define OP_F_TLT OP_TLT -#define OP_F_TLTU OP_TLTU -#define OP_F_TEQ OP_TEQ -#define OP_F_TNE OP_TNE - -#define OP_DSLL 070 -#define OP_DSRL 072 -#define OP_DSRA 073 -#define OP_DSLL32 074 -#define OP_DSRL32 076 -#define OP_DSRA32 077 - -#define OP_F_DSLL OP_DSLL -#define OP_F_DSRL OP_DSRL -#define OP_F_DSRA OP_DSRA -#define OP_F_DSLL32 OP_DSLL32 -#define OP_F_DSRL32 OP_DSRL32 -#define OP_F_DSRA32 OP_DSRA32 - -/* - * The REGIMM - register immediate instructions are further - * decoded using this table that has 2bit row numbers, hence - * a need for a new helper macro. - */ - -#define MIPS_ROP(r, c) ((r & 0x03) << 3) | (c & 0x07) - -/* - * Values for the 'func' field when 'op' == OP_BCOND. - */ -#define OP_BLTZ 000 -#define OP_BGEZ 001 -#define OP_BLTZL 002 -#define OP_BGEZL 003 - -#define OP_R_BLTZ OP_BLTZ -#define OP_R_BGEZ OP_BGEZ -#define OP_R_BLTZL OP_BLTZL -#define OP_R_BGEZL OP_BGEZL - -#define OP_TGEI 010 -#define OP_TGEIU 011 -#define OP_TLTI 012 -#define OP_TLTIU 013 -#define OP_TEQI 014 -#define OP_TNEI 016 - -#define OP_R_TGEI OP_TGEI -#define OP_R_TGEIU OP_TGEIU -#define OP_R_TLTI OP_TLTI -#define OP_R_TLTIU OP_TLTIU -#define OP_R_TEQI OP_TEQI -#define OP_R_TNEI OP_TNEI - -#define OP_BLTZAL 020 -#define OP_BGEZAL 021 -#define OP_BLTZALL 022 -#define OP_BGEZALL 023 - -#define OP_R_BLTZAL OP_BLTZAL -#define OP_R_BGEZAL OP_BGEZAL -#define OP_R_BLTZALL OP_BLTZALL -#define OP_R_BGEZALL OP_BGEZALL - -/* - * Values for the 'func' field when 'op' == OP_SPECIAL3. - */ -#define OP_RDHWR 073 - -/* - * Values for the 'rs' field when 'op' == OP_COPz. - */ -#define OP_MF 000 -#define OP_DMF 001 -#define OP_MT 004 -#define OP_DMT 005 -#define OP_BCx 010 -#define OP_BCy 014 -#define OP_CF 002 -#define OP_CT 006 - -/* - * Values for the 'rt' field when 'op' == OP_COPz. - */ -#define COPz_BC_TF_MASK 0x01 -#define COPz_BC_TRUE 0x01 -#define COPz_BC_FALSE 0x00 -#define COPz_BCL_TF_MASK 0x02 -#define COPz_BCL_TRUE 0x02 -#define COPz_BCL_FALSE 0x00 - -#endif /* !_MACHINE_MIPS_OPCODE_H_ */ diff --git a/sys/mips/include/octeon_cop2.h b/sys/mips/include/octeon_cop2.h deleted file mode 100644 index 0e832bbdf97..00000000000 --- a/sys/mips/include/octeon_cop2.h +++ /dev/null @@ -1,215 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#ifndef __OCTEON_COP2_H__ -#define __OCTEON_COP2_H__ - -/* - * COP2 registers of interest - */ -#define COP2_CRC_IV 0x201 -#define COP2_CRC_IV_SET COP2_CRC_IV -#define COP2_CRC_LENGTH 0x202 -#define COP2_CRC_LENGTH_SET 0x1202 -#define COP2_CRC_POLY 0x200 -#define COP2_CRC_POLY_SET 0x4200 -#define COP2_LLM_DAT0 0x402 -#define COP2_LLM_DAT0_SET COP2_LLM_DAT0 -#define COP2_LLM_DAT1 0x40A -#define COP2_LLM_DAT1_SET COP2_LLM_DAT1 -#define COP2_3DES_IV 0x084 -#define COP2_3DES_IV_SET COP2_3DES_IV -#define COP2_3DES_KEY0 0x080 -#define COP2_3DES_KEY0_SET COP2_3DES_KEY0 -#define COP2_3DES_KEY1 0x081 -#define COP2_3DES_KEY1_SET COP2_3DES_KEY1 -#define COP2_3DES_KEY2 0x082 -#define COP2_3DES_KEY2_SET COP2_3DES_KEY2 -#define COP2_3DES_RESULT 0x088 -#define COP2_3DES_RESULT_SET 0x098 -#define COP2_AES_INP0 0x111 -#define COP2_AES_INP0_SET COP2_AES_INP0 -#define COP2_AES_IV0 0x102 -#define COP2_AES_IV0_SET COP2_AES_IV0 -#define COP2_AES_IV1 0x103 -#define COP2_AES_IV1_SET COP2_AES_IV1 -#define COP2_AES_KEY0 0x104 -#define COP2_AES_KEY0_SET COP2_AES_KEY0 -#define COP2_AES_KEY1 0x105 -#define COP2_AES_KEY1_SET COP2_AES_KEY1 -#define COP2_AES_KEY2 0x106 -#define COP2_AES_KEY2_SET COP2_AES_KEY2 -#define COP2_AES_KEY3 0x107 -#define COP2_AES_KEY3_SET COP2_AES_KEY3 -#define COP2_AES_KEYLEN 0x110 -#define COP2_AES_KEYLEN_SET COP2_AES_KEYLEN -#define COP2_AES_RESULT0 0x100 -#define COP2_AES_RESULT0_SET COP2_AES_RESULT0 -#define COP2_AES_RESULT1 0x101 -#define COP2_AES_RESULT1_SET COP2_AES_RESULT1 -#define COP2_HSH_DATW0 0x240 -#define COP2_HSH_DATW0_SET COP2_HSH_DATW0 -#define COP2_HSH_DATW1 0x241 -#define COP2_HSH_DATW1_SET COP2_HSH_DATW1 -#define COP2_HSH_DATW2 0x242 -#define COP2_HSH_DATW2_SET COP2_HSH_DATW2 -#define COP2_HSH_DATW3 0x243 -#define COP2_HSH_DATW3_SET COP2_HSH_DATW3 -#define COP2_HSH_DATW4 0x244 -#define COP2_HSH_DATW4_SET COP2_HSH_DATW4 -#define COP2_HSH_DATW5 0x245 -#define COP2_HSH_DATW5_SET COP2_HSH_DATW5 -#define COP2_HSH_DATW6 0x246 -#define COP2_HSH_DATW6_SET COP2_HSH_DATW6 -#define COP2_HSH_DATW7 0x247 -#define COP2_HSH_DATW7_SET COP2_HSH_DATW7 -#define COP2_HSH_DATW8 0x248 -#define COP2_HSH_DATW8_SET COP2_HSH_DATW8 -#define COP2_HSH_DATW9 0x249 -#define COP2_HSH_DATW9_SET COP2_HSH_DATW9 -#define COP2_HSH_DATW10 0x24A -#define COP2_HSH_DATW10_SET COP2_HSH_DATW10 -#define COP2_HSH_DATW11 0x24B -#define COP2_HSH_DATW11_SET COP2_HSH_DATW11 -#define COP2_HSH_DATW12 0x24C -#define COP2_HSH_DATW12_SET COP2_HSH_DATW12 -#define COP2_HSH_DATW13 0x24D -#define COP2_HSH_DATW13_SET COP2_HSH_DATW13 -#define COP2_HSH_DATW14 0x24E -#define COP2_HSH_DATW14_SET COP2_HSH_DATW14 -#define COP2_HSH_IVW0 0x250 -#define COP2_HSH_IVW0_SET COP2_HSH_IVW0 -#define COP2_HSH_IVW1 0x251 -#define COP2_HSH_IVW1_SET COP2_HSH_IVW1 -#define COP2_HSH_IVW2 0x252 -#define COP2_HSH_IVW2_SET COP2_HSH_IVW2 -#define COP2_HSH_IVW3 0x253 -#define COP2_HSH_IVW3_SET COP2_HSH_IVW3 -#define COP2_HSH_IVW4 0x254 -#define COP2_HSH_IVW4_SET COP2_HSH_IVW4 -#define COP2_HSH_IVW5 0x255 -#define COP2_HSH_IVW5_SET COP2_HSH_IVW5 -#define COP2_HSH_IVW6 0x256 -#define COP2_HSH_IVW6_SET COP2_HSH_IVW6 -#define COP2_HSH_IVW7 0x257 -#define COP2_HSH_IVW7_SET COP2_HSH_IVW7 -#define COP2_GFM_MULT0 0x258 -#define COP2_GFM_MULT0_SET COP2_GFM_MULT0 -#define COP2_GFM_MULT1 0x259 -#define COP2_GFM_MULT1_SET COP2_GFM_MULT1 -#define COP2_GFM_POLY 0x25E -#define COP2_GFM_POLY_SET COP2_GFM_POLY -#define COP2_GFM_RESULT0 0x25A -#define COP2_GFM_RESULT0_SET COP2_GFM_RESULT0 -#define COP2_GFM_RESULT1 0x25B -#define COP2_GFM_RESULT1_SET COP2_GFM_RESULT1 -#define COP2_HSH_DATW0_PASS1 0x040 -#define COP2_HSH_DATW0_PASS1_SET COP2_HSH_DATW0_PASS1 -#define COP2_HSH_DATW1_PASS1 0x041 -#define COP2_HSH_DATW1_PASS1_SET COP2_HSH_DATW1_PASS1 -#define COP2_HSH_DATW2_PASS1 0x042 -#define COP2_HSH_DATW2_PASS1_SET COP2_HSH_DATW2_PASS1 -#define COP2_HSH_DATW3_PASS1 0x043 -#define COP2_HSH_DATW3_PASS1_SET COP2_HSH_DATW3_PASS1 -#define COP2_HSH_DATW4_PASS1 0x044 -#define COP2_HSH_DATW4_PASS1_SET COP2_HSH_DATW4_PASS1 -#define COP2_HSH_DATW5_PASS1 0x045 -#define COP2_HSH_DATW5_PASS1_SET COP2_HSH_DATW5_PASS1 -#define COP2_HSH_DATW6_PASS1 0x046 -#define COP2_HSH_DATW6_PASS1_SET COP2_HSH_DATW6_PASS1 -#define COP2_HSH_IVW0_PASS1 0x048 -#define COP2_HSH_IVW0_PASS1_SET COP2_HSH_IVW0_PASS1 -#define COP2_HSH_IVW1_PASS1 0x049 -#define COP2_HSH_IVW1_PASS1_SET COP2_HSH_IVW1_PASS1 -#define COP2_HSH_IVW2_PASS1 0x04A -#define COP2_HSH_IVW2_PASS1_SET COP2_HSH_IVW2_PASS1 - -#ifndef LOCORE - -struct octeon_cop2_state { - /* 3DES */ - /* 0x0084 */ - unsigned long _3des_iv; - /* 0x0080..0x0082 */ - unsigned long _3des_key[3]; - /* 0x0088, set: 0x0098 */ - unsigned long _3des_result; - - /* AES */ - /* 0x0111 */ - unsigned long aes_inp0; - /* 0x0102..0x0103 */ - unsigned long aes_iv[2]; - /* 0x0104..0x0107 */ - unsigned long aes_key[4]; - /* 0x0110 */ - unsigned long aes_keylen; - /* 0x0100..0x0101 */ - unsigned long aes_result[2]; - - /* CRC */ - /* 0x0201 */ - unsigned long crc_iv; - /* 0x0202, set: 0x1202 */ - unsigned long crc_length; - /* 0x0200, set: 0x4200 */ - unsigned long crc_poly; - - /* Low-latency memory stuff */ - /* 0x0402, 0x040A */ - unsigned long llm_dat[2]; - - /* SHA & MD5 */ - /* 0x0240..0x024E */ - unsigned long hsh_datw[15]; - /* 0x0250..0x0257 */ - unsigned long hsh_ivw[8]; - - /* GFM */ - /* 0x0258..0x0259 */ - unsigned long gfm_mult[2]; - /* 0x025E */ - unsigned long gfm_poly; - /* 0x025A..0x025B */ - unsigned long gfm_result[2]; -}; - -/* Prototypes */ - -struct octeon_cop2_state* octeon_cop2_alloc_ctx(void); -void octeon_cop2_free_ctx(struct octeon_cop2_state *); -/* - * Save/restore part - */ -void octeon_cop2_save(struct octeon_cop2_state *); -void octeon_cop2_restore(struct octeon_cop2_state *); - -#endif /* LOCORE */ -#endif /* __OCTEON_COP2_H__ */ diff --git a/sys/mips/include/ofw_machdep.h b/sys/mips/include/ofw_machdep.h deleted file mode 100644 index e2875aa151b..00000000000 --- a/sys/mips/include/ofw_machdep.h +++ /dev/null @@ -1,45 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2001 by Thomas Moestl . - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE_OFW_MACHDEP_H_ -#define _MACHINE_OFW_MACHDEP_H_ - -#include -#include -#include -#include - -typedef uint32_t cell_t; -struct mem_region { - vm_offset_t mr_start; - vm_size_t mr_size; -}; - -void OF_getetheraddr(device_t dev, u_char *addr); -void OF_initial_setup(void *fdt_ptr, void *junk, int (*openfirm)(void *)); - -#endif /* _MACHINE_OFW_MACHDEP_H_ */ diff --git a/sys/mips/include/param.h b/sys/mips/include/param.h deleted file mode 100644 index d56e7caae07..00000000000 --- a/sys/mips/include/param.h +++ /dev/null @@ -1,187 +0,0 @@ -/* $OpenBSD: param.h,v 1.11 1998/08/30 22:05:35 millert Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: Utah Hdr: machparam.h 1.11 89/08/14 - * from: @(#)param.h 8.1 (Berkeley) 6/10/93 - * JNPR: param.h,v 1.6.2.1 2007/09/10 07:49:36 girish - */ - -#ifndef _MIPS_INCLUDE_PARAM_H_ -#define _MIPS_INCLUDE_PARAM_H_ - -#include - -#include -#ifdef _KERNEL -#ifndef _LOCORE -#include -#endif -#endif - -#define __PCI_REROUTE_INTERRUPT - -#if _BYTE_ORDER == _BIG_ENDIAN -# define _EL_SUFFIX "" -#else -# define _EL_SUFFIX "el" -#endif - -#ifdef __mips_n64 -# define _N64_SUFFIX "64" -#elif defined(__mips_n32) -# define _N64_SUFFIX "n32" -#else -# define _N64_SUFFIX "" -#endif - -#ifdef __mips_hard_float -# define _HF_SUFFIX "hf" -#else -# define _HF_SUFFIX "" -#endif - -#ifndef MACHINE -# define MACHINE "mips" -#endif -#ifndef MACHINE_ARCH -# define MACHINE_ARCH "mips" _N64_SUFFIX _EL_SUFFIX _HF_SUFFIX -#endif -#ifdef __mips_n64 -# ifndef MACHINE_ARCH32 -# define MACHINE_ARCH32 "mips" _EL_SUFFIX _HF_SUFFIX -# endif -#endif - -/* - * OBJFORMAT_NAMES is a comma-separated list of the object formats - * that are supported on the architecture. - */ -#define OBJFORMAT_NAMES "elf" -#define OBJFORMAT_DEFAULT "elf" - -#define MID_MACHINE 0 /* None but has to be defined */ - -#ifdef SMP -#define MAXSMPCPU 32 -#ifndef MAXCPU -#define MAXCPU MAXSMPCPU -#endif -#else -#define MAXSMPCPU 1 -#define MAXCPU 1 -#endif - -#ifndef MAXMEMDOM -#define MAXMEMDOM 1 -#endif - -/* - * Round p (pointer or byte index) up to a correctly-aligned value for all - * data types (int, long, ...). The result is u_int and must be cast to - * any desired pointer type. - */ - -#define ALIGNBYTES _ALIGNBYTES -#define ALIGN(p) _ALIGN(p) -/* - * ALIGNED_POINTER is a boolean macro that checks whether an address - * is valid to fetch data elements of type t from on this architecture. - * This does not reflect the optimal alignment, just the possibility - * (within reasonable limits). - */ -#define ALIGNED_POINTER(p, t) ((((unsigned long)(p)) & (sizeof (t) - 1)) == 0) - -/* - * CACHE_LINE_SIZE is the compile-time maximum cache line size for an - * architecture. It should be used with appropriate caution. - */ -#define CACHE_LINE_SHIFT 6 -#define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT) - -#define PAGE_SHIFT 12 /* LOG2(PAGE_SIZE) */ -#define PAGE_SIZE (1<> PAGE_SHIFT) -#define ptoa(x) ((x) << PAGE_SHIFT) - -#define pgtok(x) ((x) * (PAGE_SIZE / 1024)) - -#endif /* !_MIPS_INCLUDE_PARAM_H_ */ diff --git a/sys/mips/include/pcb.h b/sys/mips/include/pcb.h deleted file mode 100644 index 2bea407daac..00000000000 --- a/sys/mips/include/pcb.h +++ /dev/null @@ -1,142 +0,0 @@ -/* $OpenBSD: pcb.h,v 1.3 1998/09/15 10:50:12 pefo Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: Utah Hdr: pcb.h 1.13 89/04/23 - * from: @(#)pcb.h 8.1 (Berkeley) 6/10/93 - * JNPR: pcb.h,v 1.2 2006/08/07 11:51:17 katta - */ - -#ifndef _MACHINE_PCB_H_ -#define _MACHINE_PCB_H_ - -/* - * used by switch.S - */ -#define PCB_REG_S0 0 -#define PCB_REG_S1 1 -#define PCB_REG_S2 2 -#define PCB_REG_S3 3 -#define PCB_REG_S4 4 -#define PCB_REG_S5 5 -#define PCB_REG_S6 6 -#define PCB_REG_S7 7 -#define PCB_REG_SP 8 -#define PCB_REG_S8 9 -#define PCB_REG_RA 10 -#define PCB_REG_SR 11 -#define PCB_REG_GP 12 -#define PCB_REG_PC 13 - -/* - * Call ast if required - * - * XXX Do we really need to disable interrupts? - */ -#define DO_AST \ -44: \ - mfc0 t0, MIPS_COP_0_STATUS ;\ - and a0, t0, MIPS_SR_INT_IE ;\ - xor t0, a0, t0 ;\ - mtc0 t0, MIPS_COP_0_STATUS ;\ - COP0_SYNC ;\ - GET_CPU_PCPU(s1) ;\ - PTR_L s3, PC_CURPCB(s1) ;\ - PTR_L s1, PC_CURTHREAD(s1) ;\ - lw s2, TD_FLAGS(s1) ;\ - li s0, TDF_ASTPENDING | TDF_NEEDRESCHED;\ - and s2, s0 ;\ - mfc0 t0, MIPS_COP_0_STATUS ;\ - or t0, a0, t0 ;\ - mtc0 t0, MIPS_COP_0_STATUS ;\ - COP0_SYNC ;\ - beq s2, zero, 4f ;\ - nop ;\ - PTR_LA s0, _C_LABEL(ast) ;\ - jalr s0 ;\ - PTR_ADDU a0, s3, U_PCB_REGS ;\ - j 44b ;\ - nop ;\ -4: - -#define SAVE_U_PCB_REG(reg, offs, base) \ - REG_S reg, U_PCB_REGS + (SZREG * offs) (base) - -#define RESTORE_U_PCB_REG(reg, offs, base) \ - REG_L reg, U_PCB_REGS + (SZREG * offs) (base) - -#define SAVE_U_PCB_FPREG(reg, offs, base) \ - FP_S reg, U_PCB_FPREGS + (SZFPREG * offs) (base) - -#define RESTORE_U_PCB_FPREG(reg, offs, base) \ - FP_L reg, U_PCB_FPREGS + (SZFPREG * offs) (base) - -#define SAVE_U_PCB_FPSR(reg, offs, base) \ - REG_S reg, U_PCB_FPREGS + (SZFPREG * offs) (base) - -#define RESTORE_U_PCB_FPSR(reg, offs, base) \ - REG_L reg, U_PCB_FPREGS + (SZFPREG * offs) (base) - -#define SAVE_U_PCB_CONTEXT(reg, offs, base) \ - REG_S reg, U_PCB_CONTEXT + (SZREG * offs) (base) - -#define RESTORE_U_PCB_CONTEXT(reg, offs, base) \ - REG_L reg, U_PCB_CONTEXT + (SZREG * offs) (base) - -#ifndef LOCORE -#include - -/* - * MIPS process control block - */ -struct pcb -{ - struct trapframe pcb_regs; /* saved CPU and registers */ - __register_t pcb_context[14]; /* kernel context for resume */ - void *pcb_onfault; /* for copyin/copyout faults */ - register_t pcb_tpc; -}; - -#ifdef _KERNEL -extern struct pcb *curpcb; /* the current running pcb */ - -void makectx(struct trapframe *, struct pcb *); -int savectx(struct pcb *) __returns_twice; - -#endif -#endif - -#endif /* !_MACHINE_PCB_H_ */ diff --git a/sys/mips/include/pcpu.h b/sys/mips/include/pcpu.h deleted file mode 100644 index d9a030b5746..00000000000 --- a/sys/mips/include/pcpu.h +++ /dev/null @@ -1,99 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1999 Luoqi Chen - * Copyright (c) Peter Wemm - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: src/sys/alpha/include/pcpu.h,v 1.15 2004/11/05 19:16:44 jhb - */ - -#ifndef _MACHINE_PCPU_H_ -#define _MACHINE_PCPU_H_ - -#include -#include - -#define PCPU_MD_COMMON_FIELDS \ - pd_entry_t *pc_segbase; /* curthread segbase */ \ - struct pmap *pc_curpmap; /* pmap of curthread */ \ - u_int32_t pc_next_asid; /* next ASID to alloc */ \ - u_int32_t pc_asid_generation; /* current ASID generation */ \ - u_int pc_pending_ipis; /* IPIs pending to this CPU */ \ - struct pcpu *pc_self; /* globally-uniqe self pointer */ - -#ifdef __mips_n64 -#define PCPU_MD_MIPS64_FIELDS \ - PCPU_MD_COMMON_FIELDS \ - char __pad[245] -#else -#define PCPU_MD_MIPS32_FIELDS \ - PCPU_MD_COMMON_FIELDS \ - pt_entry_t *pc_cmap1_ptep; /* PTE for copy window 1 KVA */ \ - pt_entry_t *pc_cmap2_ptep; /* PTE for copy window 2 KVA */ \ - vm_offset_t pc_cmap1_addr; /* KVA page for copy window 1 */ \ - vm_offset_t pc_cmap2_addr; /* KVA page for copy window 2 */ \ - vm_offset_t pc_qmap_addr; /* KVA page for temporary mappings */ \ - pt_entry_t *pc_qmap_ptep; /* PTE for temporary mapping KVA */ \ - char __pad[97] -#endif - -#ifdef __mips_n64 -#define PCPU_MD_FIELDS PCPU_MD_MIPS64_FIELDS -#else -#define PCPU_MD_FIELDS PCPU_MD_MIPS32_FIELDS -#endif - -#ifdef _KERNEL - -extern char pcpu_space[MAXCPU][PAGE_SIZE * 2]; -#define PCPU_ADDR(cpu) (struct pcpu *)(pcpu_space[(cpu)]) - -extern struct pcpu *pcpup; -#define PCPUP pcpup - -/* - * Since we use a wired TLB entry to map the same VA to a different - * physical page for each CPU, get_pcpu() must use the pc_self - * field to obtain a globally-unique pointer. - */ -#define get_pcpu() (PCPUP->pc_self) - -#define PCPU_ADD(member, value) (PCPUP->pc_ ## member += (value)) -#define PCPU_GET(member) (PCPUP->pc_ ## member) -#define PCPU_INC(member) PCPU_ADD(member, 1) -#define PCPU_PTR(member) (&PCPUP->pc_ ## member) -#define PCPU_SET(member,value) (PCPUP->pc_ ## member = (value)) -#define PCPU_LAZY_INC(member) (++PCPUP->pc_ ## member) - -#ifdef SMP -/* - * Instantiate the wired TLB entry at PCPU_TLB_ENTRY to map 'pcpu' at 'pcpup'. - */ -void mips_pcpu_tlb_init(struct pcpu *pcpu); -#endif - -#endif /* _KERNEL */ - -#endif /* !_MACHINE_PCPU_H_ */ diff --git a/sys/mips/include/pcpu_aux.h b/sys/mips/include/pcpu_aux.h deleted file mode 100644 index 9ca9b4def50..00000000000 --- a/sys/mips/include/pcpu_aux.h +++ /dev/null @@ -1,50 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2019 The FreeBSD Foundation - * - * This software was developed by Konstantin Belousov - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_PCPU_AUX_H_ -#define _MACHINE_PCPU_AUX_H_ - -#ifndef _KERNEL -#error "Not for userspace" -#endif - -#ifndef _SYS_PCPU_H_ -#error "Do not include machine/pcpu_aux.h directly" -#endif - -/* - * To minimize memory waste in per-cpu UMA zones, the page size should - * be a multiple of the size of struct pcpu. - */ -_Static_assert(PAGE_SIZE % sizeof(struct pcpu) == 0, "fix pcpu size"); - -extern struct pcpu __pcpu[]; - -#endif /* _MACHINE_PCPU_AUX_H_ */ diff --git a/sys/mips/include/pmap.h b/sys/mips/include/pmap.h deleted file mode 100644 index eeff154a297..00000000000 --- a/sys/mips/include/pmap.h +++ /dev/null @@ -1,207 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1991 Regents of the University of California. - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and William Jolitz of UUNET Technologies Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Derived from hp300 version by Mike Hibler, this version by William - * Jolitz uses a recursive map [a pde points to the page directory] to - * map the page tables using the pagetables themselves. This is done to - * reduce the impact on kernel virtual memory for lots of sparse address - * space, and to reduce the cost of memory to each process. - * - * from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90 - * from: @(#)pmap.h 7.4 (Berkeley) 5/12/91 - * from: src/sys/i386/include/pmap.h,v 1.65.2.2 2000/11/30 01:54:42 peter - * JNPR: pmap.h,v 1.7.2.1 2007/09/10 07:44:12 girish - */ - -#ifndef _MACHINE_PMAP_H_ -#define _MACHINE_PMAP_H_ - -#include -#include - -#if defined(__mips_n32) || defined(__mips_n64) /* PHYSADDR_64BIT */ -#define NKPT 256 /* mem > 4G, vm_page_startup needs more KPTs */ -#else -#define NKPT 120 /* actual number of kernel page tables */ -#endif - -#ifndef LOCORE - -#include -#include -#include -#include - -/* - * Pmap stuff - */ -struct pv_entry; -struct pv_chunk; - -struct md_page { - int pv_flags; - TAILQ_HEAD(, pv_entry) pv_list; -}; - -#define PV_TABLE_REF 0x02 /* referenced */ -#define PV_MEMATTR_MASK 0xf0 /* store vm_memattr_t here */ -#define PV_MEMATTR_SHIFT 0x04 - -#define ASID_BITS 8 -#define ASIDGEN_BITS (32 - ASID_BITS) -#define ASIDGEN_MASK ((1 << ASIDGEN_BITS) - 1) - -struct pmap { - pd_entry_t *pm_segtab; /* KVA of segment table */ - TAILQ_HEAD(, pv_chunk) pm_pvchunk; /* list of mappings in pmap */ - cpuset_t pm_active; /* active on cpus */ - struct { - u_int32_t asid:ASID_BITS; /* TLB address space tag */ - u_int32_t gen:ASIDGEN_BITS; /* its generation number */ - } pm_asid[MAXSMPCPU]; - struct pmap_statistics pm_stats; /* pmap statistics */ - struct mtx pm_mtx; -}; - -typedef struct pmap *pmap_t; - -#ifdef _KERNEL - -pt_entry_t *pmap_pte(pmap_t, vm_offset_t); -vm_paddr_t pmap_kextract(vm_offset_t va); - -#define vtophys(va) pmap_kextract(((vm_offset_t) (va))) -#define pmap_asid(pmap) (pmap)->pm_asid[PCPU_GET(cpuid)].asid - -extern struct pmap kernel_pmap_store; -#define kernel_pmap (&kernel_pmap_store) - -#define PMAP_LOCK(pmap) mtx_lock(&(pmap)->pm_mtx) -#define PMAP_LOCK_ASSERT(pmap, type) mtx_assert(&(pmap)->pm_mtx, (type)) -#define PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx) -#define PMAP_LOCK_INIT(pmap) mtx_init(&(pmap)->pm_mtx, "pmap", \ - NULL, MTX_DEF) -#define PMAP_LOCKED(pmap) mtx_owned(&(pmap)->pm_mtx) -#define PMAP_MTX(pmap) (&(pmap)->pm_mtx) -#define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx) -#define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx) - -/* - * For each vm_page_t, there is a list of all currently valid virtual - * mappings of that page. An entry is a pv_entry_t, the list is pv_table. - */ -typedef struct pv_entry { - vm_offset_t pv_va; /* virtual address for mapping */ - TAILQ_ENTRY(pv_entry) pv_list; -} *pv_entry_t; - -/* - * pv_entries are allocated in chunks per-process. This avoids the - * need to track per-pmap assignments. - */ -#ifdef __mips_n64 -#define _NPCM 3 -#define _NPCPV 168 -#else -#define _NPCM 11 -#define _NPCPV 336 -#endif -struct pv_chunk { - pmap_t pc_pmap; - TAILQ_ENTRY(pv_chunk) pc_list; - u_long pc_map[_NPCM]; /* bitmap; 1 = free */ - TAILQ_ENTRY(pv_chunk) pc_lru; - struct pv_entry pc_pventry[_NPCPV]; -}; - -/* - * physmem_desc[] is a superset of phys_avail[] and describes all the - * memory present in the system. - * - * phys_avail[] is similar but does not include the memory stolen by - * pmap_steal_memory(). - * - * Each memory region is described by a pair of elements in the array - * so we can describe up to (PHYS_AVAIL_ENTRIES / 2) distinct memory - * regions. - */ -extern vm_paddr_t physmem_desc[PHYS_AVAIL_COUNT]; - -extern vm_offset_t virtual_avail; -extern vm_offset_t virtual_end; - -#define PMAP_WANT_ACTIVE_CPUS_NAIVE - -#define pmap_page_get_memattr(m) (((m)->md.pv_flags & PV_MEMATTR_MASK) >> PV_MEMATTR_SHIFT) -#define pmap_page_is_mapped(m) (!TAILQ_EMPTY(&(m)->md.pv_list)) -#define pmap_page_is_write_mapped(m) (((m)->a.flags & PGA_WRITEABLE) != 0) - -#define pmap_vm_page_alloc_check(m) - -void pmap_bootstrap(void); -void *pmap_mapdev(vm_paddr_t, vm_size_t); -void *pmap_mapdev_attr(vm_paddr_t, vm_size_t, vm_memattr_t); -void pmap_unmapdev(vm_offset_t, vm_size_t); -vm_offset_t pmap_steal_memory(vm_size_t size); -void pmap_kenter(vm_offset_t va, vm_paddr_t pa); -void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, vm_memattr_t attr); -void pmap_kenter_device(vm_offset_t, vm_size_t, vm_paddr_t); -void pmap_kremove(vm_offset_t va); -void pmap_kremove_device(vm_offset_t, vm_size_t); -void *pmap_kenter_temporary(vm_paddr_t pa, int i); -void pmap_kenter_temporary_free(vm_paddr_t pa); -void pmap_flush_pvcache(vm_page_t m); -int pmap_emulate_modified(pmap_t pmap, vm_offset_t va); -void pmap_page_set_memattr(vm_page_t, vm_memattr_t); -int pmap_change_attr(vm_offset_t, vm_size_t, vm_memattr_t); -#define pmap_map_delete(pmap, sva, eva) pmap_remove(pmap, sva, eva) - -static inline int -pmap_vmspace_copy(pmap_t dst_pmap __unused, pmap_t src_pmap __unused) -{ - - return (0); -} - -static inline bool -pmap_ps_enabled(pmap_t pmap __unused) -{ - return (false); -} - -#endif /* _KERNEL */ - -#endif /* !LOCORE */ - -#endif /* !_MACHINE_PMAP_H_ */ diff --git a/sys/mips/include/pmc_mdep.h b/sys/mips/include/pmc_mdep.h deleted file mode 100644 index dc858b717ed..00000000000 --- a/sys/mips/include/pmc_mdep.h +++ /dev/null @@ -1,79 +0,0 @@ -/*- - * This file is in the public domain. - * - * from: src/sys/alpha/include/pmc_mdep.h,v 1.2 2005/06/09 19:45:06 jkoshy - */ - -#ifndef _MACHINE_PMC_MDEP_H_ -#define _MACHINE_PMC_MDEP_H_ - -#define PMC_MDEP_CLASS_INDEX_MIPS 1 - -union pmc_md_op_pmcallocate { - uint64_t __pad[4]; -}; - -/* Logging */ -#if defined(__mips_n64) -#define PMCLOG_READADDR PMCLOG_READ64 -#define PMCLOG_EMITADDR PMCLOG_EMIT64 -#else -#define PMCLOG_READADDR PMCLOG_READ32 -#define PMCLOG_EMITADDR PMCLOG_EMIT32 -#endif - -#if _KERNEL - -/* - * MIPS event codes are encoded with a select bit. The - * select bit is used when writing to CP0 so that we - * can select either counter 0/2 or 1/3. The cycle - * and instruction counters are special in that they - * can be counted on either 0/2 or 1/3. - */ - -#define MIPS_CTR_ALL 255 /* Count events in any counter. */ -#define MIPS_CTR_0 0 /* Counter 0 Event */ -#define MIPS_CTR_1 1 /* Counter 1 Event */ - -struct mips_event_code_map { - uint32_t pe_ev; /* enum value */ - uint8_t pe_counter; /* Which counter this can be counted in. */ - uint8_t pe_code; /* numeric code */ -}; - -struct mips_pmc_spec { - uint32_t ps_cpuclass; - uint32_t ps_cputype; - uint32_t ps_capabilities; - int ps_counter_width; -}; - -union pmc_md_pmc { - uint32_t pm_mips_evsel; -}; - -#define PMC_TRAPFRAME_TO_PC(TF) ((TF)->pc) - -extern const struct mips_event_code_map mips_event_codes[]; -extern const int mips_event_codes_size; -extern int mips_npmcs; -extern struct mips_pmc_spec mips_pmc_spec; - -/* - * Prototypes - */ -struct pmc_mdep *pmc_mips_initialize(void); -void pmc_mips_finalize(struct pmc_mdep *_md); - -/* - * CPU-specific functions - */ - -uint32_t mips_get_perfctl(int cpu, int ri, uint32_t event, uint32_t caps); -uint64_t mips_pmcn_read(unsigned int pmc); -uint64_t mips_pmcn_write(unsigned int pmc, uint64_t v); - -#endif /* _KERNEL */ - -#endif /* !_MACHINE_PMC_MDEP_H_ */ diff --git a/sys/mips/include/proc.h b/sys/mips/include/proc.h deleted file mode 100644 index 86ed45d8782..00000000000 --- a/sys/mips/include/proc.h +++ /dev/null @@ -1,108 +0,0 @@ -/* $OpenBSD: proc.h,v 1.2 1998/09/15 10:50:12 pefo Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)proc.h 8.1 (Berkeley) 6/10/93 - * JNPR: proc.h,v 1.7.2.1 2007/09/10 06:25:24 girish - */ - -#ifndef _MACHINE_PROC_H_ -#define _MACHINE_PROC_H_ - -#ifdef CPU_CNMIPS -#include -#endif - -/* - * Machine-dependent part of the proc structure. - */ -struct mdthread { - int md_flags; /* machine-dependent flags */ -#if defined(__mips_n64) || defined(__mips_n32) /* PHYSADDR_64_BIT */ - uint64_t md_upte[KSTACK_PAGES]; /* ptes for mapping u pcb */ -#else - int md_upte[KSTACK_PAGES]; -#endif - uintptr_t md_ss_addr; /* single step address for ptrace */ - int md_ss_instr; /* single step instruction for ptrace */ - register_t md_saved_intr; - u_int md_spinlock_count; -/* The following is CPU dependent, but kept in for compatibility */ - int md_pc_ctrl; /* performance counter control */ - int md_pc_count; /* performance counter */ - int md_pc_spill; /* performance counter spill */ - void *md_tls; -#ifdef CPU_CNMIPS - struct octeon_cop2_state *md_cop2; /* kernel context */ - struct octeon_cop2_state *md_ucop2; /* userland context */ -#define COP2_OWNER_USERLAND 0x0000 /* Userland owns COP2 */ -#define COP2_OWNER_KERNEL 0x0001 /* Kernel owns COP2 */ - int md_cop2owner; -#endif -}; - -/* md_flags */ -#define MDTD_FPUSED 0x0001 /* Process used the FPU */ -#define MDTD_COP2USED 0x0002 /* Process used the COP2 */ - -struct mdproc { - size_t md_tls_tcb_offset; /* TCB offset */ -}; - -#define MAXARGS 8 -struct syscall_args { - u_int code; - struct sysent *callp; - register_t args[MAXARGS]; -}; - -#ifdef __mips_n64 -#define KINFO_PROC_SIZE 1088 -#define KINFO_PROC32_SIZE 816 -#else -#define KINFO_PROC_SIZE 816 -#endif - -#ifdef _KERNEL -#include - -/* Get the current kernel thread stack usage. */ -#define GET_STACK_USAGE(total, used) do { \ - struct thread *td = curthread; \ - (total) = td->td_kstack_pages * PAGE_SIZE - sizeof(struct pcb); \ - (used) = td->td_kstack + (total) - (vm_offset_t)&td; \ -} while (0) - -#endif /* _KERNEL */ -#endif /* !_MACHINE_PROC_H_ */ diff --git a/sys/mips/include/procctl.h b/sys/mips/include/procctl.h deleted file mode 100644 index b340002b45e..00000000000 --- a/sys/mips/include/procctl.h +++ /dev/null @@ -1,3 +0,0 @@ -/*- - * This file is in the public domain. - */ diff --git a/sys/mips/include/profile.h b/sys/mips/include/profile.h deleted file mode 100644 index eaa40fc1d8d..00000000000 --- a/sys/mips/include/profile.h +++ /dev/null @@ -1,177 +0,0 @@ -/* $OpenBSD: profile.h,v 1.2 1999/01/27 04:46:05 imp Exp $ */ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)profile.h 8.1 (Berkeley) 6/10/93 - * JNPR: profile.h,v 1.4 2006/12/02 09:53:41 katta - */ -#ifndef _MACHINE_PROFILE_H_ -#define _MACHINE_PROFILE_H_ - -#define _MCOUNT_DECL void ___mcount - -/*XXX The cprestore instruction is a "dummy" to shut up as(1). */ - -/*XXX This is not MIPS64 safe. */ - -#define MCOUNT \ - __asm(".text;" \ - ".globl _mcount;" \ - ".type _mcount,@function;" \ - "_mcount:;" \ - ".set noreorder;" \ - ".set noat;" \ - ".cpload $25;" \ - ".cprestore 4;" \ - "sw $4,8($29);" \ - "sw $5,12($29);" \ - "sw $6,16($29);" \ - "sw $7,20($29);" \ - "sw $1,0($29);" \ - "sw $31,4($29);" \ - "move $5,$31;" \ - "jal ___mcount;" \ - "move $4,$1;" \ - "lw $4,8($29);" \ - "lw $5,12($29);" \ - "lw $6,16($29);" \ - "lw $7,20($29);" \ - "lw $31,4($29);" \ - "lw $1,0($29);" \ - "addu $29,$29,8;" \ - "j $31;" \ - "move $31,$1;" \ - ".set reorder;" \ - ".set at"); - -#ifdef _KERNEL -#define MCOUNT_DECL(s) u_long s; -#ifdef SMP -extern int mcount_lock; -#define MCOUNT_ENTER(s) { \ - s = intr_disable(); \ - while (!atomic_cmpset_acq_int(&mcount_lock, 0, 1)) \ - /* nothing */ ; \ -} -#define MCOUNT_EXIT(s) { \ - atomic_store_rel_int(&mcount_lock, 0); \ - intr_restore(s); \ -} -#else -#define MCOUNT_ENTER(s) { s = intr_disable(); } -#define MCOUNT_EXIT(s) (intr_restore(s)) -#endif - -/* REVISIT for mips */ -/* - * Config generates something to tell the compiler to align functions on 16 - * byte boundaries. A strict alignment is good for keeping the tables small. - */ -#define FUNCTION_ALIGNMENT 16 - -#ifdef GUPROF -struct gmonparam; -void stopguprof __P((struct gmonparam *p)); -#else -#define stopguprof(p) -#endif /* GUPROF */ - -#else /* !_KERNEL */ - -#define FUNCTION_ALIGNMENT 4 - -#ifdef __mips_n64 -typedef u_long uintfptr_t; -#else -typedef u_int uintfptr_t; -#endif - -#endif /* _KERNEL */ - -/* - * An unsigned integral type that can hold non-negative difference between - * function pointers. - */ -#ifdef __mips_n64 -typedef u_long fptrdiff_t; -#else -typedef u_int fptrdiff_t; -#endif - -#ifdef _KERNEL - -void mcount(uintfptr_t frompc, uintfptr_t selfpc); - -#ifdef GUPROF -struct gmonparam; - -void nullfunc_loop_profiled(void); -void nullfunc_profiled(void); -void startguprof(struct gmonparam *p); -void stopguprof(struct gmonparam *p); -#else -#define startguprof(p) -#define stopguprof(p) -#endif /* GUPROF */ - -#else /* !_KERNEL */ - -#include - -__BEGIN_DECLS -#ifdef __GNUC__ -#ifdef __ELF__ -void mcount(void) __asm(".mcount"); -#else -void mcount(void) __asm("mcount"); -#endif -#endif -void _mcount(uintfptr_t frompc, uintfptr_t selfpc); -__END_DECLS - -#endif /* _KERNEL */ - -#ifdef GUPROF -/* XXX doesn't quite work outside kernel yet. */ -extern int cputime_bias; - -__BEGIN_DECLS -int cputime(void); -void empty_loop(void); -void mexitcount(uintfptr_t selfpc); -void nullfunc(void); -void nullfunc_loop(void); -__END_DECLS -#endif - -#endif /* !_MACHINE_PROFILE_H_ */ diff --git a/sys/mips/include/pte.h b/sys/mips/include/pte.h deleted file mode 100644 index 61dad203923..00000000000 --- a/sys/mips/include/pte.h +++ /dev/null @@ -1,207 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004-2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_PTE_H_ -#define _MACHINE_PTE_H_ - -#ifndef _LOCORE -#if defined(__mips_n64) || defined(__mips_n32) /* PHYSADDR_64_BIT */ -typedef uint64_t pt_entry_t; -#else -typedef uint32_t pt_entry_t; -#endif -typedef pt_entry_t *pd_entry_t; -#endif - -/* - * TLB and PTE management. Most things operate within the context of - * EntryLo0,1, and begin with TLBLO_. Things which work with EntryHi - * start with TLBHI_. PTE bits begin with PTE_. - * - * Note that we use the same size VM and TLB pages. - */ -#define TLB_PAGE_SHIFT (PAGE_SHIFT) -#define TLB_PAGE_SIZE (1 << TLB_PAGE_SHIFT) -#define TLB_PAGE_MASK (TLB_PAGE_SIZE - 1) - -/* - * TLB PageMask register. Has mask bits set above the default, 4K, page mask. - */ -#define TLBMASK_SHIFT (13) -#define TLBMASK_MASK ((PAGE_MASK >> TLBMASK_SHIFT) << TLBMASK_SHIFT) - -/* - * FreeBSD/mips page-table entries take a near-identical format to MIPS TLB - * entries, each consisting of two 32-bit or 64-bit values ("EntryHi" and - * "EntryLo"). MIPS4k and MIPS64 both define certain bits in TLB entries as - * reserved, and these must be zero-filled by software. We overload these - * bits in PTE entries to hold PTE_ flags such as RO, W, and MANAGED. - * However, we must mask these out when writing to TLB entries to ensure that - * they do not become visible to hardware -- especially on MIPS64r2 which has - * an extended physical memory space. - * - * When using n64 and n32, shift software-defined bits into the MIPS64r2 - * reserved range, which runs from bit 55 ... 63. In other configurations - * (32-bit MIPS4k and compatible), shift them out to bits 29 ... 31. - * - * NOTE: This means that for 32-bit use of CP0, we aren't able to set the top - * bit of PFN to a non-zero value, as software is using it! This physical - * memory size limit may not be sufficiently enforced elsewhere. - */ -#if defined(__mips_n64) || defined(__mips_n32) /* PHYSADDR_64_BIT */ -#define TLBLO_SWBITS_SHIFT (55) -#define TLBLO_SWBITS_CLEAR_SHIFT (9) -#define TLBLO_PFN_MASK 0x3FFFFFFC0ULL -#else -#define TLBLO_SWBITS_SHIFT (29) -#define TLBLO_SWBITS_CLEAR_SHIFT (3) -#define TLBLO_PFN_MASK (0x1FFFFFC0) -#endif -#define TLBLO_PFN_SHIFT (6) -#define TLBLO_SWBITS_MASK ((pt_entry_t)0x7 << TLBLO_SWBITS_SHIFT) -#define TLBLO_PA_TO_PFN(pa) ((((pa) >> TLB_PAGE_SHIFT) << TLBLO_PFN_SHIFT) & TLBLO_PFN_MASK) -#define TLBLO_PFN_TO_PA(pfn) ((vm_paddr_t)((pfn) >> TLBLO_PFN_SHIFT) << TLB_PAGE_SHIFT) -#define TLBLO_PTE_TO_PFN(pte) ((pte) & TLBLO_PFN_MASK) -#define TLBLO_PTE_TO_PA(pte) (TLBLO_PFN_TO_PA(TLBLO_PTE_TO_PFN((pte)))) - -/* - * XXX This comment is not correct for anything more modern than R4K. - * - * VPN for EntryHi register. Upper two bits select user, supervisor, - * or kernel. Bits 61 to 40 copy bit 63. VPN2 is bits 39 and down to - * as low as 13, down to PAGE_SHIFT, to index 2 TLB pages*. From bit 12 - * to bit 8 there is a 5-bit 0 field. Low byte is ASID. - * - * XXX This comment is not correct for FreeBSD. - * Note that in FreeBSD, we map 2 TLB pages is equal to 1 VM page. - */ -#define TLBHI_ASID_MASK (0xff) -#if defined(__mips_n64) -#define TLBHI_R_SHIFT 62 -#define TLBHI_R_USER (0x00UL << TLBHI_R_SHIFT) -#define TLBHI_R_SUPERVISOR (0x01UL << TLBHI_R_SHIFT) -#define TLBHI_R_KERNEL (0x03UL << TLBHI_R_SHIFT) -#define TLBHI_R_MASK (0x03UL << TLBHI_R_SHIFT) -#define TLBHI_VA_R(va) ((va) & TLBHI_R_MASK) -#define TLBHI_FILL_SHIFT 40 -#define TLBHI_VPN2_SHIFT (TLB_PAGE_SHIFT + 1) -#define TLBHI_VPN2_MASK (((~((1UL << TLBHI_VPN2_SHIFT) - 1)) << (63 - TLBHI_FILL_SHIFT)) >> (63 - TLBHI_FILL_SHIFT)) -#define TLBHI_VA_TO_VPN2(va) ((va) & TLBHI_VPN2_MASK) -#define TLBHI_ENTRY(va, asid) ((TLBHI_VA_R((va))) /* Region. */ | \ - (TLBHI_VA_TO_VPN2((va))) /* VPN2. */ | \ - ((asid) & TLBHI_ASID_MASK)) -#else /* !defined(__mips_n64) */ -#define TLBHI_PAGE_MASK (2 * PAGE_SIZE - 1) -#define TLBHI_ENTRY(va, asid) (((va) & ~TLBHI_PAGE_MASK) | ((asid) & TLBHI_ASID_MASK)) -#endif /* defined(__mips_n64) */ - -/* - * TLB flags managed in hardware: - * C: Cache attribute. - * D: Dirty bit. This means a page is writable. It is not - * set at first, and a write is trapped, and the dirty - * bit is set. See also PTE_RO. - * V: Valid bit. Obvious, isn't it? - * G: Global bit. This means that this mapping is present - * in EVERY address space, and to ignore the ASID when - * it is matched. - */ -#define PTE_C(attr) ((attr & 0x07) << 3) -#define PTE_C_MASK (PTE_C(0x07)) -#define PTE_C_UNCACHED (PTE_C(MIPS_CCA_UNCACHED)) -#define PTE_C_CACHE (PTE_C(MIPS_CCA_CACHED)) -#define PTE_C_WC (PTE_C(MIPS_CCA_WC)) -#define PTE_D 0x04 -#define PTE_V 0x02 -#define PTE_G 0x01 - -/* - * VM flags managed in software: - * RO: Read only. Never set PTE_D on this page, and don't - * listen to requests to write to it. - * W: Wired. ??? - * MANAGED:Managed. This PTE maps a managed page. - * - * These bits should not be written into the TLB, so must first be masked out - * explicitly in C, or using CLEAR_PTE_SWBITS() in assembly. - */ -#define PTE_RO ((pt_entry_t)0x01 << TLBLO_SWBITS_SHIFT) -#define PTE_W ((pt_entry_t)0x02 << TLBLO_SWBITS_SHIFT) -#define PTE_MANAGED ((pt_entry_t)0x04 << TLBLO_SWBITS_SHIFT) - -/* - * PTE management functions for bits defined above. - */ -#define pte_clear(pte, bit) (*(pte) &= ~(bit)) -#define pte_set(pte, bit) (*(pte) |= (bit)) -#define pte_test(pte, bit) ((*(pte) & (bit)) == (bit)) -#define pte_cache_bits(pte) ((*(pte) >> 3) & 0x07) - -/* Assembly support for PTE access*/ -#ifdef LOCORE -#if defined(__mips_n64) || defined(__mips_n32) /* PHYSADDR_64_BIT */ -#define PTESHIFT 3 -#define PTE2MASK 0xff0 /* for the 2-page lo0/lo1 */ -#define PTEMASK 0xff8 -#define PTESIZE 8 -#define PTE_L ld -#define PTE_MTC0 dmtc0 -#define CLEAR_PTE_SWBITS(pr) -#else -#define PTESHIFT 2 -#define PTE2MASK 0xff8 /* for the 2-page lo0/lo1 */ -#define PTEMASK 0xffc -#define PTESIZE 4 -#define PTE_L lw -#define PTE_MTC0 mtc0 -#define CLEAR_PTE_SWBITS(r) LONG_SLL r, TLBLO_SWBITS_CLEAR_SHIFT; LONG_SRL r, TLBLO_SWBITS_CLEAR_SHIFT /* remove swbits */ -#endif /* defined(__mips_n64) || defined(__mips_n32) */ - -#if defined(__mips_n64) -#define PTRSHIFT 3 -#define PDEPTRMASK 0xff8 -#else -#define PTRSHIFT 2 -#define PDEPTRMASK 0xffc -#endif - -#endif /* LOCORE */ - -/* PageMask Register (CP0 Register 5, Select 0) Values */ -#define MIPS3_PGMASK_MASKX 0x00001800 -#define MIPS3_PGMASK_4K 0x00000000 -#define MIPS3_PGMASK_16K 0x00006000 -#define MIPS3_PGMASK_64K 0x0001e000 -#define MIPS3_PGMASK_256K 0x0007e000 -#define MIPS3_PGMASK_1M 0x001fe000 -#define MIPS3_PGMASK_4M 0x007fe000 -#define MIPS3_PGMASK_16M 0x01ffe000 -#define MIPS3_PGMASK_64M 0x07ffe000 -#define MIPS3_PGMASK_256M 0x1fffe000 - -#endif /* !_MACHINE_PTE_H_ */ diff --git a/sys/mips/include/ptrace.h b/sys/mips/include/ptrace.h deleted file mode 100644 index b3ba3a4ad81..00000000000 --- a/sys/mips/include/ptrace.h +++ /dev/null @@ -1,38 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)ptrace.h 8.1 (Berkeley) 6/11/93 - * from: src/sys/i386/include/ptrace.h,v 1.14 2005/05/31 09:43:04 dfr - */ - -#ifndef _MACHINE_PTRACE_H_ -#define _MACHINE_PTRACE_H_ - -#endif diff --git a/sys/mips/include/reg.h b/sys/mips/include/reg.h deleted file mode 100644 index 3863b20ca05..00000000000 --- a/sys/mips/include/reg.h +++ /dev/null @@ -1,92 +0,0 @@ -/* $OpenBSD: reg.h,v 1.1 1998/01/28 11:14:53 pefo Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: Utah Hdr: reg.h 1.1 90/07/09 - * @(#)reg.h 8.2 (Berkeley) 1/11/94 - * JNPR: reg.h,v 1.6 2006/09/15 12:52:34 katta - */ - -#ifndef _MACHINE_REG_H_ -#define _MACHINE_REG_H_ - -/* - * Location of the users' stored registers relative to ZERO. - * must be visible to assembly code. - */ -#include - -/* - * Register set accessible via /proc/$pid/reg - */ -struct reg { - register_t r_regs[NUMSAVEREGS]; /* numbered as above */ -}; - -struct fpreg { - f_register_t r_regs[NUMFPREGS]; -}; - -/* - * Placeholder. - */ -struct dbreg { - unsigned long junk; -}; - -#ifdef __LP64__ -/* Must match struct trapframe */ -struct reg32 { - uint32_t r_regs[NUMSAVEREGS]; -}; - -struct fpreg32 { - int32_t r_regs[NUMFPREGS]; -}; - -struct dbreg32 { - uint32_t junk; -}; - -#define __HAVE_REG32 -#endif - -#ifdef COMPAT_FREEBSD32 -#define fill_dbregs32(td, reg) 0 -#define set_dbregs32(td, reg) 0 -#endif - -#endif /* !_MACHINE_REG_H_ */ diff --git a/sys/mips/include/regdef.h b/sys/mips/include/regdef.h deleted file mode 100644 index cb619b17d21..00000000000 --- a/sys/mips/include/regdef.h +++ /dev/null @@ -1,109 +0,0 @@ -/* $NetBSD: regdef.h,v 1.12 2005/12/11 12:18:09 christos Exp $ */ - -/* - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. This file is derived from the MIPS RISC - * Architecture book by Gerry Kane. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)regdef.h 8.1 (Berkeley) 6/10/93 - */ - -#ifndef _MIPS_REGDEF_H -#define _MIPS_REGDEF_H - -#include /* for API selection */ - -#define zero $0 /* always zero */ -#define AT $at /* assembler temporary */ -#define v0 $2 /* return value */ -#define v1 $3 -#define a0 $4 /* argument registers */ -#define a1 $5 -#define a2 $6 -#define a3 $7 -#if defined(__mips_n32) || defined(__mips_n64) -#define a4 $8 -#define a5 $9 -#define a6 $10 -#define a7 $11 -#define t0 $12 /* temp registers (not saved across subroutine calls) */ -#define t1 $13 -#define t2 $14 -#define t3 $15 -#else -#define t0 $8 /* temp registers (not saved across subroutine calls) */ -#define t1 $9 -#define t2 $10 -#define t3 $11 -#define t4 $12 -#define t5 $13 -#define t6 $14 -#define t7 $15 -#endif /* __mips_n32 || __mips_n64 */ -#define s0 $16 /* saved across subroutine calls (callee saved) */ -#define s1 $17 -#define s2 $18 -#define s3 $19 -#define s4 $20 -#define s5 $21 -#define s6 $22 -#define s7 $23 -#define t8 $24 /* two more temporary registers */ -#define t9 $25 -#define k0 $26 /* kernel temporary */ -#define k1 $27 -#define gp $28 /* global pointer */ -#define sp $29 /* stack pointer */ -#define s8 $30 /* one more callee saved */ -#define ra $31 /* return address */ - -/* - * These are temp registers whose names can be used in either the old - * or new ABI, although they map to different physical registers. In - * the old ABI, they map to t4-t7, and in the new ABI, they map to a4-a7. - * - * Because they overlap with the last 4 arg regs in the new ABI, ta0-ta3 - * should be used only when we need more than t0-t3. - */ -#if defined(__mips_n32) || defined(__mips_n64) -#define ta0 $8 -#define ta1 $9 -#define ta2 $10 -#define ta3 $11 -#else -#define ta0 $12 -#define ta1 $13 -#define ta2 $14 -#define ta3 $15 -#endif /* __mips_n32 || __mips_n64 */ - -#endif /* _MIPS_REGDEF_H */ diff --git a/sys/mips/include/regnum.h b/sys/mips/include/regnum.h deleted file mode 100644 index 7b7943db965..00000000000 --- a/sys/mips/include/regnum.h +++ /dev/null @@ -1,210 +0,0 @@ -/* $OpenBSD: regnum.h,v 1.3 1999/01/27 04:46:06 imp Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: Utah Hdr: reg.h 1.1 90/07/09 - * @(#)reg.h 8.2 (Berkeley) 1/11/94 - * JNPR: regnum.h,v 1.6 2007/08/09 11:23:32 katta - */ - -#ifndef _MACHINE_REGNUM_H_ -#define _MACHINE_REGNUM_H_ - -#define NUMSAVEREGS 40 -#define NUMFPREGS 34 - -/* - * Location of the saved registers relative to ZERO. - * This must match struct trapframe defined in frame.h exactly. - * This must also match regdef.h. - */ -#if defined(_KERNEL) || defined(_WANT_MIPS_REGNUM) -#define ZERO 0 -#define AST 1 -#define V0 2 -#define V1 3 -#define A0 4 -#define A1 5 -#define A2 6 -#define A3 7 -#if defined(__mips_n32) || defined(__mips_n64) -#define A4 8 -#define A5 9 -#define A6 10 -#define A7 11 -#define T0 12 -#define T1 13 -#define T2 14 -#define T3 15 -#else -#define T0 8 -#define T1 9 -#define T2 10 -#define T3 11 -#define T4 12 -#define T5 13 -#define T6 14 -#define T7 15 -#endif -#define S0 16 -#define S1 17 -#define S2 18 -#define S3 19 -#define S4 20 -#define S5 21 -#define S6 22 -#define S7 23 -#define T8 24 -#define T9 25 -#define K0 26 -#define K1 27 -#define GP 28 -#define SP 29 -#define S8 30 -#define RA 31 -#define SR 32 -#define PS SR /* alias for SR */ -#define MULLO 33 -#define MULHI 34 -#define BADVADDR 35 -#define CAUSE 36 -#define PC 37 -/* - * IC is valid only on RM7K and RM9K processors. Access to this is - * controlled by IC_INT_REG which defined in kernel config - */ -#define IC 38 -#define DUMMY 39 /* for 8 byte alignment */ - -/* - * Pseudo registers so we save a complete set of registers regardless of - * the ABI. See regdef.h for a more complete explanation. - */ -#if defined(__mips_n32) || defined(__mips_n64) -#define TA0 8 -#define TA1 9 -#define TA2 10 -#define TA3 11 -#else -#define TA0 12 -#define TA1 13 -#define TA2 14 -#define TA3 15 -#endif - -/* - * Index of FP registers in 'struct frame', counting from the beginning - * of the frame (i.e., including the general registers). - */ -#define FPBASE NUMSAVEREGS -#define F0 (FPBASE+0) -#define F1 (FPBASE+1) -#define F2 (FPBASE+2) -#define F3 (FPBASE+3) -#define F4 (FPBASE+4) -#define F5 (FPBASE+5) -#define F6 (FPBASE+6) -#define F7 (FPBASE+7) -#define F8 (FPBASE+8) -#define F9 (FPBASE+9) -#define F10 (FPBASE+10) -#define F11 (FPBASE+11) -#define F12 (FPBASE+12) -#define F13 (FPBASE+13) -#define F14 (FPBASE+14) -#define F15 (FPBASE+15) -#define F16 (FPBASE+16) -#define F17 (FPBASE+17) -#define F18 (FPBASE+18) -#define F19 (FPBASE+19) -#define F20 (FPBASE+20) -#define F21 (FPBASE+21) -#define F22 (FPBASE+22) -#define F23 (FPBASE+23) -#define F24 (FPBASE+24) -#define F25 (FPBASE+25) -#define F26 (FPBASE+26) -#define F27 (FPBASE+27) -#define F28 (FPBASE+28) -#define F29 (FPBASE+29) -#define F30 (FPBASE+30) -#define F31 (FPBASE+31) -#define FSR (FPBASE+32) -#define FIR (FPBASE+33) - -/* - * Index of FP registers in 'struct frame', relative to the base - * of the FP registers in frame (i.e., *not* including the general - * registers). - */ -#define F0_NUM (0) -#define F1_NUM (1) -#define F2_NUM (2) -#define F3_NUM (3) -#define F4_NUM (4) -#define F5_NUM (5) -#define F6_NUM (6) -#define F7_NUM (7) -#define F8_NUM (8) -#define F9_NUM (9) -#define F10_NUM (10) -#define F11_NUM (11) -#define F12_NUM (12) -#define F13_NUM (13) -#define F14_NUM (14) -#define F15_NUM (15) -#define F16_NUM (16) -#define F17_NUM (17) -#define F18_NUM (18) -#define F19_NUM (19) -#define F20_NUM (20) -#define F21_NUM (21) -#define F22_NUM (22) -#define F23_NUM (23) -#define F24_NUM (24) -#define F25_NUM (25) -#define F26_NUM (26) -#define F27_NUM (27) -#define F28_NUM (28) -#define F29_NUM (29) -#define F30_NUM (30) -#define F31_NUM (31) -#define FSR_NUM (32) -#define FIR_NUM (33) - -#endif /* _KERNEL || _WANT_MIPS_REGNUM */ - -#endif /* !_MACHINE_REGNUM_H_ */ diff --git a/sys/mips/include/reloc.h b/sys/mips/include/reloc.h deleted file mode 100644 index 4d6f7cd18de..00000000000 --- a/sys/mips/include/reloc.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 1998 John Birrell . - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by John Birrell. - * 4. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY JOHN BIRRELL AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: src/sys/alpha/include/reloc.h,v 1.1.1.1.6.1 2000/08/03 00:48:04 peter - * JNPR: reloc.h,v 1.3 2006/08/07 05:38:57 katta - */ diff --git a/sys/mips/include/resource.h b/sys/mips/include/resource.h deleted file mode 100644 index 34a356479d7..00000000000 --- a/sys/mips/include/resource.h +++ /dev/null @@ -1,48 +0,0 @@ -/*- - * Copyright 1998 Massachusetts Institute of Technology - * - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose and without fee is hereby - * granted, provided that both the above copyright notice and this - * permission notice appear in all copies, that both the above - * copyright notice and this permission notice appear in all - * supporting documentation, and that the name of M.I.T. not be used - * in advertising or publicity pertaining to distribution of the - * software without specific, written prior permission. M.I.T. makes - * no representations about the suitability of this software for any - * purpose. It is provided "as is" without express or implied - * warranty. - * - * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS - * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT - * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * from: src/sys/i386/include/resource.h,v 1.3 1999/10/14 21:38:30 dfr - * JNPR: resource.h,v 1.3 2006/08/07 05:38:57 katta - */ - -#ifndef _MACHINE_RESOURCE_H_ -#define _MACHINE_RESOURCE_H_ 1 - -/* - * Definitions of resource types for Intel Architecture machines - * with support for legacy ISA devices and drivers. - */ - -#define SYS_RES_IRQ 1 /* interrupt lines */ -#define SYS_RES_DRQ 2 /* isa dma lines */ -#define SYS_RES_MEMORY 3 /* i/o memory */ -#define SYS_RES_IOPORT 4 /* i/o ports */ -#ifdef NEW_PCIB -#define PCI_RES_BUS 5 -#endif - -#endif /* !_MACHINE_RESOURCE_H_ */ diff --git a/sys/mips/include/runq.h b/sys/mips/include/runq.h deleted file mode 100644 index 7b37ba6f6a4..00000000000 --- a/sys/mips/include/runq.h +++ /dev/null @@ -1,61 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2001 Jake Burkholder - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: src/sys/i386/include/runq.h,v 1.3 2005/01/06 22:18:15 imp - */ - -#ifndef _MACHINE_RUNQ_H_ -#define _MACHINE_RUNQ_H_ - -#ifdef __mips_n64 -#define RQB_LEN (1) /* Number of priority status words. */ -#define RQB_L2BPW (6) /* Log2(sizeof(rqb_word_t) * NBBY)). */ -#else -#define RQB_LEN (2) /* Number of priority status words. */ -#define RQB_L2BPW (5) /* Log2(sizeof(rqb_word_t) * NBBY)). */ -#endif -#define RQB_BPW (1<> RQB_L2BPW) - -#ifdef __mips_n64 -#define RQB_FFS(word) (ffsl(word) - 1) -#else -#define RQB_FFS(word) (ffs(word) - 1) -#endif - -/* - * Type of run queue status word. - */ -#ifdef __mips_n64 -typedef u_int64_t rqb_word_t; -#else -typedef u_int32_t rqb_word_t; -#endif - -#endif diff --git a/sys/mips/include/sc_machdep.h b/sys/mips/include/sc_machdep.h deleted file mode 100644 index 0c0b25b72da..00000000000 --- a/sys/mips/include/sc_machdep.h +++ /dev/null @@ -1,71 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003 Jake Burkholder. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_SC_MACHDEP_H_ -#define _MACHINE_SC_MACHDEP_H_ - -/* Color attributes for foreground text */ - -#define FG_BLACK 0x0 -#define FG_BLUE 0x1 -#define FG_GREEN 0x2 -#define FG_CYAN 0x3 -#define FG_RED 0x4 -#define FG_MAGENTA 0x5 -#define FG_BROWN 0x6 -#define FG_LIGHTGREY 0x7 /* aka white */ -#define FG_DARKGREY 0x8 -#define FG_LIGHTBLUE 0x9 -#define FG_LIGHTGREEN 0xa -#define FG_LIGHTCYAN 0xb -#define FG_LIGHTRED 0xc -#define FG_LIGHTMAGENTA 0xd -#define FG_YELLOW 0xe -#define FG_WHITE 0xf /* aka bright white */ -#define FG_BLINK 0x80 - -/* Color attributes for text background */ - -#define BG_BLACK 0x00 -#define BG_BLUE 0x10 -#define BG_GREEN 0x20 -#define BG_CYAN 0x30 -#define BG_RED 0x40 -#define BG_MAGENTA 0x50 -#define BG_BROWN 0x60 -#define BG_LIGHTGREY 0x70 -#define BG_DARKGREY 0x80 -#define BG_LIGHTBLUE 0x90 -#define BG_LIGHTGREEN 0xa0 -#define BG_LIGHTCYAN 0xb0 -#define BG_LIGHTRED 0xc0 -#define BG_LIGHTMAGENTA 0xd0 -#define BG_YELLOW 0xe0 -#define BG_WHITE 0xf0 - -#endif /* !_MACHINE_SC_MACHDEP_H_ */ diff --git a/sys/mips/include/setjmp.h b/sys/mips/include/setjmp.h deleted file mode 100644 index 1ae95b7ace1..00000000000 --- a/sys/mips/include/setjmp.h +++ /dev/null @@ -1,68 +0,0 @@ -/* From: NetBSD: setjmp.h,v 1.2 1997/04/06 08:47:41 cgd Exp */ - -/*- - * SPDX-License-Identifier: MIT-CMU - * - * Copyright (c) 1994, 1995 Carnegie-Mellon University. - * All rights reserved. - * - * Author: Chris G. Demetriou - * - * Permission to use, copy, modify and distribute this software and - * its documentation is hereby granted, provided that both the copyright - * notice and this permission notice appear in all copies of the - * software, derivative works or modified versions, and any portions - * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND - * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * - * Carnegie Mellon requests users of this software to return to - * - * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU - * School of Computer Science - * Carnegie Mellon University - * Pittsburgh PA 15213-3890 - * - * any improvements or extensions that they make and grant Carnegie the - * rights to redistribute these changes. - * - * JNPR: setjmp.h,v 1.2 2006/12/02 09:53:41 katta - */ - -#ifndef _MACHINE_SETJMP_H_ -#define _MACHINE_SETJMP_H_ - -/* - * machine/setjmp.h: machine dependent setjmp-related information. - */ - -#include - -#define _JBLEN 95 /* size, in longs (or long longs), of a jmp_buf */ - -/* - * jmp_buf and sigjmp_buf are encapsulated in different structs to force - * compile-time diagnostics for mismatches. The structs are the same - * internally to avoid some run-time errors for mismatches. - */ -#ifndef _LOCORE -#ifndef __ASSEMBLER__ -#if __BSD_VISIBLE || __POSIX_VISIBLE || __XSI_VISIBLE -#ifdef __mips_n32 -typedef struct _sigjmp_buf { long long _sjb[_JBLEN + 1]; } sigjmp_buf[1]; -#else -typedef struct _sigjmp_buf { long _sjb[_JBLEN + 1]; } sigjmp_buf[1]; -#endif -#endif - -#ifdef __mips_n32 -typedef struct _jmp_buf { long long _jb[_JBLEN + 1]; } jmp_buf[1]; -#else -typedef struct _jmp_buf { long _jb[_JBLEN + 1]; } jmp_buf[1]; -#endif -#endif /* __ASSEMBLER__ */ -#endif /* _LOCORE */ - -#endif /* _MACHINE_SETJMP_H_ */ diff --git a/sys/mips/include/sf_buf.h b/sys/mips/include/sf_buf.h deleted file mode 100644 index 3f28326cdaf..00000000000 --- a/sys/mips/include/sf_buf.h +++ /dev/null @@ -1,69 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003 Alan L. Cox - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_SF_BUF_H_ -#define _MACHINE_SF_BUF_H_ - -#ifdef __mips_n64 /* In 64 bit the whole memory is directly mapped */ - -static inline vm_offset_t -sf_buf_kva(struct sf_buf *sf) -{ - vm_page_t m; - - m = (vm_page_t)sf; - return (MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(m))); -} - -static inline struct vm_page * -sf_buf_page(struct sf_buf *sf) -{ - - return ((vm_page_t)sf); -} - -#else /* !__mips_n64 */ - -static inline void -sf_buf_map(struct sf_buf *sf, int flags) -{ - - pmap_qenter(sf->kva, &sf->m, 1); -} - -static inline int -sf_buf_unmap(struct sf_buf *sf) -{ - - pmap_qremove(sf->kva, 1); - return (1); -} - -#endif /* __mips_n64 */ - -#endif /* !_MACHINE_SF_BUF_H_ */ diff --git a/sys/mips/include/sigframe.h b/sys/mips/include/sigframe.h deleted file mode 100644 index bacbd60ecce..00000000000 --- a/sys/mips/include/sigframe.h +++ /dev/null @@ -1,64 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1999 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer - * in this position and unchanged. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * from: src/sys/alpha/include/sigframe.h,v 1.1 1999/09/29 15:06:26 marcel - * from: sigframe.h,v 1.1 2006/08/07 05:38:57 katta - */ -#ifndef _MACHINE_SIGFRAME_H_ -#define _MACHINE_SIGFRAME_H_ - -/* - * WARNING: code in locore.s assumes the layout shown for sf_signum - * thru sf_addr so... don't alter them! - */ -struct sigframe { - register_t sf_signum; - register_t sf_siginfo; /* code or pointer to sf_si */ - register_t sf_ucontext; /* points to sf_uc */ - register_t sf_addr; /* undocumented 4th arg */ - ucontext_t sf_uc; /* = *sf_ucontext */ - siginfo_t sf_si; /* = *sf_siginfo (SA_SIGINFO case) */ - unsigned long __spare__[2]; -}; - -#if (defined(__mips_n32) || defined(__mips_n64)) && defined(COMPAT_FREEBSD32) -#include - -struct sigframe32 { - int32_t sf_signum; - int32_t sf_siginfo; /* code or pointer to sf_si */ - int32_t sf_ucontext; /* points to sf_uc */ - int32_t sf_addr; /* undocumented 4th arg */ - ucontext32_t sf_uc; /* = *sf_ucontext */ - struct siginfo32 sf_si; /* = *sf_siginfo (SA_SIGINFO case) */ - uint32_t __spare__[2]; -}; -#endif - -#endif /* !_MACHINE_SIGFRAME_H_ */ diff --git a/sys/mips/include/signal.h b/sys/mips/include/signal.h deleted file mode 100644 index fa0e21e7c1c..00000000000 --- a/sys/mips/include/signal.h +++ /dev/null @@ -1,83 +0,0 @@ -/* $OpenBSD: signal.h,v 1.2 1999/01/27 04:10:03 imp Exp $ */ - -/* - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)signal.h 8.1 (Berkeley) 6/10/93 - * JNPR: signal.h,v 1.4 2007/01/08 04:58:37 katta - */ - -#ifndef _MACHINE_SIGNAL_H_ -#define _MACHINE_SIGNAL_H_ - -#include -#include - -/* - * Machine-dependent signal definitions - */ - -typedef int sig_atomic_t; - -#if !defined(_ANSI_SOURCE) && !defined(_POSIX_SOURCE) -/* - * Information pushed on stack when a signal is delivered. - * This is used by the kernel to restore state following - * execution of the signal handler. It is also made available - * to the handler to allow it to restore state properly if - * a non-standard exit is performed. - */ - -struct sigcontext { - /* - * The fields following 'sc_mask' must match the definition - * of struct __mcontext. That way we can support - * struct sigcontext and ucontext_t at the same - * time. - */ - __sigset_t sc_mask; /* signal mask to restore */ - int sc_onstack; /* sigstack state to restore */ - __register_t sc_pc; /* pc at time of signal */ - __register_t sc_regs[32]; /* processor regs 0 to 31 */ - __register_t sr; /* status register */ - __register_t mullo, mulhi; /* mullo and mulhi registers... */ - int sc_fpused; /* fp has been used */ - f_register_t sc_fpregs[33]; /* fp regs 0 to 31 and csr */ - __register_t sc_fpc_eir; /* fp exception instruction reg */ - void *sc_tls; /* pointer to TLS area */ - int __spare__[8]; /* XXX reserved */ -}; - -#endif /* !_ANSI_SOURCE && !_POSIX_SOURCE */ - -#endif /* !_MACHINE_SIGNAL_H_ */ diff --git a/sys/mips/include/smp.h b/sys/mips/include/smp.h deleted file mode 100644 index be0dbe22f37..00000000000 --- a/sys/mips/include/smp.h +++ /dev/null @@ -1,51 +0,0 @@ -/*- - * ---------------------------------------------------------------------------- - * "THE BEER-WARE LICENSE" (Revision 42): - * wrote this file. As long as you retain this notice you - * can do whatever you want with this stuff. If we meet some day, and you think - * this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp - * ---------------------------------------------------------------------------- - * - * from: src/sys/alpha/include/smp.h,v 1.8 2005/01/05 20:05:50 imp - * JNPR: smp.h,v 1.3 2006/12/02 09:53:41 katta - * - */ - -#ifndef _MACHINE_SMP_H_ -#define _MACHINE_SMP_H_ - -#ifdef _KERNEL - -#include - -#include - -#ifdef INTRNG -# define MIPS_IPI_COUNT 1 -# define INTR_IPI_COUNT MIPS_IPI_COUNT -#endif - -/* - * Interprocessor interrupts for SMP. - */ -#define IPI_RENDEZVOUS 0x0002 -#define IPI_AST 0x0004 -#define IPI_STOP 0x0008 -#define IPI_STOP_HARD 0x0008 -#define IPI_PREEMPT 0x0010 -#define IPI_HARDCLOCK 0x0020 - -#ifndef LOCORE - -void ipi_all_but_self(int ipi); -void ipi_cpu(int cpu, u_int ipi); -void ipi_selected(cpuset_t cpus, int ipi); -void smp_init_secondary(u_int32_t cpuid); -void mpentry(void); - -extern struct pcb stoppcbs[]; - -#endif /* !LOCORE */ -#endif /* _KERNEL */ - -#endif /* _MACHINE_SMP_H_ */ diff --git a/sys/mips/include/stdarg.h b/sys/mips/include/stdarg.h deleted file mode 100644 index aba008ef377..00000000000 --- a/sys/mips/include/stdarg.h +++ /dev/null @@ -1,37 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2017 Poul-Henning Kamp. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_STDARG_H_ -#define _MACHINE_STDARG_H_ - -#include - -#ifndef va_start - #error this file needs to be ported to your compiler -#endif - -#endif /* !_MACHINE_STDARG_H_ */ diff --git a/sys/mips/include/sysarch.h b/sys/mips/include/sysarch.h deleted file mode 100644 index feb1b144ab6..00000000000 --- a/sys/mips/include/sysarch.h +++ /dev/null @@ -1,49 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1993 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Architecture specific syscalls (MIPS) - */ -#ifndef _MACHINE_SYSARCH_H_ -#define _MACHINE_SYSARCH_H_ - -#define MIPS_SET_TLS 1 -#define MIPS_GET_TLS 2 - -#ifndef _KERNEL -#include - -__BEGIN_DECLS -int sysarch(int, void *); -__END_DECLS -#endif - -#endif /* !_MACHINE_SYSARCH_H_ */ diff --git a/sys/mips/include/tlb.h b/sys/mips/include/tlb.h deleted file mode 100644 index d5757a240fd..00000000000 --- a/sys/mips/include/tlb.h +++ /dev/null @@ -1,60 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004-2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_TLB_H_ -#define _MACHINE_TLB_H_ - -/* - * The first TLB entry that write random hits. - * TLB entry 0 maps the kernel stack of the currently running thread - * TLB entry 1 maps the pcpu area of processor (only for SMP builds) - */ -#define KSTACK_TLB_ENTRY 0 -#ifdef SMP -#define PCPU_TLB_ENTRY 1 -#define VMWIRED_ENTRIES 2 -#else -#define VMWIRED_ENTRIES 1 -#endif /* SMP */ - -/* - * The number of process id entries. - */ -#define VMNUM_PIDS 256 - -extern int num_tlbentries; - -void tlb_insert_wired(unsigned, vm_offset_t, pt_entry_t, pt_entry_t); -void tlb_invalidate_address(struct pmap *, vm_offset_t); -void tlb_invalidate_all(void); -void tlb_invalidate_all_user(struct pmap *); -void tlb_invalidate_range(struct pmap *, vm_offset_t, vm_offset_t); -void tlb_save(void); -void tlb_update(struct pmap *, vm_offset_t, pt_entry_t); - -#endif /* !_MACHINE_TLB_H_ */ diff --git a/sys/mips/include/tls.h b/sys/mips/include/tls.h deleted file mode 100644 index 83e047be8ee..00000000000 --- a/sys/mips/include/tls.h +++ /dev/null @@ -1,83 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012 Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#ifndef __MIPS_TLS_H__ -#define __MIPS_TLS_H__ - -#include -#include - -/* - * TLS parameters - */ - -#define TLS_DTV_OFFSET 0x8000 -#define TLS_TCB_ALIGN 8 -#define TLS_TP_OFFSET 0x7000 - -#ifdef COMPAT_FREEBSD32 -#define TLS_TCB_SIZE32 8 -#endif - -#ifndef _KERNEL - -static __inline void -_tcb_set(struct tcb *tcb) -{ - sysarch(MIPS_SET_TLS, tcb); -} - -static __inline struct tcb * -_tcb_get(void) -{ - struct tcb *tcb; - -#ifdef TLS_USE_SYSARCH - sysarch(MIPS_GET_TLS, &tcb); -#else - __asm__ __volatile__ ( - ".set\tpush\n\t" -#ifdef __mips_n64 - ".set\tmips64r2\n\t" -#else - ".set\tmips32r2\n\t" -#endif - "rdhwr\t%0, $29\n\t" - ".set\tpop" - : "=r" (tcb)); - tcb = (struct tcb *)((uintptr_t)tcb - TLS_TP_OFFSET - TLS_TCB_SIZE); -#endif - return (tcb); -} - -#endif - -#endif /* __MIPS_TLS_H__ */ diff --git a/sys/mips/include/trap.h b/sys/mips/include/trap.h deleted file mode 100644 index fc9d32eb106..00000000000 --- a/sys/mips/include/trap.h +++ /dev/null @@ -1,123 +0,0 @@ -/* $OpenBSD: trap.h,v 1.3 1999/01/27 04:46:06 imp Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: Utah Hdr: trap.h 1.1 90/07/09 - * from: @(#)trap.h 8.1 (Berkeley) 6/10/93 - * JNPR: trap.h,v 1.3 2006/12/02 09:53:41 katta - */ - -#ifndef _MACHINE_TRAP_H_ -#define _MACHINE_TRAP_H_ - -/* - * Trap codes also known in trap.c for name strings. - * Used for indexing so modify with care. - */ - -#define T_INT 0 /* Interrupt pending */ -#define T_TLB_MOD 1 /* TLB modified fault */ -#define T_TLB_LD_MISS 2 /* TLB miss on load or ifetch */ -#define T_TLB_ST_MISS 3 /* TLB miss on a store */ -#define T_ADDR_ERR_LD 4 /* Address error on a load or ifetch */ -#define T_ADDR_ERR_ST 5 /* Address error on a store */ -#define T_BUS_ERR_IFETCH 6 /* Bus error on an ifetch */ -#define T_BUS_ERR_LD_ST 7 /* Bus error on a load or store */ -#define T_SYSCALL 8 /* System call */ -#define T_BREAK 9 /* Breakpoint */ -#define T_RES_INST 10 /* Reserved instruction exception */ -#define T_COP_UNUSABLE 11 /* Coprocessor unusable */ -#define T_OVFLOW 12 /* Arithmetic overflow */ -#define T_TRAP 13 /* Trap instruction */ -#define T_VCEI 14 /* Virtual coherency instruction */ -#define T_FPE 15 /* Floating point exception */ -#define T_IWATCH 16 /* Inst. Watch address reference */ -#define T_C2E 18 /* Exception from coprocessor 2 */ -#define T_DWATCH 23 /* Data Watch address reference */ -#define T_MCHECK 24 /* Received an MCHECK */ -#define T_VCED 31 /* Virtual coherency data */ - -#define T_USER 0x20 /* user-mode flag or'ed with type */ - -#if !defined(SMP) && (defined(DDB) || defined(DEBUG)) - -struct trapdebug { /* trap history buffer for debugging */ - register_t status; - register_t cause; - register_t vadr; - register_t pc; - register_t ra; - register_t sp; - register_t code; -}; - -#define trapdebug_enter(x, cd) { \ - register_t s = intr_disable(); \ - trp->status = x->sr; \ - trp->cause = x->cause; \ - trp->vadr = x->badvaddr; \ - trp->pc = x->pc; \ - trp->sp = x->sp; \ - trp->ra = x->ra; \ - trp->code = cd; \ - if (++trp == &trapdebug[TRAPSIZE]) \ - trp = trapdebug; \ - intr_restore(s); \ -} - -#define TRAPSIZE 10 /* Trap log buffer length */ -extern struct trapdebug trapdebug[TRAPSIZE], *trp; - -void trapDump(char *msg); - -#else - -#define trapdebug_enter(x, cd) - -#endif - -void MipsFPTrap(u_int, u_int, u_int); -void MipsKernGenException(void); -void MipsKernIntr(void); -void MipsKStackOverflow(void); -void MipsTLBInvalidException(void); -void MipsTLBMissException(void); -void MipsUserGenException(void); -void MipsUserIntr(void); - -register_t trap(struct trapframe *); - -#endif /* !_MACHINE_TRAP_H_ */ diff --git a/sys/mips/include/ucontext.h b/sys/mips/include/ucontext.h deleted file mode 100644 index 28cf9cfb161..00000000000 --- a/sys/mips/include/ucontext.h +++ /dev/null @@ -1,135 +0,0 @@ -/* - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)ucontext.h 8.1 (Berkeley) 6/10/93 - * JNPR: ucontext.h,v 1.2 2007/08/09 11:23:32 katta - */ - -#ifndef _MACHINE_UCONTEXT_H_ -#define _MACHINE_UCONTEXT_H_ - -#ifndef _LOCORE - -typedef struct __mcontext { - /* - * These fields must match the corresponding fields in struct - * sigcontext which follow 'sc_mask'. That way we can support - * struct sigcontext and ucontext_t at the same time. - */ - int mc_onstack; /* sigstack state to restore */ - __register_t mc_pc; /* pc at time of signal */ - __register_t mc_regs[32]; /* processor regs 0 to 31 */ - __register_t sr; /* status register */ - __register_t mullo, mulhi; /* mullo and mulhi registers... */ - int mc_fpused; /* fp has been used */ - f_register_t mc_fpregs[33]; /* fp regs 0 to 31 and csr */ - __register_t mc_fpc_eir; /* fp exception instruction reg */ - void *mc_tls; /* pointer to TLS area */ - int __spare__[8]; /* XXX reserved */ -} mcontext_t; - -#if (defined(__mips_n32) || defined(__mips_n64)) && defined(COMPAT_FREEBSD32) -#include - -typedef struct __mcontext32 { - int mc_onstack; - int32_t mc_pc; - int32_t mc_regs[32]; - int32_t sr; - int32_t mullo, mulhi; - int mc_fpused; - int32_t mc_fpregs[33]; - int32_t mc_fpc_eir; - int32_t mc_tls; - int __spare__[8]; -} mcontext32_t; - -typedef struct __ucontext32 { - sigset_t uc_sigmask; - mcontext32_t uc_mcontext; - uint32_t uc_link; - struct sigaltstack32 uc_stack; - uint32_t uc_flags; - uint32_t __spare__[4]; -} ucontext32_t; -#endif -#endif - -#ifndef SZREG -#if defined(__mips_o32) -#define SZREG 4 -#else -#define SZREG 8 -#endif -#endif - -/* offsets into mcontext_t */ -#define UCTX_REG(x) (4 + SZREG + (x)*SZREG) - -#define UCR_ZERO UCTX_REG(0) -#define UCR_AT UCTX_REG(1) -#define UCR_V0 UCTX_REG(2) -#define UCR_V1 UCTX_REG(3) -#define UCR_A0 UCTX_REG(4) -#define UCR_A1 UCTX_REG(5) -#define UCR_A2 UCTX_REG(6) -#define UCR_A3 UCTX_REG(7) -#define UCR_T0 UCTX_REG(8) -#define UCR_T1 UCTX_REG(9) -#define UCR_T2 UCTX_REG(10) -#define UCR_T3 UCTX_REG(11) -#define UCR_T4 UCTX_REG(12) -#define UCR_T5 UCTX_REG(13) -#define UCR_T6 UCTX_REG(14) -#define UCR_T7 UCTX_REG(15) -#define UCR_S0 UCTX_REG(16) -#define UCR_S1 UCTX_REG(17) -#define UCR_S2 UCTX_REG(18) -#define UCR_S3 UCTX_REG(19) -#define UCR_S4 UCTX_REG(20) -#define UCR_S5 UCTX_REG(21) -#define UCR_S6 UCTX_REG(22) -#define UCR_S7 UCTX_REG(23) -#define UCR_T8 UCTX_REG(24) -#define UCR_T9 UCTX_REG(25) -#define UCR_K0 UCTX_REG(26) -#define UCR_K1 UCTX_REG(27) -#define UCR_GP UCTX_REG(28) -#define UCR_SP UCTX_REG(29) -#define UCR_S8 UCTX_REG(30) -#define UCR_RA UCTX_REG(31) -#define UCR_SR UCTX_REG(32) -#define UCR_MDLO UCTX_REG(33) -#define UCR_MDHI UCTX_REG(34) - -#endif /* !_MACHINE_UCONTEXT_H_ */ diff --git a/sys/mips/include/vdso.h b/sys/mips/include/vdso.h deleted file mode 100644 index 230f80586fb..00000000000 --- a/sys/mips/include/vdso.h +++ /dev/null @@ -1,41 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2012 Konstantin Belousov . - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MIPS_VDSO_H -#define _MIPS_VDSO_H - -#define VDSO_TIMEHANDS_MD \ - uint32_t th_res[8]; - -#ifdef _KERNEL -#ifdef COMPAT_FREEBSD32 - -#define VDSO_TIMEHANDS_MD32 VDSO_TIMEHANDS_MD - -#endif -#endif -#endif diff --git a/sys/mips/include/vm.h b/sys/mips/include/vm.h deleted file mode 100644 index 1f9f15c8543..00000000000 --- a/sys/mips/include/vm.h +++ /dev/null @@ -1,44 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009 Alan L. Cox - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_VM_H_ -#define _MACHINE_VM_H_ - -#include -#include - -/* Memory attributes. */ -#define VM_MEMATTR_UNCACHEABLE ((vm_memattr_t)MIPS_CCA_UNCACHED) -#define VM_MEMATTR_WRITE_BACK ((vm_memattr_t)MIPS_CCA_CACHED) -#define VM_MEMATTR_DEFAULT VM_MEMATTR_WRITE_BACK -#define VM_MEMATTR_DEVICE VM_MEMATTR_UNCACHEABLE -#ifdef MIPS_CCA_WC -#define VM_MEMATTR_WRITE_COMBINING ((vm_memattr_t)MIPS_CCA_WC) -#endif - -#endif /* !_MACHINE_VM_H_ */ diff --git a/sys/mips/include/vmparam.h b/sys/mips/include/vmparam.h deleted file mode 100644 index 2d287e66db8..00000000000 --- a/sys/mips/include/vmparam.h +++ /dev/null @@ -1,209 +0,0 @@ -/* $OpenBSD: vmparam.h,v 1.2 1998/09/15 10:50:12 pefo Exp $ */ -/* $NetBSD: vmparam.h,v 1.5 1994/10/26 21:10:10 cgd Exp $ */ - -/* - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: Utah Hdr: vmparam.h 1.16 91/01/18 - * @(#)vmparam.h 8.2 (Berkeley) 4/22/94 - * JNPR: vmparam.h,v 1.3.2.1 2007/09/10 06:01:28 girish - */ - -#ifndef _MACHINE_VMPARAM_H_ -#define _MACHINE_VMPARAM_H_ - -/* - * Machine dependent constants mips processors. - */ - -/* - * Virtual memory related constants, all in bytes - */ -#ifndef MAXTSIZ -#define MAXTSIZ (128UL*1024*1024) /* max text size */ -#endif -#ifndef DFLDSIZ -#define DFLDSIZ (128UL*1024*1024) /* initial data size limit */ -#endif -#ifndef MAXDSIZ -#define MAXDSIZ (1*1024UL*1024*1024) /* max data size */ -#endif -#ifndef DFLSSIZ -#define DFLSSIZ (8UL*1024*1024) /* initial stack size limit */ -#endif -#ifndef MAXSSIZ -#define MAXSSIZ (64UL*1024*1024) /* max stack size */ -#endif -#ifndef SGROWSIZ -#define SGROWSIZ (128UL*1024) /* amount to grow stack */ -#endif - -/* - * Mach derived constants - */ - -/* user/kernel map constants */ -#define VM_MIN_ADDRESS ((vm_offset_t)0x00000000) -#define VM_MAX_ADDRESS ((vm_offset_t)(intptr_t)(int32_t)0xffffffff) - -#define VM_MINUSER_ADDRESS ((vm_offset_t)0x00000000) - -#ifdef __mips_n64 -#define VM_MAXUSER_ADDRESS (VM_MINUSER_ADDRESS + (NPDEPG * NBSEG)) -#define VM_MIN_KERNEL_ADDRESS ((vm_offset_t)0xc000000000000000) -#define VM_MAX_KERNEL_ADDRESS (VM_MIN_KERNEL_ADDRESS + (NPDEPG * NBSEG)) -#else -#define VM_MAXUSER_ADDRESS ((vm_offset_t)0x80000000) -#define VM_MIN_KERNEL_ADDRESS ((vm_offset_t)0xC0000000) -#define VM_MAX_KERNEL_ADDRESS ((vm_offset_t)0xFFFFC000) -#endif - -#define KERNBASE ((vm_offset_t)(intptr_t)(int32_t)0x80000000) -/* - * USRSTACK needs to start a little below 0x8000000 because the R8000 - * and some QED CPUs perform some virtual address checks before the - * offset is calculated. - */ -#define USRSTACK (VM_MAXUSER_ADDRESS - PAGE_SIZE) -#ifdef __mips_n64 -#define FREEBSD32_USRSTACK (((vm_offset_t)0x80000000) - PAGE_SIZE) -#endif - -/* - * Disable superpage reservations. (not sure if this is right - * I copied it from ARM) - */ -#ifndef VM_NRESERVLEVEL -#define VM_NRESERVLEVEL 0 -#endif - -/* - * How many physical pages per kmem arena virtual page. - */ -#ifndef VM_KMEM_SIZE_SCALE -#define VM_KMEM_SIZE_SCALE (3) -#endif - -/* - * Optional floor (in bytes) on the size of the kmem arena. - */ -#ifndef VM_KMEM_SIZE_MIN -#define VM_KMEM_SIZE_MIN (12 * 1024 * 1024) -#endif - -/* - * Optional ceiling (in bytes) on the size of the kmem arena: 40% of the - * kernel map. - */ -#ifndef VM_KMEM_SIZE_MAX -#define VM_KMEM_SIZE_MAX ((VM_MAX_KERNEL_ADDRESS - \ - VM_MIN_KERNEL_ADDRESS + 1) * 2 / 5) -#endif - -/* initial pagein size of beginning of executable file */ -#ifndef VM_INITIAL_PAGEIN -#define VM_INITIAL_PAGEIN 16 -#endif - -#define UMA_MD_SMALL_ALLOC - -/* - * max number of non-contig chunks of physical RAM you can have - */ -#define VM_PHYSSEG_MAX 32 - -/* - * The physical address space is sparsely populated. - */ -#define VM_PHYSSEG_SPARSE - -/* - * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool - * from which physical pages are allocated and VM_FREEPOOL_DIRECT is - * the pool from which physical pages for small UMA objects are - * allocated. - */ -#define VM_NFREEPOOL 2 -#define VM_FREEPOOL_DEFAULT 0 -#define VM_FREEPOOL_DIRECT 1 - -/* - * Create up to two free lists on !__mips_n64: VM_FREELIST_DEFAULT is for - * physical pages that are above the largest physical address that is - * accessible through the direct map (KSEG0) and VM_FREELIST_LOWMEM is for - * physical pages that are below that address. VM_LOWMEM_BOUNDARY is the - * physical address for the end of the direct map (KSEG0). - */ -#ifdef __mips_n64 -#define VM_NFREELIST 1 -#define VM_FREELIST_DEFAULT 0 -#define VM_FREELIST_DIRECT VM_FREELIST_DEFAULT -#else -#define VM_NFREELIST 2 -#define VM_FREELIST_DEFAULT 0 -#define VM_FREELIST_LOWMEM 1 -#define VM_FREELIST_DIRECT VM_FREELIST_LOWMEM -#define VM_LOWMEM_BOUNDARY ((vm_paddr_t)0x20000000) -#endif - -/* - * The largest allocation size is 1MB. - */ -#define VM_NFREEORDER 9 - -#define ZERO_REGION_SIZE (64 * 1024) /* 64KB */ - -#ifndef __mips_n64 -#define SFBUF -#define SFBUF_MAP -#define PMAP_HAS_DMAP 0 -#else -#define PMAP_HAS_DMAP 1 -#endif - -#define PHYS_TO_DMAP(x) MIPS_PHYS_TO_DIRECT(x) -#define DMAP_TO_PHYS(x) MIPS_DIRECT_TO_PHYS(x) - -/* - * No non-transparent large page support in the pmap. - */ -#define PMAP_HAS_LARGEPAGES 0 - -/* - * Need a page dump array for minidump. - */ -#define MINIDUMP_PAGE_TRACKING 1 - -#endif /* !_MACHINE_VMPARAM_H_ */ diff --git a/sys/mips/ingenic/files.jz4780 b/sys/mips/ingenic/files.jz4780 deleted file mode 100644 index d4c62325d9f..00000000000 --- a/sys/mips/ingenic/files.jz4780 +++ /dev/null @@ -1,39 +0,0 @@ - -mips/ingenic/jz4780_dwc_fdt.c optional dwcotg -mips/ingenic/jz4780_ehci.c optional ehci -mips/ingenic/jz4780_mmc.c optional mmc -mips/ingenic/jz4780_ohci.c optional ohci -mips/ingenic/jz4780_smb.c optional iicbus -mips/ingenic/jz4780_uart.c optional uart -mips/ingenic/jz4780_lcd.c optional vt -dev/hdmi/dwc_hdmi.c optional hdmi iicbus -dev/hdmi/dwc_hdmi_fdt.c optional hdmi iicbus - -mips/ingenic/jz4780_clock.c standard -mips/ingenic/jz4780_clk_gen.c standard -mips/ingenic/jz4780_clk_otg.c standard -mips/ingenic/jz4780_clk_pll.c standard -mips/ingenic/jz4780_efuse.c standard -mips/ingenic/jz4780_intr.c standard -mips/ingenic/jz4780_gpio.c standard -mips/ingenic/jz4780_machdep.c standard -mips/ingenic/jz4780_nemc.c standard -mips/ingenic/jz4780_pdma.c standard -mips/ingenic/jz4780_pinctrl.c standard -mips/ingenic/jz4780_rtc.c standard -mips/ingenic/jz4780_timer.c standard - -# Sound -mips/ingenic/jz4780_aic.c optional sound xdma -mips/ingenic/jz4780_codec.c optional sound - -# SMP -mips/ingenic/jz4780_mp.c optional smp \ - warning "* * * * * 32-bit mips SMP unsupported * * * * *" -mips/ingenic/jz4780_mpboot.S optional smp - -# Custom interface between pinctrl and gpio -mips/ingenic/jz4780_gpio_if.m standard - -# HDMI interface -dev/hdmi/hdmi_if.m standard diff --git a/sys/mips/ingenic/files.x1000 b/sys/mips/ingenic/files.x1000 deleted file mode 100644 index a745222865b..00000000000 --- a/sys/mips/ingenic/files.x1000 +++ /dev/null @@ -1,21 +0,0 @@ - -mips/ingenic/jz4780_mmc.c optional mmc -mips/ingenic/jz4780_uart.c optional uart - -mips/ingenic/jz4780_clock.c standard -mips/ingenic/jz4780_clk_gen.c standard -mips/ingenic/jz4780_clk_otg.c standard -mips/ingenic/jz4780_clk_pll.c standard -mips/ingenic/jz4780_intr.c standard -mips/ingenic/jz4780_gpio.c standard -mips/ingenic/jz4780_machdep.c standard -mips/ingenic/jz4780_pdma.c standard -mips/ingenic/jz4780_pinctrl.c standard -mips/ingenic/jz4780_timer.c standard - -# Sound -mips/ingenic/jz4780_aic.c optional sound xdma -mips/ingenic/jz4780_codec.c optional sound - -# Custom interface between pinctrl and gpio -mips/ingenic/jz4780_gpio_if.m standard diff --git a/sys/mips/ingenic/jz4780_aic.c b/sys/mips/ingenic/jz4780_aic.c deleted file mode 100644 index 2d0d3aec075..00000000000 --- a/sys/mips/ingenic/jz4780_aic.c +++ /dev/null @@ -1,808 +0,0 @@ -/*- - * Copyright (c) 2016-2018 Ruslan Bukin - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* Ingenic JZ4780 Audio Interface Controller (AIC). */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include -#include - -#define AIC_NCHANNELS 1 - -struct aic_softc { - device_t dev; - struct resource *res[1]; - bus_space_tag_t bst; - bus_space_handle_t bsh; - struct mtx *lock; - int pos; - bus_dma_tag_t dma_tag; - bus_dmamap_t dma_map; - bus_addr_t buf_base_phys; - uint32_t *buf_base; - uintptr_t aic_fifo_paddr; - int dma_size; - clk_t clk_aic; - clk_t clk_i2s; - struct aic_rate *sr; - void *ih; - int internal_codec; - - /* xDMA */ - struct xdma_channel *xchan; - xdma_controller_t *xdma_tx; - struct xdma_request req; -}; - -/* Channel registers */ -struct sc_chinfo { - struct snd_dbuf *buffer; - struct pcm_channel *channel; - struct sc_pcminfo *parent; - - /* Channel information */ - uint32_t dir; - uint32_t format; - - /* Flags */ - uint32_t run; -}; - -/* PCM device private data */ -struct sc_pcminfo { - device_t dev; - uint32_t chnum; - struct sc_chinfo chan[AIC_NCHANNELS]; - struct aic_softc *sc; -}; - -static struct resource_spec aic_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { -1, 0 } -}; - -static int aic_probe(device_t dev); -static int aic_attach(device_t dev); -static int aic_detach(device_t dev); -static int setup_xdma(struct sc_pcminfo *scp); - -struct aic_rate { - uint32_t speed; -}; - -static struct aic_rate rate_map[] = { - { 48000 }, - /* TODO: add more frequences */ - { 0 }, -}; - -/* - * Mixer interface. - */ -static int -aicmixer_init(struct snd_mixer *m) -{ - struct sc_pcminfo *scp; - struct aic_softc *sc; - int mask; - - scp = mix_getdevinfo(m); - sc = scp->sc; - - if (sc == NULL) - return -1; - - mask = SOUND_MASK_PCM; - - snd_mtxlock(sc->lock); - pcm_setflags(scp->dev, pcm_getflags(scp->dev) | SD_F_SOFTPCMVOL); - mix_setdevs(m, mask); - snd_mtxunlock(sc->lock); - - return (0); -} - -static int -aicmixer_set(struct snd_mixer *m, unsigned dev, - unsigned left, unsigned right) -{ - struct sc_pcminfo *scp; - - scp = mix_getdevinfo(m); - - /* Here we can configure hardware volume on our DAC */ - - return (0); -} - -static kobj_method_t aicmixer_methods[] = { - KOBJMETHOD(mixer_init, aicmixer_init), - KOBJMETHOD(mixer_set, aicmixer_set), - KOBJMETHOD_END -}; -MIXER_DECLARE(aicmixer); - -/* - * Channel interface. - */ -static void * -aicchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, - struct pcm_channel *c, int dir) -{ - struct sc_pcminfo *scp; - struct sc_chinfo *ch; - struct aic_softc *sc; - - scp = (struct sc_pcminfo *)devinfo; - sc = scp->sc; - - snd_mtxlock(sc->lock); - ch = &scp->chan[0]; - ch->dir = dir; - ch->run = 0; - ch->buffer = b; - ch->channel = c; - ch->parent = scp; - snd_mtxunlock(sc->lock); - - if (sndbuf_setup(ch->buffer, sc->buf_base, sc->dma_size) != 0) { - device_printf(scp->dev, "Can't setup sndbuf.\n"); - return NULL; - } - - return (ch); -} - -static int -aicchan_free(kobj_t obj, void *data) -{ - struct sc_chinfo *ch = data; - struct sc_pcminfo *scp = ch->parent; - struct aic_softc *sc = scp->sc; - - snd_mtxlock(sc->lock); - /* TODO: free channel buffer */ - snd_mtxunlock(sc->lock); - - return (0); -} - -static int -aicchan_setformat(kobj_t obj, void *data, uint32_t format) -{ - struct sc_pcminfo *scp; - struct sc_chinfo *ch; - - ch = data; - scp = ch->parent; - - ch->format = format; - - return (0); -} - -static uint32_t -aicchan_setspeed(kobj_t obj, void *data, uint32_t speed) -{ - struct sc_pcminfo *scp; - struct sc_chinfo *ch; - struct aic_rate *sr; - struct aic_softc *sc; - int threshold; - int i; - - ch = data; - scp = ch->parent; - sc = scp->sc; - - sr = NULL; - - /* First look for equal frequency. */ - for (i = 0; rate_map[i].speed != 0; i++) { - if (rate_map[i].speed == speed) - sr = &rate_map[i]; - } - - /* If no match, just find nearest. */ - if (sr == NULL) { - for (i = 0; rate_map[i].speed != 0; i++) { - sr = &rate_map[i]; - threshold = sr->speed + ((rate_map[i + 1].speed != 0) ? - ((rate_map[i + 1].speed - sr->speed) >> 1) : 0); - if (speed < threshold) - break; - } - } - - sc->sr = sr; - - /* Clocks can be reconfigured here. */ - - return (sr->speed); -} - -static uint32_t -aicchan_setblocksize(kobj_t obj, void *data, uint32_t blocksize) -{ - struct sc_pcminfo *scp; - struct sc_chinfo *ch; - struct aic_softc *sc; - - ch = data; - scp = ch->parent; - sc = scp->sc; - - sndbuf_resize(ch->buffer, sc->dma_size / blocksize, blocksize); - - return (sndbuf_getblksz(ch->buffer)); -} - -static int -aic_intr(void *arg, xdma_transfer_status_t *status) -{ - struct sc_pcminfo *scp; - struct xdma_request *req; - xdma_channel_t *xchan; - struct sc_chinfo *ch; - struct aic_softc *sc; - int bufsize; - - scp = arg; - sc = scp->sc; - ch = &scp->chan[0]; - req = &sc->req; - - xchan = sc->xchan; - - bufsize = sndbuf_getsize(ch->buffer); - - sc->pos += req->block_len; - if (sc->pos >= bufsize) - sc->pos -= bufsize; - - if (ch->run) - chn_intr(ch->channel); - - return (0); -} - -static int -setup_xdma(struct sc_pcminfo *scp) -{ - struct aic_softc *sc; - struct sc_chinfo *ch; - int fmt; - int err; - - ch = &scp->chan[0]; - sc = scp->sc; - - fmt = sndbuf_getfmt(ch->buffer); - - KASSERT(fmt & AFMT_16BIT, ("16-bit audio supported only.")); - - sc->req.operation = XDMA_CYCLIC; - sc->req.req_type = XR_TYPE_PHYS; - sc->req.direction = XDMA_MEM_TO_DEV; - sc->req.src_addr = sc->buf_base_phys; - sc->req.dst_addr = sc->aic_fifo_paddr; - sc->req.src_width = 2; - sc->req.dst_width = 2; - sc->req.block_len = sndbuf_getblksz(ch->buffer); - sc->req.block_num = sndbuf_getblkcnt(ch->buffer); - - err = xdma_request(sc->xchan, &sc->req); - if (err != 0) { - device_printf(sc->dev, "Can't configure virtual channel\n"); - return (-1); - } - - xdma_control(sc->xchan, XDMA_CMD_BEGIN); - - return (0); -} - -static int -aic_start(struct sc_pcminfo *scp) -{ - struct aic_softc *sc; - int reg; - - sc = scp->sc; - - /* Ensure clock enabled. */ - reg = READ4(sc, I2SCR); - reg |= (I2SCR_ESCLK); - WRITE4(sc, I2SCR, reg); - - setup_xdma(scp); - - reg = (AICCR_OSS_16 | AICCR_ISS_16); - reg |= (AICCR_CHANNEL_2); - reg |= (AICCR_TDMS); - reg |= (AICCR_ERPL); - WRITE4(sc, AICCR, reg); - - return (0); -} - -static int -aic_stop(struct sc_pcminfo *scp) -{ - struct aic_softc *sc; - int reg; - - sc = scp->sc; - - reg = READ4(sc, AICCR); - reg &= ~(AICCR_TDMS | AICCR_ERPL); - WRITE4(sc, AICCR, reg); - - xdma_control(sc->xchan, XDMA_CMD_TERMINATE); - - return (0); -} - -static int -aicchan_trigger(kobj_t obj, void *data, int go) -{ - struct sc_pcminfo *scp; - struct sc_chinfo *ch; - struct aic_softc *sc; - - ch = data; - scp = ch->parent; - sc = scp->sc; - - snd_mtxlock(sc->lock); - - switch (go) { - case PCMTRIG_START: - ch->run = 1; - - sc->pos = 0; - - aic_start(scp); - - break; - - case PCMTRIG_STOP: - case PCMTRIG_ABORT: - ch->run = 0; - - aic_stop(scp); - - sc->pos = 0; - - bzero(sc->buf_base, sc->dma_size); - - break; - } - - snd_mtxunlock(sc->lock); - - return (0); -} - -static uint32_t -aicchan_getptr(kobj_t obj, void *data) -{ - struct sc_pcminfo *scp; - struct sc_chinfo *ch; - struct aic_softc *sc; - - ch = data; - scp = ch->parent; - sc = scp->sc; - - return (sc->pos); -} - -static uint32_t aic_pfmt[] = { - SND_FORMAT(AFMT_S16_LE, 2, 0), - 0 -}; - -static struct pcmchan_caps aic_pcaps = {48000, 48000, aic_pfmt, 0}; - -static struct pcmchan_caps * -aicchan_getcaps(kobj_t obj, void *data) -{ - - return (&aic_pcaps); -} - -static kobj_method_t aicchan_methods[] = { - KOBJMETHOD(channel_init, aicchan_init), - KOBJMETHOD(channel_free, aicchan_free), - KOBJMETHOD(channel_setformat, aicchan_setformat), - KOBJMETHOD(channel_setspeed, aicchan_setspeed), - KOBJMETHOD(channel_setblocksize, aicchan_setblocksize), - KOBJMETHOD(channel_trigger, aicchan_trigger), - KOBJMETHOD(channel_getptr, aicchan_getptr), - KOBJMETHOD(channel_getcaps, aicchan_getcaps), - KOBJMETHOD_END -}; -CHANNEL_DECLARE(aicchan); - -static void -aic_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err) -{ - bus_addr_t *addr; - - if (err) - return; - - addr = (bus_addr_t*)arg; - *addr = segs[0].ds_addr; -} - -static int -aic_dma_setup(struct aic_softc *sc) -{ - device_t dev; - int err; - - dev = sc->dev; - - /* DMA buffer size. */ - sc->dma_size = 131072; - - /* - * Must use dma_size boundary as modulo feature required. - * Modulo feature allows setup circular buffer. - */ - err = bus_dma_tag_create( - bus_get_dma_tag(sc->dev), - 4, sc->dma_size, /* alignment, boundary */ - BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, NULL, /* filter, filterarg */ - sc->dma_size, 1, /* maxsize, nsegments */ - sc->dma_size, 0, /* maxsegsize, flags */ - NULL, NULL, /* lockfunc, lockarg */ - &sc->dma_tag); - if (err) { - device_printf(dev, "cannot create bus dma tag\n"); - return (-1); - } - - err = bus_dmamem_alloc(sc->dma_tag, (void **)&sc->buf_base, - BUS_DMA_WAITOK | BUS_DMA_COHERENT, &sc->dma_map); - if (err) { - device_printf(dev, "cannot allocate memory\n"); - return (-1); - } - - err = bus_dmamap_load(sc->dma_tag, sc->dma_map, sc->buf_base, - sc->dma_size, aic_dmamap_cb, &sc->buf_base_phys, BUS_DMA_WAITOK); - if (err) { - device_printf(dev, "cannot load DMA map\n"); - return (-1); - } - - bzero(sc->buf_base, sc->dma_size); - - return (0); -} - -static int -aic_configure_clocks(struct aic_softc *sc) -{ - uint64_t aic_freq; - uint64_t i2s_freq; - device_t dev; - int err; - - dev = sc->dev; - - err = clk_get_by_ofw_name(sc->dev, 0, "aic", &sc->clk_aic); - if (err != 0) { - device_printf(dev, "Can't find aic clock.\n"); - return (-1); - } - - err = clk_enable(sc->clk_aic); - if (err != 0) { - device_printf(dev, "Can't enable aic clock.\n"); - return (-1); - } - - err = clk_get_by_ofw_name(sc->dev, 0, "i2s", &sc->clk_i2s); - if (err != 0) { - device_printf(dev, "Can't find i2s clock.\n"); - return (-1); - } - - err = clk_enable(sc->clk_i2s); - if (err != 0) { - device_printf(dev, "Can't enable i2s clock.\n"); - return (-1); - } - - err = clk_set_freq(sc->clk_i2s, 12000000, 0); - if (err != 0) { - device_printf(dev, "Can't set i2s frequency.\n"); - return (-1); - } - - clk_get_freq(sc->clk_aic, &aic_freq); - clk_get_freq(sc->clk_i2s, &i2s_freq); - - device_printf(dev, "Frequency aic %d i2s %d\n", - (uint32_t)aic_freq, (uint32_t)i2s_freq); - - return (0); -} - -static int -aic_configure(struct aic_softc *sc) -{ - int reg; - - WRITE4(sc, AICFR, AICFR_RST); - - /* Configure AIC */ - reg = 0; - if (sc->internal_codec) { - reg |= (AICFR_ICDC); - } else { - reg |= (AICFR_SYNCD | AICFR_BCKD); - } - reg |= (AICFR_AUSEL); /* I2S/MSB-justified format. */ - reg |= (AICFR_TFTH(8)); /* Transmit FIFO threshold */ - reg |= (AICFR_RFTH(7)); /* Receive FIFO threshold */ - WRITE4(sc, AICFR, reg); - - reg = READ4(sc, AICFR); - reg |= (AICFR_ENB); /* Enable the controller. */ - WRITE4(sc, AICFR, reg); - - return (0); -} - -static int -sysctl_hw_pcm_internal_codec(SYSCTL_HANDLER_ARGS) -{ - struct sc_pcminfo *scp; - struct sc_chinfo *ch; - struct aic_softc *sc; - int error, val; - - if (arg1 == NULL) - return (EINVAL); - - scp = arg1; - sc = scp->sc; - ch = &scp->chan[0]; - - snd_mtxlock(sc->lock); - - val = sc->internal_codec; - error = sysctl_handle_int(oidp, &val, 0, req); - if (error || req->newptr == NULL) { - snd_mtxunlock(sc->lock); - return (error); - } - if (val < 0 || val > 1) { - snd_mtxunlock(sc->lock); - return (EINVAL); - } - - if (sc->internal_codec != val) { - sc->internal_codec = val; - if (ch->run) - aic_stop(scp); - aic_configure(sc); - if (ch->run) - aic_start(scp); - } - - snd_mtxunlock(sc->lock); - - return (0); -} - -static int -aic_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-i2s")) - return (ENXIO); - - device_set_desc(dev, "Audio Interface Controller"); - - return (BUS_PROBE_DEFAULT); -} - -static int -aic_attach(device_t dev) -{ - char status[SND_STATUSLEN]; - struct sc_pcminfo *scp; - struct aic_softc *sc; - int err; - - sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); - sc->dev = dev; - sc->pos = 0; - sc->internal_codec = 1; - - /* Get xDMA controller */ - sc->xdma_tx = xdma_ofw_get(sc->dev, "tx"); - if (sc->xdma_tx == NULL) { - device_printf(dev, "Can't find DMA controller.\n"); - return (ENXIO); - } - - /* Alloc xDMA virtual channel. */ - sc->xchan = xdma_channel_alloc(sc->xdma_tx, 0); - if (sc->xchan == NULL) { - device_printf(dev, "Can't alloc virtual DMA channel.\n"); - return (ENXIO); - } - - /* Setup sound subsystem */ - sc->lock = snd_mtxcreate(device_get_nameunit(dev), "aic softc"); - if (sc->lock == NULL) { - device_printf(dev, "Can't create mtx.\n"); - return (ENXIO); - } - - if (bus_alloc_resources(dev, aic_spec, sc->res)) { - device_printf(dev, - "could not allocate resources for device\n"); - return (ENXIO); - } - - /* Memory interface */ - sc->bst = rman_get_bustag(sc->res[0]); - sc->bsh = rman_get_bushandle(sc->res[0]); - sc->aic_fifo_paddr = rman_get_start(sc->res[0]) + AICDR; - - /* Setup PCM. */ - scp = malloc(sizeof(struct sc_pcminfo), M_DEVBUF, M_WAITOK | M_ZERO); - scp->sc = sc; - scp->dev = dev; - - /* Setup audio buffer. */ - err = aic_dma_setup(sc); - if (err != 0) { - device_printf(dev, "Can't setup sound buffer.\n"); - return (ENXIO); - } - - /* Setup clocks. */ - err = aic_configure_clocks(sc); - if (err != 0) { - device_printf(dev, "Can't configure clocks.\n"); - return (ENXIO); - } - - err = aic_configure(sc); - if (err != 0) { - device_printf(dev, "Can't configure AIC.\n"); - return (ENXIO); - } - - pcm_setflags(dev, pcm_getflags(dev) | SD_F_MPSAFE); - - /* Setup interrupt handler. */ - err = xdma_setup_intr(sc->xchan, 0, aic_intr, scp, &sc->ih); - if (err) { - device_printf(sc->dev, - "Can't setup xDMA interrupt handler.\n"); - return (ENXIO); - } - - err = pcm_register(dev, scp, 1, 0); - if (err) { - device_printf(dev, "Can't register pcm.\n"); - return (ENXIO); - } - - scp->chnum = 0; - pcm_addchan(dev, PCMDIR_PLAY, &aicchan_class, scp); - scp->chnum++; - - snprintf(status, SND_STATUSLEN, "at %s", ofw_bus_get_name(dev)); - pcm_setstatus(dev, status); - - mixer_init(dev, &aicmixer_class, scp); - - /* Create device sysctl node. */ - SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), - OID_AUTO, "internal_codec", - CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, - scp, 0, sysctl_hw_pcm_internal_codec, "I", - "use internal audio codec"); - - return (0); -} - -static int -aic_detach(device_t dev) -{ - struct aic_softc *sc; - - sc = device_get_softc(dev); - - xdma_channel_free(sc->xchan); - - bus_release_resources(dev, aic_spec, sc->res); - - return (0); -} - -static device_method_t aic_pcm_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, aic_probe), - DEVMETHOD(device_attach, aic_attach), - DEVMETHOD(device_detach, aic_detach), - DEVMETHOD_END -}; - -static driver_t aic_pcm_driver = { - "pcm", - aic_pcm_methods, - PCM_SOFTC_SIZE, -}; - -DRIVER_MODULE(aic, simplebus, aic_pcm_driver, pcm_devclass, 0, 0); -MODULE_DEPEND(aic, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); -MODULE_VERSION(aic, 1); diff --git a/sys/mips/ingenic/jz4780_aic.h b/sys/mips/ingenic/jz4780_aic.h deleted file mode 100644 index a7bd478c8d4..00000000000 --- a/sys/mips/ingenic/jz4780_aic.h +++ /dev/null @@ -1,72 +0,0 @@ -/*- - * Copyright (c) 2016 Ruslan Bukin - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#define AICFR 0x00 /* AIC Configuration Register */ -#define AICFR_TFTH_S 16 /* Transmit FIFO threshold for interrupt or DMA request. */ -#define AICFR_TFTH_M (0x1f << AICFR_TFTH_S) -#define AICFR_TFTH(x) ((x) << AICFR_TFTH_S) -#define AICFR_RFTH_S 24 /* Receive FIFO threshold for interrupt or DMA request. */ -#define AICFR_RFTH_M (0x0f << AICFR_RFTH_S) -#define AICFR_RFTH(x) ((x) << AICFR_RFTH_S) -#define AICFR_ICDC (1 << 5) /* Internal CODEC used. */ -#define AICFR_AUSEL (1 << 4) /* Audio Unit Select */ -#define AICFR_RST (1 << 3) /* Reset AIC. */ -#define AICFR_BCKD (1 << 2) /* BIT_CLK Direction. */ -#define AICFR_SYNCD (1 << 1) /* SYNC is generated internally and driven out to the CODEC. */ -#define AICFR_ENB (1 << 0) /* Enable AIC Controller. */ -#define AICCR 0x04 /* AIC Common Control Register */ -#define AICCR_TFLUSH (1 << 8) /* Transmit FIFO Flush. */ -#define AICCR_RFLUSH (1 << 7) /* Receive FIFO Flush. */ -#define AICCR_CHANNEL_S 24 -#define AICCR_CHANNEL_M (0x7 << AICCR_CHANNEL_S) -#define AICCR_CHANNEL_2 (0x1 << AICCR_CHANNEL_S) /* 2 channels, stereo */ -#define AICCR_ISS_S 16 /* Input Sample Size. */ -#define AICCR_ISS_M (0x7 << AICCR_ISS_S) -#define AICCR_ISS_16 (0x1 << AICCR_ISS_S) -#define AICCR_OSS_S 19 /* Output Sample Size. */ -#define AICCR_OSS_M (0x7 << AICCR_OSS_S) -#define AICCR_OSS_16 (0x1 << AICCR_OSS_S) -#define AICCR_RDMS (1 << 15) /* Receive DMA enable. */ -#define AICCR_TDMS (1 << 14) /* Transmit DMA enable. */ -#define AICCR_ENLBF (1 << 2) /* Enable AIC Loop Back Function. */ -#define AICCR_ERPL (1 << 1) /* Enable Playing Back function. */ -#define I2SCR 0x10 /* AIC I2S/MSB-justified Control */ -#define I2SCR_ESCLK (1 << 4) /* Enable SYSCLK output. */ -#define I2SCR_AMSL (1 << 0) /* Select MSB-Justified Operation Mode. */ -#define AICSR 0x14 /* AIC FIFO Status Register Register */ -#define I2SSR 0x1C /* AIC I2S/MSB-justified Status Register */ -#define I2SDIV 0x30 /* AIC I2S/MSB-justified Clock Divider Register */ -#define AICDR 0x34 /* AIC FIFO Data Port Register */ -#define SPENA 0x80 /* SPDIF Enable Register */ -#define SPCTRL 0x84 /* SPDIF Control Register */ -#define SPSTATE 0x88 /* SPDIF Status Register */ -#define SPCFG1 0x8C /* SPDIF Configure 1 Register */ -#define SPCFG2 0x90 /* SPDIF Configure 2 Register */ -#define SPFIFO 0x94 /* SPDIF FIFO Register */ diff --git a/sys/mips/ingenic/jz4780_clk.h b/sys/mips/ingenic/jz4780_clk.h deleted file mode 100644 index b9edd1b0db2..00000000000 --- a/sys/mips/ingenic/jz4780_clk.h +++ /dev/null @@ -1,91 +0,0 @@ -/*- - * Copyright 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MIPS_INGENIC_JZ4780_CLK_H -#define _MIPS_INGENIC_JZ4780_CLK_H - -#include -#include - -/* Convenience bitfiled manipulation macros */ -#define REG_MSK(field) (((1u << field ## _WIDTH) - 1) << field ##_SHIFT) -#define REG_VAL(field, val) ((val) << field ##_SHIFT) -#define REG_CLR(reg, field) ((reg) & ~REG_MSK(field)) -#define REG_GET(reg, field) (((reg) & REG_MSK(field)) >> field ##_SHIFT) -#define REG_SET(reg, field, val) (REG_CLR(reg, field) | REG_VAL(field, val)) - -/* Common clock macros */ -#define CLK_LOCK(_sc) mtx_lock((_sc)->clk_mtx) -#define CLK_UNLOCK(_sc) mtx_unlock((_sc)->clk_mtx) - -#define CLK_WR_4(_sc, off, val) bus_write_4((_sc)->clk_res, (off), (val)) -#define CLK_RD_4(_sc, off) bus_read_4((_sc)->clk_res, (off)) - -struct jz4780_clk_mux_descr { - uint16_t mux_reg; - uint16_t mux_shift: 5; - uint16_t mux_bits: 5; - uint16_t mux_map: 4; /* Map into mux space */ -}; - -struct jz4780_clk_div_descr { - uint16_t div_reg; - uint16_t div_shift: 5; - uint16_t div_bits: 5; - uint16_t div_lg: 5; - int div_ce_bit: 6; /* -1, if CE bit is not present */ - int div_st_bit: 6; /* Can be negative */ - int div_busy_bit: 6; /* Can be negative */ -}; - -struct jz4780_clk_descr { - uint16_t clk_id: 6; - uint16_t clk_type: 3; - int clk_gate_bit: 7; /* Can be negative */ - struct jz4780_clk_mux_descr clk_mux; - struct jz4780_clk_div_descr clk_div; - const char *clk_name; - const char *clk_pnames[4]; -}; - -/* clk_type bits */ -#define CLK_MASK_GATE 0x01 -#define CLK_MASK_DIV 0x02 -#define CLK_MASK_MUX 0x04 - -extern int jz4780_clk_gen_register(struct clkdom *clkdom, - const struct jz4780_clk_descr *descr, struct mtx *dev_mtx, - struct resource *mem_res); - -extern int jz4780_clk_pll_register(struct clkdom *clkdom, - struct clknode_init_def *clkdef, struct mtx *dev_mtx, - struct resource *mem_res, uint32_t mem_reg); - -extern int jz4780_clk_otg_register(struct clkdom *clkdom, - struct clknode_init_def *clkdef, struct mtx *dev_mtx, - struct resource *mem_res); - -#endif /* _MIPS_INGENIC_JZ4780_CLK_PLL_H */ diff --git a/sys/mips/ingenic/jz4780_clk_gen.c b/sys/mips/ingenic/jz4780_clk_gen.c deleted file mode 100644 index bd818618d8f..00000000000 --- a/sys/mips/ingenic/jz4780_clk_gen.c +++ /dev/null @@ -1,320 +0,0 @@ -/*- - * Copyright 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Ingenic JZ4780 generic CGU clock driver. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -/* JZ4780 generic mux and div clocks implementation */ -static int jz4780_clk_gen_init(struct clknode *clk, device_t dev); -static int jz4780_clk_gen_recalc_freq(struct clknode *clk, uint64_t *freq); -static int jz4780_clk_gen_set_freq(struct clknode *clk, uint64_t fin, - uint64_t *fout, int flags, int *stop); -static int jz4780_clk_gen_set_gate(struct clknode *clk, bool enable); -static int jz4780_clk_gen_set_mux(struct clknode *clk, int src); - -struct jz4780_clk_gen_sc { - struct mtx *clk_mtx; - struct resource *clk_res; - int clk_reg; - const struct jz4780_clk_descr *clk_descr; -}; - -/* - * JZ4780 clock PLL clock methods - */ -static clknode_method_t jz4780_clk_gen_methods[] = { - CLKNODEMETHOD(clknode_init, jz4780_clk_gen_init), - CLKNODEMETHOD(clknode_set_gate, jz4780_clk_gen_set_gate), - CLKNODEMETHOD(clknode_recalc_freq, jz4780_clk_gen_recalc_freq), - CLKNODEMETHOD(clknode_set_freq, jz4780_clk_gen_set_freq), - CLKNODEMETHOD(clknode_set_mux, jz4780_clk_gen_set_mux), - - CLKNODEMETHOD_END -}; -DEFINE_CLASS_1(jz4780_clk_pll, jz4780_clk_gen_class, jz4780_clk_gen_methods, - sizeof(struct jz4780_clk_gen_sc), clknode_class); - -static inline unsigned -mux_to_reg(unsigned src, unsigned map) -{ - unsigned ret, bit; - - bit = (1u << 3); - for (ret = 0; bit; ret++, bit >>= 1) { - if (map & bit) { - if (src-- == 0) - return (ret); - } - } - panic("mux_to_reg"); -} - -static inline unsigned -reg_to_mux(unsigned reg, unsigned map) -{ - unsigned ret, bit; - - bit = (1u << 3); - for (ret = 0; reg; reg--, bit >>= 1) - if (map & bit) - ret++; - return (ret); -} - -static int -jz4780_clk_gen_init(struct clknode *clk, device_t dev) -{ - struct jz4780_clk_gen_sc *sc; - uint32_t reg, msk, parent_idx; - - sc = clknode_get_softc(clk); - CLK_LOCK(sc); - /* Figure our parent out */ - if (sc->clk_descr->clk_type & CLK_MASK_MUX) { - msk = (1u << sc->clk_descr->clk_mux.mux_bits) - 1; - reg = CLK_RD_4(sc, sc->clk_descr->clk_mux.mux_reg); - reg = (reg >> sc->clk_descr->clk_mux.mux_shift) & msk; - parent_idx = reg_to_mux(reg, sc->clk_descr->clk_mux.mux_map); - } else - parent_idx = 0; - CLK_UNLOCK(sc); - - clknode_init_parent_idx(clk, parent_idx); - return (0); -} - -static int -jz4780_clk_gen_recalc_freq(struct clknode *clk, uint64_t *freq) -{ - struct jz4780_clk_gen_sc *sc; - uint32_t reg; - - sc = clknode_get_softc(clk); - - /* Calculate divisor frequency */ - if (sc->clk_descr->clk_type & CLK_MASK_DIV) { - uint32_t msk; - - msk = (1u << sc->clk_descr->clk_div.div_bits) - 1; - reg = CLK_RD_4(sc, sc->clk_descr->clk_div.div_reg); - reg = (reg >> sc->clk_descr->clk_div.div_shift) & msk; - reg = (reg + 1) << sc->clk_descr->clk_div.div_lg; - *freq /= reg; - } - return (0); -} - -#define DIV_TIMEOUT 100 - -static int -jz4780_clk_gen_set_freq(struct clknode *clk, uint64_t fin, - uint64_t *fout, int flags, int *stop) -{ - struct jz4780_clk_gen_sc *sc; - uint64_t _fout; - uint32_t divider, div_reg, div_msk, reg, div_l, div_h; - int rv; - - sc = clknode_get_softc(clk); - - /* Find closest divider */ - div_l = howmany(fin, *fout); - div_h = fin / *fout; - divider = abs((int64_t)*fout - (fin / div_l)) < - abs((int64_t)*fout - (fin / div_h)) ? div_l : div_h; - - /* Adjust for divider multiplier */ - div_reg = divider >> sc->clk_descr->clk_div.div_lg; - divider = div_reg << sc->clk_descr->clk_div.div_lg; - if (divider == 0) - divider = 1; - - _fout = fin / divider; - - /* Rounding */ - if ((flags & CLK_SET_ROUND_UP) && (*fout > _fout)) - div_reg--; - else if ((flags & CLK_SET_ROUND_DOWN) && (*fout < _fout)) - div_reg++; - if (div_reg == 0) - div_reg = 1; - - div_msk = (1u << sc->clk_descr->clk_div.div_bits) - 1; - - *stop = 1; - if (div_reg > div_msk + 1) { - *stop = 0; - div_reg = div_msk; - } - - divider = (div_reg << sc->clk_descr->clk_div.div_lg); - div_reg--; - - if ((flags & CLK_SET_DRYRUN) != 0) { - if (*stop != 0 && *fout != fin / divider && - (flags & (CLK_SET_ROUND_UP | CLK_SET_ROUND_DOWN)) == 0) - return (ERANGE); - *fout = fin / divider; - return (0); - } - - CLK_LOCK(sc); - /* Apply the new divider value */ - reg = CLK_RD_4(sc, sc->clk_descr->clk_div.div_reg); - reg &= ~(div_msk << sc->clk_descr->clk_div.div_shift); - reg |= (div_reg << sc->clk_descr->clk_div.div_shift); - /* Set the change enable bit, it present */ - if (sc->clk_descr->clk_div.div_ce_bit >= 0) - reg |= (1u << sc->clk_descr->clk_div.div_ce_bit); - /* Clear stop bit, it present */ - if (sc->clk_descr->clk_div.div_st_bit >= 0) - reg &= ~(1u << sc->clk_descr->clk_div.div_st_bit); - /* Initiate the change */ - CLK_WR_4(sc, sc->clk_descr->clk_div.div_reg, reg); - - /* Wait for busy bit to clear indicating the change is complete */ - rv = 0; - if (sc->clk_descr->clk_div.div_busy_bit >= 0) { - int i; - - for (i = 0; i < DIV_TIMEOUT; i++) { - reg = CLK_RD_4(sc, sc->clk_descr->clk_div.div_reg); - if (!(reg & (1u << sc->clk_descr->clk_div.div_busy_bit))) - break; - DELAY(1000); - } - if (i == DIV_TIMEOUT) - rv = ETIMEDOUT; - } - CLK_UNLOCK(sc); - - *fout = fin / divider; - return (rv); -} - -static int -jz4780_clk_gen_set_mux(struct clknode *clk, int src) -{ - struct jz4780_clk_gen_sc *sc; - uint32_t reg, msk; - - sc = clknode_get_softc(clk); - - /* Only mux nodes are capable of being reparented */ - if (!(sc->clk_descr->clk_type & CLK_MASK_MUX)) - return (src ? EINVAL : 0); - - msk = (1u << sc->clk_descr->clk_mux.mux_bits) - 1; - src = mux_to_reg(src & msk, sc->clk_descr->clk_mux.mux_map); - - CLK_LOCK(sc); - reg = CLK_RD_4(sc, sc->clk_descr->clk_mux.mux_reg); - reg &= ~(msk << sc->clk_descr->clk_mux.mux_shift); - reg |= (src << sc->clk_descr->clk_mux.mux_shift); - CLK_WR_4(sc, sc->clk_descr->clk_mux.mux_reg, reg); - CLK_UNLOCK(sc); - - return (0); -} - -static int -jz4780_clk_gen_set_gate(struct clknode *clk, bool enable) -{ - struct jz4780_clk_gen_sc *sc; - uint32_t off, reg, bit; - - sc = clknode_get_softc(clk); - - /* Check is clock can be gated */ - if (sc->clk_descr->clk_gate_bit < 0) - return 0; - - bit = sc->clk_descr->clk_gate_bit; - if (bit < 32) { - off = JZ_CLKGR0; - } else { - off = JZ_CLKGR1; - bit -= 32; - } - - CLK_LOCK(sc); - reg = CLK_RD_4(sc, off); - if (enable) - reg &= ~(1u << bit); - else - reg |= (1u << bit); - CLK_WR_4(sc, off, reg); - CLK_UNLOCK(sc); - - return (0); -} - -int jz4780_clk_gen_register(struct clkdom *clkdom, - const struct jz4780_clk_descr *descr, struct mtx *dev_mtx, - struct resource *mem_res) -{ - struct clknode_init_def clkdef; - struct clknode *clk; - struct jz4780_clk_gen_sc *sc; - - clkdef.id = descr->clk_id; - clkdef.name = __DECONST(char *, descr->clk_name); - /* Silly const games to work around API deficiency */ - clkdef.parent_names = (const char **)(uintptr_t)&descr->clk_pnames[0]; - clkdef.flags = CLK_NODE_STATIC_STRINGS; - if (descr->clk_type & CLK_MASK_MUX) - clkdef.parent_cnt = __bitcount16(descr->clk_mux.mux_map); - else - clkdef.parent_cnt = 1; - - clk = clknode_create(clkdom, &jz4780_clk_gen_class, &clkdef); - if (clk == NULL) - return (1); - - sc = clknode_get_softc(clk); - sc->clk_mtx = dev_mtx; - sc->clk_res = mem_res; - sc->clk_descr = descr; - clknode_register(clkdom, clk); - - return (0); -} diff --git a/sys/mips/ingenic/jz4780_clk_otg.c b/sys/mips/ingenic/jz4780_clk_otg.c deleted file mode 100644 index 8165597cfd6..00000000000 --- a/sys/mips/ingenic/jz4780_clk_otg.c +++ /dev/null @@ -1,165 +0,0 @@ -/*- - * Copyright 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Ingenic JZ4780 OTG PHY clock driver. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -/* JZ4780 OTG PHY clock */ -static int jz4780_clk_otg_init(struct clknode *clk, device_t dev); -static int jz4780_clk_otg_recalc_freq(struct clknode *clk, uint64_t *freq); -static int jz4780_clk_otg_set_freq(struct clknode *clk, uint64_t fin, - uint64_t *fout, int flags, int *stop); - -struct jz4780_clk_otg_sc { - struct mtx *clk_mtx; - struct resource *clk_res; -}; - -/* - * JZ4780 OTG PHY clock methods - */ -static clknode_method_t jz4780_clk_otg_methods[] = { - CLKNODEMETHOD(clknode_init, jz4780_clk_otg_init), - CLKNODEMETHOD(clknode_recalc_freq, jz4780_clk_otg_recalc_freq), - CLKNODEMETHOD(clknode_set_freq, jz4780_clk_otg_set_freq), - - CLKNODEMETHOD_END -}; -DEFINE_CLASS_1(jz4780_clk_pll, jz4780_clk_otg_class, jz4780_clk_otg_methods, - sizeof(struct jz4780_clk_otg_sc), clknode_class); - -static int -jz4780_clk_otg_init(struct clknode *clk, device_t dev) -{ - struct jz4780_clk_otg_sc *sc; - uint32_t reg; - - sc = clknode_get_softc(clk); - CLK_LOCK(sc); - /* Force the use fo the core clock */ - reg = CLK_RD_4(sc, JZ_USBPCR1); - reg &= ~PCR_REFCLK_M; - reg |= PCR_REFCLK_CORE; - CLK_WR_4(sc, JZ_USBPCR1, reg); - CLK_UNLOCK(sc); - - clknode_init_parent_idx(clk, 0); - return (0); -} - -static const struct { - uint32_t div_val; - uint32_t freq; -} otg_div_table[] = { - { PCR_CLK_12, 12000000 }, - { PCR_CLK_192, 19200000 }, - { PCR_CLK_24, 24000000 }, - { PCR_CLK_48, 48000000 } -}; - -static int -jz4780_clk_otg_recalc_freq(struct clknode *clk, uint64_t *freq) -{ - struct jz4780_clk_otg_sc *sc; - uint32_t reg; - int i; - - sc = clknode_get_softc(clk); - reg = CLK_RD_4(sc, JZ_USBPCR1); - reg &= PCR_CLK_M; - - for (i = 0; i < nitems(otg_div_table); i++) - if (otg_div_table[i].div_val == reg) - *freq = otg_div_table[i].freq; - return (0); -} - -static int -jz4780_clk_otg_set_freq(struct clknode *clk, uint64_t fin, - uint64_t *fout, int flags, int *stop) -{ - struct jz4780_clk_otg_sc *sc; - uint32_t reg; - int i; - - sc = clknode_get_softc(clk); - - for (i = 0; i < nitems(otg_div_table) - 1; i++) { - if (*fout < (otg_div_table[i].freq + otg_div_table[i + 1].freq) / 2) - break; - } - - *fout = otg_div_table[i].freq; - - *stop = 1; - if (flags & CLK_SET_DRYRUN) - return (0); - - CLK_LOCK(sc); - reg = CLK_RD_4(sc, JZ_USBPCR1); - /* Set the calculated values */ - reg &= ~PCR_CLK_M; - reg |= otg_div_table[i].div_val; - /* Initiate the change */ - CLK_WR_4(sc, JZ_USBPCR1, reg); - CLK_UNLOCK(sc); - - return (0); -} - -int jz4780_clk_otg_register(struct clkdom *clkdom, - struct clknode_init_def *clkdef, struct mtx *dev_mtx, - struct resource *mem_res) -{ - struct clknode *clk; - struct jz4780_clk_otg_sc *sc; - - clk = clknode_create(clkdom, &jz4780_clk_otg_class, clkdef); - if (clk == NULL) - return (1); - - sc = clknode_get_softc(clk); - sc->clk_mtx = dev_mtx; - sc->clk_res = mem_res; - clknode_register(clkdom, clk); - return (0); -} diff --git a/sys/mips/ingenic/jz4780_clk_pll.c b/sys/mips/ingenic/jz4780_clk_pll.c deleted file mode 100644 index 6f647d53bf3..00000000000 --- a/sys/mips/ingenic/jz4780_clk_pll.c +++ /dev/null @@ -1,232 +0,0 @@ -/*- - * Copyright 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Ingenic JZ4780 CGU driver. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -/********************************************************************** - * JZ4780 PLL control register bit fields - **********************************************************************/ -#define CGU_PLL_M_SHIFT 19 -#define CGU_PLL_M_WIDTH 13 - -#define CGU_PLL_N_SHIFT 13 -#define CGU_PLL_N_WIDTH 6 - -#define CGU_PLL_OD_SHIFT 9 -#define CGU_PLL_OD_WIDTH 4 - -#define CGU_PLL_LOCK_SHIFT 6 -#define CGU_PLL_LOCK_WIDTH 1 - -#define CGU_PLL_ON_SHIFT 4 -#define CGU_PLL_ON_WIDTH 1 - -#define CGU_PLL_MODE_SHIFT 3 -#define CGU_PLL_MODE_WIDTH 1 - -#define CGU_PLL_BP_SHIFT 1 -#define CGU_PLL_BP_WIDTH 1 - -#define CGU_PLL_EN_SHIFT 0 -#define CGU_PLL_EN_WIDTH 1 - -/* JZ4780 PLL clock */ -static int jz4780_clk_pll_init(struct clknode *clk, device_t dev); -static int jz4780_clk_pll_recalc_freq(struct clknode *clk, uint64_t *freq); -static int jz4780_clk_pll_set_freq(struct clknode *clk, uint64_t fin, - uint64_t *fout, int flags, int *stop); - -struct jz4780_clk_pll_sc { - struct mtx *clk_mtx; - struct resource *clk_res; - uint32_t clk_reg; -}; - -/* - * JZ4780 PLL clock methods - */ -static clknode_method_t jz4780_clk_pll_methods[] = { - CLKNODEMETHOD(clknode_init, jz4780_clk_pll_init), - CLKNODEMETHOD(clknode_recalc_freq, jz4780_clk_pll_recalc_freq), - CLKNODEMETHOD(clknode_set_freq, jz4780_clk_pll_set_freq), - - CLKNODEMETHOD_END -}; -DEFINE_CLASS_1(jz4780_clk_pll, jz4780_clk_pll_class, jz4780_clk_pll_methods, - sizeof(struct jz4780_clk_pll_sc), clknode_class); - -static int -jz4780_clk_pll_init(struct clknode *clk, device_t dev) -{ - struct jz4780_clk_pll_sc *sc; - uint32_t reg; - - sc = clknode_get_softc(clk); - CLK_LOCK(sc); - reg = CLK_RD_4(sc, sc->clk_reg); - CLK_WR_4(sc, sc->clk_reg, reg); - CLK_UNLOCK(sc); - - clknode_init_parent_idx(clk, 0); - return (0); -} - -static int -jz4780_clk_pll_recalc_freq(struct clknode *clk, uint64_t *freq) -{ - struct jz4780_clk_pll_sc *sc; - uint32_t reg, m, n, od; - - sc = clknode_get_softc(clk); - reg = CLK_RD_4(sc, sc->clk_reg); - - /* Check for PLL enabled status */ - if (REG_GET(reg, CGU_PLL_EN) == 0) { - *freq = 0; - return 0; - } - - /* Return parent frequency if PPL is being bypassed */ - if (REG_GET(reg, CGU_PLL_BP) != 0) - return 0; - - m = REG_GET(reg, CGU_PLL_M) + 1; - n = REG_GET(reg, CGU_PLL_N) + 1; - od = REG_GET(reg, CGU_PLL_OD) + 1; - - /* Sanity check values */ - if (m == 0 || n == 0 || od == 0) { - *freq = 0; - return (EINVAL); - } - - *freq = ((*freq / n) * m) / od; - return (0); -} - -#define MHZ (1000 * 1000) -#define PLL_TIMEOUT 100 - -static int -jz4780_clk_pll_wait_lock(struct jz4780_clk_pll_sc *sc) -{ - int i; - - for (i = 0; i < PLL_TIMEOUT; i++) { - if (CLK_RD_4(sc, sc->clk_reg) & REG_VAL(CGU_PLL_LOCK, 1)) - return (0); - DELAY(1000); - } - return (ETIMEDOUT); -} - -static int -jz4780_clk_pll_set_freq(struct clknode *clk, uint64_t fin, - uint64_t *fout, int flags, int *stop) -{ - struct jz4780_clk_pll_sc *sc; - uint32_t reg, m, n, od; - int rv; - - sc = clknode_get_softc(clk); - - /* Should be able to figure all clocks with m & n only */ - od = 1; - - m = MIN((uint32_t)(*fout / MHZ), (1u << CGU_PLL_M_WIDTH)); - m = MIN(m, 1); - - n = MIN((uint32_t)(fin / MHZ), (1u << CGU_PLL_N_WIDTH)); - n = MIN(n, 1); - - if (flags & CLK_SET_DRYRUN) { - if (((flags & (CLK_SET_ROUND_UP | CLK_SET_ROUND_DOWN)) == 0) && - (*fout != (((fin / n) * m) / od))) - return (ERANGE); - - *fout = ((fin / n) * m) / od; - return (0); - } - - CLK_LOCK(sc); - reg = CLK_RD_4(sc, sc->clk_reg); - - /* Set the calculated values */ - reg = REG_SET(reg, CGU_PLL_M, m - 1); - reg = REG_SET(reg, CGU_PLL_N, n - 1); - reg = REG_SET(reg, CGU_PLL_OD, od - 1); - - /* Enable the PLL */ - reg = REG_SET(reg, CGU_PLL_EN, 1); - reg = REG_SET(reg, CGU_PLL_BP, 0); - - /* Initiate the change */ - CLK_WR_4(sc, sc->clk_reg, reg); - - /* Wait for PLL to lock */ - rv = jz4780_clk_pll_wait_lock(sc); - CLK_UNLOCK(sc); - if (rv != 0) - return (rv); - - *fout = ((fin / n) * m) / od; - return (0); -} - -int jz4780_clk_pll_register(struct clkdom *clkdom, - struct clknode_init_def *clkdef, struct mtx *dev_mtx, - struct resource *mem_res, uint32_t mem_reg) -{ - struct clknode *clk; - struct jz4780_clk_pll_sc *sc; - - clk = clknode_create(clkdom, &jz4780_clk_pll_class, clkdef); - if (clk == NULL) - return (1); - - sc = clknode_get_softc(clk); - sc->clk_mtx = dev_mtx; - sc->clk_res = mem_res; - sc->clk_reg = mem_reg; - clknode_register(clkdom, clk); - return (0); -} diff --git a/sys/mips/ingenic/jz4780_clock.c b/sys/mips/ingenic/jz4780_clock.c deleted file mode 100644 index ee9f6020b68..00000000000 --- a/sys/mips/ingenic/jz4780_clock.c +++ /dev/null @@ -1,828 +0,0 @@ -/*- - * Copyright 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Ingenic JZ4780 CGU driver. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include -#include -#include - -#include "clkdev_if.h" - -#include - -/********************************************************************** - * JZ4780 CGU clock domain - **********************************************************************/ -struct jz4780_clock_softc { - device_t dev; - struct resource *res[1]; - struct mtx mtx; - struct clkdom *clkdom; -}; - -static struct resource_spec jz4780_clock_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { -1, 0 } -}; - -struct jz4780_clk_pll_def { - uint16_t clk_id; - uint16_t clk_reg; - const char *clk_name; - const char *clk_pname[1]; -}; - -#define PLL(_id, cname, pname, reg) { \ - .clk_id = _id, \ - .clk_reg = reg, \ - .clk_name = cname, \ - .clk_pname[0] = pname, \ -} - -struct jz4780_clk_gate_def { - uint16_t clk_id; - uint16_t clk_bit; - const char *clk_name; - const char *clk_pname[1]; -}; - -#define GATE(_id, cname, pname, bit) { \ - .clk_id = _id, \ - .clk_bit = bit, \ - .clk_name = cname, \ - .clk_pname[0] = pname, \ -} - -#define MUX(reg, shift, bits, map) \ - .clk_mux.mux_reg = (reg), \ - .clk_mux.mux_shift = (shift), \ - .clk_mux.mux_bits = (bits), \ - .clk_mux.mux_map = (map), -#define NO_MUX - -#define DIV(reg, shift, lg, bits, ce, st, bb) \ - .clk_div.div_reg = (reg), \ - .clk_div.div_shift = (shift), \ - .clk_div.div_bits = (bits), \ - .clk_div.div_lg = (lg), \ - .clk_div.div_ce_bit = (ce), \ - .clk_div.div_st_bit = (st), \ - .clk_div.div_busy_bit = (bb), -#define NO_DIV \ - -#define GATEBIT(bit) \ - .clk_gate_bit = (bit), -#define NO_GATE \ - .clk_gate_bit = (-1), - -#define PLIST(pnames...) \ - .clk_pnames = { pnames }, - -#define GENCLK(id, name, type, parents, mux, div, gt) { \ - .clk_id = id, \ - .clk_type = type, \ - .clk_name = name, \ - parents \ - mux \ - div \ - gt \ -} - -/* PLL definitions */ -static struct jz4780_clk_pll_def pll_clks[] = { - PLL(JZ4780_CLK_APLL, "apll", "ext", JZ_CPAPCR), - PLL(JZ4780_CLK_MPLL, "mpll", "ext", JZ_CPMPCR), - PLL(JZ4780_CLK_EPLL, "epll", "ext", JZ_CPEPCR), - PLL(JZ4780_CLK_VPLL, "vpll", "ext", JZ_CPVPCR), -}; - -/* OTG PHY clock (reuse gate def structure */ -static struct jz4780_clk_gate_def otg_clks[] = { - GATE(JZ4780_CLK_OTGPHY, "otg_phy", "ext", 0), -}; - -static const struct jz4780_clk_descr gen_clks[] = { - GENCLK(JZ4780_CLK_SCLKA, "sclk_a", CLK_MASK_MUX, - PLIST("apll", "ext", "rtc"), - MUX(JZ_CPCCR, 30, 2, 0x7), - NO_DIV, - NO_GATE - ), - - GENCLK(JZ4780_CLK_CPUMUX, "cpumux", CLK_MASK_MUX, - PLIST("sclk_a", "mpll", "epll"), - MUX(JZ_CPCCR, 28, 2, 0x7), - NO_DIV, - NO_GATE - ), - - GENCLK(JZ4780_CLK_CPU, "cpu", CLK_MASK_DIV, - PLIST("cpumux"), - NO_MUX, - DIV(JZ_CPCCR, 0, 0, 4, 22, -1, -1), - NO_GATE - ), - - GENCLK(JZ4780_CLK_L2CACHE, "l2cache", CLK_MASK_DIV, - PLIST("cpumux"), - NO_MUX, - DIV(JZ_CPCCR, 4, 0, 4, -1, -1, -1), - NO_GATE - ), - - GENCLK(JZ4780_CLK_AHB0, "ahb0", CLK_MASK_MUX | CLK_MASK_DIV, - PLIST("sclk_a", "mpll", "epll"), - MUX(JZ_CPCCR, 26, 2, 0x7), - DIV(JZ_CPCCR, 8, 0, 4, 21, -1, -1), - NO_GATE - ), - - GENCLK(JZ4780_CLK_AHB2PMUX, "ahb2_apb_mux", CLK_MASK_MUX, - PLIST("sclk_a", "mpll", "rtc"), - MUX(JZ_CPCCR, 24, 2, 0x7), - NO_DIV, - NO_GATE - ), - - GENCLK(JZ4780_CLK_AHB2, "ahb2", CLK_MASK_DIV, - PLIST("ahb2_apb_mux"), - NO_MUX, - DIV(JZ_CPCCR, 12, 0, 4, 20, -1, -1), - NO_GATE - ), - - GENCLK(JZ4780_CLK_PCLK, "pclk", CLK_MASK_DIV, - PLIST("ahb2_apb_mux"), - NO_MUX, - DIV(JZ_CPCCR, 16, 0, 4, 20, -1, -1), - NO_GATE - ), - - GENCLK(JZ4780_CLK_DDR, "ddr", CLK_MASK_MUX | CLK_MASK_DIV, - PLIST("sclk_a", "mpll"), - MUX(JZ_DDCDR, 30, 2, 0x6), - DIV(JZ_DDCDR, 0, 0, 4, 29, 28, 27), - NO_GATE - ), - - GENCLK(JZ4780_CLK_VPU, "vpu", CLK_MASK_MUX | CLK_MASK_DIV | CLK_MASK_GATE, - PLIST("sclk_a", "mpll", "epll"), - MUX(JZ_VPUCDR, 30, 2, 0xe), - DIV(JZ_VPUCDR, 0, 0, 4, 29, 28, 27), - GATEBIT(32 + 2) - ), - - GENCLK(JZ4780_CLK_I2SPLL, "i2s_pll", CLK_MASK_MUX | CLK_MASK_DIV, - PLIST("sclk_a", "epll"), - MUX(JZ_I2SCDR, 30, 1, 0xc), - DIV(JZ_I2SCDR, 0, 0, 8, 29, 28, 27), - NO_GATE - ), - - GENCLK(JZ4780_CLK_I2S, "i2s", CLK_MASK_MUX, - PLIST("ext", "i2s_pll"), - MUX(JZ_I2SCDR, 31, 1, 0xc), - NO_DIV, - NO_GATE - ), - - GENCLK(JZ4780_CLK_LCD0PIXCLK, "lcd0pixclk", CLK_MASK_MUX | CLK_MASK_DIV, - PLIST("sclk_a", "mpll", "vpll"), - MUX(JZ_LP0CDR, 30, 2, 0xe), - DIV(JZ_LP0CDR, 0, 0, 8, 28, 27, 26), - NO_GATE - ), - - GENCLK(JZ4780_CLK_LCD1PIXCLK, "lcd1pixclk", CLK_MASK_MUX | CLK_MASK_DIV, - PLIST("sclk_a", "mpll", "vpll"), - MUX(JZ_LP1CDR, 30, 2, 0xe), - DIV(JZ_LP1CDR, 0, 0, 8, 28, 27, 26), - NO_GATE - ), - - GENCLK(JZ4780_CLK_MSCMUX, "msc_mux", CLK_MASK_MUX, - PLIST("sclk_a", "mpll"), - MUX(JZ_MSC0CDR, 30, 2, 0x6), - NO_DIV, - NO_GATE - ), - - GENCLK(JZ4780_CLK_MSC0, "msc0", CLK_MASK_DIV | CLK_MASK_GATE, - PLIST("msc_mux"), - NO_MUX, - DIV(JZ_MSC0CDR, 0, 1, 8, 29, 28, 27), - GATEBIT(3) - ), - - GENCLK(JZ4780_CLK_MSC1, "msc1", CLK_MASK_DIV | CLK_MASK_GATE, - PLIST("msc_mux"), - NO_MUX, - DIV(JZ_MSC1CDR, 0, 1, 8, 29, 28, 27), - GATEBIT(11) - ), - - GENCLK(JZ4780_CLK_MSC2, "msc2", CLK_MASK_DIV | CLK_MASK_GATE, - PLIST("msc_mux"), - NO_MUX, - DIV(JZ_MSC2CDR, 0, 1, 8, 29, 28, 27), - GATEBIT(12) - ), - - GENCLK(JZ4780_CLK_UHC, "uhc", CLK_MASK_MUX | CLK_MASK_DIV | CLK_MASK_GATE, - PLIST("sclk_a", "mpll", "epll", "otg_phy"), - MUX(JZ_UHCCDR, 30, 2, 0xf), - DIV(JZ_UHCCDR, 0, 0, 8, 29, 28, 27), - GATEBIT(24) - ), - - GENCLK(JZ4780_CLK_SSIPLL, "ssi_pll", CLK_MASK_MUX | CLK_MASK_DIV, - PLIST("sclk_a", "mpll"), - MUX(JZ_SSICDR, 30, 1, 0xc), - DIV(JZ_SSICDR, 0, 0, 8, 29, 28, 27), - NO_GATE - ), - - GENCLK(JZ4780_CLK_SSI, "ssi", CLK_MASK_MUX, - PLIST("ext", "ssi_pll"), - MUX(JZ_SSICDR, 31, 1, 0xc), - NO_DIV, - NO_GATE - ), - - GENCLK(JZ4780_CLK_CIMMCLK, "cim_mclk", CLK_MASK_MUX | CLK_MASK_DIV, - PLIST("sclk_a", "mpll"), - MUX(JZ_CIMCDR, 31, 1, 0xc), - DIV(JZ_CIMCDR, 0, 0, 8, 30, 29, 28), - NO_GATE - ), - - GENCLK(JZ4780_CLK_PCMPLL, "pcm_pll", CLK_MASK_MUX | CLK_MASK_DIV, - PLIST("sclk_a", "mpll", "epll", "vpll"), - MUX(JZ_PCMCDR, 29, 2, 0xf), - DIV(JZ_PCMCDR, 0, 0, 8, 28, 27, 26), - NO_GATE - ), - - GENCLK(JZ4780_CLK_PCM, "pcm", CLK_MASK_MUX | CLK_MASK_GATE, - PLIST("ext", "pcm_pll"), - MUX(JZ_PCMCDR, 31, 1, 0xc), - NO_DIV, - GATEBIT(32 + 3) - ), - - GENCLK(JZ4780_CLK_GPU, "gpu", CLK_MASK_MUX | CLK_MASK_DIV | CLK_MASK_GATE, - PLIST("sclk_a", "mpll", "epll"), - MUX(JZ_GPUCDR, 30, 2, 0x7), - DIV(JZ_GPUCDR, 0, 0, 4, 29, 28, 27), - GATEBIT(32 + 4) - ), - - GENCLK(JZ4780_CLK_HDMI, "hdmi", CLK_MASK_MUX | CLK_MASK_DIV | CLK_MASK_GATE, - PLIST("sclk_a", "mpll", "vpll"), - MUX(JZ_HDMICDR, 30, 2, 0xe), - DIV(JZ_HDMICDR, 0, 0, 8, 29, 28, 26), - GATEBIT(32 + 9) - ), - - GENCLK(JZ4780_CLK_BCH, "bch", CLK_MASK_MUX | CLK_MASK_DIV | CLK_MASK_GATE, - PLIST("sclk_a", "mpll", "epll"), - MUX(JZ_BCHCDR, 30, 2, 0x7), - DIV(JZ_BCHCDR, 0, 0, 4, 29, 28, 27), - GATEBIT(1) - ), -}; - -static struct jz4780_clk_gate_def gate_clks[] = { - GATE(JZ4780_CLK_NEMC, "nemc", "ahb2", 0), - GATE(JZ4780_CLK_OTG0, "otg0", "ext", 2), - GATE(JZ4780_CLK_SSI0, "ssi0", "ssi", 4), - GATE(JZ4780_CLK_SMB0, "smb0", "pclk", 5), - GATE(JZ4780_CLK_SMB1, "smb1", "pclk", 6), - GATE(JZ4780_CLK_SCC, "scc", "ext", 7), - GATE(JZ4780_CLK_AIC, "aic", "ext", 8), - GATE(JZ4780_CLK_TSSI0, "tssi0", "ext", 9), - GATE(JZ4780_CLK_OWI, "owi", "ext", 10), - GATE(JZ4780_CLK_KBC, "kbc", "ext", 13), - GATE(JZ4780_CLK_SADC, "sadc", "ext", 14), - GATE(JZ4780_CLK_UART0, "uart0", "ext", 15), - GATE(JZ4780_CLK_UART1, "uart1", "ext", 16), - GATE(JZ4780_CLK_UART2, "uart2", "ext", 17), - GATE(JZ4780_CLK_UART3, "uart3", "ext", 18), - GATE(JZ4780_CLK_SSI1, "ssi1", "ssi", 19), - GATE(JZ4780_CLK_SSI2, "ssi2", "ssi", 20), - GATE(JZ4780_CLK_PDMA, "pdma", "ext", 21), - GATE(JZ4780_CLK_GPS, "gps", "ext", 22), - GATE(JZ4780_CLK_MAC, "mac", "ext", 23), - GATE(JZ4780_CLK_SMB2, "smb2", "pclk", 25), - GATE(JZ4780_CLK_CIM, "cim", "ext", 26), - GATE(JZ4780_CLK_LCD, "lcd", "ext", 28), - GATE(JZ4780_CLK_TVE, "tve", "lcd", 27), - GATE(JZ4780_CLK_IPU, "ipu", "ext", 29), - GATE(JZ4780_CLK_DDR0, "ddr0", "ddr", 30), - GATE(JZ4780_CLK_DDR1, "ddr1", "ddr", 31), - GATE(JZ4780_CLK_SMB3, "smb3", "pclk", 32 + 0), - GATE(JZ4780_CLK_TSSI1, "tssi1", "ext", 32 + 1), - GATE(JZ4780_CLK_COMPRESS, "compress", "ext", 32 + 5), - GATE(JZ4780_CLK_AIC1, "aic1", "ext", 32 + 6), - GATE(JZ4780_CLK_GPVLC, "gpvlc", "ext", 32 + 7), - GATE(JZ4780_CLK_OTG1, "otg1", "ext", 32 + 8), - GATE(JZ4780_CLK_UART4, "uart4", "ext", 32 + 10), - GATE(JZ4780_CLK_AHBMON, "ahb_mon", "ext", 32 + 11), - GATE(JZ4780_CLK_SMB4, "smb4", "pclk", 32 + 12), - GATE(JZ4780_CLK_DES, "des", "ext", 32 + 13), - GATE(JZ4780_CLK_X2D, "x2d", "ext", 32 + 14), - GATE(JZ4780_CLK_CORE1, "core1", "cpu", 32 + 15), -}; - -static int -jz4780_clock_register(struct jz4780_clock_softc *sc) -{ - int i, ret; - - /* Register PLLs */ - for (i = 0; i < nitems(pll_clks); i++) { - struct clknode_init_def clkdef; - - clkdef.id = pll_clks[i].clk_id; - clkdef.name = __DECONST(char *, pll_clks[i].clk_name); - clkdef.parent_names = pll_clks[i].clk_pname; - clkdef.parent_cnt = 1; - clkdef.flags = CLK_NODE_STATIC_STRINGS; - - ret = jz4780_clk_pll_register(sc->clkdom, &clkdef, &sc->mtx, - sc->res[0], pll_clks[i].clk_reg); - if (ret != 0) - return (ret); - } - - /* Register OTG clock */ - for (i = 0; i < nitems(otg_clks); i++) { - struct clknode_init_def clkdef; - - clkdef.id = otg_clks[i].clk_id; - clkdef.name = __DECONST(char *, otg_clks[i].clk_name); - clkdef.parent_names = otg_clks[i].clk_pname; - clkdef.parent_cnt = 1; - clkdef.flags = CLK_NODE_STATIC_STRINGS; - - ret = jz4780_clk_otg_register(sc->clkdom, &clkdef, &sc->mtx, - sc->res[0]); - if (ret != 0) - return (ret); - } - - /* Register muxes and divisors */ - for (i = 0; i < nitems(gen_clks); i++) { - ret = jz4780_clk_gen_register(sc->clkdom, &gen_clks[i], - &sc->mtx, sc->res[0]); - if (ret != 0) - return (ret); - } - - /* Register simple gates */ - for (i = 0; i < nitems(gate_clks); i++) { - struct clk_gate_def gatedef; - - gatedef.clkdef.id = gate_clks[i].clk_id; - gatedef.clkdef.name = __DECONST(char *, gate_clks[i].clk_name); - gatedef.clkdef.parent_names = gate_clks[i].clk_pname; - gatedef.clkdef.parent_cnt = 1; - gatedef.clkdef.flags = CLK_NODE_STATIC_STRINGS; - - if (gate_clks[i].clk_bit < 32) { - gatedef.offset = JZ_CLKGR0; - gatedef.shift = gate_clks[i].clk_bit; - } else { - gatedef.offset = JZ_CLKGR1; - gatedef.shift = gate_clks[i].clk_bit - 32; - } - gatedef.mask = 1; - gatedef.on_value = 0; - gatedef.off_value = 1; - gatedef.gate_flags = 0; - - ret = clknode_gate_register(sc->clkdom, &gatedef); - if (ret != 0) - return (ret); - } - - return (0); -} - -static int -jz4780_clock_fixup(struct jz4780_clock_softc *sc) -{ - struct clknode *clk_uhc; - int ret; - - /* - * Make UHC mux use MPLL as the source. It defaults to OTG_PHY - * and that somehow just does not work. - */ - clkdom_xlock(sc->clkdom); - - /* Assume the worst */ - ret = ENXIO; - - clk_uhc = clknode_find_by_id(sc->clkdom, JZ4780_CLK_UHC); - if (clk_uhc != NULL) { - ret = clknode_set_parent_by_name(clk_uhc, "mpll"); - if (ret != 0) - device_printf(sc->dev, - "unable to reparent uhc clock\n"); - else - ret = clknode_set_freq(clk_uhc, 48000000, 0, 0); - if (ret != 0) - device_printf(sc->dev, "unable to init uhc clock\n"); - } else - device_printf(sc->dev, "unable to lookup uhc clock\n"); - - clkdom_unlock(sc->clkdom); - return (ret); -} - -#define CGU_LOCK(sc) mtx_lock(&(sc)->mtx) -#define CGU_UNLOCK(sc) mtx_unlock(&(sc)->mtx) -#define CGU_LOCK_INIT(sc) \ - mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \ - "jz4780-cgu", MTX_DEF) -#define CGU_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx); - -#define CSR_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val)) -#define CSR_READ_4(sc, reg) bus_read_4((sc)->res[0], (reg)) - -static int -jz4780_clock_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-cgu")) - return (ENXIO); - - device_set_desc(dev, "Ingenic jz4780 CGU"); - - return (BUS_PROBE_DEFAULT); -} - -static int -jz4780_clock_attach(device_t dev) -{ - struct jz4780_clock_softc *sc; - - sc = device_get_softc(dev); - if (bus_alloc_resources(dev, jz4780_clock_spec, sc->res)) { - device_printf(dev, "could not allocate resources for device\n"); - return (ENXIO); - } - - sc->dev = dev; - CGU_LOCK_INIT(sc); - - sc->clkdom = clkdom_create(dev); - if (sc->clkdom == NULL) - goto fail; - if (jz4780_clock_register(sc) != 0) - goto fail; - if (clkdom_finit(sc->clkdom) != 0) - goto fail; - if (jz4780_clock_fixup(sc) != 0) - goto fail; - if (bootverbose) - clkdom_dump(sc->clkdom); - - return (0); -fail: - bus_release_resources(dev, jz4780_clock_spec, sc->res); - CGU_LOCK_DESTROY(sc); - - return (ENXIO); -} - -static int -jz4780_clock_detach(device_t dev) -{ - struct jz4780_clock_softc *sc; - - sc = device_get_softc(dev); - bus_release_resources(dev, jz4780_clock_spec, sc->res); - CGU_LOCK_DESTROY(sc); - - return (0); -} - -static int -jz4780_clock_write_4(device_t dev, bus_addr_t addr, uint32_t val) -{ - struct jz4780_clock_softc *sc; - - sc = device_get_softc(dev); - CSR_WRITE_4(sc, addr, val); - return (0); -} - -static int -jz4780_clock_read_4(device_t dev, bus_addr_t addr, uint32_t *val) -{ - struct jz4780_clock_softc *sc; - - sc = device_get_softc(dev); - *val = CSR_READ_4(sc, addr); - return (0); -} - -static int -jz4780_clock_modify_4(device_t dev, bus_addr_t addr, uint32_t clear_mask, - uint32_t set_mask) -{ - struct jz4780_clock_softc *sc; - uint32_t val; - - sc = device_get_softc(dev); - val = CSR_READ_4(sc, addr); - val &= ~clear_mask; - val |= set_mask; - CSR_WRITE_4(sc, addr, val); - return (0); -} - -static void -jz4780_clock_device_lock(device_t dev) -{ - struct jz4780_clock_softc *sc; - - sc = device_get_softc(dev); - CGU_LOCK(sc); -} - -static void -jz4780_clock_device_unlock(device_t dev) -{ - struct jz4780_clock_softc *sc; - - sc = device_get_softc(dev); - CGU_UNLOCK(sc); -} - -static device_method_t jz4780_clock_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, jz4780_clock_probe), - DEVMETHOD(device_attach, jz4780_clock_attach), - DEVMETHOD(device_detach, jz4780_clock_detach), - - /* Clock device interface */ - DEVMETHOD(clkdev_write_4, jz4780_clock_write_4), - DEVMETHOD(clkdev_read_4, jz4780_clock_read_4), - DEVMETHOD(clkdev_modify_4, jz4780_clock_modify_4), - DEVMETHOD(clkdev_device_lock, jz4780_clock_device_lock), - DEVMETHOD(clkdev_device_unlock, jz4780_clock_device_unlock), - - DEVMETHOD_END -}; - -static driver_t jz4780_clock_driver = { - "cgu", - jz4780_clock_methods, - sizeof(struct jz4780_clock_softc), -}; - -static devclass_t jz4780_clock_devclass; - -EARLY_DRIVER_MODULE(jz4780_clock, simplebus, jz4780_clock_driver, - jz4780_clock_devclass, 0, 0, BUS_PASS_CPU + BUS_PASS_ORDER_LATE); - -static int -jz4780_ehci_clk_config(struct jz4780_clock_softc *sc) -{ - clk_t phy_clk, ext_clk; - uint64_t phy_freq; - int err; - - phy_clk = NULL; - ext_clk = NULL; - err = -1; - - /* Set phy timing by copying it from ext */ - if (clk_get_by_id(sc->dev, sc->clkdom, JZ4780_CLK_OTGPHY, - &phy_clk) != 0) - goto done; - if (clk_get_parent(phy_clk, &ext_clk) != 0) - goto done; - if (clk_get_freq(ext_clk, &phy_freq) != 0) - goto done; - if (clk_set_freq(phy_clk, phy_freq, 0) != 0) - goto done; - err = 0; -done: - clk_release(ext_clk); - clk_release(phy_clk); - - return (err); -} - -int -jz4780_ohci_enable(void) -{ - device_t dev; - struct jz4780_clock_softc *sc; - uint32_t reg; - - dev = devclass_get_device(jz4780_clock_devclass, 0); - if (dev == NULL) - return (-1); - - sc = device_get_softc(dev); - CGU_LOCK(sc); - - /* Do not force port1 to suspend mode */ - reg = CSR_READ_4(sc, JZ_OPCR); - reg |= OPCR_SPENDN1; - CSR_WRITE_4(sc, JZ_OPCR, reg); - - CGU_UNLOCK(sc); - return (0); -} - -int -jz4780_ehci_enable(void) -{ - device_t dev; - struct jz4780_clock_softc *sc; - uint32_t reg; - - dev = devclass_get_device(jz4780_clock_devclass, 0); - if (dev == NULL) - return (-1); - - sc = device_get_softc(dev); - - /* - * EHCI should use MPPL as a parent, but Linux configures OTG - * clock anyway. Follow their lead blindly. - */ - if (jz4780_ehci_clk_config(sc) != 0) - return (-1); - - CGU_LOCK(sc); - - /* Enable OTG, should not be necessary since we use PLL clock */ - reg = CSR_READ_4(sc, JZ_USBPCR); - reg &= ~(PCR_OTG_DISABLE); - CSR_WRITE_4(sc, JZ_USBPCR, reg); - - /* Do not force port1 to suspend mode */ - reg = CSR_READ_4(sc, JZ_OPCR); - reg |= OPCR_SPENDN1; - CSR_WRITE_4(sc, JZ_OPCR, reg); - - /* D- pulldown */ - reg = CSR_READ_4(sc, JZ_USBPCR1); - reg |= PCR_DMPD1; - CSR_WRITE_4(sc, JZ_USBPCR1, reg); - - /* D+ pulldown */ - reg = CSR_READ_4(sc, JZ_USBPCR1); - reg |= PCR_DPPD1; - CSR_WRITE_4(sc, JZ_USBPCR1, reg); - - /* 16 bit bus witdth for port 1*/ - reg = CSR_READ_4(sc, JZ_USBPCR1); - reg |= PCR_WORD_I_F1 | PCR_WORD_I_F0; - CSR_WRITE_4(sc, JZ_USBPCR1, reg); - - /* Reset USB */ - reg = CSR_READ_4(sc, JZ_USBPCR); - reg |= PCR_POR; - CSR_WRITE_4(sc, JZ_USBPCR, reg); - DELAY(1); - reg = CSR_READ_4(sc, JZ_USBPCR); - reg &= ~(PCR_POR); - CSR_WRITE_4(sc, JZ_USBPCR, reg); - - /* Soft-reset USB */ - reg = CSR_READ_4(sc, JZ_SRBC); - reg |= SRBC_UHC_SR; - CSR_WRITE_4(sc, JZ_SRBC, reg); - /* 300ms */ - DELAY(300*hz/1000); - - reg = CSR_READ_4(sc, JZ_SRBC); - reg &= ~(SRBC_UHC_SR); - CSR_WRITE_4(sc, JZ_SRBC, reg); - - /* 300ms */ - DELAY(300*hz/1000); - - CGU_UNLOCK(sc); - return (0); -} - -#define USBRESET_DETECT_TIME 0x96 - -int -jz4780_otg_enable(void) -{ - device_t dev; - struct jz4780_clock_softc *sc; - uint32_t reg; - - dev = devclass_get_device(jz4780_clock_devclass, 0); - if (dev == NULL) - return (-1); - - sc = device_get_softc(dev); - - CGU_LOCK(sc); - - /* Select Synopsys OTG mode */ - reg = CSR_READ_4(sc, JZ_USBPCR1); - reg |= PCR_SYNOPSYS; - - /* Set UTMI bus width to 16 bit */ - reg |= PCR_WORD_I_F0 | PCR_WORD_I_F1; - CSR_WRITE_4(sc, JZ_USBPCR1, reg); - - /* Blah */ - reg = CSR_READ_4(sc, JZ_USBVBFIL); - reg = REG_SET(reg, USBVBFIL_IDDIGFIL, 0); - reg = REG_SET(reg, USBVBFIL_USBVBFIL, 0); - CSR_WRITE_4(sc, JZ_USBVBFIL, reg); - - /* Setup reset detect time */ - reg = CSR_READ_4(sc, JZ_USBRDT); - reg = REG_SET(reg, USBRDT_USBRDT, USBRESET_DETECT_TIME); - reg |= USBRDT_VBFIL_LD_EN; - CSR_WRITE_4(sc, JZ_USBRDT, reg); - - /* Setup USBPCR bits */ - reg = CSR_READ_4(sc, JZ_USBPCR); - reg |= PCR_USB_MODE; - reg |= PCR_COMMONONN; - reg |= PCR_VBUSVLDEXT; - reg |= PCR_VBUSVLDEXTSEL; - reg &= ~(PCR_OTG_DISABLE); - CSR_WRITE_4(sc, JZ_USBPCR, reg); - - /* Reset USB */ - reg = CSR_READ_4(sc, JZ_USBPCR); - reg |= PCR_POR; - CSR_WRITE_4(sc, JZ_USBPCR, reg); - DELAY(1000); - reg = CSR_READ_4(sc, JZ_USBPCR); - reg &= ~(PCR_POR); - CSR_WRITE_4(sc, JZ_USBPCR, reg); - - /* Unsuspend OTG port */ - reg = CSR_READ_4(sc, JZ_OPCR); - reg |= OPCR_SPENDN0; - CSR_WRITE_4(sc, JZ_OPCR, reg); - - CGU_UNLOCK(sc); - return (0); -} diff --git a/sys/mips/ingenic/jz4780_clock.h b/sys/mips/ingenic/jz4780_clock.h deleted file mode 100644 index 29c92a55336..00000000000 --- a/sys/mips/ingenic/jz4780_clock.h +++ /dev/null @@ -1,34 +0,0 @@ -/*- - * Copyright 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef JZ4780_CLOCK_H -#define JZ4780_CLOCK_H - -extern int jz4780_ehci_enable(void); -extern int jz4780_ohci_enable(void); -extern int jz4780_otg_enable(void); - -#endif diff --git a/sys/mips/ingenic/jz4780_codec.c b/sys/mips/ingenic/jz4780_codec.c deleted file mode 100644 index e073515c56a..00000000000 --- a/sys/mips/ingenic/jz4780_codec.c +++ /dev/null @@ -1,308 +0,0 @@ -/*- - * Copyright (c) 2016 Ruslan Bukin - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* Ingenic JZ4780 CODEC. */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include - -#include - -#include -#include - -#define CI20_HP_PIN 13 -#define CI20_HP_PORT 3 - -struct codec_softc { - device_t dev; - struct resource *res[1]; - bus_space_tag_t bst; - bus_space_handle_t bsh; - clk_t clk; -}; - -static struct resource_spec codec_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { -1, 0 } -}; - -static int codec_probe(device_t dev); -static int codec_attach(device_t dev); -static int codec_detach(device_t dev); -void codec_print_registers(struct codec_softc *sc); - -static int -codec_write(struct codec_softc *sc, uint32_t reg, uint32_t val) -{ - uint32_t tmp; - - clk_enable(sc->clk); - - tmp = (reg << RGADW_RGADDR_S); - tmp |= (val << RGADW_RGDIN_S); - tmp |= RGADW_RGWR; - - WRITE4(sc, CODEC_RGADW, tmp); - - while(READ4(sc, CODEC_RGADW) & RGADW_RGWR) - ; - - clk_disable(sc->clk); - - return (0); -} - -static int -codec_read(struct codec_softc *sc, uint32_t reg) -{ - uint32_t tmp; - - clk_enable(sc->clk); - - tmp = (reg << RGADW_RGADDR_S); - WRITE4(sc, CODEC_RGADW, tmp); - - tmp = READ4(sc, CODEC_RGDATA); - - clk_disable(sc->clk); - - return (tmp); -} - -void -codec_print_registers(struct codec_softc *sc) -{ - - printf("codec SR %x\n", codec_read(sc, SR)); - printf("codec SR2 %x\n", codec_read(sc, SR2)); - printf("codec MR %x\n", codec_read(sc, MR)); - printf("codec AICR_DAC %x\n", codec_read(sc, AICR_DAC)); - printf("codec AICR_ADC %x\n", codec_read(sc, AICR_ADC)); - printf("codec CR_LO %x\n", codec_read(sc, CR_LO)); - printf("codec CR_HP %x\n", codec_read(sc, CR_HP)); - printf("codec CR_DMIC %x\n", codec_read(sc, CR_DMIC)); - printf("codec CR_MIC1 %x\n", codec_read(sc, CR_MIC1)); - printf("codec CR_MIC2 %x\n", codec_read(sc, CR_MIC2)); - printf("codec CR_LI1 %x\n", codec_read(sc, CR_LI1)); - printf("codec CR_LI2 %x\n", codec_read(sc, CR_LI2)); - printf("codec CR_DAC %x\n", codec_read(sc, CR_DAC)); - printf("codec CR_ADC %x\n", codec_read(sc, CR_ADC)); - printf("codec CR_MIX %x\n", codec_read(sc, CR_MIX)); - printf("codec DR_MIX %x\n", codec_read(sc, DR_MIX)); - printf("codec CR_VIC %x\n", codec_read(sc, CR_VIC)); - printf("codec CR_CK %x\n", codec_read(sc, CR_CK)); - printf("codec FCR_DAC %x\n", codec_read(sc, FCR_DAC)); - printf("codec FCR_ADC %x\n", codec_read(sc, FCR_ADC)); - printf("codec CR_TIMER_MSB %x\n", codec_read(sc, CR_TIMER_MSB)); - printf("codec CR_TIMER_LSB %x\n", codec_read(sc, CR_TIMER_LSB)); - printf("codec ICR %x\n", codec_read(sc, ICR)); - printf("codec IMR %x\n", codec_read(sc, IMR)); - printf("codec IFR %x\n", codec_read(sc, IFR)); - printf("codec IMR2 %x\n", codec_read(sc, IMR2)); - printf("codec IFR2 %x\n", codec_read(sc, IFR2)); - printf("codec GCR_HPL %x\n", codec_read(sc, GCR_HPL)); - printf("codec GCR_HPR %x\n", codec_read(sc, GCR_HPR)); - printf("codec GCR_LIBYL %x\n", codec_read(sc, GCR_LIBYL)); - printf("codec GCR_LIBYR %x\n", codec_read(sc, GCR_LIBYR)); - printf("codec GCR_DACL %x\n", codec_read(sc, GCR_DACL)); - printf("codec GCR_DACR %x\n", codec_read(sc, GCR_DACR)); - printf("codec GCR_MIC1 %x\n", codec_read(sc, GCR_MIC1)); - printf("codec GCR_MIC2 %x\n", codec_read(sc, GCR_MIC2)); - printf("codec GCR_ADCL %x\n", codec_read(sc, GCR_ADCL)); - printf("codec GCR_ADCR %x\n", codec_read(sc, GCR_ADCR)); - printf("codec GCR_MIXDACL %x\n", codec_read(sc, GCR_MIXDACL)); - printf("codec GCR_MIXDACR %x\n", codec_read(sc, GCR_MIXDACR)); - printf("codec GCR_MIXADCL %x\n", codec_read(sc, GCR_MIXADCL)); - printf("codec GCR_MIXADCR %x\n", codec_read(sc, GCR_MIXADCR)); - printf("codec CR_ADC_AGC %x\n", codec_read(sc, CR_ADC_AGC)); - printf("codec DR_ADC_AGC %x\n", codec_read(sc, DR_ADC_AGC)); -} - -/* - * CI20 board-specific - */ -static int -ci20_hp_unmute(struct codec_softc *sc) -{ - device_t dev; - int port; - int err; - int pin; - - pin = CI20_HP_PIN; - port = CI20_HP_PORT; - - dev = devclass_get_device(devclass_find("gpio"), port); - if (dev == NULL) - return (0); - - err = GPIO_PIN_SETFLAGS(dev, pin, GPIO_PIN_OUTPUT); - if (err != 0) { - device_printf(dev, "Cannot configure GPIO pin %d on %s\n", - pin, device_get_nameunit(dev)); - return (err); - } - - err = GPIO_PIN_SET(dev, pin, 0); - if (err != 0) { - device_printf(dev, "Cannot configure GPIO pin %d on %s\n", - pin, device_get_nameunit(dev)); - return (err); - } - - return (0); -} - -static int -codec_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-codec")) - return (ENXIO); - - device_set_desc(dev, "Ingenic JZ4780 CODEC"); - - return (BUS_PROBE_DEFAULT); -} - -static int -codec_attach(device_t dev) -{ - struct codec_softc *sc; - uint8_t reg; - - sc = device_get_softc(dev); - sc->dev = dev; - - if (bus_alloc_resources(dev, codec_spec, sc->res)) { - device_printf(dev, "could not allocate resources for device\n"); - return (ENXIO); - } - - /* Memory interface */ - sc->bst = rman_get_bustag(sc->res[0]); - sc->bsh = rman_get_bushandle(sc->res[0]); - - if (clk_get_by_ofw_name(dev, 0, "i2s", &sc->clk) != 0) { - device_printf(dev, "could not get i2s clock\n"); - bus_release_resources(dev, codec_spec, sc->res); - return (ENXIO); - } - - /* Initialize codec. */ - reg = codec_read(sc, CR_VIC); - reg &= ~(VIC_SB_SLEEP | VIC_SB); - codec_write(sc, CR_VIC, reg); - - DELAY(20000); - - reg = codec_read(sc, CR_DAC); - reg &= ~(DAC_SB | DAC_MUTE); - codec_write(sc, CR_DAC, reg); - - DELAY(10000); - - /* I2S, 16-bit, 48 kHz. */ - reg = codec_read(sc, AICR_DAC); - reg &= ~(AICR_DAC_SB | DAC_ADWL_M); - reg |= DAC_ADWL_16; - reg &= ~(AUDIOIF_M); - reg |= AUDIOIF_I2S; - codec_write(sc, AICR_DAC, reg); - - DELAY(10000); - - reg = FCR_DAC_48; - codec_write(sc, FCR_DAC, reg); - - DELAY(10000); - - /* Unmute headphones. */ - reg = codec_read(sc, CR_HP); - reg &= ~(HP_SB | HP_MUTE); - codec_write(sc, CR_HP, reg); - - ci20_hp_unmute(sc); - - return (0); -} - -static int -codec_detach(device_t dev) -{ - struct codec_softc *sc; - - sc = device_get_softc(dev); - - bus_release_resources(dev, codec_spec, sc->res); - - return (0); -} - -static device_method_t codec_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, codec_probe), - DEVMETHOD(device_attach, codec_attach), - DEVMETHOD(device_detach, codec_detach), - - DEVMETHOD_END -}; - -static driver_t codec_driver = { - "codec", - codec_methods, - sizeof(struct codec_softc), -}; - -static devclass_t codec_devclass; - -DRIVER_MODULE(codec, simplebus, codec_driver, codec_devclass, 0, 0); diff --git a/sys/mips/ingenic/jz4780_codec.h b/sys/mips/ingenic/jz4780_codec.h deleted file mode 100644 index cd1530641de..00000000000 --- a/sys/mips/ingenic/jz4780_codec.h +++ /dev/null @@ -1,100 +0,0 @@ -/*- - * Copyright (c) 2016 Ruslan Bukin - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#define CODEC_RGADW 0x00 /* Address, data in and write command */ -#define RGADW_ICRST (1 << 31) /* Reset internal CODEC */ -#define RGADW_RGWR (1 << 16) /* Issue a write command to CODEC */ -#define RGADW_RGADDR_S 8 /* CODEC register's address. */ -#define RGADW_RGADDR_M (0x7f << RGADW_RGADDR_S) -#define RGADW_RGDIN_S 0 /* CODEC register data to write */ -#define RGADW_RGDIN_M (0xff << RGADW_RGDIN_S) -#define CODEC_RGDATA 0x04 /* The data read out */ - -#define SR 0x00 /* Status Register */ -#define SR2 0x01 /* Status Register 2 */ -#define MR 0x07 /* Mode status register */ -#define AICR_DAC 0x08 /* DAC Audio Interface Control Register */ -#define DAC_ADWL_S 6 /* Audio Data Word Length for DAC path. */ -#define DAC_ADWL_M (0x3 << DAC_ADWL_S) -#define DAC_ADWL_16 (0 << DAC_ADWL_S) -#define AICR_DAC_SB (1 << 4) /* DAC audio interface in power-down mode */ -#define AUDIOIF_S 0 -#define AUDIOIF_M (0x3 << AUDIOIF_S) -#define AUDIOIF_I2S 0x3 /* I2S interface */ -#define AUDIOIF_DSP 0x2 /* DSP interface */ -#define AUDIOIF_LJ 0x1 /* Left-justified interface */ -#define AUDIOIF_P 0x0 /* Parallel interface */ -#define AICR_ADC 0x09 /* ADC Audio Interface Control Register */ -#define CR_LO 0x0B /* Differential line-out Control Register */ -#define CR_HP 0x0D /* HeadPhone Control Register */ -#define HP_MUTE (1 << 7) /* no signal on headphone outputs */ -#define HP_SB (1 << 4) /* power-down */ -#define CR_DMIC 0x10 /* Digital Microphone register */ -#define CR_MIC1 0x11 /* Microphone1 Control register */ -#define CR_MIC2 0x12 /* Microphone2 Control register */ -#define CR_LI1 0x13 /* Control Register for line1 inputs */ -#define CR_LI2 0x14 /* Control Register for line2 inputs */ -#define CR_DAC 0x17 /* DAC Control Register */ -#define DAC_MUTE (1 << 7) /* puts the DAC in soft mute mode */ -#define DAC_SB (1 << 4) /* power-down */ -#define CR_ADC 0x18 /* ADC Control Register */ -#define CR_MIX 0x19 /* Digital Mixer Control Register */ -#define DR_MIX 0x1A /* Digital Mixer Data Register */ -#define CR_VIC 0x1B /* Control Register for the ViC */ -#define VIC_SB_SLEEP (1 << 1) /* sleep mode */ -#define VIC_SB (1 << 0) /* complete power-down */ -#define CR_CK 0x1C /* Clock Control Register */ -#define FCR_DAC 0x1D /* DAC Frequency Control Register */ -#define FCR_DAC_48 8 /* 48 kHz. */ -#define FCR_DAC_96 10 /* 96 kHz. */ -#define FCR_ADC 0x20 /* ADC Frequency Control Register */ -#define CR_TIMER_MSB 0x21 /* MSB of programmable counter */ -#define CR_TIMER_LSB 0x22 /* LSB of programmable counter */ -#define ICR 0x23 /* Interrupt Control Register */ -#define IMR 0x24 /* Interrupt Mask Register */ -#define IFR 0x25 /* Interrupt Flag Register */ -#define IMR2 0x26 /* Interrupt Mask Register 2 */ -#define IFR2 0x27 /* Interrupt Flag Register 2 */ -#define GCR_HPL 0x28 /* Left channel headphone Control Gain Register */ -#define GCR_HPR 0x29 /* Right channel headphone Control Gain Register */ -#define GCR_LIBYL 0x2A /* Left channel bypass line Control Gain Register */ -#define GCR_LIBYR 0x2B /* Right channel bypass line Control Gain Register */ -#define GCR_DACL 0x2C /* Left channel DAC Gain Control Register */ -#define GCR_DACR 0x2D /* Right channel DAC Gain Control Register */ -#define GCR_MIC1 0x2E /* Microphone 1 Gain Control Register */ -#define GCR_MIC2 0x2F /* Microphone 2 Gain Control Register */ -#define GCR_ADCL 0x30 /* Left ADC Gain Control Register */ -#define GCR_ADCR 0x31 /* Right ADC Gain Control Register */ -#define GCR_MIXDACL 0x34 /* DAC Digital Mixer Control Register */ -#define GCR_MIXDACR 0x35 /* DAC Digital Mixer Control Register */ -#define GCR_MIXADCL 0x36 /* ADC Digital Mixer Control Register */ -#define GCR_MIXADCR 0x37 /* ADC Digital Mixer Control Register */ -#define CR_ADC_AGC 0x3A /* Automatic Gain Control Register */ -#define DR_ADC_AGC 0x3B /* Automatic Gain Control Data Register */ diff --git a/sys/mips/ingenic/jz4780_common.h b/sys/mips/ingenic/jz4780_common.h deleted file mode 100644 index e3c6fd47fba..00000000000 --- a/sys/mips/ingenic/jz4780_common.h +++ /dev/null @@ -1,34 +0,0 @@ -/*- - * Copyright (c) 2016 Ruslan Bukin - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#define READ4(_sc, _reg) \ - bus_space_read_4(_sc->bst, _sc->bsh, _reg) -#define WRITE4(_sc, _reg, _val) \ - bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val) diff --git a/sys/mips/ingenic/jz4780_cpuregs.h b/sys/mips/ingenic/jz4780_cpuregs.h deleted file mode 100644 index d0fc450a8cb..00000000000 --- a/sys/mips/ingenic/jz4780_cpuregs.h +++ /dev/null @@ -1,71 +0,0 @@ -/*- - * Copyright (c) 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef JZ4780_CPUREGS_H -#define JZ4780_CPUREGS_H - -/* Core control register */ -#define JZ_CORECTL_SLP1M_SHIFT 17 -#define JZ_CORECTL_SLP1M (1u << JZ_CORECTL_SLP1M_SHIFT) -#define JZ_CORECTL_SLP0M_SHIFT 16 -#define JZ_CORECTL_SLP0M (1u << JZ_CORECTL_SLP0M_SHIFT) -#define JZ_CORECTL_RPC1_SHIFT 9 -#define JZ_CORECTL_RPC1 (1u << JZ_CORECTL_RPC1_SHIFT) -#define JZ_CORECTL_RPC0_SHIFT 8 -#define JZ_CORECTL_RPC0 (1u << JZ_CORECTL_RPC0_SHIFT) -#define JZ_CORECTL_SWRST1_SHIFT 1 -#define JZ_CORECTL_SWRST1 (1u << JZ_CORECTL_SWRST1_SHIFT) -#define JZ_CORECTL_SWRST0_SHIFT 0 -#define JZ_CORECTL_SWRST0 (1u << JZ_CORECTL_SWRST0_SHIFT) - -/* Core status register */ -#define JZ_CORESTS_SLP1_SHIFT 17 -#define JZ_CORESTS_SLP1 (1u << JZ_CORESTS_SLP1_SHIFT) -#define JZ_CORESTS_SLP0_SHIFT 16 -#define JZ_CORESTS_SLP0 (1u << JZ_CORESTS_SLP0_SHIFT) -#define JZ_CORESTS_IRQ1P_SHIFT 9 -#define JZ_CORESTS_IRQ1P (1u << JZ_CORESTS_IRQ1P_SHIFT) -#define JZ_CORESTS_IRQ0P_SHIFT 8 -#define JZ_CORESTS_IRQ0P (1u << JZ_CORESTS_IRQ0P_SHIFT) -#define JZ_CORESTS_MIRQ1P_SHIFT 1 -#define JZ_CORESTS_MIRQ1P (1u << JZ_CORESTS_MIRQ1P_SHIFT) -#define JZ_CORESTS_MIRQ0P_SHIFT 0 -#define JZ_CORESTS_MIRQ0P (1u << JZ_CORESTS_MIRQ0P_SHIFT) - -/* Reset entry and IRQ mask */ -#define JZ_REIM_ENTRY_SHIFT 16 -#define JZ_REIM_ENTRY_WIDTH 16 -#define JZ_REIM_ENTRY_MASK (0xFFFFu << JZ_REIM_ENTRY_SHIFT) -#define JZ_REIM_IRQ1M_SHIFT 9 -#define JZ_REIM_IRQ1M (1u << JZ_REIM_IRQ1M_SHIFT) -#define JZ_REIM_IRQ0M_SHIFT 8 -#define JZ_REIM_IRQ0M (1u << JZ_REIM_IRQ0M_SHIFT) -#define JZ_REIM_MIRQ1M_SHIFT 1 -#define JZ_REIM_MIRQ1M (1u << JZ_REIM_MIRQ1M_SHIFT) -#define JZ_REIM_MIRQ0M_SHIFT 0 -#define JZ_REIM_MIRQ0M (1u << JZ_REIM_MIRQ0M_SHIFT) - -#endif /* JZ4780_CPUREGS_H */ diff --git a/sys/mips/ingenic/jz4780_dme.c b/sys/mips/ingenic/jz4780_dme.c deleted file mode 100644 index c53f6362024..00000000000 --- a/sys/mips/ingenic/jz4780_dme.c +++ /dev/null @@ -1,122 +0,0 @@ -/*- - * Copyright 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Ingenic JZ4780 NAND and External Memory Controller (NEMC) driver. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -struct jz4780_dme_softc { - device_t dev; - struct resource *res[2]; -}; - -static struct resource_spec jz4780_dme_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { SYS_RES_MEMORY, 1, RF_ACTIVE }, - { -1, 0 } -}; - -static int jz4780_dme_probe(device_t dev); -static int jz4780_dme_attach(device_t dev); -static int jz4780_dme_detach(device_t dev); - -static int -jz4780_dme_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "davicom,dm9000")) - return (ENXIO); - - device_set_desc(dev, "Davicom DM9000C 10/100BaseTX"); - - return (BUS_PROBE_DEFAULT); -} - -static int -jz4780_dme_attach(device_t dev) -{ - struct jz4780_dme_softc *sc = device_get_softc(dev); - - sc->dev = dev; - - if (bus_alloc_resources(dev, jz4780_dme_spec, sc->res)) { - device_printf(dev, "could not allocate resources for device\n"); - return (ENXIO); - } - - return (0); -} - -static int -jz4780_dme_detach(device_t dev) -{ - struct jz4780_dme_softc *sc = device_get_softc(dev); - - bus_release_resources(dev, jz4780_dme_spec, sc->res); - return (0); -} - -static device_method_t jz4780_dme_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, jz4780_dme_probe), - DEVMETHOD(device_attach, jz4780_dme_attach), - DEVMETHOD(device_detach, jz4780_dme_detach), - - DEVMETHOD_END -}; - -static driver_t jz4780_dme_driver = { - "dme", - jz4780_dme_methods, - sizeof(struct jz4780_dme_softc), -}; - -static devclass_t jz4780_dme_devclass; - -DRIVER_MODULE(jz4780_dme, simplebus, jz4780_dme_driver, - jz4780_dme_devclass, 0, 0); diff --git a/sys/mips/ingenic/jz4780_dwc_fdt.c b/sys/mips/ingenic/jz4780_dwc_fdt.c deleted file mode 100644 index 6f14557172c..00000000000 --- a/sys/mips/ingenic/jz4780_dwc_fdt.c +++ /dev/null @@ -1,200 +0,0 @@ -/* - * Copyright 2015 Alexander Kabaev . - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include -#include - -#include -#include - -#include -#include - -#include -#include - -#include -#include - -static device_probe_t jz4780_dwc_otg_probe; -static device_attach_t jz4780_dwc_otg_attach; -static device_detach_t jz4780_dwc_otg_detach; - -struct jz4780_dwc_otg_softc { - struct dwc_otg_fdt_softc base; /* storage for DWC OTG code */ - clk_t phy_clk; - clk_t otg_clk; -}; - -static int -jz4780_dwc_otg_clk_enable(device_t dev) -{ - struct jz4780_dwc_otg_softc *sc; - int err; - - sc = device_get_softc(dev); - - /* Configure and enable phy clock */ - err = clk_get_by_ofw_name(dev, 0, "otg_phy", &sc->phy_clk); - if (err != 0) { - device_printf(dev, "unable to lookup %s clock\n", "otg_phy"); - return (err); - } - err = clk_set_freq(sc->phy_clk, 48000000, 0); - if (err != 0) { - device_printf(dev, "unable to set %s clock to 48 kHZ\n", - "otg_phy"); - return (err); - } - err = clk_enable(sc->phy_clk); - if (err != 0) { - device_printf(dev, "unable to enable %s clock\n", "otg_phy"); - return (err); - } - - /* Configure and enable otg1 clock */ - err = clk_get_by_ofw_name(dev, 0, "otg1", &sc->otg_clk); - if (err != 0) { - device_printf(dev, "unable to lookup %s clock\n", "otg1"); - return (err); - } - err = clk_enable(sc->phy_clk); - if (err != 0) { - device_printf(dev, "unable to enable %s clock\n", "otg1"); - return (err); - } - - return (0); -} - -static int -jz4780_dwc_otg_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-otg")) - return (ENXIO); - - device_set_desc(dev, "DWC OTG 2.0 integrated USB controller (jz4780)"); - - return (BUS_PROBE_VENDOR); -} - -static int -jz4780_dwc_otg_attach(device_t dev) -{ - struct jz4780_dwc_otg_softc *sc; - struct resource *res; - int err, rid; - - sc = device_get_softc(dev); - - err = jz4780_dwc_otg_clk_enable(dev); - if (err != 0) - goto fail; - - err = jz4780_otg_enable(); - if (err != 0) { - device_printf(dev, "CGU failed to enable OTG\n"); - goto fail; - } - - /* Voodoo: Switch off VBUS overcurrent detection in OTG PHY */ - res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); - if (res != NULL) { - uint32_t reg; - - reg = bus_read_4(res, JZ_DWC2_GUSBCFG); - reg |= 0xc; - bus_write_4(res, JZ_DWC2_GUSBCFG, reg); - bus_release_resource(dev, SYS_RES_MEMORY, rid, res); - } - - sc->base.sc_otg.sc_phy_type = DWC_OTG_PHY_UTMI; - sc->base.sc_otg.sc_phy_bits = 16; - - err = dwc_otg_attach(dev); - if (err != 0) - goto fail; - - return (0); -fail: - if (sc->otg_clk) - clk_release(sc->otg_clk); - if (sc->phy_clk) - clk_release(sc->phy_clk); - return (err); -} - -static int -jz4780_dwc_otg_detach(device_t dev) -{ - struct jz4780_dwc_otg_softc *sc; - int err; - - err = dwc_otg_detach(dev); - if (err != 0) - return (err); - - sc = device_get_softc(dev); - if (sc->otg_clk) - clk_release(sc->otg_clk); - if (sc->phy_clk) - clk_release(sc->phy_clk); - return (0); -} - -static device_method_t jz4780_dwc_otg_methods[] = { - /* bus interface */ - DEVMETHOD(device_probe, jz4780_dwc_otg_probe), - DEVMETHOD(device_attach, jz4780_dwc_otg_attach), - DEVMETHOD(device_detach, jz4780_dwc_otg_detach), - - DEVMETHOD_END -}; - -static devclass_t jz4780_dwc_otg_devclass; - -DEFINE_CLASS_1(jzotg, jz4780_dwc_otg_driver, jz4780_dwc_otg_methods, - sizeof(struct jz4780_dwc_otg_softc), dwc_otg_driver); -DRIVER_MODULE(jzotg, simplebus, jz4780_dwc_otg_driver, - jz4780_dwc_otg_devclass, 0, 0); -MODULE_DEPEND(jzotg, usb, 1, 1, 1); diff --git a/sys/mips/ingenic/jz4780_efuse.c b/sys/mips/ingenic/jz4780_efuse.c deleted file mode 100644 index bf03c795c17..00000000000 --- a/sys/mips/ingenic/jz4780_efuse.c +++ /dev/null @@ -1,211 +0,0 @@ -/*- - * Copyright (c) 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include - -static struct ofw_compat_data compat_data[] = { - {"ingenic,jz4780-efuse", 1}, - {NULL, 0} -}; - -struct jz4780_efuse_data { - uint32_t serial_num; - uint32_t date; - uint8_t nanufacturer[2]; - uint8_t macaddr[6]; -} __packed; - -static struct resource_spec jz4780_efuse_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { -1, 0 } -}; - -struct jz4780_efuse_softc { - device_t dev; - struct resource *res[1]; - struct jz4780_efuse_data data; -}; - -#define CSR_WRITE_4(sc, reg, val) \ - bus_write_4((sc)->res[0], (reg), (val)) -#define CSR_READ_4(sc, reg) \ - bus_read_4((sc)->res[0], (reg)) - -#define JZ_EFUSE_BANK_SIZE (4096 / 8) /* Bank size is 4096 bits */ - -static int -jz4780_efuse_probe(device_t dev) -{ - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) - return (ENXIO); - - return (BUS_PROBE_DEFAULT); -} - -static void -jz4780_efuse_read_chunk(struct jz4780_efuse_softc *sc, int addr, uint8_t *buf, int len) -{ - uint32_t abuf; - int i, count; - - /* Setup to read proper bank */ - CSR_WRITE_4(sc, JZ_EFUCTRL, JZ_EFUSE_READ | - (addr < JZ_EFUSE_BANK_SIZE ? 0: JZ_EFUSE_BANK) | - (addr << JZ_EFUSE_ADDR_SHIFT) | - ((len - 1) << JZ_EFUSE_SIZE_SHIFT)); - /* Wait for read to complete */ - while ((CSR_READ_4(sc, JZ_EFUSTATE) & JZ_EFUSE_RD_DONE) == 0) - DELAY(1000); - - /* Round to 4 bytes for the simple loop below */ - count = len & ~3; - - for (i = 0; i < count; i += 4) { - abuf = CSR_READ_4(sc, JZ_EFUDATA0 + i); - memcpy(buf, &abuf, 4); - buf += 4; - } - - /* Read partial word and assign it byte-by-byte */ - if (i < len) { - abuf = CSR_READ_4(sc, JZ_EFUDATA0 + i); - for (/* none */; i < len; i++) { - buf[i] = abuf & 0xff; - abuf >>= 8; - } - } -} - -static void -jz4780_efuse_read(struct jz4780_efuse_softc *sc, int addr, void *buf, int len) -{ - int chunk; - - while (len > 0) { - chunk = (len > 32) ? 32 : len; - jz4780_efuse_read_chunk(sc, addr, buf, chunk); - len -= chunk; - buf = (void *)((uintptr_t)buf + chunk); - addr += chunk; - } -} - -static void -jz4780_efuse_update_kenv(struct jz4780_efuse_softc *sc) -{ - char macstr[sizeof("xx:xx:xx:xx:xx:xx")]; - - /* - * Update hint in kernel env only if none is available yet. - * It is quite possible one was set by command line already. - */ - if (kern_getenv("hint.dme.0.macaddr") == NULL) { - snprintf(macstr, sizeof(macstr), "%6D", - sc->data.macaddr, ":"); - kern_setenv("hint.dme.0.macaddr", macstr); - } -} - -static int -jz4780_efuse_attach(device_t dev) -{ - struct jz4780_efuse_softc *sc; - - sc = device_get_softc(dev); - sc->dev = dev; - - if (bus_alloc_resources(dev, jz4780_efuse_spec, sc->res)) { - device_printf(dev, "could not allocate resources for device\n"); - return (ENXIO); - } - - /* - * Default RD_STROBE to 4 h2clk cycles, should already be set to 4 by reset - * but configure it anyway. - */ - CSR_WRITE_4(sc, JZ_EFUCFG, 0x00040000); - - /* Read user-id segment */ - jz4780_efuse_read(sc, 0x18, &sc->data, sizeof(sc->data)); - - /* - * Set resource hints for the dme device to discover its - * MAC address, if not set already. - */ - jz4780_efuse_update_kenv(sc); - - /* Resource conflicts with NEMC, release early */ - bus_release_resources(dev, jz4780_efuse_spec, sc->res); - return (0); -} - -static int -jz4780_efuse_detach(device_t dev) -{ - - return (0); -} - -static device_method_t jz4780_efuse_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, jz4780_efuse_probe), - DEVMETHOD(device_attach, jz4780_efuse_attach), - DEVMETHOD(device_detach, jz4780_efuse_detach), - - DEVMETHOD_END -}; - -static driver_t jz4780_efuse_driver = { - "efuse", - jz4780_efuse_methods, - sizeof(struct jz4780_efuse_softc), -}; - -static devclass_t jz4780_efuse_devclass; -EARLY_DRIVER_MODULE(jz4780_efuse, simplebus, jz4780_efuse_driver, - jz4780_efuse_devclass, 0, 0, BUS_PASS_TIMER); diff --git a/sys/mips/ingenic/jz4780_ehci.c b/sys/mips/ingenic/jz4780_ehci.c deleted file mode 100644 index 5ae9d5f025d..00000000000 --- a/sys/mips/ingenic/jz4780_ehci.c +++ /dev/null @@ -1,343 +0,0 @@ -/*- - * Copyright (c) 2015 Oleksandr Tymoshenko . - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * JZ4780 attachment driver for the USB Enhanced Host Controller. - */ - -#include -#include "opt_bus.h" - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include - -#define EHCI_HC_DEVSTR "Ingenic JZ4780 EHCI" - -struct jz4780_ehci_softc { - ehci_softc_t base; /* storage for EHCI code */ - clk_t clk; - struct gpiobus_pin *gpio_vbus; -}; - -static device_probe_t jz4780_ehci_probe; -static device_attach_t jz4780_ehci_attach; -static device_detach_t jz4780_ehci_detach; - -static int -jz4780_ehci_vbus_gpio_enable(device_t dev) -{ - struct gpiobus_pin *gpio_vbus; - struct jz4780_ehci_softc *sc; - int err; - - sc = device_get_softc(dev); - - err = ofw_gpiobus_parse_gpios(dev, "ingenic,vbus-gpio", &gpio_vbus); - /* - * The pin can ne already mapped by other device. Optimistically - * surge ahead. - */ - if (err <= 0) - return (0); - - sc->gpio_vbus = gpio_vbus; - if (err > 1) { - device_printf(dev, "too many vbus gpios\n"); - return (ENXIO); - } - - if (sc->gpio_vbus != NULL) { - err = GPIO_PIN_SETFLAGS(sc->gpio_vbus->dev, sc->gpio_vbus->pin, - GPIO_PIN_OUTPUT); - if (err != 0) { - device_printf(dev, "Cannot configure GPIO pin %d on %s\n", - sc->gpio_vbus->pin, device_get_nameunit(sc->gpio_vbus->dev)); - return (err); - } - - err = GPIO_PIN_SET(sc->gpio_vbus->dev, sc->gpio_vbus->pin, 1); - if (err != 0) { - device_printf(dev, "Cannot configure GPIO pin %d on %s\n", - sc->gpio_vbus->pin, device_get_nameunit(sc->gpio_vbus->dev)); - return (err); - } - } - return (0); -} - -static int -jz4780_ehci_clk_enable(device_t dev) -{ - struct jz4780_ehci_softc *sc; - int err; - - sc = device_get_softc(dev); - - err = clk_get_by_ofw_index(dev, 0, 0, &sc->clk); - if (err != 0) { - device_printf(dev, "unable to lookup device clock\n"); - return (err); - } - err = clk_enable(sc->clk); - if (err != 0) { - device_printf(dev, "unable to enable device clock\n"); - return (err); - } - err = clk_set_freq(sc->clk, 48000000, 0); - if (err != 0) { - device_printf(dev, "unable to set device clock to 48 kHZ\n"); - return (err); - } - return (0); -} - -static void -jz4780_ehci_intr(void *arg) -{ - - ehci_interrupt(arg); -} - -static int -jz4780_ehci_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-ehci")) - return (ENXIO); - - device_set_desc(dev, EHCI_HC_DEVSTR); - - return (BUS_PROBE_DEFAULT); -} - -static int -jz4780_ehci_attach(device_t dev) -{ - struct jz4780_ehci_softc *isc; - ehci_softc_t *sc; - int err; - int rid; - uint32_t reg; - - isc = device_get_softc(dev); - sc = &isc->base; - - /* initialise some bus fields */ - sc->sc_bus.parent = dev; - sc->sc_bus.devices = sc->sc_devices; - sc->sc_bus.devices_max = EHCI_MAX_DEVICES; - sc->sc_bus.dma_bits = 32; - - /* get all DMA memory */ - if (usb_bus_mem_alloc_all(&sc->sc_bus, - USB_GET_DMA_TAG(dev), &ehci_iterate_hw_softc)) { - return (ENOMEM); - } - - sc->sc_bus.usbrev = USB_REV_2_0; - - err = jz4780_ehci_vbus_gpio_enable(dev); - if (err) - goto error; - - rid = 0; - sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); - if (!sc->sc_io_res) { - device_printf(dev, "Could not map memory\n"); - goto error; - } - - /* - * Craft special resource for bus space ops that handle - * byte-alignment of non-word addresses. - */ - sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); - sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); - sc->sc_io_size = rman_get_size(sc->sc_io_res); - - err = jz4780_ehci_clk_enable(dev); - if (err) - goto error; - - if (jz4780_ehci_enable() != 0) { - device_printf(dev, "CGU failed to enable EHCI\n"); - err = ENXIO; - goto error; - } - - EWRITE4(sc, EHCI_USBINTR, 0); - - rid = 0; - sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_ACTIVE | RF_SHAREABLE); - if (sc->sc_irq_res == NULL) { - device_printf(dev, "Could not allocate irq\n"); - goto error; - } - sc->sc_bus.bdev = device_add_child(dev, "usbus", -1); - if (!sc->sc_bus.bdev) { - device_printf(dev, "Could not add USB device\n"); - goto error; - } - device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); - device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR); - - sprintf(sc->sc_vendor, "Ingenic"); - - err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, - NULL, jz4780_ehci_intr, sc, &sc->sc_intr_hdl); - if (err) { - device_printf(dev, "Could not setup irq, %d\n", err); - sc->sc_intr_hdl = NULL; - goto error; - } - - err = ehci_init(sc); - if (!err) { - /* Voodoo: set utmi data bus width on controller to 16 bit */ - reg = EREAD4(sc, JZ_EHCI_REG_UTMI_BUS); - reg |= UTMI_BUS_WIDTH; - EWRITE4(sc, JZ_EHCI_REG_UTMI_BUS, reg); - - err = device_probe_and_attach(sc->sc_bus.bdev); - } - if (err) { - device_printf(dev, "USB init failed err=%d\n", err); - goto error; - } - return (0); - -error: - jz4780_ehci_detach(dev); - return (ENXIO); -} - -static int -jz4780_ehci_detach(device_t dev) -{ - struct jz4780_ehci_softc *isc; - ehci_softc_t *sc; - device_t bdev; - int err; - - isc = device_get_softc(dev); - sc = &isc->base; - - if (sc->sc_bus.bdev) { - bdev = sc->sc_bus.bdev; - device_detach(bdev); - device_delete_child(dev, bdev); - } - /* during module unload there are lots of children leftover */ - device_delete_children(dev); - - if (sc->sc_irq_res && sc->sc_intr_hdl) { - /* - * only call ehci_detach() after ehci_init() - */ - ehci_detach(sc); - - err = bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intr_hdl); - - if (err) - /* XXX or should we panic? */ - device_printf(dev, "Could not tear down irq, %d\n", - err); - sc->sc_intr_hdl = NULL; - } - - if (sc->sc_irq_res) { - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); - sc->sc_irq_res = NULL; - } - if (sc->sc_io_res) { - bus_release_resource(dev, SYS_RES_MEMORY, 0, - sc->sc_io_res); - sc->sc_io_res = NULL; - } - - if (isc->clk) - clk_release(isc->clk); - - usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); - free(isc->gpio_vbus, M_DEVBUF); - return (0); -} - -static device_method_t ehci_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, jz4780_ehci_probe), - DEVMETHOD(device_attach, jz4780_ehci_attach), - DEVMETHOD(device_detach, jz4780_ehci_detach), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - - DEVMETHOD_END -}; - -static driver_t ehci_driver = { - .name = "ehci", - .methods = ehci_methods, - .size = sizeof(struct jz4780_ehci_softc), -}; - -static devclass_t ehci_devclass; - -DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0); -MODULE_DEPEND(ehci, usb, 1, 1, 1); -MODULE_DEPEND(ehci, gpio, 1, 1, 1); diff --git a/sys/mips/ingenic/jz4780_gpio.c b/sys/mips/ingenic/jz4780_gpio.c deleted file mode 100644 index fafb8a2cb17..00000000000 --- a/sys/mips/ingenic/jz4780_gpio.c +++ /dev/null @@ -1,838 +0,0 @@ -/*- - * Copyright 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include - -#include -#include - -#include "jz4780_gpio_if.h" -#include "gpio_if.h" -#include "pic_if.h" - -#define JZ4780_GPIO_PINS 32 - -enum pin_function { - JZ_FUNC_DEV_0, - JZ_FUNC_DEV_1, - JZ_FUNC_DEV_2, - JZ_FUNC_DEV_3, - JZ_FUNC_GPIO, - JZ_FUNC_INTR, -}; - -struct jz4780_gpio_pin { - struct intr_irqsrc pin_irqsrc; - enum intr_trigger intr_trigger; - enum intr_polarity intr_polarity; - enum pin_function pin_func; - uint32_t pin_caps; - uint32_t pin_flags; - uint32_t pin_num; - char pin_name[GPIOMAXNAME]; -}; - -struct jz4780_gpio_softc { - device_t dev; - device_t busdev; - struct resource *res[2]; - struct mtx mtx; - struct jz4780_gpio_pin pins[JZ4780_GPIO_PINS]; - void *intrhand; -}; - -static struct resource_spec jz4780_gpio_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { SYS_RES_IRQ, 0, RF_ACTIVE }, - { -1, 0 } -}; - -static int jz4780_gpio_probe(device_t dev); -static int jz4780_gpio_attach(device_t dev); -static int jz4780_gpio_detach(device_t dev); -static int jz4780_gpio_intr(void *arg); - -#define JZ4780_GPIO_LOCK(sc) mtx_lock_spin(&(sc)->mtx) -#define JZ4780_GPIO_UNLOCK(sc) mtx_unlock_spin(&(sc)->mtx) -#define JZ4780_GPIO_LOCK_INIT(sc) \ - mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \ - "jz4780_gpio", MTX_SPIN) -#define JZ4780_GPIO_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx); - -#define CSR_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val)) -#define CSR_READ_4(sc, reg) bus_read_4((sc)->res[0], (reg)) - -static int -jz4780_gpio_probe(device_t dev) -{ - phandle_t node; - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - /* We only like particular parent */ - if (!ofw_bus_is_compatible(device_get_parent(dev), - "ingenic,jz4780-pinctrl")) - return (ENXIO); - - /* ... and only specific children os that parent */ - node = ofw_bus_get_node(dev); - if (!OF_hasprop(node, "gpio-controller")) - return (ENXIO); - - device_set_desc(dev, "Ingenic JZ4780 GPIO Controller"); - - return (BUS_PROBE_DEFAULT); -} - -static int -jz4780_gpio_pin_set_func(struct jz4780_gpio_softc *sc, uint32_t pin, - uint32_t func) -{ - uint32_t mask = (1u << pin); - - if (func > (uint32_t)JZ_FUNC_DEV_3) - return (EINVAL); - - CSR_WRITE_4(sc, JZ_GPIO_INTC, mask); - CSR_WRITE_4(sc, JZ_GPIO_MASKC, mask); - if (func & 2) - CSR_WRITE_4(sc, JZ_GPIO_PAT1S, mask); - else - CSR_WRITE_4(sc, JZ_GPIO_PAT1C, mask); - if (func & 1) - CSR_WRITE_4(sc, JZ_GPIO_PAT0S, mask); - else - CSR_WRITE_4(sc, JZ_GPIO_PAT0C, mask); - - sc->pins[pin].pin_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT); - sc->pins[pin].pin_func = (enum pin_function)func; - return (0); -} - -static int -jz4780_gpio_pin_set_direction(struct jz4780_gpio_softc *sc, - uint32_t pin, uint32_t dir) -{ - uint32_t mask = (1u << pin); - - switch (dir) { - case GPIO_PIN_OUTPUT: - if (sc->pins[pin].pin_caps & dir) - CSR_WRITE_4(sc, JZ_GPIO_PAT1C, mask); - else - return (EINVAL); - break; - case GPIO_PIN_INPUT: - if (sc->pins[pin].pin_caps & dir) - CSR_WRITE_4(sc, JZ_GPIO_PAT1S, mask); - else - return (EINVAL); - break; - } - - sc->pins[pin].pin_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT); - sc->pins[pin].pin_flags |= dir; - return (0); -} - -static int -jz4780_gpio_pin_set_bias(struct jz4780_gpio_softc *sc, - uint32_t pin, uint32_t bias) -{ - uint32_t mask = (1u << pin); - - switch (bias) { - case GPIO_PIN_PULLUP: - case GPIO_PIN_PULLDOWN: - if (sc->pins[pin].pin_caps & bias) - CSR_WRITE_4(sc, JZ_GPIO_DPULLC, mask); - else - return (EINVAL); - break; - case 0: - CSR_WRITE_4(sc, JZ_GPIO_DPULLS, mask); - break; - default: - return (ENOTSUP); - } - - sc->pins[pin].pin_flags &= ~(GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN); - sc->pins[pin].pin_flags |= bias; - return (0); -} - -/* - * Decode pin configuration using this map - */ -#if 0 -INT MASK PAT1 PAT0 -1 x 0 0 /* intr, level, low */ -1 x 0 1 /* intr, level, high */ -1 x 1 0 /* intr, edge, falling */ -1 x 1 1 /* intr, edge, rising */ -0 0 0 0 /* function, func 0 */ -0 0 0 1 /* function, func 1 */ -0 0 1 0 /* function, func 2 */ -0 0 1 0 /* function, func 3 */ -0 1 0 0 /* gpio, output 0 */ -0 1 0 1 /* gpio, output 1 */ -0 1 1 x /* gpio, input */ -#endif - -static void -jz4780_gpio_pin_probe(struct jz4780_gpio_softc *sc, uint32_t pin) -{ - uint32_t mask = (1u << pin); - uint32_t val; - - /* Clear cached gpio config */ - sc->pins[pin].pin_flags = 0; - - /* First check if pin is in interrupt mode */ - val = CSR_READ_4(sc, JZ_GPIO_INT); - if (val & mask) { - /* Pin is in interrupt mode, decode interrupt triggering mode */ - val = CSR_READ_4(sc, JZ_GPIO_PAT1); - if (val & mask) - sc->pins[pin].intr_trigger = INTR_TRIGGER_EDGE; - else - sc->pins[pin].intr_trigger = INTR_TRIGGER_LEVEL; - /* Decode interrupt polarity */ - val = CSR_READ_4(sc, JZ_GPIO_PAT0); - if (val & mask) - sc->pins[pin].intr_polarity = INTR_POLARITY_HIGH; - else - sc->pins[pin].intr_polarity = INTR_POLARITY_LOW; - - sc->pins[pin].pin_func = JZ_FUNC_INTR; - sc->pins[pin].pin_flags = 0; - return; - } - /* Next check if pin is in gpio mode */ - val = CSR_READ_4(sc, JZ_GPIO_MASK); - if (val & mask) { - /* Pin is in gpio mode, decode direction and bias */ - val = CSR_READ_4(sc, JZ_GPIO_PAT1); - if (val & mask) - sc->pins[pin].pin_flags |= GPIO_PIN_INPUT; - else - sc->pins[pin].pin_flags |= GPIO_PIN_OUTPUT; - /* Check for bias */ - val = CSR_READ_4(sc, JZ_GPIO_DPULL); - if ((val & mask) == 0) - sc->pins[pin].pin_flags |= sc->pins[pin].pin_caps & - (GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN); - sc->pins[pin].pin_func = JZ_FUNC_GPIO; - return; - } - /* By exclusion, pin is in alternate function mode */ - val = CSR_READ_4(sc, JZ_GPIO_DPULL); - if ((val & mask) == 0) - sc->pins[pin].pin_flags = sc->pins[pin].pin_caps & - (GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN); - val = ((CSR_READ_4(sc, JZ_GPIO_PAT1) & mask) >> pin) << 1; - val = val | ((CSR_READ_4(sc, JZ_GPIO_PAT1) & mask) >> pin); - sc->pins[pin].pin_func = (enum pin_function)val; -} - -static int -jz4780_gpio_register_isrcs(struct jz4780_gpio_softc *sc) -{ - int error; - uint32_t irq, i; - struct intr_irqsrc *isrc; - const char *name; - - name = device_get_nameunit(sc->dev); - for (irq = 0; irq < JZ4780_GPIO_PINS; irq++) { - isrc = &sc->pins[irq].pin_irqsrc; - error = intr_isrc_register(isrc, sc->dev, 0, "%s,%d", - name, irq); - if (error != 0) { - for (i = 0; i < irq; i++) - intr_isrc_deregister(&sc->pins[i].pin_irqsrc); - device_printf(sc->dev, "%s failed", __func__); - return (error); - } - } - - return (0); -} - -static int -jz4780_gpio_attach(device_t dev) -{ - struct jz4780_gpio_softc *sc = device_get_softc(dev); - phandle_t node; - uint32_t i, pd_pins, pu_pins; - - sc->dev = dev; - - if (bus_alloc_resources(dev, jz4780_gpio_spec, sc->res)) { - device_printf(dev, "could not allocate resources for device\n"); - return (ENXIO); - } - - JZ4780_GPIO_LOCK_INIT(sc); - - node = ofw_bus_get_node(dev); - OF_getencprop(node, "ingenic,pull-ups", &pu_pins, sizeof(pu_pins)); - OF_getencprop(node, "ingenic,pull-downs", &pd_pins, sizeof(pd_pins)); - - for (i = 0; i < JZ4780_GPIO_PINS; i++) { - sc->pins[i].pin_num = i; - sc->pins[i].pin_caps |= GPIO_PIN_INPUT | GPIO_PIN_OUTPUT; - if (pu_pins & (1 << i)) - sc->pins[i].pin_caps |= GPIO_PIN_PULLUP; - if (pd_pins & (1 << i)) - sc->pins[i].pin_caps |= GPIO_PIN_PULLDOWN; - sc->pins[i].intr_polarity = INTR_POLARITY_CONFORM; - sc->pins[i].intr_trigger = INTR_TRIGGER_CONFORM; - - snprintf(sc->pins[i].pin_name, GPIOMAXNAME - 1, "gpio%c%d", - device_get_unit(dev) + 'a', i); - sc->pins[i].pin_name[GPIOMAXNAME - 1] = '\0'; - - jz4780_gpio_pin_probe(sc, i); - } - - if (jz4780_gpio_register_isrcs(sc) != 0) - goto fail; - - if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) { - device_printf(dev, "could not register PIC\n"); - goto fail; - } - - if (bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE, - jz4780_gpio_intr, NULL, sc, &sc->intrhand) != 0) - goto fail_pic; - - sc->busdev = gpiobus_attach_bus(dev); - if (sc->busdev == NULL) - goto fail_pic; - - return (0); -fail_pic: - intr_pic_deregister(dev, OF_xref_from_node(node)); -fail: - if (sc->intrhand != NULL) - bus_teardown_intr(dev, sc->res[1], sc->intrhand); - bus_release_resources(dev, jz4780_gpio_spec, sc->res); - JZ4780_GPIO_LOCK_DESTROY(sc); - return (ENXIO); -} - -static int -jz4780_gpio_detach(device_t dev) -{ - struct jz4780_gpio_softc *sc = device_get_softc(dev); - - bus_release_resources(dev, jz4780_gpio_spec, sc->res); - JZ4780_GPIO_LOCK_DESTROY(sc); - return (0); -} - -static int -jz4780_gpio_configure_pin(device_t dev, uint32_t pin, uint32_t func, - uint32_t flags) -{ - struct jz4780_gpio_softc *sc; - int retval; - - if (pin >= JZ4780_GPIO_PINS) - return (EINVAL); - - sc = device_get_softc(dev); - JZ4780_GPIO_LOCK(sc); - retval = jz4780_gpio_pin_set_func(sc, pin, func); - if (retval == 0) - retval = jz4780_gpio_pin_set_bias(sc, pin, flags); - JZ4780_GPIO_UNLOCK(sc); - return (retval); -} - -static device_t -jz4780_gpio_get_bus(device_t dev) -{ - struct jz4780_gpio_softc *sc; - - sc = device_get_softc(dev); - - return (sc->busdev); -} - -static int -jz4780_gpio_pin_max(device_t dev, int *maxpin) -{ - - *maxpin = JZ4780_GPIO_PINS - 1; - return (0); -} - -static int -jz4780_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) -{ - struct jz4780_gpio_softc *sc; - - if (pin >= JZ4780_GPIO_PINS) - return (EINVAL); - - sc = device_get_softc(dev); - JZ4780_GPIO_LOCK(sc); - *caps = sc->pins[pin].pin_caps; - JZ4780_GPIO_UNLOCK(sc); - - return (0); -} - -static int -jz4780_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) -{ - struct jz4780_gpio_softc *sc; - - if (pin >= JZ4780_GPIO_PINS) - return (EINVAL); - - sc = device_get_softc(dev); - JZ4780_GPIO_LOCK(sc); - *flags = sc->pins[pin].pin_flags; - JZ4780_GPIO_UNLOCK(sc); - - return (0); -} - -static int -jz4780_gpio_pin_getname(device_t dev, uint32_t pin, char *name) -{ - struct jz4780_gpio_softc *sc; - - if (pin >= JZ4780_GPIO_PINS) - return (EINVAL); - - sc = device_get_softc(dev); - strncpy(name, sc->pins[pin].pin_name, GPIOMAXNAME - 1); - name[GPIOMAXNAME - 1] = '\0'; - - return (0); -} - -static int -jz4780_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) -{ - struct jz4780_gpio_softc *sc; - int retval; - - if (pin >= JZ4780_GPIO_PINS) - return (EINVAL); - - sc = device_get_softc(dev); - JZ4780_GPIO_LOCK(sc); - retval = jz4780_gpio_pin_set_direction(sc, pin, - flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)); - if (retval == 0) - retval = jz4780_gpio_pin_set_bias(sc, pin, - flags & (GPIO_PIN_PULLDOWN | GPIO_PIN_PULLUP)); - JZ4780_GPIO_UNLOCK(sc); - - return (retval); -} - -static int -jz4780_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) -{ - struct jz4780_gpio_softc *sc; - uint32_t mask; - int retval; - - if (pin >= JZ4780_GPIO_PINS) - return (EINVAL); - - retval = EINVAL; - mask = (1u << pin); - sc = device_get_softc(dev); - JZ4780_GPIO_LOCK(sc); - if (sc->pins[pin].pin_func == JZ_FUNC_GPIO) { - CSR_WRITE_4(sc, value ? JZ_GPIO_PAT0S : JZ_GPIO_PAT0C, mask); - retval = 0; - } - JZ4780_GPIO_UNLOCK(sc); - - return (retval); -} - -static int -jz4780_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) -{ - struct jz4780_gpio_softc *sc; - uint32_t data, mask; - - if (pin >= JZ4780_GPIO_PINS) - return (EINVAL); - - mask = (1u << pin); - sc = device_get_softc(dev); - JZ4780_GPIO_LOCK(sc); - data = CSR_READ_4(sc, JZ_GPIO_PIN); - JZ4780_GPIO_UNLOCK(sc); - *val = (data & mask) ? 1 : 0; - - return (0); -} - -static int -jz4780_gpio_pin_toggle(device_t dev, uint32_t pin) -{ - struct jz4780_gpio_softc *sc; - uint32_t data, mask; - int retval; - - if (pin >= JZ4780_GPIO_PINS) - return (EINVAL); - - retval = EINVAL; - mask = (1u << pin); - sc = device_get_softc(dev); - JZ4780_GPIO_LOCK(sc); - if (sc->pins[pin].pin_func == JZ_FUNC_GPIO && - sc->pins[pin].pin_flags & GPIO_PIN_OUTPUT) { - data = CSR_READ_4(sc, JZ_GPIO_PIN); - CSR_WRITE_4(sc, (data & mask) ? JZ_GPIO_PAT0C : JZ_GPIO_PAT0S, - mask); - retval = 0; - } - JZ4780_GPIO_UNLOCK(sc); - - return (retval); -} - -#ifdef FDT -static int -jz_gpio_map_intr_fdt(device_t dev, struct intr_map_data *data, u_int *irqp, - enum intr_polarity *polp, enum intr_trigger *trigp) -{ - struct jz4780_gpio_softc *sc; - struct intr_map_data_fdt *daf; - - sc = device_get_softc(dev); - daf = (struct intr_map_data_fdt *)data; - - if (data == NULL || data->type != INTR_MAP_DATA_FDT || - daf->ncells == 0 || daf->ncells > 2) - return (EINVAL); - - *irqp = daf->cells[0]; - if (daf->ncells == 1) { - *trigp = INTR_TRIGGER_CONFORM; - *polp = INTR_POLARITY_CONFORM; - return (0); - } - - switch (daf->cells[1]) - { - case IRQ_TYPE_EDGE_RISING: - *trigp = INTR_TRIGGER_EDGE; - *polp = INTR_POLARITY_HIGH; - break; - case IRQ_TYPE_EDGE_FALLING: - *trigp = INTR_TRIGGER_EDGE; - *polp = INTR_POLARITY_LOW; - break; - case IRQ_TYPE_LEVEL_HIGH: - *trigp = INTR_TRIGGER_LEVEL; - *polp = INTR_POLARITY_HIGH; - break; - case IRQ_TYPE_LEVEL_LOW: - *trigp = INTR_TRIGGER_LEVEL; - *polp = INTR_POLARITY_LOW; - break; - default: - device_printf(sc->dev, "unsupported trigger/polarity 0x%2x\n", - daf->cells[1]); - return (ENOTSUP); - } - - return (0); -} -#endif - -static int -jz_gpio_map_intr(device_t dev, struct intr_map_data *data, u_int *irqp, - enum intr_polarity *polp, enum intr_trigger *trigp) -{ - struct jz4780_gpio_softc *sc; - enum intr_polarity pol; - enum intr_trigger trig; - u_int irq; - - sc = device_get_softc(dev); - switch (data->type) { -#ifdef FDT - case INTR_MAP_DATA_FDT: - if (jz_gpio_map_intr_fdt(dev, data, &irq, &pol, &trig) != 0) - return (EINVAL); - break; -#endif - default: - return (EINVAL); - } - - if (irq >= nitems(sc->pins)) - return (EINVAL); - - *irqp = irq; - if (polp != NULL) - *polp = pol; - if (trigp != NULL) - *trigp = trig; - return (0); -} - -static int -jz4780_gpio_pic_map_intr(device_t dev, struct intr_map_data *data, - struct intr_irqsrc **isrcp) -{ - struct jz4780_gpio_softc *sc; - int retval; - u_int irq; - - retval = jz_gpio_map_intr(dev, data, &irq, NULL, NULL); - if (retval == 0) { - sc = device_get_softc(dev); - *isrcp = &sc->pins[irq].pin_irqsrc; - } - return (retval); -} - -static int -jz4780_gpio_pic_setup_intr(device_t dev, struct intr_irqsrc *isrc, - struct resource *res, struct intr_map_data *data) -{ - struct jz4780_gpio_softc *sc; - struct jz4780_gpio_pin *pin; - enum intr_polarity pol; - enum intr_trigger trig; - uint32_t mask, irq; - - if (data == NULL) - return (ENOTSUP); - - /* Get config for resource. */ - if (jz_gpio_map_intr(dev, data, &irq, &pol, &trig)) - return (EINVAL); - - pin = __containerof(isrc, struct jz4780_gpio_pin, pin_irqsrc); - if (isrc != &pin->pin_irqsrc) - return (EINVAL); - - /* Compare config if this is not first setup. */ - if (isrc->isrc_handlers != 0) { - if ((pol != INTR_POLARITY_CONFORM && pol != pin->intr_polarity) || - (trig != INTR_TRIGGER_CONFORM && trig != pin->intr_trigger)) - return (EINVAL); - else - return (0); - } - - if (pol == INTR_POLARITY_CONFORM) - pol = INTR_POLARITY_LOW; /* just pick some */ - if (trig == INTR_TRIGGER_CONFORM) - trig = INTR_TRIGGER_EDGE; /* just pick some */ - - sc = device_get_softc(dev); - mask = 1u << pin->pin_num; - - JZ4780_GPIO_LOCK(sc); - CSR_WRITE_4(sc, JZ_GPIO_MASKS, mask); - CSR_WRITE_4(sc, JZ_GPIO_INTS, mask); - - if (trig == INTR_TRIGGER_LEVEL) - CSR_WRITE_4(sc, JZ_GPIO_PAT1C, mask); - else - CSR_WRITE_4(sc, JZ_GPIO_PAT1S, mask); - - if (pol == INTR_POLARITY_LOW) - CSR_WRITE_4(sc, JZ_GPIO_PAT0C, mask); - else - CSR_WRITE_4(sc, JZ_GPIO_PAT0S, mask); - - pin->pin_func = JZ_FUNC_INTR; - pin->intr_trigger = trig; - pin->intr_polarity = pol; - - CSR_WRITE_4(sc, JZ_GPIO_FLAGC, mask); - CSR_WRITE_4(sc, JZ_GPIO_MASKC, mask); - JZ4780_GPIO_UNLOCK(sc); - return (0); -} - -static void -jz4780_gpio_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - struct jz4780_gpio_softc *sc; - struct jz4780_gpio_pin *pin; - - sc = device_get_softc(dev); - pin = __containerof(isrc, struct jz4780_gpio_pin, pin_irqsrc); - - CSR_WRITE_4(sc, JZ_GPIO_MASKC, 1u << pin->pin_num); -} - -static void -jz4780_gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - struct jz4780_gpio_softc *sc; - struct jz4780_gpio_pin *pin; - - sc = device_get_softc(dev); - pin = __containerof(isrc, struct jz4780_gpio_pin, pin_irqsrc); - - CSR_WRITE_4(sc, JZ_GPIO_MASKS, 1u << pin->pin_num); -} - -static void -jz4780_gpio_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - jz4780_gpio_pic_disable_intr(dev, isrc); -} - -static void -jz4780_gpio_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - jz4780_gpio_pic_enable_intr(dev, isrc); -} - -static void -jz4780_gpio_pic_post_filter(device_t dev, struct intr_irqsrc *isrc) -{ - struct jz4780_gpio_softc *sc; - struct jz4780_gpio_pin *pin; - - sc = device_get_softc(dev); - pin = __containerof(isrc, struct jz4780_gpio_pin, pin_irqsrc); - - CSR_WRITE_4(sc, JZ_GPIO_FLAGC, 1u << pin->pin_num); -} - -static int -jz4780_gpio_intr(void *arg) -{ - struct jz4780_gpio_softc *sc; - uint32_t i, interrupts; - - sc = arg; - interrupts = CSR_READ_4(sc, JZ_GPIO_FLAG); - - for (i = 0; interrupts != 0; i++, interrupts >>= 1) { - if ((interrupts & 0x1) == 0) - continue; - if (intr_isrc_dispatch(&sc->pins[i].pin_irqsrc, - curthread->td_intr_frame) != 0) { - device_printf(sc->dev, "spurious interrupt %d\n", i); - PIC_DISABLE_INTR(sc->dev, &sc->pins[i].pin_irqsrc); - } - } - - return (FILTER_HANDLED); -} - -static phandle_t -jz4780_gpio_bus_get_node(device_t bus, device_t dev) -{ - - return (ofw_bus_get_node(bus)); -} - -static device_method_t jz4780_gpio_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, jz4780_gpio_probe), - DEVMETHOD(device_attach, jz4780_gpio_attach), - DEVMETHOD(device_detach, jz4780_gpio_detach), - - /* GPIO protocol */ - DEVMETHOD(gpio_get_bus, jz4780_gpio_get_bus), - DEVMETHOD(gpio_pin_max, jz4780_gpio_pin_max), - DEVMETHOD(gpio_pin_getname, jz4780_gpio_pin_getname), - DEVMETHOD(gpio_pin_getflags, jz4780_gpio_pin_getflags), - DEVMETHOD(gpio_pin_getcaps, jz4780_gpio_pin_getcaps), - DEVMETHOD(gpio_pin_setflags, jz4780_gpio_pin_setflags), - DEVMETHOD(gpio_pin_get, jz4780_gpio_pin_get), - DEVMETHOD(gpio_pin_set, jz4780_gpio_pin_set), - DEVMETHOD(gpio_pin_toggle, jz4780_gpio_pin_toggle), - - /* Custom interface to set pin function */ - DEVMETHOD(jz4780_gpio_configure_pin, jz4780_gpio_configure_pin), - - /* Interrupt controller interface */ - DEVMETHOD(pic_setup_intr, jz4780_gpio_pic_setup_intr), - DEVMETHOD(pic_enable_intr, jz4780_gpio_pic_enable_intr), - DEVMETHOD(pic_disable_intr, jz4780_gpio_pic_disable_intr), - DEVMETHOD(pic_map_intr, jz4780_gpio_pic_map_intr), - DEVMETHOD(pic_post_filter, jz4780_gpio_pic_post_filter), - DEVMETHOD(pic_post_ithread, jz4780_gpio_pic_post_ithread), - DEVMETHOD(pic_pre_ithread, jz4780_gpio_pic_pre_ithread), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_node, jz4780_gpio_bus_get_node), - - DEVMETHOD_END -}; - -static driver_t jz4780_gpio_driver = { - "gpio", - jz4780_gpio_methods, - sizeof(struct jz4780_gpio_softc), -}; - -static devclass_t jz4780_gpio_devclass; - -EARLY_DRIVER_MODULE(jz4780_gpio, simplebus, jz4780_gpio_driver, - jz4780_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE); diff --git a/sys/mips/ingenic/jz4780_gpio_if.m b/sys/mips/ingenic/jz4780_gpio_if.m deleted file mode 100644 index 8236d24f5c8..00000000000 --- a/sys/mips/ingenic/jz4780_gpio_if.m +++ /dev/null @@ -1,40 +0,0 @@ -#- -# Copyright (c) 2015 Alexander Kabaev -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -# SUCH DAMAGE. -# -# - -#include - -INTERFACE jz4780_gpio; - -/** - * Configures pin as specified by FDT pinctrl entry - */ -METHOD int configure_pin { - device_t dev; - uint32_t gpio; - uint32_t func; - uint32_t flags; -}; diff --git a/sys/mips/ingenic/jz4780_intr.c b/sys/mips/ingenic/jz4780_intr.c deleted file mode 100644 index e499f55d35f..00000000000 --- a/sys/mips/ingenic/jz4780_intr.c +++ /dev/null @@ -1,331 +0,0 @@ -/*- - * Copyright (c) 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include - -#include "pic_if.h" - -#define JZ4780_NIRQS 64 - -static int jz4780_pic_intr(void *); - -struct jz4780_pic_isrc { - struct intr_irqsrc isrc; - u_int irq; -}; - -struct jz4780_pic_softc { - device_t pic_dev; - void * pic_intrhand; - struct resource * pic_res[2]; - struct jz4780_pic_isrc pic_irqs[JZ4780_NIRQS]; - uint32_t nirqs; -}; - -#define PIC_INTR_ISRC(sc, irq) (&(sc)->pic_irqs[(irq)].isrc) - -static struct resource_spec jz4780_pic_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Registers */ - { SYS_RES_IRQ, 0, RF_ACTIVE }, /* Parent interrupt */ - { -1, 0 } -}; - -static struct ofw_compat_data compat_data[] = { - {"ingenic,jz4780-intc", true}, - {NULL, false} -}; - -#define READ4(_sc, _reg) bus_read_4((_sc)->pic_res[0], _reg) -#define WRITE4(_sc, _reg, _val) bus_write_4((_sc)->pic_res[0], _reg, _val) - -static int -jz4780_pic_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) - return (ENXIO); - device_set_desc(dev, "JZ4780 Interrupt Controller"); - return (BUS_PROBE_DEFAULT); -} - -static inline void -pic_irq_unmask(struct jz4780_pic_softc *sc, u_int irq) -{ - if (irq < 32) - WRITE4(sc, JZ_ICMCR0, (1u << irq)); - else - WRITE4(sc, JZ_ICMCR1, (1u << (irq - 32))); -} - -static inline void -pic_irq_mask(struct jz4780_pic_softc *sc, u_int irq) -{ - if (irq < 32) - WRITE4(sc, JZ_ICMSR0, (1u << irq)); - else - WRITE4(sc, JZ_ICMSR1, (1u << (irq - 32))); -} - -static inline intptr_t -pic_xref(device_t dev) -{ - return (OF_xref_from_node(ofw_bus_get_node(dev))); -} - -static int -jz4780_pic_register_isrcs(struct jz4780_pic_softc *sc) -{ - int error; - uint32_t irq, i; - struct intr_irqsrc *isrc; - const char *name; - - name = device_get_nameunit(sc->pic_dev); - for (irq = 0; irq < sc->nirqs; irq++) { - sc->pic_irqs[irq].irq = irq; - isrc = PIC_INTR_ISRC(sc, irq); - error = intr_isrc_register(isrc, sc->pic_dev, 0, "%s,%d", - name, irq); - if (error != 0) { - for (i = 0; i < irq; i++) - intr_isrc_deregister(PIC_INTR_ISRC(sc, irq)); - device_printf(sc->pic_dev, "%s failed", __func__); - return (error); - } - } - - return (0); -} - -static int -jz4780_pic_attach(device_t dev) -{ - struct jz4780_pic_softc *sc; - intptr_t xref; - - xref = pic_xref(dev); - - sc = device_get_softc(dev); - - if (bus_alloc_resources(dev, jz4780_pic_spec, sc->pic_res)) { - device_printf(dev, "could not allocate resources\n"); - return (ENXIO); - } - - sc->pic_dev = dev; - - /* Set the number of interrupts */ - sc->nirqs = nitems(sc->pic_irqs); - - /* Mask all interrupts */ - WRITE4(sc, JZ_ICMR0, 0xFFFFFFFF); - WRITE4(sc, JZ_ICMR1, 0xFFFFFFFF); - - /* Register the interrupts */ - if (jz4780_pic_register_isrcs(sc) != 0) { - device_printf(dev, "could not register PIC ISRCs\n"); - goto cleanup; - } - - /* - * Now, when everything is initialized, it's right time to - * register interrupt controller to interrupt framefork. - */ - if (intr_pic_register(dev, xref) == NULL) { - device_printf(dev, "could not register PIC\n"); - goto cleanup; - } - - if (bus_setup_intr(dev, sc->pic_res[1], INTR_TYPE_CLK, - jz4780_pic_intr, NULL, sc, &sc->pic_intrhand)) { - device_printf(dev, "could not setup irq handler\n"); - intr_pic_deregister(dev, xref); - goto cleanup; - } - - return (0); - -cleanup: - bus_release_resources(dev, jz4780_pic_spec, sc->pic_res); - - return(ENXIO); -} - -static int -jz4780_pic_intr(void *arg) -{ - struct jz4780_pic_softc *sc = arg; - struct intr_irqsrc *isrc; - struct thread *td; - uint32_t i, intr; - - td = curthread; - /* Workaround: do not inflate intr nesting level */ - td->td_intr_nesting_level--; - - intr = READ4(sc, JZ_ICPR0); - while ((i = fls(intr)) != 0) { - i--; - intr &= ~(1u << i); - - isrc = PIC_INTR_ISRC(sc, i); - if (intr_isrc_dispatch(isrc, curthread->td_intr_frame) != 0) { - device_printf(sc->pic_dev, "Stray interrupt %u detected\n", i); - pic_irq_mask(sc, i); - continue; - } - } - - KASSERT(i == 0, ("all interrupts handled")); - - intr = READ4(sc, JZ_ICPR1); - while ((i = fls(intr)) != 0) { - i--; - intr &= ~(1u << i); - i += 32; - - isrc = PIC_INTR_ISRC(sc, i); - if (intr_isrc_dispatch(isrc, curthread->td_intr_frame) != 0) { - device_printf(sc->pic_dev, "Stray interrupt %u detected\n", i); - pic_irq_mask(sc, i); - continue; - } - } - - KASSERT(i == 0, ("all interrupts handled")); - td->td_intr_nesting_level++; - - return (FILTER_HANDLED); -} - -static int -jz4780_pic_map_intr(device_t dev, struct intr_map_data *data, - struct intr_irqsrc **isrcp) -{ -#ifdef FDT - struct jz4780_pic_softc *sc; - struct intr_map_data_fdt *daf; - - sc = device_get_softc(dev); - daf = (struct intr_map_data_fdt *)data; - - if (data == NULL || data->type != INTR_MAP_DATA_FDT || - daf->ncells != 1 || daf->cells[0] >= sc->nirqs) - return (EINVAL); - - *isrcp = PIC_INTR_ISRC(sc, daf->cells[0]); - return (0); -#else - return (EINVAL); -#endif -} - -static void -jz4780_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - struct jz4780_pic_isrc *pic_isrc; - - pic_isrc = (struct jz4780_pic_isrc *)isrc; - pic_irq_unmask(device_get_softc(dev), pic_isrc->irq); -} - -static void -jz4780_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - struct jz4780_pic_isrc *pic_isrc; - - pic_isrc = (struct jz4780_pic_isrc *)isrc; - pic_irq_mask(device_get_softc(dev), pic_isrc->irq); -} - -static void -jz4780_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - jz4780_pic_disable_intr(dev, isrc); -} - -static void -jz4780_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - jz4780_pic_enable_intr(dev, isrc); -} - -static device_method_t jz4780_pic_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, jz4780_pic_probe), - DEVMETHOD(device_attach, jz4780_pic_attach), - /* Interrupt controller interface */ - DEVMETHOD(pic_enable_intr, jz4780_pic_enable_intr), - DEVMETHOD(pic_disable_intr, jz4780_pic_disable_intr), - DEVMETHOD(pic_map_intr, jz4780_pic_map_intr), - DEVMETHOD(pic_post_ithread, jz4780_pic_post_ithread), - DEVMETHOD(pic_pre_ithread, jz4780_pic_pre_ithread), - { 0, 0 } -}; - -static driver_t jz4780_pic_driver = { - "intc", - jz4780_pic_methods, - sizeof(struct jz4780_pic_softc), -}; - -static devclass_t jz4780_pic_devclass; - -EARLY_DRIVER_MODULE(intc, ofwbus, jz4780_pic_driver, jz4780_pic_devclass, 0, 0, - BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); diff --git a/sys/mips/ingenic/jz4780_lcd.c b/sys/mips/ingenic/jz4780_lcd.c deleted file mode 100644 index 7ff386a0093..00000000000 --- a/sys/mips/ingenic/jz4780_lcd.c +++ /dev/null @@ -1,571 +0,0 @@ -/*- - * Copyright (c) 2016 Jared McNeill - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Ingenic JZ4780 LCD Controller - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include -#include - -#include - -#include - -#include "fb_if.h" -#include "hdmi_if.h" - -#define FB_DEFAULT_W 800 -#define FB_DEFAULT_H 600 -#define FB_DEFAULT_REF 60 -#define FB_BPP 32 -#define FB_ALIGN (16 * 4) -#define FB_MAX_BW (1920 * 1080 * 60) -#define FB_MAX_W 2048 -#define FB_MAX_H 2048 -#define FB_DIVIDE(x, y) (((x) + ((y) / 2)) / (y)) - -#define PCFG_MAGIC 0xc7ff2100 - -#define DOT_CLOCK_TO_HZ(c) ((c) * 1000) - -#ifndef VM_MEMATTR_WRITE_COMBINING -#define VM_MEMATTR_WRITE_COMBINING VM_MEMATTR_UNCACHEABLE -#endif - -struct jzlcd_softc { - device_t dev; - device_t fbdev; - struct resource *res[1]; - - /* Clocks */ - clk_t clk; - clk_t clk_pix; - - /* Framebuffer */ - struct fb_info info; - size_t fbsize; - bus_addr_t paddr; - vm_offset_t vaddr; - - /* HDMI */ - eventhandler_tag hdmi_evh; - - /* Frame descriptor DMA */ - bus_dma_tag_t fdesc_tag; - bus_dmamap_t fdesc_map; - bus_addr_t fdesc_paddr; - struct lcd_frame_descriptor *fdesc; -}; - -static struct resource_spec jzlcd_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { -1, 0 } -}; - -#define LCD_READ(sc, reg) bus_read_4((sc)->res[0], (reg)) -#define LCD_WRITE(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val)) - -static int -jzlcd_allocfb(struct jzlcd_softc *sc) -{ - sc->vaddr = kmem_alloc_contig(sc->fbsize, M_NOWAIT | M_ZERO, 0, ~0, - FB_ALIGN, 0, VM_MEMATTR_WRITE_COMBINING); - if (sc->vaddr == 0) { - device_printf(sc->dev, "failed to allocate FB memory\n"); - return (ENOMEM); - } - sc->paddr = pmap_kextract(sc->vaddr); - - return (0); -} - -static void -jzlcd_freefb(struct jzlcd_softc *sc) -{ - kmem_free(sc->vaddr, sc->fbsize); -} - -static void -jzlcd_start(struct jzlcd_softc *sc) -{ - uint32_t ctrl; - - /* Clear status registers */ - LCD_WRITE(sc, LCDSTATE, 0); - LCD_WRITE(sc, LCDOSDS, 0); - /* Enable the controller */ - ctrl = LCD_READ(sc, LCDCTRL); - ctrl |= LCDCTRL_ENA; - ctrl &= ~LCDCTRL_DIS; - LCD_WRITE(sc, LCDCTRL, ctrl); -} - -static void -jzlcd_stop(struct jzlcd_softc *sc) -{ - uint32_t ctrl; - - ctrl = LCD_READ(sc, LCDCTRL); - if ((ctrl & LCDCTRL_ENA) != 0) { - /* Disable the controller and wait for it to stop */ - ctrl |= LCDCTRL_DIS; - LCD_WRITE(sc, LCDCTRL, ctrl); - while ((LCD_READ(sc, LCDSTATE) & LCDSTATE_LDD) == 0) - DELAY(100); - } - /* Clear all status except for disable */ - LCD_WRITE(sc, LCDSTATE, LCD_READ(sc, LCDSTATE) & ~LCDSTATE_LDD); -} - -static void -jzlcd_setup_descriptor(struct jzlcd_softc *sc, const struct videomode *mode, - u_int desno) -{ - struct lcd_frame_descriptor *fdesc; - int line_sz; - - /* Frame size is specified in # words */ - line_sz = (mode->hdisplay * FB_BPP) >> 3; - line_sz = ((line_sz + 3) & ~3) / 4; - - fdesc = sc->fdesc + desno; - - if (desno == 0) - fdesc->next = sc->fdesc_paddr + - sizeof(struct lcd_frame_descriptor); - else - fdesc->next = sc->fdesc_paddr; - fdesc->physaddr = sc->paddr; - fdesc->id = desno; - fdesc->cmd = LCDCMD_FRM_EN | (line_sz * mode->vdisplay); - fdesc->offs = 0; - fdesc->pw = 0; - fdesc->cnum_pos = LCDPOS_BPP01_18_24 | - LCDPOS_PREMULTI01 | - (desno == 0 ? LCDPOS_COEF_BLE01_1 : LCDPOS_COEF_SLE01); - fdesc->dessize = LCDDESSIZE_ALPHA | - ((mode->vdisplay - 1) << LCDDESSIZE_HEIGHT_SHIFT) | - ((mode->hdisplay - 1) << LCDDESSIZE_WIDTH_SHIFT); -} - -static int -jzlcd_set_videomode(struct jzlcd_softc *sc, const struct videomode *mode) -{ - u_int hbp, hfp, hsw, vbp, vfp, vsw; - u_int hds, hde, ht, vds, vde, vt; - uint32_t ctrl; - int error; - - hbp = mode->htotal - mode->hsync_end; - hfp = mode->hsync_start - mode->hdisplay; - hsw = mode->hsync_end - mode->hsync_start; - vbp = mode->vtotal - mode->vsync_end; - vfp = mode->vsync_start - mode->vdisplay; - vsw = mode->vsync_end - mode->vsync_start; - - hds = hsw + hbp; - hde = hds + mode->hdisplay; - ht = hde + hfp; - - vds = vsw + vbp; - vde = vds + mode->vdisplay; - vt = vde + vfp; - - /* Setup timings */ - LCD_WRITE(sc, LCDVAT, - (ht << LCDVAT_HT_SHIFT) | (vt << LCDVAT_VT_SHIFT)); - LCD_WRITE(sc, LCDDAH, - (hds << LCDDAH_HDS_SHIFT) | (hde << LCDDAH_HDE_SHIFT)); - LCD_WRITE(sc, LCDDAV, - (vds << LCDDAV_VDS_SHIFT) | (vde << LCDDAV_VDE_SHIFT)); - LCD_WRITE(sc, LCDHSYNC, hsw); - LCD_WRITE(sc, LCDVSYNC, vsw); - - /* Set configuration */ - LCD_WRITE(sc, LCDCFG, LCDCFG_NEWDES | LCDCFG_RECOVER | LCDCFG_24 | - LCDCFG_PSM | LCDCFG_CLSM | LCDCFG_SPLM | LCDCFG_REVM | LCDCFG_PCP); - ctrl = LCD_READ(sc, LCDCTRL); - ctrl &= ~LCDCTRL_BST; - ctrl |= LCDCTRL_BST_64 | LCDCTRL_OFUM; - LCD_WRITE(sc, LCDCTRL, ctrl); - LCD_WRITE(sc, LCDPCFG, PCFG_MAGIC); - LCD_WRITE(sc, LCDRGBC, LCDRGBC_RGBFMT); - - /* Update registers */ - LCD_WRITE(sc, LCDSTATE, 0); - - /* Setup frame descriptors */ - jzlcd_setup_descriptor(sc, mode, 0); - jzlcd_setup_descriptor(sc, mode, 1); - bus_dmamap_sync(sc->fdesc_tag, sc->fdesc_map, BUS_DMASYNC_PREWRITE); - - /* Setup DMA channels */ - LCD_WRITE(sc, LCDDA0, sc->fdesc_paddr - + sizeof(struct lcd_frame_descriptor)); - LCD_WRITE(sc, LCDDA1, sc->fdesc_paddr); - - /* Set display clock */ - error = clk_set_freq(sc->clk_pix, DOT_CLOCK_TO_HZ(mode->dot_clock), 0); - if (error != 0) { - device_printf(sc->dev, "failed to set pixel clock to %u Hz\n", - DOT_CLOCK_TO_HZ(mode->dot_clock)); - return (error); - } - - return (0); -} - -static int -jzlcd_configure(struct jzlcd_softc *sc, const struct videomode *mode) -{ - size_t fbsize; - int error; - - fbsize = round_page(mode->hdisplay * mode->vdisplay * (FB_BPP / NBBY)); - - /* Detach the old FB device */ - if (sc->fbdev != NULL) { - device_delete_child(sc->dev, sc->fbdev); - sc->fbdev = NULL; - } - - /* If the FB size has changed, free the old FB memory */ - if (sc->fbsize > 0 && sc->fbsize != fbsize) { - jzlcd_freefb(sc); - sc->vaddr = 0; - } - - /* Allocate the FB if necessary */ - sc->fbsize = fbsize; - if (sc->vaddr == 0) { - error = jzlcd_allocfb(sc); - if (error != 0) { - device_printf(sc->dev, "failed to allocate FB memory\n"); - return (ENXIO); - } - } - - /* Setup video mode */ - error = jzlcd_set_videomode(sc, mode); - if (error != 0) - return (error); - - /* Attach framebuffer device */ - sc->info.fb_name = device_get_nameunit(sc->dev); - sc->info.fb_vbase = (intptr_t)sc->vaddr; - sc->info.fb_pbase = sc->paddr; - sc->info.fb_size = sc->fbsize; - sc->info.fb_bpp = sc->info.fb_depth = FB_BPP; - sc->info.fb_stride = mode->hdisplay * (FB_BPP / NBBY); - sc->info.fb_width = mode->hdisplay; - sc->info.fb_height = mode->vdisplay; -#ifdef VM_MEMATTR_WRITE_COMBINING - sc->info.fb_flags = FB_FLAG_MEMATTR; - sc->info.fb_memattr = VM_MEMATTR_WRITE_COMBINING; -#endif - sc->fbdev = device_add_child(sc->dev, "fbd", device_get_unit(sc->dev)); - if (sc->fbdev == NULL) { - device_printf(sc->dev, "failed to add fbd child\n"); - return (ENOENT); - } - - error = device_probe_and_attach(sc->fbdev); - if (error != 0) { - device_printf(sc->dev, "failed to attach fbd device\n"); - return (error); - } - - return (0); -} - -static int -jzlcd_get_bandwidth(const struct videomode *mode) -{ - int refresh; - - refresh = FB_DIVIDE(FB_DIVIDE(DOT_CLOCK_TO_HZ(mode->dot_clock), - mode->htotal), mode->vtotal); - - return mode->hdisplay * mode->vdisplay * refresh; -} - -static int -jzlcd_mode_supported(const struct videomode *mode) -{ - /* Width and height must be less than 2048 */ - if (mode->hdisplay > FB_MAX_W || mode->vdisplay > FB_MAX_H) - return (0); - - /* Bandwidth check */ - if (jzlcd_get_bandwidth(mode) > FB_MAX_BW) - return (0); - - /* Interlace modes not yet supported by the driver */ - if ((mode->flags & VID_INTERLACE) != 0) - return (0); - - return (1); -} - -static const struct videomode * -jzlcd_find_mode(struct edid_info *ei) -{ - const struct videomode *best; - int n, bw, best_bw; - - /* If the preferred mode is OK, just use it */ - if (jzlcd_mode_supported(ei->edid_preferred_mode) != 0) - return ei->edid_preferred_mode; - - /* Pick the mode with the highest bandwidth requirements */ - best = NULL; - best_bw = 0; - for (n = 0; n < ei->edid_nmodes; n++) { - if (jzlcd_mode_supported(&ei->edid_modes[n]) == 0) - continue; - bw = jzlcd_get_bandwidth(&ei->edid_modes[n]); - if (bw > FB_MAX_BW) - continue; - if (best == NULL || bw > best_bw) { - best = &ei->edid_modes[n]; - best_bw = bw; - } - } - - return best; -} - -static void -jzlcd_hdmi_event(void *arg, device_t hdmi_dev) -{ - const struct videomode *mode; - struct videomode hdmi_mode; - struct jzlcd_softc *sc; - struct edid_info ei; - uint8_t *edid; - uint32_t edid_len; - int error; - - sc = arg; - edid = NULL; - edid_len = 0; - mode = NULL; - - error = HDMI_GET_EDID(hdmi_dev, &edid, &edid_len); - if (error != 0) { - device_printf(sc->dev, "failed to get EDID: %d\n", error); - } else { - error = edid_parse(edid, &ei); - if (error != 0) { - device_printf(sc->dev, "failed to parse EDID: %d\n", - error); - } else { - if (bootverbose) - edid_print(&ei); - - mode = jzlcd_find_mode(&ei); - } - } - - /* If a suitable mode could not be found, try the default */ - if (mode == NULL) - mode = pick_mode_by_ref(FB_DEFAULT_W, FB_DEFAULT_H, - FB_DEFAULT_REF); - - if (mode == NULL) { - device_printf(sc->dev, "failed to find usable video mode\n"); - return; - } - - if (bootverbose) - device_printf(sc->dev, "using %dx%d\n", - mode->hdisplay, mode->vdisplay); - - /* Stop the controller */ - jzlcd_stop(sc); - - /* Configure LCD controller */ - error = jzlcd_configure(sc, mode); - if (error != 0) { - device_printf(sc->dev, "failed to configure FB: %d\n", error); - return; - } - - /* Enable HDMI TX */ - hdmi_mode = *mode; - HDMI_SET_VIDEOMODE(hdmi_dev, &hdmi_mode); - - /* Start the controller! */ - jzlcd_start(sc); -} - -static void -jzlcd_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) -{ - if (error != 0) - return; - *(bus_addr_t *)arg = segs[0].ds_addr; -} - -static int -jzlcd_probe(device_t dev) -{ - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-lcd")) - return (ENXIO); - - device_set_desc(dev, "Ingenic JZ4780 LCD Controller"); - return (BUS_PROBE_DEFAULT); -} - -static int -jzlcd_attach(device_t dev) -{ - struct jzlcd_softc *sc; - int error; - - sc = device_get_softc(dev); - - sc->dev = dev; - - if (bus_alloc_resources(dev, jzlcd_spec, sc->res)) { - device_printf(dev, "cannot allocate resources for device\n"); - goto failed; - } - - if (clk_get_by_ofw_name(dev, 0, "lcd_clk", &sc->clk) != 0 || - clk_get_by_ofw_name(dev, 0, "lcd_pixclk", &sc->clk_pix) != 0) { - device_printf(dev, "cannot get clocks\n"); - goto failed; - } - if (clk_enable(sc->clk) != 0 || clk_enable(sc->clk_pix) != 0) { - device_printf(dev, "cannot enable clocks\n"); - goto failed; - } - - error = bus_dma_tag_create( - bus_get_dma_tag(dev), - sizeof(struct lcd_frame_descriptor), 0, - BUS_SPACE_MAXADDR_32BIT, - BUS_SPACE_MAXADDR, - NULL, NULL, - sizeof(struct lcd_frame_descriptor) * 2, 1, - sizeof(struct lcd_frame_descriptor) * 2, - 0, - NULL, NULL, - &sc->fdesc_tag); - if (error != 0) { - device_printf(dev, "cannot create bus dma tag\n"); - goto failed; - } - - error = bus_dmamem_alloc(sc->fdesc_tag, (void **)&sc->fdesc, - BUS_DMA_NOCACHE | BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->fdesc_map); - if (error != 0) { - device_printf(dev, "cannot allocate dma descriptor\n"); - goto dmaalloc_failed; - } - - error = bus_dmamap_load(sc->fdesc_tag, sc->fdesc_map, sc->fdesc, - sizeof(struct lcd_frame_descriptor) * 2, jzlcd_dmamap_cb, - &sc->fdesc_paddr, 0); - if (error != 0) { - device_printf(dev, "cannot load dma map\n"); - goto dmaload_failed; - } - - sc->hdmi_evh = EVENTHANDLER_REGISTER(hdmi_event, - jzlcd_hdmi_event, sc, 0); - - return (0); - -dmaload_failed: - bus_dmamem_free(sc->fdesc_tag, sc->fdesc, sc->fdesc_map); -dmaalloc_failed: - bus_dma_tag_destroy(sc->fdesc_tag); -failed: - if (sc->clk_pix != NULL) - clk_release(sc->clk); - if (sc->clk != NULL) - clk_release(sc->clk); - if (sc->res != NULL) - bus_release_resources(dev, jzlcd_spec, sc->res); - - return (ENXIO); -} - -static struct fb_info * -jzlcd_fb_getinfo(device_t dev) -{ - struct jzlcd_softc *sc; - - sc = device_get_softc(dev); - - return (&sc->info); -} - -static device_method_t jzlcd_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, jzlcd_probe), - DEVMETHOD(device_attach, jzlcd_attach), - - /* FB interface */ - DEVMETHOD(fb_getinfo, jzlcd_fb_getinfo), - - DEVMETHOD_END -}; - -static driver_t jzlcd_driver = { - "fb", - jzlcd_methods, - sizeof(struct jzlcd_softc), -}; - -static devclass_t jzlcd_devclass; - -DRIVER_MODULE(fb, simplebus, jzlcd_driver, jzlcd_devclass, 0, 0); diff --git a/sys/mips/ingenic/jz4780_lcd.h b/sys/mips/ingenic/jz4780_lcd.h deleted file mode 100644 index db7d6d87d00..00000000000 --- a/sys/mips/ingenic/jz4780_lcd.h +++ /dev/null @@ -1,201 +0,0 @@ -/*- - * Copyright (c) 2016 Jared McNeill - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Ingenic JZ4780 LCD Controller - */ - -#ifndef __JZ4780_LCD_H__ -#define __JZ4780_LCD_H__ - -#define LCDCFG 0x0000 -#define LCDCFG_LCDPIN (1 << 31) -#define LCDCFG_TVEPEH (1 << 30) -#define LCDCFG_NEWDES (1 << 28) -#define LCDCFG_PALBP (1 << 27) -#define LCDCFG_TVEN (1 << 26) -#define LCDCFG_RECOVER (1 << 25) -#define LCDCFG_PSM (1 << 23) -#define LCDCFG_CLSM (1 << 22) -#define LCDCFG_SPLM (1 << 21) -#define LCDCFG_REVM (1 << 20) -#define LCDCFG_HSYNM (1 << 19) -#define LCDCFG_VSYNM (1 << 18) -#define LCDCFG_INVDAT (1 << 17) -#define LCDCFG_SYNDIR (1 << 16) -#define LCDCFG_PSP (1 << 15) -#define LCDCFG_CLSP (1 << 14) -#define LCDCFG_SPLP (1 << 13) -#define LCDCFG_REVP (1 << 12) -#define LCDCFG_HSP (1 << 11) -#define LCDCFG_PCP (1 << 10) -#define LCDCFG_DEP (1 << 9) -#define LCDCFG_VSP (1 << 8) -#define LCDCFG_18_16 (1 << 7) -#define LCDCFG_24 (1 << 6) -#define LCDCFG_MODE (0xf << 0) -#define LCDCTRL 0x0030 -#define LCDCTRL_PINMD (1 << 31) -#define LCDCTRL_BST (0x7 << 28) -#define LCDCTRL_BST_4 (0 << 28) -#define LCDCTRL_BST_8 (1 << 28) -#define LCDCTRL_BST_16 (2 << 28) -#define LCDCTRL_BST_32 (3 << 28) -#define LCDCTRL_BST_64 (4 << 28) -#define LCDCTRL_OUTRGB (1 << 27) -#define LCDCTRL_OFUP (1 << 26) -#define LCDCTRL_DACTE (1 << 14) -#define LCDCTRL_EOFM (1 << 13) -#define LCDCTRL_SOFM (1 << 12) -#define LCDCTRL_OFUM (1 << 11) -#define LCDCTRL_IFUM0 (1 << 10) -#define LCDCTRL_IFUM1 (1 << 9) -#define LCDCTRL_LDDM (1 << 8) -#define LCDCTRL_QDM (1 << 7) -#define LCDCTRL_BEDN (1 << 6) -#define LCDCTRL_PEDN (1 << 5) -#define LCDCTRL_DIS (1 << 4) -#define LCDCTRL_ENA (1 << 3) -#define LCDCTRL_BPP0 (0x7 << 0) -#define LCDCTRL_BPP0_1 (0 << 0) -#define LCDCTRL_BPP0_2 (1 << 0) -#define LCDCTRL_BPP0_4 (2 << 0) -#define LCDCTRL_BPP0_8 (3 << 0) -#define LCDCTRL_BPP0_15_16 (4 << 0) -#define LCDCTRL_BPP0_18_24 (5 << 0) -#define LCDCTRL_BPP0_24_COMP (6 << 0) -#define LCDCTRL_BPP0_30 (7 << 0) -#define LCDCTR -#define LCDSTATE 0x0034 -#define LCDSTATE_QD (1 << 7) -#define LCDSTATE_EOF (1 << 5) -#define LCDSTATE_SOF (1 << 4) -#define LCDSTATE_OUT (1 << 3) -#define LCDSTATE_IFU0 (1 << 2) -#define LCDSTATE_IFU1 (1 << 1) -#define LCDSTATE_LDD (1 << 0) -#define LCDOSDC 0x0100 -#define LCDOSDCTRL 0x0104 -#define LCDOSDS 0x0108 -#define LCDBGC0 0x010c -#define LCDBGC1 0x02c4 -#define LCDKEY0 0x0110 -#define LCDKEY1 0x0114 -#define LCDALPHA 0x0118 -#define LCDIPUR 0x011c -#define LCDRGBC 0x0090 -#define LCDRGBC_RGBDM (1 << 15) -#define LCDRGBC_DMM (1 << 14) -#define LCDRGBC_422 (1 << 8) -#define LCDRGBC_RGBFMT (1 << 7) -#define LCDRGBC_ODDRGB (0x7 << 4) -#define LCDRGBC_EVENRGB (0x7 << 0) -#define LCDVAT 0x000c -#define LCDVAT_HT_SHIFT 16 -#define LCDVAT_VT_SHIFT 0 -#define LCDDAH 0x0010 -#define LCDDAH_HDS_SHIFT 16 -#define LCDDAH_HDE_SHIFT 0 -#define LCDDAV 0x0014 -#define LCDDAV_VDS_SHIFT 16 -#define LCDDAV_VDE_SHIFT 0 -#define LCDXYP0 0x0120 -#define LCDXYP1 0x0124 -#define LCDSIZE0 0x0128 -#define LCDSIZE1 0x012c -#define LCDVSYNC 0x0004 -#define LCDHSYNC 0x0008 -#define LCDPS 0x0018 -#define LCDCLS 0x001c -#define LCDSPL 0x0020 -#define LCDREV 0x0024 -#define LCDIID 0x0038 -#define LCDDA0 0x0040 -#define LCDSA0 0x0044 -#define LCDFID0 0x0048 -#define LCDCMD0 0x004c -#define LCDCMD_SOFINT (1 << 31) -#define LCDCMD_EOFINT (1 << 30) -#define LCDCMD_CMD (1 << 29) -#define LCDCMD_COMPE (1 << 27) -#define LCDCMD_FRM_EN (1 << 26) -#define LCDCMD_FIELD_SEL (1 << 25) -#define LCDCMD_16X16BLOCK (1 << 24) -#define LCDCMD_LEN (0xffffff << 0) -#define LCDOFFS0 0x0060 -#define LCDPW0 0x0064 -#define LCDCNUM0 0x0068 -#define LCDPOS0 LCDCNUM0 -#define LCDPOS_ALPHAMD1 (1 << 31) -#define LCDPOS_RGB01 (1 << 30) -#define LCDPOS_BPP01 (0x7 << 27) -#define LCDPOS_BPP01_15_16 (4 << 27) -#define LCDPOS_BPP01_18_24 (5 << 27) -#define LCDPOS_BPP01_24_COMP (6 << 27) -#define LCDPOS_BPP01_30 (7 << 27) -#define LCDPOS_PREMULTI01 (1 << 26) -#define LCDPOS_COEF_SLE01 (0x3 << 24) -#define LCDPOS_COEF_BLE01_1 (1 << 24) -#define LCDPOS_YPOS01 (0xfff << 12) -#define LCDPOS_XPOS01 (0xfff << 0) -#define LCDDESSIZE0 0x006c -#define LCDDESSIZE_ALPHA (0xff << 24) -#define LCDDESSIZE_HEIGHT (0xfff << 12) -#define LCDDESSIZE_HEIGHT_SHIFT 12 -#define LCDDESSIZE_WIDTH (0xfff << 0) -#define LCDDESSIZE_WIDTH_SHIFT 0 -#define LCDDA1 0x0050 -#define LCDSA1 0x0054 -#define LCDFID1 0x0058 -#define LCDCMD1 0x005c -#define LCDOFFS1 0x0070 -#define LCDPW1 0x0074 -#define LCDCNUM1 0x0078 -#define LCDPOS1 LCDCNUM1 -#define LCDDESSIZE1 0x007c -#define LCDPCFG 0x02c0 -#define LCDDUALCTRL 0x02c8 -#define LCDENH_CFG 0x0400 -#define LCDENH_CSCCFG 0x0404 -#define LCDENH_LUMACFG 0x0408 -#define LCDENH_CHROCFG0 0x040c -#define LCDENH_CHROCFG1 0x0410 -#define LCDENH_DITHERCFG 0x0414 -#define LCDENH_STATUS 0x0418 -#define LCDENH_GAMMA 0x0800 /* base */ -#define LCDENH_VEE 0x1000 /* base */ - -struct lcd_frame_descriptor { - uint32_t next; - uint32_t physaddr; - uint32_t id; - uint32_t cmd; - uint32_t offs; - uint32_t pw; - uint32_t cnum_pos; - uint32_t dessize; -} __packed; - -#endif /* !__JZ4780_LCD_H__ */ diff --git a/sys/mips/ingenic/jz4780_machdep.c b/sys/mips/ingenic/jz4780_machdep.c deleted file mode 100644 index 5e247056059..00000000000 --- a/sys/mips/ingenic/jz4780_machdep.c +++ /dev/null @@ -1,240 +0,0 @@ -/*- - * Copyright (c) 2009 Oleksandr Tymoshenko - * Copyright (c) 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef FDT -#include -#include -#endif - -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include -#include - -#include -#include - -uint32_t * const led = (uint32_t *)0xb0010548; - -extern char edata[], end[]; -static char boot1_env[4096]; - -void -platform_cpu_init(void) -{ - uint32_t reg; - - /* - * Do not expect mbox interrups while writing - * mbox - */ - reg = mips_rd_xburst_reim(); - reg &= ~JZ_REIM_MIRQ0M; - mips_wr_xburst_reim(reg); - - /* Clean mailboxes */ - mips_wr_xburst_mbox0(0); - mips_wr_xburst_mbox1(0); - mips_wr_xburst_core_sts(~JZ_CORESTS_MIRQ0P); - - /* Unmask mbox interrupts */ - reg |= JZ_REIM_MIRQ0M; - mips_wr_xburst_reim(reg); -} - -void -platform_reset(void) -{ - /* - * For now, provoke a watchdog reset in about a second, so UART buffers - * have a fighting chance to flush before we pull the plug - */ - writereg(JZ_TCU_BASE + JZ_WDOG_TCER, 0); /* disable watchdog */ - writereg(JZ_TCU_BASE + JZ_WDOG_TCNT, 0); /* reset counter */ - writereg(JZ_TCU_BASE + JZ_WDOG_TDR, 128); /* wait for ~1s */ - writereg(JZ_TCU_BASE + JZ_WDOG_TCSR, TCSR_RTC_EN | TCSR_DIV_256); - writereg(JZ_TCU_BASE + JZ_WDOG_TCER, TCER_ENABLE); /* fire! */ - - /* Wait for reset */ - while (1) - ; -} - -static void -mips_init(void) -{ - int i; -#ifdef FDT - struct mem_region mr[FDT_MEM_REGIONS]; - uint64_t val; - int mr_cnt; - int j; -#endif - - for (i = 0; i < 10; i++) { - phys_avail[i] = 0; - } - - /* The minimal amount of memory Ingenic SoC can have. */ - dump_avail[0] = phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end); - physmem = realmem = btoc(32 * 1024 * 1024); - - /* - * X1000 mips cpu special. - * TODO: do anyone know what is this ? - */ - __asm( - "li $2, 0xa9000000 \n\t" - "mtc0 $2, $5, 4 \n\t" - "nop \n\t" - ::"r"(2)); - -#ifdef FDT - if (fdt_get_mem_regions(mr, &mr_cnt, &val) == 0) { - physmem = realmem = btoc(val); - - KASSERT((phys_avail[0] >= mr[0].mr_start) && \ - (phys_avail[0] < (mr[0].mr_start + mr[0].mr_size)), - ("First region is not within FDT memory range")); - - /* Limit size of the first region */ - phys_avail[1] = (mr[0].mr_start + MIN(mr[0].mr_size, ctob(realmem))); - dump_avail[1] = phys_avail[1]; - - /* Add the rest of regions */ - for (i = 1, j = 2; i < mr_cnt; i++, j+=2) { - phys_avail[j] = mr[i].mr_start; - phys_avail[j+1] = (mr[i].mr_start + mr[i].mr_size); - dump_avail[j] = phys_avail[j]; - dump_avail[j+1] = phys_avail[j+1]; - } - } -#endif - - init_param1(); - init_param2(physmem); - mips_cpu_init(); - pmap_bootstrap(); - mips_proc0_init(); - mutex_init(); - kdb_init(); - led[0] = 0x8000; -#ifdef KDB - if (boothowto & RB_KDB) - kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); -#endif -} - -void -platform_start(__register_t a0, __register_t a1, - __register_t a2 __unused, __register_t a3 __unused) -{ - char **argv; - int argc; - vm_offset_t kernend; -#ifdef FDT - vm_offset_t dtbp; - phandle_t chosen; - char buf[2048]; /* early stack supposedly big enough */ -#endif - /* - * clear the BSS and SBSS segments, this should be first call in - * the function - */ - kernend = (vm_offset_t)&end; - memset(&edata, 0, kernend - (vm_offset_t)(&edata)); - - mips_postboot_fixup(); - - /* Initialize pcpu stuff */ - mips_pcpu0_init(); - - /* Something to hold kernel env until kmem is available */ - init_static_kenv(boot1_env, sizeof(boot1_env)); -#ifdef FDT - /* - * Find the dtb passed in by the boot loader (currently fictional). - */ - dtbp = (vm_offset_t)NULL; - -#if defined(FDT_DTB_STATIC) - /* - * In case the device tree blob was not retrieved (from metadata) try - * to use the statically embedded one. - */ - if (dtbp == (vm_offset_t)NULL) - dtbp = (vm_offset_t)&fdt_static_dtb; -#else -#error "Non-static FDT not supported on JZ4780" -#endif - if (OF_install(OFW_FDT, 0) == FALSE) - while (1); - if (OF_init((void *)dtbp) != 0) - while (1); -#endif - - cninit(); -#ifdef FDT - /* - * Get bootargs from FDT if specified. - */ - chosen = OF_finddevice("/chosen"); - if (OF_getprop(chosen, "bootargs", buf, sizeof(buf)) != -1) - boothowto |= boot_parse_cmdline(buf); -#endif - /* Parse cmdline from U-Boot */ - argc = a0; - argv = (char **)a1; - boothowto |= boot_parse_args(argc, argv); - - mips_init(); -} diff --git a/sys/mips/ingenic/jz4780_mmc.c b/sys/mips/ingenic/jz4780_mmc.c deleted file mode 100644 index 2575ac9489e..00000000000 --- a/sys/mips/ingenic/jz4780_mmc.c +++ /dev/null @@ -1,1002 +0,0 @@ -/*- - * Copyright (c) 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include -#include - -#include -#include -#include - -#include - -#undef JZ_MMC_DEBUG - -#define JZ_MSC_MEMRES 0 -#define JZ_MSC_IRQRES 1 -#define JZ_MSC_RESSZ 2 -#define JZ_MSC_DMA_SEGS 128 -#define JZ_MSC_DMA_MAX_SIZE maxphys - -#define JZ_MSC_INT_ERR_BITS (JZ_INT_CRC_RES_ERR | JZ_INT_CRC_READ_ERR | \ - JZ_INT_CRC_WRITE_ERR | JZ_INT_TIMEOUT_RES | \ - JZ_INT_TIMEOUT_READ) -static int jz4780_mmc_pio_mode = 0; - -TUNABLE_INT("hw.jz.mmc.pio_mode", &jz4780_mmc_pio_mode); - -struct jz4780_mmc_dma_desc { - uint32_t dma_next; - uint32_t dma_phys; - uint32_t dma_len; - uint32_t dma_cmd; -}; - -struct jz4780_mmc_softc { - bus_space_handle_t sc_bsh; - bus_space_tag_t sc_bst; - device_t sc_dev; - clk_t sc_clk; - int sc_bus_busy; - int sc_resid; - int sc_timeout; - struct callout sc_timeoutc; - struct mmc_host sc_host; - struct mmc_request * sc_req; - struct mtx sc_mtx; - struct resource * sc_res[JZ_MSC_RESSZ]; - uint32_t sc_intr_seen; - uint32_t sc_intr_mask; - uint32_t sc_intr_wait; - void * sc_intrhand; - uint32_t sc_cmdat; - - /* Fields required for DMA access. */ - bus_addr_t sc_dma_desc_phys; - bus_dmamap_t sc_dma_map; - bus_dma_tag_t sc_dma_tag; - void * sc_dma_desc; - bus_dmamap_t sc_dma_buf_map; - bus_dma_tag_t sc_dma_buf_tag; - int sc_dma_inuse; - int sc_dma_map_err; - uint32_t sc_dma_ctl; -}; - -static struct resource_spec jz4780_mmc_res_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE }, - { -1, 0, 0 } -}; - -static int jz4780_mmc_probe(device_t); -static int jz4780_mmc_attach(device_t); -static int jz4780_mmc_detach(device_t); -static int jz4780_mmc_setup_dma(struct jz4780_mmc_softc *); -static int jz4780_mmc_reset(struct jz4780_mmc_softc *); -static void jz4780_mmc_intr(void *); -static int jz4780_mmc_enable_clock(struct jz4780_mmc_softc *); -static int jz4780_mmc_config_clock(struct jz4780_mmc_softc *, uint32_t); - -static int jz4780_mmc_update_ios(device_t, device_t); -static int jz4780_mmc_request(device_t, device_t, struct mmc_request *); -static int jz4780_mmc_get_ro(device_t, device_t); -static int jz4780_mmc_acquire_host(device_t, device_t); -static int jz4780_mmc_release_host(device_t, device_t); - -#define JZ_MMC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) -#define JZ_MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) -#define JZ_MMC_READ_2(_sc, _reg) \ - bus_space_read_2((_sc)->sc_bst, (_sc)->sc_bsh, _reg) -#define JZ_MMC_WRITE_2(_sc, _reg, _value) \ - bus_space_write_2((_sc)->sc_bst, (_sc)->sc_bsh, _reg, _value) -#define JZ_MMC_READ_4(_sc, _reg) \ - bus_space_read_4((_sc)->sc_bst, (_sc)->sc_bsh, _reg) -#define JZ_MMC_WRITE_4(_sc, _reg, _value) \ - bus_space_write_4((_sc)->sc_bst, (_sc)->sc_bsh, _reg, _value) - -static int -jz4780_mmc_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-mmc")) - return (ENXIO); - if (device_get_unit(dev) > 0) /* XXXKAN */ - return (ENXIO); - device_set_desc(dev, "Ingenic JZ4780 Integrated MMC/SD controller"); - - return (BUS_PROBE_DEFAULT); -} - -static int -jz4780_mmc_attach(device_t dev) -{ - struct jz4780_mmc_softc *sc; - struct sysctl_ctx_list *ctx; - struct sysctl_oid_list *tree; - device_t child; - ssize_t len; - pcell_t prop; - phandle_t node; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - sc->sc_req = NULL; - if (bus_alloc_resources(dev, jz4780_mmc_res_spec, sc->sc_res) != 0) { - device_printf(dev, "cannot allocate device resources\n"); - return (ENXIO); - } - sc->sc_bst = rman_get_bustag(sc->sc_res[JZ_MSC_MEMRES]); - sc->sc_bsh = rman_get_bushandle(sc->sc_res[JZ_MSC_MEMRES]); - if (bus_setup_intr(dev, sc->sc_res[JZ_MSC_IRQRES], - INTR_TYPE_MISC | INTR_MPSAFE, NULL, jz4780_mmc_intr, sc, - &sc->sc_intrhand)) { - bus_release_resources(dev, jz4780_mmc_res_spec, sc->sc_res); - device_printf(dev, "cannot setup interrupt handler\n"); - return (ENXIO); - } - sc->sc_timeout = 10; - ctx = device_get_sysctl_ctx(dev); - tree = SYSCTL_CHILDREN(device_get_sysctl_tree(dev)); - SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "req_timeout", CTLFLAG_RW, - &sc->sc_timeout, 0, "Request timeout in seconds"); - mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), "jz4780_mmc", - MTX_DEF); - callout_init_mtx(&sc->sc_timeoutc, &sc->sc_mtx, 0); - - /* Reset controller. */ - if (jz4780_mmc_reset(sc) != 0) { - device_printf(dev, "cannot reset the controller\n"); - goto fail; - } - if (jz4780_mmc_pio_mode == 0 && jz4780_mmc_setup_dma(sc) != 0) { - device_printf(sc->sc_dev, "Couldn't setup DMA!\n"); - jz4780_mmc_pio_mode = 1; - } - if (bootverbose) - device_printf(sc->sc_dev, "DMA status: %s\n", - jz4780_mmc_pio_mode ? "disabled" : "enabled"); - - node = ofw_bus_get_node(dev); - /* Determine max operating frequency */ - sc->sc_host.f_max = 24000000; - len = OF_getencprop(node, "max-frequency", &prop, sizeof(prop)); - if (len / sizeof(prop) == 1) - sc->sc_host.f_max = prop; - sc->sc_host.f_min = sc->sc_host.f_max / 128; - - sc->sc_host.host_ocr = MMC_OCR_320_330 | MMC_OCR_330_340; - sc->sc_host.caps = MMC_CAP_HSPEED; - sc->sc_host.mode = mode_sd; - /* - * Check for bus-width property, default to both 4 and 8 bit - * if no bus width is specified. - */ - len = OF_getencprop(node, "bus-width", &prop, sizeof(prop)); - if (len / sizeof(prop) != 1) - sc->sc_host.caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA; - else if (prop == 8) - sc->sc_host.caps |= MMC_CAP_8_BIT_DATA; - else if (prop == 4) - sc->sc_host.caps |= MMC_CAP_4_BIT_DATA; - /* Activate the module clock. */ - if (jz4780_mmc_enable_clock(sc) != 0) { - device_printf(dev, "cannot activate mmc clock\n"); - goto fail; - } - - child = device_add_child(dev, "mmc", -1); - if (child == NULL) { - device_printf(dev, "attaching MMC bus failed!\n"); - goto fail; - } - if (device_probe_and_attach(child) != 0) { - device_printf(dev, "attaching MMC child failed!\n"); - device_delete_child(dev, child); - goto fail; - } - - return (0); - -fail: - callout_drain(&sc->sc_timeoutc); - mtx_destroy(&sc->sc_mtx); - bus_teardown_intr(dev, sc->sc_res[JZ_MSC_IRQRES], sc->sc_intrhand); - bus_release_resources(dev, jz4780_mmc_res_spec, sc->sc_res); - if (sc->sc_clk != NULL) - clk_release(sc->sc_clk); - return (ENXIO); -} - -static int -jz4780_mmc_detach(device_t dev) -{ - - return (EBUSY); -} - -static int -jz4780_mmc_enable_clock(struct jz4780_mmc_softc *sc) -{ - int err; - - err = clk_get_by_ofw_name(sc->sc_dev, 0, "mmc", &sc->sc_clk); - if (err == 0) - err = clk_enable(sc->sc_clk); - if (err == 0) - err = clk_set_freq(sc->sc_clk, sc->sc_host.f_max, 0); - if (err != 0) - clk_release(sc->sc_clk); - return (err); -} - -static void -jz4780_mmc_dma_desc_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int err) -{ - struct jz4780_mmc_softc *sc; - - sc = (struct jz4780_mmc_softc *)arg; - if (err) { - sc->sc_dma_map_err = err; - return; - } - sc->sc_dma_desc_phys = segs[0].ds_addr; -} - -static int -jz4780_mmc_setup_dma(struct jz4780_mmc_softc *sc) -{ - int dma_desc_size, error; - - /* Allocate the DMA descriptor memory. */ - dma_desc_size = sizeof(struct jz4780_mmc_dma_desc) * JZ_MSC_DMA_SEGS; - error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, - BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, - dma_desc_size, 1, dma_desc_size, 0, NULL, NULL, &sc->sc_dma_tag); - if (error) - return (error); - error = bus_dmamem_alloc(sc->sc_dma_tag, &sc->sc_dma_desc, - BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->sc_dma_map); - if (error) - return (error); - - error = bus_dmamap_load(sc->sc_dma_tag, sc->sc_dma_map, - sc->sc_dma_desc, dma_desc_size, jz4780_mmc_dma_desc_cb, sc, 0); - if (error) - return (error); - if (sc->sc_dma_map_err) - return (sc->sc_dma_map_err); - - /* Create the DMA map for data transfers. */ - error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0, - BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, - JZ_MSC_DMA_MAX_SIZE * JZ_MSC_DMA_SEGS, JZ_MSC_DMA_SEGS, - JZ_MSC_DMA_MAX_SIZE, BUS_DMA_ALLOCNOW, NULL, NULL, - &sc->sc_dma_buf_tag); - if (error) - return (error); - error = bus_dmamap_create(sc->sc_dma_buf_tag, 0, - &sc->sc_dma_buf_map); - if (error) - return (error); - - return (0); -} - -static void -jz4780_mmc_dma_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int err) -{ - struct jz4780_mmc_dma_desc *dma_desc; - struct jz4780_mmc_softc *sc; - uint32_t dma_desc_phys; - int i; - - sc = (struct jz4780_mmc_softc *)arg; - sc->sc_dma_map_err = err; - dma_desc = sc->sc_dma_desc; - dma_desc_phys = sc->sc_dma_desc_phys; - - /* Note nsegs is guaranteed to be zero if err is non-zero. */ - for (i = 0; i < nsegs; i++) { - dma_desc[i].dma_phys = segs[i].ds_addr; - dma_desc[i].dma_len = segs[i].ds_len; - if (i < (nsegs - 1)) { - dma_desc_phys += sizeof(struct jz4780_mmc_dma_desc); - dma_desc[i].dma_next = dma_desc_phys; - dma_desc[i].dma_cmd = (i << 16) | JZ_DMA_LINK; - } else { - dma_desc[i].dma_next = 0; - dma_desc[i].dma_cmd = (i << 16) | JZ_DMA_ENDI; - } -#ifdef JZ_MMC_DEBUG - device_printf(sc->sc_dev, "%d: desc %#x phys %#x len %d next %#x cmd %#x\n", - i, dma_desc_phys - sizeof(struct jz4780_mmc_dma_desc), - dma_desc[i].dma_phys, dma_desc[i].dma_len, - dma_desc[i].dma_next, dma_desc[i].dma_cmd); -#endif - } -} - -static int -jz4780_mmc_prepare_dma(struct jz4780_mmc_softc *sc) -{ - bus_dmasync_op_t sync_op; - int error; - struct mmc_command *cmd; - uint32_t off; - - cmd = sc->sc_req->cmd; - if (cmd->data->len > JZ_MSC_DMA_MAX_SIZE * JZ_MSC_DMA_SEGS) - return (EFBIG); - error = bus_dmamap_load(sc->sc_dma_buf_tag, sc->sc_dma_buf_map, - cmd->data->data, cmd->data->len, jz4780_mmc_dma_cb, sc, - BUS_DMA_NOWAIT); - if (error) - return (error); - if (sc->sc_dma_map_err) - return (sc->sc_dma_map_err); - - sc->sc_dma_inuse = 1; - if (cmd->data->flags & MMC_DATA_WRITE) - sync_op = BUS_DMASYNC_PREWRITE; - else - sync_op = BUS_DMASYNC_PREREAD; - bus_dmamap_sync(sc->sc_dma_buf_tag, sc->sc_dma_buf_map, sync_op); - bus_dmamap_sync(sc->sc_dma_tag, sc->sc_dma_map, BUS_DMASYNC_PREWRITE); - - /* Configure default DMA parameters */ - sc->sc_dma_ctl = JZ_MODE_SEL | JZ_INCR_64 | JZ_DMAEN; - - /* Enable unaligned buffer handling */ - off = (uintptr_t)cmd->data->data & 3; - if (off != 0) - sc->sc_dma_ctl |= (off << JZ_AOFST_S) | JZ_ALIGNEN; - return (0); -} - -static void -jz4780_mmc_start_dma(struct jz4780_mmc_softc *sc) -{ - - /* Set the address of the first descriptor */ - JZ_MMC_WRITE_4(sc, JZ_MSC_DMANDA, sc->sc_dma_desc_phys); - /* Enable and start the dma engine */ - JZ_MMC_WRITE_4(sc, JZ_MSC_DMAC, sc->sc_dma_ctl); -} - -static int -jz4780_mmc_reset(struct jz4780_mmc_softc *sc) -{ - int timeout; - - /* Stop the clock */ - JZ_MMC_WRITE_4(sc, JZ_MSC_CTRL, JZ_CLOCK_STOP); - - timeout = 1000; - while (--timeout > 0) { - if ((JZ_MMC_READ_4(sc, JZ_MSC_STAT) & JZ_CLK_EN) == 0) - break; - DELAY(100); - } - if (timeout == 0) { - device_printf(sc->sc_dev, "Failed to stop clk.\n"); - return (ETIMEDOUT); - } - - /* Reset */ - JZ_MMC_WRITE_4(sc, JZ_MSC_CTRL, JZ_RESET); - - timeout = 10; - while (--timeout > 0) { - if ((JZ_MMC_READ_4(sc, JZ_MSC_STAT) & JZ_IS_RESETTING) == 0) - break; - DELAY(1000); - } - - if (timeout == 0) { - /* - * X1000 never clears reseting bit. - * Ignore for now. - */ - } - - /* Set the timeouts. */ - JZ_MMC_WRITE_4(sc, JZ_MSC_RESTO, 0xffff); - JZ_MMC_WRITE_4(sc, JZ_MSC_RDTO, 0xffffffff); - - /* Mask all interrupt initially */ - JZ_MMC_WRITE_4(sc, JZ_MSC_IMASK, 0xffffffff); - /* Clear pending interrupts. */ - JZ_MMC_WRITE_4(sc, JZ_MSC_IFLG, 0xffffffff); - - /* Remember interrupts we always want */ - sc->sc_intr_mask = JZ_MSC_INT_ERR_BITS; - - return (0); -} - -static void -jz4780_mmc_req_done(struct jz4780_mmc_softc *sc) -{ - struct mmc_command *cmd; - struct mmc_request *req; - bus_dmasync_op_t sync_op; - - cmd = sc->sc_req->cmd; - /* Reset the controller in case of errors */ - if (cmd->error != MMC_ERR_NONE) - jz4780_mmc_reset(sc); - /* Unmap DMA if necessary */ - if (sc->sc_dma_inuse == 1) { - if (cmd->data->flags & MMC_DATA_WRITE) - sync_op = BUS_DMASYNC_POSTWRITE; - else - sync_op = BUS_DMASYNC_POSTREAD; - bus_dmamap_sync(sc->sc_dma_buf_tag, sc->sc_dma_buf_map, - sync_op); - bus_dmamap_sync(sc->sc_dma_tag, sc->sc_dma_map, - BUS_DMASYNC_POSTWRITE); - bus_dmamap_unload(sc->sc_dma_buf_tag, sc->sc_dma_buf_map); - } - req = sc->sc_req; - callout_stop(&sc->sc_timeoutc); - sc->sc_req = NULL; - sc->sc_resid = 0; - sc->sc_dma_inuse = 0; - sc->sc_dma_map_err = 0; - sc->sc_intr_wait = 0; - sc->sc_intr_seen = 0; - req->done(req); -} - -static void -jz4780_mmc_read_response(struct jz4780_mmc_softc *sc) -{ - struct mmc_command *cmd; - int i; - - cmd = sc->sc_req->cmd; - if (cmd->flags & MMC_RSP_PRESENT) { - if (cmd->flags & MMC_RSP_136) { - uint16_t val; - - val = JZ_MMC_READ_2(sc, JZ_MSC_RES); - for (i = 0; i < 4; i++) { - cmd->resp[i] = val << 24; - val = JZ_MMC_READ_2(sc, JZ_MSC_RES); - cmd->resp[i] |= val << 8; - val = JZ_MMC_READ_2(sc, JZ_MSC_RES); - cmd->resp[i] |= val >> 8; - } - } else { - cmd->resp[0] = JZ_MMC_READ_2(sc, JZ_MSC_RES) << 24; - cmd->resp[0] |= JZ_MMC_READ_2(sc, JZ_MSC_RES) << 8; - cmd->resp[0] |= JZ_MMC_READ_2(sc, JZ_MSC_RES) & 0xff; - } - } -} - -static void -jz4780_mmc_req_ok(struct jz4780_mmc_softc *sc) -{ - struct mmc_command *cmd; - - cmd = sc->sc_req->cmd; - /* All data has been transferred ? */ - if (cmd->data != NULL && (sc->sc_resid << 2) < cmd->data->len) - cmd->error = MMC_ERR_FAILED; - jz4780_mmc_req_done(sc); -} - -static void -jz4780_mmc_timeout(void *arg) -{ - struct jz4780_mmc_softc *sc; - - sc = (struct jz4780_mmc_softc *)arg; - if (sc->sc_req != NULL) { - device_printf(sc->sc_dev, "controller timeout, rint %#x stat %#x\n", - JZ_MMC_READ_4(sc, JZ_MSC_IFLG), JZ_MMC_READ_4(sc, JZ_MSC_STAT)); - sc->sc_req->cmd->error = MMC_ERR_TIMEOUT; - jz4780_mmc_req_done(sc); - } else - device_printf(sc->sc_dev, - "Spurious timeout - no active request\n"); -} - -static int -jz4780_mmc_pio_transfer(struct jz4780_mmc_softc *sc, struct mmc_data *data) -{ - uint32_t mask, *buf; - int i, write; - - buf = (uint32_t *)data->data; - write = (data->flags & MMC_DATA_WRITE) ? 1 : 0; - mask = write ? JZ_DATA_FIFO_FULL : JZ_DATA_FIFO_EMPTY; - for (i = sc->sc_resid; i < (data->len >> 2); i++) { - if ((JZ_MMC_READ_4(sc, JZ_MSC_STAT) & mask)) - return (1); - if (write) - JZ_MMC_WRITE_4(sc, JZ_MSC_TXFIFO, buf[i]); - else - buf[i] = JZ_MMC_READ_4(sc, JZ_MSC_RXFIFO); - sc->sc_resid = i + 1; - } - - /* Done with pio transfer, shut FIFO interrupts down */ - mask = JZ_MMC_READ_4(sc, JZ_MSC_IMASK); - mask |= (JZ_INT_TXFIFO_WR_REQ | JZ_INT_RXFIFO_RD_REQ); - JZ_MMC_WRITE_4(sc, JZ_MSC_IMASK, mask); - return (0); -} - -static void -jz4780_mmc_intr(void *arg) -{ - struct jz4780_mmc_softc *sc; - struct mmc_data *data; - uint32_t rint; - - sc = (struct jz4780_mmc_softc *)arg; - JZ_MMC_LOCK(sc); - rint = JZ_MMC_READ_4(sc, JZ_MSC_IFLG); -#if defined(JZ_MMC_DEBUG) - device_printf(sc->sc_dev, "rint: %#x, stat: %#x\n", - rint, JZ_MMC_READ_4(sc, JZ_MSC_STAT)); - if (sc->sc_dma_inuse == 1 && (sc->sc_intr_seen & JZ_INT_DMAEND) == 0) - device_printf(sc->sc_dev, "\tdmada %#x dmanext %#x dmac %#x" - " dmalen %d dmacmd %#x\n", - JZ_MMC_READ_4(sc, JZ_MSC_DMADA), - JZ_MMC_READ_4(sc, JZ_MSC_DMANDA), - JZ_MMC_READ_4(sc, JZ_MSC_DMAC), - JZ_MMC_READ_4(sc, JZ_MSC_DMALEN), - JZ_MMC_READ_4(sc, JZ_MSC_DMACMD)); -#endif - if (sc->sc_req == NULL) { - device_printf(sc->sc_dev, - "Spurious interrupt - no active request, rint: 0x%08X\n", - rint); - goto end; - } - if (rint & JZ_MSC_INT_ERR_BITS) { -#if defined(JZ_MMC_DEBUG) - device_printf(sc->sc_dev, "controller error, rint %#x stat %#x\n", - rint, JZ_MMC_READ_4(sc, JZ_MSC_STAT)); -#endif - if (rint & (JZ_INT_TIMEOUT_RES | JZ_INT_TIMEOUT_READ)) - sc->sc_req->cmd->error = MMC_ERR_TIMEOUT; - else - sc->sc_req->cmd->error = MMC_ERR_FAILED; - jz4780_mmc_req_done(sc); - goto end; - } - data = sc->sc_req->cmd->data; - /* Check for command response */ - if (rint & JZ_INT_END_CMD_RES) { - jz4780_mmc_read_response(sc); - if (sc->sc_dma_inuse == 1) - jz4780_mmc_start_dma(sc); - } - if (data != NULL) { - if (sc->sc_dma_inuse == 1 && (rint & JZ_INT_DMAEND)) - sc->sc_resid = data->len >> 2; - else if (sc->sc_dma_inuse == 0 && - (rint & (JZ_INT_TXFIFO_WR_REQ | JZ_INT_RXFIFO_RD_REQ))) - jz4780_mmc_pio_transfer(sc, data); - } - sc->sc_intr_seen |= rint; - if ((sc->sc_intr_seen & sc->sc_intr_wait) == sc->sc_intr_wait) - jz4780_mmc_req_ok(sc); -end: - JZ_MMC_WRITE_4(sc, JZ_MSC_IFLG, rint); - JZ_MMC_UNLOCK(sc); -} - -static int -jz4780_mmc_request(device_t bus, device_t child, struct mmc_request *req) -{ - struct jz4780_mmc_softc *sc; - struct mmc_command *cmd; - uint32_t cmdat, iwait; - int blksz; - - sc = device_get_softc(bus); - JZ_MMC_LOCK(sc); - if (sc->sc_req != NULL) { - JZ_MMC_UNLOCK(sc); - return (EBUSY); - } - /* Start with template value */ - cmdat = sc->sc_cmdat; - iwait = JZ_INT_END_CMD_RES; - - /* Configure response format */ - cmd = req->cmd; - switch (MMC_RSP(cmd->flags)) { - case MMC_RSP_R1: - case MMC_RSP_R1B: - cmdat |= JZ_RES_R1; - break; - case MMC_RSP_R2: - cmdat |= JZ_RES_R2; - break; - case MMC_RSP_R3: - cmdat |= JZ_RES_R3; - break; - }; - if (cmd->opcode == MMC_GO_IDLE_STATE) - cmdat |= JZ_INIT; - if (cmd->flags & MMC_RSP_BUSY) { - cmdat |= JZ_BUSY; - iwait |= JZ_INT_PRG_DONE; - } - - sc->sc_req = req; - sc->sc_resid = 0; - cmd->error = MMC_ERR_NONE; - - if (cmd->data != NULL) { - cmdat |= JZ_DATA_EN; - if (cmd->data->flags & MMC_DATA_MULTI) { - cmdat |= JZ_AUTO_CMD12; - iwait |= JZ_INT_AUTO_CMD12_DONE; - } - if (cmd->data->flags & MMC_DATA_WRITE) { - cmdat |= JZ_WRITE; - iwait |= JZ_INT_PRG_DONE; - } - if (cmd->data->flags & MMC_DATA_STREAM) - cmdat |= JZ_STREAM; - else - iwait |= JZ_INT_DATA_TRAN_DONE; - - blksz = min(cmd->data->len, MMC_SECTOR_SIZE); - JZ_MMC_WRITE_4(sc, JZ_MSC_BLKLEN, blksz); - JZ_MMC_WRITE_4(sc, JZ_MSC_NOB, cmd->data->len / blksz); - - /* Attempt to setup DMA for this transaction */ - if (jz4780_mmc_pio_mode == 0) - jz4780_mmc_prepare_dma(sc); - if (sc->sc_dma_inuse != 0) { - /* Wait for DMA completion interrupt */ - iwait |= JZ_INT_DMAEND; - } else { - iwait |= (cmd->data->flags & MMC_DATA_WRITE) ? - JZ_INT_TXFIFO_WR_REQ : JZ_INT_RXFIFO_RD_REQ; - JZ_MMC_WRITE_4(sc, JZ_MSC_DMAC, 0); - } - } - - sc->sc_intr_seen = 0; - sc->sc_intr_wait = iwait; - JZ_MMC_WRITE_4(sc, JZ_MSC_IMASK, ~(sc->sc_intr_mask | iwait)); - -#if defined(JZ_MMC_DEBUG) - device_printf(sc->sc_dev, - "REQUEST: CMD%u arg %#x flags %#x cmdat %#x sc_intr_wait = %#x\n", - cmd->opcode, cmd->arg, cmd->flags, cmdat, sc->sc_intr_wait); -#endif - - JZ_MMC_WRITE_4(sc, JZ_MSC_ARG, cmd->arg); - JZ_MMC_WRITE_4(sc, JZ_MSC_CMD, cmd->opcode); - JZ_MMC_WRITE_4(sc, JZ_MSC_CMDAT, cmdat); - - JZ_MMC_WRITE_4(sc, JZ_MSC_CTRL, JZ_START_OP | JZ_CLOCK_START); - - callout_reset(&sc->sc_timeoutc, sc->sc_timeout * hz, - jz4780_mmc_timeout, sc); - JZ_MMC_UNLOCK(sc); - - return (0); -} - -static int -jz4780_mmc_read_ivar(device_t bus, device_t child, int which, - uintptr_t *result) -{ - struct jz4780_mmc_softc *sc; - - sc = device_get_softc(bus); - switch (which) { - default: - return (EINVAL); - case MMCBR_IVAR_BUS_MODE: - *(int *)result = sc->sc_host.ios.bus_mode; - break; - case MMCBR_IVAR_BUS_WIDTH: - *(int *)result = sc->sc_host.ios.bus_width; - break; - case MMCBR_IVAR_CHIP_SELECT: - *(int *)result = sc->sc_host.ios.chip_select; - break; - case MMCBR_IVAR_CLOCK: - *(int *)result = sc->sc_host.ios.clock; - break; - case MMCBR_IVAR_F_MIN: - *(int *)result = sc->sc_host.f_min; - break; - case MMCBR_IVAR_F_MAX: - *(int *)result = sc->sc_host.f_max; - break; - case MMCBR_IVAR_HOST_OCR: - *(int *)result = sc->sc_host.host_ocr; - break; - case MMCBR_IVAR_MODE: - *(int *)result = sc->sc_host.mode; - break; - case MMCBR_IVAR_OCR: - *(int *)result = sc->sc_host.ocr; - break; - case MMCBR_IVAR_POWER_MODE: - *(int *)result = sc->sc_host.ios.power_mode; - break; - case MMCBR_IVAR_RETUNE_REQ: - *(int *)result = retune_req_none; - break; - case MMCBR_IVAR_VDD: - *(int *)result = sc->sc_host.ios.vdd; - break; - case MMCBR_IVAR_VCCQ: - *result = sc->sc_host.ios.vccq; - break; - case MMCBR_IVAR_CAPS: - *(int *)result = sc->sc_host.caps; - break; - case MMCBR_IVAR_TIMING: - *(int *)result = sc->sc_host.ios.timing; - break; - case MMCBR_IVAR_MAX_DATA: - *(int *)result = 65535; - break; - case MMCBR_IVAR_MAX_BUSY_TIMEOUT: - *(int *)result = 1000000; /* 1s max */ - break; - } - - return (0); -} - -static int -jz4780_mmc_write_ivar(device_t bus, device_t child, int which, - uintptr_t value) -{ - struct jz4780_mmc_softc *sc; - - sc = device_get_softc(bus); - switch (which) { - default: - return (EINVAL); - case MMCBR_IVAR_BUS_MODE: - sc->sc_host.ios.bus_mode = value; - break; - case MMCBR_IVAR_BUS_WIDTH: - sc->sc_host.ios.bus_width = value; - break; - case MMCBR_IVAR_CHIP_SELECT: - sc->sc_host.ios.chip_select = value; - break; - case MMCBR_IVAR_CLOCK: - sc->sc_host.ios.clock = value; - break; - case MMCBR_IVAR_MODE: - sc->sc_host.mode = value; - break; - case MMCBR_IVAR_OCR: - sc->sc_host.ocr = value; - break; - case MMCBR_IVAR_POWER_MODE: - sc->sc_host.ios.power_mode = value; - break; - case MMCBR_IVAR_VDD: - sc->sc_host.ios.vdd = value; - break; - case MMCBR_IVAR_VCCQ: - sc->sc_host.ios.vccq = value; - break; - case MMCBR_IVAR_TIMING: - sc->sc_host.ios.timing = value; - break; - /* These are read-only */ - case MMCBR_IVAR_CAPS: - case MMCBR_IVAR_HOST_OCR: - case MMCBR_IVAR_F_MIN: - case MMCBR_IVAR_F_MAX: - case MMCBR_IVAR_MAX_DATA: - return (EINVAL); - } - - return (0); -} - -static int -jz4780_mmc_disable_clock(struct jz4780_mmc_softc *sc) -{ - int timeout; - - JZ_MMC_WRITE_4(sc, JZ_MSC_CTRL, JZ_CLOCK_STOP); - - for (timeout = 1000; timeout > 0; timeout--) - if ((JZ_MMC_READ_4(sc, JZ_MSC_STAT) & JZ_CLK_EN) == 0) - return (0); - return (ETIMEDOUT); -} - -static int -jz4780_mmc_config_clock(struct jz4780_mmc_softc *sc, uint32_t freq) -{ - uint64_t rate; - uint32_t clk_freq; - int err, div; - - err = jz4780_mmc_disable_clock(sc); - if (err != 0) - return (err); - - clk_get_freq(sc->sc_clk, &rate); - clk_freq = (uint32_t)rate; - - div = 0; - while (clk_freq > freq) { - div++; - clk_freq >>= 1; - } - if (div >= 7) - div = 7; -#if defined(JZ_MMC_DEBUG) - if (div != JZ_MMC_READ_4(sc, JZ_MSC_CLKRT)) - device_printf(sc->sc_dev, - "UPDATE_IOS: clk -> %u\n", clk_freq); -#endif - JZ_MMC_WRITE_4(sc, JZ_MSC_CLKRT, div); - return (0); -} - -static int -jz4780_mmc_update_ios(device_t bus, device_t child) -{ - struct jz4780_mmc_softc *sc; - struct mmc_ios *ios; - int error; - - sc = device_get_softc(bus); - ios = &sc->sc_host.ios; - if (ios->clock) { - /* Set the MMC clock. */ - error = jz4780_mmc_config_clock(sc, ios->clock); - if (error != 0) - return (error); - } - - /* Set the bus width. */ - switch (ios->bus_width) { - case bus_width_1: - sc->sc_cmdat &= ~(JZ_BUS_WIDTH_M); - sc->sc_cmdat |= JZ_BUS_1BIT; - break; - case bus_width_4: - sc->sc_cmdat &= ~(JZ_BUS_WIDTH_M); - sc->sc_cmdat |= JZ_BUS_4BIT; - break; - case bus_width_8: - sc->sc_cmdat &= ~(JZ_BUS_WIDTH_M); - sc->sc_cmdat |= JZ_BUS_8BIT; - break; - } - return (0); -} - -static int -jz4780_mmc_get_ro(device_t bus, device_t child) -{ - - return (0); -} - -static int -jz4780_mmc_acquire_host(device_t bus, device_t child) -{ - struct jz4780_mmc_softc *sc; - int error; - - sc = device_get_softc(bus); - JZ_MMC_LOCK(sc); - while (sc->sc_bus_busy) { - error = msleep(sc, &sc->sc_mtx, PCATCH, "mmchw", 0); - if (error != 0) { - JZ_MMC_UNLOCK(sc); - return (error); - } - } - sc->sc_bus_busy++; - JZ_MMC_UNLOCK(sc); - - return (0); -} - -static int -jz4780_mmc_release_host(device_t bus, device_t child) -{ - struct jz4780_mmc_softc *sc; - - sc = device_get_softc(bus); - JZ_MMC_LOCK(sc); - sc->sc_bus_busy--; - wakeup(sc); - JZ_MMC_UNLOCK(sc); - - return (0); -} - -static device_method_t jz4780_mmc_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, jz4780_mmc_probe), - DEVMETHOD(device_attach, jz4780_mmc_attach), - DEVMETHOD(device_detach, jz4780_mmc_detach), - - /* Bus interface */ - DEVMETHOD(bus_read_ivar, jz4780_mmc_read_ivar), - DEVMETHOD(bus_write_ivar, jz4780_mmc_write_ivar), - - /* MMC bridge interface */ - DEVMETHOD(mmcbr_update_ios, jz4780_mmc_update_ios), - DEVMETHOD(mmcbr_request, jz4780_mmc_request), - DEVMETHOD(mmcbr_get_ro, jz4780_mmc_get_ro), - DEVMETHOD(mmcbr_acquire_host, jz4780_mmc_acquire_host), - DEVMETHOD(mmcbr_release_host, jz4780_mmc_release_host), - - DEVMETHOD_END -}; - -static devclass_t jz4780_mmc_devclass; - -static driver_t jz4780_mmc_driver = { - "jzmmc", - jz4780_mmc_methods, - sizeof(struct jz4780_mmc_softc), -}; - -DRIVER_MODULE(jzmmc, simplebus, jz4780_mmc_driver, jz4780_mmc_devclass, NULL, - NULL); -MMC_DECLARE_BRIDGE(jzmmc); diff --git a/sys/mips/ingenic/jz4780_mp.c b/sys/mips/ingenic/jz4780_mp.c deleted file mode 100644 index 0df5fd4d74a..00000000000 --- a/sys/mips/ingenic/jz4780_mp.c +++ /dev/null @@ -1,178 +0,0 @@ -/*- - * Copyright (c) 2015 Alexander Kabaev - * Copyright (c) 2004-2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include - -void jz4780_mpentry(void); - -#define JZ4780_MAXCPU 2 - -void -platform_ipi_send(int cpuid) -{ - - if (cpuid == 0) - mips_wr_xburst_mbox0(1); - else - mips_wr_xburst_mbox1(1); -} - -void -platform_ipi_clear(void) -{ - int cpuid = PCPU_GET(cpuid); - uint32_t action; - - action = (cpuid == 0) ? mips_rd_xburst_mbox0() : mips_rd_xburst_mbox1(); - KASSERT(action == 1, ("CPU %d: unexpected IPIs: %#x", cpuid, action)); - mips_wr_xburst_core_sts(~(JZ_CORESTS_MIRQ0P << cpuid)); -} - -int -platform_processor_id(void) -{ - - return (mips_rd_ebase() & 7); -} - -int -platform_ipi_hardintr_num(void) -{ - - return (1); -} - -int -platform_ipi_softintr_num(void) -{ - - return (-1); -} - -void -platform_init_ap(int cpuid) -{ - unsigned reg; - - /* - * Clear any pending IPIs. - */ - mips_wr_xburst_core_sts(~(JZ_CORESTS_MIRQ0P << cpuid)); - - /* Allow IPI mbox for this core */ - reg = mips_rd_xburst_reim(); - reg |= (JZ_REIM_MIRQ0M << cpuid); - mips_wr_xburst_reim(reg); - - /* - * Unmask the ipi interrupts. - */ - reg = hard_int_mask(platform_ipi_hardintr_num()); - set_intr_mask(reg); -} - -void -platform_cpu_mask(cpuset_t *mask) -{ - uint32_t i, m; - - CPU_ZERO(mask); - for (i = 0, m = 1 ; i < JZ4780_MAXCPU; i++, m <<= 1) - CPU_SET(i, mask); -} - -struct cpu_group * -platform_smp_topo(void) -{ - return (smp_topo_none()); -} - -static void -jz4780_core_powerup(void) -{ - uint32_t reg; - - reg = readreg(JZ_CGU_BASE + JZ_LPCR); - reg &= ~LPCR_PD_SCPU; - writereg(JZ_CGU_BASE + JZ_LPCR, reg); - do { - reg = readreg(JZ_CGU_BASE + JZ_LPCR); - } while ((reg & LPCR_SCPUS) != 0); -} - -/* - * Spin up the second code. The code is roughly modeled after - * similar routine in Linux. - */ -int -platform_start_ap(int cpuid) -{ - uint32_t reg, addr; - - if (cpuid >= JZ4780_MAXCPU) - return (EINVAL); - - /* Figure out address of mpentry in KSEG1 */ - addr = MIPS_PHYS_TO_KSEG1(MIPS_KSEG0_TO_PHYS(jz4780_mpentry)); - KASSERT((addr & ~JZ_REIM_ENTRY_MASK) == 0, - ("Unaligned mpentry")); - - /* Configure core alternative entry point */ - reg = mips_rd_xburst_reim(); - reg &= ~JZ_REIM_ENTRY_MASK; - reg |= addr & JZ_REIM_ENTRY_MASK; - - /* Allow this core to get IPIs from one being started */ - reg |= JZ_REIM_MIRQ0M; - mips_wr_xburst_reim(reg); - - /* Force core into reset and enable use of alternate entry point */ - reg = mips_rd_xburst_core_ctl(); - reg |= (JZ_CORECTL_SWRST0 << cpuid) | (JZ_CORECTL_RPC0 << cpuid); - mips_wr_xburst_core_ctl(reg); - - /* Power the core up */ - jz4780_core_powerup(); - - /* Take the core out of reset */ - reg &= ~(JZ_CORECTL_SWRST0 << cpuid); - mips_wr_xburst_core_ctl(reg); - - return (0); -} diff --git a/sys/mips/ingenic/jz4780_mpboot.S b/sys/mips/ingenic/jz4780_mpboot.S deleted file mode 100644 index 67caf69a8fa..00000000000 --- a/sys/mips/ingenic/jz4780_mpboot.S +++ /dev/null @@ -1,43 +0,0 @@ -/*- - * Copyright (c) 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "assym.inc" - - .text - .set noat - .set noreorder - .section .text.mpentry_jz4780 - .balign 0x10000 - -/* - * JZ4870 has stricter alignment requirement for - * CPU entry point. Enforce it in CPU-specific - * file. - */ -GLOBAL(jz4780_mpentry) - j mpentry - nop diff --git a/sys/mips/ingenic/jz4780_nand.c b/sys/mips/ingenic/jz4780_nand.c deleted file mode 100644 index 8a921e8b42f..00000000000 --- a/sys/mips/ingenic/jz4780_nand.c +++ /dev/null @@ -1,121 +0,0 @@ -/*- - * Copyright 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Ingenic JZ4780 NAND and External Memory Controller (NEMC) driver. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -struct jz4780_nand_softc { - device_t dev; - struct resource *res[1]; -}; - -static struct resource_spec jz4780_nand_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { -1, 0 } -}; - -static int jz4780_nand_probe(device_t dev); -static int jz4780_nand_attach(device_t dev); -static int jz4780_nand_detach(device_t dev); - -static int -jz4780_nand_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-nand")) - return (ENXIO); - - device_set_desc(dev, "Ingenic JZ4780 NAND Controller"); - - return (BUS_PROBE_DEFAULT); -} - -static int -jz4780_nand_attach(device_t dev) -{ - struct jz4780_nand_softc *sc = device_get_softc(dev); - - sc->dev = dev; - - if (bus_alloc_resources(dev, jz4780_nand_spec, sc->res)) { - device_printf(dev, "could not allocate resources for device\n"); - return (ENXIO); - } - - return (0); -} - -static int -jz4780_nand_detach(device_t dev) -{ - struct jz4780_nand_softc *sc = device_get_softc(dev); - - bus_release_resources(dev, jz4780_nand_spec, sc->res); - return (0); -} - -static device_method_t jz4780_nand_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, jz4780_nand_probe), - DEVMETHOD(device_attach, jz4780_nand_attach), - DEVMETHOD(device_detach, jz4780_nand_detach), - - DEVMETHOD_END -}; - -static driver_t jz4780_nand_driver = { - "nand", - jz4780_nand_methods, - sizeof(struct jz4780_nand_softc), -}; - -static devclass_t jz4780_nand_devclass; - -DRIVER_MODULE(jz4780_nand, simplebus, jz4780_nand_driver, - jz4780_nand_devclass, 0, 0); diff --git a/sys/mips/ingenic/jz4780_nemc.c b/sys/mips/ingenic/jz4780_nemc.c deleted file mode 100644 index 8654abecc3c..00000000000 --- a/sys/mips/ingenic/jz4780_nemc.c +++ /dev/null @@ -1,371 +0,0 @@ -/*- - * Copyright 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Ingenic JZ4780 NAND and External Memory Controller (NEMC) driver. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include -#include -#include -#include - -#include - -struct jz4780_nemc_devinfo { - struct simplebus_devinfo sinfo; - uint32_t bank; -}; - -struct jz4780_nemc_softc { - struct simplebus_softc simplebus_sc; - device_t dev; - struct resource *res[1]; - uint32_t banks; - uint32_t clock_tick_psecs; - clk_t clk; -}; - -static struct resource_spec jz4780_nemc_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { -1, 0 } -}; - -#define CSR_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], reg, (val)) -#define CSR_READ_4(sc, reg) bus_read_4((sc)->res[0], reg) - -static int jz4780_nemc_probe(device_t dev); -static int jz4780_nemc_attach(device_t dev); -static int jz4780_nemc_detach(device_t dev); - -static int -jz4780_nemc_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-nemc")) - return (ENXIO); - - device_set_desc(dev, "Ingenic JZ4780 NEMC"); - - return (BUS_PROBE_DEFAULT); -} - -#define JZ4780_NEMC_NS_TO_TICKS(sc, val) howmany((val) * 1000, (sc)->clock_tick_psecs) - -/* Use table from JZ4780 programmers manual to convert ticks to tBP/tAW register values */ -static const uint8_t ticks_to_tBP_tAW[32] = { - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, /* 1:1 mapping */ - 11, 11, /* 12 cycles */ - 12, 12, 12, /* 15 cycles */ - 13, 13, 13, 13, 13, /* 20 cycles */ - 14, 14, 14, 14, 14, /* 25 cycles */ - 15, 15, 15, 15, 15, 15 /* 31 cycles */ -}; - -static int -jz4780_nemc_configure_bank(struct jz4780_nemc_softc *sc, - device_t dev, u_int bank) -{ - uint32_t smcr, cycles; - phandle_t node; - pcell_t val; - - /* Check if bank is configured already */ - if (sc->banks & (1 << bank)) - return 0; - - smcr = CSR_READ_4(sc, JZ_NEMC_SMCR(bank)); - - smcr &= ~JZ_NEMC_SMCR_SMT_MASK; - smcr |= JZ_NEMC_SMCR_SMT_NORMAL << JZ_NEMC_SMCR_SMT_SHIFT; - - node = ofw_bus_get_node(dev); - if (OF_getencprop(node, "ingenic,nemc-tAS", &val, sizeof(val)) > 0) { - cycles = JZ4780_NEMC_NS_TO_TICKS(sc, val); - if (cycles > 15) { - device_printf(sc->dev, - "invalid value of %s %u (%u cycles), maximum %u cycles supported\n", - "ingenic,nemc-tAS", val, cycles, 15); - return -1; - } - smcr &= ~JZ_NEMC_SMCR_TAS_MASK; - smcr |= cycles << JZ_NEMC_SMCR_TAS_SHIFT; - } - - if (OF_getencprop(node, "ingenic,nemc-tAH", &val, sizeof(val)) > 0) { - cycles = JZ4780_NEMC_NS_TO_TICKS(sc, val); - if (cycles > 15) { - device_printf(sc->dev, - "invalid value of %s %u (%u cycles), maximum %u cycles supported\n", - "ingenic,nemc-tAH", val, cycles, 15); - return -1; - } - smcr &= ~JZ_NEMC_SMCR_TAH_MASK; - smcr |= cycles << JZ_NEMC_SMCR_TAH_SHIFT; - } - - if (OF_getencprop(node, "ingenic,nemc-tBP", &val, sizeof(val)) > 0) { - cycles = JZ4780_NEMC_NS_TO_TICKS(sc, val); - if (cycles > 31) { - device_printf(sc->dev, - "invalid value of %s %u (%u cycles), maximum %u cycles supported\n", - "ingenic,nemc-tBP", val, cycles, 15); - return -1; - } - smcr &= ~JZ_NEMC_SMCR_TBP_MASK; - smcr |= ticks_to_tBP_tAW[cycles] << JZ_NEMC_SMCR_TBP_SHIFT; - } - - if (OF_getencprop(node, "ingenic,nemc-tAW", &val, sizeof(val)) > 0) { - cycles = JZ4780_NEMC_NS_TO_TICKS(sc, val); - if (cycles > 31) { - device_printf(sc->dev, - "invalid value of %s %u (%u cycles), maximum %u cycles supported\n", - "ingenic,nemc-tAW", val, cycles, 15); - return -1; - } - smcr &= ~JZ_NEMC_SMCR_TAW_MASK; - smcr |= ticks_to_tBP_tAW[cycles] << JZ_NEMC_SMCR_TAW_SHIFT; - } - - if (OF_getencprop(node, "ingenic,nemc-tSTRV", &val, sizeof(val)) > 0) { - cycles = JZ4780_NEMC_NS_TO_TICKS(sc, val); - if (cycles > 63) { - device_printf(sc->dev, - "invalid value of %s %u (%u cycles), maximum %u cycles supported\n", - "ingenic,nemc-tSTRV", val, cycles, 15); - return -1; - } - smcr &= ~JZ_NEMC_SMCR_STRV_MASK; - smcr |= cycles << JZ_NEMC_SMCR_STRV_SHIFT; - } - CSR_WRITE_4(sc, JZ_NEMC_SMCR(bank), smcr); - sc->banks |= (1 << bank); - return 0; -} - -/* Wholesale copy of simplebus routine */ -static int -jz4780_nemc_fill_ranges(phandle_t node, struct simplebus_softc *sc) -{ - int host_address_cells; - cell_t *base_ranges; - ssize_t nbase_ranges; - int err; - int i, j, k; - - err = OF_searchencprop(OF_parent(node), "#address-cells", - &host_address_cells, sizeof(host_address_cells)); - if (err <= 0) - return (-1); - - nbase_ranges = OF_getproplen(node, "ranges"); - if (nbase_ranges < 0) - return (-1); - sc->nranges = nbase_ranges / sizeof(cell_t) / - (sc->acells + host_address_cells + sc->scells); - if (sc->nranges == 0) - return (0); - - sc->ranges = malloc(sc->nranges * sizeof(sc->ranges[0]), - M_DEVBUF, M_WAITOK); - base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK); - OF_getencprop(node, "ranges", base_ranges, nbase_ranges); - - for (i = 0, j = 0; i < sc->nranges; i++) { - sc->ranges[i].bus = 0; - for (k = 0; k < sc->acells; k++) { - sc->ranges[i].bus <<= 32; - sc->ranges[i].bus |= base_ranges[j++]; - } - sc->ranges[i].host = 0; - for (k = 0; k < host_address_cells; k++) { - sc->ranges[i].host <<= 32; - sc->ranges[i].host |= base_ranges[j++]; - } - sc->ranges[i].size = 0; - for (k = 0; k < sc->scells; k++) { - sc->ranges[i].size <<= 32; - sc->ranges[i].size |= base_ranges[j++]; - } - } - - free(base_ranges, M_DEVBUF); - return (sc->nranges); -} - -static int -jz4780_nemc_attach(device_t dev) -{ - struct jz4780_nemc_softc *sc = device_get_softc(dev); - phandle_t node; - uint64_t freq; - - sc->dev = dev; - - if (bus_alloc_resources(dev, jz4780_nemc_spec, sc->res)) { - device_printf(dev, "could not allocate resources for device\n"); - return (ENXIO); - } - - node = ofw_bus_get_node(dev); - - /* Initialize simplebus and enumerate resources */ - simplebus_init(dev, node); - - if (jz4780_nemc_fill_ranges(node, &sc->simplebus_sc) < 0) - goto error; - - /* Figure our underlying clock rate. */ - if (clk_get_by_ofw_index(dev, 0, 0, &sc->clk) != 0) { - device_printf(dev, "could not lookup device clock\n"); - goto error; - } - if (clk_enable(sc->clk) != 0) { - device_printf(dev, "could not enable device clock\n"); - goto error; - } - if (clk_get_freq(sc->clk, &freq) != 0) { - device_printf(dev, "could not determine clock speed\n"); - goto error; - } - - /* Convert clock frequency to picoseconds-per-tick value. */ - sc->clock_tick_psecs = (uint32_t)(1000000000000ULL / freq); - - /* - * Allow devices to identify. - */ - bus_generic_probe(dev); - - /* - * Now walk the tree and attach top level devices - */ - for (node = OF_child(node); node > 0; node = OF_peer(node)) - simplebus_add_device(dev, node, 0, NULL, -1, NULL); - - return (bus_generic_attach(dev)); -error: - jz4780_nemc_detach(dev); - return (ENXIO); -} - -static int -jz4780_nemc_detach(device_t dev) -{ - struct jz4780_nemc_softc *sc = device_get_softc(dev); - - bus_generic_detach(dev); - if (sc->clk != NULL) - clk_release(sc->clk); - bus_release_resources(dev, jz4780_nemc_spec, sc->res); - return (0); -} - -static int -jz4780_nemc_decode_bank(struct simplebus_softc *sc, struct resource *r, - u_int *bank) -{ - rman_res_t start, end; - int i; - - start = rman_get_start(r); - end = rman_get_end(r); - - /* Remap through ranges property */ - for (i = 0; i < sc->nranges; i++) { - if (start >= sc->ranges[i].host && end < - sc->ranges[i].host + sc->ranges[i].size) { - *bank = (sc->ranges[i].bus >> 32); - return (0); - } - } - return (1); -} - -static int -jz4780_nemc_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - struct jz4780_nemc_softc *sc; - u_int bank; - int err; - - if (type == SYS_RES_MEMORY) { - sc = device_get_softc(bus); - - /* Figure out on what bank device is residing */ - err = jz4780_nemc_decode_bank(&sc->simplebus_sc, r, &bank); - if (err == 0) { - /* Attempt to configure the bank if not done already */ - err = jz4780_nemc_configure_bank(sc, child, bank); - if (err != 0) - return (err); - } - } - - /* Call default implementation to finish the work */ - return (bus_generic_activate_resource(bus, child, - type, rid, r)); -} - -static device_method_t jz4780_nemc_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, jz4780_nemc_probe), - DEVMETHOD(device_attach, jz4780_nemc_attach), - DEVMETHOD(device_detach, jz4780_nemc_detach), - - /* Overrides to configure bank on resource activation */ - DEVMETHOD(bus_activate_resource, jz4780_nemc_activate_resource), - - DEVMETHOD_END -}; - -static devclass_t jz4780_nemc_devclass; -DEFINE_CLASS_1(nemc, jz4780_nemc_driver, jz4780_nemc_methods, - sizeof(struct jz4780_nemc_softc), simplebus_driver); -DRIVER_MODULE(jz4780_nemc, simplebus, jz4780_nemc_driver, - jz4780_nemc_devclass, 0, 0); diff --git a/sys/mips/ingenic/jz4780_ohci.c b/sys/mips/ingenic/jz4780_ohci.c deleted file mode 100644 index d70db9498b0..00000000000 --- a/sys/mips/ingenic/jz4780_ohci.c +++ /dev/null @@ -1,316 +0,0 @@ -/*- - * Copyright (c) 2015, Alexander Kabaev - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include - -static int jz4780_ohci_attach(device_t dev); -static int jz4780_ohci_detach(device_t dev); -static int jz4780_ohci_probe(device_t dev); - -struct jz4780_ohci_softc -{ - struct ohci_softc sc_ohci; - struct gpiobus_pin *gpio_vbus; - clk_t clk; -}; - -static int -jz4780_ohci_probe(device_t dev) -{ - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-ohci")) - return (ENXIO); - - device_set_desc(dev, "Ingenic JZ4780 OHCI"); - - return (BUS_PROBE_DEFAULT); -} - -static int -jz4780_ohci_vbus_gpio_enable(device_t dev, struct jz4780_ohci_softc *sc) -{ - struct gpiobus_pin *gpio_vbus; - int error; - - error = ofw_gpiobus_parse_gpios(dev, "ingenic,vbus-gpio", &gpio_vbus); - /* - * The pin can be mapped already by other device. Assume it also has need - * activated and proceed happily. - */ - if (error <= 0) - return (0); - - sc->gpio_vbus = gpio_vbus; - if (error > 1) { - device_printf(dev, "too many vbus gpios\n"); - return (ENXIO); - } - - if (sc->gpio_vbus != NULL) { - error = GPIO_PIN_SET(sc->gpio_vbus->dev, sc->gpio_vbus->pin, 1); - if (error != 0) { - device_printf(dev, "Cannot configure GPIO pin %d on %s\n", - sc->gpio_vbus->pin, device_get_nameunit(sc->gpio_vbus->dev)); - return (error); - } - - error = GPIO_PIN_SETFLAGS(sc->gpio_vbus->dev, sc->gpio_vbus->pin, - GPIO_PIN_OUTPUT); - if (error != 0) { - device_printf(dev, "Cannot configure GPIO pin %d on %s\n", - sc->gpio_vbus->pin, device_get_nameunit(sc->gpio_vbus->dev)); - return (error); - } - } - return (0); -} - -static int -jz4780_ohci_clk_enable(device_t dev) -{ - struct jz4780_ohci_softc *sc; - int err; - - sc = device_get_softc(dev); - - err = clk_get_by_ofw_index(dev, 0, 0, &sc->clk); - if (err != 0) { - device_printf(dev, "unable to lookup device clock\n"); - return (err); - } - err = clk_enable(sc->clk); - if (err != 0) { - device_printf(dev, "unable to enable device clock\n"); - return (err); - } - err = clk_set_freq(sc->clk, 48000000, 0); - if (err != 0) { - device_printf(dev, "unable to set device clock to 48 kHZ\n"); - return (err); - } - return (0); -} - -static int -jz4780_ohci_attach(device_t dev) -{ - struct jz4780_ohci_softc *sc = device_get_softc(dev); - int err; - int rid; - - /* initialize some bus fields */ - sc->sc_ohci.sc_bus.parent = dev; - sc->sc_ohci.sc_bus.devices = sc->sc_ohci.sc_devices; - sc->sc_ohci.sc_bus.devices_max = OHCI_MAX_DEVICES; - sc->sc_ohci.sc_bus.dma_bits = 32; - - /* get all DMA memory */ - if (usb_bus_mem_alloc_all(&sc->sc_ohci.sc_bus, - USB_GET_DMA_TAG(dev), &ohci_iterate_hw_softc)) { - return (ENOMEM); - } - - sc->sc_ohci.sc_dev = dev; - - /* frob vbus gpio */ - err = jz4780_ohci_vbus_gpio_enable(dev, sc); - if (err) - goto error; - - err = jz4780_ohci_clk_enable(dev); - if (err) - goto error; - - rid = 0; - sc->sc_ohci.sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (sc->sc_ohci.sc_io_res == NULL) { - err = ENOMEM; - goto error; - } - sc->sc_ohci.sc_io_tag = rman_get_bustag(sc->sc_ohci.sc_io_res); - sc->sc_ohci.sc_io_hdl = rman_get_bushandle(sc->sc_ohci.sc_io_res); - sc->sc_ohci.sc_io_size = rman_get_size(sc->sc_ohci.sc_io_res); - - rid = 0; - sc->sc_ohci.sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_ACTIVE); - if (sc->sc_ohci.sc_irq_res == NULL) { - err = ENOMEM; - goto error; - } - - if (jz4780_ohci_enable() != 0) { - device_printf(dev, "CGU failed to enable OHCI\n"); - err = ENXIO; - goto error; - } - - sc->sc_ohci.sc_bus.bdev = device_add_child(dev, "usbus", -1); - if (sc->sc_ohci.sc_bus.bdev == NULL) { - err = ENOMEM; - goto error; - } - device_set_ivars(sc->sc_ohci.sc_bus.bdev, &sc->sc_ohci.sc_bus); - - err = bus_setup_intr(dev, sc->sc_ohci.sc_irq_res, - INTR_TYPE_BIO | INTR_MPSAFE, NULL, - (driver_intr_t *)ohci_interrupt, sc, &sc->sc_ohci.sc_intr_hdl); - if (err) { - err = ENXIO; - goto error; - } - - strlcpy(sc->sc_ohci.sc_vendor, "Ingenic", sizeof(sc->sc_ohci.sc_vendor)); - bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl, OHCI_CONTROL, 0); - - err = ohci_init(&sc->sc_ohci); - if (!err) - err = device_probe_and_attach(sc->sc_ohci.sc_bus.bdev); - - if (err) - goto error; - return (0); - -error: - if (err) - jz4780_ohci_detach(dev); - return (err); -} - -static int -jz4780_ohci_detach(device_t dev) -{ - struct jz4780_ohci_softc *sc = device_get_softc(dev); - device_t bdev; - - if (sc->sc_ohci.sc_bus.bdev) { - bdev = sc->sc_ohci.sc_bus.bdev; - device_detach(bdev); - device_delete_child(dev, bdev); - } - /* during module unload there are lots of children leftover */ - device_delete_children(dev); - - /* - * Put the controller into reset, then disable clocks and do - * the MI tear down. We have to disable the clocks/hardware - * after we do the rest of the teardown. We also disable the - * clocks in the opposite order we acquire them, but that - * doesn't seem to be absolutely necessary. We free up the - * clocks after we disable them, so the system could, in - * theory, reuse them. - */ - if (sc->sc_ohci.sc_io_res != NULL) { - bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl, - OHCI_CONTROL, 0); - } - - if (sc->sc_ohci.sc_intr_hdl) { - bus_teardown_intr(dev, sc->sc_ohci.sc_irq_res, sc->sc_ohci.sc_intr_hdl); - sc->sc_ohci.sc_intr_hdl = NULL; - } - - if (sc->sc_ohci.sc_irq_res && sc->sc_ohci.sc_intr_hdl) { - /* - * only call ohci_detach() after ohci_init() - */ - ohci_detach(&sc->sc_ohci); - - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_ohci.sc_irq_res); - sc->sc_ohci.sc_irq_res = NULL; - } - if (sc->sc_ohci.sc_io_res) { - bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_ohci.sc_io_res); - sc->sc_ohci.sc_io_res = NULL; - sc->sc_ohci.sc_io_tag = 0; - sc->sc_ohci.sc_io_hdl = 0; - } - - if (sc->clk != NULL) - clk_release(sc->clk); - - usb_bus_mem_free_all(&sc->sc_ohci.sc_bus, &ohci_iterate_hw_softc); - free(sc->gpio_vbus, M_DEVBUF); - return (0); -} - -static device_method_t ohci_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, jz4780_ohci_probe), - DEVMETHOD(device_attach, jz4780_ohci_attach), - DEVMETHOD(device_detach, jz4780_ohci_detach), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - - DEVMETHOD_END -}; - -static driver_t ohci_driver = { - .name = "ohci", - .methods = ohci_methods, - .size = sizeof(struct jz4780_ohci_softc), -}; - -static devclass_t ohci_devclass; - -DRIVER_MODULE(ohci, simplebus, ohci_driver, ohci_devclass, 0, 0); diff --git a/sys/mips/ingenic/jz4780_pdma.c b/sys/mips/ingenic/jz4780_pdma.c deleted file mode 100644 index fc83effeaea..00000000000 --- a/sys/mips/ingenic/jz4780_pdma.c +++ /dev/null @@ -1,583 +0,0 @@ -/*- - * Copyright (c) 2016-2018 Ruslan Bukin - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* Ingenic JZ4780 PDMA Controller. */ - -#include -#include "opt_platform.h" -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#ifdef FDT -#include -#include -#include -#endif - -#include - -#include -#include - -#include "xdma_if.h" - -#define PDMA_DEBUG -#undef PDMA_DEBUG - -#ifdef PDMA_DEBUG -#define dprintf(fmt, ...) printf(fmt, ##__VA_ARGS__) -#else -#define dprintf(fmt, ...) -#endif - -#define PDMA_DESC_RING_ALIGN 2048 - -struct pdma_softc { - device_t dev; - struct resource *res[2]; - bus_space_tag_t bst; - bus_space_handle_t bsh; - void *ih; -}; - -struct pdma_fdt_data { - int tx; - int rx; - int chan; -}; - -struct pdma_channel { - struct pdma_fdt_data data; - int cur_desc; - int used; - int index; - int flags; -#define CHAN_DESCR_RELINK (1 << 0) - - /* Descriptors */ - bus_dma_tag_t desc_tag; - bus_dmamap_t desc_map; - struct pdma_hwdesc *desc_ring; - bus_addr_t desc_ring_paddr; - - /* xDMA */ - xdma_channel_t *xchan; - struct xdma_request *req; -}; - -#define PDMA_NCHANNELS 32 -struct pdma_channel pdma_channels[PDMA_NCHANNELS]; - -static struct resource_spec pdma_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { SYS_RES_IRQ, 0, RF_ACTIVE }, - { -1, 0 } -}; - -static int pdma_probe(device_t dev); -static int pdma_attach(device_t dev); -static int pdma_detach(device_t dev); -static int chan_start(struct pdma_softc *sc, struct pdma_channel *chan); - -static void -pdma_intr(void *arg) -{ - struct xdma_request *req; - xdma_transfer_status_t status; - struct pdma_channel *chan; - struct pdma_softc *sc; - xdma_channel_t *xchan; - int pending; - int i; - - sc = arg; - - pending = READ4(sc, PDMA_DIRQP); - - /* Ack all the channels. */ - WRITE4(sc, PDMA_DIRQP, 0); - - for (i = 0; i < PDMA_NCHANNELS; i++) { - if (pending & (1 << i)) { - chan = &pdma_channels[i]; - xchan = chan->xchan; - req = chan->req; - - /* TODO: check for AR, HLT error bits here. */ - - /* Disable channel */ - WRITE4(sc, PDMA_DCS(chan->index), 0); - - if (chan->flags & CHAN_DESCR_RELINK) { - /* Enable again */ - chan->cur_desc = (chan->cur_desc + 1) % \ - req->block_num; - chan_start(sc, chan); - } - - status.error = 0; - xdma_callback(chan->xchan, &status); - } - } -} - -static int -pdma_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-dma")) - return (ENXIO); - - device_set_desc(dev, "Ingenic JZ4780 PDMA Controller"); - - return (BUS_PROBE_DEFAULT); -} - -static int -pdma_attach(device_t dev) -{ - struct pdma_softc *sc; - phandle_t xref, node; - int err; - int reg; - - sc = device_get_softc(dev); - sc->dev = dev; - - if (bus_alloc_resources(dev, pdma_spec, sc->res)) { - device_printf(dev, "could not allocate resources for device\n"); - return (ENXIO); - } - - /* Memory interface */ - sc->bst = rman_get_bustag(sc->res[0]); - sc->bsh = rman_get_bushandle(sc->res[0]); - - /* Setup interrupt handler */ - err = bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE, - NULL, pdma_intr, sc, &sc->ih); - if (err) { - device_printf(dev, "Unable to alloc interrupt resource.\n"); - return (ENXIO); - } - - node = ofw_bus_get_node(dev); - xref = OF_xref_from_node(node); - OF_device_register_xref(xref, dev); - - reg = READ4(sc, PDMA_DMAC); - reg &= ~(DMAC_HLT | DMAC_AR); - reg |= (DMAC_DMAE); - WRITE4(sc, PDMA_DMAC, reg); - - WRITE4(sc, PDMA_DMACP, 0); - - return (0); -} - -static int -pdma_detach(device_t dev) -{ - struct pdma_softc *sc; - - sc = device_get_softc(dev); - - bus_release_resources(dev, pdma_spec, sc->res); - - return (0); -} - -static int -chan_start(struct pdma_softc *sc, struct pdma_channel *chan) -{ - struct xdma_channel *xchan; - - xchan = chan->xchan; - - /* 8 byte descriptor. */ - WRITE4(sc, PDMA_DCS(chan->index), DCS_DES8); - WRITE4(sc, PDMA_DDA(chan->index), - chan->desc_ring_paddr + 8 * 4 * chan->cur_desc); - - WRITE4(sc, PDMA_DDS, (1 << chan->index)); - - /* Channel transfer enable. */ - WRITE4(sc, PDMA_DCS(chan->index), (DCS_DES8 | DCS_CTE)); - - return (0); -} - -static int -chan_stop(struct pdma_softc *sc, struct pdma_channel *chan) -{ - int timeout; - - WRITE4(sc, PDMA_DCS(chan->index), 0); - - timeout = 100; - - do { - if ((READ4(sc, PDMA_DCS(chan->index)) & DCS_CTE) == 0) { - break; - } - } while (timeout--); - - if (timeout == 0) { - device_printf(sc->dev, "%s: Can't stop channel %d\n", - __func__, chan->index); - } - - return (0); -} - -static void -dwc_get1paddr(void *arg, bus_dma_segment_t *segs, int nsegs, int error) -{ - - if (error != 0) - return; - *(bus_addr_t *)arg = segs[0].ds_addr; -} - -static int -pdma_channel_setup_descriptors(device_t dev, struct pdma_channel *chan) -{ - struct pdma_softc *sc; - int error; - - sc = device_get_softc(dev); - - /* - * Set up TX descriptor ring, descriptors, and dma maps. - */ - error = bus_dma_tag_create( - bus_get_dma_tag(sc->dev), /* Parent tag. */ - PDMA_DESC_RING_ALIGN, 0, /* alignment, boundary */ - BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ - BUS_SPACE_MAXADDR, /* highaddr */ - NULL, NULL, /* filter, filterarg */ - CHAN_DESC_SIZE, 1, /* maxsize, nsegments */ - CHAN_DESC_SIZE, /* maxsegsize */ - 0, /* flags */ - NULL, NULL, /* lockfunc, lockarg */ - &chan->desc_tag); - if (error != 0) { - device_printf(sc->dev, - "could not create TX ring DMA tag.\n"); - return (-1); - } - - error = bus_dmamem_alloc(chan->desc_tag, (void**)&chan->desc_ring, - BUS_DMA_COHERENT | BUS_DMA_WAITOK | BUS_DMA_ZERO, - &chan->desc_map); - if (error != 0) { - device_printf(sc->dev, - "could not allocate TX descriptor ring.\n"); - return (-1); - } - - error = bus_dmamap_load(chan->desc_tag, chan->desc_map, - chan->desc_ring, CHAN_DESC_SIZE, dwc_get1paddr, - &chan->desc_ring_paddr, 0); - if (error != 0) { - device_printf(sc->dev, - "could not load TX descriptor ring map.\n"); - return (-1); - } - - return (0); -} - -static int -pdma_channel_alloc(device_t dev, struct xdma_channel *xchan) -{ - struct pdma_channel *chan; - struct pdma_softc *sc; - int i; - - sc = device_get_softc(dev); - - for (i = 0; i < PDMA_NCHANNELS; i++) { - chan = &pdma_channels[i]; - if (chan->used == 0) { - chan->xchan = xchan; - xchan->chan = (void *)chan; - chan->used = 1; - chan->index = i; - - pdma_channel_setup_descriptors(dev, chan); - - return (0); - } - } - - return (-1); -} - -static int -pdma_channel_free(device_t dev, struct xdma_channel *xchan) -{ - struct pdma_channel *chan; - struct pdma_softc *sc; - - sc = device_get_softc(dev); - - chan = (struct pdma_channel *)xchan->chan; - chan->used = 0; - - return (0); -} - -static int -access_width(struct xdma_request *req, uint32_t *dcm, uint32_t *max_width) -{ - - *dcm = 0; - *max_width = max(req->src_width, req->dst_width); - - switch (req->src_width) { - case 1: - *dcm |= DCM_SP_1; - break; - case 2: - *dcm |= DCM_SP_2; - break; - case 4: - *dcm |= DCM_SP_4; - break; - default: - return (-1); - } - - switch (req->dst_width) { - case 1: - *dcm |= DCM_DP_1; - break; - case 2: - *dcm |= DCM_DP_2; - break; - case 4: - *dcm |= DCM_DP_4; - break; - default: - return (-1); - } - - switch (*max_width) { - case 1: - *dcm |= DCM_TSZ_1; - break; - case 2: - *dcm |= DCM_TSZ_2; - break; - case 4: - *dcm |= DCM_TSZ_4; - break; - default: - return (-1); - }; - - return (0); -} - -static int -pdma_channel_request(device_t dev, struct xdma_channel *xchan, struct xdma_request *req) -{ - struct pdma_fdt_data *data; - struct pdma_channel *chan; - struct pdma_hwdesc *desc; - xdma_controller_t *xdma; - struct pdma_softc *sc; - int max_width; - uint32_t reg; - uint32_t dcm; - int i; - - sc = device_get_softc(dev); - - dprintf("%s: block_len %d block_num %d\n", - __func__, req->block_len, req->block_num); - - xdma = xchan->xdma; - data = (struct pdma_fdt_data *)xdma->data; - - chan = (struct pdma_channel *)xchan->chan; - /* Ensure we are not in operation */ - chan_stop(sc, chan); - if (req->operation == XDMA_CYCLIC) - chan->flags = CHAN_DESCR_RELINK; - chan->cur_desc = 0; - chan->req = req; - - for (i = 0; i < req->block_num; i++) { - desc = &chan->desc_ring[i]; - - if (req->direction == XDMA_MEM_TO_DEV) { - desc->dsa = req->src_addr + (i * req->block_len); - desc->dta = req->dst_addr; - desc->drt = data->tx; - desc->dcm = DCM_SAI; - } else if (req->direction == XDMA_DEV_TO_MEM) { - desc->dsa = req->src_addr; - desc->dta = req->dst_addr + (i * req->block_len); - desc->drt = data->rx; - desc->dcm = DCM_DAI; - } else if (req->direction == XDMA_MEM_TO_MEM) { - desc->dsa = req->src_addr + (i * req->block_len); - desc->dta = req->dst_addr + (i * req->block_len); - desc->drt = DRT_AUTO; - desc->dcm = DCM_SAI | DCM_DAI; - } - - if (access_width(req, &dcm, &max_width) != 0) { - device_printf(dev, - "%s: can't configure access width\n", __func__); - return (-1); - } - - desc->dcm |= dcm | DCM_TIE; - desc->dtc = (req->block_len / max_width); - - /* - * TODO: bus dma pre read/write sync here - */ - - /* - * PDMA does not provide interrupt after processing each descriptor, - * but after processing all the chain only. - * As a workaround we do unlink descriptors here, so our chain will - * consists of single descriptor only. And then we reconfigure channel - * on each interrupt again. - */ - if ((chan->flags & CHAN_DESCR_RELINK) == 0) { - if (i != (req->block_num - 1)) { - desc->dcm |= DCM_LINK; - reg = ((i + 1) * sizeof(struct pdma_hwdesc)); - desc->dtc |= (reg >> 4) << 24; - } - } - } - - return (0); -} - -static int -pdma_channel_control(device_t dev, xdma_channel_t *xchan, int cmd) -{ - struct pdma_channel *chan; - struct pdma_softc *sc; - - sc = device_get_softc(dev); - - chan = (struct pdma_channel *)xchan->chan; - - switch (cmd) { - case XDMA_CMD_BEGIN: - chan_start(sc, chan); - break; - case XDMA_CMD_TERMINATE: - chan_stop(sc, chan); - break; - case XDMA_CMD_PAUSE: - /* TODO: implement me */ - return (-1); - } - - return (0); -} - -#ifdef FDT -static int -pdma_ofw_md_data(device_t dev, pcell_t *cells, int ncells, void **ptr) -{ - struct pdma_fdt_data *data; - - if (ncells != 3) { - return (-1); - } - - data = malloc(sizeof(struct pdma_fdt_data), M_DEVBUF, (M_WAITOK | M_ZERO)); - if (data == NULL) { - device_printf(dev, "%s: Cant allocate memory\n", __func__); - return (-1); - } - - data->tx = cells[0]; - data->rx = cells[1]; - data->chan = cells[2]; - - *ptr = data; - - return (0); -} -#endif - -static device_method_t pdma_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, pdma_probe), - DEVMETHOD(device_attach, pdma_attach), - DEVMETHOD(device_detach, pdma_detach), - - /* xDMA Interface */ - DEVMETHOD(xdma_channel_alloc, pdma_channel_alloc), - DEVMETHOD(xdma_channel_free, pdma_channel_free), - DEVMETHOD(xdma_channel_request, pdma_channel_request), - DEVMETHOD(xdma_channel_control, pdma_channel_control), -#ifdef FDT - DEVMETHOD(xdma_ofw_md_data, pdma_ofw_md_data), -#endif - - DEVMETHOD_END -}; - -static driver_t pdma_driver = { - "pdma", - pdma_methods, - sizeof(struct pdma_softc), -}; - -static devclass_t pdma_devclass; - -EARLY_DRIVER_MODULE(pdma, simplebus, pdma_driver, pdma_devclass, 0, 0, - BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE); diff --git a/sys/mips/ingenic/jz4780_pdma.h b/sys/mips/ingenic/jz4780_pdma.h deleted file mode 100644 index aaee7a9e97c..00000000000 --- a/sys/mips/ingenic/jz4780_pdma.h +++ /dev/null @@ -1,107 +0,0 @@ -/*- - * Copyright (c) 2016 Ruslan Bukin - * All rights reserved. - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 - * ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* DMA Channel Registers */ -#define PDMA_DSA(n) (0x00 + 0x20 * n) /* Channel n Source Address */ -#define PDMA_DTA(n) (0x04 + 0x20 * n) /* Channel n Target Address */ -#define PDMA_DTC(n) (0x08 + 0x20 * n) /* Channel n Transfer Count */ -#define PDMA_DRT(n) (0x0C + 0x20 * n) /* Channel n Request Source */ -#define DRT_AUTO (1 << 3) /* Auto-request. */ -#define PDMA_DCS(n) (0x10 + 0x20 * n) /* Channel n Control/Status */ -#define DCS_NDES (1 << 31) /* Non-descriptor mode. */ -#define DCS_DES8 (1 << 30) /* Descriptor 8 Word. */ -#define DCS_AR (1 << 4) /* Address Error. */ -#define DCS_TT (1 << 3) /* Transfer Terminate. */ -#define DCS_HLT (1 << 2) /* DMA halt. */ -#define DCS_CTE (1 << 0) /* Channel transfer enable. */ -#define PDMA_DCM(n) (0x14 + 0x20 * n) /* Channel n Command */ -#define DCM_SAI (1 << 23) /* Source Address Increment. */ -#define DCM_DAI (1 << 22) /* Destination Address Increment. */ -#define DCM_SP_S 14 /* Source port width. */ -#define DCM_SP_M (0x3 << DCM_SP_S) -#define DCM_SP_1 (0x1 << DCM_SP_S) /* 1 byte */ -#define DCM_SP_2 (0x2 << DCM_SP_S) /* 2 bytes */ -#define DCM_SP_4 (0x0 << DCM_SP_S) /* 4 bytes */ -#define DCM_DP_S 12 /* Destination port width. */ -#define DCM_DP_M (0x3 << DCM_DP_S) -#define DCM_DP_1 (0x1 << DCM_DP_S) /* 1 byte */ -#define DCM_DP_2 (0x2 << DCM_DP_S) /* 2 bytes */ -#define DCM_DP_4 (0x0 << DCM_DP_S) /* 4 bytes */ -#define DCM_TSZ_S 8 /* Transfer Data Size of a data unit. */ -#define DCM_TSZ_M (0x7 << DCM_TSZ_S) -#define DCM_TSZ_A (0x7 << DCM_TSZ_S) /* Autonomy */ -#define DCM_TSZ_1 (0x1 << DCM_TSZ_S) -#define DCM_TSZ_2 (0x2 << DCM_TSZ_S) -#define DCM_TSZ_4 (0x0 << DCM_TSZ_S) -#define DCM_TSZ_16 (0x3 << DCM_TSZ_S) -#define DCM_TSZ_32 (0x4 << DCM_TSZ_S) -#define DCM_TSZ_64 (0x5 << DCM_TSZ_S) -#define DCM_TSZ_128 (0x6 << DCM_TSZ_S) -#define DCM_TIE (1 << 1) /* Transfer Interrupt Enable (TIE). */ -#define DCM_LINK (1 << 0) /* Descriptor Link Enable. */ -#define PDMA_DDA(n) (0x18 + 0x20 * n) /* Channel n Descriptor Address */ -#define PDMA_DSD(n) (0x1C + 0x20 * n) /* Channel n Stride Difference */ - -/* Global Control Registers */ -#define PDMA_DMAC 0x1000 /* DMA Control */ -#define DMAC_FMSC (1 << 31) -#define DMAC_INTCC_S 17 -#define DMAC_INTCC_M (0x1f << DMAC_INTCC_S) -#define DMAC_INTCE (1 << 16) /* Permit INTC_IRQ to be bound to one of programmable channel. */ -#define DMAC_HLT (1 << 3) /* Global halt status */ -#define DMAC_AR (1 << 2) /* Global address error status */ -#define DMAC_DMAE (1 << 0) /* Enable DMA. */ -#define PDMA_DIRQP 0x1004 /* DMA Interrupt Pending */ -#define PDMA_DDB 0x1008 /* DMA Doorbell */ -#define PDMA_DDS 0x100C /* DMA Doorbell Set */ -#define PDMA_DIP 0x1010 /* Descriptor Interrupt Pending */ -#define PDMA_DIC 0x1014 /* Descriptor Interrupt Clear */ -#define PDMA_DMACP 0x101C /* DMA Channel Programmable */ -#define PDMA_DSIRQP 0x1020 /* Channel soft IRQ to MCU */ -#define PDMA_DSIRQM 0x1024 /* Channel soft IRQ mask */ -#define PDMA_DCIRQP 0x1028 /* Channel IRQ to MCU */ -#define PDMA_DCIRQM 0x102C /* Channel IRQ to MCU mask */ -#define PDMA_DMCS 0x1030 /* MCU Control and Status */ -#define PDMA_DMNMB 0x1034 /* MCU Normal Mailbox */ -#define PDMA_DMSMB 0x1038 /* MCU Security Mailbox */ -#define PDMA_DMINT 0x103C /* MCU Interrupt */ - -struct pdma_hwdesc { - uint32_t dcm; /* DMA Channel Command */ - uint32_t dsa; /* DMA Source Address */ - uint32_t dta; /* DMA Target Address */ - uint32_t dtc; /* DMA Transfer Counter */ - uint32_t sd; /* Stride Address */ - uint32_t drt; /* DMA Request Type */ - uint32_t reserved[2]; -}; - -#define CHAN_DESC_COUNT 4096 -#define CHAN_DESC_SIZE (sizeof(struct pdma_hwdesc) * CHAN_DESC_COUNT) diff --git a/sys/mips/ingenic/jz4780_pinctrl.c b/sys/mips/ingenic/jz4780_pinctrl.c deleted file mode 100644 index 761a19222b1..00000000000 --- a/sys/mips/ingenic/jz4780_pinctrl.c +++ /dev/null @@ -1,257 +0,0 @@ -/*- - * Copyright 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Ingenic JZ4780 pinctrl driver. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include -#include -#include - -#include - -#include "jz4780_gpio_if.h" - -struct jz4780_pinctrl_softc { - struct simplebus_softc ssc; - device_t dev; -}; - -#define CHIP_REG_STRIDE 256 -#define CHIP_REG_OFFSET(base, chip) ((base) + (chip) * CHIP_REG_STRIDE) - -static int -jz4780_pinctrl_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-pinctrl")) - return (ENXIO); - - device_set_desc(dev, "Ingenic JZ4780 GPIO"); - - return (BUS_PROBE_DEFAULT); -} - -static int -jz4780_pinctrl_attach(device_t dev) -{ - struct jz4780_pinctrl_softc *sc; - struct resource_list *rs; - struct resource_list_entry *re; - phandle_t dt_parent, dt_child; - int i, ret; - - sc = device_get_softc(dev); - sc->dev = dev; - - /* - * Fetch our own resource list to dole memory between children - */ - rs = BUS_GET_RESOURCE_LIST(device_get_parent(dev), dev); - if (rs == NULL) - return (ENXIO); - re = resource_list_find(rs, SYS_RES_MEMORY, 0); - if (re == NULL) - return (ENXIO); - - simplebus_init(dev, 0); - - /* Iterate over this node children, looking for pin controllers */ - dt_parent = ofw_bus_get_node(dev); - i = 0; - for (dt_child = OF_child(dt_parent); dt_child != 0; - dt_child = OF_peer(dt_child)) { - struct simplebus_devinfo *ndi; - device_t child; - bus_addr_t phys; - bus_size_t size; - - /* Add gpio controller child */ - if (!OF_hasprop(dt_child, "gpio-controller")) - continue; - child = simplebus_add_device(dev, dt_child, 0, NULL, -1, NULL); - if (child == NULL) - break; - /* Setup child resources */ - phys = CHIP_REG_OFFSET(re->start, i); - size = CHIP_REG_STRIDE; - if (phys + size - 1 <= re->end) { - ndi = device_get_ivars(child); - resource_list_add(&ndi->rl, SYS_RES_MEMORY, 0, - phys, phys + size - 1, size); - } - i++; - } - - ret = bus_generic_attach(dev); - if (ret == 0) { - fdt_pinctrl_register(dev, "ingenic,pins"); - fdt_pinctrl_configure_tree(dev); - } - return (ret); -} - -static int -jz4780_pinctrl_detach(device_t dev) -{ - - bus_generic_detach(dev); - return (0); -} - -struct jx4780_bias_prop { - const char *name; - uint32_t bias; -}; - -static struct jx4780_bias_prop jx4780_bias_table[] = { - { "bias-disable", 0 }, - { "bias-pull-up", GPIO_PIN_PULLUP }, - { "bias-pull-down", GPIO_PIN_PULLDOWN }, -}; - -static int -jz4780_pinctrl_parse_pincfg(phandle_t pincfgxref, uint32_t *bias_value) -{ - phandle_t pincfg_node; - int i; - - pincfg_node = OF_node_from_xref(pincfgxref); - for (i = 0; i < nitems(jx4780_bias_table); i++) { - if (OF_hasprop(pincfg_node, jx4780_bias_table[i].name)) { - *bias_value = jx4780_bias_table[i].bias; - return 0; - } - } - - return -1; -} - -static device_t -jz4780_pinctrl_chip_lookup(struct jz4780_pinctrl_softc *sc, phandle_t chipxref) -{ - device_t chipdev; - - chipdev = OF_device_from_xref(chipxref); - return chipdev; -} - -static int -jz4780_pinctrl_configure_pins(device_t dev, phandle_t cfgxref) -{ - struct jz4780_pinctrl_softc *sc = device_get_softc(dev); - device_t chip; - phandle_t node; - ssize_t i, len; - uint32_t *value, *pconf; - int result; - - node = OF_node_from_xref(cfgxref); - - len = OF_getencprop_alloc_multi(node, "ingenic,pins", - sizeof(uint32_t) * 4, (void **)&value); - if (len < 0) { - device_printf(dev, - "missing ingenic,pins attribute in FDT\n"); - return (ENXIO); - } - - pconf = value; - result = EINVAL; - for (i = 0; i < len; i++, pconf += 4) { - uint32_t bias; - - /* Lookup the chip that handles this configuration */ - chip = jz4780_pinctrl_chip_lookup(sc, pconf[0]); - if (chip == NULL) { - device_printf(dev, - "invalid gpio controller reference in FDT\n"); - goto done; - } - - if (jz4780_pinctrl_parse_pincfg(pconf[3], &bias) != 0) { - device_printf(dev, - "invalid pin bias for pin %u on %s in FDT\n", - pconf[1], ofw_bus_get_name(chip)); - goto done; - } - - result = JZ4780_GPIO_CONFIGURE_PIN(chip, pconf[1], pconf[2], - bias); - if (result != 0) { - device_printf(dev, - "failed to configure pin %u on %s\n", pconf[1], - ofw_bus_get_name(chip)); - goto done; - } - } - - result = 0; -done: - free(value, M_OFWPROP); - return (result); -} - -static device_method_t jz4780_pinctrl_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, jz4780_pinctrl_probe), - DEVMETHOD(device_attach, jz4780_pinctrl_attach), - DEVMETHOD(device_detach, jz4780_pinctrl_detach), - - /* fdt_pinctrl interface */ - DEVMETHOD(fdt_pinctrl_configure, jz4780_pinctrl_configure_pins), - - DEVMETHOD_END -}; - -static devclass_t jz4780_pinctrl_devclass; -DEFINE_CLASS_1(pinctrl, jz4780_pinctrl_driver, jz4780_pinctrl_methods, - sizeof(struct jz4780_pinctrl_softc), simplebus_driver); -EARLY_DRIVER_MODULE(pinctrl, simplebus, jz4780_pinctrl_driver, - jz4780_pinctrl_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE); diff --git a/sys/mips/ingenic/jz4780_pinctrl.h b/sys/mips/ingenic/jz4780_pinctrl.h deleted file mode 100644 index 87a96090e64..00000000000 --- a/sys/mips/ingenic/jz4780_pinctrl.h +++ /dev/null @@ -1,30 +0,0 @@ -/*- - * Copyright 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MIPS_INGENIC_JZ4780_PINCTRL_H -#define _MIPS_INGENIC_JZ4780_PINCTRL_H - -#endif /* _MIPS_INGENIC_JZ4780_PINCTRL_H */ diff --git a/sys/mips/ingenic/jz4780_regs.h b/sys/mips/ingenic/jz4780_regs.h deleted file mode 100644 index 9ea7ad02d88..00000000000 --- a/sys/mips/ingenic/jz4780_regs.h +++ /dev/null @@ -1,785 +0,0 @@ -/* $NetBSD: ingenic_regs.h,v 1.22 2015/10/08 17:54:30 macallan Exp $ */ - -/*- - * Copyright (c) 2014 Michael Lorenz - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef JZ4780_REGS_H -#define JZ4780_REGS_H - -/* for mips_wbflush() */ -#include - -/* UARTs, mostly 16550 compatible with 32bit spaced registers */ -#define JZ_UART0 0x10030000 -#define JZ_UART1 0x10031000 -#define JZ_UART2 0x10032000 -#define JZ_UART3 0x10033000 -#define JZ_UART4 0x10034000 - -/* LCD controller base addresses, registers are in jzfb_regs.h */ -#define JZ_LCDC0_BASE 0x13050000 -#define JZ_LCDC1_BASE 0x130a0000 - -/* TCU unit base address */ -#define JZ_TCU_BASE 0x10002000 - -/* Watchdog */ -#define JZ_WDOG_TDR 0x00000000 /* compare */ -#define JZ_WDOG_TCER 0x00000004 - #define TCER_ENABLE 0x01 /* enable counter */ -#define JZ_WDOG_TCNT 0x00000008 /* 16bit up count */ -#define JZ_WDOG_TCSR 0x0000000c - #define TCSR_PCK_EN 0x01 /* PCLK */ - #define TCSR_RTC_EN 0x02 /* RTCCLK - 32.768kHz */ - #define TCSR_EXT_EN 0x04 /* EXTCLK - 48MHz */ - #define TCSR_PRESCALE_M 0x38 - #define TCSR_DIV_1 0x00 - #define TCSR_DIV_4 0x08 - #define TCSR_DIV_16 0x10 - #define TCSR_DIV_64 0x18 - #define TCSR_DIV_256 0x20 - #define TCSR_DIV_1024 0x28 - -/* timers and PWMs */ -#define JZ_TC_TER 0x00000010 /* TC enable reg, ro */ -#define JZ_TC_TESR 0x00000014 /* TC enable set reg. */ - #define TESR_TCST0 0x0001 /* enable counter 0 */ - #define TESR_TCST1 0x0002 /* enable counter 1 */ - #define TESR_TCST2 0x0004 /* enable counter 2 */ - #define TESR_TCST3 0x0008 /* enable counter 3 */ - #define TESR_TCST4 0x0010 /* enable counter 4 */ - #define TESR_TCST5 0x0020 /* enable counter 5 */ - #define TESR_TCST6 0x0040 /* enable counter 6 */ - #define TESR_TCST7 0x0080 /* enable counter 7 */ - #define TESR_OST 0x8000 /* enable OST */ -#define JZ_TC_TECR 0x00000018 /* TC enable clear reg. */ -#define JZ_TC_TFR 0x00000020 - #define TFR_FFLAG0 0x00000001 /* channel 0 */ - #define TFR_FFLAG1 0x00000002 /* channel 1 */ - #define TFR_FFLAG2 0x00000004 /* channel 2 */ - #define TFR_FFLAG3 0x00000008 /* channel 3 */ - #define TFR_FFLAG4 0x00000010 /* channel 4 */ - #define TFR_FFLAG5 0x00000020 /* channel 5 */ - #define TFR_FFLAG6 0x00000040 /* channel 6 */ - #define TFR_FFLAG7 0x00000080 /* channel 7 */ - #define TFR_OSTFLAG 0x00008000 /* OS timer */ -#define JZ_TC_TFSR 0x00000024 /* timer flag set */ -#define JZ_TC_TFCR 0x00000028 /* timer flag clear */ -#define JZ_TC_TMR 0x00000030 /* timer flag mask */ - #define TMR_FMASK(n) (1 << (n)) - #define TMR_HMASK(n) (1 << ((n) + 16)) -#define JZ_TC_TMSR 0x00000034 /* timer flag mask set */ -#define JZ_TC_TMCR 0x00000038 /* timer flag mask clear*/ - -#define JZ_TC_TDFR(n) (0x00000040 + (n * 0x10)) /* FULL compare */ -#define JZ_TC_TDHR(n) (0x00000044 + (n * 0x10)) /* HALF compare */ -#define JZ_TC_TCNT(n) (0x00000048 + (n * 0x10)) /* count */ - -#define JZ_TC_TCSR(n) (0x0000004c + (n * 0x10)) -/* same bits as in JZ_WDOG_TCSR */ - -/* operating system timer */ -#define JZ_OST_DATA 0x000000e0 /* compare */ -#define JZ_OST_CNT_LO 0x000000e4 -#define JZ_OST_CNT_HI 0x000000e8 -#define JZ_OST_CTRL 0x000000ec - #define OSTC_PCK_EN 0x0001 /* use PCLK */ - #define OSTC_RTC_EN 0x0002 /* use RTCCLK */ - #define OSTC_EXT_EN 0x0004 /* use EXTCLK */ - #define OSTC_PRESCALE_M 0x0038 - #define OSTC_DIV_1 0x0000 - #define OSTC_DIV_4 0x0008 - #define OSTC_DIV_16 0x0010 - #define OSTC_DIV_64 0x0018 - #define OSTC_DIV_256 0x0020 - #define OSTC_DIV_1024 0x0028 - #define OSTC_SHUTDOWN 0x0200 - #define OSTC_MODE 0x8000 /* 0 - reset to 0 when = OST_DATA */ -#define JZ_OST_CNT_U32 0x000000fc /* copy of CNT_HI when reading CNT_LO */ - -static inline void -writereg(uint32_t reg, uint32_t val) -{ - *(volatile int32_t *)MIPS_PHYS_TO_KSEG1(reg) = val; - mips_wbflush(); -} - -static inline uint32_t -readreg(uint32_t reg) -{ - mips_wbflush(); - return *(volatile int32_t *)MIPS_PHYS_TO_KSEG1(reg); -} - -/* Clock management */ -#define JZ_CGU_BASE 0x10000000 - -#define JZ_CPCCR 0x00000000 /* Clock Control Register */ - #define JZ_PDIV_M 0x000f0000 /* PCLK divider mask */ - #define JZ_PDIV_S 16 /* PCLK divider shift */ - #define JZ_CDIV_M 0x0000000f /* CPU clock divider mask */ - #define JZ_CDIV_S 0 /* CPU clock divider shift */ -#define JZ_CPAPCR 0x00000010 /* APLL */ -#define JZ_CPMPCR 0x00000014 /* MPLL */ -#define JZ_CPEPCR 0x00000018 /* EPLL */ -#define JZ_CPVPCR 0x0000001C /* VPLL */ - #define JZ_PLLM_S 19 /* PLL multiplier shift */ - #define JZ_PLLM_M 0xfff80000 /* PLL multiplier mask */ - #define JZ_PLLN_S 13 /* PLL divider shift */ - #define JZ_PLLN_M 0x0007e000 /* PLL divider mask */ - #define JZ_PLLP_S 9 /* PLL postdivider shift */ - #define JZ_PLLP_M 0x00001700 /* PLL postdivider mask */ - #define JZ_PLLON 0x00000010 /* PLL is on and stable */ - #define JZ_PLLBP 0x00000002 /* PLL bypass */ - #define JZ_PLLEN 0x00000001 /* PLL enable */ -#define JZ_CLKGR0 0x00000020 /* Clock Gating Registers */ - #define CLK_NEMC (1 << 0) - #define CLK_BCH (1 << 1) - #define CLK_OTG0 (1 << 2) - #define CLK_MSC0 (1 << 3) - #define CLK_SSI0 (1 << 4) - #define CLK_SMB0 (1 << 5) - #define CLK_SMB1 (1 << 6) - #define CLK_SCC (1 << 7) - #define CLK_AIC (1 << 8) - #define CLK_TSSI0 (1 << 9) - #define CLK_OWI (1 << 10) - #define CLK_MSC1 (1 << 11) - #define CLK_MSC2 (1 << 12) - #define CLK_KBC (1 << 13) - #define CLK_SADC (1 << 14) - #define CLK_UART0 (1 << 15) - #define CLK_UART1 (1 << 16) - #define CLK_UART2 (1 << 17) - #define CLK_UART3 (1 << 18) - #define CLK_SSI1 (1 << 19) - #define CLK_SSI2 (1 << 20) - #define CLK_PDMA (1 << 21) - #define CLK_GPS (1 << 22) - #define CLK_MAC (1 << 23) - #define CLK_UHC (1 << 24) - #define CLK_SMB2 (1 << 25) - #define CLK_CIM (1 << 26) - #define CLK_TVE (1 << 27) - #define CLK_LCD (1 << 28) - #define CLK_IPU (1 << 29) - #define CLK_DDR0 (1 << 30) - #define CLK_DDR1 (1 << 31) -#define JZ_CLKGR1 0x00000028 /* Clock Gating Registers */ - #define CLK_SMB3 (1 << 0) - #define CLK_TSSI1 (1 << 1) - #define CLK_VPU (1 << 2) - #define CLK_PCM (1 << 3) - #define CLK_GPU (1 << 4) - #define CLK_COMPRESS (1 << 5) - #define CLK_AIC1 (1 << 6) - #define CLK_GPVLC (1 << 7) - #define CLK_OTG1 (1 << 8) - #define CLK_HDMI (1 << 9) - #define CLK_UART4 (1 << 10) - #define CLK_AHB_MON (1 << 11) - #define CLK_SMB4 (1 << 12) - #define CLK_DES (1 << 13) - #define CLK_X2D (1 << 14) - #define CLK_P1 (1 << 15) -#define JZ_DDCDR 0x0000002c /* DDR clock divider register */ -#define JZ_VPUCDR 0x00000030 /* VPU clock divider register */ -#define JZ_I2SCDR 0x00000060 /* I2S device clock divider register */ -#define JZ_I2S1CDR 0x000000a0 /* I2S device clock divider register */ -#define JZ_USBCDR 0x00000050 /* OTG PHY clock divider register */ -#define JZ_LP0CDR 0x00000054 /* LCD0 pix clock divider register */ -#define JZ_LP1CDR 0x00000064 /* LCD1 pix clock divider register */ -#define JZ_MSC0CDR 0x00000068 /* MSC0 clock divider register */ -#define JZ_MSC1CDR 0x000000a4 /* MSC1 clock divider register */ -#define JZ_MSC2CDR 0x000000a8 /* MSC2 clock divider register */ - #define MSCCDR_SCLK_A 0x40000000 - #define MSCCDR_MPLL 0x80000000 - #define MSCCDR_CE 0x20000000 - #define MSCCDR_BUSY 0x10000000 - #define MSCCDR_STOP 0x08000000 - #define MSCCDR_PHASE 0x00008000 /* 0 - 90deg phase, 1 - 180 */ - #define MSCCDR_DIV_M 0x000000ff /* src / ((div + 1) * 2) */ - #define UHCCDR_DIV_M 0x000000ff -#define JZ_UHCCDR 0x0000006c /* UHC 48M clock divider register */ - #define UHCCDR_SCLK_A 0x00000000 - #define UHCCDR_MPLL 0x40000000 - #define UHCCDR_EPLL 0x80000000 - #define UHCCDR_OTG_PHY 0xc0000000 - #define UHCCDR_CLK_MASK 0xc0000000 - #define UHCCDR_CE 0x20000000 - #define UHCCDR_BUSY 0x10000000 - #define UHCCDR_STOP 0x08000000 - #define UHCCDR_DIV_M 0x000000ff - #define UHCCDR_DIV(d) (d) -#define JZ_SSICDR 0x00000074 /* SSI clock divider register */ -#define JZ_CIMCDR 0x0000007c /* CIM MCLK clock divider register */ -#define JZ_PCMCDR 0x00000084 /* PCM device clock divider register */ -#define JZ_GPUCDR 0x00000088 /* GPU clock divider register */ -#define JZ_HDMICDR 0x0000008c /* HDMI clock divider register */ -#define JZ_BCHCDR 0x000000ac /* BCH clock divider register */ -#define JZ_CPM_INTR 0x000000b0 /* CPM interrupt register */ -#define JZ_CPM_INTRE 0x000000b4 /* CPM interrupt enable register */ -#define JZ_CPSPR 0x00000034 /* CPM scratch register */ -#define JZ_CPSRPR 0x00000038 /* CPM scratch protected register */ -#define JZ_USBPCR 0x0000003c /* USB parameter control register */ - #define PCR_USB_MODE 0x80000000 /* 1 - otg */ - #define PCR_AVLD_REG 0x40000000 - #define PCR_IDPULLUP_MASK 0x30000000 - #define PCR_INCR_MASK 0x08000000 - #define PCR_TCRISETUNE 0x04000000 - #define PCR_COMMONONN 0x02000000 - #define PCR_VBUSVLDEXT 0x01000000 - #define PCR_VBUSVLDEXTSEL 0x00800000 - #define PCR_POR 0x00400000 - #define PCR_SIDDQ 0x00200000 - #define PCR_OTG_DISABLE 0x00100000 - #define PCR_COMPDISTN_M 0x000e0000 - #define PCR_OTGTUNE 0x0001c000 - #define PCR_SQRXTUNE 0x00003800 - #define PCR_TXFSLSTUNE 0x00000780 - #define PCR_TXPREEMPHTUNE 0x00000040 - #define PCR_TXHSXVTUNE 0x00000030 - #define PCR_TXVREFTUNE 0x0000000f -#define JZ_USBRDT 0x00000040 /* Reset detect timer register */ - #define USBRDT_USBRDT_SHIFT 0 - #define USBRDT_USBRDT_WIDTH 23 - #define USBRDT_VBFIL_LD_EN 0x01000000 -#define JZ_USBVBFIL 0x00000044 /* USB jitter filter register */ - #define USBVBFIL_IDDIGFIL_SHIFT 16 - #define USBVBFIL_IDDIGFIL_WIDTH 16 - #define USBVBFIL_USBVBFIL_SHIFT 0 - #define USBVBFIL_USBVBFIL_WIDTH 16 -#define JZ_USBPCR1 0x00000048 /* USB parameter control register 1 */ - #define PCR_SYNOPSYS 0x10000000 /* Mentor mode otherwise */ - #define PCR_REFCLK_CORE 0x08000000 - #define PCR_REFCLK_XO25 0x04000000 - #define PCR_REFCLK_CO 0x00000000 - #define PCR_REFCLK_M 0x0c000000 - #define PCR_CLK_M 0x03000000 /* clock */ - #define PCR_CLK_192 0x03000000 /* 19.2MHz */ - #define PCR_CLK_48 0x02000000 /* 48MHz */ - #define PCR_CLK_24 0x01000000 /* 24MHz */ - #define PCR_CLK_12 0x00000000 /* 12MHz */ - #define PCR_DMPD1 0x00800000 /* pull down D- on port 1 */ - #define PCR_DPPD1 0x00400000 /* pull down D+ on port 1 */ - #define PCR_PORT0_RST 0x00200000 /* port 0 reset */ - #define PCR_PORT1_RST 0x00100000 /* port 1 reset */ - #define PCR_WORD_I_F0 0x00080000 /* 1: 16bit/30M, 8/60 otherw. */ - #define PCR_WORD_I_F1 0x00040000 /* same for port 1 */ - #define PCR_COMPDISTUNE 0x00038000 /* disconnect threshold */ - #define PCR_SQRXTUNE1 0x00007000 /* squelch threshold */ - #define PCR_TXFSLSTUNE1 0x00000f00 /* FS/LS impedance adj. */ - #define PCR_TXPREEMPH 0x00000080 /* HS transm. pre-emphasis */ - #define PCR_TXHSXVTUNE1 0x00000060 /* dp/dm voltage adj. */ - #define PCR_TXVREFTUNE1 0x00000017 /* HS DC voltage adj. */ - #define PCR_TXRISETUNE1 0x00000001 /* rise/fall wave adj. */ - -/* power manager */ -#define JZ_LPCR 0x00000004 - #define LPCR_PD_SCPU (1u << 31) /* CPU1 power down */ - #define LPCR_PD_VPU (1u << 30) /* VPU power down */ - #define LPCR_PD_GPU (1u << 29) /* GPU power down */ - #define LPCR_PD_GPS (1u << 28) /* GPS power down */ - #define LPCR_SCPUS (1u << 27) /* CPU1 power down status */ - #define LPCR_VPUS (1u << 26) /* VPU power down status */ - #define LPCR_GPUS (1u << 25) /* GPU power down status */ - #define LPCR_GPSS (1u << 24) /* GPS power down status */ - #define LPCR_GPU_IDLE (1u << 20) /* GPU idle status */ - #define LPCR_PST_SHIFT 8 /* Power stability time */ - #define LPCR_PST_MASK (0xFFFu << 8) - #define LPCR_DUTY_SHIFT 3 /* CPU clock duty */ - #define LPCR_DUTY_MASK (0x1Fu << 3) - #define LPCR_DOZE (1u << 2) /* Doze mode */ - #define LPCR_LPM_SHIFT 0 /* Low power mode */ - #define LPCR_LPM_MASK (0x03u << 0) - -#define JZ_OPCR 0x00000024 /* Oscillator Power Control Reg. */ - #define OPCR_IDLE_DIS 0x80000000 /* don't stop CPU clk on idle */ - #define OPCR_GPU_CLK_ST 0x40000000 /* stop GPU clock */ - #define OPCR_L2CM_M 0x0c000000 - #define OPCR_L2CM_ON 0x00000000 /* L2 stays on in sleep */ - #define OPCR_L2CM_RET 0x04000000 /* L2 retention mode in sleep */ - #define OPCR_L2CM_OFF 0x08000000 /* L2 powers down in sleep */ - #define OPCR_SPENDN0 0x00000080 /* 0 - OTG port forced down */ - #define OPCR_SPENDN1 0x00000040 /* 0 - UHC port forced down */ - #define OPCR_BUS_MODE 0x00000020 /* 1 - bursts */ - #define OPCR_O1SE 0x00000010 /* EXTCLK on in sleep */ - #define OPCR_PD 0x00000008 /* P0 down in sleep */ - #define OPCR_ERCS 0x00000004 /* 1 RTCCLK, 0 EXTCLK/512 */ - #define OPCR_CPU_MODE 0x00000002 /* 1 access 'accelerated' */ - #define OPCR_OSE 0x00000001 /* disable EXTCLK */ - -#define JZ_SPCR0 0x000000b8 /* SRAM Power Control Registers */ -#define JZ_SPCR1 0x000000bc -#define JZ_SRBC 0x000000c4 /* Soft Reset & Bus Control */ - #define SRBC_UHC_SR 0x00004000 /* UHC soft reset*/ - -/* - * random number generator - * - * Its function currently isn't documented by Ingenic. - * However, testing suggests that it works as expected. - */ -#define JZ_ERNG 0x000000d8 -#define JZ_RNG 0x000000dc - -/* Interrupt controller */ -#define JZ_ICBASE 0x10001000 /* IC base address */ -#define JZ_ICSR0 0x00000000 /* raw IRQ line status */ -#define JZ_ICMR0 0x00000004 /* IRQ mask, 1 masks IRQ */ -#define JZ_ICMSR0 0x00000008 /* sets bits in mask register */ -#define JZ_ICMCR0 0x0000000c /* clears bits in mask register */ -#define JZ_ICPR0 0x00000010 /* line status after masking */ - -#define JZ_ICSR1 0x00000020 /* raw IRQ line status */ -#define JZ_ICMR1 0x00000024 /* IRQ mask, 1 masks IRQ */ -#define JZ_ICMSR1 0x00000028 /* sets bits in mask register */ -#define JZ_ICMCR1 0x0000002c /* clears bits in maks register */ -#define JZ_ICPR1 0x00000030 /* line status after masking */ - -#define JZ_DSR0 0x00000034 /* source for PDMA */ -#define JZ_DMR0 0x00000038 /* mask for PDMA */ -#define JZ_DPR0 0x0000003c /* pending for PDMA */ - -#define JZ_DSR1 0x00000040 /* source for PDMA */ -#define JZ_DMR1 0x00000044 /* mask for PDMA */ -#define JZ_DPR1 0x00000048 /* pending for PDMA */ - -/* memory controller */ -#define JZ_DMMAP0 0x13010024 -#define JZ_DMMAP1 0x13010028 - #define DMMAP_BASE 0x0000ff00 /* base PADDR of memory chunk */ - #define DMMAP_MASK 0x000000ff /* mask which bits of PADDR are - * constant */ -/* USB controllers */ -#define JZ_EHCI_BASE 0x13490000 -#define JZ_EHCI_REG_UTMI_BUS 0x000000b0 - #define UTMI_BUS_WIDTH 0x00000040 -#define JZ_OHCI_BASE 0x134a0000 - -#define JZ_DWC2_BASE 0x13500000 -#define JZ_DWC2_GUSBCFG 0 - -/* Ethernet */ -#define JZ_DME_BASE 0x16000000 -#define JZ_DME_IO 0 -#define JZ_DME_DATA 2 - -/* GPIO */ -#define JZ_GPIO_A_BASE 0x10010000 -#define JZ_GPIO_B_BASE 0x10010100 -#define JZ_GPIO_C_BASE 0x10010200 -#define JZ_GPIO_D_BASE 0x10010300 -#define JZ_GPIO_E_BASE 0x10010400 -#define JZ_GPIO_F_BASE 0x10010500 - -/* GPIO registers per port */ -#define JZ_GPIO_PIN 0x00000000 /* pin level register */ -/* 0 - normal gpio, 1 - interrupt */ -#define JZ_GPIO_INT 0x00000010 /* interrupt register */ -#define JZ_GPIO_INTS 0x00000014 /* interrupt set register */ -#define JZ_GPIO_INTC 0x00000018 /* interrupt clear register */ -/* - * INT == 1: 1 disables interrupt - * INT == 0: device select, see below - */ -#define JZ_GPIO_MASK 0x00000020 /* port mask register */ -#define JZ_GPIO_MASKS 0x00000024 /* port mask set register */ -#define JZ_GPIO_MASKC 0x00000028 /* port mask clear register */ -/* - * INT == 1: 0 - level triggered, 1 - edge triggered - * INT == 0: 0 - device select, see below - */ -#define JZ_GPIO_PAT1 0x00000030 /* pattern 1 register */ -#define JZ_GPIO_PAT1S 0x00000034 /* pattern 1 set register */ -#define JZ_GPIO_PAT1C 0x00000038 /* pattern 1 clear register */ -/* - * INT == 1: - * PAT1 == 0: 0 - trigger on low, 1 - trigger on high - * PAT0 == 1: 0 - trigger on falling edge, 1 - trigger on rising edge - * INT == 0: - * MASK == 0: - * PAT1 == 0: 0 - device 0, 1 - device 1 - * PAT0 == 1: 0 - device 2, 1 - device 3 - * MASK == 1: - * PAT1 == 0: set gpio output - * PAT1 == 1: pin is input - */ -#define JZ_GPIO_PAT0 0x00000040 /* pattern 0 register */ -#define JZ_GPIO_PAT0S 0x00000044 /* pattern 0 set register */ -#define JZ_GPIO_PAT0C 0x00000048 /* pattern 0 clear register */ -/* 1 - interrupt happened */ -#define JZ_GPIO_FLAG 0x00000050 /* flag register */ -#define JZ_GPIO_FLAGC 0x00000058 /* flag clear register */ -/* 1 - disable pull up/down resistors */ -#define JZ_GPIO_DPULL 0x00000070 /* pull disable register */ -#define JZ_GPIO_DPULLS 0x00000074 /* pull disable set register */ -#define JZ_GPIO_DPULLC 0x00000078 /* pull disable clear register */ -/* the following are uncommented in the manual */ -#define JZ_GPIO_DRVL 0x00000080 /* drive low register */ -#define JZ_GPIO_DRVLS 0x00000084 /* drive low set register */ -#define JZ_GPIO_DRVLC 0x00000088 /* drive low clear register */ -#define JZ_GPIO_DIR 0x00000090 /* direction register */ -#define JZ_GPIO_DIRS 0x00000094 /* direction register */ -#define JZ_GPIO_DIRC 0x00000098 /* direction register */ -#define JZ_GPIO_DRVH 0x000000a0 /* drive high register */ -#define JZ_GPIO_DRVHS 0x000000a4 /* drive high set register */ -#define JZ_GPIO_DRVHC 0x000000a8 /* drive high clear register */ - -/* I2C / SMBus */ -#define JZ_SMB0_BASE 0x10050000 -#define JZ_SMB1_BASE 0x10051000 -#define JZ_SMB2_BASE 0x10052000 -#define JZ_SMB3_BASE 0x10053000 -#define JZ_SMB4_BASE 0x10054000 - -/* SMBus register offsets, per port */ -#define JZ_SMBCON 0x00 /* SMB control */ - #define JZ_STPHLD 0x80 /* Stop Hold Enable bit */ - #define JZ_SLVDIS 0x40 /* 1 - slave disabled */ - #define JZ_REST 0x20 /* 1 - allow RESTART */ - #define JZ_MATP 0x10 /* 1 - enable 10bit addr. for master */ - #define JZ_SATP 0x08 /* 1 - enable 10bit addr. for slave */ - #define JZ_SPD_M 0x06 /* bus speed control */ - #define JZ_SPD_100KB 0x02 /* 100kBit/s mode */ - #define JZ_SPD_400KB 0x04 /* 400kBit/s mode */ - #define JZ_MD 0x01 /* enable master */ -#define JZ_SMBTAR 0x04 /* SMB target address */ - #define JZ_SMATP 0x1000 /* enable 10bit master addr */ - #define JZ_SPECIAL 0x0800 /* 1 - special command */ - #define JZ_START 0x0400 /* 1 - send START */ - #define JZ_SMBTAR_M 0x03ff /* target address */ -#define JZ_SMBSAR 0x08 /* SMB slave address */ -#define JZ_SMBDC 0x10 /* SMB data buffer and command */ - #define JZ_CMD 0x100 /* 1 - read, 0 - write */ - #define JZ_DATA 0x0ff -#define JZ_SMBSHCNT 0x14 /* Standard speed SMB SCL high count */ -#define JZ_SMBSLCNT 0x18 /* Standard speed SMB SCL low count */ -#define JZ_SMBFHCNT 0x1C /* Fast speed SMB SCL high count */ -#define JZ_SMBFLCNT 0x20 /* Fast speed SMB SCL low count */ -#define JZ_SMBINTST 0x2C /* SMB Interrupt Status */ - #define JZ_ISTT 0x400 /* START or RESTART occured */ - #define JZ_ISTP 0x200 /* STOP occured */ - #define JZ_TXABT 0x40 /* ABORT occured */ - #define JZ_TXEMP 0x10 /* TX FIFO is low */ - #define JZ_TXOF 0x08 /* TX FIFO is high */ - #define JZ_RXFL 0x04 /* RX FIFO is at JZ_SMBRXTL*/ - #define JZ_RXOF 0x02 /* RX FIFO is high */ - #define JZ_RXUF 0x01 /* RX FIFO underflow */ -#define JZ_SMBINTM 0x30 /* SMB Interrupt Mask */ -#define JZ_SMBRXTL 0x38 /* SMB RxFIFO Threshold */ -#define JZ_SMBTXTL 0x3C /* SMB TxFIFO Threshold */ -#define JZ_SMBCINT 0x40 /* Clear Interrupts */ - #define JZ_CLEARALL 0x01 -#define JZ_SMBCRXUF 0x44 /* Clear RXUF Interrupt */ -#define JZ_SMBCRXOF 0x48 /* Clear RX_OVER Interrupt */ -#define JZ_SMBCTXOF 0x4C /* Clear TX_OVER Interrupt */ -#define JZ_SMBCRXREQ 0x50 /* Clear RDREQ Interrupt */ -#define JZ_SMBCTXABT 0x54 /* Clear TX_ABRT Interrupt */ -#define JZ_SMBCRXDN 0x58 /* Clear RX_DONE Interrupt */ -#define JZ_SMBCACT 0x5c /* Clear ACTIVITY Interrupt */ -#define JZ_SMBCSTP 0x60 /* Clear STOP Interrupt */ -#define JZ_SMBCSTT 0x64 /* Clear START Interrupt */ -#define JZ_SMBCGC 0x68 /* Clear GEN_CALL Interrupt */ -#define JZ_SMBENB 0x6C /* SMB Enable */ - #define JZ_ENABLE 0x01 -#define JZ_SMBST 0x70 /* SMB Status register */ - #define JZ_SLVACT 0x40 /* slave is active */ - #define JZ_MSTACT 0x20 /* master is active */ - #define JZ_RFF 0x10 /* RX FIFO is full */ - #define JZ_RFNE 0x08 /* RX FIFO not empty */ - #define JZ_TFE 0x04 /* TX FIFO is empty */ - #define JZ_TFNF 0x02 /* TX FIFO is not full */ - #define JZ_ACT 0x01 /* JZ_SLVACT | JZ_MSTACT */ -#define JZ_SMBABTSRC 0x80 /* SMB Transmit Abort Status Register */ -#define JZ_SMBDMACR 0x88 /* DMA Control Register */ -#define JZ_SMBDMATDL 0x8c /* DMA Transmit Data Level */ -#define JZ_SMBDMARDL 0x90 /* DMA Receive Data Level */ -#define JZ_SMBSDASU 0x94 /* SMB SDA Setup Register */ -#define JZ_SMBACKGC 0x98 /* SMB ACK General Call Register */ -#define JZ_SMBENBST 0x9C /* SMB Enable Status Register */ -#define JZ_SMBSDAHD 0xD0 /* SMB SDA HolD time Register */ - #define JZ_HDENB 0x100 /* enable hold time */ - -/* SD/MMC hosts */ -#define JZ_MSC0_BASE 0x13450000 -#define JZ_MSC1_BASE 0x13460000 -#define JZ_MSC2_BASE 0x13470000 - -#define JZ_MSC_CTRL 0x00 - #define JZ_SEND_CCSD 0x8000 - #define JZ_SEND_AS_CCSD 0x4000 - #define JZ_EXIT_MULTIPLE 0x0080 - #define JZ_EXIT_TRANSFER 0x0040 - #define JZ_START_READWAIT 0x0020 - #define JZ_STOP_READWAIT 0x0010 - #define JZ_RESET 0x0008 - #define JZ_START_OP 0x0004 - #define JZ_CLOCK_CTRL_M 0x0003 - #define JZ_CLOCK_START 0x0002 - #define JZ_CLOCK_STOP 0x0001 -#define JZ_MSC_STAT 0x04 - #define JZ_AUTO_CMD12_DONE 0x80000000 - #define JZ_AUTO_CMD23_DONE 0x40000000 - #define JZ_SVS 0x20000000 - #define JZ_PIN_LEVEL_M 0x1f000000 - #define JZ_BCE 0x00100000 /* boot CRC error */ - #define JZ_BDE 0x00080000 /* boot data end */ - #define JZ_BAE 0x00040000 /* boot acknowledge error */ - #define JZ_BAR 0x00020000 /* boot ack. received */ - #define JZ_DMAEND 0x00010000 - #define JZ_IS_RESETTING 0x00008000 - #define JZ_SDIO_INT_ACTIVE 0x00004000 - #define JZ_PRG_DONE 0x00002000 - #define JZ_DATA_TRAN_DONE 0x00001000 - #define JZ_END_CMD_RES 0x00000800 - #define JZ_DATA_FIFO_AFULL 0x00000400 - #define JZ_IS_READWAIT 0x00000200 - #define JZ_CLK_EN 0x00000100 - #define JZ_DATA_FIFO_FULL 0x00000080 - #define JZ_DATA_FIFO_EMPTY 0x00000040 - #define JZ_CRC_RES_ERR 0x00000020 - #define JZ_CRC_READ_ERR 0x00000010 - #define JZ_CRC_WRITE_ERR_M 0x0000000c - #define JZ_CRC_WRITE_OK 0x00000000 - #define JZ_CRC_CARD_ERR 0x00000004 - #define JZ_CRC_NO_STATUS 0x00000008 - #define JZ_TIME_OUT_RES 0x00000002 - #define JZ_TIME_OUT_READ 0x00000001 -#define JZ_MSC_CLKRT 0x08 - #define JZ_DEV_CLK 0x0 - #define JZ_DEV_CLK_2 0x1 /* DEV_CLK / 2 */ - #define JZ_DEV_CLK_4 0x2 /* DEV_CLK / 4 */ - #define JZ_DEV_CLK_8 0x3 /* DEV_CLK / 8 */ - #define JZ_DEV_CLK_16 0x4 /* DEV_CLK / 16 */ - #define JZ_DEV_CLK_32 0x5 /* DEV_CLK / 32 */ - #define JZ_DEV_CLK_64 0x6 /* DEV_CLK / 64 */ - #define JZ_DEV_CLK_128 0x7 /* DEV_CLK / 128 */ -#define JZ_MSC_CMDAT 0x0c - #define JZ_CCS_EXPECTED 0x80000000 - #define JZ_READ_CEATA 0x40000000 - #define JZ_DIS_BOOT 0x08000000 - #define JZ_ENA_BOOT 0x04000000 - #define JZ_EXP_BOOT_ACK 0x02000000 - #define JZ_BOOT_MODE 0x01000000 - #define JZ_AUTO_CMD23 0x00040000 - #define JZ_SDIO_PRDT 0x00020000 - #define JZ_AUTO_CMD12 0x00010000 - #define JZ_RTRG_M 0x0000c000 /* receive FIFO trigger */ - #define JZ_RTRG_16 0x00000000 /* >= 16 */ - #define JZ_RTRG_32 0x00004000 /* >= 32 */ - #define JZ_RTRG_64 0x00008000 /* >= 64 */ - #define JZ_RTRG_96 0x0000c000 /* >= 96 */ - #define JZ_TTRG_M 0x00003000 /* transmit FIFO trigger */ - #define JZ_TTRG_16 0x00000000 /* >= 16 */ - #define JZ_TTRG_32 0x00001000 /* >= 32 */ - #define JZ_TTRG_64 0x00002000 /* >= 64 */ - #define JZ_TTRG_96 0x00003000 /* >= 96 */ - #define JZ_IO_ABORT 0x00000800 - #define JZ_BUS_WIDTH_M 0x00000600 - #define JZ_BUS_1BIT 0x00000000 - #define JZ_BUS_4BIT 0x00000400 - #define JZ_BUS_8BIT 0x00000600 - #define JZ_INIT 0x00000080 /* send 80 clk init before cmd */ - #define JZ_BUSY 0x00000040 - #define JZ_STREAM 0x00000020 - #define JZ_WRITE 0x00000010 /* read otherwise */ - #define JZ_DATA_EN 0x00000008 - #define JZ_RESPONSE_M 0x00000007 /* response format */ - #define JZ_RES_NONE 0x00000000 - #define JZ_RES_R1 0x00000001 /* R1 and R1b */ - #define JZ_RES_R2 0x00000002 - #define JZ_RES_R3 0x00000003 - #define JZ_RES_R4 0x00000004 - #define JZ_RES_R5 0x00000005 - #define JZ_RES_R6 0x00000006 - #define JZ_RES_R7 0x00000007 -#define JZ_MSC_RESTO 0x10 /* 16bit response timeout in MSC_CLK */ -#define JZ_MSC_RDTO 0x14 /* 32bit read timeout in MSC_CLK */ -#define JZ_MSC_BLKLEN 0x18 /* 16bit block length */ -#define JZ_MSC_NOB 0x1c /* 16bit block counter */ -#define JZ_MSC_SNOB 0x20 /* 16bit successful block counter */ -#define JZ_MSC_IMASK 0x24 /* interrupt mask */ - #define JZ_INT_AUTO_CMD23_DONE 0x40000000 - #define JZ_INT_SVS 0x20000000 - #define JZ_INT_PIN_LEVEL_M 0x1f000000 - #define JZ_INT_BCE 0x00100000 - #define JZ_INT_BDE 0x00080000 - #define JZ_INT_BAE 0x00040000 - #define JZ_INT_BAR 0x00020000 - #define JZ_INT_DMAEND 0x00010000 - #define JZ_INT_AUTO_CMD12_DONE 0x00008000 - #define JZ_INT_DATA_FIFO_FULL 0x00004000 - #define JZ_INT_DATA_FIFO_EMPTY 0x00002000 - #define JZ_INT_CRC_RES_ERR 0x00001000 - #define JZ_INT_CRC_READ_ERR 0x00000800 - #define JZ_INT_CRC_WRITE_ERR 0x00000400 - #define JZ_INT_TIMEOUT_RES 0x00000200 - #define JZ_INT_TIMEOUT_READ 0x00000100 - #define JZ_INT_SDIO 0x00000080 - #define JZ_INT_TXFIFO_WR_REQ 0x00000040 - #define JZ_INT_RXFIFO_RD_REQ 0x00000020 - #define JZ_INT_END_CMD_RES 0x00000004 - #define JZ_INT_PRG_DONE 0x00000002 - #define JZ_INT_DATA_TRAN_DONE 0x00000001 -#define JZ_MSC_IFLG 0x28 /* interrupt flags */ -#define JZ_MSC_CMD 0x2c /* 6bit CMD index */ -#define JZ_MSC_ARG 0x30 /* 32bit argument */ -#define JZ_MSC_RES 0x34 /* 8x16bit response data FIFO */ -#define JZ_MSC_RXFIFO 0x38 -#define JZ_MSC_TXFIFO 0x3c -#define JZ_MSC_LPM 0x40 - #define JZ_DRV_SEL_M 0xc0000000 - #define JZ_FALLING_EDGE 0x00000000 - #define JZ_RISING_1NS 0x40000000 /* 1ns delay */ - #define JZ_RISING_4 0x80000000 /* 1/4 MSC_CLK delay */ - #define JZ_SMP_SEL 0x20000000 /* 1 - rising edge */ - #define JZ_LPM 0x00000001 /* low power mode */ -#define JZ_MSC_DMAC 0x44 - #define JZ_MODE_SEL 0x80 /* 1 - specify transfer length */ - #define JZ_AOFST_M 0x60 /* address offset in bytes */ - #define JZ_AOFST_S 6 /* addrress offset shift */ - #define JZ_ALIGNEN 0x10 /* allow non-32bit-aligned transfers */ - #define JZ_INCR_M 0x0c /* burst type */ - #define JZ_INCR_16 0x00 - #define JZ_INCR_32 0x04 - #define JZ_INCR_64 0x08 - #define JZ_DMASEL 0x02 /* 1 - SoC DMAC, 0 - MSC built-in */ - #define JZ_DMAEN 0x01 /* enable DMA */ -#define JZ_MSC_DMANDA 0x48 /* next descriptor paddr */ -#define JZ_MSC_DMADA 0x4c /* current descriptor */ -#define JZ_MSC_DMALEN 0x50 /* transfer tength */ -#define JZ_MSC_DMACMD 0x54 - #define JZ_DMA_IDI_M 0xff000000 - #define JZ_DMA_ID_M 0x00ff0000 - #define JZ_DMA_AOFST_M 0x00000600 - #define JZ_DMA_ALIGN 0x00000100 - #define JZ_DMA_ENDI 0x00000002 - #define JZ_DMA_LINK 0x00000001 -#define JZ_MSC_CTRL2 0x58 - #define JZ_PIP 0x1f000000 /* 1 - intr trigger on high */ - #define JZ_RST_EN 0x00800000 - #define JZ_STPRM 0x00000010 - #define JZ_SVC 0x00000008 - #define JZ_SMS_M 0x00000007 - #define JZ_SMS_DEF 0x00000000 /* default speed */ - #define JZ_SMS_HIGH 0x00000001 /* high speed */ - #define JZ_SMS_SDR12 0x00000002 - #define JZ_SMS_SDR25 0x00000003 - #define JZ_SMS_SDR50 0x00000004 -#define JZ_MSC_RTCNT 0x5c /* RT FIFO count */ - -/* EFUSE Slave Interface */ -#define JZ_EFUSE 0x134100D0 -#define JZ_EFUCTRL 0x00 - #define JZ_EFUSE_BANK 0x40000000 /* select upper 4KBit */ - #define JZ_EFUSE_ADDR_M 0x3fe00000 /* in bytes */ - #define JZ_EFUSE_ADDR_SHIFT 21 - #define JZ_EFUSE_SIZE_M 0x001f0000 /* in bytes */ - #define JZ_EFUSE_SIZE_SHIFT 16 - #define JZ_EFUSE_PROG 0x00008000 /* enable programming */ - #define JZ_EFUSE_WRITE 0x00000002 /* write enable */ - #define JZ_EFUSE_READ 0x00000001 /* read enable */ -#define JZ_EFUCFG 0x04 - #define JZ_EFUSE_INT_E 0x80000000 /* which IRQ? */ - #define JZ_EFUSE_RD_ADJ_M 0x00f00000 - #define JZ_EFUSE_RD_STROBE 0x000f0000 - #define JZ_EFUSE_WR_ADJUST 0x0000f000 - #define JZ_EFUSE_WR_STROBE 0x00000fff -#define JZ_EFUSTATE 0x08 - #define JZ_EFUSE_GLOBAL_P 0x00008000 /* wr protect bits */ - #define JZ_EFUSE_CHIPID_P 0x00004000 - #define JZ_EFUSE_CUSTID_P 0x00002000 - #define JZ_EFUSE_SECWR_EN 0x00001000 - #define JZ_EFUSE_PC_P 0x00000800 - #define JZ_EFUSE_HDMIKEY_P 0x00000400 - #define JZ_EFUSE_SECKEY_P 0x00000200 - #define JZ_EFUSE_SECBOOT_EN 0x00000100 - #define JZ_EFUSE_HDMI_BUSY 0x00000004 - #define JZ_EFUSE_WR_DONE 0x00000002 - #define JZ_EFUSE_RD_DONE 0x00000001 -#define JZ_EFUDATA0 0x0C -#define JZ_EFUDATA1 0x10 -#define JZ_EFUDATA2 0x14 -#define JZ_EFUDATA3 0x18 -#define JZ_EFUDATA4 0x1C -#define JZ_EFUDATA5 0x20 -#define JZ_EFUDATA6 0x24 -#define JZ_EFUDATA7 0x28 - -/* NEMC */ -#define JZ_NEMC_BASE 0x13410000 -#define JZ_NEMC_SMCR(n) (0x10 + (n) * 4) - -# define JZ_NEMC_SMCR_SMT_SHIFT 0 -# define JZ_NEMC_SMCR_SMT_WIDTH 1 -# define JZ_NEMC_SMCR_SMT_MASK (((1 << JZ_NEMC_SMCR_SMT_WIDTH) - 1) << JZ_NEMC_SMCR_SMT_SHIFT) -# define JZ_NEMC_SMCR_SMT_NORMAL (0 << JZ_NEMC_SMCR_SMT_SHIFT) -# define JZ_NEMC_SMCR_SMT_BROM (1 << JZ_NEMC_SMCR_SMT_SHIFT) - -# define JZ_NEMC_SMCR_BL_SHIFT 1 -# define JZ_NEMC_SMCR_BL_WIDTH 2 -# define JZ_NEMC_SMCR_BL_MASK (((1 << JZ_NEMC_SMCR_BL_WIDTH) - 1) << JZ_NEMC_SMCR_BL_SHIFT) -# define JZ_NEMC_SMCR_BL(n) (((n) << JZ_NEMC_SMCR_BL_SHIFT) - -# define JZ_NEMC_SMCR_BW_SHIFT 6 -# define JZ_NEMC_SMCR_BW_WIDTH 2 -# define JZ_NEMC_SMCR_BW_MASK (((1 << JZ_NEMC_SMCR_BW_WIDTH) - 1) << JZ_NEMC_SMCR_BW_SHIFT) -# define JZ_NEMC_SMCR_BW_8 (0 << JZ_NEMC_SMCR_BW_SHIFT) - -# define JZ_NEMC_SMCR_TAS_SHIFT 8 -# define JZ_NEMC_SMCR_TAS_WIDTH 4 -# define JZ_NEMC_SMCR_TAS_MASK (((1 << JZ_NEMC_SMCR_TAS_WIDTH) - 1) << JZ_NEMC_SMCR_TAS_SHIFT) - -# define JZ_NEMC_SMCR_TAH_SHIFT 12 -# define JZ_NEMC_SMCR_TAH_WIDTH 4 -# define JZ_NEMC_SMCR_TAH_MASK (((1 << JZ_NEMC_SMCR_TAH_WIDTH) - 1) << JZ_NEMC_SMCR_TAH_SHIFT) - -# define JZ_NEMC_SMCR_TBP_SHIFT 16 -# define JZ_NEMC_SMCR_TBP_WIDTH 4 -# define JZ_NEMC_SMCR_TBP_MASK (((1 << JZ_NEMC_SMCR_TBP_WIDTH) - 1) << JZ_NEMC_SMCR_TBP_SHIFT) - -# define JZ_NEMC_SMCR_TAW_SHIFT 20 -# define JZ_NEMC_SMCR_TAW_WIDTH 4 -# define JZ_NEMC_SMCR_TAW_MASK (((1 << JZ_NEMC_SMCR_TAW_WIDTH) - 1) << JZ_NEMC_SMCR_TAW_SHIFT) - -# define JZ_NEMC_SMCR_STRV_SHIFT 24 -# define JZ_NEMC_SMCR_STRV_WIDTH 4 -# define JZ_NEMC_SMCR_STRV_MASK (((1 << JZ_NEMC_SMCR_STRV_WIDTH) - 1) << JZ_NEMC_SMCR_STRV_SHIFT) - -#define JZ_NEMC_SACR(n) (0x30 + (n) * 4) - -# define JZ_NEMC_SACR_MASK_SHIFT 0 -# define JZ_NEMC_SACR_MASK_WIDTH 8 -# define JZ_NEMC_SACR_MASK_MASK (((1 << JZ_NEMC_SACR_MASK_WIDTH) - 1) << JZ_NEMC_SACR_MASK_SHIFT) - -# define JZ_NEMC_SACR_ADDR_SHIFT 0 -# define JZ_NEMC_SACR_ADDR_WIDTH 8 -# define JZ_NEMC_SACR_ADDR_MASK (((1 << JZ_NEMC_SACR_ADDR_WIDTH) - 1) << JZ_NEMC_SACR_ADDR_SHIFT) - -#define JC_NEMC_NFSCR 0x50 - -#endif /* JZ4780_REGS_H */ diff --git a/sys/mips/ingenic/jz4780_rtc.c b/sys/mips/ingenic/jz4780_rtc.c deleted file mode 100644 index e4d20347955..00000000000 --- a/sys/mips/ingenic/jz4780_rtc.c +++ /dev/null @@ -1,232 +0,0 @@ -/*- - * Copyright 2016 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Ingenic JZ4780 RTC driver - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include "clock_if.h" - -#define JZ_RTC_TIMEOUT 5000 - -#define JZ_RTCCR 0x00 -# define JZ_RTCCR_WRDY (1u << 7) -#define JZ_RTSR 0x04 -#define JZ_HSPR 0x34 -#define JZ_WENR 0x3C -# define JZ_WENR_PAT 0xa55a -# define JZ_WENR_WEN (1u <<31) - -struct jz4780_rtc_softc { - device_t dev; - struct resource *res[2]; -}; - -static struct resource_spec jz4780_rtc_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { SYS_RES_IRQ, 0, RF_ACTIVE }, - { -1, 0 } -}; - -#define CSR_READ(sc, reg) bus_read_4((sc)->res[0], (reg)) -#define CSR_WRITE(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val)) - -static int jz4780_rtc_probe(device_t dev); -static int jz4780_rtc_attach(device_t dev); -static int jz4780_rtc_detach(device_t dev); - -static int -jz4780_rtc_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-rtc")) - return (ENXIO); - - device_set_desc(dev, "JZ4780 RTC"); - - return (BUS_PROBE_DEFAULT); -} - -/* Poll control register until RTC is ready to accept register writes */ -static int -jz4780_rtc_wait(struct jz4780_rtc_softc *sc) -{ - int timeout; - - timeout = JZ_RTC_TIMEOUT; - while (timeout-- > 0) { - if (CSR_READ(sc, JZ_RTCCR) & JZ_RTCCR_WRDY) - return (0); - } - return (EIO); -} - -/* - * Write RTC register. It appears that RTC goes into read-only mode at random, - * which suggests something is up with how it is powered up, so do the pattern - * writing dance every time just in case. - */ -static int -jz4780_rtc_write(struct jz4780_rtc_softc *sc, uint32_t reg, uint32_t val) -{ - int ret, timeout; - - ret = jz4780_rtc_wait(sc); - if (ret != 0) - return (ret); - - CSR_WRITE(sc, JZ_WENR, JZ_WENR_PAT); - - ret = jz4780_rtc_wait(sc); - if (ret) - return ret; - - timeout = JZ_RTC_TIMEOUT; - while (timeout-- > 0) { - if (CSR_READ(sc, JZ_WENR) & JZ_WENR_WEN) - break; - } - if (timeout < 0) - return (EIO); - - CSR_WRITE(sc, reg, val); - return 0; -} - -static int -jz4780_rtc_attach(device_t dev) -{ - struct jz4780_rtc_softc *sc = device_get_softc(dev); - uint32_t scratch; - int ret; - - sc->dev = dev; - - if (bus_alloc_resources(dev, jz4780_rtc_spec, sc->res)) { - device_printf(dev, "could not allocate resources for device\n"); - return (ENXIO); - } - - scratch = CSR_READ(sc, JZ_HSPR); - if (scratch != 0x12345678) { - ret = jz4780_rtc_write(sc, JZ_HSPR, 0x12345678); - if (ret == 0) - ret = jz4780_rtc_write(sc, JZ_RTSR, 0); - if (ret) { - device_printf(dev, "Unable to write RTC registers\n"); - jz4780_rtc_detach(dev); - return (ret); - } - } - clock_register(dev, 1000000); /* Register 1 HZ clock */ - return (0); -} - -static int -jz4780_rtc_detach(device_t dev) -{ - struct jz4780_rtc_softc *sc; - - sc = device_get_softc(dev); - bus_release_resources(dev, jz4780_rtc_spec, sc->res); - return (0); -} - -static int -jz4780_rtc_gettime(device_t dev, struct timespec *ts) -{ - struct jz4780_rtc_softc *sc; - uint32_t val1, val2; - int timeout; - - sc = device_get_softc(dev); - - timeout = JZ_RTC_TIMEOUT; - val2 = CSR_READ(sc, JZ_RTSR); - do { - val1 = val2; - val2 = CSR_READ(sc, JZ_RTSR); - } while (val1 != val2 && timeout-- >= 0); - - if (timeout < 0) - return (EIO); - - /* Convert secs to timespec directly */ - ts->tv_sec = val1; - ts->tv_nsec = 0; - return 0; -} - -static int -jz4780_rtc_settime(device_t dev, struct timespec *ts) -{ - struct jz4780_rtc_softc *sc; - - sc = device_get_softc(dev); - return jz4780_rtc_write(sc, JZ_RTSR, ts->tv_sec); -} - -static device_method_t jz4780_rtc_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, jz4780_rtc_probe), - DEVMETHOD(device_attach, jz4780_rtc_attach), - DEVMETHOD(device_detach, jz4780_rtc_detach), - - DEVMETHOD(clock_gettime, jz4780_rtc_gettime), - DEVMETHOD(clock_settime, jz4780_rtc_settime), - - DEVMETHOD_END -}; - -static driver_t jz4780_rtc_driver = { - "jz4780_rtc", - jz4780_rtc_methods, - sizeof(struct jz4780_rtc_softc), -}; - -static devclass_t jz4780_rtc_devclass; - -EARLY_DRIVER_MODULE(jz4780_rtc, simplebus, jz4780_rtc_driver, - jz4780_rtc_devclass, 0, 0, BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE); diff --git a/sys/mips/ingenic/jz4780_smb.c b/sys/mips/ingenic/jz4780_smb.c deleted file mode 100644 index 8a7edf0fcd1..00000000000 --- a/sys/mips/ingenic/jz4780_smb.c +++ /dev/null @@ -1,477 +0,0 @@ -/*- - * Copyright (c) 2016 Jared McNeill - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Ingenic JZ4780 SMB Controller - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include - -#include - -#include "iicbus_if.h" - -#define JZSMB_TIMEOUT ((300UL * hz) / 1000) - -#define JZSMB_SPEED_STANDARD 100000 -#define JZSMB_SETUP_TIME_STANDARD 300 -#define JZSMB_HOLD_TIME_STANDARD 400 -#define JZSMB_PERIOD_MIN_STANDARD 4000 -#define JZSMB_PERIOD_MAX_STANDARD 4700 - -#define JZSMB_SPEED_FAST 400000 -#define JZSMB_SETUP_TIME_FAST 450 -#define JZSMB_HOLD_TIME_FAST 450 -#define JZSMB_PERIOD_MIN_FAST 600 -#define JZSMB_PERIOD_MAX_FAST 1300 - -#define JZSMB_HCNT_BASE 8 -#define JZSMB_HCNT_MIN 6 -#define JZSMB_LCNT_BASE 1 -#define JZSMB_LCNT_MIN 8 - -static inline int -tstohz(const struct timespec *tsp) -{ - struct timeval tv; - - TIMESPEC_TO_TIMEVAL(&tv, tsp); - return (tvtohz(&tv)); -} - -static struct ofw_compat_data compat_data[] = { - { "ingenic,jz4780-i2c", 1 }, - { NULL, 0 } -}; - -static struct resource_spec jzsmb_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { -1, 0 } -}; - -struct jzsmb_softc { - struct resource *res; - struct mtx mtx; - clk_t clk; - device_t iicbus; - int busy; - uint32_t i2c_freq; - uint64_t bus_freq; - uint32_t status; - - struct iic_msg *msg; -}; - -#define SMB_LOCK(sc) mtx_lock(&(sc)->mtx) -#define SMB_UNLOCK(sc) mtx_unlock(&(sc)->mtx) -#define SMB_ASSERT_LOCKED(sc) mtx_assert(&(sc)->mtx, MA_OWNED) -#define SMB_READ(sc, reg) bus_read_2((sc)->res, (reg)) -#define SMB_WRITE(sc, reg, val) bus_write_2((sc)->res, (reg), (val)) - -static phandle_t -jzsmb_get_node(device_t bus, device_t dev) -{ - return (ofw_bus_get_node(bus)); -} - -static int -jzsmb_enable(struct jzsmb_softc *sc, int enable) -{ - SMB_ASSERT_LOCKED(sc); - - if (enable) { - SMB_WRITE(sc, SMBENB, SMBENB_SMBENB); - while ((SMB_READ(sc, SMBENBST) & SMBENBST_SMBEN) == 0) - ; - } else { - SMB_WRITE(sc, SMBENB, 0); - while ((SMB_READ(sc, SMBENBST) & SMBENBST_SMBEN) != 0) - ; - } - - return (0); -} - -static int -jzsmb_reset_locked(device_t dev, u_char addr) -{ - struct jzsmb_softc *sc; - uint16_t con; - uint32_t period; - int hcnt, lcnt, setup_time, hold_time; - - sc = device_get_softc(dev); - - SMB_ASSERT_LOCKED(sc); - - /* Setup master mode operation */ - - /* Disable SMB */ - jzsmb_enable(sc, 0); - - /* Disable interrupts */ - SMB_WRITE(sc, SMBINTM, 0); - - /* Set supported speed mode and expected SCL frequency */ - period = sc->bus_freq / sc->i2c_freq; - con = SMBCON_REST | SMBCON_SLVDIS | SMBCON_MD; - switch (sc->i2c_freq) { - case JZSMB_SPEED_STANDARD: - con |= SMBCON_SPD_STANDARD; - setup_time = JZSMB_SETUP_TIME_STANDARD; - hold_time = JZSMB_HOLD_TIME_STANDARD; - hcnt = (period * JZSMB_PERIOD_MIN_STANDARD) / - (JZSMB_PERIOD_MAX_STANDARD + JZSMB_PERIOD_MIN_STANDARD); - lcnt = period - hcnt; - hcnt = MAX(hcnt - JZSMB_HCNT_BASE, JZSMB_HCNT_MIN); - lcnt = MAX(lcnt - JZSMB_LCNT_BASE, JZSMB_LCNT_MIN); - SMB_WRITE(sc, SMBCON, con); - SMB_WRITE(sc, SMBSHCNT, hcnt); - SMB_WRITE(sc, SMBSLCNT, lcnt); - break; - case JZSMB_SPEED_FAST: - con |= SMBCON_SPD_FAST; - setup_time = JZSMB_SETUP_TIME_FAST; - hold_time = JZSMB_HOLD_TIME_FAST; - hcnt = (period * JZSMB_PERIOD_MIN_FAST) / - (JZSMB_PERIOD_MAX_FAST + JZSMB_PERIOD_MIN_FAST); - lcnt = period - hcnt; - hcnt = MAX(hcnt - JZSMB_HCNT_BASE, JZSMB_HCNT_MIN); - lcnt = MAX(lcnt - JZSMB_LCNT_BASE, JZSMB_LCNT_MIN); - SMB_WRITE(sc, SMBCON, con); - SMB_WRITE(sc, SMBFHCNT, hcnt); - SMB_WRITE(sc, SMBFLCNT, lcnt); - break; - default: - return (EINVAL); - } - - setup_time = ((setup_time * sc->bus_freq / 1000) / 1000000) + 1; - setup_time = MIN(1, MAX(255, setup_time)); - SMB_WRITE(sc, SMBSDASU, setup_time); - - hold_time = ((hold_time * sc->bus_freq / 1000) / 1000000) - 1; - hold_time = MAX(255, hold_time); - if (hold_time >= 0) - SMB_WRITE(sc, SMBSDAHD, hold_time | SMBSDAHD_HDENB); - else - SMB_WRITE(sc, SMBSDAHD, 0); - - SMB_WRITE(sc, SMBTAR, addr >> 1); - - if (addr != 0) { - /* Enable SMB */ - jzsmb_enable(sc, 1); - } - - return (0); -} - -static int -jzsmb_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr) -{ - struct jzsmb_softc *sc; - int error; - - sc = device_get_softc(dev); - - SMB_LOCK(sc); - error = jzsmb_reset_locked(dev, addr); - SMB_UNLOCK(sc); - - return (error); -} - -static int -jzsmb_transfer_read(device_t dev, struct iic_msg *msg) -{ - struct jzsmb_softc *sc; - struct timespec start, diff; - uint16_t con, resid; - int timeo; - - sc = device_get_softc(dev); - timeo = JZSMB_TIMEOUT * msg->len; - - SMB_ASSERT_LOCKED(sc); - - con = SMB_READ(sc, SMBCON); - con |= SMBCON_STPHLD; - SMB_WRITE(sc, SMBCON, con); - - getnanouptime(&start); - for (resid = msg->len; resid > 0; resid--) { - for (int i = 0; i < min(resid, 8); i++) - SMB_WRITE(sc, SMBDC, SMBDC_CMD); - for (;;) { - getnanouptime(&diff); - timespecsub(&diff, &start, &diff); - if ((SMB_READ(sc, SMBST) & SMBST_RFNE) != 0) { - msg->buf[msg->len - resid] = - SMB_READ(sc, SMBDC) & SMBDC_DAT; - break; - } else - DELAY(1000); - - if (tstohz(&diff) >= timeo) { - device_printf(dev, - "read timeout (status=0x%02x)\n", - SMB_READ(sc, SMBST)); - return (EIO); - } - } - } - - con = SMB_READ(sc, SMBCON); - con &= ~SMBCON_STPHLD; - SMB_WRITE(sc, SMBCON, con); - - return (0); -} - -static int -jzsmb_transfer_write(device_t dev, struct iic_msg *msg, int stop_hold) -{ - struct jzsmb_softc *sc; - struct timespec start, diff; - uint16_t con, resid; - int timeo; - - sc = device_get_softc(dev); - timeo = JZSMB_TIMEOUT * msg->len; - - SMB_ASSERT_LOCKED(sc); - - con = SMB_READ(sc, SMBCON); - con |= SMBCON_STPHLD; - SMB_WRITE(sc, SMBCON, con); - - getnanouptime(&start); - for (resid = msg->len; resid > 0; resid--) { - for (;;) { - getnanouptime(&diff); - timespecsub(&diff, &start, &diff); - if ((SMB_READ(sc, SMBST) & SMBST_TFNF) != 0) { - SMB_WRITE(sc, SMBDC, - msg->buf[msg->len - resid]); - break; - } else - DELAY((1000 * hz) / JZSMB_TIMEOUT); - - if (tstohz(&diff) >= timeo) { - device_printf(dev, - "write timeout (status=0x%02x)\n", - SMB_READ(sc, SMBST)); - return (EIO); - } - } - } - - if (!stop_hold) { - con = SMB_READ(sc, SMBCON); - con &= ~SMBCON_STPHLD; - SMB_WRITE(sc, SMBCON, con); - } - - return (0); -} - -static int -jzsmb_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs) -{ - struct jzsmb_softc *sc; - uint32_t n; - uint16_t con; - int error; - - sc = device_get_softc(dev); - - SMB_LOCK(sc); - while (sc->busy) - mtx_sleep(sc, &sc->mtx, 0, "i2cbuswait", 0); - sc->busy = 1; - sc->status = 0; - - for (n = 0; n < nmsgs; n++) { - /* Set target address */ - if (n == 0 || msgs[n].slave != msgs[n - 1].slave) - jzsmb_reset_locked(dev, msgs[n].slave); - - /* Set read or write */ - if ((msgs[n].flags & IIC_M_RD) != 0) - error = jzsmb_transfer_read(dev, &msgs[n]); - else - error = jzsmb_transfer_write(dev, &msgs[n], - n < nmsgs - 1); - - if (error != 0) - goto done; - } - -done: - /* Send stop if necessary */ - con = SMB_READ(sc, SMBCON); - con &= ~SMBCON_STPHLD; - SMB_WRITE(sc, SMBCON, con); - - /* Disable SMB */ - jzsmb_enable(sc, 0); - - sc->msg = NULL; - sc->busy = 0; - wakeup(sc); - SMB_UNLOCK(sc); - - return (error); -} - -static int -jzsmb_probe(device_t dev) -{ - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) - return (ENXIO); - - device_set_desc(dev, "Ingenic JZ4780 SMB Controller"); - - return (BUS_PROBE_DEFAULT); -} - -static int -jzsmb_attach(device_t dev) -{ - struct jzsmb_softc *sc; - phandle_t node; - int error; - - sc = device_get_softc(dev); - node = ofw_bus_get_node(dev); - mtx_init(&sc->mtx, device_get_nameunit(dev), "jzsmb", MTX_DEF); - - error = clk_get_by_ofw_index(dev, 0, 0, &sc->clk); - if (error != 0) { - device_printf(dev, "cannot get clock\n"); - goto fail; - } - error = clk_enable(sc->clk); - if (error != 0) { - device_printf(dev, "cannot enable clock\n"); - goto fail; - } - error = clk_get_freq(sc->clk, &sc->bus_freq); - if (error != 0 || sc->bus_freq == 0) { - device_printf(dev, "cannot get bus frequency\n"); - return (error); - } - - if (bus_alloc_resources(dev, jzsmb_spec, &sc->res) != 0) { - device_printf(dev, "cannot allocate resources for device\n"); - error = ENXIO; - goto fail; - } - - if (OF_getencprop(node, "clock-frequency", &sc->i2c_freq, - sizeof(sc->i2c_freq)) != 0 || sc->i2c_freq == 0) - sc->i2c_freq = 100000; /* Default to standard mode */ - - sc->iicbus = device_add_child(dev, "iicbus", -1); - if (sc->iicbus == NULL) { - device_printf(dev, "cannot add iicbus child device\n"); - error = ENXIO; - goto fail; - } - - bus_generic_attach(dev); - - return (0); - -fail: - bus_release_resources(dev, jzsmb_spec, &sc->res); - if (sc->clk != NULL) - clk_release(sc->clk); - mtx_destroy(&sc->mtx); - return (error); -} - -static device_method_t jzsmb_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, jzsmb_probe), - DEVMETHOD(device_attach, jzsmb_attach), - - /* Bus interface */ - DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), - DEVMETHOD(bus_release_resource, bus_generic_release_resource), - DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), - DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), - DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource), - DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), - DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), - - /* OFW methods */ - DEVMETHOD(ofw_bus_get_node, jzsmb_get_node), - - /* iicbus interface */ - DEVMETHOD(iicbus_callback, iicbus_null_callback), - DEVMETHOD(iicbus_reset, jzsmb_reset), - DEVMETHOD(iicbus_transfer, jzsmb_transfer), - - DEVMETHOD_END -}; - -static driver_t jzsmb_driver = { - "iichb", - jzsmb_methods, - sizeof(struct jzsmb_softc), -}; - -static devclass_t jzsmb_devclass; - -EARLY_DRIVER_MODULE(iicbus, jzsmb, iicbus_driver, iicbus_devclass, 0, 0, - BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE); -EARLY_DRIVER_MODULE(jzsmb, simplebus, jzsmb_driver, jzsmb_devclass, 0, 0, - BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE); -MODULE_VERSION(jzsmb, 1); diff --git a/sys/mips/ingenic/jz4780_smb.h b/sys/mips/ingenic/jz4780_smb.h deleted file mode 100644 index f198103b0eb..00000000000 --- a/sys/mips/ingenic/jz4780_smb.h +++ /dev/null @@ -1,95 +0,0 @@ -/*- - * Copyright (c) 2016 Jared McNeill - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Ingenic JZ4780 SMB Controller - */ - -#ifndef __JZ4780_SMB_H__ -#define __JZ4780_SMB_H__ - -#define SMBCON 0x00 -#define SMBCON_STPHLD (1 << 7) -#define SMBCON_SLVDIS (1 << 6) -#define SMBCON_REST (1 << 5) -#define SMBCON_MATP (1 << 4) -#define SMBCON_SATP (1 << 3) -#define SMBCON_SPD (3 << 1) -#define SMBCON_SPD_STANDARD (1 << 1) -#define SMBCON_SPD_FAST (2 << 1) -#define SMBCON_MD (1 << 0) -#define SMBTAR 0x04 -#define SMBTAR_MATP (1 << 12) -#define SMBTAR_SPECIAL (1 << 11) -#define SMBTAR_GC_OR_START (1 << 10) -#define SMBTAR_SMBTAR (0x3ff << 0) -#define SMBSAR 0x08 -#define SMBDC 0x10 -#define SMBDC_CMD (1 << 8) -#define SMBDC_DAT (0xff << 0) -#define SMBSHCNT 0x14 -#define SMBSLCNT 0x18 -#define SMBFHCNT 0x1c -#define SMBFLCNT 0x20 -#define SMBINTST 0x2c -#define SMBINTM 0x30 -#define SMBRXTL 0x38 -#define SMBTXTL 0x3c -#define SMBCINT 0x40 -#define SMBCRXUF 0x44 -#define SMBCRXOF 0x48 -#define SMBCTXOF 0x4c -#define SMBCRXREQ 0x50 -#define SMBCTXABT 0x54 -#define SMBCRXDN 0x58 -#define SMBCACT 0x5c -#define SMBCSTP 0x60 -#define SMBCSTT 0x64 -#define SMBCGC 0x68 -#define SMBENB 0x6c -#define SMBENB_SMBENB (1 << 0) -#define SMBST 0x70 -#define SMBST_SLVACT (1 << 6) -#define SMBST_MSTACT (1 << 5) -#define SMBST_RFF (1 << 4) -#define SMBST_RFNE (1 << 3) -#define SMBST_TFE (1 << 2) -#define SMBST_TFNF (1 << 1) -#define SMBST_ACT (1 << 0) -#define SMBABTSRC 0x80 -#define SMBDMACR 0x88 -#define SMBDMATDLR 0x8c -#define SMBDMARDLR 0x90 -#define SMBSDASU 0x94 -#define SMBACKGC 0x98 -#define SMBENBST 0x9c -#define SMBENBST_SLVRDLST (1 << 2) -#define SMBENBST_SLVDISB (1 << 1) -#define SMBENBST_SMBEN (1 << 0) -#define SMBSDAHD 0xd0 -#define SMBSDAHD_HDENB (1 << 8) -#define SMBSDAHD_SDAHD (0xff << 0) - -#endif /* !__JZ4780_SMB_H__ */ diff --git a/sys/mips/ingenic/jz4780_timer.c b/sys/mips/ingenic/jz4780_timer.c deleted file mode 100644 index 87d2fb72c64..00000000000 --- a/sys/mips/ingenic/jz4780_timer.c +++ /dev/null @@ -1,336 +0,0 @@ -/*- - * Copyright 2013-2015 Alexander Kabaev - * Copyright 2013-2015 John Wehle - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include -#include -#include - -#include - -struct jz4780_timer_softc { - device_t dev; - struct resource * res[4]; - void * ih_cookie; - struct eventtimer et; - struct timecounter tc; -}; - -static struct resource_spec jz4780_timer_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { SYS_RES_IRQ, 0, RF_ACTIVE }, /* OST */ - { SYS_RES_IRQ, 1, RF_ACTIVE }, /* TC5 */ - { SYS_RES_IRQ, 2, RF_ACTIVE }, /* TC0-4,6 */ - { -1, 0 } -}; - -/* - * devclass_get_device / device_get_softc could be used - * to dynamically locate this, however the timers are a - * required device which can't be unloaded so there's - * no need for the overhead. - */ -static struct jz4780_timer_softc *jz4780_timer_sc = NULL; - -#define CSR_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], reg, (val)) -#define CSR_READ_4(sc, reg) bus_read_4((sc)->res[0], reg) - -static unsigned -jz4780_get_timecount(struct timecounter *tc) -{ - struct jz4780_timer_softc *sc = - (struct jz4780_timer_softc *)tc->tc_priv; - - return CSR_READ_4(sc, JZ_OST_CNT_LO); -} - -static int -jz4780_hardclock(void *arg) -{ - struct jz4780_timer_softc *sc = (struct jz4780_timer_softc *)arg; - - CSR_WRITE_4(sc, JZ_TC_TFCR, TFR_FFLAG5); - CSR_WRITE_4(sc, JZ_TC_TECR, TESR_TCST5); - - if (sc->et.et_active) - sc->et.et_event_cb(&sc->et, sc->et.et_arg); - - return (FILTER_HANDLED); -} - -static int -jz4780_timer_start(struct eventtimer *et, sbintime_t first, sbintime_t period) -{ - struct jz4780_timer_softc *sc = - (struct jz4780_timer_softc *)et->et_priv; - uint32_t ticks; - - ticks = (first * et->et_frequency) / SBT_1S; - if (ticks == 0) - return (EINVAL); - - CSR_WRITE_4(sc, JZ_TC_TDFR(5), ticks); - CSR_WRITE_4(sc, JZ_TC_TCNT(5), 0); - CSR_WRITE_4(sc, JZ_TC_TESR, TESR_TCST5); - - return (0); -} - -static int -jz4780_timer_stop(struct eventtimer *et) -{ - struct jz4780_timer_softc *sc = - (struct jz4780_timer_softc *)et->et_priv; - - CSR_WRITE_4(sc, JZ_TC_TECR, TESR_TCST5); - return (0); -} - -static int -jz4780_timer_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-tcu")) - return (ENXIO); - - device_set_desc(dev, "Ingenic JZ4780 timer"); - - return (BUS_PROBE_DEFAULT); -} - -static int -jz4780_timer_attach(device_t dev) -{ - struct jz4780_timer_softc *sc = device_get_softc(dev); - pcell_t counter_freq; - clk_t clk; - - /* There should be exactly one instance. */ - if (jz4780_timer_sc != NULL) - return (ENXIO); - - sc->dev = dev; - - if (bus_alloc_resources(dev, jz4780_timer_spec, sc->res)) { - device_printf(dev, "can not allocate resources for device\n"); - return (ENXIO); - } - - counter_freq = 0; - if (clk_get_by_name(dev, "ext", &clk) == 0) { - uint64_t clk_freq; - - if (clk_get_freq(clk, &clk_freq) == 0) - counter_freq = (uint32_t)clk_freq / 16; - clk_release(clk); - } - if (counter_freq == 0) { - device_printf(dev, "unable to determine ext clock frequency\n"); - /* Hardcode value we 'know' is correct */ - counter_freq = 48000000 / 16; - } - - /* - * Disable the timers, select the input for each timer, - * clear and then start OST. - */ - - /* Stop OST, if it happens to be running */ - CSR_WRITE_4(sc, JZ_TC_TECR, TESR_OST); - /* Stop all other channels as well */ - CSR_WRITE_4(sc, JZ_TC_TECR, TESR_TCST0 | TESR_TCST1 | TESR_TCST2 | - TESR_TCST3 | TESR_TCST4 | TESR_TCST5 | TESR_TCST6 | TESR_TCST7); - /* Clear detect mask flags */ - CSR_WRITE_4(sc, JZ_TC_TFCR, 0xFFFFFFFF); - /* Mask all interrupts */ - CSR_WRITE_4(sc, JZ_TC_TMSR, 0xFFFFFFFF); - - /* Init counter with known data */ - CSR_WRITE_4(sc, JZ_OST_CTRL, 0); - CSR_WRITE_4(sc, JZ_OST_CNT_LO, 0); - CSR_WRITE_4(sc, JZ_OST_CNT_HI, 0); - CSR_WRITE_4(sc, JZ_OST_DATA, 0xffffffff); - - /* Configure counter for external clock */ - CSR_WRITE_4(sc, JZ_OST_CTRL, OSTC_EXT_EN | OSTC_MODE | OSTC_DIV_16); - - /* Start the counter again */ - CSR_WRITE_4(sc, JZ_TC_TESR, TESR_OST); - - /* Configure TCU channel 5 similarly to OST and leave it disabled */ - CSR_WRITE_4(sc, JZ_TC_TCSR(5), TCSR_EXT_EN | TCSR_DIV_16); - CSR_WRITE_4(sc, JZ_TC_TMCR, TMR_FMASK(5)); - - if (bus_setup_intr(dev, sc->res[2], INTR_TYPE_CLK, - jz4780_hardclock, NULL, sc, &sc->ih_cookie)) { - device_printf(dev, "could not setup interrupt handler\n"); - bus_release_resources(dev, jz4780_timer_spec, sc->res); - return (ENXIO); - } - - sc->et.et_name = "JZ4780 TCU5"; - sc->et.et_flags = ET_FLAGS_ONESHOT; - sc->et.et_frequency = counter_freq; - sc->et.et_quality = 1000; - sc->et.et_min_period = (0x00000002LLU * SBT_1S) / sc->et.et_frequency; - sc->et.et_max_period = (0x0000fffeLLU * SBT_1S) / sc->et.et_frequency; - sc->et.et_start = jz4780_timer_start; - sc->et.et_stop = jz4780_timer_stop; - sc->et.et_priv = sc; - - et_register(&sc->et); - - sc->tc.tc_get_timecount = jz4780_get_timecount; - sc->tc.tc_name = "JZ4780 OST"; - sc->tc.tc_frequency = counter_freq; - sc->tc.tc_counter_mask = ~0u; - sc->tc.tc_quality = 1000; - sc->tc.tc_priv = sc; - - tc_init(&sc->tc); - - /* Now when tc is initialized, allow DELAY to find it */ - jz4780_timer_sc = sc; - - return (0); -} - -static int -jz4780_timer_detach(device_t dev) -{ - - return (EBUSY); -} - -static device_method_t jz4780_timer_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, jz4780_timer_probe), - DEVMETHOD(device_attach, jz4780_timer_attach), - DEVMETHOD(device_detach, jz4780_timer_detach), - - DEVMETHOD_END -}; - -static driver_t jz4780_timer_driver = { - "timer", - jz4780_timer_methods, - sizeof(struct jz4780_timer_softc), -}; - -static devclass_t jz4780_timer_devclass; - -EARLY_DRIVER_MODULE(timer, simplebus, jz4780_timer_driver, - jz4780_timer_devclass, 0, 0, BUS_PASS_TIMER); - -void -DELAY(int usec) -{ - uint32_t counter; - uint32_t delta, now, previous, remaining; - - /* Timer has not yet been initialized */ - if (jz4780_timer_sc == NULL) { - for (; usec > 0; usec--) - for (counter = 200; counter > 0; counter--) { - /* Prevent gcc from optimizing out the loop */ - mips_rd_cause(); - } - return; - } - TSENTER(); - - /* - * Some of the other timers in the source tree do this calculation as: - * - * usec * ((sc->tc.tc_frequency / 1000000) + 1) - * - * which gives a fairly pessimistic result when tc_frequency is an exact - * multiple of 1000000. Given the data type and typical values for - * tc_frequency adding 999999 shouldn't overflow. - */ - remaining = usec * ((jz4780_timer_sc->tc.tc_frequency + 999999) / - 1000000); - - /* - * We add one since the first iteration may catch the counter just - * as it is changing. - */ - remaining += 1; - - previous = jz4780_get_timecount(&jz4780_timer_sc->tc); - - for ( ; ; ) { - now = jz4780_get_timecount(&jz4780_timer_sc->tc); - - /* - * If the timer has rolled over, then we have the case: - * - * if (previous > now) { - * delta = (0 - previous) + now - * } - * - * which is really no different then the normal case. - * Both cases are simply: - * - * delta = now - previous. - */ - delta = now - previous; - - if (delta >= remaining) - break; - - previous = now; - remaining -= delta; - } - TSEXIT(); -} - -void -platform_initclocks(void) -{ - -} diff --git a/sys/mips/ingenic/jz4780_uart.c b/sys/mips/ingenic/jz4780_uart.c deleted file mode 100644 index d46d2566c17..00000000000 --- a/sys/mips/ingenic/jz4780_uart.c +++ /dev/null @@ -1,219 +0,0 @@ -/*- - * Copyright (c) 2013 Ian Lepore - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "uart_if.h" - -/* - * High-level UART interface. - */ -struct jz4780_uart_softc { - struct ns8250_softc ns8250_base; - clk_t clk_mod; - clk_t clk_baud; -}; - -static int -jz4780_bus_attach(struct uart_softc *sc) -{ - struct ns8250_softc *ns8250; - struct uart_bas *bas; - int rv; - - ns8250 = (struct ns8250_softc *)sc; - bas = &sc->sc_bas; - - rv = ns8250_bus_attach(sc); - if (rv != 0) - return (0); - - /* Configure uart to use extra IER_RXTMOUT bit */ - ns8250->ier_rxbits = IER_RXTMOUT | IER_EMSC | IER_ERLS | IER_ERXRDY; - ns8250->ier_mask = ~(ns8250->ier_rxbits); - ns8250->ier = uart_getreg(bas, REG_IER) & ns8250->ier_mask; - ns8250->ier |= ns8250->ier_rxbits; - uart_setreg(bas, REG_IER, ns8250->ier); - uart_barrier(bas); - return (0); -} - -static kobj_method_t jz4780_uart_methods[] = { - KOBJMETHOD(uart_probe, ns8250_bus_probe), - KOBJMETHOD(uart_attach, jz4780_bus_attach), - KOBJMETHOD(uart_detach, ns8250_bus_detach), - KOBJMETHOD(uart_flush, ns8250_bus_flush), - KOBJMETHOD(uart_getsig, ns8250_bus_getsig), - KOBJMETHOD(uart_ioctl, ns8250_bus_ioctl), - KOBJMETHOD(uart_ipend, ns8250_bus_ipend), - KOBJMETHOD(uart_param, ns8250_bus_param), - KOBJMETHOD(uart_receive, ns8250_bus_receive), - KOBJMETHOD(uart_setsig, ns8250_bus_setsig), - KOBJMETHOD(uart_transmit, ns8250_bus_transmit), - KOBJMETHOD(uart_txbusy, ns8250_bus_txbusy), - KOBJMETHOD(uart_grab, ns8250_bus_grab), - KOBJMETHOD(uart_ungrab, ns8250_bus_ungrab), - KOBJMETHOD_END -}; - -static struct uart_class jz4780_uart_class = { - "jz4780_uart_class", - jz4780_uart_methods, - sizeof(struct jz4780_uart_softc), - .uc_ops = &uart_ns8250_ops, - .uc_range = 8, - .uc_rclk = 0, -}; - -/* Compatible devices. */ -static struct ofw_compat_data compat_data[] = { - {"ingenic,jz4780-uart", (uintptr_t)&jz4780_uart_class}, - {NULL, (uintptr_t)NULL}, -}; - -UART_FDT_CLASS(compat_data); - -/* - * UART Driver interface. - */ -static int -jz4780_uart_get_shift(device_t dev) -{ - phandle_t node; - pcell_t shift; - - node = ofw_bus_get_node(dev); - if ((OF_getencprop(node, "reg-shift", &shift, sizeof(shift))) <= 0) - shift = 2; - return ((int)shift); -} - -static int -jz4780_uart_probe(device_t dev) -{ - struct jz4780_uart_softc *sc; - uint64_t freq; - int shift; - int rv; - const struct ofw_compat_data *cd; - - sc = device_get_softc(dev); - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - cd = ofw_bus_search_compatible(dev, compat_data); - if (cd->ocd_data == 0) - return (ENXIO); - - /* Figure out clock setup */ - rv = clk_get_by_ofw_name(dev, 0, "module", &sc->clk_mod); - if (rv != 0) { - device_printf(dev, "Cannot get UART clock: %d\n", rv); - return (ENXIO); - } - rv = clk_enable(sc->clk_mod); - if (rv != 0) { - device_printf(dev, "Cannot enable UART clock: %d\n", rv); - return (ENXIO); - } - rv = clk_get_by_ofw_name(dev, 0, "baud", &sc->clk_baud); - if (rv != 0) { - device_printf(dev, "Cannot get UART clock: %d\n", rv); - return (ENXIO); - } - rv = clk_enable(sc->clk_baud); - if (rv != 0) { - device_printf(dev, "Cannot enable UART clock: %d\n", rv); - return (ENXIO); - } - rv = clk_get_freq(sc->clk_baud, &freq); - if (rv != 0) { - device_printf(dev, "Cannot determine UART clock frequency: %d\n", rv); - return (ENXIO); - } - - if (bootverbose) - device_printf(dev, "got UART clock: %lld\n", freq); - sc->ns8250_base.base.sc_class = (struct uart_class *)cd->ocd_data; - shift = jz4780_uart_get_shift(dev); - return (uart_bus_probe(dev, shift, 0, (int)freq, 0, 0, 0)); -} - -static int -jz4780_uart_detach(device_t dev) -{ - struct jz4780_uart_softc *sc; - int rv; - - rv = uart_bus_detach(dev); - if (rv != 0) - return (rv); - - sc = device_get_softc(dev); - if (sc->clk_mod != NULL) { - clk_release(sc->clk_mod); - } - if (sc->clk_baud != NULL) { - clk_release(sc->clk_baud); - } - return (0); -} - -static device_method_t jz4780_uart_bus_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, jz4780_uart_probe), - DEVMETHOD(device_attach, uart_bus_attach), - DEVMETHOD(device_detach, jz4780_uart_detach), - DEVMETHOD_END -}; - -static driver_t jz4780_uart_driver = { - uart_driver_name, - jz4780_uart_bus_methods, - sizeof(struct jz4780_uart_softc), -}; - -DRIVER_MODULE(jz4780_uart, simplebus, jz4780_uart_driver, uart_devclass, - 0, 0); diff --git a/sys/mips/malta/asm_malta.S b/sys/mips/malta/asm_malta.S deleted file mode 100644 index c3da4d0ffcc..00000000000 --- a/sys/mips/malta/asm_malta.S +++ /dev/null @@ -1,90 +0,0 @@ -/*- - * Copyright (c) 2016 Ruslan Bukin - * All rights reserved. - * - * Portions of this software were developed by SRI International and the - * University of Cambridge Computer Laboratory under DARPA/AFRL contract - * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Portions of this software were developed by the University of Cambridge - * Computer Laboratory as part of the CTSRD Project, with support from the - * UK Higher Education Innovation Fund (HEIF). - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include - -#define VPECONF0_MVP (1 << 1) -#define VPECONF0_VPA (1 << 0) - - .set noreorder - -#ifdef SMP -/* - * This function must be implemented in assembly because it is called early - * in AP boot without a valid stack. - */ -LEAF(platform_processor_id) - .set push - .set mips32r2 - mfc0 v0, $15, 1 - jr ra - andi v0, 0x1f - .set pop -END(platform_processor_id) - -LEAF(malta_cpu_configure) - .set push - .set mips32r2 - .set noat - li t2, (VPECONF0_MVP | VPECONF0_VPA) - move $1, t2 - jr ra - .word 0x41810000 | (1 << 11) | 2 # mttc0 t2, $1, 2 - .set pop -END(malta_cpu_configure) - -/* - * Called on APs to wait until they are told to launch. - */ -LEAF(malta_ap_wait) - jal platform_processor_id - nop - - PTR_LA t1, malta_ap_boot - -1: - ll t0, 0(t1) - bne v0, t0, 1b - nop - - move t0, zero - sc t0, 0(t1) - - beqz t0, 1b - nop - - j mpentry - nop -END(malta_ap_wait) -#endif diff --git a/sys/mips/malta/files.malta b/sys/mips/malta/files.malta deleted file mode 100644 index 8b5b5efe333..00000000000 --- a/sys/mips/malta/files.malta +++ /dev/null @@ -1,15 +0,0 @@ -mips/malta/gt.c standard -mips/malta/gt_pci.c standard -mips/malta/gt_pci_bus_space.c standard -mips/malta/obio.c optional uart -mips/malta/uart_cpu_maltausart.c optional uart -mips/malta/uart_bus_maltausart.c optional uart -dev/uart/uart_dev_ns8250.c optional uart -mips/malta/malta_machdep.c standard -mips/malta/yamon.c standard -mips/mips/intr_machdep.c standard -mips/mips/tick.c standard - -# SMP -mips/malta/asm_malta.S optional smp -mips/malta/malta_mp.c optional smp diff --git a/sys/mips/malta/gt.c b/sys/mips/malta/gt.c deleted file mode 100644 index 5e774ec601b..00000000000 --- a/sys/mips/malta/gt.c +++ /dev/null @@ -1,129 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2005 Olivier Houchard. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include - -static int -gt_probe(device_t dev) -{ - device_set_desc(dev, "GT64120 chip"); - return (BUS_PROBE_NOWILDCARD); -} - -static void -gt_identify(driver_t *drv, device_t parent) -{ - BUS_ADD_CHILD(parent, 0, "gt", 0); -} - -static int -gt_attach(device_t dev) -{ - struct gt_softc *sc = device_get_softc(dev); - sc->dev = dev; - - device_add_child(dev, "pcib", 0); - bus_generic_probe(dev); - bus_generic_attach(dev); - - return (0); -} - -static struct resource * -gt_alloc_resource(device_t dev, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - return (BUS_ALLOC_RESOURCE(device_get_parent(dev), child, - type, rid, start, end, count, flags)); - -} - -static int -gt_setup_intr(device_t dev, device_t child, - struct resource *ires, int flags, driver_filter_t *filt, - driver_intr_t *intr, void *arg, void **cookiep) -{ - return BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, - filt, intr, arg, cookiep); -} - -static int -gt_teardown_intr(device_t dev, device_t child, struct resource *res, - void *cookie) -{ - return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie)); -} - -static int -gt_activate_resource(device_t dev, device_t child, int type, int rid, - struct resource *r) -{ - return (BUS_ACTIVATE_RESOURCE(device_get_parent(dev), child, - type, rid, r)); -} - -static device_method_t gt_methods[] = { - DEVMETHOD(device_probe, gt_probe), - DEVMETHOD(device_identify, gt_identify), - DEVMETHOD(device_attach, gt_attach), - - DEVMETHOD(bus_setup_intr, gt_setup_intr), - DEVMETHOD(bus_teardown_intr, gt_teardown_intr), - DEVMETHOD(bus_alloc_resource, gt_alloc_resource), - DEVMETHOD(bus_activate_resource, gt_activate_resource), - - DEVMETHOD_END -}; - -static driver_t gt_driver = { - "gt", - gt_methods, - sizeof(struct gt_softc), -}; -static devclass_t gt_devclass; - -DRIVER_MODULE(gt, nexus, gt_driver, gt_devclass, 0, 0); diff --git a/sys/mips/malta/gt_pci.c b/sys/mips/malta/gt_pci.c deleted file mode 100644 index ef32bb323d2..00000000000 --- a/sys/mips/malta/gt_pci.c +++ /dev/null @@ -1,773 +0,0 @@ -/* $NetBSD: gt_pci.c,v 1.4 2003/07/15 00:24:54 lukem Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 2001, 2002 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Jason R. Thorpe for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * PCI configuration support for gt I/O Processor chip. - */ - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include - -#include -#include - -#include -#include - -#include -#include - -#include -#include "pcib_if.h" - -#include - -#define ICU_LEN 16 /* number of ISA IRQs */ - -/* - * XXX: These defines are from NetBSD's . Respective file - * from FreeBSD src tree lacks some definitions. - */ -#define PIC_OCW1 1 -#define PIC_OCW2 0 -#define PIC_OCW3 0 - -#define OCW2_SELECT 0 -#define OCW2_ILS(x) ((x) << 0) /* interrupt level select */ - -#define OCW3_POLL_IRQ(x) ((x) & 0x7f) -#define OCW3_POLL_PENDING (1U << 7) - -/* - * Galileo controller's registers are LE so convert to then - * to/from native byte order. We rely on boot loader or emulator - * to set "swap bytes" configuration correctly for us - */ -#define GT_PCI_DATA(v) htole32((v)) -#define GT_HOST_DATA(v) le32toh((v)) - -struct gt_pci_softc; - -struct gt_pci_intr_cookie { - int irq; - struct gt_pci_softc *sc; -}; - -struct gt_pci_softc { - device_t sc_dev; - bus_space_tag_t sc_st; - bus_space_handle_t sc_ioh_icu1; - bus_space_handle_t sc_ioh_icu2; - bus_space_handle_t sc_ioh_elcr; - - int sc_busno; - struct rman sc_mem_rman; - struct rman sc_io_rman; - struct rman sc_irq_rman; - unsigned long sc_mem; - bus_space_handle_t sc_io; - - struct resource *sc_irq; - struct intr_event *sc_eventstab[ICU_LEN]; - struct gt_pci_intr_cookie sc_intr_cookies[ICU_LEN]; - uint16_t sc_imask; - uint16_t sc_elcr; - - uint16_t sc_reserved; - - void *sc_ih; -}; - -static void gt_pci_set_icus(struct gt_pci_softc *); -static int gt_pci_intr(void *v); -static int gt_pci_probe(device_t); -static int gt_pci_attach(device_t); -static int gt_pci_activate_resource(device_t, device_t, int, int, - struct resource *); -static int gt_pci_setup_intr(device_t, device_t, struct resource *, - int, driver_filter_t *, driver_intr_t *, void *, void **); -static int gt_pci_teardown_intr(device_t, device_t, struct resource *, void*); -static int gt_pci_maxslots(device_t ); -static int gt_pci_conf_setup(struct gt_pci_softc *, int, int, int, int, - uint32_t *); -static uint32_t gt_pci_read_config(device_t, u_int, u_int, u_int, u_int, int); -static void gt_pci_write_config(device_t, u_int, u_int, u_int, u_int, - uint32_t, int); -static int gt_pci_route_interrupt(device_t pcib, device_t dev, int pin); -static struct resource * gt_pci_alloc_resource(device_t, device_t, int, - int *, rman_res_t, rman_res_t, rman_res_t, u_int); - -static void -gt_pci_mask_irq(void *source) -{ - struct gt_pci_intr_cookie *cookie = source; - struct gt_pci_softc *sc = cookie->sc; - int irq = cookie->irq; - - sc->sc_imask |= (1 << irq); - sc->sc_elcr |= (1 << irq); - - gt_pci_set_icus(sc); -} - -static void -gt_pci_unmask_irq(void *source) -{ - struct gt_pci_intr_cookie *cookie = source; - struct gt_pci_softc *sc = cookie->sc; - int irq = cookie->irq; - - /* Enable it, set trigger mode. */ - sc->sc_imask &= ~(1 << irq); - sc->sc_elcr &= ~(1 << irq); - - gt_pci_set_icus(sc); -} - -static void -gt_pci_set_icus(struct gt_pci_softc *sc) -{ - /* Enable the cascade IRQ (2) if 8-15 is enabled. */ - if ((sc->sc_imask & 0xff00) != 0xff00) - sc->sc_imask &= ~(1U << 2); - else - sc->sc_imask |= (1U << 2); - - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, PIC_OCW1, - sc->sc_imask & 0xff); - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, PIC_OCW1, - (sc->sc_imask >> 8) & 0xff); - - bus_space_write_1(sc->sc_st, sc->sc_ioh_elcr, 0, - sc->sc_elcr & 0xff); - bus_space_write_1(sc->sc_st, sc->sc_ioh_elcr, 1, - (sc->sc_elcr >> 8) & 0xff); -} - -static int -gt_pci_intr(void *v) -{ - struct gt_pci_softc *sc = v; - struct intr_event *event; - int irq; - - for (;;) { - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, PIC_OCW3, - OCW3_SEL | OCW3_P); - irq = bus_space_read_1(sc->sc_st, sc->sc_ioh_icu1, PIC_OCW3); - if ((irq & OCW3_POLL_PENDING) == 0) - { - return FILTER_HANDLED; - } - - irq = OCW3_POLL_IRQ(irq); - - if (irq == 2) { - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, - PIC_OCW3, OCW3_SEL | OCW3_P); - irq = bus_space_read_1(sc->sc_st, sc->sc_ioh_icu2, - PIC_OCW3); - if (irq & OCW3_POLL_PENDING) - irq = OCW3_POLL_IRQ(irq) + 8; - else - irq = 2; - } - - event = sc->sc_eventstab[irq]; - - if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) - continue; - - /* TODO: frame instead of NULL? */ - intr_event_handle(event, NULL); - /* XXX: Log stray IRQs */ - - /* Send a specific EOI to the 8259. */ - if (irq > 7) { - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, - PIC_OCW2, OCW2_SELECT | OCW2_EOI | OCW2_SL | - OCW2_ILS(irq & 7)); - irq = 2; - } - - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, PIC_OCW2, - OCW2_SELECT | OCW2_EOI | OCW2_SL | OCW2_ILS(irq)); - } - - return FILTER_HANDLED; -} - -static int -gt_pci_probe(device_t dev) -{ - device_set_desc(dev, "GT64120 PCI bridge"); - return (0); -} - -static int -gt_pci_attach(device_t dev) -{ - - uint32_t busno; - struct gt_pci_softc *sc = device_get_softc(dev); - int rid; - - busno = 0; - sc->sc_dev = dev; - sc->sc_busno = busno; - sc->sc_st = mips_bus_space_generic; - - /* Use KSEG1 to access IO ports for it is uncached */ - sc->sc_io = MALTA_PCI0_IO_BASE; - sc->sc_io_rman.rm_type = RMAN_ARRAY; - sc->sc_io_rman.rm_descr = "GT64120 PCI I/O Ports"; - /* - * First 256 bytes are ISA's registers: e.g. i8259's - * So do not use them for general purpose PCI I/O window - */ - if (rman_init(&sc->sc_io_rman) != 0 || - rman_manage_region(&sc->sc_io_rman, 0x100, 0xffff) != 0) { - panic("gt_pci_attach: failed to set up I/O rman"); - } - - /* Use KSEG1 to access PCI memory for it is uncached */ - sc->sc_mem = MALTA_PCIMEM1_BASE; - sc->sc_mem_rman.rm_type = RMAN_ARRAY; - sc->sc_mem_rman.rm_descr = "GT64120 PCI Memory"; - if (rman_init(&sc->sc_mem_rman) != 0 || - rman_manage_region(&sc->sc_mem_rman, - sc->sc_mem, sc->sc_mem + MALTA_PCIMEM1_SIZE) != 0) { - panic("gt_pci_attach: failed to set up memory rman"); - } - sc->sc_irq_rman.rm_type = RMAN_ARRAY; - sc->sc_irq_rman.rm_descr = "GT64120 PCI IRQs"; - if (rman_init(&sc->sc_irq_rman) != 0 || - rman_manage_region(&sc->sc_irq_rman, 1, 31) != 0) - panic("gt_pci_attach: failed to set up IRQ rman"); - - /* - * Map the PIC/ELCR registers. - */ -#if 0 - if (bus_space_map(sc->sc_st, 0x4d0, 2, 0, &sc->sc_ioh_elcr) != 0) - device_printf(dev, "unable to map ELCR registers\n"); - if (bus_space_map(sc->sc_st, IO_ICU1, 2, 0, &sc->sc_ioh_icu1) != 0) - device_printf(dev, "unable to map ICU1 registers\n"); - if (bus_space_map(sc->sc_st, IO_ICU2, 2, 0, &sc->sc_ioh_icu2) != 0) - device_printf(dev, "unable to map ICU2 registers\n"); -#else - sc->sc_ioh_elcr = MIPS_PHYS_TO_KSEG1(sc->sc_io + 0x4d0); - sc->sc_ioh_icu1 = MIPS_PHYS_TO_KSEG1(sc->sc_io + IO_ICU1); - sc->sc_ioh_icu2 = MIPS_PHYS_TO_KSEG1(sc->sc_io + IO_ICU2); -#endif - - /* All interrupts default to "masked off". */ - sc->sc_imask = 0xffff; - - /* All interrupts default to edge-triggered. */ - sc->sc_elcr = 0; - - /* - * Initialize the 8259s. - */ - /* reset, program device, 4 bytes */ - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, 0, - ICW1_RESET | ICW1_IC4); - /* - * XXX: values from NetBSD's - */ - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, 1, - 0/*XXX*/); - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, 1, - 1 << 2); - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, 1, - ICW4_8086); - - /* mask all interrupts */ - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, 1, - sc->sc_imask & 0xff); - - /* enable special mask mode */ - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, 0, - OCW3_SEL | OCW3_ESMM | OCW3_SMM); - - /* read IRR by default */ - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu1, 0, - OCW3_SEL | OCW3_RR); - - /* reset, program device, 4 bytes */ - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, 0, - ICW1_RESET | ICW1_IC4); - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, 1, - 0/*XXX*/); - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, 1, - 1 << 2); - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, 1, - ICW4_8086); - - /* mask all interrupts */ - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, 1, - sc->sc_imask & 0xff); - - /* enable special mask mode */ - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, 0, - OCW3_SEL | OCW3_ESMM | OCW3_SMM); - - /* read IRR by default */ - bus_space_write_1(sc->sc_st, sc->sc_ioh_icu2, 0, - OCW3_SEL | OCW3_RR); - - /* - * Default all interrupts to edge-triggered. - */ - bus_space_write_1(sc->sc_st, sc->sc_ioh_elcr, 0, - sc->sc_elcr & 0xff); - bus_space_write_1(sc->sc_st, sc->sc_ioh_elcr, 1, - (sc->sc_elcr >> 8) & 0xff); - - /* - * Some ISA interrupts are reserved for devices that - * we know are hard-wired to certain IRQs. - */ - sc->sc_reserved = - (1U << 0) | /* timer */ - (1U << 1) | /* keyboard controller (keyboard) */ - (1U << 2) | /* PIC cascade */ - (1U << 3) | /* COM 2 */ - (1U << 4) | /* COM 1 */ - (1U << 6) | /* floppy */ - (1U << 7) | /* centronics */ - (1U << 8) | /* RTC */ - (1U << 9) | /* I2C */ - (1U << 12) | /* keyboard controller (mouse) */ - (1U << 14) | /* IDE primary */ - (1U << 15); /* IDE secondary */ - - /* Hook up our interrupt handler. */ - if ((sc->sc_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, - MALTA_SOUTHBRIDGE_INTR, MALTA_SOUTHBRIDGE_INTR, 1, - RF_SHAREABLE | RF_ACTIVE)) == NULL) { - device_printf(dev, "unable to allocate IRQ resource\n"); - return ENXIO; - } - - if ((bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC, - gt_pci_intr, NULL, sc, &sc->sc_ih))) { - device_printf(dev, - "WARNING: unable to register interrupt handler\n"); - return ENXIO; - } - - /* Initialize memory and i/o rmans. */ - device_add_child(dev, "pci", -1); - return (bus_generic_attach(dev)); -} - -static int -gt_pci_maxslots(device_t dev) -{ - return (PCI_SLOTMAX); -} - -static int -gt_pci_conf_setup(struct gt_pci_softc *sc, int bus, int slot, int func, - int reg, uint32_t *addr) -{ - *addr = (bus << 16) | (slot << 11) | (func << 8) | reg; - - return (0); -} - -static uint32_t -gt_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, - int bytes) -{ - struct gt_pci_softc *sc = device_get_softc(dev); - uint32_t data; - uint32_t addr; - uint32_t shift, mask; - - if (gt_pci_conf_setup(sc, bus, slot, func, reg & ~3, &addr)) - return (uint32_t)(-1); - - /* Clear cause register bits. */ - GT_REGVAL(GT_INTR_CAUSE) = GT_PCI_DATA(0); - GT_REGVAL(GT_PCI0_CFG_ADDR) = GT_PCI_DATA((1U << 31) | addr); - /* - * Galileo system controller is special - */ - if ((bus == 0) && (slot == 0)) - data = GT_PCI_DATA(GT_REGVAL(GT_PCI0_CFG_DATA)); - else - data = GT_REGVAL(GT_PCI0_CFG_DATA); - - /* Check for master abort. */ - if (GT_HOST_DATA(GT_REGVAL(GT_INTR_CAUSE)) & (GTIC_MASABORT0 | GTIC_TARABORT0)) - data = (uint32_t) -1; - - switch(reg % 4) - { - case 3: - shift = 24; - break; - case 2: - shift = 16; - break; - case 1: - shift = 8; - break; - default: - shift = 0; - break; - } - - switch(bytes) - { - case 1: - mask = 0xff; - data = (data >> shift) & mask; - break; - case 2: - mask = 0xffff; - if(reg % 4 == 0) - data = data & mask; - else - data = (data >> 16) & mask; - break; - case 4: - break; - default: - panic("gt_pci_readconfig: wrong bytes count"); - break; - } -#if 0 - printf("PCICONF_READ(%02x:%02x.%02x[%04x] -> %02x(%d)\n", - bus, slot, func, reg, data, bytes); -#endif - - return (data); -} - -static void -gt_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, - uint32_t data, int bytes) -{ - struct gt_pci_softc *sc = device_get_softc(dev); - uint32_t addr; - uint32_t reg_data; - uint32_t shift, mask; - - if(bytes != 4) - { - reg_data = gt_pci_read_config(dev, bus, slot, func, reg, 4); - - shift = 8 * (reg & 3); - - switch(bytes) - { - case 1: - mask = 0xff; - data = (reg_data & ~ (mask << shift)) | (data << shift); - break; - case 2: - mask = 0xffff; - if(reg % 4 == 0) - data = (reg_data & ~mask) | data; - else - data = (reg_data & ~ (mask << shift)) | - (data << shift); - break; - case 4: - break; - default: - panic("gt_pci_readconfig: wrong bytes count"); - break; - } - } - - if (gt_pci_conf_setup(sc, bus, slot, func, reg & ~3, &addr)) - return; - - /* The galileo has problems accessing device 31. */ - if (bus == 0 && slot == 31) - return; - - /* XXX: no support for bus > 0 yet */ - if (bus > 0) - return; - - /* Clear cause register bits. */ - GT_REGVAL(GT_INTR_CAUSE) = GT_PCI_DATA(0); - - GT_REGVAL(GT_PCI0_CFG_ADDR) = GT_PCI_DATA((1U << 31) | addr); - - /* - * Galileo system controller is special - */ - if ((bus == 0) && (slot == 0)) - GT_REGVAL(GT_PCI0_CFG_DATA) = GT_PCI_DATA(data); - else - GT_REGVAL(GT_PCI0_CFG_DATA) = data; - -#if 0 - printf("PCICONF_WRITE(%02x:%02x.%02x[%04x] -> %02x(%d)\n", - bus, slot, func, reg, data, bytes); -#endif - -} - -static int -gt_pci_route_interrupt(device_t pcib, device_t dev, int pin) -{ - int bus; - int device; - int func; - /* struct gt_pci_softc *sc = device_get_softc(pcib); */ - bus = pci_get_bus(dev); - device = pci_get_slot(dev); - func = pci_get_function(dev); - /* - * XXXMIPS: We need routing logic. This is just a stub . - */ - switch (device) { - case 9: /* - * PIIX4 IDE adapter. HW IRQ0 - */ - return 0; - case 11: /* Ethernet */ - return 10; - default: - device_printf(pcib, "no IRQ mapping for %d/%d/%d/%d\n", bus, device, func, pin); - - } - return (0); - -} - -static int -gt_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) -{ - struct gt_pci_softc *sc = device_get_softc(dev); - switch (which) { - case PCIB_IVAR_DOMAIN: - *result = 0; - return (0); - case PCIB_IVAR_BUS: - *result = sc->sc_busno; - return (0); - - } - return (ENOENT); -} - -static int -gt_write_ivar(device_t dev, device_t child, int which, uintptr_t result) -{ - struct gt_pci_softc * sc = device_get_softc(dev); - - switch (which) { - case PCIB_IVAR_BUS: - sc->sc_busno = result; - return (0); - } - return (ENOENT); -} - -static struct resource * -gt_pci_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct gt_pci_softc *sc = device_get_softc(bus); - struct resource *rv = NULL; - struct rman *rm; - bus_space_handle_t bh = 0; - - switch (type) { - case SYS_RES_IRQ: - rm = &sc->sc_irq_rman; - break; - case SYS_RES_MEMORY: - rm = &sc->sc_mem_rman; - bh = sc->sc_mem; - break; - case SYS_RES_IOPORT: - rm = &sc->sc_io_rman; - bh = sc->sc_io; - break; - default: - return (NULL); - } - - rv = rman_reserve_resource(rm, start, end, count, flags, child); - if (rv == NULL) - return (NULL); - rman_set_rid(rv, *rid); - if (type != SYS_RES_IRQ) { - bh += (rman_get_start(rv)); - - rman_set_bustag(rv, gt_pci_bus_space); - rman_set_bushandle(rv, bh); - if (flags & RF_ACTIVE) { - if (bus_activate_resource(child, type, *rid, rv)) { - rman_release_resource(rv); - return (NULL); - } - } - } - return (rv); -} - -static int -gt_pci_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - bus_space_handle_t p; - int error; - - if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { - error = bus_space_map(rman_get_bustag(r), - rman_get_bushandle(r), rman_get_size(r), 0, &p); - if (error) - return (error); - rman_set_bushandle(r, p); - } - return (rman_activate_resource(r)); -} - -static int -gt_pci_setup_intr(device_t dev, device_t child, struct resource *ires, - int flags, driver_filter_t *filt, driver_intr_t *handler, - void *arg, void **cookiep) -{ - struct gt_pci_softc *sc = device_get_softc(dev); - struct intr_event *event; - int irq, error; - - irq = rman_get_start(ires); - if (irq >= ICU_LEN || irq == 2) - panic("%s: bad irq or type", __func__); - - event = sc->sc_eventstab[irq]; - sc->sc_intr_cookies[irq].irq = irq; - sc->sc_intr_cookies[irq].sc = sc; - if (event == NULL) { - error = intr_event_create(&event, - (void *)&sc->sc_intr_cookies[irq], 0, irq, - gt_pci_mask_irq, gt_pci_unmask_irq, - NULL, NULL, "gt_pci intr%d:", irq); - if (error) - return 0; - sc->sc_eventstab[irq] = event; - } - - intr_event_add_handler(event, device_get_nameunit(child), filt, - handler, arg, intr_priority(flags), flags, cookiep); - - gt_pci_unmask_irq((void *)&sc->sc_intr_cookies[irq]); - return 0; -} - -static int -gt_pci_teardown_intr(device_t dev, device_t child, struct resource *res, - void *cookie) -{ - struct gt_pci_softc *sc = device_get_softc(dev); - int irq; - - irq = rman_get_start(res); - gt_pci_mask_irq((void *)&sc->sc_intr_cookies[irq]); - - return (intr_event_remove_handler(cookie)); -} - -static device_method_t gt_pci_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, gt_pci_probe), - DEVMETHOD(device_attach, gt_pci_attach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* Bus interface */ - DEVMETHOD(bus_read_ivar, gt_read_ivar), - DEVMETHOD(bus_write_ivar, gt_write_ivar), - DEVMETHOD(bus_alloc_resource, gt_pci_alloc_resource), - DEVMETHOD(bus_release_resource, bus_generic_release_resource), - DEVMETHOD(bus_activate_resource, gt_pci_activate_resource), - DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), - DEVMETHOD(bus_setup_intr, gt_pci_setup_intr), - DEVMETHOD(bus_teardown_intr, gt_pci_teardown_intr), - - /* pcib interface */ - DEVMETHOD(pcib_maxslots, gt_pci_maxslots), - DEVMETHOD(pcib_read_config, gt_pci_read_config), - DEVMETHOD(pcib_write_config, gt_pci_write_config), - DEVMETHOD(pcib_route_interrupt, gt_pci_route_interrupt), - DEVMETHOD(pcib_request_feature, pcib_request_feature_allow), - - DEVMETHOD_END -}; - -static driver_t gt_pci_driver = { - "pcib", - gt_pci_methods, - sizeof(struct gt_pci_softc), -}; - -static devclass_t gt_pci_devclass; - -DRIVER_MODULE(gt_pci, gt, gt_pci_driver, gt_pci_devclass, 0, 0); diff --git a/sys/mips/malta/gt_pci_bus_space.c b/sys/mips/malta/gt_pci_bus_space.c deleted file mode 100644 index 38dc4583b2b..00000000000 --- a/sys/mips/malta/gt_pci_bus_space.c +++ /dev/null @@ -1,408 +0,0 @@ -/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */ -/*- - * $Id: bus.h,v 1.6 2007/08/09 11:23:32 katta Exp $ - * - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, - * NASA Ames Research Center. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the NetBSD - * Foundation, Inc. and its contributors. - * 4. Neither the name of The NetBSD Foundation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Copyright (c) 1996 Charles M. Hannum. All rights reserved. - * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Christopher G. Demetriou - * for the NetBSD Project. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * from: src/sys/alpha/include/bus.h,v 1.5 1999/08/28 00:38:40 peter - */ -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include - -static bs_r_2_proto(gt_pci); -static bs_r_4_proto(gt_pci); -static bs_w_2_proto(gt_pci); -static bs_w_4_proto(gt_pci); -static bs_rm_2_proto(gt_pci); -static bs_rm_4_proto(gt_pci); -static bs_wm_2_proto(gt_pci); -static bs_wm_4_proto(gt_pci); -static bs_rr_2_proto(gt_pci); -static bs_rr_4_proto(gt_pci); -static bs_wr_2_proto(gt_pci); -static bs_wr_4_proto(gt_pci); -static bs_sm_2_proto(gt_pci); -static bs_sm_4_proto(gt_pci); -static bs_sr_2_proto(gt_pci); -static bs_sr_4_proto(gt_pci); - -static struct bus_space gt_pci_space = { - /* cookie */ - .bs_cookie = (void *) 0, - - /* mapping/unmapping */ - .bs_map = generic_bs_map, - .bs_unmap = generic_bs_unmap, - .bs_subregion = generic_bs_subregion, - - /* allocation/deallocation */ - .bs_alloc = generic_bs_alloc, - .bs_free = generic_bs_free, - - /* barrier */ - .bs_barrier = generic_bs_barrier, - - /* read (single) */ - .bs_r_1 = generic_bs_r_1, - .bs_r_2 = gt_pci_bs_r_2, - .bs_r_4 = gt_pci_bs_r_4, - .bs_r_8 = NULL, - - /* read multiple */ - .bs_rm_1 = generic_bs_rm_1, - .bs_rm_2 = gt_pci_bs_rm_2, - .bs_rm_4 = gt_pci_bs_rm_4, - .bs_rm_8 = NULL, - - /* read region */ - .bs_rr_1 = generic_bs_rr_1, - .bs_rr_2 = gt_pci_bs_rr_2, - .bs_rr_4 = gt_pci_bs_rr_4, - .bs_rr_8 = NULL, - - /* write (single) */ - .bs_w_1 = generic_bs_w_1, - .bs_w_2 = gt_pci_bs_w_2, - .bs_w_4 = gt_pci_bs_w_4, - .bs_w_8 = NULL, - - /* write multiple */ - .bs_wm_1 = generic_bs_wm_1, - .bs_wm_2 = gt_pci_bs_wm_2, - .bs_wm_4 = gt_pci_bs_wm_4, - .bs_wm_8 = NULL, - - /* write region */ - .bs_wr_1 = generic_bs_wr_1, - .bs_wr_2 = gt_pci_bs_wr_2, - .bs_wr_4 = gt_pci_bs_wr_4, - .bs_wr_8 = NULL, - - /* set multiple */ - .bs_sm_1 = generic_bs_sm_1, - .bs_sm_2 = gt_pci_bs_sm_2, - .bs_sm_4 = gt_pci_bs_sm_4, - .bs_sm_8 = NULL, - - /* set region */ - .bs_sr_1 = generic_bs_sr_1, - .bs_sr_2 = gt_pci_bs_sr_2, - .bs_sr_4 = gt_pci_bs_sr_4, - .bs_sr_8 = NULL, - - /* copy */ - .bs_c_1 = generic_bs_c_1, - .bs_c_2 = generic_bs_c_2, - .bs_c_4 = generic_bs_c_4, - .bs_c_8 = NULL, - - /* read (single) stream */ - .bs_r_1_s = generic_bs_r_1, - .bs_r_2_s = generic_bs_r_2, - .bs_r_4_s = generic_bs_r_4, - .bs_r_8_s = NULL, - - /* read multiple stream */ - .bs_rm_1_s = generic_bs_rm_1, - .bs_rm_2_s = generic_bs_rm_2, - .bs_rm_4_s = generic_bs_rm_4, - .bs_rm_8_s = NULL, - - /* read region stream */ - .bs_rr_1_s = generic_bs_rr_1, - .bs_rr_2_s = generic_bs_rr_2, - .bs_rr_4_s = generic_bs_rr_4, - .bs_rr_8_s = NULL, - - /* write (single) stream */ - .bs_w_1_s = generic_bs_w_1, - .bs_w_2_s = generic_bs_w_2, - .bs_w_4_s = generic_bs_w_4, - .bs_w_8_s = NULL, - - /* write multiple stream */ - .bs_wm_1_s = generic_bs_wm_1, - .bs_wm_2_s = generic_bs_wm_2, - .bs_wm_4_s = generic_bs_wm_4, - .bs_wm_8_s = NULL, - - /* write region stream */ - .bs_wr_1_s = generic_bs_wr_1, - .bs_wr_2_s = generic_bs_wr_2, - .bs_wr_4_s = generic_bs_wr_4, - .bs_wr_8_s = NULL, -}; - -#define rd16(a) le16toh(readw(a)) -#define rd32(a) le32toh(readl(a)) -#define wr16(a, v) writew(a, htole16(v)) -#define wr32(a, v) writel(a, htole32(v)) - -/* generic bus_space tag */ -bus_space_tag_t gt_pci_bus_space = >_pci_space; - -uint16_t -gt_pci_bs_r_2(void *t, bus_space_handle_t handle, - bus_size_t offset) -{ - - return (rd16(handle + offset)); -} - -uint32_t -gt_pci_bs_r_4(void *t, bus_space_handle_t handle, - bus_size_t offset) -{ - - return (rd32(handle + offset)); -} - -void -gt_pci_bs_rm_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint16_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) - *addr++ = rd16(baddr); -} - -void -gt_pci_bs_rm_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint32_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) - *addr++ = rd32(baddr); -} - -/* - * Read `count' 2 or 4 byte quantities from bus space - * described by tag/handle and starting at `offset' and copy into - * buffer provided. - */ -void -gt_pci_bs_rr_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint16_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - *addr++ = rd16(baddr); - baddr += 2; - } -} - -void -gt_pci_bs_rr_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint32_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - *addr++ = rd32(baddr); - baddr += 4; - } -} - -/* - * Write the 2 or 4 byte value `value' to bus space - * described by tag/handle/offset. - */ -void -gt_pci_bs_w_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint16_t value) -{ - - wr16(bsh + offset, value); -} - -void -gt_pci_bs_w_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint32_t value) -{ - - wr32(bsh + offset, value); -} - -/* - * Write `count' 2 or 4 byte quantities from the buffer - * provided to bus space described by tag/handle/offset. - */ -void -gt_pci_bs_wm_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, const uint16_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) - wr16(baddr, *addr++); -} - -void -gt_pci_bs_wm_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, const uint32_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) - wr32(baddr, *addr++); -} - -/* - * Write `count' 2 or 4 byte quantities from the buffer provided - * to bus space described by tag/handle starting at `offset'. - */ -void -gt_pci_bs_wr_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, const uint16_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - wr16(baddr, *addr++); - baddr += 2; - } -} - -void -gt_pci_bs_wr_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, const uint32_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - wr32(baddr, *addr++); - baddr += 4; - } -} - -/* - * Write the 2 or 4 byte value `val' to bus space described - * by tag/handle/offset `count' times. - */ -void -gt_pci_bs_sm_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint16_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - while (count--) - wr16(addr, value); -} - -void -gt_pci_bs_sm_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint32_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - while (count--) - wr32(addr, value); -} - -/* - * Write `count' 2 or 4 byte value `val' to bus space described - * by tag/handle starting at `offset'. - */ -void -gt_pci_bs_sr_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint16_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - for (; count != 0; count--, addr += 2) - wr16(addr, value); -} - -void -gt_pci_bs_sr_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint32_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - for (; count != 0; count--, addr += 4) - wr32(addr, value); -} diff --git a/sys/mips/malta/gt_pci_bus_space.h b/sys/mips/malta/gt_pci_bus_space.h deleted file mode 100644 index 23a8ac901a9..00000000000 --- a/sys/mips/malta/gt_pci_bus_space.h +++ /dev/null @@ -1,36 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#ifndef __GT_PCI_BUS_SPACEH__ -#define __GT_PCI_BUS_SPACEH__ - -extern bus_space_tag_t gt_pci_bus_space; - -#endif /* __GT_PCI_BUS_SPACEH__ */ diff --git a/sys/mips/malta/gtreg.h b/sys/mips/malta/gtreg.h deleted file mode 100644 index a605957f234..00000000000 --- a/sys/mips/malta/gtreg.h +++ /dev/null @@ -1,117 +0,0 @@ -/* $NetBSD: gtreg.h,v 1.2 2005/12/24 20:07:03 perry Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1997, 1998, 2001 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, - * NASA Ames Research Center. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#define GT_REGVAL(x) *((volatile u_int32_t *) \ - (MIPS_PHYS_TO_KSEG1(MALTA_CORECTRL_BASE + (x)))) - -/* CPU Configuration Register Map */ -#define GT_CPU_INT 0x000 -#define GT_MULTIGT 0x120 - -/* CPU Address Decode Register Map */ - -/* CPU Error Report Register Map */ - -/* CPU Sync Barrier Register Map */ - -/* SDRAM and Device Address Decode Register Map */ - -/* SDRAM Configuration Register Map */ - -/* SDRAM Parameters Register Map */ - -/* ECC Register Map */ - -/* Device Parameters Register Map */ - -/* DMA Record Register Map */ - -/* DMA Arbiter Register Map */ - -/* Timer/Counter Register Map */ -//#define GT_TC_0 0x850 -//#define GT_TC_1 0x854 -//#define GT_TC_2 0x858 -//#define GT_TC_3 0x85c -//#define GT_TC_CONTROL 0x864 - -/* PCI Internal Register Map */ -#define GT_PCI0_CFG_ADDR 0xcf8 -#define GT_PCI0_CFG_DATA 0xcfc -#define GT_PCI0_INTR_ACK 0xc34 - -/* Interrupts Register Map */ -#define GT_INTR_CAUSE 0xc18 -#define GTIC_INTSUM 0x00000001 -#define GTIC_MEMOUT 0x00000002 -#define GTIC_DMAOUT 0x00000004 -#define GTIC_CPUOUT 0x00000008 -#define GTIC_DMA0COMP 0x00000010 -#define GTIC_DMA1COMP 0x00000020 -#define GTIC_DMA2COMP 0x00000040 -#define GTIC_DMA3COMP 0x00000080 -#define GTIC_T0EXP 0x00000100 -#define GTIC_T1EXP 0x00000200 -#define GTIC_T2EXP 0x00000400 -#define GTIC_T3EXP 0x00000800 -#define GTIC_MASRDERR0 0x00001000 -#define GTIC_SLVWRERR0 0x00002000 -#define GTIC_MASWRERR0 0x00004000 -#define GTIC_SLVRDERR0 0x00008000 -#define GTIC_ADDRERR0 0x00010000 -#define GTIC_MEMERR 0x00020000 -#define GTIC_MASABORT0 0x00040000 -#define GTIC_TARABORT0 0x00080000 -#define GTIC_RETRYCNT0 0x00100000 -#define GTIC_PMCINT_0 0x00200000 -#define GTIC_CPUINT 0x0c300000 -#define GTIC_PCINT 0xc3000000 -#define GTIC_CPUINTSUM 0x40000000 -#define GTIC_PCIINTSUM 0x80000000 - -/* PCI Configuration Register Map */ -//#define GT_PCICONFIGBASE 0 -//#define GT_PCIDID BONITO(GT_PCICONFIGBASE + 0x00) -//#define GT_PCICMD BONITO(GT_PCICONFIGBASE + 0x04) -//#define GT_PCICLASS BONITO(GT_PCICONFIGBASE + 0x08) -//#define GT_PCILTIMER BONITO(GT_PCICONFIGBASE + 0x0c) -//#define GT_PCIBASE0 BONITO(GT_PCICONFIGBASE + 0x10) -//#define GT_PCIBASE1 BONITO(GT_PCICONFIGBASE + 0x14) -//#define GT_PCIBASE2 BONITO(GT_PCICONFIGBASE + 0x18) -//#define GT_PCIEXPRBASE BONITO(GT_PCICONFIGBASE + 0x30) -//#define GT_PCIINT BONITO(GT_PCICONFIGBASE + 0x3c) - -/* PCI Configuration, Function 1, Register Map */ - -/* I2O Support Register Map */ diff --git a/sys/mips/malta/gtvar.h b/sys/mips/malta/gtvar.h deleted file mode 100644 index 11988407c81..00000000000 --- a/sys/mips/malta/gtvar.h +++ /dev/null @@ -1,37 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2005 Olivier Houchard. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - -#ifndef _GTVAR_H_ -#define _GTVAR_H_ - -#include - -struct gt_softc { - device_t dev; -}; - -#endif /* _GTVAR_H_ */ diff --git a/sys/mips/malta/malta_machdep.c b/sys/mips/malta/malta_machdep.c deleted file mode 100644 index 51f1893e665..00000000000 --- a/sys/mips/malta/malta_machdep.c +++ /dev/null @@ -1,367 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Wojciech A. Koszek - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#include -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#ifdef TICK_USE_YAMON_FREQ -#include -#endif - -#ifdef TICK_USE_MALTA_RTC -#include -#include -#endif - -#include - -extern int *edata; -extern int *end; - -void lcd_init(void); -void lcd_puts(char *); -void malta_reset(void); - -/* - * Temporary boot environment used at startup. - */ -static char boot1_env[4096]; - -/* - * Offsets to MALTA LCD characters. - */ -static int malta_lcd_offs[] = { - MALTA_ASCIIPOS0, - MALTA_ASCIIPOS1, - MALTA_ASCIIPOS2, - MALTA_ASCIIPOS3, - MALTA_ASCIIPOS4, - MALTA_ASCIIPOS5, - MALTA_ASCIIPOS6, - MALTA_ASCIIPOS7 -}; - -void -platform_cpu_init() -{ - /* Nothing special */ -} - -/* - * Put character to Malta LCD at given position. - */ -static void -malta_lcd_putc(int pos, char c) -{ - void *addr; - char *ch; - - if (pos < 0 || pos > 7) - return; - addr = (void *)(MALTA_ASCII_BASE + malta_lcd_offs[pos]); - ch = (char *)MIPS_PHYS_TO_KSEG0(addr); - *ch = c; -} - -/* - * Print given string on LCD. - */ -static void -malta_lcd_print(char *str) -{ - int i; - - if (str == NULL) - return; - - for (i = 0; *str != '\0'; i++, str++) - malta_lcd_putc(i, *str); -} - -void -lcd_init(void) -{ - malta_lcd_print("FreeBSD_"); -} - -void -lcd_puts(char *s) -{ - malta_lcd_print(s); -} - -#ifdef TICK_USE_MALTA_RTC -static __inline uint8_t -malta_rtcin(uint8_t addr) -{ - - *((volatile uint8_t *) - MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCADR))) = addr; - return (*((volatile uint8_t *) - MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCDAT)))); -} - -static __inline void -malta_writertc(uint8_t addr, uint8_t val) -{ - - *((volatile uint8_t *) - MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCADR))) = addr; - *((volatile uint8_t *) - MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCDAT))) = val; -} -#endif - -static void -mips_init(unsigned long memsize, uint64_t ememsize) -{ - int i; - - for (i = 0; i < PHYS_AVAIL_ENTRIES; i++) { - phys_avail[i] = 0; - } - - /* - * memsize is the amount of RAM available below 256MB. - * ememsize is the total amount of RAM available. - * - * The second bank starts at 0x90000000. - */ - - /* phys_avail regions are in bytes */ - phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end); - phys_avail[1] = memsize; - dump_avail[0] = 0; - dump_avail[1] = phys_avail[1]; - - /* Only specify the extended region if it's set */ - if (ememsize > memsize) { - phys_avail[2] = 0x90000000; - phys_avail[3] = 0x90000000 + (ememsize - memsize); - dump_avail[2] = phys_avail[2]; - dump_avail[3] = phys_avail[3]; - } - - /* XXX realmem assigned in the caller of mips_init() */ - physmem = realmem; - - init_param1(); - init_param2(physmem); - mips_cpu_init(); - pmap_bootstrap(); - mips_proc0_init(); - mutex_init(); - kdb_init(); -#ifdef KDB - if (boothowto & RB_KDB) - kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); -#endif -} - -/* - * Perform a board-level soft-reset. - * Note that this is not emulated by gxemul. - */ -void -platform_reset(void) -{ - char *c; - - c = (char *)MIPS_PHYS_TO_KSEG0(MALTA_SOFTRES); - *c = MALTA_GORESET; -} - -static uint64_t -malta_cpu_freq(void) -{ - uint64_t platform_counter_freq = 0; - -#if defined(TICK_USE_YAMON_FREQ) - /* - * If we are running on a board which uses YAMON firmware, - * then query CPU pipeline clock from the syscon object. - * If unsuccessful, use hard-coded default. - */ - platform_counter_freq = yamon_getcpufreq(); - -#elif defined(TICK_USE_MALTA_RTC) - /* - * If we are running on a board with the MC146818 RTC, - * use it to determine CPU pipeline clock frequency. - */ - u_int64_t counterval[2]; - - /* Set RTC to binary mode. */ - malta_writertc(RTC_STATUSB, (malta_rtcin(RTC_STATUSB) | RTCSB_BCD)); - - /* Busy-wait for falling edge of RTC update. */ - while (((malta_rtcin(RTC_STATUSA) & RTCSA_TUP) == 0)) - ; - while (((malta_rtcin(RTC_STATUSA)& RTCSA_TUP) != 0)) - ; - counterval[0] = mips_rd_count(); - - /* Busy-wait for falling edge of RTC update. */ - while (((malta_rtcin(RTC_STATUSA) & RTCSA_TUP) == 0)) - ; - while (((malta_rtcin(RTC_STATUSA)& RTCSA_TUP) != 0)) - ; - counterval[1] = mips_rd_count(); - - platform_counter_freq = counterval[1] - counterval[0]; -#endif - - if (platform_counter_freq == 0) - platform_counter_freq = MIPS_DEFAULT_HZ; - - return (platform_counter_freq); -} - -void -platform_start(__register_t a0, __register_t a1, __register_t a2, - __register_t a3) -{ - vm_offset_t kernend; - uint64_t platform_counter_freq; - int argc = a0; - int32_t *argv = (int32_t*)a1; - int32_t *envp = (int32_t*)a2; - unsigned int memsize = a3; - uint64_t ememsize = 0; - int i; - - /* clear the BSS and SBSS segments */ - kernend = (vm_offset_t)&end; - memset(&edata, 0, kernend - (vm_offset_t)(&edata)); - - mips_postboot_fixup(); - - mips_pcpu0_init(); - platform_counter_freq = malta_cpu_freq(); - mips_timer_early_init(platform_counter_freq); - init_static_kenv(boot1_env, sizeof(boot1_env)); - - cninit(); - printf("entry: platform_start()\n"); - - bootverbose = 1; - - /* - * YAMON uses 32bit pointers to strings so - * convert them to proper type manually - */ - - if (bootverbose) { - printf("cmd line: "); - for (i = 0; i < argc; i++) - printf("%s ", (char*)(intptr_t)argv[i]); - printf("\n"); - } - - if (bootverbose) - printf("envp:\n"); - - /* - * Parse the environment for things like ememsize. - */ - for (i = 0; envp[i]; i += 2) { - const char *a, *v; - - a = (char *)(intptr_t)envp[i]; - v = (char *)(intptr_t)envp[i+1]; - - if (bootverbose) - printf("\t%s = %s\n", a, v); - - if (strcmp(a, "ememsize") == 0) { - ememsize = strtoul(v, NULL, 0); - } - } - - if (bootverbose) { - printf("memsize = %llu (0x%08x)\n", - (unsigned long long) memsize, memsize); - printf("ememsize = %llu\n", (unsigned long long) ememsize); - -#ifdef __mips_o32 - /* - * For O32 phys_avail[] can't address memory beyond 2^32, - * so cap extended memory to 2GB minus one page. - */ - if (ememsize >= 2ULL * 1024 * 1024 * 1024) - ememsize = 2ULL * 1024 * 1024 * 1024 - PAGE_SIZE; -#endif - } - - /* - * For <= 256MB RAM amounts, ememsize should equal memsize. - * For > 256MB RAM amounts it's the total RAM available; - * split between two banks. - * - * XXX TODO: just push realmem assignment into mips_init() ? - */ - realmem = btoc(ememsize); - mips_init(memsize, ememsize); - - mips_timer_init_params(platform_counter_freq, 0); -} diff --git a/sys/mips/malta/malta_mp.c b/sys/mips/malta/malta_mp.c deleted file mode 100644 index 693c6b13248..00000000000 --- a/sys/mips/malta/malta_mp.c +++ /dev/null @@ -1,281 +0,0 @@ -/*- - * Copyright (c) 2016 Ruslan Bukin - * All rights reserved. - * - * Portions of this software were developed by SRI International and the - * University of Cambridge Computer Laboratory under DARPA/AFRL contract - * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Portions of this software were developed by the University of Cambridge - * Computer Laboratory as part of the CTSRD Project, with support from the - * UK Higher Education Innovation Fund (HEIF). - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#define VPECONF0_VPA (1 << 0) -#define MVPCONTROL_VPC (1 << 1) -#define MVPCONF0_PVPE_SHIFT 10 -#define MVPCONF0_PVPE_MASK (0xf << MVPCONF0_PVPE_SHIFT) -#define TCSTATUS_A (1 << 13) - -unsigned malta_ap_boot = ~0; - -#define C_SW0 (1 << 8) -#define C_SW1 (1 << 9) -#define C_IRQ0 (1 << 10) -#define C_IRQ1 (1 << 11) -#define C_IRQ2 (1 << 12) -#define C_IRQ3 (1 << 13) -#define C_IRQ4 (1 << 14) -#define C_IRQ5 (1 << 15) - -static inline void -evpe(void) -{ - __asm __volatile( - " .set push \n" - " .set noreorder \n" - " .set noat \n" - " .set mips32r2 \n" - " .word 0x41600021 # evpe \n" - " ehb \n" - " .set pop \n"); -} - -static inline void -ehb(void) -{ - __asm __volatile( - " .set mips32r2 \n" - " ehb \n" - " .set mips0 \n"); -} - -#define mttc0(rd, sel, val) \ -({ \ - __asm __volatile( \ - " .set push \n" \ - " .set mips32r2 \n" \ - " .set noat \n" \ - " move $1, %0 \n" \ - " .word 0x41810000 | (" #rd " << 11) | " #sel " \n" \ - " .set pop \n" \ - :: "r" (val)); \ -}) - -#define mftc0(rt, sel) \ -({ \ - unsigned long __res; \ - __asm __volatile( \ - " .set push \n" \ - " .set mips32r2 \n" \ - " .set noat \n" \ - " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" \ - " move %0, $1 \n" \ - " .set pop \n" \ - : "=r" (__res)); \ - __res; \ -}) - -#define write_c0_register32(reg, sel, val) \ -({ \ - __asm __volatile( \ - " .set push \n" \ - " .set mips32 \n" \ - " mtc0 %0, $%1, %2 \n" \ - " .set pop \n" \ - :: "r" (val), "i" (reg), "i" (sel)); \ -}) - -#define read_c0_register32(reg, sel) \ -({ \ - uint32_t __retval; \ - __asm __volatile( \ - " .set push \n" \ - " .set mips32 \n" \ - " mfc0 %0, $%1, %2 \n" \ - " .set pop \n" \ - : "=r" (__retval) : "i" (reg), "i" (sel)); \ - __retval; \ -}) - -static void -set_thread_context(int cpuid) -{ - uint32_t reg; - - reg = read_c0_register32(1, 1); - reg &= ~(0xff); - reg |= cpuid; - write_c0_register32(1, 1, reg); - - ehb(); -} - -void -platform_ipi_send(int cpuid) -{ - uint32_t reg; - - set_thread_context(cpuid); - - /* Set cause */ - reg = mftc0(13, 0); - reg |= (C_SW1); - mttc0(13, 0, reg); -} - -void -platform_ipi_clear(void) -{ - uint32_t reg; - - reg = mips_rd_cause(); - reg &= ~(C_SW1); - mips_wr_cause(reg); -} - -int -platform_ipi_hardintr_num(void) -{ - - return (-1); -} - -int -platform_ipi_softintr_num(void) -{ - - return (1); -} - -void -platform_init_ap(int cpuid) -{ - uint32_t clock_int_mask; - uint32_t ipi_intr_mask; - - /* - * Clear any pending IPIs. - */ - platform_ipi_clear(); - - /* - * Unmask the clock and ipi interrupts. - */ - ipi_intr_mask = soft_int_mask(platform_ipi_softintr_num()); - clock_int_mask = hard_int_mask(5); - set_intr_mask(ipi_intr_mask | clock_int_mask); - - mips_wbflush(); -} - -void -platform_cpu_mask(cpuset_t *mask) -{ - uint32_t i, ncpus, reg; - - reg = mftc0(0, 2); - ncpus = ((reg & MVPCONF0_PVPE_MASK) >> MVPCONF0_PVPE_SHIFT) + 1; - - CPU_ZERO(mask); - for (i = 0; i < ncpus; i++) - CPU_SET(i, mask); -} - -struct cpu_group * -platform_smp_topo(void) -{ - - return (smp_topo_none()); -} - -int -platform_start_ap(int cpuid) -{ - uint32_t reg; - int timeout; - - /* Enter into configuration */ - reg = read_c0_register32(0, 1); - reg |= (MVPCONTROL_VPC); - write_c0_register32(0, 1, reg); - - set_thread_context(cpuid); - - /* - * Hint: how to set entry point. - * reg = 0x80000000; - * mttc0(2, 3, reg); - */ - - /* Enable thread */ - reg = mftc0(2, 1); - reg |= (TCSTATUS_A); - mttc0(2, 1, reg); - - /* Unhalt CPU core */ - mttc0(2, 4, 0); - - /* Activate VPE */ - reg = mftc0(1, 2); - reg |= (VPECONF0_VPA); - mttc0(1, 2, reg); - - /* Out of configuration */ - reg = read_c0_register32(0, 1); - reg &= ~(MVPCONTROL_VPC); - write_c0_register32(0, 1, reg); - - evpe(); - - if (atomic_cmpset_32(&malta_ap_boot, ~0, cpuid) == 0) - return (-1); - - printf("Waiting for cpu%d to start\n", cpuid); - - timeout = 100; - do { - DELAY(1000); - if (atomic_cmpset_32(&malta_ap_boot, 0, ~0) != 0) { - printf("CPU %d started\n", cpuid); - return (0); - } - } while (timeout--); - - printf("CPU %d failed to start\n", cpuid); - - return (0); -} diff --git a/sys/mips/malta/maltareg.h b/sys/mips/malta/maltareg.h deleted file mode 100644 index 47e8ac888a2..00000000000 --- a/sys/mips/malta/maltareg.h +++ /dev/null @@ -1,242 +0,0 @@ -/* $NetBSD: maltareg.h,v 1.1 2002/03/07 14:44:04 simonb Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright 2002 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Simon Burge for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - Memory Map - - 0000.0000 * 128MB Typically SDRAM (on Core Board) - 0800.0000 * 256MB Typically PCI - 1800.0000 * 62MB Typically PCI - 1be0.0000 * 2MB Typically System controller's internal registers - 1c00.0000 * 32MB Typically not used - 1e00.0000 4MB Monitor Flash - 1e40.0000 12MB reserved - 1f00.0000 12MB Switches - LEDs - ASCII display - Soft reset - FPGA revision number - CBUS UART (tty2) - General Purpose I/O - I2C controller - 1f10.0000 * 11MB Typically System Controller specific - 1fc0.0000 4MB Maps to Monitor Flash - 1fd0.0000 * 3MB Typically System Controller specific - - * depends on implementation of the Core Board and of software - */ - -/* - CPU interrupts - - NMI South Bridge or NMI button - 0 South Bridge INTR - 1 South Bridge SMI - 2 CBUS UART (tty2) - 3 COREHI (Core Card) - 4 CORELO (Core Card) - 5 Not used, driven inactive (typically CPU internal timer interrupt - - IRQ mapping (as used by YAMON) - - 0 Timer South Bridge - 1 Keyboard SuperIO - 2 Reserved by South Bridge (for cascading) - 3 UART (tty1) SuperIO - 4 UART (tty0) SuperIO - 5 Not used - 6 Floppy Disk SuperIO - 7 Parallel Port SuperIO - 8 Real Time Clock South Bridge - 9 I2C bus South Bridge - 10 PCI A,B,eth PCI slot 1..4, Ethernet - 11 PCI C,audio PCI slot 1..4, Audio, USB (South Bridge) - PCI D,USB - 12 Mouse SuperIO - 13 Reserved by South Bridge - 14 Primary IDE Primary IDE slot - 15 Secondary IDE Secondary IDE slot/Compact flash connector - */ - -#define MALTA_SYSTEMRAM_BASE 0x00000000ul /* System RAM: */ -#define MALTA_SYSTEMRAM_SIZE 0x08000000 /* 128 MByte */ - -#define MALTA_PCIMEM1_BASE 0x08000000ul /* PCI 1 memory: */ -#define MALTA_PCIMEM1_SIZE 0x08000000 /* 128 MByte */ - -#define MALTA_PCIMEM2_BASE 0x10000000ul /* PCI 2 memory: */ -#define MALTA_PCIMEM2_SIZE 0x08000000 /* 128 MByte */ - -#define MALTA_PCIMEM3_BASE 0x18000000ul /* PCI 3 memory */ -#define MALTA_PCIMEM3_SIZE 0x03e00000 /* 62 MByte */ - -#define MALTA_CORECTRL_BASE 0x1be00000ul /* Core control: */ -#define MALTA_CORECTRL_SIZE 0x00200000 /* 2 MByte */ - -#define MALTA_RESERVED_BASE1 0x1c000000ul /* Reserved: */ -#define MALTA_RESERVED_SIZE1 0x02000000 /* 32 MByte */ - -#define MALTA_MONITORFLASH_BASE 0x1e000000ul /* Monitor Flash: */ -#define MALTA_MONITORFLASH_SIZE 0x003e0000 /* 4 MByte */ -#define MALTA_MONITORFLASH_SECTORSIZE 0x00010000 /* Sect. = 64 KB */ - -#define MALTA_FILEFLASH_BASE 0x1e3e0000ul /* File Flash (for monitor): */ -#define MALTA_FILEFLASH_SIZE 0x00020000 /* 128 KByte */ - -#define MALTA_FILEFLASH_SECTORSIZE 0x00010000 /* Sect. = 64 KB */ - -#define MALTA_RESERVED_BASE2 0x1e400000ul /* Reserved: */ -#define MALTA_RESERVED_SIZE2 0x00c00000 /* 12 MByte */ - -#define MALTA_FPGA_BASE 0x1f000000ul /* FPGA: */ -#define MALTA_FPGA_SIZE 0x00c00000 /* 12 MByte */ - -#define MALTA_NMISTATUS (MALTA_FPGA_BASE + 0x24) -#define MALTA_NMI_SB 0x2 /* Pending NMI from the South Bridge */ -#define MALTA_NMI_ONNMI 0x1 /* Pending NMI from the ON/NMI push button */ - -#define MALTA_NMIACK (MALTA_FPGA_BASE + 0x104) -#define MALTA_NMIACK_ONNMI 0x1 /* Write 1 to acknowledge ON/NMI */ - -#define MALTA_SWITCH (MALTA_FPGA_BASE + 0x200) -#define MALTA_SWITCH_MASK 0xff /* settings of DIP switch S2 */ - -#define MALTA_STATUS (MALTA_FPGA_BASE + 0x208) -#define MALTA_ST_MFWR 0x10 /* Monitor Flash is write protected (JP1) */ -#define MALTA_S54 0x08 /* switch S5-4 - set YAMON factory default mode */ -#define MALTA_S53 0x04 /* switch S5-3 */ -#define MALTA_BIGEND 0x02 /* switch S5-2 - big endian mode */ - -#define MALTA_JMPRS (MALTA_FPGA_BASE + 0x210) -#define MALTA_JMPRS_PCICLK 0x1c /* PCI clock frequency */ -#define MALTA_JMPRS_EELOCK 0x02 /* I2C EEPROM is write protected */ - -#define MALTA_LEDBAR (MALTA_FPGA_BASE + 0x408) -#define MALTA_ASCIIWORD (MALTA_FPGA_BASE + 0x410) -#define MALTA_ASCII_BASE (MALTA_FPGA_BASE + 0x418) -#define MALTA_ASCIIPOS0 0x00 -#define MALTA_ASCIIPOS1 0x08 -#define MALTA_ASCIIPOS2 0x10 -#define MALTA_ASCIIPOS3 0x18 -#define MALTA_ASCIIPOS4 0x20 -#define MALTA_ASCIIPOS5 0x28 -#define MALTA_ASCIIPOS6 0x30 -#define MALTA_ASCIIPOS7 0x38 - -#define MALTA_SOFTRES (MALTA_FPGA_BASE + 0x500) -#define MALTA_GORESET 0x42 /* write this to MALTA_SOFTRES for board reset */ - -/* - * BRKRES is the number of milliseconds before a "break" on tty will - * trigger a reset. A value of 0 will disable the reset. - */ -#define MALTA_BRKRES (MALTA_FPGA_BASE + 0x508) -#define MALTA_BRKRES_MASK 0xff - -#define MALTA_CBUSUART (MALTA_FPGA_BASE + 0x900) -/* 16C550C UART, 8 bit registers on 8 byte boundaries */ -/* RXTX 0x00 */ -/* INTEN 0x08 */ -/* IIFIFO 0x10 */ -/* LCTRL 0x18 */ -/* MCTRL 0x20 */ -/* LSTAT 0x28 */ -/* MSTAT 0x30 */ -/* SCRATCH 0x38 */ -#define MALTA_CBUSUART_INTR 2 - -#define MALTA_GPIO_BASE (MALTA_FPGA_BASE + 0xa00) -#define MALTA_GPOUT 0x0 -#define MALTA_GPINP 0x8 - -#define MALTA_I2C_BASE (MALTA_FPGA_BASE + 0xb00) -#define MALTA_I2CINP 0x00 -#define MALTA_I2COE 0x08 -#define MALTA_I2COUT 0x10 -#define MALTA_I2CSEL 0x18 - -#define MALTA_BOOTROM_BASE 0x1fc00000ul /* Boot ROM: */ -#define MALTA_BOOTROM_SIZE 0x00400000 /* 4 MByte */ - -#define MALTA_REVISION 0x1fc00010ul -#define MALTA_REV_FPGRV 0xff0000 /* CBUS FPGA revision */ -#define MALTA_REV_CORID 0x00fc00 /* Core Board ID */ -#define MALTA_REV_CORRV 0x000300 /* Core Board Revision */ -#define MALTA_REV_PROID 0x0000f0 /* Product ID */ -#define MALTA_REV_PRORV 0x00000f /* Product Revision */ - -/* PCI definitions */ -#define MALTA_SOUTHBRIDGE_INTR 0 - -#define MALTA_PCI0_IO_BASE MALTA_PCIMEM3_BASE -#define MALTA_PCI0_ADDR( addr ) (MALTA_PCI0_IO_BASE + (addr)) - -#define MALTA_RTCADR 0x70 // MALTA_PCI_IO_ADDR8(0x70) -#define MALTA_RTCDAT 0x71 // MALTA_PCI_IO_ADDR8(0x71) - -#define MALTA_SMSC_COM1_ADR 0x3f8 -#define MALTA_SMSC_COM2_ADR 0x2f8 -#define MALTA_UART0ADR MALTA_PCI0_ADDR(MALTA_SMSC_COM1_ADR) -#define MALTA_UART1ADR MALTA_SMSC_COM2_ADR // MALTA_PCI0_ADDR(MALTA_SMSC_COM2_ADR) - -#define MALTA_SMSC_1284_ADR 0x378 -#define MALTA_1284ADR MALTA_SMSC_1284_ADR // MALTA_PCI0_ADDR(MALTA_SMSC_1284_ADR) - -#define MALTA_SMSC_FDD_ADR 0x3f0 -#define MALTA_FDDADR MALTA_SMSC_FDD_ADR // MALTA_PCI0_ADDR(MALTA_SMSC_FDD_ADR) - -#define MALTA_SMSC_KYBD_ADR 0x60 /* Fixed 0x60, 0x64 */ -#define MALTA_KYBDADR MALTA_SMSC_KYBD_ADR // MALTA_PCI0_ADDR(MALTA_SMSC_KYBD_ADR) -#define MALTA_SMSC_MOUSE_ADR MALTA_SMSC_KYBD_ADR -#define MALTA_MOUSEADR MALTA_KYBDADR - -#define MALTA_DMA_PCI_PCIBASE 0x00000000UL -#define MALTA_DMA_PCI_PHYSBASE 0x00000000UL -#define MALTA_DMA_PCI_SIZE (256 * 1024 * 1024) - -#define MALTA_DMA_ISA_PCIBASE 0x00800000UL -#define MALTA_DMA_ISA_PHYSBASE 0x00000000UL -#define MALTA_DMA_ISA_SIZE (8 * 1024 * 1024) - -#ifndef _LOCORE -void led_bar(uint8_t); -void led_display_word(uint32_t); -void led_display_str(const char *); -void led_display_char(int, uint8_t); -#endif diff --git a/sys/mips/malta/obio.c b/sys/mips/malta/obio.c deleted file mode 100644 index a5158d263b6..00000000000 --- a/sys/mips/malta/obio.c +++ /dev/null @@ -1,182 +0,0 @@ -/* $NetBSD: obio.c,v 1.11 2003/07/15 00:25:05 lukem Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Jason R. Thorpe for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * On-board device autoconfiguration support for Intel IQ80321 - * evaluation boards. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -int obio_probe(device_t); -int obio_attach(device_t); - -/* - * A bit tricky and hackish. Since we need OBIO to rely - * on PCI we make it pseudo-pci device. But there should - * be only one such device, so we use this static flag - * to prevent false positives on every real PCI device probe. - */ -static int have_one = 0; - -int -obio_probe(device_t dev) -{ - if (!have_one) { - have_one = 1; - return 0; - } - return (ENXIO); -} - -int -obio_attach(device_t dev) -{ - struct obio_softc *sc = device_get_softc(dev); - - sc->oba_st = mips_bus_space_generic; - sc->oba_addr = MIPS_PHYS_TO_KSEG1(MALTA_UART0ADR); - sc->oba_size = MALTA_PCIMEM3_SIZE; - sc->oba_rman.rm_type = RMAN_ARRAY; - sc->oba_rman.rm_descr = "OBIO I/O"; - if (rman_init(&sc->oba_rman) != 0 || - rman_manage_region(&sc->oba_rman, - sc->oba_addr, sc->oba_addr + sc->oba_size) != 0) - panic("obio_attach: failed to set up I/O rman"); - sc->oba_irq_rman.rm_type = RMAN_ARRAY; - sc->oba_irq_rman.rm_descr = "OBIO IRQ"; - - /* - * This module is intended for UART purposes only and - * it's IRQ is 4 - */ - if (rman_init(&sc->oba_irq_rman) != 0 || - rman_manage_region(&sc->oba_irq_rman, 4, 4) != 0) - panic("obio_attach: failed to set up IRQ rman"); - - device_add_child(dev, "uart", 0); - bus_generic_probe(dev); - bus_generic_attach(dev); - - return (0); -} - -static struct resource * -obio_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct resource *rv; - struct rman *rm; - bus_space_tag_t bt = 0; - bus_space_handle_t bh = 0; - struct obio_softc *sc = device_get_softc(bus); - - switch (type) { - case SYS_RES_IRQ: - rm = &sc->oba_irq_rman; - break; - case SYS_RES_MEMORY: - return (NULL); - case SYS_RES_IOPORT: - rm = &sc->oba_rman; - bt = sc->oba_st; - bh = sc->oba_addr; - start = bh; - break; - default: - return (NULL); - } - - rv = rman_reserve_resource(rm, start, end, count, flags, child); - if (rv == NULL) - return (NULL); - if (type == SYS_RES_IRQ) - return (rv); - rman_set_rid(rv, *rid); - rman_set_bustag(rv, bt); - rman_set_bushandle(rv, bh); - - if (0) { - if (bus_activate_resource(child, type, *rid, rv)) { - rman_release_resource(rv); - return (NULL); - } - } - return (rv); - -} - -static int -obio_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - return (0); -} -static device_method_t obio_methods[] = { - DEVMETHOD(device_probe, obio_probe), - DEVMETHOD(device_attach, obio_attach), - - DEVMETHOD(bus_alloc_resource, obio_alloc_resource), - DEVMETHOD(bus_activate_resource, obio_activate_resource), - DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - - {0, 0}, -}; - -static driver_t obio_driver = { - "obio", - obio_methods, - sizeof(struct obio_softc), -}; -static devclass_t obio_devclass; - -DRIVER_MODULE(obio, pci, obio_driver, obio_devclass, 0, 0); diff --git a/sys/mips/malta/obiovar.h b/sys/mips/malta/obiovar.h deleted file mode 100644 index 99c8b5d44c1..00000000000 --- a/sys/mips/malta/obiovar.h +++ /dev/null @@ -1,58 +0,0 @@ -/* $NetBSD: obiovar.h,v 1.4 2003/06/16 17:40:53 thorpej Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 2002, 2003 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Jason R. Thorpe for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef _MALTA_OBIOVAR_H_ -#define _MALTA_OBIOVAR_H_ - -#include - -struct obio_softc { - bus_space_tag_t oba_st; /* bus space tag */ - bus_addr_t oba_addr; /* address of device */ - bus_size_t oba_size; /* size of device */ - int oba_width; /* bus width */ - int oba_irq; /* XINT interrupt bit # */ - struct rman oba_rman; - struct rman oba_irq_rman; - -}; -extern struct bus_space obio_bs_tag; - -#endif /* _MALTA_OBIOVAR_H_ */ diff --git a/sys/mips/malta/std.malta b/sys/mips/malta/std.malta deleted file mode 100644 index 5f2a4d3c85c..00000000000 --- a/sys/mips/malta/std.malta +++ /dev/null @@ -1,10 +0,0 @@ -files "../malta/files.malta" - -cpu CPU_MALTA -device pci -device ata - -device scbus # SCSI bus (required for ATA/SCSI) -device cd # CD -device da # Direct Access (disks) -device pass # Passthrough device (direct ATA/SCSI access) diff --git a/sys/mips/malta/uart_bus_maltausart.c b/sys/mips/malta/uart_bus_maltausart.c deleted file mode 100644 index c0a48206fc5..00000000000 --- a/sys/mips/malta/uart_bus_maltausart.c +++ /dev/null @@ -1,91 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Wojciech A. Koszek - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * $Id$ - */ -/* - * Skeleton of this file was based on respective code for ARM - * code written by Olivier Houchard. - */ - -#include "opt_uart.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include - -#include "uart_if.h" - -static int uart_malta_probe(device_t dev); - -extern struct uart_class malta_uart_class; - -static device_method_t uart_malta_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, uart_malta_probe), - DEVMETHOD(device_attach, uart_bus_attach), - DEVMETHOD(device_detach, uart_bus_detach), - { 0, 0 } -}; - -static driver_t uart_malta_driver = { - uart_driver_name, - uart_malta_methods, - sizeof(struct uart_softc), -}; - -extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs; -static int -uart_malta_probe(device_t dev) -{ - struct uart_softc *sc; - - sc = device_get_softc(dev); - sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs); - sc->sc_class = &uart_ns8250_class; - bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); - sc->sc_sysdev->bas.bst = mips_bus_space_generic; - sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(MALTA_UART0ADR); - sc->sc_bas.bst = mips_bus_space_generic; - sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(MALTA_UART0ADR); - return(uart_bus_probe(dev, 0, 0, 0, 0, 0, 0)); -} - -DRIVER_MODULE(uart, obio, uart_malta_driver, uart_devclass, 0, 0); diff --git a/sys/mips/malta/uart_cpu_maltausart.c b/sys/mips/malta/uart_cpu_maltausart.c deleted file mode 100644 index cc5b5fad3da..00000000000 --- a/sys/mips/malta/uart_cpu_maltausart.c +++ /dev/null @@ -1,78 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Wojciech A. Koszek - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $Id$ - */ -/* - * Skeleton of this file was based on respective code for ARM - * code written by Olivier Houchard. - */ -#include "opt_uart.h" - -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include - -bus_space_tag_t uart_bus_space_io; -bus_space_tag_t uart_bus_space_mem; - -extern struct uart_ops malta_usart_ops; -extern struct bus_space malta_bs_tag; - -int -uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2) -{ - return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0); -} - -int -uart_cpu_getdev(int devtype, struct uart_devinfo *di) -{ - di->ops = uart_getops(&uart_ns8250_class); - di->bas.chan = 0; - di->bas.bst = mips_bus_space_generic; - di->bas.bsh = MIPS_PHYS_TO_KSEG1(MALTA_UART0ADR); - di->bas.regshft = 0; - di->bas.rclk = 0; - di->baudrate = 0; /* retain the baudrate configured by YAMON */ - di->databits = 8; - di->stopbits = 1; - di->parity = UART_PARITY_NONE; - - uart_bus_space_io = NULL; - uart_bus_space_mem = mips_bus_space_generic; - return (0); -} diff --git a/sys/mips/malta/yamon.c b/sys/mips/malta/yamon.c deleted file mode 100644 index e29c465dbde..00000000000 --- a/sys/mips/malta/yamon.c +++ /dev/null @@ -1,66 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006-2008 Bruce M. Simpson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include - -#include - -char * -yamon_getenv(char *name) -{ - char *value; - yamon_env_t *p; - - value = NULL; - for (p = *fenvp; p->name != NULL; ++p) { - if (!strcmp(name, p->name)) { - value = p->value; - break; - } - } - - return (value); -} - -uint32_t -yamon_getcpufreq(void) -{ - uint32_t freq; - int ret; - - freq = 0; - ret = YAMON_SYSCON_READ(SYSCON_BOARD_CPU_CLOCK_FREQ_ID, &freq, - sizeof(freq)); - if (ret != 0) - freq = 0; - - return (freq); -} diff --git a/sys/mips/malta/yamon.h b/sys/mips/malta/yamon.h deleted file mode 100644 index be8eba3a2b4..00000000000 --- a/sys/mips/malta/yamon.h +++ /dev/null @@ -1,93 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright 2002 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Simon Burge for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MALTA_YAMON_H_ -#define _MALTA_YAMON_H_ - -#define YAMON_FUNCTION_BASE 0x1fc00500ul - -#define YAMON_PRINT_COUNT_OFS (YAMON_FUNCTION_BASE + 0x04) -#define YAMON_EXIT_OFS (YAMON_FUNCTION_BASE + 0x20) -#define YAMON_FLUSH_CACHE_OFS (YAMON_FUNCTION_BASE + 0x2c) -#define YAMON_PRINT_OFS (YAMON_FUNCTION_BASE + 0x34) -#define YAMON_REG_CPU_ISR_OFS (YAMON_FUNCTION_BASE + 0x38) -#define YAMON_DEREG_CPU_ISR_OFS (YAMON_FUNCTION_BASE + 0x3c) -#define YAMON_REG_IC_ISR_OFS (YAMON_FUNCTION_BASE + 0x40) -#define YAMON_DEREG_IC_ISR_OFS (YAMON_FUNCTION_BASE + 0x44) -#define YAMON_REG_ESR_OFS (YAMON_FUNCTION_BASE + 0x48) -#define YAMON_DEREG_ESR_OFS (YAMON_FUNCTION_BASE + 0x4c) -#define YAMON_GETCHAR_OFS (YAMON_FUNCTION_BASE + 0x50) -#define YAMON_SYSCON_READ_OFS (YAMON_FUNCTION_BASE + 0x54) - -#define YAMON_FUNC(ofs) ((long)(*(int32_t *)(MIPS_PHYS_TO_KSEG0(ofs)))) - -typedef void (*t_yamon_print_count)(uint32_t port, char *s, uint32_t count); -#define YAMON_PRINT_COUNT(s, count) \ - ((t_yamon_print_count)(YAMON_FUNC(YAMON_PRINT_COUNT_OFS)))(0, s, count) - -typedef void (*t_yamon_exit)(uint32_t rc); -#define YAMON_EXIT(rc) ((t_yamon_exit)(YAMON_FUNC(YAMON_EXIT_OFS)))(rc) - -typedef void (*t_yamon_print)(uint32_t port, const char *s); -#define YAMON_PRINT(s) ((t_yamon_print)(YAMON_FUNC(YAMON_PRINT_OFS)))(0, s) - -typedef int (*t_yamon_getchar)(uint32_t port, char *ch); -#define YAMON_GETCHAR(ch) \ - ((t_yamon_getchar)(YAMON_FUNC(YAMON_GETCHAR_OFS)))(0, ch) - -typedef int t_yamon_syscon_id; -typedef int (*t_yamon_syscon_read)(t_yamon_syscon_id id, void *param, - uint32_t size); -#define YAMON_SYSCON_READ(id, param, size) \ - ((t_yamon_syscon_read)(YAMON_FUNC(YAMON_SYSCON_READ_OFS))) \ - (id, param, size) - -typedef struct { - char *name; - char *value; -} yamon_env_t; - -#define SYSCON_BOARD_CPU_CLOCK_FREQ_ID 34 /* UINT32 */ -#define SYSCON_BOARD_BUS_CLOCK_FREQ_ID 35 /* UINT32 */ -#define SYSCON_BOARD_PCI_FREQ_KHZ_ID 36 /* UINT32 */ - -char* yamon_getenv(char *name); -uint32_t yamon_getcpufreq(void); - -extern yamon_env_t *fenvp[]; - -#endif /* _MALTA_YAMON_H_ */ diff --git a/sys/mips/mediatek/fdt_reset.c b/sys/mips/mediatek/fdt_reset.c deleted file mode 100644 index 21f1f28654e..00000000000 --- a/sys/mips/mediatek/fdt_reset.c +++ /dev/null @@ -1,122 +0,0 @@ -/*- - * Copyright (c) 2016 Stanislav Galabov - * Copyright (c) 2014 Ian Lepore - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "fdt_reset_if.h" -#include - -/* - * Loop through all the tuples in the resets= property for a device, asserting - * or deasserting each reset. - * - * Be liberal about errors for now: warn about a failure to (de)assert but keep - * trying with any other resets in the list. Return ENXIO if any errors were - * found, and let the caller decide whether the problem is fatal. - */ -static int -assert_deassert_all(device_t consumer, boolean_t assert) -{ - phandle_t rnode; - device_t resetdev; - int resetnum, err, i, ncells; - uint32_t *resets; - boolean_t anyerrors; - - rnode = ofw_bus_get_node(consumer); - ncells = OF_getencprop_alloc_multi(rnode, "resets", sizeof(*resets), - (void **)&resets); - if (!assert && ncells < 2) { - device_printf(consumer, "Warning: No resets specified in fdt " - "data; device may not function."); - return (ENXIO); - } - anyerrors = false; - for (i = 0; i < ncells; i += 2) { - resetdev = OF_device_from_xref(resets[i]); - resetnum = resets[i + 1]; - if (resetdev == NULL) { - if (!assert) - device_printf(consumer, "Warning: can not find " - "driver for reset number %u; device may " - "not function\n", resetnum); - anyerrors = true; - continue; - } - if (assert) - err = FDT_RESET_ASSERT(resetdev, resetnum); - else - err = FDT_RESET_DEASSERT(resetdev, resetnum); - if (err != 0) { - if (!assert) - device_printf(consumer, "Warning: failed to " - "deassert reset number %u; device may not " - "function\n", resetnum); - anyerrors = true; - } - } - OF_prop_free(resets); - return (anyerrors ? ENXIO : 0); -} - -int -fdt_reset_assert_all(device_t consumer) -{ - - return (assert_deassert_all(consumer, true)); -} - -int -fdt_reset_deassert_all(device_t consumer) -{ - - return (assert_deassert_all(consumer, false)); -} - -void -fdt_reset_register_provider(device_t provider) -{ - - OF_device_register_xref( - OF_xref_from_node(ofw_bus_get_node(provider)), provider); -} - -void -fdt_reset_unregister_provider(device_t provider) -{ - - OF_device_register_xref(OF_xref_from_device(provider), NULL); -} diff --git a/sys/mips/mediatek/fdt_reset.h b/sys/mips/mediatek/fdt_reset.h deleted file mode 100644 index b399f01e9bc..00000000000 --- a/sys/mips/mediatek/fdt_reset.h +++ /dev/null @@ -1,46 +0,0 @@ -/*- - * Copyright (c) 2016 Stanislav Galabov - * Copyright (c) 2014 Ian Lepore - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef DEV_FDT_RESET_H -#define DEV_FDT_RESET_H - -#include "fdt_reset_if.h" - -/* - * Look up "resets" property in consumer's fdt data and assert or deassert all - * configured resets. - */ -int fdt_reset_assert_all(device_t consumer); -int fdt_reset_deassert_all(device_t consumer); - -/* - * [Un]register the given device instance as a driver that implements the - * fdt_clock interface. - */ -void fdt_reset_register_provider(device_t provider); -void fdt_reset_unregister_provider(device_t provider); - -#endif /* DEV_FDT_RESET_H */ diff --git a/sys/mips/mediatek/fdt_reset_if.m b/sys/mips/mediatek/fdt_reset_if.m deleted file mode 100644 index 0f8120047b7..00000000000 --- a/sys/mips/mediatek/fdt_reset_if.m +++ /dev/null @@ -1,57 +0,0 @@ -#- -# Copyright (c) 2016 Stanislav Galabov -# Copyright (c) 2014 Ian Lepore -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -# SUCH DAMAGE. -# -# - -#include - -# -# This is the interface that fdt_reset drivers provide to other drivers. -# In this context, reset refers to a reset signal provided to some other -# hardware component within the system. They are most often found within -# embedded processors that have on-chip IO controllers. -# - -INTERFACE fdt_reset; - -# -# Enable/assert/apply the specified reset. -# Returns 0 on success or a standard errno value. -# -METHOD int assert { - device_t provider; - int index; -}; - -# -# Disable/de-assert/remove the specified reset. -# Returns 0 on success or a standard errno value. -# -METHOD int deassert { - device_t provider; - int index; -}; - diff --git a/sys/mips/mediatek/files.mediatek b/sys/mips/mediatek/files.mediatek deleted file mode 100644 index 665d340e37e..00000000000 --- a/sys/mips/mediatek/files.mediatek +++ /dev/null @@ -1,38 +0,0 @@ - -mips/mediatek/mtk_machdep.c standard -mips/mediatek/mtk_sysctl.c standard -mips/mediatek/mtk_soc.c standard -mips/mediatek/mtk_reset.c standard -mips/mediatek/mtk_clock.c standard -mips/mediatek/mtk_pinctrl.c standard -mips/mediatek/palmbus.c standard -mips/mediatek/mtk_intr_v1.c optional mtk_intr_v1 -mips/mediatek/mtk_intr_v2.c optional mtk_intr_v2 -mips/mediatek/mtk_intr_gic.c optional mtk_intr_gic -mips/mediatek/uart_dev_mtk.c optional uart uart_dev_mtk -mips/mediatek/mtk_spi_v1.c optional spibus mtk_spi_v1 -mips/mediatek/mtk_spi_v2.c optional spibus mtk_spi_v2 -mips/mediatek/mtk_usb_phy.c optional usb mtk_usb_phy -mips/mediatek/mtk_xhci.c optional usb xhci -mips/mediatek/mtk_ohci.c optional usb ohci -mips/mediatek/mtk_ehci.c optional usb ehci -mips/mediatek/mtk_dotg.c optional usb dwcotg -mips/mediatek/mtk_pcie.c optional pci -mips/mediatek/mtk_gpio_v1.c optional gpio mtk_gpio_v1 -mips/mediatek/mtk_gpio_v2.c optional gpio mtk_gpio_v2 -#mips/mediatek/mtk_mmc.c optional mmc - -# Ralink/Mediatek Ethernet driver -dev/rt/if_rt.c optional rt - -# Standard MIPS ticker -mips/mips/tick.c standard - -# Temporary Reset if -mips/mediatek/fdt_reset.c standard -mips/mediatek/fdt_reset_if.m standard - -# Switch -dev/etherswitch/mtkswitch/mtkswitch.c optional mtkswitch -dev/etherswitch/mtkswitch/mtkswitch_rt3050.c optional mtkswitch -dev/etherswitch/mtkswitch/mtkswitch_mt7620.c optional mtkswitch diff --git a/sys/mips/mediatek/mtk_clock.c b/sys/mips/mediatek/mtk_clock.c deleted file mode 100644 index f848de94cf4..00000000000 --- a/sys/mips/mediatek/mtk_clock.c +++ /dev/null @@ -1,154 +0,0 @@ -/*- - * Copyright (c) 2016 Stanislav Galabov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include - -#include "fdt_clock_if.h" - -static const struct ofw_compat_data compat_data[] = { - { "ralink,rt2880-clock", 1 }, - - /* Sentinel */ - { NULL, 0 } -}; - -static int -mtk_clock_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) - return (ENXIO); - - device_set_desc(dev, "MTK Clock Controller"); - - return (0); -} - -static int -mtk_clock_attach(device_t dev) -{ - - if (device_get_unit(dev) != 0) { - device_printf(dev, "Only one clock control allowed\n"); - return (ENXIO); - } - - fdt_clock_register_provider(dev); - - return (0); -} - -#define CLOCK_ENABLE 1 -#define CLOCK_DISABLE 0 - -static int -mtk_clock_set(device_t dev, int index, int value) -{ - uint32_t mask; - - /* Clock config register holds 32 clock gating bits */ - if (index < 0 || index > 31) - return (EINVAL); - - mask = (1u << index); - - if (value == CLOCK_ENABLE) - mtk_sysctl_clr_set(SYSCTL_CLKCFG1, 0, mask); - else - mtk_sysctl_clr_set(SYSCTL_CLKCFG1, mask, 0); - - return (0); -} - -static int -mtk_clock_enable(device_t dev, int index) -{ - - return mtk_clock_set(dev, index, CLOCK_ENABLE); -} - -static int -mtk_clock_disable(device_t dev, int index) -{ - - return mtk_clock_set(dev, index, CLOCK_DISABLE); -} - -static int -mtk_clock_get_info(device_t dev, int index, struct fdt_clock_info *info) -{ - uint32_t mask; - - if (index < 0 || index > 31 || info == NULL) - return (EINVAL); - - if (mtk_sysctl_get(SYSCTL_CLKCFG1) & mask) - info->flags = FDT_CIFLAG_RUNNING; - else - info->flags = 0; - - return (0); -} - -static device_method_t mtk_clock_methods[] = { - DEVMETHOD(device_probe, mtk_clock_probe), - DEVMETHOD(device_attach, mtk_clock_attach), - - /* fdt_clock interface */ - DEVMETHOD(fdt_clock_enable, mtk_clock_enable), - DEVMETHOD(fdt_clock_disable, mtk_clock_disable), - DEVMETHOD(fdt_clock_get_info, mtk_clock_get_info), - - DEVMETHOD_END -}; - -static driver_t mtk_clock_driver = { - "clkctrl", - mtk_clock_methods, - 0, -}; -static devclass_t mtk_clock_devclass; - -EARLY_DRIVER_MODULE(mtk_clock, simplebus, mtk_clock_driver, mtk_clock_devclass, - 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_EARLY); - -MODULE_DEPEND(mtk_clock, mtk_sysctl, 1, 1, 1); diff --git a/sys/mips/mediatek/mtk_dotg.c b/sys/mips/mediatek/mtk_dotg.c deleted file mode 100644 index 59dafee118c..00000000000 --- a/sys/mips/mediatek/mtk_dotg.c +++ /dev/null @@ -1,191 +0,0 @@ -#include -/*- - * Copyright (c) 2015-2016 Stanislav Galabov. All rights reserved. - * Copyright (c) 2010,2011 Aleksandr Rybalko. All rights reserved. - * Copyright (c) 2007-2008 Hans Petter Selasky. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include - -#define MEM_RID 0 - -static device_probe_t dotg_fdt_probe; -static device_attach_t dotg_fdt_attach; -static device_detach_t dotg_fdt_detach; - -static int -dotg_fdt_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "ralink,rt3050-otg")) - return (ENXIO); - - device_set_desc(dev, "MTK DWC-OTG USB Controller"); - return (0); -} - -static int -dotg_fdt_attach(device_t dev) -{ - struct dwc_otg_softc *sc = device_get_softc(dev); - int err, rid; - - /* setup controller interface softc */ - - /* initialise some bus fields */ - sc->sc_mode = DWC_MODE_HOST; - sc->sc_bus.parent = dev; - - rid = 0; - sc->sc_io_res = - bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); - if (!(sc->sc_io_res)) { - printf("Can`t alloc MEM\n"); - goto error; - } - - rid = 0; - sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, - &rid, RF_ACTIVE); - if (!(sc->sc_irq_res)) { - printf("Can`t alloc IRQ\n"); - goto error; - } - - sc->sc_bus.bdev = device_add_child(dev, "usbus", -1); - if (!(sc->sc_bus.bdev)) { - printf("Can`t add usbus\n"); - goto error; - } - device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); - - err = dwc_otg_init(sc); - if (err) printf("dotg_init fail\n"); - if (!err) { - err = device_probe_and_attach(sc->sc_bus.bdev); - if (err) printf("device_probe_and_attach fail %d\n", err); - } - if (err) { - goto error; - } - return (0); - -error: - dotg_fdt_detach(dev); - return (ENXIO); -} - -static int -dotg_fdt_detach(device_t dev) -{ - struct dwc_otg_softc *sc = device_get_softc(dev); - int err; - - /* during module unload there are lots of children leftover */ - device_delete_children(dev); - - if (sc->sc_irq_res && sc->sc_intr_hdl) { - /* - * only call dotg_fdt_uninit() after dotg_fdt_init() - */ - dwc_otg_uninit(sc); - - err = bus_teardown_intr(dev, sc->sc_irq_res, - sc->sc_intr_hdl); - sc->sc_intr_hdl = NULL; - } - if (sc->sc_irq_res) { - bus_release_resource(dev, SYS_RES_IRQ, 0, - sc->sc_irq_res); - sc->sc_irq_res = NULL; - } - if (sc->sc_io_res) { - bus_release_resource(dev, SYS_RES_MEMORY, 0, - sc->sc_io_res); - sc->sc_io_res = NULL; - } - usb_bus_mem_free_all(&sc->sc_bus, NULL); - - return (0); -} - -static device_method_t dotg_fdt_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, dotg_fdt_probe), - DEVMETHOD(device_attach, dotg_fdt_attach), - DEVMETHOD(device_detach, dotg_fdt_detach), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - - DEVMETHOD_END -}; - -static driver_t dotg_fdt_driver = { - .name = "dwcotg", - .methods = dotg_fdt_methods, - .size = sizeof(struct dwc_otg_softc), -}; - -static devclass_t dotg_fdt_devclass; - -DRIVER_MODULE(dotg, simplebus, dotg_fdt_driver, dotg_fdt_devclass, 0, 0); diff --git a/sys/mips/mediatek/mtk_ehci.c b/sys/mips/mediatek/mtk_ehci.c deleted file mode 100644 index a08bcb064e8..00000000000 --- a/sys/mips/mediatek/mtk_ehci.c +++ /dev/null @@ -1,215 +0,0 @@ -#include -/*- - * Copyright (c) 2015 Stanislav Galabov. All rights reserved. - * Copyright (c) 2010,2011 Aleksandr Rybalko. All rights reserved. - * Copyright (c) 2007-2008 Hans Petter Selasky. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include - -#define EHCI_HC_DEVSTR "MTK USB 2.0 Controller" - -static device_probe_t ehci_fdt_probe; -static device_attach_t ehci_fdt_attach; -static device_detach_t ehci_fdt_detach; - -static int -ehci_fdt_probe(device_t self) -{ - - if (!ofw_bus_status_okay(self)) - return (ENXIO); - - if (!ofw_bus_is_compatible(self, "generic-ehci")) - return (ENXIO); - - device_set_desc(self, EHCI_HC_DEVSTR); - - return (BUS_PROBE_DEFAULT); -} - -static int -ehci_fdt_attach(device_t self) -{ - ehci_softc_t *sc = device_get_softc(self); - int err; - int rid; - - /* initialise some bus fields */ - sc->sc_bus.parent = self; - sc->sc_bus.devices = sc->sc_devices; - sc->sc_bus.devices_max = EHCI_MAX_DEVICES; - sc->sc_bus.dma_bits = 32; - - /* get all DMA memory */ - if (usb_bus_mem_alloc_all(&sc->sc_bus, - USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) { - printf("No mem\n"); - return (ENOMEM); - } - - rid = 0; - sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (!sc->sc_io_res) { - device_printf(self, "Could not map memory\n"); - goto error; - } - sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); - sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); - sc->sc_io_size = rman_get_size(sc->sc_io_res); - - rid = 0; - sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE); - if (sc->sc_irq_res == NULL) { - device_printf(self, "Could not allocate irq\n"); - goto error; - } - - sc->sc_bus.bdev = device_add_child(self, "usbus", -1); - if (!(sc->sc_bus.bdev)) { - device_printf(self, "Could not add USB device\n"); - goto error; - } - device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); - device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR); - - sprintf(sc->sc_vendor, "MediaTek"); - - err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, - NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl); - if (err) { - device_printf(self, "Could not setup irq, %d\n", err); - sc->sc_intr_hdl = NULL; - goto error; - } - - err = ehci_init(sc); - if (!err) { - err = device_probe_and_attach(sc->sc_bus.bdev); - } - if (err) { - device_printf(self, "USB init failed err=%d\n", err); - goto error; - } - return (0); - -error: - ehci_fdt_detach(self); - return (ENXIO); -} - -static int -ehci_fdt_detach(device_t self) -{ - ehci_softc_t *sc = device_get_softc(self); - int err; - - /* during module unload there are lots of children leftover */ - device_delete_children(self); - - if (sc->sc_irq_res && sc->sc_intr_hdl) { - /* - * only call ehci_detach() after ehci_init() - */ - ehci_detach(sc); - - err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); - if (err) - device_printf(self, "Could not tear down irq, %d\n", - err); - sc->sc_intr_hdl = NULL; - } - if (sc->sc_irq_res) { - bus_release_resource(self, SYS_RES_IRQ, 0, - sc->sc_irq_res); - sc->sc_irq_res = NULL; - } - if (sc->sc_io_res) { - bus_release_resource(self, SYS_RES_MEMORY, 0, - sc->sc_io_res); - sc->sc_io_res = NULL; - } - usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); - - return (0); -} - -static device_method_t ehci_fdt_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ehci_fdt_probe), - DEVMETHOD(device_attach, ehci_fdt_attach), - DEVMETHOD(device_detach, ehci_fdt_detach), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - - DEVMETHOD_END -}; - -static driver_t ehci_fdt_driver = { - .name = "ehci", - .methods = ehci_fdt_methods, - .size = sizeof(ehci_softc_t), -}; - -static devclass_t ehci_fdt_devclass; - -DRIVER_MODULE(ehci, simplebus, ehci_fdt_driver, ehci_fdt_devclass, 0, 0); diff --git a/sys/mips/mediatek/mtk_gpio_v1.c b/sys/mips/mediatek/mtk_gpio_v1.c deleted file mode 100644 index 29cfe1582bc..00000000000 --- a/sys/mips/mediatek/mtk_gpio_v1.c +++ /dev/null @@ -1,773 +0,0 @@ -/*- - * Copyright 2016 Stanislav Galabov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include - -#include -#include -#include - -#include - -#include "gpio_if.h" -#include "pic_if.h" - -#define MTK_GPIO_PINS 32 - -enum mtk_gpio_regs { - GPIO_PIOINT = 0, - GPIO_PIOEDGE, - GPIO_PIORENA, - GPIO_PIOFENA, - GPIO_PIODATA, - GPIO_PIODIR, - GPIO_PIOPOL, - GPIO_PIOSET, - GPIO_PIORESET, - GPIO_PIOTOG, - GPIO_PIOMAX -}; - -struct mtk_gpio_pin_irqsrc { - struct intr_irqsrc isrc; - u_int irq; -}; - -struct mtk_gpio_pin { - uint32_t pin_caps; - uint32_t pin_flags; - enum intr_trigger intr_trigger; - enum intr_polarity intr_polarity; - char pin_name[GPIOMAXNAME]; - struct mtk_gpio_pin_irqsrc pin_irqsrc; -}; - -struct mtk_gpio_softc { - device_t dev; - device_t busdev; - struct resource *res[2]; - struct mtx mtx; - struct mtk_gpio_pin pins[MTK_GPIO_PINS]; - void *intrhand; - - uint8_t regs[GPIO_PIOMAX]; - uint32_t num_pins; - uint8_t do_remap; -}; - -#define PIC_INTR_ISRC(sc, irq) (&(sc)->pins[(irq)].pin_irqsrc.isrc) - -static struct resource_spec mtk_gpio_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE }, - { -1, 0 } -}; - -static int mtk_gpio_probe(device_t dev); -static int mtk_gpio_attach(device_t dev); -static int mtk_gpio_detach(device_t dev); -static int mtk_gpio_intr(void *arg); - -#define MTK_GPIO_LOCK(sc) mtx_lock_spin(&(sc)->mtx) -#define MTK_GPIO_UNLOCK(sc) mtx_unlock_spin(&(sc)->mtx) -#define MTK_GPIO_LOCK_INIT(sc) \ - mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \ - "mtk_gpio", MTX_SPIN) -#define MTK_GPIO_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx) - -#define MTK_WRITE_4(sc, reg, val) \ - bus_write_4((sc)->res[0], (sc)->regs[(reg)], (val)) -#define MTK_READ_4(sc, reg) \ - bus_read_4((sc)->res[0], (sc)->regs[(reg)]) - -static struct ofw_compat_data compat_data[] = { - { "ralink,rt2880-gpio", 1 }, - { "ralink,rt3050-gpio", 1 }, - { "ralink,rt3352-gpio", 1 }, - { "ralink,rt3883-gpio", 1 }, - { "ralink,rt5350-gpio", 1 }, - { "ralink,mt7620a-gpio", 1 }, - { NULL, 0 } -}; - -static int -mtk_gpio_probe(device_t dev) -{ - phandle_t node; - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) - return (ENXIO); - - node = ofw_bus_get_node(dev); - if (!OF_hasprop(node, "gpio-controller")) - return (ENXIO); - - device_set_desc(dev, "MTK GPIO Controller (v1)"); - - return (BUS_PROBE_DEFAULT); -} - -static int -mtk_pic_register_isrcs(struct mtk_gpio_softc *sc) -{ - int error; - uint32_t irq; - struct intr_irqsrc *isrc; - const char *name; - - name = device_get_nameunit(sc->dev); - for (irq = 0; irq < sc->num_pins; irq++) { - sc->pins[irq].pin_irqsrc.irq = irq; - isrc = PIC_INTR_ISRC(sc, irq); - error = intr_isrc_register(isrc, sc->dev, 0, "%s", name); - if (error != 0) { - /* XXX call intr_isrc_deregister */ - device_printf(sc->dev, "%s failed", __func__); - return (error); - } - } - - return (0); -} - -static int -mtk_gpio_pin_set_direction(struct mtk_gpio_softc *sc, uint32_t pin, - uint32_t dir) -{ - uint32_t regval, mask = (1u << pin); - - if (!(sc->pins[pin].pin_caps & dir)) - return (EINVAL); - - regval = MTK_READ_4(sc, GPIO_PIODIR); - if (dir == GPIO_PIN_INPUT) - regval &= ~mask; - else - regval |= mask; - MTK_WRITE_4(sc, GPIO_PIODIR, regval); - - sc->pins[pin].pin_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT); - sc->pins[pin].pin_flags |= dir; - - return (0); -} - -static int -mtk_gpio_pin_set_invert(struct mtk_gpio_softc *sc, uint32_t pin, uint32_t val) -{ - uint32_t regval, mask = (1u << pin); - - regval = MTK_READ_4(sc, GPIO_PIOPOL); - if (val) - regval |= mask; - else - regval &= ~mask; - MTK_WRITE_4(sc, GPIO_PIOPOL, regval); - sc->pins[pin].pin_flags &= ~(GPIO_PIN_INVIN | GPIO_PIN_INVOUT); - sc->pins[pin].pin_flags |= val; - - return (0); -} - -static void -mtk_gpio_pin_probe(struct mtk_gpio_softc *sc, uint32_t pin) -{ - uint32_t mask = (1u << pin); - uint32_t val; - - /* Clear cached gpio config */ - sc->pins[pin].pin_flags = 0; - - val = MTK_READ_4(sc, GPIO_PIORENA) | - MTK_READ_4(sc, GPIO_PIOFENA); - if (val & mask) { - /* Pin is in interrupt mode */ - sc->pins[pin].intr_trigger = INTR_TRIGGER_EDGE; - val = MTK_READ_4(sc, GPIO_PIORENA); - if (val & mask) - sc->pins[pin].intr_polarity = INTR_POLARITY_HIGH; - else - sc->pins[pin].intr_polarity = INTR_POLARITY_LOW; - } - - val = MTK_READ_4(sc, GPIO_PIODIR); - if (val & mask) - sc->pins[pin].pin_flags |= GPIO_PIN_OUTPUT; - else - sc->pins[pin].pin_flags |= GPIO_PIN_INPUT; - - val = MTK_READ_4(sc, GPIO_PIOPOL); - if (val & mask) { - if (sc->pins[pin].pin_flags & GPIO_PIN_INPUT) { - sc->pins[pin].pin_flags |= GPIO_PIN_INVIN; - } else { - sc->pins[pin].pin_flags |= GPIO_PIN_INVOUT; - } - } -} - -static int -mtk_gpio_attach(device_t dev) -{ - struct mtk_gpio_softc *sc; - phandle_t node; - uint32_t i, num_pins; - - sc = device_get_softc(dev); - sc->dev = dev; - - if (bus_alloc_resources(dev, mtk_gpio_spec, sc->res)) { - device_printf(dev, "could not allocate resources for device\n"); - return (ENXIO); - } - - MTK_GPIO_LOCK_INIT(sc); - - node = ofw_bus_get_node(dev); - - if (OF_hasprop(node, "clocks")) - mtk_soc_start_clock(dev); - if (OF_hasprop(node, "resets")) - mtk_soc_reset_device(dev); - - if (OF_getprop(node, "ralink,register-map", sc->regs, - GPIO_PIOMAX) <= 0) { - device_printf(dev, "Failed to read register map\n"); - return (ENXIO); - } - - if (OF_hasprop(node, "ralink,num-gpios") && (OF_getencprop(node, - "ralink,num-gpios", &num_pins, sizeof(num_pins)) >= 0)) - sc->num_pins = num_pins; - else - sc->num_pins = MTK_GPIO_PINS; - - for (i = 0; i < sc->num_pins; i++) { - sc->pins[i].pin_caps |= GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | - GPIO_PIN_INVIN | GPIO_PIN_INVOUT | - GPIO_INTR_EDGE_RISING | GPIO_INTR_EDGE_FALLING; - sc->pins[i].intr_polarity = INTR_POLARITY_HIGH; - sc->pins[i].intr_trigger = INTR_TRIGGER_EDGE; - - snprintf(sc->pins[i].pin_name, GPIOMAXNAME - 1, "gpio%c%d", - device_get_unit(dev) + 'a', i); - sc->pins[i].pin_name[GPIOMAXNAME - 1] = '\0'; - - mtk_gpio_pin_probe(sc, i); - } - - if (mtk_pic_register_isrcs(sc) != 0) { - device_printf(dev, "could not register PIC ISRCs\n"); - goto fail; - } - - if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) { - device_printf(dev, "could not register PIC\n"); - goto fail; - } - - if (bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE, - mtk_gpio_intr, NULL, sc, &sc->intrhand) != 0) - goto fail_pic; - - sc->busdev = gpiobus_attach_bus(dev); - if (sc->busdev == NULL) - goto fail_pic; - - return (0); -fail_pic: - intr_pic_deregister(dev, OF_xref_from_node(node)); -fail: - if(sc->intrhand != NULL) - bus_teardown_intr(dev, sc->res[1], sc->intrhand); - bus_release_resources(dev, mtk_gpio_spec, sc->res); - MTK_GPIO_LOCK_DESTROY(sc); - return (ENXIO); -} - -static int -mtk_gpio_detach(device_t dev) -{ - struct mtk_gpio_softc *sc = device_get_softc(dev); - phandle_t node; - - node = ofw_bus_get_node(dev); - intr_pic_deregister(dev, OF_xref_from_node(node)); - if (sc->intrhand != NULL) - bus_teardown_intr(dev, sc->res[1], sc->intrhand); - bus_release_resources(dev, mtk_gpio_spec, sc->res); - MTK_GPIO_LOCK_DESTROY(sc); - return (0); -} - -static device_t -mtk_gpio_get_bus(device_t dev) -{ - struct mtk_gpio_softc *sc = device_get_softc(dev); - - return (sc->busdev); -} - -static int -mtk_gpio_pin_max(device_t dev, int *maxpin) -{ - struct mtk_gpio_softc *sc = device_get_softc(dev); - - *maxpin = sc->num_pins - 1; - - return (0); -} - -static int -mtk_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) -{ - struct mtk_gpio_softc *sc = device_get_softc(dev); - - if (pin >= sc->num_pins) - return (EINVAL); - - MTK_GPIO_LOCK(sc); - *caps = sc->pins[pin].pin_caps; - MTK_GPIO_UNLOCK(sc); - - return (0); -} - -static int -mtk_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) -{ - struct mtk_gpio_softc *sc = device_get_softc(dev); - - if (pin >= sc->num_pins) - return (EINVAL); - - MTK_GPIO_LOCK(sc); - *flags = sc->pins[pin].pin_flags; - MTK_GPIO_UNLOCK(sc); - - return (0); -} - -static int -mtk_gpio_pin_getname(device_t dev, uint32_t pin, char *name) -{ - struct mtk_gpio_softc *sc = device_get_softc(dev); - - if (pin >= sc->num_pins) - return (EINVAL); - - strncpy(name, sc->pins[pin].pin_name, GPIOMAXNAME - 1); - name[GPIOMAXNAME - 1] = '\0'; - - return (0); -} - -static int -mtk_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) -{ - struct mtk_gpio_softc *sc; - int retval; - - sc = device_get_softc(dev); - - if (pin >= sc->num_pins) - return (EINVAL); - - MTK_GPIO_LOCK(sc); - retval = mtk_gpio_pin_set_direction(sc, pin, - flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)); - if (retval == 0) - retval = mtk_gpio_pin_set_invert(sc, pin, - flags & (GPIO_PIN_INVIN | GPIO_PIN_INVOUT)); - MTK_GPIO_UNLOCK(sc); - - return (retval); -} - -static int -mtk_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) -{ - struct mtk_gpio_softc *sc; - int ret; - - sc = device_get_softc(dev); - ret = 0; - - if (pin >= sc->num_pins) - return (EINVAL); - - MTK_GPIO_LOCK(sc); - if (value) - MTK_WRITE_4(sc, GPIO_PIOSET, (1u << pin)); - else - MTK_WRITE_4(sc, GPIO_PIORESET, (1u << pin)); - MTK_GPIO_UNLOCK(sc); - - return (ret); -} - -static int -mtk_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) -{ - struct mtk_gpio_softc *sc; - uint32_t data; - int ret; - - sc = device_get_softc(dev); - ret = 0; - - if (pin >= sc->num_pins) - return (EINVAL); - - MTK_GPIO_LOCK(sc); - data = MTK_READ_4(sc, GPIO_PIODATA); - *val = (data & (1u << pin)) ? 1 : 0; - MTK_GPIO_UNLOCK(sc); - - return (ret); -} - -static int -mtk_gpio_pin_toggle(device_t dev, uint32_t pin) -{ - struct mtk_gpio_softc *sc; - int ret; - - sc = device_get_softc(dev); - ret = 0; - - if (pin >= sc->num_pins) - return (EINVAL); - - MTK_GPIO_LOCK(sc); - if (!(sc->pins[pin].pin_flags & GPIO_PIN_OUTPUT)) { - ret = EINVAL; - goto out; - } - MTK_WRITE_4(sc, GPIO_PIOTOG, (1u << pin)); - -out: - MTK_GPIO_UNLOCK(sc); - - return (ret); -} - -static int -mtk_gpio_pic_map_fdt(struct mtk_gpio_softc *sc, - struct intr_map_data_fdt *daf, u_int *irqp, uint32_t *modep) -{ - u_int irq; - - if (daf->ncells != 1) { - device_printf(sc->dev, "Invalid #interrupt-cells\n"); - return (EINVAL); - } - - irq = daf->cells[0]; - - if (irq >= sc->num_pins) { - device_printf(sc->dev, "Invalid interrupt number %u\n", irq); - return (EINVAL); - } - - *irqp = irq; - if (modep != NULL) - *modep = GPIO_INTR_EDGE_BOTH; - - return (0); -} - -static int -mtk_gpio_pic_map_gpio(struct mtk_gpio_softc *sc, - struct intr_map_data_gpio *dag, u_int *irqp, uint32_t *modep) -{ - u_int irq; - - irq = dag->gpio_pin_num; - if (irq >= sc->num_pins) { - device_printf(sc->dev, "Invalid interrupt number %u\n", irq); - return (EINVAL); - } - - *irqp = irq; - if (modep != NULL) - *modep = dag->gpio_intr_mode; - - return (0); -} - -static int -mtk_gpio_pic_map_intr(device_t dev, struct intr_map_data *data, - struct intr_irqsrc **isrcp) -{ - int error; - u_int irq; - struct mtk_gpio_softc *sc; - - sc = device_get_softc(dev); - switch (data->type) { - case INTR_MAP_DATA_FDT: - error = (mtk_gpio_pic_map_fdt(sc, - (struct intr_map_data_fdt *)data, &irq, NULL)); - break; - case INTR_MAP_DATA_GPIO: - error = (mtk_gpio_pic_map_gpio(sc, - (struct intr_map_data_gpio *)data, &irq, NULL)); - break; - default: - error = EINVAL; - break; - } - - if (error != 0) { - device_printf(dev, "Invalid map type\n"); - return (error); - } - - *isrcp = PIC_INTR_ISRC(sc, irq); - return (0); -} - -static void -mtk_gpio_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - struct mtk_gpio_softc *sc; - struct mtk_gpio_pin_irqsrc *pisrc; - uint32_t pin, mask, val; - - sc = device_get_softc(dev); - - pisrc = (struct mtk_gpio_pin_irqsrc *)isrc; - pin = pisrc->irq; - mask = 1u << pin; - - MTK_GPIO_LOCK(sc); - - if (sc->pins[pin].intr_polarity == INTR_POLARITY_LOW) { - val = MTK_READ_4(sc, GPIO_PIORENA) & ~mask; - MTK_WRITE_4(sc, GPIO_PIORENA, val); - val = MTK_READ_4(sc, GPIO_PIOFENA) | mask; - MTK_WRITE_4(sc, GPIO_PIOFENA, val); - } else { - val = MTK_READ_4(sc, GPIO_PIOFENA) & ~mask; - MTK_WRITE_4(sc, GPIO_PIOFENA, val); - val = MTK_READ_4(sc, GPIO_PIORENA) | mask; - MTK_WRITE_4(sc, GPIO_PIORENA, val); - } - - MTK_GPIO_UNLOCK(sc); -} - -static void -mtk_gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - struct mtk_gpio_softc *sc; - struct mtk_gpio_pin_irqsrc *pisrc; - uint32_t pin, mask, val; - - sc = device_get_softc(dev); - - pisrc = (struct mtk_gpio_pin_irqsrc *)isrc; - pin = pisrc->irq; - mask = 1u << pin; - - MTK_GPIO_LOCK(sc); - - val = MTK_READ_4(sc, GPIO_PIORENA) & ~mask; - MTK_WRITE_4(sc, GPIO_PIORENA, val); - val = MTK_READ_4(sc, GPIO_PIOFENA) & ~mask; - MTK_WRITE_4(sc, GPIO_PIOFENA, val); - - MTK_GPIO_UNLOCK(sc); -} - -static void -mtk_gpio_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - mtk_gpio_pic_disable_intr(dev, isrc); -} - -static void -mtk_gpio_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - mtk_gpio_pic_enable_intr(dev, isrc); -} - -static void -mtk_gpio_pic_post_filter(device_t dev, struct intr_irqsrc *isrc) -{ - struct mtk_gpio_softc *sc; - struct mtk_gpio_pin_irqsrc *pisrc; - - pisrc = (struct mtk_gpio_pin_irqsrc *)isrc; - sc = device_get_softc(dev); - MTK_GPIO_LOCK(sc); - MTK_WRITE_4(sc, GPIO_PIOINT, 1u << pisrc->irq); - MTK_GPIO_UNLOCK(sc); -} - -static int -mtk_gpio_pic_setup_intr(device_t dev, struct intr_irqsrc *isrc, - struct resource *res, struct intr_map_data *data) -{ - struct mtk_gpio_softc *sc; - uint32_t val; - int error; - uint32_t mode; - u_int irq; - - if (data == NULL) - return (ENOTSUP); - - sc = device_get_softc(dev); - - switch (data->type) { - case INTR_MAP_DATA_FDT: - error = mtk_gpio_pic_map_fdt(sc, - (struct intr_map_data_fdt *)data, &irq, &mode); - break; - case INTR_MAP_DATA_GPIO: - error = mtk_gpio_pic_map_gpio(sc, - (struct intr_map_data_gpio *)data, &irq, &mode); - break; - default: - error = ENOTSUP; - break; - } - - if (error != 0) - return (error); - - MTK_GPIO_LOCK(sc); - if (mode == GPIO_INTR_EDGE_BOTH || mode == GPIO_INTR_EDGE_RISING) { - val = MTK_READ_4(sc, GPIO_PIORENA) | (1u << irq); - MTK_WRITE_4(sc, GPIO_PIORENA, val); - } - if (mode == GPIO_INTR_EDGE_BOTH || mode == GPIO_INTR_EDGE_FALLING) { - val = MTK_READ_4(sc, GPIO_PIOFENA) | (1u << irq); - MTK_WRITE_4(sc, GPIO_PIOFENA, val); - } - MTK_GPIO_UNLOCK(sc); - return (0); -} - -static int -mtk_gpio_intr(void *arg) -{ - struct mtk_gpio_softc *sc; - uint32_t i, interrupts; - - sc = arg; - interrupts = MTK_READ_4(sc, GPIO_PIOINT); - MTK_WRITE_4(sc, GPIO_PIOINT, interrupts); - - for (i = 0; interrupts != 0; i++, interrupts >>= 1) { - if ((interrupts & 0x1) == 0) - continue; - if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i), - curthread->td_intr_frame) != 0) { - device_printf(sc->dev, "spurious interrupt %d\n", i); - } - } - - return (FILTER_HANDLED); -} - -static phandle_t -mtk_gpio_get_node(device_t bus, device_t dev) -{ - - /* We only have one child, the GPIO bus, which needs our own node. */ - return (ofw_bus_get_node(bus)); -} - -static device_method_t mtk_gpio_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, mtk_gpio_probe), - DEVMETHOD(device_attach, mtk_gpio_attach), - DEVMETHOD(device_detach, mtk_gpio_detach), - - /* GPIO protocol */ - DEVMETHOD(gpio_get_bus, mtk_gpio_get_bus), - DEVMETHOD(gpio_pin_max, mtk_gpio_pin_max), - DEVMETHOD(gpio_pin_getname, mtk_gpio_pin_getname), - DEVMETHOD(gpio_pin_getflags, mtk_gpio_pin_getflags), - DEVMETHOD(gpio_pin_getcaps, mtk_gpio_pin_getcaps), - DEVMETHOD(gpio_pin_setflags, mtk_gpio_pin_setflags), - DEVMETHOD(gpio_pin_get, mtk_gpio_pin_get), - DEVMETHOD(gpio_pin_set, mtk_gpio_pin_set), - DEVMETHOD(gpio_pin_toggle, mtk_gpio_pin_toggle), - - /* Interrupt controller interface */ - DEVMETHOD(pic_disable_intr, mtk_gpio_pic_disable_intr), - DEVMETHOD(pic_enable_intr, mtk_gpio_pic_enable_intr), - DEVMETHOD(pic_map_intr, mtk_gpio_pic_map_intr), - DEVMETHOD(pic_setup_intr, mtk_gpio_pic_setup_intr), - DEVMETHOD(pic_post_filter, mtk_gpio_pic_post_filter), - DEVMETHOD(pic_post_ithread, mtk_gpio_pic_post_ithread), - DEVMETHOD(pic_pre_ithread, mtk_gpio_pic_pre_ithread), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_node, mtk_gpio_get_node), - - DEVMETHOD_END -}; - -static driver_t mtk_gpio_driver = { - "gpio", - mtk_gpio_methods, - sizeof(struct mtk_gpio_softc), -}; - -static devclass_t mtk_gpio_devclass; - -EARLY_DRIVER_MODULE(mtk_gpio_v1, simplebus, mtk_gpio_driver, - mtk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE); diff --git a/sys/mips/mediatek/mtk_gpio_v2.c b/sys/mips/mediatek/mtk_gpio_v2.c deleted file mode 100644 index cb87f7aaf39..00000000000 --- a/sys/mips/mediatek/mtk_gpio_v2.c +++ /dev/null @@ -1,666 +0,0 @@ -/*- - * Copyright 2016 Stanislav Galabov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include - -#include -#include -#include - -#include - -#include "gpio_if.h" -#include "pic_if.h" - -#define MTK_GPIO_PINS 32 - -struct mtk_gpio_pin_irqsrc { - struct intr_irqsrc isrc; - u_int irq; -}; - -struct mtk_gpio_pin { - uint32_t pin_caps; - uint32_t pin_flags; - enum intr_trigger intr_trigger; - enum intr_polarity intr_polarity; - char pin_name[GPIOMAXNAME]; - struct mtk_gpio_pin_irqsrc pin_irqsrc; -}; - -struct mtk_gpio_softc { - device_t dev; - device_t busdev; - struct resource *res[2]; - struct mtx mtx; - struct mtk_gpio_pin pins[MTK_GPIO_PINS]; - void *intrhand; - - uint32_t num_pins; - uint32_t bank_id; -}; - -#define PIC_INTR_ISRC(sc, irq) (&(sc)->pins[(irq)].pin_irqsrc.isrc) - -static struct resource_spec mtk_gpio_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE | RF_SHAREABLE }, - { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE }, - { -1, 0 } -}; - -static int mtk_gpio_probe(device_t dev); -static int mtk_gpio_attach(device_t dev); -static int mtk_gpio_detach(device_t dev); -static int mtk_gpio_intr(void *arg); - -#define MTK_GPIO_LOCK(sc) mtx_lock_spin(&(sc)->mtx) -#define MTK_GPIO_UNLOCK(sc) mtx_unlock_spin(&(sc)->mtx) -#define MTK_GPIO_LOCK_INIT(sc) \ - mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \ - "mtk_gpio", MTX_SPIN) -#define MTK_GPIO_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx) - -#define MTK_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val)) -#define MTK_READ_4(sc, reg) bus_read_4((sc)->res[0], (reg)) - -/* Register definitions */ -#define GPIO_REG(_sc, _reg) ((_reg) + (_sc)->bank_id * 0x4) -#define GPIO_PIOINT(_sc) GPIO_REG((_sc), 0x0090) -#define GPIO_PIOEDGE(_sc) GPIO_REG((_sc), 0x00A0) -#define GPIO_PIORENA(_sc) GPIO_REG((_sc), 0x0050) -#define GPIO_PIOFENA(_sc) GPIO_REG((_sc), 0x0060) -#define GPIO_PIODATA(_sc) GPIO_REG((_sc), 0x0020) -#define GPIO_PIODIR(_sc) GPIO_REG((_sc), 0x0000) -#define GPIO_PIOPOL(_sc) GPIO_REG((_sc), 0x0010) -#define GPIO_PIOSET(_sc) GPIO_REG((_sc), 0x0030) -#define GPIO_PIORESET(_sc) GPIO_REG((_sc), 0x0040) - -static struct ofw_compat_data compat_data[] = { - { "mtk,mt7621-gpio-bank", 1 }, - { "mtk,mt7628-gpio-bank", 1 }, - { NULL, 0 } -}; - -static int -mtk_gpio_probe(device_t dev) -{ - phandle_t node; - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) - return (ENXIO); - - node = ofw_bus_get_node(dev); - if (!OF_hasprop(node, "gpio-controller")) - return (ENXIO); - - device_set_desc(dev, "MTK GPIO Controller (v2)"); - - return (BUS_PROBE_DEFAULT); -} - -static int -mtk_pic_register_isrcs(struct mtk_gpio_softc *sc) -{ - int error; - uint32_t irq; - struct intr_irqsrc *isrc; - const char *name; - - name = device_get_nameunit(sc->dev); - for (irq = 0; irq < sc->num_pins; irq++) { - sc->pins[irq].pin_irqsrc.irq = irq; - isrc = PIC_INTR_ISRC(sc, irq); - error = intr_isrc_register(isrc, sc->dev, 0, "%s", name); - if (error != 0) { - /* XXX call intr_isrc_deregister */ - device_printf(sc->dev, "%s failed", __func__); - return (error); - } - } - - return (0); -} - -static int -mtk_gpio_pin_set_direction(struct mtk_gpio_softc *sc, uint32_t pin, - uint32_t dir) -{ - uint32_t regval, mask = (1u << pin); - - if (!(sc->pins[pin].pin_caps & dir)) - return (EINVAL); - - regval = MTK_READ_4(sc, GPIO_PIODIR(sc)); - if (dir == GPIO_PIN_INPUT) - regval &= ~mask; - else - regval |= mask; - MTK_WRITE_4(sc, GPIO_PIODIR(sc), regval); - - sc->pins[pin].pin_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT); - sc->pins[pin].pin_flags |= dir; - - return (0); -} - -static int -mtk_gpio_pin_set_invert(struct mtk_gpio_softc *sc, uint32_t pin, uint32_t val) -{ - uint32_t regval, mask = (1u << pin); - - regval = MTK_READ_4(sc, GPIO_PIOPOL(sc)); - if (val) - regval |= mask; - else - regval &= ~mask; - MTK_WRITE_4(sc, GPIO_PIOPOL(sc), regval); - sc->pins[pin].pin_flags &= ~(GPIO_PIN_INVIN | GPIO_PIN_INVOUT); - sc->pins[pin].pin_flags |= val; - - return (0); -} - -static void -mtk_gpio_pin_probe(struct mtk_gpio_softc *sc, uint32_t pin) -{ - uint32_t mask = (1u << pin); - uint32_t val; - - /* Clear cached gpio config */ - sc->pins[pin].pin_flags = 0; - - val = MTK_READ_4(sc, GPIO_PIORENA(sc)) | - MTK_READ_4(sc, GPIO_PIOFENA(sc)); - if (val & mask) { - /* Pin is in interrupt mode */ - sc->pins[pin].intr_trigger = INTR_TRIGGER_EDGE; - val = MTK_READ_4(sc, GPIO_PIORENA(sc)); - if (val & mask) - sc->pins[pin].intr_polarity = INTR_POLARITY_HIGH; - else - sc->pins[pin].intr_polarity = INTR_POLARITY_LOW; - } - - val = MTK_READ_4(sc, GPIO_PIODIR(sc)); - if (val & mask) - sc->pins[pin].pin_flags |= GPIO_PIN_OUTPUT; - else - sc->pins[pin].pin_flags |= GPIO_PIN_INPUT; - - val = MTK_READ_4(sc, GPIO_PIOPOL(sc)); - if (val & mask) { - if (sc->pins[pin].pin_flags & GPIO_PIN_INPUT) { - sc->pins[pin].pin_flags |= GPIO_PIN_INVIN; - } else { - sc->pins[pin].pin_flags |= GPIO_PIN_INVOUT; - } - } -} - -static int -mtk_gpio_attach(device_t dev) -{ - struct mtk_gpio_softc *sc; - phandle_t node; - uint32_t i, num_pins, bank_id; - - sc = device_get_softc(dev); - sc->dev = dev; - - if (bus_alloc_resources(dev, mtk_gpio_spec, sc->res)) { - device_printf(dev, "could not allocate resources for device\n"); - return (ENXIO); - } - - MTK_GPIO_LOCK_INIT(sc); - - node = ofw_bus_get_node(dev); - - if (OF_hasprop(node, "clocks")) - mtk_soc_start_clock(dev); - if (OF_hasprop(node, "resets")) - mtk_soc_reset_device(dev); - - if (OF_hasprop(node, "mtk,bank-id") && (OF_getencprop(node, - "mtk,bank-id", &bank_id, sizeof(bank_id)) >= 0)) - sc->bank_id = bank_id; - else - sc->bank_id = device_get_unit(dev); - - if (OF_hasprop(node, "mtk,num-pins") && (OF_getencprop(node, - "mtk,num-pins", &num_pins, sizeof(num_pins)) >= 0)) - sc->num_pins = num_pins; - else - sc->num_pins = MTK_GPIO_PINS; - - for (i = 0; i < sc->num_pins; i++) { - sc->pins[i].pin_caps |= GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | - GPIO_PIN_INVIN | GPIO_PIN_INVOUT; - sc->pins[i].intr_polarity = INTR_POLARITY_HIGH; - sc->pins[i].intr_trigger = INTR_TRIGGER_EDGE; - - snprintf(sc->pins[i].pin_name, GPIOMAXNAME - 1, "gpio%c%d", - device_get_unit(dev) + 'a', i); - sc->pins[i].pin_name[GPIOMAXNAME - 1] = '\0'; - - mtk_gpio_pin_probe(sc, i); - } - - if (mtk_pic_register_isrcs(sc) != 0) { - device_printf(dev, "could not register PIC ISRCs\n"); - goto fail; - } - - if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) { - device_printf(dev, "could not register PIC\n"); - goto fail; - } - - if (bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE, - mtk_gpio_intr, NULL, sc, &sc->intrhand) != 0) - goto fail_pic; - - sc->busdev = gpiobus_attach_bus(dev); - if (sc->busdev == NULL) - goto fail_pic; - - return (0); -fail_pic: - intr_pic_deregister(dev, OF_xref_from_node(node)); -fail: - if(sc->intrhand != NULL) - bus_teardown_intr(dev, sc->res[1], sc->intrhand); - bus_release_resources(dev, mtk_gpio_spec, sc->res); - MTK_GPIO_LOCK_DESTROY(sc); - return (ENXIO); -} - -static int -mtk_gpio_detach(device_t dev) -{ - struct mtk_gpio_softc *sc = device_get_softc(dev); - phandle_t node; - - node = ofw_bus_get_node(dev); - intr_pic_deregister(dev, OF_xref_from_node(node)); - if (sc->intrhand != NULL) - bus_teardown_intr(dev, sc->res[1], sc->intrhand); - bus_release_resources(dev, mtk_gpio_spec, sc->res); - MTK_GPIO_LOCK_DESTROY(sc); - return (0); -} - -static device_t -mtk_gpio_get_bus(device_t dev) -{ - struct mtk_gpio_softc *sc = device_get_softc(dev); - - return (sc->busdev); -} - -static int -mtk_gpio_pin_max(device_t dev, int *maxpin) -{ - struct mtk_gpio_softc *sc = device_get_softc(dev); - - *maxpin = sc->num_pins - 1; - - return (0); -} - -static int -mtk_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) -{ - struct mtk_gpio_softc *sc = device_get_softc(dev); - - if (pin >= sc->num_pins) - return (EINVAL); - - MTK_GPIO_LOCK(sc); - *caps = sc->pins[pin].pin_caps; - MTK_GPIO_UNLOCK(sc); - - return (0); -} - -static int -mtk_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) -{ - struct mtk_gpio_softc *sc = device_get_softc(dev); - - if (pin >= sc->num_pins) - return (EINVAL); - - MTK_GPIO_LOCK(sc); - *flags = sc->pins[pin].pin_flags; - MTK_GPIO_UNLOCK(sc); - - return (0); -} - -static int -mtk_gpio_pin_getname(device_t dev, uint32_t pin, char *name) -{ - struct mtk_gpio_softc *sc = device_get_softc(dev); - - if (pin >= sc->num_pins) - return (EINVAL); - - strncpy(name, sc->pins[pin].pin_name, GPIOMAXNAME - 1); - name[GPIOMAXNAME - 1] = '\0'; - - return (0); -} - -static int -mtk_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) -{ - struct mtk_gpio_softc *sc; - int retval; - - sc = device_get_softc(dev); - - if (pin >= sc->num_pins) - return (EINVAL); - - MTK_GPIO_LOCK(sc); - retval = mtk_gpio_pin_set_direction(sc, pin, - flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)); - if (retval == 0) - retval = mtk_gpio_pin_set_invert(sc, pin, - flags & (GPIO_PIN_INVIN | GPIO_PIN_INVOUT)); - MTK_GPIO_UNLOCK(sc); - - return (retval); -} - -static int -mtk_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) -{ - struct mtk_gpio_softc *sc; - int ret; - - sc = device_get_softc(dev); - ret = 0; - - if (pin >= sc->num_pins) - return (EINVAL); - - MTK_GPIO_LOCK(sc); - if (value) - MTK_WRITE_4(sc, GPIO_PIOSET(sc), (1u << pin)); - else - MTK_WRITE_4(sc, GPIO_PIORESET(sc), (1u << pin)); - MTK_GPIO_UNLOCK(sc); - - return (ret); -} - -static int -mtk_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) -{ - struct mtk_gpio_softc *sc; - uint32_t data; - int ret; - - sc = device_get_softc(dev); - ret = 0; - - if (pin >= sc->num_pins) - return (EINVAL); - - MTK_GPIO_LOCK(sc); - data = MTK_READ_4(sc, GPIO_PIODATA(sc)); - *val = (data & (1u << pin)) ? 1 : 0; - MTK_GPIO_UNLOCK(sc); - - return (ret); -} - -static int -mtk_gpio_pin_toggle(device_t dev, uint32_t pin) -{ - struct mtk_gpio_softc *sc; - uint32_t val; - int ret; - - sc = device_get_softc(dev); - ret = 0; - - if (pin >= sc->num_pins) - return (EINVAL); - - MTK_GPIO_LOCK(sc); - if(!(sc->pins[pin].pin_flags & GPIO_PIN_OUTPUT)) { - ret = EINVAL; - goto out; - } - val = MTK_READ_4(sc, GPIO_PIODATA(sc)); - val &= (1u << pin); - if (val) - MTK_WRITE_4(sc, GPIO_PIORESET(sc), (1u << pin)); - else - MTK_WRITE_4(sc, GPIO_PIOSET(sc), (1u << pin)); - -out: - MTK_GPIO_UNLOCK(sc); - - return (ret); -} - -static int -mtk_gpio_pic_map_intr(device_t dev, struct intr_map_data *data, - struct intr_irqsrc **isrcp) -{ - struct intr_map_data_fdt *daf; - struct mtk_gpio_softc *sc; - - if (data->type != INTR_MAP_DATA_FDT) - return (ENOTSUP); - - sc = device_get_softc(dev); - daf = (struct intr_map_data_fdt *)data; - - if (daf->ncells != 1 || daf->cells[0] >= sc->num_pins) - return (EINVAL); - - *isrcp = PIC_INTR_ISRC(sc, daf->cells[0]); - return (0); -} - -static void -mtk_gpio_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - struct mtk_gpio_softc *sc; - struct mtk_gpio_pin_irqsrc *pisrc; - uint32_t pin, mask, val; - - sc = device_get_softc(dev); - - pisrc = (struct mtk_gpio_pin_irqsrc *)isrc; - pin = pisrc->irq; - mask = 1u << pin; - - MTK_GPIO_LOCK(sc); - - if (sc->pins[pin].intr_polarity == INTR_POLARITY_LOW) { - val = MTK_READ_4(sc, GPIO_PIORENA(sc)) & ~mask; - MTK_WRITE_4(sc, GPIO_PIORENA(sc), val); - val = MTK_READ_4(sc, GPIO_PIOFENA(sc)) | mask; - MTK_WRITE_4(sc, GPIO_PIOFENA(sc), val); - } else { - val = MTK_READ_4(sc, GPIO_PIOFENA(sc)) & ~mask; - MTK_WRITE_4(sc, GPIO_PIOFENA(sc), val); - val = MTK_READ_4(sc, GPIO_PIORENA(sc)) | mask; - MTK_WRITE_4(sc, GPIO_PIORENA(sc), val); - } - - MTK_GPIO_UNLOCK(sc); -} - -static void -mtk_gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - struct mtk_gpio_softc *sc; - struct mtk_gpio_pin_irqsrc *pisrc; - uint32_t pin, mask, val; - - sc = device_get_softc(dev); - - pisrc = (struct mtk_gpio_pin_irqsrc *)isrc; - pin = pisrc->irq; - mask = 1u << pin; - - MTK_GPIO_LOCK(sc); - - val = MTK_READ_4(sc, GPIO_PIORENA(sc)) & ~mask; - MTK_WRITE_4(sc, GPIO_PIORENA(sc), val); - val = MTK_READ_4(sc, GPIO_PIOFENA(sc)) & ~mask; - MTK_WRITE_4(sc, GPIO_PIOFENA(sc), val); - - MTK_GPIO_UNLOCK(sc); -} - -static void -mtk_gpio_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - mtk_gpio_pic_disable_intr(dev, isrc); -} - -static void -mtk_gpio_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - mtk_gpio_pic_enable_intr(dev, isrc); -} - -static void -mtk_gpio_pic_post_filter(device_t dev, struct intr_irqsrc *isrc) -{ - struct mtk_gpio_softc *sc; - struct mtk_gpio_pin_irqsrc *pisrc; - - pisrc = (struct mtk_gpio_pin_irqsrc *)isrc; - sc = device_get_softc(dev); - MTK_GPIO_LOCK(sc); - MTK_WRITE_4(sc, GPIO_PIOINT(sc), 1u << pisrc->irq); - MTK_GPIO_UNLOCK(sc); -} - -static int -mtk_gpio_intr(void *arg) -{ - struct mtk_gpio_softc *sc; - uint32_t i, interrupts; - - sc = arg; - interrupts = MTK_READ_4(sc, GPIO_PIOINT(sc)); - - for (i = 0; interrupts != 0; i++, interrupts >>= 1) { - if ((interrupts & 0x1) == 0) - continue; - if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i), - curthread->td_intr_frame) != 0) { - device_printf(sc->dev, "spurious interrupt %d\n", i); - } - } - - return (FILTER_HANDLED); -} - -static phandle_t -mtk_gpio_get_node(device_t bus, device_t dev) -{ - - /* We only have one child, the GPIO bus, which needs our own node. */ - return (ofw_bus_get_node(bus)); -} - -static device_method_t mtk_gpio_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, mtk_gpio_probe), - DEVMETHOD(device_attach, mtk_gpio_attach), - DEVMETHOD(device_detach, mtk_gpio_detach), - - /* GPIO protocol */ - DEVMETHOD(gpio_get_bus, mtk_gpio_get_bus), - DEVMETHOD(gpio_pin_max, mtk_gpio_pin_max), - DEVMETHOD(gpio_pin_getname, mtk_gpio_pin_getname), - DEVMETHOD(gpio_pin_getflags, mtk_gpio_pin_getflags), - DEVMETHOD(gpio_pin_getcaps, mtk_gpio_pin_getcaps), - DEVMETHOD(gpio_pin_setflags, mtk_gpio_pin_setflags), - DEVMETHOD(gpio_pin_get, mtk_gpio_pin_get), - DEVMETHOD(gpio_pin_set, mtk_gpio_pin_set), - DEVMETHOD(gpio_pin_toggle, mtk_gpio_pin_toggle), - - /* Interrupt controller interface */ - DEVMETHOD(pic_disable_intr, mtk_gpio_pic_disable_intr), - DEVMETHOD(pic_enable_intr, mtk_gpio_pic_enable_intr), - DEVMETHOD(pic_map_intr, mtk_gpio_pic_map_intr), - DEVMETHOD(pic_post_filter, mtk_gpio_pic_post_filter), - DEVMETHOD(pic_post_ithread, mtk_gpio_pic_post_ithread), - DEVMETHOD(pic_pre_ithread, mtk_gpio_pic_pre_ithread), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_node, mtk_gpio_get_node), - - DEVMETHOD_END -}; - -static driver_t mtk_gpio_driver = { - "gpio", - mtk_gpio_methods, - sizeof(struct mtk_gpio_softc), -}; - -static devclass_t mtk_gpio_devclass; - -EARLY_DRIVER_MODULE(mtk_gpio_v2, simplebus, mtk_gpio_driver, - mtk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE); diff --git a/sys/mips/mediatek/mtk_intr_gic.c b/sys/mips/mediatek/mtk_intr_gic.c deleted file mode 100644 index c6c1f70a5a3..00000000000 --- a/sys/mips/mediatek/mtk_intr_gic.c +++ /dev/null @@ -1,368 +0,0 @@ -/*- - * Copyright (c) 2016 Stanislav Galabov - * Copyright (c) 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "pic_if.h" - -#define MTK_NIRQS 64 /* We'll only use 64 for now */ - -#define MTK_INTPOL 0x0100 -#define MTK_INTTRIG 0x0180 -#define MTK_INTDIS 0x0300 -#define MTK_INTENA 0x0380 -#define MTK_INTMASK 0x0400 -#define MTK_INTSTAT 0x0480 -#define MTK_MAPPIN(_i) (0x0500 + (4 * (_i))) -#define MTK_MAPVPE(_i, _v) (0x2000 + (32 * (_i)) + (((_v) / 32) * 4)) - -#define MTK_INTPOL_POS 1 -#define MTK_INTPOL_NEG 0 -#define MTK_INTTRIG_EDGE 1 -#define MTK_INTTRIG_LEVEL 0 -#define MTK_PIN_BITS(_i) ((1 << 31) | (_i)) -#define MTK_VPE_BITS(_v) (1 << ((_v) % 32)) - -static int mtk_gic_intr(void *); - -struct mtk_gic_irqsrc { - struct intr_irqsrc isrc; - u_int irq; -}; - -struct mtk_gic_softc { - device_t gic_dev; - void * gic_intrhand; - struct resource * gic_res[2]; - struct mtk_gic_irqsrc gic_irqs[MTK_NIRQS]; - struct mtx mutex; - uint32_t nirqs; -}; - -#define GIC_INTR_ISRC(sc, irq) (&(sc)->gic_irqs[(irq)].isrc) - -static struct resource_spec mtk_gic_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Registers */ - { -1, 0 } -}; - -static struct ofw_compat_data compat_data[] = { - { "mti,gic", 1 }, - { NULL, 0 } -}; - -#define READ4(_sc, _reg) bus_read_4((_sc)->gic_res[0], (_reg)) -#define WRITE4(_sc, _reg, _val) bus_write_4((_sc)->gic_res[0], (_reg), (_val)) - -static int -mtk_gic_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) - return (ENXIO); - - device_set_desc(dev, "MTK Interrupt Controller (GIC)"); - return (BUS_PROBE_DEFAULT); -} - -static inline void -gic_irq_unmask(struct mtk_gic_softc *sc, u_int irq) -{ - - WRITE4(sc, MTK_INTENA, (1u << (irq))); -} - -static inline void -gic_irq_mask(struct mtk_gic_softc *sc, u_int irq) -{ - - WRITE4(sc, MTK_INTDIS, (1u << (irq))); -} - -static inline intptr_t -gic_xref(device_t dev) -{ - - return (OF_xref_from_node(ofw_bus_get_node(dev))); -} - -static int -mtk_gic_register_isrcs(struct mtk_gic_softc *sc) -{ - int error; - uint32_t irq; - struct intr_irqsrc *isrc; - const char *name; - - name = device_get_nameunit(sc->gic_dev); - for (irq = 0; irq < sc->nirqs; irq++) { - sc->gic_irqs[irq].irq = irq; - isrc = GIC_INTR_ISRC(sc, irq); - error = intr_isrc_register(isrc, sc->gic_dev, 0, "%s", name); - if (error != 0) { - /* XXX call intr_isrc_deregister */ - device_printf(sc->gic_dev, "%s failed", __func__); - return (error); - } - } - - return (0); -} - -static int -mtk_gic_attach(device_t dev) -{ - struct mtk_gic_softc *sc; - intptr_t xref = gic_xref(dev); - int i; - - sc = device_get_softc(dev); - - if (bus_alloc_resources(dev, mtk_gic_spec, sc->gic_res)) { - device_printf(dev, "could not allocate resources\n"); - return (ENXIO); - } - - sc->gic_dev = dev; - - /* Initialize mutex */ - mtx_init(&sc->mutex, "PIC lock", "", MTX_SPIN); - - /* Set the number of interrupts */ - sc->nirqs = nitems(sc->gic_irqs); - - /* Mask all interrupts */ - WRITE4(sc, MTK_INTDIS, 0xFFFFFFFF); - - /* All interrupts are of type level */ - WRITE4(sc, MTK_INTTRIG, 0x00000000); - - /* All interrupts are of positive polarity */ - WRITE4(sc, MTK_INTPOL, 0xFFFFFFFF); - - /* - * Route all interrupts to pin 0 on VPE 0; - */ - for (i = 0; i < 32; i++) { - WRITE4(sc, MTK_MAPPIN(i), MTK_PIN_BITS(0)); - WRITE4(sc, MTK_MAPVPE(i, 0), MTK_VPE_BITS(0)); - } - - /* Register the interrupts */ - if (mtk_gic_register_isrcs(sc) != 0) { - device_printf(dev, "could not register GIC ISRCs\n"); - goto cleanup; - } - - /* - * Now, when everything is initialized, it's right time to - * register interrupt controller to interrupt framefork. - */ - if (intr_pic_register(dev, xref) == NULL) { - device_printf(dev, "could not register PIC\n"); - goto cleanup; - } - - cpu_establish_hardintr("gic", mtk_gic_intr, NULL, sc, 0, INTR_TYPE_CLK, - NULL); - - return (0); - -cleanup: - bus_release_resources(dev, mtk_gic_spec, sc->gic_res); - return(ENXIO); -} - -static int -mtk_gic_intr(void *arg) -{ - struct mtk_gic_softc *sc = arg; - struct thread *td; - uint32_t i, intr; - - td = curthread; - /* Workaround: do not inflate intr nesting level */ - td->td_intr_nesting_level--; - - intr = READ4(sc, MTK_INTSTAT) & READ4(sc, MTK_INTMASK); - while ((i = fls(intr)) != 0) { - i--; - intr &= ~(1u << i); - - if (intr_isrc_dispatch(GIC_INTR_ISRC(sc, i), - curthread->td_intr_frame) != 0) { - device_printf(sc->gic_dev, - "Stray interrupt %u detected\n", i); - gic_irq_mask(sc, i); - continue; - } - } - - KASSERT(i == 0, ("all interrupts handled")); - - td->td_intr_nesting_level++; - - return (FILTER_HANDLED); -} - -static int -mtk_gic_map_intr(device_t dev, struct intr_map_data *data, - struct intr_irqsrc **isrcp) -{ -#ifdef FDT - struct intr_map_data_fdt *daf; - struct mtk_gic_softc *sc; - - if (data->type != INTR_MAP_DATA_FDT) - return (ENOTSUP); - - sc = device_get_softc(dev); - daf = (struct intr_map_data_fdt *)data; - - if (daf->ncells != 3 || daf->cells[1] >= sc->nirqs) - return (EINVAL); - - *isrcp = GIC_INTR_ISRC(sc, daf->cells[1]); - return (0); -#else - return (ENOTSUP); -#endif -} - -static void -mtk_gic_enable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - u_int irq; - - irq = ((struct mtk_gic_irqsrc *)isrc)->irq; - gic_irq_unmask(device_get_softc(dev), irq); -} - -static void -mtk_gic_disable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - u_int irq; - - irq = ((struct mtk_gic_irqsrc *)isrc)->irq; - gic_irq_mask(device_get_softc(dev), irq); -} - -static void -mtk_gic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - mtk_gic_disable_intr(dev, isrc); -} - -static void -mtk_gic_post_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - mtk_gic_enable_intr(dev, isrc); -} - -static void -mtk_gic_post_filter(device_t dev, struct intr_irqsrc *isrc) -{ -} - -#ifdef SMP -static int -mtk_gic_bind(device_t dev, struct intr_irqsrc *isrc) -{ - return (EOPNOTSUPP); -} - -static void -mtk_gic_init_secondary(device_t dev) -{ -} - -static void -mtk_gic_ipi_send(device_t dev, struct intr_irqsrc *isrc, cpuset_t cpus) -{ -} -#endif - -static device_method_t mtk_gic_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, mtk_gic_probe), - DEVMETHOD(device_attach, mtk_gic_attach), - /* Interrupt controller interface */ - DEVMETHOD(pic_disable_intr, mtk_gic_disable_intr), - DEVMETHOD(pic_enable_intr, mtk_gic_enable_intr), - DEVMETHOD(pic_map_intr, mtk_gic_map_intr), - DEVMETHOD(pic_post_filter, mtk_gic_post_filter), - DEVMETHOD(pic_post_ithread, mtk_gic_post_ithread), - DEVMETHOD(pic_pre_ithread, mtk_gic_pre_ithread), -#ifdef SMP - DEVMETHOD(pic_bind, mtk_gic_bind), - DEVMETHOD(pic_init_secondary, mtk_gic_init_secondary), - DEVMETHOD(pic_ipi_send, mtk_gic_ipi_send), -#endif - { 0, 0 } -}; - -static driver_t mtk_gic_driver = { - "intc", - mtk_gic_methods, - sizeof(struct mtk_gic_softc), -}; - -static devclass_t mtk_gic_devclass; - -EARLY_DRIVER_MODULE(intc_gic, simplebus, mtk_gic_driver, mtk_gic_devclass, 0, 0, - BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); diff --git a/sys/mips/mediatek/mtk_intr_v1.c b/sys/mips/mediatek/mtk_intr_v1.c deleted file mode 100644 index ea5d88a4588..00000000000 --- a/sys/mips/mediatek/mtk_intr_v1.c +++ /dev/null @@ -1,355 +0,0 @@ -/*- - * Copyright (c) 2015 Stanislav Galabov - * Copyright (c) 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "pic_if.h" - -#define MTK_NIRQS 32 - -#define MTK_IRQ0STAT 0x0000 -#define MTK_IRQ1STAT 0x0004 -#define MTK_INTTYPE 0x0020 -#define MTK_INTRAW 0x0030 -#define MTK_INTENA 0x0034 -#define MTK_INTDIS 0x0038 - -static int mtk_pic_intr(void *); - -struct mtk_pic_irqsrc { - struct intr_irqsrc isrc; - u_int irq; -}; - -struct mtk_pic_softc { - device_t pic_dev; - void * pic_intrhand; - struct resource * pic_res[2]; - struct mtk_pic_irqsrc pic_irqs[MTK_NIRQS]; - struct mtx mutex; - uint32_t nirqs; -}; - -#define PIC_INTR_ISRC(sc, irq) (&(sc)->pic_irqs[(irq)].isrc) - -static struct resource_spec mtk_pic_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Registers */ - { SYS_RES_IRQ, 0, RF_ACTIVE }, /* Parent interrupt 1 */ -// { SYS_RES_IRQ, 1, RF_ACTIVE }, /* Parent interrupt 2 */ - { -1, 0 } -}; - -static struct ofw_compat_data compat_data[] = { - { "ralink,rt2880-intc", 1 }, - { "ralink,rt3050-intc", 1 }, - { "ralink,rt3352-intc", 1 }, - { "ralink,rt3883-intc", 1 }, - { "ralink,rt5350-intc", 1 }, - { "ralink,mt7620a-intc", 1 }, - { NULL, 0 } -}; - -#define READ4(_sc, _reg) bus_read_4((_sc)->pic_res[0], _reg) -#define WRITE4(_sc, _reg, _val) bus_write_4((_sc)->pic_res[0], _reg, _val) - -static int -mtk_pic_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) - return (ENXIO); - - device_set_desc(dev, "MTK Interrupt Controller (v2)"); - return (BUS_PROBE_DEFAULT); -} - -static inline void -pic_irq_unmask(struct mtk_pic_softc *sc, u_int irq) -{ - - WRITE4(sc, MTK_INTENA, (1u << (irq))); -} - -static inline void -pic_irq_mask(struct mtk_pic_softc *sc, u_int irq) -{ - - WRITE4(sc, MTK_INTDIS, (1u << (irq))); -} - -static inline intptr_t -pic_xref(device_t dev) -{ - return (OF_xref_from_node(ofw_bus_get_node(dev))); -} - -static int -mtk_pic_register_isrcs(struct mtk_pic_softc *sc) -{ - int error; - uint32_t irq; - struct intr_irqsrc *isrc; - const char *name; - - name = device_get_nameunit(sc->pic_dev); - for (irq = 0; irq < sc->nirqs; irq++) { - sc->pic_irqs[irq].irq = irq; - isrc = PIC_INTR_ISRC(sc, irq); - error = intr_isrc_register(isrc, sc->pic_dev, 0, "%s", name); - if (error != 0) { - /* XXX call intr_isrc_deregister */ - device_printf(sc->pic_dev, "%s failed", __func__); - return (error); - } - } - - return (0); -} - -static int -mtk_pic_attach(device_t dev) -{ - struct mtk_pic_softc *sc; - intptr_t xref = pic_xref(dev); - - sc = device_get_softc(dev); - - if (bus_alloc_resources(dev, mtk_pic_spec, sc->pic_res)) { - device_printf(dev, "could not allocate resources\n"); - return (ENXIO); - } - - sc->pic_dev = dev; - - /* Initialize mutex */ - mtx_init(&sc->mutex, "PIC lock", "", MTX_SPIN); - - /* Set the number of interrupts */ - sc->nirqs = nitems(sc->pic_irqs); - - /* Mask all interrupts */ - WRITE4(sc, MTK_INTDIS, 0x7FFFFFFF); - - /* But enable interrupt generation/masking */ - WRITE4(sc, MTK_INTENA, 0x80000000); - - /* Set all interrupts to type 0 */ - WRITE4(sc, MTK_INTTYPE, 0x00000000); - - /* Register the interrupts */ - if (mtk_pic_register_isrcs(sc) != 0) { - device_printf(dev, "could not register PIC ISRCs\n"); - goto cleanup; - } - - /* - * Now, when everything is initialized, it's right time to - * register interrupt controller to interrupt framefork. - */ - if (intr_pic_register(dev, xref) == NULL) { - device_printf(dev, "could not register PIC\n"); - goto cleanup; - } - - if (bus_setup_intr(dev, sc->pic_res[1], INTR_TYPE_CLK, - mtk_pic_intr, NULL, sc, &sc->pic_intrhand)) { - device_printf(dev, "could not setup irq handler\n"); - intr_pic_deregister(dev, xref); - goto cleanup; - } - return (0); - -cleanup: - bus_release_resources(dev, mtk_pic_spec, sc->pic_res); - return(ENXIO); -} - -static int -mtk_pic_intr(void *arg) -{ - struct mtk_pic_softc *sc = arg; - struct thread *td; - uint32_t i, intr; - - td = curthread; - /* Workaround: do not inflate intr nesting level */ - td->td_intr_nesting_level--; - -#ifdef _notyet_ - intr = READ4(sc, MTK_IRQ1STAT); - while ((i = fls(intr)) != 0) { - i--; - intr &= ~(1u << i); - - if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i), - curthread->td_intr_frame) != 0) { - device_printf(sc->pic_dev, - "Stray interrupt %u detected\n", i); - pic_irq_mask(sc, i); - continue; - } - } - - KASSERT(i == 0, ("all interrupts handled")); -#endif - - intr = READ4(sc, MTK_IRQ0STAT); - - while ((i = fls(intr)) != 0) { - i--; - intr &= ~(1u << i); - - if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i), - curthread->td_intr_frame) != 0) { - device_printf(sc->pic_dev, - "Stray interrupt %u detected\n", i); - pic_irq_mask(sc, i); - continue; - } - } - - KASSERT(i == 0, ("all interrupts handled")); - - td->td_intr_nesting_level++; - - return (FILTER_HANDLED); -} - -static int -mtk_pic_map_intr(device_t dev, struct intr_map_data *data, - struct intr_irqsrc **isrcp) -{ -#ifdef FDT - struct intr_map_data_fdt *daf; - struct mtk_pic_softc *sc; - - if (data->type != INTR_MAP_DATA_FDT) - return (ENOTSUP); - - sc = device_get_softc(dev); - daf = (struct intr_map_data_fdt *)data; - - if (daf->ncells != 1 || daf->cells[0] >= sc->nirqs) - return (EINVAL); - - *isrcp = PIC_INTR_ISRC(sc, daf->cells[0]); - return (0); -#else - return (ENOTSUP); -#endif -} - -static void -mtk_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - u_int irq; - - irq = ((struct mtk_pic_irqsrc *)isrc)->irq; - pic_irq_unmask(device_get_softc(dev), irq); -} - -static void -mtk_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - u_int irq; - - irq = ((struct mtk_pic_irqsrc *)isrc)->irq; - pic_irq_mask(device_get_softc(dev), irq); -} - -static void -mtk_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - mtk_pic_disable_intr(dev, isrc); -} - -static void -mtk_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - mtk_pic_enable_intr(dev, isrc); -} - -static void -mtk_pic_post_filter(device_t dev, struct intr_irqsrc *isrc) -{ -} - -static device_method_t mtk_pic_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, mtk_pic_probe), - DEVMETHOD(device_attach, mtk_pic_attach), - /* Interrupt controller interface */ - DEVMETHOD(pic_disable_intr, mtk_pic_disable_intr), - DEVMETHOD(pic_enable_intr, mtk_pic_enable_intr), - DEVMETHOD(pic_map_intr, mtk_pic_map_intr), - DEVMETHOD(pic_post_filter, mtk_pic_post_filter), - DEVMETHOD(pic_post_ithread, mtk_pic_post_ithread), - DEVMETHOD(pic_pre_ithread, mtk_pic_pre_ithread), - { 0, 0 } -}; - -static driver_t mtk_pic_driver = { - "intc", - mtk_pic_methods, - sizeof(struct mtk_pic_softc), -}; - -static devclass_t mtk_pic_devclass; - -EARLY_DRIVER_MODULE(intc_v1, simplebus, mtk_pic_driver, mtk_pic_devclass, 0, 0, - BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); diff --git a/sys/mips/mediatek/mtk_intr_v2.c b/sys/mips/mediatek/mtk_intr_v2.c deleted file mode 100644 index 299e40aa378..00000000000 --- a/sys/mips/mediatek/mtk_intr_v2.c +++ /dev/null @@ -1,350 +0,0 @@ -/*- - * Copyright (c) 2015 Stanislav Galabov - * Copyright (c) 2015 Alexander Kabaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "pic_if.h" - -#define MTK_NIRQS 32 - -#define MTK_IRQ0STAT 0x009c -#define MTK_IRQ1STAT 0x00a0 -#define MTK_INTTYPE 0x0000 -#define MTK_INTRAW 0x00a4 -#define MTK_INTENA 0x0080 -#define MTK_INTDIS 0x0078 - -static int mtk_pic_intr(void *); - -struct mtk_pic_irqsrc { - struct intr_irqsrc isrc; - u_int irq; -}; - -struct mtk_pic_softc { - device_t pic_dev; - void * pic_intrhand; - struct resource * pic_res[2]; - struct mtk_pic_irqsrc pic_irqs[MTK_NIRQS]; - struct mtx mutex; - uint32_t nirqs; -}; - -#define PIC_INTR_ISRC(sc, irq) (&(sc)->pic_irqs[(irq)].isrc) - -static struct resource_spec mtk_pic_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Registers */ - { SYS_RES_IRQ, 0, RF_ACTIVE }, /* Parent interrupt 1 */ -// { SYS_RES_IRQ, 1, RF_ACTIVE }, /* Parent interrupt 2 */ - { -1, 0 } -}; - -static struct ofw_compat_data compat_data[] = { - { "ralink,mt7628an-intc", 1 }, - { NULL, 0 } -}; - -#define READ4(_sc, _reg) bus_read_4((_sc)->pic_res[0], _reg) -#define WRITE4(_sc, _reg, _val) bus_write_4((_sc)->pic_res[0], _reg, _val) - -static int -mtk_pic_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) - return (ENXIO); - - device_set_desc(dev, "MTK Interrupt Controller (v2)"); - return (BUS_PROBE_DEFAULT); -} - -static inline void -pic_irq_unmask(struct mtk_pic_softc *sc, u_int irq) -{ - - WRITE4(sc, MTK_INTENA, (1u << (irq))); -} - -static inline void -pic_irq_mask(struct mtk_pic_softc *sc, u_int irq) -{ - - WRITE4(sc, MTK_INTDIS, (1u << (irq))); -} - -static inline intptr_t -pic_xref(device_t dev) -{ - return (OF_xref_from_node(ofw_bus_get_node(dev))); -} - -static int -mtk_pic_register_isrcs(struct mtk_pic_softc *sc) -{ - int error; - uint32_t irq; - struct intr_irqsrc *isrc; - const char *name; - - name = device_get_nameunit(sc->pic_dev); - for (irq = 0; irq < sc->nirqs; irq++) { - sc->pic_irqs[irq].irq = irq; - isrc = PIC_INTR_ISRC(sc, irq); - error = intr_isrc_register(isrc, sc->pic_dev, 0, "%s", name); - if (error != 0) { - /* XXX call intr_isrc_deregister */ - device_printf(sc->pic_dev, "%s failed", __func__); - return (error); - } - } - - return (0); -} - -static int -mtk_pic_attach(device_t dev) -{ - struct mtk_pic_softc *sc; - intptr_t xref = pic_xref(dev); - - sc = device_get_softc(dev); - - if (bus_alloc_resources(dev, mtk_pic_spec, sc->pic_res)) { - device_printf(dev, "could not allocate resources\n"); - return (ENXIO); - } - - sc->pic_dev = dev; - - /* Initialize mutex */ - mtx_init(&sc->mutex, "PIC lock", "", MTX_SPIN); - - /* Set the number of interrupts */ - sc->nirqs = nitems(sc->pic_irqs); - - /* Mask all interrupts */ - WRITE4(sc, MTK_INTDIS, 0xFFFFFFFF); - - /* But enable interrupt generation/masking */ - WRITE4(sc, MTK_INTENA, 0x00000000); - - /* Set all interrupts to type 0 */ - WRITE4(sc, MTK_INTTYPE, 0xFFFFFFFF); - - /* Register the interrupts */ - if (mtk_pic_register_isrcs(sc) != 0) { - device_printf(dev, "could not register PIC ISRCs\n"); - goto cleanup; - } - - /* - * Now, when everything is initialized, it's right time to - * register interrupt controller to interrupt framefork. - */ - if (intr_pic_register(dev, xref) == NULL) { - device_printf(dev, "could not register PIC\n"); - goto cleanup; - } - - if (bus_setup_intr(dev, sc->pic_res[1], INTR_TYPE_CLK, - mtk_pic_intr, NULL, sc, &sc->pic_intrhand)) { - device_printf(dev, "could not setup irq handler\n"); - intr_pic_deregister(dev, xref); - goto cleanup; - } - return (0); - -cleanup: - bus_release_resources(dev, mtk_pic_spec, sc->pic_res); - return(ENXIO); -} - -static int -mtk_pic_intr(void *arg) -{ - struct mtk_pic_softc *sc = arg; - struct thread *td; - uint32_t i, intr; - - td = curthread; - /* Workaround: do not inflate intr nesting level */ - td->td_intr_nesting_level--; - -#ifdef _notyet_ - intr = READ4(sc, MTK_IRQ1STAT); - while ((i = fls(intr)) != 0) { - i--; - intr &= ~(1u << i); - - if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i), - curthread->td_intr_frame) != 0) { - device_printf(sc->pic_dev, - "Stray interrupt %u detected\n", i); - pic_irq_mask(sc, i); - continue; - } - } - - KASSERT(i == 0, ("all interrupts handled")); -#endif - - intr = READ4(sc, MTK_IRQ0STAT); - - while ((i = fls(intr)) != 0) { - i--; - intr &= ~(1u << i); - - if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i), - curthread->td_intr_frame) != 0) { - device_printf(sc->pic_dev, - "Stray interrupt %u detected\n", i); - pic_irq_mask(sc, i); - continue; - } - } - - KASSERT(i == 0, ("all interrupts handled")); - - td->td_intr_nesting_level++; - - return (FILTER_HANDLED); -} - -static int -mtk_pic_map_intr(device_t dev, struct intr_map_data *data, - struct intr_irqsrc **isrcp) -{ -#ifdef FDT - struct intr_map_data_fdt *daf; - struct mtk_pic_softc *sc; - - if (data->type != INTR_MAP_DATA_FDT) - return (ENOTSUP); - - sc = device_get_softc(dev); - daf = (struct intr_map_data_fdt *)data; - - if (daf->ncells != 1 || daf->cells[0] >= sc->nirqs) - return (EINVAL); - - *isrcp = PIC_INTR_ISRC(sc, daf->cells[0]); - return (0); -#else - return (ENOTSUP); -#endif -} - -static void -mtk_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - u_int irq; - - irq = ((struct mtk_pic_irqsrc *)isrc)->irq; - pic_irq_unmask(device_get_softc(dev), irq); -} - -static void -mtk_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - u_int irq; - - irq = ((struct mtk_pic_irqsrc *)isrc)->irq; - pic_irq_mask(device_get_softc(dev), irq); -} - -static void -mtk_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - mtk_pic_disable_intr(dev, isrc); -} - -static void -mtk_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - mtk_pic_enable_intr(dev, isrc); -} - -static void -mtk_pic_post_filter(device_t dev, struct intr_irqsrc *isrc) -{ -} - -static device_method_t mtk_pic_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, mtk_pic_probe), - DEVMETHOD(device_attach, mtk_pic_attach), - /* Interrupt controller interface */ - DEVMETHOD(pic_disable_intr, mtk_pic_disable_intr), - DEVMETHOD(pic_enable_intr, mtk_pic_enable_intr), - DEVMETHOD(pic_map_intr, mtk_pic_map_intr), - DEVMETHOD(pic_post_filter, mtk_pic_post_filter), - DEVMETHOD(pic_post_ithread, mtk_pic_post_ithread), - DEVMETHOD(pic_pre_ithread, mtk_pic_pre_ithread), - { 0, 0 } -}; - -static driver_t mtk_pic_driver = { - "intc", - mtk_pic_methods, - sizeof(struct mtk_pic_softc), -}; - -static devclass_t mtk_pic_devclass; - -EARLY_DRIVER_MODULE(intc_v2, simplebus, mtk_pic_driver, mtk_pic_devclass, 0, 0, - BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE); diff --git a/sys/mips/mediatek/mtk_machdep.c b/sys/mips/mediatek/mtk_machdep.c deleted file mode 100644 index 6ed93d75367..00000000000 --- a/sys/mips/mediatek/mtk_machdep.c +++ /dev/null @@ -1,301 +0,0 @@ -/*- - * Copyright (C) 2015-2016 by Stanislav Galabov. All rights reserved. - * Copyright (C) 2010-2011 by Aleksandr Rybalko. All rights reserved. - * Copyright (C) 2007 by Oleksandr Tymoshenko. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "opt_platform.h" -#include "opt_rt305x.h" - -#include -#include - -extern int *edata; -extern int *end; -static char boot1_env[0x1000]; - -void -platform_cpu_init() -{ - /* Nothing special */ -} - -static void -mips_init(void) -{ - struct mem_region mr[FDT_MEM_REGIONS]; - uint64_t val; - int i, j, mr_cnt; - char *memsize; - - printf("entry: mips_init()\n"); - - bootverbose = 1; - - for (i = 0; i < 10; i++) - phys_avail[i] = 0; - - dump_avail[0] = phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end); - - /* - * The most low memory MT7621 can have. Currently MT7621 is the chip - * that supports the most memory, so that seems reasonable. - */ - realmem = btoc(448 * 1024 * 1024); - - if (fdt_get_mem_regions(mr, &mr_cnt, &val) == 0) { - physmem = btoc(val); - - printf("RAM size: %ldMB (from FDT)\n", - ctob(physmem) / (1024 * 1024)); - - KASSERT((phys_avail[0] >= mr[0].mr_start) && \ - (phys_avail[0] < (mr[0].mr_start + mr[0].mr_size)), - ("First region is not within FDT memory range")); - - /* Limit size of the first region */ - phys_avail[1] = (mr[0].mr_start + - MIN(mr[0].mr_size, ctob(realmem))); - dump_avail[1] = phys_avail[1]; - - /* Add the rest of the regions */ - for (i = 1, j = 2; i < mr_cnt; i++, j+=2) { - phys_avail[j] = mr[i].mr_start; - phys_avail[j+1] = (mr[i].mr_start + mr[i].mr_size); - dump_avail[j] = phys_avail[j]; - dump_avail[j+1] = phys_avail[j+1]; - } - } else { - if ((memsize = kern_getenv("memsize")) != NULL) { - physmem = btoc(strtol(memsize, NULL, 0) << 20); - printf("RAM size: %ldMB (from memsize)\n", - ctob(physmem) / (1024 * 1024)); - } else { /* All else failed, assume 32MB */ - physmem = btoc(32 * 1024 * 1024); - printf("RAM size: %ldMB (assumed)\n", - ctob(physmem) / (1024 * 1024)); - } - - if (mtk_soc_get_socid() == MTK_SOC_RT2880) { - /* RT2880 memory start is 88000000 */ - dump_avail[1] = phys_avail[1] = ctob(physmem) - + 0x08000000; - } else if (ctob(physmem) < (448 * 1024 * 1024)) { - /* - * Anything up to 448MB is assumed to be directly - * mappable as low memory... - */ - dump_avail[1] = phys_avail[1] = ctob(physmem); - } else if (mtk_soc_get_socid() == MTK_SOC_MT7621) { - /* - * On MT7621 the low memory is limited to 448MB, the - * rest is high memory, mapped at 0x20000000 - */ - phys_avail[1] = 448 * 1024 * 1024; - phys_avail[2] = 0x20000000; - phys_avail[3] = phys_avail[2] + ctob(physmem) - - phys_avail[1]; - dump_avail[1] = phys_avail[1] - phys_avail[0]; - dump_avail[2] = phys_avail[2]; - dump_avail[3] = phys_avail[3] - phys_avail[2]; - } else { - /* - * We have > 448MB RAM and we're not MT7621? Currently - * there is no such chip, so we'll just limit the RAM to - * 32MB and let the user know... - */ - printf("Unknown chip, assuming 32MB RAM\n"); - physmem = btoc(32 * 1024 * 1024); - dump_avail[1] = phys_avail[1] = ctob(physmem); - } - } - - if (physmem < realmem) - realmem = physmem; - - init_param1(); - init_param2(physmem); - mips_cpu_init(); - pmap_bootstrap(); - mips_proc0_init(); - mutex_init(); - kdb_init(); -#ifdef KDB - if (boothowto & RB_KDB) - kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); -#endif -} - -void -platform_reset(void) -{ - - mtk_soc_reset(); -} - -void -platform_start(__register_t a0 __unused, __register_t a1 __unused, - __register_t a2 __unused, __register_t a3 __unused) -{ - vm_offset_t kernend; - int argc = a0, i;//, res; - uint32_t timer_clk; - char **argv = (char **)MIPS_PHYS_TO_KSEG0(a1); - char **envp = (char **)MIPS_PHYS_TO_KSEG0(a2); - void *dtbp; - phandle_t chosen; - char buf[2048]; - - /* clear the BSS and SBSS segments */ - kernend = (vm_offset_t)&end; - memset(&edata, 0, kernend - (vm_offset_t)(&edata)); - - mips_postboot_fixup(); - - /* Initialize pcpu stuff */ - mips_pcpu0_init(); - - dtbp = &fdt_static_dtb; - if (OF_install(OFW_FDT, 0) == FALSE) - while (1); - if (OF_init((void *)dtbp) != 0) - while (1); - - mtk_soc_try_early_detect(); - mtk_soc_set_cpu_model(); - - if ((timer_clk = mtk_soc_get_timerclk()) == 0) - timer_clk = 1000000000; /* no such speed yet */ - - mips_timer_early_init(timer_clk); - - /* initialize console so that we have printf */ - boothowto |= (RB_SERIAL | RB_MULTIPLE); /* Use multiple consoles */ - boothowto |= (RB_VERBOSE); - cninit(); - - init_static_kenv(boot1_env, sizeof(boot1_env)); - - /* - * Get bsdbootargs from FDT if specified. - */ - chosen = OF_finddevice("/chosen"); - if (OF_getprop(chosen, "bsdbootargs", buf, sizeof(buf)) != -1) - boothowto |= boot_parse_cmdline(buf); - - printf("FDT DTB at: 0x%08x\n", (uint32_t)dtbp); - - printf("CPU clock: %4dMHz\n", mtk_soc_get_cpuclk()/(1000*1000)); - printf("Timer clock: %4dMHz\n", timer_clk/(1000*1000)); - printf("UART clock: %4dMHz\n\n", mtk_soc_get_uartclk()/(1000*1000)); - - printf("U-Boot args (from %d args):\n", argc - 1); - - if (argc == 1) - printf("\tNone\n"); - - for (i = 1; i < argc; i++) { - char *n = "argv ", *arg; - - if (i > 99) - break; - - if (argv[i]) - { - arg = (char *)(intptr_t)MIPS_PHYS_TO_KSEG0(argv[i]); - printf("\targv[%d] = %s\n", i, arg); - sprintf(n, "argv%d", i); - kern_setenv(n, arg); - } - } - - printf("Environment:\n"); - - for (i = 0; envp[i] && MIPS_IS_VALID_PTR(envp[i]); i++) { - char *n, *arg; - - arg = (char *)(intptr_t)MIPS_PHYS_TO_KSEG0(envp[i]); - if (! MIPS_IS_VALID_PTR(arg)) - continue; - printf("\t%s\n", arg); - n = strsep(&arg, "="); - if (arg == NULL) - kern_setenv(n, "1"); - else - kern_setenv(n, arg); - } - - mips_init(); - mips_timer_init_params(timer_clk, 0); -} diff --git a/sys/mips/mediatek/mtk_ohci.c b/sys/mips/mediatek/mtk_ohci.c deleted file mode 100644 index 9b682a48050..00000000000 --- a/sys/mips/mediatek/mtk_ohci.c +++ /dev/null @@ -1,215 +0,0 @@ -#include -/*- - * Copyright (c) 2015 Stanislav Galabov. All rights reserved. - * Copyright (c) 2010,2011 Aleksandr Rybalko. All rights reserved. - * Copyright (c) 2007-2008 Hans Petter Selasky. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include - -#define OHCI_HC_DEVSTR "MTK USB Controller" - -static device_probe_t ohci_fdt_probe; -static device_attach_t ohci_fdt_attach; -static device_detach_t ohci_fdt_detach; - -static int -ohci_fdt_probe(device_t self) -{ - - if (!ofw_bus_status_okay(self)) - return (ENXIO); - - if (!ofw_bus_is_compatible(self, "generic-ohci")) - return (ENXIO); - - device_set_desc(self, OHCI_HC_DEVSTR); - - return (BUS_PROBE_DEFAULT); -} - -static int -ohci_fdt_attach(device_t self) -{ - ohci_softc_t *sc = device_get_softc(self); - int err; - int rid; - - /* initialise some bus fields */ - sc->sc_bus.parent = self; - sc->sc_bus.devices = sc->sc_devices; - sc->sc_bus.devices_max = OHCI_MAX_DEVICES; - sc->sc_bus.dma_bits = 32; - - /* get all DMA memory */ - if (usb_bus_mem_alloc_all(&sc->sc_bus, - USB_GET_DMA_TAG(self), &ohci_iterate_hw_softc)) { - printf("No mem\n"); - return (ENOMEM); - } - - rid = 0; - sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (!sc->sc_io_res) { - device_printf(self, "Could not map memory\n"); - goto error; - } - sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); - sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); - sc->sc_io_size = rman_get_size(sc->sc_io_res); - - rid = 0; - sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE); - if (sc->sc_irq_res == NULL) { - device_printf(self, "Could not allocate irq\n"); - goto error; - } - - sc->sc_bus.bdev = device_add_child(self, "usbus", -1); - if (!(sc->sc_bus.bdev)) { - device_printf(self, "Could not add USB device\n"); - goto error; - } - device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); - device_set_desc(sc->sc_bus.bdev, OHCI_HC_DEVSTR); - - sprintf(sc->sc_vendor, "MediaTek"); - - err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, - NULL, (driver_intr_t *)ohci_interrupt, sc, &sc->sc_intr_hdl); - if (err) { - device_printf(self, "Could not setup irq, %d\n", err); - sc->sc_intr_hdl = NULL; - goto error; - } - - err = ohci_init(sc); - if (!err) { - err = device_probe_and_attach(sc->sc_bus.bdev); - } - if (err) { - device_printf(self, "USB init failed err=%d\n", err); - goto error; - } - return (0); - -error: - ohci_fdt_detach(self); - return (ENXIO); -} - -static int -ohci_fdt_detach(device_t self) -{ - ohci_softc_t *sc = device_get_softc(self); - int err; - - /* during module unload there are lots of children leftover */ - device_delete_children(self); - - if (sc->sc_irq_res && sc->sc_intr_hdl) { - /* - * only call ohci_detach() after ohci_init() - */ - ohci_detach(sc); - - err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); - if (err) - device_printf(self, "Could not tear down irq, %d\n", - err); - sc->sc_intr_hdl = NULL; - } - if (sc->sc_irq_res) { - bus_release_resource(self, SYS_RES_IRQ, 0, - sc->sc_irq_res); - sc->sc_irq_res = NULL; - } - if (sc->sc_io_res) { - bus_release_resource(self, SYS_RES_MEMORY, 0, - sc->sc_io_res); - sc->sc_io_res = NULL; - } - usb_bus_mem_free_all(&sc->sc_bus, &ohci_iterate_hw_softc); - - return (0); -} - -static device_method_t ohci_fdt_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ohci_fdt_probe), - DEVMETHOD(device_attach, ohci_fdt_attach), - DEVMETHOD(device_detach, ohci_fdt_detach), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - - DEVMETHOD_END -}; - -static driver_t ohci_fdt_driver = { - .name = "ohci", - .methods = ohci_fdt_methods, - .size = sizeof(ohci_softc_t), -}; - -static devclass_t ohci_fdt_devclass; - -DRIVER_MODULE(ohci, simplebus, ohci_fdt_driver, ohci_fdt_devclass, 0, 0); diff --git a/sys/mips/mediatek/mtk_pcie.c b/sys/mips/mediatek/mtk_pcie.c deleted file mode 100644 index 2c94522cffb..00000000000 --- a/sys/mips/mediatek/mtk_pcie.c +++ /dev/null @@ -1,1265 +0,0 @@ -/*- - * Copyright (c) 2016 Stanislav Galabov. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "ofw_bus_if.h" -#include "pcib_if.h" -#include "pic_if.h" - -/* - * Note: We only support PCIe at the moment. - * Most SoCs in the Ralink/Mediatek family that we target actually don't - * support PCI anyway, with the notable exceptions being RT3662/RT3883, which - * support both PCI and PCIe. If there exists a board based on one of them - * which is of interest in the future it shouldn't be too hard to enable PCI - * support for it. - */ - -/* Chip specific function declarations */ -static int mtk_pcie_phy_init(device_t); -static int mtk_pcie_phy_start(device_t); -static int mtk_pcie_phy_stop(device_t); -static int mtk_pcie_phy_mt7621_init(device_t); -static int mtk_pcie_phy_mt7628_init(device_t); -static int mtk_pcie_phy_mt7620_init(device_t); -static int mtk_pcie_phy_rt3883_init(device_t); -static void mtk_pcie_phy_setup_slots(device_t); - -/* Generic declarations */ -struct mtx mtk_pci_mtx; -MTX_SYSINIT(mtk_pci_mtx, &mtk_pci_mtx, "MTK PCIe mutex", MTX_SPIN); - -static int mtk_pci_intr(void *); - -static struct mtk_pci_softc *mt_sc = NULL; - -struct mtk_pci_range { - u_long base; - u_long len; -}; - -#define FDT_RANGES_CELLS ((1 + 2 + 3) * 2) - -static void -mtk_pci_range_dump(struct mtk_pci_range *range) -{ -#ifdef DEBUG - printf("\n"); - printf(" base = 0x%08lx\n", range->base); - printf(" len = 0x%08lx\n", range->len); -#endif -} - -static int -mtk_pci_ranges_decode(phandle_t node, struct mtk_pci_range *io_space, - struct mtk_pci_range *mem_space) -{ - struct mtk_pci_range *pci_space; - pcell_t ranges[FDT_RANGES_CELLS]; - pcell_t addr_cells, size_cells, par_addr_cells; - pcell_t *rangesptr; - pcell_t cell0, cell1, cell2; - int tuple_size, tuples, i, rv, len; - - /* - * Retrieve 'ranges' property. - */ - if ((fdt_addrsize_cells(node, &addr_cells, &size_cells)) != 0) - return (EINVAL); - if (addr_cells != 3 || size_cells != 2) - return (ERANGE); - - par_addr_cells = fdt_parent_addr_cells(node); - if (par_addr_cells != 1) - return (ERANGE); - - len = OF_getproplen(node, "ranges"); - if (len > sizeof(ranges)) - return (ENOMEM); - - if (OF_getprop(node, "ranges", ranges, sizeof(ranges)) <= 0) - return (EINVAL); - - tuple_size = sizeof(pcell_t) * (addr_cells + par_addr_cells + - size_cells); - tuples = len / tuple_size; - - /* - * Initialize the ranges so that we don't have to worry about - * having them all defined in the FDT. In particular, it is - * perfectly fine not to want I/O space on PCI busses. - */ - bzero(io_space, sizeof(*io_space)); - bzero(mem_space, sizeof(*mem_space)); - - rangesptr = &ranges[0]; - for (i = 0; i < tuples; i++) { - cell0 = fdt_data_get((void *)rangesptr, 1); - rangesptr++; - cell1 = fdt_data_get((void *)rangesptr, 1); - rangesptr++; - cell2 = fdt_data_get((void *)rangesptr, 1); - rangesptr++; - - if (cell0 & 0x02000000) { - pci_space = mem_space; - } else if (cell0 & 0x01000000) { - pci_space = io_space; - } else { - rv = ERANGE; - goto out; - } - - pci_space->base = fdt_data_get((void *)rangesptr, - par_addr_cells); - rangesptr += par_addr_cells; - - pci_space->len = fdt_data_get((void *)rangesptr, size_cells); - rangesptr += size_cells; - } - - rv = 0; -out: - return (rv); -} - -static int -mtk_pci_ranges(phandle_t node, struct mtk_pci_range *io_space, - struct mtk_pci_range *mem_space) -{ - int err; - - if ((err = mtk_pci_ranges_decode(node, io_space, mem_space)) != 0) { - return (err); - } - - mtk_pci_range_dump(io_space); - mtk_pci_range_dump(mem_space); - - return (0); -} - -static struct ofw_compat_data compat_data[] = { - { "ralink,rt3883-pci", MTK_SOC_RT3883 }, - { "mediatek,mt7620-pci", MTK_SOC_MT7620A }, - { "mediatek,mt7628-pci", MTK_SOC_MT7628 }, - { "mediatek,mt7621-pci", MTK_SOC_MT7621 }, - { NULL, MTK_SOC_UNKNOWN } -}; - -static int -mtk_pci_probe(device_t dev) -{ - struct mtk_pci_softc *sc = device_get_softc(dev); - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - sc->socid = ofw_bus_search_compatible(dev, compat_data)->ocd_data; - if (sc->socid == MTK_SOC_UNKNOWN) - return (ENXIO); - - device_set_desc(dev, "MTK PCIe Controller"); - - return (0); -} - -static int -mtk_pci_attach(device_t dev) -{ - struct mtk_pci_softc *sc = device_get_softc(dev); - struct mtk_pci_range io_space, mem_space; - phandle_t node; - intptr_t xref; - int i, rid; - - sc->sc_dev = dev; - mt_sc = sc; - sc->addr_mask = 0xffffffff; - - /* Request our memory */ - rid = 0; - sc->pci_res[0] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (sc->pci_res[0] == NULL) { - device_printf(dev, "could not allocate memory resource\n"); - return (ENXIO); - } - - /* See how many interrupts we need */ - if (sc->socid == MTK_SOC_MT7621) - sc->sc_num_irq = 3; - else { - sc->sc_num_irq = 1; - sc->pci_res[2] = sc->pci_res[3] = NULL; - sc->pci_intrhand[1] = sc->pci_intrhand[2] = NULL; - } - - /* Request our interrupts */ - for (i = 1; i <= sc->sc_num_irq ; i++) { - rid = i - 1; - sc->pci_res[i] = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_ACTIVE); - if (sc->pci_res[i] == NULL) { - device_printf(dev, "could not allocate interrupt " - "resource %d\n", rid); - goto cleanup_res; - } - } - - /* Parse our PCI 'ranges' property */ - node = ofw_bus_get_node(dev); - xref = OF_xref_from_node(node); - if (mtk_pci_ranges(node, &io_space, &mem_space)) { - device_printf(dev, "could not retrieve 'ranges' data\n"); - goto cleanup_res; - } - - /* Memory, I/O and IRQ resource limits */ - sc->sc_io_base = io_space.base; - sc->sc_io_size = io_space.len; - sc->sc_mem_base = mem_space.base; - sc->sc_mem_size = mem_space.len; - sc->sc_irq_start = MTK_PCIE0_IRQ; - sc->sc_irq_end = MTK_PCIE2_IRQ; - - /* Init resource managers for memory, I/O and IRQ */ - sc->sc_mem_rman.rm_type = RMAN_ARRAY; - sc->sc_mem_rman.rm_descr = "mtk pcie memory window"; - if (rman_init(&sc->sc_mem_rman) != 0 || - rman_manage_region(&sc->sc_mem_rman, sc->sc_mem_base, - sc->sc_mem_base + sc->sc_mem_size - 1) != 0) { - device_printf(dev, "failed to setup memory rman\n"); - goto cleanup_res; - } - - sc->sc_io_rman.rm_type = RMAN_ARRAY; - sc->sc_io_rman.rm_descr = "mtk pcie io window"; - if (rman_init(&sc->sc_io_rman) != 0 || - rman_manage_region(&sc->sc_io_rman, sc->sc_io_base, - sc->sc_io_base + sc->sc_io_size - 1) != 0) { - device_printf(dev, "failed to setup io rman\n"); - goto cleanup_res; - } - - sc->sc_irq_rman.rm_type = RMAN_ARRAY; - sc->sc_irq_rman.rm_descr = "mtk pcie irqs"; - if (rman_init(&sc->sc_irq_rman) != 0 || - rman_manage_region(&sc->sc_irq_rman, sc->sc_irq_start, - sc->sc_irq_end) != 0) { - device_printf(dev, "failed to setup irq rman\n"); - goto cleanup_res; - } - - /* Do SoC-specific PCIe initialization */ - if (mtk_pcie_phy_init(dev)) { - device_printf(dev, "pcie phy init failed\n"); - goto cleanup_rman; - } - - /* Register ourselves as an interrupt controller */ - if (intr_pic_register(dev, xref) == NULL) { - device_printf(dev, "could not register PIC\n"); - goto cleanup_rman; - } - - /* Set up our interrupt handler */ - for (i = 1; i <= sc->sc_num_irq; i++) { - sc->pci_intrhand[i - 1] = NULL; - if (bus_setup_intr(dev, sc->pci_res[i], INTR_TYPE_MISC, - mtk_pci_intr, NULL, sc, &sc->pci_intrhand[i - 1])) { - device_printf(dev, "could not setup intr handler %d\n", - i); - goto cleanup; - } - } - - /* Attach our PCI child so bus enumeration can start */ - if (device_add_child(dev, "pci", -1) == NULL) { - device_printf(dev, "could not attach pci bus\n"); - goto cleanup; - } - - /* And finally, attach ourselves to the bus */ - if (bus_generic_attach(dev)) { - device_printf(dev, "could not attach to bus\n"); - goto cleanup; - } - - return (0); - -cleanup: -#ifdef notyet - intr_pic_unregister(dev, xref); -#endif - for (i = 1; i <= sc->sc_num_irq; i++) { - if (sc->pci_intrhand[i - 1] != NULL) - bus_teardown_intr(dev, sc->pci_res[i], - sc->pci_intrhand[i - 1]); - } -cleanup_rman: - mtk_pcie_phy_stop(dev); - rman_fini(&sc->sc_irq_rman); - rman_fini(&sc->sc_io_rman); - rman_fini(&sc->sc_mem_rman); -cleanup_res: - mt_sc = NULL; - if (sc->pci_res[0] != NULL) - bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->pci_res[0]); - if (sc->pci_res[1] != NULL) - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->pci_res[1]); - if (sc->pci_res[2] != NULL) - bus_release_resource(dev, SYS_RES_IRQ, 1, sc->pci_res[2]); - if (sc->pci_res[3] != NULL) - bus_release_resource(dev, SYS_RES_IRQ, 2, sc->pci_res[3]); - return (ENXIO); -} - -static int -mtk_pci_read_ivar(device_t dev, device_t child, int which, - uintptr_t *result) -{ - struct mtk_pci_softc *sc = device_get_softc(dev); - - switch (which) { - case PCIB_IVAR_DOMAIN: - *result = device_get_unit(dev); - return (0); - case PCIB_IVAR_BUS: - *result = sc->sc_busno; - return (0); - } - - return (ENOENT); -} - -static int -mtk_pci_write_ivar(device_t dev, device_t child, int which, - uintptr_t result) -{ - struct mtk_pci_softc *sc = device_get_softc(dev); - - switch (which) { - case PCIB_IVAR_BUS: - sc->sc_busno = result; - return (0); - } - - return (ENOENT); -} - -static struct resource * -mtk_pci_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct mtk_pci_softc *sc = device_get_softc(bus); - struct resource *rv; - struct rman *rm; - - switch (type) { - case PCI_RES_BUS: - return pci_domain_alloc_bus(0, child, rid, start, end, count, - flags); - case SYS_RES_IRQ: - rm = &sc->sc_irq_rman; - break; - case SYS_RES_IOPORT: - rm = &sc->sc_io_rman; - break; - case SYS_RES_MEMORY: - rm = &sc->sc_mem_rman; - break; - default: - return (NULL); - } - - rv = rman_reserve_resource(rm, start, end, count, flags, child); - - if (rv == NULL) - return (NULL); - - rman_set_rid(rv, *rid); - - if ((flags & RF_ACTIVE) && type != SYS_RES_IRQ) { - if (bus_activate_resource(child, type, *rid, rv)) { - rman_release_resource(rv); - return (NULL); - } - } - - return (rv); -} - -static int -mtk_pci_release_resource(device_t bus, device_t child, int type, int rid, - struct resource *res) -{ - - if (type == PCI_RES_BUS) - return (pci_domain_release_bus(0, child, rid, res)); - - return (bus_generic_release_resource(bus, child, type, rid, res)); -} - -static int -mtk_pci_adjust_resource(device_t bus, device_t child, int type, - struct resource *res, rman_res_t start, rman_res_t end) -{ - struct mtk_pci_softc *sc = device_get_softc(bus); - struct rman *rm; - - switch (type) { - case PCI_RES_BUS: - return pci_domain_adjust_bus(0, child, res, start, end); - case SYS_RES_IRQ: - rm = &sc->sc_irq_rman; - break; - case SYS_RES_IOPORT: - rm = &sc->sc_io_rman; - break; - case SYS_RES_MEMORY: - rm = &sc->sc_mem_rman; - break; - default: - rm = NULL; - break; - } - - if (rm != NULL) - return (rman_adjust_resource(res, start, end)); - - return (bus_generic_adjust_resource(bus, child, type, res, start, end)); -} - -static inline int -mtk_idx_to_irq(int idx) -{ - - return ((idx == 0) ? MTK_PCIE0_IRQ : - (idx == 1) ? MTK_PCIE1_IRQ : - (idx == 2) ? MTK_PCIE2_IRQ : -1); -} - -static inline int -mtk_irq_to_idx(int irq) -{ - - return ((irq == MTK_PCIE0_IRQ) ? 0 : - (irq == MTK_PCIE1_IRQ) ? 1 : - (irq == MTK_PCIE2_IRQ) ? 2 : -1); -} - -static void -mtk_pci_mask_irq(void *source) -{ - MT_WRITE32(mt_sc, MTK_PCI_PCIENA, - MT_READ32(mt_sc, MTK_PCI_PCIENA) & ~(1<<((int)source))); -} - -static void -mtk_pci_unmask_irq(void *source) -{ - - MT_WRITE32(mt_sc, MTK_PCI_PCIENA, - MT_READ32(mt_sc, MTK_PCI_PCIENA) | (1<<((int)source))); -} - -static int -mtk_pci_setup_intr(device_t bus, device_t child, struct resource *ires, - int flags, driver_filter_t *filt, driver_intr_t *handler, - void *arg, void **cookiep) -{ - struct mtk_pci_softc *sc = device_get_softc(bus); - struct intr_event *event; - int irq, error, irqidx; - - irq = rman_get_start(ires); - - if (irq < sc->sc_irq_start || irq > sc->sc_irq_end) - return (EINVAL); - - irqidx = irq - sc->sc_irq_start; - - event = sc->sc_eventstab[irqidx]; - if (event == NULL) { - error = intr_event_create(&event, (void *)irq, 0, irq, - mtk_pci_mask_irq, mtk_pci_unmask_irq, NULL, NULL, - "pci intr%d:", irq); - - if (error == 0) { - sc->sc_eventstab[irqidx] = event; - } - else { - return (error); - } - } - - intr_event_add_handler(event, device_get_nameunit(child), filt, - handler, arg, intr_priority(flags), flags, cookiep); - - mtk_pci_unmask_irq((void*)irq); - - return (0); -} - -static int -mtk_pci_teardown_intr(device_t dev, device_t child, struct resource *ires, - void *cookie) -{ - struct mtk_pci_softc *sc = device_get_softc(dev); - int irq, result, irqidx; - - irq = rman_get_start(ires); - if (irq < sc->sc_irq_start || irq > sc->sc_irq_end) - return (EINVAL); - - irqidx = irq - sc->sc_irq_start; - if (sc->sc_eventstab[irqidx] == NULL) - panic("Trying to teardown unoccupied IRQ"); - - mtk_pci_mask_irq((void*)irq); - - result = intr_event_remove_handler(cookie); - if (!result) - sc->sc_eventstab[irqidx] = NULL; - - return (result); -} - -static inline uint32_t -mtk_pci_make_addr(int bus, int slot, int func, int reg) -{ - uint32_t addr; - - addr = ((((reg & 0xf00) >> 8) << 24) | (bus << 16) | (slot << 11) | - (func << 8) | (reg & 0xfc) | (1 << 31)); - - return (addr); -} - -static int -mtk_pci_maxslots(device_t dev) -{ - - return (PCI_SLOTMAX); -} - -static inline int -mtk_pci_slot_has_link(device_t dev, int slot) -{ - struct mtk_pci_softc *sc = device_get_softc(dev); - - return !!(sc->pcie_link_status & (1<addr_mask; - MT_WRITE32(sc, MTK_PCI_CFGADDR, addr); - switch (bytes % 4) { - case 0: - data = MT_READ32(sc, MTK_PCI_CFGDATA); - break; - case 1: - data = MT_READ8(sc, MTK_PCI_CFGDATA + (reg & 0x3)); - break; - case 2: - data = MT_READ16(sc, MTK_PCI_CFGDATA + (reg & 0x3)); - break; - default: - panic("%s(): Wrong number of bytes (%d) requested!\n", - __FUNCTION__, bytes % 4); - } - mtx_unlock_spin(&mtk_pci_mtx); - - return (data); -} - -static void -mtk_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func, - u_int reg, uint32_t val, int bytes) -{ - struct mtk_pci_softc *sc = device_get_softc(dev); - uint32_t addr = 0, data = val; - - /* Do not write if slot has no link */ - if (bus == 0 && mtk_pci_slot_has_link(dev, slot) == 0) - return; - - mtx_lock_spin(&mtk_pci_mtx); - addr = mtk_pci_make_addr(bus, slot, func, (reg & ~3)) & sc->addr_mask; - MT_WRITE32(sc, MTK_PCI_CFGADDR, addr); - switch (bytes % 4) { - case 0: - MT_WRITE32(sc, MTK_PCI_CFGDATA, data); - break; - case 1: - MT_WRITE8(sc, MTK_PCI_CFGDATA + (reg & 0x3), data); - break; - case 2: - MT_WRITE16(sc, MTK_PCI_CFGDATA + (reg & 0x3), data); - break; - default: - panic("%s(): Wrong number of bytes (%d) requested!\n", - __FUNCTION__, bytes % 4); - } - mtx_unlock_spin(&mtk_pci_mtx); -} - -static int -mtk_pci_route_interrupt(device_t pcib, device_t device, int pin) -{ - int bus, sl, dev; - - bus = pci_get_bus(device); - sl = pci_get_slot(device); - dev = pci_get_device(device); - - if (bus != 0) - panic("Unexpected bus number %d\n", bus); - - /* PCIe only */ - switch (sl) { - case 0: return MTK_PCIE0_IRQ; - case 1: return MTK_PCIE0_IRQ + 1; - case 2: return MTK_PCIE0_IRQ + 2; - default: return (-1); - } - - return (-1); -} - -static device_method_t mtk_pci_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, mtk_pci_probe), - DEVMETHOD(device_attach, mtk_pci_attach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* Bus interface */ - DEVMETHOD(bus_read_ivar, mtk_pci_read_ivar), - DEVMETHOD(bus_write_ivar, mtk_pci_write_ivar), - DEVMETHOD(bus_alloc_resource, mtk_pci_alloc_resource), - DEVMETHOD(bus_release_resource, mtk_pci_release_resource), - DEVMETHOD(bus_adjust_resource, mtk_pci_adjust_resource), - DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), - DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), - DEVMETHOD(bus_setup_intr, mtk_pci_setup_intr), - DEVMETHOD(bus_teardown_intr, mtk_pci_teardown_intr), - - /* pcib interface */ - DEVMETHOD(pcib_maxslots, mtk_pci_maxslots), - DEVMETHOD(pcib_read_config, mtk_pci_read_config), - DEVMETHOD(pcib_write_config, mtk_pci_write_config), - DEVMETHOD(pcib_route_interrupt, mtk_pci_route_interrupt), - DEVMETHOD(pcib_request_feature, pcib_request_feature_allow), - - /* OFW bus interface */ - DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), - DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), - DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), - DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), - DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), - - DEVMETHOD_END -}; - -static driver_t mtk_pci_driver = { - "pcib", - mtk_pci_methods, - sizeof(struct mtk_pci_softc), -}; - -static devclass_t mtk_pci_devclass; - -DRIVER_MODULE(mtk_pci, simplebus, mtk_pci_driver, mtk_pci_devclass, 0, 0); - -/* Our interrupt handler */ -static int -mtk_pci_intr(void *arg) -{ - struct mtk_pci_softc *sc = arg; - struct intr_event *event; - uint32_t reg, irq, irqidx; - - reg = MT_READ32(sc, MTK_PCI_PCIINT); - - for (irq = sc->sc_irq_start; irq <= sc->sc_irq_end; irq++) { - if (reg & (1u<sc_irq_start; - event = sc->sc_eventstab[irqidx]; - if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) { - if (irq != 0) - printf("Stray PCI IRQ %d\n", irq); - continue; - } - - intr_event_handle(event, NULL); - } - } - - return (FILTER_HANDLED); -} - -/* PCIe SoC-specific initialization */ -static int -mtk_pcie_phy_init(device_t dev) -{ - struct mtk_pci_softc *sc; - - /* Get our softc */ - sc = device_get_softc(dev); - - /* We don't know how many slots we have yet */ - sc->num_slots = 0; - - /* Handle SoC specific PCIe init */ - switch (sc->socid) { - case MTK_SOC_MT7628: /* Fallthrough */ - case MTK_SOC_MT7688: - if (mtk_pcie_phy_mt7628_init(dev)) - return (ENXIO); - break; - case MTK_SOC_MT7621: - if (mtk_pcie_phy_mt7621_init(dev)) - return (ENXIO); - break; - case MTK_SOC_MT7620A: - if (mtk_pcie_phy_mt7620_init(dev)) - return (ENXIO); - break; - case MTK_SOC_RT3662: /* Fallthrough */ - case MTK_SOC_RT3883: - if (mtk_pcie_phy_rt3883_init(dev)) - return (ENXIO); - break; - default: - device_printf(dev, "unsupported device %x\n", sc->socid); - return (ENXIO); - } - - /* - * If we were successful so far go and set up the PCIe slots, so we - * may allocate mem/io/irq resources and enumerate busses later. - */ - mtk_pcie_phy_setup_slots(dev); - - return (0); -} - -static int -mtk_pcie_phy_start(device_t dev) -{ - struct mtk_pci_softc *sc = device_get_softc(dev); - - if (sc->socid == MTK_SOC_MT7621 && - (mtk_sysctl_get(SYSCTL_REVID) & SYSCTL_REVID_MASK) != - SYSCTL_MT7621_REV_E) { - if (fdt_reset_assert_all(dev)) - return (ENXIO); - } else { - if (fdt_reset_deassert_all(dev)) - return (ENXIO); - } - - if (fdt_clock_enable_all(dev)) - return (ENXIO); - - return (0); -} - -static int -mtk_pcie_phy_stop(device_t dev) -{ - struct mtk_pci_softc *sc = device_get_softc(dev); - - if (sc->socid == MTK_SOC_MT7621 && - (mtk_sysctl_get(SYSCTL_REVID) & SYSCTL_REVID_MASK) != - SYSCTL_MT7621_REV_E) { - if (fdt_reset_deassert_all(dev)) - return (ENXIO); - } else { - if (fdt_reset_assert_all(dev)) - return (ENXIO); - } - - if (fdt_clock_disable_all(dev)) - return (ENXIO); - - return (0); -} - -#define mtk_pcie_phy_set(_sc, _reg, _s, _n, _v) \ - MT_WRITE32((_sc), (_reg), ((MT_READ32((_sc), (_reg)) & \ - (~(((1ull << (_n)) - 1) << (_s)))) | ((_v) << (_s)))) - -static void -mtk_pcie_phy_mt7621_bypass_pipe_rst(struct mtk_pci_softc *sc, uint32_t off) -{ - - mtk_pcie_phy_set(sc, off + 0x002c, 12, 1, 1); - mtk_pcie_phy_set(sc, off + 0x002c, 4, 1, 1); - mtk_pcie_phy_set(sc, off + 0x012c, 12, 1, 1); - mtk_pcie_phy_set(sc, off + 0x012c, 4, 1, 1); - mtk_pcie_phy_set(sc, off + 0x102c, 12, 1, 1); - mtk_pcie_phy_set(sc, off + 0x102c, 4, 1, 1); -} - -static void -mtk_pcie_phy_mt7621_setup_ssc(struct mtk_pci_softc *sc, uint32_t off) -{ - uint32_t xtal_sel; - - xtal_sel = mtk_sysctl_get(SYSCTL_SYSCFG) >> 6; - xtal_sel &= 0x7; - - mtk_pcie_phy_set(sc, off + 0x400, 8, 1, 1); - mtk_pcie_phy_set(sc, off + 0x400, 9, 2, 0); - mtk_pcie_phy_set(sc, off + 0x000, 4, 1, 1); - mtk_pcie_phy_set(sc, off + 0x100, 4, 1, 1); - mtk_pcie_phy_set(sc, off + 0x000, 5, 1, 0); - mtk_pcie_phy_set(sc, off + 0x100, 5, 1, 0); - - if (xtal_sel <= 5 && xtal_sel >= 3) { - mtk_pcie_phy_set(sc, off + 0x490, 6, 2, 1); - mtk_pcie_phy_set(sc, off + 0x4a8, 0, 12, 0x1a); - mtk_pcie_phy_set(sc, off + 0x4a8, 16, 12, 0x1a); - } else { - mtk_pcie_phy_set(sc, off + 0x490, 6, 2, 0); - if (xtal_sel >= 6) { - mtk_pcie_phy_set(sc, off + 0x4bc, 4, 2, 0x01); - mtk_pcie_phy_set(sc, off + 0x49c, 0, 31, 0x18000000); - mtk_pcie_phy_set(sc, off + 0x4a4, 0, 16, 0x18d); - mtk_pcie_phy_set(sc, off + 0x4a8, 0, 12, 0x4a); - mtk_pcie_phy_set(sc, off + 0x4a8, 16, 12, 0x4a); - mtk_pcie_phy_set(sc, off + 0x4a8, 0, 12, 0x11); - mtk_pcie_phy_set(sc, off + 0x4a8, 16, 12, 0x11); - } else { - mtk_pcie_phy_set(sc, off + 0x4a8, 0, 12, 0x1a); - mtk_pcie_phy_set(sc, off + 0x4a8, 16, 12, 0x1a); - } - } - - mtk_pcie_phy_set(sc, off + 0x4a0, 5, 1, 1); - mtk_pcie_phy_set(sc, off + 0x490, 22, 2, 2); - mtk_pcie_phy_set(sc, off + 0x490, 18, 4, 6); - mtk_pcie_phy_set(sc, off + 0x490, 12, 4, 2); - mtk_pcie_phy_set(sc, off + 0x490, 8, 4, 1); - mtk_pcie_phy_set(sc, off + 0x4ac, 16, 3, 0); - mtk_pcie_phy_set(sc, off + 0x490, 1, 3, 2); - - if (xtal_sel <= 5 && xtal_sel >= 3) { - mtk_pcie_phy_set(sc, off + 0x414, 6, 2, 1); - mtk_pcie_phy_set(sc, off + 0x414, 5, 1, 1); - } - - mtk_pcie_phy_set(sc, off + 0x414, 28, 2, 1); - mtk_pcie_phy_set(sc, off + 0x040, 17, 4, 7); - mtk_pcie_phy_set(sc, off + 0x040, 16, 1, 1); - mtk_pcie_phy_set(sc, off + 0x140, 17, 4, 7); - mtk_pcie_phy_set(sc, off + 0x140, 16, 1, 1); - - mtk_pcie_phy_set(sc, off + 0x000, 5, 1, 1); - mtk_pcie_phy_set(sc, off + 0x100, 5, 1, 1); - mtk_pcie_phy_set(sc, off + 0x000, 4, 1, 0); - mtk_pcie_phy_set(sc, off + 0x100, 4, 1, 0); -} - -/* XXX: ugly, we need to fix this at some point */ -#define MT7621_GPIO_CTRL0 *((volatile uint32_t *)0xbe000600) -#define MT7621_GPIO_DATA0 *((volatile uint32_t *)0xbe000620) - -#define mtk_gpio_clr_set(_reg, _clr, _set) \ - do { \ - (_reg) = ((_reg) & (_clr)) | (_set); \ - } while (0) - -static int -mtk_pcie_phy_mt7621_init(device_t dev) -{ - struct mtk_pci_softc *sc = device_get_softc(dev); - - /* First off, stop the PHY */ - if (mtk_pcie_phy_stop(dev)) - return (ENXIO); - - /* PCIe resets are GPIO pins */ - mtk_sysctl_clr_set(SYSCTL_GPIOMODE, MT7621_PERST_GPIO_MODE | - MT7621_UARTL3_GPIO_MODE, MT7621_PERST_GPIO | MT7621_UARTL3_GPIO); - - /* Set GPIO pins as outputs */ - mtk_gpio_clr_set(MT7621_GPIO_CTRL0, 0, MT7621_PCIE_RST); - - /* Assert resets to PCIe devices */ - mtk_gpio_clr_set(MT7621_GPIO_DATA0, MT7621_PCIE_RST, 0); - - /* Give everything a chance to sink in */ - DELAY(100000); - - /* Now start the PHY again */ - if (mtk_pcie_phy_start(dev)) - return (ENXIO); - - /* Wait for things to settle */ - DELAY(100000); - - /* Only apply below to REV-E hardware */ - if ((mtk_sysctl_get(SYSCTL_REVID) & SYSCTL_REVID_MASK) == - SYSCTL_MT7621_REV_E) - mtk_pcie_phy_mt7621_bypass_pipe_rst(sc, 0x9000); - - /* Setup PCIe ports 0 and 1 */ - mtk_pcie_phy_mt7621_setup_ssc(sc, 0x9000); - /* Setup PCIe port 2 */ - mtk_pcie_phy_mt7621_setup_ssc(sc, 0xa000); - - /* Deassert resets to PCIe devices */ - mtk_gpio_clr_set(MT7621_GPIO_DATA0, 0, MT7621_PCIE_RST); - - /* Set number of slots supported */ - sc->num_slots = 3; - - /* Give it a chance to sink in */ - DELAY(100000); - - return (0); -} - -static void -mtk_pcie_phy_mt7628_setup(struct mtk_pci_softc *sc, uint32_t off) -{ - uint32_t xtal_sel; - - xtal_sel = mtk_sysctl_get(SYSCTL_SYSCFG) >> 6; - xtal_sel &= 0x1; - - mtk_pcie_phy_set(sc, off + 0x400, 8, 1, 1); - mtk_pcie_phy_set(sc, off + 0x400, 9, 2, 0); - mtk_pcie_phy_set(sc, off + 0x000, 4, 1, 1); - mtk_pcie_phy_set(sc, off + 0x000, 5, 1, 0); - mtk_pcie_phy_set(sc, off + 0x4ac, 16, 3, 3); - - if (xtal_sel == 1) { - mtk_pcie_phy_set(sc, off + 0x4bc, 24, 8, 0x7d); - mtk_pcie_phy_set(sc, off + 0x490, 12, 4, 0x08); - mtk_pcie_phy_set(sc, off + 0x490, 6, 2, 0x01); - mtk_pcie_phy_set(sc, off + 0x4c0, 0, 32, 0x1f400000); - mtk_pcie_phy_set(sc, off + 0x4a4, 0, 16, 0x013d); - mtk_pcie_phy_set(sc, off + 0x4a8, 16, 16, 0x74); - mtk_pcie_phy_set(sc, off + 0x4a8, 0, 16, 0x74); - } else { - mtk_pcie_phy_set(sc, off + 0x4bc, 24, 8, 0x64); - mtk_pcie_phy_set(sc, off + 0x490, 12, 4, 0x0a); - mtk_pcie_phy_set(sc, off + 0x490, 6, 2, 0x00); - mtk_pcie_phy_set(sc, off + 0x4c0, 0, 32, 0x19000000); - mtk_pcie_phy_set(sc, off + 0x4a4, 0, 16, 0x018d); - mtk_pcie_phy_set(sc, off + 0x4a8, 16, 16, 0x4a); - mtk_pcie_phy_set(sc, off + 0x4a8, 0, 16, 0x4a); - } - - mtk_pcie_phy_set(sc, off + 0x498, 0, 8, 5); - mtk_pcie_phy_set(sc, off + 0x000, 5, 1, 1); - mtk_pcie_phy_set(sc, off + 0x000, 4, 1, 0); -} - -static int -mtk_pcie_phy_mt7628_init(device_t dev) -{ - struct mtk_pci_softc *sc = device_get_softc(dev); - - /* Set PCIe reset to normal mode */ - mtk_sysctl_clr_set(SYSCTL_GPIOMODE, MT7628_PERST_GPIO_MODE, - MT7628_PERST); - - /* Start the PHY */ - if (mtk_pcie_phy_start(dev)) - return (ENXIO); - - /* Give it a chance to sink in */ - DELAY(100000); - - /* Setup the PHY */ - mtk_pcie_phy_mt7628_setup(sc, 0x9000); - - /* Deassert PCIe device reset */ - MT_CLR_SET32(sc, MTK_PCI_PCICFG, MTK_PCI_RESET, 0); - - /* Set number of slots supported */ - sc->num_slots = 1; - - return (0); -} - -static int -mtk_pcie_phy_mt7620_wait_busy(struct mtk_pci_softc *sc) -{ - uint32_t reg_value, retry; - - reg_value = retry = 0; - - while (retry++ < MT7620_MAX_RETRIES) { - reg_value = MT_READ32(sc, MT7620_PCIE_PHY_CFG); - if (reg_value & PHY_BUSY) - DELAY(100000); - else - break; - } - - if (retry >= MT7620_MAX_RETRIES) - return (ENXIO); - - return (0); -} - -static int -mtk_pcie_phy_mt7620_set(struct mtk_pci_softc *sc, uint32_t reg, - uint32_t val) -{ - uint32_t reg_val; - - if (mtk_pcie_phy_mt7620_wait_busy(sc)) - return (ENXIO); - - reg_val = PHY_MODE_WRITE | ((reg & 0xff) << PHY_ADDR_OFFSET) | - (val & 0xff); - MT_WRITE32(sc, MT7620_PCIE_PHY_CFG, reg_val); - DELAY(1000); - - if (mtk_pcie_phy_mt7620_wait_busy(sc)) - return (ENXIO); - - return (0); -} - -static int -mtk_pcie_phy_mt7620_init(device_t dev) -{ - struct mtk_pci_softc *sc = device_get_softc(dev); - - /* - * The below sets the PCIe PHY to bypass the PCIe DLL and enables - * "elastic buffer control", whatever that may be... - */ - if (mtk_pcie_phy_mt7620_set(sc, 0x00, 0x80) || - mtk_pcie_phy_mt7620_set(sc, 0x01, 0x04) || - mtk_pcie_phy_mt7620_set(sc, 0x68, 0x84)) - return (ENXIO); - - /* Stop PCIe */ - if (mtk_pcie_phy_stop(dev)) - return (ENXIO); - - /* Restore PPLL to a sane state before going on */ - mtk_sysctl_clr_set(MT7620_PPLL_DRV, LC_CKDRVPD, PDRV_SW_SET); - - /* No PCIe on the MT7620N */ - if (!(mtk_sysctl_get(SYSCTL_REVID) & MT7620_PKG_BGA)) { - device_printf(dev, "PCIe disabled for MT7620N\n"); - mtk_sysctl_clr_set(MT7620_PPLL_CFG0, 0, PPLL_SW_SET); - mtk_sysctl_clr_set(MT7620_PPLL_CFG1, 0, PPLL_PD); - return (ENXIO); - } - - /* PCIe device reset pin is in normal mode */ - mtk_sysctl_clr_set(SYSCTL_GPIOMODE, MT7620_PERST_GPIO_MODE, - MT7620_PERST); - - /* Enable PCIe now */ - if (mtk_pcie_phy_start(dev)) - return (ENXIO); - - /* Give it a chance to sink in */ - DELAY(100000); - - /* If PLL is not locked - bail */ - if (!(mtk_sysctl_get(MT7620_PPLL_CFG1) & PPLL_LOCKED)) { - device_printf(dev, "no PPLL not lock\n"); - mtk_pcie_phy_stop(dev); - return (ENXIO); - } - - /* Configure PCIe PLL */ - mtk_sysctl_clr_set(MT7620_PPLL_DRV, LC_CKDRVOHZ | LC_CKDRVHZ, - LC_CKDRVPD | PDRV_SW_SET); - - /* and give it a chance to settle */ - DELAY(100000); - - /* Deassert PCIe device reset */ - MT_CLR_SET32(sc, MTK_PCI_PCICFG, MTK_PCI_RESET, 0); - - /* MT7620 supports one PCIe slot */ - sc->num_slots = 1; - - return (0); -} - -static int -mtk_pcie_phy_rt3883_init(device_t dev) -{ - struct mtk_pci_softc *sc = device_get_softc(dev); - - /* Enable PCI host mode and PCIe RC mode */ - mtk_sysctl_clr_set(SYSCTL_SYSCFG1, 0, RT3883_PCI_HOST_MODE | - RT3883_PCIE_RC_MODE); - - /* Enable PCIe PHY */ - if (mtk_pcie_phy_start(dev)) - return (ENXIO); - - /* Disable PCI, we only support PCIe for now */ - mtk_sysctl_clr_set(SYSCTL_RSTCTRL, 0, RT3883_PCI_RST); - mtk_sysctl_clr_set(SYSCTL_CLKCFG1, RT3883_PCI_CLK, 0); - - /* Give things a chance to sink in */ - DELAY(500000); - - /* Set PCIe port number to 0 and lift PCIe reset */ - MT_WRITE32(sc, MTK_PCI_PCICFG, 0); - - /* Configure PCI Arbiter */ - MT_WRITE32(sc, MTK_PCI_ARBCTL, 0x79); - - /* We have a single PCIe slot */ - sc->num_slots = 1; - - return (0); -} - -static void -mtk_pcie_phy_setup_slots(device_t dev) -{ - struct mtk_pci_softc *sc = device_get_softc(dev); - uint32_t bar0_val, val; - int i; - - /* Disable all PCIe interrupts */ - MT_WRITE32(sc, MTK_PCI_PCIENA, 0); - - /* Default bar0_val is 64M, enabled */ - bar0_val = 0x03FF0001; - - /* But we override it to 2G, enabled for some SoCs */ - if (sc->socid == MTK_SOC_MT7620A || sc->socid == MTK_SOC_MT7628 || - sc->socid == MTK_SOC_MT7688 || sc->socid == MTK_SOC_MT7621) - bar0_val = 0x7FFF0001; - - /* We still don't know which slots have linked up */ - sc->pcie_link_status = 0; - - /* XXX: I am not sure if this delay is really necessary */ - DELAY(500000); - - /* - * See which slots have links and mark them. - * Set up all slots' BARs and make them look like PCIe bridges. - */ - for (i = 0; i < sc->num_slots; i++) { - /* If slot has link - mark it */ - if (MT_READ32(sc, MTK_PCIE_STATUS(i)) & 1) - sc->pcie_link_status |= (1<pci_res[0], (off), (val)) -#define MT_WRITE16(sc, off, val) \ - bus_write_2((sc)->pci_res[0], (off), (val)) -#define MT_WRITE8(sc, off, val) \ - bus_write_1((sc)->pci_res[0], (off), (val)) -#define MT_READ32(sc, off) \ - bus_read_4((sc)->pci_res[0], (off)) -#define MT_READ16(sc, off) \ - bus_read_2((sc)->pci_res[0], (off)) -#define MT_READ8(sc, off) \ - bus_read_1((sc)->pci_res[0], (off)) - -#define MT_CLR_SET32(sc, off, clr, set) \ - MT_WRITE32((sc), (off), ((MT_READ32((sc), (off)) & ~(clr)) | (off))) - -#endif /* __MTK_PCIE_H__ */ diff --git a/sys/mips/mediatek/mtk_pinctrl.c b/sys/mips/mediatek/mtk_pinctrl.c deleted file mode 100644 index dac9418618c..00000000000 --- a/sys/mips/mediatek/mtk_pinctrl.c +++ /dev/null @@ -1,238 +0,0 @@ -/*- - * Copyright (c) 2016 Stanislav Galabov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "fdt_pinctrl_if.h" - -static const struct ofw_compat_data compat_data[] = { - { "ralink,rt2880-pinmux", 1 }, - - /* Sentinel */ - { NULL, 0 } -}; - -static int -mtk_pinctrl_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) - return (ENXIO); - - device_set_desc(dev, "MTK Pin Controller"); - - return (0); -} - -static int -mtk_pinctrl_attach(device_t dev) -{ - - if (device_get_unit(dev) != 0) { - device_printf(dev, "Only one pin control allowed\n"); - return (ENXIO); - } - - if (bootverbose) - device_printf(dev, "GPIO mode start: 0x%08x\n", - mtk_sysctl_get(SYSCTL_GPIOMODE)); - - fdt_pinctrl_register(dev, NULL); - fdt_pinctrl_configure_tree(dev); - - if (bootverbose) - device_printf(dev, "GPIO mode end : 0x%08x\n", - mtk_sysctl_get(SYSCTL_GPIOMODE)); - - return (0); -} - -static int -mtk_pinctrl_process_entry(device_t dev, struct mtk_pin_group *table, - const char *group, char *func) -{ - uint32_t val; - int found = 0, i, j; - - for (i = 0; table[i].name != NULL; i++) { - if (strcmp(table[i].name, group) == 0) { - found = 1; - break; - } - } - - if (!found) - return (ENOENT); - - for (j = 0; j < table[i].funcnum; j++) { - if (strcmp(table[i].functions[j].name, func) == 0) { - val = mtk_sysctl_get(table[i].sysc_reg); - val &= ~(table[i].mask << table[i].offset); - val |= (table[i].functions[j].value << table[i].offset); - mtk_sysctl_set(table[i].sysc_reg, val); - return (0); - } - } - - return (ENOENT); -} - -static int -mtk_pinctrl_process_node(device_t dev, struct mtk_pin_group *table, - phandle_t node) -{ - const char **group_list = NULL; - char *pin_function = NULL; - int ret, num_groups, i; - - ret = 0; - - num_groups = ofw_bus_string_list_to_array(node, "ralink,group", - &group_list); - - if (num_groups <= 0) - return (ENOENT); - - if (OF_getprop_alloc_multi(node, "ralink,function", sizeof(*pin_function), - (void **)&pin_function) == -1) { - ret = ENOENT; - goto out; - } - - for (i = 0; i < num_groups; i++) { - if ((ret = mtk_pinctrl_process_entry(dev, table, group_list[i], - pin_function)) != 0) - goto out; - } - -out: - OF_prop_free(group_list); - OF_prop_free(pin_function); - return (ret); -} - -static int -mtk_pinctrl_configure(device_t dev, phandle_t cfgxref) -{ - struct mtk_pin_group *pintable; - phandle_t node, child; - uint32_t socid; - int ret; - - node = OF_node_from_xref(cfgxref); - ret = 0; - - /* Now, get the system type, so we can get the proper GPIO mode array */ - socid = mtk_soc_get_socid(); - - switch (socid) { - case MTK_SOC_RT2880: - pintable = rt2880_pintable; - break; - case MTK_SOC_RT3050: /* fallthrough */ - case MTK_SOC_RT3052: - case MTK_SOC_RT3350: - pintable = rt3050_pintable; - break; - case MTK_SOC_RT3352: - pintable = rt3352_pintable; - break; - case MTK_SOC_RT3662: /* fallthrough */ - case MTK_SOC_RT3883: - pintable = rt3883_pintable; - break; - case MTK_SOC_RT5350: - pintable = rt5350_pintable; - break; - case MTK_SOC_MT7620A: /* fallthrough */ - case MTK_SOC_MT7620N: - pintable = mt7620_pintable; - break; - case MTK_SOC_MT7628: /* fallthrough */ - case MTK_SOC_MT7688: - pintable = mt7628_pintable; - break; - case MTK_SOC_MT7621: - pintable = mt7621_pintable; - break; - default: - ret = ENOENT; - goto out; - } - - /* - * OpenWRT dts files have single child within the pinctrl nodes, which - * contains the 'ralink,group' and 'ralink,function' properties. - */ - for (child = OF_child(node); child != 0 && child != -1; - child = OF_peer(child)) { - if ((ret = mtk_pinctrl_process_node(dev, pintable, child)) != 0) - return (ret); - } - -out: - return (ret); -} - -static device_method_t mtk_pinctrl_methods[] = { - DEVMETHOD(device_probe, mtk_pinctrl_probe), - DEVMETHOD(device_attach, mtk_pinctrl_attach), - - /* fdt_pinctrl interface */ - DEVMETHOD(fdt_pinctrl_configure, mtk_pinctrl_configure), - - DEVMETHOD_END -}; - -static driver_t mtk_pinctrl_driver = { - "pinctrl", - mtk_pinctrl_methods, - 0, -}; -static devclass_t mtk_pinctrl_devclass; - -EARLY_DRIVER_MODULE(mtk_pinctrl, simplebus, mtk_pinctrl_driver, - mtk_pinctrl_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_EARLY); - -MODULE_DEPEND(mtk_pinctrl, mtk_sysctl, 1, 1, 1); diff --git a/sys/mips/mediatek/mtk_pinctrl.h b/sys/mips/mediatek/mtk_pinctrl.h deleted file mode 100644 index 6bbc7732917..00000000000 --- a/sys/mips/mediatek/mtk_pinctrl.h +++ /dev/null @@ -1,371 +0,0 @@ -/*- - * Copyright (c) 2016 Stanislav Galabov. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MTK_PINCTRL_H_ -#define _MTK_PINCTRL_H_ - -struct mtk_pin_function { - const char *name; - uint32_t value; -}; - -struct mtk_pin_group { - const char *name; - uint32_t sysc_reg; - uint32_t offset; - uint32_t mask; - struct mtk_pin_function *functions; - uint32_t funcnum; -}; - -#define FUNC(_name, _value) \ - { .name = (_name), .value = (_value) } - -#define GROUP(_name, _reg, _off, _mask, _funcs) \ - { .name = (_name), .sysc_reg = (_reg), .offset = (_off), \ - .mask = (_mask), .functions = (_funcs), .funcnum = nitems(_funcs) } -#define GROUP_END { NULL, 0, 0, 0, NULL, 0 } - -#define DECL_FUNC(_name) \ - static struct mtk_pin_function _name[] -#define DECL_TABLE(_name) \ - static struct mtk_pin_group _name[] - -/* Pin function declarations */ -DECL_FUNC(i2c_func) = { - FUNC("i2c", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(spi_func) = { - FUNC("spi", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(uartf_func) = { - FUNC("uartf", 0), FUNC("pcm uartf", 1), FUNC("pcm i2s", 2), - FUNC("i2s uartf", 3), FUNC("pcm gpio", 4), FUNC("gpio uartf", 5), - FUNC("gpio i2s", 6), FUNC("gpio", 7) -}; - -DECL_FUNC(wdt_func) = { - FUNC("wdt rst", 0), FUNC("wdt", 0), FUNC("wdt refclk", 1), - FUNC("gpio", 2) -}; - -DECL_FUNC(uartlite_func) = { - FUNC("uartlite", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(jtag_func) = { - FUNC("jtag", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(mdio_func) = { - FUNC("mdio", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(led_func) = { - FUNC("led", 0), FUNC("gpio", 1), FUNC("bt", 2) -}; - -DECL_FUNC(cs1_func) = { - FUNC("spi_cs1", 0), FUNC("wdt_cs1", 1), FUNC("gpio", 2) -}; - -DECL_FUNC(sdram_func) = { - FUNC("sdram", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(rgmii_func) = { - FUNC("rgmii", 0), FUNC("rgmii1", 0), FUNC("rgmii2", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(lna_func) = { - FUNC("lna", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(pa_func) = { - FUNC("pa", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(gex_func) = { - FUNC("ge1", 0), FUNC("ge2", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(rt2880_uartf_func) = { - FUNC("uartf", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(rt2880_pci_func) = { - FUNC("pci", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(rt3883_pci_func) = { - FUNC("pci-dev", 0), FUNC("pci-host2", 1), FUNC("pci-host1", 2), - FUNC("pci-fnc", 3), FUNC("gpio", 7) -}; - -DECL_FUNC(mt7620_pcie_func) = { - FUNC("pcie rst", 0), FUNC("pcie refclk", 1), FUNC("gpio", 2) -}; - -DECL_FUNC(lna_a_func) = { - FUNC("lna a", 0), FUNC("lna g", 0), FUNC("codec", 2), FUNC("gpio", 3) -}; - -DECL_FUNC(nd_sd_func) = { - FUNC("nand", 0), FUNC("sd", 1), FUNC("gpio", 2) -}; - -DECL_FUNC(mt7620_mdio_func) = { - FUNC("mdio", 0), FUNC("mdio refclk", 1), FUNC("gpio", 2) -}; - -DECL_FUNC(spi_refclk_func) = { - FUNC("spi refclk", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(wled_func) = { - FUNC("wled", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(ephy_func) = { - FUNC("ephy", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(mt7628_gpio_func) = { - FUNC("gpio", 0), FUNC("gpio", 1), FUNC("refclk", 2), FUNC("pcie", 3) -}; - -DECL_FUNC(mt7628_spis_func) = { - FUNC("spis", 0), FUNC("gpio", 1), FUNC("utif", 2), FUNC("pwm", 3) -}; - -DECL_FUNC(mt7628_spi_cs1_func) = { - FUNC("spi", 0), FUNC("gpio", 1), FUNC("refclk", 2), FUNC("-", 3) -}; - -DECL_FUNC(mt7628_i2s_func) = { - FUNC("i2s", 0), FUNC("gpio", 1), FUNC("pcm", 2), FUNC("anttenna", 3) -}; - -DECL_FUNC(mt7628_uart0_func) = { - FUNC("uart0", 0), FUNC("gpio", 1), FUNC("-", 2), FUNC("-", 3) -}; - -DECL_FUNC(mt7628_sd_func) = { - FUNC("sdxc", 0), FUNC("gpio", 1), FUNC("utif", 2), FUNC("jtag", 3) -}; - -DECL_FUNC(mt7628_perst_func) = { - FUNC("perst", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(mt7628_refclk_func) = { - FUNC("refclk", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(mt7628_i2c_func) = { - FUNC("i2c", 0), FUNC("gpio", 1), FUNC("debug", 2), FUNC("-", 3) -}; - -DECL_FUNC(mt7628_uart1_func) = { - FUNC("uart1", 0), FUNC("gpio", 1), FUNC("pwm", 2), FUNC("sw r", 3) -}; - -DECL_FUNC(mt7628_uart2_func) = { - FUNC("uart2", 0), FUNC("gpio", 1), FUNC("pwm", 2), FUNC("sdxc", 3) -}; - -DECL_FUNC(mt7628_pwm0_func) = { - FUNC("pwm", 0), FUNC("gpio", 1), FUNC("utif", 2), FUNC("sdxc", 3) -}; - -DECL_FUNC(mt7621_uart1_func) = { - FUNC("uart1", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(mt7621_i2c_func) = { - FUNC("i2c", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(mt7621_uart3_func) = { - FUNC("uart3", 0), FUNC("gpio", 1), FUNC("i2s", 2), FUNC("spdif3", 3) -}; - -DECL_FUNC(mt7621_uart2_func) = { - FUNC("uart2", 0), FUNC("gpio", 1), FUNC("pcm", 2), FUNC("spdif2", 3) -}; - -DECL_FUNC(mt7621_jtag_func) = { - FUNC("jtag", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(mt7621_wdt_func) = { - FUNC("wdt rst", 0), FUNC("gpio", 1), FUNC("wdt refclk", 2), FUNC("-", 3) -}; - -DECL_FUNC(mt7621_pcie_func) = { - FUNC("pcie rst", 0), FUNC("gpio", 1), FUNC("pcie refclk", 2), - FUNC("-", 3) -}; - -DECL_FUNC(mt7621_mdio_func) = { - FUNC("mdio", 0), FUNC("gpio", 1), FUNC("-", 2), FUNC("-", 3) -}; - -DECL_FUNC(mt7621_rgmii_func) = { - FUNC("rgmii1", 0), FUNC("rgmii2", 0), FUNC("gpio", 1) -}; - -DECL_FUNC(mt7621_spi_func) = { - FUNC("spi", 0), FUNC("gpio", 1), FUNC("nand1", 2), FUNC("-", 3) -}; - -DECL_FUNC(mt7621_sdhci_func) = { - FUNC("sdhci", 0), FUNC("gpio", 1), FUNC("nand1", 2), FUNC("-", 3) -}; - -/* Pin groups declarations */ -DECL_TABLE(mt7628_pintable) = { - GROUP("gpio", SYSCTL_GPIOMODE, 0, 3, mt7628_gpio_func), - GROUP("spis", SYSCTL_GPIOMODE, 2, 3, mt7628_spis_func), - GROUP("spi cs1", SYSCTL_GPIOMODE, 4, 3, mt7628_spi_cs1_func), - GROUP("i2s", SYSCTL_GPIOMODE, 6, 3, mt7628_i2s_func), - GROUP("uart0", SYSCTL_GPIOMODE, 8, 3, mt7628_uart0_func), - GROUP("sdmode", SYSCTL_GPIOMODE, 10, 3, mt7628_sd_func), - GROUP("spi", SYSCTL_GPIOMODE, 12, 1, spi_func), - GROUP("wdt", SYSCTL_GPIOMODE, 14, 1, wdt_func), - GROUP("perst", SYSCTL_GPIOMODE, 16, 1, mt7628_perst_func), - GROUP("refclk", SYSCTL_GPIOMODE, 18, 1, mt7628_refclk_func), - GROUP("i2c", SYSCTL_GPIOMODE, 20, 3, mt7628_i2c_func), - GROUP("uart1", SYSCTL_GPIOMODE, 24, 3, mt7628_uart1_func), - GROUP("uart2", SYSCTL_GPIOMODE, 26, 3, mt7628_uart2_func), - GROUP("pwm0", SYSCTL_GPIOMODE, 28, 3, mt7628_pwm0_func), - GROUP("pwm1", SYSCTL_GPIOMODE, 30, 3, mt7628_pwm0_func), - GROUP_END -}; - -DECL_TABLE(mt7621_pintable) = { - GROUP("uart1", SYSCTL_GPIOMODE, 1, 1, mt7621_uart1_func), - GROUP("i2c", SYSCTL_GPIOMODE, 2, 1, mt7621_i2c_func), - GROUP("uart3", SYSCTL_GPIOMODE, 3, 3, mt7621_uart3_func), - GROUP("uart2", SYSCTL_GPIOMODE, 5, 3, mt7621_uart2_func), - GROUP("jtag", SYSCTL_GPIOMODE, 7, 1, mt7621_jtag_func), - GROUP("wdt", SYSCTL_GPIOMODE, 8, 3, mt7621_wdt_func), - GROUP("pcie", SYSCTL_GPIOMODE, 10, 3, mt7621_pcie_func), - GROUP("mdio", SYSCTL_GPIOMODE, 12, 3, mt7621_mdio_func), - GROUP("rgmii2", SYSCTL_GPIOMODE, 15, 1, mt7621_rgmii_func), - GROUP("spi", SYSCTL_GPIOMODE, 16, 3, mt7621_spi_func), - GROUP("sdhci", SYSCTL_GPIOMODE, 18, 3, mt7621_sdhci_func), - GROUP("rgmii1", SYSCTL_GPIOMODE, 14, 1, mt7621_rgmii_func), - GROUP_END -}; - -DECL_TABLE(mt7620_pintable) = { - GROUP("i2c", SYSCTL_GPIOMODE, 0, 1, i2c_func), - GROUP("uartf", SYSCTL_GPIOMODE, 2, 7, uartf_func), - GROUP("uartlite", SYSCTL_GPIOMODE, 5, 1, uartlite_func), - GROUP("mdio", SYSCTL_GPIOMODE, 7, 3, mt7620_mdio_func), - GROUP("rgmii1", SYSCTL_GPIOMODE, 9, 1, rgmii_func), - GROUP("rgmii2", SYSCTL_GPIOMODE, 10, 1, rgmii_func), - GROUP("spi", SYSCTL_GPIOMODE, 11, 1, spi_func), - GROUP("spi refclk", SYSCTL_GPIOMODE, 12, 1, spi_refclk_func), - GROUP("wled", SYSCTL_GPIOMODE, 13, 1, wled_func), - GROUP("ephy", SYSCTL_GPIOMODE, 15, 1, ephy_func), - GROUP("pcie", SYSCTL_GPIOMODE, 16, 3, mt7620_pcie_func), - GROUP("nd_sd", SYSCTL_GPIOMODE, 18, 3, nd_sd_func), - GROUP("pa", SYSCTL_GPIOMODE, 20, 1, pa_func), - GROUP("wdt", SYSCTL_GPIOMODE, 21, 3, wdt_func), - GROUP_END -}; - -DECL_TABLE(rt2880_pintable) = { - GROUP("i2c", SYSCTL_GPIOMODE, 0, 1, i2c_func), - GROUP("uartf", SYSCTL_GPIOMODE, 1, 1, rt2880_uartf_func), - GROUP("spi", SYSCTL_GPIOMODE, 2, 1, spi_func), - GROUP("uartlite", SYSCTL_GPIOMODE, 3, 1, uartlite_func), - GROUP("jtag", SYSCTL_GPIOMODE, 4, 1, jtag_func), - GROUP("mdio", SYSCTL_GPIOMODE, 5, 1, mdio_func), - GROUP("sdram", SYSCTL_GPIOMODE, 6, 1, sdram_func), - GROUP("pci", SYSCTL_GPIOMODE, 7, 1, rt2880_pci_func), - GROUP_END -}; - -DECL_TABLE(rt3050_pintable) = { - GROUP("i2c", SYSCTL_GPIOMODE, 0, 1, i2c_func), - GROUP("spi", SYSCTL_GPIOMODE, 1, 1, spi_func), - GROUP("uartf", SYSCTL_GPIOMODE, 2, 7, uartf_func), - GROUP("uartlite", SYSCTL_GPIOMODE, 5, 1, uartlite_func), - GROUP("jtag", SYSCTL_GPIOMODE, 6, 1, jtag_func), - GROUP("mdio", SYSCTL_GPIOMODE, 7, 1, mdio_func), - GROUP("sdram", SYSCTL_GPIOMODE, 8, 1, sdram_func), - GROUP("rgmii", SYSCTL_GPIOMODE, 9, 1, rgmii_func), - GROUP_END -}; - -DECL_TABLE(rt3352_pintable) = { - GROUP("i2c", SYSCTL_GPIOMODE, 0, 1, i2c_func), - GROUP("spi", SYSCTL_GPIOMODE, 1, 1, i2c_func), - GROUP("uartf", SYSCTL_GPIOMODE, 2, 7, uartf_func), - GROUP("uartlite", SYSCTL_GPIOMODE, 5, 1, uartlite_func), - GROUP("jtag", SYSCTL_GPIOMODE, 6, 1, jtag_func), - GROUP("mdio", SYSCTL_GPIOMODE, 7, 1, mdio_func), - GROUP("rgmii", SYSCTL_GPIOMODE, 9, 1, rgmii_func), - GROUP("led", SYSCTL_GPIOMODE, 14, 3, led_func), - GROUP("lna", SYSCTL_GPIOMODE, 18, 1, lna_func), - GROUP("pa", SYSCTL_GPIOMODE, 20, 1, pa_func), - GROUP("spi_cs1", SYSCTL_GPIOMODE, 21, 3, cs1_func), - GROUP_END -}; - -DECL_TABLE(rt3883_pintable) = { - GROUP("i2c", SYSCTL_GPIOMODE, 0, 1, i2c_func), - GROUP("spi", SYSCTL_GPIOMODE, 1, 1, spi_func), - GROUP("uartf", SYSCTL_GPIOMODE, 2, 7, uartf_func), - GROUP("uartlite", SYSCTL_GPIOMODE, 5, 1, uartlite_func), - GROUP("jtag", SYSCTL_GPIOMODE, 6, 1, jtag_func), - GROUP("mdio", SYSCTL_GPIOMODE, 7, 1, mdio_func), - GROUP("lna a", SYSCTL_GPIOMODE, 16, 3, lna_a_func), - GROUP("lna g", SYSCTL_GPIOMODE, 18, 3, lna_a_func), - GROUP("pci", SYSCTL_GPIOMODE, 11, 7, rt3883_pci_func), - GROUP("ge1", SYSCTL_GPIOMODE, 9, 1, gex_func), - GROUP("ge2", SYSCTL_GPIOMODE, 10, 1, gex_func), - GROUP_END -}; - -DECL_TABLE(rt5350_pintable) = { - GROUP("i2c", SYSCTL_GPIOMODE, 0, 1, i2c_func), - GROUP("spi", SYSCTL_GPIOMODE, 1, 1, spi_func), - GROUP("uartf", SYSCTL_GPIOMODE, 2, 7, uartf_func), - GROUP("uartlite", SYSCTL_GPIOMODE, 5, 1, uartlite_func), - GROUP("jtag", SYSCTL_GPIOMODE, 6, 1, jtag_func), - GROUP("led", SYSCTL_GPIOMODE, 14, 3, led_func), - GROUP("spi_cs1", SYSCTL_GPIOMODE, 21, 3, cs1_func), - GROUP_END -}; - -#endif /* _MTK_PINCTRL_H_ */ diff --git a/sys/mips/mediatek/mtk_reset.c b/sys/mips/mediatek/mtk_reset.c deleted file mode 100644 index 7dd288b5794..00000000000 --- a/sys/mips/mediatek/mtk_reset.c +++ /dev/null @@ -1,137 +0,0 @@ -/*- - * Copyright (c) 2016 Stanislav Galabov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include - -#include "fdt_reset_if.h" - -static const struct ofw_compat_data compat_data[] = { - { "ralink,rt2880-reset", 1 }, - - /* Sentinel */ - { NULL, 0 } -}; - -static int -mtk_reset_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) - return (ENXIO); - - device_set_desc(dev, "MTK Reset Controller"); - - return (0); -} - -static int -mtk_reset_attach(device_t dev) -{ - - if (device_get_unit(dev) != 0) { - device_printf(dev, "Only one reset control allowed\n"); - return (ENXIO); - } - - fdt_reset_register_provider(dev); - - return (0); -} - -#define RESET_ASSERT 1 -#define RESET_DEASSERT 0 - -static int -mtk_reset_set(device_t dev, int index, int value) -{ - uint32_t mask; - - /* index 0 is SoC reset, indices 1 - 31 are valid peripheral resets */ - if (index < 1 || index > 31) - return (EINVAL); - - mask = (1u << index); - - if (value == RESET_ASSERT) - mtk_sysctl_clr_set(SYSCTL_RSTCTRL, 0, mask); - else - mtk_sysctl_clr_set(SYSCTL_RSTCTRL, mask, 0); - - return (0); -} - -static int -mtk_reset_assert(device_t dev, int index) -{ - - return mtk_reset_set(dev, index, RESET_ASSERT); -} - -static int -mtk_reset_deassert(device_t dev, int index) -{ - - return mtk_reset_set(dev, index, RESET_DEASSERT); -} - -static device_method_t mtk_reset_methods[] = { - DEVMETHOD(device_probe, mtk_reset_probe), - DEVMETHOD(device_attach, mtk_reset_attach), - - /* fdt_reset interface */ - DEVMETHOD(fdt_reset_assert, mtk_reset_assert), - DEVMETHOD(fdt_reset_deassert, mtk_reset_deassert), - - DEVMETHOD_END -}; - -static driver_t mtk_reset_driver = { - "rstctrl", - mtk_reset_methods, - 0, -}; -static devclass_t mtk_reset_devclass; - -EARLY_DRIVER_MODULE(mtk_reset, simplebus, mtk_reset_driver, mtk_reset_devclass, - 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_EARLY); - -MODULE_DEPEND(mtk_reset, mtk_sysctl, 1, 1, 1); diff --git a/sys/mips/mediatek/mtk_soc.c b/sys/mips/mediatek/mtk_soc.c deleted file mode 100644 index cfb200c150a..00000000000 --- a/sys/mips/mediatek/mtk_soc.c +++ /dev/null @@ -1,506 +0,0 @@ -/*- - * Copyright (c) 2016 Stanislav Galabov. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include -#include - -#include -#include -#include - -static uint32_t mtk_soc_socid = MTK_SOC_UNKNOWN; -static uint32_t mtk_soc_uartclk = 0; -static uint32_t mtk_soc_cpuclk = MTK_CPU_CLK_880MHZ; -static uint32_t mtk_soc_timerclk = MTK_CPU_CLK_880MHZ / 2; - -static uint32_t mtk_soc_chipid0_3 = MTK_UNKNOWN_CHIPID0_3; -static uint32_t mtk_soc_chipid4_7 = MTK_UNKNOWN_CHIPID4_7; - -static const struct ofw_compat_data compat_data[] = { - { "ralink,rt2880-soc", MTK_SOC_RT2880 }, - { "ralink,rt3050-soc", MTK_SOC_RT3050 }, - { "ralink,rt3052-soc", MTK_SOC_RT3052 }, - { "ralink,rt3350-soc", MTK_SOC_RT3350 }, - { "ralink,rt3352-soc", MTK_SOC_RT3352 }, - { "ralink,rt3662-soc", MTK_SOC_RT3662 }, - { "ralink,rt3883-soc", MTK_SOC_RT3883 }, - { "ralink,rt5350-soc", MTK_SOC_RT5350 }, - { "ralink,mtk7620a-soc", MTK_SOC_MT7620A }, - { "ralink,mt7620a-soc", MTK_SOC_MT7620A }, - { "ralink,mtk7620n-soc", MTK_SOC_MT7620N }, - { "ralink,mt7620n-soc", MTK_SOC_MT7620N }, - { "mediatek,mtk7621-soc", MTK_SOC_MT7621 }, - { "mediatek,mt7621-soc", MTK_SOC_MT7621 }, - { "ralink,mt7621-soc", MTK_SOC_MT7621 }, - { "ralink,mtk7621-soc", MTK_SOC_MT7621 }, - { "ralink,mtk7628an-soc", MTK_SOC_MT7628 }, - { "mediatek,mt7628an-soc", MTK_SOC_MT7628 }, - { "ralink,mtk7688-soc", MTK_SOC_MT7688 }, - - /* Sentinel */ - { NULL, MTK_SOC_UNKNOWN }, -}; - -static uint32_t -mtk_detect_cpuclk_rt2880(bus_space_tag_t bst, bus_space_handle_t bsh) -{ - uint32_t val; - - val = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG); - val >>= RT2880_CPU_CLKSEL_OFF; - val &= RT2880_CPU_CLKSEL_MSK; - - switch (val) { - case 0: - return (MTK_CPU_CLK_250MHZ); - case 1: - return (MTK_CPU_CLK_266MHZ); - case 2: - return (MTK_CPU_CLK_280MHZ); - case 3: - return (MTK_CPU_CLK_300MHZ); - } - - /* Never reached */ - return (0); -} - -static uint32_t -mtk_detect_cpuclk_rt305x(bus_space_tag_t bst, bus_space_handle_t bsh) -{ - uint32_t val; - - val = bus_space_read_4(bst, bsh, SYSCTL_CHIPID0_3); - if (val == RT3350_CHIPID0_3) - return (MTK_CPU_CLK_320MHZ); - - val = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG); - val >>= RT305X_CPU_CLKSEL_OFF; - val &= RT305X_CPU_CLKSEL_MSK; - - return ((val == 0) ? MTK_CPU_CLK_320MHZ : MTK_CPU_CLK_384MHZ); -} - -static uint32_t -mtk_detect_cpuclk_rt3352(bus_space_tag_t bst, bus_space_handle_t bsh) -{ - uint32_t val; - - val = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG); - val >>= RT3352_CPU_CLKSEL_OFF; - val &= RT3352_CPU_CLKSEL_MSK; - - if (val) - return (MTK_CPU_CLK_400MHZ); - - return (MTK_CPU_CLK_384MHZ); -} - -static uint32_t -mtk_detect_cpuclk_rt3883(bus_space_tag_t bst, bus_space_handle_t bsh) -{ - uint32_t val; - - val = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG); - val >>= RT3883_CPU_CLKSEL_OFF; - val &= RT3883_CPU_CLKSEL_MSK; - - switch (val) { - case 0: - return (MTK_CPU_CLK_250MHZ); - case 1: - return (MTK_CPU_CLK_384MHZ); - case 2: - return (MTK_CPU_CLK_480MHZ); - case 3: - return (MTK_CPU_CLK_500MHZ); - } - - /* Never reached */ - return (0); -} - -static uint32_t -mtk_detect_cpuclk_rt5350(bus_space_tag_t bst, bus_space_handle_t bsh) -{ - uint32_t val1, val2; - - val1 = val2 = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG); - - val1 >>= RT5350_CPU_CLKSEL_OFF1; - val2 >>= RT5350_CPU_CLKSEL_OFF2; - val1 &= RT5350_CPU_CLKSEL_MSK; - val2 &= RT5350_CPU_CLKSEL_MSK; - val1 |= (val2 << 1); - - switch (val1) { - case 0: - return (MTK_CPU_CLK_360MHZ); - case 1: - /* Reserved value, but we return UNKNOWN */ - return (MTK_CPU_CLK_UNKNOWN); - case 2: - return (MTK_CPU_CLK_320MHZ); - case 3: - return (MTK_CPU_CLK_300MHZ); - } - - /* Never reached */ - return (0); -} - -static uint32_t -mtk_detect_cpuclk_mt7620(bus_space_tag_t bst, bus_space_handle_t bsh) -{ - uint32_t val, mul, div, res; - - val = bus_space_read_4(bst, bsh, SYSCTL_MT7620_CPLL_CFG1); - if (val & MT7620_CPU_CLK_AUX0) - return (MTK_CPU_CLK_480MHZ); - - val = bus_space_read_4(bst, bsh, SYSCTL_MT7620_CPLL_CFG0); - if (!(val & MT7620_CPLL_SW_CFG)) - return (MTK_CPU_CLK_600MHZ); - - mul = MT7620_PLL_MULT_RATIO_BASE + ((val >> MT7620_PLL_MULT_RATIO_OFF) & - MT7620_PLL_MULT_RATIO_MSK); - div = (val >> MT7620_PLL_DIV_RATIO_OFF) & MT7620_PLL_DIV_RATIO_MSK; - - if (div != MT7620_PLL_DIV_RATIO_MSK) - div += MT7620_PLL_DIV_RATIO_BASE; - else - div = MT7620_PLL_DIV_RATIO_MAX; - - res = (MT7620_XTAL_40 * mul) / div; - - return (MTK_MHZ(res)); -} - -static uint32_t -mtk_detect_cpuclk_mt7621(bus_space_tag_t bst, bus_space_handle_t bsh) -{ - uint32_t val, div, res; - - val = bus_space_read_4(bst, bsh, SYSCTL_CLKCFG0); - if (val & MT7621_USES_MEMDIV) { - div = bus_space_read_4(bst, bsh, MTK_MT7621_CLKDIV_REG); - div >>= MT7621_MEMDIV_OFF; - div &= MT7621_MEMDIV_MSK; - div += MT7621_MEMDIV_BASE; - - val = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG); - val >>= MT7621_CLKSEL_OFF; - val &= MT7621_CLKSEL_MSK; - - if (val >= MT7621_CLKSEL_25MHZ_VAL) - res = div * MT7621_CLKSEL_25MHZ; - else if (val >= MT7621_CLKSEL_20MHZ_VAL) - res = div * MT7621_CLKSEL_20MHZ; - else - res = div * 0; /* XXX: not sure about this */ - } else { - val = bus_space_read_4(bst, bsh, SYSCTL_CUR_CLK_STS); - div = (val >> MT7621_CLK_STS_DIV_OFF) & MT7621_CLK_STS_MSK; - val &= MT7621_CLK_STS_MSK; - - res = (MT7621_CLK_STS_BASE * val) / div; - } - - return (MTK_MHZ(res)); -} - -static uint32_t -mtk_detect_cpuclk_mt7628(bus_space_tag_t bst, bus_space_handle_t bsh) -{ - uint32_t val; - - val = bus_space_read_4(bst, bsh, SYSCTL_SYSCFG); - val >>= MT7628_CPU_CLKSEL_OFF; - val &= MT7628_CPU_CLKSEL_MSK; - - if (val) - return (MTK_CPU_CLK_580MHZ); - - return (MTK_CPU_CLK_575MHZ); -} - -void -mtk_soc_try_early_detect(void) -{ - bus_space_tag_t bst; - bus_space_handle_t bsh; - uint32_t base; - phandle_t node; - int i; - - if ((node = OF_finddevice("/")) == -1) - return; - - for (i = 0; compat_data[i].ocd_str != NULL; i++) { - if (ofw_bus_node_is_compatible(node, compat_data[i].ocd_str)) { - mtk_soc_socid = compat_data[i].ocd_data; - break; - } - } - - if (mtk_soc_socid == MTK_SOC_UNKNOWN) { - /* We don't know the SoC, so we don't know how to get clocks */ - return; - } - - bst = fdtbus_bs_tag; - if (mtk_soc_socid == MTK_SOC_RT2880) - base = MTK_RT2880_BASE; - else if (mtk_soc_socid == MTK_SOC_MT7621) - base = MTK_MT7621_BASE; - else - base = MTK_DEFAULT_BASE; - - if (bus_space_map(bst, base, MTK_DEFAULT_SIZE, 0, &bsh)) - return; - - /* Get our CHIP ID */ - mtk_soc_chipid0_3 = bus_space_read_4(bst, bsh, SYSCTL_CHIPID0_3); - mtk_soc_chipid4_7 = bus_space_read_4(bst, bsh, SYSCTL_CHIPID4_7); - - /* First, figure out the CPU clock */ - switch (mtk_soc_socid) { - case MTK_SOC_RT2880: - mtk_soc_cpuclk = mtk_detect_cpuclk_rt2880(bst, bsh); - break; - case MTK_SOC_RT3050: /* fallthrough */ - case MTK_SOC_RT3052: - case MTK_SOC_RT3350: - mtk_soc_cpuclk = mtk_detect_cpuclk_rt305x(bst, bsh); - break; - case MTK_SOC_RT3352: - mtk_soc_cpuclk = mtk_detect_cpuclk_rt3352(bst, bsh); - break; - case MTK_SOC_RT3662: /* fallthrough */ - case MTK_SOC_RT3883: - mtk_soc_cpuclk = mtk_detect_cpuclk_rt3883(bst, bsh); - break; - case MTK_SOC_RT5350: - mtk_soc_cpuclk = mtk_detect_cpuclk_rt5350(bst, bsh); - break; - case MTK_SOC_MT7620A: /* fallthrough */ - case MTK_SOC_MT7620N: - mtk_soc_cpuclk = mtk_detect_cpuclk_mt7620(bst, bsh); - break; - case MTK_SOC_MT7621: - mtk_soc_cpuclk = mtk_detect_cpuclk_mt7621(bst, bsh); - break; - case MTK_SOC_MT7628: /* fallthrough */ - case MTK_SOC_MT7688: - mtk_soc_cpuclk = mtk_detect_cpuclk_mt7628(bst, bsh); - break; - default: - /* We don't know the SoC, so we can't find the CPU clock */ - break; - } - - /* Now figure out the timer clock */ - if (mtk_soc_socid == MTK_SOC_MT7621) { -#ifdef notyet - /* - * We use the GIC timer for timing source and its clock freq is - * the same as the CPU's clock freq - */ - mtk_soc_timerclk = mtk_soc_cpuclk; -#else - /* - * When GIC timer and MIPS timer are ready to co-exist and - * GIC timer is actually implemented, we need to switch to it. - * Until then we use a fake GIC timer, which is actually a - * normal MIPS ticker, so the timer clock is half the CPU clock - */ - mtk_soc_timerclk = mtk_soc_cpuclk / 2; -#endif - } else { - /* - * We use the MIPS ticker for the rest for now, so - * the CPU clock is divided by 2 - */ - mtk_soc_timerclk = mtk_soc_cpuclk / 2; - } - - switch (mtk_soc_socid) { - case MTK_SOC_RT2880: - mtk_soc_uartclk = mtk_soc_cpuclk / MTK_UARTDIV_2; - break; - case MTK_SOC_RT3350: /* fallthrough */ - case MTK_SOC_RT3050: /* fallthrough */ - case MTK_SOC_RT3052: - /* UART clock is CPU clock / 3 */ - mtk_soc_uartclk = mtk_soc_cpuclk / MTK_UARTDIV_3; - break; - case MTK_SOC_RT3352: /* fallthrough */ - case MTK_SOC_RT3662: /* fallthrough */ - case MTK_SOC_RT3883: /* fallthrough */ - case MTK_SOC_RT5350: /* fallthrough */ - case MTK_SOC_MT7620A: /* fallthrough */ - case MTK_SOC_MT7620N: /* fallthrough */ - case MTK_SOC_MT7628: /* fallthrough */ - case MTK_SOC_MT7688: - /* UART clock is always 40MHz */ - mtk_soc_uartclk = MTK_UART_CLK_40MHZ; - break; - case MTK_SOC_MT7621: - /* UART clock is always 50MHz */ - mtk_soc_uartclk = MTK_UART_CLK_50MHZ; - break; - default: - /* We don't know the SoC, so we don't know the UART clock */ - break; - } - - bus_space_unmap(bst, bsh, MTK_DEFAULT_SIZE); -} - -void -mtk_soc_set_cpu_model(void) -{ - int idx, offset = sizeof(mtk_soc_chipid0_3); - char *chipid0_3 = (char *)(&mtk_soc_chipid0_3); - char *chipid4_7 = (char *)(&mtk_soc_chipid4_7); - - /* - * CHIPID is always 2x32 bit registers, containing the ASCII - * representation of the chip, so use that directly. - * - * The info is either pre-populated in mtk_soc_try_early_detect() or - * it is left at its default value of "unknown " if it could not be - * obtained for some reason. - */ - for (idx = 0; idx < offset; idx++) { - cpu_model[idx] = chipid0_3[idx]; - cpu_model[idx + offset] = chipid4_7[idx]; - } - - /* Null-terminate the string */ - cpu_model[2 * offset] = 0; -} - -uint32_t -mtk_soc_get_uartclk(void) -{ - - return mtk_soc_uartclk; -} - -uint32_t -mtk_soc_get_cpuclk(void) -{ - - return mtk_soc_cpuclk; -} - -uint32_t -mtk_soc_get_timerclk(void) -{ - - return mtk_soc_timerclk; -} - -uint32_t -mtk_soc_get_socid(void) -{ - - return mtk_soc_socid; -} - -/* - * The following are generic reset and clock functions - */ - -/* Default reset time is 100ms */ -#define DEFAULT_RESET_TIME 100000 - -int -mtk_soc_reset_device(device_t dev) -{ - int res; - - res = fdt_reset_assert_all(dev); - if (res == 0) { - DELAY(DEFAULT_RESET_TIME); - res = fdt_reset_deassert_all(dev); - if (res == 0) - DELAY(DEFAULT_RESET_TIME); - } - - return (res); -} - -int -mtk_soc_stop_clock(device_t dev) -{ - - return (fdt_clock_disable_all(dev)); -} - -int -mtk_soc_start_clock(device_t dev) -{ - - return (fdt_clock_enable_all(dev)); -} - -int -mtk_soc_assert_reset(device_t dev) -{ - - return (fdt_reset_assert_all(dev)); -} - -int -mtk_soc_deassert_reset(device_t dev) -{ - - return (fdt_reset_deassert_all(dev)); -} - -void -mtk_soc_reset(void) -{ - - mtk_sysctl_clr_set(SYSCTL_RSTCTRL, 0, 1); - mtk_sysctl_clr_set(SYSCTL_RSTCTRL, 1, 0); -} diff --git a/sys/mips/mediatek/mtk_soc.h b/sys/mips/mediatek/mtk_soc.h deleted file mode 100644 index 69f14d5b329..00000000000 --- a/sys/mips/mediatek/mtk_soc.h +++ /dev/null @@ -1,136 +0,0 @@ -/*- - * Copyright (c) 2016 Stanislav Galabov. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MTK_SOC_H_ -#define _MTK_SOC_H_ - -enum mtk_soc_id { - MTK_SOC_UNKNOWN, - MTK_SOC_RT2880, - MTK_SOC_RT3050, - MTK_SOC_RT3052, - MTK_SOC_RT3350, - MTK_SOC_RT3352, - MTK_SOC_RT3662, - MTK_SOC_RT3883, - MTK_SOC_RT5350, - MTK_SOC_MT7620A, - MTK_SOC_MT7620N, - MTK_SOC_MT7621, - MTK_SOC_MT7628, - MTK_SOC_MT7688, - MTK_SOC_MAX -}; - -#define RT2880_CPU_CLKSEL_OFF 20 -#define RT2880_CPU_CLKSEL_MSK 0x3 -#define RT305X_CPU_CLKSEL_OFF 18 -#define RT305X_CPU_CLKSEL_MSK 0x1 -#define RT3352_CPU_CLKSEL_OFF 8 -#define RT3352_CPU_CLKSEL_MSK 0x1 -#define RT3883_CPU_CLKSEL_OFF 8 -#define RT3883_CPU_CLKSEL_MSK 0x3 -#define RT5350_CPU_CLKSEL_OFF1 8 -#define RT5350_CPU_CLKSEL_OFF2 10 -#define RT5350_CPU_CLKSEL_MSK 0x1 -#define MT7628_CPU_CLKSEL_OFF 6 -#define MT7628_CPU_CLKSEL_MSK 0x1 - -#define MT7620_CPU_CLK_AUX0 (1u<<24) -#define MT7620_CPLL_SW_CFG (1u<<31) -#define MT7620_PLL_MULT_RATIO_OFF 16 -#define MT7620_PLL_MULT_RATIO_MSK 0x7 -#define MT7620_PLL_MULT_RATIO_BASE 24 -#define MT7620_PLL_DIV_RATIO_OFF 10 -#define MT7620_PLL_DIV_RATIO_MSK 0x3 -#define MT7620_PLL_DIV_RATIO_BASE 2 -#define MT7620_PLL_DIV_RATIO_MAX 8 -#define MT7620_XTAL_40 40 - -#define MT7621_USES_MEMDIV (1u<<30) -#define MT7621_MEMDIV_OFF 4 -#define MT7621_MEMDIV_MSK 0x7f -#define MT7621_MEMDIV_BASE 1 -#define MT7621_CLKSEL_OFF 6 -#define MT7621_CLKSEL_MSK 0x7 -#define MT7621_CLKSEL_25MHZ_VAL 6 -#define MT7621_CLKSEL_20MHZ_VAL 3 -#define MT7621_CLKSEL_20MHZ 20 -#define MT7621_CLKSEL_25MHZ 25 -#define MT7621_CLK_STS_DIV_OFF 8 -#define MT7621_CLK_STS_MSK 0x1f -#define MT7621_CLK_STS_BASE 500 - -#define MTK_MT7621_CLKDIV_REG 0x5648 -#define MTK_MT7621_CLKDIV_OFF 4 -#define MTK_MT7621_CLKDIV_MSK 0x7f - -#define MTK_MHZ(x) ((x) * 1000 * 1000) - -#define MTK_CPU_CLK_UNKNOWN 0 -#define MTK_CPU_CLK_233MHZ 233333333 -#define MTK_CPU_CLK_250MHZ 250000000 -#define MTK_CPU_CLK_266MHZ 266666666 -#define MTK_CPU_CLK_280MHZ 280000000 -#define MTK_CPU_CLK_300MHZ 300000000 -#define MTK_CPU_CLK_320MHZ 320000000 -#define MTK_CPU_CLK_360MHZ 360000000 -#define MTK_CPU_CLK_384MHZ 384000000 -#define MTK_CPU_CLK_400MHZ 400000000 -#define MTK_CPU_CLK_480MHZ 480000000 -#define MTK_CPU_CLK_500MHZ 500000000 -#define MTK_CPU_CLK_575MHZ 575000000 -#define MTK_CPU_CLK_580MHZ 580000000 -#define MTK_CPU_CLK_600MHZ 600000000 -#define MTK_CPU_CLK_880MHZ 880000000 - -#define MTK_UART_CLK_40MHZ 40000000 -#define MTK_UART_CLK_50MHZ 50000000 - -#define MTK_UARTDIV_2 2 -#define MTK_UARTDIV_3 3 - -#define MTK_DEFAULT_BASE 0x10000000 -#define MTK_RT2880_BASE 0x00300000 -#define MTK_MT7621_BASE 0x1e000000 -#define MTK_DEFAULT_SIZE 0x6000 - -extern void mtk_soc_try_early_detect(void); -extern void mtk_soc_set_cpu_model(void); -extern uint32_t mtk_soc_get_uartclk(void); -extern uint32_t mtk_soc_get_cpuclk(void); -extern uint32_t mtk_soc_get_timerclk(void); -extern uint32_t mtk_soc_get_socid(void); - -extern int mtk_soc_reset_device(device_t); -extern int mtk_soc_stop_clock(device_t); -extern int mtk_soc_start_clock(device_t); -extern int mtk_soc_assert_reset(device_t); -extern int mtk_soc_deassert_reset(device_t); -extern void mtk_soc_reset(void); - -#endif /* _MTK_SOC_H_ */ diff --git a/sys/mips/mediatek/mtk_spi_v1.c b/sys/mips/mediatek/mtk_spi_v1.c deleted file mode 100644 index 7b38dffade3..00000000000 --- a/sys/mips/mediatek/mtk_spi_v1.c +++ /dev/null @@ -1,411 +0,0 @@ -/*- - * Copyright (c) 2009, Oleksandr Tymoshenko - * Copyright (c) 2011, Aleksandr Rybalko - * Copyright (c) 2013, Alexander A. Mityaev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include - -#include -#include "gpiobus_if.h" - -#include - -#include -#include -#include "spibus_if.h" - -#include "opt_platform.h" - -#include -#include -#include - -#include -#include -#include - -#undef MTK_SPI_DEBUG -#ifdef MTK_SPI_DEBUG -#define dprintf printf -#else -#define dprintf(x, arg...) -#endif - -/* - * register space access macros - */ -#define SPI_WRITE(sc, reg, val) do { \ - bus_write_4(sc->sc_mem_res, (reg), (val)); \ - } while (0) - -#define SPI_READ(sc, reg) bus_read_4(sc->sc_mem_res, (reg)) - -#define SPI_SET_BITS(sc, reg, bits) \ - SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) | (bits)) - -#define SPI_CLEAR_BITS(sc, reg, bits) \ - SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) & ~(bits)) - -struct mtk_spi_softc { - device_t sc_dev; - struct resource *sc_mem_res; - struct gpiobus_pin *gpio_cs; - int nonflash; -}; - -static int mtk_spi_probe(device_t); -static int mtk_spi_attach(device_t); -static int mtk_spi_detach(device_t); -static int mtk_spi_wait(struct mtk_spi_softc *); -static void mtk_spi_chip_activate(struct mtk_spi_softc *); -static void mtk_spi_chip_deactivate(struct mtk_spi_softc *); -static uint8_t mtk_spi_txrx(struct mtk_spi_softc *, uint8_t *, int); -static int mtk_spi_transfer(device_t, device_t, struct spi_command *); -static phandle_t mtk_spi_get_node(device_t, device_t); - -static struct ofw_compat_data compat_data[] = { - { "ralink,rt2880-spi", 1 }, - { "ralink,rt3050-spi", 1 }, - { "ralink,rt3352-spi", 1 }, - { "ralink,rt3883-spi", 1 }, - { "ralink,rt5350-spi", 1 }, - { "ralink,mt7620a-spi", 1 }, - { NULL, 0 } -}; - -static int -mtk_spi_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) - return(ENXIO); - - device_set_desc(dev, "MTK SPI Controller (v1)"); - - return (0); -} - -static int -mtk_spi_attach(device_t dev) -{ - struct mtk_spi_softc *sc = device_get_softc(dev); - int rid; - - sc->sc_dev = dev; - rid = 0; - sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_SHAREABLE | RF_ACTIVE); - if (!sc->sc_mem_res) { - device_printf(dev, "Could not map memory\n"); - return (ENXIO); - } - - if (mtk_spi_wait(sc)) { - bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); - return (EBUSY); - } - - if (ofw_bus_has_prop(dev, "non-flash")) - sc->nonflash = 1; - else - sc->nonflash = 0; - - ofw_gpiobus_parse_gpios(dev, "cs-gpios", &sc->gpio_cs); - - if (sc->gpio_cs != NULL) { - GPIO_PIN_SETFLAGS(sc->gpio_cs->dev, sc->gpio_cs->pin, - GPIO_PIN_OUTPUT); - GPIO_PIN_SET(sc->gpio_cs->dev, sc->gpio_cs->pin, 1); - } - - device_add_child(dev, "spibus", -1); - return (bus_generic_attach(dev)); -} - -static int -mtk_spi_detach(device_t dev) -{ - struct mtk_spi_softc *sc = device_get_softc(dev); - - SPI_SET_BITS(sc, MTK_SPICTL, HIZSMOSI | CS_HIGH); - - if (sc->sc_mem_res) - bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); - - return (0); -} - -static void -mtk_spi_chip_activate(struct mtk_spi_softc *sc) -{ - mtk_spi_wait(sc); - /* - * Put all CSx to low - */ - if (sc->gpio_cs != NULL) { - GPIO_PIN_SET(sc->gpio_cs->dev, sc->gpio_cs->pin, 0); - SPI_CLEAR_BITS(sc, MTK_SPICTL, HIZSMOSI); - } else { - SPI_CLEAR_BITS(sc, MTK_SPICTL, CS_HIGH | HIZSMOSI); - } -} - -static void -mtk_spi_chip_deactivate(struct mtk_spi_softc *sc) -{ - mtk_spi_wait(sc); - /* - * Put all CSx to high - */ - if (sc->gpio_cs != NULL) { - GPIO_PIN_SET(sc->gpio_cs->dev, sc->gpio_cs->pin, 1); - SPI_SET_BITS(sc, MTK_SPICTL, HIZSMOSI); - } else { - SPI_SET_BITS(sc, MTK_SPICTL, CS_HIGH | HIZSMOSI); - } -} - -static int -mtk_spi_wait(struct mtk_spi_softc *sc) -{ - int i = 1000; - - while (i--) { - if (!SPI_READ(sc, MTK_SPIBUSY)) - break; - } - if (i == 0) { - printf("busy\n"); - return (1); - } - - return (0); -} - -static uint8_t -mtk_spi_txrx(struct mtk_spi_softc *sc, uint8_t *data, int write) -{ - - if (mtk_spi_wait(sc)) - return (EBUSY); - - if (write == MTK_SPI_WRITE) { - SPI_WRITE(sc, MTK_SPIDATA, *data); - SPI_SET_BITS(sc, MTK_SPICTL, START_WRITE); - } else {/* MTK_SPI_READ */ - SPI_SET_BITS(sc, MTK_SPICTL, START_READ); - if (mtk_spi_wait(sc)) - return (EBUSY); - - *data = SPI_READ(sc, MTK_SPIDATA) & 0xff; - } - return (0); -} - -static int -mtk_spi_transfer(device_t dev, device_t child, struct spi_command *cmd) -{ - struct mtk_spi_softc *sc; - uint8_t *buf, byte, *tx_buf; - uint32_t cs, clock, mode; - int i, sz, error = 0, write = 0; - int div, clk, cfgreg; - - sc = device_get_softc(dev); - - spibus_get_cs(child, &cs); - spibus_get_clock(child, &clock); - spibus_get_mode(child, &mode); - - cs &= ~SPIBUS_CS_HIGH; - - if (cs != 0) - /* Only 1 CS */ - return (ENXIO); - - cfgreg = MSBFIRST; - switch(mode) { - case 0: /* This is workadound because of - mode 0 not work this soc. */ - case 3: - cfgreg |= SPICLKPOL | TX_ON_CLK_FALL; - break; - case 1: - cfgreg |= TX_ON_CLK_FALL; - break; - case 2: - cfgreg |= CAPT_ON_CLK_FALL; - break; - } - - /* - * W25Q64CV max 104MHz, bus 120-192 MHz, so divide by 2. - * Update: divide by 4, DEV2 to fast for flash. - */ - if (clock != 0) { - div = (mtk_soc_get_cpuclk() + (clock - 1)) / clock; - clk = fls(div) - 2; - if (clk < 0) - clk = 0; - else if (clk > 6) - clk = 6; - } else { - clk = 6; - } - - SPI_WRITE(sc, MTK_SPICFG, cfgreg | clk); - - if (sc->nonflash == 0) { - /* There is always a command to transfer. */ - tx_buf = (uint8_t *)(cmd->tx_cmd); - - /* Perform some fixup because MTK dont support duplex SPI */ - switch(tx_buf[0]) { - case CMD_READ_IDENT: - cmd->tx_cmd_sz = 1; - cmd->rx_cmd_sz = 3; - break; - case CMD_ENTER_4B_MODE: - case CMD_EXIT_4B_MODE: - case CMD_WRITE_ENABLE: - case CMD_WRITE_DISABLE: - cmd->tx_cmd_sz = 1; - cmd->rx_cmd_sz = 0; - break; - case CMD_READ_STATUS: - cmd->tx_cmd_sz = 1; - cmd->rx_cmd_sz = 1; - break; - case CMD_READ: - case CMD_FAST_READ: - cmd->rx_cmd_sz = cmd->tx_data_sz = 0; - break; - case CMD_SECTOR_ERASE: - cmd->rx_cmd_sz = 0; - break; - case CMD_PAGE_PROGRAM: - cmd->rx_cmd_sz = cmd->rx_data_sz = 0; - break; - } - } - - mtk_spi_chip_activate(sc); - - if (cmd->tx_cmd_sz + cmd->rx_cmd_sz) { - buf = (uint8_t *)(cmd->rx_cmd); - tx_buf = (uint8_t *)(cmd->tx_cmd); - sz = cmd->tx_cmd_sz; - if (sc->nonflash == 0) - sz += cmd->rx_cmd_sz; - - for (i = 0; i < sz; i++) { - if(i < cmd->tx_cmd_sz) { - byte = tx_buf[i]; - error = mtk_spi_txrx(sc, &byte, - MTK_SPI_WRITE); - if (error) - goto mtk_spi_transfer_fail; - continue; - } - error = mtk_spi_txrx(sc, &byte, - MTK_SPI_READ); - if (error) - goto mtk_spi_transfer_fail; - buf[i] = byte; - } - } - - /* - * Transfer/Receive data - */ - - if (cmd->tx_data_sz + cmd->rx_data_sz) { - write = (cmd->tx_data_sz > 0)?1:0; - buf = (uint8_t *)(write ? cmd->tx_data : cmd->rx_data); - sz = write ? cmd->tx_data_sz : cmd->rx_data_sz; - - for (i = 0; i < sz; i++) { - byte = buf[i]; - error = mtk_spi_txrx(sc, &byte, - write ? MTK_SPI_WRITE : MTK_SPI_READ); - if (error) - goto mtk_spi_transfer_fail; - buf[i] = byte; - } - } -mtk_spi_transfer_fail: - mtk_spi_chip_deactivate(sc); - - return (error); -} - -static phandle_t -mtk_spi_get_node(device_t bus, device_t dev) -{ - - /* We only have one child, the SPI bus, which needs our own node. */ - return (ofw_bus_get_node(bus)); -} - -static device_method_t mtk_spi_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, mtk_spi_probe), - DEVMETHOD(device_attach, mtk_spi_attach), - DEVMETHOD(device_detach, mtk_spi_detach), - - DEVMETHOD(spibus_transfer, mtk_spi_transfer), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_node, mtk_spi_get_node), - - DEVMETHOD_END -}; - -static driver_t mtk_spi_driver = { - .name = "spi", - .methods = mtk_spi_methods, - .size = sizeof(struct mtk_spi_softc), -}; - -static devclass_t mtk_spi_devclass; - -DRIVER_MODULE(mtk_spi_v1, simplebus, mtk_spi_driver, mtk_spi_devclass, 0, 0); diff --git a/sys/mips/mediatek/mtk_spi_v1.h b/sys/mips/mediatek/mtk_spi_v1.h deleted file mode 100644 index 7a378ea493c..00000000000 --- a/sys/mips/mediatek/mtk_spi_v1.h +++ /dev/null @@ -1,69 +0,0 @@ -/*- - * Copyright (c) 2009, Oleksandr Tymoshenko - * Copyright (c) 2011, Aleksandr Rybalko - * Copyright (c) 2013, Alexander A. Mityaev - * Copyright (c) 2016, Stanislav Galabov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MTK_SPIVAR_H_ -#define _MTK_SPIVAR_H_ - -/* SPI controller interface */ - -#define MTK_SPISTAT 0x00 -/* SPIBUSY is alias for SPIBUSY, because SPISTAT have only BUSY bit*/ -#define MTK_SPIBUSY MTK_SPISTAT - -#define MTK_SPICFG 0x10 -#define MSBFIRST (1<<8) -#define SPICLKPOL (1<<6) -#define CAPT_ON_CLK_FALL (1<<5) -#define TX_ON_CLK_FALL (1<<4) -#define HIZSPI (1<<3) /* Set SPI pins to Tri-state */ -#define SPI_CLK_SHIFT 0 /* SPI clock divide control */ -#define SPI_CLK_MASK 0x00000007 -#define SPI_CLK_DIV2 0 -#define SPI_CLK_DIV4 1 -#define SPI_CLK_DIV8 2 -#define SPI_CLK_DIV16 3 -#define SPI_CLK_DIV32 4 -#define SPI_CLK_DIV64 5 -#define SPI_CLK_DIV128 6 -#define SPI_CLK_DISABLED 7 - -#define MTK_SPICTL 0x14 -#define HIZSMOSI (1<<3) -#define START_WRITE (1<<2) -#define START_READ (1<<1) -#define CS_HIGH (1<<0) - -#define MTK_SPIDATA 0x20 -#define SPIDATA_MASK 0x000000ff - -#define MTK_SPI_WRITE 1 -#define MTK_SPI_READ 0 - -#endif /* _MTK_SPIVAR_H_ */ diff --git a/sys/mips/mediatek/mtk_spi_v2.c b/sys/mips/mediatek/mtk_spi_v2.c deleted file mode 100644 index 9da1bb310e9..00000000000 --- a/sys/mips/mediatek/mtk_spi_v2.c +++ /dev/null @@ -1,353 +0,0 @@ -/*- - * Copyright (c) 2009, Oleksandr Tymoshenko - * Copyright (c) 2011, Aleksandr Rybalko - * Copyright (c) 2013, Alexander A. Mityaev - * Copyright (c) 2016, Stanislav Galabov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include "spibus_if.h" - -#include "opt_platform.h" - -#include -#include -#include - -#include -#include - -#undef MTK_SPI_DEBUG -#ifdef MTK_SPI_DEBUG -#define dprintf printf -#else -#define dprintf(x, arg...) -#endif - -/* - * register space access macros - */ -#define SPI_WRITE(sc, reg, val) do { \ - bus_write_4(sc->sc_mem_res, (reg), (val)); \ - } while (0) - -#define SPI_READ(sc, reg) bus_read_4(sc->sc_mem_res, (reg)) - -#define SPI_SET_BITS(sc, reg, bits) \ - SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) | (bits)) - -#define SPI_CLEAR_BITS(sc, reg, bits) \ - SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) & ~(bits)) - -struct mtk_spi_softc { - device_t sc_dev; - struct resource *sc_mem_res; -}; - -static int mtk_spi_probe(device_t); -static int mtk_spi_attach(device_t); -static int mtk_spi_detach(device_t); -static int mtk_spi_wait(struct mtk_spi_softc *); -static void mtk_spi_chip_activate(struct mtk_spi_softc *); -static void mtk_spi_chip_deactivate(struct mtk_spi_softc *); -static uint8_t mtk_spi_txrx(struct mtk_spi_softc *, uint8_t *, int); -static int mtk_spi_transfer(device_t, device_t, struct spi_command *); -static phandle_t mtk_spi_get_node(device_t, device_t); - -static struct ofw_compat_data compat_data[] = { - { "ralink,mt7621-spi", 1 }, - { "ralink,mtk7628an-spi", 1 }, - { NULL, 0 } -}; - -static int -mtk_spi_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) - return(ENXIO); - - device_set_desc(dev, "MTK SPI Controller (v2)"); - - return (0); -} - -static int -mtk_spi_attach(device_t dev) -{ - struct mtk_spi_softc *sc = device_get_softc(dev); - uint32_t val; - int rid; - - sc->sc_dev = dev; - rid = 0; - sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (!sc->sc_mem_res) { - device_printf(dev, "Could not map memory\n"); - return (ENXIO); - } - - if (mtk_spi_wait(sc)) { - bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); - return (EBUSY); - } - - val = SPI_READ(sc, MTK_SPIMASTER); - val &= ~(0xfff << 16); - val |= 13 << 16; - val |= 7 << 29; - val |= 1 << 2; - SPI_WRITE(sc, MTK_SPIMASTER, val); - /* - * W25Q64CV max 104MHz, bus 120-192 MHz, so divide by 2. - * Update: divide by 4, DEV2 to fast for flash. - */ - - device_add_child(dev, "spibus", 0); - return (bus_generic_attach(dev)); -} - -static int -mtk_spi_detach(device_t dev) -{ - struct mtk_spi_softc *sc = device_get_softc(dev); - - if (sc->sc_mem_res) - bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); - - return (0); -} - -static void -mtk_spi_chip_activate(struct mtk_spi_softc *sc) -{ - mtk_spi_wait(sc); - /* - * Put all CSx to low - */ - SPI_SET_BITS(sc, MTK_SPIPOLAR, 1); -} - -static void -mtk_spi_chip_deactivate(struct mtk_spi_softc *sc) -{ - mtk_spi_wait(sc); - /* - * Put all CSx to high - */ - SPI_CLEAR_BITS(sc, MTK_SPIPOLAR, 1); -} - -static int -mtk_spi_wait(struct mtk_spi_softc *sc) -{ - int i = 1000; - - while (i--) { - if (!(SPI_READ(sc, MTK_SPITRANS) & SPIBUSY)) - break; - } - if (i == 0) { - return (1); - } - - return (0); -} - -static uint8_t -mtk_spi_txrx(struct mtk_spi_softc *sc, uint8_t *data, int write) -{ - - if (mtk_spi_wait(sc)) - return (0xff); - - if (write == MTK_SPI_WRITE) { - SPI_WRITE(sc, MTK_SPIOPCODE, (*data)); - SPI_WRITE(sc, MTK_SPIMOREBUF, (8<<24)); - } else { - SPI_WRITE(sc, MTK_SPIMOREBUF, (8<<12)); - } - - SPI_SET_BITS(sc, MTK_SPITRANS, SPISTART); - - if (mtk_spi_wait(sc)) - return (0xff); - - if (write == MTK_SPI_READ) { - *data = SPI_READ(sc, MTK_SPIDATA) & 0xff; - } - - return (0); -} - -static int -mtk_spi_transfer(device_t dev, device_t child, struct spi_command *cmd) -{ - struct mtk_spi_softc *sc; - uint8_t *buf, byte, *tx_buf; - uint32_t cs; - int i, sz, error, write = 0; - - sc = device_get_softc(dev); - - spibus_get_cs(child, &cs); - - cs &= ~SPIBUS_CS_HIGH; - - if (cs != 0) - /* Only 1 CS */ - return (ENXIO); - - /* There is always a command to transfer. */ - tx_buf = (uint8_t *)(cmd->tx_cmd); - - /* Perform some fixup because MTK dont support duplex SPI */ - switch(tx_buf[0]) { - case CMD_READ_IDENT: - cmd->tx_cmd_sz = 1; - cmd->rx_cmd_sz = 3; - break; - case CMD_ENTER_4B_MODE: - case CMD_EXIT_4B_MODE: - case CMD_WRITE_ENABLE: - case CMD_WRITE_DISABLE: - cmd->tx_cmd_sz = 1; - cmd->rx_cmd_sz = 0; - break; - case CMD_READ_STATUS: - cmd->tx_cmd_sz = 1; - cmd->rx_cmd_sz = 1; - break; - case CMD_READ: - case CMD_FAST_READ: - cmd->rx_cmd_sz = cmd->tx_data_sz = 0; - break; - case CMD_SECTOR_ERASE: - cmd->rx_cmd_sz = 0; - break; - case CMD_PAGE_PROGRAM: - cmd->rx_cmd_sz = cmd->rx_data_sz = 0; - break; - } - - mtk_spi_chip_activate(sc); - - if (cmd->tx_cmd_sz + cmd->rx_cmd_sz) { - buf = (uint8_t *)(cmd->rx_cmd); - tx_buf = (uint8_t *)(cmd->tx_cmd); - sz = cmd->tx_cmd_sz + cmd->rx_cmd_sz; - - for (i = 0; i < sz; i++) { - if(i < cmd->tx_cmd_sz) { - byte = tx_buf[i]; - error = mtk_spi_txrx(sc, &byte, - MTK_SPI_WRITE); - if (error) - goto mtk_spi_transfer_fail; - continue; - } - error = mtk_spi_txrx(sc, &byte, - MTK_SPI_READ); - if (error) - goto mtk_spi_transfer_fail; - buf[i] = byte; - } - } - - /* - * Transfer/Receive data - */ - - if (cmd->tx_data_sz + cmd->rx_data_sz) { - write = (cmd->tx_data_sz > 0)?1:0; - buf = (uint8_t *)(write ? cmd->tx_data : cmd->rx_data); - sz = write ? cmd->tx_data_sz : cmd->rx_data_sz; - - for (i = 0; i < sz; i++) { - byte = buf[i]; - error = mtk_spi_txrx(sc, &byte, - write ? MTK_SPI_WRITE : MTK_SPI_READ); - if (error) - goto mtk_spi_transfer_fail; - buf[i] = byte; - } - } -mtk_spi_transfer_fail: - mtk_spi_chip_deactivate(sc); - - return (0); -} - -static phandle_t -mtk_spi_get_node(device_t bus, device_t dev) -{ - - /* We only have one child, the SPI bus, which needs our own node. */ - return (ofw_bus_get_node(bus)); -} - -static device_method_t mtk_spi_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, mtk_spi_probe), - DEVMETHOD(device_attach, mtk_spi_attach), - DEVMETHOD(device_detach, mtk_spi_detach), - - DEVMETHOD(spibus_transfer, mtk_spi_transfer), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_node, mtk_spi_get_node), - - DEVMETHOD_END -}; - -static driver_t mtk_spi_driver = { - .name = "spi", - .methods = mtk_spi_methods, - .size = sizeof(struct mtk_spi_softc), -}; - -static devclass_t mtk_spi_devclass; - -DRIVER_MODULE(mtk_spi_v2, simplebus, mtk_spi_driver, mtk_spi_devclass, 0, 0); diff --git a/sys/mips/mediatek/mtk_spi_v2.h b/sys/mips/mediatek/mtk_spi_v2.h deleted file mode 100644 index 9c9388be267..00000000000 --- a/sys/mips/mediatek/mtk_spi_v2.h +++ /dev/null @@ -1,53 +0,0 @@ -/*- - * Copyright (c) 2009, Oleksandr Tymoshenko - * Copyright (c) 2011, Aleksandr Rybalko - * Copyright (c) 2013, Alexander A. Mityaev - * Copyright (c) 2016, Stanislav Galabov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MTK_SPI_NEWVAR_H_ -#define _MTK_SPI_NEWVAR_H_ - -/* SPI controller interface */ - -#define MTK_SPITRANS 0x00 -#define SPIBUSY (1<<16) -#define SPISTART (1<<8) - -#define MTK_SPIMASTER 0x28 - -#define MTK_SPIMOREBUF 0x2C - -#define MTK_SPIOPCODE 0x04 -#define MTK_SPIDATA 0x08 -#define SPIDATA_MASK 0x000000ff - -#define MTK_SPI_WRITE 1 -#define MTK_SPI_READ 0 - -#define MTK_SPIPOLAR 0x38 - -#endif /* _MTK_SPI_NEWVAR_H_ */ diff --git a/sys/mips/mediatek/mtk_sysctl.c b/sys/mips/mediatek/mtk_sysctl.c deleted file mode 100644 index cf001e5d984..00000000000 --- a/sys/mips/mediatek/mtk_sysctl.c +++ /dev/null @@ -1,189 +0,0 @@ -/*- - * Copyright (c) 2016 Stanislav Galabov. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include - -#include - -struct mtk_sysctl_softc { - device_t dev; - struct resource *mem_res; - int mem_rid; - struct mtx mtx; -}; - -static struct mtk_sysctl_softc *mtk_sysctl_sc = NULL; - -static struct ofw_compat_data compat_data[] = { - { "ralink,rt2880-sysc", 1 }, - { "ralink,rt3050-sysc", 1 }, - { "ralink,rt3352-sysc", 1 }, - { "ralink,rt3883-sysc", 1 }, - { "ralink,rt5350-sysc", 1 }, - { "ralink,mt7620a-sysc", 1 }, - { "mtk,mt7621-sysc", 1 }, - - /* Sentinel */ - { NULL, 0 } -}; - -#define MTK_SYSCTL_LOCK(sc) mtx_lock_spin(&(sc)->mtx) -#define MTK_SYSCTL_UNLOCK(sc) mtx_unlock_spin(&(sc)->mtx) -#define MTK_SYSCTL_LOCK_INIT(sc) \ - mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \ - "mtk_sysctl", MTX_SPIN) -#define MTK_SYSCTL_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx) - -static int -mtk_sysctl_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) - return (ENXIO); - - device_set_desc(dev, "MTK System Controller"); - - return (BUS_PROBE_DEFAULT); -} - -static int mtk_sysctl_detach(device_t); - -static int -mtk_sysctl_attach(device_t dev) -{ - struct mtk_sysctl_softc *sc = device_get_softc(dev); - - if (device_get_unit(dev) != 0 || mtk_sysctl_sc != NULL) { - device_printf(dev, "Only one sysctl module supported\n"); - return (ENXIO); - } - - mtk_sysctl_sc = sc; - - /* Map control/status registers. */ - sc->mem_rid = 0; - sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->mem_rid, RF_ACTIVE); - - if (sc->mem_res == NULL) { - device_printf(dev, "couldn't map memory\n"); - mtk_sysctl_detach(dev); - return (ENXIO); - } - - sc->dev = dev; - - MTK_SYSCTL_LOCK_INIT(sc); - - return (0); -} - -static int -mtk_sysctl_detach(device_t dev) -{ - struct mtk_sysctl_softc *sc = device_get_softc(dev); - - if (sc->mem_res) - bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, - sc->mem_res); - - MTK_SYSCTL_LOCK_DESTROY(sc); - - return(0); -} - -uint32_t -mtk_sysctl_get(uint32_t reg) -{ - uint32_t val; - - MTK_SYSCTL_LOCK(mtk_sysctl_sc); - val = bus_read_4(mtk_sysctl_sc->mem_res, reg); - MTK_SYSCTL_UNLOCK(mtk_sysctl_sc); - - return (val); -} - -void -mtk_sysctl_set(uint32_t reg, uint32_t val) -{ - - MTK_SYSCTL_LOCK(mtk_sysctl_sc); - bus_write_4(mtk_sysctl_sc->mem_res, reg, val); - MTK_SYSCTL_UNLOCK(mtk_sysctl_sc); -} - -void -mtk_sysctl_clr_set(uint32_t reg, uint32_t clr, uint32_t set) -{ - uint32_t val; - - MTK_SYSCTL_LOCK(mtk_sysctl_sc); - val = bus_read_4(mtk_sysctl_sc->mem_res, reg); - val &= ~(clr); - val |= set; - bus_write_4(mtk_sysctl_sc->mem_res, reg, val); - MTK_SYSCTL_UNLOCK(mtk_sysctl_sc); -} - -static device_method_t mtk_sysctl_methods[] = { - DEVMETHOD(device_probe, mtk_sysctl_probe), - DEVMETHOD(device_attach, mtk_sysctl_attach), - DEVMETHOD(device_detach, mtk_sysctl_detach), - - DEVMETHOD_END -}; - -static driver_t mtk_sysctl_driver = { - "sysc", - mtk_sysctl_methods, - sizeof(struct mtk_sysctl_softc), -}; -static devclass_t mtk_sysctl_devclass; - -EARLY_DRIVER_MODULE(mtk_sysctl, simplebus, mtk_sysctl_driver, - mtk_sysctl_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_EARLY); diff --git a/sys/mips/mediatek/mtk_sysctl.h b/sys/mips/mediatek/mtk_sysctl.h deleted file mode 100644 index 4c51a223872..00000000000 --- a/sys/mips/mediatek/mtk_sysctl.h +++ /dev/null @@ -1,62 +0,0 @@ -/*- - * Copyright (c) 2016 Stanislav Galabov. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MTK_SYSCTL_H_ -#define _MTK_SYSCTL_H_ - -/* System Control */ -#define SYSCTL_CHIPID0_3 0x00 -#define SYSCTL_CHIPID4_7 0x04 - -#define SYSCTL_REVID 0x0C -#define SYSCTL_REVID_MASK 0xFFFF -#define SYSCTL_MT7621_REV_E 0x0101 - -#define SYSCTL_SYSCFG 0x10 -#define SYSCTL_SYSCFG1 0x14 -#define SYSCTL_CLKCFG0 0x2C -#define SYSCTL_CLKCFG1 0x30 -#define SYSCTL_RSTCTRL 0x34 -#define SYSCTL_GPIOMODE 0x60 - -#define SYSCTL_CUR_CLK_STS 0x44 - -#define SYSCTL_MT7620_CPLL_CFG0 0x54 -#define SYSCTL_MT7620_CPLL_CFG1 0x58 - -#define SYSCFG1_USB_HOST_MODE (1<<10) - -#define RT3350_CHIPID0_3 0x33335452 - -#define MTK_UNKNOWN_CHIPID0_3 0x6E6B6E75 /* "unkn" */ -#define MTK_UNKNOWN_CHIPID4_7 0x206E776F /* "own " */ - -extern uint32_t mtk_sysctl_get(uint32_t); -extern void mtk_sysctl_set(uint32_t, uint32_t); -extern void mtk_sysctl_clr_set(uint32_t, uint32_t, uint32_t); - -#endif /* _MTK_SYSCTL_H_ */ diff --git a/sys/mips/mediatek/mtk_usb_phy.c b/sys/mips/mediatek/mtk_usb_phy.c deleted file mode 100644 index 7677d177de1..00000000000 --- a/sys/mips/mediatek/mtk_usb_phy.c +++ /dev/null @@ -1,324 +0,0 @@ -/*- - * Copyright (c) 2016 Stanislav Galabov. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include - -#include -#include -#include - -#define RESET_ASSERT_DELAY 1000 -#define RESET_DEASSERT_DELAY 10000 - -struct mtk_usb_phy_softc { - device_t dev; - struct resource * res; - uint32_t fm_base; - uint32_t u2_base; - uint32_t sr_coef; - uint32_t socid; -}; - -#define USB_PHY_READ(_sc, _off) bus_read_4((_sc)->res, (_off)) -#define USB_PHY_WRITE(_sc, _off, _val) bus_write_4((_sc)->res, (_off), (_val)) -#define USB_PHY_CLR_SET(_sc, _off, _clr, _set) \ - USB_PHY_WRITE(_sc, _off, ((USB_PHY_READ(_sc, _off) & ~(_clr)) | (_set))) - -#define USB_PHY_READ_U2(_sc, _off) \ - USB_PHY_READ((_sc), ((_sc)->u2_base + (_off))) -#define USB_PHY_WRITE_U2(_sc, _off, _val) \ - USB_PHY_WRITE((_sc), ((_sc)->u2_base + (_off)), (_val)) -#define USB_PHY_CLR_SET_U2(_sc, _off, _clr, _set) \ - USB_PHY_WRITE_U2((_sc), (_off), ((USB_PHY_READ_U2((_sc), (_off)) & \ - ~(_clr)) | (_set))) -#define USB_PHY_BARRIER(_sc) bus_barrier((_sc)->res, 0, 0, \ - BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ) - -#define USB_PHY_READ_FM(_sc, _off) \ - USB_PHY_READ((_sc), ((_sc)->fm_base + (_off))) -#define USB_PHY_WRITE_FM(_sc, _off) \ - USB_PHY_WRITE((_sc), ((_sc)->fm_base + (_off)), (_val)) -#define USB_PHY_CLR_SET_FM(_sc, _off, _clr, _set) \ - USB_PHY_WRITE_U2((_sc), (_off), ((USB_PHY_READ_U2((_sc), (_off)) & \ - ~(_clr)) | (_set))) - -static void mtk_usb_phy_mt7621_init(device_t); -static void mtk_usb_phy_mt7628_init(device_t); - -static struct ofw_compat_data compat_data[] = { - { "ralink,mt7620-usbphy", MTK_SOC_MT7620A }, - { "mediatek,mt7620-usbphy", MTK_SOC_MT7620A }, - { "ralink,mt7628an-usbphy", MTK_SOC_MT7628 }, - { "ralink,rt3352-usbphy", MTK_SOC_RT3352 }, - { "ralink,rt3050-usbphy", MTK_SOC_RT3050 }, - { NULL, MTK_SOC_UNKNOWN } -}; - -static int -mtk_usb_phy_probe(device_t dev) -{ - struct mtk_usb_phy_softc *sc = device_get_softc(dev); - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - if ((sc->socid = - ofw_bus_search_compatible(dev, compat_data)->ocd_data) == - MTK_SOC_UNKNOWN) - return (ENXIO); - - device_set_desc(dev, "MTK USB PHY"); - - return (0); -} - -static int -mtk_usb_phy_attach(device_t dev) -{ - struct mtk_usb_phy_softc * sc = device_get_softc(dev); - phandle_t node; - uint32_t val; - int rid; - - sc->dev = dev; - - /* Get our FDT node and SoC id */ - node = ofw_bus_get_node(dev); - - /* Now let's see about setting USB to host or device mode */ - /* XXX: is it the same for all SoCs? */ - val = mtk_sysctl_get(SYSCTL_SYSCFG1); - if (OF_hasprop(node, "mtk,usb-device")) - val &= ~SYSCFG1_USB_HOST_MODE; - else - val |= SYSCFG1_USB_HOST_MODE; - mtk_sysctl_set(SYSCTL_SYSCFG1, val); - - /* If we have clocks defined - enable them */ - if (OF_hasprop(node, "clocks")) - fdt_clock_enable_all(dev); - - /* If we have resets defined - perform a reset sequence */ - if (OF_hasprop(node, "resets")) { - fdt_reset_assert_all(dev); - DELAY(RESET_ASSERT_DELAY); - fdt_reset_deassert_all(dev); - DELAY(RESET_DEASSERT_DELAY); - } - - /* Careful, some devices actually require resources */ - if (OF_hasprop(node, "reg")) { - rid = 0; - sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (sc->res == NULL) { - device_printf(dev, "could not map memory\n"); - return (ENXIO); - } - } else { - sc->res = NULL; - } - - /* Some SoCs require specific USB PHY init... handle these */ - switch (sc->socid) { - case MTK_SOC_MT7628: /* Fallthrough */ - case MTK_SOC_MT7688: - if (sc->res == NULL) - return (ENXIO); - sc->fm_base = MT7628_FM_FEG_BASE; - sc->u2_base = MT7628_U2_BASE; - sc->sr_coef = MT7628_SR_COEF; - mtk_usb_phy_mt7628_init(dev); - break; - case MTK_SOC_MT7621: - if (sc->res == NULL) - return (ENXIO); - sc->fm_base = MT7621_FM_FEG_BASE; - sc->u2_base = MT7621_U2_BASE; - sc->sr_coef = MT7621_SR_COEF; - mtk_usb_phy_mt7621_init(dev); - break; - } - - /* We no longer need the resources, release them */ - if (sc->res != NULL) - bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->res); - - return (0); -} - -static int -mtk_usb_phy_detach(device_t dev) -{ - struct mtk_usb_phy_softc *sc = device_get_softc(dev); - phandle_t node; - - /* Get our FDT node */ - node = ofw_bus_get_node(dev); - - /* If we have resets defined - assert them */ - if (OF_hasprop(node, "resets")) - fdt_reset_assert_all(dev); - - /* If we have clocks defined - disable them */ - if (OF_hasprop(node, "clocks")) - fdt_clock_disable_all(dev); - - /* Finally, release resources, if any were allocated */ - if (sc->res != NULL) - bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->res); - - return (0); -} - -/* - * Things currently seem to work a lot better without slew rate calibration - * both on MT7621 and MT7688, so we leave it out for now. - */ -#ifdef notyet -static void -mtk_usb_phy_slew_rate_calibration(struct mtk_usb_phy_softc *sc) -{ - uint32_t val; - int i; - - USB_PHY_CLR_SET_U2(sc, U2_PHY_ACR0, 0, SRCAL_EN); - USB_PHY_BARRIER(sc); - DELAY(1000); - - USB_PHY_CLR_SET_FM(sc, U2_PHY_FMMONR1, 0, FRCK_EN); - USB_PHY_BARRIER(sc); - USB_PHY_CLR_SET_FM(sc, U2_PHY_FMCR0, CYCLECNT, 0x400); - USB_PHY_BARRIER(sc); - USB_PHY_CLR_SET_FM(sc, U2_PHY_FMCR0, 0, FDET_EN); - USB_PHY_BARRIER(sc); - - for (i = 0; i < 1000; i++) { - if ((val = USB_PHY_READ_FM(sc, U2_PHY_FMMONR0)) != 0) { - device_printf(sc->dev, "DONE with FDET\n"); - break; - } - DELAY(10000); - } - device_printf(sc->dev, "After FDET\n"); - - USB_PHY_CLR_SET_FM(sc, U2_PHY_FMCR0, FDET_EN, 0); - USB_PHY_BARRIER(sc); - USB_PHY_CLR_SET_FM(sc, U2_PHY_FMMONR1, FRCK_EN, 0); - USB_PHY_BARRIER(sc); - USB_PHY_CLR_SET_U2(sc, U2_PHY_ACR0, SRCAL_EN, 0); - USB_PHY_BARRIER(sc); - DELAY(1000); - - if (val == 0) { - USB_PHY_CLR_SET_U2(sc, U2_PHY_ACR0, SRCTRL, 0x4 << SRCTRL_OFF); - USB_PHY_BARRIER(sc); - } else { - val = ((((1024 * 25 * sc->sr_coef) / val) + 500) / 1000) & - SRCTRL_MSK; - USB_PHY_CLR_SET_U2(sc, U2_PHY_ACR0, SRCTRL, val << SRCTRL_OFF); - USB_PHY_BARRIER(sc); - } -} -#endif - -static void -mtk_usb_phy_mt7621_init(device_t dev) -{ -#ifdef notyet - struct mtk_usb_phy_softc *sc = device_get_softc(dev); - - /* Slew rate calibration only, but for 2 ports */ - mtk_usb_phy_slew_rate_calibration(sc); - - sc->u2_base = MT7621_U2_BASE_P1; - mtk_usb_phy_slew_rate_calibration(sc); -#endif -} - -static void -mtk_usb_phy_mt7628_init(device_t dev) -{ - struct mtk_usb_phy_softc *sc = device_get_softc(dev); - - /* XXX: possibly add barriers between the next writes? */ - USB_PHY_WRITE_U2(sc, U2_PHY_DCR0, 0x00ffff02); - USB_PHY_BARRIER(sc); - USB_PHY_WRITE_U2(sc, U2_PHY_DCR0, 0x00555502); - USB_PHY_BARRIER(sc); - USB_PHY_WRITE_U2(sc, U2_PHY_DCR0, 0x00aaaa02); - USB_PHY_BARRIER(sc); - USB_PHY_WRITE_U2(sc, U2_PHY_DCR0, 0x00000402); - USB_PHY_BARRIER(sc); - USB_PHY_WRITE_U2(sc, U2_PHY_AC0, 0x0048086a); - USB_PHY_BARRIER(sc); - USB_PHY_WRITE_U2(sc, U2_PHY_AC1, 0x4400001c); - USB_PHY_BARRIER(sc); - USB_PHY_WRITE_U2(sc, U2_PHY_ACR3, 0xc0200000); - USB_PHY_BARRIER(sc); - USB_PHY_WRITE_U2(sc, U2_PHY_DTM0, 0x02000000); - USB_PHY_BARRIER(sc); - -#ifdef notyet - /* Slew rate calibration */ - mtk_usb_phy_slew_rate_calibration(sc); -#endif -} - -static device_method_t mtk_usb_phy_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, mtk_usb_phy_probe), - DEVMETHOD(device_attach, mtk_usb_phy_attach), - DEVMETHOD(device_detach, mtk_usb_phy_detach), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - - DEVMETHOD_END -}; - -static driver_t mtk_usb_phy_driver = { - .name = "usbphy", - .methods = mtk_usb_phy_methods, - .size = sizeof(struct mtk_usb_phy_softc), -}; - -static devclass_t mtk_usb_phy_devclass; - -DRIVER_MODULE(usbphy, simplebus, mtk_usb_phy_driver, mtk_usb_phy_devclass, 0, - 0); diff --git a/sys/mips/mediatek/mtk_usb_phy.h b/sys/mips/mediatek/mtk_usb_phy.h deleted file mode 100644 index ea29c3304e5..00000000000 --- a/sys/mips/mediatek/mtk_usb_phy.h +++ /dev/null @@ -1,64 +0,0 @@ -/*- - * Copyright (c) 2016 Stanislav Galabov. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#ifndef _MTK_USB_PHY_H_ -#define _MTK_USB_PHY_H_ - -#define MT7621_FM_FEG_BASE 0x0100 -#define MT7621_U2_BASE 0x0800 -#define MT7621_U2_BASE_P1 0x1000 -#define MT7621_SR_COEF 28 - -#define MT7628_FM_FEG_BASE 0x0f00 -#define MT7628_U2_BASE 0x0800 -#define MT7628_SR_COEF 32 - -#define U2_PHY_AC0 0x00 -#define U2_PHY_AC1 0x04 -#define U2_PHY_AC2 0x08 -#define U2_PHY_ACR0 0x10 -#define SRCAL_EN (1<<23) -#define SRCTRL_MSK 0x7 -#define SRCTRL_OFF 16 -#define SRCTRL (SRCTRL_MSK< -/*- - * Copyright (c) 2015 Stanislav Galabov. All rights reserved. - * Copyright (c) 2010,2011 Aleksandr Rybalko. All rights reserved. - * Copyright (c) 2007-2008 Hans Petter Selasky. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include - -#define XHCI_HC_DEVSTR "MTK USB 3.0 controller" - -static device_probe_t mtk_xhci_fdt_probe; -static device_attach_t mtk_xhci_fdt_attach; -static device_detach_t mtk_xhci_fdt_detach; - -static void mtk_xhci_fdt_init(device_t dev); - -static int -mtk_xhci_fdt_probe(device_t self) -{ - - if (!ofw_bus_status_okay(self)) - return (ENXIO); - - if (!ofw_bus_is_compatible(self, "mediatek,mt8173-xhci")) - return (ENXIO); - - device_set_desc(self, XHCI_HC_DEVSTR); - - return (BUS_PROBE_DEFAULT); -} - -static int -mtk_xhci_fdt_attach(device_t self) -{ - struct xhci_softc *sc = device_get_softc(self); - int err; - int rid; - - /* initialise some bus fields */ - sc->sc_bus.parent = self; - sc->sc_bus.devices = sc->sc_devices; - sc->sc_bus.devices_max = XHCI_MAX_DEVICES; - - rid = 0; - sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (!sc->sc_io_res) { - device_printf(self, "Could not map memory\n"); - goto error; - } - sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); - sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); - sc->sc_io_size = rman_get_size(sc->sc_io_res); - - mtk_xhci_fdt_init(self); - - rid = 0; - sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE); - if (sc->sc_irq_res == NULL) { - device_printf(self, "Could not allocate irq\n"); - goto error; - } - - sc->sc_bus.bdev = device_add_child(self, "usbus", -1); - if (!(sc->sc_bus.bdev)) { - device_printf(self, "Could not add USB device\n"); - goto error; - } - device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); - device_set_desc(sc->sc_bus.bdev, XHCI_HC_DEVSTR); - - sprintf(sc->sc_vendor, "Mediatek"); - - err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, - NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl); - if (err) { - device_printf(self, "Could not setup irq, %d\n", err); - sc->sc_intr_hdl = NULL; - goto error; - } - - err = xhci_init(sc, self, 1); - if (err == 0) - err = xhci_halt_controller(sc); - if (err == 0) - err = xhci_start_controller(sc); - if (err == 0) - err = device_probe_and_attach(sc->sc_bus.bdev); - if (err) { - device_printf(self, "USB init failed err=%d\n", err); - goto error; - } - return (0); - -error: - mtk_xhci_fdt_detach(self); - return (ENXIO); -} - -static int -mtk_xhci_fdt_detach(device_t self) -{ - struct xhci_softc *sc = device_get_softc(self); - int err; - - /* during module unload there are lots of children leftover */ - device_delete_children(self); - - if (sc->sc_irq_res && sc->sc_intr_hdl) { - /* - * only call xhci_detach() after xhci_init() - */ - xhci_uninit(sc); - - err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); - if (err) - device_printf(self, "Could not tear down irq, %d\n", - err); - sc->sc_intr_hdl = NULL; - } - if (sc->sc_irq_res) { - bus_release_resource(self, SYS_RES_IRQ, 0, - sc->sc_irq_res); - sc->sc_irq_res = NULL; - } - if (sc->sc_io_res) { - bus_release_resource(self, SYS_RES_MEMORY, 0, - sc->sc_io_res); - sc->sc_io_res = NULL; - } - - return (0); -} - -static device_method_t mtk_xhci_fdt_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, mtk_xhci_fdt_probe), - DEVMETHOD(device_attach, mtk_xhci_fdt_attach), - DEVMETHOD(device_detach, mtk_xhci_fdt_detach), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - - DEVMETHOD_END -}; - -static driver_t mtk_xhci_fdt_driver = { - .name = "xhci", - .methods = mtk_xhci_fdt_methods, - .size = sizeof(struct xhci_softc), -}; - -static devclass_t mtk_xhci_fdt_devclass; - -DRIVER_MODULE(xhci, simplebus, mtk_xhci_fdt_driver, mtk_xhci_fdt_devclass, 0, - 0); - -#define USB_HDMA_CFG 0x950 -#define USB_HDMA_CFG_MT7621_VAL 0x10E0E0C - -#define U3_LTSSM_TIMING_PARAM3 0x2514 -#define U3_LTSSM_TIMING_VAL 0x3E8012C - -#define SYNC_HS_EOF 0x938 -#define SYNC_HS_EOF_VAL 0x201F3 - -#define USB_IP_SPAR0 0x107C8 -#define USB_IP_SPAR0_VAL 1 - -#define U2_PHY_BASE_P0 0x10800 -#define U2_PHY_BASE_P1 0x11000 -#define U2_PHYD_CR1 0x64 -#define U2_PHYD_CR1_MASK (3<<18) -#define U2_PHYD_CR1_VAL (1<<18) - -#define USB_IP_PW_CTRL 0x10700 -#define USB_IP_PW_CTRL_1 0x10704 -#define USB_IP_CAP 0x10724 -#define USB_U3_CTRL(p) (0x10730 + ((p) * 0x08)) -#define USB_U2_CTRL(p) (0x10750 + ((p) * 0x08)) - -#define USB_IP_SW_RST (1 << 0) -#define USB_IP_PDN (1 << 0) - -#define USB_PORT_DIS (1 << 0) -#define USB_PORT_PDN (1 << 1) - -#define U3_PORT_NUM(p) (p & 0xFF) -#define U2_PORT_NUM(p) ((p>>8) & 0xFF) - -#define RD4(_sc, _reg) bus_read_4((_sc)->sc_io_res, (_reg)) -#define WR4(_sc, _reg, _val) bus_write_4((_sc)->sc_io_res, (_reg), (_val)) -#define CLRSET4(_sc, _reg, _clr, _set) \ - WR4((_sc), (_reg), (RD4((_sc), (_reg)) & ~(_clr)) | (_set)) - -static void -mtk_xhci_fdt_init(device_t dev) -{ - struct xhci_softc *sc; - uint32_t temp, u3_ports, u2_ports, i; - - sc = device_get_softc(dev); - - temp = RD4(sc, USB_IP_CAP); - u3_ports = U3_PORT_NUM(temp); - u2_ports = U2_PORT_NUM(temp); - - device_printf(dev, "%d USB3 ports, %d USB2 ports\n", - u3_ports, u2_ports); - - CLRSET4(sc, USB_IP_PW_CTRL, 0, USB_IP_SW_RST); - CLRSET4(sc, USB_IP_PW_CTRL, USB_IP_SW_RST, 0); - CLRSET4(sc, USB_IP_PW_CTRL_1, USB_IP_PDN, 0); - - for (i = 0; i < u3_ports; i++) - CLRSET4(sc, USB_U3_CTRL(i), USB_PORT_PDN | USB_PORT_DIS, 0); - - for (i = 0; i < u2_ports; i++) - CLRSET4(sc, USB_U2_CTRL(i), USB_PORT_PDN | USB_PORT_DIS, 0); - - DELAY(100000); - - WR4(sc, USB_HDMA_CFG, USB_HDMA_CFG_MT7621_VAL); - WR4(sc, U3_LTSSM_TIMING_PARAM3, U3_LTSSM_TIMING_VAL); - WR4(sc, SYNC_HS_EOF, SYNC_HS_EOF_VAL); - WR4(sc, USB_IP_SPAR0, USB_IP_SPAR0_VAL); - CLRSET4(sc, U2_PHY_BASE_P0 + U2_PHYD_CR1, U2_PHYD_CR1_MASK, - U2_PHYD_CR1_VAL); - CLRSET4(sc, U2_PHY_BASE_P1 + U2_PHYD_CR1, U2_PHYD_CR1_MASK, - U2_PHYD_CR1_VAL); -} diff --git a/sys/mips/mediatek/palmbus.c b/sys/mips/mediatek/palmbus.c deleted file mode 100644 index 56eb19aada9..00000000000 --- a/sys/mips/mediatek/palmbus.c +++ /dev/null @@ -1,80 +0,0 @@ -/*- - * Copyright (c) 2016 Stanislav Galabov. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -/* - * Driver for Mediatek/Ralink Palmbus - * - * Currently the only reason for the existence of this driver is so that we can - * minimize the changes required to the upstream DTS files we use. - * Otherwise palmbus is a very simple subclass of our simplebus and the only - * difference between the two is the actual value of the compatible property. - */ - -static int -palmbus_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!(ofw_bus_is_compatible(dev, "palmbus") && - ofw_bus_has_prop(dev, "ranges")) && - (ofw_bus_get_type(dev) == NULL || strcmp(ofw_bus_get_type(dev), - "soc") != 0)) - return (ENXIO); - - device_set_desc(dev, "MTK Palmbus"); - - return (0); -} - -static device_method_t palmbus_methods[] = { - DEVMETHOD(device_probe, palmbus_probe), - - DEVMETHOD_END -}; - -DEFINE_CLASS_1(palmbus, palmbus_driver, palmbus_methods, - sizeof(struct simplebus_softc), simplebus_driver); -static devclass_t palmbus_devclass; -EARLY_DRIVER_MODULE(palmbus, ofwbus, palmbus_driver, palmbus_devclass, 0, 0, - BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE); -MODULE_VERSION(palmbus, 1); diff --git a/sys/mips/mediatek/std.mediatek b/sys/mips/mediatek/std.mediatek deleted file mode 100644 index fc264dbb8dc..00000000000 --- a/sys/mips/mediatek/std.mediatek +++ /dev/null @@ -1,86 +0,0 @@ -# -# std.mtk -- Base kernel configuration file for FreeBSD/MIPS Mediatek/Ralink -# SoCs. -# -# This includes all the required drivers for the SoCs. -# -# - -# Include the standard file list for Mediatek SoCs. -files "../mediatek/files.mediatek" - -# Building a mips/mipsel kernel -machine mips mipsel - -# Little-endian machine -makeoptions MIPS_LITTLE_ENDIAN=defined - -# Default kernel load address -makeoptions KERNLOADADDR=0x80001000 - -# Mediatek/Ralink SoC support depends on FDT (with static DTB for the moment) -options FDT -options FDT_DTB_STATIC - -# We rely on INTRNG code -options INTRNG -options MIPS_NIRQ=256 - -# We rely on NEW_PCIB code -options NEW_PCIB - -# Build kernel with gdb(1) debug symbols -makeoptions DEBUG=-g - -# Support for DDB and KDB -options DDB -options KDB - -# Debugging for use in -current -options INVARIANTS -options INVARIANT_SUPPORT -options WITNESS -options WITNESS_SKIPSPIN -options DEBUG_REDZONE -options DEBUG_MEMGUARD - -# For small memory footprints -options VM_KMEM_SIZE_SCALE=1 - -# General options, including scheduler, etc. -options SCHED_ULE # ULE scheduler -options INET # InterNETworking -#options INET6 # IPv6 -options PSEUDOFS # Pseude-filesystem framework -options FFS # Berkeley Fast Filesystem -#options SOFTUPDATES # Enable FFS soft updates support -#options UFS_ACL # Support for access control lists -#options UFS_DIRHASH # Improve big directory performance -#options MSDOSFS # Enable support for MSDOS filesystems -options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time ext. - -# -# Standard drivers section -# -# The drivers in the following section are required in order to successfully -# compile the kernel. -# - -# FDT clock and pinctrl framework -device fdt_clock -device fdt_pinctrl - -# UART support -device uart - -# loop device support -device loop - -# ether device support -device ether - -# ether switch support -device etherswitch -device miibus -device mtkswitch -device mdio diff --git a/sys/mips/mediatek/std.rt2880 b/sys/mips/mediatek/std.rt2880 deleted file mode 100644 index 39efba40ec7..00000000000 --- a/sys/mips/mediatek/std.rt2880 +++ /dev/null @@ -1,85 +0,0 @@ -# -# std.rt2880 -- Base kernel configuration file for FreeBSD/MIPS RT2800 SoC -# -# This includes all the required drivers for the SoCs. -# -# - -# Include the standard file list for Mediatek SoCs. -files "../mediatek/files.mediatek" - -# Building a mips/mipsel kernel -machine mips mipsel - -# Little-endian machine -makeoptions MIPS_LITTLE_ENDIAN=defined - -# Default kernel load address -makeoptions KERNLOADADDR=0x88001000 - -# Mediatek/Ralink SoC support depends on FDT (with static DTB for the moment) -options FDT -options FDT_DTB_STATIC - -# We rely on INTRNG code -options INTRNG -options MIPS_NIRQ=256 - -# We rely on NEW_PCIB code -options NEW_PCIB - -# Build kernel with gdb(1) debug symbols -makeoptions DEBUG=-g - -# Support for DDB and KDB -options DDB -options KDB - -# Debugging for use in -current -options INVARIANTS -options INVARIANT_SUPPORT -options WITNESS -options WITNESS_SKIPSPIN -options DEBUG_REDZONE -options DEBUG_MEMGUARD - -# For small memory footprints -options VM_KMEM_SIZE_SCALE=1 - -# General options, including scheduler, etc. -options SCHED_ULE # ULE scheduler -options INET # InterNETworking -#options INET6 # IPv6 -options PSEUDOFS # Pseude-filesystem framework -options FFS # Berkeley Fast Filesystem -#options SOFTUPDATES # Enable FFS soft updates support -#options UFS_ACL # Support for access control lists -#options UFS_DIRHASH # Improve big directory performance -#options MSDOSFS # Enable support for MSDOS filesystems -options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time ext. - -# -# Standard drivers section -# -# The drivers in the following section are required in order to successfully -# compile the kernel. -# - -# FDT clock and pinctrl framework -device fdt_clock -device fdt_pinctrl - -# UART support -device uart - -# loop device support -device loop - -# ether device support -device ether - -# ether switch support -#device etherswitch -#device miibus -#device ip17x -#device mdio diff --git a/sys/mips/mediatek/uart_dev_mtk.c b/sys/mips/mediatek/uart_dev_mtk.c deleted file mode 100644 index eb86cc61340..00000000000 --- a/sys/mips/mediatek/uart_dev_mtk.c +++ /dev/null @@ -1,549 +0,0 @@ -/* $NetBSD: uart.c,v 1.2 2007/03/23 20:05:47 dogcow Exp $ */ - -/*- - * Copyright (c) 2013, Alexander A. Mityaev - * Copyright (c) 2010 Aleksandr Rybalko. - * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko. - * Copyright (c) 2007 Oleksandr Tymoshenko. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A - * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include - -#include "uart_if.h" - -/* Set some reference clock value. Real value will be taken from FDT */ -#define DEFAULT_RCLK (120 * 1000 * 1000) - -/* - * Low-level UART interface. - */ -static int mtk_uart_probe(struct uart_bas *bas); -static void mtk_uart_init(struct uart_bas *bas, int, int, int, int); -static void mtk_uart_term(struct uart_bas *bas); -static void mtk_uart_putc(struct uart_bas *bas, int); -static int mtk_uart_rxready(struct uart_bas *bas); -static int mtk_uart_getc(struct uart_bas *bas, struct mtx *); - -static struct uart_ops uart_mtk_ops = { - .probe = mtk_uart_probe, - .init = mtk_uart_init, - .term = mtk_uart_term, - .putc = mtk_uart_putc, - .rxready = mtk_uart_rxready, - .getc = mtk_uart_getc, -}; - -static int uart_output = 1; -TUNABLE_INT("kern.uart_output", &uart_output); -SYSCTL_INT(_kern, OID_AUTO, uart_output, CTLFLAG_RW, - &uart_output, 0, "UART output enabled."); - -static int -mtk_uart_probe(struct uart_bas *bas) -{ - return (0); -} - -static void -mtk_uart_init(struct uart_bas *bas, int baudrate, int databits, - int stopbits, int parity) -{ - /* CLKDIV = 384000000/ 3/ 16/ br */ - /* for 384MHz CLKDIV = 8000000 / baudrate; */ - switch (databits) { - case 5: - databits = UART_LCR_5B; - break; - case 6: - databits = UART_LCR_6B; - break; - case 7: - databits = UART_LCR_7B; - break; - case 8: - databits = UART_LCR_8B; - break; - default: - /* Unsupported */ - return; - } - switch (parity) { - case UART_PARITY_EVEN: parity = (UART_LCR_PEN|UART_LCR_EVEN); break; - case UART_PARITY_ODD: parity = (UART_LCR_PEN); break; - case UART_PARITY_NONE: parity = 0; break; - /* Unsupported */ - default: return; - } - - if (bas->rclk && baudrate) { - uart_setreg(bas, UART_CDDL_REG, bas->rclk/16/baudrate); - uart_barrier(bas); - } - - uart_setreg(bas, UART_LCR_REG, databits | - (stopbits==1?0:UART_LCR_STB_15) | - parity); - uart_barrier(bas); -} - -static void -mtk_uart_term(struct uart_bas *bas) -{ - uart_setreg(bas, UART_MCR_REG, 0); - uart_barrier(bas); -} - -static void -mtk_uart_putc(struct uart_bas *bas, int c) -{ - char chr; - if (!uart_output) return; - chr = c; - while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_THRE)); - uart_setreg(bas, UART_TX_REG, c); - uart_barrier(bas); - while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_THRE)); -} - -static int -mtk_uart_rxready(struct uart_bas *bas) -{ - if (uart_getreg(bas, UART_LSR_REG) & UART_LSR_DR) - return (1); - return (0); -} - -static int -mtk_uart_getc(struct uart_bas *bas, struct mtx *hwmtx) -{ - int c; - - uart_lock(hwmtx); - - while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_DR)) { - uart_unlock(hwmtx); - DELAY(10); - uart_lock(hwmtx); - } - - c = uart_getreg(bas, UART_RX_REG); - - uart_unlock(hwmtx); - - return (c); -} - -/* - * High-level UART interface. - */ -struct uart_mtk_softc { - struct uart_softc base; - uint8_t ier_mask; - uint8_t ier; -}; - -static int mtk_uart_bus_attach(struct uart_softc *); -static int mtk_uart_bus_detach(struct uart_softc *); -static int mtk_uart_bus_flush(struct uart_softc *, int); -static int mtk_uart_bus_getsig(struct uart_softc *); -static int mtk_uart_bus_ioctl(struct uart_softc *, int, intptr_t); -static int mtk_uart_bus_ipend(struct uart_softc *); -static int mtk_uart_bus_param(struct uart_softc *, int, int, int, int); -static int mtk_uart_bus_probe(struct uart_softc *); -static int mtk_uart_bus_receive(struct uart_softc *); -static int mtk_uart_bus_setsig(struct uart_softc *, int); -static int mtk_uart_bus_transmit(struct uart_softc *); -static void mtk_uart_bus_grab(struct uart_softc *); -static void mtk_uart_bus_ungrab(struct uart_softc *); - -static kobj_method_t uart_mtk_methods[] = { - KOBJMETHOD(uart_attach, mtk_uart_bus_attach), - KOBJMETHOD(uart_detach, mtk_uart_bus_detach), - KOBJMETHOD(uart_flush, mtk_uart_bus_flush), - KOBJMETHOD(uart_getsig, mtk_uart_bus_getsig), - KOBJMETHOD(uart_ioctl, mtk_uart_bus_ioctl), - KOBJMETHOD(uart_ipend, mtk_uart_bus_ipend), - KOBJMETHOD(uart_param, mtk_uart_bus_param), - KOBJMETHOD(uart_probe, mtk_uart_bus_probe), - KOBJMETHOD(uart_receive, mtk_uart_bus_receive), - KOBJMETHOD(uart_setsig, mtk_uart_bus_setsig), - KOBJMETHOD(uart_transmit, mtk_uart_bus_transmit), - KOBJMETHOD(uart_grab, mtk_uart_bus_grab), - KOBJMETHOD(uart_ungrab, mtk_uart_bus_ungrab), - { 0, 0 } -}; - -struct uart_class uart_mtk_class = { - "uart_mtk", - uart_mtk_methods, - sizeof(struct uart_mtk_softc), - .uc_ops = &uart_mtk_ops, - .uc_range = 1, /* use hinted range */ - .uc_rclk = 0 -}; - -static struct ofw_compat_data compat_data[] = { - { "ralink,rt2880-uart", (uintptr_t)&uart_mtk_class }, - { "ralink,rt3050-uart", (uintptr_t)&uart_mtk_class }, - { "ralink,rt3352-uart", (uintptr_t)&uart_mtk_class }, - { "ralink,rt3883-uart", (uintptr_t)&uart_mtk_class }, - { "ralink,rt5350-uart", (uintptr_t)&uart_mtk_class }, - { "ralink,mt7620a-uart", (uintptr_t)&uart_mtk_class }, - { NULL, (uintptr_t)NULL }, -}; -UART_FDT_CLASS_AND_DEVICE(compat_data); - -#define SIGCHG(c, i, s, d) \ - if (c) { \ - i |= (i & s) ? s : s | d; \ - } else { \ - i = (i & s) ? (i & ~s) | d : i; \ - } - -/* - * Disable TX interrupt. uart should be locked - */ -static __inline void -mtk_uart_disable_txintr(struct uart_softc *sc) -{ - struct uart_bas *bas = &sc->sc_bas; - uint8_t cr; - - cr = uart_getreg(bas, UART_IER_REG); - cr &= ~UART_IER_ETBEI; - uart_setreg(bas, UART_IER_REG, cr); - uart_barrier(bas); -} - -/* - * Enable TX interrupt. uart should be locked - */ -static __inline void -mtk_uart_enable_txintr(struct uart_softc *sc) -{ - struct uart_bas *bas = &sc->sc_bas; - uint8_t cr; - - cr = uart_getreg(bas, UART_IER_REG); - cr |= UART_IER_ETBEI; - uart_setreg(bas, UART_IER_REG, cr); - uart_barrier(bas); -} - -static int -mtk_uart_bus_attach(struct uart_softc *sc) -{ - struct uart_bas *bas; - struct uart_devinfo *di; - struct uart_mtk_softc *usc = (struct uart_mtk_softc *)sc; - - bas = &sc->sc_bas; - - if (!bas->rclk) { - bas->rclk = mtk_soc_get_uartclk(); - } - - if (sc->sc_sysdev != NULL) { - di = sc->sc_sysdev; - mtk_uart_init(bas, di->baudrate, di->databits, di->stopbits, - di->parity); - } else { - mtk_uart_init(bas, 57600, 8, 1, 0); - } - - sc->sc_rxfifosz = 16; - sc->sc_txfifosz = 16; - - (void)mtk_uart_bus_getsig(sc); - - /* Enable FIFO */ - uart_setreg(bas, UART_FCR_REG, - uart_getreg(bas, UART_FCR_REG) | - UART_FCR_FIFOEN | UART_FCR_TXTGR_1 | UART_FCR_RXTGR_1); - uart_barrier(bas); - /* Enable interrupts */ - usc->ier_mask = 0xf0; - uart_setreg(bas, UART_IER_REG, - UART_IER_EDSSI | UART_IER_ELSI | UART_IER_ERBFI); - uart_barrier(bas); - - return (0); -} - -static int -mtk_uart_bus_detach(struct uart_softc *sc) -{ - return (0); -} - -static int -mtk_uart_bus_flush(struct uart_softc *sc, int what) -{ - struct uart_bas *bas = &sc->sc_bas; - uint32_t fcr = uart_getreg(bas, UART_FCR_REG); - - if (what & UART_FLUSH_TRANSMITTER) { - uart_setreg(bas, UART_FCR_REG, fcr|UART_FCR_TXRST); - uart_barrier(bas); - } - if (what & UART_FLUSH_RECEIVER) { - uart_setreg(bas, UART_FCR_REG, fcr|UART_FCR_RXRST); - uart_barrier(bas); - } - uart_setreg(bas, UART_FCR_REG, fcr); - uart_barrier(bas); - return (0); -} - -static int -mtk_uart_bus_getsig(struct uart_softc *sc) -{ - uint32_t new, old, sig; - uint8_t bes; - - return(0); - do { - old = sc->sc_hwsig; - sig = old; - uart_lock(sc->sc_hwmtx); - bes = uart_getreg(&sc->sc_bas, UART_MSR_REG); - uart_unlock(sc->sc_hwmtx); - /* XXX: chip can show delta */ - SIGCHG(bes & UART_MSR_CTS, sig, SER_CTS, SER_DCTS); - SIGCHG(bes & UART_MSR_DCD, sig, SER_DCD, SER_DDCD); - SIGCHG(bes & UART_MSR_DSR, sig, SER_DSR, SER_DDSR); - new = sig & ~SER_MASK_DELTA; - } while (!atomic_cmpset_32(&sc->sc_hwsig, old, new)); - - return (sig); -} - -static int -mtk_uart_bus_ioctl(struct uart_softc *sc, int request, intptr_t data) -{ - struct uart_bas *bas; - int baudrate, divisor, error; - - bas = &sc->sc_bas; - error = 0; - uart_lock(sc->sc_hwmtx); - switch (request) { - case UART_IOCTL_BREAK: - /* TODO: Send BREAK */ - break; - case UART_IOCTL_BAUD: - divisor = uart_getreg(bas, UART_CDDL_REG); - baudrate = bas->rclk / (divisor * 16); - *(int*)data = baudrate; - break; - default: - error = EINVAL; - break; - } - uart_unlock(sc->sc_hwmtx); - return (error); -} - -static int -mtk_uart_bus_ipend(struct uart_softc *sc) -{ - struct uart_bas *bas; - int ipend; - uint8_t iir, lsr, msr; - -// breakpoint(); - - bas = &sc->sc_bas; - ipend = 0; - - uart_lock(sc->sc_hwmtx); - iir = uart_getreg(&sc->sc_bas, UART_IIR_REG); - lsr = uart_getreg(&sc->sc_bas, UART_LSR_REG); - uart_setreg(&sc->sc_bas, UART_LSR_REG, lsr); - msr = uart_getreg(&sc->sc_bas, UART_MSR_REG); - uart_setreg(&sc->sc_bas, UART_MSR_REG, msr); - if (iir & UART_IIR_INTP) { - uart_unlock(sc->sc_hwmtx); - return (0); - } - switch ((iir >> 1) & 0x07) { - case UART_IIR_ID_THRE: - ipend |= SER_INT_TXIDLE; - break; - case UART_IIR_ID_DR2: - mtk_uart_bus_flush(sc, UART_FLUSH_RECEIVER); - /* passthrough */ - case UART_IIR_ID_DR: - ipend |= SER_INT_RXREADY; - break; - case UART_IIR_ID_MST: - case UART_IIR_ID_LINESTATUS: - ipend |= SER_INT_SIGCHG; - if (lsr & UART_LSR_BI) - ipend |= SER_INT_BREAK; - if (lsr & UART_LSR_OE) - ipend |= SER_INT_OVERRUN; - break; - default: - /* XXX: maybe return error here */ - break; - } - - uart_unlock(sc->sc_hwmtx); - - return (ipend); -} - -static int -mtk_uart_bus_param(struct uart_softc *sc, int baudrate, int databits, - int stopbits, int parity) -{ - uart_lock(sc->sc_hwmtx); - mtk_uart_init(&sc->sc_bas, baudrate, databits, stopbits, parity); - uart_unlock(sc->sc_hwmtx); - return (0); -} - -static int -mtk_uart_bus_probe(struct uart_softc *sc) -{ - int error; - - error = mtk_uart_probe(&sc->sc_bas); - if (error) - return (error); - - device_set_desc(sc->sc_dev, "MTK UART Controller"); - - return (0); -} - -static int -mtk_uart_bus_receive(struct uart_softc *sc) -{ - struct uart_bas *bas; - int xc; - uint8_t lsr; - - bas = &sc->sc_bas; - uart_lock(sc->sc_hwmtx); - lsr = uart_getreg(bas, UART_LSR_REG); - while ((lsr & UART_LSR_DR)) { - if (uart_rx_full(sc)) { - sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; - break; - } - xc = 0; - xc = uart_getreg(bas, UART_RX_REG); - if (lsr & UART_LSR_FE) - xc |= UART_STAT_FRAMERR; - if (lsr & UART_LSR_PE) - xc |= UART_STAT_PARERR; - if (lsr & UART_LSR_OE) - xc |= UART_STAT_OVERRUN; - uart_barrier(bas); - uart_rx_put(sc, xc); - lsr = uart_getreg(bas, UART_LSR_REG); - } - - uart_unlock(sc->sc_hwmtx); - return (0); -} - -static int -mtk_uart_bus_setsig(struct uart_softc *sc, int sig) -{ - /* TODO: implement (?) */ - return (sig); -} - -static int -mtk_uart_bus_transmit(struct uart_softc *sc) -{ - struct uart_bas *bas = &sc->sc_bas; - int i; - - if (!uart_output) return (0); - - bas = &sc->sc_bas; - uart_lock(sc->sc_hwmtx); - while ((uart_getreg(bas, UART_LSR_REG) & UART_LSR_THRE) == 0); - mtk_uart_enable_txintr(sc); - for (i = 0; i < sc->sc_txdatasz; i++) { - uart_setreg(bas, UART_TX_REG, sc->sc_txbuf[i]); - uart_barrier(bas); - } - sc->sc_txbusy = 1; - uart_unlock(sc->sc_hwmtx); - return (0); -} - -void -mtk_uart_bus_grab(struct uart_softc *sc) -{ - struct uart_bas *bas = &sc->sc_bas; - struct uart_mtk_softc *usc = (struct uart_mtk_softc *)sc; - - uart_lock(sc->sc_hwmtx); - usc->ier = uart_getreg(bas, UART_IER_REG); - uart_setreg(bas, UART_IER_REG, usc->ier & usc->ier_mask); - uart_barrier(bas); - uart_unlock(sc->sc_hwmtx); -} - -void -mtk_uart_bus_ungrab(struct uart_softc *sc) -{ - struct uart_mtk_softc *usc = (struct uart_mtk_softc *)sc; - struct uart_bas *bas = &sc->sc_bas; - - uart_lock(sc->sc_hwmtx); - uart_setreg(bas, UART_IER_REG, usc->ier); - uart_barrier(bas); - uart_unlock(sc->sc_hwmtx); -} diff --git a/sys/mips/mediatek/uart_dev_mtk.h b/sys/mips/mediatek/uart_dev_mtk.h deleted file mode 100644 index 39fe94916ec..00000000000 --- a/sys/mips/mediatek/uart_dev_mtk.h +++ /dev/null @@ -1,124 +0,0 @@ -/*- - * Copyright (c) 2010 Aleksandr Rybalko. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or - * without modification, are permitted provided that the following - * conditions are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * 3. The names of the authors may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A - * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY - * OF SUCH DAMAGE. - */ -#ifndef _MTKUART_H -#define _MTKUART_H - -#undef uart_getreg -#undef uart_setreg -#define uart_getreg(bas, reg) \ - bus_space_read_4((bas)->bst, (bas)->bsh, reg) -#define uart_setreg(bas, reg, value) \ - bus_space_write_4((bas)->bst, (bas)->bsh, reg, value) - -/* UART registers */ -#define UART_RX_REG 0x00 -#define UART_TX_REG 0x04 - -#define UART_IER_REG 0x08 -#define UART_IER_EDSSI (1<<3) /* Only full UART */ -#define UART_IER_ELSI (1<<2) -#define UART_IER_ETBEI (1<<1) -#define UART_IER_ERBFI (1<<0) - -#define UART_IIR_REG 0x0c -#define UART_IIR_RXFIFO (1<<7) -#define UART_IIR_TXFIFO (1<<6) -#define UART_IIR_ID_MST 0 -#define UART_IIR_ID_THRE 1 -#define UART_IIR_ID_DR 2 -#define UART_IIR_ID_LINESTATUS 3 -#define UART_IIR_ID_DR2 6 -#define UART_IIR_ID_SHIFT 1 -#define UART_IIR_ID_MASK 0x0000000e -#define UART_IIR_INTP (1<<0) - -#define UART_FCR_REG 0x10 -#define UART_FCR_RXTGR_1 (0<<6) -#define UART_FCR_RXTGR_4 (1<<6) -#define UART_FCR_RXTGR_8 (2<<6) -#define UART_FCR_RXTGR_12 (3<<6) -#define UART_FCR_TXTGR_1 (0<<4) -#define UART_FCR_TXTGR_4 (1<<4) -#define UART_FCR_TXTGR_8 (2<<4) -#define UART_FCR_TXTGR_12 (3<<4) -#define UART_FCR_DMA (1<<3) -#define UART_FCR_TXRST (1<<2) -#define UART_FCR_RXRST (1<<1) -#define UART_FCR_FIFOEN (1<<0) - -#define UART_LCR_REG 0x14 -#define UART_LCR_DLAB (1<<7) -#define UART_LCR_BRK (1<<6) -#define UART_LCR_FPAR (1<<5) -#define UART_LCR_EVEN (1<<4) -#define UART_LCR_PEN (1<<3) -#define UART_LCR_STB_15 (1<<2) -#define UART_LCR_5B 0 -#define UART_LCR_6B 1 -#define UART_LCR_7B 2 -#define UART_LCR_8B 3 - -#define UART_MCR_REG 0x18 -#define UART_MCR_LOOP (1<<4) -#define UART_MCR_OUT2_L (1<<3) /* Only full UART */ -#define UART_MCR_OUT1_L (1<<2) /* Only full UART */ -#define UART_MCR_RTS_L (1<<1) /* Only full UART */ -#define UART_MCR_DTR_L (1<<0) /* Only full UART */ - -#define UART_LSR_REG 0x1c -#define UART_LSR_ERINF (1<<7) -#define UART_LSR_TEMT (1<<6) -#define UART_LSR_THRE (1<<5) -#define UART_LSR_BI (1<<4) -#define UART_LSR_FE (1<<3) -#define UART_LSR_PE (1<<2) -#define UART_LSR_OE (1<<1) -#define UART_LSR_DR (1<<0) - -#define UART_MSR_REG 0x20 /* Only full UART */ -#define UART_MSR_DCD (1<<7) /* Only full UART */ -#define UART_MSR_RI (1<<6) /* Only full UART */ -#define UART_MSR_DSR (1<<5) /* Only full UART */ -#define UART_MSR_CTS (1<<4) /* Only full UART */ -#define UART_MSR_DDCD (1<<3) /* Only full UART */ -#define UART_MSR_TERI (1<<2) /* Only full UART */ -#define UART_MSR_DDSR (1<<1) /* Only full UART */ -#define UART_MSR_DCTS (1<<0) /* Only full UART */ - -#define UART_CDDL_REG 0x28 -#define UART_CDDLL_REG 0x2c -#define UART_CDDLH_REG 0x30 - -#define UART_IFCTL_REG 0x34 -#define UART_IFCTL_IFCTL (1<<0) - -int uart_cnattach(void); -#endif /* _MTKUART_H */ diff --git a/sys/mips/mips/autoconf.c b/sys/mips/mips/autoconf.c deleted file mode 100644 index 1d1bc04904e..00000000000 --- a/sys/mips/mips/autoconf.c +++ /dev/null @@ -1,113 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1990 The Regents of the University of California. - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * William Jolitz. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)autoconf.c 7.1 (Berkeley) 5/9/91 - */ - -#include -/* - * Setup the system to run on the current machine. - * - * Configure() is called at boot time and initializes the vba - * device tables and the memory controller monitoring. Available - * devices are determined (from possibilities mentioned in ioconf.c), - * and the drivers are initialized. - */ -#include "opt_bootp.h" -#include "opt_bus.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -static void configure_first(void *); -static void configure(void *); -static void configure_final(void *); - -SYSINIT(configure1, SI_SUB_CONFIGURE, SI_ORDER_FIRST, configure_first, NULL); -/* SI_ORDER_SECOND is hookable */ -SYSINIT(configure2, SI_SUB_CONFIGURE, SI_ORDER_THIRD, configure, NULL); -/* SI_ORDER_MIDDLE is hookable */ -SYSINIT(configure3, SI_SUB_CONFIGURE, SI_ORDER_ANY, configure_final, NULL); - -/* - * Determine i/o configuration for a machine. - */ -static void -configure_first(dummy) - void *dummy; -{ - - /* nexus0 is the top of the mips device tree */ - device_add_child(root_bus, "nexus", 0); -} - -static void -configure(dummy) - void *dummy; -{ - - /* initialize new bus architecture */ - root_bus_configure(); -} - -static void -configure_final(dummy) - void *dummy; -{ - intr_enable(); - - cninit_finish(); - - if (bootverbose) - printf("Device configuration finished.\n"); - - cold = 0; -} diff --git a/sys/mips/mips/bcopy.S b/sys/mips/mips/bcopy.S deleted file mode 100644 index 1b0b660da25..00000000000 --- a/sys/mips/mips/bcopy.S +++ /dev/null @@ -1,285 +0,0 @@ -/* $NetBSD: bcopy.S,v 1.3 2009/12/14 00:39:00 matt Exp $ */ - -/* - * Mach Operating System - * Copyright (c) 1993 Carnegie Mellon University - * All Rights Reserved. - * - * Permission to use, copy, modify and distribute this software and its - * documentation is hereby granted, provided that both the copyright - * notice and this permission notice appear in all copies of the - * software, derivative works or modified versions, and any portions - * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR - * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * - * Carnegie Mellon requests users of this software to return to - * - * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU - * School of Computer Science - * Carnegie Mellon University - * Pittsburgh PA 15213-3890 - * - * any improvements or extensions that they make and grant Carnegie Mellon - * the rights to redistribute these changes. - */ - -/* - * File: mips_bcopy.s - * Author: Chris Maeda - * Date: June 1993 - * - * Fast copy routine. Derived from aligned_block_copy. - */ - - -#include -#include - -#if defined(LIBC_SCCS) && !defined(lint) -#if 0 - ASMSTR("from: @(#)mips_bcopy.s 2.2 CMU 18/06/93") -#else - ASMSTR("$NetBSD: bcopy.S,v 1.3 2009/12/14 00:39:00 matt Exp $") -#endif -#endif /* LIBC_SCCS and not lint */ - -#ifdef __ABICALLS__ - .abicalls -#endif - -/* - * bcopy(caddr_t src, caddr_t dst, unsigned int len) - * - * a0 src address - * a1 dst address - * a2 length - */ - -#define SRCREG a0 -#define DSTREG a1 -#define SIZEREG a2 - -LEAF(memcpy) -XLEAF(memmove) - .set noat - .set noreorder - - move v0, a0 - move a0, a1 - move a1, v0 - -XLEAF(bcopy) -XLEAF(ovbcopy) - /* - * Make sure we can copy forwards. - */ - sltu t0,SRCREG,DSTREG # t0 == SRCREG < DSTREG - bne t0,zero,6f # copy backwards - - /* - * There are four alignment cases (with frequency) - * (Based on measurements taken with a DECstation 5000/200 - * inside a Mach kernel.) - * - * aligned -> aligned (mostly) - * unaligned -> aligned (sometimes) - * aligned,unaligned -> unaligned (almost never) - * - * Note that we could add another case that checks if - * the destination and source are unaligned but the - * copy is alignable. eg if src and dest are both - * on a halfword boundary. - */ - andi t1,DSTREG,(SZREG-1) # get last bits of dest - bne t1,zero,3f # dest unaligned - andi t0,SRCREG,(SZREG-1) # get last bits of src - bne t0,zero,5f - - /* - * Forward aligned->aligned copy, 8 words at a time. - */ -98: - li AT,-(SZREG*8) - and t0,SIZEREG,AT # count truncated to multiples - PTR_ADDU a3,SRCREG,t0 # run fast loop up to this addr - sltu AT,SRCREG,a3 # any work to do? - beq AT,zero,2f - PTR_SUBU SIZEREG,t0 - - /* - * loop body - */ -1: # cp - REG_L t3,(0*SZREG)(SRCREG) - REG_L v1,(1*SZREG)(SRCREG) - REG_L t0,(2*SZREG)(SRCREG) - REG_L t1,(3*SZREG)(SRCREG) - PTR_ADDU SRCREG,SZREG*8 - REG_S t3,(0*SZREG)(DSTREG) - REG_S v1,(1*SZREG)(DSTREG) - REG_S t0,(2*SZREG)(DSTREG) - REG_S t1,(3*SZREG)(DSTREG) - REG_L t1,(-1*SZREG)(SRCREG) - REG_L t0,(-2*SZREG)(SRCREG) - REG_L v1,(-3*SZREG)(SRCREG) - REG_L t3,(-4*SZREG)(SRCREG) - PTR_ADDU DSTREG,SZREG*8 - REG_S t1,(-1*SZREG)(DSTREG) - REG_S t0,(-2*SZREG)(DSTREG) - REG_S v1,(-3*SZREG)(DSTREG) - bne SRCREG,a3,1b - REG_S t3,(-4*SZREG)(DSTREG) - - /* - * Copy a word at a time, no loop unrolling. - */ -2: # wordcopy - andi t2,SIZEREG,(SZREG-1) # get byte count / SZREG - PTR_SUBU t2,SIZEREG,t2 # t2 = words to copy * SZREG - beq t2,zero,3f - PTR_ADDU t0,SRCREG,t2 # stop at t0 - PTR_SUBU SIZEREG,SIZEREG,t2 -1: - REG_L t3,0(SRCREG) - PTR_ADDU SRCREG,SZREG - REG_S t3,0(DSTREG) - bne SRCREG,t0,1b - PTR_ADDU DSTREG,SZREG - -3: # bytecopy - beq SIZEREG,zero,4f # nothing left to do? - nop -1: - lb t3,0(SRCREG) - PTR_ADDU SRCREG,1 - sb t3,0(DSTREG) - PTR_SUBU SIZEREG,1 - bgtz SIZEREG,1b - PTR_ADDU DSTREG,1 - -4: # copydone - j ra - nop - - /* - * Copy from unaligned source to aligned dest. - */ -5: # destaligned - andi t0,SIZEREG,(SZREG-1) # t0 = bytecount mod SZREG - PTR_SUBU a3,SIZEREG,t0 # number of words to transfer - beq a3,zero,3b - nop - move SIZEREG,t0 # this many to do after we are done - PTR_ADDU a3,SRCREG,a3 # stop point - -1: - REG_LHI t3,0(SRCREG) - REG_LLO t3,SZREG-1(SRCREG) - PTR_ADDI SRCREG,SZREG - REG_S t3,0(DSTREG) - bne SRCREG,a3,1b - PTR_ADDI DSTREG,SZREG - - b 3b - nop - -6: # backcopy -- based on above - PTR_ADDU SRCREG,SIZEREG - PTR_ADDU DSTREG,SIZEREG - andi t1,DSTREG,SZREG-1 # get last 3 bits of dest - bne t1,zero,3f - andi t0,SRCREG,SZREG-1 # get last 3 bits of src - bne t0,zero,5f - - /* - * Forward aligned->aligned copy, 8*4 bytes at a time. - */ - li AT,(-8*SZREG) - and t0,SIZEREG,AT # count truncated to multiple of 32 - beq t0,zero,2f # any work to do? - PTR_SUBU SIZEREG,t0 - PTR_SUBU a3,SRCREG,t0 - - /* - * loop body - */ -1: # cp - REG_L t3,(-4*SZREG)(SRCREG) - REG_L v1,(-3*SZREG)(SRCREG) - REG_L t0,(-2*SZREG)(SRCREG) - REG_L t1,(-1*SZREG)(SRCREG) - PTR_SUBU SRCREG,8*SZREG - REG_S t3,(-4*SZREG)(DSTREG) - REG_S v1,(-3*SZREG)(DSTREG) - REG_S t0,(-2*SZREG)(DSTREG) - REG_S t1,(-1*SZREG)(DSTREG) - REG_L t1,(3*SZREG)(SRCREG) - REG_L t0,(2*SZREG)(SRCREG) - REG_L v1,(1*SZREG)(SRCREG) - REG_L t3,(0*SZREG)(SRCREG) - PTR_SUBU DSTREG,8*SZREG - REG_S t1,(3*SZREG)(DSTREG) - REG_S t0,(2*SZREG)(DSTREG) - REG_S v1,(1*SZREG)(DSTREG) - bne SRCREG,a3,1b - REG_S t3,(0*SZREG)(DSTREG) - - /* - * Copy a word at a time, no loop unrolling. - */ -2: # wordcopy - andi t2,SIZEREG,SZREG-1 # get byte count / 4 - PTR_SUBU t2,SIZEREG,t2 # t2 = number of words to copy - beq t2,zero,3f - PTR_SUBU t0,SRCREG,t2 # stop at t0 - PTR_SUBU SIZEREG,SIZEREG,t2 -1: - REG_L t3,-SZREG(SRCREG) - PTR_SUBU SRCREG,SZREG - REG_S t3,-SZREG(DSTREG) - bne SRCREG,t0,1b - PTR_SUBU DSTREG,SZREG - -3: # bytecopy - beq SIZEREG,zero,4f # nothing left to do? - nop -1: - lb t3,-1(SRCREG) - PTR_SUBU SRCREG,1 - sb t3,-1(DSTREG) - PTR_SUBU SIZEREG,1 - bgtz SIZEREG,1b - PTR_SUBU DSTREG,1 - -4: # copydone - j ra - nop - - /* - * Copy from unaligned source to aligned dest. - */ -5: # destaligned - andi t0,SIZEREG,SZREG-1 # t0 = bytecount mod 4 - PTR_SUBU a3,SIZEREG,t0 # number of words to transfer - beq a3,zero,3b - nop - move SIZEREG,t0 # this many to do after we are done - PTR_SUBU a3,SRCREG,a3 # stop point - -1: - REG_LHI t3,-SZREG(SRCREG) - REG_LLO t3,-1(SRCREG) - PTR_SUBU SRCREG,SZREG - REG_S t3,-SZREG(DSTREG) - bne SRCREG,a3,1b - PTR_SUBU DSTREG,SZREG - - b 3b - nop - - .set reorder - .set at -END(memcpy) diff --git a/sys/mips/mips/bus_space_generic.c b/sys/mips/mips/bus_space_generic.c deleted file mode 100644 index a9d38f82491..00000000000 --- a/sys/mips/mips/bus_space_generic.c +++ /dev/null @@ -1,741 +0,0 @@ -/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */ -/*- - * $Id: bus.h,v 1.6 2007/08/09 11:23:32 katta Exp $ - * - * SPDX-License-Identifier: BSD-2-Clause AND BSD-4-Clause - * - * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, - * NASA Ames Research Center. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Copyright (c) 1996 Charles M. Hannum. All rights reserved. - * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Christopher G. Demetriou - * for the NetBSD Project. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * from: src/sys/alpha/include/bus.h,v 1.5 1999/08/28 00:38:40 peter - */ -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include - -static struct bus_space generic_space = { - /* cookie */ - .bs_cookie = (void *) 0, - - /* mapping/unmapping */ - .bs_map = generic_bs_map, - .bs_unmap = generic_bs_unmap, - .bs_subregion = generic_bs_subregion, - - /* allocation/deallocation */ - .bs_alloc = generic_bs_alloc, - .bs_free = generic_bs_free, - - /* barrier */ - .bs_barrier = generic_bs_barrier, - - /* read (single) */ - .bs_r_1 = generic_bs_r_1, - .bs_r_2 = generic_bs_r_2, - .bs_r_4 = generic_bs_r_4, - .bs_r_8 = generic_bs_r_8, - - /* read multiple */ - .bs_rm_1 = generic_bs_rm_1, - .bs_rm_2 = generic_bs_rm_2, - .bs_rm_4 = generic_bs_rm_4, - .bs_rm_8 = generic_bs_rm_8, - - /* read region */ - .bs_rr_1 = generic_bs_rr_1, - .bs_rr_2 = generic_bs_rr_2, - .bs_rr_4 = generic_bs_rr_4, - .bs_rr_8 = generic_bs_rr_8, - - /* write (single) */ - .bs_w_1 = generic_bs_w_1, - .bs_w_2 = generic_bs_w_2, - .bs_w_4 = generic_bs_w_4, - .bs_w_8 = generic_bs_w_8, - - /* write multiple */ - .bs_wm_1 = generic_bs_wm_1, - .bs_wm_2 = generic_bs_wm_2, - .bs_wm_4 = generic_bs_wm_4, - .bs_wm_8 = generic_bs_wm_8, - - /* write region */ - .bs_wr_1 = generic_bs_wr_1, - .bs_wr_2 = generic_bs_wr_2, - .bs_wr_4 = generic_bs_wr_4, - .bs_wr_8 = generic_bs_wr_8, - - /* set multiple */ - .bs_sm_1 = generic_bs_sm_1, - .bs_sm_2 = generic_bs_sm_2, - .bs_sm_4 = generic_bs_sm_4, - .bs_sm_8 = generic_bs_sm_8, - - /* set region */ - .bs_sr_1 = generic_bs_sr_1, - .bs_sr_2 = generic_bs_sr_2, - .bs_sr_4 = generic_bs_sr_4, - .bs_sr_8 = generic_bs_sr_8, - - /* copy */ - .bs_c_1 = generic_bs_c_1, - .bs_c_2 = generic_bs_c_2, - .bs_c_4 = generic_bs_c_4, - .bs_c_8 = generic_bs_c_8, - - /* read (single) stream */ - .bs_r_1_s = generic_bs_r_1, - .bs_r_2_s = generic_bs_r_2, - .bs_r_4_s = generic_bs_r_4, - .bs_r_8_s = generic_bs_r_8, - - /* read multiple stream */ - .bs_rm_1_s = generic_bs_rm_1, - .bs_rm_2_s = generic_bs_rm_2, - .bs_rm_4_s = generic_bs_rm_4, - .bs_rm_8_s = generic_bs_rm_8, - - /* read region stream */ - .bs_rr_1_s = generic_bs_rr_1, - .bs_rr_2_s = generic_bs_rr_2, - .bs_rr_4_s = generic_bs_rr_4, - .bs_rr_8_s = generic_bs_rr_8, - - /* write (single) stream */ - .bs_w_1_s = generic_bs_w_1, - .bs_w_2_s = generic_bs_w_2, - .bs_w_4_s = generic_bs_w_4, - .bs_w_8_s = generic_bs_w_8, - - /* write multiple stream */ - .bs_wm_1_s = generic_bs_wm_1, - .bs_wm_2_s = generic_bs_wm_2, - .bs_wm_4_s = generic_bs_wm_4, - .bs_wm_8_s = generic_bs_wm_8, - - /* write region stream */ - .bs_wr_1_s = generic_bs_wr_1, - .bs_wr_2_s = generic_bs_wr_2, - .bs_wr_4_s = generic_bs_wr_4, - .bs_wr_8_s = generic_bs_wr_8, -}; - -/* Ultra-gross kludge */ -#if defined(CPU_CNMIPS) && (defined(__mips_n32) || defined(__mips_o32)) -#include -#define rd8(a) cvmx_read64_uint8(a) -#define rd16(a) cvmx_read64_uint16(a) -#define rd32(a) cvmx_read64_uint32(a) -#define rd64(a) cvmx_read64_uint64(a) -#define wr8(a, v) cvmx_write64_uint8(a, v) -#define wr16(a, v) cvmx_write64_uint16(a, v) -#define wr32(a, v) cvmx_write64_uint32(a, v) -#define wr64(a, v) cvmx_write64_uint64(a, v) -#else -#define rd8(a) readb(a) -#define rd16(a) readw(a) -#define rd32(a) readl(a) -#ifdef readq -#define rd64(a) readq((a)) -#endif -#define wr8(a, v) writeb(a, v) -#define wr16(a, v) writew(a, v) -#define wr32(a, v) writel(a, v) -#ifdef writeq -#define wr64(a, v) writeq(a, v) -#endif -#endif - -/* generic bus_space tag */ -bus_space_tag_t mips_bus_space_generic = &generic_space; - -int -generic_bs_map(void *t __unused, bus_addr_t addr, - bus_size_t size, int flags __unused, - bus_space_handle_t *bshp) -{ - - *bshp = (bus_space_handle_t)pmap_mapdev((vm_paddr_t)addr, - (vm_size_t)size); - return (0); -} - -void -generic_bs_unmap(void *t __unused, bus_space_handle_t bh, - bus_size_t size) -{ - - pmap_unmapdev((vm_offset_t)bh, (vm_size_t)size); -} - -int -generic_bs_subregion(void *t __unused, bus_space_handle_t handle, - bus_size_t offset, bus_size_t size __unused, - bus_space_handle_t *bshp) -{ - - *bshp = handle + offset; - return (0); -} - -int -generic_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend, - bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags, - bus_addr_t *bpap, bus_space_handle_t *bshp) -{ - - panic("%s: not implemented", __func__); -} - -void -generic_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size) -{ - - panic("%s: not implemented", __func__); -} - -uint8_t -generic_bs_r_1(void *t, bus_space_handle_t handle, - bus_size_t offset) -{ - - return (rd8(handle + offset)); -} - -uint16_t -generic_bs_r_2(void *t, bus_space_handle_t handle, - bus_size_t offset) -{ - - return (rd16(handle + offset)); -} - -uint32_t -generic_bs_r_4(void *t, bus_space_handle_t handle, - bus_size_t offset) -{ - - return (rd32(handle + offset)); -} - -uint64_t -generic_bs_r_8(void *t, bus_space_handle_t handle, bus_size_t offset) -{ - -#ifdef rd64 - return(rd64(handle + offset)); -#else - panic("%s: not implemented", __func__); -#endif -} - -void -generic_bs_rm_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint8_t *addr, size_t count) -{ - - while (count--) - *addr++ = rd8(bsh + offset); -} - -void -generic_bs_rm_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint16_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) - *addr++ = rd16(baddr); -} - -void -generic_bs_rm_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint32_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) - *addr++ = rd32(baddr); -} - -void -generic_bs_rm_8(void *t, bus_space_handle_t bsh, bus_size_t offset, - uint64_t *addr, size_t count) -{ -#ifdef rd64 - bus_addr_t baddr = bsh + offset; - - while (count--) - *addr++ = rd64(baddr); -#else - panic("%s: not implemented", __func__); -#endif -} - -/* - * Read `count' 1, 2, 4, or 8 byte quantities from bus space - * described by tag/handle and starting at `offset' and copy into - * buffer provided. - */ -void -generic_bs_rr_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint8_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - *addr++ = rd8(baddr); - baddr += 1; - } -} - -void -generic_bs_rr_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint16_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - *addr++ = rd16(baddr); - baddr += 2; - } -} - -void -generic_bs_rr_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint32_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - *addr++ = rd32(baddr); - baddr += 4; - } -} - -void -generic_bs_rr_8(void *t, bus_space_handle_t bsh, bus_size_t offset, - uint64_t *addr, size_t count) -{ -#ifdef rd64 - bus_addr_t baddr = bsh + offset; - - while (count--) { - *addr++ = rd64(baddr); - baddr += 8; - } -#else - panic("%s: not implemented", __func__); -#endif -} - -/* - * Write the 1, 2, 4, or 8 byte value `value' to bus space - * described by tag/handle/offset. - */ -void -generic_bs_w_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint8_t value) -{ - - wr8(bsh + offset, value); -} - -void -generic_bs_w_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint16_t value) -{ - - wr16(bsh + offset, value); -} - -void -generic_bs_w_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint32_t value) -{ - - wr32(bsh + offset, value); -} - -void -generic_bs_w_8(void *t, bus_space_handle_t bsh, bus_size_t offset, - uint64_t value) -{ - -#ifdef wr64 - wr64(bsh + offset, value); -#else - panic("%s: not implemented", __func__); -#endif -} - -/* - * Write `count' 1, 2, 4, or 8 byte quantities from the buffer - * provided to bus space described by tag/handle/offset. - */ -void -generic_bs_wm_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, const uint8_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) - wr8(baddr, *addr++); -} - -void -generic_bs_wm_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, const uint16_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) - wr16(baddr, *addr++); -} - -void -generic_bs_wm_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, const uint32_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) - wr32(baddr, *addr++); -} - -void -generic_bs_wm_8(void *t, bus_space_handle_t bsh, bus_size_t offset, - const uint64_t *addr, size_t count) -{ -#ifdef wr64 - bus_addr_t baddr = bsh + offset; - - while (count--) - wr64(baddr, *addr++); -#else - panic("%s: not implemented", __func__); -#endif -} - -/* - * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided - * to bus space described by tag/handle starting at `offset'. - */ -void -generic_bs_wr_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, const uint8_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - wr8(baddr, *addr++); - baddr += 1; - } -} - -void -generic_bs_wr_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, const uint16_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - wr16(baddr, *addr++); - baddr += 2; - } -} - -void -generic_bs_wr_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, const uint32_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - wr32(baddr, *addr++); - baddr += 4; - } -} - -void -generic_bs_wr_8(void *t, bus_space_handle_t bsh, bus_size_t offset, - const uint64_t *addr, size_t count) -{ -#ifdef wr64 - bus_addr_t baddr = bsh + offset; - - while (count--) { - wr64(baddr, *addr++); - baddr += 8; - } -#else - panic("%s: not implemented", __func__); -#endif -} - -/* - * Write the 1, 2, 4, or 8 byte value `val' to bus space described - * by tag/handle/offset `count' times. - */ -void -generic_bs_sm_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint8_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - while (count--) - wr8(addr, value); -} - -void -generic_bs_sm_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint16_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - while (count--) - wr16(addr, value); -} - -void -generic_bs_sm_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint32_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - while (count--) - wr32(addr, value); -} - -void -generic_bs_sm_8(void *t, bus_space_handle_t bsh, bus_size_t offset, - uint64_t value, size_t count) -{ -#ifdef wr64 - bus_addr_t addr = bsh + offset; - - while (count--) - wr64(addr, value); -#else - panic("%s: not implemented", __func__); -#endif -} - -/* - * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described - * by tag/handle starting at `offset'. - */ -void -generic_bs_sr_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint8_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - for (; count != 0; count--, addr++) - wr8(addr, value); -} - -void -generic_bs_sr_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint16_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - for (; count != 0; count--, addr += 2) - wr16(addr, value); -} - -void -generic_bs_sr_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, uint32_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - for (; count != 0; count--, addr += 4) - wr32(addr, value); -} - -void -generic_bs_sr_8(void *t, bus_space_handle_t bsh, bus_size_t offset, - uint64_t value, size_t count) -{ -#ifdef wr64 - bus_addr_t addr = bsh + offset; - - for (; count != 0; count--, addr += 8) - wr64(addr, value); -#else - panic("%s: not implemented", __func__); -#endif -} - -/* - * Copy `count' 1, 2, 4, or 8 byte values from bus space starting - * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. - */ -void -generic_bs_c_1(void *t, bus_space_handle_t bsh1, - bus_size_t off1, bus_space_handle_t bsh2, - bus_size_t off2, size_t count) -{ - bus_addr_t addr1 = bsh1 + off1; - bus_addr_t addr2 = bsh2 + off2; - - if (addr1 >= addr2) { - /* src after dest: copy forward */ - for (; count != 0; count--, addr1++, addr2++) - wr8(addr2, rd8(addr1)); - } else { - /* dest after src: copy backwards */ - for (addr1 += (count - 1), addr2 += (count - 1); - count != 0; count--, addr1--, addr2--) - wr8(addr2, rd8(addr1)); - } -} - -void -generic_bs_c_2(void *t, bus_space_handle_t bsh1, - bus_size_t off1, bus_space_handle_t bsh2, - bus_size_t off2, size_t count) -{ - bus_addr_t addr1 = bsh1 + off1; - bus_addr_t addr2 = bsh2 + off2; - - if (addr1 >= addr2) { - /* src after dest: copy forward */ - for (; count != 0; count--, addr1 += 2, addr2 += 2) - wr16(addr2, rd16(addr1)); - } else { - /* dest after src: copy backwards */ - for (addr1 += 2 * (count - 1), addr2 += 2 * (count - 1); - count != 0; count--, addr1 -= 2, addr2 -= 2) - wr16(addr2, rd16(addr1)); - } -} - -void -generic_bs_c_4(void *t, bus_space_handle_t bsh1, - bus_size_t off1, bus_space_handle_t bsh2, - bus_size_t off2, size_t count) -{ - bus_addr_t addr1 = bsh1 + off1; - bus_addr_t addr2 = bsh2 + off2; - - if (addr1 >= addr2) { - /* src after dest: copy forward */ - for (; count != 0; count--, addr1 += 4, addr2 += 4) - wr32(addr2, rd32(addr1)); - } else { - /* dest after src: copy backwards */ - for (addr1 += 4 * (count - 1), addr2 += 4 * (count - 1); - count != 0; count--, addr1 -= 4, addr2 -= 4) - wr32(addr2, rd32(addr1)); - } -} - -void -generic_bs_c_8(void *t, bus_space_handle_t bsh1, bus_size_t off1, - bus_space_handle_t bsh2, bus_size_t off2, size_t count) -{ -#if defined(rd64) && defined(wr64) - bus_addr_t addr1 = bsh1 + off1; - bus_addr_t addr2 = bsh2 + off2; - - if (addr1 >= addr2) { - /* src after dest: copy forward */ - for (; count != 0; count--, addr1 += 8, addr2 += 8) - wr64(addr2, rd64(addr1)); - } else { - /* dest after src: copy backwards */ - for (addr1 += 8 * (count - 1), addr2 += 8 * (count - 1); - count != 0; count--, addr1 -= 8, addr2 -= 8) - wr64(addr2, rd64(addr1)); - } -#else - panic("%s: not implemented", __func__); -#endif -} - -void -generic_bs_barrier(void *t __unused, - bus_space_handle_t bsh __unused, - bus_size_t offset __unused, bus_size_t len __unused, - int flags) -{ -#if 0 - if (flags & BUS_SPACE_BARRIER_WRITE) - mips_dcache_wbinv_all(); -#endif - if (flags & BUS_SPACE_BARRIER_READ) - rmb(); - if (flags & BUS_SPACE_BARRIER_WRITE) - wmb(); -} diff --git a/sys/mips/mips/busdma_machdep.c b/sys/mips/mips/busdma_machdep.c deleted file mode 100644 index a069047c390..00000000000 --- a/sys/mips/mips/busdma_machdep.c +++ /dev/null @@ -1,1544 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * From i386/busdma_machdep.c,v 1.26 2002/04/19 22:58:09 alfred - */ - -#include -/* - * MIPS bus dma support routines - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#define MAX_BPAGES 64 -#define BUS_DMA_COULD_BOUNCE BUS_DMA_BUS3 -#define BUS_DMA_MIN_ALLOC_COMP BUS_DMA_BUS4 - -/* - * On XBurst cores from Ingenic, cache-line writeback is local - * only, unless accompanied by invalidation. Invalidations force - * dirty line writeout and invalidation requests forwarded to - * other cores if other cores have the cache line dirty. - */ -#if defined(SMP) && defined(CPU_XBURST) -#define BUS_DMA_FORCE_WBINV -#endif - -struct bounce_zone; - -struct bus_dma_tag { - bus_dma_tag_t parent; - bus_size_t alignment; - bus_addr_t boundary; - bus_addr_t lowaddr; - bus_addr_t highaddr; - bus_dma_filter_t *filter; - void *filterarg; - bus_size_t maxsize; - u_int nsegments; - bus_size_t maxsegsz; - int flags; - int ref_count; - int map_count; - bus_dma_lock_t *lockfunc; - void *lockfuncarg; - bus_dma_segment_t *segments; - struct bounce_zone *bounce_zone; -}; - -struct bounce_page { - vm_offset_t vaddr; /* kva of bounce buffer */ - vm_offset_t vaddr_nocache; /* kva of bounce buffer uncached */ - bus_addr_t busaddr; /* Physical address */ - vm_offset_t datavaddr; /* kva of client data */ - bus_addr_t dataaddr; /* client physical address */ - bus_size_t datacount; /* client data count */ - STAILQ_ENTRY(bounce_page) links; -}; - -struct sync_list { - vm_offset_t vaddr; /* kva of bounce buffer */ - bus_addr_t busaddr; /* Physical address */ - bus_size_t datacount; /* client data count */ -}; - -struct bounce_zone { - STAILQ_ENTRY(bounce_zone) links; - STAILQ_HEAD(bp_list, bounce_page) bounce_page_list; - int total_bpages; - int free_bpages; - int reserved_bpages; - int active_bpages; - int total_bounced; - int total_deferred; - int map_count; - bus_size_t alignment; - bus_addr_t lowaddr; - char zoneid[8]; - char lowaddrid[20]; - struct sysctl_ctx_list sysctl_tree; - struct sysctl_oid *sysctl_tree_top; -}; - -static struct mtx bounce_lock; -static int total_bpages; -static int busdma_zonecount; -static STAILQ_HEAD(, bounce_zone) bounce_zone_list; -static void *busdma_ih; - -static SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, - "Busdma parameters"); -SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0, - "Total bounce pages"); - -#define DMAMAP_UNCACHEABLE 0x08 -#define DMAMAP_CACHE_ALIGNED 0x10 - -struct bus_dmamap { - struct bp_list bpages; - int pagesneeded; - int pagesreserved; - bus_dma_tag_t dmat; - struct memdesc mem; - int flags; - TAILQ_ENTRY(bus_dmamap) freelist; - STAILQ_ENTRY(bus_dmamap) links; - bus_dmamap_callback_t *callback; - void *callback_arg; - int sync_count; - struct sync_list *slist; -}; - -static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist; -static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist; - -static void init_bounce_pages(void *dummy); -static int alloc_bounce_zone(bus_dma_tag_t dmat); -static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages); -static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, - int commit); -static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, - vm_offset_t vaddr, bus_addr_t addr, - bus_size_t size); -static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage); - -/* Default tag, as most drivers provide no parent tag. */ -bus_dma_tag_t mips_root_dma_tag; - -static uma_zone_t dmamap_zone; /* Cache of struct bus_dmamap items */ - -static busdma_bufalloc_t coherent_allocator; /* Cache of coherent buffers */ -static busdma_bufalloc_t standard_allocator; /* Cache of standard buffers */ - -MALLOC_DEFINE(M_BUSDMA, "busdma", "busdma metadata"); -MALLOC_DEFINE(M_BOUNCE, "bounce", "busdma bounce pages"); - -/* - * This is the ctor function passed to uma_zcreate() for the pool of dma maps. - * It'll need platform-specific changes if this code is copied. - */ -static int -dmamap_ctor(void *mem, int size, void *arg, int flags) -{ - bus_dmamap_t map; - bus_dma_tag_t dmat; - - map = (bus_dmamap_t)mem; - dmat = (bus_dma_tag_t)arg; - - dmat->map_count++; - - bzero(map, sizeof(*map)); - map->dmat = dmat; - STAILQ_INIT(&map->bpages); - - return (0); -} - -/* - * This is the dtor function passed to uma_zcreate() for the pool of dma maps. - * It may need platform-specific changes if this code is copied . - */ -static void -dmamap_dtor(void *mem, int size, void *arg) -{ - bus_dmamap_t map; - - map = (bus_dmamap_t)mem; - - map->dmat->map_count--; -} - -static void -busdma_init(void *dummy) -{ - - /* Create a cache of maps for bus_dmamap_create(). */ - dmamap_zone = uma_zcreate("dma maps", sizeof(struct bus_dmamap), - dmamap_ctor, dmamap_dtor, NULL, NULL, UMA_ALIGN_PTR, 0); - - /* Create a cache of buffers in standard (cacheable) memory. */ - standard_allocator = busdma_bufalloc_create("buffer", - mips_dcache_max_linesize, /* minimum_alignment */ - NULL, /* uma_alloc func */ - NULL, /* uma_free func */ - 0); /* uma_zcreate_flags */ - - /* - * Create a cache of buffers in uncacheable memory, to implement the - * BUS_DMA_COHERENT flag. - */ - coherent_allocator = busdma_bufalloc_create("coherent", - mips_dcache_max_linesize, /* minimum_alignment */ - busdma_bufalloc_alloc_uncacheable, - busdma_bufalloc_free_uncacheable, - 0); /* uma_zcreate_flags */ -} -SYSINIT(busdma, SI_SUB_KMEM, SI_ORDER_FOURTH, busdma_init, NULL); - -/* - * Return true if a match is made. - * - * To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'. - * - * If paddr is within the bounds of the dma tag then call the filter callback - * to check for a match, if there is no filter callback then assume a match. - */ -static int -run_filter(bus_dma_tag_t dmat, bus_addr_t paddr) -{ - int retval; - - retval = 0; - - do { - if (((paddr > dmat->lowaddr && paddr <= dmat->highaddr) - || !vm_addr_align_ok(paddr, dmat->alignment)) - && (dmat->filter == NULL - || (*dmat->filter)(dmat->filterarg, paddr) != 0)) - retval = 1; - - dmat = dmat->parent; - } while (retval == 0 && dmat != NULL); - return (retval); -} - -/* - * Check to see if the specified page is in an allowed DMA range. - */ - -static __inline int -_bus_dma_can_bounce(vm_offset_t lowaddr, vm_offset_t highaddr) -{ - int i; - for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) { - if ((lowaddr >= phys_avail[i] && lowaddr <= phys_avail[i + 1]) - || (lowaddr < phys_avail[i] && - highaddr > phys_avail[i])) - return (1); - } - return (0); -} - -/* - * Convenience function for manipulating driver locks from busdma (during - * busdma_swi, for example). - */ -void -busdma_lock_mutex(void *arg, bus_dma_lock_op_t op) -{ - struct mtx *dmtx; - - dmtx = (struct mtx *)arg; - switch (op) { - case BUS_DMA_LOCK: - mtx_lock(dmtx); - break; - case BUS_DMA_UNLOCK: - mtx_unlock(dmtx); - break; - default: - panic("Unknown operation 0x%x for busdma_lock_mutex!", op); - } -} - -/* - * dflt_lock should never get called. It gets put into the dma tag when - * lockfunc == NULL, which is only valid if the maps that are associated - * with the tag are meant to never be defered. - * XXX Should have a way to identify which driver is responsible here. - */ -static void -dflt_lock(void *arg, bus_dma_lock_op_t op) -{ -#ifdef INVARIANTS - panic("driver error: busdma dflt_lock called"); -#else - printf("DRIVER_ERROR: busdma dflt_lock called\n"); -#endif -} - -static __inline bus_dmamap_t -_busdma_alloc_dmamap(bus_dma_tag_t dmat) -{ - struct sync_list *slist; - bus_dmamap_t map; - - slist = malloc(sizeof(*slist) * dmat->nsegments, M_BUSDMA, M_NOWAIT); - if (slist == NULL) - return (NULL); - map = uma_zalloc_arg(dmamap_zone, dmat, M_NOWAIT); - if (map != NULL) - map->slist = slist; - else - free(slist, M_BUSDMA); - return (map); -} - -static __inline void -_busdma_free_dmamap(bus_dmamap_t map) -{ - - free(map->slist, M_BUSDMA); - uma_zfree(dmamap_zone, map); -} - -/* - * Allocate a device specific dma_tag. - */ -#define SEG_NB 1024 - -int -bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, - bus_addr_t boundary, bus_addr_t lowaddr, - bus_addr_t highaddr, bus_dma_filter_t *filter, - void *filterarg, bus_size_t maxsize, int nsegments, - bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc, - void *lockfuncarg, bus_dma_tag_t *dmat) -{ - bus_dma_tag_t newtag; - int error = 0; - /* Return a NULL tag on failure */ - *dmat = NULL; - if (!parent) - parent = mips_root_dma_tag; - - newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_BUSDMA, M_NOWAIT); - if (newtag == NULL) { - CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", - __func__, newtag, 0, error); - return (ENOMEM); - } - - newtag->parent = parent; - newtag->alignment = alignment; - newtag->boundary = boundary; - newtag->lowaddr = trunc_page((vm_offset_t)lowaddr) + (PAGE_SIZE - 1); - newtag->highaddr = trunc_page((vm_offset_t)highaddr) + (PAGE_SIZE - 1); - newtag->filter = filter; - newtag->filterarg = filterarg; - newtag->maxsize = maxsize; - newtag->nsegments = nsegments; - newtag->maxsegsz = maxsegsz; - newtag->flags = flags; - if (cpuinfo.cache_coherent_dma) - newtag->flags |= BUS_DMA_COHERENT; - newtag->ref_count = 1; /* Count ourself */ - newtag->map_count = 0; - if (lockfunc != NULL) { - newtag->lockfunc = lockfunc; - newtag->lockfuncarg = lockfuncarg; - } else { - newtag->lockfunc = dflt_lock; - newtag->lockfuncarg = NULL; - } - newtag->segments = NULL; - - /* - * Take into account any restrictions imposed by our parent tag - */ - if (parent != NULL) { - newtag->lowaddr = MIN(parent->lowaddr, newtag->lowaddr); - newtag->highaddr = MAX(parent->highaddr, newtag->highaddr); - if (newtag->boundary == 0) - newtag->boundary = parent->boundary; - else if (parent->boundary != 0) - newtag->boundary = - MIN(parent->boundary, newtag->boundary); - if ((newtag->filter != NULL) || - ((parent->flags & BUS_DMA_COULD_BOUNCE) != 0)) - newtag->flags |= BUS_DMA_COULD_BOUNCE; - if (newtag->filter == NULL) { - /* - * Short circuit looking at our parent directly - * since we have encapsulated all of its information - */ - newtag->filter = parent->filter; - newtag->filterarg = parent->filterarg; - newtag->parent = parent->parent; - } - if (newtag->parent != NULL) - atomic_add_int(&parent->ref_count, 1); - } - if (_bus_dma_can_bounce(newtag->lowaddr, newtag->highaddr) - || newtag->alignment > 1) - newtag->flags |= BUS_DMA_COULD_BOUNCE; - - if (((newtag->flags & BUS_DMA_COULD_BOUNCE) != 0) && - (flags & BUS_DMA_ALLOCNOW) != 0) { - struct bounce_zone *bz; - - /* Must bounce */ - - if ((error = alloc_bounce_zone(newtag)) != 0) { - free(newtag, M_BUSDMA); - return (error); - } - bz = newtag->bounce_zone; - - if (ptoa(bz->total_bpages) < maxsize) { - int pages; - - pages = atop(maxsize) - bz->total_bpages; - - /* Add pages to our bounce pool */ - if (alloc_bounce_pages(newtag, pages) < pages) - error = ENOMEM; - } - /* Performed initial allocation */ - newtag->flags |= BUS_DMA_MIN_ALLOC_COMP; - } else - newtag->bounce_zone = NULL; - if (error != 0) - free(newtag, M_BUSDMA); - else - *dmat = newtag; - CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", - __func__, newtag, (newtag != NULL ? newtag->flags : 0), error); - - return (error); -} - -void -bus_dma_template_clone(bus_dma_template_t *t, bus_dma_tag_t dmat) -{ - - if (t == NULL || dmat == NULL) - return; - - t->parent = dmat->parent; - t->alignment = dmat->alignment; - t->boundary = dmat->boundary; - t->lowaddr = dmat->lowaddr; - t->highaddr = dmat->highaddr; - t->maxsize = dmat->maxsize; - t->nsegments = dmat->nsegments; - t->maxsegsize = dmat->maxsegsz; - t->flags = dmat->flags; - t->lockfunc = dmat->lockfunc; - t->lockfuncarg = dmat->lockfuncarg; -} - -int -bus_dma_tag_set_domain(bus_dma_tag_t dmat, int domain) -{ - - return (0); -} - -int -bus_dma_tag_destroy(bus_dma_tag_t dmat) -{ -#ifdef KTR - bus_dma_tag_t dmat_copy = dmat; -#endif - - if (dmat != NULL) { - if (dmat->map_count != 0) - return (EBUSY); - - while (dmat != NULL) { - bus_dma_tag_t parent; - - parent = dmat->parent; - atomic_subtract_int(&dmat->ref_count, 1); - if (dmat->ref_count == 0) { - if (dmat->segments != NULL) - free(dmat->segments, M_BUSDMA); - free(dmat, M_BUSDMA); - /* - * Last reference count, so - * release our reference - * count on our parent. - */ - dmat = parent; - } else - dmat = NULL; - } - } - CTR2(KTR_BUSDMA, "%s tag %p", __func__, dmat_copy); - - return (0); -} - -#include -/* - * Allocate a handle for mapping from kva/uva/physical - * address space into bus device space. - */ -int -bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp) -{ - bus_dmamap_t newmap; - int error = 0; - - if (dmat->segments == NULL) { - dmat->segments = (bus_dma_segment_t *)malloc( - sizeof(bus_dma_segment_t) * dmat->nsegments, M_BUSDMA, - M_NOWAIT); - if (dmat->segments == NULL) { - CTR3(KTR_BUSDMA, "%s: tag %p error %d", - __func__, dmat, ENOMEM); - return (ENOMEM); - } - } - - newmap = _busdma_alloc_dmamap(dmat); - if (newmap == NULL) { - CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM); - return (ENOMEM); - } - *mapp = newmap; - - /* - * Bouncing might be required if the driver asks for an active - * exclusion region, a data alignment that is stricter than 1, and/or - * an active address boundary. - */ - if (dmat->flags & BUS_DMA_COULD_BOUNCE) { - /* Must bounce */ - struct bounce_zone *bz; - int maxpages; - - if (dmat->bounce_zone == NULL) { - if ((error = alloc_bounce_zone(dmat)) != 0) { - _busdma_free_dmamap(newmap); - *mapp = NULL; - return (error); - } - } - bz = dmat->bounce_zone; - - /* Initialize the new map */ - STAILQ_INIT(&((*mapp)->bpages)); - - /* - * Attempt to add pages to our pool on a per-instance - * basis up to a sane limit. - */ - maxpages = MAX_BPAGES; - if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0 - || (bz->map_count > 0 && bz->total_bpages < maxpages)) { - int pages; - - pages = MAX(atop(dmat->maxsize), 1); - pages = MIN(maxpages - bz->total_bpages, pages); - pages = MAX(pages, 1); - if (alloc_bounce_pages(dmat, pages) < pages) - error = ENOMEM; - - if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) { - if (error == 0) - dmat->flags |= BUS_DMA_MIN_ALLOC_COMP; - } else { - error = 0; - } - } - bz->map_count++; - } - - CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", - __func__, dmat, dmat->flags, error); - - return (0); -} - -/* - * Destroy a handle for mapping from kva/uva/physical - * address space into bus device space. - */ -int -bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map) -{ - - if (STAILQ_FIRST(&map->bpages) != NULL || map->sync_count != 0) { - CTR3(KTR_BUSDMA, "%s: tag %p error %d", - __func__, dmat, EBUSY); - return (EBUSY); - } - if (dmat->bounce_zone) - dmat->bounce_zone->map_count--; - _busdma_free_dmamap(map); - CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat); - return (0); -} - -/* - * Allocate a piece of memory that can be efficiently mapped into - * bus device space based on the constraints lited in the dma tag. - * A dmamap to for use with dmamap_load is also allocated. - */ -int -bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddrp, int flags, - bus_dmamap_t *mapp) -{ - bus_dmamap_t newmap = NULL; - busdma_bufalloc_t ba; - struct busdma_bufzone *bufzone; - vm_memattr_t memattr; - void *vaddr; - - int mflags; - - if (flags & BUS_DMA_NOWAIT) - mflags = M_NOWAIT; - else - mflags = M_WAITOK; - if (dmat->segments == NULL) { - dmat->segments = (bus_dma_segment_t *)malloc( - sizeof(bus_dma_segment_t) * dmat->nsegments, M_BUSDMA, - mflags); - if (dmat->segments == NULL) { - CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", - __func__, dmat, dmat->flags, ENOMEM); - return (ENOMEM); - } - } - - newmap = _busdma_alloc_dmamap(dmat); - if (newmap == NULL) { - CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", - __func__, dmat, dmat->flags, ENOMEM); - return (ENOMEM); - } - - /* - * If all the memory is coherent with DMA then we don't need to - * do anything special for a coherent mapping request. - */ - if (dmat->flags & BUS_DMA_COHERENT) - flags &= ~BUS_DMA_COHERENT; - - if (flags & BUS_DMA_COHERENT) { - memattr = VM_MEMATTR_UNCACHEABLE; - ba = coherent_allocator; - newmap->flags |= DMAMAP_UNCACHEABLE; - } else { - memattr = VM_MEMATTR_DEFAULT; - ba = standard_allocator; - } - /* All buffers we allocate are cache-aligned. */ - newmap->flags |= DMAMAP_CACHE_ALIGNED; - - if (flags & BUS_DMA_ZERO) - mflags |= M_ZERO; - - /* - * Try to find a bufzone in the allocator that holds a cache of buffers - * of the right size for this request. If the buffer is too big to be - * held in the allocator cache, this returns NULL. - */ - bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize); - - /* - * Allocate the buffer from the uma(9) allocator if... - * - It's small enough to be in the allocator (bufzone not NULL). - * - The alignment constraint isn't larger than the allocation size - * (the allocator aligns buffers to their size boundaries). - * - There's no need to handle lowaddr/highaddr exclusion zones. - * else allocate non-contiguous pages if... - * - The page count that could get allocated doesn't exceed - * nsegments also when the maximum segment size is less - * than PAGE_SIZE. - * - The alignment constraint isn't larger than a page boundary. - * - There are no boundary-crossing constraints. - * else allocate a block of contiguous pages because one or more of the - * constraints is something that only the contig allocator can fulfill. - */ - if (bufzone != NULL && dmat->alignment <= bufzone->size && - !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr)) { - vaddr = uma_zalloc(bufzone->umazone, mflags); - } else if (dmat->nsegments >= - howmany(dmat->maxsize, MIN(dmat->maxsegsz, PAGE_SIZE)) && - dmat->alignment <= PAGE_SIZE && - (dmat->boundary % PAGE_SIZE) == 0) { - vaddr = (void *)kmem_alloc_attr(dmat->maxsize, mflags, 0, - dmat->lowaddr, memattr); - } else { - vaddr = (void *)kmem_alloc_contig(dmat->maxsize, mflags, 0, - dmat->lowaddr, dmat->alignment, dmat->boundary, memattr); - } - if (vaddr == NULL) { - _busdma_free_dmamap(newmap); - newmap = NULL; - } else { - newmap->sync_count = 0; - } - *vaddrp = vaddr; - *mapp = newmap; - - return (vaddr == NULL ? ENOMEM : 0); -} - -/* - * Free a piece of memory and it's allocated dmamap, that was allocated - * via bus_dmamem_alloc. Make the same choice for free/contigfree. - */ -void -bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map) -{ - struct busdma_bufzone *bufzone; - busdma_bufalloc_t ba; - - if (map->flags & DMAMAP_UNCACHEABLE) - ba = coherent_allocator; - else - ba = standard_allocator; - - free(map->slist, M_BUSDMA); - uma_zfree(dmamap_zone, map); - - bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize); - - if (bufzone != NULL && dmat->alignment <= bufzone->size && - !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr)) - uma_zfree(bufzone->umazone, vaddr); - else - kmem_free((vm_offset_t)vaddr, dmat->maxsize); - CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags); -} - -static void -_bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf, - bus_size_t buflen, int flags) -{ - bus_addr_t curaddr; - bus_size_t sgsize; - - if (map->pagesneeded == 0) { - CTR3(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d", - dmat->lowaddr, dmat->boundary, dmat->alignment); - CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d", - map, map->pagesneeded); - /* - * Count the number of bounce pages - * needed in order to complete this transfer - */ - curaddr = buf; - while (buflen != 0) { - sgsize = MIN(buflen, dmat->maxsegsz); - if (run_filter(dmat, curaddr) != 0) { - sgsize = MIN(sgsize, PAGE_SIZE); - map->pagesneeded++; - } - curaddr += sgsize; - buflen -= sgsize; - } - CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded); - } -} - -static void -_bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, pmap_t pmap, - void *buf, bus_size_t buflen, int flags) -{ - vm_offset_t vaddr; - vm_offset_t vendaddr; - bus_addr_t paddr; - - if (map->pagesneeded == 0) { - CTR3(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d", - dmat->lowaddr, dmat->boundary, dmat->alignment); - CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d", - map, map->pagesneeded); - /* - * Count the number of bounce pages - * needed in order to complete this transfer - */ - vaddr = (vm_offset_t)buf; - vendaddr = (vm_offset_t)buf + buflen; - - while (vaddr < vendaddr) { - bus_size_t sg_len; - - KASSERT(kernel_pmap == pmap, ("pmap is not kernel pmap")); - sg_len = PAGE_SIZE - ((vm_offset_t)vaddr & PAGE_MASK); - paddr = pmap_kextract(vaddr); - if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) && - run_filter(dmat, paddr) != 0) { - sg_len = roundup2(sg_len, dmat->alignment); - map->pagesneeded++; - } - vaddr += sg_len; - } - CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded); - } -} - -static int -_bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map,int flags) -{ - - /* Reserve Necessary Bounce Pages */ - mtx_lock(&bounce_lock); - if (flags & BUS_DMA_NOWAIT) { - if (reserve_bounce_pages(dmat, map, 0) != 0) { - mtx_unlock(&bounce_lock); - return (ENOMEM); - } - } else { - if (reserve_bounce_pages(dmat, map, 1) != 0) { - /* Queue us for resources */ - STAILQ_INSERT_TAIL(&bounce_map_waitinglist, - map, links); - mtx_unlock(&bounce_lock); - return (EINPROGRESS); - } - } - mtx_unlock(&bounce_lock); - - return (0); -} - -/* - * Add a single contiguous physical range to the segment list. - */ -static int -_bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr, - bus_size_t sgsize, bus_dma_segment_t *segs, int *segp) -{ - int seg; - - /* - * Make sure we don't cross any boundaries. - */ - if (!vm_addr_bound_ok(curaddr, sgsize, dmat->boundary)) - sgsize = roundup2(curaddr, dmat->boundary) - curaddr; - - /* - * Insert chunk into a segment, coalescing with - * the previous segment if possible. - */ - seg = *segp; - if (seg >= 0 && - curaddr == segs[seg].ds_addr + segs[seg].ds_len && - (segs[seg].ds_len + sgsize) <= dmat->maxsegsz && - vm_addr_bound_ok(segs[seg].ds_addr, - segs[seg].ds_len + sgsize, dmat->boundary)) - segs[seg].ds_len += sgsize; - else { - if (++seg >= dmat->nsegments) - return (0); - segs[seg].ds_addr = curaddr; - segs[seg].ds_len = sgsize; - } - *segp = seg; - return (sgsize); -} - -/* - * Utility function to load a physical buffer. segp contains - * the starting segment on entrace, and the ending segment on exit. - */ -int -_bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dmamap_t map, - vm_paddr_t buf, bus_size_t buflen, int flags, bus_dma_segment_t *segs, - int *segp) -{ - bus_addr_t curaddr; - bus_size_t sgsize; - int error; - - if (segs == NULL) - segs = dmat->segments; - - if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) { - _bus_dmamap_count_phys(dmat, map, buf, buflen, flags); - if (map->pagesneeded != 0) { - error = _bus_dmamap_reserve_pages(dmat, map, flags); - if (error) - return (error); - } - } - - while (buflen > 0) { - curaddr = buf; - sgsize = MIN(buflen, dmat->maxsegsz); - if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) && - map->pagesneeded != 0 && run_filter(dmat, curaddr)) { - sgsize = MIN(sgsize, PAGE_SIZE); - curaddr = add_bounce_page(dmat, map, 0, curaddr, - sgsize); - } - sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs, - segp); - if (sgsize == 0) - break; - buf += sgsize; - buflen -= sgsize; - } - - /* - * Did we fit? - */ - if (buflen != 0) { - bus_dmamap_unload(dmat, map); - return (EFBIG); /* XXX better return value here? */ - } - return (0); -} - -int -_bus_dmamap_load_ma(bus_dma_tag_t dmat, bus_dmamap_t map, - struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags, - bus_dma_segment_t *segs, int *segp) -{ - - return (bus_dmamap_load_ma_triv(dmat, map, ma, tlen, ma_offs, flags, - segs, segp)); -} - -/* - * Utility function to load a linear buffer. segp contains - * the starting segment on entrance, and the ending segment on exit. - * first indicates if this is the first invocation of this function. - */ -int -_bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf, - bus_size_t buflen, struct pmap *pmap, int flags, bus_dma_segment_t *segs, - int *segp) -{ - bus_size_t sgsize; - bus_addr_t curaddr; - struct sync_list *sl; - vm_offset_t vaddr = (vm_offset_t)buf; - int error = 0; - - if (segs == NULL) - segs = dmat->segments; - if ((flags & BUS_DMA_LOAD_MBUF) != 0) - map->flags |= DMAMAP_CACHE_ALIGNED; - - if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) { - _bus_dmamap_count_pages(dmat, map, pmap, buf, buflen, flags); - if (map->pagesneeded != 0) { - error = _bus_dmamap_reserve_pages(dmat, map, flags); - if (error) - return (error); - } - } - CTR3(KTR_BUSDMA, "lowaddr= %d boundary= %d, " - "alignment= %d", dmat->lowaddr, dmat->boundary, dmat->alignment); - - while (buflen > 0) { - /* - * Get the physical address for this segment. - * - * XXX Don't support checking for coherent mappings - * XXX in user address space. - */ - KASSERT(kernel_pmap == pmap, ("pmap is not kernel pmap")); - curaddr = pmap_kextract(vaddr); - - /* - * Compute the segment size, and adjust counts. - */ - sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK); - if (sgsize > dmat->maxsegsz) - sgsize = dmat->maxsegsz; - if (buflen < sgsize) - sgsize = buflen; - - if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) && - map->pagesneeded != 0 && run_filter(dmat, curaddr)) { - curaddr = add_bounce_page(dmat, map, vaddr, curaddr, - sgsize); - } else { - sl = &map->slist[map->sync_count - 1]; - if (map->sync_count == 0 || - vaddr != sl->vaddr + sl->datacount) { - if (++map->sync_count > dmat->nsegments) - goto cleanup; - sl++; - sl->vaddr = vaddr; - sl->datacount = sgsize; - sl->busaddr = curaddr; - } else - sl->datacount += sgsize; - } - sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs, - segp); - if (sgsize == 0) - break; - vaddr += sgsize; - buflen -= sgsize; - } - -cleanup: - /* - * Did we fit? - */ - if (buflen != 0) { - bus_dmamap_unload(dmat, map); - error = EFBIG; /* XXX better return value here? */ - } - return (error); -} - -void -_bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map, - struct memdesc *mem, bus_dmamap_callback_t *callback, void *callback_arg) -{ - - KASSERT(dmat != NULL, ("dmatag is NULL")); - KASSERT(map != NULL, ("dmamap is NULL")); - map->mem = *mem; - map->callback = callback; - map->callback_arg = callback_arg; -} - -bus_dma_segment_t * -_bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map, - bus_dma_segment_t *segs, int nsegs, int error) -{ - - if (segs == NULL) - segs = dmat->segments; - return (segs); -} - -/* - * Release the mapping held by map. - */ -void -bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map) -{ - struct bounce_page *bpage; - - while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) { - STAILQ_REMOVE_HEAD(&map->bpages, links); - free_bounce_page(dmat, bpage); - } - map->sync_count = 0; - return; -} - -static void -bus_dmamap_sync_buf(vm_offset_t buf, int len, bus_dmasync_op_t op, int aligned) -{ - char tmp_cl[mips_dcache_max_linesize], tmp_clend[mips_dcache_max_linesize]; - vm_offset_t buf_cl, buf_clend; - vm_size_t size_cl, size_clend; - int cache_linesize_mask = mips_dcache_max_linesize - 1; - - /* - * dcache invalidation operates on cache line aligned addresses - * and could modify areas of memory that share the same cache line - * at the beginning and the ending of the buffer. In order to - * prevent a data loss we save these chunks in temporary buffer - * before invalidation and restore them afer it. - * - * If the aligned flag is set the buffer is either an mbuf or came from - * our allocator caches. In both cases they are always sized and - * aligned to cacheline boundaries, so we can skip preserving nearby - * data if a transfer appears to overlap cachelines. An mbuf in - * particular will usually appear to be overlapped because of offsetting - * within the buffer to align the L3 headers, but we know that the bytes - * preceeding that offset are part of the same mbuf memory and are not - * unrelated adjacent data (and a rule of mbuf handling is that the cpu - * is not allowed to touch the mbuf while dma is in progress, including - * header fields). - */ - if (aligned) { - size_cl = 0; - size_clend = 0; - } else { - buf_cl = buf & ~cache_linesize_mask; - size_cl = buf & cache_linesize_mask; - buf_clend = buf + len; - size_clend = (mips_dcache_max_linesize - - (buf_clend & cache_linesize_mask)) & cache_linesize_mask; - } - - switch (op) { - case BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE: - case BUS_DMASYNC_POSTREAD: - - /* - * Save buffers that might be modified by invalidation - */ - if (size_cl) - memcpy (tmp_cl, (void*)buf_cl, size_cl); - if (size_clend) - memcpy (tmp_clend, (void*)buf_clend, size_clend); - mips_dcache_inv_range(buf, len); - /* - * Restore them - */ - if (size_cl) - memcpy ((void*)buf_cl, tmp_cl, size_cl); - if (size_clend) - memcpy ((void*)buf_clend, tmp_clend, size_clend); - /* - * Copies above have brought corresponding memory - * cache lines back into dirty state. Write them back - * out and invalidate affected cache lines again if - * necessary. - */ - if (size_cl) - mips_dcache_wbinv_range(buf_cl, size_cl); - if (size_clend && (size_cl == 0 || - buf_clend - buf_cl > mips_dcache_max_linesize)) - mips_dcache_wbinv_range(buf_clend, size_clend); - break; - - case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE: - mips_dcache_wbinv_range(buf, len); - break; - - case BUS_DMASYNC_PREREAD: - /* - * Save buffers that might be modified by invalidation - */ - if (size_cl) - memcpy (tmp_cl, (void *)buf_cl, size_cl); - if (size_clend) - memcpy (tmp_clend, (void *)buf_clend, size_clend); - mips_dcache_inv_range(buf, len); - /* - * Restore them - */ - if (size_cl) - memcpy ((void *)buf_cl, tmp_cl, size_cl); - if (size_clend) - memcpy ((void *)buf_clend, tmp_clend, size_clend); - /* - * Copies above have brought corresponding memory - * cache lines back into dirty state. Write them back - * out and invalidate affected cache lines again if - * necessary. - */ - if (size_cl) - mips_dcache_wbinv_range(buf_cl, size_cl); - if (size_clend && (size_cl == 0 || - buf_clend - buf_cl > mips_dcache_max_linesize)) - mips_dcache_wbinv_range(buf_clend, size_clend); - break; - - case BUS_DMASYNC_PREWRITE: -#ifdef BUS_DMA_FORCE_WBINV - mips_dcache_wbinv_range(buf, len); -#else - mips_dcache_wb_range(buf, len); -#endif - break; - } -} - -static void -_bus_dmamap_sync_bp(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op) -{ - struct bounce_page *bpage; - - STAILQ_FOREACH(bpage, &map->bpages, links) { - if (op & BUS_DMASYNC_PREWRITE) { - if (bpage->datavaddr != 0) - bcopy((void *)bpage->datavaddr, - (void *)(bpage->vaddr_nocache != 0 ? - bpage->vaddr_nocache : - bpage->vaddr), - bpage->datacount); - else - physcopyout(bpage->dataaddr, - (void *)(bpage->vaddr_nocache != 0 ? - bpage->vaddr_nocache : - bpage->vaddr), - bpage->datacount); - if (bpage->vaddr_nocache == 0) { -#ifdef BUS_DMA_FORCE_WBINV - mips_dcache_wbinv_range(bpage->vaddr, - bpage->datacount); -#else - mips_dcache_wb_range(bpage->vaddr, - bpage->datacount); -#endif - } - dmat->bounce_zone->total_bounced++; - } - if (op & BUS_DMASYNC_POSTREAD) { - if (bpage->vaddr_nocache == 0) { - mips_dcache_inv_range(bpage->vaddr, - bpage->datacount); - } - if (bpage->datavaddr != 0) - bcopy((void *)(bpage->vaddr_nocache != 0 ? - bpage->vaddr_nocache : bpage->vaddr), - (void *)bpage->datavaddr, bpage->datacount); - else - physcopyin((void *)(bpage->vaddr_nocache != 0 ? - bpage->vaddr_nocache : bpage->vaddr), - bpage->dataaddr, bpage->datacount); - dmat->bounce_zone->total_bounced++; - } - } -} - -void -bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op) -{ - struct sync_list *sl, *end; - int aligned; - - if (op == BUS_DMASYNC_POSTWRITE) - return; - if (STAILQ_FIRST(&map->bpages)) - _bus_dmamap_sync_bp(dmat, map, op); - - if ((dmat->flags & BUS_DMA_COHERENT) || - (map->flags & DMAMAP_UNCACHEABLE)) { - if (op & BUS_DMASYNC_PREWRITE) - mips_sync(); - return; - } - - aligned = (map->flags & DMAMAP_CACHE_ALIGNED) ? 1 : 0; - - CTR3(KTR_BUSDMA, "%s: op %x flags %x", __func__, op, map->flags); - if (map->sync_count) { - end = &map->slist[map->sync_count]; - for (sl = &map->slist[0]; sl != end; sl++) - bus_dmamap_sync_buf(sl->vaddr, sl->datacount, op, - aligned); - } -} - -static void -init_bounce_pages(void *dummy __unused) -{ - - total_bpages = 0; - STAILQ_INIT(&bounce_zone_list); - STAILQ_INIT(&bounce_map_waitinglist); - STAILQ_INIT(&bounce_map_callbacklist); - mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF); -} -SYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL); - -static struct sysctl_ctx_list * -busdma_sysctl_tree(struct bounce_zone *bz) -{ - return (&bz->sysctl_tree); -} - -static struct sysctl_oid * -busdma_sysctl_tree_top(struct bounce_zone *bz) -{ - return (bz->sysctl_tree_top); -} - -static int -alloc_bounce_zone(bus_dma_tag_t dmat) -{ - struct bounce_zone *bz; - - /* Check to see if we already have a suitable zone */ - STAILQ_FOREACH(bz, &bounce_zone_list, links) { - if ((dmat->alignment <= bz->alignment) - && (dmat->lowaddr >= bz->lowaddr)) { - dmat->bounce_zone = bz; - return (0); - } - } - - if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_BUSDMA, - M_NOWAIT | M_ZERO)) == NULL) - return (ENOMEM); - - STAILQ_INIT(&bz->bounce_page_list); - bz->free_bpages = 0; - bz->reserved_bpages = 0; - bz->active_bpages = 0; - bz->lowaddr = dmat->lowaddr; - bz->alignment = MAX(dmat->alignment, PAGE_SIZE); - bz->map_count = 0; - snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount); - busdma_zonecount++; - snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr); - STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links); - dmat->bounce_zone = bz; - - sysctl_ctx_init(&bz->sysctl_tree); - bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree, - SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid, - CTLFLAG_RD | CTLFLAG_MPSAFE, 0, ""); - if (bz->sysctl_tree_top == NULL) { - sysctl_ctx_free(&bz->sysctl_tree); - return (0); /* XXX error code? */ - } - - SYSCTL_ADD_INT(busdma_sysctl_tree(bz), - SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, - "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0, - "Total bounce pages"); - SYSCTL_ADD_INT(busdma_sysctl_tree(bz), - SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, - "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0, - "Free bounce pages"); - SYSCTL_ADD_INT(busdma_sysctl_tree(bz), - SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, - "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0, - "Reserved bounce pages"); - SYSCTL_ADD_INT(busdma_sysctl_tree(bz), - SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, - "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0, - "Active bounce pages"); - SYSCTL_ADD_INT(busdma_sysctl_tree(bz), - SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, - "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0, - "Total bounce requests"); - SYSCTL_ADD_INT(busdma_sysctl_tree(bz), - SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, - "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0, - "Total bounce requests that were deferred"); - SYSCTL_ADD_STRING(busdma_sysctl_tree(bz), - SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, - "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, ""); - SYSCTL_ADD_UAUTO(busdma_sysctl_tree(bz), - SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, - "alignment", CTLFLAG_RD, &bz->alignment, ""); - - return (0); -} - -static int -alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages) -{ - struct bounce_zone *bz; - int count; - - bz = dmat->bounce_zone; - count = 0; - while (numpages > 0) { - struct bounce_page *bpage; - - bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_BUSDMA, - M_NOWAIT | M_ZERO); - - if (bpage == NULL) - break; - bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_BOUNCE, - M_NOWAIT, 0ul, - bz->lowaddr, - PAGE_SIZE, - 0); - if (bpage->vaddr == 0) { - free(bpage, M_BUSDMA); - break; - } - bpage->busaddr = pmap_kextract(bpage->vaddr); - bpage->vaddr_nocache = - (vm_offset_t)pmap_mapdev(bpage->busaddr, PAGE_SIZE); - mtx_lock(&bounce_lock); - STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links); - total_bpages++; - bz->total_bpages++; - bz->free_bpages++; - mtx_unlock(&bounce_lock); - count++; - numpages--; - } - return (count); -} - -static int -reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit) -{ - struct bounce_zone *bz; - int pages; - - mtx_assert(&bounce_lock, MA_OWNED); - bz = dmat->bounce_zone; - pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved); - if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages)) - return (map->pagesneeded - (map->pagesreserved + pages)); - bz->free_bpages -= pages; - bz->reserved_bpages += pages; - map->pagesreserved += pages; - pages = map->pagesneeded - map->pagesreserved; - - return (pages); -} - -static bus_addr_t -add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr, - bus_addr_t addr, bus_size_t size) -{ - struct bounce_zone *bz; - struct bounce_page *bpage; - - KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag")); - KASSERT(map != NULL, ("add_bounce_page: bad map %p", map)); - - bz = dmat->bounce_zone; - if (map->pagesneeded == 0) - panic("add_bounce_page: map doesn't need any pages"); - map->pagesneeded--; - - if (map->pagesreserved == 0) - panic("add_bounce_page: map doesn't need any pages"); - map->pagesreserved--; - - mtx_lock(&bounce_lock); - bpage = STAILQ_FIRST(&bz->bounce_page_list); - if (bpage == NULL) - panic("add_bounce_page: free page list is empty"); - - STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links); - bz->reserved_bpages--; - bz->active_bpages++; - mtx_unlock(&bounce_lock); - - if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) { - /* Page offset needs to be preserved. */ - bpage->vaddr |= addr & PAGE_MASK; - bpage->busaddr |= addr & PAGE_MASK; - } - bpage->datavaddr = vaddr; - bpage->dataaddr = addr; - bpage->datacount = size; - STAILQ_INSERT_TAIL(&(map->bpages), bpage, links); - return (bpage->busaddr); -} - -static void -free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage) -{ - struct bus_dmamap *map; - struct bounce_zone *bz; - bool schedule_swi; - - bz = dmat->bounce_zone; - bpage->datavaddr = 0; - bpage->datacount = 0; - if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) { - /* - * Reset the bounce page to start at offset 0. Other uses - * of this bounce page may need to store a full page of - * data and/or assume it starts on a page boundary. - */ - bpage->vaddr &= ~PAGE_MASK; - bpage->busaddr &= ~PAGE_MASK; - } - - schedule_swi = false; - mtx_lock(&bounce_lock); - STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links); - bz->free_bpages++; - bz->active_bpages--; - if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) { - if (reserve_bounce_pages(map->dmat, map, 1) == 0) { - STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links); - STAILQ_INSERT_TAIL(&bounce_map_callbacklist, - map, links); - bz->total_deferred++; - schedule_swi = true; - } - } - mtx_unlock(&bounce_lock); - if (schedule_swi) - swi_sched(busdma_ih, 0); -} - -static void -busdma_swi(void *dummy __unused) -{ - bus_dma_tag_t dmat; - struct bus_dmamap *map; - - mtx_lock(&bounce_lock); - while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) { - STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links); - mtx_unlock(&bounce_lock); - dmat = map->dmat; - (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_LOCK); - bus_dmamap_load_mem(map->dmat, map, &map->mem, map->callback, - map->callback_arg, BUS_DMA_WAITOK); - (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_UNLOCK); - mtx_lock(&bounce_lock); - } - mtx_unlock(&bounce_lock); -} - -static void -start_busdma_swi(void *dummy __unused) -{ - if (swi_add(NULL, "busdma", busdma_swi, NULL, SWI_BUSDMA, INTR_MPSAFE, - &busdma_ih)) - panic("died while creating busdma swi ithread"); -} -SYSINIT(start_busdma_swi, SI_SUB_SOFTINTR, SI_ORDER_ANY, start_busdma_swi, - NULL); diff --git a/sys/mips/mips/cache.c b/sys/mips/mips/cache.c deleted file mode 100644 index 7b611a216e8..00000000000 --- a/sys/mips/mips/cache.c +++ /dev/null @@ -1,331 +0,0 @@ -/* $NetBSD: cache.c,v 1.33 2005/12/24 23:24:01 perry Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause AND BSD-3-Clause - * - * Copyright 2001, 2002 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/*- - * Copyright 2000, 2001 - * Broadcom Corporation. All rights reserved. - * - * This software is furnished under license and may be used and copied only - * in accordance with the following terms and conditions. Subject to these - * conditions, you may download, copy, install, use, modify and distribute - * modified or unmodified copies of this software in source and/or binary - * form. No title or ownership is transferred hereby. - * - * 1) Any source code used, modified or distributed must reproduce and - * retain this copyright notice and list of conditions as they appear in - * the source file. - * - * 2) No right is granted to use any trade name, trademark, or logo of - * Broadcom Corporation. The "Broadcom Corporation" name may not be - * used to endorse or promote products derived from this software - * without the prior written permission of Broadcom Corporation. - * - * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR - * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE - * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE - * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include - -#include -#include - -struct mips_cache_ops mips_cache_ops; - -#if defined(MIPS_DISABLE_L1_CACHE) || defined(CPU_RMI) || defined(CPU_NLM) -static void -cache_noop(vm_offset_t va, vm_size_t size) -{ -} -#endif - -void -mips_config_cache(struct mips_cpuinfo * cpuinfo) -{ - - switch (cpuinfo->l1.ic_linesize) { - case 16: - mips_cache_ops.mco_icache_sync_all = mipsNN_icache_sync_all_16; - mips_cache_ops.mco_icache_sync_range = - mipsNN_icache_sync_range_16; - mips_cache_ops.mco_icache_sync_range_index = - mipsNN_icache_sync_range_index_16; - break; - case 32: - mips_cache_ops.mco_icache_sync_all = mipsNN_icache_sync_all_32; - mips_cache_ops.mco_icache_sync_range = - mipsNN_icache_sync_range_32; - mips_cache_ops.mco_icache_sync_range_index = - mipsNN_icache_sync_range_index_32; - break; - case 64: - mips_cache_ops.mco_icache_sync_all = mipsNN_icache_sync_all_64; - mips_cache_ops.mco_icache_sync_range = - mipsNN_icache_sync_range_64; - mips_cache_ops.mco_icache_sync_range_index = - mipsNN_icache_sync_range_index_64; - break; - case 128: - mips_cache_ops.mco_icache_sync_all = mipsNN_icache_sync_all_128; - mips_cache_ops.mco_icache_sync_range = - mipsNN_icache_sync_range_128; - mips_cache_ops.mco_icache_sync_range_index = - mipsNN_icache_sync_range_index_128; - break; - -#ifdef MIPS_DISABLE_L1_CACHE - case 0: - mips_cache_ops.mco_icache_sync_all = (void (*)(void))cache_noop; - mips_cache_ops.mco_icache_sync_range = cache_noop; - mips_cache_ops.mco_icache_sync_range_index = cache_noop; - break; -#endif - default: - panic("no Icache ops for %d byte lines", - cpuinfo->l1.ic_linesize); - } - - switch (cpuinfo->l1.dc_linesize) { - case 16: - mips_cache_ops.mco_pdcache_wbinv_all = - mips_cache_ops.mco_intern_pdcache_wbinv_all = - mipsNN_pdcache_wbinv_all_16; - mips_cache_ops.mco_pdcache_wbinv_range = - mipsNN_pdcache_wbinv_range_16; - mips_cache_ops.mco_pdcache_wbinv_range_index = - mips_cache_ops.mco_intern_pdcache_wbinv_range_index = - mipsNN_pdcache_wbinv_range_index_16; - mips_cache_ops.mco_pdcache_inv_range = - mipsNN_pdcache_inv_range_16; - mips_cache_ops.mco_pdcache_wb_range = - mips_cache_ops.mco_intern_pdcache_wb_range = - mipsNN_pdcache_wb_range_16; - break; - case 32: - mips_cache_ops.mco_pdcache_wbinv_all = - mips_cache_ops.mco_intern_pdcache_wbinv_all = - mipsNN_pdcache_wbinv_all_32; -#if defined(CPU_RMI) || defined(CPU_NLM) - mips_cache_ops.mco_pdcache_wbinv_range = cache_noop; -#else - mips_cache_ops.mco_pdcache_wbinv_range = - mipsNN_pdcache_wbinv_range_32; -#endif -#if defined(CPU_RMI) || defined(CPU_NLM) - mips_cache_ops.mco_pdcache_wbinv_range_index = - mips_cache_ops.mco_intern_pdcache_wbinv_range_index = cache_noop; - mips_cache_ops.mco_pdcache_inv_range = cache_noop; -#else - mips_cache_ops.mco_pdcache_wbinv_range_index = - mips_cache_ops.mco_intern_pdcache_wbinv_range_index = - mipsNN_pdcache_wbinv_range_index_32; - mips_cache_ops.mco_pdcache_inv_range = - mipsNN_pdcache_inv_range_32; -#endif -#if defined(CPU_RMI) || defined(CPU_NLM) - mips_cache_ops.mco_pdcache_wb_range = - mips_cache_ops.mco_intern_pdcache_wb_range = cache_noop; -#else - mips_cache_ops.mco_pdcache_wb_range = - mips_cache_ops.mco_intern_pdcache_wb_range = - mipsNN_pdcache_wb_range_32; -#endif - break; - case 64: - mips_cache_ops.mco_pdcache_wbinv_all = - mips_cache_ops.mco_intern_pdcache_wbinv_all = - mipsNN_pdcache_wbinv_all_64; - mips_cache_ops.mco_pdcache_wbinv_range = - mipsNN_pdcache_wbinv_range_64; - mips_cache_ops.mco_pdcache_wbinv_range_index = - mips_cache_ops.mco_intern_pdcache_wbinv_range_index = - mipsNN_pdcache_wbinv_range_index_64; - mips_cache_ops.mco_pdcache_inv_range = - mipsNN_pdcache_inv_range_64; - mips_cache_ops.mco_pdcache_wb_range = - mips_cache_ops.mco_intern_pdcache_wb_range = - mipsNN_pdcache_wb_range_64; - break; - case 128: - mips_cache_ops.mco_pdcache_wbinv_all = - mips_cache_ops.mco_intern_pdcache_wbinv_all = - mipsNN_pdcache_wbinv_all_128; - mips_cache_ops.mco_pdcache_wbinv_range = - mipsNN_pdcache_wbinv_range_128; - mips_cache_ops.mco_pdcache_wbinv_range_index = - mips_cache_ops.mco_intern_pdcache_wbinv_range_index = - mipsNN_pdcache_wbinv_range_index_128; - mips_cache_ops.mco_pdcache_inv_range = - mipsNN_pdcache_inv_range_128; - mips_cache_ops.mco_pdcache_wb_range = - mips_cache_ops.mco_intern_pdcache_wb_range = - mipsNN_pdcache_wb_range_128; - break; -#ifdef MIPS_DISABLE_L1_CACHE - case 0: - mips_cache_ops.mco_pdcache_wbinv_all = - mips_cache_ops.mco_intern_pdcache_wbinv_all = - (void (*)(void))cache_noop; - mips_cache_ops.mco_pdcache_wbinv_range = cache_noop; - mips_cache_ops.mco_pdcache_wbinv_range_index = cache_noop; - mips_cache_ops.mco_intern_pdcache_wbinv_range_index = - cache_noop; - mips_cache_ops.mco_pdcache_inv_range = cache_noop; - mips_cache_ops.mco_pdcache_wb_range = cache_noop; - mips_cache_ops.mco_intern_pdcache_wb_range = cache_noop; - break; -#endif - default: - panic("no Dcache ops for %d byte lines", - cpuinfo->l1.dc_linesize); - } - - mipsNN_cache_init(cpuinfo); - -#if 0 - if (mips_cpu_flags & - (CPU_MIPS_D_CACHE_COHERENT | CPU_MIPS_I_D_CACHE_COHERENT)) { -#ifdef CACHE_DEBUG - printf(" Dcache is coherent\n"); -#endif - mips_cache_ops.mco_pdcache_wbinv_all = - (void (*)(void))cache_noop; - mips_cache_ops.mco_pdcache_wbinv_range = cache_noop; - mips_cache_ops.mco_pdcache_wbinv_range_index = cache_noop; - mips_cache_ops.mco_pdcache_inv_range = cache_noop; - mips_cache_ops.mco_pdcache_wb_range = cache_noop; - } - if (mips_cpu_flags & CPU_MIPS_I_D_CACHE_COHERENT) { -#ifdef CACHE_DEBUG - printf(" Icache is coherent against Dcache\n"); -#endif - mips_cache_ops.mco_intern_pdcache_wbinv_all = - (void (*)(void))cache_noop; - mips_cache_ops.mco_intern_pdcache_wbinv_range_index = - cache_noop; - mips_cache_ops.mco_intern_pdcache_wb_range = cache_noop; - } -#endif - - /* Check that all cache ops are set up. */ - /* must have primary Icache */ - if (cpuinfo->l1.ic_size) { - - if (!mips_cache_ops.mco_icache_sync_all) - panic("no icache_sync_all cache op"); - if (!mips_cache_ops.mco_icache_sync_range) - panic("no icache_sync_range cache op"); - if (!mips_cache_ops.mco_icache_sync_range_index) - panic("no icache_sync_range_index cache op"); - } - /* must have primary Dcache */ - if (cpuinfo->l1.dc_size) { - if (!mips_cache_ops.mco_pdcache_wbinv_all) - panic("no pdcache_wbinv_all"); - if (!mips_cache_ops.mco_pdcache_wbinv_range) - panic("no pdcache_wbinv_range"); - if (!mips_cache_ops.mco_pdcache_wbinv_range_index) - panic("no pdcache_wbinv_range_index"); - if (!mips_cache_ops.mco_pdcache_inv_range) - panic("no pdcache_inv_range"); - if (!mips_cache_ops.mco_pdcache_wb_range) - panic("no pdcache_wb_range"); - } - - /* L2 data cache */ - if (!cpuinfo->l2.dc_size) { - /* No L2 found, ignore */ - return; - } - - switch (cpuinfo->l2.dc_linesize) { - case 32: - mips_cache_ops.mco_sdcache_wbinv_all = - mipsNN_sdcache_wbinv_all_32; - mips_cache_ops.mco_sdcache_wbinv_range = - mipsNN_sdcache_wbinv_range_32; - mips_cache_ops.mco_sdcache_wbinv_range_index = - mipsNN_sdcache_wbinv_range_index_32; - mips_cache_ops.mco_sdcache_inv_range = - mipsNN_sdcache_inv_range_32; - mips_cache_ops.mco_sdcache_wb_range = - mipsNN_sdcache_wb_range_32; - break; - case 64: - mips_cache_ops.mco_sdcache_wbinv_all = - mipsNN_sdcache_wbinv_all_64; - mips_cache_ops.mco_sdcache_wbinv_range = - mipsNN_sdcache_wbinv_range_64; - mips_cache_ops.mco_sdcache_wbinv_range_index = - mipsNN_sdcache_wbinv_range_index_64; - mips_cache_ops.mco_sdcache_inv_range = - mipsNN_sdcache_inv_range_64; - mips_cache_ops.mco_sdcache_wb_range = - mipsNN_sdcache_wb_range_64; - break; - case 128: - mips_cache_ops.mco_sdcache_wbinv_all = - mipsNN_sdcache_wbinv_all_128; - mips_cache_ops.mco_sdcache_wbinv_range = - mipsNN_sdcache_wbinv_range_128; - mips_cache_ops.mco_sdcache_wbinv_range_index = - mipsNN_sdcache_wbinv_range_index_128; - mips_cache_ops.mco_sdcache_inv_range = - mipsNN_sdcache_inv_range_128; - mips_cache_ops.mco_sdcache_wb_range = - mipsNN_sdcache_wb_range_128; - break; - default: -#ifdef CACHE_DEBUG - printf(" no sdcache ops for %d byte lines", - cpuinfo->l2.dc_linesize); -#endif - break; - } -} diff --git a/sys/mips/mips/cache_mipsNN.c b/sys/mips/mips/cache_mipsNN.c deleted file mode 100644 index 9cf8bef4be8..00000000000 --- a/sys/mips/mips/cache_mipsNN.c +++ /dev/null @@ -1,1379 +0,0 @@ -/* $NetBSD: cache_mipsNN.c,v 1.10 2005/12/24 20:07:19 perry Exp $ */ - -/* - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright 2001 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Jason R. Thorpe and Simon Burge for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include - -#include -#include -#include - -#define round_line16(x) (((x) + 15) & ~15) -#define trunc_line16(x) ((x) & ~15) - -#define round_line32(x) (((x) + 31) & ~31) -#define trunc_line32(x) ((x) & ~31) - -#define round_line64(x) (((x) + 63) & ~63) -#define trunc_line64(x) ((x) & ~63) - -#define round_line128(x) (((x) + 127) & ~127) -#define trunc_line128(x) ((x) & ~127) - -#if defined(CPU_NLM) -static __inline void -xlp_sync(void) -{ - __asm __volatile ( - ".set push \n" - ".set noreorder \n" - ".set mips64 \n" - "dla $8, 1f \n" - "/* jr.hb $8 */ \n" - ".word 0x1000408 \n" - "nop \n" - "1: nop \n" - ".set pop \n" - : : : "$8"); -} -#endif - -#if defined(SB1250_PASS1) -#define SYNC __asm volatile("sync; sync") -#elif defined(CPU_NLM) -#define SYNC xlp_sync() -#else -#define SYNC __asm volatile("sync") -#endif - -#if defined(CPU_CNMIPS) -#define SYNCI mips_sync_icache(); -#elif defined(CPU_NLM) -#define SYNCI xlp_sync() -#else -#define SYNCI -#endif - -/* - * Exported variables for consumers like bus_dma code - */ -int mips_picache_linesize; -int mips_pdcache_linesize; -int mips_sdcache_linesize; -int mips_dcache_max_linesize; - -static int picache_size; -static int picache_stride; -static int picache_loopcount; -static int picache_way_mask; -static int pdcache_size; -static int pdcache_stride; -static int pdcache_loopcount; -static int pdcache_way_mask; -static int sdcache_size; -static int sdcache_stride; -static int sdcache_loopcount; -static int sdcache_way_mask; - -void -mipsNN_cache_init(struct mips_cpuinfo * cpuinfo) -{ - int flush_multiple_lines_per_way; - - flush_multiple_lines_per_way = cpuinfo->l1.ic_nsets * cpuinfo->l1.ic_linesize * cpuinfo->l1.ic_linesize > PAGE_SIZE; - if (cpuinfo->icache_virtual) { - /* - * With a virtual Icache we don't need to flush - * multiples of the page size with index ops; we just - * need to flush one pages' worth. - */ - flush_multiple_lines_per_way = 0; - } - - if (flush_multiple_lines_per_way) { - picache_stride = PAGE_SIZE; - picache_loopcount = (cpuinfo->l1.ic_nsets * cpuinfo->l1.ic_linesize / PAGE_SIZE) * - cpuinfo->l1.ic_nways; - } else { - picache_stride = cpuinfo->l1.ic_nsets * cpuinfo->l1.ic_linesize; - picache_loopcount = cpuinfo->l1.ic_nways; - } - - if (cpuinfo->l1.dc_nsets * cpuinfo->l1.dc_linesize < PAGE_SIZE) { - pdcache_stride = cpuinfo->l1.dc_nsets * cpuinfo->l1.dc_linesize; - pdcache_loopcount = cpuinfo->l1.dc_nways; - } else { - pdcache_stride = PAGE_SIZE; - pdcache_loopcount = (cpuinfo->l1.dc_nsets * cpuinfo->l1.dc_linesize / PAGE_SIZE) * - cpuinfo->l1.dc_nways; - } - - mips_picache_linesize = cpuinfo->l1.ic_linesize; - mips_pdcache_linesize = cpuinfo->l1.dc_linesize; - - picache_size = cpuinfo->l1.ic_size; - picache_way_mask = cpuinfo->l1.ic_nways - 1; - pdcache_size = cpuinfo->l1.dc_size; - pdcache_way_mask = cpuinfo->l1.dc_nways - 1; - - sdcache_stride = cpuinfo->l2.dc_nsets * cpuinfo->l2.dc_linesize; - sdcache_loopcount = cpuinfo->l2.dc_nways; - sdcache_size = cpuinfo->l2.dc_size; - sdcache_way_mask = cpuinfo->l2.dc_nways - 1; - - mips_sdcache_linesize = cpuinfo->l2.dc_linesize; - mips_dcache_max_linesize = MAX(mips_pdcache_linesize, - mips_sdcache_linesize); - -#define CACHE_DEBUG -#ifdef CACHE_DEBUG - printf("Cache info:\n"); - if (cpuinfo->icache_virtual) - printf(" icache is virtual\n"); - printf(" picache_stride = %d\n", picache_stride); - printf(" picache_loopcount = %d\n", picache_loopcount); - printf(" pdcache_stride = %d\n", pdcache_stride); - printf(" pdcache_loopcount = %d\n", pdcache_loopcount); - printf(" max line size = %d\n", mips_dcache_max_linesize); -#endif -} - -void -mipsNN_icache_sync_all_16(void) -{ - vm_offset_t va, eva; - - va = MIPS_PHYS_TO_KSEG0(0); - eva = va + picache_size; - - /* - * Since we're hitting the whole thing, we don't have to - * worry about the N different "ways". - */ - - mips_intern_dcache_wbinv_all(); - - while (va < eva) { - cache_r4k_op_32lines_16(va, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV); - va += (32 * 16); - } - - SYNC; -} - -void -mipsNN_icache_sync_all_32(void) -{ - vm_offset_t va, eva; - - va = MIPS_PHYS_TO_KSEG0(0); - eva = va + picache_size; - - /* - * Since we're hitting the whole thing, we don't have to - * worry about the N different "ways". - */ - - mips_intern_dcache_wbinv_all(); - - while (va < eva) { - cache_r4k_op_32lines_32(va, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV); - va += (32 * 32); - } - - SYNC; -} - -void -mipsNN_icache_sync_all_64(void) -{ - vm_offset_t va, eva; - - va = MIPS_PHYS_TO_KSEG0(0); - eva = va + picache_size; - - /* - * Since we're hitting the whole thing, we don't have to - * worry about the N different "ways". - */ - - mips_intern_dcache_wbinv_all(); - - while (va < eva) { - cache_r4k_op_32lines_64(va, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV); - va += (32 * 64); - } - - SYNC; -} - -void -mipsNN_icache_sync_range_16(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - eva = round_line16(va + size); - va = trunc_line16(va); - - mips_intern_dcache_wb_range(va, (eva - va)); - - while ((eva - va) >= (32 * 16)) { - cache_r4k_op_32lines_16(va, CACHE_R4K_I|CACHEOP_R4K_HIT_INV); - va += (32 * 16); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_I|CACHEOP_R4K_HIT_INV); - va += 16; - } - - SYNC; -} - -void -mipsNN_icache_sync_range_32(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - eva = round_line32(va + size); - va = trunc_line32(va); - - mips_intern_dcache_wb_range(va, (eva - va)); - - while ((eva - va) >= (32 * 32)) { - cache_r4k_op_32lines_32(va, CACHE_R4K_I|CACHEOP_R4K_HIT_INV); - va += (32 * 32); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_I|CACHEOP_R4K_HIT_INV); - va += 32; - } - - SYNC; -} - -void -mipsNN_icache_sync_range_64(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - eva = round_line64(va + size); - va = trunc_line64(va); - - mips_intern_dcache_wb_range(va, (eva - va)); - - while ((eva - va) >= (32 * 64)) { - cache_r4k_op_32lines_64(va, CACHE_R4K_I|CACHEOP_R4K_HIT_INV); - va += (32 * 64); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_I|CACHEOP_R4K_HIT_INV); - va += 64; - } - - SYNC; -} - -void -mipsNN_icache_sync_range_index_16(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva, tmpva; - int i, stride, loopcount; - - /* - * Since we're doing Index ops, we expect to not be able - * to access the address we've been given. So, get the - * bits that determine the cache index, and make a KSEG0 - * address out of them. - */ - va = MIPS_PHYS_TO_KSEG0(va & picache_way_mask); - - eva = round_line16(va + size); - va = trunc_line16(va); - - /* - * GCC generates better code in the loops if we reference local - * copies of these global variables. - */ - stride = picache_stride; - loopcount = picache_loopcount; - - mips_intern_dcache_wbinv_range_index(va, (eva - va)); - - while ((eva - va) >= (8 * 16)) { - tmpva = va; - for (i = 0; i < loopcount; i++, tmpva += stride) - cache_r4k_op_8lines_16(tmpva, - CACHE_R4K_I|CACHEOP_R4K_INDEX_INV); - va += 8 * 16; - } - - while (va < eva) { - tmpva = va; - for (i = 0; i < loopcount; i++, tmpva += stride) - cache_op_r4k_line(tmpva, - CACHE_R4K_I|CACHEOP_R4K_INDEX_INV); - va += 16; - } -} - -void -mipsNN_icache_sync_range_index_32(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva, tmpva; - int i, stride, loopcount; - - /* - * Since we're doing Index ops, we expect to not be able - * to access the address we've been given. So, get the - * bits that determine the cache index, and make a KSEG0 - * address out of them. - */ - va = MIPS_PHYS_TO_KSEG0(va & picache_way_mask); - - eva = round_line32(va + size); - va = trunc_line32(va); - - /* - * GCC generates better code in the loops if we reference local - * copies of these global variables. - */ - stride = picache_stride; - loopcount = picache_loopcount; - - mips_intern_dcache_wbinv_range_index(va, (eva - va)); - - while ((eva - va) >= (8 * 32)) { - tmpva = va; - for (i = 0; i < loopcount; i++, tmpva += stride) - cache_r4k_op_8lines_32(tmpva, - CACHE_R4K_I|CACHEOP_R4K_INDEX_INV); - va += 8 * 32; - } - - while (va < eva) { - tmpva = va; - for (i = 0; i < loopcount; i++, tmpva += stride) - cache_op_r4k_line(tmpva, - CACHE_R4K_I|CACHEOP_R4K_INDEX_INV); - va += 32; - } -} - -void -mipsNN_icache_sync_range_index_64(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva, tmpva; - int i, stride, loopcount; - - /* - * Since we're doing Index ops, we expect to not be able - * to access the address we've been given. So, get the - * bits that determine the cache index, and make a KSEG0 - * address out of them. - */ - va = MIPS_PHYS_TO_KSEG0(va & picache_way_mask); - - eva = round_line64(va + size); - va = trunc_line64(va); - - /* - * GCC generates better code in the loops if we reference local - * copies of these global variables. - */ - stride = picache_stride; - loopcount = picache_loopcount; - - mips_intern_dcache_wbinv_range_index(va, (eva - va)); - - while ((eva - va) >= (8 * 64)) { - tmpva = va; - for (i = 0; i < loopcount; i++, tmpva += stride) - cache_r4k_op_8lines_64(tmpva, - CACHE_R4K_I|CACHEOP_R4K_INDEX_INV); - va += 8 * 64; - } - - while (va < eva) { - tmpva = va; - for (i = 0; i < loopcount; i++, tmpva += stride) - cache_op_r4k_line(tmpva, - CACHE_R4K_I|CACHEOP_R4K_INDEX_INV); - va += 64; - } -} - -void -mipsNN_pdcache_wbinv_all_16(void) -{ - vm_offset_t va, eva; - - va = MIPS_PHYS_TO_KSEG0(0); - eva = va + pdcache_size; - - /* - * Since we're hitting the whole thing, we don't have to - * worry about the N different "ways". - */ - - while (va < eva) { - cache_r4k_op_32lines_16(va, - CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV); - va += (32 * 16); - } - - SYNC; -} - -void -mipsNN_pdcache_wbinv_all_32(void) -{ - vm_offset_t va, eva; - - va = MIPS_PHYS_TO_KSEG0(0); - eva = va + pdcache_size; - - /* - * Since we're hitting the whole thing, we don't have to - * worry about the N different "ways". - */ - - while (va < eva) { - cache_r4k_op_32lines_32(va, - CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV); - va += (32 * 32); - } - - SYNC; -} - -void -mipsNN_pdcache_wbinv_all_64(void) -{ - vm_offset_t va, eva; - - va = MIPS_PHYS_TO_KSEG0(0); - eva = va + pdcache_size; - - /* - * Since we're hitting the whole thing, we don't have to - * worry about the N different "ways". - */ - - while (va < eva) { - cache_r4k_op_32lines_64(va, - CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV); - va += (32 * 64); - } - - SYNC; -} - -void -mipsNN_pdcache_wbinv_range_16(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - eva = round_line16(va + size); - va = trunc_line16(va); - - while ((eva - va) >= (32 * 16)) { - cache_r4k_op_32lines_16(va, - CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV); - va += (32 * 16); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV); - va += 16; - } - - SYNC; -} - -void -mipsNN_pdcache_wbinv_range_32(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - eva = round_line32(va + size); - va = trunc_line32(va); - - while ((eva - va) >= (32 * 32)) { - cache_r4k_op_32lines_32(va, - CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV); - va += (32 * 32); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV); - va += 32; - } - - SYNC; -} - -void -mipsNN_pdcache_wbinv_range_64(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - eva = round_line64(va + size); - va = trunc_line64(va); - - while ((eva - va) >= (32 * 64)) { - cache_r4k_op_32lines_64(va, - CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV); - va += (32 * 64); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV); - va += 64; - } - - SYNC; -} - -void -mipsNN_pdcache_wbinv_range_index_16(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva, tmpva; - int i, stride, loopcount; - - /* - * Since we're doing Index ops, we expect to not be able - * to access the address we've been given. So, get the - * bits that determine the cache index, and make a KSEG0 - * address out of them. - */ - va = MIPS_PHYS_TO_KSEG0(va & pdcache_way_mask); - - eva = round_line16(va + size); - va = trunc_line16(va); - - /* - * GCC generates better code in the loops if we reference local - * copies of these global variables. - */ - stride = pdcache_stride; - loopcount = pdcache_loopcount; - - while ((eva - va) >= (8 * 16)) { - tmpva = va; - for (i = 0; i < loopcount; i++, tmpva += stride) - cache_r4k_op_8lines_16(tmpva, - CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV); - va += 8 * 16; - } - - while (va < eva) { - tmpva = va; - for (i = 0; i < loopcount; i++, tmpva += stride) - cache_op_r4k_line(tmpva, - CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV); - va += 16; - } -} - -void -mipsNN_pdcache_wbinv_range_index_32(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva, tmpva; - int i, stride, loopcount; - - /* - * Since we're doing Index ops, we expect to not be able - * to access the address we've been given. So, get the - * bits that determine the cache index, and make a KSEG0 - * address out of them. - */ - va = MIPS_PHYS_TO_KSEG0(va & pdcache_way_mask); - - eva = round_line32(va + size); - va = trunc_line32(va); - - /* - * GCC generates better code in the loops if we reference local - * copies of these global variables. - */ - stride = pdcache_stride; - loopcount = pdcache_loopcount; - - while ((eva - va) >= (8 * 32)) { - tmpva = va; - for (i = 0; i < loopcount; i++, tmpva += stride) - cache_r4k_op_8lines_32(tmpva, - CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV); - va += 8 * 32; - } - - while (va < eva) { - tmpva = va; - for (i = 0; i < loopcount; i++, tmpva += stride) - cache_op_r4k_line(tmpva, - CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV); - va += 32; - } -} - -void -mipsNN_pdcache_wbinv_range_index_64(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva, tmpva; - int i, stride, loopcount; - - /* - * Since we're doing Index ops, we expect to not be able - * to access the address we've been given. So, get the - * bits that determine the cache index, and make a KSEG0 - * address out of them. - */ - va = MIPS_PHYS_TO_KSEG0(va & pdcache_way_mask); - - eva = round_line64(va + size); - va = trunc_line64(va); - - /* - * GCC generates better code in the loops if we reference local - * copies of these global variables. - */ - stride = pdcache_stride; - loopcount = pdcache_loopcount; - - while ((eva - va) >= (8 * 64)) { - tmpva = va; - for (i = 0; i < loopcount; i++, tmpva += stride) - cache_r4k_op_8lines_64(tmpva, - CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV); - va += 8 * 64; - } - - while (va < eva) { - tmpva = va; - for (i = 0; i < loopcount; i++, tmpva += stride) - cache_op_r4k_line(tmpva, - CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV); - va += 64; - } -} - -void -mipsNN_pdcache_inv_range_16(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - eva = round_line16(va + size); - va = trunc_line16(va); - - while ((eva - va) >= (32 * 16)) { - cache_r4k_op_32lines_16(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV); - va += (32 * 16); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV); - va += 16; - } - - SYNC; -} - -void -mipsNN_pdcache_inv_range_32(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - eva = round_line32(va + size); - va = trunc_line32(va); - - while ((eva - va) >= (32 * 32)) { - cache_r4k_op_32lines_32(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV); - va += (32 * 32); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV); - va += 32; - } - - SYNC; -} - -void -mipsNN_pdcache_inv_range_64(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - eva = round_line64(va + size); - va = trunc_line64(va); - - while ((eva - va) >= (32 * 64)) { - cache_r4k_op_32lines_64(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV); - va += (32 * 64); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV); - va += 64; - } - - SYNC; -} - -void -mipsNN_pdcache_wb_range_16(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - eva = round_line16(va + size); - va = trunc_line16(va); - - while ((eva - va) >= (32 * 16)) { - cache_r4k_op_32lines_16(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB); - va += (32 * 16); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB); - va += 16; - } - - SYNC; -} - -void -mipsNN_pdcache_wb_range_32(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - eva = round_line32(va + size); - va = trunc_line32(va); - - while ((eva - va) >= (32 * 32)) { - cache_r4k_op_32lines_32(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB); - va += (32 * 32); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB); - va += 32; - } - - SYNC; -} - -void -mipsNN_pdcache_wb_range_64(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - eva = round_line64(va + size); - va = trunc_line64(va); - - while ((eva - va) >= (32 * 64)) { - cache_r4k_op_32lines_64(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB); - va += (32 * 64); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB); - va += 64; - } - - SYNC; -} - -#ifdef CPU_CNMIPS - -void -mipsNN_icache_sync_all_128(void) -{ - SYNCI -} - -void -mipsNN_icache_sync_range_128(vm_offset_t va, vm_size_t size) -{ - SYNC; -} - -void -mipsNN_icache_sync_range_index_128(vm_offset_t va, vm_size_t size) -{ -} - -void -mipsNN_pdcache_wbinv_all_128(void) -{ -} - -void -mipsNN_pdcache_wbinv_range_128(vm_offset_t va, vm_size_t size) -{ - SYNC; -} - -void -mipsNN_pdcache_wbinv_range_index_128(vm_offset_t va, vm_size_t size) -{ -} - -void -mipsNN_pdcache_inv_range_128(vm_offset_t va, vm_size_t size) -{ -} - -void -mipsNN_pdcache_wb_range_128(vm_offset_t va, vm_size_t size) -{ - SYNC; -} - -#else - -void -mipsNN_icache_sync_all_128(void) -{ - vm_offset_t va, eva; - - va = MIPS_PHYS_TO_KSEG0(0); - eva = va + picache_size; - - /* - * Since we're hitting the whole thing, we don't have to - * worry about the N different "ways". - */ - - mips_intern_dcache_wbinv_all(); - - while (va < eva) { - cache_r4k_op_32lines_128(va, CACHE_R4K_I|CACHEOP_R4K_INDEX_INV); - va += (32 * 128); - } - - SYNC; -} - -void -mipsNN_icache_sync_range_128(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - eva = round_line128(va + size); - va = trunc_line128(va); - - mips_intern_dcache_wb_range(va, (eva - va)); - - while ((eva - va) >= (32 * 128)) { - cache_r4k_op_32lines_128(va, CACHE_R4K_I|CACHEOP_R4K_HIT_INV); - va += (32 * 128); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_I|CACHEOP_R4K_HIT_INV); - va += 128; - } - - SYNC; -} - -void -mipsNN_icache_sync_range_index_128(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva, tmpva; - int i, stride, loopcount; - - /* - * Since we're doing Index ops, we expect to not be able - * to access the address we've been given. So, get the - * bits that determine the cache index, and make a KSEG0 - * address out of them. - */ - va = MIPS_PHYS_TO_KSEG0(va & picache_way_mask); - - eva = round_line128(va + size); - va = trunc_line128(va); - - /* - * GCC generates better code in the loops if we reference local - * copies of these global variables. - */ - stride = picache_stride; - loopcount = picache_loopcount; - - mips_intern_dcache_wbinv_range_index(va, (eva - va)); - - while ((eva - va) >= (32 * 128)) { - tmpva = va; - for (i = 0; i < loopcount; i++, tmpva += stride) - cache_r4k_op_32lines_128(tmpva, - CACHE_R4K_I|CACHEOP_R4K_INDEX_INV); - va += 32 * 128; - } - - while (va < eva) { - tmpva = va; - for (i = 0; i < loopcount; i++, tmpva += stride) - cache_op_r4k_line(tmpva, - CACHE_R4K_I|CACHEOP_R4K_INDEX_INV); - va += 128; - } -} - -void -mipsNN_pdcache_wbinv_all_128(void) -{ - vm_offset_t va, eva; - - va = MIPS_PHYS_TO_KSEG0(0); - eva = va + pdcache_size; - - /* - * Since we're hitting the whole thing, we don't have to - * worry about the N different "ways". - */ - - while (va < eva) { - cache_r4k_op_32lines_128(va, - CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV); - va += (32 * 128); - } - - SYNC; -} - -void -mipsNN_pdcache_wbinv_range_128(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - eva = round_line128(va + size); - va = trunc_line128(va); - - while ((eva - va) >= (32 * 128)) { - cache_r4k_op_32lines_128(va, - CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV); - va += (32 * 128); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV); - va += 128; - } - - SYNC; -} - -void -mipsNN_pdcache_wbinv_range_index_128(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva, tmpva; - int i, stride, loopcount; - - /* - * Since we're doing Index ops, we expect to not be able - * to access the address we've been given. So, get the - * bits that determine the cache index, and make a KSEG0 - * address out of them. - */ - va = MIPS_PHYS_TO_KSEG0(va & pdcache_way_mask); - - eva = round_line128(va + size); - va = trunc_line128(va); - - /* - * GCC generates better code in the loops if we reference local - * copies of these global variables. - */ - stride = pdcache_stride; - loopcount = pdcache_loopcount; - - while ((eva - va) >= (32 * 128)) { - tmpva = va; - for (i = 0; i < loopcount; i++, tmpva += stride) - cache_r4k_op_32lines_128(tmpva, - CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV); - va += 32 * 128; - } - - while (va < eva) { - tmpva = va; - for (i = 0; i < loopcount; i++, tmpva += stride) - cache_op_r4k_line(tmpva, - CACHE_R4K_D|CACHEOP_R4K_INDEX_WB_INV); - va += 128; - } -} - -void -mipsNN_pdcache_inv_range_128(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - eva = round_line128(va + size); - va = trunc_line128(va); - - while ((eva - va) >= (32 * 128)) { - cache_r4k_op_32lines_128(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV); - va += (32 * 128); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV); - va += 128; - } - - SYNC; -} - -void -mipsNN_pdcache_wb_range_128(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - eva = round_line128(va + size); - va = trunc_line128(va); - - while ((eva - va) >= (32 * 128)) { - cache_r4k_op_32lines_128(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB); - va += (32 * 128); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB); - va += 128; - } - - SYNC; -} - -#endif - -void -mipsNN_sdcache_wbinv_all_32(void) -{ - vm_offset_t va = MIPS_PHYS_TO_KSEG0(0); - vm_offset_t eva = va + sdcache_size; - - while (va < eva) { - cache_r4k_op_32lines_32(va, - CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV); - va += (32 * 32); - } -} - -void -mipsNN_sdcache_wbinv_all_64(void) -{ - vm_offset_t va = MIPS_PHYS_TO_KSEG0(0); - vm_offset_t eva = va + sdcache_size; - - while (va < eva) { - cache_r4k_op_32lines_64(va, - CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV); - va += (32 * 64); - } -} - -void -mipsNN_sdcache_wbinv_range_32(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva = round_line32(va + size); - - va = trunc_line32(va); - - while ((eva - va) >= (32 * 32)) { - cache_r4k_op_32lines_32(va, - CACHE_R4K_SD|CACHEOP_R4K_HIT_WB_INV); - va += (32 * 32); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB_INV); - va += 32; - } -} - -void -mipsNN_sdcache_wbinv_range_64(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva = round_line64(va + size); - - va = trunc_line64(va); - - while ((eva - va) >= (32 * 64)) { - cache_r4k_op_32lines_64(va, - CACHE_R4K_SD|CACHEOP_R4K_HIT_WB_INV); - va += (32 * 64); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB_INV); - va += 64; - } -} - -void -mipsNN_sdcache_wbinv_range_index_32(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - /* - * Since we're doing Index ops, we expect to not be able - * to access the address we've been given. So, get the - * bits that determine the cache index, and make a KSEG0 - * address out of them. - */ - va = MIPS_PHYS_TO_KSEG0(va & (sdcache_size - 1)); - - eva = round_line32(va + size); - va = trunc_line32(va); - - while ((eva - va) >= (32 * 32)) { - cache_r4k_op_32lines_32(va, - CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV); - va += (32 * 32); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV); - va += 32; - } -} - -void -mipsNN_sdcache_wbinv_range_index_64(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - /* - * Since we're doing Index ops, we expect to not be able - * to access the address we've been given. So, get the - * bits that determine the cache index, and make a KSEG0 - * address out of them. - */ - va = MIPS_PHYS_TO_KSEG0(va & (sdcache_size - 1)); - - eva = round_line64(va + size); - va = trunc_line64(va); - - while ((eva - va) >= (32 * 64)) { - cache_r4k_op_32lines_64(va, - CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV); - va += (32 * 64); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV); - va += 64; - } -} - -void -mipsNN_sdcache_inv_range_32(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva = round_line32(va + size); - - va = trunc_line32(va); - - while ((eva - va) >= (32 * 32)) { - cache_r4k_op_32lines_32(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_INV); - va += (32 * 32); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_INV); - va += 32; - } -} - -void -mipsNN_sdcache_inv_range_64(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva = round_line64(va + size); - - va = trunc_line64(va); - - while ((eva - va) >= (32 * 64)) { - cache_r4k_op_32lines_64(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_INV); - va += (32 * 64); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_INV); - va += 64; - } -} - -void -mipsNN_sdcache_wb_range_32(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva = round_line32(va + size); - - va = trunc_line32(va); - - while ((eva - va) >= (32 * 32)) { - cache_r4k_op_32lines_32(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB); - va += (32 * 32); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB); - va += 32; - } -} - -void -mipsNN_sdcache_wb_range_64(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva = round_line64(va + size); - - va = trunc_line64(va); - - while ((eva - va) >= (32 * 64)) { - cache_r4k_op_32lines_64(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB); - va += (32 * 64); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB); - va += 64; - } -} - -void -mipsNN_sdcache_wbinv_all_128(void) -{ - vm_offset_t va = MIPS_PHYS_TO_KSEG0(0); - vm_offset_t eva = va + sdcache_size; - - while (va < eva) { - cache_r4k_op_32lines_128(va, - CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV); - va += (32 * 128); - } -} - -void -mipsNN_sdcache_wbinv_range_128(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva = round_line128(va + size); - - va = trunc_line128(va); - - while ((eva - va) >= (32 * 128)) { - cache_r4k_op_32lines_128(va, - CACHE_R4K_SD|CACHEOP_R4K_HIT_WB_INV); - va += (32 * 128); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB_INV); - va += 128; - } -} - -void -mipsNN_sdcache_wbinv_range_index_128(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva; - - /* - * Since we're doing Index ops, we expect to not be able - * to access the address we've been given. So, get the - * bits that determine the cache index, and make a KSEG0 - * address out of them. - */ - va = MIPS_PHYS_TO_KSEG0(va & (sdcache_size - 1)); - - eva = round_line128(va + size); - va = trunc_line128(va); - - while ((eva - va) >= (32 * 128)) { - cache_r4k_op_32lines_128(va, - CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV); - va += (32 * 128); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_INDEX_WB_INV); - va += 128; - } -} - -void -mipsNN_sdcache_inv_range_128(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva = round_line128(va + size); - - va = trunc_line128(va); - - while ((eva - va) >= (32 * 128)) { - cache_r4k_op_32lines_128(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_INV); - va += (32 * 128); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_INV); - va += 128; - } -} - -void -mipsNN_sdcache_wb_range_128(vm_offset_t va, vm_size_t size) -{ - vm_offset_t eva = round_line128(va + size); - - va = trunc_line128(va); - - while ((eva - va) >= (32 * 128)) { - cache_r4k_op_32lines_128(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB); - va += (32 * 128); - } - - while (va < eva) { - cache_op_r4k_line(va, CACHE_R4K_SD|CACHEOP_R4K_HIT_WB); - va += 128; - } -} diff --git a/sys/mips/mips/cpu.c b/sys/mips/mips/cpu.c deleted file mode 100644 index d504d6c34d1..00000000000 --- a/sys/mips/mips/cpu.c +++ /dev/null @@ -1,585 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 Juli Mallett. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#if defined(CPU_CNMIPS) -#include -#include -#endif - -struct mips_cpuinfo cpuinfo; - -#define _ENCODE_INSN(a,b,c,d,e) \ - ((uint32_t)(((a) << 26)|((b) << 21)|((c) << 16)|((d) << 11)|(e))) - -#define _JR_RA _ENCODE_INSN(OP_SPECIAL, RA, 0, 0, OP_JR) -#define _NOP 0 - -/* - * Patch cpu_switch() by removing the UserLocal register code at the end. - * For MIPS hardware that don't support UserLocal Register Implementation - * we remove the instructions that update this register which may cause a - * reserved instruction exception in the kernel. - */ -static void -remove_userlocal_code(uint32_t *cpu_switch_code) -{ - uint32_t *instructp; - - instructp = cpu_switch_code; - instructp[0] = _JR_RA; - instructp[1] = _NOP; -} - -/* - * Attempt to identify the MIPS CPU as much as possible. - * - * XXX: Assumes the CPU is MIPS{32,64}{,r2} compliant. - * XXX: For now, skip config register selections 2 and 3 - * as we don't currently use L2/L3 cache or additional - * MIPS32 processor features. - */ -static void -mips_get_identity(struct mips_cpuinfo *cpuinfo) -{ - u_int32_t prid; - u_int32_t cfg0; - u_int32_t cfg1; - u_int32_t cfg2; - u_int32_t cfg3; -#if defined(CPU_CNMIPS) - u_int32_t cfg4; -#endif - u_int32_t tmp; - - memset(cpuinfo, 0, sizeof(struct mips_cpuinfo)); - - /* Read and store the PrID ID for CPU identification. */ - prid = mips_rd_prid(); - cpuinfo->cpu_vendor = MIPS_PRID_CID(prid); - cpuinfo->cpu_rev = MIPS_PRID_REV(prid); - cpuinfo->cpu_impl = MIPS_PRID_IMPL(prid); - - /* Read config register selection 0 to learn TLB type. */ - cfg0 = mips_rd_config(); - - cpuinfo->tlb_type = - ((cfg0 & MIPS_CONFIG0_MT_MASK) >> MIPS_CONFIG0_MT_SHIFT); - cpuinfo->icache_virtual = cfg0 & MIPS_CONFIG0_VI; - - /* If config register selection 1 does not exist, return. */ - if (!(cfg0 & MIPS_CONFIG0_M)) - return; - - /* Learn TLB size and L1 cache geometry. */ - cfg1 = mips_rd_config1(); - - /* Get the Config2 and Config3 registers as well. */ - cfg2 = 0; - cfg3 = 0; - if (cfg1 & MIPS_CONFIG1_M) { - cfg2 = mips_rd_config2(); - if (cfg2 & MIPS_CONFIG2_M) - cfg3 = mips_rd_config3(); - } - - /* Save FP implementation revision if FP is present. */ - if (cfg1 & MIPS_CONFIG1_FP) - cpuinfo->fpu_id = MipsFPID(); - - /* Check to see if UserLocal register is implemented. */ - if (cfg3 & MIPS_CONFIG3_ULR) { - /* UserLocal register is implemented, enable it. */ - cpuinfo->userlocal_reg = true; - tmp = mips_rd_hwrena(); - mips_wr_hwrena(tmp | MIPS_HWRENA_UL); - } else { - /* - * UserLocal register is not implemented. Patch - * cpu_switch() and remove unsupported code. - */ - cpuinfo->userlocal_reg = false; - remove_userlocal_code((uint32_t *)cpu_switch_set_userlocal); - } - -#if defined(CPU_NLM) - /* Account for Extended TLB entries in XLP */ - tmp = mips_rd_config6(); - cpuinfo->tlb_nentries = ((tmp >> 16) & 0xffff) + 1; -#elif defined(BERI_LARGE_TLB) - /* Check if we support extended TLB entries and if so activate. */ - tmp = mips_rd_config5(); -#define BERI_CP5_LTLB_SUPPORTED 0x1 - if (tmp & BERI_CP5_LTLB_SUPPORTED) { - /* See how many extra TLB entries we have. */ - tmp = mips_rd_config6(); - cpuinfo->tlb_nentries = (tmp >> 16) + 1; - /* Activate the extended entries. */ - mips_wr_config6(tmp|0x4); - } else -#endif -#if !defined(CPU_NLM) - cpuinfo->tlb_nentries = - ((cfg1 & MIPS_CONFIG1_TLBSZ_MASK) >> MIPS_CONFIG1_TLBSZ_SHIFT) + 1; -#endif -#if defined(CPU_CNMIPS) - /* Add extended TLB size information from config4. */ - cfg4 = mips_rd_config4(); - if ((cfg4 & MIPS_CONFIG4_MMUEXTDEF) == MIPS_CONFIG4_MMUEXTDEF_MMUSIZEEXT) - cpuinfo->tlb_nentries += (cfg4 & MIPS_CONFIG4_MMUSIZEEXT) * 0x40; -#endif - - /* L1 instruction cache. */ -#ifdef MIPS_DISABLE_L1_CACHE - cpuinfo->l1.ic_linesize = 0; -#else - tmp = (cfg1 & MIPS_CONFIG1_IL_MASK) >> MIPS_CONFIG1_IL_SHIFT; - if (tmp != 0) { - cpuinfo->l1.ic_linesize = 1 << (tmp + 1); - cpuinfo->l1.ic_nways = (((cfg1 & MIPS_CONFIG1_IA_MASK) >> MIPS_CONFIG1_IA_SHIFT)) + 1; - cpuinfo->l1.ic_nsets = - 1 << (((cfg1 & MIPS_CONFIG1_IS_MASK) >> MIPS_CONFIG1_IS_SHIFT) + 6); - } -#endif - - /* L1 data cache. */ -#ifdef MIPS_DISABLE_L1_CACHE - cpuinfo->l1.dc_linesize = 0; -#else -#ifndef CPU_CNMIPS - tmp = (cfg1 & MIPS_CONFIG1_DL_MASK) >> MIPS_CONFIG1_DL_SHIFT; - if (tmp != 0) { - cpuinfo->l1.dc_linesize = 1 << (tmp + 1); - cpuinfo->l1.dc_nways = - (((cfg1 & MIPS_CONFIG1_DA_MASK) >> MIPS_CONFIG1_DA_SHIFT)) + 1; - cpuinfo->l1.dc_nsets = - 1 << (((cfg1 & MIPS_CONFIG1_DS_MASK) >> MIPS_CONFIG1_DS_SHIFT) + 6); - } -#else - /* - * Some Octeon cache configuration parameters are by model family, not - * config1. - */ - if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) { - /* Octeon and Octeon XL. */ - cpuinfo->l1.dc_nsets = 1; - cpuinfo->l1.dc_nways = 64; - } else if (OCTEON_IS_MODEL(OCTEON_CN5XXX)) { - /* Octeon Plus. */ - cpuinfo->l1.dc_nsets = 2; - cpuinfo->l1.dc_nways = 64; - } else if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { - /* Octeon II. */ - cpuinfo->l1.dc_nsets = 8; - cpuinfo->l1.dc_nways = 32; - - cpuinfo->l1.ic_nsets = 8; - cpuinfo->l1.ic_nways = 37; - } else { - panic("%s: unsupported Cavium Networks CPU.", __func__); - } - - /* All Octeon models use 128 byte line size. */ - cpuinfo->l1.dc_linesize = 128; -#endif -#endif - - cpuinfo->l1.ic_size = cpuinfo->l1.ic_linesize - * cpuinfo->l1.ic_nsets * cpuinfo->l1.ic_nways; - cpuinfo->l1.dc_size = cpuinfo->l1.dc_linesize - * cpuinfo->l1.dc_nsets * cpuinfo->l1.dc_nways; - - /* - * Probe PageMask register to see what sizes of pages are supported - * by writing all one's and then reading it back. - */ - mips_wr_pagemask(~0); - cpuinfo->tlb_pgmask = mips_rd_pagemask(); - mips_wr_pagemask(MIPS3_PGMASK_4K); - -#ifndef CPU_CNMIPS - /* L2 cache */ - if (!(cfg1 & MIPS_CONFIG_CM)) { - /* We don't have valid cfg2 register */ - return; - } - - cfg2 = mips_rd_config2(); - - tmp = (cfg2 >> MIPS_CONFIG2_SL_SHIFT) & MIPS_CONFIG2_SL_MASK; - if (0 < tmp && tmp <= 7) - cpuinfo->l2.dc_linesize = 2 << tmp; - - tmp = (cfg2 >> MIPS_CONFIG2_SS_SHIFT) & MIPS_CONFIG2_SS_MASK; - if (0 <= tmp && tmp <= 7) - cpuinfo->l2.dc_nsets = 64 << tmp; - - tmp = (cfg2 >> MIPS_CONFIG2_SA_SHIFT) & MIPS_CONFIG2_SA_MASK; - if (0 <= tmp && tmp <= 7) - cpuinfo->l2.dc_nways = tmp + 1; - - cpuinfo->l2.dc_size = cpuinfo->l2.dc_linesize - * cpuinfo->l2.dc_nsets * cpuinfo->l2.dc_nways; -#endif -} - -void -mips_cpu_init(void) -{ - platform_cpu_init(); - mips_get_identity(&cpuinfo); - num_tlbentries = cpuinfo.tlb_nentries; - mips_wr_wired(0); - tlb_invalidate_all(); - mips_wr_wired(VMWIRED_ENTRIES); - mips_config_cache(&cpuinfo); - mips_vector_init(); - - mips_icache_sync_all(); - mips_dcache_wbinv_all(); -} - -void -cpu_identify(void) -{ - uint32_t cfg0, cfg1, cfg2, cfg3; -#if defined(CPU_MIPS1004K) || defined (CPU_MIPS74K) || defined (CPU_MIPS24K) - uint32_t cfg7; -#endif - printf("CPU: "); - switch (cpuinfo.cpu_vendor) { - case MIPS_PRID_CID_MTI: - printf("MIPS Technologies"); - break; - case MIPS_PRID_CID_BROADCOM: - case MIPS_PRID_CID_SIBYTE: - printf("Broadcom"); - break; - case MIPS_PRID_CID_ALCHEMY: - printf("AMD"); - break; - case MIPS_PRID_CID_SANDCRAFT: - printf("Sandcraft"); - break; - case MIPS_PRID_CID_PHILIPS: - printf("Philips"); - break; - case MIPS_PRID_CID_TOSHIBA: - printf("Toshiba"); - break; - case MIPS_PRID_CID_LSI: - printf("LSI"); - break; - case MIPS_PRID_CID_LEXRA: - printf("Lexra"); - break; - case MIPS_PRID_CID_RMI: - printf("RMI"); - break; - case MIPS_PRID_CID_CAVIUM: - printf("Cavium"); - break; - case MIPS_PRID_CID_INGENIC: - case MIPS_PRID_CID_INGENIC2: - printf("Ingenic XBurst"); - break; - case MIPS_PRID_CID_PREHISTORIC: - default: - printf("Unknown cid %#x", cpuinfo.cpu_vendor); - break; - } - if (cpu_model[0] != '\0') - printf(" (%s)", cpu_model); - printf(" processor v%d.%d\n", cpuinfo.cpu_rev, cpuinfo.cpu_impl); - - printf(" MMU: "); - if (cpuinfo.tlb_type == MIPS_MMU_NONE) { - printf("none present\n"); - } else { - if (cpuinfo.tlb_type == MIPS_MMU_TLB) { - printf("Standard TLB"); - } else if (cpuinfo.tlb_type == MIPS_MMU_BAT) { - printf("Standard BAT"); - } else if (cpuinfo.tlb_type == MIPS_MMU_FIXED) { - printf("Fixed mapping"); - } - printf(", %d entries ", cpuinfo.tlb_nentries); - } - - if (cpuinfo.tlb_pgmask) { - printf("("); - if (cpuinfo.tlb_pgmask & MIPS3_PGMASK_MASKX) - printf("1K "); - printf("4K "); - if (cpuinfo.tlb_pgmask & MIPS3_PGMASK_16K) - printf("16K "); - if (cpuinfo.tlb_pgmask & MIPS3_PGMASK_64K) - printf("64K "); - if (cpuinfo.tlb_pgmask & MIPS3_PGMASK_256K) - printf("256K "); - if (cpuinfo.tlb_pgmask & MIPS3_PGMASK_1M) - printf("1M "); - if (cpuinfo.tlb_pgmask & MIPS3_PGMASK_16M) - printf("16M "); - if (cpuinfo.tlb_pgmask & MIPS3_PGMASK_64M) - printf("64M "); - if (cpuinfo.tlb_pgmask & MIPS3_PGMASK_256M) - printf("256M "); - printf("pg sizes)"); - } - printf("\n"); - - printf(" L1 i-cache: "); - if (cpuinfo.l1.ic_linesize == 0) { - printf("disabled"); - } else { - if (cpuinfo.l1.ic_nways == 1) { - printf("direct-mapped with"); - } else { - printf ("%d ways of", cpuinfo.l1.ic_nways); - } - printf(" %d sets, %d bytes per line\n", - cpuinfo.l1.ic_nsets, cpuinfo.l1.ic_linesize); - } - - printf(" L1 d-cache: "); - if (cpuinfo.l1.dc_linesize == 0) { - printf("disabled"); - } else { - if (cpuinfo.l1.dc_nways == 1) { - printf("direct-mapped with"); - } else { - printf ("%d ways of", cpuinfo.l1.dc_nways); - } - printf(" %d sets, %d bytes per line\n", - cpuinfo.l1.dc_nsets, cpuinfo.l1.dc_linesize); - } - - printf(" L2 cache: "); - if (cpuinfo.l2.dc_linesize == 0) { - printf("disabled\n"); - } else { - printf("%d ways of %d sets, %d bytes per line, " - "%d KiB total size\n", - cpuinfo.l2.dc_nways, - cpuinfo.l2.dc_nsets, - cpuinfo.l2.dc_linesize, - cpuinfo.l2.dc_size / 1024); - } - - cfg0 = mips_rd_config(); - /* If config register selection 1 does not exist, exit. */ - if (!(cfg0 & MIPS_CONFIG_CM)) - return; - - cfg1 = mips_rd_config1(); - printf(" Config1=0x%b\n", cfg1, - "\20\7COP2\6MDMX\5PerfCount\4WatchRegs\3MIPS16\2EJTAG\1FPU"); - - if (cpuinfo.fpu_id != 0) - printf(" FPU ID=0x%b\n", cpuinfo.fpu_id, - "\020" - "\020S" - "\021D" - "\022PS" - "\0233D" - "\024W" - "\025L" - "\026F64" - "\0272008" - "\034UFRP"); - - /* If config register selection 2 does not exist, exit. */ - if (!(cfg1 & MIPS_CONFIG_CM)) - return; - cfg2 = mips_rd_config2(); - /* - * Config2 contains no useful information other then Config3 - * existence flag - */ - printf(" Config2=0x%08x\n", cfg2); - - /* If config register selection 3 does not exist, exit. */ - if (!(cfg2 & MIPS_CONFIG_CM)) - return; - cfg3 = mips_rd_config3(); - - /* Print Config3 if it contains any useful info */ - if (cfg3 & ~(0x80000000)) - printf(" Config3=0x%b\n", cfg3, "\20\16ULRI\2SmartMIPS\1TraceLogic"); - -#if defined(CPU_MIPS1004K) || defined (CPU_MIPS74K) || defined (CPU_MIPS24K) - cfg7 = mips_rd_config7(); - printf(" Config7=0x%b\n", cfg7, "\20\40WII\21AR"); -#endif -} - -static struct rman cpu_hardirq_rman; - -static devclass_t cpu_devclass; - -/* - * Device methods - */ -static int cpu_probe(device_t); -static int cpu_attach(device_t); -static struct resource *cpu_alloc_resource(device_t, device_t, int, int *, - rman_res_t, rman_res_t, rman_res_t, - u_int); -static int cpu_setup_intr(device_t, device_t, struct resource *, int, - driver_filter_t *f, driver_intr_t *, void *, - void **); - -static device_method_t cpu_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, cpu_probe), - DEVMETHOD(device_attach, cpu_attach), - DEVMETHOD(device_detach, bus_generic_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - - /* Bus interface */ - DEVMETHOD(bus_alloc_resource, cpu_alloc_resource), - DEVMETHOD(bus_setup_intr, cpu_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - { 0, 0 } -}; - -static driver_t cpu_driver = { - "cpu", cpu_methods, 1 -}; - -static int -cpu_probe(device_t dev) -{ - - return (0); -} - -static int -cpu_attach(device_t dev) -{ - int error; -#ifdef notyet - device_t clock; -#endif - - cpu_hardirq_rman.rm_start = 0; - cpu_hardirq_rman.rm_end = 5; - cpu_hardirq_rman.rm_type = RMAN_ARRAY; - cpu_hardirq_rman.rm_descr = "CPU Hard Interrupts"; - - error = rman_init(&cpu_hardirq_rman); - if (error != 0) { - device_printf(dev, "failed to initialize irq resources\n"); - return (error); - } - /* XXX rman_manage_all. */ - error = rman_manage_region(&cpu_hardirq_rman, - cpu_hardirq_rman.rm_start, - cpu_hardirq_rman.rm_end); - if (error != 0) { - device_printf(dev, "failed to manage irq resources\n"); - return (error); - } - - if (device_get_unit(dev) != 0) - panic("can't attach more cpus"); - device_set_desc(dev, "MIPS32 processor"); - -#ifdef notyet - clock = device_add_child(dev, "clock", device_get_unit(dev)); - if (clock == NULL) - device_printf(dev, "clock failed to attach"); -#endif - - return (bus_generic_attach(dev)); -} - -static struct resource * -cpu_alloc_resource(device_t dev, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct resource *res; - - if (type != SYS_RES_IRQ) - return (NULL); - res = rman_reserve_resource(&cpu_hardirq_rman, start, end, count, 0, - child); - return (res); -} - -static int -cpu_setup_intr(device_t dev, device_t child, struct resource *res, int flags, - driver_filter_t *filt, driver_intr_t *handler, void *arg, - void **cookiep) -{ - int error; - int intr; - - error = rman_activate_resource(res); - if (error != 0) { - device_printf(child, "could not activate irq\n"); - return (error); - } - - intr = rman_get_start(res); - - cpu_establish_hardintr(device_get_nameunit(child), filt, handler, arg, - intr, flags, cookiep); - device_printf(child, "established CPU interrupt %d\n", intr); - return (0); -} - -DRIVER_MODULE(cpu, root, cpu_driver, cpu_devclass, 0, 0); diff --git a/sys/mips/mips/db_disasm.c b/sys/mips/mips/db_disasm.c deleted file mode 100644 index a4a713302cc..00000000000 --- a/sys/mips/mips/db_disasm.c +++ /dev/null @@ -1,397 +0,0 @@ -/* $OpenBSD: db_disasm.c,v 1.1 1998/03/16 09:03:24 pefo Exp $ */ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)kadb.c 8.1 (Berkeley) 6/10/93 - * Id: db_disasm.c,v 1.1 1998/03/16 09:03:24 pefo Exp - * JNPR: db_disasm.c,v 1.1 2006/08/07 05:38:57 katta - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -static char *op_name[64] = { -/* 0 */ "spec", "bcond","j", "jal", "beq", "bne", "blez", "bgtz", -/* 8 */ "addi", "addiu","slti", "sltiu","andi", "ori", "xori", "lui", -/*16 */ "cop0", "cop1", "cop2", "cop3", "beql", "bnel", "blezl","bgtzl", -/*24 */ "daddi","daddiu","ldl", "ldr", "op34", "op35", "op36", "op37", -/*32 */ "lb", "lh", "lwl", "lw", "lbu", "lhu", "lwr", "lwu", -/*40 */ "sb", "sh", "swl", "sw", "sdl", "sdr", "swr", "cache", -/*48 */ "ll", "lwc1", "lwc2", "lwc3", "lld", "ldc1", "ldc2", "ld", -/*56 */ "sc", "swc1", "swc2", "swc3", "scd", "sdc1", "sdc2", "sd" -}; - -static char *spec_name[64] = { -/* 0 */ "sll", "spec01","srl", "sra", "sllv", "spec05","srlv","srav", -/* 8 */ "jr", "jalr", "spec12","spec13","syscall","break","spec16","sync", -/*16 */ "mfhi", "mthi", "mflo", "mtlo", "dsllv","spec25","dsrlv","dsrav", -/*24 */ "mult", "multu","div", "divu", "dmult","dmultu","ddiv","ddivu", -/*32 */ "add", "addu", "sub", "subu", "and", "or", "xor", "nor", -/*40 */ "spec50","spec51","slt","sltu", "dadd","daddu","dsub","dsubu", -/*48 */ "tge","tgeu","tlt","tltu","teq","spec65","tne","spec67", -/*56 */ "dsll","spec71","dsrl","dsra","dsll32","spec75","dsrl32","dsra32" -}; - -static char *bcond_name[32] = { -/* 0 */ "bltz", "bgez", "bltzl", "bgezl", "?", "?", "?", "?", -/* 8 */ "tgei", "tgeiu", "tlti", "tltiu", "teqi", "?", "tnei", "?", -/*16 */ "bltzal", "bgezal", "bltzall", "bgezall", "?", "?", "?", "?", -/*24 */ "?", "?", "?", "?", "?", "?", "?", "?", -}; - -static char *cop1_name[64] = { -/* 0 */ "fadd", "fsub", "fmpy", "fdiv", "fsqrt","fabs", "fmov", "fneg", -/* 8 */ "fop08","fop09","fop0a","fop0b","fop0c","fop0d","fop0e","fop0f", -/*16 */ "fop10","fop11","fop12","fop13","fop14","fop15","fop16","fop17", -/*24 */ "fop18","fop19","fop1a","fop1b","fop1c","fop1d","fop1e","fop1f", -/*32 */ "fcvts","fcvtd","fcvte","fop23","fcvtw","fop25","fop26","fop27", -/*40 */ "fop28","fop29","fop2a","fop2b","fop2c","fop2d","fop2e","fop2f", -/*48 */ "fcmp.f","fcmp.un","fcmp.eq","fcmp.ueq","fcmp.olt","fcmp.ult", - "fcmp.ole","fcmp.ule", -/*56 */ "fcmp.sf","fcmp.ngle","fcmp.seq","fcmp.ngl","fcmp.lt","fcmp.nge", - "fcmp.le","fcmp.ngt" -}; - -static char *fmt_name[16] = { - "s", "d", "e", "fmt3", - "w", "fmt5", "fmt6", "fmt7", - "fmt8", "fmt9", "fmta", "fmtb", - "fmtc", "fmtd", "fmte", "fmtf" -}; - -static char *reg_name[32] = { - "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", -#if defined(__mips_n32) || defined(__mips_n64) - "a4", "a5", "a6", "a7", "t0", "t1", "t2", "t3", -#else - "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", -#endif - "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", - "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra" -}; - -static char *c0_opname[64] = { - "c0op00","tlbr", "tlbwi", "c0op03","c0op04","c0op05","tlbwr", "c0op07", - "tlbp", "c0op11","c0op12","c0op13","c0op14","c0op15","c0op16","c0op17", - "rfe", "c0op21","c0op22","c0op23","c0op24","c0op25","c0op26","c0op27", - "eret","c0op31","c0op32","c0op33","c0op34","c0op35","c0op36","c0op37", - "c0op40","c0op41","c0op42","c0op43","c0op44","c0op45","c0op46","c0op47", - "c0op50","c0op51","c0op52","c0op53","c0op54","c0op55","c0op56","c0op57", - "c0op60","c0op61","c0op62","c0op63","c0op64","c0op65","c0op66","c0op67", - "c0op70","c0op71","c0op72","c0op73","c0op74","c0op75","c0op77","c0op77", -}; - -static char *c0_reg[32] = { - "index","random","tlblo0","tlblo1","context","tlbmask","wired","c0r7", - "badvaddr","count","tlbhi","c0r11","sr","cause","epc", "prid", - "config","lladr","watchlo","watchhi","xcontext","c0r21","c0r22","c0r23", - "c0r24","c0r25","ecc","cacheerr","taglo","taghi","errepc","c0r31" -}; - -static int md_printins(int ins, int mdbdot); - -db_addr_t -db_disasm(db_addr_t loc, bool altfmt) - -{ - int ins; - - if (vtophys((vm_offset_t)loc)) { - db_read_bytes((vm_offset_t)loc, (size_t)sizeof(int), - (char *)&ins); - md_printins(ins, loc); - } - - return (loc + sizeof(int)); -} - -/* ARGSUSED */ -static int -md_printins(int ins, int mdbdot) -{ - InstFmt i; - int delay = 0; - - i.word = ins; - - switch (i.JType.op) { - case OP_SPECIAL: - if (i.word == 0) { - db_printf("nop"); - break; - } - if (i.RType.func == OP_ADDU && i.RType.rt == 0) { - db_printf("move\t%s,%s", - reg_name[i.RType.rd], reg_name[i.RType.rs]); - break; - } - db_printf("%s", spec_name[i.RType.func]); - switch (i.RType.func) { - case OP_SLL: - case OP_SRL: - case OP_SRA: - case OP_DSLL: - case OP_DSRL: - case OP_DSRA: - case OP_DSLL32: - case OP_DSRL32: - case OP_DSRA32: - db_printf("\t%s,%s,%d", reg_name[i.RType.rd], - reg_name[i.RType.rt], i.RType.shamt); - break; - - case OP_SLLV: - case OP_SRLV: - case OP_SRAV: - case OP_DSLLV: - case OP_DSRLV: - case OP_DSRAV: - db_printf("\t%s,%s,%s", reg_name[i.RType.rd], - reg_name[i.RType.rt], reg_name[i.RType.rs]); - break; - - case OP_MFHI: - case OP_MFLO: - db_printf("\t%s", reg_name[i.RType.rd]); - break; - - case OP_JR: - case OP_JALR: - delay = 1; - /* FALLTHROUGH */ - case OP_MTLO: - case OP_MTHI: - db_printf("\t%s", reg_name[i.RType.rs]); - break; - - case OP_MULT: - case OP_MULTU: - case OP_DMULT: - case OP_DMULTU: - case OP_DIV: - case OP_DIVU: - case OP_DDIV: - case OP_DDIVU: - db_printf("\t%s,%s", - reg_name[i.RType.rs], reg_name[i.RType.rt]); - break; - - case OP_SYSCALL: - case OP_SYNC: - break; - - case OP_BREAK: - db_printf("\t%d", (i.RType.rs << 5) | i.RType.rt); - break; - - default: - db_printf("\t%s,%s,%s", reg_name[i.RType.rd], - reg_name[i.RType.rs], reg_name[i.RType.rt]); - } - break; - - case OP_BCOND: - db_printf("%s\t%s,", bcond_name[i.IType.rt], - reg_name[i.IType.rs]); - goto pr_displ; - - case OP_BLEZ: - case OP_BLEZL: - case OP_BGTZ: - case OP_BGTZL: - db_printf("%s\t%s,", op_name[i.IType.op], - reg_name[i.IType.rs]); - goto pr_displ; - - case OP_BEQ: - case OP_BEQL: - if (i.IType.rs == 0 && i.IType.rt == 0) { - db_printf("b\t"); - goto pr_displ; - } - /* FALLTHROUGH */ - case OP_BNE: - case OP_BNEL: - db_printf("%s\t%s,%s,", op_name[i.IType.op], - reg_name[i.IType.rs], reg_name[i.IType.rt]); - pr_displ: - delay = 1; - db_printf("0x%08x", mdbdot + 4 + ((short)i.IType.imm << 2)); - break; - - case OP_COP0: - switch (i.RType.rs) { - case OP_BCx: - case OP_BCy: - db_printf("bc0%c\t", - "ft"[i.RType.rt & COPz_BC_TF_MASK]); - goto pr_displ; - - case OP_MT: - db_printf("mtc0\t%s,%s", - reg_name[i.RType.rt], c0_reg[i.RType.rd]); - break; - - case OP_DMT: - db_printf("dmtc0\t%s,%s", - reg_name[i.RType.rt], c0_reg[i.RType.rd]); - break; - - case OP_MF: - db_printf("mfc0\t%s,%s", - reg_name[i.RType.rt], c0_reg[i.RType.rd]); - break; - - case OP_DMF: - db_printf("dmfc0\t%s,%s", - reg_name[i.RType.rt], c0_reg[i.RType.rd]); - break; - - default: - db_printf("%s", c0_opname[i.FRType.func]); - } - break; - - case OP_COP1: - switch (i.RType.rs) { - case OP_BCx: - case OP_BCy: - db_printf("bc1%c\t", - "ft"[i.RType.rt & COPz_BC_TF_MASK]); - goto pr_displ; - - case OP_MT: - db_printf("mtc1\t%s,f%d", - reg_name[i.RType.rt], i.RType.rd); - break; - - case OP_MF: - db_printf("mfc1\t%s,f%d", - reg_name[i.RType.rt], i.RType.rd); - break; - - case OP_CT: - db_printf("ctc1\t%s,f%d", - reg_name[i.RType.rt], i.RType.rd); - break; - - case OP_CF: - db_printf("cfc1\t%s,f%d", - reg_name[i.RType.rt], i.RType.rd); - break; - - default: - db_printf("%s.%s\tf%d,f%d,f%d", - cop1_name[i.FRType.func], fmt_name[i.FRType.fmt], - i.FRType.fd, i.FRType.fs, i.FRType.ft); - } - break; - - case OP_J: - case OP_JAL: - db_printf("%s\t", op_name[i.JType.op]); - db_printf("0x%8x",(mdbdot & 0xF0000000) | (i.JType.target << 2)); - delay = 1; - break; - - case OP_LWC1: - case OP_SWC1: - db_printf("%s\tf%d,", op_name[i.IType.op], i.IType.rt); - goto loadstore; - - case OP_LB: - case OP_LH: - case OP_LW: - case OP_LD: - case OP_LBU: - case OP_LHU: - case OP_LWU: - case OP_SB: - case OP_SH: - case OP_SW: - case OP_SD: - db_printf("%s\t%s,", op_name[i.IType.op], - reg_name[i.IType.rt]); - loadstore: - db_printf("%d(%s)", (short)i.IType.imm, reg_name[i.IType.rs]); - break; - - case OP_ORI: - case OP_XORI: - if (i.IType.rs == 0) { - db_printf("li\t%s,0x%x", - reg_name[i.IType.rt], i.IType.imm); - break; - } - /* FALLTHROUGH */ - case OP_ANDI: - db_printf("%s\t%s,%s,0x%x", op_name[i.IType.op], - reg_name[i.IType.rt], reg_name[i.IType.rs], i.IType.imm); - break; - - case OP_LUI: - db_printf("%s\t%s,0x%x", op_name[i.IType.op], - reg_name[i.IType.rt], i.IType.imm); - break; - - case OP_ADDI: - case OP_DADDI: - case OP_ADDIU: - case OP_DADDIU: - if (i.IType.rs == 0) { - db_printf("li\t%s,%d", reg_name[i.IType.rt], - (short)i.IType.imm); - break; - } - /* FALLTHROUGH */ - default: - db_printf("%s\t%s,%s,%d", op_name[i.IType.op], - reg_name[i.IType.rt], reg_name[i.IType.rs], - (short)i.IType.imm); - } - db_printf("\n"); - return (delay); -} diff --git a/sys/mips/mips/db_interface.c b/sys/mips/mips/db_interface.c deleted file mode 100644 index 5b8b1f2e17a..00000000000 --- a/sys/mips/mips/db_interface.c +++ /dev/null @@ -1,347 +0,0 @@ -/* $OpenBSD: db_machdep.c,v 1.2 1998/09/15 10:50:13 pefo Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 1998 Per Fogelstrom, Opsycon AB - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed under OpenBSD by - * Per Fogelstrom, Opsycon AB, Sweden. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * JNPR: db_interface.c,v 1.6.2.1 2007/08/29 12:24:49 girish - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -static db_varfcn_t db_frame; - -#define DB_OFFSET(x) (db_expr_t *)offsetof(struct trapframe, x) -struct db_variable db_regs[] = { - { "at", DB_OFFSET(ast), db_frame }, - { "v0", DB_OFFSET(v0), db_frame }, - { "v1", DB_OFFSET(v1), db_frame }, - { "a0", DB_OFFSET(a0), db_frame }, - { "a1", DB_OFFSET(a1), db_frame }, - { "a2", DB_OFFSET(a2), db_frame }, - { "a3", DB_OFFSET(a3), db_frame }, -#if defined(__mips_n32) || defined(__mips_n64) - { "a4", DB_OFFSET(a4), db_frame }, - { "a5", DB_OFFSET(a5), db_frame }, - { "a6", DB_OFFSET(a6), db_frame }, - { "a7", DB_OFFSET(a7), db_frame }, - { "t0", DB_OFFSET(t0), db_frame }, - { "t1", DB_OFFSET(t1), db_frame }, - { "t2", DB_OFFSET(t2), db_frame }, - { "t3", DB_OFFSET(t3), db_frame }, -#else - { "t0", DB_OFFSET(t0), db_frame }, - { "t1", DB_OFFSET(t1), db_frame }, - { "t2", DB_OFFSET(t2), db_frame }, - { "t3", DB_OFFSET(t3), db_frame }, - { "t4", DB_OFFSET(t4), db_frame }, - { "t5", DB_OFFSET(t5), db_frame }, - { "t6", DB_OFFSET(t6), db_frame }, - { "t7", DB_OFFSET(t7), db_frame }, -#endif - { "s0", DB_OFFSET(s0), db_frame }, - { "s1", DB_OFFSET(s1), db_frame }, - { "s2", DB_OFFSET(s2), db_frame }, - { "s3", DB_OFFSET(s3), db_frame }, - { "s4", DB_OFFSET(s4), db_frame }, - { "s5", DB_OFFSET(s5), db_frame }, - { "s6", DB_OFFSET(s6), db_frame }, - { "s7", DB_OFFSET(s7), db_frame }, - { "t8", DB_OFFSET(t8), db_frame }, - { "t9", DB_OFFSET(t9), db_frame }, - { "k0", DB_OFFSET(k0), db_frame }, - { "k1", DB_OFFSET(k1), db_frame }, - { "gp", DB_OFFSET(gp), db_frame }, - { "sp", DB_OFFSET(sp), db_frame }, - { "s8", DB_OFFSET(s8), db_frame }, - { "ra", DB_OFFSET(ra), db_frame }, - { "sr", DB_OFFSET(sr), db_frame }, - { "lo", DB_OFFSET(mullo), db_frame }, - { "hi", DB_OFFSET(mulhi), db_frame }, - { "bad", DB_OFFSET(badvaddr), db_frame }, - { "cs", DB_OFFSET(cause), db_frame }, - { "pc", DB_OFFSET(pc), db_frame }, -}; -struct db_variable *db_eregs = db_regs + nitems(db_regs); - -int (*do_db_log_stack_trace_cmd)(char *); - -static int -db_frame(struct db_variable *vp, db_expr_t *valuep, int op) -{ - register_t *reg; - - if (kdb_frame == NULL) - return (0); - - reg = (register_t *)((uintptr_t)kdb_frame + (size_t)(intptr_t)vp->valuep); - if (op == DB_VAR_GET) - *valuep = *reg; - else - *reg = *valuep; - return (1); -} - -int -db_read_bytes(vm_offset_t addr, size_t size, char *data) -{ - jmp_buf jb; - void *prev_jb; - int ret; - - prev_jb = kdb_jmpbuf(jb); - ret = setjmp(jb); - if (ret == 0) { - /* - * 'addr' could be a memory-mapped I/O address. Try to - * do atomic load/store in unit of size requested. - * size == 8 is only atomic on 64bit or n32 kernel. - */ - if ((size == 2 || size == 4 || size == 8) && - ((addr & (size -1)) == 0) && - (((vm_offset_t)data & (size -1)) == 0)) { - switch (size) { - case 2: - *(uint16_t *)data = *(uint16_t *)addr; - break; - case 4: - *(uint32_t *)data = *(uint32_t *)addr; - break; - case 8: - *(uint64_t *)data = *(uint64_t *)addr; - break; - } - } else { - char *src; - - src = (char *)addr; - while (size-- > 0) - *data++ = *src++; - } - } - - (void)kdb_jmpbuf(prev_jb); - return (ret); -} - -int -db_write_bytes(vm_offset_t addr, size_t size, char *data) -{ - int ret; - jmp_buf jb; - void *prev_jb; - - prev_jb = kdb_jmpbuf(jb); - ret = setjmp(jb); - - if (ret == 0) { - /* - * 'addr' could be a memory-mapped I/O address. Try to - * do atomic load/store in unit of size requested. - * size == 8 is only atomic on 64bit or n32 kernel. - */ - if ((size == 2 || size == 4 || size == 8) && - ((addr & (size -1)) == 0) && - (((vm_offset_t)data & (size -1)) == 0)) { - switch (size) { - case 2: - *(uint16_t *)addr = *(uint16_t *)data; - break; - case 4: - *(uint32_t *)addr = *(uint32_t *)data; - break; - case 8: - *(uint64_t *)addr = *(uint64_t *)data; - break; - } - } else { - char *dst; - size_t len = size; - - dst = (char *)addr; - while (len-- > 0) - *dst++ = *data++; - } - - mips_icache_sync_range((db_addr_t) addr, size); - mips_dcache_wbinv_range((db_addr_t) addr, size); - } - (void)kdb_jmpbuf(prev_jb); - return (ret); -} - -/* - * To do a single step ddb needs to know the next address - * that we will get to. It means that we need to find out - * both the address for a branch taken and for not taken, NOT! :-) - * MipsEmulateBranch will do the job to find out _exactly_ which - * address we will end up at so the 'dual bp' method is not - * requiered. - */ -db_addr_t -next_instr_address(db_addr_t pc, boolean_t bd) -{ - db_addr_t next; - - next = (db_addr_t)MipsEmulateBranch(kdb_frame, pc, 0, 0); - return (next); -} - -/* - * Decode instruction and figure out type. - */ -int -db_inst_type(int ins) -{ - InstFmt inst; - int ityp = 0; - - inst.word = ins; - switch ((int)inst.JType.op) { - case OP_SPECIAL: - switch ((int)inst.RType.func) { - case OP_JR: - ityp = IT_BRANCH; - break; - case OP_JALR: - case OP_SYSCALL: - ityp = IT_CALL; - break; - } - break; - - case OP_BCOND: - switch ((int)inst.IType.rt) { - case OP_BLTZ: - case OP_BLTZL: - case OP_BGEZ: - case OP_BGEZL: - ityp = IT_BRANCH; - break; - - case OP_BLTZAL: - case OP_BLTZALL: - case OP_BGEZAL: - case OP_BGEZALL: - ityp = IT_CALL; - break; - } - break; - - case OP_JAL: - ityp = IT_CALL; - break; - - case OP_J: - case OP_BEQ: - case OP_BEQL: - case OP_BNE: - case OP_BNEL: - case OP_BLEZ: - case OP_BLEZL: - case OP_BGTZ: - case OP_BGTZL: - ityp = IT_BRANCH; - break; - - case OP_COP1: - switch (inst.RType.rs) { - case OP_BCx: - case OP_BCy: - ityp = IT_BRANCH; - break; - } - break; - - case OP_LB: - case OP_LH: - case OP_LW: - case OP_LD: - case OP_LBU: - case OP_LHU: - case OP_LWU: - case OP_LWC1: - ityp = IT_LOAD; - break; - - case OP_SB: - case OP_SH: - case OP_SW: - case OP_SD: - case OP_SWC1: - ityp = IT_STORE; - break; - } - return (ityp); -} - -/* - * Return the next pc if the given branch is taken. - * MachEmulateBranch() runs analysis for branch delay slot. - */ -db_addr_t -branch_taken(int inst, db_addr_t pc) -{ - db_addr_t ra; - register_t fpucsr; - - /* TBD: when is fsr set */ - fpucsr = (curthread) ? curthread->td_pcb->pcb_regs.fsr : 0; - ra = (db_addr_t)MipsEmulateBranch(kdb_frame, pc, fpucsr, 0); - return (ra); -} diff --git a/sys/mips/mips/db_trace.c b/sys/mips/mips/db_trace.c deleted file mode 100644 index 1d104317cd0..00000000000 --- a/sys/mips/mips/db_trace.c +++ /dev/null @@ -1,444 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004-2005, Juniper Networks, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * JNPR: db_trace.c,v 1.8 2007/08/09 11:23:32 katta - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include - -extern char _locore[]; -extern char _locoreEnd[]; -extern char edata[]; - -/* - * A function using a stack frame has the following instruction as the first - * one: [d]addiu sp,sp,- - * - * We make use of this to detect starting address of a function. This works - * better than using 'j ra' instruction to signify end of the previous - * function (for e.g. functions like boot() or panic() do not actually - * emit a 'j ra' instruction). - * - * XXX the abi does not require that the addiu instruction be the first one. - */ -#define MIPS_START_OF_FUNCTION(ins) ((((ins) & 0xffff8000) == 0x27bd8000) \ - || (((ins) & 0xffff8000) == 0x67bd8000)) - -/* - * LLD will insert invalid instruction traps between functions. - * Currently this is 0xefefefef but it may change in the future. - */ -#define MIPS_LLD_PADDING_BETWEEN_FUNCTIONS(ins) ((ins) == 0xefefefef) - -#if defined(__mips_n64) -# define MIPS_IS_VALID_KERNELADDR(reg) ((((reg) & 3) == 0) && \ - ((vm_offset_t)(reg) >= MIPS_XKPHYS_START)) -#else -# define MIPS_IS_VALID_KERNELADDR(reg) ((((reg) & 3) == 0) && \ - ((vm_offset_t)(reg) >= MIPS_KSEG0_START)) -#endif - -static void -stacktrace_subr(register_t pc, register_t sp, register_t ra) -{ - InstFmt i; - /* - * Arrays for a0..a3 registers and flags if content - * of these registers is valid, e.g. obtained from the stack - */ - int valid_args[4]; - register_t args[4]; - register_t va, subr, cause, badvaddr; - unsigned instr, mask; - unsigned int frames = 0; - int more, stksize, j; - register_t next_ra; - bool trapframe; - -/* Jump here when done with a frame, to start a new one */ -loop: - - /* - * Invalidate arguments values - */ - valid_args[0] = 0; - valid_args[1] = 0; - valid_args[2] = 0; - valid_args[3] = 0; - next_ra = 0; - stksize = 0; - subr = 0; - trapframe = false; - if (frames++ > 100) { - db_printf("\nstackframe count exceeded\n"); - return; - } - - /* Check for bad SP: could foul up next frame. */ - if (!MIPS_IS_VALID_KERNELADDR(sp)) { - db_printf("SP 0x%jx: not in kernel\n", (uintmax_t)sp); - ra = 0; - subr = 0; - goto done; - } -#define Between(x, y, z) \ - ( ((x) <= (y)) && ((y) < (z)) ) -#define pcBetween(a,b) \ - Between((uintptr_t)a, pc, (uintptr_t)b) - - /* - * Check for current PC in exception handler code that don't have a - * preceding "j ra" at the tail of the preceding function. Depends - * on relative ordering of functions in exception.S, swtch.S. - */ - if (pcBetween(MipsKernGenException, MipsUserGenException)) { - subr = (uintptr_t)MipsKernGenException; - trapframe = true; - } else if (pcBetween(MipsUserGenException, MipsKernIntr)) - subr = (uintptr_t)MipsUserGenException; - else if (pcBetween(MipsKernIntr, MipsUserIntr)) { - subr = (uintptr_t)MipsKernIntr; - trapframe = true; - } else if (pcBetween(MipsUserIntr, MipsTLBInvalidException)) - subr = (uintptr_t)MipsUserIntr; - else if (pcBetween(MipsTLBInvalidException, MipsTLBMissException)) { - subr = (uintptr_t)MipsTLBInvalidException; - if (pc == (uintptr_t)MipsKStackOverflow) - trapframe = true; - } else if (pcBetween(fork_trampoline, savectx)) - subr = (uintptr_t)fork_trampoline; - else if (pcBetween(savectx, cpu_throw)) - subr = (uintptr_t)savectx; - else if (pcBetween(cpu_throw, cpu_switch)) - subr = (uintptr_t)cpu_throw; - else if (pcBetween(cpu_switch, MipsSwitchFPState)) - subr = (uintptr_t)cpu_switch; - else if (pcBetween(_locore, _locoreEnd)) { - subr = (uintptr_t)_locore; - ra = 0; - goto done; - } - - /* Check for bad PC. */ - if (!MIPS_IS_VALID_KERNELADDR(pc)) { - db_printf("PC 0x%jx: not in kernel\n", (uintmax_t)pc); - ra = 0; - goto done; - } - - /* - * For a trapframe, skip to the output and afterwards pull the - * previous registers out of the trapframe instead of decoding - * the function prologue. - */ - if (trapframe) - goto done; - - /* - * Find the beginning of the current subroutine by scanning - * backwards from the current PC for the end of the previous - * subroutine. - */ - if (!subr) { - va = pc; - while (1) { - instr = kdbpeek((int *)va); - - /* LLD fills padding between functions with 0xefefefef */ - if (MIPS_LLD_PADDING_BETWEEN_FUNCTIONS(instr)) - break; - - if (MIPS_START_OF_FUNCTION(instr)) - break; - - va -= sizeof(int); - } - - /* - * Skip over nulls/trap padding which might separate - * object files or functions. - */ - instr = kdbpeek((int *)va); - while (instr == 0 || MIPS_LLD_PADDING_BETWEEN_FUNCTIONS(instr)) { - va += sizeof(int); - instr = kdbpeek((int *)va); - } - subr = va; - } - - /* scan forwards to find stack size and any saved registers */ - stksize = 0; - more = 3; - mask = 0; - for (va = subr; more; va += sizeof(int), - more = (more == 3) ? 3 : more - 1) { - /* stop if hit our current position */ - if (va >= pc) - break; - instr = kdbpeek((int *)va); - i.word = instr; - switch (i.JType.op) { - case OP_SPECIAL: - switch (i.RType.func) { - case OP_JR: - case OP_JALR: - more = 2; /* stop after next instruction */ - break; - - case OP_SYSCALL: - case OP_BREAK: - more = 1; /* stop now */ - } - break; - - case OP_BCOND: - case OP_J: - case OP_JAL: - case OP_BEQ: - case OP_BNE: - case OP_BLEZ: - case OP_BGTZ: - more = 2; /* stop after next instruction */ - break; - - case OP_COP0: - case OP_COP1: - case OP_COP2: - case OP_COP3: - switch (i.RType.rs) { - case OP_BCx: - case OP_BCy: - more = 2; /* stop after next instruction */ - } - break; - - case OP_SW: - /* look for saved registers on the stack */ - if (i.IType.rs != 29) - break; - /* - * only restore the first one except RA for - * MipsKernGenException case - */ - if (mask & (1 << i.IType.rt)) { - if (subr == (uintptr_t)MipsKernGenException && - i.IType.rt == 31) - next_ra = kdbpeek((int *)(sp + - (short)i.IType.imm)); - break; - } - mask |= (1 << i.IType.rt); - switch (i.IType.rt) { - case 4:/* a0 */ - args[0] = kdbpeek((int *)(sp + (short)i.IType.imm)); - valid_args[0] = 1; - break; - - case 5:/* a1 */ - args[1] = kdbpeek((int *)(sp + (short)i.IType.imm)); - valid_args[1] = 1; - break; - - case 6:/* a2 */ - args[2] = kdbpeek((int *)(sp + (short)i.IType.imm)); - valid_args[2] = 1; - break; - - case 7:/* a3 */ - args[3] = kdbpeek((int *)(sp + (short)i.IType.imm)); - valid_args[3] = 1; - break; - - case 31: /* ra */ - ra = kdbpeek((int *)(sp + (short)i.IType.imm)); - } - break; - - case OP_SD: - /* look for saved registers on the stack */ - if (i.IType.rs != 29) - break; - /* only restore the first one */ - if (mask & (1 << i.IType.rt)) - break; - mask |= (1 << i.IType.rt); - switch (i.IType.rt) { - case 4:/* a0 */ - args[0] = kdbpeekd((int *)(sp + (short)i.IType.imm)); - valid_args[0] = 1; - break; - - case 5:/* a1 */ - args[1] = kdbpeekd((int *)(sp + (short)i.IType.imm)); - valid_args[1] = 1; - break; - - case 6:/* a2 */ - args[2] = kdbpeekd((int *)(sp + (short)i.IType.imm)); - valid_args[2] = 1; - break; - - case 7:/* a3 */ - args[3] = kdbpeekd((int *)(sp + (short)i.IType.imm)); - valid_args[3] = 1; - break; - - case 31: /* ra */ - ra = kdbpeekd((int *)(sp + (short)i.IType.imm)); - } - break; - - case OP_ADDI: - case OP_ADDIU: - case OP_DADDI: - case OP_DADDIU: - /* look for stack pointer adjustment */ - if (i.IType.rs != 29 || i.IType.rt != 29) - break; - stksize = -((short)i.IType.imm); - } - } - -done: - db_printsym(pc, DB_STGY_PROC); - db_printf(" ("); - for (j = 0; j < 4; j ++) { - if (j > 0) - db_printf(","); - if (valid_args[j]) - db_printf("%jx", (uintmax_t)(u_register_t)args[j]); - else - db_printf("?"); - } - - db_printf(") ra %jx sp %jx sz %d\n", - (uintmax_t)(u_register_t) ra, - (uintmax_t)(u_register_t) sp, - stksize); - - if (trapframe) { -#define TF_REG(base, reg) ((base) + CALLFRAME_SIZ + ((reg) * SZREG)) -#if defined(__mips_n64) || defined(__mips_n32) - pc = kdbpeekd((int *)TF_REG(sp, PC)); - ra = kdbpeekd((int *)TF_REG(sp, RA)); - sp = kdbpeekd((int *)TF_REG(sp, SP)); - cause = kdbpeekd((int *)TF_REG(sp, CAUSE)); - badvaddr = kdbpeekd((int *)TF_REG(sp, BADVADDR)); -#else - pc = kdbpeek((int *)TF_REG(sp, PC)); - ra = kdbpeek((int *)TF_REG(sp, RA)); - sp = kdbpeek((int *)TF_REG(sp, SP)); - cause = kdbpeek((int *)TF_REG(sp, CAUSE)); - badvaddr = kdbpeek((int *)TF_REG(sp, BADVADDR)); -#endif -#undef TF_REG - db_printf("--- exception, cause %jx badvaddr %jx ---\n", - (uintmax_t)cause, (uintmax_t)badvaddr); - goto loop; - } else if (ra) { - /* - * We subtract two instructions from ra to convert it - * from a return address to a calling address, - * accounting for the delay slot. - */ - register_t next_pc = ra - 2 * sizeof(int); - if (pc == next_pc && stksize == 0) - db_printf("stacktrace: loop!\n"); - else { - pc = next_pc; - sp += stksize; - ra = next_ra; - goto loop; - } - } -} - -void -db_md_list_watchpoints() -{ -} - -void -db_trace_self(void) -{ - register_t pc, ra, sp; - - sp = (register_t)(intptr_t)__builtin_frame_address(0); - ra = (register_t)(intptr_t)__builtin_return_address(0); - - __asm __volatile( - "jal 99f\n" - "nop\n" - "99:\n" - "move %0, $31\n" /* get ra */ - "move $31, %1\n" /* restore ra */ - : "=r" (pc) - : "r" (ra)); - stacktrace_subr(pc, sp, ra); - return; -} - -int -db_trace_thread(struct thread *thr, int count) -{ - register_t pc, ra, sp; - struct pcb *ctx; - - ctx = kdb_thr_ctx(thr); - sp = (register_t)ctx->pcb_context[PCB_REG_SP]; - pc = (register_t)ctx->pcb_context[PCB_REG_PC]; - ra = (register_t)ctx->pcb_context[PCB_REG_RA]; - stacktrace_subr(pc, sp, ra); - - return (0); -} - -void -db_show_mdpcpu(struct pcpu *pc) -{ - - db_printf("ipis = 0x%x\n", pc->pc_pending_ipis); - db_printf("next ASID = %d\n", pc->pc_next_asid); - db_printf("GENID = %d\n", pc->pc_asid_generation); - return; -} diff --git a/sys/mips/mips/dump_machdep.c b/sys/mips/mips/dump_machdep.c deleted file mode 100644 index bc69d0fa831..00000000000 --- a/sys/mips/mips/dump_machdep.c +++ /dev/null @@ -1,56 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2002 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include - -int do_minidump = 1; -SYSCTL_INT(_debug, OID_AUTO, minidump, CTLFLAG_RWTUN, &do_minidump, 0, - "Enable mini crash dumps"); - -void -dumpsys_wbinv_all(void) -{ - - /* Make sure we write coherent datas. */ - mips_dcache_wbinv_all(); -} - -void -dumpsys_map_chunk(vm_paddr_t pa, size_t chunk __unused, void **va) -{ - - *va = (void *)(intptr_t)pa; -} diff --git a/sys/mips/mips/elf_machdep.c b/sys/mips/mips/elf_machdep.c deleted file mode 100644 index 1f28d72e5a0..00000000000 --- a/sys/mips/mips/elf_machdep.c +++ /dev/null @@ -1,513 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 1996-1998 John D. Polstra. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * from: src/sys/i386/i386/elf_machdep.c,v 1.20 2004/08/11 02:35:05 marcel - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -static struct sysentvec elf_freebsd_sysvec = { - .sv_size = SYS_MAXSYSCALL, - .sv_table = sysent, - .sv_fixup = __elfN(freebsd_fixup), - .sv_sendsig = sendsig, - .sv_sigcode = sigcode, - .sv_szsigcode = &szsigcode, -#ifdef __mips_n64 - .sv_name = "FreeBSD ELF64", -#else - .sv_name = "FreeBSD ELF32", -#endif - .sv_coredump = __elfN(coredump), - .sv_elf_core_abi_vendor = FREEBSD_ABI_VENDOR, - .sv_elf_core_prepare_notes = __elfN(prepare_notes), - .sv_imgact_try = NULL, - .sv_minsigstksz = MINSIGSTKSZ, - .sv_minuser = VM_MIN_ADDRESS, - .sv_maxuser = VM_MAXUSER_ADDRESS, - .sv_usrstack = USRSTACK, - .sv_psstrings = PS_STRINGS, - .sv_stackprot = VM_PROT_ALL, - .sv_copyout_auxargs = __elfN(freebsd_copyout_auxargs), - .sv_copyout_strings = exec_copyout_strings, - .sv_setregs = exec_setregs, - .sv_fixlimit = NULL, - .sv_maxssiz = NULL, - .sv_flags = SV_ABI_FREEBSD | SV_ASLR | SV_RNG_SEED_VER | -#ifdef __mips_n64 - SV_LP64, -#else - SV_ILP32, -#endif - .sv_set_syscall_retval = cpu_set_syscall_retval, - .sv_fetch_syscall_args = cpu_fetch_syscall_args, - .sv_syscallnames = syscallnames, - .sv_schedtail = NULL, - .sv_thread_detach = NULL, - .sv_trap = NULL, - .sv_onexec_old = exec_onexec_old, - .sv_onexit = exit_onexit, - .sv_regset_begin = SET_BEGIN(__elfN(regset)), - .sv_regset_end = SET_LIMIT(__elfN(regset)), -}; - -static __ElfN(Brandinfo) freebsd_brand_info = { - .brand = ELFOSABI_FREEBSD, - .machine = EM_MIPS, - .compat_3_brand = "FreeBSD", - .emul_path = NULL, - .interp_path = "/libexec/ld-elf.so.1", - .sysvec = &elf_freebsd_sysvec, - .interp_newpath = NULL, - .brand_note = &__elfN(freebsd_brandnote), - .flags = BI_CAN_EXEC_DYN | BI_BRAND_NOTE -}; - -SYSINIT(elf, SI_SUB_EXEC, SI_ORDER_ANY, - (sysinit_cfunc_t) __elfN(insert_brand_entry), - &freebsd_brand_info); - -void -__elfN(dump_thread)(struct thread *td __unused, void *dst __unused, - size_t *off __unused) -{ -} - -/* - * The following MIPS relocation code for tracking multiple - * consecutive HI32/LO32 entries is because of the following: - * - * https://dmz-portal.mips.com/wiki/MIPS_relocation_types - * - * === - * - * + R_MIPS_HI16 - * - * An R_MIPS_HI16 must be followed eventually by an associated R_MIPS_LO16 - * relocation record in the same SHT_REL section. The contents of the two - * fields to be relocated are combined to form a full 32-bit addend AHL. - * An R_MIPS_LO16 entry which does not immediately follow a R_MIPS_HI16 is - * combined with the most recent one encountered, i.e. multiple R_MIPS_LO16 - * entries may be associated with a single R_MIPS_HI16. Use of these - * relocation types in a SHT_REL section is discouraged and may be - * forbidden to avoid this complication. - * - * A GNU extension allows multiple R_MIPS_HI16 records to share the same - * R_MIPS_LO16 relocation record(s). The association works like this within - * a single relocation section: - * - * + From the beginning of the section moving to the end of the section, - * until R_MIPS_LO16 is not found each found R_MIPS_HI16 relocation will - * be associated with the first R_MIPS_LO16. - * - * + Until another R_MIPS_HI16 record is found all found R_MIPS_LO16 - * relocations found are associated with the last R_MIPS_HI16. - * - * === - * - * This is so gcc can do dead code detection/removal without having to - * generate HI/LO pairs even if one of them would be deleted. - * - * So, the summary is: - * - * + A HI16 entry must occur before any LO16 entries; - * + Multiple consecutive HI16 RELA entries need to be buffered until the - * first LO16 RELA entry occurs - and then all HI16 RELA relocations use - * the offset in the LOW16 RELA for calculating their offsets; - * + The last HI16 RELA entry before a LO16 RELA entry is used (the AHL) - * for the first subsequent LO16 calculation; - * + If multiple consecutive LO16 RELA entries occur, only the first - * LO16 RELA entry triggers an update of buffered HI16 RELA entries; - * any subsequent LO16 RELA entry before another HI16 RELA entry will - * not cause any further updates to the HI16 RELA entries. - * - * Additionally, flush out any outstanding HI16 entries that don't have - * a LO16 entry in case some garbage entries are left in the file. - */ - -struct mips_tmp_reloc; -struct mips_tmp_reloc { - struct mips_tmp_reloc *next; - - Elf_Addr ahl; - Elf32_Addr *where_hi16; -}; - -static struct mips_tmp_reloc *ml = NULL; - -/* - * Add a temporary relocation (ie, a HI16 reloc type.) - */ -static int -mips_tmp_reloc_add(Elf_Addr ahl, Elf32_Addr *where_hi16) -{ - struct mips_tmp_reloc *r; - - r = malloc(sizeof(struct mips_tmp_reloc), M_TEMP, M_NOWAIT); - if (r == NULL) { - printf("%s: failed to malloc\n", __func__); - return (0); - } - - r->ahl = ahl; - r->where_hi16 = where_hi16; - r->next = ml; - ml = r; - - return (1); -} - -/* - * Flush the temporary relocation list. - * - * This should be done after a file is completely loaded - * so no stale relocations exist to confuse the next - * load. - */ -static void -mips_tmp_reloc_flush(void) -{ - struct mips_tmp_reloc *r, *rn; - - r = ml; - ml = NULL; - while (r != NULL) { - rn = r->next; - free(r, M_TEMP); - r = rn; - } -} - -/* - * Get an entry from the reloc list; or NULL if we've run out. - */ -static struct mips_tmp_reloc * -mips_tmp_reloc_get(void) -{ - struct mips_tmp_reloc *r; - - r = ml; - if (r == NULL) - return (NULL); - ml = ml->next; - return (r); -} - -/* - * Free a relocation entry. - */ -static void -mips_tmp_reloc_free(struct mips_tmp_reloc *r) -{ - - free(r, M_TEMP); -} - -bool -elf_is_ifunc_reloc(Elf_Size r_info __unused) -{ - - return (false); -} - -/* Process one elf relocation with addend. */ -static int -elf_reloc_internal(linker_file_t lf, Elf_Addr relocbase, const void *data, - int type, int local, elf_lookup_fn lookup) -{ - Elf32_Addr *where = (Elf32_Addr *)NULL; - Elf_Addr addr; - Elf_Addr addend = (Elf_Addr)0; - Elf_Word rtype = (Elf_Word)0, symidx; - struct mips_tmp_reloc *r; - const Elf_Rel *rel = NULL; - const Elf_Rela *rela = NULL; - int error; - - /* Store the last seen ahl from a HI16 for LO16 processing */ - static Elf_Addr last_ahl; - - switch (type) { - case ELF_RELOC_REL: - rel = (const Elf_Rel *)data; - where = (Elf32_Addr *) (relocbase + rel->r_offset); - rtype = ELF_R_TYPE(rel->r_info); - symidx = ELF_R_SYM(rel->r_info); - switch (rtype) { - case R_MIPS_64: - addend = *(Elf64_Addr *)where; - break; - default: - addend = *where; - break; - } - - break; - case ELF_RELOC_RELA: - rela = (const Elf_Rela *)data; - where = (Elf32_Addr *) (relocbase + rela->r_offset); - addend = rela->r_addend; - rtype = ELF_R_TYPE(rela->r_info); - symidx = ELF_R_SYM(rela->r_info); - break; - default: - panic("unknown reloc type %d\n", type); - } - - switch (rtype) { - case R_MIPS_NONE: /* none */ - break; - - case R_MIPS_32: /* S + A */ - error = lookup(lf, symidx, 1, &addr); - if (error != 0) - return (-1); - addr += addend; - if (*where != addr) - *where = (Elf32_Addr)addr; - break; - - case R_MIPS_26: /* ((A << 2) | (P & 0xf0000000) + S) >> 2 */ - error = lookup(lf, symidx, 1, &addr); - if (error != 0) - return (-1); - - addend &= 0x03ffffff; - /* - * Addendum for .rela R_MIPS_26 is not shifted right - */ - if (rela == NULL) - addend <<= 2; - - addr += ((Elf_Addr)where & 0xf0000000) | addend; - addr >>= 2; - - *where &= ~0x03ffffff; - *where |= addr & 0x03ffffff; - break; - - case R_MIPS_64: /* S + A */ - error = lookup(lf, symidx, 1, &addr); - if (error != 0) - return (-1); - addr += addend; - if (*(Elf64_Addr*)where != addr) - *(Elf64_Addr*)where = addr; - break; - - /* - * Handle the two GNU extension cases: - * - * + Multiple HI16s followed by a LO16, and - * + A HI16 followed by multiple LO16s. - * - * The former is tricky - the HI16 relocations need - * to be buffered until a LO16 occurs, at which point - * each HI16 is replayed against the LO16 relocation entry - * (with the relevant overflow information.) - * - * The latter should be easy to handle - when the - * first LO16 is seen, write out and flush the - * HI16 buffer. Any subsequent LO16 entries will - * find a blank relocation buffer. - * - */ - - case R_MIPS_HI16: /* ((AHL + S) - ((short)(AHL + S)) >> 16 */ - if (rela != NULL) { - error = lookup(lf, symidx, 1, &addr); - if (error != 0) - return (-1); - addr += addend; - *where &= 0xffff0000; - *where |= ((((long long) addr + 0x8000LL) >> 16) & 0xffff); - } else { - /* - * Add a temporary relocation to the list; - * will pop it off / free the list when - * we've found a suitable HI16. - */ - if (mips_tmp_reloc_add(addend << 16, where) == 0) - return (-1); - /* - * Track the last seen HI16 AHL for use by - * the first LO16 AHL calculation. - * - * The assumption is any intermediary deleted - * LO16's were optimised out, so the last - * HI16 before the LO16 is the "true" relocation - * entry to use for that LO16 write. - */ - last_ahl = addend << 16; - } - break; - - case R_MIPS_LO16: /* AHL + S */ - if (rela != NULL) { - error = lookup(lf, symidx, 1, &addr); - if (error != 0) - return (-1); - addr += addend; - *where &= 0xffff0000; - *where |= addr & 0xffff; - } else { - Elf_Addr tmp_ahl; - Elf_Addr tmp_addend; - - tmp_ahl = last_ahl + (int16_t) addend; - error = lookup(lf, symidx, 1, &addr); - if (error != 0) - return (-1); - - tmp_addend = addend & 0xffff0000; - - /* Use the last seen ahl for calculating addend */ - tmp_addend |= (uint16_t)(tmp_ahl + addr); - *where = tmp_addend; - - /* - * This logic implements the "we saw multiple HI16 - * before a LO16" assignment /and/ "we saw multiple - * LO16s". - * - * Multiple LO16s will be handled as a blank - * relocation list. - * - * Multple HI16's are iterated over here. - */ - while ((r = mips_tmp_reloc_get()) != NULL) { - Elf_Addr rahl; - - /* - * We have the ahl from the HI16 entry, so - * offset it by the 16 bits of the low ahl. - */ - rahl = r->ahl; - rahl += (int16_t) addend; - - tmp_addend = *(r->where_hi16); - tmp_addend &= 0xffff0000; - tmp_addend |= ((rahl + addr) - - (int16_t)(rahl + addr)) >> 16; - *(r->where_hi16) = tmp_addend; - mips_tmp_reloc_free(r); - } - } - - break; - - case R_MIPS_HIGHER: /* %higher(A+S) */ - error = lookup(lf, symidx, 1, &addr); - if (error != 0) - return (-1); - addr += addend; - *where &= 0xffff0000; - *where |= (((long long)addr + 0x80008000LL) >> 32) & 0xffff; - break; - - case R_MIPS_HIGHEST: /* %highest(A+S) */ - error = lookup(lf, symidx, 1, &addr); - if (error != 0) - return (-1); - addr += addend; - *where &= 0xffff0000; - *where |= (((long long)addr + 0x800080008000LL) >> 48) & 0xffff; - break; - - default: - printf("kldload: unexpected relocation type %d, " - "symbol index %d\n", rtype, symidx); - return (-1); - } - - return (0); -} - -int -elf_reloc(linker_file_t lf, Elf_Addr relocbase, const void *data, int type, - elf_lookup_fn lookup) -{ - - return (elf_reloc_internal(lf, relocbase, data, type, 0, lookup)); -} - -int -elf_reloc_local(linker_file_t lf, Elf_Addr relocbase, const void *data, - int type, elf_lookup_fn lookup) -{ - - return (elf_reloc_internal(lf, relocbase, data, type, 1, lookup)); -} - -int -elf_cpu_load_file(linker_file_t lf __unused) -{ - - /* - * Sync the I and D caches to make sure our relocations are visible. - */ - mips_icache_sync_all(); - - /* Flush outstanding relocations */ - mips_tmp_reloc_flush(); - - return (0); -} - -int -elf_cpu_unload_file(linker_file_t lf __unused) -{ - - return (0); -} - -int -elf_cpu_parse_dynamic(caddr_t loadbase __unused, Elf_Dyn *dynamic __unused) -{ - - return (0); -} diff --git a/sys/mips/mips/elf_trampoline.c b/sys/mips/mips/elf_trampoline.c deleted file mode 100644 index 4ea7684c5c2..00000000000 --- a/sys/mips/mips/elf_trampoline.c +++ /dev/null @@ -1,224 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2005 Olivier Houchard. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include - -#if ELFSIZE == 64 -#include -#else -#include -#endif - -/* - * Since we are compiled outside of the normal kernel build process, we - * need to include opt_global.h manually. - */ -#include "opt_global.h" - -#include -#include -#include - -#ifndef KERNNAME -#error Kernel name not provided -#endif - -extern char kernel_start[]; -extern char kernel_end[]; - -static __inline void * -memcpy(void *dst, const void *src, size_t len) -{ - const char *s = src; - char *d = dst; - - while (len) { - if (0 && len >= 4 && !((vm_offset_t)d & 3) && - !((vm_offset_t)s & 3)) { - *(uint32_t *)d = *(uint32_t *)s; - s += 4; - d += 4; - len -= 4; - } else { - *d++ = *s++; - len--; - } - } - return (dst); -} - -static __inline void -bzero(void *addr, size_t count) -{ - char *tmp = (char *)addr; - - while (count > 0) { - if (count >= 4 && !((vm_offset_t)tmp & 3)) { - *(uint32_t *)tmp = 0; - tmp += 4; - count -= 4; - } else { - *tmp = 0; - tmp++; - count--; - } - } -} - -/* - * Convert number to pointer, truncate on 64->32 case, sign extend - * in 32->64 case - */ -#define mkptr(x) ((void *)(intptr_t)(int)(x)) - -/* - * Relocate PT_LOAD segments of kernel ELF image to their respective - * virtual addresses and return entry point - */ -void * -load_kernel(void * kstart) -{ -#if ELFSIZE == 64 - Elf64_Ehdr *eh; - Elf64_Phdr phdr[64] /* XXX */; - Elf64_Shdr shdr[64] /* XXX */; -#else - Elf32_Ehdr *eh; - Elf32_Phdr phdr[64] /* XXX */; - Elf32_Shdr shdr[64] /* XXX */; -#endif - int i, j; - void *entry_point; - vm_offset_t loadend = 0; - intptr_t lastaddr; - int symtabindex = -1; - int symstrindex = -1; - Elf_Size tmp; - -#if ELFSIZE == 64 - eh = (Elf64_Ehdr *)kstart; -#else - eh = (Elf32_Ehdr *)kstart; -#endif - entry_point = mkptr(eh->e_entry); - memcpy(phdr, (void *)(kstart + eh->e_phoff), - eh->e_phnum * sizeof(phdr[0])); - - memcpy(shdr, (void *)(kstart + eh->e_shoff), - sizeof(*shdr) * eh->e_shnum); - - if (eh->e_shnum * eh->e_shentsize != 0 && eh->e_shoff != 0) { - for (i = 0; i < eh->e_shnum; i++) { - if (shdr[i].sh_type == SHT_SYMTAB) { - /* - * XXX: check if .symtab is in PT_LOAD? - */ - if (shdr[i].sh_offset != 0 && - shdr[i].sh_size != 0) { - symtabindex = i; - symstrindex = shdr[i].sh_link; - } - } - } - } - - /* - * Copy loadable segments - */ - for (i = 0; i < eh->e_phnum; i++) { - volatile char c; - - if (phdr[i].p_type != PT_LOAD) - continue; - - memcpy(mkptr(phdr[i].p_vaddr), - (void*)(kstart + phdr[i].p_offset), phdr[i].p_filesz); - - /* Clean space from oversized segments, eg: bss. */ - if (phdr[i].p_filesz < phdr[i].p_memsz) - bzero(mkptr(phdr[i].p_vaddr + phdr[i].p_filesz), - phdr[i].p_memsz - phdr[i].p_filesz); - - if (loadend < phdr[i].p_vaddr + phdr[i].p_memsz) - loadend = phdr[i].p_vaddr + phdr[i].p_memsz; - } - - /* Now grab the symbol tables. */ - lastaddr = (intptr_t)(int)loadend; - if (symtabindex >= 0 && symstrindex >= 0) { - tmp = SYMTAB_MAGIC; - memcpy((void *)lastaddr, &tmp, sizeof(tmp)); - lastaddr += sizeof(Elf_Size); - tmp = shdr[symtabindex].sh_size + - shdr[symstrindex].sh_size + 2*sizeof(Elf_Size); - memcpy((void *)lastaddr, &tmp, sizeof(tmp)); - lastaddr += sizeof(Elf_Size); - /* .symtab size */ - tmp = shdr[symtabindex].sh_size; - memcpy((void *)lastaddr, &tmp, sizeof(tmp)); - lastaddr += sizeof(shdr[symtabindex].sh_size); - /* .symtab data */ - memcpy((void*)lastaddr, - shdr[symtabindex].sh_offset + kstart, - shdr[symtabindex].sh_size); - lastaddr += shdr[symtabindex].sh_size; - - /* .strtab size */ - tmp = shdr[symstrindex].sh_size; - memcpy((void *)lastaddr, &tmp, sizeof(tmp)); - lastaddr += sizeof(shdr[symstrindex].sh_size); - - /* .strtab data */ - memcpy((void*)lastaddr, - shdr[symstrindex].sh_offset + kstart, - shdr[symstrindex].sh_size); - } else { - /* Do not take any chances */ - tmp = 0; - memcpy((void *)lastaddr, &tmp, sizeof(tmp)); - } - - return entry_point; -} - -void -_startC(register_t a0, register_t a1, register_t a2, register_t a3) -{ - unsigned int * code; - int i; - void (*entry_point)(register_t, register_t, register_t, register_t); - - /* - * Relocate segment to the predefined memory location - * Most likely it will be KSEG0/KSEG1 address - */ - entry_point = load_kernel(kernel_start); - - /* Pass saved registers to original _start */ - entry_point(a0, a1, a2, a3); -} diff --git a/sys/mips/mips/exception.S b/sys/mips/mips/exception.S deleted file mode 100644 index 3cb94abe3aa..00000000000 --- a/sys/mips/mips/exception.S +++ /dev/null @@ -1,1243 +0,0 @@ -/* $OpenBSD: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $ */ -/*- - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Digital Equipment Corporation and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Copyright (C) 1989 Digital Equipment Corporation. - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose and without fee is hereby granted, - * provided that the above copyright notice appears in all copies. - * Digital Equipment Corporation makes no representations about the - * suitability of this software for any purpose. It is provided "as is" - * without express or implied warranty. - * - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s, - * v 1.1 89/07/11 17:55:04 nelson Exp SPRITE (DECWRL) - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s, - * v 9.2 90/01/29 18:00:39 shirriff Exp SPRITE (DECWRL) - * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s, - * v 1.1 89/07/10 14:27:41 nelson Exp SPRITE (DECWRL) - * from: @(#)locore.s 8.5 (Berkeley) 1/4/94 - * JNPR: exception.S,v 1.5 2007/01/08 04:58:37 katta - */ - -/* - * Contains code that is the first executed at boot time plus - * assembly language support routines. - */ - -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include - -#include "assym.inc" - - .set noreorder # Noreorder is default style! - -#ifdef KDTRACE_HOOKS - .data - .globl dtrace_invop_calltrap_addr - .align 4 - .type dtrace_invop_calltrap_addr, @object - .size dtrace_invop_calltrap_addr, 8 -dtrace_invop_calltrap_addr: - .word 0 - .word 0 - - .text -#endif - -/* - *---------------------------------------------------------------------------- - * - * MipsTLBMiss -- - * - * Vector code for the TLB-miss exception vector 0x80000000. - * - * This code is copied to the TLB exception vector address to - * which the CPU jumps in response to an exception or a TLB miss. - * NOTE: This code must be position independent!!! - * - * - */ -VECTOR(MipsTLBMiss, unknown) - .set push - .set noat - j MipsDoTLBMiss - MFC0 k0, MIPS_COP_0_BAD_VADDR # get the fault address - .set pop -VECTOR_END(MipsTLBMiss) - -/* - *---------------------------------------------------------------------------- - * - * MipsDoTLBMiss -- - * - * This is the real TLB Miss Handler code. - * 'segbase' points to the base of the segment table for user processes. - * - * Don't check for invalid pte's here. We load them as well and - * let the processor trap to load the correct value after service. - *---------------------------------------------------------------------------- - */ - .set push - .set noat -MipsDoTLBMiss: - bltz k0, 1f #02: k0<0 -> 1f (kernel fault) - PTR_SRL k0, k0, SEGSHIFT - PTRSHIFT #03: k0=seg offset (almost) - - GET_CPU_PCPU(k1) - PTR_L k1, PC_SEGBASE(k1) - beqz k1, 2f #05: make sure segbase is not null - andi k0, k0, PDEPTRMASK #06: k0=seg offset - PTR_ADDU k1, k0, k1 #07: k1=seg entry address - - PTR_L k1, 0(k1) #08: k1=seg entry - MFC0 k0, MIPS_COP_0_BAD_VADDR #09: k0=bad address (again) - beq k1, zero, 2f #0a: ==0 -- no page table -#ifdef __mips_n64 - PTR_SRL k0, PDRSHIFT - PTRSHIFT # k0=VPN - andi k0, k0, PDEPTRMASK # k0=pde offset - PTR_ADDU k1, k0, k1 # k1=pde entry address - PTR_L k1, 0(k1) # k1=pde entry - MFC0 k0, MIPS_COP_0_BAD_VADDR # k0=bad address (again) - beq k1, zero, 2f # ==0 -- no page table -#endif - PTR_SRL k0, PAGE_SHIFT - PTESHIFT #0b: k0=VPN (aka va>>10) - andi k0, k0, PTE2MASK #0c: k0=page tab offset - PTR_ADDU k1, k1, k0 #0d: k1=pte address - PTE_L k0, 0(k1) #0e: k0=lo0 pte - PTE_L k1, PTESIZE(k1) #0f: k1=lo0 pte - CLEAR_PTE_SWBITS(k0) - PTE_MTC0 k0, MIPS_COP_0_TLB_LO0 #12: lo0 is loaded - COP0_SYNC - CLEAR_PTE_SWBITS(k1) - PTE_MTC0 k1, MIPS_COP_0_TLB_LO1 #15: lo1 is loaded - COP0_SYNC - tlbwr #1a: write to tlb - HAZARD_DELAY - eret #1f: retUrn from exception -1: j MipsTLBMissException #20: kernel exception - nop #21: branch delay slot -2: j SlowFault #22: no page table present - nop #23: branch delay slot - .set pop - -/* - * This code is copied to the general exception vector address to - * handle all execptions except RESET and TLBMiss. - * NOTE: This code must be position independent!!! - */ -VECTOR(MipsException, unknown) -/* - * Find out what mode we came from and jump to the proper handler. - * - * Note: at turned off here because we cannot trash the at register - * in this exception code. Only k0 and k1 may be modified before - * we save registers. This is true of all functions called through - * the pointer magic: Mips{User,Kern}Intr, Mips{User,Kern}GenException - * and MipsTLBInvalidException - */ - .set noat - mfc0 k0, MIPS_COP_0_STATUS # Get the status register - mfc0 k1, MIPS_COP_0_CAUSE # Get the cause register value. - and k0, k0, MIPS_SR_KSU_USER # test for user mode - # sneaky but the bits are - # with us........ - sll k0, k0, 3 # shift user bit for cause index - and k1, k1, MIPS_CR_EXC_CODE # Mask out the cause bits. - or k1, k1, k0 # change index to user table -#if defined(__mips_n64) - PTR_SLL k1, k1, 1 # shift to get 8-byte offset -#endif -1: - PTR_LA k0, _C_LABEL(machExceptionTable) # get base of the jump table - PTR_ADDU k0, k0, k1 # Get the address of the - # function entry. Note that - # the cause is already - # shifted left by 2 bits so - # we dont have to shift. - PTR_L k0, 0(k0) # Get the function address - nop - j k0 # Jump to the function. - nop - .set at -VECTOR_END(MipsException) - -/* - * We couldn't find a TLB entry. - * Find out what mode we came from and call the appropriate handler. - */ -SlowFault: - .set noat - mfc0 k0, MIPS_COP_0_STATUS - nop - and k0, k0, MIPS_SR_KSU_USER - bne k0, zero, _C_LABEL(MipsUserGenException) - nop - .set at -/* - * Fall though ... - */ - -/*---------------------------------------------------------------------------- - * - * MipsKernGenException -- - * - * Handle an exception from kernel mode. - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ - -#define SAVE_REG(reg, offs, base) \ - REG_S reg, CALLFRAME_SIZ + (SZREG * offs) (base) - -#if defined(CPU_CNMIPS) -#define CLEAR_STATUS \ - mfc0 a0, MIPS_COP_0_STATUS ;\ - li a2, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX) ; \ - or a0, a0, a2 ; \ - li a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | MIPS_SR_KSU_USER) ; \ - and a0, a0, a2 ; \ - mtc0 a0, MIPS_COP_0_STATUS ; \ - ITLBNOPFIX -#elif defined(CPU_RMI) || defined(CPU_NLM) -#define CLEAR_STATUS \ - mfc0 a0, MIPS_COP_0_STATUS ;\ - li a2, (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_COP_2_BIT) ; \ - or a0, a0, a2 ; \ - li a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | MIPS_SR_KSU_USER) ; \ - and a0, a0, a2 ; \ - mtc0 a0, MIPS_COP_0_STATUS ; \ - ITLBNOPFIX -#else -#define CLEAR_STATUS \ - mfc0 a0, MIPS_COP_0_STATUS ;\ - li a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | MIPS_SR_KSU_USER) ; \ - and a0, a0, a2 ; \ - mtc0 a0, MIPS_COP_0_STATUS ; \ - ITLBNOPFIX -#endif - -/* - * Save CPU and CP0 register state. - * - * This is straightforward except for saving the exception program - * counter. The ddb backtrace code looks for the first instruction - * matching the form "sw ra, (off)sp" to figure out the address of the - * calling function. So we must make sure that we save the exception - * PC by staging it through 'ra' as opposed to any other register. - */ -#define SAVE_CPU \ - SAVE_REG(AT, AST, sp) ;\ - .set at ; \ - SAVE_REG(v0, V0, sp) ;\ - SAVE_REG(v1, V1, sp) ;\ - SAVE_REG(a0, A0, sp) ;\ - SAVE_REG(a1, A1, sp) ;\ - SAVE_REG(a2, A2, sp) ;\ - SAVE_REG(a3, A3, sp) ;\ - SAVE_REG(t0, T0, sp) ;\ - SAVE_REG(t1, T1, sp) ;\ - SAVE_REG(t2, T2, sp) ;\ - SAVE_REG(t3, T3, sp) ;\ - SAVE_REG(ta0, TA0, sp) ;\ - SAVE_REG(ta1, TA1, sp) ;\ - SAVE_REG(ta2, TA2, sp) ;\ - SAVE_REG(ta3, TA3, sp) ;\ - SAVE_REG(t8, T8, sp) ;\ - SAVE_REG(t9, T9, sp) ;\ - SAVE_REG(gp, GP, sp) ;\ - SAVE_REG(s0, S0, sp) ;\ - SAVE_REG(s1, S1, sp) ;\ - SAVE_REG(s2, S2, sp) ;\ - SAVE_REG(s3, S3, sp) ;\ - SAVE_REG(s4, S4, sp) ;\ - SAVE_REG(s5, S5, sp) ;\ - SAVE_REG(s6, S6, sp) ;\ - SAVE_REG(s7, S7, sp) ;\ - SAVE_REG(s8, S8, sp) ;\ - mflo v0 ;\ - mfhi v1 ;\ - mfc0 a0, MIPS_COP_0_STATUS ;\ - mfc0 a1, MIPS_COP_0_CAUSE ;\ - MFC0 a2, MIPS_COP_0_BAD_VADDR;\ - MFC0 a3, MIPS_COP_0_EXC_PC ;\ - SAVE_REG(v0, MULLO, sp) ;\ - SAVE_REG(v1, MULHI, sp) ;\ - SAVE_REG(a0, SR, sp) ;\ - SAVE_REG(a1, CAUSE, sp) ;\ - SAVE_REG(a2, BADVADDR, sp) ;\ - move t0, ra ;\ - move ra, a3 ;\ - SAVE_REG(ra, PC, sp) ;\ - move ra, t0 ;\ - SAVE_REG(ra, RA, sp) ;\ - PTR_ADDU v0, sp, KERN_EXC_FRAME_SIZE ;\ - SAVE_REG(v0, SP, sp) ;\ - CLEAR_STATUS ;\ - PTR_ADDU a0, sp, CALLFRAME_SIZ ;\ - ITLBNOPFIX - -#define RESTORE_REG(reg, offs, base) \ - REG_L reg, CALLFRAME_SIZ + (SZREG * offs) (base) - -#define RESTORE_CPU \ - CLEAR_STATUS ;\ - RESTORE_REG(k0, SR, sp) ;\ - RESTORE_REG(t0, MULLO, sp) ;\ - RESTORE_REG(t1, MULHI, sp) ;\ - mtlo t0 ;\ - mthi t1 ;\ - MTC0 v0, MIPS_COP_0_EXC_PC ;\ - .set noat ;\ - RESTORE_REG(AT, AST, sp) ;\ - RESTORE_REG(v0, V0, sp) ;\ - RESTORE_REG(v1, V1, sp) ;\ - RESTORE_REG(a0, A0, sp) ;\ - RESTORE_REG(a1, A1, sp) ;\ - RESTORE_REG(a2, A2, sp) ;\ - RESTORE_REG(a3, A3, sp) ;\ - RESTORE_REG(t0, T0, sp) ;\ - RESTORE_REG(t1, T1, sp) ;\ - RESTORE_REG(t2, T2, sp) ;\ - RESTORE_REG(t3, T3, sp) ;\ - RESTORE_REG(ta0, TA0, sp) ;\ - RESTORE_REG(ta1, TA1, sp) ;\ - RESTORE_REG(ta2, TA2, sp) ;\ - RESTORE_REG(ta3, TA3, sp) ;\ - RESTORE_REG(t8, T8, sp) ;\ - RESTORE_REG(t9, T9, sp) ;\ - RESTORE_REG(s0, S0, sp) ;\ - RESTORE_REG(s1, S1, sp) ;\ - RESTORE_REG(s2, S2, sp) ;\ - RESTORE_REG(s3, S3, sp) ;\ - RESTORE_REG(s4, S4, sp) ;\ - RESTORE_REG(s5, S5, sp) ;\ - RESTORE_REG(s6, S6, sp) ;\ - RESTORE_REG(s7, S7, sp) ;\ - RESTORE_REG(s8, S8, sp) ;\ - RESTORE_REG(gp, GP, sp) ;\ - RESTORE_REG(ra, RA, sp) ;\ - PTR_ADDU sp, sp, KERN_EXC_FRAME_SIZE;\ - mtc0 k0, MIPS_COP_0_STATUS - - -/* - * The kernel exception stack contains 18 saved general registers, - * the status register and the multiply lo and high registers. - * In addition, we set this up for linkage conventions. - */ -#define KERN_REG_SIZE (NUMSAVEREGS * SZREG) -#define KERN_EXC_FRAME_SIZE (CALLFRAME_SIZ + KERN_REG_SIZE + 16) - -NESTED_NOPROFILE(MipsKernGenException, KERN_EXC_FRAME_SIZE, ra) - .set noat - PTR_SUBU sp, sp, KERN_EXC_FRAME_SIZE - .mask 0x80000000, (CALLFRAME_RA - KERN_EXC_FRAME_SIZE) -/* - * Save CPU state, building 'frame'. - */ - SAVE_CPU -/* - * Call the exception handler. a0 points at the saved frame. - */ - PTR_LA gp, _C_LABEL(_gp) - PTR_LA k0, _C_LABEL(trap) - jalr k0 - REG_S a3, CALLFRAME_RA + KERN_REG_SIZE(sp) # for debugging - - /* - * Update interrupt and CPU mask in saved status register - * Some of interrupts could be disabled by - * intr filters if interrupts are enabled later - * in trap handler - */ - mfc0 a0, MIPS_COP_0_STATUS - and a0, a0, (MIPS_SR_INT_MASK|MIPS_SR_COP_USABILITY) - RESTORE_REG(a1, SR, sp) - and a1, a1, ~(MIPS_SR_INT_MASK|MIPS_SR_COP_USABILITY) - or a1, a1, a0 - SAVE_REG(a1, SR, sp) - RESTORE_CPU # v0 contains the return address. - sync - eret - .set at -END(MipsKernGenException) - - -/*---------------------------------------------------------------------------- - * - * MipsUserGenException -- - * - * Handle an exception from user mode. - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -NESTED_NOPROFILE(MipsUserGenException, CALLFRAME_SIZ, ra) - .set noat - .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) -/* - * Save all of the registers except for the kernel temporaries in u.u_pcb. - */ - GET_CPU_PCPU(k1) - PTR_L k1, PC_CURPCB(k1) - SAVE_U_PCB_REG(AT, AST, k1) - .set at - SAVE_U_PCB_REG(v0, V0, k1) - SAVE_U_PCB_REG(v1, V1, k1) - SAVE_U_PCB_REG(a0, A0, k1) - mflo v0 - SAVE_U_PCB_REG(a1, A1, k1) - SAVE_U_PCB_REG(a2, A2, k1) - SAVE_U_PCB_REG(a3, A3, k1) - SAVE_U_PCB_REG(t0, T0, k1) - mfhi v1 - SAVE_U_PCB_REG(t1, T1, k1) - SAVE_U_PCB_REG(t2, T2, k1) - SAVE_U_PCB_REG(t3, T3, k1) - SAVE_U_PCB_REG(ta0, TA0, k1) - mfc0 a0, MIPS_COP_0_STATUS # First arg is the status reg. - SAVE_U_PCB_REG(ta1, TA1, k1) - SAVE_U_PCB_REG(ta2, TA2, k1) - SAVE_U_PCB_REG(ta3, TA3, k1) - SAVE_U_PCB_REG(s0, S0, k1) - mfc0 a1, MIPS_COP_0_CAUSE # Second arg is the cause reg. - SAVE_U_PCB_REG(s1, S1, k1) - SAVE_U_PCB_REG(s2, S2, k1) - SAVE_U_PCB_REG(s3, S3, k1) - SAVE_U_PCB_REG(s4, S4, k1) - MFC0 a2, MIPS_COP_0_BAD_VADDR # Third arg is the fault addr - SAVE_U_PCB_REG(s5, S5, k1) - SAVE_U_PCB_REG(s6, S6, k1) - SAVE_U_PCB_REG(s7, S7, k1) - SAVE_U_PCB_REG(t8, T8, k1) - MFC0 a3, MIPS_COP_0_EXC_PC # Fourth arg is the pc. - SAVE_U_PCB_REG(t9, T9, k1) - SAVE_U_PCB_REG(gp, GP, k1) - SAVE_U_PCB_REG(sp, SP, k1) - SAVE_U_PCB_REG(s8, S8, k1) - PTR_SUBU sp, k1, CALLFRAME_SIZ # switch to kernel SP - SAVE_U_PCB_REG(ra, RA, k1) - SAVE_U_PCB_REG(v0, MULLO, k1) - SAVE_U_PCB_REG(v1, MULHI, k1) - SAVE_U_PCB_REG(a0, SR, k1) - SAVE_U_PCB_REG(a1, CAUSE, k1) - SAVE_U_PCB_REG(a2, BADVADDR, k1) - SAVE_U_PCB_REG(a3, PC, k1) - REG_S a3, CALLFRAME_RA(sp) # for debugging - PTR_LA gp, _C_LABEL(_gp) # switch to kernel GP -# Turn off fpu and enter kernel mode - and t0, a0, ~(MIPS_SR_COP_1_BIT | MIPS_SR_EXL | MIPS_SR_KSU_MASK | MIPS_SR_INT_IE) -#if defined(CPU_CNMIPS) - and t0, t0, ~(MIPS_SR_COP_2_BIT) - or t0, t0, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX | MIPS_SR_PX) -#elif defined(CPU_RMI) || defined(CPU_NLM) - or t0, t0, (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_COP_2_BIT) -#endif - mtc0 t0, MIPS_COP_0_STATUS - PTR_ADDU a0, k1, U_PCB_REGS - ITLBNOPFIX - -/* - * Call the exception handler. - */ - PTR_LA k0, _C_LABEL(trap) - jalr k0 - nop - -/* - * Restore user registers and return. - * First disable interrupts and set exeption level. - */ - DO_AST - - CLEAR_STATUS - -/* - * The use of k1 for storing the PCB pointer must be done only - * after interrupts are disabled. Otherwise it will get overwritten - * by the interrupt code. - */ - GET_CPU_PCPU(k1) - PTR_L k1, PC_CURPCB(k1) - - /* - * Update interrupt mask in saved status register - * Some of interrupts could be enabled by ithread - * scheduled by ast() - */ - mfc0 a0, MIPS_COP_0_STATUS - and a0, a0, MIPS_SR_INT_MASK - RESTORE_U_PCB_REG(a1, SR, k1) - and a1, a1, ~MIPS_SR_INT_MASK - or a1, a1, a0 - SAVE_U_PCB_REG(a1, SR, k1) - - RESTORE_U_PCB_REG(t0, MULLO, k1) - RESTORE_U_PCB_REG(t1, MULHI, k1) - mtlo t0 - mthi t1 - RESTORE_U_PCB_REG(a0, PC, k1) - RESTORE_U_PCB_REG(v0, V0, k1) - MTC0 a0, MIPS_COP_0_EXC_PC # set return address - RESTORE_U_PCB_REG(v1, V1, k1) - RESTORE_U_PCB_REG(a0, A0, k1) - RESTORE_U_PCB_REG(a1, A1, k1) - RESTORE_U_PCB_REG(a2, A2, k1) - RESTORE_U_PCB_REG(a3, A3, k1) - RESTORE_U_PCB_REG(t0, T0, k1) - RESTORE_U_PCB_REG(t1, T1, k1) - RESTORE_U_PCB_REG(t2, T2, k1) - RESTORE_U_PCB_REG(t3, T3, k1) - RESTORE_U_PCB_REG(ta0, TA0, k1) - RESTORE_U_PCB_REG(ta1, TA1, k1) - RESTORE_U_PCB_REG(ta2, TA2, k1) - RESTORE_U_PCB_REG(ta3, TA3, k1) - RESTORE_U_PCB_REG(s0, S0, k1) - RESTORE_U_PCB_REG(s1, S1, k1) - RESTORE_U_PCB_REG(s2, S2, k1) - RESTORE_U_PCB_REG(s3, S3, k1) - RESTORE_U_PCB_REG(s4, S4, k1) - RESTORE_U_PCB_REG(s5, S5, k1) - RESTORE_U_PCB_REG(s6, S6, k1) - RESTORE_U_PCB_REG(s7, S7, k1) - RESTORE_U_PCB_REG(t8, T8, k1) - RESTORE_U_PCB_REG(t9, T9, k1) - RESTORE_U_PCB_REG(gp, GP, k1) - RESTORE_U_PCB_REG(sp, SP, k1) - RESTORE_U_PCB_REG(k0, SR, k1) - RESTORE_U_PCB_REG(s8, S8, k1) - RESTORE_U_PCB_REG(ra, RA, k1) - .set noat - RESTORE_U_PCB_REG(AT, AST, k1) - - mtc0 k0, MIPS_COP_0_STATUS # still exception level - ITLBNOPFIX - sync - eret - .set at -END(MipsUserGenException) - - .set push - .set noat -NESTED(mips_wait, CALLFRAME_SIZ, ra) - PTR_SUBU sp, sp, CALLFRAME_SIZ - .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) - REG_S ra, CALLFRAME_RA(sp) # save RA - mfc0 t0, MIPS_COP_0_STATUS - xori t1, t0, MIPS_SR_INT_IE - mtc0 t1, MIPS_COP_0_STATUS - COP0_SYNC - jal sched_runnable - nop - REG_L ra, CALLFRAME_RA(sp) - mfc0 t0, MIPS_COP_0_STATUS - ori t1, t0, MIPS_SR_INT_IE - .align 4 -GLOBAL(MipsWaitStart) # this is 16 byte aligned - mtc0 t1, MIPS_COP_0_STATUS - bnez v0, MipsWaitEnd - nop -#if defined(CPU_XBURST) && defined(SMP) - nop -#else - wait -#endif -GLOBAL(MipsWaitEnd) # MipsWaitStart + 16 - jr ra - PTR_ADDU sp, sp, CALLFRAME_SIZ -END(mips_wait) - .set pop - -/*---------------------------------------------------------------------------- - * - * MipsKernIntr -- - * - * Handle an interrupt from kernel mode. - * Interrupts use the standard kernel stack. - * switch_exit sets up a kernel stack after exit so interrupts won't fail. - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ - -NESTED_NOPROFILE(MipsKernIntr, KERN_EXC_FRAME_SIZE, ra) - .set noat - PTR_SUBU sp, sp, KERN_EXC_FRAME_SIZE - .mask 0x80000000, (CALLFRAME_RA - KERN_EXC_FRAME_SIZE) - -/* - * Check for getting interrupts just before wait - */ - MFC0 k0, MIPS_COP_0_EXC_PC - ori k0, 0xf - xori k0, 0xf # 16 byte align - PTR_LA k1, MipsWaitStart - bne k0, k1, 1f - nop - PTR_ADDU k1, 16 # skip over wait - MTC0 k1, MIPS_COP_0_EXC_PC -1: -/* - * Save CPU state, building 'frame'. - */ - SAVE_CPU -/* - * Call the interrupt handler. a0 points at the saved frame. - */ - PTR_LA gp, _C_LABEL(_gp) -#ifdef INTRNG - PTR_LA k0, _C_LABEL(intr_irq_handler) -#else - PTR_LA k0, _C_LABEL(cpu_intr) -#endif - jalr k0 - REG_S a3, CALLFRAME_RA + KERN_REG_SIZE(sp) # for debugging - - /* - * Update interrupt and CPU mask in saved status register - * Some of interrupts could be disabled by - * intr filters if interrupts are enabled later - * in trap handler - */ - mfc0 a0, MIPS_COP_0_STATUS - and a0, a0, (MIPS_SR_INT_MASK|MIPS_SR_COP_USABILITY) - RESTORE_REG(a1, SR, sp) - and a1, a1, ~(MIPS_SR_INT_MASK|MIPS_SR_COP_USABILITY) - or a1, a1, a0 - SAVE_REG(a1, SR, sp) - REG_L v0, CALLFRAME_RA + KERN_REG_SIZE(sp) - RESTORE_CPU # v0 contains the return address. - sync - eret - .set at -END(MipsKernIntr) - -/*---------------------------------------------------------------------------- - * - * MipsUserIntr -- - * - * Handle an interrupt from user mode. - * Note: we save minimal state in the u.u_pcb struct and use the standard - * kernel stack since there has to be a u page if we came from user mode. - * If there is a pending software interrupt, then save the remaining state - * and call softintr(). This is all because if we call switch() inside - * interrupt(), not all the user registers have been saved in u.u_pcb. - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -NESTED_NOPROFILE(MipsUserIntr, CALLFRAME_SIZ, ra) - .set noat - .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) -/* - * Save the relevant user registers into the u.u_pcb struct. - * We don't need to save s0 - s8 because the compiler does it for us. - */ - GET_CPU_PCPU(k1) - PTR_L k1, PC_CURPCB(k1) - SAVE_U_PCB_REG(AT, AST, k1) - .set at - SAVE_U_PCB_REG(v0, V0, k1) - SAVE_U_PCB_REG(v1, V1, k1) - SAVE_U_PCB_REG(a0, A0, k1) - SAVE_U_PCB_REG(a1, A1, k1) - SAVE_U_PCB_REG(a2, A2, k1) - SAVE_U_PCB_REG(a3, A3, k1) - SAVE_U_PCB_REG(t0, T0, k1) - SAVE_U_PCB_REG(t1, T1, k1) - SAVE_U_PCB_REG(t2, T2, k1) - SAVE_U_PCB_REG(t3, T3, k1) - SAVE_U_PCB_REG(ta0, TA0, k1) - SAVE_U_PCB_REG(ta1, TA1, k1) - SAVE_U_PCB_REG(ta2, TA2, k1) - SAVE_U_PCB_REG(ta3, TA3, k1) - SAVE_U_PCB_REG(t8, T8, k1) - SAVE_U_PCB_REG(t9, T9, k1) - SAVE_U_PCB_REG(gp, GP, k1) - SAVE_U_PCB_REG(sp, SP, k1) - SAVE_U_PCB_REG(ra, RA, k1) -/* - * save remaining user state in u.u_pcb. - */ - SAVE_U_PCB_REG(s0, S0, k1) - SAVE_U_PCB_REG(s1, S1, k1) - SAVE_U_PCB_REG(s2, S2, k1) - SAVE_U_PCB_REG(s3, S3, k1) - SAVE_U_PCB_REG(s4, S4, k1) - SAVE_U_PCB_REG(s5, S5, k1) - SAVE_U_PCB_REG(s6, S6, k1) - SAVE_U_PCB_REG(s7, S7, k1) - SAVE_U_PCB_REG(s8, S8, k1) - - mflo v0 # get lo/hi late to avoid stall - mfhi v1 - mfc0 a0, MIPS_COP_0_STATUS - mfc0 a1, MIPS_COP_0_CAUSE - MFC0 a3, MIPS_COP_0_EXC_PC - SAVE_U_PCB_REG(v0, MULLO, k1) - SAVE_U_PCB_REG(v1, MULHI, k1) - SAVE_U_PCB_REG(a0, SR, k1) - SAVE_U_PCB_REG(a1, CAUSE, k1) - SAVE_U_PCB_REG(a3, PC, k1) # PC in a3, note used later! - PTR_SUBU sp, k1, CALLFRAME_SIZ # switch to kernel SP - PTR_LA gp, _C_LABEL(_gp) # switch to kernel GP - -# Turn off fpu, disable interrupts, set kernel mode kernel mode, clear exception level. - and t0, a0, ~(MIPS_SR_COP_1_BIT | MIPS_SR_EXL | MIPS_SR_INT_IE | MIPS_SR_KSU_MASK) -#ifdef CPU_CNMIPS - and t0, t0, ~(MIPS_SR_COP_2_BIT) - or t0, t0, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX | MIPS_SR_PX) -#elif defined(CPU_RMI) || defined(CPU_NLM) - or t0, t0, (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_COP_2_BIT) -#endif - mtc0 t0, MIPS_COP_0_STATUS - ITLBNOPFIX - PTR_ADDU a0, k1, U_PCB_REGS -/* - * Call the interrupt handler. - */ -#ifdef INTRNG - PTR_LA k0, _C_LABEL(intr_irq_handler) -#else - PTR_LA k0, _C_LABEL(cpu_intr) -#endif - jalr k0 - REG_S a3, CALLFRAME_RA(sp) # for debugging - -/* - * Enable interrupts before doing ast(). - * - * On SMP kernels the AST processing might trigger IPI to other processors. - * If that processor is also doing AST processing with interrupts disabled - * then we may deadlock. - */ - mfc0 a0, MIPS_COP_0_STATUS - or a0, a0, MIPS_SR_INT_IE - mtc0 a0, MIPS_COP_0_STATUS - ITLBNOPFIX - -/* - * DO_AST enabled interrupts - */ - DO_AST - -/* - * Restore user registers and return. - */ - CLEAR_STATUS - - GET_CPU_PCPU(k1) - PTR_L k1, PC_CURPCB(k1) - - /* - * Update interrupt mask in saved status register - * Some of interrupts could be disabled by - * intr filters - */ - mfc0 a0, MIPS_COP_0_STATUS - and a0, a0, MIPS_SR_INT_MASK - RESTORE_U_PCB_REG(a1, SR, k1) - and a1, a1, ~MIPS_SR_INT_MASK - or a1, a1, a0 - SAVE_U_PCB_REG(a1, SR, k1) - - RESTORE_U_PCB_REG(s0, S0, k1) - RESTORE_U_PCB_REG(s1, S1, k1) - RESTORE_U_PCB_REG(s2, S2, k1) - RESTORE_U_PCB_REG(s3, S3, k1) - RESTORE_U_PCB_REG(s4, S4, k1) - RESTORE_U_PCB_REG(s5, S5, k1) - RESTORE_U_PCB_REG(s6, S6, k1) - RESTORE_U_PCB_REG(s7, S7, k1) - RESTORE_U_PCB_REG(s8, S8, k1) - RESTORE_U_PCB_REG(t0, MULLO, k1) - RESTORE_U_PCB_REG(t1, MULHI, k1) - RESTORE_U_PCB_REG(t2, PC, k1) - mtlo t0 - mthi t1 - MTC0 t2, MIPS_COP_0_EXC_PC # set return address - RESTORE_U_PCB_REG(v0, V0, k1) - RESTORE_U_PCB_REG(v1, V1, k1) - RESTORE_U_PCB_REG(a0, A0, k1) - RESTORE_U_PCB_REG(a1, A1, k1) - RESTORE_U_PCB_REG(a2, A2, k1) - RESTORE_U_PCB_REG(a3, A3, k1) - RESTORE_U_PCB_REG(t0, T0, k1) - RESTORE_U_PCB_REG(t1, T1, k1) - RESTORE_U_PCB_REG(t2, T2, k1) - RESTORE_U_PCB_REG(t3, T3, k1) - RESTORE_U_PCB_REG(ta0, TA0, k1) - RESTORE_U_PCB_REG(ta1, TA1, k1) - RESTORE_U_PCB_REG(ta2, TA2, k1) - RESTORE_U_PCB_REG(ta3, TA3, k1) - RESTORE_U_PCB_REG(t8, T8, k1) - RESTORE_U_PCB_REG(t9, T9, k1) - RESTORE_U_PCB_REG(gp, GP, k1) - RESTORE_U_PCB_REG(k0, SR, k1) - RESTORE_U_PCB_REG(sp, SP, k1) - RESTORE_U_PCB_REG(ra, RA, k1) - .set noat - RESTORE_U_PCB_REG(AT, AST, k1) - - mtc0 k0, MIPS_COP_0_STATUS # SR with EXL set. - ITLBNOPFIX - sync - eret - .set at -END(MipsUserIntr) - -LEAF_NOPROFILE(MipsTLBInvalidException) - .set push - .set noat - .set noreorder - - MFC0 k0, MIPS_COP_0_BAD_VADDR - PTR_LI k1, VM_MAXUSER_ADDRESS - sltu k1, k0, k1 - bnez k1, 1f - nop - - /* Kernel address. */ - lui k1, %hi(kernel_segmap) # k1=hi of segbase - b 2f - PTR_L k1, %lo(kernel_segmap)(k1) # k1=segment tab base - -1: /* User address. */ - GET_CPU_PCPU(k1) - PTR_L k1, PC_SEGBASE(k1) - -2: /* Validate page directory pointer. */ - beqz k1, 3f - nop - - PTR_SRL k0, SEGSHIFT - PTRSHIFT # k0=seg offset (almost) - beq k1, zero, MipsKernGenException # ==0 -- no seg tab - andi k0, k0, PDEPTRMASK #06: k0=seg offset - PTR_ADDU k1, k0, k1 # k1=seg entry address - PTR_L k1, 0(k1) # k1=seg entry - - /* Validate page table pointer. */ - beqz k1, 3f - nop - -#ifdef __mips_n64 - MFC0 k0, MIPS_COP_0_BAD_VADDR - PTR_SRL k0, PDRSHIFT - PTRSHIFT # k0=pde offset (almost) - beq k1, zero, MipsKernGenException # ==0 -- no pde tab - andi k0, k0, PDEPTRMASK # k0=pde offset - PTR_ADDU k1, k0, k1 # k1=pde entry address - PTR_L k1, 0(k1) # k1=pde entry - - /* Validate pde table pointer. */ - beqz k1, 3f - nop -#endif - MFC0 k0, MIPS_COP_0_BAD_VADDR # k0=bad address (again) - PTR_SRL k0, PAGE_SHIFT - PTESHIFT # k0=VPN - andi k0, k0, PTEMASK # k0=page tab offset - PTR_ADDU k1, k1, k0 # k1=pte address - PTE_L k0, 0(k1) # k0=this PTE - - /* Validate page table entry. */ - andi k0, PTE_V - beqz k0, 3f - nop - - /* Check whether this is an even or odd entry. */ - andi k0, k1, PTESIZE - bnez k0, odd_page - nop - - PTE_L k0, 0(k1) - PTE_L k1, PTESIZE(k1) - CLEAR_PTE_SWBITS(k0) - PTE_MTC0 k0, MIPS_COP_0_TLB_LO0 - COP0_SYNC - CLEAR_PTE_SWBITS(k1) - PTE_MTC0 k1, MIPS_COP_0_TLB_LO1 - COP0_SYNC - - b tlb_insert_entry - nop - -odd_page: - PTE_L k0, -PTESIZE(k1) - PTE_L k1, 0(k1) - CLEAR_PTE_SWBITS(k0) - PTE_MTC0 k0, MIPS_COP_0_TLB_LO0 - COP0_SYNC - CLEAR_PTE_SWBITS(k1) - PTE_MTC0 k1, MIPS_COP_0_TLB_LO1 - COP0_SYNC - -tlb_insert_entry: - tlbp - HAZARD_DELAY - mfc0 k0, MIPS_COP_0_TLB_INDEX - bltz k0, tlb_insert_random - nop - tlbwi - eret - ssnop - -tlb_insert_random: - tlbwr - eret - ssnop - -3: - /* - * Branch to the comprehensive exception processing. - */ - mfc0 k1, MIPS_COP_0_STATUS - andi k1, k1, MIPS_SR_KSU_USER - bnez k1, _C_LABEL(MipsUserGenException) - nop - - /* - * Check for kernel stack overflow. - */ - GET_CPU_PCPU(k1) - PTR_L k0, PC_CURTHREAD(k1) - PTR_L k0, TD_KSTACK(k0) - sltu k0, k0, sp - bnez k0, _C_LABEL(MipsKernGenException) - nop - - /* - * Kernel stack overflow. - * - * Move to a valid stack before we call panic. We use the boot stack - * for this purpose. - */ - GET_CPU_PCPU(k1) - lw k1, PC_CPUID(k1) - sll k1, k1, PAGE_SHIFT + 1 - - PTR_LA k0, _C_LABEL(pcpu_space) - PTR_ADDU k0, PAGE_SIZE * 2 - PTR_ADDU k0, k0, k1 - - /* - * Stash the original value of 'sp' so we can update trapframe later. - * We assume that SAVE_CPU does not trash 'k1'. - */ - move k1, sp - - move sp, k0 - PTR_SUBU sp, sp, KERN_EXC_FRAME_SIZE - - move k0, ra - move ra, zero - REG_S ra, CALLFRAME_RA(sp) /* stop the ddb backtrace right here */ - REG_S zero, CALLFRAME_SP(sp) - move ra, k0 - - SAVE_CPU - - /* - * Now restore the value of 'sp' at the time of the tlb exception in - * the trapframe. - */ - SAVE_REG(k1, SP, sp) - - /* - * Squelch any more overflow checks by setting the stack base to 0. - */ - GET_CPU_PCPU(k1) - PTR_L k0, PC_CURTHREAD(k1) - PTR_S zero, TD_KSTACK(k0) - - move a1, a0 - PANIC("kernel stack overflow - trapframe at %p") - - /* - * This nop is necessary so that the 'ra' remains within the bounds - * of this handler. Otherwise the ddb backtrace code will think that - * the panic() was called from MipsTLBMissException. - */ - .globl MipsKStackOverflow -MipsKStackOverflow: - nop - - .set pop -END(MipsTLBInvalidException) - -/*---------------------------------------------------------------------------- - * - * MipsTLBMissException -- - * - * Handle a TLB miss exception from kernel mode in kernel space. - * The BaddVAddr, Context, and EntryHi registers contain the failed - * virtual address. - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -LEAF_NOPROFILE(MipsTLBMissException) - .set noat - MFC0 k0, MIPS_COP_0_BAD_VADDR # k0=bad address - PTR_LI k1, VM_MAX_KERNEL_ADDRESS # check fault address against - sltu k1, k1, k0 # upper bound of kernel_segmap - bnez k1, MipsKernGenException # out of bound - lui k1, %hi(kernel_segmap) # k1=hi of segbase - PTR_SRL k0, SEGSHIFT - PTRSHIFT # k0=seg offset (almost) - PTR_L k1, %lo(kernel_segmap)(k1) # k1=segment tab base - beq k1, zero, MipsKernGenException # ==0 -- no seg tab - andi k0, k0, PDEPTRMASK #06: k0=seg offset - PTR_ADDU k1, k0, k1 # k1=seg entry address - PTR_L k1, 0(k1) # k1=seg entry - MFC0 k0, MIPS_COP_0_BAD_VADDR # k0=bad address (again) - beq k1, zero, MipsKernGenException # ==0 -- no page table -#ifdef __mips_n64 - PTR_SRL k0, PDRSHIFT - PTRSHIFT # k0=VPN - andi k0, k0, PDEPTRMASK # k0=pde offset - PTR_ADDU k1, k0, k1 # k1=pde entry address - PTR_L k1, 0(k1) # k1=pde entry - MFC0 k0, MIPS_COP_0_BAD_VADDR # k0=bad address (again) - beq k1, zero, MipsKernGenException # ==0 -- no page table -#endif - PTR_SRL k0, PAGE_SHIFT - PTESHIFT # k0=VPN - andi k0, k0, PTE2MASK # k0=page tab offset - PTR_ADDU k1, k1, k0 # k1=pte address - PTE_L k0, 0(k1) # k0=lo0 pte - PTE_L k1, PTESIZE(k1) # k1=lo1 pte - CLEAR_PTE_SWBITS(k0) - PTE_MTC0 k0, MIPS_COP_0_TLB_LO0 # lo0 is loaded - COP0_SYNC - CLEAR_PTE_SWBITS(k1) - PTE_MTC0 k1, MIPS_COP_0_TLB_LO1 # lo1 is loaded - COP0_SYNC - tlbwr # write to tlb - HAZARD_DELAY - eret # return from exception - .set at -END(MipsTLBMissException) - -/*---------------------------------------------------------------------------- - * - * MipsFPTrap -- - * - * Handle a floating point Trap. - * - * MipsFPTrap(statusReg, causeReg, pc) - * unsigned statusReg; - * unsigned causeReg; - * unsigned pc; - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -NESTED(MipsFPTrap, CALLFRAME_SIZ, ra) - .set push - .set hardfloat - PTR_SUBU sp, sp, CALLFRAME_SIZ - mfc0 t0, MIPS_COP_0_STATUS - HAZARD_DELAY - REG_S ra, CALLFRAME_RA(sp) - .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) - -#if defined(__mips_n32) || defined(__mips_n64) - or t1, t0, MIPS_SR_COP_1_BIT | MIPS_SR_FR -#else - or t1, t0, MIPS_SR_COP_1_BIT -#endif - mtc0 t1, MIPS_COP_0_STATUS - HAZARD_DELAY - ITLBNOPFIX - cfc1 t1, MIPS_FPU_CSR # stall til FP done - cfc1 t1, MIPS_FPU_CSR # now get status - nop - sll t2, t1, (31 - 17) # unimplemented operation? - bgez t2, 3f # no, normal trap - nop -/* - * We got an unimplemented operation trap so - * fetch the instruction, compute the next PC and emulate the instruction. - */ - bgez a1, 1f # Check the branch delay bit. - nop -/* - * The instruction is in the branch delay slot so the branch will have to - * be emulated to get the resulting PC. - */ - PTR_S a2, CALLFRAME_SIZ + 8(sp) - GET_CPU_PCPU(a0) -#mips64 unsafe? - PTR_L a0, PC_CURPCB(a0) - PTR_ADDU a0, a0, U_PCB_REGS # first arg is ptr to CPU registers - move a1, a2 # second arg is instruction PC - move a2, t1 # third arg is floating point CSR - PTR_LA t3, _C_LABEL(MipsEmulateBranch) # compute PC after branch - jalr t3 # compute PC after branch - move a3, zero # fourth arg is FALSE -/* - * Now load the floating-point instruction in the branch delay slot - * to be emulated. - */ - PTR_L a2, CALLFRAME_SIZ + 8(sp) # restore EXC pc - b 2f - lw a0, 4(a2) # a0 = coproc instruction -/* - * This is not in the branch delay slot so calculate the resulting - * PC (epc + 4) into v0 and continue to MipsEmulateFP(). - */ -1: - lw a0, 0(a2) # a0 = coproc instruction -#xxx mips64 unsafe? - PTR_ADDU v0, a2, 4 # v0 = next pc -2: - GET_CPU_PCPU(t2) - PTR_L t2, PC_CURPCB(t2) - SAVE_U_PCB_REG(v0, PC, t2) # save new pc -/* - * Check to see if the instruction to be emulated is a floating-point - * instruction. - */ - srl a3, a0, MIPS_OPCODE_SHIFT - beq a3, MIPS_OPCODE_C1, 4f # this should never fail - nop -/* - * Send a floating point exception signal to the current process. - */ -3: - GET_CPU_PCPU(a0) - PTR_L a0, PC_CURTHREAD(a0) # get current thread - cfc1 a2, MIPS_FPU_CSR # code = FP execptions - ctc1 zero, MIPS_FPU_CSR # Clear exceptions - PTR_LA t3, _C_LABEL(trapsignal) - jalr t3 - li a1, SIGFPE - b FPReturn - nop - -/* - * Finally, we can call MipsEmulateFP() where a0 is the instruction to emulate. - */ -4: - PTR_LA t3, _C_LABEL(MipsEmulateFP) - jalr t3 - nop - -/* - * Turn off the floating point coprocessor and return. - */ -FPReturn: - mfc0 t0, MIPS_COP_0_STATUS - PTR_L ra, CALLFRAME_RA(sp) - and t0, t0, ~MIPS_SR_COP_1_BIT - mtc0 t0, MIPS_COP_0_STATUS - ITLBNOPFIX - j ra - PTR_ADDU sp, sp, CALLFRAME_SIZ - .set pop -END(MipsFPTrap) - -/* - * Vector to real handler in KSEG1. - */ - .text -VECTOR(MipsCache, unknown) - PTR_LA k0, _C_LABEL(MipsCacheException) - li k1, MIPS_KSEG0_PHYS_MASK - and k0, k1 - PTR_LI k1, MIPS_KSEG1_START - or k0, k1 - j k0 - nop -VECTOR_END(MipsCache) - - .set at - - -/* - * Panic on cache errors. A lot more could be done to recover - * from some types of errors but it is tricky. - */ -NESTED_NOPROFILE(MipsCacheException, KERN_EXC_FRAME_SIZE, ra) - .set noat - .mask 0x80000000, -4 - PTR_LA k0, _C_LABEL(panic) # return to panic - PTR_LA a0, 9f # panicstr - MFC0 a1, MIPS_COP_0_ERROR_PC - mfc0 a2, MIPS_COP_0_CACHE_ERR # 3rd arg cache error - - MTC0 k0, MIPS_COP_0_ERROR_PC # set return address - - mfc0 k0, MIPS_COP_0_STATUS # restore status - li k1, MIPS_SR_DIAG_PE # ignore further errors - or k0, k1 - mtc0 k0, MIPS_COP_0_STATUS # restore status - COP0_SYNC - - eret - - MSG("cache error @ EPC 0x%x CachErr 0x%x"); - .set at -END(MipsCacheException) diff --git a/sys/mips/mips/fp.S b/sys/mips/mips/fp.S deleted file mode 100644 index 8fb410f44c1..00000000000 --- a/sys/mips/mips/fp.S +++ /dev/null @@ -1,3609 +0,0 @@ -/* $OpenBSD: fp.S,v 1.2 1998/03/16 09:03:31 pefo Exp $ */ -/*- - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)fp.s 8.1 (Berkeley) 6/10/93 - * JNPR: fp.S,v 1.1 2006/08/07 05:38:57 katta - */ - -/* - * Standard header stuff. - */ - -#include -#include -#include - -#include "assym.inc" - -#define SEXP_INF 0xff -#define DEXP_INF 0x7ff -#define SEXP_BIAS 127 -#define DEXP_BIAS 1023 -#define SEXP_MIN -126 -#define DEXP_MIN -1022 -#define SEXP_MAX 127 -#define DEXP_MAX 1023 -#define WEXP_MAX 30 /* maximum unbiased exponent for int */ -#define WEXP_MIN -1 /* minimum unbiased exponent for int */ -#define SFRAC_BITS 23 -#define DFRAC_BITS 52 -#define SIMPL_ONE 0x00800000 -#define DIMPL_ONE 0x00100000 -#define SLEAD_ZEROS 31 - 23 -#define DLEAD_ZEROS 31 - 20 -#define STICKYBIT 1 -#define GUARDBIT 0x80000000 -#define SSIGNAL_NAN 0x00400000 -#define DSIGNAL_NAN 0x00080000 -#define SQUIET_NAN 0x003fffff -#define DQUIET_NAN0 0x0007ffff -#define DQUIET_NAN1 0xffffffff -#define INT_MIN 0x80000000 -#define INT_MAX 0x7fffffff - -#define COND_UNORDERED 0x1 -#define COND_EQUAL 0x2 -#define COND_LESS 0x4 -#define COND_SIGNAL 0x8 - -.set hardfloat - -/*---------------------------------------------------------------------------- - * - * MipsEmulateFP -- - * - * Emulate unimplemented floating point operations. - * This routine should only be called by MipsFPInterrupt(). - * - * MipsEmulateFP(instr) - * unsigned instr; - * - * Results: - * None. - * - * Side effects: - * Floating point registers are modified according to instruction. - * - *---------------------------------------------------------------------------- - */ -NESTED(MipsEmulateFP, CALLFRAME_SIZ, ra) - subu sp, sp, CALLFRAME_SIZ - sw ra, CALLFRAME_RA(sp) -/* - * Decode the FMT field (bits 24-21) and FUNCTION field (bits 5-0). - */ - srl v0, a0, 21 - 2 # get FMT field - and v0, v0, 0xF << 2 # mask FMT field - and v1, a0, 0x3F # mask FUNC field - sll v1, v1, 5 # align for table lookup - bgt v0, 4 << 2, ill # illegal format - - or v1, v1, v0 - cfc1 a1, MIPS_FPU_CSR # get exception register - lw a3, func_fmt_tbl(v1) # switch on FUNC & FMT - and a1, a1, ~MIPS_FPU_EXCEPTION_UNIMPL # clear exception - ctc1 a1, MIPS_FPU_CSR - j a3 - - .rdata -func_fmt_tbl: - .word add_s # 0 - .word add_d # 0 - .word ill # 0 - .word ill # 0 - .word ill # 0 - .word ill # 0 - .word ill # 0 - .word ill # 0 - .word sub_s # 1 - .word sub_d # 1 - .word ill # 1 - .word ill # 1 - .word ill # 1 - .word ill # 1 - .word ill # 1 - .word ill # 1 - .word mul_s # 2 - .word mul_d # 2 - .word ill # 2 - .word ill # 2 - .word ill # 2 - .word ill # 2 - .word ill # 2 - .word ill # 2 - .word div_s # 3 - .word div_d # 3 - .word ill # 3 - .word ill # 3 - .word ill # 3 - .word ill # 3 - .word ill # 3 - .word ill # 3 - .word ill # 4 - .word ill # 4 - .word ill # 4 - .word ill # 4 - .word ill # 4 - .word ill # 4 - .word ill # 4 - .word ill # 4 - .word abs_s # 5 - .word abs_d # 5 - .word ill # 5 - .word ill # 5 - .word ill # 5 - .word ill # 5 - .word ill # 5 - .word ill # 5 - .word mov_s # 6 - .word mov_d # 6 - .word ill # 6 - .word ill # 6 - .word ill # 6 - .word ill # 6 - .word ill # 6 - .word ill # 6 - .word neg_s # 7 - .word neg_d # 7 - .word ill # 7 - .word ill # 7 - .word ill # 7 - .word ill # 7 - .word ill # 7 - .word ill # 7 - .word ill # 8 - .word ill # 8 - .word ill # 8 - .word ill # 8 - .word ill # 8 - .word ill # 8 - .word ill # 8 - .word ill # 8 - .word ill # 9 - .word ill # 9 - .word ill # 9 - .word ill # 9 - .word ill # 9 - .word ill # 9 - .word ill # 9 - .word ill # 9 - .word ill # 10 - .word ill # 10 - .word ill # 10 - .word ill # 10 - .word ill # 10 - .word ill # 10 - .word ill # 10 - .word ill # 10 - .word ill # 11 - .word ill # 11 - .word ill # 11 - .word ill # 11 - .word ill # 11 - .word ill # 11 - .word ill # 11 - .word ill # 11 - .word ill # 12 - .word ill # 12 - .word ill # 12 - .word ill # 12 - .word ill # 12 - .word ill # 12 - .word ill # 12 - .word ill # 12 - .word ill # 13 - .word ill # 13 - .word ill # 13 - .word ill # 13 - .word ill # 13 - .word ill # 13 - .word ill # 13 - .word ill # 13 - .word ill # 14 - .word ill # 14 - .word ill # 14 - .word ill # 14 - .word ill # 14 - .word ill # 14 - .word ill # 14 - .word ill # 14 - .word ill # 15 - .word ill # 15 - .word ill # 15 - .word ill # 15 - .word ill # 15 - .word ill # 15 - .word ill # 15 - .word ill # 15 - .word ill # 16 - .word ill # 16 - .word ill # 16 - .word ill # 16 - .word ill # 16 - .word ill # 16 - .word ill # 16 - .word ill # 16 - .word ill # 17 - .word ill # 17 - .word ill # 17 - .word ill # 17 - .word ill # 17 - .word ill # 17 - .word ill # 17 - .word ill # 17 - .word ill # 18 - .word ill # 18 - .word ill # 18 - .word ill # 18 - .word ill # 18 - .word ill # 18 - .word ill # 18 - .word ill # 18 - .word ill # 19 - .word ill # 19 - .word ill # 19 - .word ill # 19 - .word ill # 19 - .word ill # 19 - .word ill # 19 - .word ill # 19 - .word ill # 20 - .word ill # 20 - .word ill # 20 - .word ill # 20 - .word ill # 20 - .word ill # 20 - .word ill # 20 - .word ill # 20 - .word ill # 21 - .word ill # 21 - .word ill # 21 - .word ill # 21 - .word ill # 21 - .word ill # 21 - .word ill # 21 - .word ill # 21 - .word ill # 22 - .word ill # 22 - .word ill # 22 - .word ill # 22 - .word ill # 22 - .word ill # 22 - .word ill # 22 - .word ill # 22 - .word ill # 23 - .word ill # 23 - .word ill # 23 - .word ill # 23 - .word ill # 23 - .word ill # 23 - .word ill # 23 - .word ill # 23 - .word ill # 24 - .word ill # 24 - .word ill # 24 - .word ill # 24 - .word ill # 24 - .word ill # 24 - .word ill # 24 - .word ill # 24 - .word ill # 25 - .word ill # 25 - .word ill # 25 - .word ill # 25 - .word ill # 25 - .word ill # 25 - .word ill # 25 - .word ill # 25 - .word ill # 26 - .word ill # 26 - .word ill # 26 - .word ill # 26 - .word ill # 26 - .word ill # 26 - .word ill # 26 - .word ill # 26 - .word ill # 27 - .word ill # 27 - .word ill # 27 - .word ill # 27 - .word ill # 27 - .word ill # 27 - .word ill # 27 - .word ill # 27 - .word ill # 28 - .word ill # 28 - .word ill # 28 - .word ill # 28 - .word ill # 28 - .word ill # 28 - .word ill # 28 - .word ill # 28 - .word ill # 29 - .word ill # 29 - .word ill # 29 - .word ill # 29 - .word ill # 29 - .word ill # 29 - .word ill # 29 - .word ill # 29 - .word ill # 30 - .word ill # 30 - .word ill # 30 - .word ill # 30 - .word ill # 30 - .word ill # 30 - .word ill # 30 - .word ill # 30 - .word ill # 31 - .word ill # 31 - .word ill # 31 - .word ill # 31 - .word ill # 31 - .word ill # 31 - .word ill # 31 - .word ill # 31 - .word ill # 32 - .word cvt_s_d # 32 - .word ill # 32 - .word ill # 32 - .word cvt_s_w # 32 - .word ill # 32 - .word ill # 32 - .word ill # 32 - .word cvt_d_s # 33 - .word ill # 33 - .word ill # 33 - .word ill # 33 - .word cvt_d_w # 33 - .word ill # 33 - .word ill # 33 - .word ill # 33 - .word ill # 34 - .word ill # 34 - .word ill # 34 - .word ill # 34 - .word ill # 34 - .word ill # 34 - .word ill # 34 - .word ill # 34 - .word ill # 35 - .word ill # 35 - .word ill # 35 - .word ill # 35 - .word ill # 35 - .word ill # 35 - .word ill # 35 - .word ill # 35 - .word cvt_w_s # 36 - .word cvt_w_d # 36 - .word ill # 36 - .word ill # 36 - .word ill # 36 - .word ill # 36 - .word ill # 36 - .word ill # 36 - .word ill # 37 - .word ill # 37 - .word ill # 37 - .word ill # 37 - .word ill # 37 - .word ill # 37 - .word ill # 37 - .word ill # 37 - .word ill # 38 - .word ill # 38 - .word ill # 38 - .word ill # 38 - .word ill # 38 - .word ill # 38 - .word ill # 38 - .word ill # 38 - .word ill # 39 - .word ill # 39 - .word ill # 39 - .word ill # 39 - .word ill # 39 - .word ill # 39 - .word ill # 39 - .word ill # 39 - .word ill # 40 - .word ill # 40 - .word ill # 40 - .word ill # 40 - .word ill # 40 - .word ill # 40 - .word ill # 40 - .word ill # 40 - .word ill # 41 - .word ill # 41 - .word ill # 41 - .word ill # 41 - .word ill # 41 - .word ill # 41 - .word ill # 41 - .word ill # 41 - .word ill # 42 - .word ill # 42 - .word ill # 42 - .word ill # 42 - .word ill # 42 - .word ill # 42 - .word ill # 42 - .word ill # 42 - .word ill # 43 - .word ill # 43 - .word ill # 43 - .word ill # 43 - .word ill # 43 - .word ill # 43 - .word ill # 43 - .word ill # 43 - .word ill # 44 - .word ill # 44 - .word ill # 44 - .word ill # 44 - .word ill # 44 - .word ill # 44 - .word ill # 44 - .word ill # 44 - .word ill # 45 - .word ill # 45 - .word ill # 45 - .word ill # 45 - .word ill # 45 - .word ill # 45 - .word ill # 45 - .word ill # 45 - .word ill # 46 - .word ill # 46 - .word ill # 46 - .word ill # 46 - .word ill # 46 - .word ill # 46 - .word ill # 46 - .word ill # 46 - .word ill # 47 - .word ill # 47 - .word ill # 47 - .word ill # 47 - .word ill # 47 - .word ill # 47 - .word ill # 47 - .word ill # 47 - .word cmp_s # 48 - .word cmp_d # 48 - .word ill # 48 - .word ill # 48 - .word ill # 48 - .word ill # 48 - .word ill # 48 - .word ill # 48 - .word cmp_s # 49 - .word cmp_d # 49 - .word ill # 49 - .word ill # 49 - .word ill # 49 - .word ill # 49 - .word ill # 49 - .word ill # 49 - .word cmp_s # 50 - .word cmp_d # 50 - .word ill # 50 - .word ill # 50 - .word ill # 50 - .word ill # 50 - .word ill # 50 - .word ill # 50 - .word cmp_s # 51 - .word cmp_d # 51 - .word ill # 51 - .word ill # 51 - .word ill # 51 - .word ill # 51 - .word ill # 51 - .word ill # 51 - .word cmp_s # 52 - .word cmp_d # 52 - .word ill # 52 - .word ill # 52 - .word ill # 52 - .word ill # 52 - .word ill # 52 - .word ill # 52 - .word cmp_s # 53 - .word cmp_d # 53 - .word ill # 53 - .word ill # 53 - .word ill # 53 - .word ill # 53 - .word ill # 53 - .word ill # 53 - .word cmp_s # 54 - .word cmp_d # 54 - .word ill # 54 - .word ill # 54 - .word ill # 54 - .word ill # 54 - .word ill # 54 - .word ill # 54 - .word cmp_s # 55 - .word cmp_d # 55 - .word ill # 55 - .word ill # 55 - .word ill # 55 - .word ill # 55 - .word ill # 55 - .word ill # 55 - .word cmp_s # 56 - .word cmp_d # 56 - .word ill # 56 - .word ill # 56 - .word ill # 56 - .word ill # 56 - .word ill # 56 - .word ill # 56 - .word cmp_s # 57 - .word cmp_d # 57 - .word ill # 57 - .word ill # 57 - .word ill # 57 - .word ill # 57 - .word ill # 57 - .word ill # 57 - .word cmp_s # 58 - .word cmp_d # 58 - .word ill # 58 - .word ill # 58 - .word ill # 58 - .word ill # 58 - .word ill # 58 - .word ill # 58 - .word cmp_s # 59 - .word cmp_d # 59 - .word ill # 59 - .word ill # 59 - .word ill # 59 - .word ill # 59 - .word ill # 59 - .word ill # 59 - .word cmp_s # 60 - .word cmp_d # 60 - .word ill # 60 - .word ill # 60 - .word ill # 60 - .word ill # 60 - .word ill # 60 - .word ill # 60 - .word cmp_s # 61 - .word cmp_d # 61 - .word ill # 61 - .word ill # 61 - .word ill # 61 - .word ill # 61 - .word ill # 61 - .word ill # 61 - .word cmp_s # 62 - .word cmp_d # 62 - .word ill # 62 - .word ill # 62 - .word ill # 62 - .word ill # 62 - .word ill # 62 - .word ill # 62 - .word cmp_s # 63 - .word cmp_d # 63 - .word ill # 63 - .word ill # 63 - .word ill # 63 - .word ill # 63 - .word ill # 63 - .word ill # 63 - .text - -/* - * Single precision subtract. - */ -sub_s: - jal get_ft_fs_s - xor ta0, ta0, 1 # negate FT sign bit - b add_sub_s -/* - * Single precision add. - */ -add_s: - jal get_ft_fs_s -add_sub_s: - bne t1, SEXP_INF, 1f # is FS an infinity? - bne ta1, SEXP_INF, result_fs_s # if FT is not inf, result=FS - bne t2, zero, result_fs_s # if FS is NAN, result is FS - bne ta2, zero, result_ft_s # if FT is NAN, result is FT - bne t0, ta0, invalid_s # both infinities same sign? - b result_fs_s # result is in FS -1: - beq ta1, SEXP_INF, result_ft_s # if FT is inf, result=FT - bne t1, zero, 4f # is FS a denormalized num? - beq t2, zero, 3f # is FS zero? - bne ta1, zero, 2f # is FT a denormalized num? - beq ta2, zero, result_fs_s # FT is zero, result=FS - jal renorm_fs_s - jal renorm_ft_s - b 5f -2: - jal renorm_fs_s - subu ta1, ta1, SEXP_BIAS # unbias FT exponent - or ta2, ta2, SIMPL_ONE # set implied one bit - b 5f -3: - bne ta1, zero, result_ft_s # if FT != 0, result=FT - bne ta2, zero, result_ft_s - and v0, a1, MIPS_FPU_ROUNDING_BITS # get rounding mode - bne v0, MIPS_FPU_ROUND_RM, 1f # round to -infinity? - or t0, t0, ta0 # compute result sign - b result_fs_s -1: - and t0, t0, ta0 # compute result sign - b result_fs_s -4: - bne ta1, zero, 2f # is FT a denormalized num? - beq ta2, zero, result_fs_s # FT is zero, result=FS - subu t1, t1, SEXP_BIAS # unbias FS exponent - or t2, t2, SIMPL_ONE # set implied one bit - jal renorm_ft_s - b 5f -2: - subu t1, t1, SEXP_BIAS # unbias FS exponent - or t2, t2, SIMPL_ONE # set implied one bit - subu ta1, ta1, SEXP_BIAS # unbias FT exponent - or ta2, ta2, SIMPL_ONE # set implied one bit -/* - * Perform the addition. - */ -5: - move t8, zero # no shifted bits (sticky reg) - beq t1, ta1, 4f # no shift needed - subu v0, t1, ta1 # v0 = difference of exponents - move v1, v0 # v1 = abs(difference) - bge v0, zero, 1f - negu v1 -1: - ble v1, SFRAC_BITS+2, 2f # is difference too great? - li t8, STICKYBIT # set the sticky bit - bge v0, zero, 1f # check which exp is larger - move t1, ta1 # result exp is FTs - move t2, zero # FSs fraction shifted is zero - b 4f -1: - move ta2, zero # FTs fraction shifted is zero - b 4f -2: - li t9, 32 # compute 32 - abs(exp diff) - subu t9, t9, v1 - bgt v0, zero, 3f # if FS > FT, shift FTs frac - move t1, ta1 # FT > FS, result exp is FTs - sll t8, t2, t9 # save bits shifted out - srl t2, t2, v1 # shift FSs fraction - b 4f -3: - sll t8, ta2, t9 # save bits shifted out - srl ta2, ta2, v1 # shift FTs fraction -4: - bne t0, ta0, 1f # if signs differ, subtract - addu t2, t2, ta2 # add fractions - b norm_s -1: - blt t2, ta2, 3f # subtract larger from smaller - bne t2, ta2, 2f # if same, result=0 - move t1, zero # result=0 - move t2, zero - and v0, a1, MIPS_FPU_ROUNDING_BITS # get rounding mode - bne v0, MIPS_FPU_ROUND_RM, 1f # round to -infinity? - or t0, t0, ta0 # compute result sign - b result_fs_s -1: - and t0, t0, ta0 # compute result sign - b result_fs_s -2: - sltu t9, zero, t8 # compute t2:zero - ta2:t8 - subu t8, zero, t8 - subu t2, t2, ta2 # subtract fractions - subu t2, t2, t9 # subtract barrow - b norm_s -3: - move t0, ta0 # sign of result = FTs - sltu t9, zero, t8 # compute ta2:zero - t2:t8 - subu t8, zero, t8 - subu t2, ta2, t2 # subtract fractions - subu t2, t2, t9 # subtract barrow - b norm_s - -/* - * Double precision subtract. - */ -sub_d: - jal get_ft_fs_d - xor ta0, ta0, 1 # negate sign bit - b add_sub_d -/* - * Double precision add. - */ -add_d: - jal get_ft_fs_d -add_sub_d: - bne t1, DEXP_INF, 1f # is FS an infinity? - bne ta1, DEXP_INF, result_fs_d # if FT is not inf, result=FS - bne t2, zero, result_fs_d # if FS is NAN, result is FS - bne t3, zero, result_fs_d - bne ta2, zero, result_ft_d # if FT is NAN, result is FT - bne ta3, zero, result_ft_d - bne t0, ta0, invalid_d # both infinities same sign? - b result_fs_d # result is in FS -1: - beq ta1, DEXP_INF, result_ft_d # if FT is inf, result=FT - bne t1, zero, 4f # is FS a denormalized num? - bne t2, zero, 1f # is FS zero? - beq t3, zero, 3f -1: - bne ta1, zero, 2f # is FT a denormalized num? - bne ta2, zero, 1f - beq ta3, zero, result_fs_d # FT is zero, result=FS -1: - jal renorm_fs_d - jal renorm_ft_d - b 5f -2: - jal renorm_fs_d - subu ta1, ta1, DEXP_BIAS # unbias FT exponent - or ta2, ta2, DIMPL_ONE # set implied one bit - b 5f -3: - bne ta1, zero, result_ft_d # if FT != 0, result=FT - bne ta2, zero, result_ft_d - bne ta3, zero, result_ft_d - and v0, a1, MIPS_FPU_ROUNDING_BITS # get rounding mode - bne v0, MIPS_FPU_ROUND_RM, 1f # round to -infinity? - or t0, t0, ta0 # compute result sign - b result_fs_d -1: - and t0, t0, ta0 # compute result sign - b result_fs_d -4: - bne ta1, zero, 2f # is FT a denormalized num? - bne ta2, zero, 1f - beq ta3, zero, result_fs_d # FT is zero, result=FS -1: - subu t1, t1, DEXP_BIAS # unbias FS exponent - or t2, t2, DIMPL_ONE # set implied one bit - jal renorm_ft_d - b 5f -2: - subu t1, t1, DEXP_BIAS # unbias FS exponent - or t2, t2, DIMPL_ONE # set implied one bit - subu ta1, ta1, DEXP_BIAS # unbias FT exponent - or ta2, ta2, DIMPL_ONE # set implied one bit -/* - * Perform the addition. - */ -5: - move t8, zero # no shifted bits (sticky reg) - beq t1, ta1, 4f # no shift needed - subu v0, t1, ta1 # v0 = difference of exponents - move v1, v0 # v1 = abs(difference) - bge v0, zero, 1f - negu v1 -1: - ble v1, DFRAC_BITS+2, 2f # is difference too great? - li t8, STICKYBIT # set the sticky bit - bge v0, zero, 1f # check which exp is larger - move t1, ta1 # result exp is FTs - move t2, zero # FSs fraction shifted is zero - move t3, zero - b 4f -1: - move ta2, zero # FTs fraction shifted is zero - move ta3, zero - b 4f -2: - li t9, 32 - bge v0, zero, 3f # if FS > FT, shift FTs frac - move t1, ta1 # FT > FS, result exp is FTs - blt v1, t9, 1f # shift right by < 32? - subu v1, v1, t9 - subu t9, t9, v1 - sll t8, t2, t9 # save bits shifted out - sltu t9, zero, t3 # dont lose any one bits - or t8, t8, t9 # save sticky bit - srl t3, t2, v1 # shift FSs fraction - move t2, zero - b 4f -1: - subu t9, t9, v1 - sll t8, t3, t9 # save bits shifted out - srl t3, t3, v1 # shift FSs fraction - sll t9, t2, t9 # save bits shifted out of t2 - or t3, t3, t9 # and put into t3 - srl t2, t2, v1 - b 4f -3: - blt v1, t9, 1f # shift right by < 32? - subu v1, v1, t9 - subu t9, t9, v1 - sll t8, ta2, t9 # save bits shifted out - srl ta3, ta2, v1 # shift FTs fraction - move ta2, zero - b 4f -1: - subu t9, t9, v1 - sll t8, ta3, t9 # save bits shifted out - srl ta3, ta3, v1 # shift FTs fraction - sll t9, ta2, t9 # save bits shifted out of t2 - or ta3, ta3, t9 # and put into t3 - srl ta2, ta2, v1 -4: - bne t0, ta0, 1f # if signs differ, subtract - addu t3, t3, ta3 # add fractions - sltu t9, t3, ta3 # compute carry - addu t2, t2, ta2 # add fractions - addu t2, t2, t9 # add carry - b norm_d -1: - blt t2, ta2, 3f # subtract larger from smaller - bne t2, ta2, 2f - bltu t3, ta3, 3f - bne t3, ta3, 2f # if same, result=0 - move t1, zero # result=0 - move t2, zero - move t3, zero - and v0, a1, MIPS_FPU_ROUNDING_BITS # get rounding mode - bne v0, MIPS_FPU_ROUND_RM, 1f # round to -infinity? - or t0, t0, ta0 # compute result sign - b result_fs_d -1: - and t0, t0, ta0 # compute result sign - b result_fs_d -2: - beq t8, zero, 1f # compute t2:t3:zero - ta2:ta3:t8 - subu t8, zero, t8 - sltu v0, t3, 1 # compute barrow out - subu t3, t3, 1 # subtract barrow - subu t2, t2, v0 -1: - sltu v0, t3, ta3 - subu t3, t3, ta3 # subtract fractions - subu t2, t2, ta2 # subtract fractions - subu t2, t2, v0 # subtract barrow - b norm_d -3: - move t0, ta0 # sign of result = FTs - beq t8, zero, 1f # compute ta2:ta3:zero - t2:t3:t8 - subu t8, zero, t8 - sltu v0, ta3, 1 # compute barrow out - subu ta3, ta3, 1 # subtract barrow - subu ta2, ta2, v0 -1: - sltu v0, ta3, t3 - subu t3, ta3, t3 # subtract fractions - subu t2, ta2, t2 # subtract fractions - subu t2, t2, v0 # subtract barrow - b norm_d - -/* - * Single precision multiply. - */ -mul_s: - jal get_ft_fs_s - xor t0, t0, ta0 # compute sign of result - move ta0, t0 - bne t1, SEXP_INF, 2f # is FS an infinity? - bne t2, zero, result_fs_s # if FS is a NAN, result=FS - bne ta1, SEXP_INF, 1f # FS is inf, is FT an infinity? - bne ta2, zero, result_ft_s # if FT is a NAN, result=FT - b result_fs_s # result is infinity -1: - bne ta1, zero, result_fs_s # inf * zero? if no, result=FS - bne ta2, zero, result_fs_s - b invalid_s # infinity * zero is invalid -2: - bne ta1, SEXP_INF, 1f # FS != inf, is FT an infinity? - bne t1, zero, result_ft_s # zero * inf? if no, result=FT - bne t2, zero, result_ft_s - bne ta2, zero, result_ft_s # if FT is a NAN, result=FT - b invalid_s # zero * infinity is invalid -1: - bne t1, zero, 1f # is FS zero? - beq t2, zero, result_fs_s # result is zero - jal renorm_fs_s - b 2f -1: - subu t1, t1, SEXP_BIAS # unbias FS exponent - or t2, t2, SIMPL_ONE # set implied one bit -2: - bne ta1, zero, 1f # is FT zero? - beq ta2, zero, result_ft_s # result is zero - jal renorm_ft_s - b 2f -1: - subu ta1, ta1, SEXP_BIAS # unbias FT exponent - or ta2, ta2, SIMPL_ONE # set implied one bit -2: - addu t1, t1, ta1 # compute result exponent - addu t1, t1, 9 # account for binary point - multu t2, ta2 # multiply fractions - mflo t8 - mfhi t2 - b norm_s - -/* - * Double precision multiply. - */ -mul_d: - jal get_ft_fs_d - xor t0, t0, ta0 # compute sign of result - move ta0, t0 - bne t1, DEXP_INF, 2f # is FS an infinity? - bne t2, zero, result_fs_d # if FS is a NAN, result=FS - bne t3, zero, result_fs_d - bne ta1, DEXP_INF, 1f # FS is inf, is FT an infinity? - bne ta2, zero, result_ft_d # if FT is a NAN, result=FT - bne ta3, zero, result_ft_d - b result_fs_d # result is infinity -1: - bne ta1, zero, result_fs_d # inf * zero? if no, result=FS - bne ta2, zero, result_fs_d - bne ta3, zero, result_fs_d - b invalid_d # infinity * zero is invalid -2: - bne ta1, DEXP_INF, 1f # FS != inf, is FT an infinity? - bne t1, zero, result_ft_d # zero * inf? if no, result=FT - bne t2, zero, result_ft_d # if FS is a NAN, result=FS - bne t3, zero, result_ft_d - bne ta2, zero, result_ft_d # if FT is a NAN, result=FT - bne ta3, zero, result_ft_d - b invalid_d # zero * infinity is invalid -1: - bne t1, zero, 2f # is FS zero? - bne t2, zero, 1f - beq t3, zero, result_fs_d # result is zero -1: - jal renorm_fs_d - b 3f -2: - subu t1, t1, DEXP_BIAS # unbias FS exponent - or t2, t2, DIMPL_ONE # set implied one bit -3: - bne ta1, zero, 2f # is FT zero? - bne ta2, zero, 1f - beq ta3, zero, result_ft_d # result is zero -1: - jal renorm_ft_d - b 3f -2: - subu ta1, ta1, DEXP_BIAS # unbias FT exponent - or ta2, ta2, DIMPL_ONE # set implied one bit -3: - addu t1, t1, ta1 # compute result exponent - addu t1, t1, 12 # ??? - multu t3, ta3 # multiply fractions (low * low) - move ta0, t2 # free up t2,t3 for result - move ta1, t3 - mflo a3 # save low order bits - mfhi t8 - not v0, t8 - multu ta0, ta3 # multiply FS(high) * FT(low) - mflo v1 - mfhi t3 # init low result - sltu v0, v0, v1 # compute carry - addu t8, v1 - multu ta1, ta2 # multiply FS(low) * FT(high) - addu t3, t3, v0 # add carry - not v0, t8 - mflo v1 - mfhi t2 - sltu v0, v0, v1 - addu t8, v1 - multu ta0, ta2 # multiply FS(high) * FT(high) - addu t3, v0 - not v1, t3 - sltu v1, v1, t2 - addu t3, t2 - not v0, t3 - mfhi t2 - addu t2, v1 - mflo v1 - sltu v0, v0, v1 - addu t2, v0 - addu t3, v1 - sltu a3, zero, a3 # reduce t8,a3 to just t8 - or t8, a3 - b norm_d - -/* - * Single precision divide. - */ -div_s: - jal get_ft_fs_s - xor t0, t0, ta0 # compute sign of result - move ta0, t0 - bne t1, SEXP_INF, 1f # is FS an infinity? - bne t2, zero, result_fs_s # if FS is NAN, result is FS - bne ta1, SEXP_INF, result_fs_s # is FT an infinity? - bne ta2, zero, result_ft_s # if FT is NAN, result is FT - b invalid_s # infinity/infinity is invalid -1: - bne ta1, SEXP_INF, 1f # is FT an infinity? - bne ta2, zero, result_ft_s # if FT is NAN, result is FT - move t1, zero # x / infinity is zero - move t2, zero - b result_fs_s -1: - bne t1, zero, 2f # is FS zero? - bne t2, zero, 1f - bne ta1, zero, result_fs_s # FS=zero, is FT zero? - beq ta2, zero, invalid_s # 0 / 0 - b result_fs_s # result = zero -1: - jal renorm_fs_s - b 3f -2: - subu t1, t1, SEXP_BIAS # unbias FS exponent - or t2, t2, SIMPL_ONE # set implied one bit -3: - bne ta1, zero, 2f # is FT zero? - bne ta2, zero, 1f - or a1, a1, MIPS_FPU_EXCEPTION_DIV0 | MIPS_FPU_STICKY_DIV0 - and v0, a1, MIPS_FPU_ENABLE_DIV0 # trap enabled? - bne v0, zero, fpe_trap - ctc1 a1, MIPS_FPU_CSR # save exceptions - li t1, SEXP_INF # result is infinity - move t2, zero - b result_fs_s -1: - jal renorm_ft_s - b 3f -2: - subu ta1, ta1, SEXP_BIAS # unbias FT exponent - or ta2, ta2, SIMPL_ONE # set implied one bit -3: - subu t1, t1, ta1 # compute exponent - subu t1, t1, 3 # compensate for result position - li v0, SFRAC_BITS+3 # number of bits to divide - move t8, t2 # init dividend - move t2, zero # init result -1: - bltu t8, ta2, 3f # is dividend >= divisor? -2: - subu t8, t8, ta2 # subtract divisor from dividend - or t2, t2, 1 # remember that we did - bne t8, zero, 3f # if not done, continue - sll t2, t2, v0 # shift result to final position - b norm_s -3: - sll t8, t8, 1 # shift dividend - sll t2, t2, 1 # shift result - subu v0, v0, 1 # are we done? - bne v0, zero, 1b # no, continue - b norm_s - -/* - * Double precision divide. - */ -div_d: - jal get_ft_fs_d - xor t0, t0, ta0 # compute sign of result - move ta0, t0 - bne t1, DEXP_INF, 1f # is FS an infinity? - bne t2, zero, result_fs_d # if FS is NAN, result is FS - bne t3, zero, result_fs_d - bne ta1, DEXP_INF, result_fs_d # is FT an infinity? - bne ta2, zero, result_ft_d # if FT is NAN, result is FT - bne ta3, zero, result_ft_d - b invalid_d # infinity/infinity is invalid -1: - bne ta1, DEXP_INF, 1f # is FT an infinity? - bne ta2, zero, result_ft_d # if FT is NAN, result is FT - bne ta3, zero, result_ft_d - move t1, zero # x / infinity is zero - move t2, zero - move t3, zero - b result_fs_d -1: - bne t1, zero, 2f # is FS zero? - bne t2, zero, 1f - bne t3, zero, 1f - bne ta1, zero, result_fs_d # FS=zero, is FT zero? - bne ta2, zero, result_fs_d - beq ta3, zero, invalid_d # 0 / 0 - b result_fs_d # result = zero -1: - jal renorm_fs_d - b 3f -2: - subu t1, t1, DEXP_BIAS # unbias FS exponent - or t2, t2, DIMPL_ONE # set implied one bit -3: - bne ta1, zero, 2f # is FT zero? - bne ta2, zero, 1f - bne ta3, zero, 1f - or a1, a1, MIPS_FPU_EXCEPTION_DIV0 | MIPS_FPU_STICKY_DIV0 - and v0, a1, MIPS_FPU_ENABLE_DIV0 # trap enabled? - bne v0, zero, fpe_trap - ctc1 a1, MIPS_FPU_CSR # Save exceptions - li t1, DEXP_INF # result is infinity - move t2, zero - move t3, zero - b result_fs_d -1: - jal renorm_ft_d - b 3f -2: - subu ta1, ta1, DEXP_BIAS # unbias FT exponent - or ta2, ta2, DIMPL_ONE # set implied one bit -3: - subu t1, t1, ta1 # compute exponent - subu t1, t1, 3 # compensate for result position - li v0, DFRAC_BITS+3 # number of bits to divide - move t8, t2 # init dividend - move t9, t3 - move t2, zero # init result - move t3, zero -1: - bltu t8, ta2, 3f # is dividend >= divisor? - bne t8, ta2, 2f - bltu t9, ta3, 3f -2: - sltu v1, t9, ta3 # subtract divisor from dividend - subu t9, t9, ta3 - subu t8, t8, ta2 - subu t8, t8, v1 - or t3, t3, 1 # remember that we did - bne t8, zero, 3f # if not done, continue - bne t9, zero, 3f - li v1, 32 # shift result to final position - blt v0, v1, 2f # shift < 32 bits? - subu v0, v0, v1 # shift by > 32 bits - sll t2, t3, v0 # shift upper part - move t3, zero - b norm_d -2: - subu v1, v1, v0 # shift by < 32 bits - sll t2, t2, v0 # shift upper part - srl t9, t3, v1 # save bits shifted out - or t2, t2, t9 # and put into upper part - sll t3, t3, v0 - b norm_d -3: - sll t8, t8, 1 # shift dividend - srl v1, t9, 31 # save bit shifted out - or t8, t8, v1 # and put into upper part - sll t9, t9, 1 - sll t2, t2, 1 # shift result - srl v1, t3, 31 # save bit shifted out - or t2, t2, v1 # and put into upper part - sll t3, t3, 1 - subu v0, v0, 1 # are we done? - bne v0, zero, 1b # no, continue - sltu v0, zero, t9 # be sure to save any one bits - or t8, t8, v0 # from the lower remainder - b norm_d - -/* - * Single precision absolute value. - */ -abs_s: - jal get_fs_s - move t0, zero # set sign positive - b result_fs_s - -/* - * Double precision absolute value. - */ -abs_d: - jal get_fs_d - move t0, zero # set sign positive - b result_fs_d - -/* - * Single precision move. - */ -mov_s: - jal get_fs_s - b result_fs_s - -/* - * Double precision move. - */ -mov_d: - jal get_fs_d - b result_fs_d - -/* - * Single precision negate. - */ -neg_s: - jal get_fs_s - xor t0, t0, 1 # reverse sign - b result_fs_s - -/* - * Double precision negate. - */ -neg_d: - jal get_fs_d - xor t0, t0, 1 # reverse sign - b result_fs_d - -/* - * Convert double to single. - */ -cvt_s_d: - jal get_fs_d - bne t1, DEXP_INF, 1f # is FS an infinity? - li t1, SEXP_INF # convert to single - sll t2, t2, 3 # convert D fraction to S - srl t8, t3, 32 - 3 - or t2, t2, t8 - b result_fs_s -1: - bne t1, zero, 2f # is FS zero? - bne t2, zero, 1f - beq t3, zero, result_fs_s # result=0 -1: - jal renorm_fs_d - subu t1, t1, 3 # correct exp for shift below - b 3f -2: - subu t1, t1, DEXP_BIAS # unbias exponent - or t2, t2, DIMPL_ONE # add implied one bit -3: - sll t2, t2, 3 # convert D fraction to S - srl t8, t3, 32 - 3 - or t2, t2, t8 - sll t8, t3, 3 - b norm_noshift_s - -/* - * Convert integer to single. - */ -cvt_s_w: - jal get_fs_int - bne t2, zero, 1f # check for zero - move t1, zero - b result_fs_s -/* - * Find out how many leading zero bits are in t2 and put in t9. - */ -1: - move v0, t2 - move t9, zero - srl v1, v0, 16 - bne v1, zero, 1f - addu t9, 16 - sll v0, 16 -1: - srl v1, v0, 24 - bne v1, zero, 1f - addu t9, 8 - sll v0, 8 -1: - srl v1, v0, 28 - bne v1, zero, 1f - addu t9, 4 - sll v0, 4 -1: - srl v1, v0, 30 - bne v1, zero, 1f - addu t9, 2 - sll v0, 2 -1: - srl v1, v0, 31 - bne v1, zero, 1f - addu t9, 1 -/* - * Now shift t2 the correct number of bits. - */ -1: - subu t9, t9, SLEAD_ZEROS # dont count leading zeros - li t1, 23 # init exponent - subu t1, t1, t9 # compute exponent - beq t9, zero, 1f - li v0, 32 - blt t9, zero, 2f # if shift < 0, shift right - subu v0, v0, t9 - sll t2, t2, t9 # shift left -1: - add t1, t1, SEXP_BIAS # bias exponent - and t2, t2, ~SIMPL_ONE # clear implied one bit - b result_fs_s -2: - negu t9 # shift right by t9 - subu v0, v0, t9 - sll t8, t2, v0 # save bits shifted out - srl t2, t2, t9 - b norm_noshift_s - -/* - * Convert single to double. - */ -cvt_d_s: - jal get_fs_s - move t3, zero - bne t1, SEXP_INF, 1f # is FS an infinity? - li t1, DEXP_INF # convert to double - b result_fs_d -1: - bne t1, zero, 2f # is FS denormalized or zero? - beq t2, zero, result_fs_d # is FS zero? - jal renorm_fs_s - move t8, zero - b norm_d -2: - addu t1, t1, DEXP_BIAS - SEXP_BIAS # bias exponent correctly - sll t3, t2, 32 - 3 # convert S fraction to D - srl t2, t2, 3 - b result_fs_d - -/* - * Convert integer to double. - */ -cvt_d_w: - jal get_fs_int - bne t2, zero, 1f # check for zero - move t1, zero # result=0 - move t3, zero - b result_fs_d -/* - * Find out how many leading zero bits are in t2 and put in t9. - */ -1: - move v0, t2 - move t9, zero - srl v1, v0, 16 - bne v1, zero, 1f - addu t9, 16 - sll v0, 16 -1: - srl v1, v0, 24 - bne v1, zero, 1f - addu t9, 8 - sll v0, 8 -1: - srl v1, v0, 28 - bne v1, zero, 1f - addu t9, 4 - sll v0, 4 -1: - srl v1, v0, 30 - bne v1, zero, 1f - addu t9, 2 - sll v0, 2 -1: - srl v1, v0, 31 - bne v1, zero, 1f - addu t9, 1 -/* - * Now shift t2 the correct number of bits. - */ -1: - subu t9, t9, DLEAD_ZEROS # dont count leading zeros - li t1, DEXP_BIAS + 20 # init exponent - subu t1, t1, t9 # compute exponent - beq t9, zero, 1f - li v0, 32 - blt t9, zero, 2f # if shift < 0, shift right - subu v0, v0, t9 - sll t2, t2, t9 # shift left -1: - and t2, t2, ~DIMPL_ONE # clear implied one bit - move t3, zero - b result_fs_d -2: - negu t9 # shift right by t9 - subu v0, v0, t9 - sll t3, t2, v0 - srl t2, t2, t9 - and t2, t2, ~DIMPL_ONE # clear implied one bit - b result_fs_d - -/* - * Convert single to integer. - */ -cvt_w_s: - jal get_fs_s - bne t1, SEXP_INF, 1f # is FS an infinity? - bne t2, zero, invalid_w # invalid conversion -1: - bne t1, zero, 1f # is FS zero? - beq t2, zero, result_fs_w # result is zero - move t2, zero # result is an inexact zero - b inexact_w -1: - subu t1, t1, SEXP_BIAS # unbias exponent - or t2, t2, SIMPL_ONE # add implied one bit - sll t3, t2, 32 - 3 # convert S fraction to D - srl t2, t2, 3 - b cvt_w - -/* - * Convert double to integer. - */ -cvt_w_d: - jal get_fs_d - bne t1, DEXP_INF, 1f # is FS an infinity? - bne t2, zero, invalid_w # invalid conversion - bne t3, zero, invalid_w # invalid conversion -1: - bne t1, zero, 2f # is FS zero? - bne t2, zero, 1f - beq t3, zero, result_fs_w # result is zero -1: - move t2, zero # result is an inexact zero - b inexact_w -2: - subu t1, t1, DEXP_BIAS # unbias exponent - or t2, t2, DIMPL_ONE # add implied one bit -cvt_w: - blt t1, WEXP_MIN, underflow_w # is exponent too small? - li v0, WEXP_MAX+1 - bgt t1, v0, overflow_w # is exponent too large? - bne t1, v0, 1f # special check for INT_MIN - beq t0, zero, overflow_w # if positive, overflow - bne t2, DIMPL_ONE, overflow_w - bne t3, zero, overflow_w - li t2, INT_MIN # result is INT_MIN - b result_fs_w -1: - subu v0, t1, 20 # compute amount to shift - beq v0, zero, 2f # is shift needed? - li v1, 32 - blt v0, zero, 1f # if shift < 0, shift right - subu v1, v1, v0 # shift left - sll t2, t2, v0 - srl t9, t3, v1 # save bits shifted out of t3 - or t2, t2, t9 # and put into t2 - sll t3, t3, v0 # shift FSs fraction - b 2f -1: - negu v0 # shift right by v0 - subu v1, v1, v0 - sll t8, t3, v1 # save bits shifted out - sltu t8, zero, t8 # dont lose any ones - srl t3, t3, v0 # shift FSs fraction - or t3, t3, t8 - sll t9, t2, v1 # save bits shifted out of t2 - or t3, t3, t9 # and put into t3 - srl t2, t2, v0 -/* - * round result (t0 is sign, t2 is integer part, t3 is fractional part). - */ -2: - and v0, a1, MIPS_FPU_ROUNDING_BITS # get rounding mode - beq v0, MIPS_FPU_ROUND_RN, 3f # round to nearest - beq v0, MIPS_FPU_ROUND_RZ, 5f # round to zero (truncate) - beq v0, MIPS_FPU_ROUND_RP, 1f # round to +infinity - beq t0, zero, 5f # if sign is positive, truncate - b 2f -1: - bne t0, zero, 5f # if sign is negative, truncate -2: - beq t3, zero, 5f # if no fraction bits, continue - addu t2, t2, 1 # add rounding bit - blt t2, zero, overflow_w # overflow? - b 5f -3: - li v0, GUARDBIT # load guard bit for rounding - addu v0, v0, t3 # add remainder - sltu v1, v0, t3 # compute carry out - beq v1, zero, 4f # if no carry, continue - addu t2, t2, 1 # add carry to result - blt t2, zero, overflow_w # overflow? -4: - bne v0, zero, 5f # if rounded remainder is zero - and t2, t2, ~1 # clear LSB (round to nearest) -5: - beq t0, zero, 1f # result positive? - negu t2 # convert to negative integer -1: - beq t3, zero, result_fs_w # is result exact? -/* - * Handle inexact exception. - */ -inexact_w: - or a1, a1, MIPS_FPU_EXCEPTION_INEXACT | MIPS_FPU_STICKY_INEXACT - and v0, a1, MIPS_FPU_ENABLE_INEXACT - bne v0, zero, fpe_trap - ctc1 a1, MIPS_FPU_CSR # save exceptions - b result_fs_w - -/* - * Conversions to integer which overflow will trap (if enabled), - * or generate an inexact trap (if enabled), - * or generate an invalid exception. - */ -overflow_w: - or a1, a1, MIPS_FPU_EXCEPTION_OVERFLOW | MIPS_FPU_STICKY_OVERFLOW - and v0, a1, MIPS_FPU_ENABLE_OVERFLOW - bne v0, zero, fpe_trap - and v0, a1, MIPS_FPU_ENABLE_INEXACT - bne v0, zero, inexact_w # inexact traps enabled? - b invalid_w - -/* - * Conversions to integer which underflow will trap (if enabled), - * or generate an inexact trap (if enabled), - * or generate an invalid exception. - */ -underflow_w: - or a1, a1, MIPS_FPU_EXCEPTION_UNDERFLOW | MIPS_FPU_STICKY_UNDERFLOW - and v0, a1, MIPS_FPU_ENABLE_UNDERFLOW - bne v0, zero, fpe_trap - and v0, a1, MIPS_FPU_ENABLE_INEXACT - bne v0, zero, inexact_w # inexact traps enabled? - b invalid_w - -/* - * Compare single. - */ -cmp_s: - jal get_cmp_s - bne t1, SEXP_INF, 1f # is FS an infinity? - bne t2, zero, unordered # FS is a NAN -1: - bne ta1, SEXP_INF, 2f # is FT an infinity? - bne ta2, zero, unordered # FT is a NAN -2: - sll t1, t1, 23 # reassemble exp & frac - or t1, t1, t2 - sll ta1, ta1, 23 # reassemble exp & frac - or ta1, ta1, ta2 - beq t0, zero, 1f # is FS positive? - negu t1 -1: - beq ta0, zero, 1f # is FT positive? - negu ta1 -1: - li v0, COND_LESS - blt t1, ta1, test_cond # is FS < FT? - li v0, COND_EQUAL - beq t1, ta1, test_cond # is FS == FT? - move v0, zero # FS > FT - b test_cond - -/* - * Compare double. - */ -cmp_d: - jal get_cmp_d - bne t1, DEXP_INF, 1f # is FS an infinity? - bne t2, zero, unordered - bne t3, zero, unordered # FS is a NAN -1: - bne ta1, DEXP_INF, 2f # is FT an infinity? - bne ta2, zero, unordered - bne ta3, zero, unordered # FT is a NAN -2: - sll t1, t1, 20 # reassemble exp & frac - or t1, t1, t2 - sll ta1, ta1, 20 # reassemble exp & frac - or ta1, ta1, ta2 - beq t0, zero, 1f # is FS positive? - not t3 # negate t1,t3 - not t1 - addu t3, t3, 1 - seq v0, t3, zero # compute carry - addu t1, t1, v0 -1: - beq ta0, zero, 1f # is FT positive? - not ta3 # negate ta1,ta3 - not ta1 - addu ta3, ta3, 1 - seq v0, ta3, zero # compute carry - addu ta1, ta1, v0 -1: - li v0, COND_LESS - blt t1, ta1, test_cond # is FS(MSW) < FT(MSW)? - move v0, zero - bne t1, ta1, test_cond # is FS(MSW) > FT(MSW)? - li v0, COND_LESS - bltu t3, ta3, test_cond # is FS(LSW) < FT(LSW)? - li v0, COND_EQUAL - beq t3, ta3, test_cond # is FS(LSW) == FT(LSW)? - move v0, zero # FS > FT -test_cond: - and v0, v0, a0 # condition match instruction? -set_cond: - bne v0, zero, 1f - and a1, a1, ~MIPS_FPU_COND_BIT # clear condition bit - b 2f -1: - or a1, a1, MIPS_FPU_COND_BIT # set condition bit -2: - ctc1 a1, MIPS_FPU_CSR # save condition bit - b done - -unordered: - and v0, a0, COND_UNORDERED # this cmp match unordered? - bne v0, zero, 1f - and a1, a1, ~MIPS_FPU_COND_BIT # clear condition bit - b 2f -1: - or a1, a1, MIPS_FPU_COND_BIT # set condition bit -2: - and v0, a0, COND_SIGNAL - beq v0, zero, 1f # is this a signaling cmp? - or a1, a1, MIPS_FPU_EXCEPTION_INVALID | MIPS_FPU_STICKY_INVALID - and v0, a1, MIPS_FPU_ENABLE_INVALID - bne v0, zero, fpe_trap -1: - ctc1 a1, MIPS_FPU_CSR # save condition bit - b done - -/* - * Determine the amount to shift the fraction in order to restore the - * normalized position. After that, round and handle exceptions. - */ -norm_s: - move v0, t2 - move t9, zero # t9 = num of leading zeros - bne t2, zero, 1f - move v0, t8 - addu t9, 32 -1: - srl v1, v0, 16 - bne v1, zero, 1f - addu t9, 16 - sll v0, 16 -1: - srl v1, v0, 24 - bne v1, zero, 1f - addu t9, 8 - sll v0, 8 -1: - srl v1, v0, 28 - bne v1, zero, 1f - addu t9, 4 - sll v0, 4 -1: - srl v1, v0, 30 - bne v1, zero, 1f - addu t9, 2 - sll v0, 2 -1: - srl v1, v0, 31 - bne v1, zero, 1f - addu t9, 1 -/* - * Now shift t2,t8 the correct number of bits. - */ -1: - subu t9, t9, SLEAD_ZEROS # dont count leading zeros - subu t1, t1, t9 # adjust the exponent - beq t9, zero, norm_noshift_s - li v1, 32 - blt t9, zero, 1f # if shift < 0, shift right - subu v1, v1, t9 - sll t2, t2, t9 # shift t2,t8 left - srl v0, t8, v1 # save bits shifted out - or t2, t2, v0 - sll t8, t8, t9 - b norm_noshift_s -1: - negu t9 # shift t2,t8 right by t9 - subu v1, v1, t9 - sll v0, t8, v1 # save bits shifted out - sltu v0, zero, v0 # be sure to save any one bits - srl t8, t8, t9 - or t8, t8, v0 - sll v0, t2, v1 # save bits shifted out - or t8, t8, v0 - srl t2, t2, t9 -norm_noshift_s: - move ta1, t1 # save unrounded exponent - move ta2, t2 # save unrounded fraction - and v0, a1, MIPS_FPU_ROUNDING_BITS # get rounding mode - beq v0, MIPS_FPU_ROUND_RN, 3f # round to nearest - beq v0, MIPS_FPU_ROUND_RZ, 5f # round to zero (truncate) - beq v0, MIPS_FPU_ROUND_RP, 1f # round to +infinity - beq t0, zero, 5f # if sign is positive, truncate - b 2f -1: - bne t0, zero, 5f # if sign is negative, truncate -2: - beq t8, zero, 5f # if exact, continue - addu t2, t2, 1 # add rounding bit - bne t2, SIMPL_ONE<<1, 5f # need to adjust exponent? - addu t1, t1, 1 # adjust exponent - srl t2, t2, 1 # renormalize fraction - b 5f -3: - li v0, GUARDBIT # load guard bit for rounding - addu v0, v0, t8 # add remainder - sltu v1, v0, t8 # compute carry out - beq v1, zero, 4f # if no carry, continue - addu t2, t2, 1 # add carry to result - bne t2, SIMPL_ONE<<1, 4f # need to adjust exponent? - addu t1, t1, 1 # adjust exponent - srl t2, t2, 1 # renormalize fraction -4: - bne v0, zero, 5f # if rounded remainder is zero - and t2, t2, ~1 # clear LSB (round to nearest) -5: - bgt t1, SEXP_MAX, overflow_s # overflow? - blt t1, SEXP_MIN, underflow_s # underflow? - bne t8, zero, inexact_s # is result inexact? - addu t1, t1, SEXP_BIAS # bias exponent - and t2, t2, ~SIMPL_ONE # clear implied one bit - b result_fs_s - -/* - * Handle inexact exception. - */ -inexact_s: - addu t1, t1, SEXP_BIAS # bias exponent - and t2, t2, ~SIMPL_ONE # clear implied one bit -inexact_nobias_s: - jal set_fd_s # save result - or a1, a1, MIPS_FPU_EXCEPTION_INEXACT | MIPS_FPU_STICKY_INEXACT - and v0, a1, MIPS_FPU_ENABLE_INEXACT - bne v0, zero, fpe_trap - ctc1 a1, MIPS_FPU_CSR # save exceptions - b done - -/* - * Overflow will trap (if enabled), - * or generate an inexact trap (if enabled), - * or generate an infinity. - */ -overflow_s: - or a1, a1, MIPS_FPU_EXCEPTION_OVERFLOW | MIPS_FPU_STICKY_OVERFLOW - and v0, a1, MIPS_FPU_ENABLE_OVERFLOW - beq v0, zero, 1f - subu t1, t1, 192 # bias exponent - and t2, t2, ~SIMPL_ONE # clear implied one bit - jal set_fd_s # save result - b fpe_trap -1: - and v0, a1, MIPS_FPU_ROUNDING_BITS # get rounding mode - beq v0, MIPS_FPU_ROUND_RN, 3f # round to nearest - beq v0, MIPS_FPU_ROUND_RZ, 1f # round to zero (truncate) - beq v0, MIPS_FPU_ROUND_RP, 2f # round to +infinity - bne t0, zero, 3f -1: - li t1, SEXP_MAX # result is max finite - li t2, 0x007fffff - b inexact_s -2: - bne t0, zero, 1b -3: - li t1, SEXP_MAX + 1 # result is infinity - move t2, zero - b inexact_s - -/* - * In this implementation, "tininess" is detected "after rounding" and - * "loss of accuracy" is detected as "an inexact result". - */ -underflow_s: - and v0, a1, MIPS_FPU_ENABLE_UNDERFLOW - beq v0, zero, 1f -/* - * Underflow is enabled so compute the result and trap. - */ - addu t1, t1, 192 # bias exponent - and t2, t2, ~SIMPL_ONE # clear implied one bit - jal set_fd_s # save result - or a1, a1, MIPS_FPU_EXCEPTION_UNDERFLOW | MIPS_FPU_STICKY_UNDERFLOW - b fpe_trap -/* - * Underflow is not enabled so compute the result, - * signal inexact result (if it is) and trap (if enabled). - */ -1: - move t1, ta1 # get unrounded exponent - move t2, ta2 # get unrounded fraction - li t9, SEXP_MIN # compute shift amount - subu t9, t9, t1 # shift t2,t8 right by t9 - blt t9, SFRAC_BITS+2, 3f # shift all the bits out? - move t1, zero # result is inexact zero - move t2, zero - or a1, a1, MIPS_FPU_EXCEPTION_UNDERFLOW | MIPS_FPU_STICKY_UNDERFLOW -/* - * Now round the zero result. - * Only need to worry about rounding to +- infinity when the sign matches. - */ - and v0, a1, MIPS_FPU_ROUNDING_BITS # get rounding mode - beq v0, MIPS_FPU_ROUND_RN, inexact_nobias_s # round to nearest - beq v0, MIPS_FPU_ROUND_RZ, inexact_nobias_s # round to zero - beq v0, MIPS_FPU_ROUND_RP, 1f # round to +infinity - beq t0, zero, inexact_nobias_s # if sign is positive, truncate - b 2f -1: - bne t0, zero, inexact_nobias_s # if sign is negative, truncate -2: - addu t2, t2, 1 # add rounding bit - b inexact_nobias_s -3: - li v1, 32 - subu v1, v1, t9 - sltu v0, zero, t8 # be sure to save any one bits - sll t8, t2, v1 # save bits shifted out - or t8, t8, v0 # include sticky bits - srl t2, t2, t9 -/* - * Now round the denormalized result. - */ - and v0, a1, MIPS_FPU_ROUNDING_BITS # get rounding mode - beq v0, MIPS_FPU_ROUND_RN, 3f # round to nearest - beq v0, MIPS_FPU_ROUND_RZ, 5f # round to zero (truncate) - beq v0, MIPS_FPU_ROUND_RP, 1f # round to +infinity - beq t0, zero, 5f # if sign is positive, truncate - b 2f -1: - bne t0, zero, 5f # if sign is negative, truncate -2: - beq t8, zero, 5f # if exact, continue - addu t2, t2, 1 # add rounding bit - b 5f -3: - li v0, GUARDBIT # load guard bit for rounding - addu v0, v0, t8 # add remainder - sltu v1, v0, t8 # compute carry out - beq v1, zero, 4f # if no carry, continue - addu t2, t2, 1 # add carry to result -4: - bne v0, zero, 5f # if rounded remainder is zero - and t2, t2, ~1 # clear LSB (round to nearest) -5: - move t1, zero # denorm or zero exponent - jal set_fd_s # save result - beq t8, zero, done # check for exact result - or a1, a1, MIPS_FPU_EXCEPTION_UNDERFLOW | MIPS_FPU_STICKY_UNDERFLOW - or a1, a1, MIPS_FPU_EXCEPTION_INEXACT | MIPS_FPU_STICKY_INEXACT - and v0, a1, MIPS_FPU_ENABLE_INEXACT - bne v0, zero, fpe_trap - ctc1 a1, MIPS_FPU_CSR # save exceptions - b done - -/* - * Determine the amount to shift the fraction in order to restore the - * normalized position. After that, round and handle exceptions. - */ -norm_d: - move v0, t2 - move t9, zero # t9 = num of leading zeros - bne t2, zero, 1f - move v0, t3 - addu t9, 32 - bne t3, zero, 1f - move v0, t8 - addu t9, 32 -1: - srl v1, v0, 16 - bne v1, zero, 1f - addu t9, 16 - sll v0, 16 -1: - srl v1, v0, 24 - bne v1, zero, 1f - addu t9, 8 - sll v0, 8 -1: - srl v1, v0, 28 - bne v1, zero, 1f - addu t9, 4 - sll v0, 4 -1: - srl v1, v0, 30 - bne v1, zero, 1f - addu t9, 2 - sll v0, 2 -1: - srl v1, v0, 31 - bne v1, zero, 1f - addu t9, 1 -/* - * Now shift t2,t3,t8 the correct number of bits. - */ -1: - subu t9, t9, DLEAD_ZEROS # dont count leading zeros - subu t1, t1, t9 # adjust the exponent - beq t9, zero, norm_noshift_d - li v1, 32 - blt t9, zero, 2f # if shift < 0, shift right - blt t9, v1, 1f # shift by < 32? - subu t9, t9, v1 # shift by >= 32 - subu v1, v1, t9 - sll t2, t3, t9 # shift left by t9 - srl v0, t8, v1 # save bits shifted out - or t2, t2, v0 - sll t3, t8, t9 - move t8, zero - b norm_noshift_d -1: - subu v1, v1, t9 - sll t2, t2, t9 # shift left by t9 - srl v0, t3, v1 # save bits shifted out - or t2, t2, v0 - sll t3, t3, t9 - srl v0, t8, v1 # save bits shifted out - or t3, t3, v0 - sll t8, t8, t9 - b norm_noshift_d -2: - negu t9 # shift right by t9 - subu v1, v1, t9 # (known to be < 32 bits) - sll v0, t8, v1 # save bits shifted out - sltu v0, zero, v0 # be sure to save any one bits - srl t8, t8, t9 - or t8, t8, v0 - sll v0, t3, v1 # save bits shifted out - or t8, t8, v0 - srl t3, t3, t9 - sll v0, t2, v1 # save bits shifted out - or t3, t3, v0 - srl t2, t2, t9 -norm_noshift_d: - move ta1, t1 # save unrounded exponent - move ta2, t2 # save unrounded fraction (MS) - move ta3, t3 # save unrounded fraction (LS) - and v0, a1, MIPS_FPU_ROUNDING_BITS # get rounding mode - beq v0, MIPS_FPU_ROUND_RN, 3f # round to nearest - beq v0, MIPS_FPU_ROUND_RZ, 5f # round to zero (truncate) - beq v0, MIPS_FPU_ROUND_RP, 1f # round to +infinity - beq t0, zero, 5f # if sign is positive, truncate - b 2f -1: - bne t0, zero, 5f # if sign is negative, truncate -2: - beq t8, zero, 5f # if exact, continue - addu t3, t3, 1 # add rounding bit - bne t3, zero, 5f # branch if no carry - addu t2, t2, 1 # add carry - bne t2, DIMPL_ONE<<1, 5f # need to adjust exponent? - addu t1, t1, 1 # adjust exponent - srl t2, t2, 1 # renormalize fraction - b 5f -3: - li v0, GUARDBIT # load guard bit for rounding - addu v0, v0, t8 # add remainder - sltu v1, v0, t8 # compute carry out - beq v1, zero, 4f # branch if no carry - addu t3, t3, 1 # add carry - bne t3, zero, 4f # branch if no carry - addu t2, t2, 1 # add carry to result - bne t2, DIMPL_ONE<<1, 4f # need to adjust exponent? - addu t1, t1, 1 # adjust exponent - srl t2, t2, 1 # renormalize fraction -4: - bne v0, zero, 5f # if rounded remainder is zero - and t3, t3, ~1 # clear LSB (round to nearest) -5: - bgt t1, DEXP_MAX, overflow_d # overflow? - blt t1, DEXP_MIN, underflow_d # underflow? - bne t8, zero, inexact_d # is result inexact? - addu t1, t1, DEXP_BIAS # bias exponent - and t2, t2, ~DIMPL_ONE # clear implied one bit - b result_fs_d - -/* - * Handle inexact exception. - */ -inexact_d: - addu t1, t1, DEXP_BIAS # bias exponent - and t2, t2, ~DIMPL_ONE # clear implied one bit -inexact_nobias_d: - jal set_fd_d # save result - or a1, a1, MIPS_FPU_EXCEPTION_INEXACT | MIPS_FPU_STICKY_INEXACT - and v0, a1, MIPS_FPU_ENABLE_INEXACT - bne v0, zero, fpe_trap - ctc1 a1, MIPS_FPU_CSR # save exceptions - b done - -/* - * Overflow will trap (if enabled), - * or generate an inexact trap (if enabled), - * or generate an infinity. - */ -overflow_d: - or a1, a1, MIPS_FPU_EXCEPTION_OVERFLOW | MIPS_FPU_STICKY_OVERFLOW - and v0, a1, MIPS_FPU_ENABLE_OVERFLOW - beq v0, zero, 1f - subu t1, t1, 1536 # bias exponent - and t2, t2, ~DIMPL_ONE # clear implied one bit - jal set_fd_d # save result - b fpe_trap -1: - and v0, a1, MIPS_FPU_ROUNDING_BITS # get rounding mode - beq v0, MIPS_FPU_ROUND_RN, 3f # round to nearest - beq v0, MIPS_FPU_ROUND_RZ, 1f # round to zero (truncate) - beq v0, MIPS_FPU_ROUND_RP, 2f # round to +infinity - bne t0, zero, 3f -1: - li t1, DEXP_MAX # result is max finite - li t2, 0x000fffff - li t3, 0xffffffff - b inexact_d -2: - bne t0, zero, 1b -3: - li t1, DEXP_MAX + 1 # result is infinity - move t2, zero - move t3, zero - b inexact_d - -/* - * In this implementation, "tininess" is detected "after rounding" and - * "loss of accuracy" is detected as "an inexact result". - */ -underflow_d: - and v0, a1, MIPS_FPU_ENABLE_UNDERFLOW - beq v0, zero, 1f -/* - * Underflow is enabled so compute the result and trap. - */ - addu t1, t1, 1536 # bias exponent - and t2, t2, ~DIMPL_ONE # clear implied one bit - jal set_fd_d # save result - or a1, a1, MIPS_FPU_EXCEPTION_UNDERFLOW | MIPS_FPU_STICKY_UNDERFLOW - b fpe_trap -/* - * Underflow is not enabled so compute the result, - * signal inexact result (if it is) and trap (if enabled). - */ -1: - move t1, ta1 # get unrounded exponent - move t2, ta2 # get unrounded fraction (MS) - move t3, ta3 # get unrounded fraction (LS) - li t9, DEXP_MIN # compute shift amount - subu t9, t9, t1 # shift t2,t8 right by t9 - blt t9, DFRAC_BITS+2, 3f # shift all the bits out? - move t1, zero # result is inexact zero - move t2, zero - move t3, zero - or a1, a1, MIPS_FPU_EXCEPTION_UNDERFLOW | MIPS_FPU_STICKY_UNDERFLOW -/* - * Now round the zero result. - * Only need to worry about rounding to +- infinity when the sign matches. - */ - and v0, a1, MIPS_FPU_ROUNDING_BITS # get rounding mode - beq v0, MIPS_FPU_ROUND_RN, inexact_nobias_d # round to nearest - beq v0, MIPS_FPU_ROUND_RZ, inexact_nobias_d # round to zero - beq v0, MIPS_FPU_ROUND_RP, 1f # round to +infinity - beq t0, zero, inexact_nobias_d # if sign is positive, truncate - b 2f -1: - bne t0, zero, inexact_nobias_d # if sign is negative, truncate -2: - addu t3, t3, 1 # add rounding bit - b inexact_nobias_d -3: - li v1, 32 - blt t9, v1, 1f # shift by < 32? - subu t9, t9, v1 # shift right by >= 32 - subu v1, v1, t9 - sltu v0, zero, t8 # be sure to save any one bits - sll t8, t2, v1 # save bits shifted out - or t8, t8, v0 # include sticky bits - srl t3, t2, t9 - move t2, zero - b 2f -1: - subu v1, v1, t9 # shift right by t9 - sltu v0, zero, t8 # be sure to save any one bits - sll t8, t3, v1 # save bits shifted out - or t8, t8, v0 # include sticky bits - srl t3, t3, t9 - sll v0, t2, v1 # save bits shifted out - or t3, t3, v0 - srl t2, t2, t9 -/* - * Now round the denormalized result. - */ -2: - and v0, a1, MIPS_FPU_ROUNDING_BITS # get rounding mode - beq v0, MIPS_FPU_ROUND_RN, 3f # round to nearest - beq v0, MIPS_FPU_ROUND_RZ, 5f # round to zero (truncate) - beq v0, MIPS_FPU_ROUND_RP, 1f # round to +infinity - beq t0, zero, 5f # if sign is positive, truncate - b 2f -1: - bne t0, zero, 5f # if sign is negative, truncate -2: - beq t8, zero, 5f # if exact, continue - addu t3, t3, 1 # add rounding bit - bne t3, zero, 5f # if no carry, continue - addu t2, t2, 1 # add carry - b 5f -3: - li v0, GUARDBIT # load guard bit for rounding - addu v0, v0, t8 # add remainder - sltu v1, v0, t8 # compute carry out - beq v1, zero, 4f # if no carry, continue - addu t3, t3, 1 # add rounding bit - bne t3, zero, 4f # if no carry, continue - addu t2, t2, 1 # add carry -4: - bne v0, zero, 5f # if rounded remainder is zero - and t3, t3, ~1 # clear LSB (round to nearest) -5: - move t1, zero # denorm or zero exponent - jal set_fd_d # save result - beq t8, zero, done # check for exact result - or a1, a1, MIPS_FPU_EXCEPTION_UNDERFLOW | MIPS_FPU_STICKY_UNDERFLOW - or a1, a1, MIPS_FPU_EXCEPTION_INEXACT | MIPS_FPU_STICKY_INEXACT - and v0, a1, MIPS_FPU_ENABLE_INEXACT - bne v0, zero, fpe_trap - ctc1 a1, MIPS_FPU_CSR # save exceptions - b done - -/* - * Signal an invalid operation if the trap is enabled; otherwise, - * the result is a quiet NAN. - */ -invalid_s: # trap invalid operation - or a1, a1, MIPS_FPU_EXCEPTION_INVALID | MIPS_FPU_STICKY_INVALID - and v0, a1, MIPS_FPU_ENABLE_INVALID - bne v0, zero, fpe_trap - ctc1 a1, MIPS_FPU_CSR # save exceptions - move t0, zero # result is a quiet NAN - li t1, SEXP_INF - li t2, SQUIET_NAN - jal set_fd_s # save result (in t0,t1,t2) - b done - -/* - * Signal an invalid operation if the trap is enabled; otherwise, - * the result is a quiet NAN. - */ -invalid_d: # trap invalid operation - or a1, a1, MIPS_FPU_EXCEPTION_INVALID | MIPS_FPU_STICKY_INVALID - and v0, a1, MIPS_FPU_ENABLE_INVALID - bne v0, zero, fpe_trap - ctc1 a1, MIPS_FPU_CSR # save exceptions - move t0, zero # result is a quiet NAN - li t1, DEXP_INF - li t2, DQUIET_NAN0 - li t3, DQUIET_NAN1 - jal set_fd_d # save result (in t0,t1,t2,t3) - b done - -/* - * Signal an invalid operation if the trap is enabled; otherwise, - * the result is INT_MAX or INT_MIN. - */ -invalid_w: # trap invalid operation - or a1, a1, MIPS_FPU_EXCEPTION_INVALID | MIPS_FPU_STICKY_INVALID - and v0, a1, MIPS_FPU_ENABLE_INVALID - bne v0, zero, fpe_trap - ctc1 a1, MIPS_FPU_CSR # save exceptions - bne t0, zero, 1f - li t2, INT_MAX # result is INT_MAX - b result_fs_w -1: - li t2, INT_MIN # result is INT_MIN - b result_fs_w - -/* - * Trap if the hardware should have handled this case. - */ -fpe_trap: - move a2, a1 # code = FP CSR - ctc1 a1, MIPS_FPU_CSR # save exceptions - break 0 - -/* - * Send an illegal instruction signal to the current process. - */ -ill: - ctc1 a1, MIPS_FPU_CSR # save exceptions - move a2, a0 # code = FP instruction - break 0 - -result_ft_s: - move t0, ta0 # result is FT - move t1, ta1 - move t2, ta2 -result_fs_s: # result is FS - jal set_fd_s # save result (in t0,t1,t2) - b done - -result_fs_w: - jal set_fd_word # save result (in t2) - b done - -result_ft_d: - move t0, ta0 # result is FT - move t1, ta1 - move t2, ta2 - move t3, ta3 -result_fs_d: # result is FS - jal set_fd_d # save result (in t0,t1,t2,t3) - -done: - lw ra, CALLFRAME_RA(sp) - addu sp, sp, CALLFRAME_SIZ - j ra -END(MipsEmulateFP) - -/*---------------------------------------------------------------------------- - * get_fs_int -- - * - * Read (integer) the FS register (bits 15-11). - * This is an internal routine used by MipsEmulateFP only. - * - * Results: - * t0 contains the sign - * t2 contains the fraction - * - *---------------------------------------------------------------------------- - */ -LEAF(get_fs_int) - srl a3, a0, 12 - 2 # get FS field (even regs only) - and a3, a3, 0xF << 2 # mask FS field - lw a3, get_fs_int_tbl(a3) # switch on register number - j a3 - - .rdata -get_fs_int_tbl: - .word get_fs_int_f0 - .word get_fs_int_f2 - .word get_fs_int_f4 - .word get_fs_int_f6 - .word get_fs_int_f8 - .word get_fs_int_f10 - .word get_fs_int_f12 - .word get_fs_int_f14 - .word get_fs_int_f16 - .word get_fs_int_f18 - .word get_fs_int_f20 - .word get_fs_int_f22 - .word get_fs_int_f24 - .word get_fs_int_f26 - .word get_fs_int_f28 - .word get_fs_int_f30 - .text - -get_fs_int_f0: - mfc1 t2, $f0 - b get_fs_int_done -get_fs_int_f2: - mfc1 t2, $f2 - b get_fs_int_done -get_fs_int_f4: - mfc1 t2, $f4 - b get_fs_int_done -get_fs_int_f6: - mfc1 t2, $f6 - b get_fs_int_done -get_fs_int_f8: - mfc1 t2, $f8 - b get_fs_int_done -get_fs_int_f10: - mfc1 t2, $f10 - b get_fs_int_done -get_fs_int_f12: - mfc1 t2, $f12 - b get_fs_int_done -get_fs_int_f14: - mfc1 t2, $f14 - b get_fs_int_done -get_fs_int_f16: - mfc1 t2, $f16 - b get_fs_int_done -get_fs_int_f18: - mfc1 t2, $f18 - b get_fs_int_done -get_fs_int_f20: - mfc1 t2, $f20 - b get_fs_int_done -get_fs_int_f22: - mfc1 t2, $f22 - b get_fs_int_done -get_fs_int_f24: - mfc1 t2, $f24 - b get_fs_int_done -get_fs_int_f26: - mfc1 t2, $f26 - b get_fs_int_done -get_fs_int_f28: - mfc1 t2, $f28 - b get_fs_int_done -get_fs_int_f30: - mfc1 t2, $f30 -get_fs_int_done: - srl t0, t2, 31 # init the sign bit - bge t2, zero, 1f - negu t2 -1: - j ra -END(get_fs_int) - -/*---------------------------------------------------------------------------- - * get_ft_fs_s -- - * - * Read (single precision) the FT register (bits 20-16) and - * the FS register (bits 15-11) and break up into fields. - * This is an internal routine used by MipsEmulateFP only. - * - * Results: - * t0 contains the FS sign - * t1 contains the FS (biased) exponent - * t2 contains the FS fraction - * ta0 contains the FT sign - * ta1 contains the FT (biased) exponent - * ta2 contains the FT fraction - * - *---------------------------------------------------------------------------- - */ -LEAF(get_ft_fs_s) - srl a3, a0, 17 - 2 # get FT field (even regs only) - and a3, a3, 0xF << 2 # mask FT field - lw a3, get_ft_s_tbl(a3) # switch on register number - j a3 - - .rdata -get_ft_s_tbl: - .word get_ft_s_f0 - .word get_ft_s_f2 - .word get_ft_s_f4 - .word get_ft_s_f6 - .word get_ft_s_f8 - .word get_ft_s_f10 - .word get_ft_s_f12 - .word get_ft_s_f14 - .word get_ft_s_f16 - .word get_ft_s_f18 - .word get_ft_s_f20 - .word get_ft_s_f22 - .word get_ft_s_f24 - .word get_ft_s_f26 - .word get_ft_s_f28 - .word get_ft_s_f30 - .text - -get_ft_s_f0: - mfc1 ta0, $f0 - b get_ft_s_done -get_ft_s_f2: - mfc1 ta0, $f2 - b get_ft_s_done -get_ft_s_f4: - mfc1 ta0, $f4 - b get_ft_s_done -get_ft_s_f6: - mfc1 ta0, $f6 - b get_ft_s_done -get_ft_s_f8: - mfc1 ta0, $f8 - b get_ft_s_done -get_ft_s_f10: - mfc1 ta0, $f10 - b get_ft_s_done -get_ft_s_f12: - mfc1 ta0, $f12 - b get_ft_s_done -get_ft_s_f14: - mfc1 ta0, $f14 - b get_ft_s_done -get_ft_s_f16: - mfc1 ta0, $f16 - b get_ft_s_done -get_ft_s_f18: - mfc1 ta0, $f18 - b get_ft_s_done -get_ft_s_f20: - mfc1 ta0, $f20 - b get_ft_s_done -get_ft_s_f22: - mfc1 ta0, $f22 - b get_ft_s_done -get_ft_s_f24: - mfc1 ta0, $f24 - b get_ft_s_done -get_ft_s_f26: - mfc1 ta0, $f26 - b get_ft_s_done -get_ft_s_f28: - mfc1 ta0, $f28 - b get_ft_s_done -get_ft_s_f30: - mfc1 ta0, $f30 -get_ft_s_done: - srl ta1, ta0, 23 # get exponent - and ta1, ta1, 0xFF - and ta2, ta0, 0x7FFFFF # get fraction - srl ta0, ta0, 31 # get sign - bne ta1, SEXP_INF, 1f # is it a signaling NAN? - and v0, ta2, SSIGNAL_NAN - bne v0, zero, invalid_s -1: - /* fall through to get FS */ - -/*---------------------------------------------------------------------------- - * get_fs_s -- - * - * Read (single precision) the FS register (bits 15-11) and - * break up into fields. - * This is an internal routine used by MipsEmulateFP only. - * - * Results: - * t0 contains the sign - * t1 contains the (biased) exponent - * t2 contains the fraction - * - *---------------------------------------------------------------------------- - */ -XLEAF(get_fs_s) - srl a3, a0, 12 - 2 # get FS field (even regs only) - and a3, a3, 0xF << 2 # mask FS field - lw a3, get_fs_s_tbl(a3) # switch on register number - j a3 - - .rdata -get_fs_s_tbl: - .word get_fs_s_f0 - .word get_fs_s_f2 - .word get_fs_s_f4 - .word get_fs_s_f6 - .word get_fs_s_f8 - .word get_fs_s_f10 - .word get_fs_s_f12 - .word get_fs_s_f14 - .word get_fs_s_f16 - .word get_fs_s_f18 - .word get_fs_s_f20 - .word get_fs_s_f22 - .word get_fs_s_f24 - .word get_fs_s_f26 - .word get_fs_s_f28 - .word get_fs_s_f30 - .text - -get_fs_s_f0: - mfc1 t0, $f0 - b get_fs_s_done -get_fs_s_f2: - mfc1 t0, $f2 - b get_fs_s_done -get_fs_s_f4: - mfc1 t0, $f4 - b get_fs_s_done -get_fs_s_f6: - mfc1 t0, $f6 - b get_fs_s_done -get_fs_s_f8: - mfc1 t0, $f8 - b get_fs_s_done -get_fs_s_f10: - mfc1 t0, $f10 - b get_fs_s_done -get_fs_s_f12: - mfc1 t0, $f12 - b get_fs_s_done -get_fs_s_f14: - mfc1 t0, $f14 - b get_fs_s_done -get_fs_s_f16: - mfc1 t0, $f16 - b get_fs_s_done -get_fs_s_f18: - mfc1 t0, $f18 - b get_fs_s_done -get_fs_s_f20: - mfc1 t0, $f20 - b get_fs_s_done -get_fs_s_f22: - mfc1 t0, $f22 - b get_fs_s_done -get_fs_s_f24: - mfc1 t0, $f24 - b get_fs_s_done -get_fs_s_f26: - mfc1 t0, $f26 - b get_fs_s_done -get_fs_s_f28: - mfc1 t0, $f28 - b get_fs_s_done -get_fs_s_f30: - mfc1 t0, $f30 -get_fs_s_done: - srl t1, t0, 23 # get exponent - and t1, t1, 0xFF - and t2, t0, 0x7FFFFF # get fraction - srl t0, t0, 31 # get sign - bne t1, SEXP_INF, 1f # is it a signaling NAN? - and v0, t2, SSIGNAL_NAN - bne v0, zero, invalid_s -1: - j ra -END(get_ft_fs_s) - -/*---------------------------------------------------------------------------- - * get_ft_fs_d -- - * - * Read (double precision) the FT register (bits 20-16) and - * the FS register (bits 15-11) and break up into fields. - * This is an internal routine used by MipsEmulateFP only. - * - * Results: - * t0 contains the FS sign - * t1 contains the FS (biased) exponent - * t2 contains the FS fraction - * t3 contains the FS remaining fraction - * ta0 contains the FT sign - * ta1 contains the FT (biased) exponent - * ta2 contains the FT fraction - * ta3 contains the FT remaining fraction - * - *---------------------------------------------------------------------------- - */ -LEAF(get_ft_fs_d) - srl a3, a0, 17 - 2 # get FT field (even regs only) - and a3, a3, 0xF << 2 # mask FT field - lw a3, get_ft_d_tbl(a3) # switch on register number - j a3 - - .rdata -get_ft_d_tbl: - .word get_ft_d_f0 - .word get_ft_d_f2 - .word get_ft_d_f4 - .word get_ft_d_f6 - .word get_ft_d_f8 - .word get_ft_d_f10 - .word get_ft_d_f12 - .word get_ft_d_f14 - .word get_ft_d_f16 - .word get_ft_d_f18 - .word get_ft_d_f20 - .word get_ft_d_f22 - .word get_ft_d_f24 - .word get_ft_d_f26 - .word get_ft_d_f28 - .word get_ft_d_f30 - .text - -get_ft_d_f0: - mfc1 ta3, $f0 - mfc1 ta0, $f1 - b get_ft_d_done -get_ft_d_f2: - mfc1 ta3, $f2 - mfc1 ta0, $f3 - b get_ft_d_done -get_ft_d_f4: - mfc1 ta3, $f4 - mfc1 ta0, $f5 - b get_ft_d_done -get_ft_d_f6: - mfc1 ta3, $f6 - mfc1 ta0, $f7 - b get_ft_d_done -get_ft_d_f8: - mfc1 ta3, $f8 - mfc1 ta0, $f9 - b get_ft_d_done -get_ft_d_f10: - mfc1 ta3, $f10 - mfc1 ta0, $f11 - b get_ft_d_done -get_ft_d_f12: - mfc1 ta3, $f12 - mfc1 ta0, $f13 - b get_ft_d_done -get_ft_d_f14: - mfc1 ta3, $f14 - mfc1 ta0, $f15 - b get_ft_d_done -get_ft_d_f16: - mfc1 ta3, $f16 - mfc1 ta0, $f17 - b get_ft_d_done -get_ft_d_f18: - mfc1 ta3, $f18 - mfc1 ta0, $f19 - b get_ft_d_done -get_ft_d_f20: - mfc1 ta3, $f20 - mfc1 ta0, $f21 - b get_ft_d_done -get_ft_d_f22: - mfc1 ta3, $f22 - mfc1 ta0, $f23 - b get_ft_d_done -get_ft_d_f24: - mfc1 ta3, $f24 - mfc1 ta0, $f25 - b get_ft_d_done -get_ft_d_f26: - mfc1 ta3, $f26 - mfc1 ta0, $f27 - b get_ft_d_done -get_ft_d_f28: - mfc1 ta3, $f28 - mfc1 ta0, $f29 - b get_ft_d_done -get_ft_d_f30: - mfc1 ta3, $f30 - mfc1 ta0, $f31 -get_ft_d_done: - srl ta1, ta0, 20 # get exponent - and ta1, ta1, 0x7FF - and ta2, ta0, 0xFFFFF # get fraction - srl ta0, ta0, 31 # get sign - bne ta1, DEXP_INF, 1f # is it a signaling NAN? - and v0, ta2, DSIGNAL_NAN - bne v0, zero, invalid_d -1: - /* fall through to get FS */ - -/*---------------------------------------------------------------------------- - * get_fs_d -- - * - * Read (double precision) the FS register (bits 15-11) and - * break up into fields. - * This is an internal routine used by MipsEmulateFP only. - * - * Results: - * t0 contains the sign - * t1 contains the (biased) exponent - * t2 contains the fraction - * t3 contains the remaining fraction - * - *---------------------------------------------------------------------------- - */ -XLEAF(get_fs_d) - srl a3, a0, 12 - 2 # get FS field (even regs only) - and a3, a3, 0xF << 2 # mask FS field - lw a3, get_fs_d_tbl(a3) # switch on register number - j a3 - - .rdata -get_fs_d_tbl: - .word get_fs_d_f0 - .word get_fs_d_f2 - .word get_fs_d_f4 - .word get_fs_d_f6 - .word get_fs_d_f8 - .word get_fs_d_f10 - .word get_fs_d_f12 - .word get_fs_d_f14 - .word get_fs_d_f16 - .word get_fs_d_f18 - .word get_fs_d_f20 - .word get_fs_d_f22 - .word get_fs_d_f24 - .word get_fs_d_f26 - .word get_fs_d_f28 - .word get_fs_d_f30 - .text - -get_fs_d_f0: - mfc1 t3, $f0 - mfc1 t0, $f1 - b get_fs_d_done -get_fs_d_f2: - mfc1 t3, $f2 - mfc1 t0, $f3 - b get_fs_d_done -get_fs_d_f4: - mfc1 t3, $f4 - mfc1 t0, $f5 - b get_fs_d_done -get_fs_d_f6: - mfc1 t3, $f6 - mfc1 t0, $f7 - b get_fs_d_done -get_fs_d_f8: - mfc1 t3, $f8 - mfc1 t0, $f9 - b get_fs_d_done -get_fs_d_f10: - mfc1 t3, $f10 - mfc1 t0, $f11 - b get_fs_d_done -get_fs_d_f12: - mfc1 t3, $f12 - mfc1 t0, $f13 - b get_fs_d_done -get_fs_d_f14: - mfc1 t3, $f14 - mfc1 t0, $f15 - b get_fs_d_done -get_fs_d_f16: - mfc1 t3, $f16 - mfc1 t0, $f17 - b get_fs_d_done -get_fs_d_f18: - mfc1 t3, $f18 - mfc1 t0, $f19 - b get_fs_d_done -get_fs_d_f20: - mfc1 t3, $f20 - mfc1 t0, $f21 - b get_fs_d_done -get_fs_d_f22: - mfc1 t3, $f22 - mfc1 t0, $f23 - b get_fs_d_done -get_fs_d_f24: - mfc1 t3, $f24 - mfc1 t0, $f25 - b get_fs_d_done -get_fs_d_f26: - mfc1 t3, $f26 - mfc1 t0, $f27 - b get_fs_d_done -get_fs_d_f28: - mfc1 t3, $f28 - mfc1 t0, $f29 - b get_fs_d_done -get_fs_d_f30: - mfc1 t3, $f30 - mfc1 t0, $f31 -get_fs_d_done: - srl t1, t0, 20 # get exponent - and t1, t1, 0x7FF - and t2, t0, 0xFFFFF # get fraction - srl t0, t0, 31 # get sign - bne t1, DEXP_INF, 1f # is it a signaling NAN? - and v0, t2, DSIGNAL_NAN - bne v0, zero, invalid_d -1: - j ra -END(get_ft_fs_d) - -/*---------------------------------------------------------------------------- - * get_cmp_s -- - * - * Read (single precision) the FS register (bits 15-11) and - * the FT register (bits 20-16) and break up into fields. - * This is an internal routine used by MipsEmulateFP only. - * - * Results: - * t0 contains the sign - * t1 contains the (biased) exponent - * t2 contains the fraction - * ta0 contains the sign - * ta1 contains the (biased) exponent - * ta2 contains the fraction - * - *---------------------------------------------------------------------------- - */ -LEAF(get_cmp_s) - srl a3, a0, 12 - 2 # get FS field (even regs only) - and a3, a3, 0xF << 2 # mask FS field - lw a3, cmp_fs_s_tbl(a3) # switch on register number - j a3 - - .rdata -cmp_fs_s_tbl: - .word cmp_fs_s_f0 - .word cmp_fs_s_f2 - .word cmp_fs_s_f4 - .word cmp_fs_s_f6 - .word cmp_fs_s_f8 - .word cmp_fs_s_f10 - .word cmp_fs_s_f12 - .word cmp_fs_s_f14 - .word cmp_fs_s_f16 - .word cmp_fs_s_f18 - .word cmp_fs_s_f20 - .word cmp_fs_s_f22 - .word cmp_fs_s_f24 - .word cmp_fs_s_f26 - .word cmp_fs_s_f28 - .word cmp_fs_s_f30 - .text - -cmp_fs_s_f0: - mfc1 t0, $f0 - b cmp_fs_s_done -cmp_fs_s_f2: - mfc1 t0, $f2 - b cmp_fs_s_done -cmp_fs_s_f4: - mfc1 t0, $f4 - b cmp_fs_s_done -cmp_fs_s_f6: - mfc1 t0, $f6 - b cmp_fs_s_done -cmp_fs_s_f8: - mfc1 t0, $f8 - b cmp_fs_s_done -cmp_fs_s_f10: - mfc1 t0, $f10 - b cmp_fs_s_done -cmp_fs_s_f12: - mfc1 t0, $f12 - b cmp_fs_s_done -cmp_fs_s_f14: - mfc1 t0, $f14 - b cmp_fs_s_done -cmp_fs_s_f16: - mfc1 t0, $f16 - b cmp_fs_s_done -cmp_fs_s_f18: - mfc1 t0, $f18 - b cmp_fs_s_done -cmp_fs_s_f20: - mfc1 t0, $f20 - b cmp_fs_s_done -cmp_fs_s_f22: - mfc1 t0, $f22 - b cmp_fs_s_done -cmp_fs_s_f24: - mfc1 t0, $f24 - b cmp_fs_s_done -cmp_fs_s_f26: - mfc1 t0, $f26 - b cmp_fs_s_done -cmp_fs_s_f28: - mfc1 t0, $f28 - b cmp_fs_s_done -cmp_fs_s_f30: - mfc1 t0, $f30 -cmp_fs_s_done: - srl t1, t0, 23 # get exponent - and t1, t1, 0xFF - and t2, t0, 0x7FFFFF # get fraction - srl t0, t0, 31 # get sign - - srl a3, a0, 17 - 2 # get FT field (even regs only) - and a3, a3, 0xF << 2 # mask FT field - lw a3, cmp_ft_s_tbl(a3) # switch on register number - j a3 - - .rdata -cmp_ft_s_tbl: - .word cmp_ft_s_f0 - .word cmp_ft_s_f2 - .word cmp_ft_s_f4 - .word cmp_ft_s_f6 - .word cmp_ft_s_f8 - .word cmp_ft_s_f10 - .word cmp_ft_s_f12 - .word cmp_ft_s_f14 - .word cmp_ft_s_f16 - .word cmp_ft_s_f18 - .word cmp_ft_s_f20 - .word cmp_ft_s_f22 - .word cmp_ft_s_f24 - .word cmp_ft_s_f26 - .word cmp_ft_s_f28 - .word cmp_ft_s_f30 - .text - -cmp_ft_s_f0: - mfc1 ta0, $f0 - b cmp_ft_s_done -cmp_ft_s_f2: - mfc1 ta0, $f2 - b cmp_ft_s_done -cmp_ft_s_f4: - mfc1 ta0, $f4 - b cmp_ft_s_done -cmp_ft_s_f6: - mfc1 ta0, $f6 - b cmp_ft_s_done -cmp_ft_s_f8: - mfc1 ta0, $f8 - b cmp_ft_s_done -cmp_ft_s_f10: - mfc1 ta0, $f10 - b cmp_ft_s_done -cmp_ft_s_f12: - mfc1 ta0, $f12 - b cmp_ft_s_done -cmp_ft_s_f14: - mfc1 ta0, $f14 - b cmp_ft_s_done -cmp_ft_s_f16: - mfc1 ta0, $f16 - b cmp_ft_s_done -cmp_ft_s_f18: - mfc1 ta0, $f18 - b cmp_ft_s_done -cmp_ft_s_f20: - mfc1 ta0, $f20 - b cmp_ft_s_done -cmp_ft_s_f22: - mfc1 ta0, $f22 - b cmp_ft_s_done -cmp_ft_s_f24: - mfc1 ta0, $f24 - b cmp_ft_s_done -cmp_ft_s_f26: - mfc1 ta0, $f26 - b cmp_ft_s_done -cmp_ft_s_f28: - mfc1 ta0, $f28 - b cmp_ft_s_done -cmp_ft_s_f30: - mfc1 ta0, $f30 -cmp_ft_s_done: - srl ta1, ta0, 23 # get exponent - and ta1, ta1, 0xFF - and ta2, ta0, 0x7FFFFF # get fraction - srl ta0, ta0, 31 # get sign - j ra -END(get_cmp_s) - -/*---------------------------------------------------------------------------- - * get_cmp_d -- - * - * Read (double precision) the FS register (bits 15-11) and - * the FT register (bits 20-16) and break up into fields. - * This is an internal routine used by MipsEmulateFP only. - * - * Results: - * t0 contains the sign - * t1 contains the (biased) exponent - * t2 contains the fraction - * t3 contains the remaining fraction - * ta0 contains the sign - * ta1 contains the (biased) exponent - * ta2 contains the fraction - * ta3 contains the remaining fraction - * - *---------------------------------------------------------------------------- - */ -LEAF(get_cmp_d) - srl a3, a0, 12 - 2 # get FS field (even regs only) - and a3, a3, 0xF << 2 # mask FS field - lw a3, cmp_fs_d_tbl(a3) # switch on register number - j a3 - - .rdata -cmp_fs_d_tbl: - .word cmp_fs_d_f0 - .word cmp_fs_d_f2 - .word cmp_fs_d_f4 - .word cmp_fs_d_f6 - .word cmp_fs_d_f8 - .word cmp_fs_d_f10 - .word cmp_fs_d_f12 - .word cmp_fs_d_f14 - .word cmp_fs_d_f16 - .word cmp_fs_d_f18 - .word cmp_fs_d_f20 - .word cmp_fs_d_f22 - .word cmp_fs_d_f24 - .word cmp_fs_d_f26 - .word cmp_fs_d_f28 - .word cmp_fs_d_f30 - .text - -cmp_fs_d_f0: - mfc1 t3, $f0 - mfc1 t0, $f1 - b cmp_fs_d_done -cmp_fs_d_f2: - mfc1 t3, $f2 - mfc1 t0, $f3 - b cmp_fs_d_done -cmp_fs_d_f4: - mfc1 t3, $f4 - mfc1 t0, $f5 - b cmp_fs_d_done -cmp_fs_d_f6: - mfc1 t3, $f6 - mfc1 t0, $f7 - b cmp_fs_d_done -cmp_fs_d_f8: - mfc1 t3, $f8 - mfc1 t0, $f9 - b cmp_fs_d_done -cmp_fs_d_f10: - mfc1 t3, $f10 - mfc1 t0, $f11 - b cmp_fs_d_done -cmp_fs_d_f12: - mfc1 t3, $f12 - mfc1 t0, $f13 - b cmp_fs_d_done -cmp_fs_d_f14: - mfc1 t3, $f14 - mfc1 t0, $f15 - b cmp_fs_d_done -cmp_fs_d_f16: - mfc1 t3, $f16 - mfc1 t0, $f17 - b cmp_fs_d_done -cmp_fs_d_f18: - mfc1 t3, $f18 - mfc1 t0, $f19 - b cmp_fs_d_done -cmp_fs_d_f20: - mfc1 t3, $f20 - mfc1 t0, $f21 - b cmp_fs_d_done -cmp_fs_d_f22: - mfc1 t3, $f22 - mfc1 t0, $f23 - b cmp_fs_d_done -cmp_fs_d_f24: - mfc1 t3, $f24 - mfc1 t0, $f25 - b cmp_fs_d_done -cmp_fs_d_f26: - mfc1 t3, $f26 - mfc1 t0, $f27 - b cmp_fs_d_done -cmp_fs_d_f28: - mfc1 t3, $f28 - mfc1 t0, $f29 - b cmp_fs_d_done -cmp_fs_d_f30: - mfc1 t3, $f30 - mfc1 t0, $f31 -cmp_fs_d_done: - srl t1, t0, 20 # get exponent - and t1, t1, 0x7FF - and t2, t0, 0xFFFFF # get fraction - srl t0, t0, 31 # get sign - - srl a3, a0, 17 - 2 # get FT field (even regs only) - and a3, a3, 0xF << 2 # mask FT field - lw a3, cmp_ft_d_tbl(a3) # switch on register number - j a3 - - .rdata -cmp_ft_d_tbl: - .word cmp_ft_d_f0 - .word cmp_ft_d_f2 - .word cmp_ft_d_f4 - .word cmp_ft_d_f6 - .word cmp_ft_d_f8 - .word cmp_ft_d_f10 - .word cmp_ft_d_f12 - .word cmp_ft_d_f14 - .word cmp_ft_d_f16 - .word cmp_ft_d_f18 - .word cmp_ft_d_f20 - .word cmp_ft_d_f22 - .word cmp_ft_d_f24 - .word cmp_ft_d_f26 - .word cmp_ft_d_f28 - .word cmp_ft_d_f30 - .text - -cmp_ft_d_f0: - mfc1 ta3, $f0 - mfc1 ta0, $f1 - b cmp_ft_d_done -cmp_ft_d_f2: - mfc1 ta3, $f2 - mfc1 ta0, $f3 - b cmp_ft_d_done -cmp_ft_d_f4: - mfc1 ta3, $f4 - mfc1 ta0, $f5 - b cmp_ft_d_done -cmp_ft_d_f6: - mfc1 ta3, $f6 - mfc1 ta0, $f7 - b cmp_ft_d_done -cmp_ft_d_f8: - mfc1 ta3, $f8 - mfc1 ta0, $f9 - b cmp_ft_d_done -cmp_ft_d_f10: - mfc1 ta3, $f10 - mfc1 ta0, $f11 - b cmp_ft_d_done -cmp_ft_d_f12: - mfc1 ta3, $f12 - mfc1 ta0, $f13 - b cmp_ft_d_done -cmp_ft_d_f14: - mfc1 ta3, $f14 - mfc1 ta0, $f15 - b cmp_ft_d_done -cmp_ft_d_f16: - mfc1 ta3, $f16 - mfc1 ta0, $f17 - b cmp_ft_d_done -cmp_ft_d_f18: - mfc1 ta3, $f18 - mfc1 ta0, $f19 - b cmp_ft_d_done -cmp_ft_d_f20: - mfc1 ta3, $f20 - mfc1 ta0, $f21 - b cmp_ft_d_done -cmp_ft_d_f22: - mfc1 ta3, $f22 - mfc1 ta0, $f23 - b cmp_ft_d_done -cmp_ft_d_f24: - mfc1 ta3, $f24 - mfc1 ta0, $f25 - b cmp_ft_d_done -cmp_ft_d_f26: - mfc1 ta3, $f26 - mfc1 ta0, $f27 - b cmp_ft_d_done -cmp_ft_d_f28: - mfc1 ta3, $f28 - mfc1 ta0, $f29 - b cmp_ft_d_done -cmp_ft_d_f30: - mfc1 ta3, $f30 - mfc1 ta0, $f31 -cmp_ft_d_done: - srl ta1, ta0, 20 # get exponent - and ta1, ta1, 0x7FF - and ta2, ta0, 0xFFFFF # get fraction - srl ta0, ta0, 31 # get sign - j ra -END(get_cmp_d) - -/*---------------------------------------------------------------------------- - * set_fd_s -- - * - * Write (single precision) the FD register (bits 10-6). - * This is an internal routine used by MipsEmulateFP only. - * - * Arguments: - * a0 contains the FP instruction - * t0 contains the sign - * t1 contains the (biased) exponent - * t2 contains the fraction - * - * set_fd_word -- - * - * Write (integer) the FD register (bits 10-6). - * This is an internal routine used by MipsEmulateFP only. - * - * Arguments: - * a0 contains the FP instruction - * t2 contains the integer - * - *---------------------------------------------------------------------------- - */ -LEAF(set_fd_s) - sll t0, t0, 31 # position sign - sll t1, t1, 23 # position exponent - or t2, t2, t0 - or t2, t2, t1 -XLEAF(set_fd_word) - srl a3, a0, 7 - 2 # get FD field (even regs only) - and a3, a3, 0xF << 2 # mask FT field - lw a3, set_fd_s_tbl(a3) # switch on register number - j a3 - - .rdata -set_fd_s_tbl: - .word set_fd_s_f0 - .word set_fd_s_f2 - .word set_fd_s_f4 - .word set_fd_s_f6 - .word set_fd_s_f8 - .word set_fd_s_f10 - .word set_fd_s_f12 - .word set_fd_s_f14 - .word set_fd_s_f16 - .word set_fd_s_f18 - .word set_fd_s_f20 - .word set_fd_s_f22 - .word set_fd_s_f24 - .word set_fd_s_f26 - .word set_fd_s_f28 - .word set_fd_s_f30 - .text - -set_fd_s_f0: - mtc1 t2, $f0 - j ra -set_fd_s_f2: - mtc1 t2, $f2 - j ra -set_fd_s_f4: - mtc1 t2, $f4 - j ra -set_fd_s_f6: - mtc1 t2, $f6 - j ra -set_fd_s_f8: - mtc1 t2, $f8 - j ra -set_fd_s_f10: - mtc1 t2, $f10 - j ra -set_fd_s_f12: - mtc1 t2, $f12 - j ra -set_fd_s_f14: - mtc1 t2, $f14 - j ra -set_fd_s_f16: - mtc1 t2, $f16 - j ra -set_fd_s_f18: - mtc1 t2, $f18 - j ra -set_fd_s_f20: - mtc1 t2, $f20 - j ra -set_fd_s_f22: - mtc1 t2, $f22 - j ra -set_fd_s_f24: - mtc1 t2, $f24 - j ra -set_fd_s_f26: - mtc1 t2, $f26 - j ra -set_fd_s_f28: - mtc1 t2, $f28 - j ra -set_fd_s_f30: - mtc1 t2, $f30 - j ra -END(set_fd_s) - -/*---------------------------------------------------------------------------- - * set_fd_d -- - * - * Write (double precision) the FT register (bits 10-6). - * This is an internal routine used by MipsEmulateFP only. - * - * Arguments: - * a0 contains the FP instruction - * t0 contains the sign - * t1 contains the (biased) exponent - * t2 contains the fraction - * t3 contains the remaining fraction - * - *---------------------------------------------------------------------------- - */ -LEAF(set_fd_d) - sll t0, t0, 31 # set sign - sll t1, t1, 20 # set exponent - or t0, t0, t1 - or t0, t0, t2 # set fraction - srl a3, a0, 7 - 2 # get FD field (even regs only) - and a3, a3, 0xF << 2 # mask FD field - lw a3, set_fd_d_tbl(a3) # switch on register number - j a3 - - .rdata -set_fd_d_tbl: - .word set_fd_d_f0 - .word set_fd_d_f2 - .word set_fd_d_f4 - .word set_fd_d_f6 - .word set_fd_d_f8 - .word set_fd_d_f10 - .word set_fd_d_f12 - .word set_fd_d_f14 - .word set_fd_d_f16 - .word set_fd_d_f18 - .word set_fd_d_f20 - .word set_fd_d_f22 - .word set_fd_d_f24 - .word set_fd_d_f26 - .word set_fd_d_f28 - .word set_fd_d_f30 - .text - -set_fd_d_f0: - mtc1 t3, $f0 - mtc1 t0, $f1 - j ra -set_fd_d_f2: - mtc1 t3, $f2 - mtc1 t0, $f3 - j ra -set_fd_d_f4: - mtc1 t3, $f4 - mtc1 t0, $f5 - j ra -set_fd_d_f6: - mtc1 t3, $f6 - mtc1 t0, $f7 - j ra -set_fd_d_f8: - mtc1 t3, $f8 - mtc1 t0, $f9 - j ra -set_fd_d_f10: - mtc1 t3, $f10 - mtc1 t0, $f11 - j ra -set_fd_d_f12: - mtc1 t3, $f12 - mtc1 t0, $f13 - j ra -set_fd_d_f14: - mtc1 t3, $f14 - mtc1 t0, $f15 - j ra -set_fd_d_f16: - mtc1 t3, $f16 - mtc1 t0, $f17 - j ra -set_fd_d_f18: - mtc1 t3, $f18 - mtc1 t0, $f19 - j ra -set_fd_d_f20: - mtc1 t3, $f20 - mtc1 t0, $f21 - j ra -set_fd_d_f22: - mtc1 t3, $f22 - mtc1 t0, $f23 - j ra -set_fd_d_f24: - mtc1 t3, $f24 - mtc1 t0, $f25 - j ra -set_fd_d_f26: - mtc1 t3, $f26 - mtc1 t0, $f27 - j ra -set_fd_d_f28: - mtc1 t3, $f28 - mtc1 t0, $f29 - j ra -set_fd_d_f30: - mtc1 t3, $f30 - mtc1 t0, $f31 - j ra -END(set_fd_d) - -/*---------------------------------------------------------------------------- - * renorm_fs_s -- - * - * Results: - * t1 unbiased exponent - * t2 normalized fraction - * - *---------------------------------------------------------------------------- - */ -LEAF(renorm_fs_s) -/* - * Find out how many leading zero bits are in t2 and put in t9. - */ - move v0, t2 - move t9, zero - srl v1, v0, 16 - bne v1, zero, 1f - addu t9, 16 - sll v0, 16 -1: - srl v1, v0, 24 - bne v1, zero, 1f - addu t9, 8 - sll v0, 8 -1: - srl v1, v0, 28 - bne v1, zero, 1f - addu t9, 4 - sll v0, 4 -1: - srl v1, v0, 30 - bne v1, zero, 1f - addu t9, 2 - sll v0, 2 -1: - srl v1, v0, 31 - bne v1, zero, 1f - addu t9, 1 -/* - * Now shift t2 the correct number of bits. - */ -1: - subu t9, t9, SLEAD_ZEROS # dont count normal leading zeros - li t1, SEXP_MIN - subu t1, t1, t9 # adjust exponent - sll t2, t2, t9 - j ra -END(renorm_fs_s) - -/*---------------------------------------------------------------------------- - * renorm_fs_d -- - * - * Results: - * t1 unbiased exponent - * t2,t3 normalized fraction - * - *---------------------------------------------------------------------------- - */ -LEAF(renorm_fs_d) -/* - * Find out how many leading zero bits are in t2,t3 and put in t9. - */ - move v0, t2 - move t9, zero - bne t2, zero, 1f - move v0, t3 - addu t9, 32 -1: - srl v1, v0, 16 - bne v1, zero, 1f - addu t9, 16 - sll v0, 16 -1: - srl v1, v0, 24 - bne v1, zero, 1f - addu t9, 8 - sll v0, 8 -1: - srl v1, v0, 28 - bne v1, zero, 1f - addu t9, 4 - sll v0, 4 -1: - srl v1, v0, 30 - bne v1, zero, 1f - addu t9, 2 - sll v0, 2 -1: - srl v1, v0, 31 - bne v1, zero, 1f - addu t9, 1 -/* - * Now shift t2,t3 the correct number of bits. - */ -1: - subu t9, t9, DLEAD_ZEROS # dont count normal leading zeros - li t1, DEXP_MIN - subu t1, t1, t9 # adjust exponent - li v0, 32 - blt t9, v0, 1f - subu t9, t9, v0 # shift fraction left >= 32 bits - sll t2, t3, t9 - move t3, zero - j ra -1: - subu v0, v0, t9 # shift fraction left < 32 bits - sll t2, t2, t9 - srl v1, t3, v0 - or t2, t2, v1 - sll t3, t3, t9 - j ra -END(renorm_fs_d) - -/*---------------------------------------------------------------------------- - * renorm_ft_s -- - * - * Results: - * ta1 unbiased exponent - * ta2 normalized fraction - * - *---------------------------------------------------------------------------- - */ -LEAF(renorm_ft_s) -/* - * Find out how many leading zero bits are in ta2 and put in t9. - */ - move v0, ta2 - move t9, zero - srl v1, v0, 16 - bne v1, zero, 1f - addu t9, 16 - sll v0, 16 -1: - srl v1, v0, 24 - bne v1, zero, 1f - addu t9, 8 - sll v0, 8 -1: - srl v1, v0, 28 - bne v1, zero, 1f - addu t9, 4 - sll v0, 4 -1: - srl v1, v0, 30 - bne v1, zero, 1f - addu t9, 2 - sll v0, 2 -1: - srl v1, v0, 31 - bne v1, zero, 1f - addu t9, 1 -/* - * Now shift ta2 the correct number of bits. - */ -1: - subu t9, t9, SLEAD_ZEROS # dont count normal leading zeros - li ta1, SEXP_MIN - subu ta1, ta1, t9 # adjust exponent - sll ta2, ta2, t9 - j ra -END(renorm_ft_s) - -/*---------------------------------------------------------------------------- - * renorm_ft_d -- - * - * Results: - * ta1 unbiased exponent - * ta2,ta3 normalized fraction - * - *---------------------------------------------------------------------------- - */ -LEAF(renorm_ft_d) -/* - * Find out how many leading zero bits are in ta2,ta3 and put in t9. - */ - move v0, ta2 - move t9, zero - bne ta2, zero, 1f - move v0, ta3 - addu t9, 32 -1: - srl v1, v0, 16 - bne v1, zero, 1f - addu t9, 16 - sll v0, 16 -1: - srl v1, v0, 24 - bne v1, zero, 1f - addu t9, 8 - sll v0, 8 -1: - srl v1, v0, 28 - bne v1, zero, 1f - addu t9, 4 - sll v0, 4 -1: - srl v1, v0, 30 - bne v1, zero, 1f - addu t9, 2 - sll v0, 2 -1: - srl v1, v0, 31 - bne v1, zero, 1f - addu t9, 1 -/* - * Now shift ta2,ta3 the correct number of bits. - */ -1: - subu t9, t9, DLEAD_ZEROS # dont count normal leading zeros - li ta1, DEXP_MIN - subu ta1, ta1, t9 # adjust exponent - li v0, 32 - blt t9, v0, 1f - subu t9, t9, v0 # shift fraction left >= 32 bits - sll ta2, ta3, t9 - move ta3, zero - j ra -1: - subu v0, v0, t9 # shift fraction left < 32 bits - sll ta2, ta2, t9 - srl v1, ta3, v0 - or ta2, ta2, v1 - sll ta3, ta3, t9 - j ra -END(renorm_ft_d) diff --git a/sys/mips/mips/freebsd32_machdep.c b/sys/mips/mips/freebsd32_machdep.c deleted file mode 100644 index 5ecf1812e7d..00000000000 --- a/sys/mips/mips/freebsd32_machdep.c +++ /dev/null @@ -1,489 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Based on nwhitehorn's COMPAT_FREEBSD32 support code for PowerPC64. - */ - -#define __ELF_WORD_SIZE 32 - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include - -#include -#include -#include - -static int get_mcontext32(struct thread *, mcontext32_t *, int); -static int set_mcontext32(struct thread *, mcontext32_t *); -static void freebsd32_sendsig(sig_t, ksiginfo_t *, sigset_t *); - -extern const char *freebsd32_syscallnames[]; - -struct sysentvec elf32_freebsd_sysvec = { - .sv_size = SYS_MAXSYSCALL, - .sv_table = freebsd32_sysent, - .sv_fixup = __elfN(freebsd_fixup), - .sv_sendsig = freebsd32_sendsig, - .sv_sigcode = sigcode32, - .sv_szsigcode = &szsigcode32, - .sv_name = "FreeBSD ELF32", - .sv_coredump = __elfN(coredump), - .sv_elf_core_osabi = ELFOSABI_FREEBSD, - .sv_elf_core_abi_vendor = FREEBSD_ABI_VENDOR, - .sv_elf_core_prepare_notes = __elfN(prepare_notes), - .sv_imgact_try = NULL, - .sv_minsigstksz = MINSIGSTKSZ, - .sv_minuser = VM_MIN_ADDRESS, - .sv_maxuser = ((vm_offset_t)0x80000000), - .sv_usrstack = FREEBSD32_USRSTACK, - .sv_psstrings = FREEBSD32_PS_STRINGS, - .sv_stackprot = VM_PROT_ALL, - .sv_copyout_auxargs = __elfN(freebsd_copyout_auxargs), - .sv_copyout_strings = freebsd32_copyout_strings, - .sv_setregs = exec_setregs, - .sv_fixlimit = NULL, - .sv_maxssiz = NULL, - .sv_flags = SV_ABI_FREEBSD | SV_ILP32 | SV_RNG_SEED_VER, - .sv_set_syscall_retval = cpu_set_syscall_retval, - .sv_fetch_syscall_args = cpu_fetch_syscall_args, - .sv_syscallnames = freebsd32_syscallnames, - .sv_schedtail = NULL, - .sv_thread_detach = NULL, - .sv_trap = NULL, - .sv_onexec_old = exec_onexec_old, - .sv_onexit = exit_onexit, - .sv_regset_begin = SET_BEGIN(__elfN(regset)), - .sv_regset_end = SET_LIMIT(__elfN(regset)), -}; -INIT_SYSENTVEC(elf32_sysvec, &elf32_freebsd_sysvec); - -static Elf32_Brandinfo freebsd_brand_info = { - .brand = ELFOSABI_FREEBSD, - .machine = EM_MIPS, - .compat_3_brand = "FreeBSD", - .emul_path = NULL, - .interp_path = "/libexec/ld-elf.so.1", - .sysvec = &elf32_freebsd_sysvec, - .interp_newpath = "/libexec/ld-elf32.so.1", - .brand_note = &elf32_freebsd_brandnote, - .flags = BI_CAN_EXEC_DYN | BI_BRAND_NOTE -}; - -SYSINIT(elf32, SI_SUB_EXEC, SI_ORDER_FIRST, - (sysinit_cfunc_t) elf32_insert_brand_entry, - &freebsd_brand_info); - -int -set_regs32(struct thread *td, struct reg32 *regs) -{ - struct reg r; - unsigned i; - - for (i = 0; i < NUMSAVEREGS; i++) - r.r_regs[i] = regs->r_regs[i]; - - return (set_regs(td, &r)); -} - -int -fill_regs32(struct thread *td, struct reg32 *regs) -{ - struct reg r; - unsigned i; - int error; - - error = fill_regs(td, &r); - if (error != 0) - return (error); - - for (i = 0; i < NUMSAVEREGS; i++) - regs->r_regs[i] = r.r_regs[i]; - - return (0); -} - -int -set_fpregs32(struct thread *td, struct fpreg32 *fpregs) -{ - struct fpreg fp; - unsigned i; - - for (i = 0; i < NUMFPREGS; i++) - fp.r_regs[i] = fpregs->r_regs[i]; - - return (set_fpregs(td, &fp)); -} - -int -fill_fpregs32(struct thread *td, struct fpreg32 *fpregs) -{ - struct fpreg fp; - unsigned i; - int error; - - error = fill_fpregs(td, &fp); - if (error != 0) - return (error); - - for (i = 0; i < NUMFPREGS; i++) - fpregs->r_regs[i] = fp.r_regs[i]; - - return (0); -} - -static int -get_mcontext32(struct thread *td, mcontext32_t *mcp, int flags) -{ - mcontext_t mcp64; - unsigned i; - int error; - - error = get_mcontext(td, &mcp64, flags); - if (error != 0) - return (error); - - mcp->mc_onstack = mcp64.mc_onstack; - mcp->mc_pc = mcp64.mc_pc; - for (i = 0; i < 32; i++) - mcp->mc_regs[i] = mcp64.mc_regs[i]; - mcp->sr = mcp64.sr; - mcp->mullo = mcp64.mullo; - mcp->mulhi = mcp64.mulhi; - mcp->mc_fpused = mcp64.mc_fpused; - for (i = 0; i < 33; i++) - mcp->mc_fpregs[i] = mcp64.mc_fpregs[i]; - mcp->mc_fpc_eir = mcp64.mc_fpc_eir; - mcp->mc_tls = (int32_t)(intptr_t)mcp64.mc_tls; - - return (0); -} - -static int -set_mcontext32(struct thread *td, mcontext32_t *mcp) -{ - mcontext_t mcp64; - unsigned i; - - mcp64.mc_onstack = mcp->mc_onstack; - mcp64.mc_pc = mcp->mc_pc; - for (i = 0; i < 32; i++) - mcp64.mc_regs[i] = mcp->mc_regs[i]; - mcp64.sr = mcp->sr; - mcp64.mullo = mcp->mullo; - mcp64.mulhi = mcp->mulhi; - mcp64.mc_fpused = mcp->mc_fpused; - for (i = 0; i < 33; i++) - mcp64.mc_fpregs[i] = mcp->mc_fpregs[i]; - mcp64.mc_fpc_eir = mcp->mc_fpc_eir; - mcp64.mc_tls = (void *)(intptr_t)mcp->mc_tls; - - return (set_mcontext(td, &mcp64)); -} - -int -freebsd32_sigreturn(struct thread *td, struct freebsd32_sigreturn_args *uap) -{ - ucontext32_t uc; - int error; - - CTR2(KTR_SIG, "sigreturn: td=%p ucp=%p", td, uap->sigcntxp); - - if (copyin(uap->sigcntxp, &uc, sizeof(uc)) != 0) { - CTR1(KTR_SIG, "sigreturn: efault td=%p", td); - return (EFAULT); - } - - error = set_mcontext32(td, &uc.uc_mcontext); - if (error != 0) - return (error); - - kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); - -#if 0 - CTR3(KTR_SIG, "sigreturn: return td=%p pc=%#x sp=%#x", - td, uc.uc_mcontext.mc_srr0, uc.uc_mcontext.mc_gpr[1]); -#endif - - return (EJUSTRETURN); -} - -/* - * The first two fields of a ucontext_t are the signal mask and the machine - * context. The next field is uc_link; we want to avoid destroying the link - * when copying out contexts. - */ -#define UC32_COPY_SIZE offsetof(ucontext32_t, uc_link) - -int -freebsd32_getcontext(struct thread *td, struct freebsd32_getcontext_args *uap) -{ - ucontext32_t uc; - int ret; - - if (uap->ucp == NULL) - ret = EINVAL; - else { - bzero(&uc, sizeof(uc)); - get_mcontext32(td, &uc.uc_mcontext, GET_MC_CLEAR_RET); - PROC_LOCK(td->td_proc); - uc.uc_sigmask = td->td_sigmask; - PROC_UNLOCK(td->td_proc); - ret = copyout(&uc, uap->ucp, UC32_COPY_SIZE); - } - return (ret); -} - -int -freebsd32_setcontext(struct thread *td, struct freebsd32_setcontext_args *uap) -{ - ucontext32_t uc; - int ret; - - if (uap->ucp == NULL) - ret = EINVAL; - else { - ret = copyin(uap->ucp, &uc, UC32_COPY_SIZE); - if (ret == 0) { - ret = set_mcontext32(td, &uc.uc_mcontext); - if (ret == 0) { - kern_sigprocmask(td, SIG_SETMASK, - &uc.uc_sigmask, NULL, 0); - } - } - } - return (ret == 0 ? EJUSTRETURN : ret); -} - -int -freebsd32_swapcontext(struct thread *td, struct freebsd32_swapcontext_args *uap) -{ - ucontext32_t uc; - int ret; - - if (uap->oucp == NULL || uap->ucp == NULL) - ret = EINVAL; - else { - bzero(&uc, sizeof(uc)); - get_mcontext32(td, &uc.uc_mcontext, GET_MC_CLEAR_RET); - PROC_LOCK(td->td_proc); - uc.uc_sigmask = td->td_sigmask; - PROC_UNLOCK(td->td_proc); - ret = copyout(&uc, uap->oucp, UC32_COPY_SIZE); - if (ret == 0) { - ret = copyin(uap->ucp, &uc, UC32_COPY_SIZE); - if (ret == 0) { - ret = set_mcontext32(td, &uc.uc_mcontext); - if (ret == 0) { - kern_sigprocmask(td, SIG_SETMASK, - &uc.uc_sigmask, NULL, 0); - } - } - } - } - return (ret == 0 ? EJUSTRETURN : ret); -} - -#define UCONTEXT_MAGIC 0xACEDBADE - -/* - * Send an interrupt to process. - * - * Stack is set up to allow sigcode stored - * at top to call routine, followed by kcall - * to sigreturn routine below. After sigreturn - * resets the signal mask, the stack, and the - * frame pointer, it returns to the user - * specified pc, psl. - */ -static void -freebsd32_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) -{ - struct proc *p; - struct thread *td; - struct fpreg32 fpregs; - struct reg32 regs; - struct sigacts *psp; - struct sigframe32 sf, *sfp; - int sig; - int oonstack; - unsigned i; - - td = curthread; - p = td->td_proc; - PROC_LOCK_ASSERT(p, MA_OWNED); - sig = ksi->ksi_signo; - psp = p->p_sigacts; - mtx_assert(&psp->ps_mtx, MA_OWNED); - - fill_regs32(td, ®s); - oonstack = sigonstack(td->td_frame->sp); - - /* save user context */ - bzero(&sf, sizeof sf); - sf.sf_uc.uc_sigmask = *mask; - sf.sf_uc.uc_stack.ss_sp = (int32_t)(intptr_t)td->td_sigstk.ss_sp; - sf.sf_uc.uc_stack.ss_size = td->td_sigstk.ss_size; - sf.sf_uc.uc_stack.ss_flags = td->td_sigstk.ss_flags; - sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; - sf.sf_uc.uc_mcontext.mc_pc = regs.r_regs[PC]; - sf.sf_uc.uc_mcontext.mullo = regs.r_regs[MULLO]; - sf.sf_uc.uc_mcontext.mulhi = regs.r_regs[MULHI]; - sf.sf_uc.uc_mcontext.mc_tls = (int32_t)(intptr_t)td->td_md.md_tls; - sf.sf_uc.uc_mcontext.mc_regs[0] = UCONTEXT_MAGIC; /* magic number */ - for (i = 1; i < 32; i++) - sf.sf_uc.uc_mcontext.mc_regs[i] = regs.r_regs[i]; - sf.sf_uc.uc_mcontext.mc_fpused = td->td_md.md_flags & MDTD_FPUSED; - if (sf.sf_uc.uc_mcontext.mc_fpused) { - /* if FPU has current state, save it first */ - if (td == PCPU_GET(fpcurthread)) - MipsSaveCurFPState(td); - fill_fpregs32(td, &fpregs); - for (i = 0; i < 33; i++) - sf.sf_uc.uc_mcontext.mc_fpregs[i] = fpregs.r_regs[i]; - } - - /* Allocate and validate space for the signal handler context. */ - if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && - SIGISMEMBER(psp->ps_sigonstack, sig)) { - sfp = (struct sigframe32 *)(((uintptr_t)td->td_sigstk.ss_sp + - td->td_sigstk.ss_size - sizeof(struct sigframe32)) - & ~(sizeof(__int64_t) - 1)); - } else - sfp = (struct sigframe32 *)((vm_offset_t)(td->td_frame->sp - - sizeof(struct sigframe32)) & ~(sizeof(__int64_t) - 1)); - - /* Build the argument list for the signal handler. */ - td->td_frame->a0 = sig; - td->td_frame->a2 = (register_t)(intptr_t)&sfp->sf_uc; - if (SIGISMEMBER(psp->ps_siginfo, sig)) { - /* Signal handler installed with SA_SIGINFO. */ - td->td_frame->a1 = (register_t)(intptr_t)&sfp->sf_si; - /* sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; */ - - /* fill siginfo structure */ - sf.sf_si.si_signo = sig; - sf.sf_si.si_code = ksi->ksi_code; - sf.sf_si.si_addr = td->td_frame->badvaddr; - } else { - /* Old FreeBSD-style arguments. */ - td->td_frame->a1 = ksi->ksi_code; - td->td_frame->a3 = td->td_frame->badvaddr; - /* sf.sf_ahu.sf_handler = catcher; */ - } - - mtx_unlock(&psp->ps_mtx); - PROC_UNLOCK(p); - - /* - * Copy the sigframe out to the user's stack. - */ - if (copyout(&sf, sfp, sizeof(struct sigframe32)) != 0) { - /* - * Something is wrong with the stack pointer. - * ...Kill the process. - */ - PROC_LOCK(p); - sigexit(td, SIGILL); - } - - td->td_frame->pc = (register_t)(intptr_t)catcher; - td->td_frame->t9 = (register_t)(intptr_t)catcher; - td->td_frame->sp = (register_t)(intptr_t)sfp; - /* - * Signal trampoline code is at base of user stack. - */ - td->td_frame->ra = (register_t)(intptr_t)FREEBSD32_PS_STRINGS - *(p->p_sysent->sv_szsigcode); - PROC_LOCK(p); - mtx_lock(&psp->ps_mtx); -} - -int -freebsd32_sysarch(struct thread *td, struct freebsd32_sysarch_args *uap) -{ - int error; - int32_t tlsbase; - - switch (uap->op) { - case MIPS_SET_TLS: - td->td_md.md_tls = (void *)(intptr_t)uap->parms; - - /* - * If there is an user local register implementation (ULRI) - * update it as well. Add the TLS and TCB offsets so the - * value in this register is adjusted like in the case of the - * rdhwr trap() instruction handler. - */ - if (cpuinfo.userlocal_reg == true) { - mips_wr_userlocal((unsigned long)(uap->parms + - td->td_proc->p_md.md_tls_tcb_offset)); - } - return (0); - case MIPS_GET_TLS: - tlsbase = (int32_t)(intptr_t)td->td_md.md_tls; - error = copyout(&tlsbase, uap->parms, sizeof(tlsbase)); - return (error); - default: - break; - } - return (EINVAL); -} - -void -elf32_dump_thread(struct thread *td __unused, void *dst __unused, - size_t *off __unused) -{ -} diff --git a/sys/mips/mips/gdb_machdep.c b/sys/mips/mips/gdb_machdep.c deleted file mode 100644 index ec7828d7f96..00000000000 --- a/sys/mips/mips/gdb_machdep.c +++ /dev/null @@ -1,189 +0,0 @@ -/* $NetBSD: kgdb_machdep.c,v 1.11 2005/12/24 22:45:35 perry Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause AND BSD-2-Clause - * - * Copyright (c) 2004 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*- - * Copyright (c) 1997 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, - * NASA Ames Research Center. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Copyright (c) 1996 Matthias Pfaller. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Matthias Pfaller. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * JNPR: gdb_machdep.c,v 1.1 2007/08/09 12:25:25 katta - */ - -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -void * -gdb_cpu_getreg(int regnum, size_t *regsz) -{ - - *regsz = gdb_cpu_regsz(regnum); - if (kdb_thread == curthread) { - register_t *zero_ptr = &kdb_frame->zero; - return zero_ptr + regnum; - } - - switch (regnum) { - /* - * S0..S7 - */ - case 16: - case 17: - case 18: - case 19: - case 20: - case 21: - case 22: - case 23: - return (&kdb_thrctx->pcb_context[PCB_REG_S0 + regnum - 16]); - case 28: - return (&kdb_thrctx->pcb_context[PCB_REG_GP]); - case 29: - return (&kdb_thrctx->pcb_context[PCB_REG_SP]); - case 30: - return (&kdb_thrctx->pcb_context[PCB_REG_S8]); - case 31: - return (&kdb_thrctx->pcb_context[PCB_REG_RA]); - case 37: - return (&kdb_thrctx->pcb_context[PCB_REG_PC]); - } - return (NULL); -} - -void -gdb_cpu_setreg(int regnum, void *val) -{ - switch (regnum) { - case GDB_REG_PC: - kdb_thrctx->pcb_context[10] = *(register_t *)val; - if (kdb_thread == curthread) - kdb_frame->pc = *(register_t *)val; - } -} - -int -gdb_cpu_signal(int entry, int code) -{ - switch (entry) { - case T_TLB_MOD: - case T_TLB_MOD+T_USER: - case T_TLB_LD_MISS: - case T_TLB_ST_MISS: - case T_TLB_LD_MISS+T_USER: - case T_TLB_ST_MISS+T_USER: - case T_ADDR_ERR_LD: /* misaligned access */ - case T_ADDR_ERR_ST: /* misaligned access */ - case T_BUS_ERR_LD_ST: /* BERR asserted to CPU */ - case T_ADDR_ERR_LD+T_USER: /* misaligned or kseg access */ - case T_ADDR_ERR_ST+T_USER: /* misaligned or kseg access */ - case T_BUS_ERR_IFETCH+T_USER: /* BERR asserted to CPU */ - case T_BUS_ERR_LD_ST+T_USER: /* BERR asserted to CPU */ - return (SIGSEGV); - - case T_BREAK: - case T_BREAK+T_USER: - return (SIGTRAP); - - case T_RES_INST+T_USER: - case T_COP_UNUSABLE+T_USER: - return (SIGILL); - - case T_FPE+T_USER: - case T_OVFLOW+T_USER: - return (SIGFPE); - - default: - return (SIGEMT); - } -} diff --git a/sys/mips/mips/genassym.c b/sys/mips/mips/genassym.c deleted file mode 100644 index 9bacb6b454b..00000000000 --- a/sys/mips/mips/genassym.c +++ /dev/null @@ -1,175 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1982, 1990 The Regents of the University of California. - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * William Jolitz. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)genassym.c 5.11 (Berkeley) 5/10/91 - * from: src/sys/i386/i386/genassym.c,v 1.86.2.1 2000/05/16 06:58:06 dillon - * JNPR: genassym.c,v 1.4 2007/08/09 11:23:32 katta - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef CPU_CNMIPS -#include -#endif - -#ifndef offsetof -#define offsetof(t,m) (int)((&((t *)0L)->m)) -#endif - -ASSYM(TD_PCB, offsetof(struct thread, td_pcb)); -ASSYM(TD_PROC, offsetof(struct thread, td_proc)); -ASSYM(TD_UPTE, offsetof(struct thread, td_md.md_upte)); -ASSYM(TD_KSTACK, offsetof(struct thread, td_kstack)); -ASSYM(TD_FLAGS, offsetof(struct thread, td_flags)); -ASSYM(TD_LOCK, offsetof(struct thread, td_lock)); -ASSYM(TD_MDFLAGS, offsetof(struct thread, td_md.md_flags)); -ASSYM(TD_MDTLS, offsetof(struct thread, td_md.md_tls)); - -ASSYM(P_MDTLS_TCB_OFFSET, offsetof(struct proc, p_md.md_tls_tcb_offset)); - -ASSYM(U_PCB_REGS, offsetof(struct pcb, pcb_regs.zero)); -ASSYM(U_PCB_CONTEXT, offsetof(struct pcb, pcb_context)); -ASSYM(U_PCB_ONFAULT, offsetof(struct pcb, pcb_onfault)); -ASSYM(U_PCB_FPREGS, offsetof(struct pcb, pcb_regs.f0)); - -ASSYM(PC_CURPCB, offsetof(struct pcpu, pc_curpcb)); -ASSYM(PC_SEGBASE, offsetof(struct pcpu, pc_segbase)); -ASSYM(PC_CURTHREAD, offsetof(struct pcpu, pc_curthread)); -ASSYM(PC_FPCURTHREAD, offsetof(struct pcpu, pc_fpcurthread)); -ASSYM(PC_CPUID, offsetof(struct pcpu, pc_cpuid)); - -ASSYM(VM_MAX_KERNEL_ADDRESS, VM_MAX_KERNEL_ADDRESS); -ASSYM(VM_MAXUSER_ADDRESS, VM_MAXUSER_ADDRESS); -ASSYM(SIGF_UC, offsetof(struct sigframe, sf_uc)); -#ifdef COMPAT_FREEBSD32 -ASSYM(SIGF32_UC, offsetof(struct sigframe32, sf_uc)); -#endif -ASSYM(SIGFPE, SIGFPE); -ASSYM(PAGE_SHIFT, PAGE_SHIFT); -ASSYM(PAGE_SIZE, PAGE_SIZE); -ASSYM(PDRSHIFT, PDRSHIFT); -ASSYM(SEGSHIFT, SEGSHIFT); -ASSYM(TDF_NEEDRESCHED, TDF_NEEDRESCHED); -ASSYM(TDF_ASTPENDING, TDF_ASTPENDING); -ASSYM(MAXCOMLEN, MAXCOMLEN); -ASSYM(MDTD_COP2USED, MDTD_COP2USED); - -ASSYM(MIPS_KSEG0_START, MIPS_KSEG0_START); -ASSYM(MIPS_KSEG1_START, MIPS_KSEG1_START); -ASSYM(MIPS_KSEG2_START, MIPS_KSEG2_START); -ASSYM(MIPS_XKSEG_START, MIPS_XKSEG_START); - -#ifdef CPU_CNMIPS -ASSYM(TD_COP2OWNER, offsetof(struct thread, td_md.md_cop2owner)); -ASSYM(TD_COP2, offsetof(struct thread, td_md.md_cop2)); -ASSYM(TD_UCOP2, offsetof(struct thread, td_md.md_ucop2)); -ASSYM(COP2_CRC_IV_OFFSET, offsetof(struct octeon_cop2_state, crc_iv)); -ASSYM(COP2_CRC_LENGTH_OFFSET, offsetof(struct octeon_cop2_state, crc_length)); -ASSYM(COP2_CRC_POLY_OFFSET, offsetof(struct octeon_cop2_state, crc_poly)); -ASSYM(COP2_LLM_DAT0_OFFSET, offsetof(struct octeon_cop2_state, llm_dat)); -ASSYM(COP2_LLM_DAT1_OFFSET, offsetof(struct octeon_cop2_state, llm_dat) + 8); -ASSYM(COP2_3DES_IV_OFFSET, offsetof(struct octeon_cop2_state, _3des_iv)); -ASSYM(COP2_3DES_KEY0_OFFSET, offsetof(struct octeon_cop2_state, _3des_key)); -ASSYM(COP2_3DES_KEY1_OFFSET, offsetof(struct octeon_cop2_state, _3des_key) + 8); -ASSYM(COP2_3DES_KEY2_OFFSET, offsetof(struct octeon_cop2_state, _3des_key) + 16); -ASSYM(COP2_3DES_RESULT_OFFSET, offsetof(struct octeon_cop2_state, _3des_result)); -ASSYM(COP2_AES_INP0_OFFSET, offsetof(struct octeon_cop2_state, aes_inp0)); -ASSYM(COP2_AES_IV0_OFFSET, offsetof(struct octeon_cop2_state, aes_iv)); -ASSYM(COP2_AES_IV1_OFFSET, offsetof(struct octeon_cop2_state, aes_iv) + 8); -ASSYM(COP2_AES_KEY0_OFFSET, offsetof(struct octeon_cop2_state, aes_key)); -ASSYM(COP2_AES_KEY1_OFFSET, offsetof(struct octeon_cop2_state, aes_key) + 8); -ASSYM(COP2_AES_KEY2_OFFSET, offsetof(struct octeon_cop2_state, aes_key) + 16); -ASSYM(COP2_AES_KEY3_OFFSET, offsetof(struct octeon_cop2_state, aes_key) + 24); -ASSYM(COP2_AES_KEYLEN_OFFSET, offsetof(struct octeon_cop2_state, aes_keylen)); -ASSYM(COP2_AES_RESULT0_OFFSET, offsetof(struct octeon_cop2_state, aes_result)); -ASSYM(COP2_AES_RESULT1_OFFSET, offsetof(struct octeon_cop2_state, aes_result) + 8); -ASSYM(COP2_HSH_DATW0_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw)); -ASSYM(COP2_HSH_DATW1_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 8); -ASSYM(COP2_HSH_DATW2_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 16); -ASSYM(COP2_HSH_DATW3_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 24); -ASSYM(COP2_HSH_DATW4_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 32); -ASSYM(COP2_HSH_DATW5_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 40); -ASSYM(COP2_HSH_DATW6_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 48); -ASSYM(COP2_HSH_DATW7_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 56); -ASSYM(COP2_HSH_DATW8_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 64); -ASSYM(COP2_HSH_DATW9_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 72); -ASSYM(COP2_HSH_DATW10_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 80); -ASSYM(COP2_HSH_DATW11_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 88); -ASSYM(COP2_HSH_DATW12_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 96); -ASSYM(COP2_HSH_DATW13_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 104); -ASSYM(COP2_HSH_DATW14_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 112); -ASSYM(COP2_HSH_IVW0_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw)); -ASSYM(COP2_HSH_IVW1_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 8); -ASSYM(COP2_HSH_IVW2_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 16); -ASSYM(COP2_HSH_IVW3_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 24); -ASSYM(COP2_HSH_IVW4_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 32); -ASSYM(COP2_HSH_IVW5_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 40); -ASSYM(COP2_HSH_IVW6_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 48); -ASSYM(COP2_HSH_IVW7_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 56); -ASSYM(COP2_GFM_MULT0_OFFSET, offsetof(struct octeon_cop2_state, gfm_mult)); -ASSYM(COP2_GFM_MULT1_OFFSET, offsetof(struct octeon_cop2_state, gfm_mult) + 8); -ASSYM(COP2_GFM_POLY_OFFSET, offsetof(struct octeon_cop2_state, gfm_poly)); -ASSYM(COP2_GFM_RESULT0_OFFSET, offsetof(struct octeon_cop2_state, gfm_result)); -ASSYM(COP2_GFM_RESULT1_OFFSET, offsetof(struct octeon_cop2_state, gfm_result) + 8); -ASSYM(COP2_HSH_DATW0_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw)); -ASSYM(COP2_HSH_DATW1_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 8); -ASSYM(COP2_HSH_DATW2_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 16); -ASSYM(COP2_HSH_DATW3_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 24); -ASSYM(COP2_HSH_DATW4_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 32); -ASSYM(COP2_HSH_DATW5_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 40); -ASSYM(COP2_HSH_DATW6_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_datw) + 48); -ASSYM(COP2_HSH_IVW0_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw)); -ASSYM(COP2_HSH_IVW1_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 8); -ASSYM(COP2_HSH_IVW2_PASS1_OFFSET, offsetof(struct octeon_cop2_state, hsh_ivw) + 16); -#endif diff --git a/sys/mips/mips/inckern.S b/sys/mips/mips/inckern.S deleted file mode 100644 index c1f8a724114..00000000000 --- a/sys/mips/mips/inckern.S +++ /dev/null @@ -1,45 +0,0 @@ -/*- - * Copyright (c) 2005 Olivier Houchard. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -ENTRY(_start) - PTR_LA t0, kernel_end - move sp, t0 - add sp, 0x2000 - and sp, ~0x7 - PTR_LA t0, _startC - j t0 - nop -END(_start) - -#ifndef KERNNAME -#error Need a kernel name here -#endif - -.section ".real_kernel","aw" -.globl kernel_start; -kernel_start: -.incbin KERNNAME -.globl kernel_end; -kernel_end: diff --git a/sys/mips/mips/intr_machdep.c b/sys/mips/mips/intr_machdep.c deleted file mode 100644 index f42378dfaac..00000000000 --- a/sys/mips/mips/intr_machdep.c +++ /dev/null @@ -1,300 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Oleksandr Tymoshenko - * Copyright (c) 2002-2004 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include "opt_hwpmc_hooks.h" - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifndef INTRNG -#define INTRCNT_COUNT 256 -#define INTRNAME_LEN (2*MAXCOMLEN + 1) - -MALLOC_DECLARE(M_MIPSINTR); -MALLOC_DEFINE(M_MIPSINTR, "mipsintr", "MIPS interrupt handling"); - -u_long *intrcnt; -char *intrnames; -size_t sintrcnt; -size_t sintrnames; -#endif - -static struct intr_event *hardintr_events[NHARD_IRQS]; -static struct intr_event *softintr_events[NSOFT_IRQS]; -static mips_intrcnt_t mips_intr_counters[NSOFT_IRQS + NHARD_IRQS]; - -static int intrcnt_index; - -static cpu_intr_mask_t hardintr_mask_func; -static cpu_intr_unmask_t hardintr_unmask_func; - -mips_intrcnt_t -mips_intrcnt_create(const char* name) -{ - mips_intrcnt_t counter = &intrcnt[intrcnt_index++]; - - mips_intrcnt_setname(counter, name); - return counter; -} - -void -mips_intrcnt_setname(mips_intrcnt_t counter, const char *name) -{ - int idx = counter - intrcnt; - - KASSERT(counter != NULL, ("mips_intrcnt_setname: NULL counter")); - - snprintf(intrnames + (MAXCOMLEN + 1) * idx, - MAXCOMLEN + 1, "%-*s", MAXCOMLEN, name); -} - -static void -mips_mask_hard_irq(void *source) -{ - uintptr_t irq = (uintptr_t)source; - - mips_wr_status(mips_rd_status() & ~(((1 << irq) << 8) << 2)); -} - -static void -mips_unmask_hard_irq(void *source) -{ - uintptr_t irq = (uintptr_t)source; - - mips_wr_status(mips_rd_status() | (((1 << irq) << 8) << 2)); -} - -static void -mips_mask_soft_irq(void *source) -{ - uintptr_t irq = (uintptr_t)source; - - mips_wr_status(mips_rd_status() & ~((1 << irq) << 8)); -} - -static void -mips_unmask_soft_irq(void *source) -{ - uintptr_t irq = (uintptr_t)source; - - mips_wr_status(mips_rd_status() | ((1 << irq) << 8)); -} - -/* - * Perform initialization of interrupts prior to setting - * handlings - */ -void -cpu_init_interrupts() -{ - int i; - char name[MAXCOMLEN + 1]; - -#ifndef INTRNG - intrcnt = mallocarray(INTRCNT_COUNT, sizeof(u_long), M_MIPSINTR, - M_WAITOK | M_ZERO); - intrnames = mallocarray(INTRCNT_COUNT, INTRNAME_LEN, M_MIPSINTR, - M_WAITOK | M_ZERO); - sintrcnt = INTRCNT_COUNT * sizeof(u_long); - sintrnames = INTRCNT_COUNT * INTRNAME_LEN; -#endif - - /* - * Initialize all available vectors so spare IRQ - * would show up in systat output - */ - for (i = 0; i < NSOFT_IRQS; i++) { - snprintf(name, MAXCOMLEN + 1, "sint%d:", i); - mips_intr_counters[i] = mips_intrcnt_create(name); - } - - for (i = 0; i < NHARD_IRQS; i++) { - snprintf(name, MAXCOMLEN + 1, "int%d:", i); - mips_intr_counters[NSOFT_IRQS + i] = mips_intrcnt_create(name); - } -} - -void -cpu_set_hardintr_mask_func(cpu_intr_mask_t func) -{ - - hardintr_mask_func = func; -} - -void -cpu_set_hardintr_unmask_func(cpu_intr_unmask_t func) -{ - - hardintr_unmask_func = func; -} - -void -cpu_establish_hardintr(const char *name, driver_filter_t *filt, - void (*handler)(void*), void *arg, int irq, int flags, void **cookiep) -{ - struct intr_event *event; - int error; - - /* - * We have 6 levels, but thats 0 - 5 (not including 6) - */ - if (irq < 0 || irq >= NHARD_IRQS) - panic("%s called for unknown hard intr %d", __func__, irq); - - if (hardintr_mask_func == NULL) - hardintr_mask_func = mips_mask_hard_irq; - - if (hardintr_unmask_func == NULL) - hardintr_unmask_func = mips_unmask_hard_irq; - - event = hardintr_events[irq]; - if (event == NULL) { - error = intr_event_create(&event, (void *)(uintptr_t)irq, 0, - irq, hardintr_mask_func, hardintr_unmask_func, - NULL, NULL, "int%d", irq); - if (error) - return; - hardintr_events[irq] = event; - mips_unmask_hard_irq((void*)(uintptr_t)irq); - } - - intr_event_add_handler(event, name, filt, handler, arg, - intr_priority(flags), flags, cookiep); - - mips_intrcnt_setname(mips_intr_counters[NSOFT_IRQS + irq], - event->ie_fullname); -} - -void -cpu_establish_softintr(const char *name, driver_filter_t *filt, - void (*handler)(void*), void *arg, int irq, int flags, - void **cookiep) -{ - struct intr_event *event; - int error; - -#if 0 - printf("Establish SOFT IRQ %d: filt %p handler %p arg %p\n", - irq, filt, handler, arg); -#endif - if (irq < 0 || irq > NSOFT_IRQS) - panic("%s called for unknown hard intr %d", __func__, irq); - - event = softintr_events[irq]; - if (event == NULL) { - error = intr_event_create(&event, (void *)(uintptr_t)irq, 0, - irq, mips_mask_soft_irq, mips_unmask_soft_irq, - NULL, NULL, "sint%d:", irq); - if (error) - return; - softintr_events[irq] = event; - mips_unmask_soft_irq((void*)(uintptr_t)irq); - } - - intr_event_add_handler(event, name, filt, handler, arg, - intr_priority(flags), flags, cookiep); - - mips_intrcnt_setname(mips_intr_counters[irq], event->ie_fullname); -} - -void -cpu_intr(struct trapframe *tf) -{ - struct intr_event *event; - register_t cause, status; - int hard, i, intr; - - critical_enter(); - - cause = mips_rd_cause(); - status = mips_rd_status(); - intr = (cause & MIPS_INT_MASK) >> 8; - /* - * Do not handle masked interrupts. They were masked by - * pre_ithread function (mips_mask_XXX_intr) and will be - * unmasked once ithread is through with handler - */ - intr &= (status & MIPS_INT_MASK) >> 8; - while ((i = fls(intr)) != 0) { - intr &= ~(1 << (i - 1)); - switch (i) { - case 1: case 2: - /* Software interrupt. */ - i--; /* Get a 0-offset interrupt. */ - hard = 0; - event = softintr_events[i]; - mips_intrcnt_inc(mips_intr_counters[i]); - break; - default: - /* Hardware interrupt. */ - i -= 2; /* Trim software interrupt bits. */ - i--; /* Get a 0-offset interrupt. */ - hard = 1; - event = hardintr_events[i]; - mips_intrcnt_inc(mips_intr_counters[NSOFT_IRQS + i]); - break; - } - - if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) { - printf("stray %s interrupt %d\n", - hard ? "hard" : "soft", i); - continue; - } - - if (intr_event_handle(event, tf) != 0) { - printf("stray %s interrupt %d\n", - hard ? "hard" : "soft", i); - } - } - - KASSERT(i == 0, ("all interrupts handled")); - - critical_exit(); - -#ifdef HWPMC_HOOKS - if (pmc_hook && (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN)) - pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, tf); -#endif -} diff --git a/sys/mips/mips/libkern_machdep.c b/sys/mips/mips/libkern_machdep.c deleted file mode 100644 index 40cc1fc0bf5..00000000000 --- a/sys/mips/mips/libkern_machdep.c +++ /dev/null @@ -1,39 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Include libkern support routines for 64-bit operations when building o32 - * kernels. - */ -#if defined(__mips_o32) -#include -#include -#include -#include -#include -#endif diff --git a/sys/mips/mips/locore.S b/sys/mips/mips/locore.S deleted file mode 100644 index ff600f9d2da..00000000000 --- a/sys/mips/mips/locore.S +++ /dev/null @@ -1,204 +0,0 @@ -/* $OpenBSD: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $ */ -/*- - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Digital Equipment Corporation and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Copyright (C) 1989 Digital Equipment Corporation. - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose and without fee is hereby granted, - * provided that the above copyright notice appears in all copies. - * Digital Equipment Corporation makes no representations about the - * suitability of this software for any purpose. It is provided "as is" - * without express or implied warranty. - * - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s, - * v 1.1 89/07/11 17:55:04 nelson Exp SPRITE (DECWRL) - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s, - * v 9.2 90/01/29 18:00:39 shirriff Exp SPRITE (DECWRL) - * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s, - * v 1.1 89/07/10 14:27:41 nelson Exp SPRITE (DECWRL) - * - * from: @(#)locore.s 8.5 (Berkeley) 1/4/94 - * JNPR: locore.S,v 1.6.2.1 2007/08/29 12:24:49 girish - */ - -/* - * FREEBSD_DEVELOPERS_FIXME - * The start routine below was written for a multi-core CPU - * with each core being hyperthreaded. This serves as an example - * for a complex CPU architecture. For a different CPU complex - * please make necessary changes to read CPU-ID etc. - * A clean solution would be to have a different locore file for - * each CPU type. - */ - -/* - * Contains code that is the first executed at boot time plus - * assembly language support routines. - */ - -#include -#include -#include -#include - -#include "assym.inc" - - .data -#ifdef YAMON -GLOBAL(fenvp) - .space 4 # Assumes mips32? Is that OK? -#endif - - .set noreorder - - .text - -GLOBAL(btext) -ASM_ENTRY(_start) -VECTOR(_locore, unknown) - /* UNSAFE TO USE a0..a3, need to preserve the args from boot loader */ - mtc0 zero, MIPS_COP_0_CAUSE # Clear soft interrupts - -#if defined(CPU_CNMIPS) - /* - * t1: Bits to set explicitly: - * Enable FPU - */ - - /* Set these bits */ - li t1, (MIPS_SR_COP_0_BIT | MIPS_SR_PX | MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_SX | MIPS_SR_BEV) - - /* Reset these bits */ - li t0, ~(MIPS_SR_DE | MIPS_SR_SR | MIPS_SR_ERL | MIPS_SR_EXL | MIPS_SR_INT_IE | MIPS_SR_COP_2_BIT) -#elif defined (CPU_RMI) || defined (CPU_NLM) - /* Set these bits */ - li t1, (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT | MIPS_SR_KX | MIPS_SR_UX) - - /* Reset these bits */ - li t0, ~(MIPS_SR_BEV | MIPS_SR_SR | MIPS_SR_INT_IE) -#else - /* - * t0: Bits to preserve if set: - * Soft reset - * Boot exception vectors (firmware-provided) - */ - li t0, (MIPS_SR_BEV | MIPS_SR_SR) - /* - * t1: Bits to set explicitly: - * Enable FPU - */ - li t1, MIPS_SR_COP_1_BIT -#if defined(__mips_n32) || defined(__mips_n64) - or t1, MIPS_SR_FR -#endif -#ifdef __mips_n64 - or t1, MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX -#endif -#endif - /* - * Read coprocessor 0 status register, clear bits not - * preserved (namely, clearing interrupt bits), and set - * bits we want to explicitly set. - */ - mfc0 t2, MIPS_COP_0_STATUS - and t2, t0 - or t2, t1 - mtc0 t2, MIPS_COP_0_STATUS - COP0_SYNC - - /* Make sure KSEG0 is cached */ - li t0, MIPS_CCA_CACHED - mtc0 t0, MIPS_COP_0_CONFIG - COP0_SYNC - - /*xxximp - * now that we pass a0...a3 to the platform_init routine, do we need - * to stash this stuff here? - */ -#ifdef YAMON - /* Save YAMON boot environment pointer */ - sw a2, _C_LABEL(fenvp) -#endif - -#if defined(CPU_CNMIPS) && defined(SMP) - .set push - .set mips32r2 - rdhwr t2, $0 - beqz t2, 1f - nop - j octeon_ap_wait - nop - .set pop -1: -#endif - -#if defined(CPU_MALTA) && defined(SMP) - .set push - .set mips32r2 - jal malta_cpu_configure - nop - jal platform_processor_id - nop - beqz v0, 1f - nop - j malta_ap_wait - nop - .set pop -1: -#endif - - /* - * Initialize stack and call machine startup. - */ - PTR_LA sp, _C_LABEL(pcpu_space) - PTR_ADDU sp, (PAGE_SIZE * 2) - CALLFRAME_SIZ - - REG_S zero, CALLFRAME_RA(sp) # Zero out old ra for debugger - REG_S zero, CALLFRAME_SP(sp) # Zero out old fp for debugger - - PTR_LA gp, _C_LABEL(_gp) - - /* Call the platform-specific startup code. */ - jal _C_LABEL(platform_start) - nop - - PTR_LA sp, _C_LABEL(thread0_st) - PTR_L a0, TD_PCB(sp) - REG_LI t0, ~7 - and a0, a0, t0 - PTR_SUBU sp, a0, CALLFRAME_SIZ - - jal _C_LABEL(mi_startup) # mi_startup(frame) - sw zero, CALLFRAME_SIZ - 8(sp) # Zero out old fp for debugger - - PANIC("Startup failed!") - -VECTOR_END(_locore) diff --git a/sys/mips/mips/machdep.c b/sys/mips/mips/machdep.c deleted file mode 100644 index a520700a70a..00000000000 --- a/sys/mips/mips/machdep.c +++ /dev/null @@ -1,579 +0,0 @@ - /* $OpenBSD: machdep.c,v 1.33 1998/09/15 10:58:54 pefo Exp $ */ -/* tracked to 1.38 */ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department, The Mach Operating System project at - * Carnegie-Mellon University and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)machdep.c 8.3 (Berkeley) 1/12/94 - * Id: machdep.c,v 1.33 1998/09/15 10:58:54 pefo Exp - * JNPR: machdep.c,v 1.11.2.3 2007/08/29 12:24:49 - */ - -#include -#include "opt_ddb.h" -#include "opt_md.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#ifdef DDB -#include -#include -#endif - -#include -#include - -#define BOOTINFO_DEBUG 0 - -const char machine[] = "mips"; -SYSCTL_CONST_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD | CTLFLAG_CAPRD, - machine, "Machine class"); - -char cpu_model[80]; -SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, cpu_model, 0, "Machine model"); - -char cpu_board[80]; -SYSCTL_STRING(_hw, OID_AUTO, board, CTLFLAG_RD, cpu_board, 0, "Machine board"); - -int cold = 1; -long realmem = 0; -long Maxmem = 0; -int cpu_clock = MIPS_DEFAULT_HZ; -SYSCTL_INT(_hw, OID_AUTO, clockrate, CTLFLAG_RD, - &cpu_clock, 0, "CPU instruction clock rate"); -int clocks_running = 0; - -vm_offset_t kstack0; - -/* - * Each entry in the pcpu_space[] array is laid out in the following manner: - * struct pcpu for cpu 'n' pcpu_space[n] - * boot stack for cpu 'n' pcpu_space[n] + PAGE_SIZE * 2 - CALLFRAME_SIZ - * - * Note that the boot stack grows downwards and we assume that we never - * use enough stack space to trample over the 'struct pcpu' that is at - * the beginning of the array. - * - * The array is aligned on a (PAGE_SIZE * 2) boundary so that the 'struct pcpu' - * is always in the even page frame of the wired TLB entry on SMP kernels. - * - * The array is in the .data section so that the stack does not get zeroed out - * when the .bss section is zeroed. - */ -char pcpu_space[MAXCPU][PAGE_SIZE * 2] \ - __aligned(PAGE_SIZE * 2) __section(".data"); - -struct pcpu *pcpup = (struct pcpu *)pcpu_space; - -vm_paddr_t physmem_desc[PHYS_AVAIL_COUNT]; - -#ifdef UNIMPLEMENTED -struct platform platform; -#endif - -static void cpu_startup(void *); -SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); - -struct kva_md_info kmi; - -int cpucfg; /* Value of processor config register */ -int num_tlbentries = 64; /* Size of the CPU tlb */ -int cputype; - -extern char MipsException[], MipsExceptionEnd[]; - -/* TLB miss handler address and end */ -extern char MipsTLBMiss[], MipsTLBMissEnd[]; - -/* Cache error handler */ -extern char MipsCache[], MipsCacheEnd[]; - -/* MIPS wait skip region */ -extern char MipsWaitStart[], MipsWaitEnd[]; - -extern char edata[], end[]; - -u_int32_t bootdev; -struct bootinfo bootinfo; -/* - * First kseg0 address available for use. By default it's equal to &end. - * But in some cases there might be additional data placed right after - * _end by loader or ELF trampoline. - */ -vm_offset_t kernel_kseg0_end = (vm_offset_t)&end; - -static void -cpu_startup(void *dummy) -{ - - if (boothowto & RB_VERBOSE) - bootverbose++; - - cpu_identify(); - - printf("real memory = %ju (%juK bytes)\n", ptoa((uintmax_t)realmem), - ptoa((uintmax_t)realmem) / 1024); - - /* - * Display any holes after the first chunk of extended memory. - */ - if (bootverbose) { - int indx; - - printf("Physical memory chunk(s):\n"); - for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { - vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx]; - - printf("0x%08jx - 0x%08jx, %ju bytes (%ju pages)\n", - (uintmax_t)phys_avail[indx], - (uintmax_t)phys_avail[indx + 1] - 1, - (uintmax_t)size1, - (uintmax_t)size1 / PAGE_SIZE); - } - } - - vm_ksubmap_init(&kmi); - - printf("avail memory = %ju (%juMB)\n", - ptoa((uintmax_t)vm_free_count()), - ptoa((uintmax_t)vm_free_count()) / 1048576); - cpu_init_interrupts(); - - /* - * Set up buffers, so they can be used to read disk labels. - */ - bufinit(); - vm_pager_bufferinit(); -} - -/* - * Shutdown the CPU as much as possible - */ -void -cpu_reset(void) -{ - - platform_reset(); -} - -/* - * Flush the D-cache for non-DMA I/O so that the I-cache can - * be made coherent later. - */ -void -cpu_flush_dcache(void *ptr, size_t len) -{ - /* TBD */ -} - -/* Get current clock frequency for the given cpu id. */ -int -cpu_est_clockrate(int cpu_id, uint64_t *rate) -{ - - return (ENXIO); -} - -/* - * Shutdown the CPU as much as possible - */ -void -cpu_halt(void) -{ - for (;;) - ; -} - -SYSCTL_STRUCT(_machdep, OID_AUTO, bootinfo, CTLFLAG_RD, &bootinfo, - bootinfo, "Bootinfo struct: kernel filename, BIOS harddisk geometry, etc"); - -/* - * Initialize per cpu data structures, include curthread. - */ -void -mips_pcpu0_init() -{ - /* Initialize pcpu info of cpu-zero */ - pcpu_init(PCPU_ADDR(0), 0, sizeof(struct pcpu)); - PCPU_SET(curthread, &thread0); -} - -/* - * Initialize mips and configure to run kernel - */ -void -mips_proc0_init(void) -{ -#ifdef SMP - if (platform_processor_id() != 0) - panic("BSP must be processor number 0"); -#endif - proc_linkup0(&proc0, &thread0); - - KASSERT((kstack0 & PAGE_MASK) == 0, - ("kstack0 is not aligned on a page boundary: 0x%0lx", - (long)kstack0)); - thread0.td_kstack = kstack0; - thread0.td_kstack_pages = KSTACK_PAGES; - /* - * Do not use cpu_thread_alloc to initialize these fields - * thread0 is the only thread that has kstack located in KSEG0 - * while cpu_thread_alloc handles kstack allocated in KSEG2. - */ - thread0.td_pcb = (struct pcb *)(thread0.td_kstack + - thread0.td_kstack_pages * PAGE_SIZE) - 1; - thread0.td_frame = &thread0.td_pcb->pcb_regs; - - /* Steal memory for the dynamic per-cpu area. */ - dpcpu_init((void *)pmap_steal_memory(DPCPU_SIZE), 0); - - PCPU_SET(curpcb, thread0.td_pcb); - /* - * There is no need to initialize md_upte array for thread0 as it's - * located in .bss section and should be explicitly zeroed during - * kernel initialization. - */ -} - -void -cpu_initclocks(void) -{ - - platform_initclocks(); - cpu_initclocks_bsp(); -} - -/* - * Initialize the hardware exception vectors, and the jump table used to - * call locore cache and TLB management functions, based on the kind - * of CPU the kernel is running on. - */ -void -mips_vector_init(void) -{ - /* - * Make sure that the Wait region logic is not been - * changed - */ - if (MipsWaitEnd - MipsWaitStart != 16) - panic("startup: MIPS wait region not correct"); - /* - * Copy down exception vector code. - */ - if (MipsTLBMissEnd - MipsTLBMiss > 0x80) - panic("startup: UTLB code too large"); - - if (MipsCacheEnd - MipsCache > 0x80) - panic("startup: Cache error code too large"); - - bcopy(MipsTLBMiss, (void *)MIPS_UTLB_MISS_EXC_VEC, - MipsTLBMissEnd - MipsTLBMiss); - - /* - * XXXRW: Why don't we install the XTLB handler for all 64-bit - * architectures? - */ -#if defined(__mips_n64) || defined(CPU_RMI) || defined(CPU_NLM) || defined(CPU_BERI) -/* Fake, but sufficient, for the 32-bit with 64-bit hardware addresses */ - bcopy(MipsTLBMiss, (void *)MIPS_XTLB_MISS_EXC_VEC, - MipsTLBMissEnd - MipsTLBMiss); -#endif - - bcopy(MipsException, (void *)MIPS_GEN_EXC_VEC, - MipsExceptionEnd - MipsException); - - bcopy(MipsCache, (void *)MIPS_CACHE_ERR_EXC_VEC, - MipsCacheEnd - MipsCache); - - /* - * Clear out the I and D caches. - */ - mips_icache_sync_all(); - mips_dcache_wbinv_all(); - - /* - * Mask all interrupts. Each interrupt will be enabled - * when handler is installed for it - */ - set_intr_mask(0); - - /* Clear BEV in SR so we start handling our own exceptions */ - mips_wr_status(mips_rd_status() & ~MIPS_SR_BEV); -} - -/* - * Fix kernel_kseg0_end address in case trampoline placed debug sympols - * data there - */ -void -mips_postboot_fixup(void) -{ - /* - * We store u_long sized objects into the reload area, so the array - * must be so aligned. The standard allows any alignment for char data. - */ - _Alignas(_Alignof(u_long)) static char fake_preload[256]; - caddr_t preload_ptr = (caddr_t)&fake_preload[0]; - size_t size = 0; - -#define PRELOAD_PUSH_VALUE(type, value) do { \ - *(type *)(preload_ptr + size) = (value); \ - size += sizeof(type); \ -} while (0); - - /* - * Provide kernel module file information - */ - PRELOAD_PUSH_VALUE(uint32_t, MODINFO_NAME); - PRELOAD_PUSH_VALUE(uint32_t, strlen("kernel") + 1); - strcpy((char*)(preload_ptr + size), "kernel"); - size += strlen("kernel") + 1; - size = roundup(size, sizeof(u_long)); - - PRELOAD_PUSH_VALUE(uint32_t, MODINFO_TYPE); - PRELOAD_PUSH_VALUE(uint32_t, strlen("elf kernel") + 1); - strcpy((char*)(preload_ptr + size), "elf kernel"); - size += strlen("elf kernel") + 1; - size = roundup(size, sizeof(u_long)); - - PRELOAD_PUSH_VALUE(uint32_t, MODINFO_ADDR); - PRELOAD_PUSH_VALUE(uint32_t, sizeof(vm_offset_t)); - PRELOAD_PUSH_VALUE(vm_offset_t, KERNLOADADDR); - size = roundup(size, sizeof(u_long)); - - PRELOAD_PUSH_VALUE(uint32_t, MODINFO_SIZE); - PRELOAD_PUSH_VALUE(uint32_t, sizeof(size_t)); - PRELOAD_PUSH_VALUE(size_t, (size_t)&end - KERNLOADADDR); - size = roundup(size, sizeof(u_long)); - - /* End marker */ - PRELOAD_PUSH_VALUE(uint32_t, 0); - PRELOAD_PUSH_VALUE(uint32_t, 0); - -#undef PRELOAD_PUSH_VALUE - - KASSERT((size < sizeof(fake_preload)), - ("fake preload size is more thenallocated")); - - preload_metadata = (void *)fake_preload; - -#ifdef DDB - Elf_Size *trampoline_data = (Elf_Size*)kernel_kseg0_end; - Elf_Size symtabsize = 0; - vm_offset_t ksym_start; - vm_offset_t ksym_end; - - if (trampoline_data[0] == SYMTAB_MAGIC) { - symtabsize = trampoline_data[1]; - kernel_kseg0_end += 2 * sizeof(Elf_Size); - /* start of .symtab */ - ksym_start = kernel_kseg0_end; - kernel_kseg0_end += symtabsize; - /* end of .strtab */ - ksym_end = kernel_kseg0_end; - db_fetch_ksymtab(ksym_start, ksym_end, 0); - } -#endif -} - -#ifdef SMP -void -mips_pcpu_tlb_init(struct pcpu *pcpu) -{ - vm_paddr_t pa; - pt_entry_t pte; - - /* - * Map the pcpu structure at the virtual address 'pcpup'. - * We use a wired tlb index to do this one-time mapping. - */ - pa = vtophys(pcpu); - pte = PTE_D | PTE_V | PTE_G | PTE_C_CACHE; - tlb_insert_wired(PCPU_TLB_ENTRY, (vm_offset_t)pcpup, - TLBLO_PA_TO_PFN(pa) | pte, - TLBLO_PA_TO_PFN(pa + PAGE_SIZE) | pte); -} -#endif - -/* - * Initialise a struct pcpu. - */ -void -cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) -{ - - pcpu->pc_next_asid = 1; - pcpu->pc_asid_generation = 1; - pcpu->pc_self = pcpu; -#ifdef SMP - if ((vm_offset_t)pcpup >= VM_MIN_KERNEL_ADDRESS && - (vm_offset_t)pcpup <= VM_MAX_KERNEL_ADDRESS) { - mips_pcpu_tlb_init(pcpu); - } -#endif -} - -int -fill_dbregs(struct thread *td, struct dbreg *dbregs) -{ - - /* No debug registers on mips */ - return (ENOSYS); -} - -int -set_dbregs(struct thread *td, struct dbreg *dbregs) -{ - - /* No debug registers on mips */ - return (ENOSYS); -} - -void -spinlock_enter(void) -{ - struct thread *td; - register_t intr; - - td = curthread; - if (td->td_md.md_spinlock_count == 0) { - intr = intr_disable(); - td->td_md.md_spinlock_count = 1; - td->td_md.md_saved_intr = intr; - critical_enter(); - } else - td->td_md.md_spinlock_count++; -} - -void -spinlock_exit(void) -{ - struct thread *td; - register_t intr; - - td = curthread; - intr = td->td_md.md_saved_intr; - td->td_md.md_spinlock_count--; - if (td->td_md.md_spinlock_count == 0) { - critical_exit(); - intr_restore(intr); - } -} - -/* - * call platform specific code to halt (until next interrupt) for the idle loop - */ -void -cpu_idle(int busy) -{ - KASSERT((mips_rd_status() & MIPS_SR_INT_IE) != 0, - ("interrupts disabled in idle process.")); - KASSERT((mips_rd_status() & MIPS_INT_MASK) != 0, - ("all interrupts masked in idle process.")); - - if (!busy) { - critical_enter(); - cpu_idleclock(); - } - mips_wait(); - if (!busy) { - cpu_activeclock(); - critical_exit(); - } -} - -int -cpu_idle_wakeup(int cpu) -{ - - return (0); -} - -int -is_cacheable_mem(vm_paddr_t pa) -{ - int i; - - for (i = 0; physmem_desc[i + 1] != 0; i += 2) { - if (pa >= physmem_desc[i] && pa < physmem_desc[i + 1]) - return (1); - } - - return (0); -} diff --git a/sys/mips/mips/mem.c b/sys/mips/mips/mem.c deleted file mode 100644 index 62366e2883a..00000000000 --- a/sys/mips/mips/mem.c +++ /dev/null @@ -1,167 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1982, 1986, 1990 The Regents of the University of California. - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department, and code derived from software contributed to - * Berkeley by William Jolitz. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: Utah $Hdr: mem.c 1.13 89/10/08$ - * from: @(#)mem.c 7.2 (Berkeley) 5/9/91 - */ - -#include -/* - * Memory special file - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include - -struct mem_range_softc mem_range_softc; - -/* ARGSUSED */ -int -memrw(struct cdev *dev, struct uio *uio, int flags) -{ - struct iovec *iov; - int error = 0; - vm_offset_t va, eva, off, v; - vm_prot_t prot; - struct vm_page m; - vm_page_t marr; - vm_size_t cnt; - - cnt = 0; - error = 0; - - pmap_page_init(&m); - while (uio->uio_resid > 0 && !error) { - iov = uio->uio_iov; - if (iov->iov_len == 0) { - uio->uio_iov++; - uio->uio_iovcnt--; - if (uio->uio_iovcnt < 0) - panic("memrw"); - continue; - } - if (dev2unit(dev) == CDEV_MINOR_MEM) { - v = uio->uio_offset; - - off = uio->uio_offset & PAGE_MASK; - cnt = PAGE_SIZE - ((vm_offset_t)iov->iov_base & - PAGE_MASK); - cnt = min(cnt, PAGE_SIZE - off); - cnt = min(cnt, iov->iov_len); - - m.phys_addr = trunc_page(v); - marr = &m; - error = uiomove_fromphys(&marr, off, cnt, uio); - } - else if (dev2unit(dev) == CDEV_MINOR_KMEM) { - va = uio->uio_offset; - - va = trunc_page(uio->uio_offset); - eva = round_page(uio->uio_offset - + iov->iov_len); - - /* - * Make sure that all the pages are currently resident - * so that we don't create any zero-fill pages. - */ - if (va >= VM_MIN_KERNEL_ADDRESS && - eva <= VM_MAX_KERNEL_ADDRESS) { - for (; va < eva; va += PAGE_SIZE) - if (pmap_extract(kernel_pmap, va) == 0) - return (EFAULT); - - prot = (uio->uio_rw == UIO_READ) - ? VM_PROT_READ : VM_PROT_WRITE; - - va = uio->uio_offset; - if (kernacc((void *) va, iov->iov_len, prot) - == FALSE) - return (EFAULT); - } - - va = uio->uio_offset; - error = uiomove((void *)va, iov->iov_len, uio); - continue; - } - } - - return (error); -} - -/* - * allow user processes to MMAP some memory sections - * instead of going through read/write - */ -int -memmmap(struct cdev *dev, vm_ooffset_t offset, vm_paddr_t *paddr, - int prot, vm_memattr_t *memattr) -{ - if (dev2unit(dev) != CDEV_MINOR_MEM) - return (-1); - - *paddr = offset; - - return (0); -} - -int -memioctl_md(struct cdev *dev __unused, u_long cmd __unused, - caddr_t data __unused, int flags __unused, struct thread *td __unused) -{ - return (ENOTTY); -} diff --git a/sys/mips/mips/minidump_machdep.c b/sys/mips/mips/minidump_machdep.c deleted file mode 100644 index c638396f9a4..00000000000 --- a/sys/mips/mips/minidump_machdep.c +++ /dev/null @@ -1,283 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Oleksandr Tymoshenko - * Copyright (c) 2008 Semihalf, Grzegorz Bernacki - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * from: FreeBSD: src/sys/arm/arm/minidump_machdep.c v214223 - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -CTASSERT(sizeof(struct kerneldumpheader) == 512); - -static struct kerneldumpheader kdh; - -/* Handle chunked writes. */ -static uint64_t dumpsize; -/* Just auxiliary bufffer */ -static char tmpbuffer[PAGE_SIZE] __aligned(sizeof(uint64_t)); - -extern pd_entry_t *kernel_segmap; - -static int -write_buffer(struct dumperinfo *di, char *ptr, size_t sz) -{ - size_t len; - int error, c; - u_int maxdumpsz; - - maxdumpsz = di->maxiosize; - - if (maxdumpsz == 0) /* seatbelt */ - maxdumpsz = PAGE_SIZE; - - error = 0; - - while (sz) { - len = min(maxdumpsz, sz); - - dumpsys_pb_progress(len); - wdog_kern_pat(WD_LASTVAL); - - if (ptr) { - error = dump_append(di, ptr, len); - if (error) - return (error); - ptr += len; - sz -= len; - } else { - panic("pa is not supported"); - } - - /* Check for user abort. */ - c = cncheckc(); - if (c == 0x03) - return (ECANCELED); - if (c != -1) - printf(" (CTRL-C to abort) "); - } - - return (0); -} - -int -cpu_minidumpsys(struct dumperinfo *di, const struct minidumpstate *state) -{ - struct minidumphdr mdhdr; - struct msgbuf *mbp; - uint64_t *dump_avail_buf; - uint32_t ptesize; - vm_paddr_t pa; - vm_offset_t prev_pte = 0; - uint32_t count = 0; - vm_offset_t va; - pt_entry_t *pte; - int i, error; - void *dump_va; - - /* Live dumps are untested. */ - if (!dumping) - return (EOPNOTSUPP); - - /* Flush cache */ - mips_dcache_wbinv_all(); - - /* Walk page table pages, set bits in vm_page_dump */ - ptesize = 0; - - for (va = VM_MIN_KERNEL_ADDRESS; va < kernel_vm_end; va += NBPDR) { - ptesize += PAGE_SIZE; - pte = pmap_pte(kernel_pmap, va); - KASSERT(pte != NULL, ("pte for %jx is NULL", (uintmax_t)va)); - for (i = 0; i < NPTEPG; i++) { - if (pte_test(&pte[i], PTE_V)) { - pa = TLBLO_PTE_TO_PA(pte[i]); - if (vm_phys_is_dumpable(pa)) - vm_page_dump_add(state->dump_bitset, - pa); - } - } - } - - /* - * Now mark pages from 0 to phys_avail[0], that's where kernel - * and pages allocated by pmap_steal reside - */ - for (pa = 0; pa < phys_avail[0]; pa += PAGE_SIZE) { - if (vm_phys_is_dumpable(pa)) - vm_page_dump_add(state->dump_bitset, pa); - } - - /* Calculate dump size. */ - mbp = state->msgbufp; - dumpsize = ptesize; - dumpsize += round_page(mbp->msg_size); - dumpsize += round_page(nitems(dump_avail) * sizeof(uint64_t)); - dumpsize += round_page(BITSET_SIZE(vm_page_dump_pages)); - VM_PAGE_DUMP_FOREACH(state->dump_bitset, pa) { - /* Clear out undumpable pages now if needed */ - if (vm_phys_is_dumpable(pa)) - dumpsize += PAGE_SIZE; - else - vm_page_dump_drop(state->dump_bitset, pa); - } - dumpsize += PAGE_SIZE; - - dumpsys_pb_init(dumpsize); - - /* Initialize mdhdr */ - bzero(&mdhdr, sizeof(mdhdr)); - strcpy(mdhdr.magic, MINIDUMP_MAGIC); - mdhdr.version = MINIDUMP_VERSION; - mdhdr.msgbufsize = mbp->msg_size; - mdhdr.bitmapsize = round_page(BITSET_SIZE(vm_page_dump_pages)); - mdhdr.ptesize = ptesize; - mdhdr.kernbase = VM_MIN_KERNEL_ADDRESS; - mdhdr.dumpavailsize = round_page(nitems(dump_avail) * sizeof(uint64_t)); - - dump_init_header(di, &kdh, KERNELDUMPMAGIC, KERNELDUMP_MIPS_VERSION, - dumpsize); - - error = dump_start(di, &kdh); - if (error != 0) - goto fail; - - printf("Dumping %llu out of %ju MB:", (long long)dumpsize >> 20, - ptoa((uintmax_t)physmem) / 1048576); - - /* Dump my header */ - bzero(tmpbuffer, sizeof(tmpbuffer)); - bcopy(&mdhdr, tmpbuffer, sizeof(mdhdr)); - error = write_buffer(di, tmpbuffer, PAGE_SIZE); - if (error) - goto fail; - - /* Dump msgbuf up front */ - error = write_buffer(di, mbp->msg_ptr, round_page(mbp->msg_size)); - if (error) - goto fail; - - /* Dump dump_avail. Make a copy using 64-bit physical addresses. */ - _Static_assert(nitems(dump_avail) * sizeof(uint64_t) <= - sizeof(tmpbuffer), "Large dump_avail not handled"); - bzero(tmpbuffer, sizeof(tmpbuffer)); - if (sizeof(dump_avail[0]) != sizeof(uint64_t)) { - dump_avail_buf = (uint64_t *)tmpbuffer; - for (i = 0; dump_avail[i] != 0 || dump_avail[i + 1] != 0; i++) { - dump_avail_buf[i] = dump_avail[i]; - dump_avail_buf[i + 1] = dump_avail[i + 1]; - } - } else { - memcpy(tmpbuffer, dump_avail, sizeof(dump_avail)); - } - error = write_buffer(di, tmpbuffer, PAGE_SIZE); - if (error) - goto fail; - - /* Dump bitmap */ - error = write_buffer(di, (char *)vm_page_dump, - round_page(BITSET_SIZE(vm_page_dump_pages))); - if (error) - goto fail; - - /* Dump kernel page table pages */ - for (va = VM_MIN_KERNEL_ADDRESS; va < kernel_vm_end; va += NBPDR) { - pte = pmap_pte(kernel_pmap, va); - KASSERT(pte != NULL, ("pte for %jx is NULL", (uintmax_t)va)); - if (!count) { - prev_pte = (vm_offset_t)pte; - count++; - } else { - if ((vm_offset_t)pte == (prev_pte + count * PAGE_SIZE)) - count++; - else { - error = write_buffer(di, (char*)prev_pte, - count * PAGE_SIZE); - if (error) - goto fail; - count = 1; - prev_pte = (vm_offset_t)pte; - } - } - } - - if (count) { - error = write_buffer(di, (char*)prev_pte, count * PAGE_SIZE); - if (error) - goto fail; - count = 0; - prev_pte = 0; - } - - /* Dump memory chunks page by page */ - VM_PAGE_DUMP_FOREACH(state->dump_bitset, pa) { - dump_va = pmap_kenter_temporary(pa, 0); - error = write_buffer(di, dump_va, PAGE_SIZE); - if (error) - goto fail; - pmap_kenter_temporary_free(pa); - } - - error = dump_finish(di, &kdh); - if (error != 0) - goto fail; - - printf("\nDump complete\n"); - return (0); - -fail: - if (error < 0) - error = -error; - - if (error == ECANCELED) - printf("\nDump aborted\n"); - else if (error == E2BIG || error == ENOSPC) { - printf("\nDump failed. Partition too small (about %lluMB were " - "needed this time).\n", (long long)dumpsize >> 20); - } else - printf("\n** DUMP FAILED (ERROR %d) **\n", error); - return (error); -} diff --git a/sys/mips/mips/mips_pic.c b/sys/mips/mips/mips_pic.c deleted file mode 100644 index 9e6021decfe..00000000000 --- a/sys/mips/mips/mips_pic.c +++ /dev/null @@ -1,710 +0,0 @@ -/*- - * Copyright (c) 2015 Alexander Kabaev - * Copyright (c) 2006 Oleksandr Tymoshenko - * Copyright (c) 2002-2004 Juli Mallett - * Copyright (c) 2017 The FreeBSD Foundation - * All rights reserved. - * - * Portions of this software were developed by Landon Fuller - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include "opt_platform.h" -#include "opt_hwpmc_hooks.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#ifdef FDT -#include -#include -#include -#include -#endif - -#include "pic_if.h" - -struct mips_pic_softc; - -static int mips_pic_intr(void *); -static struct mips_pic_intr *mips_pic_find_intr(struct resource *r); -static int mips_pic_map_fixed_intr(u_int irq, - struct mips_pic_intr **mapping); -static void cpu_establish_intr(struct mips_pic_softc *sc, - const char *name, driver_filter_t *filt, - void (*handler)(void*), void *arg, int irq, - int flags, void **cookiep); - -#define INTR_MAP_DATA_MIPS INTR_MAP_DATA_PLAT_1 - -struct intr_map_data_mips_pic { - struct intr_map_data hdr; - u_int irq; -}; - -/** - * MIPS interrupt state; available prior to MIPS PIC device attachment. - */ -static struct mips_pic_intr { - u_int mips_irq; /**< MIPS IRQ# 0-7 */ - u_int intr_irq; /**< INTRNG IRQ#, or INTR_IRQ_INVALID if unmapped */ - u_int consumers; /**< INTRNG activation refcount */ - struct resource *res; /**< resource shared by all interrupt handlers registered via - cpu_establish_hardintr() or cpu_establish_softintr(); NULL - if no interrupt handlers are yet registered. */ -} mips_pic_intrs[] = { - { 0, INTR_IRQ_INVALID, 0, NULL }, - { 1, INTR_IRQ_INVALID, 0, NULL }, - { 2, INTR_IRQ_INVALID, 0, NULL }, - { 3, INTR_IRQ_INVALID, 0, NULL }, - { 4, INTR_IRQ_INVALID, 0, NULL }, - { 5, INTR_IRQ_INVALID, 0, NULL }, - { 6, INTR_IRQ_INVALID, 0, NULL }, - { 7, INTR_IRQ_INVALID, 0, NULL }, -}; - -struct mtx mips_pic_mtx; -MTX_SYSINIT(mips_pic_mtx, &mips_pic_mtx, "mips intr controller mutex", MTX_DEF); - -struct mips_pic_irqsrc { - struct intr_irqsrc isrc; - u_int irq; -}; - -struct mips_pic_softc { - device_t pic_dev; - struct mips_pic_irqsrc pic_irqs[NREAL_IRQS]; - uint32_t nirqs; -}; - -static struct mips_pic_softc *pic_sc; - -#define PIC_INTR_ISRC(sc, irq) (&(sc)->pic_irqs[(irq)].isrc) - -#ifdef FDT -static struct ofw_compat_data compat_data[] = { - {"mti,cpu-interrupt-controller", true}, - {NULL, false} -}; -#endif - -#ifndef FDT -static void -mips_pic_identify(driver_t *drv, device_t parent) -{ - - BUS_ADD_CHILD(parent, 0, "cpupic", 0); -} -#endif - -static int -mips_pic_probe(device_t dev) -{ - -#ifdef FDT - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) - return (ENXIO); -#endif - device_set_desc(dev, "MIPS32 Interrupt Controller"); - return (BUS_PROBE_DEFAULT); -} - -static inline void -pic_irq_unmask(struct mips_pic_softc *sc, u_int irq) -{ - - mips_wr_status(mips_rd_status() | ((1 << irq) << 8)); -} - -static inline void -pic_irq_mask(struct mips_pic_softc *sc, u_int irq) -{ - - mips_wr_status(mips_rd_status() & ~((1 << irq) << 8)); -} - -static inline intptr_t -pic_xref(device_t dev) -{ -#ifdef FDT - return (OF_xref_from_node(ofw_bus_get_node(dev))); -#else - return (MIPS_PIC_XREF); -#endif -} - -static int -mips_pic_register_isrcs(struct mips_pic_softc *sc) -{ - int error; - uint32_t irq, i, tmpirq; - struct intr_irqsrc *isrc; - char *name; - - for (irq = 0; irq < sc->nirqs; irq++) { - sc->pic_irqs[irq].irq = irq; - - isrc = PIC_INTR_ISRC(sc, irq); - if (irq < NSOFT_IRQS) { - name = "sint"; - tmpirq = irq; - } else { - name = "int"; - tmpirq = irq - NSOFT_IRQS; - } - error = intr_isrc_register(isrc, sc->pic_dev, 0, "%s%u", - name, tmpirq); - if (error != 0) { - for (i = 0; i < irq; i++) { - intr_isrc_deregister(PIC_INTR_ISRC(sc, i)); - } - device_printf(sc->pic_dev, "%s failed", __func__); - return (error); - } - } - - return (0); -} - -static int -mips_pic_attach(device_t dev) -{ - struct mips_pic_softc *sc; - intptr_t xref = pic_xref(dev); - - if (pic_sc) - return (ENXIO); - - sc = device_get_softc(dev); - - sc->pic_dev = dev; - pic_sc = sc; - - /* Set the number of interrupts */ - sc->nirqs = nitems(sc->pic_irqs); - - /* Register the interrupts */ - if (mips_pic_register_isrcs(sc) != 0) { - device_printf(dev, "could not register PIC ISRCs\n"); - goto cleanup; - } - - /* - * Now, when everything is initialized, it's right time to - * register interrupt controller to interrupt framefork. - */ - if (intr_pic_register(dev, xref) == NULL) { - device_printf(dev, "could not register PIC\n"); - goto cleanup; - } - - /* Claim our root controller role */ - if (intr_pic_claim_root(dev, xref, mips_pic_intr, sc, 0) != 0) { - device_printf(dev, "could not set PIC as a root\n"); - intr_pic_deregister(dev, xref); - goto cleanup; - } - - return (0); - -cleanup: - return(ENXIO); -} - -int -mips_pic_intr(void *arg) -{ - struct mips_pic_softc *sc = arg; - register_t cause, status; - int i, intr; - - cause = mips_rd_cause(); - status = mips_rd_status(); - intr = (cause & MIPS_INT_MASK) >> 8; - /* - * Do not handle masked interrupts. They were masked by - * pre_ithread function (mips_mask_XXX_intr) and will be - * unmasked once ithread is through with handler - */ - intr &= (status & MIPS_INT_MASK) >> 8; - while ((i = fls(intr)) != 0) { - i--; /* Get a 0-offset interrupt. */ - intr &= ~(1 << i); - - if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i), - curthread->td_intr_frame) != 0) { - device_printf(sc->pic_dev, - "Stray interrupt %u detected\n", i); - pic_irq_mask(sc, i); - continue; - } - } - - KASSERT(i == 0, ("all interrupts handled")); - -#ifdef HWPMC_HOOKS - if (pmc_hook && (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN)) { - struct trapframe *tf = PCPU_GET(curthread)->td_intr_frame; - - pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, tf); - } -#endif - return (FILTER_HANDLED); -} - -static void -mips_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - u_int irq; - - irq = ((struct mips_pic_irqsrc *)isrc)->irq; - pic_irq_mask(device_get_softc(dev), irq); -} - -static void -mips_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc) -{ - u_int irq; - - irq = ((struct mips_pic_irqsrc *)isrc)->irq; - pic_irq_unmask(device_get_softc(dev), irq); -} - -static int -mips_pic_map_intr(device_t dev, struct intr_map_data *data, - struct intr_irqsrc **isrcp) -{ - struct mips_pic_softc *sc; - int res; - - sc = device_get_softc(dev); - res = 0; -#ifdef FDT - if (data->type == INTR_MAP_DATA_FDT) { - struct intr_map_data_fdt *daf; - - daf = (struct intr_map_data_fdt *)data; - - if (daf->ncells != 1 || daf->cells[0] >= sc->nirqs) - return (EINVAL); - - *isrcp = PIC_INTR_ISRC(sc, daf->cells[0]); - } else -#endif - if (data->type == INTR_MAP_DATA_MIPS) { - struct intr_map_data_mips_pic *mpd; - - mpd = (struct intr_map_data_mips_pic *)data; - - if (mpd->irq < 0 || mpd->irq >= sc->nirqs) - return (EINVAL); - - *isrcp = PIC_INTR_ISRC(sc, mpd->irq); - } else { - res = ENOTSUP; - } - - return (res); -} - -static void -mips_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - mips_pic_disable_intr(dev, isrc); -} - -static void -mips_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc) -{ - - mips_pic_enable_intr(dev, isrc); -} - -static void -mips_pic_post_filter(device_t dev, struct intr_irqsrc *isrc) -{ -} - -static device_method_t mips_pic_methods[] = { - /* Device interface */ -#ifndef FDT - DEVMETHOD(device_identify, mips_pic_identify), -#endif - DEVMETHOD(device_probe, mips_pic_probe), - DEVMETHOD(device_attach, mips_pic_attach), - - /* Interrupt controller interface */ - DEVMETHOD(pic_disable_intr, mips_pic_disable_intr), - DEVMETHOD(pic_enable_intr, mips_pic_enable_intr), - DEVMETHOD(pic_map_intr, mips_pic_map_intr), - DEVMETHOD(pic_pre_ithread, mips_pic_pre_ithread), - DEVMETHOD(pic_post_ithread, mips_pic_post_ithread), - DEVMETHOD(pic_post_filter, mips_pic_post_filter), - { 0, 0 } -}; - -static driver_t mips_pic_driver = { - "cpupic", - mips_pic_methods, - sizeof(struct mips_pic_softc), -}; - -static devclass_t mips_pic_devclass; - -#ifdef FDT -EARLY_DRIVER_MODULE(cpupic, ofwbus, mips_pic_driver, mips_pic_devclass, 0, 0, - BUS_PASS_INTERRUPT); -#else -EARLY_DRIVER_MODULE(cpupic, nexus, mips_pic_driver, mips_pic_devclass, 0, 0, - BUS_PASS_INTERRUPT); -#endif - -/** - * Return the MIPS interrupt map entry for @p r, or NULL if no such entry has - * been created. - */ -static struct mips_pic_intr * -mips_pic_find_intr(struct resource *r) -{ - struct mips_pic_intr *intr; - rman_res_t irq; - - irq = rman_get_start(r); - if (irq != rman_get_end(r) || rman_get_size(r) != 1) - return (NULL); - - mtx_lock(&mips_pic_mtx); - for (size_t i = 0; i < nitems(mips_pic_intrs); i++) { - intr = &mips_pic_intrs[i]; - - if (intr->intr_irq != irq) - continue; - - mtx_unlock(&mips_pic_mtx); - return (intr); - } - mtx_unlock(&mips_pic_mtx); - - /* Not found */ - return (NULL); -} - -/** - * Allocate a fixed IRQ mapping for the given MIPS @p irq, or return the - * existing mapping if @p irq was previously mapped. - * - * @param irq The MIPS IRQ to be mapped. - * @param[out] mapping On success, will be populated with the interrupt - * mapping. - * - * @retval 0 success - * @retval EINVAL if @p irq is not a valid MIPS IRQ#. - * @retval non-zero If allocating the MIPS IRQ mapping otherwise fails, a - * regular unix error code will be returned. - */ -static int -mips_pic_map_fixed_intr(u_int irq, struct mips_pic_intr **mapping) -{ - struct mips_pic_intr *intr; - struct intr_map_data_mips_pic *data; - device_t pic_dev; - uintptr_t xref; - - if (irq < 0 || irq >= nitems(mips_pic_intrs)) - return (EINVAL); - - mtx_lock(&mips_pic_mtx); - - /* Fetch corresponding interrupt entry */ - intr = &mips_pic_intrs[irq]; - KASSERT(intr->mips_irq == irq, - ("intr %u found at index %u", intr->mips_irq, irq)); - - /* Already mapped? */ - if (intr->intr_irq != INTR_IRQ_INVALID) { - mtx_unlock(&mips_pic_mtx); - *mapping = intr; - return (0); - } - - /* Map the interrupt */ - data = (struct intr_map_data_mips_pic *)intr_alloc_map_data( - INTR_MAP_DATA_MIPS, sizeof(*data), M_WAITOK | M_ZERO); - data->irq = intr->mips_irq; - -#ifdef FDT - /* PIC must be attached on FDT devices */ - KASSERT(pic_sc != NULL, ("%s: no pic", __func__)); - - pic_dev = pic_sc->pic_dev; - xref = pic_xref(pic_dev); -#else /* !FDT */ - /* PIC has a fixed xref, and may not have been attached yet */ - pic_dev = NULL; - if (pic_sc != NULL) - pic_dev = pic_sc->pic_dev; - - xref = MIPS_PIC_XREF; -#endif /* FDT */ - - KASSERT(intr->intr_irq == INTR_IRQ_INVALID, ("duplicate map")); - intr->intr_irq = intr_map_irq(pic_dev, xref, &data->hdr); - *mapping = intr; - - mtx_unlock(&mips_pic_mtx); - return (0); -} - -/** - * - * Produce fixed IRQ mappings for all MIPS IRQs. - * - * Non-FDT/OFW MIPS targets do not provide an equivalent to OFW_BUS_MAP_INTR(); - * it is instead necessary to reserve INTRNG IRQ# 0-7 for use by MIPS device - * drivers that assume INTRNG IRQs 0-7 are directly mapped to MIPS IRQs 0-7. - * - * XXX: There is no support in INTRNG for reserving a fixed IRQ range. However, - * we should be called prior to any other interrupt mapping requests, and work - * around this by iteratively allocating the required 0-7 MIP IRQ# range. - * - * @retval 0 success - * @retval non-zero If allocating the MIPS IRQ mappings otherwise fails, a - * regular unix error code will be returned. - */ -int -mips_pic_map_fixed_intrs(void) -{ - int error; - - for (u_int i = 0; i < nitems(mips_pic_intrs); i++) { - struct mips_pic_intr *intr; - - if ((error = mips_pic_map_fixed_intr(i, &intr))) - return (error); - - /* INTRNG IRQs 0-7 must be directly mapped to MIPS IRQs 0-7 */ - if (intr->intr_irq != intr->mips_irq) { - panic("invalid IRQ mapping: %u->%u", intr->intr_irq, - intr->mips_irq); - } - } - - return (0); -} - -/** - * If @p r references a MIPS interrupt mapped by the MIPS32 interrupt - * controller, handle interrupt activation internally. - * - * Otherwise, delegate directly to intr_activate_irq(). - */ -int -mips_pic_activate_intr(device_t child, struct resource *r) -{ - struct mips_pic_intr *intr; - int error; - - /* Is this one of our shared MIPS interrupts? */ - if ((intr = mips_pic_find_intr(r)) == NULL) { - /* Delegate to standard INTRNG activation */ - return (intr_activate_irq(child, r)); - } - - /* Bump consumer count and request activation if required */ - mtx_lock(&mips_pic_mtx); - if (intr->consumers == UINT_MAX) { - mtx_unlock(&mips_pic_mtx); - return (ENOMEM); - } - - if (intr->consumers == 0) { - if ((error = intr_activate_irq(child, r))) { - mtx_unlock(&mips_pic_mtx); - return (error); - } - } - - intr->consumers++; - mtx_unlock(&mips_pic_mtx); - - return (0); -} - -/** - * If @p r references a MIPS interrupt mapped by the MIPS32 interrupt - * controller, handle interrupt deactivation internally. - * - * Otherwise, delegate directly to intr_deactivate_irq(). - */ -int -mips_pic_deactivate_intr(device_t child, struct resource *r) -{ - struct mips_pic_intr *intr; - int error; - - /* Is this one of our shared MIPS interrupts? */ - if ((intr = mips_pic_find_intr(r)) == NULL) { - /* Delegate to standard INTRNG deactivation */ - return (intr_deactivate_irq(child, r)); - } - - /* Decrement consumer count and request deactivation if required */ - mtx_lock(&mips_pic_mtx); - KASSERT(intr->consumers > 0, ("refcount overrelease")); - - if (intr->consumers == 1) { - if ((error = intr_deactivate_irq(child, r))) { - mtx_unlock(&mips_pic_mtx); - return (error); - } - } - intr->consumers--; - - mtx_unlock(&mips_pic_mtx); - return (0); -} - -void -cpu_init_interrupts(void) -{ -} - -/** - * Provide backwards-compatible support for registering a MIPS interrupt handler - * directly, without allocating a bus resource. - */ -static void -cpu_establish_intr(struct mips_pic_softc *sc, const char *name, - driver_filter_t *filt, void (*handler)(void*), void *arg, int irq, - int flags, void **cookiep) -{ - struct mips_pic_intr *intr; - struct resource *res; - int rid; - int error; - - rid = -1; - - /* Fetch (or create) a fixed mapping */ - if ((error = mips_pic_map_fixed_intr(irq, &intr))) - panic("Unable to map IRQ %d: %d", irq, error); - - /* Fetch the backing resource, if any */ - mtx_lock(&mips_pic_mtx); - res = intr->res; - mtx_unlock(&mips_pic_mtx); - - /* Allocate our IRQ resource */ - if (res == NULL) { - /* Optimistically perform resource allocation */ - rid = intr->intr_irq; - res = bus_alloc_resource(sc->pic_dev, SYS_RES_IRQ, &rid, - intr->intr_irq, intr->intr_irq, 1, RF_SHAREABLE|RF_ACTIVE); - - if (res != NULL) { - /* Try to update intr->res */ - mtx_lock(&mips_pic_mtx); - if (intr->res == NULL) { - intr->res = res; - } - mtx_unlock(&mips_pic_mtx); - - /* If intr->res was updated concurrently, free our local - * resource allocation */ - if (intr->res != res) { - bus_release_resource(sc->pic_dev, SYS_RES_IRQ, - rid, res); - } - } else { - /* Maybe someone else allocated it? */ - mtx_lock(&mips_pic_mtx); - res = intr->res; - mtx_unlock(&mips_pic_mtx); - } - - if (res == NULL) { - panic("Unable to allocate IRQ %d->%u resource", irq, - intr->intr_irq); - } - } - - error = bus_setup_intr(sc->pic_dev, res, flags, filt, handler, arg, - cookiep); - if (error) - panic("Unable to add IRQ %d handler: %d", irq, error); -} - -void -cpu_establish_hardintr(const char *name, driver_filter_t *filt, - void (*handler)(void*), void *arg, int irq, int flags, void **cookiep) -{ - KASSERT(pic_sc != NULL, ("%s: no pic", __func__)); - - if (irq < 0 || irq >= NHARD_IRQS) - panic("%s called for unknown hard intr %d", __func__, irq); - - cpu_establish_intr(pic_sc, name, filt, handler, arg, irq+NSOFT_IRQS, - flags, cookiep); -} - -void -cpu_establish_softintr(const char *name, driver_filter_t *filt, - void (*handler)(void*), void *arg, int irq, int flags, - void **cookiep) -{ - KASSERT(pic_sc != NULL, ("%s: no pic", __func__)); - - if (irq < 0 || irq >= NSOFT_IRQS) - panic("%s called for unknown soft intr %d", __func__, irq); - - cpu_establish_intr(pic_sc, name, filt, handler, arg, irq, flags, - cookiep); -} diff --git a/sys/mips/mips/mp_machdep.c b/sys/mips/mips/mp_machdep.c deleted file mode 100644 index dfc3b59f053..00000000000 --- a/sys/mips/mips/mp_machdep.c +++ /dev/null @@ -1,373 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009 Neelkanth Natu - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -struct pcb stoppcbs[MAXCPU]; - -static void *dpcpu; -static struct mtx ap_boot_mtx; - -static volatile int aps_ready; -static volatile int mp_naps; - -static void -ipi_send(struct pcpu *pc, int ipi) -{ - - CTR3(KTR_SMP, "%s: cpu=%d, ipi=%x", __func__, pc->pc_cpuid, ipi); - - atomic_set_32(&pc->pc_pending_ipis, ipi); - platform_ipi_send(pc->pc_cpuid); - - CTR1(KTR_SMP, "%s: sent", __func__); -} - -void -ipi_all_but_self(int ipi) -{ - cpuset_t other_cpus; - - other_cpus = all_cpus; - CPU_CLR(PCPU_GET(cpuid), &other_cpus); - ipi_selected(other_cpus, ipi); -} - -/* Send an IPI to a set of cpus. */ -void -ipi_selected(cpuset_t cpus, int ipi) -{ - struct pcpu *pc; - - STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { - if (CPU_ISSET(pc->pc_cpuid, &cpus)) { - CTR3(KTR_SMP, "%s: pc: %p, ipi: %x\n", __func__, pc, - ipi); - ipi_send(pc, ipi); - } - } -} - -/* Send an IPI to a specific CPU. */ -void -ipi_cpu(int cpu, u_int ipi) -{ - - CTR3(KTR_SMP, "%s: cpu: %d, ipi: %x\n", __func__, cpu, ipi); - ipi_send(cpuid_to_pcpu[cpu], ipi); -} - -/* - * Handle an IPI sent to this processor. - */ -static int -mips_ipi_handler(void *arg) -{ - u_int cpu, ipi, ipi_bitmap; - int bit; - - cpu = PCPU_GET(cpuid); - - platform_ipi_clear(); /* quiesce the pending ipi interrupt */ - - ipi_bitmap = atomic_readandclear_int(PCPU_PTR(pending_ipis)); - if (ipi_bitmap == 0) - return (FILTER_STRAY); - - CTR1(KTR_SMP, "smp_handle_ipi(), ipi_bitmap=%x", ipi_bitmap); - - while ((bit = ffs(ipi_bitmap))) { - bit = bit - 1; - ipi = 1 << bit; - ipi_bitmap &= ~ipi; - switch (ipi) { - case IPI_RENDEZVOUS: - CTR0(KTR_SMP, "IPI_RENDEZVOUS"); - smp_rendezvous_action(); - break; - - case IPI_AST: - CTR0(KTR_SMP, "IPI_AST"); - break; - - case IPI_STOP: - /* - * IPI_STOP_HARD is mapped to IPI_STOP so it is not - * necessary to add it in the switch. - */ - CTR0(KTR_SMP, "IPI_STOP or IPI_STOP_HARD"); - - savectx(&stoppcbs[cpu]); - tlb_save(); - - /* Indicate we are stopped */ - CPU_SET_ATOMIC(cpu, &stopped_cpus); - - /* Wait for restart */ - while (!CPU_ISSET(cpu, &started_cpus)) - cpu_spinwait(); - - CPU_CLR_ATOMIC(cpu, &started_cpus); - CPU_CLR_ATOMIC(cpu, &stopped_cpus); - CTR0(KTR_SMP, "IPI_STOP (restart)"); - break; - case IPI_PREEMPT: - CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__); - sched_preempt(curthread); - break; - case IPI_HARDCLOCK: - CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__); - hardclockintr(); - break; - default: - panic("Unknown IPI 0x%0x on cpu %d", ipi, curcpu); - } - } - - return (FILTER_HANDLED); -} - -static int -start_ap(int cpuid) -{ - int cpus, ms; - - cpus = mp_naps; - dpcpu = (void *)kmem_malloc(DPCPU_SIZE, M_WAITOK | M_ZERO); - - mips_sync(); - - if (platform_start_ap(cpuid) != 0) - return (-1); /* could not start AP */ - - for (ms = 0; ms < 5000; ++ms) { - if (mp_naps > cpus) - return (0); /* success */ - else - DELAY(1000); - } - - return (-2); /* timeout initializing AP */ -} - -void -cpu_mp_setmaxid(void) -{ - cpuset_t cpumask; - int cpu, last; - - platform_cpu_mask(&cpumask); - mp_ncpus = 0; - last = 1; - while ((cpu = CPU_FFS(&cpumask)) != 0) { - last = cpu; - cpu--; - CPU_CLR(cpu, &cpumask); - mp_ncpus++; - } - if (mp_ncpus <= 0) - mp_ncpus = 1; - - mp_maxid = min(last, MAXCPU) - 1; -} - -void -cpu_mp_announce(void) -{ - /* NOTHING */ -} - -struct cpu_group * -cpu_topo(void) -{ - return (platform_smp_topo()); -} - -int -cpu_mp_probe(void) -{ - - return (mp_ncpus > 1); -} - -void -cpu_mp_start(void) -{ - int error, cpuid; - cpuset_t cpumask; - - mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); - - CPU_ZERO(&all_cpus); - platform_cpu_mask(&cpumask); - - while (!CPU_EMPTY(&cpumask)) { - cpuid = CPU_FFS(&cpumask) - 1; - CPU_CLR(cpuid, &cpumask); - - if (cpuid >= MAXCPU) { - printf("cpu_mp_start: ignoring AP #%d.\n", cpuid); - continue; - } - - if (cpuid != platform_processor_id()) { - if ((error = start_ap(cpuid)) != 0) { - printf("AP #%d failed to start: %d\n", cpuid, error); - continue; - } - if (bootverbose) - printf("AP #%d started!\n", cpuid); - } - CPU_SET(cpuid, &all_cpus); - } -} - -void -smp_init_secondary(u_int32_t cpuid) -{ - - /* TLB */ - mips_wr_wired(0); - tlb_invalidate_all(); - mips_wr_wired(VMWIRED_ENTRIES); - - /* - * We assume that the L1 cache on the APs is identical to the one - * on the BSP. - */ - mips_dcache_wbinv_all(); - mips_icache_sync_all(); - - mips_sync(); - - mips_wr_entryhi(0); - - pcpu_init(PCPU_ADDR(cpuid), cpuid, sizeof(struct pcpu)); - dpcpu_init(dpcpu, cpuid); - - /* The AP has initialized successfully - allow the BSP to proceed */ - ++mp_naps; - - /* Spin until the BSP is ready to release the APs */ - while (!aps_ready) - ; - -#ifdef PLATFORM_INIT_SECONDARY - platform_init_secondary(cpuid); -#endif - - /* Initialize curthread. */ - KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread")); - PCPU_SET(curthread, PCPU_GET(idlethread)); - schedinit_ap(); - - mtx_lock_spin(&ap_boot_mtx); - - smp_cpus++; - - CTR1(KTR_SMP, "SMP: AP CPU #%d launched", PCPU_GET(cpuid)); - - if (bootverbose) - printf("SMP: AP CPU #%d launched.\n", PCPU_GET(cpuid)); - - if (smp_cpus == mp_ncpus) { - atomic_store_rel_int(&smp_started, 1); - } - - mtx_unlock_spin(&ap_boot_mtx); - - while (smp_started == 0) - ; /* nothing */ - - /* Start per-CPU event timers. */ - cpu_initclocks_ap(); - - /* enter the scheduler */ - sched_throw(NULL); - - panic("scheduler returned us to %s", __func__); - /* NOTREACHED */ -} - -static void -release_aps(void *dummy __unused) -{ - int ipi_irq; - - if (mp_ncpus == 1) - return; - -#ifdef PLATFORM_INIT_SECONDARY - platform_init_secondary(0); -#endif - - /* - * IPI handler - */ - ipi_irq = platform_ipi_hardintr_num(); - if (ipi_irq != -1) { - cpu_establish_hardintr("ipi", mips_ipi_handler, NULL, NULL, - ipi_irq, INTR_TYPE_MISC | INTR_EXCL, NULL); - } else { - ipi_irq = platform_ipi_softintr_num(); - cpu_establish_softintr("ipi", mips_ipi_handler, NULL, NULL, - ipi_irq, INTR_TYPE_MISC | INTR_EXCL, NULL); - } - - atomic_store_rel_int(&aps_ready, 1); - - while (smp_started == 0) - ; /* nothing */ -} - -SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, release_aps, NULL); diff --git a/sys/mips/mips/mpboot.S b/sys/mips/mips/mpboot.S deleted file mode 100644 index d87b86b2b01..00000000000 --- a/sys/mips/mips/mpboot.S +++ /dev/null @@ -1,87 +0,0 @@ -/*- - * Copyright (c) 2010 Neelkanth Natu - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include - -#include "assym.inc" - - .text - .set noat - .set noreorder - -/* XXX move this to a header file */ -#if defined(CPU_CNMIPS) -#define CLEAR_STATUS \ - mfc0 a0, MIPS_COP_0_STATUS ;\ - li a2, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX) ; \ - or a0, a0, a2 ; \ - li a2, ~(MIPS_SR_INT_IE | MIPS_SR_EXL | MIPS_SR_KSU_USER | MIPS_SR_BEV) ; \ - and a0, a0, a2 ; \ - mtc0 a0, MIPS_COP_0_STATUS -#elif defined(__mips_n64) -#define CLEAR_STATUS \ - li a0, (MIPS_SR_KX | MIPS_SR_UX) ; \ - mtc0 a0, MIPS_COP_0_STATUS -#else -#define CLEAR_STATUS \ - mtc0 zero, MIPS_COP_0_STATUS -#endif - -GLOBAL(mpentry) - CLEAR_STATUS /* disable interrupts */ - - mtc0 zero, MIPS_COP_0_CAUSE /* clear soft interrupts */ - - li t0, MIPS_CCA_CACHED /* make sure kseg0 is cached */ - mtc0 t0, MIPS_COP_0_CONFIG - COP0_SYNC - - jal platform_processor_id /* get the processor number */ - nop - move s0, v0 - - /* - * Initialize stack and call machine startup - */ - PTR_LA sp, _C_LABEL(pcpu_space) - addiu sp, (PAGE_SIZE * 2) - CALLFRAME_SIZ - sll t0, s0, PAGE_SHIFT + 1 - addu sp, sp, t0 - - /* Zero out old ra and old fp for debugger */ - sw zero, CALLFRAME_SIZ - 4(sp) - sw zero, CALLFRAME_SIZ - 8(sp) - - PTR_LA gp, _C_LABEL(_gp) - - jal platform_init_ap - move a0, s0 - jal smp_init_secondary - move a0, s0 - - PANIC("AP startup failed!") diff --git a/sys/mips/mips/nexus.c b/sys/mips/mips/nexus.c deleted file mode 100644 index b15061282db..00000000000 --- a/sys/mips/mips/nexus.c +++ /dev/null @@ -1,615 +0,0 @@ -/*- - * Copyright 1998 Massachusetts Institute of Technology - * - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose and without fee is hereby - * granted, provided that both the above copyright notice and this - * permission notice appear in all copies, that both the above - * copyright notice and this permission notice appear in all - * supporting documentation, and that the name of M.I.T. not be used - * in advertising or publicity pertaining to distribution of the - * software without specific, written prior permission. M.I.T. makes - * no representations about the suitability of this software for any - * purpose. It is provided "as is" without express or implied - * warranty. - * - * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS - * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT - * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -/* - * This code implements a `root nexus' for MIPS Architecture - * machines. The function of the root nexus is to serve as an - * attachment point for both processors and buses, and to manage - * resources which are common to all of them. In particular, - * this code implements the core resource managers for interrupt - * requests and memory address space. - */ -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#ifdef INTRNG -#include -#else -#include -#endif - -#ifdef FDT -#include -#include -#include "ofw_bus_if.h" -#endif - -#undef NEXUS_DEBUG -#ifdef NEXUS_DEBUG -#define dprintf printf -#else -#define dprintf(x, arg...) -#endif /* NEXUS_DEBUG */ - -#ifdef INTRNG -#define NUM_MIPS_IRQS intr_nirq /* Any INTRNG-mapped IRQ */ -#else -#define NUM_MIPS_IRQS 6 /* HW IRQs only */ -#endif - -static MALLOC_DEFINE(M_NEXUSDEV, "nexusdev", "Nexus device"); - -struct nexus_device { - struct resource_list nx_resources; -}; - -#define DEVTONX(dev) ((struct nexus_device *)device_get_ivars(dev)) - -static struct rman irq_rman; -static struct rman mem_rman; - -static struct resource * - nexus_alloc_resource(device_t, device_t, int, int *, rman_res_t, - rman_res_t, rman_res_t, u_int); -static device_t nexus_add_child(device_t, u_int, const char *, int); -static int nexus_attach(device_t); -static void nexus_delete_resource(device_t, device_t, int, int); -static struct resource_list * - nexus_get_reslist(device_t, device_t); -static int nexus_get_resource(device_t, device_t, int, int, rman_res_t *, - rman_res_t *); -static int nexus_print_child(device_t, device_t); -static int nexus_print_all_resources(device_t dev); -static int nexus_probe(device_t); -static int nexus_release_resource(device_t, device_t, int, int, - struct resource *); -static int nexus_set_resource(device_t, device_t, int, int, rman_res_t, - rman_res_t); -static int nexus_activate_resource(device_t, device_t, int, int, - struct resource *); -static int nexus_deactivate_resource(device_t, device_t, int, int, - struct resource *); -static void nexus_hinted_child(device_t, const char *, int); -static int nexus_setup_intr(device_t dev, device_t child, - struct resource *res, int flags, driver_filter_t *filt, - driver_intr_t *intr, void *arg, void **cookiep); -static int nexus_teardown_intr(device_t, device_t, struct resource *, - void *); -#ifdef INTRNG -#ifdef SMP -static int nexus_bind_intr(device_t, device_t, struct resource *, int); -#endif -#ifdef FDT -static int nexus_ofw_map_intr(device_t dev, device_t child, - phandle_t iparent, int icells, pcell_t *intr); -#endif -static int nexus_describe_intr(device_t dev, device_t child, - struct resource *irq, void *cookie, const char *descr); -static int nexus_config_intr(device_t dev, int irq, enum intr_trigger trig, - enum intr_polarity pol); -#endif - -static device_method_t nexus_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, nexus_probe), - DEVMETHOD(device_attach, nexus_attach), - - /* Bus interface */ - DEVMETHOD(bus_add_child, nexus_add_child), - DEVMETHOD(bus_alloc_resource, nexus_alloc_resource), - DEVMETHOD(bus_delete_resource, nexus_delete_resource), - DEVMETHOD(bus_get_resource, nexus_get_resource), - DEVMETHOD(bus_get_resource_list, nexus_get_reslist), - DEVMETHOD(bus_print_child, nexus_print_child), - DEVMETHOD(bus_release_resource, nexus_release_resource), - DEVMETHOD(bus_set_resource, nexus_set_resource), - DEVMETHOD(bus_setup_intr, nexus_setup_intr), - DEVMETHOD(bus_teardown_intr, nexus_teardown_intr), - DEVMETHOD(bus_activate_resource,nexus_activate_resource), - DEVMETHOD(bus_deactivate_resource, nexus_deactivate_resource), - DEVMETHOD(bus_hinted_child, nexus_hinted_child), -#ifdef INTRNG - DEVMETHOD(bus_config_intr, nexus_config_intr), - DEVMETHOD(bus_describe_intr, nexus_describe_intr), -#ifdef SMP - DEVMETHOD(bus_bind_intr, nexus_bind_intr), -#endif -#ifdef FDT - DEVMETHOD(ofw_bus_map_intr, nexus_ofw_map_intr), -#endif -#endif - { 0, 0 } -}; - -static driver_t nexus_driver = { - "nexus", - nexus_methods, - 1 /* no softc */ -}; -static devclass_t nexus_devclass; - -static int -nexus_probe(device_t dev) -{ - - device_set_desc(dev, "MIPS32 root nexus"); - - irq_rman.rm_start = 0; - irq_rman.rm_end = NUM_MIPS_IRQS - 1; - irq_rman.rm_type = RMAN_ARRAY; - irq_rman.rm_descr = "Hardware IRQs"; - if (rman_init(&irq_rman) != 0 || - rman_manage_region(&irq_rman, 0, NUM_MIPS_IRQS - 1) != 0) { - panic("%s: irq_rman", __func__); - } - - mem_rman.rm_start = 0; - mem_rman.rm_end = BUS_SPACE_MAXADDR; - mem_rman.rm_type = RMAN_ARRAY; - mem_rman.rm_descr = "Memory addresses"; - if (rman_init(&mem_rman) != 0 || - rman_manage_region(&mem_rman, 0, BUS_SPACE_MAXADDR) != 0) { - panic("%s: mem_rman", __func__); - } - - return (0); -} - -static int -nexus_attach(device_t dev) -{ -#if defined(INTRNG) && !defined(FDT) - int error; - - if ((error = mips_pic_map_fixed_intrs())) - return (error); -#endif - - bus_generic_probe(dev); - bus_enumerate_hinted_children(dev); - bus_generic_attach(dev); - - return (0); -} - -static int -nexus_print_child(device_t bus, device_t child) -{ - int retval = 0; - - retval += bus_print_child_header(bus, child); - retval += nexus_print_all_resources(child); - if (device_get_flags(child)) - retval += printf(" flags %#x", device_get_flags(child)); - retval += printf(" on %s\n", device_get_nameunit(bus)); - - return (retval); -} - -static int -nexus_print_all_resources(device_t dev) -{ - struct nexus_device *ndev = DEVTONX(dev); - struct resource_list *rl = &ndev->nx_resources; - int retval = 0; - - if (STAILQ_FIRST(rl)) - retval += printf(" at"); - - retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); - retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); - - return (retval); -} - -static device_t -nexus_add_child(device_t bus, u_int order, const char *name, int unit) -{ - device_t child; - struct nexus_device *ndev; - - ndev = malloc(sizeof(struct nexus_device), M_NEXUSDEV, M_NOWAIT|M_ZERO); - if (!ndev) - return (0); - resource_list_init(&ndev->nx_resources); - - child = device_add_child_ordered(bus, order, name, unit); - if (child == NULL) { - device_printf(bus, "failed to add child: %s%d\n", name, unit); - return (0); - } - - /* should we free this in nexus_child_detached? */ - device_set_ivars(child, ndev); - - return (child); -} - -/* - * Allocate a resource on behalf of child. NB: child is usually going to be a - * child of one of our descendants, not a direct child of nexus0. - * (Exceptions include footbridge.) - */ -static struct resource * -nexus_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct nexus_device *ndev = DEVTONX(child); - struct resource *rv; - struct resource_list_entry *rle; - struct rman *rm; - int isdefault, needactivate, passthrough; - - dprintf("%s: entry (%p, %p, %d, %p, %p, %p, %jd, %d)\n", - __func__, bus, child, type, rid, (void *)(intptr_t)start, - (void *)(intptr_t)end, count, flags); - dprintf("%s: requested rid is %d\n", __func__, *rid); - - isdefault = (RMAN_IS_DEFAULT_RANGE(start, end) && count == 1); - needactivate = flags & RF_ACTIVE; - passthrough = (device_get_parent(child) != bus); - rle = NULL; - - /* - * If this is an allocation of the "default" range for a given RID, - * and we know what the resources for this device are (ie. they aren't - * maintained by a child bus), then work out the start/end values. - */ - if (!passthrough && isdefault) { - rle = resource_list_find(&ndev->nx_resources, type, *rid); - if (rle == NULL) - return (NULL); - if (rle->res != NULL) { - panic("%s: resource entry is busy", __func__); - } - start = rle->start; - end = rle->end; - count = rle->count; - } - - switch (type) { - case SYS_RES_IRQ: - rm = &irq_rman; - break; - case SYS_RES_MEMORY: - rm = &mem_rman; - break; - default: - printf("%s: unknown resource type %d\n", __func__, type); - return (0); - } - - rv = rman_reserve_resource(rm, start, end, count, flags, child); - if (rv == NULL) { - printf("%s: could not reserve resource for %s\n", __func__, - device_get_nameunit(child)); - return (0); - } - - rman_set_rid(rv, *rid); - - if (needactivate) { - if (bus_activate_resource(child, type, *rid, rv)) { - printf("%s: could not activate resource\n", __func__); - rman_release_resource(rv); - return (0); - } - } - - return (rv); -} - -static struct resource_list * -nexus_get_reslist(device_t dev, device_t child) -{ - struct nexus_device *ndev = DEVTONX(child); - - return (&ndev->nx_resources); -} - -static int -nexus_set_resource(device_t dev, device_t child, int type, int rid, - rman_res_t start, rman_res_t count) -{ - struct nexus_device *ndev = DEVTONX(child); - struct resource_list *rl = &ndev->nx_resources; - struct resource_list_entry *rle; - - dprintf("%s: entry (%p, %p, %d, %d, %p, %jd)\n", - __func__, dev, child, type, rid, (void *)(intptr_t)start, count); - - rle = resource_list_add(rl, type, rid, start, start + count - 1, - count); - if (rle == NULL) - return (ENXIO); - - return (0); -} - -static int -nexus_get_resource(device_t dev, device_t child, int type, int rid, - rman_res_t *startp, rman_res_t *countp) -{ - struct nexus_device *ndev = DEVTONX(child); - struct resource_list *rl = &ndev->nx_resources; - struct resource_list_entry *rle; - - rle = resource_list_find(rl, type, rid); - if (!rle) - return(ENOENT); - if (startp) - *startp = rle->start; - if (countp) - *countp = rle->count; - return (0); -} - -static void -nexus_delete_resource(device_t dev, device_t child, int type, int rid) -{ - struct nexus_device *ndev = DEVTONX(child); - struct resource_list *rl = &ndev->nx_resources; - - dprintf("%s: entry\n", __func__); - - resource_list_delete(rl, type, rid); -} - -static int -nexus_release_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - dprintf("%s: entry\n", __func__); - - if (rman_get_flags(r) & RF_ACTIVE) { - int error = bus_deactivate_resource(child, type, rid, r); - if (error) - return error; - } - - return (rman_release_resource(r)); -} - -static int -nexus_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - void *vaddr; - vm_paddr_t paddr; - vm_size_t psize; - int err; - - /* - * If this is a memory resource, use pmap_mapdev to map it. - */ - if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) { - paddr = rman_get_start(r); - psize = rman_get_size(r); - rman_set_bustag(r, mips_bus_space_generic); - err = bus_space_map(rman_get_bustag(r), paddr, psize, 0, - (bus_space_handle_t *)&vaddr); - if (err != 0) { - rman_deactivate_resource(r); - return (err); - } - rman_set_virtual(r, vaddr); - rman_set_bushandle(r, (bus_space_handle_t)(uintptr_t)vaddr); - } else if (type == SYS_RES_IRQ) { -#ifdef INTRNG - err = mips_pic_activate_intr(child, r); - if (err != 0) { - rman_deactivate_resource(r); - return (err); - } -#endif - } - - return (rman_activate_resource(r)); -} - -static int -nexus_deactivate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - bus_space_handle_t vaddr; - bus_size_t psize; - - vaddr = rman_get_bushandle(r); - - if (type == SYS_RES_MEMORY && vaddr != 0) { - psize = (bus_size_t)rman_get_size(r); - bus_space_unmap(rman_get_bustag(r), vaddr, psize); - rman_set_virtual(r, NULL); - rman_set_bushandle(r, 0); - } else if (type == SYS_RES_IRQ) { -#ifdef INTRNG - mips_pic_deactivate_intr(child, r); -#endif - } - - return (rman_deactivate_resource(r)); -} - -static int -nexus_setup_intr(device_t dev, device_t child, struct resource *res, int flags, - driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep) -{ -#ifdef INTRNG - return (intr_setup_irq(child, res, filt, intr, arg, flags, cookiep)); -#else - int irq; - register_t s; - - s = intr_disable(); - irq = rman_get_start(res); - if (irq >= NUM_MIPS_IRQS) { - intr_restore(s); - return (0); - } - - cpu_establish_hardintr(device_get_nameunit(child), filt, intr, arg, - irq, flags, cookiep); - intr_restore(s); - - return (0); -#endif -} - -static int -nexus_teardown_intr(device_t dev, device_t child, struct resource *r, void *ih) -{ - -#ifdef INTRNG - return (intr_teardown_irq(child, r, ih)); -#else - printf("Unimplemented %s at %s:%d\n", __func__, __FILE__, __LINE__); - return (0); -#endif -} - -#ifdef INTRNG -static int -nexus_config_intr(device_t dev, int irq, enum intr_trigger trig, - enum intr_polarity pol) -{ - - device_printf(dev, "bus_config_intr is obsolete and not supported!\n"); - return (EOPNOTSUPP); -} - -static int -nexus_describe_intr(device_t dev, device_t child, struct resource *irq, - void *cookie, const char *descr) -{ - - return (intr_describe_irq(child, irq, cookie, descr)); -} - -#ifdef SMP -static int -nexus_bind_intr(device_t dev, device_t child, struct resource *irq, int cpu) -{ - - return (intr_bind_irq(child, irq, cpu)); -} -#endif - -#ifdef FDT -static int -nexus_ofw_map_intr(device_t dev, device_t child, phandle_t iparent, int icells, - pcell_t *intr) -{ - u_int irq; - struct intr_map_data_fdt *fdt_data; - size_t len; - - len = sizeof(*fdt_data) + icells * sizeof(pcell_t); - fdt_data = (struct intr_map_data_fdt *)intr_alloc_map_data( - INTR_MAP_DATA_FDT, len, M_WAITOK | M_ZERO); - fdt_data->iparent = iparent; - fdt_data->ncells = icells; - memcpy(fdt_data->cells, intr, icells * sizeof(pcell_t)); - irq = intr_map_irq(NULL, iparent, (struct intr_map_data *)fdt_data); - return (irq); -} -#endif -#endif /* INTRNG */ - -static void -nexus_hinted_child(device_t bus, const char *dname, int dunit) -{ - device_t child; - long maddr; - int msize; - int order; - int result; - int irq; - int mem_hints_count; - - if ((resource_int_value(dname, dunit, "order", &order)) != 0) - order = 1000; - child = BUS_ADD_CHILD(bus, order, dname, dunit); - if (child == NULL) - return; - - /* - * Set hard-wired resources for hinted child using - * specific RIDs. - */ - mem_hints_count = 0; - if (resource_long_value(dname, dunit, "maddr", &maddr) == 0) - mem_hints_count++; - if (resource_int_value(dname, dunit, "msize", &msize) == 0) - mem_hints_count++; - - /* check if all info for mem resource has been provided */ - if ((mem_hints_count > 0) && (mem_hints_count < 2)) { - printf("Either maddr or msize hint is missing for %s%d\n", - dname, dunit); - } - else if (mem_hints_count) { - dprintf("%s: discovered hinted child %s at maddr %p(%d)\n", - __func__, device_get_nameunit(child), - (void *)(intptr_t)maddr, msize); - - result = bus_set_resource(child, SYS_RES_MEMORY, 0, - (u_long) maddr, msize); - if (result != 0) { - device_printf(bus, - "warning: bus_set_resource() failed\n"); - } - } - - if (resource_int_value(dname, dunit, "irq", &irq) == 0) { - result = bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1); - if (result != 0) - device_printf(bus, - "warning: bus_set_resource() failed\n"); - } -} - -EARLY_DRIVER_MODULE(nexus, root, nexus_driver, nexus_devclass, 0, 0, - BUS_PASS_BUS + BUS_PASS_ORDER_EARLY); diff --git a/sys/mips/mips/octeon_cop2.c b/sys/mips/mips/octeon_cop2.c deleted file mode 100644 index 4bb8f816ca6..00000000000 --- a/sys/mips/mips/octeon_cop2.c +++ /dev/null @@ -1,62 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011, Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include - -#include - -static uma_zone_t ctxzone; - -static void -octeon_cop2_init(void* dummy) -{ - printf("Create COP2 context zone\n"); - ctxzone = uma_zcreate("COP2 context", - sizeof(struct octeon_cop2_state), - NULL, NULL, NULL, NULL, UMA_ALIGN_LONG, 0); -} - -struct octeon_cop2_state * -octeon_cop2_alloc_ctx() -{ - return uma_zalloc(ctxzone, M_NOWAIT); -} - -void -octeon_cop2_free_ctx(struct octeon_cop2_state *ctx) -{ - uma_zfree(ctxzone, ctx); -} - -SYSINIT(octeon_cop2, SI_SUB_CPU, SI_ORDER_FIRST, octeon_cop2_init, NULL); diff --git a/sys/mips/mips/octeon_cop2_swtch.S b/sys/mips/mips/octeon_cop2_swtch.S deleted file mode 100644 index d244c15be13..00000000000 --- a/sys/mips/mips/octeon_cop2_swtch.S +++ /dev/null @@ -1,244 +0,0 @@ -/*- - * Copyright (c) 2011 Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include - -#include "assym.inc" - -.set noreorder - -#define SAVE_COP2_REGISTER(reg) \ - dmfc2 t1, reg; sd t1, reg##_OFFSET(a0) - - -#define RESTORE_COP2_REGISTER(reg) \ - ld t1, reg##_OFFSET(a0); dmtc2 t1, reg##_SET - -LEAF(octeon_cop2_save) - - /* save original cop2 status in t2*/ - mfc0 t2, MIPS_COP_0_STATUS - or t0, t2, MIPS_SR_COP_2_BIT - and t0, t0, ~MIPS_SR_INT_IE - mtc0 t0, MIPS_COP_0_STATUS - - /* Get CvmCtl register */ - dmfc0 t0, $9, 7 - - /* CRC state */ - SAVE_COP2_REGISTER(COP2_CRC_IV) - SAVE_COP2_REGISTER(COP2_CRC_LENGTH) - SAVE_COP2_REGISTER(COP2_CRC_POLY) - - /* if CvmCtl[NODFA_CP2] -> save_nodfa */ - bbit1 t0, 28, save_nodfa - nop - - /* LLM state */ - SAVE_COP2_REGISTER(COP2_LLM_DAT0) - SAVE_COP2_REGISTER(COP2_LLM_DAT1) - -save_nodfa: - /* crypto stuff is irrelevant if CvmCtl[NOCRYPTO] */ - bbit1 t0, 26, save_done - nop - - SAVE_COP2_REGISTER(COP2_3DES_IV) - SAVE_COP2_REGISTER(COP2_3DES_KEY0) - SAVE_COP2_REGISTER(COP2_3DES_KEY1) - SAVE_COP2_REGISTER(COP2_3DES_KEY2) - SAVE_COP2_REGISTER(COP2_3DES_RESULT) - - SAVE_COP2_REGISTER(COP2_AES_INP0) - SAVE_COP2_REGISTER(COP2_AES_IV0) - SAVE_COP2_REGISTER(COP2_AES_IV1) - SAVE_COP2_REGISTER(COP2_AES_KEY0) - SAVE_COP2_REGISTER(COP2_AES_KEY1) - SAVE_COP2_REGISTER(COP2_AES_KEY2) - SAVE_COP2_REGISTER(COP2_AES_KEY3) - SAVE_COP2_REGISTER(COP2_AES_KEYLEN) - SAVE_COP2_REGISTER(COP2_AES_RESULT0) - SAVE_COP2_REGISTER(COP2_AES_RESULT1) - - dmfc0 t0, $15 - li t1, 0x000d0000 /* Octeon Pass1 */ - beq t0, t1, save_pass1 - nop - - SAVE_COP2_REGISTER(COP2_HSH_DATW0) - SAVE_COP2_REGISTER(COP2_HSH_DATW1) - SAVE_COP2_REGISTER(COP2_HSH_DATW2) - SAVE_COP2_REGISTER(COP2_HSH_DATW3) - SAVE_COP2_REGISTER(COP2_HSH_DATW4) - SAVE_COP2_REGISTER(COP2_HSH_DATW5) - SAVE_COP2_REGISTER(COP2_HSH_DATW6) - SAVE_COP2_REGISTER(COP2_HSH_DATW7) - SAVE_COP2_REGISTER(COP2_HSH_DATW8) - SAVE_COP2_REGISTER(COP2_HSH_DATW9) - SAVE_COP2_REGISTER(COP2_HSH_DATW10) - SAVE_COP2_REGISTER(COP2_HSH_DATW11) - SAVE_COP2_REGISTER(COP2_HSH_DATW12) - SAVE_COP2_REGISTER(COP2_HSH_DATW13) - SAVE_COP2_REGISTER(COP2_HSH_DATW14) - SAVE_COP2_REGISTER(COP2_HSH_IVW0) - SAVE_COP2_REGISTER(COP2_HSH_IVW1) - SAVE_COP2_REGISTER(COP2_HSH_IVW2) - SAVE_COP2_REGISTER(COP2_HSH_IVW3) - SAVE_COP2_REGISTER(COP2_HSH_IVW4) - SAVE_COP2_REGISTER(COP2_HSH_IVW5) - SAVE_COP2_REGISTER(COP2_HSH_IVW6) - SAVE_COP2_REGISTER(COP2_HSH_IVW7) - SAVE_COP2_REGISTER(COP2_GFM_MULT0) - SAVE_COP2_REGISTER(COP2_GFM_MULT1) - SAVE_COP2_REGISTER(COP2_GFM_POLY) - SAVE_COP2_REGISTER(COP2_GFM_RESULT0) - SAVE_COP2_REGISTER(COP2_GFM_RESULT1) - /* restore saved COP2 status */ - mtc0 t2, MIPS_COP_0_STATUS - jr ra - nop - -save_pass1: - SAVE_COP2_REGISTER(COP2_HSH_DATW0_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_DATW1_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_DATW2_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_DATW3_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_DATW4_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_DATW5_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_DATW6_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_IVW0_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_IVW1_PASS1) - SAVE_COP2_REGISTER(COP2_HSH_IVW2_PASS1) - -save_done: - /* restore saved COP2 status */ - mtc0 t2, MIPS_COP_0_STATUS - jr ra - nop -END(octeon_cop2_save) - -LEAF(octeon_cop2_restore) - /* save original cop2 status in t2*/ - mfc0 t2, MIPS_COP_0_STATUS - or t0, t2, MIPS_SR_COP_2_BIT - and t0, t0, ~MIPS_SR_INT_IE - mtc0 t0, MIPS_COP_0_STATUS - /* Get CvmCtl register */ - dmfc0 t0, $9, 7 - - /* CRC state */ - RESTORE_COP2_REGISTER(COP2_CRC_IV) - RESTORE_COP2_REGISTER(COP2_CRC_LENGTH) - RESTORE_COP2_REGISTER(COP2_CRC_POLY) - - /* if CvmCtl[NODFA_CP2] -> save_nodfa */ - bbit1 t0, 28, restore_nodfa - nop - - /* LLM state */ - RESTORE_COP2_REGISTER(COP2_LLM_DAT0) - RESTORE_COP2_REGISTER(COP2_LLM_DAT1) - -restore_nodfa: - /* crypto stuff is irrelevant if CvmCtl[NOCRYPTO] */ - bbit1 t0, 26, restore_done - nop - - RESTORE_COP2_REGISTER(COP2_3DES_IV) - RESTORE_COP2_REGISTER(COP2_3DES_KEY0) - RESTORE_COP2_REGISTER(COP2_3DES_KEY1) - RESTORE_COP2_REGISTER(COP2_3DES_KEY2) - RESTORE_COP2_REGISTER(COP2_3DES_RESULT) - - RESTORE_COP2_REGISTER(COP2_AES_INP0) - RESTORE_COP2_REGISTER(COP2_AES_IV0) - RESTORE_COP2_REGISTER(COP2_AES_IV1) - RESTORE_COP2_REGISTER(COP2_AES_KEY0) - RESTORE_COP2_REGISTER(COP2_AES_KEY1) - RESTORE_COP2_REGISTER(COP2_AES_KEY2) - RESTORE_COP2_REGISTER(COP2_AES_KEY3) - RESTORE_COP2_REGISTER(COP2_AES_KEYLEN) - RESTORE_COP2_REGISTER(COP2_AES_RESULT0) - RESTORE_COP2_REGISTER(COP2_AES_RESULT1) - - dmfc0 t0, $15 - li t1, 0x000d0000 /* Octeon Pass1 */ - beq t0, t1, restore_pass1 - nop - - RESTORE_COP2_REGISTER(COP2_HSH_DATW0) - RESTORE_COP2_REGISTER(COP2_HSH_DATW1) - RESTORE_COP2_REGISTER(COP2_HSH_DATW2) - RESTORE_COP2_REGISTER(COP2_HSH_DATW3) - RESTORE_COP2_REGISTER(COP2_HSH_DATW4) - RESTORE_COP2_REGISTER(COP2_HSH_DATW5) - RESTORE_COP2_REGISTER(COP2_HSH_DATW6) - RESTORE_COP2_REGISTER(COP2_HSH_DATW7) - RESTORE_COP2_REGISTER(COP2_HSH_DATW8) - RESTORE_COP2_REGISTER(COP2_HSH_DATW9) - RESTORE_COP2_REGISTER(COP2_HSH_DATW10) - RESTORE_COP2_REGISTER(COP2_HSH_DATW11) - RESTORE_COP2_REGISTER(COP2_HSH_DATW12) - RESTORE_COP2_REGISTER(COP2_HSH_DATW13) - RESTORE_COP2_REGISTER(COP2_HSH_DATW14) - RESTORE_COP2_REGISTER(COP2_HSH_IVW0) - RESTORE_COP2_REGISTER(COP2_HSH_IVW1) - RESTORE_COP2_REGISTER(COP2_HSH_IVW2) - RESTORE_COP2_REGISTER(COP2_HSH_IVW3) - RESTORE_COP2_REGISTER(COP2_HSH_IVW4) - RESTORE_COP2_REGISTER(COP2_HSH_IVW5) - RESTORE_COP2_REGISTER(COP2_HSH_IVW6) - RESTORE_COP2_REGISTER(COP2_HSH_IVW7) - RESTORE_COP2_REGISTER(COP2_GFM_MULT0) - RESTORE_COP2_REGISTER(COP2_GFM_MULT1) - RESTORE_COP2_REGISTER(COP2_GFM_POLY) - RESTORE_COP2_REGISTER(COP2_GFM_RESULT0) - RESTORE_COP2_REGISTER(COP2_GFM_RESULT1) - /* restore saved COP2 status */ - mtc0 t2, MIPS_COP_0_STATUS - jr ra - nop - -restore_pass1: - RESTORE_COP2_REGISTER(COP2_HSH_DATW0_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_DATW1_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_DATW2_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_DATW3_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_DATW4_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_DATW5_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_DATW6_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_IVW0_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_IVW1_PASS1) - RESTORE_COP2_REGISTER(COP2_HSH_IVW2_PASS1) - -restore_done: - /* restore saved COP2 status */ - mtc0 t2, MIPS_COP_0_STATUS - jr ra - nop -END(octeon_cop2_restore) diff --git a/sys/mips/mips/ofw_machdep.c b/sys/mips/mips/ofw_machdep.c deleted file mode 100644 index eeefbc8401c..00000000000 --- a/sys/mips/mips/ofw_machdep.c +++ /dev/null @@ -1,72 +0,0 @@ -/*- - * Copyright (c) 2015 Ian Lepore - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include - -#include -#include - -#include -#include - -int -OF_decode_addr(phandle_t dev, int regno, bus_space_tag_t *tag, - bus_space_handle_t *handle, bus_size_t *sz) -{ - bus_addr_t addr; - bus_size_t size; - pcell_t pci_hi; - int flags, res; - - res = ofw_reg_to_paddr(dev, regno, &addr, &size, &pci_hi); - if (res < 0) - return (res); - - /* - * Nothing special to do for PCI busses right now. - * This may need to be handled per-platform when it does come up. - */ -#ifdef notyet - if (pci_hi == OFW_PADDR_NOT_PCI) { - *tag = fdtbus_bs_tag; - flags = 0; - } else { - *tag = fdtbus_bs_tag; - flags = (pci_hi & OFW_PCI_PHYS_HI_PREFETCHABLE) ? - BUS_SPACE_MAP_PREFETCHABLE: 0; - } -#else - *tag = fdtbus_bs_tag; - flags = 0; -#endif - - if (sz != NULL) - *sz = size; - - return (bus_space_map(*tag, addr, size, flags, handle)); -} diff --git a/sys/mips/mips/pm_machdep.c b/sys/mips/mips/pm_machdep.c deleted file mode 100644 index 0ace98dae42..00000000000 --- a/sys/mips/mips/pm_machdep.c +++ /dev/null @@ -1,516 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992 Terrence R. Lambert. - * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * William Jolitz. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 - * from: src/sys/i386/i386/machdep.c,v 1.385.2.3 2000/05/10 02:04:46 obrien - * JNPR: pm_machdep.c,v 1.9.2.1 2007/08/16 15:59:10 girish - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define UCONTEXT_MAGIC 0xACEDBADE - -/* - * Send an interrupt to process. - * - * Stack is set up to allow sigcode stored - * at top to call routine, followed by kcall - * to sigreturn routine below. After sigreturn - * resets the signal mask, the stack, and the - * frame pointer, it returns to the user - * specified pc, psl. - */ -void -sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) -{ - struct proc *p; - struct thread *td; - struct trapframe *regs; - struct sigacts *psp; - struct sigframe sf, *sfp; - int sig; - int oonstack; - - td = curthread; - p = td->td_proc; - PROC_LOCK_ASSERT(p, MA_OWNED); - sig = ksi->ksi_signo; - psp = p->p_sigacts; - mtx_assert(&psp->ps_mtx, MA_OWNED); - - regs = td->td_frame; - oonstack = sigonstack(regs->sp); - - /* save user context */ - bzero(&sf, sizeof(struct sigframe)); - sf.sf_uc.uc_sigmask = *mask; - sf.sf_uc.uc_stack = td->td_sigstk; - sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; - sf.sf_uc.uc_mcontext.mc_pc = regs->pc; - sf.sf_uc.uc_mcontext.mullo = regs->mullo; - sf.sf_uc.uc_mcontext.mulhi = regs->mulhi; - sf.sf_uc.uc_mcontext.mc_tls = td->td_md.md_tls; - sf.sf_uc.uc_mcontext.mc_regs[0] = UCONTEXT_MAGIC; /* magic number */ - bcopy((void *)®s->ast, (void *)&sf.sf_uc.uc_mcontext.mc_regs[1], - sizeof(sf.sf_uc.uc_mcontext.mc_regs) - sizeof(register_t)); - sf.sf_uc.uc_mcontext.mc_fpused = td->td_md.md_flags & MDTD_FPUSED; - if (sf.sf_uc.uc_mcontext.mc_fpused) { - /* if FPU has current state, save it first */ - if (td == PCPU_GET(fpcurthread)) - MipsSaveCurFPState(td); - bcopy((void *)&td->td_frame->f0, - (void *)sf.sf_uc.uc_mcontext.mc_fpregs, - sizeof(sf.sf_uc.uc_mcontext.mc_fpregs)); - } - - /* Allocate and validate space for the signal handler context. */ - if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && - SIGISMEMBER(psp->ps_sigonstack, sig)) { - sfp = (struct sigframe *)(((uintptr_t)td->td_sigstk.ss_sp + - td->td_sigstk.ss_size - sizeof(struct sigframe)) - & ~(STACK_ALIGN - 1)); - } else - sfp = (struct sigframe *)((vm_offset_t)(regs->sp - - sizeof(struct sigframe)) & ~(STACK_ALIGN - 1)); - - /* Build the argument list for the signal handler. */ - regs->a0 = sig; - regs->a2 = (register_t)(intptr_t)&sfp->sf_uc; - if (SIGISMEMBER(psp->ps_siginfo, sig)) { - /* Signal handler installed with SA_SIGINFO. */ - regs->a1 = (register_t)(intptr_t)&sfp->sf_si; - /* sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; */ - - /* fill siginfo structure */ - sf.sf_si = ksi->ksi_info; - sf.sf_si.si_signo = sig; - } else { - /* Old FreeBSD-style arguments. */ - regs->a1 = ksi->ksi_code; - regs->a3 = (uintptr_t)ksi->ksi_addr; - /* sf.sf_ahu.sf_handler = catcher; */ - } - - mtx_unlock(&psp->ps_mtx); - PROC_UNLOCK(p); - - /* - * Copy the sigframe out to the user's stack. - */ - if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) { - /* - * Something is wrong with the stack pointer. - * ...Kill the process. - */ - PROC_LOCK(p); - sigexit(td, SIGILL); - } - - regs->pc = (register_t)(intptr_t)catcher; - regs->t9 = (register_t)(intptr_t)catcher; - regs->sp = (register_t)(intptr_t)sfp; - /* - * Signal trampoline code is at base of user stack. - */ - regs->ra = (register_t)(intptr_t)PROC_PS_STRINGS(p) - - *(p->p_sysent->sv_szsigcode); - PROC_LOCK(p); - mtx_lock(&psp->ps_mtx); -} - -/* - * System call to cleanup state after a signal - * has been taken. Reset signal mask and - * stack state from context left by sendsig (above). - * Return to previous pc as specified by - * context left by sendsig. - */ -int -sys_sigreturn(struct thread *td, struct sigreturn_args *uap) -{ - ucontext_t uc; - int error; - - error = copyin(uap->sigcntxp, &uc, sizeof(uc)); - if (error != 0) - return (error); - - error = set_mcontext(td, &uc.uc_mcontext); - if (error != 0) - return (error); - - kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); - - return (EJUSTRETURN); -} - -int -ptrace_set_pc(struct thread *td, unsigned long addr) -{ - td->td_frame->pc = (register_t) addr; - return 0; -} - -static int -ptrace_read_int(struct thread *td, uintptr_t addr, int *v) -{ - - if (proc_readmem(td, td->td_proc, addr, v, sizeof(*v)) != sizeof(*v)) - return (EFAULT); - return (0); -} - -static int -ptrace_write_int(struct thread *td, uintptr_t addr, int v) -{ - - if (proc_writemem(td, td->td_proc, addr, &v, sizeof(v)) != sizeof(v)) - return (EFAULT); - return (0); -} - -int -ptrace_single_step(struct thread *td) -{ - uintptr_t va; - struct trapframe *locr0 = td->td_frame; - int error; - int bpinstr = MIPS_BREAK_SSTEP; - int curinstr; - struct proc *p; - - p = td->td_proc; - PROC_UNLOCK(p); - /* - * Fetch what's at the current location. - */ - error = ptrace_read_int(td, locr0->pc, &curinstr); - if (error) - goto out; - - CTR3(KTR_PTRACE, - "ptrace_single_step: tid %d, current instr at %#lx: %#08x", - td->td_tid, locr0->pc, curinstr); - - /* compute next address after current location */ - if (locr0->cause & MIPS_CR_BR_DELAY) { - va = MipsEmulateBranch(locr0, locr0->pc, locr0->fsr, - (uintptr_t)&curinstr); - } else { - va = locr0->pc + 4; - } - if (td->td_md.md_ss_addr) { - printf("SS %s (%d): breakpoint already set at %p (va %p)\n", - p->p_comm, p->p_pid, (void *)td->td_md.md_ss_addr, - (void *)va); /* XXX */ - error = EFAULT; - goto out; - } - td->td_md.md_ss_addr = va; - /* - * Fetch what's at the current location. - */ - error = ptrace_read_int(td, (off_t)va, &td->td_md.md_ss_instr); - if (error) - goto out; - - /* - * Store breakpoint instruction at the "next" location now. - */ - error = ptrace_write_int(td, va, bpinstr); - - /* - * The sync'ing of I & D caches is done by proc_rwmem() - * through proc_writemem(). - */ - -out: - PROC_LOCK(p); - if (error == 0) - CTR3(KTR_PTRACE, - "ptrace_single_step: tid %d, break set at %#lx: (%#08x)", - td->td_tid, va, td->td_md.md_ss_instr); - return (error); -} - -void -makectx(struct trapframe *tf, struct pcb *pcb) -{ - - pcb->pcb_context[PCB_REG_RA] = tf->ra; - pcb->pcb_context[PCB_REG_PC] = tf->pc; - pcb->pcb_context[PCB_REG_SP] = tf->sp; -} - -int -fill_regs(struct thread *td, struct reg *regs) -{ - memcpy(regs, td->td_frame, sizeof(struct reg)); - return (0); -} - -int -set_regs(struct thread *td, struct reg *regs) -{ - struct trapframe *f; - register_t sr; - - f = (struct trapframe *) td->td_frame; - /* - * Don't allow the user to change SR - */ - sr = f->sr; - memcpy(td->td_frame, regs, sizeof(struct reg)); - f->sr = sr; - return (0); -} - -int -get_mcontext(struct thread *td, mcontext_t *mcp, int flags) -{ - struct trapframe *tp; - - tp = td->td_frame; - PROC_LOCK(curthread->td_proc); - mcp->mc_onstack = sigonstack(tp->sp); - PROC_UNLOCK(curthread->td_proc); - bcopy((void *)&td->td_frame->zero, (void *)&mcp->mc_regs, - sizeof(mcp->mc_regs)); - - mcp->mc_fpused = td->td_md.md_flags & MDTD_FPUSED; - if (mcp->mc_fpused) { - bcopy((void *)&td->td_frame->f0, (void *)&mcp->mc_fpregs, - sizeof(mcp->mc_fpregs)); - } - if (flags & GET_MC_CLEAR_RET) { - mcp->mc_regs[V0] = 0; - mcp->mc_regs[V1] = 0; - mcp->mc_regs[A3] = 0; - } - - mcp->mc_pc = td->td_frame->pc; - mcp->mullo = td->td_frame->mullo; - mcp->mulhi = td->td_frame->mulhi; - mcp->mc_tls = td->td_md.md_tls; - return (0); -} - -int -set_mcontext(struct thread *td, mcontext_t *mcp) -{ - struct trapframe *tp; - - tp = td->td_frame; - bcopy((void *)&mcp->mc_regs, (void *)&td->td_frame->zero, - sizeof(mcp->mc_regs)); - - td->td_md.md_flags = mcp->mc_fpused & MDTD_FPUSED; - if (mcp->mc_fpused) { - bcopy((void *)&mcp->mc_fpregs, (void *)&td->td_frame->f0, - sizeof(mcp->mc_fpregs)); - } - td->td_frame->pc = mcp->mc_pc; - td->td_frame->mullo = mcp->mullo; - td->td_frame->mulhi = mcp->mulhi; - td->td_md.md_tls = mcp->mc_tls; - /* Dont let user to set any bits in status and cause registers. */ - - return (0); -} - -int -fill_fpregs(struct thread *td, struct fpreg *fpregs) -{ - if (td == PCPU_GET(fpcurthread)) - MipsSaveCurFPState(td); - memcpy(fpregs, &td->td_frame->f0, sizeof(struct fpreg)); - fpregs->r_regs[FIR_NUM] = cpuinfo.fpu_id; - return 0; -} - -int -set_fpregs(struct thread *td, struct fpreg *fpregs) -{ - if (PCPU_GET(fpcurthread) == td) - PCPU_SET(fpcurthread, (struct thread *)0); - memcpy(&td->td_frame->f0, fpregs, sizeof(struct fpreg)); - return 0; -} - -/* - * Clear registers on exec - * $sp is set to the stack pointer passed in. $pc is set to the entry - * point given by the exec_package passed in, as is $t9 (used for PIC - * code by the MIPS elf abi). - */ -void -exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack) -{ - - bzero((caddr_t)td->td_frame, sizeof(struct trapframe)); - - td->td_frame->sp = ((register_t)stack) & ~(STACK_ALIGN - 1); - - /* - * If we're running o32 or n32 programs but have 64-bit registers, - * GCC may use stack-relative addressing near the top of user - * address space that, due to sign extension, will yield an - * invalid address. For instance, if sp is 0x7fffff00 then GCC - * might do something like this to load a word from 0x7ffffff0: - * - * addu sp, sp, 32768 - * lw t0, -32528(sp) - * - * On systems with 64-bit registers, sp is sign-extended to - * 0xffffffff80007f00 and the load is instead done from - * 0xffffffff7ffffff0. - * - * To prevent this, we subtract 64K from the stack pointer here - * for processes with 32-bit pointers. - */ -#if defined(__mips_n32) || defined(__mips_n64) - if (!SV_PROC_FLAG(td->td_proc, SV_LP64)) - td->td_frame->sp -= 65536; -#endif - - td->td_frame->pc = imgp->entry_addr & ~3; - td->td_frame->t9 = imgp->entry_addr & ~3; /* abicall req */ - td->td_frame->sr = MIPS_SR_KSU_USER | MIPS_SR_EXL | MIPS_SR_INT_IE | - (mips_rd_status() & MIPS_SR_INT_MASK); -#if defined(__mips_n32) || defined(__mips_n64) - td->td_frame->sr |= MIPS_SR_PX; -#endif -#if defined(__mips_n64) - if (SV_PROC_FLAG(td->td_proc, SV_LP64)) - td->td_frame->sr |= MIPS_SR_UX; - td->td_frame->sr |= MIPS_SR_KX; -#endif - /* - * FREEBSD_DEVELOPERS_FIXME: - * Setup any other CPU-Specific registers (Not MIPS Standard) - * and/or bits in other standard MIPS registers (if CPU-Specific) - * that are needed. - */ - - /* - * Set up arguments for the rtld-capable crt0: - * a0 stack pointer - * a1 rtld cleanup (filled in by dynamic loader) - * a2 rtld object (filled in by dynamic loader) - * a3 ps_strings - */ - td->td_frame->a0 = (register_t) stack; - td->td_frame->a1 = 0; - td->td_frame->a2 = 0; - td->td_frame->a3 = (register_t)imgp->ps_strings; - - td->td_md.md_flags &= ~MDTD_FPUSED; - if (PCPU_GET(fpcurthread) == td) - PCPU_SET(fpcurthread, (struct thread *)0); - td->td_md.md_ss_addr = 0; - - td->td_md.md_tls = NULL; -#ifdef COMPAT_FREEBSD32 - if (!SV_PROC_FLAG(td->td_proc, SV_LP64)) - td->td_proc->p_md.md_tls_tcb_offset = TLS_TP_OFFSET + - TLS_TCB_SIZE32; - else -#endif - td->td_proc->p_md.md_tls_tcb_offset = TLS_TP_OFFSET + - TLS_TCB_SIZE; -} - -int -ptrace_clear_single_step(struct thread *td) -{ - struct proc *p; - int error; - - p = td->td_proc; - PROC_LOCK_ASSERT(p, MA_OWNED); - if (!td->td_md.md_ss_addr) - return EINVAL; - - /* - * Restore original instruction and clear BP - */ - PROC_UNLOCK(p); - CTR3(KTR_PTRACE, - "ptrace_clear_single_step: tid %d, restore instr at %#lx: %#08x", - td->td_tid, td->td_md.md_ss_addr, td->td_md.md_ss_instr); - error = ptrace_write_int(td, td->td_md.md_ss_addr, - td->td_md.md_ss_instr); - PROC_LOCK(p); - - /* The sync'ing of I & D caches is done by proc_rwmem(). */ - - if (error != 0) { - log(LOG_ERR, - "SS %s %d: can't restore instruction at %p: %x\n", - p->p_comm, p->p_pid, (void *)td->td_md.md_ss_addr, - td->td_md.md_ss_instr); - } - td->td_md.md_ss_addr = 0; - return 0; -} diff --git a/sys/mips/mips/pmap.c b/sys/mips/mips/pmap.c deleted file mode 100644 index 3792515e1b5..00000000000 --- a/sys/mips/mips/pmap.c +++ /dev/null @@ -1,3763 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1991 Regents of the University of California. - * All rights reserved. - * Copyright (c) 1994 John S. Dyson - * All rights reserved. - * Copyright (c) 1994 David Greenman - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and William Jolitz of UUNET Technologies Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 - * from: src/sys/i386/i386/pmap.c,v 1.250.2.8 2000/11/21 00:09:14 ps - * JNPR: pmap.c,v 1.11.2.1 2007/08/16 11:51:06 girish - */ - -/* - * Manages physical address maps. - * - * Since the information managed by this module is - * also stored by the logical address mapping module, - * this module may throw away valid virtual-to-physical - * mappings at almost any time. However, invalidations - * of virtual-to-physical mappings must be done as - * requested. - * - * In order to cope with hardware architectures which - * make virtual-to-physical map invalidates expensive, - * this module may delay invalidate or reduced protection - * operations until such time as they are actually - * necessary. This module is given full information as - * to which processors are currently using which maps, - * and to when physical maps must be made correct. - */ - -#include -#include "opt_ddb.h" -#include "opt_pmap.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef DDB -#include -#endif - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#undef PMAP_DEBUG - -#if !defined(DIAGNOSTIC) -#define PMAP_INLINE __inline -#else -#define PMAP_INLINE -#endif - -#ifdef PV_STATS -#define PV_STAT(x) do { x ; } while (0) -#else -#define PV_STAT(x) do { } while (0) -#endif - -/* - * Get PDEs and PTEs for user/kernel address space - */ -#define pmap_seg_index(v) (((v) >> SEGSHIFT) & (NPDEPG - 1)) -#define pmap_pde_index(v) (((v) >> PDRSHIFT) & (NPDEPG - 1)) -#define pmap_pte_index(v) (((v) >> PAGE_SHIFT) & (NPTEPG - 1)) -#define pmap_pde_pindex(v) ((v) >> PDRSHIFT) - -#ifdef __mips_n64 -#define NUPDE (NPDEPG * NPDEPG) -#define NUSERPGTBLS (NUPDE + NPDEPG) -#else -#define NUPDE (NPDEPG) -#define NUSERPGTBLS (NUPDE) -#endif - -#define is_kernel_pmap(x) ((x) == kernel_pmap) - -struct pmap kernel_pmap_store; -pd_entry_t *kernel_segmap; - -vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ -vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ - -static int need_local_mappings; - -static int nkpt; -unsigned pmap_max_asid; /* max ASID supported by the system */ - -#define PMAP_ASID_RESERVED 0 - -vm_offset_t kernel_vm_end = VM_MIN_KERNEL_ADDRESS; - -static void pmap_asid_alloc(pmap_t pmap); - -static struct rwlock_padalign pvh_global_lock; - -/* - * Data for the pv entry allocation mechanism - */ -static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks); -static int pv_entry_count; - -static void free_pv_chunk(struct pv_chunk *pc); -static void free_pv_entry(pmap_t pmap, pv_entry_t pv); -static pv_entry_t get_pv_entry(pmap_t pmap, boolean_t try); -static vm_page_t pmap_pv_reclaim(pmap_t locked_pmap); -static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va); -static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, - vm_offset_t va); -static vm_page_t pmap_alloc_direct_page(unsigned int index, int req); -static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, - vm_page_t m, vm_prot_t prot, vm_page_t mpte); -static void pmap_grow_direct_page(int req); -static int pmap_remove_pte(struct pmap *pmap, pt_entry_t *ptq, vm_offset_t va, - pd_entry_t pde); -static void pmap_remove_page(struct pmap *pmap, vm_offset_t va); -static void pmap_remove_entry(struct pmap *pmap, vm_page_t m, vm_offset_t va); -static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_page_t mpte, - vm_offset_t va, vm_page_t m); -static void pmap_update_page(pmap_t pmap, vm_offset_t va, pt_entry_t pte); -static void pmap_invalidate_all(pmap_t pmap); -static void pmap_invalidate_page(pmap_t pmap, vm_offset_t va); -static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m); - -static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, u_int flags); -static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, u_int flags); -static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t); -static pt_entry_t init_pte_prot(vm_page_t m, vm_prot_t access, vm_prot_t prot); - -static void pmap_invalidate_page_action(void *arg); -static void pmap_invalidate_range_action(void *arg); -static void pmap_update_page_action(void *arg); - -#ifndef __mips_n64 - -static vm_offset_t crashdumpva; - -/* - * These functions are for high memory (memory above 512Meg in 32 bit) support. - * The highmem area does not have a KSEG0 mapping, and we need a mechanism to - * do temporary per-CPU mappings for pmap_zero_page, pmap_copy_page etc. - * - * At bootup, we reserve 2 virtual pages per CPU for mapping highmem pages. To - * access a highmem physical address on a CPU, we map the physical address to - * the reserved virtual address for the CPU in the kernel pagetable. - */ - -static void -pmap_init_reserved_pages(void) -{ - struct pcpu *pc; - vm_offset_t pages; - int i; - - if (need_local_mappings == 0) - return; - - CPU_FOREACH(i) { - pc = pcpu_find(i); - /* - * Skip if the mapping has already been initialized, - * i.e. this is the BSP. - */ - if (pc->pc_cmap1_addr != 0) - continue; - pages = kva_alloc(PAGE_SIZE * 3); - if (pages == 0) - panic("%s: unable to allocate KVA", __func__); - pc->pc_cmap1_ptep = pmap_pte(kernel_pmap, pages); - pc->pc_cmap2_ptep = pmap_pte(kernel_pmap, pages + PAGE_SIZE); - pc->pc_qmap_ptep = - pmap_pte(kernel_pmap, pages + (PAGE_SIZE * 2)); - pc->pc_cmap1_addr = pages; - pc->pc_cmap2_addr = pages + PAGE_SIZE; - pc->pc_qmap_addr = pages + (PAGE_SIZE * 2); - } -} -SYSINIT(rpages_init, SI_SUB_CPU, SI_ORDER_ANY, pmap_init_reserved_pages, NULL); - -static __inline void -pmap_alloc_lmem_map(void) -{ - PCPU_SET(cmap1_addr, virtual_avail); - PCPU_SET(cmap2_addr, virtual_avail + PAGE_SIZE); - PCPU_SET(cmap1_ptep, pmap_pte(kernel_pmap, virtual_avail)); - PCPU_SET(cmap2_ptep, pmap_pte(kernel_pmap, virtual_avail + PAGE_SIZE)); - PCPU_SET(qmap_addr, virtual_avail + (2 * PAGE_SIZE)); - PCPU_SET(qmap_ptep, pmap_pte(kernel_pmap, virtual_avail + (2 * PAGE_SIZE))); - crashdumpva = virtual_avail + (3 * PAGE_SIZE); - virtual_avail += PAGE_SIZE * 4; -} - -static __inline vm_offset_t -pmap_lmem_map1(vm_paddr_t phys) -{ - critical_enter(); - *PCPU_GET(cmap1_ptep) = - TLBLO_PA_TO_PFN(phys) | PTE_C_CACHE | PTE_D | PTE_V | PTE_G; - return (PCPU_GET(cmap1_addr)); -} - -static __inline vm_offset_t -pmap_lmem_map2(vm_paddr_t phys1, vm_paddr_t phys2) -{ - critical_enter(); - *PCPU_GET(cmap1_ptep) = - TLBLO_PA_TO_PFN(phys1) | PTE_C_CACHE | PTE_D | PTE_V | PTE_G; - *PCPU_GET(cmap2_ptep) = - TLBLO_PA_TO_PFN(phys2) | PTE_C_CACHE | PTE_D | PTE_V | PTE_G; - return (PCPU_GET(cmap1_addr)); -} - -static __inline void -pmap_lmem_unmap(void) -{ - *PCPU_GET(cmap1_ptep) = PTE_G; - tlb_invalidate_address(kernel_pmap, PCPU_GET(cmap1_addr)); - if (*PCPU_GET(cmap2_ptep) != PTE_G) { - *PCPU_GET(cmap2_ptep) = PTE_G; - tlb_invalidate_address(kernel_pmap, PCPU_GET(cmap2_addr)); - } - critical_exit(); -} - -#else /* __mips_n64 */ - -static __inline void -pmap_alloc_lmem_map(void) -{ -} - -static __inline vm_offset_t -pmap_lmem_map1(vm_paddr_t phys) -{ - - return (0); -} - -static __inline vm_offset_t -pmap_lmem_map2(vm_paddr_t phys1, vm_paddr_t phys2) -{ - - return (0); -} - -static __inline vm_offset_t -pmap_lmem_unmap(void) -{ - - return (0); -} -#endif /* !__mips_n64 */ - -static __inline int -pmap_pte_cache_bits(vm_paddr_t pa, vm_page_t m) -{ - vm_memattr_t ma; - - ma = pmap_page_get_memattr(m); - if (ma == VM_MEMATTR_WRITE_BACK && !is_cacheable_mem(pa)) - ma = VM_MEMATTR_UNCACHEABLE; - return PTE_C(ma); -} -#define PMAP_PTE_SET_CACHE_BITS(pte, pa, m) { \ - pte &= ~PTE_C_MASK; \ - pte |= pmap_pte_cache_bits(pa, m); \ -} - -/* - * Page table entry lookup routines. - */ -static __inline pd_entry_t * -pmap_segmap(pmap_t pmap, vm_offset_t va) -{ - - return (&pmap->pm_segtab[pmap_seg_index(va)]); -} - -#ifdef __mips_n64 -static __inline pd_entry_t * -pmap_pdpe_to_pde(pd_entry_t *pdpe, vm_offset_t va) -{ - pd_entry_t *pde; - - pde = (pd_entry_t *)*pdpe; - return (&pde[pmap_pde_index(va)]); -} - -static __inline pd_entry_t * -pmap_pde(pmap_t pmap, vm_offset_t va) -{ - pd_entry_t *pdpe; - - pdpe = pmap_segmap(pmap, va); - if (*pdpe == NULL) - return (NULL); - - return (pmap_pdpe_to_pde(pdpe, va)); -} -#else -static __inline pd_entry_t * -pmap_pdpe_to_pde(pd_entry_t *pdpe, vm_offset_t va) -{ - - return (pdpe); -} - -static __inline -pd_entry_t *pmap_pde(pmap_t pmap, vm_offset_t va) -{ - - return (pmap_segmap(pmap, va)); -} -#endif - -static __inline pt_entry_t * -pmap_pde_to_pte(pd_entry_t *pde, vm_offset_t va) -{ - pt_entry_t *pte; - - pte = (pt_entry_t *)*pde; - return (&pte[pmap_pte_index(va)]); -} - -pt_entry_t * -pmap_pte(pmap_t pmap, vm_offset_t va) -{ - pd_entry_t *pde; - - pde = pmap_pde(pmap, va); - if (pde == NULL || *pde == NULL) - return (NULL); - - return (pmap_pde_to_pte(pde, va)); -} - -vm_offset_t -pmap_steal_memory(vm_size_t size) -{ - vm_paddr_t bank_size, pa; - vm_offset_t va; - - size = round_page(size); - bank_size = phys_avail[1] - phys_avail[0]; - while (size > bank_size) { - int i; - - for (i = 0; phys_avail[i + 2]; i += 2) { - phys_avail[i] = phys_avail[i + 2]; - phys_avail[i + 1] = phys_avail[i + 3]; - } - phys_avail[i] = 0; - phys_avail[i + 1] = 0; - if (!phys_avail[0]) - panic("pmap_steal_memory: out of memory"); - bank_size = phys_avail[1] - phys_avail[0]; - } - - pa = phys_avail[0]; - phys_avail[0] += size; - if (MIPS_DIRECT_MAPPABLE(pa) == 0) - panic("Out of memory below 512Meg?"); - va = MIPS_PHYS_TO_DIRECT(pa); - bzero((caddr_t)va, size); - return (va); -} - -/* - * Bootstrap the system enough to run with virtual memory. This - * assumes that the phys_avail array has been initialized. - */ -static void -pmap_create_kernel_pagetable(void) -{ - int i, j; - vm_offset_t ptaddr; - pt_entry_t *pte; -#ifdef __mips_n64 - pd_entry_t *pde; - vm_offset_t pdaddr; - int npt, npde; -#endif - - /* - * Allocate segment table for the kernel - */ - kernel_segmap = (pd_entry_t *)pmap_steal_memory(PAGE_SIZE); - - /* - * Allocate second level page tables for the kernel - */ -#ifdef __mips_n64 - npde = howmany(NKPT, NPDEPG); - pdaddr = pmap_steal_memory(PAGE_SIZE * npde); -#endif - nkpt = NKPT; - ptaddr = pmap_steal_memory(PAGE_SIZE * nkpt); - - /* - * The R[4-7]?00 stores only one copy of the Global bit in the - * translation lookaside buffer for each 2 page entry. Thus invalid - * entrys must have the Global bit set so when Entry LO and Entry HI - * G bits are anded together they will produce a global bit to store - * in the tlb. - */ - for (i = 0, pte = (pt_entry_t *)ptaddr; i < (nkpt * NPTEPG); i++, pte++) - *pte = PTE_G; - -#ifdef __mips_n64 - for (i = 0, npt = nkpt; npt > 0; i++) { - kernel_segmap[i] = (pd_entry_t)(pdaddr + i * PAGE_SIZE); - pde = (pd_entry_t *)kernel_segmap[i]; - - for (j = 0; j < NPDEPG && npt > 0; j++, npt--) - pde[j] = (pd_entry_t)(ptaddr + (i * NPDEPG + j) * PAGE_SIZE); - } -#else - for (i = 0, j = pmap_seg_index(VM_MIN_KERNEL_ADDRESS); i < nkpt; i++, j++) - kernel_segmap[j] = (pd_entry_t)(ptaddr + (i * PAGE_SIZE)); -#endif - - PMAP_LOCK_INIT(kernel_pmap); - kernel_pmap->pm_segtab = kernel_segmap; - CPU_FILL(&kernel_pmap->pm_active); - TAILQ_INIT(&kernel_pmap->pm_pvchunk); - kernel_pmap->pm_asid[0].asid = PMAP_ASID_RESERVED; - kernel_pmap->pm_asid[0].gen = 0; - kernel_vm_end += nkpt * NPTEPG * PAGE_SIZE; -} - -void -pmap_bootstrap(void) -{ - int i; - - /* Sort. */ -again: - for (i = 0; phys_avail[i + 1] != 0; i += 2) { - /* - * Keep the memory aligned on page boundary. - */ - phys_avail[i] = round_page(phys_avail[i]); - phys_avail[i + 1] = trunc_page(phys_avail[i + 1]); - - if (i < 2) - continue; - if (phys_avail[i - 2] > phys_avail[i]) { - vm_paddr_t ptemp[2]; - - ptemp[0] = phys_avail[i + 0]; - ptemp[1] = phys_avail[i + 1]; - - phys_avail[i + 0] = phys_avail[i - 2]; - phys_avail[i + 1] = phys_avail[i - 1]; - - phys_avail[i - 2] = ptemp[0]; - phys_avail[i - 1] = ptemp[1]; - goto again; - } - } - - /* - * In 32 bit, we may have memory which cannot be mapped directly. - * This memory will need temporary mapping before it can be - * accessed. - */ - if (!MIPS_DIRECT_MAPPABLE(phys_avail[i - 1] - 1)) - need_local_mappings = 1; - - /* - * Copy the phys_avail[] array before we start stealing memory from it. - */ - for (i = 0; phys_avail[i + 1] != 0; i += 2) { - physmem_desc[i] = phys_avail[i]; - physmem_desc[i + 1] = phys_avail[i + 1]; - } - - Maxmem = atop(phys_avail[i - 1]); - - if (bootverbose) { - printf("Physical memory chunk(s):\n"); - for (i = 0; phys_avail[i + 1] != 0; i += 2) { - vm_paddr_t size; - - size = phys_avail[i + 1] - phys_avail[i]; - printf("%#08jx - %#08jx, %ju bytes (%ju pages)\n", - (uintmax_t) phys_avail[i], - (uintmax_t) phys_avail[i + 1] - 1, - (uintmax_t) size, (uintmax_t) size / PAGE_SIZE); - } - printf("Maxmem is 0x%0jx\n", ptoa((uintmax_t)Maxmem)); - } - /* - * Steal the message buffer from the beginning of memory. - */ - msgbufp = (struct msgbuf *)pmap_steal_memory(msgbufsize); - msgbufinit(msgbufp, msgbufsize); - - /* - * Steal thread0 kstack. - */ - kstack0 = pmap_steal_memory(KSTACK_PAGES << PAGE_SHIFT); - - virtual_avail = VM_MIN_KERNEL_ADDRESS; - virtual_end = VM_MAX_KERNEL_ADDRESS; - -#ifdef SMP - /* - * Steal some virtual address space to map the pcpu area. - */ - virtual_avail = roundup2(virtual_avail, PAGE_SIZE * 2); - pcpup = (struct pcpu *)virtual_avail; - virtual_avail += PAGE_SIZE * 2; - - /* - * Initialize the wired TLB entry mapping the pcpu region for - * the BSP at 'pcpup'. Up until this point we were operating - * with the 'pcpup' for the BSP pointing to a virtual address - * in KSEG0 so there was no need for a TLB mapping. - */ - mips_pcpu_tlb_init(PCPU_ADDR(0)); - - if (bootverbose) - printf("pcpu is available at virtual address %p.\n", pcpup); -#endif - - pmap_create_kernel_pagetable(); - if (need_local_mappings) - pmap_alloc_lmem_map(); - pmap_max_asid = VMNUM_PIDS; - mips_wr_entryhi(0); - mips_wr_pagemask(0); - - /* - * Initialize the global pv list lock. - */ - rw_init(&pvh_global_lock, "pmap pv global"); -} - -/* - * Initialize a vm_page's machine-dependent fields. - */ -void -pmap_page_init(vm_page_t m) -{ - - TAILQ_INIT(&m->md.pv_list); - m->md.pv_flags = VM_MEMATTR_DEFAULT << PV_MEMATTR_SHIFT; -} - -/* - * Initialize the pmap module. - * Called by vm_init, to initialize any structures that the pmap - * system needs to map virtual memory. - */ -void -pmap_init(void) -{ -} - -/*************************************************** - * Low level helper routines..... - ***************************************************/ - -#ifdef SMP -static __inline void -pmap_call_on_active_cpus(pmap_t pmap, void (*fn)(void *), void *arg) -{ - int cpuid, cpu, self; - cpuset_t active_cpus; - - sched_pin(); - if (is_kernel_pmap(pmap)) { - smp_rendezvous(NULL, fn, NULL, arg); - goto out; - } - /* Force ASID update on inactive CPUs */ - CPU_FOREACH(cpu) { - if (!CPU_ISSET(cpu, &pmap->pm_active)) - pmap->pm_asid[cpu].gen = 0; - } - cpuid = PCPU_GET(cpuid); - /* - * XXX: barrier/locking for active? - * - * Take a snapshot of active here, any further changes are ignored. - * tlb update/invalidate should be harmless on inactive CPUs - */ - active_cpus = pmap->pm_active; - self = CPU_ISSET(cpuid, &active_cpus); - CPU_CLR(cpuid, &active_cpus); - /* Optimize for the case where this cpu is the only active one */ - if (CPU_EMPTY(&active_cpus)) { - if (self) - fn(arg); - } else { - if (self) - CPU_SET(cpuid, &active_cpus); - smp_rendezvous_cpus(active_cpus, NULL, fn, NULL, arg); - } -out: - sched_unpin(); -} -#else /* !SMP */ -static __inline void -pmap_call_on_active_cpus(pmap_t pmap, void (*fn)(void *), void *arg) -{ - int cpuid; - - if (is_kernel_pmap(pmap)) { - fn(arg); - return; - } - cpuid = PCPU_GET(cpuid); - if (!CPU_ISSET(cpuid, &pmap->pm_active)) - pmap->pm_asid[cpuid].gen = 0; - else - fn(arg); -} -#endif /* SMP */ - -static void -pmap_invalidate_all(pmap_t pmap) -{ - - pmap_call_on_active_cpus(pmap, - (void (*)(void *))tlb_invalidate_all_user, pmap); -} - -struct pmap_invalidate_page_arg { - pmap_t pmap; - vm_offset_t va; -}; - -static void -pmap_invalidate_page_action(void *arg) -{ - struct pmap_invalidate_page_arg *p = arg; - - tlb_invalidate_address(p->pmap, p->va); -} - -static void -pmap_invalidate_page(pmap_t pmap, vm_offset_t va) -{ - struct pmap_invalidate_page_arg arg; - - arg.pmap = pmap; - arg.va = va; - pmap_call_on_active_cpus(pmap, pmap_invalidate_page_action, &arg); -} - -struct pmap_invalidate_range_arg { - pmap_t pmap; - vm_offset_t sva; - vm_offset_t eva; -}; - -static void -pmap_invalidate_range_action(void *arg) -{ - struct pmap_invalidate_range_arg *p = arg; - - tlb_invalidate_range(p->pmap, p->sva, p->eva); -} - -static void -pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) -{ - struct pmap_invalidate_range_arg arg; - - arg.pmap = pmap; - arg.sva = sva; - arg.eva = eva; - pmap_call_on_active_cpus(pmap, pmap_invalidate_range_action, &arg); -} - -struct pmap_update_page_arg { - pmap_t pmap; - vm_offset_t va; - pt_entry_t pte; -}; - -static void -pmap_update_page_action(void *arg) -{ - struct pmap_update_page_arg *p = arg; - - tlb_update(p->pmap, p->va, p->pte); -} - -static void -pmap_update_page(pmap_t pmap, vm_offset_t va, pt_entry_t pte) -{ - struct pmap_update_page_arg arg; - - arg.pmap = pmap; - arg.va = va; - arg.pte = pte; - pmap_call_on_active_cpus(pmap, pmap_update_page_action, &arg); -} - -/* - * Routine: pmap_extract - * Function: - * Extract the physical page address associated - * with the given map/virtual_address pair. - */ -vm_paddr_t -pmap_extract(pmap_t pmap, vm_offset_t va) -{ - pt_entry_t *pte; - vm_offset_t retval = 0; - - PMAP_LOCK(pmap); - pte = pmap_pte(pmap, va); - if (pte) { - retval = TLBLO_PTE_TO_PA(*pte) | (va & PAGE_MASK); - } - PMAP_UNLOCK(pmap); - return (retval); -} - -/* - * Routine: pmap_extract_and_hold - * Function: - * Atomically extract and hold the physical page - * with the given pmap and virtual address pair - * if that mapping permits the given protection. - */ -vm_page_t -pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) -{ - pt_entry_t pte, *ptep; - vm_paddr_t pa; - vm_page_t m; - - m = NULL; - PMAP_LOCK(pmap); - ptep = pmap_pte(pmap, va); - if (ptep != NULL) { - pte = *ptep; - if (pte_test(&pte, PTE_V) && (!pte_test(&pte, PTE_RO) || - (prot & VM_PROT_WRITE) == 0)) { - pa = TLBLO_PTE_TO_PA(pte); - m = PHYS_TO_VM_PAGE(pa); - if (!vm_page_wire_mapped(m)) - m = NULL; - } - } - PMAP_UNLOCK(pmap); - return (m); -} - -/*************************************************** - * Low level mapping routines..... - ***************************************************/ - -/* - * add a wired page to the kva - */ -void -pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, vm_memattr_t ma) -{ - pt_entry_t *pte; - pt_entry_t opte, npte; - -#ifdef PMAP_DEBUG - printf("pmap_kenter: va: %p -> pa: %p\n", (void *)va, (void *)pa); -#endif - - pte = pmap_pte(kernel_pmap, va); - opte = *pte; - npte = TLBLO_PA_TO_PFN(pa) | PTE_C(ma) | PTE_D | PTE_V | PTE_G; - *pte = npte; - if (pte_test(&opte, PTE_V) && opte != npte) - pmap_update_page(kernel_pmap, va, npte); -} - -void -pmap_kenter(vm_offset_t va, vm_paddr_t pa) -{ - - KASSERT(is_cacheable_mem(pa), - ("pmap_kenter: memory at 0x%lx is not cacheable", (u_long)pa)); - - pmap_kenter_attr(va, pa, VM_MEMATTR_DEFAULT); -} - -void -pmap_kenter_device(vm_offset_t va, vm_size_t size, vm_paddr_t pa) -{ - - KASSERT((size & PAGE_MASK) == 0, - ("%s: device mapping not page-sized", __func__)); - - for (; size > 0; size -= PAGE_SIZE) { - /* - * XXXCEM: this is somewhat inefficient on SMP systems in that - * every single page is individually TLB-invalidated via - * rendezvous (pmap_update_page()), instead of invalidating the - * entire range via a single rendezvous. - */ - pmap_kenter_attr(va, pa, VM_MEMATTR_UNCACHEABLE); - va += PAGE_SIZE; - pa += PAGE_SIZE; - } -} - -void -pmap_kremove_device(vm_offset_t va, vm_size_t size) -{ - - KASSERT((size & PAGE_MASK) == 0, - ("%s: device mapping not page-sized", __func__)); - - /* - * XXXCEM: Similar to pmap_kenter_device, this is inefficient on SMP, - * in that pages are invalidated individually instead of a single range - * rendezvous. - */ - for (; size > 0; size -= PAGE_SIZE) { - pmap_kremove(va); - va += PAGE_SIZE; - } -} - -/* - * remove a page from the kernel pagetables - */ - /* PMAP_INLINE */ void -pmap_kremove(vm_offset_t va) -{ - pt_entry_t *pte; - - /* - * Write back all caches from the page being destroyed - */ - mips_dcache_wbinv_range_index(va, PAGE_SIZE); - - pte = pmap_pte(kernel_pmap, va); - *pte = PTE_G; - pmap_invalidate_page(kernel_pmap, va); -} - -/* - * Used to map a range of physical addresses into kernel - * virtual address space. - * - * The value passed in '*virt' is a suggested virtual address for - * the mapping. Architectures which can support a direct-mapped - * physical to virtual region can return the appropriate address - * within that region, leaving '*virt' unchanged. Other - * architectures should map the pages starting at '*virt' and - * update '*virt' with the first usable address after the mapped - * region. - * - * Use XKPHYS for 64 bit, and KSEG0 where possible for 32 bit. - */ -vm_offset_t -pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) -{ - vm_offset_t va, sva; - - if (MIPS_DIRECT_MAPPABLE(end - 1)) - return (MIPS_PHYS_TO_DIRECT(start)); - - va = sva = *virt; - while (start < end) { - pmap_kenter(va, start); - va += PAGE_SIZE; - start += PAGE_SIZE; - } - *virt = va; - return (sva); -} - -/* - * Add a list of wired pages to the kva - * this routine is only used for temporary - * kernel mappings that do not need to have - * page modification or references recorded. - * Note that old mappings are simply written - * over. The page *must* be wired. - */ -void -pmap_qenter(vm_offset_t va, vm_page_t *m, int count) -{ - int i; - vm_offset_t origva = va; - - for (i = 0; i < count; i++) { - pmap_flush_pvcache(m[i]); - pmap_kenter(va, VM_PAGE_TO_PHYS(m[i])); - va += PAGE_SIZE; - } - - mips_dcache_wbinv_range_index(origva, PAGE_SIZE*count); -} - -/* - * this routine jerks page mappings from the - * kernel -- it is meant only for temporary mappings. - */ -void -pmap_qremove(vm_offset_t va, int count) -{ - pt_entry_t *pte; - vm_offset_t origva; - - if (count < 1) - return; - mips_dcache_wbinv_range_index(va, PAGE_SIZE * count); - origva = va; - do { - pte = pmap_pte(kernel_pmap, va); - *pte = PTE_G; - va += PAGE_SIZE; - } while (--count > 0); - pmap_invalidate_range(kernel_pmap, origva, va); -} - -/*************************************************** - * Page table page management routines..... - ***************************************************/ - -/* - * Decrements a page table page's reference count, which is used to record the - * number of valid page table entries within the page. If the reference count - * drops to zero, then the page table page is unmapped. Returns TRUE if the - * page table page was unmapped and FALSE otherwise. - */ -static PMAP_INLINE boolean_t -pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m) -{ - - --m->ref_count; - if (m->ref_count == 0) { - _pmap_unwire_ptp(pmap, va, m); - return (TRUE); - } else - return (FALSE); -} - -static void -_pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m) -{ - pd_entry_t *pde; - vm_offset_t sva, eva; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - /* - * unmap the page table page - */ -#ifdef __mips_n64 - if (m->pindex < NUPDE) { - pde = pmap_pde(pmap, va); - sva = va & ~PDRMASK; - eva = sva + NBPDR; - } else { - pde = pmap_segmap(pmap, va); - sva = va & ~SEGMASK; - eva = sva + NBSEG; - } -#else - pde = pmap_pde(pmap, va); - sva = va & ~SEGMASK; - eva = sva + NBSEG; -#endif - *pde = 0; - pmap->pm_stats.resident_count--; - -#ifdef __mips_n64 - if (m->pindex < NUPDE) { - pd_entry_t *pdp; - vm_page_t pdpg; - - /* - * Recursively decrement next level pagetable refcount. - * Either that shoots down a larger range from TLBs (below) - * or we're to shoot down just the page in question. - */ - pdp = (pd_entry_t *)*pmap_segmap(pmap, va); - pdpg = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(pdp)); - if (!pmap_unwire_ptp(pmap, va, pdpg)) { - pmap_invalidate_range(pmap, sva, eva); - } - } else { - /* Segmap entry shootdown */ - pmap_invalidate_range(pmap, sva, eva); - } -#else - /* Segmap entry shootdown */ - pmap_invalidate_range(pmap, sva, eva); -#endif - - /* - * If the page is finally unwired, simply free it. - */ - vm_page_free_zero(m); - vm_wire_sub(1); -} - -/* - * After removing a page table entry, this routine is used to - * conditionally free the page, and manage the reference count. - */ -static int -pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t pde) -{ - vm_page_t mpte; - - if (va >= VM_MAXUSER_ADDRESS) - return (0); - KASSERT(pde != 0, ("pmap_unuse_pt: pde != 0")); - mpte = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(pde)); - return (pmap_unwire_ptp(pmap, va, mpte)); -} - -void -pmap_pinit0(pmap_t pmap) -{ - int i; - - PMAP_LOCK_INIT(pmap); - pmap->pm_segtab = kernel_segmap; - CPU_ZERO(&pmap->pm_active); - for (i = 0; i < MAXCPU; i++) { - pmap->pm_asid[i].asid = PMAP_ASID_RESERVED; - pmap->pm_asid[i].gen = 0; - } - PCPU_SET(curpmap, pmap); - TAILQ_INIT(&pmap->pm_pvchunk); - bzero(&pmap->pm_stats, sizeof pmap->pm_stats); -} - -static void -pmap_grow_direct_page(int req) -{ - -#ifdef __mips_n64 - vm_wait(NULL); -#else - if (!vm_page_reclaim_contig(req, 1, 0, MIPS_KSEG0_LARGEST_PHYS, - PAGE_SIZE, 0)) - vm_wait(NULL); -#endif -} - -static vm_page_t -pmap_alloc_direct_page(unsigned int index, int req) -{ - vm_page_t m; - - m = vm_page_alloc_freelist(VM_FREELIST_DIRECT, req | VM_ALLOC_WIRED | - VM_ALLOC_ZERO); - if (m == NULL) - return (NULL); - m->pindex = index; - return (m); -} - -/* - * Initialize a preallocated and zeroed pmap structure, - * such as one in a vmspace structure. - */ -int -pmap_pinit(pmap_t pmap) -{ - vm_offset_t ptdva; - vm_page_t ptdpg; - int i, req_class; - - /* - * allocate the page directory page - */ - req_class = VM_ALLOC_NORMAL; - while ((ptdpg = pmap_alloc_direct_page(NUSERPGTBLS, req_class)) == - NULL) - pmap_grow_direct_page(req_class); - - ptdva = MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(ptdpg)); - pmap->pm_segtab = (pd_entry_t *)ptdva; - CPU_ZERO(&pmap->pm_active); - for (i = 0; i < MAXCPU; i++) { - pmap->pm_asid[i].asid = PMAP_ASID_RESERVED; - pmap->pm_asid[i].gen = 0; - } - TAILQ_INIT(&pmap->pm_pvchunk); - bzero(&pmap->pm_stats, sizeof pmap->pm_stats); - - return (1); -} - -/* - * this routine is called if the page table page is not - * mapped correctly. - */ -static vm_page_t -_pmap_allocpte(pmap_t pmap, unsigned ptepindex, u_int flags) -{ - vm_offset_t pageva; - vm_page_t m; - int req_class; - - /* - * Find or fabricate a new pagetable page - */ - req_class = VM_ALLOC_NORMAL; - if ((m = pmap_alloc_direct_page(ptepindex, req_class)) == NULL) { - if ((flags & PMAP_ENTER_NOSLEEP) == 0) { - PMAP_UNLOCK(pmap); - rw_wunlock(&pvh_global_lock); - pmap_grow_direct_page(req_class); - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pmap); - } - - /* - * Indicate the need to retry. While waiting, the page - * table page may have been allocated. - */ - return (NULL); - } - - /* - * Map the pagetable page into the process address space, if it - * isn't already there. - */ - pageva = MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(m)); - -#ifdef __mips_n64 - if (ptepindex >= NUPDE) { - pmap->pm_segtab[ptepindex - NUPDE] = (pd_entry_t)pageva; - } else { - pd_entry_t *pdep, *pde; - int segindex = ptepindex >> (SEGSHIFT - PDRSHIFT); - int pdeindex = ptepindex & (NPDEPG - 1); - vm_page_t pg; - - pdep = &pmap->pm_segtab[segindex]; - if (*pdep == NULL) { - /* recurse for allocating page dir */ - if (_pmap_allocpte(pmap, NUPDE + segindex, - flags) == NULL) { - /* alloc failed, release current */ - vm_page_unwire_noq(m); - vm_page_free_zero(m); - return (NULL); - } - } else { - pg = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(*pdep)); - pg->ref_count++; - } - /* Next level entry */ - pde = (pd_entry_t *)*pdep; - KASSERT(pde[pdeindex] == 0, - ("%s: PTE %p is valid", __func__, pde[pdeindex])); - pde[pdeindex] = (pd_entry_t)pageva; - } -#else - KASSERT(pmap->pm_segtab[ptepindex] == 0, - ("%s: PTE %p is valid", __func__, pmap->pm_segtab[ptepindex])); - pmap->pm_segtab[ptepindex] = (pd_entry_t)pageva; -#endif - pmap->pm_stats.resident_count++; - return (m); -} - -static vm_page_t -pmap_allocpte(pmap_t pmap, vm_offset_t va, u_int flags) -{ - unsigned ptepindex; - pd_entry_t *pde; - vm_page_t m; - - /* - * Calculate pagetable page index - */ - ptepindex = pmap_pde_pindex(va); -retry: - /* - * Get the page directory entry - */ - pde = pmap_pde(pmap, va); - - /* - * If the page table page is mapped, we just increment the hold - * count, and activate it. - */ - if (pde != NULL && *pde != NULL) { - m = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(*pde)); - m->ref_count++; - } else { - /* - * Here if the pte page isn't mapped, or if it has been - * deallocated. - */ - m = _pmap_allocpte(pmap, ptepindex, flags); - if (m == NULL && (flags & PMAP_ENTER_NOSLEEP) == 0) - goto retry; - } - return (m); -} - -/*************************************************** - * Pmap allocation/deallocation routines. - ***************************************************/ - -/* - * Release any resources held by the given physical map. - * Called when a pmap initialized by pmap_pinit is being released. - * Should only be called if the map contains no valid mappings. - */ -void -pmap_release(pmap_t pmap) -{ - vm_offset_t ptdva; - vm_page_t ptdpg; - - KASSERT(pmap->pm_stats.resident_count == 0, - ("pmap_release: pmap resident count %ld != 0", - pmap->pm_stats.resident_count)); - - ptdva = (vm_offset_t)pmap->pm_segtab; - ptdpg = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(ptdva)); - - vm_page_unwire_noq(ptdpg); - vm_page_free_zero(ptdpg); -} - -/* - * grow the number of kernel page table entries, if needed - */ -void -pmap_growkernel(vm_offset_t addr) -{ - vm_page_t nkpg; - pd_entry_t *pde, *pdpe; - pt_entry_t *pte; - int i, req_class; - - mtx_assert(&kernel_map->system_mtx, MA_OWNED); - req_class = VM_ALLOC_INTERRUPT; - addr = roundup2(addr, NBSEG); - if (addr - 1 >= vm_map_max(kernel_map)) - addr = vm_map_max(kernel_map); - while (kernel_vm_end < addr) { - pdpe = pmap_segmap(kernel_pmap, kernel_vm_end); -#ifdef __mips_n64 - if (*pdpe == 0) { - /* new intermediate page table entry */ - nkpg = pmap_alloc_direct_page(nkpt, req_class); - if (nkpg == NULL) - panic("pmap_growkernel: no memory to grow kernel"); - *pdpe = (pd_entry_t)MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(nkpg)); - continue; /* try again */ - } -#endif - pde = pmap_pdpe_to_pde(pdpe, kernel_vm_end); - if (*pde != 0) { - kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK; - if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) { - kernel_vm_end = vm_map_max(kernel_map); - break; - } - continue; - } - - /* - * This index is bogus, but out of the way - */ - nkpg = pmap_alloc_direct_page(nkpt, req_class); -#ifndef __mips_n64 - if (nkpg == NULL && vm_page_reclaim_contig(req_class, 1, - 0, MIPS_KSEG0_LARGEST_PHYS, PAGE_SIZE, 0)) - nkpg = pmap_alloc_direct_page(nkpt, req_class); -#endif - if (nkpg == NULL) - panic("pmap_growkernel: no memory to grow kernel"); - nkpt++; - *pde = (pd_entry_t)MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(nkpg)); - - /* - * The R[4-7]?00 stores only one copy of the Global bit in - * the translation lookaside buffer for each 2 page entry. - * Thus invalid entrys must have the Global bit set so when - * Entry LO and Entry HI G bits are anded together they will - * produce a global bit to store in the tlb. - */ - pte = (pt_entry_t *)*pde; - for (i = 0; i < NPTEPG; i++) - pte[i] = PTE_G; - - kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK; - if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) { - kernel_vm_end = vm_map_max(kernel_map); - break; - } - } -} - -/*************************************************** - * page management routines. - ***************************************************/ - -CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE); -#ifdef __mips_n64 -CTASSERT(_NPCM == 3); -CTASSERT(_NPCPV == 168); -#else -CTASSERT(_NPCM == 11); -CTASSERT(_NPCPV == 336); -#endif - -static __inline struct pv_chunk * -pv_to_chunk(pv_entry_t pv) -{ - - return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK)); -} - -#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap) - -#ifdef __mips_n64 -#define PC_FREE0_1 0xfffffffffffffffful -#define PC_FREE2 0x000000fffffffffful -#else -#define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */ -#define PC_FREE10 0x0000fffful /* Free values for index 10 */ -#endif - -static const u_long pc_freemask[_NPCM] = { -#ifdef __mips_n64 - PC_FREE0_1, PC_FREE0_1, PC_FREE2 -#else - PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, - PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, - PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, - PC_FREE0_9, PC_FREE10 -#endif -}; - -static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, - "VM/pmap parameters"); - -SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0, - "Current number of pv entries"); - -#ifdef PV_STATS -static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail; - -SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0, - "Current number of pv entry chunks"); -SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0, - "Current number of pv entry chunks allocated"); -SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0, - "Current number of pv entry chunks frees"); -SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0, - "Number of times tried to get a chunk page but failed."); - -static long pv_entry_frees, pv_entry_allocs; -static int pv_entry_spare; - -SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0, - "Current number of pv entry frees"); -SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0, - "Current number of pv entry allocs"); -SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0, - "Current number of spare pv entries"); -#endif - -/* - * We are in a serious low memory condition. Resort to - * drastic measures to free some pages so we can allocate - * another pv entry chunk. - */ -static vm_page_t -pmap_pv_reclaim(pmap_t locked_pmap) -{ - struct pch newtail; - struct pv_chunk *pc; - pd_entry_t *pde; - pmap_t pmap; - pt_entry_t *pte, oldpte; - pv_entry_t pv; - vm_offset_t va; - vm_page_t m, m_pc; - u_long inuse; - int bit, field, freed, idx; - - PMAP_LOCK_ASSERT(locked_pmap, MA_OWNED); - pmap = NULL; - m_pc = NULL; - TAILQ_INIT(&newtail); - while ((pc = TAILQ_FIRST(&pv_chunks)) != NULL) { - TAILQ_REMOVE(&pv_chunks, pc, pc_lru); - if (pmap != pc->pc_pmap) { - if (pmap != NULL) { - pmap_invalidate_all(pmap); - if (pmap != locked_pmap) - PMAP_UNLOCK(pmap); - } - pmap = pc->pc_pmap; - /* Avoid deadlock and lock recursion. */ - if (pmap > locked_pmap) - PMAP_LOCK(pmap); - else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) { - pmap = NULL; - TAILQ_INSERT_TAIL(&newtail, pc, pc_lru); - continue; - } - } - - /* - * Destroy every non-wired, 4 KB page mapping in the chunk. - */ - freed = 0; - for (field = 0; field < _NPCM; field++) { - for (inuse = ~pc->pc_map[field] & pc_freemask[field]; - inuse != 0; inuse &= ~(1UL << bit)) { - bit = ffsl(inuse) - 1; - idx = field * sizeof(inuse) * NBBY + bit; - pv = &pc->pc_pventry[idx]; - va = pv->pv_va; - pde = pmap_pde(pmap, va); - KASSERT(pde != NULL && *pde != 0, - ("pmap_pv_reclaim: pde")); - pte = pmap_pde_to_pte(pde, va); - oldpte = *pte; - if (pte_test(&oldpte, PTE_W)) - continue; - if (is_kernel_pmap(pmap)) - *pte = PTE_G; - else - *pte = 0; - m = PHYS_TO_VM_PAGE(TLBLO_PTE_TO_PA(oldpte)); - if (pte_test(&oldpte, PTE_D)) - vm_page_dirty(m); - if (m->md.pv_flags & PV_TABLE_REF) - vm_page_aflag_set(m, PGA_REFERENCED); - m->md.pv_flags &= ~PV_TABLE_REF; - TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); - if (TAILQ_EMPTY(&m->md.pv_list)) - vm_page_aflag_clear(m, PGA_WRITEABLE); - pc->pc_map[field] |= 1UL << bit; - - /* - * For simplicity, we will unconditionally shoot - * down TLBs either at the end of this function - * or at the top of the loop above if we switch - * to a different pmap. - */ - (void)pmap_unuse_pt(pmap, va, *pde); - - freed++; - } - } - if (freed == 0) { - TAILQ_INSERT_TAIL(&newtail, pc, pc_lru); - continue; - } - /* Every freed mapping is for a 4 KB page. */ - pmap->pm_stats.resident_count -= freed; - PV_STAT(pv_entry_frees += freed); - PV_STAT(pv_entry_spare += freed); - pv_entry_count -= freed; - TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); - for (field = 0; field < _NPCM; field++) - if (pc->pc_map[field] != pc_freemask[field]) { - TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, - pc_list); - TAILQ_INSERT_TAIL(&newtail, pc, pc_lru); - - /* - * One freed pv entry in locked_pmap is - * sufficient. - */ - if (pmap == locked_pmap) - goto out; - break; - } - if (field == _NPCM) { - PV_STAT(pv_entry_spare -= _NPCPV); - PV_STAT(pc_chunk_count--); - PV_STAT(pc_chunk_frees++); - /* Entire chunk is free; return it. */ - m_pc = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS( - (vm_offset_t)pc)); - dump_drop_page(m_pc->phys_addr); - break; - } - } -out: - TAILQ_CONCAT(&pv_chunks, &newtail, pc_lru); - if (pmap != NULL) { - pmap_invalidate_all(pmap); - if (pmap != locked_pmap) - PMAP_UNLOCK(pmap); - } - return (m_pc); -} - -/* - * free the pv_entry back to the free list - */ -static void -free_pv_entry(pmap_t pmap, pv_entry_t pv) -{ - struct pv_chunk *pc; - int bit, field, idx; - - rw_assert(&pvh_global_lock, RA_WLOCKED); - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - PV_STAT(pv_entry_frees++); - PV_STAT(pv_entry_spare++); - pv_entry_count--; - pc = pv_to_chunk(pv); - idx = pv - &pc->pc_pventry[0]; - field = idx / (sizeof(u_long) * NBBY); - bit = idx % (sizeof(u_long) * NBBY); - pc->pc_map[field] |= 1ul << bit; - for (idx = 0; idx < _NPCM; idx++) - if (pc->pc_map[idx] != pc_freemask[idx]) { - /* - * 98% of the time, pc is already at the head of the - * list. If it isn't already, move it to the head. - */ - if (__predict_false(TAILQ_FIRST(&pmap->pm_pvchunk) != - pc)) { - TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); - TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, - pc_list); - } - return; - } - TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); - free_pv_chunk(pc); -} - -static void -free_pv_chunk(struct pv_chunk *pc) -{ - vm_page_t m; - - TAILQ_REMOVE(&pv_chunks, pc, pc_lru); - PV_STAT(pv_entry_spare -= _NPCPV); - PV_STAT(pc_chunk_count--); - PV_STAT(pc_chunk_frees++); - /* entire chunk is free, return it */ - m = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS((vm_offset_t)pc)); - dump_drop_page(m->phys_addr); - vm_page_unwire_noq(m); - vm_page_free(m); -} - -/* - * get a new pv_entry, allocating a block from the system - * when needed. - */ -static pv_entry_t -get_pv_entry(pmap_t pmap, boolean_t try) -{ - struct pv_chunk *pc; - pv_entry_t pv; - vm_page_t m; - int bit, field, idx; - - rw_assert(&pvh_global_lock, RA_WLOCKED); - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - PV_STAT(pv_entry_allocs++); - pv_entry_count++; -retry: - pc = TAILQ_FIRST(&pmap->pm_pvchunk); - if (pc != NULL) { - for (field = 0; field < _NPCM; field++) { - if (pc->pc_map[field]) { - bit = ffsl(pc->pc_map[field]) - 1; - break; - } - } - if (field < _NPCM) { - idx = field * sizeof(pc->pc_map[field]) * NBBY + bit; - pv = &pc->pc_pventry[idx]; - pc->pc_map[field] &= ~(1ul << bit); - /* If this was the last item, move it to tail */ - for (field = 0; field < _NPCM; field++) - if (pc->pc_map[field] != 0) { - PV_STAT(pv_entry_spare--); - return (pv); /* not full, return */ - } - TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); - TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); - PV_STAT(pv_entry_spare--); - return (pv); - } - } - /* No free items, allocate another chunk */ - m = vm_page_alloc_freelist(VM_FREELIST_DIRECT, VM_ALLOC_NORMAL | - VM_ALLOC_WIRED); - if (m == NULL) { - if (try) { - pv_entry_count--; - PV_STAT(pc_chunk_tryfail++); - return (NULL); - } - m = pmap_pv_reclaim(pmap); - if (m == NULL) - goto retry; - } - PV_STAT(pc_chunk_count++); - PV_STAT(pc_chunk_allocs++); - dump_add_page(m->phys_addr); - pc = (struct pv_chunk *)MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(m)); - pc->pc_pmap = pmap; - pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */ - for (field = 1; field < _NPCM; field++) - pc->pc_map[field] = pc_freemask[field]; - TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru); - pv = &pc->pc_pventry[0]; - TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); - PV_STAT(pv_entry_spare += _NPCPV - 1); - return (pv); -} - -static pv_entry_t -pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va) -{ - pv_entry_t pv; - - rw_assert(&pvh_global_lock, RA_WLOCKED); - TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) { - if (pmap == PV_PMAP(pv) && va == pv->pv_va) { - TAILQ_REMOVE(&pvh->pv_list, pv, pv_list); - break; - } - } - return (pv); -} - -static void -pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va) -{ - pv_entry_t pv; - - pv = pmap_pvh_remove(pvh, pmap, va); - KASSERT(pv != NULL, ("pmap_pvh_free: pv not found, pa %lx va %lx", - (u_long)VM_PAGE_TO_PHYS(__containerof(pvh, struct vm_page, md)), - (u_long)va)); - free_pv_entry(pmap, pv); -} - -static void -pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) -{ - - rw_assert(&pvh_global_lock, RA_WLOCKED); - pmap_pvh_free(&m->md, pmap, va); - if (TAILQ_EMPTY(&m->md.pv_list)) - vm_page_aflag_clear(m, PGA_WRITEABLE); -} - -/* - * Conditionally create a pv entry. - */ -static boolean_t -pmap_try_insert_pv_entry(pmap_t pmap, vm_page_t mpte, vm_offset_t va, - vm_page_t m) -{ - pv_entry_t pv; - - rw_assert(&pvh_global_lock, RA_WLOCKED); - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - if ((pv = get_pv_entry(pmap, TRUE)) != NULL) { - pv->pv_va = va; - TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); - return (TRUE); - } else - return (FALSE); -} - -/* - * pmap_remove_pte: do the things to unmap a page in a process - * - * Returns true if this was the last PTE in the PT (and possibly the last PT in - * the PD, and possibly the last PD in the segmap), in which case... - * - * 1) the TLB has been invalidated for the whole PT's span (at least), - * already, to ensure that MipsDoTLBMiss does not attempt to follow a - * dangling pointer into a freed page. No additional TLB shootdown is - * required. - * - * 2) if this removal was part of a sweep to remove PTEs, it is safe to jump - * to the PT span boundary and continue. - * - * 3) The given pde may now point onto a freed page and must not be - * dereferenced - * - * If the return value is false, the TLB has not been shot down (and the segmap - * entry, PD, and PT all remain in place). - */ -static int -pmap_remove_pte(struct pmap *pmap, pt_entry_t *ptq, vm_offset_t va, - pd_entry_t pde) -{ - pt_entry_t oldpte; - vm_page_t m; - vm_paddr_t pa; - - rw_assert(&pvh_global_lock, RA_WLOCKED); - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - - /* - * Write back all cache lines from the page being unmapped. - */ - mips_dcache_wbinv_range_index(va, PAGE_SIZE); - - oldpte = *ptq; - if (is_kernel_pmap(pmap)) - *ptq = PTE_G; - else - *ptq = 0; - - if (pte_test(&oldpte, PTE_W)) - pmap->pm_stats.wired_count -= 1; - - pmap->pm_stats.resident_count -= 1; - - if (pte_test(&oldpte, PTE_MANAGED)) { - pa = TLBLO_PTE_TO_PA(oldpte); - m = PHYS_TO_VM_PAGE(pa); - if (pte_test(&oldpte, PTE_D)) { - KASSERT(!pte_test(&oldpte, PTE_RO), - ("%s: modified page not writable: va: %p, pte: %#jx", - __func__, (void *)va, (uintmax_t)oldpte)); - vm_page_dirty(m); - } - if (m->md.pv_flags & PV_TABLE_REF) - vm_page_aflag_set(m, PGA_REFERENCED); - m->md.pv_flags &= ~PV_TABLE_REF; - - pmap_remove_entry(pmap, m, va); - } - return (pmap_unuse_pt(pmap, va, pde)); -} - -/* - * Remove a single page from a process address space - */ -static void -pmap_remove_page(struct pmap *pmap, vm_offset_t va) -{ - pd_entry_t *pde; - pt_entry_t *ptq; - - rw_assert(&pvh_global_lock, RA_WLOCKED); - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - pde = pmap_pde(pmap, va); - if (pde == NULL || *pde == 0) - return; - ptq = pmap_pde_to_pte(pde, va); - - /* - * If there is no pte for this address, just skip it! - */ - if (!pte_test(ptq, PTE_V)) - return; - - /* - * Remove this PTE from the PT. If this is the last one, then - * the TLB has already been shot down, so don't bother again - */ - if (!pmap_remove_pte(pmap, ptq, va, *pde)) - pmap_invalidate_page(pmap, va); -} - -/* - * Remove the given range of addresses from the specified map. - * - * It is assumed that the start and end are properly - * rounded to the page size. - */ -void -pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) -{ - pd_entry_t *pde, *pdpe; - pt_entry_t *pte; - vm_offset_t va_next; - vm_offset_t va_init, va_fini; - bool need_tlb_shootdown; - - /* - * Perform an unsynchronized read. This is, however, safe. - */ - if (pmap->pm_stats.resident_count == 0) - return; - - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pmap); - - /* - * special handling of removing one page. a very common operation - * and easy to short circuit some code. - */ - if ((sva + PAGE_SIZE) == eva) { - pmap_remove_page(pmap, sva); - goto out; - } - for (; sva < eva; sva = va_next) { - pdpe = pmap_segmap(pmap, sva); -#ifdef __mips_n64 - if (*pdpe == 0) { - va_next = (sva + NBSEG) & ~SEGMASK; - if (va_next < sva) - va_next = eva; - continue; - } -#endif - - /* Scan up to the end of the page table pointed to by pde */ - va_next = (sva + NBPDR) & ~PDRMASK; - if (va_next < sva) - va_next = eva; - - pde = pmap_pdpe_to_pde(pdpe, sva); - if (*pde == NULL) - continue; - - /* - * Limit our scan to either the end of the va represented - * by the current page table page, or to the end of the - * range being removed. - */ - if (va_next > eva) - va_next = eva; - - need_tlb_shootdown = false; - va_init = sva; - va_fini = va_next; - for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++, - sva += PAGE_SIZE) { - /* Skip over invalid entries; no need to shootdown */ - if (!pte_test(pte, PTE_V)) { - /* - * If we have not yet found a valid entry, then - * we can move the lower edge of the region to - * invalidate to the next PTE. - */ - if (!need_tlb_shootdown) - va_init = sva + PAGE_SIZE; - continue; - } - - /* - * A valid entry; the range we are shooting down must - * include this page. va_fini is used instead of sva - * so that if the range ends with a run of !PTE_V PTEs, - * but doesn't clear out so much that pmap_remove_pte - * removes the entire PT, we won't include these !PTE_V - * entries in the region to be shot down. - */ - va_fini = sva + PAGE_SIZE; - - if (pmap_remove_pte(pmap, pte, sva, *pde)) { - /* Entire PT removed and TLBs shot down. */ - need_tlb_shootdown = false; - break; - } else { - need_tlb_shootdown = true; - } - } - if (need_tlb_shootdown) - pmap_invalidate_range(pmap, va_init, va_fini); - } -out: - rw_wunlock(&pvh_global_lock); - PMAP_UNLOCK(pmap); -} - -/* - * Routine: pmap_remove_all - * Function: - * Removes this physical page from - * all physical maps in which it resides. - * Reflects back modify bits to the pager. - * - * Notes: - * Original versions of this routine were very - * inefficient because they iteratively called - * pmap_remove (slow...) - */ - -void -pmap_remove_all(vm_page_t m) -{ - pv_entry_t pv; - pmap_t pmap; - pd_entry_t *pde; - pt_entry_t *pte, tpte; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("pmap_remove_all: page %p is not managed", m)); - rw_wlock(&pvh_global_lock); - - if (m->md.pv_flags & PV_TABLE_REF) - vm_page_aflag_set(m, PGA_REFERENCED); - - while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { - pmap = PV_PMAP(pv); - PMAP_LOCK(pmap); - - /* - * If it's last mapping writeback all caches from - * the page being destroyed - */ - if (TAILQ_NEXT(pv, pv_list) == NULL) - mips_dcache_wbinv_range_index(pv->pv_va, PAGE_SIZE); - - pmap->pm_stats.resident_count--; - - pde = pmap_pde(pmap, pv->pv_va); - KASSERT(pde != NULL && *pde != 0, ("pmap_remove_all: pde")); - pte = pmap_pde_to_pte(pde, pv->pv_va); - - tpte = *pte; - if (is_kernel_pmap(pmap)) - *pte = PTE_G; - else - *pte = 0; - - if (pte_test(&tpte, PTE_W)) - pmap->pm_stats.wired_count--; - - /* - * Update the vm_page_t clean and reference bits. - */ - if (pte_test(&tpte, PTE_D)) { - KASSERT(!pte_test(&tpte, PTE_RO), - ("%s: modified page not writable: va: %p, pte: %#jx", - __func__, (void *)pv->pv_va, (uintmax_t)tpte)); - vm_page_dirty(m); - } - - if (!pmap_unuse_pt(pmap, pv->pv_va, *pde)) - pmap_invalidate_page(pmap, pv->pv_va); - - TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); - free_pv_entry(pmap, pv); - PMAP_UNLOCK(pmap); - } - - vm_page_aflag_clear(m, PGA_WRITEABLE); - m->md.pv_flags &= ~PV_TABLE_REF; - rw_wunlock(&pvh_global_lock); -} - -/* - * Set the physical protection on the - * specified range of this map as requested. - */ -void -pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) -{ - pt_entry_t pbits, *pte; - pd_entry_t *pde, *pdpe; - vm_offset_t va, va_next; - vm_paddr_t pa; - vm_page_t m; - - if ((prot & VM_PROT_READ) == VM_PROT_NONE) { - pmap_remove(pmap, sva, eva); - return; - } - if (prot & VM_PROT_WRITE) - return; - - PMAP_LOCK(pmap); - for (; sva < eva; sva = va_next) { - pdpe = pmap_segmap(pmap, sva); -#ifdef __mips_n64 - if (*pdpe == 0) { - va_next = (sva + NBSEG) & ~SEGMASK; - if (va_next < sva) - va_next = eva; - continue; - } -#endif - va_next = (sva + NBPDR) & ~PDRMASK; - if (va_next < sva) - va_next = eva; - - pde = pmap_pdpe_to_pde(pdpe, sva); - if (*pde == NULL) - continue; - - /* - * Limit our scan to either the end of the va represented - * by the current page table page, or to the end of the - * range being write protected. - */ - if (va_next > eva) - va_next = eva; - - va = va_next; - for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++, - sva += PAGE_SIZE) { - pbits = *pte; - if (!pte_test(&pbits, PTE_V) || pte_test(&pbits, - PTE_RO)) { - if (va != va_next) { - pmap_invalidate_range(pmap, va, sva); - va = va_next; - } - continue; - } - pte_set(&pbits, PTE_RO); - if (pte_test(&pbits, PTE_D)) { - pte_clear(&pbits, PTE_D); - if (pte_test(&pbits, PTE_MANAGED)) { - pa = TLBLO_PTE_TO_PA(pbits); - m = PHYS_TO_VM_PAGE(pa); - vm_page_dirty(m); - } - if (va == va_next) - va = sva; - } else { - /* - * Unless PTE_D is set, any TLB entries - * mapping "sva" don't allow write access, so - * they needn't be invalidated. - */ - if (va != va_next) { - pmap_invalidate_range(pmap, va, sva); - va = va_next; - } - } - *pte = pbits; - } - if (va != va_next) - pmap_invalidate_range(pmap, va, sva); - } - PMAP_UNLOCK(pmap); -} - -/* - * Insert the given physical page (p) at - * the specified virtual address (v) in the - * target physical map with the protection requested. - * - * If specified, the page will be wired down, meaning - * that the related pte can not be reclaimed. - * - * NB: This is the only routine which MAY NOT lazy-evaluate - * or lose information. That is, this routine must actually - * insert this page into the given map NOW. - */ -int -pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, - u_int flags, int8_t psind __unused) -{ - vm_paddr_t pa, opa; - pt_entry_t *pte; - pt_entry_t origpte, newpte; - pv_entry_t pv; - vm_page_t mpte, om; - - va &= ~PAGE_MASK; - KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig")); - KASSERT((m->oflags & VPO_UNMANAGED) != 0 || !VA_IS_CLEANMAP(va), - ("pmap_enter: managed mapping within the clean submap")); - if ((m->oflags & VPO_UNMANAGED) == 0) - VM_PAGE_OBJECT_BUSY_ASSERT(m); - pa = VM_PAGE_TO_PHYS(m); - newpte = TLBLO_PA_TO_PFN(pa) | init_pte_prot(m, flags, prot); - if ((flags & PMAP_ENTER_WIRED) != 0) - newpte |= PTE_W; - if (is_kernel_pmap(pmap)) - newpte |= PTE_G; - PMAP_PTE_SET_CACHE_BITS(newpte, pa, m); - if ((m->oflags & VPO_UNMANAGED) == 0) - newpte |= PTE_MANAGED; - - mpte = NULL; - - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pmap); - - /* - * In the case that a page table page is not resident, we are - * creating it here. - */ - if (va < VM_MAXUSER_ADDRESS) { - mpte = pmap_allocpte(pmap, va, flags); - if (mpte == NULL) { - KASSERT((flags & PMAP_ENTER_NOSLEEP) != 0, - ("pmap_allocpte failed with sleep allowed")); - rw_wunlock(&pvh_global_lock); - PMAP_UNLOCK(pmap); - return (KERN_RESOURCE_SHORTAGE); - } - } - pte = pmap_pte(pmap, va); - - /* - * Page Directory table entry not valid, we need a new PT page - */ - if (pte == NULL) { - panic("pmap_enter: invalid page directory, pdir=%p, va=%p", - (void *)pmap->pm_segtab, (void *)va); - } - - origpte = *pte; - KASSERT(!pte_test(&origpte, PTE_D | PTE_RO | PTE_V), - ("pmap_enter: modified page not writable: va: %p, pte: %#jx", - (void *)va, (uintmax_t)origpte)); - opa = TLBLO_PTE_TO_PA(origpte); - - /* - * Mapping has not changed, must be protection or wiring change. - */ - if (pte_test(&origpte, PTE_V) && opa == pa) { - /* - * Wiring change, just update stats. We don't worry about - * wiring PT pages as they remain resident as long as there - * are valid mappings in them. Hence, if a user page is - * wired, the PT page will be also. - */ - if (pte_test(&newpte, PTE_W) && !pte_test(&origpte, PTE_W)) - pmap->pm_stats.wired_count++; - else if (!pte_test(&newpte, PTE_W) && pte_test(&origpte, - PTE_W)) - pmap->pm_stats.wired_count--; - - /* - * Remove extra pte reference - */ - if (mpte) - mpte->ref_count--; - - if (pte_test(&origpte, PTE_MANAGED)) { - m->md.pv_flags |= PV_TABLE_REF; - if (!pte_test(&newpte, PTE_RO)) - vm_page_aflag_set(m, PGA_WRITEABLE); - } - goto validate; - } - - pv = NULL; - - /* - * Mapping has changed, invalidate old range and fall through to - * handle validating new mapping. - */ - if (opa) { - if (is_kernel_pmap(pmap)) - *pte = PTE_G; - else - *pte = 0; - if (pte_test(&origpte, PTE_W)) - pmap->pm_stats.wired_count--; - if (pte_test(&origpte, PTE_MANAGED)) { - om = PHYS_TO_VM_PAGE(opa); - if (pte_test(&origpte, PTE_D)) - vm_page_dirty(om); - if ((om->md.pv_flags & PV_TABLE_REF) != 0) { - om->md.pv_flags &= ~PV_TABLE_REF; - vm_page_aflag_set(om, PGA_REFERENCED); - } - pv = pmap_pvh_remove(&om->md, pmap, va); - if (!pte_test(&newpte, PTE_MANAGED)) - free_pv_entry(pmap, pv); - if ((om->a.flags & PGA_WRITEABLE) != 0 && - TAILQ_EMPTY(&om->md.pv_list)) - vm_page_aflag_clear(om, PGA_WRITEABLE); - } - pmap_invalidate_page(pmap, va); - origpte = 0; - if (mpte != NULL) { - mpte->ref_count--; - KASSERT(mpte->ref_count > 0, - ("pmap_enter: missing reference to page table page," - " va: %p", (void *)va)); - } - } else - pmap->pm_stats.resident_count++; - - /* - * Enter on the PV list if part of our managed memory. - */ - if (pte_test(&newpte, PTE_MANAGED)) { - m->md.pv_flags |= PV_TABLE_REF; - if (pv == NULL) { - pv = get_pv_entry(pmap, FALSE); - pv->pv_va = va; - } - TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); - if (!pte_test(&newpte, PTE_RO)) - vm_page_aflag_set(m, PGA_WRITEABLE); - } - - /* - * Increment counters - */ - if (pte_test(&newpte, PTE_W)) - pmap->pm_stats.wired_count++; - -validate: - -#ifdef PMAP_DEBUG - printf("pmap_enter: va: %p -> pa: %p\n", (void *)va, (void *)pa); -#endif - - /* - * if the mapping or permission bits are different, we need to - * update the pte. - */ - if (origpte != newpte) { - *pte = newpte; - if (pte_test(&origpte, PTE_V)) { - KASSERT(opa == pa, ("pmap_enter: invalid update")); - if (pte_test(&origpte, PTE_D)) { - if (pte_test(&origpte, PTE_MANAGED)) - vm_page_dirty(m); - } - pmap_update_page(pmap, va, newpte); - } - } - - /* - * Sync I & D caches for executable pages. Do this only if the - * target pmap belongs to the current process. Otherwise, an - * unresolvable TLB miss may occur. - */ - if (!is_kernel_pmap(pmap) && (pmap == &curproc->p_vmspace->vm_pmap) && - (prot & VM_PROT_EXECUTE)) { - mips_icache_sync_range(va, PAGE_SIZE); - mips_dcache_wbinv_range(va, PAGE_SIZE); - } - rw_wunlock(&pvh_global_lock); - PMAP_UNLOCK(pmap); - return (KERN_SUCCESS); -} - -/* - * this code makes some *MAJOR* assumptions: - * 1. Current pmap & pmap exists. - * 2. Not wired. - * 3. Read access. - * 4. No page table pages. - * but is *MUCH* faster than pmap_enter... - */ - -void -pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) -{ - - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pmap); - (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL); - rw_wunlock(&pvh_global_lock); - PMAP_UNLOCK(pmap); -} - -static vm_page_t -pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, - vm_prot_t prot, vm_page_t mpte) -{ - pt_entry_t *pte, npte; - vm_paddr_t pa; - - KASSERT(!VA_IS_CLEANMAP(va) || - (m->oflags & VPO_UNMANAGED) != 0, - ("pmap_enter_quick_locked: managed mapping within the clean submap")); - rw_assert(&pvh_global_lock, RA_WLOCKED); - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - - /* - * In the case that a page table page is not resident, we are - * creating it here. - */ - if (va < VM_MAXUSER_ADDRESS) { - pd_entry_t *pde; - unsigned ptepindex; - - /* - * Calculate pagetable page index - */ - ptepindex = pmap_pde_pindex(va); - if (mpte && (mpte->pindex == ptepindex)) { - mpte->ref_count++; - } else { - /* - * Get the page directory entry - */ - pde = pmap_pde(pmap, va); - - /* - * If the page table page is mapped, we just - * increment the hold count, and activate it. - */ - if (pde && *pde != 0) { - mpte = PHYS_TO_VM_PAGE( - MIPS_DIRECT_TO_PHYS(*pde)); - mpte->ref_count++; - } else { - mpte = _pmap_allocpte(pmap, ptepindex, - PMAP_ENTER_NOSLEEP); - if (mpte == NULL) - return (mpte); - } - } - } else { - mpte = NULL; - } - - pte = pmap_pte(pmap, va); - if (pte_test(pte, PTE_V)) { - if (mpte != NULL) { - mpte->ref_count--; - mpte = NULL; - } - return (mpte); - } - - /* - * Enter on the PV list if part of our managed memory. - */ - if ((m->oflags & VPO_UNMANAGED) == 0 && - !pmap_try_insert_pv_entry(pmap, mpte, va, m)) { - if (mpte != NULL) { - pmap_unwire_ptp(pmap, va, mpte); - mpte = NULL; - } - return (mpte); - } - - /* - * Increment counters - */ - pmap->pm_stats.resident_count++; - - pa = VM_PAGE_TO_PHYS(m); - - /* - * Now validate mapping with RO protection - */ - npte = PTE_RO | TLBLO_PA_TO_PFN(pa) | PTE_V; - if ((m->oflags & VPO_UNMANAGED) == 0) - npte |= PTE_MANAGED; - - PMAP_PTE_SET_CACHE_BITS(npte, pa, m); - - if (is_kernel_pmap(pmap)) - *pte = npte | PTE_G; - else { - *pte = npte; - /* - * Sync I & D caches. Do this only if the target pmap - * belongs to the current process. Otherwise, an - * unresolvable TLB miss may occur. */ - if (pmap == &curproc->p_vmspace->vm_pmap) { - va &= ~PAGE_MASK; - mips_icache_sync_range(va, PAGE_SIZE); - mips_dcache_wbinv_range(va, PAGE_SIZE); - } - } - return (mpte); -} - -/* - * Make a temporary mapping for a physical address. This is only intended - * to be used for panic dumps. - * - * Use XKPHYS for 64 bit, and KSEG0 where possible for 32 bit. - */ -void * -pmap_kenter_temporary(vm_paddr_t pa, int i) -{ - vm_offset_t va; - - if (i != 0) - printf("%s: ERROR!!! More than one page of virtual address mapping not supported\n", - __func__); - - if (MIPS_DIRECT_MAPPABLE(pa)) { - va = MIPS_PHYS_TO_DIRECT(pa); - } else { -#ifndef __mips_n64 /* XXX : to be converted to new style */ - pt_entry_t *pte, npte; - - pte = pmap_pte(kernel_pmap, crashdumpva); - - /* Since this is for the debugger, no locks or any other fun */ - npte = TLBLO_PA_TO_PFN(pa) | PTE_C_CACHE | PTE_D | PTE_V | - PTE_G; - *pte = npte; - pmap_update_page(kernel_pmap, crashdumpva, npte); - va = crashdumpva; -#endif - } - return ((void *)va); -} - -void -pmap_kenter_temporary_free(vm_paddr_t pa) -{ - #ifndef __mips_n64 /* XXX : to be converted to new style */ - pt_entry_t *pte; - #endif - if (MIPS_DIRECT_MAPPABLE(pa)) { - /* nothing to do for this case */ - return; - } -#ifndef __mips_n64 /* XXX : to be converted to new style */ - pte = pmap_pte(kernel_pmap, crashdumpva); - *pte = PTE_G; - pmap_invalidate_page(kernel_pmap, crashdumpva); -#endif -} - -/* - * Maps a sequence of resident pages belonging to the same object. - * The sequence begins with the given page m_start. This page is - * mapped at the given virtual address start. Each subsequent page is - * mapped at a virtual address that is offset from start by the same - * amount as the page is offset from m_start within the object. The - * last page in the sequence is the page with the largest offset from - * m_start that can be mapped at a virtual address less than the given - * virtual address end. Not every virtual page between start and end - * is mapped; only those for which a resident page exists with the - * corresponding offset from m_start are mapped. - */ -void -pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, - vm_page_t m_start, vm_prot_t prot) -{ - vm_page_t m, mpte; - vm_pindex_t diff, psize; - - VM_OBJECT_ASSERT_LOCKED(m_start->object); - - psize = atop(end - start); - mpte = NULL; - m = m_start; - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pmap); - while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { - mpte = pmap_enter_quick_locked(pmap, start + ptoa(diff), m, - prot, mpte); - m = TAILQ_NEXT(m, listq); - } - rw_wunlock(&pvh_global_lock); - PMAP_UNLOCK(pmap); -} - -/* - * pmap_object_init_pt preloads the ptes for a given object - * into the specified pmap. This eliminates the blast of soft - * faults on process startup and immediately after an mmap. - */ -void -pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, - vm_object_t object, vm_pindex_t pindex, vm_size_t size) -{ - VM_OBJECT_ASSERT_WLOCKED(object); - KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG, - ("pmap_object_init_pt: non-device object")); -} - -/* - * Clear the wired attribute from the mappings for the specified range of - * addresses in the given pmap. Every valid mapping within that range - * must have the wired attribute set. In contrast, invalid mappings - * cannot have the wired attribute set, so they are ignored. - * - * The wired attribute of the page table entry is not a hardware feature, - * so there is no need to invalidate any TLB entries. - */ -void -pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) -{ - pd_entry_t *pde, *pdpe; - pt_entry_t *pte; - vm_offset_t va_next; - - PMAP_LOCK(pmap); - for (; sva < eva; sva = va_next) { - pdpe = pmap_segmap(pmap, sva); -#ifdef __mips_n64 - if (*pdpe == NULL) { - va_next = (sva + NBSEG) & ~SEGMASK; - if (va_next < sva) - va_next = eva; - continue; - } -#endif - va_next = (sva + NBPDR) & ~PDRMASK; - if (va_next < sva) - va_next = eva; - pde = pmap_pdpe_to_pde(pdpe, sva); - if (*pde == NULL) - continue; - if (va_next > eva) - va_next = eva; - for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++, - sva += PAGE_SIZE) { - if (!pte_test(pte, PTE_V)) - continue; - if (!pte_test(pte, PTE_W)) - panic("pmap_unwire: pte %#jx is missing PG_W", - (uintmax_t)*pte); - pte_clear(pte, PTE_W); - pmap->pm_stats.wired_count--; - } - } - PMAP_UNLOCK(pmap); -} - -/* - * Copy the range specified by src_addr/len - * from the source map to the range dst_addr/len - * in the destination map. - * - * This routine is only advisory and need not do anything. - */ - -void -pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, - vm_size_t len, vm_offset_t src_addr) -{ -} - -/* - * pmap_zero_page zeros the specified hardware page by mapping - * the page into KVM and using bzero to clear its contents. - * - * Use XKPHYS for 64 bit, and KSEG0 where possible for 32 bit. - */ -void -pmap_zero_page(vm_page_t m) -{ - vm_offset_t va; - vm_paddr_t phys = VM_PAGE_TO_PHYS(m); - - if (MIPS_DIRECT_MAPPABLE(phys)) { - va = MIPS_PHYS_TO_DIRECT(phys); - bzero((caddr_t)va, PAGE_SIZE); - mips_dcache_wbinv_range(va, PAGE_SIZE); - } else { - va = pmap_lmem_map1(phys); - bzero((caddr_t)va, PAGE_SIZE); - mips_dcache_wbinv_range(va, PAGE_SIZE); - pmap_lmem_unmap(); - } -} - -/* - * pmap_zero_page_area zeros the specified hardware page by mapping - * the page into KVM and using bzero to clear its contents. - * - * off and size may not cover an area beyond a single hardware page. - */ -void -pmap_zero_page_area(vm_page_t m, int off, int size) -{ - vm_offset_t va; - vm_paddr_t phys = VM_PAGE_TO_PHYS(m); - - if (MIPS_DIRECT_MAPPABLE(phys)) { - va = MIPS_PHYS_TO_DIRECT(phys); - bzero((char *)(caddr_t)va + off, size); - mips_dcache_wbinv_range(va + off, size); - } else { - va = pmap_lmem_map1(phys); - bzero((char *)va + off, size); - mips_dcache_wbinv_range(va + off, size); - pmap_lmem_unmap(); - } -} - -/* - * pmap_copy_page copies the specified (machine independent) - * page by mapping the page into virtual memory and using - * bcopy to copy the page, one machine dependent page at a - * time. - * - * Use XKPHYS for 64 bit, and KSEG0 where possible for 32 bit. - */ -void -pmap_copy_page(vm_page_t src, vm_page_t dst) -{ - vm_offset_t va_src, va_dst; - vm_paddr_t phys_src = VM_PAGE_TO_PHYS(src); - vm_paddr_t phys_dst = VM_PAGE_TO_PHYS(dst); - - if (MIPS_DIRECT_MAPPABLE(phys_src) && MIPS_DIRECT_MAPPABLE(phys_dst)) { - /* easy case, all can be accessed via KSEG0 */ - /* - * Flush all caches for VA that are mapped to this page - * to make sure that data in SDRAM is up to date - */ - pmap_flush_pvcache(src); - mips_dcache_wbinv_range_index( - MIPS_PHYS_TO_DIRECT(phys_dst), PAGE_SIZE); - va_src = MIPS_PHYS_TO_DIRECT(phys_src); - va_dst = MIPS_PHYS_TO_DIRECT(phys_dst); - bcopy((caddr_t)va_src, (caddr_t)va_dst, PAGE_SIZE); - mips_dcache_wbinv_range(va_dst, PAGE_SIZE); - } else { - va_src = pmap_lmem_map2(phys_src, phys_dst); - va_dst = va_src + PAGE_SIZE; - bcopy((void *)va_src, (void *)va_dst, PAGE_SIZE); - mips_dcache_wbinv_range(va_dst, PAGE_SIZE); - pmap_lmem_unmap(); - } -} - -int unmapped_buf_allowed; - -void -pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[], - vm_offset_t b_offset, int xfersize) -{ - char *a_cp, *b_cp; - vm_page_t a_m, b_m; - vm_offset_t a_pg_offset, b_pg_offset; - vm_paddr_t a_phys, b_phys; - int cnt; - - while (xfersize > 0) { - a_pg_offset = a_offset & PAGE_MASK; - cnt = min(xfersize, PAGE_SIZE - a_pg_offset); - a_m = ma[a_offset >> PAGE_SHIFT]; - a_phys = VM_PAGE_TO_PHYS(a_m); - b_pg_offset = b_offset & PAGE_MASK; - cnt = min(cnt, PAGE_SIZE - b_pg_offset); - b_m = mb[b_offset >> PAGE_SHIFT]; - b_phys = VM_PAGE_TO_PHYS(b_m); - if (MIPS_DIRECT_MAPPABLE(a_phys) && - MIPS_DIRECT_MAPPABLE(b_phys)) { - pmap_flush_pvcache(a_m); - mips_dcache_wbinv_range_index( - MIPS_PHYS_TO_DIRECT(b_phys), PAGE_SIZE); - a_cp = (char *)MIPS_PHYS_TO_DIRECT(a_phys) + - a_pg_offset; - b_cp = (char *)MIPS_PHYS_TO_DIRECT(b_phys) + - b_pg_offset; - bcopy(a_cp, b_cp, cnt); - mips_dcache_wbinv_range((vm_offset_t)b_cp, cnt); - } else { - a_cp = (char *)pmap_lmem_map2(a_phys, b_phys); - b_cp = (char *)a_cp + PAGE_SIZE; - a_cp += a_pg_offset; - b_cp += b_pg_offset; - bcopy(a_cp, b_cp, cnt); - mips_dcache_wbinv_range((vm_offset_t)b_cp, cnt); - pmap_lmem_unmap(); - } - a_offset += cnt; - b_offset += cnt; - xfersize -= cnt; - } -} - -vm_offset_t -pmap_quick_enter_page(vm_page_t m) -{ -#if defined(__mips_n64) - return MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(m)); -#else - vm_offset_t qaddr; - vm_paddr_t pa; - pt_entry_t *pte, npte; - - pa = VM_PAGE_TO_PHYS(m); - - if (MIPS_DIRECT_MAPPABLE(pa)) { - if (pmap_page_get_memattr(m) != VM_MEMATTR_WRITE_BACK) - return (MIPS_PHYS_TO_DIRECT_UNCACHED(pa)); - else - return (MIPS_PHYS_TO_DIRECT(pa)); - } - critical_enter(); - qaddr = PCPU_GET(qmap_addr); - pte = PCPU_GET(qmap_ptep); - - KASSERT(*pte == PTE_G, ("pmap_quick_enter_page: PTE busy")); - - npte = TLBLO_PA_TO_PFN(pa) | PTE_D | PTE_V | PTE_G; - PMAP_PTE_SET_CACHE_BITS(npte, pa, m); - *pte = npte; - - return (qaddr); -#endif -} - -void -pmap_quick_remove_page(vm_offset_t addr) -{ - mips_dcache_wbinv_range(addr, PAGE_SIZE); - -#if !defined(__mips_n64) - pt_entry_t *pte; - - if (addr >= MIPS_KSEG0_START && addr < MIPS_KSEG0_END) - return; - - pte = PCPU_GET(qmap_ptep); - - KASSERT(*pte != PTE_G, - ("pmap_quick_remove_page: PTE not in use")); - KASSERT(PCPU_GET(qmap_addr) == addr, - ("pmap_quick_remove_page: invalid address")); - - *pte = PTE_G; - tlb_invalidate_address(kernel_pmap, addr); - critical_exit(); -#endif -} - -/* - * Returns true if the pmap's pv is one of the first - * 16 pvs linked to from this page. This count may - * be changed upwards or downwards in the future; it - * is only necessary that true be returned for a small - * subset of pmaps for proper page aging. - */ -boolean_t -pmap_page_exists_quick(pmap_t pmap, vm_page_t m) -{ - pv_entry_t pv; - int loops = 0; - boolean_t rv; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("pmap_page_exists_quick: page %p is not managed", m)); - rv = FALSE; - rw_wlock(&pvh_global_lock); - TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { - if (PV_PMAP(pv) == pmap) { - rv = TRUE; - break; - } - loops++; - if (loops >= 16) - break; - } - rw_wunlock(&pvh_global_lock); - return (rv); -} - -/* - * Remove all pages from specified address space - * this aids process exit speeds. Also, this code - * is special cased for current process only, but - * can have the more generic (and slightly slower) - * mode enabled. This is much faster than pmap_remove - * in the case of running down an entire address space. - */ -void -pmap_remove_pages(pmap_t pmap) -{ - pd_entry_t *pde; - pt_entry_t *pte, tpte; - pv_entry_t pv; - vm_page_t m; - struct pv_chunk *pc, *npc; - u_long inuse, bitmask; - int allfree, bit, field, idx; - - if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { - printf("warning: pmap_remove_pages called with non-current pmap\n"); - return; - } - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pmap); - TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) { - allfree = 1; - for (field = 0; field < _NPCM; field++) { - inuse = ~pc->pc_map[field] & pc_freemask[field]; - while (inuse != 0) { - bit = ffsl(inuse) - 1; - bitmask = 1UL << bit; - idx = field * sizeof(inuse) * NBBY + bit; - pv = &pc->pc_pventry[idx]; - inuse &= ~bitmask; - - pde = pmap_pde(pmap, pv->pv_va); - KASSERT(pde != NULL && *pde != 0, - ("pmap_remove_pages: pde")); - pte = pmap_pde_to_pte(pde, pv->pv_va); - if (!pte_test(pte, PTE_V)) - panic("pmap_remove_pages: bad pte"); - tpte = *pte; - -/* - * We cannot remove wired pages from a process' mapping at this time - */ - if (pte_test(&tpte, PTE_W)) { - allfree = 0; - continue; - } - *pte = is_kernel_pmap(pmap) ? PTE_G : 0; - - m = PHYS_TO_VM_PAGE(TLBLO_PTE_TO_PA(tpte)); - KASSERT(m != NULL, - ("pmap_remove_pages: bad tpte %#jx", - (uintmax_t)tpte)); - - /* - * Update the vm_page_t clean and reference bits. - */ - if (pte_test(&tpte, PTE_D)) - vm_page_dirty(m); - - /* Mark free */ - PV_STAT(pv_entry_frees++); - PV_STAT(pv_entry_spare++); - pv_entry_count--; - pc->pc_map[field] |= bitmask; - pmap->pm_stats.resident_count--; - TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); - if (TAILQ_EMPTY(&m->md.pv_list)) - vm_page_aflag_clear(m, PGA_WRITEABLE); - - /* - * For simplicity, unconditionally call - * pmap_invalidate_all(), below. - */ - (void)pmap_unuse_pt(pmap, pv->pv_va, *pde); - } - } - if (allfree) { - TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); - free_pv_chunk(pc); - } - } - pmap_invalidate_all(pmap); - PMAP_UNLOCK(pmap); - rw_wunlock(&pvh_global_lock); -} - -/* - * pmap_testbit tests bits in pte's - */ -static boolean_t -pmap_testbit(vm_page_t m, int bit) -{ - pv_entry_t pv; - pmap_t pmap; - pt_entry_t *pte; - boolean_t rv = FALSE; - - if (m->oflags & VPO_UNMANAGED) - return (rv); - - rw_assert(&pvh_global_lock, RA_WLOCKED); - TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { - pmap = PV_PMAP(pv); - PMAP_LOCK(pmap); - pte = pmap_pte(pmap, pv->pv_va); - rv = pte_test(pte, bit); - PMAP_UNLOCK(pmap); - if (rv) - break; - } - return (rv); -} - -/* - * pmap_page_wired_mappings: - * - * Return the number of managed mappings to the given physical page - * that are wired. - */ -int -pmap_page_wired_mappings(vm_page_t m) -{ - pv_entry_t pv; - pmap_t pmap; - pt_entry_t *pte; - int count; - - count = 0; - if ((m->oflags & VPO_UNMANAGED) != 0) - return (count); - rw_wlock(&pvh_global_lock); - TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { - pmap = PV_PMAP(pv); - PMAP_LOCK(pmap); - pte = pmap_pte(pmap, pv->pv_va); - if (pte_test(pte, PTE_W)) - count++; - PMAP_UNLOCK(pmap); - } - rw_wunlock(&pvh_global_lock); - return (count); -} - -/* - * Clear the write and modified bits in each of the given page's mappings. - */ -void -pmap_remove_write(vm_page_t m) -{ - pmap_t pmap; - pt_entry_t pbits, *pte; - pv_entry_t pv; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("pmap_remove_write: page %p is not managed", m)); - vm_page_assert_busied(m); - - if (!pmap_page_is_write_mapped(m)) - return; - rw_wlock(&pvh_global_lock); - TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { - pmap = PV_PMAP(pv); - PMAP_LOCK(pmap); - pte = pmap_pte(pmap, pv->pv_va); - KASSERT(pte != NULL && pte_test(pte, PTE_V), - ("page on pv_list has no pte")); - pbits = *pte; - if (pte_test(&pbits, PTE_D)) { - pte_clear(&pbits, PTE_D); - vm_page_dirty(m); - } - pte_set(&pbits, PTE_RO); - if (pbits != *pte) { - *pte = pbits; - pmap_update_page(pmap, pv->pv_va, pbits); - } - PMAP_UNLOCK(pmap); - } - vm_page_aflag_clear(m, PGA_WRITEABLE); - rw_wunlock(&pvh_global_lock); -} - -/* - * pmap_ts_referenced: - * - * Return the count of reference bits for a page, clearing all of them. - */ -int -pmap_ts_referenced(vm_page_t m) -{ - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("pmap_ts_referenced: page %p is not managed", m)); - if (m->md.pv_flags & PV_TABLE_REF) { - rw_wlock(&pvh_global_lock); - m->md.pv_flags &= ~PV_TABLE_REF; - rw_wunlock(&pvh_global_lock); - return (1); - } - return (0); -} - -/* - * pmap_is_modified: - * - * Return whether or not the specified physical page was modified - * in any physical maps. - */ -boolean_t -pmap_is_modified(vm_page_t m) -{ - boolean_t rv; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("pmap_is_modified: page %p is not managed", m)); - - /* - * If the page is not busied then this check is racy. - */ - if (!pmap_page_is_write_mapped(m)) - return (FALSE); - - rw_wlock(&pvh_global_lock); - rv = pmap_testbit(m, PTE_D); - rw_wunlock(&pvh_global_lock); - return (rv); -} - -/* N/C */ - -/* - * pmap_is_prefaultable: - * - * Return whether or not the specified virtual address is elgible - * for prefault. - */ -boolean_t -pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) -{ - pd_entry_t *pde; - pt_entry_t *pte; - boolean_t rv; - - rv = FALSE; - PMAP_LOCK(pmap); - pde = pmap_pde(pmap, addr); - if (pde != NULL && *pde != 0) { - pte = pmap_pde_to_pte(pde, addr); - rv = (*pte == 0); - } - PMAP_UNLOCK(pmap); - return (rv); -} - -/* - * Apply the given advice to the specified range of addresses within the - * given pmap. Depending on the advice, clear the referenced and/or - * modified flags in each mapping and set the mapped page's dirty field. - */ -void -pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice) -{ - pd_entry_t *pde, *pdpe; - pt_entry_t *pte; - vm_offset_t va, va_next; - vm_paddr_t pa; - vm_page_t m; - - if (advice != MADV_DONTNEED && advice != MADV_FREE) - return; - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pmap); - for (; sva < eva; sva = va_next) { - pdpe = pmap_segmap(pmap, sva); -#ifdef __mips_n64 - if (*pdpe == 0) { - va_next = (sva + NBSEG) & ~SEGMASK; - if (va_next < sva) - va_next = eva; - continue; - } -#endif - va_next = (sva + NBPDR) & ~PDRMASK; - if (va_next < sva) - va_next = eva; - - pde = pmap_pdpe_to_pde(pdpe, sva); - if (*pde == NULL) - continue; - - /* - * Limit our scan to either the end of the va represented - * by the current page table page, or to the end of the - * range being write protected. - */ - if (va_next > eva) - va_next = eva; - - va = va_next; - for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++, - sva += PAGE_SIZE) { - if (!pte_test(pte, PTE_MANAGED | PTE_V)) { - if (va != va_next) { - pmap_invalidate_range(pmap, va, sva); - va = va_next; - } - continue; - } - pa = TLBLO_PTE_TO_PA(*pte); - m = PHYS_TO_VM_PAGE(pa); - m->md.pv_flags &= ~PV_TABLE_REF; - if (pte_test(pte, PTE_D)) { - if (advice == MADV_DONTNEED) { - /* - * Future calls to pmap_is_modified() - * can be avoided by making the page - * dirty now. - */ - vm_page_dirty(m); - } else { - pte_clear(pte, PTE_D); - if (va == va_next) - va = sva; - } - } else { - /* - * Unless PTE_D is set, any TLB entries - * mapping "sva" don't allow write access, so - * they needn't be invalidated. - */ - if (va != va_next) { - pmap_invalidate_range(pmap, va, sva); - va = va_next; - } - } - } - if (va != va_next) - pmap_invalidate_range(pmap, va, sva); - } - rw_wunlock(&pvh_global_lock); - PMAP_UNLOCK(pmap); -} - -/* - * Clear the modify bits on the specified physical page. - */ -void -pmap_clear_modify(vm_page_t m) -{ - pmap_t pmap; - pt_entry_t *pte; - pv_entry_t pv; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("pmap_clear_modify: page %p is not managed", m)); - vm_page_assert_busied(m); - - if (!pmap_page_is_write_mapped(m)) - return; - rw_wlock(&pvh_global_lock); - TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { - pmap = PV_PMAP(pv); - PMAP_LOCK(pmap); - pte = pmap_pte(pmap, pv->pv_va); - if (pte_test(pte, PTE_D)) { - pte_clear(pte, PTE_D); - pmap_update_page(pmap, pv->pv_va, *pte); - } - PMAP_UNLOCK(pmap); - } - rw_wunlock(&pvh_global_lock); -} - -/* - * pmap_is_referenced: - * - * Return whether or not the specified physical page was referenced - * in any physical maps. - */ -boolean_t -pmap_is_referenced(vm_page_t m) -{ - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("pmap_is_referenced: page %p is not managed", m)); - return ((m->md.pv_flags & PV_TABLE_REF) != 0); -} - -/* - * Miscellaneous support routines follow - */ - -/* - * Map a set of physical memory pages into the kernel virtual - * address space. Return a pointer to where it is mapped. This - * routine is intended to be used for mapping device memory, - * NOT real memory. - * - * Use XKPHYS uncached for 64 bit, and KSEG1 where possible for 32 bit. - */ -void * -pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, vm_memattr_t ma) -{ - vm_offset_t va, tmpva, offset; - - /* - * KSEG1 maps only first 512M of phys address space. For - * pa > 0x20000000 we should make proper mapping * using pmap_kenter. - */ - if (MIPS_DIRECT_MAPPABLE(pa + size - 1) && ma == VM_MEMATTR_UNCACHEABLE) - return ((void *)MIPS_PHYS_TO_DIRECT_UNCACHED(pa)); - else { - offset = pa & PAGE_MASK; - size = roundup(size + offset, PAGE_SIZE); - - va = kva_alloc(size); - if (!va) - panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); - pa = trunc_page(pa); - for (tmpva = va; size > 0;) { - pmap_kenter_attr(tmpva, pa, ma); - size -= PAGE_SIZE; - tmpva += PAGE_SIZE; - pa += PAGE_SIZE; - } - } - - return ((void *)(va + offset)); -} - -void * -pmap_mapdev(vm_paddr_t pa, vm_size_t size) -{ - return pmap_mapdev_attr(pa, size, VM_MEMATTR_UNCACHEABLE); -} - -void -pmap_unmapdev(vm_offset_t va, vm_size_t size) -{ -#ifndef __mips_n64 - vm_offset_t base, offset; - - /* If the address is within KSEG1 then there is nothing to do */ - if (va >= MIPS_KSEG1_START && va <= MIPS_KSEG1_END) - return; - - base = trunc_page(va); - offset = va & PAGE_MASK; - size = roundup(size + offset, PAGE_SIZE); - pmap_qremove(base, atop(size)); - kva_free(base, size); -#endif -} - -/* - * Perform the pmap work for mincore(2). If the page is not both referenced and - * modified by this pmap, returns its physical address so that the caller can - * find other mappings. - */ -int -pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *pap) -{ - pt_entry_t *ptep, pte; - vm_paddr_t pa; - vm_page_t m; - int val; - - PMAP_LOCK(pmap); - ptep = pmap_pte(pmap, addr); - pte = (ptep != NULL) ? *ptep : 0; - if (!pte_test(&pte, PTE_V)) { - PMAP_UNLOCK(pmap); - return (0); - } - val = MINCORE_INCORE; - if (pte_test(&pte, PTE_D)) - val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER; - pa = TLBLO_PTE_TO_PA(pte); - if (pte_test(&pte, PTE_MANAGED)) { - /* - * This may falsely report the given address as - * MINCORE_REFERENCED. Unfortunately, due to the lack of - * per-PTE reference information, it is impossible to - * determine if the address is MINCORE_REFERENCED. - */ - m = PHYS_TO_VM_PAGE(pa); - if ((m->a.flags & PGA_REFERENCED) != 0) - val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER; - } - if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) != - (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && - pte_test(&pte, PTE_MANAGED)) { - *pap = pa; - } - PMAP_UNLOCK(pmap); - return (val); -} - -void -pmap_activate(struct thread *td) -{ - pmap_t pmap, oldpmap; - struct proc *p = td->td_proc; - u_int cpuid; - - critical_enter(); - - pmap = vmspace_pmap(p->p_vmspace); - oldpmap = PCPU_GET(curpmap); - cpuid = PCPU_GET(cpuid); - - if (oldpmap) - CPU_CLR_ATOMIC(cpuid, &oldpmap->pm_active); - CPU_SET_ATOMIC(cpuid, &pmap->pm_active); - pmap_asid_alloc(pmap); - if (td == curthread) { - PCPU_SET(segbase, pmap->pm_segtab); - mips_wr_entryhi(pmap->pm_asid[cpuid].asid); - } - - PCPU_SET(curpmap, pmap); - critical_exit(); -} - -static void -pmap_sync_icache_one(void *arg __unused) -{ - - mips_icache_sync_all(); - mips_dcache_wbinv_all(); -} - -void -pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz) -{ - - smp_rendezvous(NULL, pmap_sync_icache_one, NULL, NULL); -} - -/* - * Increase the starting virtual address of the given mapping if a - * different alignment might result in more superpage mappings. - */ -void -pmap_align_superpage(vm_object_t object, vm_ooffset_t offset, - vm_offset_t *addr, vm_size_t size) -{ - vm_offset_t superpage_offset; - - if (size < PDRSIZE) - return; - if (object != NULL && (object->flags & OBJ_COLORED) != 0) - offset += ptoa(object->pg_color); - superpage_offset = offset & PDRMASK; - if (size - ((PDRSIZE - superpage_offset) & PDRMASK) < PDRSIZE || - (*addr & PDRMASK) == superpage_offset) - return; - if ((*addr & PDRMASK) < superpage_offset) - *addr = (*addr & ~PDRMASK) + superpage_offset; - else - *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset; -} - -#ifdef DDB -DB_SHOW_COMMAND(ptable, ddb_pid_dump) -{ - pmap_t pmap; - struct thread *td = NULL; - struct proc *p; - int i, j, k; - vm_paddr_t pa; - vm_offset_t va; - - if (have_addr) { - td = db_lookup_thread(addr, true); - if (td == NULL) { - db_printf("Invalid pid or tid"); - return; - } - p = td->td_proc; - if (p->p_vmspace == NULL) { - db_printf("No vmspace for process"); - return; - } - pmap = vmspace_pmap(p->p_vmspace); - } else - pmap = kernel_pmap; - - db_printf("pmap:%p segtab:%p asid:%x generation:%x\n", - pmap, pmap->pm_segtab, pmap->pm_asid[0].asid, - pmap->pm_asid[0].gen); - for (i = 0; i < NPDEPG; i++) { - pd_entry_t *pdpe; - pt_entry_t *pde; - pt_entry_t pte; - - pdpe = (pd_entry_t *)pmap->pm_segtab[i]; - if (pdpe == NULL) - continue; - db_printf("[%4d] %p\n", i, pdpe); -#ifdef __mips_n64 - for (j = 0; j < NPDEPG; j++) { - pde = (pt_entry_t *)pdpe[j]; - if (pde == NULL) - continue; - db_printf("\t[%4d] %p\n", j, pde); -#else - { - j = 0; - pde = (pt_entry_t *)pdpe; -#endif - for (k = 0; k < NPTEPG; k++) { - pte = pde[k]; - if (pte == 0 || !pte_test(&pte, PTE_V)) - continue; - pa = TLBLO_PTE_TO_PA(pte); - va = ((u_long)i << SEGSHIFT) | (j << PDRSHIFT) | (k << PAGE_SHIFT); - db_printf("\t\t[%04d] va: %p pte: %8jx pa:%jx\n", - k, (void *)va, (uintmax_t)pte, (uintmax_t)pa); - } - } - } -} -#endif - -/* - * Allocate TLB address space tag (called ASID or TLBPID) and return it. - * It takes almost as much or more time to search the TLB for a - * specific ASID and flush those entries as it does to flush the entire TLB. - * Therefore, when we allocate a new ASID, we just take the next number. When - * we run out of numbers, we flush the TLB, increment the generation count - * and start over. ASID zero is reserved for kernel use. - */ -static void -pmap_asid_alloc(pmap) - pmap_t pmap; -{ - if (pmap->pm_asid[PCPU_GET(cpuid)].asid != PMAP_ASID_RESERVED && - pmap->pm_asid[PCPU_GET(cpuid)].gen == PCPU_GET(asid_generation)); - else { - if (PCPU_GET(next_asid) == pmap_max_asid) { - tlb_invalidate_all_user(NULL); - PCPU_SET(asid_generation, - (PCPU_GET(asid_generation) + 1) & ASIDGEN_MASK); - if (PCPU_GET(asid_generation) == 0) { - PCPU_SET(asid_generation, 1); - } - PCPU_SET(next_asid, 1); /* 0 means invalid */ - } - pmap->pm_asid[PCPU_GET(cpuid)].asid = PCPU_GET(next_asid); - pmap->pm_asid[PCPU_GET(cpuid)].gen = PCPU_GET(asid_generation); - PCPU_SET(next_asid, PCPU_GET(next_asid) + 1); - } -} - -static pt_entry_t -init_pte_prot(vm_page_t m, vm_prot_t access, vm_prot_t prot) -{ - pt_entry_t rw; - - if (!(prot & VM_PROT_WRITE)) - rw = PTE_V | PTE_RO; - else if ((m->oflags & VPO_UNMANAGED) == 0) { - if ((access & VM_PROT_WRITE) != 0) - rw = PTE_V | PTE_D; - else - rw = PTE_V; - } else - /* Needn't emulate a modified bit for unmanaged pages. */ - rw = PTE_V | PTE_D; - return (rw); -} - -/* - * pmap_emulate_modified : do dirty bit emulation - * - * On SMP, update just the local TLB, other CPUs will update their - * TLBs from PTE lazily, if they get the exception. - * Returns 0 in case of sucess, 1 if the page is read only and we - * need to fault. - */ -int -pmap_emulate_modified(pmap_t pmap, vm_offset_t va) -{ - pt_entry_t *pte; - - PMAP_LOCK(pmap); - pte = pmap_pte(pmap, va); - - /* - * It is possible that some other CPU or thread changed the pmap while - * we weren't looking; in the SMP case, this is readily apparent, but - * it can even happen in the UP case, because we may have been blocked - * on PMAP_LOCK(pmap) above while someone changed this out from - * underneath us. - */ - - if (pte == NULL) { - /* - * This PTE's PTP (or one of its ancestors) has been reclaimed; - * trigger a full fault to reconstruct it via pmap_enter. - */ - PMAP_UNLOCK(pmap); - return (1); - } - - if (!pte_test(pte, PTE_V)) { - /* - * This PTE is no longer valid; the other thread or other - * processor must have arranged for our TLB to no longer - * have this entry, possibly by IPI, so no tlb_update is - * required. Fall out of the fast path and go take a - * general fault before retrying the instruction (or taking - * a signal). - */ - PMAP_UNLOCK(pmap); - return (1); - } - - if (pte_test(pte, PTE_D)) { - /* - * This PTE is valid and has the PTE_D bit asserted; since - * this is an increase in permission, we may have been expected - * to update the TLB lazily. Do so here and return, on the - * fast path, to retry the instruction. - */ - tlb_update(pmap, va, *pte); - PMAP_UNLOCK(pmap); - return (0); - } - - if (pte_test(pte, PTE_RO)) { - /* - * This PTE is valid, not dirty, and read-only. Go take a - * full fault (most likely to upgrade this part of the address - * space to writeable). - */ - PMAP_UNLOCK(pmap); - return (1); - } - - if (!pte_test(pte, PTE_MANAGED)) - panic("pmap_emulate_modified: unmanaged page"); - - /* - * PTE is valid, managed, not dirty, and not read-only. Set PTE_D - * and eagerly update the local TLB, returning on the fast path. - */ - - pte_set(pte, PTE_D); - tlb_update(pmap, va, *pte); - PMAP_UNLOCK(pmap); - - return (0); -} - -/* - * Routine: pmap_kextract - * Function: - * Extract the physical page address associated - * virtual address. - */ -vm_paddr_t -pmap_kextract(vm_offset_t va) -{ - int mapped; - - /* - * First, the direct-mapped regions. - */ -#if defined(__mips_n64) - if (va >= MIPS_XKPHYS_START && va < MIPS_XKPHYS_END) - return (MIPS_XKPHYS_TO_PHYS(va)); -#endif - if (va >= MIPS_KSEG0_START && va < MIPS_KSEG0_END) - return (MIPS_KSEG0_TO_PHYS(va)); - - if (va >= MIPS_KSEG1_START && va < MIPS_KSEG1_END) - return (MIPS_KSEG1_TO_PHYS(va)); - - /* - * User virtual addresses. - */ - if (va < VM_MAXUSER_ADDRESS) { - pt_entry_t *ptep; - - if (curproc && curproc->p_vmspace) { - ptep = pmap_pte(&curproc->p_vmspace->vm_pmap, va); - if (ptep) { - return (TLBLO_PTE_TO_PA(*ptep) | - (va & PAGE_MASK)); - } - return (0); - } - } - - /* - * Should be kernel virtual here, otherwise fail - */ - mapped = (va >= MIPS_KSEG2_START || va < MIPS_KSEG2_END); -#if defined(__mips_n64) - mapped = mapped || (va >= MIPS_XKSEG_START || va < MIPS_XKSEG_END); -#endif - /* - * Kernel virtual. - */ - - if (mapped) { - pt_entry_t *ptep; - - /* Is the kernel pmap initialized? */ - if (!CPU_EMPTY(&kernel_pmap->pm_active)) { - /* It's inside the virtual address range */ - ptep = pmap_pte(kernel_pmap, va); - if (ptep) { - return (TLBLO_PTE_TO_PA(*ptep) | - (va & PAGE_MASK)); - } - } - return (0); - } - - panic("%s for unknown address space %p.", __func__, (void *)va); -} - -void -pmap_flush_pvcache(vm_page_t m) -{ - pv_entry_t pv; - - if (m != NULL) { - for (pv = TAILQ_FIRST(&m->md.pv_list); pv; - pv = TAILQ_NEXT(pv, pv_list)) { - mips_dcache_wbinv_range_index(pv->pv_va, PAGE_SIZE); - } - } -} - -void -pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma) -{ - - /* - * It appears that this function can only be called before any mappings - * for the page are established. If this ever changes, this code will - * need to walk the pv_list and make each of the existing mappings - * uncacheable, being careful to sync caches and PTEs (and maybe - * invalidate TLB?) for any current mapping it modifies. - */ - if (TAILQ_FIRST(&m->md.pv_list) != NULL) - panic("Can't change memattr on page with existing mappings"); - - /* Clean memattr portion of pv_flags */ - m->md.pv_flags &= ~PV_MEMATTR_MASK; - m->md.pv_flags |= (ma << PV_MEMATTR_SHIFT) & PV_MEMATTR_MASK; -} - -static __inline void -pmap_pte_attr(pt_entry_t *pte, vm_memattr_t ma) -{ - u_int npte; - - npte = *(u_int *)pte; - npte &= ~PTE_C_MASK; - npte |= PTE_C(ma); - *pte = npte; -} - -int -pmap_change_attr(vm_offset_t sva, vm_size_t size, vm_memattr_t ma) -{ - pd_entry_t *pde, *pdpe; - pt_entry_t *pte; - vm_offset_t ova, eva, va, va_next; - pmap_t pmap; - - ova = sva; - eva = sva + size; - if (eva < sva) - return (EINVAL); - - pmap = kernel_pmap; - PMAP_LOCK(pmap); - - for (; sva < eva; sva = va_next) { - pdpe = pmap_segmap(pmap, sva); -#ifdef __mips_n64 - if (*pdpe == 0) { - va_next = (sva + NBSEG) & ~SEGMASK; - if (va_next < sva) - va_next = eva; - continue; - } -#endif - va_next = (sva + NBPDR) & ~PDRMASK; - if (va_next < sva) - va_next = eva; - - pde = pmap_pdpe_to_pde(pdpe, sva); - if (*pde == NULL) - continue; - - /* - * Limit our scan to either the end of the va represented - * by the current page table page, or to the end of the - * range being removed. - */ - if (va_next > eva) - va_next = eva; - - va = va_next; - for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++, - sva += PAGE_SIZE) { - if (!pte_test(pte, PTE_V) || pte_cache_bits(pte) == ma) { - if (va != va_next) { - pmap_invalidate_range(pmap, va, sva); - va = va_next; - } - continue; - } - if (va == va_next) - va = sva; - - pmap_pte_attr(pte, ma); - } - if (va != va_next) - pmap_invalidate_range(pmap, va, sva); - } - PMAP_UNLOCK(pmap); - - /* Flush caches to be in the safe side */ - mips_dcache_wbinv_range(ova, size); - return 0; -} - -boolean_t -pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode) -{ - - switch (mode) { - case VM_MEMATTR_UNCACHEABLE: - case VM_MEMATTR_WRITE_BACK: -#ifdef MIPS_CCA_WC - case VM_MEMATTR_WRITE_COMBINING: -#endif - return (TRUE); - default: - return (FALSE); - } -} diff --git a/sys/mips/mips/ptrace_machdep.c b/sys/mips/mips/ptrace_machdep.c deleted file mode 100644 index dd8e9c8fdd6..00000000000 --- a/sys/mips/mips/ptrace_machdep.c +++ /dev/null @@ -1,36 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009 M. Warner Losh - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#if 0 -#include -/* - * This file is a place holder for MIPS. Some models of MIPS may need special - * functions here, but for now nothing is needed. The MI parts of ptrace - * suffice. - */ -#endif diff --git a/sys/mips/mips/sc_machdep.c b/sys/mips/mips/sc_machdep.c deleted file mode 100644 index 5640923c634..00000000000 --- a/sys/mips/mips/sc_machdep.c +++ /dev/null @@ -1,86 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003 Jake Burkholder. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -static sc_softc_t sc_softcs[8]; - -int -sc_get_cons_priority(int *unit, int *flags) -{ - - *unit = 0; - *flags = 0; - return (CN_INTERNAL); -} - -int -sc_max_unit(void) -{ - return (1); -} - -sc_softc_t * -sc_get_softc(int unit, int flags) -{ - sc_softc_t *sc; - - if (unit < 0) - return (NULL); - sc = &sc_softcs[unit]; - sc->unit = unit; - if ((sc->flags & SC_INIT_DONE) == 0) { - sc->adapter = -1; - sc->cursor_char = SC_CURSOR_CHAR; - sc->mouse_char = SC_MOUSE_CHAR; - } - return (sc); -} - -void -sc_get_bios_values(bios_values_t *values) -{ -} - -int -sc_tone(int hz) -{ - return (0); -} diff --git a/sys/mips/mips/stack_machdep.c b/sys/mips/mips/stack_machdep.c deleted file mode 100644 index 3e2da389fa3..00000000000 --- a/sys/mips/mips/stack_machdep.c +++ /dev/null @@ -1,182 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2005 Antoine Brodin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#define VALID_PC(addr) ((addr) >= (uintptr_t)btext && (addr) % 4 == 0) - -static void -stack_capture(struct stack *st, struct thread *td, uintptr_t pc, uintptr_t sp) -{ - u_register_t ra; - uintptr_t i, ra_addr; - int ra_stack_pos, stacksize; - InstFmt insn; - - stack_zero(st); - - for (;;) { - if (!VALID_PC(pc)) - break; - - /* - * Walk backward from the PC looking for the function - * start. Assume a subtraction from SP is the start - * of a function. Hope that we find the store of RA - * into the stack frame along the way and save the - * offset of the saved RA relative to SP. - */ - ra_stack_pos = -1; - stacksize = 0; - for (i = pc; VALID_PC(i); i -= sizeof(insn)) { - bcopy((void *)i, &insn, sizeof(insn)); - switch (insn.IType.op) { - case OP_ADDI: - case OP_ADDIU: - case OP_DADDI: - case OP_DADDIU: - if (insn.IType.rs != SP || insn.IType.rt != SP) - break; - - /* - * Ignore stack fixups in "early" - * returns in a function, or if the - * call was from an unlikely branch - * moved after the end of the normal - * return. - */ - if ((short)insn.IType.imm > 0) - break; - - stacksize = -(short)insn.IType.imm; - break; - - case OP_SW: - case OP_SD: - if (insn.IType.rs != SP || insn.IType.rt != RA) - break; - ra_stack_pos = (short)insn.IType.imm; - break; - default: - break; - } - - if (stacksize != 0) - break; - } - - if (stack_put(st, pc) == -1) - break; - - if (ra_stack_pos == -1) - break; - - /* - * Walk forward from the PC to find the function end - * (jr RA). If eret is hit instead, stop unwinding. - */ - ra_addr = sp + ra_stack_pos; - ra = 0; - for (i = pc; VALID_PC(i); i += sizeof(insn)) { - bcopy((void *)i, &insn, sizeof(insn)); - - switch (insn.IType.op) { - case OP_SPECIAL: - if (insn.RType.func == OP_JR) { - if (insn.RType.rs != RA) - break; - if (!kstack_contains(td, ra_addr, - sizeof(ra))) - goto done; - ra = *(u_register_t *)ra_addr; - if (ra == 0) - goto done; - ra -= 8; - } - break; - default: - break; - } - - /* eret */ - if (insn.word == 0x42000018) - goto done; - - if (ra != 0) - break; - } - - if (pc == ra && stacksize == 0) - break; - - sp += stacksize; - pc = ra; - } -done: - return; -} - -int -stack_save_td(struct stack *st, struct thread *td) -{ - uintptr_t pc, sp; - - THREAD_LOCK_ASSERT(td, MA_OWNED); - KASSERT(!TD_IS_SWAPPED(td), - ("stack_save_td: thread %p is swapped", td)); - - if (TD_IS_RUNNING(td)) - return (EOPNOTSUPP); - - pc = td->td_pcb->pcb_context[PCB_REG_RA]; - sp = td->td_pcb->pcb_context[PCB_REG_SP]; - stack_capture(st, td, pc, sp); - return (0); -} - -void -stack_save(struct stack *st) -{ - uintptr_t pc, sp; - - pc = (uintptr_t)&&here; - sp = (uintptr_t)__builtin_frame_address(0); -here: - stack_capture(st, curthread, pc, sp); -} diff --git a/sys/mips/mips/stdatomic.c b/sys/mips/mips/stdatomic.c deleted file mode 100644 index 81a826053ee..00000000000 --- a/sys/mips/mips/stdatomic.c +++ /dev/null @@ -1,413 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2013 Ed Schouten - * All rights reserved. - * - * Copyright (c) 1998 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include - -#ifndef _KERNEL -#include -#endif /* _KERNEL */ - -#if defined(__SYNC_ATOMICS) - -/* - * Memory barriers. - * - * It turns out __sync_synchronize() does not emit any code when used - * with GCC 4.2. Implement our own version that does work reliably. - * - * Although __sync_lock_test_and_set() should only perform an acquire - * barrier, make it do a full barrier like the other functions. This - * should make 's atomic_exchange_explicit() work reliably. - */ - -static inline void -do_sync(void) -{ - - __asm volatile ( -#if !defined(_KERNEL) || defined(SMP) - ".set noreorder\n" - "\tsync\n" - "\tnop\n" - "\tnop\n" - "\tnop\n" - "\tnop\n" - "\tnop\n" - "\tnop\n" - "\tnop\n" - "\tnop\n" - ".set reorder\n" -#else /* _KERNEL && !SMP */ - "" -#endif /* !KERNEL || SMP */ - : : : "memory"); -} - -typedef union { - uint8_t v8[4]; - uint32_t v32; -} reg_t; - -/* - * Given a memory address pointing to an 8-bit or 16-bit integer, return - * the address of the 32-bit word containing it. - */ - -static inline uint32_t * -round_to_word(void *ptr) -{ - - return ((uint32_t *)((intptr_t)ptr & ~3)); -} - -/* - * Utility functions for loading and storing 8-bit and 16-bit integers - * in 32-bit words at an offset corresponding with the location of the - * atomic variable. - */ - -static inline void -put_1(reg_t *r, const uint8_t *offset_ptr, uint8_t val) -{ - size_t offset; - - offset = (intptr_t)offset_ptr & 3; - r->v8[offset] = val; -} - -static inline uint8_t -get_1(const reg_t *r, const uint8_t *offset_ptr) -{ - size_t offset; - - offset = (intptr_t)offset_ptr & 3; - return (r->v8[offset]); -} - -static inline void -put_2(reg_t *r, const uint16_t *offset_ptr, uint16_t val) -{ - size_t offset; - union { - uint16_t in; - uint8_t out[2]; - } bytes; - - offset = (intptr_t)offset_ptr & 3; - bytes.in = val; - r->v8[offset] = bytes.out[0]; - r->v8[offset + 1] = bytes.out[1]; -} - -static inline uint16_t -get_2(const reg_t *r, const uint16_t *offset_ptr) -{ - size_t offset; - union { - uint8_t in[2]; - uint16_t out; - } bytes; - - offset = (intptr_t)offset_ptr & 3; - bytes.in[0] = r->v8[offset]; - bytes.in[1] = r->v8[offset + 1]; - return (bytes.out); -} - -/* - * 8-bit and 16-bit routines. - * - * These operations are not natively supported by the CPU, so we use - * some shifting and bitmasking on top of the 32-bit instructions. - */ - -#define EMIT_LOCK_TEST_AND_SET_N(N, uintN_t) \ -uintN_t \ -__sync_lock_test_and_set_##N(uintN_t *mem, uintN_t val) \ -{ \ - uint32_t *mem32; \ - reg_t val32, negmask, old; \ - uint32_t temp; \ - \ - mem32 = round_to_word(mem); \ - val32.v32 = 0x00000000; \ - put_##N(&val32, mem, val); \ - negmask.v32 = 0xffffffff; \ - put_##N(&negmask, mem, 0); \ - \ - do_sync(); \ - __asm volatile ( \ - "1:" \ - "\tll %0, %5\n" /* Load old value. */ \ - "\tand %2, %4, %0\n" /* Remove the old value. */ \ - "\tor %2, %3\n" /* Put in the new value. */ \ - "\tsc %2, %1\n" /* Attempt to store. */ \ - "\tbeqz %2, 1b\n" /* Spin if failed. */ \ - : "=&r" (old.v32), "=m" (*mem32), "=&r" (temp) \ - : "r" (val32.v32), "r" (negmask.v32), "m" (*mem32)); \ - return (get_##N(&old, mem)); \ -} - -EMIT_LOCK_TEST_AND_SET_N(1, uint8_t) -EMIT_LOCK_TEST_AND_SET_N(2, uint16_t) - -#define EMIT_VAL_COMPARE_AND_SWAP_N(N, uintN_t) \ -uintN_t \ -__sync_val_compare_and_swap_##N(uintN_t *mem, uintN_t expected, \ - uintN_t desired) \ -{ \ - uint32_t *mem32; \ - reg_t expected32, desired32, posmask, old; \ - uint32_t negmask, temp; \ - \ - mem32 = round_to_word(mem); \ - expected32.v32 = 0x00000000; \ - put_##N(&expected32, mem, expected); \ - desired32.v32 = 0x00000000; \ - put_##N(&desired32, mem, desired); \ - posmask.v32 = 0x00000000; \ - put_##N(&posmask, mem, ~0); \ - negmask = ~posmask.v32; \ - \ - do_sync(); \ - __asm volatile ( \ - "1:" \ - "\tll %0, %7\n" /* Load old value. */ \ - "\tand %2, %5, %0\n" /* Isolate the old value. */ \ - "\tbne %2, %3, 2f\n" /* Compare to expected value. */\ - "\tand %2, %6, %0\n" /* Remove the old value. */ \ - "\tor %2, %4\n" /* Put in the new value. */ \ - "\tsc %2, %1\n" /* Attempt to store. */ \ - "\tbeqz %2, 1b\n" /* Spin if failed. */ \ - "2:" \ - : "=&r" (old), "=m" (*mem32), "=&r" (temp) \ - : "r" (expected32.v32), "r" (desired32.v32), \ - "r" (posmask.v32), "r" (negmask), "m" (*mem32)); \ - return (get_##N(&old, mem)); \ -} - -EMIT_VAL_COMPARE_AND_SWAP_N(1, uint8_t) -EMIT_VAL_COMPARE_AND_SWAP_N(2, uint16_t) - -#define EMIT_ARITHMETIC_FETCH_AND_OP_N(N, uintN_t, name, op) \ -uintN_t \ -__sync_##name##_##N(uintN_t *mem, uintN_t val) \ -{ \ - uint32_t *mem32; \ - reg_t val32, posmask, old; \ - uint32_t negmask, temp1, temp2; \ - \ - mem32 = round_to_word(mem); \ - val32.v32 = 0x00000000; \ - put_##N(&val32, mem, val); \ - posmask.v32 = 0x00000000; \ - put_##N(&posmask, mem, ~0); \ - negmask = ~posmask.v32; \ - \ - do_sync(); \ - __asm volatile ( \ - "1:" \ - "\tll %0, %7\n" /* Load old value. */ \ - "\t"op" %2, %0, %4\n" /* Calculate new value. */ \ - "\tand %2, %5\n" /* Isolate the new value. */ \ - "\tand %3, %6, %0\n" /* Remove the old value. */ \ - "\tor %2, %3\n" /* Put in the new value. */ \ - "\tsc %2, %1\n" /* Attempt to store. */ \ - "\tbeqz %2, 1b\n" /* Spin if failed. */ \ - : "=&r" (old.v32), "=m" (*mem32), "=&r" (temp1), \ - "=&r" (temp2) \ - : "r" (val32.v32), "r" (posmask.v32), "r" (negmask), \ - "m" (*mem32)); \ - return (get_##N(&old, mem)); \ -} - -EMIT_ARITHMETIC_FETCH_AND_OP_N(1, uint8_t, fetch_and_add, "addu") -EMIT_ARITHMETIC_FETCH_AND_OP_N(1, uint8_t, fetch_and_sub, "subu") -EMIT_ARITHMETIC_FETCH_AND_OP_N(2, uint16_t, fetch_and_add, "addu") -EMIT_ARITHMETIC_FETCH_AND_OP_N(2, uint16_t, fetch_and_sub, "subu") - -#define EMIT_BITWISE_FETCH_AND_OP_N(N, uintN_t, name, op, idempotence) \ -uintN_t \ -__sync_##name##_##N(uintN_t *mem, uintN_t val) \ -{ \ - uint32_t *mem32; \ - reg_t val32, old; \ - uint32_t temp; \ - \ - mem32 = round_to_word(mem); \ - val32.v32 = idempotence ? 0xffffffff : 0x00000000; \ - put_##N(&val32, mem, val); \ - \ - do_sync(); \ - __asm volatile ( \ - "1:" \ - "\tll %0, %4\n" /* Load old value. */ \ - "\t"op" %2, %3, %0\n" /* Calculate new value. */ \ - "\tsc %2, %1\n" /* Attempt to store. */ \ - "\tbeqz %2, 1b\n" /* Spin if failed. */ \ - : "=&r" (old.v32), "=m" (*mem32), "=&r" (temp) \ - : "r" (val32.v32), "m" (*mem32)); \ - return (get_##N(&old, mem)); \ -} - -EMIT_BITWISE_FETCH_AND_OP_N(1, uint8_t, fetch_and_and, "and", 1) -EMIT_BITWISE_FETCH_AND_OP_N(1, uint8_t, fetch_and_or, "or", 0) -EMIT_BITWISE_FETCH_AND_OP_N(1, uint8_t, fetch_and_xor, "xor", 0) -EMIT_BITWISE_FETCH_AND_OP_N(2, uint16_t, fetch_and_and, "and", 1) -EMIT_BITWISE_FETCH_AND_OP_N(2, uint16_t, fetch_and_or, "or", 0) -EMIT_BITWISE_FETCH_AND_OP_N(2, uint16_t, fetch_and_xor, "xor", 0) - -/* - * 32-bit routines. - */ - -static __inline uint32_t -do_compare_and_swap_4(uint32_t *mem, uint32_t expected, - uint32_t desired) -{ - uint32_t old, temp; - - do_sync(); - __asm volatile ( - "1:" - "\tll %0, %5\n" /* Load old value. */ - "\tbne %0, %3, 2f\n" /* Compare to expected value. */ - "\tmove %2, %4\n" /* Value to store. */ - "\tsc %2, %1\n" /* Attempt to store. */ - "\tbeqz %2, 1b\n" /* Spin if failed. */ - "2:" - : "=&r" (old), "=m" (*mem), "=&r" (temp) - : "r" (expected), "r" (desired), "m" (*mem)); - return (old); -} - -uint32_t -__sync_val_compare_and_swap_4(uint32_t *mem, uint32_t expected, - uint32_t desired) -{ - - return (do_compare_and_swap_4(mem, expected, desired)); -} - -bool -__sync_bool_compare_and_swap_4(uint32_t *mem, uint32_t expected, - uint32_t desired) -{ - - return (do_compare_and_swap_4(mem, expected, desired) == - expected); -} - -#define EMIT_FETCH_AND_OP_4(name, op) \ -uint32_t \ -__sync_##name##_4(uint32_t *mem, uint32_t val) \ -{ \ - uint32_t old, temp; \ - \ - do_sync(); \ - __asm volatile ( \ - "1:" \ - "\tll %0, %4\n" /* Load old value. */ \ - "\t"op"\n" /* Calculate new value. */ \ - "\tsc %2, %1\n" /* Attempt to store. */ \ - "\tbeqz %2, 1b\n" /* Spin if failed. */ \ - : "=&r" (old), "=m" (*mem), "=&r" (temp) \ - : "r" (val), "m" (*mem)); \ - return (old); \ -} - -EMIT_FETCH_AND_OP_4(lock_test_and_set, "move %2, %3") -EMIT_FETCH_AND_OP_4(fetch_and_add, "addu %2, %0, %3") -EMIT_FETCH_AND_OP_4(fetch_and_and, "and %2, %0, %3") -EMIT_FETCH_AND_OP_4(fetch_and_or, "or %2, %0, %3") -EMIT_FETCH_AND_OP_4(fetch_and_sub, "subu %2, %0, %3") -EMIT_FETCH_AND_OP_4(fetch_and_xor, "xor %2, %0, %3") - -/* - * 64-bit routines. - * - * Note: All the 64-bit atomic operations are only atomic when running - * in 64-bit mode. It is assumed that code compiled for n32 and n64 fits - * into this definition and no further safeties are needed. - */ - -#if defined(__mips_n32) || defined(__mips_n64) - -uint64_t -__sync_val_compare_and_swap_8(uint64_t *mem, uint64_t expected, - uint64_t desired) -{ - uint64_t old, temp; - - do_sync(); - __asm volatile ( - "1:" - "\tlld %0, %5\n" /* Load old value. */ - "\tbne %0, %3, 2f\n" /* Compare to expected value. */ - "\tmove %2, %4\n" /* Value to store. */ - "\tscd %2, %1\n" /* Attempt to store. */ - "\tbeqz %2, 1b\n" /* Spin if failed. */ - "2:" - : "=&r" (old), "=m" (*mem), "=&r" (temp) - : "r" (expected), "r" (desired), "m" (*mem)); - return (old); -} - -#define EMIT_FETCH_AND_OP_8(name, op) \ -uint64_t \ -__sync_##name##_8(uint64_t *mem, uint64_t val) \ -{ \ - uint64_t old, temp; \ - \ - do_sync(); \ - __asm volatile ( \ - "1:" \ - "\tlld %0, %4\n" /* Load old value. */ \ - "\t"op"\n" /* Calculate new value. */ \ - "\tscd %2, %1\n" /* Attempt to store. */ \ - "\tbeqz %2, 1b\n" /* Spin if failed. */ \ - : "=&r" (old), "=m" (*mem), "=&r" (temp) \ - : "r" (val), "m" (*mem)); \ - return (old); \ -} - -EMIT_FETCH_AND_OP_8(lock_test_and_set, "move %2, %3") -EMIT_FETCH_AND_OP_8(fetch_and_add, "daddu %2, %0, %3") -EMIT_FETCH_AND_OP_8(fetch_and_and, "and %2, %0, %3") -EMIT_FETCH_AND_OP_8(fetch_and_or, "or %2, %0, %3") -EMIT_FETCH_AND_OP_8(fetch_and_sub, "dsubu %2, %0, %3") -EMIT_FETCH_AND_OP_8(fetch_and_xor, "xor %2, %0, %3") - -#endif /* __mips_n32 || __mips_n64 */ - -#endif /* __SYNC_ATOMICS */ diff --git a/sys/mips/mips/support.S b/sys/mips/mips/support.S deleted file mode 100644 index d86fa955b15..00000000000 --- a/sys/mips/mips/support.S +++ /dev/null @@ -1,887 +0,0 @@ -/* $OpenBSD: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $ */ -/*- - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Digital Equipment Corporation and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Copyright (C) 1989 Digital Equipment Corporation. - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose and without fee is hereby granted, - * provided that the above copyright notice appears in all copies. - * Digital Equipment Corporation makes no representations about the - * suitability of this software for any purpose. It is provided "as is" - * without express or implied warranty. - * - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s, - * v 1.1 89/07/11 17:55:04 nelson Exp SPRITE (DECWRL) - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s, - * v 9.2 90/01/29 18:00:39 shirriff Exp SPRITE (DECWRL) - * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s, - * v 1.1 89/07/10 14:27:41 nelson Exp SPRITE (DECWRL) - * - * from: @(#)locore.s 8.5 (Berkeley) 1/4/94 - * JNPR: support.S,v 1.5.2.2 2007/08/29 10:03:49 girish - */ - -/* - * Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author) - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Jonathan R. Stone for - * the NetBSD Project. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Contains assembly language support routines. - */ - -#include "opt_ddb.h" -#include -#include -#include -#include -#include -#include -#include - -#include "assym.inc" - - .set noreorder # Noreorder is default style! - -/* - * Primitives - */ - - .text - -/* - * Copy a null terminated string from the user address space into - * the kernel address space. - * - * copyinstr(fromaddr, toaddr, maxlength, &lencopied) - * caddr_t fromaddr; - * caddr_t toaddr; - * u_int maxlength; - * u_int *lencopied; - */ -LEAF(copyinstr) - PTR_LA v0, __copyinstr_err - blt a0, zero, __copyinstr_err # make sure address is in user space - GET_CPU_PCPU(v1) - PTR_L v1, PC_CURPCB(v1) - PTR_S v0, U_PCB_ONFAULT(v1) - - move t0, a2 - beq a2, zero, 4f -1: - lbu v0, 0(a0) - PTR_SUBU a2, a2, 1 - beq v0, zero, 2f - sb v0, 0(a1) # each byte until NIL - PTR_ADDU a0, a0, 1 - bne a2, zero, 1b # less than maxlen - PTR_ADDU a1, a1, 1 -4: - li v0, ENAMETOOLONG # run out of space -2: - beq a3, zero, 3f # return num. of copied bytes - PTR_SUBU a2, t0, a2 # if the 4th arg was non-NULL - PTR_S a2, 0(a3) -3: - - PTR_S zero, U_PCB_ONFAULT(v1) - j ra - nop - -__copyinstr_err: - j ra - li v0, EFAULT -END(copyinstr) - -/* - * Copy specified amount of data from user space into the kernel - * copyin(from, to, len) - * caddr_t *from; (user source address) - * caddr_t *to; (kernel destination address) - * unsigned len; - */ -NESTED(copyin, CALLFRAME_SIZ, ra) - PTR_SUBU sp, sp, CALLFRAME_SIZ - .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) - PTR_LA v0, copyerr - blt a0, zero, _C_LABEL(copyerr) # make sure address is in user space - REG_S ra, CALLFRAME_RA(sp) - GET_CPU_PCPU(v1) - PTR_L v1, PC_CURPCB(v1) - jal _C_LABEL(bcopy) - PTR_S v0, U_PCB_ONFAULT(v1) - REG_L ra, CALLFRAME_RA(sp) - GET_CPU_PCPU(v1) - PTR_L v1, PC_CURPCB(v1) # bcopy modified v1, so reload - PTR_S zero, U_PCB_ONFAULT(v1) - PTR_ADDU sp, sp, CALLFRAME_SIZ - j ra - move v0, zero -END(copyin) - -/* - * Copy specified amount of data from kernel to the user space - * copyout(from, to, len) - * caddr_t *from; (kernel source address) - * caddr_t *to; (user destination address) - * unsigned len; - */ -NESTED(copyout, CALLFRAME_SIZ, ra) - PTR_SUBU sp, sp, CALLFRAME_SIZ - .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) - PTR_LA v0, copyerr - blt a1, zero, _C_LABEL(copyerr) # make sure address is in user space - REG_S ra, CALLFRAME_RA(sp) - GET_CPU_PCPU(v1) - PTR_L v1, PC_CURPCB(v1) - jal _C_LABEL(bcopy) - PTR_S v0, U_PCB_ONFAULT(v1) - REG_L ra, CALLFRAME_RA(sp) - GET_CPU_PCPU(v1) - PTR_L v1, PC_CURPCB(v1) # bcopy modified v1, so reload - PTR_S zero, U_PCB_ONFAULT(v1) - PTR_ADDU sp, sp, CALLFRAME_SIZ - j ra - move v0, zero -END(copyout) - -LEAF(copyerr) - REG_L ra, CALLFRAME_RA(sp) - PTR_ADDU sp, sp, CALLFRAME_SIZ - j ra - li v0, EFAULT # return error -END(copyerr) - -/* - * {fu,su},{byte,sword,word}, fetch or store a byte, short or word to - * user-space. - */ -#ifdef __mips_n64 -LEAF(fueword64) -XLEAF(fueword) - PTR_LA v0, fswberr - blt a0, zero, fswberr # make sure address is in user space - nop - GET_CPU_PCPU(v1) - PTR_L v1, PC_CURPCB(v1) - PTR_S v0, U_PCB_ONFAULT(v1) - ld v0, 0(a0) # fetch word - PTR_S zero, U_PCB_ONFAULT(v1) - sd v0, 0(a1) # store word - j ra - li v0, 0 -END(fueword64) -#endif - -LEAF(fueword32) -#ifndef __mips_n64 -XLEAF(fueword) -#endif - PTR_LA v0, fswberr - blt a0, zero, fswberr # make sure address is in user space - nop - GET_CPU_PCPU(v1) - PTR_L v1, PC_CURPCB(v1) - PTR_S v0, U_PCB_ONFAULT(v1) - lw v0, 0(a0) # fetch word - PTR_S zero, U_PCB_ONFAULT(v1) - sw v0, 0(a1) # store word - j ra - li v0, 0 -END(fueword32) - -LEAF(fuesword) - PTR_LA v0, fswberr - blt a0, zero, fswberr # make sure address is in user space - nop - GET_CPU_PCPU(v1) - PTR_L v1, PC_CURPCB(v1) - PTR_S v0, U_PCB_ONFAULT(v1) - lhu v0, 0(a0) # fetch short - PTR_S zero, U_PCB_ONFAULT(v1) - sh v0, 0(a1) # store short - j ra - li v0, 0 -END(fuesword) - -LEAF(fubyte) - PTR_LA v0, fswberr - blt a0, zero, fswberr # make sure address is in user space - nop - GET_CPU_PCPU(v1) - PTR_L v1, PC_CURPCB(v1) - PTR_S v0, U_PCB_ONFAULT(v1) - lbu v0, 0(a0) # fetch byte - j ra - PTR_S zero, U_PCB_ONFAULT(v1) -END(fubyte) - -LEAF(suword16) - PTR_LA v0, fswberr - blt a0, zero, fswberr # make sure address is in user space - nop - GET_CPU_PCPU(v1) - PTR_L v1, PC_CURPCB(v1) - PTR_S v0, U_PCB_ONFAULT(v1) - sh a1, 0(a0) # store short - PTR_S zero, U_PCB_ONFAULT(v1) - j ra - move v0, zero -END(suword16) - -LEAF(suword32) -#ifndef __mips_n64 -XLEAF(suword) -#endif - PTR_LA v0, fswberr - blt a0, zero, fswberr # make sure address is in user space - nop - GET_CPU_PCPU(v1) - PTR_L v1, PC_CURPCB(v1) - PTR_S v0, U_PCB_ONFAULT(v1) - sw a1, 0(a0) # store word - PTR_S zero, U_PCB_ONFAULT(v1) - j ra - move v0, zero -END(suword32) - -#ifdef __mips_n64 -LEAF(suword64) -XLEAF(suword) - PTR_LA v0, fswberr - blt a0, zero, fswberr # make sure address is in user space - nop - GET_CPU_PCPU(v1) - PTR_L v1, PC_CURPCB(v1) - PTR_S v0, U_PCB_ONFAULT(v1) - sd a1, 0(a0) # store word - PTR_S zero, U_PCB_ONFAULT(v1) - j ra - move v0, zero -END(suword64) -#endif - -/* - * casueword(9) - * u_long casueword(u_long *p, u_long oldval, u_long *oldval_p, - * u_long newval) - */ -/* - * casueword32(9) - * uint32_t casueword(uint32_t *p, uint32_t oldval, - * uint32_t newval) - */ -LEAF(casueword32) -#ifndef __mips_n64 -XLEAF(casueword) -#endif - PTR_LA v0, fswberr - blt a0, zero, fswberr # make sure address is in user space - nop - GET_CPU_PCPU(v1) - PTR_L v1, PC_CURPCB(v1) - PTR_S v0, U_PCB_ONFAULT(v1) - - li v0, 1 - move t0, a3 - ll t1, 0(a0) - bne a1, t1, 1f - nop - sc t0, 0(a0) # store word - xori v0, t0, 1 -1: - PTR_S zero, U_PCB_ONFAULT(v1) - jr ra - sw t1, 0(a2) # unconditionally store old word -END(casueword32) - -#ifdef __mips_n64 -LEAF(casueword64) -XLEAF(casueword) - PTR_LA v0, fswberr - blt a0, zero, fswberr # make sure address is in user space - nop - GET_CPU_PCPU(v1) - PTR_L v1, PC_CURPCB(v1) - PTR_S v0, U_PCB_ONFAULT(v1) - - li v0, 1 - move t0, a3 - lld t1, 0(a0) - bne a1, t1, 1f - nop - scd t0, 0(a0) # store double word - xori v0, t0, 1 -1: - PTR_S zero, U_PCB_ONFAULT(v1) - jr ra - sd t1, 0(a2) # unconditionally store old word -END(casueword64) -#endif - -/* - * Will have to flush the instruction cache if byte merging is done in hardware. - */ -LEAF(susword) - PTR_LA v0, fswberr - blt a0, zero, fswberr # make sure address is in user space - nop - GET_CPU_PCPU(v1) - PTR_L v1, PC_CURPCB(v1) - PTR_S v0, U_PCB_ONFAULT(v1) - sh a1, 0(a0) # store short - PTR_S zero, U_PCB_ONFAULT(v1) - j ra - move v0, zero -END(susword) - -LEAF(subyte) - PTR_LA v0, fswberr - blt a0, zero, fswberr # make sure address is in user space - nop - GET_CPU_PCPU(v1) - PTR_L v1, PC_CURPCB(v1) - PTR_S v0, U_PCB_ONFAULT(v1) - sb a1, 0(a0) # store byte - PTR_S zero, U_PCB_ONFAULT(v1) - j ra - move v0, zero -END(subyte) - -LEAF(fswberr) - j ra - li v0, -1 -END(fswberr) - -/* - * memset(void *s1, int c, int len) - * NetBSD: memset.S,v 1.3 2001/10/16 15:40:53 uch Exp - */ -LEAF(memset) - .set noreorder - blt a2, 12, memsetsmallclr # small amount to clear? - move v0, a0 # save s1 for result - - sll t1, a1, 8 # compute c << 8 in t1 - or t1, t1, a1 # compute c << 8 | c in 11 - sll t2, t1, 16 # shift that left 16 - or t1, t2, t1 # or together - - PTR_SUBU t0, zero, a0 # compute # bytes to word align address - and t0, t0, 3 - beq t0, zero, 1f # skip if word aligned - PTR_SUBU a2, a2, t0 # subtract from remaining count - SWHI t1, 0(a0) # store 1, 2, or 3 bytes to align - PTR_ADDU a0, a0, t0 -1: - and v1, a2, 3 # compute number of whole words left - PTR_SUBU t0, a2, v1 - PTR_SUBU a2, a2, t0 - PTR_ADDU t0, t0, a0 # compute ending address -2: - PTR_ADDU a0, a0, 4 # clear words - bne a0, t0, 2b # unrolling loop does not help - sw t1, -4(a0) # since we are limited by memory speed - -memsetsmallclr: - ble a2, zero, 2f - PTR_ADDU t0, a2, a0 # compute ending address -1: - PTR_ADDU a0, a0, 1 # clear bytes - bne a0, t0, 1b - sb a1, -1(a0) -2: - j ra - nop - .set reorder -END(memset) - -/* - * bzero(s1, n) - */ -LEAF(bzero) -XLEAF(blkclr) - .set noreorder - blt a1, 12, smallclr # small amount to clear? - PTR_SUBU a3, zero, a0 # compute # bytes to word align address - and a3, a3, 3 - beq a3, zero, 1f # skip if word aligned - PTR_SUBU a1, a1, a3 # subtract from remaining count - SWHI zero, 0(a0) # clear 1, 2, or 3 bytes to align - PTR_ADDU a0, a0, a3 -1: - and v0, a1, 3 # compute number of words left - PTR_SUBU a3, a1, v0 - move a1, v0 - PTR_ADDU a3, a3, a0 # compute ending address -2: - PTR_ADDU a0, a0, 4 # clear words - bne a0, a3, 2b # unrolling loop does not help - sw zero, -4(a0) # since we are limited by memory speed -smallclr: - ble a1, zero, 2f - PTR_ADDU a3, a1, a0 # compute ending address -1: - PTR_ADDU a0, a0, 1 # clear bytes - bne a0, a3, 1b - sb zero, -1(a0) -2: - j ra - nop -END(bzero) - - -/* - * bcmp(s1, s2, n) - */ -LEAF(bcmp) - .set noreorder - blt a2, 16, smallcmp # is it worth any trouble? - xor v0, a0, a1 # compare low two bits of addresses - and v0, v0, 3 - PTR_SUBU a3, zero, a1 # compute # bytes to word align address - bne v0, zero, unalignedcmp # not possible to align addresses - and a3, a3, 3 - - beq a3, zero, 1f - PTR_SUBU a2, a2, a3 # subtract from remaining count - move v0, v1 # init v0,v1 so unmodified bytes match - LWHI v0, 0(a0) # read 1, 2, or 3 bytes - LWHI v1, 0(a1) - PTR_ADDU a1, a1, a3 - bne v0, v1, nomatch - PTR_ADDU a0, a0, a3 -1: - and a3, a2, ~3 # compute number of whole words left - PTR_SUBU a2, a2, a3 # which has to be >= (16-3) & ~3 - PTR_ADDU a3, a3, a0 # compute ending address -2: - lw v0, 0(a0) # compare words - lw v1, 0(a1) - PTR_ADDU a0, a0, 4 - bne v0, v1, nomatch - PTR_ADDU a1, a1, 4 - bne a0, a3, 2b - nop - b smallcmp # finish remainder - nop -unalignedcmp: - beq a3, zero, 2f - PTR_SUBU a2, a2, a3 # subtract from remaining count - PTR_ADDU a3, a3, a0 # compute ending address -1: - lbu v0, 0(a0) # compare bytes until a1 word aligned - lbu v1, 0(a1) - PTR_ADDU a0, a0, 1 - bne v0, v1, nomatch - PTR_ADDU a1, a1, 1 - bne a0, a3, 1b - nop -2: - and a3, a2, ~3 # compute number of whole words left - PTR_SUBU a2, a2, a3 # which has to be >= (16-3) & ~3 - PTR_ADDU a3, a3, a0 # compute ending address -3: - LWHI v0, 0(a0) # compare words a0 unaligned, a1 aligned - LWLO v0, 3(a0) - lw v1, 0(a1) - PTR_ADDU a0, a0, 4 - bne v0, v1, nomatch - PTR_ADDU a1, a1, 4 - bne a0, a3, 3b - nop -smallcmp: - ble a2, zero, match - PTR_ADDU a3, a2, a0 # compute ending address -1: - lbu v0, 0(a0) - lbu v1, 0(a1) - PTR_ADDU a0, a0, 1 - bne v0, v1, nomatch - PTR_ADDU a1, a1, 1 - bne a0, a3, 1b - nop -match: - j ra - move v0, zero -nomatch: - j ra - li v0, 1 -END(bcmp) - - -/* - * bit = ffs(value) - */ -LEAF(ffs) - .set noreorder - beq a0, zero, 2f - move v0, zero -1: - and v1, a0, 1 # bit set? - addu v0, v0, 1 - beq v1, zero, 1b # no, continue - srl a0, a0, 1 -2: - j ra - nop -END(ffs) - -/** - * void - * atomic_set_16(u_int16_t *a, u_int16_t b) - * { - * *a |= b; - * } - */ -LEAF(atomic_set_16) - .set noreorder - /* NB: Only bit 1 is masked so the ll catches unaligned inputs */ - andi t0, a0, 2 # get unaligned offset - xor a0, a0, t0 # align pointer -#if _BYTE_ORDER == BIG_ENDIAN - xori t0, t0, 2 -#endif - sll t0, t0, 3 # convert byte offset to bit offset - sll a1, a1, t0 # put bits in the right half -1: - ll t0, 0(a0) - or t0, t0, a1 - sc t0, 0(a0) - beq t0, zero, 1b - nop - j ra - nop -END(atomic_set_16) - -/** - * void - * atomic_clear_16(u_int16_t *a, u_int16_t b) - * { - * *a &= ~b; - * } - */ -LEAF(atomic_clear_16) - .set noreorder - /* NB: Only bit 1 is masked so the ll catches unaligned inputs */ - andi t0, a0, 2 # get unaligned offset - xor a0, a0, t0 # align pointer -#if _BYTE_ORDER == BIG_ENDIAN - xori t0, t0, 2 -#endif - sll t0, t0, 3 # convert byte offset to bit offset - sll a1, a1, t0 # put bits in the right half - not a1, a1 -1: - ll t0, 0(a0) - and t0, t0, a1 - sc t0, 0(a0) - beq t0, zero, 1b - nop - j ra - nop -END(atomic_clear_16) - - -/** - * void - * atomic_subtract_16(uint16_t *a, uint16_t b) - * { - * *a -= b; - * } - */ -LEAF(atomic_subtract_16) - .set noreorder - /* NB: Only bit 1 is masked so the ll catches unaligned inputs */ - andi t0, a0, 2 # get unaligned offset - xor a0, a0, t0 # align pointer -#if _BYTE_ORDER == BIG_ENDIAN - xori t0, t0, 2 # flip order for big-endian -#endif - sll t0, t0, 3 # convert byte offset to bit offset - sll a1, a1, t0 # put bits in the right half - li t2, 0xffff - sll t2, t2, t0 # compute mask -1: - ll t0, 0(a0) - subu t1, t0, a1 - /* Exploit ((t0 & ~t2) | (t1 & t2)) = t0 ^ ((t0 ^ t1) & t2) */ - xor t1, t0, t1 - and t1, t1, t2 - xor t0, t0, t1 - sc t0, 0(a0) - beq t0, zero, 1b - nop - j ra - nop -END(atomic_subtract_16) - -/** - * void - * atomic_add_16(uint16_t *a, uint16_t b) - * { - * *a += b; - * } - */ -LEAF(atomic_add_16) - .set noreorder - /* NB: Only bit 1 is masked so the ll catches unaligned inputs */ - andi t0, a0, 2 # get unaligned offset - xor a0, a0, t0 # align pointer -#if _BYTE_ORDER == BIG_ENDIAN - xori t0, t0, 2 # flip order for big-endian -#endif - sll t0, t0, 3 # convert byte offset to bit offset - sll a1, a1, t0 # put bits in the right half - li t2, 0xffff - sll t2, t2, t0 # compute mask -1: - ll t0, 0(a0) - addu t1, t0, a1 - /* Exploit ((t0 & ~t2) | (t1 & t2)) = t0 ^ ((t0 ^ t1) & t2) */ - xor t1, t0, t1 - and t1, t1, t2 - xor t0, t0, t1 - sc t0, 0(a0) - beq t0, zero, 1b - nop - j ra - nop -END(atomic_add_16) - -/** - * void - * atomic_add_8(uint8_t *a, uint8_t b) - * { - * *a += b; - * } - */ -LEAF(atomic_add_8) - .set noreorder - andi t0, a0, 3 # get unaligned offset - xor a0, a0, t0 # align pointer -#if _BYTE_ORDER == BIG_ENDIAN - xori t0, t0, 3 # flip order for big-endian -#endif - sll t0, t0, 3 # convert byte offset to bit offset - sll a1, a1, t0 # put bits in the right quarter - li t2, 0xff - sll t2, t2, t0 # compute mask -1: - ll t0, 0(a0) - addu t1, t0, a1 - /* Exploit ((t0 & ~t2) | (t1 & t2)) = t0 ^ ((t0 ^ t1) & t2) */ - xor t1, t0, t1 - and t1, t1, t2 - xor t0, t0, t1 - sc t0, 0(a0) - beq t0, zero, 1b - nop - j ra - nop -END(atomic_add_8) - - -/** - * void - * atomic_subtract_8(uint8_t *a, uint8_t b) - * { - * *a += b; - * } - */ -LEAF(atomic_subtract_8) - .set noreorder - andi t0, a0, 3 # get unaligned offset - xor a0, a0, t0 # align pointer -#if _BYTE_ORDER == BIG_ENDIAN - xori t0, t0, 3 # flip order for big-endian -#endif - sll t0, t0, 3 # convert byte offset to bit offset - sll a1, a1, t0 # put bits in the right quarter - li t2, 0xff - sll t2, t2, t0 # compute mask -1: - ll t0, 0(a0) - subu t1, t0, a1 - /* Exploit ((t0 & ~t2) | (t1 & t2)) = t0 ^ ((t0 ^ t1) & t2) */ - xor t1, t0, t1 - and t1, t1, t2 - xor t0, t0, t1 - sc t0, 0(a0) - beq t0, zero, 1b - nop - j ra - nop -END(atomic_subtract_8) - - .set noreorder # Noreorder is default style! - -#if defined(DDB) || defined(DEBUG) - -LEAF(kdbpeek) - PTR_LA v1, ddberr - and v0, a0, 3 # unaligned ? - GET_CPU_PCPU(t1) - PTR_L t1, PC_CURPCB(t1) - bne v0, zero, 1f - PTR_S v1, U_PCB_ONFAULT(t1) - - lw v0, (a0) - jr ra - PTR_S zero, U_PCB_ONFAULT(t1) - -1: - LWHI v0, 0(a0) - LWLO v0, 3(a0) - jr ra - PTR_S zero, U_PCB_ONFAULT(t1) -END(kdbpeek) - -LEAF(kdbpeekd) - PTR_LA v1, ddberr - and v0, a0, 3 # unaligned ? - GET_CPU_PCPU(t1) - PTR_L t1, PC_CURPCB(t1) - bne v0, zero, 1f - PTR_S v1, U_PCB_ONFAULT(t1) - - ld v0, (a0) - jr ra - PTR_S zero, U_PCB_ONFAULT(t1) - -1: - REG_LHI v0, 0(a0) - REG_LLO v0, 7(a0) - jr ra - PTR_S zero, U_PCB_ONFAULT(t1) -END(kdbpeekd) - -ddberr: - jr ra - nop - -#if defined(DDB) -LEAF(kdbpoke) - PTR_LA v1, ddberr - and v0, a0, 3 # unaligned ? - GET_CPU_PCPU(t1) - PTR_L t1, PC_CURPCB(t1) - bne v0, zero, 1f - PTR_S v1, U_PCB_ONFAULT(t1) - - sw a1, (a0) - jr ra - PTR_S zero, U_PCB_ONFAULT(t1) - -1: - SWHI a1, 0(a0) - SWLO a1, 3(a0) - jr ra - PTR_S zero, U_PCB_ONFAULT(t1) -END(kdbpoke) - - .data - .globl esym -esym: .word 0 - -#endif /* DDB */ -#endif /* DDB || DEBUG */ - - .text -LEAF(breakpoint) - break MIPS_BREAK_SOVER_VAL - jr ra - nop -END(breakpoint) - -LEAF(setjmp) - mfc0 v0, MIPS_COP_0_STATUS # Later the "real" spl value! - REG_S s0, (SZREG * PCB_REG_S0)(a0) - REG_S s1, (SZREG * PCB_REG_S1)(a0) - REG_S s2, (SZREG * PCB_REG_S2)(a0) - REG_S s3, (SZREG * PCB_REG_S3)(a0) - REG_S s4, (SZREG * PCB_REG_S4)(a0) - REG_S s5, (SZREG * PCB_REG_S5)(a0) - REG_S s6, (SZREG * PCB_REG_S6)(a0) - REG_S s7, (SZREG * PCB_REG_S7)(a0) - REG_S s8, (SZREG * PCB_REG_S8)(a0) - REG_S sp, (SZREG * PCB_REG_SP)(a0) - REG_S ra, (SZREG * PCB_REG_RA)(a0) - REG_S v0, (SZREG * PCB_REG_SR)(a0) - jr ra - li v0, 0 # setjmp return -END(setjmp) - -LEAF(longjmp) - REG_L v0, (SZREG * PCB_REG_SR)(a0) - REG_L ra, (SZREG * PCB_REG_RA)(a0) - REG_L s0, (SZREG * PCB_REG_S0)(a0) - REG_L s1, (SZREG * PCB_REG_S1)(a0) - REG_L s2, (SZREG * PCB_REG_S2)(a0) - REG_L s3, (SZREG * PCB_REG_S3)(a0) - REG_L s4, (SZREG * PCB_REG_S4)(a0) - REG_L s5, (SZREG * PCB_REG_S5)(a0) - REG_L s6, (SZREG * PCB_REG_S6)(a0) - REG_L s7, (SZREG * PCB_REG_S7)(a0) - REG_L s8, (SZREG * PCB_REG_S8)(a0) - REG_L sp, (SZREG * PCB_REG_SP)(a0) - mtc0 v0, MIPS_COP_0_STATUS # Later the "real" spl value! - ITLBNOPFIX - jr ra - li v0, 1 # longjmp return -END(longjmp) diff --git a/sys/mips/mips/swtch.S b/sys/mips/mips/swtch.S deleted file mode 100644 index 58f228edf4b..00000000000 --- a/sys/mips/mips/swtch.S +++ /dev/null @@ -1,690 +0,0 @@ -/* $OpenBSD: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $ */ -/*- - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * Digital Equipment Corporation and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * Copyright (C) 1989 Digital Equipment Corporation. - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose and without fee is hereby granted, - * provided that the above copyright notice appears in all copies. - * Digital Equipment Corporation makes no representations about the - * suitability of this software for any purpose. It is provided "as is" - * without express or implied warranty. - * - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s, - * v 1.1 89/07/11 17:55:04 nelson Exp SPRITE (DECWRL) - * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s, - * v 9.2 90/01/29 18:00:39 shirriff Exp SPRITE (DECWRL) - * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s, - * v 1.1 89/07/10 14:27:41 nelson Exp SPRITE (DECWRL) - * - * from: @(#)locore.s 8.5 (Berkeley) 1/4/94 - * JNPR: swtch.S,v 1.6.2.1 2007/09/10 10:36:50 girish - */ - -/* - * Contains code that is the first executed at boot time plus - * assembly language support routines. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include "assym.inc" - - .set noreorder # Noreorder is default style! - -/* - * Setup for and return to user. - */ -LEAF(fork_trampoline) - move a0,s0 - move a1,s1 - jal _C_LABEL(fork_exit) - move a2,s2 #BDSlot - - DO_AST - - mfc0 v0, MIPS_COP_0_STATUS - and v0, ~(MIPS_SR_INT_IE) - mtc0 v0, MIPS_COP_0_STATUS # disable interrupts - COP0_SYNC -/* - * The use of k1 for storing the PCB pointer must be done only - * after interrupts are disabled. Otherwise it will get overwritten - * by the interrupt code. - */ - .set noat - GET_CPU_PCPU(k1) - PTR_L k1, PC_CURPCB(k1) - - RESTORE_U_PCB_REG(t0, MULLO, k1) - RESTORE_U_PCB_REG(t1, MULHI, k1) - mtlo t0 - mthi t1 - RESTORE_U_PCB_REG(a0, PC, k1) - RESTORE_U_PCB_REG(AT, AST, k1) - RESTORE_U_PCB_REG(v0, V0, k1) - MTC0 a0, MIPS_COP_0_EXC_PC # set return address - - RESTORE_U_PCB_REG(v1, V1, k1) - RESTORE_U_PCB_REG(a0, A0, k1) - RESTORE_U_PCB_REG(a1, A1, k1) - RESTORE_U_PCB_REG(a2, A2, k1) - RESTORE_U_PCB_REG(a3, A3, k1) - RESTORE_U_PCB_REG(t0, T0, k1) - RESTORE_U_PCB_REG(t1, T1, k1) - RESTORE_U_PCB_REG(t2, T2, k1) - RESTORE_U_PCB_REG(t3, T3, k1) - RESTORE_U_PCB_REG(ta0, TA0, k1) - RESTORE_U_PCB_REG(ta1, TA1, k1) - RESTORE_U_PCB_REG(ta2, TA2, k1) - RESTORE_U_PCB_REG(ta3, TA3, k1) - RESTORE_U_PCB_REG(s0, S0, k1) - RESTORE_U_PCB_REG(s1, S1, k1) - RESTORE_U_PCB_REG(s2, S2, k1) - RESTORE_U_PCB_REG(s3, S3, k1) - RESTORE_U_PCB_REG(s4, S4, k1) - RESTORE_U_PCB_REG(s5, S5, k1) - RESTORE_U_PCB_REG(s6, S6, k1) - RESTORE_U_PCB_REG(s7, S7, k1) - RESTORE_U_PCB_REG(t8, T8, k1) - RESTORE_U_PCB_REG(t9, T9, k1) - RESTORE_U_PCB_REG(k0, SR, k1) - RESTORE_U_PCB_REG(gp, GP, k1) - RESTORE_U_PCB_REG(s8, S8, k1) - RESTORE_U_PCB_REG(ra, RA, k1) - RESTORE_U_PCB_REG(sp, SP, k1) - li k1, ~MIPS_SR_INT_MASK - and k0, k0, k1 - mfc0 k1, MIPS_COP_0_STATUS - and k1, k1, MIPS_SR_INT_MASK - or k0, k0, k1 - mtc0 k0, MIPS_COP_0_STATUS # switch to user mode (when eret...) - HAZARD_DELAY - sync - eret - .set at -END(fork_trampoline) - -/* - * Update pcb, saving current processor state. - * Note: this only works if pcbp != curproc's pcb since - * cpu_switch() will copy over pcb_context. - * - * savectx(struct pcb *pcbp); - */ -LEAF(savectx) - SAVE_U_PCB_CONTEXT(s0, PCB_REG_S0, a0) - SAVE_U_PCB_CONTEXT(s1, PCB_REG_S1, a0) - SAVE_U_PCB_CONTEXT(s2, PCB_REG_S2, a0) - SAVE_U_PCB_CONTEXT(s3, PCB_REG_S3, a0) - mfc0 v0, MIPS_COP_0_STATUS - SAVE_U_PCB_CONTEXT(s4, PCB_REG_S4, a0) - SAVE_U_PCB_CONTEXT(s5, PCB_REG_S5, a0) - SAVE_U_PCB_CONTEXT(s6, PCB_REG_S6, a0) - SAVE_U_PCB_CONTEXT(s7, PCB_REG_S7, a0) - SAVE_U_PCB_CONTEXT(sp, PCB_REG_SP, a0) - SAVE_U_PCB_CONTEXT(s8, PCB_REG_S8, a0) - SAVE_U_PCB_CONTEXT(ra, PCB_REG_RA, a0) - SAVE_U_PCB_CONTEXT(v0, PCB_REG_SR, a0) - SAVE_U_PCB_CONTEXT(gp, PCB_REG_GP, a0) - - move v0, ra /* save 'ra' before we trash it */ - jal 1f - nop -1: - SAVE_U_PCB_CONTEXT(ra, PCB_REG_PC, a0) - move ra, v0 /* restore 'ra' before returning */ - - j ra - move v0, zero -END(savectx) - -NESTED(cpu_throw, CALLFRAME_SIZ, ra) - mfc0 t0, MIPS_COP_0_STATUS # t0 = saved status register - nop - nop - and a3, t0, ~(MIPS_SR_INT_IE) - mtc0 a3, MIPS_COP_0_STATUS # Disable all interrupts - ITLBNOPFIX - j mips_sw1 # We're not interested in old - # thread's context, so jump - # right to action - nop # BDSLOT -END(cpu_throw) - -/* - * cpu_switch(struct thread *old, struct thread *new, struct mutex *mtx); - * a0 - old - * a1 - new - * a2 - mtx - * Find the highest priority process and resume it. - */ -NESTED(cpu_switch, CALLFRAME_SIZ, ra) - mfc0 t0, MIPS_COP_0_STATUS # t0 = saved status register - nop - nop - and a3, t0, ~(MIPS_SR_INT_IE) - mtc0 a3, MIPS_COP_0_STATUS # Disable all interrupts - ITLBNOPFIX - beqz a0, mips_sw1 - move a3, a0 - PTR_L a0, TD_PCB(a0) # load PCB addr of curproc - SAVE_U_PCB_CONTEXT(sp, PCB_REG_SP, a0) # save old sp - PTR_SUBU sp, sp, CALLFRAME_SIZ - REG_S ra, CALLFRAME_RA(sp) - .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) - SAVE_U_PCB_CONTEXT(s0, PCB_REG_S0, a0) # do a 'savectx()' - SAVE_U_PCB_CONTEXT(s1, PCB_REG_S1, a0) - SAVE_U_PCB_CONTEXT(s2, PCB_REG_S2, a0) - SAVE_U_PCB_CONTEXT(s3, PCB_REG_S3, a0) - SAVE_U_PCB_CONTEXT(s4, PCB_REG_S4, a0) - SAVE_U_PCB_CONTEXT(s5, PCB_REG_S5, a0) - SAVE_U_PCB_CONTEXT(s6, PCB_REG_S6, a0) - SAVE_U_PCB_CONTEXT(s7, PCB_REG_S7, a0) - SAVE_U_PCB_CONTEXT(s8, PCB_REG_S8, a0) - SAVE_U_PCB_CONTEXT(ra, PCB_REG_RA, a0) # save return address - SAVE_U_PCB_CONTEXT(t0, PCB_REG_SR, a0) # save status register - SAVE_U_PCB_CONTEXT(gp, PCB_REG_GP, a0) - jal getpc - nop -getpc: - SAVE_U_PCB_CONTEXT(ra, PCB_REG_PC, a0) # save return address - -#ifdef CPU_CNMIPS - - lw t2, TD_MDFLAGS(a3) # get md_flags - and t1, t2, MDTD_COP2USED - beqz t1, cop2_untouched - nop - - /* Clear cop2used flag */ - and t2, t2, ~MDTD_COP2USED - sw t2, TD_MDFLAGS(a3) - - and t2, t0, ~MIPS_SR_COP_2_BIT # clear COP_2 enable bit - SAVE_U_PCB_CONTEXT(t2, PCB_REG_SR, a0) # save status register - - RESTORE_U_PCB_REG(t0, PS, a0) # get CPU status register - and t2, t0, ~MIPS_SR_COP_2_BIT # clear COP_2 enable bit - SAVE_U_PCB_REG(t2, PS, a0) # save stratus register - - /* preserve a0..a3 */ - move s0, a0 - move s1, a1 - move s2, a2 - move s3, a3 - - /* does kernel own COP2 context? */ - lw t1, TD_COP2OWNER(a3) # get md_cop2owner - beqz t1, userland_cop2 # 0 - it's userland context - nop - - PTR_L a0, TD_COP2(a3) - beqz a0, no_cop2_context - nop - - j do_cop2_save - nop - -userland_cop2: - - PTR_L a0, TD_UCOP2(a3) - beqz a0, no_cop2_context - nop - -do_cop2_save: - jal octeon_cop2_save - nop - -no_cop2_context: - move a3, s3 - move a2, s2 - move a1, s1 - move a0, s0 - -cop2_untouched: -#endif - - PTR_S a2, TD_LOCK(a3) # Switchout td_lock - -mips_sw1: -#if defined(SMP) && defined(SCHED_ULE) - PTR_LA t0, _C_LABEL(blocked_lock) -blocked_loop: - PTR_L t1, TD_LOCK(a1) - beq t0, t1, blocked_loop - nop -#endif - move s7, a1 # Store newthread -/* - * Switch to new context. - */ - GET_CPU_PCPU(a3) - PTR_S a1, PC_CURTHREAD(a3) - PTR_L a2, TD_PCB(a1) - PTR_S a2, PC_CURPCB(a3) - PTR_L v0, TD_KSTACK(a1) -#if defined(__mips_n64) - PTR_LI s0, MIPS_XKSEG_START -#else - PTR_LI s0, MIPS_KSEG2_START # If Uarea addr is below kseg2, -#endif - bltu v0, s0, sw2 # no need to insert in TLB. - PTE_L a1, TD_UPTE + 0(s7) # a1 = u. pte #0 - PTE_L a2, TD_UPTE + PTESIZE(s7) # a2 = u. pte #1 -/* - * Wiredown the USPACE of newproc in TLB entry#0. Check whether target - * USPACE is already in another place of TLB before that, and if so - * invalidate that TLB entry. - * NOTE: This is hard coded to UPAGES == 2. - * Also, there should be no TLB faults at this point. - */ - MTC0 v0, MIPS_COP_0_TLB_HI # VPN = va - HAZARD_DELAY - tlbp # probe VPN - HAZARD_DELAY - mfc0 s0, MIPS_COP_0_TLB_INDEX - HAZARD_DELAY - - PTR_LI t1, MIPS_KSEG0_START # invalidate tlb entry - bltz s0, entry0set - nop - sll s0, PAGE_SHIFT + 1 - addu t1, s0 - MTC0 t1, MIPS_COP_0_TLB_HI - PTE_MTC0 zero, MIPS_COP_0_TLB_LO0 - PTE_MTC0 zero, MIPS_COP_0_TLB_LO1 - HAZARD_DELAY - tlbwi - HAZARD_DELAY - MTC0 v0, MIPS_COP_0_TLB_HI # set VPN again - -entry0set: -/* SMP!! - Works only for unshared TLB case - i.e. no v-cpus */ - mtc0 zero, MIPS_COP_0_TLB_INDEX # TLB entry #0 - HAZARD_DELAY - PTE_MTC0 a1, MIPS_COP_0_TLB_LO0 # upte[0] - HAZARD_DELAY - PTE_MTC0 a2, MIPS_COP_0_TLB_LO1 # upte[1] - HAZARD_DELAY - tlbwi # set TLB entry #0 - HAZARD_DELAY -/* - * Now running on new u struct. - */ -sw2: - PTR_L s0, TD_PCB(s7) - RESTORE_U_PCB_CONTEXT(sp, PCB_REG_SP, s0) - PTR_LA t1, _C_LABEL(pmap_activate) # s7 = new proc pointer - jalr t1 # s7 = new proc pointer - move a0, s7 # BDSLOT -/* - * Restore registers and return. - */ - move a0, s0 - move a1, s7 - RESTORE_U_PCB_CONTEXT(gp, PCB_REG_GP, a0) - RESTORE_U_PCB_CONTEXT(v0, PCB_REG_SR, a0) # restore kernel context - RESTORE_U_PCB_CONTEXT(ra, PCB_REG_RA, a0) - RESTORE_U_PCB_CONTEXT(s0, PCB_REG_S0, a0) - RESTORE_U_PCB_CONTEXT(s1, PCB_REG_S1, a0) - RESTORE_U_PCB_CONTEXT(s2, PCB_REG_S2, a0) - RESTORE_U_PCB_CONTEXT(s3, PCB_REG_S3, a0) - RESTORE_U_PCB_CONTEXT(s4, PCB_REG_S4, a0) - RESTORE_U_PCB_CONTEXT(s5, PCB_REG_S5, a0) - RESTORE_U_PCB_CONTEXT(s6, PCB_REG_S6, a0) - RESTORE_U_PCB_CONTEXT(s7, PCB_REG_S7, a0) - RESTORE_U_PCB_CONTEXT(s8, PCB_REG_S8, a0) - - mfc0 t0, MIPS_COP_0_STATUS - and t0, t0, MIPS_SR_INT_MASK - and v0, v0, ~MIPS_SR_INT_MASK - or v0, v0, t0 - mtc0 v0, MIPS_COP_0_STATUS - ITLBNOPFIX -/* - * Set the new thread's TLS pointer. - * - * Note that this code is removed if the CPU doesn't support ULRI by - * remove_userlocal_code() in cpu.c. - */ - .globl cpu_switch_set_userlocal -cpu_switch_set_userlocal: - PTR_L t0, TD_MDTLS(a1) # Get TLS pointer - PTR_L t1, TD_PROC(a1) - PTR_L t1, P_MDTLS_TCB_OFFSET(t1) # Get TLS/TCB offset - PTR_ADDU v0, t0, t1 - MTC0 v0, MIPS_COP_0_USERLOCAL, 2 # write it to ULR for rdhwr - - j ra - nop -END(cpu_switch) - -/*---------------------------------------------------------------------------- - * - * MipsSwitchFPState -- - * - * Save the current state into 'from' and restore it from 'to'. - * - * MipsSwitchFPState(from, to) - * struct thread *from; - * struct trapframe *to; - * - * Results: - * None. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -LEAF(MipsSwitchFPState) - .set push - .set hardfloat - mfc0 t1, MIPS_COP_0_STATUS # Save old SR - HAZARD_DELAY -#if defined(__mips_n32) || defined(__mips_n64) - or t0, t1, MIPS_SR_COP_1_BIT | MIPS_SR_FR # enable the coprocessor -#else - or t0, t1, MIPS_SR_COP_1_BIT # enable the coprocessor -#endif - mtc0 t0, MIPS_COP_0_STATUS - HAZARD_DELAY - ITLBNOPFIX - - beq a0, zero, 1f # skip save if NULL pointer - nop -/* - * First read out the status register to make sure that all FP operations - * have completed. - */ - PTR_L a0, TD_PCB(a0) # get pointer to pcb for proc - cfc1 t0, MIPS_FPU_CSR # stall til FP done - cfc1 t0, MIPS_FPU_CSR # now get status - li t3, ~MIPS_SR_COP_1_BIT - RESTORE_U_PCB_REG(t2, PS, a0) # get CPU status register - SAVE_U_PCB_FPSR(t0, FSR_NUM, a0) # save FP status - and t2, t2, t3 # clear COP_1 enable bit - SAVE_U_PCB_REG(t2, PS, a0) # save new status register -/* - * Save the floating point registers. - */ - SAVE_U_PCB_FPREG($f0, F0_NUM, a0) - SAVE_U_PCB_FPREG($f1, F1_NUM, a0) - SAVE_U_PCB_FPREG($f2, F2_NUM, a0) - SAVE_U_PCB_FPREG($f3, F3_NUM, a0) - SAVE_U_PCB_FPREG($f4, F4_NUM, a0) - SAVE_U_PCB_FPREG($f5, F5_NUM, a0) - SAVE_U_PCB_FPREG($f6, F6_NUM, a0) - SAVE_U_PCB_FPREG($f7, F7_NUM, a0) - SAVE_U_PCB_FPREG($f8, F8_NUM, a0) - SAVE_U_PCB_FPREG($f9, F9_NUM, a0) - SAVE_U_PCB_FPREG($f10, F10_NUM, a0) - SAVE_U_PCB_FPREG($f11, F11_NUM, a0) - SAVE_U_PCB_FPREG($f12, F12_NUM, a0) - SAVE_U_PCB_FPREG($f13, F13_NUM, a0) - SAVE_U_PCB_FPREG($f14, F14_NUM, a0) - SAVE_U_PCB_FPREG($f15, F15_NUM, a0) - SAVE_U_PCB_FPREG($f16, F16_NUM, a0) - SAVE_U_PCB_FPREG($f17, F17_NUM, a0) - SAVE_U_PCB_FPREG($f18, F18_NUM, a0) - SAVE_U_PCB_FPREG($f19, F19_NUM, a0) - SAVE_U_PCB_FPREG($f20, F20_NUM, a0) - SAVE_U_PCB_FPREG($f21, F21_NUM, a0) - SAVE_U_PCB_FPREG($f22, F22_NUM, a0) - SAVE_U_PCB_FPREG($f23, F23_NUM, a0) - SAVE_U_PCB_FPREG($f24, F24_NUM, a0) - SAVE_U_PCB_FPREG($f25, F25_NUM, a0) - SAVE_U_PCB_FPREG($f26, F26_NUM, a0) - SAVE_U_PCB_FPREG($f27, F27_NUM, a0) - SAVE_U_PCB_FPREG($f28, F28_NUM, a0) - SAVE_U_PCB_FPREG($f29, F29_NUM, a0) - SAVE_U_PCB_FPREG($f30, F30_NUM, a0) - SAVE_U_PCB_FPREG($f31, F31_NUM, a0) - -1: -/* - * Restore the floating point registers. - */ - RESTORE_U_PCB_FPSR(t0, FSR_NUM, a1) # get status register - RESTORE_U_PCB_FPREG($f0, F0_NUM, a1) - RESTORE_U_PCB_FPREG($f1, F1_NUM, a1) - RESTORE_U_PCB_FPREG($f2, F2_NUM, a1) - RESTORE_U_PCB_FPREG($f3, F3_NUM, a1) - RESTORE_U_PCB_FPREG($f4, F4_NUM, a1) - RESTORE_U_PCB_FPREG($f5, F5_NUM, a1) - RESTORE_U_PCB_FPREG($f6, F6_NUM, a1) - RESTORE_U_PCB_FPREG($f7, F7_NUM, a1) - RESTORE_U_PCB_FPREG($f8, F8_NUM, a1) - RESTORE_U_PCB_FPREG($f9, F9_NUM, a1) - RESTORE_U_PCB_FPREG($f10, F10_NUM, a1) - RESTORE_U_PCB_FPREG($f11, F11_NUM, a1) - RESTORE_U_PCB_FPREG($f12, F12_NUM, a1) - RESTORE_U_PCB_FPREG($f13, F13_NUM, a1) - RESTORE_U_PCB_FPREG($f14, F14_NUM, a1) - RESTORE_U_PCB_FPREG($f15, F15_NUM, a1) - RESTORE_U_PCB_FPREG($f16, F16_NUM, a1) - RESTORE_U_PCB_FPREG($f17, F17_NUM, a1) - RESTORE_U_PCB_FPREG($f18, F18_NUM, a1) - RESTORE_U_PCB_FPREG($f19, F19_NUM, a1) - RESTORE_U_PCB_FPREG($f20, F20_NUM, a1) - RESTORE_U_PCB_FPREG($f21, F21_NUM, a1) - RESTORE_U_PCB_FPREG($f22, F22_NUM, a1) - RESTORE_U_PCB_FPREG($f23, F23_NUM, a1) - RESTORE_U_PCB_FPREG($f24, F24_NUM, a1) - RESTORE_U_PCB_FPREG($f25, F25_NUM, a1) - RESTORE_U_PCB_FPREG($f26, F26_NUM, a1) - RESTORE_U_PCB_FPREG($f27, F27_NUM, a1) - RESTORE_U_PCB_FPREG($f28, F28_NUM, a1) - RESTORE_U_PCB_FPREG($f29, F29_NUM, a1) - RESTORE_U_PCB_FPREG($f30, F30_NUM, a1) - RESTORE_U_PCB_FPREG($f31, F31_NUM, a1) - - and t0, t0, ~MIPS_FPU_EXCEPTION_BITS - ctc1 t0, MIPS_FPU_CSR - nop - - mtc0 t1, MIPS_COP_0_STATUS # Restore the status register. - ITLBNOPFIX - j ra - nop - .set pop -END(MipsSwitchFPState) - -/*---------------------------------------------------------------------------- - * - * MipsFPID -- - * - * Read and return the floating point implementation register. - * - * uint32_t - * MipsFPID(void) - * - * Results: - * Floating point implementation register. - * - * Side effects: - * None. - * - *---------------------------------------------------------------------------- - */ -LEAF(MipsFPID) - .set push - .set hardfloat - mfc0 t1, MIPS_COP_0_STATUS # Save the status register. - HAZARD_DELAY -#if defined(__mips_n32) || defined(__mips_n64) - or t0, t1, MIPS_SR_COP_1_BIT | MIPS_SR_FR -#else - or t0, t1, MIPS_SR_COP_1_BIT -#endif - mtc0 t0, MIPS_COP_0_STATUS # Enable the coprocessor - HAZARD_DELAY - ITLBNOPFIX - cfc1 v0, MIPS_FPU_ID - mtc0 t1, MIPS_COP_0_STATUS # Restore the status register. - ITLBNOPFIX - j ra - nop - .set pop -END(MipsFPID) - -/*---------------------------------------------------------------------------- - * - * MipsSaveCurFPState -- - * - * Save the current floating point coprocessor state. - * - * MipsSaveCurFPState(td) - * struct thread *td; - * - * Results: - * None. - * - * Side effects: - * machFPCurProcPtr is cleared. - * - *---------------------------------------------------------------------------- - */ -LEAF(MipsSaveCurFPState) - .set push - .set hardfloat - PTR_L a0, TD_PCB(a0) # get pointer to pcb for thread - mfc0 t1, MIPS_COP_0_STATUS # Disable interrupts and - HAZARD_DELAY -#if defined(__mips_n32) || defined(__mips_n64) - or t0, t1, MIPS_SR_COP_1_BIT | MIPS_SR_FR # enable the coprocessor -#else - or t0, t1, MIPS_SR_COP_1_BIT # enable the coprocessor -#endif - mtc0 t0, MIPS_COP_0_STATUS - HAZARD_DELAY - ITLBNOPFIX - GET_CPU_PCPU(a1) - PTR_S zero, PC_FPCURTHREAD(a1) # indicate state has been saved -/* - * First read out the status register to make sure that all FP operations - * have completed. - */ - RESTORE_U_PCB_REG(t2, PS, a0) # get CPU status register - li t3, ~MIPS_SR_COP_1_BIT - and t2, t2, t3 # clear COP_1 enable bit - cfc1 t0, MIPS_FPU_CSR # stall til FP done - cfc1 t0, MIPS_FPU_CSR # now get status - SAVE_U_PCB_REG(t2, PS, a0) # save new status register - SAVE_U_PCB_FPSR(t0, FSR_NUM, a0) # save FP status -/* - * Save the floating point registers. - */ - SAVE_U_PCB_FPREG($f0, F0_NUM, a0) - SAVE_U_PCB_FPREG($f1, F1_NUM, a0) - SAVE_U_PCB_FPREG($f2, F2_NUM, a0) - SAVE_U_PCB_FPREG($f3, F3_NUM, a0) - SAVE_U_PCB_FPREG($f4, F4_NUM, a0) - SAVE_U_PCB_FPREG($f5, F5_NUM, a0) - SAVE_U_PCB_FPREG($f6, F6_NUM, a0) - SAVE_U_PCB_FPREG($f7, F7_NUM, a0) - SAVE_U_PCB_FPREG($f8, F8_NUM, a0) - SAVE_U_PCB_FPREG($f9, F9_NUM, a0) - SAVE_U_PCB_FPREG($f10, F10_NUM, a0) - SAVE_U_PCB_FPREG($f11, F11_NUM, a0) - SAVE_U_PCB_FPREG($f12, F12_NUM, a0) - SAVE_U_PCB_FPREG($f13, F13_NUM, a0) - SAVE_U_PCB_FPREG($f14, F14_NUM, a0) - SAVE_U_PCB_FPREG($f15, F15_NUM, a0) - SAVE_U_PCB_FPREG($f16, F16_NUM, a0) - SAVE_U_PCB_FPREG($f17, F17_NUM, a0) - SAVE_U_PCB_FPREG($f18, F18_NUM, a0) - SAVE_U_PCB_FPREG($f19, F19_NUM, a0) - SAVE_U_PCB_FPREG($f20, F20_NUM, a0) - SAVE_U_PCB_FPREG($f21, F21_NUM, a0) - SAVE_U_PCB_FPREG($f22, F22_NUM, a0) - SAVE_U_PCB_FPREG($f23, F23_NUM, a0) - SAVE_U_PCB_FPREG($f24, F24_NUM, a0) - SAVE_U_PCB_FPREG($f25, F25_NUM, a0) - SAVE_U_PCB_FPREG($f26, F26_NUM, a0) - SAVE_U_PCB_FPREG($f27, F27_NUM, a0) - SAVE_U_PCB_FPREG($f28, F28_NUM, a0) - SAVE_U_PCB_FPREG($f29, F29_NUM, a0) - SAVE_U_PCB_FPREG($f30, F30_NUM, a0) - SAVE_U_PCB_FPREG($f31, F31_NUM, a0) - - mtc0 t1, MIPS_COP_0_STATUS # Restore the status register. - ITLBNOPFIX - j ra - nop - .set pop -END(MipsSaveCurFPState) - -/* - * This code is copied the user's stack for returning from signal handlers - * (see sendsig() and sigreturn()). We have to compute the address - * of the sigcontext struct for the sigreturn call. - */ - .globl _C_LABEL(sigcode) -_C_LABEL(sigcode): - PTR_ADDU a0, sp, SIGF_UC # address of ucontext - li v0, SYS_sigreturn -# sigreturn (ucp) - syscall - break 0 # just in case sigreturn fails - .globl _C_LABEL(esigcode) -_C_LABEL(esigcode): - - .data - .globl szsigcode -szsigcode: - .long esigcode-sigcode - .text - -#if (defined(__mips_n32) || defined(__mips_n64)) && defined(COMPAT_FREEBSD32) - .globl _C_LABEL(sigcode32) -_C_LABEL(sigcode32): - addu a0, sp, SIGF32_UC # address of ucontext - li v0, SYS_sigreturn -# sigreturn (ucp) - syscall - break 0 # just in case sigreturn fails - .globl _C_LABEL(esigcode32) -_C_LABEL(esigcode32): - - .data - .globl szsigcode32 -szsigcode32: - .long esigcode32-sigcode32 - .text -#endif diff --git a/sys/mips/mips/sys_machdep.c b/sys/mips/mips/sys_machdep.c deleted file mode 100644 index b57c4d4415d..00000000000 --- a/sys/mips/mips/sys_machdep.c +++ /dev/null @@ -1,84 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 1990 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)sys_machdep.c 5.5 (Berkeley) 1/19/91 - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#ifndef _SYS_SYSPROTO_H_ -struct sysarch_args { - int op; - char *parms; -}; -#endif - -int -sysarch(struct thread *td, struct sysarch_args *uap) -{ - int error; - void *tlsbase; - - switch (uap->op) { - case MIPS_SET_TLS: - td->td_md.md_tls = uap->parms; - - /* - * If there is an user local register implementation (ULRI) - * update it as well. Add the TLS and TCB offsets so the - * value in this register is adjusted like in the case of the - * rdhwr trap() instruction handler. - */ - if (cpuinfo.userlocal_reg == true) { - mips_wr_userlocal((unsigned long)(uap->parms + - td->td_proc->p_md.md_tls_tcb_offset)); - } - return (0); - case MIPS_GET_TLS: - tlsbase = td->td_md.md_tls; - error = copyout(&tlsbase, uap->parms, sizeof(tlsbase)); - return (error); - default: - break; - } - return (EINVAL); -} diff --git a/sys/mips/mips/tick.c b/sys/mips/mips/tick.c deleted file mode 100644 index b74439a02dc..00000000000 --- a/sys/mips/mips/tick.c +++ /dev/null @@ -1,399 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006-2007 Bruce M. Simpson. - * Copyright (c) 2003-2004 Juli Mallett. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Simple driver for the 32-bit interval counter built in to all - * MIPS32 CPUs. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#ifdef INTRNG -#include -#endif - -uint64_t counter_freq; - -struct timecounter *platform_timecounter; - -DPCPU_DEFINE_STATIC(uint32_t, cycles_per_tick); -static uint32_t cycles_per_usec; - -DPCPU_DEFINE_STATIC(volatile uint32_t, counter_upper); -DPCPU_DEFINE_STATIC(volatile uint32_t, counter_lower_last); -DPCPU_DEFINE_STATIC(uint32_t, compare_ticks); -DPCPU_DEFINE_STATIC(uint32_t, lost_ticks); - -struct clock_softc { - int intr_rid; - struct resource *intr_res; - void *intr_handler; - struct timecounter tc; - struct eventtimer et; -}; -static struct clock_softc *softc; - -/* - * Device methods - */ -static int clock_probe(device_t); -static void clock_identify(driver_t *, device_t); -static int clock_attach(device_t); -static unsigned counter_get_timecount(struct timecounter *tc); - -void -mips_timer_early_init(uint64_t clock_hz) -{ - /* Initialize clock early so that we can use DELAY sooner */ - counter_freq = clock_hz; - cycles_per_usec = (clock_hz / (1000 * 1000)); -} - -void -platform_initclocks(void) -{ - - if (platform_timecounter != NULL) - tc_init(platform_timecounter); -} - -static uint64_t -tick_ticker(void) -{ - uint64_t ret; - uint32_t ticktock; - uint32_t t_lower_last, t_upper; - - /* - * Disable preemption because we are working with cpu specific data. - */ - critical_enter(); - - /* - * Note that even though preemption is disabled, interrupts are - * still enabled. In particular there is a race with clock_intr() - * reading the values of 'counter_upper' and 'counter_lower_last'. - * - * XXX this depends on clock_intr() being executed periodically - * so that 'counter_upper' and 'counter_lower_last' are not stale. - */ - do { - t_upper = DPCPU_GET(counter_upper); - t_lower_last = DPCPU_GET(counter_lower_last); - } while (t_upper != DPCPU_GET(counter_upper)); - - ticktock = mips_rd_count(); - - critical_exit(); - - /* COUNT register wrapped around */ - if (ticktock < t_lower_last) - t_upper++; - - ret = ((uint64_t)t_upper << 32) | ticktock; - return (ret); -} - -void -mips_timer_init_params(uint64_t platform_counter_freq, int double_count) -{ - - /* - * XXX: Do not use printf here: uart code 8250 may use DELAY so this - * function should be called before cninit. - */ - counter_freq = platform_counter_freq; - /* - * XXX: Some MIPS32 cores update the Count register only every two - * pipeline cycles. - * We know this because of status registers in CP0, make it automatic. - */ - if (double_count != 0) - counter_freq /= 2; - - cycles_per_usec = counter_freq / (1 * 1000 * 1000); - set_cputicker(tick_ticker, counter_freq, 1); -} - -static int -sysctl_machdep_counter_freq(SYSCTL_HANDLER_ARGS) -{ - int error; - uint64_t freq; - - if (softc == NULL) - return (EOPNOTSUPP); - freq = counter_freq; - error = sysctl_handle_64(oidp, &freq, sizeof(freq), req); - if (error == 0 && req->newptr != NULL) { - counter_freq = freq; - softc->et.et_frequency = counter_freq; - softc->tc.tc_frequency = counter_freq; - } - return (error); -} - -SYSCTL_PROC(_machdep, OID_AUTO, counter_freq, - CTLTYPE_U64 | CTLFLAG_RW | CTLFLAG_NEEDGIANT, NULL, 0, - sysctl_machdep_counter_freq, "QU", - "Timecounter frequency in Hz"); - -static unsigned -counter_get_timecount(struct timecounter *tc) -{ - - return (mips_rd_count()); -} - -/* - * Wait for about n microseconds (at least!). - */ -void -DELAY(int n) -{ - uint32_t cur, last, delta, usecs; - - TSENTER(); - /* - * This works by polling the timer and counting the number of - * microseconds that go by. - */ - last = mips_rd_count(); - delta = usecs = 0; - - while (n > usecs) { - cur = mips_rd_count(); - - /* Check to see if the timer has wrapped around. */ - if (cur < last) - delta += cur + (0xffffffff - last) + 1; - else - delta += cur - last; - - last = cur; - - if (delta >= cycles_per_usec) { - usecs += delta / cycles_per_usec; - delta %= cycles_per_usec; - } - } - TSEXIT(); -} - -static int -clock_start(struct eventtimer *et, sbintime_t first, sbintime_t period) -{ - uint32_t fdiv, div, next; - - if (period != 0) { - div = (et->et_frequency * period) >> 32; - } else - div = 0; - if (first != 0) - fdiv = (et->et_frequency * first) >> 32; - else - fdiv = div; - DPCPU_SET(cycles_per_tick, div); - next = mips_rd_count() + fdiv; - DPCPU_SET(compare_ticks, next); - mips_wr_compare(next); - return (0); -} - -static int -clock_stop(struct eventtimer *et) -{ - - DPCPU_SET(cycles_per_tick, 0); - mips_wr_compare(0xffffffff); - return (0); -} - -/* - * Device section of file below - */ -static int -clock_intr(void *arg) -{ - struct clock_softc *sc = (struct clock_softc *)arg; - uint32_t cycles_per_tick; - uint32_t count, compare_last, compare_next, lost_ticks; - - cycles_per_tick = DPCPU_GET(cycles_per_tick); - /* - * Set next clock edge. - */ - count = mips_rd_count(); - compare_last = DPCPU_GET(compare_ticks); - if (cycles_per_tick > 0) { - compare_next = count + cycles_per_tick; - DPCPU_SET(compare_ticks, compare_next); - mips_wr_compare(compare_next); - } else /* In one-shot mode timer should be stopped after the event. */ - mips_wr_compare(0xffffffff); - - /* COUNT register wrapped around */ - if (count < DPCPU_GET(counter_lower_last)) { - DPCPU_SET(counter_upper, DPCPU_GET(counter_upper) + 1); - } - DPCPU_SET(counter_lower_last, count); - - if (cycles_per_tick > 0) { - /* - * Account for the "lost time" between when the timer interrupt - * fired and when 'clock_intr' actually started executing. - */ - lost_ticks = DPCPU_GET(lost_ticks); - lost_ticks += count - compare_last; - - /* - * If the COUNT and COMPARE registers are no longer in sync - * then make up some reasonable value for the 'lost_ticks'. - * - * This could happen, for e.g., after we resume normal - * operations after exiting the debugger. - */ - if (lost_ticks > 2 * cycles_per_tick) - lost_ticks = cycles_per_tick; - - while (lost_ticks >= cycles_per_tick) { - if (sc->et.et_active) - sc->et.et_event_cb(&sc->et, sc->et.et_arg); - lost_ticks -= cycles_per_tick; - } - DPCPU_SET(lost_ticks, lost_ticks); - } - if (sc->et.et_active) - sc->et.et_event_cb(&sc->et, sc->et.et_arg); - return (FILTER_HANDLED); -} - -static int -clock_probe(device_t dev) -{ - - device_set_desc(dev, "Generic MIPS32 ticker"); - return (BUS_PROBE_NOWILDCARD); -} - -static void -clock_identify(driver_t * drv, device_t parent) -{ - - BUS_ADD_CHILD(parent, 0, "clock", 0); -} - -static int -clock_attach(device_t dev) -{ - struct clock_softc *sc; -#ifndef INTRNG - int error; -#endif - - if (device_get_unit(dev) != 0) - panic("can't attach more clocks"); - - softc = sc = device_get_softc(dev); -#ifdef INTRNG - cpu_establish_hardintr("clock", clock_intr, NULL, sc, 5, INTR_TYPE_CLK, - NULL); -#else - sc->intr_rid = 0; - sc->intr_res = bus_alloc_resource(dev, - SYS_RES_IRQ, &sc->intr_rid, 5, 5, 1, RF_ACTIVE); - if (sc->intr_res == NULL) { - device_printf(dev, "failed to allocate irq\n"); - return (ENXIO); - } - error = bus_setup_intr(dev, sc->intr_res, INTR_TYPE_CLK, - clock_intr, NULL, sc, &sc->intr_handler); - if (error != 0) { - device_printf(dev, "bus_setup_intr returned %d\n", error); - return (error); - } -#endif - - sc->tc.tc_get_timecount = counter_get_timecount; - sc->tc.tc_counter_mask = 0xffffffff; - sc->tc.tc_frequency = counter_freq; - sc->tc.tc_name = "MIPS32"; - sc->tc.tc_quality = 800; - sc->tc.tc_priv = sc; - tc_init(&sc->tc); - sc->et.et_name = "MIPS32"; - sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT | - ET_FLAGS_PERCPU; - sc->et.et_quality = 800; - sc->et.et_frequency = counter_freq; - sc->et.et_min_period = 0x00004000LLU; /* To be safe. */ - sc->et.et_max_period = (0xfffffffeLLU << 32) / sc->et.et_frequency; - sc->et.et_start = clock_start; - sc->et.et_stop = clock_stop; - sc->et.et_priv = sc; - et_register(&sc->et); - return (0); -} - -static device_method_t clock_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, clock_probe), - DEVMETHOD(device_identify, clock_identify), - DEVMETHOD(device_attach, clock_attach), - DEVMETHOD(device_detach, bus_generic_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - {0, 0} -}; - -static driver_t clock_driver = { - "clock", - clock_methods, - sizeof(struct clock_softc), -}; - -static devclass_t clock_devclass; - -DRIVER_MODULE(clock, nexus, clock_driver, clock_devclass, 0, 0); diff --git a/sys/mips/mips/tlb.c b/sys/mips/mips/tlb.c deleted file mode 100644 index 216c9f4cf96..00000000000 --- a/sys/mips/mips/tlb.c +++ /dev/null @@ -1,387 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004-2010 Juli Mallett - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include "opt_ddb.h" - -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#if defined(CPU_CNMIPS) -#define MIPS_MAX_TLB_ENTRIES 128 -#elif defined(CPU_NLM) -#define MIPS_MAX_TLB_ENTRIES (2048 + 128) -#else -#define MIPS_MAX_TLB_ENTRIES 64 -#endif - -struct tlb_state { - unsigned wired; - struct tlb_entry { - register_t entryhi; - register_t entrylo0; - register_t entrylo1; - register_t pagemask; - } entry[MIPS_MAX_TLB_ENTRIES]; -}; - -static struct tlb_state tlb_state[MAXCPU]; - -#if 0 -/* - * PageMask must increment in steps of 2 bits. - */ -COMPILE_TIME_ASSERT(POPCNT(TLBMASK_MASK) % 2 == 0); -#endif - -static inline void -tlb_probe(void) -{ - __asm __volatile ("tlbp" : : : "memory"); - mips_cp0_sync(); -} - -static inline void -tlb_read(void) -{ - __asm __volatile ("tlbr" : : : "memory"); - mips_cp0_sync(); -} - -static inline void -tlb_write_indexed(void) -{ - __asm __volatile ("tlbwi" : : : "memory"); - mips_cp0_sync(); -} - -static void tlb_invalidate_one(unsigned); - -void -tlb_insert_wired(unsigned i, vm_offset_t va, pt_entry_t pte0, pt_entry_t pte1) -{ - register_t asid; - register_t s; - - va &= ~PAGE_MASK; - - s = intr_disable(); - asid = mips_rd_entryhi() & TLBHI_ASID_MASK; - - mips_wr_index(i); - mips_wr_pagemask(0); - mips_wr_entryhi(TLBHI_ENTRY(va, 0)); - mips_wr_entrylo0(pte0); - mips_wr_entrylo1(pte1); - tlb_write_indexed(); - - mips_wr_entryhi(asid); - intr_restore(s); -} - -void -tlb_invalidate_address(struct pmap *pmap, vm_offset_t va) -{ - register_t asid; - register_t s; - int i; - - va &= ~PAGE_MASK; - - s = intr_disable(); - asid = mips_rd_entryhi() & TLBHI_ASID_MASK; - - mips_wr_pagemask(0); - mips_wr_entryhi(TLBHI_ENTRY(va, pmap_asid(pmap))); - tlb_probe(); - i = mips_rd_index(); - if (i >= 0) - tlb_invalidate_one(i); - - mips_wr_entryhi(asid); - intr_restore(s); -} - -void -tlb_invalidate_all(void) -{ - register_t asid; - register_t s; - unsigned i; - - s = intr_disable(); - asid = mips_rd_entryhi() & TLBHI_ASID_MASK; - - for (i = mips_rd_wired(); i < num_tlbentries; i++) - tlb_invalidate_one(i); - - mips_wr_entryhi(asid); - intr_restore(s); -} - -void -tlb_invalidate_all_user(struct pmap *pmap) -{ - register_t asid; - register_t s; - unsigned i; - - s = intr_disable(); - asid = mips_rd_entryhi() & TLBHI_ASID_MASK; - - for (i = mips_rd_wired(); i < num_tlbentries; i++) { - register_t uasid; - - mips_wr_index(i); - tlb_read(); - - uasid = mips_rd_entryhi() & TLBHI_ASID_MASK; - if (pmap == NULL) { - /* - * Invalidate all non-kernel entries. - */ - if (uasid == 0) - continue; - } else { - /* - * Invalidate this pmap's entries. - */ - if (uasid != pmap_asid(pmap)) - continue; - } - tlb_invalidate_one(i); - } - - mips_wr_entryhi(asid); - intr_restore(s); -} - -/* - * Invalidates any TLB entries that map a virtual page from the specified - * address range. If "end" is zero, then every virtual page is considered to - * be within the address range's upper bound. - */ -void -tlb_invalidate_range(pmap_t pmap, vm_offset_t start, vm_offset_t end) -{ - register_t asid, end_hi, hi, hi_pagemask, s, save_asid, start_hi; - int i; - - KASSERT(start < end || (end == 0 && start > 0), - ("tlb_invalidate_range: invalid range")); - - /* - * Truncate the virtual address "start" to an even page frame number, - * and round the virtual address "end" to an even page frame number. - */ - start &= ~((1 << TLBMASK_SHIFT) - 1); - end = roundup2(end, 1 << TLBMASK_SHIFT); - - s = intr_disable(); - save_asid = mips_rd_entryhi() & TLBHI_ASID_MASK; - - asid = pmap_asid(pmap); - start_hi = TLBHI_ENTRY(start, asid); - end_hi = TLBHI_ENTRY(end, asid); - - /* - * Select the fastest method for invalidating the TLB entries. - */ - if (end - start < num_tlbentries << TLBMASK_SHIFT || (end == 0 && - start >= -(num_tlbentries << TLBMASK_SHIFT))) { - /* - * The virtual address range is small compared to the size of - * the TLB. Probe the TLB for each even numbered page frame - * within the virtual address range. - */ - for (hi = start_hi; hi != end_hi; hi += 1 << TLBMASK_SHIFT) { - mips_wr_pagemask(0); - mips_wr_entryhi(hi); - tlb_probe(); - i = mips_rd_index(); - if (i >= 0) - tlb_invalidate_one(i); - } - } else { - /* - * The virtual address range is large compared to the size of - * the TLB. Test every non-wired TLB entry. - */ - for (i = mips_rd_wired(); i < num_tlbentries; i++) { - mips_wr_index(i); - tlb_read(); - hi = mips_rd_entryhi(); - if ((hi & TLBHI_ASID_MASK) == asid && (hi < end_hi || - end == 0)) { - /* - * If "hi" is a large page that spans - * "start_hi", then it must be invalidated. - */ - hi_pagemask = mips_rd_pagemask(); - if (hi >= (start_hi & ~(hi_pagemask << - TLBMASK_SHIFT))) - tlb_invalidate_one(i); - } - } - } - - mips_wr_entryhi(save_asid); - intr_restore(s); -} - -/* XXX Only if DDB? */ -void -tlb_save(void) -{ - unsigned ntlb, i, cpu; - - cpu = PCPU_GET(cpuid); - if (num_tlbentries > MIPS_MAX_TLB_ENTRIES) - ntlb = MIPS_MAX_TLB_ENTRIES; - else - ntlb = num_tlbentries; - tlb_state[cpu].wired = mips_rd_wired(); - for (i = 0; i < ntlb; i++) { - mips_wr_index(i); - tlb_read(); - - tlb_state[cpu].entry[i].entryhi = mips_rd_entryhi(); - tlb_state[cpu].entry[i].pagemask = mips_rd_pagemask(); - tlb_state[cpu].entry[i].entrylo0 = mips_rd_entrylo0(); - tlb_state[cpu].entry[i].entrylo1 = mips_rd_entrylo1(); - } -} - -void -tlb_update(struct pmap *pmap, vm_offset_t va, pt_entry_t pte) -{ - register_t asid; - register_t s; - int i; - - va &= ~PAGE_MASK; - pte &= ~TLBLO_SWBITS_MASK; - - s = intr_disable(); - asid = mips_rd_entryhi() & TLBHI_ASID_MASK; - - mips_wr_pagemask(0); - mips_wr_entryhi(TLBHI_ENTRY(va, pmap_asid(pmap))); - tlb_probe(); - i = mips_rd_index(); - if (i >= 0) { - tlb_read(); - - if ((va & PAGE_SIZE) == 0) { - mips_wr_entrylo0(pte); - } else { - mips_wr_entrylo1(pte); - } - tlb_write_indexed(); - } - - mips_wr_entryhi(asid); - intr_restore(s); -} - -static void -tlb_invalidate_one(unsigned i) -{ - /* XXX an invalid ASID? */ - mips_wr_entryhi(TLBHI_ENTRY(MIPS_KSEG0_START + (2 * i * PAGE_SIZE), 0)); - mips_wr_entrylo0(0); - mips_wr_entrylo1(0); - mips_wr_pagemask(0); - mips_wr_index(i); - tlb_write_indexed(); -} - -#ifdef DDB -#include - -DB_SHOW_COMMAND(tlb, ddb_dump_tlb) -{ - register_t ehi, elo0, elo1, epagemask; - unsigned i, cpu, ntlb; - - /* - * XXX - * The worst conversion from hex to decimal ever. - */ - if (have_addr) - cpu = ((addr >> 4) % 16) * 10 + (addr % 16); - else - cpu = PCPU_GET(cpuid); - - if (cpu >= mp_ncpus) { - db_printf("Invalid CPU %u\n", cpu); - return; - } - if (num_tlbentries > MIPS_MAX_TLB_ENTRIES) { - ntlb = MIPS_MAX_TLB_ENTRIES; - db_printf("Warning: Only %d of %d TLB entries saved!\n", - ntlb, num_tlbentries); - } else - ntlb = num_tlbentries; - - if (cpu == PCPU_GET(cpuid)) - tlb_save(); - - db_printf("Beginning TLB dump for CPU %u...\n", cpu); - for (i = 0; i < ntlb; i++) { - if (i == tlb_state[cpu].wired) { - if (i != 0) - db_printf("^^^ WIRED ENTRIES ^^^\n"); - else - db_printf("(No wired entries.)\n"); - } - - /* XXX PageMask. */ - ehi = tlb_state[cpu].entry[i].entryhi; - elo0 = tlb_state[cpu].entry[i].entrylo0; - elo1 = tlb_state[cpu].entry[i].entrylo1; - epagemask = tlb_state[cpu].entry[i].pagemask; - - if (elo0 == 0 && elo1 == 0) - continue; - - db_printf("#%u\t=> %jx (pagemask %jx)\n", i, (intmax_t)ehi, (intmax_t) epagemask); - db_printf(" Lo0\t%jx\t(%#jx)\n", (intmax_t)elo0, (intmax_t)TLBLO_PTE_TO_PA(elo0)); - db_printf(" Lo1\t%jx\t(%#jx)\n", (intmax_t)elo1, (intmax_t)TLBLO_PTE_TO_PA(elo1)); - } - db_printf("Finished.\n"); -} -#endif diff --git a/sys/mips/mips/trap.c b/sys/mips/mips/trap.c deleted file mode 100644 index c60ff987b20..00000000000 --- a/sys/mips/mips/trap.c +++ /dev/null @@ -1,1698 +0,0 @@ -/* $OpenBSD: trap.c,v 1.19 1998/09/30 12:40:41 pefo Exp $ */ -/* tracked to 1.23 */ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department and Ralph Campbell. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: Utah Hdr: trap.c 1.32 91/04/06 - * - * from: @(#)trap.c 8.5 (Berkeley) 1/11/94 - * JNPR: trap.c,v 1.13.2.2 2007/08/29 10:03:49 girish - */ -#include -#include "opt_ddb.h" -#include "opt_ktrace.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#ifdef KTRACE -#include -#endif -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef DDB -#include -#include -#include -#include -#endif - -#ifdef KDTRACE_HOOKS -#include -#endif - -#ifdef TRAP_DEBUG -int trap_debug = 0; -SYSCTL_INT(_machdep, OID_AUTO, trap_debug, CTLFLAG_RW, - &trap_debug, 0, "Debug information on all traps"); -#endif - -#define lbu_macro(data, addr) \ - __asm __volatile ("lbu %0, 0x0(%1)" \ - : "=r" (data) /* outputs */ \ - : "r" (addr)); /* inputs */ - -#define lb_macro(data, addr) \ - __asm __volatile ("lb %0, 0x0(%1)" \ - : "=r" (data) /* outputs */ \ - : "r" (addr)); /* inputs */ - -#define lwl_macro(data, addr) \ - __asm __volatile ("lwl %0, 0x0(%1)" \ - : "+r" (data) /* outputs */ \ - : "r" (addr)); /* inputs */ - -#define lwr_macro(data, addr) \ - __asm __volatile ("lwr %0, 0x0(%1)" \ - : "+r" (data) /* outputs */ \ - : "r" (addr)); /* inputs */ - -#define ldl_macro(data, addr) \ - __asm __volatile ("ldl %0, 0x0(%1)" \ - : "+r" (data) /* outputs */ \ - : "r" (addr)); /* inputs */ - -#define ldr_macro(data, addr) \ - __asm __volatile ("ldr %0, 0x0(%1)" \ - : "+r" (data) /* outputs */ \ - : "r" (addr)); /* inputs */ - -#define sb_macro(data, addr) \ - __asm __volatile ("sb %0, 0x0(%1)" \ - : /* outputs */ \ - : "r" (data), "r" (addr)); /* inputs */ - -#define swl_macro(data, addr) \ - __asm __volatile ("swl %0, 0x0(%1)" \ - : /* outputs */ \ - : "r" (data), "r" (addr)); /* inputs */ - -#define swr_macro(data, addr) \ - __asm __volatile ("swr %0, 0x0(%1)" \ - : /* outputs */ \ - : "r" (data), "r" (addr)); /* inputs */ - -#define sdl_macro(data, addr) \ - __asm __volatile ("sdl %0, 0x0(%1)" \ - : /* outputs */ \ - : "r" (data), "r" (addr)); /* inputs */ - -#define sdr_macro(data, addr) \ - __asm __volatile ("sdr %0, 0x0(%1)" \ - : /* outputs */ \ - : "r" (data), "r" (addr)); /* inputs */ - -static void log_illegal_instruction(const char *, struct trapframe *); -static void log_bad_page_fault(char *, struct trapframe *, int); -static void log_frame_dump(struct trapframe *frame); -static void get_mapping_info(vm_offset_t, pd_entry_t **, pt_entry_t **); - -int (*dtrace_invop_jump_addr)(struct trapframe *); - -#ifdef TRAP_DEBUG -static void trap_frame_dump(struct trapframe *frame); -#endif - -void (*machExceptionTable[]) (void)= { -/* - * The kernel exception handlers. - */ - MipsKernIntr, /* external interrupt */ - MipsKernGenException, /* TLB modification */ - MipsTLBInvalidException,/* TLB miss (load or instr. fetch) */ - MipsTLBInvalidException,/* TLB miss (store) */ - MipsKernGenException, /* address error (load or I-fetch) */ - MipsKernGenException, /* address error (store) */ - MipsKernGenException, /* bus error (I-fetch) */ - MipsKernGenException, /* bus error (load or store) */ - MipsKernGenException, /* system call */ - MipsKernGenException, /* breakpoint */ - MipsKernGenException, /* reserved instruction */ - MipsKernGenException, /* coprocessor unusable */ - MipsKernGenException, /* arithmetic overflow */ - MipsKernGenException, /* trap exception */ - MipsKernGenException, /* virtual coherence exception inst */ - MipsKernGenException, /* floating point exception */ - MipsKernGenException, /* reserved */ - MipsKernGenException, /* reserved */ - MipsKernGenException, /* reserved */ - MipsKernGenException, /* reserved */ - MipsKernGenException, /* reserved */ - MipsKernGenException, /* reserved */ - MipsKernGenException, /* reserved */ - MipsKernGenException, /* watch exception */ - MipsKernGenException, /* reserved */ - MipsKernGenException, /* reserved */ - MipsKernGenException, /* reserved */ - MipsKernGenException, /* reserved */ - MipsKernGenException, /* reserved */ - MipsKernGenException, /* reserved */ - MipsKernGenException, /* reserved */ - MipsKernGenException, /* virtual coherence exception data */ -/* - * The user exception handlers. - */ - MipsUserIntr, /* 0 */ - MipsUserGenException, /* 1 */ - MipsTLBInvalidException,/* 2 */ - MipsTLBInvalidException,/* 3 */ - MipsUserGenException, /* 4 */ - MipsUserGenException, /* 5 */ - MipsUserGenException, /* 6 */ - MipsUserGenException, /* 7 */ - MipsUserGenException, /* 8 */ - MipsUserGenException, /* 9 */ - MipsUserGenException, /* 10 */ - MipsUserGenException, /* 11 */ - MipsUserGenException, /* 12 */ - MipsUserGenException, /* 13 */ - MipsUserGenException, /* 14 */ - MipsUserGenException, /* 15 */ - MipsUserGenException, /* 16 */ - MipsUserGenException, /* 17 */ - MipsUserGenException, /* 18 */ - MipsUserGenException, /* 19 */ - MipsUserGenException, /* 20 */ - MipsUserGenException, /* 21 */ - MipsUserGenException, /* 22 */ - MipsUserGenException, /* 23 */ - MipsUserGenException, /* 24 */ - MipsUserGenException, /* 25 */ - MipsUserGenException, /* 26 */ - MipsUserGenException, /* 27 */ - MipsUserGenException, /* 28 */ - MipsUserGenException, /* 29 */ - MipsUserGenException, /* 20 */ - MipsUserGenException, /* 31 */ -}; - -char *trap_type[] = { - "external interrupt", - "TLB modification", - "TLB miss (load or instr. fetch)", - "TLB miss (store)", - "address error (load or I-fetch)", - "address error (store)", - "bus error (I-fetch)", - "bus error (load or store)", - "system call", - "breakpoint", - "reserved instruction", - "coprocessor unusable", - "arithmetic overflow", - "trap", - "virtual coherency instruction", - "floating point", - "reserved 16", - "reserved 17", - "reserved 18", - "reserved 19", - "reserved 20", - "reserved 21", - "reserved 22", - "watch", - "reserved 24", - "reserved 25", - "reserved 26", - "reserved 27", - "reserved 28", - "reserved 29", - "reserved 30", - "virtual coherency data", -}; - -#if !defined(SMP) && (defined(DDB) || defined(DEBUG)) -struct trapdebug trapdebug[TRAPSIZE], *trp = trapdebug; -#endif - -#define KERNLAND(x) ((vm_offset_t)(x) >= VM_MIN_KERNEL_ADDRESS && (vm_offset_t)(x) < VM_MAX_KERNEL_ADDRESS) -#define DELAYBRANCH(x) ((x) & MIPS_CR_BR_DELAY) - -/* - * MIPS load/store access type - */ -enum { - MIPS_LHU_ACCESS = 1, - MIPS_LH_ACCESS, - MIPS_LWU_ACCESS, - MIPS_LW_ACCESS, - MIPS_LD_ACCESS, - MIPS_SH_ACCESS, - MIPS_SW_ACCESS, - MIPS_SD_ACCESS -}; - -char *access_name[] = { - "Load Halfword Unsigned", - "Load Halfword", - "Load Word Unsigned", - "Load Word", - "Load Doubleword", - "Store Halfword", - "Store Word", - "Store Doubleword" -}; - -#ifdef CPU_CNMIPS -#include -#endif - -static int allow_unaligned_acc = 1; - -SYSCTL_INT(_vm, OID_AUTO, allow_unaligned_acc, CTLFLAG_RW, - &allow_unaligned_acc, 0, "Allow unaligned accesses"); - -/* - * FP emulation is assumed to work on O32, but the code is outdated and crufty - * enough that it's a more sensible default to have it disabled when using - * other ABIs. At the very least, it needs a lot of help in using - * type-semantic ABI-oblivious macros for everything it does. - */ -#if defined(__mips_o32) -static int emulate_fp = 1; -#else -static int emulate_fp = 0; -#endif -SYSCTL_INT(_machdep, OID_AUTO, emulate_fp, CTLFLAG_RW, - &emulate_fp, 0, "Emulate unimplemented FPU instructions"); - -static int emulate_unaligned_access(struct trapframe *frame, int mode); - -extern void fswintrberr(void); /* XXX */ - -int -cpu_fetch_syscall_args(struct thread *td) -{ - struct trapframe *locr0; - struct sysentvec *se; - struct syscall_args *sa; - int error, nsaved; - - locr0 = td->td_frame; - sa = &td->td_sa; - - bzero(sa->args, sizeof(sa->args)); - - /* compute next PC after syscall instruction */ - td->td_pcb->pcb_tpc = locr0->pc; /* Remember if restart */ - if (DELAYBRANCH(locr0->cause)) /* Check BD bit */ - locr0->pc = MipsEmulateBranch(locr0, locr0->pc, 0, 0); - else - locr0->pc += sizeof(int); - sa->code = locr0->v0; - - switch (sa->code) { - case SYS___syscall: - case SYS_syscall: - /* - * This is an indirect syscall, in which the code is the first argument. - */ -#if (!defined(__mips_n32) && !defined(__mips_n64)) || defined(COMPAT_FREEBSD32) - if (sa->code == SYS___syscall && SV_PROC_FLAG(td->td_proc, SV_ILP32)) { - /* - * Like syscall, but code is a quad, so as to maintain alignment - * for the rest of the arguments. - */ - if (_QUAD_LOWWORD == 0) - sa->code = locr0->a0; - else - sa->code = locr0->a1; - sa->args[0] = locr0->a2; - sa->args[1] = locr0->a3; - nsaved = 2; - break; - } -#endif - /* - * This is either not a quad syscall, or is a quad syscall with a - * new ABI in which quads fit in a single register. - */ - sa->code = locr0->a0; - sa->args[0] = locr0->a1; - sa->args[1] = locr0->a2; - sa->args[2] = locr0->a3; - nsaved = 3; -#if defined(__mips_n32) || defined(__mips_n64) -#ifdef COMPAT_FREEBSD32 - if (!SV_PROC_FLAG(td->td_proc, SV_ILP32)) { -#endif - /* - * Non-o32 ABIs support more arguments in registers. - */ - sa->args[3] = locr0->a4; - sa->args[4] = locr0->a5; - sa->args[5] = locr0->a6; - sa->args[6] = locr0->a7; - nsaved += 4; -#ifdef COMPAT_FREEBSD32 - } -#endif -#endif - break; - default: - /* - * A direct syscall, arguments are just parameters to the syscall. - */ - sa->args[0] = locr0->a0; - sa->args[1] = locr0->a1; - sa->args[2] = locr0->a2; - sa->args[3] = locr0->a3; - nsaved = 4; -#if defined (__mips_n32) || defined(__mips_n64) -#ifdef COMPAT_FREEBSD32 - if (!SV_PROC_FLAG(td->td_proc, SV_ILP32)) { -#endif - /* - * Non-o32 ABIs support more arguments in registers. - */ - sa->args[4] = locr0->a4; - sa->args[5] = locr0->a5; - sa->args[6] = locr0->a6; - sa->args[7] = locr0->a7; - nsaved += 4; -#ifdef COMPAT_FREEBSD32 - } -#endif -#endif - break; - } - -#ifdef TRAP_DEBUG - if (trap_debug) - printf("SYSCALL #%d pid:%u\n", sa->code, td->td_proc->p_pid); -#endif - - se = td->td_proc->p_sysent; - /* - * XXX - * Shouldn't this go before switching on the code? - */ - - if (sa->code >= se->sv_size) - sa->callp = &se->sv_table[0]; - else - sa->callp = &se->sv_table[sa->code]; - - if (sa->callp->sy_narg > nsaved) { -#if defined(__mips_n32) || defined(__mips_n64) - /* - * XXX - * Is this right for new ABIs? I think the 4 there - * should be 8, size there are 8 registers to skip, - * not 4, but I'm not certain. - */ -#ifdef COMPAT_FREEBSD32 - if (!SV_PROC_FLAG(td->td_proc, SV_ILP32)) -#endif - printf("SYSCALL #%u pid:%u, narg (%u) > nsaved (%u).\n", - sa->code, td->td_proc->p_pid, sa->callp->sy_narg, nsaved); -#endif -#if (defined(__mips_n32) || defined(__mips_n64)) && defined(COMPAT_FREEBSD32) - if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) { - unsigned i; - int32_t arg; - - error = 0; /* XXX GCC is awful. */ - for (i = nsaved; i < sa->callp->sy_narg; i++) { - error = copyin((caddr_t)(intptr_t)(locr0->sp + - (4 + (i - nsaved)) * sizeof(int32_t)), - (caddr_t)&arg, sizeof arg); - if (error != 0) - break; - sa->args[i] = arg; - } - } else -#endif - error = copyin((caddr_t)(intptr_t)(locr0->sp + - 4 * sizeof(register_t)), (caddr_t)&sa->args[nsaved], - (u_int)(sa->callp->sy_narg - nsaved) * sizeof(register_t)); - if (error != 0) { - locr0->v0 = error; - locr0->a3 = 1; - } - } else - error = 0; - - if (error == 0) { - td->td_retval[0] = 0; - td->td_retval[1] = locr0->v1; - } - - return (error); -} - -#undef __FBSDID -#define __FBSDID(x) -#include "../../kern/subr_syscall.c" - -/* - * Handle an exception. - * Called from MipsKernGenException() or MipsUserGenException() - * when a processor trap occurs. - * In the case of a kernel trap, we return the pc where to resume if - * p->p_addr->u_pcb.pcb_onfault is set, otherwise, return old pc. - */ -register_t -trap(struct trapframe *trapframe) -{ - int type, usermode; - int i = 0; - unsigned ucode = 0; - struct thread *td = curthread; - struct proc *p = curproc; - vm_prot_t ftype; - pmap_t pmap; - int access_type; - ksiginfo_t ksi; - char *msg = NULL; - intptr_t addr = 0; - register_t pc; - int cop, error; - register_t *frame_regs; -#ifdef KDB - bool handled; -#endif - - trapdebug_enter(trapframe, 0); -#ifdef KDB - if (kdb_active) { - kdb_reenter(); - return (0); - } -#endif - type = (trapframe->cause & MIPS_CR_EXC_CODE) >> MIPS_CR_EXC_CODE_SHIFT; - if (TRAPF_USERMODE(trapframe)) { - type |= T_USER; - usermode = 1; - } else { - usermode = 0; - } - - /* - * Enable hardware interrupts if they were on before the trap. If it - * was off disable all so we don't accidently enable it when doing a - * return to userland. - */ - if (trapframe->sr & MIPS_SR_INT_IE) { - set_intr_mask(trapframe->sr & MIPS_SR_INT_MASK); - intr_enable(); - } else { - intr_disable(); - } - -#ifdef TRAP_DEBUG - if (trap_debug) { - static vm_offset_t last_badvaddr = 0; - static vm_offset_t this_badvaddr = 0; - static int count = 0; - u_int32_t pid; - - printf("trap type %x (%s - ", type, - trap_type[type & (~T_USER)]); - - if (type & T_USER) - printf("user mode)\n"); - else - printf("kernel mode)\n"); - -#ifdef SMP - printf("cpuid = %d\n", PCPU_GET(cpuid)); -#endif - pid = mips_rd_entryhi() & TLBHI_ASID_MASK; - printf("badaddr = %#jx, pc = %#jx, ra = %#jx, sp = %#jx, sr = %jx, pid = %d, ASID = %u\n", - (intmax_t)trapframe->badvaddr, (intmax_t)trapframe->pc, (intmax_t)trapframe->ra, - (intmax_t)trapframe->sp, (intmax_t)trapframe->sr, - (curproc ? curproc->p_pid : -1), pid); - - switch (type & ~T_USER) { - case T_TLB_MOD: - case T_TLB_LD_MISS: - case T_TLB_ST_MISS: - case T_ADDR_ERR_LD: - case T_ADDR_ERR_ST: - this_badvaddr = trapframe->badvaddr; - break; - case T_SYSCALL: - this_badvaddr = trapframe->ra; - break; - default: - this_badvaddr = trapframe->pc; - break; - } - if ((last_badvaddr == this_badvaddr) && - ((type & ~T_USER) != T_SYSCALL) && - ((type & ~T_USER) != T_COP_UNUSABLE)) { - if (++count == 3) { - trap_frame_dump(trapframe); - panic("too many faults at %p\n", (void *)last_badvaddr); - } - } else { - last_badvaddr = this_badvaddr; - count = 0; - } - } -#endif - -#ifdef KDTRACE_HOOKS - /* - * A trap can occur while DTrace executes a probe. Before - * executing the probe, DTrace blocks re-scheduling and sets - * a flag in its per-cpu flags to indicate that it doesn't - * want to fault. On returning from the probe, the no-fault - * flag is cleared and finally re-scheduling is enabled. - * - * If the DTrace kernel module has registered a trap handler, - * call it and if it returns non-zero, assume that it has - * handled the trap and modified the trap frame so that this - * function can return normally. - */ - /* - * XXXDTRACE: add pid probe handler here (if ever) - */ - if (!usermode) { - if (dtrace_trap_func != NULL && - (*dtrace_trap_func)(trapframe, type) != 0) - return (trapframe->pc); - } -#endif - - switch (type) { - case T_MCHECK: -#ifdef DDB - kdb_trap(type, 0, trapframe); -#endif - panic("MCHECK\n"); - break; - case T_TLB_MOD: - /* check for kernel address */ - if (KERNLAND(trapframe->badvaddr)) { - if (pmap_emulate_modified(kernel_pmap, - trapframe->badvaddr) != 0) { - ftype = VM_PROT_WRITE; - goto kernel_fault; - } - return (trapframe->pc); - } - /* FALLTHROUGH */ - - case T_TLB_MOD + T_USER: - pmap = &p->p_vmspace->vm_pmap; - if (pmap_emulate_modified(pmap, trapframe->badvaddr) != 0) { - ftype = VM_PROT_WRITE; - goto dofault; - } - if (!usermode) - return (trapframe->pc); - goto out; - - case T_TLB_LD_MISS: - case T_TLB_ST_MISS: - ftype = (type == T_TLB_ST_MISS) ? VM_PROT_WRITE : VM_PROT_READ; - /* check for kernel address */ - if (KERNLAND(trapframe->badvaddr)) { - vm_offset_t va; - int rv; - - kernel_fault: - va = (vm_offset_t)trapframe->badvaddr; - rv = vm_fault_trap(kernel_map, va, ftype, - VM_FAULT_NORMAL, NULL, NULL); - if (rv == KERN_SUCCESS) - return (trapframe->pc); - if (td->td_pcb->pcb_onfault != NULL) { - pc = (register_t)(intptr_t)td->td_pcb->pcb_onfault; - td->td_pcb->pcb_onfault = NULL; - return (pc); - } - goto err; - } - - /* - * It is an error for the kernel to access user space except - * through the copyin/copyout routines. - */ - if (td->td_pcb->pcb_onfault == NULL) - goto err; - - goto dofault; - - case T_TLB_LD_MISS + T_USER: - ftype = VM_PROT_READ; - goto dofault; - - case T_TLB_ST_MISS + T_USER: - ftype = VM_PROT_WRITE; -dofault: - { - vm_offset_t va; - struct vmspace *vm; - vm_map_t map; - int rv = 0; - - vm = p->p_vmspace; - map = &vm->vm_map; - va = (vm_offset_t)trapframe->badvaddr; - if (KERNLAND(trapframe->badvaddr)) { - /* - * Don't allow user-mode faults in kernel - * address space. - */ - goto nogo; - } - - rv = vm_fault_trap(map, va, ftype, VM_FAULT_NORMAL, - &i, &ucode); - /* - * XXXDTRACE: add dtrace_doubletrap_func here? - */ -#ifdef VMFAULT_TRACE - printf("vm_fault(%p (pmap %p), %p (%p), %x, %d) -> %x at pc %p\n", - map, &vm->vm_pmap, (void *)va, (void *)(intptr_t)trapframe->badvaddr, - ftype, VM_FAULT_NORMAL, rv, (void *)(intptr_t)trapframe->pc); -#endif - - if (rv == KERN_SUCCESS) { - if (!usermode) { - return (trapframe->pc); - } - goto out; - } - nogo: - if (!usermode) { - if (td->td_pcb->pcb_onfault != NULL) { - pc = (register_t)(intptr_t)td->td_pcb->pcb_onfault; - td->td_pcb->pcb_onfault = NULL; - return (pc); - } - goto err; - } - addr = trapframe->badvaddr; - - msg = "BAD_PAGE_FAULT"; - log_bad_page_fault(msg, trapframe, type); - - break; - } - - case T_ADDR_ERR_LD + T_USER: /* misaligned or kseg access */ - case T_ADDR_ERR_ST + T_USER: /* misaligned or kseg access */ - if (trapframe->badvaddr < 0 || - trapframe->badvaddr >= VM_MAXUSER_ADDRESS) { - msg = "ADDRESS_SPACE_ERR"; - } else if (allow_unaligned_acc) { - int mode; - - if (type == (T_ADDR_ERR_LD + T_USER)) - mode = VM_PROT_READ; - else - mode = VM_PROT_WRITE; - - access_type = emulate_unaligned_access(trapframe, mode); - if (access_type != 0) - goto out; - msg = "ALIGNMENT_FIX_ERR"; - } else { - msg = "ADDRESS_ERR"; - } - - /* FALL THROUGH */ - - case T_BUS_ERR_IFETCH + T_USER: /* BERR asserted to cpu */ - case T_BUS_ERR_LD_ST + T_USER: /* BERR asserted to cpu */ - ucode = 0; /* XXX should be VM_PROT_something */ - i = SIGBUS; - addr = trapframe->pc; - if (!msg) - msg = "BUS_ERR"; - log_bad_page_fault(msg, trapframe, type); - break; - - case T_SYSCALL + T_USER: - { - syscallenter(td); - -#if !defined(SMP) && (defined(DDB) || defined(DEBUG)) - if (trp == trapdebug) - trapdebug[TRAPSIZE - 1].code = td->td_sa.code; - else - trp[-1].code = td->td_sa.code; -#endif - trapdebug_enter(td->td_frame, -td->td_sa.code); - - /* - * The sync'ing of I & D caches for SYS_ptrace() is - * done by procfs_domem() through procfs_rwmem() - * instead of being done here under a special check - * for SYS_ptrace(). - */ - syscallret(td); - return (trapframe->pc); - } - -#if defined(KDTRACE_HOOKS) || defined(DDB) - case T_BREAK: -#ifdef KDTRACE_HOOKS - if (!usermode && dtrace_invop_jump_addr != NULL && - dtrace_invop_jump_addr(trapframe) == 0) - return (trapframe->pc); -#endif -#ifdef DDB - kdb_trap(type, 0, trapframe); - return (trapframe->pc); -#endif -#endif - - case T_BREAK + T_USER: - { - intptr_t va; - uint32_t instr; - - i = SIGTRAP; - ucode = TRAP_BRKPT; - - /* compute address of break instruction */ - va = trapframe->pc; - if (DELAYBRANCH(trapframe->cause)) - va += sizeof(int); - addr = va; - - if (td->td_md.md_ss_addr != va) - break; - - /* read break instruction */ - instr = fuword32((caddr_t)va); - - if (instr != MIPS_BREAK_SSTEP) - break; - - CTR3(KTR_PTRACE, - "trap: tid %d, single step at %#lx: %#08x", - td->td_tid, va, instr); - PROC_LOCK(p); - _PHOLD(p); - error = ptrace_clear_single_step(td); - _PRELE(p); - PROC_UNLOCK(p); - if (error == 0) - ucode = TRAP_TRACE; - break; - } - - case T_IWATCH + T_USER: - case T_DWATCH + T_USER: - { - intptr_t va; - - /* compute address of trapped instruction */ - va = trapframe->pc; - if (DELAYBRANCH(trapframe->cause)) - va += sizeof(int); - printf("watch exception @ %p\n", (void *)va); - i = SIGTRAP; - ucode = TRAP_BRKPT; - addr = va; - break; - } - - case T_TRAP + T_USER: - { - intptr_t va; - struct trapframe *locr0 = td->td_frame; - - /* compute address of trap instruction */ - va = trapframe->pc; - if (DELAYBRANCH(trapframe->cause)) - va += sizeof(int); - - if (DELAYBRANCH(trapframe->cause)) { /* Check BD bit */ - locr0->pc = MipsEmulateBranch(locr0, trapframe->pc, 0, - 0); - } else { - locr0->pc += sizeof(int); - } - addr = va; - i = SIGEMT; /* Stuff it with something for now */ - break; - } - - case T_RES_INST + T_USER: - { - InstFmt inst; - inst = *(InstFmt *)(intptr_t)trapframe->pc; - switch (inst.RType.op) { - case OP_SPECIAL3: - switch (inst.RType.func) { - case OP_RDHWR: - /* Register 29 used for TLS */ - if (inst.RType.rd == 29) { - frame_regs = &(trapframe->zero); - frame_regs[inst.RType.rt] = (register_t)(intptr_t)td->td_md.md_tls; - frame_regs[inst.RType.rt] += td->td_proc->p_md.md_tls_tcb_offset; - trapframe->pc += sizeof(int); - goto out; - } - break; - } - break; - } - - log_illegal_instruction("RES_INST", trapframe); - i = SIGILL; - addr = trapframe->pc; - } - break; - case T_C2E: - case T_C2E + T_USER: - goto err; - break; - case T_COP_UNUSABLE: -#ifdef CPU_CNMIPS - cop = (trapframe->cause & MIPS_CR_COP_ERR) >> MIPS_CR_COP_ERR_SHIFT; - /* Handle only COP2 exception */ - if (cop != 2) - goto err; - - addr = trapframe->pc; - /* save userland cop2 context if it has been touched */ - if ((td->td_md.md_flags & MDTD_COP2USED) && - (td->td_md.md_cop2owner == COP2_OWNER_USERLAND)) { - if (td->td_md.md_ucop2) - octeon_cop2_save(td->td_md.md_ucop2); - else - panic("COP2 was used in user mode but md_ucop2 is NULL"); - } - - if (td->td_md.md_cop2 == NULL) { - td->td_md.md_cop2 = octeon_cop2_alloc_ctx(); - if (td->td_md.md_cop2 == NULL) - panic("Failed to allocate COP2 context"); - memset(td->td_md.md_cop2, 0, sizeof(*td->td_md.md_cop2)); - } - - octeon_cop2_restore(td->td_md.md_cop2); - - /* Make userland re-request its context */ - td->td_frame->sr &= ~MIPS_SR_COP_2_BIT; - td->td_md.md_flags |= MDTD_COP2USED; - td->td_md.md_cop2owner = COP2_OWNER_KERNEL; - /* Enable COP2, it will be disabled in cpu_switch */ - mips_wr_status(mips_rd_status() | MIPS_SR_COP_2_BIT); - return (trapframe->pc); -#else - goto err; - break; -#endif - - case T_COP_UNUSABLE + T_USER: - cop = (trapframe->cause & MIPS_CR_COP_ERR) >> MIPS_CR_COP_ERR_SHIFT; - if (cop == 1) { - /* FP (COP1) instruction */ - if (cpuinfo.fpu_id == 0) { - log_illegal_instruction("COP1_UNUSABLE", - trapframe); - i = SIGILL; - break; - } - addr = trapframe->pc; - MipsSwitchFPState(PCPU_GET(fpcurthread), td->td_frame); - PCPU_SET(fpcurthread, td); -#if defined(__mips_n32) || defined(__mips_n64) - td->td_frame->sr |= MIPS_SR_COP_1_BIT | MIPS_SR_FR; -#else - td->td_frame->sr |= MIPS_SR_COP_1_BIT; -#endif - td->td_md.md_flags |= MDTD_FPUSED; - goto out; - } -#ifdef CPU_CNMIPS - else if (cop == 2) { - addr = trapframe->pc; - if ((td->td_md.md_flags & MDTD_COP2USED) && - (td->td_md.md_cop2owner == COP2_OWNER_KERNEL)) { - if (td->td_md.md_cop2) - octeon_cop2_save(td->td_md.md_cop2); - else - panic("COP2 was used in kernel mode but md_cop2 is NULL"); - } - - if (td->td_md.md_ucop2 == NULL) { - td->td_md.md_ucop2 = octeon_cop2_alloc_ctx(); - if (td->td_md.md_ucop2 == NULL) - panic("Failed to allocate userland COP2 context"); - memset(td->td_md.md_ucop2, 0, sizeof(*td->td_md.md_ucop2)); - } - - octeon_cop2_restore(td->td_md.md_ucop2); - - td->td_frame->sr |= MIPS_SR_COP_2_BIT; - td->td_md.md_flags |= MDTD_COP2USED; - td->td_md.md_cop2owner = COP2_OWNER_USERLAND; - goto out; - } -#endif - else { - log_illegal_instruction("COPn_UNUSABLE", trapframe); - i = SIGILL; /* only FPU instructions allowed */ - break; - } - - case T_FPE: -#if !defined(SMP) && (defined(DDB) || defined(DEBUG)) - trapDump("fpintr"); -#else - printf("FPU Trap: PC %#jx CR %x SR %x\n", - (intmax_t)trapframe->pc, (unsigned)trapframe->cause, (unsigned)trapframe->sr); - goto err; -#endif - - case T_FPE + T_USER: - if (!emulate_fp) { - i = SIGFPE; - addr = trapframe->pc; - break; - } - MipsFPTrap(trapframe->sr, trapframe->cause, trapframe->pc); - goto out; - - case T_OVFLOW + T_USER: - i = SIGFPE; - addr = trapframe->pc; - break; - - case T_ADDR_ERR_LD: /* misaligned access */ - case T_ADDR_ERR_ST: /* misaligned access */ -#ifdef TRAP_DEBUG - if (trap_debug) { - printf("+++ ADDR_ERR: type = %d, badvaddr = %#jx\n", type, - (intmax_t)trapframe->badvaddr); - } -#endif - /* Only allow emulation on a user address */ - if (allow_unaligned_acc && - ((vm_offset_t)trapframe->badvaddr < VM_MAXUSER_ADDRESS)) { - int mode; - - if (type == T_ADDR_ERR_LD) - mode = VM_PROT_READ; - else - mode = VM_PROT_WRITE; - - access_type = emulate_unaligned_access(trapframe, mode); - if (access_type != 0) - return (trapframe->pc); - } - /* FALLTHROUGH */ - - case T_BUS_ERR_LD_ST: /* BERR asserted to cpu */ - if (td->td_pcb->pcb_onfault != NULL) { - pc = (register_t)(intptr_t)td->td_pcb->pcb_onfault; - td->td_pcb->pcb_onfault = NULL; - return (pc); - } - - /* FALLTHROUGH */ - - default: -err: - -#if !defined(SMP) && defined(DEBUG) - trapDump("trap"); -#endif -#ifdef SMP - printf("cpu:%d-", PCPU_GET(cpuid)); -#endif - printf("Trap cause = %d (%s - ", type, - trap_type[type & (~T_USER)]); - - if (type & T_USER) - printf("user mode)\n"); - else - printf("kernel mode)\n"); - -#ifdef TRAP_DEBUG - if (trap_debug) - printf("badvaddr = %#jx, pc = %#jx, ra = %#jx, sr = %#jxx\n", - (intmax_t)trapframe->badvaddr, (intmax_t)trapframe->pc, (intmax_t)trapframe->ra, - (intmax_t)trapframe->sr); -#endif - -#ifdef KDB - if (debugger_on_trap) { - kdb_why = KDB_WHY_TRAP; - handled = kdb_trap(type, 0, trapframe); - kdb_why = KDB_WHY_UNSET; - if (handled) - return (trapframe->pc); - } -#endif - panic("trap"); - } - td->td_frame->pc = trapframe->pc; - td->td_frame->cause = trapframe->cause; - td->td_frame->badvaddr = trapframe->badvaddr; - ksiginfo_init_trap(&ksi); - ksi.ksi_signo = i; - ksi.ksi_code = ucode; - ksi.ksi_addr = (void *)addr; - ksi.ksi_trapno = type & ~T_USER; - trapsignal(td, &ksi); -out: - - /* - * Note: we should only get here if returning to user mode. - */ - userret(td, trapframe); - return (trapframe->pc); -} - -#if !defined(SMP) && (defined(DDB) || defined(DEBUG)) -void -trapDump(char *msg) -{ - register_t s; - int i; - - s = intr_disable(); - printf("trapDump(%s)\n", msg); - for (i = 0; i < TRAPSIZE; i++) { - if (trp == trapdebug) { - trp = &trapdebug[TRAPSIZE - 1]; - } else { - trp--; - } - - if (trp->cause == 0) - break; - - printf("%s: ADR %jx PC %jx CR %jx SR %jx\n", - trap_type[(trp->cause & MIPS_CR_EXC_CODE) >> - MIPS_CR_EXC_CODE_SHIFT], - (intmax_t)trp->vadr, (intmax_t)trp->pc, - (intmax_t)trp->cause, (intmax_t)trp->status); - - printf(" RA %jx SP %jx code %d\n", (intmax_t)trp->ra, - (intmax_t)trp->sp, (int)trp->code); - } - intr_restore(s); -} -#endif - -/* - * Return the resulting PC as if the branch was executed. - */ -uintptr_t -MipsEmulateBranch(struct trapframe *framePtr, uintptr_t instPC, int fpcCSR, - uintptr_t instptr) -{ - InstFmt inst; - register_t *regsPtr = (register_t *) framePtr; - uintptr_t retAddr = 0; - int condition; - -#define GetBranchDest(InstPtr, inst) \ - (InstPtr + 4 + ((short)inst.IType.imm << 2)) - - if (instptr) { - if (instptr < MIPS_KSEG0_START) - inst.word = fuword32((void *)instptr); - else - inst = *(InstFmt *) instptr; - } else { - if ((vm_offset_t)instPC < MIPS_KSEG0_START) - inst.word = fuword32((void *)instPC); - else - inst = *(InstFmt *) instPC; - } - - switch ((int)inst.JType.op) { - case OP_SPECIAL: - switch ((int)inst.RType.func) { - case OP_JR: - case OP_JALR: - retAddr = regsPtr[inst.RType.rs]; - break; - - default: - retAddr = instPC + 4; - break; - } - break; - - case OP_BCOND: - switch ((int)inst.IType.rt) { - case OP_BLTZ: - case OP_BLTZL: - case OP_BLTZAL: - case OP_BLTZALL: - if ((int)(regsPtr[inst.RType.rs]) < 0) - retAddr = GetBranchDest(instPC, inst); - else - retAddr = instPC + 8; - break; - - case OP_BGEZ: - case OP_BGEZL: - case OP_BGEZAL: - case OP_BGEZALL: - if ((int)(regsPtr[inst.RType.rs]) >= 0) - retAddr = GetBranchDest(instPC, inst); - else - retAddr = instPC + 8; - break; - - case OP_TGEI: - case OP_TGEIU: - case OP_TLTI: - case OP_TLTIU: - case OP_TEQI: - case OP_TNEI: - retAddr = instPC + 4; /* Like syscall... */ - break; - - default: - panic("MipsEmulateBranch: Bad branch cond"); - } - break; - - case OP_J: - case OP_JAL: - retAddr = (inst.JType.target << 2) | - ((unsigned)(instPC + 4) & 0xF0000000); - break; - - case OP_BEQ: - case OP_BEQL: - if (regsPtr[inst.RType.rs] == regsPtr[inst.RType.rt]) - retAddr = GetBranchDest(instPC, inst); - else - retAddr = instPC + 8; - break; - - case OP_BNE: - case OP_BNEL: - if (regsPtr[inst.RType.rs] != regsPtr[inst.RType.rt]) - retAddr = GetBranchDest(instPC, inst); - else - retAddr = instPC + 8; - break; - - case OP_BLEZ: - case OP_BLEZL: - if ((int)(regsPtr[inst.RType.rs]) <= 0) - retAddr = GetBranchDest(instPC, inst); - else - retAddr = instPC + 8; - break; - - case OP_BGTZ: - case OP_BGTZL: - if ((int)(regsPtr[inst.RType.rs]) > 0) - retAddr = GetBranchDest(instPC, inst); - else - retAddr = instPC + 8; - break; - - case OP_COP1: - switch (inst.RType.rs) { - case OP_BCx: - case OP_BCy: - if ((inst.RType.rt & COPz_BC_TF_MASK) == COPz_BC_TRUE) - condition = fpcCSR & MIPS_FPU_COND_BIT; - else - condition = !(fpcCSR & MIPS_FPU_COND_BIT); - if (condition) - retAddr = GetBranchDest(instPC, inst); - else - retAddr = instPC + 8; - break; - - default: - retAddr = instPC + 4; - } - break; - - default: - retAddr = instPC + 4; - } - return (retAddr); -} - -static void -log_frame_dump(struct trapframe *frame) -{ - log(LOG_ERR, "Trapframe Register Dump:\n"); - log(LOG_ERR, "\tzero: %#jx\tat: %#jx\tv0: %#jx\tv1: %#jx\n", - (intmax_t)0, (intmax_t)frame->ast, (intmax_t)frame->v0, (intmax_t)frame->v1); - - log(LOG_ERR, "\ta0: %#jx\ta1: %#jx\ta2: %#jx\ta3: %#jx\n", - (intmax_t)frame->a0, (intmax_t)frame->a1, (intmax_t)frame->a2, (intmax_t)frame->a3); - -#if defined(__mips_n32) || defined(__mips_n64) - log(LOG_ERR, "\ta4: %#jx\ta5: %#jx\ta6: %#jx\ta6: %#jx\n", - (intmax_t)frame->a4, (intmax_t)frame->a5, (intmax_t)frame->a6, (intmax_t)frame->a7); - - log(LOG_ERR, "\tt0: %#jx\tt1: %#jx\tt2: %#jx\tt3: %#jx\n", - (intmax_t)frame->t0, (intmax_t)frame->t1, (intmax_t)frame->t2, (intmax_t)frame->t3); -#else - log(LOG_ERR, "\tt0: %#jx\tt1: %#jx\tt2: %#jx\tt3: %#jx\n", - (intmax_t)frame->t0, (intmax_t)frame->t1, (intmax_t)frame->t2, (intmax_t)frame->t3); - - log(LOG_ERR, "\tt4: %#jx\tt5: %#jx\tt6: %#jx\tt7: %#jx\n", - (intmax_t)frame->t4, (intmax_t)frame->t5, (intmax_t)frame->t6, (intmax_t)frame->t7); -#endif - log(LOG_ERR, "\tt8: %#jx\tt9: %#jx\ts0: %#jx\ts1: %#jx\n", - (intmax_t)frame->t8, (intmax_t)frame->t9, (intmax_t)frame->s0, (intmax_t)frame->s1); - - log(LOG_ERR, "\ts2: %#jx\ts3: %#jx\ts4: %#jx\ts5: %#jx\n", - (intmax_t)frame->s2, (intmax_t)frame->s3, (intmax_t)frame->s4, (intmax_t)frame->s5); - - log(LOG_ERR, "\ts6: %#jx\ts7: %#jx\tk0: %#jx\tk1: %#jx\n", - (intmax_t)frame->s6, (intmax_t)frame->s7, (intmax_t)frame->k0, (intmax_t)frame->k1); - - log(LOG_ERR, "\tgp: %#jx\tsp: %#jx\ts8: %#jx\tra: %#jx\n", - (intmax_t)frame->gp, (intmax_t)frame->sp, (intmax_t)frame->s8, (intmax_t)frame->ra); - - log(LOG_ERR, "\tsr: %#jx\tmullo: %#jx\tmulhi: %#jx\tbadvaddr: %#jx\n", - (intmax_t)frame->sr, (intmax_t)frame->mullo, (intmax_t)frame->mulhi, (intmax_t)frame->badvaddr); - - log(LOG_ERR, "\tcause: %#jx\tpc: %#jx\n", - (intmax_t)frame->cause, (intmax_t)frame->pc); -} - -#ifdef TRAP_DEBUG -static void -trap_frame_dump(struct trapframe *frame) -{ - printf("Trapframe Register Dump:\n"); - printf("\tzero: %#jx\tat: %#jx\tv0: %#jx\tv1: %#jx\n", - (intmax_t)0, (intmax_t)frame->ast, (intmax_t)frame->v0, (intmax_t)frame->v1); - - printf("\ta0: %#jx\ta1: %#jx\ta2: %#jx\ta3: %#jx\n", - (intmax_t)frame->a0, (intmax_t)frame->a1, (intmax_t)frame->a2, (intmax_t)frame->a3); -#if defined(__mips_n32) || defined(__mips_n64) - printf("\ta4: %#jx\ta5: %#jx\ta6: %#jx\ta7: %#jx\n", - (intmax_t)frame->a4, (intmax_t)frame->a5, (intmax_t)frame->a6, (intmax_t)frame->a7); - - printf("\tt0: %#jx\tt1: %#jx\tt2: %#jx\tt3: %#jx\n", - (intmax_t)frame->t0, (intmax_t)frame->t1, (intmax_t)frame->t2, (intmax_t)frame->t3); -#else - printf("\tt0: %#jx\tt1: %#jx\tt2: %#jx\tt3: %#jx\n", - (intmax_t)frame->t0, (intmax_t)frame->t1, (intmax_t)frame->t2, (intmax_t)frame->t3); - - printf("\tt4: %#jx\tt5: %#jx\tt6: %#jx\tt7: %#jx\n", - (intmax_t)frame->t4, (intmax_t)frame->t5, (intmax_t)frame->t6, (intmax_t)frame->t7); -#endif - printf("\tt8: %#jx\tt9: %#jx\ts0: %#jx\ts1: %#jx\n", - (intmax_t)frame->t8, (intmax_t)frame->t9, (intmax_t)frame->s0, (intmax_t)frame->s1); - - printf("\ts2: %#jx\ts3: %#jx\ts4: %#jx\ts5: %#jx\n", - (intmax_t)frame->s2, (intmax_t)frame->s3, (intmax_t)frame->s4, (intmax_t)frame->s5); - - printf("\ts6: %#jx\ts7: %#jx\tk0: %#jx\tk1: %#jx\n", - (intmax_t)frame->s6, (intmax_t)frame->s7, (intmax_t)frame->k0, (intmax_t)frame->k1); - - printf("\tgp: %#jx\tsp: %#jx\ts8: %#jx\tra: %#jx\n", - (intmax_t)frame->gp, (intmax_t)frame->sp, (intmax_t)frame->s8, (intmax_t)frame->ra); - - printf("\tsr: %#jx\tmullo: %#jx\tmulhi: %#jx\tbadvaddr: %#jx\n", - (intmax_t)frame->sr, (intmax_t)frame->mullo, (intmax_t)frame->mulhi, (intmax_t)frame->badvaddr); - - printf("\tcause: %#jx\tpc: %#jx\n", - (intmax_t)frame->cause, (intmax_t)frame->pc); -} - -#endif - -static void -get_mapping_info(vm_offset_t va, pd_entry_t **pdepp, pt_entry_t **ptepp) -{ - pt_entry_t *ptep; - pd_entry_t *pdep; - struct proc *p = curproc; - - pdep = (&(p->p_vmspace->vm_pmap.pm_segtab[(va >> SEGSHIFT) & (NPDEPG - 1)])); - if (*pdep) - ptep = pmap_pte(&p->p_vmspace->vm_pmap, va); - else - ptep = (pt_entry_t *)0; - - *pdepp = pdep; - *ptepp = ptep; -} - -static void -log_illegal_instruction(const char *msg, struct trapframe *frame) -{ - pt_entry_t *ptep; - pd_entry_t *pdep; - unsigned int *addr, instr[4]; - struct thread *td; - struct proc *p; - register_t pc; - - td = curthread; - p = td->td_proc; - -#ifdef SMP - printf("cpuid = %d\n", PCPU_GET(cpuid)); -#endif - pc = frame->pc + (DELAYBRANCH(frame->cause) ? 4 : 0); - log(LOG_ERR, "%s: pid %d tid %ld (%s), uid %d: pc %#jx ra %#jx\n", - msg, p->p_pid, (long)td->td_tid, p->p_comm, - p->p_ucred ? p->p_ucred->cr_uid : -1, - (intmax_t)pc, - (intmax_t)frame->ra); - - /* log registers in trap frame */ - log_frame_dump(frame); - - get_mapping_info((vm_offset_t)pc, &pdep, &ptep); - - /* - * Dump a few words around faulting instruction, if the addres is - * valid. - */ - addr = (unsigned int *)(intptr_t)pc; - if ((pc & 3) == 0 && copyin(addr, instr, sizeof(instr)) == 0) { - /* dump page table entry for faulting instruction */ - log(LOG_ERR, "Page table info for pc address %#jx: pde = %p, pte = %#jx\n", - (intmax_t)pc, (void *)(intptr_t)*pdep, (uintmax_t)(ptep ? *ptep : 0)); - - log(LOG_ERR, "Dumping 4 words starting at pc address %p: \n", - addr); - log(LOG_ERR, "%08x %08x %08x %08x\n", - instr[0], instr[1], instr[2], instr[3]); - } else { - log(LOG_ERR, "pc address %#jx is inaccessible, pde = %p, pte = %#jx\n", - (intmax_t)pc, (void *)(intptr_t)*pdep, (uintmax_t)(ptep ? *ptep : 0)); - } -} - -static void -log_bad_page_fault(char *msg, struct trapframe *frame, int trap_type) -{ - pt_entry_t *ptep; - pd_entry_t *pdep; - unsigned int *addr, instr[4]; - struct thread *td; - struct proc *p; - char *read_or_write; - register_t pc; - - trap_type &= ~T_USER; - - td = curthread; - p = td->td_proc; - -#ifdef SMP - printf("cpuid = %d\n", PCPU_GET(cpuid)); -#endif - switch (trap_type) { - case T_TLB_MOD: - case T_TLB_ST_MISS: - case T_ADDR_ERR_ST: - read_or_write = "write"; - break; - case T_TLB_LD_MISS: - case T_ADDR_ERR_LD: - case T_BUS_ERR_IFETCH: - read_or_write = "read"; - break; - default: - read_or_write = "unknown"; - } - - pc = frame->pc + (DELAYBRANCH(frame->cause) ? 4 : 0); - log(LOG_ERR, "%s: pid %d tid %ld (%s), uid %d: pc %#jx got a %s fault " - "(type %#x) at %#jx\n", - msg, p->p_pid, (long)td->td_tid, p->p_comm, - p->p_ucred ? p->p_ucred->cr_uid : -1, - (intmax_t)pc, - read_or_write, - trap_type, - (intmax_t)frame->badvaddr); - - /* log registers in trap frame */ - log_frame_dump(frame); - - get_mapping_info((vm_offset_t)pc, &pdep, &ptep); - - /* - * Dump a few words around faulting instruction, if the addres is - * valid. - */ - addr = (unsigned int *)(intptr_t)pc; - if ((pc & 3) == 0 && pc != frame->badvaddr && - trap_type != T_BUS_ERR_IFETCH && - copyin((caddr_t)(intptr_t)pc, instr, sizeof(instr)) == 0) { - /* dump page table entry for faulting instruction */ - log(LOG_ERR, "Page table info for pc address %#jx: pde = %p, pte = %#jx\n", - (intmax_t)pc, (void *)(intptr_t)*pdep, (uintmax_t)(ptep ? *ptep : 0)); - - log(LOG_ERR, "Dumping 4 words starting at pc address %p: \n", - addr); - log(LOG_ERR, "%08x %08x %08x %08x\n", - instr[0], instr[1], instr[2], instr[3]); - } else { - log(LOG_ERR, "pc address %#jx is inaccessible, pde = %p, pte = %#jx\n", - (intmax_t)pc, (void *)(intptr_t)*pdep, (uintmax_t)(ptep ? *ptep : 0)); - } - - get_mapping_info((vm_offset_t)frame->badvaddr, &pdep, &ptep); - log(LOG_ERR, "Page table info for bad address %#jx: pde = %p, pte = %#jx\n", - (intmax_t)frame->badvaddr, (void *)(intptr_t)*pdep, (uintmax_t)(ptep ? *ptep : 0)); -} - -/* - * Unaligned load/store emulation - */ -static int -mips_unaligned_load_store(struct trapframe *frame, int mode, register_t addr, register_t pc) -{ - register_t *reg = (register_t *) frame; - u_int32_t inst = *((u_int32_t *)(intptr_t)pc); - register_t value_msb = 0, value = 0; - unsigned size; - - /* - * ADDR_ERR faults have higher priority than TLB - * Miss faults. Therefore, it is necessary to - * verify that the faulting address is a valid - * virtual address within the process' address space - * before trying to emulate the unaligned access. - */ - switch (MIPS_INST_OPCODE(inst)) { - case OP_LHU: case OP_LH: - case OP_SH: - size = 2; - break; - case OP_LWU: case OP_LW: - case OP_SW: - size = 4; - break; - case OP_LD: - case OP_SD: - size = 8; - break; - default: - printf("%s: unhandled opcode in address error: %#x\n", __func__, MIPS_INST_OPCODE(inst)); - return (0); - } - - if (!useracc((void *)rounddown2((vm_offset_t)addr, size), size * 2, mode)) - return (0); - - /* - * XXX - * Handle LL/SC LLD/SCD. - */ - switch (MIPS_INST_OPCODE(inst)) { - case OP_LHU: - KASSERT(mode == VM_PROT_READ, ("access mode must be read for load instruction.")); - lbu_macro(value_msb, addr); - addr += 1; - lbu_macro(value, addr); - value |= value_msb << 8; - reg[MIPS_INST_RT(inst)] = value; - return (MIPS_LHU_ACCESS); - - case OP_LH: - KASSERT(mode == VM_PROT_READ, ("access mode must be read for load instruction.")); - lb_macro(value_msb, addr); - addr += 1; - lbu_macro(value, addr); - value |= value_msb << 8; - reg[MIPS_INST_RT(inst)] = value; - return (MIPS_LH_ACCESS); - - case OP_LWU: - KASSERT(mode == VM_PROT_READ, ("access mode must be read for load instruction.")); - lwl_macro(value, addr); - addr += 3; - lwr_macro(value, addr); - value &= 0xffffffff; - reg[MIPS_INST_RT(inst)] = value; - return (MIPS_LWU_ACCESS); - - case OP_LW: - KASSERT(mode == VM_PROT_READ, ("access mode must be read for load instruction.")); - lwl_macro(value, addr); - addr += 3; - lwr_macro(value, addr); - reg[MIPS_INST_RT(inst)] = value; - return (MIPS_LW_ACCESS); - -#if defined(__mips_n32) || defined(__mips_n64) - case OP_LD: - KASSERT(mode == VM_PROT_READ, ("access mode must be read for load instruction.")); - ldl_macro(value, addr); - addr += 7; - ldr_macro(value, addr); - reg[MIPS_INST_RT(inst)] = value; - return (MIPS_LD_ACCESS); -#endif - - case OP_SH: - KASSERT(mode == VM_PROT_WRITE, ("access mode must be write for store instruction.")); - value = reg[MIPS_INST_RT(inst)]; - value_msb = value >> 8; - sb_macro(value_msb, addr); - addr += 1; - sb_macro(value, addr); - return (MIPS_SH_ACCESS); - - case OP_SW: - KASSERT(mode == VM_PROT_WRITE, ("access mode must be write for store instruction.")); - value = reg[MIPS_INST_RT(inst)]; - swl_macro(value, addr); - addr += 3; - swr_macro(value, addr); - return (MIPS_SW_ACCESS); - -#if defined(__mips_n32) || defined(__mips_n64) - case OP_SD: - KASSERT(mode == VM_PROT_WRITE, ("access mode must be write for store instruction.")); - value = reg[MIPS_INST_RT(inst)]; - sdl_macro(value, addr); - addr += 7; - sdr_macro(value, addr); - return (MIPS_SD_ACCESS); -#endif - } - panic("%s: should not be reached.", __func__); -} - -/* - * XXX TODO: SMP? - */ -static struct timeval unaligned_lasterr; -static int unaligned_curerr; - -static int unaligned_pps_log_limit = 4; - -SYSCTL_INT(_machdep, OID_AUTO, unaligned_log_pps_limit, CTLFLAG_RWTUN, - &unaligned_pps_log_limit, 0, - "limit number of userland unaligned log messages per second"); - -static int -emulate_unaligned_access(struct trapframe *frame, int mode) -{ - register_t pc; - int access_type = 0; - struct thread *td = curthread; - struct proc *p = curproc; - - pc = frame->pc + (DELAYBRANCH(frame->cause) ? 4 : 0); - - /* - * Fall through if it's instruction fetch exception - */ - if (!((pc & 3) || (pc == frame->badvaddr))) { - /* - * Handle unaligned load and store - */ - - /* - * Return access type if the instruction was emulated. - * Otherwise restore pc and fall through. - */ - access_type = mips_unaligned_load_store(frame, - mode, frame->badvaddr, pc); - - if (access_type) { - if (DELAYBRANCH(frame->cause)) - frame->pc = MipsEmulateBranch(frame, frame->pc, - 0, 0); - else - frame->pc += 4; - - if (ppsratecheck(&unaligned_lasterr, - &unaligned_curerr, unaligned_pps_log_limit)) { - /* XXX TODO: keep global/tid/pid counters? */ - log(LOG_INFO, - "Unaligned %s: pid=%ld (%s), tid=%ld, " - "pc=%#jx, badvaddr=%#jx\n", - access_name[access_type - 1], - (long) p->p_pid, - p->p_comm, - (long) td->td_tid, - (intmax_t)pc, - (intmax_t)frame->badvaddr); - } - } - } - return access_type; -} diff --git a/sys/mips/mips/uio_machdep.c b/sys/mips/mips/uio_machdep.c deleted file mode 100644 index 5203076e65e..00000000000 --- a/sys/mips/mips/uio_machdep.c +++ /dev/null @@ -1,145 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2004 Alan L. Cox - * Copyright (c) 1982, 1986, 1991, 1993 - * The Regents of the University of California. All rights reserved. - * (c) UNIX System Laboratories, Inc. - * All or some portions of this file are derived from material licensed - * to the University of California by American Telephone and Telegraph - * Co. or Unix System Laboratories, Inc. and are reproduced herein with - * the permission of UNIX System Laboratories, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)kern_subr.c 8.3 (Berkeley) 1/21/94 - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -/* - * Implement uiomove(9) from physical memory using a combination - * of the direct mapping and sf_bufs to reduce the creation and - * destruction of ephemeral mappings. - */ -int -uiomove_fromphys(vm_page_t ma[], vm_offset_t offset, int n, struct uio *uio) -{ - struct sf_buf *sf; - struct thread *td = curthread; - struct iovec *iov; - void *cp; - vm_offset_t page_offset; - vm_paddr_t pa; - vm_page_t m; - size_t cnt; - int error = 0; - int save = 0; - - KASSERT(uio->uio_rw == UIO_READ || uio->uio_rw == UIO_WRITE, - ("uiomove_fromphys: mode")); - KASSERT(uio->uio_segflg != UIO_USERSPACE || uio->uio_td == curthread, - ("uiomove_fromphys proc")); - save = td->td_pflags & TDP_DEADLKTREAT; - td->td_pflags |= TDP_DEADLKTREAT; - while (n > 0 && uio->uio_resid) { - iov = uio->uio_iov; - cnt = iov->iov_len; - if (cnt == 0) { - uio->uio_iov++; - uio->uio_iovcnt--; - continue; - } - if (cnt > n) - cnt = n; - page_offset = offset & PAGE_MASK; - cnt = ulmin(cnt, PAGE_SIZE - page_offset); - m = ma[offset >> PAGE_SHIFT]; - pa = VM_PAGE_TO_PHYS(m); - if (MIPS_DIRECT_MAPPABLE(pa)) { - sf = NULL; - cp = (char *)MIPS_PHYS_TO_DIRECT(pa) + page_offset; - /* - * flush all mappings to this page, KSEG0 address first - * in order to get it overwritten by correct data - */ - mips_dcache_wbinv_range((vm_offset_t)cp, cnt); - pmap_flush_pvcache(m); - } else { - sf = sf_buf_alloc(m, 0); - cp = (char *)sf_buf_kva(sf) + page_offset; - } - switch (uio->uio_segflg) { - case UIO_USERSPACE: - maybe_yield(); - if (uio->uio_rw == UIO_READ) - error = copyout(cp, iov->iov_base, cnt); - else - error = copyin(iov->iov_base, cp, cnt); - if (error) { - if (sf != NULL) - sf_buf_free(sf); - goto out; - } - break; - case UIO_SYSSPACE: - if (uio->uio_rw == UIO_READ) - bcopy(cp, iov->iov_base, cnt); - else - bcopy(iov->iov_base, cp, cnt); - break; - case UIO_NOCOPY: - break; - } - if (sf != NULL) - sf_buf_free(sf); - else - mips_dcache_wbinv_range((vm_offset_t)cp, cnt); - iov->iov_base = (char *)iov->iov_base + cnt; - iov->iov_len -= cnt; - uio->uio_resid -= cnt; - uio->uio_offset += cnt; - offset += cnt; - n -= cnt; - } -out: - if (save == 0) - td->td_pflags &= ~TDP_DEADLKTREAT; - return (error); -} diff --git a/sys/mips/mips/uma_machdep.c b/sys/mips/mips/uma_machdep.c deleted file mode 100644 index 2069bbc4530..00000000000 --- a/sys/mips/mips/uma_machdep.c +++ /dev/null @@ -1,90 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003 Alan L. Cox - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -void * -uma_small_alloc(uma_zone_t zone, vm_size_t bytes, int domain, u_int8_t *flags, - int wait) -{ - vm_paddr_t pa; - vm_page_t m; - int pflags; - void *va; - - *flags = UMA_SLAB_PRIV; - pflags = malloc2vm_flags(wait) | VM_ALLOC_WIRED; -#ifndef __mips_n64 - pflags &= ~(VM_ALLOC_WAITOK | VM_ALLOC_WAITFAIL); - pflags |= VM_ALLOC_NOWAIT; -#endif - - for (;;) { - m = vm_page_alloc_freelist_domain(domain, VM_FREELIST_DIRECT, - pflags); -#ifndef __mips_n64 - if (m == NULL && vm_page_reclaim_contig(pflags, 1, - 0, MIPS_KSEG0_LARGEST_PHYS, PAGE_SIZE, 0)) - continue; -#endif - if (m != NULL) - break; - if ((wait & M_NOWAIT) != 0) - return (NULL); - vm_wait(NULL); - } - - pa = VM_PAGE_TO_PHYS(m); - if ((wait & M_NODUMP) == 0) - dump_add_page(pa); - va = (void *)MIPS_PHYS_TO_DIRECT(pa); - return (va); -} - -void -uma_small_free(void *mem, vm_size_t size, u_int8_t flags) -{ - vm_page_t m; - vm_paddr_t pa; - - pa = MIPS_DIRECT_TO_PHYS((vm_offset_t)mem); - dump_drop_page(pa); - m = PHYS_TO_VM_PAGE(pa); - vm_page_unwire_noq(m); - vm_page_free(m); -} diff --git a/sys/mips/mips/vm_machdep.c b/sys/mips/mips/vm_machdep.c deleted file mode 100644 index 5f8c85e23da..00000000000 --- a/sys/mips/mips/vm_machdep.c +++ /dev/null @@ -1,604 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1982, 1986 The Regents of the University of California. - * Copyright (c) 1989, 1990 William Jolitz - * Copyright (c) 1994 John Dyson - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department, and William Jolitz. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91 - * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$ - * from: src/sys/i386/i386/vm_machdep.c,v 1.132.2.2 2000/08/26 04:19:26 yokota - * JNPR: vm_machdep.c,v 1.8.2.2 2007/08/16 15:59:17 girish - */ - -#include -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -/* - * Finish a fork operation, with process p2 nearly set up. - * Copy and update the pcb, set up the stack so that the child - * ready to run and return to user mode. - */ -void -cpu_fork(struct thread *td1, struct proc *p2, struct thread *td2, int flags) -{ - struct pcb *pcb2; - - if ((flags & RFPROC) == 0) - return; - /* It is assumed that the vm_thread_alloc called - * cpu_thread_alloc() before cpu_fork is called. - */ - - /* Point the pcb to the top of the stack */ - pcb2 = td2->td_pcb; - - /* Copy td1's pcb, note that in this case - * our pcb also includes the td_frame being copied - * too. The older mips2 code did an additional copy - * of the td_frame, for us that's not needed any - * longer (this copy does them both) - */ - bcopy(td1->td_pcb, pcb2, sizeof(*pcb2)); - - /* Point mdproc and then copy over td1's contents - * md_proc is empty for MIPS - */ - td2->td_md.md_flags = td1->td_md.md_flags & MDTD_FPUSED; - - /* - * Set up return-value registers as fork() libc stub expects. - */ - td2->td_frame->v0 = 0; - td2->td_frame->v1 = 1; - td2->td_frame->a3 = 0; - - if (td1 == PCPU_GET(fpcurthread)) - MipsSaveCurFPState(td1); - - pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline; - /* Make sp 64-bit aligned */ - pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td2->td_pcb & - ~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ); - pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return; - pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td2; - pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td2->td_frame; - pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() & - (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK); - /* - * FREEBSD_DEVELOPERS_FIXME: - * Setup any other CPU-Specific registers (Not MIPS Standard) - * and/or bits in other standard MIPS registers (if CPU-Specific) - * that are needed. - */ - - td2->td_md.md_tls = td1->td_md.md_tls; - p2->p_md.md_tls_tcb_offset = td1->td_proc->p_md.md_tls_tcb_offset; - td2->td_md.md_saved_intr = MIPS_SR_INT_IE; - td2->td_md.md_spinlock_count = 1; -#ifdef CPU_CNMIPS - if (td1->td_md.md_flags & MDTD_COP2USED) { - if (td1->td_md.md_cop2owner == COP2_OWNER_USERLAND) { - if (td1->td_md.md_ucop2) - octeon_cop2_save(td1->td_md.md_ucop2); - else - panic("cpu_fork: ucop2 is NULL but COP2 is enabled"); - } - else { - if (td1->td_md.md_cop2) - octeon_cop2_save(td1->td_md.md_cop2); - else - panic("cpu_fork: cop2 is NULL but COP2 is enabled"); - } - } - - if (td1->td_md.md_cop2) { - td2->td_md.md_cop2 = octeon_cop2_alloc_ctx(); - memcpy(td2->td_md.md_cop2, td1->td_md.md_cop2, - sizeof(*td1->td_md.md_cop2)); - } - if (td1->td_md.md_ucop2) { - td2->td_md.md_ucop2 = octeon_cop2_alloc_ctx(); - memcpy(td2->td_md.md_ucop2, td1->td_md.md_ucop2, - sizeof(*td1->td_md.md_ucop2)); - } - td2->td_md.md_cop2owner = td1->td_md.md_cop2owner; - pcb2->pcb_context[PCB_REG_SR] |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX; - /* Clear COP2 bits for userland & kernel */ - td2->td_frame->sr &= ~MIPS_SR_COP_2_BIT; - pcb2->pcb_context[PCB_REG_SR] &= ~MIPS_SR_COP_2_BIT; -#endif -} - -/* - * Intercept the return address from a freshly forked process that has NOT - * been scheduled yet. - * - * This is needed to make kernel threads stay in kernel mode. - */ -void -cpu_fork_kthread_handler(struct thread *td, void (*func)(void *), void *arg) -{ - /* - * Note that the trap frame follows the args, so the function - * is really called like this: func(arg, frame); - */ - td->td_pcb->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)func; - td->td_pcb->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)arg; -} - -void -cpu_exit(struct thread *td) -{ -} - -void -cpu_thread_exit(struct thread *td) -{ - - if (PCPU_GET(fpcurthread) == td) - PCPU_GET(fpcurthread) = (struct thread *)0; -#ifdef CPU_CNMIPS - if (td->td_md.md_cop2) - memset(td->td_md.md_cop2, 0, - sizeof(*td->td_md.md_cop2)); - if (td->td_md.md_ucop2) - memset(td->td_md.md_ucop2, 0, - sizeof(*td->td_md.md_ucop2)); -#endif -} - -void -cpu_thread_free(struct thread *td) -{ -#ifdef CPU_CNMIPS - if (td->td_md.md_cop2) - octeon_cop2_free_ctx(td->td_md.md_cop2); - if (td->td_md.md_ucop2) - octeon_cop2_free_ctx(td->td_md.md_ucop2); - td->td_md.md_cop2 = NULL; - td->td_md.md_ucop2 = NULL; -#endif -} - -void -cpu_thread_clean(struct thread *td) -{ -} - -void -cpu_thread_swapin(struct thread *td) -{ - pt_entry_t *pte; - int i; - - /* - * The kstack may be at a different physical address now. - * Cache the PTEs for the Kernel stack in the machine dependent - * part of the thread struct so cpu_switch() can quickly map in - * the pcb struct and kernel stack. - */ - for (i = 0; i < KSTACK_PAGES; i++) { - pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE); - td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK; - } -} - -void -cpu_thread_swapout(struct thread *td) -{ -} - -void -cpu_thread_alloc(struct thread *td) -{ - pt_entry_t *pte; - int i; - - KASSERT((td->td_kstack & (1 << PAGE_SHIFT)) == 0, ("kernel stack must be aligned.")); - td->td_pcb = (struct pcb *)(td->td_kstack + - td->td_kstack_pages * PAGE_SIZE) - 1; - td->td_frame = &td->td_pcb->pcb_regs; - - for (i = 0; i < KSTACK_PAGES; i++) { - pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE); - td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK; - } -} - -void -cpu_set_syscall_retval(struct thread *td, int error) -{ - struct trapframe *locr0 = td->td_frame; - unsigned int code; - int quad_syscall; - - code = locr0->v0; - quad_syscall = 0; -#if defined(__mips_n32) || defined(__mips_n64) -#ifdef COMPAT_FREEBSD32 - if (code == SYS___syscall && SV_PROC_FLAG(td->td_proc, SV_ILP32)) - quad_syscall = 1; -#endif -#else - if (code == SYS___syscall) - quad_syscall = 1; -#endif - - if (code == SYS_syscall) - code = locr0->a0; - else if (code == SYS___syscall) { - if (quad_syscall) - code = _QUAD_LOWWORD ? locr0->a1 : locr0->a0; - else - code = locr0->a0; - } - - switch (error) { - case 0: - if (quad_syscall && code != SYS_lseek) { - /* - * System call invoked through the - * SYS___syscall interface but the - * return value is really just 32 - * bits. - */ - locr0->v0 = td->td_retval[0]; - if (_QUAD_LOWWORD) - locr0->v1 = td->td_retval[0]; - locr0->a3 = 0; - } else { - locr0->v0 = td->td_retval[0]; - locr0->v1 = td->td_retval[1]; - locr0->a3 = 0; - } - break; - - case ERESTART: - locr0->pc = td->td_pcb->pcb_tpc; - break; - - case EJUSTRETURN: - break; /* nothing to do */ - - default: - if (quad_syscall && code != SYS_lseek) { - locr0->v0 = error; - if (_QUAD_LOWWORD) - locr0->v1 = error; - locr0->a3 = 1; - } else { - locr0->v0 = error; - locr0->a3 = 1; - } - } -} - -/* - * Initialize machine state, mostly pcb and trap frame for a new - * thread, about to return to userspace. Put enough state in the new - * thread's PCB to get it to go back to the fork_return(), which - * finalizes the thread state and handles peculiarities of the first - * return to userspace for the new thread. - */ -void -cpu_copy_thread(struct thread *td, struct thread *td0) -{ - struct pcb *pcb2; - - /* Point the pcb to the top of the stack. */ - pcb2 = td->td_pcb; - - /* - * Copy the upcall pcb. This loads kernel regs. - * Those not loaded individually below get their default - * values here. - * - * XXXKSE It might be a good idea to simply skip this as - * the values of the other registers may be unimportant. - * This would remove any requirement for knowing the KSE - * at this time (see the matching comment below for - * more analysis) (need a good safe default). - * In MIPS, the trapframe is the first element of the PCB - * and gets copied when we copy the PCB. No separate copy - * is needed. - */ - bcopy(td0->td_pcb, pcb2, sizeof(*pcb2)); - - /* - * Set registers for trampoline to user mode. - */ - - pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline; - /* Make sp 64-bit aligned */ - pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td->td_pcb & - ~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ); - pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return; - pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td; - pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td->td_frame; - /* Dont set IE bit in SR. sched lock release will take care of it */ - pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() & - (MIPS_SR_PX | MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK); - - /* - * FREEBSD_DEVELOPERS_FIXME: - * Setup any other CPU-Specific registers (Not MIPS Standard) - * that are needed. - */ - - /* Setup to release spin count in in fork_exit(). */ - td->td_md.md_spinlock_count = 1; - td->td_md.md_saved_intr = MIPS_SR_INT_IE; -#if 0 - /* Maybe we need to fix this? */ - td->td_md.md_saved_sr = ( (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT) | - (MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX) | - (MIPS_SR_INT_IE | MIPS_HARD_INT_MASK)); -#endif - td->td_md.md_tls = NULL; -} - -/* - * Set that machine state for performing an upcall that starts - * the entry function with the given argument. - */ -int -cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg, - stack_t *stack) -{ - struct trapframe *tf; - register_t sp, sr; - - sp = (((intptr_t)stack->ss_sp + stack->ss_size) & ~(STACK_ALIGN - 1)) - - CALLFRAME_SIZ; - - /* - * Set the trap frame to point at the beginning of the uts - * function. - */ - tf = td->td_frame; - sr = tf->sr; - bzero(tf, sizeof(struct trapframe)); - tf->sp = sp; - tf->sr = sr; - tf->pc = (register_t)(intptr_t)entry; - /* - * MIPS ABI requires T9 to be the same as PC - * in subroutine entry point - */ - tf->t9 = (register_t)(intptr_t)entry; - tf->a0 = (register_t)(intptr_t)arg; - - /* - * FREEBSD_DEVELOPERS_FIXME: - * Setup any other CPU-Specific registers (Not MIPS Standard) - * that are needed. - */ - return (0); -} - -bool -cpu_exec_vmspace_reuse(struct proc *p __unused, vm_map_t map __unused) -{ - - return (true); -} - -int -cpu_procctl(struct thread *td __unused, int idtype __unused, id_t id __unused, - int com __unused, void *data __unused) -{ - - return (EINVAL); -} - -int -cpu_set_user_tls(struct thread *td, void *tls_base) -{ - - td->td_md.md_tls = (char*)tls_base; - if (td == curthread && cpuinfo.userlocal_reg == true) { - mips_wr_userlocal((unsigned long)tls_base + - td->td_proc->p_md.md_tls_tcb_offset); - } - - return (0); -} - -void -cpu_sync_core(void) -{ -} - -#ifdef DDB -#include - -#define DB_PRINT_REG(ptr, regname) \ - db_printf(" %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->regname)) - -#define DB_PRINT_REG_ARRAY(ptr, arrname, regname) \ - db_printf(" %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->arrname[regname])) - -static void -dump_trapframe(struct trapframe *trapframe) -{ - - db_printf("Trapframe at %p\n", trapframe); - - DB_PRINT_REG(trapframe, zero); - DB_PRINT_REG(trapframe, ast); - DB_PRINT_REG(trapframe, v0); - DB_PRINT_REG(trapframe, v1); - DB_PRINT_REG(trapframe, a0); - DB_PRINT_REG(trapframe, a1); - DB_PRINT_REG(trapframe, a2); - DB_PRINT_REG(trapframe, a3); -#if defined(__mips_n32) || defined(__mips_n64) - DB_PRINT_REG(trapframe, a4); - DB_PRINT_REG(trapframe, a5); - DB_PRINT_REG(trapframe, a6); - DB_PRINT_REG(trapframe, a7); - DB_PRINT_REG(trapframe, t0); - DB_PRINT_REG(trapframe, t1); - DB_PRINT_REG(trapframe, t2); - DB_PRINT_REG(trapframe, t3); -#else - DB_PRINT_REG(trapframe, t0); - DB_PRINT_REG(trapframe, t1); - DB_PRINT_REG(trapframe, t2); - DB_PRINT_REG(trapframe, t3); - DB_PRINT_REG(trapframe, t4); - DB_PRINT_REG(trapframe, t5); - DB_PRINT_REG(trapframe, t6); - DB_PRINT_REG(trapframe, t7); -#endif - DB_PRINT_REG(trapframe, s0); - DB_PRINT_REG(trapframe, s1); - DB_PRINT_REG(trapframe, s2); - DB_PRINT_REG(trapframe, s3); - DB_PRINT_REG(trapframe, s4); - DB_PRINT_REG(trapframe, s5); - DB_PRINT_REG(trapframe, s6); - DB_PRINT_REG(trapframe, s7); - DB_PRINT_REG(trapframe, t8); - DB_PRINT_REG(trapframe, t9); - DB_PRINT_REG(trapframe, k0); - DB_PRINT_REG(trapframe, k1); - DB_PRINT_REG(trapframe, gp); - DB_PRINT_REG(trapframe, sp); - DB_PRINT_REG(trapframe, s8); - DB_PRINT_REG(trapframe, ra); - DB_PRINT_REG(trapframe, sr); - DB_PRINT_REG(trapframe, mullo); - DB_PRINT_REG(trapframe, mulhi); - DB_PRINT_REG(trapframe, badvaddr); - DB_PRINT_REG(trapframe, cause); - DB_PRINT_REG(trapframe, pc); -} - -DB_SHOW_COMMAND(pcb, ddb_dump_pcb) -{ - struct thread *td; - struct pcb *pcb; - struct trapframe *trapframe; - - /* Determine which thread to examine. */ - if (have_addr) - td = db_lookup_thread(addr, true); - else - td = curthread; - - pcb = td->td_pcb; - - db_printf("Thread %d at %p\n", td->td_tid, td); - - db_printf("PCB at %p\n", pcb); - - trapframe = &pcb->pcb_regs; - dump_trapframe(trapframe); - - db_printf("PCB Context:\n"); - DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S0); - DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S1); - DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S2); - DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S3); - DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S4); - DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S5); - DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S6); - DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S7); - DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SP); - DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S8); - DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_RA); - DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SR); - DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_GP); - DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_PC); - - db_printf("PCB onfault = %p\n", pcb->pcb_onfault); - db_printf("md_saved_intr = 0x%0lx\n", (long)td->td_md.md_saved_intr); - db_printf("md_spinlock_count = %d\n", td->td_md.md_spinlock_count); - - if (td->td_frame != trapframe) { - db_printf("td->td_frame %p is not the same as pcb_regs %p\n", - td->td_frame, trapframe); - } -} - -/* - * Dump the trapframe beginning at address specified by first argument. - */ -DB_SHOW_COMMAND(trapframe, ddb_dump_trapframe) -{ - - if (!have_addr) - return; - - dump_trapframe((struct trapframe *)addr); -} - -#endif /* DDB */ diff --git a/sys/mips/nlm/board.c b/sys/mips/nlm/board.c deleted file mode 100644 index b050c5095d4..00000000000 --- a/sys/mips/nlm/board.c +++ /dev/null @@ -1,537 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -static uint8_t board_eeprom_buf[EEPROM_SIZE]; -static int board_eeprom_set; - -struct xlp_board_info xlp_board_info; - -struct vfbid_tbl { - int vfbid; - int dest_vc; -}; - -/* XXXJC : this should be derived from msg thread mask */ -static struct vfbid_tbl nlm_vfbid[] = { - /* NULL FBID should map to cpu0 to detect NAE send msg errors */ - {127, 0}, /* NAE <-> NAE mappings */ - {51, 1019}, {50, 1018}, {49, 1017}, {48, 1016}, - {47, 1015}, {46, 1014}, {45, 1013}, {44, 1012}, - {43, 1011}, {42, 1010}, {41, 1009}, {40, 1008}, - {39, 1007}, {38, 1006}, {37, 1005}, {36, 1004}, - {35, 1003}, {34, 1002}, {33, 1001}, {32, 1000}, - /* NAE <-> CPU mappings, freeback got to vc 3 of each thread */ - {31, 127}, {30, 123}, {29, 119}, {28, 115}, - {27, 111}, {26, 107}, {25, 103}, {24, 99}, - {23, 95}, {22, 91}, {21, 87}, {20, 83}, - {19, 79}, {18, 75}, {17, 71}, {16, 67}, - {15, 63}, {14, 59}, {13, 55}, {12, 51}, - {11, 47}, {10, 43}, { 9, 39}, { 8, 35}, - { 7, 31}, { 6, 27}, { 5, 23}, { 4, 19}, - { 3, 15}, { 2, 11}, { 1, 7}, { 0, 3}, -}; - -static struct vfbid_tbl nlm3xx_vfbid[] = { - /* NULL FBID should map to cpu0 to detect NAE send msg errors */ - {127, 0}, /* NAE <-> NAE mappings */ - {39, 503}, {38, 502}, {37, 501}, {36, 500}, - {35, 499}, {34, 498}, {33, 497}, {32, 496}, - /* NAE <-> CPU mappings, freeback got to vc 3 of each thread */ - {31, 127}, {30, 123}, {29, 119}, {28, 115}, - {27, 111}, {26, 107}, {25, 103}, {24, 99}, - {23, 95}, {22, 91}, {21, 87}, {20, 83}, - {19, 79}, {18, 75}, {17, 71}, {16, 67}, - {15, 63}, {14, 59}, {13, 55}, {12, 51}, - {11, 47}, {10, 43}, { 9, 39}, { 8, 35}, - { 7, 31}, { 6, 27}, { 5, 23}, { 4, 19}, - { 3, 15}, { 2, 11}, { 1, 7}, { 0, 3}, -}; - -int -nlm_get_vfbid_mapping(int vfbid) -{ - int i, nentries; - struct vfbid_tbl *p; - - if (nlm_is_xlp3xx()) { - nentries = nitems(nlm3xx_vfbid); - p = nlm3xx_vfbid; - } else { - nentries = nitems(nlm_vfbid); - p = nlm_vfbid; - } - - for (i = 0; i < nentries; i++) { - if (p[i].vfbid == vfbid) - return (p[i].dest_vc); - } - - return (-1); -} - -int -nlm_get_poe_distvec(int vec, uint32_t *distvec) -{ - - if (vec != 0) - return (-1); /* we support just vec 0 */ - nlm_calc_poe_distvec(xlp_msg_thread_mask, 0, 0, 0, - 0x1 << XLPGE_RX_VC, distvec); - return (0); -} - -/* - * All our knowledge of chip and board that cannot be detected by probing - * at run-time goes here - */ - -void -xlpge_get_macaddr(uint8_t *macaddr) -{ - - if (board_eeprom_set == 0) { - /* No luck, take some reasonable value */ - macaddr[0] = 0x00; macaddr[1] = 0x0f; macaddr[2] = 0x30; - macaddr[3] = 0x20; macaddr[4] = 0x0d; macaddr[5] = 0x5b; - } else - memcpy(macaddr, &board_eeprom_buf[EEPROM_MACADDR_OFFSET], - ETHER_ADDR_LEN); -} - -static void -nlm_setup_port_defaults(struct xlp_port_ivars *p) -{ - p->loopback_mode = 0; - p->num_channels = 1; - p->free_desc_sizes = 2048; - p->vlan_pri_en = 0; - p->hw_parser_en = 1; - p->ieee1588_userval = 0; - p->ieee1588_ptpoff = 0; - p->ieee1588_tmr1 = 0; - p->ieee1588_tmr2 = 0; - p->ieee1588_tmr3 = 0; - p->ieee1588_inc_intg = 0; - p->ieee1588_inc_den = 1; - p->ieee1588_inc_num = 1; - - if (nlm_is_xlp3xx()) { - p->stg2_fifo_size = XLP3XX_STG2_FIFO_SZ; - p->eh_fifo_size = XLP3XX_EH_FIFO_SZ; - p->frout_fifo_size = XLP3XX_FROUT_FIFO_SZ; - p->ms_fifo_size = XLP3XX_MS_FIFO_SZ; - p->pkt_fifo_size = XLP3XX_PKT_FIFO_SZ; - p->pktlen_fifo_size = XLP3XX_PKTLEN_FIFO_SZ; - p->max_stg2_offset = XLP3XX_MAX_STG2_OFFSET; - p->max_eh_offset = XLP3XX_MAX_EH_OFFSET; - p->max_frout_offset = XLP3XX_MAX_FREE_OUT_OFFSET; - p->max_ms_offset = XLP3XX_MAX_MS_OFFSET; - p->max_pmem_offset = XLP3XX_MAX_PMEM_OFFSET; - p->stg1_2_credit = XLP3XX_STG1_2_CREDIT; - p->stg2_eh_credit = XLP3XX_STG2_EH_CREDIT; - p->stg2_frout_credit = XLP3XX_STG2_FROUT_CREDIT; - p->stg2_ms_credit = XLP3XX_STG2_MS_CREDIT; - } else { - p->stg2_fifo_size = XLP8XX_STG2_FIFO_SZ; - p->eh_fifo_size = XLP8XX_EH_FIFO_SZ; - p->frout_fifo_size = XLP8XX_FROUT_FIFO_SZ; - p->ms_fifo_size = XLP8XX_MS_FIFO_SZ; - p->pkt_fifo_size = XLP8XX_PKT_FIFO_SZ; - p->pktlen_fifo_size = XLP8XX_PKTLEN_FIFO_SZ; - p->max_stg2_offset = XLP8XX_MAX_STG2_OFFSET; - p->max_eh_offset = XLP8XX_MAX_EH_OFFSET; - p->max_frout_offset = XLP8XX_MAX_FREE_OUT_OFFSET; - p->max_ms_offset = XLP8XX_MAX_MS_OFFSET; - p->max_pmem_offset = XLP8XX_MAX_PMEM_OFFSET; - p->stg1_2_credit = XLP8XX_STG1_2_CREDIT; - p->stg2_eh_credit = XLP8XX_STG2_EH_CREDIT; - p->stg2_frout_credit = XLP8XX_STG2_FROUT_CREDIT; - p->stg2_ms_credit = XLP8XX_STG2_MS_CREDIT; - } - - switch (p->type) { - case SGMIIC: - p->num_free_descs = 52; - p->iface_fifo_size = 13; - p->rxbuf_size = 128; - p->rx_slots_reqd = SGMII_CAL_SLOTS; - p->tx_slots_reqd = SGMII_CAL_SLOTS; - if (nlm_is_xlp3xx()) - p->pseq_fifo_size = 30; - else - p->pseq_fifo_size = 62; - break; - case ILC: - p->num_free_descs = 150; - p->rxbuf_size = 944; - p->rx_slots_reqd = IL8_CAL_SLOTS; - p->tx_slots_reqd = IL8_CAL_SLOTS; - p->pseq_fifo_size = 225; - p->iface_fifo_size = 55; - break; - case XAUIC: - default: - p->num_free_descs = 150; - p->rxbuf_size = 944; - p->rx_slots_reqd = XAUI_CAL_SLOTS; - p->tx_slots_reqd = XAUI_CAL_SLOTS; - if (nlm_is_xlp3xx()) { - p->pseq_fifo_size = 120; - p->iface_fifo_size = 52; - } else { - p->pseq_fifo_size = 225; - p->iface_fifo_size = 55; - } - break; - } -} - -/* XLP 8XX evaluation boards have the following phy-addr - * assignment. There are two external mdio buses in XLP -- - * bus 0 and bus 1. The management ports (16 and 17) are - * on mdio bus 0 while blocks/complexes[0 to 3] are all - * on mdio bus 1. The phy_addr on bus 0 (mgmt ports 16 - * and 17) match the port numbers. - * These are the details: - * block port phy_addr mdio_bus - * ==================================== - * 0 0 4 1 - * 0 1 7 1 - * 0 2 6 1 - * 0 3 5 1 - * 1 0 8 1 - * 1 1 11 1 - * 1 2 10 1 - * 1 3 9 1 - * 2 0 0 1 - * 2 1 3 1 - * 2 2 2 1 - * 2 3 1 1 - * 3 0 12 1 - * 3 1 15 1 - * 3 2 14 1 - * 3 3 13 1 - * - * 4 0 16 0 - * 4 1 17 0 - * - * The XLP 3XX evaluation boards have the following phy-addr - * assignments. - * block port phy_addr mdio_bus - * ==================================== - * 0 0 4 0 - * 0 1 7 0 - * 0 2 6 0 - * 0 3 5 0 - * 1 0 8 0 - * 1 1 11 0 - * 1 2 10 0 - * 1 3 9 0 - */ -static void -nlm_board_get_phyaddr(int block, int port, int *phyaddr) -{ - switch (block) { - case 0: switch (port) { - case 0: *phyaddr = 4; break; - case 1: *phyaddr = 7; break; - case 2: *phyaddr = 6; break; - case 3: *phyaddr = 5; break; - } - break; - case 1: switch (port) { - case 0: *phyaddr = 8; break; - case 1: *phyaddr = 11; break; - case 2: *phyaddr = 10; break; - case 3: *phyaddr = 9; break; - } - break; - case 2: switch (port) { - case 0: *phyaddr = 0; break; - case 1: *phyaddr = 3; break; - case 2: *phyaddr = 2; break; - case 3: *phyaddr = 1; break; - } - break; - case 3: switch (port) { - case 0: *phyaddr = 12; break; - case 1: *phyaddr = 15; break; - case 2: *phyaddr = 14; break; - case 3: *phyaddr = 13; break; - } - break; - case 4: switch (port) { /* management SGMII */ - case 0: *phyaddr = 16; break; - case 1: *phyaddr = 17; break; - } - break; - } -} - -static void -nlm_print_processor_info(void) -{ - uint32_t procid; - int prid, rev; - char *chip, *revstr; - - procid = mips_rd_prid(); - prid = (procid >> 8) & 0xff; - rev = procid & 0xff; - - switch (prid) { - case CHIP_PROCESSOR_ID_XLP_8XX: - chip = "XLP 832"; - break; - case CHIP_PROCESSOR_ID_XLP_3XX: - chip = "XLP 3xx"; - break; - case CHIP_PROCESSOR_ID_XLP_432: - case CHIP_PROCESSOR_ID_XLP_416: - chip = "XLP 4xx"; - break; - default: - chip = "XLP ?xx"; - break; - } - switch (rev) { - case 0: - revstr = "A0"; break; - case 1: - revstr = "A1"; break; - case 2: - revstr = "A2"; break; - case 3: - revstr = "B0"; break; - case 4: - revstr = "B1"; break; - default: - revstr = "??"; break; - } - - printf("Processor info:\n"); - printf(" Netlogic %s %s [%x]\n", chip, revstr, procid); -} - -/* - * All our knowledge of chip and board that cannot be detected by probing - * at run-time goes here - */ -static int -nlm_setup_xlp_board(int node) -{ - struct xlp_board_info *boardp; - struct xlp_node_info *nodep; - struct xlp_nae_ivars *naep; - struct xlp_block_ivars *blockp; - struct xlp_port_ivars *portp; - uint64_t cpldbase, nae_pcibase; - int block, port, rv, dbtype, usecpld = 0, evp = 0, svp = 0; - uint8_t *b; - - /* start with a clean slate */ - boardp = &xlp_board_info; - if (boardp->nodemask == 0) - memset(boardp, 0, sizeof(xlp_board_info)); - boardp->nodemask |= (1 << node); - nlm_print_processor_info(); - - b = board_eeprom_buf; - rv = nlm_board_eeprom_read(node, EEPROM_I2CBUS, EEPROM_I2CADDR, 0, b, - EEPROM_SIZE); - if (rv == 0) { - board_eeprom_set = 1; - printf("Board info (EEPROM on i2c@%d at %#X):\n", - EEPROM_I2CBUS, EEPROM_I2CADDR); - printf(" Model: %7.7s %2.2s\n", &b[16], &b[24]); - printf(" Serial #: %3.3s-%2.2s\n", &b[27], &b[31]); - printf(" MAC addr: %02x:%02x:%02x:%02x:%02x:%02x\n", - b[2], b[3], b[4], b[5], b[6], b[7]); - } else - printf("Board Info: Error on EEPROM read (i2c@%d %#X).\n", - EEPROM_I2CBUS, EEPROM_I2CADDR); - - nae_pcibase = nlm_get_nae_pcibase(node); - nodep = &boardp->nodes[node]; - naep = &nodep->nae_ivars; - naep->node = node; - - /* frequency at which network block runs */ - naep->freq = 500; - - /* CRC16 polynomial used for flow table generation */ - naep->flow_crc_poly = 0xffff; - naep->hw_parser_en = 1; - naep->prepad_en = 1; - naep->prepad_size = 3; /* size in 16 byte units */ - naep->ieee_1588_en = 1; - - naep->ilmask = 0x0; /* set this based on daughter card */ - naep->xauimask = 0x0; /* set this based on daughter card */ - naep->sgmiimask = 0x0; /* set this based on daughter card */ - naep->nblocks = nae_num_complex(nae_pcibase); - if (strncmp(&b[16], "PCIE", 4) == 0) { - usecpld = 0; /* XLP PCIe card */ - /* Broadcom's XLP PCIe card has the following - * blocks fixed. - * blk 0-XAUI, 1-XAUI, 4-SGMII(one port) */ - naep->blockmask = 0x13; - } else if (strncmp(&b[16], "MB-EVP", 6) == 0) { - usecpld = 1; /* XLP non-PCIe card which has CPLD */ - evp = 1; - naep->blockmask = (1 << naep->nblocks) - 1; - } else if ((strncmp(&b[16], "MB-S", 4) == 0) || - (strncmp(&b[16], "MB_S", 4) == 0)) { - usecpld = 1; /* XLP non-PCIe card which has CPLD */ - svp = 1; - /* 3xx chip reports one block extra which is a bug */ - naep->nblocks = naep->nblocks - 1; - naep->blockmask = (1 << naep->nblocks) - 1; - } else { - printf("ERROR!!! Board type:%7s didn't match any board" - " type we support\n", &b[16]); - return (-1); - } - cpldbase = nlm_board_cpld_base(node, XLP_EVB_CPLD_CHIPSELECT); - - /* pretty print network config */ - printf("Network config"); - if (usecpld) - printf("(from CPLD@%d):\n", XLP_EVB_CPLD_CHIPSELECT); - else - printf("(defaults):\n"); - printf(" NAE@%d Blocks: ", node); - for (block = 0; block < naep->nblocks; block++) { - char *s = "???"; - - if ((naep->blockmask & (1 << block)) == 0) - continue; - blockp = &naep->block_ivars[block]; - blockp->block = block; - if (usecpld) - dbtype = nlm_board_cpld_dboard_type(cpldbase, block); - else - dbtype = DCARD_XAUI; /* default XAUI */ - - /* XLP PCIe cards */ - if ((!evp && !svp) && ((block == 2) || (block == 3))) - dbtype = DCARD_NOT_PRSNT; - - if (block == 4) { - /* management block 4 on 8xx or XLP PCIe */ - blockp->type = SGMIIC; - if (evp) - blockp->portmask = 0x3; - else - blockp->portmask = 0x1; - naep->sgmiimask |= (1 << block); - } else { - switch (dbtype) { - case DCARD_ILAKEN: - blockp->type = ILC; - blockp->portmask = 0x1; - naep->ilmask |= (1 << block); - break; - case DCARD_SGMII: - blockp->type = SGMIIC; - blockp->portmask = 0xf; - naep->sgmiimask |= (1 << block); - break; - case DCARD_XAUI: - blockp->type = XAUIC; - blockp->portmask = 0x1; - naep->xauimask |= (1 << block); - break; - default: /* DCARD_NOT_PRSNT */ - blockp->type = UNKNOWN; - blockp->portmask = 0; - break; - } - } - if (blockp->type != UNKNOWN) { - for (port = 0; port < PORTS_PER_CMPLX; port++) { - if ((blockp->portmask & (1 << port)) == 0) - continue; - portp = &blockp->port_ivars[port]; - nlm_board_get_phyaddr(block, port, - &portp->phy_addr); - if (svp || (block == 4)) - portp->mdio_bus = 0; - else - portp->mdio_bus = 1; - portp->port = port; - portp->block = block; - portp->node = node; - portp->type = blockp->type; - nlm_setup_port_defaults(portp); - } - } - switch (blockp->type) { - case SGMIIC : s = "SGMII"; break; - case XAUIC : s = "XAUI"; break; - case ILC : s = "IL"; break; - } - printf(" [%d %s]", block, s); - } - printf("\n"); - return (0); -} - -int nlm_board_info_setup(void) -{ - if (nlm_setup_xlp_board(0) != 0) - return (-1); - return (0); -} diff --git a/sys/mips/nlm/board.h b/sys/mips/nlm/board.h deleted file mode 100644 index f7a1c1f420a..00000000000 --- a/sys/mips/nlm/board.h +++ /dev/null @@ -1,158 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef __NLM_BOARD_H__ -#define __NLM_BOARD_H__ - -#define XLP_NAE_NBLOCKS 5 -#define XLP_NAE_NPORTS 4 - -/* - * EVP board EEPROM info - */ -#define EEPROM_I2CBUS 1 -#define EEPROM_I2CADDR 0xAE -#define EEPROM_SIZE 48 -#define EEPROM_MACADDR_OFFSET 2 - -/* used if there is no FDT */ -#define BOARD_CONSOLE_SPEED 115200 -#define BOARD_CONSOLE_UART 0 - -/* - * EVP board CPLD chip select and daughter card info field - */ -#define XLP_EVB_CPLD_CHIPSELECT 2 - -#define DCARD_ILAKEN 0x0 -#define DCARD_SGMII 0x1 -#define DCARD_XAUI 0x2 -#define DCARD_NOT_PRSNT 0x3 - -#if !defined(LOCORE) && !defined(__ASSEMBLY__) -/* - * NAE configuration - */ - -struct xlp_port_ivars { - int port; - int block; - int node; - int type; - int phy_addr; - int mdio_bus; - int loopback_mode; - int num_channels; - int free_desc_sizes; - int num_free_descs; - int pseq_fifo_size; - int iface_fifo_size; - int rxbuf_size; - int rx_slots_reqd; - int tx_slots_reqd; - int vlan_pri_en; - int stg2_fifo_size; - int eh_fifo_size; - int frout_fifo_size; - int ms_fifo_size; - int pkt_fifo_size; - int pktlen_fifo_size; - int max_stg2_offset; - int max_eh_offset; - int max_frout_offset; - int max_ms_offset; - int max_pmem_offset; - int stg1_2_credit; - int stg2_eh_credit; - int stg2_frout_credit; - int stg2_ms_credit; - int hw_parser_en; - u_int ieee1588_inc_intg; - u_int ieee1588_inc_den; - u_int ieee1588_inc_num; - uint64_t ieee1588_userval; - uint64_t ieee1588_ptpoff; - uint64_t ieee1588_tmr1; - uint64_t ieee1588_tmr2; - uint64_t ieee1588_tmr3; -}; - -struct xlp_block_ivars { - int block; - int type; - u_int portmask; - struct xlp_port_ivars port_ivars[XLP_NAE_NPORTS]; -}; - -struct xlp_nae_ivars { - int node; - int nblocks; - u_int blockmask; - u_int ilmask; - u_int xauimask; - u_int sgmiimask; - int freq; - u_int flow_crc_poly; - u_int hw_parser_en; - u_int prepad_en; - u_int prepad_size; /* size in 16 byte units */ - u_int ieee_1588_en; - struct xlp_block_ivars block_ivars[XLP_NAE_NBLOCKS]; -}; - -struct xlp_board_info { - u_int nodemask; - struct xlp_node_info { - struct xlp_nae_ivars nae_ivars; - } nodes[XLP_MAX_NODES]; -}; - -extern struct xlp_board_info xlp_board_info; - -/* Network configuration */ -int nlm_get_vfbid_mapping(int); -int nlm_get_poe_distvec(int vec, uint32_t *distvec); -void xlpge_get_macaddr(uint8_t *macaddr); - -int nlm_board_info_setup(void); - -/* EEPROM & CPLD */ -int nlm_board_eeprom_read(int node, int i2cbus, int addr, int offs, - uint8_t *buf,int sz); -uint64_t nlm_board_cpld_base(int node, int chipselect); -int nlm_board_cpld_majorversion(uint64_t cpldbase); -int nlm_board_cpld_minorversion(uint64_t cpldbase); -void nlm_board_cpld_reset(uint64_t cpldbase); -int nlm_board_cpld_dboard_type(uint64_t cpldbase, int slot); - -#endif -#endif diff --git a/sys/mips/nlm/board_cpld.c b/sys/mips/nlm/board_cpld.c deleted file mode 100644 index 0f6c734434b..00000000000 --- a/sys/mips/nlm/board_cpld.c +++ /dev/null @@ -1,114 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include - -#include -#include -#include -#include - -#include - -#define CPLD_REVISION 0x0 -#define CPLD_RESET 0x1 -#define CPLD_CTRL 0x2 -#define CPLD_RSVD 0x3 -#define CPLD_PWR_CTRL 0x4 -#define CPLD_MISC 0x5 -#define CPLD_CTRL_STATUS 0x6 -#define CPLD_PWR_INTR_STATUS 0x7 -#define CPLD_DATA 0x8 - -static __inline -int nlm_cpld_read(uint64_t base, int reg) -{ - uint16_t val; - - val = *(volatile uint16_t *)(long)(base + reg * 2); - return le16toh(val); -} - -static __inline void -nlm_cpld_write(uint64_t base, int reg, uint16_t data) -{ - data = htole16(data); - *(volatile uint16_t *)(long)(base + reg * 2) = data; -} - -int -nlm_board_cpld_majorversion(uint64_t base) -{ - return (nlm_cpld_read(base, CPLD_REVISION) >> 8); -} - -int -nlm_board_cpld_minorversion(uint64_t base) -{ - return (nlm_cpld_read(base, CPLD_REVISION) & 0xff); -} - -uint64_t nlm_board_cpld_base(int node, int chipselect) -{ - uint64_t gbubase, cpld_phys; - - gbubase = nlm_get_gbu_regbase(node); - cpld_phys = nlm_read_gbu_reg(gbubase, GBU_CS_BASEADDR(chipselect)); - return (MIPS_PHYS_TO_KSEG1(cpld_phys << 8)); -} - -void -nlm_board_cpld_reset(uint64_t base) -{ - - nlm_cpld_write(base, CPLD_RESET, 1 << 15); - for(;;) - __asm __volatile("wait"); -} - -/* get daughter board type */ -int -nlm_board_cpld_dboard_type(uint64_t base, int slot) -{ - uint16_t val; - int shift = 0; - - switch (slot) { - case 0: shift = 0; break; - case 1: shift = 4; break; - case 2: shift = 2; break; - case 3: shift = 6; break; - } - val = nlm_cpld_read(base, CPLD_CTRL_STATUS) >> shift; - return (val & 0x3); -} diff --git a/sys/mips/nlm/board_eeprom.c b/sys/mips/nlm/board_eeprom.c deleted file mode 100644 index 9a85d5de579..00000000000 --- a/sys/mips/nlm/board_eeprom.c +++ /dev/null @@ -1,173 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include /* needed by board.h */ - -#include - -/* - * We have to read the EEPROM in early boot (now only for MAC addr) - * but later for board information. Use simple polled mode driver - * for I2C - */ -#define oc_read_reg(reg) nlm_read_reg(eeprom_i2c_base, reg) -#define oc_write_reg(reg, val) nlm_write_reg(eeprom_i2c_base, reg, val) - -static uint64_t eeprom_i2c_base; - -static int -oc_wait_on_status(uint8_t bit) -{ - int tries = I2C_TIMEOUT; - uint8_t status; - - do { - status = oc_read_reg(OC_I2C_STATUS_REG); - } while ((status & bit) != 0 && --tries > 0); - - return (tries == 0 ? -1: 0); -} - -static int -oc_rd_cmd(uint8_t cmd) -{ - uint8_t data; - - oc_write_reg(OC_I2C_CMD_REG, cmd); - if (oc_wait_on_status(OC_STATUS_TIP) < 0) - return (-1); - - data = oc_read_reg(OC_I2C_DATA_REG); - return (data); -} - -static int -oc_wr_cmd(uint8_t data, uint8_t cmd) -{ - oc_write_reg(OC_I2C_DATA_REG, data); - oc_write_reg(OC_I2C_CMD_REG, cmd); - - if (oc_wait_on_status(OC_STATUS_TIP) < 0) - return (-1); - return (0); -} - -int -nlm_board_eeprom_read(int node, int bus, int addr, int offs, uint8_t *buf, - int sz) -{ - int rd, i; - char *err = NULL; - - eeprom_i2c_base = nlm_pcicfg_base(XLP_IO_I2C_OFFSET(node, bus)) + - XLP_IO_PCI_HDRSZ; - - if (oc_wait_on_status(OC_STATUS_BUSY) < 0) { - err = "Not idle"; - goto err_exit; - } - - /* write start */ - if (oc_wr_cmd(addr, OC_COMMAND_START)) { - err = "I2C write start failed."; - goto err_exit; - } - - if (oc_read_reg(OC_I2C_STATUS_REG) & OC_STATUS_NACK) { - err = "No ack after start"; - goto err_exit_stop; - } - - if (oc_read_reg(OC_I2C_STATUS_REG) & OC_STATUS_AL) { - err = "I2C Bus Arbitration Lost"; - goto err_exit_stop; - } - - /* Write offset */ - if (oc_wr_cmd(offs, OC_COMMAND_WRITE)) { - err = "I2C write slave offset failed."; - goto err_exit_stop; - } - - if (oc_read_reg(OC_I2C_STATUS_REG) & OC_STATUS_NACK) { - err = "No ack after write"; - goto err_exit_stop; - } - - /* read start */ - if (oc_wr_cmd(addr | 1, OC_COMMAND_START)) { - err = "I2C read start failed."; - goto err_exit_stop; - } - - if (oc_read_reg(OC_I2C_STATUS_REG) & OC_STATUS_NACK) { - err = "No ack after read start"; - goto err_exit_stop; - } - - for (i = 0; i < sz - 1; i++) { - if ((rd = oc_rd_cmd(OC_COMMAND_READ)) < 0) { - err = "I2C read data byte failed."; - goto err_exit_stop; - } - buf[i] = rd; - } - - /* last byte */ - if ((rd = oc_rd_cmd(OC_COMMAND_RDNACK)) < 0) { - err = "I2C read last data byte failed."; - goto err_exit_stop; - } - buf[sz - 1] = rd; - -err_exit_stop: - oc_write_reg(OC_I2C_CMD_REG, OC_COMMAND_STOP); - if (oc_wait_on_status(OC_STATUS_BUSY) < 0) - printf("%s: stop failed", __func__); - -err_exit: - if (err) { - printf("%s: Failed (%s)\n", __func__, err); - return (-1); - } - return (0); -} diff --git a/sys/mips/nlm/bus_space_rmi.c b/sys/mips/nlm/bus_space_rmi.c deleted file mode 100644 index 073ff1ad5a5..00000000000 --- a/sys/mips/nlm/bus_space_rmi.c +++ /dev/null @@ -1,760 +0,0 @@ -/* - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include - -static int -rmi_bus_space_map(void *t, bus_addr_t addr, - bus_size_t size, int flags, - bus_space_handle_t *bshp); - -static void -rmi_bus_space_unmap(void *t, bus_space_handle_t bsh, - bus_size_t size); - -static int -rmi_bus_space_subregion(void *t, - bus_space_handle_t bsh, - bus_size_t offset, bus_size_t size, - bus_space_handle_t *nbshp); - -static u_int8_t -rmi_bus_space_read_1(void *t, - bus_space_handle_t handle, - bus_size_t offset); - -static u_int16_t -rmi_bus_space_read_2(void *t, - bus_space_handle_t handle, - bus_size_t offset); - -static u_int32_t -rmi_bus_space_read_4(void *t, - bus_space_handle_t handle, - bus_size_t offset); - -static void -rmi_bus_space_read_multi_1(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int8_t *addr, - size_t count); - -static void -rmi_bus_space_read_multi_2(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int16_t *addr, - size_t count); - -static void -rmi_bus_space_read_multi_4(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int32_t *addr, - size_t count); - -static void -rmi_bus_space_read_region_1(void *t, - bus_space_handle_t bsh, - bus_size_t offset, u_int8_t *addr, - size_t count); - -static void -rmi_bus_space_read_region_2(void *t, - bus_space_handle_t bsh, - bus_size_t offset, u_int16_t *addr, - size_t count); - -static void -rmi_bus_space_read_region_4(void *t, - bus_space_handle_t bsh, - bus_size_t offset, u_int32_t *addr, - size_t count); - -static void -rmi_bus_space_write_1(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int8_t value); - -static void -rmi_bus_space_write_2(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int16_t value); - -static void -rmi_bus_space_write_4(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int32_t value); - -static void -rmi_bus_space_write_multi_1(void *t, - bus_space_handle_t handle, - bus_size_t offset, - const u_int8_t *addr, - size_t count); - -static void -rmi_bus_space_write_multi_2(void *t, - bus_space_handle_t handle, - bus_size_t offset, - const u_int16_t *addr, - size_t count); - -static void -rmi_bus_space_write_multi_4(void *t, - bus_space_handle_t handle, - bus_size_t offset, - const u_int32_t *addr, - size_t count); - -static void -rmi_bus_space_write_region_2(void *t, - bus_space_handle_t bsh, - bus_size_t offset, - const u_int16_t *addr, - size_t count); - -static void -rmi_bus_space_write_region_4(void *t, - bus_space_handle_t bsh, - bus_size_t offset, - const u_int32_t *addr, - size_t count); - -static void -rmi_bus_space_set_region_2(void *t, - bus_space_handle_t bsh, - bus_size_t offset, u_int16_t value, - size_t count); -static void -rmi_bus_space_set_region_4(void *t, - bus_space_handle_t bsh, - bus_size_t offset, u_int32_t value, - size_t count); - -static void -rmi_bus_space_barrier(void *tag __unused, bus_space_handle_t bsh __unused, - bus_size_t offset __unused, bus_size_t len __unused, int flags); - -static void -rmi_bus_space_copy_region_2(void *t, - bus_space_handle_t bsh1, - bus_size_t off1, - bus_space_handle_t bsh2, - bus_size_t off2, size_t count); - -u_int8_t -rmi_bus_space_read_stream_1(void *t, bus_space_handle_t handle, - bus_size_t offset); - -static u_int16_t -rmi_bus_space_read_stream_2(void *t, bus_space_handle_t handle, - bus_size_t offset); - -static u_int32_t -rmi_bus_space_read_stream_4(void *t, bus_space_handle_t handle, - bus_size_t offset); -static void -rmi_bus_space_read_multi_stream_1(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int8_t *addr, - size_t count); - -static void -rmi_bus_space_read_multi_stream_2(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int16_t *addr, - size_t count); - -static void -rmi_bus_space_read_multi_stream_4(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int32_t *addr, - size_t count); - -void -rmi_bus_space_write_stream_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, u_int8_t value); -static void -rmi_bus_space_write_stream_2(void *t, bus_space_handle_t handle, - bus_size_t offset, u_int16_t value); - -static void -rmi_bus_space_write_stream_4(void *t, bus_space_handle_t handle, - bus_size_t offset, u_int32_t value); - -static void -rmi_bus_space_write_multi_stream_1(void *t, - bus_space_handle_t handle, - bus_size_t offset, - const u_int8_t *addr, - size_t count); -static void -rmi_bus_space_write_multi_stream_2(void *t, - bus_space_handle_t handle, - bus_size_t offset, - const u_int16_t *addr, - size_t count); - -static void -rmi_bus_space_write_multi_stream_4(void *t, - bus_space_handle_t handle, - bus_size_t offset, - const u_int32_t *addr, - size_t count); - -#define TODO() printf("XLP bus space: '%s' unimplemented\n", __func__) - -static struct bus_space local_rmi_bus_space = { - /* cookie */ - (void *)0, - - /* mapping/unmapping */ - rmi_bus_space_map, - rmi_bus_space_unmap, - rmi_bus_space_subregion, - - /* allocation/deallocation */ - NULL, - NULL, - - /* barrier */ - rmi_bus_space_barrier, - - /* read (single) */ - rmi_bus_space_read_1, - rmi_bus_space_read_2, - rmi_bus_space_read_4, - NULL, - - /* read multiple */ - rmi_bus_space_read_multi_1, - rmi_bus_space_read_multi_2, - rmi_bus_space_read_multi_4, - NULL, - - /* read region */ - rmi_bus_space_read_region_1, - rmi_bus_space_read_region_2, - rmi_bus_space_read_region_4, - NULL, - - /* write (single) */ - rmi_bus_space_write_1, - rmi_bus_space_write_2, - rmi_bus_space_write_4, - NULL, - - /* write multiple */ - rmi_bus_space_write_multi_1, - rmi_bus_space_write_multi_2, - rmi_bus_space_write_multi_4, - NULL, - - /* write region */ - NULL, - rmi_bus_space_write_region_2, - rmi_bus_space_write_region_4, - NULL, - - /* set multiple */ - NULL, - NULL, - NULL, - NULL, - - /* set region */ - NULL, - rmi_bus_space_set_region_2, - rmi_bus_space_set_region_4, - NULL, - - /* copy */ - NULL, - rmi_bus_space_copy_region_2, - NULL, - NULL, - - /* read (single) stream */ - rmi_bus_space_read_stream_1, - rmi_bus_space_read_stream_2, - rmi_bus_space_read_stream_4, - NULL, - - /* read multiple stream */ - rmi_bus_space_read_multi_stream_1, - rmi_bus_space_read_multi_stream_2, - rmi_bus_space_read_multi_stream_4, - NULL, - - /* read region stream */ - rmi_bus_space_read_region_1, - rmi_bus_space_read_region_2, - rmi_bus_space_read_region_4, - NULL, - - /* write (single) stream */ - rmi_bus_space_write_stream_1, - rmi_bus_space_write_stream_2, - rmi_bus_space_write_stream_4, - NULL, - - /* write multiple stream */ - rmi_bus_space_write_multi_stream_1, - rmi_bus_space_write_multi_stream_2, - rmi_bus_space_write_multi_stream_4, - NULL, - - /* write region stream */ - NULL, - rmi_bus_space_write_region_2, - rmi_bus_space_write_region_4, - NULL, -}; - -/* generic bus_space tag */ -bus_space_tag_t rmi_bus_space = &local_rmi_bus_space; - -/* - * Map a region of device bus space into CPU virtual address space. - */ -static int -rmi_bus_space_map(void *t __unused, bus_addr_t addr, - bus_size_t size __unused, int flags __unused, - bus_space_handle_t *bshp) -{ - - *bshp = MIPS_PHYS_TO_DIRECT_UNCACHED(addr); - return (0); -} - -/* - * Unmap a region of device bus space. - */ -static void -rmi_bus_space_unmap(void *t __unused, bus_space_handle_t bsh __unused, - bus_size_t size __unused) -{ -} - -/* - * Get a new handle for a subregion of an already-mapped area of bus space. - */ - -static int -rmi_bus_space_subregion(void *t __unused, bus_space_handle_t bsh, - bus_size_t offset, bus_size_t size __unused, - bus_space_handle_t *nbshp) -{ - *nbshp = bsh + offset; - return (0); -} - -/* - * Read a 1, 2, 4, or 8 byte quantity from bus space - * described by tag/handle/offset. - */ - -static u_int8_t -rmi_bus_space_read_1(void *tag, bus_space_handle_t handle, - bus_size_t offset) -{ - return (u_int8_t) (*(volatile u_int8_t *)(handle + offset)); -} - -static u_int16_t -rmi_bus_space_read_2(void *tag, bus_space_handle_t handle, - bus_size_t offset) -{ - return (u_int16_t)(*(volatile u_int16_t *)(handle + offset)); -} - -static u_int32_t -rmi_bus_space_read_4(void *tag, bus_space_handle_t handle, - bus_size_t offset) -{ - return (*(volatile u_int32_t *)(handle + offset)); -} - -/* - * Read `count' 1, 2, 4, or 8 byte quantities from bus space - * described by tag/handle/offset and copy into buffer provided. - */ -static void -rmi_bus_space_read_multi_1(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int8_t *addr, size_t count) -{ - TODO(); -} - -static void -rmi_bus_space_read_multi_2(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int16_t *addr, size_t count) -{ - TODO(); -} - -static void -rmi_bus_space_read_multi_4(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int32_t *addr, size_t count) -{ - TODO(); -} - -/* - * Write the 1, 2, 4, or 8 byte value `value' to bus space - * described by tag/handle/offset. - */ - -static void -rmi_bus_space_write_1(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int8_t value) -{ - *(volatile u_int8_t *)(handle + offset) = value; -} - -static void -rmi_bus_space_write_2(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int16_t value) -{ - *(volatile u_int16_t *)(handle + offset) = value; -} - -static void -rmi_bus_space_write_4(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int32_t value) -{ - *(volatile u_int32_t *)(handle + offset) = value; -} - -/* - * Write `count' 1, 2, 4, or 8 byte quantities from the buffer - * provided to bus space described by tag/handle/offset. - */ - -static void -rmi_bus_space_write_multi_1(void *tag, bus_space_handle_t handle, - bus_size_t offset, const u_int8_t *addr, size_t count) -{ - TODO(); -} - -static void -rmi_bus_space_write_multi_2(void *tag, bus_space_handle_t handle, - bus_size_t offset, const u_int16_t *addr, size_t count) -{ - TODO(); -} - -static void -rmi_bus_space_write_multi_4(void *tag, bus_space_handle_t handle, - bus_size_t offset, const u_int32_t *addr, size_t count) -{ - TODO(); -} - -/* - * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described - * by tag/handle starting at `offset'. - */ - -static void -rmi_bus_space_set_region_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, u_int16_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - for (; count != 0; count--, addr += 2) - (*(volatile u_int32_t *)(addr)) = value; -} - -static void -rmi_bus_space_set_region_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, u_int32_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - for (; count != 0; count--, addr += 4) - (*(volatile u_int32_t *)(addr)) = value; -} - -/* - * Copy `count' 1, 2, 4, or 8 byte values from bus space starting - * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. - */ -static void -rmi_bus_space_copy_region_2(void *t, bus_space_handle_t bsh1, - bus_size_t off1, bus_space_handle_t bsh2, - bus_size_t off2, size_t count) -{ - printf("bus_space_copy_region_2 - unimplemented\n"); -} - -/* - * Read `count' 1, 2, 4, or 8 byte quantities from bus space - * described by tag/handle/offset and copy into buffer provided. - */ - -u_int8_t -rmi_bus_space_read_stream_1(void *t, bus_space_handle_t handle, - bus_size_t offset) -{ - - return *((volatile u_int8_t *)(handle + offset)); -} - -static u_int16_t -rmi_bus_space_read_stream_2(void *t, bus_space_handle_t handle, - bus_size_t offset) -{ - return *(volatile u_int16_t *)(handle + offset); -} - -static u_int32_t -rmi_bus_space_read_stream_4(void *t, bus_space_handle_t handle, - bus_size_t offset) -{ - return (*(volatile u_int32_t *)(handle + offset)); -} - -static void -rmi_bus_space_read_multi_stream_1(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int8_t *addr, size_t count) -{ - TODO(); -} - -static void -rmi_bus_space_read_multi_stream_2(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int16_t *addr, size_t count) -{ - TODO(); -} - -static void -rmi_bus_space_read_multi_stream_4(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int32_t *addr, size_t count) -{ - TODO(); -} - -/* - * Read `count' 1, 2, 4, or 8 byte quantities from bus space - * described by tag/handle and starting at `offset' and copy into - * buffer provided. - */ -void -rmi_bus_space_read_region_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, u_int8_t *addr, size_t count) -{ - TODO(); -} - -void -rmi_bus_space_read_region_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, u_int16_t *addr, size_t count) -{ - TODO(); -} - -void -rmi_bus_space_read_region_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, u_int32_t *addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - *addr++ = (*(volatile u_int32_t *)(baddr)); - baddr += 4; - } -} - -void -rmi_bus_space_write_stream_1(void *t, bus_space_handle_t handle, - bus_size_t offset, u_int8_t value) -{ - TODO(); -} - -static void -rmi_bus_space_write_stream_2(void *t, bus_space_handle_t handle, - bus_size_t offset, u_int16_t value) -{ - TODO(); -} - -static void -rmi_bus_space_write_stream_4(void *t, bus_space_handle_t handle, - bus_size_t offset, u_int32_t value) -{ - TODO(); -} - -static void -rmi_bus_space_write_multi_stream_1(void *tag, bus_space_handle_t handle, - bus_size_t offset, const u_int8_t *addr, size_t count) -{ - TODO(); -} - -static void -rmi_bus_space_write_multi_stream_2(void *tag, bus_space_handle_t handle, - bus_size_t offset, const u_int16_t *addr, size_t count) -{ - TODO(); -} - -static void -rmi_bus_space_write_multi_stream_4(void *tag, bus_space_handle_t handle, - bus_size_t offset, const u_int32_t *addr, size_t count) -{ - TODO(); -} - -void -rmi_bus_space_write_region_2(void *t, - bus_space_handle_t bsh, - bus_size_t offset, - const u_int16_t *addr, - size_t count) -{ - TODO(); -} - -void -rmi_bus_space_write_region_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, const u_int32_t *addr, size_t count) -{ - TODO(); -} - -static void -rmi_bus_space_barrier(void *tag __unused, bus_space_handle_t bsh __unused, - bus_size_t offset __unused, bus_size_t len __unused, int flags) -{ -} - -/* - * need a special bus space for this, because the Netlogic SoC - * UART allows only 32 bit access to its registers - */ - -static u_int8_t -rmi_uart_bus_space_read_1(void *tag, bus_space_handle_t handle, - bus_size_t offset) -{ - return (u_int8_t)(*(volatile u_int32_t *)(handle + offset)); -} - -static void -rmi_uart_bus_space_write_1(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int8_t value) -{ - *(volatile u_int32_t *)(handle + offset) = value; -} - -static struct bus_space local_rmi_uart_bus_space = { - /* cookie */ - (void *)0, - - /* mapping/unmapping */ - rmi_bus_space_map, - rmi_bus_space_unmap, - rmi_bus_space_subregion, - - /* allocation/deallocation */ - NULL, - NULL, - - /* barrier */ - rmi_bus_space_barrier, - - /* read (single) */ - rmi_uart_bus_space_read_1, NULL, NULL, NULL, - - /* read multiple */ - NULL, NULL, NULL, NULL, - - /* read region */ - NULL, NULL, NULL, NULL, - - /* write (single) */ - rmi_uart_bus_space_write_1, NULL, NULL, NULL, - - /* write multiple */ - NULL, NULL, NULL, NULL, - - /* write region */ - NULL, NULL, NULL, NULL, - - /* set multiple */ - NULL, NULL, NULL, NULL, - - /* set region */ - NULL, NULL, NULL, NULL, - - /* copy */ - NULL, NULL, NULL, NULL, - - /* read (single) stream */ - NULL, NULL, NULL, NULL, - - /* read multiple stream */ - NULL, NULL, NULL, NULL, - - /* read region stream */ - NULL, NULL, NULL, NULL, - - /* write (single) stream */ - NULL, NULL, NULL, NULL, - - /* write multiple stream */ - NULL, NULL, NULL, NULL, - - /* write region stream */ - NULL, NULL, NULL, NULL, -}; - -/* generic bus_space tag */ -bus_space_tag_t rmi_uart_bus_space = &local_rmi_uart_bus_space; diff --git a/sys/mips/nlm/bus_space_rmi_pci.c b/sys/mips/nlm/bus_space_rmi_pci.c deleted file mode 100644 index f689b03a548..00000000000 --- a/sys/mips/nlm/bus_space_rmi_pci.c +++ /dev/null @@ -1,760 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include - -static int -rmi_pci_bus_space_map(void *t, bus_addr_t addr, - bus_size_t size, int flags, - bus_space_handle_t * bshp); - -static void -rmi_pci_bus_space_unmap(void *t, bus_space_handle_t bsh, - bus_size_t size); - -static int -rmi_pci_bus_space_subregion(void *t, - bus_space_handle_t bsh, - bus_size_t offset, bus_size_t size, - bus_space_handle_t * nbshp); - -static u_int8_t -rmi_pci_bus_space_read_1(void *t, - bus_space_handle_t handle, - bus_size_t offset); - -static u_int16_t -rmi_pci_bus_space_read_2(void *t, - bus_space_handle_t handle, - bus_size_t offset); - -static u_int32_t -rmi_pci_bus_space_read_4(void *t, - bus_space_handle_t handle, - bus_size_t offset); - -static void -rmi_pci_bus_space_read_multi_1(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int8_t * addr, - size_t count); - -static void -rmi_pci_bus_space_read_multi_2(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int16_t * addr, - size_t count); - -static void -rmi_pci_bus_space_read_multi_4(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int32_t * addr, - size_t count); - -static void -rmi_pci_bus_space_read_region_1(void *t, - bus_space_handle_t bsh, - bus_size_t offset, u_int8_t * addr, - size_t count); - -static void -rmi_pci_bus_space_read_region_2(void *t, - bus_space_handle_t bsh, - bus_size_t offset, u_int16_t * addr, - size_t count); - -static void -rmi_pci_bus_space_read_region_4(void *t, - bus_space_handle_t bsh, - bus_size_t offset, u_int32_t * addr, - size_t count); - -static void -rmi_pci_bus_space_write_1(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int8_t value); - -static void -rmi_pci_bus_space_write_2(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int16_t value); - -static void -rmi_pci_bus_space_write_4(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int32_t value); - -static void -rmi_pci_bus_space_write_multi_1(void *t, - bus_space_handle_t handle, - bus_size_t offset, - const u_int8_t * addr, - size_t count); - -static void -rmi_pci_bus_space_write_multi_2(void *t, - bus_space_handle_t handle, - bus_size_t offset, - const u_int16_t * addr, - size_t count); - -static void -rmi_pci_bus_space_write_multi_4(void *t, - bus_space_handle_t handle, - bus_size_t offset, - const u_int32_t * addr, - size_t count); - -static void -rmi_pci_bus_space_write_region_2(void *t, - bus_space_handle_t bsh, - bus_size_t offset, - const u_int16_t * addr, - size_t count); - -static void -rmi_pci_bus_space_write_region_4(void *t, - bus_space_handle_t bsh, - bus_size_t offset, - const u_int32_t * addr, - size_t count); - -static void -rmi_pci_bus_space_set_region_2(void *t, - bus_space_handle_t bsh, - bus_size_t offset, u_int16_t value, - size_t count); - -static void -rmi_pci_bus_space_set_region_4(void *t, - bus_space_handle_t bsh, - bus_size_t offset, u_int32_t value, - size_t count); - -static void -rmi_pci_bus_space_barrier(void *tag __unused, bus_space_handle_t bsh __unused, - bus_size_t offset __unused, bus_size_t len __unused, int flags); - -static void -rmi_pci_bus_space_copy_region_2(void *t, - bus_space_handle_t bsh1, - bus_size_t off1, - bus_space_handle_t bsh2, - bus_size_t off2, size_t count); - -u_int8_t -rmi_pci_bus_space_read_stream_1(void *t, bus_space_handle_t handle, - bus_size_t offset); - -static u_int16_t -rmi_pci_bus_space_read_stream_2(void *t, bus_space_handle_t handle, - bus_size_t offset); - -static u_int32_t -rmi_pci_bus_space_read_stream_4(void *t, bus_space_handle_t handle, - bus_size_t offset); - -static void -rmi_pci_bus_space_read_multi_stream_1(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int8_t * addr, - size_t count); - -static void -rmi_pci_bus_space_read_multi_stream_2(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int16_t * addr, - size_t count); - -static void -rmi_pci_bus_space_read_multi_stream_4(void *t, - bus_space_handle_t handle, - bus_size_t offset, u_int32_t * addr, - size_t count); - -void -rmi_pci_bus_space_write_stream_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, u_int8_t value); - -static void -rmi_pci_bus_space_write_stream_2(void *t, bus_space_handle_t handle, - bus_size_t offset, u_int16_t value); - -static void -rmi_pci_bus_space_write_stream_4(void *t, bus_space_handle_t handle, - bus_size_t offset, u_int32_t value); - -static void -rmi_pci_bus_space_write_multi_stream_1(void *t, - bus_space_handle_t handle, - bus_size_t offset, - const u_int8_t * addr, - size_t count); - -static void -rmi_pci_bus_space_write_multi_stream_2(void *t, - bus_space_handle_t handle, - bus_size_t offset, - const u_int16_t * addr, - size_t count); - -static void -rmi_pci_bus_space_write_multi_stream_4(void *t, - bus_space_handle_t handle, - bus_size_t offset, - const u_int32_t * addr, - size_t count); - -#define TODO() printf("XLR memory bus space function '%s' unimplemented\n", __func__) - -static struct bus_space local_rmi_pci_bus_space = { - /* cookie */ - (void *)0, - - /* mapping/unmapping */ - rmi_pci_bus_space_map, - rmi_pci_bus_space_unmap, - rmi_pci_bus_space_subregion, - - /* allocation/deallocation */ - NULL, - NULL, - - /* barrier */ - rmi_pci_bus_space_barrier, - - /* read (single) */ - rmi_pci_bus_space_read_1, - rmi_pci_bus_space_read_2, - rmi_pci_bus_space_read_4, - NULL, - - /* read multiple */ - rmi_pci_bus_space_read_multi_1, - rmi_pci_bus_space_read_multi_2, - rmi_pci_bus_space_read_multi_4, - NULL, - - /* read region */ - rmi_pci_bus_space_read_region_1, - rmi_pci_bus_space_read_region_2, - rmi_pci_bus_space_read_region_4, - NULL, - - /* write (single) */ - rmi_pci_bus_space_write_1, - rmi_pci_bus_space_write_2, - rmi_pci_bus_space_write_4, - NULL, - - /* write multiple */ - rmi_pci_bus_space_write_multi_1, - rmi_pci_bus_space_write_multi_2, - rmi_pci_bus_space_write_multi_4, - NULL, - - /* write region */ - NULL, - rmi_pci_bus_space_write_region_2, - rmi_pci_bus_space_write_region_4, - NULL, - - /* set multiple */ - NULL, - NULL, - NULL, - NULL, - - /* set region */ - NULL, - rmi_pci_bus_space_set_region_2, - rmi_pci_bus_space_set_region_4, - NULL, - - /* copy */ - NULL, - rmi_pci_bus_space_copy_region_2, - NULL, - NULL, - - /* read (single) stream */ - rmi_pci_bus_space_read_stream_1, - rmi_pci_bus_space_read_stream_2, - rmi_pci_bus_space_read_stream_4, - NULL, - - /* read multiple stream */ - rmi_pci_bus_space_read_multi_stream_1, - rmi_pci_bus_space_read_multi_stream_2, - rmi_pci_bus_space_read_multi_stream_4, - NULL, - - /* read region stream */ - rmi_pci_bus_space_read_region_1, - rmi_pci_bus_space_read_region_2, - rmi_pci_bus_space_read_region_4, - NULL, - - /* write (single) stream */ - rmi_pci_bus_space_write_stream_1, - rmi_pci_bus_space_write_stream_2, - rmi_pci_bus_space_write_stream_4, - NULL, - - /* write multiple stream */ - rmi_pci_bus_space_write_multi_stream_1, - rmi_pci_bus_space_write_multi_stream_2, - rmi_pci_bus_space_write_multi_stream_4, - NULL, - - /* write region stream */ - NULL, - rmi_pci_bus_space_write_region_2, - rmi_pci_bus_space_write_region_4, - NULL, -}; - -/* generic bus_space tag */ -bus_space_tag_t rmi_pci_bus_space = &local_rmi_pci_bus_space; - -/* - * Map a region of device bus space into CPU virtual address space. - */ -static int -rmi_pci_bus_space_map(void *t __unused, bus_addr_t addr, - bus_size_t size __unused, int flags __unused, - bus_space_handle_t * bshp) -{ - *bshp = addr; - return (0); -} - -/* - * Unmap a region of device bus space. - */ -static void -rmi_pci_bus_space_unmap(void *t __unused, bus_space_handle_t bsh __unused, - bus_size_t size __unused) -{ -} - -/* - * Get a new handle for a subregion of an already-mapped area of bus space. - */ - -static int -rmi_pci_bus_space_subregion(void *t __unused, bus_space_handle_t bsh, - bus_size_t offset, bus_size_t size __unused, - bus_space_handle_t * nbshp) -{ - *nbshp = bsh + offset; - return (0); -} - -/* - * Read a 1, 2, 4, or 8 byte quantity from bus space - * described by tag/handle/offset. - */ - -static u_int8_t -rmi_pci_bus_space_read_1(void *tag, bus_space_handle_t handle, - bus_size_t offset) -{ - return (u_int8_t) (*(volatile u_int8_t *)(handle + offset)); -} - -static u_int16_t -rmi_pci_bus_space_read_2(void *tag, bus_space_handle_t handle, - bus_size_t offset) -{ - u_int16_t value; - - value = *(volatile u_int16_t *)(handle + offset); - return bswap16(value); -} - -static u_int32_t -rmi_pci_bus_space_read_4(void *tag, bus_space_handle_t handle, - bus_size_t offset) -{ - uint32_t value; - - value = *(volatile u_int32_t *)(handle + offset); - return bswap32(value); -} - -/* - * Read `count' 1, 2, 4, or 8 byte quantities from bus space - * described by tag/handle/offset and copy into buffer provided. - */ -static void -rmi_pci_bus_space_read_multi_1(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int8_t * addr, size_t count) -{ - while (count--) { - *addr = *(volatile u_int8_t *)(handle + offset); - addr++; - } -} - -static void -rmi_pci_bus_space_read_multi_2(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int16_t * addr, size_t count) -{ - - while (count--) { - *addr = *(volatile u_int16_t *)(handle + offset); - *addr = bswap16(*addr); - addr++; - } -} - -static void -rmi_pci_bus_space_read_multi_4(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int32_t * addr, size_t count) -{ - - while (count--) { - *addr = *(volatile u_int32_t *)(handle + offset); - *addr = bswap32(*addr); - addr++; - } -} - -/* - * Write the 1, 2, 4, or 8 byte value `value' to bus space - * described by tag/handle/offset. - */ - -static void -rmi_pci_bus_space_write_1(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int8_t value) -{ - mips_sync(); - *(volatile u_int8_t *)(handle + offset) = value; -} - -static void -rmi_pci_bus_space_write_2(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int16_t value) -{ - mips_sync(); - *(volatile u_int16_t *)(handle + offset) = bswap16(value); -} - -static void -rmi_pci_bus_space_write_4(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int32_t value) -{ - mips_sync(); - *(volatile u_int32_t *)(handle + offset) = bswap32(value); -} - -/* - * Write `count' 1, 2, 4, or 8 byte quantities from the buffer - * provided to bus space described by tag/handle/offset. - */ - -static void -rmi_pci_bus_space_write_multi_1(void *tag, bus_space_handle_t handle, - bus_size_t offset, const u_int8_t * addr, size_t count) -{ - mips_sync(); - while (count--) { - (*(volatile u_int8_t *)(handle + offset)) = *addr; - addr++; - } -} - -static void -rmi_pci_bus_space_write_multi_2(void *tag, bus_space_handle_t handle, - bus_size_t offset, const u_int16_t * addr, size_t count) -{ - mips_sync(); - while (count--) { - (*(volatile u_int16_t *)(handle + offset)) = bswap16(*addr); - addr++; - } -} - -static void -rmi_pci_bus_space_write_multi_4(void *tag, bus_space_handle_t handle, - bus_size_t offset, const u_int32_t * addr, size_t count) -{ - mips_sync(); - while (count--) { - (*(volatile u_int32_t *)(handle + offset)) = bswap32(*addr); - addr++; - } -} - -/* - * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described - * by tag/handle starting at `offset'. - */ - -static void -rmi_pci_bus_space_set_region_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, u_int16_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - for (; count != 0; count--, addr += 2) - (*(volatile u_int16_t *)(addr)) = value; -} - -static void -rmi_pci_bus_space_set_region_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, u_int32_t value, size_t count) -{ - bus_addr_t addr = bsh + offset; - - for (; count != 0; count--, addr += 4) - (*(volatile u_int32_t *)(addr)) = value; -} - -/* - * Copy `count' 1, 2, 4, or 8 byte values from bus space starting - * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2. - */ -static void -rmi_pci_bus_space_copy_region_2(void *t, bus_space_handle_t bsh1, - bus_size_t off1, bus_space_handle_t bsh2, - bus_size_t off2, size_t count) -{ - TODO(); -} - -/* - * Read `count' 1, 2, 4, or 8 byte quantities from bus space - * described by tag/handle/offset and copy into buffer provided. - */ - -u_int8_t -rmi_pci_bus_space_read_stream_1(void *t, bus_space_handle_t handle, - bus_size_t offset) -{ - - return *((volatile u_int8_t *)(handle + offset)); -} - -static u_int16_t -rmi_pci_bus_space_read_stream_2(void *t, bus_space_handle_t handle, - bus_size_t offset) -{ - return *(volatile u_int16_t *)(handle + offset); -} - -static u_int32_t -rmi_pci_bus_space_read_stream_4(void *t, bus_space_handle_t handle, - bus_size_t offset) -{ - return (*(volatile u_int32_t *)(handle + offset)); -} - -static void -rmi_pci_bus_space_read_multi_stream_1(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int8_t * addr, size_t count) -{ - while (count--) { - *addr = (*(volatile u_int8_t *)(handle + offset)); - addr++; - } -} - -static void -rmi_pci_bus_space_read_multi_stream_2(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int16_t * addr, size_t count) -{ - while (count--) { - *addr = (*(volatile u_int16_t *)(handle + offset)); - addr++; - } -} - -static void -rmi_pci_bus_space_read_multi_stream_4(void *tag, bus_space_handle_t handle, - bus_size_t offset, u_int32_t * addr, size_t count) -{ - while (count--) { - *addr = (*(volatile u_int32_t *)(handle + offset)); - addr++; - } -} - -/* - * Read `count' 1, 2, 4, or 8 byte quantities from bus space - * described by tag/handle and starting at `offset' and copy into - * buffer provided. - */ -void -rmi_pci_bus_space_read_region_1(void *t, bus_space_handle_t bsh, - bus_size_t offset, u_int8_t * addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - *addr++ = (*(volatile u_int8_t *)(baddr)); - baddr += 1; - } -} - -void -rmi_pci_bus_space_read_region_2(void *t, bus_space_handle_t bsh, - bus_size_t offset, u_int16_t * addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - *addr++ = (*(volatile u_int16_t *)(baddr)); - baddr += 2; - } -} - -void -rmi_pci_bus_space_read_region_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, u_int32_t * addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - *addr++ = (*(volatile u_int32_t *)(baddr)); - baddr += 4; - } -} - -void -rmi_pci_bus_space_write_stream_1(void *t, bus_space_handle_t handle, - bus_size_t offset, u_int8_t value) -{ - mips_sync(); - *(volatile u_int8_t *)(handle + offset) = value; -} - -static void -rmi_pci_bus_space_write_stream_2(void *t, bus_space_handle_t handle, - bus_size_t offset, u_int16_t value) -{ - mips_sync(); - *(volatile u_int16_t *)(handle + offset) = value; -} - -static void -rmi_pci_bus_space_write_stream_4(void *t, bus_space_handle_t handle, - bus_size_t offset, u_int32_t value) -{ - mips_sync(); - *(volatile u_int32_t *)(handle + offset) = value; -} - -static void -rmi_pci_bus_space_write_multi_stream_1(void *tag, bus_space_handle_t handle, - bus_size_t offset, const u_int8_t * addr, size_t count) -{ - mips_sync(); - while (count--) { - (*(volatile u_int8_t *)(handle + offset)) = *addr; - addr++; - } -} - -static void -rmi_pci_bus_space_write_multi_stream_2(void *tag, bus_space_handle_t handle, - bus_size_t offset, const u_int16_t * addr, size_t count) -{ - mips_sync(); - while (count--) { - (*(volatile u_int16_t *)(handle + offset)) = *addr; - addr++; - } -} - -static void -rmi_pci_bus_space_write_multi_stream_4(void *tag, bus_space_handle_t handle, - bus_size_t offset, const u_int32_t * addr, size_t count) -{ - mips_sync(); - while (count--) { - (*(volatile u_int32_t *)(handle + offset)) = *addr; - addr++; - } -} - -void -rmi_pci_bus_space_write_region_2(void *t, - bus_space_handle_t bsh, - bus_size_t offset, - const u_int16_t * addr, - size_t count) -{ - bus_addr_t baddr = (bus_addr_t) bsh + offset; - - while (count--) { - (*(volatile u_int16_t *)(baddr)) = *addr; - addr++; - baddr += 2; - } -} - -void -rmi_pci_bus_space_write_region_4(void *t, bus_space_handle_t bsh, - bus_size_t offset, const u_int32_t * addr, size_t count) -{ - bus_addr_t baddr = bsh + offset; - - while (count--) { - (*(volatile u_int32_t *)(baddr)) = *addr; - addr++; - baddr += 4; - } -} - -static void -rmi_pci_bus_space_barrier(void *tag __unused, bus_space_handle_t bsh __unused, - bus_size_t offset __unused, bus_size_t len __unused, int flags) -{ - -} diff --git a/sys/mips/nlm/clock.h b/sys/mips/nlm/clock.h deleted file mode 100644 index 416fe1d22c7..00000000000 --- a/sys/mips/nlm/clock.h +++ /dev/null @@ -1,43 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef _RMI_CLOCK_H_ -#define _RMI_CLOCK_H_ - -#define XLP_PIC_HZ 133000000U -#define XLP_CPU_HZ (nlm_cpu_frequency) - -void count_compare_clockhandler(struct trapframe *); -void pic_hardclockhandler(struct trapframe *); -void pic_timecounthandler(struct trapframe *); - -#endif /* _RMI_CLOCK_H_ */ diff --git a/sys/mips/nlm/cms.c b/sys/mips/nlm/cms.c deleted file mode 100644 index a5a27ffd56e..00000000000 --- a/sys/mips/nlm/cms.c +++ /dev/null @@ -1,496 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#define MSGRNG_NSTATIONS 1024 -/* - * Keep track of our message ring handler threads, each core has a - * different message station. Ideally we will need to start a few - * message handling threads every core, and wake them up depending on - * load - */ -struct msgring_thread { - struct thread *thread; /* msgring handler threads */ - int needed; /* thread needs to wake up */ -}; -static struct msgring_thread msgring_threads[XLP_MAX_CORES * XLP_MAX_THREADS]; -static struct proc *msgring_proc; /* all threads are under a proc */ - -/* - * The device drivers can register a handler for the messages sent - * from a station (corresponding to the device). - */ -struct tx_stn_handler { - msgring_handler action; - void *arg; -}; -static struct tx_stn_handler msgmap[MSGRNG_NSTATIONS]; -static struct mtx msgmap_lock; -uint32_t xlp_msg_thread_mask; -static int xlp_msg_threads_per_core = XLP_MAX_THREADS; - -static void create_msgring_thread(int hwtid); -static int msgring_process_fast_intr(void *arg); - -/* Debug counters */ -static int msgring_nintr[XLP_MAX_CORES * XLP_MAX_THREADS]; -static int msgring_wakeup_sleep[XLP_MAX_CORES * XLP_MAX_THREADS]; -static int msgring_wakeup_nosleep[XLP_MAX_CORES * XLP_MAX_THREADS]; -static int fmn_msgcount[XLP_MAX_CORES * XLP_MAX_THREADS][4]; -static int fmn_loops[XLP_MAX_CORES * XLP_MAX_THREADS]; - -/* Whether polled driver implementation */ -static int polled = 0; - -/* We do only i/o device credit setup here. CPU credit setup is now - * moved to xlp_msgring_cpu_init() so that the credits get setup - * only if the CPU exists. xlp_msgring_cpu_init() gets called from - * platform_init_ap; and this makes it easy for us to setup CMS - * credits for various types of XLP chips, with varying number of - * cpu's and cores. - */ -static void -xlp_cms_credit_setup(int credit) -{ - uint64_t cmspcibase, cmsbase, pcibase; - uint32_t devoffset; - int dev, fn, maxqid; - int src, qid, i; - - for (i = 0; i < XLP_MAX_NODES; i++) { - cmspcibase = nlm_get_cms_pcibase(i); - if (!nlm_dev_exists(XLP_IO_CMS_OFFSET(i))) - continue; - cmsbase = nlm_get_cms_regbase(i); - maxqid = nlm_read_reg(cmspcibase, XLP_PCI_DEVINFO_REG0); - for (dev = 0; dev < 8; dev++) { - for (fn = 0; fn < 8; fn++) { - devoffset = XLP_HDR_OFFSET(i, 0, dev, fn); - if (nlm_dev_exists(devoffset) == 0) - continue; - pcibase = nlm_pcicfg_base(devoffset); - src = nlm_qidstart(pcibase); - if (src == 0) - continue; -#if 0 /* Debug */ - printf("Setup CMS credits for queues "); - printf("[%d to %d] from src %d\n", 0, - maxqid, src); -#endif - for (qid = 0; qid < maxqid; qid++) - nlm_cms_setup_credits(cmsbase, qid, - src, credit); - } - } - } -} - -void -xlp_msgring_cpu_init(int node, int cpu, int credit) -{ - uint64_t cmspcibase = nlm_get_cms_pcibase(node); - uint64_t cmsbase = nlm_get_cms_regbase(node); - int qid, maxqid, src; - - maxqid = nlm_read_reg(cmspcibase, XLP_PCI_DEVINFO_REG0); - - /* cpu credit setup is done only from thread-0 of each core */ - if((cpu % 4) == 0) { - src = cpu << 2; /* each thread has 4 vc's */ - for (qid = 0; qid < maxqid; qid++) - nlm_cms_setup_credits(cmsbase, qid, src, credit); - } -} - -/* - * Drain out max_messages for the buckets set in the bucket mask. - * Use max_msgs = 0 to drain out all messages. - */ -int -xlp_handle_msg_vc(u_int vcmask, int max_msgs) -{ - struct nlm_fmn_msg msg; - int srcid = 0, size = 0, code = 0; - struct tx_stn_handler *he; - uint32_t mflags, status; - int n_msgs = 0, vc, m, hwtid; - u_int msgmask; - - hwtid = nlm_cpuid(); - for (;;) { - /* check if VC empty */ - mflags = nlm_save_flags_cop2(); - status = nlm_read_c2_msgstatus1(); - nlm_restore_flags(mflags); - - msgmask = ((status >> 24) & 0xf) ^ 0xf; - msgmask &= vcmask; - if (msgmask == 0) - break; - m = 0; - for (vc = 0; vc < 4; vc++) { - if ((msgmask & (1 << vc)) == 0) - continue; - - mflags = nlm_save_flags_cop2(); - status = nlm_fmn_msgrcv(vc, &srcid, &size, &code, - &msg); - nlm_restore_flags(mflags); - if (status != 0) /* no msg or error */ - continue; - if (srcid < 0 || srcid >= 1024) { - printf("[%s]: bad src id %d\n", __func__, - srcid); - continue; - } - he = &msgmap[srcid]; - if(he->action != NULL) - (he->action)(vc, size, code, srcid, &msg, - he->arg); -#if 0 - else - printf("[%s]: No Handler for msg from stn %d," - " vc=%d, size=%d, msg0=%jx, droppinge\n", - __func__, srcid, vc, size, - (uintmax_t)msg.msg[0]); -#endif - fmn_msgcount[hwtid][vc] += 1; - m++; /* msgs handled in this iter */ - } - if (m == 0) - break; /* nothing done in this iter */ - n_msgs += m; - if (max_msgs > 0 && n_msgs >= max_msgs) - break; - } - - return (n_msgs); -} - -static void -xlp_discard_msg_vc(u_int vcmask) -{ - struct nlm_fmn_msg msg; - int srcid = 0, size = 0, code = 0, vc; - uint32_t mflags, status; - - for (vc = 0; vc < 4; vc++) { - for (;;) { - mflags = nlm_save_flags_cop2(); - status = nlm_fmn_msgrcv(vc, &srcid, - &size, &code, &msg); - nlm_restore_flags(mflags); - - /* break if there is no msg or error */ - if (status != 0) - break; - } - } -} - -void -xlp_cms_enable_intr(int node, int cpu, int type, int watermark) -{ - uint64_t cmsbase; - int i, qid; - - cmsbase = nlm_get_cms_regbase(node); - - for (i = 0; i < 4; i++) { - qid = (i + (cpu * 4)) & 0x7f; - nlm_cms_per_queue_level_intr(cmsbase, qid, type, watermark); - nlm_cms_per_queue_timer_intr(cmsbase, qid, 0x1, 0); - } -} - -static int -msgring_process_fast_intr(void *arg) -{ - struct msgring_thread *mthd; - struct thread *td; - int cpu; - - cpu = nlm_cpuid(); - mthd = &msgring_threads[cpu]; - msgring_nintr[cpu]++; - td = mthd->thread; - - /* clear pending interrupts */ - nlm_write_c0_eirr(1ULL << IRQ_MSGRING); - - /* wake up the target thread */ - mthd->needed = 1; - thread_lock(td); - if (TD_AWAITING_INTR(td)) { - msgring_wakeup_sleep[cpu]++; - TD_CLR_IWAIT(td); - sched_add(td, SRQ_INTR); - } else { - thread_unlock(td); - msgring_wakeup_nosleep[cpu]++; - } - - return (FILTER_HANDLED); -} - -static void -msgring_process(void * arg) -{ - volatile struct msgring_thread *mthd; - struct thread *td; - uint32_t mflags, msgstatus1; - int hwtid, nmsgs; - - hwtid = (intptr_t)arg; - mthd = &msgring_threads[hwtid]; - td = mthd->thread; - KASSERT(curthread == td, - ("%s:msg_ithread and proc linkage out of sync", __func__)); - - /* First bind this thread to the right CPU */ - thread_lock(td); - sched_bind(td, xlp_hwtid_to_cpuid[hwtid]); - thread_unlock(td); - - if (hwtid != nlm_cpuid()) - printf("Misscheduled hwtid %d != cpuid %d\n", hwtid, - nlm_cpuid()); - - xlp_discard_msg_vc(0xf); - xlp_msgring_cpu_init(nlm_nodeid(), nlm_cpuid(), CMS_DEFAULT_CREDIT); - if (polled == 0) { - mflags = nlm_save_flags_cop2(); - nlm_fmn_cpu_init(IRQ_MSGRING, 0, 0, 0, 0, 0); - nlm_restore_flags(mflags); - xlp_cms_enable_intr(nlm_nodeid(), nlm_cpuid(), 0x2, 0); - /* clear pending interrupts. - * they will get re-raised if still valid */ - nlm_write_c0_eirr(1ULL << IRQ_MSGRING); - } - - /* start processing messages */ - for (;;) { - atomic_store_rel_int(&mthd->needed, 0); - nmsgs = xlp_handle_msg_vc(0xf, 0); - - /* sleep */ - if (polled == 0) { - /* clear VC-pend bits */ - mflags = nlm_save_flags_cop2(); - msgstatus1 = nlm_read_c2_msgstatus1(); - msgstatus1 |= (0xf << 16); - nlm_write_c2_msgstatus1(msgstatus1); - nlm_restore_flags(mflags); - - thread_lock(td); - if (mthd->needed) { - thread_unlock(td); - continue; - } - sched_class(td, PRI_ITHD); - TD_SET_IWAIT(td); - mi_switch(SW_VOL); - } else - pause("wmsg", 1); - - fmn_loops[hwtid]++; - } -} - -static void -create_msgring_thread(int hwtid) -{ - struct msgring_thread *mthd; - struct thread *td; - int error; - - mthd = &msgring_threads[hwtid]; - error = kproc_kthread_add(msgring_process, (void *)(uintptr_t)hwtid, - &msgring_proc, &td, RFSTOPPED, 2, "msgrngproc", - "msgthr%d", hwtid); - if (error) - panic("kproc_kthread_add() failed with %d", error); - mthd->thread = td; - - thread_lock(td); - sched_class(td, PRI_ITHD); - sched_add(td, SRQ_INTR); -} - -int -register_msgring_handler(int startb, int endb, msgring_handler action, - void *arg) -{ - int i; - - if (bootverbose) - printf("Register handler %d-%d %p(%p)\n", - startb, endb, action, arg); - KASSERT(startb >= 0 && startb <= endb && endb < MSGRNG_NSTATIONS, - ("Invalid value for bucket range %d,%d", startb, endb)); - - mtx_lock_spin(&msgmap_lock); - for (i = startb; i <= endb; i++) { - KASSERT(msgmap[i].action == NULL, - ("Bucket %d already used [action %p]", i, msgmap[i].action)); - msgmap[i].action = action; - msgmap[i].arg = arg; - } - mtx_unlock_spin(&msgmap_lock); - return (0); -} - -/* - * Initialize the messaging subsystem. - * - * Message Stations are shared among all threads in a cpu core, this - * has to be called once from every core which is online. - */ -static void -xlp_msgring_config(void *arg) -{ - void *cookie; - unsigned int thrmask, mask; - int i; - - /* used polled handler for Ax silion */ - if (nlm_is_xlp8xx_ax()) - polled = 1; - - /* Don't poll on all threads, if polled */ - if (polled) - xlp_msg_threads_per_core -= 1; - - mtx_init(&msgmap_lock, "msgring", NULL, MTX_SPIN); - if (xlp_threads_per_core < xlp_msg_threads_per_core) - xlp_msg_threads_per_core = xlp_threads_per_core; - thrmask = ((1 << xlp_msg_threads_per_core) - 1); - mask = 0; - for (i = 0; i < XLP_MAX_CORES; i++) { - mask <<= XLP_MAX_THREADS; - mask |= thrmask; - } - xlp_msg_thread_mask = xlp_hw_thread_mask & mask; -#if 0 - printf("CMS Message handler thread mask %#jx\n", - (uintmax_t)xlp_msg_thread_mask); -#endif - xlp_cms_credit_setup(CMS_DEFAULT_CREDIT); - create_msgring_thread(0); - cpu_establish_hardintr("msgring", msgring_process_fast_intr, NULL, - NULL, IRQ_MSGRING, INTR_TYPE_NET, &cookie); -} - -/* - * Start message ring processing threads on other CPUs, after SMP start - */ -static void -start_msgring_threads(void *arg) -{ - int hwt; - - for (hwt = 1; hwt < XLP_MAX_CORES * XLP_MAX_THREADS; hwt++) { - if ((xlp_msg_thread_mask & (1 << hwt)) == 0) - continue; - create_msgring_thread(hwt); - } -} - -SYSINIT(xlp_msgring_config, SI_SUB_DRIVERS, SI_ORDER_FIRST, - xlp_msgring_config, NULL); -SYSINIT(start_msgring_threads, SI_SUB_SMP, SI_ORDER_MIDDLE, - start_msgring_threads, NULL); - -/* - * DEBUG support, XXX: static buffer, not locked - */ -static int -sys_print_debug(SYSCTL_HANDLER_ARGS) -{ - struct sbuf sb; - int error, i; - - sbuf_new_for_sysctl(&sb, NULL, 64, req); - sbuf_printf(&sb, - "\nID vc0 vc1 vc2 vc3 loops\n"); - for (i = 0; i < 32; i++) { - if ((xlp_hw_thread_mask & (1 << i)) == 0) - continue; - sbuf_printf(&sb, "%2d: %8d %8d %8d %8d %8d\n", i, - fmn_msgcount[i][0], fmn_msgcount[i][1], - fmn_msgcount[i][2], fmn_msgcount[i][3], - fmn_loops[i]); - } - error = sbuf_finish(&sb); - sbuf_delete(&sb); - return (error); -} - -SYSCTL_PROC(_debug, OID_AUTO, msgring, - CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_NEEDGIANT, 0, 0, - sys_print_debug, "A", - "msgring debug info"); diff --git a/sys/mips/nlm/dev/net/mdio.c b/sys/mips/nlm/dev/net/mdio.c deleted file mode 100644 index 171383df01a..00000000000 --- a/sys/mips/nlm/dev/net/mdio.c +++ /dev/null @@ -1,334 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include - -/* Internal MDIO READ/WRITE Routines */ -int -nlm_int_gmac_mdio_read(uint64_t nae_base, int bus, int block, - int intf_type, int phyaddr, int regidx) -{ - uint32_t mdio_ld_cmd; - uint32_t ctrlval; - - ctrlval = INT_MDIO_CTRL_SMP | - (phyaddr << INT_MDIO_CTRL_PHYADDR_POS) | - (regidx << INT_MDIO_CTRL_DEVTYPE_POS) | - (2 << INT_MDIO_CTRL_OP_POS) | - (1 << INT_MDIO_CTRL_ST_POS) | - (7 << INT_MDIO_CTRL_XDIV_POS) | - (2 << INT_MDIO_CTRL_TA_POS) | - (2 << INT_MDIO_CTRL_MIIM_POS) | - (1 << INT_MDIO_CTRL_MCDIV_POS); - - mdio_ld_cmd = nlm_read_nae_reg(nae_base, - NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4))); - if (mdio_ld_cmd & INT_MDIO_CTRL_CMD_LOAD) { - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus*4)), - (mdio_ld_cmd & ~INT_MDIO_CTRL_CMD_LOAD)); - } - - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)), - ctrlval); - - /* Toggle Load Cmd Bit */ - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)), - ctrlval | (1 << INT_MDIO_CTRL_LOAD_POS)); - - /* poll master busy bit until it is not busy */ - while(nlm_read_nae_reg(nae_base, - NAE_REG(block, intf_type, (INT_MDIO_RD_STAT + bus * 4))) & - INT_MDIO_STAT_MBSY) { - } - - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)), - ctrlval); - - /* Read the data back */ - return nlm_read_nae_reg(nae_base, - NAE_REG(block, intf_type, (INT_MDIO_RD_STAT + bus * 4))); -} - -/* Internal MDIO WRITE Routines */ -int -nlm_int_gmac_mdio_write(uint64_t nae_base, int bus, int block, - int intf_type, int phyaddr, int regidx, uint16_t val) -{ - uint32_t mdio_ld_cmd; - uint32_t ctrlval; - - ctrlval = INT_MDIO_CTRL_SMP | - (phyaddr << INT_MDIO_CTRL_PHYADDR_POS) | - (regidx << INT_MDIO_CTRL_DEVTYPE_POS) | - (1 << INT_MDIO_CTRL_OP_POS) | - (1 << INT_MDIO_CTRL_ST_POS) | - (7 << INT_MDIO_CTRL_XDIV_POS) | - (2 << INT_MDIO_CTRL_TA_POS) | - (1 << INT_MDIO_CTRL_MIIM_POS) | - (1 << INT_MDIO_CTRL_MCDIV_POS); - - mdio_ld_cmd = nlm_read_nae_reg(nae_base, - NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4))); - if (mdio_ld_cmd & INT_MDIO_CTRL_CMD_LOAD) { - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus*4)), - (mdio_ld_cmd & ~INT_MDIO_CTRL_CMD_LOAD)); - } - - /* load data into ctrl data reg */ - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (INT_MDIO_CTRL_DATA + bus * 4)), - val); - - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)), - ctrlval); - - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)), - ctrlval | (1 << INT_MDIO_CTRL_LOAD_POS)); - - /* poll master busy bit until it is not busy */ - while(nlm_read_nae_reg(nae_base, - NAE_REG(block, intf_type, (INT_MDIO_RD_STAT + bus * 4))) & - INT_MDIO_STAT_MBSY) { - } - - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)), - ctrlval); - - return (0); -} - -int -nlm_int_gmac_mdio_reset(uint64_t nae_base, int bus, int block, - int intf_type) -{ - uint32_t val; - - val = (7 << INT_MDIO_CTRL_XDIV_POS) | - (1 << INT_MDIO_CTRL_MCDIV_POS) | - (INT_MDIO_CTRL_SMP); - - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)), - val | INT_MDIO_CTRL_RST); - - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)), - val); - - return (0); -} - -/* - * nae_gmac_mdio_read - Read sgmii phy register - * - * Input parameters: - * bus - bus number, nae has two external gmac bus: 0 and 1 - * phyaddr - PHY's address - * regidx - index of register to read - * - * Return value: - * value read (16 bits), or 0xffffffff if an error occurred. - */ -int -nlm_gmac_mdio_read(uint64_t nae_base, int bus, int block, - int intf_type, int phyaddr, int regidx) -{ - uint32_t mdio_ld_cmd; - uint32_t ctrlval; - - mdio_ld_cmd = nlm_read_nae_reg(nae_base, NAE_REG(block, intf_type, - (EXT_G0_MDIO_CTRL + bus * 4))); - if (mdio_ld_cmd & EXT_G_MDIO_CMD_LCD) { - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)), - (mdio_ld_cmd & ~EXT_G_MDIO_CMD_LCD)); - while(nlm_read_nae_reg(nae_base, - NAE_REG(block, intf_type, - (EXT_G0_MDIO_RD_STAT + bus * 4))) & - EXT_G_MDIO_STAT_MBSY); - } - - ctrlval = EXT_G_MDIO_CMD_SP | - (phyaddr << EXT_G_MDIO_PHYADDR_POS) | - (regidx << EXT_G_MDIO_REGADDR_POS); - if (nlm_is_xlp8xx_ax() || nlm_is_xlp8xx_b0() || nlm_is_xlp3xx_ax()) - ctrlval |= EXT_G_MDIO_DIV; - else - ctrlval |= EXT_G_MDIO_DIV_WITH_HW_DIV64; - - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)), - ctrlval); - - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)), - ctrlval | (1<<18)); - DELAY(1000); - /* poll master busy bit until it is not busy */ - while(nlm_read_nae_reg(nae_base, - NAE_REG(block, intf_type, (EXT_G0_MDIO_RD_STAT + bus * 4))) & - EXT_G_MDIO_STAT_MBSY); - - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)), - ctrlval); - - /* Read the data back */ - return nlm_read_nae_reg(nae_base, - NAE_REG(block, intf_type, (EXT_G0_MDIO_RD_STAT + bus * 4))); -} - -/* - * nae_gmac_mdio_write -Write sgmac mii PHY register. - * - * Input parameters: - * bus - bus number, nae has two external gmac bus: 0 and 1 - * phyaddr - PHY to use - * regidx - register within the PHY - * val - data to write to register - * - * Return value: - * 0 - success - */ -int -nlm_gmac_mdio_write(uint64_t nae_base, int bus, int block, - int intf_type, int phyaddr, int regidx, uint16_t val) -{ - uint32_t mdio_ld_cmd; - uint32_t ctrlval; - - mdio_ld_cmd = nlm_read_nae_reg(nae_base, NAE_REG(block, intf_type, - (EXT_G0_MDIO_CTRL + bus * 4))); - if (mdio_ld_cmd & EXT_G_MDIO_CMD_LCD) { - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)), - (mdio_ld_cmd & ~EXT_G_MDIO_CMD_LCD)); - while(nlm_read_nae_reg(nae_base, - NAE_REG(block, intf_type, - (EXT_G0_MDIO_RD_STAT + bus * 4))) & - EXT_G_MDIO_STAT_MBSY); - } - - /* load data into ctrl data reg */ - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL_DATA+bus*4)), - val); - - ctrlval = EXT_G_MDIO_CMD_SP | - (phyaddr << EXT_G_MDIO_PHYADDR_POS) | - (regidx << EXT_G_MDIO_REGADDR_POS); - if (nlm_is_xlp8xx_ax() || nlm_is_xlp8xx_b0() || nlm_is_xlp3xx_ax()) - ctrlval |= EXT_G_MDIO_DIV; - else - ctrlval |= EXT_G_MDIO_DIV_WITH_HW_DIV64; - - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)), - ctrlval); - - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)), - ctrlval | EXT_G_MDIO_CMD_LCD); - DELAY(1000); - - /* poll master busy bit until it is not busy */ - while(nlm_read_nae_reg(nae_base, - NAE_REG(block, intf_type, - (EXT_G0_MDIO_RD_STAT + bus * 4))) & EXT_G_MDIO_STAT_MBSY); - - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4)), - ctrlval); - - return (0); -} - -/* - * nae_gmac_mdio_reset -Reset sgmii mdio module. - * - * Input parameters: - * bus - bus number, nae has two external gmac bus: 0 and 1 - * - * Return value: - * 0 - success - */ -int -nlm_gmac_mdio_reset(uint64_t nae_base, int bus, int block, - int intf_type) -{ - uint32_t ctrlval; - - ctrlval = nlm_read_nae_reg(nae_base, - NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL+bus*4))); - - if (nlm_is_xlp8xx_ax() || nlm_is_xlp8xx_b0() || nlm_is_xlp3xx_ax()) - ctrlval |= EXT_G_MDIO_DIV; - else - ctrlval |= EXT_G_MDIO_DIV_WITH_HW_DIV64; - - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL + bus * 4)), - EXT_G_MDIO_MMRST | ctrlval); - nlm_write_nae_reg(nae_base, - NAE_REG(block, intf_type, (EXT_G0_MDIO_CTRL + bus * 4)), ctrlval); - return (0); -} - -/* - * nlm_mdio_reset_all : reset all internal and external MDIO - */ -void -nlm_mdio_reset_all(uint64_t nae_base) -{ - /* reset internal MDIO */ - nlm_int_gmac_mdio_reset(nae_base, 0, BLOCK_7, LANE_CFG); - /* reset external MDIO */ - nlm_gmac_mdio_reset(nae_base, 0, BLOCK_7, LANE_CFG); - nlm_gmac_mdio_reset(nae_base, 1, BLOCK_7, LANE_CFG); -} diff --git a/sys/mips/nlm/dev/net/nae.c b/sys/mips/nlm/dev/net/nae.c deleted file mode 100644 index 8eef6028464..00000000000 --- a/sys/mips/nlm/dev/net/nae.c +++ /dev/null @@ -1,1455 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -void -nlm_nae_flush_free_fifo(uint64_t nae_base, int nblocks) -{ - uint32_t data, fifo_mask; - - fifo_mask = (1 << (4 * nblocks)) - 1; - - nlm_write_nae_reg(nae_base, NAE_RX_FREE_FIFO_POP, fifo_mask); - do { - data = nlm_read_nae_reg(nae_base, NAE_RX_FREE_FIFO_POP); - } while (data != fifo_mask); - - nlm_write_nae_reg(nae_base, NAE_RX_FREE_FIFO_POP, 0); -} - -void -nlm_program_nae_parser_seq_fifo(uint64_t nae_base, int maxports, - struct nae_port_config *cfg) -{ - uint32_t val; - int start = 0, size, i; - - for (i = 0; i < maxports; i++) { - size = cfg[i].pseq_fifo_size; - val = (((size & 0x1fff) << 17) | - ((start & 0xfff) << 5) | - (i & 0x1f)); - nlm_write_nae_reg(nae_base, NAE_PARSER_SEQ_FIFO_CFG, val); - start += size; - } -} - -void -nlm_setup_rx_cal_cfg(uint64_t nae_base, int total_num_ports, - struct nae_port_config *cfg) -{ - int rx_slots = 0, port; - int cal_len, cal = 0, last_free = 0; - uint32_t val; - - for (port = 0; port < total_num_ports; port++) { - if (cfg[port].rx_slots_reqd) - rx_slots += cfg[port].rx_slots_reqd; - if (rx_slots > MAX_CAL_SLOTS) { - rx_slots = MAX_CAL_SLOTS; - break; - } - } - - cal_len = rx_slots - 1; - - do { - if (cal >= MAX_CAL_SLOTS) - break; - last_free = cal; - for (port = 0; port < total_num_ports; port++) { - if (cfg[port].rx_slots_reqd > 0) { - val = (cal_len << 16) | (port << 8) | cal; - nlm_write_nae_reg(nae_base, - NAE_RX_IF_SLOT_CAL, val); - cal++; - cfg[port].rx_slots_reqd--; - } - } - if (last_free == cal) - break; - } while (1); -} - -void -nlm_setup_tx_cal_cfg(uint64_t nae_base, int total_num_ports, - struct nae_port_config *cfg) -{ - int tx_slots = 0, port; - int cal = 0, last_free = 0; - uint32_t val; - - for (port = 0; port < total_num_ports; port++) { - if (cfg[port].tx_slots_reqd) - tx_slots += cfg[port].tx_slots_reqd; - if (tx_slots > MAX_CAL_SLOTS) { - tx_slots = MAX_CAL_SLOTS; - break; - } - } - - nlm_write_nae_reg(nae_base, NAE_EGR_NIOR_CAL_LEN_REG, tx_slots - 1); - do { - if (cal >= MAX_CAL_SLOTS) - break; - last_free = cal; - for (port = 0; port < total_num_ports; port++) { - if (cfg[port].tx_slots_reqd > 0) { - val = (port << 7) | (cal << 1) | 1; - nlm_write_nae_reg(nae_base, - NAE_EGR_NIOR_CRDT_CAL_PROG, val); - cal++; - cfg[port].tx_slots_reqd--; - } - } - if (last_free == cal) - break; - } while (1); -} - -void -nlm_deflate_frin_fifo_carving(uint64_t nae_base, int total_num_ports) -{ - const int minimum_size = 8; - uint32_t value; - int intf, start; - - for (intf = 0; intf < total_num_ports; intf++) { - start = minimum_size * intf; - value = (minimum_size << 20) | (start << 8) | (intf); - nlm_write_nae_reg(nae_base, NAE_FREE_IN_FIFO_CFG, value); - } -} - -void -nlm_reset_nae(int node) -{ - uint64_t sysbase; - uint64_t nae_base; - uint64_t nae_pcibase; - uint32_t rx_config; - uint32_t bar0; - int reset_bit; - - sysbase = nlm_get_sys_regbase(node); - nae_base = nlm_get_nae_regbase(node); - nae_pcibase = nlm_get_nae_pcibase(node); - - bar0 = nlm_read_pci_reg(nae_pcibase, XLP_PCI_CFGREG4); - -#if BYTE_ORDER == LITTLE_ENDIAN - if (nlm_is_xlp8xx_ax()) { - uint8_t val; - /* membar fixup */ - val = (bar0 >> 24) & 0xff; - bar0 = (val << 24) | (val << 16) | (val << 8) | val; - } -#endif - - if (nlm_is_xlp3xx()) - reset_bit = 6; - else - reset_bit = 9; - - /* Reset NAE */ - nlm_write_sys_reg(sysbase, SYS_RESET, (1 << reset_bit)); - - /* XXXJC - 1s delay here may be too high */ - DELAY(1000000); - nlm_write_sys_reg(sysbase, SYS_RESET, (0 << reset_bit)); - DELAY(1000000); - - rx_config = nlm_read_nae_reg(nae_base, NAE_RX_CONFIG); - nlm_write_pci_reg(nae_pcibase, XLP_PCI_CFGREG4, bar0); -} - -void -nlm_setup_poe_class_config(uint64_t nae_base, int max_poe_classes, - int num_contexts, int *poe_cl_tbl) -{ - uint32_t val; - int i, max_poe_class_ctxt_tbl_sz; - - max_poe_class_ctxt_tbl_sz = num_contexts/max_poe_classes; - for (i = 0; i < max_poe_class_ctxt_tbl_sz; i++) { - val = (poe_cl_tbl[(i/max_poe_classes) & 0x7] << 8) | i; - nlm_write_nae_reg(nae_base, NAE_POE_CLASS_SETUP_CFG, val); - } -} - -void -nlm_setup_vfbid_mapping(uint64_t nae_base) -{ - uint32_t val; - int dest_vc, vfbid; - - /* 127 is max vfbid */ - for (vfbid = 127; vfbid >= 0; vfbid--) { - dest_vc = nlm_get_vfbid_mapping(vfbid); - if (dest_vc < 0) - continue; - val = (dest_vc << 16) | (vfbid << 4) | 1; - nlm_write_nae_reg(nae_base, NAE_VFBID_DESTMAP_CMD, val); - } -} - -void -nlm_setup_flow_crc_poly(uint64_t nae_base, uint32_t poly) -{ - nlm_write_nae_reg(nae_base, NAE_FLOW_CRC16_POLY_CFG, poly); -} - -void -nlm_setup_iface_fifo_cfg(uint64_t nae_base, int maxports, - struct nae_port_config *cfg) -{ - uint32_t reg; - int fifo_xoff_thresh = 12; - int i, size; - int cur_iface_start = 0; - - for (i = 0; i < maxports; i++) { - size = cfg[i].iface_fifo_size; - reg = ((fifo_xoff_thresh << 25) | - ((size & 0x1ff) << 16) | - ((cur_iface_start & 0xff) << 8) | - (i & 0x1f)); - nlm_write_nae_reg(nae_base, NAE_IFACE_FIFO_CFG, reg); - cur_iface_start += size; - } -} - -void -nlm_setup_rx_base_config(uint64_t nae_base, int maxports, - struct nae_port_config *cfg) -{ - int base = 0; - uint32_t val; - int i; - int id; - - for (i = 0; i < (maxports/2); i++) { - id = 0x12 + i; /* RX_IF_BASE_CONFIG0 */ - - val = (base & 0x3ff); - base += cfg[(i * 2)].num_channels; - - val |= ((base & 0x3ff) << 16); - base += cfg[(i * 2) + 1].num_channels; - - nlm_write_nae_reg(nae_base, NAE_REG(7, 0, id), val); - } -} - -void -nlm_setup_rx_buf_config(uint64_t nae_base, int maxports, - struct nae_port_config *cfg) -{ - uint32_t val; - int i, sz, k; - int context = 0; - int base = 0; - - for (i = 0; i < maxports; i++) { - if (cfg[i].type == UNKNOWN) - continue; - for (k = 0; k < cfg[i].num_channels; k++) { - /* write index (context num) */ - nlm_write_nae_reg(nae_base, NAE_RXBUF_BASE_DPTH_ADDR, - (context+k)); - - /* write value (rx buf sizes) */ - sz = cfg[i].rxbuf_size; - val = 0x80000000 | ((base << 2) & 0x3fff); /* base */ - val |= (((sz << 2) & 0x3fff) << 16); /* size */ - - nlm_write_nae_reg(nae_base, NAE_RXBUF_BASE_DPTH, val); - nlm_write_nae_reg(nae_base, NAE_RXBUF_BASE_DPTH, - (0x7fffffff & val)); - base += sz; - } - context += cfg[i].num_channels; - } -} - -void -nlm_setup_freein_fifo_cfg(uint64_t nae_base, struct nae_port_config *cfg) -{ - int size, i; - uint32_t reg; - int start = 0, maxbufpool; - - if (nlm_is_xlp8xx()) - maxbufpool = MAX_FREE_FIFO_POOL_8XX; - else - maxbufpool = MAX_FREE_FIFO_POOL_3XX; - for (i = 0; i < maxbufpool; i++) { - /* Each entry represents 2 descs; hence division by 2 */ - size = (cfg[i].num_free_descs / 2); - if (size == 0) - size = 8; - reg = ((size & 0x3ff ) << 20) | /* fcSize */ - ((start & 0x1ff) << 8) | /* fcStart */ - (i & 0x1f); - - nlm_write_nae_reg(nae_base, NAE_FREE_IN_FIFO_CFG, reg); - start += size; - } -} - -/* XXX function name */ -int -nlm_get_flow_mask(int num_ports) -{ - const int max_bits = 5; /* upto 32 ports */ - int i; - - /* Compute the number of bits to needed to - * represent all the ports */ - for (i = 0; i < max_bits; i++) { - if (num_ports <= (2 << i)) - return (i + 1); - } - return (max_bits); -} - -void -nlm_program_flow_cfg(uint64_t nae_base, int port, - uint32_t cur_flow_base, uint32_t flow_mask) -{ - uint32_t val; - - val = (cur_flow_base << 16) | port; - val |= ((flow_mask & 0x1f) << 8); - nlm_write_nae_reg(nae_base, NAE_FLOW_BASEMASK_CFG, val); -} - -void -xlp_ax_nae_lane_reset_txpll(uint64_t nae_base, int block, int lane_ctrl, - int mode) -{ - uint32_t val = 0, saved_data; - int rext_sel = 0; - - val = PHY_LANE_CTRL_RST | - PHY_LANE_CTRL_PWRDOWN | - (mode << PHY_LANE_CTRL_PHYMODE_POS); - - /* set comma bypass for XAUI */ - if (mode != PHYMODE_SGMII) - val |= PHY_LANE_CTRL_BPC_XAUI; - - nlm_write_nae_reg(nae_base, NAE_REG(block, PHY, lane_ctrl), val); - - if (lane_ctrl != 4) { - rext_sel = (1 << 23); - if (mode != PHYMODE_SGMII) - rext_sel |= PHY_LANE_CTRL_BPC_XAUI; - - val = nlm_read_nae_reg(nae_base, - NAE_REG(block, PHY, lane_ctrl)); - val &= ~PHY_LANE_CTRL_RST; - val |= rext_sel; - - /* Resetting PMA for non-zero lanes */ - nlm_write_nae_reg(nae_base, - NAE_REG(block, PHY, lane_ctrl), val); - - DELAY(20000); /* 20 ms delay, XXXJC: needed? */ - - val |= PHY_LANE_CTRL_RST; - nlm_write_nae_reg(nae_base, - NAE_REG(block, PHY, lane_ctrl), val); - - val = 0; - } - - /* Come out of reset for TXPLL */ - saved_data = nlm_read_nae_reg(nae_base, - NAE_REG(block, PHY, lane_ctrl)) & 0xFFC00000; - - nlm_write_nae_reg(nae_base, - NAE_REG(block, PHY, lane_ctrl), - (0x66 << PHY_LANE_CTRL_ADDR_POS) - | PHY_LANE_CTRL_CMD_READ - | PHY_LANE_CTRL_CMD_START - | PHY_LANE_CTRL_RST - | rext_sel - | val ); - - while (((val = nlm_read_nae_reg(nae_base, - NAE_REG(block, PHY, lane_ctrl))) & - PHY_LANE_CTRL_CMD_PENDING)); - - val &= 0xFF; - /* set bit[4] to 0 */ - val &= ~(1 << 4); - nlm_write_nae_reg(nae_base, - NAE_REG(block, PHY, lane_ctrl), - (0x66 << PHY_LANE_CTRL_ADDR_POS) - | PHY_LANE_CTRL_CMD_WRITE - | PHY_LANE_CTRL_CMD_START - | (0x0 << 19) /* (0x4 << 19) */ - | rext_sel - | saved_data - | val ); - - /* re-do */ - nlm_write_nae_reg(nae_base, - NAE_REG(block, PHY, lane_ctrl), - (0x66 << PHY_LANE_CTRL_ADDR_POS) - | PHY_LANE_CTRL_CMD_WRITE - | PHY_LANE_CTRL_CMD_START - | (0x0 << 19) /* (0x4 << 19) */ - | rext_sel - | saved_data - | val ); - - while (!((val = nlm_read_nae_reg(nae_base, - NAE_REG(block, PHY, (lane_ctrl - PHY_LANE_0_CTRL)))) & - PHY_LANE_STAT_PCR)); - - /* Clear the Power Down bit */ - val = nlm_read_nae_reg(nae_base, NAE_REG(block, PHY, lane_ctrl)); - val &= ~((1 << 29) | (0x7ffff)); - nlm_write_nae_reg(nae_base, NAE_REG(block, PHY, lane_ctrl), - (rext_sel | val)); -} - -void -xlp_nae_lane_reset_txpll(uint64_t nae_base, int block, int lane_ctrl, - int mode) -{ - uint32_t val = 0; - int rext_sel = 0; - - if (lane_ctrl != 4) - rext_sel = (1 << 23); - - val = nlm_read_nae_reg(nae_base, - NAE_REG(block, PHY, lane_ctrl)); - - /* set comma bypass for XAUI */ - if (mode != PHYMODE_SGMII) - val |= PHY_LANE_CTRL_BPC_XAUI; - val |= 0x100000; - val |= (mode << PHY_LANE_CTRL_PHYMODE_POS); - val &= ~(0x20000); - nlm_write_nae_reg(nae_base, - NAE_REG(block, PHY, lane_ctrl), val); - - val = nlm_read_nae_reg(nae_base, - NAE_REG(block, PHY, lane_ctrl)); - val |= 0x40000000; - nlm_write_nae_reg(nae_base, - NAE_REG(block, PHY, lane_ctrl), val); - - /* clear the power down bit */ - val = nlm_read_nae_reg(nae_base, - NAE_REG(block, PHY, lane_ctrl)); - val &= ~( (1 << 29) | (0x7ffff)); - nlm_write_nae_reg(nae_base, - NAE_REG(block, PHY, lane_ctrl), rext_sel | val); -} - -void -xlp_nae_config_lane_gmac(uint64_t nae_base, int cplx_mask) -{ - int block, lane_ctrl; - int cplx_lane_enable; - int lane_enable = 0; - - cplx_lane_enable = LM_SGMII | - (LM_SGMII << 4) | - (LM_SGMII << 8) | - (LM_SGMII << 12); - - /* Lane mode progamming */ - block = 7; - - /* Complexes 0, 1 */ - if (cplx_mask & 0x1) - lane_enable |= cplx_lane_enable; - - if (cplx_mask & 0x2) - lane_enable |= (cplx_lane_enable << 16); - - if (lane_enable) { - nlm_write_nae_reg(nae_base, - NAE_REG(block, LANE_CFG, LANE_CFG_CPLX_0_1), - lane_enable); - lane_enable = 0; - } - /* Complexes 2 3 */ - if (cplx_mask & 0x4) - lane_enable |= cplx_lane_enable; - - if (cplx_mask & 0x8) - lane_enable |= (cplx_lane_enable << 16); - - nlm_write_nae_reg(nae_base, - NAE_REG(block, LANE_CFG, LANE_CFG_CPLX_2_3), - lane_enable); - - /* complex 4 */ - /* XXXJC : fix duplicate code */ - if (cplx_mask & 0x10) { - nlm_write_nae_reg(nae_base, - NAE_REG(block, LANE_CFG, LANE_CFG_CPLX_4), - ((LM_SGMII << 4) | LM_SGMII)); - for (lane_ctrl = PHY_LANE_0_CTRL; - lane_ctrl <= PHY_LANE_1_CTRL; lane_ctrl++) { - if (!nlm_is_xlp8xx_ax()) - xlp_nae_lane_reset_txpll(nae_base, - 4, lane_ctrl, PHYMODE_SGMII); - else - xlp_ax_nae_lane_reset_txpll(nae_base, 4, - lane_ctrl, PHYMODE_SGMII); - } - } - - for (block = 0; block < 4; block++) { - if ((cplx_mask & (1 << block)) == 0) - continue; - - for (lane_ctrl = PHY_LANE_0_CTRL; - lane_ctrl <= PHY_LANE_3_CTRL; lane_ctrl++) { - if (!nlm_is_xlp8xx_ax()) - xlp_nae_lane_reset_txpll(nae_base, - block, lane_ctrl, PHYMODE_SGMII); - else - xlp_ax_nae_lane_reset_txpll(nae_base, block, - lane_ctrl, PHYMODE_SGMII); - } - } -} - -void -config_egress_fifo_carvings(uint64_t nae_base, int hwport, int start_ctxt, - int num_ctxts, int max_ctxts, struct nae_port_config *cfg) -{ - static uint32_t cur_start[6] = {0, 0, 0, 0, 0, 0}; - uint32_t data = 0; - uint32_t start = 0, size, offset; - int i, limit; - - limit = start_ctxt + num_ctxts; - /* Stage 2 FIFO */ - start = cur_start[0]; - for (i = start_ctxt; i < limit; i++) { - size = cfg[hwport].stg2_fifo_size / max_ctxts; - if (size) - offset = size - 1; - else - offset = size; - if (offset > cfg[hwport].max_stg2_offset) - offset = cfg[hwport].max_stg2_offset; - data = offset << 23 | - start << 11 | - i << 1 | - 1; - nlm_write_nae_reg(nae_base, NAE_STG2_PMEM_PROG, data); - start += size; - } - cur_start[0] = start; - - /* EH FIFO */ - start = cur_start[1]; - for (i = start_ctxt; i < limit; i++) { - size = cfg[hwport].eh_fifo_size / max_ctxts; - if (size) - offset = size - 1; - else - offset = size ; - if (offset > cfg[hwport].max_eh_offset) - offset = cfg[hwport].max_eh_offset; - data = offset << 23 | - start << 11 | - i << 1 | - 1; - nlm_write_nae_reg(nae_base, NAE_EH_PMEM_PROG, data); - start += size; - } - cur_start[1] = start; - - /* FROUT FIFO */ - start = cur_start[2]; - for (i = start_ctxt; i < limit; i++) { - size = cfg[hwport].frout_fifo_size / max_ctxts; - if (size) - offset = size - 1; - else - offset = size ; - if (offset > cfg[hwport].max_frout_offset) - offset = cfg[hwport].max_frout_offset; - data = offset << 23 | - start << 11 | - i << 1 | - 1; - nlm_write_nae_reg(nae_base, NAE_FREE_PMEM_PROG, data); - start += size; - } - cur_start[2] = start; - - /* MS FIFO */ - start = cur_start[3]; - for (i = start_ctxt; i < limit; i++) { - size = cfg[hwport].ms_fifo_size / max_ctxts; - if (size) - offset = size - 1; - else - offset = size ; - if (offset > cfg[hwport].max_ms_offset) - offset = cfg[hwport].max_ms_offset; - data = offset << 22 | /* FIXME in PRM */ - start << 11 | - i << 1 | - 1; - nlm_write_nae_reg(nae_base, NAE_STR_PMEM_CMD, data); - start += size; - } - cur_start[3] = start; - - /* PKT FIFO */ - start = cur_start[4]; - for (i = start_ctxt; i < limit; i++) { - size = cfg[hwport].pkt_fifo_size / max_ctxts; - if (size) - offset = size - 1; - else - offset = size ; - if (offset > cfg[hwport].max_pmem_offset) - offset = cfg[hwport].max_pmem_offset; - nlm_write_nae_reg(nae_base, NAE_TX_PKT_PMEM_CMD1, offset); - - data = start << 11 | - i << 1 | - 1; - nlm_write_nae_reg(nae_base, NAE_TX_PKT_PMEM_CMD0, data); - start += size; - } - cur_start[4] = start; - - /* PKT LEN FIFO */ - start = cur_start[5]; - for (i = start_ctxt; i < limit; i++) { - size = cfg[hwport].pktlen_fifo_size / max_ctxts; - if (size) - offset = size - 1; - else - offset = size ; - data = offset << 22 | - start << 11 | - i << 1 | - 1; - nlm_write_nae_reg(nae_base, NAE_TX_PKTLEN_PMEM_CMD, data); - start += size; - } - cur_start[5] = start; -} - -void -config_egress_fifo_credits(uint64_t nae_base, int hwport, int start_ctxt, - int num_ctxts, int max_ctxts, struct nae_port_config *cfg) -{ - uint32_t data, credit, max_credit; - int i, limit; - - limit = start_ctxt + num_ctxts; - /* Stage1 -> Stage2 */ - max_credit = cfg[hwport].max_stg2_offset + 1; - for (i = start_ctxt; i < limit; i++) { - credit = cfg[hwport].stg1_2_credit / max_ctxts; - if (credit > max_credit) - credit = max_credit; - data = credit << 16 | - i << 4 | - 1; - nlm_write_nae_reg(nae_base, NAE_STG1_STG2CRDT_CMD, data); - } - - /* Stage2 -> EH */ - max_credit = cfg[hwport].max_eh_offset + 1; - for (i = start_ctxt; i < limit; i++) { - credit = cfg[hwport].stg2_eh_credit / max_ctxts; - if (credit > max_credit) - credit = max_credit; - data = credit << 16 | - i << 4 | - 1; - nlm_write_nae_reg(nae_base, NAE_STG2_EHCRDT_CMD, data); - } - - /* Stage2 -> Frout */ - max_credit = cfg[hwport].max_frout_offset + 1; - for (i = start_ctxt; i < limit; i++) { - credit = cfg[hwport].stg2_frout_credit / max_ctxts; - if (credit > max_credit) - credit = max_credit; - data = credit << 16 | - i << 4 | - 1; - nlm_write_nae_reg(nae_base, NAE_EH_FREECRDT_CMD, data); - } - - /* Stage2 -> MS */ - max_credit = cfg[hwport].max_ms_offset + 1; - for (i = start_ctxt; i < limit; i++) { - credit = cfg[hwport].stg2_ms_credit / max_ctxts; - if (credit > max_credit) - credit = max_credit; - data = credit << 16 | - i << 4 | - 1; - nlm_write_nae_reg(nae_base, NAE_STG2_STRCRDT_CMD, data); - } -} - -void -nlm_config_freein_fifo_uniq_cfg(uint64_t nae_base, int port, - int nblock_free_desc) -{ - uint32_t val; - int size_in_clines; - - size_in_clines = (nblock_free_desc / NAE_CACHELINE_SIZE); - val = (size_in_clines << 8) | (port & 0x1f); - nlm_write_nae_reg(nae_base, NAE_FREEIN_FIFO_UNIQ_SZ_CFG, val); -} - -/* XXXJC: redundant, see ucore_spray_config() */ -void -nlm_config_ucore_iface_mask_cfg(uint64_t nae_base, int port, - int nblock_ucore_mask) -{ - uint32_t val; - - val = ( 0x1U << 31) | ((nblock_ucore_mask & 0xffff) << 8) | - (port & 0x1f); - nlm_write_nae_reg(nae_base, NAE_UCORE_IFACEMASK_CFG, val); -} - -int -nlm_nae_init_netior(uint64_t nae_base, int nblocks) -{ - uint32_t ctrl1, ctrl2, ctrl3; - - if (nblocks == 5) - ctrl3 = 0x07 << 18; - else - ctrl3 = 0; - - switch (nblocks) { - case 2: - ctrl1 = 0xff; - ctrl2 = 0x0707; - break; - case 4: - case 5: - ctrl1 = 0xfffff; - ctrl2 = 0x07070707; - break; - default: - printf("WARNING: unsupported blocks %d\n", nblocks); - return (-1); - } - - nlm_write_nae_reg(nae_base, NAE_LANE_CFG_SOFTRESET, 0); - nlm_write_nae_reg(nae_base, NAE_NETIOR_MISC_CTRL3, ctrl3); - nlm_write_nae_reg(nae_base, NAE_NETIOR_MISC_CTRL2, ctrl2); - nlm_write_nae_reg(nae_base, NAE_NETIOR_MISC_CTRL1, ctrl1); - nlm_write_nae_reg(nae_base, NAE_NETIOR_MISC_CTRL1, 0x0); - return (0); -} - -void -nlm_nae_init_ingress(uint64_t nae_base, uint32_t desc_size) -{ - uint32_t rx_cfg; - uint32_t parser_threshold = 384; - - rx_cfg = nlm_read_nae_reg(nae_base, NAE_RX_CONFIG); - rx_cfg &= ~(0x3 << 1); /* reset max message size */ - rx_cfg &= ~(0xff << 4); /* clear freein desc cluster size */ - rx_cfg &= ~(0x3f << 24); /* reset rx status mask */ /*XXX: why not 7f */ - - rx_cfg |= 1; /* rx enable */ - rx_cfg |= (0x0 << 1); /* max message size */ - rx_cfg |= (0x43 & 0x7f) << 24; /* rx status mask */ - rx_cfg |= ((desc_size / 64) & 0xff) << 4; /* freein desc cluster size */ - nlm_write_nae_reg(nae_base, NAE_RX_CONFIG, rx_cfg); - nlm_write_nae_reg(nae_base, NAE_PARSER_CONFIG, - (parser_threshold & 0x3ff) | - (((parser_threshold / desc_size) + 1) & 0xff) << 12 | - (((parser_threshold / 64) % desc_size) & 0xff) << 20); - - /*nlm_write_nae_reg(nae_base, NAE_RX_FREE_FIFO_THRESH, 33);*/ -} - -void -nlm_nae_init_egress(uint64_t nae_base) -{ - uint32_t tx_cfg; - - tx_cfg = nlm_read_nae_reg(nae_base, NAE_TX_CONFIG); - if (!nlm_is_xlp8xx_ax()) { - nlm_write_nae_reg(nae_base, NAE_TX_CONFIG, - tx_cfg | - 0x1 | /* tx enable */ - 0x2 | /* tx ace */ - 0x4 | /* tx compatible */ - (1 << 3)); - } else { - nlm_write_nae_reg(nae_base, NAE_TX_CONFIG, - tx_cfg | - 0x1 | /* tx enable */ - 0x2); /* tx ace */ - } -} - -uint32_t -ucore_spray_config(uint32_t interface, uint32_t ucore_mask, int cmd) -{ - return ((cmd & 0x1) << 31) | ((ucore_mask & 0xffff) << 8) | - (interface & 0x1f); -} - -void -nlm_nae_init_ucore(uint64_t nae_base, int if_num, u_int ucore_mask) -{ - uint32_t ucfg; - - ucfg = ucore_spray_config(if_num, ucore_mask, 1); /* 1 : write */ - nlm_write_nae_reg(nae_base, NAE_UCORE_IFACEMASK_CFG, ucfg); -} - -uint64_t -nae_tx_desc(u_int type, u_int rdex, u_int fbid, u_int len, uint64_t addr) -{ - return ((uint64_t)type << 62) | - ((uint64_t)rdex << 61) | - ((uint64_t)fbid << 54) | - ((uint64_t)len << 40) | addr; -} - -void -nlm_setup_l2type(uint64_t nae_base, int hwport, uint32_t l2extlen, - uint32_t l2extoff, uint32_t extra_hdrsize, uint32_t proto_offset, - uint32_t fixed_hdroff, uint32_t l2proto) -{ - uint32_t val; - - val = ((l2extlen & 0x3f) << 26) | - ((l2extoff & 0x3f) << 20) | - ((extra_hdrsize & 0x3f) << 14) | - ((proto_offset & 0x3f) << 8) | - ((fixed_hdroff & 0x3f) << 2) | - (l2proto & 0x3); - nlm_write_nae_reg(nae_base, (NAE_L2_TYPE_PORT0 + hwport), val); -} - -void -nlm_setup_l3ctable_mask(uint64_t nae_base, int hwport, uint32_t ptmask, - uint32_t l3portmask) -{ - uint32_t val; - - val = ((ptmask & 0x1) << 6) | - ((l3portmask & 0x1) << 5) | - (hwport & 0x1f); - nlm_write_nae_reg(nae_base, NAE_L3_CTABLE_MASK0, val); -} - -void -nlm_setup_l3ctable_even(uint64_t nae_base, int entry, uint32_t l3hdroff, - uint32_t ipcsum_en, uint32_t l4protooff, - uint32_t l2proto, uint32_t eth_type) -{ - uint32_t val; - - val = ((l3hdroff & 0x3f) << 26) | - ((l4protooff & 0x3f) << 20) | - ((ipcsum_en & 0x1) << 18) | - ((l2proto & 0x3) << 16) | - (eth_type & 0xffff); - nlm_write_nae_reg(nae_base, (NAE_L3CTABLE0 + (entry * 2)), val); -} - -void -nlm_setup_l3ctable_odd(uint64_t nae_base, int entry, uint32_t l3off0, - uint32_t l3len0, uint32_t l3off1, uint32_t l3len1, - uint32_t l3off2, uint32_t l3len2) -{ - uint32_t val; - - val = ((l3off0 & 0x3f) << 26) | - ((l3len0 & 0x1f) << 21) | - ((l3off1 & 0x3f) << 15) | - ((l3len1 & 0x1f) << 10) | - ((l3off2 & 0x3f) << 4) | - (l3len2 & 0xf); - nlm_write_nae_reg(nae_base, (NAE_L3CTABLE0 + ((entry * 2) + 1)), val); -} - -void -nlm_setup_l4ctable_even(uint64_t nae_base, int entry, uint32_t im, - uint32_t l3cm, uint32_t l4pm, uint32_t port, - uint32_t l3camaddr, uint32_t l4proto) -{ - uint32_t val; - - val = ((im & 0x1) << 19) | - ((l3cm & 0x1) << 18) | - ((l4pm & 0x1) << 17) | - ((port & 0x1f) << 12) | - ((l3camaddr & 0xf) << 8) | - (l4proto & 0xff); - nlm_write_nae_reg(nae_base, (NAE_L4CTABLE0 + (entry * 2)), val); -} - -void -nlm_setup_l4ctable_odd(uint64_t nae_base, int entry, uint32_t l4off0, - uint32_t l4len0, uint32_t l4off1, uint32_t l4len1) -{ - uint32_t val; - - val = ((l4off0 & 0x3f) << 21) | - ((l4len0 & 0xf) << 17) | - ((l4off1 & 0x3f) << 11) | - (l4len1 & 0xf); - nlm_write_nae_reg(nae_base, (NAE_L4CTABLE0 + ((entry * 2) + 1)), val); -} - -void -nlm_enable_hardware_parser(uint64_t nae_base) -{ - uint32_t val; - - val = nlm_read_nae_reg(nae_base, NAE_RX_CONFIG); - val |= (1 << 12); /* hardware parser enable */ - nlm_write_nae_reg(nae_base, NAE_RX_CONFIG, val); - - /*********************************************** - * program L3 CAM table - ***********************************************/ - - /* - * entry-0 is ipv4 MPLS type 1 label - */ - /* l3hdroff = 4 bytes, ether_type = 0x8847 for MPLS_type1 */ - nlm_setup_l3ctable_even(nae_base, 0, 4, 1, 9, 1, 0x8847); - /* l3off0 (8 bytes) -> l3len0 (1 byte) := ip proto - * l3off1 (12 bytes) -> l3len1 (4 bytes) := src ip - * l3off2 (16 bytes) -> l3len2 (4 bytes) := dst ip - */ - nlm_setup_l3ctable_odd(nae_base, 0, 9, 1, 12, 4, 16, 4); - - /* - * entry-1 is for ethernet IPv4 packets - */ - nlm_setup_l3ctable_even(nae_base, 1, 0, 1, 9, 1, 0x0800); - /* l3off0 (8 bytes) -> l3len0 (1 byte) := ip proto - * l3off1 (12 bytes) -> l3len1 (4 bytes) := src ip - * l3off2 (16 bytes) -> l3len2 (4 bytes) := dst ip - */ - nlm_setup_l3ctable_odd(nae_base, 1, 9, 1, 12, 4, 16, 4); - - /* - * entry-2 is for ethernet IPv6 packets - */ - nlm_setup_l3ctable_even(nae_base, 2, 0, 1, 6, 1, 0x86dd); - /* l3off0 (6 bytes) -> l3len0 (1 byte) := next header (ip proto) - * l3off1 (8 bytes) -> l3len1 (16 bytes) := src ip - * l3off2 (24 bytes) -> l3len2 (16 bytes) := dst ip - */ - nlm_setup_l3ctable_odd(nae_base, 2, 6, 1, 8, 16, 24, 16); - - /* - * entry-3 is for ethernet ARP packets - */ - nlm_setup_l3ctable_even(nae_base, 3, 0, 0, 9, 1, 0x0806); - /* extract 30 bytes from packet start */ - nlm_setup_l3ctable_odd(nae_base, 3, 0, 30, 0, 0, 0, 0); - - /* - * entry-4 is for ethernet FCoE packets - */ - nlm_setup_l3ctable_even(nae_base, 4, 0, 0, 9, 1, 0x8906); - /* FCoE packet consists of 4 byte start-of-frame, - * and 24 bytes of frame header, followed by - * 64 bytes of optional-header (ESP, network..), - * 2048 bytes of payload, 36 bytes of optional - * "fill bytes" or ESP trailer, 4 bytes of CRC, - * and 4 bytes of end-of-frame - * We extract the first 4 + 24 = 28 bytes - */ - nlm_setup_l3ctable_odd(nae_base, 4, 0, 28, 0, 0, 0, 0); - - /* - * entry-5 is for vlan tagged frames (0x8100) - */ - nlm_setup_l3ctable_even(nae_base, 5, 0, 0, 9, 1, 0x8100); - /* we extract 31 bytes from the payload */ - nlm_setup_l3ctable_odd(nae_base, 5, 0, 31, 0, 0, 0, 0); - - /* - * entry-6 is for ieee 802.1ad provider bridging - * tagged frames (0x88a8) - */ - nlm_setup_l3ctable_even(nae_base, 6, 0, 0, 9, 1, 0x88a8); - /* we extract 31 bytes from the payload */ - nlm_setup_l3ctable_odd(nae_base, 6, 0, 31, 0, 0, 0, 0); - - /* - * entry-7 is for Cisco's Q-in-Q tagged frames (0x9100) - */ - nlm_setup_l3ctable_even(nae_base, 7, 0, 0, 9, 1, 0x9100); - /* we extract 31 bytes from the payload */ - nlm_setup_l3ctable_odd(nae_base, 7, 0, 31, 0, 0, 0, 0); - - /* - * entry-8 is for Ethernet Jumbo frames (0x8870) - */ - nlm_setup_l3ctable_even(nae_base, 8, 0, 0, 9, 1, 0x8870); - /* we extract 31 bytes from the payload */ - nlm_setup_l3ctable_odd(nae_base, 8, 0, 31, 0, 0, 0, 0); - - /* - * entry-9 is for MPLS Multicast frames (0x8848) - */ - nlm_setup_l3ctable_even(nae_base, 9, 0, 0, 9, 1, 0x8848); - /* we extract 31 bytes from the payload */ - nlm_setup_l3ctable_odd(nae_base, 9, 0, 31, 0, 0, 0, 0); - - /* - * entry-10 is for IEEE 802.1ae MAC Security frames (0x88e5) - */ - nlm_setup_l3ctable_even(nae_base, 10, 0, 0, 9, 1, 0x88e5); - /* we extract 31 bytes from the payload */ - nlm_setup_l3ctable_odd(nae_base, 10, 0, 31, 0, 0, 0, 0); - - /* - * entry-11 is for PTP frames (0x88f7) - */ - nlm_setup_l3ctable_even(nae_base, 11, 0, 0, 9, 1, 0x88f7); - /* PTP messages can be sent as UDP messages over - * IPv4 or IPv6; and as a raw ethernet message - * with ethertype 0x88f7. The message contents - * are the same for UDP or ethernet based encapsulations - * The header is 34 bytes long, and we extract - * it all out. - */ - nlm_setup_l3ctable_odd(nae_base, 11, 0, 31, 31, 2, 0, 0); - - /* - * entry-12 is for ethernet Link Control Protocol (LCP) - * used with PPPoE - */ - nlm_setup_l3ctable_even(nae_base, 12, 0, 0, 9, 1, 0xc021); - /* LCP packet consists of 1 byte of code, 1 byte of - * identifier and two bytes of length followed by - * data (upto length bytes). - * We extract 4 bytes from start of packet - */ - nlm_setup_l3ctable_odd(nae_base, 12, 0, 4, 0, 0, 0, 0); - - /* - * entry-13 is for ethernet Link Quality Report (0xc025) - * used with PPPoE - */ - nlm_setup_l3ctable_even(nae_base, 13, 0, 0, 9, 1, 0xc025); - /* We extract 31 bytes from packet start */ - nlm_setup_l3ctable_odd(nae_base, 13, 0, 31, 0, 0, 0, 0); - - /* - * entry-14 is for PPPoE Session (0x8864) - */ - nlm_setup_l3ctable_even(nae_base, 14, 0, 0, 9, 1, 0x8864); - /* We extract 31 bytes from packet start */ - nlm_setup_l3ctable_odd(nae_base, 14, 0, 31, 0, 0, 0, 0); - - /* - * entry-15 - default entry - */ - nlm_setup_l3ctable_even(nae_base, 15, 0, 0, 0, 0, 0x0000); - /* We extract 31 bytes from packet start */ - nlm_setup_l3ctable_odd(nae_base, 15, 0, 31, 0, 0, 0, 0); - - /*********************************************** - * program L4 CAM table - ***********************************************/ - - /* - * entry-0 - tcp packets (0x6) - */ - nlm_setup_l4ctable_even(nae_base, 0, 0, 0, 1, 0, 0, 0x6); - /* tcp header is 20 bytes without tcp options - * We extract 20 bytes from tcp start */ - nlm_setup_l4ctable_odd(nae_base, 0, 0, 15, 15, 5); - - /* - * entry-1 - udp packets (0x11) - */ - nlm_setup_l4ctable_even(nae_base, 1, 0, 0, 1, 0, 0, 0x11); - /* udp header is 8 bytes in size. - * We extract 8 bytes from udp start */ - nlm_setup_l4ctable_odd(nae_base, 1, 0, 8, 0, 0); - - /* - * entry-2 - sctp packets (0x84) - */ - nlm_setup_l4ctable_even(nae_base, 2, 0, 0, 1, 0, 0, 0x84); - /* sctp packets have a 12 byte generic header - * and various chunks. - * We extract 12 bytes from sctp start */ - nlm_setup_l4ctable_odd(nae_base, 2, 0, 12, 0, 0); - - /* - * entry-3 - RDP packets (0x1b) - */ - nlm_setup_l4ctable_even(nae_base, 3, 0, 0, 1, 0, 0, 0x1b); - /* RDP packets have 18 bytes of generic header - * before variable header starts. - * We extract 18 bytes from rdp start */ - nlm_setup_l4ctable_odd(nae_base, 3, 0, 15, 15, 3); - - /* - * entry-4 - DCCP packets (0x21) - */ - nlm_setup_l4ctable_even(nae_base, 4, 0, 0, 1, 0, 0, 0x21); - /* DCCP has two types of generic headers of - * sizes 16 bytes and 12 bytes if X = 1. - * We extract 16 bytes from dccp start */ - nlm_setup_l4ctable_odd(nae_base, 4, 0, 15, 15, 1); - - /* - * entry-5 - ipv6 encapsulated in ipv4 packets (0x29) - */ - nlm_setup_l4ctable_even(nae_base, 5, 0, 0, 1, 0, 0, 0x29); - /* ipv4 header is 20 bytes excluding IP options. - * We extract 20 bytes from IPv4 start */ - nlm_setup_l4ctable_odd(nae_base, 5, 0, 15, 15, 5); - - /* - * entry-6 - ip in ip encapsulation packets (0x04) - */ - nlm_setup_l4ctable_even(nae_base, 6, 0, 0, 1, 0, 0, 0x04); - /* ipv4 header is 20 bytes excluding IP options. - * We extract 20 bytes from ipv4 start */ - nlm_setup_l4ctable_odd(nae_base, 6, 0, 15, 15, 5); - - /* - * entry-7 - default entry (0x0) - */ - nlm_setup_l4ctable_even(nae_base, 7, 0, 0, 1, 0, 0, 0x0); - /* We extract 20 bytes from packet start */ - nlm_setup_l4ctable_odd(nae_base, 7, 0, 15, 15, 5); -} - -void -nlm_enable_hardware_parser_per_port(uint64_t nae_base, int block, int port) -{ - int hwport = (block * 4) + (port & 0x3); - - /* program L2 and L3 header extraction for each port */ - /* enable ethernet L2 mode on port */ - nlm_setup_l2type(nae_base, hwport, 0, 0, 0, 0, 0, 1); - - /* l2proto and ethtype included in l3cam */ - nlm_setup_l3ctable_mask(nae_base, hwport, 1, 0); -} - -void -nlm_prepad_enable(uint64_t nae_base, int size) -{ - uint32_t val; - - val = nlm_read_nae_reg(nae_base, NAE_RX_CONFIG); - val |= (1 << 13); /* prepad enable */ - val |= ((size & 0x3) << 22); /* prepad size */ - nlm_write_nae_reg(nae_base, NAE_RX_CONFIG, val); -} - -void -nlm_setup_1588_timer(uint64_t nae_base, struct nae_port_config *cfg) -{ - uint32_t hi, lo, val; - - hi = cfg[0].ieee1588_userval >> 32; - lo = cfg[0].ieee1588_userval & 0xffffffff; - nlm_write_nae_reg(nae_base, NAE_1588_PTP_USER_VALUE_HI, hi); - nlm_write_nae_reg(nae_base, NAE_1588_PTP_USER_VALUE_LO, lo); - - hi = cfg[0].ieee1588_ptpoff >> 32; - lo = cfg[0].ieee1588_ptpoff & 0xffffffff; - nlm_write_nae_reg(nae_base, NAE_1588_PTP_OFFSET_HI, hi); - nlm_write_nae_reg(nae_base, NAE_1588_PTP_OFFSET_LO, lo); - - hi = cfg[0].ieee1588_tmr1 >> 32; - lo = cfg[0].ieee1588_tmr1 & 0xffffffff; - nlm_write_nae_reg(nae_base, NAE_1588_PTP_TMR1_HI, hi); - nlm_write_nae_reg(nae_base, NAE_1588_PTP_TMR1_LO, lo); - - hi = cfg[0].ieee1588_tmr2 >> 32; - lo = cfg[0].ieee1588_tmr2 & 0xffffffff; - nlm_write_nae_reg(nae_base, NAE_1588_PTP_TMR2_HI, hi); - nlm_write_nae_reg(nae_base, NAE_1588_PTP_TMR2_LO, lo); - - hi = cfg[0].ieee1588_tmr3 >> 32; - lo = cfg[0].ieee1588_tmr3 & 0xffffffff; - nlm_write_nae_reg(nae_base, NAE_1588_PTP_TMR3_HI, hi); - nlm_write_nae_reg(nae_base, NAE_1588_PTP_TMR3_LO, lo); - - nlm_write_nae_reg(nae_base, NAE_1588_PTP_INC_INTG, - cfg[0].ieee1588_inc_intg); - nlm_write_nae_reg(nae_base, NAE_1588_PTP_INC_NUM, - cfg[0].ieee1588_inc_num); - nlm_write_nae_reg(nae_base, NAE_1588_PTP_INC_DEN, - cfg[0].ieee1588_inc_den); - - val = nlm_read_nae_reg(nae_base, NAE_1588_PTP_CONTROL); - /* set and clear freq_mul = 1 */ - nlm_write_nae_reg(nae_base, NAE_1588_PTP_CONTROL, val | (0x1 << 1)); - nlm_write_nae_reg(nae_base, NAE_1588_PTP_CONTROL, val); - /* set and clear load_user_val = 1 */ - nlm_write_nae_reg(nae_base, NAE_1588_PTP_CONTROL, val | (0x1 << 6)); - nlm_write_nae_reg(nae_base, NAE_1588_PTP_CONTROL, val); -} - -void -nlm_mac_enable(uint64_t nae_base, int nblock, int port_type, int port) -{ - uint32_t mac_cfg1, xaui_cfg; - uint32_t netwk_inf; - int iface = port & 0x3; - - switch(port_type) { - case SGMIIC: - netwk_inf = nlm_read_nae_reg(nae_base, - SGMII_NET_IFACE_CTRL(nblock, iface)); - nlm_write_nae_reg(nae_base, - SGMII_NET_IFACE_CTRL(nblock, iface), - netwk_inf | - (1 << 2)); /* enable tx */ - mac_cfg1 = nlm_read_nae_reg(nae_base, - SGMII_MAC_CONF1(nblock, iface)); - nlm_write_nae_reg(nae_base, - SGMII_MAC_CONF1(nblock, iface), - mac_cfg1 | - (1 << 2) | /* rx enable */ - 1); /* tx enable */ - break; - case XAUIC: - xaui_cfg = nlm_read_nae_reg(nae_base, - XAUI_CONFIG1(nblock)); - nlm_write_nae_reg(nae_base, - XAUI_CONFIG1(nblock), - xaui_cfg | - XAUI_CONFIG_TFEN | - XAUI_CONFIG_RFEN); - break; - case ILC: - break; - } -} - -void -nlm_mac_disable(uint64_t nae_base, int nblock, int port_type, int port) -{ - uint32_t mac_cfg1, xaui_cfg; - uint32_t netwk_inf; - int iface = port & 0x3; - - switch(port_type) { - case SGMIIC: - mac_cfg1 = nlm_read_nae_reg(nae_base, - SGMII_MAC_CONF1(nblock, iface)); - nlm_write_nae_reg(nae_base, - SGMII_MAC_CONF1(nblock, iface), - mac_cfg1 & - ~((1 << 2) | /* rx enable */ - 1)); /* tx enable */ - netwk_inf = nlm_read_nae_reg(nae_base, - SGMII_NET_IFACE_CTRL(nblock, iface)); - nlm_write_nae_reg(nae_base, - SGMII_NET_IFACE_CTRL(nblock, iface), - netwk_inf & - ~(1 << 2)); /* enable tx */ - break; - case XAUIC: - xaui_cfg = nlm_read_nae_reg(nae_base, - XAUI_CONFIG1(nblock)); - nlm_write_nae_reg(nae_base, - XAUI_CONFIG1(nblock), - xaui_cfg & - ~(XAUI_CONFIG_TFEN | - XAUI_CONFIG_RFEN)); - break; - case ILC: - break; - } -} - -/* - * Set IOR credits for the ports in ifmask to valmask - */ -static void -nlm_nae_set_ior_credit(uint64_t nae_base, uint32_t ifmask, uint32_t valmask) -{ - uint32_t tx_config, tx_ior_credit; - - tx_ior_credit = nlm_read_nae_reg(nae_base, NAE_TX_IORCRDT_INIT); - tx_ior_credit &= ~ifmask; - tx_ior_credit |= valmask; - nlm_write_nae_reg(nae_base, NAE_TX_IORCRDT_INIT, tx_ior_credit); - - tx_config = nlm_read_nae_reg(nae_base, NAE_TX_CONFIG); - /* need to toggle these bits for credits to be loaded */ - nlm_write_nae_reg(nae_base, NAE_TX_CONFIG, - tx_config | (TXINITIORCR(ifmask))); - nlm_write_nae_reg(nae_base, NAE_TX_CONFIG, - tx_config & ~(TXINITIORCR(ifmask))); -} - -int -nlm_nae_open_if(uint64_t nae_base, int nblock, int port_type, - int port, uint32_t desc_size) -{ - uint32_t netwk_inf; - uint32_t mac_cfg1, netior_ctrl3; - int iface, iface_ctrl_reg, iface_ctrl3_reg, conf1_reg, conf2_reg; - - switch (port_type) { - case XAUIC: - netwk_inf = nlm_read_nae_reg(nae_base, - XAUI_NETIOR_XGMAC_CTRL1(nblock)); - netwk_inf |= (1 << NETIOR_XGMAC_STATS_CLR_POS); - nlm_write_nae_reg(nae_base, - XAUI_NETIOR_XGMAC_CTRL1(nblock), netwk_inf); - - nlm_nae_set_ior_credit(nae_base, 0xf << port, 0xf << port); - break; - - case ILC: - nlm_nae_set_ior_credit(nae_base, 0xff << port, 0xff << port); - break; - - case SGMIIC: - nlm_nae_set_ior_credit(nae_base, 0x1 << port, 0); - - /* - * XXXJC: split this and merge to sgmii.c - * some of this is duplicated from there. - */ - /* init phy id to access internal PCS */ - iface = port & 0x3; - iface_ctrl_reg = SGMII_NET_IFACE_CTRL(nblock, iface); - conf1_reg = SGMII_MAC_CONF1(nblock, iface); - conf2_reg = SGMII_MAC_CONF2(nblock, iface); - - netwk_inf = nlm_read_nae_reg(nae_base, iface_ctrl_reg); - netwk_inf &= 0x7ffffff; - netwk_inf |= (port << 27); - nlm_write_nae_reg(nae_base, iface_ctrl_reg, netwk_inf); - - /* Sofreset sgmii port - set bit 11 to 0 */ - netwk_inf &= 0xfffff7ff; - nlm_write_nae_reg(nae_base, iface_ctrl_reg, netwk_inf); - - /* Reset Gmac */ - mac_cfg1 = nlm_read_nae_reg(nae_base, conf1_reg); - nlm_write_nae_reg(nae_base, conf1_reg, - mac_cfg1 | - (1U << 31) | /* soft reset */ - (1 << 2) | /* rx enable */ - (1)); /* tx enable */ - - /* default to 1G */ - nlm_write_nae_reg(nae_base, - conf2_reg, - (0x7 << 12) | /* interface preamble length */ - (0x2 << 8) | /* interface mode */ - (0x1 << 2) | /* pad crc enable */ - (0x1)); /* full duplex */ - - /* clear gmac reset */ - mac_cfg1 = nlm_read_nae_reg(nae_base, conf1_reg); - nlm_write_nae_reg(nae_base, conf1_reg, mac_cfg1 & ~(1U << 31)); - - /* clear speed debug bit */ - iface_ctrl3_reg = SGMII_NET_IFACE_CTRL3(nblock, iface); - netior_ctrl3 = nlm_read_nae_reg(nae_base, iface_ctrl3_reg); - nlm_write_nae_reg(nae_base, iface_ctrl3_reg, - netior_ctrl3 & ~(1 << 6)); - - /* disable TX, RX for now */ - mac_cfg1 = nlm_read_nae_reg(nae_base, conf1_reg); - nlm_write_nae_reg(nae_base, conf1_reg, mac_cfg1 & ~(0x5)); - netwk_inf = nlm_read_nae_reg(nae_base, iface_ctrl_reg); - nlm_write_nae_reg(nae_base, iface_ctrl_reg, - netwk_inf & ~(0x1 << 2)); - - /* clear stats counters */ - netwk_inf = nlm_read_nae_reg(nae_base, iface_ctrl_reg); - nlm_write_nae_reg(nae_base, iface_ctrl_reg, - netwk_inf | (1 << 15)); - - /* enable stats counters */ - netwk_inf = nlm_read_nae_reg(nae_base, iface_ctrl_reg); - nlm_write_nae_reg(nae_base, iface_ctrl_reg, - (netwk_inf & ~(1 << 15)) | (1 << 16)); - - /* flow control? */ - mac_cfg1 = nlm_read_nae_reg(nae_base, conf1_reg); - nlm_write_nae_reg(nae_base, conf1_reg, - mac_cfg1 | (0x3 << 4)); - break; - } - - nlm_nae_init_ingress(nae_base, desc_size); - nlm_nae_init_egress(nae_base); - - return (0); -} diff --git a/sys/mips/nlm/dev/net/sgmii.c b/sys/mips/nlm/dev/net/sgmii.c deleted file mode 100644 index bd14d60c9fd..00000000000 --- a/sys/mips/nlm/dev/net/sgmii.c +++ /dev/null @@ -1,210 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -void -nlm_configure_sgmii_interface(uint64_t nae_base, int block, int port, - int mtu, int loopback) -{ - uint32_t data1, data2; - - /* Apply a soft reset */ - data1 = (0x1 << 31); /* soft reset */ - if (loopback) - data1 |= (0x01 << 8); - data1 |= (0x01 << 2); /* Rx enable */ - data1 |= 0x01; /* Tx enable */ - nlm_write_nae_reg(nae_base, NAE_REG(block, port, MAC_CONF1), data1); - - data2 = (0x7 << 12) | /* pre-amble length=7 */ - (0x2 << 8) | /* byteMode */ - 0x1; /* fullDuplex */ - nlm_write_nae_reg(nae_base, NAE_REG(block, port, MAC_CONF2), data2); - - /* Remove a soft reset */ - data1 &= ~(0x01 << 31); - nlm_write_nae_reg(nae_base, NAE_REG(block, port, MAC_CONF1), data1); - - /* setup sgmii max frame length */ - nlm_write_nae_reg(nae_base, SGMII_MAX_FRAME(block, port), mtu); -} - -void -nlm_sgmii_pcs_init(uint64_t nae_base, uint32_t cplx_mask) -{ - xlp_nae_config_lane_gmac(nae_base, cplx_mask); -} - -void -nlm_nae_setup_mac(uint64_t nae_base, int nblock, int iface, int reset, - int rx_en, int tx_en, int speed, int duplex) -{ - uint32_t mac_cfg1, mac_cfg2, netwk_inf; - - mac_cfg1 = nlm_read_nae_reg(nae_base, - SGMII_MAC_CONF1(nblock,iface)); - mac_cfg2 = nlm_read_nae_reg(nae_base, - SGMII_MAC_CONF2(nblock,iface)); - netwk_inf = nlm_read_nae_reg(nae_base, - SGMII_NET_IFACE_CTRL(nblock, iface)); - - mac_cfg1 &= ~(0x1 << 31); /* remove reset */ - mac_cfg1 &= ~(0x1 << 2); /* remove rx */ - mac_cfg1 &= ~(0x1); /* remove tx */ - mac_cfg2 &= ~(0x3 << 8); /* remove interface mode bits */ - mac_cfg2 &= ~(0x1); /* remove duplex */ - netwk_inf &= ~(0x1 << 2); /* remove tx */ - netwk_inf &= ~(0x3); /* remove speed */ - - switch (speed) { - case NLM_SGMII_SPEED_10: - netwk_inf |= 0x0; /* 2.5 Mhz clock for 10 Mbps */ - mac_cfg2 |= (0x1 << 8); /* enable 10/100 Mbps */ - break; - case NLM_SGMII_SPEED_100: - netwk_inf |= 0x1; /* 25 Mhz clock for 100 Mbps */ - mac_cfg2 |= (0x1 << 8); /* enable 10/100 Mbps */ - break; - default: /* make it as 1G */ - netwk_inf |= 0x2; /* 125 Mhz clock for 1G */ - mac_cfg2 |= (0x2 << 8); /* enable 1G */ - break; - } - - if (reset) - mac_cfg1 |= (0x1 << 31); /* set reset */ - - if (rx_en) - mac_cfg1 |= (0x1 << 2); /* set rx */ - - nlm_write_nae_reg(nae_base, - SGMII_NET_IFACE_CTRL(nblock, iface), - netwk_inf); - - if (tx_en) { - mac_cfg1 |= 0x1; /* set tx */ - netwk_inf |= (0x1 << 2); /* set tx */ - } - - switch (duplex) { - case NLM_SGMII_DUPLEX_HALF: - /* duplexity is already set to half duplex */ - break; - default: - mac_cfg2 |= 0x1; /* set full duplex */ - } - - nlm_write_nae_reg(nae_base, SGMII_MAC_CONF1(nblock, iface), mac_cfg1); - nlm_write_nae_reg(nae_base, SGMII_MAC_CONF2(nblock, iface), mac_cfg2); - nlm_write_nae_reg(nae_base, SGMII_NET_IFACE_CTRL(nblock, iface), - netwk_inf); -} - -void -nlm_nae_setup_rx_mode_sgmii(uint64_t base, int nblock, int iface, int port_type, - int broadcast_en, int multicast_en, int pause_en, int promisc_en) -{ - uint32_t val; - - /* bit[17] of vlan_typefilter - allows packet matching in MAC. - * When DA filtering is disabled, this bit and bit[16] should - * be zero. - * bit[16] of vlan_typefilter - Allows hash matching to be used - * for DA filtering. When DA filtering is disabled, this bit and - * bit[17] should be zero. - * Both bits have to be set only if you want to turn on both - * features / modes. - */ - if (promisc_en == 1) { - val = nlm_read_nae_reg(base, - SGMII_NETIOR_VLANTYPE_FILTER(nblock, iface)); - val &= (~(0x3 << 16)); - nlm_write_nae_reg(base, - SGMII_NETIOR_VLANTYPE_FILTER(nblock, iface), val); - } else { - val = nlm_read_nae_reg(base, - SGMII_NETIOR_VLANTYPE_FILTER(nblock, iface)); - val |= (0x1 << 17); - nlm_write_nae_reg(base, - SGMII_NETIOR_VLANTYPE_FILTER(nblock, iface), val); - } - - val = ((broadcast_en & 0x1) << 10) | - ((pause_en & 0x1) << 9) | - ((multicast_en & 0x1) << 8) | - ((promisc_en & 0x1) << 7) | /* unicast_enable - enables promisc mode */ - 1; /* MAC address is always valid */ - - nlm_write_nae_reg(base, SGMII_MAC_FILTER_CONFIG(nblock, iface), val); - -} - -void -nlm_nae_setup_mac_addr_sgmii(uint64_t base, int nblock, int iface, - int port_type, uint8_t *mac_addr) -{ - nlm_write_nae_reg(base, - SGMII_MAC_ADDR0_LO(nblock, iface), - (mac_addr[5] << 24) | - (mac_addr[4] << 16) | - (mac_addr[3] << 8) | - mac_addr[2]); - - nlm_write_nae_reg(base, - SGMII_MAC_ADDR0_HI(nblock, iface), - (mac_addr[1] << 24) | - (mac_addr[0] << 16)); - - nlm_write_nae_reg(base, - SGMII_MAC_ADDR_MASK0_LO(nblock, iface), - 0xffffffff); - nlm_write_nae_reg(base, - SGMII_MAC_ADDR_MASK0_HI(nblock, iface), - 0xffffffff); - - nlm_nae_setup_rx_mode_sgmii(base, nblock, iface, - SGMIIC, - 1, /* broadcast enabled */ - 1, /* multicast enabled */ - 0, /* do not accept pause frames */ - 0 /* promisc mode disabled */ - ); -} diff --git a/sys/mips/nlm/dev/net/ucore/crt0_basic.S b/sys/mips/nlm/dev/net/ucore/crt0_basic.S deleted file mode 100644 index f06c62c851e..00000000000 --- a/sys/mips/nlm/dev/net/ucore/crt0_basic.S +++ /dev/null @@ -1,64 +0,0 @@ -/*- - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include - - .text - .align 2 - .globl _start - .ent _start -_start: - .set noreorder - la gp, _gp - .end _start - - .globl __stack - - .ent zerobss -zerobss: - la v0, _fbss - la v1, _end -3: - sw zero, 0(v0) - bltu v0,v1,3b - addiu v0,v0,4 # executed in delay slot - la sp, __stack # set stack pointer - .end zerobss - - .ent init -init: - addiu a1,sp,32 # argv = sp + 32 - addiu a2,sp,40 # envp = sp + 40 - sw zero,(a1) # argv[argc] = 0 - sw zero,(a2) # envp[0] = 0 - jal main # call the program start function - move a0,zero # set argc to 0 -1: b 1b - nop - .end init - diff --git a/sys/mips/nlm/dev/net/ucore/ld.ucore.S b/sys/mips/nlm/dev/net/ucore/ld.ucore.S deleted file mode 100644 index 3f499a03173..00000000000 --- a/sys/mips/nlm/dev/net/ucore/ld.ucore.S +++ /dev/null @@ -1,160 +0,0 @@ -/*- - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -OUTPUT_ARCH(mips) -ENTRY(_start) -__DYNAMIC = 0; - -SECTIONS -{ - . = 0x0; - _loadaddr = . ; - - /* ----------------------------------------- */ - - .text : { - _ftext = . ; - PROVIDE (eprol = .); - _shim_reg = . ; - *(.text) - *(.text.*) - *(.gnu.linkonce.t*) - *(.mips16.fn.*) - *(.mips16.call.*) - } - .init : { - KEEP(*(.init)) - *(.init) - } - .fini : { - *(.fini) - } - .rel.sdata : { - PROVIDE (__runtime_reloc_start = .); - *(.rel.sdata) - PROVIDE (__runtime_reloc_stop = .); - } - PROVIDE (etext = .); - .ctors : - { - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - } - .dtors : - { - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - } - . = .; - .rodata : { - *(.rdata) - *(.rodata) - *(.rodata.*) - *(.gnu.linkonce.r*) - } - . = . + (0x1000 - .) ; - - /* ----------------------------------------- */ - - . = 0x8000 ; - magicstart = . ; - .magicregs : { - *(.magicregs) - } - magicend = . ; - - /* ----------------------------------------- */ - - . = 0x18000 ; - shmemstart = . ; - .sharedmem : { - *(.sharedmem) - } - shmemend = . ; - - /* ----------------------------------------- */ - - . = 0xFF800 ; - .data : { - *(.data) - *(.data.*) - *(.gnu.linkonce.d*) - } - . = ALIGN(8); - .lit8 : { - *(.lit8) - } - .lit4 : { - *(.lit4) - } - .sdata : { - *(.sdata) - *(.sdata.*) - *(.gnu.linkonce.s*) - } - . = ALIGN (8); - PROVIDE (edata = .); - _edata = .; - _fbss = .; - .sbss : { - *(.sbss) - *(.scommon) - } - .bss : { - _bss_start = . ; - *(.bss) - *(COMMON) - } - _bss_end = . ; - _end = .; - - _gp = . ; - __global = _gp ; - . = ALIGN (8); - - PROVIDE(__stackmarker = .) ; - - . = 0xFFA00 ; - - /* 32 + 4(argc) + 4(argv), aligned to 64 */ - PROVIDE(__stack = . - 64); - - /* ----------------------------------------- */ - - . = 0xFFE00 ; - .pktbuf : { - *(.pktbuf) - } - . = . + (0x100000 - .) ; - - PROVIDE(_endaddr = 0x0 + 0x100000); -} diff --git a/sys/mips/nlm/dev/net/ucore/ucore.h b/sys/mips/nlm/dev/net/ucore/ucore.h deleted file mode 100644 index 941420ace34..00000000000 --- a/sys/mips/nlm/dev/net/ucore/ucore.h +++ /dev/null @@ -1,351 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef __NLM_UCORE_H__ -#define __NLM_UCORE_H__ - -/* Microcode registers */ -#define UCORE_OUTBUF_DONE 0x8000 -#define UCORE_RX_PKT_RDY 0x8004 -#define UCORE_RX_PKT_INFO 0x8008 -#define UCORE_CAM0 0x800c -#define UCORE_CAM1 0x8010 -#define UCORE_CAM2 0x8014 -#define UCORE_CAM3 0x8018 -#define UCORE_CAM_RESULT 0x801c -#define UCORE_CSUMINFO 0x8020 -#define UCORE_CRCINFO 0x8024 -#define UCORE_CRCPOS 0x8028 -#define UCORE_FR_FIFOEMPTY 0x802c -#define UCORE_PKT_DISTR 0x8030 - -#define PACKET_MEMORY 0xFFE00 -#define PACKET_DATA_OFFSET 64 -#define SHARED_SCRATCH_MEM 0x18000 - -/* Distribution mode */ -#define VAL_PDM(x) (((x) & 0x7) << 0) - -/* Dest distribution or distribution list */ -#define VAL_DEST(x) (((x) & 0x3ff) << 8) -#define VAL_PDL(x) (((x) & 0xf) << 4) - -/*output buffer done*/ -#define VAL_FSV(x) (x << 19) -#define VAL_FFS(x) (x << 14) - -#define FWD_DEST_ONLY 1 -#define FWD_ENQ_DIST_VEC 2 -#define FWD_ENQ_DEST 3 -#define FWD_DIST_VEC 4 -#define FWD_ENQ_DIST_VEC_SER 6 -#define FWD_ENQ_DEST_SER 7 - -#define USE_HASH_DST (1 << 20) - -static __inline unsigned int -nlm_read_ucore_reg(int reg) -{ - volatile unsigned int *addr = (volatile void *)reg; - - return (*addr); -} - -static __inline void -nlm_write_ucore_reg(int reg, unsigned int val) -{ - volatile unsigned int *addr = (volatile void *)reg; - - *addr = val; -} - -#define NLM_DEFINE_UCORE(name, reg) \ -static __inline unsigned int \ -nlm_read_ucore_##name(void) \ -{ \ - return nlm_read_ucore_reg(reg); \ -} \ - \ -static __inline void \ -nlm_write_ucore_##name(unsigned int v) \ -{ \ - nlm_write_ucore_reg(reg, v); \ -} struct __hack - -NLM_DEFINE_UCORE(obufdone, UCORE_OUTBUF_DONE); -NLM_DEFINE_UCORE(rxpktrdy, UCORE_RX_PKT_RDY); -NLM_DEFINE_UCORE(rxpktinfo, UCORE_RX_PKT_INFO); -NLM_DEFINE_UCORE(cam0, UCORE_CAM0); -NLM_DEFINE_UCORE(cam1, UCORE_CAM1); -NLM_DEFINE_UCORE(cam2, UCORE_CAM2); -NLM_DEFINE_UCORE(cam3, UCORE_CAM3); -NLM_DEFINE_UCORE(camresult, UCORE_CAM_RESULT); -NLM_DEFINE_UCORE(csuminfo, UCORE_CSUMINFO); -NLM_DEFINE_UCORE(crcinfo, UCORE_CRCINFO); -NLM_DEFINE_UCORE(crcpos, UCORE_CRCPOS); -NLM_DEFINE_UCORE(freefifo_empty, UCORE_FR_FIFOEMPTY); -NLM_DEFINE_UCORE(pktdistr, UCORE_PKT_DISTR); - -/* - * l3cachelines - number of cache lines to allocate into l3 - * fsv - 0 : use interface-id for selecting the free fifo pool - * 1 : use free fifo pool selected by FFS field - * ffs - selects which free fifo pool to use to take a free fifo - * prepad_en - If this field is set to 1, part or all of the - * 64 byte prepad seen by micro engines, is written - * infront of every packet. - * prepad_ovride - If this field is 1, the ucore system uses - * prepad configuration defined in this register, - * 0 means that it uses the configuration defined - * in NAE RX_CONFIG register - * prepad_size - number of 16 byte words in the 64-byte prepad - * seen by micro engines and dma'ed to memory as - * pkt prepad. This field is meaningful only if - * prepad_en and prepad_ovride is set. - * 0 : 1 word - * 1 : 2 words - * 2 : 3 words - * 3 : 4 words - * prepad[0-3]: writing 0 to this means that the 1st 16 byte offset - * of prepad in micro engine, gets setup as prepad0/1/2/3. - * prepad word. - * 1 : means 2nd 16 byte chunk in prepad0/1/2/3 - * 2 : means 3rd 16 byte chunk in prepad0/1/2/3 - * 3 : means 4rth 16 byte chunk in prepad0/1/2/3 - * pkt_discard - packet will be discarded if this is set to 1 - * rd5 - value (single bit) to be inserted in bit 5, the unclassified - * pkt bit of receive descriptor. If this bit is set, HPRE bit - * should also be set in ucore_rxpktready register - */ -static __inline__ void -nlm_ucore_pkt_done(int l3cachelines, int fsv, int ffs, int prepad_en, - int prepad_ovride, int prepad_size, int prepad0, int prepad1, - int prepad2, int prepad3, int pkt_discard, int rd5) -{ - unsigned int val = 0; - - val |= ((l3cachelines & 0xfff) << 20); - val |= ((fsv & 0x1) << 19); - val |= ((ffs & 0x1f) << 14); - val |= ((prepad_en & 0x1) << 3); - val |= ((prepad_ovride & 0x1) << 2); - val |= ((prepad_size & 0x3) << 12); - val |= ((prepad0 & 0x3) << 4); - val |= ((prepad1 & 0x3) << 6); - val |= ((prepad2 & 0x3) << 8); - val |= ((prepad3 & 0x3) << 10); - val |= ((pkt_discard & 0x1) << 1); - val |= ((rd5 & 0x1) << 0); - - nlm_write_ucore_obufdone(val); -} - -/* Get the class full vector field from POE. - * The POE maintains a threshold for each class. - * A bit in this field will be set corresponding to the class approaching - * class full status. - */ -static __inline__ int -nlm_ucore_get_rxpkt_poeclassfullvec(unsigned int pktrdy) -{ - return ((pktrdy >> 24) & 0xff); -} - -/* This function returns 1 if the hardware parser extraction process - * resulted in an error. Else, returns 0. - */ -static __inline__ int -nlm_ucore_get_rxpkt_hwparsererr(unsigned int pktrdy) -{ - return ((pktrdy >> 23) & 0x1); -} - -/* This function returns the context number assigned to incoming - * packet - */ -static __inline__ int -nlm_ucore_get_rxpkt_context(unsigned int pktrdy) -{ - return ((pktrdy >> 13) & 0x3ff); -} - -/* this function returns the channel number of incoming packet, - * and applies only to interlaken. - */ -static __inline__ int -nlm_ucore_get_rxpkt_channel(unsigned int pktrdy) -{ - return ((pktrdy >> 5) & 0xff); -} - -/* This function returns the interface number on which the pkt - * was received - */ -static __inline__ int -nlm_ucore_get_rxpkt_interface(unsigned int pktrdy) -{ - return (pktrdy & 0x1f); -} - -/* This function returns 1 if end of packet (EOP) is set in - * packet data. - */ -static __inline__ int -nlm_ucore_get_rxpkt_eop(unsigned int rxpkt_info) -{ - return ((rxpkt_info >> 9) & 0x1); -} - -/* This function returns packet length of received pkt */ -static __inline__ int -nlm_ucore_get_rxpktlen(unsigned int rxpkt_info) -{ - return (rxpkt_info & 0x1ff); -} - -/* this function sets up the ucore TCAM keys. */ -static __inline__ void -nlm_ucore_setup_camkey(unsigned int cam_key0, unsigned int cam_key1, - unsigned int cam_key2, unsigned int cam_key3) -{ - nlm_write_ucore_cam0(cam_key0); - nlm_write_ucore_cam1(cam_key1); - nlm_write_ucore_cam2(cam_key2); - nlm_write_ucore_cam3(cam_key3); -} - -/* This function checks if the cam result is valid or not. - * If valid, it returns the result, else it returns 0. - */ -static __inline__ int -nlm_ucore_get_cam_result(unsigned int cam_result) -{ - if (((cam_result >> 15) & 0x1) == 1) /* valid result */ - return (cam_result & 0x3fff); - - return 0; -} - -/* This function sets up the csum in ucore. - * iphdr_start - defines the start of ip header (to check - is this byte - * position???) - * iphdr_len - This field is auto filled by h/w parser if zero, else - * the value defined will be used. - */ -static __inline__ void -nlm_ucore_csum_setup(int iphdr_start, int iphdr_len) -{ - unsigned int val = 0; - - val |= ((iphdr_len & 0xff) << 8); - val |= (iphdr_len & 0xff); - nlm_write_ucore_csuminfo(val); -} - -/* crcpos - position of crc in pkt. If crc position is within startcrc and - * endcrc, zero out these bytes in the packet before computing crc. This - * field is not needed for FCoE. - * cps - If 1, uses the polynomial in RX_CRC_POLY1 of NAE register. - * if 0, uses the polynomial in RX_CRC_POLY0 of NAE register. - * fcoe - If this is 1, crc calculation starts from 'startCRC' and the CRC - * engine ends calculation before the last byte. - * cbm - if 1, enables crc byte mirroring, where bits within a byte will get - * reversed (mirrored) during calculation of crc. - * cfi - If 1, performs a final inversion of crc before comarison is done during - * pkt reception. - * startcrc - This field is always required for both FCoE and SCTP crc. - * endcrc - This information needs to be setup only for SCTP. For FCoE this - * information is provided by hardware. - * valid - if set to 1, CRC status is placed into bit 2 of rx descriptor - * if set to 0, TCP checksum status is placed into bit 2 of rx descriptor - * keysize - defines the number of bytes in the pre-pad that contains the key - */ -static __inline__ void -nlm_ucore_crc_setup(int crcpos, int cps, int cfi, int cbm, int fcoe, - int keysize, int valid, int startcrc, int endcrc) -{ - unsigned int val = 0; - - val |= ((cfi & 0x1) << 20); - val |= ((cbm & 0x1) << 19); - val |= ((fcoe & 0x1) << 18); - val |= ((cps & 0x1) << 16); - val |= (crcpos & 0xffff); - - nlm_write_ucore_crcpos(val); - - val = 0; - val |= ((keysize & 0x3f) << 25); - val |= ((valid & 0x1) << 24); - val |= ((endcrc & 0xffff) << 8); - val |= (startcrc & 0xff); - - nlm_write_ucore_crcinfo(val); -} - -/* This function returns a fifo empty vector, where each bit provides - * the status of a fifo pool, where if the pool is empty the bit gets - * set to 1. - */ -static __inline__ int -nlm_ucore_get_fifoempty(unsigned int fifoempty) -{ - return (fifoempty & 0xfffff); -} - -/* This function controls how POE will distribute the packet. - * pdm - is the packet distribution mode, where - * 0x0 - means packet distribution mode is not used - * 0x1 - means forwarding based on destination only (no enqueue) - * 0x2 - means forwarding based on FID and distr vector (enqueue) - * 0x3 - means forwarding based on dest and FID (enqueue) - * 0x4 - means forwarding based on distr vec (no enqueue) - * 0x6 - means forward based on FID (enqueue), distr vec and serial mode - * 0x7 - means forward based on FID (enqueue), dest and serial mode - * mc3 - If 1, then the 3 most significant bits of distribution list are taken - * from context->class_table - * pdl - poe distribution list - * dest - fixed destination setup - * hash - if 1, use hash based destination - */ -static __inline__ void -nlm_ucore_setup_poepktdistr(int pdm, int mc3, int pdl, int dest, int hash) -{ - unsigned int val = 0; - - val |= ((hash & 0x1) << 20); - val |= ((dest & 0xfff) << 8); - val |= ((pdl & 0xf) << 4); - val |= ((mc3 & 0x1) << 3); - val |= (pdm & 0x7); - - nlm_write_ucore_pktdistr(val); -} - -#endif diff --git a/sys/mips/nlm/dev/net/ucore/ucore_app.c b/sys/mips/nlm/dev/net/ucore/ucore_app.c deleted file mode 100644 index 152d45d210b..00000000000 --- a/sys/mips/nlm/dev/net/ucore/ucore_app.c +++ /dev/null @@ -1,46 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include "ucore.h" - -int main(void) -{ - int num_cachelines = 1518 / 64 ; /* pktsize / L3 cacheline size */ - - /* Spray packets to using distribution vector */ - while (1) { - (void)nlm_read_ucore_rxpktrdy(); - nlm_ucore_setup_poepktdistr(FWD_DIST_VEC, 0, 0, 0, 0); - nlm_ucore_pkt_done(num_cachelines, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0); - } - - return (0); -} diff --git a/sys/mips/nlm/dev/net/xaui.c b/sys/mips/nlm/dev/net/xaui.c deleted file mode 100644 index 654e09d61c2..00000000000 --- a/sys/mips/nlm/dev/net/xaui.c +++ /dev/null @@ -1,249 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -void -nlm_xaui_pcs_init(uint64_t nae_base, int xaui_cplx_mask) -{ - int block, lane_ctrl, reg; - int cplx_lane_enable; - int lane_enable = 0; - uint32_t regval; - - cplx_lane_enable = LM_XAUI | - (LM_XAUI << 4) | - (LM_XAUI << 8) | - (LM_XAUI << 12); - - if (xaui_cplx_mask == 0) - return; - - /* write 0x2 to enable SGMII for all lane */ - block = 7; - - if (xaui_cplx_mask & 0x3) { /* Complexes 0, 1 */ - lane_enable = nlm_read_nae_reg(nae_base, - NAE_REG(block, LANE_CFG, LANE_CFG_CPLX_0_1)); - if (xaui_cplx_mask & 0x1) { /* Complex 0 */ - lane_enable &= ~(0xFFFF); - lane_enable |= cplx_lane_enable; - } - if (xaui_cplx_mask & 0x2) { /* Complex 1 */ - lane_enable &= ~(0xFFFF<<16); - lane_enable |= (cplx_lane_enable << 16); - } - nlm_write_nae_reg(nae_base, - NAE_REG(block, LANE_CFG, LANE_CFG_CPLX_0_1), - lane_enable); - } - lane_enable = 0; - if (xaui_cplx_mask & 0xc) { /* Complexes 2, 3 */ - lane_enable = nlm_read_nae_reg(nae_base, - NAE_REG(block, LANE_CFG, LANE_CFG_CPLX_2_3)); - if (xaui_cplx_mask & 0x4) { /* Complex 2 */ - lane_enable &= ~(0xFFFF); - lane_enable |= cplx_lane_enable; - } - if (xaui_cplx_mask & 0x8) { /* Complex 3 */ - lane_enable &= ~(0xFFFF<<16); - lane_enable |= (cplx_lane_enable << 16); - } - nlm_write_nae_reg(nae_base, - NAE_REG(block, LANE_CFG, LANE_CFG_CPLX_2_3), - lane_enable); - } - - /* Bring txpll out of reset */ - for (block = 0; block < 4; block++) { - if ((xaui_cplx_mask & (1 << block)) == 0) - continue; - - for (lane_ctrl = PHY_LANE_0_CTRL; - lane_ctrl <= PHY_LANE_3_CTRL; lane_ctrl++) { - if (!nlm_is_xlp8xx_ax()) - xlp_nae_lane_reset_txpll(nae_base, - block, lane_ctrl, PHYMODE_XAUI); - else - xlp_ax_nae_lane_reset_txpll(nae_base, block, - lane_ctrl, PHYMODE_XAUI); - } - } - - /* Wait for Rx & TX clock stable */ - for (block = 0; block < 4; block++) { - if ((xaui_cplx_mask & (1 << block)) == 0) - continue; - - for (lane_ctrl = PHY_LANE_0_CTRL; - lane_ctrl <= PHY_LANE_3_CTRL; lane_ctrl++) { - reg = NAE_REG(block, PHY, lane_ctrl - 4); - /* Wait for TX clock to be set */ - do { - regval = nlm_read_nae_reg(nae_base, reg); - } while ((regval & LANE_TX_CLK) == 0); - - /* Wait for RX clock to be set */ - do { - regval = nlm_read_nae_reg(nae_base, reg); - } while ((regval & LANE_RX_CLK) == 0); - - /* Wait for XAUI Lane fault to be cleared */ - do { - regval = nlm_read_nae_reg(nae_base, reg); - } while ((regval & XAUI_LANE_FAULT) != 0); - } - } -} - -void -nlm_nae_setup_rx_mode_xaui(uint64_t base, int nblock, int iface, int port_type, - int broadcast_en, int multicast_en, int pause_en, int promisc_en) -{ - uint32_t val; - - val = ((broadcast_en & 0x1) << 10) | - ((pause_en & 0x1) << 9) | - ((multicast_en & 0x1) << 8) | - ((promisc_en & 0x1) << 7) | /* unicast_enable - enables promisc mode */ - 1; /* MAC address is always valid */ - - nlm_write_nae_reg(base, XAUI_MAC_FILTER_CFG(nblock), val); -} - -void -nlm_nae_setup_mac_addr_xaui(uint64_t base, int nblock, int iface, - int port_type, unsigned char *mac_addr) -{ - nlm_write_nae_reg(base, - XAUI_MAC_ADDR0_LO(nblock), - (mac_addr[5] << 24) | - (mac_addr[4] << 16) | - (mac_addr[3] << 8) | - mac_addr[2]); - - nlm_write_nae_reg(base, - XAUI_MAC_ADDR0_HI(nblock), - (mac_addr[1] << 24) | - (mac_addr[0] << 16)); - - nlm_write_nae_reg(base, - XAUI_MAC_ADDR_MASK0_LO(nblock), - 0xffffffff); - nlm_write_nae_reg(base, - XAUI_MAC_ADDR_MASK0_HI(nblock), - 0xffffffff); - - nlm_nae_setup_rx_mode_xaui(base, nblock, iface, - XAUIC, - 1, /* broadcast enabled */ - 1, /* multicast enabled */ - 0, /* do not accept pause frames */ - 0 /* promisc mode disabled */ - ); -} - -void -nlm_config_xaui_mtu(uint64_t nae_base, int nblock, - int max_tx_frame_sz, int max_rx_frame_sz) -{ - uint32_t tx_words = max_tx_frame_sz >> 2; /* max_tx_frame_sz / 4 */ - - /* write max frame length */ - nlm_write_nae_reg(nae_base, - XAUI_MAX_FRAME_LEN(nblock), - ((tx_words & 0x3ff) << 16) | (max_rx_frame_sz & 0xffff)); -} - -void -nlm_config_xaui(uint64_t nae_base, int nblock, - int max_tx_frame_sz, int max_rx_frame_sz, int vlan_pri_en) -{ - uint32_t val; - - val = nlm_read_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL1(nblock)); - val &= ~(0x1 << 11); /* clear soft reset */ - nlm_write_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL1(nblock), val); - - val = nlm_read_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL1(nblock)); - val &= ~(0x3 << 11); /* clear soft reset and hard reset */ - nlm_write_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL1(nblock), val); - nlm_write_nae_reg(nae_base, XAUI_CONFIG0(nblock), 0xffffffff); - nlm_write_nae_reg(nae_base, XAUI_CONFIG0(nblock), 0); - - /* Enable tx/rx frame */ - val = 0x000010A8; - val |= XAUI_CONFIG_LENCHK; - val |= XAUI_CONFIG_GENFCS; - val |= XAUI_CONFIG_PAD_64; - nlm_write_nae_reg(nae_base, XAUI_CONFIG1(nblock), val); - - /* write max frame length */ - nlm_config_xaui_mtu(nae_base, nblock, max_tx_frame_sz, - max_rx_frame_sz); - - /* set stats counter */ - val = nlm_read_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL1(nblock)); - val |= (0x1 << NETIOR_XGMAC_VLAN_DC_POS); - val |= (0x1 << NETIOR_XGMAC_STATS_EN_POS); - if (vlan_pri_en) { - val |= (0x1 << NETIOR_XGMAC_TX_PFC_EN_POS); - val |= (0x1 << NETIOR_XGMAC_RX_PFC_EN_POS); - val |= (0x1 << NETIOR_XGMAC_TX_PAUSE_POS); - } else { - val &= ~(0x1 << NETIOR_XGMAC_TX_PFC_EN_POS); - val |= (0x1 << NETIOR_XGMAC_TX_PAUSE_POS); - } - nlm_write_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL1(nblock), val); - /* configure on / off timer */ - if (vlan_pri_en) - val = 0xF1230000; /* PFC mode, offtimer = 0xf123, ontimer = 0 */ - else - val = 0x0000F123; /* link level FC mode, offtimer = 0xf123 */ - nlm_write_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL2(nblock), val); - - /* set xaui tx threshold */ - val = nlm_read_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL3(nblock)); - val &= ~(0x1f << 10); - val |= ~(15 << 10); - nlm_write_nae_reg(nae_base, XAUI_NETIOR_XGMAC_CTRL3(nblock), val); -} diff --git a/sys/mips/nlm/dev/net/xlpge.c b/sys/mips/nlm/dev/net/xlpge.c deleted file mode 100644 index 98ec14ea68b..00000000000 --- a/sys/mips/nlm/dev/net/xlpge.c +++ /dev/null @@ -1,1539 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#define __RMAN_RESOURCE_VISIBLE -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include - -#include -#include /* for DELAY */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include "miidevs.h" -#include -#include "miibus_if.h" -#include - -#include - -/*#define XLP_DRIVER_LOOPBACK*/ - -static struct nae_port_config nae_port_config[64]; - -int poe_cl_tbl[MAX_POE_CLASSES] = { - 0x0, 0x249249, - 0x492492, 0x6db6db, - 0x924924, 0xb6db6d, - 0xdb6db6, 0xffffff -}; - -/* #define DUMP_PACKET */ - -static uint64_t -nlm_paddr_ld(uint64_t paddr) -{ - uint64_t xkaddr = 0x9800000000000000 | paddr; - - return (nlm_load_dword_daddr(xkaddr)); -} - -struct nlm_xlp_portdata ifp_ports[64]; -static uma_zone_t nl_tx_desc_zone; - -/* This implementation will register the following tree of device - * registration: - * pcibus - * | - * xlpnae (1 instance - virtual entity) - * | - * xlpge - * (18 sgmii / 4 xaui / 2 interlaken instances) - * | - * miibus - */ - -static int nlm_xlpnae_probe(device_t); -static int nlm_xlpnae_attach(device_t); -static int nlm_xlpnae_detach(device_t); -static int nlm_xlpnae_suspend(device_t); -static int nlm_xlpnae_resume(device_t); -static int nlm_xlpnae_shutdown(device_t); - -static device_method_t nlm_xlpnae_methods[] = { - /* Methods from the device interface */ - DEVMETHOD(device_probe, nlm_xlpnae_probe), - DEVMETHOD(device_attach, nlm_xlpnae_attach), - DEVMETHOD(device_detach, nlm_xlpnae_detach), - DEVMETHOD(device_suspend, nlm_xlpnae_suspend), - DEVMETHOD(device_resume, nlm_xlpnae_resume), - DEVMETHOD(device_shutdown, nlm_xlpnae_shutdown), - - DEVMETHOD(bus_driver_added, bus_generic_driver_added), - - DEVMETHOD_END -}; - -static driver_t nlm_xlpnae_driver = { - "xlpnae", - nlm_xlpnae_methods, - sizeof(struct nlm_xlpnae_softc) -}; - -static devclass_t nlm_xlpnae_devclass; - -static int nlm_xlpge_probe(device_t); -static int nlm_xlpge_attach(device_t); -static int nlm_xlpge_detach(device_t); -static int nlm_xlpge_suspend(device_t); -static int nlm_xlpge_resume(device_t); -static int nlm_xlpge_shutdown(device_t); - -/* mii override functions */ -static int nlm_xlpge_mii_read(device_t, int, int); -static int nlm_xlpge_mii_write(device_t, int, int, int); -static void nlm_xlpge_mii_statchg(device_t); - -static device_method_t nlm_xlpge_methods[] = { - /* Methods from the device interface */ - DEVMETHOD(device_probe, nlm_xlpge_probe), - DEVMETHOD(device_attach, nlm_xlpge_attach), - DEVMETHOD(device_detach, nlm_xlpge_detach), - DEVMETHOD(device_suspend, nlm_xlpge_suspend), - DEVMETHOD(device_resume, nlm_xlpge_resume), - DEVMETHOD(device_shutdown, nlm_xlpge_shutdown), - - /* Methods from the nexus bus needed for explicitly - * probing children when driver is loaded as a kernel module - */ - DEVMETHOD(miibus_readreg, nlm_xlpge_mii_read), - DEVMETHOD(miibus_writereg, nlm_xlpge_mii_write), - DEVMETHOD(miibus_statchg, nlm_xlpge_mii_statchg), - - /* Terminate method list */ - DEVMETHOD_END -}; - -static driver_t nlm_xlpge_driver = { - "xlpge", - nlm_xlpge_methods, - sizeof(struct nlm_xlpge_softc) -}; - -static devclass_t nlm_xlpge_devclass; - -DRIVER_MODULE(xlpnae, pci, nlm_xlpnae_driver, nlm_xlpnae_devclass, 0, 0); -DRIVER_MODULE(xlpge, xlpnae, nlm_xlpge_driver, nlm_xlpge_devclass, 0, 0); -DRIVER_MODULE(miibus, xlpge, miibus_driver, miibus_devclass, 0, 0); - -MODULE_DEPEND(pci, xlpnae, 1, 1, 1); -MODULE_DEPEND(xlpnae, xlpge, 1, 1, 1); -MODULE_DEPEND(xlpge, ether, 1, 1, 1); -MODULE_DEPEND(xlpge, miibus, 1, 1, 1); - -#define SGMII_RCV_CONTEXT_WIDTH 8 - -/* prototypes */ -static void nlm_xlpge_msgring_handler(int vc, int size, - int code, int srcid, struct nlm_fmn_msg *msg, void *data); -static void nlm_xlpge_submit_rx_free_desc(struct nlm_xlpge_softc *sc, int num); -static void nlm_xlpge_init(void *addr); -static void nlm_xlpge_port_disable(struct nlm_xlpge_softc *sc); -static void nlm_xlpge_port_enable(struct nlm_xlpge_softc *sc); - -/* globals */ -int dbg_on = 1; -int cntx2port[524]; - -static __inline void -atomic_incr_long(unsigned long *addr) -{ - atomic_add_long(addr, 1); -} - -/* - * xlpnae driver implementation - */ -static int -nlm_xlpnae_probe(device_t dev) -{ - if (pci_get_vendor(dev) != PCI_VENDOR_NETLOGIC || - pci_get_device(dev) != PCI_DEVICE_ID_NLM_NAE) - return (ENXIO); - - return (BUS_PROBE_DEFAULT); -} - -static void -nlm_xlpnae_print_frin_desc_carving(struct nlm_xlpnae_softc *sc) -{ - int intf; - uint32_t value; - int start, size; - - /* XXXJC: use max_ports instead of 20 ? */ - for (intf = 0; intf < 20; intf++) { - nlm_write_nae_reg(sc->base, NAE_FREE_IN_FIFO_CFG, - (0x80000000 | intf)); - value = nlm_read_nae_reg(sc->base, NAE_FREE_IN_FIFO_CFG); - size = 2 * ((value >> 20) & 0x3ff); - start = 2 * ((value >> 8) & 0x1ff); - } -} - -static void -nlm_config_egress(struct nlm_xlpnae_softc *sc, int nblock, - int context_base, int hwport, int max_channels) -{ - int offset, num_channels; - uint32_t data; - - num_channels = sc->portcfg[hwport].num_channels; - - data = (2048 << 12) | (hwport << 4) | 1; - nlm_write_nae_reg(sc->base, NAE_TX_IF_BURSTMAX_CMD, data); - - data = ((context_base + num_channels - 1) << 22) | - (context_base << 12) | (hwport << 4) | 1; - nlm_write_nae_reg(sc->base, NAE_TX_DDR_ACTVLIST_CMD, data); - - config_egress_fifo_carvings(sc->base, hwport, - context_base, num_channels, max_channels, sc->portcfg); - config_egress_fifo_credits(sc->base, hwport, - context_base, num_channels, max_channels, sc->portcfg); - - data = nlm_read_nae_reg(sc->base, NAE_DMA_TX_CREDIT_TH); - data |= (1 << 25) | (1 << 24); - nlm_write_nae_reg(sc->base, NAE_DMA_TX_CREDIT_TH, data); - - for (offset = 0; offset < num_channels; offset++) { - nlm_write_nae_reg(sc->base, NAE_TX_SCHED_MAP_CMD1, - NAE_DRR_QUANTA); - data = (hwport << 15) | ((context_base + offset) << 5); - if (sc->cmplx_type[nblock] == ILC) - data |= (offset << 20); - nlm_write_nae_reg(sc->base, NAE_TX_SCHED_MAP_CMD0, data | 1); - nlm_write_nae_reg(sc->base, NAE_TX_SCHED_MAP_CMD0, data); - } -} - -static int -xlpnae_get_maxchannels(struct nlm_xlpnae_softc *sc) -{ - int maxchans = 0; - int i; - - for (i = 0; i < sc->max_ports; i++) { - if (sc->portcfg[i].type == UNKNOWN) - continue; - maxchans += sc->portcfg[i].num_channels; - } - - return (maxchans); -} - -static void -nlm_setup_interface(struct nlm_xlpnae_softc *sc, int nblock, - int port, uint32_t cur_flow_base, uint32_t flow_mask, - int max_channels, int context) -{ - uint64_t nae_base = sc->base; - int mtu = 1536; /* XXXJC: don't hard code */ - uint32_t ucore_mask; - - if (sc->cmplx_type[nblock] == XAUIC) - nlm_config_xaui(nae_base, nblock, mtu, - mtu, sc->portcfg[port].vlan_pri_en); - nlm_config_freein_fifo_uniq_cfg(nae_base, - port, sc->portcfg[port].free_desc_sizes); - nlm_config_ucore_iface_mask_cfg(nae_base, - port, sc->portcfg[port].ucore_mask); - - nlm_program_flow_cfg(nae_base, port, cur_flow_base, flow_mask); - - if (sc->cmplx_type[nblock] == SGMIIC) - nlm_configure_sgmii_interface(nae_base, nblock, port, mtu, 0); - - nlm_config_egress(sc, nblock, context, port, max_channels); - - nlm_nae_init_netior(nae_base, sc->nblocks); - nlm_nae_open_if(nae_base, nblock, sc->cmplx_type[nblock], port, - sc->portcfg[port].free_desc_sizes); - - /* XXXJC: check mask calculation */ - ucore_mask = (1 << sc->nucores) - 1; - nlm_nae_init_ucore(nae_base, port, ucore_mask); -} - -static void -nlm_setup_interfaces(struct nlm_xlpnae_softc *sc) -{ - uint64_t nae_base; - uint32_t cur_slot, cur_slot_base; - uint32_t cur_flow_base, port, flow_mask; - int max_channels; - int i, context; - - cur_slot = 0; - cur_slot_base = 0; - cur_flow_base = 0; - nae_base = sc->base; - flow_mask = nlm_get_flow_mask(sc->total_num_ports); - /* calculate max_channels */ - max_channels = xlpnae_get_maxchannels(sc); - - port = 0; - context = 0; - for (i = 0; i < sc->max_ports; i++) { - if (sc->portcfg[i].type == UNKNOWN) - continue; - nlm_setup_interface(sc, sc->portcfg[i].block, i, cur_flow_base, - flow_mask, max_channels, context); - cur_flow_base += sc->per_port_num_flows; - context += sc->portcfg[i].num_channels; - } -} - -static void -nlm_xlpnae_init(int node, struct nlm_xlpnae_softc *sc) -{ - uint64_t nae_base; - uint32_t ucoremask = 0; - uint32_t val; - int i; - - nae_base = sc->base; - - nlm_nae_flush_free_fifo(nae_base, sc->nblocks); - nlm_deflate_frin_fifo_carving(nae_base, sc->max_ports); - nlm_reset_nae(node); - - for (i = 0; i < sc->nucores; i++) /* XXXJC: code repeated below */ - ucoremask |= (0x1 << i); - printf("Loading 0x%x ucores with microcode\n", ucoremask); - nlm_ucore_load_all(nae_base, ucoremask, 1); - - val = nlm_set_device_frequency(node, DFS_DEVICE_NAE, sc->freq); - printf("Setup NAE frequency to %dMHz\n", val); - - nlm_mdio_reset_all(nae_base); - - printf("Initialze SGMII PCS for blocks 0x%x\n", sc->sgmiimask); - nlm_sgmii_pcs_init(nae_base, sc->sgmiimask); - - printf("Initialze XAUI PCS for blocks 0x%x\n", sc->xauimask); - nlm_xaui_pcs_init(nae_base, sc->xauimask); - - /* clear NETIOR soft reset */ - nlm_write_nae_reg(nae_base, NAE_LANE_CFG_SOFTRESET, 0x0); - - /* Disable RX enable bit in RX_CONFIG */ - val = nlm_read_nae_reg(nae_base, NAE_RX_CONFIG); - val &= 0xfffffffe; - nlm_write_nae_reg(nae_base, NAE_RX_CONFIG, val); - - if (nlm_is_xlp8xx_ax() == 0) { - val = nlm_read_nae_reg(nae_base, NAE_TX_CONFIG); - val &= ~(1 << 3); - nlm_write_nae_reg(nae_base, NAE_TX_CONFIG, val); - } - - nlm_setup_poe_class_config(nae_base, MAX_POE_CLASSES, - sc->ncontexts, poe_cl_tbl); - - nlm_setup_vfbid_mapping(nae_base); - - nlm_setup_flow_crc_poly(nae_base, sc->flow_crc_poly); - - nlm_setup_rx_cal_cfg(nae_base, sc->max_ports, sc->portcfg); - /* note: xlp8xx Ax does not have Tx Calendering */ - if (!nlm_is_xlp8xx_ax()) - nlm_setup_tx_cal_cfg(nae_base, sc->max_ports, sc->portcfg); - - nlm_setup_interfaces(sc); - nlm_config_poe(sc->poe_base, sc->poedv_base); - - if (sc->hw_parser_en) - nlm_enable_hardware_parser(nae_base); - - if (sc->prepad_en) - nlm_prepad_enable(nae_base, sc->prepad_size); - - if (sc->ieee_1588_en) - nlm_setup_1588_timer(sc->base, sc->portcfg); -} - -static void -nlm_xlpnae_update_pde(void *dummy __unused) -{ - struct nlm_xlpnae_softc *sc; - uint32_t dv[NUM_WORDS_PER_DV]; - device_t dev; - int vec; - - dev = devclass_get_device(devclass_find("xlpnae"), 0); - sc = device_get_softc(dev); - - nlm_write_poe_reg(sc->poe_base, POE_DISTR_EN, 0); - for (vec = 0; vec < NUM_DIST_VEC; vec++) { - if (nlm_get_poe_distvec(vec, dv) != 0) - continue; - - nlm_write_poe_distvec(sc->poedv_base, vec, dv); - } - nlm_write_poe_reg(sc->poe_base, POE_DISTR_EN, 1); -} - -SYSINIT(nlm_xlpnae_update_pde, SI_SUB_SMP, SI_ORDER_ANY, - nlm_xlpnae_update_pde, NULL); - -/* configuration common for sgmii, xaui, ilaken goes here */ -static void -nlm_setup_portcfg(struct nlm_xlpnae_softc *sc, struct xlp_nae_ivars *naep, - int block, int port) -{ - int i; - uint32_t ucore_mask = 0; - struct xlp_block_ivars *bp; - struct xlp_port_ivars *p; - - bp = &(naep->block_ivars[block]); - p = &(bp->port_ivars[port & 0x3]); - - sc->portcfg[port].node = p->node; - sc->portcfg[port].block = p->block; - sc->portcfg[port].port = p->port; - sc->portcfg[port].type = p->type; - sc->portcfg[port].mdio_bus = p->mdio_bus; - sc->portcfg[port].phy_addr = p->phy_addr; - sc->portcfg[port].loopback_mode = p->loopback_mode; - sc->portcfg[port].num_channels = p->num_channels; - if (p->free_desc_sizes != MCLBYTES) { - printf("[%d, %d] Error: free_desc_sizes %d != %d\n", - block, port, p->free_desc_sizes, MCLBYTES); - return; - } - sc->portcfg[port].free_desc_sizes = p->free_desc_sizes; - for (i = 0; i < sc->nucores; i++) /* XXXJC: configure this */ - ucore_mask |= (0x1 << i); - sc->portcfg[port].ucore_mask = ucore_mask; - sc->portcfg[port].vlan_pri_en = p->vlan_pri_en; - sc->portcfg[port].num_free_descs = p->num_free_descs; - sc->portcfg[port].iface_fifo_size = p->iface_fifo_size; - sc->portcfg[port].rxbuf_size = p->rxbuf_size; - sc->portcfg[port].rx_slots_reqd = p->rx_slots_reqd; - sc->portcfg[port].tx_slots_reqd = p->tx_slots_reqd; - sc->portcfg[port].pseq_fifo_size = p->pseq_fifo_size; - - sc->portcfg[port].stg2_fifo_size = p->stg2_fifo_size; - sc->portcfg[port].eh_fifo_size = p->eh_fifo_size; - sc->portcfg[port].frout_fifo_size = p->frout_fifo_size; - sc->portcfg[port].ms_fifo_size = p->ms_fifo_size; - sc->portcfg[port].pkt_fifo_size = p->pkt_fifo_size; - sc->portcfg[port].pktlen_fifo_size = p->pktlen_fifo_size; - sc->portcfg[port].max_stg2_offset = p->max_stg2_offset; - sc->portcfg[port].max_eh_offset = p->max_eh_offset; - sc->portcfg[port].max_frout_offset = p->max_frout_offset; - sc->portcfg[port].max_ms_offset = p->max_ms_offset; - sc->portcfg[port].max_pmem_offset = p->max_pmem_offset; - sc->portcfg[port].stg1_2_credit = p->stg1_2_credit; - sc->portcfg[port].stg2_eh_credit = p->stg2_eh_credit; - sc->portcfg[port].stg2_frout_credit = p->stg2_frout_credit; - sc->portcfg[port].stg2_ms_credit = p->stg2_ms_credit; - sc->portcfg[port].ieee1588_inc_intg = p->ieee1588_inc_intg; - sc->portcfg[port].ieee1588_inc_den = p->ieee1588_inc_den; - sc->portcfg[port].ieee1588_inc_num = p->ieee1588_inc_num; - sc->portcfg[port].ieee1588_userval = p->ieee1588_userval; - sc->portcfg[port].ieee1588_ptpoff = p->ieee1588_ptpoff; - sc->portcfg[port].ieee1588_tmr1 = p->ieee1588_tmr1; - sc->portcfg[port].ieee1588_tmr2 = p->ieee1588_tmr2; - sc->portcfg[port].ieee1588_tmr3 = p->ieee1588_tmr3; - - sc->total_free_desc += sc->portcfg[port].free_desc_sizes; - sc->total_num_ports++; -} - -static int -nlm_xlpnae_attach(device_t dev) -{ - struct xlp_nae_ivars *nae_ivars; - struct nlm_xlpnae_softc *sc; - device_t tmpd; - uint32_t dv[NUM_WORDS_PER_DV]; - int port, i, j, nchan, nblock, node, qstart, qnum; - int offset, context, txq_base, rxvcbase; - uint64_t poe_pcibase, nae_pcibase; - - node = pci_get_slot(dev) / 8; - nae_ivars = &xlp_board_info.nodes[node].nae_ivars; - - sc = device_get_softc(dev); - sc->xlpnae_dev = dev; - sc->node = nae_ivars->node; - sc->base = nlm_get_nae_regbase(sc->node); - sc->poe_base = nlm_get_poe_regbase(sc->node); - sc->poedv_base = nlm_get_poedv_regbase(sc->node); - sc->portcfg = nae_port_config; - sc->blockmask = nae_ivars->blockmask; - sc->ilmask = nae_ivars->ilmask; - sc->xauimask = nae_ivars->xauimask; - sc->sgmiimask = nae_ivars->sgmiimask; - sc->nblocks = nae_ivars->nblocks; - sc->freq = nae_ivars->freq; - - /* flow table generation is done by CRC16 polynomial */ - sc->flow_crc_poly = nae_ivars->flow_crc_poly; - - sc->hw_parser_en = nae_ivars->hw_parser_en; - sc->prepad_en = nae_ivars->prepad_en; - sc->prepad_size = nae_ivars->prepad_size; - sc->ieee_1588_en = nae_ivars->ieee_1588_en; - - nae_pcibase = nlm_get_nae_pcibase(sc->node); - sc->ncontexts = nlm_read_reg(nae_pcibase, XLP_PCI_DEVINFO_REG5); - sc->nucores = nlm_num_uengines(nae_pcibase); - - for (nblock = 0; nblock < sc->nblocks; nblock++) { - sc->cmplx_type[nblock] = nae_ivars->block_ivars[nblock].type; - sc->portmask[nblock] = nae_ivars->block_ivars[nblock].portmask; - } - - for (i = 0; i < sc->ncontexts; i++) - cntx2port[i] = 18; /* 18 is an invalid port */ - - if (sc->nblocks == 5) - sc->max_ports = 18; /* 8xx has a block 4 with 2 ports */ - else - sc->max_ports = sc->nblocks * PORTS_PER_CMPLX; - - for (i = 0; i < sc->max_ports; i++) - sc->portcfg[i].type = UNKNOWN; /* Port Not Present */ - /* - * Now setup all internal fifo carvings based on - * total number of ports in the system - */ - sc->total_free_desc = 0; - sc->total_num_ports = 0; - port = 0; - context = 0; - txq_base = nlm_qidstart(nae_pcibase); - rxvcbase = txq_base + sc->ncontexts; - for (i = 0; i < sc->nblocks; i++) { - uint32_t portmask; - - if ((nae_ivars->blockmask & (1 << i)) == 0) { - port += 4; - continue; - } - portmask = nae_ivars->block_ivars[i].portmask; - for (j = 0; j < PORTS_PER_CMPLX; j++, port++) { - if ((portmask & (1 << j)) == 0) - continue; - nlm_setup_portcfg(sc, nae_ivars, i, port); - nchan = sc->portcfg[port].num_channels; - for (offset = 0; offset < nchan; offset++) - cntx2port[context + offset] = port; - sc->portcfg[port].txq = txq_base + context; - sc->portcfg[port].rxfreeq = rxvcbase + port; - context += nchan; - } - } - - poe_pcibase = nlm_get_poe_pcibase(sc->node); - sc->per_port_num_flows = - nlm_poe_max_flows(poe_pcibase) / sc->total_num_ports; - - /* zone for P2P descriptors */ - nl_tx_desc_zone = uma_zcreate("NL Tx Desc", - sizeof(struct xlpge_tx_desc), NULL, NULL, NULL, NULL, - NAE_CACHELINE_SIZE, 0); - - /* NAE FMN messages have CMS src station id's in the - * range of qstart to qnum. - */ - qstart = nlm_qidstart(nae_pcibase); - qnum = nlm_qnum(nae_pcibase); - if (register_msgring_handler(qstart, qstart + qnum - 1, - nlm_xlpge_msgring_handler, sc)) { - panic("Couldn't register NAE msgring handler\n"); - } - - /* POE FMN messages have CMS src station id's in the - * range of qstart to qnum. - */ - qstart = nlm_qidstart(poe_pcibase); - qnum = nlm_qnum(poe_pcibase); - if (register_msgring_handler(qstart, qstart + qnum - 1, - nlm_xlpge_msgring_handler, sc)) { - panic("Couldn't register POE msgring handler\n"); - } - - nlm_xlpnae_init(node, sc); - - for (i = 0; i < sc->max_ports; i++) { - char desc[32]; - int block, port; - - if (sc->portcfg[i].type == UNKNOWN) - continue; - block = sc->portcfg[i].block; - port = sc->portcfg[i].port; - tmpd = device_add_child(dev, "xlpge", i); - device_set_ivars(tmpd, - &(nae_ivars->block_ivars[block].port_ivars[port])); - sprintf(desc, "XLP NAE Port %d,%d", block, port); - device_set_desc_copy(tmpd, desc); - } - nlm_setup_iface_fifo_cfg(sc->base, sc->max_ports, sc->portcfg); - nlm_setup_rx_base_config(sc->base, sc->max_ports, sc->portcfg); - nlm_setup_rx_buf_config(sc->base, sc->max_ports, sc->portcfg); - nlm_setup_freein_fifo_cfg(sc->base, sc->portcfg); - nlm_program_nae_parser_seq_fifo(sc->base, sc->max_ports, sc->portcfg); - - nlm_xlpnae_print_frin_desc_carving(sc); - bus_generic_probe(dev); - bus_generic_attach(dev); - - /* - * Enable only boot cpu at this point, full distribution comes - * only after SMP is started - */ - nlm_write_poe_reg(sc->poe_base, POE_DISTR_EN, 0); - nlm_calc_poe_distvec(0x1, 0, 0, 0, 0x1 << XLPGE_RX_VC, dv); - nlm_write_poe_distvec(sc->poedv_base, 0, dv); - nlm_write_poe_reg(sc->poe_base, POE_DISTR_EN, 1); - - return (0); -} - -static int -nlm_xlpnae_detach(device_t dev) -{ - /* TODO - free zone here */ - return (0); -} - -static int -nlm_xlpnae_suspend(device_t dev) -{ - return (0); -} - -static int -nlm_xlpnae_resume(device_t dev) -{ - return (0); -} - -static int -nlm_xlpnae_shutdown(device_t dev) -{ - return (0); -} - -/* - * xlpge driver implementation - */ - -static void -nlm_xlpge_mac_set_rx_mode(struct nlm_xlpge_softc *sc) -{ - if (sc->if_flags & IFF_PROMISC) { - if (sc->type == SGMIIC) - nlm_nae_setup_rx_mode_sgmii(sc->base_addr, - sc->block, sc->port, sc->type, 1 /* broadcast */, - 1/* multicast */, 0 /* pause */, 1 /* promisc */); - else - nlm_nae_setup_rx_mode_xaui(sc->base_addr, - sc->block, sc->port, sc->type, 1 /* broadcast */, - 1/* multicast */, 0 /* pause */, 1 /* promisc */); - } else { - if (sc->type == SGMIIC) - nlm_nae_setup_rx_mode_sgmii(sc->base_addr, - sc->block, sc->port, sc->type, 1 /* broadcast */, - 1/* multicast */, 0 /* pause */, 0 /* promisc */); - else - nlm_nae_setup_rx_mode_xaui(sc->base_addr, - sc->block, sc->port, sc->type, 1 /* broadcast */, - 1/* multicast */, 0 /* pause */, 0 /* promisc */); - } -} - -static int -nlm_xlpge_ioctl(struct ifnet *ifp, u_long command, caddr_t data) -{ - struct mii_data *mii; - struct nlm_xlpge_softc *sc; - struct ifreq *ifr; - int error; - - sc = ifp->if_softc; - error = 0; - ifr = (struct ifreq *)data; - - switch (command) { - case SIOCSIFFLAGS: - XLPGE_LOCK(sc); - sc->if_flags = ifp->if_flags; - if (ifp->if_flags & IFF_UP) { - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) - nlm_xlpge_init(sc); - else - nlm_xlpge_port_enable(sc); - nlm_xlpge_mac_set_rx_mode(sc); - sc->link = NLM_LINK_UP; - } else { - if (ifp->if_drv_flags & IFF_DRV_RUNNING) - nlm_xlpge_port_disable(sc); - sc->link = NLM_LINK_DOWN; - } - XLPGE_UNLOCK(sc); - error = 0; - break; - case SIOCGIFMEDIA: - case SIOCSIFMEDIA: - if (sc->mii_bus != NULL) { - mii = device_get_softc(sc->mii_bus); - error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, - command); - } - break; - default: - error = ether_ioctl(ifp, command, data); - break; - } - - return (error); -} - -static int -xlpge_tx(struct ifnet *ifp, struct mbuf *mbuf_chain) -{ - struct nlm_fmn_msg msg; - struct xlpge_tx_desc *p2p; - struct nlm_xlpge_softc *sc; - struct mbuf *m; - vm_paddr_t paddr; - int fbid, dst, pos, err; - int ret = 0, tx_msgstatus, retries; - - err = 0; - if (mbuf_chain == NULL) - return (0); - - sc = ifp->if_softc; - p2p = NULL; - if (!(ifp->if_drv_flags & IFF_DRV_RUNNING) || - ifp->if_drv_flags & IFF_DRV_OACTIVE) { - err = ENXIO; - goto fail; - } - - /* free a few in coming messages on the fb vc */ - xlp_handle_msg_vc(1 << XLPGE_FB_VC, 2); - - /* vfb id table is setup to map cpu to vc 3 of the cpu */ - fbid = nlm_cpuid(); - dst = sc->txq; - - pos = 0; - p2p = uma_zalloc(nl_tx_desc_zone, M_NOWAIT); - if (p2p == NULL) { - printf("alloc fail\n"); - err = ENOBUFS; - goto fail; - } - - for (m = mbuf_chain; m != NULL; m = m->m_next) { - vm_offset_t buf = (vm_offset_t) m->m_data; - int len = m->m_len; - int frag_sz; - uint64_t desc; - - /*printf("m_data = %p len %d\n", m->m_data, len); */ - while (len) { - if (pos == XLP_NTXFRAGS - 3) { - device_printf(sc->xlpge_dev, - "packet defrag %d\n", - m_length(mbuf_chain, NULL)); - err = ENOBUFS; /* TODO fix error */ - goto fail; - } - paddr = vtophys(buf); - frag_sz = PAGE_SIZE - (buf & PAGE_MASK); - if (len < frag_sz) - frag_sz = len; - desc = nae_tx_desc(P2D_NEOP, 0, 127, - frag_sz, paddr); - p2p->frag[pos] = htobe64(desc); - pos++; - len -= frag_sz; - buf += frag_sz; - } - } - - KASSERT(pos != 0, ("Zero-length mbuf chain?\n")); - - /* Make the last one P2D EOP */ - p2p->frag[pos-1] |= htobe64((uint64_t)P2D_EOP << 62); - - /* stash useful pointers in the desc */ - p2p->frag[XLP_NTXFRAGS-3] = 0xf00bad; - p2p->frag[XLP_NTXFRAGS-2] = (uintptr_t)p2p; - p2p->frag[XLP_NTXFRAGS-1] = (uintptr_t)mbuf_chain; - - paddr = vtophys(p2p); - msg.msg[0] = nae_tx_desc(P2P, 0, fbid, pos, paddr); - - for (retries = 16; retries > 0; retries--) { - ret = nlm_fmn_msgsend(dst, 1, FMN_SWCODE_NAE, &msg); - if (ret == 0) - return (0); - } - -fail: - if (ret != 0) { - tx_msgstatus = nlm_read_c2_txmsgstatus(); - if ((tx_msgstatus >> 24) & 0x1) - device_printf(sc->xlpge_dev, "Transmit queue full - "); - if ((tx_msgstatus >> 3) & 0x1) - device_printf(sc->xlpge_dev, "ECC error - "); - if ((tx_msgstatus >> 2) & 0x1) - device_printf(sc->xlpge_dev, "Pending Sync - "); - if ((tx_msgstatus >> 1) & 0x1) - device_printf(sc->xlpge_dev, - "Insufficient input queue credits - "); - if (tx_msgstatus & 0x1) - device_printf(sc->xlpge_dev, - "Insufficient output queue credits - "); - } - device_printf(sc->xlpge_dev, "Send failed! err = %d\n", err); - if (p2p) - uma_zfree(nl_tx_desc_zone, p2p); - m_freem(mbuf_chain); - if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1); - return (err); -} - -static int -nlm_xlpge_gmac_config_speed(struct nlm_xlpge_softc *sc) -{ - struct mii_data *mii; - - if (sc->type == XAUIC || sc->type == ILC) - return (0); - - if (sc->mii_bus) { - mii = device_get_softc(sc->mii_bus); - mii_pollstat(mii); - } - - return (0); -} - -static void -nlm_xlpge_port_disable(struct nlm_xlpge_softc *sc) -{ - struct ifnet *ifp; - - ifp = sc->xlpge_if; - ifp->if_drv_flags &= ~IFF_DRV_RUNNING; - - callout_stop(&sc->xlpge_callout); - nlm_mac_disable(sc->base_addr, sc->block, sc->type, sc->port); -} - -static void -nlm_mii_pollstat(void *arg) -{ - struct nlm_xlpge_softc *sc = (struct nlm_xlpge_softc *)arg; - struct mii_data *mii = NULL; - - if (sc->mii_bus) { - mii = device_get_softc(sc->mii_bus); - - KASSERT(mii != NULL, ("mii ptr is NULL")); - - mii_pollstat(mii); - - callout_reset(&sc->xlpge_callout, hz, - nlm_mii_pollstat, sc); - } -} - -static void -nlm_xlpge_port_enable(struct nlm_xlpge_softc *sc) -{ - if ((sc->type != SGMIIC) && (sc->type != XAUIC)) - return; - nlm_mac_enable(sc->base_addr, sc->block, sc->type, sc->port); - nlm_mii_pollstat((void *)sc); -} - -static void -nlm_xlpge_init(void *addr) -{ - struct nlm_xlpge_softc *sc; - struct ifnet *ifp; - struct mii_data *mii = NULL; - - sc = (struct nlm_xlpge_softc *)addr; - ifp = sc->xlpge_if; - - if (ifp->if_drv_flags & IFF_DRV_RUNNING) - return; - - if (sc->mii_bus) { - mii = device_get_softc(sc->mii_bus); - mii_mediachg(mii); - } - - nlm_xlpge_gmac_config_speed(sc); - ifp->if_drv_flags |= IFF_DRV_RUNNING; - ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; - nlm_xlpge_port_enable(sc); - - /* start the callout */ - callout_reset(&sc->xlpge_callout, hz, nlm_mii_pollstat, sc); -} - -/* - * Read the MAC address from FDT or board eeprom. - */ -static void -xlpge_read_mac_addr(struct nlm_xlpge_softc *sc) -{ - - xlpge_get_macaddr(sc->dev_addr); - /* last octet is port specific */ - sc->dev_addr[5] += (sc->block * 4) + sc->port; - - if (sc->type == SGMIIC) - nlm_nae_setup_mac_addr_sgmii(sc->base_addr, sc->block, - sc->port, sc->type, sc->dev_addr); - else if (sc->type == XAUIC) - nlm_nae_setup_mac_addr_xaui(sc->base_addr, sc->block, - sc->port, sc->type, sc->dev_addr); -} - -static int -xlpge_mediachange(struct ifnet *ifp) -{ - return (0); -} - -static void -xlpge_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr) -{ - struct nlm_xlpge_softc *sc; - struct mii_data *md; - - md = NULL; - sc = ifp->if_softc; - - if (sc->mii_bus) - md = device_get_softc(sc->mii_bus); - - ifmr->ifm_status = IFM_AVALID; - ifmr->ifm_active = IFM_ETHER; - - if (sc->link == NLM_LINK_DOWN) - return; - - if (md != NULL) - ifmr->ifm_active = md->mii_media.ifm_cur->ifm_media; - ifmr->ifm_status |= IFM_ACTIVE; -} - -static int -nlm_xlpge_ifinit(struct nlm_xlpge_softc *sc) -{ - struct ifnet *ifp; - device_t dev; - int port = sc->block * 4 + sc->port; - - dev = sc->xlpge_dev; - ifp = sc->xlpge_if = if_alloc(IFT_ETHER); - /*(sc->network_sc)->ifp_ports[port].xlpge_if = ifp;*/ - ifp_ports[port].xlpge_if = ifp; - - if (ifp == NULL) { - device_printf(dev, "cannot if_alloc()\n"); - return (ENOSPC); - } - ifp->if_softc = sc; - if_initname(ifp, device_get_name(dev), device_get_unit(dev)); - ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; - sc->if_flags = ifp->if_flags; - /*ifp->if_capabilities = IFCAP_TXCSUM | IFCAP_VLAN_HWTAGGING;*/ - ifp->if_capabilities = 0; - ifp->if_capenable = ifp->if_capabilities; - ifp->if_ioctl = nlm_xlpge_ioctl; - ifp->if_init = nlm_xlpge_init ; - ifp->if_hwassist = 0; - ifp->if_snd.ifq_drv_maxlen = NLM_XLPGE_TXQ_SIZE; /* TODO: make this a sysint */ - IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen); - IFQ_SET_READY(&ifp->if_snd); - - ifmedia_init(&sc->xlpge_mii.mii_media, 0, xlpge_mediachange, - xlpge_mediastatus); - ifmedia_add(&sc->xlpge_mii.mii_media, IFM_ETHER | IFM_AUTO, 0, NULL); - ifmedia_set(&sc->xlpge_mii.mii_media, IFM_ETHER | IFM_AUTO); - sc->xlpge_mii.mii_media.ifm_media = - sc->xlpge_mii.mii_media.ifm_cur->ifm_media; - xlpge_read_mac_addr(sc); - - ether_ifattach(ifp, sc->dev_addr); - - /* override if_transmit : per ifnet(9), do it after if_attach */ - ifp->if_transmit = xlpge_tx; - - return (0); -} - -static int -nlm_xlpge_probe(device_t dev) -{ - return (BUS_PROBE_DEFAULT); -} - -static void * -get_buf(void) -{ - struct mbuf *m_new; - uint64_t *md; -#ifdef INVARIANTS - vm_paddr_t temp1, temp2; -#endif - - if ((m_new = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR)) == NULL) - return (NULL); - m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; - KASSERT(((uintptr_t)m_new->m_data & (NAE_CACHELINE_SIZE - 1)) == 0, - ("m_new->m_data is not cacheline aligned")); - md = (uint64_t *)m_new->m_data; - md[0] = (intptr_t)m_new; /* Back Ptr */ - md[1] = 0xf00bad; - m_adj(m_new, NAE_CACHELINE_SIZE); - -#ifdef INVARIANTS - temp1 = vtophys((vm_offset_t) m_new->m_data); - temp2 = vtophys((vm_offset_t) m_new->m_data + 1536); - KASSERT((temp1 + 1536) == temp2, - ("Alloced buffer is not contiguous")); -#endif - return ((void *)m_new->m_data); -} - -static void -nlm_xlpge_mii_init(device_t dev, struct nlm_xlpge_softc *sc) -{ - int error; - - error = mii_attach(dev, &sc->mii_bus, sc->xlpge_if, - xlpge_mediachange, xlpge_mediastatus, - BMSR_DEFCAPMASK, sc->phy_addr, MII_OFFSET_ANY, 0); - - if (error) { - device_printf(dev, "attaching PHYs failed\n"); - sc->mii_bus = NULL; - } - - if (sc->mii_bus != NULL) { - /* enable MDIO interrupts in the PHY */ - /* XXXJC: TODO */ - } -} - -static int -xlpge_stats_sysctl(SYSCTL_HANDLER_ARGS) -{ - struct nlm_xlpge_softc *sc; - uint32_t val; - int reg, field; - - sc = arg1; - field = arg2; - reg = SGMII_STATS_MLR(sc->block, sc->port) + field; - val = nlm_read_nae_reg(sc->base_addr, reg); - return (sysctl_handle_int(oidp, &val, 0, req)); -} - -static void -nlm_xlpge_setup_stats_sysctl(device_t dev, struct nlm_xlpge_softc *sc) -{ - struct sysctl_ctx_list *ctx; - struct sysctl_oid_list *child; - struct sysctl_oid *tree; - - ctx = device_get_sysctl_ctx(dev); - tree = device_get_sysctl_tree(dev); - child = SYSCTL_CHILDREN(tree); - -#define XLPGE_STAT(name, offset, desc) \ - SYSCTL_ADD_PROC(ctx, child, OID_AUTO, name, \ - CTLTYPE_UINT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, \ - sc, offset, xlpge_stats_sysctl, "IU", desc) - - XLPGE_STAT("tr127", nlm_sgmii_stats_tr127, "TxRx 64 - 127 Bytes"); - XLPGE_STAT("tr255", nlm_sgmii_stats_tr255, "TxRx 128 - 255 Bytes"); - XLPGE_STAT("tr511", nlm_sgmii_stats_tr511, "TxRx 256 - 511 Bytes"); - XLPGE_STAT("tr1k", nlm_sgmii_stats_tr1k, "TxRx 512 - 1023 Bytes"); - XLPGE_STAT("trmax", nlm_sgmii_stats_trmax, "TxRx 1024 - 1518 Bytes"); - XLPGE_STAT("trmgv", nlm_sgmii_stats_trmgv, "TxRx 1519 - 1522 Bytes"); - - XLPGE_STAT("rbyt", nlm_sgmii_stats_rbyt, "Rx Bytes"); - XLPGE_STAT("rpkt", nlm_sgmii_stats_rpkt, "Rx Packets"); - XLPGE_STAT("rfcs", nlm_sgmii_stats_rfcs, "Rx FCS Error"); - XLPGE_STAT("rmca", nlm_sgmii_stats_rmca, "Rx Multicast Packets"); - XLPGE_STAT("rbca", nlm_sgmii_stats_rbca, "Rx Broadcast Packets"); - XLPGE_STAT("rxcf", nlm_sgmii_stats_rxcf, "Rx Control Frames"); - XLPGE_STAT("rxpf", nlm_sgmii_stats_rxpf, "Rx Pause Frames"); - XLPGE_STAT("rxuo", nlm_sgmii_stats_rxuo, "Rx Unknown Opcode"); - XLPGE_STAT("raln", nlm_sgmii_stats_raln, "Rx Alignment Errors"); - XLPGE_STAT("rflr", nlm_sgmii_stats_rflr, "Rx Framelength Errors"); - XLPGE_STAT("rcde", nlm_sgmii_stats_rcde, "Rx Code Errors"); - XLPGE_STAT("rcse", nlm_sgmii_stats_rcse, "Rx Carrier Sense Errors"); - XLPGE_STAT("rund", nlm_sgmii_stats_rund, "Rx Undersize Packet Errors"); - XLPGE_STAT("rovr", nlm_sgmii_stats_rovr, "Rx Oversize Packet Errors"); - XLPGE_STAT("rfrg", nlm_sgmii_stats_rfrg, "Rx Fragments"); - XLPGE_STAT("rjbr", nlm_sgmii_stats_rjbr, "Rx Jabber"); - - XLPGE_STAT("tbyt", nlm_sgmii_stats_tbyt, "Tx Bytes"); - XLPGE_STAT("tpkt", nlm_sgmii_stats_tpkt, "Tx Packets"); - XLPGE_STAT("tmca", nlm_sgmii_stats_tmca, "Tx Multicast Packets"); - XLPGE_STAT("tbca", nlm_sgmii_stats_tbca, "Tx Broadcast Packets"); - XLPGE_STAT("txpf", nlm_sgmii_stats_txpf, "Tx Pause Frame"); - XLPGE_STAT("tdfr", nlm_sgmii_stats_tdfr, "Tx Deferral Packets"); - XLPGE_STAT("tedf", nlm_sgmii_stats_tedf, "Tx Excessive Deferral Pkts"); - XLPGE_STAT("tscl", nlm_sgmii_stats_tscl, "Tx Single Collisions"); - XLPGE_STAT("tmcl", nlm_sgmii_stats_tmcl, "Tx Multiple Collisions"); - XLPGE_STAT("tlcl", nlm_sgmii_stats_tlcl, "Tx Late Collision Pkts"); - XLPGE_STAT("txcl", nlm_sgmii_stats_txcl, "Tx Excessive Collisions"); - XLPGE_STAT("tncl", nlm_sgmii_stats_tncl, "Tx Total Collisions"); - XLPGE_STAT("tjbr", nlm_sgmii_stats_tjbr, "Tx Jabber Frames"); - XLPGE_STAT("tfcs", nlm_sgmii_stats_tfcs, "Tx FCS Errors"); - XLPGE_STAT("txcf", nlm_sgmii_stats_txcf, "Tx Control Frames"); - XLPGE_STAT("tovr", nlm_sgmii_stats_tovr, "Tx Oversize Frames"); - XLPGE_STAT("tund", nlm_sgmii_stats_tund, "Tx Undersize Frames"); - XLPGE_STAT("tfrg", nlm_sgmii_stats_tfrg, "Tx Fragments"); -#undef XLPGE_STAT -} - -static int -nlm_xlpge_attach(device_t dev) -{ - struct xlp_port_ivars *pv; - struct nlm_xlpge_softc *sc; - int port; - - pv = device_get_ivars(dev); - sc = device_get_softc(dev); - sc->xlpge_dev = dev; - sc->mii_bus = NULL; - sc->block = pv->block; - sc->node = pv->node; - sc->port = pv->port; - sc->type = pv->type; - sc->xlpge_if = NULL; - sc->phy_addr = pv->phy_addr; - sc->mdio_bus = pv->mdio_bus; - sc->portcfg = nae_port_config; - sc->hw_parser_en = pv->hw_parser_en; - - /* default settings */ - sc->speed = NLM_SGMII_SPEED_10; - sc->duplexity = NLM_SGMII_DUPLEX_FULL; - sc->link = NLM_LINK_DOWN; - sc->flowctrl = NLM_FLOWCTRL_DISABLED; - - sc->network_sc = device_get_softc(device_get_parent(dev)); - sc->base_addr = sc->network_sc->base; - sc->prepad_en = sc->network_sc->prepad_en; - sc->prepad_size = sc->network_sc->prepad_size; - - callout_init(&sc->xlpge_callout, 1); - - XLPGE_LOCK_INIT(sc, device_get_nameunit(dev)); - - port = (sc->block*4)+sc->port; - sc->nfree_desc = nae_port_config[port].num_free_descs; - sc->txq = nae_port_config[port].txq; - sc->rxfreeq = nae_port_config[port].rxfreeq; - - nlm_xlpge_submit_rx_free_desc(sc, sc->nfree_desc); - if (sc->hw_parser_en) - nlm_enable_hardware_parser_per_port(sc->base_addr, - sc->block, sc->port); - - nlm_xlpge_ifinit(sc); - ifp_ports[port].xlpge_sc = sc; - nlm_xlpge_mii_init(dev, sc); - - nlm_xlpge_setup_stats_sysctl(dev, sc); - - return (0); -} - -static int -nlm_xlpge_detach(device_t dev) -{ - return (0); -} - -static int -nlm_xlpge_suspend(device_t dev) -{ - return (0); -} - -static int -nlm_xlpge_resume(device_t dev) -{ - return (0); -} - -static int -nlm_xlpge_shutdown(device_t dev) -{ - return (0); -} - -/* - * miibus function with custom implementation - */ -static int -nlm_xlpge_mii_read(device_t dev, int phyaddr, int regidx) -{ - struct nlm_xlpge_softc *sc; - int val; - - sc = device_get_softc(dev); - if (sc->type == SGMIIC) - val = nlm_gmac_mdio_read(sc->base_addr, sc->mdio_bus, - BLOCK_7, LANE_CFG, phyaddr, regidx); - else - val = 0xffff; - - return (val); -} - -static int -nlm_xlpge_mii_write(device_t dev, int phyaddr, int regidx, int val) -{ - struct nlm_xlpge_softc *sc; - - sc = device_get_softc(dev); - if (sc->type == SGMIIC) - nlm_gmac_mdio_write(sc->base_addr, sc->mdio_bus, BLOCK_7, - LANE_CFG, phyaddr, regidx, val); - - return (0); -} - -static void -nlm_xlpge_mii_statchg(device_t dev) -{ - struct nlm_xlpge_softc *sc; - struct mii_data *mii; - char *speed, *duplexity; - - sc = device_get_softc(dev); - if (sc->mii_bus == NULL) - return; - - mii = device_get_softc(sc->mii_bus); - if (mii->mii_media_status & IFM_ACTIVE) { - if (IFM_SUBTYPE(mii->mii_media_active) == IFM_10_T) { - sc->speed = NLM_SGMII_SPEED_10; - speed = "10Mbps"; - } else if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) { - sc->speed = NLM_SGMII_SPEED_100; - speed = "100Mbps"; - } else { /* default to 1G */ - sc->speed = NLM_SGMII_SPEED_1000; - speed = "1Gbps"; - } - - if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) { - sc->duplexity = NLM_SGMII_DUPLEX_FULL; - duplexity = "full"; - } else { - sc->duplexity = NLM_SGMII_DUPLEX_HALF; - duplexity = "half"; - } - - printf("Port [%d, %d] setup with speed=%s duplex=%s\n", - sc->block, sc->port, speed, duplexity); - - nlm_nae_setup_mac(sc->base_addr, sc->block, sc->port, 0, 1, 1, - sc->speed, sc->duplexity); - } -} - -/* - * xlpge support function implementations - */ -static void -nlm_xlpge_release_mbuf(uint64_t paddr) -{ - uint64_t mag, desc, mbuf; - - paddr += (XLP_NTXFRAGS - 3) * sizeof(uint64_t); - mag = nlm_paddr_ld(paddr); - desc = nlm_paddr_ld(paddr + sizeof(uint64_t)); - mbuf = nlm_paddr_ld(paddr + 2 * sizeof(uint64_t)); - - if (mag != 0xf00bad) { - /* somebody else packet Error - FIXME in intialization */ - printf("cpu %d: ERR Tx packet paddr %jx, mag %jx, desc %jx mbuf %jx\n", - nlm_cpuid(), (uintmax_t)paddr, (uintmax_t)mag, - (intmax_t)desc, (uintmax_t)mbuf); - return; - } - m_freem((struct mbuf *)(uintptr_t)mbuf); - uma_zfree(nl_tx_desc_zone, (void *)(uintptr_t)desc); -} - -static void -nlm_xlpge_rx(struct nlm_xlpge_softc *sc, int port, vm_paddr_t paddr, int len) -{ - struct ifnet *ifp; - struct mbuf *m; - vm_offset_t temp; - unsigned long mag; - int prepad_size; - - ifp = sc->xlpge_if; - temp = nlm_paddr_ld(paddr - NAE_CACHELINE_SIZE); - mag = nlm_paddr_ld(paddr - NAE_CACHELINE_SIZE + sizeof(uint64_t)); - - m = (struct mbuf *)(intptr_t)temp; - if (mag != 0xf00bad) { - /* somebody else packet Error - FIXME in intialization */ - printf("cpu %d: ERR Rx packet paddr %jx, temp %p, mag %lx\n", - nlm_cpuid(), (uintmax_t)paddr, (void *)temp, mag); - return; - } - - m->m_pkthdr.rcvif = ifp; - -#ifdef DUMP_PACKET - { - int i = 0, j = 64; - unsigned char *buf = (char *)m->m_data; - printf("(cpu_%d: nlge_rx, !RX_COPY) Rx Packet: length=%d\n", - nlm_cpuid(), len); - if (len < j) - j = len; - if (sc->prepad_en) - j += ((sc->prepad_size + 1) * 16); - for (i = 0; i < j; i++) { - if (i && (i % 16) == 0) - printf("\n"); - printf("%02x ", buf[i]); - } - printf("\n"); - } -#endif - - if (sc->prepad_en) { - prepad_size = ((sc->prepad_size + 1) * 16); - m->m_data += prepad_size; - m->m_pkthdr.len = m->m_len = (len - prepad_size); - } else - m->m_pkthdr.len = m->m_len = len; - - if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1); -#ifdef XLP_DRIVER_LOOPBACK - if (port == 16 || port == 17) - (*ifp->if_input)(ifp, m); - else - xlpge_tx(ifp, m); -#else - (*ifp->if_input)(ifp, m); -#endif -} - -void -nlm_xlpge_submit_rx_free_desc(struct nlm_xlpge_softc *sc, int num) -{ - int i, size, ret, n; - struct nlm_fmn_msg msg; - void *ptr; - - for(i = 0; i < num; i++) { - memset(&msg, 0, sizeof(msg)); - ptr = get_buf(); - if (!ptr) { - device_printf(sc->xlpge_dev, "Cannot allocate mbuf\n"); - break; - } - - msg.msg[0] = vtophys(ptr); - if (msg.msg[0] == 0) { - printf("Bad ptr for %p\n", ptr); - break; - } - size = 1; - - n = 0; - while (1) { - /* on success returns 1, else 0 */ - ret = nlm_fmn_msgsend(sc->rxfreeq, size, 0, &msg); - if (ret == 0) - break; - if (n++ > 10000) { - printf("Too many credit fails for send free desc\n"); - break; - } - } - } -} - -void -nlm_xlpge_msgring_handler(int vc, int size, int code, int src_id, - struct nlm_fmn_msg *msg, void *data) -{ - uint64_t phys_addr; - struct nlm_xlpnae_softc *sc; - struct nlm_xlpge_softc *xlpge_sc; - struct ifnet *ifp; - uint32_t context; - uint32_t port = 0; - uint32_t length; - - sc = (struct nlm_xlpnae_softc *)data; - KASSERT(sc != NULL, ("Null sc in msgring handler")); - - if (size == 1) { /* process transmit complete */ - phys_addr = msg->msg[0] & 0xffffffffffULL; - - /* context is SGMII_RCV_CONTEXT_NUM + three bit vlan type - * or vlan priority - */ - context = (msg->msg[0] >> 40) & 0x3fff; - port = cntx2port[context]; - - if (port >= XLP_MAX_PORTS) { - printf("%s:%d Bad port %d (context=%d)\n", - __func__, __LINE__, port, context); - return; - } - ifp = ifp_ports[port].xlpge_if; - xlpge_sc = ifp_ports[port].xlpge_sc; - - nlm_xlpge_release_mbuf(phys_addr); - - if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); - - } else if (size > 1) { /* Recieve packet */ - phys_addr = msg->msg[1] & 0xffffffffc0ULL; - length = (msg->msg[1] >> 40) & 0x3fff; - length -= MAC_CRC_LEN; - - /* context is SGMII_RCV_CONTEXT_NUM + three bit vlan type - * or vlan priority - */ - context = (msg->msg[1] >> 54) & 0x3ff; - port = cntx2port[context]; - - if (port >= XLP_MAX_PORTS) { - printf("%s:%d Bad port %d (context=%d)\n", - __func__, __LINE__, port, context); - return; - } - - ifp = ifp_ports[port].xlpge_if; - xlpge_sc = ifp_ports[port].xlpge_sc; - - nlm_xlpge_rx(xlpge_sc, port, phys_addr, length); - /* return back a free descriptor to NA */ - nlm_xlpge_submit_rx_free_desc(xlpge_sc, 1); - } -} diff --git a/sys/mips/nlm/dev/net/xlpge.h b/sys/mips/nlm/dev/net/xlpge.h deleted file mode 100644 index 811b9542d6d..00000000000 --- a/sys/mips/nlm/dev/net/xlpge.h +++ /dev/null @@ -1,138 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __XLPGE_H__ -#define __XLPGE_H__ - -#define NLM_XLPGE_TXQ_SIZE 1024 -#define MAC_CRC_LEN 4 - -enum xlpge_link_state { - NLM_LINK_DOWN, - NLM_LINK_UP -}; - -enum xlpge_floctrl_status { - NLM_FLOWCTRL_DISABLED, - NLM_FLOWCTRL_ENABLED -}; - -struct nlm_xlp_portdata { - struct ifnet *xlpge_if; - struct nlm_xlpge_softc *xlpge_sc; -}; - -struct nlm_xlpnae_softc { - device_t xlpnae_dev; - int node; /* XLP Node id */ - uint64_t base; /* NAE IO base */ - uint64_t poe_base; /* POE IO base */ - uint64_t poedv_base; /* POE distribution vec IO base */ - - int freq; /* frequency of nae block */ - int flow_crc_poly; /* Flow CRC16 polynomial */ - int total_free_desc; /* total for node */ - int max_ports; - int total_num_ports; - int per_port_num_flows; - - u_int nucores; - u_int nblocks; - u_int num_complex; - u_int ncontexts; - - /* Ingress side parameters */ - u_int num_desc; /* no of descriptors in each packet */ - u_int parser_threshold;/* threshold of entries above which */ - /* the parser sequencer is scheduled */ - /* NetIOR configs */ - u_int cmplx_type[8]; /* XXXJC: redundant? */ - struct nae_port_config *portcfg; - u_int blockmask; - u_int portmask[XLP_NAE_NBLOCKS]; - u_int ilmask; - u_int xauimask; - u_int sgmiimask; - u_int hw_parser_en; - u_int prepad_en; - u_int prepad_size; - u_int driver_mode; - u_int ieee_1588_en; -}; - -struct nlm_xlpge_softc { - struct ifnet *xlpge_if; /* should be first member */ - /* see - mii.c:miibus_attach() */ - device_t xlpge_dev; - device_t mii_bus; - struct nlm_xlpnae_softc *network_sc; - uint64_t base_addr; /* NAE IO base */ - int node; /* node id (quickread) */ - int block; /* network block id (quickread) */ - int port; /* port id - among the 18 in XLP */ - int type; /* port type - see xlp_gmac_port_types */ - int valid; /* boolean: valid port or not */ - struct mii_data xlpge_mii; - int nfree_desc; /* No of free descriptors sent to port */ - int phy_addr; /* PHY id for the interface */ - - int speed; /* Port speed */ - int duplexity; /* Port duplexity */ - int link; /* Port link status */ - int flowctrl; /* Port flow control setting */ - - unsigned char dev_addr[ETHER_ADDR_LEN]; - struct mtx sc_lock; - int if_flags; - struct nae_port_config *portcfg; - struct callout xlpge_callout; - int mdio_bus; - int txq; - int rxfreeq; - int hw_parser_en; - int prepad_en; - int prepad_size; -}; - -#define XLP_NTXFRAGS 16 -#define NULL_VFBID 127 - -struct xlpge_tx_desc { - uint64_t frag[XLP_NTXFRAGS]; -}; - -#define XLPGE_LOCK_INIT(_sc, _name) \ - mtx_init(&(_sc)->sc_lock, _name, MTX_NETWORK_LOCK, MTX_DEF) -#define XLPGE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_lock) -#define XLPGE_LOCK(_sc) mtx_lock(&(_sc)->sc_lock) -#define XLPGE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_lock) -#define XLPGE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_lock, MA_OWNED) - -#endif diff --git a/sys/mips/nlm/dev/sec/nlmrsa.c b/sys/mips/nlm/dev/sec/nlmrsa.c deleted file mode 100644 index d2600443339..00000000000 --- a/sys/mips/nlm/dev/sec/nlmrsa.c +++ /dev/null @@ -1,483 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include "cryptodev_if.h" - -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef NLM_RSA_DEBUG -static void print_krp_params(struct cryptkop *krp); -#endif - -static int xlp_rsa_init(struct xlp_rsa_softc *sc, int node); -static int xlp_rsa_kprocess(device_t , struct cryptkop *, int); -static int xlp_get_rsa_opsize(struct xlp_rsa_command *cmd, unsigned int bits); -static void xlp_free_cmd_params(struct xlp_rsa_command *cmd); -static int xlp_rsa_inp2hwformat(uint8_t *src, uint8_t *dst, - uint32_t paramsize, uint8_t result); - -static int xlp_rsa_probe(device_t); -static int xlp_rsa_attach(device_t); -static int xlp_rsa_detach(device_t); - -static device_method_t xlp_rsa_methods[] = { - /* device interface */ - DEVMETHOD(device_probe, xlp_rsa_probe), - DEVMETHOD(device_attach, xlp_rsa_attach), - DEVMETHOD(device_detach, xlp_rsa_detach), - - /* bus interface */ - DEVMETHOD(bus_print_child, bus_generic_print_child), - DEVMETHOD(bus_driver_added, bus_generic_driver_added), - - /* crypto device methods */ - DEVMETHOD(cryptodev_kprocess, xlp_rsa_kprocess), - - DEVMETHOD_END -}; - -static driver_t xlp_rsa_driver = { - "nlmrsa", - xlp_rsa_methods, - sizeof(struct xlp_rsa_softc) -}; -static devclass_t xlp_rsa_devclass; - -DRIVER_MODULE(nlmrsa, pci, xlp_rsa_driver, xlp_rsa_devclass, 0, 0); -MODULE_DEPEND(nlmrsa, crypto, 1, 1, 1); - -#ifdef NLM_RSA_DEBUG -static void -print_krp_params(struct cryptkop *krp) -{ - int i; - - printf("krp->krp_op :%d\n", krp->krp_op); - printf("krp->krp_status :%d\n", krp->krp_status); - printf("krp->krp_iparams:%d\n", krp->krp_iparams); - printf("krp->krp_oparams:%d\n", krp->krp_oparams); - for (i = 0; i < krp->krp_iparams + krp->krp_oparams; i++) { - printf("krp->krp_param[%d].crp_p :0x%llx\n", i, - (unsigned long long)krp->krp_param[i].crp_p); - printf("krp->krp_param[%d].crp_nbits :%d\n", i, - krp->krp_param[i].crp_nbits); - printf("krp->krp_param[%d].crp_nbytes :%d\n", i, - howmany(krp->krp_param[i].crp_nbits, 8)); - } -} -#endif - -static int -xlp_rsa_init(struct xlp_rsa_softc *sc, int node) -{ - struct xlp_rsa_command *cmd = NULL; - uint32_t fbvc, dstvc, endsel, regval; - struct nlm_fmn_msg m; - int err, ret, i; - uint64_t base; - - /* Register interrupt handler for the RSA/ECC CMS messages */ - if (register_msgring_handler(sc->rsaecc_vc_start, - sc->rsaecc_vc_end, nlm_xlprsaecc_msgring_handler, sc) != 0) { - err = -1; - printf("Couldn't register rsa/ecc msgring handler\n"); - goto errout; - } - fbvc = nlm_cpuid() * 4 + XLPGE_FB_VC; - /* Do the CMS credit initialization */ - /* Currently it is configured by default to 50 when kernel comes up */ - -#if BYTE_ORDER == LITTLE_ENDIAN - for (i = 0; i < nitems(nlm_rsa_ucode_data); i++) - nlm_rsa_ucode_data[i] = htobe64(nlm_rsa_ucode_data[i]); -#endif - for (dstvc = sc->rsaecc_vc_start; dstvc <= sc->rsaecc_vc_end; dstvc++) { - cmd = malloc(sizeof(struct xlp_rsa_command), M_DEVBUF, - M_NOWAIT | M_ZERO); - KASSERT(cmd != NULL, ("%s:cmd is NULL\n", __func__)); - cmd->rsasrc = contigmalloc(sizeof(nlm_rsa_ucode_data), - M_DEVBUF, - (M_WAITOK | M_ZERO), - 0UL /* low address */, -1UL /* high address */, - XLP_L2L3_CACHELINE_SIZE /* alignment */, - 0UL /* boundary */); - KASSERT(cmd->rsasrc != NULL, - ("%s:cmd->rsasrc is NULL\n", __func__)); - memcpy(cmd->rsasrc, nlm_rsa_ucode_data, - sizeof(nlm_rsa_ucode_data)); - m.msg[0] = nlm_crypto_form_rsa_ecc_fmn_entry0(1, 0x70, 0, - vtophys(cmd->rsasrc)); - m.msg[1] = nlm_crypto_form_rsa_ecc_fmn_entry1(0, 1, fbvc, - vtophys(cmd->rsasrc)); - /* Software scratch pad */ - m.msg[2] = (uintptr_t)cmd; - m.msg[3] = 0; - - ret = nlm_fmn_msgsend(dstvc, 3, FMN_SWCODE_RSA, &m); - if (ret != 0) { - err = -1; - printf("%s: msgsnd failed (%x)\n", __func__, ret); - goto errout; - } - } - /* Configure so that all VCs send request to all RSA pipes */ - base = nlm_get_rsa_regbase(node); - if (nlm_is_xlp3xx()) { - endsel = 1; - regval = 0xFFFF; - } else { - endsel = 3; - regval = 0x07FFFFFF; - } - for (i = 0; i < endsel; i++) - nlm_write_rsa_reg(base, RSA_ENG_SEL_0 + i, regval); - return (0); -errout: - xlp_free_cmd_params(cmd); - return (err); -} - -/* This function is called from an interrupt handler */ -void -nlm_xlprsaecc_msgring_handler(int vc, int size, int code, int src_id, - struct nlm_fmn_msg *msg, void *data) -{ - struct xlp_rsa_command *cmd; - struct xlp_rsa_softc *sc; - struct crparam *outparam; - int ostart; - - KASSERT(code == FMN_SWCODE_RSA, - ("%s: bad code = %d, expected code = %d\n", __func__, code, - FMN_SWCODE_RSA)); - - sc = data; - KASSERT(src_id >= sc->rsaecc_vc_start && src_id <= sc->rsaecc_vc_end, - ("%s: bad src_id = %d, expect %d - %d\n", __func__, - src_id, sc->rsaecc_vc_start, sc->rsaecc_vc_end)); - - cmd = (struct xlp_rsa_command *)(uintptr_t)msg->msg[1]; - KASSERT(cmd != NULL, ("%s:cmd not received properly\n", __func__)); - - if (RSA_ERROR(msg->msg[0]) != 0) { - printf("%s: Message rcv msg0 %llx msg1 %llx err %x \n", - __func__, (unsigned long long)msg->msg[0], - (unsigned long long)msg->msg[1], - (int)RSA_ERROR(msg->msg[0])); - cmd->krp->krp_status = EBADMSG; - } - - if (cmd->krp != NULL) { - ostart = cmd->krp->krp_iparams; - outparam = &cmd->krp->krp_param[ostart]; - xlp_rsa_inp2hwformat(cmd->rsasrc + cmd->rsaopsize * ostart, - outparam->crp_p, - howmany(outparam->crp_nbits, 8), - 1); - crypto_kdone(cmd->krp); - } - - xlp_free_cmd_params(cmd); -} - -static int -xlp_rsa_probe(device_t dev) -{ - struct xlp_rsa_softc *sc; - - if (pci_get_vendor(dev) == PCI_VENDOR_NETLOGIC && - pci_get_device(dev) == PCI_DEVICE_ID_NLM_RSA) { - sc = device_get_softc(dev); - return (BUS_PROBE_DEFAULT); - } - return (ENXIO); -} - -/* - * Attach an interface that successfully probed. - */ -static int -xlp_rsa_attach(device_t dev) -{ - struct xlp_rsa_softc *sc = device_get_softc(dev); - uint64_t base; - int qstart, qnum; - int freq, node; - - sc->sc_dev = dev; - - node = nlm_get_device_node(pci_get_slot(dev)); - freq = nlm_set_device_frequency(node, DFS_DEVICE_RSA, 250); - if (bootverbose) - device_printf(dev, "RSA Freq: %dMHz\n", freq); - if (pci_get_device(dev) == PCI_DEVICE_ID_NLM_RSA) { - device_set_desc(dev, "XLP RSA/ECC Accelerator"); - sc->sc_cid = crypto_get_driverid(dev, - sizeof(struct xlp_rsa_session), CRYPTOCAP_F_HARDWARE); - if (sc->sc_cid < 0) { - printf("xlp_rsaecc-err:couldn't get the driver id\n"); - goto error_exit; - } - if (crypto_kregister(sc->sc_cid, CRK_MOD_EXP, 0) != 0) - goto error_exit; - - base = nlm_get_rsa_pcibase(node); - qstart = nlm_qidstart(base); - qnum = nlm_qnum(base); - sc->rsaecc_vc_start = qstart; - sc->rsaecc_vc_end = qstart + qnum - 1; - } - if (xlp_rsa_init(sc, node) != 0) - goto error_exit; - device_printf(dev, "RSA Initialization complete!\n"); - gone_in_dev(dev, 14, "Asymmetric crypto"); - return (0); - -error_exit: - return (ENXIO); -} - -/* - * Detach an interface that successfully probed. - */ -static int -xlp_rsa_detach(device_t dev) -{ - return (0); -} - -/* - * XXX freesession should run a zero'd mac/encrypt key into context ram. - * XXX to blow away any keys already stored there. - */ - -static void -xlp_free_cmd_params(struct xlp_rsa_command *cmd) -{ - - if (cmd == NULL) - return; - if (cmd->rsasrc != NULL) { - if (cmd->krp == NULL) /* Micro code load */ - contigfree(cmd->rsasrc, sizeof(nlm_rsa_ucode_data), - M_DEVBUF); - else - free(cmd->rsasrc, M_DEVBUF); - } - free(cmd, M_DEVBUF); -} - -static int -xlp_get_rsa_opsize(struct xlp_rsa_command *cmd, unsigned int bits) -{ - - if (bits == 0 || bits > 8192) - return (-1); - /* XLP hardware expects always a fixed size with unused bytes - * zeroed out in the input data */ - if (bits <= 512) { - cmd->rsatype = 0x40; - cmd->rsaopsize = 64; - } else if (bits <= 1024) { - cmd->rsatype = 0x41; - cmd->rsaopsize = 128; - } else if (bits <= 2048) { - cmd->rsatype = 0x42; - cmd->rsaopsize = 256; - } else if (bits <= 4096) { - cmd->rsatype = 0x43; - cmd->rsaopsize = 512; - } else if (bits <= 8192) { - cmd->rsatype = 0x44; - cmd->rsaopsize = 1024; - } - return (0); -} - -static int -xlp_rsa_inp2hwformat(uint8_t *src, uint8_t *dst, uint32_t paramsize, - uint8_t result) -{ - uint32_t pdwords, pbytes; - int i, j, k; - - pdwords = paramsize / 8; - pbytes = paramsize % 8; - - for (i = 0, k = 0; i < pdwords; i++) { - /* copy dwords of inp/hw to hw/out format */ - for (j = 7; j >= 0; j--, k++) - dst[i * 8 + j] = src[k]; - } - if (pbytes) { - if (result == 0) { - /* copy rem bytes of input data to hw format */ - for (j = 7; k < paramsize; j--, k++) - dst[i * 8 + j] = src[k]; - } else { - /* copy rem bytes of hw data to exp output format */ - for (j = 7; k < paramsize; j--, k++) - dst[k] = src[i * 8 + j]; - } - } - - return (0); -} - -static int -nlm_crypto_complete_rsa_request(struct xlp_rsa_softc *sc, - struct xlp_rsa_command *cmd) -{ - unsigned int fbvc; - struct nlm_fmn_msg m; - int ret; - - fbvc = nlm_cpuid() * 4 + XLPGE_FB_VC; - - m.msg[0] = nlm_crypto_form_rsa_ecc_fmn_entry0(1, cmd->rsatype, - cmd->rsafn, vtophys(cmd->rsasrc)); - m.msg[1] = nlm_crypto_form_rsa_ecc_fmn_entry1(0, 1, fbvc, - vtophys(cmd->rsasrc + cmd->rsaopsize * cmd->krp->krp_iparams)); - /* Software scratch pad */ - m.msg[2] = (uintptr_t)cmd; - m.msg[3] = 0; - - /* Send the message to rsa engine vc */ - ret = nlm_fmn_msgsend(sc->rsaecc_vc_start, 3, FMN_SWCODE_RSA, &m); - if (ret != 0) { -#ifdef NLM_SEC_DEBUG - printf("%s: msgsnd failed (%x)\n", __func__, ret); -#endif - return (ERESTART); - } - return (0); -} - -static int -xlp_rsa_kprocess(device_t dev, struct cryptkop *krp, int hint) -{ - struct xlp_rsa_softc *sc = device_get_softc(dev); - struct xlp_rsa_command *cmd; - struct crparam *kp; - int err, i; - - if (krp == NULL || krp->krp_callback == NULL) - return (EINVAL); - - cmd = malloc(sizeof(struct xlp_rsa_command), M_DEVBUF, - M_NOWAIT | M_ZERO); - KASSERT(cmd != NULL, ("%s:cmd is NULL\n", __func__)); - cmd->krp = krp; - -#ifdef NLM_RSA_DEBUG - print_krp_params(krp); -#endif - err = EOPNOTSUPP; - switch (krp->krp_op) { - case CRK_MOD_EXP: - if (krp->krp_iparams == 3 && krp->krp_oparams == 1) - break; - goto errout; - default: - device_printf(dev, "Op:%d not yet supported\n", krp->krp_op); - goto errout; - } - - err = xlp_get_rsa_opsize(cmd, - krp->krp_param[krp->krp_iparams - 1].crp_nbits); - if (err != 0) { - err = EINVAL; - goto errout; - } - cmd->rsafn = 0; /* Mod Exp */ - cmd->rsasrc = malloc( - cmd->rsaopsize * (krp->krp_iparams + krp->krp_oparams), - M_DEVBUF, - M_NOWAIT | M_ZERO); - if (cmd->rsasrc == NULL) { - err = ENOMEM; - goto errout; - } - - for (i = 0, kp = krp->krp_param; i < krp->krp_iparams; i++, kp++) { - KASSERT(kp->crp_nbits != 0, - ("%s: parameter[%d]'s length is zero\n", __func__, i)); - xlp_rsa_inp2hwformat(kp->crp_p, - cmd->rsasrc + i * cmd->rsaopsize, - howmany(kp->crp_nbits, 8), 0); - } - err = nlm_crypto_complete_rsa_request(sc, cmd); - if (err != 0) - goto errout; - - return (0); -errout: - xlp_free_cmd_params(cmd); - krp->krp_status = err; - crypto_kdone(krp); - return (err); -} diff --git a/sys/mips/nlm/dev/sec/nlmrsalib.h b/sys/mips/nlm/dev/sec/nlmrsalib.h deleted file mode 100644 index 08ab5974a3e..00000000000 --- a/sys/mips/nlm/dev/sec/nlmrsalib.h +++ /dev/null @@ -1,62 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef _NLMRSALIB_H_ -#define _NLMRSALIB_H_ - -#define RSA_ERROR(msg0) (((msg0) >> 53) & 0x1f) - -struct xlp_rsa_session { -}; - -struct xlp_rsa_command { - struct xlp_rsa_session *ses; - struct cryptkop *krp; - uint8_t *rsasrc; - uint32_t rsaopsize; - uint32_t rsatype; - uint32_t rsafn; -}; - -/* - * Holds data specific to nlm security accelerators - */ -struct xlp_rsa_softc { - device_t sc_dev; /* device backpointer */ - uint64_t rsa_base; - int sc_cid; - int rsaecc_vc_start; - int rsaecc_vc_end; -}; - -void -nlm_xlprsaecc_msgring_handler(int vc, int size, int code, int src_id, - struct nlm_fmn_msg *msg, void *data); - -#endif /* _NLMRSALIB_H_ */ diff --git a/sys/mips/nlm/dev/sec/nlmsec.c b/sys/mips/nlm/dev/sec/nlmsec.c deleted file mode 100644 index d5b9a5fd560..00000000000 --- a/sys/mips/nlm/dev/sec/nlmsec.c +++ /dev/null @@ -1,690 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include "cryptodev_if.h" - -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -unsigned int creditleft; - -static int xlp_sec_init(struct xlp_sec_softc *sc); -static int xlp_sec_probesession(device_t, - const struct crypto_session_params *); -static int xlp_sec_newsession(device_t , crypto_session_t, - const struct crypto_session_params *); -static int xlp_sec_process(device_t , struct cryptop *, int); -static void xlp_copyiv(struct xlp_sec_softc *, struct xlp_sec_command *, - const struct crypto_session_params *); -static int xlp_get_nsegs(struct cryptop *, unsigned int *); -static int xlp_alloc_cmd_params(struct xlp_sec_command *, unsigned int); -static void xlp_free_cmd_params(struct xlp_sec_command *); - -static int xlp_sec_probe(device_t); -static int xlp_sec_attach(device_t); -static int xlp_sec_detach(device_t); - -static device_method_t xlp_sec_methods[] = { - /* device interface */ - DEVMETHOD(device_probe, xlp_sec_probe), - DEVMETHOD(device_attach, xlp_sec_attach), - DEVMETHOD(device_detach, xlp_sec_detach), - - /* bus interface */ - DEVMETHOD(bus_print_child, bus_generic_print_child), - DEVMETHOD(bus_driver_added, bus_generic_driver_added), - - /* crypto device methods */ - DEVMETHOD(cryptodev_probesession, xlp_sec_probesession), - DEVMETHOD(cryptodev_newsession, xlp_sec_newsession), - DEVMETHOD(cryptodev_process, xlp_sec_process), - - DEVMETHOD_END -}; - -static driver_t xlp_sec_driver = { - "nlmsec", - xlp_sec_methods, - sizeof(struct xlp_sec_softc) -}; -static devclass_t xlp_sec_devclass; - -DRIVER_MODULE(nlmsec, pci, xlp_sec_driver, xlp_sec_devclass, 0, 0); -MODULE_DEPEND(nlmsec, crypto, 1, 1, 1); - -void -nlm_xlpsec_msgring_handler(int vc, int size, int code, int src_id, - struct nlm_fmn_msg *msg, void *data); - -#ifdef NLM_SEC_DEBUG - -#define extract_bits(x, bitshift, bitcnt) \ - (((unsigned long long)x >> bitshift) & ((1ULL << bitcnt) - 1)) - -void -print_crypto_params(struct xlp_sec_command *cmd, struct nlm_fmn_msg m) -{ - unsigned long long msg0,msg1,msg2,msg3,msg4,msg5,msg6,msg7,msg8; - - msg0 = cmd->ctrlp->desc0; - msg1 = cmd->paramp->desc0; - msg2 = cmd->paramp->desc1; - msg3 = cmd->paramp->desc2; - msg4 = cmd->paramp->desc3; - msg5 = cmd->paramp->segment[0][0]; - msg6 = cmd->paramp->segment[0][1]; - msg7 = m.msg[0]; - msg8 = m.msg[1]; - - printf("msg0 %llx msg1 %llx msg2 %llx msg3 %llx msg4 %llx msg5 %llx" - "msg6 %llx msg7 %llx msg8 %llx\n", msg0, msg1, msg2, msg3, msg4, - msg5, msg6, msg7, msg8); - - printf("c0: hmac %d htype %d hmode %d ctype %d cmode %d arc4 %x\n", - (unsigned int)extract_bits(msg0, 61, 1), - (unsigned int)extract_bits(msg0, 52, 8), - (unsigned int)extract_bits(msg0, 43, 8), - (unsigned int)extract_bits(msg0, 34, 8), - (unsigned int)extract_bits(msg0, 25, 8), - (unsigned int)extract_bits(msg0, 0, 23)); - - printf("p0: tls %d hsrc %d hl3 %d enc %d ivl %d hd %llx\n", - (unsigned int)extract_bits(msg1, 63, 1), - (unsigned int)extract_bits(msg1,62,1), - (unsigned int)extract_bits(msg1,60,1), - (unsigned int)extract_bits(msg1,59,1), - (unsigned int)extract_bits(msg1,41,16), extract_bits(msg1,0,40)); - - printf("p1: clen %u hl %u\n", (unsigned int)extract_bits(msg2, 32, 32), - (unsigned int)extract_bits(msg2,0,32)); - - printf("p2: ivoff %d cbit %d coff %d hbit %d hclb %d hoff %d\n", - (unsigned int)extract_bits(msg3, 45, 17), - (unsigned int)extract_bits(msg3, 42,3), - (unsigned int)extract_bits(msg3, 22,16), - (unsigned int)extract_bits(msg3, 19,3), - (unsigned int)extract_bits(msg3, 18,1), - (unsigned int)extract_bits(msg3, 0, 16)); - - printf("p3: desfbid %d tlen %d arc4 %x hmacpad %d\n", - (unsigned int)extract_bits(msg4, 48,16), - (unsigned int)extract_bits(msg4,11,16), - (unsigned int)extract_bits(msg4,6,3), - (unsigned int)extract_bits(msg4,5,1)); - - printf("p4: sflen %d sddr %llx \n", - (unsigned int)extract_bits(msg5, 48, 16),extract_bits(msg5, 0, 40)); - - printf("p5: dflen %d cl3 %d cclob %d cdest %llx \n", - (unsigned int)extract_bits(msg6, 48, 16), - (unsigned int)extract_bits(msg6, 46, 1), - (unsigned int)extract_bits(msg6, 41, 1), extract_bits(msg6, 0, 40)); - - printf("fmn0: fbid %d dfrlen %d dfrv %d cklen %d cdescaddr %llx\n", - (unsigned int)extract_bits(msg7, 48, 16), - (unsigned int)extract_bits(msg7,46,2), - (unsigned int)extract_bits(msg7,45,1), - (unsigned int)extract_bits(msg7,40,5), - (extract_bits(msg7,0,34)<< 6)); - - printf("fmn1: arc4 %d hklen %d pdesclen %d pktdescad %llx\n", - (unsigned int)extract_bits(msg8, 63, 1), - (unsigned int)extract_bits(msg8,56,5), - (unsigned int)extract_bits(msg8,43,12), - (extract_bits(msg8,0,34) << 6)); - - return; -} - -void -print_cmd(struct xlp_sec_command *cmd) -{ - printf("session_num :%d\n",cmd->session_num); - printf("crp :0x%x\n",(uint32_t)cmd->crp); - printf("enccrd :0x%x\n",(uint32_t)cmd->enccrd); - printf("maccrd :0x%x\n",(uint32_t)cmd->maccrd); - printf("ses :%d\n",(uint32_t)cmd->ses); - printf("ctrlp :0x%x\n",(uint32_t)cmd->ctrlp); - printf("paramp :0x%x\n",(uint32_t)cmd->paramp); - printf("hashdest :0x%x\n",(uint32_t)cmd->hashdest); - printf("hashsrc :%d\n",cmd->hashsrc); - printf("hmacpad :%d\n",cmd->hmacpad); - printf("hashoff :%d\n",cmd->hashoff); - printf("hashlen :%d\n",cmd->hashlen); - printf("cipheroff :%d\n",cmd->cipheroff); - printf("cipherlen :%d\n",cmd->cipherlen); - printf("ivoff :%d\n",cmd->ivoff); - printf("ivlen :%d\n",cmd->ivlen); - printf("hashalg :%d\n",cmd->hashalg); - printf("hashmode :%d\n",cmd->hashmode); - printf("cipheralg :%d\n",cmd->cipheralg); - printf("ciphermode :%d\n",cmd->ciphermode); - printf("nsegs :%d\n",cmd->nsegs); - printf("hash_dst_len :%d\n",cmd->hash_dst_len); -} -#endif /* NLM_SEC_DEBUG */ - -static int -xlp_sec_init(struct xlp_sec_softc *sc) -{ - - /* Register interrupt handler for the SEC CMS messages */ - if (register_msgring_handler(sc->sec_vc_start, - sc->sec_vc_end, nlm_xlpsec_msgring_handler, sc) != 0) { - printf("Couldn't register sec msgring handler\n"); - return (-1); - } - - /* Do the CMS credit initialization */ - /* Currently it is configured by default to 50 when kernel comes up */ - - return (0); -} - -/* This function is called from an interrupt handler */ -void -nlm_xlpsec_msgring_handler(int vc, int size, int code, int src_id, - struct nlm_fmn_msg *msg, void *data) -{ - struct xlp_sec_command *cmd = NULL; - struct xlp_sec_softc *sc = NULL; - uint8_t hash[HASH_MAX_LEN]; - - KASSERT(code == FMN_SWCODE_CRYPTO, - ("%s: bad code = %d, expected code = %d\n", __FUNCTION__, - code, FMN_SWCODE_CRYPTO)); - - sc = (struct xlp_sec_softc *)data; - KASSERT(src_id >= sc->sec_vc_start && src_id <= sc->sec_vc_end, - ("%s: bad src_id = %d, expect %d - %d\n", __FUNCTION__, - src_id, sc->sec_vc_start, sc->sec_vc_end)); - - cmd = (struct xlp_sec_command *)(uintptr_t)msg->msg[0]; - KASSERT(cmd != NULL && cmd->crp != NULL, - ("%s :cmd not received properly\n",__FUNCTION__)); - - KASSERT(CRYPTO_ERROR(msg->msg[1]) == 0, - ("%s: Message rcv msg0 %llx msg1 %llx err %x \n", __FUNCTION__, - (unsigned long long)msg->msg[0], (unsigned long long)msg->msg[1], - (int)CRYPTO_ERROR(msg->msg[1]))); - - /* If there are not enough credits to send, then send request - * will fail with ERESTART and the driver will be blocked until it is - * unblocked here after knowing that there are sufficient credits to - * send the request again. - */ - if (sc->sc_needwakeup) { - atomic_add_int(&creditleft, sc->sec_msgsz); - if (creditleft >= (NLM_CRYPTO_LEFT_REQS)) { - crypto_unblock(sc->sc_cid, sc->sc_needwakeup); - sc->sc_needwakeup &= (~(CRYPTO_SYMQ | CRYPTO_ASYMQ)); - } - } - if (cmd->hash_dst_len != 0) { - if (cmd->crp->crp_op & CRYPTO_OP_VERIFY_DIGEST) { - crypto_copydata(cmd->crp, cmd->crp->crp_digest_start, - cmd->hash_dst_len, hash); - if (timingsafe_bcmp(cmd->hashdest, hash, - cmd->hash_dst_len) != 0) - cmd->crp->crp_etype = EBADMSG; - } else - crypto_copyback(cmd->crp, cmd->crp->crp_digest_start, - cmd->hash_dst_len, cmd->hashdest); - } - - /* This indicates completion of the crypto operation */ - crypto_done(cmd->crp); - - xlp_free_cmd_params(cmd); - - return; -} - -static int -xlp_sec_probe(device_t dev) -{ - struct xlp_sec_softc *sc; - - if (pci_get_vendor(dev) == PCI_VENDOR_NETLOGIC && - pci_get_device(dev) == PCI_DEVICE_ID_NLM_SAE) { - sc = device_get_softc(dev); - return (BUS_PROBE_DEFAULT); - } - return (ENXIO); -} - -/* - * Attach an interface that successfully probed. - */ -static int -xlp_sec_attach(device_t dev) -{ - struct xlp_sec_softc *sc = device_get_softc(dev); - uint64_t base; - int qstart, qnum; - int freq, node; - - sc->sc_dev = dev; - - node = nlm_get_device_node(pci_get_slot(dev)); - freq = nlm_set_device_frequency(node, DFS_DEVICE_SAE, 250); - if (bootverbose) - device_printf(dev, "SAE Freq: %dMHz\n", freq); - if(pci_get_device(dev) == PCI_DEVICE_ID_NLM_SAE) { - device_set_desc(dev, "XLP Security Accelerator"); - sc->sc_cid = crypto_get_driverid(dev, - sizeof(struct xlp_sec_session), CRYPTOCAP_F_HARDWARE); - if (sc->sc_cid < 0) { - printf("xlp_sec - error : could not get the driver" - " id\n"); - goto error_exit; - } - - base = nlm_get_sec_pcibase(node); - qstart = nlm_qidstart(base); - qnum = nlm_qnum(base); - sc->sec_vc_start = qstart; - sc->sec_vc_end = qstart + qnum - 1; - } - - if (xlp_sec_init(sc) != 0) - goto error_exit; - if (bootverbose) - device_printf(dev, "SEC Initialization complete!\n"); - return (0); - -error_exit: - return (ENXIO); - -} - -/* - * Detach an interface that successfully probed. - */ -static int -xlp_sec_detach(device_t dev) -{ - return (0); -} - -static bool -xlp_sec_auth_supported(const struct crypto_session_params *csp) -{ - - switch (csp->csp_auth_alg) { - case CRYPTO_SHA1: - case CRYPTO_SHA1_HMAC: - break; - default: - return (false); - } - return (true); -} - -static bool -xlp_sec_cipher_supported(const struct crypto_session_params *csp) -{ - - switch (csp->csp_cipher_alg) { - case CRYPTO_AES_CBC: - if (csp->csp_ivlen != XLP_SEC_AES_IV_LENGTH) - return (false); - break; - default: - return (false); - } - - return (true); -} - -static int -xlp_sec_probesession(device_t dev, const struct crypto_session_params *csp) -{ - - if (csp->csp_flags != 0) - return (EINVAL); - switch (csp->csp_mode) { - case CSP_MODE_DIGEST: - if (!xlp_sec_auth_supported(csp)) - return (EINVAL); - break; - case CSP_MODE_CIPHER: - if (!xlp_sec_cipher_supported(csp)) - return (EINVAL); - break; - case CSP_MODE_ETA: - if (!xlp_sec_auth_supported(csp) || - !xlp_sec_cipher_supported(csp)) - return (EINVAL); - break; - default: - return (EINVAL); - } - return (CRYPTODEV_PROBE_HARDWARE); -} - -static int -xlp_sec_newsession(device_t dev, crypto_session_t cses, - const struct crypto_session_params *csp) -{ - struct xlp_sec_session *ses; - - ses = crypto_get_driver_session(cses); - - if (csp->csp_auth_alg != 0) { - if (csp->csp_auth_mlen == 0) - ses->hs_mlen = crypto_auth_hash(csp)->hashsize; - else - ses->hs_mlen = csp->csp_auth_mlen; - } - - return (0); -} - -/* - * XXX freesession routine should run a zero'd mac/encrypt key into context - * ram. to blow away any keys already stored there. - */ - -static void -xlp_copyiv(struct xlp_sec_softc *sc, struct xlp_sec_command *cmd, - const struct crypto_session_params *csp) -{ - struct cryptop *crp = NULL; - - crp = cmd->crp; - - if (crp->crp_flags & CRYPTO_F_IV_SEPARATE) - memcpy(cmd->iv, crp->crp_iv, csp->csp_ivlen); -} - -static int -xlp_get_nsegs(struct cryptop *crp, unsigned int *nsegs) -{ - - switch (crp->crp_buf.cb_type) { - case CRYPTO_BUF_MBUF: - case CRYPTO_BUF_SINGLE_MBUF: - { - struct mbuf *m = NULL; - - m = crp->crp_buf.cb_mbuf; - while (m != NULL) { - *nsegs += NLM_CRYPTO_NUM_SEGS_REQD(m->m_len); - if (crp->crp_buf.cb_type == CRYPTO_BUF_SINGLE_MBUF) - break; - m = m->m_next; - } - break; - } - case CRYPTO_BUF_UIO: - { - struct uio *uio = NULL; - struct iovec *iov = NULL; - int iol = 0; - - uio = crp->crp_buf.cb_uio; - iov = uio->uio_iov; - iol = uio->uio_iovcnt; - while (iol > 0) { - *nsegs += NLM_CRYPTO_NUM_SEGS_REQD(iov->iov_len); - iol--; - iov++; - } - break; - } - case CRYPTO_BUF_CONTIG: - *nsegs = NLM_CRYPTO_NUM_SEGS_REQD(crp->crp_buf.cb_buf_len); - break; - default: - return (EINVAL); - } - return (0); -} - -static int -xlp_alloc_cmd_params(struct xlp_sec_command *cmd, unsigned int nsegs) -{ - int err = 0; - - if(cmd == NULL) { - err = EINVAL; - goto error; - } - if ((cmd->ctrlp = malloc(sizeof(struct nlm_crypto_pkt_ctrl), M_DEVBUF, - M_NOWAIT | M_ZERO)) == NULL) { - err = ENOMEM; - goto error; - } - if (((uintptr_t)cmd->ctrlp & (XLP_L2L3_CACHELINE_SIZE - 1))) { - err = EINVAL; - goto error; - } - /* (nsegs - 1) because one seg is part of the structure already */ - if ((cmd->paramp = malloc(sizeof(struct nlm_crypto_pkt_param) + - (16 * (nsegs - 1)), M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) { - err = ENOMEM; - goto error; - } - if (((uintptr_t)cmd->paramp & (XLP_L2L3_CACHELINE_SIZE - 1))) { - err = EINVAL; - goto error; - } - if ((cmd->iv = malloc(EALG_MAX_BLOCK_LEN, M_DEVBUF, - M_NOWAIT | M_ZERO)) == NULL) { - err = ENOMEM; - goto error; - } - if ((cmd->hashdest = malloc(HASH_MAX_LEN, M_DEVBUF, - M_NOWAIT | M_ZERO)) == NULL) { - err = ENOMEM; - goto error; - } -error: - return (err); -} - -static void -xlp_free_cmd_params(struct xlp_sec_command *cmd) -{ - if (cmd->ctrlp != NULL) - free(cmd->ctrlp, M_DEVBUF); - if (cmd->paramp != NULL) - free(cmd->paramp, M_DEVBUF); - if (cmd->iv != NULL) - free(cmd->iv, M_DEVBUF); - if (cmd->hashdest != NULL) - free(cmd->hashdest, M_DEVBUF); - if (cmd != NULL) - free(cmd, M_DEVBUF); - return; -} - -static int -xlp_sec_process(device_t dev, struct cryptop *crp, int hint) -{ - struct xlp_sec_softc *sc = device_get_softc(dev); - const struct crypto_session_params *csp; - struct xlp_sec_command *cmd = NULL; - int err = -1, ret = 0; - struct xlp_sec_session *ses; - unsigned int nsegs = 0; - - ses = crypto_get_driver_session(crp->crp_session); - csp = crypto_get_params(crp->crp_session); - - /* - * This device only support AAD requests where the AAD is - * adjacent to the payload. - */ - if (crp->crp_aad_length != 0 && crp->crp_payload_start != - crp->crp_aad_start + crp->crp_aad_length) { - err = EFBIG; - goto errout; - } - - if ((cmd = malloc(sizeof(struct xlp_sec_command), M_DEVBUF, - M_NOWAIT | M_ZERO)) == NULL) { - err = ENOMEM; - goto errout; - } - - cmd->crp = crp; - cmd->ses = ses; - cmd->hash_dst_len = ses->hs_mlen; - - if ((ret = xlp_get_nsegs(crp, &nsegs)) != 0) { - err = EINVAL; - goto errout; - } - - if (crp->crp_flags & CRYPTO_F_IV_SEPARATE) { - /* Since IV is given as separate segment to avoid copy */ - nsegs += 1; - } - cmd->nsegs = nsegs; - - if ((err = xlp_alloc_cmd_params(cmd, nsegs)) != 0) - goto errout; - - switch (csp->csp_mode) { - case CSP_MODE_CIPHER: - if ((ret = nlm_get_cipher_param(cmd, csp)) != 0) { - err = EINVAL; - goto errout; - } - cmd->cipheroff = crp->crp_payload_start; - cmd->cipherlen = crp->crp_payload_length; - if (crp->crp_flags & CRYPTO_F_IV_SEPARATE) { - cmd->cipheroff += cmd->ivlen; - cmd->ivoff = 0; - } else - cmd->ivoff = crp->crp_iv_start; - xlp_copyiv(sc, cmd, csp); - if ((err = nlm_crypto_do_cipher(sc, cmd, csp)) != 0) - goto errout; - break; - case CSP_MODE_DIGEST: - if ((ret = nlm_get_digest_param(cmd, csp)) != 0) { - err = EINVAL; - goto errout; - } - cmd->hashoff = crp->crp_payload_start; - cmd->hashlen = crp->crp_payload_length; - cmd->hmacpad = 0; - cmd->hashsrc = 0; - if ((err = nlm_crypto_do_digest(sc, cmd, csp)) != 0) - goto errout; - break; - case CSP_MODE_ETA: - if ((ret = nlm_get_cipher_param(cmd, csp)) != 0) { - err = EINVAL; - goto errout; - } - if ((ret = nlm_get_digest_param(cmd, csp)) != 0) { - err = EINVAL; - goto errout; - } - if (crp->crp_aad_length != 0) { - cmd->hashoff = crp->crp_aad_start; - cmd->hashlen = crp->crp_aad_length + - crp->crp_payload_length; - } else { - cmd->hashoff = crp->crp_payload_start; - cmd->hashlen = crp->crp_payload_length; - } - cmd->hmacpad = 0; - if (CRYPTO_OP_IS_ENCRYPT(crp->crp_op)) - cmd->hashsrc = 1; - else - cmd->hashsrc = 0; - cmd->cipheroff = crp->crp_payload_start; - cmd->cipherlen = crp->crp_payload_length; - if (crp->crp_flags & CRYPTO_F_IV_SEPARATE) { - cmd->hashoff += cmd->ivlen; - cmd->cipheroff += cmd->ivlen; - cmd->ivoff = 0; - } else - cmd->ivoff = crp->crp_iv_start; - xlp_copyiv(sc, cmd, csp); - if ((err = nlm_crypto_do_cipher_digest(sc, cmd, csp)) != 0) - goto errout; - break; - default: - err = EINVAL; - goto errout; - } - return (0); -errout: - xlp_free_cmd_params(cmd); - if (err == ERESTART) { - sc->sc_needwakeup |= CRYPTO_SYMQ; - creditleft = 0; - return (err); - } - crp->crp_etype = err; - crypto_done(crp); - return (err); -} diff --git a/sys/mips/nlm/dev/sec/nlmseclib.c b/sys/mips/nlm/dev/sec/nlmseclib.c deleted file mode 100644 index 6a3705cc11f..00000000000 --- a/sys/mips/nlm/dev/sec/nlmseclib.c +++ /dev/null @@ -1,284 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include -#include - -static int -nlm_crypto_complete_sec_request(struct xlp_sec_softc *sc, - struct xlp_sec_command *cmd) -{ - unsigned int fbvc; - struct nlm_fmn_msg m; - int ret; - - fbvc = nlm_cpuid() / CMS_MAX_VCPU_VC; - m.msg[0] = m.msg[1] = m.msg[2] = m.msg[3] = 0; - - m.msg[0] = nlm_crypto_form_pkt_fmn_entry0(fbvc, 0, 0, - cmd->ctrlp->cipherkeylen, vtophys(cmd->ctrlp)); - - m.msg[1] = nlm_crypto_form_pkt_fmn_entry1(0, cmd->ctrlp->hashkeylen, - NLM_CRYPTO_PKT_DESC_SIZE(cmd->nsegs), vtophys(cmd->paramp)); - - /* Software scratch pad */ - m.msg[2] = (uintptr_t)cmd; - sc->sec_msgsz = 3; - - /* Send the message to sec/rsa engine vc */ - ret = nlm_fmn_msgsend(sc->sec_vc_start, sc->sec_msgsz, - FMN_SWCODE_CRYPTO, &m); - if (ret != 0) { -#ifdef NLM_SEC_DEBUG - printf("%s: msgsnd failed (%x)\n", __func__, ret); -#endif - return (ERESTART); - } - return (0); -} - -int -nlm_crypto_form_srcdst_segs(struct xlp_sec_command *cmd, - const struct crypto_session_params *csp) -{ - unsigned int srcseg = 0, dstseg = 0; - struct cryptop *crp = NULL; - - crp = cmd->crp; - - if (csp->csp_mode != CSP_MODE_DIGEST) { - /* IV is given as ONE segment to avoid copy */ - if (crp->crp_flags & CRYPTO_F_IV_SEPARATE) { - srcseg = nlm_crypto_fill_src_seg(cmd->paramp, srcseg, - cmd->iv, cmd->ivlen); - dstseg = nlm_crypto_fill_dst_seg(cmd->paramp, dstseg, - cmd->iv, cmd->ivlen); - } - } - - switch (crp->crp_buf.cb_type) { - case CRYPTO_BUF_MBUF: - case CRYPTO_BUF_SINGLE_MBUF: - { - struct mbuf *m = NULL; - - m = crp->crp_buf.cb_mbuf; - while (m != NULL) { - srcseg = nlm_crypto_fill_src_seg(cmd->paramp, srcseg, - mtod(m,caddr_t), m->m_len); - if (csp->csp_mode != CSP_MODE_DIGEST) { - dstseg = nlm_crypto_fill_dst_seg(cmd->paramp, - dstseg, mtod(m,caddr_t), m->m_len); - } - if (crp->crp_buf.cb_type == CRYPTO_BUF_SINGLE_MBUF) - break; - m = m->m_next; - } - break; - } - case CRYPTO_BUF_UIO: - { - struct uio *uio = NULL; - struct iovec *iov = NULL; - int iol = 0; - - uio = crp->crp_buf.cb_uio; - iov = uio->uio_iov; - iol = uio->uio_iovcnt; - - while (iol > 0) { - srcseg = nlm_crypto_fill_src_seg(cmd->paramp, srcseg, - (caddr_t)iov->iov_base, iov->iov_len); - if (csp->csp_mode != CSP_MODE_DIGEST) { - dstseg = nlm_crypto_fill_dst_seg(cmd->paramp, - dstseg, (caddr_t)iov->iov_base, - iov->iov_len); - } - iov++; - iol--; - } - } - case CRYPTO_BUF_CONTIG: - srcseg = nlm_crypto_fill_src_seg(cmd->paramp, srcseg, - crp->crp_buf.cb_buf, crp->crp_buf.cb_buf_len); - if (csp->csp_mode != CSP_MODE_DIGEST) { - dstseg = nlm_crypto_fill_dst_seg(cmd->paramp, dstseg, - crp->crp_buf.cb_buf, crp->crp_buf.cb_buf_len); - } - break; - default: - __assert_unreachable(); - } - return (0); -} - -int -nlm_crypto_do_cipher(struct xlp_sec_softc *sc, struct xlp_sec_command *cmd, - const struct crypto_session_params *csp) -{ - const unsigned char *cipkey = NULL; - int ret = 0; - - if (cmd->crp->crp_cipher_key != NULL) - cipkey = cmd->crp->crp_cipher_key; - else - cipkey = csp->csp_cipher_key; - nlm_crypto_fill_pkt_ctrl(cmd->ctrlp, 0, NLM_HASH_BYPASS, 0, - cmd->cipheralg, cmd->ciphermode, cipkey, - csp->csp_cipher_klen, NULL, 0); - - nlm_crypto_fill_cipher_pkt_param(cmd->ctrlp, cmd->paramp, - CRYPTO_OP_IS_ENCRYPT(cmd->crp->crp_op) ? 1 : 0, cmd->ivoff, - cmd->ivlen, cmd->cipheroff, cmd->cipherlen); - nlm_crypto_form_srcdst_segs(cmd, csp); - - ret = nlm_crypto_complete_sec_request(sc, cmd); - return (ret); -} - -int -nlm_crypto_do_digest(struct xlp_sec_softc *sc, struct xlp_sec_command *cmd, - const struct crypto_session_params *csp) -{ - const char *key; - int ret=0; - - if (cmd->crp->crp_auth_key != NULL) - key = cmd->crp->crp_auth_key; - else - key = csp->csp_auth_key; - nlm_crypto_fill_pkt_ctrl(cmd->ctrlp, csp->csp_auth_klen ? 1 : 0, - cmd->hashalg, cmd->hashmode, NLM_CIPHER_BYPASS, 0, - NULL, 0, key, csp->csp_auth_klen); - - nlm_crypto_fill_auth_pkt_param(cmd->ctrlp, cmd->paramp, - cmd->hashoff, cmd->hashlen, cmd->hmacpad, - (unsigned char *)cmd->hashdest); - - nlm_crypto_form_srcdst_segs(cmd, csp); - - ret = nlm_crypto_complete_sec_request(sc, cmd); - - return (ret); -} - -int -nlm_crypto_do_cipher_digest(struct xlp_sec_softc *sc, - struct xlp_sec_command *cmd, const struct crypto_session_params *csp) -{ - const unsigned char *cipkey = NULL; - const char *authkey; - int ret=0; - - if (cmd->crp->crp_cipher_key != NULL) - cipkey = cmd->crp->crp_cipher_key; - else - cipkey = csp->csp_cipher_key; - if (cmd->crp->crp_auth_key != NULL) - authkey = cmd->crp->crp_auth_key; - else - authkey = csp->csp_auth_key; - nlm_crypto_fill_pkt_ctrl(cmd->ctrlp, csp->csp_auth_klen ? 1 : 0, - cmd->hashalg, cmd->hashmode, cmd->cipheralg, cmd->ciphermode, - cipkey, csp->csp_cipher_klen, - authkey, csp->csp_auth_klen); - - nlm_crypto_fill_cipher_auth_pkt_param(cmd->ctrlp, cmd->paramp, - CRYPTO_OP_IS_ENCRYPT(cmd->crp->crp_op) ? 1 : 0, cmd->hashsrc, - cmd->ivoff, cmd->ivlen, cmd->hashoff, cmd->hashlen, - cmd->hmacpad, cmd->cipheroff, cmd->cipherlen, - (unsigned char *)cmd->hashdest); - - nlm_crypto_form_srcdst_segs(cmd, csp); - - ret = nlm_crypto_complete_sec_request(sc, cmd); - return (ret); -} - -int -nlm_get_digest_param(struct xlp_sec_command *cmd, - const struct crypto_session_params *csp) -{ - switch(csp->csp_auth_alg) { - case CRYPTO_SHA1: - cmd->hashalg = NLM_HASH_SHA; - cmd->hashmode = NLM_HASH_MODE_SHA1; - break; - case CRYPTO_SHA1_HMAC: - cmd->hashalg = NLM_HASH_SHA; - cmd->hashmode = NLM_HASH_MODE_SHA1; - break; - default: - /* Not supported */ - return (-1); - } - return (0); -} -int -nlm_get_cipher_param(struct xlp_sec_command *cmd, - const struct crypto_session_params *csp) -{ - switch(csp->csp_cipher_alg) { - case CRYPTO_AES_CBC: - cmd->cipheralg = NLM_CIPHER_AES128; - cmd->ciphermode = NLM_CIPHER_MODE_CBC; - cmd->ivlen = XLP_SEC_AES_IV_LENGTH; - break; - default: - /* Not supported */ - return (-1); - } - return (0); -} diff --git a/sys/mips/nlm/dev/sec/nlmseclib.h b/sys/mips/nlm/dev/sec/nlmseclib.h deleted file mode 100644 index b876e0b6a9a..00000000000 --- a/sys/mips/nlm/dev/sec/nlmseclib.h +++ /dev/null @@ -1,150 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _NLMSECLIB_H_ -#define _NLMSECLIB_H_ - -/* - * Cryptographic parameter definitions - */ -#define XLP_SEC_DES_KEY_LENGTH 8 /* Bytes */ -#define XLP_SEC_3DES_KEY_LENGTH 24 /* Bytes */ -#define XLP_SEC_AES128_KEY_LENGTH 16 /* Bytes */ -#define XLP_SEC_AES192_KEY_LENGTH 24 /* Bytes */ -#define XLP_SEC_AES256_KEY_LENGTH 32 /* Bytes */ -#define XLP_SEC_AES128F8_KEY_LENGTH 32 /* Bytes */ -#define XLP_SEC_AES192F8_KEY_LENGTH 48 /* Bytes */ -#define XLP_SEC_AES256F8_KEY_LENGTH 64 /* Bytes */ -#define XLP_SEC_KASUMI_F8_KEY_LENGTH 16 /* Bytes */ -#define XLP_SEC_MAX_CRYPT_KEY_LENGTH XLP_SEC_AES256F8_KEY_LENGTH - -#define XLP_SEC_DES_IV_LENGTH 8 /* Bytes */ -#define XLP_SEC_AES_IV_LENGTH 16 /* Bytes */ -#define XLP_SEC_ARC4_IV_LENGTH 0 /* Bytes */ -#define XLP_SEC_KASUMI_F8_IV_LENGTH 16 /* Bytes */ -#define XLP_SEC_MAX_IV_LENGTH 16 /* Bytes */ -#define XLP_SEC_IV_LENGTH_BYTES 8 /* Bytes */ - -#define XLP_SEC_AES_BLOCK_SIZE 16 /* Bytes */ -#define XLP_SEC_DES_BLOCK_SIZE 8 /* Bytes */ -#define XLP_SEC_3DES_BLOCK_SIZE 8 /* Bytes */ - -#define XLP_SEC_MD5_BLOCK_SIZE 64 /* Bytes */ -#define XLP_SEC_SHA1_BLOCK_SIZE 64 /* Bytes */ -#define XLP_SEC_SHA256_BLOCK_SIZE 64 /* Bytes */ -#define XLP_SEC_SHA384_BLOCK_SIZE 128 /* Bytes */ -#define XLP_SEC_SHA512_BLOCK_SIZE 128 /* Bytes */ -#define XLP_SEC_GCM_BLOCK_SIZE 16 /* XXX: Bytes */ -#define XLP_SEC_KASUMI_F9_BLOCK_SIZE 16 /* XXX: Bytes */ -#define XLP_SEC_MAX_BLOCK_SIZE 64 /* Max of MD5/SHA */ -#define XLP_SEC_MD5_LENGTH 16 /* Bytes */ -#define XLP_SEC_SHA1_LENGTH 20 /* Bytes */ -#define XLP_SEC_SHA256_LENGTH 32 /* Bytes */ -#define XLP_SEC_SHA384_LENGTH 64 /* Bytes */ -#define XLP_SEC_SHA512_LENGTH 64 /* Bytes */ -#define XLP_SEC_GCM_LENGTH 16 /* Bytes */ -#define XLP_SEC_KASUMI_F9_LENGTH 16 /* Bytes */ -#define XLP_SEC_KASUMI_F9_RESULT_LENGTH 4 /* Bytes */ -#define XLP_SEC_HMAC_LENGTH 64 /* Max of MD5/SHA/SHA256 */ -#define XLP_SEC_MAX_AUTH_KEY_LENGTH XLP_SEC_SHA512_BLOCK_SIZE -#define XLP_SEC_MAX_RC4_STATE_SIZE 264 /* char s[256], int i, int j */ - -#define CRYPTO_ERROR(msg1) ((unsigned int)msg1) - -#define NLM_CRYPTO_LEFT_REQS (CMS_DEFAULT_CREDIT/2) -#define NLM_CRYPTO_NUM_SEGS_REQD(__bufsize) \ - ((__bufsize + NLM_CRYPTO_MAX_SEG_LEN - 1) / NLM_CRYPTO_MAX_SEG_LEN) - -#define NLM_CRYPTO_PKT_DESC_SIZE(nsegs) (32 + (nsegs * 16)) - -extern unsigned int creditleft; - -struct xlp_sec_command { - struct cryptop *crp; - struct xlp_sec_session *ses; - struct nlm_crypto_pkt_ctrl *ctrlp; - struct nlm_crypto_pkt_param *paramp; - void *iv; - uint8_t des3key[24]; - uint8_t *hashdest; - uint8_t hashsrc; - uint8_t hmacpad; - uint32_t hashoff; - uint32_t hashlen; - uint32_t cipheroff; - uint32_t cipherlen; - uint32_t ivoff; - uint32_t ivlen; - uint32_t hashalg; - uint32_t hashmode; - uint32_t cipheralg; - uint32_t ciphermode; - uint32_t nsegs; - uint32_t hash_dst_len; /* used to store hash alg dst size */ -}; - -struct xlp_sec_session { - int hs_mlen; -}; - -/* - * Holds data specific to nlm security accelerators - */ -struct xlp_sec_softc { - device_t sc_dev; /* device backpointer */ - uint64_t sec_base; - int32_t sc_cid; - int sc_needwakeup; - uint32_t sec_vc_start; - uint32_t sec_vc_end; - uint32_t sec_msgsz; -}; - -#ifdef NLM_SEC_DEBUG -void print_crypto_params(struct xlp_sec_command *cmd, struct nlm_fmn_msg m); -void print_cmd(struct xlp_sec_command *cmd); -#endif -int nlm_crypto_form_srcdst_segs(struct xlp_sec_command *cmd, - const struct crypto_session_params *csp); -int nlm_crypto_do_cipher(struct xlp_sec_softc *sc, - struct xlp_sec_command *cmd, - const struct crypto_session_params *csp); -int nlm_crypto_do_digest(struct xlp_sec_softc *sc, - struct xlp_sec_command *cmd, - const struct crypto_session_params *csp); -int nlm_crypto_do_cipher_digest(struct xlp_sec_softc *sc, - struct xlp_sec_command *cmd, - const struct crypto_session_params *csp); -int nlm_get_digest_param(struct xlp_sec_command *cmd, - const struct crypto_session_params *csp); -int nlm_get_cipher_param(struct xlp_sec_command *cmd, - const struct crypto_session_params *csp); - -#endif /* _NLMSECLIB_H_ */ diff --git a/sys/mips/nlm/dev/sec/rsa_ucode.h b/sys/mips/nlm/dev/sec/rsa_ucode.h deleted file mode 100644 index 67ceaeedec2..00000000000 --- a/sys/mips/nlm/dev/sec/rsa_ucode.h +++ /dev/null @@ -1,956 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _NLM_HAL_RSA_UCODE_H -#define _NLM_HAL_RSA_UCODE_H -static uint64_t nlm_rsa_ucode_data [] = { - 0x0000000000000000ULL, - 0x00000000503840ecULL, - 0x00000001903800ecULL, - 0x00000002c03820ecULL, - 0x0000003760000044ULL, - 0x0000000000000014ULL, - 0x000000071000000cULL, - 0x00000007d000010cULL, - 0x0000001b80000c0cULL, - 0x00000000e03fc0ecULL, - 0x00000001103fc1ecULL, - 0x00000001403f42ecULL, - 0x00000001403fc4ecULL, - 0x0000003760000044ULL, - 0x000000001800003cULL, - 0x0000000d8000030cULL, - 0x0000000630000044ULL, - 0x000000002800003cULL, - 0x0000000ef000030cULL, - 0x0000000630000044ULL, - 0x00000000503fc23cULL, - 0x00000000a03fc33cULL, - 0x00000001403fc43cULL, - 0x00000010c000030cULL, - 0x0000000630000044ULL, - 0x0000000000000014ULL, - 0x000000071000000cULL, - 0x0000001c1000070cULL, - 0x0000002500000d0cULL, - 0x00000027c0000e0cULL, - 0x0000002d60000f0cULL, - 0x00000002603f00ecULL, - 0x00000002603f82ecULL, - 0x00000002803f83ecULL, - 0x00000002803f04ecULL, - 0x00000002a03f06ecULL, - 0x00000002a03f88ecULL, - 0x0000003760000044ULL, - 0x000000086000010cULL, - 0x00000003f0000044ULL, - 0x00000008d000010cULL, - 0x00000004b0000044ULL, - 0x00000008d000010cULL, - 0x0000000570000044ULL, - 0x000000000000001cULL, - 0x000000076000000cULL, - 0x0000001c1000070cULL, - 0x0000002690000d0cULL, - 0x0000002990000e0cULL, - 0x0000002e10000f0cULL, - 0x00000003903f20ecULL, - 0x00000003903fa2ecULL, - 0x00000003b03fa3ecULL, - 0x00000003b03f24ecULL, - 0x00000003d03f26ecULL, - 0x00000003d03fa8ecULL, - 0x0000003760000044ULL, - 0x000000096000010cULL, - 0x00000003f0000044ULL, - 0x0000000a0000010cULL, - 0x00000004b0000044ULL, - 0x0000000a0000010cULL, - 0x0000000570000044ULL, - 0x000000000800003cULL, - 0x0000000af000020cULL, - 0x0000000bc000030cULL, - 0x000000129000040cULL, - 0x000000178000050cULL, - 0x000000191000060cULL, - 0x0000001ff000080cULL, - 0x000000205000090cULL, - 0x00000022c0000a0cULL, - 0x00000020b0000b0cULL, - 0x0000001ac0000c0cULL, - 0x0000000680000044ULL, - 0x000000001000003cULL, - 0x0000000b5000020cULL, - 0x0000000c5000030cULL, - 0x000000137000040cULL, - 0x00000017e000050cULL, - 0x000000197000060cULL, - 0x000000200000080cULL, - 0x000000206000090cULL, - 0x0000002340000a0cULL, - 0x0000002110000b0cULL, - 0x0000001b10000c0cULL, - 0x0000000680000044ULL, - 0x000000001800003cULL, - 0x0000000b5000020cULL, - 0x0000000d8000030cULL, - 0x000000154000040cULL, - 0x000000187000050cULL, - 0x0000001a0000060cULL, - 0x000000202000080cULL, - 0x000000208000090cULL, - 0x0000002410000a0cULL, - 0x00000021c0000b0cULL, - 0x0000001b80000c0cULL, - 0x0000000680000044ULL, - 0x000000000000000aULL, - 0x0000000000000024ULL, - 0x0000002ed01f80e4ULL, - 0x00000030101f81e4ULL, - 0x0000003760000044ULL, - 0x000000000000000aULL, - 0x0000000000000024ULL, - 0x00000030d01f00e4ULL, - 0x00000030d01f82e4ULL, - 0x00000034801f83e4ULL, - 0x00000035401e04e4ULL, - 0x00000037101f88e4ULL, - 0x00000035401f89e4ULL, - 0x0000003760000044ULL, - 0x0000000000000074ULL, - 0x0000000f0000008cULL, - 0x00000008000000a4ULL, - 0x000000080400007bULL, - 0x00000000000000c4ULL, - 0x0000000000000074ULL, - 0x0000000c000000a4ULL, - 0x0000000004004071ULL, - 0x0000000b0000008cULL, - 0x00000008000000a4ULL, - 0x000000080400007bULL, - 0x00000000000000c4ULL, - 0x000000034c0b4091ULL, - 0x0000000b040b0093ULL, - 0x0000000000000000ULL, - 0x0000000004000802ULL, - 0x00000002c88b0021ULL, - 0x0000000a828b0423ULL, - 0x00000010000000a4ULL, - 0x000000081000006cULL, - 0x00000000000000c4ULL, - 0x000000004c0b4091ULL, - 0x00000008000000a4ULL, - 0x0000000002000402ULL, - 0x000000004a8b0021ULL, - 0x00000010000000a4ULL, - 0x000000089000006cULL, - 0x00000000000000c4ULL, - 0x000000034c0b4091ULL, - 0x0000000b040b0093ULL, - 0x00000008000000a4ULL, - 0x0000000002000402ULL, - 0x00000002c88b0021ULL, - 0x0000000a828b0423ULL, - 0x00000010000000a4ULL, - 0x000000091000006cULL, - 0x00000000000000c4ULL, - 0x000000004c0b4091ULL, - 0x00000008000000a4ULL, - 0x0000000002000402ULL, - 0x000000004a8b0021ULL, - 0x00000010000000a4ULL, - 0x0000000990000064ULL, - 0x000000004a8b0021ULL, - 0x0000000000898611ULL, - 0x0000000c000000a4ULL, - 0x00000000000000c4ULL, - 0x000000034c0b4091ULL, - 0x0000000b040b0093ULL, - 0x00000008000000a4ULL, - 0x0000000002000402ULL, - 0x00000002c88b0021ULL, - 0x0000000a828b0423ULL, - 0x00000010000000a4ULL, - 0x0000000a40000064ULL, - 0x0000000088800021ULL, - 0x0000000880800423ULL, - 0x00000000001004a1ULL, - 0x0000000c000000a4ULL, - 0x00000002c88b0061ULL, - 0x0000000a808b0463ULL, - 0x00000000000000c4ULL, - 0x00000000058f0011ULL, - 0x0000000001860002ULL, - 0x00000010000000a4ULL, - 0x00000000000000ccULL, - 0x000000004d8f0021ULL, - 0x0000000b10000044ULL, - 0x00000007058f0013ULL, - 0x0000000001860002ULL, - 0x00000010000000a4ULL, - 0x00000000000000ccULL, - 0x000000034c0f0021ULL, - 0x0000000b058f0423ULL, - 0x0000000b70000044ULL, - 0x0000000000180001ULL, - 0x000000000b600031ULL, - 0x00000008000000a4ULL, - 0x0000000004800041ULL, - 0x00000008000000a4ULL, - 0x0000000007c03f41ULL, - 0x00000000440ac491ULL, - 0x00000004000000a4ULL, - 0x00000000000000c4ULL, - 0x0000000010180001ULL, - 0x0000000088a00031ULL, - 0x00000002c3430431ULL, - 0x00000004000000a4ULL, - 0x0000000204938041ULL, - 0x00000008000000a4ULL, - 0x000000012c002b41ULL, - 0x0000000117982861ULL, - 0x0000000088a03631ULL, - 0x00000002c3430c31ULL, - 0x00000004000000a4ULL, - 0x0000000204938041ULL, - 0x00000008000000a4ULL, - 0x000000012c002b41ULL, - 0x0000000347cb2861ULL, - 0x000000034c09f691ULL, - 0x00000003040a8491ULL, - 0x0000000000000000ULL, - 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0x0000000280c33c31ULL, - 0x0000000004900041ULL, - 0x0000002e83430d3bULL, - 0x0000000200038000ULL, - 0x0000000000000000ULL, - 0x000000012c002b41ULL, - 0x00000003442b2861ULL, - 0x00000013040b2863ULL, - 0x0000000307cb2861ULL, - 0x000000037c09eb91ULL, - 0x000000130409a893ULL, - 0x000000030409bc91ULL, - 0x00000003040a849dULL, - 0x0000000010180001ULL, - 0x0000000088a00031ULL, - 0x00000002c0830431ULL, - 0x0000000280830431ULL, - 0x0000000280c30431ULL, - 0x0000000004900041ULL, - 0x0000000280830531ULL, - 0x0000001e80830433ULL, - 0x0000000283430431ULL, - 0x0000000b2c03ab67ULL, - 0x0000000344202861ULL, - 0x0000001304032863ULL, - 0x0000000317db2861ULL, - 0x00000002b8a3ab31ULL, - 0x00000002c0832831ULL, - 0x0000000280832831ULL, - 0x0000000280c32831ULL, - 0x0000000004900041ULL, - 0x0000000280832931ULL, - 0x0000001e80832833ULL, - 0x0000002e83430c3bULL, - 0x000000032c03ab61ULL, - 0x00000003442b2861ULL, - 0x00000013040b2863ULL, - 0x0000000307cb2861ULL, - 0x000000037c09eb91ULL, - 0x000000130409a893ULL, - 0x000000030409bc91ULL, - 0x00000003040a849dULL, - 0x0000000000140001ULL, - 0x0000004000140001ULL, - 0x000000000b600061ULL, - 0x000000400b600061ULL, - 0x00000004000000a4ULL, - 0x0000000004800041ULL, - 0x0000004004800041ULL, - 0x00000004000000a4ULL, - 0x0000000007c03f41ULL, - 0x0000004007c03f41ULL, - 0x00000000440ac591ULL, - 0x00000040440ac591ULL, - 0x0000000000000000ULL, - 0x00000000000000c4ULL, - 0x0000000010140001ULL, - 0x0000004010140001ULL, - 0x0000000088e00061ULL, - 0x0000004088e00061ULL, - 0x00000002c3430561ULL, - 0x00000042c3430561ULL, - 0x0000000204938041ULL, - 0x0000004204938041ULL, - 0x00000004000000a4ULL, - 0x000000012c402b41ULL, - 0x000000412c402b41ULL, - 0x0000000117f42961ULL, - 0x0000004117f42961ULL, - 0x0000000088e03f61ULL, - 0x0000004088e03f61ULL, - 0x00000002c3430d61ULL, - 0x00000042c3430d61ULL, - 0x0000000204938041ULL, - 0x0000004204938041ULL, - 0x00000004000000a4ULL, - 0x000000012c402b41ULL, - 0x000000412c402b41ULL, - 0x0000000347eb2961ULL, - 0x0000004347eb2961ULL, - 0x000000034c7dff91ULL, - 0x000000434c7dff91ULL, - 0x00000003040a0591ULL, - 0x00000043040a0591ULL, - 0x00000000000000c4ULL, - 0x0000000010140001ULL, - 0x0000004010140001ULL, - 0x0000000088e00061ULL, - 0x0000004088e00061ULL, - 0x00000002c0c30561ULL, - 0x00000042c0c30561ULL, - 0x0000000004900041ULL, - 0x0000004004900041ULL, - 0x0000000283430561ULL, - 0x0000004283430561ULL, - 0x0000000b2c43ab47ULL, - 0x000000432c43ab41ULL, - 0x0000000344602961ULL, - 0x0000004344602961ULL, - 0x0000000317d72961ULL, - 0x0000004317d72961ULL, - 0x00000002b8e3ab61ULL, - 0x00000042b8e3ab61ULL, - 0x00000002c0c32961ULL, - 0x00000042c0c32961ULL, - 0x0000000004900041ULL, - 0x0000004004900041ULL, - 0x0000000283430d61ULL, - 0x0000007683430d6bULL, - 0x000000032c43ab41ULL, - 0x000000432c43ab41ULL, - 0x00000003446b2961ULL, - 0x00000043446b2961ULL, - 0x0000000307cb2961ULL, - 0x0000004307cb2961ULL, - 0x000000037c7de791ULL, - 0x000000437c7de791ULL, - 0x0000000304499d91ULL, - 0x0000004304499d91ULL, - 0x00000003040a0591ULL, - 0x00000043040a059dULL, - 0x0000000048840011ULL, - 0x00000000028b3691ULL, - 0x000000000e09c691ULL, - 0x000000000c09c691ULL, - 0x0000000000000000ULL, - 0x00000000000000c4ULL, - 0x00000000c8840011ULL, - 0x0000000212ab3691ULL, - 0x0000000080800411ULL, - 0x0000000002cb3691ULL, - 0x000000034c29ef91ULL, - 0x0000000006098491ULL, - 0x000000034c09ef91ULL, - 0x0000000004098491ULL, - 0x00000000000000c4ULL, - 0x00000000e8840011ULL, - 0x0000000210ab3a91ULL, - 0x0000000880800415ULL, - 0x00000006128b3699ULL, - 0x000000034c29eb91ULL, - 0x0000000f0409a893ULL, - 0x0000000026098891ULL, - 0x000000034c09eb91ULL, - 0x0000000f0409a893ULL, - 0x000000000409849dULL, - 0x0000000048841011ULL, - 0x00000000068b7691ULL, - 0x000000000e099611ULL, - 0x000000000c098611ULL, - 0x0000000000000000ULL, - 0x00000000000000c4ULL, - 0x00000000c8840011ULL, - 0x0000000216ab7691ULL, - 0x0000000080801411ULL, - 0x0000000006cb3691ULL, - 0x000000034c29af11ULL, - 0x0000000006099411ULL, - 0x000000034c09af11ULL, - 0x0000000004098411ULL, - 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0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, - 0x0000000000000000ULL, -}; - -#endif /* _NLM_HAL_RSA_UCODE_H_ */ diff --git a/sys/mips/nlm/files.xlp b/sys/mips/nlm/files.xlp deleted file mode 100644 index 5a84d68ebe3..00000000000 --- a/sys/mips/nlm/files.xlp +++ /dev/null @@ -1,38 +0,0 @@ -mips/nlm/hal/nlm_hal.c standard -mips/nlm/hal/fmn.c standard -mips/nlm/xlp_machdep.c standard -mips/nlm/intr_machdep.c standard -mips/nlm/tick.c standard -mips/nlm/board.c standard -mips/nlm/cms.c standard -mips/nlm/bus_space_rmi.c standard -mips/nlm/bus_space_rmi_pci.c standard -mips/nlm/mpreset.S standard -mips/nlm/board_eeprom.c standard -mips/nlm/board_cpld.c standard -mips/nlm/xlp_simplebus.c optional fdt -mips/nlm/xlp_pci.c optional pci -mips/nlm/uart_cpu_xlp.c optional uart -mips/nlm/usb_init.c optional usb -# -# Network driver and micro-core code -mips/nlm/dev/net/nae.c optional xlpge -mips/nlm/dev/net/mdio.c optional xlpge -mips/nlm/dev/net/sgmii.c optional xlpge -mips/nlm/dev/net/xaui.c optional xlpge -mips/nlm/dev/net/xlpge.c optional xlpge -ucore_app.bin optional xlpge \ - compile-with "${CC} -EB -march=mips32 -mabi=32 -msoft-float -I. -I$S -O3 -funroll-loops -fomit-frame-pointer -Wno-unused-command-line-argument -mno-branch-likely -fno-pic -mno-abicalls -ffunction-sections -fdata-sections -G0 -Wall -Werror -c $S/$M/nlm/dev/net/ucore/crt0_basic.S $S/$M/nlm/dev/net/ucore/ucore_app.c && ${LD} -melf32btsmip_fbsd -d -warn-common -T$S/$M/nlm/dev/net/ucore/ld.ucore.S crt0_basic.o ucore_app.o -o ucore_app && ${OBJCOPY} -S -O binary -R .note -R .comment ucore_app ${.TARGET}" \ - no-obj no-implicit-rule before-depend \ - clean "crt0_basic.o ucore_app.o ucore_app ucore_app.bin" -ucore_app_bin.h optional xlpge \ - dependency "ucore_app.bin" \ - compile-with "file2c -sx 'static char ucore_app_bin[] = {' '};' < ucore_app.bin > ${.TARGET}" \ - no-obj no-implicit-rule before-depend \ - clean "ucore_app_bin.h" -# -# Security Driver -# -mips/nlm/dev/sec/nlmsec.c optional nlmsec -mips/nlm/dev/sec/nlmseclib.c optional nlmsec -mips/nlm/dev/sec/nlmrsa.c optional nlmrsa diff --git a/sys/mips/nlm/hal/bridge.h b/sys/mips/nlm/hal/bridge.h deleted file mode 100644 index 975b0eb41a0..00000000000 --- a/sys/mips/nlm/hal/bridge.h +++ /dev/null @@ -1,185 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef __NLM_HAL_BRIDGE_H__ -#define __NLM_HAL_BRIDGE_H__ - -/** -* @file_name mio.h -* @author Netlogic Microsystems -* @brief Basic definitions of XLP memory and io subsystem -*/ - -/* - * BRIDGE specific registers - * - * These registers start after the PCIe header, which has 0x40 - * standard entries - */ -#define BRIDGE_MODE 0x00 -#define BRIDGE_PCI_CFG_BASE 0x01 -#define BRIDGE_PCI_CFG_LIMIT 0x02 -#define BRIDGE_PCIE_CFG_BASE 0x03 -#define BRIDGE_PCIE_CFG_LIMIT 0x04 -#define BRIDGE_BUSNUM_BAR0 0x05 -#define BRIDGE_BUSNUM_BAR1 0x06 -#define BRIDGE_BUSNUM_BAR2 0x07 -#define BRIDGE_BUSNUM_BAR3 0x08 -#define BRIDGE_BUSNUM_BAR4 0x09 -#define BRIDGE_BUSNUM_BAR5 0x0a -#define BRIDGE_BUSNUM_BAR6 0x0b -#define BRIDGE_FLASH_BAR0 0x0c -#define BRIDGE_FLASH_BAR1 0x0d -#define BRIDGE_FLASH_BAR2 0x0e -#define BRIDGE_FLASH_BAR3 0x0f -#define BRIDGE_FLASH_LIMIT0 0x10 -#define BRIDGE_FLASH_LIMIT1 0x11 -#define BRIDGE_FLASH_LIMIT2 0x12 -#define BRIDGE_FLASH_LIMIT3 0x13 - -#define BRIDGE_DRAM_BAR(i) (0x14 + (i)) -#define BRIDGE_DRAM_BAR0 0x14 -#define BRIDGE_DRAM_BAR1 0x15 -#define BRIDGE_DRAM_BAR2 0x16 -#define BRIDGE_DRAM_BAR3 0x17 -#define BRIDGE_DRAM_BAR4 0x18 -#define BRIDGE_DRAM_BAR5 0x19 -#define BRIDGE_DRAM_BAR6 0x1a -#define BRIDGE_DRAM_BAR7 0x1b - -#define BRIDGE_DRAM_LIMIT(i) (0x1c + (i)) -#define BRIDGE_DRAM_LIMIT0 0x1c -#define BRIDGE_DRAM_LIMIT1 0x1d -#define BRIDGE_DRAM_LIMIT2 0x1e -#define BRIDGE_DRAM_LIMIT3 0x1f -#define BRIDGE_DRAM_LIMIT4 0x20 -#define BRIDGE_DRAM_LIMIT5 0x21 -#define BRIDGE_DRAM_LIMIT6 0x22 -#define BRIDGE_DRAM_LIMIT7 0x23 - -#define BRIDGE_DRAM_NODE_TRANSLN0 0x24 -#define BRIDGE_DRAM_NODE_TRANSLN1 0x25 -#define BRIDGE_DRAM_NODE_TRANSLN2 0x26 -#define BRIDGE_DRAM_NODE_TRANSLN3 0x27 -#define BRIDGE_DRAM_NODE_TRANSLN4 0x28 -#define BRIDGE_DRAM_NODE_TRANSLN5 0x29 -#define BRIDGE_DRAM_NODE_TRANSLN6 0x2a -#define BRIDGE_DRAM_NODE_TRANSLN7 0x2b -#define BRIDGE_DRAM_CHNL_TRANSLN0 0x2c -#define BRIDGE_DRAM_CHNL_TRANSLN1 0x2d -#define BRIDGE_DRAM_CHNL_TRANSLN2 0x2e -#define BRIDGE_DRAM_CHNL_TRANSLN3 0x2f -#define BRIDGE_DRAM_CHNL_TRANSLN4 0x30 -#define BRIDGE_DRAM_CHNL_TRANSLN5 0x31 -#define BRIDGE_DRAM_CHNL_TRANSLN6 0x32 -#define BRIDGE_DRAM_CHNL_TRANSLN7 0x33 -#define BRIDGE_PCIEMEM_BASE0 0x34 -#define BRIDGE_PCIEMEM_BASE1 0x35 -#define BRIDGE_PCIEMEM_BASE2 0x36 -#define BRIDGE_PCIEMEM_BASE3 0x37 -#define BRIDGE_PCIEMEM_LIMIT0 0x38 -#define BRIDGE_PCIEMEM_LIMIT1 0x39 -#define BRIDGE_PCIEMEM_LIMIT2 0x3a -#define BRIDGE_PCIEMEM_LIMIT3 0x3b -#define BRIDGE_PCIEIO_BASE0 0x3c -#define BRIDGE_PCIEIO_BASE1 0x3d -#define BRIDGE_PCIEIO_BASE2 0x3e -#define BRIDGE_PCIEIO_BASE3 0x3f -#define BRIDGE_PCIEIO_LIMIT0 0x40 -#define BRIDGE_PCIEIO_LIMIT1 0x41 -#define BRIDGE_PCIEIO_LIMIT2 0x42 -#define BRIDGE_PCIEIO_LIMIT3 0x43 -#define BRIDGE_PCIEMEM_BASE4 0x44 -#define BRIDGE_PCIEMEM_BASE5 0x45 -#define BRIDGE_PCIEMEM_BASE6 0x46 -#define BRIDGE_PCIEMEM_LIMIT4 0x47 -#define BRIDGE_PCIEMEM_LIMIT5 0x48 -#define BRIDGE_PCIEMEM_LIMIT6 0x49 -#define BRIDGE_PCIEIO_BASE4 0x4a -#define BRIDGE_PCIEIO_BASE5 0x4b -#define BRIDGE_PCIEIO_BASE6 0x4c -#define BRIDGE_PCIEIO_LIMIT4 0x4d -#define BRIDGE_PCIEIO_LIMIT5 0x4e -#define BRIDGE_PCIEIO_LIMIT6 0x4f -#define BRIDGE_NBU_EVENT_CNT_CTL 0x50 -#define BRIDGE_EVNTCTR1_LOW 0x51 -#define BRIDGE_EVNTCTR1_HI 0x52 -#define BRIDGE_EVNT_CNT_CTL2 0x53 -#define BRIDGE_EVNTCTR2_LOW 0x54 -#define BRIDGE_EVNTCTR2_HI 0x55 -#define BRIDGE_TRACEBUF_MATCH0 0x56 -#define BRIDGE_TRACEBUF_MATCH1 0x57 -#define BRIDGE_TRACEBUF_MATCH_LOW 0x58 -#define BRIDGE_TRACEBUF_MATCH_HI 0x59 -#define BRIDGE_TRACEBUF_CTRL 0x5a -#define BRIDGE_TRACEBUF_INIT 0x5b -#define BRIDGE_TRACEBUF_ACCESS 0x5c -#define BRIDGE_TRACEBUF_READ_DATA0 0x5d -#define BRIDGE_TRACEBUF_READ_DATA1 0x5d -#define BRIDGE_TRACEBUF_READ_DATA2 0x5f -#define BRIDGE_TRACEBUF_READ_DATA3 0x60 -#define BRIDGE_TRACEBUF_STATUS 0x61 -#define BRIDGE_ADDRESS_ERROR0 0x62 -#define BRIDGE_ADDRESS_ERROR1 0x63 -#define BRIDGE_ADDRESS_ERROR2 0x64 -#define BRIDGE_TAG_ECC_ADDR_ERROR0 0x65 -#define BRIDGE_TAG_ECC_ADDR_ERROR1 0x66 -#define BRIDGE_TAG_ECC_ADDR_ERROR2 0x67 -#define BRIDGE_LINE_FLUSH0 0x68 -#define BRIDGE_LINE_FLUSH1 0x69 -#define BRIDGE_NODE_ID 0x6a -#define BRIDGE_ERROR_INTERRUPT_EN 0x6b -#define BRIDGE_PCIE0_WEIGHT 0x2c0 -#define BRIDGE_PCIE1_WEIGHT 0x2c1 -#define BRIDGE_PCIE2_WEIGHT 0x2c2 -#define BRIDGE_PCIE3_WEIGHT 0x2c3 -#define BRIDGE_USB_WEIGHT 0x2c4 -#define BRIDGE_NET_WEIGHT 0x2c5 -#define BRIDGE_POE_WEIGHT 0x2c6 -#define BRIDGE_CMS_WEIGHT 0x2c7 -#define BRIDGE_DMAENG_WEIGHT 0x2c8 -#define BRIDGE_SEC_WEIGHT 0x2c9 -#define BRIDGE_COMP_WEIGHT 0x2ca -#define BRIDGE_GIO_WEIGHT 0x2cb -#define BRIDGE_FLASH_WEIGHT 0x2cc - -#if !defined(LOCORE) && !defined(__ASSEMBLY__) - -#define nlm_read_bridge_reg(b, r) nlm_read_reg(b, r) -#define nlm_write_bridge_reg(b, r, v) nlm_write_reg(b, r, v) -#define nlm_get_bridge_pcibase(node) \ - nlm_pcicfg_base(XLP_IO_BRIDGE_OFFSET(node)) -#define nlm_get_bridge_regbase(node) \ - (nlm_get_bridge_pcibase(node) + XLP_IO_PCI_HDRSZ) - -#endif -#endif diff --git a/sys/mips/nlm/hal/cop2.h b/sys/mips/nlm/hal/cop2.h deleted file mode 100644 index ba8b3769bdd..00000000000 --- a/sys/mips/nlm/hal/cop2.h +++ /dev/null @@ -1,303 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef __NLM_HAL_COP2_H__ -#define __NLM_HAL_COP2_H__ - -#define COP2_TX_BUF 0 -#define COP2_RX_BUF 1 -#define COP2_TXMSGSTATUS 2 -#define COP2_RXMSGSTATUS 3 -#define COP2_MSGSTATUS1 4 -#define COP2_MSGCONFIG 5 -#define COP2_MSGERROR 6 - -#define CROSSTHR_POPQ_EN 0x01 -#define VC0_POPQ_EN 0x02 -#define VC1_POPQ_EN 0x04 -#define VC2_POPQ_EN 0x08 -#define VC3_POPQ_EN 0x10 -#define ALL_VC_POPQ_EN 0x1E -#define ALL_VC_CT_POPQ_EN 0x1F - -struct nlm_fmn_msg { - uint64_t msg[4]; -}; - -#define NLM_DEFINE_COP2_ACCESSORS32(name, reg, sel) \ -static inline uint32_t nlm_read_c2_##name(void) \ -{ \ - uint32_t __rv; \ - __asm__ __volatile__ ( \ - ".set push\n" \ - ".set noreorder\n" \ - ".set mips64\n" \ - "mfc2 %0, $%1, %2\n" \ - ".set pop\n" \ - : "=r" (__rv) \ - : "i" (reg), "i" (sel)); \ - return __rv; \ -} \ - \ -static inline void nlm_write_c2_##name(uint32_t val) \ -{ \ - __asm__ __volatile__( \ - ".set push\n" \ - ".set noreorder\n" \ - ".set mips64\n" \ - "mtc2 %0, $%1, %2\n" \ - ".set pop\n" \ - : : "r" (val), "i" (reg), "i" (sel)); \ -} struct __hack - -#if (__mips == 64) -#define NLM_DEFINE_COP2_ACCESSORS64(name, reg, sel) \ -static inline uint64_t nlm_read_c2_##name(void) \ -{ \ - uint64_t __rv; \ - __asm__ __volatile__ ( \ - ".set push\n" \ - ".set noreorder\n" \ - ".set mips64\n" \ - "dmfc2 %0, $%1, %2\n" \ - ".set pop\n" \ - : "=r" (__rv) \ - : "i" (reg), "i" (sel)); \ - return __rv; \ -} \ - \ -static inline void nlm_write_c2_##name(uint64_t val) \ -{ \ - __asm__ __volatile__ ( \ - ".set push\n" \ - ".set noreorder\n" \ - ".set mips64\n" \ - "dmtc2 %0, $%1, %2\n" \ - ".set pop\n" \ - : : "r" (val), "i" (reg), "i" (sel)); \ -} struct __hack - -#else - -#define NLM_DEFINE_COP2_ACCESSORS64(name, reg, sel) \ -static inline uint64_t nlm_read_c2_##name(void) \ -{ \ - uint32_t __high, __low; \ - __asm__ __volatile__ ( \ - ".set push\n" \ - ".set noreorder\n" \ - ".set mips64\n" \ - "dmfc2 $8, $%2, %3\n" \ - "dsra32 %0, $8, 0\n" \ - "sll %1, $8, 0\n" \ - ".set pop\n" \ - : "=r"(__high), "=r"(__low) \ - : "i"(reg), "i"(sel) \ - : "$8"); \ - \ - return ((uint64_t)__high << 32) | __low; \ -} \ - \ -static inline void nlm_write_c2_##name(uint64_t val) \ -{ \ - uint32_t __high = val >> 32; \ - uint32_t __low = val & 0xffffffff; \ - __asm__ __volatile__ ( \ - ".set push\n" \ - ".set noreorder\n" \ - ".set mips64\n" \ - "dsll32 $8, %1, 0\n" \ - "dsll32 $9, %0, 0\n" \ - "dsrl32 $8, $8, 0\n" \ - "or $8, $8, $9\n" \ - "dmtc2 $8, $%2, %3\n" \ - ".set pop\n" \ - : : "r"(__high), "r"(__low), "i"(reg), "i"(sel) \ - : "$8", "$9"); \ -} struct __hack - -#endif - -NLM_DEFINE_COP2_ACCESSORS64(txbuf0, COP2_TX_BUF, 0); -NLM_DEFINE_COP2_ACCESSORS64(txbuf1, COP2_TX_BUF, 1); -NLM_DEFINE_COP2_ACCESSORS64(txbuf2, COP2_TX_BUF, 2); -NLM_DEFINE_COP2_ACCESSORS64(txbuf3, COP2_TX_BUF, 3); - -NLM_DEFINE_COP2_ACCESSORS64(rxbuf0, COP2_RX_BUF, 0); -NLM_DEFINE_COP2_ACCESSORS64(rxbuf1, COP2_RX_BUF, 1); -NLM_DEFINE_COP2_ACCESSORS64(rxbuf2, COP2_RX_BUF, 2); -NLM_DEFINE_COP2_ACCESSORS64(rxbuf3, COP2_RX_BUF, 3); - -NLM_DEFINE_COP2_ACCESSORS32(txmsgstatus, COP2_TXMSGSTATUS, 0); -NLM_DEFINE_COP2_ACCESSORS32(rxmsgstatus, COP2_RXMSGSTATUS, 0); -NLM_DEFINE_COP2_ACCESSORS32(msgstatus1, COP2_MSGSTATUS1, 0); -NLM_DEFINE_COP2_ACCESSORS32(msgconfig, COP2_MSGCONFIG, 0); -NLM_DEFINE_COP2_ACCESSORS32(msgerror0, COP2_MSGERROR, 0); -NLM_DEFINE_COP2_ACCESSORS32(msgerror1, COP2_MSGERROR, 1); -NLM_DEFINE_COP2_ACCESSORS32(msgerror2, COP2_MSGERROR, 2); -NLM_DEFINE_COP2_ACCESSORS32(msgerror3, COP2_MSGERROR, 3); - -/* successful completion returns 1, else 0 */ -static inline int -nlm_msgsend(int val) -{ - int result; - __asm__ volatile ( - ".set push\n" - ".set noreorder\n" - ".set mips64\n" - "move $8, %1\n" - "sync\n" - "/* msgsnds $9, $8 */\n" - ".word 0x4a084801\n" - "move %0, $9\n" - ".set pop\n" - : "=r" (result) - : "r" (val) - : "$8", "$9"); - return result; -} - -static inline int -nlm_msgld(int vc) -{ - int val; - __asm__ volatile ( - ".set push\n" - ".set noreorder\n" - ".set mips64\n" - "move $8, %1\n" - "/* msgld $9, $8 */\n" - ".word 0x4a084802\n" - "move %0, $9\n" - ".set pop\n" - : "=r" (val) - : "r" (vc) - : "$8", "$9"); - return val; -} - -static inline void -nlm_msgwait(int vc) -{ - __asm__ volatile ( - ".set push\n" - ".set noreorder\n" - ".set mips64\n" - "move $8, %0\n" - "/* msgwait $8 */\n" - ".word 0x4a080003\n" - ".set pop\n" - : : "r" (vc) - : "$8"); -} - -static inline int -nlm_fmn_msgsend(int dstid, int size, int swcode, struct nlm_fmn_msg *m) -{ - uint32_t flags, status; - int rv; - - size -= 1; - flags = nlm_save_flags_cop2(); - switch (size) { - case 3: - nlm_write_c2_txbuf3(m->msg[3]); - case 2: - nlm_write_c2_txbuf2(m->msg[2]); - case 1: - nlm_write_c2_txbuf1(m->msg[1]); - case 0: - nlm_write_c2_txbuf0(m->msg[0]); - } - - dstid |= ((swcode << 24) | (size << 16)); - status = nlm_msgsend(dstid); - rv = !status; - if (rv != 0) - rv = nlm_read_c2_txmsgstatus(); - nlm_restore_flags(flags); - - return rv; -} - -static inline int -nlm_fmn_msgrcv(int vc, int *srcid, int *size, int *code, struct nlm_fmn_msg *m) -{ - uint32_t status; - uint32_t msg_status, flags; - int tmp_sz, rv; - - flags = nlm_save_flags_cop2(); - status = nlm_msgld(vc); /* will return 0, if error */ - rv = !status; - if (rv == 0) { - msg_status = nlm_read_c2_rxmsgstatus(); - *size = ((msg_status >> 26) & 0x3) + 1; - *code = (msg_status >> 18) & 0xff; - *srcid = (msg_status >> 4) & 0xfff; - tmp_sz = *size - 1; - switch (tmp_sz) { - case 3: - m->msg[3] = nlm_read_c2_rxbuf3(); - case 2: - m->msg[2] = nlm_read_c2_rxbuf2(); - case 1: - m->msg[1] = nlm_read_c2_rxbuf1(); - case 0: - m->msg[0] = nlm_read_c2_rxbuf0(); - } - } - nlm_restore_flags(flags); - - return rv; -} - -static inline void -nlm_fmn_cpu_init(int int_vec, int ecc_en, int v0pe, int v1pe, int v2pe, int v3pe) -{ - uint32_t val = nlm_read_c2_msgconfig(); - - /* Note: in XLP PRM 0.8.1, the int_vec bits are un-documented - * in msgconfig register of cop2. - * As per chip/cpu RTL, [16:20] bits consist of int_vec. - */ - val |= (((int_vec & 0x1f) << 16) | - ((ecc_en & 0x1) << 8) | - ((v3pe & 0x1) << 4) | - ((v2pe & 0x1) << 3) | - ((v1pe & 0x1) << 2) | - ((v0pe & 0x1) << 1)); - - nlm_write_c2_msgconfig(val); -} -#endif diff --git a/sys/mips/nlm/hal/cpucontrol.h b/sys/mips/nlm/hal/cpucontrol.h deleted file mode 100644 index d854f0f4716..00000000000 --- a/sys/mips/nlm/hal/cpucontrol.h +++ /dev/null @@ -1,194 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef __NLM_HAL_CPUCONTROL_H__ -#define __NLM_HAL_CPUCONTROL_H__ - -#define CPU_BLOCKID_IFU 0 -#define CPU_BLOCKID_ICU 1 -#define CPU_BLOCKID_IEU 2 -#define CPU_BLOCKID_LSU 3 -#define CPU_BLOCKID_MMU 4 -#define CPU_BLOCKID_PRF 5 -#define CPU_BLOCKID_SCH 7 -#define CPU_BLOCKID_SCU 8 -#define CPU_BLOCKID_FPU 9 -#define CPU_BLOCKID_MAP 10 - -#define LSU_DEFEATURE 0x304 -#define LSU_DEBUG_ADDR 0x305 -#define LSU_DEBUG_DATA0 0x306 -#define LSU_CERRLOG_REGID 0x09 -#define SCHED_DEFEATURE 0x700 - -/* Offsets of interest from the 'MAP' Block */ -#define MAP_THREADMODE 0x00 -#define MAP_EXT_EBASE_ENABLE 0x04 -#define MAP_CCDI_CONFIG 0x08 -#define MAP_THRD0_CCDI_STATUS 0x0c -#define MAP_THRD1_CCDI_STATUS 0x10 -#define MAP_THRD2_CCDI_STATUS 0x14 -#define MAP_THRD3_CCDI_STATUS 0x18 -#define MAP_THRD0_DEBUG_MODE 0x1c -#define MAP_THRD1_DEBUG_MODE 0x20 -#define MAP_THRD2_DEBUG_MODE 0x24 -#define MAP_THRD3_DEBUG_MODE 0x28 -#define MAP_MISC_STATE 0x60 -#define MAP_DEBUG_READ_CTL 0x64 -#define MAP_DEBUG_READ_REG0 0x68 -#define MAP_DEBUG_READ_REG1 0x6c - -#define MMU_SETUP 0x400 -#define MMU_LFSRSEED 0x401 -#define MMU_HPW_NUM_PAGE_LVL 0x410 -#define MMU_PGWKR_PGDBASE 0x411 -#define MMU_PGWKR_PGDSHFT 0x412 -#define MMU_PGWKR_PGDMASK 0x413 -#define MMU_PGWKR_PUDSHFT 0x414 -#define MMU_PGWKR_PUDMASK 0x415 -#define MMU_PGWKR_PMDSHFT 0x416 -#define MMU_PGWKR_PMDMASK 0x417 -#define MMU_PGWKR_PTESHFT 0x418 -#define MMU_PGWKR_PTEMASK 0x419 - -#if !defined(LOCORE) && !defined(__ASSEMBLY__) -#if defined(__mips_n64) || defined(__mips_n32) -static __inline uint64_t -nlm_mfcr(uint32_t reg) -{ - uint64_t res; - - __asm__ __volatile__( - ".set push\n\t" - ".set noreorder\n\t" - "move $9, %1\n\t" - ".word 0x71280018\n\t" /* mfcr $8, $9 */ - "move %0, $8\n\t" - ".set pop\n" - : "=r" (res) : "r"(reg) - : "$8", "$9" - ); - return (res); -} - -static __inline void -nlm_mtcr(uint32_t reg, uint64_t value) -{ - __asm__ __volatile__( - ".set push\n\t" - ".set noreorder\n\t" - "move $8, %0\n" - "move $9, %1\n" - ".word 0x71280019\n" /* mtcr $8, $9 */ - ".set pop\n" - : - : "r" (value), "r" (reg) - : "$8", "$9" - ); -} - -#else /* !(defined(__mips_n64) || defined(__mips_n32)) */ - -static __inline__ uint64_t -nlm_mfcr(uint32_t reg) -{ - uint32_t hi, lo; - - __asm__ __volatile__ ( - ".set push\n" - ".set mips64\n" - "move $8, %2\n" - ".word 0x71090018\n" - "nop \n" - "dsra32 %0, $9, 0\n" - "sll %1, $9, 0\n" - ".set pop\n" - : "=r"(hi), "=r"(lo) - : "r"(reg) : "$8", "$9"); - - return (((uint64_t)hi) << 32) | lo; -} - -static __inline__ void -nlm_mtcr(uint32_t reg, uint64_t val) -{ - uint32_t hi, lo; - - hi = val >> 32; - lo = val & 0xffffffff; - - __asm__ __volatile__ ( - ".set push\n" - ".set mips64\n" - "move $9, %0\n" - "dsll32 $9, %1, 0\n" - "dsll32 $8, %0, 0\n" - "dsrl32 $9, $9, 0\n" - "or $9, $9, $8\n" - "move $8, %2\n" - ".word 0x71090019\n" - "nop \n" - ".set pop\n" - : :"r"(hi), "r"(lo), "r"(reg) - : "$8", "$9"); -} -#endif /* (defined(__mips_n64) || defined(__mips_n32)) */ - -/* hashindex_en = 1 to enable hash mode, hashindex_en=0 to disable - * global_mode = 1 to enable global mode, global_mode=0 to disable - * clk_gating = 0 to enable clock gating, clk_gating=1 to disable - */ -static __inline__ void nlm_mmu_setup(int hashindex_en, int global_mode, - int clk_gating) -{ - uint32_t mmusetup = 0; - - mmusetup |= (hashindex_en << 13); - mmusetup |= (clk_gating << 3); - mmusetup |= (global_mode << 0); - nlm_mtcr(MMU_SETUP, mmusetup); -} - -static __inline__ void nlm_mmu_lfsr_seed (int thr0_seed, int thr1_seed, - int thr2_seed, int thr3_seed) -{ - uint32_t seed = nlm_mfcr(MMU_LFSRSEED); - - seed |= ((thr3_seed & 0x7f) << 23); - seed |= ((thr2_seed & 0x7f) << 16); - seed |= ((thr1_seed & 0x7f) << 7); - seed |= ((thr0_seed & 0x7f) << 0); - nlm_mtcr(MMU_LFSRSEED, seed); -} - -#endif /* __ASSEMBLY__ */ -#endif /* __NLM_CPUCONTROL_H__ */ diff --git a/sys/mips/nlm/hal/fmn.c b/sys/mips/nlm/hal/fmn.c deleted file mode 100644 index d212ad794a4..00000000000 --- a/sys/mips/nlm/hal/fmn.c +++ /dev/null @@ -1,355 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD */ - -#include -#include -#include - -#include -#include -#include -#include -#include - -/* XLP can take upto 16K of FMN messages per hardware queue, as spill. -* But, configuring all 16K causes the total spill memory to required -* to blow upto 192MB for single chip configuration, and 768MB in four -* chip configuration. Hence for now, we will setup the per queue spill -* as 1K FMN messages. With this, the total spill memory needed for 1024 -* hardware queues (with 12bytes per single entry FMN message) becomes -* (1*1024)*12*1024queues = 12MB. For the four chip config, the memory -* needed = 12 * 4 = 48MB. -*/ -uint64_t nlm_cms_spill_total_messages = 1 * 1024; - -/* On a XLP832, we have the following FMN stations: -* CPU stations: 8 -* PCIE0 stations: 1 -* PCIE1 stations: 1 -* PCIE2 stations: 1 -* PCIE3 stations: 1 -* GDX stations: 1 -* CRYPTO stations: 1 -* RSA stations: 1 -* CMP stations: 1 -* POE stations: 1 -* NAE stations: 1 -* ================== -* Total : 18 stations per chip -* -* For all 4 nodes, there are 18*4 = 72 FMN stations -*/ -uint32_t nlm_cms_total_stations = 18 * 4 /*xlp_num_nodes*/; - -/** - * Takes inputs as node, queue_size and maximum number of queues. - * Calculates the base, start & end and returns the same for a - * defined qid. - * - * The output queues are maintained in the internal output buffer - * which is a on-chip SRAM structure. For the actial hardware - * internal implementation, It is a structure which consists - * of eight banks of 4096-entry x message-width SRAMs. The SRAM - * implementation is designed to run at 1GHz with a 1-cycle read/write - * access. A read/write transaction can be initiated for each bank - * every cycle for a total of eight accesses per cycle. Successive - * entries of the same output queue are placed in successive banks. - * This is done to spread different read & write accesses to same/different - * output queue over as many different banks as possible so that they - * can be scheduled concurrently. Spreading the accesses to as many banks - * as possible to maximize the concurrency internally is important for - * achieving the desired peak throughput. This is done by h/w implementation - * itself. - * - * Output queues are allocated from this internal output buffer by - * software. The total capacity of the output buffer is 32K-entry. - * Each output queue can be sized from 32-entry to 1024-entry in - * increments of 32-entry. This is done by specifying a Start & a - * End pointer: pointers to the first & last 32-entry chunks allocated - * to the output queue. - * - * To optimize the storage required for 1024 OQ pointers, the upper 5-bits - * are shared by the Start & the End pointer. The side-effect of this - * optimization is that an OQ can't cross a 1024-entry boundary. Also, the - * lower 5-bits don't need to be specified in the Start & the End pointer - * as the allocation is in increments of 32-entries. - * - * Queue occupancy is tracked by a Head & a Tail pointer. Tail pointer - * indicates the location to which next entry will be written & Head - * pointer indicates the location from which next entry will be read. When - * these pointers reach the top of the allocated space (indicated by the - * End pointer), they are reset to the bottom of the allocated space - * (indicated by the Start pointer). - * - * Output queue pointer information: - * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - * - * 14 10 9 5 4 0 - * ------------------ - * | base ptr | - * ------------------ - * ---------------- - * | start ptr | - * ---------------- - * ---------------- - * | end ptr | - * ---------------- - * ------------------------------------ - * | head ptr | - * ------------------------------------ - * ------------------------------------ - * | tail ptr | - * ------------------------------------ - * Note: - * A total of 1024 segments can sit on one software-visible "bank" - * of internal SRAM. Each segment contains 32 entries. Also note - * that sw-visible "banks" are not the same as the actual internal - * 8-bank implementation of hardware. It is an optimization of - * internal access. - * - */ - -void nlm_cms_setup_credits(uint64_t base, int destid, int srcid, int credit) -{ - uint64_t val; - - val = (((uint64_t)credit << 24) | (destid << 12) | (srcid << 0)); - nlm_write_cms_reg(base, CMS_OUTPUTQ_CREDIT_CFG, val); - -} - -/* - * base - CMS module base address for this node. - * qid - is the output queue id otherwise called as vc id - * spill_base - is the 40-bit physical address of spill memory. Must be - 4KB aligned. - * nsegs - No of segments where a "1" indicates 4KB. Spill size must be - * a multiple of 4KB. - */ -int nlm_cms_alloc_spill_q(uint64_t base, int qid, uint64_t spill_base, - int nsegs) -{ - uint64_t queue_config; - uint32_t spill_start; - - if (nsegs > CMS_MAX_SPILL_SEGMENTS_PER_QUEUE) { - return 1; - } - - queue_config = nlm_read_cms_reg(base,(CMS_OUTPUTQ_CONFIG(qid))); - - spill_start = ((spill_base >> 12) & 0x3F); - /* Spill configuration */ - queue_config = (((uint64_t)CMS_SPILL_ENA << 62) | - (((spill_base >> 18) & 0x3FFFFF) << 27) | - (spill_start + nsegs - 1) << 21 | - (spill_start << 15)); - - nlm_write_cms_reg(base,(CMS_OUTPUTQ_CONFIG(qid)),queue_config); - - return 0; -} - -uint64_t nlm_cms_get_onchip_queue (uint64_t base, int qid) -{ - return nlm_read_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid)); -} - -void nlm_cms_set_onchip_queue (uint64_t base, int qid, uint64_t val) -{ - uint64_t rdval; - - rdval = nlm_read_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid)); - rdval |= val; - nlm_write_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid), rdval); -} - -void nlm_cms_per_queue_level_intr(uint64_t base, int qid, int sub_type, - int intr_val) -{ - uint64_t val; - - val = nlm_read_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid)); - - val &= ~((0x7ULL << 56) | (0x3ULL << 54)); - - val |= (((uint64_t)sub_type<<54) | - ((uint64_t)intr_val<<56)); - - nlm_write_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid), val); -} - -void nlm_cms_per_queue_timer_intr(uint64_t base, int qid, int sub_type, - int intr_val) -{ - uint64_t val; - - val = nlm_read_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid)); - - val &= ~((0x7ULL << 51) | (0x3ULL << 49)); - - val |= (((uint64_t)sub_type<<49) | - ((uint64_t)intr_val<<51)); - - nlm_write_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid), val); -} - -/* returns 1 if interrupt has been generated for this output queue */ -int nlm_cms_outputq_intr_check(uint64_t base, int qid) -{ - uint64_t val; - val = nlm_read_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid)); - - return ((val >> 59) & 0x1); -} - -void nlm_cms_outputq_clr_intr(uint64_t base, int qid) -{ - uint64_t val; - val = nlm_read_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid)); - val |= (1ULL<<59); - nlm_write_cms_reg(base, CMS_OUTPUTQ_CONFIG(qid), val); -} - -void nlm_cms_illegal_dst_error_intr(uint64_t base, int en) -{ - uint64_t val; - - val = nlm_read_cms_reg(base, CMS_MSG_CONFIG); - val |= (en<<8); - nlm_write_cms_reg(base, CMS_MSG_CONFIG, val); -} - -void nlm_cms_timeout_error_intr(uint64_t base, int en) -{ - uint64_t val; - - val = nlm_read_cms_reg(base, CMS_MSG_CONFIG); - val |= (en<<7); - nlm_write_cms_reg(base, CMS_MSG_CONFIG, val); -} - -void nlm_cms_biu_error_resp_intr(uint64_t base, int en) -{ - uint64_t val; - - val = nlm_read_cms_reg(base, CMS_MSG_CONFIG); - val |= (en<<6); - nlm_write_cms_reg(base, CMS_MSG_CONFIG, val); -} - -void nlm_cms_spill_uncorrectable_ecc_error_intr(uint64_t base, int en) -{ - uint64_t val; - - val = nlm_read_cms_reg(base, CMS_MSG_CONFIG); - val |= (en<<5) | (en<<3); - nlm_write_cms_reg(base, CMS_MSG_CONFIG, val); -} - -void nlm_cms_spill_correctable_ecc_error_intr(uint64_t base, int en) -{ - uint64_t val; - - val = nlm_read_cms_reg(base, CMS_MSG_CONFIG); - val |= (en<<4) | (en<<2); - nlm_write_cms_reg(base, CMS_MSG_CONFIG, val); -} - -void nlm_cms_outputq_uncorrectable_ecc_error_intr(uint64_t base, int en) -{ - uint64_t val; - - val = nlm_read_cms_reg(base, CMS_MSG_CONFIG); - val |= (en<<1); - nlm_write_cms_reg(base, CMS_MSG_CONFIG, val); -} - -void nlm_cms_outputq_correctable_ecc_error_intr(uint64_t base, int en) -{ - uint64_t val; - - val = nlm_read_cms_reg(base, CMS_MSG_CONFIG); - val |= (en<<0); - nlm_write_cms_reg(base, CMS_MSG_CONFIG, val); -} - -uint64_t nlm_cms_network_error_status(uint64_t base) -{ - return nlm_read_cms_reg(base, CMS_MSG_ERR); -} - -int nlm_cms_get_net_error_code(uint64_t err) -{ - return ((err >> 12) & 0xf); -} - -int nlm_cms_get_net_error_syndrome(uint64_t err) -{ - return ((err >> 32) & 0x1ff); -} - -int nlm_cms_get_net_error_ramindex(uint64_t err) -{ - return ((err >> 44) & 0x7fff); -} - -int nlm_cms_get_net_error_outputq(uint64_t err) -{ - return ((err >> 16) & 0xfff); -} - -/*========================= FMN Tracing related APIs ================*/ - -void nlm_cms_trace_setup(uint64_t base, int en, uint64_t trace_base, - uint64_t trace_limit, int match_dstid_en, - int dst_id, int match_srcid_en, int src_id, - int wrap) -{ - uint64_t val; - - nlm_write_cms_reg(base, CMS_TRACE_BASE_ADDR, trace_base); - nlm_write_cms_reg(base, CMS_TRACE_LIMIT_ADDR, trace_limit); - - val = nlm_read_cms_reg(base, CMS_TRACE_CONFIG); - val |= (((uint64_t)match_dstid_en << 39) | - ((dst_id & 0xfff) << 24) | - (match_srcid_en << 23) | - ((src_id & 0xfff) << 8) | - (wrap << 1) | - (en << 0)); - nlm_write_cms_reg(base, CMS_MSG_CONFIG, val); -} - -void nlm_cms_endian_byte_swap (uint64_t base, int en) -{ - nlm_write_cms_reg(base, CMS_MSG_ENDIAN_SWAP, en); -} diff --git a/sys/mips/nlm/hal/fmn.h b/sys/mips/nlm/hal/fmn.h deleted file mode 100644 index c4e44e8e2ed..00000000000 --- a/sys/mips/nlm/hal/fmn.h +++ /dev/null @@ -1,246 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef __NLM_FMNV2_H__ -#define __NLM_FMNV2_H__ - -/** -* @file_name fmn.h -* @author Netlogic Microsystems -* @brief HAL for Fast message network V2 -*/ - -/* FMN configuration registers */ -#define CMS_OUTPUTQ_CONFIG(i) ((i)*2) -#define CMS_MAX_OUTPUTQ 1024 -#define CMS_OUTPUTQ_CREDIT_CFG (0x2000/4) -#define CMS_MSG_CONFIG (0x2008/4) -#define CMS_MSG_ERR (0x2010/4) -#define CMS_TRACE_CONFIG (0x2018/4) -#define CMS_TRACE_BASE_ADDR (0x2020/4) -#define CMS_TRACE_LIMIT_ADDR (0x2028/4) -#define CMS_TRACE_CURRENT_ADDR (0x2030/4) -#define CMS_MSG_ENDIAN_SWAP (0x2038/4) - -#define CMS_CPU_PUSHQ(node, core, thread, vc) \ - (((node)<<10) | ((core)<<4) | ((thread)<<2) | ((vc)<<0)) -#define CMS_POPQ(node, queue) (((node)<<10) | (queue)) -#define CMS_IO_PUSHQ(node, queue) (((node)<<10) | (queue)) - -#define CMS_POPQ_QID(i) (128+(i)) - -/* FMN Level Interrupt Type */ -#define CMS_LVL_INTR_DISABLE 0 -#define CMS_LVL_LOW_WATERMARK 1 -#define CMS_LVL_HI_WATERMARK 2 - -/* FMN Level interrupt trigger values */ -#define CMS_QUEUE_NON_EMPTY 0 -#define CMS_QUEUE_QUARTER_FULL 1 -#define CMS_QUEUE_HALF_FULL 2 -#define CMS_QUEUE_THREE_QUARTER_FULL 3 -#define CMS_QUEUE_FULL 4 - -/* FMN Timer Interrupt Type */ -#define CMS_TIMER_INTR_DISABLE 0 -#define CMS_TIMER_CONSUMER 1 -#define CMS_TIMER_PRODUCER 1 - -/* FMN timer interrupt trigger values */ -#define CMS_TWO_POW_EIGHT_CYCLES 0 -#define CMS_TWO_POW_TEN_CYCLES 1 -#define CMS_TWO_POW_TWELVE_CYCLES 2 -#define CMS_TWO_POW_FOURTEEN_CYCLES 3 -#define CMS_TWO_POW_SIXTEEN_CYCLES 4 -#define CMS_TWO_POW_EIGHTTEEN_CYCLES 5 -#define CMS_TWO_POW_TWENTY_CYCLES 6 -#define CMS_TWO_POW_TWENTYTWO_CYCLES 7 - -#define CMS_QUEUE_ENA 1ULL -#define CMS_QUEUE_DIS 0 -#define CMS_SPILL_ENA 1ULL -#define CMS_SPILL_DIS 0 - -#define CMS_MAX_VCPU_VC 4 - -/* Each XLP chip can hold upto 32K messages on the chip itself */ -#define CMS_ON_CHIP_MESG_SPACE (32*1024) -#define CMS_MAX_ONCHIP_SEGMENTS 1024 -#define CMS_MAX_SPILL_SEGMENTS_PER_QUEUE 64 - -/* FMN Network error */ -#define CMS_ILLEGAL_DST_ERROR 0x100 -#define CMS_BIU_TIMEOUT_ERROR 0x080 -#define CMS_BIU_ERROR 0x040 -#define CMS_SPILL_FILL_UNCORRECT_ECC_ERROR 0x020 -#define CMS_SPILL_FILL_CORRECT_ECC_ERROR 0x010 -#define CMS_SPILL_UNCORRECT_ECC_ERROR 0x008 -#define CMS_SPILL_CORRECT_ECC_ERROR 0x004 -#define CMS_OUTPUTQ_UNCORRECT_ECC_ERROR 0x002 -#define CMS_OUTPUTQ_CORRECT_ECC_ERROR 0x001 - -/* worst case, a single entry message consists of a 4 byte header - * and an 8-byte entry = 12 bytes in total - */ -#define CMS_SINGLE_ENTRY_MSG_SIZE 12 -/* total spill memory needed for one FMN queue */ -#define CMS_PER_QUEUE_SPILL_MEM(spilltotmsgs) \ - ((spilltotmsgs) * (CMS_SINGLE_ENTRY_MSG_SIZE)) - -/* FMN Src station id's */ -#define CMS_CPU0_SRC_STID (0 << 4) -#define CMS_CPU1_SRC_STID (1 << 4) -#define CMS_CPU2_SRC_STID (2 << 4) -#define CMS_CPU3_SRC_STID (3 << 4) -#define CMS_CPU4_SRC_STID (4 << 4) -#define CMS_CPU5_SRC_STID (5 << 4) -#define CMS_CPU6_SRC_STID (6 << 4) -#define CMS_CPU7_SRC_STID (7 << 4) -#define CMS_PCIE0_SRC_STID 256 -#define CMS_PCIE1_SRC_STID 258 -#define CMS_PCIE2_SRC_STID 260 -#define CMS_PCIE3_SRC_STID 262 -#define CMS_DTE_SRC_STID 264 -#define CMS_RSA_ECC_SRC_STID 272 -#define CMS_CRYPTO_SRC_STID 281 -#define CMS_CMP_SRC_STID 298 -#define CMS_POE_SRC_STID 384 -#define CMS_NAE_SRC_STID 476 - -/* POPQ related defines */ -#define CMS_POPQID_START 128 -#define CMS_POPQID_END 255 - -#define CMS_INT_RCVD 0x800000000000000ULL - -#define nlm_read_cms_reg(b, r) nlm_read_reg64_xkphys(b,r) -#define nlm_write_cms_reg(b, r, v) nlm_write_reg64_xkphys(b,r,v) -#define nlm_get_cms_pcibase(node) \ - nlm_pcicfg_base(XLP_IO_CMS_OFFSET(node)) -#define nlm_get_cms_regbase(node) \ - nlm_xkphys_map_pcibar0(nlm_get_cms_pcibase(node)) - -#define XLP_CMS_ON_CHIP_PER_QUEUE_SPACE(node) \ - ((XLP_CMS_ON_CHIP_MESG_SPACE)/ \ - (nlm_read_reg(nlm_pcibase_cms(node), \ - XLP_PCI_DEVINFO_REG0)) -/* total spill memory needed */ -#define XLP_CMS_TOTAL_SPILL_MEM(node, spilltotmsgs) \ - ((XLP_CMS_PER_QUEUE_SPILL_MEM(spilltotmsgs)) * \ - (nlm_read_reg(nlm_pcibase_cms(node), \ - XLP_PCI_DEVINFO_REG0)) -#define CMS_TOTAL_QUEUE_SIZE(node, spilltotmsgs) \ - ((spilltotmsgs) + (CMS_ON_CHIP_PER_QUEUE_SPACE(node))) - -enum fmn_swcode { - FMN_SWCODE_CPU0=1, - FMN_SWCODE_CPU1, - FMN_SWCODE_CPU2, - FMN_SWCODE_CPU3, - FMN_SWCODE_CPU4, - FMN_SWCODE_CPU5, - FMN_SWCODE_CPU6, - FMN_SWCODE_CPU7, - FMN_SWCODE_CPU8, - FMN_SWCODE_CPU9, - FMN_SWCODE_CPU10, - FMN_SWCODE_CPU11, - FMN_SWCODE_CPU12, - FMN_SWCODE_CPU13, - FMN_SWCODE_CPU14, - FMN_SWCODE_CPU15, - FMN_SWCODE_CPU16, - FMN_SWCODE_CPU17, - FMN_SWCODE_CPU18, - FMN_SWCODE_CPU19, - FMN_SWCODE_CPU20, - FMN_SWCODE_CPU21, - FMN_SWCODE_CPU22, - FMN_SWCODE_CPU23, - FMN_SWCODE_CPU24, - FMN_SWCODE_CPU25, - FMN_SWCODE_CPU26, - FMN_SWCODE_CPU27, - FMN_SWCODE_CPU28, - FMN_SWCODE_CPU29, - FMN_SWCODE_CPU30, - FMN_SWCODE_CPU31, - FMN_SWCODE_CPU32, - FMN_SWCODE_PCIE0, - FMN_SWCODE_PCIE1, - FMN_SWCODE_PCIE2, - FMN_SWCODE_PCIE3, - FMN_SWCODE_DTE, - FMN_SWCODE_CRYPTO, - FMN_SWCODE_RSA, - FMN_SWCODE_CMP, - FMN_SWCODE_POE, - FMN_SWCODE_NAE, -}; - -extern uint64_t nlm_cms_spill_total_messages; -extern uint32_t nlm_cms_total_stations; - -extern uint64_t cms_base_addr(int node); -extern int nlm_cms_verify_credit_config (int spill_en, int tot_credit); -extern int nlm_cms_get_oc_space(int qsize, int max_queues, int qid, int *ocbase, int *ocstart, int *ocend); -extern void nlm_cms_setup_credits (uint64_t base, int destid, int srcid, int credit); -extern int nlm_cms_config_onchip_queue (uint64_t base, uint64_t cms_spill_base, int qid, int spill_en); -extern void nlm_cms_default_setup(int node, uint64_t spill_base, int spill_en, int popq_en); -extern uint64_t nlm_cms_get_onchip_queue (uint64_t base, int qid); -extern void nlm_cms_set_onchip_queue (uint64_t base, int qid, uint64_t val); -extern void nlm_cms_per_queue_level_intr(uint64_t base, int qid, int sub_type, int intr_val); -extern void nlm_cms_level_intr(int node, int sub_type, int intr_val); -extern void nlm_cms_per_queue_timer_intr(uint64_t base, int qid, int sub_type, int intr_val); -extern void nlm_cms_timer_intr(int node, int en, int sub_type, int intr_val); -extern int nlm_cms_outputq_intr_check(uint64_t base, int qid); -extern void nlm_cms_outputq_clr_intr(uint64_t base, int qid); -extern void nlm_cms_illegal_dst_error_intr(uint64_t base, int en); -extern void nlm_cms_timeout_error_intr(uint64_t base, int en); -extern void nlm_cms_biu_error_resp_intr(uint64_t base, int en); -extern void nlm_cms_spill_uncorrectable_ecc_error_intr(uint64_t base, int en); -extern void nlm_cms_spill_correctable_ecc_error_intr(uint64_t base, int en); -extern void nlm_cms_outputq_uncorrectable_ecc_error_intr(uint64_t base, int en); -extern void nlm_cms_outputq_correctable_ecc_error_intr(uint64_t base, int en); -extern uint64_t nlm_cms_network_error_status(uint64_t base); -extern int nlm_cms_get_net_error_code(uint64_t err); -extern int nlm_cms_get_net_error_syndrome(uint64_t err); -extern int nlm_cms_get_net_error_ramindex(uint64_t err); -extern int nlm_cms_get_net_error_outputq(uint64_t err); -extern void nlm_cms_trace_setup(uint64_t base, int en, uint64_t trace_base, uint64_t trace_limit, int match_dstid_en, int dst_id, int match_srcid_en, int src_id, int wrap); -extern void nlm_cms_endian_byte_swap (uint64_t base, int en); -extern uint8_t xlp_msg_send(uint8_t vc, uint8_t size); -extern int nlm_cms_alloc_spill_q(uint64_t base, int qid, uint64_t spill_base, - int nsegs); -extern int nlm_cms_alloc_onchip_q(uint64_t base, int qid, int nsegs); - -#endif diff --git a/sys/mips/nlm/hal/gbu.h b/sys/mips/nlm/hal/gbu.h deleted file mode 100644 index 6e89b520ab0..00000000000 --- a/sys/mips/nlm/hal/gbu.h +++ /dev/null @@ -1,100 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef _NLM_HAL_GBU_H__ -#define _NLM_HAL_GBU_H__ - -/* Global Bus Unit (GBU) for flash Specific registers */ - -#define GBU_CS_BASEADDR(cs) (0x0+cs) -#define GBU_CS0_BASEADDR 0x0 -#define GBU_CS1_BASEADDR 0x1 -#define GBU_CS2_BASEADDR 0x2 -#define GBU_CS3_BASEADDR 0x3 -#define GBU_CS4_BASEADDR 0x4 -#define GBU_CS5_BASEADDR 0x5 -#define GBU_CS6_BASEADDR 0x6 -#define GBU_CS7_BASEADDR 0x7 -#define GBU_CS_BASELIMIT(cs) (0x8+cs) -#define GBU_CS0_BASELIMIT 0x8 -#define GBU_CS1_BASELIMIT 0x9 -#define GBU_CS2_BASELIMIT 0xa -#define GBU_CS3_BASELIMIT 0xb -#define GBU_CS4_BASELIMIT 0xc -#define GBU_CS5_BASELIMIT 0xd -#define GBU_CS6_BASELIMIT 0xe -#define GBU_CS7_BASELIMIT 0xf -#define GBU_CS_DEVPARAM(cs) (0x10+cs) -#define GBU_CS0_DEVPARAM 0x10 -#define GBU_CS1_DEVPARAM 0x11 -#define GBU_CS2_DEVPARAM 0x12 -#define GBU_CS3_DEVPARAM 0x13 -#define GBU_CS4_DEVPARAM 0x14 -#define GBU_CS5_DEVPARAM 0x15 -#define GBU_CS6_DEVPARAM 0x16 -#define GBU_CS7_DEVPARAM 0x17 -#define GBU_CS_DEVTIME0(cs) (0x18+cs) -#define GBU_CS0_DEVTIME0 0x18 -#define GBU_CS1_DEVTIME0 0x1a -#define GBU_CS2_DEVTIME0 0x1c -#define GBU_CS3_DEVTIME0 0x1e -#define GBU_CS4_DEVTIME0 0x20 -#define GBU_CS5_DEVTIME0 0x22 -#define GBU_CS6_DEVTIME0 0x24 -#define GBU_CS7_DEVTIME0 0x26 -#define GBU_CS_DEVTIME1(cs) (0x19+cs) -#define GBU_CS0_DEVTIME1 0x19 -#define GBU_CS1_DEVTIME1 0x1b -#define GBU_CS2_DEVTIME1 0x1d -#define GBU_CS3_DEVTIME1 0x1f -#define GBU_CS4_DEVTIME1 0x21 -#define GBU_CS5_DEVTIME1 0x23 -#define GBU_CS6_DEVTIME1 0x25 -#define GBU_CS7_DEVTIME1 0x27 -#define GBU_SYSCTRL 0x28 -#define GBU_BYTESWAP 0x29 -#define GBU_DI_TIMEOUT_VAL 0x2d -#define GBU_INTSTAT 0x2e -#define GBU_INTEN 0x2f -#define GBU_STATUS 0x30 -#define GBU_ERRLOG0 0x2a -#define GBU_ERRLOG1 0x2b -#define GBU_ERRLOG2 0x2c - -#if !defined(LOCORE) && !defined(__ASSEMBLY__) - -#define nlm_read_gbu_reg(b, r) nlm_read_reg(b, r) -#define nlm_write_gbu_reg(b, r, v) nlm_write_reg(b, r, v) -#define nlm_get_gbu_pcibase(node) \ - nlm_pcicfg_base(XLP_IO_NOR_OFFSET(node)) -#define nlm_get_gbu_regbase(node) \ - (nlm_get_gbu_pcibase(node) + XLP_IO_PCI_HDRSZ) - -#endif /* !LOCORE && !__ASSEMBLY__ */ -#endif /* _NLM_HAL_GBU_H__ */ diff --git a/sys/mips/nlm/hal/haldefs.h b/sys/mips/nlm/hal/haldefs.h deleted file mode 100644 index 26898e94808..00000000000 --- a/sys/mips/nlm/hal/haldefs.h +++ /dev/null @@ -1,438 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef __NLM_HAL_MMIO_H__ -#define __NLM_HAL_MMIO_H__ - -/* - * This file contains platform specific memory mapped IO implementation - * and will provide a way to read 32/64 bit memory mapped registers in - * all ABIs - */ - -/* - * For o32 compilation, we have to disable interrupts and enable KX bit to - * access 64 bit addresses or data. - * - * We need to disable interrupts because we save just the lower 32 bits of - * registers in interrupt handling. So if we get hit by an interrupt while - * using the upper 32 bits of a register, we lose. - */ -static inline uint32_t nlm_save_flags_kx(void) -{ - uint32_t sr = mips_rd_status(); - - mips_wr_status((sr & ~MIPS_SR_INT_IE) | MIPS_SR_KX); - return (sr); -} - -static inline uint32_t nlm_save_flags_cop2(void) -{ - uint32_t sr = mips_rd_status(); - - mips_wr_status((sr & ~MIPS_SR_INT_IE) | MIPS_SR_COP_2_BIT); - return (sr); -} - -static inline void nlm_restore_flags(uint32_t sr) -{ - mips_wr_status(sr); -} - -static inline uint32_t -nlm_load_word(uint64_t addr) -{ - volatile uint32_t *p = (volatile uint32_t *)(long)addr; - - return *p; -} - -static inline void -nlm_store_word(uint64_t addr, uint32_t val) -{ - volatile uint32_t *p = (volatile uint32_t *)(long)addr; - - *p = val; -} - -#if defined(__mips_n64) || defined(__mips_n32) -static inline uint64_t -nlm_load_dword(volatile uint64_t addr) -{ - volatile uint64_t *p = (volatile uint64_t *)(long)addr; - - return *p; -} - -static inline void -nlm_store_dword(volatile uint64_t addr, uint64_t val) -{ - volatile uint64_t *p = (volatile uint64_t *)(long)addr; - - *p = val; -} - -#else /* o32 */ -static inline uint64_t -nlm_load_dword(uint64_t addr) -{ - volatile uint64_t *p = (volatile uint64_t *)(long)addr; - uint32_t valhi, vallo, sr; - - sr = nlm_save_flags_kx(); - __asm__ __volatile__( - ".set push\n\t" - ".set mips64\n\t" - "ld $8, 0(%2)\n\t" - "dsra32 %0, $8, 0\n\t" - "sll %1, $8, 0\n\t" - ".set pop\n" - : "=r"(valhi), "=r"(vallo) - : "r"(p) - : "$8"); - nlm_restore_flags(sr); - - return ((uint64_t)valhi << 32) | vallo; -} - -static inline void -nlm_store_dword(uint64_t addr, uint64_t val) -{ - volatile uint64_t *p = (volatile uint64_t *)(long)addr; - uint32_t valhi, vallo, sr; - - valhi = val >> 32; - vallo = val & 0xffffffff; - - sr = nlm_save_flags_kx(); - __asm__ __volatile__( - ".set push\n\t" - ".set mips64\n\t" - "dsll32 $8, %1, 0\n\t" - "dsll32 $9, %2, 0\n\t" /* get rid of the */ - "dsrl32 $9, $9, 0\n\t" /* sign extend */ - "or $9, $9, $8\n\t" - "sd $9, 0(%0)\n\t" - ".set pop\n" - : : "r"(p), "r"(valhi), "r"(vallo) - : "$8", "$9", "memory"); - nlm_restore_flags(sr); -} -#endif - -#if defined(__mips_n64) -static inline uint64_t -nlm_load_word_daddr(uint64_t addr) -{ - volatile uint32_t *p = (volatile uint32_t *)(long)addr; - - return *p; -} - -static inline void -nlm_store_word_daddr(uint64_t addr, uint32_t val) -{ - volatile uint32_t *p = (volatile uint32_t *)(long)addr; - - *p = val; -} - -static inline uint64_t -nlm_load_dword_daddr(uint64_t addr) -{ - volatile uint64_t *p = (volatile uint64_t *)(long)addr; - - return *p; -} - -static inline void -nlm_store_dword_daddr(uint64_t addr, uint64_t val) -{ - volatile uint64_t *p = (volatile uint64_t *)(long)addr; - - *p = val; -} - -#elif defined(__mips_n32) - -static inline uint64_t -nlm_load_word_daddr(uint64_t addr) -{ - uint32_t val; - - __asm__ __volatile__( - ".set push\n\t" - ".set mips64\n\t" - "lw %0, 0(%1)\n\t" - ".set pop\n" - : "=r"(val) - : "r"(addr)); - - return val; -} - -static inline void -nlm_store_word_daddr(uint64_t addr, uint32_t val) -{ - __asm__ __volatile__( - ".set push\n\t" - ".set mips64\n\t" - "sw %0, 0(%1)\n\t" - ".set pop\n" - : : "r"(val), "r"(addr) - : "memory"); -} - -static inline uint64_t -nlm_load_dword_daddr(uint64_t addr) -{ - uint64_t val; - - __asm__ __volatile__( - ".set push\n\t" - ".set mips64\n\t" - "ld %0, 0(%1)\n\t" - ".set pop\n" - : "=r"(val) - : "r"(addr)); - return val; -} - -static inline void -nlm_store_dword_daddr(uint64_t addr, uint64_t val) -{ - __asm__ __volatile__( - ".set push\n\t" - ".set mips64\n\t" - "sd %0, 0(%1)\n\t" - ".set pop\n" - : : "r"(val), "r"(addr) - : "memory"); -} - -#else /* o32 */ -static inline uint64_t -nlm_load_word_daddr(uint64_t addr) -{ - uint32_t val, addrhi, addrlo, sr; - - addrhi = addr >> 32; - addrlo = addr & 0xffffffff; - - sr = nlm_save_flags_kx(); - __asm__ __volatile__( - ".set push\n\t" - ".set mips64\n\t" - "dsll32 $8, %1, 0\n\t" - "dsll32 $9, %2, 0\n\t" - "dsrl32 $9, $9, 0\n\t" - "or $9, $9, $8\n\t" - "lw %0, 0($9)\n\t" - ".set pop\n" - : "=r"(val) - : "r"(addrhi), "r"(addrlo) - : "$8", "$9"); - nlm_restore_flags(sr); - - return val; - -} - -static inline void -nlm_store_word_daddr(uint64_t addr, uint32_t val) -{ - uint32_t addrhi, addrlo, sr; - - addrhi = addr >> 32; - addrlo = addr & 0xffffffff; - - sr = nlm_save_flags_kx(); - __asm__ __volatile__( - ".set push\n\t" - ".set mips64\n\t" - "dsll32 $8, %1, 0\n\t" - "dsll32 $9, %2, 0\n\t" - "dsrl32 $9, $9, 0\n\t" - "or $9, $9, $8\n\t" - "sw %0, 0($9)\n\t" - ".set pop\n" - : : "r"(val), "r"(addrhi), "r"(addrlo) - : "$8", "$9", "memory"); - nlm_restore_flags(sr); -} - -static inline uint64_t -nlm_load_dword_daddr(uint64_t addr) -{ - uint32_t addrh, addrl, sr; - uint32_t valh, vall; - - addrh = addr >> 32; - addrl = addr & 0xffffffff; - - sr = nlm_save_flags_kx(); - __asm__ __volatile__( - ".set push\n\t" - ".set mips64\n\t" - "dsll32 $8, %2, 0\n\t" - "dsll32 $9, %3, 0\n\t" - "dsrl32 $9, $9, 0\n\t" - "or $9, $9, $8\n\t" - "ld $8, 0($9)\n\t" - "dsra32 %0, $8, 0\n\t" - "sll %1, $8, 0\n\t" - ".set pop\n" - : "=r"(valh), "=r"(vall) - : "r"(addrh), "r"(addrl) - : "$8", "$9"); - nlm_restore_flags(sr); - - return ((uint64_t)valh << 32) | vall; -} - -static inline void -nlm_store_dword_daddr(uint64_t addr, uint64_t val) -{ - uint32_t addrh, addrl, sr; - uint32_t valh, vall; - - addrh = addr >> 32; - addrl = addr & 0xffffffff; - valh = val >> 32; - vall = val & 0xffffffff; - - sr = nlm_save_flags_kx(); - __asm__ __volatile__( - ".set push\n\t" - ".set mips64\n\t" - "dsll32 $8, %2, 0\n\t" - "dsll32 $9, %3, 0\n\t" - "dsrl32 $9, $9, 0\n\t" - "or $9, $9, $8\n\t" - "dsll32 $8, %0, 0\n\t" - "dsll32 $10, %1, 0\n\t" - "dsrl32 $10, $10, 0\n\t" - "or $8, $8, $10\n\t" - "sd $8, 0($9)\n\t" - ".set pop\n" - : : "r"(valh), "r"(vall), "r"(addrh), "r"(addrl) - : "$8", "$9", "memory"); - nlm_restore_flags(sr); -} -#endif /* __mips_n64 */ - -static inline uint32_t -nlm_read_reg(uint64_t base, uint32_t reg) -{ - volatile uint32_t *addr = (volatile uint32_t *)(long)base + reg; - - return *addr; -} - -static inline void -nlm_write_reg(uint64_t base, uint32_t reg, uint32_t val) -{ - volatile uint32_t *addr = (volatile uint32_t *)(long)base + reg; - - *addr = val; -} - -static inline uint64_t -nlm_read_reg64(uint64_t base, uint32_t reg) -{ - uint64_t addr = base + (reg >> 1) * sizeof(uint64_t); - - return nlm_load_dword(addr); -} - -static inline void -nlm_write_reg64(uint64_t base, uint32_t reg, uint64_t val) -{ - uint64_t addr = base + (reg >> 1) * sizeof(uint64_t); - - return nlm_store_dword(addr, val); -} - -/* - * Routines to store 32/64 bit values to 64 bit addresses, - * used when going thru XKPHYS to access registers - */ -static inline uint32_t -nlm_read_reg_xkphys(uint64_t base, uint32_t reg) -{ - uint64_t addr = base + reg * sizeof(uint32_t); - - return nlm_load_word_daddr(addr); -} - -static inline void -nlm_write_reg_xkphys(uint64_t base, uint32_t reg, uint32_t val) -{ - uint64_t addr = base + reg * sizeof(uint32_t); - return nlm_store_word_daddr(addr, val); -} - -static inline uint64_t -nlm_read_reg64_xkphys(uint64_t base, uint32_t reg) -{ - uint64_t addr = base + (reg >> 1) * sizeof(uint64_t); - - return nlm_load_dword_daddr(addr); -} - -static inline void -nlm_write_reg64_xkphys(uint64_t base, uint32_t reg, uint64_t val) -{ - uint64_t addr = base + (reg >> 1) * sizeof(uint64_t); - - return nlm_store_dword_daddr(addr, val); -} - -/* Location where IO base is mapped */ -extern uint64_t xlp_io_base; - -static inline uint64_t -nlm_pcicfg_base(uint32_t devoffset) -{ - return xlp_io_base + devoffset; -} - -static inline uint64_t -nlm_xkphys_map_pcibar0(uint64_t pcibase) -{ - uint64_t paddr; - - paddr = nlm_read_reg(pcibase, 0x4) & ~0xfu; - return (uint64_t)0x9000000000000000 | paddr; -} - -#endif diff --git a/sys/mips/nlm/hal/interlaken.h b/sys/mips/nlm/hal/interlaken.h deleted file mode 100644 index 0ce562c0f9b..00000000000 --- a/sys/mips/nlm/hal/interlaken.h +++ /dev/null @@ -1,70 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef __NLM_ILAKEN_H__ -#define __NLM_ILAKEN_H__ - -/** -* @file_name interlaken.h -* @author Netlogic Microsystems -* @brief Basic definitions of XLP ILAKEN ports -*/ - -#define ILK_TX_CONTROL(block) NAE_REG(block, 5, 0x00) -#define ILK_TX_RATE_LIMIT(block) NAE_REG(block, 5, 0x01) -#define ILK_TX_META_CTRL(block) NAE_REG(block, 5, 0x02) -#define ILK_RX_CTRL(block) NAE_REG(block, 5, 0x03) -#define ILK_RX_STATUS1(block) NAE_REG(block, 5, 0x04) -#define ILK_RX_STATUS2(block) NAE_REG(block, 5, 0x05) -#define ILK_GENERAL_CTRL1(block) NAE_REG(block, 5, 0x06) -#define ILK_STATUS3(block) NAE_REG(block, 5, 0x07) -#define ILK_RX_FC_TMAP0(block) NAE_REG(block, 5, 0x08) -#define ILK_RX_FC_TMAP1(block) NAE_REG(block, 5, 0x09) -#define ILK_RX_FC_TMAP2(block) NAE_REG(block, 5, 0x0a) -#define ILK_RX_FC_TMAP3(block) NAE_REG(block, 5, 0x0b) -#define ILK_RX_FC_TMAP4(block) NAE_REG(block, 5, 0x0c) -#define ILK_RX_FC_TADDR(block) NAE_REG(block, 5, 0x0d) -#define ILK_GENERAL_CTRL2(block) NAE_REG(block, 5, 0x0e) -#define ILK_GENERAL_CTRL3(block) NAE_REG(block, 5, 0x0f) -#define ILK_SMALL_COUNT0(block) NAE_REG(block, 5, 0x10) -#define ILK_SMALL_COUNT1(block) NAE_REG(block, 5, 0x11) -#define ILK_SMALL_COUNT2(block) NAE_REG(block, 5, 0x12) -#define ILK_SMALL_COUNT3(block) NAE_REG(block, 5, 0x13) -#define ILK_SMALL_COUNT4(block) NAE_REG(block, 5, 0x14) -#define ILK_SMALL_COUNT5(block) NAE_REG(block, 5, 0x15) -#define ILK_SMALL_COUNT6(block) NAE_REG(block, 5, 0x16) -#define ILK_SMALL_COUNT7(block) NAE_REG(block, 5, 0x17) -#define ILK_MID_COUNT0(block) NAE_REG(block, 5, 0x18) -#define ILK_MID_COUNT1(block) NAE_REG(block, 5, 0x19) -#define ILK_LARGE_COUNT0(block) NAE_REG(block, 5, 0x1a) -#define ILK_LARGE_COUNT1(block) NAE_REG(block, 5, 0x1b) -#define ILK_LARGE_COUNT_H0(block) NAE_REG(block, 5, 0x1c) -#define ILK_LARGE_COUNT_H1(block) NAE_REG(block, 5, 0x1d) - -#endif diff --git a/sys/mips/nlm/hal/iomap.h b/sys/mips/nlm/hal/iomap.h deleted file mode 100644 index 951eba32a74..00000000000 --- a/sys/mips/nlm/hal/iomap.h +++ /dev/null @@ -1,207 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef __NLM_HAL_IOMAP_H__ -#define __NLM_HAL_IOMAP_H__ - -#define XLP_DEFAULT_IO_BASE 0x18000000 -#define NMI_BASE 0xbfc00000 -#define XLP_IO_CLK 133333333 - -#define XLP_L2L3_CACHELINE_SIZE 64 -#define XLP_PCIE_CFG_SIZE 0x1000 /* 4K */ -#define XLP_PCIE_DEV_BLK_SIZE (8 * XLP_PCIE_CFG_SIZE) -#define XLP_PCIE_BUS_BLK_SIZE (256 * XLP_PCIE_DEV_BLK_SIZE) -#define XLP_IO_SIZE (64 << 20) /* ECFG space size */ -#define XLP_IO_PCI_HDRSZ 0x100 -#define XLP_IO_DEV(node, dev) ((dev) + (node) * 8) -#define XLP_HDR_OFFSET(node, bus, dev, fn) (((bus) << 20) | \ - ((XLP_IO_DEV(node, dev)) << 15) | ((fn) << 12)) - -#define XLP_IO_BRIDGE_OFFSET(node) XLP_HDR_OFFSET(node, 0, 0, 0) -/* coherent inter chip */ -#define XLP_IO_CIC0_OFFSET(node) XLP_HDR_OFFSET(node, 0, 0, 1) -#define XLP_IO_CIC1_OFFSET(node) XLP_HDR_OFFSET(node, 0, 0, 2) -#define XLP_IO_CIC2_OFFSET(node) XLP_HDR_OFFSET(node, 0, 0, 3) -#define XLP_IO_PIC_OFFSET(node) XLP_HDR_OFFSET(node, 0, 0, 4) - -#define XLP_IO_PCIE_OFFSET(node, i) XLP_HDR_OFFSET(node, 0, 1, i) -#define XLP_IO_PCIE0_OFFSET(node) XLP_HDR_OFFSET(node, 0, 1, 0) -#define XLP_IO_PCIE1_OFFSET(node) XLP_HDR_OFFSET(node, 0, 1, 1) -#define XLP_IO_PCIE2_OFFSET(node) XLP_HDR_OFFSET(node, 0, 1, 2) -#define XLP_IO_PCIE3_OFFSET(node) XLP_HDR_OFFSET(node, 0, 1, 3) - -#define XLP_IO_USB_OFFSET(node, i) XLP_HDR_OFFSET(node, 0, 2, i) -#define XLP_IO_USB_EHCI0_OFFSET(node) XLP_HDR_OFFSET(node, 0, 2, 0) -#define XLP_IO_USB_OHCI0_OFFSET(node) XLP_HDR_OFFSET(node, 0, 2, 1) -#define XLP_IO_USB_OHCI1_OFFSET(node) XLP_HDR_OFFSET(node, 0, 2, 2) -#define XLP_IO_USB_EHCI1_OFFSET(node) XLP_HDR_OFFSET(node, 0, 2, 3) -#define XLP_IO_USB_OHCI2_OFFSET(node) XLP_HDR_OFFSET(node, 0, 2, 4) -#define XLP_IO_USB_OHCI3_OFFSET(node) XLP_HDR_OFFSET(node, 0, 2, 5) - -#define XLP_IO_NAE_OFFSET(node) XLP_HDR_OFFSET(node, 0, 3, 0) -#define XLP_IO_POE_OFFSET(node) XLP_HDR_OFFSET(node, 0, 3, 1) -#define XLP_IO_SATA_OFFSET(node) XLP_HDR_OFFSET(node, 0, 3, 2) - -#define XLP_IO_CMS_OFFSET(node) XLP_HDR_OFFSET(node, 0, 4, 0) - -#define XLP_IO_DMA_OFFSET(node) XLP_HDR_OFFSET(node, 0, 5, 0) -#define XLP_IO_SEC_OFFSET(node) XLP_HDR_OFFSET(node, 0, 5, 1) -#define XLP_IO_RSA_OFFSET(node) XLP_HDR_OFFSET(node, 0, 5, 2) -#define XLP_IO_CMP_OFFSET(node) XLP_HDR_OFFSET(node, 0, 5, 3) -#define XLP_IO_SRIO_OFFSET(node) XLP_HDR_OFFSET(node, 0, 5, 4) -#define XLP_IO_REGEX_OFFSET(node) XLP_HDR_OFFSET(node, 0, 5, 5) - -#define XLP_IO_UART_OFFSET(node, i) XLP_HDR_OFFSET(node, 0, 6, i) -#define XLP_IO_UART0_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 0) -#define XLP_IO_UART1_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 1) -#define XLP_IO_I2C_OFFSET(node, i) XLP_HDR_OFFSET(node, 0, 6, 2 + i) -#define XLP_IO_I2C0_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 2) -#define XLP_IO_I2C1_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 3) -#define XLP_IO_GPIO_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 4) -/* system management */ -#define XLP_IO_SYS_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 5) -#define XLP_IO_JTAG_OFFSET(node) XLP_HDR_OFFSET(node, 0, 6, 6) - -#define XLP_IO_NOR_OFFSET(node) XLP_HDR_OFFSET(node, 0, 7, 0) -#define XLP_IO_NAND_OFFSET(node) XLP_HDR_OFFSET(node, 0, 7, 1) -#define XLP_IO_SPI_OFFSET(node) XLP_HDR_OFFSET(node, 0, 7, 2) -/* SD flash */ -#define XLP_IO_SD_OFFSET(node) XLP_HDR_OFFSET(node, 0, 7, 3) -#define XLP_IO_MMC_OFFSET(node, slot) \ - ((XLP_IO_SD_OFFSET(node))+(slot*0x100)+XLP_IO_PCI_HDRSZ) - -/* PCI config header register id's */ -#define XLP_PCI_CFGREG0 0x00 -#define XLP_PCI_CFGREG1 0x01 -#define XLP_PCI_CFGREG2 0x02 -#define XLP_PCI_CFGREG3 0x03 -#define XLP_PCI_CFGREG4 0x04 -#define XLP_PCI_CFGREG5 0x05 -#define XLP_PCI_DEVINFO_REG0 0x30 -#define XLP_PCI_DEVINFO_REG1 0x31 -#define XLP_PCI_DEVINFO_REG2 0x32 -#define XLP_PCI_DEVINFO_REG3 0x33 -#define XLP_PCI_DEVINFO_REG4 0x34 -#define XLP_PCI_DEVINFO_REG5 0x35 -#define XLP_PCI_DEVINFO_REG6 0x36 -#define XLP_PCI_DEVINFO_REG7 0x37 -#define XLP_PCI_DEVSCRATCH_REG0 0x38 -#define XLP_PCI_DEVSCRATCH_REG1 0x39 -#define XLP_PCI_DEVSCRATCH_REG2 0x3a -#define XLP_PCI_DEVSCRATCH_REG3 0x3b -#define XLP_PCI_MSGSTN_REG 0x3c -#define XLP_PCI_IRTINFO_REG 0x3d -#define XLP_PCI_UCODEINFO_REG 0x3e -#define XLP_PCI_SBB_WT_REG 0x3f - -/* PCI IDs for SoC device */ -#define PCI_VENDOR_NETLOGIC 0x184e - -#define PCI_DEVICE_ID_NLM_ROOT 0x1001 -#define PCI_DEVICE_ID_NLM_ICI 0x1002 -#define PCI_DEVICE_ID_NLM_PIC 0x1003 -#define PCI_DEVICE_ID_NLM_PCIE 0x1004 -#define PCI_DEVICE_ID_NLM_EHCI 0x1007 -#define PCI_DEVICE_ID_NLM_ILK 0x1008 -#define PCI_DEVICE_ID_NLM_NAE 0x1009 -#define PCI_DEVICE_ID_NLM_POE 0x100A -#define PCI_DEVICE_ID_NLM_FMN 0x100B -#define PCI_DEVICE_ID_NLM_RAID 0x100D -#define PCI_DEVICE_ID_NLM_SAE 0x100D -#define PCI_DEVICE_ID_NLM_RSA 0x100E -#define PCI_DEVICE_ID_NLM_CMP 0x100F -#define PCI_DEVICE_ID_NLM_UART 0x1010 -#define PCI_DEVICE_ID_NLM_I2C 0x1011 -#define PCI_DEVICE_ID_NLM_NOR 0x1015 -#define PCI_DEVICE_ID_NLM_NAND 0x1016 -#define PCI_DEVICE_ID_NLM_MMC 0x1018 - -#if !defined(LOCORE) && !defined(__ASSEMBLY__) - -#define nlm_read_pci_reg(b, r) nlm_read_reg(b, r) -#define nlm_write_pci_reg(b, r, v) nlm_write_reg(b, r, v) - -extern uint64_t xlp_sys_base; -extern uint64_t xlp_pic_base; - -static __inline__ int -nlm_dev_exists(uint32_t devoffset) -{ - uint64_t pcibase = nlm_pcicfg_base(devoffset); - - return (nlm_read_reg(pcibase, XLP_PCI_CFGREG0) != 0xffffffff); -} - -static __inline__ int -nlm_qidstart(uint64_t pcibase) -{ - return (nlm_read_reg(pcibase, XLP_PCI_MSGSTN_REG) & 0xffff); -} - -static __inline__ int -nlm_qnum(uint64_t pcibase) -{ - return (nlm_read_reg(pcibase, XLP_PCI_MSGSTN_REG) >> 16); -} - -static __inline__ int -nlm_irtstart(uint64_t pcibase) -{ - return (nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG) & 0xffff); -} - -static __inline__ int -nlm_irtnum(uint64_t pcibase) -{ - return (nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG) >> 16); -} - -static __inline__ int -nlm_num_uengines(uint64_t pcibase) -{ - return nlm_read_reg(pcibase, XLP_PCI_UCODEINFO_REG); -} - -/* - * Find node on which a given Soc device is located. - * input is the pci device (slot) number. - */ -static __inline__ int -nlm_get_device_node(int device) -{ - return (device / 8); -} - -#endif /* !LOCORE or !__ASSEMBLY */ - -#endif /* __NLM_HAL_IOMAP_H__ */ diff --git a/sys/mips/nlm/hal/mdio.h b/sys/mips/nlm/hal/mdio.h deleted file mode 100644 index df50ab7adae..00000000000 --- a/sys/mips/nlm/hal/mdio.h +++ /dev/null @@ -1,106 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __NLM_MDIO_H__ -#define __NLM_MDIO_H__ - -/** -* @file_name mdio.h -* @author Netlogic Microsystems -* @brief Access functions for XLP MDIO -*/ -#define INT_MDIO_CTRL 0x19 -#define INT_MDIO_CTRL_DATA 0x1A -#define INT_MDIO_RD_STAT 0x1B -#define INT_MDIO_LINK_STAT 0x1C -#define EXT_G0_MDIO_CTRL 0x1D -#define EXT_G1_MDIO_CTRL 0x21 -#define EXT_G0_MDIO_CTRL_DATA 0x1E -#define EXT_G1_MDIO_CTRL_DATA 0x22 -#define EXT_G0_MDIO_LINK_STAT 0x20 -#define EXT_G1_MDIO_LINK_STAT 0x24 -#define EXT_G0_MDIO_RD_STAT 0x1F -#define EXT_G1_MDIO_RD_STAT 0x23 - -#define INT_MDIO_CTRL_ST_POS 0 -#define INT_MDIO_CTRL_OP_POS 2 -#define INT_MDIO_CTRL_PHYADDR_POS 4 -#define INT_MDIO_CTRL_DEVTYPE_POS 9 -#define INT_MDIO_CTRL_TA_POS 14 -#define INT_MDIO_CTRL_MIIM_POS 16 -#define INT_MDIO_CTRL_LOAD_POS 19 -#define INT_MDIO_CTRL_XDIV_POS 21 -#define INT_MDIO_CTRL_MCDIV_POS 28 -#define INT_MDIO_CTRL_RST 0x40000000 -#define INT_MDIO_CTRL_SMP 0x00100000 -#define INT_MDIO_CTRL_CMD_LOAD 0x00080000 - -#define INT_MDIO_RD_STAT_MASK 0x0000FFFF -#define INT_MDIO_STAT_LFV 0x00010000 -#define INT_MDIO_STAT_SC 0x00020000 -#define INT_MDIO_STAT_SM 0x00040000 -#define INT_MDIO_STAT_MIILFS 0x00080000 -#define INT_MDIO_STAT_MBSY 0x00100000 - -#define EXT_G_MDIO_CLOCK_DIV_4 0 -#define EXT_G_MDIO_CLOCK_DIV_2 1 -#define EXT_G_MDIO_CLOCK_DIV_1 2 -#define EXT_G_MDIO_REGADDR_POS 5 -#define EXT_G_MDIO_PHYADDR_POS 10 -#define EXT_G_MDIO_CMD_SP 0x00008000 -#define EXT_G_MDIO_CMD_PSIA 0x00010000 -#define EXT_G_MDIO_CMD_LCD 0x00020000 -#define EXT_G_MDIO_CMD_RDS 0x00040000 -#define EXT_G_MDIO_CMD_SC 0x00080000 -#define EXT_G_MDIO_MMRST 0x00100000 -#define EXT_G_MDIO_DIV 0x0000001E -#define EXT_G_MDIO_DIV_WITH_HW_DIV64 0x00000010 - -#define EXT_G_MDIO_RD_STAT_MASK 0x0000FFFF -#define EXT_G_MDIO_STAT_LFV 0x00010000 -#define EXT_G_MDIO_STAT_SC 0x00020000 -#define EXT_G_MDIO_STAT_SM 0x00040000 -#define EXT_G_MDIO_STAT_MIILFS 0x00080000 -#define EXT_G_MDIO_STAT_MBSY 0x80000000 -#define MDIO_OP_CMD_READ 0x10 -#define MDIO_OP_CMD_WRITE 0x01 - -#if !defined(LOCORE) && !defined(__ASSEMBLY__) - -int nlm_int_gmac_mdio_read(uint64_t, int, int, int, int, int); -int nlm_int_gmac_mdio_write(uint64_t, int, int, int, int, int, uint16_t); -int nlm_int_gmac_mdio_reset(uint64_t, int, int, int); -int nlm_gmac_mdio_read(uint64_t, int, int, int, int, int); -int nlm_gmac_mdio_write(uint64_t, int, int, int, int, int, uint16_t); -int nlm_gmac_mdio_reset(uint64_t, int, int, int); -void nlm_mdio_reset_all(uint64_t); - -#endif /* !(LOCORE) && !(__ASSEMBLY__) */ -#endif diff --git a/sys/mips/nlm/hal/mips-extns.h b/sys/mips/nlm/hal/mips-extns.h deleted file mode 100644 index 0af34248fe5..00000000000 --- a/sys/mips/nlm/hal/mips-extns.h +++ /dev/null @@ -1,275 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef __NLM_MIPS_EXTNS_H__ -#define __NLM_MIPS_EXTNS_H__ - -#if !defined(LOCORE) && !defined(__ASSEMBLY__) -static __inline__ int32_t nlm_swapw(int32_t *loc, int32_t val) -{ - int32_t oldval = 0; - - __asm__ __volatile__ ( - ".set push\n" - ".set noreorder\n" - "move $9, %2\n" - "move $8, %3\n" - ".word 0x71280014\n" /* "swapw $8, $9\n" */ - "move %1, $8\n" - ".set pop\n" - : "+m" (*loc), "=r" (oldval) - : "r" (loc), "r" (val) - : "$8", "$9" ); - - return oldval; -} - -static __inline__ uint32_t nlm_swapwu(int32_t *loc, uint32_t val) -{ - uint32_t oldval; - - __asm__ __volatile__ ( - ".set push\n" - ".set noreorder\n" - "move $9, %2\n" - "move $8, %3\n" - ".word 0x71280015\n" /* "swapwu $8, $9\n" */ - "move %1, $8\n" - ".set pop\n" - : "+m" (*loc), "=r" (oldval) - : "r" (loc), "r" (val) - : "$8", "$9" ); - - return oldval; -} - -#if (__mips == 64) -static __inline__ uint64_t nlm_swapd(int32_t *loc, uint64_t val) -{ - uint64_t oldval; - - __asm__ __volatile__ ( - ".set push\n" - ".set noreorder\n" - "move $9, %2\n" - "move $8, %3\n" - ".word 0x71280014\n" /* "swapw $8, $9\n" */ - "move %1, $8\n" - ".set pop\n" - : "+m" (*loc), "=r" (oldval) - : "r" (loc), "r" (val) - : "$8", "$9" ); - - return oldval; -} -#endif - -/* - * Atomic increment a unsigned int - */ -static __inline unsigned int -nlm_ldaddwu(unsigned int value, unsigned int *addr) -{ - __asm__ __volatile__( - ".set push\n" - ".set noreorder\n" - "move $8, %2\n" - "move $9, %3\n" - ".word 0x71280011\n" /* ldaddwu $8, $9 */ - "move %0, $8\n" - ".set pop\n" - : "=&r"(value), "+m"(*addr) - : "0"(value), "r" ((unsigned long)addr) - : "$8", "$9"); - - return (value); -} -/* - * 32 bit read write for c0 - */ -#define read_c0_register32(reg, sel) \ -({ \ - uint32_t __rv; \ - __asm__ __volatile__( \ - ".set push\n\t" \ - ".set mips32\n\t" \ - "mfc0 %0, $%1, %2\n\t" \ - ".set pop\n" \ - : "=r" (__rv) : "i" (reg), "i" (sel) ); \ - __rv; \ - }) - -#define write_c0_register32(reg, sel, value) \ - __asm__ __volatile__( \ - ".set push\n\t" \ - ".set mips32\n\t" \ - "mtc0 %0, $%1, %2\n\t" \ - ".set pop\n" \ - : : "r" (value), "i" (reg), "i" (sel) ); - -#if defined(__mips_n64) || defined(__mips_n32) -/* - * On 64 bit compilation, the operations are simple - */ -#define read_c0_register64(reg, sel) \ -({ \ - uint64_t __rv; \ - __asm__ __volatile__( \ - ".set push\n\t" \ - ".set mips64\n\t" \ - "dmfc0 %0, $%1, %2\n\t" \ - ".set pop\n" \ - : "=r" (__rv) : "i" (reg), "i" (sel) ); \ - __rv; \ - }) - -#define write_c0_register64(reg, sel, value) \ - __asm__ __volatile__( \ - ".set push\n\t" \ - ".set mips64\n\t" \ - "dmtc0 %0, $%1, %2\n\t" \ - ".set pop\n" \ - : : "r" (value), "i" (reg), "i" (sel) ); -#else /* ! (defined(__mips_n64) || defined(__mips_n32)) */ - -/* - * 32 bit compilation, 64 bit values has to split - */ -#define read_c0_register64(reg, sel) \ -({ \ - uint32_t __high, __low; \ - __asm__ __volatile__( \ - ".set push\n\t" \ - ".set noreorder\n\t" \ - ".set mips64\n\t" \ - "dmfc0 $8, $%2, %3\n\t" \ - "dsra32 %0, $8, 0\n\t" \ - "sll %1, $8, 0\n\t" \ - ".set pop\n" \ - : "=r"(__high), "=r"(__low): "i"(reg), "i"(sel) \ - : "$8"); \ - ((uint64_t)__high << 32) | __low; \ -}) - -#define write_c0_register64(reg, sel, value) \ -do { \ - uint32_t __high = value >> 32; \ - uint32_t __low = value & 0xffffffff; \ - __asm__ __volatile__( \ - ".set push\n\t" \ - ".set noreorder\n\t" \ - ".set mips64\n\t" \ - "dsll32 $8, %1, 0\n\t" \ - "dsll32 $9, %0, 0\n\t" \ - "dsrl32 $8, $8, 0\n\t" \ - "or $8, $8, $9\n\t" \ - "dmtc0 $8, $%2, %3\n\t" \ - ".set pop" \ - :: "r"(__high), "r"(__low), "i"(reg), "i"(sel) \ - :"$8", "$9"); \ -} while(0) - -#endif -/* functions to write to and read from the extended - * cp0 registers. - * EIRR : Extended Interrupt Request Register - * cp0 register 9 sel 6 - * bits 0...7 are same as cause register 8...15 - * EIMR : Extended Interrupt Mask Register - * cp0 register 9 sel 7 - * bits 0...7 are same as status register 8...15 - */ -static __inline uint64_t -nlm_read_c0_eirr(void) -{ - - return (read_c0_register64(9, 6)); -} - -static __inline void -nlm_write_c0_eirr(uint64_t val) -{ - - write_c0_register64(9, 6, val); -} - -static __inline uint64_t -nlm_read_c0_eimr(void) -{ - - return (read_c0_register64(9, 7)); -} - -static __inline void -nlm_write_c0_eimr(uint64_t val) -{ - - write_c0_register64(9, 7, val); -} - -static __inline__ uint32_t -nlm_read_c0_ebase(void) -{ - - return (read_c0_register32(15, 1)); -} - -static __inline__ int -nlm_nodeid(void) -{ - return (nlm_read_c0_ebase() >> 5) & 0x3; -} - -static __inline__ int -nlm_cpuid(void) -{ - return nlm_read_c0_ebase() & 0x1f; -} - -static __inline__ int -nlm_threadid(void) -{ - return nlm_read_c0_ebase() & 0x3; -} - -static __inline__ int -nlm_coreid(void) -{ - return (nlm_read_c0_ebase() >> 2) & 0x7; -} -#endif - -#define XLP_MAX_NODES 4 -#define XLP_MAX_CORES 8 -#define XLP_MAX_THREADS 4 - -#endif diff --git a/sys/mips/nlm/hal/mmu.h b/sys/mips/nlm/hal/mmu.h deleted file mode 100644 index 82d96ba5dd8..00000000000 --- a/sys/mips/nlm/hal/mmu.h +++ /dev/null @@ -1,165 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef __XLP_MMU_H__ -#define __XLP_MMU_H__ - -#include - -static __inline__ uint32_t -nlm_read_c0_config6(void) -{ - uint32_t rv; - - __asm__ __volatile__ ( - ".set push\n" - ".set mips64\n" - "mfc0 %0, $16, 6\n" - ".set pop\n" - : "=r" (rv)); - - return rv; -} - -static __inline__ void -nlm_write_c0_config6(uint32_t value) -{ - __asm__ __volatile__ ( - ".set push\n" - ".set mips64\n" - "mtc0 %0, $16, 6\n" - ".set pop\n" - : : "r" (value)); -} - -static __inline__ uint32_t -nlm_read_c0_config7(void) -{ - uint32_t rv; - - __asm__ __volatile__ ( - ".set push\n" - ".set mips64\n" - "mfc0 %0, $16, 7\n" - ".set pop\n" - : "=r" (rv)); - - return rv; -} - -static __inline__ void -nlm_write_c0_config7(uint32_t value) -{ - __asm__ __volatile__ ( - ".set push\n" - ".set mips64\n" - "mtc0 %0, $16, 7\n" - ".set pop\n" - : : "r" (value)); -} -/** - * On power on reset, XLP comes up with 64 TLBs. - * Large-variable-tlb's (ELVT) and extended TLB is disabled. - * Enabling large-variable-tlb's sets up the standard - * TLB size from 64 to 128 TLBs. - * Enabling fixed TLB (EFT) sets up an additional 2048 tlbs. - * ELVT + EFT = 128 + 2048 = 2176 TLB entries. - * threads 64-entry-standard-tlb 128-entry-standard-tlb - * per std-tlb-only| std+EFT | std-tlb-only| std+EFT - * core | | | - * -------------------------------------------------------- - * 1 64 64+2048 128 128+2048 - * 2 64 64+1024 64 64+1024 - * 4 32 32+512 32 32+512 - * - * 1(G) 64 64+2048 128 128+2048 - * 2(G) 128 128+2048 128 128+2048 - * 4(G) 128 128+2048 128 128+2048 - * (G) = Global mode - */ - -/* en = 1 to enable - * en = 0 to disable - */ -static __inline__ void nlm_large_variable_tlb_en (int en) -{ - unsigned int val; - - val = nlm_read_c0_config6(); - val |= (en << 5); - nlm_write_c0_config6(val); - return; -} - -/* en = 1 to enable - * en = 0 to disable - */ -static __inline__ void nlm_pagewalker_en(int en) -{ - unsigned int val; - - val = nlm_read_c0_config6(); - val |= (en << 3); - nlm_write_c0_config6(val); - return; -} - -/* en = 1 to enable - * en = 0 to disable - */ -static __inline__ void nlm_extended_tlb_en(int en) -{ - unsigned int val; - - val = nlm_read_c0_config6(); - val |= (en << 2); - nlm_write_c0_config6(val); - return; -} - -static __inline__ int nlm_get_num_combined_tlbs(void) -{ - return (((nlm_read_c0_config6() >> 16) & 0xffff) + 1); -} - -/* get number of variable TLB entries */ -static __inline__ int nlm_get_num_vtlbs(void) -{ - return (((nlm_read_c0_config6() >> 6) & 0x3ff) + 1); -} - -static __inline__ void nlm_setup_extended_pagemask(int mask) -{ - nlm_write_c0_config7(mask); -} - -#endif diff --git a/sys/mips/nlm/hal/nae.h b/sys/mips/nlm/hal/nae.h deleted file mode 100644 index aa37f7d713b..00000000000 --- a/sys/mips/nlm/hal/nae.h +++ /dev/null @@ -1,656 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __NLM_NAE_H__ -#define __NLM_NAE_H__ - -/** -* @file_name nae.h -* @author Netlogic Microsystems -* @brief Basic definitions of XLP Networt Accelerator Engine -*/ - -/* NAE specific registers */ -#define NAE_REG(blk, intf, reg) (((blk) << 11) | ((intf) << 7) | (reg)) - -/* ingress path registers */ -#define NAE_RX_CONFIG NAE_REG(7, 0, 0x10) -#define NAE_RX_IF_BASE_CONFIG0 NAE_REG(7, 0, 0x12) -#define NAE_RX_IF_BASE_CONFIG1 NAE_REG(7, 0, 0x13) -#define NAE_RX_IF_BASE_CONFIG2 NAE_REG(7, 0, 0x14) -#define NAE_RX_IF_BASE_CONFIG3 NAE_REG(7, 0, 0x15) -#define NAE_RX_IF_BASE_CONFIG4 NAE_REG(7, 0, 0x16) -#define NAE_RX_IF_BASE_CONFIG5 NAE_REG(7, 0, 0x17) -#define NAE_RX_IF_BASE_CONFIG6 NAE_REG(7, 0, 0x18) -#define NAE_RX_IF_BASE_CONFIG7 NAE_REG(7, 0, 0x19) -#define NAE_RX_IF_BASE_CONFIG8 NAE_REG(7, 0, 0x1a) -#define NAE_RX_IF_BASE_CONFIG9 NAE_REG(7, 0, 0x1b) -#define NAE_RX_IF_VEC_VALID NAE_REG(7, 0, 0x1c) -#define NAE_RX_IF_SLOT_CAL NAE_REG(7, 0, 0x1d) -#define NAE_PARSER_CONFIG NAE_REG(7, 0, 0x1e) -#define NAE_PARSER_SEQ_FIFO_CFG NAE_REG(7, 0, 0x1f) -#define NAE_FREE_IN_FIFO_CFG NAE_REG(7, 0, 0x20) -#define NAE_RXBUF_BASE_DPTH_ADDR NAE_REG(7, 0, 0x21) -#define NAE_RXBUF_BASE_DPTH NAE_REG(7, 0, 0x22) -#define NAE_RX_UCORE_CFG NAE_REG(7, 0, 0x23) -#define NAE_RX_UCORE_CAM_MASK0 NAE_REG(7, 0, 0x24) -#define NAE_RX_UCORE_CAM_MASK1 NAE_REG(7, 0, 0x25) -#define NAE_RX_UCORE_CAM_MASK2 NAE_REG(7, 0, 0x26) -#define NAE_RX_UCORE_CAM_MASK3 NAE_REG(7, 0, 0x27) -#define NAE_FREEIN_FIFO_UNIQ_SZ_CFG NAE_REG(7, 0, 0x28) -#define NAE_RX_CRC_POLY0_CFG NAE_REG(7, 0, 0x2a) -#define NAE_RX_CRC_POLY1_CFG NAE_REG(7, 0, 0x2b) -#define NAE_FREE_SPILL0_MEM_CFG NAE_REG(7, 0, 0x2c) -#define NAE_FREE_SPILL1_MEM_CFG NAE_REG(7, 0, 0x2d) -#define NAE_FREEFIFO_THRESH_CFG NAE_REG(7, 0, 0x2e) -#define NAE_FLOW_CRC16_POLY_CFG NAE_REG(7, 0, 0x2f) -#define NAE_EGR_NIOR_CAL_LEN_REG NAE_REG(7, 0, 0x4e) -#define NAE_EGR_NIOR_CRDT_CAL_PROG NAE_REG(7, 0, 0x52) -#define NAE_TEST NAE_REG(7, 0, 0x5f) -#define NAE_BIU_TIMEOUT_CFG NAE_REG(7, 0, 0x60) -#define NAE_BIU_CFG NAE_REG(7, 0, 0x61) -#define NAE_RX_FREE_FIFO_POP NAE_REG(7, 0, 0x62) -#define NAE_RX_DSBL_ECC NAE_REG(7, 0, 0x63) -#define NAE_FLOW_BASEMASK_CFG NAE_REG(7, 0, 0x80) -#define NAE_POE_CLASS_SETUP_CFG NAE_REG(7, 0, 0x81) -#define NAE_UCORE_IFACEMASK_CFG NAE_REG(7, 0, 0x82) -#define NAE_RXBUF_XOFFON_THRESH NAE_REG(7, 0, 0x83) -#define NAE_FLOW_TABLE1_CFG NAE_REG(7, 0, 0x84) -#define NAE_FLOW_TABLE2_CFG NAE_REG(7, 0, 0x85) -#define NAE_FLOW_TABLE3_CFG NAE_REG(7, 0, 0x86) -#define NAE_RX_FREE_FIFO_THRESH NAE_REG(7, 0, 0x87) -#define NAE_RX_PARSER_UNCLA NAE_REG(7, 0, 0x88) -#define NAE_RX_BUF_INTR_THRESH NAE_REG(7, 0, 0x89) -#define NAE_IFACE_FIFO_CFG NAE_REG(7, 0, 0x8a) -#define NAE_PARSER_SEQ_FIFO_THRESH_CFG NAE_REG(7, 0, 0x8b) -#define NAE_RX_ERRINJ_CTRL0 NAE_REG(7, 0, 0x8c) -#define NAE_RX_ERRINJ_CTRL1 NAE_REG(7, 0, 0x8d) -#define NAE_RX_ERR_LATCH0 NAE_REG(7, 0, 0x8e) -#define NAE_RX_ERR_LATCH1 NAE_REG(7, 0, 0x8f) -#define NAE_RX_PERF_CTR_CFG NAE_REG(7, 0, 0xa0) -#define NAE_RX_PERF_CTR_VAL NAE_REG(7, 0, 0xa1) - -/* NAE hardware parser registers */ -#define NAE_L2_TYPE_PORT0 NAE_REG(7, 0, 0x210) -#define NAE_L2_TYPE_PORT1 NAE_REG(7, 0, 0x211) -#define NAE_L2_TYPE_PORT2 NAE_REG(7, 0, 0x212) -#define NAE_L2_TYPE_PORT3 NAE_REG(7, 0, 0x213) -#define NAE_L2_TYPE_PORT4 NAE_REG(7, 0, 0x214) -#define NAE_L2_TYPE_PORT5 NAE_REG(7, 0, 0x215) -#define NAE_L2_TYPE_PORT6 NAE_REG(7, 0, 0x216) -#define NAE_L2_TYPE_PORT7 NAE_REG(7, 0, 0x217) -#define NAE_L2_TYPE_PORT8 NAE_REG(7, 0, 0x218) -#define NAE_L2_TYPE_PORT9 NAE_REG(7, 0, 0x219) -#define NAE_L2_TYPE_PORT10 NAE_REG(7, 0, 0x21a) -#define NAE_L2_TYPE_PORT11 NAE_REG(7, 0, 0x21b) -#define NAE_L2_TYPE_PORT12 NAE_REG(7, 0, 0x21c) -#define NAE_L2_TYPE_PORT13 NAE_REG(7, 0, 0x21d) -#define NAE_L2_TYPE_PORT14 NAE_REG(7, 0, 0x21e) -#define NAE_L2_TYPE_PORT15 NAE_REG(7, 0, 0x21f) -#define NAE_L2_TYPE_PORT16 NAE_REG(7, 0, 0x220) -#define NAE_L2_TYPE_PORT17 NAE_REG(7, 0, 0x221) -#define NAE_L2_TYPE_PORT18 NAE_REG(7, 0, 0x222) -#define NAE_L2_TYPE_PORT19 NAE_REG(7, 0, 0x223) -#define NAE_L3_CTABLE_MASK0 NAE_REG(7, 0, 0x22c) -#define NAE_L3_CTABLE_MASK1 NAE_REG(7, 0, 0x22d) -#define NAE_L3_CTABLE_MASK2 NAE_REG(7, 0, 0x22e) -#define NAE_L3_CTABLE_MASK3 NAE_REG(7, 0, 0x22f) -#define NAE_L3CTABLE0 NAE_REG(7, 0, 0x230) -#define NAE_L3CTABLE1 NAE_REG(7, 0, 0x231) -#define NAE_L3CTABLE2 NAE_REG(7, 0, 0x232) -#define NAE_L3CTABLE3 NAE_REG(7, 0, 0x233) -#define NAE_L3CTABLE4 NAE_REG(7, 0, 0x234) -#define NAE_L3CTABLE5 NAE_REG(7, 0, 0x235) -#define NAE_L3CTABLE6 NAE_REG(7, 0, 0x236) -#define NAE_L3CTABLE7 NAE_REG(7, 0, 0x237) -#define NAE_L3CTABLE8 NAE_REG(7, 0, 0x238) -#define NAE_L3CTABLE9 NAE_REG(7, 0, 0x239) -#define NAE_L3CTABLE10 NAE_REG(7, 0, 0x23a) -#define NAE_L3CTABLE11 NAE_REG(7, 0, 0x23b) -#define NAE_L3CTABLE12 NAE_REG(7, 0, 0x23c) -#define NAE_L3CTABLE13 NAE_REG(7, 0, 0x23d) -#define NAE_L3CTABLE14 NAE_REG(7, 0, 0x23e) -#define NAE_L3CTABLE15 NAE_REG(7, 0, 0x23f) -#define NAE_L4CTABLE0 NAE_REG(7, 0, 0x250) -#define NAE_L4CTABLE1 NAE_REG(7, 0, 0x251) -#define NAE_L4CTABLE2 NAE_REG(7, 0, 0x252) -#define NAE_L4CTABLE3 NAE_REG(7, 0, 0x253) -#define NAE_L4CTABLE4 NAE_REG(7, 0, 0x254) -#define NAE_L4CTABLE5 NAE_REG(7, 0, 0x255) -#define NAE_L4CTABLE6 NAE_REG(7, 0, 0x256) -#define NAE_L4CTABLE7 NAE_REG(7, 0, 0x257) -#define NAE_IPV6_EXT_HEADER0 NAE_REG(7, 0, 0x260) -#define NAE_IPV6_EXT_HEADER1 NAE_REG(7, 0, 0x261) -#define NAE_VLAN_TYPES01 NAE_REG(7, 0, 0x262) -#define NAE_VLAN_TYPES23 NAE_REG(7, 0, 0x263) - -/* NAE Egress path registers */ -#define NAE_TX_CONFIG NAE_REG(7, 0, 0x11) -#define NAE_DMA_TX_CREDIT_TH NAE_REG(7, 0, 0x29) -#define NAE_STG1_STG2CRDT_CMD NAE_REG(7, 0, 0x30) -#define NAE_STG2_EHCRDT_CMD NAE_REG(7, 0, 0x32) -#define NAE_EH_FREECRDT_CMD NAE_REG(7, 0, 0x34) -#define NAE_STG2_STRCRDT_CMD NAE_REG(7, 0, 0x36) -#define NAE_TXFIFO_IFACEMAP_CMD NAE_REG(7, 0, 0x38) -#define NAE_VFBID_DESTMAP_CMD NAE_REG(7, 0, 0x3a) -#define NAE_STG1_PMEM_PROG NAE_REG(7, 0, 0x3c) -#define NAE_STG2_PMEM_PROG NAE_REG(7, 0, 0x3e) -#define NAE_EH_PMEM_PROG NAE_REG(7, 0, 0x40) -#define NAE_FREE_PMEM_PROG NAE_REG(7, 0, 0x42) -#define NAE_TX_DDR_ACTVLIST_CMD NAE_REG(7, 0, 0x44) -#define NAE_TX_IF_BURSTMAX_CMD NAE_REG(7, 0, 0x46) -#define NAE_TX_IF_ENABLE_CMD NAE_REG(7, 0, 0x48) -#define NAE_TX_PKTLEN_PMEM_CMD NAE_REG(7, 0, 0x4a) -#define NAE_TX_SCHED_MAP_CMD0 NAE_REG(7, 0, 0x4c) -#define NAE_TX_SCHED_MAP_CMD1 NAE_REG(7, 0, 0x4d) -#define NAE_TX_PKT_PMEM_CMD0 NAE_REG(7, 0, 0x50) -#define NAE_TX_PKT_PMEM_CMD1 NAE_REG(7, 0, 0x51) -#define NAE_TX_SCHED_CTRL NAE_REG(7, 0, 0x53) -#define NAE_TX_CRC_POLY0 NAE_REG(7, 0, 0x54) -#define NAE_TX_CRC_POLY1 NAE_REG(7, 0, 0x55) -#define NAE_TX_CRC_POLY2 NAE_REG(7, 0, 0x56) -#define NAE_TX_CRC_POLY3 NAE_REG(7, 0, 0x57) -#define NAE_STR_PMEM_CMD NAE_REG(7, 0, 0x58) -#define NAE_TX_IORCRDT_INIT NAE_REG(7, 0, 0x59) -#define NAE_TX_DSBL_ECC NAE_REG(7, 0, 0x5a) -#define NAE_TX_IORCRDT_IGNORE NAE_REG(7, 0, 0x5b) -#define NAE_IF0_1588_TMSTMP_HI NAE_REG(7, 0, 0x300) -#define NAE_IF1_1588_TMSTMP_HI NAE_REG(7, 0, 0x302) -#define NAE_IF2_1588_TMSTMP_HI NAE_REG(7, 0, 0x304) -#define NAE_IF3_1588_TMSTMP_HI NAE_REG(7, 0, 0x306) -#define NAE_IF4_1588_TMSTMP_HI NAE_REG(7, 0, 0x308) -#define NAE_IF5_1588_TMSTMP_HI NAE_REG(7, 0, 0x30a) -#define NAE_IF6_1588_TMSTMP_HI NAE_REG(7, 0, 0x30c) -#define NAE_IF7_1588_TMSTMP_HI NAE_REG(7, 0, 0x30e) -#define NAE_IF8_1588_TMSTMP_HI NAE_REG(7, 0, 0x310) -#define NAE_IF9_1588_TMSTMP_HI NAE_REG(7, 0, 0x312) -#define NAE_IF10_1588_TMSTMP_HI NAE_REG(7, 0, 0x314) -#define NAE_IF11_1588_TMSTMP_HI NAE_REG(7, 0, 0x316) -#define NAE_IF12_1588_TMSTMP_HI NAE_REG(7, 0, 0x318) -#define NAE_IF13_1588_TMSTMP_HI NAE_REG(7, 0, 0x31a) -#define NAE_IF14_1588_TMSTMP_HI NAE_REG(7, 0, 0x31c) -#define NAE_IF15_1588_TMSTMP_HI NAE_REG(7, 0, 0x31e) -#define NAE_IF16_1588_TMSTMP_HI NAE_REG(7, 0, 0x320) -#define NAE_IF17_1588_TMSTMP_HI NAE_REG(7, 0, 0x322) -#define NAE_IF18_1588_TMSTMP_HI NAE_REG(7, 0, 0x324) -#define NAE_IF19_1588_TMSTMP_HI NAE_REG(7, 0, 0x326) -#define NAE_IF0_1588_TMSTMP_LO NAE_REG(7, 0, 0x301) -#define NAE_IF1_1588_TMSTMP_LO NAE_REG(7, 0, 0x303) -#define NAE_IF2_1588_TMSTMP_LO NAE_REG(7, 0, 0x305) -#define NAE_IF3_1588_TMSTMP_LO NAE_REG(7, 0, 0x307) -#define NAE_IF4_1588_TMSTMP_LO NAE_REG(7, 0, 0x309) -#define NAE_IF5_1588_TMSTMP_LO NAE_REG(7, 0, 0x30b) -#define NAE_IF6_1588_TMSTMP_LO NAE_REG(7, 0, 0x30d) -#define NAE_IF7_1588_TMSTMP_LO NAE_REG(7, 0, 0x30f) -#define NAE_IF8_1588_TMSTMP_LO NAE_REG(7, 0, 0x311) -#define NAE_IF9_1588_TMSTMP_LO NAE_REG(7, 0, 0x313) -#define NAE_IF10_1588_TMSTMP_LO NAE_REG(7, 0, 0x315) -#define NAE_IF11_1588_TMSTMP_LO NAE_REG(7, 0, 0x317) -#define NAE_IF12_1588_TMSTMP_LO NAE_REG(7, 0, 0x319) -#define NAE_IF13_1588_TMSTMP_LO NAE_REG(7, 0, 0x31b) -#define NAE_IF14_1588_TMSTMP_LO NAE_REG(7, 0, 0x31d) -#define NAE_IF15_1588_TMSTMP_LO NAE_REG(7, 0, 0x31f) -#define NAE_IF16_1588_TMSTMP_LO NAE_REG(7, 0, 0x321) -#define NAE_IF17_1588_TMSTMP_LO NAE_REG(7, 0, 0x323) -#define NAE_IF18_1588_TMSTMP_LO NAE_REG(7, 0, 0x325) -#define NAE_IF19_1588_TMSTMP_LO NAE_REG(7, 0, 0x327) -#define NAE_TX_EL0 NAE_REG(7, 0, 0x328) -#define NAE_TX_EL1 NAE_REG(7, 0, 0x329) -#define NAE_EIC0 NAE_REG(7, 0, 0x32a) -#define NAE_EIC1 NAE_REG(7, 0, 0x32b) -#define NAE_STG1_STG2CRDT_STATUS NAE_REG(7, 0, 0x32c) -#define NAE_STG2_EHCRDT_STATUS NAE_REG(7, 0, 0x32d) -#define NAE_STG2_FREECRDT_STATUS NAE_REG(7, 0, 0x32e) -#define NAE_STG2_STRCRDT_STATUS NAE_REG(7, 0, 0x32f) -#define NAE_TX_PERF_CNTR_INTR_STATUS NAE_REG(7, 0, 0x330) -#define NAE_TX_PERF_CNTR_ROLL_STATUS NAE_REG(7, 0, 0x331) -#define NAE_TX_PERF_CNTR0 NAE_REG(7, 0, 0x332) -#define NAE_TX_PERF_CNTR1 NAE_REG(7, 0, 0x334) -#define NAE_TX_PERF_CNTR2 NAE_REG(7, 0, 0x336) -#define NAE_TX_PERF_CNTR3 NAE_REG(7, 0, 0x338) -#define NAE_TX_PERF_CNTR4 NAE_REG(7, 0, 0x33a) -#define NAE_TX_PERF_CNTR0_CTL NAE_REG(7, 0, 0x333) -#define NAE_TX_PERF_CNTR1_CTL NAE_REG(7, 0, 0x335) -#define NAE_TX_PERF_CNTR2_CTL NAE_REG(7, 0, 0x337) -#define NAE_TX_PERF_CNTR3_CTL NAE_REG(7, 0, 0x339) -#define NAE_TX_PERF_CNTR4_CTL NAE_REG(7, 0, 0x33b) -#define NAE_VFBID_DESTMAP_STATUS NAE_REG(7, 0, 0x380) -#define NAE_STG2_PMEM_STATUS NAE_REG(7, 0, 0x381) -#define NAE_EH_PMEM_STATUS NAE_REG(7, 0, 0x382) -#define NAE_FREE_PMEM_STATUS NAE_REG(7, 0, 0x383) -#define NAE_TX_DDR_ACTVLIST_STATUS NAE_REG(7, 0, 0x384) -#define NAE_TX_IF_BURSTMAX_STATUS NAE_REG(7, 0, 0x385) -#define NAE_TX_PKTLEN_PMEM_STATUS NAE_REG(7, 0, 0x386) -#define NAE_TX_SCHED_MAP_STATUS0 NAE_REG(7, 0, 0x387) -#define NAE_TX_SCHED_MAP_STATUS1 NAE_REG(7, 0, 0x388) -#define NAE_TX_PKT_PMEM_STATUS NAE_REG(7, 0, 0x389) -#define NAE_STR_PMEM_STATUS NAE_REG(7, 0, 0x38a) - -/* Network interface interrupt registers */ -#define NAE_NET_IF0_INTR_STAT NAE_REG(7, 0, 0x280) -#define NAE_NET_IF1_INTR_STAT NAE_REG(7, 0, 0x282) -#define NAE_NET_IF2_INTR_STAT NAE_REG(7, 0, 0x284) -#define NAE_NET_IF3_INTR_STAT NAE_REG(7, 0, 0x286) -#define NAE_NET_IF4_INTR_STAT NAE_REG(7, 0, 0x288) -#define NAE_NET_IF5_INTR_STAT NAE_REG(7, 0, 0x28a) -#define NAE_NET_IF6_INTR_STAT NAE_REG(7, 0, 0x28c) -#define NAE_NET_IF7_INTR_STAT NAE_REG(7, 0, 0x28e) -#define NAE_NET_IF8_INTR_STAT NAE_REG(7, 0, 0x290) -#define NAE_NET_IF9_INTR_STAT NAE_REG(7, 0, 0x292) -#define NAE_NET_IF10_INTR_STAT NAE_REG(7, 0, 0x294) -#define NAE_NET_IF11_INTR_STAT NAE_REG(7, 0, 0x296) -#define NAE_NET_IF12_INTR_STAT NAE_REG(7, 0, 0x298) -#define NAE_NET_IF13_INTR_STAT NAE_REG(7, 0, 0x29a) -#define NAE_NET_IF14_INTR_STAT NAE_REG(7, 0, 0x29c) -#define NAE_NET_IF15_INTR_STAT NAE_REG(7, 0, 0x29e) -#define NAE_NET_IF16_INTR_STAT NAE_REG(7, 0, 0x2a0) -#define NAE_NET_IF17_INTR_STAT NAE_REG(7, 0, 0x2a2) -#define NAE_NET_IF18_INTR_STAT NAE_REG(7, 0, 0x2a4) -#define NAE_NET_IF19_INTR_STAT NAE_REG(7, 0, 0x2a6) -#define NAE_NET_IF0_INTR_MASK NAE_REG(7, 0, 0x281) -#define NAE_NET_IF1_INTR_MASK NAE_REG(7, 0, 0x283) -#define NAE_NET_IF2_INTR_MASK NAE_REG(7, 0, 0x285) -#define NAE_NET_IF3_INTR_MASK NAE_REG(7, 0, 0x287) -#define NAE_NET_IF4_INTR_MASK NAE_REG(7, 0, 0x289) -#define NAE_NET_IF5_INTR_MASK NAE_REG(7, 0, 0x28b) -#define NAE_NET_IF6_INTR_MASK NAE_REG(7, 0, 0x28d) -#define NAE_NET_IF7_INTR_MASK NAE_REG(7, 0, 0x28f) -#define NAE_NET_IF8_INTR_MASK NAE_REG(7, 0, 0x291) -#define NAE_NET_IF9_INTR_MASK NAE_REG(7, 0, 0x293) -#define NAE_NET_IF10_INTR_MASK NAE_REG(7, 0, 0x295) -#define NAE_NET_IF11_INTR_MASK NAE_REG(7, 0, 0x297) -#define NAE_NET_IF12_INTR_MASK NAE_REG(7, 0, 0x299) -#define NAE_NET_IF13_INTR_MASK NAE_REG(7, 0, 0x29b) -#define NAE_NET_IF14_INTR_MASK NAE_REG(7, 0, 0x29d) -#define NAE_NET_IF15_INTR_MASK NAE_REG(7, 0, 0x29f) -#define NAE_NET_IF16_INTR_MASK NAE_REG(7, 0, 0x2a1) -#define NAE_NET_IF17_INTR_MASK NAE_REG(7, 0, 0x2a3) -#define NAE_NET_IF18_INTR_MASK NAE_REG(7, 0, 0x2a5) -#define NAE_NET_IF19_INTR_MASK NAE_REG(7, 0, 0x2a7) -#define NAE_COMMON0_INTR_STAT NAE_REG(7, 0, 0x2a8) -#define NAE_COMMON0_INTR_MASK NAE_REG(7, 0, 0x2a9) -#define NAE_COMMON1_INTR_STAT NAE_REG(7, 0, 0x2aa) -#define NAE_COMMON1_INTR_MASK NAE_REG(7, 0, 0x2ab) - -/* Network Interface Low-block Registers */ -#define NAE_PHY_LANE0_STATUS(block) NAE_REG(block, 0xe, 0) -#define NAE_PHY_LANE1_STATUS(block) NAE_REG(block, 0xe, 1) -#define NAE_PHY_LANE2_STATUS(block) NAE_REG(block, 0xe, 2) -#define NAE_PHY_LANE3_STATUS(block) NAE_REG(block, 0xe, 3) -#define NAE_PHY_LANE0_CTRL(block) NAE_REG(block, 0xe, 4) -#define NAE_PHY_LANE1_CTRL(block) NAE_REG(block, 0xe, 5) -#define NAE_PHY_LANE2_CTRL(block) NAE_REG(block, 0xe, 6) -#define NAE_PHY_LANE3_CTRL(block) NAE_REG(block, 0xe, 7) - -/* Network interface Top-block registers */ -#define NAE_LANE_CFG_CPLX_0_1 NAE_REG(7, 0, 0x780) -#define NAE_LANE_CFG_CPLX_2_3 NAE_REG(7, 0, 0x781) -#define NAE_LANE_CFG_CPLX_4 NAE_REG(7, 0, 0x782) -#define NAE_LANE_CFG_SOFTRESET NAE_REG(7, 0, 0x783) -#define NAE_1588_PTP_OFFSET_HI NAE_REG(7, 0, 0x784) -#define NAE_1588_PTP_OFFSET_LO NAE_REG(7, 0, 0x785) -#define NAE_1588_PTP_INC_DEN NAE_REG(7, 0, 0x786) -#define NAE_1588_PTP_INC_NUM NAE_REG(7, 0, 0x787) -#define NAE_1588_PTP_INC_INTG NAE_REG(7, 0, 0x788) -#define NAE_1588_PTP_CONTROL NAE_REG(7, 0, 0x789) -#define NAE_1588_PTP_STATUS NAE_REG(7, 0, 0x78a) -#define NAE_1588_PTP_USER_VALUE_HI NAE_REG(7, 0, 0x78b) -#define NAE_1588_PTP_USER_VALUE_LO NAE_REG(7, 0, 0x78c) -#define NAE_1588_PTP_TMR1_HI NAE_REG(7, 0, 0x78d) -#define NAE_1588_PTP_TMR1_LO NAE_REG(7, 0, 0x78e) -#define NAE_1588_PTP_TMR2_HI NAE_REG(7, 0, 0x78f) -#define NAE_1588_PTP_TMR2_LO NAE_REG(7, 0, 0x790) -#define NAE_1588_PTP_TMR3_HI NAE_REG(7, 0, 0x791) -#define NAE_1588_PTP_TMR3_LO NAE_REG(7, 0, 0x792) -#define NAE_TX_FC_CAL_IDX_TBL_CTRL NAE_REG(7, 0, 0x793) -#define NAE_TX_FC_CAL_TBL_CTRL NAE_REG(7, 0, 0x794) -#define NAE_TX_FC_CAL_TBL_DATA0 NAE_REG(7, 0, 0x795) -#define NAE_TX_FC_CAL_TBL_DATA1 NAE_REG(7, 0, 0x796) -#define NAE_TX_FC_CAL_TBL_DATA2 NAE_REG(7, 0, 0x797) -#define NAE_TX_FC_CAL_TBL_DATA3 NAE_REG(7, 0, 0x798) -#define NAE_INT_MDIO_CTRL NAE_REG(7, 0, 0x799) -#define NAE_INT_MDIO_CTRL_DATA NAE_REG(7, 0, 0x79a) -#define NAE_INT_MDIO_RD_STAT NAE_REG(7, 0, 0x79b) -#define NAE_INT_MDIO_LINK_STAT NAE_REG(7, 0, 0x79c) -#define NAE_EXT_G0_MDIO_CTRL NAE_REG(7, 0, 0x79d) -#define NAE_EXT_G1_MDIO_CTRL NAE_REG(7, 0, 0x7a1) -#define NAE_EXT_G0_MDIO_CTRL_DATA NAE_REG(7, 0, 0x79e) -#define NAE_EXT_G1_MDIO_CTRL_DATA NAE_REG(7, 0, 0x7a2) -#define NAE_EXT_G0_MDIO_RD_STAT NAE_REG(7, 0, 0x79f) -#define NAE_EXT_G1_MDIO_RD_STAT NAE_REG(7, 0, 0x7a3) -#define NAE_EXT_G0_MDIO_LINK_STAT NAE_REG(7, 0, 0x7a0) -#define NAE_EXT_G1_MDIO_LINK_STAT NAE_REG(7, 0, 0x7a4) -#define NAE_EXT_XG0_MDIO_CTRL NAE_REG(7, 0, 0x7a5) -#define NAE_EXT_XG1_MDIO_CTRL NAE_REG(7, 0, 0x7a9) -#define NAE_EXT_XG0_MDIO_CTRL_DATA NAE_REG(7, 0, 0x7a6) -#define NAE_EXT_XG1_MDIO_CTRL_DATA NAE_REG(7, 0, 0x7aa) -#define NAE_EXT_XG0_MDIO_RD_STAT NAE_REG(7, 0, 0x7a7) -#define NAE_EXT_XG1_MDIO_RD_STAT NAE_REG(7, 0, 0x7ab) -#define NAE_EXT_XG0_MDIO_LINK_STAT NAE_REG(7, 0, 0x7a8) -#define NAE_EXT_XG1_MDIO_LINK_STAT NAE_REG(7, 0, 0x7ac) -#define NAE_GMAC_FC_SLOT0 NAE_REG(7, 0, 0x7ad) -#define NAE_GMAC_FC_SLOT1 NAE_REG(7, 0, 0x7ae) -#define NAE_GMAC_FC_SLOT2 NAE_REG(7, 0, 0x7af) -#define NAE_GMAC_FC_SLOT3 NAE_REG(7, 0, 0x7b0) -#define NAE_NETIOR_NTB_SLOT NAE_REG(7, 0, 0x7b1) -#define NAE_NETIOR_MISC_CTRL0 NAE_REG(7, 0, 0x7b2) -#define NAE_NETIOR_INT0 NAE_REG(7, 0, 0x7b3) -#define NAE_NETIOR_INT0_MASK NAE_REG(7, 0, 0x7b4) -#define NAE_NETIOR_INT1 NAE_REG(7, 0, 0x7b5) -#define NAE_NETIOR_INT1_MASK NAE_REG(7, 0, 0x7b6) -#define NAE_GMAC_PFC_REPEAT NAE_REG(7, 0, 0x7b7) -#define NAE_XGMAC_PFC_REPEAT NAE_REG(7, 0, 0x7b8) -#define NAE_NETIOR_MISC_CTRL1 NAE_REG(7, 0, 0x7b9) -#define NAE_NETIOR_MISC_CTRL2 NAE_REG(7, 0, 0x7ba) -#define NAE_NETIOR_INT2 NAE_REG(7, 0, 0x7bb) -#define NAE_NETIOR_INT2_MASK NAE_REG(7, 0, 0x7bc) -#define NAE_NETIOR_MISC_CTRL3 NAE_REG(7, 0, 0x7bd) - -/* Network interface lane configuration registers */ -#define NAE_LANE_CFG_MISCREG1 NAE_REG(7, 0xf, 0x39) -#define NAE_LANE_CFG_MISCREG2 NAE_REG(7, 0xf, 0x3A) - -/* Network interface soft reset register */ -#define NAE_SOFT_RESET NAE_REG(7, 0xf, 3) - -/* ucore instruction/shared CAM RAM access */ -#define NAE_UCORE_SHARED_RAM_OFFSET 0x10000 - -#define PORTS_PER_CMPLX 4 -#define NAE_CACHELINE_SIZE 64 - -#define PHY_LANE_0_CTRL 4 -#define PHY_LANE_1_CTRL 5 -#define PHY_LANE_2_CTRL 6 -#define PHY_LANE_3_CTRL 7 - -#define PHY_LANE_STAT_SRCS 0x00000001 -#define PHY_LANE_STAT_STD 0x00000010 -#define PHY_LANE_STAT_SFEA 0x00000020 -#define PHY_LANE_STAT_STCS 0x00000040 -#define PHY_LANE_STAT_SPC 0x00000200 -#define PHY_LANE_STAT_XLF 0x00000400 -#define PHY_LANE_STAT_PCR 0x00000800 - -#define PHY_LANE_CTRL_DATA_POS 0 -#define PHY_LANE_CTRL_ADDR_POS 8 -#define PHY_LANE_CTRL_CMD_READ 0x00010000 -#define PHY_LANE_CTRL_CMD_WRITE 0x00000000 -#define PHY_LANE_CTRL_CMD_START 0x00020000 -#define PHY_LANE_CTRL_CMD_PENDING 0x00040000 -#define PHY_LANE_CTRL_ALL 0x00200000 -#define PHY_LANE_CTRL_FAST_INIT 0x00400000 -#define PHY_LANE_CTRL_REXSEL_POS 23 -#define PHY_LANE_CTRL_PHYMODE_POS 25 -#define PHY_LANE_CTRL_PWRDOWN 0x20000000 -#define PHY_LANE_CTRL_RST 0x40000000 -#define PHY_LANE_CTRL_RST_XAUI 0xc0000000 -#define PHY_LANE_CTRL_BPC_XAUI 0x80000000 - -#define LANE_CFG_CPLX_0_1 0x0 -#define LANE_CFG_CPLX_2_3 0x1 -#define LANE_CFG_CPLX_4 0x2 - -#define MAC_CONF1 0x0 -#define MAC_CONF2 0x1 -#define MAX_FRM 0x4 - -#define NETIOR_GMAC_CTRL1 0x7F -#define NETIOR_GMAC_CTRL2 0x7E -#define NETIOR_GMAC_CTRL3 0x7C - -#define SGMII_CAL_SLOTS 3 -#define XAUI_CAL_SLOTS 13 -#define IL8_CAL_SLOTS 26 -#define IL4_CAL_SLOTS 10 - -#define NAE_DRR_QUANTA 2048 - -#define XLP3XX_STG2_FIFO_SZ 512 -#define XLP3XX_EH_FIFO_SZ 512 -#define XLP3XX_FROUT_FIFO_SZ 512 -#define XLP3XX_MS_FIFO_SZ 512 -#define XLP3XX_PKT_FIFO_SZ 8192 -#define XLP3XX_PKTLEN_FIFO_SZ 512 - -#define XLP3XX_MAX_STG2_OFFSET 0x7F -#define XLP3XX_MAX_EH_OFFSET 0x1f -#define XLP3XX_MAX_FREE_OUT_OFFSET 0x1f -#define XLP3XX_MAX_MS_OFFSET 0xF -#define XLP3XX_MAX_PMEM_OFFSET 0x7FE - -#define XLP3XX_STG1_2_CREDIT XLP3XX_STG2_FIFO_SZ -#define XLP3XX_STG2_EH_CREDIT XLP3XX_EH_FIFO_SZ -#define XLP3XX_STG2_FROUT_CREDIT XLP3XX_FROUT_FIFO_SZ -#define XLP3XX_STG2_MS_CREDIT XLP3XX_MS_FIFO_SZ - -#define XLP8XX_STG2_FIFO_SZ 2048 -#define XLP8XX_EH_FIFO_SZ 4096 -#define XLP8XX_FROUT_FIFO_SZ 4096 -#define XLP8XX_MS_FIFO_SZ 2048 -#define XLP8XX_PKT_FIFO_SZ 16384 -#define XLP8XX_PKTLEN_FIFO_SZ 2048 - -#define XLP8XX_MAX_STG2_OFFSET 0x7F -#define XLP8XX_MAX_EH_OFFSET 0x7F -#define XLP8XX_MAX_FREE_OUT_OFFSET 0x7F -#define XLP8XX_MAX_MS_OFFSET 0x1F -#define XLP8XX_MAX_PMEM_OFFSET 0x7FE - -#define XLP8XX_STG1_2_CREDIT XLP8XX_STG2_FIFO_SZ -#define XLP8XX_STG2_EH_CREDIT XLP8XX_EH_FIFO_SZ -#define XLP8XX_STG2_FROUT_CREDIT XLP8XX_FROUT_FIFO_SZ -#define XLP8XX_STG2_MS_CREDIT XLP8XX_MS_FIFO_SZ - -#define MAX_CAL_SLOTS 64 -#define XLP_MAX_PORTS 18 -#define XLP_STORM_MAX_PORTS 8 - -#define MAX_FREE_FIFO_POOL_8XX 20 -#define MAX_FREE_FIFO_POOL_3XX 9 - -#if !defined(LOCORE) && !defined(__ASSEMBLY__) - -#define nlm_read_nae_reg(b, r) nlm_read_reg_xkphys(b, r) -#define nlm_write_nae_reg(b, r, v) nlm_write_reg_xkphys(b, r, v) -#define nlm_get_nae_pcibase(node) \ - nlm_pcicfg_base(XLP_IO_NAE_OFFSET(node)) -#define nlm_get_nae_regbase(node) \ - nlm_xkphys_map_pcibar0(nlm_get_nae_pcibase(node)) - -#define MAX_POE_CLASSES 8 -#define MAX_POE_CLASS_CTXT_TBL_SZ ((NUM_CONTEXTS / MAX_POE_CLASSES) + 1) -#define TXINITIORCR(x) (((x) & 0x7ffff) << 8) - -enum XLPNAE_TX_TYPE { - P2D_NEOP = 0, - P2P, - P2D_EOP, - MSC -}; - -enum nblock_type { - UNKNOWN = 0, /* DONT MAKE IT NON-ZERO */ - SGMIIC = 1, - XAUIC = 2, - ILC = 3 -}; - -enum nae_interface_type { - GMAC_0 = 0, - GMAC_1, - GMAC_2, - GMAC_3, - XGMAC, - INTERLAKEN, - PHY = 0xE, - LANE_CFG = 0xF, -}; - -enum { - LM_UNCONNECTED = 0, - LM_SGMII = 1, - LM_XAUI = 2, - LM_IL = 3, -}; - -enum nae_block { - BLOCK_0 = 0, - BLOCK_1, - BLOCK_2, - BLOCK_3, - BLOCK_4, - BLOCK_5, - BLOCK_6, - BLOCK_7, -}; - -enum { - PHYMODE_NONE = 0, - PHYMODE_HS_SGMII = 1, - PHYMODE_XAUI = 1, - PHYMODE_SGMII = 2, - PHYMODE_IL = 3, -}; - -static __inline int -nae_num_complex(uint64_t nae_pcibase) -{ - return (nlm_read_reg(nae_pcibase, XLP_PCI_DEVINFO_REG0) & 0xff); -} - -static __inline int -nae_num_context(uint64_t nae_pcibase) -{ - return (nlm_read_reg(nae_pcibase, XLP_PCI_DEVINFO_REG5)); -} - -/* per port config structure */ -struct nae_port_config { - int node; /* node id (quickread) */ - int block; /* network block id (quickread) */ - int port; /* port id - among the 18 in XLP */ - int type; /* port type - see xlp_gmac_port_types */ - int mdio_bus; - int phy_addr; - int num_channels; - int num_free_descs; - int free_desc_sizes; - int ucore_mask; - int loopback_mode; /* is complex is in loopback? */ - uint32_t freein_spill_size; /* Freein spill size for each port */ - uint32_t free_fifo_size; /* (512entries x 2desc/entry)1024desc */ - uint32_t iface_fifo_size;/* 256 entries x 64B/entry = 16KB */ - uint32_t pseq_fifo_size; /* 1024 entries - 1 pktlen/entry */ - uint32_t rxbuf_size; /* 4096 entries x 64B = 256KB */ - uint32_t rx_if_base_config; - uint32_t rx_slots_reqd; - uint32_t tx_slots_reqd; - uint32_t stg2_fifo_size; - uint32_t eh_fifo_size; - uint32_t frout_fifo_size; - uint32_t ms_fifo_size; - uint32_t pkt_fifo_size; - uint32_t pktlen_fifo_size; - uint32_t max_stg2_offset; - uint32_t max_eh_offset; - uint32_t max_frout_offset; - uint32_t max_ms_offset; - uint32_t max_pmem_offset; - uint32_t stg1_2_credit; - uint32_t stg2_eh_credit; - uint32_t stg2_frout_credit; - uint32_t stg2_ms_credit; - uint32_t vlan_pri_en; - uint32_t txq; - uint32_t rxfreeq; - uint32_t ieee1588_inc_intg; - uint32_t ieee1588_inc_den; - uint32_t ieee1588_inc_num; - uint64_t ieee1588_userval; - uint64_t ieee1588_ptpoff; - uint64_t ieee1588_tmr1; - uint64_t ieee1588_tmr2; - uint64_t ieee1588_tmr3; -}; - -void nlm_nae_flush_free_fifo(uint64_t nae_base, int nblocks); -void nlm_program_nae_parser_seq_fifo(uint64_t, int, struct nae_port_config *); -void nlm_setup_rx_cal_cfg(uint64_t, int, struct nae_port_config *); -void nlm_setup_tx_cal_cfg(uint64_t, int, struct nae_port_config *cfg); -void nlm_deflate_frin_fifo_carving(uint64_t, int); -void nlm_reset_nae(int); -int nlm_set_nae_frequency(int, int); -void nlm_setup_poe_class_config(uint64_t nae_base, int max_poe_classes, - int num_contexts, int *poe_cl_tbl); -void nlm_setup_vfbid_mapping(uint64_t); -void nlm_setup_flow_crc_poly(uint64_t, uint32_t); -void nlm_setup_iface_fifo_cfg(uint64_t, int, struct nae_port_config *); -void nlm_setup_rx_base_config(uint64_t, int, struct nae_port_config *); -void nlm_setup_rx_buf_config(uint64_t, int, struct nae_port_config *); -void nlm_setup_freein_fifo_cfg(uint64_t, struct nae_port_config *); -int nlm_get_flow_mask(int); -void nlm_program_flow_cfg(uint64_t, int, uint32_t, uint32_t); -void xlp_ax_nae_lane_reset_txpll(uint64_t, int, int, int); -void xlp_nae_lane_reset_txpll(uint64_t, int, int, int); -void xlp_nae_config_lane_gmac(uint64_t, int); -void config_egress_fifo_carvings(uint64_t, int, int, int, int, - struct nae_port_config *); -void config_egress_fifo_credits(uint64_t, int, int, int, int, - struct nae_port_config *); -void nlm_config_freein_fifo_uniq_cfg(uint64_t, int, int); -void nlm_config_ucore_iface_mask_cfg(uint64_t, int, int); -int nlm_nae_init_netior(uint64_t nae_base, int nblocks); -void nlm_nae_init_ingress(uint64_t, uint32_t); -void nlm_nae_init_egress(uint64_t); -uint32_t ucore_spray_config(uint32_t, uint32_t, int); -void nlm_nae_init_ucore(uint64_t nae_base, int if_num, uint32_t ucore_mask); -int nlm_nae_open_if(uint64_t, int, int, int, uint32_t); -void nlm_mac_enable(uint64_t, int, int, int); -void nlm_mac_disable(uint64_t, int, int, int); -uint64_t nae_tx_desc(u_int, u_int, u_int, u_int, uint64_t); -void nlm_setup_l2type(uint64_t, int, uint32_t, uint32_t, uint32_t, - uint32_t, uint32_t, uint32_t); -void nlm_setup_l3ctable_mask(uint64_t, int, uint32_t, uint32_t); -void nlm_setup_l3ctable_even(uint64_t, int, uint32_t, uint32_t, uint32_t, - uint32_t, uint32_t); -void nlm_setup_l3ctable_odd(uint64_t, int, uint32_t, uint32_t, uint32_t, - uint32_t, uint32_t, uint32_t); -void nlm_setup_l4ctable_even(uint64_t, int, uint32_t, uint32_t, uint32_t, - uint32_t, uint32_t, uint32_t); -void nlm_setup_l4ctable_odd(uint64_t, int, uint32_t, uint32_t, uint32_t, uint32_t); -void nlm_enable_hardware_parser(uint64_t); -void nlm_enable_hardware_parser_per_port(uint64_t, int, int); -void nlm_prepad_enable(uint64_t, int); -void nlm_setup_1588_timer(uint64_t, struct nae_port_config *); - -#endif /* !(LOCORE) && !(__ASSEMBLY__) */ - -#endif diff --git a/sys/mips/nlm/hal/nlm_hal.c b/sys/mips/nlm/hal/nlm_hal.c deleted file mode 100644 index 44ad267d76d..00000000000 --- a/sys/mips/nlm/hal/nlm_hal.c +++ /dev/null @@ -1,113 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD */ - -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -uint32_t -xlp_get_cpu_frequency(int node, int core) -{ - uint64_t sysbase = nlm_get_sys_regbase(node); - unsigned int pll_divf, pll_divr, dfs_div, ext_div; - unsigned int rstval, dfsval; - - rstval = nlm_read_sys_reg(sysbase, SYS_POWER_ON_RESET_CFG); - dfsval = nlm_read_sys_reg(sysbase, SYS_CORE_DFS_DIV_VALUE); - pll_divf = ((rstval >> 10) & 0x7f) + 1; - pll_divr = ((rstval >> 8) & 0x3) + 1; - if (!nlm_is_xlp8xx_ax()) - ext_div = ((rstval >> 30) & 0x3) + 1; - else - ext_div = 1; - dfs_div = ((dfsval >> (core << 2)) & 0xf) + 1; - - return ((800000000ULL * pll_divf)/(3 * pll_divr * ext_div * dfs_div)); -} - -static u_int -nlm_get_device_frequency(uint64_t sysbase, int devtype) -{ - uint32_t pllctrl, dfsdiv, spf, spr, div_val; - int extra_div; - - pllctrl = nlm_read_sys_reg(sysbase, SYS_PLL_CTRL); - if (devtype <= 7) - div_val = nlm_read_sys_reg(sysbase, SYS_DFS_DIV_VALUE0); - else { - devtype -= 8; - div_val = nlm_read_sys_reg(sysbase, SYS_DFS_DIV_VALUE1); - } - dfsdiv = ((div_val >> (devtype << 2)) & 0xf) + 1; - spf = (pllctrl >> 3 & 0x7f) + 1; - spr = (pllctrl >> 1 & 0x03) + 1; - if (devtype == DFS_DEVICE_NAE && !nlm_is_xlp8xx_ax()) - extra_div = 2; - else - extra_div = 1; - - return ((400 * spf) / (3 * extra_div * spr * dfsdiv)); -} - -int -nlm_set_device_frequency(int node, int devtype, int frequency) -{ - uint64_t sysbase; - u_int cur_freq; - int dec_div; - - sysbase = nlm_get_sys_regbase(node); - cur_freq = nlm_get_device_frequency(sysbase, devtype); - if (cur_freq < (frequency - 5)) - dec_div = 1; - else - dec_div = 0; - - for(;;) { - if ((cur_freq >= (frequency - 5)) && (cur_freq <= frequency)) - break; - if (dec_div) - nlm_write_sys_reg(sysbase, SYS_DFS_DIV_DEC_CTRL, - (1 << devtype)); - else - nlm_write_sys_reg(sysbase, SYS_DFS_DIV_INC_CTRL, - (1 << devtype)); - cur_freq = nlm_get_device_frequency(sysbase, devtype); - } - return (nlm_get_device_frequency(sysbase, devtype)); -} diff --git a/sys/mips/nlm/hal/nlmsaelib.h b/sys/mips/nlm/hal/nlmsaelib.h deleted file mode 100644 index 5b7a1aa58eb..00000000000 --- a/sys/mips/nlm/hal/nlmsaelib.h +++ /dev/null @@ -1,605 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _NLM_HAL_CRYPTO_H_ -#define _NLM_HAL_CRYPTO_H_ - -#define SAE_CFG_REG 0x00 -#define SAE_ENG_SEL_0 0x01 -#define SAE_ENG_SEL_1 0x02 -#define SAE_ENG_SEL_2 0x03 -#define SAE_ENG_SEL_3 0x04 -#define SAE_ENG_SEL_4 0x05 -#define SAE_ENG_SEL_5 0x06 -#define SAE_ENG_SEL_6 0x07 -#define SAE_ENG_SEL_7 0x08 - -#define RSA_CFG_REG 0x00 -#define RSA_ENG_SEL_0 0x01 -#define RSA_ENG_SEL_1 0x02 -#define RSA_ENG_SEL_2 0x03 - -#define nlm_read_sec_reg(b, r) nlm_read_reg(b, r) -#define nlm_write_sec_reg(b, r, v) nlm_write_reg(b, r, v) -#define nlm_get_sec_pcibase(node) nlm_pcicfg_base(XLP_IO_SEC_OFFSET(node)) -#define nlm_get_sec_regbase(node) \ - (nlm_get_sec_pcibase(node) + XLP_IO_PCI_HDRSZ) - -#define nlm_read_rsa_reg(b, r) nlm_read_reg(b, r) -#define nlm_write_rsa_reg(b, r, v) nlm_write_reg(b, r, v) -#define nlm_get_rsa_pcibase(node) nlm_pcicfg_base(XLP_IO_RSA_OFFSET(node)) -#define nlm_get_rsa_regbase(node) \ - (nlm_get_rsa_pcibase(node) + XLP_IO_PCI_HDRSZ) - -#define nlm_pcibase_sec(node) nlm_pcicfg_base(XLP_IO_SEC_OFFSET(node)) -#define nlm_qidstart_sec(node) nlm_qidstart_kseg(nlm_pcibase_sec(node)) -#define nlm_qnum_sec(node) nlm_qnum_kseg(nlm_pcibase_sec(node)) - -/* - * Since buffer allocation for crypto at kernel is done as malloc, each - * segment size is given as page size which is 4K by default - */ -#define NLM_CRYPTO_MAX_SEG_LEN PAGE_SIZE - -#define MAX_KEY_LEN_IN_DW 20 - -#define left_shift64(x, bitshift, numofbits) \ - ((uint64_t)(x) << (bitshift)) - -#define left_shift64_mask(x, bitshift, numofbits) \ - (((uint64_t)(x) & ((1ULL << (numofbits)) - 1)) << (bitshift)) - -/** -* @brief cipher algorithms -* @ingroup crypto -*/ -enum nlm_cipher_algo { - NLM_CIPHER_BYPASS = 0, - NLM_CIPHER_DES = 1, - NLM_CIPHER_3DES = 2, - NLM_CIPHER_AES128 = 3, - NLM_CIPHER_AES192 = 4, - NLM_CIPHER_AES256 = 5, - NLM_CIPHER_ARC4 = 6, - NLM_CIPHER_KASUMI_F8 = 7, - NLM_CIPHER_SNOW3G_F8 = 8, - NLM_CIPHER_CAMELLIA128 = 9, - NLM_CIPHER_CAMELLIA192 = 0xA, - NLM_CIPHER_CAMELLIA256 = 0xB, - NLM_CIPHER_MAX = 0xC, -}; - -/** -* @brief cipher modes -* @ingroup crypto -*/ -enum nlm_cipher_mode { - NLM_CIPHER_MODE_ECB = 0, - NLM_CIPHER_MODE_CBC = 1, - NLM_CIPHER_MODE_CFB = 2, - NLM_CIPHER_MODE_OFB = 3, - NLM_CIPHER_MODE_CTR = 4, - NLM_CIPHER_MODE_AES_F8 = 5, - NLM_CIPHER_MODE_GCM = 6, - NLM_CIPHER_MODE_CCM = 7, - NLM_CIPHER_MODE_UNDEFINED1 = 8, - NLM_CIPHER_MODE_UNDEFINED2 = 9, - NLM_CIPHER_MODE_LRW = 0xA, - NLM_CIPHER_MODE_XTS = 0xB, - NLM_CIPHER_MODE_MAX = 0xC, -}; - -/** -* @brief hash algorithms -* @ingroup crypto -*/ -enum nlm_hash_algo { - NLM_HASH_BYPASS = 0, - NLM_HASH_MD5 = 1, - NLM_HASH_SHA = 2, - NLM_HASH_UNDEFINED = 3, - NLM_HASH_AES128 = 4, - NLM_HASH_AES192 = 5, - NLM_HASH_AES256 = 6, - NLM_HASH_KASUMI_F9 = 7, - NLM_HASH_SNOW3G_F9 = 8, - NLM_HASH_CAMELLIA128 = 9, - NLM_HASH_CAMELLIA192 = 0xA, - NLM_HASH_CAMELLIA256 = 0xB, - NLM_HASH_GHASH = 0xC, - NLM_HASH_MAX = 0xD -}; - -/** -* @brief hash modes -* @ingroup crypto -*/ -enum nlm_hash_mode { - NLM_HASH_MODE_SHA1 = 0, /* Only SHA */ - NLM_HASH_MODE_SHA224 = 1, /* Only SHA */ - NLM_HASH_MODE_SHA256 = 2, /* Only SHA */ - NLM_HASH_MODE_SHA384 = 3, /* Only SHA */ - NLM_HASH_MODE_SHA512 = 4, /* Only SHA */ - NLM_HASH_MODE_CMAC = 5, /* AES and Camellia */ - NLM_HASH_MODE_XCBC = 6, /* AES and Camellia */ - NLM_HASH_MODE_CBC_MAC = 7, /* AES and Camellia */ - NLM_HASH_MODE_CCM = 8, /* AES */ - NLM_HASH_MODE_GCM = 9, /* AES */ - NLM_HASH_MODE_MAX = 0xA, -}; - -/** -* @brief crypto control descriptor, should be cache aligned -* @ingroup crypto -*/ -struct nlm_crypto_pkt_ctrl { - uint64_t desc0; - /* combination of cipher and hash keys */ - uint64_t key[MAX_KEY_LEN_IN_DW]; - uint32_t cipherkeylen; - uint32_t hashkeylen; - uint32_t taglen; -}; - -/** -* @brief crypto packet descriptor, should be cache aligned -* @ingroup crypto -*/ -struct nlm_crypto_pkt_param { - uint64_t desc0; - uint64_t desc1; - uint64_t desc2; - uint64_t desc3; - uint64_t segment[1][2]; -}; - -static __inline__ uint64_t -nlm_crypto_form_rsa_ecc_fmn_entry0(unsigned int l3alloc, unsigned int type, - unsigned int func, uint64_t srcaddr) -{ - return (left_shift64(l3alloc, 61, 1) | - left_shift64(type, 46, 7) | - left_shift64(func, 40, 6) | - left_shift64(srcaddr, 0, 40)); -} - -static __inline__ uint64_t -nlm_crypto_form_rsa_ecc_fmn_entry1(unsigned int dstclobber, - unsigned int l3alloc, unsigned int fbvc, uint64_t dstaddr) -{ - return (left_shift64(dstclobber, 62, 1) | - left_shift64(l3alloc, 61, 1) | - left_shift64(fbvc, 40, 12) | - left_shift64(dstaddr, 0, 40)); -} - -/** -* @brief Generate cypto control descriptor -* @ingroup crypto -* hmac : 1 for hash with hmac -* hashalg, see hash_alg enums -* hashmode, see hash_mode enums -* cipherhalg, see cipher_alg enums -* ciphermode, see cipher_mode enums -* arc4_cipherkeylen : length of arc4 cipher key, 0 is interpreted as 32 -* arc4_keyinit : -* cfbmask : cipher text for feedback, -* 0(1 bit), 1(2 bits), 2(4 bits), 3(8 bits), 4(16bits), 5(32 bits), -* 6(64 bits), 7(128 bits) -*/ -static __inline__ uint64_t -nlm_crypto_form_pkt_ctrl_desc(unsigned int hmac, unsigned int hashalg, - unsigned int hashmode, unsigned int cipheralg, unsigned int ciphermode, - unsigned int arc4_cipherkeylen, unsigned int arc4_keyinit, - unsigned int cfbmask) -{ - return (left_shift64(hmac, 61, 1) | - left_shift64(hashalg, 52, 8) | - left_shift64(hashmode, 43, 8) | - left_shift64(cipheralg, 34, 8) | - left_shift64(ciphermode, 25, 8) | - left_shift64(arc4_cipherkeylen, 18, 5) | - left_shift64(arc4_keyinit, 17, 1) | - left_shift64(cfbmask, 0, 3)); -} -/** -* @brief Generate cypto packet descriptor 0 -* @ingroup crypto -* tls : 1 (tls enabled) 0(tls disabled) -* hash_source : 1 (encrypted data is sent to the auth engine) -* 0 (plain data is sent to the auth engine) -* hashout_l3alloc : 1 (auth output is transited through l3 cache) -* encrypt : 1 (for encrypt) 0 (for decrypt) -* ivlen : iv length in bytes -* hashdst_addr : hash out physical address, byte aligned -*/ -static __inline__ uint64_t -nlm_crypto_form_pkt_desc0(unsigned int tls, unsigned int hash_source, - unsigned int hashout_l3alloc, unsigned int encrypt, unsigned int ivlen, - uint64_t hashdst_addr) -{ - return (left_shift64(tls, 63, 1) | - left_shift64(hash_source, 62, 1) | - left_shift64(hashout_l3alloc, 60, 1) | - left_shift64(encrypt, 59, 1) | - left_shift64_mask((ivlen - 1), 41, 16) | - left_shift64(hashdst_addr, 0, 40)); -} - -/** -* @brief Generate cypto packet descriptor 1 -* @ingroup crypto -* cipherlen : cipher length in bytes -* hashlen : hash length in bytes -*/ -static __inline__ uint64_t -nlm_crypto_form_pkt_desc1(unsigned int cipherlen, unsigned int hashlen) -{ - return (left_shift64_mask((cipherlen - 1), 32, 32) | - left_shift64_mask((hashlen - 1), 0, 32)); -} - -/** -* @brief Generate cypto packet descriptor 2 -* @ingroup crypto -* ivoff : iv offset, offset from start of src data addr -* ciperbit_cnt : number of valid bits in the last input byte to the cipher, -* 0 (8 bits), 1 (1 bit)..7 (7 bits) -* cipheroff : cipher offset, offset from start of src data addr -* hashbit_cnt : number of valid bits in the last input byte to the auth -* 0 (8 bits), 1 (1 bit)..7 (7 bits) -* hashclobber : 1 (hash output will be written as multiples of cachelines, no -* read modify write) -* hashoff : hash offset, offset from start of src data addr -*/ - -static __inline__ uint64_t -nlm_crypto_form_pkt_desc2(unsigned int ivoff, unsigned int cipherbit_cnt, - unsigned int cipheroff, unsigned int hashbit_cnt, unsigned int hashclobber, - unsigned int hashoff) -{ - return (left_shift64(ivoff , 45, 16) | - left_shift64(cipherbit_cnt, 42, 3) | - left_shift64(cipheroff, 22, 16) | - left_shift64(hashbit_cnt, 19, 3) | - left_shift64(hashclobber, 18, 1) | - left_shift64(hashoff, 0, 16)); -} - -/** -* @brief Generate cypto packet descriptor 3 -* @ingroup crypto -* designer_vc : designer freeback fmn destination id -* taglen : length in bits of the tag generated by the auth engine -* md5 (128 bits), sha1 (160), sha224 (224), sha384 (384), -* sha512 (512), Kasumi (32), snow3g (32), gcm (128) -* hmacpad : 1 if hmac padding is already done -*/ -static __inline__ uint64_t -nlm_crypto_form_pkt_desc3(unsigned int designer_vc, unsigned int taglen, - unsigned int arc4_state_save_l3, unsigned int arc4_save_state, - unsigned int hmacpad) -{ - return (left_shift64(designer_vc, 48, 16) | - left_shift64(taglen, 11, 16) | - left_shift64(arc4_state_save_l3, 8, 1) | - left_shift64(arc4_save_state, 6, 1) | - left_shift64(hmacpad, 5, 1)); -} - -/** -* @brief Generate cypto packet descriptor 4 -* @ingroup crypto -* srcfraglen : length of the source fragment(header + data + tail) in bytes -* srcfragaddr : physical address of the srouce fragment -*/ -static __inline__ uint64_t -nlm_crypto_form_pkt_desc4(uint64_t srcfraglen, - unsigned int srcfragaddr ) -{ - return (left_shift64_mask((srcfraglen - 1), 48, 16) | - left_shift64(srcfragaddr, 0, 40)); -} - -/** -* @brief Generate cypto packet descriptor 5 -* @ingroup crypto -* dstfraglen : length of the dst fragment(header + data + tail) in bytes -* chipherout_l3alloc : 1(cipher output is transited through l3 cache) -* cipherclobber : 1 (cipher output will be written as multiples of cachelines, -* no read modify write) -* chiperdst_addr : physical address of the cipher destination address -*/ -static __inline__ uint64_t -nlm_crypto_form_pkt_desc5(unsigned int dstfraglen, - unsigned int cipherout_l3alloc, unsigned int cipherclobber, - uint64_t cipherdst_addr) - -{ - return (left_shift64_mask((dstfraglen - 1), 48, 16) | - left_shift64(cipherout_l3alloc, 46, 1) | - left_shift64(cipherclobber, 41, 1) | - left_shift64(cipherdst_addr, 0, 40)); -} - -/** - * @brief Generate crypto packet fmn message entry 0 - * @ingroup crypto - * freeback_vc: freeback response destination address - * designer_fblen : Designer freeback length, 1 - 4 - * designerdesc_valid : designer desc valid or not - * cipher_keylen : cipher key length in bytes - * ctrldesc_addr : physicall address of the control descriptor - */ -static __inline__ uint64_t -nlm_crypto_form_pkt_fmn_entry0(unsigned int freeback_vc, - unsigned int designer_fblen, unsigned int designerdesc_valid, - unsigned int cipher_keylen, uint64_t cntldesc_addr) -{ - return (left_shift64(freeback_vc, 48, 16) | - left_shift64_mask(designer_fblen - 1, 46, 2) | - left_shift64(designerdesc_valid, 45, 1) | - left_shift64_mask(((cipher_keylen + 7) >> 3), 40, 5) | - left_shift64(cntldesc_addr >> 6, 0, 34)); -} - -/** - * @brief Generate crypto packet fmn message entry 1 - * @ingroup crypto - * arc4load_state : 1 if load state required 0 otherwise - * hash_keylen : hash key length in bytes - * pktdesc_size : packet descriptor size in bytes - * pktdesc_addr : physicall address of the packet descriptor - */ -static __inline__ uint64_t -nlm_crypto_form_pkt_fmn_entry1(unsigned int arc4load_state, - unsigned int hash_keylen, unsigned int pktdesc_size, - uint64_t pktdesc_addr) -{ - return (left_shift64(arc4load_state, 63, 1) | - left_shift64_mask(((hash_keylen + 7) >> 3), 56, 5) | - left_shift64_mask(((pktdesc_size >> 4) - 1), 43, 12) | - left_shift64(pktdesc_addr >> 6, 0, 34)); -} - -static __inline__ int -nlm_crypto_get_hklen_taglen(enum nlm_hash_algo hashalg, - enum nlm_hash_mode hashmode, unsigned int *taglen, unsigned int *hklen) -{ - if (hashalg == NLM_HASH_MD5) { - *taglen = 128; - *hklen = 64; - } else if (hashalg == NLM_HASH_SHA) { - switch (hashmode) { - case NLM_HASH_MODE_SHA1: - *taglen = 160; - *hklen = 64; - break; - case NLM_HASH_MODE_SHA224: - *taglen = 224; - *hklen = 64; - break; - case NLM_HASH_MODE_SHA256: - *taglen = 256; - *hklen = 64; - break; - case NLM_HASH_MODE_SHA384: - *taglen = 384; - *hklen = 128; - break; - case NLM_HASH_MODE_SHA512: - *taglen = 512; - *hklen = 128; - break; - default: - printf("Error : invalid shaid (%s)\n", __func__); - return (-1); - } - } else if (hashalg == NLM_HASH_KASUMI_F9) { - *taglen = 32; - *hklen = 0; - } else if (hashalg == NLM_HASH_SNOW3G_F9) { - *taglen = 32; - *hklen = 0; - } else if (hashmode == NLM_HASH_MODE_XCBC) { - *taglen = 128; - *hklen = 0; - } else if (hashmode == NLM_HASH_MODE_GCM) { - *taglen = 128; - *hklen = 0; - } else if (hashalg == NLM_HASH_BYPASS) { - *taglen = 0; - *hklen = 0; - } else { - printf("Error:Hash alg/mode not found\n"); - return (-1); - } - - /* TODO : Add remaining cases */ - return (0); -} - -/** -* @brief Generate fill cryto control info structure -* @ingroup crypto -* hmac : 1 for hash with hmac -* hashalg: see above, hash_alg enums -* hashmode: see above, hash_mode enums -* cipherhalg: see above, cipher_alg enums -* ciphermode: see above, cipher_mode enums -* -*/ -static __inline__ int -nlm_crypto_fill_pkt_ctrl(struct nlm_crypto_pkt_ctrl *ctrl, unsigned int hmac, - enum nlm_hash_algo hashalg, enum nlm_hash_mode hashmode, - enum nlm_cipher_algo cipheralg, enum nlm_cipher_mode ciphermode, - const unsigned char *cipherkey, unsigned int cipherkeylen, - const unsigned char *hashkey, unsigned int hashkeylen) -{ - unsigned int taglen = 0, hklen = 0; - - ctrl->desc0 = nlm_crypto_form_pkt_ctrl_desc(hmac, hashalg, hashmode, - cipheralg, ciphermode, 0, 0, 0); - memset(ctrl->key, 0, sizeof(ctrl->key)); - if (cipherkey) - memcpy(ctrl->key, cipherkey, cipherkeylen); - if (hashkey) - memcpy((unsigned char *)&ctrl->key[(cipherkeylen + 7) / 8], - hashkey, hashkeylen); - if (nlm_crypto_get_hklen_taglen(hashalg, hashmode, &taglen, &hklen) - < 0) - return (-1); - - ctrl->cipherkeylen = cipherkeylen; - ctrl->hashkeylen = hklen; - ctrl->taglen = taglen; - - /* TODO : add the invalid checks and return error */ - return (0); -} - -/** -* @brief Top level function for generation pkt desc 0 to 3 for cipher auth -* @ingroup crypto -* ctrl : pointer to control structure -* param : pointer to the param structure -* encrypt : 1(for encrypt) 0(for decrypt) -* hash_source : 1(encrypted data is sent to the auth engine) 0(plain data is -* sent to the auth engine) -* ivoff : iv offset from start of data -* ivlen : iv length in bytes -* hashoff : hash offset from start of data -* hashlen : hash length in bytes -* hmacpad : hmac padding required or not, 1 if already padded -* cipheroff : cipher offset from start of data -* cipherlen : cipher length in bytes -* hashdst_addr : hash destination physical address -*/ -static __inline__ void -nlm_crypto_fill_cipher_auth_pkt_param(struct nlm_crypto_pkt_ctrl *ctrl, - struct nlm_crypto_pkt_param *param, unsigned int encrypt, - unsigned int hash_source, unsigned int ivoff, unsigned int ivlen, - unsigned int hashoff, unsigned int hashlen, unsigned int hmacpad, - unsigned int cipheroff, unsigned int cipherlen, unsigned char *hashdst_addr) -{ - param->desc0 = nlm_crypto_form_pkt_desc0(0, hash_source, 1, encrypt, - ivlen, vtophys(hashdst_addr)); - param->desc1 = nlm_crypto_form_pkt_desc1(cipherlen, hashlen); - param->desc2 = nlm_crypto_form_pkt_desc2(ivoff, 0, cipheroff, 0, 0, - hashoff); - param->desc3 = nlm_crypto_form_pkt_desc3(0, ctrl->taglen, 0, 0, - hmacpad); -} - -/** -* @brief Top level function for generation pkt desc 0 to 3 for cipher operation -* @ingroup crypto -* ctrl : pointer to control structure -* param : pointer to the param structure -* encrypt : 1(for encrypt) 0(for decrypt) -* ivoff : iv offset from start of data -* ivlen : iv length in bytes -* cipheroff : cipher offset from start of data -* cipherlen : cipher length in bytes -*/ -static __inline__ void -nlm_crypto_fill_cipher_pkt_param(struct nlm_crypto_pkt_ctrl *ctrl, - struct nlm_crypto_pkt_param *param, unsigned int encrypt, - unsigned int ivoff, unsigned int ivlen, unsigned int cipheroff, - unsigned int cipherlen) -{ - param->desc0 = nlm_crypto_form_pkt_desc0(0, 0, 0, encrypt, ivlen, 0ULL); - param->desc1 = nlm_crypto_form_pkt_desc1(cipherlen, 1); - param->desc2 = nlm_crypto_form_pkt_desc2(ivoff, 0, cipheroff, 0, 0, 0); - param->desc3 = nlm_crypto_form_pkt_desc3(0, ctrl->taglen, 0, 0, 0); -} - -/** -* @brief Top level function for generation pkt desc 0 to 3 for auth operation -* @ingroup crypto -* ctrl : pointer to control structure -* param : pointer to the param structure -* hashoff : hash offset from start of data -* hashlen : hash length in bytes -* hmacpad : hmac padding required or not, 1 if already padded -* hashdst_addr : hash destination physical address -*/ -static __inline__ void -nlm_crypto_fill_auth_pkt_param(struct nlm_crypto_pkt_ctrl *ctrl, - struct nlm_crypto_pkt_param *param, unsigned int hashoff, - unsigned int hashlen, unsigned int hmacpad, unsigned char *hashdst_addr) -{ - param->desc0 = nlm_crypto_form_pkt_desc0(0, 0, 1, 0, 1, - vtophys(hashdst_addr)); - param->desc1 = nlm_crypto_form_pkt_desc1(1, hashlen); - param->desc2 = nlm_crypto_form_pkt_desc2(0, 0, 0, 0, 0, hashoff); - param->desc3 = nlm_crypto_form_pkt_desc3(0, ctrl->taglen, 0, 0, - hmacpad); -} - -static __inline__ unsigned int -nlm_crypto_fill_src_seg(struct nlm_crypto_pkt_param *param, int seg, - unsigned char *input, unsigned int inlen) -{ - unsigned off = 0, len = 0; - unsigned int remlen = inlen; - - for (; remlen > 0;) { - len = remlen > NLM_CRYPTO_MAX_SEG_LEN ? - NLM_CRYPTO_MAX_SEG_LEN : remlen; - param->segment[seg][0] = nlm_crypto_form_pkt_desc4(len, - vtophys(input + off)); - remlen -= len; - off += len; - seg++; - } - return (seg); -} - -static __inline__ unsigned int -nlm_crypto_fill_dst_seg(struct nlm_crypto_pkt_param *param, - int seg, unsigned char *output, unsigned int outlen) -{ - unsigned off = 0, len = 0; - unsigned int remlen = outlen; - - for (; remlen > 0;) { - len = remlen > NLM_CRYPTO_MAX_SEG_LEN ? - NLM_CRYPTO_MAX_SEG_LEN : remlen; - param->segment[seg][1] = nlm_crypto_form_pkt_desc5(len, 1, 0, - vtophys(output + off)); - remlen -= len; - off += len; - seg++; - } - return (seg); -} - -#endif diff --git a/sys/mips/nlm/hal/pcibus.h b/sys/mips/nlm/hal/pcibus.h deleted file mode 100644 index bef79b16858..00000000000 --- a/sys/mips/nlm/hal/pcibus.h +++ /dev/null @@ -1,122 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef __XLP_PCIBUS_H__ -#define __XLP_PCIBUS_H__ - -#define MSI_MIPS_ADDR_BASE 0xfee00000 -/* MSI support */ -#define MSI_MIPS_ADDR_DEST 0x000ff000 -#define MSI_MIPS_ADDR_RH 0x00000008 -#define MSI_MIPS_ADDR_RH_OFF 0x00000000 -#define MSI_MIPS_ADDR_RH_ON 0x00000008 -#define MSI_MIPS_ADDR_DM 0x00000004 -#define MSI_MIPS_ADDR_DM_PHYSICAL 0x00000000 -#define MSI_MIPS_ADDR_DM_LOGICAL 0x00000004 - -/* Fields in data for Intel MSI messages. */ -#define MSI_MIPS_DATA_TRGRMOD 0x00008000 /* Trigger mode */ -#define MSI_MIPS_DATA_TRGREDG 0x00000000 /* edge */ -#define MSI_MIPS_DATA_TRGRLVL 0x00008000 /* level */ - -#define MSI_MIPS_DATA_LEVEL 0x00004000 /* Polarity. */ -#define MSI_MIPS_DATA_DEASSERT 0x00000000 -#define MSI_MIPS_DATA_ASSERT 0x00004000 - -#define MSI_MIPS_DATA_DELMOD 0x00000700 /* Delivery Mode */ -#define MSI_MIPS_DATA_DELFIXED 0x00000000 /* fixed */ -#define MSI_MIPS_DATA_DELLOPRI 0x00000100 /* lowest priority */ - -#define MSI_MIPS_DATA_INTVEC 0x000000ff - -/* PCIE Memory and IO regions */ -#define PCIE_MEM_BASE 0xd0000000ULL -#define PCIE_MEM_LIMIT 0xdfffffffULL -#define PCIE_IO_BASE 0x14000000ULL -#define PCIE_IO_LIMIT 0x15ffffffULL - -#define PCIE_BRIDGE_CMD 0x1 -#define PCIE_BRIDGE_MSI_CAP 0x14 -#define PCIE_BRIDGE_MSI_ADDRL 0x15 -#define PCIE_BRIDGE_MSI_ADDRH 0x16 -#define PCIE_BRIDGE_MSI_DATA 0x17 - -/* XLP Global PCIE configuration space registers */ -#define PCIE_BYTE_SWAP_MEM_BASE 0x247 -#define PCIE_BYTE_SWAP_MEM_LIM 0x248 -#define PCIE_BYTE_SWAP_IO_BASE 0x249 -#define PCIE_BYTE_SWAP_IO_LIM 0x24A -#define PCIE_MSI_STATUS 0x25A -#define PCIE_MSI_EN 0x25B -#define PCIE_INT_EN0 0x261 - -/* PCIE_MSI_EN */ -#define PCIE_MSI_VECTOR_INT_EN 0xFFFFFFFF - -/* PCIE_INT_EN0 */ -#define PCIE_MSI_INT_EN (1 << 9) - -/* XXXJC: Ax workaround */ -#define PCIE_LINK0_IRT 78 - -#if !defined(LOCORE) && !defined(__ASSEMBLY__) - -#define nlm_read_pcie_reg(b, r) nlm_read_reg(b, r) -#define nlm_write_pcie_reg(b, r, v) nlm_write_reg(b, r, v) -#define nlm_get_pcie_base(node, inst) \ - nlm_pcicfg_base(XLP_IO_PCIE_OFFSET(node, inst)) -#define nlm_get_pcie_regbase(node, inst) \ - (nlm_get_pcie_base(node, inst) + XLP_IO_PCI_HDRSZ) - -static __inline int -xlp_pcie_link_irt(int link) -{ - if ((link < 0) || (link > 3)) - return (-1); - - return (PCIE_LINK0_IRT + link); -} - -/* - * Build Intel MSI message and data values from a source. AMD64 systems - * seem to be compatible, so we use the same function for both. - */ -#define MIPS_MSI_ADDR(cpu) \ - (MSI_MIPS_ADDR_BASE | (cpu) << 12 | \ - MSI_MIPS_ADDR_RH_OFF | MSI_MIPS_ADDR_DM_PHYSICAL) - -#define MIPS_MSI_DATA(irq) \ - (MSI_MIPS_DATA_TRGRLVL | MSI_MIPS_DATA_DELFIXED | \ - MSI_MIPS_DATA_ASSERT | (irq)) - -#endif -#endif /* __XLP_PCIBUS_H__ */ diff --git a/sys/mips/nlm/hal/pic.h b/sys/mips/nlm/hal/pic.h deleted file mode 100644 index 3d1cb0bdadf..00000000000 --- a/sys/mips/nlm/hal/pic.h +++ /dev/null @@ -1,312 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef _NLM_HAL_PIC_H -#define _NLM_HAL_PIC_H - -/* PIC Specific registers */ -#define PIC_CTRL 0x00 - -/* PIC control register defines */ -#define PIC_CTRL_ITV 32 /* interrupt timeout value */ -#define PIC_CTRL_ICI 19 /* ICI interrupt timeout enable */ -#define PIC_CTRL_ITE 18 /* interrupt timeout enable */ -#define PIC_CTRL_STE 10 /* system timer interrupt enable */ -#define PIC_CTRL_WWR1 8 /* watchdog 1 wraparound count for reset */ -#define PIC_CTRL_WWR0 6 /* watchdog 0 wraparound count for reset */ -#define PIC_CTRL_WWN1 4 /* watchdog 1 wraparound count for NMI */ -#define PIC_CTRL_WWN0 2 /* watchdog 0 wraparound count for NMI */ -#define PIC_CTRL_WTE 0 /* watchdog timer enable */ - -/* PIC Status register defines */ -#define PIC_ICI_STATUS 33 /* ICI interrupt timeout status */ -#define PIC_ITE_STATUS 32 /* interrupt timeout status */ -#define PIC_STS_STATUS 4 /* System timer interrupt status */ -#define PIC_WNS_STATUS 2 /* NMI status for watchdog timers */ -#define PIC_WIS_STATUS 0 /* Interrupt status for watchdog timers */ - -/* PIC IPI control register offsets */ -#define PIC_IPICTRL_NMI 32 -#define PIC_IPICTRL_RIV 20 /* received interrupt vector */ -#define PIC_IPICTRL_IDB 16 /* interrupt destination base */ -#define PIC_IPICTRL_DTE 0 /* interrupt destination thread enables */ - -/* PIC IRT register offsets */ -#define PIC_IRT_ENABLE 31 -#define PIC_IRT_NMI 29 -#define PIC_IRT_SCH 28 /* Scheduling scheme */ -#define PIC_IRT_RVEC 20 /* Interrupt receive vectors */ -#define PIC_IRT_DT 19 /* Destination type */ -#define PIC_IRT_DB 16 /* Destination base */ -#define PIC_IRT_DTE 0 /* Destination thread enables */ - -#define PIC_BYTESWAP 0x02 -#define PIC_STATUS 0x04 -#define PIC_INTR_TIMEOUT 0x06 -#define PIC_ICI0_INTR_TIMEOUT 0x08 -#define PIC_ICI1_INTR_TIMEOUT 0x0a -#define PIC_ICI2_INTR_TIMEOUT 0x0c -#define PIC_IPI_CTL 0x0e -#define PIC_INT_ACK 0x10 -#define PIC_INT_PENDING0 0x12 -#define PIC_INT_PENDING1 0x14 -#define PIC_INT_PENDING2 0x16 - -#define PIC_WDOG0_MAXVAL 0x18 -#define PIC_WDOG0_COUNT 0x1a -#define PIC_WDOG0_ENABLE0 0x1c -#define PIC_WDOG0_ENABLE1 0x1e -#define PIC_WDOG0_BEATCMD 0x20 -#define PIC_WDOG0_BEAT0 0x22 -#define PIC_WDOG0_BEAT1 0x24 - -#define PIC_WDOG1_MAXVAL 0x26 -#define PIC_WDOG1_COUNT 0x28 -#define PIC_WDOG1_ENABLE0 0x2a -#define PIC_WDOG1_ENABLE1 0x2c -#define PIC_WDOG1_BEATCMD 0x2e -#define PIC_WDOG1_BEAT0 0x30 -#define PIC_WDOG1_BEAT1 0x32 - -#define PIC_WDOG_MAXVAL(i) (PIC_WDOG0_MAXVAL + ((i) ? 7 : 0)) -#define PIC_WDOG_COUNT(i) (PIC_WDOG0_COUNT + ((i) ? 7 : 0)) -#define PIC_WDOG_ENABLE0(i) (PIC_WDOG0_ENABLE0 + ((i) ? 7 : 0)) -#define PIC_WDOG_ENABLE1(i) (PIC_WDOG0_ENABLE1 + ((i) ? 7 : 0)) -#define PIC_WDOG_BEATCMD(i) (PIC_WDOG0_BEATCMD + ((i) ? 7 : 0)) -#define PIC_WDOG_BEAT0(i) (PIC_WDOG0_BEAT0 + ((i) ? 7 : 0)) -#define PIC_WDOG_BEAT1(i) (PIC_WDOG0_BEAT1 + ((i) ? 7 : 0)) - -#define PIC_TIMER0_MAXVAL 0x34 -#define PIC_TIMER1_MAXVAL 0x36 -#define PIC_TIMER2_MAXVAL 0x38 -#define PIC_TIMER3_MAXVAL 0x3a -#define PIC_TIMER4_MAXVAL 0x3c -#define PIC_TIMER5_MAXVAL 0x3e -#define PIC_TIMER6_MAXVAL 0x40 -#define PIC_TIMER7_MAXVAL 0x42 -#define PIC_TIMER_MAXVAL(i) (PIC_TIMER0_MAXVAL + ((i) * 2)) - -#define PIC_TIMER0_COUNT 0x44 -#define PIC_TIMER1_COUNT 0x46 -#define PIC_TIMER2_COUNT 0x48 -#define PIC_TIMER3_COUNT 0x4a -#define PIC_TIMER4_COUNT 0x4c -#define PIC_TIMER5_COUNT 0x4e -#define PIC_TIMER6_COUNT 0x50 -#define PIC_TIMER7_COUNT 0x52 -#define PIC_TIMER_COUNT(i) (PIC_TIMER0_COUNT + ((i) * 2)) - -#define PIC_ITE0_N0_N1 0x54 -#define PIC_ITE1_N0_N1 0x58 -#define PIC_ITE2_N0_N1 0x5c -#define PIC_ITE3_N0_N1 0x60 -#define PIC_ITE4_N0_N1 0x64 -#define PIC_ITE5_N0_N1 0x68 -#define PIC_ITE6_N0_N1 0x6c -#define PIC_ITE7_N0_N1 0x70 -#define PIC_ITE_N0_N1(i) (PIC_ITE0_N0_N1 + ((i) * 4)) - -#define PIC_ITE0_N2_N3 0x56 -#define PIC_ITE1_N2_N3 0x5a -#define PIC_ITE2_N2_N3 0x5e -#define PIC_ITE3_N2_N3 0x62 -#define PIC_ITE4_N2_N3 0x66 -#define PIC_ITE5_N2_N3 0x6a -#define PIC_ITE6_N2_N3 0x6e -#define PIC_ITE7_N2_N3 0x72 -#define PIC_ITE_N2_N3(i) (PIC_ITE0_N2_N3 + ((i) * 4)) - -#define PIC_IRT0 0x74 -#define PIC_IRT(i) (PIC_IRT0 + ((i) * 2)) - -#define TIMER_CYCLES_MAXVAL 0xffffffffffffffffULL - -/* - * IRT Map - */ -#define PIC_IRT_WD_0_INDEX 0 -#define PIC_IRT_WD_1_INDEX 1 -#define PIC_IRT_WD_NMI_0_INDEX 2 -#define PIC_IRT_WD_NMI_1_INDEX 3 -#define PIC_IRT_TIMER_0_INDEX 4 -#define PIC_IRT_TIMER_1_INDEX 5 -#define PIC_IRT_TIMER_2_INDEX 6 -#define PIC_IRT_TIMER_3_INDEX 7 -#define PIC_IRT_TIMER_4_INDEX 8 -#define PIC_IRT_TIMER_5_INDEX 9 -#define PIC_IRT_TIMER_6_INDEX 10 -#define PIC_IRT_TIMER_7_INDEX 11 -#define PIC_IRT_CLOCK_INDEX PIC_IRT_TIMER_7_INDEX -#define PIC_IRT_TIMER_INDEX(num) ((num) + PIC_IRT_TIMER_0_INDEX) - -#define PIC_CLOCK_TIMER 7 - -#if !defined(LOCORE) && !defined(__ASSEMBLY__) - -/* - * Misc - */ -#define PIC_IRT_VALID 1 -#define PIC_LOCAL_SCHEDULING 1 -#define PIC_GLOBAL_SCHEDULING 0 - -#define nlm_read_pic_reg(b, r) nlm_read_reg64(b, r) -#define nlm_write_pic_reg(b, r, v) nlm_write_reg64(b, r, v) -#define nlm_get_pic_pcibase(node) nlm_pcicfg_base(XLP_IO_PIC_OFFSET(node)) -#define nlm_get_pic_regbase(node) (nlm_get_pic_pcibase(node) + XLP_IO_PCI_HDRSZ) - -/* IRT and h/w interrupt routines */ -static inline int -nlm_pic_read_irt(uint64_t base, int irt_index) -{ - return nlm_read_pic_reg(base, PIC_IRT(irt_index)); -} - -static inline void -nlm_pic_send_ipi(uint64_t base, int cpu, int vec, int nmi) -{ - uint64_t ipi; - int node, ncpu; - - node = cpu / 32; - ncpu = cpu & 0x1f; - ipi = ((uint64_t)nmi << 31) | (vec << 20) | (node << 17) | - (1 << (cpu & 0xf)); - if (ncpu > 15) - ipi |= 0x10000; /* Setting bit 16 to select cpus 16-31 */ - - nlm_write_pic_reg(base, PIC_IPI_CTL, ipi); -} - -static inline uint64_t -nlm_pic_read_control(uint64_t base) -{ - return nlm_read_pic_reg(base, PIC_CTRL); -} - -static inline void -nlm_pic_write_control(uint64_t base, uint64_t control) -{ - nlm_write_pic_reg(base, PIC_CTRL, control); -} - -static inline void -nlm_pic_update_control(uint64_t base, uint64_t control) -{ - uint64_t val; - - val = nlm_read_pic_reg(base, PIC_CTRL); - nlm_write_pic_reg(base, PIC_CTRL, control | val); -} - -static inline void -nlm_pic_ack(uint64_t base, int irt_num) -{ - nlm_write_pic_reg(base, PIC_INT_ACK, irt_num); - - /* Ack the Status register for Watchdog & System timers */ - if (irt_num < 12) - nlm_write_pic_reg(base, PIC_STATUS, (1 << irt_num)); -} - -static inline void -nlm_set_irt_to_cpu(uint64_t base, int irt, int cpu) -{ - uint64_t val; - - val = nlm_read_pic_reg(base, PIC_IRT(irt)); - val |= cpu & 0xf; - if (cpu > 15) - val |= 1 << 16; - nlm_write_pic_reg(base, PIC_IRT(irt), val); -} - -static inline void -nlm_pic_write_irt(uint64_t base, int irt_num, int en, int nmi, - int sch, int vec, int dt, int db, int dte) -{ - uint64_t val; - - val = (((uint64_t)en & 0x1) << 31) | ((nmi & 0x1) << 29) | - ((sch & 0x1) << 28) | ((vec & 0x3f) << 20) | - ((dt & 0x1) << 19) | ((db & 0x7) << 16) | - (dte & 0xffff); - - nlm_write_pic_reg(base, PIC_IRT(irt_num), val); -} - -static inline void -nlm_pic_write_irt_direct(uint64_t base, int irt_num, int en, int nmi, - int sch, int vec, int cpu) -{ - nlm_pic_write_irt(base, irt_num, en, nmi, sch, vec, 1, - (cpu >> 4), /* thread group */ - 1 << (cpu & 0xf)); /* thread mask */ -} - -static inline uint64_t -nlm_pic_read_timer(uint64_t base, int timer) -{ - return nlm_read_pic_reg(base, PIC_TIMER_COUNT(timer)); -} - -static inline void -nlm_pic_write_timer(uint64_t base, int timer, uint64_t value) -{ - nlm_write_pic_reg(base, PIC_TIMER_COUNT(timer), value); -} - -static inline void -nlm_pic_set_timer(uint64_t base, int timer, uint64_t value, int irq, int cpu) -{ - uint64_t pic_ctrl; - int en, nmi; - - en = nmi = 0; - if (irq > 0) - en = 1; - else if (irq < 0) { - en = nmi = 1; - irq = -irq; - } - nlm_write_pic_reg(base, PIC_TIMER_MAXVAL(timer), value); - nlm_pic_write_irt_direct(base, PIC_IRT_TIMER_INDEX(timer), - en, nmi, 0, irq, cpu); - - /* enable the timer */ - pic_ctrl = nlm_read_pic_reg(base, PIC_CTRL); - pic_ctrl |= (1 << (PIC_CTRL_STE + timer)); - nlm_write_pic_reg(base, PIC_CTRL, pic_ctrl); -} - -#endif /* __ASSEMBLY__ */ -#endif /* _NLM_HAL_PIC_H */ diff --git a/sys/mips/nlm/hal/poe.h b/sys/mips/nlm/hal/poe.h deleted file mode 100644 index 4c66895ae4f..00000000000 --- a/sys/mips/nlm/hal/poe.h +++ /dev/null @@ -1,352 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __NLM_POE_H__ -#define __NLM_POE_H__ - -/** -* @file_name poe.h -* @author Netlogic Microsystems -* @brief Basic definitions of XLP Packet Order Engine -*/ - -/* POE specific registers */ -#define POE_CL0_ENQ_SPILL_BASE_LO 0x0 -#define POE_CL1_ENQ_SPILL_BASE_LO 0x2 -#define POE_CL2_ENQ_SPILL_BASE_LO 0x4 -#define POE_CL3_ENQ_SPILL_BASE_LO 0x6 -#define POE_CL4_ENQ_SPILL_BASE_LO 0x8 -#define POE_CL5_ENQ_SPILL_BASE_LO 0xa -#define POE_CL6_ENQ_SPILL_BASE_LO 0xc -#define POE_CL7_ENQ_SPILL_BASE_LO 0xe -#define POE_CL0_ENQ_SPILL_BASE_HI 0x1 -#define POE_CL1_ENQ_SPILL_BASE_HI 0x3 -#define POE_CL2_ENQ_SPILL_BASE_HI 0x5 -#define POE_CL3_ENQ_SPILL_BASE_HI 0x7 -#define POE_CL4_ENQ_SPILL_BASE_HI 0x9 -#define POE_CL5_ENQ_SPILL_BASE_HI 0xb -#define POE_CL6_ENQ_SPILL_BASE_HI 0xd -#define POE_CL7_ENQ_SPILL_BASE_HI 0xf -#define POE_CL0_DEQ_SPILL_BASE_LO 0x10 -#define POE_CL1_DEQ_SPILL_BASE_LO 0x12 -#define POE_CL2_DEQ_SPILL_BASE_LO 0x14 -#define POE_CL3_DEQ_SPILL_BASE_LO 0x16 -#define POE_CL4_DEQ_SPILL_BASE_LO 0x18 -#define POE_CL5_DEQ_SPILL_BASE_LO 0x1a -#define POE_CL6_DEQ_SPILL_BASE_LO 0x1c -#define POE_CL7_DEQ_SPILL_BASE_LO 0x1e -#define POE_CL0_DEQ_SPILL_BASE_HI 0x11 -#define POE_CL1_DEQ_SPILL_BASE_HI 0x13 -#define POE_CL2_DEQ_SPILL_BASE_HI 0x15 -#define POE_CL3_DEQ_SPILL_BASE_HI 0x17 -#define POE_CL4_DEQ_SPILL_BASE_HI 0x19 -#define POE_CL5_DEQ_SPILL_BASE_HI 0x1b -#define POE_CL6_DEQ_SPILL_BASE_HI 0x1d -#define POE_CL7_DEQ_SPILL_BASE_HI 0x1f -#define POE_MSG_STORAGE_BASE_ADDR_LO 0x20 -#define POE_MSG_STORAGE_BASE_ADDR_HI 0x21 -#define POE_FBP_BASE_ADDR_LO 0x22 -#define POE_FBP_BASE_ADDR_HI 0x23 -#define POE_CL0_ENQ_SPILL_MAXLINE_LO 0x24 -#define POE_CL1_ENQ_SPILL_MAXLINE_LO 0x25 -#define POE_CL2_ENQ_SPILL_MAXLINE_LO 0x26 -#define POE_CL3_ENQ_SPILL_MAXLINE_LO 0x27 -#define POE_CL4_ENQ_SPILL_MAXLINE_LO 0x28 -#define POE_CL5_ENQ_SPILL_MAXLINE_LO 0x29 -#define POE_CL6_ENQ_SPILL_MAXLINE_LO 0x2a -#define POE_CL7_ENQ_SPILL_MAXLINE_LO 0x2b -#define POE_CL0_ENQ_SPILL_MAXLINE_HI 0x2c -#define POE_CL1_ENQ_SPILL_MAXLINE_HI 0x2d -#define POE_CL2_ENQ_SPILL_MAXLINE_HI 0x2e -#define POE_CL3_ENQ_SPILL_MAXLINE_HI 0x2f -#define POE_CL4_ENQ_SPILL_MAXLINE_HI 0x30 -#define POE_CL5_ENQ_SPILL_MAXLINE_HI 0x31 -#define POE_CL6_ENQ_SPILL_MAXLINE_HI 0x32 -#define POE_CL7_ENQ_SPILL_MAXLINE_HI 0x33 -#define POE_MAX_FLOW_MSG0 0x40 -#define POE_MAX_FLOW_MSG1 0x41 -#define POE_MAX_FLOW_MSG2 0x42 -#define POE_MAX_FLOW_MSG3 0x43 -#define POE_MAX_FLOW_MSG4 0x44 -#define POE_MAX_FLOW_MSG5 0x45 -#define POE_MAX_FLOW_MSG6 0x46 -#define POE_MAX_FLOW_MSG7 0x47 -#define POE_MAX_MSG_CL0 0x48 -#define POE_MAX_MSG_CL1 0x49 -#define POE_MAX_MSG_CL2 0x4a -#define POE_MAX_MSG_CL3 0x4b -#define POE_MAX_MSG_CL4 0x4c -#define POE_MAX_MSG_CL5 0x4d -#define POE_MAX_MSG_CL6 0x4e -#define POE_MAX_MSG_CL7 0x4f -#define POE_MAX_LOC_BUF_STG_CL0 0x50 -#define POE_MAX_LOC_BUF_STG_CL1 0x51 -#define POE_MAX_LOC_BUF_STG_CL2 0x52 -#define POE_MAX_LOC_BUF_STG_CL3 0x53 -#define POE_MAX_LOC_BUF_STG_CL4 0x54 -#define POE_MAX_LOC_BUF_STG_CL5 0x55 -#define POE_MAX_LOC_BUF_STG_CL6 0x56 -#define POE_MAX_LOC_BUF_STG_CL7 0x57 -#define POE_ENQ_MSG_COUNT0_SIZE 0x58 -#define POE_ENQ_MSG_COUNT1_SIZE 0x59 -#define POE_ENQ_MSG_COUNT2_SIZE 0x5a -#define POE_ENQ_MSG_COUNT3_SIZE 0x5b -#define POE_ENQ_MSG_COUNT4_SIZE 0x5c -#define POE_ENQ_MSG_COUNT5_SIZE 0x5d -#define POE_ENQ_MSG_COUNT6_SIZE 0x5e -#define POE_ENQ_MSG_COUNT7_SIZE 0x5f -#define POE_ERR_MSG_DESCRIP_LO0 0x60 -#define POE_ERR_MSG_DESCRIP_LO1 0x62 -#define POE_ERR_MSG_DESCRIP_LO2 0x64 -#define POE_ERR_MSG_DESCRIP_LO3 0x66 -#define POE_ERR_MSG_DESCRIP_HI0 0x61 -#define POE_ERR_MSG_DESCRIP_HI1 0x63 -#define POE_ERR_MSG_DESCRIP_HI2 0x65 -#define POE_ERR_MSG_DESCRIP_HI3 0x67 -#define POE_OOO_MSG_CNT_LO 0x68 -#define POE_IN_ORDER_MSG_CNT_LO 0x69 -#define POE_LOC_BUF_STOR_CNT_LO 0x6a -#define POE_EXT_BUF_STOR_CNT_LO 0x6b -#define POE_LOC_BUF_ALLOC_CNT_LO 0x6c -#define POE_EXT_BUF_ALLOC_CNT_LO 0x6d -#define POE_OOO_MSG_CNT_HI 0x6e -#define POE_IN_ORDER_MSG_CNT_HI 0x6f -#define POE_LOC_BUF_STOR_CNT_HI 0x70 -#define POE_EXT_BUF_STOR_CNT_HI 0x71 -#define POE_LOC_BUF_ALLOC_CNT_HI 0x72 -#define POE_EXT_BUF_ALLOC_CNT_HI 0x73 -#define POE_MODE_ERR_FLOW_ID 0x74 -#define POE_STATISTICS_ENABLE 0x75 -#define POE_MAX_SIZE_FLOW 0x76 -#define POE_MAX_SIZE 0x77 -#define POE_FBP_SP 0x78 -#define POE_FBP_SP_EN 0x79 -#define POE_LOC_ALLOC_EN 0x7a -#define POE_EXT_ALLOC_EN 0x7b -#define POE_DISTR_0_DROP_CNT 0xc0 -#define POE_DISTR_1_DROP_CNT 0xc1 -#define POE_DISTR_2_DROP_CNT 0xc2 -#define POE_DISTR_3_DROP_CNT 0xc3 -#define POE_DISTR_4_DROP_CNT 0xc4 -#define POE_DISTR_5_DROP_CNT 0xc5 -#define POE_DISTR_6_DROP_CNT 0xc6 -#define POE_DISTR_7_DROP_CNT 0xc7 -#define POE_DISTR_8_DROP_CNT 0xc8 -#define POE_DISTR_9_DROP_CNT 0xc9 -#define POE_DISTR_10_DROP_CNT 0xca -#define POE_DISTR_11_DROP_CNT 0xcb -#define POE_DISTR_12_DROP_CNT 0xcc -#define POE_DISTR_13_DROP_CNT 0xcd -#define POE_DISTR_14_DROP_CNT 0xce -#define POE_DISTR_15_DROP_CNT 0xcf -#define POE_CLASS_0_DROP_CNT 0xd0 -#define POE_CLASS_1_DROP_CNT 0xd1 -#define POE_CLASS_2_DROP_CNT 0xd2 -#define POE_CLASS_3_DROP_CNT 0xd3 -#define POE_CLASS_4_DROP_CNT 0xd4 -#define POE_CLASS_5_DROP_CNT 0xd5 -#define POE_CLASS_6_DROP_CNT 0xd6 -#define POE_CLASS_7_DROP_CNT 0xd7 -#define POE_DISTR_C0_DROP_CNT 0xd8 -#define POE_DISTR_C1_DROP_CNT 0xd9 -#define POE_DISTR_C2_DROP_CNT 0xda -#define POE_DISTR_C3_DROP_CNT 0xdb -#define POE_DISTR_C4_DROP_CNT 0xdc -#define POE_DISTR_C5_DROP_CNT 0xdd -#define POE_DISTR_C6_DROP_CNT 0xde -#define POE_DISTR_C7_DROP_CNT 0xdf -#define POE_CPU_DROP_CNT 0xe0 -#define POE_MAX_FLOW_DROP_CNT 0xe1 -#define POE_INTERRUPT_VEC 0x140 -#define POE_INTERRUPT_MASK 0x141 -#define POE_FATALERR_MASK 0x142 -#define POE_IDI_CFG 0x143 -#define POE_TIMEOUT_VALUE 0x144 -#define POE_CACHE_ALLOC_EN 0x145 -#define POE_FBP_ECC_ERR_CNT 0x146 -#define POE_MSG_STRG_ECC_ERR_CNT 0x147 -#define POE_FID_INFO_ECC_ERR_CNT 0x148 -#define POE_MSG_INFO_ECC_ERR_CNT 0x149 -#define POE_LL_ECC_ERR_CNT 0x14a -#define POE_SIZE_ECC_ERR_CNT 0x14b -#define POE_FMN_TXCR_ECC_ERR_CNT 0x14c -#define POE_ENQ_INSPIL_ECC_ERR_CNT 0x14d -#define POE_ENQ_OUTSPIL_ECC_ERR_CNT 0x14e -#define POE_DEQ_OUTSPIL_ECC_ERR_CNT 0x14f -#define POE_ENQ_MSG_SENT 0x150 -#define POE_ENQ_MSG_CNT 0x151 -#define POE_FID_RDATA 0x152 -#define POE_FID_WDATA 0x153 -#define POE_FID_CMD 0x154 -#define POE_FID_ADDR 0x155 -#define POE_MSG_INFO_CMD 0x156 -#define POE_MSG_INFO_ADDR 0x157 -#define POE_MSG_INFO_RDATA 0x158 -#define POE_LL_CMD 0x159 -#define POE_LL_ADDR 0x15a -#define POE_LL_RDATA 0x15b -#define POE_MSG_STG_CMD 0x15c -#define POE_MSG_STG_ADDR 0x15d -#define POE_MSG_STG_RDATA 0x15e -#define POE_DISTR_THRESHOLD_0 0x1c0 -#define POE_DISTR_THRESHOLD_1 0x1c1 -#define POE_DISTR_THRESHOLD_2 0x1c2 -#define POE_DISTR_THRESHOLD_3 0x1c3 -#define POE_DISTR_THRESHOLD_4 0x1c4 -#define POE_DISTR_THRESHOLD(i) (0x1c0 + (i)) -#define POE_DISTR_EN 0x1c5 -#define POE_ENQ_SPILL_THOLD 0x1c8 -#define POE_DEQ_SPILL_THOLD 0x1c9 -#define POE_DEQ_SPILL_TIMER 0x1ca -#define POE_DISTR_CLASS_DROP_EN 0x1cb -#define POE_DISTR_VEC_DROP_EN 0x1cc -#define POE_DISTR_DROP_TIMER 0x1cd -#define POE_ERROR_LOG_W0 0x1ce -#define POE_ERROR_LOG_W1 0x1cf -#define POE_ERROR_LOG_W2 0x1d0 -#define POE_ERR_INJ_CTRL0 0x1d1 -#define POE_TX_TIMER 0x1d4 - -#define NUM_DIST_VEC 16 -#define NUM_WORDS_PER_DV 16 -#define MAX_DV_TBL_ENTRIES (NUM_DIST_VEC * NUM_WORDS_PER_DV) -#define POE_DIST_THRESHOLD_VAL 0xa - -/* - * POE distribution vectors - * - * Each vector is 512 bit with msb indicating vc 512 and lsb indicating vc 0 - * 512-bit-vector is specified as 16 32-bit words. - * Left most word has the vc range 511-479 right most word has vc range 31 - 0 - * Each word has the MSB select higer vc number and LSB select lower vc num - */ -#define POE_DISTVECT_BASE 0x100 -#define POE_DISTVECT(vec) (POE_DISTVECT_BASE + 16 * (vec)) -#define POE_DISTVECT_OFFSET(node,cpu) (4 * (3 - (node)) + (3 - (cpu)/8)) -#define POE_DISTVECT_SHIFT(node,cpu) (((cpu) % 8 ) * 4) - -#if !defined(LOCORE) && !defined(__ASSEMBLY__) - -#define nlm_read_poe_reg(b, r) nlm_read_reg(b, r) -#define nlm_write_poe_reg(b, r, v) nlm_write_reg(b, r, v) -#define nlm_read_poedv_reg(b, r) nlm_read_reg_xkphys(b, r) -#define nlm_write_poedv_reg(b, r, v) nlm_write_reg_xkphys(b, r, v) -#define nlm_get_poe_pcibase(node) \ - nlm_pcicfg_base(XLP_IO_POE_OFFSET(node)) -#define nlm_get_poe_regbase(node) \ - (nlm_get_poe_pcibase(node) + XLP_IO_PCI_HDRSZ) -#define nlm_get_poedv_regbase(node) \ - nlm_xkphys_map_pcibar0(nlm_get_poe_pcibase(node)) - -static __inline int -nlm_poe_max_flows(uint64_t poe_pcibase) -{ - return (nlm_read_reg(poe_pcibase, XLP_PCI_DEVINFO_REG0)); -} - -/* - * Helper function, calculate the distribution vector - * cm0, cm1, cm2, cm3 : CPU masks for nodes 0..3 - * thr_vcmask: destination VCs for a thread - */ -static __inline void -nlm_calc_poe_distvec(uint32_t cm0, uint32_t cm1, uint32_t cm2, uint32_t cm3, - uint32_t thr_vcmask, uint32_t *distvec) -{ - uint32_t cpumask = 0, val; - int i, cpu, node, startcpu, index; - - thr_vcmask &= 0xf; - for (node = 0; node < XLP_MAX_NODES; node++) { - switch (node) { - case 0: cpumask = cm0; break; - case 1: cpumask = cm1; break; - case 2: cpumask = cm2; break; - case 3: cpumask = cm3; break; - } - - for (i = 0; i < 4; i++) { - val = 0; - startcpu = 31 - i * 8; - for (cpu = startcpu; cpu >= startcpu - 7; cpu--) { - val <<= 4; - if (cpumask & (1U << cpu)) - val |= thr_vcmask; - } - index = POE_DISTVECT_OFFSET(node, startcpu); - distvec[index] = val; - } - } -} - -static __inline int -nlm_write_poe_distvec(uint64_t poedv_base, int vec, uint32_t *distvec) -{ - uint32_t reg; - int i; - - if (vec < 0 || vec >= NUM_DIST_VEC) - return (-1); - - for (i = 0; i < NUM_WORDS_PER_DV; i++) { - reg = POE_DISTVECT(vec) + i; - nlm_write_poedv_reg(poedv_base, reg, distvec[i]); - } - - return (0); -} - -static __inline void -nlm_config_poe(uint64_t poe_base, uint64_t poedv_base) -{ - uint32_t zerodv[NUM_WORDS_PER_DV]; - int i; - - /* First disable distribution vector logic */ - nlm_write_poe_reg(poe_base, POE_DISTR_EN, 0); - - memset(zerodv, 0, sizeof(zerodv)); - for (i = 0; i < NUM_DIST_VEC; i++) - nlm_write_poe_distvec(poedv_base, i, zerodv); - - /* set the threshold */ - for (i = 0; i < 5; i++) - nlm_write_poe_reg(poe_base, POE_DISTR_THRESHOLD(i), - POE_DIST_THRESHOLD_VAL); - - nlm_write_poe_reg(poe_base, POE_DISTR_EN, 1); - - /* always enable local message store */ - nlm_write_poe_reg(poe_base, POE_LOC_ALLOC_EN, 1); - - nlm_write_poe_reg(poe_base, POE_TX_TIMER, 0x3); -} -#endif /* !(LOCORE) && !(__ASSEMBLY__) */ -#endif diff --git a/sys/mips/nlm/hal/sgmii.h b/sys/mips/nlm/hal/sgmii.h deleted file mode 100644 index 175e010329d..00000000000 --- a/sys/mips/nlm/hal/sgmii.h +++ /dev/null @@ -1,217 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __NLM_SGMII_H__ -#define __NLM_SGMII_H__ - -/** -* @file_name sgmii.h -* @author Netlogic Microsystems -* @brief Basic definitions of XLP SGMII ports -*/ - -#define SGMII_MAC_CONF1(block, i) NAE_REG(block, i, 0x00) -#define SGMII_MAC_CONF2(block, i) NAE_REG(block, i, 0x01) -#define SGMII_IPG_IFG(block, i) NAE_REG(block, i, 0x02) -#define SGMII_HLF_DUP(block, i) NAE_REG(block, i, 0x03) -#define SGMII_MAX_FRAME(block, i) NAE_REG(block, i, 0x04) -#define SGMII_TEST(block, i) NAE_REG(block, i, 0x07) -#define SGMII_MIIM_CONF(block, i) NAE_REG(block, i, 0x08) -#define SGMII_MIIM_CMD(block, i) NAE_REG(block, i, 0x09) -#define SGMII_MIIM_ADDR(block, i) NAE_REG(block, i, 0x0a) -#define SGMII_MIIM_CTRL(block, i) NAE_REG(block, i, 0x0b) -#define SGMII_MIIM_STAT(block, i) NAE_REG(block, i, 0x0c) -#define SGMII_MIIM_IND(block, i) NAE_REG(block, i, 0x0d) -#define SGMII_IO_CTRL(block, i) NAE_REG(block, i, 0x0e) -#define SGMII_IO_STAT(block, i) NAE_REG(block, i, 0x0f) -#define SGMII_STATS_MLR(block, i) NAE_REG(block, i, 0x1f) -#define SGMII_STATS_TR64(block, i) NAE_REG(block, i, 0x20) -#define SGMII_STATS_TR127(block, i) NAE_REG(block, i, 0x21) -#define SGMII_STATS_TR255(block, i) NAE_REG(block, i, 0x22) -#define SGMII_STATS_TR511(block, i) NAE_REG(block, i, 0x23) -#define SGMII_STATS_TR1K(block, i) NAE_REG(block, i, 0x24) -#define SGMII_STATS_TRMAX(block, i) NAE_REG(block, i, 0x25) -#define SGMII_STATS_TRMGV(block, i) NAE_REG(block, i, 0x26) -#define SGMII_STATS_RBYT(block, i) NAE_REG(block, i, 0x27) -#define SGMII_STATS_RPKT(block, i) NAE_REG(block, i, 0x28) -#define SGMII_STATS_RFCS(block, i) NAE_REG(block, i, 0x29) -#define SGMII_STATS_RMCA(block, i) NAE_REG(block, i, 0x2a) -#define SGMII_STATS_RBCA(block, i) NAE_REG(block, i, 0x2b) -#define SGMII_STATS_RXCF(block, i) NAE_REG(block, i, 0x2c) -#define SGMII_STATS_RXPF(block, i) NAE_REG(block, i, 0x2d) -#define SGMII_STATS_RXUO(block, i) NAE_REG(block, i, 0x2e) -#define SGMII_STATS_RALN(block, i) NAE_REG(block, i, 0x2f) -#define SGMII_STATS_RFLR(block, i) NAE_REG(block, i, 0x30) -#define SGMII_STATS_RCDE(block, i) NAE_REG(block, i, 0x31) -#define SGMII_STATS_RCSE(block, i) NAE_REG(block, i, 0x32) -#define SGMII_STATS_RUND(block, i) NAE_REG(block, i, 0x33) -#define SGMII_STATS_ROVR(block, i) NAE_REG(block, i, 0x34) -#define SGMII_STATS_RFRG(block, i) NAE_REG(block, i, 0x35) -#define SGMII_STATS_RJBR(block, i) NAE_REG(block, i, 0x36) -#define SGMII_STATS_TBYT(block, i) NAE_REG(block, i, 0x38) -#define SGMII_STATS_TPKT(block, i) NAE_REG(block, i, 0x39) -#define SGMII_STATS_TMCA(block, i) NAE_REG(block, i, 0x3a) -#define SGMII_STATS_TBCA(block, i) NAE_REG(block, i, 0x3b) -#define SGMII_STATS_TXPF(block, i) NAE_REG(block, i, 0x3c) -#define SGMII_STATS_TDFR(block, i) NAE_REG(block, i, 0x3d) -#define SGMII_STATS_TEDF(block, i) NAE_REG(block, i, 0x3e) -#define SGMII_STATS_TSCL(block, i) NAE_REG(block, i, 0x3f) -#define SGMII_STATS_TMCL(block, i) NAE_REG(block, i, 0x40) -#define SGMII_STATS_TLCL(block, i) NAE_REG(block, i, 0x41) -#define SGMII_STATS_TXCL(block, i) NAE_REG(block, i, 0x42) -#define SGMII_STATS_TNCL(block, i) NAE_REG(block, i, 0x43) -#define SGMII_STATS_TJBR(block, i) NAE_REG(block, i, 0x46) -#define SGMII_STATS_TFCS(block, i) NAE_REG(block, i, 0x47) -#define SGMII_STATS_TXCF(block, i) NAE_REG(block, i, 0x48) -#define SGMII_STATS_TOVR(block, i) NAE_REG(block, i, 0x49) -#define SGMII_STATS_TUND(block, i) NAE_REG(block, i, 0x4a) -#define SGMII_STATS_TFRG(block, i) NAE_REG(block, i, 0x4b) -#define SGMII_STATS_CAR1(block, i) NAE_REG(block, i, 0x4c) -#define SGMII_STATS_CAR2(block, i) NAE_REG(block, i, 0x4d) -#define SGMII_STATS_CAM1(block, i) NAE_REG(block, i, 0x4e) -#define SGMII_STATS_CAM2(block, i) NAE_REG(block, i, 0x4f) -#define SGMII_MAC_ADDR0_LO(block, i) NAE_REG(block, i, 0x50) -#define SGMII_MAC_ADDR0_HI(block, i) NAE_REG(block, i, 0x51) -#define SGMII_MAC_ADDR1_LO(block, i) NAE_REG(block, i, 0x52) -#define SGMII_MAC_ADDR1_HI(block, i) NAE_REG(block, i, 0x53) -#define SGMII_MAC_ADDR2_LO(block, i) NAE_REG(block, i, 0x54) -#define SGMII_MAC_ADDR2_HI(block, i) NAE_REG(block, i, 0x55) -#define SGMII_MAC_ADDR3_LO(block, i) NAE_REG(block, i, 0x56) -#define SGMII_MAC_ADDR3_HI(block, i) NAE_REG(block, i, 0x57) -#define SGMII_MAC_ADDR_MASK0_LO(block, i) NAE_REG(block, i, 0x58) -#define SGMII_MAC_ADDR_MASK0_HI(block, i) NAE_REG(block, i, 0x59) -#define SGMII_MAC_ADDR_MASK1_LO(block, i) NAE_REG(block, i, 0x5a) -#define SGMII_MAC_ADDR_MASK1_HI(block, i) NAE_REG(block, i, 0x5b) -#define SGMII_MAC_FILTER_CONFIG(block, i) NAE_REG(block, i, 0x5c) -#define SGMII_HASHTBL_VEC_B31_0(block, i) NAE_REG(block, i, 0x60) -#define SGMII_HASHTBL_VEC_B63_32(block, i) NAE_REG(block, i, 0x61) -#define SGMII_HASHTBL_VEC_B95_64(block, i) NAE_REG(block, i, 0x62) -#define SGMII_HASHTBL_VEC_B127_96(block, i) NAE_REG(block, i, 0x63) -#define SGMII_HASHTBL_VEC_B159_128(block, i) NAE_REG(block, i, 0x64) -#define SGMII_HASHTBL_VEC_B191_160(block, i) NAE_REG(block, i, 0x65) -#define SGMII_HASHTBL_VEC_B223_192(block, i) NAE_REG(block, i, 0x66) -#define SGMII_HASHTBL_VEC_B255_224(block, i) NAE_REG(block, i, 0x67) -#define SGMII_HASHTBL_VEC_B287_256(block, i) NAE_REG(block, i, 0x68) -#define SGMII_HASHTBL_VEC_B319_288(block, i) NAE_REG(block, i, 0x69) -#define SGMII_HASHTBL_VEC_B351_320(block, i) NAE_REG(block, i, 0x6a) -#define SGMII_HASHTBL_VEC_B383_352(block, i) NAE_REG(block, i, 0x6b) -#define SGMII_HASHTBL_VEC_B415_384(block, i) NAE_REG(block, i, 0x6c) -#define SGMII_HASHTBL_VEC_B447_416(block, i) NAE_REG(block, i, 0x6d) -#define SGMII_HASHTBL_VEC_B479_448(block, i) NAE_REG(block, i, 0x6e) -#define SGMII_HASHTBL_VEC_B511_480(block, i) NAE_REG(block, i, 0x6f) - -#define SGMII_NETIOR_VLANTYPE_FILTER(block, i) NAE_REG(block, i, 0x76) -#define SGMII_NETIOR_RXDROP_CNTR(block, i) NAE_REG(block, i, 0x77) -#define SGMII_NETIOR_PAUSE_QUANTAMULT(block, i) NAE_REG(block, i, 0x78) -#define SGMII_NETIOR_MAC_CTRL_OPCODE(block, i) NAE_REG(block, i, 0x79) -#define SGMII_NETIOR_MAC_DA_H(block, i) NAE_REG(block, i, 0x7a) -#define SGMII_NETIOR_MAC_DA_L(block, i) NAE_REG(block, i, 0x7b) -#define SGMII_NET_IFACE_CTRL3(block, i) NAE_REG(block, i, 0x7c) -#define SGMII_NETIOR_GMAC_STAT(block, i) NAE_REG(block, i, 0x7d) -#define SGMII_NET_IFACE_CTRL2(block, i) NAE_REG(block, i, 0x7e) -#define SGMII_NET_IFACE_CTRL(block, i) NAE_REG(block, i, 0x7f) - -#if !defined(LOCORE) && !defined(__ASSEMBLY__) -/* speed */ -enum nlm_sgmii_speed { - NLM_SGMII_SPEED_10, - NLM_SGMII_SPEED_100, - NLM_SGMII_SPEED_1000, - NLM_SGMII_SPEED_RSVD -}; - -/* duplexity */ -enum nlm_sgmii_duplex_mode { - NLM_SGMII_DUPLEX_AUTO, - NLM_SGMII_DUPLEX_HALF, - NLM_SGMII_DUPLEX_FULL -}; - -/* stats */ -enum { - nlm_sgmii_stats_mlr, - nlm_sgmii_stats_tr64, - nlm_sgmii_stats_tr127, - nlm_sgmii_stats_tr255, - nlm_sgmii_stats_tr511, - nlm_sgmii_stats_tr1k, - nlm_sgmii_stats_trmax, - nlm_sgmii_stats_trmgv, - nlm_sgmii_stats_rbyt, - nlm_sgmii_stats_rpkt, - nlm_sgmii_stats_rfcs, - nlm_sgmii_stats_rmca, - nlm_sgmii_stats_rbca, - nlm_sgmii_stats_rxcf, - nlm_sgmii_stats_rxpf, - nlm_sgmii_stats_rxuo, - nlm_sgmii_stats_raln, - nlm_sgmii_stats_rflr, - nlm_sgmii_stats_rcde, - nlm_sgmii_stats_rcse, - nlm_sgmii_stats_rund, - nlm_sgmii_stats_rovr, - nlm_sgmii_stats_rfrg, - nlm_sgmii_stats_rjbr, - nlm_sgmii_stats_rdummy, /* not used */ - nlm_sgmii_stats_tbyt, - nlm_sgmii_stats_tpkt, - nlm_sgmii_stats_tmca, - nlm_sgmii_stats_tbca, - nlm_sgmii_stats_txpf, - nlm_sgmii_stats_tdfr, - nlm_sgmii_stats_tedf, - nlm_sgmii_stats_tscl, - nlm_sgmii_stats_tmcl, - nlm_sgmii_stats_tlcl, - nlm_sgmii_stats_txcl, - nlm_sgmii_stats_tncl, - nlm_sgmii_stats_tjbr, - nlm_sgmii_stats_tfcs, - nlm_sgmii_stats_txcf, - nlm_sgmii_stats_tovr, - nlm_sgmii_stats_tund, - nlm_sgmii_stats_tfrg, - nlm_sgmii_stats_car1, - nlm_sgmii_stats_car2, - nlm_sgmii_stats_cam1, - nlm_sgmii_stats_cam2 -}; - -void nlm_configure_sgmii_interface(uint64_t, int, int, int, int); -void nlm_sgmii_pcs_init(uint64_t, uint32_t); -void nlm_nae_setup_mac(uint64_t, int, int, int, int, int, int, int); -void nlm_nae_setup_rx_mode_sgmii(uint64_t, int, int, int, int, int, - int, int); -void nlm_nae_setup_mac_addr_sgmii(uint64_t, int, int, int, uint8_t *); - -#endif /* !(LOCORE) && !(__ASSEMBLY__) */ - -#endif diff --git a/sys/mips/nlm/hal/sys.h b/sys/mips/nlm/hal/sys.h deleted file mode 100644 index 9fbf4699861..00000000000 --- a/sys/mips/nlm/hal/sys.h +++ /dev/null @@ -1,160 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef __NLM_HAL_SYS_H__ -#define __NLM_HAL_SYS_H__ - -/** -* @file_name sys.h -* @author Netlogic Microsystems -* @brief HAL for System configuration registers -*/ -#define SYS_CHIP_RESET 0x00 -#define SYS_POWER_ON_RESET_CFG 0x01 -#define SYS_EFUSE_DEVICE_CFG_STATUS0 0x02 -#define SYS_EFUSE_DEVICE_CFG_STATUS1 0x03 -#define SYS_EFUSE_DEVICE_CFG_STATUS2 0x04 -#define SYS_EFUSE_DEVICE_CFG3 0x05 -#define SYS_EFUSE_DEVICE_CFG4 0x06 -#define SYS_EFUSE_DEVICE_CFG5 0x07 -#define SYS_EFUSE_DEVICE_CFG6 0x08 -#define SYS_EFUSE_DEVICE_CFG7 0x09 -#define SYS_PLL_CTRL 0x0a -#define SYS_CPU_RESET 0x0b -#define SYS_CPU_NONCOHERENT_MODE 0x0d -#define SYS_CORE_DFS_DIS_CTRL 0x0e -#define SYS_CORE_DFS_RST_CTRL 0x0f -#define SYS_CORE_DFS_BYP_CTRL 0x10 -#define SYS_CORE_DFS_PHA_CTRL 0x11 -#define SYS_CORE_DFS_DIV_INC_CTRL 0x12 -#define SYS_CORE_DFS_DIV_DEC_CTRL 0x13 -#define SYS_CORE_DFS_DIV_VALUE 0x14 -#define SYS_RESET 0x15 -#define SYS_DFS_DIS_CTRL 0x16 -#define SYS_DFS_RST_CTRL 0x17 -#define SYS_DFS_BYP_CTRL 0x18 -#define SYS_DFS_DIV_INC_CTRL 0x19 -#define SYS_DFS_DIV_DEC_CTRL 0x1a -#define SYS_DFS_DIV_VALUE0 0x1b -#define SYS_DFS_DIV_VALUE1 0x1c -#define SYS_SENSE_AMP_DLY 0x1d -#define SYS_SOC_SENSE_AMP_DLY 0x1e -#define SYS_CTRL0 0x1f -#define SYS_CTRL1 0x20 -#define SYS_TIMEOUT_BS1 0x21 -#define SYS_BYTE_SWAP 0x22 -#define SYS_VRM_VID 0x23 -#define SYS_PWR_RAM_CMD 0x24 -#define SYS_PWR_RAM_ADDR 0x25 -#define SYS_PWR_RAM_DATA0 0x26 -#define SYS_PWR_RAM_DATA1 0x27 -#define SYS_PWR_RAM_DATA2 0x28 -#define SYS_PWR_UCODE 0x29 -#define SYS_CPU0_PWR_STATUS 0x2a -#define SYS_CPU1_PWR_STATUS 0x2b -#define SYS_CPU2_PWR_STATUS 0x2c -#define SYS_CPU3_PWR_STATUS 0x2d -#define SYS_CPU4_PWR_STATUS 0x2e -#define SYS_CPU5_PWR_STATUS 0x2f -#define SYS_CPU6_PWR_STATUS 0x30 -#define SYS_CPU7_PWR_STATUS 0x31 -#define SYS_STATUS 0x32 -#define SYS_INT_POL 0x33 -#define SYS_INT_TYPE 0x34 -#define SYS_INT_STATUS 0x35 -#define SYS_INT_MASK0 0x36 -#define SYS_INT_MASK1 0x37 -#define SYS_UCO_S_ECC 0x38 -#define SYS_UCO_M_ECC 0x39 -#define SYS_UCO_ADDR 0x3a -#define SYS_PLL_DFS_BYP_CTRL 0x3a /* Bx stepping */ -#define SYS_UCO_INSTR 0x3b -#define SYS_MEM_BIST0 0x3c -#define SYS_MEM_BIST1 0x3d -#define SYS_PLL_DFS_DIV_VALUE 0x3d /* Bx stepping */ -#define SYS_MEM_BIST2 0x3e -#define SYS_MEM_BIST3 0x3f -#define SYS_MEM_BIST4 0x40 -#define SYS_MEM_BIST5 0x41 -#define SYS_MEM_BIST6 0x42 -#define SYS_MEM_BIST7 0x43 -#define SYS_MEM_BIST8 0x44 -#define SYS_MEM_BIST9 0x45 -#define SYS_MEM_BIST10 0x46 -#define SYS_MEM_BIST11 0x47 -#define SYS_MEM_BIST12 0x48 -#define SYS_SCRTCH0 0x49 -#define SYS_SCRTCH1 0x4a -#define SYS_SCRTCH2 0x4b -#define SYS_SCRTCH3 0x4c - -#if !defined(LOCORE) && !defined(__ASSEMBLY__) - -#define nlm_read_sys_reg(b, r) nlm_read_reg(b, r) -#define nlm_write_sys_reg(b, r, v) nlm_write_reg(b, r, v) -#define nlm_get_sys_pcibase(node) nlm_pcicfg_base(XLP_IO_SYS_OFFSET(node)) -#define nlm_get_sys_regbase(node) (nlm_get_sys_pcibase(node) + XLP_IO_PCI_HDRSZ) - -enum { - /* Don't change order and it must start from zero */ - DFS_DEVICE_NAE = 0, - DFS_DEVICE_SAE, - DFS_DEVICE_RSA, - DFS_DEVICE_DTRE, - DFS_DEVICE_CMP, - DFS_DEVICE_KBP, - DFS_DEVICE_DMC, - DFS_DEVICE_NAND, - DFS_DEVICE_MMC, - DFS_DEVICE_NOR, - DFS_DEVICE_CORE, - DFS_DEVICE_REGEX_SLOW, - DFS_DEVICE_REGEX_FAST, - DFS_DEVICE_SATA, - INVALID_DFS_DEVICE = 0xFF -}; - -static __inline -void nlm_sys_enable_block(uint64_t sys_base, int block) -{ - uint32_t dfsdis, mask; - - mask = 1 << block; - dfsdis = nlm_read_sys_reg(sys_base, SYS_DFS_DIS_CTRL); - if ((dfsdis & mask) == 0) - return; /* already enabled, nothing to do */ - dfsdis &= ~mask; - nlm_write_sys_reg(sys_base, SYS_DFS_DIS_CTRL, dfsdis); -} - -#endif -#endif diff --git a/sys/mips/nlm/hal/uart.h b/sys/mips/nlm/hal/uart.h deleted file mode 100644 index 5a4646a75c5..00000000000 --- a/sys/mips/nlm/hal/uart.h +++ /dev/null @@ -1,189 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef __XLP_HAL_UART_H__ -#define __XLP_HAL_UART_H__ - -/* UART Specific registers */ -#define UART_RX_DATA 0x00 -#define UART_TX_DATA 0x00 - -#define UART_INT_EN 0x01 -#define UART_INT_ID 0x02 -#define UART_FIFO_CTL 0x02 -#define UART_LINE_CTL 0x03 -#define UART_MODEM_CTL 0x04 -#define UART_LINE_STS 0x05 -#define UART_MODEM_STS 0x06 - -#define UART_DIVISOR0 0x00 -#define UART_DIVISOR1 0x01 - -#define BASE_BAUD (XLP_IO_CLK/16) -#define BAUD_DIVISOR(baud) (BASE_BAUD / baud) - -/* LCR mask values */ -#define LCR_5BITS 0x00 -#define LCR_6BITS 0x01 -#define LCR_7BITS 0x02 -#define LCR_8BITS 0x03 -#define LCR_STOPB 0x04 -#define LCR_PENAB 0x08 -#define LCR_PODD 0x00 -#define LCR_PEVEN 0x10 -#define LCR_PONE 0x20 -#define LCR_PZERO 0x30 -#define LCR_SBREAK 0x40 -#define LCR_EFR_ENABLE 0xbf -#define LCR_DLAB 0x80 - -/* MCR mask values */ -#define MCR_DTR 0x01 -#define MCR_RTS 0x02 -#define MCR_DRS 0x04 -#define MCR_IE 0x08 -#define MCR_LOOPBACK 0x10 - -/* FCR mask values */ -#define FCR_RCV_RST 0x02 -#define FCR_XMT_RST 0x04 -#define FCR_RX_LOW 0x00 -#define FCR_RX_MEDL 0x40 -#define FCR_RX_MEDH 0x80 -#define FCR_RX_HIGH 0xc0 - -/* IER mask values */ -#define IER_ERXRDY 0x1 -#define IER_ETXRDY 0x2 -#define IER_ERLS 0x4 -#define IER_EMSC 0x8 - -#if !defined(LOCORE) && !defined(__ASSEMBLY__) - -#define nlm_read_uart_reg(b, r) nlm_read_reg(b, r) -#define nlm_write_uart_reg(b, r, v) nlm_write_reg(b, r, v) -#define nlm_get_uart_pcibase(node, inst) \ - nlm_pcicfg_base(XLP_IO_UART_OFFSET(node, inst)) -#define nlm_get_uart_regbase(node, inst) \ - (nlm_get_uart_pcibase(node, inst) + XLP_IO_PCI_HDRSZ) - -static inline void -nlm_uart_set_baudrate(uint64_t base, int baud) -{ - uint32_t lcr; - - lcr = nlm_read_uart_reg(base, UART_LINE_CTL); - - /* enable divisor register, and write baud values */ - nlm_write_uart_reg(base, UART_LINE_CTL, lcr | (1 << 7)); - nlm_write_uart_reg(base, UART_DIVISOR0, - (BAUD_DIVISOR(baud) & 0xff)); - nlm_write_uart_reg(base, UART_DIVISOR1, - ((BAUD_DIVISOR(baud) >> 8) & 0xff)); - - /* restore default lcr */ - nlm_write_uart_reg(base, UART_LINE_CTL, lcr); -} - -static inline void -nlm_uart_outbyte(uint64_t base, char c) -{ - uint32_t lsr; - - for (;;) { - lsr = nlm_read_uart_reg(base, UART_LINE_STS); - if (lsr & 0x20) - break; - } - - nlm_write_uart_reg(base, UART_TX_DATA, (int)c); -} - -static inline char -nlm_uart_inbyte(uint64_t base) -{ - int data, lsr; - - for (;;) { - lsr = nlm_read_uart_reg(base, UART_LINE_STS); - if (lsr & 0x80) { /* parity/frame/break-error - push a zero */ - data = 0; - break; - } - if (lsr & 0x01) { /* Rx data */ - data = nlm_read_uart_reg(base, UART_RX_DATA); - break; - } - } - - return (char)data; -} - -static inline int -nlm_uart_init(uint64_t base, int baud, int databits, int stopbits, - int parity, int int_en, int loopback) -{ - uint32_t lcr; - - lcr = 0; - if (databits >= 8) - lcr |= LCR_8BITS; - else if (databits == 7) - lcr |= LCR_7BITS; - else if (databits == 6) - lcr |= LCR_6BITS; - else - lcr |= LCR_5BITS; - - if (stopbits > 1) - lcr |= LCR_STOPB; - - lcr |= parity << 3; - - /* setup default lcr */ - nlm_write_uart_reg(base, UART_LINE_CTL, lcr); - - /* Reset the FIFOs */ - nlm_write_uart_reg(base, UART_LINE_CTL, FCR_RCV_RST | FCR_XMT_RST); - - nlm_uart_set_baudrate(base, baud); - - if (loopback) - nlm_write_uart_reg(base, UART_MODEM_CTL, 0x1f); - - if (int_en) - nlm_write_uart_reg(base, UART_INT_EN, IER_ERXRDY | IER_ETXRDY); - - return 0; -} -#endif /* !LOCORE && !__ASSEMBLY__ */ -#endif /* __XLP_HAL_UART_H__ */ diff --git a/sys/mips/nlm/hal/ucore_loader.h b/sys/mips/nlm/hal/ucore_loader.h deleted file mode 100644 index 077dfb65012..00000000000 --- a/sys/mips/nlm/hal/ucore_loader.h +++ /dev/null @@ -1,141 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __NLM_UCORE_LOADER_H__ -#define __NLM_UCORE_LOADER_H__ - -/** -* @file_name ucore_loader.h -* @author Netlogic Microsystems -* @brief Ucore loader API header -*/ - -#define CODE_SIZE_PER_UCORE (4 << 10) - -static __inline__ void -nlm_ucore_load_image(uint64_t nae_base, int ucore) -{ - uint64_t addr = nae_base + NAE_UCORE_SHARED_RAM_OFFSET + - (ucore * CODE_SIZE_PER_UCORE); - uint32_t *p = (uint32_t *)ucore_app_bin; - int i, size; - - size = sizeof(ucore_app_bin)/sizeof(uint32_t); - for (i = 0; i < size; i++, addr += 4) - nlm_store_word_daddr(addr, htobe32(p[i])); - - /* add a 'nop' if number of instructions are odd */ - if (size & 0x1) - nlm_store_word_daddr(addr, 0x0); -} - -static __inline int -nlm_ucore_write_sharedmem(uint64_t nae_base, int index, uint32_t data) -{ - uint32_t ucore_cfg; - uint64_t addr = nae_base + NAE_UCORE_SHARED_RAM_OFFSET; - - if (index > 128) - return (-1); - - ucore_cfg = nlm_read_nae_reg(nae_base, NAE_RX_UCORE_CFG); - /* set iram to zero */ - nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG, - (ucore_cfg & ~(0x1 << 7))); - - nlm_store_word_daddr(addr + (index * 4), data); - - /* restore ucore config */ - nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG, ucore_cfg); - return (0); -} - -static __inline uint32_t -nlm_ucore_read_sharedmem(uint64_t nae_base, int index) -{ - uint64_t addr = nae_base + NAE_UCORE_SHARED_RAM_OFFSET; - uint32_t ucore_cfg, val; - - ucore_cfg = nlm_read_nae_reg(nae_base, NAE_RX_UCORE_CFG); - /* set iram to zero */ - nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG, - (ucore_cfg & ~(0x1 << 7))); - - val = nlm_load_word_daddr(addr + (index * 4)); - - /* restore ucore config */ - nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG, ucore_cfg); - - return val; -} - -static __inline__ int -nlm_ucore_load_all(uint64_t nae_base, uint32_t ucore_mask, int nae_reset_done) -{ - int i, count = 0; - uint32_t mask; - uint32_t ucore_cfg = 0; - - mask = ucore_mask & 0xffff; - - /* Stop all ucores */ - if (nae_reset_done == 0) { /* Skip the Ucore reset if NAE reset is done */ - ucore_cfg = nlm_read_nae_reg(nae_base, NAE_RX_UCORE_CFG); - nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG, - ucore_cfg | (1 << 24)); - - /* poll for ucore to get in to a wait state */ - do { - ucore_cfg = nlm_read_nae_reg(nae_base, - NAE_RX_UCORE_CFG); - } while ((ucore_cfg & (1 << 25)) == 0); - } - - for (i = 0; i < sizeof(ucore_mask) * NBBY; i++) { - if ((mask & (1 << i)) == 0) - continue; - nlm_ucore_load_image(nae_base, i); - count++; - } - - /* Enable per-domain ucores */ - ucore_cfg = nlm_read_nae_reg(nae_base, NAE_RX_UCORE_CFG); - - /* write one to reset bits to put the ucores in reset */ - ucore_cfg = ucore_cfg | (((mask) & 0xffff) << 8); - nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG, ucore_cfg); - - /* write zero to reset bits to pull them out of reset */ - ucore_cfg = ucore_cfg & (~(((mask) & 0xffff) << 8)) & ~(1 << 24); - nlm_write_nae_reg(nae_base, NAE_RX_UCORE_CFG, ucore_cfg); - - return (count); -} -#endif diff --git a/sys/mips/nlm/hal/usb.h b/sys/mips/nlm/hal/usb.h deleted file mode 100644 index 1b28791f3ed..00000000000 --- a/sys/mips/nlm/hal/usb.h +++ /dev/null @@ -1,59 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef __NLM_USB_H__ -#define __NLM_USB_H__ - -#define USB_CTL_0 0x01 -#define USB_PHY_0 0x0A -#define USB_PHY_RESET 0x01 -#define USB_PHY_PORT_RESET_0 0x10 -#define USB_PHY_PORT_RESET_1 0x20 -#define USB_CONTROLLER_RESET 0x01 -#define USB_INT_STATUS 0x0E -#define USB_INT_EN 0x0F -#define USB_PHY_INTERRUPT_EN 0x01 -#define USB_OHCI_INTERRUPT_EN 0x02 -#define USB_OHCI_INTERRUPT1_EN 0x04 -#define USB_OHCI_INTERRUPT2_EN 0x08 -#define USB_CTRL_INTERRUPT_EN 0x10 - -#if !defined(LOCORE) && !defined(__ASSEMBLY__) - -#define nlm_read_usb_reg(b, r) nlm_read_reg(b,r) -#define nlm_write_usb_reg(b, r, v) nlm_write_reg(b,r,v) -#define nlm_get_usb_pcibase(node, inst) nlm_pcicfg_base(XLP_IO_USB_OFFSET(node, inst)) -#define nlm_get_usb_hcd_base(node, inst) nlm_xkphys_map_pcibar0(nlm_get_usb_pcibase(node, inst)) -#define nlm_get_usb_regbase(node, inst) (nlm_get_usb_pcibase(node, inst) + XLP_IO_PCI_HDRSZ) - -#endif -#endif diff --git a/sys/mips/nlm/hal/xaui.h b/sys/mips/nlm/hal/xaui.h deleted file mode 100644 index eb55d50d3b0..00000000000 --- a/sys/mips/nlm/hal/xaui.h +++ /dev/null @@ -1,193 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef __NLM_XAUI_H__ -#define __NLM_XAUI_H__ - -/** -* @file_name xaui.h -* @author Netlogic Microsystems -* @brief Basic definitions of XLP XAUI ports -*/ -#define XAUI_CONFIG0(block) NAE_REG(block, 4, 0x00) -#define XAUI_CONFIG1(block) NAE_REG(block, 4, 0x01) -#define XAUI_CONFIG2(block) NAE_REG(block, 4, 0x02) -#define XAUI_CONFIG3(block) NAE_REG(block, 4, 0x03) -/* -#define XAUI_MAC_ADDR0_LO(block) NAE_REG(block, 4, 0x04) -#define XAUI_MAC_ADDR0_HI(block) NAE_REG(block, 4, 0x05) -*/ -#define XAUI_MAX_FRAME_LEN(block) NAE_REG(block, 4, 0x08) -#define XAUI_REVISION_LVL(block) NAE_REG(block, 4, 0x0b) -#define XAUI_MII_MGMT_CMD(block) NAE_REG(block, 4, 0x10) -#define XAUI_MII_MGMT_FIELD(block) NAE_REG(block, 4, 0x11) -#define XAUI_MII_MGMT_CFG(block) NAE_REG(block, 4, 0x12) -#define XAUI_MIIM_LINK_FALL_VEC(block) NAE_REG(block, 4, 0x13) -#define XAUI_MII_MGMT_IND(block) NAE_REG(block, 4, 0x14) -#define XAUI_STATS_MLR(block) NAE_REG(block, 4, 0x1f) -#define XAUI_STATS_TR64(block) NAE_REG(block, 4, 0x20) -#define XAUI_STATS_TR127(block) NAE_REG(block, 4, 0x21) -#define XAUI_STATS_TR255(block) NAE_REG(block, 4, 0x22) -#define XAUI_STATS_TR511(block) NAE_REG(block, 4, 0x23) -#define XAUI_STATS_TR1K(block) NAE_REG(block, 4, 0x24) -#define XAUI_STATS_TRMAX(block) NAE_REG(block, 4, 0x25) -#define XAUI_STATS_TRMGV(block) NAE_REG(block, 4, 0x26) -#define XAUI_STATS_RBYT(block) NAE_REG(block, 4, 0x27) -#define XAUI_STATS_RPKT(block) NAE_REG(block, 4, 0x28) -#define XAUI_STATS_RFCS(block) NAE_REG(block, 4, 0x29) -#define XAUI_STATS_RMCA(block) NAE_REG(block, 4, 0x2a) -#define XAUI_STATS_RBCA(block) NAE_REG(block, 4, 0x2b) -#define XAUI_STATS_RXCF(block) NAE_REG(block, 4, 0x2c) -#define XAUI_STATS_RXPF(block) NAE_REG(block, 4, 0x2d) -#define XAUI_STATS_RXUO(block) NAE_REG(block, 4, 0x2e) -#define XAUI_STATS_RALN(block) NAE_REG(block, 4, 0x2f) -#define XAUI_STATS_RFLR(block) NAE_REG(block, 4, 0x30) -#define XAUI_STATS_RCDE(block) NAE_REG(block, 4, 0x31) -#define XAUI_STATS_RCSE(block) NAE_REG(block, 4, 0x32) -#define XAUI_STATS_RUND(block) NAE_REG(block, 4, 0x33) -#define XAUI_STATS_ROVR(block) NAE_REG(block, 4, 0x34) -#define XAUI_STATS_RFRG(block) NAE_REG(block, 4, 0x35) -#define XAUI_STATS_RJBR(block) NAE_REG(block, 4, 0x36) -#define XAUI_STATS_TBYT(block) NAE_REG(block, 4, 0x38) -#define XAUI_STATS_TPKT(block) NAE_REG(block, 4, 0x39) -#define XAUI_STATS_TMCA(block) NAE_REG(block, 4, 0x3a) -#define XAUI_STATS_TBCA(block) NAE_REG(block, 4, 0x3b) -#define XAUI_STATS_TXPF(block) NAE_REG(block, 4, 0x3c) -#define XAUI_STATS_TDFR(block) NAE_REG(block, 4, 0x3d) -#define XAUI_STATS_TEDF(block) NAE_REG(block, 4, 0x3e) -#define XAUI_STATS_TSCL(block) NAE_REG(block, 4, 0x3f) -#define XAUI_STATS_TMCL(block) NAE_REG(block, 4, 0x40) -#define XAUI_STATS_TLCL(block) NAE_REG(block, 4, 0x41) -#define XAUI_STATS_TXCL(block) NAE_REG(block, 4, 0x42) -#define XAUI_STATS_TNCL(block) NAE_REG(block, 4, 0x43) -#define XAUI_STATS_TJBR(block) NAE_REG(block, 4, 0x46) -#define XAUI_STATS_TFCS(block) NAE_REG(block, 4, 0x47) -#define XAUI_STATS_TXCF(block) NAE_REG(block, 4, 0x48) -#define XAUI_STATS_TOVR(block) NAE_REG(block, 4, 0x49) -#define XAUI_STATS_TUND(block) NAE_REG(block, 4, 0x4a) -#define XAUI_STATS_TFRG(block) NAE_REG(block, 4, 0x4b) -#define XAUI_STATS_CAR1(block) NAE_REG(block, 4, 0x4c) -#define XAUI_STATS_CAR2(block) NAE_REG(block, 4, 0x4d) -#define XAUI_STATS_CAM1(block) NAE_REG(block, 4, 0x4e) -#define XAUI_STATS_CAM2(block) NAE_REG(block, 4, 0x4f) -#define XAUI_MAC_ADDR0_LO(block) NAE_REG(block, 4, 0x50) -#define XAUI_MAC_ADDR0_HI(block) NAE_REG(block, 4, 0x51) -#define XAUI_MAC_ADDR1_LO(block) NAE_REG(block, 4, 0x52) -#define XAUI_MAC_ADDR1_HI(block) NAE_REG(block, 4, 0x53) -#define XAUI_MAC_ADDR2_LO(block) NAE_REG(block, 4, 0x54) -#define XAUI_MAC_ADDR2_HI(block) NAE_REG(block, 4, 0x55) -#define XAUI_MAC_ADDR3_LO(block) NAE_REG(block, 4, 0x56) -#define XAUI_MAC_ADDR3_HI(block) NAE_REG(block, 4, 0x57) -#define XAUI_MAC_ADDR_MASK0_LO(block) NAE_REG(block, 4, 0x58) -#define XAUI_MAC_ADDR_MASK0_HI(block) NAE_REG(block, 4, 0x59) -#define XAUI_MAC_ADDR_MASK1_LO(block) NAE_REG(block, 4, 0x5a) -#define XAUI_MAC_ADDR_MASK1_HI(block) NAE_REG(block, 4, 0x5b) -#define XAUI_MAC_FILTER_CFG(block) NAE_REG(block, 4, 0x5c) -#define XAUI_HASHTBL_VEC_B31_0(block) NAE_REG(block, 4, 0x60) -#define XAUI_HASHTBL_VEC_B63_32(block) NAE_REG(block, 4, 0x61) -#define XAUI_HASHTBL_VEC_B95_64(block) NAE_REG(block, 4, 0x62) -#define XAUI_HASHTBL_VEC_B127_96(block) NAE_REG(block, 4, 0x63) -#define XAUI_HASHTBL_VEC_B159_128(block) NAE_REG(block, 4, 0x64) -#define XAUI_HASHTBL_VEC_B191_160(block) NAE_REG(block, 4, 0x65) -#define XAUI_HASHTBL_VEC_B223_192(block) NAE_REG(block, 4, 0x66) -#define XAUI_HASHTBL_VEC_B255_224(block) NAE_REG(block, 4, 0x67) -#define XAUI_HASHTBL_VEC_B287_256(block) NAE_REG(block, 4, 0x68) -#define XAUI_HASHTBL_VEC_B319_288(block) NAE_REG(block, 4, 0x69) -#define XAUI_HASHTBL_VEC_B351_320(block) NAE_REG(block, 4, 0x6a) -#define XAUI_HASHTBL_VEC_B383_352(block) NAE_REG(block, 4, 0x6b) -#define XAUI_HASHTBL_VEC_B415_384(block) NAE_REG(block, 4, 0x6c) -#define XAUI_HASHTBL_VEC_B447_416(block) NAE_REG(block, 4, 0x6d) -#define XAUI_HASHTBL_VEC_B479_448(block) NAE_REG(block, 4, 0x6e) -#define XAUI_HASHTBL_VEC_B511_480(block) NAE_REG(block, 4, 0x6f) - -#define XAUI_NETIOR_XGMAC_MISC0(block) NAE_REG(block, 4, 0x76) -#define XAUI_NETIOR_RX_ABORT_DROP_COUNT(block) NAE_REG(block, 4, 0x77) -#define XAUI_NETIOR_MACCTRL_PAUSE_QUANTA(block) NAE_REG(block, 4, 0x78) -#define XAUI_NETIOR_MACCTRL_OPCODE(block) NAE_REG(block, 4, 0x79) -#define XAUI_NETIOR_MAC_DA_H(block) NAE_REG(block, 4, 0x7a) -#define XAUI_NETIOR_MAC_DA_L(block) NAE_REG(block, 4, 0x7b) -#define XAUI_NETIOR_XGMAC_STAT(block) NAE_REG(block, 4, 0x7c) -#define XAUI_NETIOR_XGMAC_CTRL3(block) NAE_REG(block, 4, 0x7d) -#define XAUI_NETIOR_XGMAC_CTRL2(block) NAE_REG(block, 4, 0x7e) -#define XAUI_NETIOR_XGMAC_CTRL1(block) NAE_REG(block, 4, 0x7f) - -#define LANE_RX_CLK (1 << 0) -#define LANE_TX_CLK (1 << 6) - -#define XAUI_LANE_FAULT 0x400 -#define XAUI_CONFIG_0 0 - -#define XAUI_CONFIG_MACRST 0x80000000 -#define XAUI_CONFIG_RSTRCTL 0x00400000 -#define XAUI_CONFIG_RSTRFN 0x00200000 -#define XAUI_CONFIG_RSTTCTL 0x00040000 -#define XAUI_CONFIG_RSTTFN 0x00020000 -#define XAUI_CONFIG_RSTMIIM 0x00010000 - -#define XAUI_CONFIG_1 1 - -#define XAUI_CONFIG_TCTLEN 0x80000000 -#define XAUI_CONFIG_TFEN 0x40000000 -#define XAUI_CONFIG_RCTLEN 0x20000000 -#define XAUI_CONFIG_RFEN 0x10000000 -#define XAUI_CONFIG_DRPLT64 0x00000020 -#define XAUI_CONFIG_LENCHK 0x00000008 -#define XAUI_CONFIG_GENFCS 0x00000004 -#define XAUI_CONFIG_PAD_0 0x00000000 -#define XAUI_CONFIG_PAD_64 0x00000001 -#define XAUI_CONFIG_PAD_COND 0x00000002 -#define XAUI_CONFIG_PAD_68 0x00000003 - -#define XAUI_PHY_CTRL_1 0x00 - -#define NETIOR_XGMAC_CTRL1 0x7F -#define NETIOR_XGMAC_CTRL3 0x7D - -#define NETIOR_XGMAC_VLAN_DC_POS 28 -#define NETIOR_XGMAC_PHYADDR_POS 23 -#define NETIOR_XGMAC_DEVID_POS 18 -#define NETIOR_XGMAC_STATS_EN_POS 17 -#define NETIOR_XGMAC_TX_PFC_EN_POS 14 -#define NETIOR_XGMAC_RX_PFC_EN_POS 13 -#define NETIOR_XGMAC_SOFT_RST_POS 11 -#define NETIOR_XGMAC_TX_PAUSE_POS 10 - -#define NETIOR_XGMAC_STATS_CLR_POS 16 - -#if !defined(LOCORE) && !defined(__ASSEMBLY__) - -void nlm_xaui_pcs_init(uint64_t, int); -void nlm_nae_setup_rx_mode_xaui(uint64_t, int, int, int, int, int, int, int); -void nlm_nae_setup_mac_addr_xaui(uint64_t, int, int, int, unsigned char *); -void nlm_config_xaui_mtu(uint64_t, int, int, int); -void nlm_config_xaui(uint64_t, int, int, int, int); - -#endif /* !(LOCORE) && !(__ASSEMBLY__) */ - -#endif diff --git a/sys/mips/nlm/interrupt.h b/sys/mips/nlm/interrupt.h deleted file mode 100644 index c19b0f7d7f8..00000000000 --- a/sys/mips/nlm/interrupt.h +++ /dev/null @@ -1,75 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef _RMI_INTERRUPT_H_ -#define _RMI_INTERRUPT_H_ - -/* Defines for the IRQ numbers */ - -#define IRQ_IPI 41 /* 8-39 are used by PIC interrupts */ -#define IRQ_MSGRING 6 -#define IRQ_TIMER 7 - -#define PIC_IRQ_BASE 8 -#define PIC_IRT_LAST_IRQ 39 -#define XLP_IRQ_IS_PICINTR(irq) ((irq) >= PIC_IRQ_BASE && \ - (irq) <= PIC_IRT_LAST_IRQ) - -#define PIC_UART_0_IRQ 17 -#define PIC_UART_1_IRQ 18 - -#define PIC_PCIE_0_IRQ 19 -#define PIC_PCIE_1_IRQ 20 -#define PIC_PCIE_2_IRQ 21 -#define PIC_PCIE_3_IRQ 22 -#define PIC_PCIE_IRQ(l) (PIC_PCIE_0_IRQ + (l)) - -#define PIC_USB_0_IRQ 23 -#define PIC_USB_1_IRQ 24 -#define PIC_USB_2_IRQ 25 -#define PIC_USB_3_IRQ 26 -#define PIC_USB_4_IRQ 27 -#define PIC_USB_IRQ(n) (PIC_USB_0_IRQ + (n)) - -#define PIC_MMC_IRQ 29 -#define PIC_I2C_0_IRQ 30 -#define PIC_I2C_1_IRQ 31 -#define PIC_I2C_IRQ(n) (PIC_I2C_0_IRQ + (n)) - -/* - * XLR needs custom pre and post handlers for PCI/PCI-e interrupts - * XXX: maybe follow i386 intsrc model - */ -void xlp_enable_irq(int irq); -void xlp_set_bus_ack(int irq, void (*ack)(int, void *), void *arg); - -#endif /* _RMI_INTERRUPT_H_ */ diff --git a/sys/mips/nlm/intr_machdep.c b/sys/mips/nlm/intr_machdep.c deleted file mode 100644 index 82cd781f80c..00000000000 --- a/sys/mips/nlm/intr_machdep.c +++ /dev/null @@ -1,358 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#define INTRCNT_COUNT 256 -#define INTRNAME_LEN (2*MAXCOMLEN + 1) - -MALLOC_DECLARE(M_MIPSINTR); -MALLOC_DEFINE(M_MIPSINTR, "mipsintr", "MIPS interrupt handling"); - -u_long *intrcnt; -char *intrnames; -size_t sintrcnt; -size_t sintrnames; - -struct xlp_intrsrc { - void (*bus_ack)(int, void *); /* Additional ack */ - void *bus_ack_arg; /* arg for additional ack */ - struct intr_event *ie; /* event corresponding to intr */ - int irq; - int irt; -}; - -static struct xlp_intrsrc xlp_interrupts[XLR_MAX_INTR]; -static mips_intrcnt_t mips_intr_counters[XLR_MAX_INTR]; -static int intrcnt_index; - -int -xlp_irq_to_irt(int irq) -{ - uint32_t offset; - - switch (irq) { - case PIC_UART_0_IRQ: - case PIC_UART_1_IRQ: - offset = XLP_IO_UART_OFFSET(0, irq - PIC_UART_0_IRQ); - return (xlp_socdev_irt(offset)); - case PIC_PCIE_0_IRQ: - case PIC_PCIE_1_IRQ: - case PIC_PCIE_2_IRQ: - case PIC_PCIE_3_IRQ: - offset = XLP_IO_PCIE_OFFSET(0, irq - PIC_PCIE_0_IRQ); - return (xlp_socdev_irt(offset)); - case PIC_USB_0_IRQ: - case PIC_USB_1_IRQ: - case PIC_USB_2_IRQ: - case PIC_USB_3_IRQ: - case PIC_USB_4_IRQ: - offset = XLP_IO_USB_OFFSET(0, irq - PIC_USB_0_IRQ); - return (xlp_socdev_irt(offset)); - case PIC_I2C_0_IRQ: - case PIC_I2C_1_IRQ: - offset = XLP_IO_I2C0_OFFSET(0); - return (xlp_socdev_irt(offset) + irq - PIC_I2C_0_IRQ); - default: - printf("ERROR: %s: unknown irq %d\n", __func__, irq); - return (-1); - } -} - -void -xlp_enable_irq(int irq) -{ - uint64_t eimr; - - eimr = nlm_read_c0_eimr(); - nlm_write_c0_eimr(eimr | (1ULL << irq)); -} - -void -cpu_establish_softintr(const char *name, driver_filter_t * filt, - void (*handler) (void *), void *arg, int irq, int flags, - void **cookiep) -{ - - panic("Soft interrupts unsupported!\n"); -} - -static void -xlp_post_filter(void *source) -{ - struct xlp_intrsrc *src = source; - - if (src->bus_ack) - src->bus_ack(src->irq, src->bus_ack_arg); - nlm_pic_ack(xlp_pic_base, src->irt); -} - -static void -xlp_pre_ithread(void *source) -{ - struct xlp_intrsrc *src = source; - - if (src->bus_ack) - src->bus_ack(src->irq, src->bus_ack_arg); -} - -static void -xlp_post_ithread(void *source) -{ - struct xlp_intrsrc *src = source; - - nlm_pic_ack(xlp_pic_base, src->irt); -} - -void -xlp_set_bus_ack(int irq, void (*ack)(int, void *), void *arg) -{ - struct xlp_intrsrc *src; - - KASSERT(irq > 0 && irq <= XLR_MAX_INTR, - ("%s called for bad hard intr %d", __func__, irq)); - - /* no locking needed - this will called early in boot */ - src = &xlp_interrupts[irq]; - KASSERT(src->ie != NULL, - ("%s called after IRQ enable for %d.", __func__, irq)); - src->bus_ack_arg = arg; - src->bus_ack = ack; -} - -void -cpu_establish_hardintr(const char *name, driver_filter_t * filt, - void (*handler) (void *), void *arg, int irq, int flags, - void **cookiep) -{ - struct intr_event *ie; /* descriptor for the IRQ */ - struct xlp_intrsrc *src = NULL; - int errcode; - - KASSERT(irq > 0 && irq <= XLR_MAX_INTR , - ("%s called for bad hard intr %d", __func__, irq)); - - /* - * Locking - not needed now, because we do this only on - * startup from CPU0 - */ - src = &xlp_interrupts[irq]; - ie = src->ie; - if (ie == NULL) { - /* - * PIC based interrupts need ack in PIC, and some SoC - * components need additional acks (e.g. PCI) - */ - if (XLP_IRQ_IS_PICINTR(irq)) - errcode = intr_event_create(&ie, src, 0, irq, - xlp_pre_ithread, xlp_post_ithread, xlp_post_filter, - NULL, "hard intr%d:", irq); - else { - if (filt == NULL) - panic("Unsupported non filter percpu intr %d", irq); - errcode = intr_event_create(&ie, src, 0, irq, - NULL, NULL, NULL, NULL, "hard intr%d:", irq); - } - if (errcode) { - printf("Could not create event for intr %d\n", irq); - return; - } - src->irq = irq; - src->ie = ie; - } - if (XLP_IRQ_IS_PICINTR(irq)) { - /* Set all irqs to CPU 0 for now */ - src->irt = xlp_irq_to_irt(irq); - nlm_pic_write_irt_direct(xlp_pic_base, src->irt, 1, 0, - PIC_LOCAL_SCHEDULING, irq, 0); - } - - intr_event_add_handler(ie, name, filt, handler, arg, - intr_priority(flags), flags, cookiep); - xlp_enable_irq(irq); -} - -void -cpu_intr(struct trapframe *tf) -{ - struct intr_event *ie; - uint64_t eirr, eimr; - int i; - - critical_enter(); - - /* find a list of enabled interrupts */ - eirr = nlm_read_c0_eirr(); - eimr = nlm_read_c0_eimr(); - eirr &= eimr; - - if (eirr == 0) { - critical_exit(); - return; - } - /* - * No need to clear the EIRR here as the handler writes to - * compare which ACKs the interrupt. - */ - if (eirr & (1 << IRQ_TIMER)) { - intr_event_handle(xlp_interrupts[IRQ_TIMER].ie, tf); - critical_exit(); - return; - } - - /* FIXME sched pin >? LOCK>? */ - for (i = sizeof(eirr) * 8 - 1; i >= 0; i--) { - if ((eirr & (1ULL << i)) == 0) - continue; - - ie = xlp_interrupts[i].ie; - /* Don't account special IRQs */ - switch (i) { - case IRQ_IPI: - case IRQ_MSGRING: - break; - default: - mips_intrcnt_inc(mips_intr_counters[i]); - } - - /* Ack the IRQ on the CPU */ - nlm_write_c0_eirr(1ULL << i); - if (intr_event_handle(ie, tf) != 0) { - printf("stray interrupt %d\n", i); - } - } - critical_exit(); -} - -void -mips_intrcnt_setname(mips_intrcnt_t counter, const char *name) -{ - int idx = counter - intrcnt; - - KASSERT(counter != NULL, ("mips_intrcnt_setname: NULL counter")); - - snprintf(intrnames + (MAXCOMLEN + 1) * idx, - MAXCOMLEN + 1, "%-*s", MAXCOMLEN, name); -} - -mips_intrcnt_t -mips_intrcnt_create(const char* name) -{ - mips_intrcnt_t counter = &intrcnt[intrcnt_index++]; - - mips_intrcnt_setname(counter, name); - return counter; -} - -void -cpu_init_interrupts() -{ - int i; - char name[MAXCOMLEN + 1]; - - intrcnt = mallocarray(INTRCNT_COUNT, sizeof(u_long), M_MIPSINTR, - M_WAITOK | M_ZERO); - intrnames = mallocarray(INTRCNT_COUNT, INTRNAME_LEN, M_MIPSINTR, - M_WAITOK | M_ZERO); - sintrcnt = INTRCNT_COUNT * sizeof(u_long); - sintrnames = INTRCNT_COUNT * INTRNAME_LEN; - - /* - * Initialize all available vectors so spare IRQ - * would show up in systat output - */ - for (i = 0; i < XLR_MAX_INTR; i++) { - snprintf(name, MAXCOMLEN + 1, "int%d:", i); - mips_intr_counters[i] = mips_intrcnt_create(name); - } -} - -static int xlp_pic_probe(device_t); -static int xlp_pic_attach(device_t); - -static int -xlp_pic_probe(device_t dev) -{ - - if (!ofw_bus_is_compatible(dev, "netlogic,xlp-pic")) - return (ENXIO); - device_set_desc(dev, "XLP PIC"); - return (0); -} - -static int -xlp_pic_attach(device_t dev) -{ - - return (0); -} - -static device_method_t xlp_pic_methods[] = { - DEVMETHOD(device_probe, xlp_pic_probe), - DEVMETHOD(device_attach, xlp_pic_attach), - - DEVMETHOD_END -}; - -static driver_t xlp_pic_driver = { - "xlp_pic", - xlp_pic_methods, - 1, /* no softc */ -}; - -static devclass_t xlp_pic_devclass; -DRIVER_MODULE(xlp_pic, simplebus, xlp_pic_driver, xlp_pic_devclass, 0, 0); diff --git a/sys/mips/nlm/mpreset.S b/sys/mips/nlm/mpreset.S deleted file mode 100644 index 697bf453873..00000000000 --- a/sys/mips/nlm/mpreset.S +++ /dev/null @@ -1,200 +0,0 @@ -/*- - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#include -#include -#include -#include -#include -#include - -#define SYS_REG_KSEG1(node, reg) (0xa0000000 + XLP_DEFAULT_IO_BASE + \ - XLP_IO_SYS_OFFSET(node) + XLP_IO_PCI_HDRSZ + (reg) * 4) -#include "assym.inc" - - .text - .set noat - .set noreorder - .set mips64 - -#define MFCR(rt,rs) .word ((0x1c<<26)|((rs)<<21)|((rt)<<16)|(0x18)) -#define MTCR(rt,rs) .word ((0x1c<<26)|((rs)<<21)|((rt)<<16)|(0x19)) -/* - * We need to do this to really flush the dcache before splitting it - */ -.macro flush_l1_dcache - .set push - .set noreorder - li $8, LSU_DEBUG_DATA0 /* use register number to handle */ - li $9, LSU_DEBUG_ADDR /* different ABIs */ - li t2, 0 /* index */ - li t3, 0x1000 /* loop count, 512 sets * 8 whatever? */ -1: - sll v0, t2, 5 - MTCR(0, 8) - ori v1, v0, 0x3 /* way0 | write_enable | write_active */ - MTCR(3, 9) -2: - MFCR(3, 9) - andi v1, 0x1 /* wait for write_active == 0 */ - bnez v1, 2b - nop - MTCR(0, 8) - ori v1, v0, 0x7 /* way1 | write_enable | write_active */ - MTCR(3, 9) -3: - MFCR(3, 9) - andi v1, 0x1 /* wait for write_active == 0 */ - bnez v1, 3b - nop - addi t2, 1 - bne t3, t2, 1b - nop - .set pop -.endm - -VECTOR(XLPResetEntry, unknown) - mfc0 t0, MIPS_COP_0_STATUS - li t1, 0x80000 - and t1, t0, t1 - bnez t1, nmi_handler - nop - -#ifdef SMP - /* Reset entry for secordary cores */ - mfc0 t0, MIPS_COP_0_PRID, 1 - srl t0, t0, 2 /* discard thread id */ - andi t0, t0, 0x7 /* core id */ - li t1, 1 - sll t0, t1, t0 - nor t0, t0, zero /* mask with core id bit clear */ - - /* clear CPU non-coherent bit */ - li t2, SYS_REG_KSEG1(0, SYS_CPU_NONCOHERENT_MODE) - lw t1, 0(t2) - and t1, t1, t0 - sw t1, 0(t2) - lw t1, 0(t2) /* read-back ensures operation complete */ - sync - - dla t2, mpentry - jr t2 - nop -#endif - nop - /* NOT REACHED */ -VECTOR_END(XLPResetEntry) - - - /* Not yet */ -nmi_handler: - nop - nop - j nmi_handler - -#ifdef SMP - /* - * Enable other threads in the core, called from thread 0 - * of the core - */ -LEAF(xlp_enable_threads) - /* - * Save and restore callee saved registers of all ABIs - * Enabling threads trashes the registers - */ - dmtc0 sp, $4, 2 /* SP saved in UserLocal */ - ori sp, sp, 0x7 - xori sp, sp, 0x7 /* align 64 bit */ - addiu sp, sp, -128 - mfc0 t1, MIPS_COP_0_STATUS - sd s0, 0(sp) - sd s1, 8(sp) - sd s2, 16(sp) - sd s3, 24(sp) - sd s4, 32(sp) - sd s5, 40(sp) - sd s6, 48(sp) - sd s7, 56(sp) - sd s8, 64(sp) - sd t1, 72(sp) - sd gp, 80(sp) - sd ra, 88(sp) - - flush_l1_dcache - - /* Use register number to work in o32 and n32 */ - li $9, ((CPU_BLOCKID_MAP << 8) | MAP_THREADMODE) - move $8, a0 - sync - MTCR(8, 9) - mfc0 t0, MIPS_COP_0_PRID, 1 - andi t0, 0x3 - beqz t0, 2f - nop - dla t1, mpentry /* child thread, go to hardware init */ - jr t1 - nop - - -2: /* - * Parent hardware thread, restore registers, return - */ -#if 1 - /* - * A0 Errata - Write MMU_SETUP after changing thread mode register. - */ - li $9, 0x400 - li $8, 0 - MTCR(8, 9) - sll zero,3 /* ehb */ -#endif - dmfc0 t0, $4, 2 /* SP saved in UserLocal */ - ori sp, t0, 0x7 - xori sp, sp, 0x7 /* align 64 bit */ - addiu sp, sp, -128 - ld s0, 0(sp) - ld s1, 8(sp) - ld s2, 16(sp) - ld s3, 24(sp) - ld s4, 32(sp) - ld s5, 40(sp) - ld s6, 48(sp) - ld s7, 56(sp) - ld s8, 64(sp) - ld t1, 72(sp) - ld gp, 80(sp) - ld ra, 88(sp) - mfc0 t1, MIPS_COP_0_STATUS - - move sp, t0 /* Restore the real SP */ - jr.hb ra - nop -END(xlp_enable_threads) -#endif diff --git a/sys/mips/nlm/msgring.h b/sys/mips/nlm/msgring.h deleted file mode 100644 index 45d978b2431..00000000000 --- a/sys/mips/nlm/msgring.h +++ /dev/null @@ -1,53 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef _NLM_MSGRING_H -#define _NLM_MSGRING_H -#define CMS_DEFAULT_CREDIT 50 -/* - * packets are sent to VC 0 of a thread - * freebacks are sent to VC 3 of a thread - */ -#define XLPGE_RX_VC 0 -#define XLPGE_FB_VC 3 - -extern uint32_t xlp_msg_thread_mask; - -struct nlm_fmn_msg; -typedef void (*msgring_handler)(int, int, int, int, struct nlm_fmn_msg *, void *); - -int register_msgring_handler(int startb, int endb, msgring_handler action, - void *arg); -int xlp_handle_msg_vc(u_int vcmask, int max_msgs); -void xlp_msgring_cpu_init(int, int, int); -void xlp_cms_enable_intr(int , int , int , int); -#endif /* _NLM_MSGRING_H */ diff --git a/sys/mips/nlm/std.xlp b/sys/mips/nlm/std.xlp deleted file mode 100644 index e5ef924fe66..00000000000 --- a/sys/mips/nlm/std.xlp +++ /dev/null @@ -1,6 +0,0 @@ -files "../nlm/files.xlp" -cpu CPU_NLM - -# Devices needed always -device uart -device pci diff --git a/sys/mips/nlm/tick.c b/sys/mips/nlm/tick.c deleted file mode 100644 index 79d3c76f7df..00000000000 --- a/sys/mips/nlm/tick.c +++ /dev/null @@ -1,384 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD */ - -/* - * Simple driver for the 32-bit interval counter built in to all - * MIPS32 CPUs. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include - -uint64_t counter_freq; - -struct timecounter *platform_timecounter; - -DPCPU_DEFINE_STATIC(uint32_t, cycles_per_tick); -static uint32_t cycles_per_usec; - -DPCPU_DEFINE_STATIC(volatile uint32_t, counter_upper); -DPCPU_DEFINE_STATIC(volatile uint32_t, counter_lower_last); -DPCPU_DEFINE_STATIC(uint32_t, compare_ticks); -DPCPU_DEFINE_STATIC(uint32_t, lost_ticks); - -struct clock_softc { - int intr_rid; - struct resource *intr_res; - void *intr_handler; - struct timecounter tc; - struct eventtimer et; -}; -static struct clock_softc *softc; - -/* - * Device methods - */ -static int clock_probe(device_t); -static void clock_identify(driver_t *, device_t); -static int clock_attach(device_t); -static unsigned counter_get_timecount(struct timecounter *tc); - -void -mips_timer_early_init(uint64_t clock_hz) -{ - /* Initialize clock early so that we can use DELAY sooner */ - counter_freq = clock_hz; - cycles_per_usec = (clock_hz / (1000 * 1000)); -} - -void -platform_initclocks(void) -{ - - if (platform_timecounter != NULL) - tc_init(platform_timecounter); -} - -static uint64_t -tick_ticker(void) -{ - uint64_t ret; - uint32_t ticktock; - uint32_t t_lower_last, t_upper; - - /* - * Disable preemption because we are working with cpu specific data. - */ - critical_enter(); - - /* - * Note that even though preemption is disabled, interrupts are - * still enabled. In particular there is a race with clock_intr() - * reading the values of 'counter_upper' and 'counter_lower_last'. - * - * XXX this depends on clock_intr() being executed periodically - * so that 'counter_upper' and 'counter_lower_last' are not stale. - */ - do { - t_upper = DPCPU_GET(counter_upper); - t_lower_last = DPCPU_GET(counter_lower_last); - } while (t_upper != DPCPU_GET(counter_upper)); - - ticktock = mips_rd_count(); - - critical_exit(); - - /* COUNT register wrapped around */ - if (ticktock < t_lower_last) - t_upper++; - - ret = ((uint64_t)t_upper << 32) | ticktock; - return (ret); -} - -void -mips_timer_init_params(uint64_t platform_counter_freq, int double_count) -{ - - /* - * XXX: Do not use printf here: uart code 8250 may use DELAY so this - * function should be called before cninit. - */ - counter_freq = platform_counter_freq; - /* - * XXX: Some MIPS32 cores update the Count register only every two - * pipeline cycles. - * We know this because of status registers in CP0, make it automatic. - */ - if (double_count != 0) - counter_freq /= 2; - - cycles_per_usec = counter_freq / (1 * 1000 * 1000); - set_cputicker(tick_ticker, counter_freq, 1); -} - -static int -sysctl_machdep_counter_freq(SYSCTL_HANDLER_ARGS) -{ - int error; - uint64_t freq; - - if (softc == NULL) - return (EOPNOTSUPP); - freq = counter_freq; - error = sysctl_handle_64(oidp, &freq, sizeof(freq), req); - if (error == 0 && req->newptr != NULL) { - counter_freq = freq; - softc->et.et_frequency = counter_freq; - softc->tc.tc_frequency = counter_freq; - } - return (error); -} - -SYSCTL_PROC(_machdep, OID_AUTO, counter_freq, - CTLTYPE_U64 | CTLFLAG_RW | CTLFLAG_NEEDGIANT, NULL, 0, - sysctl_machdep_counter_freq, "QU", - "Timecounter frequency in Hz"); - -static unsigned -counter_get_timecount(struct timecounter *tc) -{ - - return (mips_rd_count()); -} - -/* - * Wait for about n microseconds (at least!). - */ -void -DELAY(int n) -{ - uint32_t cur, last, delta, usecs; - - TSENTER(); - /* - * This works by polling the timer and counting the number of - * microseconds that go by. - */ - last = mips_rd_count(); - delta = usecs = 0; - - while (n > usecs) { - cur = mips_rd_count(); - - /* Check to see if the timer has wrapped around. */ - if (cur < last) - delta += cur + (0xffffffff - last) + 1; - else - delta += cur - last; - - last = cur; - - if (delta >= cycles_per_usec) { - usecs += delta / cycles_per_usec; - delta %= cycles_per_usec; - } - } - TSEXIT(); -} - -static int -clock_start(struct eventtimer *et, sbintime_t first, sbintime_t period) -{ - uint32_t fdiv, div, next; - - if (period != 0) - div = (et->et_frequency * period) >> 32; - else - div = 0; - if (first != 0) - fdiv = (et->et_frequency * first) >> 32; - else - fdiv = div; - DPCPU_SET(cycles_per_tick, div); - next = mips_rd_count() + fdiv; - DPCPU_SET(compare_ticks, next); - mips_wr_compare(next); - return (0); -} - -static int -clock_stop(struct eventtimer *et) -{ - - DPCPU_SET(cycles_per_tick, 0); - mips_wr_compare(0xffffffff); - return (0); -} - -/* - * Device section of file below - */ -static int -clock_intr(void *arg) -{ - struct clock_softc *sc = (struct clock_softc *)arg; - uint32_t cycles_per_tick; - uint32_t count, compare_last, compare_next, lost_ticks; - - cycles_per_tick = DPCPU_GET(cycles_per_tick); - /* - * Set next clock edge. - */ - count = mips_rd_count(); - compare_last = DPCPU_GET(compare_ticks); - if (cycles_per_tick > 0) { - compare_next = count + cycles_per_tick; - DPCPU_SET(compare_ticks, compare_next); - mips_wr_compare(compare_next); - } else /* In one-shot mode timer should be stopped after the event. */ - mips_wr_compare(0xffffffff); - - /* COUNT register wrapped around */ - if (count < DPCPU_GET(counter_lower_last)) { - DPCPU_SET(counter_upper, DPCPU_GET(counter_upper) + 1); - } - DPCPU_SET(counter_lower_last, count); - - if (cycles_per_tick > 0) { - /* - * Account for the "lost time" between when the timer interrupt - * fired and when 'clock_intr' actually started executing. - */ - lost_ticks = DPCPU_GET(lost_ticks); - lost_ticks += count - compare_last; - - /* - * If the COUNT and COMPARE registers are no longer in sync - * then make up some reasonable value for the 'lost_ticks'. - * - * This could happen, for e.g., after we resume normal - * operations after exiting the debugger. - */ - if (lost_ticks > 2 * cycles_per_tick) - lost_ticks = cycles_per_tick; - - while (lost_ticks >= cycles_per_tick) { - if (sc->et.et_active) - sc->et.et_event_cb(&sc->et, sc->et.et_arg); - lost_ticks -= cycles_per_tick; - } - DPCPU_SET(lost_ticks, lost_ticks); - } - if (sc->et.et_active) - sc->et.et_event_cb(&sc->et, sc->et.et_arg); - return (FILTER_HANDLED); -} - -static int -clock_probe(device_t dev) -{ - - device_set_desc(dev, "Generic MIPS32 ticker"); - return (BUS_PROBE_NOWILDCARD); -} - -static void -clock_identify(driver_t * drv, device_t parent) -{ - - BUS_ADD_CHILD(parent, 0, "clock", 0); -} - -static int -clock_attach(device_t dev) -{ - struct clock_softc *sc; - - if (device_get_unit(dev) != 0) - panic("can't attach more clocks"); - - softc = sc = device_get_softc(dev); - cpu_establish_hardintr("compare", clock_intr, NULL, - sc, IRQ_TIMER, INTR_TYPE_CLK, &sc->intr_handler); - - sc->tc.tc_get_timecount = counter_get_timecount; - sc->tc.tc_counter_mask = 0xffffffff; - sc->tc.tc_frequency = counter_freq; - sc->tc.tc_name = "MIPS32"; - sc->tc.tc_quality = 800; - sc->tc.tc_priv = sc; - tc_init(&sc->tc); - sc->et.et_name = "MIPS32"; -#if 0 - sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT | - ET_FLAGS_PERCPU; -#endif - sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_PERCPU; - sc->et.et_quality = 800; - sc->et.et_frequency = counter_freq; - sc->et.et_min_period = 0x00004000LLU; /* To be safe. */ - sc->et.et_max_period = (0xfffffffeLLU << 32) / sc->et.et_frequency; - sc->et.et_start = clock_start; - sc->et.et_stop = clock_stop; - sc->et.et_priv = sc; - et_register(&sc->et); - return (0); -} - -static device_method_t clock_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, clock_probe), - DEVMETHOD(device_identify, clock_identify), - DEVMETHOD(device_attach, clock_attach), - DEVMETHOD(device_detach, bus_generic_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - {0, 0} -}; - -static driver_t clock_driver = { - "clock", - clock_methods, - sizeof(struct clock_softc), -}; - -static devclass_t clock_devclass; - -DRIVER_MODULE(clock, nexus, clock_driver, clock_devclass, 0, 0); diff --git a/sys/mips/nlm/uart_cpu_xlp.c b/sys/mips/nlm/uart_cpu_xlp.c deleted file mode 100644 index 7025ea3cc4e..00000000000 --- a/sys/mips/nlm/uart_cpu_xlp.c +++ /dev/null @@ -1,95 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD */ - -/* - * Skeleton of this file was based on respective code for ARM - * code written by Olivier Houchard. - */ -/* - * XLRMIPS: This file is hacked from arm/... - */ -#include "opt_platform.h" - -#ifndef FDT /* use FDT uart when fdt is enable */ -#include "opt_uart.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include -#include -#include -#include - -#include - -bus_space_tag_t uart_bus_space_io; -bus_space_tag_t uart_bus_space_mem; - -int -uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2) -{ - return (b1->bsh == b2->bsh && b1->bst == b2->bst); -} - -int -uart_cpu_getdev(int devtype, struct uart_devinfo *di) -{ - di->ops = uart_getops(&uart_ns8250_class); - di->bas.chan = 0; - di->bas.bst = rmi_uart_bus_space; - di->bas.bsh = nlm_get_uart_regbase(0, BOARD_CONSOLE_UART); - - di->bas.regshft = 2; - /* divisor = rclk / (baudrate * 16); */ - di->bas.rclk = XLP_IO_CLK; - di->baudrate = BOARD_CONSOLE_SPEED; - di->databits = 8; - di->stopbits = 1; - di->parity = UART_PARITY_NONE; - - uart_bus_space_io = NULL; - uart_bus_space_mem = rmi_uart_bus_space; - return (0); -} -#endif diff --git a/sys/mips/nlm/usb_init.c b/sys/mips/nlm/usb_init.c deleted file mode 100644 index 295b9b72afd..00000000000 --- a/sys/mips/nlm/usb_init.c +++ /dev/null @@ -1,90 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -static void -nlm_usb_intr_en(int node, int port) -{ - uint32_t val; - uint64_t port_addr; - - port_addr = nlm_get_usb_regbase(node, port); - val = nlm_read_usb_reg(port_addr, USB_INT_EN); - val = USB_CTRL_INTERRUPT_EN | USB_OHCI_INTERRUPT_EN | - USB_OHCI_INTERRUPT1_EN | USB_OHCI_INTERRUPT2_EN; - nlm_write_usb_reg(port_addr, USB_INT_EN, val); -} - -static void -nlm_usb_hw_reset(int node, int port) -{ - uint64_t port_addr; - uint32_t val; - - /* reset USB phy */ - port_addr = nlm_get_usb_regbase(node, port); - val = nlm_read_usb_reg(port_addr, USB_PHY_0); - val &= ~(USB_PHY_RESET | USB_PHY_PORT_RESET_0 | USB_PHY_PORT_RESET_1); - nlm_write_usb_reg(port_addr, USB_PHY_0, val); - - DELAY(100); - val = nlm_read_usb_reg(port_addr, USB_CTL_0); - val &= ~(USB_CONTROLLER_RESET); - val |= 0x4; - nlm_write_usb_reg(port_addr, USB_CTL_0, val); -} - -static void -nlm_usb_init(void) -{ - /* XXX: should be checking if these are in Device mode here */ - printf("Initialize USB Interface\n"); - nlm_usb_hw_reset(0, 0); - nlm_usb_hw_reset(0, 3); - - /* Enable PHY interrupts */ - nlm_usb_intr_en(0, 0); - nlm_usb_intr_en(0, 3); -} - -SYSINIT(nlm_usb_init, SI_SUB_CPU, SI_ORDER_MIDDLE, - nlm_usb_init, NULL); diff --git a/sys/mips/nlm/xlp.h b/sys/mips/nlm/xlp.h deleted file mode 100644 index 020a4962faf..00000000000 --- a/sys/mips/nlm/xlp.h +++ /dev/null @@ -1,138 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD - */ - -#ifndef __NLM_XLP_H__ -#define __NLM_XLP_H__ -#include -#include - -/* XLP 8xx/4xx A0, A1, A2 CPU COP0 PRIDs */ -#define CHIP_PROCESSOR_ID_XLP_8XX 0x10 -#define CHIP_PROCESSOR_ID_XLP_3XX 0x11 -#define CHIP_PROCESSOR_ID_XLP_416 0x94 -#define CHIP_PROCESSOR_ID_XLP_432 0x14 - -/* Revision id's */ -#define XLP_REVISION_A0 0x00 -#define XLP_REVISION_A1 0x01 -#define XLP_REVISION_A2 0x02 -#define XLP_REVISION_B0 0x03 -#define XLP_REVISION_B1 0x04 - -#ifndef LOCORE -/* - * FreeBSD can be started with few threads and cores turned off, - * so have a hardware thread id to FreeBSD cpuid mapping. - */ -extern int xlp_ncores; -extern int xlp_threads_per_core; -extern uint32_t xlp_hw_thread_mask; -extern int xlp_cpuid_to_hwtid[]; -extern int xlp_hwtid_to_cpuid[]; -#ifdef SMP -extern void xlp_enable_threads(int code); -#endif -uint32_t xlp_get_cpu_frequency(int node, int core); -int nlm_set_device_frequency(int node, int devtype, int frequency); -int xlp_irq_to_irt(int irq); - -static __inline int nlm_processor_id(void) -{ - return ((mips_rd_prid() >> 8) & 0xff); -} - -static __inline int nlm_is_xlp3xx(void) -{ - - return (nlm_processor_id() == CHIP_PROCESSOR_ID_XLP_3XX); -} - -static __inline int nlm_is_xlp3xx_ax(void) -{ - uint32_t procid = mips_rd_prid(); - int prid = (procid >> 8) & 0xff; - int rev = procid & 0xff; - - return (prid == CHIP_PROCESSOR_ID_XLP_3XX && - rev < XLP_REVISION_B0); -} - -static __inline int nlm_is_xlp4xx(void) -{ - int prid = nlm_processor_id(); - - return (prid == CHIP_PROCESSOR_ID_XLP_432 || - prid == CHIP_PROCESSOR_ID_XLP_416); -} - -static __inline int nlm_is_xlp8xx(void) -{ - int prid = nlm_processor_id(); - - return (prid == CHIP_PROCESSOR_ID_XLP_8XX || - prid == CHIP_PROCESSOR_ID_XLP_432 || - prid == CHIP_PROCESSOR_ID_XLP_416); -} - -static __inline int nlm_is_xlp8xx_ax(void) -{ - uint32_t procid = mips_rd_prid(); - int prid = (procid >> 8) & 0xff; - int rev = procid & 0xff; - - return ((prid == CHIP_PROCESSOR_ID_XLP_8XX || - prid == CHIP_PROCESSOR_ID_XLP_432 || - prid == CHIP_PROCESSOR_ID_XLP_416) && - (rev < XLP_REVISION_B0)); -} - -static __inline int nlm_is_xlp8xx_b0(void) -{ - uint32_t procid = mips_rd_prid(); - int prid = (procid >> 8) & 0xff; - int rev = procid & 0xff; - - return ((prid == CHIP_PROCESSOR_ID_XLP_8XX || - prid == CHIP_PROCESSOR_ID_XLP_432 || - prid == CHIP_PROCESSOR_ID_XLP_416) && - rev == XLP_REVISION_B0); -} - -static __inline int xlp_socdev_irt(uint32_t offset) -{ - uint64_t base; - - base = nlm_pcicfg_base(offset); - return (nlm_irtstart(base)); -} -#endif /* LOCORE */ -#endif /* __NLM_XLP_H__ */ diff --git a/sys/mips/nlm/xlp_machdep.c b/sys/mips/nlm/xlp_machdep.c deleted file mode 100644 index dcc7b0c8ef4..00000000000 --- a/sys/mips/nlm/xlp_machdep.c +++ /dev/null @@ -1,715 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights - * reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - * NETLOGIC_BSD */ - -#include -#include "opt_ddb.h" -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include /* cinit() */ -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#ifdef FDT -#include -#include -#endif - -/* 4KB static data aread to keep a copy of the bootload env until - the dynamic kenv is setup */ -char boot1_env[4096]; - -uint64_t xlp_cpu_frequency; -uint64_t xlp_io_base = MIPS_PHYS_TO_DIRECT_UNCACHED(XLP_DEFAULT_IO_BASE); - -int xlp_ncores; -int xlp_threads_per_core; -uint32_t xlp_hw_thread_mask; -int xlp_cpuid_to_hwtid[MAXCPU]; -int xlp_hwtid_to_cpuid[MAXCPU]; -uint64_t xlp_pic_base; - -static int xlp_mmuval; - -extern uint32_t _end; -extern char XLPResetEntry[], XLPResetEntryEnd[]; - -static void -xlp_setup_core(void) -{ - uint64_t reg; - - reg = nlm_mfcr(LSU_DEFEATURE); - /* Enable Unaligned and L2HPE */ - reg |= (1 << 30) | (1 << 23); - /* - * Experimental : Enable SUE - * Speculative Unmap Enable. Enable speculative L2 cache request for - * unmapped access. - */ - reg |= (1ull << 31); - /* Clear S1RCM - A0 errata */ - reg &= ~0xeull; - nlm_mtcr(LSU_DEFEATURE, reg); - - reg = nlm_mfcr(SCHED_DEFEATURE); - /* Experimental: Disable BRU accepting ALU ops - A0 errata */ - reg |= (1 << 24); - nlm_mtcr(SCHED_DEFEATURE, reg); -} - -static void -xlp_setup_mmu(void) -{ - uint32_t pagegrain; - - if (nlm_threadid() == 0) { - nlm_setup_extended_pagemask(0); - nlm_large_variable_tlb_en(1); - nlm_extended_tlb_en(1); - nlm_mmu_setup(0, 0, 0); - } - - /* Enable no-read, no-exec, large-physical-address */ - pagegrain = mips_rd_pagegrain(); - pagegrain |= (1U << 31) | /* RIE */ - (1 << 30) | /* XIE */ - (1 << 29); /* ELPA */ - mips_wr_pagegrain(pagegrain); -} - -static void -xlp_enable_blocks(void) -{ - uint64_t sysbase; - int i; - - for (i = 0; i < XLP_MAX_NODES; i++) { - if (!nlm_dev_exists(XLP_IO_SYS_OFFSET(i))) - continue; - sysbase = nlm_get_sys_regbase(i); - nlm_sys_enable_block(sysbase, DFS_DEVICE_RSA); - } -} - -static void -xlp_parse_mmu_options(void) -{ - uint64_t sysbase; - uint32_t cpu_map = xlp_hw_thread_mask; - uint32_t core0_thr_mask, core_thr_mask, cpu_rst_mask; - int i, j, k; - -#ifdef SMP - if (cpu_map == 0) - cpu_map = 0xffffffff; -#else /* Uniprocessor! */ - if (cpu_map == 0) - cpu_map = 0x1; - else if (cpu_map != 0x1) { - printf("WARNING: Starting uniprocessor kernel on cpumask [0x%lx]!\n" - "WARNING: Other CPUs will be unused.\n", (u_long)cpu_map); - cpu_map = 0x1; - } -#endif - - xlp_ncores = 1; - core0_thr_mask = cpu_map & 0xf; - switch (core0_thr_mask) { - case 1: - xlp_threads_per_core = 1; - xlp_mmuval = 0; - break; - case 3: - xlp_threads_per_core = 2; - xlp_mmuval = 2; - break; - case 0xf: - xlp_threads_per_core = 4; - xlp_mmuval = 3; - break; - default: - goto unsupp; - } - - /* Try to find the enabled cores from SYS block */ - sysbase = nlm_get_sys_regbase(0); - cpu_rst_mask = nlm_read_sys_reg(sysbase, SYS_CPU_RESET) & 0xff; - - /* XLP 416 does not report this correctly, fix */ - if (nlm_processor_id() == CHIP_PROCESSOR_ID_XLP_416) - cpu_rst_mask = 0xe; - - /* Take out cores which do not exist on chip */ - for (i = 1; i < XLP_MAX_CORES; i++) { - if ((cpu_rst_mask & (1 << i)) == 0) - cpu_map &= ~(0xfu << (4 * i)); - } - - /* Verify other cores' CPU masks */ - for (i = 1; i < XLP_MAX_CORES; i++) { - core_thr_mask = (cpu_map >> (4 * i)) & 0xf; - if (core_thr_mask == 0) - continue; - if (core_thr_mask != core0_thr_mask) - goto unsupp; - xlp_ncores++; - } - - xlp_hw_thread_mask = cpu_map; - /* setup hardware processor id to cpu id mapping */ - for (i = 0; i< MAXCPU; i++) - xlp_cpuid_to_hwtid[i] = - xlp_hwtid_to_cpuid[i] = -1; - for (i = 0, k = 0; i < XLP_MAX_CORES; i++) { - if (((cpu_map >> (i * 4)) & 0xf) == 0) - continue; - for (j = 0; j < xlp_threads_per_core; j++) { - xlp_cpuid_to_hwtid[k] = i * 4 + j; - xlp_hwtid_to_cpuid[i * 4 + j] = k; - k++; - } - } - - return; - -unsupp: - printf("ERROR : Unsupported CPU mask [use 1,2 or 4 threads per core].\n" - "\tcore0 thread mask [%lx], boot cpu mask [%lx].\n", - (u_long)core0_thr_mask, (u_long)cpu_map); - panic("Invalid CPU mask - halting.\n"); - return; -} - -#ifdef FDT -static void -xlp_bootargs_init(__register_t arg) -{ - char buf[2048]; /* early stack is big enough */ - void *dtbp; - phandle_t chosen; - ihandle_t mask; - - dtbp = (void *)(intptr_t)arg; -#if defined(FDT_DTB_STATIC) - /* - * In case the device tree blob was not passed as argument try - * to use the statically embedded one. - */ - if (dtbp == NULL) - dtbp = &fdt_static_dtb; -#endif - if (OF_install(OFW_FDT, 0) == FALSE) - while (1); - if (OF_init((void *)dtbp) != 0) - while (1); - OF_interpret("perform-fixup", 0); - - chosen = OF_finddevice("/chosen"); - if (OF_getprop(chosen, "cpumask", &mask, sizeof(mask)) != -1) { - xlp_hw_thread_mask = mask; - } - - if (OF_getprop(chosen, "bootargs", buf, sizeof(buf)) != -1) - boothowto |= boot_parse_cmdline(buf); -} -#else -/* - * arg is a pointer to the environment block, the format of the block is - * a=xyz\0b=pqr\0\0 - */ -static void -xlp_bootargs_init(__register_t arg) -{ - char buf[2048]; /* early stack is big enough */ - char *p, *v, *n; - uint32_t mask; - - /* - * provide backward compat for passing cpu mask as arg - */ - if (arg & 1) { - xlp_hw_thread_mask = arg; - return; - } - - p = (void *)(intptr_t)arg; - while (*p != '\0') { - strlcpy(buf, p, sizeof(buf)); - v = buf; - n = strsep(&v, "="); - if (v == NULL) - kern_setenv(n, "1"); - else - kern_setenv(n, v); - p += strlen(p) + 1; - } - - /* CPU mask can be passed thru env */ - if (getenv_uint("cpumask", &mask) != 0) - xlp_hw_thread_mask = mask; - - /* command line argument */ - v = kern_getenv("bootargs"); - if (v != NULL) { - strlcpy(buf, v, sizeof(buf)); - boothowto |= boot_parse_cmdline(buf); - freeenv(v); - } -} -#endif - -static void -mips_init(void) -{ - init_param1(); - init_param2(physmem); - - mips_cpu_init(); - cpuinfo.cache_coherent_dma = TRUE; - pmap_bootstrap(); - mips_proc0_init(); - mutex_init(); -#ifdef DDB - kdb_init(); - if (boothowto & RB_KDB) { - kdb_enter("Boot flags requested debugger", NULL); - } -#endif -} - -unsigned int -platform_get_timecount(struct timecounter *tc __unused) -{ - uint64_t count = nlm_pic_read_timer(xlp_pic_base, PIC_CLOCK_TIMER); - - return (unsigned int)~count; -} - -static void -xlp_pic_init(void) -{ - struct timecounter pic_timecounter = { - platform_get_timecount, /* get_timecount */ - 0, /* no poll_pps */ - ~0U, /* counter_mask */ - XLP_IO_CLK, /* frequency */ - "XLRPIC", /* name */ - 2000, /* quality (adjusted in code) */ - }; - int i; - int maxirt; - - xlp_pic_base = nlm_get_pic_regbase(0); /* TOOD: Add other nodes */ - maxirt = nlm_read_reg(nlm_get_pic_pcibase(nlm_nodeid()), - XLP_PCI_DEVINFO_REG0); - printf("Initializing PIC...@%jx %d IRTs\n", (uintmax_t)xlp_pic_base, - maxirt); - /* Bind all PIC irqs to cpu 0 */ - for (i = 0; i < maxirt; i++) - nlm_pic_write_irt(xlp_pic_base, i, 0, 0, 1, 0, - 1, 0, 0x1); - - nlm_pic_set_timer(xlp_pic_base, PIC_CLOCK_TIMER, ~0ULL, 0, 0); - platform_timecounter = &pic_timecounter; -} - -#if defined(__mips_n32) || defined(__mips_n64) /* PHYSADDR_64_BIT */ -#ifdef XLP_SIM -#define XLP_MEM_LIM 0x200000000ULL -#else -#define XLP_MEM_LIM 0x10000000000ULL -#endif -#else -#define XLP_MEM_LIM 0xfffff000UL -#endif -static vm_paddr_t xlp_mem_excl[] = { - 0, 0, /* for kernel image region, see xlp_mem_init */ - 0x0c000000, 0x14000000, /* uboot area, cms queue and other stuff */ - 0x1fc00000, 0x1fd00000, /* reset vec */ - 0x1e000000, 0x1e200000, /* poe buffers */ -}; - -static int -mem_exclude_add(vm_paddr_t *avail, vm_paddr_t mstart, vm_paddr_t mend) -{ - int i, pos; - - pos = 0; - for (i = 0; i < nitems(xlp_mem_excl); i += 2) { - if (mstart > xlp_mem_excl[i + 1]) - continue; - if (mstart < xlp_mem_excl[i]) { - avail[pos++] = mstart; - if (mend < xlp_mem_excl[i]) - avail[pos++] = mend; - else - avail[pos++] = xlp_mem_excl[i]; - } - mstart = xlp_mem_excl[i + 1]; - if (mend <= mstart) - break; - } - if (mstart < mend) { - avail[pos++] = mstart; - avail[pos++] = mend; - } - return (pos); -} - -static void -xlp_mem_init(void) -{ - vm_paddr_t physsz, tmp; - uint64_t bridgebase, base, lim, val; - int i, j, k, n; - - /* update kernel image area in exclude regions */ - tmp = (vm_paddr_t)MIPS_KSEG0_TO_PHYS(&_end); - tmp = round_page(tmp) + 0x20000; /* round up */ - xlp_mem_excl[1] = tmp; - - printf("Memory (from DRAM BARs):\n"); - bridgebase = nlm_get_bridge_regbase(0); /* TODO: Add other nodes */ - physsz = 0; - for (i = 0, j = 0; i < 8; i++) { - val = nlm_read_bridge_reg(bridgebase, BRIDGE_DRAM_BAR(i)); - val = (val >> 12) & 0xfffff; - base = val << 20; - val = nlm_read_bridge_reg(bridgebase, BRIDGE_DRAM_LIMIT(i)); - val = (val >> 12) & 0xfffff; - if (val == 0) /* BAR not enabled */ - continue; - lim = (val + 1) << 20; - printf(" BAR %d: %#jx - %#jx : ", i, (intmax_t)base, - (intmax_t)lim); - - if (lim <= base) { - printf("\tskipped - malformed %#jx -> %#jx\n", - (intmax_t)base, (intmax_t)lim); - continue; - } else if (base >= XLP_MEM_LIM) { - printf(" skipped - outside usable limit %#jx.\n", - (intmax_t)XLP_MEM_LIM); - continue; - } else if (lim >= XLP_MEM_LIM) { - lim = XLP_MEM_LIM; - printf(" truncated to %#jx.\n", (intmax_t)XLP_MEM_LIM); - } else - printf(" usable\n"); - - /* exclude unusable regions from BAR and add rest */ - n = mem_exclude_add(&phys_avail[j], base, lim); - for (k = j; k < j + n; k += 2) { - physsz += phys_avail[k + 1] - phys_avail[k]; - printf("\tMem[%d]: %#jx - %#jx\n", k/2, - (intmax_t)phys_avail[k], (intmax_t)phys_avail[k+1]); - } - j = k; - } - - /* setup final entry with 0 */ - phys_avail[j] = phys_avail[j + 1] = 0; - - /* copy phys_avail to dump_avail */ - for (i = 0; i <= j + 1; i++) - dump_avail[i] = phys_avail[i]; - - realmem = physmem = btoc(physsz); -} - -void -platform_start(__register_t a0 __unused, - __register_t a1 __unused, - __register_t a2 __unused, - __register_t a3 __unused) -{ - - /* Initialize pcpu stuff */ - mips_pcpu0_init(); - - /* initialize console so that we have printf */ - boothowto |= (RB_SERIAL | RB_MULTIPLE); /* Use multiple consoles */ - - init_static_kenv(boot1_env, sizeof(boot1_env)); - xlp_bootargs_init(a0); - - /* clockrate used by delay, so initialize it here */ - xlp_cpu_frequency = xlp_get_cpu_frequency(0, 0); - cpu_clock = xlp_cpu_frequency / 1000000; - mips_timer_early_init(xlp_cpu_frequency); - - /* Init console please */ - cninit(); - - /* Early core init and fixes for errata */ - xlp_setup_core(); - - xlp_parse_mmu_options(); - xlp_mem_init(); - - bcopy(XLPResetEntry, (void *)MIPS_RESET_EXC_VEC, - XLPResetEntryEnd - XLPResetEntry); -#ifdef SMP - /* - * We will enable the other threads in core 0 here - * so that the TLB and cache info is correct when - * mips_init runs - */ - xlp_enable_threads(xlp_mmuval); -#endif - /* setup for the startup core */ - xlp_setup_mmu(); - - xlp_enable_blocks(); - - /* Read/Guess/setup board information */ - nlm_board_info_setup(); - - /* MIPS generic init */ - mips_init(); - - /* - * XLP specific post initialization - * initialize other on chip stuff - */ - xlp_pic_init(); - - mips_timer_init_params(xlp_cpu_frequency, 0); -} - -void -platform_cpu_init() -{ -} - -void -platform_reset(void) -{ - uint64_t sysbase = nlm_get_sys_regbase(0); - - nlm_write_sys_reg(sysbase, SYS_CHIP_RESET, 1); - for( ; ; ) - __asm __volatile("wait"); -} - -#ifdef SMP -/* - * XLP threads are started simultaneously when we enable threads, this will - * ensure that the threads are blocked in platform_init_ap, until they are - * ready to proceed to smp_init_secondary() - */ -static volatile int thr_unblock[4]; - -int -platform_start_ap(int cpuid) -{ - uint32_t coremask, val; - uint64_t sysbase = nlm_get_sys_regbase(0); - int hwtid = xlp_cpuid_to_hwtid[cpuid]; - int core, thr; - - core = hwtid / 4; - thr = hwtid % 4; - if (thr == 0) { - /* First thread in core, do core wake up */ - coremask = 1u << core; - - /* Enable core clock */ - val = nlm_read_sys_reg(sysbase, SYS_CORE_DFS_DIS_CTRL); - val &= ~coremask; - nlm_write_sys_reg(sysbase, SYS_CORE_DFS_DIS_CTRL, val); - - /* Remove CPU Reset */ - val = nlm_read_sys_reg(sysbase, SYS_CPU_RESET); - val &= ~coremask & 0xff; - nlm_write_sys_reg(sysbase, SYS_CPU_RESET, val); - - if (bootverbose) - printf("Waking up core %d ...", core); - - /* Poll for CPU to mark itself coherent */ - do { - val = nlm_read_sys_reg(sysbase, SYS_CPU_NONCOHERENT_MODE); - } while ((val & coremask) != 0); - if (bootverbose) - printf("Done\n"); - } else { - /* otherwise release the threads stuck in platform_init_ap */ - thr_unblock[thr] = 1; - } - - return (0); -} - -void -platform_init_ap(int cpuid) -{ - uint32_t stat; - int thr; - - /* The first thread has to setup the MMU and enable other threads */ - thr = nlm_threadid(); - if (thr == 0) { - xlp_setup_core(); - xlp_enable_threads(xlp_mmuval); - } else { - /* - * FIXME busy wait here eats too many cycles, especially - * in the core 0 while bootup - */ - while (thr_unblock[thr] == 0) - __asm__ __volatile__ ("nop;nop;nop;nop"); - thr_unblock[thr] = 0; - } - - xlp_setup_mmu(); - stat = mips_rd_status(); - KASSERT((stat & MIPS_SR_INT_IE) == 0, - ("Interrupts enabled in %s!", __func__)); - stat |= MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT; - mips_wr_status(stat); - - nlm_write_c0_eimr(0ull); - xlp_enable_irq(IRQ_IPI); - xlp_enable_irq(IRQ_TIMER); - xlp_enable_irq(IRQ_MSGRING); - - return; -} - -int -platform_ipi_hardintr_num(void) -{ - - return (IRQ_IPI); -} - -int -platform_ipi_softintr_num(void) -{ - - return (-1); -} - -void -platform_ipi_send(int cpuid) -{ - - nlm_pic_send_ipi(xlp_pic_base, xlp_cpuid_to_hwtid[cpuid], - platform_ipi_hardintr_num(), 0); -} - -void -platform_ipi_clear(void) -{ -} - -int -platform_processor_id(void) -{ - - return (xlp_hwtid_to_cpuid[nlm_cpuid()]); -} - -void -platform_cpu_mask(cpuset_t *mask) -{ - int i, s; - - CPU_ZERO(mask); - s = xlp_ncores * xlp_threads_per_core; - for (i = 0; i < s; i++) - CPU_SET(i, mask); -} - -struct cpu_group * -platform_smp_topo() -{ - - return (smp_topo_2level(CG_SHARE_L2, xlp_ncores, CG_SHARE_L1, - xlp_threads_per_core, CG_FLAG_THREAD)); -} -#endif diff --git a/sys/mips/nlm/xlp_pci.c b/sys/mips/nlm/xlp_pci.c deleted file mode 100644 index a4bcada4891..00000000000 --- a/sys/mips/nlm/xlp_pci.c +++ /dev/null @@ -1,577 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003-2012 Broadcom Corporation - * All Rights Reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN - * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "pcib_if.h" -#include -#include "pci_if.h" - -static int -xlp_pci_attach(device_t dev) -{ - struct pci_devinfo *dinfo; - device_t pcib; - int maxslots, s, f, pcifunchigh, irq; - int busno, node, devoffset; - uint16_t devid; - uint8_t hdrtype; - - /* - * The on-chip devices are on a bus that is almost, but not - * quite, completely like PCI. Add those things by hand. - */ - pcib = device_get_parent(dev); - busno = pcib_get_bus(dev); - maxslots = PCIB_MAXSLOTS(pcib); - for (s = 0; s <= maxslots; s++) { - pcifunchigh = 0; - f = 0; - hdrtype = PCIB_READ_CONFIG(pcib, busno, s, f, PCIR_HDRTYPE, 1); - if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE) - continue; - if (hdrtype & PCIM_MFDEV) - pcifunchigh = PCI_FUNCMAX; - node = s / 8; - for (f = 0; f <= pcifunchigh; f++) { - devoffset = XLP_HDR_OFFSET(node, 0, s % 8, f); - if (!nlm_dev_exists(devoffset)) - continue; - - /* Find if there is a desc for the SoC device */ - devid = PCIB_READ_CONFIG(pcib, busno, s, f, PCIR_DEVICE, 2); - - /* Skip devices that don't have a proper PCI header */ - switch (devid) { - case PCI_DEVICE_ID_NLM_ICI: - case PCI_DEVICE_ID_NLM_PIC: - case PCI_DEVICE_ID_NLM_FMN: - case PCI_DEVICE_ID_NLM_UART: - case PCI_DEVICE_ID_NLM_I2C: - case PCI_DEVICE_ID_NLM_NOR: - case PCI_DEVICE_ID_NLM_MMC: - continue; - case PCI_DEVICE_ID_NLM_EHCI: - irq = PIC_USB_IRQ(f); - PCIB_WRITE_CONFIG(pcib, busno, s, f, - XLP_PCI_DEVSCRATCH_REG0 << 2, - (1 << 8) | irq, 4); - } - dinfo = pci_read_device(pcib, dev, pcib_get_domain(dev), - busno, s, f); - pci_add_child(dev, dinfo); - } - } - return (bus_generic_attach(dev)); -} - -static int -xlp_pci_probe(device_t dev) -{ - device_t pcib; - - pcib = device_get_parent(dev); - /* - * Only the top level bus has SoC devices, leave the rest to - * Generic PCI code - */ - if (strcmp(device_get_nameunit(pcib), "pcib0") != 0) - return (ENXIO); - device_set_desc(dev, "XLP SoCbus"); - return (BUS_PROBE_DEFAULT); -} - -static devclass_t pci_devclass; -static device_method_t xlp_pci_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, xlp_pci_probe), - DEVMETHOD(device_attach, xlp_pci_attach), - DEVMETHOD(bus_rescan, bus_null_rescan), - DEVMETHOD_END -}; - -DEFINE_CLASS_1(pci, xlp_pci_driver, xlp_pci_methods, sizeof(struct pci_softc), - pci_driver); -DRIVER_MODULE(xlp_pci, pcib, xlp_pci_driver, pci_devclass, 0, 0); - -static int -xlp_pcib_probe(device_t dev) -{ - - if (ofw_bus_is_compatible(dev, "netlogic,xlp-pci")) { - device_set_desc(dev, "XLP PCI bus"); - return (BUS_PROBE_DEFAULT); - } - return (ENXIO); -} - -static int -xlp_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) -{ - - switch (which) { - case PCIB_IVAR_DOMAIN: - *result = 0; - return (0); - case PCIB_IVAR_BUS: - *result = 0; - return (0); - } - return (ENOENT); -} - -static int -xlp_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t result) -{ - switch (which) { - case PCIB_IVAR_DOMAIN: - return (EINVAL); - case PCIB_IVAR_BUS: - return (EINVAL); - } - return (ENOENT); -} - -static int -xlp_pcib_maxslots(device_t dev) -{ - - return (PCI_SLOTMAX); -} - -static u_int32_t -xlp_pcib_read_config(device_t dev, u_int b, u_int s, u_int f, - u_int reg, int width) -{ - uint32_t data = 0; - uint64_t cfgaddr; - int regindex = reg/sizeof(uint32_t); - - cfgaddr = nlm_pcicfg_base(XLP_HDR_OFFSET(0, b, s, f)); - if ((width == 2) && (reg & 1)) - return 0xFFFFFFFF; - else if ((width == 4) && (reg & 3)) - return 0xFFFFFFFF; - - /* - * The intline and int pin of SoC devices are DOA, except - * for bridges (slot %8 == 1). - * use the values we stashed in a writable PCI scratch reg. - */ - if (b == 0 && regindex == 0xf && s % 8 > 1) - regindex = XLP_PCI_DEVSCRATCH_REG0; - - data = nlm_read_pci_reg(cfgaddr, regindex); - if (width == 1) - return ((data >> ((reg & 3) << 3)) & 0xff); - else if (width == 2) - return ((data >> ((reg & 3) << 3)) & 0xffff); - else - return (data); -} - -static void -xlp_pcib_write_config(device_t dev, u_int b, u_int s, u_int f, - u_int reg, u_int32_t val, int width) -{ - uint64_t cfgaddr; - uint32_t data = 0; - int regindex = reg / sizeof(uint32_t); - - cfgaddr = nlm_pcicfg_base(XLP_HDR_OFFSET(0, b, s, f)); - if ((width == 2) && (reg & 1)) - return; - else if ((width == 4) && (reg & 3)) - return; - - if (width == 1) { - data = nlm_read_pci_reg(cfgaddr, regindex); - data = (data & ~(0xff << ((reg & 3) << 3))) | - (val << ((reg & 3) << 3)); - } else if (width == 2) { - data = nlm_read_pci_reg(cfgaddr, regindex); - data = (data & ~(0xffff << ((reg & 3) << 3))) | - (val << ((reg & 3) << 3)); - } else { - data = val; - } - - /* - * use shadow reg for intpin/intline which are dead - */ - if (b == 0 && regindex == 0xf && s % 8 > 1) - regindex = XLP_PCI_DEVSCRATCH_REG0; - nlm_write_pci_reg(cfgaddr, regindex, data); -} - -/* - * Enable byte swap in hardware when compiled big-endian. - * Programs a link's PCIe SWAP regions from the link's IO and MEM address - * ranges. - */ -static void -xlp_pcib_hardware_swap_enable(int node, int link) -{ -#if BYTE_ORDER == BIG_ENDIAN - uint64_t bbase, linkpcibase; - uint32_t bar; - int pcieoffset; - - pcieoffset = XLP_IO_PCIE_OFFSET(node, link); - if (!nlm_dev_exists(pcieoffset)) - return; - - bbase = nlm_get_bridge_regbase(node); - linkpcibase = nlm_pcicfg_base(pcieoffset); - bar = nlm_read_bridge_reg(bbase, BRIDGE_PCIEMEM_BASE0 + link); - nlm_write_pci_reg(linkpcibase, PCIE_BYTE_SWAP_MEM_BASE, bar); - - bar = nlm_read_bridge_reg(bbase, BRIDGE_PCIEMEM_LIMIT0 + link); - nlm_write_pci_reg(linkpcibase, PCIE_BYTE_SWAP_MEM_LIM, bar | 0xFFF); - - bar = nlm_read_bridge_reg(bbase, BRIDGE_PCIEIO_BASE0 + link); - nlm_write_pci_reg(linkpcibase, PCIE_BYTE_SWAP_IO_BASE, bar); - - bar = nlm_read_bridge_reg(bbase, BRIDGE_PCIEIO_LIMIT0 + link); - nlm_write_pci_reg(linkpcibase, PCIE_BYTE_SWAP_IO_LIM, bar | 0xFFF); -#endif -} - -static int -xlp_pcib_attach(device_t dev) -{ - int node, link; - - /* enable hardware swap on all nodes/links */ - for (node = 0; node < XLP_MAX_NODES; node++) - for (link = 0; link < 4; link++) - xlp_pcib_hardware_swap_enable(node, link); - - device_add_child(dev, "pci", -1); - bus_generic_attach(dev); - return (0); -} - -/* - * XLS PCIe can have upto 4 links, and each link has its on IRQ - * Find the link on which the device is on - */ -static int -xlp_pcie_link(device_t pcib, device_t dev) -{ - device_t parent, tmp; - - /* find the lane on which the slot is connected to */ - tmp = dev; - while (1) { - parent = device_get_parent(tmp); - if (parent == NULL || parent == pcib) { - device_printf(dev, "Cannot find parent bus\n"); - return (-1); - } - if (strcmp(device_get_nameunit(parent), "pci0") == 0) - break; - tmp = parent; - } - return (pci_get_function(tmp)); -} - -static int -xlp_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs) -{ - int i, link; - - /* - * Each link has 32 MSIs that can be allocated, but for now - * we only support one device per link. - * msi_alloc() equivalent is needed when we start supporting - * bridges on the PCIe link. - */ - link = xlp_pcie_link(pcib, dev); - if (link == -1) - return (ENXIO); - - /* - * encode the irq so that we know it is a MSI interrupt when we - * setup interrupts - */ - for (i = 0; i < count; i++) - irqs[i] = 64 + link * 32 + i; - - return (0); -} - -static int -xlp_release_msi(device_t pcib, device_t dev, int count, int *irqs) -{ - return (0); -} - -static int -xlp_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr, - uint32_t *data) -{ - int link; - - if (irq < 64) { - device_printf(dev, "%s: map_msi for irq %d - ignored", - device_get_nameunit(pcib), irq); - return (ENXIO); - } - link = (irq - 64) / 32; - *addr = MIPS_MSI_ADDR(0); - *data = MIPS_MSI_DATA(PIC_PCIE_IRQ(link)); - return (0); -} - -static void -bridge_pcie_ack(int irq, void *arg) -{ - uint32_t node,reg; - uint64_t base; - - node = nlm_nodeid(); - reg = PCIE_MSI_STATUS; - - switch (irq) { - case PIC_PCIE_0_IRQ: - base = nlm_pcicfg_base(XLP_IO_PCIE0_OFFSET(node)); - break; - case PIC_PCIE_1_IRQ: - base = nlm_pcicfg_base(XLP_IO_PCIE1_OFFSET(node)); - break; - case PIC_PCIE_2_IRQ: - base = nlm_pcicfg_base(XLP_IO_PCIE2_OFFSET(node)); - break; - case PIC_PCIE_3_IRQ: - base = nlm_pcicfg_base(XLP_IO_PCIE3_OFFSET(node)); - break; - default: - return; - } - - nlm_write_pci_reg(base, reg, 0xFFFFFFFF); - return; -} - -static int -mips_platform_pcib_setup_intr(device_t dev, device_t child, - struct resource *irq, int flags, driver_filter_t *filt, - driver_intr_t *intr, void *arg, void **cookiep) -{ - int error = 0; - int xlpirq; - - error = rman_activate_resource(irq); - if (error) - return error; - if (rman_get_start(irq) != rman_get_end(irq)) { - device_printf(dev, "Interrupt allocation %ju != %ju\n", - rman_get_start(irq), rman_get_end(irq)); - return (EINVAL); - } - xlpirq = rman_get_start(irq); - if (xlpirq == 0) - return (0); - - if (strcmp(device_get_name(dev), "pcib") != 0) - return (0); - - /* - * temporary hack for MSI, we support just one device per - * link, and assign the link interrupt to the device interrupt - */ - if (xlpirq >= 64) { - int node, val, link; - uint64_t base; - - xlpirq -= 64; - if (xlpirq % 32 != 0) - return (0); - - node = nlm_nodeid(); - link = xlpirq / 32; - base = nlm_pcicfg_base(XLP_IO_PCIE_OFFSET(node,link)); - - /* MSI Interrupt Vector enable at bridge's configuration */ - nlm_write_pci_reg(base, PCIE_MSI_EN, PCIE_MSI_VECTOR_INT_EN); - - val = nlm_read_pci_reg(base, PCIE_INT_EN0); - /* MSI Interrupt enable at bridge's configuration */ - nlm_write_pci_reg(base, PCIE_INT_EN0, - (val | PCIE_MSI_INT_EN)); - - /* legacy interrupt disable at bridge */ - val = nlm_read_pci_reg(base, PCIE_BRIDGE_CMD); - nlm_write_pci_reg(base, PCIE_BRIDGE_CMD, - (val | PCIM_CMD_INTxDIS)); - - /* MSI address update at bridge */ - nlm_write_pci_reg(base, PCIE_BRIDGE_MSI_ADDRL, - MSI_MIPS_ADDR_BASE); - nlm_write_pci_reg(base, PCIE_BRIDGE_MSI_ADDRH, 0); - - val = nlm_read_pci_reg(base, PCIE_BRIDGE_MSI_CAP); - /* MSI capability enable at bridge */ - nlm_write_pci_reg(base, PCIE_BRIDGE_MSI_CAP, - (val | (PCIM_MSICTRL_MSI_ENABLE << 16) | - (PCIM_MSICTRL_MMC_32 << 16))); - xlpirq = PIC_PCIE_IRQ(link); - } - - /* if it is for real PCIe, we need to ack at bridge too */ - if (xlpirq >= PIC_PCIE_IRQ(0) && xlpirq <= PIC_PCIE_IRQ(3)) - xlp_set_bus_ack(xlpirq, bridge_pcie_ack, NULL); - cpu_establish_hardintr(device_get_name(child), filt, intr, arg, - xlpirq, flags, cookiep); - - return (0); -} - -static int -mips_platform_pcib_teardown_intr(device_t dev, device_t child, - struct resource *irq, void *cookie) -{ - if (strcmp(device_get_name(child), "pci") == 0) { - /* if needed reprogram the pic to clear pcix related entry */ - device_printf(dev, "teardown intr\n"); - } - return (bus_generic_teardown_intr(dev, child, irq, cookie)); -} - -static int -mips_pcib_route_interrupt(device_t bus, device_t dev, int pin) -{ - int f, d; - - /* - * Validate requested pin number. - */ - if ((pin < 1) || (pin > 4)) - return (255); - - if (pci_get_bus(dev) == 0 && - pci_get_vendor(dev) == PCI_VENDOR_NETLOGIC) { - f = pci_get_function(dev); - d = pci_get_slot(dev) % 8; - - /* - * For PCIe links, return link IRT, for other SoC devices - * get the IRT from its PCIe header - */ - if (d == 1) - return (PIC_PCIE_IRQ(f)); - else - return (255); /* use intline, don't reroute */ - } else { - /* Regular PCI devices */ - return (PIC_PCIE_IRQ(xlp_pcie_link(bus, dev))); - } -} - -static device_method_t xlp_pcib_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, xlp_pcib_probe), - DEVMETHOD(device_attach, xlp_pcib_attach), - - /* Bus interface */ - DEVMETHOD(bus_read_ivar, xlp_pcib_read_ivar), - DEVMETHOD(bus_write_ivar, xlp_pcib_write_ivar), - DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), - DEVMETHOD(bus_release_resource, bus_generic_release_resource), - DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), - DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), - DEVMETHOD(bus_setup_intr, mips_platform_pcib_setup_intr), - DEVMETHOD(bus_teardown_intr, mips_platform_pcib_teardown_intr), - - /* pcib interface */ - DEVMETHOD(pcib_maxslots, xlp_pcib_maxslots), - DEVMETHOD(pcib_read_config, xlp_pcib_read_config), - DEVMETHOD(pcib_write_config, xlp_pcib_write_config), - DEVMETHOD(pcib_route_interrupt, mips_pcib_route_interrupt), - DEVMETHOD(pcib_request_feature, pcib_request_feature_allow), - - DEVMETHOD(pcib_alloc_msi, xlp_alloc_msi), - DEVMETHOD(pcib_release_msi, xlp_release_msi), - DEVMETHOD(pcib_map_msi, xlp_map_msi), - - DEVMETHOD_END -}; - -static driver_t xlp_pcib_driver = { - "pcib", - xlp_pcib_methods, - 1, /* no softc */ -}; - -static devclass_t pcib_devclass; -DRIVER_MODULE(xlp_pcib, simplebus, xlp_pcib_driver, pcib_devclass, 0, 0); diff --git a/sys/mips/nlm/xlp_simplebus.c b/sys/mips/nlm/xlp_simplebus.c deleted file mode 100644 index ee6cc10857a..00000000000 --- a/sys/mips/nlm/xlp_simplebus.c +++ /dev/null @@ -1,313 +0,0 @@ -/*- - * Copyright (c) 2015 Broadcom Corporation - * (based on sys/dev/fdt/simplebus.c) - * Copyright (c) 2013 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -/* flash memory region for chipselects */ -#define GBU_MEM_BASE 0x16000000UL -#define GBU_MEM_LIMIT 0x17ffffffUL - -/* - * Device registers in pci ecfg memory region for devices without regular PCI BARs - */ -#define PCI_ECFG_BASE XLP_DEFAULT_IO_BASE -#define PCI_ECFG_LIMIT (XLP_DEFAULT_IO_BASE + 0x0fffffff) - -/* - * Bus interface. - */ -static int xlp_simplebus_probe(device_t dev); -static struct resource *xlp_simplebus_alloc_resource(device_t, device_t, int, - int *, rman_res_t, rman_res_t, rman_res_t, u_int); -static int xlp_simplebus_activate_resource(device_t, device_t, int, - int, struct resource *); -static int xlp_simplebus_setup_intr(device_t, device_t, - struct resource *, int, driver_filter_t *, driver_intr_t *, void *, void **); - -/* - * ofw_bus interface - */ -static int xlp_simplebus_ofw_map_intr(device_t, device_t, phandle_t, - int, pcell_t *); - -static devclass_t simplebus_devclass; -static device_method_t xlp_simplebus_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, xlp_simplebus_probe), - - DEVMETHOD(bus_alloc_resource, xlp_simplebus_alloc_resource), - DEVMETHOD(bus_activate_resource, xlp_simplebus_activate_resource), - DEVMETHOD(bus_setup_intr, xlp_simplebus_setup_intr), - - DEVMETHOD(ofw_bus_map_intr, xlp_simplebus_ofw_map_intr), - DEVMETHOD_END -}; - -DEFINE_CLASS_1(simplebus, xlp_simplebus_driver, xlp_simplebus_methods, - sizeof(struct simplebus_softc), simplebus_driver); -DRIVER_MODULE(xlp_simplebus, ofwbus, xlp_simplebus_driver, simplebus_devclass, - 0, 0); - -static struct rman irq_rman, port_rman, mem_rman, pci_ecfg_rman, gbu_rman; - -static void -xlp_simplebus_init_resources(void) -{ - irq_rman.rm_start = 0; - irq_rman.rm_end = 255; - irq_rman.rm_type = RMAN_ARRAY; - irq_rman.rm_descr = "PCI Mapped Interrupts"; - if (rman_init(&irq_rman) - || rman_manage_region(&irq_rman, 0, 255)) - panic("xlp_simplebus_init_resources irq_rman"); - - port_rman.rm_type = RMAN_ARRAY; - port_rman.rm_descr = "I/O ports"; - if (rman_init(&port_rman) - || rman_manage_region(&port_rman, PCIE_IO_BASE, PCIE_IO_LIMIT)) - panic("xlp_simplebus_init_resources port_rman"); - - mem_rman.rm_type = RMAN_ARRAY; - mem_rman.rm_descr = "I/O memory"; - if (rman_init(&mem_rman) - || rman_manage_region(&mem_rman, PCIE_MEM_BASE, PCIE_MEM_LIMIT)) - panic("xlp_simplebus_init_resources mem_rman"); - - pci_ecfg_rman.rm_type = RMAN_ARRAY; - pci_ecfg_rman.rm_descr = "PCI ECFG IO"; - if (rman_init(&pci_ecfg_rman) || rman_manage_region(&pci_ecfg_rman, - PCI_ECFG_BASE, PCI_ECFG_LIMIT)) - panic("xlp_simplebus_init_resources pci_ecfg_rman"); - - gbu_rman.rm_type = RMAN_ARRAY; - gbu_rman.rm_descr = "Flash region"; - if (rman_init(&gbu_rman) - || rman_manage_region(&gbu_rman, GBU_MEM_BASE, GBU_MEM_LIMIT)) - panic("xlp_simplebus_init_resources gbu_rman"); -} - -static int -xlp_simplebus_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - /* - * FDT data puts a "simple-bus" compatible string on many things that - * have children but aren't really busses in our world. Without a - * ranges property we will fail to attach, so just fail to probe too. - */ - if (!(ofw_bus_is_compatible(dev, "simple-bus") && - ofw_bus_has_prop(dev, "ranges")) && - (ofw_bus_get_type(dev) == NULL || strcmp(ofw_bus_get_type(dev), - "soc") != 0)) - return (ENXIO); - - xlp_simplebus_init_resources(); - device_set_desc(dev, "XLP SoC bus"); - - return (BUS_PROBE_SPECIFIC); -} - -static struct resource * -xlp_simplebus_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct rman *rm; - struct resource *rv; - struct resource_list_entry *rle; - struct simplebus_softc *sc; - struct simplebus_devinfo *di; - bus_space_tag_t bustag; - int j, isdefault, passthrough, needsactivate; - - passthrough = (device_get_parent(child) != bus); - needsactivate = flags & RF_ACTIVE; - sc = device_get_softc(bus); - di = device_get_ivars(child); - rle = NULL; - bustag = NULL; - - if (!passthrough) { - isdefault = RMAN_IS_DEFAULT_RANGE(start, end); - if (isdefault) { - rle = resource_list_find(&di->rl, type, *rid); - if (rle == NULL) - return (NULL); - if (rle->res != NULL) - panic("%s: resource entry is busy", __func__); - start = rle->start; - count = ulmax(count, rle->count); - end = ulmax(rle->end, start + count - 1); - } - if (type == SYS_RES_MEMORY) { - /* Remap through ranges property */ - for (j = 0; j < sc->nranges; j++) { - if (start >= sc->ranges[j].bus && end < - sc->ranges[j].bus + sc->ranges[j].size) { - start -= sc->ranges[j].bus; - start += sc->ranges[j].host; - end -= sc->ranges[j].bus; - end += sc->ranges[j].host; - break; - } - } - if (j == sc->nranges && sc->nranges != 0) { - if (bootverbose) - device_printf(bus, "Could not map resource " - "%#jx-%#jx\n", start, end); - return (NULL); - } - } - } - switch (type) { - case SYS_RES_IRQ: - rm = &irq_rman; - break; - case SYS_RES_IOPORT: - rm = &port_rman; - bustag = rmi_bus_space; - break; - case SYS_RES_MEMORY: - if (start >= GBU_MEM_BASE && end <= GBU_MEM_LIMIT) { - rm = &gbu_rman; - bustag = rmi_bus_space; - } else if (start >= PCI_ECFG_BASE && end <= PCI_ECFG_LIMIT) { - rm = &pci_ecfg_rman; - bustag = rmi_uart_bus_space; - } else if (start >= PCIE_MEM_BASE && end <= PCIE_MEM_LIMIT) { - rm = &mem_rman; - bustag = rmi_bus_space; - } else { - if (bootverbose) - device_printf(bus, "Invalid MEM range" - "%#jx-%#jx\n", start, end); - return (NULL); - } - break; - default: - return (NULL); - } - - rv = rman_reserve_resource(rm, start, end, count, flags, child); - if (rv == NULL) { - device_printf(bus, "%s: could not reserve resource for %s\n", - __func__, device_get_nameunit(child)); - return (NULL); - } - - rman_set_rid(rv, *rid); - if (bustag != NULL) - rman_set_bustag(rv, bustag); - - if (needsactivate) { - if (bus_activate_resource(child, type, *rid, rv)) { - device_printf(bus, "%s: could not activate resource\n", - __func__); - rman_release_resource(rv); - return (NULL); - } - } - - return (rv); -} - -static int -xlp_simplebus_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - void *vaddr; - vm_paddr_t paddr; - vm_size_t psize; - - /* - * If this is a memory resource, use pmap_mapdev to map it. - */ - if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) { - paddr = rman_get_start(r); - psize = rman_get_size(r); - vaddr = pmap_mapdev(paddr, psize); - - rman_set_virtual(r, vaddr); - rman_set_bushandle(r, (bus_space_handle_t)(uintptr_t)vaddr); - } - - return (rman_activate_resource(r)); -} - -static int -xlp_simplebus_setup_intr(device_t dev, device_t child, struct resource *res, int flags, - driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep) -{ - register_t s; - int irq; - - /* setup irq */ - s = intr_disable(); - irq = rman_get_start(res); - cpu_establish_hardintr(device_get_nameunit(child), filt, intr, arg, - irq, flags, cookiep); - intr_restore(s); - return (0); -} - -static int -xlp_simplebus_ofw_map_intr(device_t dev, device_t child, phandle_t iparent, int icells, - pcell_t *irq) -{ - - return ((int)irq[0]); -} diff --git a/sys/modules/Makefile b/sys/modules/Makefile index fed8c933ee9..c90ac965a61 100644 --- a/sys/modules/Makefile +++ b/sys/modules/Makefile @@ -424,8 +424,7 @@ _autofs= autofs .endif .if ${MK_CDDL} != "no" || defined(ALL_MODULES) -.if (${MACHINE_CPUARCH} != "arm" || ${MACHINE_ARCH:Marmv[67]*} != "") && \ - ${MACHINE_CPUARCH} != "mips" +.if ${MACHINE_CPUARCH} != "arm" || ${MACHINE_ARCH:Marmv[67]*} != "" .if ${KERN_OPTS:MKDTRACE_HOOKS} SUBDIR+= dtrace .endif @@ -603,22 +602,19 @@ _fxp= fxp _ispfw= ispfw _ti= ti -.if ${MACHINE_CPUARCH} != "mips" _mwlfw= mwlfw _otusfw= otusfw _ralfw= ralfw _rtwnfw= rtwnfw -.endif + .endif .if ${MK_SOURCELESS_UCODE} != "no" && ${MACHINE_CPUARCH} != "arm" && \ - ${MACHINE_CPUARCH} != "mips" && \ - ${MACHINE_ARCH} != "powerpc" && ${MACHINE_ARCH} != "powerpcspe" && \ ${MACHINE_CPUARCH} != "riscv" _cxgbe= cxgbe .endif -.if ${MACHINE_ARCH} == "amd64" || ${MACHINE_ARCH} == "arm64" || ${MACHINE_ARCH:Mpowerpc64*} +.if ${MACHINE_ARCH} == "amd64" || ${MACHINE_ARCH} == "arm64" _ice= ice .if ${MK_SOURCELESS_UCODE} != "no" _ice_ddp= ice_ddp @@ -636,32 +632,23 @@ _if_cgem= if_cgem .endif # These rely on 64bit atomics -.if ${MACHINE_ARCH} != "powerpc" && ${MACHINE_ARCH} != "powerpcspe" && \ - ${MACHINE_CPUARCH} != "mips" _mps= mps _mpr= mpr -.endif + .if ${MK_TESTS} != "no" || defined(ALL_MODULES) SUBDIR+= tests .endif -.if ${MK_ZFS} != "no" || (defined(ALL_MODULES) && ${MACHINE_CPUARCH} != "powerpc") +.if ${MK_ZFS} != "no" || defined(ALL_MODULES) SUBDIR+= zfs .endif -.if (${MACHINE_CPUARCH} == "mips" && ${MACHINE_ARCH:Mmips64} == "") -_hwpmc_mips24k= hwpmc_mips24k -_hwpmc_mips74k= hwpmc_mips74k -.endif - .if ${MACHINE_CPUARCH} != "aarch64" && ${MACHINE_CPUARCH} != "arm" && \ - ${MACHINE_CPUARCH} != "mips" && ${MACHINE_CPUARCH} != "powerpc" && \ ${MACHINE_CPUARCH} != "riscv" _syscons= syscons .endif -.if ${MACHINE_CPUARCH} != "mips" # no BUS_SPACE_UNSPECIFIED # No barrier instruction support (specific to this driver) _sym= sym @@ -669,7 +656,6 @@ _sym= sym .if ${MK_SOURCELESS_UCODE} != "no" _cxgb= cxgb .endif -.endif .if ${MACHINE_CPUARCH} == "aarch64" _allwinner= allwinner @@ -853,31 +839,6 @@ _cfi= cfi _cpsw= cpsw .endif -.if ${MACHINE_CPUARCH} == "powerpc" -_aacraid= aacraid -_agp= agp -_an= an -_cardbus= cardbus -_cbb= cbb -_cfi= cfi -_cpufreq= cpufreq -_exca= exca -_ffec= ffec -_nvd= nvd -_nvme= nvme -_pccard= pccard -.endif - -.if ${MACHINE_ARCH:Mpowerpc64*} != "" -_ipmi= ipmi -_ixl= ixl -_nvram= opal_nvram -.endif -.if ${MACHINE_CPUARCH} == "powerpc" && ${MACHINE_ARCH} != "powerpcspe" -# Don't build powermac_nvram for powerpcspe, it's never supported. -_nvram+= powermac_nvram -.endif - .if (${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64" || \ ${MACHINE_ARCH:Marmv[67]*} != "" || ${MACHINE_CPUARCH} == "i386") _cloudabi32= cloudabi32 diff --git a/sys/modules/aacraid/Makefile b/sys/modules/aacraid/Makefile index 22815f9b4e5..b9ddb4371a1 100644 --- a/sys/modules/aacraid/Makefile +++ b/sys/modules/aacraid/Makefile @@ -7,9 +7,6 @@ SUBDIR= aacraid_linux KMOD= aacraid SRCS= aacraid.c aacraid_pci.c aacraid_cam.c -.if ${MACHINE_CPUARCH} == "powerpc" -SRCS+= aacraid_endian.c -.endif SRCS+= opt_scsi.h opt_cam.h opt_aacraid.h SRCS+= device_if.h bus_if.h pci_if.h diff --git a/sys/modules/agp/Makefile b/sys/modules/agp/Makefile index 8841c577692..c6dfe3915d0 100644 --- a/sys/modules/agp/Makefile +++ b/sys/modules/agp/Makefile @@ -13,9 +13,6 @@ SRCS+= agp_amd64.c .if ${MACHINE_CPUARCH} == "amd64" SRCS+= agp_amd64.c agp_i810.c agp_via.c .endif -.if ${MACHINE_CPUARCH} == "powerpc" -SRCS+= agp_apple.c -.endif SRCS+= device_if.h bus_if.h agp_if.h pci_if.h SRCS+= opt_agp.h diff --git a/sys/modules/ar71xx/Makefile b/sys/modules/ar71xx/Makefile deleted file mode 100644 index 1020cf0c478..00000000000 --- a/sys/modules/ar71xx/Makefile +++ /dev/null @@ -1,29 +0,0 @@ -# -# -# Copyright (c) 2011 Adrian Chadd. All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -# SUCH DAMAGE. -# - -SUBDIR = ar71xx_ehci ar71xx_ohci - -.include diff --git a/sys/modules/ar71xx/ar71xx_ehci/Makefile b/sys/modules/ar71xx/ar71xx_ehci/Makefile deleted file mode 100644 index 994b24d54bd..00000000000 --- a/sys/modules/ar71xx/ar71xx_ehci/Makefile +++ /dev/null @@ -1,42 +0,0 @@ -# -# Copyright (c) 2012 Adrian Chadd, Xenion Pty Ltd -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer, -# without modification. -# 2. Redistributions in binary form must reproduce at minimum a disclaimer -# similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any -# redistribution must be conditioned upon including a substantially -# similar Disclaimer requirement for further binary redistribution. -# -# NO WARRANTY -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY -# AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL -# THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, -# OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER -# IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -# THE POSSIBILITY OF SUCH DAMAGES. -# -# - -.PATH: ${SRCTOP}/sys/mips/atheros/ - -KMOD= ar71xx_ehci -SRCS= ar71xx_ehci.c -SRCS+= device_if.h bus_if.h usb_if.h opt_usb.h opt_bus.h - -.PATH: ${SRCTOP}/sys/dev/usb/controller/ -SRCS+= ehci.c - -CFLAGS+= -I. -I${SRCTOP}/sys/mips/atheros - -.include diff --git a/sys/modules/ar71xx/ar71xx_ohci/Makefile b/sys/modules/ar71xx/ar71xx_ohci/Makefile deleted file mode 100644 index a1a29cf7739..00000000000 --- a/sys/modules/ar71xx/ar71xx_ohci/Makefile +++ /dev/null @@ -1,42 +0,0 @@ -# -# Copyright (c) 2012 Adrian Chadd, Xenion Pty Ltd -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer, -# without modification. -# 2. Redistributions in binary form must reproduce at minimum a disclaimer -# similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any -# redistribution must be conditioned upon including a substantially -# similar Disclaimer requirement for further binary redistribution. -# -# NO WARRANTY -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY -# AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL -# THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, -# OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER -# IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF -# THE POSSIBILITY OF SUCH DAMAGES. -# -# - -.PATH: ${SRCTOP}/sys/mips/atheros/ - -KMOD= ar71xx_ohci -SRCS= ar71xx_ohci.c -SRCS+= device_if.h bus_if.h usb_if.h opt_usb.h opt_bus.h - -CFLAGS+= -I. -I${SRCTOP}/sys/mips/atheros - -.PATH: ${SRCTOP}/sys/dev/usb/controller/ -SRCS+= ohci.c - -.include diff --git a/sys/modules/cas/Makefile b/sys/modules/cas/Makefile index 45d47573456..0a844f5526c 100644 --- a/sys/modules/cas/Makefile +++ b/sys/modules/cas/Makefile @@ -4,8 +4,5 @@ KMOD= if_cas SRCS= bus_if.h device_if.h if_cas.c miibus_if.h pci_if.h ${ofw_bus_if} opt_platform.h -.if ${MACHINE_CPUARCH} == "powerpc" -ofw_bus_if= ofw_bus_if.h -.endif .include diff --git a/sys/modules/cpufreq/Makefile b/sys/modules/cpufreq/Makefile index 6b88f1a6c02..ba6f2e60441 100644 --- a/sys/modules/cpufreq/Makefile +++ b/sys/modules/cpufreq/Makefile @@ -17,9 +17,5 @@ SRCS+= est.c hwpstate_amd.c p4tcc.c powernow.c hwpstate_intel.c SRCS+= smist.c .endif -.if ${MACHINE} == "powerpc" -.PATH: ${SRCTOP}/sys/powerpc/cpufreq -SRCS+= dfs.c -.endif .include diff --git a/sys/modules/dtrace/Makefile b/sys/modules/dtrace/Makefile index 7e6671354a0..900eb47b38b 100644 --- a/sys/modules/dtrace/Makefile +++ b/sys/modules/dtrace/Makefile @@ -19,15 +19,11 @@ SUBDIR+= fasttrap fbt systrace_linux SUBDIR+= systrace_linux32 .endif .if ${MACHINE_CPUARCH} == "amd64" || \ - ${MACHINE_CPUARCH} == "aarch64" || \ - ${MACHINE_ARCH} == "mips64" || \ - ${MACHINE_ARCH} == "powerpc64" + ${MACHINE_CPUARCH} == "aarch64" SUBDIR+= systrace_freebsd32 .endif .if ${MACHINE_CPUARCH} == "aarch64" || \ ${MACHINE_CPUARCH} == "arm" || \ - ${MACHINE_CPUARCH} == "mips" || \ - ${MACHINE_CPUARCH} == "powerpc" || \ ${MACHINE_CPUARCH} == "riscv" SUBDIR+= fbt .endif diff --git a/sys/modules/dtrace/fasttrap/Makefile b/sys/modules/dtrace/fasttrap/Makefile index 271ac07cfbb..4c1227d0097 100644 --- a/sys/modules/dtrace/fasttrap/Makefile +++ b/sys/modules/dtrace/fasttrap/Makefile @@ -13,9 +13,6 @@ CFLAGS+= ${OPENZFS_CFLAGS} .if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" CFLAGS+= -I${SYSDIR}/cddl/contrib/opensolaris/uts/intel .PATH: ${SYSDIR}/cddl/contrib/opensolaris/uts/intel/dtrace -.elif ${MACHINE_CPUARCH} == "powerpc" -CFLAGS+= -I${SYSDIR}/cddl/contrib/opensolaris/uts/powerpc -.PATH: ${SYSDIR}/cddl/contrib/opensolaris/uts/powerpc/dtrace .endif .PATH: ${SYSDIR}/contrib/openzfs/module/unicode diff --git a/sys/modules/gem/Makefile b/sys/modules/gem/Makefile index 820ff4f7bd5..b6a6a556fe2 100644 --- a/sys/modules/gem/Makefile +++ b/sys/modules/gem/Makefile @@ -5,8 +5,5 @@ KMOD= if_gem SRCS= bus_if.h device_if.h if_gem.c if_gem_pci.c miibus_if.h SRCS+= ${ofw_bus_if} pci_if.h opt_platform.h -.if ${MACHINE_CPUARCH} == "powerpc" -ofw_bus_if= ofw_bus_if.h -.endif .include diff --git a/sys/modules/hwpmc/Makefile b/sys/modules/hwpmc/Makefile index 5a39f02e241..a49b9e24fa1 100644 --- a/sys/modules/hwpmc/Makefile +++ b/sys/modules/hwpmc/Makefile @@ -30,9 +30,5 @@ SRCS+= hwpmc_amd.c hwpmc_core.c hwpmc_intel.c SRCS+= hwpmc_tsc.c hwpmc_x86.c hwpmc_uncore.c .endif -.if ${MACHINE_CPUARCH} == "powerpc" -SRCS+= hwpmc_powerpc.c hwpmc_e500.c hwpmc_mpc7xxx.c hwpmc_ppc970.c \ - hwpmc_power8.c -.endif .include diff --git a/sys/modules/hwpmc_mips24k/Makefile b/sys/modules/hwpmc_mips24k/Makefile deleted file mode 100644 index acff9128d31..00000000000 --- a/sys/modules/hwpmc_mips24k/Makefile +++ /dev/null @@ -1,16 +0,0 @@ -# -# - -.PATH: ${SRCTOP}/sys/dev/hwpmc - -KMOD= hwpmc_mips24k - -SRCS= bus_if.h device_if.h vnode_if.h -SRCS+= hwpmc_mod.c hwpmc_logging.c hwpmc_soft.c -SRCS+= hwpmc_mips.c - -SRCS+= hwpmc_mips24k.c - -SRCS+= opt_hwpmc_hooks.h - -.include diff --git a/sys/modules/hwpmc_mips74k/Makefile b/sys/modules/hwpmc_mips74k/Makefile deleted file mode 100644 index a22529b6114..00000000000 --- a/sys/modules/hwpmc_mips74k/Makefile +++ /dev/null @@ -1,16 +0,0 @@ -# -# - -.PATH: ${SRCTOP}/sys/dev/hwpmc - -KMOD= hwpmc_mips74k - -SRCS= bus_if.h device_if.h vnode_if.h -SRCS+= hwpmc_mod.c hwpmc_logging.c hwpmc_soft.c -SRCS+= hwpmc_mips.c - -SRCS+= hwpmc_mips74k.c - -SRCS+= opt_hwpmc_hooks.h - -.include diff --git a/sys/modules/i2c/iicbb/Makefile b/sys/modules/i2c/iicbb/Makefile index 374bb707728..957216a9b5e 100644 --- a/sys/modules/i2c/iicbb/Makefile +++ b/sys/modules/i2c/iicbb/Makefile @@ -1,7 +1,6 @@ .PATH: ${SRCTOP}/sys/dev/iicbus .if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "arm" || \ - ${MACHINE_CPUARCH} == "mips" || ${MACHINE_CPUARCH} == "powerpc" || \ ${MACHINE_CPUARCH} == "riscv" ofw_bus_if= ofw_bus_if.h .endif diff --git a/sys/modules/ipmi/Makefile b/sys/modules/ipmi/Makefile index 41c4d528531..738b8b223b8 100644 --- a/sys/modules/ipmi/Makefile +++ b/sys/modules/ipmi/Makefile @@ -22,8 +22,6 @@ SRCS+= isa_if.h pci_if.h smbus_if.h SUBDIR+= ipmi_linux -.elif ${MACHINE_ARCH:Mpowerpc64*} != "" -SRCS+= ipmi_opal.c ofw_bus_if.h .endif .include diff --git a/sys/modules/netfpga10g/Makefile b/sys/modules/netfpga10g/Makefile deleted file mode 100644 index d094b17de2e..00000000000 --- a/sys/modules/netfpga10g/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# - -SUBDIR= -SUBDIR+= ${_nf10bmac} - -.if ${MACHINE_CPUARCH} == "mips" -_nf10bmac= nf10bmac -.endif - -.include diff --git a/sys/modules/netfpga10g/nf10bmac/Makefile b/sys/modules/netfpga10g/nf10bmac/Makefile deleted file mode 100644 index d3bdda10d85..00000000000 --- a/sys/modules/netfpga10g/nf10bmac/Makefile +++ /dev/null @@ -1,14 +0,0 @@ - -.PATH: ${SRCTOP}/sys/dev/netfpga10g/nf10bmac - -KMOD= if_nf10bmac -SRCS= if_nf10bmac.c -SRCS+= device_if.h bus_if.h pci_if.h -SRCS+= opt_device_polling.h -SRCS+= opt_netfpga.h - -.if ${MACHINE_CPUARCH} == "mips" -SRCS+= if_nf10bmac_fdt.c ofw_bus_if.h -.endif - -.include diff --git a/sys/modules/opal_nvram/Makefile b/sys/modules/opal_nvram/Makefile deleted file mode 100644 index 8898dbb4629..00000000000 --- a/sys/modules/opal_nvram/Makefile +++ /dev/null @@ -1,9 +0,0 @@ - -.PATH: ${SRCTOP}/sys/powerpc/powernv - -KMOD= opal_nvram -SRCS= opal_nvram.c -SRCS+= bus_if.h device_if.h -SRCS+= ofw_bus_if.h - -.include diff --git a/sys/modules/powermac_nvram/Makefile b/sys/modules/powermac_nvram/Makefile deleted file mode 100644 index 06e3b66e3e1..00000000000 --- a/sys/modules/powermac_nvram/Makefile +++ /dev/null @@ -1,9 +0,0 @@ - -.PATH: ${SRCTOP}/sys/dev/powermac_nvram - -KMOD= powermac_nvram -SRCS= powermac_nvram.c powermac_nvramvar.h -SRCS+= bus_if.h device_if.h -SRCS+= ofw_bus_if.h - -.include diff --git a/sys/modules/scc/Makefile b/sys/modules/scc/Makefile index cd9e5b77422..4fe1c3b03be 100644 --- a/sys/modules/scc/Makefile +++ b/sys/modules/scc/Makefile @@ -1,9 +1,6 @@ .PATH: ${SRCTOP}/sys/dev/scc -.if ${MACHINE_CPUARCH} == "powerpc" -scc_bfe= scc_bfe_macio.c scc_bfe_quicc.c scc_dev_quicc.c -.endif KMOD= scc SRCS= ${scc_bfe} scc_core.c scc_if.c scc_if.h \ diff --git a/sys/modules/sound/driver/Makefile b/sys/modules/sound/driver/Makefile index c7652abdead..a72ea6b8e56 100644 --- a/sys/modules/sound/driver/Makefile +++ b/sys/modules/sound/driver/Makefile @@ -20,8 +20,5 @@ _maestro3= maestro3 SUBDIR+= cmi mss .endif -.if ${MACHINE_CPUARCH} == "powerpc" -SUBDIR+= ai2s davbus -.endif .include diff --git a/sys/modules/sound/driver/ai2s/Makefile b/sys/modules/sound/driver/ai2s/Makefile deleted file mode 100644 index 76c00494bd8..00000000000 --- a/sys/modules/sound/driver/ai2s/Makefile +++ /dev/null @@ -1,9 +0,0 @@ - -.PATH: ${SRCTOP}/sys/dev/sound/macio - -KMOD= snd_ai2s -SRCS= device_if.h bus_if.h ofw_bus_if.h -SRCS+= channel_if.h feeder_if.h mixer_if.h -SRCS+= onyx.c snapper.c tumbler.c aoa.c i2s.c - -.include diff --git a/sys/modules/sound/driver/davbus/Makefile b/sys/modules/sound/driver/davbus/Makefile deleted file mode 100644 index 12df61b69d0..00000000000 --- a/sys/modules/sound/driver/davbus/Makefile +++ /dev/null @@ -1,9 +0,0 @@ - -.PATH: ${SRCTOP}/sys/dev/sound/macio - -KMOD= snd_davbus -SRCS= device_if.h bus_if.h ofw_bus_if.h -SRCS+= channel_if.h feeder_if.h mixer_if.h -SRCS+= aoa.c davbus.c - -.include diff --git a/sys/modules/uart/Makefile b/sys/modules/uart/Makefile index 51ad16f3060..fd2ef498740 100644 --- a/sys/modules/uart/Makefile +++ b/sys/modules/uart/Makefile @@ -8,7 +8,7 @@ uart_cpu_acpi=uart_cpu_acpi.c .endif .if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "arm" || \ - ${MACHINE_CPUARCH} == "powerpc" || ${MACHINE_CPUARCH} == "riscv" +${MACHINE_CPUARCH} == "riscv" ofw_bus_if= ofw_bus_if.h .endif diff --git a/sys/modules/usb/Makefile b/sys/modules/usb/Makefile index 035a57b87fa..c2fe3704d40 100644 --- a/sys/modules/usb/Makefile +++ b/sys/modules/usb/Makefile @@ -76,10 +76,9 @@ _kue= kue _run= run _rsu= rsu -.if ${MACHINE_CPUARCH} != "mips" _rsufw= rsufw _runfw= runfw -.endif + .endif .if ${MACHINE_CPUARCH} == "amd64" @@ -101,9 +100,6 @@ _urtw= urtw _avr32dci= avr32dci .endif -.if ${MACHINE_CPUARCH} == "mips" -_saf1761otg= saf1761otg -.endif .if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_CPUARCH} == "amd64" || \ ${MACHINE_CPUARCH} == "i386" diff --git a/sys/modules/zfs/Makefile b/sys/modules/zfs/Makefile index f36acb35424..4574ab2e38f 100644 --- a/sys/modules/zfs/Makefile +++ b/sys/modules/zfs/Makefile @@ -31,8 +31,7 @@ CFLAGS+= -D__KERNEL__ -DFREEBSD_NAMECACHE -DBUILDING_ZFS \ CFLAGS+= -DHAVE_AVX2 -DHAVE_AVX -D__x86_64 -DHAVE_SSE2 -DHAVE_AVX512F -DHAVE_AVX512BW -DHAVE_SSSE3 .endif -.if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "powerpc" || \ - ${MACHINE_ARCH} == "powerpcspe" || ${MACHINE_ARCH} == "arm" +.if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "arm" CFLAGS+= -DBITS_PER_LONG=32 .else CFLAGS+= -DBITS_PER_LONG=64 @@ -101,8 +100,7 @@ SRCS+= acl_common.c \ spl_zlib.c -.if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "powerpc" || \ - ${MACHINE_ARCH} == "powerpcspe" || ${MACHINE_ARCH} == "arm" +.if ${MACHINE_ARCH} == "i386" || ${MACHINE_ARCH} == "arm" SRCS+= spl_atomic.c .endif diff --git a/sys/powerpc/aim/aim_machdep.c b/sys/powerpc/aim/aim_machdep.c deleted file mode 100644 index 10a3c7bae0d..00000000000 --- a/sys/powerpc/aim/aim_machdep.c +++ /dev/null @@ -1,813 +0,0 @@ -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*- - * Copyright (C) 2001 Benno Rice - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $ - */ - -#include -#include "opt_ddb.h" -#include "opt_kstack_pages.h" -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#ifndef __powerpc64__ -#include -#endif -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#ifdef __powerpc64__ -#include "mmu_oea64.h" -#endif - -#ifndef __powerpc64__ -struct bat battable[16]; -#endif - -int radix_mmu = 0; - -#ifndef __powerpc64__ -/* Bits for running on 64-bit systems in 32-bit mode. */ -extern void *testppc64, *testppc64size; -extern void *restorebridge, *restorebridgesize; -extern void *rfid_patch, *rfi_patch1, *rfi_patch2; -extern void *trapcode64; - -extern Elf_Addr _GLOBAL_OFFSET_TABLE_[]; -#endif - -extern void *rstcode, *rstcodeend; -extern void *trapcode, *trapcodeend; -extern void *hypertrapcode, *hypertrapcodeend; -extern void *generictrap, *generictrap64; -extern void *alitrap, *aliend; -extern void *dsitrap, *dsiend; -extern void *decrint, *decrsize; -extern void *extint, *extsize; -extern void *dblow, *dbend; -extern void *imisstrap, *imisssize; -extern void *dlmisstrap, *dlmisssize; -extern void *dsmisstrap, *dsmisssize; - -extern void *ap_pcpu; -extern void __restartkernel(vm_offset_t, vm_offset_t, vm_offset_t, void *, uint32_t, register_t offset, register_t msr); -extern void __restartkernel_virtual(vm_offset_t, vm_offset_t, vm_offset_t, void *, uint32_t, register_t offset, register_t msr); - -void aim_early_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, - void *mdp, uint32_t mdp_cookie); -void aim_cpu_init(vm_offset_t toc); - -void -aim_early_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp, - uint32_t mdp_cookie) -{ - register_t scratch; - - /* - * If running from an FDT, make sure we are in real mode to avoid - * tromping on firmware page tables. Everything in the kernel assumes - * 1:1 mappings out of firmware, so this won't break anything not - * already broken. This doesn't work if there is live OF, since OF - * may internally use non-1:1 mappings. - */ - if (ofentry == 0) - mtmsr(mfmsr() & ~(PSL_IR | PSL_DR)); - -#ifdef __powerpc64__ - /* - * Relocate to high memory so that the kernel - * can execute from the direct map. - * - * If we are in virtual mode already, use a special entry point - * that sets up a temporary DMAP to execute from until we can - * properly set up the MMU. - */ - if ((vm_offset_t)&aim_early_init < DMAP_BASE_ADDRESS) { - if (mfmsr() & PSL_DR) { - __restartkernel_virtual(fdt, 0, ofentry, mdp, - mdp_cookie, DMAP_BASE_ADDRESS, mfmsr()); - } else { - __restartkernel(fdt, 0, ofentry, mdp, mdp_cookie, - DMAP_BASE_ADDRESS, mfmsr()); - } - } -#endif - - /* Various very early CPU fix ups */ - switch (mfpvr() >> 16) { - /* - * PowerPC 970 CPUs have a misfeature requested by Apple that - * makes them pretend they have a 32-byte cacheline. Turn this - * off before we measure the cacheline size. - */ - case IBM970: - case IBM970FX: - case IBM970MP: - case IBM970GX: - scratch = mfspr(SPR_HID5); - scratch &= ~HID5_970_DCBZ_SIZE_HI; - mtspr(SPR_HID5, scratch); - break; - #ifdef __powerpc64__ - case IBMPOWER7: - case IBMPOWER7PLUS: - case IBMPOWER8: - case IBMPOWER8E: - case IBMPOWER8NVL: - case IBMPOWER9: - /* XXX: get from ibm,slb-size in device tree */ - n_slbs = 32; - break; - #endif - } -} - -void -aim_cpu_init(vm_offset_t toc) -{ - size_t trap_offset, trapsize; - vm_offset_t trap; - register_t msr; - uint8_t *cache_check; - int cacheline_warn; -#ifndef __powerpc64__ - register_t scratch; - int ppc64; -#endif - - trap_offset = 0; - cacheline_warn = 0; - - /* General setup for AIM CPUs */ - psl_kernset = PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI; - -#ifdef __powerpc64__ - psl_kernset |= PSL_SF; - if (mfmsr() & PSL_HV) - psl_kernset |= PSL_HV; - -#if BYTE_ORDER == LITTLE_ENDIAN - psl_kernset |= PSL_LE; -#endif - -#endif - psl_userset = psl_kernset | PSL_PR; -#ifdef __powerpc64__ - psl_userset32 = psl_userset & ~PSL_SF; -#endif - - /* - * Zeroed bits in this variable signify that the value of the bit - * in its position is allowed to vary between userspace contexts. - * - * All other bits are required to be identical for every userspace - * context. The actual *value* of the bit is determined by - * psl_userset and/or psl_userset32, and is not allowed to change. - * - * Remember to update this set when implementing support for - * *conditionally* enabling a processor facility. Failing to do - * this will cause swapcontext() in userspace to break when a - * process uses a conditionally-enabled facility. - * - * When *unconditionally* implementing support for a processor - * facility, update psl_userset / psl_userset32 instead. - * - * See the access control check in set_mcontext(). - */ - psl_userstatic = ~(PSL_VSX | PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1); - /* - * Mask bits from the SRR1 that aren't really the MSR: - * Bits 1-4, 10-15 (ppc32), 33-36, 42-47 (ppc64) - */ - psl_userstatic &= ~0x783f0000UL; - - /* - * Initialize the interrupt tables and figure out our cache line - * size and whether or not we need the 64-bit bridge code. - */ - - /* - * Disable translation in case the vector area hasn't been - * mapped (G5). Note that no OFW calls can be made until - * translation is re-enabled. - */ - - msr = mfmsr(); - mtmsr((msr & ~(PSL_IR | PSL_DR)) | PSL_RI); - - /* - * Measure the cacheline size using dcbz - * - * Use EXC_PGM as a playground. We are about to overwrite it - * anyway, we know it exists, and we know it is cache-aligned. - */ - - cache_check = (void *)EXC_PGM; - - for (cacheline_size = 0; cacheline_size < 0x100; cacheline_size++) - cache_check[cacheline_size] = 0xff; - - __asm __volatile("dcbz 0,%0":: "r" (cache_check) : "memory"); - - /* Find the first byte dcbz did not zero to get the cache line size */ - for (cacheline_size = 0; cacheline_size < 0x100 && - cache_check[cacheline_size] == 0; cacheline_size++); - - /* Work around psim bug */ - if (cacheline_size == 0) { - cacheline_warn = 1; - cacheline_size = 32; - } - - #ifndef __powerpc64__ - /* - * Figure out whether we need to use the 64 bit PMAP. This works by - * executing an instruction that is only legal on 64-bit PPC (mtmsrd), - * and setting ppc64 = 0 if that causes a trap. - */ - - ppc64 = 1; - - bcopy(&testppc64, (void *)EXC_PGM, (size_t)&testppc64size); - __syncicache((void *)EXC_PGM, (size_t)&testppc64size); - - __asm __volatile("\ - mfmsr %0; \ - mtsprg2 %1; \ - \ - mtmsrd %0; \ - mfsprg2 %1;" - : "=r"(scratch), "=r"(ppc64)); - - if (ppc64) - cpu_features |= PPC_FEATURE_64; - - /* - * Now copy restorebridge into all the handlers, if necessary, - * and set up the trap tables. - */ - - if (cpu_features & PPC_FEATURE_64) { - /* Patch the two instances of rfi -> rfid */ - bcopy(&rfid_patch,&rfi_patch1,4); - #ifdef KDB - /* rfi_patch2 is at the end of dbleave */ - bcopy(&rfid_patch,&rfi_patch2,4); - #endif - } - #else /* powerpc64 */ - cpu_features |= PPC_FEATURE_64; - #endif - - trapsize = (size_t)&trapcodeend - (size_t)&trapcode; - - /* - * Copy generic handler into every possible trap. Special cases will get - * different ones in a minute. - */ - for (trap = EXC_RST; trap < EXC_LAST; trap += 0x20) - bcopy(&trapcode, (void *)trap, trapsize); - - #ifndef __powerpc64__ - if (cpu_features & PPC_FEATURE_64) { - /* - * Copy a code snippet to restore 32-bit bridge mode - * to the top of every non-generic trap handler - */ - - trap_offset += (size_t)&restorebridgesize; - bcopy(&restorebridge, (void *)EXC_RST, trap_offset); - bcopy(&restorebridge, (void *)EXC_DSI, trap_offset); - bcopy(&restorebridge, (void *)EXC_ALI, trap_offset); - bcopy(&restorebridge, (void *)EXC_PGM, trap_offset); - bcopy(&restorebridge, (void *)EXC_MCHK, trap_offset); - bcopy(&restorebridge, (void *)EXC_TRC, trap_offset); - bcopy(&restorebridge, (void *)EXC_BPT, trap_offset); - } else { - /* - * Use an IBAT and a DBAT to map the bottom 256M segment. - * - * It is very important to do it *now* to avoid taking a - * fault in .text / .data before the MMU is bootstrapped, - * because until then, the translation data has not been - * copied over from OpenFirmware, so our DSI/ISI will fail - * to find a match. - */ - - battable[0x0].batl = BATL(0x00000000, BAT_M, BAT_PP_RW); - battable[0x0].batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); - - __asm (".balign 32; \n" - "mtibatu 0,%0; mtibatl 0,%1; isync; \n" - "mtdbatu 0,%0; mtdbatl 0,%1; isync" - :: "r"(battable[0].batu), "r"(battable[0].batl)); - } - #else - trapsize = (size_t)&hypertrapcodeend - (size_t)&hypertrapcode; - bcopy(&hypertrapcode, (void *)(EXC_HEA + trap_offset), trapsize); - bcopy(&hypertrapcode, (void *)(EXC_HMI + trap_offset), trapsize); - bcopy(&hypertrapcode, (void *)(EXC_HVI + trap_offset), trapsize); - bcopy(&hypertrapcode, (void *)(EXC_SOFT_PATCH + trap_offset), trapsize); - #endif - - bcopy(&rstcode, (void *)(EXC_RST + trap_offset), (size_t)&rstcodeend - - (size_t)&rstcode); - -#ifdef KDB - bcopy(&dblow, (void *)(EXC_MCHK + trap_offset), (size_t)&dbend - - (size_t)&dblow); - bcopy(&dblow, (void *)(EXC_PGM + trap_offset), (size_t)&dbend - - (size_t)&dblow); - bcopy(&dblow, (void *)(EXC_TRC + trap_offset), (size_t)&dbend - - (size_t)&dblow); - bcopy(&dblow, (void *)(EXC_BPT + trap_offset), (size_t)&dbend - - (size_t)&dblow); -#endif - bcopy(&alitrap, (void *)(EXC_ALI + trap_offset), (size_t)&aliend - - (size_t)&alitrap); - bcopy(&dsitrap, (void *)(EXC_DSI + trap_offset), (size_t)&dsiend - - (size_t)&dsitrap); - - /* Set address of generictrap for self-reloc calculations */ - *((void **)TRAP_GENTRAP) = &generictrap; - #ifdef __powerpc64__ - /* Set TOC base so that the interrupt code can get at it */ - *((void **)TRAP_ENTRY) = &generictrap; - *((register_t *)TRAP_TOCBASE) = toc; - #else - /* Set branch address for trap code */ - if (cpu_features & PPC_FEATURE_64) - *((void **)TRAP_ENTRY) = &generictrap64; - else - *((void **)TRAP_ENTRY) = &generictrap; - *((void **)TRAP_TOCBASE) = _GLOBAL_OFFSET_TABLE_; - - /* G2-specific TLB miss helper handlers */ - bcopy(&imisstrap, (void *)EXC_IMISS, (size_t)&imisssize); - bcopy(&dlmisstrap, (void *)EXC_DLMISS, (size_t)&dlmisssize); - bcopy(&dsmisstrap, (void *)EXC_DSMISS, (size_t)&dsmisssize); - #endif - __syncicache(EXC_RSVD, EXC_LAST - EXC_RSVD); - - /* - * Restore MSR - */ - mtmsr(msr); - - /* Warn if cachline size was not determined */ - if (cacheline_warn == 1) { - printf("WARNING: cacheline size undetermined, setting to 32\n"); - } - - /* - * Initialise virtual memory. Use BUS_PROBE_GENERIC priority - * in case the platform module had a better idea of what we - * should do. - */ - if (radix_mmu) - pmap_mmu_install(MMU_TYPE_RADIX, BUS_PROBE_GENERIC); - else if (cpu_features & PPC_FEATURE_64) - pmap_mmu_install(MMU_TYPE_G5, BUS_PROBE_GENERIC); - else - pmap_mmu_install(MMU_TYPE_OEA, BUS_PROBE_GENERIC); -} - -/* - * Shutdown the CPU as much as possible. - */ -void -cpu_halt(void) -{ - - OF_exit(); -} - -int -ptrace_single_step(struct thread *td) -{ - struct trapframe *tf; - - tf = td->td_frame; - tf->srr1 |= PSL_SE; - - return (0); -} - -int -ptrace_clear_single_step(struct thread *td) -{ - struct trapframe *tf; - - tf = td->td_frame; - tf->srr1 &= ~PSL_SE; - - return (0); -} - -void -kdb_cpu_clear_singlestep(void) -{ - - kdb_frame->srr1 &= ~PSL_SE; -} - -void -kdb_cpu_set_singlestep(void) -{ - - kdb_frame->srr1 |= PSL_SE; -} - -/* - * Initialise a struct pcpu. - */ -void -cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t sz) -{ -#ifdef __powerpc64__ -/* Copy the SLB contents from the current CPU */ -memcpy(pcpu->pc_aim.slb, PCPU_GET(aim.slb), sizeof(pcpu->pc_aim.slb)); -#endif -} - -/* Return 0 on handled success, otherwise signal number. */ -int -cpu_machine_check(struct thread *td, struct trapframe *frame, int *ucode) -{ -#ifdef __powerpc64__ - /* - * This block is 64-bit CPU specific currently. Punt running in 32-bit - * mode on 64-bit CPUs. - */ - /* Check if the important information is in DSISR */ - if ((frame->srr1 & SRR1_MCHK_DATA) != 0) { - printf("Machine check, DSISR: %016lx\n", frame->cpu.aim.dsisr); - /* SLB multi-hit is recoverable. */ - if ((frame->cpu.aim.dsisr & DSISR_MC_SLB_MULTIHIT) != 0) - return (0); - if ((frame->cpu.aim.dsisr & - (DSISR_MC_DERAT_MULTIHIT | DSISR_MC_TLB_MULTIHIT)) != 0) { - pmap_tlbie_all(); - return (0); - } - /* TODO: Add other machine check recovery procedures. */ - } else { - if ((frame->srr1 & SRR1_MCHK_IFETCH_M) == SRR1_MCHK_IFETCH_SLBMH) - return (0); - } -#endif - *ucode = BUS_OBJERR; - return (SIGBUS); -} - -#ifndef __powerpc64__ -uint64_t -va_to_vsid(pmap_t pm, vm_offset_t va) -{ - return ((pm->pm_sr[(uintptr_t)va >> ADDR_SR_SHFT]) & SR_VSID_MASK); -} - -#endif - -void -pmap_early_io_map_init(void) -{ - if ((cpu_features2 & PPC_FEATURE2_ARCH_3_00) == 0) - radix_mmu = 0; - else { - radix_mmu = 1; - TUNABLE_INT_FETCH("radix_mmu", &radix_mmu); - } - - /* - * When using Radix, set the start and end of kva early, to be able to - * use KVAs on pmap_early_io_map and avoid issues when remapping them - * later. - */ - if (radix_mmu) { - virtual_avail = VM_MIN_KERNEL_ADDRESS; - virtual_end = VM_MAX_SAFE_KERNEL_ADDRESS; - } -} - -/* - * These functions need to provide addresses that both (a) work in real mode - * (or whatever mode/circumstances the kernel is in in early boot (now)) and - * (b) can still, in principle, work once the kernel is going. Because these - * rely on existing mappings/real mode, unmap is a no-op. - */ -vm_offset_t -pmap_early_io_map(vm_paddr_t pa, vm_size_t size) -{ - KASSERT(!pmap_bootstrapped, ("Not available after PMAP started!")); - - /* - * If we have the MMU up in early boot, assume it is 1:1. Otherwise, - * try to get the address in a memory region compatible with the - * direct map for efficiency later. - * Except for Radix MMU, for which current implementation doesn't - * support mapping arbitrary virtual addresses, such as the ones - * generated by "direct mapping" I/O addresses. In this case, use - * addresses from KVA area. - */ - if (mfmsr() & PSL_DR) - return (pa); - else if (radix_mmu) { - vm_offset_t va; - - va = virtual_avail; - virtual_avail += round_page(size + pa - trunc_page(pa)); - return (va); - } else - return (DMAP_BASE_ADDRESS + pa); -} - -void -pmap_early_io_unmap(vm_offset_t va, vm_size_t size) -{ - - KASSERT(!pmap_bootstrapped, ("Not available after PMAP started!")); -} - -/* From p3-53 of the MPC7450 RISC Microprocessor Family Reference Manual */ -void -flush_disable_caches(void) -{ - register_t msr; - register_t msscr0; - register_t cache_reg; - volatile uint32_t *memp; - uint32_t temp; - int i; - int x; - - msr = mfmsr(); - powerpc_sync(); - mtmsr(msr & ~(PSL_EE | PSL_DR)); - msscr0 = mfspr(SPR_MSSCR0); - msscr0 &= ~MSSCR0_L2PFE; - mtspr(SPR_MSSCR0, msscr0); - powerpc_sync(); - isync(); - /* 7e00066c: dssall */ - __asm__ __volatile__(".long 0x7e00066c; sync"); - powerpc_sync(); - isync(); - __asm__ __volatile__("dcbf 0,%0" :: "r"(0)); - __asm__ __volatile__("dcbf 0,%0" :: "r"(0)); - __asm__ __volatile__("dcbf 0,%0" :: "r"(0)); - - /* Lock the L1 Data cache. */ - mtspr(SPR_LDSTCR, mfspr(SPR_LDSTCR) | 0xFF); - powerpc_sync(); - isync(); - - mtspr(SPR_LDSTCR, 0); - - /* - * Perform this in two stages: Flush the cache starting in RAM, then do it - * from ROM. - */ - memp = (volatile uint32_t *)0x00000000; - for (i = 0; i < 128 * 1024; i++) { - temp = *memp; - __asm__ __volatile__("dcbf 0,%0" :: "r"(memp)); - memp += 32/sizeof(*memp); - } - - memp = (volatile uint32_t *)0xfff00000; - x = 0xfe; - - for (; x != 0xff;) { - mtspr(SPR_LDSTCR, x); - for (i = 0; i < 128; i++) { - temp = *memp; - __asm__ __volatile__("dcbf 0,%0" :: "r"(memp)); - memp += 32/sizeof(*memp); - } - x = ((x << 1) | 1) & 0xff; - } - mtspr(SPR_LDSTCR, 0); - - cache_reg = mfspr(SPR_L2CR); - if (cache_reg & L2CR_L2E) { - cache_reg &= ~(L2CR_L2IO_7450 | L2CR_L2DO_7450); - mtspr(SPR_L2CR, cache_reg); - powerpc_sync(); - mtspr(SPR_L2CR, cache_reg | L2CR_L2HWF); - while (mfspr(SPR_L2CR) & L2CR_L2HWF) - ; /* Busy wait for cache to flush */ - powerpc_sync(); - cache_reg &= ~L2CR_L2E; - mtspr(SPR_L2CR, cache_reg); - powerpc_sync(); - mtspr(SPR_L2CR, cache_reg | L2CR_L2I); - powerpc_sync(); - while (mfspr(SPR_L2CR) & L2CR_L2I) - ; /* Busy wait for L2 cache invalidate */ - powerpc_sync(); - } - - cache_reg = mfspr(SPR_L3CR); - if (cache_reg & L3CR_L3E) { - cache_reg &= ~(L3CR_L3IO | L3CR_L3DO); - mtspr(SPR_L3CR, cache_reg); - powerpc_sync(); - mtspr(SPR_L3CR, cache_reg | L3CR_L3HWF); - while (mfspr(SPR_L3CR) & L3CR_L3HWF) - ; /* Busy wait for cache to flush */ - powerpc_sync(); - cache_reg &= ~L3CR_L3E; - mtspr(SPR_L3CR, cache_reg); - powerpc_sync(); - mtspr(SPR_L3CR, cache_reg | L3CR_L3I); - powerpc_sync(); - while (mfspr(SPR_L3CR) & L3CR_L3I) - ; /* Busy wait for L3 cache invalidate */ - powerpc_sync(); - } - - mtspr(SPR_HID0, mfspr(SPR_HID0) & ~HID0_DCE); - powerpc_sync(); - isync(); - - mtmsr(msr); -} - -#ifndef __powerpc64__ -void -mpc745x_sleep(void) -{ - static u_quad_t timebase = 0; - static register_t sprgs[4]; - static register_t srrs[2]; - - jmp_buf resetjb; - struct thread *fputd; - struct thread *vectd; - register_t hid0; - register_t msr; - register_t saved_msr; - - ap_pcpu = pcpup; - - PCPU_SET(restore, &resetjb); - - saved_msr = mfmsr(); - fputd = PCPU_GET(fputhread); - vectd = PCPU_GET(vecthread); - if (fputd != NULL) - save_fpu(fputd); - if (vectd != NULL) - save_vec(vectd); - if (setjmp(resetjb) == 0) { - sprgs[0] = mfspr(SPR_SPRG0); - sprgs[1] = mfspr(SPR_SPRG1); - sprgs[2] = mfspr(SPR_SPRG2); - sprgs[3] = mfspr(SPR_SPRG3); - srrs[0] = mfspr(SPR_SRR0); - srrs[1] = mfspr(SPR_SRR1); - timebase = mftb(); - powerpc_sync(); - flush_disable_caches(); - hid0 = mfspr(SPR_HID0); - hid0 = (hid0 & ~(HID0_DOZE | HID0_NAP)) | HID0_SLEEP; - powerpc_sync(); - isync(); - msr = mfmsr() | PSL_POW; - mtspr(SPR_HID0, hid0); - powerpc_sync(); - - while (1) - mtmsr(msr); - } - /* XXX: The mttb() means this *only* works on single-CPU systems. */ - mttb(timebase); - PCPU_SET(curthread, curthread); - PCPU_SET(curpcb, curthread->td_pcb); - pmap_activate(curthread); - powerpc_sync(); - mtspr(SPR_SPRG0, sprgs[0]); - mtspr(SPR_SPRG1, sprgs[1]); - mtspr(SPR_SPRG2, sprgs[2]); - mtspr(SPR_SPRG3, sprgs[3]); - mtspr(SPR_SRR0, srrs[0]); - mtspr(SPR_SRR1, srrs[1]); - mtmsr(saved_msr); - if (fputd == curthread) - enable_fpu(curthread); - if (vectd == curthread) - enable_vec(curthread); - powerpc_sync(); -} -#endif diff --git a/sys/powerpc/aim/locore.S b/sys/powerpc/aim/locore.S deleted file mode 100644 index 085719547fa..00000000000 --- a/sys/powerpc/aim/locore.S +++ /dev/null @@ -1,15 +0,0 @@ - -#ifdef __powerpc64__ -#include -#else -#include -#endif - -/* - * XXX: This should be moved to a shared AIM/booke asm file, if one ever is - * created. - */ -ENTRY(get_spr) - mfspr %r3, 0 - blr -END(get_spr) diff --git a/sys/powerpc/aim/locore32.S b/sys/powerpc/aim/locore32.S deleted file mode 100644 index 3fba703794b..00000000000 --- a/sys/powerpc/aim/locore32.S +++ /dev/null @@ -1,123 +0,0 @@ - -/*- - * Copyright (C) 2010-2016 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include "assym.inc" - -#include - -#include -#include -#include -#include -#include -#include "opt_platform.h" - -/* Locate the per-CPU data structure */ -#define GET_CPUINFO(r) \ - mfsprg0 r - -/* - * Compiled KERNBASE location and the kernel load address - */ - .globl kernbase - .set kernbase, KERNBASE - -/* - * Globals - */ - .data - .align 3 -GLOBAL(__startkernel) - .long begin -GLOBAL(__endkernel) - .long end - .align 4 -#define TMPSTKSZ 8192 /* 8K temporary stack */ -GLOBAL(tmpstk) - .space TMPSTKSZ - -#ifdef KDB -#define TRAPSTKSZ 4096 /* 4k trap stack */ -GLOBAL(trapstk) - .space TRAPSTKSZ -#endif - - .text - .globl btext -btext: - -/* - * Main kernel entry point. - */ - .text - .globl __start -__start: - /* Figure out where we are */ - bl 1f - .long _DYNAMIC-. - .long _GLOBAL_OFFSET_TABLE_-. - .long tmpstk-. -1: mflr %r30 - - /* Set up temporary stack pointer */ - lwz %r1,8(%r30) - add %r1,%r1,%r30 - addi %r1,%r1,(8+TMPSTKSZ-40) - - /* Relocate self */ - stw %r3,16(%r1) - stw %r4,20(%r1) - stw %r5,24(%r1) - stw %r6,28(%r1) - stw %r7,32(%r1) - - lwz %r3,0(%r30) /* _DYNAMIC in %r3 */ - add %r3,%r3,%r30 - lwz %r4,4(%r30) /* GOT pointer */ - add %r4,%r4,%r30 - lwz %r4,4(%r4) /* got[0] is _DYNAMIC link addr */ - subf %r4,%r4,%r3 /* subtract to calculate relocbase */ - bl elf_reloc_self - - lwz %r3,16(%r1) - lwz %r4,20(%r1) - lwz %r5,24(%r1) - lwz %r6,28(%r1) - lwz %r7,32(%r1) - - /* MD setup */ - bl powerpc_init - - /* Set stack pointer to new value and branch to mi_startup */ - mr %r1, %r3 - li %r3, 0 - stw %r3, 0(%r1) - bl mi_startup - - /* mi_startup() does not return */ - b . - -#include diff --git a/sys/powerpc/aim/locore64.S b/sys/powerpc/aim/locore64.S deleted file mode 100644 index 9e49b605b8b..00000000000 --- a/sys/powerpc/aim/locore64.S +++ /dev/null @@ -1,287 +0,0 @@ - -/*- - * Copyright (C) 2010-2016 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include "assym.inc" - -#include - -#include -#include -#include -#include -#include - -#ifdef _CALL_ELF -.abiversion _CALL_ELF -#endif - -/* Glue for linker script */ -.globl kernbase -.set kernbase, KERNBASE - -/* - * Globals - */ - .data - .align 3 -GLOBAL(__startkernel) - .llong begin -GLOBAL(__endkernel) - .llong end -GLOBAL(can_wakeup) - .llong 0x0 - - .align 4 -#define TMPSTKSZ 16384 /* 16K temporary stack */ -GLOBAL(tmpstk) - .space TMPSTKSZ - -TOC_ENTRY(tmpstk) -TOC_ENTRY(can_wakeup) - -#ifdef KDB -#define TRAPSTKSZ 8192 /* 8k trap stack */ -GLOBAL(trapstk) - .space TRAPSTKSZ -TOC_ENTRY(trapstk) -#endif - - -/* - * Entry point for bootloaders that do not fully implement ELF and start - * at the beginning of the image (kexec, notably). In its own section so - * that it ends up before any linker-generated call stubs and actually at - * the beginning of the image. kexec on some systems also enters at - * (start of image) + 0x60, so put a spin loop there. - */ - .section ".text.kboot", "x", @progbits -kbootentry: -#ifdef __LITTLE_ENDIAN__ - RETURN_TO_NATIVE_ENDIAN -#endif - b __start -. = kbootentry + 0x40 /* Magic address used in platform layer */ - .global smp_spin_sem -ap_kexec_spin_sem: - .long -1 -. = kbootentry + 0x60 /* Entry point for kexec APs */ -ap_kexec_start: /* At 0x60 past start, copied to 0x60 by kexec */ - /* r3 set to CPU ID by kexec */ - - /* Invalidate icache for low-memory copy and jump there */ - li %r0,0x80 - dcbst 0,%r0 - sync - icbi 0,%r0 - isync - ba 0x80 /* Absolute branch to next inst */ - -. = kbootentry + 0x80 /* Aligned to cache line */ -1: or 31,31,31 /* yield */ - sync - lwz %r1,0x40(0) /* Spin on ap_kexec_spin_sem */ - cmpw %r1,%r3 /* Until it equals our CPU ID */ - bne 1b - - /* Released */ - or 2,2,2 /* unyield */ - - /* Make sure that it will be software reset. Clear SRR1 */ - li %r1,0 - mtsrr1 %r1 - ba EXC_RST - -/* - * Now start the real text section - */ - - .text - .globl btext -btext: - -/* - * Main kernel entry point. - * - * Calling convention: - * r3: Flattened Device Tree pointer (or zero) - * r4: ignored - * r5: OF client interface pointer (or zero) - * r6: Loader metadata pointer (or zero) - * r7: Magic cookie (0xfb5d104d) to indicate that r6 has loader metadata - */ - .text -_NAKED_ENTRY(__start) - -#ifdef __LITTLE_ENDIAN__ - RETURN_TO_NATIVE_ENDIAN -#endif - /* Set 64-bit mode if not yet set before branching to C */ - mfmsr %r20 - li %r21,1 - insrdi %r20,%r21,1,0 - mtmsrd %r20 - isync - nop /* Make this block a multiple of 8 bytes */ - - /* Set up the TOC pointer */ - b 0f - .align 3 -0: nop - bl 1f - .llong __tocbase + 0x8000 - . -1: mflr %r2 - ld %r1,0(%r2) - add %r2,%r1,%r2 - - /* Get load offset */ - ld %r31,-0x8000(%r2) /* First TOC entry is TOC base */ - subf %r31,%r31,%r2 /* Subtract from real TOC base to get base */ - - /* Set up the stack pointer */ - bl 1f - .llong tmpstk + TMPSTKSZ - 96 - . -1: mflr %r30 - ld %r1,0(%r30) - add %r1,%r1,%r30 - nop - - /* Relocate kernel */ - std %r3,48(%r1) - std %r4,56(%r1) - std %r5,64(%r1) - std %r6,72(%r1) - std %r7,80(%r1) - - bl 1f - .llong _DYNAMIC-. -1: mflr %r3 - ld %r4,0(%r3) - add %r3,%r4,%r3 - mr %r4,%r31 - bl elf_reloc_self - nop - ld %r3,48(%r1) - ld %r4,56(%r1) - ld %r5,64(%r1) - ld %r6,72(%r1) - ld %r7,80(%r1) - - /* Begin CPU init */ - mr %r4,%r2 /* Replace ignored r4 with tocbase for trap handlers */ - bl powerpc_init - nop - - /* Set stack pointer to new value and branch to mi_startup */ - mr %r1, %r3 - li %r3, 0 - std %r3, 0(%r1) - bl mi_startup - nop - - /* Unreachable */ - b . -_END(__start) - -ASENTRY_NOPROF(__restartkernel_virtual) - /* - * When coming in via this entry point, we need to alter the SLB to - * shadow the segment register emulation entries in DMAP space. - * We need to do this dance because we are running with virtual-mode - * OpenFirmware and have not yet taken over the MMU. - * - * Assumptions: - * 1) The kernel is currently identity-mapped. - * 2) We are currently executing at an address compatible with - * real mode. - * 3) The first 16 SLB entries are emulating SRs. - * 4) The rest of the SLB is not in use. - * 5) OpenFirmware is not manipulating the SLB at runtime. - * 6) We are running on 64-bit AIM. - * - * Tested on a G5. - */ - mfmsr %r14 - /* Switch to real mode because we are about to mess with the SLB. */ - andi. %r14, %r14, ~(PSL_DR|PSL_IR|PSL_ME|PSL_RI)@l - mtmsr %r14 - isync - /* Prepare variables for later use. */ - li %r14, 0 - li %r18, 0 - oris %r18, %r18, 0xc000 - sldi %r18, %r18, 32 /* r18: 0xc000000000000000 */ -1: - /* - * Loop over the first 16 SLB entries. - * Offset the SLBE into the DMAP, add 16 to the index, and write - * it back to the SLB. - */ - /* XXX add more safety checks */ - slbmfev %r15, %r14 - slbmfee %r16, %r14 - or %r16, %r16, %r14 /* index is 0-15 */ - ori %r16, %r16, 0x10 /* add 16 to index. */ - or %r16, %r16, %r18 /* SLBE DMAP offset */ - rldicr %r17, %r16, 0, 37 /* Invalidation SLBE */ - - isync - slbie %r17 - /* isync */ - slbmte %r15, %r16 - isync - addi %r14, %r14, 1 - cmpdi %r14, 16 - blt 1b - - /* - * Now that we are set up with a temporary direct map, we can - * continue with __restartkernel. Translation will be switched - * back on at the rfid, at which point we will be executing from - * the temporary direct map we just installed, until the kernel - * takes over responsibility for the MMU. - */ - bl __restartkernel - nop -ASEND(__restartkernel_virtual) - -ASENTRY_NOPROF(__restartkernel) - /* - * r3-r7: arguments to go to __start - * r8: offset from current kernel address to apply - * r9: MSR to set when (atomically) jumping to __start + r8 - */ - mtsrr1 %r9 - bl 1f -1: mflr %r25 - add %r25,%r8,%r25 - addi %r25,%r25,2f-1b - mtsrr0 %r25 - rfid -2: bl __start - nop -ASEND(__restartkernel) - -#include diff --git a/sys/powerpc/aim/mmu_oea.c b/sys/powerpc/aim/mmu_oea.c deleted file mode 100644 index 78b88d43996..00000000000 --- a/sys/powerpc/aim/mmu_oea.c +++ /dev/null @@ -1,2835 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause AND BSD-4-Clause - * - * Copyright (c) 2001 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Matt Thomas of Allegro Networks, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: pmap.c,v 1.28 2000/03/26 20:42:36 kleink Exp $ - */ -/*- - * Copyright (C) 2001 Benno Rice. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -/* - * Manages physical address maps. - * - * Since the information managed by this module is also stored by the - * logical address mapping module, this module may throw away valid virtual - * to physical mappings at almost any time. However, invalidations of - * mappings must be done as requested. - * - * In order to cope with hardware architectures which make virtual to - * physical map invalidates expensive, this module may delay invalidate - * reduced protection operations until such time as they are actually - * necessary. This module is given full information as to which processors - * are currently using which maps, and to when physical maps must be made - * correct. - */ - -#include "opt_kstack_pages.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define MOEA_DEBUG - -#define TODO panic("%s: not implemented", __func__); - -#define VSID_MAKE(sr, hash) ((sr) | (((hash) & 0xfffff) << 4)) -#define VSID_TO_SR(vsid) ((vsid) & 0xf) -#define VSID_TO_HASH(vsid) (((vsid) >> 4) & 0xfffff) - -/* Get physical address from PVO. */ -#define PVO_PADDR(pvo) ((pvo)->pvo_pte.pte.pte_lo & PTE_RPGN) - -struct ofw_map { - vm_offset_t om_va; - vm_size_t om_len; - vm_offset_t om_pa; - u_int om_mode; -}; - -extern unsigned char _etext[]; -extern unsigned char _end[]; - -/* - * Map of physical memory regions. - */ -static struct mem_region *regions; -static struct mem_region *pregions; -static u_int phys_avail_count; -static int regions_sz, pregions_sz; -static struct ofw_map *translations; - -/* - * Lock for the pteg and pvo tables. - */ -struct mtx moea_table_mutex; -struct mtx moea_vsid_mutex; - -/* tlbie instruction synchronization */ -static struct mtx tlbie_mtx; - -/* - * PTEG data. - */ -static struct pteg *moea_pteg_table; -u_int moea_pteg_count; -u_int moea_pteg_mask; - -/* - * PVO data. - */ -struct pvo_head *moea_pvo_table; /* pvo entries by pteg index */ -struct pvo_head moea_pvo_kunmanaged = - LIST_HEAD_INITIALIZER(moea_pvo_kunmanaged); /* list of unmanaged pages */ - -static struct rwlock_padalign pvh_global_lock; - -uma_zone_t moea_upvo_zone; /* zone for pvo entries for unmanaged pages */ -uma_zone_t moea_mpvo_zone; /* zone for pvo entries for managed pages */ - -#define BPVO_POOL_SIZE 32768 -static struct pvo_entry *moea_bpvo_pool; -static int moea_bpvo_pool_index = 0; - -#define VSID_NBPW (sizeof(u_int32_t) * 8) -static u_int moea_vsid_bitmap[NPMAPS / VSID_NBPW]; - -static boolean_t moea_initialized = FALSE; - -/* - * Statistics. - */ -u_int moea_pte_valid = 0; -u_int moea_pte_overflow = 0; -u_int moea_pte_replacements = 0; -u_int moea_pvo_entries = 0; -u_int moea_pvo_enter_calls = 0; -u_int moea_pvo_remove_calls = 0; -u_int moea_pte_spills = 0; -SYSCTL_INT(_machdep, OID_AUTO, moea_pte_valid, CTLFLAG_RD, &moea_pte_valid, - 0, ""); -SYSCTL_INT(_machdep, OID_AUTO, moea_pte_overflow, CTLFLAG_RD, - &moea_pte_overflow, 0, ""); -SYSCTL_INT(_machdep, OID_AUTO, moea_pte_replacements, CTLFLAG_RD, - &moea_pte_replacements, 0, ""); -SYSCTL_INT(_machdep, OID_AUTO, moea_pvo_entries, CTLFLAG_RD, &moea_pvo_entries, - 0, ""); -SYSCTL_INT(_machdep, OID_AUTO, moea_pvo_enter_calls, CTLFLAG_RD, - &moea_pvo_enter_calls, 0, ""); -SYSCTL_INT(_machdep, OID_AUTO, moea_pvo_remove_calls, CTLFLAG_RD, - &moea_pvo_remove_calls, 0, ""); -SYSCTL_INT(_machdep, OID_AUTO, moea_pte_spills, CTLFLAG_RD, - &moea_pte_spills, 0, ""); - -/* - * Allocate physical memory for use in moea_bootstrap. - */ -static vm_offset_t moea_bootstrap_alloc(vm_size_t, u_int); - -/* - * PTE calls. - */ -static int moea_pte_insert(u_int, struct pte *); - -/* - * PVO calls. - */ -static int moea_pvo_enter(pmap_t, uma_zone_t, struct pvo_head *, - vm_offset_t, vm_paddr_t, u_int, int); -static void moea_pvo_remove(struct pvo_entry *, int); -static struct pvo_entry *moea_pvo_find_va(pmap_t, vm_offset_t, int *); -static struct pte *moea_pvo_to_pte(const struct pvo_entry *, int); - -/* - * Utility routines. - */ -static int moea_enter_locked(pmap_t, vm_offset_t, vm_page_t, - vm_prot_t, u_int, int8_t); -static void moea_syncicache(vm_paddr_t, vm_size_t); -static boolean_t moea_query_bit(vm_page_t, int); -static u_int moea_clear_bit(vm_page_t, int); -static void moea_kremove(vm_offset_t); -int moea_pte_spill(vm_offset_t); - -/* - * Kernel MMU interface - */ -void moea_clear_modify(vm_page_t); -void moea_copy_page(vm_page_t, vm_page_t); -void moea_copy_pages(vm_page_t *ma, vm_offset_t a_offset, - vm_page_t *mb, vm_offset_t b_offset, int xfersize); -int moea_enter(pmap_t, vm_offset_t, vm_page_t, vm_prot_t, u_int, - int8_t); -void moea_enter_object(pmap_t, vm_offset_t, vm_offset_t, vm_page_t, - vm_prot_t); -void moea_enter_quick(pmap_t, vm_offset_t, vm_page_t, vm_prot_t); -vm_paddr_t moea_extract(pmap_t, vm_offset_t); -vm_page_t moea_extract_and_hold(pmap_t, vm_offset_t, vm_prot_t); -void moea_init(void); -boolean_t moea_is_modified(vm_page_t); -boolean_t moea_is_prefaultable(pmap_t, vm_offset_t); -boolean_t moea_is_referenced(vm_page_t); -int moea_ts_referenced(vm_page_t); -vm_offset_t moea_map(vm_offset_t *, vm_paddr_t, vm_paddr_t, int); -static int moea_mincore(pmap_t, vm_offset_t, vm_paddr_t *); -boolean_t moea_page_exists_quick(pmap_t, vm_page_t); -void moea_page_init(vm_page_t); -int moea_page_wired_mappings(vm_page_t); -int moea_pinit(pmap_t); -void moea_pinit0(pmap_t); -void moea_protect(pmap_t, vm_offset_t, vm_offset_t, vm_prot_t); -void moea_qenter(vm_offset_t, vm_page_t *, int); -void moea_qremove(vm_offset_t, int); -void moea_release(pmap_t); -void moea_remove(pmap_t, vm_offset_t, vm_offset_t); -void moea_remove_all(vm_page_t); -void moea_remove_write(vm_page_t); -void moea_unwire(pmap_t, vm_offset_t, vm_offset_t); -void moea_zero_page(vm_page_t); -void moea_zero_page_area(vm_page_t, int, int); -void moea_activate(struct thread *); -void moea_deactivate(struct thread *); -void moea_cpu_bootstrap(int); -void moea_bootstrap(vm_offset_t, vm_offset_t); -void *moea_mapdev(vm_paddr_t, vm_size_t); -void *moea_mapdev_attr(vm_paddr_t, vm_size_t, vm_memattr_t); -void moea_unmapdev(vm_offset_t, vm_size_t); -vm_paddr_t moea_kextract(vm_offset_t); -void moea_kenter_attr(vm_offset_t, vm_paddr_t, vm_memattr_t); -void moea_kenter(vm_offset_t, vm_paddr_t); -void moea_page_set_memattr(vm_page_t m, vm_memattr_t ma); -int moea_dev_direct_mapped(vm_paddr_t, vm_size_t); -static void moea_sync_icache(pmap_t, vm_offset_t, vm_size_t); -void moea_dumpsys_map(vm_paddr_t pa, size_t sz, void **va); -void moea_scan_init(void); -vm_offset_t moea_quick_enter_page(vm_page_t m); -void moea_quick_remove_page(vm_offset_t addr); -boolean_t moea_page_is_mapped(vm_page_t m); -bool moea_ps_enabled(pmap_t pmap); -static int moea_map_user_ptr(pmap_t pm, - volatile const void *uaddr, void **kaddr, size_t ulen, size_t *klen); -static int moea_decode_kernel_ptr(vm_offset_t addr, - int *is_user, vm_offset_t *decoded_addr); - -static struct pmap_funcs moea_methods = { - .clear_modify = moea_clear_modify, - .copy_page = moea_copy_page, - .copy_pages = moea_copy_pages, - .enter = moea_enter, - .enter_object = moea_enter_object, - .enter_quick = moea_enter_quick, - .extract = moea_extract, - .extract_and_hold = moea_extract_and_hold, - .init = moea_init, - .is_modified = moea_is_modified, - .is_prefaultable = moea_is_prefaultable, - .is_referenced = moea_is_referenced, - .ts_referenced = moea_ts_referenced, - .map = moea_map, - .page_exists_quick = moea_page_exists_quick, - .page_init = moea_page_init, - .page_wired_mappings = moea_page_wired_mappings, - .pinit = moea_pinit, - .pinit0 = moea_pinit0, - .protect = moea_protect, - .qenter = moea_qenter, - .qremove = moea_qremove, - .release = moea_release, - .remove = moea_remove, - .remove_all = moea_remove_all, - .mincore = moea_mincore, - .remove_write = moea_remove_write, - .sync_icache = moea_sync_icache, - .unwire = moea_unwire, - .zero_page = moea_zero_page, - .zero_page_area = moea_zero_page_area, - .activate = moea_activate, - .deactivate = moea_deactivate, - .page_set_memattr = moea_page_set_memattr, - .quick_enter_page = moea_quick_enter_page, - .quick_remove_page = moea_quick_remove_page, - .page_is_mapped = moea_page_is_mapped, - .ps_enabled = moea_ps_enabled, - - /* Internal interfaces */ - .bootstrap = moea_bootstrap, - .cpu_bootstrap = moea_cpu_bootstrap, - .mapdev_attr = moea_mapdev_attr, - .mapdev = moea_mapdev, - .unmapdev = moea_unmapdev, - .kextract = moea_kextract, - .kenter = moea_kenter, - .kenter_attr = moea_kenter_attr, - .dev_direct_mapped = moea_dev_direct_mapped, - .dumpsys_pa_init = moea_scan_init, - .dumpsys_map_chunk = moea_dumpsys_map, - .map_user_ptr = moea_map_user_ptr, - .decode_kernel_ptr = moea_decode_kernel_ptr, -}; - -MMU_DEF(oea_mmu, MMU_TYPE_OEA, moea_methods); - -static __inline uint32_t -moea_calc_wimg(vm_paddr_t pa, vm_memattr_t ma) -{ - uint32_t pte_lo; - int i; - - if (ma != VM_MEMATTR_DEFAULT) { - switch (ma) { - case VM_MEMATTR_UNCACHEABLE: - return (PTE_I | PTE_G); - case VM_MEMATTR_CACHEABLE: - return (PTE_M); - case VM_MEMATTR_WRITE_COMBINING: - case VM_MEMATTR_WRITE_BACK: - case VM_MEMATTR_PREFETCHABLE: - return (PTE_I); - case VM_MEMATTR_WRITE_THROUGH: - return (PTE_W | PTE_M); - } - } - - /* - * Assume the page is cache inhibited and access is guarded unless - * it's in our available memory array. - */ - pte_lo = PTE_I | PTE_G; - for (i = 0; i < pregions_sz; i++) { - if ((pa >= pregions[i].mr_start) && - (pa < (pregions[i].mr_start + pregions[i].mr_size))) { - pte_lo = PTE_M; - break; - } - } - - return pte_lo; -} - -/* - * Translate OFW translations into VM attributes. - */ -static __inline vm_memattr_t -moea_bootstrap_convert_wimg(uint32_t mode) -{ - - switch (mode) { - case (PTE_I | PTE_G): - /* PCI device memory */ - return VM_MEMATTR_UNCACHEABLE; - case (PTE_M): - /* Explicitly coherent */ - return VM_MEMATTR_CACHEABLE; - case 0: /* Default claim */ - case 2: /* Alternate PP bits set by OF for the original payload */ - /* "Normal" memory. */ - return VM_MEMATTR_DEFAULT; - - default: - /* Err on the side of caution for unknowns */ - /* XXX should we panic instead? */ - return VM_MEMATTR_UNCACHEABLE; - } -} - -static void -tlbie(vm_offset_t va) -{ - - mtx_lock_spin(&tlbie_mtx); - __asm __volatile("ptesync"); - __asm __volatile("tlbie %0" :: "r"(va)); - __asm __volatile("eieio; tlbsync; ptesync"); - mtx_unlock_spin(&tlbie_mtx); -} - -static void -tlbia(void) -{ - vm_offset_t va; - - for (va = 0; va < 0x00040000; va += 0x00001000) { - __asm __volatile("tlbie %0" :: "r"(va)); - powerpc_sync(); - } - __asm __volatile("tlbsync"); - powerpc_sync(); -} - -static __inline int -va_to_sr(u_int *sr, vm_offset_t va) -{ - return (sr[(uintptr_t)va >> ADDR_SR_SHFT]); -} - -static __inline u_int -va_to_pteg(u_int sr, vm_offset_t addr) -{ - u_int hash; - - hash = (sr & SR_VSID_MASK) ^ (((u_int)addr & ADDR_PIDX) >> - ADDR_PIDX_SHFT); - return (hash & moea_pteg_mask); -} - -static __inline struct pvo_head * -vm_page_to_pvoh(vm_page_t m) -{ - - return (&m->md.mdpg_pvoh); -} - -static __inline void -moea_attr_clear(vm_page_t m, int ptebit) -{ - - rw_assert(&pvh_global_lock, RA_WLOCKED); - m->md.mdpg_attrs &= ~ptebit; -} - -static __inline int -moea_attr_fetch(vm_page_t m) -{ - - return (m->md.mdpg_attrs); -} - -static __inline void -moea_attr_save(vm_page_t m, int ptebit) -{ - - rw_assert(&pvh_global_lock, RA_WLOCKED); - m->md.mdpg_attrs |= ptebit; -} - -static __inline int -moea_pte_compare(const struct pte *pt, const struct pte *pvo_pt) -{ - if (pt->pte_hi == pvo_pt->pte_hi) - return (1); - - return (0); -} - -static __inline int -moea_pte_match(struct pte *pt, u_int sr, vm_offset_t va, int which) -{ - return (pt->pte_hi & ~PTE_VALID) == - (((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | - ((va >> ADDR_API_SHFT) & PTE_API) | which); -} - -static __inline void -moea_pte_create(struct pte *pt, u_int sr, vm_offset_t va, u_int pte_lo) -{ - - mtx_assert(&moea_table_mutex, MA_OWNED); - - /* - * Construct a PTE. Default to IMB initially. Valid bit only gets - * set when the real pte is set in memory. - * - * Note: Don't set the valid bit for correct operation of tlb update. - */ - pt->pte_hi = ((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | - (((va & ADDR_PIDX) >> ADDR_API_SHFT) & PTE_API); - pt->pte_lo = pte_lo; -} - -static __inline void -moea_pte_synch(struct pte *pt, struct pte *pvo_pt) -{ - - mtx_assert(&moea_table_mutex, MA_OWNED); - pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF | PTE_CHG); -} - -static __inline void -moea_pte_clear(struct pte *pt, vm_offset_t va, int ptebit) -{ - - mtx_assert(&moea_table_mutex, MA_OWNED); - - /* - * As shown in Section 7.6.3.2.3 - */ - pt->pte_lo &= ~ptebit; - tlbie(va); -} - -static __inline void -moea_pte_set(struct pte *pt, struct pte *pvo_pt) -{ - - mtx_assert(&moea_table_mutex, MA_OWNED); - pvo_pt->pte_hi |= PTE_VALID; - - /* - * Update the PTE as defined in section 7.6.3.1. - * Note that the REF/CHG bits are from pvo_pt and thus should have - * been saved so this routine can restore them (if desired). - */ - pt->pte_lo = pvo_pt->pte_lo; - powerpc_sync(); - pt->pte_hi = pvo_pt->pte_hi; - powerpc_sync(); - moea_pte_valid++; -} - -static __inline void -moea_pte_unset(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) -{ - - mtx_assert(&moea_table_mutex, MA_OWNED); - pvo_pt->pte_hi &= ~PTE_VALID; - - /* - * Force the reg & chg bits back into the PTEs. - */ - powerpc_sync(); - - /* - * Invalidate the pte. - */ - pt->pte_hi &= ~PTE_VALID; - - tlbie(va); - - /* - * Save the reg & chg bits. - */ - moea_pte_synch(pt, pvo_pt); - moea_pte_valid--; -} - -static __inline void -moea_pte_change(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) -{ - - /* - * Invalidate the PTE - */ - moea_pte_unset(pt, pvo_pt, va); - moea_pte_set(pt, pvo_pt); -} - -/* - * Quick sort callout for comparing memory regions. - */ -static int om_cmp(const void *a, const void *b); - -static int -om_cmp(const void *a, const void *b) -{ - const struct ofw_map *mapa; - const struct ofw_map *mapb; - - mapa = a; - mapb = b; - if (mapa->om_pa < mapb->om_pa) - return (-1); - else if (mapa->om_pa > mapb->om_pa) - return (1); - else - return (0); -} - -void -moea_cpu_bootstrap(int ap) -{ - u_int sdr; - int i; - - if (ap) { - powerpc_sync(); - __asm __volatile("mtdbatu 0,%0" :: "r"(battable[0].batu)); - __asm __volatile("mtdbatl 0,%0" :: "r"(battable[0].batl)); - isync(); - __asm __volatile("mtibatu 0,%0" :: "r"(battable[0].batu)); - __asm __volatile("mtibatl 0,%0" :: "r"(battable[0].batl)); - isync(); - } - - __asm __volatile("mtdbatu 1,%0" :: "r"(battable[8].batu)); - __asm __volatile("mtdbatl 1,%0" :: "r"(battable[8].batl)); - isync(); - - __asm __volatile("mtibatu 1,%0" :: "r"(0)); - __asm __volatile("mtdbatu 2,%0" :: "r"(0)); - __asm __volatile("mtibatu 2,%0" :: "r"(0)); - __asm __volatile("mtdbatu 3,%0" :: "r"(0)); - __asm __volatile("mtibatu 3,%0" :: "r"(0)); - isync(); - - for (i = 0; i < 16; i++) - mtsrin(i << ADDR_SR_SHFT, kernel_pmap->pm_sr[i]); - powerpc_sync(); - - sdr = (u_int)moea_pteg_table | (moea_pteg_mask >> 10); - __asm __volatile("mtsdr1 %0" :: "r"(sdr)); - isync(); - - tlbia(); -} - -void -moea_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) -{ - ihandle_t mmui; - phandle_t chosen, mmu; - int sz; - int i, j; - vm_size_t size, physsz, hwphyssz; - vm_offset_t pa, va, off; - void *dpcpu; - - /* - * Map PCI memory space. - */ - battable[0x8].batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW); - battable[0x8].batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); - - battable[0x9].batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW); - battable[0x9].batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs); - - battable[0xa].batl = BATL(0xa0000000, BAT_I|BAT_G, BAT_PP_RW); - battable[0xa].batu = BATU(0xa0000000, BAT_BL_256M, BAT_Vs); - - battable[0xb].batl = BATL(0xb0000000, BAT_I|BAT_G, BAT_PP_RW); - battable[0xb].batu = BATU(0xb0000000, BAT_BL_256M, BAT_Vs); - - powerpc_sync(); - - /* map pci space */ - __asm __volatile("mtdbatu 1,%0" :: "r"(battable[8].batu)); - __asm __volatile("mtdbatl 1,%0" :: "r"(battable[8].batl)); - isync(); - - /* set global direct map flag */ - hw_direct_map = 1; - - mem_regions(&pregions, &pregions_sz, ®ions, ®ions_sz); - CTR0(KTR_PMAP, "moea_bootstrap: physical memory"); - - for (i = 0; i < pregions_sz; i++) { - vm_offset_t pa; - vm_offset_t end; - - CTR3(KTR_PMAP, "physregion: %#x - %#x (%#x)", - pregions[i].mr_start, - pregions[i].mr_start + pregions[i].mr_size, - pregions[i].mr_size); - /* - * Install entries into the BAT table to allow all - * of physmem to be convered by on-demand BAT entries. - * The loop will sometimes set the same battable element - * twice, but that's fine since they won't be used for - * a while yet. - */ - pa = pregions[i].mr_start & 0xf0000000; - end = pregions[i].mr_start + pregions[i].mr_size; - do { - u_int n = pa >> ADDR_SR_SHFT; - - battable[n].batl = BATL(pa, BAT_M, BAT_PP_RW); - battable[n].batu = BATU(pa, BAT_BL_256M, BAT_Vs); - pa += SEGMENT_LENGTH; - } while (pa < end); - } - - if (PHYS_AVAIL_ENTRIES < regions_sz) - panic("moea_bootstrap: phys_avail too small"); - - phys_avail_count = 0; - physsz = 0; - hwphyssz = 0; - TUNABLE_ULONG_FETCH("hw.physmem", (u_long *) &hwphyssz); - for (i = 0, j = 0; i < regions_sz; i++, j += 2) { - CTR3(KTR_PMAP, "region: %#x - %#x (%#x)", regions[i].mr_start, - regions[i].mr_start + regions[i].mr_size, - regions[i].mr_size); - if (hwphyssz != 0 && - (physsz + regions[i].mr_size) >= hwphyssz) { - if (physsz < hwphyssz) { - phys_avail[j] = regions[i].mr_start; - phys_avail[j + 1] = regions[i].mr_start + - hwphyssz - physsz; - physsz = hwphyssz; - phys_avail_count++; - } - break; - } - phys_avail[j] = regions[i].mr_start; - phys_avail[j + 1] = regions[i].mr_start + regions[i].mr_size; - phys_avail_count++; - physsz += regions[i].mr_size; - } - - /* Check for overlap with the kernel and exception vectors */ - for (j = 0; j < 2*phys_avail_count; j+=2) { - if (phys_avail[j] < EXC_LAST) - phys_avail[j] += EXC_LAST; - - if (kernelstart >= phys_avail[j] && - kernelstart < phys_avail[j+1]) { - if (kernelend < phys_avail[j+1]) { - phys_avail[2*phys_avail_count] = - (kernelend & ~PAGE_MASK) + PAGE_SIZE; - phys_avail[2*phys_avail_count + 1] = - phys_avail[j+1]; - phys_avail_count++; - } - - phys_avail[j+1] = kernelstart & ~PAGE_MASK; - } - - if (kernelend >= phys_avail[j] && - kernelend < phys_avail[j+1]) { - if (kernelstart > phys_avail[j]) { - phys_avail[2*phys_avail_count] = phys_avail[j]; - phys_avail[2*phys_avail_count + 1] = - kernelstart & ~PAGE_MASK; - phys_avail_count++; - } - - phys_avail[j] = (kernelend & ~PAGE_MASK) + PAGE_SIZE; - } - } - - physmem = btoc(physsz); - - /* - * Allocate PTEG table. - */ -#ifdef PTEGCOUNT - moea_pteg_count = PTEGCOUNT; -#else - moea_pteg_count = 0x1000; - - while (moea_pteg_count < physmem) - moea_pteg_count <<= 1; - - moea_pteg_count >>= 1; -#endif /* PTEGCOUNT */ - - size = moea_pteg_count * sizeof(struct pteg); - CTR2(KTR_PMAP, "moea_bootstrap: %d PTEGs, %d bytes", moea_pteg_count, - size); - moea_pteg_table = (struct pteg *)moea_bootstrap_alloc(size, size); - CTR1(KTR_PMAP, "moea_bootstrap: PTEG table at %p", moea_pteg_table); - bzero((void *)moea_pteg_table, moea_pteg_count * sizeof(struct pteg)); - moea_pteg_mask = moea_pteg_count - 1; - - /* - * Allocate pv/overflow lists. - */ - size = sizeof(struct pvo_head) * moea_pteg_count; - moea_pvo_table = (struct pvo_head *)moea_bootstrap_alloc(size, - PAGE_SIZE); - CTR1(KTR_PMAP, "moea_bootstrap: PVO table at %p", moea_pvo_table); - for (i = 0; i < moea_pteg_count; i++) - LIST_INIT(&moea_pvo_table[i]); - - /* - * Initialize the lock that synchronizes access to the pteg and pvo - * tables. - */ - mtx_init(&moea_table_mutex, "pmap table", NULL, MTX_DEF | - MTX_RECURSE); - mtx_init(&moea_vsid_mutex, "VSID table", NULL, MTX_DEF); - - mtx_init(&tlbie_mtx, "tlbie", NULL, MTX_SPIN); - - /* - * Initialise the unmanaged pvo pool. - */ - moea_bpvo_pool = (struct pvo_entry *)moea_bootstrap_alloc( - BPVO_POOL_SIZE*sizeof(struct pvo_entry), 0); - moea_bpvo_pool_index = 0; - - /* - * Make sure kernel vsid is allocated as well as VSID 0. - */ - moea_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS - 1)) / VSID_NBPW] - |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); - moea_vsid_bitmap[0] |= 1; - - /* - * Initialize the kernel pmap (which is statically allocated). - */ - PMAP_LOCK_INIT(kernel_pmap); - for (i = 0; i < 16; i++) - kernel_pmap->pm_sr[i] = EMPTY_SEGMENT + i; - CPU_FILL(&kernel_pmap->pm_active); - RB_INIT(&kernel_pmap->pmap_pvo); - - /* - * Initialize the global pv list lock. - */ - rw_init(&pvh_global_lock, "pmap pv global"); - - /* - * Set up the Open Firmware mappings - */ - chosen = OF_finddevice("/chosen"); - if (chosen != -1 && OF_getprop(chosen, "mmu", &mmui, 4) != -1 && - (mmu = OF_instance_to_package(mmui)) != -1 && - (sz = OF_getproplen(mmu, "translations")) != -1) { - translations = NULL; - for (i = 0; phys_avail[i] != 0; i += 2) { - if (phys_avail[i + 1] >= sz) { - translations = (struct ofw_map *)phys_avail[i]; - break; - } - } - if (translations == NULL) - panic("moea_bootstrap: no space to copy translations"); - bzero(translations, sz); - if (OF_getprop(mmu, "translations", translations, sz) == -1) - panic("moea_bootstrap: can't get ofw translations"); - CTR0(KTR_PMAP, "moea_bootstrap: translations"); - sz /= sizeof(*translations); - qsort(translations, sz, sizeof (*translations), om_cmp); - for (i = 0; i < sz; i++) { - CTR3(KTR_PMAP, "translation: pa=%#x va=%#x len=%#x", - translations[i].om_pa, translations[i].om_va, - translations[i].om_len); - - /* - * If the mapping is 1:1, let the RAM and device - * on-demand BAT tables take care of the translation. - * - * However, always enter mappings for segment 16, - * which is mixed-protection and therefore not - * compatible with a BAT entry. - */ - if ((translations[i].om_va >> ADDR_SR_SHFT) != 0xf && - translations[i].om_va == translations[i].om_pa) - continue; - - /* Enter the pages */ - for (off = 0; off < translations[i].om_len; - off += PAGE_SIZE) - moea_kenter_attr(translations[i].om_va + off, - translations[i].om_pa + off, - moea_bootstrap_convert_wimg(translations[i].om_mode)); - } - } - - /* - * Calculate the last available physical address. - */ - for (i = 0; phys_avail[i + 2] != 0; i += 2) - ; - Maxmem = powerpc_btop(phys_avail[i + 1]); - - moea_cpu_bootstrap(0); - mtmsr(mfmsr() | PSL_DR | PSL_IR); - pmap_bootstrapped++; - - /* - * Set the start and end of kva. - */ - virtual_avail = VM_MIN_KERNEL_ADDRESS; - virtual_end = VM_MAX_SAFE_KERNEL_ADDRESS; - - /* - * Allocate a kernel stack with a guard page for thread0 and map it - * into the kernel page map. - */ - pa = moea_bootstrap_alloc(kstack_pages * PAGE_SIZE, PAGE_SIZE); - va = virtual_avail + KSTACK_GUARD_PAGES * PAGE_SIZE; - virtual_avail = va + kstack_pages * PAGE_SIZE; - CTR2(KTR_PMAP, "moea_bootstrap: kstack0 at %#x (%#x)", pa, va); - thread0.td_kstack = va; - thread0.td_kstack_pages = kstack_pages; - for (i = 0; i < kstack_pages; i++) { - moea_kenter(va, pa); - pa += PAGE_SIZE; - va += PAGE_SIZE; - } - - /* - * Allocate virtual address space for the message buffer. - */ - pa = msgbuf_phys = moea_bootstrap_alloc(msgbufsize, PAGE_SIZE); - msgbufp = (struct msgbuf *)virtual_avail; - va = virtual_avail; - virtual_avail += round_page(msgbufsize); - while (va < virtual_avail) { - moea_kenter(va, pa); - pa += PAGE_SIZE; - va += PAGE_SIZE; - } - - /* - * Allocate virtual address space for the dynamic percpu area. - */ - pa = moea_bootstrap_alloc(DPCPU_SIZE, PAGE_SIZE); - dpcpu = (void *)virtual_avail; - va = virtual_avail; - virtual_avail += DPCPU_SIZE; - while (va < virtual_avail) { - moea_kenter(va, pa); - pa += PAGE_SIZE; - va += PAGE_SIZE; - } - dpcpu_init(dpcpu, 0); -} - -/* - * Activate a user pmap. The pmap must be activated before it's address - * space can be accessed in any way. - */ -void -moea_activate(struct thread *td) -{ - pmap_t pm, pmr; - - /* - * Load all the data we need up front to encourage the compiler to - * not issue any loads while we have interrupts disabled below. - */ - pm = &td->td_proc->p_vmspace->vm_pmap; - pmr = pm->pmap_phys; - - CPU_SET(PCPU_GET(cpuid), &pm->pm_active); - PCPU_SET(curpmap, pmr); - - mtsrin(USER_SR << ADDR_SR_SHFT, td->td_pcb->pcb_cpu.aim.usr_vsid); -} - -void -moea_deactivate(struct thread *td) -{ - pmap_t pm; - - pm = &td->td_proc->p_vmspace->vm_pmap; - CPU_CLR(PCPU_GET(cpuid), &pm->pm_active); - PCPU_SET(curpmap, NULL); -} - -void -moea_unwire(pmap_t pm, vm_offset_t sva, vm_offset_t eva) -{ - struct pvo_entry key, *pvo; - - PMAP_LOCK(pm); - key.pvo_vaddr = sva; - for (pvo = RB_NFIND(pvo_tree, &pm->pmap_pvo, &key); - pvo != NULL && PVO_VADDR(pvo) < eva; - pvo = RB_NEXT(pvo_tree, &pm->pmap_pvo, pvo)) { - if ((pvo->pvo_vaddr & PVO_WIRED) == 0) - panic("moea_unwire: pvo %p is missing PVO_WIRED", pvo); - pvo->pvo_vaddr &= ~PVO_WIRED; - pm->pm_stats.wired_count--; - } - PMAP_UNLOCK(pm); -} - -void -moea_copy_page(vm_page_t msrc, vm_page_t mdst) -{ - vm_offset_t dst; - vm_offset_t src; - - dst = VM_PAGE_TO_PHYS(mdst); - src = VM_PAGE_TO_PHYS(msrc); - - bcopy((void *)src, (void *)dst, PAGE_SIZE); -} - -void -moea_copy_pages(vm_page_t *ma, vm_offset_t a_offset, - vm_page_t *mb, vm_offset_t b_offset, int xfersize) -{ - void *a_cp, *b_cp; - vm_offset_t a_pg_offset, b_pg_offset; - int cnt; - - while (xfersize > 0) { - a_pg_offset = a_offset & PAGE_MASK; - cnt = min(xfersize, PAGE_SIZE - a_pg_offset); - a_cp = (char *)VM_PAGE_TO_PHYS(ma[a_offset >> PAGE_SHIFT]) + - a_pg_offset; - b_pg_offset = b_offset & PAGE_MASK; - cnt = min(cnt, PAGE_SIZE - b_pg_offset); - b_cp = (char *)VM_PAGE_TO_PHYS(mb[b_offset >> PAGE_SHIFT]) + - b_pg_offset; - bcopy(a_cp, b_cp, cnt); - a_offset += cnt; - b_offset += cnt; - xfersize -= cnt; - } -} - -/* - * Zero a page of physical memory by temporarily mapping it into the tlb. - */ -void -moea_zero_page(vm_page_t m) -{ - vm_offset_t off, pa = VM_PAGE_TO_PHYS(m); - - for (off = 0; off < PAGE_SIZE; off += cacheline_size) - __asm __volatile("dcbz 0,%0" :: "r"(pa + off)); -} - -void -moea_zero_page_area(vm_page_t m, int off, int size) -{ - vm_offset_t pa = VM_PAGE_TO_PHYS(m); - void *va = (void *)(pa + off); - - bzero(va, size); -} - -vm_offset_t -moea_quick_enter_page(vm_page_t m) -{ - - return (VM_PAGE_TO_PHYS(m)); -} - -void -moea_quick_remove_page(vm_offset_t addr) -{ -} - -boolean_t -moea_page_is_mapped(vm_page_t m) -{ - return (!LIST_EMPTY(&(m)->md.mdpg_pvoh)); -} - -bool -moea_ps_enabled(pmap_t pmap __unused) -{ - return (false); -} - -/* - * Map the given physical page at the specified virtual address in the - * target pmap with the protection requested. If specified the page - * will be wired down. - */ -int -moea_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, - u_int flags, int8_t psind) -{ - int error; - - for (;;) { - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pmap); - error = moea_enter_locked(pmap, va, m, prot, flags, psind); - rw_wunlock(&pvh_global_lock); - PMAP_UNLOCK(pmap); - if (error != ENOMEM) - return (KERN_SUCCESS); - if ((flags & PMAP_ENTER_NOSLEEP) != 0) - return (KERN_RESOURCE_SHORTAGE); - VM_OBJECT_ASSERT_UNLOCKED(m->object); - vm_wait(NULL); - } -} - -/* - * Map the given physical page at the specified virtual address in the - * target pmap with the protection requested. If specified the page - * will be wired down. - * - * The global pvh and pmap must be locked. - */ -static int -moea_enter_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, - u_int flags, int8_t psind __unused) -{ - struct pvo_head *pvo_head; - uma_zone_t zone; - u_int pte_lo, pvo_flags; - int error; - - if (pmap_bootstrapped) - rw_assert(&pvh_global_lock, RA_WLOCKED); - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - if ((m->oflags & VPO_UNMANAGED) == 0) { - if ((flags & PMAP_ENTER_QUICK_LOCKED) == 0) - VM_PAGE_OBJECT_BUSY_ASSERT(m); - else - VM_OBJECT_ASSERT_LOCKED(m->object); - } - - if ((m->oflags & VPO_UNMANAGED) != 0 || !moea_initialized) { - pvo_head = &moea_pvo_kunmanaged; - zone = moea_upvo_zone; - pvo_flags = 0; - } else { - pvo_head = vm_page_to_pvoh(m); - zone = moea_mpvo_zone; - pvo_flags = PVO_MANAGED; - } - - pte_lo = moea_calc_wimg(VM_PAGE_TO_PHYS(m), pmap_page_get_memattr(m)); - - if (prot & VM_PROT_WRITE) { - pte_lo |= PTE_BW; - if (pmap_bootstrapped && - (m->oflags & VPO_UNMANAGED) == 0) - vm_page_aflag_set(m, PGA_WRITEABLE); - } else - pte_lo |= PTE_BR; - - if ((flags & PMAP_ENTER_WIRED) != 0) - pvo_flags |= PVO_WIRED; - - error = moea_pvo_enter(pmap, zone, pvo_head, va, VM_PAGE_TO_PHYS(m), - pte_lo, pvo_flags); - - /* - * Flush the real page from the instruction cache. This has be done - * for all user mappings to prevent information leakage via the - * instruction cache. moea_pvo_enter() returns ENOENT for the first - * mapping for a page. - */ - if (pmap != kernel_pmap && error == ENOENT && - (pte_lo & (PTE_I | PTE_G)) == 0) - moea_syncicache(VM_PAGE_TO_PHYS(m), PAGE_SIZE); - - return (error); -} - -/* - * Maps a sequence of resident pages belonging to the same object. - * The sequence begins with the given page m_start. This page is - * mapped at the given virtual address start. Each subsequent page is - * mapped at a virtual address that is offset from start by the same - * amount as the page is offset from m_start within the object. The - * last page in the sequence is the page with the largest offset from - * m_start that can be mapped at a virtual address less than the given - * virtual address end. Not every virtual page between start and end - * is mapped; only those for which a resident page exists with the - * corresponding offset from m_start are mapped. - */ -void -moea_enter_object(pmap_t pm, vm_offset_t start, vm_offset_t end, - vm_page_t m_start, vm_prot_t prot) -{ - vm_page_t m; - vm_pindex_t diff, psize; - - VM_OBJECT_ASSERT_LOCKED(m_start->object); - - psize = atop(end - start); - m = m_start; - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pm); - while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { - moea_enter_locked(pm, start + ptoa(diff), m, prot & - (VM_PROT_READ | VM_PROT_EXECUTE), PMAP_ENTER_QUICK_LOCKED, - 0); - m = TAILQ_NEXT(m, listq); - } - rw_wunlock(&pvh_global_lock); - PMAP_UNLOCK(pm); -} - -void -moea_enter_quick(pmap_t pm, vm_offset_t va, vm_page_t m, - vm_prot_t prot) -{ - - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pm); - moea_enter_locked(pm, va, m, prot & (VM_PROT_READ | VM_PROT_EXECUTE), - PMAP_ENTER_QUICK_LOCKED, 0); - rw_wunlock(&pvh_global_lock); - PMAP_UNLOCK(pm); -} - -vm_paddr_t -moea_extract(pmap_t pm, vm_offset_t va) -{ - struct pvo_entry *pvo; - vm_paddr_t pa; - - PMAP_LOCK(pm); - pvo = moea_pvo_find_va(pm, va & ~ADDR_POFF, NULL); - if (pvo == NULL) - pa = 0; - else - pa = PVO_PADDR(pvo) | (va & ADDR_POFF); - PMAP_UNLOCK(pm); - return (pa); -} - -/* - * Atomically extract and hold the physical page with the given - * pmap and virtual address pair if that mapping permits the given - * protection. - */ -vm_page_t -moea_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) -{ - struct pvo_entry *pvo; - vm_page_t m; - - m = NULL; - PMAP_LOCK(pmap); - pvo = moea_pvo_find_va(pmap, va & ~ADDR_POFF, NULL); - if (pvo != NULL && (pvo->pvo_pte.pte.pte_hi & PTE_VALID) && - ((pvo->pvo_pte.pte.pte_lo & PTE_PP) == PTE_RW || - (prot & VM_PROT_WRITE) == 0)) { - m = PHYS_TO_VM_PAGE(PVO_PADDR(pvo)); - if (!vm_page_wire_mapped(m)) - m = NULL; - } - PMAP_UNLOCK(pmap); - return (m); -} - -void -moea_init() -{ - - moea_upvo_zone = uma_zcreate("UPVO entry", sizeof (struct pvo_entry), - NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, - UMA_ZONE_VM | UMA_ZONE_NOFREE); - moea_mpvo_zone = uma_zcreate("MPVO entry", sizeof(struct pvo_entry), - NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, - UMA_ZONE_VM | UMA_ZONE_NOFREE); - moea_initialized = TRUE; -} - -boolean_t -moea_is_referenced(vm_page_t m) -{ - boolean_t rv; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("moea_is_referenced: page %p is not managed", m)); - rw_wlock(&pvh_global_lock); - rv = moea_query_bit(m, PTE_REF); - rw_wunlock(&pvh_global_lock); - return (rv); -} - -boolean_t -moea_is_modified(vm_page_t m) -{ - boolean_t rv; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("moea_is_modified: page %p is not managed", m)); - - /* - * If the page is not busied then this check is racy. - */ - if (!pmap_page_is_write_mapped(m)) - return (FALSE); - - rw_wlock(&pvh_global_lock); - rv = moea_query_bit(m, PTE_CHG); - rw_wunlock(&pvh_global_lock); - return (rv); -} - -boolean_t -moea_is_prefaultable(pmap_t pmap, vm_offset_t va) -{ - struct pvo_entry *pvo; - boolean_t rv; - - PMAP_LOCK(pmap); - pvo = moea_pvo_find_va(pmap, va & ~ADDR_POFF, NULL); - rv = pvo == NULL || (pvo->pvo_pte.pte.pte_hi & PTE_VALID) == 0; - PMAP_UNLOCK(pmap); - return (rv); -} - -void -moea_clear_modify(vm_page_t m) -{ - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("moea_clear_modify: page %p is not managed", m)); - vm_page_assert_busied(m); - - if (!pmap_page_is_write_mapped(m)) - return; - rw_wlock(&pvh_global_lock); - moea_clear_bit(m, PTE_CHG); - rw_wunlock(&pvh_global_lock); -} - -/* - * Clear the write and modified bits in each of the given page's mappings. - */ -void -moea_remove_write(vm_page_t m) -{ - struct pvo_entry *pvo; - struct pte *pt; - pmap_t pmap; - u_int lo; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("moea_remove_write: page %p is not managed", m)); - vm_page_assert_busied(m); - - if (!pmap_page_is_write_mapped(m)) - return; - rw_wlock(&pvh_global_lock); - lo = moea_attr_fetch(m); - powerpc_sync(); - LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { - pmap = pvo->pvo_pmap; - PMAP_LOCK(pmap); - if ((pvo->pvo_pte.pte.pte_lo & PTE_PP) != PTE_BR) { - pt = moea_pvo_to_pte(pvo, -1); - pvo->pvo_pte.pte.pte_lo &= ~PTE_PP; - pvo->pvo_pte.pte.pte_lo |= PTE_BR; - if (pt != NULL) { - moea_pte_synch(pt, &pvo->pvo_pte.pte); - lo |= pvo->pvo_pte.pte.pte_lo; - pvo->pvo_pte.pte.pte_lo &= ~PTE_CHG; - moea_pte_change(pt, &pvo->pvo_pte.pte, - pvo->pvo_vaddr); - mtx_unlock(&moea_table_mutex); - } - } - PMAP_UNLOCK(pmap); - } - if ((lo & PTE_CHG) != 0) { - moea_attr_clear(m, PTE_CHG); - vm_page_dirty(m); - } - vm_page_aflag_clear(m, PGA_WRITEABLE); - rw_wunlock(&pvh_global_lock); -} - -/* - * moea_ts_referenced: - * - * Return a count of reference bits for a page, clearing those bits. - * It is not necessary for every reference bit to be cleared, but it - * is necessary that 0 only be returned when there are truly no - * reference bits set. - * - * XXX: The exact number of bits to check and clear is a matter that - * should be tested and standardized at some point in the future for - * optimal aging of shared pages. - */ -int -moea_ts_referenced(vm_page_t m) -{ - int count; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("moea_ts_referenced: page %p is not managed", m)); - rw_wlock(&pvh_global_lock); - count = moea_clear_bit(m, PTE_REF); - rw_wunlock(&pvh_global_lock); - return (count); -} - -/* - * Modify the WIMG settings of all mappings for a page. - */ -void -moea_page_set_memattr(vm_page_t m, vm_memattr_t ma) -{ - struct pvo_entry *pvo; - struct pvo_head *pvo_head; - struct pte *pt; - pmap_t pmap; - u_int lo; - - if ((m->oflags & VPO_UNMANAGED) != 0) { - m->md.mdpg_cache_attrs = ma; - return; - } - - rw_wlock(&pvh_global_lock); - pvo_head = vm_page_to_pvoh(m); - lo = moea_calc_wimg(VM_PAGE_TO_PHYS(m), ma); - - LIST_FOREACH(pvo, pvo_head, pvo_vlink) { - pmap = pvo->pvo_pmap; - PMAP_LOCK(pmap); - pt = moea_pvo_to_pte(pvo, -1); - pvo->pvo_pte.pte.pte_lo &= ~PTE_WIMG; - pvo->pvo_pte.pte.pte_lo |= lo; - if (pt != NULL) { - moea_pte_change(pt, &pvo->pvo_pte.pte, - pvo->pvo_vaddr); - if (pvo->pvo_pmap == kernel_pmap) - isync(); - } - mtx_unlock(&moea_table_mutex); - PMAP_UNLOCK(pmap); - } - m->md.mdpg_cache_attrs = ma; - rw_wunlock(&pvh_global_lock); -} - -/* - * Map a wired page into kernel virtual address space. - */ -void -moea_kenter(vm_offset_t va, vm_paddr_t pa) -{ - - moea_kenter_attr(va, pa, VM_MEMATTR_DEFAULT); -} - -void -moea_kenter_attr(vm_offset_t va, vm_paddr_t pa, vm_memattr_t ma) -{ - u_int pte_lo; - int error; - -#if 0 - if (va < VM_MIN_KERNEL_ADDRESS) - panic("moea_kenter: attempt to enter non-kernel address %#x", - va); -#endif - - pte_lo = moea_calc_wimg(pa, ma); - - PMAP_LOCK(kernel_pmap); - error = moea_pvo_enter(kernel_pmap, moea_upvo_zone, - &moea_pvo_kunmanaged, va, pa, pte_lo, PVO_WIRED); - - if (error != 0 && error != ENOENT) - panic("moea_kenter: failed to enter va %#x pa %#x: %d", va, - pa, error); - - PMAP_UNLOCK(kernel_pmap); -} - -/* - * Extract the physical page address associated with the given kernel virtual - * address. - */ -vm_paddr_t -moea_kextract(vm_offset_t va) -{ - struct pvo_entry *pvo; - vm_paddr_t pa; - - /* - * Allow direct mappings on 32-bit OEA - */ - if (va < VM_MIN_KERNEL_ADDRESS) { - return (va); - } - - PMAP_LOCK(kernel_pmap); - pvo = moea_pvo_find_va(kernel_pmap, va & ~ADDR_POFF, NULL); - KASSERT(pvo != NULL, ("moea_kextract: no addr found")); - pa = PVO_PADDR(pvo) | (va & ADDR_POFF); - PMAP_UNLOCK(kernel_pmap); - return (pa); -} - -/* - * Remove a wired page from kernel virtual address space. - */ -void -moea_kremove(vm_offset_t va) -{ - - moea_remove(kernel_pmap, va, va + PAGE_SIZE); -} - -/* - * Provide a kernel pointer corresponding to a given userland pointer. - * The returned pointer is valid until the next time this function is - * called in this thread. This is used internally in copyin/copyout. - */ -int -moea_map_user_ptr(pmap_t pm, volatile const void *uaddr, - void **kaddr, size_t ulen, size_t *klen) -{ - size_t l; - register_t vsid; - - *kaddr = (char *)USER_ADDR + ((uintptr_t)uaddr & ~SEGMENT_MASK); - l = ((char *)USER_ADDR + SEGMENT_LENGTH) - (char *)(*kaddr); - if (l > ulen) - l = ulen; - if (klen) - *klen = l; - else if (l != ulen) - return (EFAULT); - - vsid = va_to_vsid(pm, (vm_offset_t)uaddr); - - /* Mark segment no-execute */ - vsid |= SR_N; - - /* If we have already set this VSID, we can just return */ - if (curthread->td_pcb->pcb_cpu.aim.usr_vsid == vsid) - return (0); - - __asm __volatile("isync"); - curthread->td_pcb->pcb_cpu.aim.usr_segm = - (uintptr_t)uaddr >> ADDR_SR_SHFT; - curthread->td_pcb->pcb_cpu.aim.usr_vsid = vsid; - __asm __volatile("mtsr %0,%1; isync" :: "n"(USER_SR), "r"(vsid)); - - return (0); -} - -/* - * Figure out where a given kernel pointer (usually in a fault) points - * to from the VM's perspective, potentially remapping into userland's - * address space. - */ -static int -moea_decode_kernel_ptr(vm_offset_t addr, int *is_user, - vm_offset_t *decoded_addr) -{ - vm_offset_t user_sr; - - if ((addr >> ADDR_SR_SHFT) == (USER_ADDR >> ADDR_SR_SHFT)) { - user_sr = curthread->td_pcb->pcb_cpu.aim.usr_segm; - addr &= ADDR_PIDX | ADDR_POFF; - addr |= user_sr << ADDR_SR_SHFT; - *decoded_addr = addr; - *is_user = 1; - } else { - *decoded_addr = addr; - *is_user = 0; - } - - return (0); -} - -/* - * Map a range of physical addresses into kernel virtual address space. - * - * The value passed in *virt is a suggested virtual address for the mapping. - * Architectures which can support a direct-mapped physical to virtual region - * can return the appropriate address within that region, leaving '*virt' - * unchanged. We cannot and therefore do not; *virt is updated with the - * first usable address after the mapped region. - */ -vm_offset_t -moea_map(vm_offset_t *virt, vm_paddr_t pa_start, - vm_paddr_t pa_end, int prot) -{ - vm_offset_t sva, va; - - sva = *virt; - va = sva; - for (; pa_start < pa_end; pa_start += PAGE_SIZE, va += PAGE_SIZE) - moea_kenter(va, pa_start); - *virt = va; - return (sva); -} - -/* - * Returns true if the pmap's pv is one of the first - * 16 pvs linked to from this page. This count may - * be changed upwards or downwards in the future; it - * is only necessary that true be returned for a small - * subset of pmaps for proper page aging. - */ -boolean_t -moea_page_exists_quick(pmap_t pmap, vm_page_t m) -{ - int loops; - struct pvo_entry *pvo; - boolean_t rv; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("moea_page_exists_quick: page %p is not managed", m)); - loops = 0; - rv = FALSE; - rw_wlock(&pvh_global_lock); - LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { - if (pvo->pvo_pmap == pmap) { - rv = TRUE; - break; - } - if (++loops >= 16) - break; - } - rw_wunlock(&pvh_global_lock); - return (rv); -} - -void -moea_page_init(vm_page_t m) -{ - - m->md.mdpg_attrs = 0; - m->md.mdpg_cache_attrs = VM_MEMATTR_DEFAULT; - LIST_INIT(&m->md.mdpg_pvoh); -} - -/* - * Return the number of managed mappings to the given physical page - * that are wired. - */ -int -moea_page_wired_mappings(vm_page_t m) -{ - struct pvo_entry *pvo; - int count; - - count = 0; - if ((m->oflags & VPO_UNMANAGED) != 0) - return (count); - rw_wlock(&pvh_global_lock); - LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) - if ((pvo->pvo_vaddr & PVO_WIRED) != 0) - count++; - rw_wunlock(&pvh_global_lock); - return (count); -} - -static u_int moea_vsidcontext; - -int -moea_pinit(pmap_t pmap) -{ - int i, mask; - u_int entropy; - - RB_INIT(&pmap->pmap_pvo); - - entropy = 0; - __asm __volatile("mftb %0" : "=r"(entropy)); - - if ((pmap->pmap_phys = (pmap_t)moea_kextract((vm_offset_t)pmap)) - == NULL) { - pmap->pmap_phys = pmap; - } - - mtx_lock(&moea_vsid_mutex); - /* - * Allocate some segment registers for this pmap. - */ - for (i = 0; i < NPMAPS; i += VSID_NBPW) { - u_int hash, n; - - /* - * Create a new value by multiplying by a prime and adding in - * entropy from the timebase register. This is to make the - * VSID more random so that the PT hash function collides - * less often. (Note that the prime casues gcc to do shifts - * instead of a multiply.) - */ - moea_vsidcontext = (moea_vsidcontext * 0x1105) + entropy; - hash = moea_vsidcontext & (NPMAPS - 1); - if (hash == 0) /* 0 is special, avoid it */ - continue; - n = hash >> 5; - mask = 1 << (hash & (VSID_NBPW - 1)); - hash = (moea_vsidcontext & 0xfffff); - if (moea_vsid_bitmap[n] & mask) { /* collision? */ - /* anything free in this bucket? */ - if (moea_vsid_bitmap[n] == 0xffffffff) { - entropy = (moea_vsidcontext >> 20); - continue; - } - i = ffs(~moea_vsid_bitmap[n]) - 1; - mask = 1 << i; - hash &= rounddown2(0xfffff, VSID_NBPW); - hash |= i; - } - KASSERT(!(moea_vsid_bitmap[n] & mask), - ("Allocating in-use VSID group %#x\n", hash)); - moea_vsid_bitmap[n] |= mask; - for (i = 0; i < 16; i++) - pmap->pm_sr[i] = VSID_MAKE(i, hash); - mtx_unlock(&moea_vsid_mutex); - return (1); - } - - mtx_unlock(&moea_vsid_mutex); - panic("moea_pinit: out of segments"); -} - -/* - * Initialize the pmap associated with process 0. - */ -void -moea_pinit0(pmap_t pm) -{ - - PMAP_LOCK_INIT(pm); - moea_pinit(pm); - bzero(&pm->pm_stats, sizeof(pm->pm_stats)); -} - -/* - * Set the physical protection on the specified range of this map as requested. - */ -void -moea_protect(pmap_t pm, vm_offset_t sva, vm_offset_t eva, - vm_prot_t prot) -{ - struct pvo_entry *pvo, *tpvo, key; - struct pte *pt; - - KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, - ("moea_protect: non current pmap")); - - if ((prot & VM_PROT_READ) == VM_PROT_NONE) { - moea_remove(pm, sva, eva); - return; - } - - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pm); - key.pvo_vaddr = sva; - for (pvo = RB_NFIND(pvo_tree, &pm->pmap_pvo, &key); - pvo != NULL && PVO_VADDR(pvo) < eva; pvo = tpvo) { - tpvo = RB_NEXT(pvo_tree, &pm->pmap_pvo, pvo); - - /* - * Grab the PTE pointer before we diddle with the cached PTE - * copy. - */ - pt = moea_pvo_to_pte(pvo, -1); - /* - * Change the protection of the page. - */ - pvo->pvo_pte.pte.pte_lo &= ~PTE_PP; - pvo->pvo_pte.pte.pte_lo |= PTE_BR; - - /* - * If the PVO is in the page table, update that pte as well. - */ - if (pt != NULL) { - moea_pte_change(pt, &pvo->pvo_pte.pte, pvo->pvo_vaddr); - mtx_unlock(&moea_table_mutex); - } - } - rw_wunlock(&pvh_global_lock); - PMAP_UNLOCK(pm); -} - -/* - * Map a list of wired pages into kernel virtual address space. This is - * intended for temporary mappings which do not need page modification or - * references recorded. Existing mappings in the region are overwritten. - */ -void -moea_qenter(vm_offset_t sva, vm_page_t *m, int count) -{ - vm_offset_t va; - - va = sva; - while (count-- > 0) { - moea_kenter(va, VM_PAGE_TO_PHYS(*m)); - va += PAGE_SIZE; - m++; - } -} - -/* - * Remove page mappings from kernel virtual address space. Intended for - * temporary mappings entered by moea_qenter. - */ -void -moea_qremove(vm_offset_t sva, int count) -{ - vm_offset_t va; - - va = sva; - while (count-- > 0) { - moea_kremove(va); - va += PAGE_SIZE; - } -} - -void -moea_release(pmap_t pmap) -{ - int idx, mask; - - /* - * Free segment register's VSID - */ - if (pmap->pm_sr[0] == 0) - panic("moea_release"); - - mtx_lock(&moea_vsid_mutex); - idx = VSID_TO_HASH(pmap->pm_sr[0]) & (NPMAPS-1); - mask = 1 << (idx % VSID_NBPW); - idx /= VSID_NBPW; - moea_vsid_bitmap[idx] &= ~mask; - mtx_unlock(&moea_vsid_mutex); -} - -/* - * Remove the given range of addresses from the specified map. - */ -void -moea_remove(pmap_t pm, vm_offset_t sva, vm_offset_t eva) -{ - struct pvo_entry *pvo, *tpvo, key; - - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pm); - key.pvo_vaddr = sva; - for (pvo = RB_NFIND(pvo_tree, &pm->pmap_pvo, &key); - pvo != NULL && PVO_VADDR(pvo) < eva; pvo = tpvo) { - tpvo = RB_NEXT(pvo_tree, &pm->pmap_pvo, pvo); - moea_pvo_remove(pvo, -1); - } - PMAP_UNLOCK(pm); - rw_wunlock(&pvh_global_lock); -} - -/* - * Remove physical page from all pmaps in which it resides. moea_pvo_remove() - * will reflect changes in pte's back to the vm_page. - */ -void -moea_remove_all(vm_page_t m) -{ - struct pvo_head *pvo_head; - struct pvo_entry *pvo, *next_pvo; - pmap_t pmap; - - rw_wlock(&pvh_global_lock); - pvo_head = vm_page_to_pvoh(m); - for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { - next_pvo = LIST_NEXT(pvo, pvo_vlink); - - pmap = pvo->pvo_pmap; - PMAP_LOCK(pmap); - moea_pvo_remove(pvo, -1); - PMAP_UNLOCK(pmap); - } - if ((m->a.flags & PGA_WRITEABLE) && moea_query_bit(m, PTE_CHG)) { - moea_attr_clear(m, PTE_CHG); - vm_page_dirty(m); - } - vm_page_aflag_clear(m, PGA_WRITEABLE); - rw_wunlock(&pvh_global_lock); -} - -static int -moea_mincore(pmap_t pm, vm_offset_t va, vm_paddr_t *pap) -{ - struct pvo_entry *pvo; - vm_paddr_t pa; - vm_page_t m; - int val; - bool managed; - - PMAP_LOCK(pm); - - pvo = moea_pvo_find_va(pm, va & ~ADDR_POFF, NULL); - if (pvo != NULL) { - pa = PVO_PADDR(pvo); - m = PHYS_TO_VM_PAGE(pa); - managed = (pvo->pvo_vaddr & PVO_MANAGED) == PVO_MANAGED; - val = MINCORE_INCORE; - } else { - PMAP_UNLOCK(pm); - return (0); - } - - PMAP_UNLOCK(pm); - - if (m == NULL) - return (0); - - if (managed) { - if (moea_is_modified(m)) - val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER; - - if (moea_is_referenced(m)) - val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER; - } - - if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) != - (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && - managed) { - *pap = pa; - } - - return (val); -} - -/* - * Allocate a physical page of memory directly from the phys_avail map. - * Can only be called from moea_bootstrap before avail start and end are - * calculated. - */ -static vm_offset_t -moea_bootstrap_alloc(vm_size_t size, u_int align) -{ - vm_offset_t s, e; - int i, j; - - size = round_page(size); - for (i = 0; phys_avail[i + 1] != 0; i += 2) { - if (align != 0) - s = roundup2(phys_avail[i], align); - else - s = phys_avail[i]; - e = s + size; - - if (s < phys_avail[i] || e > phys_avail[i + 1]) - continue; - - if (s == phys_avail[i]) { - phys_avail[i] += size; - } else if (e == phys_avail[i + 1]) { - phys_avail[i + 1] -= size; - } else { - for (j = phys_avail_count * 2; j > i; j -= 2) { - phys_avail[j] = phys_avail[j - 2]; - phys_avail[j + 1] = phys_avail[j - 1]; - } - - phys_avail[i + 3] = phys_avail[i + 1]; - phys_avail[i + 1] = s; - phys_avail[i + 2] = e; - phys_avail_count++; - } - - return (s); - } - panic("moea_bootstrap_alloc: could not allocate memory"); -} - -static void -moea_syncicache(vm_paddr_t pa, vm_size_t len) -{ - __syncicache((void *)pa, len); -} - -static int -moea_pvo_enter(pmap_t pm, uma_zone_t zone, struct pvo_head *pvo_head, - vm_offset_t va, vm_paddr_t pa, u_int pte_lo, int flags) -{ - struct pvo_entry *pvo; - u_int sr; - int first; - u_int ptegidx; - int i; - int bootstrap; - - moea_pvo_enter_calls++; - first = 0; - bootstrap = 0; - - /* - * Compute the PTE Group index. - */ - va &= ~ADDR_POFF; - sr = va_to_sr(pm->pm_sr, va); - ptegidx = va_to_pteg(sr, va); - - /* - * Remove any existing mapping for this page. Reuse the pvo entry if - * there is a mapping. - */ - mtx_lock(&moea_table_mutex); - LIST_FOREACH(pvo, &moea_pvo_table[ptegidx], pvo_olink) { - if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { - if (PVO_PADDR(pvo) == pa && - (pvo->pvo_pte.pte.pte_lo & PTE_PP) == - (pte_lo & PTE_PP)) { - /* - * The PTE is not changing. Instead, this may - * be a request to change the mapping's wired - * attribute. - */ - mtx_unlock(&moea_table_mutex); - if ((flags & PVO_WIRED) != 0 && - (pvo->pvo_vaddr & PVO_WIRED) == 0) { - pvo->pvo_vaddr |= PVO_WIRED; - pm->pm_stats.wired_count++; - } else if ((flags & PVO_WIRED) == 0 && - (pvo->pvo_vaddr & PVO_WIRED) != 0) { - pvo->pvo_vaddr &= ~PVO_WIRED; - pm->pm_stats.wired_count--; - } - return (0); - } - moea_pvo_remove(pvo, -1); - break; - } - } - - /* - * If we aren't overwriting a mapping, try to allocate. - */ - if (moea_initialized) { - pvo = uma_zalloc(zone, M_NOWAIT); - } else { - if (moea_bpvo_pool_index >= BPVO_POOL_SIZE) { - panic("moea_enter: bpvo pool exhausted, %d, %d, %d", - moea_bpvo_pool_index, BPVO_POOL_SIZE, - BPVO_POOL_SIZE * sizeof(struct pvo_entry)); - } - pvo = &moea_bpvo_pool[moea_bpvo_pool_index]; - moea_bpvo_pool_index++; - bootstrap = 1; - } - - if (pvo == NULL) { - mtx_unlock(&moea_table_mutex); - return (ENOMEM); - } - - moea_pvo_entries++; - pvo->pvo_vaddr = va; - pvo->pvo_pmap = pm; - LIST_INSERT_HEAD(&moea_pvo_table[ptegidx], pvo, pvo_olink); - pvo->pvo_vaddr &= ~ADDR_POFF; - if (flags & PVO_WIRED) - pvo->pvo_vaddr |= PVO_WIRED; - if (pvo_head != &moea_pvo_kunmanaged) - pvo->pvo_vaddr |= PVO_MANAGED; - if (bootstrap) - pvo->pvo_vaddr |= PVO_BOOTSTRAP; - - moea_pte_create(&pvo->pvo_pte.pte, sr, va, pa | pte_lo); - - /* - * Add to pmap list - */ - RB_INSERT(pvo_tree, &pm->pmap_pvo, pvo); - - /* - * Remember if the list was empty and therefore will be the first - * item. - */ - if (LIST_FIRST(pvo_head) == NULL) - first = 1; - LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); - - if (pvo->pvo_vaddr & PVO_WIRED) - pm->pm_stats.wired_count++; - pm->pm_stats.resident_count++; - - i = moea_pte_insert(ptegidx, &pvo->pvo_pte.pte); - KASSERT(i < 8, ("Invalid PTE index")); - if (i >= 0) { - PVO_PTEGIDX_SET(pvo, i); - } else { - panic("moea_pvo_enter: overflow"); - moea_pte_overflow++; - } - mtx_unlock(&moea_table_mutex); - - return (first ? ENOENT : 0); -} - -static void -moea_pvo_remove(struct pvo_entry *pvo, int pteidx) -{ - struct pte *pt; - - /* - * If there is an active pte entry, we need to deactivate it (and - * save the ref & cfg bits). - */ - pt = moea_pvo_to_pte(pvo, pteidx); - if (pt != NULL) { - moea_pte_unset(pt, &pvo->pvo_pte.pte, pvo->pvo_vaddr); - mtx_unlock(&moea_table_mutex); - PVO_PTEGIDX_CLR(pvo); - } else { - moea_pte_overflow--; - } - - /* - * Update our statistics. - */ - pvo->pvo_pmap->pm_stats.resident_count--; - if (pvo->pvo_vaddr & PVO_WIRED) - pvo->pvo_pmap->pm_stats.wired_count--; - - /* - * Remove this PVO from the PV and pmap lists. - */ - LIST_REMOVE(pvo, pvo_vlink); - RB_REMOVE(pvo_tree, &pvo->pvo_pmap->pmap_pvo, pvo); - - /* - * Save the REF/CHG bits into their cache if the page is managed. - * Clear PGA_WRITEABLE if all mappings of the page have been removed. - */ - if ((pvo->pvo_vaddr & PVO_MANAGED) == PVO_MANAGED) { - struct vm_page *pg; - - pg = PHYS_TO_VM_PAGE(PVO_PADDR(pvo)); - if (pg != NULL) { - moea_attr_save(pg, pvo->pvo_pte.pte.pte_lo & - (PTE_REF | PTE_CHG)); - if (LIST_EMPTY(&pg->md.mdpg_pvoh)) - vm_page_aflag_clear(pg, PGA_WRITEABLE); - } - } - - /* - * Remove this from the overflow list and return it to the pool - * if we aren't going to reuse it. - */ - LIST_REMOVE(pvo, pvo_olink); - if (!(pvo->pvo_vaddr & PVO_BOOTSTRAP)) - uma_zfree(pvo->pvo_vaddr & PVO_MANAGED ? moea_mpvo_zone : - moea_upvo_zone, pvo); - moea_pvo_entries--; - moea_pvo_remove_calls++; -} - -static __inline int -moea_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) -{ - int pteidx; - - /* - * We can find the actual pte entry without searching by grabbing - * the PTEG index from 3 unused bits in pte_lo[11:9] and by - * noticing the HID bit. - */ - pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); - if (pvo->pvo_pte.pte.pte_hi & PTE_HID) - pteidx ^= moea_pteg_mask * 8; - - return (pteidx); -} - -static struct pvo_entry * -moea_pvo_find_va(pmap_t pm, vm_offset_t va, int *pteidx_p) -{ - struct pvo_entry *pvo; - int ptegidx; - u_int sr; - - va &= ~ADDR_POFF; - sr = va_to_sr(pm->pm_sr, va); - ptegidx = va_to_pteg(sr, va); - - mtx_lock(&moea_table_mutex); - LIST_FOREACH(pvo, &moea_pvo_table[ptegidx], pvo_olink) { - if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { - if (pteidx_p) - *pteidx_p = moea_pvo_pte_index(pvo, ptegidx); - break; - } - } - mtx_unlock(&moea_table_mutex); - - return (pvo); -} - -static struct pte * -moea_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) -{ - struct pte *pt; - - /* - * If we haven't been supplied the ptegidx, calculate it. - */ - if (pteidx == -1) { - int ptegidx; - u_int sr; - - sr = va_to_sr(pvo->pvo_pmap->pm_sr, pvo->pvo_vaddr); - ptegidx = va_to_pteg(sr, pvo->pvo_vaddr); - pteidx = moea_pvo_pte_index(pvo, ptegidx); - } - - pt = &moea_pteg_table[pteidx >> 3].pt[pteidx & 7]; - mtx_lock(&moea_table_mutex); - - if ((pvo->pvo_pte.pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { - panic("moea_pvo_to_pte: pvo %p has valid pte in pvo but no " - "valid pte index", pvo); - } - - if ((pvo->pvo_pte.pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { - panic("moea_pvo_to_pte: pvo %p has valid pte index in pvo " - "pvo but no valid pte", pvo); - } - - if ((pt->pte_hi ^ (pvo->pvo_pte.pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { - if ((pvo->pvo_pte.pte.pte_hi & PTE_VALID) == 0) { - panic("moea_pvo_to_pte: pvo %p has valid pte in " - "moea_pteg_table %p but invalid in pvo", pvo, pt); - } - - if (((pt->pte_lo ^ pvo->pvo_pte.pte.pte_lo) & ~(PTE_CHG|PTE_REF)) - != 0) { - panic("moea_pvo_to_pte: pvo %p pte does not match " - "pte %p in moea_pteg_table", pvo, pt); - } - - mtx_assert(&moea_table_mutex, MA_OWNED); - return (pt); - } - - if (pvo->pvo_pte.pte.pte_hi & PTE_VALID) { - panic("moea_pvo_to_pte: pvo %p has invalid pte %p in " - "moea_pteg_table but valid in pvo: %8x, %8x", pvo, pt, pvo->pvo_pte.pte.pte_hi, pt->pte_hi); - } - - mtx_unlock(&moea_table_mutex); - return (NULL); -} - -/* - * XXX: THIS STUFF SHOULD BE IN pte.c? - */ -int -moea_pte_spill(vm_offset_t addr) -{ - struct pvo_entry *source_pvo, *victim_pvo; - struct pvo_entry *pvo; - int ptegidx, i, j; - u_int sr; - struct pteg *pteg; - struct pte *pt; - - moea_pte_spills++; - - sr = mfsrin(addr); - ptegidx = va_to_pteg(sr, addr); - - /* - * Have to substitute some entry. Use the primary hash for this. - * Use low bits of timebase as random generator. - */ - pteg = &moea_pteg_table[ptegidx]; - mtx_lock(&moea_table_mutex); - __asm __volatile("mftb %0" : "=r"(i)); - i &= 7; - pt = &pteg->pt[i]; - - source_pvo = NULL; - victim_pvo = NULL; - LIST_FOREACH(pvo, &moea_pvo_table[ptegidx], pvo_olink) { - /* - * We need to find a pvo entry for this address. - */ - if (source_pvo == NULL && - moea_pte_match(&pvo->pvo_pte.pte, sr, addr, - pvo->pvo_pte.pte.pte_hi & PTE_HID)) { - /* - * Now found an entry to be spilled into the pteg. - * The PTE is now valid, so we know it's active. - */ - j = moea_pte_insert(ptegidx, &pvo->pvo_pte.pte); - - if (j >= 0) { - PVO_PTEGIDX_SET(pvo, j); - moea_pte_overflow--; - mtx_unlock(&moea_table_mutex); - return (1); - } - - source_pvo = pvo; - - if (victim_pvo != NULL) - break; - } - - /* - * We also need the pvo entry of the victim we are replacing - * so save the R & C bits of the PTE. - */ - if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && - moea_pte_compare(pt, &pvo->pvo_pte.pte)) { - victim_pvo = pvo; - if (source_pvo != NULL) - break; - } - } - - if (source_pvo == NULL) { - mtx_unlock(&moea_table_mutex); - return (0); - } - - if (victim_pvo == NULL) { - if ((pt->pte_hi & PTE_HID) == 0) - panic("moea_pte_spill: victim p-pte (%p) has no pvo" - "entry", pt); - - /* - * If this is a secondary PTE, we need to search it's primary - * pvo bucket for the matching PVO. - */ - LIST_FOREACH(pvo, &moea_pvo_table[ptegidx ^ moea_pteg_mask], - pvo_olink) { - /* - * We also need the pvo entry of the victim we are - * replacing so save the R & C bits of the PTE. - */ - if (moea_pte_compare(pt, &pvo->pvo_pte.pte)) { - victim_pvo = pvo; - break; - } - } - - if (victim_pvo == NULL) - panic("moea_pte_spill: victim s-pte (%p) has no pvo" - "entry", pt); - } - - /* - * We are invalidating the TLB entry for the EA we are replacing even - * though it's valid. If we don't, we lose any ref/chg bit changes - * contained in the TLB entry. - */ - source_pvo->pvo_pte.pte.pte_hi &= ~PTE_HID; - - moea_pte_unset(pt, &victim_pvo->pvo_pte.pte, victim_pvo->pvo_vaddr); - moea_pte_set(pt, &source_pvo->pvo_pte.pte); - - PVO_PTEGIDX_CLR(victim_pvo); - PVO_PTEGIDX_SET(source_pvo, i); - moea_pte_replacements++; - - mtx_unlock(&moea_table_mutex); - return (1); -} - -static __inline struct pvo_entry * -moea_pte_spillable_ident(u_int ptegidx) -{ - struct pte *pt; - struct pvo_entry *pvo_walk, *pvo = NULL; - - LIST_FOREACH(pvo_walk, &moea_pvo_table[ptegidx], pvo_olink) { - if (pvo_walk->pvo_vaddr & PVO_WIRED) - continue; - - if (!(pvo_walk->pvo_pte.pte.pte_hi & PTE_VALID)) - continue; - - pt = moea_pvo_to_pte(pvo_walk, -1); - - if (pt == NULL) - continue; - - pvo = pvo_walk; - - mtx_unlock(&moea_table_mutex); - if (!(pt->pte_lo & PTE_REF)) - return (pvo_walk); - } - - return (pvo); -} - -static int -moea_pte_insert(u_int ptegidx, struct pte *pvo_pt) -{ - struct pte *pt; - struct pvo_entry *victim_pvo; - int i; - int victim_idx; - u_int pteg_bkpidx = ptegidx; - - mtx_assert(&moea_table_mutex, MA_OWNED); - - /* - * First try primary hash. - */ - for (pt = moea_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { - if ((pt->pte_hi & PTE_VALID) == 0) { - pvo_pt->pte_hi &= ~PTE_HID; - moea_pte_set(pt, pvo_pt); - return (i); - } - } - - /* - * Now try secondary hash. - */ - ptegidx ^= moea_pteg_mask; - - for (pt = moea_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { - if ((pt->pte_hi & PTE_VALID) == 0) { - pvo_pt->pte_hi |= PTE_HID; - moea_pte_set(pt, pvo_pt); - return (i); - } - } - - /* Try again, but this time try to force a PTE out. */ - ptegidx = pteg_bkpidx; - - victim_pvo = moea_pte_spillable_ident(ptegidx); - if (victim_pvo == NULL) { - ptegidx ^= moea_pteg_mask; - victim_pvo = moea_pte_spillable_ident(ptegidx); - } - - if (victim_pvo == NULL) { - panic("moea_pte_insert: overflow"); - return (-1); - } - - victim_idx = moea_pvo_pte_index(victim_pvo, ptegidx); - - if (pteg_bkpidx == ptegidx) - pvo_pt->pte_hi &= ~PTE_HID; - else - pvo_pt->pte_hi |= PTE_HID; - - /* - * Synchronize the sacrifice PTE with its PVO, then mark both - * invalid. The PVO will be reused when/if the VM system comes - * here after a fault. - */ - pt = &moea_pteg_table[victim_idx >> 3].pt[victim_idx & 7]; - - if (pt->pte_hi != victim_pvo->pvo_pte.pte.pte_hi) - panic("Victim PVO doesn't match PTE! PVO: %8x, PTE: %8x", victim_pvo->pvo_pte.pte.pte_hi, pt->pte_hi); - - /* - * Set the new PTE. - */ - moea_pte_unset(pt, &victim_pvo->pvo_pte.pte, victim_pvo->pvo_vaddr); - PVO_PTEGIDX_CLR(victim_pvo); - moea_pte_overflow++; - moea_pte_set(pt, pvo_pt); - - return (victim_idx & 7); -} - -static boolean_t -moea_query_bit(vm_page_t m, int ptebit) -{ - struct pvo_entry *pvo; - struct pte *pt; - - rw_assert(&pvh_global_lock, RA_WLOCKED); - if (moea_attr_fetch(m) & ptebit) - return (TRUE); - - LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { - /* - * See if we saved the bit off. If so, cache it and return - * success. - */ - if (pvo->pvo_pte.pte.pte_lo & ptebit) { - moea_attr_save(m, ptebit); - return (TRUE); - } - } - - /* - * No luck, now go through the hard part of looking at the PTEs - * themselves. Sync so that any pending REF/CHG bits are flushed to - * the PTEs. - */ - powerpc_sync(); - LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { - /* - * See if this pvo has a valid PTE. if so, fetch the - * REF/CHG bits from the valid PTE. If the appropriate - * ptebit is set, cache it and return success. - */ - pt = moea_pvo_to_pte(pvo, -1); - if (pt != NULL) { - moea_pte_synch(pt, &pvo->pvo_pte.pte); - mtx_unlock(&moea_table_mutex); - if (pvo->pvo_pte.pte.pte_lo & ptebit) { - moea_attr_save(m, ptebit); - return (TRUE); - } - } - } - - return (FALSE); -} - -static u_int -moea_clear_bit(vm_page_t m, int ptebit) -{ - u_int count; - struct pvo_entry *pvo; - struct pte *pt; - - rw_assert(&pvh_global_lock, RA_WLOCKED); - - /* - * Clear the cached value. - */ - moea_attr_clear(m, ptebit); - - /* - * Sync so that any pending REF/CHG bits are flushed to the PTEs (so - * we can reset the right ones). note that since the pvo entries and - * list heads are accessed via BAT0 and are never placed in the page - * table, we don't have to worry about further accesses setting the - * REF/CHG bits. - */ - powerpc_sync(); - - /* - * For each pvo entry, clear the pvo's ptebit. If this pvo has a - * valid pte clear the ptebit from the valid pte. - */ - count = 0; - LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { - pt = moea_pvo_to_pte(pvo, -1); - if (pt != NULL) { - moea_pte_synch(pt, &pvo->pvo_pte.pte); - if (pvo->pvo_pte.pte.pte_lo & ptebit) { - count++; - moea_pte_clear(pt, PVO_VADDR(pvo), ptebit); - } - mtx_unlock(&moea_table_mutex); - } - pvo->pvo_pte.pte.pte_lo &= ~ptebit; - } - - return (count); -} - -/* - * Return true if the physical range is encompassed by the battable[idx] - */ -static int -moea_bat_mapped(int idx, vm_paddr_t pa, vm_size_t size) -{ - u_int prot; - u_int32_t start; - u_int32_t end; - u_int32_t bat_ble; - - /* - * Return immediately if not a valid mapping - */ - if (!(battable[idx].batu & BAT_Vs)) - return (EINVAL); - - /* - * The BAT entry must be cache-inhibited, guarded, and r/w - * so it can function as an i/o page - */ - prot = battable[idx].batl & (BAT_I|BAT_G|BAT_PP_RW); - if (prot != (BAT_I|BAT_G|BAT_PP_RW)) - return (EPERM); - - /* - * The address should be within the BAT range. Assume that the - * start address in the BAT has the correct alignment (thus - * not requiring masking) - */ - start = battable[idx].batl & BAT_PBS; - bat_ble = (battable[idx].batu & ~(BAT_EBS)) | 0x03; - end = start | (bat_ble << 15) | 0x7fff; - - if ((pa < start) || ((pa + size) > end)) - return (ERANGE); - - return (0); -} - -int -moea_dev_direct_mapped(vm_paddr_t pa, vm_size_t size) -{ - int i; - - /* - * This currently does not work for entries that - * overlap 256M BAT segments. - */ - - for(i = 0; i < 16; i++) - if (moea_bat_mapped(i, pa, size) == 0) - return (0); - - return (EFAULT); -} - -/* - * Map a set of physical memory pages into the kernel virtual - * address space. Return a pointer to where it is mapped. This - * routine is intended to be used for mapping device memory, - * NOT real memory. - */ -void * -moea_mapdev(vm_paddr_t pa, vm_size_t size) -{ - - return (moea_mapdev_attr(pa, size, VM_MEMATTR_DEFAULT)); -} - -void * -moea_mapdev_attr(vm_paddr_t pa, vm_size_t size, vm_memattr_t ma) -{ - vm_offset_t va, tmpva, ppa, offset; - int i; - - ppa = trunc_page(pa); - offset = pa & PAGE_MASK; - size = roundup(offset + size, PAGE_SIZE); - - /* - * If the physical address lies within a valid BAT table entry, - * return the 1:1 mapping. This currently doesn't work - * for regions that overlap 256M BAT segments. - */ - for (i = 0; i < 16; i++) { - if (moea_bat_mapped(i, pa, size) == 0) - return ((void *) pa); - } - - va = kva_alloc(size); - if (!va) - panic("moea_mapdev: Couldn't alloc kernel virtual memory"); - - for (tmpva = va; size > 0;) { - moea_kenter_attr(tmpva, ppa, ma); - tlbie(tmpva); - size -= PAGE_SIZE; - tmpva += PAGE_SIZE; - ppa += PAGE_SIZE; - } - - return ((void *)(va + offset)); -} - -void -moea_unmapdev(vm_offset_t va, vm_size_t size) -{ - vm_offset_t base, offset; - - /* - * If this is outside kernel virtual space, then it's a - * battable entry and doesn't require unmapping - */ - if ((va >= VM_MIN_KERNEL_ADDRESS) && (va <= virtual_end)) { - base = trunc_page(va); - offset = va & PAGE_MASK; - size = roundup(offset + size, PAGE_SIZE); - moea_qremove(base, atop(size)); - kva_free(base, size); - } -} - -static void -moea_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz) -{ - struct pvo_entry *pvo; - vm_offset_t lim; - vm_paddr_t pa; - vm_size_t len; - - PMAP_LOCK(pm); - while (sz > 0) { - lim = round_page(va + 1); - len = MIN(lim - va, sz); - pvo = moea_pvo_find_va(pm, va & ~ADDR_POFF, NULL); - if (pvo != NULL) { - pa = PVO_PADDR(pvo) | (va & ADDR_POFF); - moea_syncicache(pa, len); - } - va += len; - sz -= len; - } - PMAP_UNLOCK(pm); -} - -void -moea_dumpsys_map(vm_paddr_t pa, size_t sz, void **va) -{ - - *va = (void *)pa; -} - -extern struct dump_pa dump_map[PHYS_AVAIL_SZ + 1]; - -void -moea_scan_init() -{ - struct pvo_entry *pvo; - vm_offset_t va; - int i; - - if (!do_minidump) { - /* Initialize phys. segments for dumpsys(). */ - memset(&dump_map, 0, sizeof(dump_map)); - mem_regions(&pregions, &pregions_sz, ®ions, ®ions_sz); - for (i = 0; i < pregions_sz; i++) { - dump_map[i].pa_start = pregions[i].mr_start; - dump_map[i].pa_size = pregions[i].mr_size; - } - return; - } - - /* Virtual segments for minidumps: */ - memset(&dump_map, 0, sizeof(dump_map)); - - /* 1st: kernel .data and .bss. */ - dump_map[0].pa_start = trunc_page((uintptr_t)_etext); - dump_map[0].pa_size = - round_page((uintptr_t)_end) - dump_map[0].pa_start; - - /* 2nd: msgbuf and tables (see pmap_bootstrap()). */ - dump_map[1].pa_start = (vm_paddr_t)msgbufp->msg_ptr; - dump_map[1].pa_size = round_page(msgbufp->msg_size); - - /* 3rd: kernel VM. */ - va = dump_map[1].pa_start + dump_map[1].pa_size; - /* Find start of next chunk (from va). */ - while (va < virtual_end) { - /* Don't dump the buffer cache. */ - if (va >= kmi.buffer_sva && va < kmi.buffer_eva) { - va = kmi.buffer_eva; - continue; - } - pvo = moea_pvo_find_va(kernel_pmap, va & ~ADDR_POFF, NULL); - if (pvo != NULL && (pvo->pvo_pte.pte.pte_hi & PTE_VALID)) - break; - va += PAGE_SIZE; - } - if (va < virtual_end) { - dump_map[2].pa_start = va; - va += PAGE_SIZE; - /* Find last page in chunk. */ - while (va < virtual_end) { - /* Don't run into the buffer cache. */ - if (va == kmi.buffer_sva) - break; - pvo = moea_pvo_find_va(kernel_pmap, va & ~ADDR_POFF, - NULL); - if (pvo == NULL || - !(pvo->pvo_pte.pte.pte_hi & PTE_VALID)) - break; - va += PAGE_SIZE; - } - dump_map[2].pa_size = va - dump_map[2].pa_start; - } -} diff --git a/sys/powerpc/aim/mmu_oea64.c b/sys/powerpc/aim/mmu_oea64.c deleted file mode 100644 index 9f8151a4941..00000000000 --- a/sys/powerpc/aim/mmu_oea64.c +++ /dev/null @@ -1,4303 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2008-2015 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -/* - * Manages physical address maps. - * - * Since the information managed by this module is also stored by the - * logical address mapping module, this module may throw away valid virtual - * to physical mappings at almost any time. However, invalidations of - * mappings must be done as requested. - * - * In order to cope with hardware architectures which make virtual to - * physical map invalidates expensive, this module may delay invalidate - * reduced protection operations until such time as they are actually - * necessary. This module is given full information as to which processors - * are currently using which maps, and to when physical maps must be made - * correct. - */ - -#include "opt_kstack_pages.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "mmu_oea64.h" - -void moea64_release_vsid(uint64_t vsid); -uintptr_t moea64_get_unique_vsid(void); - -#define DISABLE_TRANS(msr) msr = mfmsr(); mtmsr(msr & ~PSL_DR) -#define ENABLE_TRANS(msr) mtmsr(msr) - -#define VSID_MAKE(sr, hash) ((sr) | (((hash) & 0xfffff) << 4)) -#define VSID_TO_HASH(vsid) (((vsid) >> 4) & 0xfffff) -#define VSID_HASH_MASK 0x0000007fffffffffULL - -/* - * Locking semantics: - * - * There are two locks of interest: the page locks and the pmap locks, which - * protect their individual PVO lists and are locked in that order. The contents - * of all PVO entries are protected by the locks of their respective pmaps. - * The pmap of any PVO is guaranteed not to change so long as the PVO is linked - * into any list. - * - */ - -#define PV_LOCK_COUNT PA_LOCK_COUNT -static struct mtx_padalign pv_lock[PV_LOCK_COUNT]; - -/* - * Cheap NUMA-izing of the pv locks, to reduce contention across domains. - * NUMA domains on POWER9 appear to be indexed as sparse memory spaces, with the - * index at (N << 45). - */ -#ifdef __powerpc64__ -#define PV_LOCK_IDX(pa) ((pa_index(pa) * (((pa) >> 45) + 1)) % PV_LOCK_COUNT) -#else -#define PV_LOCK_IDX(pa) (pa_index(pa) % PV_LOCK_COUNT) -#endif -#define PV_LOCKPTR(pa) ((struct mtx *)(&pv_lock[PV_LOCK_IDX(pa)])) -#define PV_LOCK(pa) mtx_lock(PV_LOCKPTR(pa)) -#define PV_UNLOCK(pa) mtx_unlock(PV_LOCKPTR(pa)) -#define PV_LOCKASSERT(pa) mtx_assert(PV_LOCKPTR(pa), MA_OWNED) -#define PV_PAGE_LOCK(m) PV_LOCK(VM_PAGE_TO_PHYS(m)) -#define PV_PAGE_UNLOCK(m) PV_UNLOCK(VM_PAGE_TO_PHYS(m)) -#define PV_PAGE_LOCKASSERT(m) PV_LOCKASSERT(VM_PAGE_TO_PHYS(m)) - -/* Superpage PV lock */ - -#define PV_LOCK_SIZE (1<pvo_vaddr & PVO_LARGE) && \ - (pvo)->pvo_pmap != kernel_pmap) - -/* Get physical address from PVO. */ -#define PVO_PADDR(pvo) moea64_pvo_paddr(pvo) - -/* MD page flag indicating that the page is a superpage. */ -#define MDPG_ATTR_SP 0x40000000 - -SYSCTL_DECL(_vm_pmap); - -static SYSCTL_NODE(_vm_pmap, OID_AUTO, sp, CTLFLAG_RD, 0, - "SP page mapping counters"); - -static u_long sp_demotions; -SYSCTL_ULONG(_vm_pmap_sp, OID_AUTO, demotions, CTLFLAG_RD, - &sp_demotions, 0, "SP page demotions"); - -static u_long sp_mappings; -SYSCTL_ULONG(_vm_pmap_sp, OID_AUTO, mappings, CTLFLAG_RD, - &sp_mappings, 0, "SP page mappings"); - -static u_long sp_p_failures; -SYSCTL_ULONG(_vm_pmap_sp, OID_AUTO, p_failures, CTLFLAG_RD, - &sp_p_failures, 0, "SP page promotion failures"); - -static u_long sp_p_fail_pa; -SYSCTL_ULONG(_vm_pmap_sp, OID_AUTO, p_fail_pa, CTLFLAG_RD, - &sp_p_fail_pa, 0, "SP page promotion failure: PAs don't match"); - -static u_long sp_p_fail_flags; -SYSCTL_ULONG(_vm_pmap_sp, OID_AUTO, p_fail_flags, CTLFLAG_RD, - &sp_p_fail_flags, 0, "SP page promotion failure: page flags don't match"); - -static u_long sp_p_fail_prot; -SYSCTL_ULONG(_vm_pmap_sp, OID_AUTO, p_fail_prot, CTLFLAG_RD, - &sp_p_fail_prot, 0, - "SP page promotion failure: page protections don't match"); - -static u_long sp_p_fail_wimg; -SYSCTL_ULONG(_vm_pmap_sp, OID_AUTO, p_fail_wimg, CTLFLAG_RD, - &sp_p_fail_wimg, 0, "SP page promotion failure: WIMG bits don't match"); - -static u_long sp_promotions; -SYSCTL_ULONG(_vm_pmap_sp, OID_AUTO, promotions, CTLFLAG_RD, - &sp_promotions, 0, "SP page promotions"); - -static bool moea64_ps_enabled(pmap_t); -static void moea64_align_superpage(vm_object_t, vm_ooffset_t, - vm_offset_t *, vm_size_t); - -static int moea64_sp_enter(pmap_t pmap, vm_offset_t va, - vm_page_t m, vm_prot_t prot, u_int flags, int8_t psind); -static struct pvo_entry *moea64_sp_remove(struct pvo_entry *sp, - struct pvo_dlist *tofree); - -static void moea64_sp_promote(pmap_t pmap, vm_offset_t va, vm_page_t m); -static void moea64_sp_demote_aligned(struct pvo_entry *sp); -static void moea64_sp_demote(struct pvo_entry *pvo); - -static struct pvo_entry *moea64_sp_unwire(struct pvo_entry *sp); -static struct pvo_entry *moea64_sp_protect(struct pvo_entry *sp, - vm_prot_t prot); - -static int64_t moea64_sp_query(struct pvo_entry *pvo, uint64_t ptebit); -static int64_t moea64_sp_clear(struct pvo_entry *pvo, vm_page_t m, - uint64_t ptebit); - -static __inline bool moea64_sp_pvo_in_range(struct pvo_entry *pvo, - vm_offset_t sva, vm_offset_t eva); - -/* - * Kernel MMU interface - */ -void moea64_clear_modify(vm_page_t); -void moea64_copy_page(vm_page_t, vm_page_t); -void moea64_copy_pages(vm_page_t *ma, vm_offset_t a_offset, - vm_page_t *mb, vm_offset_t b_offset, int xfersize); -int moea64_enter(pmap_t, vm_offset_t, vm_page_t, vm_prot_t, - u_int flags, int8_t psind); -void moea64_enter_object(pmap_t, vm_offset_t, vm_offset_t, vm_page_t, - vm_prot_t); -void moea64_enter_quick(pmap_t, vm_offset_t, vm_page_t, vm_prot_t); -vm_paddr_t moea64_extract(pmap_t, vm_offset_t); -vm_page_t moea64_extract_and_hold(pmap_t, vm_offset_t, vm_prot_t); -void moea64_init(void); -boolean_t moea64_is_modified(vm_page_t); -boolean_t moea64_is_prefaultable(pmap_t, vm_offset_t); -boolean_t moea64_is_referenced(vm_page_t); -int moea64_ts_referenced(vm_page_t); -vm_offset_t moea64_map(vm_offset_t *, vm_paddr_t, vm_paddr_t, int); -boolean_t moea64_page_exists_quick(pmap_t, vm_page_t); -void moea64_page_init(vm_page_t); -int moea64_page_wired_mappings(vm_page_t); -int moea64_pinit(pmap_t); -void moea64_pinit0(pmap_t); -void moea64_protect(pmap_t, vm_offset_t, vm_offset_t, vm_prot_t); -void moea64_qenter(vm_offset_t, vm_page_t *, int); -void moea64_qremove(vm_offset_t, int); -void moea64_release(pmap_t); -void moea64_remove(pmap_t, vm_offset_t, vm_offset_t); -void moea64_remove_pages(pmap_t); -void moea64_remove_all(vm_page_t); -void moea64_remove_write(vm_page_t); -void moea64_unwire(pmap_t, vm_offset_t, vm_offset_t); -void moea64_zero_page(vm_page_t); -void moea64_zero_page_area(vm_page_t, int, int); -void moea64_activate(struct thread *); -void moea64_deactivate(struct thread *); -void *moea64_mapdev(vm_paddr_t, vm_size_t); -void *moea64_mapdev_attr(vm_paddr_t, vm_size_t, vm_memattr_t); -void moea64_unmapdev(vm_offset_t, vm_size_t); -vm_paddr_t moea64_kextract(vm_offset_t); -void moea64_page_set_memattr(vm_page_t m, vm_memattr_t ma); -void moea64_kenter_attr(vm_offset_t, vm_paddr_t, vm_memattr_t ma); -void moea64_kenter(vm_offset_t, vm_paddr_t); -int moea64_dev_direct_mapped(vm_paddr_t, vm_size_t); -static void moea64_sync_icache(pmap_t, vm_offset_t, vm_size_t); -void moea64_dumpsys_map(vm_paddr_t pa, size_t sz, - void **va); -void moea64_scan_init(void); -vm_offset_t moea64_quick_enter_page(vm_page_t m); -void moea64_quick_remove_page(vm_offset_t addr); -boolean_t moea64_page_is_mapped(vm_page_t m); -static int moea64_map_user_ptr(pmap_t pm, - volatile const void *uaddr, void **kaddr, size_t ulen, size_t *klen); -static int moea64_decode_kernel_ptr(vm_offset_t addr, - int *is_user, vm_offset_t *decoded_addr); -static size_t moea64_scan_pmap(struct bitset *dump_bitset); -static void *moea64_dump_pmap_init(unsigned blkpgs); -#ifdef __powerpc64__ -static void moea64_page_array_startup(long); -#endif -static int moea64_mincore(pmap_t, vm_offset_t, vm_paddr_t *); - -static struct pmap_funcs moea64_methods = { - .clear_modify = moea64_clear_modify, - .copy_page = moea64_copy_page, - .copy_pages = moea64_copy_pages, - .enter = moea64_enter, - .enter_object = moea64_enter_object, - .enter_quick = moea64_enter_quick, - .extract = moea64_extract, - .extract_and_hold = moea64_extract_and_hold, - .init = moea64_init, - .is_modified = moea64_is_modified, - .is_prefaultable = moea64_is_prefaultable, - .is_referenced = moea64_is_referenced, - .ts_referenced = moea64_ts_referenced, - .map = moea64_map, - .mincore = moea64_mincore, - .page_exists_quick = moea64_page_exists_quick, - .page_init = moea64_page_init, - .page_wired_mappings = moea64_page_wired_mappings, - .pinit = moea64_pinit, - .pinit0 = moea64_pinit0, - .protect = moea64_protect, - .qenter = moea64_qenter, - .qremove = moea64_qremove, - .release = moea64_release, - .remove = moea64_remove, - .remove_pages = moea64_remove_pages, - .remove_all = moea64_remove_all, - .remove_write = moea64_remove_write, - .sync_icache = moea64_sync_icache, - .unwire = moea64_unwire, - .zero_page = moea64_zero_page, - .zero_page_area = moea64_zero_page_area, - .activate = moea64_activate, - .deactivate = moea64_deactivate, - .page_set_memattr = moea64_page_set_memattr, - .quick_enter_page = moea64_quick_enter_page, - .quick_remove_page = moea64_quick_remove_page, - .page_is_mapped = moea64_page_is_mapped, -#ifdef __powerpc64__ - .page_array_startup = moea64_page_array_startup, -#endif - .ps_enabled = moea64_ps_enabled, - .align_superpage = moea64_align_superpage, - - /* Internal interfaces */ - .mapdev = moea64_mapdev, - .mapdev_attr = moea64_mapdev_attr, - .unmapdev = moea64_unmapdev, - .kextract = moea64_kextract, - .kenter = moea64_kenter, - .kenter_attr = moea64_kenter_attr, - .dev_direct_mapped = moea64_dev_direct_mapped, - .dumpsys_pa_init = moea64_scan_init, - .dumpsys_scan_pmap = moea64_scan_pmap, - .dumpsys_dump_pmap_init = moea64_dump_pmap_init, - .dumpsys_map_chunk = moea64_dumpsys_map, - .map_user_ptr = moea64_map_user_ptr, - .decode_kernel_ptr = moea64_decode_kernel_ptr, -}; - -MMU_DEF(oea64_mmu, "mmu_oea64_base", moea64_methods); - -/* - * Get physical address from PVO. - * - * For superpages, the lower bits are not stored on pvo_pte.pa and must be - * obtained from VA. - */ -static __always_inline vm_paddr_t -moea64_pvo_paddr(struct pvo_entry *pvo) -{ - vm_paddr_t pa; - - pa = (pvo)->pvo_pte.pa & LPTE_RPGN; - - if (PVO_IS_SP(pvo)) { - pa &= ~HPT_SP_MASK; /* This is needed to clear LPTE_LP bits. */ - pa |= PVO_VADDR(pvo) & HPT_SP_MASK; - } - return (pa); -} - -static struct pvo_head * -vm_page_to_pvoh(vm_page_t m) -{ - - mtx_assert(PV_LOCKPTR(VM_PAGE_TO_PHYS(m)), MA_OWNED); - return (&m->md.mdpg_pvoh); -} - -static struct pvo_entry * -alloc_pvo_entry(int bootstrap) -{ - struct pvo_entry *pvo; - - if (!moea64_initialized || bootstrap) { - if (moea64_bpvo_pool_index >= moea64_bpvo_pool_size) { - panic("%s: bpvo pool exhausted, index=%d, size=%d, bytes=%zd." - "Try setting machdep.moea64_bpvo_pool_size tunable", - __func__, moea64_bpvo_pool_index, - moea64_bpvo_pool_size, - moea64_bpvo_pool_size * sizeof(struct pvo_entry)); - } - pvo = &moea64_bpvo_pool[ - atomic_fetchadd_int(&moea64_bpvo_pool_index, 1)]; - bzero(pvo, sizeof(*pvo)); - pvo->pvo_vaddr = PVO_BOOTSTRAP; - } else - pvo = uma_zalloc(moea64_pvo_zone, M_NOWAIT | M_ZERO); - - return (pvo); -} - -static void -init_pvo_entry(struct pvo_entry *pvo, pmap_t pmap, vm_offset_t va) -{ - uint64_t vsid; - uint64_t hash; - int shift; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - - pvo->pvo_pmap = pmap; - va &= ~ADDR_POFF; - pvo->pvo_vaddr |= va; - vsid = va_to_vsid(pmap, va); - pvo->pvo_vpn = (uint64_t)((va & ADDR_PIDX) >> ADDR_PIDX_SHFT) - | (vsid << 16); - - if (pmap == kernel_pmap && (pvo->pvo_vaddr & PVO_LARGE) != 0) - shift = moea64_large_page_shift; - else - shift = ADDR_PIDX_SHFT; - hash = (vsid & VSID_HASH_MASK) ^ (((uint64_t)va & ADDR_PIDX) >> shift); - pvo->pvo_pte.slot = (hash & moea64_pteg_mask) << 3; -} - -static void -free_pvo_entry(struct pvo_entry *pvo) -{ - - if (!(pvo->pvo_vaddr & PVO_BOOTSTRAP)) - uma_zfree(moea64_pvo_zone, pvo); -} - -void -moea64_pte_from_pvo(const struct pvo_entry *pvo, struct lpte *lpte) -{ - - lpte->pte_hi = moea64_pte_vpn_from_pvo_vpn(pvo); - lpte->pte_hi |= LPTE_VALID; - - if (pvo->pvo_vaddr & PVO_LARGE) - lpte->pte_hi |= LPTE_BIG; - if (pvo->pvo_vaddr & PVO_WIRED) - lpte->pte_hi |= LPTE_WIRED; - if (pvo->pvo_vaddr & PVO_HID) - lpte->pte_hi |= LPTE_HID; - - lpte->pte_lo = pvo->pvo_pte.pa; /* Includes WIMG bits */ - if (pvo->pvo_pte.prot & VM_PROT_WRITE) - lpte->pte_lo |= LPTE_BW; - else - lpte->pte_lo |= LPTE_BR; - - if (!(pvo->pvo_pte.prot & VM_PROT_EXECUTE)) - lpte->pte_lo |= LPTE_NOEXEC; -} - -static __inline uint64_t -moea64_calc_wimg(vm_paddr_t pa, vm_memattr_t ma) -{ - uint64_t pte_lo; - int i; - - if (ma != VM_MEMATTR_DEFAULT) { - switch (ma) { - case VM_MEMATTR_UNCACHEABLE: - return (LPTE_I | LPTE_G); - case VM_MEMATTR_CACHEABLE: - return (LPTE_M); - case VM_MEMATTR_WRITE_COMBINING: - case VM_MEMATTR_WRITE_BACK: - case VM_MEMATTR_PREFETCHABLE: - return (LPTE_I); - case VM_MEMATTR_WRITE_THROUGH: - return (LPTE_W | LPTE_M); - } - } - - /* - * Assume the page is cache inhibited and access is guarded unless - * it's in our available memory array. - */ - pte_lo = LPTE_I | LPTE_G; - for (i = 0; i < pregions_sz; i++) { - if ((pa >= pregions[i].mr_start) && - (pa < (pregions[i].mr_start + pregions[i].mr_size))) { - pte_lo &= ~(LPTE_I | LPTE_G); - pte_lo |= LPTE_M; - break; - } - } - - return pte_lo; -} - -/* - * Quick sort callout for comparing memory regions. - */ -static int om_cmp(const void *a, const void *b); - -static int -om_cmp(const void *a, const void *b) -{ - const struct ofw_map *mapa; - const struct ofw_map *mapb; - - mapa = a; - mapb = b; - if (mapa->om_pa < mapb->om_pa) - return (-1); - else if (mapa->om_pa > mapb->om_pa) - return (1); - else - return (0); -} - -static void -moea64_add_ofw_mappings(phandle_t mmu, size_t sz) -{ - struct ofw_map translations[sz/(4*sizeof(cell_t))]; /*>= 4 cells per */ - pcell_t acells, trans_cells[sz/sizeof(cell_t)]; - struct pvo_entry *pvo; - register_t msr; - vm_offset_t off; - vm_paddr_t pa_base; - int i, j; - - bzero(translations, sz); - OF_getencprop(OF_finddevice("/"), "#address-cells", &acells, - sizeof(acells)); - if (OF_getencprop(mmu, "translations", trans_cells, sz) == -1) - panic("moea64_bootstrap: can't get ofw translations"); - - CTR0(KTR_PMAP, "moea64_add_ofw_mappings: translations"); - sz /= sizeof(cell_t); - for (i = 0, j = 0; i < sz; j++) { - translations[j].om_va = trans_cells[i++]; - translations[j].om_len = trans_cells[i++]; - translations[j].om_pa = trans_cells[i++]; - if (acells == 2) { - translations[j].om_pa <<= 32; - translations[j].om_pa |= trans_cells[i++]; - } - translations[j].om_mode = trans_cells[i++]; - } - KASSERT(i == sz, ("Translations map has incorrect cell count (%d/%zd)", - i, sz)); - - sz = j; - qsort(translations, sz, sizeof (*translations), om_cmp); - - for (i = 0; i < sz; i++) { - pa_base = translations[i].om_pa; - #ifndef __powerpc64__ - if ((translations[i].om_pa >> 32) != 0) - panic("OFW translations above 32-bit boundary!"); - #endif - - if (pa_base % PAGE_SIZE) - panic("OFW translation not page-aligned (phys)!"); - if (translations[i].om_va % PAGE_SIZE) - panic("OFW translation not page-aligned (virt)!"); - - CTR3(KTR_PMAP, "translation: pa=%#zx va=%#x len=%#x", - pa_base, translations[i].om_va, translations[i].om_len); - - /* Now enter the pages for this mapping */ - - DISABLE_TRANS(msr); - for (off = 0; off < translations[i].om_len; off += PAGE_SIZE) { - /* If this address is direct-mapped, skip remapping */ - if (hw_direct_map && - translations[i].om_va == PHYS_TO_DMAP(pa_base) && - moea64_calc_wimg(pa_base + off, VM_MEMATTR_DEFAULT) - == LPTE_M) - continue; - - PMAP_LOCK(kernel_pmap); - pvo = moea64_pvo_find_va(kernel_pmap, - translations[i].om_va + off); - PMAP_UNLOCK(kernel_pmap); - if (pvo != NULL) - continue; - - moea64_kenter(translations[i].om_va + off, - pa_base + off); - } - ENABLE_TRANS(msr); - } -} - -#ifdef __powerpc64__ -static void -moea64_probe_large_page(void) -{ - uint16_t pvr = mfpvr() >> 16; - - switch (pvr) { - case IBM970: - case IBM970FX: - case IBM970MP: - powerpc_sync(); isync(); - mtspr(SPR_HID4, mfspr(SPR_HID4) & ~HID4_970_DISABLE_LG_PG); - powerpc_sync(); isync(); - - /* FALLTHROUGH */ - default: - if (moea64_large_page_size == 0) { - moea64_large_page_size = 0x1000000; /* 16 MB */ - moea64_large_page_shift = 24; - } - } - - moea64_large_page_mask = moea64_large_page_size - 1; -} - -static void -moea64_bootstrap_slb_prefault(vm_offset_t va, int large) -{ - struct slb *cache; - struct slb entry; - uint64_t esid, slbe; - uint64_t i; - - cache = PCPU_GET(aim.slb); - esid = va >> ADDR_SR_SHFT; - slbe = (esid << SLBE_ESID_SHIFT) | SLBE_VALID; - - for (i = 0; i < 64; i++) { - if (cache[i].slbe == (slbe | i)) - return; - } - - entry.slbe = slbe; - entry.slbv = KERNEL_VSID(esid) << SLBV_VSID_SHIFT; - if (large) - entry.slbv |= SLBV_L; - - slb_insert_kernel(entry.slbe, entry.slbv); -} -#endif - -static int -moea64_kenter_large(vm_offset_t va, vm_paddr_t pa, uint64_t attr, int bootstrap) -{ - struct pvo_entry *pvo; - uint64_t pte_lo; - int error; - - pte_lo = LPTE_M; - pte_lo |= attr; - - pvo = alloc_pvo_entry(bootstrap); - pvo->pvo_vaddr |= PVO_WIRED | PVO_LARGE; - init_pvo_entry(pvo, kernel_pmap, va); - - pvo->pvo_pte.prot = VM_PROT_READ | VM_PROT_WRITE | - VM_PROT_EXECUTE; - pvo->pvo_pte.pa = pa | pte_lo; - error = moea64_pvo_enter(pvo, NULL, NULL); - if (error != 0) - panic("Error %d inserting large page\n", error); - return (0); -} - -static void -moea64_setup_direct_map(vm_offset_t kernelstart, - vm_offset_t kernelend) -{ - register_t msr; - vm_paddr_t pa, pkernelstart, pkernelend; - vm_offset_t size, off; - uint64_t pte_lo; - int i; - - if (moea64_large_page_size == 0) - hw_direct_map = 0; - - DISABLE_TRANS(msr); - if (hw_direct_map) { - PMAP_LOCK(kernel_pmap); - for (i = 0; i < pregions_sz; i++) { - for (pa = pregions[i].mr_start; pa < pregions[i].mr_start + - pregions[i].mr_size; pa += moea64_large_page_size) { - pte_lo = LPTE_M; - if (pa & moea64_large_page_mask) { - pa &= moea64_large_page_mask; - pte_lo |= LPTE_G; - } - if (pa + moea64_large_page_size > - pregions[i].mr_start + pregions[i].mr_size) - pte_lo |= LPTE_G; - - moea64_kenter_large(PHYS_TO_DMAP(pa), pa, pte_lo, 1); - } - } - PMAP_UNLOCK(kernel_pmap); - } - - /* - * Make sure the kernel and BPVO pool stay mapped on systems either - * without a direct map or on which the kernel is not already executing - * out of the direct-mapped region. - */ - if (kernelstart < DMAP_BASE_ADDRESS) { - /* - * For pre-dmap execution, we need to use identity mapping - * because we will be operating with the mmu on but in the - * wrong address configuration until we __restartkernel(). - */ - for (pa = kernelstart & ~PAGE_MASK; pa < kernelend; - pa += PAGE_SIZE) - moea64_kenter(pa, pa); - } else if (!hw_direct_map) { - pkernelstart = kernelstart & ~DMAP_BASE_ADDRESS; - pkernelend = kernelend & ~DMAP_BASE_ADDRESS; - for (pa = pkernelstart & ~PAGE_MASK; pa < pkernelend; - pa += PAGE_SIZE) - moea64_kenter(pa | DMAP_BASE_ADDRESS, pa); - } - - if (!hw_direct_map) { - size = moea64_bpvo_pool_size*sizeof(struct pvo_entry); - off = (vm_offset_t)(moea64_bpvo_pool); - for (pa = off; pa < off + size; pa += PAGE_SIZE) - moea64_kenter(pa, pa); - - /* Map exception vectors */ - for (pa = EXC_RSVD; pa < EXC_LAST; pa += PAGE_SIZE) - moea64_kenter(pa | DMAP_BASE_ADDRESS, pa); - } - ENABLE_TRANS(msr); - - /* - * Allow user to override unmapped_buf_allowed for testing. - * XXXKIB Only direct map implementation was tested. - */ - if (!TUNABLE_INT_FETCH("vfs.unmapped_buf_allowed", - &unmapped_buf_allowed)) - unmapped_buf_allowed = hw_direct_map; -} - -/* Quick sort callout for comparing physical addresses. */ -static int -pa_cmp(const void *a, const void *b) -{ - const vm_paddr_t *pa = a, *pb = b; - - if (*pa < *pb) - return (-1); - else if (*pa > *pb) - return (1); - else - return (0); -} - -void -moea64_early_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) -{ - int i, j; - vm_size_t physsz, hwphyssz; - vm_paddr_t kernelphysstart, kernelphysend; - int rm_pavail; - - /* Level 0 reservations consist of 4096 pages (16MB superpage). */ - vm_level_0_order = 12; - -#ifndef __powerpc64__ - /* We don't have a direct map since there is no BAT */ - hw_direct_map = 0; - - /* Make sure battable is zero, since we have no BAT */ - for (i = 0; i < 16; i++) { - battable[i].batu = 0; - battable[i].batl = 0; - } -#else - moea64_probe_large_page(); - - /* Use a direct map if we have large page support */ - if (moea64_large_page_size > 0) - hw_direct_map = 1; - else - hw_direct_map = 0; - - /* Install trap handlers for SLBs */ - bcopy(&slbtrap, (void *)EXC_DSE,(size_t)&slbtrapend - (size_t)&slbtrap); - bcopy(&slbtrap, (void *)EXC_ISE,(size_t)&slbtrapend - (size_t)&slbtrap); - __syncicache((void *)EXC_DSE, 0x80); - __syncicache((void *)EXC_ISE, 0x80); -#endif - - kernelphysstart = kernelstart & ~DMAP_BASE_ADDRESS; - kernelphysend = kernelend & ~DMAP_BASE_ADDRESS; - - /* Get physical memory regions from firmware */ - mem_regions(&pregions, &pregions_sz, ®ions, ®ions_sz); - CTR0(KTR_PMAP, "moea64_bootstrap: physical memory"); - - if (PHYS_AVAIL_ENTRIES < regions_sz) - panic("moea64_bootstrap: phys_avail too small"); - - phys_avail_count = 0; - physsz = 0; - hwphyssz = 0; - TUNABLE_ULONG_FETCH("hw.physmem", (u_long *) &hwphyssz); - for (i = 0, j = 0; i < regions_sz; i++, j += 2) { - CTR3(KTR_PMAP, "region: %#zx - %#zx (%#zx)", - regions[i].mr_start, regions[i].mr_start + - regions[i].mr_size, regions[i].mr_size); - if (hwphyssz != 0 && - (physsz + regions[i].mr_size) >= hwphyssz) { - if (physsz < hwphyssz) { - phys_avail[j] = regions[i].mr_start; - phys_avail[j + 1] = regions[i].mr_start + - hwphyssz - physsz; - physsz = hwphyssz; - phys_avail_count++; - dump_avail[j] = phys_avail[j]; - dump_avail[j + 1] = phys_avail[j + 1]; - } - break; - } - phys_avail[j] = regions[i].mr_start; - phys_avail[j + 1] = regions[i].mr_start + regions[i].mr_size; - phys_avail_count++; - physsz += regions[i].mr_size; - dump_avail[j] = phys_avail[j]; - dump_avail[j + 1] = phys_avail[j + 1]; - } - - /* Check for overlap with the kernel and exception vectors */ - rm_pavail = 0; - for (j = 0; j < 2*phys_avail_count; j+=2) { - if (phys_avail[j] < EXC_LAST) - phys_avail[j] += EXC_LAST; - - if (phys_avail[j] >= kernelphysstart && - phys_avail[j+1] <= kernelphysend) { - phys_avail[j] = phys_avail[j+1] = ~0; - rm_pavail++; - continue; - } - - if (kernelphysstart >= phys_avail[j] && - kernelphysstart < phys_avail[j+1]) { - if (kernelphysend < phys_avail[j+1]) { - phys_avail[2*phys_avail_count] = - (kernelphysend & ~PAGE_MASK) + PAGE_SIZE; - phys_avail[2*phys_avail_count + 1] = - phys_avail[j+1]; - phys_avail_count++; - } - - phys_avail[j+1] = kernelphysstart & ~PAGE_MASK; - } - - if (kernelphysend >= phys_avail[j] && - kernelphysend < phys_avail[j+1]) { - if (kernelphysstart > phys_avail[j]) { - phys_avail[2*phys_avail_count] = phys_avail[j]; - phys_avail[2*phys_avail_count + 1] = - kernelphysstart & ~PAGE_MASK; - phys_avail_count++; - } - - phys_avail[j] = (kernelphysend & ~PAGE_MASK) + - PAGE_SIZE; - } - } - - /* Remove physical available regions marked for removal (~0) */ - if (rm_pavail) { - qsort(phys_avail, 2*phys_avail_count, sizeof(phys_avail[0]), - pa_cmp); - phys_avail_count -= rm_pavail; - for (i = 2*phys_avail_count; - i < 2*(phys_avail_count + rm_pavail); i+=2) - phys_avail[i] = phys_avail[i+1] = 0; - } - - physmem = btoc(physsz); - -#ifdef PTEGCOUNT - moea64_pteg_count = PTEGCOUNT; -#else - moea64_pteg_count = 0x1000; - - while (moea64_pteg_count < physmem) - moea64_pteg_count <<= 1; - - moea64_pteg_count >>= 1; -#endif /* PTEGCOUNT */ -} - -void -moea64_mid_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) -{ - int i; - - /* - * Set PTEG mask - */ - moea64_pteg_mask = moea64_pteg_count - 1; - - /* - * Initialize SLB table lock and page locks - */ - mtx_init(&moea64_slb_mutex, "SLB table", NULL, MTX_DEF); - for (i = 0; i < PV_LOCK_COUNT; i++) - mtx_init(&pv_lock[i], "page pv", NULL, MTX_DEF); - - /* - * Initialise the bootstrap pvo pool. - */ - TUNABLE_INT_FETCH("machdep.moea64_bpvo_pool_size", &moea64_bpvo_pool_size); - if (moea64_bpvo_pool_size == 0) { - if (!hw_direct_map) - moea64_bpvo_pool_size = ((ptoa((uintmax_t)physmem) * sizeof(struct vm_page)) / - (PAGE_SIZE * PAGE_SIZE)) * BPVO_POOL_EXPANSION_FACTOR; - else - moea64_bpvo_pool_size = BPVO_POOL_SIZE; - } - - if (boothowto & RB_VERBOSE) { - printf("mmu_oea64: bpvo pool entries = %d, bpvo pool size = %zu MB\n", - moea64_bpvo_pool_size, - moea64_bpvo_pool_size*sizeof(struct pvo_entry) / 1048576); - } - - moea64_bpvo_pool = (struct pvo_entry *)moea64_bootstrap_alloc( - moea64_bpvo_pool_size*sizeof(struct pvo_entry), PAGE_SIZE); - moea64_bpvo_pool_index = 0; - - /* Place at address usable through the direct map */ - if (hw_direct_map) - moea64_bpvo_pool = (struct pvo_entry *) - PHYS_TO_DMAP((uintptr_t)moea64_bpvo_pool); - - /* - * Make sure kernel vsid is allocated as well as VSID 0. - */ - #ifndef __powerpc64__ - moea64_vsid_bitmap[(KERNEL_VSIDBITS & (NVSIDS - 1)) / VSID_NBPW] - |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); - moea64_vsid_bitmap[0] |= 1; - #endif - - /* - * Initialize the kernel pmap (which is statically allocated). - */ - #ifdef __powerpc64__ - for (i = 0; i < 64; i++) { - pcpup->pc_aim.slb[i].slbv = 0; - pcpup->pc_aim.slb[i].slbe = 0; - } - #else - for (i = 0; i < 16; i++) - kernel_pmap->pm_sr[i] = EMPTY_SEGMENT + i; - #endif - - kernel_pmap->pmap_phys = kernel_pmap; - CPU_FILL(&kernel_pmap->pm_active); - RB_INIT(&kernel_pmap->pmap_pvo); - - PMAP_LOCK_INIT(kernel_pmap); - - /* - * Now map in all the other buffers we allocated earlier - */ - - moea64_setup_direct_map(kernelstart, kernelend); -} - -void -moea64_late_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) -{ - ihandle_t mmui; - phandle_t chosen; - phandle_t mmu; - ssize_t sz; - int i; - vm_offset_t pa, va; - void *dpcpu; - - /* - * Set up the Open Firmware pmap and add its mappings if not in real - * mode. - */ - - chosen = OF_finddevice("/chosen"); - if (chosen != -1 && OF_getencprop(chosen, "mmu", &mmui, 4) != -1) { - mmu = OF_instance_to_package(mmui); - if (mmu == -1 || - (sz = OF_getproplen(mmu, "translations")) == -1) - sz = 0; - if (sz > 6144 /* tmpstksz - 2 KB headroom */) - panic("moea64_bootstrap: too many ofw translations"); - - if (sz > 0) - moea64_add_ofw_mappings(mmu, sz); - } - - /* - * Calculate the last available physical address. - */ - Maxmem = 0; - for (i = 0; phys_avail[i + 1] != 0; i += 2) - Maxmem = MAX(Maxmem, powerpc_btop(phys_avail[i + 1])); - - /* - * Initialize MMU. - */ - pmap_cpu_bootstrap(0); - mtmsr(mfmsr() | PSL_DR | PSL_IR); - pmap_bootstrapped++; - - /* - * Set the start and end of kva. - */ - virtual_avail = VM_MIN_KERNEL_ADDRESS; - virtual_end = VM_MAX_SAFE_KERNEL_ADDRESS; - - /* - * Map the entire KVA range into the SLB. We must not fault there. - */ - #ifdef __powerpc64__ - for (va = virtual_avail; va < virtual_end; va += SEGMENT_LENGTH) - moea64_bootstrap_slb_prefault(va, 0); - #endif - - /* - * Remap any early IO mappings (console framebuffer, etc.) - */ - bs_remap_earlyboot(); - - /* - * Figure out how far we can extend virtual_end into segment 16 - * without running into existing mappings. Segment 16 is guaranteed - * to contain neither RAM nor devices (at least on Apple hardware), - * but will generally contain some OFW mappings we should not - * step on. - */ - - #ifndef __powerpc64__ /* KVA is in high memory on PPC64 */ - PMAP_LOCK(kernel_pmap); - while (virtual_end < VM_MAX_KERNEL_ADDRESS && - moea64_pvo_find_va(kernel_pmap, virtual_end+1) == NULL) - virtual_end += PAGE_SIZE; - PMAP_UNLOCK(kernel_pmap); - #endif - - /* - * Allocate a kernel stack with a guard page for thread0 and map it - * into the kernel page map. - */ - pa = moea64_bootstrap_alloc(kstack_pages * PAGE_SIZE, PAGE_SIZE); - va = virtual_avail + KSTACK_GUARD_PAGES * PAGE_SIZE; - virtual_avail = va + kstack_pages * PAGE_SIZE; - CTR2(KTR_PMAP, "moea64_bootstrap: kstack0 at %#x (%#x)", pa, va); - thread0.td_kstack = va; - thread0.td_kstack_pages = kstack_pages; - for (i = 0; i < kstack_pages; i++) { - moea64_kenter(va, pa); - pa += PAGE_SIZE; - va += PAGE_SIZE; - } - - /* - * Allocate virtual address space for the message buffer. - */ - pa = msgbuf_phys = moea64_bootstrap_alloc(msgbufsize, PAGE_SIZE); - msgbufp = (struct msgbuf *)virtual_avail; - va = virtual_avail; - virtual_avail += round_page(msgbufsize); - while (va < virtual_avail) { - moea64_kenter(va, pa); - pa += PAGE_SIZE; - va += PAGE_SIZE; - } - - /* - * Allocate virtual address space for the dynamic percpu area. - */ - pa = moea64_bootstrap_alloc(DPCPU_SIZE, PAGE_SIZE); - dpcpu = (void *)virtual_avail; - va = virtual_avail; - virtual_avail += DPCPU_SIZE; - while (va < virtual_avail) { - moea64_kenter(va, pa); - pa += PAGE_SIZE; - va += PAGE_SIZE; - } - dpcpu_init(dpcpu, curcpu); - - crashdumpmap = (caddr_t)virtual_avail; - virtual_avail += MAXDUMPPGS * PAGE_SIZE; - - /* - * Allocate some things for page zeroing. We put this directly - * in the page table and use MOEA64_PTE_REPLACE to avoid any - * of the PVO book-keeping or other parts of the VM system - * from even knowing that this hack exists. - */ - - if (!hw_direct_map) { - mtx_init(&moea64_scratchpage_mtx, "pvo zero page", NULL, - MTX_DEF); - for (i = 0; i < 2; i++) { - moea64_scratchpage_va[i] = (virtual_end+1) - PAGE_SIZE; - virtual_end -= PAGE_SIZE; - - moea64_kenter(moea64_scratchpage_va[i], 0); - - PMAP_LOCK(kernel_pmap); - moea64_scratchpage_pvo[i] = moea64_pvo_find_va( - kernel_pmap, (vm_offset_t)moea64_scratchpage_va[i]); - PMAP_UNLOCK(kernel_pmap); - } - } - - numa_mem_regions(&numa_pregions, &numapregions_sz); -} - -static void -moea64_pmap_init_qpages(void) -{ - struct pcpu *pc; - int i; - - if (hw_direct_map) - return; - - CPU_FOREACH(i) { - pc = pcpu_find(i); - pc->pc_qmap_addr = kva_alloc(PAGE_SIZE); - if (pc->pc_qmap_addr == 0) - panic("pmap_init_qpages: unable to allocate KVA"); - PMAP_LOCK(kernel_pmap); - pc->pc_aim.qmap_pvo = - moea64_pvo_find_va(kernel_pmap, pc->pc_qmap_addr); - PMAP_UNLOCK(kernel_pmap); - mtx_init(&pc->pc_aim.qmap_lock, "qmap lock", NULL, MTX_DEF); - } -} - -SYSINIT(qpages_init, SI_SUB_CPU, SI_ORDER_ANY, moea64_pmap_init_qpages, NULL); - -/* - * Activate a user pmap. This mostly involves setting some non-CPU - * state. - */ -void -moea64_activate(struct thread *td) -{ - pmap_t pm; - - pm = &td->td_proc->p_vmspace->vm_pmap; - CPU_SET(PCPU_GET(cpuid), &pm->pm_active); - - #ifdef __powerpc64__ - PCPU_SET(aim.userslb, pm->pm_slb); - __asm __volatile("slbmte %0, %1; isync" :: - "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE)); - #else - PCPU_SET(curpmap, pm->pmap_phys); - mtsrin(USER_SR << ADDR_SR_SHFT, td->td_pcb->pcb_cpu.aim.usr_vsid); - #endif -} - -void -moea64_deactivate(struct thread *td) -{ - pmap_t pm; - - __asm __volatile("isync; slbie %0" :: "r"(USER_ADDR)); - - pm = &td->td_proc->p_vmspace->vm_pmap; - CPU_CLR(PCPU_GET(cpuid), &pm->pm_active); - #ifdef __powerpc64__ - PCPU_SET(aim.userslb, NULL); - #else - PCPU_SET(curpmap, NULL); - #endif -} - -void -moea64_unwire(pmap_t pm, vm_offset_t sva, vm_offset_t eva) -{ - struct pvo_entry key, *pvo; - vm_page_t m; - int64_t refchg; - - key.pvo_vaddr = sva; - PMAP_LOCK(pm); - for (pvo = RB_NFIND(pvo_tree, &pm->pmap_pvo, &key); - pvo != NULL && PVO_VADDR(pvo) < eva; - pvo = RB_NEXT(pvo_tree, &pm->pmap_pvo, pvo)) { - if (PVO_IS_SP(pvo)) { - if (moea64_sp_pvo_in_range(pvo, sva, eva)) { - pvo = moea64_sp_unwire(pvo); - continue; - } else { - CTR1(KTR_PMAP, "%s: demote before unwire", - __func__); - moea64_sp_demote(pvo); - } - } - - if ((pvo->pvo_vaddr & PVO_WIRED) == 0) - panic("moea64_unwire: pvo %p is missing PVO_WIRED", - pvo); - pvo->pvo_vaddr &= ~PVO_WIRED; - refchg = moea64_pte_replace(pvo, 0 /* No invalidation */); - if ((pvo->pvo_vaddr & PVO_MANAGED) && - (pvo->pvo_pte.prot & VM_PROT_WRITE)) { - if (refchg < 0) - refchg = LPTE_CHG; - m = PHYS_TO_VM_PAGE(PVO_PADDR(pvo)); - - refchg |= atomic_readandclear_32(&m->md.mdpg_attrs); - if (refchg & LPTE_CHG) - vm_page_dirty(m); - if (refchg & LPTE_REF) - vm_page_aflag_set(m, PGA_REFERENCED); - } - pm->pm_stats.wired_count--; - } - PMAP_UNLOCK(pm); -} - -static int -moea64_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *pap) -{ - struct pvo_entry *pvo; - vm_paddr_t pa; - vm_page_t m; - int val; - bool managed; - - PMAP_LOCK(pmap); - - pvo = moea64_pvo_find_va(pmap, addr); - if (pvo != NULL) { - pa = PVO_PADDR(pvo); - m = PHYS_TO_VM_PAGE(pa); - managed = (pvo->pvo_vaddr & PVO_MANAGED) == PVO_MANAGED; - if (PVO_IS_SP(pvo)) - val = MINCORE_INCORE | MINCORE_PSIND(1); - else - val = MINCORE_INCORE; - } else { - PMAP_UNLOCK(pmap); - return (0); - } - - PMAP_UNLOCK(pmap); - - if (m == NULL) - return (0); - - if (managed) { - if (moea64_is_modified(m)) - val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER; - - if (moea64_is_referenced(m)) - val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER; - } - - if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) != - (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && - managed) { - *pap = pa; - } - - return (val); -} - -/* - * This goes through and sets the physical address of our - * special scratch PTE to the PA we want to zero or copy. Because - * of locking issues (this can get called in pvo_enter() by - * the UMA allocator), we can't use most other utility functions here - */ - -static __inline -void moea64_set_scratchpage_pa(int which, vm_paddr_t pa) -{ - struct pvo_entry *pvo; - - KASSERT(!hw_direct_map, ("Using OEA64 scratchpage with a direct map!")); - mtx_assert(&moea64_scratchpage_mtx, MA_OWNED); - - pvo = moea64_scratchpage_pvo[which]; - PMAP_LOCK(pvo->pvo_pmap); - pvo->pvo_pte.pa = - moea64_calc_wimg(pa, VM_MEMATTR_DEFAULT) | (uint64_t)pa; - moea64_pte_replace(pvo, MOEA64_PTE_INVALIDATE); - PMAP_UNLOCK(pvo->pvo_pmap); - isync(); -} - -void -moea64_copy_page(vm_page_t msrc, vm_page_t mdst) -{ - vm_offset_t dst; - vm_offset_t src; - - dst = VM_PAGE_TO_PHYS(mdst); - src = VM_PAGE_TO_PHYS(msrc); - - if (hw_direct_map) { - bcopy((void *)PHYS_TO_DMAP(src), (void *)PHYS_TO_DMAP(dst), - PAGE_SIZE); - } else { - mtx_lock(&moea64_scratchpage_mtx); - - moea64_set_scratchpage_pa(0, src); - moea64_set_scratchpage_pa(1, dst); - - bcopy((void *)moea64_scratchpage_va[0], - (void *)moea64_scratchpage_va[1], PAGE_SIZE); - - mtx_unlock(&moea64_scratchpage_mtx); - } -} - -static inline void -moea64_copy_pages_dmap(vm_page_t *ma, vm_offset_t a_offset, - vm_page_t *mb, vm_offset_t b_offset, int xfersize) -{ - void *a_cp, *b_cp; - vm_offset_t a_pg_offset, b_pg_offset; - int cnt; - - while (xfersize > 0) { - a_pg_offset = a_offset & PAGE_MASK; - cnt = min(xfersize, PAGE_SIZE - a_pg_offset); - a_cp = (char *)(uintptr_t)PHYS_TO_DMAP( - VM_PAGE_TO_PHYS(ma[a_offset >> PAGE_SHIFT])) + - a_pg_offset; - b_pg_offset = b_offset & PAGE_MASK; - cnt = min(cnt, PAGE_SIZE - b_pg_offset); - b_cp = (char *)(uintptr_t)PHYS_TO_DMAP( - VM_PAGE_TO_PHYS(mb[b_offset >> PAGE_SHIFT])) + - b_pg_offset; - bcopy(a_cp, b_cp, cnt); - a_offset += cnt; - b_offset += cnt; - xfersize -= cnt; - } -} - -static inline void -moea64_copy_pages_nodmap(vm_page_t *ma, vm_offset_t a_offset, - vm_page_t *mb, vm_offset_t b_offset, int xfersize) -{ - void *a_cp, *b_cp; - vm_offset_t a_pg_offset, b_pg_offset; - int cnt; - - mtx_lock(&moea64_scratchpage_mtx); - while (xfersize > 0) { - a_pg_offset = a_offset & PAGE_MASK; - cnt = min(xfersize, PAGE_SIZE - a_pg_offset); - moea64_set_scratchpage_pa(0, - VM_PAGE_TO_PHYS(ma[a_offset >> PAGE_SHIFT])); - a_cp = (char *)moea64_scratchpage_va[0] + a_pg_offset; - b_pg_offset = b_offset & PAGE_MASK; - cnt = min(cnt, PAGE_SIZE - b_pg_offset); - moea64_set_scratchpage_pa(1, - VM_PAGE_TO_PHYS(mb[b_offset >> PAGE_SHIFT])); - b_cp = (char *)moea64_scratchpage_va[1] + b_pg_offset; - bcopy(a_cp, b_cp, cnt); - a_offset += cnt; - b_offset += cnt; - xfersize -= cnt; - } - mtx_unlock(&moea64_scratchpage_mtx); -} - -void -moea64_copy_pages(vm_page_t *ma, vm_offset_t a_offset, - vm_page_t *mb, vm_offset_t b_offset, int xfersize) -{ - - if (hw_direct_map) { - moea64_copy_pages_dmap(ma, a_offset, mb, b_offset, - xfersize); - } else { - moea64_copy_pages_nodmap(ma, a_offset, mb, b_offset, - xfersize); - } -} - -void -moea64_zero_page_area(vm_page_t m, int off, int size) -{ - vm_paddr_t pa = VM_PAGE_TO_PHYS(m); - - if (size + off > PAGE_SIZE) - panic("moea64_zero_page: size + off > PAGE_SIZE"); - - if (hw_direct_map) { - bzero((caddr_t)(uintptr_t)PHYS_TO_DMAP(pa) + off, size); - } else { - mtx_lock(&moea64_scratchpage_mtx); - moea64_set_scratchpage_pa(0, pa); - bzero((caddr_t)moea64_scratchpage_va[0] + off, size); - mtx_unlock(&moea64_scratchpage_mtx); - } -} - -/* - * Zero a page of physical memory by temporarily mapping it - */ -void -moea64_zero_page(vm_page_t m) -{ - vm_paddr_t pa = VM_PAGE_TO_PHYS(m); - vm_offset_t va, off; - - if (!hw_direct_map) { - mtx_lock(&moea64_scratchpage_mtx); - - moea64_set_scratchpage_pa(0, pa); - va = moea64_scratchpage_va[0]; - } else { - va = PHYS_TO_DMAP(pa); - } - - for (off = 0; off < PAGE_SIZE; off += cacheline_size) - __asm __volatile("dcbz 0,%0" :: "r"(va + off)); - - if (!hw_direct_map) - mtx_unlock(&moea64_scratchpage_mtx); -} - -vm_offset_t -moea64_quick_enter_page(vm_page_t m) -{ - struct pvo_entry *pvo; - vm_paddr_t pa = VM_PAGE_TO_PHYS(m); - - if (hw_direct_map) - return (PHYS_TO_DMAP(pa)); - - /* - * MOEA64_PTE_REPLACE does some locking, so we can't just grab - * a critical section and access the PCPU data like on i386. - * Instead, pin the thread and grab the PCPU lock to prevent - * a preempting thread from using the same PCPU data. - */ - sched_pin(); - - mtx_assert(PCPU_PTR(aim.qmap_lock), MA_NOTOWNED); - pvo = PCPU_GET(aim.qmap_pvo); - - mtx_lock(PCPU_PTR(aim.qmap_lock)); - pvo->pvo_pte.pa = moea64_calc_wimg(pa, pmap_page_get_memattr(m)) | - (uint64_t)pa; - moea64_pte_replace(pvo, MOEA64_PTE_INVALIDATE); - isync(); - - return (PCPU_GET(qmap_addr)); -} - -void -moea64_quick_remove_page(vm_offset_t addr) -{ - if (hw_direct_map) - return; - - mtx_assert(PCPU_PTR(aim.qmap_lock), MA_OWNED); - KASSERT(PCPU_GET(qmap_addr) == addr, - ("moea64_quick_remove_page: invalid address")); - mtx_unlock(PCPU_PTR(aim.qmap_lock)); - sched_unpin(); -} - -boolean_t -moea64_page_is_mapped(vm_page_t m) -{ - return (!LIST_EMPTY(&(m)->md.mdpg_pvoh)); -} - -/* - * Map the given physical page at the specified virtual address in the - * target pmap with the protection requested. If specified the page - * will be wired down. - */ - -int -moea64_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, - vm_prot_t prot, u_int flags, int8_t psind) -{ - struct pvo_entry *pvo, *oldpvo, *tpvo; - struct pvo_head *pvo_head; - uint64_t pte_lo; - int error; - vm_paddr_t pa; - - if ((m->oflags & VPO_UNMANAGED) == 0) { - if ((flags & PMAP_ENTER_QUICK_LOCKED) == 0) - VM_PAGE_OBJECT_BUSY_ASSERT(m); - else - VM_OBJECT_ASSERT_LOCKED(m->object); - } - - if (psind > 0) - return (moea64_sp_enter(pmap, va, m, prot, flags, psind)); - - pvo = alloc_pvo_entry(0); - if (pvo == NULL) - return (KERN_RESOURCE_SHORTAGE); - pvo->pvo_pmap = NULL; /* to be filled in later */ - pvo->pvo_pte.prot = prot; - - pa = VM_PAGE_TO_PHYS(m); - pte_lo = moea64_calc_wimg(pa, pmap_page_get_memattr(m)); - pvo->pvo_pte.pa = pa | pte_lo; - - if ((flags & PMAP_ENTER_WIRED) != 0) - pvo->pvo_vaddr |= PVO_WIRED; - - if ((m->oflags & VPO_UNMANAGED) != 0 || !moea64_initialized) { - pvo_head = NULL; - } else { - pvo_head = &m->md.mdpg_pvoh; - pvo->pvo_vaddr |= PVO_MANAGED; - } - - PV_LOCK(pa); - PMAP_LOCK(pmap); - if (pvo->pvo_pmap == NULL) - init_pvo_entry(pvo, pmap, va); - - if (moea64_ps_enabled(pmap) && - (tpvo = moea64_pvo_find_va(pmap, va & ~HPT_SP_MASK)) != NULL && - PVO_IS_SP(tpvo)) { - /* Demote SP before entering a regular page */ - CTR2(KTR_PMAP, "%s: demote before enter: va=%#jx", - __func__, (uintmax_t)va); - moea64_sp_demote_aligned(tpvo); - } - - if (prot & VM_PROT_WRITE) - if (pmap_bootstrapped && - (m->oflags & VPO_UNMANAGED) == 0) - vm_page_aflag_set(m, PGA_WRITEABLE); - - error = moea64_pvo_enter(pvo, pvo_head, &oldpvo); - if (error == EEXIST) { - if (oldpvo->pvo_vaddr == pvo->pvo_vaddr && - oldpvo->pvo_pte.pa == pvo->pvo_pte.pa && - oldpvo->pvo_pte.prot == prot) { - /* Identical mapping already exists */ - error = 0; - - /* If not in page table, reinsert it */ - if (moea64_pte_synch(oldpvo) < 0) { - STAT_MOEA64(moea64_pte_overflow--); - moea64_pte_insert(oldpvo); - } - - /* Then just clean up and go home */ - PMAP_UNLOCK(pmap); - PV_UNLOCK(pa); - free_pvo_entry(pvo); - pvo = NULL; - goto out; - } else { - /* Otherwise, need to kill it first */ - KASSERT(oldpvo->pvo_pmap == pmap, ("pmap of old " - "mapping does not match new mapping")); - moea64_pvo_remove_from_pmap(oldpvo); - moea64_pvo_enter(pvo, pvo_head, NULL); - } - } - PMAP_UNLOCK(pmap); - PV_UNLOCK(pa); - - /* Free any dead pages */ - if (error == EEXIST) { - moea64_pvo_remove_from_page(oldpvo); - free_pvo_entry(oldpvo); - } - -out: - /* - * Flush the page from the instruction cache if this page is - * mapped executable and cacheable. - */ - if (pmap != kernel_pmap && (m->a.flags & PGA_EXECUTABLE) == 0 && - (pte_lo & (LPTE_I | LPTE_G | LPTE_NOEXEC)) == 0) { - vm_page_aflag_set(m, PGA_EXECUTABLE); - moea64_syncicache(pmap, va, pa, PAGE_SIZE); - } - -#if VM_NRESERVLEVEL > 0 - /* - * Try to promote pages. - * - * If the VA of the entered page is not aligned with its PA, - * don't try page promotion as it is not possible. - * This reduces the number of promotion failures dramatically. - */ - if (moea64_ps_enabled(pmap) && pmap != kernel_pmap && pvo != NULL && - (pvo->pvo_vaddr & PVO_MANAGED) != 0 && - (va & HPT_SP_MASK) == (pa & HPT_SP_MASK) && - (m->flags & PG_FICTITIOUS) == 0 && - vm_reserv_level_iffullpop(m) == 0) - moea64_sp_promote(pmap, va, m); -#endif - - return (KERN_SUCCESS); -} - -static void -moea64_syncicache(pmap_t pmap, vm_offset_t va, vm_paddr_t pa, - vm_size_t sz) -{ - - /* - * This is much trickier than on older systems because - * we can't sync the icache on physical addresses directly - * without a direct map. Instead we check a couple of cases - * where the memory is already mapped in and, failing that, - * use the same trick we use for page zeroing to create - * a temporary mapping for this physical address. - */ - - if (!pmap_bootstrapped) { - /* - * If PMAP is not bootstrapped, we are likely to be - * in real mode. - */ - __syncicache((void *)(uintptr_t)pa, sz); - } else if (pmap == kernel_pmap) { - __syncicache((void *)va, sz); - } else if (hw_direct_map) { - __syncicache((void *)(uintptr_t)PHYS_TO_DMAP(pa), sz); - } else { - /* Use the scratch page to set up a temp mapping */ - - mtx_lock(&moea64_scratchpage_mtx); - - moea64_set_scratchpage_pa(1, pa & ~ADDR_POFF); - __syncicache((void *)(moea64_scratchpage_va[1] + - (va & ADDR_POFF)), sz); - - mtx_unlock(&moea64_scratchpage_mtx); - } -} - -/* - * Maps a sequence of resident pages belonging to the same object. - * The sequence begins with the given page m_start. This page is - * mapped at the given virtual address start. Each subsequent page is - * mapped at a virtual address that is offset from start by the same - * amount as the page is offset from m_start within the object. The - * last page in the sequence is the page with the largest offset from - * m_start that can be mapped at a virtual address less than the given - * virtual address end. Not every virtual page between start and end - * is mapped; only those for which a resident page exists with the - * corresponding offset from m_start are mapped. - */ -void -moea64_enter_object(pmap_t pm, vm_offset_t start, vm_offset_t end, - vm_page_t m_start, vm_prot_t prot) -{ - vm_page_t m; - vm_pindex_t diff, psize; - vm_offset_t va; - int8_t psind; - - VM_OBJECT_ASSERT_LOCKED(m_start->object); - - psize = atop(end - start); - m = m_start; - while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { - va = start + ptoa(diff); - if ((va & HPT_SP_MASK) == 0 && va + HPT_SP_SIZE <= end && - m->psind == 1 && moea64_ps_enabled(pm)) - psind = 1; - else - psind = 0; - moea64_enter(pm, va, m, prot & - (VM_PROT_READ | VM_PROT_EXECUTE), - PMAP_ENTER_NOSLEEP | PMAP_ENTER_QUICK_LOCKED, psind); - if (psind == 1) - m = &m[HPT_SP_SIZE / PAGE_SIZE - 1]; - m = TAILQ_NEXT(m, listq); - } -} - -void -moea64_enter_quick(pmap_t pm, vm_offset_t va, vm_page_t m, - vm_prot_t prot) -{ - - moea64_enter(pm, va, m, prot & (VM_PROT_READ | VM_PROT_EXECUTE), - PMAP_ENTER_NOSLEEP | PMAP_ENTER_QUICK_LOCKED, 0); -} - -vm_paddr_t -moea64_extract(pmap_t pm, vm_offset_t va) -{ - struct pvo_entry *pvo; - vm_paddr_t pa; - - PMAP_LOCK(pm); - pvo = moea64_pvo_find_va(pm, va); - if (pvo == NULL) - pa = 0; - else - pa = PVO_PADDR(pvo) | (va - PVO_VADDR(pvo)); - PMAP_UNLOCK(pm); - - return (pa); -} - -/* - * Atomically extract and hold the physical page with the given - * pmap and virtual address pair if that mapping permits the given - * protection. - */ -vm_page_t -moea64_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) -{ - struct pvo_entry *pvo; - vm_page_t m; - - m = NULL; - PMAP_LOCK(pmap); - pvo = moea64_pvo_find_va(pmap, va & ~ADDR_POFF); - if (pvo != NULL && (pvo->pvo_pte.prot & prot) == prot) { - m = PHYS_TO_VM_PAGE(PVO_PADDR(pvo)); - if (!vm_page_wire_mapped(m)) - m = NULL; - } - PMAP_UNLOCK(pmap); - return (m); -} - -static void * -moea64_uma_page_alloc(uma_zone_t zone, vm_size_t bytes, int domain, - uint8_t *flags, int wait) -{ - struct pvo_entry *pvo; - vm_offset_t va; - vm_page_t m; - int needed_lock; - - /* - * This entire routine is a horrible hack to avoid bothering kmem - * for new KVA addresses. Because this can get called from inside - * kmem allocation routines, calling kmem for a new address here - * can lead to multiply locking non-recursive mutexes. - */ - - *flags = UMA_SLAB_PRIV; - needed_lock = !PMAP_LOCKED(kernel_pmap); - - m = vm_page_alloc_noobj_domain(domain, malloc2vm_flags(wait) | - VM_ALLOC_WIRED); - if (m == NULL) - return (NULL); - - va = VM_PAGE_TO_PHYS(m); - - pvo = alloc_pvo_entry(1 /* bootstrap */); - - pvo->pvo_pte.prot = VM_PROT_READ | VM_PROT_WRITE; - pvo->pvo_pte.pa = VM_PAGE_TO_PHYS(m) | LPTE_M; - - if (needed_lock) - PMAP_LOCK(kernel_pmap); - - init_pvo_entry(pvo, kernel_pmap, va); - pvo->pvo_vaddr |= PVO_WIRED; - - moea64_pvo_enter(pvo, NULL, NULL); - - if (needed_lock) - PMAP_UNLOCK(kernel_pmap); - - return (void *)va; -} - -extern int elf32_nxstack; - -void -moea64_init(void) -{ - - CTR0(KTR_PMAP, "moea64_init"); - - moea64_pvo_zone = uma_zcreate("UPVO entry", sizeof (struct pvo_entry), - NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, - UMA_ZONE_VM | UMA_ZONE_NOFREE); - - /* - * Are large page mappings enabled? - * - * While HPT superpages are not better tested, leave it disabled by - * default. - */ - superpages_enabled = 0; - TUNABLE_INT_FETCH("vm.pmap.superpages_enabled", &superpages_enabled); - if (superpages_enabled) { - KASSERT(MAXPAGESIZES > 1 && pagesizes[1] == 0, - ("moea64_init: can't assign to pagesizes[1]")); - - if (moea64_large_page_size == 0) { - printf("mmu_oea64: HW does not support large pages. " - "Disabling superpages...\n"); - superpages_enabled = 0; - } else if (!moea64_has_lp_4k_16m) { - printf("mmu_oea64: " - "HW does not support mixed 4KB/16MB page sizes. " - "Disabling superpages...\n"); - superpages_enabled = 0; - } else - pagesizes[1] = HPT_SP_SIZE; - } - - if (!hw_direct_map) { - uma_zone_set_allocf(moea64_pvo_zone, moea64_uma_page_alloc); - } - -#ifdef COMPAT_FREEBSD32 - elf32_nxstack = 1; -#endif - - moea64_initialized = TRUE; -} - -boolean_t -moea64_is_referenced(vm_page_t m) -{ - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("moea64_is_referenced: page %p is not managed", m)); - - return (moea64_query_bit(m, LPTE_REF)); -} - -boolean_t -moea64_is_modified(vm_page_t m) -{ - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("moea64_is_modified: page %p is not managed", m)); - - /* - * If the page is not busied then this check is racy. - */ - if (!pmap_page_is_write_mapped(m)) - return (FALSE); - - return (moea64_query_bit(m, LPTE_CHG)); -} - -boolean_t -moea64_is_prefaultable(pmap_t pmap, vm_offset_t va) -{ - struct pvo_entry *pvo; - boolean_t rv = TRUE; - - PMAP_LOCK(pmap); - pvo = moea64_pvo_find_va(pmap, va & ~ADDR_POFF); - if (pvo != NULL) - rv = FALSE; - PMAP_UNLOCK(pmap); - return (rv); -} - -void -moea64_clear_modify(vm_page_t m) -{ - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("moea64_clear_modify: page %p is not managed", m)); - vm_page_assert_busied(m); - - if (!pmap_page_is_write_mapped(m)) - return; - moea64_clear_bit(m, LPTE_CHG); -} - -/* - * Clear the write and modified bits in each of the given page's mappings. - */ -void -moea64_remove_write(vm_page_t m) -{ - struct pvo_entry *pvo; - int64_t refchg, ret; - pmap_t pmap; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("moea64_remove_write: page %p is not managed", m)); - vm_page_assert_busied(m); - - if (!pmap_page_is_write_mapped(m)) - return; - - powerpc_sync(); - PV_PAGE_LOCK(m); - refchg = 0; - LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { - pmap = pvo->pvo_pmap; - PMAP_LOCK(pmap); - if (!(pvo->pvo_vaddr & PVO_DEAD) && - (pvo->pvo_pte.prot & VM_PROT_WRITE)) { - if (PVO_IS_SP(pvo)) { - CTR1(KTR_PMAP, "%s: demote before remwr", - __func__); - moea64_sp_demote(pvo); - } - pvo->pvo_pte.prot &= ~VM_PROT_WRITE; - ret = moea64_pte_replace(pvo, MOEA64_PTE_PROT_UPDATE); - if (ret < 0) - ret = LPTE_CHG; - refchg |= ret; - if (pvo->pvo_pmap == kernel_pmap) - isync(); - } - PMAP_UNLOCK(pmap); - } - if ((refchg | atomic_readandclear_32(&m->md.mdpg_attrs)) & LPTE_CHG) - vm_page_dirty(m); - vm_page_aflag_clear(m, PGA_WRITEABLE); - PV_PAGE_UNLOCK(m); -} - -/* - * moea64_ts_referenced: - * - * Return a count of reference bits for a page, clearing those bits. - * It is not necessary for every reference bit to be cleared, but it - * is necessary that 0 only be returned when there are truly no - * reference bits set. - * - * XXX: The exact number of bits to check and clear is a matter that - * should be tested and standardized at some point in the future for - * optimal aging of shared pages. - */ -int -moea64_ts_referenced(vm_page_t m) -{ - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("moea64_ts_referenced: page %p is not managed", m)); - return (moea64_clear_bit(m, LPTE_REF)); -} - -/* - * Modify the WIMG settings of all mappings for a page. - */ -void -moea64_page_set_memattr(vm_page_t m, vm_memattr_t ma) -{ - struct pvo_entry *pvo; - int64_t refchg; - pmap_t pmap; - uint64_t lo; - - CTR3(KTR_PMAP, "%s: pa=%#jx, ma=%#x", - __func__, (uintmax_t)VM_PAGE_TO_PHYS(m), ma); - - if ((m->oflags & VPO_UNMANAGED) != 0) { - m->md.mdpg_cache_attrs = ma; - return; - } - - lo = moea64_calc_wimg(VM_PAGE_TO_PHYS(m), ma); - - PV_PAGE_LOCK(m); - LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { - pmap = pvo->pvo_pmap; - PMAP_LOCK(pmap); - if (!(pvo->pvo_vaddr & PVO_DEAD)) { - if (PVO_IS_SP(pvo)) { - CTR1(KTR_PMAP, - "%s: demote before set_memattr", __func__); - moea64_sp_demote(pvo); - } - pvo->pvo_pte.pa &= ~LPTE_WIMG; - pvo->pvo_pte.pa |= lo; - refchg = moea64_pte_replace(pvo, MOEA64_PTE_INVALIDATE); - if (refchg < 0) - refchg = (pvo->pvo_pte.prot & VM_PROT_WRITE) ? - LPTE_CHG : 0; - if ((pvo->pvo_vaddr & PVO_MANAGED) && - (pvo->pvo_pte.prot & VM_PROT_WRITE)) { - refchg |= - atomic_readandclear_32(&m->md.mdpg_attrs); - if (refchg & LPTE_CHG) - vm_page_dirty(m); - if (refchg & LPTE_REF) - vm_page_aflag_set(m, PGA_REFERENCED); - } - if (pvo->pvo_pmap == kernel_pmap) - isync(); - } - PMAP_UNLOCK(pmap); - } - m->md.mdpg_cache_attrs = ma; - PV_PAGE_UNLOCK(m); -} - -/* - * Map a wired page into kernel virtual address space. - */ -void -moea64_kenter_attr(vm_offset_t va, vm_paddr_t pa, vm_memattr_t ma) -{ - int error; - struct pvo_entry *pvo, *oldpvo; - - do { - pvo = alloc_pvo_entry(0); - if (pvo == NULL) - vm_wait(NULL); - } while (pvo == NULL); - pvo->pvo_pte.prot = VM_PROT_READ | VM_PROT_WRITE | VM_PROT_EXECUTE; - pvo->pvo_pte.pa = (pa & ~ADDR_POFF) | moea64_calc_wimg(pa, ma); - pvo->pvo_vaddr |= PVO_WIRED; - - PMAP_LOCK(kernel_pmap); - oldpvo = moea64_pvo_find_va(kernel_pmap, va); - if (oldpvo != NULL) - moea64_pvo_remove_from_pmap(oldpvo); - init_pvo_entry(pvo, kernel_pmap, va); - error = moea64_pvo_enter(pvo, NULL, NULL); - PMAP_UNLOCK(kernel_pmap); - - /* Free any dead pages */ - if (oldpvo != NULL) { - moea64_pvo_remove_from_page(oldpvo); - free_pvo_entry(oldpvo); - } - - if (error != 0) - panic("moea64_kenter: failed to enter va %#zx pa %#jx: %d", va, - (uintmax_t)pa, error); -} - -void -moea64_kenter(vm_offset_t va, vm_paddr_t pa) -{ - - moea64_kenter_attr(va, pa, VM_MEMATTR_DEFAULT); -} - -/* - * Extract the physical page address associated with the given kernel virtual - * address. - */ -vm_paddr_t -moea64_kextract(vm_offset_t va) -{ - struct pvo_entry *pvo; - vm_paddr_t pa; - - /* - * Shortcut the direct-mapped case when applicable. We never put - * anything but 1:1 (or 62-bit aliased) mappings below - * VM_MIN_KERNEL_ADDRESS. - */ - if (va < VM_MIN_KERNEL_ADDRESS) - return (va & ~DMAP_BASE_ADDRESS); - - PMAP_LOCK(kernel_pmap); - pvo = moea64_pvo_find_va(kernel_pmap, va); - KASSERT(pvo != NULL, ("moea64_kextract: no addr found for %#" PRIxPTR, - va)); - pa = PVO_PADDR(pvo) | (va - PVO_VADDR(pvo)); - PMAP_UNLOCK(kernel_pmap); - return (pa); -} - -/* - * Remove a wired page from kernel virtual address space. - */ -void -moea64_kremove(vm_offset_t va) -{ - moea64_remove(kernel_pmap, va, va + PAGE_SIZE); -} - -/* - * Provide a kernel pointer corresponding to a given userland pointer. - * The returned pointer is valid until the next time this function is - * called in this thread. This is used internally in copyin/copyout. - */ -static int -moea64_map_user_ptr(pmap_t pm, volatile const void *uaddr, - void **kaddr, size_t ulen, size_t *klen) -{ - size_t l; -#ifdef __powerpc64__ - struct slb *slb; -#endif - register_t slbv; - - *kaddr = (char *)USER_ADDR + ((uintptr_t)uaddr & ~SEGMENT_MASK); - l = ((char *)USER_ADDR + SEGMENT_LENGTH) - (char *)(*kaddr); - if (l > ulen) - l = ulen; - if (klen) - *klen = l; - else if (l != ulen) - return (EFAULT); - -#ifdef __powerpc64__ - /* Try lockless look-up first */ - slb = user_va_to_slb_entry(pm, (vm_offset_t)uaddr); - - if (slb == NULL) { - /* If it isn't there, we need to pre-fault the VSID */ - PMAP_LOCK(pm); - slbv = va_to_vsid(pm, (vm_offset_t)uaddr) << SLBV_VSID_SHIFT; - PMAP_UNLOCK(pm); - } else { - slbv = slb->slbv; - } - - /* Mark segment no-execute */ - slbv |= SLBV_N; -#else - slbv = va_to_vsid(pm, (vm_offset_t)uaddr); - - /* Mark segment no-execute */ - slbv |= SR_N; -#endif - - /* If we have already set this VSID, we can just return */ - if (curthread->td_pcb->pcb_cpu.aim.usr_vsid == slbv) - return (0); - - __asm __volatile("isync"); - curthread->td_pcb->pcb_cpu.aim.usr_segm = - (uintptr_t)uaddr >> ADDR_SR_SHFT; - curthread->td_pcb->pcb_cpu.aim.usr_vsid = slbv; -#ifdef __powerpc64__ - __asm __volatile ("slbie %0; slbmte %1, %2; isync" :: - "r"(USER_ADDR), "r"(slbv), "r"(USER_SLB_SLBE)); -#else - __asm __volatile("mtsr %0,%1; isync" :: "n"(USER_SR), "r"(slbv)); -#endif - - return (0); -} - -/* - * Figure out where a given kernel pointer (usually in a fault) points - * to from the VM's perspective, potentially remapping into userland's - * address space. - */ -static int -moea64_decode_kernel_ptr(vm_offset_t addr, int *is_user, - vm_offset_t *decoded_addr) -{ - vm_offset_t user_sr; - - if ((addr >> ADDR_SR_SHFT) == (USER_ADDR >> ADDR_SR_SHFT)) { - user_sr = curthread->td_pcb->pcb_cpu.aim.usr_segm; - addr &= ADDR_PIDX | ADDR_POFF; - addr |= user_sr << ADDR_SR_SHFT; - *decoded_addr = addr; - *is_user = 1; - } else { - *decoded_addr = addr; - *is_user = 0; - } - - return (0); -} - -/* - * Map a range of physical addresses into kernel virtual address space. - * - * The value passed in *virt is a suggested virtual address for the mapping. - * Architectures which can support a direct-mapped physical to virtual region - * can return the appropriate address within that region, leaving '*virt' - * unchanged. Other architectures should map the pages starting at '*virt' and - * update '*virt' with the first usable address after the mapped region. - */ -vm_offset_t -moea64_map(vm_offset_t *virt, vm_paddr_t pa_start, - vm_paddr_t pa_end, int prot) -{ - vm_offset_t sva, va; - - if (hw_direct_map) { - /* - * Check if every page in the region is covered by the direct - * map. The direct map covers all of physical memory. Use - * moea64_calc_wimg() as a shortcut to see if the page is in - * physical memory as a way to see if the direct map covers it. - */ - for (va = pa_start; va < pa_end; va += PAGE_SIZE) - if (moea64_calc_wimg(va, VM_MEMATTR_DEFAULT) != LPTE_M) - break; - if (va == pa_end) - return (PHYS_TO_DMAP(pa_start)); - } - sva = *virt; - va = sva; - /* XXX respect prot argument */ - for (; pa_start < pa_end; pa_start += PAGE_SIZE, va += PAGE_SIZE) - moea64_kenter(va, pa_start); - *virt = va; - - return (sva); -} - -/* - * Returns true if the pmap's pv is one of the first - * 16 pvs linked to from this page. This count may - * be changed upwards or downwards in the future; it - * is only necessary that true be returned for a small - * subset of pmaps for proper page aging. - */ -boolean_t -moea64_page_exists_quick(pmap_t pmap, vm_page_t m) -{ - int loops; - struct pvo_entry *pvo; - boolean_t rv; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("moea64_page_exists_quick: page %p is not managed", m)); - loops = 0; - rv = FALSE; - PV_PAGE_LOCK(m); - LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { - if (!(pvo->pvo_vaddr & PVO_DEAD) && pvo->pvo_pmap == pmap) { - rv = TRUE; - break; - } - if (++loops >= 16) - break; - } - PV_PAGE_UNLOCK(m); - return (rv); -} - -void -moea64_page_init(vm_page_t m) -{ - - m->md.mdpg_attrs = 0; - m->md.mdpg_cache_attrs = VM_MEMATTR_DEFAULT; - LIST_INIT(&m->md.mdpg_pvoh); -} - -/* - * Return the number of managed mappings to the given physical page - * that are wired. - */ -int -moea64_page_wired_mappings(vm_page_t m) -{ - struct pvo_entry *pvo; - int count; - - count = 0; - if ((m->oflags & VPO_UNMANAGED) != 0) - return (count); - PV_PAGE_LOCK(m); - LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) - if ((pvo->pvo_vaddr & (PVO_DEAD | PVO_WIRED)) == PVO_WIRED) - count++; - PV_PAGE_UNLOCK(m); - return (count); -} - -static uintptr_t moea64_vsidcontext; - -uintptr_t -moea64_get_unique_vsid(void) { - u_int entropy; - register_t hash; - uint32_t mask; - int i; - - entropy = 0; - __asm __volatile("mftb %0" : "=r"(entropy)); - - mtx_lock(&moea64_slb_mutex); - for (i = 0; i < NVSIDS; i += VSID_NBPW) { - u_int n; - - /* - * Create a new value by multiplying by a prime and adding in - * entropy from the timebase register. This is to make the - * VSID more random so that the PT hash function collides - * less often. (Note that the prime casues gcc to do shifts - * instead of a multiply.) - */ - moea64_vsidcontext = (moea64_vsidcontext * 0x1105) + entropy; - hash = moea64_vsidcontext & (NVSIDS - 1); - if (hash == 0) /* 0 is special, avoid it */ - continue; - n = hash >> 5; - mask = 1 << (hash & (VSID_NBPW - 1)); - hash = (moea64_vsidcontext & VSID_HASHMASK); - if (moea64_vsid_bitmap[n] & mask) { /* collision? */ - /* anything free in this bucket? */ - if (moea64_vsid_bitmap[n] == 0xffffffff) { - entropy = (moea64_vsidcontext >> 20); - continue; - } - i = ffs(~moea64_vsid_bitmap[n]) - 1; - mask = 1 << i; - hash &= rounddown2(VSID_HASHMASK, VSID_NBPW); - hash |= i; - } - if (hash == VSID_VRMA) /* also special, avoid this too */ - continue; - KASSERT(!(moea64_vsid_bitmap[n] & mask), - ("Allocating in-use VSID %#zx\n", hash)); - moea64_vsid_bitmap[n] |= mask; - mtx_unlock(&moea64_slb_mutex); - return (hash); - } - - mtx_unlock(&moea64_slb_mutex); - panic("%s: out of segments",__func__); -} - -#ifdef __powerpc64__ -int -moea64_pinit(pmap_t pmap) -{ - - RB_INIT(&pmap->pmap_pvo); - - pmap->pm_slb_tree_root = slb_alloc_tree(); - pmap->pm_slb = slb_alloc_user_cache(); - pmap->pm_slb_len = 0; - - return (1); -} -#else -int -moea64_pinit(pmap_t pmap) -{ - int i; - uint32_t hash; - - RB_INIT(&pmap->pmap_pvo); - - if (pmap_bootstrapped) - pmap->pmap_phys = (pmap_t)moea64_kextract((vm_offset_t)pmap); - else - pmap->pmap_phys = pmap; - - /* - * Allocate some segment registers for this pmap. - */ - hash = moea64_get_unique_vsid(); - - for (i = 0; i < 16; i++) - pmap->pm_sr[i] = VSID_MAKE(i, hash); - - KASSERT(pmap->pm_sr[0] != 0, ("moea64_pinit: pm_sr[0] = 0")); - - return (1); -} -#endif - -/* - * Initialize the pmap associated with process 0. - */ -void -moea64_pinit0(pmap_t pm) -{ - - PMAP_LOCK_INIT(pm); - moea64_pinit(pm); - bzero(&pm->pm_stats, sizeof(pm->pm_stats)); -} - -/* - * Set the physical protection on the specified range of this map as requested. - */ -static void -moea64_pvo_protect( pmap_t pm, struct pvo_entry *pvo, vm_prot_t prot) -{ - struct vm_page *pg; - vm_prot_t oldprot; - int32_t refchg; - - PMAP_LOCK_ASSERT(pm, MA_OWNED); - - /* - * Change the protection of the page. - */ - oldprot = pvo->pvo_pte.prot; - pvo->pvo_pte.prot = prot; - pg = PHYS_TO_VM_PAGE(PVO_PADDR(pvo)); - - /* - * If the PVO is in the page table, update mapping - */ - refchg = moea64_pte_replace(pvo, MOEA64_PTE_PROT_UPDATE); - if (refchg < 0) - refchg = (oldprot & VM_PROT_WRITE) ? LPTE_CHG : 0; - - if (pm != kernel_pmap && pg != NULL && - (pg->a.flags & PGA_EXECUTABLE) == 0 && - (pvo->pvo_pte.pa & (LPTE_I | LPTE_G | LPTE_NOEXEC)) == 0) { - if ((pg->oflags & VPO_UNMANAGED) == 0) - vm_page_aflag_set(pg, PGA_EXECUTABLE); - moea64_syncicache(pm, PVO_VADDR(pvo), - PVO_PADDR(pvo), PAGE_SIZE); - } - - /* - * Update vm about the REF/CHG bits if the page is managed and we have - * removed write access. - */ - if (pg != NULL && (pvo->pvo_vaddr & PVO_MANAGED) && - (oldprot & VM_PROT_WRITE)) { - refchg |= atomic_readandclear_32(&pg->md.mdpg_attrs); - if (refchg & LPTE_CHG) - vm_page_dirty(pg); - if (refchg & LPTE_REF) - vm_page_aflag_set(pg, PGA_REFERENCED); - } -} - -void -moea64_protect(pmap_t pm, vm_offset_t sva, vm_offset_t eva, - vm_prot_t prot) -{ - struct pvo_entry *pvo, key; - - CTR4(KTR_PMAP, "moea64_protect: pm=%p sva=%#x eva=%#x prot=%#x", pm, - sva, eva, prot); - - KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, - ("moea64_protect: non current pmap")); - - if ((prot & VM_PROT_READ) == VM_PROT_NONE) { - moea64_remove(pm, sva, eva); - return; - } - - PMAP_LOCK(pm); - key.pvo_vaddr = sva; - for (pvo = RB_NFIND(pvo_tree, &pm->pmap_pvo, &key); - pvo != NULL && PVO_VADDR(pvo) < eva; - pvo = RB_NEXT(pvo_tree, &pm->pmap_pvo, pvo)) { - if (PVO_IS_SP(pvo)) { - if (moea64_sp_pvo_in_range(pvo, sva, eva)) { - pvo = moea64_sp_protect(pvo, prot); - continue; - } else { - CTR1(KTR_PMAP, "%s: demote before protect", - __func__); - moea64_sp_demote(pvo); - } - } - moea64_pvo_protect(pm, pvo, prot); - } - PMAP_UNLOCK(pm); -} - -/* - * Map a list of wired pages into kernel virtual address space. This is - * intended for temporary mappings which do not need page modification or - * references recorded. Existing mappings in the region are overwritten. - */ -void -moea64_qenter(vm_offset_t va, vm_page_t *m, int count) -{ - while (count-- > 0) { - moea64_kenter(va, VM_PAGE_TO_PHYS(*m)); - va += PAGE_SIZE; - m++; - } -} - -/* - * Remove page mappings from kernel virtual address space. Intended for - * temporary mappings entered by moea64_qenter. - */ -void -moea64_qremove(vm_offset_t va, int count) -{ - while (count-- > 0) { - moea64_kremove(va); - va += PAGE_SIZE; - } -} - -void -moea64_release_vsid(uint64_t vsid) -{ - int idx, mask; - - mtx_lock(&moea64_slb_mutex); - idx = vsid & (NVSIDS-1); - mask = 1 << (idx % VSID_NBPW); - idx /= VSID_NBPW; - KASSERT(moea64_vsid_bitmap[idx] & mask, - ("Freeing unallocated VSID %#jx", vsid)); - moea64_vsid_bitmap[idx] &= ~mask; - mtx_unlock(&moea64_slb_mutex); -} - -void -moea64_release(pmap_t pmap) -{ - - /* - * Free segment registers' VSIDs - */ - #ifdef __powerpc64__ - slb_free_tree(pmap); - slb_free_user_cache(pmap->pm_slb); - #else - KASSERT(pmap->pm_sr[0] != 0, ("moea64_release: pm_sr[0] = 0")); - - moea64_release_vsid(VSID_TO_HASH(pmap->pm_sr[0])); - #endif -} - -/* - * Remove all pages mapped by the specified pmap - */ -void -moea64_remove_pages(pmap_t pm) -{ - struct pvo_entry *pvo, *tpvo; - struct pvo_dlist tofree; - - SLIST_INIT(&tofree); - - PMAP_LOCK(pm); - RB_FOREACH_SAFE(pvo, pvo_tree, &pm->pmap_pvo, tpvo) { - if (pvo->pvo_vaddr & PVO_WIRED) - continue; - - /* - * For locking reasons, remove this from the page table and - * pmap, but save delinking from the vm_page for a second - * pass - */ - moea64_pvo_remove_from_pmap(pvo); - SLIST_INSERT_HEAD(&tofree, pvo, pvo_dlink); - } - PMAP_UNLOCK(pm); - - while (!SLIST_EMPTY(&tofree)) { - pvo = SLIST_FIRST(&tofree); - SLIST_REMOVE_HEAD(&tofree, pvo_dlink); - moea64_pvo_remove_from_page(pvo); - free_pvo_entry(pvo); - } -} - -static void -moea64_remove_locked(pmap_t pm, vm_offset_t sva, vm_offset_t eva, - struct pvo_dlist *tofree) -{ - struct pvo_entry *pvo, *tpvo, key; - - PMAP_LOCK_ASSERT(pm, MA_OWNED); - - key.pvo_vaddr = sva; - for (pvo = RB_NFIND(pvo_tree, &pm->pmap_pvo, &key); - pvo != NULL && PVO_VADDR(pvo) < eva; pvo = tpvo) { - if (PVO_IS_SP(pvo)) { - if (moea64_sp_pvo_in_range(pvo, sva, eva)) { - tpvo = moea64_sp_remove(pvo, tofree); - continue; - } else { - CTR1(KTR_PMAP, "%s: demote before remove", - __func__); - moea64_sp_demote(pvo); - } - } - tpvo = RB_NEXT(pvo_tree, &pm->pmap_pvo, pvo); - - /* - * For locking reasons, remove this from the page table and - * pmap, but save delinking from the vm_page for a second - * pass - */ - moea64_pvo_remove_from_pmap(pvo); - SLIST_INSERT_HEAD(tofree, pvo, pvo_dlink); - } -} - -/* - * Remove the given range of addresses from the specified map. - */ -void -moea64_remove(pmap_t pm, vm_offset_t sva, vm_offset_t eva) -{ - struct pvo_entry *pvo; - struct pvo_dlist tofree; - - /* - * Perform an unsynchronized read. This is, however, safe. - */ - if (pm->pm_stats.resident_count == 0) - return; - - SLIST_INIT(&tofree); - PMAP_LOCK(pm); - moea64_remove_locked(pm, sva, eva, &tofree); - PMAP_UNLOCK(pm); - - while (!SLIST_EMPTY(&tofree)) { - pvo = SLIST_FIRST(&tofree); - SLIST_REMOVE_HEAD(&tofree, pvo_dlink); - moea64_pvo_remove_from_page(pvo); - free_pvo_entry(pvo); - } -} - -/* - * Remove physical page from all pmaps in which it resides. moea64_pvo_remove() - * will reflect changes in pte's back to the vm_page. - */ -void -moea64_remove_all(vm_page_t m) -{ - struct pvo_entry *pvo, *next_pvo; - struct pvo_head freequeue; - int wasdead; - pmap_t pmap; - - LIST_INIT(&freequeue); - - PV_PAGE_LOCK(m); - LIST_FOREACH_SAFE(pvo, vm_page_to_pvoh(m), pvo_vlink, next_pvo) { - pmap = pvo->pvo_pmap; - PMAP_LOCK(pmap); - wasdead = (pvo->pvo_vaddr & PVO_DEAD); - if (!wasdead) { - if (PVO_IS_SP(pvo)) { - CTR1(KTR_PMAP, "%s: demote before remove_all", - __func__); - moea64_sp_demote(pvo); - } - moea64_pvo_remove_from_pmap(pvo); - } - moea64_pvo_remove_from_page_locked(pvo, m); - if (!wasdead) - LIST_INSERT_HEAD(&freequeue, pvo, pvo_vlink); - PMAP_UNLOCK(pmap); - - } - KASSERT(!pmap_page_is_mapped(m), ("Page still has mappings")); - KASSERT((m->a.flags & PGA_WRITEABLE) == 0, ("Page still writable")); - PV_PAGE_UNLOCK(m); - - /* Clean up UMA allocations */ - LIST_FOREACH_SAFE(pvo, &freequeue, pvo_vlink, next_pvo) - free_pvo_entry(pvo); -} - -/* - * Allocate a physical page of memory directly from the phys_avail map. - * Can only be called from moea64_bootstrap before avail start and end are - * calculated. - */ -vm_offset_t -moea64_bootstrap_alloc(vm_size_t size, vm_size_t align) -{ - vm_offset_t s, e; - int i, j; - - size = round_page(size); - for (i = 0; phys_avail[i + 1] != 0; i += 2) { - if (align != 0) - s = roundup2(phys_avail[i], align); - else - s = phys_avail[i]; - e = s + size; - - if (s < phys_avail[i] || e > phys_avail[i + 1]) - continue; - - if (s + size > platform_real_maxaddr()) - continue; - - if (s == phys_avail[i]) { - phys_avail[i] += size; - } else if (e == phys_avail[i + 1]) { - phys_avail[i + 1] -= size; - } else { - for (j = phys_avail_count * 2; j > i; j -= 2) { - phys_avail[j] = phys_avail[j - 2]; - phys_avail[j + 1] = phys_avail[j - 1]; - } - - phys_avail[i + 3] = phys_avail[i + 1]; - phys_avail[i + 1] = s; - phys_avail[i + 2] = e; - phys_avail_count++; - } - - return (s); - } - panic("moea64_bootstrap_alloc: could not allocate memory"); -} - -static int -moea64_pvo_enter(struct pvo_entry *pvo, struct pvo_head *pvo_head, - struct pvo_entry **oldpvop) -{ - struct pvo_entry *old_pvo; - int err; - - PMAP_LOCK_ASSERT(pvo->pvo_pmap, MA_OWNED); - - STAT_MOEA64(moea64_pvo_enter_calls++); - - /* - * Add to pmap list - */ - old_pvo = RB_INSERT(pvo_tree, &pvo->pvo_pmap->pmap_pvo, pvo); - - if (old_pvo != NULL) { - if (oldpvop != NULL) - *oldpvop = old_pvo; - return (EEXIST); - } - - if (pvo_head != NULL) { - LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); - } - - if (pvo->pvo_vaddr & PVO_WIRED) - pvo->pvo_pmap->pm_stats.wired_count++; - pvo->pvo_pmap->pm_stats.resident_count++; - - /* - * Insert it into the hardware page table - */ - err = moea64_pte_insert(pvo); - if (err != 0) { - panic("moea64_pvo_enter: overflow"); - } - - STAT_MOEA64(moea64_pvo_entries++); - - if (pvo->pvo_pmap == kernel_pmap) - isync(); - -#ifdef __powerpc64__ - /* - * Make sure all our bootstrap mappings are in the SLB as soon - * as virtual memory is switched on. - */ - if (!pmap_bootstrapped) - moea64_bootstrap_slb_prefault(PVO_VADDR(pvo), - pvo->pvo_vaddr & PVO_LARGE); -#endif - - return (0); -} - -static void -moea64_pvo_remove_from_pmap(struct pvo_entry *pvo) -{ - struct vm_page *pg; - int32_t refchg; - - KASSERT(pvo->pvo_pmap != NULL, ("Trying to remove PVO with no pmap")); - PMAP_LOCK_ASSERT(pvo->pvo_pmap, MA_OWNED); - KASSERT(!(pvo->pvo_vaddr & PVO_DEAD), ("Trying to remove dead PVO")); - - /* - * If there is an active pte entry, we need to deactivate it - */ - refchg = moea64_pte_unset(pvo); - if (refchg < 0) { - /* - * If it was evicted from the page table, be pessimistic and - * dirty the page. - */ - if (pvo->pvo_pte.prot & VM_PROT_WRITE) - refchg = LPTE_CHG; - else - refchg = 0; - } - - /* - * Update our statistics. - */ - pvo->pvo_pmap->pm_stats.resident_count--; - if (pvo->pvo_vaddr & PVO_WIRED) - pvo->pvo_pmap->pm_stats.wired_count--; - - /* - * Remove this PVO from the pmap list. - */ - RB_REMOVE(pvo_tree, &pvo->pvo_pmap->pmap_pvo, pvo); - - /* - * Mark this for the next sweep - */ - pvo->pvo_vaddr |= PVO_DEAD; - - /* Send RC bits to VM */ - if ((pvo->pvo_vaddr & PVO_MANAGED) && - (pvo->pvo_pte.prot & VM_PROT_WRITE)) { - pg = PHYS_TO_VM_PAGE(PVO_PADDR(pvo)); - if (pg != NULL) { - refchg |= atomic_readandclear_32(&pg->md.mdpg_attrs); - if (refchg & LPTE_CHG) - vm_page_dirty(pg); - if (refchg & LPTE_REF) - vm_page_aflag_set(pg, PGA_REFERENCED); - } - } -} - -static inline void -moea64_pvo_remove_from_page_locked(struct pvo_entry *pvo, - vm_page_t m) -{ - - KASSERT(pvo->pvo_vaddr & PVO_DEAD, ("Trying to delink live page")); - - /* Use NULL pmaps as a sentinel for races in page deletion */ - if (pvo->pvo_pmap == NULL) - return; - pvo->pvo_pmap = NULL; - - /* - * Update vm about page writeability/executability if managed - */ - PV_LOCKASSERT(PVO_PADDR(pvo)); - if (pvo->pvo_vaddr & PVO_MANAGED) { - if (m != NULL) { - LIST_REMOVE(pvo, pvo_vlink); - if (LIST_EMPTY(vm_page_to_pvoh(m))) - vm_page_aflag_clear(m, - PGA_WRITEABLE | PGA_EXECUTABLE); - } - } - - STAT_MOEA64(moea64_pvo_entries--); - STAT_MOEA64(moea64_pvo_remove_calls++); -} - -static void -moea64_pvo_remove_from_page(struct pvo_entry *pvo) -{ - vm_page_t pg = NULL; - - if (pvo->pvo_vaddr & PVO_MANAGED) - pg = PHYS_TO_VM_PAGE(PVO_PADDR(pvo)); - - PV_LOCK(PVO_PADDR(pvo)); - moea64_pvo_remove_from_page_locked(pvo, pg); - PV_UNLOCK(PVO_PADDR(pvo)); -} - -static struct pvo_entry * -moea64_pvo_find_va(pmap_t pm, vm_offset_t va) -{ - struct pvo_entry key; - - PMAP_LOCK_ASSERT(pm, MA_OWNED); - - key.pvo_vaddr = va & ~ADDR_POFF; - return (RB_FIND(pvo_tree, &pm->pmap_pvo, &key)); -} - -static boolean_t -moea64_query_bit(vm_page_t m, uint64_t ptebit) -{ - struct pvo_entry *pvo; - int64_t ret; - boolean_t rv; - vm_page_t sp; - - /* - * See if this bit is stored in the page already. - * - * For superpages, the bit is stored in the first vm page. - */ - if ((m->md.mdpg_attrs & ptebit) != 0 || - ((sp = PHYS_TO_VM_PAGE(VM_PAGE_TO_PHYS(m) & ~HPT_SP_MASK)) != NULL && - (sp->md.mdpg_attrs & (ptebit | MDPG_ATTR_SP)) == - (ptebit | MDPG_ATTR_SP))) - return (TRUE); - - /* - * Examine each PTE. Sync so that any pending REF/CHG bits are - * flushed to the PTEs. - */ - rv = FALSE; - powerpc_sync(); - PV_PAGE_LOCK(m); - LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { - if (PVO_IS_SP(pvo)) { - ret = moea64_sp_query(pvo, ptebit); - /* - * If SP was not demoted, check its REF/CHG bits here. - */ - if (ret != -1) { - if ((ret & ptebit) != 0) { - rv = TRUE; - break; - } - continue; - } - /* else, fallthrough */ - } - - ret = 0; - - /* - * See if this pvo has a valid PTE. if so, fetch the - * REF/CHG bits from the valid PTE. If the appropriate - * ptebit is set, return success. - */ - PMAP_LOCK(pvo->pvo_pmap); - if (!(pvo->pvo_vaddr & PVO_DEAD)) - ret = moea64_pte_synch(pvo); - PMAP_UNLOCK(pvo->pvo_pmap); - - if (ret > 0) { - atomic_set_32(&m->md.mdpg_attrs, - ret & (LPTE_CHG | LPTE_REF)); - if (ret & ptebit) { - rv = TRUE; - break; - } - } - } - PV_PAGE_UNLOCK(m); - - return (rv); -} - -static u_int -moea64_clear_bit(vm_page_t m, u_int64_t ptebit) -{ - u_int count; - struct pvo_entry *pvo; - int64_t ret; - - /* - * Sync so that any pending REF/CHG bits are flushed to the PTEs (so - * we can reset the right ones). - */ - powerpc_sync(); - - /* - * For each pvo entry, clear the pte's ptebit. - */ - count = 0; - PV_PAGE_LOCK(m); - LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { - if (PVO_IS_SP(pvo)) { - if ((ret = moea64_sp_clear(pvo, m, ptebit)) != -1) { - count += ret; - continue; - } - } - ret = 0; - - PMAP_LOCK(pvo->pvo_pmap); - if (!(pvo->pvo_vaddr & PVO_DEAD)) - ret = moea64_pte_clear(pvo, ptebit); - PMAP_UNLOCK(pvo->pvo_pmap); - - if (ret > 0 && (ret & ptebit)) - count++; - } - atomic_clear_32(&m->md.mdpg_attrs, ptebit); - PV_PAGE_UNLOCK(m); - - return (count); -} - -int -moea64_dev_direct_mapped(vm_paddr_t pa, vm_size_t size) -{ - struct pvo_entry *pvo, key; - vm_offset_t ppa; - int error = 0; - - if (hw_direct_map && mem_valid(pa, size) == 0) - return (0); - - PMAP_LOCK(kernel_pmap); - ppa = pa & ~ADDR_POFF; - key.pvo_vaddr = DMAP_BASE_ADDRESS + ppa; - for (pvo = RB_FIND(pvo_tree, &kernel_pmap->pmap_pvo, &key); - ppa < pa + size; ppa += PAGE_SIZE, - pvo = RB_NEXT(pvo_tree, &kernel_pmap->pmap_pvo, pvo)) { - if (pvo == NULL || PVO_PADDR(pvo) != ppa) { - error = EFAULT; - break; - } - } - PMAP_UNLOCK(kernel_pmap); - - return (error); -} - -/* - * Map a set of physical memory pages into the kernel virtual - * address space. Return a pointer to where it is mapped. This - * routine is intended to be used for mapping device memory, - * NOT real memory. - */ -void * -moea64_mapdev_attr(vm_paddr_t pa, vm_size_t size, vm_memattr_t ma) -{ - vm_offset_t va, tmpva, ppa, offset; - - ppa = trunc_page(pa); - offset = pa & PAGE_MASK; - size = roundup2(offset + size, PAGE_SIZE); - - va = kva_alloc(size); - - if (!va) - panic("moea64_mapdev: Couldn't alloc kernel virtual memory"); - - for (tmpva = va; size > 0;) { - moea64_kenter_attr(tmpva, ppa, ma); - size -= PAGE_SIZE; - tmpva += PAGE_SIZE; - ppa += PAGE_SIZE; - } - - return ((void *)(va + offset)); -} - -void * -moea64_mapdev(vm_paddr_t pa, vm_size_t size) -{ - - return moea64_mapdev_attr(pa, size, VM_MEMATTR_DEFAULT); -} - -void -moea64_unmapdev(vm_offset_t va, vm_size_t size) -{ - vm_offset_t base, offset; - - base = trunc_page(va); - offset = va & PAGE_MASK; - size = roundup2(offset + size, PAGE_SIZE); - - moea64_qremove(base, atop(size)); - kva_free(base, size); -} - -void -moea64_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz) -{ - struct pvo_entry *pvo; - vm_offset_t lim; - vm_paddr_t pa; - vm_size_t len; - - if (__predict_false(pm == NULL)) - pm = &curthread->td_proc->p_vmspace->vm_pmap; - - PMAP_LOCK(pm); - while (sz > 0) { - lim = round_page(va+1); - len = MIN(lim - va, sz); - pvo = moea64_pvo_find_va(pm, va & ~ADDR_POFF); - if (pvo != NULL && !(pvo->pvo_pte.pa & LPTE_I)) { - pa = PVO_PADDR(pvo) | (va & ADDR_POFF); - moea64_syncicache(pm, va, pa, len); - } - va += len; - sz -= len; - } - PMAP_UNLOCK(pm); -} - -void -moea64_dumpsys_map(vm_paddr_t pa, size_t sz, void **va) -{ - - *va = (void *)(uintptr_t)pa; -} - -extern struct dump_pa dump_map[PHYS_AVAIL_SZ + 1]; - -void -moea64_scan_init(void) -{ - struct pvo_entry *pvo; - vm_offset_t va; - int i; - - if (!do_minidump) { - /* Initialize phys. segments for dumpsys(). */ - memset(&dump_map, 0, sizeof(dump_map)); - mem_regions(&pregions, &pregions_sz, ®ions, ®ions_sz); - for (i = 0; i < pregions_sz; i++) { - dump_map[i].pa_start = pregions[i].mr_start; - dump_map[i].pa_size = pregions[i].mr_size; - } - return; - } - - /* Virtual segments for minidumps: */ - memset(&dump_map, 0, sizeof(dump_map)); - - /* 1st: kernel .data and .bss. */ - dump_map[0].pa_start = trunc_page((uintptr_t)_etext); - dump_map[0].pa_size = round_page((uintptr_t)_end) - - dump_map[0].pa_start; - - /* 2nd: msgbuf and tables (see pmap_bootstrap()). */ - dump_map[1].pa_start = (vm_paddr_t)(uintptr_t)msgbufp->msg_ptr; - dump_map[1].pa_size = round_page(msgbufp->msg_size); - - /* 3rd: kernel VM. */ - va = dump_map[1].pa_start + dump_map[1].pa_size; - /* Find start of next chunk (from va). */ - while (va < virtual_end) { - /* Don't dump the buffer cache. */ - if (va >= kmi.buffer_sva && va < kmi.buffer_eva) { - va = kmi.buffer_eva; - continue; - } - pvo = moea64_pvo_find_va(kernel_pmap, va & ~ADDR_POFF); - if (pvo != NULL && !(pvo->pvo_vaddr & PVO_DEAD)) - break; - va += PAGE_SIZE; - } - if (va < virtual_end) { - dump_map[2].pa_start = va; - va += PAGE_SIZE; - /* Find last page in chunk. */ - while (va < virtual_end) { - /* Don't run into the buffer cache. */ - if (va == kmi.buffer_sva) - break; - pvo = moea64_pvo_find_va(kernel_pmap, va & ~ADDR_POFF); - if (pvo == NULL || (pvo->pvo_vaddr & PVO_DEAD)) - break; - va += PAGE_SIZE; - } - dump_map[2].pa_size = va - dump_map[2].pa_start; - } -} - -#ifdef __powerpc64__ - -static size_t -moea64_scan_pmap(struct bitset *dump_bitset) -{ - struct pvo_entry *pvo; - vm_paddr_t pa, pa_end; - vm_offset_t va, pgva, kstart, kend, kstart_lp, kend_lp; - uint64_t lpsize; - - lpsize = moea64_large_page_size; - kstart = trunc_page((vm_offset_t)_etext); - kend = round_page((vm_offset_t)_end); - kstart_lp = kstart & ~moea64_large_page_mask; - kend_lp = (kend + moea64_large_page_mask) & ~moea64_large_page_mask; - - CTR4(KTR_PMAP, "moea64_scan_pmap: kstart=0x%016lx, kend=0x%016lx, " - "kstart_lp=0x%016lx, kend_lp=0x%016lx", - kstart, kend, kstart_lp, kend_lp); - - PMAP_LOCK(kernel_pmap); - RB_FOREACH(pvo, pvo_tree, &kernel_pmap->pmap_pvo) { - va = pvo->pvo_vaddr; - - if (va & PVO_DEAD) - continue; - - /* Skip DMAP (except kernel area) */ - if (va >= DMAP_BASE_ADDRESS && va <= DMAP_MAX_ADDRESS) { - if (va & PVO_LARGE) { - pgva = va & ~moea64_large_page_mask; - if (pgva < kstart_lp || pgva >= kend_lp) - continue; - } else { - pgva = trunc_page(va); - if (pgva < kstart || pgva >= kend) - continue; - } - } - - pa = PVO_PADDR(pvo); - - if (va & PVO_LARGE) { - pa_end = pa + lpsize; - for (; pa < pa_end; pa += PAGE_SIZE) { - if (vm_phys_is_dumpable(pa)) - vm_page_dump_add(dump_bitset, pa); - } - } else { - if (vm_phys_is_dumpable(pa)) - vm_page_dump_add(dump_bitset, pa); - } - } - PMAP_UNLOCK(kernel_pmap); - - return (sizeof(struct lpte) * moea64_pteg_count * 8); -} - -static struct dump_context dump_ctx; - -static void * -moea64_dump_pmap_init(unsigned blkpgs) -{ - dump_ctx.ptex = 0; - dump_ctx.ptex_end = moea64_pteg_count * 8; - dump_ctx.blksz = blkpgs * PAGE_SIZE; - return (&dump_ctx); -} - -#else - -static size_t -moea64_scan_pmap(struct bitset *dump_bitset __unused) -{ - return (0); -} - -static void * -moea64_dump_pmap_init(unsigned blkpgs) -{ - return (NULL); -} - -#endif - -#ifdef __powerpc64__ -static void -moea64_map_range(vm_offset_t va, vm_paddr_t pa, vm_size_t npages) -{ - - for (; npages > 0; --npages) { - if (moea64_large_page_size != 0 && - (pa & moea64_large_page_mask) == 0 && - (va & moea64_large_page_mask) == 0 && - npages >= (moea64_large_page_size >> PAGE_SHIFT)) { - PMAP_LOCK(kernel_pmap); - moea64_kenter_large(va, pa, 0, 0); - PMAP_UNLOCK(kernel_pmap); - pa += moea64_large_page_size; - va += moea64_large_page_size; - npages -= (moea64_large_page_size >> PAGE_SHIFT) - 1; - } else { - moea64_kenter(va, pa); - pa += PAGE_SIZE; - va += PAGE_SIZE; - } - } -} - -static void -moea64_page_array_startup(long pages) -{ - long dom_pages[MAXMEMDOM]; - vm_paddr_t pa; - vm_offset_t va, vm_page_base; - vm_size_t needed, size; - long page; - int domain; - int i; - - vm_page_base = 0xd000000000000000ULL; - - /* Short-circuit single-domain systems. */ - if (vm_ndomains == 1) { - size = round_page(pages * sizeof(struct vm_page)); - pa = vm_phys_early_alloc(0, size); - vm_page_base = moea64_map(&vm_page_base, - pa, pa + size, VM_PROT_READ | VM_PROT_WRITE); - vm_page_array_size = pages; - vm_page_array = (vm_page_t)vm_page_base; - return; - } - - page = 0; - for (i = 0; i < MAXMEMDOM; i++) - dom_pages[i] = 0; - - /* Now get the number of pages required per domain. */ - for (i = 0; i < vm_phys_nsegs; i++) { - domain = vm_phys_segs[i].domain; - KASSERT(domain < MAXMEMDOM, - ("Invalid vm_phys_segs NUMA domain %d!\n", domain)); - /* Get size of vm_page_array needed for this segment. */ - size = btoc(vm_phys_segs[i].end - vm_phys_segs[i].start); - dom_pages[domain] += size; - } - - for (i = 0; phys_avail[i + 1] != 0; i+= 2) { - domain = vm_phys_domain(phys_avail[i]); - KASSERT(domain < MAXMEMDOM, - ("Invalid phys_avail NUMA domain %d!\n", domain)); - size = btoc(phys_avail[i + 1] - phys_avail[i]); - dom_pages[domain] += size; - } - - /* - * Map in chunks that can get us all 16MB pages. There will be some - * overlap between domains, but that's acceptable for now. - */ - vm_page_array_size = 0; - va = vm_page_base; - for (i = 0; i < MAXMEMDOM && vm_page_array_size < pages; i++) { - if (dom_pages[i] == 0) - continue; - size = ulmin(pages - vm_page_array_size, dom_pages[i]); - size = round_page(size * sizeof(struct vm_page)); - needed = size; - size = roundup2(size, moea64_large_page_size); - pa = vm_phys_early_alloc(i, size); - vm_page_array_size += size / sizeof(struct vm_page); - moea64_map_range(va, pa, size >> PAGE_SHIFT); - /* Scoot up domain 0, to reduce the domain page overlap. */ - if (i == 0) - vm_page_base += size - needed; - va += size; - } - vm_page_array = (vm_page_t)vm_page_base; - vm_page_array_size = pages; -} -#endif - -static int64_t -moea64_null_method(void) -{ - return (0); -} - -static int64_t moea64_pte_replace_default(struct pvo_entry *pvo, int flags) -{ - int64_t refchg; - - refchg = moea64_pte_unset(pvo); - moea64_pte_insert(pvo); - - return (refchg); -} - -struct moea64_funcs *moea64_ops; - -#define DEFINE_OEA64_IFUNC(ret, func, args, def) \ - DEFINE_IFUNC(, ret, moea64_##func, args) { \ - moea64_##func##_t f; \ - if (moea64_ops == NULL) \ - return ((moea64_##func##_t)def); \ - f = moea64_ops->func; \ - return (f != NULL ? f : (moea64_##func##_t)def);\ - } - -DEFINE_OEA64_IFUNC(int64_t, pte_replace, (struct pvo_entry *, int), - moea64_pte_replace_default) -DEFINE_OEA64_IFUNC(int64_t, pte_insert, (struct pvo_entry *), moea64_null_method) -DEFINE_OEA64_IFUNC(int64_t, pte_unset, (struct pvo_entry *), moea64_null_method) -DEFINE_OEA64_IFUNC(int64_t, pte_clear, (struct pvo_entry *, uint64_t), - moea64_null_method) -DEFINE_OEA64_IFUNC(int64_t, pte_synch, (struct pvo_entry *), moea64_null_method) -DEFINE_OEA64_IFUNC(int64_t, pte_insert_sp, (struct pvo_entry *), moea64_null_method) -DEFINE_OEA64_IFUNC(int64_t, pte_unset_sp, (struct pvo_entry *), moea64_null_method) -DEFINE_OEA64_IFUNC(int64_t, pte_replace_sp, (struct pvo_entry *), moea64_null_method) - -/* Superpage functions */ - -/* MMU interface */ - -static bool -moea64_ps_enabled(pmap_t pmap) -{ - return (superpages_enabled); -} - -static void -moea64_align_superpage(vm_object_t object, vm_ooffset_t offset, - vm_offset_t *addr, vm_size_t size) -{ - vm_offset_t sp_offset; - - if (size < HPT_SP_SIZE) - return; - - CTR4(KTR_PMAP, "%s: offs=%#jx, addr=%p, size=%#jx", - __func__, (uintmax_t)offset, addr, (uintmax_t)size); - - if (object != NULL && (object->flags & OBJ_COLORED) != 0) - offset += ptoa(object->pg_color); - sp_offset = offset & HPT_SP_MASK; - if (size - ((HPT_SP_SIZE - sp_offset) & HPT_SP_MASK) < HPT_SP_SIZE || - (*addr & HPT_SP_MASK) == sp_offset) - return; - if ((*addr & HPT_SP_MASK) < sp_offset) - *addr = (*addr & ~HPT_SP_MASK) + sp_offset; - else - *addr = ((*addr + HPT_SP_MASK) & ~HPT_SP_MASK) + sp_offset; -} - -/* Helpers */ - -static __inline void -moea64_pvo_cleanup(struct pvo_dlist *tofree) -{ - struct pvo_entry *pvo; - - /* clean up */ - while (!SLIST_EMPTY(tofree)) { - pvo = SLIST_FIRST(tofree); - SLIST_REMOVE_HEAD(tofree, pvo_dlink); - if (pvo->pvo_vaddr & PVO_DEAD) - moea64_pvo_remove_from_page(pvo); - free_pvo_entry(pvo); - } -} - -static __inline uint16_t -pvo_to_vmpage_flags(struct pvo_entry *pvo) -{ - uint16_t flags; - - flags = 0; - if ((pvo->pvo_pte.prot & VM_PROT_WRITE) != 0) - flags |= PGA_WRITEABLE; - if ((pvo->pvo_pte.prot & VM_PROT_EXECUTE) != 0) - flags |= PGA_EXECUTABLE; - - return (flags); -} - -/* - * Check if the given pvo and its superpage are in sva-eva range. - */ -static __inline bool -moea64_sp_pvo_in_range(struct pvo_entry *pvo, vm_offset_t sva, vm_offset_t eva) -{ - vm_offset_t spva; - - spva = PVO_VADDR(pvo) & ~HPT_SP_MASK; - if (spva >= sva && spva + HPT_SP_SIZE <= eva) { - /* - * Because this function is intended to be called from loops - * that iterate over ordered pvo entries, if the condition - * above is true then the pvo must be the first of its - * superpage. - */ - KASSERT(PVO_VADDR(pvo) == spva, - ("%s: unexpected unaligned superpage pvo", __func__)); - return (true); - } - return (false); -} - -/* - * Update vm about the REF/CHG bits if the superpage is managed and - * has (or had) write access. - */ -static void -moea64_sp_refchg_process(struct pvo_entry *sp, vm_page_t m, - int64_t sp_refchg, vm_prot_t prot) -{ - vm_page_t m_end; - int64_t refchg; - - if ((sp->pvo_vaddr & PVO_MANAGED) != 0 && (prot & VM_PROT_WRITE) != 0) { - for (m_end = &m[HPT_SP_PAGES]; m < m_end; m++) { - refchg = sp_refchg | - atomic_readandclear_32(&m->md.mdpg_attrs); - if (refchg & LPTE_CHG) - vm_page_dirty(m); - if (refchg & LPTE_REF) - vm_page_aflag_set(m, PGA_REFERENCED); - } - } -} - -/* Superpage ops */ - -static int -moea64_sp_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, - vm_prot_t prot, u_int flags, int8_t psind) -{ - struct pvo_entry *pvo, **pvos; - struct pvo_head *pvo_head; - vm_offset_t sva; - vm_page_t sm; - vm_paddr_t pa, spa; - bool sync; - struct pvo_dlist tofree; - int error, i; - uint16_t aflags; - - KASSERT((va & HPT_SP_MASK) == 0, ("%s: va %#jx unaligned", - __func__, (uintmax_t)va)); - KASSERT(psind == 1, ("%s: invalid psind: %d", __func__, psind)); - KASSERT(m->psind == 1, ("%s: invalid m->psind: %d", - __func__, m->psind)); - KASSERT(pmap != kernel_pmap, - ("%s: function called with kernel pmap", __func__)); - - CTR5(KTR_PMAP, "%s: va=%#jx, pa=%#jx, prot=%#x, flags=%#x, psind=1", - __func__, (uintmax_t)va, (uintmax_t)VM_PAGE_TO_PHYS(m), - prot, flags); - - SLIST_INIT(&tofree); - - sva = va; - sm = m; - spa = pa = VM_PAGE_TO_PHYS(sm); - - /* Try to allocate all PVOs first, to make failure handling easier. */ - pvos = malloc(HPT_SP_PAGES * sizeof(struct pvo_entry *), M_TEMP, - M_NOWAIT); - if (pvos == NULL) { - CTR1(KTR_PMAP, "%s: failed to alloc pvo array", __func__); - return (KERN_RESOURCE_SHORTAGE); - } - - for (i = 0; i < HPT_SP_PAGES; i++) { - pvos[i] = alloc_pvo_entry(0); - if (pvos[i] == NULL) { - CTR1(KTR_PMAP, "%s: failed to alloc pvo", __func__); - for (i = i - 1; i >= 0; i--) - free_pvo_entry(pvos[i]); - free(pvos, M_TEMP); - return (KERN_RESOURCE_SHORTAGE); - } - } - - SP_PV_LOCK_ALIGNED(spa); - PMAP_LOCK(pmap); - - /* Note: moea64_remove_locked() also clears cached REF/CHG bits. */ - moea64_remove_locked(pmap, va, va + HPT_SP_SIZE, &tofree); - - /* Enter pages */ - for (i = 0; i < HPT_SP_PAGES; - i++, va += PAGE_SIZE, pa += PAGE_SIZE, m++) { - pvo = pvos[i]; - - pvo->pvo_pte.prot = prot; - pvo->pvo_pte.pa = (pa & ~HPT_SP_MASK) | LPTE_LP_4K_16M | - moea64_calc_wimg(pa, pmap_page_get_memattr(m)); - - if ((flags & PMAP_ENTER_WIRED) != 0) - pvo->pvo_vaddr |= PVO_WIRED; - pvo->pvo_vaddr |= PVO_LARGE; - - if ((m->oflags & VPO_UNMANAGED) != 0) - pvo_head = NULL; - else { - pvo_head = &m->md.mdpg_pvoh; - pvo->pvo_vaddr |= PVO_MANAGED; - } - - init_pvo_entry(pvo, pmap, va); - - error = moea64_pvo_enter(pvo, pvo_head, NULL); - /* - * All superpage PVOs were previously removed, so no errors - * should occur while inserting the new ones. - */ - KASSERT(error == 0, ("%s: unexpected error " - "when inserting superpage PVO: %d", - __func__, error)); - } - - PMAP_UNLOCK(pmap); - SP_PV_UNLOCK_ALIGNED(spa); - - sync = (sm->a.flags & PGA_EXECUTABLE) == 0; - /* Note: moea64_pvo_cleanup() also clears page prot. flags. */ - moea64_pvo_cleanup(&tofree); - pvo = pvos[0]; - - /* Set vm page flags */ - aflags = pvo_to_vmpage_flags(pvo); - if (aflags != 0) - for (m = sm; m < &sm[HPT_SP_PAGES]; m++) - vm_page_aflag_set(m, aflags); - - /* - * Flush the page from the instruction cache if this page is - * mapped executable and cacheable. - */ - if (sync && (pvo->pvo_pte.pa & (LPTE_I | LPTE_G | LPTE_NOEXEC)) == 0) - moea64_syncicache(pmap, sva, spa, HPT_SP_SIZE); - - atomic_add_long(&sp_mappings, 1); - CTR3(KTR_PMAP, "%s: SP success for va %#jx in pmap %p", - __func__, (uintmax_t)sva, pmap); - - free(pvos, M_TEMP); - return (KERN_SUCCESS); -} - -static void -moea64_sp_promote(pmap_t pmap, vm_offset_t va, vm_page_t m) -{ - struct pvo_entry *first, *pvo; - vm_paddr_t pa, pa_end; - vm_offset_t sva, va_end; - int64_t sp_refchg; - - /* This CTR may generate a lot of output. */ - /* CTR2(KTR_PMAP, "%s: va=%#jx", __func__, (uintmax_t)va); */ - - va &= ~HPT_SP_MASK; - sva = va; - /* Get superpage */ - pa = VM_PAGE_TO_PHYS(m) & ~HPT_SP_MASK; - m = PHYS_TO_VM_PAGE(pa); - - PMAP_LOCK(pmap); - - /* - * Check if all pages meet promotion criteria. - * - * XXX In some cases the loop below may be executed for each or most - * of the entered pages of a superpage, which can be expensive - * (although it was not profiled) and need some optimization. - * - * Some cases where this seems to happen are: - * - When a superpage is first entered read-only and later becomes - * read-write. - * - When some of the superpage's virtual addresses map to previously - * wired/cached pages while others map to pages allocated from a - * different physical address range. A common scenario where this - * happens is when mmap'ing a file that is already present in FS - * block cache and doesn't fill a superpage. - */ - first = pvo = moea64_pvo_find_va(pmap, sva); - for (pa_end = pa + HPT_SP_SIZE; - pa < pa_end; pa += PAGE_SIZE, va += PAGE_SIZE) { - if (pvo == NULL || (pvo->pvo_vaddr & PVO_DEAD) != 0) { - CTR3(KTR_PMAP, - "%s: NULL or dead PVO: pmap=%p, va=%#jx", - __func__, pmap, (uintmax_t)va); - goto error; - } - if (PVO_PADDR(pvo) != pa) { - CTR5(KTR_PMAP, "%s: PAs don't match: " - "pmap=%p, va=%#jx, pvo_pa=%#jx, exp_pa=%#jx", - __func__, pmap, (uintmax_t)va, - (uintmax_t)PVO_PADDR(pvo), (uintmax_t)pa); - atomic_add_long(&sp_p_fail_pa, 1); - goto error; - } - if ((first->pvo_vaddr & PVO_FLAGS_PROMOTE) != - (pvo->pvo_vaddr & PVO_FLAGS_PROMOTE)) { - CTR5(KTR_PMAP, "%s: PVO flags don't match: " - "pmap=%p, va=%#jx, pvo_flags=%#jx, exp_flags=%#jx", - __func__, pmap, (uintmax_t)va, - (uintmax_t)(pvo->pvo_vaddr & PVO_FLAGS_PROMOTE), - (uintmax_t)(first->pvo_vaddr & PVO_FLAGS_PROMOTE)); - atomic_add_long(&sp_p_fail_flags, 1); - goto error; - } - if (first->pvo_pte.prot != pvo->pvo_pte.prot) { - CTR5(KTR_PMAP, "%s: PVO protections don't match: " - "pmap=%p, va=%#jx, pvo_prot=%#x, exp_prot=%#x", - __func__, pmap, (uintmax_t)va, - pvo->pvo_pte.prot, first->pvo_pte.prot); - atomic_add_long(&sp_p_fail_prot, 1); - goto error; - } - if ((first->pvo_pte.pa & LPTE_WIMG) != - (pvo->pvo_pte.pa & LPTE_WIMG)) { - CTR5(KTR_PMAP, "%s: WIMG bits don't match: " - "pmap=%p, va=%#jx, pvo_wimg=%#jx, exp_wimg=%#jx", - __func__, pmap, (uintmax_t)va, - (uintmax_t)(pvo->pvo_pte.pa & LPTE_WIMG), - (uintmax_t)(first->pvo_pte.pa & LPTE_WIMG)); - atomic_add_long(&sp_p_fail_wimg, 1); - goto error; - } - - pvo = RB_NEXT(pvo_tree, &pmap->pmap_pvo, pvo); - } - - /* All OK, promote. */ - - /* - * Handle superpage REF/CHG bits. If REF or CHG is set in - * any page, then it must be set in the superpage. - * - * Instead of querying each page, we take advantage of two facts: - * 1- If a page is being promoted, it was referenced. - * 2- If promoted pages are writable, they were modified. - */ - sp_refchg = LPTE_REF | - ((first->pvo_pte.prot & VM_PROT_WRITE) != 0 ? LPTE_CHG : 0); - - /* Promote pages */ - - for (pvo = first, va_end = PVO_VADDR(pvo) + HPT_SP_SIZE; - pvo != NULL && PVO_VADDR(pvo) < va_end; - pvo = RB_NEXT(pvo_tree, &pmap->pmap_pvo, pvo)) { - pvo->pvo_pte.pa &= ADDR_POFF | ~HPT_SP_MASK; - pvo->pvo_pte.pa |= LPTE_LP_4K_16M; - pvo->pvo_vaddr |= PVO_LARGE; - } - moea64_pte_replace_sp(first); - - /* Send REF/CHG bits to VM */ - moea64_sp_refchg_process(first, m, sp_refchg, first->pvo_pte.prot); - - /* Use first page to cache REF/CHG bits */ - atomic_set_32(&m->md.mdpg_attrs, sp_refchg | MDPG_ATTR_SP); - - PMAP_UNLOCK(pmap); - - atomic_add_long(&sp_mappings, 1); - atomic_add_long(&sp_promotions, 1); - CTR3(KTR_PMAP, "%s: success for va %#jx in pmap %p", - __func__, (uintmax_t)sva, pmap); - return; - -error: - atomic_add_long(&sp_p_failures, 1); - PMAP_UNLOCK(pmap); -} - -static void -moea64_sp_demote_aligned(struct pvo_entry *sp) -{ - struct pvo_entry *pvo; - vm_offset_t va, va_end; - vm_paddr_t pa; - vm_page_t m; - pmap_t pmap; - int64_t refchg; - - CTR2(KTR_PMAP, "%s: va=%#jx", __func__, (uintmax_t)PVO_VADDR(sp)); - - pmap = sp->pvo_pmap; - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - - pvo = sp; - - /* Demote pages */ - - va = PVO_VADDR(pvo); - pa = PVO_PADDR(pvo); - m = PHYS_TO_VM_PAGE(pa); - - for (pvo = sp, va_end = va + HPT_SP_SIZE; - pvo != NULL && PVO_VADDR(pvo) < va_end; - pvo = RB_NEXT(pvo_tree, &pmap->pmap_pvo, pvo), - va += PAGE_SIZE, pa += PAGE_SIZE) { - KASSERT(pvo && PVO_VADDR(pvo) == va, - ("%s: missing PVO for va %#jx", __func__, (uintmax_t)va)); - - pvo->pvo_vaddr &= ~PVO_LARGE; - pvo->pvo_pte.pa &= ~LPTE_RPGN; - pvo->pvo_pte.pa |= pa; - - } - refchg = moea64_pte_replace_sp(sp); - - /* - * Clear SP flag - * - * XXX It is possible that another pmap has this page mapped as - * part of a superpage, but as the SP flag is used only for - * caching SP REF/CHG bits, that will be queried if not set - * in cache, it should be ok to clear it here. - */ - atomic_clear_32(&m->md.mdpg_attrs, MDPG_ATTR_SP); - - /* - * Handle superpage REF/CHG bits. A bit set in the superpage - * means all pages should consider it set. - */ - moea64_sp_refchg_process(sp, m, refchg, sp->pvo_pte.prot); - - atomic_add_long(&sp_demotions, 1); - CTR3(KTR_PMAP, "%s: success for va %#jx in pmap %p", - __func__, (uintmax_t)PVO_VADDR(sp), pmap); -} - -static void -moea64_sp_demote(struct pvo_entry *pvo) -{ - PMAP_LOCK_ASSERT(pvo->pvo_pmap, MA_OWNED); - - if ((PVO_VADDR(pvo) & HPT_SP_MASK) != 0) { - pvo = moea64_pvo_find_va(pvo->pvo_pmap, - PVO_VADDR(pvo) & ~HPT_SP_MASK); - KASSERT(pvo != NULL, ("%s: missing PVO for va %#jx", - __func__, (uintmax_t)(PVO_VADDR(pvo) & ~HPT_SP_MASK))); - } - moea64_sp_demote_aligned(pvo); -} - -static struct pvo_entry * -moea64_sp_unwire(struct pvo_entry *sp) -{ - struct pvo_entry *pvo, *prev; - vm_offset_t eva; - pmap_t pm; - int64_t ret, refchg; - - CTR2(KTR_PMAP, "%s: va=%#jx", __func__, (uintmax_t)PVO_VADDR(sp)); - - pm = sp->pvo_pmap; - PMAP_LOCK_ASSERT(pm, MA_OWNED); - - eva = PVO_VADDR(sp) + HPT_SP_SIZE; - refchg = 0; - for (pvo = sp; pvo != NULL && PVO_VADDR(pvo) < eva; - prev = pvo, pvo = RB_NEXT(pvo_tree, &pm->pmap_pvo, pvo)) { - if ((pvo->pvo_vaddr & PVO_WIRED) == 0) - panic("%s: pvo %p is missing PVO_WIRED", - __func__, pvo); - pvo->pvo_vaddr &= ~PVO_WIRED; - - ret = moea64_pte_replace(pvo, 0 /* No invalidation */); - if (ret < 0) - refchg |= LPTE_CHG; - else - refchg |= ret; - - pm->pm_stats.wired_count--; - } - - /* Send REF/CHG bits to VM */ - moea64_sp_refchg_process(sp, PHYS_TO_VM_PAGE(PVO_PADDR(sp)), - refchg, sp->pvo_pte.prot); - - return (prev); -} - -static struct pvo_entry * -moea64_sp_protect(struct pvo_entry *sp, vm_prot_t prot) -{ - struct pvo_entry *pvo, *prev; - vm_offset_t eva; - pmap_t pm; - vm_page_t m, m_end; - int64_t ret, refchg; - vm_prot_t oldprot; - - CTR3(KTR_PMAP, "%s: va=%#jx, prot=%x", - __func__, (uintmax_t)PVO_VADDR(sp), prot); - - pm = sp->pvo_pmap; - PMAP_LOCK_ASSERT(pm, MA_OWNED); - - oldprot = sp->pvo_pte.prot; - m = PHYS_TO_VM_PAGE(PVO_PADDR(sp)); - KASSERT(m != NULL, ("%s: missing vm page for pa %#jx", - __func__, (uintmax_t)PVO_PADDR(sp))); - eva = PVO_VADDR(sp) + HPT_SP_SIZE; - refchg = 0; - - for (pvo = sp; pvo != NULL && PVO_VADDR(pvo) < eva; - prev = pvo, pvo = RB_NEXT(pvo_tree, &pm->pmap_pvo, pvo)) { - pvo->pvo_pte.prot = prot; - /* - * If the PVO is in the page table, update mapping - */ - ret = moea64_pte_replace(pvo, MOEA64_PTE_PROT_UPDATE); - if (ret < 0) - refchg |= LPTE_CHG; - else - refchg |= ret; - } - - /* Send REF/CHG bits to VM */ - moea64_sp_refchg_process(sp, m, refchg, oldprot); - - /* Handle pages that became executable */ - if ((m->a.flags & PGA_EXECUTABLE) == 0 && - (sp->pvo_pte.pa & (LPTE_I | LPTE_G | LPTE_NOEXEC)) == 0) { - if ((m->oflags & VPO_UNMANAGED) == 0) - for (m_end = &m[HPT_SP_PAGES]; m < m_end; m++) - vm_page_aflag_set(m, PGA_EXECUTABLE); - moea64_syncicache(pm, PVO_VADDR(sp), PVO_PADDR(sp), - HPT_SP_SIZE); - } - - return (prev); -} - -static struct pvo_entry * -moea64_sp_remove(struct pvo_entry *sp, struct pvo_dlist *tofree) -{ - struct pvo_entry *pvo, *tpvo; - vm_offset_t eva; - pmap_t pm; - - CTR2(KTR_PMAP, "%s: va=%#jx", __func__, (uintmax_t)PVO_VADDR(sp)); - - pm = sp->pvo_pmap; - PMAP_LOCK_ASSERT(pm, MA_OWNED); - - eva = PVO_VADDR(sp) + HPT_SP_SIZE; - for (pvo = sp; pvo != NULL && PVO_VADDR(pvo) < eva; pvo = tpvo) { - tpvo = RB_NEXT(pvo_tree, &pm->pmap_pvo, pvo); - - /* - * For locking reasons, remove this from the page table and - * pmap, but save delinking from the vm_page for a second - * pass - */ - moea64_pvo_remove_from_pmap(pvo); - SLIST_INSERT_HEAD(tofree, pvo, pvo_dlink); - } - - /* - * Clear SP bit - * - * XXX See comment in moea64_sp_demote_aligned() for why it's - * ok to always clear the SP bit on remove/demote. - */ - atomic_clear_32(&PHYS_TO_VM_PAGE(PVO_PADDR(sp))->md.mdpg_attrs, - MDPG_ATTR_SP); - - return (tpvo); -} - -static int64_t -moea64_sp_query_locked(struct pvo_entry *pvo, uint64_t ptebit) -{ - int64_t refchg, ret; - vm_offset_t eva; - vm_page_t m; - pmap_t pmap; - struct pvo_entry *sp; - - pmap = pvo->pvo_pmap; - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - - /* Get first SP PVO */ - if ((PVO_VADDR(pvo) & HPT_SP_MASK) != 0) { - sp = moea64_pvo_find_va(pmap, PVO_VADDR(pvo) & ~HPT_SP_MASK); - KASSERT(sp != NULL, ("%s: missing PVO for va %#jx", - __func__, (uintmax_t)(PVO_VADDR(pvo) & ~HPT_SP_MASK))); - } else - sp = pvo; - eva = PVO_VADDR(sp) + HPT_SP_SIZE; - - refchg = 0; - for (pvo = sp; pvo != NULL && PVO_VADDR(pvo) < eva; - pvo = RB_NEXT(pvo_tree, &pmap->pmap_pvo, pvo)) { - ret = moea64_pte_synch(pvo); - if (ret > 0) { - refchg |= ret & (LPTE_CHG | LPTE_REF); - if ((refchg & ptebit) != 0) - break; - } - } - - /* Save results */ - if (refchg != 0) { - m = PHYS_TO_VM_PAGE(PVO_PADDR(sp)); - atomic_set_32(&m->md.mdpg_attrs, refchg | MDPG_ATTR_SP); - } - - return (refchg); -} - -static int64_t -moea64_sp_query(struct pvo_entry *pvo, uint64_t ptebit) -{ - int64_t refchg; - pmap_t pmap; - - pmap = pvo->pvo_pmap; - PMAP_LOCK(pmap); - - /* - * Check if SP was demoted/removed before pmap lock was acquired. - */ - if (!PVO_IS_SP(pvo) || (pvo->pvo_vaddr & PVO_DEAD) != 0) { - CTR2(KTR_PMAP, "%s: demoted/removed: pa=%#jx", - __func__, (uintmax_t)PVO_PADDR(pvo)); - PMAP_UNLOCK(pmap); - return (-1); - } - - refchg = moea64_sp_query_locked(pvo, ptebit); - PMAP_UNLOCK(pmap); - - CTR4(KTR_PMAP, "%s: va=%#jx, pa=%#jx: refchg=%#jx", - __func__, (uintmax_t)PVO_VADDR(pvo), - (uintmax_t)PVO_PADDR(pvo), (uintmax_t)refchg); - - return (refchg); -} - -static int64_t -moea64_sp_pvo_clear(struct pvo_entry *pvo, uint64_t ptebit) -{ - int64_t refchg, ret; - pmap_t pmap; - struct pvo_entry *sp; - vm_offset_t eva; - vm_page_t m; - - pmap = pvo->pvo_pmap; - PMAP_LOCK(pmap); - - /* - * Check if SP was demoted/removed before pmap lock was acquired. - */ - if (!PVO_IS_SP(pvo) || (pvo->pvo_vaddr & PVO_DEAD) != 0) { - CTR2(KTR_PMAP, "%s: demoted/removed: pa=%#jx", - __func__, (uintmax_t)PVO_PADDR(pvo)); - PMAP_UNLOCK(pmap); - return (-1); - } - - /* Get first SP PVO */ - if ((PVO_VADDR(pvo) & HPT_SP_MASK) != 0) { - sp = moea64_pvo_find_va(pmap, PVO_VADDR(pvo) & ~HPT_SP_MASK); - KASSERT(sp != NULL, ("%s: missing PVO for va %#jx", - __func__, (uintmax_t)(PVO_VADDR(pvo) & ~HPT_SP_MASK))); - } else - sp = pvo; - eva = PVO_VADDR(sp) + HPT_SP_SIZE; - - refchg = 0; - for (pvo = sp; pvo != NULL && PVO_VADDR(pvo) < eva; - pvo = RB_NEXT(pvo_tree, &pmap->pmap_pvo, pvo)) { - ret = moea64_pte_clear(pvo, ptebit); - if (ret > 0) - refchg |= ret & (LPTE_CHG | LPTE_REF); - } - - m = PHYS_TO_VM_PAGE(PVO_PADDR(sp)); - atomic_clear_32(&m->md.mdpg_attrs, ptebit); - PMAP_UNLOCK(pmap); - - CTR4(KTR_PMAP, "%s: va=%#jx, pa=%#jx: refchg=%#jx", - __func__, (uintmax_t)PVO_VADDR(sp), - (uintmax_t)PVO_PADDR(sp), (uintmax_t)refchg); - - return (refchg); -} - -static int64_t -moea64_sp_clear(struct pvo_entry *pvo, vm_page_t m, uint64_t ptebit) -{ - int64_t count, ret; - pmap_t pmap; - - count = 0; - pmap = pvo->pvo_pmap; - - /* - * Since this reference bit is shared by 4096 4KB pages, it - * should not be cleared every time it is tested. Apply a - * simple "hash" function on the physical page number, the - * virtual superpage number, and the pmap address to select - * one 4KB page out of the 4096 on which testing the - * reference bit will result in clearing that reference bit. - * This function is designed to avoid the selection of the - * same 4KB page for every 16MB page mapping. - * - * Always leave the reference bit of a wired mapping set, as - * the current state of its reference bit won't affect page - * replacement. - */ - if (ptebit == LPTE_REF && (((VM_PAGE_TO_PHYS(m) >> PAGE_SHIFT) ^ - (PVO_VADDR(pvo) >> HPT_SP_SHIFT) ^ (uintptr_t)pmap) & - (HPT_SP_PAGES - 1)) == 0 && (pvo->pvo_vaddr & PVO_WIRED) == 0) { - if ((ret = moea64_sp_pvo_clear(pvo, ptebit)) == -1) - return (-1); - - if ((ret & ptebit) != 0) - count++; - - /* - * If this page was not selected by the hash function, then assume - * its REF bit was set. - */ - } else if (ptebit == LPTE_REF) { - count++; - - /* - * To clear the CHG bit of a single SP page, first it must be demoted. - * But if no CHG bit is set, no bit clear and thus no SP demotion is - * needed. - */ - } else { - CTR4(KTR_PMAP, "%s: ptebit=%#jx, va=%#jx, pa=%#jx", - __func__, (uintmax_t)ptebit, (uintmax_t)PVO_VADDR(pvo), - (uintmax_t)PVO_PADDR(pvo)); - - PMAP_LOCK(pmap); - - /* - * Make sure SP wasn't demoted/removed before pmap lock - * was acquired. - */ - if (!PVO_IS_SP(pvo) || (pvo->pvo_vaddr & PVO_DEAD) != 0) { - CTR2(KTR_PMAP, "%s: demoted/removed: pa=%#jx", - __func__, (uintmax_t)PVO_PADDR(pvo)); - PMAP_UNLOCK(pmap); - return (-1); - } - - ret = moea64_sp_query_locked(pvo, ptebit); - if ((ret & ptebit) != 0) - count++; - else { - PMAP_UNLOCK(pmap); - return (0); - } - - moea64_sp_demote(pvo); - moea64_pte_clear(pvo, ptebit); - - /* - * Write protect the mapping to a single page so that a - * subsequent write access may repromote. - */ - if ((pvo->pvo_vaddr & PVO_WIRED) == 0) - moea64_pvo_protect(pmap, pvo, - pvo->pvo_pte.prot & ~VM_PROT_WRITE); - - PMAP_UNLOCK(pmap); - } - - return (count); -} diff --git a/sys/powerpc/aim/mmu_oea64.h b/sys/powerpc/aim/mmu_oea64.h deleted file mode 100644 index 9e7caad6027..00000000000 --- a/sys/powerpc/aim/mmu_oea64.h +++ /dev/null @@ -1,140 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2010 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _POWERPC_AIM_MMU_OEA64_H -#define _POWERPC_AIM_MMU_OEA64_H - -#include "opt_pmap.h" - -#include -#include - -struct dump_context { - u_long ptex; - u_long ptex_end; - size_t blksz; -}; - -extern const struct mmu_kobj oea64_mmu; - -/* - * Helper routines - */ - -/* Allocate physical memory for use in moea64_bootstrap. */ -vm_offset_t moea64_bootstrap_alloc(vm_size_t size, vm_size_t align); -/* Set an LPTE structure to match the contents of a PVO */ -void moea64_pte_from_pvo(const struct pvo_entry *pvo, struct lpte *lpte); - -/* - * Flags - */ - -#define MOEA64_PTE_PROT_UPDATE 1 -#define MOEA64_PTE_INVALIDATE 2 - -/* - * Bootstrap subroutines - * - * An MMU_BOOTSTRAP() implementation looks like this: - * moea64_early_bootstrap(); - * Allocate Page Table - * moea64_mid_bootstrap(); - * Add mappings for MMU resources - * moea64_late_bootstrap(); - */ - -void moea64_early_bootstrap(vm_offset_t kernelstart, - vm_offset_t kernelend); -void moea64_mid_bootstrap(vm_offset_t kernelstart, - vm_offset_t kernelend); -void moea64_late_bootstrap(vm_offset_t kernelstart, - vm_offset_t kernelend); - -int64_t moea64_pte_replace(struct pvo_entry *, int); -int64_t moea64_pte_insert(struct pvo_entry *); -int64_t moea64_pte_unset(struct pvo_entry *); -int64_t moea64_pte_clear(struct pvo_entry *, uint64_t); -int64_t moea64_pte_synch(struct pvo_entry *); -int64_t moea64_pte_insert_sp(struct pvo_entry *); -int64_t moea64_pte_unset_sp(struct pvo_entry *); -int64_t moea64_pte_replace_sp(struct pvo_entry *); - -typedef int64_t (*moea64_pte_replace_t)(struct pvo_entry *, int); -typedef int64_t (*moea64_pte_insert_t)(struct pvo_entry *); -typedef int64_t (*moea64_pte_unset_t)(struct pvo_entry *); -typedef int64_t (*moea64_pte_clear_t)(struct pvo_entry *, uint64_t); -typedef int64_t (*moea64_pte_synch_t)(struct pvo_entry *); -typedef int64_t (*moea64_pte_insert_sp_t)(struct pvo_entry *); -typedef int64_t (*moea64_pte_unset_sp_t)(struct pvo_entry *); -typedef int64_t (*moea64_pte_replace_sp_t)(struct pvo_entry *); - -struct moea64_funcs { - moea64_pte_replace_t pte_replace; - moea64_pte_insert_t pte_insert; - moea64_pte_unset_t pte_unset; - moea64_pte_clear_t pte_clear; - moea64_pte_synch_t pte_synch; - moea64_pte_insert_sp_t pte_insert_sp; - moea64_pte_unset_sp_t pte_unset_sp; - moea64_pte_replace_sp_t pte_replace_sp; -}; - -extern struct moea64_funcs *moea64_ops; - -static inline uint64_t -moea64_pte_vpn_from_pvo_vpn(const struct pvo_entry *pvo) -{ - return ((pvo->pvo_vpn >> (ADDR_API_SHFT64 - ADDR_PIDX_SHFT)) & - LPTE_AVPN_MASK); -} - -/* - * Statistics - */ - -#ifdef MOEA64_STATS -extern u_int moea64_pte_valid; -extern u_int moea64_pte_overflow; -#define STAT_MOEA64(x) x -#else -#define STAT_MOEA64(x) ((void)0) -#endif - -/* - * State variables - */ - -extern int moea64_large_page_shift; -extern uint64_t moea64_large_page_size; -extern uint64_t moea64_large_page_mask; -extern u_long moea64_pteg_count; -extern u_long moea64_pteg_mask; -extern int n_slbs; -extern bool moea64_has_lp_4k_16m; - -#endif /* _POWERPC_AIM_MMU_OEA64_H */ diff --git a/sys/powerpc/aim/mmu_radix.c b/sys/powerpc/aim/mmu_radix.c deleted file mode 100644 index c5c683d947f..00000000000 --- a/sys/powerpc/aim/mmu_radix.c +++ /dev/null @@ -1,6485 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2018 Matthew Macy - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* For pseries bit. */ -#include - -#ifdef INVARIANTS -#include -#endif - -#define PPC_BITLSHIFT(bit) (sizeof(long)*NBBY - 1 - (bit)) -#define PPC_BIT(bit) (1UL << PPC_BITLSHIFT(bit)) -#define PPC_BITLSHIFT_VAL(val, bit) ((val) << PPC_BITLSHIFT(bit)) - -#include "opt_ddb.h" - -#ifdef DDB -static void pmap_pte_walk(pml1_entry_t *l1, vm_offset_t va); -#endif - -#define PG_W RPTE_WIRED -#define PG_V RPTE_VALID -#define PG_MANAGED RPTE_MANAGED -#define PG_PROMOTED RPTE_PROMOTED -#define PG_M RPTE_C -#define PG_A RPTE_R -#define PG_X RPTE_EAA_X -#define PG_RW RPTE_EAA_W -#define PG_PTE_CACHE RPTE_ATTR_MASK - -#define RPTE_SHIFT 9 -#define NLS_MASK ((1UL<<5)-1) -#define RPTE_ENTRIES (1UL<> L3_PAGE_SIZE_SHIFT); -} - -static __inline vm_pindex_t -pmap_pml3e_index(vm_offset_t va) -{ - - return ((va >> L3_PAGE_SIZE_SHIFT) & RPTE_MASK); -} - -static __inline vm_pindex_t -pmap_pml2e_index(vm_offset_t va) -{ - return ((va >> L2_PAGE_SIZE_SHIFT) & RPTE_MASK); -} - -static __inline vm_pindex_t -pmap_pml1e_index(vm_offset_t va) -{ - return ((va & PG_FRAME) >> L1_PAGE_SIZE_SHIFT); -} - -/* Return various clipped indexes for a given VA */ -static __inline vm_pindex_t -pmap_pte_index(vm_offset_t va) -{ - - return ((va >> PAGE_SHIFT) & RPTE_MASK); -} - -/* Return a pointer to the PT slot that corresponds to a VA */ -static __inline pt_entry_t * -pmap_l3e_to_pte(pt_entry_t *l3e, vm_offset_t va) -{ - pt_entry_t *pte; - vm_paddr_t ptepa; - - ptepa = (be64toh(*l3e) & NLB_MASK); - pte = (pt_entry_t *)PHYS_TO_DMAP(ptepa); - return (&pte[pmap_pte_index(va)]); -} - -/* Return a pointer to the PD slot that corresponds to a VA */ -static __inline pt_entry_t * -pmap_l2e_to_l3e(pt_entry_t *l2e, vm_offset_t va) -{ - pt_entry_t *l3e; - vm_paddr_t l3pa; - - l3pa = (be64toh(*l2e) & NLB_MASK); - l3e = (pml3_entry_t *)PHYS_TO_DMAP(l3pa); - return (&l3e[pmap_pml3e_index(va)]); -} - -/* Return a pointer to the PD slot that corresponds to a VA */ -static __inline pt_entry_t * -pmap_l1e_to_l2e(pt_entry_t *l1e, vm_offset_t va) -{ - pt_entry_t *l2e; - vm_paddr_t l2pa; - - l2pa = (be64toh(*l1e) & NLB_MASK); - - l2e = (pml2_entry_t *)PHYS_TO_DMAP(l2pa); - return (&l2e[pmap_pml2e_index(va)]); -} - -static __inline pml1_entry_t * -pmap_pml1e(pmap_t pmap, vm_offset_t va) -{ - - return (&pmap->pm_pml1[pmap_pml1e_index(va)]); -} - -static pt_entry_t * -pmap_pml2e(pmap_t pmap, vm_offset_t va) -{ - pt_entry_t *l1e; - - l1e = pmap_pml1e(pmap, va); - if (l1e == NULL || (be64toh(*l1e) & RPTE_VALID) == 0) - return (NULL); - return (pmap_l1e_to_l2e(l1e, va)); -} - -static __inline pt_entry_t * -pmap_pml3e(pmap_t pmap, vm_offset_t va) -{ - pt_entry_t *l2e; - - l2e = pmap_pml2e(pmap, va); - if (l2e == NULL || (be64toh(*l2e) & RPTE_VALID) == 0) - return (NULL); - return (pmap_l2e_to_l3e(l2e, va)); -} - -static __inline pt_entry_t * -pmap_pte(pmap_t pmap, vm_offset_t va) -{ - pt_entry_t *l3e; - - l3e = pmap_pml3e(pmap, va); - if (l3e == NULL || (be64toh(*l3e) & RPTE_VALID) == 0) - return (NULL); - return (pmap_l3e_to_pte(l3e, va)); -} - -int nkpt = 64; -SYSCTL_INT(_machdep, OID_AUTO, nkpt, CTLFLAG_RD, &nkpt, 0, - "Number of kernel page table pages allocated on bootup"); - -vm_paddr_t dmaplimit; - -SYSCTL_DECL(_vm_pmap); - -#ifdef INVARIANTS -#define VERBOSE_PMAP 0 -#define VERBOSE_PROTECT 0 -static int pmap_logging; -SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_logging, CTLFLAG_RWTUN, - &pmap_logging, 0, "verbose debug logging"); -#endif - -static u_int64_t KPTphys; /* phys addr of kernel level 1 */ - -//static vm_paddr_t KERNend; /* phys addr of end of bootstrap data */ - -static vm_offset_t qframe = 0; -static struct mtx qframe_mtx; - -void mmu_radix_activate(struct thread *); -void mmu_radix_advise(pmap_t, vm_offset_t, vm_offset_t, int); -void mmu_radix_align_superpage(vm_object_t, vm_ooffset_t, vm_offset_t *, - vm_size_t); -void mmu_radix_clear_modify(vm_page_t); -void mmu_radix_copy(pmap_t, pmap_t, vm_offset_t, vm_size_t, vm_offset_t); -int mmu_radix_decode_kernel_ptr(vm_offset_t, int *, vm_offset_t *); -int mmu_radix_enter(pmap_t, vm_offset_t, vm_page_t, vm_prot_t, u_int, int8_t); -void mmu_radix_enter_object(pmap_t, vm_offset_t, vm_offset_t, vm_page_t, - vm_prot_t); -void mmu_radix_enter_quick(pmap_t, vm_offset_t, vm_page_t, vm_prot_t); -vm_paddr_t mmu_radix_extract(pmap_t pmap, vm_offset_t va); -vm_page_t mmu_radix_extract_and_hold(pmap_t, vm_offset_t, vm_prot_t); -void mmu_radix_kenter(vm_offset_t, vm_paddr_t); -vm_paddr_t mmu_radix_kextract(vm_offset_t); -void mmu_radix_kremove(vm_offset_t); -boolean_t mmu_radix_is_modified(vm_page_t); -boolean_t mmu_radix_is_prefaultable(pmap_t, vm_offset_t); -boolean_t mmu_radix_is_referenced(vm_page_t); -void mmu_radix_object_init_pt(pmap_t, vm_offset_t, vm_object_t, - vm_pindex_t, vm_size_t); -boolean_t mmu_radix_page_exists_quick(pmap_t, vm_page_t); -void mmu_radix_page_init(vm_page_t); -boolean_t mmu_radix_page_is_mapped(vm_page_t m); -void mmu_radix_page_set_memattr(vm_page_t, vm_memattr_t); -int mmu_radix_page_wired_mappings(vm_page_t); -int mmu_radix_pinit(pmap_t); -void mmu_radix_protect(pmap_t, vm_offset_t, vm_offset_t, vm_prot_t); -bool mmu_radix_ps_enabled(pmap_t); -void mmu_radix_qenter(vm_offset_t, vm_page_t *, int); -void mmu_radix_qremove(vm_offset_t, int); -vm_offset_t mmu_radix_quick_enter_page(vm_page_t); -void mmu_radix_quick_remove_page(vm_offset_t); -int mmu_radix_ts_referenced(vm_page_t); -void mmu_radix_release(pmap_t); -void mmu_radix_remove(pmap_t, vm_offset_t, vm_offset_t); -void mmu_radix_remove_all(vm_page_t); -void mmu_radix_remove_pages(pmap_t); -void mmu_radix_remove_write(vm_page_t); -void mmu_radix_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz); -void mmu_radix_unwire(pmap_t, vm_offset_t, vm_offset_t); -void mmu_radix_zero_page(vm_page_t); -void mmu_radix_zero_page_area(vm_page_t, int, int); -int mmu_radix_change_attr(vm_offset_t, vm_size_t, vm_memattr_t); -void mmu_radix_page_array_startup(long pages); - -#include "mmu_oea64.h" - -/* - * Kernel MMU interface - */ - -static void mmu_radix_bootstrap(vm_offset_t, vm_offset_t); - -static void mmu_radix_copy_page(vm_page_t, vm_page_t); -static void mmu_radix_copy_pages(vm_page_t *ma, vm_offset_t a_offset, - vm_page_t *mb, vm_offset_t b_offset, int xfersize); -static void mmu_radix_growkernel(vm_offset_t); -static void mmu_radix_init(void); -static int mmu_radix_mincore(pmap_t, vm_offset_t, vm_paddr_t *); -static vm_offset_t mmu_radix_map(vm_offset_t *, vm_paddr_t, vm_paddr_t, int); -static void mmu_radix_pinit0(pmap_t); - -static void *mmu_radix_mapdev(vm_paddr_t, vm_size_t); -static void *mmu_radix_mapdev_attr(vm_paddr_t, vm_size_t, vm_memattr_t); -static void mmu_radix_unmapdev(vm_offset_t, vm_size_t); -static void mmu_radix_kenter_attr(vm_offset_t, vm_paddr_t, vm_memattr_t ma); -static int mmu_radix_dev_direct_mapped(vm_paddr_t, vm_size_t); -static void mmu_radix_dumpsys_map(vm_paddr_t pa, size_t sz, void **va); -static void mmu_radix_scan_init(void); -static void mmu_radix_cpu_bootstrap(int ap); -static void mmu_radix_tlbie_all(void); - -static struct pmap_funcs mmu_radix_methods = { - .bootstrap = mmu_radix_bootstrap, - .copy_page = mmu_radix_copy_page, - .copy_pages = mmu_radix_copy_pages, - .cpu_bootstrap = mmu_radix_cpu_bootstrap, - .growkernel = mmu_radix_growkernel, - .init = mmu_radix_init, - .map = mmu_radix_map, - .mincore = mmu_radix_mincore, - .pinit = mmu_radix_pinit, - .pinit0 = mmu_radix_pinit0, - - .mapdev = mmu_radix_mapdev, - .mapdev_attr = mmu_radix_mapdev_attr, - .unmapdev = mmu_radix_unmapdev, - .kenter_attr = mmu_radix_kenter_attr, - .dev_direct_mapped = mmu_radix_dev_direct_mapped, - .dumpsys_pa_init = mmu_radix_scan_init, - .dumpsys_map_chunk = mmu_radix_dumpsys_map, - .page_is_mapped = mmu_radix_page_is_mapped, - .ps_enabled = mmu_radix_ps_enabled, - .object_init_pt = mmu_radix_object_init_pt, - .protect = mmu_radix_protect, - /* pmap dispatcher interface */ - .clear_modify = mmu_radix_clear_modify, - .copy = mmu_radix_copy, - .enter = mmu_radix_enter, - .enter_object = mmu_radix_enter_object, - .enter_quick = mmu_radix_enter_quick, - .extract = mmu_radix_extract, - .extract_and_hold = mmu_radix_extract_and_hold, - .is_modified = mmu_radix_is_modified, - .is_prefaultable = mmu_radix_is_prefaultable, - .is_referenced = mmu_radix_is_referenced, - .ts_referenced = mmu_radix_ts_referenced, - .page_exists_quick = mmu_radix_page_exists_quick, - .page_init = mmu_radix_page_init, - .page_wired_mappings = mmu_radix_page_wired_mappings, - .qenter = mmu_radix_qenter, - .qremove = mmu_radix_qremove, - .release = mmu_radix_release, - .remove = mmu_radix_remove, - .remove_all = mmu_radix_remove_all, - .remove_write = mmu_radix_remove_write, - .sync_icache = mmu_radix_sync_icache, - .unwire = mmu_radix_unwire, - .zero_page = mmu_radix_zero_page, - .zero_page_area = mmu_radix_zero_page_area, - .activate = mmu_radix_activate, - .quick_enter_page = mmu_radix_quick_enter_page, - .quick_remove_page = mmu_radix_quick_remove_page, - .page_set_memattr = mmu_radix_page_set_memattr, - .page_array_startup = mmu_radix_page_array_startup, - - /* Internal interfaces */ - .kenter = mmu_radix_kenter, - .kextract = mmu_radix_kextract, - .kremove = mmu_radix_kremove, - .change_attr = mmu_radix_change_attr, - .decode_kernel_ptr = mmu_radix_decode_kernel_ptr, - - .tlbie_all = mmu_radix_tlbie_all, -}; - -MMU_DEF(mmu_radix, MMU_TYPE_RADIX, mmu_radix_methods); - -static boolean_t pmap_demote_l3e_locked(pmap_t pmap, pml3_entry_t *l3e, vm_offset_t va, - struct rwlock **lockp); -static boolean_t pmap_demote_l3e(pmap_t pmap, pml3_entry_t *pde, vm_offset_t va); -static int pmap_unuse_pt(pmap_t, vm_offset_t, pml3_entry_t, struct spglist *); -static int pmap_remove_l3e(pmap_t pmap, pml3_entry_t *pdq, vm_offset_t sva, - struct spglist *free, struct rwlock **lockp); -static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva, - pml3_entry_t ptepde, struct spglist *free, struct rwlock **lockp); -static vm_page_t pmap_remove_pt_page(pmap_t pmap, vm_offset_t va); -static bool pmap_remove_page(pmap_t pmap, vm_offset_t va, pml3_entry_t *pde, - struct spglist *free); -static bool pmap_remove_ptes(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, - pml3_entry_t *l3e, struct spglist *free, struct rwlock **lockp); - -static bool pmap_pv_insert_l3e(pmap_t pmap, vm_offset_t va, pml3_entry_t l3e, - u_int flags, struct rwlock **lockp); -#if VM_NRESERVLEVEL > 0 -static void pmap_pv_promote_l3e(pmap_t pmap, vm_offset_t va, vm_paddr_t pa, - struct rwlock **lockp); -#endif -static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va); -static int pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte); -static vm_page_t mmu_radix_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, - vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp, bool *invalidate); - -static bool pmap_enter_2mpage(pmap_t pmap, vm_offset_t va, vm_page_t m, - vm_prot_t prot, struct rwlock **lockp); -static int pmap_enter_l3e(pmap_t pmap, vm_offset_t va, pml3_entry_t newpde, - u_int flags, vm_page_t m, struct rwlock **lockp); - -static vm_page_t reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp); -static void free_pv_chunk(struct pv_chunk *pc); -static vm_page_t _pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp); -static vm_page_t pmap_allocl3e(pmap_t pmap, vm_offset_t va, - struct rwlock **lockp); -static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, - struct rwlock **lockp); -static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, - struct spglist *free); -static boolean_t pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free); - -static void pmap_invalidate_page(pmap_t pmap, vm_offset_t start); -static void pmap_invalidate_all(pmap_t pmap); -static int pmap_change_attr_locked(vm_offset_t va, vm_size_t size, int mode, bool flush); - -/* - * Internal flags for pmap_enter()'s helper functions. - */ -#define PMAP_ENTER_NORECLAIM 0x1000000 /* Don't reclaim PV entries. */ -#define PMAP_ENTER_NOREPLACE 0x2000000 /* Don't replace mappings. */ - -#define UNIMPLEMENTED() panic("%s not implemented", __func__) -#define UNTESTED() panic("%s not yet tested", __func__) - -/* Number of supported PID bits */ -static unsigned int isa3_pid_bits; - -/* PID to start allocating from */ -static unsigned int isa3_base_pid; - -#define PROCTAB_SIZE_SHIFT (isa3_pid_bits + 4) -#define PROCTAB_ENTRIES (1ul << isa3_pid_bits) - -/* - * Map of physical memory regions. - */ -static struct mem_region *regions, *pregions; -static struct numa_mem_region *numa_pregions; -static u_int phys_avail_count; -static int regions_sz, pregions_sz, numa_pregions_sz; -static struct pate *isa3_parttab; -static struct prte *isa3_proctab; -static vmem_t *asid_arena; - -extern void bs_remap_earlyboot(void); - -#define RADIX_PGD_SIZE_SHIFT 16 -#define RADIX_PGD_SIZE (1UL << RADIX_PGD_SIZE_SHIFT) - -#define RADIX_PGD_INDEX_SHIFT (RADIX_PGD_SIZE_SHIFT-3) -#define NL2EPG (PAGE_SIZE/sizeof(pml2_entry_t)) -#define NL3EPG (PAGE_SIZE/sizeof(pml3_entry_t)) - -#define NUPML1E (RADIX_PGD_SIZE/sizeof(uint64_t)) /* number of userland PML1 pages */ -#define NUPDPE (NUPML1E * NL2EPG)/* number of userland PDP pages */ -#define NUPDE (NUPDPE * NL3EPG) /* number of userland PD entries */ - -/* POWER9 only permits a 64k partition table size. */ -#define PARTTAB_SIZE_SHIFT 16 -#define PARTTAB_SIZE (1UL << PARTTAB_SIZE_SHIFT) - -#define PARTTAB_HR (1UL << 63) /* host uses radix */ -#define PARTTAB_GR (1UL << 63) /* guest uses radix must match host */ - -/* TLB flush actions. Used as argument to tlbiel_flush() */ -enum { - TLB_INVAL_SCOPE_LPID = 2, /* invalidate TLBs for current LPID */ - TLB_INVAL_SCOPE_GLOBAL = 3, /* invalidate all TLBs */ -}; - -#define NPV_LIST_LOCKS MAXCPU -static int pmap_initialized; -static vm_paddr_t proctab0pa; -static vm_paddr_t parttab_phys; -CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE); - -/* - * Data for the pv entry allocation mechanism. - * Updates to pv_invl_gen are protected by the pv_list_locks[] - * elements, but reads are not. - */ -static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks); -static struct mtx __exclusive_cache_line pv_chunks_mutex; -static struct rwlock __exclusive_cache_line pv_list_locks[NPV_LIST_LOCKS]; -static struct md_page *pv_table; -static struct md_page pv_dummy; - -#ifdef PV_STATS -#define PV_STAT(x) do { x ; } while (0) -#else -#define PV_STAT(x) do { } while (0) -#endif - -#define pa_radix_index(pa) ((pa) >> L3_PAGE_SIZE_SHIFT) -#define pa_to_pvh(pa) (&pv_table[pa_radix_index(pa)]) - -#define PHYS_TO_PV_LIST_LOCK(pa) \ - (&pv_list_locks[pa_radix_index(pa) % NPV_LIST_LOCKS]) - -#define CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa) do { \ - struct rwlock **_lockp = (lockp); \ - struct rwlock *_new_lock; \ - \ - _new_lock = PHYS_TO_PV_LIST_LOCK(pa); \ - if (_new_lock != *_lockp) { \ - if (*_lockp != NULL) \ - rw_wunlock(*_lockp); \ - *_lockp = _new_lock; \ - rw_wlock(*_lockp); \ - } \ -} while (0) - -#define CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m) \ - CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, VM_PAGE_TO_PHYS(m)) - -#define RELEASE_PV_LIST_LOCK(lockp) do { \ - struct rwlock **_lockp = (lockp); \ - \ - if (*_lockp != NULL) { \ - rw_wunlock(*_lockp); \ - *_lockp = NULL; \ - } \ -} while (0) - -#define VM_PAGE_TO_PV_LIST_LOCK(m) \ - PHYS_TO_PV_LIST_LOCK(VM_PAGE_TO_PHYS(m)) - -/* - * We support 52 bits, hence: - * bits 52 - 31 = 21, 0b10101 - * RTS encoding details - * bits 0 - 3 of rts -> bits 6 - 8 unsigned long - * bits 4 - 5 of rts -> bits 62 - 63 of unsigned long - */ -#define RTS_SIZE ((0x2UL << 61) | (0x5UL << 5)) - -static int powernv_enabled = 1; - -static __always_inline void -tlbiel_radix_set_isa300(uint32_t set, uint32_t is, - uint32_t pid, uint32_t ric, uint32_t prs) -{ - uint64_t rb; - uint64_t rs; - - rb = PPC_BITLSHIFT_VAL(set, 51) | PPC_BITLSHIFT_VAL(is, 53); - rs = PPC_BITLSHIFT_VAL((uint64_t)pid, 31); - - __asm __volatile(PPC_TLBIEL(%0, %1, %2, %3, 1) - : : "r"(rb), "r"(rs), "i"(ric), "i"(prs) - : "memory"); -} - -static void -tlbiel_flush_isa3(uint32_t num_sets, uint32_t is) -{ - uint32_t set; - - __asm __volatile("ptesync": : :"memory"); - - /* - * Flush the first set of the TLB, and the entire Page Walk Cache - * and partition table entries. Then flush the remaining sets of the - * TLB. - */ - if (is == TLB_INVAL_SCOPE_GLOBAL) { - tlbiel_radix_set_isa300(0, is, 0, RIC_FLUSH_ALL, 0); - for (set = 1; set < num_sets; set++) - tlbiel_radix_set_isa300(set, is, 0, RIC_FLUSH_TLB, 0); - } - - /* Do the same for process scoped entries. */ - tlbiel_radix_set_isa300(0, is, 0, RIC_FLUSH_ALL, 1); - for (set = 1; set < num_sets; set++) - tlbiel_radix_set_isa300(set, is, 0, RIC_FLUSH_TLB, 1); - - __asm __volatile("ptesync": : :"memory"); -} - -static void -mmu_radix_tlbiel_flush(int scope) -{ - MPASS(scope == TLB_INVAL_SCOPE_LPID || - scope == TLB_INVAL_SCOPE_GLOBAL); - - tlbiel_flush_isa3(POWER9_TLB_SETS_RADIX, scope); - __asm __volatile(PPC_INVALIDATE_ERAT "; isync" : : :"memory"); -} - -static void -mmu_radix_tlbie_all(void) -{ - if (powernv_enabled) - mmu_radix_tlbiel_flush(TLB_INVAL_SCOPE_GLOBAL); - else - mmu_radix_tlbiel_flush(TLB_INVAL_SCOPE_LPID); -} - -static void -mmu_radix_init_amor(void) -{ - /* - * In HV mode, we init AMOR (Authority Mask Override Register) so that - * the hypervisor and guest can setup IAMR (Instruction Authority Mask - * Register), enable key 0 and set it to 1. - * - * AMOR = 0b1100 .... 0000 (Mask for key 0 is 11) - */ - mtspr(SPR_AMOR, (3ul << 62)); -} - -static void -mmu_radix_init_iamr(void) -{ - /* - * Radix always uses key0 of the IAMR to determine if an access is - * allowed. We set bit 0 (IBM bit 1) of key0, to prevent instruction - * fetch. - */ - mtspr(SPR_IAMR, (1ul << 62)); -} - -static void -mmu_radix_pid_set(pmap_t pmap) -{ - - mtspr(SPR_PID, pmap->pm_pid); - isync(); -} - -/* Quick sort callout for comparing physical addresses. */ -static int -pa_cmp(const void *a, const void *b) -{ - const vm_paddr_t *pa = a, *pb = b; - - if (*pa < *pb) - return (-1); - else if (*pa > *pb) - return (1); - else - return (0); -} - -#define pte_load_store(ptep, pte) atomic_swap_long(ptep, pte) -#define pte_load_clear(ptep) atomic_swap_long(ptep, 0) -#define pte_store(ptep, pte) do { \ - MPASS((pte) & (RPTE_EAA_R | RPTE_EAA_W | RPTE_EAA_X)); \ - *(u_long *)(ptep) = htobe64((u_long)((pte) | PG_V | RPTE_LEAF)); \ -} while (0) -/* - * NB: should only be used for adding directories - not for direct mappings - */ -#define pde_store(ptep, pa) do { \ - *(u_long *)(ptep) = htobe64((u_long)(pa|RPTE_VALID|RPTE_SHIFT)); \ -} while (0) - -#define pte_clear(ptep) do { \ - *(u_long *)(ptep) = (u_long)(0); \ -} while (0) - -#define PMAP_PDE_SUPERPAGE (1 << 8) /* supports 2MB superpages */ - -/* - * Promotion to a 2MB (PDE) page mapping requires that the corresponding 4KB - * (PTE) page mappings have identical settings for the following fields: - */ -#define PG_PTE_PROMOTE (PG_X | PG_MANAGED | PG_W | PG_PTE_CACHE | \ - PG_M | PG_A | RPTE_EAA_MASK | PG_V) - -static __inline void -pmap_resident_count_inc(pmap_t pmap, int count) -{ - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - pmap->pm_stats.resident_count += count; -} - -static __inline void -pmap_resident_count_dec(pmap_t pmap, int count) -{ - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - KASSERT(pmap->pm_stats.resident_count >= count, - ("pmap %p resident count underflow %ld %d", pmap, - pmap->pm_stats.resident_count, count)); - pmap->pm_stats.resident_count -= count; -} - -static void -pagezero(vm_offset_t va) -{ - va = trunc_page(va); - - bzero((void *)va, PAGE_SIZE); -} - -static uint64_t -allocpages(int n) -{ - u_int64_t ret; - - ret = moea64_bootstrap_alloc(n * PAGE_SIZE, PAGE_SIZE); - for (int i = 0; i < n; i++) - pagezero(PHYS_TO_DMAP(ret + i * PAGE_SIZE)); - return (ret); -} - -static pt_entry_t * -kvtopte(vm_offset_t va) -{ - pt_entry_t *l3e; - - l3e = pmap_pml3e(kernel_pmap, va); - if (l3e == NULL || (be64toh(*l3e) & RPTE_VALID) == 0) - return (NULL); - return (pmap_l3e_to_pte(l3e, va)); -} - -void -mmu_radix_kenter(vm_offset_t va, vm_paddr_t pa) -{ - pt_entry_t *pte; - - pte = kvtopte(va); - MPASS(pte != NULL); - *pte = htobe64(pa | RPTE_VALID | RPTE_LEAF | RPTE_EAA_R | \ - RPTE_EAA_W | RPTE_EAA_P | PG_M | PG_A); -} - -bool -mmu_radix_ps_enabled(pmap_t pmap) -{ - return (superpages_enabled && (pmap->pm_flags & PMAP_PDE_SUPERPAGE) != 0); -} - -static pt_entry_t * -pmap_nofault_pte(pmap_t pmap, vm_offset_t va, int *is_l3e) -{ - pml3_entry_t *l3e; - pt_entry_t *pte; - - va &= PG_PS_FRAME; - l3e = pmap_pml3e(pmap, va); - if (l3e == NULL || (be64toh(*l3e) & PG_V) == 0) - return (NULL); - - if (be64toh(*l3e) & RPTE_LEAF) { - *is_l3e = 1; - return (l3e); - } - *is_l3e = 0; - va &= PG_FRAME; - pte = pmap_l3e_to_pte(l3e, va); - if (pte == NULL || (be64toh(*pte) & PG_V) == 0) - return (NULL); - return (pte); -} - -int -pmap_nofault(pmap_t pmap, vm_offset_t va, vm_prot_t flags) -{ - pt_entry_t *pte; - pt_entry_t startpte, origpte, newpte; - vm_page_t m; - int is_l3e; - - startpte = 0; - retry: - if ((pte = pmap_nofault_pte(pmap, va, &is_l3e)) == NULL) - return (KERN_INVALID_ADDRESS); - origpte = newpte = be64toh(*pte); - if (startpte == 0) { - startpte = origpte; - if (((flags & VM_PROT_WRITE) && (startpte & PG_M)) || - ((flags & VM_PROT_READ) && (startpte & PG_A))) { - pmap_invalidate_all(pmap); -#ifdef INVARIANTS - if (VERBOSE_PMAP || pmap_logging) - printf("%s(%p, %#lx, %#x) (%#lx) -- invalidate all\n", - __func__, pmap, va, flags, origpte); -#endif - return (KERN_FAILURE); - } - } -#ifdef INVARIANTS - if (VERBOSE_PMAP || pmap_logging) - printf("%s(%p, %#lx, %#x) (%#lx)\n", __func__, pmap, va, - flags, origpte); -#endif - PMAP_LOCK(pmap); - if ((pte = pmap_nofault_pte(pmap, va, &is_l3e)) == NULL || - be64toh(*pte) != origpte) { - PMAP_UNLOCK(pmap); - return (KERN_FAILURE); - } - m = PHYS_TO_VM_PAGE(newpte & PG_FRAME); - MPASS(m != NULL); - switch (flags) { - case VM_PROT_READ: - if ((newpte & (RPTE_EAA_R|RPTE_EAA_X)) == 0) - goto protfail; - newpte |= PG_A; - vm_page_aflag_set(m, PGA_REFERENCED); - break; - case VM_PROT_WRITE: - if ((newpte & RPTE_EAA_W) == 0) - goto protfail; - if (is_l3e) - goto protfail; - newpte |= PG_M; - vm_page_dirty(m); - break; - case VM_PROT_EXECUTE: - if ((newpte & RPTE_EAA_X) == 0) - goto protfail; - newpte |= PG_A; - vm_page_aflag_set(m, PGA_REFERENCED); - break; - } - - if (!atomic_cmpset_long(pte, htobe64(origpte), htobe64(newpte))) - goto retry; - ptesync(); - PMAP_UNLOCK(pmap); - if (startpte == newpte) - return (KERN_FAILURE); - return (0); - protfail: - PMAP_UNLOCK(pmap); - return (KERN_PROTECTION_FAILURE); -} - -/* - * Returns TRUE if the given page is mapped individually or as part of - * a 2mpage. Otherwise, returns FALSE. - */ -boolean_t -mmu_radix_page_is_mapped(vm_page_t m) -{ - struct rwlock *lock; - boolean_t rv; - - if ((m->oflags & VPO_UNMANAGED) != 0) - return (FALSE); - lock = VM_PAGE_TO_PV_LIST_LOCK(m); - rw_rlock(lock); - rv = !TAILQ_EMPTY(&m->md.pv_list) || - ((m->flags & PG_FICTITIOUS) == 0 && - !TAILQ_EMPTY(&pa_to_pvh(VM_PAGE_TO_PHYS(m))->pv_list)); - rw_runlock(lock); - return (rv); -} - -/* - * Determine the appropriate bits to set in a PTE or PDE for a specified - * caching mode. - */ -static int -pmap_cache_bits(vm_memattr_t ma) -{ - if (ma != VM_MEMATTR_DEFAULT) { - switch (ma) { - case VM_MEMATTR_UNCACHEABLE: - return (RPTE_ATTR_GUARDEDIO); - case VM_MEMATTR_CACHEABLE: - return (RPTE_ATTR_MEM); - case VM_MEMATTR_WRITE_BACK: - case VM_MEMATTR_PREFETCHABLE: - case VM_MEMATTR_WRITE_COMBINING: - return (RPTE_ATTR_UNGUARDEDIO); - } - } - return (0); -} - -static void -pmap_invalidate_page(pmap_t pmap, vm_offset_t start) -{ - ptesync(); - if (pmap == kernel_pmap) - radix_tlbie_invlpg_kernel_4k(start); - else - radix_tlbie_invlpg_user_4k(pmap->pm_pid, start); - ttusync(); -} - -static void -pmap_invalidate_page_2m(pmap_t pmap, vm_offset_t start) -{ - ptesync(); - if (pmap == kernel_pmap) - radix_tlbie_invlpg_kernel_2m(start); - else - radix_tlbie_invlpg_user_2m(pmap->pm_pid, start); - ttusync(); -} - -static void -pmap_invalidate_pwc(pmap_t pmap) -{ - ptesync(); - if (pmap == kernel_pmap) - radix_tlbie_invlpwc_kernel(); - else - radix_tlbie_invlpwc_user(pmap->pm_pid); - ttusync(); -} - -static void -pmap_invalidate_range(pmap_t pmap, vm_offset_t start, vm_offset_t end) -{ - if (((start - end) >> PAGE_SHIFT) > 8) { - pmap_invalidate_all(pmap); - return; - } - ptesync(); - if (pmap == kernel_pmap) { - while (start < end) { - radix_tlbie_invlpg_kernel_4k(start); - start += PAGE_SIZE; - } - } else { - while (start < end) { - radix_tlbie_invlpg_user_4k(pmap->pm_pid, start); - start += PAGE_SIZE; - } - } - ttusync(); -} - -static void -pmap_invalidate_all(pmap_t pmap) -{ - ptesync(); - if (pmap == kernel_pmap) - radix_tlbie_flush_kernel(); - else - radix_tlbie_flush_user(pmap->pm_pid); - ttusync(); -} - -static void -pmap_invalidate_l3e_page(pmap_t pmap, vm_offset_t va, pml3_entry_t l3e) -{ - - /* - * When the PDE has PG_PROMOTED set, the 2MB page mapping was created - * by a promotion that did not invalidate the 512 4KB page mappings - * that might exist in the TLB. Consequently, at this point, the TLB - * may hold both 4KB and 2MB page mappings for the address range [va, - * va + L3_PAGE_SIZE). Therefore, the entire range must be invalidated here. - * In contrast, when PG_PROMOTED is clear, the TLB will not hold any - * 4KB page mappings for the address range [va, va + L3_PAGE_SIZE), and so a - * single INVLPG suffices to invalidate the 2MB page mapping from the - * TLB. - */ - ptesync(); - if ((l3e & PG_PROMOTED) != 0) - pmap_invalidate_range(pmap, va, va + L3_PAGE_SIZE - 1); - else - pmap_invalidate_page_2m(pmap, va); - - pmap_invalidate_pwc(pmap); -} - -static __inline struct pv_chunk * -pv_to_chunk(pv_entry_t pv) -{ - - return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK)); -} - -#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap) - -#define PC_FREE0 0xfffffffffffffffful -#define PC_FREE1 0x3ffffffffffffffful - -static const uint64_t pc_freemask[_NPCM] = { PC_FREE0, PC_FREE1 }; - -/* - * Ensure that the number of spare PV entries in the specified pmap meets or - * exceeds the given count, "needed". - * - * The given PV list lock may be released. - */ -static void -reserve_pv_entries(pmap_t pmap, int needed, struct rwlock **lockp) -{ - struct pch new_tail; - struct pv_chunk *pc; - vm_page_t m; - int avail, free; - bool reclaimed; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - KASSERT(lockp != NULL, ("reserve_pv_entries: lockp is NULL")); - - /* - * Newly allocated PV chunks must be stored in a private list until - * the required number of PV chunks have been allocated. Otherwise, - * reclaim_pv_chunk() could recycle one of these chunks. In - * contrast, these chunks must be added to the pmap upon allocation. - */ - TAILQ_INIT(&new_tail); -retry: - avail = 0; - TAILQ_FOREACH(pc, &pmap->pm_pvchunk, pc_list) { - // if ((cpu_feature2 & CPUID2_POPCNT) == 0) - bit_count((bitstr_t *)pc->pc_map, 0, - sizeof(pc->pc_map) * NBBY, &free); -#if 0 - free = popcnt_pc_map_pq(pc->pc_map); -#endif - if (free == 0) - break; - avail += free; - if (avail >= needed) - break; - } - for (reclaimed = false; avail < needed; avail += _NPCPV) { - m = vm_page_alloc_noobj(VM_ALLOC_WIRED); - if (m == NULL) { - m = reclaim_pv_chunk(pmap, lockp); - if (m == NULL) - goto retry; - reclaimed = true; - } - PV_STAT(atomic_add_int(&pc_chunk_count, 1)); - PV_STAT(atomic_add_int(&pc_chunk_allocs, 1)); - dump_add_page(m->phys_addr); - pc = (void *)PHYS_TO_DMAP(m->phys_addr); - pc->pc_pmap = pmap; - pc->pc_map[0] = PC_FREE0; - pc->pc_map[1] = PC_FREE1; - TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); - TAILQ_INSERT_TAIL(&new_tail, pc, pc_lru); - PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV)); - - /* - * The reclaim might have freed a chunk from the current pmap. - * If that chunk contained available entries, we need to - * re-count the number of available entries. - */ - if (reclaimed) - goto retry; - } - if (!TAILQ_EMPTY(&new_tail)) { - mtx_lock(&pv_chunks_mutex); - TAILQ_CONCAT(&pv_chunks, &new_tail, pc_lru); - mtx_unlock(&pv_chunks_mutex); - } -} - -/* - * First find and then remove the pv entry for the specified pmap and virtual - * address from the specified pv list. Returns the pv entry if found and NULL - * otherwise. This operation can be performed on pv lists for either 4KB or - * 2MB page mappings. - */ -static __inline pv_entry_t -pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va) -{ - pv_entry_t pv; - - TAILQ_FOREACH(pv, &pvh->pv_list, pv_link) { -#ifdef INVARIANTS - if (PV_PMAP(pv) == NULL) { - printf("corrupted pv_chunk/pv %p\n", pv); - printf("pv_chunk: %64D\n", pv_to_chunk(pv), ":"); - } - MPASS(PV_PMAP(pv) != NULL); - MPASS(pv->pv_va != 0); -#endif - if (pmap == PV_PMAP(pv) && va == pv->pv_va) { - TAILQ_REMOVE(&pvh->pv_list, pv, pv_link); - pvh->pv_gen++; - break; - } - } - return (pv); -} - -/* - * After demotion from a 2MB page mapping to 512 4KB page mappings, - * destroy the pv entry for the 2MB page mapping and reinstantiate the pv - * entries for each of the 4KB page mappings. - */ -static void -pmap_pv_demote_l3e(pmap_t pmap, vm_offset_t va, vm_paddr_t pa, - struct rwlock **lockp) -{ - struct md_page *pvh; - struct pv_chunk *pc; - pv_entry_t pv; - vm_offset_t va_last; - vm_page_t m; - int bit, field; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - KASSERT((pa & L3_PAGE_MASK) == 0, - ("pmap_pv_demote_pde: pa is not 2mpage aligned")); - CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa); - - /* - * Transfer the 2mpage's pv entry for this mapping to the first - * page's pv list. Once this transfer begins, the pv list lock - * must not be released until the last pv entry is reinstantiated. - */ - pvh = pa_to_pvh(pa); - va = trunc_2mpage(va); - pv = pmap_pvh_remove(pvh, pmap, va); - KASSERT(pv != NULL, ("pmap_pv_demote_pde: pv not found")); - m = PHYS_TO_VM_PAGE(pa); - TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_link); - - m->md.pv_gen++; - /* Instantiate the remaining NPTEPG - 1 pv entries. */ - PV_STAT(atomic_add_long(&pv_entry_allocs, NPTEPG - 1)); - va_last = va + L3_PAGE_SIZE - PAGE_SIZE; - for (;;) { - pc = TAILQ_FIRST(&pmap->pm_pvchunk); - KASSERT(pc->pc_map[0] != 0 || pc->pc_map[1] != 0 - , ("pmap_pv_demote_pde: missing spare")); - for (field = 0; field < _NPCM; field++) { - while (pc->pc_map[field]) { - bit = cnttzd(pc->pc_map[field]); - pc->pc_map[field] &= ~(1ul << bit); - pv = &pc->pc_pventry[field * 64 + bit]; - va += PAGE_SIZE; - pv->pv_va = va; - m++; - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("pmap_pv_demote_pde: page %p is not managed", m)); - TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_link); - - m->md.pv_gen++; - if (va == va_last) - goto out; - } - } - TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); - TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); - } -out: - if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0) { - TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); - TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); - } - PV_STAT(atomic_add_long(&pv_entry_count, NPTEPG - 1)); - PV_STAT(atomic_subtract_int(&pv_entry_spare, NPTEPG - 1)); -} - -static void -reclaim_pv_chunk_leave_pmap(pmap_t pmap, pmap_t locked_pmap) -{ - - if (pmap == NULL) - return; - pmap_invalidate_all(pmap); - if (pmap != locked_pmap) - PMAP_UNLOCK(pmap); -} - -/* - * We are in a serious low memory condition. Resort to - * drastic measures to free some pages so we can allocate - * another pv entry chunk. - * - * Returns NULL if PV entries were reclaimed from the specified pmap. - * - * We do not, however, unmap 2mpages because subsequent accesses will - * allocate per-page pv entries until repromotion occurs, thereby - * exacerbating the shortage of free pv entries. - */ -static int active_reclaims = 0; -static vm_page_t -reclaim_pv_chunk(pmap_t locked_pmap, struct rwlock **lockp) -{ - struct pv_chunk *pc, *pc_marker, *pc_marker_end; - struct pv_chunk_header pc_marker_b, pc_marker_end_b; - struct md_page *pvh; - pml3_entry_t *l3e; - pmap_t next_pmap, pmap; - pt_entry_t *pte, tpte; - pv_entry_t pv; - vm_offset_t va; - vm_page_t m, m_pc; - struct spglist free; - uint64_t inuse; - int bit, field, freed; - - PMAP_LOCK_ASSERT(locked_pmap, MA_OWNED); - KASSERT(lockp != NULL, ("reclaim_pv_chunk: lockp is NULL")); - pmap = NULL; - m_pc = NULL; - SLIST_INIT(&free); - bzero(&pc_marker_b, sizeof(pc_marker_b)); - bzero(&pc_marker_end_b, sizeof(pc_marker_end_b)); - pc_marker = (struct pv_chunk *)&pc_marker_b; - pc_marker_end = (struct pv_chunk *)&pc_marker_end_b; - - mtx_lock(&pv_chunks_mutex); - active_reclaims++; - TAILQ_INSERT_HEAD(&pv_chunks, pc_marker, pc_lru); - TAILQ_INSERT_TAIL(&pv_chunks, pc_marker_end, pc_lru); - while ((pc = TAILQ_NEXT(pc_marker, pc_lru)) != pc_marker_end && - SLIST_EMPTY(&free)) { - next_pmap = pc->pc_pmap; - if (next_pmap == NULL) { - /* - * The next chunk is a marker. However, it is - * not our marker, so active_reclaims must be - * > 1. Consequently, the next_chunk code - * will not rotate the pv_chunks list. - */ - goto next_chunk; - } - mtx_unlock(&pv_chunks_mutex); - - /* - * A pv_chunk can only be removed from the pc_lru list - * when both pc_chunks_mutex is owned and the - * corresponding pmap is locked. - */ - if (pmap != next_pmap) { - reclaim_pv_chunk_leave_pmap(pmap, locked_pmap); - pmap = next_pmap; - /* Avoid deadlock and lock recursion. */ - if (pmap > locked_pmap) { - RELEASE_PV_LIST_LOCK(lockp); - PMAP_LOCK(pmap); - mtx_lock(&pv_chunks_mutex); - continue; - } else if (pmap != locked_pmap) { - if (PMAP_TRYLOCK(pmap)) { - mtx_lock(&pv_chunks_mutex); - continue; - } else { - pmap = NULL; /* pmap is not locked */ - mtx_lock(&pv_chunks_mutex); - pc = TAILQ_NEXT(pc_marker, pc_lru); - if (pc == NULL || - pc->pc_pmap != next_pmap) - continue; - goto next_chunk; - } - } - } - - /* - * Destroy every non-wired, 4 KB page mapping in the chunk. - */ - freed = 0; - for (field = 0; field < _NPCM; field++) { - for (inuse = ~pc->pc_map[field] & pc_freemask[field]; - inuse != 0; inuse &= ~(1UL << bit)) { - bit = cnttzd(inuse); - pv = &pc->pc_pventry[field * 64 + bit]; - va = pv->pv_va; - l3e = pmap_pml3e(pmap, va); - if ((be64toh(*l3e) & RPTE_LEAF) != 0) - continue; - pte = pmap_l3e_to_pte(l3e, va); - if ((be64toh(*pte) & PG_W) != 0) - continue; - tpte = be64toh(pte_load_clear(pte)); - m = PHYS_TO_VM_PAGE(tpte & PG_FRAME); - if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) - vm_page_dirty(m); - if ((tpte & PG_A) != 0) - vm_page_aflag_set(m, PGA_REFERENCED); - CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m); - TAILQ_REMOVE(&m->md.pv_list, pv, pv_link); - - m->md.pv_gen++; - if (TAILQ_EMPTY(&m->md.pv_list) && - (m->flags & PG_FICTITIOUS) == 0) { - pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); - if (TAILQ_EMPTY(&pvh->pv_list)) { - vm_page_aflag_clear(m, - PGA_WRITEABLE); - } - } - pc->pc_map[field] |= 1UL << bit; - pmap_unuse_pt(pmap, va, be64toh(*l3e), &free); - freed++; - } - } - if (freed == 0) { - mtx_lock(&pv_chunks_mutex); - goto next_chunk; - } - /* Every freed mapping is for a 4 KB page. */ - pmap_resident_count_dec(pmap, freed); - PV_STAT(atomic_add_long(&pv_entry_frees, freed)); - PV_STAT(atomic_add_int(&pv_entry_spare, freed)); - PV_STAT(atomic_subtract_long(&pv_entry_count, freed)); - TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); - if (pc->pc_map[0] == PC_FREE0 && pc->pc_map[1] == PC_FREE1) { - PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV)); - PV_STAT(atomic_subtract_int(&pc_chunk_count, 1)); - PV_STAT(atomic_add_int(&pc_chunk_frees, 1)); - /* Entire chunk is free; return it. */ - m_pc = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc)); - dump_drop_page(m_pc->phys_addr); - mtx_lock(&pv_chunks_mutex); - TAILQ_REMOVE(&pv_chunks, pc, pc_lru); - break; - } - TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); - mtx_lock(&pv_chunks_mutex); - /* One freed pv entry in locked_pmap is sufficient. */ - if (pmap == locked_pmap) - break; -next_chunk: - TAILQ_REMOVE(&pv_chunks, pc_marker, pc_lru); - TAILQ_INSERT_AFTER(&pv_chunks, pc, pc_marker, pc_lru); - if (active_reclaims == 1 && pmap != NULL) { - /* - * Rotate the pv chunks list so that we do not - * scan the same pv chunks that could not be - * freed (because they contained a wired - * and/or superpage mapping) on every - * invocation of reclaim_pv_chunk(). - */ - while ((pc = TAILQ_FIRST(&pv_chunks)) != pc_marker) { - MPASS(pc->pc_pmap != NULL); - TAILQ_REMOVE(&pv_chunks, pc, pc_lru); - TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru); - } - } - } - TAILQ_REMOVE(&pv_chunks, pc_marker, pc_lru); - TAILQ_REMOVE(&pv_chunks, pc_marker_end, pc_lru); - active_reclaims--; - mtx_unlock(&pv_chunks_mutex); - reclaim_pv_chunk_leave_pmap(pmap, locked_pmap); - if (m_pc == NULL && !SLIST_EMPTY(&free)) { - m_pc = SLIST_FIRST(&free); - SLIST_REMOVE_HEAD(&free, plinks.s.ss); - /* Recycle a freed page table page. */ - m_pc->ref_count = 1; - } - vm_page_free_pages_toq(&free, true); - return (m_pc); -} - -/* - * free the pv_entry back to the free list - */ -static void -free_pv_entry(pmap_t pmap, pv_entry_t pv) -{ - struct pv_chunk *pc; - int idx, field, bit; - -#ifdef VERBOSE_PV - if (pmap != kernel_pmap) - printf("%s(%p, %p)\n", __func__, pmap, pv); -#endif - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - PV_STAT(atomic_add_long(&pv_entry_frees, 1)); - PV_STAT(atomic_add_int(&pv_entry_spare, 1)); - PV_STAT(atomic_subtract_long(&pv_entry_count, 1)); - pc = pv_to_chunk(pv); - idx = pv - &pc->pc_pventry[0]; - field = idx / 64; - bit = idx % 64; - pc->pc_map[field] |= 1ul << bit; - if (pc->pc_map[0] != PC_FREE0 || pc->pc_map[1] != PC_FREE1) { - /* 98% of the time, pc is already at the head of the list. */ - if (__predict_false(pc != TAILQ_FIRST(&pmap->pm_pvchunk))) { - TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); - TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); - } - return; - } - TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); - free_pv_chunk(pc); -} - -static void -free_pv_chunk(struct pv_chunk *pc) -{ - vm_page_t m; - - mtx_lock(&pv_chunks_mutex); - TAILQ_REMOVE(&pv_chunks, pc, pc_lru); - mtx_unlock(&pv_chunks_mutex); - PV_STAT(atomic_subtract_int(&pv_entry_spare, _NPCPV)); - PV_STAT(atomic_subtract_int(&pc_chunk_count, 1)); - PV_STAT(atomic_add_int(&pc_chunk_frees, 1)); - /* entire chunk is free, return it */ - m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)pc)); - dump_drop_page(m->phys_addr); - vm_page_unwire_noq(m); - vm_page_free(m); -} - -/* - * Returns a new PV entry, allocating a new PV chunk from the system when - * needed. If this PV chunk allocation fails and a PV list lock pointer was - * given, a PV chunk is reclaimed from an arbitrary pmap. Otherwise, NULL is - * returned. - * - * The given PV list lock may be released. - */ -static pv_entry_t -get_pv_entry(pmap_t pmap, struct rwlock **lockp) -{ - int bit, field; - pv_entry_t pv; - struct pv_chunk *pc; - vm_page_t m; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - PV_STAT(atomic_add_long(&pv_entry_allocs, 1)); -retry: - pc = TAILQ_FIRST(&pmap->pm_pvchunk); - if (pc != NULL) { - for (field = 0; field < _NPCM; field++) { - if (pc->pc_map[field]) { - bit = cnttzd(pc->pc_map[field]); - break; - } - } - if (field < _NPCM) { - pv = &pc->pc_pventry[field * 64 + bit]; - pc->pc_map[field] &= ~(1ul << bit); - /* If this was the last item, move it to tail */ - if (pc->pc_map[0] == 0 && pc->pc_map[1] == 0) { - TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); - TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, - pc_list); - } - PV_STAT(atomic_add_long(&pv_entry_count, 1)); - PV_STAT(atomic_subtract_int(&pv_entry_spare, 1)); - MPASS(PV_PMAP(pv) != NULL); - return (pv); - } - } - /* No free items, allocate another chunk */ - m = vm_page_alloc_noobj(VM_ALLOC_WIRED); - if (m == NULL) { - if (lockp == NULL) { - PV_STAT(pc_chunk_tryfail++); - return (NULL); - } - m = reclaim_pv_chunk(pmap, lockp); - if (m == NULL) - goto retry; - } - PV_STAT(atomic_add_int(&pc_chunk_count, 1)); - PV_STAT(atomic_add_int(&pc_chunk_allocs, 1)); - dump_add_page(m->phys_addr); - pc = (void *)PHYS_TO_DMAP(m->phys_addr); - pc->pc_pmap = pmap; - pc->pc_map[0] = PC_FREE0 & ~1ul; /* preallocated bit 0 */ - pc->pc_map[1] = PC_FREE1; - mtx_lock(&pv_chunks_mutex); - TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru); - mtx_unlock(&pv_chunks_mutex); - pv = &pc->pc_pventry[0]; - TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); - PV_STAT(atomic_add_long(&pv_entry_count, 1)); - PV_STAT(atomic_add_int(&pv_entry_spare, _NPCPV - 1)); - MPASS(PV_PMAP(pv) != NULL); - return (pv); -} - -#if VM_NRESERVLEVEL > 0 -/* - * After promotion from 512 4KB page mappings to a single 2MB page mapping, - * replace the many pv entries for the 4KB page mappings by a single pv entry - * for the 2MB page mapping. - */ -static void -pmap_pv_promote_l3e(pmap_t pmap, vm_offset_t va, vm_paddr_t pa, - struct rwlock **lockp) -{ - struct md_page *pvh; - pv_entry_t pv; - vm_offset_t va_last; - vm_page_t m; - - KASSERT((pa & L3_PAGE_MASK) == 0, - ("pmap_pv_promote_pde: pa is not 2mpage aligned")); - CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa); - - /* - * Transfer the first page's pv entry for this mapping to the 2mpage's - * pv list. Aside from avoiding the cost of a call to get_pv_entry(), - * a transfer avoids the possibility that get_pv_entry() calls - * reclaim_pv_chunk() and that reclaim_pv_chunk() removes one of the - * mappings that is being promoted. - */ - m = PHYS_TO_VM_PAGE(pa); - va = trunc_2mpage(va); - pv = pmap_pvh_remove(&m->md, pmap, va); - KASSERT(pv != NULL, ("pmap_pv_promote_pde: pv not found")); - pvh = pa_to_pvh(pa); - TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_link); - pvh->pv_gen++; - /* Free the remaining NPTEPG - 1 pv entries. */ - va_last = va + L3_PAGE_SIZE - PAGE_SIZE; - do { - m++; - va += PAGE_SIZE; - pmap_pvh_free(&m->md, pmap, va); - } while (va < va_last); -} -#endif /* VM_NRESERVLEVEL > 0 */ - -/* - * First find and then destroy the pv entry for the specified pmap and virtual - * address. This operation can be performed on pv lists for either 4KB or 2MB - * page mappings. - */ -static void -pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va) -{ - pv_entry_t pv; - - pv = pmap_pvh_remove(pvh, pmap, va); - KASSERT(pv != NULL, ("pmap_pvh_free: pv not found")); - free_pv_entry(pmap, pv); -} - -/* - * Conditionally create the PV entry for a 4KB page mapping if the required - * memory can be allocated without resorting to reclamation. - */ -static boolean_t -pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m, - struct rwlock **lockp) -{ - pv_entry_t pv; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - /* Pass NULL instead of the lock pointer to disable reclamation. */ - if ((pv = get_pv_entry(pmap, NULL)) != NULL) { - pv->pv_va = va; - CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m); - TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_link); - m->md.pv_gen++; - return (TRUE); - } else - return (FALSE); -} - -vm_paddr_t phys_avail_debug[2 * VM_PHYSSEG_MAX]; -#ifdef INVARIANTS -static void -validate_addr(vm_paddr_t addr, vm_size_t size) -{ - vm_paddr_t end = addr + size; - bool found = false; - - for (int i = 0; i < 2 * phys_avail_count; i += 2) { - if (addr >= phys_avail_debug[i] && - end <= phys_avail_debug[i + 1]) { - found = true; - break; - } - } - KASSERT(found, ("%#lx-%#lx outside of initial phys_avail array", - addr, end)); -} -#else -static void validate_addr(vm_paddr_t addr, vm_size_t size) {} -#endif -#define DMAP_PAGE_BITS (RPTE_VALID | RPTE_LEAF | RPTE_EAA_MASK | PG_M | PG_A) - -static vm_paddr_t -alloc_pt_page(void) -{ - vm_paddr_t page; - - page = allocpages(1); - pagezero(PHYS_TO_DMAP(page)); - return (page); -} - -static void -mmu_radix_dmap_range(vm_paddr_t start, vm_paddr_t end) -{ - pt_entry_t *pte, pteval; - vm_paddr_t page; - - if (bootverbose) - printf("%s %lx -> %lx\n", __func__, start, end); - while (start < end) { - pteval = start | DMAP_PAGE_BITS; - pte = pmap_pml1e(kernel_pmap, PHYS_TO_DMAP(start)); - if ((be64toh(*pte) & RPTE_VALID) == 0) { - page = alloc_pt_page(); - pde_store(pte, page); - } - pte = pmap_l1e_to_l2e(pte, PHYS_TO_DMAP(start)); - if ((start & L2_PAGE_MASK) == 0 && - end - start >= L2_PAGE_SIZE) { - start += L2_PAGE_SIZE; - goto done; - } else if ((be64toh(*pte) & RPTE_VALID) == 0) { - page = alloc_pt_page(); - pde_store(pte, page); - } - - pte = pmap_l2e_to_l3e(pte, PHYS_TO_DMAP(start)); - if ((start & L3_PAGE_MASK) == 0 && - end - start >= L3_PAGE_SIZE) { - start += L3_PAGE_SIZE; - goto done; - } else if ((be64toh(*pte) & RPTE_VALID) == 0) { - page = alloc_pt_page(); - pde_store(pte, page); - } - pte = pmap_l3e_to_pte(pte, PHYS_TO_DMAP(start)); - start += PAGE_SIZE; - done: - pte_store(pte, pteval); - } -} - -static void -mmu_radix_dmap_populate(vm_size_t hwphyssz) -{ - vm_paddr_t start, end; - - for (int i = 0; i < pregions_sz; i++) { - start = pregions[i].mr_start; - end = start + pregions[i].mr_size; - if (hwphyssz && start >= hwphyssz) - break; - if (hwphyssz && hwphyssz < end) - end = hwphyssz; - mmu_radix_dmap_range(start, end); - } -} - -static void -mmu_radix_setup_pagetables(vm_size_t hwphyssz) -{ - vm_paddr_t ptpages, pages; - pt_entry_t *pte; - vm_paddr_t l1phys; - - bzero(kernel_pmap, sizeof(struct pmap)); - PMAP_LOCK_INIT(kernel_pmap); - - ptpages = allocpages(3); - l1phys = moea64_bootstrap_alloc(RADIX_PGD_SIZE, RADIX_PGD_SIZE); - validate_addr(l1phys, RADIX_PGD_SIZE); - if (bootverbose) - printf("l1phys=%lx\n", l1phys); - MPASS((l1phys & (RADIX_PGD_SIZE-1)) == 0); - for (int i = 0; i < RADIX_PGD_SIZE/PAGE_SIZE; i++) - pagezero(PHYS_TO_DMAP(l1phys + i * PAGE_SIZE)); - kernel_pmap->pm_pml1 = (pml1_entry_t *)PHYS_TO_DMAP(l1phys); - - mmu_radix_dmap_populate(hwphyssz); - - /* - * Create page tables for first 128MB of KVA - */ - pages = ptpages; - pte = pmap_pml1e(kernel_pmap, VM_MIN_KERNEL_ADDRESS); - *pte = htobe64(pages | RPTE_VALID | RPTE_SHIFT); - pages += PAGE_SIZE; - pte = pmap_l1e_to_l2e(pte, VM_MIN_KERNEL_ADDRESS); - *pte = htobe64(pages | RPTE_VALID | RPTE_SHIFT); - pages += PAGE_SIZE; - pte = pmap_l2e_to_l3e(pte, VM_MIN_KERNEL_ADDRESS); - /* - * the kernel page table pages need to be preserved in - * phys_avail and not overlap with previous allocations - */ - pages = allocpages(nkpt); - if (bootverbose) { - printf("phys_avail after dmap populate and nkpt allocation\n"); - for (int j = 0; j < 2 * phys_avail_count; j+=2) - printf("phys_avail[%d]=%08lx - phys_avail[%d]=%08lx\n", - j, phys_avail[j], j + 1, phys_avail[j + 1]); - } - KPTphys = pages; - for (int i = 0; i < nkpt; i++, pte++, pages += PAGE_SIZE) - *pte = htobe64(pages | RPTE_VALID | RPTE_SHIFT); - kernel_vm_end = VM_MIN_KERNEL_ADDRESS + nkpt * L3_PAGE_SIZE; - if (bootverbose) - printf("kernel_pmap pml1 %p\n", kernel_pmap->pm_pml1); - /* - * Add a physical memory segment (vm_phys_seg) corresponding to the - * preallocated kernel page table pages so that vm_page structures - * representing these pages will be created. The vm_page structures - * are required for promotion of the corresponding kernel virtual - * addresses to superpage mappings. - */ - vm_phys_add_seg(KPTphys, KPTphys + ptoa(nkpt)); -} - -static void -mmu_radix_early_bootstrap(vm_offset_t start, vm_offset_t end) -{ - vm_paddr_t kpstart, kpend; - vm_size_t physsz, hwphyssz; - //uint64_t l2virt; - int rm_pavail, proctab_size; - int i, j; - - kpstart = start & ~DMAP_BASE_ADDRESS; - kpend = end & ~DMAP_BASE_ADDRESS; - - /* Get physical memory regions from firmware */ - mem_regions(&pregions, &pregions_sz, ®ions, ®ions_sz); - CTR0(KTR_PMAP, "mmu_radix_early_bootstrap: physical memory"); - - if (2 * VM_PHYSSEG_MAX < regions_sz) - panic("mmu_radix_early_bootstrap: phys_avail too small"); - - if (bootverbose) - for (int i = 0; i < regions_sz; i++) - printf("regions[%d].mr_start=%lx regions[%d].mr_size=%lx\n", - i, regions[i].mr_start, i, regions[i].mr_size); - /* - * XXX workaround a simulator bug - */ - for (int i = 0; i < regions_sz; i++) - if (regions[i].mr_start & PAGE_MASK) { - regions[i].mr_start += PAGE_MASK; - regions[i].mr_start &= ~PAGE_MASK; - regions[i].mr_size &= ~PAGE_MASK; - } - if (bootverbose) - for (int i = 0; i < pregions_sz; i++) - printf("pregions[%d].mr_start=%lx pregions[%d].mr_size=%lx\n", - i, pregions[i].mr_start, i, pregions[i].mr_size); - - phys_avail_count = 0; - physsz = 0; - hwphyssz = 0; - TUNABLE_ULONG_FETCH("hw.physmem", (u_long *) &hwphyssz); - for (i = 0, j = 0; i < regions_sz; i++) { - if (bootverbose) - printf("regions[%d].mr_start=%016lx regions[%d].mr_size=%016lx\n", - i, regions[i].mr_start, i, regions[i].mr_size); - - if (regions[i].mr_size < PAGE_SIZE) - continue; - - if (hwphyssz != 0 && - (physsz + regions[i].mr_size) >= hwphyssz) { - if (physsz < hwphyssz) { - phys_avail[j] = regions[i].mr_start; - phys_avail[j + 1] = regions[i].mr_start + - (hwphyssz - physsz); - physsz = hwphyssz; - phys_avail_count++; - dump_avail[j] = phys_avail[j]; - dump_avail[j + 1] = phys_avail[j + 1]; - } - break; - } - phys_avail[j] = regions[i].mr_start; - phys_avail[j + 1] = regions[i].mr_start + regions[i].mr_size; - dump_avail[j] = phys_avail[j]; - dump_avail[j + 1] = phys_avail[j + 1]; - - phys_avail_count++; - physsz += regions[i].mr_size; - j += 2; - } - - /* Check for overlap with the kernel and exception vectors */ - rm_pavail = 0; - for (j = 0; j < 2 * phys_avail_count; j+=2) { - if (phys_avail[j] < EXC_LAST) - phys_avail[j] += EXC_LAST; - - if (phys_avail[j] >= kpstart && - phys_avail[j + 1] <= kpend) { - phys_avail[j] = phys_avail[j + 1] = ~0; - rm_pavail++; - continue; - } - - if (kpstart >= phys_avail[j] && - kpstart < phys_avail[j + 1]) { - if (kpend < phys_avail[j + 1]) { - phys_avail[2 * phys_avail_count] = - (kpend & ~PAGE_MASK) + PAGE_SIZE; - phys_avail[2 * phys_avail_count + 1] = - phys_avail[j + 1]; - phys_avail_count++; - } - - phys_avail[j + 1] = kpstart & ~PAGE_MASK; - } - - if (kpend >= phys_avail[j] && - kpend < phys_avail[j + 1]) { - if (kpstart > phys_avail[j]) { - phys_avail[2 * phys_avail_count] = phys_avail[j]; - phys_avail[2 * phys_avail_count + 1] = - kpstart & ~PAGE_MASK; - phys_avail_count++; - } - - phys_avail[j] = (kpend & ~PAGE_MASK) + - PAGE_SIZE; - } - } - qsort(phys_avail, 2 * phys_avail_count, sizeof(phys_avail[0]), pa_cmp); - for (i = 0; i < 2 * phys_avail_count; i++) - phys_avail_debug[i] = phys_avail[i]; - - /* Remove physical available regions marked for removal (~0) */ - if (rm_pavail) { - phys_avail_count -= rm_pavail; - for (i = 2 * phys_avail_count; - i < 2*(phys_avail_count + rm_pavail); i+=2) - phys_avail[i] = phys_avail[i + 1] = 0; - } - if (bootverbose) { - printf("phys_avail ranges after filtering:\n"); - for (j = 0; j < 2 * phys_avail_count; j+=2) - printf("phys_avail[%d]=%08lx - phys_avail[%d]=%08lx\n", - j, phys_avail[j], j + 1, phys_avail[j + 1]); - } - physmem = btoc(physsz); - - /* XXX assume we're running non-virtualized and - * we don't support BHYVE - */ - if (isa3_pid_bits == 0) - isa3_pid_bits = 20; - if (powernv_enabled) { - parttab_phys = - moea64_bootstrap_alloc(PARTTAB_SIZE, PARTTAB_SIZE); - validate_addr(parttab_phys, PARTTAB_SIZE); - for (int i = 0; i < PARTTAB_SIZE/PAGE_SIZE; i++) - pagezero(PHYS_TO_DMAP(parttab_phys + i * PAGE_SIZE)); - - } - proctab_size = 1UL << PROCTAB_SIZE_SHIFT; - proctab0pa = moea64_bootstrap_alloc(proctab_size, proctab_size); - validate_addr(proctab0pa, proctab_size); - for (int i = 0; i < proctab_size/PAGE_SIZE; i++) - pagezero(PHYS_TO_DMAP(proctab0pa + i * PAGE_SIZE)); - - mmu_radix_setup_pagetables(hwphyssz); -} - -static void -mmu_radix_late_bootstrap(vm_offset_t start, vm_offset_t end) -{ - int i; - vm_paddr_t pa; - void *dpcpu; - vm_offset_t va; - - /* - * Set up the Open Firmware pmap and add its mappings if not in real - * mode. - */ - if (bootverbose) - printf("%s enter\n", __func__); - - /* - * Calculate the last available physical address, and reserve the - * vm_page_array (upper bound). - */ - Maxmem = 0; - for (i = 0; phys_avail[i + 1] != 0; i += 2) - Maxmem = MAX(Maxmem, powerpc_btop(phys_avail[i + 1])); - - /* - * Remap any early IO mappings (console framebuffer, etc.) - */ - bs_remap_earlyboot(); - - /* - * Allocate a kernel stack with a guard page for thread0 and map it - * into the kernel page map. - */ - pa = allocpages(kstack_pages); - va = virtual_avail + KSTACK_GUARD_PAGES * PAGE_SIZE; - virtual_avail = va + kstack_pages * PAGE_SIZE; - CTR2(KTR_PMAP, "moea64_bootstrap: kstack0 at %#x (%#x)", pa, va); - thread0.td_kstack = va; - for (i = 0; i < kstack_pages; i++) { - mmu_radix_kenter(va, pa); - pa += PAGE_SIZE; - va += PAGE_SIZE; - } - thread0.td_kstack_pages = kstack_pages; - - /* - * Allocate virtual address space for the message buffer. - */ - pa = msgbuf_phys = allocpages((msgbufsize + PAGE_MASK) >> PAGE_SHIFT); - msgbufp = (struct msgbuf *)PHYS_TO_DMAP(pa); - - /* - * Allocate virtual address space for the dynamic percpu area. - */ - pa = allocpages(DPCPU_SIZE >> PAGE_SHIFT); - dpcpu = (void *)PHYS_TO_DMAP(pa); - dpcpu_init(dpcpu, curcpu); - - crashdumpmap = (caddr_t)virtual_avail; - virtual_avail += MAXDUMPPGS * PAGE_SIZE; - - /* - * Reserve some special page table entries/VA space for temporary - * mapping of pages. - */ -} - -static void -mmu_parttab_init(void) -{ - uint64_t ptcr; - - isa3_parttab = (struct pate *)PHYS_TO_DMAP(parttab_phys); - - if (bootverbose) - printf("%s parttab: %p\n", __func__, isa3_parttab); - ptcr = parttab_phys | (PARTTAB_SIZE_SHIFT-12); - if (bootverbose) - printf("setting ptcr %lx\n", ptcr); - mtspr(SPR_PTCR, ptcr); -} - -static void -mmu_parttab_update(uint64_t lpid, uint64_t pagetab, uint64_t proctab) -{ - uint64_t prev; - - if (bootverbose) - printf("%s isa3_parttab %p lpid %lx pagetab %lx proctab %lx\n", __func__, isa3_parttab, - lpid, pagetab, proctab); - prev = be64toh(isa3_parttab[lpid].pagetab); - isa3_parttab[lpid].pagetab = htobe64(pagetab); - isa3_parttab[lpid].proctab = htobe64(proctab); - - if (prev & PARTTAB_HR) { - __asm __volatile(PPC_TLBIE_5(%0,%1,2,0,1) : : - "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid)); - __asm __volatile(PPC_TLBIE_5(%0,%1,2,1,1) : : - "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid)); - } else { - __asm __volatile(PPC_TLBIE_5(%0,%1,2,0,0) : : - "r" (TLBIEL_INVAL_SET_LPID), "r" (lpid)); - } - ttusync(); -} - -static void -mmu_radix_parttab_init(void) -{ - uint64_t pagetab; - - mmu_parttab_init(); - pagetab = RTS_SIZE | DMAP_TO_PHYS((vm_offset_t)kernel_pmap->pm_pml1) | \ - RADIX_PGD_INDEX_SHIFT | PARTTAB_HR; - mmu_parttab_update(0, pagetab, 0); -} - -static void -mmu_radix_proctab_register(vm_paddr_t proctabpa, uint64_t table_size) -{ - uint64_t pagetab, proctab; - - pagetab = be64toh(isa3_parttab[0].pagetab); - proctab = proctabpa | table_size | PARTTAB_GR; - mmu_parttab_update(0, pagetab, proctab); -} - -static void -mmu_radix_proctab_init(void) -{ - - isa3_base_pid = 1; - - isa3_proctab = (void*)PHYS_TO_DMAP(proctab0pa); - isa3_proctab->proctab0 = - htobe64(RTS_SIZE | DMAP_TO_PHYS((vm_offset_t)kernel_pmap->pm_pml1) | - RADIX_PGD_INDEX_SHIFT); - - if (powernv_enabled) { - mmu_radix_proctab_register(proctab0pa, PROCTAB_SIZE_SHIFT - 12); - __asm __volatile("ptesync" : : : "memory"); - __asm __volatile(PPC_TLBIE_5(%0,%1,2,1,1) : : - "r" (TLBIEL_INVAL_SET_LPID), "r" (0)); - __asm __volatile("eieio; tlbsync; ptesync" : : : "memory"); -#ifdef PSERIES - } else { - int64_t rc; - - rc = phyp_hcall(H_REGISTER_PROC_TBL, - PROC_TABLE_NEW | PROC_TABLE_RADIX | PROC_TABLE_GTSE, - proctab0pa, 0, PROCTAB_SIZE_SHIFT - 12); - if (rc != H_SUCCESS) - panic("mmu_radix_proctab_init: " - "failed to register process table: rc=%jd", - (intmax_t)rc); -#endif - } - - if (bootverbose) - printf("process table %p and kernel radix PDE: %p\n", - isa3_proctab, kernel_pmap->pm_pml1); - mtmsr(mfmsr() | PSL_DR ); - mtmsr(mfmsr() & ~PSL_DR); - kernel_pmap->pm_pid = isa3_base_pid; - isa3_base_pid++; -} - -void -mmu_radix_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, - int advice) -{ - struct rwlock *lock; - pml1_entry_t *l1e; - pml2_entry_t *l2e; - pml3_entry_t oldl3e, *l3e; - pt_entry_t *pte; - vm_offset_t va, va_next; - vm_page_t m; - boolean_t anychanged; - - if (advice != MADV_DONTNEED && advice != MADV_FREE) - return; - anychanged = FALSE; - PMAP_LOCK(pmap); - for (; sva < eva; sva = va_next) { - l1e = pmap_pml1e(pmap, sva); - if ((be64toh(*l1e) & PG_V) == 0) { - va_next = (sva + L1_PAGE_SIZE) & ~L1_PAGE_MASK; - if (va_next < sva) - va_next = eva; - continue; - } - l2e = pmap_l1e_to_l2e(l1e, sva); - if ((be64toh(*l2e) & PG_V) == 0) { - va_next = (sva + L2_PAGE_SIZE) & ~L2_PAGE_MASK; - if (va_next < sva) - va_next = eva; - continue; - } - va_next = (sva + L3_PAGE_SIZE) & ~L3_PAGE_MASK; - if (va_next < sva) - va_next = eva; - l3e = pmap_l2e_to_l3e(l2e, sva); - oldl3e = be64toh(*l3e); - if ((oldl3e & PG_V) == 0) - continue; - else if ((oldl3e & RPTE_LEAF) != 0) { - if ((oldl3e & PG_MANAGED) == 0) - continue; - lock = NULL; - if (!pmap_demote_l3e_locked(pmap, l3e, sva, &lock)) { - if (lock != NULL) - rw_wunlock(lock); - - /* - * The large page mapping was destroyed. - */ - continue; - } - - /* - * Unless the page mappings are wired, remove the - * mapping to a single page so that a subsequent - * access may repromote. Since the underlying page - * table page is fully populated, this removal never - * frees a page table page. - */ - if ((oldl3e & PG_W) == 0) { - pte = pmap_l3e_to_pte(l3e, sva); - KASSERT((be64toh(*pte) & PG_V) != 0, - ("pmap_advise: invalid PTE")); - pmap_remove_pte(pmap, pte, sva, be64toh(*l3e), NULL, - &lock); - anychanged = TRUE; - } - if (lock != NULL) - rw_wunlock(lock); - } - if (va_next > eva) - va_next = eva; - va = va_next; - for (pte = pmap_l3e_to_pte(l3e, sva); sva != va_next; - pte++, sva += PAGE_SIZE) { - MPASS(pte == pmap_pte(pmap, sva)); - - if ((be64toh(*pte) & (PG_MANAGED | PG_V)) != (PG_MANAGED | PG_V)) - goto maybe_invlrng; - else if ((be64toh(*pte) & (PG_M | PG_RW)) == (PG_M | PG_RW)) { - if (advice == MADV_DONTNEED) { - /* - * Future calls to pmap_is_modified() - * can be avoided by making the page - * dirty now. - */ - m = PHYS_TO_VM_PAGE(be64toh(*pte) & PG_FRAME); - vm_page_dirty(m); - } - atomic_clear_long(pte, htobe64(PG_M | PG_A)); - } else if ((be64toh(*pte) & PG_A) != 0) - atomic_clear_long(pte, htobe64(PG_A)); - else - goto maybe_invlrng; - anychanged = TRUE; - continue; -maybe_invlrng: - if (va != va_next) { - anychanged = true; - va = va_next; - } - } - if (va != va_next) - anychanged = true; - } - if (anychanged) - pmap_invalidate_all(pmap); - PMAP_UNLOCK(pmap); -} - -/* - * Routines used in machine-dependent code - */ -static void -mmu_radix_bootstrap(vm_offset_t start, vm_offset_t end) -{ - uint64_t lpcr; - - if (bootverbose) - printf("%s\n", __func__); - hw_direct_map = 1; - powernv_enabled = (mfmsr() & PSL_HV) ? 1 : 0; - mmu_radix_early_bootstrap(start, end); - if (bootverbose) - printf("early bootstrap complete\n"); - if (powernv_enabled) { - lpcr = mfspr(SPR_LPCR); - mtspr(SPR_LPCR, lpcr | LPCR_UPRT | LPCR_HR); - mmu_radix_parttab_init(); - mmu_radix_init_amor(); - if (bootverbose) - printf("powernv init complete\n"); - } - mmu_radix_init_iamr(); - mmu_radix_proctab_init(); - mmu_radix_pid_set(kernel_pmap); - if (powernv_enabled) - mmu_radix_tlbiel_flush(TLB_INVAL_SCOPE_GLOBAL); - else - mmu_radix_tlbiel_flush(TLB_INVAL_SCOPE_LPID); - - mmu_radix_late_bootstrap(start, end); - numa_mem_regions(&numa_pregions, &numa_pregions_sz); - if (bootverbose) - printf("%s done\n", __func__); - pmap_bootstrapped = 1; - dmaplimit = roundup2(powerpc_ptob(Maxmem), L2_PAGE_SIZE); - PCPU_SET(flags, PCPU_GET(flags) | PC_FLAG_NOSRS); -} - -static void -mmu_radix_cpu_bootstrap(int ap) -{ - uint64_t lpcr; - uint64_t ptcr; - - if (powernv_enabled) { - lpcr = mfspr(SPR_LPCR); - mtspr(SPR_LPCR, lpcr | LPCR_UPRT | LPCR_HR); - - ptcr = parttab_phys | (PARTTAB_SIZE_SHIFT-12); - mtspr(SPR_PTCR, ptcr); - mmu_radix_init_amor(); - } - mmu_radix_init_iamr(); - mmu_radix_pid_set(kernel_pmap); - if (powernv_enabled) - mmu_radix_tlbiel_flush(TLB_INVAL_SCOPE_GLOBAL); - else - mmu_radix_tlbiel_flush(TLB_INVAL_SCOPE_LPID); -} - -static SYSCTL_NODE(_vm_pmap, OID_AUTO, l3e, CTLFLAG_RD, 0, - "2MB page mapping counters"); - -static u_long pmap_l3e_demotions; -SYSCTL_ULONG(_vm_pmap_l3e, OID_AUTO, demotions, CTLFLAG_RD, - &pmap_l3e_demotions, 0, "2MB page demotions"); - -static u_long pmap_l3e_mappings; -SYSCTL_ULONG(_vm_pmap_l3e, OID_AUTO, mappings, CTLFLAG_RD, - &pmap_l3e_mappings, 0, "2MB page mappings"); - -static u_long pmap_l3e_p_failures; -SYSCTL_ULONG(_vm_pmap_l3e, OID_AUTO, p_failures, CTLFLAG_RD, - &pmap_l3e_p_failures, 0, "2MB page promotion failures"); - -static u_long pmap_l3e_promotions; -SYSCTL_ULONG(_vm_pmap_l3e, OID_AUTO, promotions, CTLFLAG_RD, - &pmap_l3e_promotions, 0, "2MB page promotions"); - -static SYSCTL_NODE(_vm_pmap, OID_AUTO, l2e, CTLFLAG_RD, 0, - "1GB page mapping counters"); - -static u_long pmap_l2e_demotions; -SYSCTL_ULONG(_vm_pmap_l2e, OID_AUTO, demotions, CTLFLAG_RD, - &pmap_l2e_demotions, 0, "1GB page demotions"); - -void -mmu_radix_clear_modify(vm_page_t m) -{ - struct md_page *pvh; - pmap_t pmap; - pv_entry_t next_pv, pv; - pml3_entry_t oldl3e, *l3e; - pt_entry_t oldpte, *pte; - struct rwlock *lock; - vm_offset_t va; - int md_gen, pvh_gen; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("pmap_clear_modify: page %p is not managed", m)); - vm_page_assert_busied(m); - CTR2(KTR_PMAP, "%s(%p)", __func__, m); - - /* - * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set. - * If the object containing the page is locked and the page is not - * exclusive busied, then PGA_WRITEABLE cannot be concurrently set. - */ - if ((m->a.flags & PGA_WRITEABLE) == 0) - return; - pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : - pa_to_pvh(VM_PAGE_TO_PHYS(m)); - lock = VM_PAGE_TO_PV_LIST_LOCK(m); - rw_wlock(lock); -restart: - TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_link, next_pv) { - pmap = PV_PMAP(pv); - if (!PMAP_TRYLOCK(pmap)) { - pvh_gen = pvh->pv_gen; - rw_wunlock(lock); - PMAP_LOCK(pmap); - rw_wlock(lock); - if (pvh_gen != pvh->pv_gen) { - PMAP_UNLOCK(pmap); - goto restart; - } - } - va = pv->pv_va; - l3e = pmap_pml3e(pmap, va); - oldl3e = be64toh(*l3e); - if ((oldl3e & PG_RW) != 0) { - if (pmap_demote_l3e_locked(pmap, l3e, va, &lock)) { - if ((oldl3e & PG_W) == 0) { - /* - * Write protect the mapping to a - * single page so that a subsequent - * write access may repromote. - */ - va += VM_PAGE_TO_PHYS(m) - (oldl3e & - PG_PS_FRAME); - pte = pmap_l3e_to_pte(l3e, va); - oldpte = be64toh(*pte); - if ((oldpte & PG_V) != 0) { - while (!atomic_cmpset_long(pte, - htobe64(oldpte), - htobe64((oldpte | RPTE_EAA_R) & ~(PG_M | PG_RW)))) - oldpte = be64toh(*pte); - vm_page_dirty(m); - pmap_invalidate_page(pmap, va); - } - } - } - } - PMAP_UNLOCK(pmap); - } - TAILQ_FOREACH(pv, &m->md.pv_list, pv_link) { - pmap = PV_PMAP(pv); - if (!PMAP_TRYLOCK(pmap)) { - md_gen = m->md.pv_gen; - pvh_gen = pvh->pv_gen; - rw_wunlock(lock); - PMAP_LOCK(pmap); - rw_wlock(lock); - if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) { - PMAP_UNLOCK(pmap); - goto restart; - } - } - l3e = pmap_pml3e(pmap, pv->pv_va); - KASSERT((be64toh(*l3e) & RPTE_LEAF) == 0, ("pmap_clear_modify: found" - " a 2mpage in page %p's pv list", m)); - pte = pmap_l3e_to_pte(l3e, pv->pv_va); - if ((be64toh(*pte) & (PG_M | PG_RW)) == (PG_M | PG_RW)) { - atomic_clear_long(pte, htobe64(PG_M)); - pmap_invalidate_page(pmap, pv->pv_va); - } - PMAP_UNLOCK(pmap); - } - rw_wunlock(lock); -} - -void -mmu_radix_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, - vm_size_t len, vm_offset_t src_addr) -{ - struct rwlock *lock; - struct spglist free; - vm_offset_t addr; - vm_offset_t end_addr = src_addr + len; - vm_offset_t va_next; - vm_page_t dst_pdpg, dstmpte, srcmpte; - bool invalidate_all; - - CTR6(KTR_PMAP, - "%s(dst_pmap=%p, src_pmap=%p, dst_addr=%lx, len=%lu, src_addr=%lx)\n", - __func__, dst_pmap, src_pmap, dst_addr, len, src_addr); - - if (dst_addr != src_addr) - return; - lock = NULL; - invalidate_all = false; - if (dst_pmap < src_pmap) { - PMAP_LOCK(dst_pmap); - PMAP_LOCK(src_pmap); - } else { - PMAP_LOCK(src_pmap); - PMAP_LOCK(dst_pmap); - } - - for (addr = src_addr; addr < end_addr; addr = va_next) { - pml1_entry_t *l1e; - pml2_entry_t *l2e; - pml3_entry_t srcptepaddr, *l3e; - pt_entry_t *src_pte, *dst_pte; - - l1e = pmap_pml1e(src_pmap, addr); - if ((be64toh(*l1e) & PG_V) == 0) { - va_next = (addr + L1_PAGE_SIZE) & ~L1_PAGE_MASK; - if (va_next < addr) - va_next = end_addr; - continue; - } - - l2e = pmap_l1e_to_l2e(l1e, addr); - if ((be64toh(*l2e) & PG_V) == 0) { - va_next = (addr + L2_PAGE_SIZE) & ~L2_PAGE_MASK; - if (va_next < addr) - va_next = end_addr; - continue; - } - - va_next = (addr + L3_PAGE_SIZE) & ~L3_PAGE_MASK; - if (va_next < addr) - va_next = end_addr; - - l3e = pmap_l2e_to_l3e(l2e, addr); - srcptepaddr = be64toh(*l3e); - if (srcptepaddr == 0) - continue; - - if (srcptepaddr & RPTE_LEAF) { - if ((addr & L3_PAGE_MASK) != 0 || - addr + L3_PAGE_SIZE > end_addr) - continue; - dst_pdpg = pmap_allocl3e(dst_pmap, addr, NULL); - if (dst_pdpg == NULL) - break; - l3e = (pml3_entry_t *) - PHYS_TO_DMAP(VM_PAGE_TO_PHYS(dst_pdpg)); - l3e = &l3e[pmap_pml3e_index(addr)]; - if (be64toh(*l3e) == 0 && ((srcptepaddr & PG_MANAGED) == 0 || - pmap_pv_insert_l3e(dst_pmap, addr, srcptepaddr, - PMAP_ENTER_NORECLAIM, &lock))) { - *l3e = htobe64(srcptepaddr & ~PG_W); - pmap_resident_count_inc(dst_pmap, - L3_PAGE_SIZE / PAGE_SIZE); - atomic_add_long(&pmap_l3e_mappings, 1); - } else - dst_pdpg->ref_count--; - continue; - } - - srcptepaddr &= PG_FRAME; - srcmpte = PHYS_TO_VM_PAGE(srcptepaddr); - KASSERT(srcmpte->ref_count > 0, - ("pmap_copy: source page table page is unused")); - - if (va_next > end_addr) - va_next = end_addr; - - src_pte = (pt_entry_t *)PHYS_TO_DMAP(srcptepaddr); - src_pte = &src_pte[pmap_pte_index(addr)]; - dstmpte = NULL; - while (addr < va_next) { - pt_entry_t ptetemp; - ptetemp = be64toh(*src_pte); - /* - * we only virtual copy managed pages - */ - if ((ptetemp & PG_MANAGED) != 0) { - if (dstmpte != NULL && - dstmpte->pindex == pmap_l3e_pindex(addr)) - dstmpte->ref_count++; - else if ((dstmpte = pmap_allocpte(dst_pmap, - addr, NULL)) == NULL) - goto out; - dst_pte = (pt_entry_t *) - PHYS_TO_DMAP(VM_PAGE_TO_PHYS(dstmpte)); - dst_pte = &dst_pte[pmap_pte_index(addr)]; - if (be64toh(*dst_pte) == 0 && - pmap_try_insert_pv_entry(dst_pmap, addr, - PHYS_TO_VM_PAGE(ptetemp & PG_FRAME), - &lock)) { - /* - * Clear the wired, modified, and - * accessed (referenced) bits - * during the copy. - */ - *dst_pte = htobe64(ptetemp & ~(PG_W | PG_M | - PG_A)); - pmap_resident_count_inc(dst_pmap, 1); - } else { - SLIST_INIT(&free); - if (pmap_unwire_ptp(dst_pmap, addr, - dstmpte, &free)) { - /* - * Although "addr" is not - * mapped, paging-structure - * caches could nonetheless - * have entries that refer to - * the freed page table pages. - * Invalidate those entries. - */ - invalidate_all = true; - vm_page_free_pages_toq(&free, - true); - } - goto out; - } - if (dstmpte->ref_count >= srcmpte->ref_count) - break; - } - addr += PAGE_SIZE; - if (__predict_false((addr & L3_PAGE_MASK) == 0)) - src_pte = pmap_pte(src_pmap, addr); - else - src_pte++; - } - } -out: - if (invalidate_all) - pmap_invalidate_all(dst_pmap); - if (lock != NULL) - rw_wunlock(lock); - PMAP_UNLOCK(src_pmap); - PMAP_UNLOCK(dst_pmap); -} - -static void -mmu_radix_copy_page(vm_page_t msrc, vm_page_t mdst) -{ - vm_offset_t src = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(msrc)); - vm_offset_t dst = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mdst)); - - CTR3(KTR_PMAP, "%s(%p, %p)", __func__, src, dst); - /* - * XXX slow - */ - bcopy((void *)src, (void *)dst, PAGE_SIZE); -} - -static void -mmu_radix_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[], - vm_offset_t b_offset, int xfersize) -{ - void *a_cp, *b_cp; - vm_offset_t a_pg_offset, b_pg_offset; - int cnt; - - CTR6(KTR_PMAP, "%s(%p, %#x, %p, %#x, %#x)", __func__, ma, - a_offset, mb, b_offset, xfersize); - - while (xfersize > 0) { - a_pg_offset = a_offset & PAGE_MASK; - cnt = min(xfersize, PAGE_SIZE - a_pg_offset); - a_cp = (char *)(uintptr_t)PHYS_TO_DMAP( - VM_PAGE_TO_PHYS(ma[a_offset >> PAGE_SHIFT])) + - a_pg_offset; - b_pg_offset = b_offset & PAGE_MASK; - cnt = min(cnt, PAGE_SIZE - b_pg_offset); - b_cp = (char *)(uintptr_t)PHYS_TO_DMAP( - VM_PAGE_TO_PHYS(mb[b_offset >> PAGE_SHIFT])) + - b_pg_offset; - bcopy(a_cp, b_cp, cnt); - a_offset += cnt; - b_offset += cnt; - xfersize -= cnt; - } -} - -#if VM_NRESERVLEVEL > 0 -/* - * Tries to promote the 512, contiguous 4KB page mappings that are within a - * single page table page (PTP) to a single 2MB page mapping. For promotion - * to occur, two conditions must be met: (1) the 4KB page mappings must map - * aligned, contiguous physical memory and (2) the 4KB page mappings must have - * identical characteristics. - */ -static int -pmap_promote_l3e(pmap_t pmap, pml3_entry_t *pde, vm_offset_t va, - struct rwlock **lockp) -{ - pml3_entry_t newpde; - pt_entry_t *firstpte, oldpte, pa, *pte; - vm_page_t mpte; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - - /* - * Examine the first PTE in the specified PTP. Abort if this PTE is - * either invalid, unused, or does not map the first 4KB physical page - * within a 2MB page. - */ - firstpte = (pt_entry_t *)PHYS_TO_DMAP(be64toh(*pde) & PG_FRAME); -setpde: - newpde = *firstpte; - if ((newpde & ((PG_FRAME & L3_PAGE_MASK) | PG_A | PG_V)) != (PG_A | PG_V)) { - CTR2(KTR_PMAP, "pmap_promote_l3e: failure for va %#lx" - " in pmap %p", va, pmap); - goto fail; - } - if ((newpde & (PG_M | PG_RW)) == PG_RW) { - /* - * When PG_M is already clear, PG_RW can be cleared without - * a TLB invalidation. - */ - if (!atomic_cmpset_long(firstpte, htobe64(newpde), htobe64((newpde | RPTE_EAA_R) & ~RPTE_EAA_W))) - goto setpde; - newpde &= ~RPTE_EAA_W; - } - - /* - * Examine each of the other PTEs in the specified PTP. Abort if this - * PTE maps an unexpected 4KB physical page or does not have identical - * characteristics to the first PTE. - */ - pa = (newpde & (PG_PS_FRAME | PG_A | PG_V)) + L3_PAGE_SIZE - PAGE_SIZE; - for (pte = firstpte + NPTEPG - 1; pte > firstpte; pte--) { -setpte: - oldpte = be64toh(*pte); - if ((oldpte & (PG_FRAME | PG_A | PG_V)) != pa) { - CTR2(KTR_PMAP, "pmap_promote_l3e: failure for va %#lx" - " in pmap %p", va, pmap); - goto fail; - } - if ((oldpte & (PG_M | PG_RW)) == PG_RW) { - /* - * When PG_M is already clear, PG_RW can be cleared - * without a TLB invalidation. - */ - if (!atomic_cmpset_long(pte, htobe64(oldpte), htobe64((oldpte | RPTE_EAA_R) & ~RPTE_EAA_W))) - goto setpte; - oldpte &= ~RPTE_EAA_W; - CTR2(KTR_PMAP, "pmap_promote_l3e: protect for va %#lx" - " in pmap %p", (oldpte & PG_FRAME & L3_PAGE_MASK) | - (va & ~L3_PAGE_MASK), pmap); - } - if ((oldpte & PG_PTE_PROMOTE) != (newpde & PG_PTE_PROMOTE)) { - CTR2(KTR_PMAP, "pmap_promote_l3e: failure for va %#lx" - " in pmap %p", va, pmap); - goto fail; - } - pa -= PAGE_SIZE; - } - - /* - * Save the page table page in its current state until the PDE - * mapping the superpage is demoted by pmap_demote_pde() or - * destroyed by pmap_remove_pde(). - */ - mpte = PHYS_TO_VM_PAGE(be64toh(*pde) & PG_FRAME); - KASSERT(mpte >= vm_page_array && - mpte < &vm_page_array[vm_page_array_size], - ("pmap_promote_l3e: page table page is out of range")); - KASSERT(mpte->pindex == pmap_l3e_pindex(va), - ("pmap_promote_l3e: page table page's pindex is wrong")); - if (pmap_insert_pt_page(pmap, mpte)) { - CTR2(KTR_PMAP, - "pmap_promote_l3e: failure for va %#lx in pmap %p", va, - pmap); - goto fail; - } - - /* - * Promote the pv entries. - */ - if ((newpde & PG_MANAGED) != 0) - pmap_pv_promote_l3e(pmap, va, newpde & PG_PS_FRAME, lockp); - - pte_store(pde, PG_PROMOTED | newpde); - ptesync(); - atomic_add_long(&pmap_l3e_promotions, 1); - CTR2(KTR_PMAP, "pmap_promote_l3e: success for va %#lx" - " in pmap %p", va, pmap); - return (0); - fail: - atomic_add_long(&pmap_l3e_p_failures, 1); - return (KERN_FAILURE); -} -#endif /* VM_NRESERVLEVEL > 0 */ - -int -mmu_radix_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, - vm_prot_t prot, u_int flags, int8_t psind) -{ - struct rwlock *lock; - pml3_entry_t *l3e; - pt_entry_t *pte; - pt_entry_t newpte, origpte; - pv_entry_t pv; - vm_paddr_t opa, pa; - vm_page_t mpte, om; - int rv, retrycount; - boolean_t nosleep, invalidate_all, invalidate_page; - - va = trunc_page(va); - retrycount = 0; - invalidate_page = invalidate_all = false; - CTR6(KTR_PMAP, "pmap_enter(%p, %#lx, %p, %#x, %#x, %d)", pmap, va, - m, prot, flags, psind); - KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig")); - KASSERT((m->oflags & VPO_UNMANAGED) != 0 || !VA_IS_CLEANMAP(va), - ("pmap_enter: managed mapping within the clean submap")); - if ((m->oflags & VPO_UNMANAGED) == 0) - VM_PAGE_OBJECT_BUSY_ASSERT(m); - - KASSERT((flags & PMAP_ENTER_RESERVED) == 0, - ("pmap_enter: flags %u has reserved bits set", flags)); - pa = VM_PAGE_TO_PHYS(m); - newpte = (pt_entry_t)(pa | PG_A | PG_V | RPTE_LEAF); - if ((flags & VM_PROT_WRITE) != 0) - newpte |= PG_M; - if ((flags & VM_PROT_READ) != 0) - newpte |= PG_A; - if (prot & VM_PROT_READ) - newpte |= RPTE_EAA_R; - if ((prot & VM_PROT_WRITE) != 0) - newpte |= RPTE_EAA_W; - KASSERT((newpte & (PG_M | PG_RW)) != PG_M, - ("pmap_enter: flags includes VM_PROT_WRITE but prot doesn't")); - - if (prot & VM_PROT_EXECUTE) - newpte |= PG_X; - if ((flags & PMAP_ENTER_WIRED) != 0) - newpte |= PG_W; - if (va >= DMAP_MIN_ADDRESS) - newpte |= RPTE_EAA_P; - newpte |= pmap_cache_bits(m->md.mdpg_cache_attrs); - /* - * Set modified bit gratuitously for writeable mappings if - * the page is unmanaged. We do not want to take a fault - * to do the dirty bit accounting for these mappings. - */ - if ((m->oflags & VPO_UNMANAGED) != 0) { - if ((newpte & PG_RW) != 0) - newpte |= PG_M; - } else - newpte |= PG_MANAGED; - - lock = NULL; - PMAP_LOCK(pmap); - if (psind == 1) { - /* Assert the required virtual and physical alignment. */ - KASSERT((va & L3_PAGE_MASK) == 0, ("pmap_enter: va unaligned")); - KASSERT(m->psind > 0, ("pmap_enter: m->psind < psind")); - rv = pmap_enter_l3e(pmap, va, newpte | RPTE_LEAF, flags, m, &lock); - goto out; - } - mpte = NULL; - - /* - * In the case that a page table page is not - * resident, we are creating it here. - */ -retry: - l3e = pmap_pml3e(pmap, va); - if (l3e != NULL && (be64toh(*l3e) & PG_V) != 0 && ((be64toh(*l3e) & RPTE_LEAF) == 0 || - pmap_demote_l3e_locked(pmap, l3e, va, &lock))) { - pte = pmap_l3e_to_pte(l3e, va); - if (va < VM_MAXUSER_ADDRESS && mpte == NULL) { - mpte = PHYS_TO_VM_PAGE(be64toh(*l3e) & PG_FRAME); - mpte->ref_count++; - } - } else if (va < VM_MAXUSER_ADDRESS) { - /* - * Here if the pte page isn't mapped, or if it has been - * deallocated. - */ - nosleep = (flags & PMAP_ENTER_NOSLEEP) != 0; - mpte = _pmap_allocpte(pmap, pmap_l3e_pindex(va), - nosleep ? NULL : &lock); - if (mpte == NULL && nosleep) { - rv = KERN_RESOURCE_SHORTAGE; - goto out; - } - if (__predict_false(retrycount++ == 6)) - panic("too many retries"); - invalidate_all = true; - goto retry; - } else - panic("pmap_enter: invalid page directory va=%#lx", va); - - origpte = be64toh(*pte); - pv = NULL; - - /* - * Is the specified virtual address already mapped? - */ - if ((origpte & PG_V) != 0) { -#ifdef INVARIANTS - if (VERBOSE_PMAP || pmap_logging) { - printf("cow fault pmap_enter(%p, %#lx, %p, %#x, %x, %d) --" - " asid=%lu curpid=%d name=%s origpte0x%lx\n", - pmap, va, m, prot, flags, psind, pmap->pm_pid, - curproc->p_pid, curproc->p_comm, origpte); - pmap_pte_walk(pmap->pm_pml1, va); - } -#endif - /* - * Wiring change, just update stats. We don't worry about - * wiring PT pages as they remain resident as long as there - * are valid mappings in them. Hence, if a user page is wired, - * the PT page will be also. - */ - if ((newpte & PG_W) != 0 && (origpte & PG_W) == 0) - pmap->pm_stats.wired_count++; - else if ((newpte & PG_W) == 0 && (origpte & PG_W) != 0) - pmap->pm_stats.wired_count--; - - /* - * Remove the extra PT page reference. - */ - if (mpte != NULL) { - mpte->ref_count--; - KASSERT(mpte->ref_count > 0, - ("pmap_enter: missing reference to page table page," - " va: 0x%lx", va)); - } - - /* - * Has the physical page changed? - */ - opa = origpte & PG_FRAME; - if (opa == pa) { - /* - * No, might be a protection or wiring change. - */ - if ((origpte & PG_MANAGED) != 0 && - (newpte & PG_RW) != 0) - vm_page_aflag_set(m, PGA_WRITEABLE); - if (((origpte ^ newpte) & ~(PG_M | PG_A)) == 0) { - if ((newpte & (PG_A|PG_M)) != (origpte & (PG_A|PG_M))) { - if (!atomic_cmpset_long(pte, htobe64(origpte), htobe64(newpte))) - goto retry; - if ((newpte & PG_M) != (origpte & PG_M)) - vm_page_dirty(m); - if ((newpte & PG_A) != (origpte & PG_A)) - vm_page_aflag_set(m, PGA_REFERENCED); - ptesync(); - } else - invalidate_all = true; - if (((origpte ^ newpte) & ~(PG_M | PG_A)) == 0) - goto unchanged; - } - goto validate; - } - - /* - * The physical page has changed. Temporarily invalidate - * the mapping. This ensures that all threads sharing the - * pmap keep a consistent view of the mapping, which is - * necessary for the correct handling of COW faults. It - * also permits reuse of the old mapping's PV entry, - * avoiding an allocation. - * - * For consistency, handle unmanaged mappings the same way. - */ - origpte = be64toh(pte_load_clear(pte)); - KASSERT((origpte & PG_FRAME) == opa, - ("pmap_enter: unexpected pa update for %#lx", va)); - if ((origpte & PG_MANAGED) != 0) { - om = PHYS_TO_VM_PAGE(opa); - - /* - * The pmap lock is sufficient to synchronize with - * concurrent calls to pmap_page_test_mappings() and - * pmap_ts_referenced(). - */ - if ((origpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) - vm_page_dirty(om); - if ((origpte & PG_A) != 0) - vm_page_aflag_set(om, PGA_REFERENCED); - CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, opa); - pv = pmap_pvh_remove(&om->md, pmap, va); - if ((newpte & PG_MANAGED) == 0) - free_pv_entry(pmap, pv); -#ifdef INVARIANTS - else if (origpte & PG_MANAGED) { - if (pv == NULL) { - pmap_page_print_mappings(om); - MPASS(pv != NULL); - } - } -#endif - if ((om->a.flags & PGA_WRITEABLE) != 0 && - TAILQ_EMPTY(&om->md.pv_list) && - ((om->flags & PG_FICTITIOUS) != 0 || - TAILQ_EMPTY(&pa_to_pvh(opa)->pv_list))) - vm_page_aflag_clear(om, PGA_WRITEABLE); - } - if ((origpte & PG_A) != 0) - invalidate_page = true; - origpte = 0; - } else { - if (pmap != kernel_pmap) { -#ifdef INVARIANTS - if (VERBOSE_PMAP || pmap_logging) - printf("pmap_enter(%p, %#lx, %p, %#x, %x, %d) -- asid=%lu curpid=%d name=%s\n", - pmap, va, m, prot, flags, psind, - pmap->pm_pid, curproc->p_pid, - curproc->p_comm); -#endif - } - - /* - * Increment the counters. - */ - if ((newpte & PG_W) != 0) - pmap->pm_stats.wired_count++; - pmap_resident_count_inc(pmap, 1); - } - - /* - * Enter on the PV list if part of our managed memory. - */ - if ((newpte & PG_MANAGED) != 0) { - if (pv == NULL) { - pv = get_pv_entry(pmap, &lock); - pv->pv_va = va; - } -#ifdef VERBOSE_PV - else - printf("reassigning pv: %p to pmap: %p\n", - pv, pmap); -#endif - CHANGE_PV_LIST_LOCK_TO_PHYS(&lock, pa); - TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_link); - m->md.pv_gen++; - if ((newpte & PG_RW) != 0) - vm_page_aflag_set(m, PGA_WRITEABLE); - } - - /* - * Update the PTE. - */ - if ((origpte & PG_V) != 0) { -validate: - origpte = be64toh(pte_load_store(pte, htobe64(newpte))); - KASSERT((origpte & PG_FRAME) == pa, - ("pmap_enter: unexpected pa update for %#lx", va)); - if ((newpte & PG_M) == 0 && (origpte & (PG_M | PG_RW)) == - (PG_M | PG_RW)) { - if ((origpte & PG_MANAGED) != 0) - vm_page_dirty(m); - invalidate_page = true; - - /* - * Although the PTE may still have PG_RW set, TLB - * invalidation may nonetheless be required because - * the PTE no longer has PG_M set. - */ - } else if ((origpte & PG_X) != 0 || (newpte & PG_X) == 0) { - /* - * Removing capabilities requires invalidation on POWER - */ - invalidate_page = true; - goto unchanged; - } - if ((origpte & PG_A) != 0) - invalidate_page = true; - } else { - pte_store(pte, newpte); - ptesync(); - } -unchanged: - -#if VM_NRESERVLEVEL > 0 - /* - * If both the page table page and the reservation are fully - * populated, then attempt promotion. - */ - if ((mpte == NULL || mpte->ref_count == NPTEPG) && - mmu_radix_ps_enabled(pmap) && - (m->flags & PG_FICTITIOUS) == 0 && - vm_reserv_level_iffullpop(m) == 0 && - pmap_promote_l3e(pmap, l3e, va, &lock) == 0) - invalidate_all = true; -#endif - if (invalidate_all) - pmap_invalidate_all(pmap); - else if (invalidate_page) - pmap_invalidate_page(pmap, va); - - rv = KERN_SUCCESS; -out: - if (lock != NULL) - rw_wunlock(lock); - PMAP_UNLOCK(pmap); - - return (rv); -} - -/* - * Tries to create a read- and/or execute-only 2MB page mapping. Returns true - * if successful. Returns false if (1) a page table page cannot be allocated - * without sleeping, (2) a mapping already exists at the specified virtual - * address, or (3) a PV entry cannot be allocated without reclaiming another - * PV entry. - */ -static bool -pmap_enter_2mpage(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, - struct rwlock **lockp) -{ - pml3_entry_t newpde; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - newpde = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.mdpg_cache_attrs) | - RPTE_LEAF | PG_V; - if ((m->oflags & VPO_UNMANAGED) == 0) - newpde |= PG_MANAGED; - if (prot & VM_PROT_EXECUTE) - newpde |= PG_X; - if (prot & VM_PROT_READ) - newpde |= RPTE_EAA_R; - if (va >= DMAP_MIN_ADDRESS) - newpde |= RPTE_EAA_P; - return (pmap_enter_l3e(pmap, va, newpde, PMAP_ENTER_NOSLEEP | - PMAP_ENTER_NOREPLACE | PMAP_ENTER_NORECLAIM, NULL, lockp) == - KERN_SUCCESS); -} - -/* - * Tries to create the specified 2MB page mapping. Returns KERN_SUCCESS if - * the mapping was created, and either KERN_FAILURE or KERN_RESOURCE_SHORTAGE - * otherwise. Returns KERN_FAILURE if PMAP_ENTER_NOREPLACE was specified and - * a mapping already exists at the specified virtual address. Returns - * KERN_RESOURCE_SHORTAGE if PMAP_ENTER_NOSLEEP was specified and a page table - * page allocation failed. Returns KERN_RESOURCE_SHORTAGE if - * PMAP_ENTER_NORECLAIM was specified and a PV entry allocation failed. - * - * The parameter "m" is only used when creating a managed, writeable mapping. - */ -static int -pmap_enter_l3e(pmap_t pmap, vm_offset_t va, pml3_entry_t newpde, u_int flags, - vm_page_t m, struct rwlock **lockp) -{ - struct spglist free; - pml3_entry_t oldl3e, *l3e; - vm_page_t mt, pdpg; - - KASSERT((newpde & (PG_M | PG_RW)) != PG_RW, - ("pmap_enter_pde: newpde is missing PG_M")); - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - - if ((pdpg = pmap_allocl3e(pmap, va, (flags & PMAP_ENTER_NOSLEEP) != 0 ? - NULL : lockp)) == NULL) { - CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx" - " in pmap %p", va, pmap); - return (KERN_RESOURCE_SHORTAGE); - } - l3e = (pml3_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pdpg)); - l3e = &l3e[pmap_pml3e_index(va)]; - oldl3e = be64toh(*l3e); - if ((oldl3e & PG_V) != 0) { - KASSERT(pdpg->ref_count > 1, - ("pmap_enter_pde: pdpg's wire count is too low")); - if ((flags & PMAP_ENTER_NOREPLACE) != 0) { - pdpg->ref_count--; - CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx" - " in pmap %p", va, pmap); - return (KERN_FAILURE); - } - /* Break the existing mapping(s). */ - SLIST_INIT(&free); - if ((oldl3e & RPTE_LEAF) != 0) { - /* - * The reference to the PD page that was acquired by - * pmap_allocl3e() ensures that it won't be freed. - * However, if the PDE resulted from a promotion, then - * a reserved PT page could be freed. - */ - (void)pmap_remove_l3e(pmap, l3e, va, &free, lockp); - pmap_invalidate_l3e_page(pmap, va, oldl3e); - } else { - if (pmap_remove_ptes(pmap, va, va + L3_PAGE_SIZE, l3e, - &free, lockp)) - pmap_invalidate_all(pmap); - } - vm_page_free_pages_toq(&free, true); - if (va >= VM_MAXUSER_ADDRESS) { - mt = PHYS_TO_VM_PAGE(be64toh(*l3e) & PG_FRAME); - if (pmap_insert_pt_page(pmap, mt)) { - /* - * XXX Currently, this can't happen because - * we do not perform pmap_enter(psind == 1) - * on the kernel pmap. - */ - panic("pmap_enter_pde: trie insert failed"); - } - } else - KASSERT(be64toh(*l3e) == 0, ("pmap_enter_pde: non-zero pde %p", - l3e)); - } - if ((newpde & PG_MANAGED) != 0) { - /* - * Abort this mapping if its PV entry could not be created. - */ - if (!pmap_pv_insert_l3e(pmap, va, newpde, flags, lockp)) { - SLIST_INIT(&free); - if (pmap_unwire_ptp(pmap, va, pdpg, &free)) { - /* - * Although "va" is not mapped, paging- - * structure caches could nonetheless have - * entries that refer to the freed page table - * pages. Invalidate those entries. - */ - pmap_invalidate_page(pmap, va); - vm_page_free_pages_toq(&free, true); - } - CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx" - " in pmap %p", va, pmap); - return (KERN_RESOURCE_SHORTAGE); - } - if ((newpde & PG_RW) != 0) { - for (mt = m; mt < &m[L3_PAGE_SIZE / PAGE_SIZE]; mt++) - vm_page_aflag_set(mt, PGA_WRITEABLE); - } - } - - /* - * Increment counters. - */ - if ((newpde & PG_W) != 0) - pmap->pm_stats.wired_count += L3_PAGE_SIZE / PAGE_SIZE; - pmap_resident_count_inc(pmap, L3_PAGE_SIZE / PAGE_SIZE); - - /* - * Map the superpage. (This is not a promoted mapping; there will not - * be any lingering 4KB page mappings in the TLB.) - */ - pte_store(l3e, newpde); - ptesync(); - - atomic_add_long(&pmap_l3e_mappings, 1); - CTR2(KTR_PMAP, "pmap_enter_pde: success for va %#lx" - " in pmap %p", va, pmap); - return (KERN_SUCCESS); -} - -void -mmu_radix_enter_object(pmap_t pmap, vm_offset_t start, - vm_offset_t end, vm_page_t m_start, vm_prot_t prot) -{ - - struct rwlock *lock; - vm_offset_t va; - vm_page_t m, mpte; - vm_pindex_t diff, psize; - bool invalidate; - VM_OBJECT_ASSERT_LOCKED(m_start->object); - - CTR6(KTR_PMAP, "%s(%p, %#x, %#x, %p, %#x)", __func__, pmap, start, - end, m_start, prot); - - invalidate = false; - psize = atop(end - start); - mpte = NULL; - m = m_start; - lock = NULL; - PMAP_LOCK(pmap); - while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { - va = start + ptoa(diff); - if ((va & L3_PAGE_MASK) == 0 && va + L3_PAGE_SIZE <= end && - m->psind == 1 && mmu_radix_ps_enabled(pmap) && - pmap_enter_2mpage(pmap, va, m, prot, &lock)) - m = &m[L3_PAGE_SIZE / PAGE_SIZE - 1]; - else - mpte = mmu_radix_enter_quick_locked(pmap, va, m, prot, - mpte, &lock, &invalidate); - m = TAILQ_NEXT(m, listq); - } - ptesync(); - if (lock != NULL) - rw_wunlock(lock); - if (invalidate) - pmap_invalidate_all(pmap); - PMAP_UNLOCK(pmap); -} - -static vm_page_t -mmu_radix_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, - vm_prot_t prot, vm_page_t mpte, struct rwlock **lockp, bool *invalidate) -{ - struct spglist free; - pt_entry_t *pte; - vm_paddr_t pa; - - KASSERT(!VA_IS_CLEANMAP(va) || - (m->oflags & VPO_UNMANAGED) != 0, - ("mmu_radix_enter_quick_locked: managed mapping within the clean submap")); - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - - /* - * In the case that a page table page is not - * resident, we are creating it here. - */ - if (va < VM_MAXUSER_ADDRESS) { - vm_pindex_t ptepindex; - pml3_entry_t *ptepa; - - /* - * Calculate pagetable page index - */ - ptepindex = pmap_l3e_pindex(va); - if (mpte && (mpte->pindex == ptepindex)) { - mpte->ref_count++; - } else { - /* - * Get the page directory entry - */ - ptepa = pmap_pml3e(pmap, va); - - /* - * If the page table page is mapped, we just increment - * the hold count, and activate it. Otherwise, we - * attempt to allocate a page table page. If this - * attempt fails, we don't retry. Instead, we give up. - */ - if (ptepa && (be64toh(*ptepa) & PG_V) != 0) { - if (be64toh(*ptepa) & RPTE_LEAF) - return (NULL); - mpte = PHYS_TO_VM_PAGE(be64toh(*ptepa) & PG_FRAME); - mpte->ref_count++; - } else { - /* - * Pass NULL instead of the PV list lock - * pointer, because we don't intend to sleep. - */ - mpte = _pmap_allocpte(pmap, ptepindex, NULL); - if (mpte == NULL) - return (mpte); - } - } - pte = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(mpte)); - pte = &pte[pmap_pte_index(va)]; - } else { - mpte = NULL; - pte = pmap_pte(pmap, va); - } - if (be64toh(*pte)) { - if (mpte != NULL) { - mpte->ref_count--; - mpte = NULL; - } - return (mpte); - } - - /* - * Enter on the PV list if part of our managed memory. - */ - if ((m->oflags & VPO_UNMANAGED) == 0 && - !pmap_try_insert_pv_entry(pmap, va, m, lockp)) { - if (mpte != NULL) { - SLIST_INIT(&free); - if (pmap_unwire_ptp(pmap, va, mpte, &free)) { - /* - * Although "va" is not mapped, paging- - * structure caches could nonetheless have - * entries that refer to the freed page table - * pages. Invalidate those entries. - */ - *invalidate = true; - vm_page_free_pages_toq(&free, true); - } - mpte = NULL; - } - return (mpte); - } - - /* - * Increment counters - */ - pmap_resident_count_inc(pmap, 1); - - pa = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.mdpg_cache_attrs); - if (prot & VM_PROT_EXECUTE) - pa |= PG_X; - else - pa |= RPTE_EAA_R; - if ((m->oflags & VPO_UNMANAGED) == 0) - pa |= PG_MANAGED; - - pte_store(pte, pa); - return (mpte); -} - -void -mmu_radix_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, - vm_prot_t prot) -{ - struct rwlock *lock; - bool invalidate; - - lock = NULL; - invalidate = false; - PMAP_LOCK(pmap); - mmu_radix_enter_quick_locked(pmap, va, m, prot, NULL, &lock, - &invalidate); - ptesync(); - if (lock != NULL) - rw_wunlock(lock); - if (invalidate) - pmap_invalidate_all(pmap); - PMAP_UNLOCK(pmap); -} - -vm_paddr_t -mmu_radix_extract(pmap_t pmap, vm_offset_t va) -{ - pml3_entry_t *l3e; - pt_entry_t *pte; - vm_paddr_t pa; - - l3e = pmap_pml3e(pmap, va); - if (__predict_false(l3e == NULL)) - return (0); - if (be64toh(*l3e) & RPTE_LEAF) { - pa = (be64toh(*l3e) & PG_PS_FRAME) | (va & L3_PAGE_MASK); - pa |= (va & L3_PAGE_MASK); - } else { - /* - * Beware of a concurrent promotion that changes the - * PDE at this point! For example, vtopte() must not - * be used to access the PTE because it would use the - * new PDE. It is, however, safe to use the old PDE - * because the page table page is preserved by the - * promotion. - */ - pte = pmap_l3e_to_pte(l3e, va); - if (__predict_false(pte == NULL)) - return (0); - pa = be64toh(*pte); - pa = (pa & PG_FRAME) | (va & PAGE_MASK); - pa |= (va & PAGE_MASK); - } - return (pa); -} - -vm_page_t -mmu_radix_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) -{ - pml3_entry_t l3e, *l3ep; - pt_entry_t pte; - vm_paddr_t pa; - vm_page_t m; - - pa = 0; - m = NULL; - CTR4(KTR_PMAP, "%s(%p, %#x, %#x)", __func__, pmap, va, prot); - PMAP_LOCK(pmap); - l3ep = pmap_pml3e(pmap, va); - if (l3ep != NULL && (l3e = be64toh(*l3ep))) { - if (l3e & RPTE_LEAF) { - if ((l3e & PG_RW) || (prot & VM_PROT_WRITE) == 0) - m = PHYS_TO_VM_PAGE((l3e & PG_PS_FRAME) | - (va & L3_PAGE_MASK)); - } else { - /* Native endian PTE, do not pass to pmap functions */ - pte = be64toh(*pmap_l3e_to_pte(l3ep, va)); - if ((pte & PG_V) && - ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) - m = PHYS_TO_VM_PAGE(pte & PG_FRAME); - } - if (m != NULL && !vm_page_wire_mapped(m)) - m = NULL; - } - PMAP_UNLOCK(pmap); - return (m); -} - -static void -mmu_radix_growkernel(vm_offset_t addr) -{ - vm_paddr_t paddr; - vm_page_t nkpg; - pml3_entry_t *l3e; - pml2_entry_t *l2e; - - CTR2(KTR_PMAP, "%s(%#x)", __func__, addr); - if (VM_MIN_KERNEL_ADDRESS < addr && - addr < (VM_MIN_KERNEL_ADDRESS + nkpt * L3_PAGE_SIZE)) - return; - - addr = roundup2(addr, L3_PAGE_SIZE); - if (addr - 1 >= vm_map_max(kernel_map)) - addr = vm_map_max(kernel_map); - while (kernel_vm_end < addr) { - l2e = pmap_pml2e(kernel_pmap, kernel_vm_end); - if ((be64toh(*l2e) & PG_V) == 0) { - /* We need a new PDP entry */ - nkpg = vm_page_alloc_noobj(VM_ALLOC_INTERRUPT | - VM_ALLOC_WIRED | VM_ALLOC_ZERO); - if (nkpg == NULL) - panic("pmap_growkernel: no memory to grow kernel"); - nkpg->pindex = kernel_vm_end >> L2_PAGE_SIZE_SHIFT; - paddr = VM_PAGE_TO_PHYS(nkpg); - pde_store(l2e, paddr); - continue; /* try again */ - } - l3e = pmap_l2e_to_l3e(l2e, kernel_vm_end); - if ((be64toh(*l3e) & PG_V) != 0) { - kernel_vm_end = (kernel_vm_end + L3_PAGE_SIZE) & ~L3_PAGE_MASK; - if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) { - kernel_vm_end = vm_map_max(kernel_map); - break; - } - continue; - } - - nkpg = vm_page_alloc_noobj(VM_ALLOC_INTERRUPT | VM_ALLOC_WIRED | - VM_ALLOC_ZERO); - if (nkpg == NULL) - panic("pmap_growkernel: no memory to grow kernel"); - nkpg->pindex = pmap_l3e_pindex(kernel_vm_end); - paddr = VM_PAGE_TO_PHYS(nkpg); - pde_store(l3e, paddr); - - kernel_vm_end = (kernel_vm_end + L3_PAGE_SIZE) & ~L3_PAGE_MASK; - if (kernel_vm_end - 1 >= vm_map_max(kernel_map)) { - kernel_vm_end = vm_map_max(kernel_map); - break; - } - } - ptesync(); -} - -static MALLOC_DEFINE(M_RADIX_PGD, "radix_pgd", "radix page table root directory"); -static uma_zone_t zone_radix_pgd; - -static int -radix_pgd_import(void *arg __unused, void **store, int count, int domain __unused, - int flags) -{ - int req; - - req = VM_ALLOC_WIRED | malloc2vm_flags(flags); - for (int i = 0; i < count; i++) { - vm_page_t m = vm_page_alloc_noobj_contig(req, - RADIX_PGD_SIZE / PAGE_SIZE, - 0, (vm_paddr_t)-1, RADIX_PGD_SIZE, L1_PAGE_SIZE, - VM_MEMATTR_DEFAULT); - store[i] = (void *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)); - } - return (count); -} - -static void -radix_pgd_release(void *arg __unused, void **store, int count) -{ - vm_page_t m; - struct spglist free; - int page_count; - - SLIST_INIT(&free); - page_count = RADIX_PGD_SIZE/PAGE_SIZE; - - for (int i = 0; i < count; i++) { - /* - * XXX selectively remove dmap and KVA entries so we don't - * need to bzero - */ - m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)store[i])); - for (int j = page_count-1; j >= 0; j--) { - vm_page_unwire_noq(&m[j]); - SLIST_INSERT_HEAD(&free, &m[j], plinks.s.ss); - } - vm_page_free_pages_toq(&free, false); - } -} - -static void -mmu_radix_init(void) -{ - vm_page_t mpte; - vm_size_t s; - int error, i, pv_npg; - - /* XXX is this really needed for POWER? */ - /* L1TF, reserve page @0 unconditionally */ - vm_page_blacklist_add(0, bootverbose); - - zone_radix_pgd = uma_zcache_create("radix_pgd_cache", - RADIX_PGD_SIZE, NULL, NULL, -#ifdef INVARIANTS - trash_init, trash_fini, -#else - NULL, NULL, -#endif - radix_pgd_import, radix_pgd_release, - NULL, UMA_ZONE_NOBUCKET); - - /* - * Initialize the vm page array entries for the kernel pmap's - * page table pages. - */ - PMAP_LOCK(kernel_pmap); - for (i = 0; i < nkpt; i++) { - mpte = PHYS_TO_VM_PAGE(KPTphys + (i << PAGE_SHIFT)); - KASSERT(mpte >= vm_page_array && - mpte < &vm_page_array[vm_page_array_size], - ("pmap_init: page table page is out of range size: %lu", - vm_page_array_size)); - mpte->pindex = pmap_l3e_pindex(VM_MIN_KERNEL_ADDRESS) + i; - mpte->phys_addr = KPTphys + (i << PAGE_SHIFT); - MPASS(PHYS_TO_VM_PAGE(mpte->phys_addr) == mpte); - //pmap_insert_pt_page(kernel_pmap, mpte); - mpte->ref_count = 1; - } - PMAP_UNLOCK(kernel_pmap); - vm_wire_add(nkpt); - - CTR1(KTR_PMAP, "%s()", __func__); - TAILQ_INIT(&pv_dummy.pv_list); - - /* - * Are large page mappings enabled? - */ - TUNABLE_INT_FETCH("vm.pmap.superpages_enabled", &superpages_enabled); - if (superpages_enabled) { - KASSERT(MAXPAGESIZES > 1 && pagesizes[1] == 0, - ("pmap_init: can't assign to pagesizes[1]")); - pagesizes[1] = L3_PAGE_SIZE; - } - - /* - * Initialize the pv chunk list mutex. - */ - mtx_init(&pv_chunks_mutex, "pmap pv chunk list", NULL, MTX_DEF); - - /* - * Initialize the pool of pv list locks. - */ - for (i = 0; i < NPV_LIST_LOCKS; i++) - rw_init(&pv_list_locks[i], "pmap pv list"); - - /* - * Calculate the size of the pv head table for superpages. - */ - pv_npg = howmany(vm_phys_segs[vm_phys_nsegs - 1].end, L3_PAGE_SIZE); - - /* - * Allocate memory for the pv head table for superpages. - */ - s = (vm_size_t)(pv_npg * sizeof(struct md_page)); - s = round_page(s); - pv_table = (struct md_page *)kmem_malloc(s, M_WAITOK | M_ZERO); - for (i = 0; i < pv_npg; i++) - TAILQ_INIT(&pv_table[i].pv_list); - TAILQ_INIT(&pv_dummy.pv_list); - - pmap_initialized = 1; - mtx_init(&qframe_mtx, "qfrmlk", NULL, MTX_SPIN); - error = vmem_alloc(kernel_arena, PAGE_SIZE, M_BESTFIT | M_WAITOK, - (vmem_addr_t *)&qframe); - - if (error != 0) - panic("qframe allocation failed"); - asid_arena = vmem_create("ASID", isa3_base_pid + 1, (1<md.pv_list, pv_link) { - pmap = PV_PMAP(pv); - if (!PMAP_TRYLOCK(pmap)) { - md_gen = m->md.pv_gen; - rw_runlock(lock); - PMAP_LOCK(pmap); - rw_rlock(lock); - if (md_gen != m->md.pv_gen) { - PMAP_UNLOCK(pmap); - goto restart; - } - } - pte = pmap_pte(pmap, pv->pv_va); - mask = 0; - if (modified) - mask |= PG_RW | PG_M; - if (accessed) - mask |= PG_V | PG_A; - rv = (be64toh(*pte) & mask) == mask; - PMAP_UNLOCK(pmap); - if (rv) - goto out; - } - if ((m->flags & PG_FICTITIOUS) == 0) { - pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); - TAILQ_FOREACH(pv, &pvh->pv_list, pv_link) { - pmap = PV_PMAP(pv); - if (!PMAP_TRYLOCK(pmap)) { - md_gen = m->md.pv_gen; - pvh_gen = pvh->pv_gen; - rw_runlock(lock); - PMAP_LOCK(pmap); - rw_rlock(lock); - if (md_gen != m->md.pv_gen || - pvh_gen != pvh->pv_gen) { - PMAP_UNLOCK(pmap); - goto restart; - } - } - pte = pmap_pml3e(pmap, pv->pv_va); - mask = 0; - if (modified) - mask |= PG_RW | PG_M; - if (accessed) - mask |= PG_V | PG_A; - rv = (be64toh(*pte) & mask) == mask; - PMAP_UNLOCK(pmap); - if (rv) - goto out; - } - } -out: - rw_runlock(lock); - return (rv); -} - -/* - * pmap_is_modified: - * - * Return whether or not the specified physical page was modified - * in any physical maps. - */ -boolean_t -mmu_radix_is_modified(vm_page_t m) -{ - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("pmap_is_modified: page %p is not managed", m)); - - CTR2(KTR_PMAP, "%s(%p)", __func__, m); - /* - * If the page is not busied then this check is racy. - */ - if (!pmap_page_is_write_mapped(m)) - return (FALSE); - return (pmap_page_test_mappings(m, FALSE, TRUE)); -} - -boolean_t -mmu_radix_is_prefaultable(pmap_t pmap, vm_offset_t addr) -{ - pml3_entry_t *l3e; - pt_entry_t *pte; - boolean_t rv; - - CTR3(KTR_PMAP, "%s(%p, %#x)", __func__, pmap, addr); - rv = FALSE; - PMAP_LOCK(pmap); - l3e = pmap_pml3e(pmap, addr); - if (l3e != NULL && (be64toh(*l3e) & (RPTE_LEAF | PG_V)) == PG_V) { - pte = pmap_l3e_to_pte(l3e, addr); - rv = (be64toh(*pte) & PG_V) == 0; - } - PMAP_UNLOCK(pmap); - return (rv); -} - -boolean_t -mmu_radix_is_referenced(vm_page_t m) -{ - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("pmap_is_referenced: page %p is not managed", m)); - CTR2(KTR_PMAP, "%s(%p)", __func__, m); - return (pmap_page_test_mappings(m, TRUE, FALSE)); -} - -/* - * pmap_ts_referenced: - * - * Return a count of reference bits for a page, clearing those bits. - * It is not necessary for every reference bit to be cleared, but it - * is necessary that 0 only be returned when there are truly no - * reference bits set. - * - * As an optimization, update the page's dirty field if a modified bit is - * found while counting reference bits. This opportunistic update can be - * performed at low cost and can eliminate the need for some future calls - * to pmap_is_modified(). However, since this function stops after - * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some - * dirty pages. Those dirty pages will only be detected by a future call - * to pmap_is_modified(). - * - * A DI block is not needed within this function, because - * invalidations are performed before the PV list lock is - * released. - */ -int -mmu_radix_ts_referenced(vm_page_t m) -{ - struct md_page *pvh; - pv_entry_t pv, pvf; - pmap_t pmap; - struct rwlock *lock; - pml3_entry_t oldl3e, *l3e; - pt_entry_t *pte; - vm_paddr_t pa; - int cleared, md_gen, not_cleared, pvh_gen; - struct spglist free; - - CTR2(KTR_PMAP, "%s(%p)", __func__, m); - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("pmap_ts_referenced: page %p is not managed", m)); - SLIST_INIT(&free); - cleared = 0; - pa = VM_PAGE_TO_PHYS(m); - lock = PHYS_TO_PV_LIST_LOCK(pa); - pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : pa_to_pvh(pa); - rw_wlock(lock); -retry: - not_cleared = 0; - if ((pvf = TAILQ_FIRST(&pvh->pv_list)) == NULL) - goto small_mappings; - pv = pvf; - do { - if (pvf == NULL) - pvf = pv; - pmap = PV_PMAP(pv); - if (!PMAP_TRYLOCK(pmap)) { - pvh_gen = pvh->pv_gen; - rw_wunlock(lock); - PMAP_LOCK(pmap); - rw_wlock(lock); - if (pvh_gen != pvh->pv_gen) { - PMAP_UNLOCK(pmap); - goto retry; - } - } - l3e = pmap_pml3e(pmap, pv->pv_va); - oldl3e = be64toh(*l3e); - if ((oldl3e & (PG_M | PG_RW)) == (PG_M | PG_RW)) { - /* - * Although "oldpde" is mapping a 2MB page, because - * this function is called at a 4KB page granularity, - * we only update the 4KB page under test. - */ - vm_page_dirty(m); - } - if ((oldl3e & PG_A) != 0) { - /* - * Since this reference bit is shared by 512 4KB - * pages, it should not be cleared every time it is - * tested. Apply a simple "hash" function on the - * physical page number, the virtual superpage number, - * and the pmap address to select one 4KB page out of - * the 512 on which testing the reference bit will - * result in clearing that reference bit. This - * function is designed to avoid the selection of the - * same 4KB page for every 2MB page mapping. - * - * On demotion, a mapping that hasn't been referenced - * is simply destroyed. To avoid the possibility of a - * subsequent page fault on a demoted wired mapping, - * always leave its reference bit set. Moreover, - * since the superpage is wired, the current state of - * its reference bit won't affect page replacement. - */ - if ((((pa >> PAGE_SHIFT) ^ (pv->pv_va >> L3_PAGE_SIZE_SHIFT) ^ - (uintptr_t)pmap) & (NPTEPG - 1)) == 0 && - (oldl3e & PG_W) == 0) { - atomic_clear_long(l3e, htobe64(PG_A)); - pmap_invalidate_page(pmap, pv->pv_va); - cleared++; - KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m), - ("inconsistent pv lock %p %p for page %p", - lock, VM_PAGE_TO_PV_LIST_LOCK(m), m)); - } else - not_cleared++; - } - PMAP_UNLOCK(pmap); - /* Rotate the PV list if it has more than one entry. */ - if (pv != NULL && TAILQ_NEXT(pv, pv_link) != NULL) { - TAILQ_REMOVE(&pvh->pv_list, pv, pv_link); - TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_link); - pvh->pv_gen++; - } - if (cleared + not_cleared >= PMAP_TS_REFERENCED_MAX) - goto out; - } while ((pv = TAILQ_FIRST(&pvh->pv_list)) != pvf); -small_mappings: - if ((pvf = TAILQ_FIRST(&m->md.pv_list)) == NULL) - goto out; - pv = pvf; - do { - if (pvf == NULL) - pvf = pv; - pmap = PV_PMAP(pv); - if (!PMAP_TRYLOCK(pmap)) { - pvh_gen = pvh->pv_gen; - md_gen = m->md.pv_gen; - rw_wunlock(lock); - PMAP_LOCK(pmap); - rw_wlock(lock); - if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) { - PMAP_UNLOCK(pmap); - goto retry; - } - } - l3e = pmap_pml3e(pmap, pv->pv_va); - KASSERT((be64toh(*l3e) & RPTE_LEAF) == 0, - ("pmap_ts_referenced: found a 2mpage in page %p's pv list", - m)); - pte = pmap_l3e_to_pte(l3e, pv->pv_va); - if ((be64toh(*pte) & (PG_M | PG_RW)) == (PG_M | PG_RW)) - vm_page_dirty(m); - if ((be64toh(*pte) & PG_A) != 0) { - atomic_clear_long(pte, htobe64(PG_A)); - pmap_invalidate_page(pmap, pv->pv_va); - cleared++; - } - PMAP_UNLOCK(pmap); - /* Rotate the PV list if it has more than one entry. */ - if (pv != NULL && TAILQ_NEXT(pv, pv_link) != NULL) { - TAILQ_REMOVE(&m->md.pv_list, pv, pv_link); - TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_link); - m->md.pv_gen++; - } - } while ((pv = TAILQ_FIRST(&m->md.pv_list)) != pvf && cleared + - not_cleared < PMAP_TS_REFERENCED_MAX); -out: - rw_wunlock(lock); - vm_page_free_pages_toq(&free, true); - return (cleared + not_cleared); -} - -static vm_offset_t -mmu_radix_map(vm_offset_t *virt __unused, vm_paddr_t start, - vm_paddr_t end, int prot __unused) -{ - - CTR5(KTR_PMAP, "%s(%p, %#x, %#x, %#x)", __func__, virt, start, end, - prot); - return (PHYS_TO_DMAP(start)); -} - -void -mmu_radix_object_init_pt(pmap_t pmap, vm_offset_t addr, - vm_object_t object, vm_pindex_t pindex, vm_size_t size) -{ - pml3_entry_t *l3e; - vm_paddr_t pa, ptepa; - vm_page_t p, pdpg; - vm_memattr_t ma; - - CTR6(KTR_PMAP, "%s(%p, %#x, %p, %u, %#x)", __func__, pmap, addr, - object, pindex, size); - VM_OBJECT_ASSERT_WLOCKED(object); - KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG, - ("pmap_object_init_pt: non-device object")); - /* NB: size can be logically ored with addr here */ - if ((addr & L3_PAGE_MASK) == 0 && (size & L3_PAGE_MASK) == 0) { - if (!mmu_radix_ps_enabled(pmap)) - return; - if (!vm_object_populate(object, pindex, pindex + atop(size))) - return; - p = vm_page_lookup(object, pindex); - KASSERT(p->valid == VM_PAGE_BITS_ALL, - ("pmap_object_init_pt: invalid page %p", p)); - ma = p->md.mdpg_cache_attrs; - - /* - * Abort the mapping if the first page is not physically - * aligned to a 2MB page boundary. - */ - ptepa = VM_PAGE_TO_PHYS(p); - if (ptepa & L3_PAGE_MASK) - return; - - /* - * Skip the first page. Abort the mapping if the rest of - * the pages are not physically contiguous or have differing - * memory attributes. - */ - p = TAILQ_NEXT(p, listq); - for (pa = ptepa + PAGE_SIZE; pa < ptepa + size; - pa += PAGE_SIZE) { - KASSERT(p->valid == VM_PAGE_BITS_ALL, - ("pmap_object_init_pt: invalid page %p", p)); - if (pa != VM_PAGE_TO_PHYS(p) || - ma != p->md.mdpg_cache_attrs) - return; - p = TAILQ_NEXT(p, listq); - } - - PMAP_LOCK(pmap); - for (pa = ptepa | pmap_cache_bits(ma); - pa < ptepa + size; pa += L3_PAGE_SIZE) { - pdpg = pmap_allocl3e(pmap, addr, NULL); - if (pdpg == NULL) { - /* - * The creation of mappings below is only an - * optimization. If a page directory page - * cannot be allocated without blocking, - * continue on to the next mapping rather than - * blocking. - */ - addr += L3_PAGE_SIZE; - continue; - } - l3e = (pml3_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pdpg)); - l3e = &l3e[pmap_pml3e_index(addr)]; - if ((be64toh(*l3e) & PG_V) == 0) { - pa |= PG_M | PG_A | PG_RW; - pte_store(l3e, pa); - pmap_resident_count_inc(pmap, L3_PAGE_SIZE / PAGE_SIZE); - atomic_add_long(&pmap_l3e_mappings, 1); - } else { - /* Continue on if the PDE is already valid. */ - pdpg->ref_count--; - KASSERT(pdpg->ref_count > 0, - ("pmap_object_init_pt: missing reference " - "to page directory page, va: 0x%lx", addr)); - } - addr += L3_PAGE_SIZE; - } - ptesync(); - PMAP_UNLOCK(pmap); - } -} - -boolean_t -mmu_radix_page_exists_quick(pmap_t pmap, vm_page_t m) -{ - struct md_page *pvh; - struct rwlock *lock; - pv_entry_t pv; - int loops = 0; - boolean_t rv; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("pmap_page_exists_quick: page %p is not managed", m)); - CTR3(KTR_PMAP, "%s(%p, %p)", __func__, pmap, m); - rv = FALSE; - lock = VM_PAGE_TO_PV_LIST_LOCK(m); - rw_rlock(lock); - TAILQ_FOREACH(pv, &m->md.pv_list, pv_link) { - if (PV_PMAP(pv) == pmap) { - rv = TRUE; - break; - } - loops++; - if (loops >= 16) - break; - } - if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) { - pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); - TAILQ_FOREACH(pv, &pvh->pv_list, pv_link) { - if (PV_PMAP(pv) == pmap) { - rv = TRUE; - break; - } - loops++; - if (loops >= 16) - break; - } - } - rw_runlock(lock); - return (rv); -} - -void -mmu_radix_page_init(vm_page_t m) -{ - - CTR2(KTR_PMAP, "%s(%p)", __func__, m); - TAILQ_INIT(&m->md.pv_list); - m->md.mdpg_cache_attrs = VM_MEMATTR_DEFAULT; -} - -int -mmu_radix_page_wired_mappings(vm_page_t m) -{ - struct rwlock *lock; - struct md_page *pvh; - pmap_t pmap; - pt_entry_t *pte; - pv_entry_t pv; - int count, md_gen, pvh_gen; - - if ((m->oflags & VPO_UNMANAGED) != 0) - return (0); - CTR2(KTR_PMAP, "%s(%p)", __func__, m); - lock = VM_PAGE_TO_PV_LIST_LOCK(m); - rw_rlock(lock); -restart: - count = 0; - TAILQ_FOREACH(pv, &m->md.pv_list, pv_link) { - pmap = PV_PMAP(pv); - if (!PMAP_TRYLOCK(pmap)) { - md_gen = m->md.pv_gen; - rw_runlock(lock); - PMAP_LOCK(pmap); - rw_rlock(lock); - if (md_gen != m->md.pv_gen) { - PMAP_UNLOCK(pmap); - goto restart; - } - } - pte = pmap_pte(pmap, pv->pv_va); - if ((be64toh(*pte) & PG_W) != 0) - count++; - PMAP_UNLOCK(pmap); - } - if ((m->flags & PG_FICTITIOUS) == 0) { - pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); - TAILQ_FOREACH(pv, &pvh->pv_list, pv_link) { - pmap = PV_PMAP(pv); - if (!PMAP_TRYLOCK(pmap)) { - md_gen = m->md.pv_gen; - pvh_gen = pvh->pv_gen; - rw_runlock(lock); - PMAP_LOCK(pmap); - rw_rlock(lock); - if (md_gen != m->md.pv_gen || - pvh_gen != pvh->pv_gen) { - PMAP_UNLOCK(pmap); - goto restart; - } - } - pte = pmap_pml3e(pmap, pv->pv_va); - if ((be64toh(*pte) & PG_W) != 0) - count++; - PMAP_UNLOCK(pmap); - } - } - rw_runlock(lock); - return (count); -} - -static void -mmu_radix_update_proctab(int pid, pml1_entry_t l1pa) -{ - isa3_proctab[pid].proctab0 = htobe64(RTS_SIZE | l1pa | RADIX_PGD_INDEX_SHIFT); -} - -int -mmu_radix_pinit(pmap_t pmap) -{ - vmem_addr_t pid; - vm_paddr_t l1pa; - - CTR2(KTR_PMAP, "%s(%p)", __func__, pmap); - - /* - * allocate the page directory page - */ - pmap->pm_pml1 = uma_zalloc(zone_radix_pgd, M_WAITOK); - - for (int j = 0; j < RADIX_PGD_SIZE_SHIFT; j++) - pagezero((vm_offset_t)pmap->pm_pml1 + j * PAGE_SIZE); - vm_radix_init(&pmap->pm_radix); - TAILQ_INIT(&pmap->pm_pvchunk); - bzero(&pmap->pm_stats, sizeof pmap->pm_stats); - pmap->pm_flags = PMAP_PDE_SUPERPAGE; - vmem_alloc(asid_arena, 1, M_FIRSTFIT|M_WAITOK, &pid); - - pmap->pm_pid = pid; - l1pa = DMAP_TO_PHYS((vm_offset_t)pmap->pm_pml1); - mmu_radix_update_proctab(pid, l1pa); - __asm __volatile("ptesync;isync" : : : "memory"); - - return (1); -} - -/* - * This routine is called if the desired page table page does not exist. - * - * If page table page allocation fails, this routine may sleep before - * returning NULL. It sleeps only if a lock pointer was given. - * - * Note: If a page allocation fails at page table level two or three, - * one or two pages may be held during the wait, only to be released - * afterwards. This conservative approach is easily argued to avoid - * race conditions. - */ -static vm_page_t -_pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex, struct rwlock **lockp) -{ - vm_page_t m, pdppg, pdpg; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - - /* - * Allocate a page table page. - */ - if ((m = vm_page_alloc_noobj(VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { - if (lockp != NULL) { - RELEASE_PV_LIST_LOCK(lockp); - PMAP_UNLOCK(pmap); - vm_wait(NULL); - PMAP_LOCK(pmap); - } - /* - * Indicate the need to retry. While waiting, the page table - * page may have been allocated. - */ - return (NULL); - } - m->pindex = ptepindex; - - /* - * Map the pagetable page into the process address space, if - * it isn't already there. - */ - - if (ptepindex >= (NUPDE + NUPDPE)) { - pml1_entry_t *l1e; - vm_pindex_t pml1index; - - /* Wire up a new PDPE page */ - pml1index = ptepindex - (NUPDE + NUPDPE); - l1e = &pmap->pm_pml1[pml1index]; - KASSERT((be64toh(*l1e) & PG_V) == 0, - ("%s: L1 entry %#lx is valid", __func__, *l1e)); - pde_store(l1e, VM_PAGE_TO_PHYS(m)); - } else if (ptepindex >= NUPDE) { - vm_pindex_t pml1index; - vm_pindex_t pdpindex; - pml1_entry_t *l1e; - pml2_entry_t *l2e; - - /* Wire up a new l2e page */ - pdpindex = ptepindex - NUPDE; - pml1index = pdpindex >> RPTE_SHIFT; - - l1e = &pmap->pm_pml1[pml1index]; - if ((be64toh(*l1e) & PG_V) == 0) { - /* Have to allocate a new pdp, recurse */ - if (_pmap_allocpte(pmap, NUPDE + NUPDPE + pml1index, - lockp) == NULL) { - vm_page_unwire_noq(m); - vm_page_free_zero(m); - return (NULL); - } - } else { - /* Add reference to l2e page */ - pdppg = PHYS_TO_VM_PAGE(be64toh(*l1e) & PG_FRAME); - pdppg->ref_count++; - } - l2e = (pml2_entry_t *)PHYS_TO_DMAP(be64toh(*l1e) & PG_FRAME); - - /* Now find the pdp page */ - l2e = &l2e[pdpindex & RPTE_MASK]; - KASSERT((be64toh(*l2e) & PG_V) == 0, - ("%s: L2 entry %#lx is valid", __func__, *l2e)); - pde_store(l2e, VM_PAGE_TO_PHYS(m)); - } else { - vm_pindex_t pml1index; - vm_pindex_t pdpindex; - pml1_entry_t *l1e; - pml2_entry_t *l2e; - pml3_entry_t *l3e; - - /* Wire up a new PTE page */ - pdpindex = ptepindex >> RPTE_SHIFT; - pml1index = pdpindex >> RPTE_SHIFT; - - /* First, find the pdp and check that its valid. */ - l1e = &pmap->pm_pml1[pml1index]; - if ((be64toh(*l1e) & PG_V) == 0) { - /* Have to allocate a new pd, recurse */ - if (_pmap_allocpte(pmap, NUPDE + pdpindex, - lockp) == NULL) { - vm_page_unwire_noq(m); - vm_page_free_zero(m); - return (NULL); - } - l2e = (pml2_entry_t *)PHYS_TO_DMAP(be64toh(*l1e) & PG_FRAME); - l2e = &l2e[pdpindex & RPTE_MASK]; - } else { - l2e = (pml2_entry_t *)PHYS_TO_DMAP(be64toh(*l1e) & PG_FRAME); - l2e = &l2e[pdpindex & RPTE_MASK]; - if ((be64toh(*l2e) & PG_V) == 0) { - /* Have to allocate a new pd, recurse */ - if (_pmap_allocpte(pmap, NUPDE + pdpindex, - lockp) == NULL) { - vm_page_unwire_noq(m); - vm_page_free_zero(m); - return (NULL); - } - } else { - /* Add reference to the pd page */ - pdpg = PHYS_TO_VM_PAGE(be64toh(*l2e) & PG_FRAME); - pdpg->ref_count++; - } - } - l3e = (pml3_entry_t *)PHYS_TO_DMAP(be64toh(*l2e) & PG_FRAME); - - /* Now we know where the page directory page is */ - l3e = &l3e[ptepindex & RPTE_MASK]; - KASSERT((be64toh(*l3e) & PG_V) == 0, - ("%s: L3 entry %#lx is valid", __func__, *l3e)); - pde_store(l3e, VM_PAGE_TO_PHYS(m)); - } - - pmap_resident_count_inc(pmap, 1); - return (m); -} -static vm_page_t -pmap_allocl3e(pmap_t pmap, vm_offset_t va, struct rwlock **lockp) -{ - vm_pindex_t pdpindex, ptepindex; - pml2_entry_t *pdpe; - vm_page_t pdpg; - -retry: - pdpe = pmap_pml2e(pmap, va); - if (pdpe != NULL && (be64toh(*pdpe) & PG_V) != 0) { - /* Add a reference to the pd page. */ - pdpg = PHYS_TO_VM_PAGE(be64toh(*pdpe) & PG_FRAME); - pdpg->ref_count++; - } else { - /* Allocate a pd page. */ - ptepindex = pmap_l3e_pindex(va); - pdpindex = ptepindex >> RPTE_SHIFT; - pdpg = _pmap_allocpte(pmap, NUPDE + pdpindex, lockp); - if (pdpg == NULL && lockp != NULL) - goto retry; - } - return (pdpg); -} - -static vm_page_t -pmap_allocpte(pmap_t pmap, vm_offset_t va, struct rwlock **lockp) -{ - vm_pindex_t ptepindex; - pml3_entry_t *pd; - vm_page_t m; - - /* - * Calculate pagetable page index - */ - ptepindex = pmap_l3e_pindex(va); -retry: - /* - * Get the page directory entry - */ - pd = pmap_pml3e(pmap, va); - - /* - * This supports switching from a 2MB page to a - * normal 4K page. - */ - if (pd != NULL && (be64toh(*pd) & (RPTE_LEAF | PG_V)) == (RPTE_LEAF | PG_V)) { - if (!pmap_demote_l3e_locked(pmap, pd, va, lockp)) { - /* - * Invalidation of the 2MB page mapping may have caused - * the deallocation of the underlying PD page. - */ - pd = NULL; - } - } - - /* - * If the page table page is mapped, we just increment the - * hold count, and activate it. - */ - if (pd != NULL && (be64toh(*pd) & PG_V) != 0) { - m = PHYS_TO_VM_PAGE(be64toh(*pd) & PG_FRAME); - m->ref_count++; - } else { - /* - * Here if the pte page isn't mapped, or if it has been - * deallocated. - */ - m = _pmap_allocpte(pmap, ptepindex, lockp); - if (m == NULL && lockp != NULL) - goto retry; - } - return (m); -} - -static void -mmu_radix_pinit0(pmap_t pmap) -{ - - CTR2(KTR_PMAP, "%s(%p)", __func__, pmap); - PMAP_LOCK_INIT(pmap); - pmap->pm_pml1 = kernel_pmap->pm_pml1; - pmap->pm_pid = kernel_pmap->pm_pid; - - vm_radix_init(&pmap->pm_radix); - TAILQ_INIT(&pmap->pm_pvchunk); - bzero(&pmap->pm_stats, sizeof pmap->pm_stats); - kernel_pmap->pm_flags = - pmap->pm_flags = PMAP_PDE_SUPERPAGE; -} -/* - * pmap_protect_l3e: do the things to protect a 2mpage in a process - */ -static boolean_t -pmap_protect_l3e(pmap_t pmap, pt_entry_t *l3e, vm_offset_t sva, vm_prot_t prot) -{ - pt_entry_t newpde, oldpde; - vm_offset_t eva, va; - vm_page_t m; - boolean_t anychanged; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - KASSERT((sva & L3_PAGE_MASK) == 0, - ("pmap_protect_l3e: sva is not 2mpage aligned")); - anychanged = FALSE; -retry: - oldpde = newpde = be64toh(*l3e); - if ((oldpde & (PG_MANAGED | PG_M | PG_RW)) == - (PG_MANAGED | PG_M | PG_RW)) { - eva = sva + L3_PAGE_SIZE; - for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME); - va < eva; va += PAGE_SIZE, m++) - vm_page_dirty(m); - } - if ((prot & VM_PROT_WRITE) == 0) { - newpde &= ~(PG_RW | PG_M); - newpde |= RPTE_EAA_R; - } - if (prot & VM_PROT_EXECUTE) - newpde |= PG_X; - if (newpde != oldpde) { - /* - * As an optimization to future operations on this PDE, clear - * PG_PROMOTED. The impending invalidation will remove any - * lingering 4KB page mappings from the TLB. - */ - if (!atomic_cmpset_long(l3e, htobe64(oldpde), htobe64(newpde & ~PG_PROMOTED))) - goto retry; - anychanged = TRUE; - } - return (anychanged); -} - -void -mmu_radix_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, - vm_prot_t prot) -{ - vm_offset_t va_next; - pml1_entry_t *l1e; - pml2_entry_t *l2e; - pml3_entry_t ptpaddr, *l3e; - pt_entry_t *pte; - boolean_t anychanged; - - CTR5(KTR_PMAP, "%s(%p, %#x, %#x, %#x)", __func__, pmap, sva, eva, - prot); - - KASSERT((prot & ~VM_PROT_ALL) == 0, ("invalid prot %x", prot)); - if (prot == VM_PROT_NONE) { - mmu_radix_remove(pmap, sva, eva); - return; - } - - if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) == - (VM_PROT_WRITE|VM_PROT_EXECUTE)) - return; - -#ifdef INVARIANTS - if (VERBOSE_PROTECT || pmap_logging) - printf("pmap_protect(%p, %#lx, %#lx, %x) - asid: %lu\n", - pmap, sva, eva, prot, pmap->pm_pid); -#endif - anychanged = FALSE; - - PMAP_LOCK(pmap); - for (; sva < eva; sva = va_next) { - l1e = pmap_pml1e(pmap, sva); - if ((be64toh(*l1e) & PG_V) == 0) { - va_next = (sva + L1_PAGE_SIZE) & ~L1_PAGE_MASK; - if (va_next < sva) - va_next = eva; - continue; - } - - l2e = pmap_l1e_to_l2e(l1e, sva); - if ((be64toh(*l2e) & PG_V) == 0) { - va_next = (sva + L2_PAGE_SIZE) & ~L2_PAGE_MASK; - if (va_next < sva) - va_next = eva; - continue; - } - - va_next = (sva + L3_PAGE_SIZE) & ~L3_PAGE_MASK; - if (va_next < sva) - va_next = eva; - - l3e = pmap_l2e_to_l3e(l2e, sva); - ptpaddr = be64toh(*l3e); - - /* - * Weed out invalid mappings. - */ - if (ptpaddr == 0) - continue; - - /* - * Check for large page. - */ - if ((ptpaddr & RPTE_LEAF) != 0) { - /* - * Are we protecting the entire large page? If not, - * demote the mapping and fall through. - */ - if (sva + L3_PAGE_SIZE == va_next && eva >= va_next) { - if (pmap_protect_l3e(pmap, l3e, sva, prot)) - anychanged = TRUE; - continue; - } else if (!pmap_demote_l3e(pmap, l3e, sva)) { - /* - * The large page mapping was destroyed. - */ - continue; - } - } - - if (va_next > eva) - va_next = eva; - - for (pte = pmap_l3e_to_pte(l3e, sva); sva != va_next; pte++, - sva += PAGE_SIZE) { - pt_entry_t obits, pbits; - vm_page_t m; - -retry: - MPASS(pte == pmap_pte(pmap, sva)); - obits = pbits = be64toh(*pte); - if ((pbits & PG_V) == 0) - continue; - - if ((prot & VM_PROT_WRITE) == 0) { - if ((pbits & (PG_MANAGED | PG_M | PG_RW)) == - (PG_MANAGED | PG_M | PG_RW)) { - m = PHYS_TO_VM_PAGE(pbits & PG_FRAME); - vm_page_dirty(m); - } - pbits &= ~(PG_RW | PG_M); - pbits |= RPTE_EAA_R; - } - if (prot & VM_PROT_EXECUTE) - pbits |= PG_X; - - if (pbits != obits) { - if (!atomic_cmpset_long(pte, htobe64(obits), htobe64(pbits))) - goto retry; - if (obits & (PG_A|PG_M)) { - anychanged = TRUE; -#ifdef INVARIANTS - if (VERBOSE_PROTECT || pmap_logging) - printf("%#lx %#lx -> %#lx\n", - sva, obits, pbits); -#endif - } - } - } - } - if (anychanged) - pmap_invalidate_all(pmap); - PMAP_UNLOCK(pmap); -} - -void -mmu_radix_qenter(vm_offset_t sva, vm_page_t *ma, int count) -{ - - CTR4(KTR_PMAP, "%s(%#x, %p, %d)", __func__, sva, ma, count); - pt_entry_t oldpte, pa, *pte; - vm_page_t m; - uint64_t cache_bits, attr_bits; - vm_offset_t va; - - oldpte = 0; - attr_bits = RPTE_EAA_R | RPTE_EAA_W | RPTE_EAA_P | PG_M | PG_A; - va = sva; - pte = kvtopte(va); - while (va < sva + PAGE_SIZE * count) { - if (__predict_false((va & L3_PAGE_MASK) == 0)) - pte = kvtopte(va); - MPASS(pte == pmap_pte(kernel_pmap, va)); - - /* - * XXX there has to be a more efficient way than traversing - * the page table every time - but go for correctness for - * today - */ - - m = *ma++; - cache_bits = pmap_cache_bits(m->md.mdpg_cache_attrs); - pa = VM_PAGE_TO_PHYS(m) | cache_bits | attr_bits; - if (be64toh(*pte) != pa) { - oldpte |= be64toh(*pte); - pte_store(pte, pa); - } - va += PAGE_SIZE; - pte++; - } - if (__predict_false((oldpte & RPTE_VALID) != 0)) - pmap_invalidate_range(kernel_pmap, sva, sva + count * - PAGE_SIZE); - else - ptesync(); -} - -void -mmu_radix_qremove(vm_offset_t sva, int count) -{ - vm_offset_t va; - pt_entry_t *pte; - - CTR3(KTR_PMAP, "%s(%#x, %d)", __func__, sva, count); - KASSERT(sva >= VM_MIN_KERNEL_ADDRESS, ("usermode or dmap va %lx", sva)); - - va = sva; - pte = kvtopte(va); - while (va < sva + PAGE_SIZE * count) { - if (__predict_false((va & L3_PAGE_MASK) == 0)) - pte = kvtopte(va); - pte_clear(pte); - pte++; - va += PAGE_SIZE; - } - pmap_invalidate_range(kernel_pmap, sva, va); -} - -/*************************************************** - * Page table page management routines..... - ***************************************************/ -/* - * Schedule the specified unused page table page to be freed. Specifically, - * add the page to the specified list of pages that will be released to the - * physical memory manager after the TLB has been updated. - */ -static __inline void -pmap_add_delayed_free_list(vm_page_t m, struct spglist *free, - boolean_t set_PG_ZERO) -{ - - if (set_PG_ZERO) - m->flags |= PG_ZERO; - else - m->flags &= ~PG_ZERO; - SLIST_INSERT_HEAD(free, m, plinks.s.ss); -} - -/* - * Inserts the specified page table page into the specified pmap's collection - * of idle page table pages. Each of a pmap's page table pages is responsible - * for mapping a distinct range of virtual addresses. The pmap's collection is - * ordered by this virtual address range. - */ -static __inline int -pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte) -{ - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - return (vm_radix_insert(&pmap->pm_radix, mpte)); -} - -/* - * Removes the page table page mapping the specified virtual address from the - * specified pmap's collection of idle page table pages, and returns it. - * Otherwise, returns NULL if there is no page table page corresponding to the - * specified virtual address. - */ -static __inline vm_page_t -pmap_remove_pt_page(pmap_t pmap, vm_offset_t va) -{ - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - return (vm_radix_remove(&pmap->pm_radix, pmap_l3e_pindex(va))); -} - -/* - * Decrements a page table page's wire count, which is used to record the - * number of valid page table entries within the page. If the wire count - * drops to zero, then the page table page is unmapped. Returns TRUE if the - * page table page was unmapped and FALSE otherwise. - */ -static inline boolean_t -pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free) -{ - - --m->ref_count; - if (m->ref_count == 0) { - _pmap_unwire_ptp(pmap, va, m, free); - return (TRUE); - } else - return (FALSE); -} - -static void -_pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m, struct spglist *free) -{ - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - /* - * unmap the page table page - */ - if (m->pindex >= (NUPDE + NUPDPE)) { - /* PDP page */ - pml1_entry_t *pml1; - pml1 = pmap_pml1e(pmap, va); - *pml1 = 0; - } else if (m->pindex >= NUPDE) { - /* PD page */ - pml2_entry_t *l2e; - l2e = pmap_pml2e(pmap, va); - *l2e = 0; - } else { - /* PTE page */ - pml3_entry_t *l3e; - l3e = pmap_pml3e(pmap, va); - *l3e = 0; - } - pmap_resident_count_dec(pmap, 1); - if (m->pindex < NUPDE) { - /* We just released a PT, unhold the matching PD */ - vm_page_t pdpg; - - pdpg = PHYS_TO_VM_PAGE(be64toh(*pmap_pml2e(pmap, va)) & PG_FRAME); - pmap_unwire_ptp(pmap, va, pdpg, free); - } - if (m->pindex >= NUPDE && m->pindex < (NUPDE + NUPDPE)) { - /* We just released a PD, unhold the matching PDP */ - vm_page_t pdppg; - - pdppg = PHYS_TO_VM_PAGE(be64toh(*pmap_pml1e(pmap, va)) & PG_FRAME); - pmap_unwire_ptp(pmap, va, pdppg, free); - } - - /* - * Put page on a list so that it is released after - * *ALL* TLB shootdown is done - */ - pmap_add_delayed_free_list(m, free, TRUE); -} - -/* - * After removing a page table entry, this routine is used to - * conditionally free the page, and manage the hold/wire counts. - */ -static int -pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pml3_entry_t ptepde, - struct spglist *free) -{ - vm_page_t mpte; - - if (va >= VM_MAXUSER_ADDRESS) - return (0); - KASSERT(ptepde != 0, ("pmap_unuse_pt: ptepde != 0")); - mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); - return (pmap_unwire_ptp(pmap, va, mpte, free)); -} - -void -mmu_radix_release(pmap_t pmap) -{ - - CTR2(KTR_PMAP, "%s(%p)", __func__, pmap); - KASSERT(pmap->pm_stats.resident_count == 0, - ("pmap_release: pmap resident count %ld != 0", - pmap->pm_stats.resident_count)); - KASSERT(vm_radix_is_empty(&pmap->pm_radix), - ("pmap_release: pmap has reserved page table page(s)")); - - pmap_invalidate_all(pmap); - isa3_proctab[pmap->pm_pid].proctab0 = 0; - uma_zfree(zone_radix_pgd, pmap->pm_pml1); - vmem_free(asid_arena, pmap->pm_pid, 1); -} - -/* - * Create the PV entry for a 2MB page mapping. Always returns true unless the - * flag PMAP_ENTER_NORECLAIM is specified. If that flag is specified, returns - * false if the PV entry cannot be allocated without resorting to reclamation. - */ -static bool -pmap_pv_insert_l3e(pmap_t pmap, vm_offset_t va, pml3_entry_t pde, u_int flags, - struct rwlock **lockp) -{ - struct md_page *pvh; - pv_entry_t pv; - vm_paddr_t pa; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - /* Pass NULL instead of the lock pointer to disable reclamation. */ - if ((pv = get_pv_entry(pmap, (flags & PMAP_ENTER_NORECLAIM) != 0 ? - NULL : lockp)) == NULL) - return (false); - pv->pv_va = va; - pa = pde & PG_PS_FRAME; - CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, pa); - pvh = pa_to_pvh(pa); - TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_link); - pvh->pv_gen++; - return (true); -} - -/* - * Fills a page table page with mappings to consecutive physical pages. - */ -static void -pmap_fill_ptp(pt_entry_t *firstpte, pt_entry_t newpte) -{ - pt_entry_t *pte; - - for (pte = firstpte; pte < firstpte + NPTEPG; pte++) { - *pte = htobe64(newpte); - newpte += PAGE_SIZE; - } -} - -static boolean_t -pmap_demote_l3e(pmap_t pmap, pml3_entry_t *pde, vm_offset_t va) -{ - struct rwlock *lock; - boolean_t rv; - - lock = NULL; - rv = pmap_demote_l3e_locked(pmap, pde, va, &lock); - if (lock != NULL) - rw_wunlock(lock); - return (rv); -} - -static boolean_t -pmap_demote_l3e_locked(pmap_t pmap, pml3_entry_t *l3e, vm_offset_t va, - struct rwlock **lockp) -{ - pml3_entry_t oldpde; - pt_entry_t *firstpte; - vm_paddr_t mptepa; - vm_page_t mpte; - struct spglist free; - vm_offset_t sva; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - oldpde = be64toh(*l3e); - KASSERT((oldpde & (RPTE_LEAF | PG_V)) == (RPTE_LEAF | PG_V), - ("pmap_demote_l3e: oldpde is missing RPTE_LEAF and/or PG_V %lx", - oldpde)); - if ((oldpde & PG_A) == 0 || (mpte = pmap_remove_pt_page(pmap, va)) == - NULL) { - KASSERT((oldpde & PG_W) == 0, - ("pmap_demote_l3e: page table page for a wired mapping" - " is missing")); - - /* - * Invalidate the 2MB page mapping and return "failure" if the - * mapping was never accessed or the allocation of the new - * page table page fails. If the 2MB page mapping belongs to - * the direct map region of the kernel's address space, then - * the page allocation request specifies the highest possible - * priority (VM_ALLOC_INTERRUPT). Otherwise, the priority is - * normal. Page table pages are preallocated for every other - * part of the kernel address space, so the direct map region - * is the only part of the kernel address space that must be - * handled here. - */ - if ((oldpde & PG_A) == 0 || (mpte = vm_page_alloc_noobj( - (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS ? - VM_ALLOC_INTERRUPT : 0) | VM_ALLOC_WIRED)) == NULL) { - SLIST_INIT(&free); - sva = trunc_2mpage(va); - pmap_remove_l3e(pmap, l3e, sva, &free, lockp); - pmap_invalidate_l3e_page(pmap, sva, oldpde); - vm_page_free_pages_toq(&free, true); - CTR2(KTR_PMAP, "pmap_demote_l3e: failure for va %#lx" - " in pmap %p", va, pmap); - return (FALSE); - } - mpte->pindex = pmap_l3e_pindex(va); - if (va < VM_MAXUSER_ADDRESS) - pmap_resident_count_inc(pmap, 1); - } - mptepa = VM_PAGE_TO_PHYS(mpte); - firstpte = (pt_entry_t *)PHYS_TO_DMAP(mptepa); - KASSERT((oldpde & PG_A) != 0, - ("pmap_demote_l3e: oldpde is missing PG_A")); - KASSERT((oldpde & (PG_M | PG_RW)) != PG_RW, - ("pmap_demote_l3e: oldpde is missing PG_M")); - - /* - * If the page table page is new, initialize it. - */ - if (mpte->ref_count == 1) { - mpte->ref_count = NPTEPG; - pmap_fill_ptp(firstpte, oldpde); - } - - KASSERT((be64toh(*firstpte) & PG_FRAME) == (oldpde & PG_FRAME), - ("pmap_demote_l3e: firstpte and newpte map different physical" - " addresses")); - - /* - * If the mapping has changed attributes, update the page table - * entries. - */ - if ((be64toh(*firstpte) & PG_PTE_PROMOTE) != (oldpde & PG_PTE_PROMOTE)) - pmap_fill_ptp(firstpte, oldpde); - - /* - * The spare PV entries must be reserved prior to demoting the - * mapping, that is, prior to changing the PDE. Otherwise, the state - * of the PDE and the PV lists will be inconsistent, which can result - * in reclaim_pv_chunk() attempting to remove a PV entry from the - * wrong PV list and pmap_pv_demote_l3e() failing to find the expected - * PV entry for the 2MB page mapping that is being demoted. - */ - if ((oldpde & PG_MANAGED) != 0) - reserve_pv_entries(pmap, NPTEPG - 1, lockp); - - /* - * Demote the mapping. This pmap is locked. The old PDE has - * PG_A set. If the old PDE has PG_RW set, it also has PG_M - * set. Thus, there is no danger of a race with another - * processor changing the setting of PG_A and/or PG_M between - * the read above and the store below. - */ - pde_store(l3e, mptepa); - pmap_invalidate_l3e_page(pmap, trunc_2mpage(va), oldpde); - /* - * Demote the PV entry. - */ - if ((oldpde & PG_MANAGED) != 0) - pmap_pv_demote_l3e(pmap, va, oldpde & PG_PS_FRAME, lockp); - - atomic_add_long(&pmap_l3e_demotions, 1); - CTR2(KTR_PMAP, "pmap_demote_l3e: success for va %#lx" - " in pmap %p", va, pmap); - return (TRUE); -} - -/* - * pmap_remove_kernel_pde: Remove a kernel superpage mapping. - */ -static void -pmap_remove_kernel_l3e(pmap_t pmap, pml3_entry_t *l3e, vm_offset_t va) -{ - vm_paddr_t mptepa; - vm_page_t mpte; - - KASSERT(pmap == kernel_pmap, ("pmap %p is not kernel_pmap", pmap)); - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - mpte = pmap_remove_pt_page(pmap, va); - if (mpte == NULL) - panic("pmap_remove_kernel_pde: Missing pt page."); - - mptepa = VM_PAGE_TO_PHYS(mpte); - - /* - * Initialize the page table page. - */ - pagezero(PHYS_TO_DMAP(mptepa)); - - /* - * Demote the mapping. - */ - pde_store(l3e, mptepa); - ptesync(); -} - -/* - * pmap_remove_l3e: do the things to unmap a superpage in a process - */ -static int -pmap_remove_l3e(pmap_t pmap, pml3_entry_t *pdq, vm_offset_t sva, - struct spglist *free, struct rwlock **lockp) -{ - struct md_page *pvh; - pml3_entry_t oldpde; - vm_offset_t eva, va; - vm_page_t m, mpte; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - KASSERT((sva & L3_PAGE_MASK) == 0, - ("pmap_remove_l3e: sva is not 2mpage aligned")); - oldpde = be64toh(pte_load_clear(pdq)); - if (oldpde & PG_W) - pmap->pm_stats.wired_count -= (L3_PAGE_SIZE / PAGE_SIZE); - pmap_resident_count_dec(pmap, L3_PAGE_SIZE / PAGE_SIZE); - if (oldpde & PG_MANAGED) { - CHANGE_PV_LIST_LOCK_TO_PHYS(lockp, oldpde & PG_PS_FRAME); - pvh = pa_to_pvh(oldpde & PG_PS_FRAME); - pmap_pvh_free(pvh, pmap, sva); - eva = sva + L3_PAGE_SIZE; - for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME); - va < eva; va += PAGE_SIZE, m++) { - if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW)) - vm_page_dirty(m); - if (oldpde & PG_A) - vm_page_aflag_set(m, PGA_REFERENCED); - if (TAILQ_EMPTY(&m->md.pv_list) && - TAILQ_EMPTY(&pvh->pv_list)) - vm_page_aflag_clear(m, PGA_WRITEABLE); - } - } - if (pmap == kernel_pmap) { - pmap_remove_kernel_l3e(pmap, pdq, sva); - } else { - mpte = pmap_remove_pt_page(pmap, sva); - if (mpte != NULL) { - pmap_resident_count_dec(pmap, 1); - KASSERT(mpte->ref_count == NPTEPG, - ("pmap_remove_l3e: pte page wire count error")); - mpte->ref_count = 0; - pmap_add_delayed_free_list(mpte, free, FALSE); - } - } - return (pmap_unuse_pt(pmap, sva, be64toh(*pmap_pml2e(pmap, sva)), free)); -} - -/* - * pmap_remove_pte: do the things to unmap a page in a process - */ -static int -pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, - pml3_entry_t ptepde, struct spglist *free, struct rwlock **lockp) -{ - struct md_page *pvh; - pt_entry_t oldpte; - vm_page_t m; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - oldpte = be64toh(pte_load_clear(ptq)); - if (oldpte & RPTE_WIRED) - pmap->pm_stats.wired_count -= 1; - pmap_resident_count_dec(pmap, 1); - if (oldpte & RPTE_MANAGED) { - m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME); - if ((oldpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) - vm_page_dirty(m); - if (oldpte & PG_A) - vm_page_aflag_set(m, PGA_REFERENCED); - CHANGE_PV_LIST_LOCK_TO_VM_PAGE(lockp, m); - pmap_pvh_free(&m->md, pmap, va); - if (TAILQ_EMPTY(&m->md.pv_list) && - (m->flags & PG_FICTITIOUS) == 0) { - pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); - if (TAILQ_EMPTY(&pvh->pv_list)) - vm_page_aflag_clear(m, PGA_WRITEABLE); - } - } - return (pmap_unuse_pt(pmap, va, ptepde, free)); -} - -/* - * Remove a single page from a process address space - */ -static bool -pmap_remove_page(pmap_t pmap, vm_offset_t va, pml3_entry_t *l3e, - struct spglist *free) -{ - struct rwlock *lock; - pt_entry_t *pte; - bool invalidate_all; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - if ((be64toh(*l3e) & RPTE_VALID) == 0) { - return (false); - } - pte = pmap_l3e_to_pte(l3e, va); - if ((be64toh(*pte) & RPTE_VALID) == 0) { - return (false); - } - lock = NULL; - - invalidate_all = pmap_remove_pte(pmap, pte, va, be64toh(*l3e), free, &lock); - if (lock != NULL) - rw_wunlock(lock); - if (!invalidate_all) - pmap_invalidate_page(pmap, va); - return (invalidate_all); -} - -/* - * Removes the specified range of addresses from the page table page. - */ -static bool -pmap_remove_ptes(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, - pml3_entry_t *l3e, struct spglist *free, struct rwlock **lockp) -{ - pt_entry_t *pte; - vm_offset_t va; - bool anyvalid; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - anyvalid = false; - va = eva; - for (pte = pmap_l3e_to_pte(l3e, sva); sva != eva; pte++, - sva += PAGE_SIZE) { - MPASS(pte == pmap_pte(pmap, sva)); - if (*pte == 0) { - if (va != eva) { - anyvalid = true; - va = eva; - } - continue; - } - if (va == eva) - va = sva; - if (pmap_remove_pte(pmap, pte, sva, be64toh(*l3e), free, lockp)) { - anyvalid = true; - sva += PAGE_SIZE; - break; - } - } - if (anyvalid) - pmap_invalidate_all(pmap); - else if (va != eva) - pmap_invalidate_range(pmap, va, sva); - return (anyvalid); -} - -void -mmu_radix_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) -{ - struct rwlock *lock; - vm_offset_t va_next; - pml1_entry_t *l1e; - pml2_entry_t *l2e; - pml3_entry_t ptpaddr, *l3e; - struct spglist free; - bool anyvalid; - - CTR4(KTR_PMAP, "%s(%p, %#x, %#x)", __func__, pmap, sva, eva); - - /* - * Perform an unsynchronized read. This is, however, safe. - */ - if (pmap->pm_stats.resident_count == 0) - return; - - anyvalid = false; - SLIST_INIT(&free); - - /* XXX something fishy here */ - sva = (sva + PAGE_MASK) & ~PAGE_MASK; - eva = (eva + PAGE_MASK) & ~PAGE_MASK; - - PMAP_LOCK(pmap); - - /* - * special handling of removing one page. a very - * common operation and easy to short circuit some - * code. - */ - if (sva + PAGE_SIZE == eva) { - l3e = pmap_pml3e(pmap, sva); - if (l3e && (be64toh(*l3e) & RPTE_LEAF) == 0) { - anyvalid = pmap_remove_page(pmap, sva, l3e, &free); - goto out; - } - } - - lock = NULL; - for (; sva < eva; sva = va_next) { - if (pmap->pm_stats.resident_count == 0) - break; - l1e = pmap_pml1e(pmap, sva); - if (l1e == NULL || (be64toh(*l1e) & PG_V) == 0) { - va_next = (sva + L1_PAGE_SIZE) & ~L1_PAGE_MASK; - if (va_next < sva) - va_next = eva; - continue; - } - - l2e = pmap_l1e_to_l2e(l1e, sva); - if (l2e == NULL || (be64toh(*l2e) & PG_V) == 0) { - va_next = (sva + L2_PAGE_SIZE) & ~L2_PAGE_MASK; - if (va_next < sva) - va_next = eva; - continue; - } - - /* - * Calculate index for next page table. - */ - va_next = (sva + L3_PAGE_SIZE) & ~L3_PAGE_MASK; - if (va_next < sva) - va_next = eva; - - l3e = pmap_l2e_to_l3e(l2e, sva); - ptpaddr = be64toh(*l3e); - - /* - * Weed out invalid mappings. - */ - if (ptpaddr == 0) - continue; - - /* - * Check for large page. - */ - if ((ptpaddr & RPTE_LEAF) != 0) { - /* - * Are we removing the entire large page? If not, - * demote the mapping and fall through. - */ - if (sva + L3_PAGE_SIZE == va_next && eva >= va_next) { - pmap_remove_l3e(pmap, l3e, sva, &free, &lock); - anyvalid = true; - continue; - } else if (!pmap_demote_l3e_locked(pmap, l3e, sva, - &lock)) { - /* The large page mapping was destroyed. */ - continue; - } else - ptpaddr = be64toh(*l3e); - } - - /* - * Limit our scan to either the end of the va represented - * by the current page table page, or to the end of the - * range being removed. - */ - if (va_next > eva) - va_next = eva; - - if (pmap_remove_ptes(pmap, sva, va_next, l3e, &free, &lock)) - anyvalid = true; - } - if (lock != NULL) - rw_wunlock(lock); -out: - if (anyvalid) - pmap_invalidate_all(pmap); - PMAP_UNLOCK(pmap); - vm_page_free_pages_toq(&free, true); -} - -void -mmu_radix_remove_all(vm_page_t m) -{ - struct md_page *pvh; - pv_entry_t pv; - pmap_t pmap; - struct rwlock *lock; - pt_entry_t *pte, tpte; - pml3_entry_t *l3e; - vm_offset_t va; - struct spglist free; - int pvh_gen, md_gen; - - CTR2(KTR_PMAP, "%s(%p)", __func__, m); - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("pmap_remove_all: page %p is not managed", m)); - SLIST_INIT(&free); - lock = VM_PAGE_TO_PV_LIST_LOCK(m); - pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : - pa_to_pvh(VM_PAGE_TO_PHYS(m)); -retry: - rw_wlock(lock); - while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) { - pmap = PV_PMAP(pv); - if (!PMAP_TRYLOCK(pmap)) { - pvh_gen = pvh->pv_gen; - rw_wunlock(lock); - PMAP_LOCK(pmap); - rw_wlock(lock); - if (pvh_gen != pvh->pv_gen) { - rw_wunlock(lock); - PMAP_UNLOCK(pmap); - goto retry; - } - } - va = pv->pv_va; - l3e = pmap_pml3e(pmap, va); - (void)pmap_demote_l3e_locked(pmap, l3e, va, &lock); - PMAP_UNLOCK(pmap); - } - while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { - pmap = PV_PMAP(pv); - if (!PMAP_TRYLOCK(pmap)) { - pvh_gen = pvh->pv_gen; - md_gen = m->md.pv_gen; - rw_wunlock(lock); - PMAP_LOCK(pmap); - rw_wlock(lock); - if (pvh_gen != pvh->pv_gen || md_gen != m->md.pv_gen) { - rw_wunlock(lock); - PMAP_UNLOCK(pmap); - goto retry; - } - } - pmap_resident_count_dec(pmap, 1); - l3e = pmap_pml3e(pmap, pv->pv_va); - KASSERT((be64toh(*l3e) & RPTE_LEAF) == 0, ("pmap_remove_all: found" - " a 2mpage in page %p's pv list", m)); - pte = pmap_l3e_to_pte(l3e, pv->pv_va); - tpte = be64toh(pte_load_clear(pte)); - if (tpte & PG_W) - pmap->pm_stats.wired_count--; - if (tpte & PG_A) - vm_page_aflag_set(m, PGA_REFERENCED); - - /* - * Update the vm_page_t clean and reference bits. - */ - if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) - vm_page_dirty(m); - pmap_unuse_pt(pmap, pv->pv_va, be64toh(*l3e), &free); - pmap_invalidate_page(pmap, pv->pv_va); - TAILQ_REMOVE(&m->md.pv_list, pv, pv_link); - m->md.pv_gen++; - free_pv_entry(pmap, pv); - PMAP_UNLOCK(pmap); - } - vm_page_aflag_clear(m, PGA_WRITEABLE); - rw_wunlock(lock); - vm_page_free_pages_toq(&free, true); -} - -/* - * Destroy all managed, non-wired mappings in the given user-space - * pmap. This pmap cannot be active on any processor besides the - * caller. - * - * This function cannot be applied to the kernel pmap. Moreover, it - * is not intended for general use. It is only to be used during - * process termination. Consequently, it can be implemented in ways - * that make it faster than pmap_remove(). First, it can more quickly - * destroy mappings by iterating over the pmap's collection of PV - * entries, rather than searching the page table. Second, it doesn't - * have to test and clear the page table entries atomically, because - * no processor is currently accessing the user address space. In - * particular, a page table entry's dirty bit won't change state once - * this function starts. - * - * Although this function destroys all of the pmap's managed, - * non-wired mappings, it can delay and batch the invalidation of TLB - * entries without calling pmap_delayed_invl_started() and - * pmap_delayed_invl_finished(). Because the pmap is not active on - * any other processor, none of these TLB entries will ever be used - * before their eventual invalidation. Consequently, there is no need - * for either pmap_remove_all() or pmap_remove_write() to wait for - * that eventual TLB invalidation. - */ - -void -mmu_radix_remove_pages(pmap_t pmap) -{ - - CTR2(KTR_PMAP, "%s(%p)", __func__, pmap); - pml3_entry_t ptel3e; - pt_entry_t *pte, tpte; - struct spglist free; - vm_page_t m, mpte, mt; - pv_entry_t pv; - struct md_page *pvh; - struct pv_chunk *pc, *npc; - struct rwlock *lock; - int64_t bit; - uint64_t inuse, bitmask; - int allfree, field, idx; -#ifdef PV_STATS - int freed; -#endif - boolean_t superpage; - vm_paddr_t pa; - - /* - * Assert that the given pmap is only active on the current - * CPU. Unfortunately, we cannot block another CPU from - * activating the pmap while this function is executing. - */ - KASSERT(pmap->pm_pid == mfspr(SPR_PID), - ("non-current asid %lu - expected %lu", pmap->pm_pid, - mfspr(SPR_PID))); - - lock = NULL; - - SLIST_INIT(&free); - PMAP_LOCK(pmap); - TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) { - allfree = 1; -#ifdef PV_STATS - freed = 0; -#endif - for (field = 0; field < _NPCM; field++) { - inuse = ~pc->pc_map[field] & pc_freemask[field]; - while (inuse != 0) { - bit = cnttzd(inuse); - bitmask = 1UL << bit; - idx = field * 64 + bit; - pv = &pc->pc_pventry[idx]; - inuse &= ~bitmask; - - pte = pmap_pml2e(pmap, pv->pv_va); - ptel3e = be64toh(*pte); - pte = pmap_l2e_to_l3e(pte, pv->pv_va); - tpte = be64toh(*pte); - if ((tpte & (RPTE_LEAF | PG_V)) == PG_V) { - superpage = FALSE; - ptel3e = tpte; - pte = (pt_entry_t *)PHYS_TO_DMAP(tpte & - PG_FRAME); - pte = &pte[pmap_pte_index(pv->pv_va)]; - tpte = be64toh(*pte); - } else { - /* - * Keep track whether 'tpte' is a - * superpage explicitly instead of - * relying on RPTE_LEAF being set. - * - * This is because RPTE_LEAF is numerically - * identical to PG_PTE_PAT and thus a - * regular page could be mistaken for - * a superpage. - */ - superpage = TRUE; - } - - if ((tpte & PG_V) == 0) { - panic("bad pte va %lx pte %lx", - pv->pv_va, tpte); - } - -/* - * We cannot remove wired pages from a process' mapping at this time - */ - if (tpte & PG_W) { - allfree = 0; - continue; - } - - if (superpage) - pa = tpte & PG_PS_FRAME; - else - pa = tpte & PG_FRAME; - - m = PHYS_TO_VM_PAGE(pa); - KASSERT(m->phys_addr == pa, - ("vm_page_t %p phys_addr mismatch %016jx %016jx", - m, (uintmax_t)m->phys_addr, - (uintmax_t)tpte)); - - KASSERT((m->flags & PG_FICTITIOUS) != 0 || - m < &vm_page_array[vm_page_array_size], - ("pmap_remove_pages: bad tpte %#jx", - (uintmax_t)tpte)); - - pte_clear(pte); - - /* - * Update the vm_page_t clean/reference bits. - */ - if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) { - if (superpage) { - for (mt = m; mt < &m[L3_PAGE_SIZE / PAGE_SIZE]; mt++) - vm_page_dirty(mt); - } else - vm_page_dirty(m); - } - - CHANGE_PV_LIST_LOCK_TO_VM_PAGE(&lock, m); - - /* Mark free */ - pc->pc_map[field] |= bitmask; - if (superpage) { - pmap_resident_count_dec(pmap, L3_PAGE_SIZE / PAGE_SIZE); - pvh = pa_to_pvh(tpte & PG_PS_FRAME); - TAILQ_REMOVE(&pvh->pv_list, pv, pv_link); - pvh->pv_gen++; - if (TAILQ_EMPTY(&pvh->pv_list)) { - for (mt = m; mt < &m[L3_PAGE_SIZE / PAGE_SIZE]; mt++) - if ((mt->a.flags & PGA_WRITEABLE) != 0 && - TAILQ_EMPTY(&mt->md.pv_list)) - vm_page_aflag_clear(mt, PGA_WRITEABLE); - } - mpte = pmap_remove_pt_page(pmap, pv->pv_va); - if (mpte != NULL) { - pmap_resident_count_dec(pmap, 1); - KASSERT(mpte->ref_count == NPTEPG, - ("pmap_remove_pages: pte page wire count error")); - mpte->ref_count = 0; - pmap_add_delayed_free_list(mpte, &free, FALSE); - } - } else { - pmap_resident_count_dec(pmap, 1); -#ifdef VERBOSE_PV - printf("freeing pv (%p, %p)\n", - pmap, pv); -#endif - TAILQ_REMOVE(&m->md.pv_list, pv, pv_link); - m->md.pv_gen++; - if ((m->a.flags & PGA_WRITEABLE) != 0 && - TAILQ_EMPTY(&m->md.pv_list) && - (m->flags & PG_FICTITIOUS) == 0) { - pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); - if (TAILQ_EMPTY(&pvh->pv_list)) - vm_page_aflag_clear(m, PGA_WRITEABLE); - } - } - pmap_unuse_pt(pmap, pv->pv_va, ptel3e, &free); -#ifdef PV_STATS - freed++; -#endif - } - } - PV_STAT(atomic_add_long(&pv_entry_frees, freed)); - PV_STAT(atomic_add_int(&pv_entry_spare, freed)); - PV_STAT(atomic_subtract_long(&pv_entry_count, freed)); - if (allfree) { - TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); - free_pv_chunk(pc); - } - } - if (lock != NULL) - rw_wunlock(lock); - pmap_invalidate_all(pmap); - PMAP_UNLOCK(pmap); - vm_page_free_pages_toq(&free, true); -} - -void -mmu_radix_remove_write(vm_page_t m) -{ - struct md_page *pvh; - pmap_t pmap; - struct rwlock *lock; - pv_entry_t next_pv, pv; - pml3_entry_t *l3e; - pt_entry_t oldpte, *pte; - int pvh_gen, md_gen; - - CTR2(KTR_PMAP, "%s(%p)", __func__, m); - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("pmap_remove_write: page %p is not managed", m)); - vm_page_assert_busied(m); - - if (!pmap_page_is_write_mapped(m)) - return; - lock = VM_PAGE_TO_PV_LIST_LOCK(m); - pvh = (m->flags & PG_FICTITIOUS) != 0 ? &pv_dummy : - pa_to_pvh(VM_PAGE_TO_PHYS(m)); -retry_pv_loop: - rw_wlock(lock); - TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_link, next_pv) { - pmap = PV_PMAP(pv); - if (!PMAP_TRYLOCK(pmap)) { - pvh_gen = pvh->pv_gen; - rw_wunlock(lock); - PMAP_LOCK(pmap); - rw_wlock(lock); - if (pvh_gen != pvh->pv_gen) { - PMAP_UNLOCK(pmap); - rw_wunlock(lock); - goto retry_pv_loop; - } - } - l3e = pmap_pml3e(pmap, pv->pv_va); - if ((be64toh(*l3e) & PG_RW) != 0) - (void)pmap_demote_l3e_locked(pmap, l3e, pv->pv_va, &lock); - KASSERT(lock == VM_PAGE_TO_PV_LIST_LOCK(m), - ("inconsistent pv lock %p %p for page %p", - lock, VM_PAGE_TO_PV_LIST_LOCK(m), m)); - PMAP_UNLOCK(pmap); - } - TAILQ_FOREACH(pv, &m->md.pv_list, pv_link) { - pmap = PV_PMAP(pv); - if (!PMAP_TRYLOCK(pmap)) { - pvh_gen = pvh->pv_gen; - md_gen = m->md.pv_gen; - rw_wunlock(lock); - PMAP_LOCK(pmap); - rw_wlock(lock); - if (pvh_gen != pvh->pv_gen || - md_gen != m->md.pv_gen) { - PMAP_UNLOCK(pmap); - rw_wunlock(lock); - goto retry_pv_loop; - } - } - l3e = pmap_pml3e(pmap, pv->pv_va); - KASSERT((be64toh(*l3e) & RPTE_LEAF) == 0, - ("pmap_remove_write: found a 2mpage in page %p's pv list", - m)); - pte = pmap_l3e_to_pte(l3e, pv->pv_va); -retry: - oldpte = be64toh(*pte); - if (oldpte & PG_RW) { - if (!atomic_cmpset_long(pte, htobe64(oldpte), - htobe64((oldpte | RPTE_EAA_R) & ~(PG_RW | PG_M)))) - goto retry; - if ((oldpte & PG_M) != 0) - vm_page_dirty(m); - pmap_invalidate_page(pmap, pv->pv_va); - } - PMAP_UNLOCK(pmap); - } - rw_wunlock(lock); - vm_page_aflag_clear(m, PGA_WRITEABLE); -} - -/* - * Clear the wired attribute from the mappings for the specified range of - * addresses in the given pmap. Every valid mapping within that range - * must have the wired attribute set. In contrast, invalid mappings - * cannot have the wired attribute set, so they are ignored. - * - * The wired attribute of the page table entry is not a hardware - * feature, so there is no need to invalidate any TLB entries. - * Since pmap_demote_l3e() for the wired entry must never fail, - * pmap_delayed_invl_started()/finished() calls around the - * function are not needed. - */ -void -mmu_radix_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) -{ - vm_offset_t va_next; - pml1_entry_t *l1e; - pml2_entry_t *l2e; - pml3_entry_t *l3e; - pt_entry_t *pte; - - CTR4(KTR_PMAP, "%s(%p, %#x, %#x)", __func__, pmap, sva, eva); - PMAP_LOCK(pmap); - for (; sva < eva; sva = va_next) { - l1e = pmap_pml1e(pmap, sva); - if ((be64toh(*l1e) & PG_V) == 0) { - va_next = (sva + L1_PAGE_SIZE) & ~L1_PAGE_MASK; - if (va_next < sva) - va_next = eva; - continue; - } - l2e = pmap_l1e_to_l2e(l1e, sva); - if ((be64toh(*l2e) & PG_V) == 0) { - va_next = (sva + L2_PAGE_SIZE) & ~L2_PAGE_MASK; - if (va_next < sva) - va_next = eva; - continue; - } - va_next = (sva + L3_PAGE_SIZE) & ~L3_PAGE_MASK; - if (va_next < sva) - va_next = eva; - l3e = pmap_l2e_to_l3e(l2e, sva); - if ((be64toh(*l3e) & PG_V) == 0) - continue; - if ((be64toh(*l3e) & RPTE_LEAF) != 0) { - if ((be64toh(*l3e) & PG_W) == 0) - panic("pmap_unwire: pde %#jx is missing PG_W", - (uintmax_t)(be64toh(*l3e))); - - /* - * Are we unwiring the entire large page? If not, - * demote the mapping and fall through. - */ - if (sva + L3_PAGE_SIZE == va_next && eva >= va_next) { - atomic_clear_long(l3e, htobe64(PG_W)); - pmap->pm_stats.wired_count -= L3_PAGE_SIZE / - PAGE_SIZE; - continue; - } else if (!pmap_demote_l3e(pmap, l3e, sva)) - panic("pmap_unwire: demotion failed"); - } - if (va_next > eva) - va_next = eva; - for (pte = pmap_l3e_to_pte(l3e, sva); sva != va_next; pte++, - sva += PAGE_SIZE) { - MPASS(pte == pmap_pte(pmap, sva)); - if ((be64toh(*pte) & PG_V) == 0) - continue; - if ((be64toh(*pte) & PG_W) == 0) - panic("pmap_unwire: pte %#jx is missing PG_W", - (uintmax_t)(be64toh(*pte))); - - /* - * PG_W must be cleared atomically. Although the pmap - * lock synchronizes access to PG_W, another processor - * could be setting PG_M and/or PG_A concurrently. - */ - atomic_clear_long(pte, htobe64(PG_W)); - pmap->pm_stats.wired_count--; - } - } - PMAP_UNLOCK(pmap); -} - -void -mmu_radix_zero_page(vm_page_t m) -{ - vm_offset_t addr; - - CTR2(KTR_PMAP, "%s(%p)", __func__, m); - addr = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)); - pagezero(addr); -} - -void -mmu_radix_zero_page_area(vm_page_t m, int off, int size) -{ - caddr_t addr; - - CTR4(KTR_PMAP, "%s(%p, %d, %d)", __func__, m, off, size); - MPASS(off + size <= PAGE_SIZE); - addr = (caddr_t)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)); - memset(addr + off, 0, size); -} - -static int -mmu_radix_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa) -{ - pml3_entry_t *l3ep; - pt_entry_t pte; - vm_paddr_t pa; - int val; - - CTR3(KTR_PMAP, "%s(%p, %#x)", __func__, pmap, addr); - PMAP_LOCK(pmap); - - l3ep = pmap_pml3e(pmap, addr); - if (l3ep != NULL && (be64toh(*l3ep) & PG_V)) { - if (be64toh(*l3ep) & RPTE_LEAF) { - pte = be64toh(*l3ep); - /* Compute the physical address of the 4KB page. */ - pa = ((be64toh(*l3ep) & PG_PS_FRAME) | (addr & L3_PAGE_MASK)) & - PG_FRAME; - val = MINCORE_PSIND(1); - } else { - /* Native endian PTE, do not pass to functions */ - pte = be64toh(*pmap_l3e_to_pte(l3ep, addr)); - pa = pte & PG_FRAME; - val = 0; - } - } else { - pte = 0; - pa = 0; - val = 0; - } - if ((pte & PG_V) != 0) { - val |= MINCORE_INCORE; - if ((pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) - val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER; - if ((pte & PG_A) != 0) - val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER; - } - if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) != - (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && - (pte & (PG_MANAGED | PG_V)) == (PG_MANAGED | PG_V)) { - *locked_pa = pa; - } - PMAP_UNLOCK(pmap); - return (val); -} - -void -mmu_radix_activate(struct thread *td) -{ - pmap_t pmap; - uint32_t curpid; - - CTR2(KTR_PMAP, "%s(%p)", __func__, td); - critical_enter(); - pmap = vmspace_pmap(td->td_proc->p_vmspace); - curpid = mfspr(SPR_PID); - if (pmap->pm_pid > isa3_base_pid && - curpid != pmap->pm_pid) { - mmu_radix_pid_set(pmap); - } - critical_exit(); -} - -/* - * Increase the starting virtual address of the given mapping if a - * different alignment might result in more superpage mappings. - */ -void -mmu_radix_align_superpage(vm_object_t object, vm_ooffset_t offset, - vm_offset_t *addr, vm_size_t size) -{ - - CTR5(KTR_PMAP, "%s(%p, %#x, %p, %#x)", __func__, object, offset, addr, - size); - vm_offset_t superpage_offset; - - if (size < L3_PAGE_SIZE) - return; - if (object != NULL && (object->flags & OBJ_COLORED) != 0) - offset += ptoa(object->pg_color); - superpage_offset = offset & L3_PAGE_MASK; - if (size - ((L3_PAGE_SIZE - superpage_offset) & L3_PAGE_MASK) < L3_PAGE_SIZE || - (*addr & L3_PAGE_MASK) == superpage_offset) - return; - if ((*addr & L3_PAGE_MASK) < superpage_offset) - *addr = (*addr & ~L3_PAGE_MASK) + superpage_offset; - else - *addr = ((*addr + L3_PAGE_MASK) & ~L3_PAGE_MASK) + superpage_offset; -} - -static void * -mmu_radix_mapdev_attr(vm_paddr_t pa, vm_size_t size, vm_memattr_t attr) -{ - vm_offset_t va, tmpva, ppa, offset; - - ppa = trunc_page(pa); - offset = pa & PAGE_MASK; - size = roundup2(offset + size, PAGE_SIZE); - if (pa < powerpc_ptob(Maxmem)) - panic("bad pa: %#lx less than Maxmem %#lx\n", - pa, powerpc_ptob(Maxmem)); - va = kva_alloc(size); - if (bootverbose) - printf("%s(%#lx, %lu, %d)\n", __func__, pa, size, attr); - KASSERT(size > 0, ("%s(%#lx, %lu, %d)", __func__, pa, size, attr)); - - if (!va) - panic("%s: Couldn't alloc kernel virtual memory", __func__); - - for (tmpva = va; size > 0;) { - mmu_radix_kenter_attr(tmpva, ppa, attr); - size -= PAGE_SIZE; - tmpva += PAGE_SIZE; - ppa += PAGE_SIZE; - } - ptesync(); - - return ((void *)(va + offset)); -} - -static void * -mmu_radix_mapdev(vm_paddr_t pa, vm_size_t size) -{ - - CTR3(KTR_PMAP, "%s(%#x, %#x)", __func__, pa, size); - - return (mmu_radix_mapdev_attr(pa, size, VM_MEMATTR_DEFAULT)); -} - -void -mmu_radix_page_set_memattr(vm_page_t m, vm_memattr_t ma) -{ - - CTR3(KTR_PMAP, "%s(%p, %#x)", __func__, m, ma); - m->md.mdpg_cache_attrs = ma; - - /* - * If "m" is a normal page, update its direct mapping. This update - * can be relied upon to perform any cache operations that are - * required for data coherence. - */ - if ((m->flags & PG_FICTITIOUS) == 0 && - mmu_radix_change_attr(PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)), - PAGE_SIZE, m->md.mdpg_cache_attrs)) - panic("memory attribute change on the direct map failed"); -} - -static void -mmu_radix_unmapdev(vm_offset_t va, vm_size_t size) -{ - vm_offset_t offset; - - CTR3(KTR_PMAP, "%s(%#x, %#x)", __func__, va, size); - /* If we gave a direct map region in pmap_mapdev, do nothing */ - if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) - return; - - offset = va & PAGE_MASK; - size = round_page(offset + size); - va = trunc_page(va); - - if (pmap_initialized) { - mmu_radix_qremove(va, atop(size)); - kva_free(va, size); - } -} - -void -mmu_radix_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz) -{ - vm_paddr_t pa = 0; - int sync_sz; - - while (sz > 0) { - pa = pmap_extract(pm, va); - sync_sz = PAGE_SIZE - (va & PAGE_MASK); - sync_sz = min(sync_sz, sz); - if (pa != 0) { - pa += (va & PAGE_MASK); - __syncicache((void *)PHYS_TO_DMAP(pa), sync_sz); - } - va += sync_sz; - sz -= sync_sz; - } -} - -static __inline void -pmap_pte_attr(pt_entry_t *pte, uint64_t cache_bits, uint64_t mask) -{ - uint64_t opte, npte; - - /* - * The cache mode bits are all in the low 32-bits of the - * PTE, so we can just spin on updating the low 32-bits. - */ - do { - opte = be64toh(*pte); - npte = opte & ~mask; - npte |= cache_bits; - } while (npte != opte && !atomic_cmpset_long(pte, htobe64(opte), htobe64(npte))); -} - -/* - * Tries to demote a 1GB page mapping. - */ -static boolean_t -pmap_demote_l2e(pmap_t pmap, pml2_entry_t *l2e, vm_offset_t va) -{ - pml2_entry_t oldpdpe; - pml3_entry_t *firstpde, newpde, *pde; - vm_paddr_t pdpgpa; - vm_page_t pdpg; - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - oldpdpe = be64toh(*l2e); - KASSERT((oldpdpe & (RPTE_LEAF | PG_V)) == (RPTE_LEAF | PG_V), - ("pmap_demote_pdpe: oldpdpe is missing PG_PS and/or PG_V")); - pdpg = vm_page_alloc_noobj(VM_ALLOC_INTERRUPT | VM_ALLOC_WIRED); - if (pdpg == NULL) { - CTR2(KTR_PMAP, "pmap_demote_pdpe: failure for va %#lx" - " in pmap %p", va, pmap); - return (FALSE); - } - pdpg->pindex = va >> L2_PAGE_SIZE_SHIFT; - pdpgpa = VM_PAGE_TO_PHYS(pdpg); - firstpde = (pml3_entry_t *)PHYS_TO_DMAP(pdpgpa); - KASSERT((oldpdpe & PG_A) != 0, - ("pmap_demote_pdpe: oldpdpe is missing PG_A")); - KASSERT((oldpdpe & (PG_M | PG_RW)) != PG_RW, - ("pmap_demote_pdpe: oldpdpe is missing PG_M")); - newpde = oldpdpe; - - /* - * Initialize the page directory page. - */ - for (pde = firstpde; pde < firstpde + NPDEPG; pde++) { - *pde = htobe64(newpde); - newpde += L3_PAGE_SIZE; - } - - /* - * Demote the mapping. - */ - pde_store(l2e, pdpgpa); - - /* - * Flush PWC --- XXX revisit - */ - pmap_invalidate_all(pmap); - - pmap_l2e_demotions++; - CTR2(KTR_PMAP, "pmap_demote_pdpe: success for va %#lx" - " in pmap %p", va, pmap); - return (TRUE); -} - -vm_paddr_t -mmu_radix_kextract(vm_offset_t va) -{ - pml3_entry_t l3e; - vm_paddr_t pa; - - CTR2(KTR_PMAP, "%s(%#x)", __func__, va); - if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) { - pa = DMAP_TO_PHYS(va); - } else { - /* Big-endian PTE on stack */ - l3e = *pmap_pml3e(kernel_pmap, va); - if (be64toh(l3e) & RPTE_LEAF) { - pa = (be64toh(l3e) & PG_PS_FRAME) | (va & L3_PAGE_MASK); - pa |= (va & L3_PAGE_MASK); - } else { - /* - * Beware of a concurrent promotion that changes the - * PDE at this point! For example, vtopte() must not - * be used to access the PTE because it would use the - * new PDE. It is, however, safe to use the old PDE - * because the page table page is preserved by the - * promotion. - */ - pa = be64toh(*pmap_l3e_to_pte(&l3e, va)); - pa = (pa & PG_FRAME) | (va & PAGE_MASK); - pa |= (va & PAGE_MASK); - } - } - return (pa); -} - -static pt_entry_t -mmu_radix_calc_wimg(vm_paddr_t pa, vm_memattr_t ma) -{ - - if (ma != VM_MEMATTR_DEFAULT) { - return pmap_cache_bits(ma); - } - - /* - * Assume the page is cache inhibited and access is guarded unless - * it's in our available memory array. - */ - for (int i = 0; i < pregions_sz; i++) { - if ((pa >= pregions[i].mr_start) && - (pa < (pregions[i].mr_start + pregions[i].mr_size))) - return (RPTE_ATTR_MEM); - } - return (RPTE_ATTR_GUARDEDIO); -} - -static void -mmu_radix_kenter_attr(vm_offset_t va, vm_paddr_t pa, vm_memattr_t ma) -{ - pt_entry_t *pte, pteval; - uint64_t cache_bits; - - pte = kvtopte(va); - MPASS(pte != NULL); - pteval = pa | RPTE_EAA_R | RPTE_EAA_W | RPTE_EAA_P | PG_M | PG_A; - cache_bits = mmu_radix_calc_wimg(pa, ma); - pte_store(pte, pteval | cache_bits); -} - -void -mmu_radix_kremove(vm_offset_t va) -{ - pt_entry_t *pte; - - CTR2(KTR_PMAP, "%s(%#x)", __func__, va); - - pte = kvtopte(va); - pte_clear(pte); -} - -int -mmu_radix_decode_kernel_ptr(vm_offset_t addr, - int *is_user, vm_offset_t *decoded) -{ - - CTR2(KTR_PMAP, "%s(%#jx)", __func__, (uintmax_t)addr); - *decoded = addr; - *is_user = (addr < VM_MAXUSER_ADDRESS); - return (0); -} - -static int -mmu_radix_dev_direct_mapped(vm_paddr_t pa, vm_size_t size) -{ - - CTR3(KTR_PMAP, "%s(%#x, %#x)", __func__, pa, size); - return (mem_valid(pa, size)); -} - -static void -mmu_radix_scan_init(void) -{ - - CTR1(KTR_PMAP, "%s()", __func__); - UNIMPLEMENTED(); -} - -static void -mmu_radix_dumpsys_map(vm_paddr_t pa, size_t sz, - void **va) -{ - CTR4(KTR_PMAP, "%s(%#jx, %#zx, %p)", __func__, (uintmax_t)pa, sz, va); - UNIMPLEMENTED(); -} - -vm_offset_t -mmu_radix_quick_enter_page(vm_page_t m) -{ - vm_paddr_t paddr; - - CTR2(KTR_PMAP, "%s(%p)", __func__, m); - paddr = VM_PAGE_TO_PHYS(m); - return (PHYS_TO_DMAP(paddr)); -} - -void -mmu_radix_quick_remove_page(vm_offset_t addr __unused) -{ - /* no work to do here */ - CTR2(KTR_PMAP, "%s(%#x)", __func__, addr); -} - -static void -pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva) -{ - cpu_flush_dcache((void *)sva, eva - sva); -} - -int -mmu_radix_change_attr(vm_offset_t va, vm_size_t size, - vm_memattr_t mode) -{ - int error; - - CTR4(KTR_PMAP, "%s(%#x, %#zx, %d)", __func__, va, size, mode); - PMAP_LOCK(kernel_pmap); - error = pmap_change_attr_locked(va, size, mode, true); - PMAP_UNLOCK(kernel_pmap); - return (error); -} - -static int -pmap_change_attr_locked(vm_offset_t va, vm_size_t size, int mode, bool flush) -{ - vm_offset_t base, offset, tmpva; - vm_paddr_t pa_start, pa_end, pa_end1; - pml2_entry_t *l2e; - pml3_entry_t *l3e; - pt_entry_t *pte; - int cache_bits, error; - boolean_t changed; - - PMAP_LOCK_ASSERT(kernel_pmap, MA_OWNED); - base = trunc_page(va); - offset = va & PAGE_MASK; - size = round_page(offset + size); - - /* - * Only supported on kernel virtual addresses, including the direct - * map but excluding the recursive map. - */ - if (base < DMAP_MIN_ADDRESS) - return (EINVAL); - - cache_bits = pmap_cache_bits(mode); - changed = FALSE; - - /* - * Pages that aren't mapped aren't supported. Also break down 2MB pages - * into 4KB pages if required. - */ - for (tmpva = base; tmpva < base + size; ) { - l2e = pmap_pml2e(kernel_pmap, tmpva); - if (l2e == NULL || *l2e == 0) - return (EINVAL); - if (be64toh(*l2e) & RPTE_LEAF) { - /* - * If the current 1GB page already has the required - * memory type, then we need not demote this page. Just - * increment tmpva to the next 1GB page frame. - */ - if ((be64toh(*l2e) & RPTE_ATTR_MASK) == cache_bits) { - tmpva = trunc_1gpage(tmpva) + L2_PAGE_SIZE; - continue; - } - - /* - * If the current offset aligns with a 1GB page frame - * and there is at least 1GB left within the range, then - * we need not break down this page into 2MB pages. - */ - if ((tmpva & L2_PAGE_MASK) == 0 && - tmpva + L2_PAGE_MASK < base + size) { - tmpva += L2_PAGE_MASK; - continue; - } - if (!pmap_demote_l2e(kernel_pmap, l2e, tmpva)) - return (ENOMEM); - } - l3e = pmap_l2e_to_l3e(l2e, tmpva); - KASSERT(l3e != NULL, ("no l3e entry for %#lx in %p\n", - tmpva, l2e)); - if (*l3e == 0) - return (EINVAL); - if (be64toh(*l3e) & RPTE_LEAF) { - /* - * If the current 2MB page already has the required - * memory type, then we need not demote this page. Just - * increment tmpva to the next 2MB page frame. - */ - if ((be64toh(*l3e) & RPTE_ATTR_MASK) == cache_bits) { - tmpva = trunc_2mpage(tmpva) + L3_PAGE_SIZE; - continue; - } - - /* - * If the current offset aligns with a 2MB page frame - * and there is at least 2MB left within the range, then - * we need not break down this page into 4KB pages. - */ - if ((tmpva & L3_PAGE_MASK) == 0 && - tmpva + L3_PAGE_MASK < base + size) { - tmpva += L3_PAGE_SIZE; - continue; - } - if (!pmap_demote_l3e(kernel_pmap, l3e, tmpva)) - return (ENOMEM); - } - pte = pmap_l3e_to_pte(l3e, tmpva); - if (*pte == 0) - return (EINVAL); - tmpva += PAGE_SIZE; - } - error = 0; - - /* - * Ok, all the pages exist, so run through them updating their - * cache mode if required. - */ - pa_start = pa_end = 0; - for (tmpva = base; tmpva < base + size; ) { - l2e = pmap_pml2e(kernel_pmap, tmpva); - if (be64toh(*l2e) & RPTE_LEAF) { - if ((be64toh(*l2e) & RPTE_ATTR_MASK) != cache_bits) { - pmap_pte_attr(l2e, cache_bits, - RPTE_ATTR_MASK); - changed = TRUE; - } - if (tmpva >= VM_MIN_KERNEL_ADDRESS && - (*l2e & PG_PS_FRAME) < dmaplimit) { - if (pa_start == pa_end) { - /* Start physical address run. */ - pa_start = be64toh(*l2e) & PG_PS_FRAME; - pa_end = pa_start + L2_PAGE_SIZE; - } else if (pa_end == (be64toh(*l2e) & PG_PS_FRAME)) - pa_end += L2_PAGE_SIZE; - else { - /* Run ended, update direct map. */ - error = pmap_change_attr_locked( - PHYS_TO_DMAP(pa_start), - pa_end - pa_start, mode, flush); - if (error != 0) - break; - /* Start physical address run. */ - pa_start = be64toh(*l2e) & PG_PS_FRAME; - pa_end = pa_start + L2_PAGE_SIZE; - } - } - tmpva = trunc_1gpage(tmpva) + L2_PAGE_SIZE; - continue; - } - l3e = pmap_l2e_to_l3e(l2e, tmpva); - if (be64toh(*l3e) & RPTE_LEAF) { - if ((be64toh(*l3e) & RPTE_ATTR_MASK) != cache_bits) { - pmap_pte_attr(l3e, cache_bits, - RPTE_ATTR_MASK); - changed = TRUE; - } - if (tmpva >= VM_MIN_KERNEL_ADDRESS && - (be64toh(*l3e) & PG_PS_FRAME) < dmaplimit) { - if (pa_start == pa_end) { - /* Start physical address run. */ - pa_start = be64toh(*l3e) & PG_PS_FRAME; - pa_end = pa_start + L3_PAGE_SIZE; - } else if (pa_end == (be64toh(*l3e) & PG_PS_FRAME)) - pa_end += L3_PAGE_SIZE; - else { - /* Run ended, update direct map. */ - error = pmap_change_attr_locked( - PHYS_TO_DMAP(pa_start), - pa_end - pa_start, mode, flush); - if (error != 0) - break; - /* Start physical address run. */ - pa_start = be64toh(*l3e) & PG_PS_FRAME; - pa_end = pa_start + L3_PAGE_SIZE; - } - } - tmpva = trunc_2mpage(tmpva) + L3_PAGE_SIZE; - } else { - pte = pmap_l3e_to_pte(l3e, tmpva); - if ((be64toh(*pte) & RPTE_ATTR_MASK) != cache_bits) { - pmap_pte_attr(pte, cache_bits, - RPTE_ATTR_MASK); - changed = TRUE; - } - if (tmpva >= VM_MIN_KERNEL_ADDRESS && - (be64toh(*pte) & PG_FRAME) < dmaplimit) { - if (pa_start == pa_end) { - /* Start physical address run. */ - pa_start = be64toh(*pte) & PG_FRAME; - pa_end = pa_start + PAGE_SIZE; - } else if (pa_end == (be64toh(*pte) & PG_FRAME)) - pa_end += PAGE_SIZE; - else { - /* Run ended, update direct map. */ - error = pmap_change_attr_locked( - PHYS_TO_DMAP(pa_start), - pa_end - pa_start, mode, flush); - if (error != 0) - break; - /* Start physical address run. */ - pa_start = be64toh(*pte) & PG_FRAME; - pa_end = pa_start + PAGE_SIZE; - } - } - tmpva += PAGE_SIZE; - } - } - if (error == 0 && pa_start != pa_end && pa_start < dmaplimit) { - pa_end1 = MIN(pa_end, dmaplimit); - if (pa_start != pa_end1) - error = pmap_change_attr_locked(PHYS_TO_DMAP(pa_start), - pa_end1 - pa_start, mode, flush); - } - - /* - * Flush CPU caches if required to make sure any data isn't cached that - * shouldn't be, etc. - */ - if (changed) { - pmap_invalidate_all(kernel_pmap); - - if (flush) - pmap_invalidate_cache_range(base, tmpva); - } - return (error); -} - -/* - * Allocate physical memory for the vm_page array and map it into KVA, - * attempting to back the vm_pages with domain-local memory. - */ -void -mmu_radix_page_array_startup(long pages) -{ -#ifdef notyet - pml2_entry_t *l2e; - pml3_entry_t *pde; - pml3_entry_t newl3; - vm_offset_t va; - long pfn; - int domain, i; -#endif - vm_paddr_t pa; - vm_offset_t start, end; - - vm_page_array_size = pages; - - start = VM_MIN_KERNEL_ADDRESS; - end = start + pages * sizeof(struct vm_page); - - pa = vm_phys_early_alloc(0, end - start); - - start = mmu_radix_map(&start, pa, end - start, VM_MEMATTR_DEFAULT); -#ifdef notyet - /* TODO: NUMA vm_page_array. Blocked out until then (copied from amd64). */ - for (va = start; va < end; va += L3_PAGE_SIZE) { - pfn = first_page + (va - start) / sizeof(struct vm_page); - domain = vm_phys_domain(ptoa(pfn)); - l2e = pmap_pml2e(kernel_pmap, va); - if ((be64toh(*l2e) & PG_V) == 0) { - pa = vm_phys_early_alloc(domain, PAGE_SIZE); - dump_add_page(pa); - pagezero(PHYS_TO_DMAP(pa)); - pde_store(l2e, (pml2_entry_t)pa); - } - pde = pmap_l2e_to_l3e(l2e, va); - if ((be64toh(*pde) & PG_V) != 0) - panic("Unexpected pde %p", pde); - pa = vm_phys_early_alloc(domain, L3_PAGE_SIZE); - for (i = 0; i < NPDEPG; i++) - dump_add_page(pa + i * PAGE_SIZE); - newl3 = (pml3_entry_t)(pa | RPTE_EAA_P | RPTE_EAA_R | RPTE_EAA_W); - pte_store(pde, newl3); - } -#endif - vm_page_array = (vm_page_t)start; -} - -#ifdef DDB -#include -#include - -static void -pmap_pte_walk(pml1_entry_t *l1, vm_offset_t va) -{ - pml1_entry_t *l1e; - pml2_entry_t *l2e; - pml3_entry_t *l3e; - pt_entry_t *pte; - - l1e = &l1[pmap_pml1e_index(va)]; - db_printf("VA %#016lx l1e %#016lx", va, be64toh(*l1e)); - if ((be64toh(*l1e) & PG_V) == 0) { - db_printf("\n"); - return; - } - l2e = pmap_l1e_to_l2e(l1e, va); - db_printf(" l2e %#016lx", be64toh(*l2e)); - if ((be64toh(*l2e) & PG_V) == 0 || (be64toh(*l2e) & RPTE_LEAF) != 0) { - db_printf("\n"); - return; - } - l3e = pmap_l2e_to_l3e(l2e, va); - db_printf(" l3e %#016lx", be64toh(*l3e)); - if ((be64toh(*l3e) & PG_V) == 0 || (be64toh(*l3e) & RPTE_LEAF) != 0) { - db_printf("\n"); - return; - } - pte = pmap_l3e_to_pte(l3e, va); - db_printf(" pte %#016lx\n", be64toh(*pte)); -} - -void -pmap_page_print_mappings(vm_page_t m) -{ - pmap_t pmap; - pv_entry_t pv; - - db_printf("page %p(%lx)\n", m, m->phys_addr); - /* need to elide locks if running in ddb */ - TAILQ_FOREACH(pv, &m->md.pv_list, pv_link) { - db_printf("pv: %p ", pv); - db_printf("va: %#016lx ", pv->pv_va); - pmap = PV_PMAP(pv); - db_printf("pmap %p ", pmap); - if (pmap != NULL) { - db_printf("asid: %lu\n", pmap->pm_pid); - pmap_pte_walk(pmap->pm_pml1, pv->pv_va); - } - } -} - -DB_SHOW_COMMAND(pte, pmap_print_pte) -{ - vm_offset_t va; - pmap_t pmap; - - if (!have_addr) { - db_printf("show pte addr\n"); - return; - } - va = (vm_offset_t)addr; - - if (va >= DMAP_MIN_ADDRESS) - pmap = kernel_pmap; - else if (kdb_thread != NULL) - pmap = vmspace_pmap(kdb_thread->td_proc->p_vmspace); - else - pmap = vmspace_pmap(curthread->td_proc->p_vmspace); - - pmap_pte_walk(pmap->pm_pml1, va); -} - -#endif diff --git a/sys/powerpc/aim/moea64_native.c b/sys/powerpc/aim/moea64_native.c deleted file mode 100644 index 76730f81499..00000000000 --- a/sys/powerpc/aim/moea64_native.c +++ /dev/null @@ -1,1033 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause AND 4-Clause-BSD - * - * Copyright (c) 2001 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Matt Thomas of Allegro Networks, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: pmap.c,v 1.28 2000/03/26 20:42:36 kleink Exp $ - */ -/*- - * Copyright (C) 2001 Benno Rice. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -/* - * Native 64-bit page table operations for running without a hypervisor. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "mmu_oea64.h" - -#define PTESYNC() __asm __volatile("ptesync"); -#define TLBSYNC() __asm __volatile("tlbsync; ptesync"); -#define SYNC() __asm __volatile("sync"); -#define EIEIO() __asm __volatile("eieio"); - -#define VSID_HASH_MASK 0x0000007fffffffffULL - -/* POWER9 only permits a 64k partition table size. */ -#define PART_SIZE 0x10000 - -/* Actual page sizes (to be used with tlbie, when L=0) */ -#define AP_4K 0x00 -#define AP_16M 0x80 - -#define LPTE_KERNEL_VSID_BIT (KERNEL_VSID_BIT << \ - (16 - (ADDR_API_SHFT64 - ADDR_PIDX_SHFT))) - -/* Abbreviated Virtual Address Page - high bits */ -#define LPTE_AVA_PGNHI_MASK 0x0000000000000F80ULL -#define LPTE_AVA_PGNHI_SHIFT 7 - -/* Effective Address Page - low bits */ -#define EA_PAGELO_MASK 0x7ffULL -#define EA_PAGELO_SHIFT 11 - -static bool moea64_crop_tlbie; -static bool moea64_need_lock; - -/* - * The tlbie instruction has two forms: an old one used by PowerISA - * 2.03 and prior, and a newer one used by PowerISA 2.06 and later. - * We need to support both. - */ -static __inline void -TLBIE(uint64_t vpn, uint64_t oldptehi) -{ -#ifndef __powerpc64__ - register_t vpn_hi, vpn_lo; - register_t msr; - register_t scratch, intr; -#endif - - static volatile u_int tlbie_lock = 0; - bool need_lock = moea64_need_lock; - - vpn <<= ADDR_PIDX_SHFT; - - /* Hobo spinlock: we need stronger guarantees than mutexes provide */ - if (need_lock) { - while (!atomic_cmpset_int(&tlbie_lock, 0, 1)); - isync(); /* Flush instruction queue once lock acquired */ - - if (moea64_crop_tlbie) { - vpn &= ~(0xffffULL << 48); -#ifdef __powerpc64__ - if ((oldptehi & LPTE_BIG) != 0) - __asm __volatile("tlbie %0, 1" :: "r"(vpn) : - "memory"); - else - __asm __volatile("tlbie %0, 0" :: "r"(vpn) : - "memory"); - __asm __volatile("eieio; tlbsync; ptesync" ::: - "memory"); - goto done; -#endif - } - } - -#ifdef __powerpc64__ - /* - * If this page has LPTE_BIG set and is from userspace, then - * it must be a superpage with 4KB base/16MB actual page size. - */ - if ((oldptehi & LPTE_BIG) != 0 && - (oldptehi & LPTE_KERNEL_VSID_BIT) == 0) - vpn |= AP_16M; - - /* - * Explicitly clobber r0. The tlbie instruction has two forms: an old - * one used by PowerISA 2.03 and prior, and a newer one used by PowerISA - * 2.06 (maybe 2.05?) and later. We need to support both, and it just - * so happens that since we use 4k pages we can simply zero out r0, and - * clobber it, and the assembler will interpret the single-operand form - * of tlbie as having RB set, and everything else as 0. The RS operand - * in the newer form is in the same position as the L(page size) bit of - * the old form, so a slong as RS is 0, we're good on both sides. - */ - __asm __volatile("li 0, 0 \n tlbie %0, 0" :: "r"(vpn) : "r0", "memory"); - __asm __volatile("eieio; tlbsync; ptesync" ::: "memory"); -done: - -#else - vpn_hi = (uint32_t)(vpn >> 32); - vpn_lo = (uint32_t)vpn; - - intr = intr_disable(); - __asm __volatile("\ - mfmsr %0; \ - mr %1, %0; \ - insrdi %1,%5,1,0; \ - mtmsrd %1; isync; \ - \ - sld %1,%2,%4; \ - or %1,%1,%3; \ - tlbie %1; \ - \ - mtmsrd %0; isync; \ - eieio; \ - tlbsync; \ - ptesync;" - : "=r"(msr), "=r"(scratch) : "r"(vpn_hi), "r"(vpn_lo), "r"(32), "r"(1) - : "memory"); - intr_restore(intr); -#endif - - /* No barriers or special ops -- taken care of by ptesync above */ - if (need_lock) - tlbie_lock = 0; -} - -#define DISABLE_TRANS(msr) msr = mfmsr(); mtmsr(msr & ~PSL_DR) -#define ENABLE_TRANS(msr) mtmsr(msr) - -/* - * PTEG data. - */ -static volatile struct lpte *moea64_pteg_table; -static struct rwlock moea64_eviction_lock; - -static volatile struct pate *moea64_part_table; - -/* - * Dump function. - */ -static void *moea64_dump_pmap_native(void *ctx, void *buf, - u_long *nbytes); - -/* - * PTE calls. - */ -static int64_t moea64_pte_insert_native(struct pvo_entry *); -static int64_t moea64_pte_synch_native(struct pvo_entry *); -static int64_t moea64_pte_clear_native(struct pvo_entry *, uint64_t); -static int64_t moea64_pte_replace_native(struct pvo_entry *, int); -static int64_t moea64_pte_unset_native(struct pvo_entry *); -static int64_t moea64_pte_insert_sp_native(struct pvo_entry *); -static int64_t moea64_pte_unset_sp_native(struct pvo_entry *); -static int64_t moea64_pte_replace_sp_native(struct pvo_entry *); - -/* - * Utility routines. - */ -static void moea64_bootstrap_native( - vm_offset_t kernelstart, vm_offset_t kernelend); -static void moea64_cpu_bootstrap_native(int ap); -static void tlbia(void); -static void moea64_install_native(void); - -static struct pmap_funcs moea64_native_methods = { - .install = moea64_install_native, - - /* Internal interfaces */ - .bootstrap = moea64_bootstrap_native, - .cpu_bootstrap = moea64_cpu_bootstrap_native, - .dumpsys_dump_pmap = moea64_dump_pmap_native, -}; - -static struct moea64_funcs moea64_native_funcs = { - .pte_synch = moea64_pte_synch_native, - .pte_clear = moea64_pte_clear_native, - .pte_unset = moea64_pte_unset_native, - .pte_replace = moea64_pte_replace_native, - .pte_insert = moea64_pte_insert_native, - .pte_insert_sp = moea64_pte_insert_sp_native, - .pte_unset_sp = moea64_pte_unset_sp_native, - .pte_replace_sp = moea64_pte_replace_sp_native, -}; - -MMU_DEF_INHERIT(oea64_mmu_native, MMU_TYPE_G5, moea64_native_methods, oea64_mmu); - -static void -moea64_install_native(void) -{ - - /* Install the MOEA64 ops. */ - moea64_ops = &moea64_native_funcs; -} - -static int64_t -moea64_pte_synch_native(struct pvo_entry *pvo) -{ - volatile struct lpte *pt = moea64_pteg_table + pvo->pvo_pte.slot; - uint64_t ptelo, pvo_ptevpn; - - PMAP_LOCK_ASSERT(pvo->pvo_pmap, MA_OWNED); - - pvo_ptevpn = moea64_pte_vpn_from_pvo_vpn(pvo); - - rw_rlock(&moea64_eviction_lock); - if ((be64toh(pt->pte_hi) & LPTE_AVPN_MASK) != pvo_ptevpn) { - /* Evicted */ - rw_runlock(&moea64_eviction_lock); - return (-1); - } - - PTESYNC(); - ptelo = be64toh(pt->pte_lo); - - rw_runlock(&moea64_eviction_lock); - - return (ptelo & (LPTE_REF | LPTE_CHG)); -} - -static int64_t -moea64_pte_clear_native(struct pvo_entry *pvo, uint64_t ptebit) -{ - volatile struct lpte *pt = moea64_pteg_table + pvo->pvo_pte.slot; - struct lpte properpt; - uint64_t ptelo; - - PMAP_LOCK_ASSERT(pvo->pvo_pmap, MA_OWNED); - - moea64_pte_from_pvo(pvo, &properpt); - - rw_rlock(&moea64_eviction_lock); - if ((be64toh(pt->pte_hi) & LPTE_AVPN_MASK) != - (properpt.pte_hi & LPTE_AVPN_MASK)) { - /* Evicted */ - rw_runlock(&moea64_eviction_lock); - return (-1); - } - - if (ptebit == LPTE_REF) { - /* See "Resetting the Reference Bit" in arch manual */ - PTESYNC(); - /* 2-step here safe: precision is not guaranteed */ - ptelo = be64toh(pt->pte_lo); - - /* One-byte store to avoid touching the C bit */ - ((volatile uint8_t *)(&pt->pte_lo))[6] = -#if BYTE_ORDER == BIG_ENDIAN - ((uint8_t *)(&properpt.pte_lo))[6]; -#else - ((uint8_t *)(&properpt.pte_lo))[1]; -#endif - rw_runlock(&moea64_eviction_lock); - - critical_enter(); - TLBIE(pvo->pvo_vpn, properpt.pte_hi); - critical_exit(); - } else { - rw_runlock(&moea64_eviction_lock); - ptelo = moea64_pte_unset_native(pvo); - moea64_pte_insert_native(pvo); - } - - return (ptelo & (LPTE_REF | LPTE_CHG)); -} - -static __always_inline int64_t -moea64_pte_unset_locked(volatile struct lpte *pt, uint64_t vpn) -{ - uint64_t ptelo, ptehi; - - /* - * Invalidate the pte, briefly locking it to collect RC bits. No - * atomics needed since this is protected against eviction by the lock. - */ - isync(); - critical_enter(); - ptehi = (be64toh(pt->pte_hi) & ~LPTE_VALID) | LPTE_LOCKED; - pt->pte_hi = htobe64(ptehi); - PTESYNC(); - TLBIE(vpn, ptehi); - ptelo = be64toh(pt->pte_lo); - *((volatile int32_t *)(&pt->pte_hi) + 1) = 0; /* Release lock */ - critical_exit(); - - /* Keep statistics */ - STAT_MOEA64(moea64_pte_valid--); - - return (ptelo & (LPTE_CHG | LPTE_REF)); -} - -static int64_t -moea64_pte_unset_native(struct pvo_entry *pvo) -{ - volatile struct lpte *pt = moea64_pteg_table + pvo->pvo_pte.slot; - int64_t ret; - uint64_t pvo_ptevpn; - - pvo_ptevpn = moea64_pte_vpn_from_pvo_vpn(pvo); - - rw_rlock(&moea64_eviction_lock); - - if ((be64toh(pt->pte_hi) & LPTE_AVPN_MASK) != pvo_ptevpn) { - /* Evicted */ - STAT_MOEA64(moea64_pte_overflow--); - ret = -1; - } else - ret = moea64_pte_unset_locked(pt, pvo->pvo_vpn); - - rw_runlock(&moea64_eviction_lock); - - return (ret); -} - -static int64_t -moea64_pte_replace_inval_native(struct pvo_entry *pvo, - volatile struct lpte *pt) -{ - struct lpte properpt; - uint64_t ptelo, ptehi; - - moea64_pte_from_pvo(pvo, &properpt); - - rw_rlock(&moea64_eviction_lock); - if ((be64toh(pt->pte_hi) & LPTE_AVPN_MASK) != - (properpt.pte_hi & LPTE_AVPN_MASK)) { - /* Evicted */ - STAT_MOEA64(moea64_pte_overflow--); - rw_runlock(&moea64_eviction_lock); - return (-1); - } - - /* - * Replace the pte, briefly locking it to collect RC bits. No - * atomics needed since this is protected against eviction by the lock. - */ - isync(); - critical_enter(); - ptehi = (be64toh(pt->pte_hi) & ~LPTE_VALID) | LPTE_LOCKED; - pt->pte_hi = htobe64(ptehi); - PTESYNC(); - TLBIE(pvo->pvo_vpn, ptehi); - ptelo = be64toh(pt->pte_lo); - EIEIO(); - pt->pte_lo = htobe64(properpt.pte_lo); - EIEIO(); - pt->pte_hi = htobe64(properpt.pte_hi); /* Release lock */ - PTESYNC(); - critical_exit(); - rw_runlock(&moea64_eviction_lock); - - return (ptelo & (LPTE_CHG | LPTE_REF)); -} - -static int64_t -moea64_pte_replace_native(struct pvo_entry *pvo, int flags) -{ - volatile struct lpte *pt = moea64_pteg_table + pvo->pvo_pte.slot; - struct lpte properpt; - int64_t ptelo; - - if (flags == 0) { - /* Just some software bits changing. */ - moea64_pte_from_pvo(pvo, &properpt); - - rw_rlock(&moea64_eviction_lock); - if ((be64toh(pt->pte_hi) & LPTE_AVPN_MASK) != - (properpt.pte_hi & LPTE_AVPN_MASK)) { - rw_runlock(&moea64_eviction_lock); - return (-1); - } - pt->pte_hi = htobe64(properpt.pte_hi); - ptelo = be64toh(pt->pte_lo); - rw_runlock(&moea64_eviction_lock); - } else { - /* Otherwise, need reinsertion and deletion */ - ptelo = moea64_pte_replace_inval_native(pvo, pt); - } - - return (ptelo); -} - -static void -moea64_cpu_bootstrap_native(int ap) -{ - int i = 0; - #ifdef __powerpc64__ - struct slb *slb = PCPU_GET(aim.slb); - register_t seg0; - #endif - - /* - * Initialize segment registers and MMU - */ - - mtmsr(mfmsr() & ~PSL_DR & ~PSL_IR); - - switch(mfpvr() >> 16) { - case IBMPOWER9: - mtspr(SPR_HID0, mfspr(SPR_HID0) & ~HID0_RADIX); - break; - } - - /* - * Install kernel SLB entries - */ - - #ifdef __powerpc64__ - __asm __volatile ("slbia"); - __asm __volatile ("slbmfee %0,%1; slbie %0;" : "=r"(seg0) : - "r"(0)); - - for (i = 0; i < n_slbs; i++) { - if (!(slb[i].slbe & SLBE_VALID)) - continue; - - __asm __volatile ("slbmte %0, %1" :: - "r"(slb[i].slbv), "r"(slb[i].slbe)); - } - #else - for (i = 0; i < 16; i++) - mtsrin(i << ADDR_SR_SHFT, kernel_pmap->pm_sr[i]); - #endif - - /* - * Install page table - */ - - if (cpu_features2 & PPC_FEATURE2_ARCH_3_00) - mtspr(SPR_PTCR, - ((uintptr_t)moea64_part_table & ~DMAP_BASE_ADDRESS) | - flsl((PART_SIZE >> 12) - 1)); - else - __asm __volatile ("ptesync; mtsdr1 %0; isync" - :: "r"(((uintptr_t)moea64_pteg_table & ~DMAP_BASE_ADDRESS) - | (uintptr_t)(flsl(moea64_pteg_mask >> 11)))); - tlbia(); -} - -static void -moea64_bootstrap_native(vm_offset_t kernelstart, vm_offset_t kernelend) -{ - vm_size_t size; - vm_offset_t off; - vm_paddr_t pa; - register_t msr; - - moea64_early_bootstrap(kernelstart, kernelend); - - switch (mfpvr() >> 16) { - case IBMPOWER9: - moea64_need_lock = false; - break; - case IBMPOWER4: - case IBMPOWER4PLUS: - case IBM970: - case IBM970FX: - case IBM970GX: - case IBM970MP: - moea64_crop_tlbie = true; - default: - moea64_need_lock = true; - } - /* - * Allocate PTEG table. - */ - - size = moea64_pteg_count * sizeof(struct lpteg); - CTR2(KTR_PMAP, "moea64_bootstrap: %lu PTEGs, %lu bytes", - moea64_pteg_count, size); - rw_init(&moea64_eviction_lock, "pte eviction"); - - /* - * We now need to allocate memory. This memory, to be allocated, - * has to reside in a page table. The page table we are about to - * allocate. We don't have BAT. So drop to data real mode for a minute - * as a measure of last resort. We do this a couple times. - */ - /* - * PTEG table must be aligned on a 256k boundary, but can be placed - * anywhere with that alignment on POWER ISA 3+ systems. On earlier - * systems, offset addition is done by the CPU with bitwise OR rather - * than addition, so the table must also be aligned on a boundary of - * its own size. Pick the larger of the two, which works on all - * systems. - */ - moea64_pteg_table = (struct lpte *)moea64_bootstrap_alloc(size, - MAX(256*1024, size)); - if (hw_direct_map) - moea64_pteg_table = - (struct lpte *)PHYS_TO_DMAP((vm_offset_t)moea64_pteg_table); - /* Allocate partition table (ISA 3.0). */ - if (cpu_features2 & PPC_FEATURE2_ARCH_3_00) { - moea64_part_table = - (struct pate *)moea64_bootstrap_alloc(PART_SIZE, PART_SIZE); - moea64_part_table = - (struct pate *)PHYS_TO_DMAP((vm_offset_t)moea64_part_table); - } - DISABLE_TRANS(msr); - bzero(__DEVOLATILE(void *, moea64_pteg_table), moea64_pteg_count * - sizeof(struct lpteg)); - if (cpu_features2 & PPC_FEATURE2_ARCH_3_00) { - bzero(__DEVOLATILE(void *, moea64_part_table), PART_SIZE); - moea64_part_table[0].pagetab = htobe64( - (DMAP_TO_PHYS((vm_offset_t)moea64_pteg_table)) | - (uintptr_t)(flsl((moea64_pteg_count - 1) >> 11))); - } - ENABLE_TRANS(msr); - - CTR1(KTR_PMAP, "moea64_bootstrap: PTEG table at %p", moea64_pteg_table); - - moea64_mid_bootstrap(kernelstart, kernelend); - - /* - * Add a mapping for the page table itself if there is no direct map. - */ - if (!hw_direct_map) { - size = moea64_pteg_count * sizeof(struct lpteg); - off = (vm_offset_t)(moea64_pteg_table); - DISABLE_TRANS(msr); - for (pa = off; pa < off + size; pa += PAGE_SIZE) - pmap_kenter(pa, pa); - ENABLE_TRANS(msr); - } - - /* Bring up virtual memory */ - moea64_late_bootstrap(kernelstart, kernelend); -} - -static void -tlbia(void) -{ - vm_offset_t i; - #ifndef __powerpc64__ - register_t msr, scratch; - #endif - - i = 0xc00; /* IS = 11 */ - switch (mfpvr() >> 16) { - case IBM970: - case IBM970FX: - case IBM970MP: - case IBM970GX: - case IBMPOWER4: - case IBMPOWER4PLUS: - case IBMPOWER5: - case IBMPOWER5PLUS: - i = 0; /* IS not supported */ - break; - } - - TLBSYNC(); - - for (; i < 0x400000; i += 0x00001000) { - #ifdef __powerpc64__ - __asm __volatile("tlbiel %0" :: "r"(i)); - #else - __asm __volatile("\ - mfmsr %0; \ - mr %1, %0; \ - insrdi %1,%3,1,0; \ - mtmsrd %1; \ - isync; \ - \ - tlbiel %2; \ - \ - mtmsrd %0; \ - isync;" - : "=r"(msr), "=r"(scratch) : "r"(i), "r"(1)); - #endif - } - - EIEIO(); - TLBSYNC(); -} - -static int -atomic_pte_lock(volatile struct lpte *pte, uint64_t bitmask, uint64_t *oldhi) -{ - int ret; -#ifdef __powerpc64__ - uint64_t temp; -#else - uint32_t oldhihalf; -#endif - - /* - * Note: in principle, if just the locked bit were set here, we - * could avoid needing the eviction lock. However, eviction occurs - * so rarely that it isn't worth bothering about in practice. - */ -#ifdef __powerpc64__ - /* - * Note: Success of this sequence has the side effect of invalidating - * the PTE, as we are setting it to LPTE_LOCKED and discarding the - * other bits, including LPTE_V. - */ - __asm __volatile ( - "1:\tldarx %1, 0, %3\n\t" /* load old value */ - "and. %0,%1,%4\n\t" /* check if any bits set */ - "bne 2f\n\t" /* exit if any set */ - "stdcx. %5, 0, %3\n\t" /* attempt to store */ - "bne- 1b\n\t" /* spin if failed */ - "li %0, 1\n\t" /* success - retval = 1 */ - "b 3f\n\t" /* we've succeeded */ - "2:\n\t" - "stdcx. %1, 0, %3\n\t" /* clear reservation (74xx) */ - "li %0, 0\n\t" /* failure - retval = 0 */ - "3:\n\t" - : "=&r" (ret), "=&r"(temp), "=m" (pte->pte_hi) - : "r" ((volatile char *)&pte->pte_hi), - "r" (htobe64(bitmask)), "r" (htobe64(LPTE_LOCKED)), - "m" (pte->pte_hi) - : "cr0", "cr1", "cr2", "memory"); - *oldhi = be64toh(temp); -#else - /* - * This code is used on bridge mode only. - */ - __asm __volatile ( - "1:\tlwarx %1, 0, %3\n\t" /* load old value */ - "and. %0,%1,%4\n\t" /* check if any bits set */ - "bne 2f\n\t" /* exit if any set */ - "stwcx. %5, 0, %3\n\t" /* attempt to store */ - "bne- 1b\n\t" /* spin if failed */ - "li %0, 1\n\t" /* success - retval = 1 */ - "b 3f\n\t" /* we've succeeded */ - "2:\n\t" - "stwcx. %1, 0, %3\n\t" /* clear reservation (74xx) */ - "li %0, 0\n\t" /* failure - retval = 0 */ - "3:\n\t" - : "=&r" (ret), "=&r"(oldhihalf), "=m" (pte->pte_hi) - : "r" ((volatile char *)&pte->pte_hi + 4), - "r" ((uint32_t)bitmask), "r" ((uint32_t)LPTE_LOCKED), - "m" (pte->pte_hi) - : "cr0", "cr1", "cr2", "memory"); - - *oldhi = (pte->pte_hi & 0xffffffff00000000ULL) | oldhihalf; -#endif - - return (ret); -} - -static uintptr_t -moea64_insert_to_pteg_native(struct lpte *pvo_pt, uintptr_t slotbase, - uint64_t mask) -{ - volatile struct lpte *pt; - uint64_t oldptehi, va; - uintptr_t k; - int i, j; - - /* Start at a random slot */ - i = mftb() % 8; - for (j = 0; j < 8; j++) { - k = slotbase + (i + j) % 8; - pt = &moea64_pteg_table[k]; - /* Invalidate and seize lock only if no bits in mask set */ - if (atomic_pte_lock(pt, mask, &oldptehi)) /* Lock obtained */ - break; - } - - if (j == 8) - return (-1); - - if (oldptehi & LPTE_VALID) { - KASSERT(!(oldptehi & LPTE_WIRED), ("Unmapped wired entry")); - /* - * Need to invalidate old entry completely: see - * "Modifying a Page Table Entry". Need to reconstruct - * the virtual address for the outgoing entry to do that. - */ - va = oldptehi >> (ADDR_SR_SHFT - ADDR_API_SHFT64); - if (oldptehi & LPTE_HID) - va = (((k >> 3) ^ moea64_pteg_mask) ^ va) & - (ADDR_PIDX >> ADDR_PIDX_SHFT); - else - va = ((k >> 3) ^ va) & (ADDR_PIDX >> ADDR_PIDX_SHFT); - va |= (oldptehi & LPTE_AVPN_MASK) << - (ADDR_API_SHFT64 - ADDR_PIDX_SHFT); - PTESYNC(); - TLBIE(va, oldptehi); - STAT_MOEA64(moea64_pte_valid--); - STAT_MOEA64(moea64_pte_overflow++); - } - - /* - * Update the PTE as per "Adding a Page Table Entry". Lock is released - * by setting the high doubleworld. - */ - pt->pte_lo = htobe64(pvo_pt->pte_lo); - EIEIO(); - pt->pte_hi = htobe64(pvo_pt->pte_hi); - PTESYNC(); - - /* Keep statistics */ - STAT_MOEA64(moea64_pte_valid++); - - return (k); -} - -static __always_inline int64_t -moea64_pte_insert_locked(struct pvo_entry *pvo, struct lpte *insertpt, - uint64_t mask) -{ - uintptr_t slot; - - /* - * First try primary hash. - */ - slot = moea64_insert_to_pteg_native(insertpt, pvo->pvo_pte.slot, - mask | LPTE_WIRED | LPTE_LOCKED); - if (slot != -1) { - pvo->pvo_pte.slot = slot; - return (0); - } - - /* - * Now try secondary hash. - */ - pvo->pvo_vaddr ^= PVO_HID; - insertpt->pte_hi ^= LPTE_HID; - pvo->pvo_pte.slot ^= (moea64_pteg_mask << 3); - slot = moea64_insert_to_pteg_native(insertpt, pvo->pvo_pte.slot, - mask | LPTE_WIRED | LPTE_LOCKED); - if (slot != -1) { - pvo->pvo_pte.slot = slot; - return (0); - } - - return (-1); -} - -static int64_t -moea64_pte_insert_native(struct pvo_entry *pvo) -{ - struct lpte insertpt; - int64_t ret; - - /* Initialize PTE */ - moea64_pte_from_pvo(pvo, &insertpt); - - /* Make sure further insertion is locked out during evictions */ - rw_rlock(&moea64_eviction_lock); - - pvo->pvo_pte.slot &= ~7ULL; /* Base slot address */ - ret = moea64_pte_insert_locked(pvo, &insertpt, LPTE_VALID); - if (ret == -1) { - /* - * Out of luck. Find a PTE to sacrifice. - */ - - /* Lock out all insertions for a bit */ - if (!rw_try_upgrade(&moea64_eviction_lock)) { - rw_runlock(&moea64_eviction_lock); - rw_wlock(&moea64_eviction_lock); - } - /* Don't evict large pages */ - ret = moea64_pte_insert_locked(pvo, &insertpt, LPTE_BIG); - rw_wunlock(&moea64_eviction_lock); - /* No freeable slots in either PTEG? We're hosed. */ - if (ret == -1) - panic("moea64_pte_insert: overflow"); - } else - rw_runlock(&moea64_eviction_lock); - - return (0); -} - -static void * -moea64_dump_pmap_native(void *ctx, void *buf, u_long *nbytes) -{ - struct dump_context *dctx; - u_long ptex, ptex_end; - - dctx = (struct dump_context *)ctx; - ptex = dctx->ptex; - ptex_end = ptex + dctx->blksz / sizeof(struct lpte); - ptex_end = MIN(ptex_end, dctx->ptex_end); - *nbytes = (ptex_end - ptex) * sizeof(struct lpte); - - if (*nbytes == 0) - return (NULL); - - dctx->ptex = ptex_end; - return (__DEVOLATILE(struct lpte *, moea64_pteg_table) + ptex); -} - -static __always_inline uint64_t -moea64_vpn_from_pte(uint64_t ptehi, uintptr_t slot) -{ - uint64_t pgn, pgnlo, vsid; - - vsid = (ptehi & LPTE_AVA_MASK) >> LPTE_VSID_SHIFT; - if ((ptehi & LPTE_HID) != 0) - slot ^= (moea64_pteg_mask << 3); - pgnlo = ((vsid & VSID_HASH_MASK) ^ (slot >> 3)) & EA_PAGELO_MASK; - pgn = ((ptehi & LPTE_AVA_PGNHI_MASK) << (EA_PAGELO_SHIFT - - LPTE_AVA_PGNHI_SHIFT)) | pgnlo; - return ((vsid << 16) | pgn); -} - -static __always_inline int64_t -moea64_pte_unset_sp_locked(struct pvo_entry *pvo) -{ - volatile struct lpte *pt; - uint64_t ptehi, refchg, vpn; - vm_offset_t eva; - pmap_t pm; - - pm = pvo->pvo_pmap; - refchg = 0; - eva = PVO_VADDR(pvo) + HPT_SP_SIZE; - - for (; pvo != NULL && PVO_VADDR(pvo) < eva; - pvo = RB_NEXT(pvo_tree, &pm->pmap_pvo, pvo)) { - pt = moea64_pteg_table + pvo->pvo_pte.slot; - ptehi = be64toh(pt->pte_hi); - if ((ptehi & LPTE_AVPN_MASK) != - moea64_pte_vpn_from_pvo_vpn(pvo)) { - /* Evicted: invalidate new entry */ - STAT_MOEA64(moea64_pte_overflow--); - vpn = moea64_vpn_from_pte(ptehi, pvo->pvo_pte.slot); - CTR1(KTR_PMAP, "Evicted page in pte_unset_sp: vpn=%jx", - (uintmax_t)vpn); - /* Assume evicted page was modified */ - refchg |= LPTE_CHG; - } else - vpn = pvo->pvo_vpn; - - refchg |= moea64_pte_unset_locked(pt, vpn); - } - - return (refchg); -} - -static int64_t -moea64_pte_unset_sp_native(struct pvo_entry *pvo) -{ - uint64_t refchg; - - PMAP_LOCK_ASSERT(pvo->pvo_pmap, MA_OWNED); - KASSERT((PVO_VADDR(pvo) & HPT_SP_MASK) == 0, - ("%s: va %#jx unaligned", __func__, (uintmax_t)PVO_VADDR(pvo))); - - rw_rlock(&moea64_eviction_lock); - refchg = moea64_pte_unset_sp_locked(pvo); - rw_runlock(&moea64_eviction_lock); - - return (refchg); -} - -static __always_inline int64_t -moea64_pte_insert_sp_locked(struct pvo_entry *pvo) -{ - struct lpte insertpt; - int64_t ret; - vm_offset_t eva; - pmap_t pm; - - pm = pvo->pvo_pmap; - eva = PVO_VADDR(pvo) + HPT_SP_SIZE; - - for (; pvo != NULL && PVO_VADDR(pvo) < eva; - pvo = RB_NEXT(pvo_tree, &pm->pmap_pvo, pvo)) { - moea64_pte_from_pvo(pvo, &insertpt); - pvo->pvo_pte.slot &= ~7ULL; /* Base slot address */ - - ret = moea64_pte_insert_locked(pvo, &insertpt, LPTE_VALID); - if (ret == -1) { - /* Lock out all insertions for a bit */ - if (!rw_try_upgrade(&moea64_eviction_lock)) { - rw_runlock(&moea64_eviction_lock); - rw_wlock(&moea64_eviction_lock); - } - /* Don't evict large pages */ - ret = moea64_pte_insert_locked(pvo, &insertpt, - LPTE_BIG); - rw_downgrade(&moea64_eviction_lock); - /* No freeable slots in either PTEG? We're hosed. */ - if (ret == -1) - panic("moea64_pte_insert_sp: overflow"); - } - } - - return (0); -} - -static int64_t -moea64_pte_insert_sp_native(struct pvo_entry *pvo) -{ - PMAP_LOCK_ASSERT(pvo->pvo_pmap, MA_OWNED); - KASSERT((PVO_VADDR(pvo) & HPT_SP_MASK) == 0, - ("%s: va %#jx unaligned", __func__, (uintmax_t)PVO_VADDR(pvo))); - - rw_rlock(&moea64_eviction_lock); - moea64_pte_insert_sp_locked(pvo); - rw_runlock(&moea64_eviction_lock); - - return (0); -} - -static int64_t -moea64_pte_replace_sp_native(struct pvo_entry *pvo) -{ - uint64_t refchg; - - PMAP_LOCK_ASSERT(pvo->pvo_pmap, MA_OWNED); - KASSERT((PVO_VADDR(pvo) & HPT_SP_MASK) == 0, - ("%s: va %#jx unaligned", __func__, (uintmax_t)PVO_VADDR(pvo))); - - rw_rlock(&moea64_eviction_lock); - refchg = moea64_pte_unset_sp_locked(pvo); - moea64_pte_insert_sp_locked(pvo); - rw_runlock(&moea64_eviction_lock); - - return (refchg); -} diff --git a/sys/powerpc/aim/mp_cpudep.c b/sys/powerpc/aim/mp_cpudep.c deleted file mode 100644 index 10daff2d285..00000000000 --- a/sys/powerpc/aim/mp_cpudep.c +++ /dev/null @@ -1,424 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2008 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -void *ap_pcpu; - -static register_t bsp_state[8] __aligned(8); - -static void cpudep_save_config(void *dummy); -SYSINIT(cpu_save_config, SI_SUB_CPU, SI_ORDER_ANY, cpudep_save_config, NULL); - -void -cpudep_ap_early_bootstrap(void) -{ -#ifndef __powerpc64__ - register_t reg; -#endif - - switch (mfpvr() >> 16) { - case IBM970: - case IBM970FX: - case IBM970MP: - /* Set HIOR to 0 */ - __asm __volatile("mtspr 311,%0" :: "r"(0)); - powerpc_sync(); - - /* Restore HID4 and HID5, which are necessary for the MMU */ - -#ifdef __powerpc64__ - mtspr(SPR_HID4, bsp_state[2]); powerpc_sync(); isync(); - mtspr(SPR_HID5, bsp_state[3]); powerpc_sync(); isync(); -#else - __asm __volatile("ld %0, 16(%2); sync; isync; \ - mtspr %1, %0; sync; isync;" - : "=r"(reg) : "K"(SPR_HID4), "b"(bsp_state)); - __asm __volatile("ld %0, 24(%2); sync; isync; \ - mtspr %1, %0; sync; isync;" - : "=r"(reg) : "K"(SPR_HID5), "b"(bsp_state)); -#endif - powerpc_sync(); - break; - case IBMPOWER8: - case IBMPOWER8E: - case IBMPOWER8NVL: - case IBMPOWER9: -#ifdef __powerpc64__ - if (mfmsr() & PSL_HV) { - isync(); - /* - * Direct interrupts to SRR instead of HSRR and - * reset LPCR otherwise - */ - mtspr(SPR_LPID, 0); - isync(); - - mtspr(SPR_LPCR, lpcr); - isync(); - - /* - * Nuke FSCR, to be managed on a per-process basis - * later. - */ - mtspr(SPR_FSCR, 0); - } -#endif - break; - } - - __asm __volatile("mtsprg 0, %0" :: "r"(ap_pcpu)); - powerpc_sync(); -} - -uintptr_t -cpudep_ap_bootstrap(void) -{ - register_t msr, sp; - - msr = psl_kernset & ~PSL_EE; - mtmsr(msr); - - pcpup->pc_curthread = pcpup->pc_idlethread; -#ifdef __powerpc64__ - __asm __volatile("mr 13,%0" :: "r"(pcpup->pc_curthread)); -#else - __asm __volatile("mr 2,%0" :: "r"(pcpup->pc_curthread)); -#endif - pcpup->pc_curpcb = pcpup->pc_curthread->td_pcb; - sp = pcpup->pc_curpcb->pcb_sp; - schedinit_ap(); - - return (sp); -} - -static register_t -mpc74xx_l2_enable(register_t l2cr_config) -{ - register_t ccr, bit; - uint16_t vers; - - vers = mfpvr() >> 16; - switch (vers) { - case MPC7400: - case MPC7410: - bit = L2CR_L2IP; - break; - default: - bit = L2CR_L2I; - break; - } - - ccr = mfspr(SPR_L2CR); - if (ccr & L2CR_L2E) - return (ccr); - - /* Configure L2 cache. */ - ccr = l2cr_config & ~L2CR_L2E; - mtspr(SPR_L2CR, ccr | L2CR_L2I); - do { - ccr = mfspr(SPR_L2CR); - } while (ccr & bit); - powerpc_sync(); - mtspr(SPR_L2CR, l2cr_config); - powerpc_sync(); - - return (l2cr_config); -} - -static register_t -mpc745x_l3_enable(register_t l3cr_config) -{ - register_t ccr; - - ccr = mfspr(SPR_L3CR); - if (ccr & L3CR_L3E) - return (ccr); - - /* Configure L3 cache. */ - ccr = l3cr_config & ~(L3CR_L3E | L3CR_L3I | L3CR_L3PE | L3CR_L3CLKEN); - mtspr(SPR_L3CR, ccr); - ccr |= 0x4000000; /* Magic, but documented. */ - mtspr(SPR_L3CR, ccr); - ccr |= L3CR_L3CLKEN; - mtspr(SPR_L3CR, ccr); - mtspr(SPR_L3CR, ccr | L3CR_L3I); - while (mfspr(SPR_L3CR) & L3CR_L3I) - ; - mtspr(SPR_L3CR, ccr & ~L3CR_L3CLKEN); - powerpc_sync(); - DELAY(100); - mtspr(SPR_L3CR, ccr); - powerpc_sync(); - DELAY(100); - ccr |= L3CR_L3E; - mtspr(SPR_L3CR, ccr); - powerpc_sync(); - - return(ccr); -} - -static register_t -mpc74xx_l1d_enable(void) -{ - register_t hid; - - hid = mfspr(SPR_HID0); - if (hid & HID0_DCE) - return (hid); - - /* Enable L1 D-cache */ - hid |= HID0_DCE; - powerpc_sync(); - mtspr(SPR_HID0, hid | HID0_DCFI); - powerpc_sync(); - - return (hid); -} - -static register_t -mpc74xx_l1i_enable(void) -{ - register_t hid; - - hid = mfspr(SPR_HID0); - if (hid & HID0_ICE) - return (hid); - - /* Enable L1 I-cache */ - hid |= HID0_ICE; - isync(); - mtspr(SPR_HID0, hid | HID0_ICFI); - isync(); - - return (hid); -} - -static void -cpudep_save_config(void *dummy) -{ - uint16_t vers; - - vers = mfpvr() >> 16; - - switch(vers) { - case IBM970: - case IBM970FX: - case IBM970MP: - #ifdef __powerpc64__ - bsp_state[0] = mfspr(SPR_HID0); - bsp_state[1] = mfspr(SPR_HID1); - bsp_state[2] = mfspr(SPR_HID4); - bsp_state[3] = mfspr(SPR_HID5); - #else - __asm __volatile ("mfspr %0,%2; mr %1,%0; srdi %0,%0,32" - : "=r" (bsp_state[0]),"=r" (bsp_state[1]) : "K" (SPR_HID0)); - __asm __volatile ("mfspr %0,%2; mr %1,%0; srdi %0,%0,32" - : "=r" (bsp_state[2]),"=r" (bsp_state[3]) : "K" (SPR_HID1)); - __asm __volatile ("mfspr %0,%2; mr %1,%0; srdi %0,%0,32" - : "=r" (bsp_state[4]),"=r" (bsp_state[5]) : "K" (SPR_HID4)); - __asm __volatile ("mfspr %0,%2; mr %1,%0; srdi %0,%0,32" - : "=r" (bsp_state[6]),"=r" (bsp_state[7]) : "K" (SPR_HID5)); - #endif - - powerpc_sync(); - - break; - case IBMCELLBE: - #ifdef NOTYET /* Causes problems if in instruction stream on 970 */ - if (mfmsr() & PSL_HV) { - bsp_state[0] = mfspr(SPR_HID0); - bsp_state[1] = mfspr(SPR_HID1); - bsp_state[2] = mfspr(SPR_HID4); - bsp_state[3] = mfspr(SPR_HID6); - - bsp_state[4] = mfspr(SPR_CELL_TSCR); - } - #endif - - bsp_state[5] = mfspr(SPR_CELL_TSRL); - - break; - case MPC7450: - case MPC7455: - case MPC7457: - /* Only MPC745x CPUs have an L3 cache. */ - bsp_state[3] = mfspr(SPR_L3CR); - - /* Fallthrough */ - case MPC7400: - case MPC7410: - case MPC7447A: - case MPC7448: - bsp_state[2] = mfspr(SPR_L2CR); - bsp_state[1] = mfspr(SPR_HID1); - bsp_state[0] = mfspr(SPR_HID0); - break; - } -} - -void -cpudep_ap_setup() -{ - register_t reg; - uint16_t vers; - - vers = mfpvr() >> 16; - - switch(vers) { - case IBM970: - case IBM970FX: - case IBM970MP: - /* - * The 970 has strange rules about how to update HID registers. - * See Table 2-3, 970MP manual - * - * Note: HID4 and HID5 restored already in - * cpudep_ap_early_bootstrap() - */ - - __asm __volatile("mtasr %0; sync" :: "r"(0)); - #ifdef __powerpc64__ - __asm __volatile(" \ - sync; isync; \ - mtspr %1, %0; \ - mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; \ - mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; \ - sync; isync" - :: "r"(bsp_state[0]), "K"(SPR_HID0)); - __asm __volatile("sync; isync; \ - mtspr %1, %0; mtspr %1, %0; sync; isync" - :: "r"(bsp_state[1]), "K"(SPR_HID1)); - #else - __asm __volatile(" \ - ld %0,0(%2); \ - sync; isync; \ - mtspr %1, %0; \ - mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; \ - mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; \ - sync; isync" - : "=r"(reg) : "K"(SPR_HID0), "b"(bsp_state)); - __asm __volatile("ld %0, 8(%2); sync; isync; \ - mtspr %1, %0; mtspr %1, %0; sync; isync" - : "=r"(reg) : "K"(SPR_HID1), "b"(bsp_state)); - #endif - - powerpc_sync(); - break; - case IBMCELLBE: - #ifdef NOTYET /* Causes problems if in instruction stream on 970 */ - if (mfmsr() & PSL_HV) { - mtspr(SPR_HID0, bsp_state[0]); - mtspr(SPR_HID1, bsp_state[1]); - mtspr(SPR_HID4, bsp_state[2]); - mtspr(SPR_HID6, bsp_state[3]); - - mtspr(SPR_CELL_TSCR, bsp_state[4]); - } - #endif - - mtspr(SPR_CELL_TSRL, bsp_state[5]); - - break; - case MPC7400: - case MPC7410: - case MPC7447A: - case MPC7448: - case MPC7450: - case MPC7455: - case MPC7457: - /* XXX: Program the CPU ID into PIR */ - __asm __volatile("mtspr 1023,%0" :: "r"(PCPU_GET(cpuid))); - - powerpc_sync(); - isync(); - - mtspr(SPR_HID0, bsp_state[0]); isync(); - mtspr(SPR_HID1, bsp_state[1]); isync(); - - /* Now enable the L3 cache. */ - switch (vers) { - case MPC7450: - case MPC7455: - case MPC7457: - /* Only MPC745x CPUs have an L3 cache. */ - reg = mpc745x_l3_enable(bsp_state[3]); - default: - break; - } - - reg = mpc74xx_l2_enable(bsp_state[2]); - reg = mpc74xx_l1d_enable(); - reg = mpc74xx_l1i_enable(); - - break; - case IBMPOWER7: - case IBMPOWER7PLUS: - case IBMPOWER8: - case IBMPOWER8E: - case IBMPOWER8NVL: - case IBMPOWER9: -#ifdef __powerpc64__ - if (mfmsr() & PSL_HV) { - mtspr(SPR_LPCR, mfspr(SPR_LPCR) | lpcr | - LPCR_PECE_WAKESET); - isync(); - } -#endif - break; - default: -#ifdef __powerpc64__ - if (!(mfmsr() & PSL_HV)) /* Rely on HV to have set things up */ - break; -#endif - printf("WARNING: Unknown CPU type. Cache performace may be " - "suboptimal.\n"); - break; - } -} diff --git a/sys/powerpc/aim/slb.c b/sys/powerpc/aim/slb.c deleted file mode 100644 index bd008234c40..00000000000 --- a/sys/powerpc/aim/slb.c +++ /dev/null @@ -1,624 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "mmu_oea64.h" - -uintptr_t moea64_get_unique_vsid(void); -void moea64_release_vsid(uint64_t vsid); -static void slb_zone_init(void *); - -static uma_zone_t slbt_zone; -static uma_zone_t slb_cache_zone; -int n_slbs = 64; - -SYSINIT(slb_zone_init, SI_SUB_KMEM, SI_ORDER_ANY, slb_zone_init, NULL); - -struct slbtnode { - uint16_t ua_alloc; - uint8_t ua_level; - /* Only 36 bits needed for full 64-bit address space. */ - uint64_t ua_base; - union { - struct slbtnode *ua_child[16]; - struct slb slb_entries[16]; - } u; -}; - -/* - * For a full 64-bit address space, there are 36 bits in play in an - * esid, so 8 levels, with the leaf being at level 0. - * - * |3333|3322|2222|2222|1111|1111|11 | | | esid - * |5432|1098|7654|3210|9876|5432|1098|7654|3210| bits - * +----+----+----+----+----+----+----+----+----+-------- - * | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | level - */ -#define UAD_ROOT_LEVEL 8 -#define UAD_LEAF_LEVEL 0 - -static inline int -esid2idx(uint64_t esid, int level) -{ - int shift; - - shift = level * 4; - return ((esid >> shift) & 0xF); -} - -/* - * The ua_base field should have 0 bits after the first 4*(level+1) - * bits; i.e. only - */ -#define uad_baseok(ua) \ - (esid2base(ua->ua_base, ua->ua_level) == ua->ua_base) - -static inline uint64_t -esid2base(uint64_t esid, int level) -{ - uint64_t mask; - int shift; - - shift = (level + 1) * 4; - mask = ~((1ULL << shift) - 1); - return (esid & mask); -} - -/* - * Allocate a new leaf node for the specified esid/vmhandle from the - * parent node. - */ -static struct slb * -make_new_leaf(uint64_t esid, uint64_t slbv, struct slbtnode *parent) -{ - struct slbtnode *child; - struct slb *retval; - int idx; - - idx = esid2idx(esid, parent->ua_level); - KASSERT(parent->u.ua_child[idx] == NULL, ("Child already exists!")); - - /* unlock and M_WAITOK and loop? */ - child = uma_zalloc(slbt_zone, M_NOWAIT | M_ZERO); - KASSERT(child != NULL, ("unhandled NULL case")); - - child->ua_level = UAD_LEAF_LEVEL; - child->ua_base = esid2base(esid, child->ua_level); - idx = esid2idx(esid, child->ua_level); - child->u.slb_entries[idx].slbv = slbv; - child->u.slb_entries[idx].slbe = (esid << SLBE_ESID_SHIFT) | SLBE_VALID; - setbit(&child->ua_alloc, idx); - - retval = &child->u.slb_entries[idx]; - - /* - * The above stores must be visible before the next one, so - * that a lockless searcher always sees a valid path through - * the tree. - */ - powerpc_lwsync(); - - idx = esid2idx(esid, parent->ua_level); - parent->u.ua_child[idx] = child; - setbit(&parent->ua_alloc, idx); - - return (retval); -} - -/* - * Allocate a new intermediate node to fit between the parent and - * esid. - */ -static struct slbtnode* -make_intermediate(uint64_t esid, struct slbtnode *parent) -{ - struct slbtnode *child, *inter; - int idx, level; - - idx = esid2idx(esid, parent->ua_level); - child = parent->u.ua_child[idx]; - KASSERT(esid2base(esid, child->ua_level) != child->ua_base, - ("No need for an intermediate node?")); - - /* - * Find the level where the existing child and our new esid - * meet. It must be lower than parent->ua_level or we would - * have chosen a different index in parent. - */ - level = child->ua_level + 1; - while (esid2base(esid, level) != - esid2base(child->ua_base, level)) - level++; - KASSERT(level < parent->ua_level, - ("Found splitting level %d for %09jx and %09jx, " - "but it's the same as %p's", - level, esid, child->ua_base, parent)); - - /* unlock and M_WAITOK and loop? */ - inter = uma_zalloc(slbt_zone, M_NOWAIT | M_ZERO); - KASSERT(inter != NULL, ("unhandled NULL case")); - - /* Set up intermediate node to point to child ... */ - inter->ua_level = level; - inter->ua_base = esid2base(esid, inter->ua_level); - idx = esid2idx(child->ua_base, inter->ua_level); - inter->u.ua_child[idx] = child; - setbit(&inter->ua_alloc, idx); - powerpc_lwsync(); - - /* Set up parent to point to intermediate node ... */ - idx = esid2idx(inter->ua_base, parent->ua_level); - parent->u.ua_child[idx] = inter; - setbit(&parent->ua_alloc, idx); - - return (inter); -} - -uint64_t -kernel_va_to_slbv(vm_offset_t va) -{ - uint64_t slbv; - - /* Set kernel VSID to deterministic value */ - slbv = (KERNEL_VSID((uintptr_t)va >> ADDR_SR_SHFT)) << SLBV_VSID_SHIFT; - - /* - * Figure out if this is a large-page mapping. - */ - if (hw_direct_map && va > DMAP_BASE_ADDRESS && va < DMAP_MAX_ADDRESS) { - /* - * XXX: If we have set up a direct map, assumes - * all physical memory is mapped with large pages. - */ - - if (mem_valid(DMAP_TO_PHYS(va), 0) == 0) - slbv |= SLBV_L; - } else if (moea64_large_page_size != 0 && - va >= (vm_offset_t)vm_page_array && - va <= (uintptr_t)(&vm_page_array[vm_page_array_size])) - slbv |= SLBV_L; - - return (slbv); -} - -struct slb * -user_va_to_slb_entry(pmap_t pm, vm_offset_t va) -{ - uint64_t esid = va >> ADDR_SR_SHFT; - struct slbtnode *ua; - int idx; - - ua = pm->pm_slb_tree_root; - - for (;;) { - KASSERT(uad_baseok(ua), ("uad base %016jx level %d bad!", - ua->ua_base, ua->ua_level)); - idx = esid2idx(esid, ua->ua_level); - - /* - * This code is specific to ppc64 where a load is - * atomic, so no need for atomic_load macro. - */ - if (ua->ua_level == UAD_LEAF_LEVEL) - return ((ua->u.slb_entries[idx].slbe & SLBE_VALID) ? - &ua->u.slb_entries[idx] : NULL); - - /* - * The following accesses are implicitly ordered under the POWER - * ISA by load dependencies (the store ordering is provided by - * the powerpc_lwsync() calls elsewhere) and so are run without - * barriers. - */ - ua = ua->u.ua_child[idx]; - if (ua == NULL || - esid2base(esid, ua->ua_level) != ua->ua_base) - return (NULL); - } - - return (NULL); -} - -uint64_t -va_to_vsid(pmap_t pm, vm_offset_t va) -{ - struct slb *entry; - - /* Shortcut kernel case */ - if (pm == kernel_pmap) - return (KERNEL_VSID((uintptr_t)va >> ADDR_SR_SHFT)); - - /* - * If there is no vsid for this VA, we need to add a new entry - * to the PMAP's segment table. - */ - - entry = user_va_to_slb_entry(pm, va); - - if (entry == NULL) - return (allocate_user_vsid(pm, - (uintptr_t)va >> ADDR_SR_SHFT, 0)); - - return ((entry->slbv & SLBV_VSID_MASK) >> SLBV_VSID_SHIFT); -} - -uint64_t -allocate_user_vsid(pmap_t pm, uint64_t esid, int large) -{ - uint64_t vsid, slbv; - struct slbtnode *ua, *next, *inter; - struct slb *slb; - int idx; - - KASSERT(pm != kernel_pmap, ("Attempting to allocate a kernel VSID")); - - PMAP_LOCK_ASSERT(pm, MA_OWNED); - vsid = moea64_get_unique_vsid(); - - slbv = vsid << SLBV_VSID_SHIFT; - if (large) - slbv |= SLBV_L; - - ua = pm->pm_slb_tree_root; - - /* Descend to the correct leaf or NULL pointer. */ - for (;;) { - KASSERT(uad_baseok(ua), - ("uad base %09jx level %d bad!", ua->ua_base, ua->ua_level)); - idx = esid2idx(esid, ua->ua_level); - - if (ua->ua_level == UAD_LEAF_LEVEL) { - ua->u.slb_entries[idx].slbv = slbv; - eieio(); - ua->u.slb_entries[idx].slbe = (esid << SLBE_ESID_SHIFT) - | SLBE_VALID; - setbit(&ua->ua_alloc, idx); - slb = &ua->u.slb_entries[idx]; - break; - } - - next = ua->u.ua_child[idx]; - if (next == NULL) { - slb = make_new_leaf(esid, slbv, ua); - break; - } - - /* - * Check if the next item down has an okay ua_base. - * If not, we need to allocate an intermediate node. - */ - if (esid2base(esid, next->ua_level) != next->ua_base) { - inter = make_intermediate(esid, ua); - slb = make_new_leaf(esid, slbv, inter); - break; - } - - ua = next; - } - - /* - * Someone probably wants this soon, and it may be a wired - * SLB mapping, so pre-spill this entry. - */ - eieio(); - slb_insert_user(pm, slb); - - return (vsid); -} - -void -free_vsid(pmap_t pm, uint64_t esid, int large) -{ - struct slbtnode *ua; - int idx; - - PMAP_LOCK_ASSERT(pm, MA_OWNED); - - ua = pm->pm_slb_tree_root; - /* Descend to the correct leaf. */ - for (;;) { - KASSERT(uad_baseok(ua), - ("uad base %09jx level %d bad!", ua->ua_base, ua->ua_level)); - - idx = esid2idx(esid, ua->ua_level); - if (ua->ua_level == UAD_LEAF_LEVEL) { - ua->u.slb_entries[idx].slbv = 0; - eieio(); - ua->u.slb_entries[idx].slbe = 0; - clrbit(&ua->ua_alloc, idx); - return; - } - - ua = ua->u.ua_child[idx]; - if (ua == NULL || - esid2base(esid, ua->ua_level) != ua->ua_base) { - /* Perhaps just return instead of assert? */ - KASSERT(0, - ("Asked to remove an entry that was never inserted!")); - return; - } - } -} - -static void -free_slb_tree_node(struct slbtnode *ua) -{ - int idx; - - for (idx = 0; idx < 16; idx++) { - if (ua->ua_level != UAD_LEAF_LEVEL) { - if (ua->u.ua_child[idx] != NULL) - free_slb_tree_node(ua->u.ua_child[idx]); - } else { - if (ua->u.slb_entries[idx].slbv != 0) - moea64_release_vsid(ua->u.slb_entries[idx].slbv - >> SLBV_VSID_SHIFT); - } - } - - uma_zfree(slbt_zone, ua); -} - -void -slb_free_tree(pmap_t pm) -{ - - free_slb_tree_node(pm->pm_slb_tree_root); -} - -struct slbtnode * -slb_alloc_tree(void) -{ - struct slbtnode *root; - - root = uma_zalloc(slbt_zone, M_NOWAIT | M_ZERO); - KASSERT(root != NULL, ("unhandled NULL case")); - root->ua_level = UAD_ROOT_LEVEL; - - return (root); -} - -/* Lock entries mapping kernel text and stacks */ - -void -slb_insert_kernel(uint64_t slbe, uint64_t slbv) -{ - struct slb *slbcache; - int i; - - /* We don't want to be preempted while modifying the kernel map */ - critical_enter(); - - slbcache = PCPU_GET(aim.slb); - - /* Check for an unused slot, abusing the user slot as a full flag */ - if (slbcache[USER_SLB_SLOT].slbe == 0) { - for (i = 0; i < n_slbs; i++) { - if (i == USER_SLB_SLOT) - continue; - if (!(slbcache[i].slbe & SLBE_VALID)) - goto fillkernslb; - } - - if (i == n_slbs) - slbcache[USER_SLB_SLOT].slbe = 1; - } - - i = mftb() % n_slbs; - if (i == USER_SLB_SLOT) - i = (i+1) % n_slbs; - -fillkernslb: - KASSERT(i != USER_SLB_SLOT, - ("Filling user SLB slot with a kernel mapping")); - slbcache[i].slbv = slbv; - slbcache[i].slbe = slbe | (uint64_t)i; - - /* If it is for this CPU, put it in the SLB right away */ - if (pmap_bootstrapped) { - /* slbie not required */ - __asm __volatile ("slbmte %0, %1" :: - "r"(slbcache[i].slbv), "r"(slbcache[i].slbe)); - } - - critical_exit(); -} - -void -slb_insert_user(pmap_t pm, struct slb *slb) -{ - int i; - - PMAP_LOCK_ASSERT(pm, MA_OWNED); - - if (pm->pm_slb_len < n_slbs) { - i = pm->pm_slb_len; - pm->pm_slb_len++; - } else { - i = mftb() % n_slbs; - } - - /* Note that this replacement is atomic with respect to trap_subr */ - pm->pm_slb[i] = slb; -} - -static void * -slb_uma_real_alloc(uma_zone_t zone, vm_size_t bytes, int domain, - u_int8_t *flags, int wait) -{ - static vm_offset_t realmax = 0; - void *va; - vm_page_t m; - - if (realmax == 0) - realmax = platform_real_maxaddr(); - - *flags = UMA_SLAB_PRIV; - m = vm_page_alloc_noobj_contig_domain(domain, malloc2vm_flags(wait) | - VM_ALLOC_WIRED, 1, 0, realmax, PAGE_SIZE, PAGE_SIZE, - VM_MEMATTR_DEFAULT); - if (m == NULL) - return (NULL); - - if (hw_direct_map) - va = (void *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)); - else { - va = (void *)(VM_PAGE_TO_PHYS(m) | DMAP_BASE_ADDRESS); - pmap_kenter((vm_offset_t)va, VM_PAGE_TO_PHYS(m)); - } - - return (va); -} - -static void -slb_zone_init(void *dummy) -{ - slbt_zone = uma_zcreate("SLB tree node", sizeof(struct slbtnode), - NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, - UMA_ZONE_CONTIG | UMA_ZONE_VM); - slb_cache_zone = uma_zcreate("SLB cache", - (n_slbs + 1)*sizeof(struct slb *), NULL, NULL, NULL, NULL, - UMA_ALIGN_PTR, UMA_ZONE_CONTIG | UMA_ZONE_VM); - - if (platform_real_maxaddr() != VM_MAX_ADDRESS) { - uma_zone_set_allocf(slb_cache_zone, slb_uma_real_alloc); - uma_zone_set_allocf(slbt_zone, slb_uma_real_alloc); - } -} - -struct slb ** -slb_alloc_user_cache(void) -{ - return (uma_zalloc(slb_cache_zone, M_WAITOK | M_ZERO)); -} - -void -slb_free_user_cache(struct slb **slb) -{ - uma_zfree(slb_cache_zone, slb); -} - -/* Handle kernel SLB faults -- runs in real mode, all seat belts off */ -void -handle_kernel_slb_spill(int type, register_t dar, register_t srr0) -{ - struct slb *slbcache; - uint64_t slbe, slbv; - uint64_t esid, addr; - int i; - - addr = (type == EXC_ISE) ? srr0 : dar; - slbcache = PCPU_GET(aim.slb); - esid = (uintptr_t)addr >> ADDR_SR_SHFT; - slbe = (esid << SLBE_ESID_SHIFT) | SLBE_VALID; - - /* See if the hardware flushed this somehow (can happen in LPARs) */ - for (i = 0; i < n_slbs; i++) - if (slbcache[i].slbe == (slbe | (uint64_t)i)) - return; - - /* Not in the map, needs to actually be added */ - slbv = kernel_va_to_slbv(addr); - if (slbcache[USER_SLB_SLOT].slbe == 0) { - for (i = 0; i < n_slbs; i++) { - if (i == USER_SLB_SLOT) - continue; - if (!(slbcache[i].slbe & SLBE_VALID)) - goto fillkernslb; - } - - if (i == n_slbs) - slbcache[USER_SLB_SLOT].slbe = 1; - } - - /* Sacrifice a random SLB entry that is not the user entry */ - i = mftb() % n_slbs; - if (i == USER_SLB_SLOT) - i = (i+1) % n_slbs; - -fillkernslb: - /* Write new entry */ - slbcache[i].slbv = slbv; - slbcache[i].slbe = slbe | (uint64_t)i; - - /* Trap handler will restore from cache on exit */ -} - -int -handle_user_slb_spill(pmap_t pm, vm_offset_t addr) -{ - struct slb *user_entry; - uint64_t esid; - int i; - - if (pm->pm_slb == NULL) - return (-1); - - esid = (uintptr_t)addr >> ADDR_SR_SHFT; - - PMAP_LOCK(pm); - user_entry = user_va_to_slb_entry(pm, addr); - - if (user_entry == NULL) { - /* allocate_vsid auto-spills it */ - (void)allocate_user_vsid(pm, esid, 0); - } else { - /* - * Check that another CPU has not already mapped this. - * XXX: Per-thread SLB caches would be better. - */ - for (i = 0; i < pm->pm_slb_len; i++) - if (pm->pm_slb[i] == user_entry) - break; - - if (i == pm->pm_slb_len) - slb_insert_user(pm, user_entry); - } - PMAP_UNLOCK(pm); - - return (0); -} diff --git a/sys/powerpc/aim/trap_subr32.S b/sys/powerpc/aim/trap_subr32.S deleted file mode 100644 index 0796271959f..00000000000 --- a/sys/powerpc/aim/trap_subr32.S +++ /dev/null @@ -1,930 +0,0 @@ -/* $NetBSD: trap_subr.S,v 1.20 2002/04/22 23:20:08 kleink Exp $ */ - -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * NOTICE: This is not a standalone file. to use it, #include it in - * your port's locore.S, like so: - * - * #include - */ - -/* - * Save/restore segment registers - */ -#define RESTORE_SRS(pmap,sr) mtsr 0,sr; \ - lwz sr,1*4(pmap); mtsr 1,sr; \ - lwz sr,2*4(pmap); mtsr 2,sr; \ - lwz sr,3*4(pmap); mtsr 3,sr; \ - lwz sr,4*4(pmap); mtsr 4,sr; \ - lwz sr,5*4(pmap); mtsr 5,sr; \ - lwz sr,6*4(pmap); mtsr 6,sr; \ - lwz sr,7*4(pmap); mtsr 7,sr; \ - lwz sr,8*4(pmap); mtsr 8,sr; \ - lwz sr,9*4(pmap); mtsr 9,sr; \ - lwz sr,10*4(pmap); mtsr 10,sr; \ - lwz sr,11*4(pmap); mtsr 11,sr; \ - /* Skip segment 12 (USER_SR), which is restored differently */ \ - lwz sr,13*4(pmap); mtsr 13,sr; \ - lwz sr,14*4(pmap); mtsr 14,sr; \ - lwz sr,15*4(pmap); mtsr 15,sr; isync; - -/* - * User SRs are loaded through a pointer to the current pmap. - */ -#define RESTORE_USER_SRS(pmap,sr) \ - GET_CPUINFO(pmap); \ - lwz pmap,PC_CURPMAP(pmap); \ - lwzu sr,PM_SR(pmap); \ - RESTORE_SRS(pmap,sr) \ - /* Restore SR 12 */ \ - lwz sr,12*4(pmap); mtsr 12,sr; isync - -/* - * Kernel SRs are loaded directly from kernel_pmap_ - */ -#define RESTORE_KERN_SRS(pmap,sr) \ - lwz pmap,TRAP_TOCBASE(0); \ - lwz pmap,CNAME(kernel_pmap_store)@got(pmap); \ - lwzu sr,PM_SR(pmap); \ - RESTORE_SRS(pmap,sr) - -/* - * FRAME_SETUP assumes: - * SPRG1 SP (1) - * SPRG3 trap type - * savearea r28-r31,DAR,DSISR (DAR & DSISR only for DSI traps) - * r28 LR - * r29 CR - * r30 scratch - * r31 scratch - * r1 kernel stack - * SRR0/1 as at start of trap - */ -#define FRAME_SETUP(savearea) \ -/* Have to enable translation to allow access of kernel stack: */ \ - GET_CPUINFO(%r31); \ - mfsrr0 %r30; \ - stw %r30,(savearea+CPUSAVE_SRR0)(%r31); /* save SRR0 */ \ - mfsrr1 %r30; \ - stw %r30,(savearea+CPUSAVE_SRR1)(%r31); /* save SRR1 */ \ - mfmsr %r30; \ - ori %r30,%r30,(PSL_DR|PSL_IR|PSL_RI)@l; /* relocation on */ \ - mtmsr %r30; /* stack can now be accessed */ \ - isync; \ - mfsprg1 %r31; /* get saved SP */ \ - stwu %r31,-FRAMELEN(%r1); /* save it in the callframe */ \ - stw %r0, FRAME_0+8(%r1); /* save r0 in the trapframe */ \ - stw %r31,FRAME_1+8(%r1); /* save SP " " */ \ - stw %r2, FRAME_2+8(%r1); /* save r2 " " */ \ - stw %r28,FRAME_LR+8(%r1); /* save LR " " */ \ - stw %r29,FRAME_CR+8(%r1); /* save CR " " */ \ - GET_CPUINFO(%r2); \ - lwz %r28,(savearea+CPUSAVE_R28)(%r2); /* get saved r28 */ \ - lwz %r29,(savearea+CPUSAVE_R29)(%r2); /* get saved r29 */ \ - lwz %r30,(savearea+CPUSAVE_R30)(%r2); /* get saved r30 */ \ - lwz %r31,(savearea+CPUSAVE_R31)(%r2); /* get saved r31 */ \ - stw %r3, FRAME_3+8(%r1); /* save r3-r31 */ \ - stw %r4, FRAME_4+8(%r1); \ - stw %r5, FRAME_5+8(%r1); \ - stw %r6, FRAME_6+8(%r1); \ - stw %r7, FRAME_7+8(%r1); \ - stw %r8, FRAME_8+8(%r1); \ - stw %r9, FRAME_9+8(%r1); \ - stw %r10, FRAME_10+8(%r1); \ - stw %r11, FRAME_11+8(%r1); \ - stw %r12, FRAME_12+8(%r1); \ - stw %r13, FRAME_13+8(%r1); \ - stw %r14, FRAME_14+8(%r1); \ - stw %r15, FRAME_15+8(%r1); \ - stw %r16, FRAME_16+8(%r1); \ - stw %r17, FRAME_17+8(%r1); \ - stw %r18, FRAME_18+8(%r1); \ - stw %r19, FRAME_19+8(%r1); \ - stw %r20, FRAME_20+8(%r1); \ - stw %r21, FRAME_21+8(%r1); \ - stw %r22, FRAME_22+8(%r1); \ - stw %r23, FRAME_23+8(%r1); \ - stw %r24, FRAME_24+8(%r1); \ - stw %r25, FRAME_25+8(%r1); \ - stw %r26, FRAME_26+8(%r1); \ - stw %r27, FRAME_27+8(%r1); \ - stw %r28, FRAME_28+8(%r1); \ - stw %r29, FRAME_29+8(%r1); \ - stw %r30, FRAME_30+8(%r1); \ - stw %r31, FRAME_31+8(%r1); \ - lwz %r28,(savearea+CPUSAVE_AIM_DAR)(%r2); /* saved DAR */ \ - lwz %r29,(savearea+CPUSAVE_AIM_DSISR)(%r2);/* saved DSISR */\ - lwz %r30,(savearea+CPUSAVE_SRR0)(%r2); /* saved SRR0 */ \ - lwz %r31,(savearea+CPUSAVE_SRR1)(%r2); /* saved SRR1 */ \ - mfxer %r3; \ - mfctr %r4; \ - mfsprg3 %r5; \ - stw %r3, FRAME_XER+8(1); /* save xer/ctr/exc */ \ - stw %r4, FRAME_CTR+8(1); \ - stw %r5, FRAME_EXC+8(1); \ - stw %r28,FRAME_AIM_DAR+8(1); \ - stw %r29,FRAME_AIM_DSISR+8(1); /* save dsisr/srr0/srr1 */ \ - stw %r30,FRAME_SRR0+8(1); \ - stw %r31,FRAME_SRR1+8(1); \ - lwz %r2,PC_CURTHREAD(%r2) /* set curthread pointer */ - -#define FRAME_LEAVE(savearea) \ -/* Disable exceptions: */ \ - mfmsr %r2; \ - andi. %r2,%r2,~PSL_EE@l; \ - mtmsr %r2; \ - isync; \ -/* Now restore regs: */ \ - lwz %r2,FRAME_SRR0+8(%r1); \ - lwz %r3,FRAME_SRR1+8(%r1); \ - lwz %r4,FRAME_CTR+8(%r1); \ - lwz %r5,FRAME_XER+8(%r1); \ - lwz %r6,FRAME_LR+8(%r1); \ - GET_CPUINFO(%r7); \ - stw %r2,(savearea+CPUSAVE_SRR0)(%r7); /* save SRR0 */ \ - stw %r3,(savearea+CPUSAVE_SRR1)(%r7); /* save SRR1 */ \ - lwz %r7,FRAME_CR+8(%r1); \ - mtctr %r4; \ - mtxer %r5; \ - mtlr %r6; \ - mtsprg1 %r7; /* save cr */ \ - lwz %r31,FRAME_31+8(%r1); /* restore r0-31 */ \ - lwz %r30,FRAME_30+8(%r1); \ - lwz %r29,FRAME_29+8(%r1); \ - lwz %r28,FRAME_28+8(%r1); \ - lwz %r27,FRAME_27+8(%r1); \ - lwz %r26,FRAME_26+8(%r1); \ - lwz %r25,FRAME_25+8(%r1); \ - lwz %r24,FRAME_24+8(%r1); \ - lwz %r23,FRAME_23+8(%r1); \ - lwz %r22,FRAME_22+8(%r1); \ - lwz %r21,FRAME_21+8(%r1); \ - lwz %r20,FRAME_20+8(%r1); \ - lwz %r19,FRAME_19+8(%r1); \ - lwz %r18,FRAME_18+8(%r1); \ - lwz %r17,FRAME_17+8(%r1); \ - lwz %r16,FRAME_16+8(%r1); \ - lwz %r15,FRAME_15+8(%r1); \ - lwz %r14,FRAME_14+8(%r1); \ - lwz %r13,FRAME_13+8(%r1); \ - lwz %r12,FRAME_12+8(%r1); \ - lwz %r11,FRAME_11+8(%r1); \ - lwz %r10,FRAME_10+8(%r1); \ - lwz %r9, FRAME_9+8(%r1); \ - lwz %r8, FRAME_8+8(%r1); \ - lwz %r7, FRAME_7+8(%r1); \ - lwz %r6, FRAME_6+8(%r1); \ - lwz %r5, FRAME_5+8(%r1); \ - lwz %r4, FRAME_4+8(%r1); \ - lwz %r3, FRAME_3+8(%r1); \ - lwz %r2, FRAME_2+8(%r1); \ - lwz %r0, FRAME_0+8(%r1); \ - lwz %r1, FRAME_1+8(%r1); \ -/* Can't touch %r1 from here on */ \ - mtsprg2 %r2; /* save r2 & r3 */ \ - mtsprg3 %r3; \ -/* Disable translation, machine check and recoverability: */ \ - mfmsr %r2; \ - andi. %r2,%r2,~(PSL_DR|PSL_IR|PSL_ME|PSL_RI)@l; \ - mtmsr %r2; \ - isync; \ -/* Decide whether we return to user mode: */ \ - GET_CPUINFO(%r2); \ - lwz %r3,(savearea+CPUSAVE_SRR1)(%r2); \ - mtcr %r3; \ - bf 17,1f; /* branch if PSL_PR is false */ \ -/* Restore user SRs */ \ - RESTORE_USER_SRS(%r2,%r3); \ -1: mfsprg1 %r2; /* restore cr */ \ - mtcr %r2; \ - GET_CPUINFO(%r2); \ - lwz %r3,(savearea+CPUSAVE_SRR0)(%r2); /* restore srr0 */ \ - mtsrr0 %r3; \ - lwz %r3,(savearea+CPUSAVE_SRR1)(%r2); /* restore srr1 */ \ - \ - /* Make sure HV bit of MSR propagated to SRR1 */ \ - mfmsr %r2; \ - or %r3,%r2,%r3; \ - \ - mtsrr1 %r3; \ - mfsprg2 %r2; /* restore r2 & r3 */ \ - mfsprg3 %r3 - -#ifdef KDTRACE_HOOKS - .data - .globl dtrace_invop_calltrap_addr - .align 4 - .type dtrace_invop_calltrap_addr, @object - .size dtrace_invop_calltrap_addr, 4 -dtrace_invop_calltrap_addr: - .word 0 - .word 0 - - .text -#endif - -/* - * The next two routines are 64-bit glue code. The first is used to test if - * we are on a 64-bit system. By copying it to the illegal instruction - * handler, we can test for 64-bit mode by trying to execute a 64-bit - * instruction and seeing what happens. The second gets copied in front - * of all the other handlers to restore 32-bit bridge mode when traps - * are taken. - */ - -/* 64-bit test code. Sets SPRG2 to 0 if an illegal instruction is executed */ - - .globl CNAME(testppc64),CNAME(testppc64size) -CNAME(testppc64): - mtsprg1 %r31 - mfsrr0 %r31 - addi %r31, %r31, 4 - mtsrr0 %r31 - - li %r31, 0 - mtsprg2 %r31 - mfsprg1 %r31 - - rfi -CNAME(testppc64size) = .-CNAME(testppc64) - - -/* 64-bit bridge mode restore snippet. Gets copied in front of everything else - * on 64-bit systems. */ - - .globl CNAME(restorebridge),CNAME(restorebridgesize) -CNAME(restorebridge): - mtsprg1 %r31 - mfmsr %r31 - clrldi %r31,%r31,1 - mtmsrd %r31 - mfsprg1 %r31 - isync -CNAME(restorebridgesize) = .-CNAME(restorebridge) - -/* - * Processor reset exception handler. These are typically - * the first instructions the processor executes after a - * software reset. We do this in two bits so that we are - * not still hanging around in the trap handling region - * once the MMU is turned on. - */ - .globl CNAME(rstcode), CNAME(rstcodeend) -CNAME(rstcode): - lwz %r31, TRAP_GENTRAP(0) - addi %r31, %r31, (cpu_reset - generictrap) - mtlr %r31 - blrl -CNAME(rstcodeend): - -cpu_reset: - bl 1f - - .space 124 - -1: - mflr %r1 - addi %r1,%r1,(124-16)@l - - bl CNAME(cpudep_ap_early_bootstrap) - lis %r3,1@l - bl CNAME(pmap_cpu_bootstrap) - bl CNAME(cpudep_ap_bootstrap) - mr %r1,%r3 - bl CNAME(cpudep_ap_setup) - GET_CPUINFO(%r5) - lwz %r3,(PC_RESTORE)(%r5) - cmplwi %cr0,%r3,0 - beq %cr0,2f - li %r4, 1 - b CNAME(longjmp) -2: -#ifdef SMP - bl CNAME(machdep_ap_bootstrap) -#endif - - /* Should not be reached */ -9: - b 9b - -/* - * This code gets copied to all the trap vectors - * (except ISI/DSI, ALI, and the interrupts) - */ - - .globl CNAME(trapcode),CNAME(trapcodeend) -CNAME(trapcode): - mtsprg1 %r1 /* save SP */ - mflr %r1 /* Save the old LR in r1 */ - mtsprg2 %r1 /* And then in SPRG2 */ - lwz %r1, TRAP_ENTRY(0) /* Get branch address */ - mtlr %r1 - li %r1, 0xe0 /* How to get the vector from LR */ - blrl /* LR & (0xff00 | r1) is exception # */ -CNAME(trapcodeend): - -/* - * For ALI: has to save DSISR and DAR - */ - .globl CNAME(alitrap),CNAME(aliend) -CNAME(alitrap): - mtsprg1 %r1 /* save SP */ - GET_CPUINFO(%r1) - stw %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1) /* free r28-r31 */ - stw %r29,(PC_TEMPSAVE+CPUSAVE_R29)(%r1) - stw %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1) - stw %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1) - mfdar %r30 - mfdsisr %r31 - stw %r30,(PC_TEMPSAVE+CPUSAVE_AIM_DAR)(%r1) - stw %r31,(PC_TEMPSAVE+CPUSAVE_AIM_DSISR)(%r1) - mfsprg1 %r1 /* restore SP, in case of branch */ - mflr %r28 /* save LR */ - mfcr %r29 /* save CR */ - - /* Put our exception vector in SPRG3 */ - li %r31, EXC_ALI - mtsprg3 %r31 - - /* Test whether we already had PR set */ - mfsrr1 %r31 - mtcr %r31 - - /* Jump to s_trap */ - lwz %r31, TRAP_GENTRAP(0) - addi %r31, %r31, (s_trap - generictrap) - mtlr %r31 - blrl -CNAME(aliend): - -/* - * G2 specific: instuction TLB miss. - */ - .globl CNAME(imisstrap),CNAME(imisssize) -CNAME(imisstrap): - mfspr %r2, SPR_HASH1 /* get first pointer */ - addi %r1, 0, 8 /* load 8 for counter */ - mfctr %r0 /* save counter */ - mfspr %r3, SPR_ICMP /* get first compare value */ - addi %r2, %r2, -8 /* pre dec the pointer */ -im0: - mtctr %r1 /* load counter */ -im1: - lwzu %r1, 8(%r2) /* get next pte */ - cmp 0, 0, %r1, %r3 /* see if found pte */ - bdnzf 2, im1 /* dec count br if cmp ne and if - * count not zero */ - bne instr_sec_hash /* if not found set up second hash - * or exit */ - lwz %r1, +4(%r2) /* load tlb entry lower-word */ - andi. %r3, %r1, 8 /* check G bit */ - bne do_isi_prot /* if guarded, take an ISI */ - mtctr %r0 /* restore counter */ - mfspr %r0, SPR_IMISS /* get the miss address for the tlbli */ - mfspr %r3, SPR_SRR1 /* get the saved cr0 bits */ - mtcrf 0x80, %r3 /* restore CR0 */ - mtspr SPR_RPA, %r1 /* set the pte */ - ori %r1, %r1, 0x100 /* set reference bit */ - srwi %r1, %r1, 8 /* get byte 7 of pte */ - tlbli %r0 /* load the itlb */ - stb %r1, +6(%r2) /* update page table */ - rfi /* return to executing program */ - -instr_sec_hash: - andi. %r1, %r3, 0x0040 /* see if we have done second hash */ - bne do_isi /* if so, go to ISI interrupt */ - mfspr %r2, SPR_HASH2 /* get the second pointer */ - ori %r3, %r3, 0x0040 /* change the compare value */ - addi %r1, 0, 8 /* load 8 for counter */ - addi %r2, %r2, -8 /* pre dec for update on load */ - b im0 /* try second hash */ - -/* Create a faked ISI interrupt as the address was not found */ -do_isi_prot: - mfspr %r3, SPR_SRR1 /* get srr1 */ - andi. %r2, %r3, 0xffff /* clean upper srr1 */ - addis %r2, %r2, 0x0800 /* or in srr<4> = 1 to flag prot - * violation */ - b isi1 -do_isi: - mfspr %r3, SPR_SRR1 /* get srr1 */ - andi. %r2, %r3, 0xffff /* clean srr1 */ - addis %r2, %r2, 0x4000 /* or in srr1<1> = 1 to flag pte - * not found */ -isi1: - mtctr %r0 /* restore counter */ - mtspr SPR_SRR1, %r2 /* set srr1 */ - mfmsr %r0 /* get msr */ - xoris %r0, %r0, 0x2 /* flip the msr bit */ - mtcrf 0x80, %r3 /* restore CR0 */ - mtmsr %r0 /* flip back to the native gprs */ - ba EXC_ISI /* go to instr. access interrupt */ - -CNAME(imisssize) = .-CNAME(imisstrap) - -/* - * G2 specific: data load TLB miss. - */ - .globl CNAME(dlmisstrap),CNAME(dlmisssize) -CNAME(dlmisstrap): - mfspr %r2, SPR_HASH1 /* get first pointer */ - addi %r1, 0, 8 /* load 8 for counter */ - mfctr %r0 /* save counter */ - mfspr %r3, SPR_DCMP /* get first compare value */ - addi %r2, %r2, -8 /* pre dec the pointer */ -dm0: - mtctr %r1 /* load counter */ -dm1: - lwzu %r1, 8(%r2) /* get next pte */ - cmp 0, 0, %r1, %r3 /* see if found pte */ - bdnzf 2, dm1 /* dec count br if cmp ne and if - * count not zero */ - bne data_sec_hash /* if not found set up second hash - * or exit */ - lwz %r1, +4(%r2) /* load tlb entry lower-word */ - mtctr %r0 /* restore counter */ - mfspr %r0, SPR_DMISS /* get the miss address for the tlbld */ - mfspr %r3, SPR_SRR1 /* get the saved cr0 bits */ - mtcrf 0x80, %r3 /* restore CR0 */ - mtspr SPR_RPA, %r1 /* set the pte */ - ori %r1, %r1, 0x100 /* set reference bit */ - srwi %r1, %r1, 8 /* get byte 7 of pte */ - tlbld %r0 /* load the dtlb */ - stb %r1, +6(%r2) /* update page table */ - rfi /* return to executing program */ - -data_sec_hash: - andi. %r1, %r3, 0x0040 /* see if we have done second hash */ - bne do_dsi /* if so, go to DSI interrupt */ - mfspr %r2, SPR_HASH2 /* get the second pointer */ - ori %r3, %r3, 0x0040 /* change the compare value */ - addi %r1, 0, 8 /* load 8 for counter */ - addi %r2, %r2, -8 /* pre dec for update on load */ - b dm0 /* try second hash */ - -CNAME(dlmisssize) = .-CNAME(dlmisstrap) - -/* - * G2 specific: data store TLB miss. - */ - .globl CNAME(dsmisstrap),CNAME(dsmisssize) -CNAME(dsmisstrap): - mfspr %r2, SPR_HASH1 /* get first pointer */ - addi %r1, 0, 8 /* load 8 for counter */ - mfctr %r0 /* save counter */ - mfspr %r3, SPR_DCMP /* get first compare value */ - addi %r2, %r2, -8 /* pre dec the pointer */ -ds0: - mtctr %r1 /* load counter */ -ds1: - lwzu %r1, 8(%r2) /* get next pte */ - cmp 0, 0, %r1, %r3 /* see if found pte */ - bdnzf 2, ds1 /* dec count br if cmp ne and if - * count not zero */ - bne data_store_sec_hash /* if not found set up second hash - * or exit */ - lwz %r1, +4(%r2) /* load tlb entry lower-word */ - andi. %r3, %r1, 0x80 /* check the C-bit */ - beq data_store_chk_prot /* if (C==0) - * go check protection modes */ -ds2: - mtctr %r0 /* restore counter */ - mfspr %r0, SPR_DMISS /* get the miss address for the tlbld */ - mfspr %r3, SPR_SRR1 /* get the saved cr0 bits */ - mtcrf 0x80, %r3 /* restore CR0 */ - mtspr SPR_RPA, %r1 /* set the pte */ - tlbld %r0 /* load the dtlb */ - rfi /* return to executing program */ - -data_store_sec_hash: - andi. %r1, %r3, 0x0040 /* see if we have done second hash */ - bne do_dsi /* if so, go to DSI interrupt */ - mfspr %r2, SPR_HASH2 /* get the second pointer */ - ori %r3, %r3, 0x0040 /* change the compare value */ - addi %r1, 0, 8 /* load 8 for counter */ - addi %r2, %r2, -8 /* pre dec for update on load */ - b ds0 /* try second hash */ - -/* Check the protection before setting PTE(c-bit) */ -data_store_chk_prot: - rlwinm. %r3,%r1,30,0,1 /* test PP */ - bge- chk0 /* if (PP == 00 or PP == 01) - * goto chk0: */ - andi. %r3, %r1, 1 /* test PP[0] */ - beq+ chk2 /* return if PP[0] == 0 */ - b do_dsi_prot /* else DSIp */ -chk0: - mfspr %r3,SPR_SRR1 /* get old msr */ - andis. %r3,%r3,0x0008 /* test the KEY bit (SRR1-bit 12) */ - beq chk2 /* if (KEY==0) goto chk2: */ - b do_dsi_prot /* else do_dsi_prot */ -chk2: - ori %r1, %r1, 0x180 /* set reference and change bit */ - sth %r1, 6(%r2) /* update page table */ - b ds2 /* and back we go */ - -/* Create a faked DSI interrupt as the address was not found */ -do_dsi: - mfspr %r3, SPR_SRR1 /* get srr1 */ - rlwinm %r1,%r3,9,6,6 /* get srr1 to bit 6 for - * load/store, zero rest */ - addis %r1, %r1, 0x4000 /* or in dsisr<1> = 1 to flag pte - * not found */ - b dsi1 - -do_dsi_prot: - mfspr %r3, SPR_SRR1 /* get srr1 */ - rlwinm %r1,%r3,9,6,6 /* get srr1 to bit 6 for - *load/store, zero rest */ - addis %r1, %r1, 0x0800 /* or in dsisr<4> = 1 to flag prot - * violation */ - -dsi1: - mtctr %r0 /* restore counter */ - andi. %r2, %r3, 0xffff /* clear upper bits of srr1 */ - mtspr SPR_SRR1, %r2 /* set srr1 */ - mtspr SPR_DSISR, %r1 /* load the dsisr */ - mfspr %r1, SPR_DMISS /* get miss address */ - rlwinm. %r2,%r2,0,31,31 /* test LE bit */ - beq dsi2 /* if little endian then: */ - xor %r1, %r1, 0x07 /* de-mung the data address */ -dsi2: - mtspr SPR_DAR, %r1 /* put in dar */ - mfmsr %r0 /* get msr */ - xoris %r0, %r0, 0x2 /* flip the msr bit */ - mtcrf 0x80, %r3 /* restore CR0 */ - mtmsr %r0 /* flip back to the native gprs */ - ba EXC_DSI /* branch to DSI interrupt */ - -CNAME(dsmisssize) = .-CNAME(dsmisstrap) - -/* - * Similar to the above for DSI - * Has to handle BAT spills - * and standard pagetable spills - */ - .globl CNAME(dsitrap),CNAME(dsiend) -CNAME(dsitrap): - mtsprg1 %r1 /* save SP */ - GET_CPUINFO(%r1) - stw %r28,(PC_DISISAVE+CPUSAVE_R28)(%r1) /* free r28-r31 */ - stw %r29,(PC_DISISAVE+CPUSAVE_R29)(%r1) - stw %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1) - stw %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1) - mfsprg1 %r1 /* restore SP */ - mfcr %r29 /* save CR */ - mfxer %r30 /* save XER */ - mtsprg2 %r30 /* in SPRG2 */ - mfsrr1 %r31 /* test kernel mode */ - mtcr %r31 - bt 17,1f /* branch if PSL_PR is set */ - mfdar %r31 /* get fault address */ - rlwinm %r31,%r31,7,25,28 /* get segment * 8 */ - - /* get batu */ - lwz %r30,TRAP_TOCBASE(0) - lwz %r30,CNAME(battable)@got(%r30) - add %r31,%r30,%r31 - lwz %r30,0(%r31) - mtcr %r30 - bf 30,1f /* branch if supervisor valid is - false */ - /* get batl */ - lwz %r31,4(%r31) -/* We randomly use the highest two bat registers here */ - mftb %r28 - andi. %r28,%r28,1 - bne 2f - mtdbatu 2,%r30 - mtdbatl 2,%r31 - b 3f -2: - mtdbatu 3,%r30 - mtdbatl 3,%r31 -3: - mfsprg2 %r30 /* restore XER */ - mtxer %r30 - mtcr %r29 /* restore CR */ - mtsprg1 %r1 - GET_CPUINFO(%r1) - lwz %r28,(PC_DISISAVE+CPUSAVE_R28)(%r1) /* restore r28-r31 */ - lwz %r29,(PC_DISISAVE+CPUSAVE_R29)(%r1) - lwz %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1) - lwz %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1) - mfsprg1 %r1 - rfi /* return to trapped code */ -1: - mflr %r28 /* save LR (SP already saved) */ - - /* Jump to disitrap */ - lwz %r1, TRAP_GENTRAP(0) - addi %r1, %r1, (disitrap - generictrap) - mtlr %r1 - blrl -CNAME(dsiend): - -/* - * Preamble code for DSI/ISI traps - */ -disitrap: - /* Write the trap vector to SPRG3 by computing LR & 0xff00 */ - mflr %r1 - andi. %r1,%r1,0xff00 - mtsprg3 %r1 - - GET_CPUINFO(%r1) - lwz %r30,(PC_DISISAVE+CPUSAVE_R28)(%r1) - stw %r30,(PC_TEMPSAVE+CPUSAVE_R28)(%r1) - lwz %r31,(PC_DISISAVE+CPUSAVE_R29)(%r1) - stw %r31,(PC_TEMPSAVE+CPUSAVE_R29)(%r1) - lwz %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1) - stw %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1) - lwz %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1) - stw %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1) - mfdar %r30 - mfdsisr %r31 - stw %r30,(PC_TEMPSAVE+CPUSAVE_AIM_DAR)(%r1) - stw %r31,(PC_TEMPSAVE+CPUSAVE_AIM_DSISR)(%r1) - -#ifdef KDB - /* Try to detect a kernel stack overflow */ - mfsrr1 %r31 - mtcr %r31 - bt 17,realtrap /* branch is user mode */ - mfsprg1 %r31 /* get old SP */ - clrrwi %r31,%r31,12 /* Round SP down to nearest page */ - sub. %r30,%r31,%r30 /* SP - DAR */ - bge 1f - neg %r30,%r30 /* modulo value */ -1: cmplwi %cr0,%r30,4096 /* is DAR within a page of SP? */ - bge %cr0,realtrap /* no, too far away. */ - - /* Now convert this DSI into a DDB trap. */ - GET_CPUINFO(%r1) - lwz %r30,(PC_TEMPSAVE+CPUSAVE_AIM_DAR)(%r1) /* get DAR */ - stw %r30,(PC_DBSAVE +CPUSAVE_AIM_DAR)(%r1) /* save DAR */ - lwz %r31,(PC_TEMPSAVE+CPUSAVE_AIM_DSISR)(%r1) /* get DSISR */ - stw %r31,(PC_DBSAVE +CPUSAVE_AIM_DSISR)(%r1) /* save DSISR */ - lwz %r30,(PC_DISISAVE+CPUSAVE_R28)(%r1) /* get r28 */ - stw %r30,(PC_DBSAVE +CPUSAVE_R28)(%r1) /* save r28 */ - lwz %r31,(PC_DISISAVE+CPUSAVE_R29)(%r1) /* get r29 */ - stw %r31,(PC_DBSAVE +CPUSAVE_R29)(%r1) /* save r29 */ - lwz %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1) /* get r30 */ - stw %r30,(PC_DBSAVE +CPUSAVE_R30)(%r1) /* save r30 */ - lwz %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1) /* get r31 */ - stw %r31,(PC_DBSAVE +CPUSAVE_R31)(%r1) /* save r31 */ - b dbtrap -#endif - - /* XXX need stack probe here */ -realtrap: -/* Test whether we already had PR set */ - mfsrr1 %r1 - mtcr %r1 - mfsprg1 %r1 /* restore SP (might have been - overwritten) */ - bf 17,k_trap /* branch if PSL_PR is false */ - GET_CPUINFO(%r1) - lwz %r1,PC_CURPCB(%r1) - RESTORE_KERN_SRS(%r30,%r31) /* enable kernel mapping */ - b s_trap - -/* - * generictrap does some standard setup for trap handling to minimize - * the code that need be installed in the actual vectors. It expects - * the following conditions. - * - * R1 - Trap vector = LR & (0xff00 | R1) - * SPRG1 - Original R1 contents - * SPRG2 - Original LR - */ - - .globl CNAME(generictrap64) -generictrap64: - mtsprg3 %r31 - mfmsr %r31 - clrldi %r31,%r31,1 - mtmsrd %r31 - mfsprg3 %r31 - isync - - .globl CNAME(generictrap) -generictrap: - /* Save R1 for computing the exception vector */ - mtsprg3 %r1 - - /* Save interesting registers */ - GET_CPUINFO(%r1) - stw %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1) /* free r28-r31 */ - stw %r29,(PC_TEMPSAVE+CPUSAVE_R29)(%r1) - stw %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1) - stw %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1) - mfsprg1 %r1 /* restore SP, in case of branch */ - mfsprg2 %r28 /* save LR */ - mfcr %r29 /* save CR */ - - /* Compute the exception vector from the link register */ - mfsprg3 %r31 - ori %r31,%r31,0xff00 - mflr %r30 - and %r30,%r30,%r31 - mtsprg3 %r30 - - /* Test whether we already had PR set */ - mfsrr1 %r31 - mtcr %r31 - -s_trap: - bf 17,k_trap /* branch if PSL_PR is false */ - GET_CPUINFO(%r1) -u_trap: - lwz %r1,PC_CURPCB(%r1) - RESTORE_KERN_SRS(%r30,%r31) /* enable kernel mapping */ - -/* - * Now the common trap catching code. - */ -k_trap: - FRAME_SETUP(PC_TEMPSAVE) - /* Restore USER_SR */ - GET_CPUINFO(%r30) - lwz %r30,PC_CURPCB(%r30) - lwz %r30,PCB_AIM_USR_VSID(%r30) - mtsr USER_SR,%r30; sync; isync -/* Call C interrupt dispatcher: */ -trapagain: - addi %r3,%r1,8 - bl CNAME(powerpc_interrupt) - .globl CNAME(trapexit) /* backtrace code sentinel */ -CNAME(trapexit): - -/* Disable interrupts: */ - mfmsr %r3 - andi. %r3,%r3,~PSL_EE@l - mtmsr %r3 - isync -/* Test AST pending: */ - lwz %r5,FRAME_SRR1+8(%r1) - mtcr %r5 - bf 17,1f /* branch if PSL_PR is false */ - - GET_CPUINFO(%r3) /* get per-CPU pointer */ - lwz %r4, TD_FLAGS(%r2) /* get thread flags value - * (r2 is curthread) */ - lis %r5, (TDF_ASTPENDING|TDF_NEEDRESCHED)@h - ori %r5,%r5, (TDF_ASTPENDING|TDF_NEEDRESCHED)@l - and. %r4,%r4,%r5 - beq 1f - mfmsr %r3 /* re-enable interrupts */ - ori %r3,%r3,PSL_EE@l - mtmsr %r3 - isync - addi %r3,%r1,8 - bl CNAME(ast) - .globl CNAME(asttrapexit) /* backtrace code sentinel #2 */ -CNAME(asttrapexit): - b trapexit /* test ast ret value ? */ -1: - FRAME_LEAVE(PC_TEMPSAVE) - - .globl CNAME(rfi_patch1) /* replace rfi with rfid on ppc64 */ -CNAME(rfi_patch1): - rfi - - .globl CNAME(rfid_patch) -CNAME(rfid_patch): - rfid - -#if defined(KDB) -/* - * Deliberate entry to dbtrap - */ - .globl CNAME(breakpoint) -CNAME(breakpoint): - mtsprg1 %r1 - mfmsr %r3 - mtsrr1 %r3 - andi. %r3,%r3,~(PSL_EE|PSL_ME)@l - mtmsr %r3 /* disable interrupts */ - isync - GET_CPUINFO(%r3) - stw %r28,(PC_DBSAVE+CPUSAVE_R28)(%r3) - stw %r29,(PC_DBSAVE+CPUSAVE_R29)(%r3) - stw %r30,(PC_DBSAVE+CPUSAVE_R30)(%r3) - stw %r31,(PC_DBSAVE+CPUSAVE_R31)(%r3) - mflr %r28 - li %r29,EXC_BPT - mtlr %r29 - mfcr %r29 - mtsrr0 %r28 - -/* - * Now the kdb trap catching code. - */ -dbtrap: - /* Write the trap vector to SPRG3 by computing LR & 0xff00 */ - mflr %r1 - andi. %r1,%r1,0xff00 - mtsprg3 %r1 - - lwz %r1,TRAP_TOCBASE(0) /* get new SP */ - lwz %r1,trapstk@got(%r1) - addi %r1,%r1,TRAPSTKSZ-16 - - FRAME_SETUP(PC_DBSAVE) -/* Call C trap code: */ - addi %r3,%r1,8 - bl CNAME(db_trap_glue) - or. %r3,%r3,%r3 - bne dbleave -/* This wasn't for KDB, so switch to real trap: */ - lwz %r3,FRAME_EXC+8(%r1) /* save exception */ - GET_CPUINFO(%r4) - stw %r3,(PC_DBSAVE+CPUSAVE_R31)(%r4) - FRAME_LEAVE(PC_DBSAVE) - mtsprg1 %r1 /* prepare for entrance to realtrap */ - GET_CPUINFO(%r1) - stw %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1) - stw %r29,(PC_TEMPSAVE+CPUSAVE_R29)(%r1) - stw %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1) - stw %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1) - mflr %r28 - mfcr %r29 - lwz %r31,(PC_DBSAVE+CPUSAVE_R31)(%r1) - mtsprg3 %r31 /* SPRG3 was clobbered by FRAME_LEAVE */ - mfsprg1 %r1 - b realtrap -dbleave: - FRAME_LEAVE(PC_DBSAVE) - .globl CNAME(rfi_patch2) /* replace rfi with rfid on ppc64 */ -CNAME(rfi_patch2): - rfi - -/* - * In case of KDB we want a separate trap catcher for it - */ - .globl CNAME(dblow),CNAME(dbend) -CNAME(dblow): - mtsprg1 %r1 /* save SP */ - mtsprg2 %r29 /* save r29 */ - mfcr %r29 /* save CR in r29 */ - mfsrr1 %r1 - mtcr %r1 - bf 17,1f /* branch if privileged */ - /* Unprivileged case */ - mtcr %r29 /* put the condition register back */ - mfsprg2 %r29 /* ... and r29 */ - mflr %r1 /* save LR */ - mtsprg2 %r1 /* And then in SPRG2 */ - - lwz %r1, TRAP_ENTRY(0) /* Get branch address */ - mtlr %r1 - li %r1, 0 /* How to get the vector from LR */ - blrl /* LR & (0xff00 | r1) is exception # */ -1: - /* Privileged, so drop to KDB */ - GET_CPUINFO(%r1) - stw %r28,(PC_DBSAVE+CPUSAVE_R28)(%r1) /* free r28 */ - mfsprg2 %r28 /* r29 holds cr... */ - stw %r28,(PC_DBSAVE+CPUSAVE_R29)(%r1) /* free r29 */ - stw %r30,(PC_DBSAVE+CPUSAVE_R30)(%r1) /* free r30 */ - stw %r31,(PC_DBSAVE+CPUSAVE_R31)(%r1) /* free r31 */ - mflr %r28 /* save LR */ - - /* Jump to dbtrap */ - lwz %r1, TRAP_GENTRAP(0) - addi %r1, %r1, (dbtrap - generictrap) - mtlr %r1 - blrl -CNAME(dbend): -#endif /* KDB */ diff --git a/sys/powerpc/aim/trap_subr64.S b/sys/powerpc/aim/trap_subr64.S deleted file mode 100644 index 4cc509b9d88..00000000000 --- a/sys/powerpc/aim/trap_subr64.S +++ /dev/null @@ -1,999 +0,0 @@ -/* $NetBSD: trap_subr.S,v 1.20 2002/04/22 23:20:08 kleink Exp $ */ - -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * NOTICE: This is not a standalone file. to use it, #include it in - * your port's locore.S, like so: - * - * #include - */ - -/* Locate the per-CPU data structure */ -#define GET_CPUINFO(r) \ - mfsprg0 r -#define GET_TOCBASE(r) \ - lis r,DMAP_BASE_ADDRESS@highesta; /* To real-mode alias/dmap */ \ - sldi r,r,32; \ - ori r,r,TRAP_TOCBASE; /* Magic address for TOC */ \ - ld r,0(r) - -/* - * Restore SRs for a pmap - * - * Requires that r28-r31 be scratch, with r28 initialized to the SLB cache - */ - -/* - * User SRs are loaded through a pointer to the current pmap. - */ -restore_usersrs: - GET_CPUINFO(%r28) - ld %r28,PC_USERSLB(%r28) - cmpdi %r28, 0 /* If user SLB pointer NULL, exit */ - beqlr - - li %r29, 0 /* Set the counter to zero */ - - slbia - slbmfee %r31,%r29 - clrrdi %r31,%r31,28 - slbie %r31 -1: ld %r31, 0(%r28) /* Load SLB entry pointer */ - cmpdi %r31, 0 /* If NULL, stop */ - beqlr - - ld %r30, 0(%r31) /* Load SLBV */ - ld %r31, 8(%r31) /* Load SLBE */ - or %r31, %r31, %r29 /* Set SLBE slot */ - slbmte %r30, %r31 /* Install SLB entry */ - - addi %r28, %r28, 8 /* Advance pointer */ - addi %r29, %r29, 1 - b 1b /* Repeat */ - -/* - * Kernel SRs are loaded directly from the PCPU fields - */ -restore_kernsrs: - GET_CPUINFO(%r28) - lwz %r29, PC_FLAGS(%r28) - mtcr %r29 - btlr 0 - addi %r28,%r28,PC_KERNSLB - ld %r29,16(%r28) /* One past USER_SLB_SLOT */ - cmpdi %r29,0 - beqlr /* If first kernel entry is invalid, - * SLBs not in use, so exit early */ - - /* Otherwise, set up SLBs */ - li %r29, 0 /* Set the counter to zero */ - - slbia - slbmfee %r31,%r29 - clrrdi %r31,%r31,28 - slbie %r31 -1: cmpdi %r29, USER_SLB_SLOT /* Skip the user slot */ - beq- 2f - - ld %r31, 8(%r28) /* Load SLBE */ - cmpdi %r31, 0 /* If SLBE is not valid, stop */ - beqlr - ld %r30, 0(%r28) /* Load SLBV */ - slbmte %r30, %r31 /* Install SLB entry */ - -2: addi %r28, %r28, 16 /* Advance pointer */ - addi %r29, %r29, 1 - cmpdi %r29, 64 /* Repeat if we are not at the end */ - blt 1b - blr - -/* - * FRAME_SETUP assumes: - * SPRG1 SP (1) - * SPRG3 trap type - * savearea r27-r31,DAR,DSISR (DAR & DSISR only for DSI traps) - * r28 LR - * r29 CR - * r30 scratch - * r31 scratch - * r1 kernel stack - * SRR0/1 as at start of trap - * - * NOTE: SPRG1 is never used while the MMU is on, making it safe to reuse - * in any real-mode fault handler, including those handling double faults. - */ -#define FRAME_SETUP(savearea) \ -/* Have to enable translation to allow access of kernel stack: */ \ - GET_CPUINFO(%r31); \ - mfsrr0 %r30; \ - std %r30,(savearea+CPUSAVE_SRR0)(%r31); /* save SRR0 */ \ - mfsrr1 %r30; \ - std %r30,(savearea+CPUSAVE_SRR1)(%r31); /* save SRR1 */ \ - mfsprg1 %r31; /* get saved SP (clears SPRG1) */ \ - mfmsr %r30; \ - ori %r30,%r30,(PSL_DR|PSL_IR|PSL_RI)@l; /* relocation on */ \ - mtmsr %r30; /* stack can now be accessed */ \ - isync; \ - stdu %r31,-(FRAMELEN+288)(%r1); /* save it in the callframe */ \ - std %r0, FRAME_0+48(%r1); /* save r0 in the trapframe */ \ - std %r31,FRAME_1+48(%r1); /* save SP " " */ \ - std %r2, FRAME_2+48(%r1); /* save r2 " " */ \ - std %r28,FRAME_LR+48(%r1); /* save LR " " */ \ - std %r29,FRAME_CR+48(%r1); /* save CR " " */ \ - GET_CPUINFO(%r2); \ - ld %r27,(savearea+CPUSAVE_R27)(%r2); /* get saved r27 */ \ - ld %r28,(savearea+CPUSAVE_R28)(%r2); /* get saved r28 */ \ - ld %r29,(savearea+CPUSAVE_R29)(%r2); /* get saved r29 */ \ - ld %r30,(savearea+CPUSAVE_R30)(%r2); /* get saved r30 */ \ - ld %r31,(savearea+CPUSAVE_R31)(%r2); /* get saved r31 */ \ - std %r3, FRAME_3+48(%r1); /* save r3-r31 */ \ - std %r4, FRAME_4+48(%r1); \ - std %r5, FRAME_5+48(%r1); \ - std %r6, FRAME_6+48(%r1); \ - std %r7, FRAME_7+48(%r1); \ - std %r8, FRAME_8+48(%r1); \ - std %r9, FRAME_9+48(%r1); \ - std %r10, FRAME_10+48(%r1); \ - std %r11, FRAME_11+48(%r1); \ - std %r12, FRAME_12+48(%r1); \ - std %r13, FRAME_13+48(%r1); \ - std %r14, FRAME_14+48(%r1); \ - std %r15, FRAME_15+48(%r1); \ - std %r16, FRAME_16+48(%r1); \ - std %r17, FRAME_17+48(%r1); \ - std %r18, FRAME_18+48(%r1); \ - std %r19, FRAME_19+48(%r1); \ - std %r20, FRAME_20+48(%r1); \ - std %r21, FRAME_21+48(%r1); \ - std %r22, FRAME_22+48(%r1); \ - std %r23, FRAME_23+48(%r1); \ - std %r24, FRAME_24+48(%r1); \ - std %r25, FRAME_25+48(%r1); \ - std %r26, FRAME_26+48(%r1); \ - std %r27, FRAME_27+48(%r1); \ - std %r28, FRAME_28+48(%r1); \ - std %r29, FRAME_29+48(%r1); \ - std %r30, FRAME_30+48(%r1); \ - std %r31, FRAME_31+48(%r1); \ - ld %r28,(savearea+CPUSAVE_AIM_DAR)(%r2); /* saved DAR */ \ - ld %r29,(savearea+CPUSAVE_AIM_DSISR)(%r2);/* saved DSISR */\ - ld %r30,(savearea+CPUSAVE_SRR0)(%r2); /* saved SRR0 */ \ - ld %r31,(savearea+CPUSAVE_SRR1)(%r2); /* saved SRR1 */ \ - mfxer %r3; \ - mfctr %r4; \ - mfsprg3 %r5; \ - std %r3, FRAME_XER+48(1); /* save xer/ctr/exc */ \ - std %r4, FRAME_CTR+48(1); \ - std %r5, FRAME_EXC+48(1); \ - std %r28,FRAME_AIM_DAR+48(1); \ - std %r29,FRAME_AIM_DSISR+48(1); /* save dsisr/srr0/srr1 */ \ - std %r30,FRAME_SRR0+48(1); \ - std %r31,FRAME_SRR1+48(1); \ - ld %r13,PC_CURTHREAD(%r2) /* set kernel curthread */ - -#define FRAME_LEAVE(savearea) \ -/* Disable exceptions: */ \ - mfmsr %r2; \ - andi. %r2,%r2,~PSL_EE@l; \ - mtmsr %r2; \ - isync; \ -/* Now restore regs: */ \ - ld %r2,FRAME_SRR0+48(%r1); \ - ld %r3,FRAME_SRR1+48(%r1); \ - ld %r4,FRAME_CTR+48(%r1); \ - ld %r5,FRAME_XER+48(%r1); \ - ld %r6,FRAME_LR+48(%r1); \ - GET_CPUINFO(%r7); \ - std %r2,(savearea+CPUSAVE_SRR0)(%r7); /* save SRR0 */ \ - std %r3,(savearea+CPUSAVE_SRR1)(%r7); /* save SRR1 */ \ - ld %r7,FRAME_CR+48(%r1); \ - mtctr %r4; \ - mtxer %r5; \ - mtlr %r6; \ - mtsprg2 %r7; /* save cr */ \ - ld %r31,FRAME_31+48(%r1); /* restore r0-31 */ \ - ld %r30,FRAME_30+48(%r1); \ - ld %r29,FRAME_29+48(%r1); \ - ld %r28,FRAME_28+48(%r1); \ - ld %r27,FRAME_27+48(%r1); \ - ld %r26,FRAME_26+48(%r1); \ - ld %r25,FRAME_25+48(%r1); \ - ld %r24,FRAME_24+48(%r1); \ - ld %r23,FRAME_23+48(%r1); \ - ld %r22,FRAME_22+48(%r1); \ - ld %r21,FRAME_21+48(%r1); \ - ld %r20,FRAME_20+48(%r1); \ - ld %r19,FRAME_19+48(%r1); \ - ld %r18,FRAME_18+48(%r1); \ - ld %r17,FRAME_17+48(%r1); \ - ld %r16,FRAME_16+48(%r1); \ - ld %r15,FRAME_15+48(%r1); \ - ld %r14,FRAME_14+48(%r1); \ - ld %r13,FRAME_13+48(%r1); \ - ld %r12,FRAME_12+48(%r1); \ - ld %r11,FRAME_11+48(%r1); \ - ld %r10,FRAME_10+48(%r1); \ - ld %r9, FRAME_9+48(%r1); \ - ld %r8, FRAME_8+48(%r1); \ - ld %r7, FRAME_7+48(%r1); \ - ld %r6, FRAME_6+48(%r1); \ - ld %r5, FRAME_5+48(%r1); \ - ld %r4, FRAME_4+48(%r1); \ - ld %r3, FRAME_3+48(%r1); \ - ld %r2, FRAME_2+48(%r1); \ - ld %r0, FRAME_0+48(%r1); \ - ld %r1, FRAME_1+48(%r1); \ -/* Can't touch %r1 from here on */ \ - mtsprg3 %r3; /* save r3 */ \ -/* Disable translation, machine check and recoverability: */ \ - mfmsr %r3; \ - andi. %r3,%r3,~(PSL_DR|PSL_IR|PSL_ME|PSL_RI)@l; \ - mtmsr %r3; \ - isync; \ -/* Decide whether we return to user mode: */ \ - GET_CPUINFO(%r3); \ - ld %r3,(savearea+CPUSAVE_SRR1)(%r3); \ - mtcr %r3; \ - bf 17,1f; /* branch if PSL_PR is false */ \ -/* Restore user SRs */ \ - GET_CPUINFO(%r3); \ - std %r27,(savearea+CPUSAVE_R27)(%r3); \ - std %r28,(savearea+CPUSAVE_R28)(%r3); \ - std %r29,(savearea+CPUSAVE_R29)(%r3); \ - std %r30,(savearea+CPUSAVE_R30)(%r3); \ - std %r31,(savearea+CPUSAVE_R31)(%r3); \ - lwz %r28,PC_FLAGS(%r3); \ - mtcr %r28; \ - bt 0, 0f; /* Check to skip restoring SRs. */ \ - mflr %r27; /* preserve LR */ \ - bl restore_usersrs; /* uses r28-r31 */ \ - mtlr %r27; \ -0: \ - ld %r31,(savearea+CPUSAVE_R31)(%r3); \ - ld %r30,(savearea+CPUSAVE_R30)(%r3); \ - ld %r29,(savearea+CPUSAVE_R29)(%r3); \ - ld %r28,(savearea+CPUSAVE_R28)(%r3); \ - ld %r27,(savearea+CPUSAVE_R27)(%r3); \ -1: mfsprg2 %r3; /* restore cr */ \ - mtcr %r3; \ - GET_CPUINFO(%r3); \ - ld %r3,(savearea+CPUSAVE_SRR0)(%r3); /* restore srr0 */ \ - mtsrr0 %r3; \ - GET_CPUINFO(%r3); \ - ld %r3,(savearea+CPUSAVE_SRR1)(%r3); /* restore srr1 */ \ - mtsrr1 %r3; \ - mfsprg3 %r3 /* restore r3 */ - -#ifdef KDTRACE_HOOKS - .data - .globl dtrace_invop_calltrap_addr - .align 8 - .type dtrace_invop_calltrap_addr, @object - .size dtrace_invop_calltrap_addr, 8 -dtrace_invop_calltrap_addr: - .word 0 - .word 0 - - .text -#endif - -/* - * Processor reset exception handler. These are typically - * the first instructions the processor executes after a - * software reset. We do this in two bits so that we are - * not still hanging around in the trap handling region - * once the MMU is turned on. - */ - .globl CNAME(rstcode), CNAME(rstcodeend), CNAME(cpu_reset_handler) - .globl CNAME(cpu_wakeup_handler) - .p2align 3 -CNAME(rstcode): -#ifdef __LITTLE_ENDIAN__ - /* - * XXX This shouldn't be necessary. - * - * According to the ISA documentation, LE should be set from HILE - * or the LPCR ILE bit automatically. However, the entry into this - * vector from OPAL_START_CPU does not honor this correctly. - * - * We should be able to define an alternate entry for opal's - * start_kernel_secondary asm code to branch to. - */ - RETURN_TO_NATIVE_ENDIAN -#endif - /* - * Check if this is software reset or - * processor is waking up from power saving mode - * It is software reset when 46:47 = 0b00 - */ - /* 0x00 */ - ld %r2,TRAP_GENTRAP(0) /* Real-mode &generictrap */ - mfsrr1 %r9 /* Load SRR1 into r9 */ - andis. %r9,%r9,0x3 /* Logic AND with 46:47 bits */ - - beq 2f /* Branch if software reset */ - /* 0x10 */ - /* Reset was wakeup */ - addi %r9,%r2,(cpu_wakeup_handler-generictrap) - b 1f /* Was power save, do the wakeup */ - - /* Reset was software reset */ - /* Explicitly set MSR[SF] */ -2: mfmsr %r9 - li %r8,1 - /* 0x20 */ - insrdi %r9,%r8,1,0 - mtmsrd %r9 - isync - - addi %r9,%r2,(cpu_reset_handler-generictrap) - - /* 0x30 */ -1: mtlr %r9 - blr /* Branch to either cpu_reset_handler - * or cpu_wakeup_handler. - */ -CNAME(rstcodeend): - -cpu_reset_handler: - GET_TOCBASE(%r2) - - addis %r1,%r2,TOC_REF(tmpstk)@ha - ld %r1,TOC_REF(tmpstk)@l(%r1) /* get new SP */ - addi %r1,%r1,(TMPSTKSZ-48) - - bl CNAME(cpudep_ap_early_bootstrap) /* Set PCPU */ - nop - lis %r3,1@l - bl CNAME(pmap_cpu_bootstrap) /* Turn on virtual memory */ - nop - bl CNAME(cpudep_ap_bootstrap) /* Set up PCPU and stack */ - nop - mr %r1,%r3 /* Use new stack */ - bl CNAME(cpudep_ap_setup) - nop - GET_CPUINFO(%r5) - ld %r3,(PC_RESTORE)(%r5) - cmpldi %cr0,%r3,0 - beq %cr0,2f - nop - li %r4,1 - bl CNAME(longjmp) - nop -2: -#ifdef SMP - bl CNAME(machdep_ap_bootstrap) /* And away! */ - nop -#endif - - /* Should not be reached */ -9: - b 9b - -cpu_wakeup_handler: - GET_TOCBASE(%r2) - - /* Check for false wake up due to badly SRR1 set (eg. by OPAL) */ - addis %r3,%r2,TOC_REF(can_wakeup)@ha - ld %r3,TOC_REF(can_wakeup)@l(%r3) - ld %r3,0(%r3) - cmpdi %r3,0 - beq cpu_reset_handler - - /* Turn on MMU after return from interrupt */ - mfsrr1 %r3 - ori %r3,%r3,(PSL_IR | PSL_DR) - mtsrr1 %r3 - - /* Turn on MMU (needed to access PCB) */ - mfmsr %r3 - ori %r3,%r3,(PSL_IR | PSL_DR) - mtmsr %r3 - isync - - mfsprg0 %r3 - - ld %r3,PC_CURTHREAD(%r3) /* Get current thread */ - ld %r3,TD_PCB(%r3) /* Get PCB of current thread */ - ld %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs. */ - ld %r13,PCB_CONTEXT+1*8(%r3) - ld %r14,PCB_CONTEXT+2*8(%r3) - ld %r15,PCB_CONTEXT+3*8(%r3) - ld %r16,PCB_CONTEXT+4*8(%r3) - ld %r17,PCB_CONTEXT+5*8(%r3) - ld %r18,PCB_CONTEXT+6*8(%r3) - ld %r19,PCB_CONTEXT+7*8(%r3) - ld %r20,PCB_CONTEXT+8*8(%r3) - ld %r21,PCB_CONTEXT+9*8(%r3) - ld %r22,PCB_CONTEXT+10*8(%r3) - ld %r23,PCB_CONTEXT+11*8(%r3) - ld %r24,PCB_CONTEXT+12*8(%r3) - ld %r25,PCB_CONTEXT+13*8(%r3) - ld %r26,PCB_CONTEXT+14*8(%r3) - ld %r27,PCB_CONTEXT+15*8(%r3) - ld %r28,PCB_CONTEXT+16*8(%r3) - ld %r29,PCB_CONTEXT+17*8(%r3) - ld %r30,PCB_CONTEXT+18*8(%r3) - ld %r31,PCB_CONTEXT+19*8(%r3) - ld %r5,PCB_CR(%r3) /* Load the condition register */ - mtcr %r5 - ld %r5,PCB_LR(%r3) /* Load the link register */ - mtsrr0 %r5 - ld %r1,PCB_SP(%r3) /* Load the stack pointer */ - ld %r2,PCB_TOC(%r3) /* Load the TOC pointer */ - - rfid - -/* - * This code gets copied to all the trap vectors - * (except ISI/DSI, ALI, and the interrupts). Has to fit in 8 instructions! - */ - - .globl CNAME(trapcode),CNAME(trapcodeend) - .p2align 3 -CNAME(trapcode): - mtsprg1 %r1 /* save SP */ - mflr %r1 /* Save the old LR in r1 */ - mtsprg2 %r1 /* And then in SPRG2 */ - ld %r1,TRAP_ENTRY(0) - mtlr %r1 - li %r1, 0xe0 /* How to get the vector from LR */ - blrl /* Branch to generictrap */ -CNAME(trapcodeend): - -/* Same thing for traps setting HSRR0/HSRR1 */ - .globl CNAME(hypertrapcode),CNAME(hypertrapcodeend) - .p2align 3 -CNAME(hypertrapcode): - mtsprg1 %r1 /* save SP */ - mflr %r1 /* Save the old LR in r1 */ - mtsprg2 %r1 /* And then in SPRG2 */ - ld %r1,TRAP_GENTRAP(0) - addi %r1,%r1,(generichypertrap-generictrap) - mtlr %r1 - li %r1, 0xe0 /* How to get the vector from LR */ - blrl /* Branch to generichypertrap */ -CNAME(hypertrapcodeend): - -/* - * For SLB misses: do special things for the kernel - * - * Note: SPRG1 is always safe to overwrite any time the MMU was on, which is - * the only time this can be called. - */ - .globl CNAME(slbtrap),CNAME(slbtrapend) - .p2align 3 -CNAME(slbtrap): - /* 0x00 */ - mtsprg1 %r1 /* save SP */ - GET_CPUINFO(%r1) - std %r2,(PC_SLBSAVE+16)(%r1) /* save r2 */ - mfcr %r2 - /* 0x10 */ - std %r2,(PC_SLBSAVE+104)(%r1) /* save CR */ - mfsrr1 %r2 /* test kernel mode */ - mtcr %r2 - bf 17,2f /* branch if PSL_PR is false */ - /* 0x20 */ - /* User mode */ - ld %r2,(PC_SLBSAVE+104)(%r1) - mtcr %r2 /* restore CR */ - ld %r2,(PC_SLBSAVE+16)(%r1) /* restore r2 */ - mflr %r1 - /* 0x30 */ - mtsprg2 %r1 /* save LR in SPRG2 */ - ld %r1,TRAP_ENTRY(0) /* real-mode &generictrap */ - mtlr %r1 - li %r1, 0x80 /* How to get the vector from LR */ - /* 0x40 */ - blrl /* Branch to generictrap */ -2: mflr %r2 /* Save the old LR in r2 */ - /* Kernel mode */ - ld %r1,TRAP_GENTRAP(0) /* Real-mode &generictrap */ - addi %r1,%r1,(kern_slbtrap-generictrap) - /* 0x50 */ - mtlr %r1 - GET_CPUINFO(%r1) - blrl /* Branch to kern_slbtrap */ -/* must fit in 128 bytes! */ -CNAME(slbtrapend): - -/* - * On entry: - * SPRG1: SP - * r1: pcpu - * r2: LR - * LR: branch address in trap region - */ -kern_slbtrap: - std %r2,(PC_SLBSAVE+136)(%r1) /* old LR */ - std %r3,(PC_SLBSAVE+24)(%r1) /* save R3 */ - - /* Check if this needs to be handled as a regular trap (userseg miss) */ - mflr %r2 - andi. %r2,%r2,0xff80 - cmpwi %r2,EXC_DSE - bne 1f - mfdar %r2 - b 2f -1: mfsrr0 %r2 -2: /* r2 now contains the fault address */ - lis %r3,SEGMENT_MASK@highesta - ori %r3,%r3,SEGMENT_MASK@highera - sldi %r3,%r3,32 - oris %r3,%r3,SEGMENT_MASK@ha - ori %r3,%r3,SEGMENT_MASK@l - and %r2,%r2,%r3 /* R2 = segment base address */ - lis %r3,USER_ADDR@highesta - ori %r3,%r3,USER_ADDR@highera - sldi %r3,%r3,32 - oris %r3,%r3,USER_ADDR@ha - ori %r3,%r3,USER_ADDR@l - cmpd %r2,%r3 /* Compare fault base to USER_ADDR */ - bne 3f - - /* User seg miss, handle as a regular trap */ - ld %r2,(PC_SLBSAVE+104)(%r1) /* Restore CR */ - mtcr %r2 - ld %r2,(PC_SLBSAVE+16)(%r1) /* Restore R2,R3 */ - ld %r3,(PC_SLBSAVE+24)(%r1) - ld %r1,(PC_SLBSAVE+136)(%r1) /* Save the old LR in r1 */ - mtsprg2 %r1 /* And then in SPRG2 */ - li %r1, 0x80 /* How to get the vector from LR */ - b generictrap /* Retain old LR using b */ - -3: /* Real kernel SLB miss */ - std %r0,(PC_SLBSAVE+0)(%r1) /* free all volatile regs */ - mfsprg1 %r2 /* Old R1 */ - std %r2,(PC_SLBSAVE+8)(%r1) - /* R2,R3 already saved */ - std %r4,(PC_SLBSAVE+32)(%r1) - std %r5,(PC_SLBSAVE+40)(%r1) - std %r6,(PC_SLBSAVE+48)(%r1) - std %r7,(PC_SLBSAVE+56)(%r1) - std %r8,(PC_SLBSAVE+64)(%r1) - std %r9,(PC_SLBSAVE+72)(%r1) - std %r10,(PC_SLBSAVE+80)(%r1) - std %r11,(PC_SLBSAVE+88)(%r1) - std %r12,(PC_SLBSAVE+96)(%r1) - /* CR already saved */ - mfxer %r2 /* save XER */ - std %r2,(PC_SLBSAVE+112)(%r1) - mflr %r2 /* save LR (SP already saved) */ - std %r2,(PC_SLBSAVE+120)(%r1) - mfctr %r2 /* save CTR */ - std %r2,(PC_SLBSAVE+128)(%r1) - - /* Call handler */ - addi %r1,%r1,PC_SLBSTACK-48+1024 - li %r2,~15 - and %r1,%r1,%r2 - GET_TOCBASE(%r2) - mflr %r3 - andi. %r3,%r3,0xff80 - mfdar %r4 - mfsrr0 %r5 - bl handle_kernel_slb_spill - nop - - /* Save r28-31, restore r4-r12 */ - GET_CPUINFO(%r1) - ld %r4,(PC_SLBSAVE+32)(%r1) - ld %r5,(PC_SLBSAVE+40)(%r1) - ld %r6,(PC_SLBSAVE+48)(%r1) - ld %r7,(PC_SLBSAVE+56)(%r1) - ld %r8,(PC_SLBSAVE+64)(%r1) - ld %r9,(PC_SLBSAVE+72)(%r1) - ld %r10,(PC_SLBSAVE+80)(%r1) - ld %r11,(PC_SLBSAVE+88)(%r1) - ld %r12,(PC_SLBSAVE+96)(%r1) - std %r28,(PC_SLBSAVE+64)(%r1) - std %r29,(PC_SLBSAVE+72)(%r1) - std %r30,(PC_SLBSAVE+80)(%r1) - std %r31,(PC_SLBSAVE+88)(%r1) - - /* Restore kernel mapping */ - bl restore_kernsrs - - /* Restore remaining registers */ - ld %r28,(PC_SLBSAVE+64)(%r1) - ld %r29,(PC_SLBSAVE+72)(%r1) - ld %r30,(PC_SLBSAVE+80)(%r1) - ld %r31,(PC_SLBSAVE+88)(%r1) - - ld %r2,(PC_SLBSAVE+104)(%r1) - mtcr %r2 - ld %r2,(PC_SLBSAVE+112)(%r1) - mtxer %r2 - ld %r2,(PC_SLBSAVE+120)(%r1) - mtlr %r2 - ld %r2,(PC_SLBSAVE+128)(%r1) - mtctr %r2 - ld %r2,(PC_SLBSAVE+136)(%r1) - mtlr %r2 - - /* Restore r0-r3 */ - ld %r0,(PC_SLBSAVE+0)(%r1) - ld %r2,(PC_SLBSAVE+16)(%r1) - ld %r3,(PC_SLBSAVE+24)(%r1) - mfsprg1 %r1 - - /* Back to whatever we were doing */ - rfid - -/* - * For ALI: has to save DSISR and DAR - */ - .globl CNAME(alitrap),CNAME(aliend) -CNAME(alitrap): - mtsprg1 %r1 /* save SP */ - GET_CPUINFO(%r1) - std %r27,(PC_TEMPSAVE+CPUSAVE_R27)(%r1) /* free r27-r31 */ - std %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1) - std %r29,(PC_TEMPSAVE+CPUSAVE_R29)(%r1) - std %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1) - std %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1) - mfdar %r30 - mfdsisr %r31 - std %r30,(PC_TEMPSAVE+CPUSAVE_AIM_DAR)(%r1) - std %r31,(PC_TEMPSAVE+CPUSAVE_AIM_DSISR)(%r1) - mfsprg1 %r1 /* restore SP, in case of branch */ - mflr %r28 /* save LR */ - mfcr %r29 /* save CR */ - - ld %r31,TRAP_GENTRAP(0) - addi %r31,%r31,(s_trap - generictrap) - mtlr %r31 - - /* Put our exception vector in SPRG3 */ - li %r31, EXC_ALI - mtsprg3 %r31 - - /* Test whether we already had PR set */ - mfsrr1 %r31 - mtcr %r31 - blrl /* Branch to s_trap */ -CNAME(aliend): - -/* - * Similar to the above for DSI - * Has to handle standard pagetable spills - */ - .globl CNAME(dsitrap),CNAME(dsiend) - .p2align 3 -CNAME(dsitrap): - mtsprg1 %r1 /* save SP */ - GET_CPUINFO(%r1) - std %r27,(PC_DISISAVE+CPUSAVE_R27)(%r1) /* free r27-r31 */ - std %r28,(PC_DISISAVE+CPUSAVE_R28)(%r1) - std %r29,(PC_DISISAVE+CPUSAVE_R29)(%r1) - std %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1) - std %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1) - mfcr %r29 /* save CR */ - mfxer %r30 /* save XER */ - mtsprg2 %r30 /* in SPRG2 */ - mfsrr1 %r31 /* test kernel mode */ - mtcr %r31 - mflr %r28 /* save LR (SP already saved) */ - ld %r1,TRAP_GENTRAP(0) - addi %r1,%r1,(disitrap-generictrap) - mtlr %r1 - blrl /* Branch to disitrap */ -CNAME(dsiend): - -/* - * Preamble code for DSI/ISI traps - */ -disitrap: - /* Write the trap vector to SPRG3 by computing LR & 0xff00 */ - mflr %r1 - andi. %r1,%r1,0xff00 - mtsprg3 %r1 - - GET_CPUINFO(%r1) - ld %r31,(PC_DISISAVE+CPUSAVE_R27)(%r1) - std %r31,(PC_TEMPSAVE+CPUSAVE_R27)(%r1) - ld %r30,(PC_DISISAVE+CPUSAVE_R28)(%r1) - std %r30,(PC_TEMPSAVE+CPUSAVE_R28)(%r1) - ld %r31,(PC_DISISAVE+CPUSAVE_R29)(%r1) - std %r31,(PC_TEMPSAVE+CPUSAVE_R29)(%r1) - ld %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1) - std %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1) - ld %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1) - std %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1) - mfdar %r30 - mfdsisr %r31 - std %r30,(PC_TEMPSAVE+CPUSAVE_AIM_DAR)(%r1) - std %r31,(PC_TEMPSAVE+CPUSAVE_AIM_DSISR)(%r1) - -#ifdef KDB - /* Try to detect a kernel stack overflow */ - mfsrr1 %r31 - mtcr %r31 - bt 17,realtrap /* branch is user mode */ - mfsprg1 %r31 /* get old SP */ - clrrdi %r31,%r31,12 /* Round SP down to nearest page */ - sub. %r30,%r31,%r30 /* SP - DAR */ - bge 1f - neg %r30,%r30 /* modulo value */ -1: cmpldi %cr0,%r30,4096 /* is DAR within a page of SP? */ - bge %cr0,realtrap /* no, too far away. */ - - /* Now convert this DSI into a DDB trap. */ - GET_CPUINFO(%r1) - ld %r30,(PC_TEMPSAVE+CPUSAVE_AIM_DAR)(%r1) /* get DAR */ - std %r30,(PC_DBSAVE +CPUSAVE_AIM_DAR)(%r1) /* save DAR */ - ld %r30,(PC_TEMPSAVE+CPUSAVE_AIM_DSISR)(%r1) /* get DSISR */ - std %r30,(PC_DBSAVE +CPUSAVE_AIM_DSISR)(%r1) /* save DSISR */ - ld %r31,(PC_DISISAVE+CPUSAVE_R27)(%r1) /* get r27 */ - std %r31,(PC_DBSAVE +CPUSAVE_R27)(%r1) /* save r27 */ - ld %r30,(PC_DISISAVE+CPUSAVE_R28)(%r1) /* get r28 */ - std %r30,(PC_DBSAVE +CPUSAVE_R28)(%r1) /* save r28 */ - ld %r31,(PC_DISISAVE+CPUSAVE_R29)(%r1) /* get r29 */ - std %r31,(PC_DBSAVE +CPUSAVE_R29)(%r1) /* save r29 */ - ld %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1) /* get r30 */ - std %r30,(PC_DBSAVE +CPUSAVE_R30)(%r1) /* save r30 */ - ld %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1) /* get r31 */ - std %r31,(PC_DBSAVE +CPUSAVE_R31)(%r1) /* save r31 */ - b dbtrap -#endif - - /* XXX need stack probe here */ -realtrap: -/* Test whether we already had PR set */ - mfsrr1 %r1 - mtcr %r1 - mfsprg1 %r1 /* restore SP (might have been - overwritten) */ - bf 17,k_trap /* branch if PSL_PR is false */ - GET_CPUINFO(%r1) - ld %r1,PC_CURPCB(%r1) - mr %r27,%r28 /* Save LR, r29 */ - mtsprg2 %r29 - bl restore_kernsrs /* enable kernel mapping */ - mfsprg2 %r29 - mr %r28,%r27 - b s_trap - -/* - * generictrap does some standard setup for trap handling to minimize - * the code that need be installed in the actual vectors. It expects - * the following conditions. - * - * R1 - Trap vector = LR & (0xff00 | R1) - * SPRG1 - Original R1 contents - * SPRG2 - Original LR - */ - -generichypertrap: - mtsprg3 %r1 - mfspr %r1, SPR_HSRR0 - mtsrr0 %r1 - mfspr %r1, SPR_HSRR1 - mtsrr1 %r1 - mfsprg3 %r1 - .globl CNAME(generictrap) -generictrap: - /* Save R1 for computing the exception vector */ - mtsprg3 %r1 - - /* Save interesting registers */ - GET_CPUINFO(%r1) - std %r27,(PC_TEMPSAVE+CPUSAVE_R27)(%r1) /* free r27-r31 */ - std %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1) - std %r29,(PC_TEMPSAVE+CPUSAVE_R29)(%r1) - std %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1) - std %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1) - mfdar %r30 - std %r30,(PC_TEMPSAVE+CPUSAVE_AIM_DAR)(%r1) - mfdsisr %r30 - std %r30,(PC_TEMPSAVE+CPUSAVE_AIM_DSISR)(%r1) - mfsprg1 %r1 /* restore SP, in case of branch */ - mfsprg2 %r28 /* save LR */ - mfcr %r29 /* save CR */ - - /* Compute the exception vector from the link register */ - mfsprg3 %r31 - ori %r31,%r31,0xff00 - mflr %r30 - addi %r30,%r30,-4 /* The branch instruction, not the next */ - and %r30,%r30,%r31 - mtsprg3 %r30 - - /* Test whether we already had PR set */ - mfsrr1 %r31 - mtcr %r31 - -s_trap: - bf 17,k_trap /* branch if PSL_PR is false */ - GET_CPUINFO(%r1) -u_trap: - ld %r1,PC_CURPCB(%r1) - mr %r27,%r28 /* Save LR, r29 */ - mtsprg2 %r29 - bl restore_kernsrs /* enable kernel mapping */ - mfsprg2 %r29 - mr %r28,%r27 - -/* - * Now the common trap catching code. - */ -k_trap: - FRAME_SETUP(PC_TEMPSAVE) -/* Call C interrupt dispatcher: */ -trapagain: - GET_TOCBASE(%r2) - addi %r3,%r1,48 - bl CNAME(powerpc_interrupt) - nop - - .globl CNAME(trapexit) /* backtrace code sentinel */ -CNAME(trapexit): -/* Disable interrupts: */ - mfmsr %r3 - andi. %r3,%r3,~PSL_EE@l - mtmsr %r3 - isync -/* Test AST pending: */ - ld %r5,FRAME_SRR1+48(%r1) - mtcr %r5 - bf 17,1f /* branch if PSL_PR is false */ - - GET_CPUINFO(%r3) /* get per-CPU pointer */ - lwz %r4, TD_FLAGS(%r13) /* get thread flags value */ - lis %r5, (TDF_ASTPENDING|TDF_NEEDRESCHED)@h - ori %r5,%r5, (TDF_ASTPENDING|TDF_NEEDRESCHED)@l - and. %r4,%r4,%r5 - beq 1f - mfmsr %r3 /* re-enable interrupts */ - ori %r3,%r3,PSL_EE@l - mtmsr %r3 - isync - GET_TOCBASE(%r2) - addi %r3,%r1,48 - bl CNAME(ast) - nop - .globl CNAME(asttrapexit) /* backtrace code sentinel #2 */ -CNAME(asttrapexit): - b trapexit /* test ast ret value ? */ -1: - FRAME_LEAVE(PC_TEMPSAVE) - rfid - -#if defined(KDB) -/* - * Deliberate entry to dbtrap - */ -ASENTRY_NOPROF(breakpoint) - mtsprg1 %r1 - mfmsr %r3 - mtsrr1 %r3 - andi. %r3,%r3,~(PSL_EE|PSL_ME)@l - mtmsr %r3 /* disable interrupts */ - isync - GET_CPUINFO(%r3) - std %r27,(PC_DBSAVE+CPUSAVE_R27)(%r3) - std %r28,(PC_DBSAVE+CPUSAVE_R28)(%r3) - std %r29,(PC_DBSAVE+CPUSAVE_R29)(%r3) - std %r30,(PC_DBSAVE+CPUSAVE_R30)(%r3) - std %r31,(PC_DBSAVE+CPUSAVE_R31)(%r3) - mflr %r28 - li %r29,EXC_BPT - mtlr %r29 - mfcr %r29 - mtsrr0 %r28 - -/* - * Now the kdb trap catching code. - */ -dbtrap: - /* Write the trap vector to SPRG3 by computing LR & 0xff00 */ - mflr %r1 - andi. %r1,%r1,0xff00 - mtsprg3 %r1 - - GET_TOCBASE(%r1) /* get new SP */ - addis %r1,%r1,TOC_REF(trapstk)@ha - ld %r1,TOC_REF(trapstk)@l(%r1) - addi %r1,%r1,(TRAPSTKSZ-48) - - FRAME_SETUP(PC_DBSAVE) -/* Call C trap code: */ - GET_TOCBASE(%r2) - addi %r3,%r1,48 - bl CNAME(db_trap_glue) - nop - or. %r3,%r3,%r3 - bne dbleave -/* This wasn't for KDB, so switch to real trap: */ - ld %r3,FRAME_EXC+48(%r1) /* save exception */ - GET_CPUINFO(%r4) - std %r3,(PC_DBSAVE+CPUSAVE_R31)(%r4) - FRAME_LEAVE(PC_DBSAVE) - mtsprg1 %r1 /* prepare for entrance to realtrap */ - GET_CPUINFO(%r1) - std %r27,(PC_TEMPSAVE+CPUSAVE_R27)(%r1) - std %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1) - std %r29,(PC_TEMPSAVE+CPUSAVE_R29)(%r1) - std %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1) - std %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1) - mflr %r28 - mfcr %r29 - ld %r31,(PC_DBSAVE+CPUSAVE_R31)(%r1) - mtsprg3 %r31 /* SPRG3 was clobbered by FRAME_LEAVE */ - mfsprg1 %r1 - b realtrap -dbleave: - FRAME_LEAVE(PC_DBSAVE) - rfid -ASEND(breakpoint) - -/* - * In case of KDB we want a separate trap catcher for it - */ - .globl CNAME(dblow),CNAME(dbend) - .p2align 3 -CNAME(dblow): - mtsprg1 %r1 /* save SP */ - mtsprg2 %r29 /* save r29 */ - mfcr %r29 /* save CR in r29 */ - mfsrr1 %r1 - mtcr %r1 - bf 17,1f /* branch if privileged */ - - /* Unprivileged case */ - mtcr %r29 /* put the condition register back */ - mfsprg2 %r29 /* ... and r29 */ - mflr %r1 /* save LR */ - mtsprg2 %r1 /* And then in SPRG2 */ - - ld %r1, TRAP_ENTRY(0) /* Get branch address */ - mtlr %r1 - li %r1, 0 /* How to get the vector from LR */ - blrl /* Branch to generictrap */ - /* No fallthrough */ -1: - GET_CPUINFO(%r1) - std %r27,(PC_DBSAVE+CPUSAVE_R27)(%r1) /* free r27 */ - std %r28,(PC_DBSAVE+CPUSAVE_R28)(%r1) /* free r28 */ - mfsprg2 %r28 /* r29 holds cr... */ - std %r28,(PC_DBSAVE+CPUSAVE_R29)(%r1) /* free r29 */ - std %r30,(PC_DBSAVE+CPUSAVE_R30)(%r1) /* free r30 */ - std %r31,(PC_DBSAVE+CPUSAVE_R31)(%r1) /* free r31 */ - mflr %r28 /* save LR */ - ld %r1,TRAP_GENTRAP(0) - addi %r1,%r1,(dbtrap-generictrap) - mtlr %r1 - blrl /* Branch to dbtrap */ -CNAME(dbend): -#endif /* KDB */ diff --git a/sys/powerpc/amigaone/cpld.h b/sys/powerpc/amigaone/cpld.h deleted file mode 100644 index fb7d8e9219c..00000000000 --- a/sys/powerpc/amigaone/cpld.h +++ /dev/null @@ -1,44 +0,0 @@ -/*- - * Copyright (c) 2020 Justin Hibbits - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef AMIGAONE_CPLD_H -#define AMIGAONE_CPLD_H - -#include - -/* - * Write 'words' to 'offset' offset in dual-port RAM, then write cmd to mailbox. - */ -struct cpld_cmd_data { - unsigned int cmd; - unsigned int len; - unsigned int offset; - void *words; -}; - -#define IOCCPLDSEND _IOW('c', 2, struct cpld_cmd_data) -#define IOCCPLDRECV _IOW('c', 3, struct cpld_cmd_data) - -#endif /* AMIGAONE_CPLD_H */ diff --git a/sys/powerpc/amigaone/cpld_a1222.c b/sys/powerpc/amigaone/cpld_a1222.c deleted file mode 100644 index e2f8aa03669..00000000000 --- a/sys/powerpc/amigaone/cpld_a1222.c +++ /dev/null @@ -1,399 +0,0 @@ -/*- - * Copyright (c) 2020 Justin Hibbits - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include - -#include "cpld.h" - -/* - * A driver for the AmigaOne A1222 "Tabor" Main CPLD. - * - * The main CPLD is the interface between the CPU and the GPIO CPLD. - * Communication with the GPIO CPLD is over the main CPLD's mailbox interface, - * along with the dual-port RAM on the CPLD. - * - * Only one process can open the CPLD character device at a time. The driver - * enforces this to simplify the communication protocol. - */ - -/* Resource access addresses. */ -#define CPLD_MEM_ADDR_H 0x00 -#define CPLD_MEM_ADDR_L 0x01 -#define CPLD_MEM_DATA 0x80 - -#define CPLD_MAX_DRAM_WORDS 0x800 - -/* CPLD Registers. */ -#define CPLD_REG_SIG1 0x00 -#define CPLD_REG_SIG2 0x01 -#define CPLD_REG_HWREV 0x02 -#define CPLD_REG_CPLDREV 0x03 -#define CPLD_REG_MBC2X 0x04 -#define CPLD_REG_MBX2C 0x05 -#define CPLD_REG_FAN1_TACHO_U 0x10 -#define CPLD_REG_FAN1_TACHO_L 0x11 -#define CPLD_REG_FAN2_TACHO_U 0x12 -#define CPLD_REG_FAN2_TACHO_L 0x13 -#define CPLD_REG_FAN3_TACHO_U 0x14 -#define CPLD_REG_FAN3_TACHO_L 0x15 -#define CPLD_REG_DATE_UU 0x20 -#define CPLD_REG_DATE_UL 0x21 -#define CPLD_REG_DATE_LU 0x22 -#define CPLD_REG_DATE_LL 0x23 -#define CPLD_REG_TIME_UU 0x24 -#define CPLD_REG_TIME_UL 0x25 -#define CPLD_REG_TIME_LU 0x26 -#define CPLD_REG_TIME_LL 0x27 -#define CPLD_REG_SCR1 0x5c -#define CPLD_REG_SCR2 0x6a -#define CPLD_REG_RAM 0x80 - -struct cpld_softc { - device_t sc_dev; - struct resource *sc_mem; - struct cdev *sc_cdev; - struct mtx sc_mutex; - bool sc_isopen; -}; - -static d_open_t cpld_open; -static d_close_t cpld_close; -static d_ioctl_t cpld_ioctl; - -static struct cdevsw cpld_cdevsw = { - .d_version = D_VERSION, - .d_open = cpld_open, - .d_close = cpld_close, - .d_ioctl = cpld_ioctl, - .d_name = "nvram", -}; - -static device_probe_t cpld_probe; -static device_attach_t cpld_attach; -static int cpld_fan_sysctl(SYSCTL_HANDLER_ARGS); - -static device_method_t cpld_methods[] = { - DEVMETHOD(device_probe, cpld_probe), - DEVMETHOD(device_attach, cpld_attach), - - DEVMETHOD_END -}; - -static driver_t cpld_driver = { - "cpld", - cpld_methods, - sizeof(struct cpld_softc) -}; - -static devclass_t cpld_devclass; -DRIVER_MODULE(cpld, lbc, cpld_driver, cpld_devclass, 0, 0); - -static void -cpld_write(struct cpld_softc *sc, int addr, int data) -{ - if (addr >= CPLD_REG_RAM) { - bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr); - bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_L, addr); - } else - bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr); - bus_write_1(sc->sc_mem, CPLD_MEM_DATA, data); -} - -static int -cpld_read(struct cpld_softc *sc, int addr) -{ - if (addr >= CPLD_REG_RAM) { - bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr); - bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_L, addr); - } else - bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr); - - return (bus_read_1(sc->sc_mem, CPLD_MEM_DATA)); -} - -/* - * This is only to read a register that's split into two 8-bit registers. - * Dual-port RAM is not accepted for this purpose. - */ -static int -cpld_read_pair(struct cpld_softc *sc, int addr) -{ - int tmp; - - KASSERT(addr <= 0xff, ("Invalid register-pair base address %x.", addr)); - bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr); - tmp = bus_read_1(sc->sc_mem, CPLD_MEM_DATA) << 8; - - bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr + 1); - tmp |= bus_read_1(sc->sc_mem, CPLD_MEM_DATA); - - return (tmp); -} - -static int -cpld_probe(device_t dev) -{ - if (!ofw_bus_is_compatible(dev, "aeon,tabor-cpld")) - return (ENXIO); - - device_set_desc(dev, "AmigaOne Tabor CPLD"); - - return (BUS_PROBE_GENERIC); -} - -static int -cpld_attach(device_t dev) -{ - struct make_dev_args mda; - struct cpld_softc *sc; - int rid; - int date, time, tmp; - int err; - struct sysctl_ctx_list *ctx; - struct sysctl_oid *tree; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - - rid = 0; - sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE|RF_SHAREABLE); - if (sc->sc_mem == NULL) { - device_printf(dev, "Unable to allocate memory resource.\n"); - return (ENXIO); - } - mtx_init(&sc->sc_mutex, "cpld", NULL, MTX_DEF); - - if (bootverbose) { - date = (cpld_read_pair(sc, CPLD_REG_DATE_UU) << 16) | - cpld_read_pair(sc, CPLD_REG_DATE_LU); - time = (cpld_read_pair(sc, CPLD_REG_TIME_UU) << 16) | - cpld_read_pair(sc, CPLD_REG_TIME_LU); - - device_printf(dev, "Build date: %04x-%02x-%02x\n", - (date >> 16) & 0xffff, (date >> 8) & 0xff, date & 0xff); -#if 0 - /* Build time is nonsense on tested system. */ - device_printf(dev, "Build time: %02x:%02x:%02x\n", - (time >> 16) & 0xff, (time >> 8) & 0xff, time & 0xff); -#endif - } - - tmp = cpld_read(sc, CPLD_REG_HWREV); - device_printf(dev, "Hardware revision: %d\n", tmp); - - ctx = device_get_sysctl_ctx(dev); - tree = device_get_sysctl_tree(dev); - - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "cpu_fan", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, - CPLD_REG_FAN1_TACHO_U, cpld_fan_sysctl, "I", - "CPU Fan speed in RPM"); - - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "case_1_fan", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, - CPLD_REG_FAN2_TACHO_U, cpld_fan_sysctl, "I", - "Case fan 1 speed in RPM"); - - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "case_2_fan", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, - CPLD_REG_FAN3_TACHO_U, cpld_fan_sysctl, "I", - "Case fan 2 speed in RPM"); - - make_dev_args_init(&mda); - mda.mda_flags = MAKEDEV_CHECKNAME; - mda.mda_devsw = &cpld_cdevsw; - mda.mda_uid = UID_ROOT; - mda.mda_gid = GID_WHEEL; - mda.mda_mode = 0660; - err = make_dev_s(&mda, &sc->sc_cdev, "cpld"); - if (err != 0) { - device_printf(dev, "Error creating character device: %d\n", err); - device_printf(dev, "Only sysctl interfaces will be available.\n"); - } - - return (0); -} - -static int -cpld_fan_sysctl(SYSCTL_HANDLER_ARGS) -{ - struct cpld_softc *sc; - int error, old, rpm; - int fan_reg; - - sc = arg1; - fan_reg = arg2; - mtx_lock(&sc->sc_mutex); - /* Read until we get some level of read stability. */ - rpm = cpld_read(sc, fan_reg); - do { - old = rpm; - rpm = cpld_read_pair(sc, fan_reg); - } while (abs(rpm - old) > 10); - mtx_unlock(&sc->sc_mutex); - - /* Convert RPS->RPM. */ - rpm *= 60; - error = sysctl_handle_int(oidp, &rpm, 0, req); - - return (error); -} - -static int -cpld_open(struct cdev *dev, int flags, int fmt, struct thread *td) -{ - struct cpld_softc *sc = dev->si_drv1; - - if (sc->sc_isopen) - return (EBUSY); - sc->sc_isopen = 1; - return (0); -} - -static int -cpld_close(struct cdev *dev, int fflag, int devtype, struct thread *td) -{ - struct cpld_softc *sc = dev->si_drv1; - - sc->sc_isopen = 0; - return (0); -} - -/* - * Send a command over the CPLD to the other side. - * - * This will first copy the data into the dual-port RAM, then signal the other - * side by writing to the mailbox. - */ -static int -cpld_send(device_t dev, struct cpld_cmd_data *d) -{ - struct cpld_softc *sc; - uint16_t *word; - int i; - - if (d->cmd > USHRT_MAX) - return (EINVAL); - - sc = device_get_softc(dev); - - mtx_lock(&sc->sc_mutex); - for (i = 0, word = d->words; i < d->len; i++, word++) { - if (i == 0) - cpld_write(sc, CPLD_REG_RAM + d->offset, *word); - else - bus_write_4(sc->sc_mem, CPLD_MEM_DATA, *word); - } - - cpld_write(sc, CPLD_REG_MBC2X, d->cmd); - mtx_unlock(&sc->sc_mutex); - - return (0); -} - -static int -cpld_recv(device_t dev, struct cpld_cmd_data *d) -{ - struct cpld_softc *sc; - uint16_t *word; - int i; - - sc = device_get_softc(dev); - - mtx_lock(&sc->sc_mutex); - d->cmd = cpld_read(sc, CPLD_REG_MBX2C); - - for (i = 0, word = d->words; i < d->len; i++, word++) { - if (i == 0) - *word = cpld_read(sc, CPLD_REG_RAM + d->offset); - else - *word = bus_read_4(sc->sc_mem, CPLD_MEM_DATA); - } - mtx_unlock(&sc->sc_mutex); - - return (0); -} - -static int -cpld_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, - struct thread *td) -{ - struct cpld_softc *sc; - struct cpld_cmd_data *d; - void *xfer_data, *tmp; - int err; - - sc = dev->si_drv1; - - err = 0; - d = (struct cpld_cmd_data *)data; - if (d->len + d->offset > CPLD_MAX_DRAM_WORDS) { - return (EINVAL); - } - xfer_data = malloc(d->len * sizeof(uint16_t), M_TEMP, M_WAITOK); - - switch (cmd) { - case IOCCPLDSEND: - err = copyin(d->words, xfer_data, d->len * sizeof(uint16_t)); - d->words = xfer_data; - if (err == 0) - err = cpld_send(sc->sc_dev, d); - break; - case IOCCPLDRECV: - tmp = d->words; - d->words = xfer_data; - err = cpld_recv(sc->sc_dev, d); - d->words = tmp; - if (err == 0) - err = copyout(xfer_data, d->words, - d->len * sizeof(uint16_t)); - break; - default: - err = ENOTTY; - break; - } - free(xfer_data, M_TEMP); - - return (err); -} diff --git a/sys/powerpc/amigaone/cpld_x5000.c b/sys/powerpc/amigaone/cpld_x5000.c deleted file mode 100644 index 38d3b719a1f..00000000000 --- a/sys/powerpc/amigaone/cpld_x5000.c +++ /dev/null @@ -1,336 +0,0 @@ -/*- - * Copyright (c) 2020 Justin Hibbits - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include "cpld.h" - -/* - * A driver for the AmigaOne X5000 "Cyrus+" CPLD. - * - * This is the interface between the CPU and the "Xena" (XMOS) chip. Since the - * XMOS is programmable via a SPI-attached flash memory, there's no direct - * driver written for the Xena attachment. Instead, a userspace process would - * communicate with the Xena by issuing ioctl()s to this CPLD. - */ - -/* Resource access addresses. */ -#define CPLD_MEM_ADDR 0x0000 -#define CPLD_MEM_DATA 0x8000 - -#define CPLD_MAX_DRAM_WORDS 0x800 - -/* CPLD Registers. */ -#define CPLD_REG_SIG1 0x00 -#define CPLD_REG_SIG2 0x01 -#define CPLD_REG_HWREV 0x02 -#define CPLD_REG_MBC2X 0x05 -#define CPLD_REG_MBX2C 0x06 -#define CPLD_REG_XDEBUG 0x0c -#define CPLD_REG_XJTAG 0x0d -#define CPLD_REG_FAN_TACHO 0x10 -#define CPLD_REG_DATE_LW 0x21 -#define CPLD_REG_DATE_UW 0x22 -#define CPLD_REG_TIME_LW 0x23 -#define CPLD_REG_TIME_UW 0x24 -#define CPLD_REG_SCR1 0x30 -#define CPLD_REG_SCR2 0x31 -#define CPLD_REG_RAM 0x8000 - -struct cpld_softc { - device_t sc_dev; - struct resource *sc_mem; - struct cdev *sc_cdev; - struct mtx sc_mutex; - bool sc_isopen; -}; - -static d_open_t cpld_open; -static d_close_t cpld_close; -static d_ioctl_t cpld_ioctl; - -static struct cdevsw cpld_cdevsw = { - .d_version = D_VERSION, - .d_open = cpld_open, - .d_close = cpld_close, - .d_ioctl = cpld_ioctl, - .d_name = "nvram", -}; - -static device_probe_t cpld_probe; -static device_attach_t cpld_attach; -static int cpld_fan_sysctl(SYSCTL_HANDLER_ARGS); - -static device_method_t cpld_methods[] = { - DEVMETHOD(device_probe, cpld_probe), - DEVMETHOD(device_attach, cpld_attach), - - DEVMETHOD_END -}; - -static driver_t cpld_driver = { - "cpld", - cpld_methods, - sizeof(struct cpld_softc) -}; - -static devclass_t cpld_devclass; -DRIVER_MODULE(cpld, lbc, cpld_driver, cpld_devclass, 0, 0); - -static void -cpld_write(struct cpld_softc *sc, int addr, int data) -{ - bus_write_2(sc->sc_mem, CPLD_MEM_ADDR, addr); - bus_write_2(sc->sc_mem, CPLD_MEM_DATA, data); -} - -static int -cpld_read(struct cpld_softc *sc, int addr) -{ - bus_write_2(sc->sc_mem, CPLD_MEM_ADDR, addr); - - return (bus_read_2(sc->sc_mem, CPLD_MEM_DATA)); -} - -static int -cpld_probe(device_t dev) -{ - if (!ofw_bus_is_compatible(dev, "aeon,cyrus-cpld")) - return (ENXIO); - - device_set_desc(dev, "AmigaOne Cyrus CPLD"); - - return (BUS_PROBE_GENERIC); -} - -static int -cpld_attach(device_t dev) -{ - struct make_dev_args mda; - struct cpld_softc *sc; - int rid; - int date, time, tmp; - int err; - struct sysctl_ctx_list *ctx; - struct sysctl_oid *tree; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - - rid = 0; - sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE|RF_SHAREABLE); - if (sc->sc_mem == NULL) { - device_printf(dev, "Unable to allocate memory resource.\n"); - return (ENXIO); - } - mtx_init(&sc->sc_mutex, "cpld", NULL, MTX_DEF); - if (bootverbose) { - date = (cpld_read(sc, CPLD_REG_DATE_UW) << 16) | - cpld_read(sc, CPLD_REG_DATE_LW); - time = (cpld_read(sc, CPLD_REG_TIME_UW) << 16) | - cpld_read(sc, CPLD_REG_TIME_LW); - - device_printf(dev, "Build date: %04x-%02x-%02x\n", - (date >> 16) & 0xffff, (date >> 8) & 0xff, date & 0xff); - device_printf(dev, "Build time: %02x:%02x:%02x\n", - (time >> 16) & 0xff, (time >> 8) & 0xff, time & 0xff); - } - - tmp = cpld_read(sc, CPLD_REG_HWREV); - device_printf(dev, "Hardware revision: %d\n", tmp); - - ctx = device_get_sysctl_ctx(dev); - tree = device_get_sysctl_tree(dev); - - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "cpu_fan", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, 0, - cpld_fan_sysctl, "I", "CPU Fan speed in RPM"); - - make_dev_args_init(&mda); - mda.mda_flags = MAKEDEV_CHECKNAME; - mda.mda_devsw = &cpld_cdevsw; - mda.mda_uid = UID_ROOT; - mda.mda_gid = GID_WHEEL; - mda.mda_mode = 0660; - mda.mda_si_drv1 = sc; - err = make_dev_s(&mda, &sc->sc_cdev, "cpld"); - if (err != 0) { - device_printf(dev, "Error creating character device: %d\n", err); - device_printf(dev, "Only sysctl interfaces will be available.\n"); - } - - return (0); -} - -static int -cpld_fan_sysctl(SYSCTL_HANDLER_ARGS) -{ - struct cpld_softc *sc; - int error, old, rpm; - - sc = arg1; - mtx_lock(&sc->sc_mutex); - /* Read until we get some level of read stability. */ - rpm = cpld_read(sc, CPLD_REG_FAN_TACHO); - do { - old = rpm; - rpm = cpld_read(sc, CPLD_REG_FAN_TACHO); - } while (abs(rpm - old) > 10); - mtx_unlock(&sc->sc_mutex); - - /* Convert RPS->RPM. */ - rpm *= 60; - error = sysctl_handle_int(oidp, &rpm, 0, req); - - return (error); -} - -static int -cpld_open(struct cdev *dev, int flags, int fmt, struct thread *td) -{ - struct cpld_softc *sc = dev->si_drv1; - - if (sc->sc_isopen) - return (EBUSY); - sc->sc_isopen = 1; - return (0); -} - -static int -cpld_close(struct cdev *dev, int fflag, int devtype, struct thread *td) -{ - struct cpld_softc *sc = dev->si_drv1; - - sc->sc_isopen = 0; - return (0); -} - -static int -cpld_send(device_t dev, struct cpld_cmd_data *d) -{ - struct cpld_softc *sc; - uint16_t *word; - int i; - - if (d->cmd > USHRT_MAX) - return (EINVAL); - - sc = device_get_softc(dev); - - mtx_lock(&sc->sc_mutex); - for (i = 0, word = d->words; i < d->len; i++, word++) { - if (i == 0) - cpld_write(sc, CPLD_REG_RAM, *word); - else - bus_write_4(sc->sc_mem, CPLD_MEM_DATA, *word); - } - - cpld_write(sc, CPLD_REG_MBC2X, d->cmd); - mtx_unlock(&sc->sc_mutex); - - return (0); -} - -static int -cpld_recv(device_t dev, struct cpld_cmd_data *d) -{ - struct cpld_softc *sc; - uint16_t *word; - int i; - - sc = device_get_softc(dev); - - mtx_lock(&sc->sc_mutex); - d->cmd = cpld_read(sc, CPLD_REG_MBX2C); - - for (i = 0, word = d->words; i < d->len; i++, word++) { - if (i == 0) - *word = cpld_read(sc, CPLD_REG_RAM); - else - *word = bus_read_4(sc->sc_mem, CPLD_MEM_DATA); - } - mtx_unlock(&sc->sc_mutex); - - return (0); -} - -static int -cpld_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, struct thread *td) -{ - struct cpld_softc *sc; - struct cpld_cmd_data *d; - void *xfer_data, *tmp; - int err; - - sc = dev->si_drv1; - - err = 0; - d = (struct cpld_cmd_data *)data; - if (d->len + d->offset > CPLD_MAX_DRAM_WORDS) { - return (EINVAL); - } - xfer_data = malloc(d->len * sizeof(uint16_t), M_TEMP, M_WAITOK); - - switch (cmd) { - case IOCCPLDSEND: - err = copyin(d->words, xfer_data, d->len * sizeof(uint16_t)); - d->words = xfer_data; - if (err == 0) - err = cpld_send(sc->sc_dev, d); - break; - case IOCCPLDRECV: - tmp = d->words; - d->words = xfer_data; - err = cpld_recv(sc->sc_dev, d); - d->words = tmp; - if (err == 0) - err = copyout(xfer_data, d->words, - d->len * sizeof(uint16_t)); - break; - default: - err = ENOTTY; - break; - } - free(xfer_data, M_TEMP); - - return (err); -} diff --git a/sys/powerpc/amigaone/platform_amigaone.c b/sys/powerpc/amigaone/platform_amigaone.c deleted file mode 100644 index 65f69eaab08..00000000000 --- a/sys/powerpc/amigaone/platform_amigaone.c +++ /dev/null @@ -1,121 +0,0 @@ -/*- - * Copyright (c) 2019 Justin Hibbits - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include - -#include "platform_if.h" - -static void aeon_pbutton_intr(void *_unused); -static void aeon_setup_intr(void *unused); - -static int aeon_probe(platform_t); -static int aeon_attach(platform_t); - -static platform_method_t aeon_methods[] = { - PLATFORMMETHOD(platform_probe, aeon_probe), - PLATFORMMETHOD(platform_attach, aeon_attach), - PLATFORMMETHOD_END -}; - -DEFINE_CLASS_1(aeon, aeon_platform, aeon_methods, 0, mpc85xx_platform); - -PLATFORM_DEF(aeon_platform); - -static bool is_aeon; - -static int -aeon_probe(platform_t plat) -{ - phandle_t rootnode; - char model[32]; - - rootnode = OF_finddevice("/"); - - if (OF_getprop(rootnode, "model", model, sizeof(model)) > 0) { - if (strncmp(model, "varisys,", strlen("varisys,")) == 0) - return (BUS_PROBE_SPECIFIC); - } - - return (ENXIO); -} - -static int -aeon_attach(platform_t plat) -{ - int error; - - error = mpc85xx_attach(plat); - if (error) - return (error); - - is_aeon = true; - - return (0); -} - -/* Notify devd(8) that the power button was pressed (IRQ#4 on A-Eon machines). */ -static void -aeon_pbutton_intr(void *_unused) -{ - devctl_notify("AEON", "power", "press", NULL); -} - -/* Manually configure the power button IRQ handler. */ -static void -aeon_setup_intr(void *unused) -{ - int irq; - - if (!is_aeon) - return; - - if (bootverbose) - printf("Configuring AmigaOne power button.\n"); - - irq = 4; /* From TRM, IRQ4 is raised when power button is pressed. */ - - /* Get us the root PIC. */ - irq = MAP_IRQ(0, irq); - powerpc_config_intr(irq, INTR_TRIGGER_EDGE, INTR_POLARITY_LOW); - powerpc_setup_intr("power_button", irq, NULL, aeon_pbutton_intr, NULL, - INTR_TYPE_MISC, NULL, 0); -} - -SYSINIT(aeon_setup_intr, SI_SUB_CONFIGURE, SI_ORDER_ANY, aeon_setup_intr, NULL); diff --git a/sys/powerpc/booke/booke_machdep.c b/sys/powerpc/booke/booke_machdep.c deleted file mode 100644 index 23561884f22..00000000000 --- a/sys/powerpc/booke/booke_machdep.c +++ /dev/null @@ -1,470 +0,0 @@ -/*- - * Copyright (C) 2006-2012 Semihalf - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*- - * Copyright (C) 2001 Benno Rice - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $ - */ -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include "opt_ddb.h" -#include "opt_hwpmc_hooks.h" -#include "opt_kstack_pages.h" -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#ifdef DDB -#include -#endif - -#ifdef DEBUG -#define debugf(fmt, args...) printf(fmt, ##args) -#else -#define debugf(fmt, args...) -#endif - -extern unsigned char _etext[]; -extern unsigned char _edata[]; -extern unsigned char __bss_start[]; -extern unsigned char __sbss_start[]; -extern unsigned char __sbss_end[]; -extern unsigned char _end[]; -extern vm_offset_t __endkernel; -extern vm_paddr_t kernload; - -/* - * Bootinfo is passed to us by legacy loaders. Save the address of the - * structure to handle backward compatibility. - */ -uint32_t *bootinfo; - -void print_kernel_section_addr(void); -void print_kenv(void); -uintptr_t booke_init(u_long, u_long); -void ivor_setup(void); - -extern void *interrupt_vector_base; -extern void *int_critical_input; -extern void *int_machine_check; -extern void *int_data_storage; -extern void *int_instr_storage; -extern void *int_external_input; -extern void *int_alignment; -extern void *int_fpu; -extern void *int_program; -extern void *int_syscall; -extern void *int_decrementer; -extern void *int_fixed_interval_timer; -extern void *int_watchdog; -extern void *int_data_tlb_error; -extern void *int_inst_tlb_error; -extern void *int_debug; -extern void *int_debug_ed; -extern void *int_vec; -extern void *int_vecast; -#ifdef __SPE__ -extern void *int_spe_fpdata; -extern void *int_spe_fpround; -#endif -#ifdef HWPMC_HOOKS -extern void *int_performance_counter; -#endif - -#define SET_TRAP(ivor, handler) \ - KASSERT(((uintptr_t)(&handler) & ~0xffffUL) == \ - ((uintptr_t)(&interrupt_vector_base) & ~0xffffUL), \ - ("Handler " #handler " too far from interrupt vector base")); \ - mtspr(ivor, (uintptr_t)(&handler) & 0xffffUL); - -uintptr_t powerpc_init(vm_offset_t fdt, vm_offset_t, vm_offset_t, void *mdp, - uint32_t mdp_cookie); -void booke_cpu_init(void); - -void -booke_cpu_init(void) -{ - - cpu_features |= PPC_FEATURE_BOOKE; - - psl_kernset = PSL_CE | PSL_ME | PSL_EE; -#ifdef __powerpc64__ - psl_kernset |= PSL_CM; -#endif - psl_userset = psl_kernset | PSL_PR; -#ifdef __powerpc64__ - psl_userset32 = psl_userset & ~PSL_CM; -#endif - /* - * Zeroed bits in this variable signify that the value of the bit - * in its position is allowed to vary between userspace contexts. - * - * All other bits are required to be identical for every userspace - * context. The actual *value* of the bit is determined by - * psl_userset and/or psl_userset32, and is not allowed to change. - * - * Remember to update this set when implementing support for - * *conditionally* enabling a processor facility. Failing to do - * this will cause swapcontext() in userspace to break when a - * process uses a conditionally-enabled facility. - * - * When *unconditionally* implementing support for a processor - * facility, update psl_userset / psl_userset32 instead. - * - * See the access control check in set_mcontext(). - */ - psl_userstatic = ~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1); - - pmap_mmu_install(MMU_TYPE_BOOKE, BUS_PROBE_GENERIC); -} - -void -ivor_setup(void) -{ - - mtspr(SPR_IVPR, ((uintptr_t)&interrupt_vector_base) & ~0xffffUL); - - SET_TRAP(SPR_IVOR0, int_critical_input); - SET_TRAP(SPR_IVOR1, int_machine_check); - SET_TRAP(SPR_IVOR2, int_data_storage); - SET_TRAP(SPR_IVOR3, int_instr_storage); - SET_TRAP(SPR_IVOR4, int_external_input); - SET_TRAP(SPR_IVOR5, int_alignment); - SET_TRAP(SPR_IVOR6, int_program); - SET_TRAP(SPR_IVOR8, int_syscall); - SET_TRAP(SPR_IVOR10, int_decrementer); - SET_TRAP(SPR_IVOR11, int_fixed_interval_timer); - SET_TRAP(SPR_IVOR12, int_watchdog); - SET_TRAP(SPR_IVOR13, int_data_tlb_error); - SET_TRAP(SPR_IVOR14, int_inst_tlb_error); - SET_TRAP(SPR_IVOR15, int_debug); -#ifdef HWPMC_HOOKS - SET_TRAP(SPR_IVOR35, int_performance_counter); -#endif - switch ((mfpvr() >> 16) & 0xffff) { - case FSL_E6500: - SET_TRAP(SPR_IVOR32, int_vec); - SET_TRAP(SPR_IVOR33, int_vecast); - /* FALLTHROUGH */ - case FSL_E500mc: - case FSL_E5500: - SET_TRAP(SPR_IVOR7, int_fpu); - SET_TRAP(SPR_IVOR15, int_debug_ed); - break; - case FSL_E500v1: - case FSL_E500v2: - SET_TRAP(SPR_IVOR32, int_vec); -#ifdef __SPE__ - SET_TRAP(SPR_IVOR33, int_spe_fpdata); - SET_TRAP(SPR_IVOR34, int_spe_fpround); -#endif - break; - } - -#ifdef __powerpc64__ - /* Set 64-bit interrupt mode. */ - mtspr(SPR_EPCR, mfspr(SPR_EPCR) | EPCR_ICM); -#endif -} - -static int -booke_check_for_fdt(uint32_t arg1, vm_offset_t *dtbp) -{ - void *ptr; - int fdt_size; - - if (arg1 % 8 != 0) - return (-1); - - ptr = (void *)pmap_early_io_map(arg1, PAGE_SIZE); - if (fdt_check_header(ptr) != 0) - return (-1); - - /* - * Read FDT total size from the header of FDT. - * This for sure hits within first page which is - * already mapped. - */ - fdt_size = fdt_totalsize((void *)ptr); - - /* - * Ok, arg1 points to FDT, so we need to map it in. - * First, unmap this page and then map FDT again with full size - */ - pmap_early_io_unmap((vm_offset_t)ptr, PAGE_SIZE); - ptr = (void *)pmap_early_io_map(arg1, fdt_size); - *dtbp = (vm_offset_t)ptr; - - return (0); -} - -uintptr_t -booke_init(u_long arg1, u_long arg2) -{ - uintptr_t ret; - void *mdp; - vm_offset_t dtbp, end; - - end = (uintptr_t)_end; - dtbp = (vm_offset_t)NULL; - - /* Set up TLB initially */ - bootinfo = NULL; - bzero(__sbss_start, __sbss_end - __sbss_start); - bzero(__bss_start, _end - __bss_start); - tlb1_init(); - - /* - * Handle the various ways we can get loaded and started: - * - FreeBSD's loader passes the pointer to the metadata - * in arg1, with arg2 undefined. arg1 has a value that's - * relative to the kernel's link address (i.e. larger - * than 0xc0000000). - * - Juniper's loader passes the metadata pointer in arg2 - * and sets arg1 to zero. This is to signal that the - * loader maps the kernel and starts it at its link - * address (unlike the FreeBSD loader). - * - U-Boot passes the standard argc and argv parameters - * in arg1 and arg2 (resp). arg1 is between 1 and some - * relatively small number, such as 64K. arg2 is the - * physical address of the argv vector. - * - ePAPR loaders pass an FDT blob in r3 (arg1) and the magic hex - * string 0x45504150 ('EPAP') in r6 (which has been lost by now). - * r4 (arg2) is supposed to be set to zero, but is not always. - */ - - if (arg1 == 0) /* Juniper loader */ - mdp = (void *)arg2; - else if (booke_check_for_fdt(arg1, &dtbp) == 0) { /* ePAPR */ - end = roundup(end, 8); - memmove((void *)end, (void *)dtbp, fdt_totalsize((void *)dtbp)); - dtbp = end; - end += fdt_totalsize((void *)dtbp); - __endkernel = end; - mdp = NULL; - } else if (arg1 > (uintptr_t)kernload) /* FreeBSD loader */ - mdp = (void *)arg1; - else /* U-Boot */ - mdp = NULL; - - /* Default to 32 byte cache line size. */ - switch ((mfpvr()) >> 16) { - case FSL_E500mc: - case FSL_E5500: - case FSL_E6500: - cacheline_size = 64; - break; - } - - /* - * Last element is a magic cookie that indicates that the metadata - * pointer is meaningful. - */ - ret = powerpc_init(dtbp, 0, 0, mdp, (mdp == NULL) ? 0 : 0xfb5d104d); - - /* Enable caches */ - booke_enable_l1_cache(); - booke_enable_l2_cache(); - - booke_enable_bpred(); - - return (ret); -} - -#define RES_GRANULE cacheline_size -extern uintptr_t tlb0_miss_locks[]; - -/* Initialise a struct pcpu. */ -void -cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t sz) -{ - - pcpu->pc_booke.tid_next = TID_MIN; - -#ifdef SMP - uintptr_t *ptr; - int words_per_gran = RES_GRANULE / sizeof(uintptr_t); - - ptr = &tlb0_miss_locks[cpuid * words_per_gran]; - pcpu->pc_booke.tlb_lock = ptr; - *ptr = TLB_UNLOCKED; - *(ptr + 1) = 0; /* recurse counter */ -#endif -} - -/* Shutdown the CPU as much as possible. */ -void -cpu_halt(void) -{ - - mtmsr(mfmsr() & ~(PSL_CE | PSL_EE | PSL_ME | PSL_DE)); - while (1) - ; -} - -int -ptrace_single_step(struct thread *td) -{ - struct trapframe *tf; - - tf = td->td_frame; - tf->srr1 |= PSL_DE; - tf->cpu.booke.dbcr0 |= (DBCR0_IDM | DBCR0_IC); - return (0); -} - -int -ptrace_clear_single_step(struct thread *td) -{ - struct trapframe *tf; - - tf = td->td_frame; - tf->srr1 &= ~PSL_DE; - tf->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC); - return (0); -} - -void -kdb_cpu_clear_singlestep(void) -{ - register_t r; - - r = mfspr(SPR_DBCR0); - mtspr(SPR_DBCR0, r & ~DBCR0_IC); - kdb_frame->srr1 &= ~PSL_DE; -} - -void -kdb_cpu_set_singlestep(void) -{ - register_t r; - - r = mfspr(SPR_DBCR0); - mtspr(SPR_DBCR0, r | DBCR0_IC | DBCR0_IDM); - kdb_frame->srr1 |= PSL_DE; -} diff --git a/sys/powerpc/booke/locore.S b/sys/powerpc/booke/locore.S deleted file mode 100644 index a86dd2a575f..00000000000 --- a/sys/powerpc/booke/locore.S +++ /dev/null @@ -1,977 +0,0 @@ -/*- - * Copyright (C) 2007-2009 Semihalf, Rafal Jaworowski - * Copyright (C) 2006 Semihalf, Marian Balakowicz - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include "assym.inc" - -#include "opt_hwpmc_hooks.h" - -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef _CALL_ELF -.abiversion _CALL_ELF -#endif - -#define TMPSTACKSZ 16384 - -#ifdef __powerpc64__ -#define GET_TOCBASE(r) \ - mfspr r, SPR_SPRG8 -#define TOC_RESTORE nop -#define CMPI cmpdi -#define CMPL cmpld -#define LOAD ld -#define LOADX ldarx -#define STORE std -#define STOREX stdcx. -#define STU stdu -#define CALLSIZE 48 -#define REDZONE 288 -#define THREAD_REG %r13 -#define ADDR(x) \ - .llong x -#define WORD_SIZE 8 -#else -#define GET_TOCBASE(r) -#define TOC_RESTORE -#define CMPI cmpwi -#define CMPL cmplw -#define LOAD lwz -#define LOADX lwarx -#define STOREX stwcx. -#define STORE stw -#define STU stwu -#define CALLSIZE 8 -#define REDZONE 0 -#define THREAD_REG %r2 -#define ADDR(x) \ - .long x -#define WORD_SIZE 4 -#endif - -#ifdef __powerpc64__ - /* Placate lld by creating a kboot stub. */ - .section ".text.kboot", "x", @progbits - b __start -#endif - - .text - .globl btext -btext: - -/* - * This symbol is here for the benefit of kvm_mkdb, and is supposed to - * mark the start of kernel text. - */ - .globl kernel_text -kernel_text: - -/* - * Startup entry. Note, this must be the first thing in the text segment! - */ - .text - .globl __start -__start: - -/* - * Assumptions on the boot loader: - * - System memory starts from physical address 0 - * - It's mapped by a single TLB1 entry - * - TLB1 mapping is 1:1 pa to va - * - Kernel is loaded at 64MB boundary - * - All PID registers are set to the same value - * - CPU is running in AS=0 - * - * Registers contents provided by the loader(8): - * r1 : stack pointer - * r3 : metadata pointer - * - * We rearrange the TLB1 layout as follows: - * - Find TLB1 entry we started in - * - Make sure it's protected, invalidate other entries - * - Create temp entry in the second AS (make sure it's not TLB[1]) - * - Switch to temp mapping - * - Map 64MB of RAM in TLB1[1] - * - Use AS=0, set EPN to VM_MIN_KERNEL_ADDRESS and RPN to kernel load address - * - Switch to TLB1[1] mapping - * - Invalidate temp mapping - * - * locore registers use: - * r1 : stack pointer - * r2 : trace pointer (AP only, for early diagnostics) - * r3-r27 : scratch registers - * r28 : temp TLB1 entry - * r29 : initial TLB1 entry we started in - * r30-r31 : arguments (metadata pointer) - */ - -/* - * Keep arguments in r30 & r31 for later use. - */ - mr %r30, %r3 - mr %r31, %r4 - -/* - * Initial cleanup - */ - li %r3, PSL_DE /* Keep debug exceptions for CodeWarrior. */ -#ifdef __powerpc64__ - oris %r3, %r3, PSL_CM@h -#endif - mtmsr %r3 - isync - -/* - * Initial HIDs configuration - */ -1: - mfpvr %r3 - rlwinm %r3, %r3, 16, 16, 31 - - lis %r4, HID0_E500_DEFAULT_SET@h - ori %r4, %r4, HID0_E500_DEFAULT_SET@l - - /* Check for e500mc and e5500 */ - cmpli 0, 0, %r3, FSL_E500mc - bne 2f - - lis %r4, HID0_E500MC_DEFAULT_SET@h - ori %r4, %r4, HID0_E500MC_DEFAULT_SET@l - b 3f -2: - cmpli 0, 0, %r3, FSL_E5500 - bne 3f - - lis %r4, HID0_E5500_DEFAULT_SET@h - ori %r4, %r4, HID0_E5500_DEFAULT_SET@l - -3: - mtspr SPR_HID0, %r4 - isync - -/* - * E500mc and E5500 do not have HID1 register, so skip HID1 setup on - * this core. - */ - cmpli 0, 0, %r3, FSL_E500mc - beq 1f - cmpli 0, 0, %r3, FSL_E5500 - beq 1f - cmpli 0, 0, %r3, FSL_E6500 - beq 1f - - lis %r3, HID1_E500_DEFAULT_SET@h - ori %r3, %r3, HID1_E500_DEFAULT_SET@l - mtspr SPR_HID1, %r3 - isync -1: - /* Invalidate all entries in TLB0 */ - li %r3, 0 - bl tlb_inval_all - - cmpwi %r30, 0 - beq done_mapping - -/* - * Locate the TLB1 entry that maps this code - */ - bl 1f -1: mflr %r3 - bl tlb1_find_current /* the entry found is returned in r29 */ - - bl tlb1_inval_all_but_current - -/* - * Create temporary mapping in AS=1 and switch to it - */ - bl tlb1_temp_mapping_as1 - - mfmsr %r3 - ori %r3, %r3, (PSL_IS | PSL_DS) - bl 2f -2: mflr %r4 - addi %r4, %r4, (3f - 2b) - mtspr SPR_SRR0, %r4 - mtspr SPR_SRR1, %r3 - rfi /* Switch context */ - -/* - * Invalidate initial entry - */ -3: - mr %r3, %r29 - bl tlb1_inval_entry - -/* - * Setup final mapping in TLB1[1] and switch to it - */ - /* Final kernel mapping, map in 64 MB of RAM */ - lis %r3, MAS0_TLBSEL1@h /* Select TLB1 */ - li %r4, 0 /* Entry 0 */ - rlwimi %r3, %r4, 16, 10, 15 - mtspr SPR_MAS0, %r3 - isync - - li %r3, (TLB_SIZE_64M << MAS1_TSIZE_SHIFT)@l - oris %r3, %r3, (MAS1_VALID | MAS1_IPROT)@h - mtspr SPR_MAS1, %r3 /* note TS was not filled, so it's TS=0 */ - isync - - LOAD_ADDR(%r3, VM_MIN_KERNEL_ADDRESS) - ori %r3, %r3, (_TLB_ENTRY_SHARED | MAS2_M)@l /* WIMGE = 0b00100 */ - mtspr SPR_MAS2, %r3 - isync - - /* Discover phys load address */ - bl 3f -3: mflr %r4 /* Use current address */ - rlwinm %r4, %r4, 0, 0, 5 /* 64MB alignment mask */ - ori %r4, %r4, (MAS3_SX | MAS3_SW | MAS3_SR)@l - mtspr SPR_MAS3, %r4 /* Set RPN and protection */ - isync - li %r4, 0 - mtspr SPR_MAS7, %r4 - isync - tlbwe - isync - msync - - /* Switch to the above TLB1[1] mapping */ - bl 4f -4: mflr %r4 -#ifdef __powerpc64__ - clrldi %r4, %r4, 38 - clrrdi %r3, %r3, 12 -#else - rlwinm %r4, %r4, 0, 6, 31 /* Current offset from kernel load address */ - rlwinm %r3, %r3, 0, 0, 19 -#endif - add %r4, %r4, %r3 /* Convert to kernel virtual address */ - addi %r4, %r4, (5f - 4b) - li %r3, PSL_DE /* Note AS=0 */ -#ifdef __powerpc64__ - oris %r3, %r3, PSL_CM@h -#endif - mtspr SPR_SRR0, %r4 - mtspr SPR_SRR1, %r3 - rfi - -/* - * Invalidate temp mapping - */ -5: - mr %r3, %r28 - bl tlb1_inval_entry - -done_mapping: - -#ifdef __powerpc64__ - /* Set up the TOC pointer */ - b 0f - .align 3 -0: nop - bl 1f - .llong __tocbase + 0x8000 - . -1: mflr %r2 - ld %r1,0(%r2) - add %r2,%r1,%r2 - mtspr SPR_SPRG8, %r2 - nop - - /* Get load offset */ - ld %r31,-0x8000(%r2) /* First TOC entry is TOC base */ - subf %r31,%r31,%r2 /* Subtract from real TOC base to get base */ - - /* Set up the stack pointer */ - bl 1f - .llong tmpstack + TMPSTACKSZ - 96 - . -1: mflr %r3 - ld %r1,0(%r3) - add %r1,%r1,%r3 -/* - * Relocate kernel - */ - bl 1f - .llong _DYNAMIC-. -1: mflr %r3 - ld %r4,0(%r3) - add %r3,%r4,%r3 - mr %r4,%r31 -#else -/* - * Setup a temporary stack - */ - bl 1f - .long tmpstack-. -1: mflr %r1 - lwz %r2,0(%r1) - add %r1,%r1,%r2 - addi %r1, %r1, (TMPSTACKSZ - 16) - -/* - * Relocate kernel - */ - bl 1f - .long _DYNAMIC-. - .long _GLOBAL_OFFSET_TABLE_-. -1: mflr %r5 - lwz %r3,0(%r5) /* _DYNAMIC in %r3 */ - add %r3,%r3,%r5 - lwz %r4,4(%r5) /* GOT pointer */ - add %r4,%r4,%r5 - lwz %r4,4(%r4) /* got[0] is _DYNAMIC link addr */ - subf %r4,%r4,%r3 /* subtract to calculate relocbase */ -#endif - bl CNAME(elf_reloc_self) - TOC_RESTORE - -/* - * Initialise exception vector offsets - */ - bl CNAME(ivor_setup) - TOC_RESTORE - -/* - * Set up arguments and jump to system initialization code - */ - mr %r3, %r30 - mr %r4, %r31 - - /* Prepare core */ - bl CNAME(booke_init) - TOC_RESTORE - - /* Switch to thread0.td_kstack now */ - mr %r1, %r3 - li %r3, 0 - STORE %r3, 0(%r1) - - /* Machine independet part, does not return */ - bl CNAME(mi_startup) - TOC_RESTORE - /* NOT REACHED */ -5: b 5b - - -#ifdef SMP -/************************************************************************/ -/* AP Boot page */ -/************************************************************************/ - .text - .globl __boot_page - .align 12 -__boot_page: - /* - * The boot page is a special page of memory used during AP bringup. - * Before the AP comes out of reset, the physical 4K page holding this - * code is arranged to be mapped at 0xfffff000 by use of - * platform-dependent registers. - * - * Alternatively, this page may be executed using an ePAPR-standardized - * method -- writing to the address specified in "cpu-release-addr". - * - * In either case, execution begins at the last instruction of the - * page, which is a branch back to the start of the page. - * - * The code in the page must do initial MMU setup and normalize the - * TLBs for regular operation in the correct address space before - * reading outside the page. - * - * This implementation accomplishes this by: - * 1) Wiping TLB0 and all TLB1 entries but the one currently in use. - * 2) Establishing a temporary 4K TLB1 mapping in AS=1, and switching - * to it with rfi. This entry must NOT be in TLB1 slot 0. - * (This is needed to give the code freedom to clean up AS=0.) - * 3) Removing the initial TLB1 entry, leaving us with a single valid - * TLB1 entry, NOT in slot 0. - * 4) Installing an AS0 entry in TLB1 slot 0 mapping the 64MB kernel - * segment at its final virtual address. A second rfi is done to - * switch to the final address space. At this point we can finally - * access the rest of the kernel segment safely. - * 5) The temporary TLB1 AS=1 entry is removed, finally leaving us in - * a consistent (but minimal) state. - * 6) Set up TOC, stack, and pcpu registers. - * 7) Now that we can finally call C code, call pmap_boostrap_ap(), - * which finishes copying in the shared TLB1 entries. - * - * At this point, the MMU is fully set up, and we can proceed with - * running the actual AP bootstrap code. - * - * Pieces of this code are also used for UP kernel, but in this case - * the sections specific to boot page functionality are dropped by - * the preprocessor. - */ -#ifdef __powerpc64__ - nop /* PPC64 alignment word. 64-bit target. */ -#endif - bl 1f /* 32-bit target. */ - - .globl bp_trace -bp_trace: - ADDR(0) /* Trace pointer (%r31). */ - - .globl bp_kernload -bp_kernload: - .llong 0 /* Kern phys. load address. */ - - .globl bp_virtaddr -bp_virtaddr: - ADDR(0) /* Virt. address of __boot_page. */ - -/* - * Initial configuration - */ -1: - mflr %r31 /* r31 hold the address of bp_trace */ - - /* Set HIDs */ - mfpvr %r3 - rlwinm %r3, %r3, 16, 16, 31 - - /* HID0 for E500 is default */ - lis %r4, HID0_E500_DEFAULT_SET@h - ori %r4, %r4, HID0_E500_DEFAULT_SET@l - - cmpli 0, 0, %r3, FSL_E500mc - bne 2f - lis %r4, HID0_E500MC_DEFAULT_SET@h - ori %r4, %r4, HID0_E500MC_DEFAULT_SET@l - b 3f -2: - cmpli 0, 0, %r3, FSL_E5500 - bne 3f - lis %r4, HID0_E5500_DEFAULT_SET@h - ori %r4, %r4, HID0_E5500_DEFAULT_SET@l -3: - mtspr SPR_HID0, %r4 - isync - - /* Enable branch prediction */ - li %r3, BUCSR_BPEN - mtspr SPR_BUCSR, %r3 - isync - - /* Invalidate all entries in TLB0 */ - li %r3, 0 - bl tlb_inval_all - -/* - * Find TLB1 entry which is translating us now - */ - bl 2f -2: mflr %r3 - bl tlb1_find_current /* the entry number found is in r29 */ - - bl tlb1_inval_all_but_current - -/* - * Create temporary translation in AS=1 and switch to it - */ - - bl tlb1_temp_mapping_as1 - - mfmsr %r3 - ori %r3, %r3, (PSL_IS | PSL_DS) -#ifdef __powerpc64__ - oris %r3, %r3, PSL_CM@h /* Ensure we're in 64-bit after RFI */ -#endif - bl 3f -3: mflr %r4 - addi %r4, %r4, (4f - 3b) - mtspr SPR_SRR0, %r4 - mtspr SPR_SRR1, %r3 - rfi /* Switch context */ - -/* - * Invalidate initial entry - */ -4: - mr %r3, %r29 - bl tlb1_inval_entry - -/* - * Setup final mapping in TLB1[0] and switch to it - */ - /* Final kernel mapping, map in 64 MB of RAM */ - lis %r3, MAS0_TLBSEL1@h /* Select TLB1 */ - li %r4, 0 /* Entry 0 */ - rlwimi %r3, %r4, 16, 4, 15 - mtspr SPR_MAS0, %r3 - isync - - li %r3, (TLB_SIZE_64M << MAS1_TSIZE_SHIFT)@l - oris %r3, %r3, (MAS1_VALID | MAS1_IPROT)@h - mtspr SPR_MAS1, %r3 /* note TS was not filled, so it's TS=0 */ - isync - - LOAD_ADDR(%r3, VM_MIN_KERNEL_ADDRESS) - ori %r3, %r3, (_TLB_ENTRY_SHARED | MAS2_M)@l /* WIMGE = 0b00100 */ - mtspr SPR_MAS2, %r3 - isync - - /* Retrieve kernel load [physical] address from bp_kernload */ -5: - mflr %r3 -#ifdef __powerpc64__ - clrrdi %r3, %r3, PAGE_SHIFT /* trunc_page(%r3) */ -#else - clrrwi %r3, %r3, PAGE_SHIFT /* trunc_page(%r3) */ -#endif - /* Load lower half of the kernel loadaddr. */ - lwz %r4, (bp_kernload - __boot_page + 4)(%r3) - LOAD %r5, (bp_virtaddr - __boot_page)(%r3) - - /* Set RPN and protection */ - ori %r4, %r4, (MAS3_SX | MAS3_SW | MAS3_SR)@l - mtspr SPR_MAS3, %r4 - isync - lwz %r4, (bp_kernload - __boot_page)(%r3) - mtspr SPR_MAS7, %r4 - isync - tlbwe - isync - msync - - /* Switch to the final mapping */ - bl 6f -6: mflr %r3 - rlwinm %r3, %r3, 0, 0xfff /* Offset from boot page start */ - add %r3, %r3, %r5 /* Make this a virtual address */ - addi %r3, %r3, (7f - 6b) /* And figure out return address. */ -#ifdef __powerpc64__ - lis %r4, PSL_CM@h /* Note AS=0 */ -#else - li %r4, 0 /* Note AS=0 */ -#endif - mtspr SPR_SRR0, %r3 - mtspr SPR_SRR1, %r4 - rfi -7: - -/* - * At this point we're running at virtual addresses VM_MIN_KERNEL_ADDRESS and - * beyond so it's allowed to directly access all locations the kernel was linked - * against. - */ - -/* - * Invalidate temp mapping - */ - mr %r3, %r28 - bl tlb1_inval_entry - -#ifdef __powerpc64__ - /* Set up the TOC pointer */ - b 0f - .align 3 -0: nop - bl 1f - .llong __tocbase + 0x8000 - . -1: mflr %r2 - ld %r1,0(%r2) - add %r2,%r1,%r2 - mtspr SPR_SPRG8, %r2 - - /* Set up the stack pointer */ - addis %r1,%r2,TOC_REF(tmpstack)@ha - ld %r1,TOC_REF(tmpstack)@l(%r1) - addi %r1,%r1,TMPSTACKSZ-96 -#else -/* - * Setup a temporary stack - */ - bl 1f - .long tmpstack-. -1: mflr %r1 - lwz %r2,0(%r1) - add %r1,%r1,%r2 - stw %r1, 0(%r1) - addi %r1, %r1, (TMPSTACKSZ - 16) -#endif - -/* - * Initialise exception vector offsets - */ - bl CNAME(ivor_setup) - TOC_RESTORE - - /* - * Assign our pcpu instance - */ - bl 1f - .long ap_pcpu-. -1: mflr %r4 - lwz %r3, 0(%r4) - add %r3, %r3, %r4 - LOAD %r3, 0(%r3) - mtsprg0 %r3 - - bl CNAME(pmap_bootstrap_ap) - TOC_RESTORE - - bl CNAME(cpudep_ap_bootstrap) - TOC_RESTORE - /* Switch to the idle thread's kstack */ - mr %r1, %r3 - - bl CNAME(machdep_ap_bootstrap) - TOC_RESTORE - - /* NOT REACHED */ -6: b 6b -#endif /* SMP */ - -#if defined (BOOKE_E500) -/* - * Invalidate all entries in the given TLB. - * - * r3 TLBSEL - */ -tlb_inval_all: - rlwinm %r3, %r3, 3, (1 << 3) /* TLBSEL */ - ori %r3, %r3, (1 << 2) /* INVALL */ - tlbivax 0, %r3 - isync - msync - - tlbsync - msync - blr - -/* - * expects address to look up in r3, returns entry number in r29 - * - * FIXME: the hidden assumption is we are now running in AS=0, but we should - * retrieve actual AS from MSR[IS|DS] and put it in MAS6[SAS] - */ -tlb1_find_current: - mfspr %r17, SPR_PID0 - slwi %r17, %r17, MAS6_SPID0_SHIFT - mtspr SPR_MAS6, %r17 - isync - tlbsx 0, %r3 - mfspr %r17, SPR_MAS0 - rlwinm %r29, %r17, 16, 26, 31 /* MAS0[ESEL] -> r29 */ - - /* Make sure we have IPROT set on the entry */ - mfspr %r17, SPR_MAS1 - oris %r17, %r17, MAS1_IPROT@h - mtspr SPR_MAS1, %r17 - isync - tlbwe - isync - msync - blr - -/* - * Invalidates a single entry in TLB1. - * - * r3 ESEL - * r4-r5 scratched - */ -tlb1_inval_entry: - lis %r4, MAS0_TLBSEL1@h /* Select TLB1 */ - rlwimi %r4, %r3, 16, 10, 15 /* Select our entry */ - mtspr SPR_MAS0, %r4 - isync - tlbre - li %r5, 0 /* MAS1[V] = 0 */ - mtspr SPR_MAS1, %r5 - isync - tlbwe - isync - msync - blr - -/* - * r29 current entry number - * r28 returned temp entry - * r3-r5 scratched - */ -tlb1_temp_mapping_as1: - /* Read our current translation */ - lis %r3, MAS0_TLBSEL1@h /* Select TLB1 */ - rlwimi %r3, %r29, 16, 10, 15 /* Select our current entry */ - mtspr SPR_MAS0, %r3 - isync - tlbre - - /* - * Prepare and write temp entry - * - * FIXME this is not robust against overflow i.e. when the current - * entry is the last in TLB1 - */ - lis %r3, MAS0_TLBSEL1@h /* Select TLB1 */ - addi %r28, %r29, 1 /* Use next entry. */ - rlwimi %r3, %r28, 16, 10, 15 /* Select temp entry */ - mtspr SPR_MAS0, %r3 - isync - mfspr %r5, SPR_MAS1 - li %r4, 1 /* AS=1 */ - rlwimi %r5, %r4, 12, 19, 19 - li %r4, 0 /* Global mapping, TID=0 */ - rlwimi %r5, %r4, 16, 8, 15 - oris %r5, %r5, (MAS1_VALID | MAS1_IPROT)@h - mtspr SPR_MAS1, %r5 - isync - mflr %r3 - li %r4, 0 - mtspr SPR_MAS7, %r4 - mtlr %r3 - isync - tlbwe - isync - msync - blr - -/* - * Loops over TLB1, invalidates all entries skipping the one which currently - * maps this code. - * - * r29 current entry - * r3-r5 scratched - */ -tlb1_inval_all_but_current: - mfspr %r3, SPR_TLB1CFG /* Get number of entries */ - andi. %r3, %r3, TLBCFG_NENTRY_MASK@l - li %r4, 0 /* Start from Entry 0 */ -1: lis %r5, MAS0_TLBSEL1@h - rlwimi %r5, %r4, 16, 10, 15 - mtspr SPR_MAS0, %r5 - isync - tlbre - mfspr %r5, SPR_MAS1 - cmpw %r4, %r29 /* our current entry? */ - beq 2f - rlwinm %r5, %r5, 0, 2, 31 /* clear VALID and IPROT bits */ - mtspr SPR_MAS1, %r5 - isync - tlbwe - isync - msync -2: addi %r4, %r4, 1 - cmpw %r4, %r3 /* Check if this is the last entry */ - bne 1b - blr -#endif - -#ifdef SMP -.globl __boot_tlb1 - /* - * The __boot_tlb1 table is used to hold BSP TLB1 entries - * marked with _TLB_ENTRY_SHARED flag during AP bootstrap. - * The BSP fills in the table in tlb_ap_prep() function. Next, - * AP loads its contents to TLB1 hardware in pmap_bootstrap_ap(). - */ -__boot_tlb1: - .space TLB1_MAX_ENTRIES * TLB_ENTRY_SIZE - -__boot_page_padding: - /* - * Boot page needs to be exactly 4K, with the last word of this page - * acting as the reset vector, so we need to stuff the remainder. - * Upon release from holdoff CPU fetches the last word of the boot - * page. - */ - .space 4092 - (__boot_page_padding - __boot_page) - b __boot_page - /* - * This is the end of the boot page. - * During AP startup, the previous instruction is at 0xfffffffc - * virtual (i.e. the reset vector.) - */ -#endif /* SMP */ - -/************************************************************************/ -/* locore subroutines */ -/************************************************************************/ - -/* - * Cache disable/enable/inval sequences according - * to section 2.16 of E500CORE RM. - */ -ENTRY(dcache_inval) - /* Invalidate d-cache */ - mfspr %r3, SPR_L1CSR0 - ori %r3, %r3, (L1CSR0_DCFI | L1CSR0_DCLFR)@l - msync - isync - mtspr SPR_L1CSR0, %r3 - isync -1: mfspr %r3, SPR_L1CSR0 - andi. %r3, %r3, L1CSR0_DCFI - bne 1b - blr -END(dcache_inval) - -ENTRY(dcache_disable) - /* Disable d-cache */ - mfspr %r3, SPR_L1CSR0 - li %r4, L1CSR0_DCE@l - not %r4, %r4 - and %r3, %r3, %r4 - msync - isync - mtspr SPR_L1CSR0, %r3 - isync - blr -END(dcache_disable) - -ENTRY(dcache_enable) - /* Enable d-cache */ - mfspr %r3, SPR_L1CSR0 - oris %r3, %r3, (L1CSR0_DCPE | L1CSR0_DCE)@h - ori %r3, %r3, (L1CSR0_DCPE | L1CSR0_DCE)@l - msync - isync - mtspr SPR_L1CSR0, %r3 - isync - blr -END(dcache_enable) - -ENTRY(icache_inval) - /* Invalidate i-cache */ - mfspr %r3, SPR_L1CSR1 - ori %r3, %r3, (L1CSR1_ICFI | L1CSR1_ICLFR)@l - isync - mtspr SPR_L1CSR1, %r3 - isync -1: mfspr %r3, SPR_L1CSR1 - andi. %r3, %r3, L1CSR1_ICFI - bne 1b - blr -END(icache_inval) - -ENTRY(icache_disable) - /* Disable i-cache */ - mfspr %r3, SPR_L1CSR1 - li %r4, L1CSR1_ICE@l - not %r4, %r4 - and %r3, %r3, %r4 - isync - mtspr SPR_L1CSR1, %r3 - isync - blr -END(icache_disable) - -ENTRY(icache_enable) - /* Enable i-cache */ - mfspr %r3, SPR_L1CSR1 - oris %r3, %r3, (L1CSR1_ICPE | L1CSR1_ICE)@h - ori %r3, %r3, (L1CSR1_ICPE | L1CSR1_ICE)@l - isync - mtspr SPR_L1CSR1, %r3 - isync - blr -END(icache_enable) - -/* - * L2 cache disable/enable/inval sequences for E500mc. - */ - -ENTRY(l2cache_inval) - mfspr %r3, SPR_L2CSR0 - oris %r3, %r3, (L2CSR0_L2FI | L2CSR0_L2LFC)@h - ori %r3, %r3, (L2CSR0_L2FI | L2CSR0_L2LFC)@l - isync - mtspr SPR_L2CSR0, %r3 - isync -1: mfspr %r3, SPR_L2CSR0 - andis. %r3, %r3, L2CSR0_L2FI@h - bne 1b - blr -END(l2cache_inval) - -ENTRY(l2cache_enable) - mfspr %r3, SPR_L2CSR0 - oris %r3, %r3, (L2CSR0_L2E | L2CSR0_L2PE)@h - isync - mtspr SPR_L2CSR0, %r3 - isync - blr -END(l2cache_enable) - -/* - * Branch predictor setup. - */ -ENTRY(bpred_enable) - mfspr %r3, SPR_BUCSR - ori %r3, %r3, BUCSR_BBFI - isync - mtspr SPR_BUCSR, %r3 - isync - ori %r3, %r3, BUCSR_BPEN - isync - mtspr SPR_BUCSR, %r3 - isync - blr -END(bpred_enable) - -/* - * XXX: This should be moved to a shared AIM/booke asm file, if one ever is - * created. - */ -ENTRY(get_spr) - /* Note: The spr number is patched at runtime */ - mfspr %r3, 0 - blr -END(get_spr) - -/************************************************************************/ -/* Data section */ -/************************************************************************/ - .data - .align 3 -GLOBAL(__startkernel) - ADDR(begin) -GLOBAL(__endkernel) - ADDR(end) - .align 4 -tmpstack: - .space TMPSTACKSZ -tmpstackbound: - .space 10240 /* XXX: this really should not be necessary */ -#ifdef __powerpc64__ -TOC_ENTRY(tmpstack) -#ifdef SMP -TOC_ENTRY(bp_kernload) -#endif -#endif - -/* - * Compiled KERNBASE locations - */ - .globl kernbase - .set kernbase, KERNBASE - -#include diff --git a/sys/powerpc/booke/machdep_e500.c b/sys/powerpc/booke/machdep_e500.c deleted file mode 100644 index 90b6a08c90c..00000000000 --- a/sys/powerpc/booke/machdep_e500.c +++ /dev/null @@ -1,141 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011-2012 Semihalf. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include - -#include - -extern void dcache_enable(void); -extern void dcache_inval(void); -extern void icache_enable(void); -extern void icache_inval(void); -extern void l2cache_enable(void); -extern void l2cache_inval(void); -extern void bpred_enable(void); - -void -booke_enable_l1_cache(void) -{ - uint32_t csr; - - /* Enable D-cache if applicable */ - csr = mfspr(SPR_L1CSR0); - if ((csr & L1CSR0_DCE) == 0) { - dcache_inval(); - dcache_enable(); - } - - csr = mfspr(SPR_L1CSR0); - if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR0_DCE) == 0) - printf("L1 D-cache %sabled\n", - (csr & L1CSR0_DCE) ? "en" : "dis"); - - /* Enable L1 I-cache if applicable. */ - csr = mfspr(SPR_L1CSR1); - if ((csr & L1CSR1_ICE) == 0) { - icache_inval(); - icache_enable(); - } - - csr = mfspr(SPR_L1CSR1); - if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR1_ICE) == 0) - printf("L1 I-cache %sabled\n", - (csr & L1CSR1_ICE) ? "en" : "dis"); -} - -void -booke_enable_l2_cache(void) -{ - uint32_t csr; - - /* Enable L2 cache on E500mc */ - if ((((mfpvr() >> 16) & 0xFFFF) == FSL_E500mc) || - (((mfpvr() >> 16) & 0xFFFF) == FSL_E5500)) { - csr = mfspr(SPR_L2CSR0); - /* - * Don't actually attempt to manipulate the L2 cache if - * L2CFG0 is zero. - * - * Any chip with a working L2 cache will have a nonzero - * L2CFG0, as it will have a nonzero L2CSIZE field. - * - * This fixes waiting forever for cache enable in qemu, - * which does not implement the L2 cache. - */ - if (mfspr(SPR_L2CFG0) != 0 && (csr & L2CSR0_L2E) == 0) { - l2cache_inval(); - l2cache_enable(); - } - - csr = mfspr(SPR_L2CSR0); - if ((boothowto & RB_VERBOSE) != 0 || (csr & L2CSR0_L2E) == 0) - printf("L2 cache %sabled\n", - (csr & L2CSR0_L2E) ? "en" : "dis"); - } -} - -void -booke_enable_bpred(void) -{ - uint32_t csr; - - bpred_enable(); - csr = mfspr(SPR_BUCSR); - if ((boothowto & RB_VERBOSE) != 0 || (csr & BUCSR_BPEN) == 0) - printf("Branch Predictor %sabled\n", - (csr & BUCSR_BPEN) ? "en" : "dis"); -} - -void -booke_disable_l2_cache(void) -{ -} - -/* Return 0 on handled success, otherwise signal number. */ -int -cpu_machine_check(struct thread *td, struct trapframe *frame, int *ucode) -{ - register_t mcsr; - - mcsr = mfspr(SPR_MCSR); - - *ucode = BUS_OBJERR; - return (SIGBUS); -} diff --git a/sys/powerpc/booke/mp_cpudep.c b/sys/powerpc/booke/mp_cpudep.c deleted file mode 100644 index 88900ddb7f8..00000000000 --- a/sys/powerpc/booke/mp_cpudep.c +++ /dev/null @@ -1,97 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2008-2009 Semihalf, Rafal Jaworowski - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -extern void dcache_enable(void); -extern void dcache_inval(void); -extern void icache_enable(void); -extern void icache_inval(void); - -volatile void *ap_pcpu; - -uintptr_t -cpudep_ap_bootstrap(void) -{ - uint32_t msr, csr; - uintptr_t sp; - - /* Enable L1 caches */ - csr = mfspr(SPR_L1CSR0); - if ((csr & L1CSR0_DCE) == 0) { - dcache_inval(); - dcache_enable(); - } - - csr = mfspr(SPR_L1CSR1); - if ((csr & L1CSR1_ICE) == 0) { - icache_inval(); - icache_enable(); - } - - /* Set MSR */ -#ifdef __powerpc64__ - msr = PSL_CM | PSL_ME; -#else - msr = PSL_ME; -#endif - mtmsr(msr); - - /* Assign pcpu fields, return ptr to this AP's idle thread kstack */ - pcpup->pc_curthread = pcpup->pc_idlethread; -#ifdef __powerpc64__ - __asm __volatile("mr 13,%0" :: "r"(pcpup->pc_curthread)); -#else - __asm __volatile("mr 2,%0" :: "r"(pcpup->pc_curthread)); -#endif - pcpup->pc_curpcb = pcpup->pc_curthread->td_pcb; - sp = pcpup->pc_curpcb->pcb_sp; - schedinit_ap(); - - /* XXX shouldn't the pcb_sp be checked/forced for alignment here?? */ - - return (sp); -} - -void -cpudep_ap_setup(void) -{ -} diff --git a/sys/powerpc/booke/platform_bare.c b/sys/powerpc/booke/platform_bare.c deleted file mode 100644 index e004c15c9c5..00000000000 --- a/sys/powerpc/booke/platform_bare.c +++ /dev/null @@ -1,159 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2008-2012 Semihalf. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include "platform_if.h" - -extern uint32_t *bootinfo; - -static int bare_probe(platform_t); -static void bare_mem_regions(platform_t, struct mem_region *phys, int *physsz, - struct mem_region *avail, int *availsz); -static u_long bare_timebase_freq(platform_t, struct cpuref *cpuref); - -static void bare_reset(platform_t); - -static platform_method_t bare_methods[] = { - PLATFORMMETHOD(platform_probe, bare_probe), - PLATFORMMETHOD(platform_mem_regions, bare_mem_regions), - PLATFORMMETHOD(platform_timebase_freq, bare_timebase_freq), - - PLATFORMMETHOD(platform_reset, bare_reset), - - PLATFORMMETHOD_END -}; - -static platform_def_t bare_platform = { - "bare", - bare_methods, - 0 -}; - -PLATFORM_DEF(bare_platform); - -static int -bare_probe(platform_t plat) -{ - - if (OF_peer(0) == -1) /* Needs device tree to work */ - return (ENXIO); - - return (BUS_PROBE_GENERIC); -} - -void -bare_mem_regions(platform_t plat, struct mem_region *phys, int *physsz, - struct mem_region *avail, int *availsz) -{ - - ofw_mem_regions(phys, physsz, avail, availsz); -} - -static u_long -bare_timebase_freq(platform_t plat, struct cpuref *cpuref) -{ - u_long ticks; - phandle_t cpus, child; - pcell_t freq; - - if (bootinfo != NULL) { - if (bootinfo[0] == 1) { - /* Backward compatibility. See 8-STABLE. */ - ticks = bootinfo[3] >> 3; - } else { - /* Compatibility with Juniper's loader. */ - ticks = bootinfo[5] >> 3; - } - } else - ticks = 0; - - if ((cpus = OF_finddevice("/cpus")) == -1) - goto out; - - if ((child = OF_child(cpus)) == 0) - goto out; - - switch (OF_getproplen(child, "timebase-frequency")) { - case 4: - { - uint32_t tbase; - OF_getprop(child, "timebase-frequency", &tbase, sizeof(tbase)); - ticks = tbase; - return (ticks); - } - case 8: - { - uint64_t tbase; - OF_getprop(child, "timebase-frequency", &tbase, sizeof(tbase)); - ticks = tbase; - return (ticks); - } - default: - break; - } - - freq = 0; - if (OF_getprop(child, "bus-frequency", (void *)&freq, - sizeof(freq)) <= 0) - goto out; - - /* - * Time Base and Decrementer are updated every 8 CCB bus clocks. - * HID0[SEL_TBCLK] = 0 - */ - if (freq != 0) - ticks = freq / 8; - -out: - if (ticks <= 0) - panic("Unable to determine timebase frequency!"); - - return (ticks); -} - -static void -bare_reset(platform_t plat) -{ - - printf("Reset failed...\n"); - while (1) - ; -} diff --git a/sys/powerpc/booke/pmap.c b/sys/powerpc/booke/pmap.c deleted file mode 100644 index 20e582cc737..00000000000 --- a/sys/powerpc/booke/pmap.c +++ /dev/null @@ -1,3115 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2007-2009 Semihalf, Rafal Jaworowski - * Copyright (C) 2006 Semihalf, Marian Balakowicz - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Some hw specific parts of this pmap were derived or influenced - * by NetBSD's ibm4xx pmap module. More generic code is shared with - * a few other pmap modules from the FreeBSD tree. - */ - - /* - * VM layout notes: - * - * Kernel and user threads run within one common virtual address space - * defined by AS=0. - * - * 32-bit pmap: - * Virtual address space layout: - * ----------------------------- - * 0x0000_0000 - 0x7fff_ffff : user process - * 0x8000_0000 - 0xbfff_ffff : pmap_mapdev()-ed area (PCI/PCIE etc.) - * 0xc000_0000 - 0xc0ff_ffff : kernel reserved - * 0xc000_0000 - data_end : kernel code+data, env, metadata etc. - * 0xc100_0000 - 0xffff_ffff : KVA - * 0xc100_0000 - 0xc100_3fff : reserved for page zero/copy - * 0xc100_4000 - 0xc200_3fff : reserved for ptbl bufs - * 0xc200_4000 - 0xc200_8fff : guard page + kstack0 - * 0xc200_9000 - 0xfeef_ffff : actual free KVA space - * - * 64-bit pmap: - * Virtual address space layout: - * ----------------------------- - * 0x0000_0000_0000_0000 - 0xbfff_ffff_ffff_ffff : user process - * 0x0000_0000_0000_0000 - 0x8fff_ffff_ffff_ffff : text, data, heap, maps, libraries - * 0x9000_0000_0000_0000 - 0xafff_ffff_ffff_ffff : mmio region - * 0xb000_0000_0000_0000 - 0xbfff_ffff_ffff_ffff : stack - * 0xc000_0000_0000_0000 - 0xcfff_ffff_ffff_ffff : kernel reserved - * 0xc000_0000_0000_0000 - endkernel-1 : kernel code & data - * endkernel - msgbufp-1 : flat device tree - * msgbufp - kernel_pdir-1 : message buffer - * kernel_pdir - kernel_pp2d-1 : kernel page directory - * kernel_pp2d - . : kernel pointers to page directory - * pmap_zero_copy_min - crashdumpmap-1 : reserved for page zero/copy - * crashdumpmap - ptbl_buf_pool_vabase-1 : reserved for ptbl bufs - * ptbl_buf_pool_vabase - virtual_avail-1 : user page directories and page tables - * virtual_avail - 0xcfff_ffff_ffff_ffff : actual free KVA space - * 0xd000_0000_0000_0000 - 0xdfff_ffff_ffff_ffff : coprocessor region - * 0xe000_0000_0000_0000 - 0xefff_ffff_ffff_ffff : mmio region - * 0xf000_0000_0000_0000 - 0xffff_ffff_ffff_ffff : direct map - * 0xf000_0000_0000_0000 - +Maxmem : physmem map - * - 0xffff_ffff_ffff_ffff : device direct map - */ - -#include -#include "opt_ddb.h" -#include "opt_kstack_pages.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include - -#define SPARSE_MAPDEV - -/* Use power-of-two mappings in mmu_booke_mapdev(), to save entries. */ -#define POW2_MAPPINGS - -#ifdef DEBUG -#define debugf(fmt, args...) printf(fmt, ##args) -#else -#define debugf(fmt, args...) -#endif - -#ifdef __powerpc64__ -#define PRI0ptrX "016lx" -#else -#define PRI0ptrX "08x" -#endif - -#define TODO panic("%s: not implemented", __func__); - -extern unsigned char _etext[]; -extern unsigned char _end[]; - -extern uint32_t *bootinfo; - -vm_paddr_t kernload; -vm_offset_t kernstart; -vm_size_t kernsize; - -/* Message buffer and tables. */ -static vm_offset_t data_start; -static vm_size_t data_end; - -/* Phys/avail memory regions. */ -static struct mem_region *availmem_regions; -static int availmem_regions_sz; -static struct mem_region *physmem_regions; -static int physmem_regions_sz; - -#ifndef __powerpc64__ -/* Reserved KVA space and mutex for mmu_booke_zero_page. */ -static vm_offset_t zero_page_va; -static struct mtx zero_page_mutex; - -/* Reserved KVA space and mutex for mmu_booke_copy_page. */ -static vm_offset_t copy_page_src_va; -static vm_offset_t copy_page_dst_va; -static struct mtx copy_page_mutex; -#endif - -static struct mtx tlbivax_mutex; - -/**************************************************************************/ -/* PMAP */ -/**************************************************************************/ - -static int mmu_booke_enter_locked(pmap_t, vm_offset_t, vm_page_t, - vm_prot_t, u_int flags, int8_t psind); - -unsigned int kptbl_min; /* Index of the first kernel ptbl. */ -static uma_zone_t ptbl_root_zone; - -/* - * If user pmap is processed with mmu_booke_remove and the resident count - * drops to 0, there are no more pages to remove, so we need not continue. - */ -#define PMAP_REMOVE_DONE(pmap) \ - ((pmap) != kernel_pmap && (pmap)->pm_stats.resident_count == 0) - -#if defined(COMPAT_FREEBSD32) || !defined(__powerpc64__) -extern int elf32_nxstack; -#endif - -/**************************************************************************/ -/* TLB and TID handling */ -/**************************************************************************/ - -/* Translation ID busy table */ -static volatile pmap_t tidbusy[MAXCPU][TID_MAX + 1]; - -/* - * TLB0 capabilities (entry, way numbers etc.). These can vary between e500 - * core revisions and should be read from h/w registers during early config. - */ -uint32_t tlb0_entries; -uint32_t tlb0_ways; -uint32_t tlb0_entries_per_way; -uint32_t tlb1_entries; - -#define TLB0_ENTRIES (tlb0_entries) -#define TLB0_WAYS (tlb0_ways) -#define TLB0_ENTRIES_PER_WAY (tlb0_entries_per_way) - -#define TLB1_ENTRIES (tlb1_entries) - -static tlbtid_t tid_alloc(struct pmap *); - -#ifdef DDB -#ifdef __powerpc64__ -static void tlb_print_entry(int, uint32_t, uint64_t, uint32_t, uint32_t); -#else -static void tlb_print_entry(int, uint32_t, uint32_t, uint32_t, uint32_t); -#endif -#endif - -static void tlb1_read_entry(tlb_entry_t *, unsigned int); -static void tlb1_write_entry(tlb_entry_t *, unsigned int); -static int tlb1_iomapped(int, vm_paddr_t, vm_size_t, vm_offset_t *); -static vm_size_t tlb1_mapin_region(vm_offset_t, vm_paddr_t, vm_size_t, int); - -static __inline uint32_t tlb_calc_wimg(vm_paddr_t pa, vm_memattr_t ma); - -static vm_size_t tsize2size(unsigned int); -static unsigned int size2tsize(vm_size_t); -static unsigned long ilog2(unsigned long); - -static void set_mas4_defaults(void); - -static inline void tlb0_flush_entry(vm_offset_t); -static inline unsigned int tlb0_tableidx(vm_offset_t, unsigned int); - -/**************************************************************************/ -/* Page table management */ -/**************************************************************************/ - -static struct rwlock_padalign pvh_global_lock; - -/* Data for the pv entry allocation mechanism */ -static uma_zone_t pvzone; -static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; - -#define PV_ENTRY_ZONE_MIN 2048 /* min pv entries in uma zone */ - -#ifndef PMAP_SHPGPERPROC -#define PMAP_SHPGPERPROC 200 -#endif - -static vm_paddr_t pte_vatopa(pmap_t, vm_offset_t); -static int pte_enter(pmap_t, vm_page_t, vm_offset_t, uint32_t, boolean_t); -static int pte_remove(pmap_t, vm_offset_t, uint8_t); -static pte_t *pte_find(pmap_t, vm_offset_t); -static void kernel_pte_alloc(vm_offset_t, vm_offset_t); - -static pv_entry_t pv_alloc(void); -static void pv_free(pv_entry_t); -static void pv_insert(pmap_t, vm_offset_t, vm_page_t); -static void pv_remove(pmap_t, vm_offset_t, vm_page_t); - -static void booke_pmap_init_qpages(void); - -static inline void tlb_miss_lock(void); -static inline void tlb_miss_unlock(void); - -#ifdef SMP -extern tlb_entry_t __boot_tlb1[]; -void pmap_bootstrap_ap(volatile uint32_t *); -#endif - -/* - * Kernel MMU interface - */ -static void mmu_booke_clear_modify(vm_page_t); -static void mmu_booke_copy(pmap_t, pmap_t, vm_offset_t, - vm_size_t, vm_offset_t); -static void mmu_booke_copy_page(vm_page_t, vm_page_t); -static void mmu_booke_copy_pages(vm_page_t *, - vm_offset_t, vm_page_t *, vm_offset_t, int); -static int mmu_booke_enter(pmap_t, vm_offset_t, vm_page_t, - vm_prot_t, u_int flags, int8_t psind); -static void mmu_booke_enter_object(pmap_t, vm_offset_t, vm_offset_t, - vm_page_t, vm_prot_t); -static void mmu_booke_enter_quick(pmap_t, vm_offset_t, vm_page_t, - vm_prot_t); -static vm_paddr_t mmu_booke_extract(pmap_t, vm_offset_t); -static vm_page_t mmu_booke_extract_and_hold(pmap_t, vm_offset_t, - vm_prot_t); -static void mmu_booke_init(void); -static boolean_t mmu_booke_is_modified(vm_page_t); -static boolean_t mmu_booke_is_prefaultable(pmap_t, vm_offset_t); -static boolean_t mmu_booke_is_referenced(vm_page_t); -static int mmu_booke_ts_referenced(vm_page_t); -static vm_offset_t mmu_booke_map(vm_offset_t *, vm_paddr_t, vm_paddr_t, - int); -static int mmu_booke_mincore(pmap_t, vm_offset_t, - vm_paddr_t *); -static void mmu_booke_object_init_pt(pmap_t, vm_offset_t, - vm_object_t, vm_pindex_t, vm_size_t); -static boolean_t mmu_booke_page_exists_quick(pmap_t, vm_page_t); -static void mmu_booke_page_init(vm_page_t); -static int mmu_booke_page_wired_mappings(vm_page_t); -static int mmu_booke_pinit(pmap_t); -static void mmu_booke_pinit0(pmap_t); -static void mmu_booke_protect(pmap_t, vm_offset_t, vm_offset_t, - vm_prot_t); -static void mmu_booke_qenter(vm_offset_t, vm_page_t *, int); -static void mmu_booke_qremove(vm_offset_t, int); -static void mmu_booke_release(pmap_t); -static void mmu_booke_remove(pmap_t, vm_offset_t, vm_offset_t); -static void mmu_booke_remove_all(vm_page_t); -static void mmu_booke_remove_write(vm_page_t); -static void mmu_booke_unwire(pmap_t, vm_offset_t, vm_offset_t); -static void mmu_booke_zero_page(vm_page_t); -static void mmu_booke_zero_page_area(vm_page_t, int, int); -static void mmu_booke_activate(struct thread *); -static void mmu_booke_deactivate(struct thread *); -static void mmu_booke_bootstrap(vm_offset_t, vm_offset_t); -static void *mmu_booke_mapdev(vm_paddr_t, vm_size_t); -static void *mmu_booke_mapdev_attr(vm_paddr_t, vm_size_t, vm_memattr_t); -static void mmu_booke_unmapdev(vm_offset_t, vm_size_t); -static vm_paddr_t mmu_booke_kextract(vm_offset_t); -static void mmu_booke_kenter(vm_offset_t, vm_paddr_t); -static void mmu_booke_kenter_attr(vm_offset_t, vm_paddr_t, vm_memattr_t); -static void mmu_booke_kremove(vm_offset_t); -static int mmu_booke_dev_direct_mapped(vm_paddr_t, vm_size_t); -static void mmu_booke_sync_icache(pmap_t, vm_offset_t, - vm_size_t); -static void mmu_booke_dumpsys_map(vm_paddr_t pa, size_t, - void **); -static void mmu_booke_dumpsys_unmap(vm_paddr_t pa, size_t, - void *); -static void mmu_booke_scan_init(void); -static vm_offset_t mmu_booke_quick_enter_page(vm_page_t m); -static void mmu_booke_quick_remove_page(vm_offset_t addr); -static int mmu_booke_change_attr(vm_offset_t addr, - vm_size_t sz, vm_memattr_t mode); -static int mmu_booke_decode_kernel_ptr(vm_offset_t addr, - int *is_user, vm_offset_t *decoded_addr); -static void mmu_booke_page_array_startup(long); -static boolean_t mmu_booke_page_is_mapped(vm_page_t m); -static bool mmu_booke_ps_enabled(pmap_t pmap); - -static struct pmap_funcs mmu_booke_methods = { - /* pmap dispatcher interface */ - .clear_modify = mmu_booke_clear_modify, - .copy = mmu_booke_copy, - .copy_page = mmu_booke_copy_page, - .copy_pages = mmu_booke_copy_pages, - .enter = mmu_booke_enter, - .enter_object = mmu_booke_enter_object, - .enter_quick = mmu_booke_enter_quick, - .extract = mmu_booke_extract, - .extract_and_hold = mmu_booke_extract_and_hold, - .init = mmu_booke_init, - .is_modified = mmu_booke_is_modified, - .is_prefaultable = mmu_booke_is_prefaultable, - .is_referenced = mmu_booke_is_referenced, - .ts_referenced = mmu_booke_ts_referenced, - .map = mmu_booke_map, - .mincore = mmu_booke_mincore, - .object_init_pt = mmu_booke_object_init_pt, - .page_exists_quick = mmu_booke_page_exists_quick, - .page_init = mmu_booke_page_init, - .page_wired_mappings = mmu_booke_page_wired_mappings, - .pinit = mmu_booke_pinit, - .pinit0 = mmu_booke_pinit0, - .protect = mmu_booke_protect, - .qenter = mmu_booke_qenter, - .qremove = mmu_booke_qremove, - .release = mmu_booke_release, - .remove = mmu_booke_remove, - .remove_all = mmu_booke_remove_all, - .remove_write = mmu_booke_remove_write, - .sync_icache = mmu_booke_sync_icache, - .unwire = mmu_booke_unwire, - .zero_page = mmu_booke_zero_page, - .zero_page_area = mmu_booke_zero_page_area, - .activate = mmu_booke_activate, - .deactivate = mmu_booke_deactivate, - .quick_enter_page = mmu_booke_quick_enter_page, - .quick_remove_page = mmu_booke_quick_remove_page, - .page_array_startup = mmu_booke_page_array_startup, - .page_is_mapped = mmu_booke_page_is_mapped, - .ps_enabled = mmu_booke_ps_enabled, - - /* Internal interfaces */ - .bootstrap = mmu_booke_bootstrap, - .dev_direct_mapped = mmu_booke_dev_direct_mapped, - .mapdev = mmu_booke_mapdev, - .mapdev_attr = mmu_booke_mapdev_attr, - .kenter = mmu_booke_kenter, - .kenter_attr = mmu_booke_kenter_attr, - .kextract = mmu_booke_kextract, - .kremove = mmu_booke_kremove, - .unmapdev = mmu_booke_unmapdev, - .change_attr = mmu_booke_change_attr, - .decode_kernel_ptr = mmu_booke_decode_kernel_ptr, - - /* dumpsys() support */ - .dumpsys_map_chunk = mmu_booke_dumpsys_map, - .dumpsys_unmap_chunk = mmu_booke_dumpsys_unmap, - .dumpsys_pa_init = mmu_booke_scan_init, -}; - -MMU_DEF(booke_mmu, MMU_TYPE_BOOKE, mmu_booke_methods); - -#ifdef __powerpc64__ -#include "pmap_64.c" -#else -#include "pmap_32.c" -#endif - -static vm_offset_t tlb1_map_base = VM_MAPDEV_BASE; - -static __inline uint32_t -tlb_calc_wimg(vm_paddr_t pa, vm_memattr_t ma) -{ - uint32_t attrib; - int i; - - if (ma != VM_MEMATTR_DEFAULT) { - switch (ma) { - case VM_MEMATTR_UNCACHEABLE: - return (MAS2_I | MAS2_G); - case VM_MEMATTR_WRITE_COMBINING: - case VM_MEMATTR_WRITE_BACK: - case VM_MEMATTR_PREFETCHABLE: - return (MAS2_I); - case VM_MEMATTR_WRITE_THROUGH: - return (MAS2_W | MAS2_M); - case VM_MEMATTR_CACHEABLE: - return (MAS2_M); - } - } - - /* - * Assume the page is cache inhibited and access is guarded unless - * it's in our available memory array. - */ - attrib = _TLB_ENTRY_IO; - for (i = 0; i < physmem_regions_sz; i++) { - if ((pa >= physmem_regions[i].mr_start) && - (pa < (physmem_regions[i].mr_start + - physmem_regions[i].mr_size))) { - attrib = _TLB_ENTRY_MEM; - break; - } - } - - return (attrib); -} - -static inline void -tlb_miss_lock(void) -{ -#ifdef SMP - struct pcpu *pc; - - if (!smp_started) - return; - - STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { - if (pc != pcpup) { - CTR3(KTR_PMAP, "%s: tlb miss LOCK of CPU=%d, " - "tlb_lock=%p", __func__, pc->pc_cpuid, pc->pc_booke.tlb_lock); - - KASSERT((pc->pc_cpuid != PCPU_GET(cpuid)), - ("tlb_miss_lock: tried to lock self")); - - tlb_lock(pc->pc_booke.tlb_lock); - - CTR1(KTR_PMAP, "%s: locked", __func__); - } - } -#endif -} - -static inline void -tlb_miss_unlock(void) -{ -#ifdef SMP - struct pcpu *pc; - - if (!smp_started) - return; - - STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { - if (pc != pcpup) { - CTR2(KTR_PMAP, "%s: tlb miss UNLOCK of CPU=%d", - __func__, pc->pc_cpuid); - - tlb_unlock(pc->pc_booke.tlb_lock); - - CTR1(KTR_PMAP, "%s: unlocked", __func__); - } - } -#endif -} - -/* Return number of entries in TLB0. */ -static __inline void -tlb0_get_tlbconf(void) -{ - uint32_t tlb0_cfg; - - tlb0_cfg = mfspr(SPR_TLB0CFG); - tlb0_entries = tlb0_cfg & TLBCFG_NENTRY_MASK; - tlb0_ways = (tlb0_cfg & TLBCFG_ASSOC_MASK) >> TLBCFG_ASSOC_SHIFT; - tlb0_entries_per_way = tlb0_entries / tlb0_ways; -} - -/* Return number of entries in TLB1. */ -static __inline void -tlb1_get_tlbconf(void) -{ - uint32_t tlb1_cfg; - - tlb1_cfg = mfspr(SPR_TLB1CFG); - tlb1_entries = tlb1_cfg & TLBCFG_NENTRY_MASK; -} - -/**************************************************************************/ -/* Page table related */ -/**************************************************************************/ - -/* Allocate pv_entry structure. */ -pv_entry_t -pv_alloc(void) -{ - pv_entry_t pv; - - pv_entry_count++; - if (pv_entry_count > pv_entry_high_water) - pagedaemon_wakeup(0); /* XXX powerpc NUMA */ - pv = uma_zalloc(pvzone, M_NOWAIT); - - return (pv); -} - -/* Free pv_entry structure. */ -static __inline void -pv_free(pv_entry_t pve) -{ - - pv_entry_count--; - uma_zfree(pvzone, pve); -} - -/* Allocate and initialize pv_entry structure. */ -static void -pv_insert(pmap_t pmap, vm_offset_t va, vm_page_t m) -{ - pv_entry_t pve; - - //int su = (pmap == kernel_pmap); - //debugf("pv_insert: s (su = %d pmap = 0x%08x va = 0x%08x m = 0x%08x)\n", su, - // (u_int32_t)pmap, va, (u_int32_t)m); - - pve = pv_alloc(); - if (pve == NULL) - panic("pv_insert: no pv entries!"); - - pve->pv_pmap = pmap; - pve->pv_va = va; - - /* add to pv_list */ - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - rw_assert(&pvh_global_lock, RA_WLOCKED); - - TAILQ_INSERT_TAIL(&m->md.pv_list, pve, pv_link); - - //debugf("pv_insert: e\n"); -} - -/* Destroy pv entry. */ -static void -pv_remove(pmap_t pmap, vm_offset_t va, vm_page_t m) -{ - pv_entry_t pve; - - //int su = (pmap == kernel_pmap); - //debugf("pv_remove: s (su = %d pmap = 0x%08x va = 0x%08x)\n", su, (u_int32_t)pmap, va); - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - rw_assert(&pvh_global_lock, RA_WLOCKED); - - /* find pv entry */ - TAILQ_FOREACH(pve, &m->md.pv_list, pv_link) { - if ((pmap == pve->pv_pmap) && (va == pve->pv_va)) { - /* remove from pv_list */ - TAILQ_REMOVE(&m->md.pv_list, pve, pv_link); - if (TAILQ_EMPTY(&m->md.pv_list)) - vm_page_aflag_clear(m, PGA_WRITEABLE); - - /* free pv entry struct */ - pv_free(pve); - break; - } - } - - //debugf("pv_remove: e\n"); -} - -/**************************************************************************/ -/* PMAP related */ -/**************************************************************************/ - -/* - * This is called during booke_init, before the system is really initialized. - */ -static void -mmu_booke_bootstrap(vm_offset_t start, vm_offset_t kernelend) -{ - vm_paddr_t phys_kernelend; - struct mem_region *mp, *mp1; - int cnt, i, j; - vm_paddr_t s, e, sz; - vm_paddr_t physsz, hwphyssz; - u_int phys_avail_count; - vm_size_t kstack0_sz; - vm_paddr_t kstack0_phys; - vm_offset_t kstack0; - void *dpcpu; - - debugf("mmu_booke_bootstrap: entered\n"); - - /* Set interesting system properties */ -#ifdef __powerpc64__ - hw_direct_map = 1; -#else - hw_direct_map = 0; -#endif -#if defined(COMPAT_FREEBSD32) || !defined(__powerpc64__) - elf32_nxstack = 1; -#endif - - /* Initialize invalidation mutex */ - mtx_init(&tlbivax_mutex, "tlbivax", NULL, MTX_SPIN); - - /* Read TLB0 size and associativity. */ - tlb0_get_tlbconf(); - - /* - * Align kernel start and end address (kernel image). - * Note that kernel end does not necessarily relate to kernsize. - * kernsize is the size of the kernel that is actually mapped. - */ - data_start = round_page(kernelend); - data_end = data_start; - - /* Allocate the dynamic per-cpu area. */ - dpcpu = (void *)data_end; - data_end += DPCPU_SIZE; - - /* Allocate space for the message buffer. */ - msgbufp = (struct msgbuf *)data_end; - data_end += msgbufsize; - debugf(" msgbufp at 0x%"PRI0ptrX" end = 0x%"PRI0ptrX"\n", - (uintptr_t)msgbufp, data_end); - - data_end = round_page(data_end); - data_end = round_page(mmu_booke_alloc_kernel_pgtables(data_end)); - - /* Retrieve phys/avail mem regions */ - mem_regions(&physmem_regions, &physmem_regions_sz, - &availmem_regions, &availmem_regions_sz); - - if (PHYS_AVAIL_ENTRIES < availmem_regions_sz) - panic("mmu_booke_bootstrap: phys_avail too small"); - - data_end = round_page(data_end); - vm_page_array = (vm_page_t)data_end; - /* - * Get a rough idea (upper bound) on the size of the page array. The - * vm_page_array will not handle any more pages than we have in the - * avail_regions array, and most likely much less. - */ - sz = 0; - for (mp = availmem_regions; mp->mr_size; mp++) { - sz += mp->mr_size; - } - sz = (round_page(sz) / (PAGE_SIZE + sizeof(struct vm_page))); - data_end += round_page(sz * sizeof(struct vm_page)); - - /* Pre-round up to 1MB. This wastes some space, but saves TLB entries */ - data_end = roundup2(data_end, 1 << 20); - - debugf(" data_end: 0x%"PRI0ptrX"\n", data_end); - debugf(" kernstart: %#zx\n", kernstart); - debugf(" kernsize: %#zx\n", kernsize); - - if (data_end - kernstart > kernsize) { - kernsize += tlb1_mapin_region(kernstart + kernsize, - kernload + kernsize, (data_end - kernstart) - kernsize, - _TLB_ENTRY_MEM); - } - data_end = kernstart + kernsize; - debugf(" updated data_end: 0x%"PRI0ptrX"\n", data_end); - - /* - * Clear the structures - note we can only do it safely after the - * possible additional TLB1 translations are in place (above) so that - * all range up to the currently calculated 'data_end' is covered. - */ - bzero((void *)data_start, data_end - data_start); - dpcpu_init(dpcpu, 0); - - /*******************************************************/ - /* Set the start and end of kva. */ - /*******************************************************/ - virtual_avail = round_page(data_end); - virtual_end = VM_MAX_KERNEL_ADDRESS; - -#ifndef __powerpc64__ - /* Allocate KVA space for page zero/copy operations. */ - zero_page_va = virtual_avail; - virtual_avail += PAGE_SIZE; - copy_page_src_va = virtual_avail; - virtual_avail += PAGE_SIZE; - copy_page_dst_va = virtual_avail; - virtual_avail += PAGE_SIZE; - debugf("zero_page_va = 0x%"PRI0ptrX"\n", zero_page_va); - debugf("copy_page_src_va = 0x%"PRI0ptrX"\n", copy_page_src_va); - debugf("copy_page_dst_va = 0x%"PRI0ptrX"\n", copy_page_dst_va); - - /* Initialize page zero/copy mutexes. */ - mtx_init(&zero_page_mutex, "mmu_booke_zero_page", NULL, MTX_DEF); - mtx_init(©_page_mutex, "mmu_booke_copy_page", NULL, MTX_DEF); - - /* Allocate KVA space for ptbl bufs. */ - ptbl_buf_pool_vabase = virtual_avail; - virtual_avail += PTBL_BUFS * PTBL_PAGES * PAGE_SIZE; - debugf("ptbl_buf_pool_vabase = 0x%"PRI0ptrX" end = 0x%"PRI0ptrX"\n", - ptbl_buf_pool_vabase, virtual_avail); -#endif - - /* Calculate corresponding physical addresses for the kernel region. */ - phys_kernelend = kernload + kernsize; - debugf("kernel image and allocated data:\n"); - debugf(" kernload = 0x%09jx\n", (uintmax_t)kernload); - debugf(" kernstart = 0x%"PRI0ptrX"\n", kernstart); - debugf(" kernsize = 0x%"PRI0ptrX"\n", kernsize); - - /* - * Remove kernel physical address range from avail regions list. Page - * align all regions. Non-page aligned memory isn't very interesting - * to us. Also, sort the entries for ascending addresses. - */ - - sz = 0; - cnt = availmem_regions_sz; - debugf("processing avail regions:\n"); - for (mp = availmem_regions; mp->mr_size; mp++) { - s = mp->mr_start; - e = mp->mr_start + mp->mr_size; - debugf(" %09jx-%09jx -> ", (uintmax_t)s, (uintmax_t)e); - /* Check whether this region holds all of the kernel. */ - if (s < kernload && e > phys_kernelend) { - availmem_regions[cnt].mr_start = phys_kernelend; - availmem_regions[cnt++].mr_size = e - phys_kernelend; - e = kernload; - } - /* Look whether this regions starts within the kernel. */ - if (s >= kernload && s < phys_kernelend) { - if (e <= phys_kernelend) - goto empty; - s = phys_kernelend; - } - /* Now look whether this region ends within the kernel. */ - if (e > kernload && e <= phys_kernelend) { - if (s >= kernload) - goto empty; - e = kernload; - } - /* Now page align the start and size of the region. */ - s = round_page(s); - e = trunc_page(e); - if (e < s) - e = s; - sz = e - s; - debugf("%09jx-%09jx = %jx\n", - (uintmax_t)s, (uintmax_t)e, (uintmax_t)sz); - - /* Check whether some memory is left here. */ - if (sz == 0) { - empty: - memmove(mp, mp + 1, - (cnt - (mp - availmem_regions)) * sizeof(*mp)); - cnt--; - mp--; - continue; - } - - /* Do an insertion sort. */ - for (mp1 = availmem_regions; mp1 < mp; mp1++) - if (s < mp1->mr_start) - break; - if (mp1 < mp) { - memmove(mp1 + 1, mp1, (char *)mp - (char *)mp1); - mp1->mr_start = s; - mp1->mr_size = sz; - } else { - mp->mr_start = s; - mp->mr_size = sz; - } - } - availmem_regions_sz = cnt; - - /*******************************************************/ - /* Steal physical memory for kernel stack from the end */ - /* of the first avail region */ - /*******************************************************/ - kstack0_sz = kstack_pages * PAGE_SIZE; - kstack0_phys = availmem_regions[0].mr_start + - availmem_regions[0].mr_size; - kstack0_phys -= kstack0_sz; - availmem_regions[0].mr_size -= kstack0_sz; - - /*******************************************************/ - /* Fill in phys_avail table, based on availmem_regions */ - /*******************************************************/ - phys_avail_count = 0; - physsz = 0; - hwphyssz = 0; - TUNABLE_ULONG_FETCH("hw.physmem", (u_long *) &hwphyssz); - - debugf("fill in phys_avail:\n"); - for (i = 0, j = 0; i < availmem_regions_sz; i++, j += 2) { - debugf(" region: 0x%jx - 0x%jx (0x%jx)\n", - (uintmax_t)availmem_regions[i].mr_start, - (uintmax_t)availmem_regions[i].mr_start + - availmem_regions[i].mr_size, - (uintmax_t)availmem_regions[i].mr_size); - - if (hwphyssz != 0 && - (physsz + availmem_regions[i].mr_size) >= hwphyssz) { - debugf(" hw.physmem adjust\n"); - if (physsz < hwphyssz) { - phys_avail[j] = availmem_regions[i].mr_start; - phys_avail[j + 1] = - availmem_regions[i].mr_start + - hwphyssz - physsz; - physsz = hwphyssz; - phys_avail_count++; - dump_avail[j] = phys_avail[j]; - dump_avail[j + 1] = phys_avail[j + 1]; - } - break; - } - - phys_avail[j] = availmem_regions[i].mr_start; - phys_avail[j + 1] = availmem_regions[i].mr_start + - availmem_regions[i].mr_size; - phys_avail_count++; - physsz += availmem_regions[i].mr_size; - dump_avail[j] = phys_avail[j]; - dump_avail[j + 1] = phys_avail[j + 1]; - } - physmem = btoc(physsz); - - /* Calculate the last available physical address. */ - for (i = 0; phys_avail[i + 2] != 0; i += 2) - ; - Maxmem = powerpc_btop(phys_avail[i + 1]); - - debugf("Maxmem = 0x%08lx\n", Maxmem); - debugf("phys_avail_count = %d\n", phys_avail_count); - debugf("physsz = 0x%09jx physmem = %jd (0x%09jx)\n", - (uintmax_t)physsz, (uintmax_t)physmem, (uintmax_t)physmem); - -#ifdef __powerpc64__ - /* - * Map the physical memory contiguously in TLB1. - * Round so it fits into a single mapping. - */ - tlb1_mapin_region(DMAP_BASE_ADDRESS, 0, - phys_avail[i + 1], _TLB_ENTRY_MEM); -#endif - - /*******************************************************/ - /* Initialize (statically allocated) kernel pmap. */ - /*******************************************************/ - PMAP_LOCK_INIT(kernel_pmap); - - debugf("kernel_pmap = 0x%"PRI0ptrX"\n", (uintptr_t)kernel_pmap); - kernel_pte_alloc(virtual_avail, kernstart); - for (i = 0; i < MAXCPU; i++) { - kernel_pmap->pm_tid[i] = TID_KERNEL; - - /* Initialize each CPU's tidbusy entry 0 with kernel_pmap */ - tidbusy[i][TID_KERNEL] = kernel_pmap; - } - - /* Mark kernel_pmap active on all CPUs */ - CPU_FILL(&kernel_pmap->pm_active); - - /* - * Initialize the global pv list lock. - */ - rw_init(&pvh_global_lock, "pmap pv global"); - - /*******************************************************/ - /* Final setup */ - /*******************************************************/ - - /* Enter kstack0 into kernel map, provide guard page */ - kstack0 = virtual_avail + KSTACK_GUARD_PAGES * PAGE_SIZE; - thread0.td_kstack = kstack0; - thread0.td_kstack_pages = kstack_pages; - - debugf("kstack_sz = 0x%08jx\n", (uintmax_t)kstack0_sz); - debugf("kstack0_phys at 0x%09jx - 0x%09jx\n", - (uintmax_t)kstack0_phys, (uintmax_t)kstack0_phys + kstack0_sz); - debugf("kstack0 at 0x%"PRI0ptrX" - 0x%"PRI0ptrX"\n", - kstack0, kstack0 + kstack0_sz); - - virtual_avail += KSTACK_GUARD_PAGES * PAGE_SIZE + kstack0_sz; - for (i = 0; i < kstack_pages; i++) { - mmu_booke_kenter(kstack0, kstack0_phys); - kstack0 += PAGE_SIZE; - kstack0_phys += PAGE_SIZE; - } - - pmap_bootstrapped = 1; - - debugf("virtual_avail = %"PRI0ptrX"\n", virtual_avail); - debugf("virtual_end = %"PRI0ptrX"\n", virtual_end); - - debugf("mmu_booke_bootstrap: exit\n"); -} - -#ifdef SMP -void -tlb1_ap_prep(void) -{ - tlb_entry_t *e, tmp; - unsigned int i; - - /* Prepare TLB1 image for AP processors */ - e = __boot_tlb1; - for (i = 0; i < TLB1_ENTRIES; i++) { - tlb1_read_entry(&tmp, i); - - if ((tmp.mas1 & MAS1_VALID) && (tmp.mas2 & _TLB_ENTRY_SHARED)) - memcpy(e++, &tmp, sizeof(tmp)); - } -} - -void -pmap_bootstrap_ap(volatile uint32_t *trcp __unused) -{ - int i; - - /* - * Finish TLB1 configuration: the BSP already set up its TLB1 and we - * have the snapshot of its contents in the s/w __boot_tlb1[] table - * created by tlb1_ap_prep(), so use these values directly to - * (re)program AP's TLB1 hardware. - * - * Start at index 1 because index 0 has the kernel map. - */ - for (i = 1; i < TLB1_ENTRIES; i++) { - if (__boot_tlb1[i].mas1 & MAS1_VALID) - tlb1_write_entry(&__boot_tlb1[i], i); - } - - set_mas4_defaults(); -} -#endif - -static void -booke_pmap_init_qpages(void) -{ - struct pcpu *pc; - int i; - - CPU_FOREACH(i) { - pc = pcpu_find(i); - pc->pc_qmap_addr = kva_alloc(PAGE_SIZE); - if (pc->pc_qmap_addr == 0) - panic("pmap_init_qpages: unable to allocate KVA"); - } -} - -SYSINIT(qpages_init, SI_SUB_CPU, SI_ORDER_ANY, booke_pmap_init_qpages, NULL); - -/* - * Get the physical page address for the given pmap/virtual address. - */ -static vm_paddr_t -mmu_booke_extract(pmap_t pmap, vm_offset_t va) -{ - vm_paddr_t pa; - - PMAP_LOCK(pmap); - pa = pte_vatopa(pmap, va); - PMAP_UNLOCK(pmap); - - return (pa); -} - -/* - * Extract the physical page address associated with the given - * kernel virtual address. - */ -static vm_paddr_t -mmu_booke_kextract(vm_offset_t va) -{ - tlb_entry_t e; - vm_paddr_t p = 0; - int i; - -#ifdef __powerpc64__ - if (va >= DMAP_BASE_ADDRESS && va <= DMAP_MAX_ADDRESS) - return (DMAP_TO_PHYS(va)); -#endif - - if (va >= VM_MIN_KERNEL_ADDRESS && va <= VM_MAX_KERNEL_ADDRESS) - p = pte_vatopa(kernel_pmap, va); - - if (p == 0) { - /* Check TLB1 mappings */ - for (i = 0; i < TLB1_ENTRIES; i++) { - tlb1_read_entry(&e, i); - if (!(e.mas1 & MAS1_VALID)) - continue; - if (va >= e.virt && va < e.virt + e.size) - return (e.phys + (va - e.virt)); - } - } - - return (p); -} - -/* - * Initialize the pmap module. - * - * Called by vm_mem_init(), to initialize any structures that the pmap system - * needs to map virtual memory. - */ -static void -mmu_booke_init() -{ - int shpgperproc = PMAP_SHPGPERPROC; - - /* - * Initialize the address space (zone) for the pv entries. Set a - * high water mark so that the system can recover from excessive - * numbers of pv entries. - */ - pvzone = uma_zcreate("PV ENTRY", sizeof(struct pv_entry), NULL, NULL, - NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM | UMA_ZONE_NOFREE); - - TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); - pv_entry_max = shpgperproc * maxproc + vm_cnt.v_page_count; - - TUNABLE_INT_FETCH("vm.pmap.pv_entry_max", &pv_entry_max); - pv_entry_high_water = 9 * (pv_entry_max / 10); - - uma_zone_reserve_kva(pvzone, pv_entry_max); - - /* Pre-fill pvzone with initial number of pv entries. */ - uma_prealloc(pvzone, PV_ENTRY_ZONE_MIN); - - /* Create a UMA zone for page table roots. */ - ptbl_root_zone = uma_zcreate("pmap root", PMAP_ROOT_SIZE, - NULL, NULL, NULL, NULL, UMA_ALIGN_CACHE, UMA_ZONE_VM); - - /* Initialize ptbl allocation. */ - ptbl_init(); -} - -/* - * Map a list of wired pages into kernel virtual address space. This is - * intended for temporary mappings which do not need page modification or - * references recorded. Existing mappings in the region are overwritten. - */ -static void -mmu_booke_qenter(vm_offset_t sva, vm_page_t *m, int count) -{ - vm_offset_t va; - - va = sva; - while (count-- > 0) { - mmu_booke_kenter(va, VM_PAGE_TO_PHYS(*m)); - va += PAGE_SIZE; - m++; - } -} - -/* - * Remove page mappings from kernel virtual address space. Intended for - * temporary mappings entered by mmu_booke_qenter. - */ -static void -mmu_booke_qremove(vm_offset_t sva, int count) -{ - vm_offset_t va; - - va = sva; - while (count-- > 0) { - mmu_booke_kremove(va); - va += PAGE_SIZE; - } -} - -/* - * Map a wired page into kernel virtual address space. - */ -static void -mmu_booke_kenter(vm_offset_t va, vm_paddr_t pa) -{ - - mmu_booke_kenter_attr(va, pa, VM_MEMATTR_DEFAULT); -} - -static void -mmu_booke_kenter_attr(vm_offset_t va, vm_paddr_t pa, vm_memattr_t ma) -{ - uint32_t flags; - pte_t *pte; - - KASSERT(((va >= VM_MIN_KERNEL_ADDRESS) && - (va <= VM_MAX_KERNEL_ADDRESS)), ("mmu_booke_kenter: invalid va")); - - flags = PTE_SR | PTE_SW | PTE_SX | PTE_WIRED | PTE_VALID; - flags |= tlb_calc_wimg(pa, ma) << PTE_MAS2_SHIFT; - flags |= PTE_PS_4KB; - - pte = pte_find(kernel_pmap, va); - KASSERT((pte != NULL), ("mmu_booke_kenter: invalid va. NULL PTE")); - - mtx_lock_spin(&tlbivax_mutex); - tlb_miss_lock(); - - if (PTE_ISVALID(pte)) { - CTR1(KTR_PMAP, "%s: replacing entry!", __func__); - - /* Flush entry from TLB0 */ - tlb0_flush_entry(va); - } - - *pte = PTE_RPN_FROM_PA(pa) | flags; - - //debugf("mmu_booke_kenter: pdir_idx = %d ptbl_idx = %d va=0x%08x " - // "pa=0x%08x rpn=0x%08x flags=0x%08x\n", - // pdir_idx, ptbl_idx, va, pa, pte->rpn, pte->flags); - - /* Flush the real memory from the instruction cache. */ - if ((flags & (PTE_I | PTE_G)) == 0) - __syncicache((void *)va, PAGE_SIZE); - - tlb_miss_unlock(); - mtx_unlock_spin(&tlbivax_mutex); -} - -/* - * Remove a page from kernel page table. - */ -static void -mmu_booke_kremove(vm_offset_t va) -{ - pte_t *pte; - - CTR2(KTR_PMAP,"%s: s (va = 0x%"PRI0ptrX")\n", __func__, va); - - KASSERT(((va >= VM_MIN_KERNEL_ADDRESS) && - (va <= VM_MAX_KERNEL_ADDRESS)), - ("mmu_booke_kremove: invalid va")); - - pte = pte_find(kernel_pmap, va); - - if (!PTE_ISVALID(pte)) { - CTR1(KTR_PMAP, "%s: invalid pte", __func__); - - return; - } - - mtx_lock_spin(&tlbivax_mutex); - tlb_miss_lock(); - - /* Invalidate entry in TLB0, update PTE. */ - tlb0_flush_entry(va); - *pte = 0; - - tlb_miss_unlock(); - mtx_unlock_spin(&tlbivax_mutex); -} - -/* - * Figure out where a given kernel pointer (usually in a fault) points - * to from the VM's perspective, potentially remapping into userland's - * address space. - */ -static int -mmu_booke_decode_kernel_ptr(vm_offset_t addr, int *is_user, - vm_offset_t *decoded_addr) -{ - - if (trunc_page(addr) <= VM_MAXUSER_ADDRESS) - *is_user = 1; - else - *is_user = 0; - - *decoded_addr = addr; - return (0); -} - -static boolean_t -mmu_booke_page_is_mapped(vm_page_t m) -{ - - return (!TAILQ_EMPTY(&(m)->md.pv_list)); -} - -static bool -mmu_booke_ps_enabled(pmap_t pmap __unused) -{ - return (false); -} - -/* - * Initialize pmap associated with process 0. - */ -static void -mmu_booke_pinit0(pmap_t pmap) -{ - - PMAP_LOCK_INIT(pmap); - mmu_booke_pinit(pmap); - PCPU_SET(curpmap, pmap); -} - -/* - * Insert the given physical page at the specified virtual address in the - * target physical map with the protection requested. If specified the page - * will be wired down. - */ -static int -mmu_booke_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, - vm_prot_t prot, u_int flags, int8_t psind) -{ - int error; - - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pmap); - error = mmu_booke_enter_locked(pmap, va, m, prot, flags, psind); - PMAP_UNLOCK(pmap); - rw_wunlock(&pvh_global_lock); - return (error); -} - -static int -mmu_booke_enter_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, - vm_prot_t prot, u_int pmap_flags, int8_t psind __unused) -{ - pte_t *pte; - vm_paddr_t pa; - pte_t flags; - int error, su, sync; - - pa = VM_PAGE_TO_PHYS(m); - su = (pmap == kernel_pmap); - sync = 0; - - //debugf("mmu_booke_enter_locked: s (pmap=0x%08x su=%d tid=%d m=0x%08x va=0x%08x " - // "pa=0x%08x prot=0x%08x flags=%#x)\n", - // (u_int32_t)pmap, su, pmap->pm_tid, - // (u_int32_t)m, va, pa, prot, flags); - - if (su) { - KASSERT(((va >= virtual_avail) && - (va <= VM_MAX_KERNEL_ADDRESS)), - ("mmu_booke_enter_locked: kernel pmap, non kernel va")); - } else { - KASSERT((va <= VM_MAXUSER_ADDRESS), - ("mmu_booke_enter_locked: user pmap, non user va")); - } - if ((m->oflags & VPO_UNMANAGED) == 0) { - if ((pmap_flags & PMAP_ENTER_QUICK_LOCKED) == 0) - VM_PAGE_OBJECT_BUSY_ASSERT(m); - else - VM_OBJECT_ASSERT_LOCKED(m->object); - } - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - - /* - * If there is an existing mapping, and the physical address has not - * changed, must be protection or wiring change. - */ - if (((pte = pte_find(pmap, va)) != NULL) && - (PTE_ISVALID(pte)) && (PTE_PA(pte) == pa)) { - - /* - * Before actually updating pte->flags we calculate and - * prepare its new value in a helper var. - */ - flags = *pte; - flags &= ~(PTE_UW | PTE_UX | PTE_SW | PTE_SX | PTE_MODIFIED); - - /* Wiring change, just update stats. */ - if ((pmap_flags & PMAP_ENTER_WIRED) != 0) { - if (!PTE_ISWIRED(pte)) { - flags |= PTE_WIRED; - pmap->pm_stats.wired_count++; - } - } else { - if (PTE_ISWIRED(pte)) { - flags &= ~PTE_WIRED; - pmap->pm_stats.wired_count--; - } - } - - if (prot & VM_PROT_WRITE) { - /* Add write permissions. */ - flags |= PTE_SW; - if (!su) - flags |= PTE_UW; - - if ((flags & PTE_MANAGED) != 0) - vm_page_aflag_set(m, PGA_WRITEABLE); - } else { - /* Handle modified pages, sense modify status. */ - - /* - * The PTE_MODIFIED flag could be set by underlying - * TLB misses since we last read it (above), possibly - * other CPUs could update it so we check in the PTE - * directly rather than rely on that saved local flags - * copy. - */ - if (PTE_ISMODIFIED(pte)) - vm_page_dirty(m); - } - - if (prot & VM_PROT_EXECUTE) { - flags |= PTE_SX; - if (!su) - flags |= PTE_UX; - - /* - * Check existing flags for execute permissions: if we - * are turning execute permissions on, icache should - * be flushed. - */ - if ((*pte & (PTE_UX | PTE_SX)) == 0) - sync++; - } - - flags &= ~PTE_REFERENCED; - - /* - * The new flags value is all calculated -- only now actually - * update the PTE. - */ - mtx_lock_spin(&tlbivax_mutex); - tlb_miss_lock(); - - tlb0_flush_entry(va); - *pte &= ~PTE_FLAGS_MASK; - *pte |= flags; - - tlb_miss_unlock(); - mtx_unlock_spin(&tlbivax_mutex); - - } else { - /* - * If there is an existing mapping, but it's for a different - * physical address, pte_enter() will delete the old mapping. - */ - //if ((pte != NULL) && PTE_ISVALID(pte)) - // debugf("mmu_booke_enter_locked: replace\n"); - //else - // debugf("mmu_booke_enter_locked: new\n"); - - /* Now set up the flags and install the new mapping. */ - flags = (PTE_SR | PTE_VALID); - flags |= PTE_M; - - if (!su) - flags |= PTE_UR; - - if (prot & VM_PROT_WRITE) { - flags |= PTE_SW; - if (!su) - flags |= PTE_UW; - - if ((m->oflags & VPO_UNMANAGED) == 0) - vm_page_aflag_set(m, PGA_WRITEABLE); - } - - if (prot & VM_PROT_EXECUTE) { - flags |= PTE_SX; - if (!su) - flags |= PTE_UX; - } - - /* If its wired update stats. */ - if ((pmap_flags & PMAP_ENTER_WIRED) != 0) - flags |= PTE_WIRED; - - error = pte_enter(pmap, m, va, flags, - (pmap_flags & PMAP_ENTER_NOSLEEP) != 0); - if (error != 0) - return (KERN_RESOURCE_SHORTAGE); - - if ((flags & PMAP_ENTER_WIRED) != 0) - pmap->pm_stats.wired_count++; - - /* Flush the real memory from the instruction cache. */ - if (prot & VM_PROT_EXECUTE) - sync++; - } - - if (sync && (su || pmap == PCPU_GET(curpmap))) { - __syncicache((void *)va, PAGE_SIZE); - sync = 0; - } - - return (KERN_SUCCESS); -} - -/* - * Maps a sequence of resident pages belonging to the same object. - * The sequence begins with the given page m_start. This page is - * mapped at the given virtual address start. Each subsequent page is - * mapped at a virtual address that is offset from start by the same - * amount as the page is offset from m_start within the object. The - * last page in the sequence is the page with the largest offset from - * m_start that can be mapped at a virtual address less than the given - * virtual address end. Not every virtual page between start and end - * is mapped; only those for which a resident page exists with the - * corresponding offset from m_start are mapped. - */ -static void -mmu_booke_enter_object(pmap_t pmap, vm_offset_t start, - vm_offset_t end, vm_page_t m_start, vm_prot_t prot) -{ - vm_page_t m; - vm_pindex_t diff, psize; - - VM_OBJECT_ASSERT_LOCKED(m_start->object); - - psize = atop(end - start); - m = m_start; - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pmap); - while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { - mmu_booke_enter_locked(pmap, start + ptoa(diff), m, - prot & (VM_PROT_READ | VM_PROT_EXECUTE), - PMAP_ENTER_NOSLEEP | PMAP_ENTER_QUICK_LOCKED, 0); - m = TAILQ_NEXT(m, listq); - } - PMAP_UNLOCK(pmap); - rw_wunlock(&pvh_global_lock); -} - -static void -mmu_booke_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, - vm_prot_t prot) -{ - - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pmap); - mmu_booke_enter_locked(pmap, va, m, - prot & (VM_PROT_READ | VM_PROT_EXECUTE), PMAP_ENTER_NOSLEEP | - PMAP_ENTER_QUICK_LOCKED, 0); - PMAP_UNLOCK(pmap); - rw_wunlock(&pvh_global_lock); -} - -/* - * Remove the given range of addresses from the specified map. - * - * It is assumed that the start and end are properly rounded to the page size. - */ -static void -mmu_booke_remove(pmap_t pmap, vm_offset_t va, vm_offset_t endva) -{ - pte_t *pte; - uint8_t hold_flag; - - int su = (pmap == kernel_pmap); - - //debugf("mmu_booke_remove: s (su = %d pmap=0x%08x tid=%d va=0x%08x endva=0x%08x)\n", - // su, (u_int32_t)pmap, pmap->pm_tid, va, endva); - - if (su) { - KASSERT(((va >= virtual_avail) && - (va <= VM_MAX_KERNEL_ADDRESS)), - ("mmu_booke_remove: kernel pmap, non kernel va")); - } else { - KASSERT((va <= VM_MAXUSER_ADDRESS), - ("mmu_booke_remove: user pmap, non user va")); - } - - if (PMAP_REMOVE_DONE(pmap)) { - //debugf("mmu_booke_remove: e (empty)\n"); - return; - } - - hold_flag = PTBL_HOLD_FLAG(pmap); - //debugf("mmu_booke_remove: hold_flag = %d\n", hold_flag); - - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pmap); - for (; va < endva; va += PAGE_SIZE) { - pte = pte_find_next(pmap, &va); - if ((pte == NULL) || !PTE_ISVALID(pte)) - break; - if (va >= endva) - break; - pte_remove(pmap, va, hold_flag); - } - PMAP_UNLOCK(pmap); - rw_wunlock(&pvh_global_lock); - - //debugf("mmu_booke_remove: e\n"); -} - -/* - * Remove physical page from all pmaps in which it resides. - */ -static void -mmu_booke_remove_all(vm_page_t m) -{ - pv_entry_t pv, pvn; - uint8_t hold_flag; - - rw_wlock(&pvh_global_lock); - TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_link, pvn) { - PMAP_LOCK(pv->pv_pmap); - hold_flag = PTBL_HOLD_FLAG(pv->pv_pmap); - pte_remove(pv->pv_pmap, pv->pv_va, hold_flag); - PMAP_UNLOCK(pv->pv_pmap); - } - vm_page_aflag_clear(m, PGA_WRITEABLE); - rw_wunlock(&pvh_global_lock); -} - -/* - * Map a range of physical addresses into kernel virtual address space. - */ -static vm_offset_t -mmu_booke_map(vm_offset_t *virt, vm_paddr_t pa_start, - vm_paddr_t pa_end, int prot) -{ - vm_offset_t sva = *virt; - vm_offset_t va = sva; - -#ifdef __powerpc64__ - /* XXX: Handle memory not starting at 0x0. */ - if (pa_end < ctob(Maxmem)) - return (PHYS_TO_DMAP(pa_start)); -#endif - - while (pa_start < pa_end) { - mmu_booke_kenter(va, pa_start); - va += PAGE_SIZE; - pa_start += PAGE_SIZE; - } - *virt = va; - - return (sva); -} - -/* - * The pmap must be activated before it's address space can be accessed in any - * way. - */ -static void -mmu_booke_activate(struct thread *td) -{ - pmap_t pmap; - u_int cpuid; - - pmap = &td->td_proc->p_vmspace->vm_pmap; - - CTR5(KTR_PMAP, "%s: s (td = %p, proc = '%s', id = %d, pmap = 0x%"PRI0ptrX")", - __func__, td, td->td_proc->p_comm, td->td_proc->p_pid, pmap); - - KASSERT((pmap != kernel_pmap), ("mmu_booke_activate: kernel_pmap!")); - - sched_pin(); - - cpuid = PCPU_GET(cpuid); - CPU_SET_ATOMIC(cpuid, &pmap->pm_active); - PCPU_SET(curpmap, pmap); - - if (pmap->pm_tid[cpuid] == TID_NONE) - tid_alloc(pmap); - - /* Load PID0 register with pmap tid value. */ - mtspr(SPR_PID0, pmap->pm_tid[cpuid]); - __asm __volatile("isync"); - - mtspr(SPR_DBCR0, td->td_pcb->pcb_cpu.booke.dbcr0); - - sched_unpin(); - - CTR3(KTR_PMAP, "%s: e (tid = %d for '%s')", __func__, - pmap->pm_tid[PCPU_GET(cpuid)], td->td_proc->p_comm); -} - -/* - * Deactivate the specified process's address space. - */ -static void -mmu_booke_deactivate(struct thread *td) -{ - pmap_t pmap; - - pmap = &td->td_proc->p_vmspace->vm_pmap; - - CTR5(KTR_PMAP, "%s: td=%p, proc = '%s', id = %d, pmap = 0x%"PRI0ptrX, - __func__, td, td->td_proc->p_comm, td->td_proc->p_pid, pmap); - - td->td_pcb->pcb_cpu.booke.dbcr0 = mfspr(SPR_DBCR0); - - CPU_CLR_ATOMIC(PCPU_GET(cpuid), &pmap->pm_active); - PCPU_SET(curpmap, NULL); -} - -/* - * Copy the range specified by src_addr/len - * from the source map to the range dst_addr/len - * in the destination map. - * - * This routine is only advisory and need not do anything. - */ -static void -mmu_booke_copy(pmap_t dst_pmap, pmap_t src_pmap, - vm_offset_t dst_addr, vm_size_t len, vm_offset_t src_addr) -{ - -} - -/* - * Set the physical protection on the specified range of this map as requested. - */ -static void -mmu_booke_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, - vm_prot_t prot) -{ - vm_offset_t va; - vm_page_t m; - pte_t *pte; - - if ((prot & VM_PROT_READ) == VM_PROT_NONE) { - mmu_booke_remove(pmap, sva, eva); - return; - } - - if (prot & VM_PROT_WRITE) - return; - - PMAP_LOCK(pmap); - for (va = sva; va < eva; va += PAGE_SIZE) { - if ((pte = pte_find(pmap, va)) != NULL) { - if (PTE_ISVALID(pte)) { - m = PHYS_TO_VM_PAGE(PTE_PA(pte)); - - mtx_lock_spin(&tlbivax_mutex); - tlb_miss_lock(); - - /* Handle modified pages. */ - if (PTE_ISMODIFIED(pte) && PTE_ISMANAGED(pte)) - vm_page_dirty(m); - - tlb0_flush_entry(va); - *pte &= ~(PTE_UW | PTE_SW | PTE_MODIFIED); - - tlb_miss_unlock(); - mtx_unlock_spin(&tlbivax_mutex); - } - } - } - PMAP_UNLOCK(pmap); -} - -/* - * Clear the write and modified bits in each of the given page's mappings. - */ -static void -mmu_booke_remove_write(vm_page_t m) -{ - pv_entry_t pv; - pte_t *pte; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("mmu_booke_remove_write: page %p is not managed", m)); - vm_page_assert_busied(m); - - if (!pmap_page_is_write_mapped(m)) - return; - rw_wlock(&pvh_global_lock); - TAILQ_FOREACH(pv, &m->md.pv_list, pv_link) { - PMAP_LOCK(pv->pv_pmap); - if ((pte = pte_find(pv->pv_pmap, pv->pv_va)) != NULL) { - if (PTE_ISVALID(pte)) { - m = PHYS_TO_VM_PAGE(PTE_PA(pte)); - - mtx_lock_spin(&tlbivax_mutex); - tlb_miss_lock(); - - /* Handle modified pages. */ - if (PTE_ISMODIFIED(pte)) - vm_page_dirty(m); - - /* Flush mapping from TLB0. */ - *pte &= ~(PTE_UW | PTE_SW | PTE_MODIFIED); - - tlb_miss_unlock(); - mtx_unlock_spin(&tlbivax_mutex); - } - } - PMAP_UNLOCK(pv->pv_pmap); - } - vm_page_aflag_clear(m, PGA_WRITEABLE); - rw_wunlock(&pvh_global_lock); -} - -/* - * Atomically extract and hold the physical page with the given - * pmap and virtual address pair if that mapping permits the given - * protection. - */ -static vm_page_t -mmu_booke_extract_and_hold(pmap_t pmap, vm_offset_t va, - vm_prot_t prot) -{ - pte_t *pte; - vm_page_t m; - uint32_t pte_wbit; - - m = NULL; - PMAP_LOCK(pmap); - pte = pte_find(pmap, va); - if ((pte != NULL) && PTE_ISVALID(pte)) { - if (pmap == kernel_pmap) - pte_wbit = PTE_SW; - else - pte_wbit = PTE_UW; - - if ((*pte & pte_wbit) != 0 || (prot & VM_PROT_WRITE) == 0) { - m = PHYS_TO_VM_PAGE(PTE_PA(pte)); - if (!vm_page_wire_mapped(m)) - m = NULL; - } - } - PMAP_UNLOCK(pmap); - return (m); -} - -/* - * Initialize a vm_page's machine-dependent fields. - */ -static void -mmu_booke_page_init(vm_page_t m) -{ - - m->md.pv_tracked = 0; - TAILQ_INIT(&m->md.pv_list); -} - -/* - * Return whether or not the specified physical page was modified - * in any of physical maps. - */ -static boolean_t -mmu_booke_is_modified(vm_page_t m) -{ - pte_t *pte; - pv_entry_t pv; - boolean_t rv; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("mmu_booke_is_modified: page %p is not managed", m)); - rv = FALSE; - - /* - * If the page is not busied then this check is racy. - */ - if (!pmap_page_is_write_mapped(m)) - return (FALSE); - - rw_wlock(&pvh_global_lock); - TAILQ_FOREACH(pv, &m->md.pv_list, pv_link) { - PMAP_LOCK(pv->pv_pmap); - if ((pte = pte_find(pv->pv_pmap, pv->pv_va)) != NULL && - PTE_ISVALID(pte)) { - if (PTE_ISMODIFIED(pte)) - rv = TRUE; - } - PMAP_UNLOCK(pv->pv_pmap); - if (rv) - break; - } - rw_wunlock(&pvh_global_lock); - return (rv); -} - -/* - * Return whether or not the specified virtual address is eligible - * for prefault. - */ -static boolean_t -mmu_booke_is_prefaultable(pmap_t pmap, vm_offset_t addr) -{ - - return (FALSE); -} - -/* - * Return whether or not the specified physical page was referenced - * in any physical maps. - */ -static boolean_t -mmu_booke_is_referenced(vm_page_t m) -{ - pte_t *pte; - pv_entry_t pv; - boolean_t rv; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("mmu_booke_is_referenced: page %p is not managed", m)); - rv = FALSE; - rw_wlock(&pvh_global_lock); - TAILQ_FOREACH(pv, &m->md.pv_list, pv_link) { - PMAP_LOCK(pv->pv_pmap); - if ((pte = pte_find(pv->pv_pmap, pv->pv_va)) != NULL && - PTE_ISVALID(pte)) { - if (PTE_ISREFERENCED(pte)) - rv = TRUE; - } - PMAP_UNLOCK(pv->pv_pmap); - if (rv) - break; - } - rw_wunlock(&pvh_global_lock); - return (rv); -} - -/* - * Clear the modify bits on the specified physical page. - */ -static void -mmu_booke_clear_modify(vm_page_t m) -{ - pte_t *pte; - pv_entry_t pv; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("mmu_booke_clear_modify: page %p is not managed", m)); - vm_page_assert_busied(m); - - if (!pmap_page_is_write_mapped(m)) - return; - - rw_wlock(&pvh_global_lock); - TAILQ_FOREACH(pv, &m->md.pv_list, pv_link) { - PMAP_LOCK(pv->pv_pmap); - if ((pte = pte_find(pv->pv_pmap, pv->pv_va)) != NULL && - PTE_ISVALID(pte)) { - mtx_lock_spin(&tlbivax_mutex); - tlb_miss_lock(); - - if (*pte & (PTE_SW | PTE_UW | PTE_MODIFIED)) { - tlb0_flush_entry(pv->pv_va); - *pte &= ~(PTE_SW | PTE_UW | PTE_MODIFIED | - PTE_REFERENCED); - } - - tlb_miss_unlock(); - mtx_unlock_spin(&tlbivax_mutex); - } - PMAP_UNLOCK(pv->pv_pmap); - } - rw_wunlock(&pvh_global_lock); -} - -/* - * Return a count of reference bits for a page, clearing those bits. - * It is not necessary for every reference bit to be cleared, but it - * is necessary that 0 only be returned when there are truly no - * reference bits set. - * - * As an optimization, update the page's dirty field if a modified bit is - * found while counting reference bits. This opportunistic update can be - * performed at low cost and can eliminate the need for some future calls - * to pmap_is_modified(). However, since this function stops after - * finding PMAP_TS_REFERENCED_MAX reference bits, it may not detect some - * dirty pages. Those dirty pages will only be detected by a future call - * to pmap_is_modified(). - */ -static int -mmu_booke_ts_referenced(vm_page_t m) -{ - pte_t *pte; - pv_entry_t pv; - int count; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("mmu_booke_ts_referenced: page %p is not managed", m)); - count = 0; - rw_wlock(&pvh_global_lock); - TAILQ_FOREACH(pv, &m->md.pv_list, pv_link) { - PMAP_LOCK(pv->pv_pmap); - if ((pte = pte_find(pv->pv_pmap, pv->pv_va)) != NULL && - PTE_ISVALID(pte)) { - if (PTE_ISMODIFIED(pte)) - vm_page_dirty(m); - if (PTE_ISREFERENCED(pte)) { - mtx_lock_spin(&tlbivax_mutex); - tlb_miss_lock(); - - tlb0_flush_entry(pv->pv_va); - *pte &= ~PTE_REFERENCED; - - tlb_miss_unlock(); - mtx_unlock_spin(&tlbivax_mutex); - - if (++count >= PMAP_TS_REFERENCED_MAX) { - PMAP_UNLOCK(pv->pv_pmap); - break; - } - } - } - PMAP_UNLOCK(pv->pv_pmap); - } - rw_wunlock(&pvh_global_lock); - return (count); -} - -/* - * Clear the wired attribute from the mappings for the specified range of - * addresses in the given pmap. Every valid mapping within that range must - * have the wired attribute set. In contrast, invalid mappings cannot have - * the wired attribute set, so they are ignored. - * - * The wired attribute of the page table entry is not a hardware feature, so - * there is no need to invalidate any TLB entries. - */ -static void -mmu_booke_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) -{ - vm_offset_t va; - pte_t *pte; - - PMAP_LOCK(pmap); - for (va = sva; va < eva; va += PAGE_SIZE) { - if ((pte = pte_find(pmap, va)) != NULL && - PTE_ISVALID(pte)) { - if (!PTE_ISWIRED(pte)) - panic("mmu_booke_unwire: pte %p isn't wired", - pte); - *pte &= ~PTE_WIRED; - pmap->pm_stats.wired_count--; - } - } - PMAP_UNLOCK(pmap); - -} - -/* - * Return true if the pmap's pv is one of the first 16 pvs linked to from this - * page. This count may be changed upwards or downwards in the future; it is - * only necessary that true be returned for a small subset of pmaps for proper - * page aging. - */ -static boolean_t -mmu_booke_page_exists_quick(pmap_t pmap, vm_page_t m) -{ - pv_entry_t pv; - int loops; - boolean_t rv; - - KASSERT((m->oflags & VPO_UNMANAGED) == 0, - ("mmu_booke_page_exists_quick: page %p is not managed", m)); - loops = 0; - rv = FALSE; - rw_wlock(&pvh_global_lock); - TAILQ_FOREACH(pv, &m->md.pv_list, pv_link) { - if (pv->pv_pmap == pmap) { - rv = TRUE; - break; - } - if (++loops >= 16) - break; - } - rw_wunlock(&pvh_global_lock); - return (rv); -} - -/* - * Return the number of managed mappings to the given physical page that are - * wired. - */ -static int -mmu_booke_page_wired_mappings(vm_page_t m) -{ - pv_entry_t pv; - pte_t *pte; - int count = 0; - - if ((m->oflags & VPO_UNMANAGED) != 0) - return (count); - rw_wlock(&pvh_global_lock); - TAILQ_FOREACH(pv, &m->md.pv_list, pv_link) { - PMAP_LOCK(pv->pv_pmap); - if ((pte = pte_find(pv->pv_pmap, pv->pv_va)) != NULL) - if (PTE_ISVALID(pte) && PTE_ISWIRED(pte)) - count++; - PMAP_UNLOCK(pv->pv_pmap); - } - rw_wunlock(&pvh_global_lock); - return (count); -} - -static int -mmu_booke_dev_direct_mapped(vm_paddr_t pa, vm_size_t size) -{ - int i; - vm_offset_t va; - - /* - * This currently does not work for entries that - * overlap TLB1 entries. - */ - for (i = 0; i < TLB1_ENTRIES; i ++) { - if (tlb1_iomapped(i, pa, size, &va) == 0) - return (0); - } - - return (EFAULT); -} - -void -mmu_booke_dumpsys_map(vm_paddr_t pa, size_t sz, void **va) -{ - vm_paddr_t ppa; - vm_offset_t ofs; - vm_size_t gran; - - /* Minidumps are based on virtual memory addresses. */ - if (do_minidump) { - *va = (void *)(vm_offset_t)pa; - return; - } - - /* Raw physical memory dumps don't have a virtual address. */ - /* We always map a 256MB page at 256M. */ - gran = 256 * 1024 * 1024; - ppa = rounddown2(pa, gran); - ofs = pa - ppa; - *va = (void *)gran; - tlb1_set_entry((vm_offset_t)va, ppa, gran, _TLB_ENTRY_IO); - - if (sz > (gran - ofs)) - tlb1_set_entry((vm_offset_t)(va + gran), ppa + gran, gran, - _TLB_ENTRY_IO); -} - -void -mmu_booke_dumpsys_unmap(vm_paddr_t pa, size_t sz, void *va) -{ - vm_paddr_t ppa; - vm_offset_t ofs; - vm_size_t gran; - tlb_entry_t e; - int i; - - /* Minidumps are based on virtual memory addresses. */ - /* Nothing to do... */ - if (do_minidump) - return; - - for (i = 0; i < TLB1_ENTRIES; i++) { - tlb1_read_entry(&e, i); - if (!(e.mas1 & MAS1_VALID)) - break; - } - - /* Raw physical memory dumps don't have a virtual address. */ - i--; - e.mas1 = 0; - e.mas2 = 0; - e.mas3 = 0; - tlb1_write_entry(&e, i); - - gran = 256 * 1024 * 1024; - ppa = rounddown2(pa, gran); - ofs = pa - ppa; - if (sz > (gran - ofs)) { - i--; - e.mas1 = 0; - e.mas2 = 0; - e.mas3 = 0; - tlb1_write_entry(&e, i); - } -} - -extern struct dump_pa dump_map[PHYS_AVAIL_SZ + 1]; - -void -mmu_booke_scan_init() -{ - vm_offset_t va; - pte_t *pte; - int i; - - if (!do_minidump) { - /* Initialize phys. segments for dumpsys(). */ - memset(&dump_map, 0, sizeof(dump_map)); - mem_regions(&physmem_regions, &physmem_regions_sz, &availmem_regions, - &availmem_regions_sz); - for (i = 0; i < physmem_regions_sz; i++) { - dump_map[i].pa_start = physmem_regions[i].mr_start; - dump_map[i].pa_size = physmem_regions[i].mr_size; - } - return; - } - - /* Virtual segments for minidumps: */ - memset(&dump_map, 0, sizeof(dump_map)); - - /* 1st: kernel .data and .bss. */ - dump_map[0].pa_start = trunc_page((uintptr_t)_etext); - dump_map[0].pa_size = - round_page((uintptr_t)_end) - dump_map[0].pa_start; - - /* 2nd: msgbuf and tables (see pmap_bootstrap()). */ - dump_map[1].pa_start = data_start; - dump_map[1].pa_size = data_end - data_start; - - /* 3rd: kernel VM. */ - va = dump_map[1].pa_start + dump_map[1].pa_size; - /* Find start of next chunk (from va). */ - while (va < virtual_end) { - /* Don't dump the buffer cache. */ - if (va >= kmi.buffer_sva && va < kmi.buffer_eva) { - va = kmi.buffer_eva; - continue; - } - pte = pte_find(kernel_pmap, va); - if (pte != NULL && PTE_ISVALID(pte)) - break; - va += PAGE_SIZE; - } - if (va < virtual_end) { - dump_map[2].pa_start = va; - va += PAGE_SIZE; - /* Find last page in chunk. */ - while (va < virtual_end) { - /* Don't run into the buffer cache. */ - if (va == kmi.buffer_sva) - break; - pte = pte_find(kernel_pmap, va); - if (pte == NULL || !PTE_ISVALID(pte)) - break; - va += PAGE_SIZE; - } - dump_map[2].pa_size = va - dump_map[2].pa_start; - } -} - -/* - * Map a set of physical memory pages into the kernel virtual address space. - * Return a pointer to where it is mapped. This routine is intended to be used - * for mapping device memory, NOT real memory. - */ -static void * -mmu_booke_mapdev(vm_paddr_t pa, vm_size_t size) -{ - - return (mmu_booke_mapdev_attr(pa, size, VM_MEMATTR_DEFAULT)); -} - -static int -tlb1_find_pa(vm_paddr_t pa, tlb_entry_t *e) -{ - int i; - - for (i = 0; i < TLB1_ENTRIES; i++) { - tlb1_read_entry(e, i); - if ((e->mas1 & MAS1_VALID) == 0) - continue; - if (e->phys == pa) - return (i); - } - return (-1); -} - -static void * -mmu_booke_mapdev_attr(vm_paddr_t pa, vm_size_t size, vm_memattr_t ma) -{ - tlb_entry_t e; - vm_paddr_t tmppa; -#ifndef __powerpc64__ - uintptr_t tmpva; -#endif - uintptr_t va, retva; - vm_size_t sz; - int i; - int wimge; - - /* - * Check if this is premapped in TLB1. - */ - sz = size; - tmppa = pa; - va = ~0; - wimge = tlb_calc_wimg(pa, ma); - for (i = 0; i < TLB1_ENTRIES; i++) { - tlb1_read_entry(&e, i); - if (!(e.mas1 & MAS1_VALID)) - continue; - if (wimge != (e.mas2 & (MAS2_WIMGE_MASK & ~_TLB_ENTRY_SHARED))) - continue; - if (tmppa >= e.phys && tmppa < e.phys + e.size) { - va = e.virt + (pa - e.phys); - tmppa = e.phys + e.size; - sz -= MIN(sz, e.size - (pa - e.phys)); - while (sz > 0 && (i = tlb1_find_pa(tmppa, &e)) != -1) { - if (wimge != (e.mas2 & (MAS2_WIMGE_MASK & ~_TLB_ENTRY_SHARED))) - break; - sz -= MIN(sz, e.size); - tmppa = e.phys + e.size; - } - if (sz != 0) - break; - return ((void *)va); - } - } - - size = roundup(size, PAGE_SIZE); - -#ifdef __powerpc64__ - KASSERT(pa < VM_MAPDEV_PA_MAX, - ("Unsupported physical address! %lx", pa)); - va = VM_MAPDEV_BASE + pa; - retva = va; -#ifdef POW2_MAPPINGS - /* - * Align the mapping to a power of 2 size, taking into account that we - * may need to increase the size multiple times to satisfy the size and - * alignment requirements. - * - * This works in the general case because it's very rare (near never?) - * to have different access properties (WIMG) within a single - * power-of-two region. If a design does call for that, POW2_MAPPINGS - * can be undefined, and exact mappings will be used instead. - */ - sz = size; - size = roundup2(size, 1 << ilog2(size)); - while (rounddown2(va, size) + size < va + sz) - size <<= 1; - va = rounddown2(va, size); - pa = rounddown2(pa, size); -#endif -#else - /* - * The device mapping area is between VM_MAXUSER_ADDRESS and - * VM_MIN_KERNEL_ADDRESS. This gives 1GB of device addressing. - */ -#ifdef SPARSE_MAPDEV - /* - * With a sparse mapdev, align to the largest starting region. This - * could feasibly be optimized for a 'best-fit' alignment, but that - * calculation could be very costly. - * Align to the smaller of: - * - first set bit in overlap of (pa & size mask) - * - largest size envelope - * - * It's possible the device mapping may start at a PA that's not larger - * than the size mask, so we need to offset in to maximize the TLB entry - * range and minimize the number of used TLB entries. - */ - do { - tmpva = tlb1_map_base; - sz = ffsl((~((1 << flsl(size-1)) - 1)) & pa); - sz = sz ? min(roundup(sz + 3, 4), flsl(size) - 1) : flsl(size) - 1; - va = roundup(tlb1_map_base, 1 << sz) | (((1 << sz) - 1) & pa); - } while (!atomic_cmpset_int(&tlb1_map_base, tmpva, va + size)); -#endif - va = atomic_fetchadd_int(&tlb1_map_base, size); - retva = va; -#endif - - if (tlb1_mapin_region(va, pa, size, tlb_calc_wimg(pa, ma)) != size) - return (NULL); - - return ((void *)retva); -} - -/* - * 'Unmap' a range mapped by mmu_booke_mapdev(). - */ -static void -mmu_booke_unmapdev(vm_offset_t va, vm_size_t size) -{ -#ifdef SUPPORTS_SHRINKING_TLB1 - vm_offset_t base, offset; - - /* - * Unmap only if this is inside kernel virtual space. - */ - if ((va >= VM_MIN_KERNEL_ADDRESS) && (va <= VM_MAX_KERNEL_ADDRESS)) { - base = trunc_page(va); - offset = va & PAGE_MASK; - size = roundup(offset + size, PAGE_SIZE); - mmu_booke_qremove(base, atop(size)); - kva_free(base, size); - } -#endif -} - -/* - * mmu_booke_object_init_pt preloads the ptes for a given object into the - * specified pmap. This eliminates the blast of soft faults on process startup - * and immediately after an mmap. - */ -static void -mmu_booke_object_init_pt(pmap_t pmap, vm_offset_t addr, - vm_object_t object, vm_pindex_t pindex, vm_size_t size) -{ - - VM_OBJECT_ASSERT_WLOCKED(object); - KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG, - ("mmu_booke_object_init_pt: non-device object")); -} - -/* - * Perform the pmap work for mincore. - */ -static int -mmu_booke_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *pap) -{ - - /* XXX: this should be implemented at some point */ - return (0); -} - -static int -mmu_booke_change_attr(vm_offset_t addr, vm_size_t sz, vm_memattr_t mode) -{ - vm_offset_t va; - pte_t *pte; - int i, j; - tlb_entry_t e; - - addr = trunc_page(addr); - - /* Only allow changes to mapped kernel addresses. This includes: - * - KVA - * - DMAP (powerpc64) - * - Device mappings - */ - if (addr <= VM_MAXUSER_ADDRESS || -#ifdef __powerpc64__ - (addr >= tlb1_map_base && addr < DMAP_BASE_ADDRESS) || - (addr > DMAP_MAX_ADDRESS && addr < VM_MIN_KERNEL_ADDRESS) || -#else - (addr >= tlb1_map_base && addr < VM_MIN_KERNEL_ADDRESS) || -#endif - (addr > VM_MAX_KERNEL_ADDRESS)) - return (EINVAL); - - /* Check TLB1 mappings */ - for (i = 0; i < TLB1_ENTRIES; i++) { - tlb1_read_entry(&e, i); - if (!(e.mas1 & MAS1_VALID)) - continue; - if (addr >= e.virt && addr < e.virt + e.size) - break; - } - if (i < TLB1_ENTRIES) { - /* Only allow full mappings to be modified for now. */ - /* Validate the range. */ - for (j = i, va = addr; va < addr + sz; va += e.size, j++) { - tlb1_read_entry(&e, j); - if (va != e.virt || (sz - (va - addr) < e.size)) - return (EINVAL); - } - for (va = addr; va < addr + sz; va += e.size, i++) { - tlb1_read_entry(&e, i); - e.mas2 &= ~MAS2_WIMGE_MASK; - e.mas2 |= tlb_calc_wimg(e.phys, mode); - - /* - * Write it out to the TLB. Should really re-sync with other - * cores. - */ - tlb1_write_entry(&e, i); - } - return (0); - } - - /* Not in TLB1, try through pmap */ - /* First validate the range. */ - for (va = addr; va < addr + sz; va += PAGE_SIZE) { - pte = pte_find(kernel_pmap, va); - if (pte == NULL || !PTE_ISVALID(pte)) - return (EINVAL); - } - - mtx_lock_spin(&tlbivax_mutex); - tlb_miss_lock(); - for (va = addr; va < addr + sz; va += PAGE_SIZE) { - pte = pte_find(kernel_pmap, va); - *pte &= ~(PTE_MAS2_MASK << PTE_MAS2_SHIFT); - *pte |= tlb_calc_wimg(PTE_PA(pte), mode) << PTE_MAS2_SHIFT; - tlb0_flush_entry(va); - } - tlb_miss_unlock(); - mtx_unlock_spin(&tlbivax_mutex); - - return (0); -} - -static void -mmu_booke_page_array_startup(long pages) -{ - vm_page_array_size = pages; -} - -/**************************************************************************/ -/* TID handling */ -/**************************************************************************/ - -/* - * Allocate a TID. If necessary, steal one from someone else. - * The new TID is flushed from the TLB before returning. - */ -static tlbtid_t -tid_alloc(pmap_t pmap) -{ - tlbtid_t tid; - int thiscpu; - - KASSERT((pmap != kernel_pmap), ("tid_alloc: kernel pmap")); - - CTR2(KTR_PMAP, "%s: s (pmap = %p)", __func__, pmap); - - thiscpu = PCPU_GET(cpuid); - - tid = PCPU_GET(booke.tid_next); - if (tid > TID_MAX) - tid = TID_MIN; - PCPU_SET(booke.tid_next, tid + 1); - - /* If we are stealing TID then clear the relevant pmap's field */ - if (tidbusy[thiscpu][tid] != NULL) { - CTR2(KTR_PMAP, "%s: warning: stealing tid %d", __func__, tid); - - tidbusy[thiscpu][tid]->pm_tid[thiscpu] = TID_NONE; - - /* Flush all entries from TLB0 matching this TID. */ - tid_flush(tid); - } - - tidbusy[thiscpu][tid] = pmap; - pmap->pm_tid[thiscpu] = tid; - __asm __volatile("msync; isync"); - - CTR3(KTR_PMAP, "%s: e (%02d next = %02d)", __func__, tid, - PCPU_GET(booke.tid_next)); - - return (tid); -} - -/**************************************************************************/ -/* TLB0 handling */ -/**************************************************************************/ - -/* Convert TLB0 va and way number to tlb0[] table index. */ -static inline unsigned int -tlb0_tableidx(vm_offset_t va, unsigned int way) -{ - unsigned int idx; - - idx = (way * TLB0_ENTRIES_PER_WAY); - idx += (va & MAS2_TLB0_ENTRY_IDX_MASK) >> MAS2_TLB0_ENTRY_IDX_SHIFT; - return (idx); -} - -/* - * Invalidate TLB0 entry. - */ -static inline void -tlb0_flush_entry(vm_offset_t va) -{ - - CTR2(KTR_PMAP, "%s: s va=0x%08x", __func__, va); - - mtx_assert(&tlbivax_mutex, MA_OWNED); - - __asm __volatile("tlbivax 0, %0" :: "r"(va & MAS2_EPN_MASK)); - __asm __volatile("isync; msync"); - __asm __volatile("tlbsync; msync"); - - CTR1(KTR_PMAP, "%s: e", __func__); -} - -/**************************************************************************/ -/* TLB1 handling */ -/**************************************************************************/ - -/* - * TLB1 mapping notes: - * - * TLB1[0] Kernel text and data. - * TLB1[1-15] Additional kernel text and data mappings (if required), PCI - * windows, other devices mappings. - */ - - /* - * Read an entry from given TLB1 slot. - */ -void -tlb1_read_entry(tlb_entry_t *entry, unsigned int slot) -{ - register_t msr; - uint32_t mas0; - - KASSERT((entry != NULL), ("%s(): Entry is NULL!", __func__)); - - msr = mfmsr(); - __asm __volatile("wrteei 0"); - - mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(slot); - mtspr(SPR_MAS0, mas0); - __asm __volatile("isync; tlbre"); - - entry->mas1 = mfspr(SPR_MAS1); - entry->mas2 = mfspr(SPR_MAS2); - entry->mas3 = mfspr(SPR_MAS3); - - switch ((mfpvr() >> 16) & 0xFFFF) { - case FSL_E500v2: - case FSL_E500mc: - case FSL_E5500: - case FSL_E6500: - entry->mas7 = mfspr(SPR_MAS7); - break; - default: - entry->mas7 = 0; - break; - } - __asm __volatile("wrtee %0" :: "r"(msr)); - - entry->virt = entry->mas2 & MAS2_EPN_MASK; - entry->phys = ((vm_paddr_t)(entry->mas7 & MAS7_RPN) << 32) | - (entry->mas3 & MAS3_RPN); - entry->size = - tsize2size((entry->mas1 & MAS1_TSIZE_MASK) >> MAS1_TSIZE_SHIFT); -} - -struct tlbwrite_args { - tlb_entry_t *e; - unsigned int idx; -}; - -static uint32_t -tlb1_find_free(void) -{ - tlb_entry_t e; - int i; - - for (i = 0; i < TLB1_ENTRIES; i++) { - tlb1_read_entry(&e, i); - if ((e.mas1 & MAS1_VALID) == 0) - return (i); - } - return (-1); -} - -static void -tlb1_purge_va_range(vm_offset_t va, vm_size_t size) -{ - tlb_entry_t e; - int i; - - for (i = 0; i < TLB1_ENTRIES; i++) { - tlb1_read_entry(&e, i); - if ((e.mas1 & MAS1_VALID) == 0) - continue; - if ((e.mas2 & MAS2_EPN_MASK) >= va && - (e.mas2 & MAS2_EPN_MASK) < va + size) { - mtspr(SPR_MAS1, e.mas1 & ~MAS1_VALID); - __asm __volatile("isync; tlbwe; isync; msync"); - } - } -} - -static void -tlb1_write_entry_int(void *arg) -{ - struct tlbwrite_args *args = arg; - uint32_t idx, mas0; - - idx = args->idx; - if (idx == -1) { - tlb1_purge_va_range(args->e->virt, args->e->size); - idx = tlb1_find_free(); - if (idx == -1) - panic("No free TLB1 entries!\n"); - } - /* Select entry */ - mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(idx); - - mtspr(SPR_MAS0, mas0); - mtspr(SPR_MAS1, args->e->mas1); - mtspr(SPR_MAS2, args->e->mas2); - mtspr(SPR_MAS3, args->e->mas3); - switch ((mfpvr() >> 16) & 0xFFFF) { - case FSL_E500mc: - case FSL_E5500: - case FSL_E6500: - mtspr(SPR_MAS8, 0); - /* FALLTHROUGH */ - case FSL_E500v2: - mtspr(SPR_MAS7, args->e->mas7); - break; - default: - break; - } - - __asm __volatile("isync; tlbwe; isync; msync"); - -} - -static void -tlb1_write_entry_sync(void *arg) -{ - /* Empty synchronization point for smp_rendezvous(). */ -} - -/* - * Write given entry to TLB1 hardware. - */ -static void -tlb1_write_entry(tlb_entry_t *e, unsigned int idx) -{ - struct tlbwrite_args args; - - args.e = e; - args.idx = idx; - -#ifdef SMP - if ((e->mas2 & _TLB_ENTRY_SHARED) && smp_started) { - mb(); - smp_rendezvous(tlb1_write_entry_sync, - tlb1_write_entry_int, - tlb1_write_entry_sync, &args); - } else -#endif - { - register_t msr; - - msr = mfmsr(); - __asm __volatile("wrteei 0"); - tlb1_write_entry_int(&args); - __asm __volatile("wrtee %0" :: "r"(msr)); - } -} - -/* - * Convert TLB TSIZE value to mapped region size. - */ -static vm_size_t -tsize2size(unsigned int tsize) -{ - - /* - * size = 4^tsize KB - * size = 4^tsize * 2^10 = 2^(2 * tsize - 10) - */ - - return ((1 << (2 * tsize)) * 1024); -} - -/* - * Convert region size (must be power of 4) to TLB TSIZE value. - */ -static unsigned int -size2tsize(vm_size_t size) -{ - - return (ilog2(size) / 2 - 5); -} - -/* - * Register permanent kernel mapping in TLB1. - * - * Entries are created starting from index 0 (current free entry is - * kept in tlb1_idx) and are not supposed to be invalidated. - */ -int -tlb1_set_entry(vm_offset_t va, vm_paddr_t pa, vm_size_t size, - uint32_t flags) -{ - tlb_entry_t e; - uint32_t ts, tid; - int tsize, index; - - /* First try to update an existing entry. */ - for (index = 0; index < TLB1_ENTRIES; index++) { - tlb1_read_entry(&e, index); - /* Check if we're just updating the flags, and update them. */ - if (e.phys == pa && e.virt == va && e.size == size) { - e.mas2 = (va & MAS2_EPN_MASK) | flags; - tlb1_write_entry(&e, index); - return (0); - } - } - - /* Convert size to TSIZE */ - tsize = size2tsize(size); - - tid = (TID_KERNEL << MAS1_TID_SHIFT) & MAS1_TID_MASK; - /* XXX TS is hard coded to 0 for now as we only use single address space */ - ts = (0 << MAS1_TS_SHIFT) & MAS1_TS_MASK; - - e.phys = pa; - e.virt = va; - e.size = size; - e.mas1 = MAS1_VALID | MAS1_IPROT | ts | tid; - e.mas1 |= ((tsize << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK); - e.mas2 = (va & MAS2_EPN_MASK) | flags; - - /* Set supervisor RWX permission bits */ - e.mas3 = (pa & MAS3_RPN) | MAS3_SR | MAS3_SW | MAS3_SX; - e.mas7 = (pa >> 32) & MAS7_RPN; - - tlb1_write_entry(&e, -1); - - return (0); -} - -/* - * Map in contiguous RAM region into the TLB1. - */ -static vm_size_t -tlb1_mapin_region(vm_offset_t va, vm_paddr_t pa, vm_size_t size, int wimge) -{ - vm_offset_t base; - vm_size_t mapped, sz, ssize; - - mapped = 0; - base = va; - ssize = size; - - while (size > 0) { - sz = 1UL << (ilog2(size) & ~1); - /* Align size to PA */ - if (pa % sz != 0) { - do { - sz >>= 2; - } while (pa % sz != 0); - } - /* Now align from there to VA */ - if (va % sz != 0) { - do { - sz >>= 2; - } while (va % sz != 0); - } -#ifdef __powerpc64__ - /* - * Clamp TLB1 entries to 4G. - * - * While the e6500 supports up to 1TB mappings, the e5500 - * only supports up to 4G mappings. (0b1011) - * - * If any e6500 machines capable of supporting a very - * large amount of memory appear in the future, we can - * revisit this. - * - * For now, though, since we have plenty of space in TLB1, - * always avoid creating entries larger than 4GB. - */ - sz = MIN(sz, 1UL << 32); -#endif - if (bootverbose) - printf("Wiring VA=%p to PA=%jx (size=%lx)\n", - (void *)va, (uintmax_t)pa, (long)sz); - if (tlb1_set_entry(va, pa, sz, - _TLB_ENTRY_SHARED | wimge) < 0) - return (mapped); - size -= sz; - pa += sz; - va += sz; - } - - mapped = (va - base); - if (bootverbose) - printf("mapped size 0x%"PRIxPTR" (wasted space 0x%"PRIxPTR")\n", - mapped, mapped - ssize); - - return (mapped); -} - -/* - * TLB1 initialization routine, to be called after the very first - * assembler level setup done in locore.S. - */ -void -tlb1_init() -{ - vm_offset_t mas2; - uint32_t mas0, mas1, mas3, mas7; - uint32_t tsz; - - tlb1_get_tlbconf(); - - mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(0); - mtspr(SPR_MAS0, mas0); - __asm __volatile("isync; tlbre"); - - mas1 = mfspr(SPR_MAS1); - mas2 = mfspr(SPR_MAS2); - mas3 = mfspr(SPR_MAS3); - mas7 = mfspr(SPR_MAS7); - - kernload = ((vm_paddr_t)(mas7 & MAS7_RPN) << 32) | - (mas3 & MAS3_RPN); - - tsz = (mas1 & MAS1_TSIZE_MASK) >> MAS1_TSIZE_SHIFT; - kernsize += (tsz > 0) ? tsize2size(tsz) : 0; - kernstart = trunc_page(mas2); - - /* Setup TLB miss defaults */ - set_mas4_defaults(); -} - -/* - * pmap_early_io_unmap() should be used in short conjunction with - * pmap_early_io_map(), as in the following snippet: - * - * x = pmap_early_io_map(...); - * - * pmap_early_io_unmap(x, size); - * - * And avoiding more allocations between. - */ -void -pmap_early_io_unmap(vm_offset_t va, vm_size_t size) -{ - int i; - tlb_entry_t e; - vm_size_t isize; - - size = roundup(size, PAGE_SIZE); - isize = size; - for (i = 0; i < TLB1_ENTRIES && size > 0; i++) { - tlb1_read_entry(&e, i); - if (!(e.mas1 & MAS1_VALID)) - continue; - if (va <= e.virt && (va + isize) >= (e.virt + e.size)) { - size -= e.size; - e.mas1 &= ~MAS1_VALID; - tlb1_write_entry(&e, i); - } - } - if (tlb1_map_base == va + isize) - tlb1_map_base -= isize; -} - -vm_offset_t -pmap_early_io_map(vm_paddr_t pa, vm_size_t size) -{ - vm_paddr_t pa_base; - vm_offset_t va, sz; - int i; - tlb_entry_t e; - - KASSERT(!pmap_bootstrapped, ("Do not use after PMAP is up!")); - - for (i = 0; i < TLB1_ENTRIES; i++) { - tlb1_read_entry(&e, i); - if (!(e.mas1 & MAS1_VALID)) - continue; - if (pa >= e.phys && (pa + size) <= - (e.phys + e.size)) - return (e.virt + (pa - e.phys)); - } - - pa_base = rounddown(pa, PAGE_SIZE); - size = roundup(size + (pa - pa_base), PAGE_SIZE); - tlb1_map_base = roundup2(tlb1_map_base, 1 << (ilog2(size) & ~1)); - va = tlb1_map_base + (pa - pa_base); - - do { - sz = 1 << (ilog2(size) & ~1); - tlb1_set_entry(tlb1_map_base, pa_base, sz, - _TLB_ENTRY_SHARED | _TLB_ENTRY_IO); - size -= sz; - pa_base += sz; - tlb1_map_base += sz; - } while (size > 0); - - return (va); -} - -void -pmap_track_page(pmap_t pmap, vm_offset_t va) -{ - vm_paddr_t pa; - vm_page_t page; - struct pv_entry *pve; - - va = trunc_page(va); - pa = pmap_kextract(va); - page = PHYS_TO_VM_PAGE(pa); - - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pmap); - - TAILQ_FOREACH(pve, &page->md.pv_list, pv_link) { - if ((pmap == pve->pv_pmap) && (va == pve->pv_va)) { - goto out; - } - } - page->md.pv_tracked = true; - pv_insert(pmap, va, page); -out: - PMAP_UNLOCK(pmap); - rw_wunlock(&pvh_global_lock); -} - -/* - * Setup MAS4 defaults. - * These values are loaded to MAS0-2 on a TLB miss. - */ -static void -set_mas4_defaults(void) -{ - uint32_t mas4; - - /* Defaults: TLB0, PID0, TSIZED=4K */ - mas4 = MAS4_TLBSELD0; - mas4 |= (TLB_SIZE_4K << MAS4_TSIZED_SHIFT) & MAS4_TSIZED_MASK; -#ifdef SMP - mas4 |= MAS4_MD; -#endif - mtspr(SPR_MAS4, mas4); - __asm __volatile("isync"); -} - -/* - * Return 0 if the physical IO range is encompassed by one of the - * the TLB1 entries, otherwise return related error code. - */ -static int -tlb1_iomapped(int i, vm_paddr_t pa, vm_size_t size, vm_offset_t *va) -{ - uint32_t prot; - vm_paddr_t pa_start; - vm_paddr_t pa_end; - unsigned int entry_tsize; - vm_size_t entry_size; - tlb_entry_t e; - - *va = (vm_offset_t)NULL; - - tlb1_read_entry(&e, i); - /* Skip invalid entries */ - if (!(e.mas1 & MAS1_VALID)) - return (EINVAL); - - /* - * The entry must be cache-inhibited, guarded, and r/w - * so it can function as an i/o page - */ - prot = e.mas2 & (MAS2_I | MAS2_G); - if (prot != (MAS2_I | MAS2_G)) - return (EPERM); - - prot = e.mas3 & (MAS3_SR | MAS3_SW); - if (prot != (MAS3_SR | MAS3_SW)) - return (EPERM); - - /* The address should be within the entry range. */ - entry_tsize = (e.mas1 & MAS1_TSIZE_MASK) >> MAS1_TSIZE_SHIFT; - KASSERT((entry_tsize), ("tlb1_iomapped: invalid entry tsize")); - - entry_size = tsize2size(entry_tsize); - pa_start = (((vm_paddr_t)e.mas7 & MAS7_RPN) << 32) | - (e.mas3 & MAS3_RPN); - pa_end = pa_start + entry_size; - - if ((pa < pa_start) || ((pa + size) > pa_end)) - return (ERANGE); - - /* Return virtual address of this mapping. */ - *va = (e.mas2 & MAS2_EPN_MASK) + (pa - pa_start); - return (0); -} - -#ifdef DDB -/* Print out contents of the MAS registers for each TLB0 entry */ -static void -#ifdef __powerpc64__ -tlb_print_entry(int i, uint32_t mas1, uint64_t mas2, uint32_t mas3, -#else -tlb_print_entry(int i, uint32_t mas1, uint32_t mas2, uint32_t mas3, -#endif - uint32_t mas7) -{ - int as; - char desc[3]; - tlbtid_t tid; - vm_size_t size; - unsigned int tsize; - - desc[2] = '\0'; - if (mas1 & MAS1_VALID) - desc[0] = 'V'; - else - desc[0] = ' '; - - if (mas1 & MAS1_IPROT) - desc[1] = 'P'; - else - desc[1] = ' '; - - as = (mas1 & MAS1_TS_MASK) ? 1 : 0; - tid = MAS1_GETTID(mas1); - - tsize = (mas1 & MAS1_TSIZE_MASK) >> MAS1_TSIZE_SHIFT; - size = 0; - if (tsize) - size = tsize2size(tsize); - - printf("%3d: (%s) [AS=%d] " - "sz = 0x%jx tsz = %d tid = %d mas1 = 0x%08x " - "mas2(va) = 0x%"PRI0ptrX" mas3(pa) = 0x%08x mas7 = 0x%08x\n", - i, desc, as, (uintmax_t)size, tsize, tid, mas1, mas2, mas3, mas7); -} - -DB_SHOW_COMMAND(tlb0, tlb0_print_tlbentries) -{ - uint32_t mas0, mas1, mas3, mas7; -#ifdef __powerpc64__ - uint64_t mas2; -#else - uint32_t mas2; -#endif - int entryidx, way, idx; - - printf("TLB0 entries:\n"); - for (way = 0; way < TLB0_WAYS; way ++) - for (entryidx = 0; entryidx < TLB0_ENTRIES_PER_WAY; entryidx++) { - mas0 = MAS0_TLBSEL(0) | MAS0_ESEL(way); - mtspr(SPR_MAS0, mas0); - - mas2 = entryidx << MAS2_TLB0_ENTRY_IDX_SHIFT; - mtspr(SPR_MAS2, mas2); - - __asm __volatile("isync; tlbre"); - - mas1 = mfspr(SPR_MAS1); - mas2 = mfspr(SPR_MAS2); - mas3 = mfspr(SPR_MAS3); - mas7 = mfspr(SPR_MAS7); - - idx = tlb0_tableidx(mas2, way); - tlb_print_entry(idx, mas1, mas2, mas3, mas7); - } -} - -/* - * Print out contents of the MAS registers for each TLB1 entry - */ -DB_SHOW_COMMAND(tlb1, tlb1_print_tlbentries) -{ - uint32_t mas0, mas1, mas3, mas7; -#ifdef __powerpc64__ - uint64_t mas2; -#else - uint32_t mas2; -#endif - int i; - - printf("TLB1 entries:\n"); - for (i = 0; i < TLB1_ENTRIES; i++) { - mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(i); - mtspr(SPR_MAS0, mas0); - - __asm __volatile("isync; tlbre"); - - mas1 = mfspr(SPR_MAS1); - mas2 = mfspr(SPR_MAS2); - mas3 = mfspr(SPR_MAS3); - mas7 = mfspr(SPR_MAS7); - - tlb_print_entry(i, mas1, mas2, mas3, mas7); - } -} -#endif diff --git a/sys/powerpc/booke/pmap_32.c b/sys/powerpc/booke/pmap_32.c deleted file mode 100644 index 5fa0f626917..00000000000 --- a/sys/powerpc/booke/pmap_32.c +++ /dev/null @@ -1,992 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2020 Justin Hibbits - * Copyright (C) 2007-2009 Semihalf, Rafal Jaworowski - * Copyright (C) 2006 Semihalf, Marian Balakowicz - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Some hw specific parts of this pmap were derived or influenced - * by NetBSD's ibm4xx pmap module. More generic code is shared with - * a few other pmap modules from the FreeBSD tree. - */ - - /* - * VM layout notes: - * - * Kernel and user threads run within one common virtual address space - * defined by AS=0. - * - * 32-bit pmap: - * Virtual address space layout: - * ----------------------------- - * 0x0000_0000 - 0x7fff_ffff : user process - * 0x8000_0000 - 0xbfff_ffff : pmap_mapdev()-ed area (PCI/PCIE etc.) - * 0xc000_0000 - 0xffff_efff : KVA - */ - -#include -#include "opt_ddb.h" -#include "opt_kstack_pages.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include - -#define PRI0ptrX "08x" - -/* Reserved KVA space and mutex for mmu_booke_zero_page. */ -static vm_offset_t zero_page_va; -static struct mtx zero_page_mutex; - -/* Reserved KVA space and mutex for mmu_booke_copy_page. */ -static vm_offset_t copy_page_src_va; -static vm_offset_t copy_page_dst_va; -static struct mtx copy_page_mutex; - -static vm_offset_t kernel_ptbl_root; -static unsigned int kernel_ptbls; /* Number of KVA ptbls. */ - -/**************************************************************************/ -/* PMAP */ -/**************************************************************************/ - -#define VM_MAPDEV_BASE ((vm_offset_t)VM_MAXUSER_ADDRESS + PAGE_SIZE) - -static void tid_flush(tlbtid_t tid); -static unsigned long ilog2(unsigned long); - -/**************************************************************************/ -/* Page table management */ -/**************************************************************************/ - -#define PMAP_ROOT_SIZE (sizeof(pte_t**) * PDIR_NENTRIES) -static void ptbl_init(void); -static struct ptbl_buf *ptbl_buf_alloc(void); -static void ptbl_buf_free(struct ptbl_buf *); -static void ptbl_free_pmap_ptbl(pmap_t, pte_t *); - -static pte_t *ptbl_alloc(pmap_t, unsigned int, boolean_t); -static void ptbl_free(pmap_t, unsigned int); -static void ptbl_hold(pmap_t, unsigned int); -static int ptbl_unhold(pmap_t, unsigned int); - -static vm_paddr_t pte_vatopa(pmap_t, vm_offset_t); -static int pte_enter(pmap_t, vm_page_t, vm_offset_t, uint32_t, boolean_t); -static int pte_remove(pmap_t, vm_offset_t, uint8_t); -static pte_t *pte_find(pmap_t, vm_offset_t); - -struct ptbl_buf { - TAILQ_ENTRY(ptbl_buf) link; /* list link */ - vm_offset_t kva; /* va of mapping */ -}; - -/* Number of kva ptbl buffers, each covering one ptbl (PTBL_PAGES). */ -#define PTBL_BUFS (128 * 16) - -/* ptbl free list and a lock used for access synchronization. */ -static TAILQ_HEAD(, ptbl_buf) ptbl_buf_freelist; -static struct mtx ptbl_buf_freelist_lock; - -/* Base address of kva space allocated fot ptbl bufs. */ -static vm_offset_t ptbl_buf_pool_vabase; - -/* Pointer to ptbl_buf structures. */ -static struct ptbl_buf *ptbl_bufs; - -/**************************************************************************/ -/* Page table related */ -/**************************************************************************/ - -/* Initialize pool of kva ptbl buffers. */ -static void -ptbl_init(void) -{ - int i; - - CTR3(KTR_PMAP, "%s: s (ptbl_bufs = 0x%08x size 0x%08x)", __func__, - (uint32_t)ptbl_bufs, sizeof(struct ptbl_buf) * PTBL_BUFS); - CTR3(KTR_PMAP, "%s: s (ptbl_buf_pool_vabase = 0x%08x size = 0x%08x)", - __func__, ptbl_buf_pool_vabase, PTBL_BUFS * PTBL_PAGES * PAGE_SIZE); - - mtx_init(&ptbl_buf_freelist_lock, "ptbl bufs lock", NULL, MTX_DEF); - TAILQ_INIT(&ptbl_buf_freelist); - - for (i = 0; i < PTBL_BUFS; i++) { - ptbl_bufs[i].kva = - ptbl_buf_pool_vabase + i * PTBL_PAGES * PAGE_SIZE; - TAILQ_INSERT_TAIL(&ptbl_buf_freelist, &ptbl_bufs[i], link); - } -} - -/* Get a ptbl_buf from the freelist. */ -static struct ptbl_buf * -ptbl_buf_alloc(void) -{ - struct ptbl_buf *buf; - - mtx_lock(&ptbl_buf_freelist_lock); - buf = TAILQ_FIRST(&ptbl_buf_freelist); - if (buf != NULL) - TAILQ_REMOVE(&ptbl_buf_freelist, buf, link); - mtx_unlock(&ptbl_buf_freelist_lock); - - CTR2(KTR_PMAP, "%s: buf = %p", __func__, buf); - - return (buf); -} - -/* Return ptbl buff to free pool. */ -static void -ptbl_buf_free(struct ptbl_buf *buf) -{ - - CTR2(KTR_PMAP, "%s: buf = %p", __func__, buf); - - mtx_lock(&ptbl_buf_freelist_lock); - TAILQ_INSERT_TAIL(&ptbl_buf_freelist, buf, link); - mtx_unlock(&ptbl_buf_freelist_lock); -} - -/* - * Search the list of allocated ptbl bufs and find on list of allocated ptbls - */ -static void -ptbl_free_pmap_ptbl(pmap_t pmap, pte_t *ptbl) -{ - struct ptbl_buf *pbuf; - - CTR2(KTR_PMAP, "%s: ptbl = %p", __func__, ptbl); - - PMAP_LOCK_ASSERT(pmap, MA_OWNED); - - TAILQ_FOREACH(pbuf, &pmap->pm_ptbl_list, link) - if (pbuf->kva == (vm_offset_t)ptbl) { - /* Remove from pmap ptbl buf list. */ - TAILQ_REMOVE(&pmap->pm_ptbl_list, pbuf, link); - - /* Free corresponding ptbl buf. */ - ptbl_buf_free(pbuf); - break; - } -} - -/* Allocate page table. */ -static pte_t * -ptbl_alloc(pmap_t pmap, unsigned int pdir_idx, boolean_t nosleep) -{ - vm_page_t mtbl[PTBL_PAGES]; - vm_page_t m; - struct ptbl_buf *pbuf; - unsigned int pidx; - pte_t *ptbl; - int i, j; - - CTR4(KTR_PMAP, "%s: pmap = %p su = %d pdir_idx = %d", __func__, pmap, - (pmap == kernel_pmap), pdir_idx); - - KASSERT((pdir_idx <= (VM_MAXUSER_ADDRESS / PDIR_SIZE)), - ("ptbl_alloc: invalid pdir_idx")); - KASSERT((pmap->pm_pdir[pdir_idx] == NULL), - ("pte_alloc: valid ptbl entry exists!")); - - pbuf = ptbl_buf_alloc(); - if (pbuf == NULL) - panic("pte_alloc: couldn't alloc kernel virtual memory"); - - ptbl = (pte_t *)pbuf->kva; - - CTR2(KTR_PMAP, "%s: ptbl kva = %p", __func__, ptbl); - - for (i = 0; i < PTBL_PAGES; i++) { - pidx = (PTBL_PAGES * pdir_idx) + i; - while ((m = vm_page_alloc_noobj(VM_ALLOC_WIRED)) == NULL) { - if (nosleep) { - ptbl_free_pmap_ptbl(pmap, ptbl); - for (j = 0; j < i; j++) - vm_page_free(mtbl[j]); - vm_wire_sub(i); - return (NULL); - } - PMAP_UNLOCK(pmap); - rw_wunlock(&pvh_global_lock); - vm_wait(NULL); - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pmap); - } - m->pindex = pidx; - mtbl[i] = m; - } - - /* Map allocated pages into kernel_pmap. */ - mmu_booke_qenter((vm_offset_t)ptbl, mtbl, PTBL_PAGES); - - /* Zero whole ptbl. */ - bzero((caddr_t)ptbl, PTBL_PAGES * PAGE_SIZE); - - /* Add pbuf to the pmap ptbl bufs list. */ - TAILQ_INSERT_TAIL(&pmap->pm_ptbl_list, pbuf, link); - - return (ptbl); -} - -/* Free ptbl pages and invalidate pdir entry. */ -static void -ptbl_free(pmap_t pmap, unsigned int pdir_idx) -{ - pte_t *ptbl; - vm_paddr_t pa; - vm_offset_t va; - vm_page_t m; - int i; - - CTR4(KTR_PMAP, "%s: pmap = %p su = %d pdir_idx = %d", __func__, pmap, - (pmap == kernel_pmap), pdir_idx); - - KASSERT((pdir_idx <= (VM_MAXUSER_ADDRESS / PDIR_SIZE)), - ("ptbl_free: invalid pdir_idx")); - - ptbl = pmap->pm_pdir[pdir_idx]; - - CTR2(KTR_PMAP, "%s: ptbl = %p", __func__, ptbl); - - KASSERT((ptbl != NULL), ("ptbl_free: null ptbl")); - - /* - * Invalidate the pdir entry as soon as possible, so that other CPUs - * don't attempt to look up the page tables we are releasing. - */ - mtx_lock_spin(&tlbivax_mutex); - tlb_miss_lock(); - - pmap->pm_pdir[pdir_idx] = NULL; - - tlb_miss_unlock(); - mtx_unlock_spin(&tlbivax_mutex); - - for (i = 0; i < PTBL_PAGES; i++) { - va = ((vm_offset_t)ptbl + (i * PAGE_SIZE)); - pa = pte_vatopa(kernel_pmap, va); - m = PHYS_TO_VM_PAGE(pa); - vm_page_free_zero(m); - vm_wire_sub(1); - mmu_booke_kremove(va); - } - - ptbl_free_pmap_ptbl(pmap, ptbl); -} - -/* - * Decrement ptbl pages hold count and attempt to free ptbl pages. - * Called when removing pte entry from ptbl. - * - * Return 1 if ptbl pages were freed. - */ -static int -ptbl_unhold(pmap_t pmap, unsigned int pdir_idx) -{ - pte_t *ptbl; - vm_paddr_t pa; - vm_page_t m; - int i; - - CTR4(KTR_PMAP, "%s: pmap = %p su = %d pdir_idx = %d", __func__, pmap, - (pmap == kernel_pmap), pdir_idx); - - KASSERT((pdir_idx <= (VM_MAXUSER_ADDRESS / PDIR_SIZE)), - ("ptbl_unhold: invalid pdir_idx")); - KASSERT((pmap != kernel_pmap), - ("ptbl_unhold: unholding kernel ptbl!")); - - ptbl = pmap->pm_pdir[pdir_idx]; - - //debugf("ptbl_unhold: ptbl = 0x%08x\n", (u_int32_t)ptbl); - KASSERT(((vm_offset_t)ptbl >= VM_MIN_KERNEL_ADDRESS), - ("ptbl_unhold: non kva ptbl")); - - /* decrement hold count */ - for (i = 0; i < PTBL_PAGES; i++) { - pa = pte_vatopa(kernel_pmap, - (vm_offset_t)ptbl + (i * PAGE_SIZE)); - m = PHYS_TO_VM_PAGE(pa); - m->ref_count--; - } - - /* - * Free ptbl pages if there are no pte etries in this ptbl. - * ref_count has the same value for all ptbl pages, so check the last - * page. - */ - if (m->ref_count == 0) { - ptbl_free(pmap, pdir_idx); - - //debugf("ptbl_unhold: e (freed ptbl)\n"); - return (1); - } - - return (0); -} - -/* - * Increment hold count for ptbl pages. This routine is used when a new pte - * entry is being inserted into the ptbl. - */ -static void -ptbl_hold(pmap_t pmap, unsigned int pdir_idx) -{ - vm_paddr_t pa; - pte_t *ptbl; - vm_page_t m; - int i; - - CTR3(KTR_PMAP, "%s: pmap = %p pdir_idx = %d", __func__, pmap, - pdir_idx); - - KASSERT((pdir_idx <= (VM_MAXUSER_ADDRESS / PDIR_SIZE)), - ("ptbl_hold: invalid pdir_idx")); - KASSERT((pmap != kernel_pmap), - ("ptbl_hold: holding kernel ptbl!")); - - ptbl = pmap->pm_pdir[pdir_idx]; - - KASSERT((ptbl != NULL), ("ptbl_hold: null ptbl")); - - for (i = 0; i < PTBL_PAGES; i++) { - pa = pte_vatopa(kernel_pmap, - (vm_offset_t)ptbl + (i * PAGE_SIZE)); - m = PHYS_TO_VM_PAGE(pa); - m->ref_count++; - } -} - -/* - * Clean pte entry, try to free page table page if requested. - * - * Return 1 if ptbl pages were freed, otherwise return 0. - */ -static int -pte_remove(pmap_t pmap, vm_offset_t va, uint8_t flags) -{ - unsigned int pdir_idx = PDIR_IDX(va); - unsigned int ptbl_idx = PTBL_IDX(va); - vm_page_t m; - pte_t *ptbl; - pte_t *pte; - - //int su = (pmap == kernel_pmap); - //debugf("pte_remove: s (su = %d pmap = 0x%08x va = 0x%08x flags = %d)\n", - // su, (u_int32_t)pmap, va, flags); - - ptbl = pmap->pm_pdir[pdir_idx]; - KASSERT(ptbl, ("pte_remove: null ptbl")); - - pte = &ptbl[ptbl_idx]; - - if (pte == NULL || !PTE_ISVALID(pte)) - return (0); - - if (PTE_ISWIRED(pte)) - pmap->pm_stats.wired_count--; - - /* Get vm_page_t for mapped pte. */ - m = PHYS_TO_VM_PAGE(PTE_PA(pte)); - - /* Handle managed entry. */ - if (PTE_ISMANAGED(pte)) { - if (PTE_ISMODIFIED(pte)) - vm_page_dirty(m); - - if (PTE_ISREFERENCED(pte)) - vm_page_aflag_set(m, PGA_REFERENCED); - - pv_remove(pmap, va, m); - } else if (pmap == kernel_pmap && m && m->md.pv_tracked) { - /* - * Always pv_insert()/pv_remove() on MPC85XX, in case DPAA is - * used. This is needed by the NCSW support code for fast - * VA<->PA translation. - */ - pv_remove(pmap, va, m); - if (TAILQ_EMPTY(&m->md.pv_list)) - m->md.pv_tracked = false; - } - - mtx_lock_spin(&tlbivax_mutex); - tlb_miss_lock(); - - tlb0_flush_entry(va); - *pte = 0; - - tlb_miss_unlock(); - mtx_unlock_spin(&tlbivax_mutex); - - pmap->pm_stats.resident_count--; - - if (flags & PTBL_UNHOLD) { - //debugf("pte_remove: e (unhold)\n"); - return (ptbl_unhold(pmap, pdir_idx)); - } - - //debugf("pte_remove: e\n"); - return (0); -} - -/* - * Insert PTE for a given page and virtual address. - */ -static int -pte_enter(pmap_t pmap, vm_page_t m, vm_offset_t va, uint32_t flags, - boolean_t nosleep) -{ - unsigned int pdir_idx = PDIR_IDX(va); - unsigned int ptbl_idx = PTBL_IDX(va); - pte_t *ptbl, *pte, pte_tmp; - - CTR4(KTR_PMAP, "%s: su = %d pmap = %p va = %p", __func__, - pmap == kernel_pmap, pmap, va); - - /* Get the page table pointer. */ - ptbl = pmap->pm_pdir[pdir_idx]; - - if (ptbl == NULL) { - /* Allocate page table pages. */ - ptbl = ptbl_alloc(pmap, pdir_idx, nosleep); - if (ptbl == NULL) { - KASSERT(nosleep, ("nosleep and NULL ptbl")); - return (ENOMEM); - } - pmap->pm_pdir[pdir_idx] = ptbl; - pte = &ptbl[ptbl_idx]; - } else { - /* - * Check if there is valid mapping for requested - * va, if there is, remove it. - */ - pte = &pmap->pm_pdir[pdir_idx][ptbl_idx]; - if (PTE_ISVALID(pte)) { - pte_remove(pmap, va, PTBL_HOLD); - } else { - /* - * pte is not used, increment hold count - * for ptbl pages. - */ - if (pmap != kernel_pmap) - ptbl_hold(pmap, pdir_idx); - } - } - - /* - * Insert pv_entry into pv_list for mapped page if part of managed - * memory. - */ - if ((m->oflags & VPO_UNMANAGED) == 0) { - flags |= PTE_MANAGED; - - /* Create and insert pv entry. */ - pv_insert(pmap, va, m); - } - - pmap->pm_stats.resident_count++; - - pte_tmp = PTE_RPN_FROM_PA(VM_PAGE_TO_PHYS(m)); - pte_tmp |= (PTE_VALID | flags | PTE_PS_4KB); /* 4KB pages only */ - - mtx_lock_spin(&tlbivax_mutex); - tlb_miss_lock(); - - tlb0_flush_entry(va); - *pte = pte_tmp; - - tlb_miss_unlock(); - mtx_unlock_spin(&tlbivax_mutex); - return (0); -} - -/* Return the pa for the given pmap/va. */ -static vm_paddr_t -pte_vatopa(pmap_t pmap, vm_offset_t va) -{ - vm_paddr_t pa = 0; - pte_t *pte; - - pte = pte_find(pmap, va); - if ((pte != NULL) && PTE_ISVALID(pte)) - pa = (PTE_PA(pte) | (va & PTE_PA_MASK)); - return (pa); -} - -/* Get a pointer to a PTE in a page table. */ -static pte_t * -pte_find(pmap_t pmap, vm_offset_t va) -{ - unsigned int pdir_idx = PDIR_IDX(va); - unsigned int ptbl_idx = PTBL_IDX(va); - - KASSERT((pmap != NULL), ("pte_find: invalid pmap")); - - if (pmap->pm_pdir[pdir_idx]) - return (&(pmap->pm_pdir[pdir_idx][ptbl_idx])); - - return (NULL); -} - -/* Get a pointer to a PTE in a page table, or the next closest (greater) one. */ -static __inline pte_t * -pte_find_next(pmap_t pmap, vm_offset_t *pva) -{ - vm_offset_t va; - pte_t **pdir; - pte_t *pte; - unsigned long i, j; - - KASSERT((pmap != NULL), ("pte_find: invalid pmap")); - - va = *pva; - i = PDIR_IDX(va); - j = PTBL_IDX(va); - pdir = pmap->pm_pdir; - for (; i < PDIR_NENTRIES; i++, j = 0) { - if (pdir[i] == NULL) - continue; - for (; j < PTBL_NENTRIES; j++) { - pte = &pdir[i][j]; - if (!PTE_ISVALID(pte)) - continue; - *pva = PDIR_SIZE * i + PAGE_SIZE * j; - return (pte); - } - } - return (NULL); -} - -/* Set up kernel page tables. */ -static void -kernel_pte_alloc(vm_offset_t data_end, vm_offset_t addr) -{ - pte_t *pte; - vm_offset_t va; - vm_offset_t pdir_start; - int i; - - kptbl_min = VM_MIN_KERNEL_ADDRESS / PDIR_SIZE; - kernel_pmap->pm_pdir = (pte_t **)kernel_ptbl_root; - - pdir_start = kernel_ptbl_root + PDIR_NENTRIES * sizeof(pte_t); - - /* Initialize kernel pdir */ - for (i = 0; i < kernel_ptbls; i++) { - kernel_pmap->pm_pdir[kptbl_min + i] = - (pte_t *)(pdir_start + (i * PAGE_SIZE * PTBL_PAGES)); - } - - /* - * Fill in PTEs covering kernel code and data. They are not required - * for address translation, as this area is covered by static TLB1 - * entries, but for pte_vatopa() to work correctly with kernel area - * addresses. - */ - for (va = addr; va < data_end; va += PAGE_SIZE) { - pte = &(kernel_pmap->pm_pdir[PDIR_IDX(va)][PTBL_IDX(va)]); - powerpc_sync(); - *pte = PTE_RPN_FROM_PA(kernload + (va - kernstart)); - *pte |= PTE_M | PTE_SR | PTE_SW | PTE_SX | PTE_WIRED | - PTE_VALID | PTE_PS_4KB; - } -} - -static vm_offset_t -mmu_booke_alloc_kernel_pgtables(vm_offset_t data_end) -{ - /* Allocate space for ptbl_bufs. */ - ptbl_bufs = (struct ptbl_buf *)data_end; - data_end += sizeof(struct ptbl_buf) * PTBL_BUFS; - debugf(" ptbl_bufs at 0x%"PRI0ptrX" end = 0x%"PRI0ptrX"\n", - (uintptr_t)ptbl_bufs, data_end); - - data_end = round_page(data_end); - - kernel_ptbl_root = data_end; - data_end += PDIR_NENTRIES * sizeof(pte_t*); - - /* Allocate PTE tables for kernel KVA. */ - kernel_ptbls = howmany(VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS, - PDIR_SIZE); - data_end += kernel_ptbls * PTBL_PAGES * PAGE_SIZE; - debugf(" kernel ptbls: %d\n", kernel_ptbls); - debugf(" kernel pdir at %#jx end = %#jx\n", - (uintmax_t)kernel_ptbl_root, (uintmax_t)data_end); - - return (data_end); -} - -/* - * Initialize a preallocated and zeroed pmap structure, - * such as one in a vmspace structure. - */ -static int -mmu_booke_pinit(pmap_t pmap) -{ - int i; - - CTR4(KTR_PMAP, "%s: pmap = %p, proc %d '%s'", __func__, pmap, - curthread->td_proc->p_pid, curthread->td_proc->p_comm); - - KASSERT((pmap != kernel_pmap), ("pmap_pinit: initializing kernel_pmap")); - - for (i = 0; i < MAXCPU; i++) - pmap->pm_tid[i] = TID_NONE; - CPU_ZERO(&kernel_pmap->pm_active); - bzero(&pmap->pm_stats, sizeof(pmap->pm_stats)); - pmap->pm_pdir = uma_zalloc(ptbl_root_zone, M_WAITOK); - bzero(pmap->pm_pdir, sizeof(pte_t *) * PDIR_NENTRIES); - TAILQ_INIT(&pmap->pm_ptbl_list); - - return (1); -} - -/* - * Release any resources held by the given physical map. - * Called when a pmap initialized by mmu_booke_pinit is being released. - * Should only be called if the map contains no valid mappings. - */ -static void -mmu_booke_release(pmap_t pmap) -{ - - KASSERT(pmap->pm_stats.resident_count == 0, - ("pmap_release: pmap resident count %ld != 0", - pmap->pm_stats.resident_count)); - uma_zfree(ptbl_root_zone, pmap->pm_pdir); -} - -static void -mmu_booke_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz) -{ - pte_t *pte; - vm_paddr_t pa = 0; - int sync_sz, valid; - pmap_t pmap; - vm_page_t m; - vm_offset_t addr; - int active; - - rw_wlock(&pvh_global_lock); - pmap = PCPU_GET(curpmap); - active = (pm == kernel_pmap || pm == pmap) ? 1 : 0; - while (sz > 0) { - PMAP_LOCK(pm); - pte = pte_find(pm, va); - valid = (pte != NULL && PTE_ISVALID(pte)) ? 1 : 0; - if (valid) - pa = PTE_PA(pte); - PMAP_UNLOCK(pm); - sync_sz = PAGE_SIZE - (va & PAGE_MASK); - sync_sz = min(sync_sz, sz); - if (valid) { - if (!active) { - /* Create a mapping in the active pmap. */ - addr = 0; - m = PHYS_TO_VM_PAGE(pa); - PMAP_LOCK(pmap); - pte_enter(pmap, m, addr, - PTE_SR | PTE_VALID, FALSE); - addr += (va & PAGE_MASK); - __syncicache((void *)addr, sync_sz); - pte_remove(pmap, addr, PTBL_UNHOLD); - PMAP_UNLOCK(pmap); - } else - __syncicache((void *)va, sync_sz); - } - va += sync_sz; - sz -= sync_sz; - } - rw_wunlock(&pvh_global_lock); -} - -/* - * mmu_booke_zero_page_area zeros the specified hardware page by - * mapping it into virtual memory and using bzero to clear - * its contents. - * - * off and size must reside within a single page. - */ -static void -mmu_booke_zero_page_area(vm_page_t m, int off, int size) -{ - vm_offset_t va; - - /* XXX KASSERT off and size are within a single page? */ - - mtx_lock(&zero_page_mutex); - va = zero_page_va; - - mmu_booke_kenter(va, VM_PAGE_TO_PHYS(m)); - bzero((caddr_t)va + off, size); - mmu_booke_kremove(va); - - mtx_unlock(&zero_page_mutex); -} - -/* - * mmu_booke_zero_page zeros the specified hardware page. - */ -static void -mmu_booke_zero_page(vm_page_t m) -{ - vm_offset_t off, va; - - va = zero_page_va; - mtx_lock(&zero_page_mutex); - - mmu_booke_kenter(va, VM_PAGE_TO_PHYS(m)); - - for (off = 0; off < PAGE_SIZE; off += cacheline_size) - __asm __volatile("dcbz 0,%0" :: "r"(va + off)); - - mmu_booke_kremove(va); - - mtx_unlock(&zero_page_mutex); -} - -/* - * mmu_booke_copy_page copies the specified (machine independent) page by - * mapping the page into virtual memory and using memcopy to copy the page, - * one machine dependent page at a time. - */ -static void -mmu_booke_copy_page(vm_page_t sm, vm_page_t dm) -{ - vm_offset_t sva, dva; - - sva = copy_page_src_va; - dva = copy_page_dst_va; - - mtx_lock(©_page_mutex); - mmu_booke_kenter(sva, VM_PAGE_TO_PHYS(sm)); - mmu_booke_kenter(dva, VM_PAGE_TO_PHYS(dm)); - - memcpy((caddr_t)dva, (caddr_t)sva, PAGE_SIZE); - - mmu_booke_kremove(dva); - mmu_booke_kremove(sva); - mtx_unlock(©_page_mutex); -} - -static inline void -mmu_booke_copy_pages(vm_page_t *ma, vm_offset_t a_offset, - vm_page_t *mb, vm_offset_t b_offset, int xfersize) -{ - void *a_cp, *b_cp; - vm_offset_t a_pg_offset, b_pg_offset; - int cnt; - - mtx_lock(©_page_mutex); - while (xfersize > 0) { - a_pg_offset = a_offset & PAGE_MASK; - cnt = min(xfersize, PAGE_SIZE - a_pg_offset); - mmu_booke_kenter(copy_page_src_va, - VM_PAGE_TO_PHYS(ma[a_offset >> PAGE_SHIFT])); - a_cp = (char *)copy_page_src_va + a_pg_offset; - b_pg_offset = b_offset & PAGE_MASK; - cnt = min(cnt, PAGE_SIZE - b_pg_offset); - mmu_booke_kenter(copy_page_dst_va, - VM_PAGE_TO_PHYS(mb[b_offset >> PAGE_SHIFT])); - b_cp = (char *)copy_page_dst_va + b_pg_offset; - bcopy(a_cp, b_cp, cnt); - mmu_booke_kremove(copy_page_dst_va); - mmu_booke_kremove(copy_page_src_va); - a_offset += cnt; - b_offset += cnt; - xfersize -= cnt; - } - mtx_unlock(©_page_mutex); -} - -static vm_offset_t -mmu_booke_quick_enter_page(vm_page_t m) -{ - vm_paddr_t paddr; - vm_offset_t qaddr; - uint32_t flags; - pte_t *pte; - - paddr = VM_PAGE_TO_PHYS(m); - - flags = PTE_SR | PTE_SW | PTE_SX | PTE_WIRED | PTE_VALID; - flags |= tlb_calc_wimg(paddr, pmap_page_get_memattr(m)) << PTE_MAS2_SHIFT; - flags |= PTE_PS_4KB; - - critical_enter(); - qaddr = PCPU_GET(qmap_addr); - - pte = pte_find(kernel_pmap, qaddr); - - KASSERT(*pte == 0, ("mmu_booke_quick_enter_page: PTE busy")); - - /* - * XXX: tlbivax is broadcast to other cores, but qaddr should - * not be present in other TLBs. Is there a better instruction - * sequence to use? Or just forget it & use mmu_booke_kenter()... - */ - __asm __volatile("tlbivax 0, %0" :: "r"(qaddr & MAS2_EPN_MASK)); - __asm __volatile("isync; msync"); - - *pte = PTE_RPN_FROM_PA(paddr) | flags; - - /* Flush the real memory from the instruction cache. */ - if ((flags & (PTE_I | PTE_G)) == 0) - __syncicache((void *)qaddr, PAGE_SIZE); - - return (qaddr); -} - -static void -mmu_booke_quick_remove_page(vm_offset_t addr) -{ - pte_t *pte; - - pte = pte_find(kernel_pmap, addr); - - KASSERT(PCPU_GET(qmap_addr) == addr, - ("mmu_booke_quick_remove_page: invalid address")); - KASSERT(*pte != 0, - ("mmu_booke_quick_remove_page: PTE not in use")); - - *pte = 0; - critical_exit(); -} - -/**************************************************************************/ -/* TID handling */ -/**************************************************************************/ - -/* - * Return the largest uint value log such that 2^log <= num. - */ -static unsigned long -ilog2(unsigned long num) -{ - long lz; - - __asm ("cntlzw %0, %1" : "=r" (lz) : "r" (num)); - return (31 - lz); -} - -/* - * Invalidate all TLB0 entries which match the given TID. Note this is - * dedicated for cases when invalidations should NOT be propagated to other - * CPUs. - */ -static void -tid_flush(tlbtid_t tid) -{ - register_t msr; - uint32_t mas0, mas1, mas2; - int entry, way; - - /* Don't evict kernel translations */ - if (tid == TID_KERNEL) - return; - - msr = mfmsr(); - __asm __volatile("wrteei 0"); - - /* - * Newer (e500mc and later) have tlbilx, which doesn't broadcast, so use - * it for PID invalidation. - */ - switch ((mfpvr() >> 16) & 0xffff) { - case FSL_E500mc: - case FSL_E5500: - case FSL_E6500: - mtspr(SPR_MAS6, tid << MAS6_SPID0_SHIFT); - /* tlbilxpid */ - __asm __volatile("isync; .long 0x7c200024; isync; msync"); - __asm __volatile("wrtee %0" :: "r"(msr)); - return; - } - - for (way = 0; way < TLB0_WAYS; way++) - for (entry = 0; entry < TLB0_ENTRIES_PER_WAY; entry++) { - mas0 = MAS0_TLBSEL(0) | MAS0_ESEL(way); - mtspr(SPR_MAS0, mas0); - - mas2 = entry << MAS2_TLB0_ENTRY_IDX_SHIFT; - mtspr(SPR_MAS2, mas2); - - __asm __volatile("isync; tlbre"); - - mas1 = mfspr(SPR_MAS1); - - if (!(mas1 & MAS1_VALID)) - continue; - if (((mas1 & MAS1_TID_MASK) >> MAS1_TID_SHIFT) != tid) - continue; - mas1 &= ~MAS1_VALID; - mtspr(SPR_MAS1, mas1); - __asm __volatile("isync; tlbwe; isync; msync"); - } - __asm __volatile("wrtee %0" :: "r"(msr)); -} diff --git a/sys/powerpc/booke/pmap_64.c b/sys/powerpc/booke/pmap_64.c deleted file mode 100644 index 968d9d9aa47..00000000000 --- a/sys/powerpc/booke/pmap_64.c +++ /dev/null @@ -1,786 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2020 Justin Hibbits - * Copyright (C) 2007-2009 Semihalf, Rafal Jaworowski - * Copyright (C) 2006 Semihalf, Marian Balakowicz - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Some hw specific parts of this pmap were derived or influenced - * by NetBSD's ibm4xx pmap module. More generic code is shared with - * a few other pmap modules from the FreeBSD tree. - */ - - /* - * VM layout notes: - * - * Kernel and user threads run within one common virtual address space - * defined by AS=0. - * - * 64-bit pmap: - * Virtual address space layout: - * ----------------------------- - * 0x0000_0000_0000_0000 - 0x3fff_ffff_ffff_ffff : user process - * 0x4000_0000_0000_0000 - 0x7fff_ffff_ffff_ffff : unused - * 0x8000_0000_0000_0000 - 0xbfff_ffff_ffff_ffff : mmio region - * 0xc000_0000_0000_0000 - 0xdfff_ffff_ffff_ffff : direct map - * 0xe000_0000_0000_0000 - 0xffff_ffff_ffff_ffff : KVA - */ - -#include -#include "opt_ddb.h" -#include "opt_kstack_pages.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include - -#ifdef DEBUG -#define debugf(fmt, args...) printf(fmt, ##args) -#else -#define debugf(fmt, args...) -#endif - -#define PRI0ptrX "016lx" - -/**************************************************************************/ -/* PMAP */ -/**************************************************************************/ - -unsigned int kernel_pdirs; -static uma_zone_t ptbl_root_zone; -static pte_t ****kernel_ptbl_root; - -/* - * Base of the pmap_mapdev() region. On 32-bit it immediately follows the - * userspace address range. On On 64-bit it's far above, at (1 << 63), and - * ranges up to the DMAP, giving 62 bits of PA allowed. This is far larger than - * the widest Book-E address bus, the e6500 has a 40-bit PA space. This allows - * us to map akin to the DMAP, with addresses identical to the PA, offset by the - * base. - */ -#define VM_MAPDEV_BASE 0x8000000000000000 -#define VM_MAPDEV_PA_MAX 0x4000000000000000 /* Don't encroach on DMAP */ - -static void tid_flush(tlbtid_t tid); -static unsigned long ilog2(unsigned long); - -/**************************************************************************/ -/* Page table management */ -/**************************************************************************/ - -#define PMAP_ROOT_SIZE (sizeof(pte_t****) * PG_ROOT_NENTRIES) -static pte_t *ptbl_alloc(pmap_t pmap, vm_offset_t va, - bool nosleep, bool *is_new); -static void ptbl_hold(pmap_t, pte_t *); -static int ptbl_unhold(pmap_t, vm_offset_t); - -static vm_paddr_t pte_vatopa(pmap_t, vm_offset_t); -static int pte_enter(pmap_t, vm_page_t, vm_offset_t, uint32_t, boolean_t); -static int pte_remove(pmap_t, vm_offset_t, uint8_t); -static pte_t *pte_find(pmap_t, vm_offset_t); -static pte_t *pte_find_next(pmap_t, vm_offset_t *); -static void kernel_pte_alloc(vm_offset_t, vm_offset_t); - -/**************************************************************************/ -/* Page table related */ -/**************************************************************************/ - -/* Allocate a page, to be used in a page table. */ -static vm_offset_t -mmu_booke_alloc_page(pmap_t pmap, unsigned int idx, bool nosleep) -{ - vm_page_t m; - int req; - - req = VM_ALLOC_WIRED | VM_ALLOC_ZERO; - while ((m = vm_page_alloc_noobj(req)) == NULL) { - if (nosleep) - return (0); - - PMAP_UNLOCK(pmap); - rw_wunlock(&pvh_global_lock); - vm_wait(NULL); - rw_wlock(&pvh_global_lock); - PMAP_LOCK(pmap); - } - m->pindex = idx; - - return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m))); -} - -/* Initialize pool of kva ptbl buffers. */ -static void -ptbl_init(void) -{ -} - -/* Get a pointer to a PTE in a page table. */ -static __inline pte_t * -pte_find(pmap_t pmap, vm_offset_t va) -{ - pte_t ***pdir_l1; - pte_t **pdir; - pte_t *ptbl; - - KASSERT((pmap != NULL), ("pte_find: invalid pmap")); - - pdir_l1 = pmap->pm_root[PG_ROOT_IDX(va)]; - if (pdir_l1 == NULL) - return (NULL); - pdir = pdir_l1[PDIR_L1_IDX(va)]; - if (pdir == NULL) - return (NULL); - ptbl = pdir[PDIR_IDX(va)]; - - return ((ptbl != NULL) ? &ptbl[PTBL_IDX(va)] : NULL); -} - -/* Get a pointer to a PTE in a page table, or the next closest (greater) one. */ -static __inline pte_t * -pte_find_next(pmap_t pmap, vm_offset_t *pva) -{ - vm_offset_t va; - pte_t ****pm_root; - pte_t *pte; - unsigned long i, j, k, l; - - KASSERT((pmap != NULL), ("pte_find: invalid pmap")); - - va = *pva; - i = PG_ROOT_IDX(va); - j = PDIR_L1_IDX(va); - k = PDIR_IDX(va); - l = PTBL_IDX(va); - pm_root = pmap->pm_root; - - /* truncate the VA for later. */ - va &= ~((1UL << (PG_ROOT_H + 1)) - 1); - for (; i < PG_ROOT_NENTRIES; i++, j = 0, k = 0, l = 0) { - if (pm_root[i] == 0) - continue; - for (; j < PDIR_L1_NENTRIES; j++, k = 0, l = 0) { - if (pm_root[i][j] == 0) - continue; - for (; k < PDIR_NENTRIES; k++, l = 0) { - if (pm_root[i][j][k] == NULL) - continue; - for (; l < PTBL_NENTRIES; l++) { - pte = &pm_root[i][j][k][l]; - if (!PTE_ISVALID(pte)) - continue; - *pva = va + PG_ROOT_SIZE * i + - PDIR_L1_SIZE * j + - PDIR_SIZE * k + - PAGE_SIZE * l; - return (pte); - } - } - } - } - return (NULL); -} - -static bool -unhold_free_page(pmap_t pmap, vm_page_t m) -{ - - if (vm_page_unwire_noq(m)) { - vm_page_free_zero(m); - return (true); - } - - return (false); -} - -static vm_offset_t -get_pgtbl_page(pmap_t pmap, vm_offset_t *ptr_tbl, uint32_t index, - bool nosleep, bool hold_parent, bool *isnew) -{ - vm_offset_t page; - vm_page_t m; - - page = ptr_tbl[index]; - KASSERT(page != 0 || pmap != kernel_pmap, - ("NULL page table page found in kernel pmap!")); - if (page == 0) { - page = mmu_booke_alloc_page(pmap, index, nosleep); - if (ptr_tbl[index] == 0) { - *isnew = true; - ptr_tbl[index] = page; - if (hold_parent) { - m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)ptr_tbl)); - m->ref_count++; - } - return (page); - } - m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS(page)); - page = ptr_tbl[index]; - vm_page_unwire_noq(m); - vm_page_free_zero(m); - } - - *isnew = false; - - return (page); -} - -/* Allocate page table. */ -static pte_t* -ptbl_alloc(pmap_t pmap, vm_offset_t va, bool nosleep, bool *is_new) -{ - unsigned int pg_root_idx = PG_ROOT_IDX(va); - unsigned int pdir_l1_idx = PDIR_L1_IDX(va); - unsigned int pdir_idx = PDIR_IDX(va); - vm_offset_t pdir_l1, pdir, ptbl; - - /* When holding a parent, no need to hold the root index pages. */ - pdir_l1 = get_pgtbl_page(pmap, (vm_offset_t *)pmap->pm_root, - pg_root_idx, nosleep, false, is_new); - if (pdir_l1 == 0) - return (NULL); - pdir = get_pgtbl_page(pmap, (vm_offset_t *)pdir_l1, pdir_l1_idx, - nosleep, !*is_new, is_new); - if (pdir == 0) - return (NULL); - ptbl = get_pgtbl_page(pmap, (vm_offset_t *)pdir, pdir_idx, - nosleep, !*is_new, is_new); - - return ((pte_t *)ptbl); -} - -/* - * Decrement ptbl pages hold count and attempt to free ptbl pages. Called - * when removing pte entry from ptbl. - * - * Return 1 if ptbl pages were freed. - */ -static int -ptbl_unhold(pmap_t pmap, vm_offset_t va) -{ - pte_t *ptbl; - vm_page_t m; - u_int pg_root_idx; - pte_t ***pdir_l1; - u_int pdir_l1_idx; - pte_t **pdir; - u_int pdir_idx; - - pg_root_idx = PG_ROOT_IDX(va); - pdir_l1_idx = PDIR_L1_IDX(va); - pdir_idx = PDIR_IDX(va); - - KASSERT((pmap != kernel_pmap), - ("ptbl_unhold: unholding kernel ptbl!")); - - pdir_l1 = pmap->pm_root[pg_root_idx]; - pdir = pdir_l1[pdir_l1_idx]; - ptbl = pdir[pdir_idx]; - - /* decrement hold count */ - m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t) ptbl)); - - if (!unhold_free_page(pmap, m)) - return (0); - - pdir[pdir_idx] = NULL; - m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t) pdir)); - - if (!unhold_free_page(pmap, m)) - return (1); - - pdir_l1[pdir_l1_idx] = NULL; - m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t) pdir_l1)); - - if (!unhold_free_page(pmap, m)) - return (1); - pmap->pm_root[pg_root_idx] = NULL; - - return (1); -} - -/* - * Increment hold count for ptbl pages. This routine is used when new pte - * entry is being inserted into ptbl. - */ -static void -ptbl_hold(pmap_t pmap, pte_t *ptbl) -{ - vm_page_t m; - - KASSERT((pmap != kernel_pmap), - ("ptbl_hold: holding kernel ptbl!")); - - m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t) ptbl)); - m->ref_count++; -} - -/* - * Clean pte entry, try to free page table page if requested. - * - * Return 1 if ptbl pages were freed, otherwise return 0. - */ -static int -pte_remove(pmap_t pmap, vm_offset_t va, u_int8_t flags) -{ - vm_page_t m; - pte_t *pte; - - pte = pte_find(pmap, va); - KASSERT(pte != NULL, ("%s: NULL pte for va %#jx, pmap %p", - __func__, (uintmax_t)va, pmap)); - - if (!PTE_ISVALID(pte)) - return (0); - - /* Get vm_page_t for mapped pte. */ - m = PHYS_TO_VM_PAGE(PTE_PA(pte)); - - if (PTE_ISWIRED(pte)) - pmap->pm_stats.wired_count--; - - /* Handle managed entry. */ - if (PTE_ISMANAGED(pte)) { - /* Handle modified pages. */ - if (PTE_ISMODIFIED(pte)) - vm_page_dirty(m); - - /* Referenced pages. */ - if (PTE_ISREFERENCED(pte)) - vm_page_aflag_set(m, PGA_REFERENCED); - - /* Remove pv_entry from pv_list. */ - pv_remove(pmap, va, m); - } else if (pmap == kernel_pmap && m && m->md.pv_tracked) { - pv_remove(pmap, va, m); - if (TAILQ_EMPTY(&m->md.pv_list)) - m->md.pv_tracked = false; - } - mtx_lock_spin(&tlbivax_mutex); - tlb_miss_lock(); - - tlb0_flush_entry(va); - *pte = 0; - - tlb_miss_unlock(); - mtx_unlock_spin(&tlbivax_mutex); - - pmap->pm_stats.resident_count--; - - if (flags & PTBL_UNHOLD) { - return (ptbl_unhold(pmap, va)); - } - return (0); -} - -/* - * Insert PTE for a given page and virtual address. - */ -static int -pte_enter(pmap_t pmap, vm_page_t m, vm_offset_t va, uint32_t flags, - boolean_t nosleep) -{ - unsigned int ptbl_idx = PTBL_IDX(va); - pte_t *ptbl, *pte, pte_tmp; - bool is_new; - - /* Get the page directory pointer. */ - ptbl = ptbl_alloc(pmap, va, nosleep, &is_new); - if (ptbl == NULL) { - KASSERT(nosleep, ("nosleep and NULL ptbl")); - return (ENOMEM); - } - if (is_new) { - pte = &ptbl[ptbl_idx]; - } else { - /* - * Check if there is valid mapping for requested va, if there - * is, remove it. - */ - pte = &ptbl[ptbl_idx]; - if (PTE_ISVALID(pte)) { - pte_remove(pmap, va, PTBL_HOLD); - } else { - /* - * pte is not used, increment hold count for ptbl - * pages. - */ - if (pmap != kernel_pmap) - ptbl_hold(pmap, ptbl); - } - } - - /* - * Insert pv_entry into pv_list for mapped page if part of managed - * memory. - */ - if ((m->oflags & VPO_UNMANAGED) == 0) { - flags |= PTE_MANAGED; - - /* Create and insert pv entry. */ - pv_insert(pmap, va, m); - } - - pmap->pm_stats.resident_count++; - - pte_tmp = PTE_RPN_FROM_PA(VM_PAGE_TO_PHYS(m)); - pte_tmp |= (PTE_VALID | flags); - - mtx_lock_spin(&tlbivax_mutex); - tlb_miss_lock(); - - tlb0_flush_entry(va); - *pte = pte_tmp; - - tlb_miss_unlock(); - mtx_unlock_spin(&tlbivax_mutex); - - return (0); -} - -/* Return the pa for the given pmap/va. */ -static vm_paddr_t -pte_vatopa(pmap_t pmap, vm_offset_t va) -{ - vm_paddr_t pa = 0; - pte_t *pte; - - pte = pte_find(pmap, va); - if ((pte != NULL) && PTE_ISVALID(pte)) - pa = (PTE_PA(pte) | (va & PTE_PA_MASK)); - return (pa); -} - -/* allocate pte entries to manage (addr & mask) to (addr & mask) + size */ -static void -kernel_pte_alloc(vm_offset_t data_end, vm_offset_t addr) -{ - pte_t *pte; - vm_size_t kva_size; - int kernel_pdirs, kernel_pgtbls, pdir_l1s; - vm_offset_t va, l1_va, pdir_va, ptbl_va; - int i, j, k; - - kva_size = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS; - kernel_pmap->pm_root = kernel_ptbl_root; - pdir_l1s = howmany(kva_size, PG_ROOT_SIZE); - kernel_pdirs = howmany(kva_size, PDIR_L1_SIZE); - kernel_pgtbls = howmany(kva_size, PDIR_SIZE); - - /* Initialize kernel pdir */ - l1_va = (vm_offset_t)kernel_ptbl_root + - round_page(PG_ROOT_NENTRIES * sizeof(pte_t ***)); - pdir_va = l1_va + pdir_l1s * PAGE_SIZE; - ptbl_va = pdir_va + kernel_pdirs * PAGE_SIZE; - if (bootverbose) { - printf("ptbl_root_va: %#lx\n", (vm_offset_t)kernel_ptbl_root); - printf("l1_va: %#lx (%d entries)\n", l1_va, pdir_l1s); - printf("pdir_va: %#lx(%d entries)\n", pdir_va, kernel_pdirs); - printf("ptbl_va: %#lx(%d entries)\n", ptbl_va, kernel_pgtbls); - } - - va = VM_MIN_KERNEL_ADDRESS; - for (i = PG_ROOT_IDX(va); i < PG_ROOT_IDX(va) + pdir_l1s; - i++, l1_va += PAGE_SIZE) { - kernel_pmap->pm_root[i] = (pte_t ***)l1_va; - for (j = 0; - j < PDIR_L1_NENTRIES && va < VM_MAX_KERNEL_ADDRESS; - j++, pdir_va += PAGE_SIZE) { - kernel_pmap->pm_root[i][j] = (pte_t **)pdir_va; - for (k = 0; - k < PDIR_NENTRIES && va < VM_MAX_KERNEL_ADDRESS; - k++, va += PDIR_SIZE, ptbl_va += PAGE_SIZE) - kernel_pmap->pm_root[i][j][k] = (pte_t *)ptbl_va; - } - } - /* - * Fill in PTEs covering kernel code and data. They are not required - * for address translation, as this area is covered by static TLB1 - * entries, but for pte_vatopa() to work correctly with kernel area - * addresses. - */ - for (va = addr; va < data_end; va += PAGE_SIZE) { - pte = &(kernel_pmap->pm_root[PG_ROOT_IDX(va)][PDIR_L1_IDX(va)][PDIR_IDX(va)][PTBL_IDX(va)]); - *pte = PTE_RPN_FROM_PA(kernload + (va - kernstart)); - *pte |= PTE_M | PTE_SR | PTE_SW | PTE_SX | PTE_WIRED | - PTE_VALID | PTE_PS_4KB; - } -} - -static vm_offset_t -mmu_booke_alloc_kernel_pgtables(vm_offset_t data_end) -{ - vm_size_t kva_size = VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS; - kernel_ptbl_root = (pte_t ****)data_end; - - data_end += round_page(PG_ROOT_NENTRIES * sizeof(pte_t ***)); - data_end += howmany(kva_size, PG_ROOT_SIZE) * PAGE_SIZE; - data_end += howmany(kva_size, PDIR_L1_SIZE) * PAGE_SIZE; - data_end += howmany(kva_size, PDIR_SIZE) * PAGE_SIZE; - - return (data_end); -} - -/* - * Initialize a preallocated and zeroed pmap structure, - * such as one in a vmspace structure. - */ -static int -mmu_booke_pinit(pmap_t pmap) -{ - int i; - - CTR4(KTR_PMAP, "%s: pmap = %p, proc %d '%s'", __func__, pmap, - curthread->td_proc->p_pid, curthread->td_proc->p_comm); - - KASSERT((pmap != kernel_pmap), ("pmap_pinit: initializing kernel_pmap")); - - for (i = 0; i < MAXCPU; i++) - pmap->pm_tid[i] = TID_NONE; - CPU_ZERO(&kernel_pmap->pm_active); - bzero(&pmap->pm_stats, sizeof(pmap->pm_stats)); - pmap->pm_root = uma_zalloc(ptbl_root_zone, M_WAITOK); - bzero(pmap->pm_root, sizeof(pte_t **) * PG_ROOT_NENTRIES); - - return (1); -} - -/* - * Release any resources held by the given physical map. - * Called when a pmap initialized by mmu_booke_pinit is being released. - * Should only be called if the map contains no valid mappings. - */ -static void -mmu_booke_release(pmap_t pmap) -{ - - KASSERT(pmap->pm_stats.resident_count == 0, - ("pmap_release: pmap resident count %ld != 0", - pmap->pm_stats.resident_count)); -#ifdef INVARIANTS - /* - * Verify that all page directories are gone. - * Protects against reference count leakage. - */ - for (int i = 0; i < PG_ROOT_NENTRIES; i++) - KASSERT(pmap->pm_root[i] == 0, - ("Index %d on root page %p is non-zero!\n", i, pmap->pm_root)); -#endif - uma_zfree(ptbl_root_zone, pmap->pm_root); -} - -static void -mmu_booke_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz) -{ - pte_t *pte; - vm_paddr_t pa = 0; - int sync_sz, valid; - - while (sz > 0) { - PMAP_LOCK(pm); - pte = pte_find(pm, va); - valid = (pte != NULL && PTE_ISVALID(pte)) ? 1 : 0; - if (valid) - pa = PTE_PA(pte); - PMAP_UNLOCK(pm); - sync_sz = PAGE_SIZE - (va & PAGE_MASK); - sync_sz = min(sync_sz, sz); - if (valid) { - pa += (va & PAGE_MASK); - __syncicache((void *)PHYS_TO_DMAP(pa), sync_sz); - } - va += sync_sz; - sz -= sync_sz; - } -} - -/* - * mmu_booke_zero_page_area zeros the specified hardware page by - * mapping it into virtual memory and using bzero to clear - * its contents. - * - * off and size must reside within a single page. - */ -static void -mmu_booke_zero_page_area(vm_page_t m, int off, int size) -{ - vm_offset_t va; - - /* XXX KASSERT off and size are within a single page? */ - - va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)); - bzero((caddr_t)va + off, size); -} - -/* - * mmu_booke_zero_page zeros the specified hardware page. - */ -static void -mmu_booke_zero_page(vm_page_t m) -{ - vm_offset_t off, va; - - va = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m)); - - for (off = 0; off < PAGE_SIZE; off += cacheline_size) - __asm __volatile("dcbz 0,%0" :: "r"(va + off)); -} - -/* - * mmu_booke_copy_page copies the specified (machine independent) page by - * mapping the page into virtual memory and using memcopy to copy the page, - * one machine dependent page at a time. - */ -static void -mmu_booke_copy_page(vm_page_t sm, vm_page_t dm) -{ - vm_offset_t sva, dva; - - sva = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(sm)); - dva = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(dm)); - memcpy((caddr_t)dva, (caddr_t)sva, PAGE_SIZE); -} - -static inline void -mmu_booke_copy_pages(vm_page_t *ma, vm_offset_t a_offset, - vm_page_t *mb, vm_offset_t b_offset, int xfersize) -{ - void *a_cp, *b_cp; - vm_offset_t a_pg_offset, b_pg_offset; - int cnt; - - vm_page_t pa, pb; - - while (xfersize > 0) { - a_pg_offset = a_offset & PAGE_MASK; - pa = ma[a_offset >> PAGE_SHIFT]; - b_pg_offset = b_offset & PAGE_MASK; - pb = mb[b_offset >> PAGE_SHIFT]; - cnt = min(xfersize, PAGE_SIZE - a_pg_offset); - cnt = min(cnt, PAGE_SIZE - b_pg_offset); - a_cp = (caddr_t)((uintptr_t)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pa)) + - a_pg_offset); - b_cp = (caddr_t)((uintptr_t)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pb)) + - b_pg_offset); - bcopy(a_cp, b_cp, cnt); - a_offset += cnt; - b_offset += cnt; - xfersize -= cnt; - } -} - -static vm_offset_t -mmu_booke_quick_enter_page(vm_page_t m) -{ - return (PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m))); -} - -static void -mmu_booke_quick_remove_page(vm_offset_t addr) -{ -} - -/**************************************************************************/ -/* TID handling */ -/**************************************************************************/ - -/* - * Return the largest uint value log such that 2^log <= num. - */ -static unsigned long -ilog2(unsigned long num) -{ - long lz; - - __asm ("cntlzd %0, %1" : "=r" (lz) : "r" (num)); - return (63 - lz); -} - -/* - * Invalidate all TLB0 entries which match the given TID. Note this is - * dedicated for cases when invalidations should NOT be propagated to other - * CPUs. - */ -static void -tid_flush(tlbtid_t tid) -{ - register_t msr; - - /* Don't evict kernel translations */ - if (tid == TID_KERNEL) - return; - - msr = mfmsr(); - __asm __volatile("wrteei 0"); - - /* - * Newer (e500mc and later) have tlbilx, which doesn't broadcast, so use - * it for PID invalidation. - */ - mtspr(SPR_MAS6, tid << MAS6_SPID0_SHIFT); - __asm __volatile("isync; .long 0x7c200024; isync; msync"); - - __asm __volatile("wrtee %0" :: "r"(msr)); -} diff --git a/sys/powerpc/booke/spe.c b/sys/powerpc/booke/spe.c deleted file mode 100644 index 30204698ec1..00000000000 --- a/sys/powerpc/booke/spe.c +++ /dev/null @@ -1,686 +0,0 @@ -/*- - * Copyright (C) 1996 Wolfgang Solfrank. - * Copyright (C) 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: fpu.c,v 1.5 2001/07/22 11:29:46 wiz Exp $ - */ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include -#include - -void spe_handle_fpdata(struct trapframe *); -void spe_handle_fpround(struct trapframe *); -static int spe_emu_instr(uint32_t, struct fpemu *, struct fpn **, uint32_t *); - -static void -save_vec_int(struct thread *td) -{ - int msr; - struct pcb *pcb; - - pcb = td->td_pcb; - - /* - * Temporarily re-enable the vector unit during the save - */ - msr = mfmsr(); - mtmsr(msr | PSL_VEC); - - /* - * Save the vector registers and SPEFSCR to the PCB - */ -#define EVSTDW(n) __asm ("evstdw %1,0(%0)" \ - :: "b"(pcb->pcb_vec.vr[n]), "n"(n)); - EVSTDW(0); EVSTDW(1); EVSTDW(2); EVSTDW(3); - EVSTDW(4); EVSTDW(5); EVSTDW(6); EVSTDW(7); - EVSTDW(8); EVSTDW(9); EVSTDW(10); EVSTDW(11); - EVSTDW(12); EVSTDW(13); EVSTDW(14); EVSTDW(15); - EVSTDW(16); EVSTDW(17); EVSTDW(18); EVSTDW(19); - EVSTDW(20); EVSTDW(21); EVSTDW(22); EVSTDW(23); - EVSTDW(24); EVSTDW(25); EVSTDW(26); EVSTDW(27); - EVSTDW(28); EVSTDW(29); EVSTDW(30); EVSTDW(31); -#undef EVSTDW - - __asm ( "evxor 0,0,0\n" - "evmwumiaa 0,0,0\n" - "evstdd 0,0(%0)" :: "b"(&pcb->pcb_vec.spare[0])); - pcb->pcb_vec.vscr = mfspr(SPR_SPEFSCR); - - /* - * Disable vector unit again - */ - isync(); - mtmsr(msr); - -} - -void -enable_vec(struct thread *td) -{ - int msr; - struct pcb *pcb; - struct trapframe *tf; - - pcb = td->td_pcb; - tf = trapframe(td); - - /* - * Save the thread's SPE CPU number, and set the CPU's current - * vector thread - */ - td->td_pcb->pcb_veccpu = PCPU_GET(cpuid); - PCPU_SET(vecthread, td); - - /* - * Enable the vector unit for when the thread returns from the - * exception. If this is the first time the unit has been used by - * the thread, initialise the vector registers and VSCR to 0, and - * set the flag to indicate that the vector unit is in use. - */ - tf->srr1 |= PSL_VEC; - if (!(pcb->pcb_flags & PCB_VEC)) { - memset(&pcb->pcb_vec, 0, sizeof pcb->pcb_vec); - pcb->pcb_flags |= PCB_VEC; - pcb->pcb_vec.vscr = mfspr(SPR_SPEFSCR); - } - - /* - * Temporarily enable the vector unit so the registers - * can be restored. - */ - msr = mfmsr(); - mtmsr(msr | PSL_VEC); - - /* Restore SPEFSCR and ACC. Use %r0 as the scratch for ACC. */ - mtspr(SPR_SPEFSCR, pcb->pcb_vec.vscr); - __asm __volatile("isync;evldd 0, 0(%0); evmra 0,0\n" - :: "b"(&pcb->pcb_vec.spare[0])); - - /* - * The lower half of each register will be restored on trap return. Use - * %r0 as a scratch register, and restore it last. - */ -#define EVLDW(n) __asm __volatile("evldw 0, 0(%0); evmergehilo "#n",0,"#n \ - :: "b"(&pcb->pcb_vec.vr[n])); - EVLDW(1); EVLDW(2); EVLDW(3); EVLDW(4); - EVLDW(5); EVLDW(6); EVLDW(7); EVLDW(8); - EVLDW(9); EVLDW(10); EVLDW(11); EVLDW(12); - EVLDW(13); EVLDW(14); EVLDW(15); EVLDW(16); - EVLDW(17); EVLDW(18); EVLDW(19); EVLDW(20); - EVLDW(21); EVLDW(22); EVLDW(23); EVLDW(24); - EVLDW(25); EVLDW(26); EVLDW(27); EVLDW(28); - EVLDW(29); EVLDW(30); EVLDW(31); EVLDW(0); -#undef EVLDW - - isync(); - mtmsr(msr); -} - -void -save_vec(struct thread *td) -{ - struct pcb *pcb; - - pcb = td->td_pcb; - - save_vec_int(td); - - /* - * Clear the current vec thread and pcb's CPU id - * XXX should this be left clear to allow lazy save/restore ? - */ - pcb->pcb_veccpu = INT_MAX; - PCPU_SET(vecthread, NULL); -} - -/* - * Save SPE state without dropping ownership. This will only save state if - * the current vector-thread is `td'. This is used for taking core dumps, so - * don't leak kernel information; overwrite the low words of each vector with - * their real value, taken from the thread's trap frame, unconditionally. - */ -void -save_vec_nodrop(struct thread *td) -{ - struct pcb *pcb; - int i; - - if (td == PCPU_GET(vecthread)) - save_vec_int(td); - - pcb = td->td_pcb; - - for (i = 0; i < 32; i++) { - pcb->pcb_vec.vr[i][1] = - td->td_frame ? td->td_frame->fixreg[i] : 0; - } -} - -#define SPE_INST_MASK 0x31f -#define EADD 0x200 -#define ESUB 0x201 -#define EABS 0x204 -#define ENABS 0x205 -#define ENEG 0x206 -#define EMUL 0x208 -#define EDIV 0x209 -#define ECMPGT 0x20c -#define ECMPLT 0x20d -#define ECMPEQ 0x20e -#define ECFUI 0x210 -#define ECFSI 0x211 -#define ECTUI 0x214 -#define ECTSI 0x215 -#define ECTUF 0x216 -#define ECTSF 0x217 -#define ECTUIZ 0x218 -#define ECTSIZ 0x21a - -#define SPE 0x4 -#define SPFP 0x6 -#define DPFP 0x7 - -#define SPE_OPC 4 -#define OPC_SHIFT 26 - -#define EVFSADD 0x280 -#define EVFSSUB 0x281 -#define EVFSABS 0x284 -#define EVFSNABS 0x285 -#define EVFSNEG 0x286 -#define EVFSMUL 0x288 -#define EVFSDIV 0x289 -#define EVFSCMPGT 0x28c -#define EVFSCMPLT 0x28d -#define EVFSCMPEQ 0x28e -#define EVFSCFUI 0x290 -#define EVFSCFSI 0x291 -#define EVFSCTUI 0x294 -#define EVFSCTSI 0x295 -#define EVFSCTUF 0x296 -#define EVFSCTSF 0x297 -#define EVFSCTUIZ 0x298 -#define EVFSCTSIZ 0x29a - -#define EFSADD 0x2c0 -#define EFSSUB 0x2c1 -#define EFSABS 0x2c4 -#define EFSNABS 0x2c5 -#define EFSNEG 0x2c6 -#define EFSMUL 0x2c8 -#define EFSDIV 0x2c9 -#define EFSCMPGT 0x2cc -#define EFSCMPLT 0x2cd -#define EFSCMPEQ 0x2ce -#define EFSCFD 0x2cf -#define EFSCFUI 0x2d0 -#define EFSCFSI 0x2d1 -#define EFSCTUI 0x2d4 -#define EFSCTSI 0x2d5 -#define EFSCTUF 0x2d6 -#define EFSCTSF 0x2d7 -#define EFSCTUIZ 0x2d8 -#define EFSCTSIZ 0x2da - -#define EFDADD 0x2e0 -#define EFDSUB 0x2e1 -#define EFDABS 0x2e4 -#define EFDNABS 0x2e5 -#define EFDNEG 0x2e6 -#define EFDMUL 0x2e8 -#define EFDDIV 0x2e9 -#define EFDCMPGT 0x2ec -#define EFDCMPLT 0x2ed -#define EFDCMPEQ 0x2ee -#define EFDCFS 0x2ef -#define EFDCFUI 0x2f0 -#define EFDCFSI 0x2f1 -#define EFDCTUI 0x2f4 -#define EFDCTSI 0x2f5 -#define EFDCTUF 0x2f6 -#define EFDCTSF 0x2f7 -#define EFDCTUIZ 0x2f8 -#define EFDCTSIZ 0x2fa - -enum { - NONE, - SINGLE, - DOUBLE, - VECTOR, -}; - -static uint32_t fpscr_to_spefscr(uint32_t fpscr) -{ - uint32_t spefscr; - - spefscr = 0; - - if (fpscr & FPSCR_VX) - spefscr |= SPEFSCR_FINV; - if (fpscr & FPSCR_OX) - spefscr |= SPEFSCR_FOVF; - if (fpscr & FPSCR_UX) - spefscr |= SPEFSCR_FUNF; - if (fpscr & FPSCR_ZX) - spefscr |= SPEFSCR_FDBZ; - if (fpscr & FPSCR_XX) - spefscr |= SPEFSCR_FX; - - return (spefscr); -} - -/* Sign is 0 for unsigned, 1 for signed. */ -static int -spe_to_int(struct fpemu *fpemu, struct fpn *fpn, uint32_t *val, int sign) -{ - uint32_t res[2]; - - res[0] = fpu_ftox(fpemu, fpn, res); - if (res[0] != UINT_MAX && res[0] != 0) - fpemu->fe_cx |= FPSCR_OX; - else if (sign == 0 && res[0] != 0) - fpemu->fe_cx |= FPSCR_UX; - else - *val = res[1]; - - return (0); -} - -/* Masked instruction */ -/* - * For compare instructions, returns 1 if success, 0 if not. For all others, - * returns -1, or -2 if no result needs recorded. - */ -static int -spe_emu_instr(uint32_t instr, struct fpemu *fpemu, - struct fpn **result, uint32_t *iresult) -{ - switch (instr & SPE_INST_MASK) { - case EABS: - case ENABS: - case ENEG: - /* Taken care of elsewhere. */ - break; - case ECTUIZ: - fpemu->fe_cx &= ~FPSCR_RN; - fpemu->fe_cx |= FP_RZ; - case ECTUI: - spe_to_int(fpemu, &fpemu->fe_f2, iresult, 0); - return (-1); - case ECTSIZ: - fpemu->fe_cx &= ~FPSCR_RN; - fpemu->fe_cx |= FP_RZ; - case ECTSI: - spe_to_int(fpemu, &fpemu->fe_f2, iresult, 1); - return (-1); - case EADD: - *result = fpu_add(fpemu); - break; - case ESUB: - *result = fpu_sub(fpemu); - break; - case EMUL: - *result = fpu_mul(fpemu); - break; - case EDIV: - *result = fpu_div(fpemu); - break; - case ECMPGT: - fpu_compare(fpemu, 0); - if (fpemu->fe_cx & FPSCR_FG) - return (1); - return (0); - case ECMPLT: - fpu_compare(fpemu, 0); - if (fpemu->fe_cx & FPSCR_FL) - return (1); - return (0); - case ECMPEQ: - fpu_compare(fpemu, 0); - if (fpemu->fe_cx & FPSCR_FE) - return (1); - return (0); - default: - printf("Unknown instruction %x\n", instr); - } - - return (-1); -} - -static int -spe_explode(struct fpemu *fe, struct fpn *fp, uint32_t type, - uint32_t hi, uint32_t lo) -{ - uint32_t s; - - fp->fp_sign = hi >> 31; - fp->fp_sticky = 0; - switch (type) { - case SINGLE: - s = fpu_stof(fp, hi); - break; - - case DOUBLE: - s = fpu_dtof(fp, hi, lo); - break; - } - - if (s == FPC_QNAN && (fp->fp_mant[0] & FP_QUIETBIT) == 0) { - /* - * Input is a signalling NaN. All operations that return - * an input NaN operand put it through a ``NaN conversion'', - * which basically just means ``turn on the quiet bit''. - * We do this here so that all NaNs internally look quiet - * (we can tell signalling ones by their class). - */ - fp->fp_mant[0] |= FP_QUIETBIT; - fe->fe_cx = FPSCR_VXSNAN; /* assert invalid operand */ - s = FPC_SNAN; - } - fp->fp_class = s; - - return (0); -} - -/* - * Save the high word of a 64-bit GPR for manipulation in the exception handler. - */ -static uint32_t -spe_save_reg_high(int reg) -{ - uint32_t vec[2]; -#define EVSTDW(n) case n: __asm __volatile ("evstdw %1,0(%0)" \ - :: "b"(vec), "n"(n) : "memory"); break; - switch (reg) { - EVSTDW(0); EVSTDW(1); EVSTDW(2); EVSTDW(3); - EVSTDW(4); EVSTDW(5); EVSTDW(6); EVSTDW(7); - EVSTDW(8); EVSTDW(9); EVSTDW(10); EVSTDW(11); - EVSTDW(12); EVSTDW(13); EVSTDW(14); EVSTDW(15); - EVSTDW(16); EVSTDW(17); EVSTDW(18); EVSTDW(19); - EVSTDW(20); EVSTDW(21); EVSTDW(22); EVSTDW(23); - EVSTDW(24); EVSTDW(25); EVSTDW(26); EVSTDW(27); - EVSTDW(28); EVSTDW(29); EVSTDW(30); EVSTDW(31); - } -#undef EVSTDW - - return (vec[0]); -} - -/* - * Load the given value into the high word of the requested register. - */ -static void -spe_load_reg_high(int reg, uint32_t val) -{ -#define EVLDW(n) case n: __asm __volatile("evmergelo "#n",%0,"#n \ - :: "r"(val)); break; - switch (reg) { - EVLDW(1); EVLDW(2); EVLDW(3); EVLDW(4); - EVLDW(5); EVLDW(6); EVLDW(7); EVLDW(8); - EVLDW(9); EVLDW(10); EVLDW(11); EVLDW(12); - EVLDW(13); EVLDW(14); EVLDW(15); EVLDW(16); - EVLDW(17); EVLDW(18); EVLDW(19); EVLDW(20); - EVLDW(21); EVLDW(22); EVLDW(23); EVLDW(24); - EVLDW(25); EVLDW(26); EVLDW(27); EVLDW(28); - EVLDW(29); EVLDW(30); EVLDW(31); EVLDW(0); - } -#undef EVLDW - -} - -void -spe_handle_fpdata(struct trapframe *frame) -{ - struct fpemu fpemu; - struct fpn *result; - uint32_t instr, instr_sec_op; - uint32_t cr_shift, ra, rb, rd, src; - uint32_t high, low, res, tmp; /* For vector operations. */ - uint32_t spefscr = 0; - uint32_t ftod_res[2]; - int width; /* Single, Double, Vector, Integer */ - int err; - uint32_t msr; - - err = fueword32((void *)frame->srr0, &instr); - - if (err != 0) - return; - /* Fault. */; - - if ((instr >> OPC_SHIFT) != SPE_OPC) - return; - - msr = mfmsr(); - /* - * 'cr' field is the upper 3 bits of rd. Magically, since a) rd is 5 - * bits, b) each 'cr' field is 4 bits, and c) Only the 'GT' bit is - * modified for most compare operations, the full value of rd can be - * used as a shift value. - */ - rd = (instr >> 21) & 0x1f; - ra = (instr >> 16) & 0x1f; - rb = (instr >> 11) & 0x1f; - src = (instr >> 5) & 0x7; - cr_shift = 28 - (rd & 0x1f); - - instr_sec_op = (instr & 0x7ff); - - memset(&fpemu, 0, sizeof(fpemu)); - - width = NONE; - switch (src) { - case SPE: - mtmsr(msr | PSL_VEC); - switch (instr_sec_op) { - case EVFSABS: - high = spe_save_reg_high(ra) & ~(1U << 31); - frame->fixreg[rd] = frame->fixreg[ra] & ~(1U << 31); - spe_load_reg_high(rd, high); - break; - case EVFSNABS: - high = spe_save_reg_high(ra) | (1U << 31); - frame->fixreg[rd] = frame->fixreg[ra] | (1U << 31); - spe_load_reg_high(rd, high); - break; - case EVFSNEG: - high = spe_save_reg_high(ra) ^ (1U << 31); - frame->fixreg[rd] = frame->fixreg[ra] ^ (1U << 31); - spe_load_reg_high(rd, high); - break; - default: - /* High word */ - spe_explode(&fpemu, &fpemu.fe_f1, SINGLE, - spe_save_reg_high(ra), 0); - spe_explode(&fpemu, &fpemu.fe_f2, SINGLE, - spe_save_reg_high(rb), 0); - high = spe_emu_instr(instr_sec_op, &fpemu, &result, - &tmp); - - if (high < 0) - spe_load_reg_high(rd, tmp); - - spefscr = fpscr_to_spefscr(fpemu.fe_cx) << 16; - /* Clear the fpemu to start over on the lower bits. */ - memset(&fpemu, 0, sizeof(fpemu)); - - /* Now low word */ - spe_explode(&fpemu, &fpemu.fe_f1, SINGLE, - frame->fixreg[ra], 0); - spe_explode(&fpemu, &fpemu.fe_f2, SINGLE, - frame->fixreg[rb], 0); - spefscr |= fpscr_to_spefscr(fpemu.fe_cx); - low = spe_emu_instr(instr_sec_op, &fpemu, &result, - &frame->fixreg[rd]); - if (instr_sec_op == EVFSCMPEQ || - instr_sec_op == EVFSCMPGT || - instr_sec_op == EVFSCMPLT) { - res = (high << 3) | (low << 2) | - ((high | low) << 1) | (high & low); - width = NONE; - } else - width = VECTOR; - break; - } - goto end; - - case SPFP: - switch (instr_sec_op) { - case EFSABS: - frame->fixreg[rd] = frame->fixreg[ra] & ~(1U << 31); - break; - case EFSNABS: - frame->fixreg[rd] = frame->fixreg[ra] | (1U << 31); - break; - case EFSNEG: - frame->fixreg[rd] = frame->fixreg[ra] ^ (1U << 31); - break; - case EFSCFD: - mtmsr(msr | PSL_VEC); - spe_explode(&fpemu, &fpemu.fe_f3, DOUBLE, - spe_save_reg_high(rb), frame->fixreg[rb]); - result = &fpemu.fe_f3; - width = SINGLE; - break; - default: - spe_explode(&fpemu, &fpemu.fe_f1, SINGLE, - frame->fixreg[ra], 0); - spe_explode(&fpemu, &fpemu.fe_f2, SINGLE, - frame->fixreg[rb], 0); - width = SINGLE; - } - break; - case DPFP: - mtmsr(msr | PSL_VEC); - switch (instr_sec_op) { - case EFDABS: - high = spe_save_reg_high(ra) & ~(1U << 31); - frame->fixreg[rd] = frame->fixreg[ra]; - spe_load_reg_high(rd, high); - break; - case EFDNABS: - high = spe_save_reg_high(ra) | (1U << 31); - frame->fixreg[rd] = frame->fixreg[ra]; - spe_load_reg_high(rd, high); - break; - case EFDNEG: - high = spe_save_reg_high(ra) ^ (1U << 31); - frame->fixreg[rd] = frame->fixreg[ra]; - spe_load_reg_high(rd, high); - break; - case EFDCFS: - spe_explode(&fpemu, &fpemu.fe_f3, SINGLE, - frame->fixreg[rb], 0); - result = &fpemu.fe_f3; - width = DOUBLE; - break; - default: - spe_explode(&fpemu, &fpemu.fe_f1, DOUBLE, - spe_save_reg_high(ra), frame->fixreg[ra]); - spe_explode(&fpemu, &fpemu.fe_f2, DOUBLE, - spe_save_reg_high(rb), frame->fixreg[rb]); - width = DOUBLE; - } - break; - } - switch (instr_sec_op) { - case EFDCFS: - case EFSCFD: - /* Already handled. */ - break; - default: - res = spe_emu_instr(instr_sec_op, &fpemu, &result, - &frame->fixreg[rd]); - if (res != -1) - res <<= 2; - break; - } - - switch (instr_sec_op & SPE_INST_MASK) { - case ECMPEQ: - case ECMPGT: - case ECMPLT: - frame->cr &= ~(0xf << cr_shift); - frame->cr |= (res << cr_shift); - break; - case ECTUI: - case ECTUIZ: - case ECTSI: - case ECTSIZ: - break; - default: - switch (width) { - case NONE: - case VECTOR: - break; - case SINGLE: - frame->fixreg[rd] = fpu_ftos(&fpemu, result); - break; - case DOUBLE: - spe_load_reg_high(rd, fpu_ftod(&fpemu, result, ftod_res)); - frame->fixreg[rd] = ftod_res[1]; - break; - default: - panic("Unknown storage width %d", width); - break; - } - } - -end: - spefscr |= (mfspr(SPR_SPEFSCR) & ~SPEFSCR_FINVS); - mtspr(SPR_SPEFSCR, spefscr); - frame->srr0 += 4; - mtmsr(msr); - - return; -} - -void -spe_handle_fpround(struct trapframe *frame) -{ - - /* - * Punt fpround exceptions for now. This leaves the truncated result in - * the register. We'll deal with overflow/underflow later. - */ - return; -} diff --git a/sys/powerpc/booke/trap_subr.S b/sys/powerpc/booke/trap_subr.S deleted file mode 100644 index a9310f0e35d..00000000000 --- a/sys/powerpc/booke/trap_subr.S +++ /dev/null @@ -1,1135 +0,0 @@ -/*- - * Copyright (C) 2006-2009 Semihalf, Rafal Jaworowski - * Copyright (C) 2006 Semihalf, Marian Balakowicz - * Copyright (C) 2006 Juniper Networks, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * from: $NetBSD: trap_subr.S,v 1.20 2002/04/22 23:20:08 kleink Exp $ - */ - -/* - * NOTICE: This is not a standalone file. to use it, #include it in - * your port's locore.S, like so: - * - * #include - */ - -/* - * SPRG usage notes - * - * SPRG0 - pcpu pointer - * SPRG1 - all interrupts except TLB miss, critical, machine check - * SPRG2 - critical - * SPRG3 - machine check - * SPRG4-6 - scratch - * - */ - -/* Get the per-CPU data structure */ -#define GET_CPUINFO(r) mfsprg0 r - -#define RES_GRANULE 64 -#define RES_LOCK 0 /* offset to the 'lock' word */ -#ifdef __powerpc64__ -#define RES_RECURSE 8 /* offset to the 'recurse' word */ -#else -#define RES_RECURSE 4 /* offset to the 'recurse' word */ -#endif - -/* - * Standard interrupt prolog - * - * sprg_sp - SPRG{1-3} reg used to temporarily store the SP - * savearea - temp save area (pc_{tempsave, disisave, critsave, mchksave}) - * isrr0-1 - save restore registers with CPU state at interrupt time (may be - * SRR0-1, CSRR0-1, MCSRR0-1 - * - * 1. saves in the given savearea: - * - R30-31 - * - DEAR, ESR - * - xSRR0-1 - * - * 2. saves CR -> R30 - * - * 3. switches to kstack if needed - * - * 4. notes: - * - R31 can be used as scratch register until a new frame is laid on - * the stack with FRAME_SETUP - * - * - potential TLB miss: NO. Saveareas are always acessible via TLB1 - * permanent entries, and within this prolog we do not dereference any - * locations potentially not in the TLB - */ -#define STANDARD_PROLOG(sprg_sp, savearea, isrr0, isrr1) \ - mtspr sprg_sp, %r1; /* Save SP */ \ - GET_CPUINFO(%r1); /* Per-cpu structure */ \ - STORE %r30, (savearea+CPUSAVE_R30)(%r1); \ - STORE %r31, (savearea+CPUSAVE_R31)(%r1); \ - mfspr %r30, SPR_DEAR; \ - mfspr %r31, SPR_ESR; \ - STORE %r30, (savearea+CPUSAVE_BOOKE_DEAR)(%r1); \ - STORE %r31, (savearea+CPUSAVE_BOOKE_ESR)(%r1); \ - mfspr %r30, isrr0; \ - mfspr %r31, isrr1; /* MSR at interrupt time */ \ - STORE %r30, (savearea+CPUSAVE_SRR0)(%r1); \ - STORE %r31, (savearea+CPUSAVE_SRR1)(%r1); \ - isync; \ - mfspr %r1, sprg_sp; /* Restore SP */ \ - mfcr %r30; /* Save CR */ \ - /* switch to per-thread kstack if intr taken in user mode */ \ - mtcr %r31; /* MSR at interrupt time */ \ - bf 17, 1f; \ - GET_CPUINFO(%r1); /* Per-cpu structure */ \ - LOAD %r1, PC_CURPCB(%r1); /* Per-thread kernel stack */ \ -1: - -#define STANDARD_CRIT_PROLOG(sprg_sp, savearea, isrr0, isrr1) \ - mtspr sprg_sp, %r1; /* Save SP */ \ - GET_CPUINFO(%r1); /* Per-cpu structure */ \ - STORE %r30, (savearea+CPUSAVE_R30)(%r1); \ - STORE %r31, (savearea+CPUSAVE_R31)(%r1); \ - mfspr %r30, SPR_DEAR; \ - mfspr %r31, SPR_ESR; \ - STORE %r30, (savearea+CPUSAVE_BOOKE_DEAR)(%r1); \ - STORE %r31, (savearea+CPUSAVE_BOOKE_ESR)(%r1); \ - mfspr %r30, isrr0; \ - mfspr %r31, isrr1; /* MSR at interrupt time */ \ - STORE %r30, (savearea+CPUSAVE_SRR0)(%r1); \ - STORE %r31, (savearea+CPUSAVE_SRR1)(%r1); \ - mfspr %r30, SPR_SRR0; \ - mfspr %r31, SPR_SRR1; /* MSR at interrupt time */ \ - STORE %r30, (savearea+BOOKE_CRITSAVE_SRR0)(%r1); \ - STORE %r31, (savearea+BOOKE_CRITSAVE_SRR1)(%r1); \ - isync; \ - mfspr %r1, sprg_sp; /* Restore SP */ \ - mfcr %r30; /* Save CR */ \ - /* switch to per-thread kstack if intr taken in user mode */ \ - mtcr %r31; /* MSR at interrupt time */ \ - bf 17, 1f; \ - GET_CPUINFO(%r1); /* Per-cpu structure */ \ - LOAD %r1, PC_CURPCB(%r1); /* Per-thread kernel stack */ \ -1: - -/* - * FRAME_SETUP assumes: - * SPRG{1-3} SP at the time interrupt occurred - * savearea r30-r31, DEAR, ESR, xSRR0-1 - * r30 CR - * r31 scratch - * r1 kernel stack - * - * sprg_sp - SPRG reg containing SP at the time interrupt occurred - * savearea - temp save - * exc - exception number (EXC_xxx) - * - * 1. sets a new frame - * 2. saves in the frame: - * - R0, R1 (SP at the time of interrupt), R2, LR, CR - * - R3-31 (R30-31 first restored from savearea) - * - XER, CTR, DEAR, ESR (from savearea), xSRR0-1 - * - * Notes: - * - potential TLB miss: YES, since we make dereferences to kstack, which - * can happen not covered (we can have up to two DTLB misses if fortunate - * enough i.e. when kstack crosses page boundary and both pages are - * untranslated) - */ -#ifdef __powerpc64__ -#define SAVE_REGS(r) \ - std %r3, FRAME_3+CALLSIZE(r); \ - std %r4, FRAME_4+CALLSIZE(r); \ - std %r5, FRAME_5+CALLSIZE(r); \ - std %r6, FRAME_6+CALLSIZE(r); \ - std %r7, FRAME_7+CALLSIZE(r); \ - std %r8, FRAME_8+CALLSIZE(r); \ - std %r9, FRAME_9+CALLSIZE(r); \ - std %r10, FRAME_10+CALLSIZE(r); \ - std %r11, FRAME_11+CALLSIZE(r); \ - std %r12, FRAME_12+CALLSIZE(r); \ - std %r13, FRAME_13+CALLSIZE(r); \ - std %r14, FRAME_14+CALLSIZE(r); \ - std %r15, FRAME_15+CALLSIZE(r); \ - std %r16, FRAME_16+CALLSIZE(r); \ - std %r17, FRAME_17+CALLSIZE(r); \ - std %r18, FRAME_18+CALLSIZE(r); \ - std %r19, FRAME_19+CALLSIZE(r); \ - std %r20, FRAME_20+CALLSIZE(r); \ - std %r21, FRAME_21+CALLSIZE(r); \ - std %r22, FRAME_22+CALLSIZE(r); \ - std %r23, FRAME_23+CALLSIZE(r); \ - std %r24, FRAME_24+CALLSIZE(r); \ - std %r25, FRAME_25+CALLSIZE(r); \ - std %r26, FRAME_26+CALLSIZE(r); \ - std %r27, FRAME_27+CALLSIZE(r); \ - std %r28, FRAME_28+CALLSIZE(r); \ - std %r29, FRAME_29+CALLSIZE(r); \ - std %r30, FRAME_30+CALLSIZE(r); \ - std %r31, FRAME_31+CALLSIZE(r) -#define LD_REGS(r) \ - ld %r3, FRAME_3+CALLSIZE(r); \ - ld %r4, FRAME_4+CALLSIZE(r); \ - ld %r5, FRAME_5+CALLSIZE(r); \ - ld %r6, FRAME_6+CALLSIZE(r); \ - ld %r7, FRAME_7+CALLSIZE(r); \ - ld %r8, FRAME_8+CALLSIZE(r); \ - ld %r9, FRAME_9+CALLSIZE(r); \ - ld %r10, FRAME_10+CALLSIZE(r); \ - ld %r11, FRAME_11+CALLSIZE(r); \ - ld %r12, FRAME_12+CALLSIZE(r); \ - ld %r13, FRAME_13+CALLSIZE(r); \ - ld %r14, FRAME_14+CALLSIZE(r); \ - ld %r15, FRAME_15+CALLSIZE(r); \ - ld %r16, FRAME_16+CALLSIZE(r); \ - ld %r17, FRAME_17+CALLSIZE(r); \ - ld %r18, FRAME_18+CALLSIZE(r); \ - ld %r19, FRAME_19+CALLSIZE(r); \ - ld %r20, FRAME_20+CALLSIZE(r); \ - ld %r21, FRAME_21+CALLSIZE(r); \ - ld %r22, FRAME_22+CALLSIZE(r); \ - ld %r23, FRAME_23+CALLSIZE(r); \ - ld %r24, FRAME_24+CALLSIZE(r); \ - ld %r25, FRAME_25+CALLSIZE(r); \ - ld %r26, FRAME_26+CALLSIZE(r); \ - ld %r27, FRAME_27+CALLSIZE(r); \ - ld %r28, FRAME_28+CALLSIZE(r); \ - ld %r29, FRAME_29+CALLSIZE(r); \ - ld %r30, FRAME_30+CALLSIZE(r); \ - ld %r31, FRAME_31+CALLSIZE(r) -#else -#define SAVE_REGS(r) \ - stmw %r3, FRAME_3+CALLSIZE(r) -#define LD_REGS(r) \ - lmw %r3, FRAME_3+CALLSIZE(r) -#endif -#define FRAME_SETUP(sprg_sp, savearea, exc) \ - mfspr %r31, sprg_sp; /* get saved SP */ \ - /* establish a new stack frame and put everything on it */ \ - STU %r31, -(FRAMELEN+REDZONE)(%r1); \ - STORE %r0, FRAME_0+CALLSIZE(%r1); /* save r0 in the trapframe */ \ - STORE %r31, FRAME_1+CALLSIZE(%r1); /* save SP " " */ \ - STORE %r2, FRAME_2+CALLSIZE(%r1); /* save r2 " " */ \ - mflr %r31; \ - STORE %r31, FRAME_LR+CALLSIZE(%r1); /* save LR " " */ \ - STORE %r30, FRAME_CR+CALLSIZE(%r1); /* save CR " " */ \ - GET_CPUINFO(%r2); \ - LOAD %r30, (savearea+CPUSAVE_R30)(%r2); /* get saved r30 */ \ - LOAD %r31, (savearea+CPUSAVE_R31)(%r2); /* get saved r31 */ \ - /* save R3-31 */ \ - SAVE_REGS(%r1); \ - /* save DEAR, ESR */ \ - LOAD %r28, (savearea+CPUSAVE_BOOKE_DEAR)(%r2); \ - LOAD %r29, (savearea+CPUSAVE_BOOKE_ESR)(%r2); \ - STORE %r28, FRAME_BOOKE_DEAR+CALLSIZE(%r1); \ - STORE %r29, FRAME_BOOKE_ESR+CALLSIZE(%r1); \ - /* save XER, CTR, exc number */ \ - mfxer %r3; \ - mfctr %r4; \ - STORE %r3, FRAME_XER+CALLSIZE(%r1); \ - STORE %r4, FRAME_CTR+CALLSIZE(%r1); \ - li %r5, exc; \ - STORE %r5, FRAME_EXC+CALLSIZE(%r1); \ - /* save DBCR0 */ \ - mfspr %r3, SPR_DBCR0; \ - STORE %r3, FRAME_BOOKE_DBCR0+CALLSIZE(%r1); \ - /* save xSSR0-1 */ \ - LOAD %r30, (savearea+CPUSAVE_SRR0)(%r2); \ - LOAD %r31, (savearea+CPUSAVE_SRR1)(%r2); \ - STORE %r30, FRAME_SRR0+CALLSIZE(%r1); \ - STORE %r31, FRAME_SRR1+CALLSIZE(%r1); \ - LOAD THREAD_REG, PC_CURTHREAD(%r2); \ - -/* - * - * isrr0-1 - save restore registers to restore CPU state to (may be - * SRR0-1, CSRR0-1, MCSRR0-1 - * - * Notes: - * - potential TLB miss: YES. The deref'd kstack may be not covered - */ -#define FRAME_LEAVE(isrr0, isrr1) \ - wrteei 0; \ - /* restore CTR, XER, LR, CR */ \ - LOAD %r4, FRAME_CTR+CALLSIZE(%r1); \ - LOAD %r5, FRAME_XER+CALLSIZE(%r1); \ - LOAD %r6, FRAME_LR+CALLSIZE(%r1); \ - LOAD %r7, FRAME_CR+CALLSIZE(%r1); \ - mtctr %r4; \ - mtxer %r5; \ - mtlr %r6; \ - mtcr %r7; \ - /* restore DBCR0 */ \ - LOAD %r4, FRAME_BOOKE_DBCR0+CALLSIZE(%r1); \ - mtspr SPR_DBCR0, %r4; \ - /* restore xSRR0-1 */ \ - LOAD %r30, FRAME_SRR0+CALLSIZE(%r1); \ - LOAD %r31, FRAME_SRR1+CALLSIZE(%r1); \ - mtspr isrr0, %r30; \ - mtspr isrr1, %r31; \ - /* restore R2-31, SP */ \ - LD_REGS(%r1); \ - LOAD %r2, FRAME_2+CALLSIZE(%r1); \ - LOAD %r0, FRAME_0+CALLSIZE(%r1); \ - LOAD %r1, FRAME_1+CALLSIZE(%r1); \ - isync - -/* - * TLB miss prolog - * - * saves LR, CR, SRR0-1, R20-31 in the TLBSAVE area - * - * Notes: - * - potential TLB miss: NO. It is crucial that we do not generate a TLB - * miss within the TLB prolog itself! - * - TLBSAVE is always translated - */ -#ifdef __powerpc64__ -#define TLB_SAVE_REGS(br) \ - std %r20, (TLBSAVE_BOOKE_R20)(br); \ - std %r21, (TLBSAVE_BOOKE_R21)(br); \ - std %r22, (TLBSAVE_BOOKE_R22)(br); \ - std %r23, (TLBSAVE_BOOKE_R23)(br); \ - std %r24, (TLBSAVE_BOOKE_R24)(br); \ - std %r25, (TLBSAVE_BOOKE_R25)(br); \ - std %r26, (TLBSAVE_BOOKE_R26)(br); \ - std %r27, (TLBSAVE_BOOKE_R27)(br); \ - std %r28, (TLBSAVE_BOOKE_R28)(br); \ - std %r29, (TLBSAVE_BOOKE_R29)(br); \ - std %r30, (TLBSAVE_BOOKE_R30)(br); \ - std %r31, (TLBSAVE_BOOKE_R31)(br); -#define TLB_RESTORE_REGS(br) \ - ld %r20, (TLBSAVE_BOOKE_R20)(br); \ - ld %r21, (TLBSAVE_BOOKE_R21)(br); \ - ld %r22, (TLBSAVE_BOOKE_R22)(br); \ - ld %r23, (TLBSAVE_BOOKE_R23)(br); \ - ld %r24, (TLBSAVE_BOOKE_R24)(br); \ - ld %r25, (TLBSAVE_BOOKE_R25)(br); \ - ld %r26, (TLBSAVE_BOOKE_R26)(br); \ - ld %r27, (TLBSAVE_BOOKE_R27)(br); \ - ld %r28, (TLBSAVE_BOOKE_R28)(br); \ - ld %r29, (TLBSAVE_BOOKE_R29)(br); \ - ld %r30, (TLBSAVE_BOOKE_R30)(br); \ - ld %r31, (TLBSAVE_BOOKE_R31)(br); -#define TLB_NEST(outr,inr) \ - rlwinm outr, inr, 7, 23, 24; /* 8 x TLBSAVE_LEN */ -#else -#define TLB_SAVE_REGS(br) \ - stmw %r20, TLBSAVE_BOOKE_R20(br) -#define TLB_RESTORE_REGS(br) \ - lmw %r20, TLBSAVE_BOOKE_R20(br) -#define TLB_NEST(outr,inr) \ - rlwinm outr, inr, 6, 24, 25; /* 4 x TLBSAVE_LEN */ -#endif -#define TLB_PROLOG \ - mtspr SPR_SPRG4, %r1; /* Save SP */ \ - mtspr SPR_SPRG5, %r28; \ - mtspr SPR_SPRG6, %r29; \ - /* calculate TLB nesting level and TLBSAVE instance address */ \ - GET_CPUINFO(%r1); /* Per-cpu structure */ \ - LOAD %r28, PC_BOOKE_TLB_LEVEL(%r1); \ - TLB_NEST(%r29,%r28); \ - addi %r28, %r28, 1; \ - STORE %r28, PC_BOOKE_TLB_LEVEL(%r1); \ - addi %r29, %r29, PC_BOOKE_TLBSAVE@l; \ - add %r1, %r1, %r29; /* current TLBSAVE ptr */ \ - \ - /* save R20-31 */ \ - mfspr %r28, SPR_SPRG5; \ - mfspr %r29, SPR_SPRG6; \ - TLB_SAVE_REGS(%r1); \ - /* save LR, CR */ \ - mflr %r30; \ - mfcr %r31; \ - STORE %r30, (TLBSAVE_BOOKE_LR)(%r1); \ - STORE %r31, (TLBSAVE_BOOKE_CR)(%r1); \ - /* save SRR0-1 */ \ - mfsrr0 %r30; /* execution addr at interrupt time */ \ - mfsrr1 %r31; /* MSR at interrupt time*/ \ - STORE %r30, (TLBSAVE_BOOKE_SRR0)(%r1); /* save SRR0 */ \ - STORE %r31, (TLBSAVE_BOOKE_SRR1)(%r1); /* save SRR1 */ \ - isync; \ - mfspr %r1, SPR_SPRG4 - -/* - * restores LR, CR, SRR0-1, R20-31 from the TLBSAVE area - * - * same notes as for the TLB_PROLOG - */ -#define TLB_RESTORE \ - mtspr SPR_SPRG4, %r1; /* Save SP */ \ - GET_CPUINFO(%r1); /* Per-cpu structure */ \ - /* calculate TLB nesting level and TLBSAVE instance addr */ \ - LOAD %r28, PC_BOOKE_TLB_LEVEL(%r1); \ - subi %r28, %r28, 1; \ - STORE %r28, PC_BOOKE_TLB_LEVEL(%r1); \ - TLB_NEST(%r29,%r28); \ - addi %r29, %r29, PC_BOOKE_TLBSAVE@l; \ - add %r1, %r1, %r29; \ - \ - /* restore LR, CR */ \ - LOAD %r30, (TLBSAVE_BOOKE_LR)(%r1); \ - LOAD %r31, (TLBSAVE_BOOKE_CR)(%r1); \ - mtlr %r30; \ - mtcr %r31; \ - /* restore SRR0-1 */ \ - LOAD %r30, (TLBSAVE_BOOKE_SRR0)(%r1); \ - LOAD %r31, (TLBSAVE_BOOKE_SRR1)(%r1); \ - mtsrr0 %r30; \ - mtsrr1 %r31; \ - /* restore R20-31 */ \ - TLB_RESTORE_REGS(%r1); \ - mfspr %r1, SPR_SPRG4 - -#ifdef SMP -#define TLB_LOCK \ - GET_CPUINFO(%r20); \ - LOAD %r21, PC_CURTHREAD(%r20); \ - LOAD %r22, PC_BOOKE_TLB_LOCK(%r20); \ - \ -1: LOADX %r23, 0, %r22; \ - CMPI %r23, TLB_UNLOCKED; \ - beq 2f; \ - \ - /* check if this is recursion */ \ - CMPL cr0, %r21, %r23; \ - bne- 1b; \ - \ -2: /* try to acquire lock */ \ - STOREX %r21, 0, %r22; \ - bne- 1b; \ - \ - /* got it, update recursion counter */ \ - lwz %r21, RES_RECURSE(%r22); \ - addi %r21, %r21, 1; \ - stw %r21, RES_RECURSE(%r22); \ - isync; \ - msync - -#define TLB_UNLOCK \ - GET_CPUINFO(%r20); \ - LOAD %r21, PC_CURTHREAD(%r20); \ - LOAD %r22, PC_BOOKE_TLB_LOCK(%r20); \ - \ - /* update recursion counter */ \ - lwz %r23, RES_RECURSE(%r22); \ - subi %r23, %r23, 1; \ - stw %r23, RES_RECURSE(%r22); \ - \ - cmplwi %r23, 0; \ - bne 1f; \ - isync; \ - msync; \ - \ - /* release the lock */ \ - li %r23, TLB_UNLOCKED; \ - STORE %r23, 0(%r22); \ -1: isync; \ - msync -#else -#define TLB_LOCK -#define TLB_UNLOCK -#endif /* SMP */ - -#define INTERRUPT(label) \ - .globl label; \ - .align 5; \ - CNAME(label): - -/* - * Interrupt handling routines in BookE can be flexibly placed and do not have - * to live in pre-defined vectors location. Note they need to be TLB-mapped at - * all times in order to be able to handle exceptions. We thus arrange for - * them to be part of kernel text which is always TLB-accessible. - * - * The interrupt handling routines have to be 16 bytes aligned: we align them - * to 32 bytes (cache line length) which supposedly performs better. - * - */ - .text - .globl CNAME(interrupt_vector_base) - .align 5 -interrupt_vector_base: -/***************************************************************************** - * Catch-all handler to handle uninstalled IVORs - ****************************************************************************/ -INTERRUPT(int_unknown) - STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) - FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_RSVD) - b trap_common - -/***************************************************************************** - * Critical input interrupt - ****************************************************************************/ -INTERRUPT(int_critical_input) - STANDARD_CRIT_PROLOG(SPR_SPRG2, PC_BOOKE_CRITSAVE, SPR_CSRR0, SPR_CSRR1) - FRAME_SETUP(SPR_SPRG2, PC_BOOKE_CRITSAVE, EXC_CRIT) - GET_TOCBASE(%r2) - addi %r3, %r1, CALLSIZE - bl CNAME(powerpc_interrupt) - TOC_RESTORE - FRAME_LEAVE(SPR_CSRR0, SPR_CSRR1) - rfci - - -/***************************************************************************** - * Machine check interrupt - ****************************************************************************/ -INTERRUPT(int_machine_check) - STANDARD_PROLOG(SPR_SPRG3, PC_BOOKE_MCHKSAVE, SPR_MCSRR0, SPR_MCSRR1) - FRAME_SETUP(SPR_SPRG3, PC_BOOKE_MCHKSAVE, EXC_MCHK) - GET_TOCBASE(%r2) - addi %r3, %r1, CALLSIZE - bl CNAME(powerpc_interrupt) - TOC_RESTORE - FRAME_LEAVE(SPR_MCSRR0, SPR_MCSRR1) - rfmci - - -/***************************************************************************** - * Data storage interrupt - ****************************************************************************/ -INTERRUPT(int_data_storage) - STANDARD_PROLOG(SPR_SPRG1, PC_DISISAVE, SPR_SRR0, SPR_SRR1) - FRAME_SETUP(SPR_SPRG1, PC_DISISAVE, EXC_DSI) - b trap_common - - -/***************************************************************************** - * Instruction storage interrupt - ****************************************************************************/ -INTERRUPT(int_instr_storage) - STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) - FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_ISI) - b trap_common - - -/***************************************************************************** - * External input interrupt - ****************************************************************************/ -INTERRUPT(int_external_input) - STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) - FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_EXI) - b trap_common - - -INTERRUPT(int_alignment) - STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) - FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_ALI) - b trap_common - - -INTERRUPT(int_program) - STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) - FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_PGM) - b trap_common - - -INTERRUPT(int_fpu) - STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) - FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_FPU) - b trap_common - - -/***************************************************************************** - * System call - ****************************************************************************/ -INTERRUPT(int_syscall) - STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) - FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_SC) - b trap_common - - -/***************************************************************************** - * Decrementer interrupt - ****************************************************************************/ -INTERRUPT(int_decrementer) - STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) - FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_DECR) - b trap_common - - -/***************************************************************************** - * Fixed interval timer - ****************************************************************************/ -INTERRUPT(int_fixed_interval_timer) - STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) - FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_FIT) - b trap_common - - -/***************************************************************************** - * Watchdog interrupt - ****************************************************************************/ -INTERRUPT(int_watchdog) - STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) - FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_WDOG) - b trap_common - - -/***************************************************************************** - * Altivec Unavailable interrupt - ****************************************************************************/ -INTERRUPT(int_vec) - STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) - FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_VEC) - b trap_common - - -/***************************************************************************** - * Altivec Assist interrupt - ****************************************************************************/ -INTERRUPT(int_vecast) - STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) - FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_VECAST_E) - b trap_common - - -#ifdef __SPE__ -/***************************************************************************** - * Floating point Assist interrupt - ****************************************************************************/ -INTERRUPT(int_spe_fpdata) - STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) - FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_SPFPD) - addi %r3, %r1, CALLSIZE - bl spe_handle_fpdata - FRAME_LEAVE(SPR_SRR0, SPR_SRR1) - rfi - -INTERRUPT(int_spe_fpround) - STANDARD_PROLOG(SPR_SPRG1, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) - FRAME_SETUP(SPR_SPRG1, PC_TEMPSAVE, EXC_SPFPR) - addi %r3, %r1, CALLSIZE - bl spe_handle_fpround - FRAME_LEAVE(SPR_SRR0, SPR_SRR1) - rfi -#endif - - -#ifdef HWPMC_HOOKS -/***************************************************************************** - * PMC Interrupt - ****************************************************************************/ -INTERRUPT(int_performance_counter) - STANDARD_PROLOG(SPR_SPRG3, PC_TEMPSAVE, SPR_SRR0, SPR_SRR1) - FRAME_SETUP(SPR_SPRG3, PC_TEMPSAVE, EXC_PERF) - b trap_common -#endif - - -/***************************************************************************** - * Data TLB miss interrupt - * - * There can be nested TLB misses - while handling a TLB miss we reference - * data structures that may be not covered by translations. We support up to - * TLB_NESTED_MAX-1 nested misses. - * - * Registers use: - * r31 - dear - * r30 - unused - * r29 - saved mas0 - * r28 - saved mas1 - * r27 - saved mas2 - * r26 - pmap address - * r25 - pte address - * - * r20:r23 - scratch registers - ****************************************************************************/ -INTERRUPT(int_data_tlb_error) - TLB_PROLOG - TLB_LOCK - - mfspr %r31, SPR_DEAR - - /* - * Save MAS0-MAS2 registers. There might be another tlb miss during - * pte lookup overwriting current contents (which was hw filled). - */ - mfspr %r29, SPR_MAS0 - mfspr %r28, SPR_MAS1 - mfspr %r27, SPR_MAS2 - - /* Check faulting address. */ - LOAD_ADDR(%r21, VM_MAXUSER_ADDRESS) - CMPL cr0, %r31, %r21 - blt search_user_pmap - - /* If it's kernel address, allow only supervisor mode misses. */ - mfsrr1 %r21 - mtcr %r21 - bt 17, search_failed /* check MSR[PR] */ - -#ifdef __powerpc64__ - srdi %r21, %r31, 48 - cmpldi cr0, %r21, VM_MIN_KERNEL_ADDRESS@highest -#else - lis %r21, VM_MIN_KERNEL_ADDRESS@h - cmplw cr0, %r31, %r21 -#endif - blt search_failed - -search_kernel_pmap: - /* Load r26 with kernel_pmap address */ - bl 1f -#ifdef __powerpc64__ - .llong kernel_pmap_store-. -#else - .long kernel_pmap_store-. -#endif -1: mflr %r21 - LOAD %r26, 0(%r21) - add %r26, %r21, %r26 /* kernel_pmap_store in r26 */ - - /* Force kernel tid, set TID to 0 in MAS1. */ - li %r21, 0 - rlwimi %r28, %r21, 0, 8, 15 /* clear TID bits */ - -tlb_miss_handle: - /* This may result in nested tlb miss. */ - bl pte_lookup /* returns PTE address in R25 */ - - CMPI %r25, 0 /* pte found? */ - beq search_failed - - /* Finish up, write TLB entry. */ - bl tlb_fill_entry - -tlb_miss_return: - TLB_UNLOCK - TLB_RESTORE - rfi - -search_user_pmap: - /* Load r26 with current user space process pmap */ - GET_CPUINFO(%r26) - LOAD %r26, PC_CURPMAP(%r26) - - b tlb_miss_handle - -search_failed: - /* - * Whenever we don't find a TLB mapping in PT, set a TLB0 entry with - * the faulting virtual address anyway, but put a fake RPN and no - * access rights. This should cause a following {D,I}SI exception. - */ - lis %r23, 0xffff0000@h /* revoke all permissions */ - - /* Load MAS registers. */ - mtspr SPR_MAS0, %r29 - mtspr SPR_MAS1, %r28 - mtspr SPR_MAS2, %r27 - mtspr SPR_MAS3, %r23 - - li %r23, 0 - mtspr SPR_MAS7, %r23 - - isync - tlbwe - msync - isync - b tlb_miss_return - -/***************************************************************************** - * - * Return pte address that corresponds to given pmap/va. If there is no valid - * entry return 0. - * - * input: r26 - pmap - * input: r31 - dear - * output: r25 - pte address - * - * scratch regs used: r21 - * - ****************************************************************************/ -pte_lookup: - CMPI %r26, 0 - beq 1f /* fail quickly if pmap is invalid */ - -#ifdef __powerpc64__ - rldicl %r21, %r31, (64 - PG_ROOT_L), (64 - PG_ROOT_NUM) /* pp2d offset */ - slwi %r21, %r21, PG_ROOT_ENTRY_SHIFT /* multiply by pp2d entry size */ - ld %r25, PM_ROOT(%r26) /* pmap pm_pp2d[] address */ - ldx %r25, %r25, %r21 /* get pdir address, i.e. pmap->pm_pp2d[pp2d_idx] * */ - - cmpdi %r25, 0 - beq 2f - - rldicl %r21, %r31, (64 - PDIR_L1_L), (64 - PDIR_L1_NUM) /* pp2d offset */ - slwi %r21, %r21, PDIR_L1_ENTRY_SHIFT /* multiply by pp2d entry size */ - ldx %r25, %r25, %r21 /* get pdir address, i.e. pmap->pm_pp2d[pp2d_idx] * */ - - cmpdi %r25, 0 - beq 2f - - rldicl %r21, %r31, (64 - PDIR_L), (64 - PDIR_NUM) /* pdir offset */ - slwi %r21, %r21, PDIR_ENTRY_SHIFT /* multiply by pdir entry size */ - ldx %r25, %r25, %r21 /* get ptbl address, i.e. pmap->pm_pp2d[pp2d_idx][pdir_idx] */ - - cmpdi %r25, 0 - beq 2f - - rldicl %r21, %r31, (64 - PTBL_L), (64 - PTBL_NUM) /* ptbl offset */ - slwi %r21, %r21, PTBL_ENTRY_SHIFT /* multiply by pte entry size */ - -#else - srwi %r21, %r31, PDIR_SHIFT /* pdir offset */ - slwi %r21, %r21, PDIR_ENTRY_SHIFT /* multiply by pdir entry size */ - - lwz %r25, PM_PDIR(%r26) /* pmap pm_dir[] address */ - /* - * Get ptbl address, i.e. pmap->pm_pdir[pdir_idx] - * This load may cause a Data TLB miss for non-kernel pmap! - */ - lwzx %r25, %r25, %r21 /* offset within pm_pdir[] table */ - cmpwi %r25, 0 - beq 2f - - lis %r21, PTBL_MASK@h - ori %r21, %r21, PTBL_MASK@l - and %r21, %r21, %r31 - - /* ptbl offset, multiply by ptbl entry size */ - srwi %r21, %r21, (PTBL_SHIFT - PTBL_ENTRY_SHIFT) -#endif - - add %r25, %r25, %r21 /* address of pte entry */ - /* - * Get pte->flags - * This load may cause a Data TLB miss for non-kernel pmap! - */ - lwz %r21, PTE_FLAGS(%r25) - andi. %r21, %r21, PTE_VALID@l - bne 2f -1: - li %r25, 0 -2: - blr - -/***************************************************************************** - * - * Load MAS1-MAS3 registers with data, write TLB entry - * - * input: - * r29 - mas0 - * r28 - mas1 - * r27 - mas2 - * r25 - pte - * - * output: none - * - * scratch regs: r21-r23 - * - ****************************************************************************/ -tlb_fill_entry: - /* - * Update PTE flags: we have to do it atomically, as pmap_protect() - * running on other CPUs could attempt to update the flags at the same - * time. - */ - li %r23, PTE_FLAGS -1: - lwarx %r21, %r23, %r25 /* get pte->flags */ - oris %r21, %r21, PTE_REFERENCED@h /* set referenced bit */ - - andi. %r22, %r21, (PTE_SW | PTE_UW)@l /* check if writable */ - beq 2f - ori %r21, %r21, PTE_MODIFIED@l /* set modified bit */ -2: - stwcx. %r21, %r23, %r25 /* write it back */ - bne- 1b - - /* Update MAS2. */ - rlwimi %r27, %r21, 13, 27, 30 /* insert WIMG bits from pte */ - - /* Setup MAS3 value in r23. */ - LOAD %r23, PTE_RPN(%r25) /* get pte->rpn */ -#ifdef __powerpc64__ - rldicr %r22, %r23, 52, 51 /* extract MAS3 portion of RPN */ - rldicl %r23, %r23, 20, 54 /* extract MAS7 portion of RPN */ - - rlwimi %r22, %r21, 30, 26, 31 /* insert protection bits from pte */ -#else - rlwinm %r22, %r23, 20, 0, 11 /* extract MAS3 portion of RPN */ - - rlwimi %r22, %r21, 30, 26, 31 /* insert protection bits from pte */ - rlwimi %r22, %r21, 20, 12, 19 /* insert lower 8 RPN bits to MAS3 */ - rlwinm %r23, %r23, 20, 24, 31 /* MAS7 portion of RPN */ -#endif - - /* Load MAS registers. */ - mtspr SPR_MAS0, %r29 - mtspr SPR_MAS1, %r28 - mtspr SPR_MAS2, %r27 - mtspr SPR_MAS3, %r22 - mtspr SPR_MAS7, %r23 - - isync - tlbwe - isync - msync - blr - -/***************************************************************************** - * Instruction TLB miss interrupt - * - * Same notes as for the Data TLB miss - ****************************************************************************/ -INTERRUPT(int_inst_tlb_error) - TLB_PROLOG - TLB_LOCK - - mfsrr0 %r31 /* faulting address */ - - /* - * Save MAS0-MAS2 registers. There might be another tlb miss during pte - * lookup overwriting current contents (which was hw filled). - */ - mfspr %r29, SPR_MAS0 - mfspr %r28, SPR_MAS1 - mfspr %r27, SPR_MAS2 - - mfsrr1 %r21 - mtcr %r21 - - /* check MSR[PR] */ - bt 17, search_user_pmap - b search_kernel_pmap - - - .globl interrupt_vector_top -interrupt_vector_top: - -/***************************************************************************** - * Debug interrupt - ****************************************************************************/ -INTERRUPT(int_debug) - STANDARD_CRIT_PROLOG(SPR_SPRG2, PC_BOOKE_CRITSAVE, SPR_CSRR0, SPR_CSRR1) - FRAME_SETUP(SPR_SPRG2, PC_BOOKE_CRITSAVE, EXC_DEBUG) - bl int_debug_int - FRAME_LEAVE(SPR_CSRR0, SPR_CSRR1) - rfci - -INTERRUPT(int_debug_ed) - STANDARD_CRIT_PROLOG(SPR_SPRG2, PC_BOOKE_CRITSAVE, SPR_DSRR0, SPR_DSRR1) - FRAME_SETUP(SPR_SPRG2, PC_BOOKE_CRITSAVE, EXC_DEBUG) - bl int_debug_int - FRAME_LEAVE(SPR_DSRR0, SPR_DSRR1) - rfdi - /* .long 0x4c00004e */ - -/* Internal helper for debug interrupt handling. */ -/* Common code between e500v1/v2 and e500mc-based cores. */ -int_debug_int: - mflr %r14 - GET_CPUINFO(%r3) - LOAD %r3, (PC_BOOKE_CRITSAVE+CPUSAVE_SRR0)(%r3) - bl 0f - ADDR(interrupt_vector_base-.) - ADDR(interrupt_vector_top-.) -0: mflr %r5 - LOAD %r4,0(%r5) /* interrupt_vector_base in r4 */ - add %r4,%r4,%r5 - CMPL cr0, %r3, %r4 - blt trap_common - LOAD %r4,WORD_SIZE(%r5) /* interrupt_vector_top in r4 */ - add %r4,%r4,%r5 - addi %r4,%r4,4 - CMPL cr0, %r3, %r4 - bge trap_common - /* Disable single-stepping for the interrupt handlers. */ - LOAD %r3, FRAME_SRR1+CALLSIZE(%r1); - rlwinm %r3, %r3, 0, 23, 21 - STORE %r3, FRAME_SRR1+CALLSIZE(%r1); - /* Restore srr0 and srr1 as they could have been clobbered. */ - GET_CPUINFO(%r4) - LOAD %r3, (PC_BOOKE_CRITSAVE+BOOKE_CRITSAVE_SRR0)(%r4); - mtspr SPR_SRR0, %r3 - LOAD %r4, (PC_BOOKE_CRITSAVE+BOOKE_CRITSAVE_SRR1)(%r4); - mtspr SPR_SRR1, %r4 - mtlr %r14 - blr - -/***************************************************************************** - * Common trap code - ****************************************************************************/ -trap_common: - /* Call C trap dispatcher */ - GET_TOCBASE(%r2) - addi %r3, %r1, CALLSIZE - bl CNAME(powerpc_interrupt) - TOC_RESTORE - - .globl CNAME(trapexit) /* exported for db_backtrace use */ -CNAME(trapexit): - /* disable interrupts */ - wrteei 0 - - /* Test AST pending - makes sense for user process only */ - LOAD %r5, FRAME_SRR1+CALLSIZE(%r1) - mtcr %r5 - bf 17, 1f - - GET_CPUINFO(%r3) - LOAD %r4, PC_CURTHREAD(%r3) - lwz %r4, TD_FLAGS(%r4) - lis %r5, (TDF_ASTPENDING | TDF_NEEDRESCHED)@h - ori %r5, %r5, (TDF_ASTPENDING | TDF_NEEDRESCHED)@l - and. %r4, %r4, %r5 - beq 1f - - /* re-enable interrupts before calling ast() */ - wrteei 1 - - addi %r3, %r1, CALLSIZE - bl CNAME(ast) - TOC_RESTORE - .globl CNAME(asttrapexit) /* db_backtrace code sentinel #2 */ -CNAME(asttrapexit): - b trapexit /* test ast ret value ? */ -1: - FRAME_LEAVE(SPR_SRR0, SPR_SRR1) - rfi - - -#if defined(KDB) -/* - * Deliberate entry to dbtrap - */ - /* .globl CNAME(breakpoint)*/ -ASENTRY_NOPROF(breakpoint) - mtsprg1 %r1 - mfmsr %r3 - mtsrr1 %r3 - li %r4, ~(PSL_EE | PSL_ME)@l - oris %r4, %r4, ~(PSL_EE | PSL_ME)@h - and %r3, %r3, %r4 - mtmsr %r3 /* disable interrupts */ - isync - GET_CPUINFO(%r3) - STORE %r30, (PC_DBSAVE+CPUSAVE_R30)(%r3) - STORE %r31, (PC_DBSAVE+CPUSAVE_R31)(%r3) - - mflr %r31 - mtsrr0 %r31 - - mfspr %r30, SPR_DEAR - mfspr %r31, SPR_ESR - STORE %r30, (PC_DBSAVE+CPUSAVE_BOOKE_DEAR)(%r3) - STORE %r31, (PC_DBSAVE+CPUSAVE_BOOKE_ESR)(%r3) - - mfsrr0 %r30 - mfsrr1 %r31 - STORE %r30, (PC_DBSAVE+CPUSAVE_SRR0)(%r3) - STORE %r31, (PC_DBSAVE+CPUSAVE_SRR1)(%r3) - isync - - mfcr %r30 - -/* - * Now the kdb trap catching code. - */ -dbtrap: - FRAME_SETUP(SPR_SPRG1, PC_DBSAVE, EXC_DEBUG) -/* Call C trap code: */ - GET_TOCBASE(%r2) - addi %r3, %r1, CALLSIZE - bl CNAME(db_trap_glue) - TOC_RESTORE - or. %r3, %r3, %r3 - bne dbleave -/* This wasn't for KDB, so switch to real trap: */ - b trap_common - -dbleave: - FRAME_LEAVE(SPR_SRR0, SPR_SRR1) - rfi -ASEND(breakpoint) -#endif /* KDB */ - -#ifdef SMP -ENTRY(tlb_lock) - GET_CPUINFO(%r5) - LOAD %r5, PC_CURTHREAD(%r5) -1: LOADX %r4, 0, %r3 - CMPI %r4, TLB_UNLOCKED - bne 1b - STOREX %r5, 0, %r3 - bne- 1b - isync - msync - blr -END(tlb_lock) - -ENTRY(tlb_unlock) - isync - msync - li %r4, TLB_UNLOCKED - STORE %r4, 0(%r3) - isync - msync - blr -END(tlb_unlock) - -/* - * TLB miss spin locks. For each CPU we have a reservation granule (32 bytes); - * only a single word from this granule will actually be used as a spin lock - * for mutual exclusion between TLB miss handler and pmap layer that - * manipulates page table contents. - */ - .data - .align 5 -GLOBAL(tlb0_miss_locks) - .space RES_GRANULE * MAXCPU -#endif diff --git a/sys/powerpc/conf/DEFAULTS b/sys/powerpc/conf/DEFAULTS deleted file mode 100644 index 3568dc99fec..00000000000 --- a/sys/powerpc/conf/DEFAULTS +++ /dev/null @@ -1,14 +0,0 @@ -# -# DEFAULTS -- Default kernel configuration file for FreeBSD/powerpc -# - -# Pseudo devices. -device mem # Memory and kernel memory devices - -# UART chips on this platform -device uart_ns8250 - -options GEOM_PART_BSD -options GEOM_PART_MBR - -options NEW_PCIB diff --git a/sys/powerpc/conf/GENERIC b/sys/powerpc/conf/GENERIC deleted file mode 100644 index 95fdc72571a..00000000000 --- a/sys/powerpc/conf/GENERIC +++ /dev/null @@ -1,235 +0,0 @@ -# -# GENERIC -- Generic kernel configuration file for FreeBSD/powerpc -# -# For more information on this file, please read the handbook section on -# Kernel Configuration Files: -# -# https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config -# -# The handbook is also available locally in /usr/share/doc/handbook -# if you've installed the doc distribution, otherwise always see the -# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the -# latest information. -# -# An exhaustive list of options and more detailed explanations of the -# device lines is also present in the ../../conf/NOTES and NOTES files. -# If you are in doubt as to the purpose or necessity of a line, check first -# in NOTES. -# - -cpu AIM -ident GENERIC - -machine powerpc powerpc - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols -makeoptions WITH_CTF=1 - -# Platform support -options POWERMAC #NewWorld Apple PowerMacs -options PSIM #GDB PSIM ppc simulator -options MAMBO #IBM Mambo Full System Simulator -options PSERIES #PAPR-compliant systems - -options FDT -options SCHED_ULE #ULE scheduler -options PREEMPTION #Enable kernel thread preemption -options VIMAGE # Subsystem virtualization, e.g. VNET -options INET #InterNETworking -options INET6 #IPv6 communications protocols -options IPSEC_SUPPORT # Allow kldload of ipsec and tcpmd5 -options TCP_HHOOK # hhook(9) framework for TCP -options TCP_RFC7413 # TCP Fast Open -options SCTP_SUPPORT # Allow kldload of SCTP -options FFS #Berkeley Fast Filesystem -options SOFTUPDATES #Enable FFS soft updates support -options UFS_ACL #Support for access control lists -options UFS_DIRHASH #Improve performance on big directories -options UFS_GJOURNAL #Enable gjournal-based UFS journaling -options QUOTA #Enable disk quotas for UFS -options MD_ROOT #MD is a potential root device -options NFSCL #Network Filesystem Client -options NFSD #Network Filesystem Server -options NFSLOCKD #Network Lock Manager -options NFS_ROOT #NFS usable as root device -options MSDOSFS #MSDOS Filesystem -options CD9660 #ISO 9660 Filesystem -options PROCFS #Process filesystem (requires PSEUDOFS) -options PSEUDOFS #Pseudo-filesystem framework -options TMPFS #Efficient memory filesystem -options GEOM_PART_APM #Apple Partition Maps. -options GEOM_PART_GPT #GUID Partition Tables. -options GEOM_LABEL #Provides labelization -options COMPAT_FREEBSD4 #Keep this for a while -options COMPAT_FREEBSD5 #Compatible with FreeBSD5 -options COMPAT_FREEBSD6 #Compatible with FreeBSD6 -options COMPAT_FREEBSD7 #Compatible with FreeBSD7 -options COMPAT_FREEBSD9 # Compatible with FreeBSD9 -options COMPAT_FREEBSD10 # Compatible with FreeBSD10 -options COMPAT_FREEBSD11 # Compatible with FreeBSD11 -options COMPAT_FREEBSD12 # Compatible with FreeBSD12 -options SCSI_DELAY=5000 #Delay (in ms) before probing SCSI -options KTRACE #ktrace(1) syscall trace support -options STACK #stack(9) support -options SYSVSHM #SYSV-style shared memory -options SYSVMSG #SYSV-style message queues -options SYSVSEM #SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions -options HWPMC_HOOKS # Necessary kernel hooks for hwpmc(4) -options AUDIT # Security event auditing -options CAPABILITY_MODE # Capsicum capability mode -options CAPABILITIES # Capsicum capabilities -options MAC # TrustedBSD MAC Framework -options KDTRACE_HOOKS # Kernel DTrace hooks -options DDB_CTF # Kernel ELF linker loads CTF data -options INCLUDE_CONFIG_FILE # Include this file in kernel -options RACCT # Resource accounting framework -options RACCT_DEFAULT_TO_DISABLED # Set kern.racct.enable=0 by default -options RCTL # Resource limits - -# Debugging support. Always need this: -options KDB # Enable kernel debugger support. -options KDB_TRACE # Print a stack trace for a panic. - -# Kernel dump features. -options EKCD # Support for encrypted kernel dumps -options GZIO # gzip-compressed kernel and user dumps -options ZSTDIO # zstd-compressed kernel and user dumps -options DEBUGNET # debugnet networking -options NETDUMP # netdump(4) client support - -# Make an SMP-capable kernel by default -options SMP # Symmetric MultiProcessor Kernel - -# CPU frequency control -device cpufreq - -# Standard busses -device pci -options PCI_HP # PCI-Express native HotPlug -device agp - -# ATA controllers -device ahci # AHCI-compatible SATA controllers -device ata # Legacy ATA/SATA controllers -device mvs # Marvell 88SX50XX/88SX60XX/88SX70XX/SoC SATA -device siis # SiliconImage SiI3124/SiI3132/SiI3531 SATA - -# SCSI Controllers -device ahc # AHA2940 and onboard AIC7xxx devices -options AHC_ALLOW_MEMIO # Attempt to use memory mapped I/O -device isp # Qlogic family -device ispfw # Firmware module for Qlogic host adapters -device mpt # LSI-Logic MPT-Fusion -device sym # NCR/Symbios/LSI Logic 53C8XX/53C1010/53C1510D - -# ATA/SCSI peripherals -device scbus # SCSI bus (required for ATA/SCSI) -device da # Direct Access (disks) -device sa # Sequential Access (tape etc) -device cd # CD -device pass # Passthrough device (direct ATA/SCSI access) - -# vt is the default console driver, resembling an SCO console -device vt # Generic console driver (pulls in OF FB) -device kbdmux - -# Serial (COM) ports -device scc -device uart -device uart_z8530 - -# FireWire support -device firewire # FireWire bus code -device sbp # SCSI over FireWire (Requires scbus and da) -device fwe # Ethernet over FireWire (non-standard!) - -# PCI Ethernet NICs that use the common MII bus controller code. -device miibus # MII bus support -device bge # Broadcom BCM570xx Gigabit Ethernet -device gem # Sun GEM/Sun ERI/Apple GMAC -device dc # DEC/Intel 21143 and various workalikes -device fxp # Intel EtherExpress PRO/100B (82557, 82558) - -# Pseudo devices. -device crypto # core crypto support -device loop # Network loopback -device ether # Ethernet support -device vlan # 802.1Q VLAN support -device tuntap # Packet tunnel. -device md # Memory "disks" -device ofwd # Open Firmware disks -device gif # IPv6 and IPv4 tunneling -device firmware # firmware assist module - -# The `bpf' device enables the Berkeley Packet Filter. -# Be aware of the administrative consequences of enabling this! -# Note that 'bpf' is required for DHCP. -device bpf #Berkeley packet filter - -# USB support -options USB_DEBUG # enable debug msgs -device uhci # UHCI PCI->USB interface -device ohci # OHCI PCI->USB interface -device ehci # EHCI PCI->USB interface -device usb # USB Bus (required) -device uhid # "Human Interface Devices" -device ukbd # Keyboard -options KBD_INSTALL_CDEV # install a CDEV entry in /dev -device ulpt # Printer -device umass # Disks/Mass storage - Requires scbus and da0 -device ums # Mouse -device atp # Apple USB touchpad -device urio # Diamond Rio 500 MP3 player -# USB Ethernet -device aue # ADMtek USB Ethernet -device axe # ASIX Electronics USB Ethernet -device cdce # Generic USB over Ethernet -device cue # CATC USB Ethernet -device kue # Kawasaki LSI USB Ethernet - -# Wireless NIC cards -options IEEE80211_SUPPORT_MESH - -# Misc -device iicbus # I2C bus code -device kiic # Keywest I2C -device ad7417 # PowerMac7,2 temperature sensor -device adt746x # PowerBook5,8 temperature sensor -device ds1631 # PowerMac11,2 temperature sensor -device ds1775 # PowerMac7,2 temperature sensor -device fcu # Apple Fan Control Unit -device max6690 # PowerMac7,2 temperature sensor -device powermac_nvram # Open Firmware configuration NVRAM -device smu # Apple System Management Unit -device adm1030 # Apple G4 MDD fan controller -device atibl # ATI-based backlight driver for PowerBooks/iBooks -device nvbl # nVidia-based backlight driver for PowerBooks/iBooks - -# ADB support -device adb -device cuda -device pmu - -# Sound support -device sound # Generic sound driver (required) -device snd_ai2s # Apple I2S audio -device snd_davbus # Apple DAVBUS audio -device snd_uaudio # USB Audio - -# evdev interface -options EVDEV_SUPPORT # evdev support in legacy drivers -device evdev # input event device support -device uinput # install /dev/uinput cdev - -# VirtIO support -device virtio # Generic VirtIO bus (required) -device virtio_pci # VirtIO PCI device -device vtnet # VirtIO Ethernet device -device virtio_blk # VirtIO Block device -device virtio_scsi # VirtIO SCSI device -device virtio_balloon # VirtIO Memory Balloon device - -# HID support -options HID_DEBUG # enable debug msgs -device hid # Generic HID support diff --git a/sys/powerpc/conf/GENERIC.hints b/sys/powerpc/conf/GENERIC.hints deleted file mode 100644 index e69de29bb2d..00000000000 diff --git a/sys/powerpc/conf/GENERIC64 b/sys/powerpc/conf/GENERIC64 deleted file mode 100644 index 0bce690358a..00000000000 --- a/sys/powerpc/conf/GENERIC64 +++ /dev/null @@ -1,280 +0,0 @@ -# -# GENERIC -- Generic kernel configuration file for FreeBSD/powerpc -# -# For more information on this file, please read the handbook section on -# Kernel Configuration Files: -# -# https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config -# -# The handbook is also available locally in /usr/share/doc/handbook -# if you've installed the doc distribution, otherwise always see the -# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the -# latest information. -# -# An exhaustive list of options and more detailed explanations of the -# device lines is also present in the ../../conf/NOTES and NOTES files. -# If you are in doubt as to the purpose or necessity of a line, check first -# in NOTES. -# - -cpu AIM -ident GENERIC - -machine powerpc powerpc64 - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols -makeoptions WITH_CTF=1 - -# Platform support -options POWERMAC #NewWorld Apple PowerMacs -options PS3 #Sony Playstation 3 -options MAMBO #IBM Mambo Full System Simulator -options QEMU #QEMU processor emulator -options PSERIES #PAPR-compliant systems (e.g. IBM p) -options POWERNV #Non-virtualized OpenPOWER systems - -options FDT #Flattened Device Tree -options SCHED_ULE #ULE scheduler -options NUMA #Non-Uniform Memory Architecture support -options PREEMPTION #Enable kernel thread preemption -options VIMAGE # Subsystem virtualization, e.g. VNET -options INET #InterNETworking -options INET6 #IPv6 communications protocols -options IPSEC_SUPPORT # Allow kldload of ipsec and tcpmd5 -options NETLINK # netlink(4) support -options ROUTE_MPATH # Multipath routing support -options TCP_OFFLOAD # TCP offload -options TCP_BLACKBOX # Enhanced TCP event logging -options TCP_HHOOK # hhook(9) framework for TCP -options TCP_RFC7413 # TCP Fast Open -options SCTP_SUPPORT # Allow kldload of SCTP -options FFS #Berkeley Fast Filesystem -options SOFTUPDATES #Enable FFS soft updates support -options UFS_ACL #Support for access control lists -options UFS_DIRHASH #Improve performance on big directories -options UFS_GJOURNAL #Enable gjournal-based UFS journaling -options QUOTA #Enable disk quotas for UFS -options MD_ROOT #MD is a potential root device -options MD_ROOT_MEM #Enable use of initrd as MD root -options NFSCL #Network Filesystem Client -options NFSD #Network Filesystem Server -options NFSLOCKD #Network Lock Manager -options NFS_ROOT #NFS usable as root device -options MSDOSFS #MSDOS Filesystem -options CD9660 #ISO 9660 Filesystem -options PROCFS #Process filesystem (requires PSEUDOFS) -options PSEUDOFS #Pseudo-filesystem framework -options TMPFS #Efficient memory filesystem -options GEOM_PART_APM #Apple Partition Maps. -options GEOM_PART_GPT #GUID Partition Tables. -options GEOM_LABEL #Provides labelization -options COMPAT_FREEBSD32 #Compatible with FreeBSD/powerpc binaries -options COMPAT_FREEBSD5 #Compatible with FreeBSD5 -options COMPAT_FREEBSD6 #Compatible with FreeBSD6 -options COMPAT_FREEBSD7 #Compatible with FreeBSD7 -options COMPAT_FREEBSD9 # Compatible with FreeBSD9 -options COMPAT_FREEBSD10 # Compatible with FreeBSD10 -options COMPAT_FREEBSD11 # Compatible with FreeBSD11 -options COMPAT_FREEBSD12 # Compatible with FreeBSD12 -options SCSI_DELAY=5000 #Delay (in ms) before probing SCSI -options KTRACE #ktrace(1) syscall trace support -options STACK #stack(9) support -options SYSVSHM #SYSV-style shared memory -options SYSVMSG #SYSV-style message queues -options SYSVSEM #SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions -options PRINTF_BUFR_SIZE=128 # Prevent printf output being interspersed. -options HWPMC_HOOKS # Necessary kernel hooks for hwpmc(4) -options AUDIT # Security event auditing -options CAPABILITY_MODE # Capsicum capability mode -options CAPABILITIES # Capsicum capabilities -options MAC # TrustedBSD MAC Framework -options KDTRACE_HOOKS # Kernel DTrace hooks -options DDB_CTF # Kernel ELF linker loads CTF data -options INCLUDE_CONFIG_FILE # Include this file in kernel -options RACCT # Resource accounting framework -options RACCT_DEFAULT_TO_DISABLED # Set kern.racct.enable=0 by default -options RCTL # Resource limits - -# Debugging support. Always need this: -options KDB # Enable kernel debugger support. -options KDB_TRACE # Print a stack trace for a panic. - -# Kernel dump features. -options EKCD # Support for encrypted kernel dumps -options GZIO # gzip-compressed kernel and user dumps -options ZSTDIO # zstd-compressed kernel and user dumps -options DEBUGNET # debugnet networking -options NETDUMP # netdump(4) client support - -# Make an SMP-capable kernel by default -options SMP # Symmetric MultiProcessor Kernel - -# CPU frequency control -device cpufreq - -# Standard busses -device pci -options PCI_HP # PCI-Express native HotPlug -device agp - -# ATA controllers -device ahci # AHCI-compatible SATA controllers -device ata # Legacy ATA/SATA controllers -device mvs # Marvell 88SX50XX/88SX60XX/88SX70XX/SoC SATA -device siis # SiliconImage SiI3124/SiI3132/SiI3531 SATA - -# NVM Express (NVMe) support -device nvme # base NVMe driver -options NVME_USE_NVD=0 # prefer the cam(4) based nda(4) driver -device nvd # expose NVMe namespaces as disks, depends on nvme - -# SCSI Controllers -device aacraid # Adaptec by PMC RAID -device ahc # AHA2940 and onboard AIC7xxx devices -options AHC_ALLOW_MEMIO # Attempt to use memory mapped I/O -device isp # Qlogic family -device ispfw # Firmware module for Qlogic host adapters -device mrsas # LSI/Avago MegaRAID SAS/SATA, 6Gb/s and 12Gb/s -device mpt # LSI-Logic MPT-Fusion -device mps # LSI-Logic MPT-Fusion 2 -device mpr # LSI SAS3008 MPT-Fusion SAS-3 -device sym # NCR/Symbios/LSI Logic 53C8XX/53C1010/53C1510D - -# ATA/SCSI peripherals -device scbus # SCSI bus (required for ATA/SCSI) -device ch # SCSI media changers -device da # Direct Access (disks) -device sa # Sequential Access (tape etc) -device cd # CD -device pass # Passthrough device (direct ATA/SCSI access) -device ses # Enclosure Service (SES and SAF-TE) - -# vt is the default console driver, resembling an SCO console -device vt # Core console driver -device kbdmux - -# Serial (COM) ports -device scc -device uart -device uart_z8530 - -device iflib - -# Ethernet hardware -device em # Intel PRO/1000 Gigabit Ethernet Family -device ix # Intel PRO/10GbE PCIE PF Ethernet Family -device ixl # Intel 700 Series Physical Function -device ixv # Intel PRO/10GbE PCIE VF Ethernet Family -device glc # Sony Playstation 3 Ethernet -device llan # IBM pSeries Virtual Ethernet -device cxgbe # Chelsio 10/25G NIC - -# PCI Ethernet NICs that use the common MII bus controller code. -device miibus # MII bus support -device bge # Broadcom BCM570xx Gigabit Ethernet -device gem # Sun GEM/Sun ERI/Apple GMAC -device dc # DEC/Intel 21143 and various workalikes -device fxp # Intel EtherExpress PRO/100B (82557, 82558) -device re # RealTek 8139C+/8169/8169S/8110S -device rl # RealTek 8129/8139 - -# Pseudo devices. -device crypto # core crypto support -device loop # Network loopback -device ether # Ethernet support -device vlan # 802.1Q VLAN support -device tuntap # Packet tunnel. -device md # Memory "disks" -device ofwd # Open Firmware disks -device gif # IPv6 and IPv4 tunneling -device firmware # firmware assist module - -# The `bpf' device enables the Berkeley Packet Filter. -# Be aware of the administrative consequences of enabling this! -# Note that 'bpf' is required for DHCP. -device bpf #Berkeley packet filter - -# USB support -options USB_DEBUG # enable debug msgs -device uhci # UHCI PCI->USB interface -device ohci # OHCI PCI->USB interface -device ehci # EHCI PCI->USB interface -device xhci # XHCI PCI->USB interface -device usb # USB Bus (required) -device uhid # "Human Interface Devices" -device ukbd # Keyboard -options KBD_INSTALL_CDEV # install a CDEV entry in /dev -device umass # Disks/Mass storage - Requires scbus and da0 -device ums # Mouse -# USB Ethernet -device aue # ADMtek USB Ethernet -device axe # ASIX Electronics USB Ethernet -device cdce # Generic USB over Ethernet -device cue # CATC USB Ethernet -device kue # Kawasaki LSI USB Ethernet - -# Wireless NIC cards -device wlan # 802.11 support -options IEEE80211_SUPPORT_MESH # enable 802.11s draft support -options IEEE80211_DEBUG # enable debug msgs -device wlan_wep # 802.11 WEP support -device wlan_ccmp # 802.11 CCMP support -device wlan_tkip # 802.11 TKIP support -device wlan_amrr # AMRR transmit rate control algorithm -device ath # Atheros NICs -device ath_pci # Atheros pci/cardbus glue -device ath_hal # pci/cardbus chip support -options AH_AR5416_INTERRUPT_MITIGATION # AR5416 interrupt mitigation -options ATH_ENABLE_11N # Enable 802.11n support for AR5416 and later -device ath_rate_sample # SampleRate tx rate control for ath - -# FireWire support -device firewire # FireWire bus code -device sbp # SCSI over FireWire (Requires scbus and da) -device fwe # Ethernet over FireWire (non-standard!) - -# Misc -device iicbus # I2C bus code -device iic -device kiic # Keywest I2C -device ad7417 # PowerMac7,2 temperature sensor -device ds1631 # PowerMac11,2 temperature sensor -device ds1775 # PowerMac7,2 temperature sensor -device fcu # Apple Fan Control Unit -device max6690 # PowerMac7,2 temperature sensor -device powermac_nvram # Open Firmware configuration NVRAM -device smu # Apple System Management Unit -device atibl # ATI-based backlight driver for PowerBooks/iBooks -device nvbl # nVidia-based backlight driver for PowerBooks/iBooks -device opalflash # PowerNV embedded flash memory - -# ADB support -device adb -device pmu - -# Sound support -device sound # Generic sound driver (required) -device snd_ai2s # Apple I2S audio -device snd_hda # Intel High Definition Audio -device snd_uaudio # USB Audio - -# Netmap provides direct access to TX/RX rings on supported NICs -device netmap # netmap(4) support - -# evdev interface -options EVDEV_SUPPORT # evdev support in legacy drivers -device evdev # input event device support -device uinput # install /dev/uinput cdev - -# VirtIO support -device virtio # Generic VirtIO bus (required) -device virtio_pci # VirtIO PCI device -device vtnet # VirtIO Ethernet device -device virtio_blk # VirtIO Block device -device virtio_scsi # VirtIO SCSI device -device virtio_balloon # VirtIO Memory Balloon device - -# HID support -options HID_DEBUG # enable debug msgs -device hid # Generic HID support diff --git a/sys/powerpc/conf/GENERIC64LE b/sys/powerpc/conf/GENERIC64LE deleted file mode 100644 index 34751066f35..00000000000 --- a/sys/powerpc/conf/GENERIC64LE +++ /dev/null @@ -1,256 +0,0 @@ -# -# GENERIC -- Generic kernel configuration file for FreeBSD/powerpc -# -# For more information on this file, please read the handbook section on -# Kernel Configuration Files: -# -# https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config -# -# The handbook is also available locally in /usr/share/doc/handbook -# if you've installed the doc distribution, otherwise always see the -# FreeBSD World Wide Web server (https://www.FreeBSD.org/) for the -# latest information. -# -# An exhaustive list of options and more detailed explanations of the -# device lines is also present in the ../../conf/NOTES and NOTES files. -# If you are in doubt as to the purpose or necessity of a line, check first -# in NOTES. -# - -cpu AIM -ident GENERIC - -machine powerpc powerpc64le - -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols -makeoptions WITH_CTF=1 - -# Platform support -options MAMBO #IBM Mambo Full System Simulator -options QEMU #QEMU processor emulator -options PSERIES #PAPR-compliant systems (e.g. IBM p) -options POWERNV #Non-virtualized OpenPOWER systems - -options FDT #Flattened Device Tree -options SCHED_ULE #ULE scheduler -options NUMA #Non-Uniform Memory Architecture support -options PREEMPTION #Enable kernel thread preemption -options VIMAGE # Subsystem virtualization, e.g. VNET -options INET #InterNETworking -options INET6 #IPv6 communications protocols -options IPSEC_SUPPORT # Allow kldload of ipsec and tcpmd5 -options TCP_OFFLOAD # TCP offload -options TCP_BLACKBOX # Enhanced TCP event logging -options TCP_HHOOK # hhook(9) framework for TCP -options TCP_RFC7413 # TCP Fast Open -options SCTP_SUPPORT # Allow kldload of SCTP -options FFS #Berkeley Fast Filesystem -options SOFTUPDATES #Enable FFS soft updates support -options UFS_ACL #Support for access control lists -options UFS_DIRHASH #Improve performance on big directories -options UFS_GJOURNAL #Enable gjournal-based UFS journaling -options QUOTA #Enable disk quotas for UFS -options MD_ROOT #MD is a potential root device -options MD_ROOT_MEM #Enable use of initrd as MD root -options NFSCL #Network Filesystem Client -options NFSD #Network Filesystem Server -options NFSLOCKD #Network Lock Manager -options NFS_ROOT #NFS usable as root device -options MSDOSFS #MSDOS Filesystem -options CD9660 #ISO 9660 Filesystem -options PROCFS #Process filesystem (requires PSEUDOFS) -options PSEUDOFS #Pseudo-filesystem framework -options TMPFS #Efficient memory filesystem -options GEOM_PART_APM #Apple Partition Maps. -options GEOM_PART_GPT #GUID Partition Tables. -options GEOM_LABEL #Provides labelization -#options COMPAT_FREEBSD32 #Compatible with FreeBSD/powerpcle binaries -options COMPAT_FREEBSD11 # Compatible with FreeBSD11 -options COMPAT_FREEBSD12 # Compatible with FreeBSD12 -options SCSI_DELAY=5000 #Delay (in ms) before probing SCSI -options KTRACE #ktrace(1) syscall trace support -options STACK #stack(9) support -options SYSVSHM #SYSV-style shared memory -options SYSVMSG #SYSV-style message queues -options SYSVSEM #SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions -options PRINTF_BUFR_SIZE=128 # Prevent printf output being interspersed. -options HWPMC_HOOKS # Necessary kernel hooks for hwpmc(4) -options AUDIT # Security event auditing -options CAPABILITY_MODE # Capsicum capability mode -options CAPABILITIES # Capsicum capabilities -options MAC # TrustedBSD MAC Framework -options KDTRACE_HOOKS # Kernel DTrace hooks -options DDB_CTF # Kernel ELF linker loads CTF data -options INCLUDE_CONFIG_FILE # Include this file in kernel -options RACCT # Resource accounting framework -options RACCT_DEFAULT_TO_DISABLED # Set kern.racct.enable=0 by default -options RCTL # Resource limits - -# Debugging support. Always need this: -options KDB # Enable kernel debugger support. -options KDB_TRACE # Print a stack trace for a panic. - -# Kernel dump features. -options EKCD # Support for encrypted kernel dumps -options GZIO # gzip-compressed kernel and user dumps -options ZSTDIO # zstd-compressed kernel and user dumps -options DEBUGNET # debugnet networking -options NETDUMP # netdump(4) client support - -# Make an SMP-capable kernel by default -options SMP # Symmetric MultiProcessor Kernel - -# CPU frequency control -device cpufreq - -# Standard busses -device pci -options PCI_HP # PCI-Express native HotPlug -device agp - -# ATA controllers -device ahci # AHCI-compatible SATA controllers -device ata # Legacy ATA/SATA controllers -device mvs # Marvell 88SX50XX/88SX60XX/88SX70XX/SoC SATA -device siis # SiliconImage SiI3124/SiI3132/SiI3531 SATA - -# NVM Express (NVMe) support -device nvme # base NVMe driver -options NVME_USE_NVD=0 # prefer the cam(4) based nda(4) driver -device nvd # expose NVMe namespaces as disks, depends on nvme - -# SCSI Controllers -device aacraid # Adaptec by PMC RAID -device ahc # AHA2940 and onboard AIC7xxx devices -options AHC_ALLOW_MEMIO # Attempt to use memory mapped I/O -device isp # Qlogic family -device ispfw # Firmware module for Qlogic host adapters -device mrsas # LSI/Avago MegaRAID SAS/SATA, 6Gb/s and 12Gb/s -device mpt # LSI-Logic MPT-Fusion -device mps # LSI-Logic MPT-Fusion 2 -device mpr # LSI SAS3008 MPT-Fusion SAS-3 -device sym # NCR/Symbios/LSI Logic 53C8XX/53C1010/53C1510D - -# ATA/SCSI peripherals -device scbus # SCSI bus (required for ATA/SCSI) -device ch # SCSI media changers -device da # Direct Access (disks) -device sa # Sequential Access (tape etc) -device cd # CD -device pass # Passthrough device (direct ATA/SCSI access) -device ses # Enclosure Service (SES and SAF-TE) - -# vt is the default console driver, resembling an SCO console -device vt # Core console driver -device kbdmux - -# Serial (COM) ports -device scc -device uart -device uart_z8530 - -device iflib - -# Ethernet hardware -device em # Intel PRO/1000 Gigabit Ethernet Family -device ix # Intel PRO/10GbE PCIE PF Ethernet Family -device ixl # Intel 700 Series Physical Function -device ixv # Intel PRO/10GbE PCIE VF Ethernet Family -device ice # Intel 800 Series Physical Function -device llan # IBM pSeries Virtual Ethernet -device cxgbe # Chelsio 10/25G NIC - -# PCI Ethernet NICs that use the common MII bus controller code. -device miibus # MII bus support -device bge # Broadcom BCM570xx Gigabit Ethernet -device gem # Sun GEM/Sun ERI/Apple GMAC -device dc # DEC/Intel 21143 and various workalikes -device fxp # Intel EtherExpress PRO/100B (82557, 82558) -device re # RealTek 8139C+/8169/8169S/8110S -device rl # RealTek 8129/8139 - -# Pseudo devices. -device crypto # core crypto support -device loop # Network loopback -device ether # Ethernet support -device vlan # 802.1Q VLAN support -device tuntap # Packet tunnel. -device md # Memory "disks" -device ofwd # Open Firmware disks -device gif # IPv6 and IPv4 tunneling -device firmware # firmware assist module - -# The `bpf' device enables the Berkeley Packet Filter. -# Be aware of the administrative consequences of enabling this! -# Note that 'bpf' is required for DHCP. -device bpf #Berkeley packet filter - -# USB support -options USB_DEBUG # enable debug msgs -device uhci # UHCI PCI->USB interface -device ohci # OHCI PCI->USB interface -device ehci # EHCI PCI->USB interface -device xhci # XHCI PCI->USB interface -device usb # USB Bus (required) -device uhid # "Human Interface Devices" -device ukbd # Keyboard -options KBD_INSTALL_CDEV # install a CDEV entry in /dev -device umass # Disks/Mass storage - Requires scbus and da0 -device ums # Mouse -# USB Ethernet -device aue # ADMtek USB Ethernet -device axe # ASIX Electronics USB Ethernet -device cdce # Generic USB over Ethernet -device cue # CATC USB Ethernet -device kue # Kawasaki LSI USB Ethernet - -# Wireless NIC cards -device wlan # 802.11 support -options IEEE80211_SUPPORT_MESH # enable 802.11s draft support -options IEEE80211_DEBUG # enable debug msgs -device wlan_wep # 802.11 WEP support -device wlan_ccmp # 802.11 CCMP support -device wlan_tkip # 802.11 TKIP support -device wlan_amrr # AMRR transmit rate control algorithm -device ath # Atheros NICs -device ath_pci # Atheros pci/cardbus glue -device ath_hal # pci/cardbus chip support -options AH_AR5416_INTERRUPT_MITIGATION # AR5416 interrupt mitigation -options ATH_ENABLE_11N # Enable 802.11n support for AR5416 and later -device ath_rate_sample # SampleRate tx rate control for ath - -# FireWire support -device firewire # FireWire bus code -device sbp # SCSI over FireWire (Requires scbus and da) -device fwe # Ethernet over FireWire (non-standard!) - -# Misc -device iicbus # I2C bus code -device iic -device opalflash # PowerNV embedded flash memory - -# Sound support -device sound # Generic sound driver (required) -device snd_hda # Intel High Definition Audio -device snd_uaudio # USB Audio - -# Netmap provides direct access to TX/RX rings on supported NICs -device netmap # netmap(4) support - -# evdev interface -options EVDEV_SUPPORT # evdev support in legacy drivers -device evdev # input event device support -device uinput # install /dev/uinput cdev - -# VirtIO support -device virtio # Generic VirtIO bus (required) -device virtio_pci # VirtIO PCI device -device vtnet # VirtIO Ethernet device -device virtio_blk # VirtIO Block device -device virtio_scsi # VirtIO SCSI device -device virtio_balloon # VirtIO Memory Balloon device - -# HID support -options HID_DEBUG # enable debug msgs -device hid # Generic HID support diff --git a/sys/powerpc/conf/LINT b/sys/powerpc/conf/LINT deleted file mode 100644 index 4795f83ef13..00000000000 --- a/sys/powerpc/conf/LINT +++ /dev/null @@ -1,8 +0,0 @@ - -include "../../conf/NOTES" -include NOTES -machine powerpc powerpc -nodevice mlx5 -nodevice mlx5en -nodevice mlx5ib -nooptions RATELIMIT diff --git a/sys/powerpc/conf/LINT64 b/sys/powerpc/conf/LINT64 deleted file mode 100644 index 3441e052889..00000000000 --- a/sys/powerpc/conf/LINT64 +++ /dev/null @@ -1,4 +0,0 @@ - -include "../../conf/NOTES" -include NOTES -machine powerpc powerpc64 diff --git a/sys/powerpc/conf/LINT64LE b/sys/powerpc/conf/LINT64LE deleted file mode 100644 index 57413a3de99..00000000000 --- a/sys/powerpc/conf/LINT64LE +++ /dev/null @@ -1,4 +0,0 @@ - -include "../../conf/NOTES" -include NOTES -machine powerpc powerpc64le diff --git a/sys/powerpc/conf/MPC85XX b/sys/powerpc/conf/MPC85XX deleted file mode 100644 index 8f42e07f292..00000000000 --- a/sys/powerpc/conf/MPC85XX +++ /dev/null @@ -1,123 +0,0 @@ -# -# Custom kernel for Freescale MPC85XX development boards like the CDS etc. -# -# - -cpu BOOKE -cpu BOOKE_E500 -ident MPC85XX - -machine powerpc powerpc - -include "dpaa/config.dpaa" -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols -makeoptions WITH_CTF=1 - -options FPU_EMU - -options _KPOSIX_PRIORITY_SCHEDULING -options ALT_BREAK_TO_DEBUGGER -options BREAK_TO_DEBUGGER -options BOOTP -options BOOTP_NFSROOT -#options BOOTP_NFSV3 -options CD9660 -options COMPAT_43 -options DDB -#options DEADLKRES -options DEVICE_POLLING -#options DIAGNOSTIC -options FDT -#makeoptions FDT_DTS_FILE=mpc8555cds.dts -options FFS -options GDB -options GEOM_PART_GPT -options GEOM_LABEL # Provides labelization -options INET -options INET6 -options TCP_HHOOK # hhook(9) framework for TCP -options INVARIANTS -options INVARIANT_SUPPORT -options KDB -options KTRACE -options MD_ROOT -options MPC85XX -options MSDOSFS -options NFS_ROOT -options NFSCL -options NFSLOCKD -options PRINTF_BUFR_SIZE=128 # Prevent printf output being interspersed. -options PROCFS -options PSEUDOFS -options SCHED_ULE -options CAPABILITIES -options CAPABILITY_MODE -options SMP -options SYSVMSG -options SYSVSEM -options SYSVSHM -options WITNESS -options WITNESS_SKIPSPIN -options COMPAT_FREEBSD10 -options COMPAT_FREEBSD11 -options COMPAT_FREEBSD12 -options HWPMC_HOOKS -options KDTRACE_HOOKS # Kernel DTrace hooks -options DDB_CTF # Kernel ELF linker loads CTF data - -device ata -device bpf -device cfi -device cpufreq -device crypto -device cryptodev -device da -device ds1307 -device ds1553 -device iflib -device em -device alc -device ether -device fxp -device gpio -device gpiopower -device iic -device iicbus -#device isa -device loop -device md -device miibus -device mmc -device mmcsd -device pass -device pci -device quicc -#device rl -device scbus -device scc -device sdhci -device sec -device spibus -device spigen -device tsec -device dpaa -device tuntap -device uart -options USB_DEBUG # enable debug msgs -#device uhci -device ehci -device ukbd -device ums -device umass -device usb -device vlan - -# P1022 DIU -device diu -device videomode -device vt -device fbd - -# HID support -options HID_DEBUG # enable debug msgs -device hid # Generic HID support diff --git a/sys/powerpc/conf/MPC85XXSPE b/sys/powerpc/conf/MPC85XXSPE deleted file mode 100644 index 3bf944dd9f9..00000000000 --- a/sys/powerpc/conf/MPC85XXSPE +++ /dev/null @@ -1,124 +0,0 @@ -# -# Custom kernel for Freescale MPC85XX development boards like the CDS etc. -# -# - -cpu BOOKE -cpu BOOKE_E500 -ident MPC85XXSPE - -machine powerpc powerpcspe - -include "dpaa/config.dpaa" -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols -makeoptions WITH_CTF=1 - -options FPU_EMU -options MAXCPU=2 - -options _KPOSIX_PRIORITY_SCHEDULING -options ALT_BREAK_TO_DEBUGGER -options BREAK_TO_DEBUGGER -options BOOTP -options BOOTP_NFSROOT -#options BOOTP_NFSV3 -options CD9660 -options COMPAT_43 -options DDB -#options DEADLKRES -options DEVICE_POLLING -#options DIAGNOSTIC -options FDT -#makeoptions FDT_DTS_FILE=mpc8555cds.dts -options FFS -options GDB -options GEOM_PART_GPT -options GEOM_LABEL # Provides labelization -options INET -options INET6 -options TCP_HHOOK # hhook(9) framework for TCP -options INVARIANTS -options INVARIANT_SUPPORT -options KDB -options KTRACE -options MD_ROOT -options MPC85XX -options MSDOSFS -options NFS_ROOT -options NFSCL -options NFSLOCKD -options PRINTF_BUFR_SIZE=128 # Prevent printf output being interspersed. -options PROCFS -options PSEUDOFS -options SCHED_ULE -options CAPABILITIES -options CAPABILITY_MODE -options SMP -options SYSVMSG -options SYSVSEM -options SYSVSHM -options WITNESS -options WITNESS_SKIPSPIN -options COMPAT_FREEBSD10 -options COMPAT_FREEBSD11 -options COMPAT_FREEBSD12 -options HWPMC_HOOKS -options KDTRACE_HOOKS # Kernel DTrace hooks -options DDB_CTF # Kernel ELF linker loads CTF data - -device ata -device bpf -device cfi -device cpufreq -device crypto -device cryptodev -device da -device ds1307 -device ds1553 -device iflib -device em -device alc -device ether -device fxp -device gpio -device gpiopower -device iic -device iicbus -#device isa -device loop -device md -device miibus -device mmc -device mmcsd -device pass -device pci -device quicc -#device rl -device scbus -device scc -device sdhci -device sec -device spibus -device spigen -device tsec -device dpaa -device tuntap -device uart -options USB_DEBUG # enable debug msgs -#device uhci -device ehci -device ukbd -device ums -device umass -device usb -device vlan - -# P1022 DIU -device diu -device videomode -device vt -device fbd - -# HID support -options HID_DEBUG # enable debug msgs -device hid # Generic HID support diff --git a/sys/powerpc/conf/NOTES b/sys/powerpc/conf/NOTES deleted file mode 100644 index c5eb7b9266f..00000000000 --- a/sys/powerpc/conf/NOTES +++ /dev/null @@ -1,94 +0,0 @@ -# -# This file contains machine dependent kernel configuration notes. For -# machine independent notes, look in /sys/conf/NOTES. - -# -# Enable the kernel DTrace hooks which are required to load the DTrace -# kernel modules. -# -options KDTRACE_HOOKS - -# DTrace core -# NOTE: introduces CDDL-licensed components into the kernel -#device dtrace - -# DTrace modules -#device dtrace_profile -#device dtrace_sdt -#device dtrace_fbt -#device dtrace_systrace -#device dtrace_prototype -#device dtnfscl -#device dtmalloc - -# Alternatively include all the DTrace modules -#device dtraceall - - -##################################################################### -# CPU OPTIONS - -# You must specify a machine directive to choose powerpc or powerpc64 -#machine powerpc powerpc[64] - -# -# You must specify at least one CPU (the one you intend to run on). -cpu AIM -#cpu BOOKE_E500 - -options FPU_EMU - -#options MPC85XX -options POWERMAC #NewWorld Apple PowerMacs -#options PS3 #Sony Playstation 3 -options PSIM #GDB PSIM ppc simulator -options MAMBO #IBM Mambo Full System Simulator -options QEMU #QEMU processor emulator - -# The cpufreq(4) driver provides support for CPU frequency control -device cpufreq - -# Standard busses -device agp - -device glc # Sony Playstation 3 Ethernet -device kiic # Apple Keywest I2C Controller -device ofwd # Open Firmware disks -device adb # Apple Desktop Bus -device cuda # VIA-CUDA ADB interface -device ad7417 # PowerMac7,2 temperature sensor -device ds1631 # PowerMac11,2 temperature sensor -device ds1775 # PowerMac7,2 temperature sensor -device fcu # Apple Fan Control Unit -device max6690 # PowerMac7,2 temperature sensor -device pmu # Apple Power Management Unit -device smu # Apple System Management Unit -device snd_ai2s # Apple I2S Audio -device snd_davbus # Apple Davbus Audio -device adm1030 # Apple G4 MDD fan controller - -# Backlight subsystem -device backlight - - -##################################################################### -# Devices we don't want to deal with - -nodevice ccr -nodevice cxgbe # XXX: builds on powerpc64 only. -nodevice cxgbev -nodevice mpr # no 64-bit atomics -nodevice mps # no 64-bit atomics -nodevice ppc -# sound -nodevice snd_cmi -# wants gdb_cur -nodevice dcons -nodevice dcons_crom - - -##################################################################### -# Options we don't want to deal with - -nooption PPC_DEBUG -nooption PPC_PROBE_CHIPSET # uses inb/outb diff --git a/sys/powerpc/conf/QORIQ64 b/sys/powerpc/conf/QORIQ64 deleted file mode 100644 index d0189ccb1c5..00000000000 --- a/sys/powerpc/conf/QORIQ64 +++ /dev/null @@ -1,125 +0,0 @@ -# -# Custom kernel for Freescale QorIQ (P5xxx, Txxxx) based boards, like -# AmigaOne X5000 -# -# - -cpu BOOKE -cpu BOOKE_E500 -ident QORIQ64 - -machine powerpc powerpc64 - -include "dpaa/config.dpaa" -makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols -makeoptions WITH_CTF=1 -#makeoptions WERROR="-Werror -Wno-format" - -options FPU_EMU - -options _KPOSIX_PRIORITY_SCHEDULING -options ALT_BREAK_TO_DEBUGGER -options BREAK_TO_DEBUGGER -options BOOTP -options BOOTP_NFSROOT -#options BOOTP_NFSV3 -options CD9660 -#options COMPAT_43 -options COMPAT_FREEBSD32 #Compatible with FreeBSD/powerpc binaries -options DDB -#options DEADLKRES -options DEVICE_POLLING -#options DIAGNOSTIC -options FDT -#makeoptions FDT_DTS_FILE=mpc8555cds.dts -options FFS #Berkeley Fast Filesystem -options SOFTUPDATES #Enable FFS soft updates support -options UFS_ACL #Support for access control lists -options UFS_DIRHASH #Improve performance on big directories -options UFS_GJOURNAL #Enable gjournal-based UFS journaling -options QUOTA #Enable disk quotas for UFS -options GDB -options GEOM_PART_GPT -options GEOM_LABEL #Provides labelization -options INET -options INET6 -options TCP_HHOOK # hhook(9) framework for TCP -options INVARIANTS -options INVARIANT_SUPPORT -options KDB -options KDB_TRACE # Print a stack trace for a panic. -options KTRACE -options MD_ROOT -options MPC85XX -options MSDOSFS -options NFS_ROOT -options NFSCL -options NFSLOCKD -options PRINTF_BUFR_SIZE=128 # Prevent printf output being interspersed. -options PROCFS -options PSEUDOFS -options SCHED_ULE -options CAPABILITIES -options CAPABILITY_MODE -options SMP -options STACK #stack(9) support -options SYSVMSG -options SYSVSEM -options SYSVSHM -options WITNESS -options WITNESS_SKIPSPIN -options HWPMC_HOOKS -options KDTRACE_HOOKS # Kernel DTrace hooks -options DDB_CTF # Kernel ELF linker loads CTF data - -device ata -device bpf -device cfi -device crypto -device cryptodev -device da -device ds1307 -device ds1553 -device iflib -device em -device alc -device dpaa -device ether -device fxp -device gpio -device gpiopower -device iic -device iicbus -#device isa -device loop -device md -device miibus -device mmc -device mmcsd -device pass -device pci -#device rl -device scbus -device scc -device sdhci -device spibus -device spigen -device tuntap -device uart -options USB_DEBUG # enable debug msgs -#device uhci -device ehci -device umass -device usb -device vlan - -# Desktop related -device vt -device fbd -options KBD_INSTALL_CDEV -device ukbd -device ums - -# HID support -options HID_DEBUG # enable debug msgs -device hid # Generic HID support diff --git a/sys/powerpc/conf/dpaa/DPAA b/sys/powerpc/conf/dpaa/DPAA deleted file mode 100644 index 742fdc9da32..00000000000 --- a/sys/powerpc/conf/dpaa/DPAA +++ /dev/null @@ -1,100 +0,0 @@ -# -# Common kernel config for Freescale QorIQ DPAA development boards like the -# P2041RDB, P3041DS and P5020DS. -# -# This is not standalone kernel config. Use it only for including -# purposes. -# - -cpu BOOKE -cpu BOOKE_E500 - -machine powerpc powerpc -#makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols -#makeoptions WERROR="-Werror -Wno-format" -makeoptions NO_MODULES=yes - -# Platform support -options MPC85XX #Freescale SoC family - -options SMP #Symmetric Multi Processing - -#options SCHED_4BSD #4BSD scheduler -options INET #InterNETworking -options INET6 #IPv6 communications protocols -options FFS #Berkeley Fast Filesystem -options NFSCL #New Network Filesystem Client -options SOFTUPDATES #Enable FFS soft updates support -options PROCFS #Process filesystem (requires PSEUDOFS) -options PSEUDOFS #Pseudo-filesystem framework -options GEOM_PART_GPT #GUID Partition Tables. -options GEOM_LABEL -options COMPAT_43 #Compatible with BSD 4.3 [KEEP THIS!] -options SYSVSHM #SYSV-style shared memory -options SYSVMSG #SYSV-style message queues -options SYSVSEM #SYSV-style semaphores -options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions -options NO_SWAPPING - -options KDB #Enable the kernel debugger -options DDB #Support DDB -options GDB - -options ALT_BREAK_TO_DEBUGGER -options BREAK_TO_DEBUGGER -options DIAGNOSTIC -options INVARIANTS #Enable calls of extra sanity checking -options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS - -options KTR -options KTR_COMPILE=0xffffffff -options KTR_MASK=KTR_PMAP -options KTR_ENTRIES=8192 - -options WITNESS #Enable checks to detect deadlocks and cycles -#options WITNESS_KDB - -# RamFS Root -#options GEOM_UZIP -#options MD_ROOT -#options MD_ROOT_SIZE=10240 - -# Netbooting -options BOOTP -options BOOTP_NFSROOT -options BOOTP_NFSV3 -options BOOTP_WIRED_TO=dtsec3 -options NFS_ROOT - -# Block devices -device mmc -device mmcsd -device sdhci - -# Network devices -device miibus # MII bus support -device iflib -device em - - -# I2C support -device iicbus -device iic - -device uart -device ehci -device usb -device scbus -device da -device umass -device pty -device cfi - -device pci - -# Pseudo devices -device ether # Ethernet support -device loop # Network loopback -device bpf # Berkeley packet filter -device md # Memory "disks" - diff --git a/sys/powerpc/conf/dpaa/config.dpaa b/sys/powerpc/conf/dpaa/config.dpaa deleted file mode 100644 index 6a923baed89..00000000000 --- a/sys/powerpc/conf/dpaa/config.dpaa +++ /dev/null @@ -1,24 +0,0 @@ - -files "dpaa/files.dpaa" - -makeoptions DPAA_COMPILE_CMD="${LINUXKPI_C} ${DPAAWARNFLAGS} \ - -Wno-cast-qual -Wno-unused-function -Wno-init-self -fms-extensions \ - -include $S/contrib/ncsw/build/dflags.h \ - -Wno-error=missing-prototypes \ - -I$S/contrib/ncsw/build/ \ - -I$S/contrib/ncsw/inc \ - -I$S/contrib/ncsw/inc/cores \ - -I$S/contrib/ncsw/inc/etc \ - -I$S/contrib/ncsw/inc/Peripherals \ - -I$S/contrib/ncsw/etc \ - -I$S/contrib/ncsw/Peripherals/BM \ - -I$S/contrib/ncsw/Peripherals/FM \ - -I$S/contrib/ncsw/Peripherals/FM/HC \ - -I$S/contrib/ncsw/Peripherals/FM/inc \ - -I$S/contrib/ncsw/Peripherals/FM/MAC \ - -I$S/contrib/ncsw/Peripherals/FM/Pcd \ - -I$S/contrib/ncsw/Peripherals/FM/Port \ - -I$S/contrib/ncsw/Peripherals/FM/Rtc \ - -I$S/contrib/ncsw/Peripherals/QM \ - -I$S/contrib/ncsw/inc/flib \ - -I$S/contrib/ncsw/inc/integrations" diff --git a/sys/powerpc/conf/dpaa/files.dpaa b/sys/powerpc/conf/dpaa/files.dpaa deleted file mode 100644 index 4af0f896d88..00000000000 --- a/sys/powerpc/conf/dpaa/files.dpaa +++ /dev/null @@ -1,122 +0,0 @@ - -# NetCommSw drivers -contrib/ncsw/etc/error.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/etc/ncsw_list.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/etc/memcpy.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/etc/mm.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/etc/ncsw_mem.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/etc/sprint.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/BM/bm.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/BM/bman_low.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/BM/bm_pool.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/BM/bm_portal.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/SP/fm_sp.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/Rtc/fm_rtc.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/Rtc/fman_rtc.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/Port/fman_port.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/Port/fm_port.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/Port/fm_port_im.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/Pcd/fm_cc.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/Pcd/fm_kg.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/Pcd/fman_kg.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/Pcd/fm_manip.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/Pcd/fm_pcd.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/Pcd/fm_plcr.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/Pcd/fm_prs.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/Pcd/fman_prs.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/MAC/dtsec.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/MAC/dtsec_mii_acc.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/MAC/fman_dtsec.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/MAC/fman_dtsec_mii_acc.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/MAC/fm_mac.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/MAC/fman_dtsec.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/MAC/tgec.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/MAC/tgec_mii_acc.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/MAC/fman_tgec.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/HC/hc.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/fm_muram.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/fm_ncsw.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/FM/fman_ncsw.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD} ${NO_WMISLEADING_INDENTATION}" -contrib/ncsw/Peripherals/QM/qm.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/Peripherals/QM/qm_portal_fqr.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/user/env/stdlib.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/user/env/xx.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -contrib/ncsw/user/env/core.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" - -# FreeBSD Wrappers -dev/dpaa/portals_common.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -dev/dpaa/bman_portals.c optional dpaa fdt \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -dev/dpaa/bman.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -dev/dpaa/bman_fdt.c optional dpaa fdt \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -dev/dpaa/qman_portals.c optional dpaa fdt \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -dev/dpaa/qman.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -dev/dpaa/qman_fdt.c optional dpaa fdt \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -dev/dpaa/fman.c optional dpaa fdt \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -dev/dpaa/fman_mdio.c optional dpaa fdt \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -dev/dpaa/fman_fdt.c optional dpaa fdt \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -dev/dpaa/if_dtsec.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -dev/dpaa/if_dtsec_im.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -dev/dpaa/if_dtsec_rm.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -dev/dpaa/if_dtsec_fdt.c optional dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" - -# Examples -dev/dpaa/bman-example.c optional bman_example dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" -dev/dpaa/qman-example.c optional qman_example dpaa \ - no-depend compile-with "${DPAA_COMPILE_CMD}" diff --git a/sys/powerpc/cpufreq/dfs.c b/sys/powerpc/cpufreq/dfs.c deleted file mode 100644 index 20f090ca8c2..00000000000 --- a/sys/powerpc/cpufreq/dfs.c +++ /dev/null @@ -1,228 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include "cpufreq_if.h" - -struct dfs_softc { - device_t dev; - int dfs4; -}; - -static void dfs_identify(driver_t *driver, device_t parent); -static int dfs_probe(device_t dev); -static int dfs_attach(device_t dev); -static int dfs_settings(device_t dev, struct cf_setting *sets, int *count); -static int dfs_set(device_t dev, const struct cf_setting *set); -static int dfs_get(device_t dev, struct cf_setting *set); -static int dfs_type(device_t dev, int *type); - -static device_method_t dfs_methods[] = { - /* Device interface */ - DEVMETHOD(device_identify, dfs_identify), - DEVMETHOD(device_probe, dfs_probe), - DEVMETHOD(device_attach, dfs_attach), - - /* cpufreq interface */ - DEVMETHOD(cpufreq_drv_set, dfs_set), - DEVMETHOD(cpufreq_drv_get, dfs_get), - DEVMETHOD(cpufreq_drv_type, dfs_type), - DEVMETHOD(cpufreq_drv_settings, dfs_settings), - {0, 0} -}; - -static driver_t dfs_driver = { - "dfs", - dfs_methods, - sizeof(struct dfs_softc) -}; - -static devclass_t dfs_devclass; -DRIVER_MODULE(dfs, cpu, dfs_driver, dfs_devclass, 0, 0); - -/* - * Bits of the HID1 register to enable DFS. See page 2-24 of "MPC7450 - * RISC Microprocessor Family Reference Manual", rev. 5. - */ - -#define HID1_DFS2 (1UL << 22) -#define HID1_DFS4 (1UL << 23) - -static void -dfs_identify(driver_t *driver, device_t parent) -{ - uint16_t vers; - vers = mfpvr() >> 16; - - /* Check for an MPC 7447A or 7448 CPU */ - switch (vers) { - case MPC7447A: - case MPC7448: - break; - default: - return; - } - - /* Make sure we're not being doubly invoked. */ - if (device_find_child(parent, "dfs", -1) != NULL) - return; - - /* - * We attach a child for every CPU since settings need to - * be performed on every CPU in the SMP case. - */ - if (BUS_ADD_CHILD(parent, 10, "dfs", -1) == NULL) - device_printf(parent, "add dfs child failed\n"); -} - -static int -dfs_probe(device_t dev) -{ - if (resource_disabled("dfs", 0)) - return (ENXIO); - - device_set_desc(dev, "Dynamic Frequency Switching"); - return (0); -} - -static int -dfs_attach(device_t dev) -{ - struct dfs_softc *sc; - uint16_t vers; - - sc = device_get_softc(dev); - sc->dev = dev; - sc->dfs4 = 0; - vers = mfpvr() >> 16; - - /* The 7448 supports divide-by-four as well */ - if (vers == MPC7448) - sc->dfs4 = 1; - - cpufreq_register(dev); - return (0); -} - -static int -dfs_settings(device_t dev, struct cf_setting *sets, int *count) -{ - struct dfs_softc *sc; - int states; - - sc = device_get_softc(dev); - states = sc->dfs4 ? 3 : 2; - if (sets == NULL || count == NULL) - return (EINVAL); - if (*count < states) - return (E2BIG); - - /* Return a list of valid settings for this driver. */ - memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * states); - - sets[0].freq = 10000; sets[0].dev = dev; - sets[1].freq = 5000; sets[1].dev = dev; - if (sc->dfs4) { - sets[2].freq = 2500; - sets[2].dev = dev; - } - *count = states; - - return (0); -} - -static int -dfs_set(device_t dev, const struct cf_setting *set) -{ - register_t hid1; - - if (set == NULL) - return (EINVAL); - - hid1 = mfspr(SPR_HID1); - hid1 &= ~(HID1_DFS2 | HID1_DFS4); - - if (set->freq == 5000) - hid1 |= HID1_DFS2; - else if (set->freq == 2500) - hid1 |= HID1_DFS4; - - /* - * Now set the HID1 register with new values. Calling sequence - * taken from page 2-26 of the MPC7450 family CPU manual. - */ - - powerpc_sync(); - mtspr(SPR_HID1, hid1); - powerpc_sync(); isync(); - - return (0); -} - -static int -dfs_get(device_t dev, struct cf_setting *set) -{ - struct dfs_softc *sc; - register_t hid1; - - if (set == NULL) - return (EINVAL); - sc = device_get_softc(dev); - - memset(set, CPUFREQ_VAL_UNKNOWN, sizeof(*set)); - - hid1 = mfspr(SPR_HID1); - - set->freq = 10000; - if (hid1 & HID1_DFS2) - set->freq = 5000; - else if (sc->dfs4 && (hid1 & HID1_DFS4)) - set->freq = 2500; - - set->dev = dev; - - return (0); -} - -static int -dfs_type(device_t dev, int *type) -{ - - if (type == NULL) - return (EINVAL); - - *type = CPUFREQ_TYPE_RELATIVE; - return (0); -} diff --git a/sys/powerpc/cpufreq/mpc85xx_jog.c b/sys/powerpc/cpufreq/mpc85xx_jog.c deleted file mode 100644 index 99c458a4891..00000000000 --- a/sys/powerpc/cpufreq/mpc85xx_jog.c +++ /dev/null @@ -1,339 +0,0 @@ -/*- - * Copyright (c) 2017 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include - -#include "cpufreq_if.h" - -/* No worries about uint32_t math overflow in here, because the highest - * multiplier supported is 4, and the highest speed part is still well below - * 2GHz. - */ - -#define GUTS_PORPLLSR (CCSRBAR_VA + 0xe0000) -#define GUTS_PMJCR (CCSRBAR_VA + 0xe007c) -#define PMJCR_RATIO_M 0x3f -#define PMJCR_CORE_MULT(x,y) ((x) << (16 + ((y) * 8))) -#define PMJCR_GET_CORE_MULT(x,y) (((x) >> (16 + ((y) * 8))) & 0x3f) -#define GUTS_POWMGTCSR (CCSRBAR_VA + 0xe0080) -#define POWMGTCSR_JOG 0x00200000 -#define POWMGTCSR_INT_MASK 0x00000f00 - -#define MHZ 1000000 - -struct mpc85xx_jog_softc { - device_t dev; - int cpu; - int low; - int high; - int min_freq; -}; - -static struct ofw_compat_data *mpc85xx_jog_devcompat(void); -static void mpc85xx_jog_identify(driver_t *driver, device_t parent); -static int mpc85xx_jog_probe(device_t dev); -static int mpc85xx_jog_attach(device_t dev); -static int mpc85xx_jog_settings(device_t dev, struct cf_setting *sets, int *count); -static int mpc85xx_jog_set(device_t dev, const struct cf_setting *set); -static int mpc85xx_jog_get(device_t dev, struct cf_setting *set); -static int mpc85xx_jog_type(device_t dev, int *type); - -static device_method_t mpc85xx_jog_methods[] = { - /* Device interface */ - DEVMETHOD(device_identify, mpc85xx_jog_identify), - DEVMETHOD(device_probe, mpc85xx_jog_probe), - DEVMETHOD(device_attach, mpc85xx_jog_attach), - - /* cpufreq interface */ - DEVMETHOD(cpufreq_drv_set, mpc85xx_jog_set), - DEVMETHOD(cpufreq_drv_get, mpc85xx_jog_get), - DEVMETHOD(cpufreq_drv_type, mpc85xx_jog_type), - DEVMETHOD(cpufreq_drv_settings, mpc85xx_jog_settings), - {0, 0} -}; - -static driver_t mpc85xx_jog_driver = { - "jog", - mpc85xx_jog_methods, - sizeof(struct mpc85xx_jog_softc) -}; - -static devclass_t mpc85xx_jog_devclass; -DRIVER_MODULE(mpc85xx_jog, cpu, mpc85xx_jog_driver, mpc85xx_jog_devclass, 0, 0); - -struct mpc85xx_constraints { - int threshold; /* Threshold frequency, in MHz, for setting CORE_SPD bit. */ - int min_mult; /* Minimum PLL multiplier. */ -}; - -static struct mpc85xx_constraints mpc8536_constraints = { - 800, - 3 -}; - -static struct mpc85xx_constraints p1022_constraints = { - 500, - 2 -}; - -static struct ofw_compat_data jog_compat[] = { - {"fsl,mpc8536-guts", (uintptr_t)&mpc8536_constraints}, - {"fsl,p1022-guts", (uintptr_t)&p1022_constraints}, - {NULL, 0} -}; - -static struct ofw_compat_data * -mpc85xx_jog_devcompat() -{ - phandle_t node; - int i; - - node = OF_finddevice("/soc"); - if (node == -1) - return (NULL); - - for (i = 0; jog_compat[i].ocd_str != NULL; i++) - if (ofw_bus_find_compatible(node, jog_compat[i].ocd_str) > 0) - break; - - if (jog_compat[i].ocd_str == NULL) - return (NULL); - - return (&jog_compat[i]); -} - -static void -mpc85xx_jog_identify(driver_t *driver, device_t parent) -{ - struct ofw_compat_data *compat; - - /* Make sure we're not being doubly invoked. */ - if (device_find_child(parent, "mpc85xx_jog", -1) != NULL) - return; - - compat = mpc85xx_jog_devcompat(); - if (compat == NULL) - return; - - /* - * We attach a child for every CPU since settings need to - * be performed on every CPU in the SMP case. - */ - if (BUS_ADD_CHILD(parent, 10, "jog", -1) == NULL) - device_printf(parent, "add jog child failed\n"); -} - -static int -mpc85xx_jog_probe(device_t dev) -{ - struct ofw_compat_data *compat; - - compat = mpc85xx_jog_devcompat(); - if (compat == NULL || compat->ocd_str == NULL) - return (ENXIO); - - device_set_desc(dev, "Freescale CPU Jogger"); - return (0); -} - -static int -mpc85xx_jog_attach(device_t dev) -{ - struct ofw_compat_data *compat; - struct mpc85xx_jog_softc *sc; - struct mpc85xx_constraints *constraints; - phandle_t cpu; - uint32_t reg; - - sc = device_get_softc(dev); - sc->dev = dev; - - compat = mpc85xx_jog_devcompat(); - constraints = (struct mpc85xx_constraints *)compat->ocd_data; - cpu = ofw_bus_get_node(device_get_parent(dev)); - - if (cpu <= 0) { - device_printf(dev,"No CPU device tree node!\n"); - return (ENXIO); - } - - OF_getencprop(cpu, "reg", &sc->cpu, sizeof(sc->cpu)); - - reg = ccsr_read4(GUTS_PORPLLSR); - - /* - * Assume power-on PLL is the highest PLL config supported on the - * board. - */ - sc->high = PMJCR_GET_CORE_MULT(reg, sc->cpu); - sc->min_freq = constraints->threshold; - sc->low = constraints->min_mult; - - cpufreq_register(dev); - return (0); -} - -static int -mpc85xx_jog_settings(device_t dev, struct cf_setting *sets, int *count) -{ - struct mpc85xx_jog_softc *sc; - uint32_t sysclk; - int i; - - sc = device_get_softc(dev); - if (sets == NULL || count == NULL) - return (EINVAL); - if (*count < sc->high - 1) - return (E2BIG); - - sysclk = mpc85xx_get_system_clock(); - /* Return a list of valid settings for this driver. */ - memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * sc->high); - - for (i = sc->high; i >= sc->low; --i) { - sets[sc->high - i].freq = sysclk * i / MHZ; - sets[sc->high - i].dev = dev; - sets[sc->high - i].spec[0] = i; - } - *count = sc->high - sc->low + 1; - - return (0); -} - -struct jog_rv_args { - int cpu; - int mult; - int slow; - volatile int inprogress; -}; - -static void -mpc85xx_jog_set_int(void *arg) -{ - struct jog_rv_args *args = arg; - uint32_t reg; - - if (PCPU_GET(cpuid) == args->cpu) { - reg = ccsr_read4(GUTS_PMJCR); - reg &= ~PMJCR_CORE_MULT(PMJCR_RATIO_M, args->cpu); - reg |= PMJCR_CORE_MULT(args->mult, args->cpu); - if (args->slow) - reg &= ~(1 << (12 + args->cpu)); - else - reg |= (1 << (12 + args->cpu)); - - ccsr_write4(GUTS_PMJCR, reg); - - reg = ccsr_read4(GUTS_POWMGTCSR); - reg |= POWMGTCSR_JOG | POWMGTCSR_INT_MASK; - ccsr_write4(GUTS_POWMGTCSR, reg); - - /* Wait for completion */ - do { - DELAY(100); - reg = ccsr_read4(GUTS_POWMGTCSR); - } while (reg & POWMGTCSR_JOG); - - reg = ccsr_read4(GUTS_POWMGTCSR); - ccsr_write4(GUTS_POWMGTCSR, reg & ~POWMGTCSR_INT_MASK); - ccsr_read4(GUTS_POWMGTCSR); - - args->inprogress = 0; - } else { - while (args->inprogress) - cpu_spinwait(); - } -} - -static int -mpc85xx_jog_set(device_t dev, const struct cf_setting *set) -{ - struct mpc85xx_jog_softc *sc; - struct jog_rv_args args; - - if (set == NULL) - return (EINVAL); - - sc = device_get_softc(dev); - - args.slow = (set->freq <= sc->min_freq); - args.mult = set->spec[0]; - args.cpu = PCPU_GET(cpuid); - args.inprogress = 1; - smp_rendezvous(smp_no_rendezvous_barrier, mpc85xx_jog_set_int, - smp_no_rendezvous_barrier, &args); - - return (0); -} - -static int -mpc85xx_jog_get(device_t dev, struct cf_setting *set) -{ - struct mpc85xx_jog_softc *sc; - uint32_t pmjcr; - uint32_t freq; - - if (set == NULL) - return (EINVAL); - - sc = device_get_softc(dev); - memset(set, CPUFREQ_VAL_UNKNOWN, sizeof(*set)); - - pmjcr = ccsr_read4(GUTS_PORPLLSR); - freq = PMJCR_GET_CORE_MULT(pmjcr, sc->cpu); - freq *= mpc85xx_get_system_clock(); - freq /= MHZ; - - set->freq = freq; - set->dev = dev; - - return (0); -} - -static int -mpc85xx_jog_type(device_t dev, int *type) -{ - - if (type == NULL) - return (EINVAL); - - *type = CPUFREQ_TYPE_ABSOLUTE; - return (0); -} diff --git a/sys/powerpc/cpufreq/pcr.c b/sys/powerpc/cpufreq/pcr.c deleted file mode 100644 index dd91bbc4547..00000000000 --- a/sys/powerpc/cpufreq/pcr.c +++ /dev/null @@ -1,341 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include "cpufreq_if.h" - -struct pcr_softc { - device_t dev; - uint32_t pcr_vals[3]; - int nmodes; -}; - -static void pcr_identify(driver_t *driver, device_t parent); -static int pcr_probe(device_t dev); -static int pcr_attach(device_t dev); -static int pcr_settings(device_t dev, struct cf_setting *sets, int *count); -static int pcr_set(device_t dev, const struct cf_setting *set); -static int pcr_get(device_t dev, struct cf_setting *set); -static int pcr_type(device_t dev, int *type); - -static device_method_t pcr_methods[] = { - /* Device interface */ - DEVMETHOD(device_identify, pcr_identify), - DEVMETHOD(device_probe, pcr_probe), - DEVMETHOD(device_attach, pcr_attach), - - /* cpufreq interface */ - DEVMETHOD(cpufreq_drv_set, pcr_set), - DEVMETHOD(cpufreq_drv_get, pcr_get), - DEVMETHOD(cpufreq_drv_type, pcr_type), - DEVMETHOD(cpufreq_drv_settings, pcr_settings), - {0, 0} -}; - -static driver_t pcr_driver = { - "pcr", - pcr_methods, - sizeof(struct pcr_softc) -}; - -static devclass_t pcr_devclass; -DRIVER_MODULE(pcr, cpu, pcr_driver, pcr_devclass, 0, 0); - -/* - * States - */ - -#define PCR_TO_FREQ(a) ((a >> 17) & 3) - -#define PCR_FULL 0 -#define PCR_HALF 1 -#define PCR_QUARTER 2 /* Only on 970MP */ - -#define PSR_RECEIVED (1ULL << 61) -#define PSR_COMPLETED (1ULL << 61) - -/* - * SCOM addresses - */ - -#define SCOM_PCR 0x0aa00100 /* Power Control Register */ -#define SCOM_PCR_BIT 0x80000000 /* Data bit for PCR */ -#define SCOM_PSR 0x40800100 /* Power Status Register */ - -/* - * SCOM Glue - */ - -#define SCOMC_READ 0x00008000 -#define SCOMC_WRITE 0x00000000 - -static void -write_scom(register_t address, uint64_t value) -{ - register_t msr; - #ifndef __powerpc64__ - register_t hi, lo, scratch; - #endif - - msr = mfmsr(); - mtmsr(msr & ~PSL_EE); isync(); - - #ifdef __powerpc64__ - mtspr(SPR_SCOMD, value); - #else - hi = (value >> 32) & 0xffffffff; - lo = value & 0xffffffff; - mtspr64(SPR_SCOMD, hi, lo, scratch); - #endif - isync(); - mtspr(SPR_SCOMC, address | SCOMC_WRITE); - isync(); - - mtmsr(msr); isync(); -} - -static uint64_t -read_scom(register_t address) -{ - register_t msr; - uint64_t ret; - - msr = mfmsr(); - mtmsr(msr & ~PSL_EE); isync(); - - mtspr(SPR_SCOMC, address | SCOMC_READ); - isync(); - - __asm __volatile ("mfspr %0,%1;" - " mr %0+1, %0; srdi %0,%0,32" : "=r" (ret) : "K" (SPR_SCOMD)); - - (void)mfspr(SPR_SCOMC); /* Complete transcation */ - - mtmsr(msr); isync(); - - return (ret); -} - -static void -pcr_identify(driver_t *driver, device_t parent) -{ - uint16_t vers; - vers = mfpvr() >> 16; - - /* Check for an IBM 970-class CPU */ - switch (vers) { - case IBM970FX: - case IBM970GX: - case IBM970MP: - break; - default: - return; - } - - /* Make sure we're not being doubly invoked. */ - if (device_find_child(parent, "pcr", -1) != NULL) - return; - - /* - * We attach a child for every CPU since settings need to - * be performed on every CPU in the SMP case. - */ - if (BUS_ADD_CHILD(parent, 10, "pcr", -1) == NULL) - device_printf(parent, "add pcr child failed\n"); -} - -static int -pcr_probe(device_t dev) -{ - if (resource_disabled("pcr", 0)) - return (ENXIO); - - device_set_desc(dev, "PPC 970 Power Control Register"); - return (0); -} - -static int -pcr_attach(device_t dev) -{ - struct pcr_softc *sc; - phandle_t cpu; - uint32_t modes[3]; - int i; - - sc = device_get_softc(dev); - sc->dev = dev; - - cpu = ofw_bus_get_node(device_get_parent(dev)); - - if (cpu <= 0) { - device_printf(dev,"No CPU device tree node!\n"); - return (ENXIO); - } - - if (OF_getproplen(cpu, "power-mode-data") <= 0) { - /* Use the first CPU's node */ - cpu = OF_child(OF_parent(cpu)); - } - - /* - * Collect the PCR values for each mode from the device tree. - * These include bus timing information, and so cannot be - * directly computed. - */ - sc->nmodes = OF_getproplen(cpu, "power-mode-data"); - if (sc->nmodes <= 0 || sc->nmodes > sizeof(sc->pcr_vals)) { - device_printf(dev,"No power mode data in device tree!\n"); - return (ENXIO); - } - OF_getprop(cpu, "power-mode-data", modes, sc->nmodes); - sc->nmodes /= sizeof(modes[0]); - - /* Sort the modes */ - for (i = 0; i < sc->nmodes; i++) - sc->pcr_vals[PCR_TO_FREQ(modes[i])] = modes[i]; - - cpufreq_register(dev); - return (0); -} - -static int -pcr_settings(device_t dev, struct cf_setting *sets, int *count) -{ - struct pcr_softc *sc; - - sc = device_get_softc(dev); - if (sets == NULL || count == NULL) - return (EINVAL); - if (*count < sc->nmodes) - return (E2BIG); - - /* Return a list of valid settings for this driver. */ - memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * sc->nmodes); - - sets[0].freq = 10000; sets[0].dev = dev; - sets[1].freq = 5000; sets[1].dev = dev; - if (sc->nmodes > 2) { - sets[2].freq = 2500; - sets[2].dev = dev; - } - *count = sc->nmodes; - - return (0); -} - -static int -pcr_set(device_t dev, const struct cf_setting *set) -{ - struct pcr_softc *sc; - register_t pcr, msr; - uint64_t psr; - - if (set == NULL) - return (EINVAL); - sc = device_get_softc(dev); - - /* Construct the new PCR */ - - pcr = SCOM_PCR_BIT; - - if (set->freq == 10000) - pcr |= sc->pcr_vals[0]; - else if (set->freq == 5000) - pcr |= sc->pcr_vals[1]; - else if (set->freq == 2500) - pcr |= sc->pcr_vals[2]; - - msr = mfmsr(); - mtmsr(msr & ~PSL_EE); isync(); - - /* 970MP requires PCR and PCRH to be cleared first */ - - write_scom(SCOM_PCR,0); /* Clear PCRH */ - write_scom(SCOM_PCR,SCOM_PCR_BIT); /* Clear PCR */ - - /* Set PCR */ - - write_scom(SCOM_PCR, pcr); - - /* Wait for completion */ - - do { - DELAY(100); - psr = read_scom(SCOM_PSR); - } while ((psr & PSR_RECEIVED) && !(psr & PSR_COMPLETED)); - - mtmsr(msr); isync(); - - return (0); -} - -static int -pcr_get(device_t dev, struct cf_setting *set) -{ - uint64_t psr; - - if (set == NULL) - return (EINVAL); - - memset(set, CPUFREQ_VAL_UNKNOWN, sizeof(*set)); - - psr = read_scom(SCOM_PSR); - - /* We want bits 6 and 7 */ - psr = (psr >> 56) & 3; - - set->freq = 10000; - if (psr == PCR_HALF) - set->freq = 5000; - else if (psr == PCR_QUARTER) - set->freq = 2500; - - set->dev = dev; - - return (0); -} - -static int -pcr_type(device_t dev, int *type) -{ - - if (type == NULL) - return (EINVAL); - - *type = CPUFREQ_TYPE_RELATIVE; - return (0); -} diff --git a/sys/powerpc/cpufreq/pmcr.c b/sys/powerpc/cpufreq/pmcr.c deleted file mode 100644 index c8ebdf55788..00000000000 --- a/sys/powerpc/cpufreq/pmcr.c +++ /dev/null @@ -1,244 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2018 Justin Hibbits - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include "cpufreq_if.h" - -static int pstate_ids[256]; -static int pstate_freqs[256]; -static int npstates; - -static void parse_pstates(void) -{ - phandle_t node; - - node = OF_finddevice("/ibm,opal/power-mgt"); - - /* If this fails, npstates will remain 0, and any attachment will bail. */ - if (node == -1) - return; - - npstates = OF_getencprop(node, "ibm,pstate-ids", pstate_ids, - sizeof(pstate_ids)); - if (npstates < 0) { - npstates = 0; - return; - } - - if (OF_getencprop(node, "ibm,pstate-frequencies-mhz", pstate_freqs, - sizeof(pstate_freqs)) != npstates) { - npstates = 0; - return; - } - npstates /= sizeof(cell_t); - -} - -/* Make this a sysinit so it runs before the cpufreq driver attaches. */ -SYSINIT(parse_pstates, SI_SUB_DRIVERS, SI_ORDER_MIDDLE, parse_pstates, NULL); - -#define PMCR_UPPERPS_MASK 0xff00000000000000UL -#define PMCR_UPPERPS_SHIFT 56 -#define PMCR_LOWERPS_MASK 0x00ff000000000000UL -#define PMCR_LOWERPS_SHIFT 48 -#define PMCR_VERSION_MASK 0x0000000f -#define PMCR_VERSION_1 1 - -struct pmcr_softc { - device_t dev; -}; - -static void pmcr_identify(driver_t *driver, device_t parent); -static int pmcr_probe(device_t dev); -static int pmcr_attach(device_t dev); -static int pmcr_settings(device_t dev, struct cf_setting *sets, int *count); -static int pmcr_set(device_t dev, const struct cf_setting *set); -static int pmcr_get(device_t dev, struct cf_setting *set); -static int pmcr_type(device_t dev, int *type); - -static device_method_t pmcr_methods[] = { - /* Device interface */ - DEVMETHOD(device_identify, pmcr_identify), - DEVMETHOD(device_probe, pmcr_probe), - DEVMETHOD(device_attach, pmcr_attach), - - /* cpufreq interface */ - DEVMETHOD(cpufreq_drv_set, pmcr_set), - DEVMETHOD(cpufreq_drv_get, pmcr_get), - DEVMETHOD(cpufreq_drv_type, pmcr_type), - DEVMETHOD(cpufreq_drv_settings, pmcr_settings), - {0, 0} -}; - -static driver_t pmcr_driver = { - "pmcr", - pmcr_methods, - sizeof(struct pmcr_softc) -}; - -static devclass_t pmcr_devclass; -DRIVER_MODULE(pmcr, cpu, pmcr_driver, pmcr_devclass, 0, 0); - -static void -pmcr_identify(driver_t *driver, device_t parent) -{ - - /* Make sure we're not being doubly invoked. */ - if (device_find_child(parent, "pmcr", -1) != NULL) - return; - - /* - * We attach a child for every CPU since settings need to - * be performed on every CPU in the SMP case. - */ - if (BUS_ADD_CHILD(parent, 10, "pmcr", -1) == NULL) - device_printf(parent, "add pmcr child failed\n"); -} - -static int -pmcr_probe(device_t dev) -{ - if (resource_disabled("pmcr", 0)) - return (ENXIO); - - if (npstates == 0) - return (ENXIO); - - device_set_desc(dev, "Power Management Control Register"); - return (0); -} - -static int -pmcr_attach(device_t dev) -{ - struct pmcr_softc *sc; - - sc = device_get_softc(dev); - sc->dev = dev; - - cpufreq_register(dev); - return (0); -} - -static int -pmcr_settings(device_t dev, struct cf_setting *sets, int *count) -{ - struct pmcr_softc *sc; - int i; - - sc = device_get_softc(dev); - if (sets == NULL || count == NULL) - return (EINVAL); - if (*count < npstates) - return (E2BIG); - - /* Return a list of valid settings for this driver. */ - memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * npstates); - - for (i = 0; i < npstates; i++) { - sets[i].freq = pstate_freqs[i]; - sets[i].spec[0] = pstate_ids[i]; - sets[i].spec[1] = i; - sets[i].dev = dev; - } - *count = npstates; - - return (0); -} - -static int -pmcr_set(device_t dev, const struct cf_setting *set) -{ - register_t pmcr; - - if (set == NULL) - return (EINVAL); - - if (set->spec[1] < 0 || set->spec[1] >= npstates) - return (EINVAL); - - pmcr = ((long)set->spec[0] << PMCR_LOWERPS_SHIFT) & PMCR_LOWERPS_MASK; - pmcr |= ((long)set->spec[0] << PMCR_UPPERPS_SHIFT) & PMCR_UPPERPS_MASK; - pmcr |= PMCR_VERSION_1; - - mtspr(SPR_PMCR, pmcr); - powerpc_sync(); isync(); - - return (0); -} - -static int -pmcr_get(device_t dev, struct cf_setting *set) -{ - struct pmcr_softc *sc; - register_t pmcr; - int i, pstate; - - if (set == NULL) - return (EINVAL); - sc = device_get_softc(dev); - - memset(set, CPUFREQ_VAL_UNKNOWN, sizeof(*set)); - - pmcr = mfspr(SPR_PMCR); - - pstate = (pmcr & PMCR_LOWERPS_MASK) >> PMCR_LOWERPS_SHIFT; - - for (i = 0; i < npstates && pstate_ids[i] != pstate; i++) - ; - - if (i == npstates) - return (EINVAL); - - set->spec[0] = pstate; - set->spec[1] = i; - set->freq = pstate_freqs[i]; - - set->dev = dev; - - return (0); -} - -static int -pmcr_type(device_t dev, int *type) -{ - - if (type == NULL) - return (EINVAL); - - *type = CPUFREQ_TYPE_ABSOLUTE; - return (0); -} diff --git a/sys/powerpc/cpufreq/pmufreq.c b/sys/powerpc/cpufreq/pmufreq.c deleted file mode 100644 index f500fa5373d..00000000000 --- a/sys/powerpc/cpufreq/pmufreq.c +++ /dev/null @@ -1,219 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011 Justin Hibbits - * Copyright (c) 2009 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "cpufreq_if.h" -#include "powerpc/powermac/pmuvar.h" - -struct pmufreq_softc { - device_t dev; - uint32_t minfreq; - uint32_t maxfreq; - uint32_t curfreq; -}; - -static void pmufreq_identify(driver_t *driver, device_t parent); -static int pmufreq_probe(device_t dev); -static int pmufreq_attach(device_t dev); -static int pmufreq_settings(device_t dev, struct cf_setting *sets, int *count); -static int pmufreq_set(device_t dev, const struct cf_setting *set); -static int pmufreq_get(device_t dev, struct cf_setting *set); -static int pmufreq_type(device_t dev, int *type); - -static device_method_t pmufreq_methods[] = { - /* Device interface */ - DEVMETHOD(device_identify, pmufreq_identify), - DEVMETHOD(device_probe, pmufreq_probe), - DEVMETHOD(device_attach, pmufreq_attach), - - /* cpufreq interface */ - DEVMETHOD(cpufreq_drv_set, pmufreq_set), - DEVMETHOD(cpufreq_drv_get, pmufreq_get), - DEVMETHOD(cpufreq_drv_type, pmufreq_type), - DEVMETHOD(cpufreq_drv_settings, pmufreq_settings), - {0, 0} -}; - -static driver_t pmufreq_driver = { - "pmufreq", - pmufreq_methods, - sizeof(struct pmufreq_softc) -}; - -static devclass_t pmufreq_devclass; -DRIVER_MODULE(pmufreq, cpu, pmufreq_driver, pmufreq_devclass, 0, 0); - -static void -pmufreq_identify(driver_t *driver, device_t parent) -{ - phandle_t node; - uint32_t min_freq; - - node = ofw_bus_get_node(parent); - if (OF_getprop(node, "min-clock-frequency", &min_freq, sizeof(min_freq)) == -1) - return; - - /* Make sure we're not being doubly invoked. */ - if (device_find_child(parent, "pmufreq", -1) != NULL) - return; - - /* - * We attach a child for every CPU since settings need to - * be performed on every CPU in the SMP case. - */ - if (BUS_ADD_CHILD(parent, 10, "pmufreq", -1) == NULL) - device_printf(parent, "add pmufreq child failed\n"); -} - -static int -pmufreq_probe(device_t dev) -{ - struct pmufreq_softc *sc; - phandle_t node; - uint32_t min_freq; - - if (resource_disabled("pmufreq", 0)) - return (ENXIO); - - sc = device_get_softc(dev); - node = ofw_bus_get_node(device_get_parent(dev)); - /* - * A scalable MPC7455 has min-clock-frequency/max-clock-frequency as OFW - * properties of the 'cpu' node. - */ - if (OF_getprop(node, "min-clock-frequency", &min_freq, sizeof(min_freq)) == -1) - return (ENXIO); - device_set_desc(dev, "PMU-based frequency scaling"); - return (0); -} - -static int -pmufreq_attach(device_t dev) -{ - struct pmufreq_softc *sc; - phandle_t node; - - sc = device_get_softc(dev); - sc->dev = dev; - - node = ofw_bus_get_node(device_get_parent(dev)); - OF_getprop(node, "min-clock-frequency", &sc->minfreq, sizeof(sc->minfreq)); - OF_getprop(node, "max-clock-frequency", &sc->maxfreq, sizeof(sc->maxfreq)); - OF_getprop(node, "rounded-clock-frequency", &sc->curfreq, sizeof(sc->curfreq)); - sc->minfreq /= 1000000; - sc->maxfreq /= 1000000; - sc->curfreq /= 1000000; - - cpufreq_register(dev); - return (0); -} - -static int -pmufreq_settings(device_t dev, struct cf_setting *sets, int *count) -{ - struct pmufreq_softc *sc; - - sc = device_get_softc(dev); - if (sets == NULL || count == NULL) - return (EINVAL); - if (*count < 2) - return (E2BIG); - - /* Return a list of valid settings for this driver. */ - memset(sets, CPUFREQ_VAL_UNKNOWN, sizeof(*sets) * 2); - - sets[0].freq = sc->maxfreq; sets[0].dev = dev; - sets[1].freq = sc->minfreq; sets[1].dev = dev; - /* Set high latency for CPU frequency changes, it's a tedious process. */ - sets[0].lat = INT_MAX; - sets[1].lat = INT_MAX; - *count = 2; - - return (0); -} - -static int -pmufreq_set(device_t dev, const struct cf_setting *set) -{ - struct pmufreq_softc *sc; - int error, speed_sel; - - if (set == NULL) - return (EINVAL); - - sc = device_get_softc(dev); - - if (set->freq == sc->maxfreq) - speed_sel = 0; - else - speed_sel = 1; - - error = pmu_set_speed(speed_sel); - if (error == 0) - sc->curfreq = set->freq; - - return (error); -} - -static int -pmufreq_get(device_t dev, struct cf_setting *set) -{ - struct pmufreq_softc *sc; - - if (set == NULL) - return (EINVAL); - sc = device_get_softc(dev); - - set->freq = sc->curfreq; - set->dev = dev; - - return (0); -} - -static int -pmufreq_type(device_t dev, int *type) -{ - - if (type == NULL) - return (EINVAL); - - *type = CPUFREQ_TYPE_ABSOLUTE; - return (0); -} diff --git a/sys/powerpc/fpu/fpu_add.c b/sys/powerpc/fpu/fpu_add.c deleted file mode 100644 index 80d19d78c1f..00000000000 --- a/sys/powerpc/fpu/fpu_add.c +++ /dev/null @@ -1,225 +0,0 @@ -/* $NetBSD: fpu_add.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This software was developed by the Computer Systems Engineering group - * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and - * contributed to Berkeley. - * - * All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Lawrence Berkeley Laboratory. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)fpu_add.c 8.1 (Berkeley) 6/11/93 - */ - -/* - * Perform an FPU add (return x + y). - * - * To subtract, negate y and call add. - */ - -#include -#include -#include - -#include -#include - -#include -#include - -struct fpn * -fpu_add(struct fpemu *fe) -{ - struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r; - u_int r0, r1, r2, r3; - int rd; - - /* - * Put the `heavier' operand on the right (see fpu_emu.h). - * Then we will have one of the following cases, taken in the - * following order: - * - * - y = NaN. Implied: if only one is a signalling NaN, y is. - * The result is y. - * - y = Inf. Implied: x != NaN (is 0, number, or Inf: the NaN - * case was taken care of earlier). - * If x = -y, the result is NaN. Otherwise the result - * is y (an Inf of whichever sign). - * - y is 0. Implied: x = 0. - * If x and y differ in sign (one positive, one negative), - * the result is +0 except when rounding to -Inf. If same: - * +0 + +0 = +0; -0 + -0 = -0. - * - x is 0. Implied: y != 0. - * Result is y. - * - other. Implied: both x and y are numbers. - * Do addition a la Hennessey & Patterson. - */ - DPRINTF(FPE_REG, ("fpu_add:\n")); - DUMPFPN(FPE_REG, x); - DUMPFPN(FPE_REG, y); - DPRINTF(FPE_REG, ("=>\n")); - ORDER(x, y); - if (ISNAN(y)) { - fe->fe_cx |= FPSCR_VXSNAN; - DUMPFPN(FPE_REG, y); - return (y); - } - if (ISINF(y)) { - if (ISINF(x) && x->fp_sign != y->fp_sign) { - fe->fe_cx |= FPSCR_VXISI; - return (fpu_newnan(fe)); - } - DUMPFPN(FPE_REG, y); - return (y); - } - rd = ((fe->fe_fpscr) & FPSCR_RN); - if (ISZERO(y)) { - if (rd != FP_RM) /* only -0 + -0 gives -0 */ - y->fp_sign &= x->fp_sign; - else /* any -0 operand gives -0 */ - y->fp_sign |= x->fp_sign; - DUMPFPN(FPE_REG, y); - return (y); - } - if (ISZERO(x)) { - DUMPFPN(FPE_REG, y); - return (y); - } - /* - * We really have two numbers to add, although their signs may - * differ. Make the exponents match, by shifting the smaller - * number right (e.g., 1.011 => 0.1011) and increasing its - * exponent (2^3 => 2^4). Note that we do not alter the exponents - * of x and y here. - */ - r = &fe->fe_f3; - r->fp_class = FPC_NUM; - if (x->fp_exp == y->fp_exp) { - r->fp_exp = x->fp_exp; - r->fp_sticky = 0; - } else { - if (x->fp_exp < y->fp_exp) { - /* - * Try to avoid subtract case iii (see below). - * This also guarantees that x->fp_sticky = 0. - */ - SWAP(x, y); - } - /* now x->fp_exp > y->fp_exp */ - r->fp_exp = x->fp_exp; - r->fp_sticky = fpu_shr(y, x->fp_exp - y->fp_exp); - } - r->fp_sign = x->fp_sign; - if (x->fp_sign == y->fp_sign) { - FPU_DECL_CARRY - - /* - * The signs match, so we simply add the numbers. The result - * may be `supernormal' (as big as 1.111...1 + 1.111...1, or - * 11.111...0). If so, a single bit shift-right will fix it - * (but remember to adjust the exponent). - */ - /* r->fp_mant = x->fp_mant + y->fp_mant */ - FPU_ADDS(r->fp_mant[3], x->fp_mant[3], y->fp_mant[3]); - FPU_ADDCS(r->fp_mant[2], x->fp_mant[2], y->fp_mant[2]); - FPU_ADDCS(r->fp_mant[1], x->fp_mant[1], y->fp_mant[1]); - FPU_ADDC(r0, x->fp_mant[0], y->fp_mant[0]); - if ((r->fp_mant[0] = r0) >= FP_2) { - (void) fpu_shr(r, 1); - r->fp_exp++; - } - } else { - FPU_DECL_CARRY - - /* - * The signs differ, so things are rather more difficult. - * H&P would have us negate the negative operand and add; - * this is the same as subtracting the negative operand. - * This is quite a headache. Instead, we will subtract - * y from x, regardless of whether y itself is the negative - * operand. When this is done one of three conditions will - * hold, depending on the magnitudes of x and y: - * case i) |x| > |y|. The result is just x - y, - * with x's sign, but it may need to be normalized. - * case ii) |x| = |y|. The result is 0 (maybe -0) - * so must be fixed up. - * case iii) |x| < |y|. We goofed; the result should - * be (y - x), with the same sign as y. - * We could compare |x| and |y| here and avoid case iii, - * but that would take just as much work as the subtract. - * We can tell case iii has occurred by an overflow. - * - * N.B.: since x->fp_exp >= y->fp_exp, x->fp_sticky = 0. - */ - /* r->fp_mant = x->fp_mant - y->fp_mant */ - FPU_SET_CARRY(y->fp_sticky); - FPU_SUBCS(r3, x->fp_mant[3], y->fp_mant[3]); - FPU_SUBCS(r2, x->fp_mant[2], y->fp_mant[2]); - FPU_SUBCS(r1, x->fp_mant[1], y->fp_mant[1]); - FPU_SUBC(r0, x->fp_mant[0], y->fp_mant[0]); - if (r0 < FP_2) { - /* cases i and ii */ - if ((r0 | r1 | r2 | r3) == 0) { - /* case ii */ - r->fp_class = FPC_ZERO; - r->fp_sign = rd == FP_RM; - return (r); - } - } else { - /* - * Oops, case iii. This can only occur when the - * exponents were equal, in which case neither - * x nor y have sticky bits set. Flip the sign - * (to y's sign) and negate the result to get y - x. - */ -#ifdef DIAGNOSTIC - if (x->fp_exp != y->fp_exp || r->fp_sticky) - panic("fpu_add"); -#endif - r->fp_sign = y->fp_sign; - FPU_SUBS(r3, 0, r3); - FPU_SUBCS(r2, 0, r2); - FPU_SUBCS(r1, 0, r1); - FPU_SUBC(r0, 0, r0); - } - r->fp_mant[3] = r3; - r->fp_mant[2] = r2; - r->fp_mant[1] = r1; - r->fp_mant[0] = r0; - if (r0 < FP_1) - fpu_norm(r); - } - DUMPFPN(FPE_REG, r); - return (r); -} diff --git a/sys/powerpc/fpu/fpu_arith.h b/sys/powerpc/fpu/fpu_arith.h deleted file mode 100644 index 8aeb1732919..00000000000 --- a/sys/powerpc/fpu/fpu_arith.h +++ /dev/null @@ -1,152 +0,0 @@ -/* $NetBSD: fpu_arith.h,v 1.4 2005/12/24 20:07:28 perry Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This software was developed by the Computer Systems Engineering group - * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and - * contributed to Berkeley. - * - * All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Lawrence Berkeley Laboratory. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)fpu_arith.h 8.1 (Berkeley) 6/11/93 - */ - -/* - * Extended-precision arithmetic. - * - * We hold the notion of a `carry register', which may or may not be a - * machine carry bit or register. On the SPARC, it is just the machine's - * carry bit. - * - * In the worst case, you can compute the carry from x+y as - * (unsigned)(x + y) < (unsigned)x - * and from x+y+c as - * ((unsigned)(x + y + c) <= (unsigned)x && (y|c) != 0) - * for example. - */ - -#ifndef FPE_USE_ASM - -/* set up for extended-precision arithemtic */ -#define FPU_DECL_CARRY quad_t fpu_carry, fpu_tmp; - -/* - * We have three kinds of add: - * add with carry: r = x + y + c - * add (ignoring current carry) and set carry: c'r = x + y + 0 - * add with carry and set carry: c'r = x + y + c - * The macros use `C' for `use carry' and `S' for `set carry'. - * Note that the state of the carry is undefined after ADDC and SUBC, - * so if all you have for these is `add with carry and set carry', - * that is OK. - * - * The same goes for subtract, except that we compute x - y - c. - * - * Finally, we have a way to get the carry into a `regular' variable, - * or set it from a value. SET_CARRY turns 0 into no-carry, nonzero - * into carry; GET_CARRY sets its argument to 0 or 1. - */ -#define FPU_ADDC(r, x, y) \ - (r) = (x) + (y) + (!!fpu_carry) -#define FPU_ADDS(r, x, y) \ - { \ - fpu_tmp = (quad_t)(x) + (quad_t)(y); \ - (r) = (u_int)fpu_tmp; \ - fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \ - } -#define FPU_ADDCS(r, x, y) \ - { \ - fpu_tmp = (quad_t)(x) + (quad_t)(y) + (!!fpu_carry); \ - (r) = (u_int)fpu_tmp; \ - fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \ - } -#define FPU_SUBC(r, x, y) \ - (r) = (x) - (y) - (!!fpu_carry) -#define FPU_SUBS(r, x, y) \ - { \ - fpu_tmp = (quad_t)(x) - (quad_t)(y); \ - (r) = (u_int)fpu_tmp; \ - fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \ - } -#define FPU_SUBCS(r, x, y) \ - { \ - fpu_tmp = (quad_t)(x) - (quad_t)(y) - (!!fpu_carry); \ - (r) = (u_int)fpu_tmp; \ - fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \ - } - -#define FPU_GET_CARRY(r) (r) = (!!fpu_carry) -#define FPU_SET_CARRY(v) fpu_carry = ((v) != 0) - -#else -/* set up for extended-precision arithemtic */ -#define FPU_DECL_CARRY - -/* - * We have three kinds of add: - * add with carry: r = x + y + c - * add (ignoring current carry) and set carry: c'r = x + y + 0 - * add with carry and set carry: c'r = x + y + c - * The macros use `C' for `use carry' and `S' for `set carry'. - * Note that the state of the carry is undefined after ADDC and SUBC, - * so if all you have for these is `add with carry and set carry', - * that is OK. - * - * The same goes for subtract, except that we compute x - y - c. - * - * Finally, we have a way to get the carry into a `regular' variable, - * or set it from a value. SET_CARRY turns 0 into no-carry, nonzero - * into carry; GET_CARRY sets its argument to 0 or 1. - */ -#define FPU_ADDC(r, x, y) \ - __asm volatile("adde %0,%1,%2" : "=r"(r) : "r"(x), "r"(y)) -#define FPU_ADDS(r, x, y) \ - __asm volatile("addc %0,%1,%2" : "=r"(r) : "r"(x), "r"(y)) -#define FPU_ADDCS(r, x, y) \ - __asm volatile("adde %0,%1,%2" : "=r"(r) : "r"(x), "r"(y)) -#define FPU_SUBC(r, x, y) \ - __asm volatile("subfe %0,%2,%1" : "=r"(r) : "r"(x), "r"(y)) -#define FPU_SUBS(r, x, y) \ - __asm volatile("subfc %0,%2,%1" : "=r"(r) : "r"(x), "r"(y)) -#define FPU_SUBCS(r, x, y) \ - __asm volatile("subfe %0,%2,%1" : "=r"(r) : "r"(x), "r"(y)) - -#define FPU_GET_CARRY(r) __asm volatile("li %0,0; addie %0,%0,0" : "=r"(r)) -/* This one needs to destroy a temp register. */ -#define FPU_SET_CARRY(v) do { int __tmp; \ - __asm volatile("addic %0,%0,-1" : "r"(__tmp) : "r"(v)); \ - } while (0) - -#define FPU_SHL1_BY_ADD /* shift left 1 faster by ADDC than (a<<1)|(b>>31) */ -#endif diff --git a/sys/powerpc/fpu/fpu_compare.c b/sys/powerpc/fpu/fpu_compare.c deleted file mode 100644 index 21441c0049c..00000000000 --- a/sys/powerpc/fpu/fpu_compare.c +++ /dev/null @@ -1,161 +0,0 @@ -/* $NetBSD: fpu_compare.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This software was developed by the Computer Systems Engineering group - * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and - * contributed to Berkeley. - * - * All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Lawrence Berkeley Laboratory. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)fpu_compare.c 8.1 (Berkeley) 6/11/93 - */ - -/* - * FCMPU and FCMPO instructions. - * - * These rely on the fact that our internal wide format is achieved by - * adding zero bits to the end of narrower mantissas. - */ - -#include -#include -#include - -#include - -#include -#include - -/* - * Perform a compare instruction (with or without unordered exception). - * This updates the fcc field in the fsr. - * - * If either operand is NaN, the result is unordered. For ordered, this - * causes an NV exception. Everything else is ordered: - * |Inf| > |numbers| > |0|. - * We already arranged for fp_class(Inf) > fp_class(numbers) > fp_class(0), - * so we get this directly. Note, however, that two zeros compare equal - * regardless of sign, while everything else depends on sign. - * - * Incidentally, two Infs of the same sign compare equal (per the 80387 - * manual---it would be nice if the SPARC documentation were more - * complete). - */ -void -fpu_compare(struct fpemu *fe, int ordered) -{ - struct fpn *a, *b, *r; - int cc; - - a = &fe->fe_f1; - b = &fe->fe_f2; - r = &fe->fe_f3; - - if (ISNAN(a) || ISNAN(b)) { - /* - * In any case, we already got an exception for signalling - * NaNs; here we may replace that one with an identical - * exception, but so what?. - */ - cc = FPSCR_FU; - if (ISSNAN(a) || ISSNAN(b)) - cc |= FPSCR_VXSNAN; - if (ordered) { - if (fe->fe_fpscr & FPSCR_VE || ISQNAN(a) || ISQNAN(b)) - cc |= FPSCR_VXVC; - } - goto done; - } - - /* - * Must handle both-zero early to avoid sign goofs. Otherwise, - * at most one is 0, and if the signs differ we are done. - */ - if (ISZERO(a) && ISZERO(b)) { - cc = FPSCR_FE; - goto done; - } - if (a->fp_sign) { /* a < 0 (or -0) */ - if (!b->fp_sign) { /* b >= 0 (or if a = -0, b > 0) */ - cc = FPSCR_FL; - goto done; - } - } else { /* a > 0 (or +0) */ - if (b->fp_sign) { /* b <= -0 (or if a = +0, b < 0) */ - cc = FPSCR_FG; - goto done; - } - } - - /* - * Now the signs are the same (but may both be negative). All - * we have left are these cases: - * - * |a| < |b| [classes or values differ] - * |a| > |b| [classes or values differ] - * |a| == |b| [classes and values identical] - * - * We define `diff' here to expand these as: - * - * |a| < |b|, a,b >= 0: a < b => FSR_CC_LT - * |a| < |b|, a,b < 0: a > b => FSR_CC_GT - * |a| > |b|, a,b >= 0: a > b => FSR_CC_GT - * |a| > |b|, a,b < 0: a < b => FSR_CC_LT - */ -#define opposite_cc(cc) ((cc) == FPSCR_FL ? FPSCR_FG : FPSCR_FL) -#define diff(magnitude) (a->fp_sign ? opposite_cc(magnitude) : (magnitude)) - if (a->fp_class < b->fp_class) { /* |a| < |b| */ - cc = diff(FPSCR_FL); - goto done; - } - if (a->fp_class > b->fp_class) { /* |a| > |b| */ - cc = diff(FPSCR_FG); - goto done; - } - /* now none can be 0: only Inf and numbers remain */ - if (ISINF(a)) { /* |Inf| = |Inf| */ - cc = FPSCR_FE; - goto done; - } - fpu_sub(fe); - if (ISZERO(r)) - cc = FPSCR_FE; - else if (r->fp_sign) - cc = FPSCR_FL; - else - cc = FPSCR_FG; -done: - fe->fe_cx = cc; -} diff --git a/sys/powerpc/fpu/fpu_div.c b/sys/powerpc/fpu/fpu_div.c deleted file mode 100644 index 6c198ff75a2..00000000000 --- a/sys/powerpc/fpu/fpu_div.c +++ /dev/null @@ -1,291 +0,0 @@ -/* $NetBSD: fpu_div.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This software was developed by the Computer Systems Engineering group - * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and - * contributed to Berkeley. - * - * All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Lawrence Berkeley Laboratory. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)fpu_div.c 8.1 (Berkeley) 6/11/93 - */ - -/* - * Perform an FPU divide (return x / y). - */ - -#include -#include -#include - -#include - -#include -#include - -/* - * Division of normal numbers is done as follows: - * - * x and y are floating point numbers, i.e., in the form 1.bbbb * 2^e. - * If X and Y are the mantissas (1.bbbb's), the quotient is then: - * - * q = (X / Y) * 2^((x exponent) - (y exponent)) - * - * Since X and Y are both in [1.0,2.0), the quotient's mantissa (X / Y) - * will be in [0.5,2.0). Moreover, it will be less than 1.0 if and only - * if X < Y. In that case, it will have to be shifted left one bit to - * become a normal number, and the exponent decremented. Thus, the - * desired exponent is: - * - * left_shift = x->fp_mant < y->fp_mant; - * result_exp = x->fp_exp - y->fp_exp - left_shift; - * - * The quotient mantissa X/Y can then be computed one bit at a time - * using the following algorithm: - * - * Q = 0; -- Initial quotient. - * R = X; -- Initial remainder, - * if (left_shift) -- but fixed up in advance. - * R *= 2; - * for (bit = FP_NMANT; --bit >= 0; R *= 2) { - * if (R >= Y) { - * Q |= 1 << bit; - * R -= Y; - * } - * } - * - * The subtraction R -= Y always removes the uppermost bit from R (and - * can sometimes remove additional lower-order 1 bits); this proof is - * left to the reader. - * - * This loop correctly calculates the guard and round bits since they are - * included in the expanded internal representation. The sticky bit - * is to be set if and only if any other bits beyond guard and round - * would be set. From the above it is obvious that this is true if and - * only if the remainder R is nonzero when the loop terminates. - * - * Examining the loop above, we can see that the quotient Q is built - * one bit at a time ``from the top down''. This means that we can - * dispense with the multi-word arithmetic and just build it one word - * at a time, writing each result word when it is done. - * - * Furthermore, since X and Y are both in [1.0,2.0), we know that, - * initially, R >= Y. (Recall that, if X < Y, R is set to X * 2 and - * is therefore at in [2.0,4.0).) Thus Q is sure to have bit FP_NMANT-1 - * set, and R can be set initially to either X - Y (when X >= Y) or - * 2X - Y (when X < Y). In addition, comparing R and Y is difficult, - * so we will simply calculate R - Y and see if that underflows. - * This leads to the following revised version of the algorithm: - * - * R = X; - * bit = FP_1; - * D = R - Y; - * if (D >= 0) { - * result_exp = x->fp_exp - y->fp_exp; - * R = D; - * q = bit; - * bit >>= 1; - * } else { - * result_exp = x->fp_exp - y->fp_exp - 1; - * q = 0; - * } - * R <<= 1; - * do { - * D = R - Y; - * if (D >= 0) { - * q |= bit; - * R = D; - * } - * R <<= 1; - * } while ((bit >>= 1) != 0); - * Q[0] = q; - * for (i = 1; i < 4; i++) { - * q = 0, bit = 1 << 31; - * do { - * D = R - Y; - * if (D >= 0) { - * q |= bit; - * R = D; - * } - * R <<= 1; - * } while ((bit >>= 1) != 0); - * Q[i] = q; - * } - * - * This can be refined just a bit further by moving the `R <<= 1' - * calculations to the front of the do-loops and eliding the first one. - * The process can be terminated immediately whenever R becomes 0, but - * this is relatively rare, and we do not bother. - */ - -struct fpn * -fpu_div(struct fpemu *fe) -{ - struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2; - u_int q, bit; - u_int r0, r1, r2, r3, d0, d1, d2, d3, y0, y1, y2, y3; - FPU_DECL_CARRY - - /* - * Since divide is not commutative, we cannot just use ORDER. - * Check either operand for NaN first; if there is at least one, - * order the signalling one (if only one) onto the right, then - * return it. Otherwise we have the following cases: - * - * Inf / Inf = NaN, plus NV exception - * Inf / num = Inf [i.e., return x] - * Inf / 0 = Inf [i.e., return x] - * 0 / Inf = 0 [i.e., return x] - * 0 / num = 0 [i.e., return x] - * 0 / 0 = NaN, plus NV exception - * num / Inf = 0 - * num / num = num (do the divide) - * num / 0 = Inf, plus DZ exception - */ - DPRINTF(FPE_REG, ("fpu_div:\n")); - DUMPFPN(FPE_REG, x); - DUMPFPN(FPE_REG, y); - DPRINTF(FPE_REG, ("=>\n")); - if (ISNAN(x) || ISNAN(y)) { - ORDER(x, y); - fe->fe_cx |= FPSCR_VXSNAN; - DUMPFPN(FPE_REG, y); - return (y); - } - /* - * Need to split the following out cause they generate different - * exceptions. - */ - if (ISINF(x)) { - if (x->fp_class == y->fp_class) { - fe->fe_cx |= FPSCR_VXIDI; - return (fpu_newnan(fe)); - } - DUMPFPN(FPE_REG, x); - return (x); - } - if (ISZERO(x)) { - fe->fe_cx |= FPSCR_ZX; - if (x->fp_class == y->fp_class) { - fe->fe_cx |= FPSCR_VXZDZ; - return (fpu_newnan(fe)); - } - DUMPFPN(FPE_REG, x); - return (x); - } - - /* all results at this point use XOR of operand signs */ - x->fp_sign ^= y->fp_sign; - if (ISINF(y)) { - x->fp_class = FPC_ZERO; - DUMPFPN(FPE_REG, x); - return (x); - } - if (ISZERO(y)) { - fe->fe_cx = FPSCR_ZX; - x->fp_class = FPC_INF; - DUMPFPN(FPE_REG, x); - return (x); - } - - /* - * Macros for the divide. See comments at top for algorithm. - * Note that we expand R, D, and Y here. - */ - -#define SUBTRACT /* D = R - Y */ \ - FPU_SUBS(d3, r3, y3); FPU_SUBCS(d2, r2, y2); \ - FPU_SUBCS(d1, r1, y1); FPU_SUBC(d0, r0, y0) - -#define NONNEGATIVE /* D >= 0 */ \ - ((int)d0 >= 0) - -#ifdef FPU_SHL1_BY_ADD -#define SHL1 /* R <<= 1 */ \ - FPU_ADDS(r3, r3, r3); FPU_ADDCS(r2, r2, r2); \ - FPU_ADDCS(r1, r1, r1); FPU_ADDC(r0, r0, r0) -#else -#define SHL1 \ - r0 = (r0 << 1) | (r1 >> 31), r1 = (r1 << 1) | (r2 >> 31), \ - r2 = (r2 << 1) | (r3 >> 31), r3 <<= 1 -#endif - -#define LOOP /* do ... while (bit >>= 1) */ \ - do { \ - SHL1; \ - SUBTRACT; \ - if (NONNEGATIVE) { \ - q |= bit; \ - r0 = d0, r1 = d1, r2 = d2, r3 = d3; \ - } \ - } while ((bit >>= 1) != 0) - -#define WORD(r, i) /* calculate r->fp_mant[i] */ \ - q = 0; \ - bit = 1 << 31; \ - LOOP; \ - (x)->fp_mant[i] = q - - /* Setup. Note that we put our result in x. */ - r0 = x->fp_mant[0]; - r1 = x->fp_mant[1]; - r2 = x->fp_mant[2]; - r3 = x->fp_mant[3]; - y0 = y->fp_mant[0]; - y1 = y->fp_mant[1]; - y2 = y->fp_mant[2]; - y3 = y->fp_mant[3]; - - bit = FP_1; - SUBTRACT; - if (NONNEGATIVE) { - x->fp_exp -= y->fp_exp; - r0 = d0, r1 = d1, r2 = d2, r3 = d3; - q = bit; - bit >>= 1; - } else { - x->fp_exp -= y->fp_exp + 1; - q = 0; - } - LOOP; - x->fp_mant[0] = q; - WORD(x, 1); - WORD(x, 2); - WORD(x, 3); - x->fp_sticky = r0 | r1 | r2 | r3; - - DUMPFPN(FPE_REG, x); - return (x); -} diff --git a/sys/powerpc/fpu/fpu_emu.c b/sys/powerpc/fpu/fpu_emu.c deleted file mode 100644 index 393252005a9..00000000000 --- a/sys/powerpc/fpu/fpu_emu.c +++ /dev/null @@ -1,788 +0,0 @@ -/* $NetBSD: fpu_emu.c,v 1.14 2005/12/11 12:18:42 christos Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright 2001 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This software was developed by the Computer Systems Engineering group - * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and - * contributed to Berkeley. - * - * All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Lawrence Berkeley Laboratory. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)fpu.c 8.1 (Berkeley) 6/11/93 - */ - -#include -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -static SYSCTL_NODE(_hw, OID_AUTO, fpu_emu, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, - "FPU emulator"); - -#define FPU_EMU_EVCNT_DECL(name) \ -static u_int fpu_emu_evcnt_##name; \ -SYSCTL_INT(_hw_fpu_emu, OID_AUTO, evcnt_##name, CTLFLAG_RD, \ - &fpu_emu_evcnt_##name, 0, "") - -#define FPU_EMU_EVCNT_INCR(name) fpu_emu_evcnt_##name++ - -FPU_EMU_EVCNT_DECL(stfiwx); -FPU_EMU_EVCNT_DECL(fpstore); -FPU_EMU_EVCNT_DECL(fpload); -FPU_EMU_EVCNT_DECL(fcmpu); -FPU_EMU_EVCNT_DECL(frsp); -FPU_EMU_EVCNT_DECL(fctiw); -FPU_EMU_EVCNT_DECL(fcmpo); -FPU_EMU_EVCNT_DECL(mtfsb1); -FPU_EMU_EVCNT_DECL(fnegabs); -FPU_EMU_EVCNT_DECL(mcrfs); -FPU_EMU_EVCNT_DECL(mtfsb0); -FPU_EMU_EVCNT_DECL(fmr); -FPU_EMU_EVCNT_DECL(mtfsfi); -FPU_EMU_EVCNT_DECL(fnabs); -FPU_EMU_EVCNT_DECL(fabs); -FPU_EMU_EVCNT_DECL(mffs); -FPU_EMU_EVCNT_DECL(mtfsf); -FPU_EMU_EVCNT_DECL(fctid); -FPU_EMU_EVCNT_DECL(fcfid); -FPU_EMU_EVCNT_DECL(fdiv); -FPU_EMU_EVCNT_DECL(fsub); -FPU_EMU_EVCNT_DECL(fadd); -FPU_EMU_EVCNT_DECL(fsqrt); -FPU_EMU_EVCNT_DECL(fsel); -FPU_EMU_EVCNT_DECL(fpres); -FPU_EMU_EVCNT_DECL(fmul); -FPU_EMU_EVCNT_DECL(frsqrte); -FPU_EMU_EVCNT_DECL(fmulsub); -FPU_EMU_EVCNT_DECL(fmuladd); -FPU_EMU_EVCNT_DECL(fnmsub); -FPU_EMU_EVCNT_DECL(fnmadd); - -/* FPSR exception masks */ -#define FPSR_EX_MSK (FPSCR_VX|FPSCR_OX|FPSCR_UX|FPSCR_ZX| \ - FPSCR_XX|FPSCR_VXSNAN|FPSCR_VXISI|FPSCR_VXIDI| \ - FPSCR_VXZDZ|FPSCR_VXIMZ|FPSCR_VXVC|FPSCR_VXSOFT|\ - FPSCR_VXSQRT|FPSCR_VXCVI) -#define FPSR_EX (FPSCR_VE|FPSCR_OE|FPSCR_UE|FPSCR_ZE|FPSCR_XE) -#define FPSR_EXOP (FPSR_EX_MSK&(~FPSR_EX)) - -int fpe_debug = 0; - -#ifdef DEBUG -vm_offset_t opc_disasm(vm_offset_t, int); - -/* - * Dump a `fpn' structure. - */ -void -fpu_dumpfpn(struct fpn *fp) -{ - static const char *class[] = { - "SNAN", "QNAN", "ZERO", "NUM", "INF" - }; - - printf("%s %c.%x %x %x %xE%d", class[fp->fp_class + 2], - fp->fp_sign ? '-' : ' ', - fp->fp_mant[0], fp->fp_mant[1], - fp->fp_mant[2], fp->fp_mant[3], - fp->fp_exp); -} -#endif - -/* - * fpu_execute returns the following error numbers (0 = no error): - */ -#define FPE 1 /* take a floating point exception */ -#define NOTFPU 2 /* not an FPU instruction */ -#define FAULT 3 - -/* - * Emulate a floating-point instruction. - * Return zero for success, else signal number. - * (Typically: zero, SIGFPE, SIGILL, SIGSEGV) - */ -int -fpu_emulate(struct trapframe *frame, struct fpu *fpf) -{ - union instr insn; - struct fpemu fe; - int sig; - - /* initialize insn.is_datasize to tell it is *not* initialized */ - fe.fe_fpstate = fpf; - fe.fe_cx = 0; - - /* always set this (to avoid a warning) */ - - if (copyin((void *) (frame->srr0), &insn.i_int, sizeof (insn.i_int))) { -#ifdef DEBUG - printf("fpu_emulate: fault reading opcode\n"); -#endif - return SIGSEGV; - } - - DPRINTF(FPE_EX, ("fpu_emulate: emulating insn %x at %p\n", - insn.i_int, (void *)frame->srr0)); - - if ((insn.i_any.i_opcd == OPC_TWI) || - ((insn.i_any.i_opcd == OPC_integer_31) && - (insn.i_x.i_xo == OPC31_TW))) { - /* Check for the two trap insns. */ - DPRINTF(FPE_EX, ("fpu_emulate: SIGTRAP\n")); - return (SIGTRAP); - } - sig = 0; - switch (fpu_execute(frame, &fe, &insn)) { - case 0: - DPRINTF(FPE_EX, ("fpu_emulate: success\n")); - frame->srr0 += 4; - break; - - case FPE: - DPRINTF(FPE_EX, ("fpu_emulate: SIGFPE\n")); - sig = SIGFPE; - break; - - case FAULT: - DPRINTF(FPE_EX, ("fpu_emulate: SIGSEGV\n")); - sig = SIGSEGV; - break; - - case NOTFPU: - default: - DPRINTF(FPE_EX, ("fpu_emulate: SIGILL\n")); -#ifdef DEBUG - if (fpe_debug & FPE_EX) { - printf("fpu_emulate: illegal insn %x at %p:", - insn.i_int, (void *) (frame->srr0)); - opc_disasm(frame->srr0, insn.i_int); - } -#endif - sig = SIGILL; -#ifdef DEBUG - if (fpe_debug & FPE_EX) - kdb_enter(KDB_WHY_UNSET, "illegal instruction"); -#endif - break; - } - - return (sig); -} - -/* - * Execute an FPU instruction (one that runs entirely in the FPU; not - * FBfcc or STF, for instance). On return, fe->fe_fs->fs_fsr will be - * modified to reflect the setting the hardware would have left. - * - * Note that we do not catch all illegal opcodes, so you can, for instance, - * multiply two integers this way. - */ -int -fpu_execute(struct trapframe *tf, struct fpemu *fe, union instr *insn) -{ - struct fpn *fp; - union instr instr = *insn; - int *a; - vm_offset_t addr; - int ra, rb, rc, rt, type, mask, fsr, cx, bf, setcr; - unsigned int cond; - struct fpu *fs; - - /* Setup work. */ - fp = NULL; - fs = fe->fe_fpstate; - fe->fe_fpscr = ((int *)&fs->fpscr)[1]; - - /* - * On PowerPC all floating point values are stored in registers - * as doubles, even when used for single precision operations. - */ - type = FTYPE_DBL; - cond = instr.i_any.i_rc; - setcr = 0; - bf = 0; /* XXX gcc */ - -#if defined(DDB) && defined(DEBUG) - if (fpe_debug & FPE_EX) { - vm_offset_t loc = tf->srr0; - - printf("Trying to emulate: %p ", (void *)loc); - opc_disasm(loc, instr.i_int); - } -#endif - - /* - * `Decode' and execute instruction. - */ - - if ((instr.i_any.i_opcd >= OPC_LFS && instr.i_any.i_opcd <= OPC_STFDU) || - instr.i_any.i_opcd == OPC_integer_31) { - /* - * Handle load/store insns: - * - * Convert to/from single if needed, calculate addr, - * and update index reg if needed. - */ - double buf; - size_t size = sizeof(float); - int store, update; - - cond = 0; /* ld/st never set condition codes */ - - if (instr.i_any.i_opcd == OPC_integer_31) { - if (instr.i_x.i_xo == OPC31_STFIWX) { - FPU_EMU_EVCNT_INCR(stfiwx); - - /* Store as integer */ - ra = instr.i_x.i_ra; - rb = instr.i_x.i_rb; - DPRINTF(FPE_INSN, - ("reg %d has %jx reg %d has %jx\n", - ra, (uintmax_t)tf->fixreg[ra], rb, - (uintmax_t)tf->fixreg[rb])); - - addr = tf->fixreg[rb]; - if (ra != 0) - addr += tf->fixreg[ra]; - rt = instr.i_x.i_rt; - a = (int *)&fs->fpr[rt].fpr; - DPRINTF(FPE_INSN, - ("fpu_execute: Store INT %x at %p\n", - a[1], (void *)addr)); - if (copyout(&a[1], (void *)addr, sizeof(int))) - return (FAULT); - return (0); - } - - if ((instr.i_x.i_xo & OPC31_FPMASK) != OPC31_FPOP) - /* Not an indexed FP load/store op */ - return (NOTFPU); - - store = (instr.i_x.i_xo & 0x80); - if (instr.i_x.i_xo & 0x40) - size = sizeof(double); - else - type = FTYPE_SNG; - update = (instr.i_x.i_xo & 0x20); - - /* calculate EA of load/store */ - ra = instr.i_x.i_ra; - rb = instr.i_x.i_rb; - DPRINTF(FPE_INSN, ("reg %d has %jx reg %d has %jx\n", - ra, (uintmax_t)tf->fixreg[ra], rb, - (uintmax_t)tf->fixreg[rb])); - addr = tf->fixreg[rb]; - if (ra != 0) - addr += tf->fixreg[ra]; - rt = instr.i_x.i_rt; - } else { - store = instr.i_d.i_opcd & 0x4; - if (instr.i_d.i_opcd & 0x2) - size = sizeof(double); - else - type = FTYPE_SNG; - update = instr.i_d.i_opcd & 0x1; - - /* calculate EA of load/store */ - ra = instr.i_d.i_ra; - addr = instr.i_d.i_d; - DPRINTF(FPE_INSN, ("reg %d has %jx displ %jx\n", - ra, (uintmax_t)tf->fixreg[ra], - (uintmax_t)addr)); - if (ra != 0) - addr += tf->fixreg[ra]; - rt = instr.i_d.i_rt; - } - - if (update && ra == 0) - return (NOTFPU); - - if (store) { - /* Store */ - FPU_EMU_EVCNT_INCR(fpstore); - if (type != FTYPE_DBL) { - DPRINTF(FPE_INSN, - ("fpu_execute: Store SNG at %p\n", - (void *)addr)); - fpu_explode(fe, fp = &fe->fe_f1, FTYPE_DBL, rt); - fpu_implode(fe, fp, type, (void *)&buf); - if (copyout(&buf, (void *)addr, size)) - return (FAULT); - } else { - DPRINTF(FPE_INSN, - ("fpu_execute: Store DBL at %p\n", - (void *)addr)); - if (copyout(&fs->fpr[rt].fpr, (void *)addr, - size)) - return (FAULT); - } - } else { - /* Load */ - FPU_EMU_EVCNT_INCR(fpload); - DPRINTF(FPE_INSN, ("fpu_execute: Load from %p\n", - (void *)addr)); - if (copyin((const void *)addr, &fs->fpr[rt].fpr, - size)) - return (FAULT); - if (type != FTYPE_DBL) { - fpu_explode(fe, fp = &fe->fe_f1, type, rt); - fpu_implode(fe, fp, FTYPE_DBL, - (u_int *)&fs->fpr[rt].fpr); - } - } - if (update) - tf->fixreg[ra] = addr; - /* Complete. */ - return (0); -#ifdef notyet - } else if (instr.i_any.i_opcd == OPC_load_st_62) { - /* These are 64-bit extensions */ - return (NOTFPU); -#endif - } else if (instr.i_any.i_opcd == OPC_sp_fp_59 || - instr.i_any.i_opcd == OPC_dp_fp_63) { - if (instr.i_any.i_opcd == OPC_dp_fp_63 && - !(instr.i_a.i_xo & OPC63M_MASK)) { - /* Format X */ - rt = instr.i_x.i_rt; - ra = instr.i_x.i_ra; - rb = instr.i_x.i_rb; - - /* One of the special opcodes.... */ - switch (instr.i_x.i_xo) { - case OPC63_FCMPU: - FPU_EMU_EVCNT_INCR(fcmpu); - DPRINTF(FPE_INSN, ("fpu_execute: FCMPU\n")); - rt >>= 2; - fpu_explode(fe, &fe->fe_f1, type, ra); - fpu_explode(fe, &fe->fe_f2, type, rb); - fpu_compare(fe, 0); - /* Make sure we do the condition regs. */ - cond = 0; - /* N.B.: i_rs is already left shifted by two. */ - bf = instr.i_x.i_rs & 0xfc; - setcr = 1; - break; - - case OPC63_FRSP: - /* - * Convert to single: - * - * PowerPC uses this to round a double - * precision value to single precision, - * but values in registers are always - * stored in double precision format. - */ - FPU_EMU_EVCNT_INCR(frsp); - DPRINTF(FPE_INSN, ("fpu_execute: FRSP\n")); - fpu_explode(fe, fp = &fe->fe_f1, FTYPE_DBL, rb); - fpu_implode(fe, fp, FTYPE_SNG, - (u_int *)&fs->fpr[rt].fpr); - fpu_explode(fe, fp = &fe->fe_f1, FTYPE_SNG, rt); - type = FTYPE_DBL; - break; - case OPC63_FCTIW: - case OPC63_FCTIWZ: - FPU_EMU_EVCNT_INCR(fctiw); - DPRINTF(FPE_INSN, ("fpu_execute: FCTIW\n")); - fpu_explode(fe, fp = &fe->fe_f1, type, rb); - type = FTYPE_INT; - break; - case OPC63_FCMPO: - FPU_EMU_EVCNT_INCR(fcmpo); - DPRINTF(FPE_INSN, ("fpu_execute: FCMPO\n")); - rt >>= 2; - fpu_explode(fe, &fe->fe_f1, type, ra); - fpu_explode(fe, &fe->fe_f2, type, rb); - fpu_compare(fe, 1); - /* Make sure we do the condition regs. */ - cond = 0; - /* N.B.: i_rs is already left shifted by two. */ - bf = instr.i_x.i_rs & 0xfc; - setcr = 1; - break; - case OPC63_MTFSB1: - FPU_EMU_EVCNT_INCR(mtfsb1); - DPRINTF(FPE_INSN, ("fpu_execute: MTFSB1\n")); - fe->fe_fpscr |= - (~(FPSCR_VX|FPSR_EX) & (1<<(31-rt))); - break; - case OPC63_FNEG: - FPU_EMU_EVCNT_INCR(fnegabs); - DPRINTF(FPE_INSN, ("fpu_execute: FNEGABS\n")); - memcpy(&fs->fpr[rt].fpr, &fs->fpr[rb].fpr, - sizeof(double)); - a = (int *)&fs->fpr[rt].fpr; - *a ^= (1U << 31); - break; - case OPC63_MCRFS: - FPU_EMU_EVCNT_INCR(mcrfs); - DPRINTF(FPE_INSN, ("fpu_execute: MCRFS\n")); - cond = 0; - rt &= 0x1c; - ra &= 0x1c; - /* Extract the bits we want */ - mask = (fe->fe_fpscr >> (28 - ra)) & 0xf; - /* Clear the bits we copied. */ - fe->fe_cx = - (FPSR_EX_MSK | (0xf << (28 - ra))); - fe->fe_fpscr &= fe->fe_cx; - /* Now shove them in the right part of cr */ - tf->cr &= ~(0xf << (28 - rt)); - tf->cr |= (mask << (28 - rt)); - break; - case OPC63_MTFSB0: - FPU_EMU_EVCNT_INCR(mtfsb0); - DPRINTF(FPE_INSN, ("fpu_execute: MTFSB0\n")); - fe->fe_fpscr &= - ((FPSCR_VX|FPSR_EX) & ~(1<<(31-rt))); - break; - case OPC63_FMR: - FPU_EMU_EVCNT_INCR(fmr); - DPRINTF(FPE_INSN, ("fpu_execute: FMR\n")); - memcpy(&fs->fpr[rt].fpr, &fs->fpr[rb].fpr, - sizeof(double)); - break; - case OPC63_MTFSFI: - FPU_EMU_EVCNT_INCR(mtfsfi); - DPRINTF(FPE_INSN, ("fpu_execute: MTFSFI\n")); - rb >>= 1; - rt &= 0x1c; /* Already left-shifted 4 */ - fe->fe_cx = rb << (28 - rt); - mask = 0xf<<(28 - rt); - fe->fe_fpscr = (fe->fe_fpscr & ~mask) | - fe->fe_cx; -/* XXX weird stuff about OX, FX, FEX, and VX should be handled */ - break; - case OPC63_FNABS: - FPU_EMU_EVCNT_INCR(fnabs); - DPRINTF(FPE_INSN, ("fpu_execute: FABS\n")); - memcpy(&fs->fpr[rt].fpr, &fs->fpr[rb].fpr, - sizeof(double)); - a = (int *)&fs->fpr[rt].fpr; - *a |= (1U << 31); - break; - case OPC63_FABS: - FPU_EMU_EVCNT_INCR(fabs); - DPRINTF(FPE_INSN, ("fpu_execute: FABS\n")); - memcpy(&fs->fpr[rt].fpr, &fs->fpr[rb].fpr, - sizeof(double)); - a = (int *)&fs->fpr[rt].fpr; - *a &= ~(1U << 31); - break; - case OPC63_MFFS: - FPU_EMU_EVCNT_INCR(mffs); - DPRINTF(FPE_INSN, ("fpu_execute: MFFS\n")); - memcpy(&fs->fpr[rt].fpr, &fs->fpscr, - sizeof(fs->fpscr)); - break; - case OPC63_MTFSF: - FPU_EMU_EVCNT_INCR(mtfsf); - DPRINTF(FPE_INSN, ("fpu_execute: MTFSF\n")); - if ((rt = instr.i_xfl.i_flm) == -1) - mask = -1; - else { - mask = 0; - /* Convert 1 bit -> 4 bits */ - for (ra = 0; ra < 8; ra ++) - if (rt & (1<fpr[rt].fpr; - fe->fe_cx = mask & a[1]; - fe->fe_fpscr = (fe->fe_fpscr&~mask) | - (fe->fe_cx); -/* XXX weird stuff about OX, FX, FEX, and VX should be handled */ - break; - case OPC63_FCTID: - case OPC63_FCTIDZ: - FPU_EMU_EVCNT_INCR(fctid); - DPRINTF(FPE_INSN, ("fpu_execute: FCTID\n")); - fpu_explode(fe, fp = &fe->fe_f1, type, rb); - type = FTYPE_LNG; - break; - case OPC63_FCFID: - FPU_EMU_EVCNT_INCR(fcfid); - DPRINTF(FPE_INSN, ("fpu_execute: FCFID\n")); - type = FTYPE_LNG; - fpu_explode(fe, fp = &fe->fe_f1, type, rb); - type = FTYPE_DBL; - break; - default: - return (NOTFPU); - break; - } - } else { - /* Format A */ - rt = instr.i_a.i_frt; - ra = instr.i_a.i_fra; - rb = instr.i_a.i_frb; - rc = instr.i_a.i_frc; - - /* - * All arithmetic operations work on registers, which - * are stored as doubles. - */ - type = FTYPE_DBL; - switch ((unsigned int)instr.i_a.i_xo) { - case OPC59_FDIVS: - FPU_EMU_EVCNT_INCR(fdiv); - DPRINTF(FPE_INSN, ("fpu_execute: FDIV\n")); - fpu_explode(fe, &fe->fe_f1, type, ra); - fpu_explode(fe, &fe->fe_f2, type, rb); - fp = fpu_div(fe); - break; - case OPC59_FSUBS: - FPU_EMU_EVCNT_INCR(fsub); - DPRINTF(FPE_INSN, ("fpu_execute: FSUB\n")); - fpu_explode(fe, &fe->fe_f1, type, ra); - fpu_explode(fe, &fe->fe_f2, type, rb); - fp = fpu_sub(fe); - break; - case OPC59_FADDS: - FPU_EMU_EVCNT_INCR(fadd); - DPRINTF(FPE_INSN, ("fpu_execute: FADD\n")); - fpu_explode(fe, &fe->fe_f1, type, ra); - fpu_explode(fe, &fe->fe_f2, type, rb); - fp = fpu_add(fe); - break; - case OPC59_FSQRTS: - FPU_EMU_EVCNT_INCR(fsqrt); - DPRINTF(FPE_INSN, ("fpu_execute: FSQRT\n")); - fpu_explode(fe, &fe->fe_f1, type, rb); - fp = fpu_sqrt(fe); - break; - case OPC63M_FSEL: - FPU_EMU_EVCNT_INCR(fsel); - DPRINTF(FPE_INSN, ("fpu_execute: FSEL\n")); - a = (int *)&fe->fe_fpstate->fpr[ra].fpr; - if ((*a & 0x80000000) && (*a & 0x7fffffff)) - /* fra < 0 */ - rc = rb; - DPRINTF(FPE_INSN, ("f%d => f%d\n", rc, rt)); - memcpy(&fs->fpr[rt].fpr, &fs->fpr[rc].fpr, - sizeof(double)); - break; - case OPC59_FRES: - FPU_EMU_EVCNT_INCR(fpres); - DPRINTF(FPE_INSN, ("fpu_execute: FPRES\n")); - fpu_explode(fe, &fe->fe_f1, type, rb); - fp = fpu_sqrt(fe); - /* now we've gotta overwrite the dest reg */ - *((int *)&fe->fe_fpstate->fpr[rt].fpr) = 1; - fpu_explode(fe, &fe->fe_f1, FTYPE_INT, rt); - fpu_div(fe); - break; - case OPC59_FMULS: - FPU_EMU_EVCNT_INCR(fmul); - DPRINTF(FPE_INSN, ("fpu_execute: FMUL\n")); - fpu_explode(fe, &fe->fe_f1, type, ra); - fpu_explode(fe, &fe->fe_f2, type, rc); - fp = fpu_mul(fe); - break; - case OPC63M_FRSQRTE: - /* Reciprocal sqrt() estimate */ - FPU_EMU_EVCNT_INCR(frsqrte); - DPRINTF(FPE_INSN, ("fpu_execute: FRSQRTE\n")); - fpu_explode(fe, &fe->fe_f1, type, rb); - fp = fpu_sqrt(fe); - fe->fe_f2 = *fp; - /* now we've gotta overwrite the dest reg */ - *((int *)&fe->fe_fpstate->fpr[rt].fpr) = 1; - fpu_explode(fe, &fe->fe_f1, FTYPE_INT, rt); - fpu_div(fe); - break; - case OPC59_FMSUBS: - FPU_EMU_EVCNT_INCR(fmulsub); - DPRINTF(FPE_INSN, ("fpu_execute: FMULSUB\n")); - fpu_explode(fe, &fe->fe_f1, type, ra); - fpu_explode(fe, &fe->fe_f2, type, rc); - fp = fpu_mul(fe); - fe->fe_f1 = *fp; - fpu_explode(fe, &fe->fe_f2, type, rb); - fp = fpu_sub(fe); - break; - case OPC59_FMADDS: - FPU_EMU_EVCNT_INCR(fmuladd); - DPRINTF(FPE_INSN, ("fpu_execute: FMULADD\n")); - fpu_explode(fe, &fe->fe_f1, type, ra); - fpu_explode(fe, &fe->fe_f2, type, rc); - fp = fpu_mul(fe); - fe->fe_f1 = *fp; - fpu_explode(fe, &fe->fe_f2, type, rb); - fp = fpu_add(fe); - break; - case OPC59_FNMSUBS: - FPU_EMU_EVCNT_INCR(fnmsub); - DPRINTF(FPE_INSN, ("fpu_execute: FNMSUB\n")); - fpu_explode(fe, &fe->fe_f1, type, ra); - fpu_explode(fe, &fe->fe_f2, type, rc); - fp = fpu_mul(fe); - fe->fe_f1 = *fp; - fpu_explode(fe, &fe->fe_f2, type, rb); - fp = fpu_sub(fe); - /* Negate */ - fp->fp_sign ^= 1; - break; - case OPC59_FNMADDS: - FPU_EMU_EVCNT_INCR(fnmadd); - DPRINTF(FPE_INSN, ("fpu_execute: FNMADD\n")); - fpu_explode(fe, &fe->fe_f1, type, ra); - fpu_explode(fe, &fe->fe_f2, type, rc); - fp = fpu_mul(fe); - fe->fe_f1 = *fp; - fpu_explode(fe, &fe->fe_f2, type, rb); - fp = fpu_add(fe); - /* Negate */ - fp->fp_sign ^= 1; - break; - default: - return (NOTFPU); - break; - } - - /* If the instruction was single precision, round */ - if (!(instr.i_any.i_opcd & 0x4)) { - fpu_implode(fe, fp, FTYPE_SNG, - (u_int *)&fs->fpr[rt].fpr); - fpu_explode(fe, fp = &fe->fe_f1, FTYPE_SNG, rt); - } - } - } else { - return (NOTFPU); - } - - /* - * ALU operation is complete. Collapse the result and then check - * for exceptions. If we got any, and they are enabled, do not - * alter the destination register, just stop with an exception. - * Otherwise set new current exceptions and accrue. - */ - if (fp) - fpu_implode(fe, fp, type, (u_int *)&fs->fpr[rt].fpr); - cx = fe->fe_cx; - fsr = fe->fe_fpscr; - if (cx != 0) { - fsr &= ~FPSCR_FX; - if ((cx^fsr)&FPSR_EX_MSK) - fsr |= FPSCR_FX; - mask = fsr & FPSR_EX; - mask <<= (25-3); - if (cx & mask) - fsr |= FPSCR_FEX; - if (cx & FPSCR_FPRF) { - /* Need to replace CC */ - fsr &= ~FPSCR_FPRF; - } - if (cx & (FPSR_EXOP)) - fsr |= FPSCR_VX; - fsr |= cx; - DPRINTF(FPE_INSN, ("fpu_execute: cx %x, fsr %x\n", cx, fsr)); - } - - if (cond) { - cond = fsr & 0xf0000000; - /* Isolate condition codes */ - cond >>= 28; - /* Move fpu condition codes to cr[1] */ - tf->cr &= (0x0f000000); - tf->cr |= (cond<<24); - DPRINTF(FPE_INSN, ("fpu_execute: cr[1] <= %x\n", cond)); - } - - if (setcr) { - cond = fsr & FPSCR_FPCC; - /* Isolate condition codes */ - cond <<= 16; - /* Move fpu condition codes to cr[1] */ - tf->cr &= ~(0xf0000000>>bf); - tf->cr |= (cond>>bf); - DPRINTF(FPE_INSN, ("fpu_execute: cr[%d] (cr=%jx) <= %x\n", - bf/4, (uintmax_t)tf->cr, cond)); - } - - ((int *)&fs->fpscr)[1] = fsr; - if (fsr & FPSCR_FEX) - return(FPE); - return (0); /* success */ -} diff --git a/sys/powerpc/fpu/fpu_emu.h b/sys/powerpc/fpu/fpu_emu.h deleted file mode 100644 index 6adb431480c..00000000000 --- a/sys/powerpc/fpu/fpu_emu.h +++ /dev/null @@ -1,195 +0,0 @@ -/* $NetBSD: fpu_emu.h,v 1.3 2005/12/11 12:18:42 christos Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This software was developed by the Computer Systems Engineering group - * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and - * contributed to Berkeley. - * - * All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Lawrence Berkeley Laboratory. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)fpu_emu.h 8.1 (Berkeley) 6/11/93 - */ - -/* - * Floating point emulator (tailored for SPARC, but structurally - * machine-independent). - * - * Floating point numbers are carried around internally in an `expanded' - * or `unpacked' form consisting of: - * - sign - * - unbiased exponent - * - mantissa (`1.' + 112-bit fraction + guard + round) - * - sticky bit - * Any implied `1' bit is inserted, giving a 113-bit mantissa that is - * always nonzero. Additional low-order `guard' and `round' bits are - * scrunched in, making the entire mantissa 115 bits long. This is divided - * into four 32-bit words, with `spare' bits left over in the upper part - * of the top word (the high bits of fp_mant[0]). An internal `exploded' - * number is thus kept within the half-open interval [1.0,2.0) (but see - * the `number classes' below). This holds even for denormalized numbers: - * when we explode an external denorm, we normalize it, introducing low-order - * zero bits, so that the rest of the code always sees normalized values. - * - * Note that a number of our algorithms use the `spare' bits at the top. - * The most demanding algorithm---the one for sqrt---depends on two such - * bits, so that it can represent values up to (but not including) 8.0, - * and then it needs a carry on top of that, so that we need three `spares'. - * - * The sticky-word is 32 bits so that we can use `OR' operators to goosh - * whole words from the mantissa into it. - * - * All operations are done in this internal extended precision. According - * to Hennesey & Patterson, Appendix A, rounding can be repeated---that is, - * it is OK to do a+b in extended precision and then round the result to - * single precision---provided single, double, and extended precisions are - * `far enough apart' (they always are), but we will try to avoid any such - * extra work where possible. - */ -struct fpn { - int fp_class; /* see below */ - int fp_sign; /* 0 => positive, 1 => negative */ - int fp_exp; /* exponent (unbiased) */ - int fp_sticky; /* nonzero bits lost at right end */ - u_int fp_mant[4]; /* 115-bit mantissa */ -}; - -#define FP_NMANT 115 /* total bits in mantissa (incl g,r) */ -#define FP_NG 2 /* number of low-order guard bits */ -#define FP_LG ((FP_NMANT - 1) & 31) /* log2(1.0) for fp_mant[0] */ -#define FP_LG2 ((FP_NMANT - 1) & 63) /* log2(1.0) for fp_mant[0] and fp_mant[1] */ -#define FP_QUIETBIT (1 << (FP_LG - 1)) /* Quiet bit in NaNs (0.5) */ -#define FP_1 (1 << FP_LG) /* 1.0 in fp_mant[0] */ -#define FP_2 (1 << (FP_LG + 1)) /* 2.0 in fp_mant[0] */ - -/* - * Number classes. Since zero, Inf, and NaN cannot be represented using - * the above layout, we distinguish these from other numbers via a class. - * In addition, to make computation easier and to follow Appendix N of - * the SPARC Version 8 standard, we give each kind of NaN a separate class. - */ -#define FPC_SNAN -2 /* signalling NaN (sign irrelevant) */ -#define FPC_QNAN -1 /* quiet NaN (sign irrelevant) */ -#define FPC_ZERO 0 /* zero (sign matters) */ -#define FPC_NUM 1 /* number (sign matters) */ -#define FPC_INF 2 /* infinity (sign matters) */ - -#define ISSNAN(fp) ((fp)->fp_class == FPC_SNAN) -#define ISQNAN(fp) ((fp)->fp_class == FPC_QNAN) -#define ISNAN(fp) ((fp)->fp_class < 0) -#define ISZERO(fp) ((fp)->fp_class == 0) -#define ISINF(fp) ((fp)->fp_class == FPC_INF) - -/* - * ORDER(x,y) `sorts' a pair of `fpn *'s so that the right operand (y) points - * to the `more significant' operand for our purposes. Appendix N says that - * the result of a computation involving two numbers are: - * - * If both are SNaN: operand 2, converted to Quiet - * If only one is SNaN: the SNaN operand, converted to Quiet - * If both are QNaN: operand 2 - * If only one is QNaN: the QNaN operand - * - * In addition, in operations with an Inf operand, the result is usually - * Inf. The class numbers are carefully arranged so that if - * (unsigned)class(op1) > (unsigned)class(op2) - * then op1 is the one we want; otherwise op2 is the one we want. - */ -#define ORDER(x, y) { \ - if ((u_int)(x)->fp_class > (u_int)(y)->fp_class) \ - SWAP(x, y); \ -} -#define SWAP(x, y) { \ - struct fpn *swap; \ - swap = (x), (x) = (y), (y) = swap; \ -} - -/* - * Emulator state. - */ -struct fpemu { - struct fpu *fe_fpstate; /* registers, etc */ - int fe_fpscr; /* fpscr copy (modified during op) */ - int fe_cx; /* keep track of exceptions */ - struct fpn fe_f1; /* operand 1 */ - struct fpn fe_f2; /* operand 2, if required */ - struct fpn fe_f3; /* available storage for result */ -}; - -/* - * Arithmetic functions. - * Each of these may modify its inputs (f1,f2) and/or the temporary. - * Each returns a pointer to the result and/or sets exceptions. - */ -struct fpn *fpu_add(struct fpemu *); -#define fpu_sub(fe) ((fe)->fe_f2.fp_sign ^= 1, fpu_add(fe)) -struct fpn *fpu_mul(struct fpemu *); -struct fpn *fpu_div(struct fpemu *); -struct fpn *fpu_sqrt(struct fpemu *); - -/* - * Other functions. - */ - -/* Perform a compare instruction (with or without unordered exception). */ -void fpu_compare(struct fpemu *, int); - -/* Build a new Quiet NaN (sign=0, frac=all 1's). */ -struct fpn *fpu_newnan(struct fpemu *); - -void fpu_norm(struct fpn *); - -/* - * Shift a number right some number of bits, taking care of round/sticky. - * Note that the result is probably not a well-formed number (it will lack - * the normal 1-bit mant[0]&FP_1). - */ -int fpu_shr(struct fpn *, int); - -void fpu_explode(struct fpemu *, struct fpn *, int, int); -void fpu_implode(struct fpemu *, struct fpn *, int, u_int *); - -#ifdef DEBUG -#define FPE_EX 0x1 -#define FPE_INSN 0x2 -#define FPE_OP 0x4 -#define FPE_REG 0x8 -extern int fpe_debug; -void fpu_dumpfpn(struct fpn *); -#define DPRINTF(x, y) if (fpe_debug & (x)) printf y -#define DUMPFPN(x, f) if (fpe_debug & (x)) fpu_dumpfpn((f)) -#else -#define DPRINTF(x, y) -#define DUMPFPN(x, f) -#endif diff --git a/sys/powerpc/fpu/fpu_explode.c b/sys/powerpc/fpu/fpu_explode.c deleted file mode 100644 index 8cf82dcfdb7..00000000000 --- a/sys/powerpc/fpu/fpu_explode.c +++ /dev/null @@ -1,262 +0,0 @@ -/* $NetBSD: fpu_explode.c,v 1.6 2005/12/11 12:18:42 christos Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This software was developed by the Computer Systems Engineering group - * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and - * contributed to Berkeley. - * - * All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Lawrence Berkeley Laboratory. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)fpu_explode.c 8.1 (Berkeley) 6/11/93 - */ - -/* - * FPU subroutines: `explode' the machine's `packed binary' format numbers - * into our internal format. - */ - -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include - -/* - * N.B.: in all of the following, we assume the FP format is - * - * --------------------------- - * | s | exponent | fraction | - * --------------------------- - * - * (which represents -1**s * 1.fraction * 2**exponent), so that the - * sign bit is way at the top (bit 31), the exponent is next, and - * then the remaining bits mark the fraction. A zero exponent means - * zero or denormalized (0.fraction rather than 1.fraction), and the - * maximum possible exponent, 2bias+1, signals inf (fraction==0) or NaN. - * - * Since the sign bit is always the topmost bit---this holds even for - * integers---we set that outside all the *tof functions. Each function - * returns the class code for the new number (but note that we use - * FPC_QNAN for all NaNs; fpu_explode will fix this if appropriate). - */ - -/* - * int -> fpn. - */ -int -fpu_itof(struct fpn *fp, u_int i) -{ - - if (i == 0) - return (FPC_ZERO); - /* - * The value FP_1 represents 2^FP_LG, so set the exponent - * there and let normalization fix it up. Convert negative - * numbers to sign-and-magnitude. Note that this relies on - * fpu_norm()'s handling of `supernormals'; see fpu_subr.c. - */ - fp->fp_exp = FP_LG; - fp->fp_mant[0] = (int)i < 0 ? -i : i; - fp->fp_mant[1] = 0; - fp->fp_mant[2] = 0; - fp->fp_mant[3] = 0; - fpu_norm(fp); - return (FPC_NUM); -} - -/* - * 64-bit int -> fpn. - */ -int -fpu_xtof(struct fpn *fp, u_int64_t i) -{ - - if (i == 0) - return (FPC_ZERO); - /* - * The value FP_1 represents 2^FP_LG, so set the exponent - * there and let normalization fix it up. Convert negative - * numbers to sign-and-magnitude. Note that this relies on - * fpu_norm()'s handling of `supernormals'; see fpu_subr.c. - */ - fp->fp_exp = FP_LG2; - *((int64_t*)fp->fp_mant) = (int64_t)i < 0 ? -i : i; - fp->fp_mant[2] = 0; - fp->fp_mant[3] = 0; - fpu_norm(fp); - return (FPC_NUM); -} - -#define mask(nbits) ((1L << (nbits)) - 1) - -/* - * All external floating formats convert to internal in the same manner, - * as defined here. Note that only normals get an implied 1.0 inserted. - */ -#define FP_TOF(exp, expbias, allfrac, f0, f1, f2, f3) \ - if (exp == 0) { \ - if (allfrac == 0) \ - return (FPC_ZERO); \ - fp->fp_exp = 1 - expbias; \ - fp->fp_mant[0] = f0; \ - fp->fp_mant[1] = f1; \ - fp->fp_mant[2] = f2; \ - fp->fp_mant[3] = f3; \ - fpu_norm(fp); \ - return (FPC_NUM); \ - } \ - if (exp == (2 * expbias + 1)) { \ - if (allfrac == 0) \ - return (FPC_INF); \ - fp->fp_mant[0] = f0; \ - fp->fp_mant[1] = f1; \ - fp->fp_mant[2] = f2; \ - fp->fp_mant[3] = f3; \ - return (FPC_QNAN); \ - } \ - fp->fp_exp = exp - expbias; \ - fp->fp_mant[0] = FP_1 | f0; \ - fp->fp_mant[1] = f1; \ - fp->fp_mant[2] = f2; \ - fp->fp_mant[3] = f3; \ - return (FPC_NUM) - -/* - * 32-bit single precision -> fpn. - * We assume a single occupies at most (64-FP_LG) bits in the internal - * format: i.e., needs at most fp_mant[0] and fp_mant[1]. - */ -int -fpu_stof(struct fpn *fp, u_int i) -{ - int exp; - u_int frac, f0, f1; -#define SNG_SHIFT (SNG_FRACBITS - FP_LG) - - exp = (i >> (32 - 1 - SNG_EXPBITS)) & mask(SNG_EXPBITS); - frac = i & mask(SNG_FRACBITS); - f0 = frac >> SNG_SHIFT; - f1 = frac << (32 - SNG_SHIFT); - FP_TOF(exp, SNG_EXP_BIAS, frac, f0, f1, 0, 0); -} - -/* - * 64-bit double -> fpn. - * We assume this uses at most (96-FP_LG) bits. - */ -int -fpu_dtof(struct fpn *fp, u_int i, u_int j) -{ - int exp; - u_int frac, f0, f1, f2; -#define DBL_SHIFT (DBL_FRACBITS - 32 - FP_LG) - - exp = (i >> (32 - 1 - DBL_EXPBITS)) & mask(DBL_EXPBITS); - frac = i & mask(DBL_FRACBITS - 32); - f0 = frac >> DBL_SHIFT; - f1 = (frac << (32 - DBL_SHIFT)) | (j >> DBL_SHIFT); - f2 = j << (32 - DBL_SHIFT); - frac |= j; - FP_TOF(exp, DBL_EXP_BIAS, frac, f0, f1, f2, 0); -} - -/* - * Explode the contents of a register / regpair / regquad. - * If the input is a signalling NaN, an NV (invalid) exception - * will be set. (Note that nothing but NV can occur until ALU - * operations are performed.) - */ -void -fpu_explode(struct fpemu *fe, struct fpn *fp, int type, int reg) -{ - u_int s, *space; - u_int64_t l, *xspace; - - xspace = (u_int64_t *)&fe->fe_fpstate->fpr[reg].fpr; - l = xspace[0]; - space = (u_int *)&fe->fe_fpstate->fpr[reg].fpr; - s = space[0]; - fp->fp_sign = s >> 31; - fp->fp_sticky = 0; - switch (type) { - case FTYPE_LNG: - s = fpu_xtof(fp, l); - break; - - case FTYPE_INT: - s = fpu_itof(fp, space[1]); - break; - - case FTYPE_SNG: - s = fpu_stof(fp, s); - break; - - case FTYPE_DBL: - s = fpu_dtof(fp, s, space[1]); - break; - - default: - panic("fpu_explode"); - panic("fpu_explode: invalid type %d", type); - } - - if (s == FPC_QNAN && (fp->fp_mant[0] & FP_QUIETBIT) == 0) { - /* - * Input is a signalling NaN. All operations that return - * an input NaN operand put it through a ``NaN conversion'', - * which basically just means ``turn on the quiet bit''. - * We do this here so that all NaNs internally look quiet - * (we can tell signalling ones by their class). - */ - fp->fp_mant[0] |= FP_QUIETBIT; - fe->fe_cx = FPSCR_VXSNAN; /* assert invalid operand */ - s = FPC_SNAN; - } - fp->fp_class = s; - DPRINTF(FPE_REG, ("fpu_explode: %%%c%d => ", (type == FTYPE_LNG) ? 'x' : - ((type == FTYPE_INT) ? 'i' : - ((type == FTYPE_SNG) ? 's' : - ((type == FTYPE_DBL) ? 'd' : '?'))), - reg)); - DUMPFPN(FPE_REG, fp); - DPRINTF(FPE_REG, ("\n")); -} diff --git a/sys/powerpc/fpu/fpu_extern.h b/sys/powerpc/fpu/fpu_extern.h deleted file mode 100644 index 311a849be0d..00000000000 --- a/sys/powerpc/fpu/fpu_extern.h +++ /dev/null @@ -1,55 +0,0 @@ -/* $NetBSD: fpu_extern.h,v 1.3 2005/12/11 12:18:42 christos Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1995 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Christos Zoulas. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -struct proc; -struct fpu; -struct trapframe; -union instr; -struct fpemu; -struct fpn; - -/* fpu.c */ -int fpu_emulate(struct trapframe *, struct fpu *); -int fpu_execute(struct trapframe *, struct fpemu *, union instr *); - -/* fpu_explode.c */ -int fpu_itof(struct fpn *, u_int); -int fpu_xtof(struct fpn *, u_int64_t); -int fpu_stof(struct fpn *, u_int); -int fpu_dtof(struct fpn *, u_int, u_int); - -/* fpu_implode.c */ -u_int fpu_ftoi(struct fpemu *, struct fpn *); -u_int fpu_ftox(struct fpemu *, struct fpn *, u_int *); -u_int fpu_ftos(struct fpemu *, struct fpn *); -u_int fpu_ftod(struct fpemu *, struct fpn *, u_int *); diff --git a/sys/powerpc/fpu/fpu_implode.c b/sys/powerpc/fpu/fpu_implode.c deleted file mode 100644 index 6965c0fb2e1..00000000000 --- a/sys/powerpc/fpu/fpu_implode.c +++ /dev/null @@ -1,456 +0,0 @@ -/* $NetBSD: fpu_implode.c,v 1.6 2005/12/11 12:18:42 christos Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This software was developed by the Computer Systems Engineering group - * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and - * contributed to Berkeley. - * - * All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Lawrence Berkeley Laboratory. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)fpu_implode.c 8.1 (Berkeley) 6/11/93 - */ - -/* - * FPU subroutines: `implode' internal format numbers into the machine's - * `packed binary' format. - */ - -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include - -static int round(struct fpemu *, struct fpn *); -static int toinf(struct fpemu *, int); - -/* - * Round a number (algorithm from Motorola MC68882 manual, modified for - * our internal format). Set inexact exception if rounding is required. - * Return true iff we rounded up. - * - * After rounding, we discard the guard and round bits by shifting right - * 2 bits (a la fpu_shr(), but we do not bother with fp->fp_sticky). - * This saves effort later. - * - * Note that we may leave the value 2.0 in fp->fp_mant; it is the caller's - * responsibility to fix this if necessary. - */ -static int -round(struct fpemu *fe, struct fpn *fp) -{ - u_int m0, m1, m2, m3; - int gr, s; - FPU_DECL_CARRY; - - m0 = fp->fp_mant[0]; - m1 = fp->fp_mant[1]; - m2 = fp->fp_mant[2]; - m3 = fp->fp_mant[3]; - gr = m3 & 3; - s = fp->fp_sticky; - - /* mant >>= FP_NG */ - m3 = (m3 >> FP_NG) | (m2 << (32 - FP_NG)); - m2 = (m2 >> FP_NG) | (m1 << (32 - FP_NG)); - m1 = (m1 >> FP_NG) | (m0 << (32 - FP_NG)); - m0 >>= FP_NG; - - if ((gr | s) == 0) /* result is exact: no rounding needed */ - goto rounddown; - - fe->fe_cx |= FPSCR_XX|FPSCR_FI; /* inexact */ - - /* Go to rounddown to round down; break to round up. */ - switch ((fe->fe_fpscr) & FPSCR_RN) { - case FP_RN: - default: - /* - * Round only if guard is set (gr & 2). If guard is set, - * but round & sticky both clear, then we want to round - * but have a tie, so round to even, i.e., add 1 iff odd. - */ - if ((gr & 2) == 0) - goto rounddown; - if ((gr & 1) || fp->fp_sticky || (m3 & 1)) - break; - goto rounddown; - - case FP_RZ: - /* Round towards zero, i.e., down. */ - goto rounddown; - - case FP_RM: - /* Round towards -Inf: up if negative, down if positive. */ - if (fp->fp_sign) - break; - goto rounddown; - - case FP_RP: - /* Round towards +Inf: up if positive, down otherwise. */ - if (!fp->fp_sign) - break; - goto rounddown; - } - - /* Bump low bit of mantissa, with carry. */ - fe->fe_cx |= FPSCR_FR; - - FPU_ADDS(m3, m3, 1); - FPU_ADDCS(m2, m2, 0); - FPU_ADDCS(m1, m1, 0); - FPU_ADDC(m0, m0, 0); - fp->fp_mant[0] = m0; - fp->fp_mant[1] = m1; - fp->fp_mant[2] = m2; - fp->fp_mant[3] = m3; - return (1); - -rounddown: - fp->fp_mant[0] = m0; - fp->fp_mant[1] = m1; - fp->fp_mant[2] = m2; - fp->fp_mant[3] = m3; - return (0); -} - -/* - * For overflow: return true if overflow is to go to +/-Inf, according - * to the sign of the overflowing result. If false, overflow is to go - * to the largest magnitude value instead. - */ -static int -toinf(struct fpemu *fe, int sign) -{ - int inf; - - /* look at rounding direction */ - switch ((fe->fe_fpscr) & FPSCR_RN) { - default: - case FP_RN: /* the nearest value is always Inf */ - inf = 1; - break; - - case FP_RZ: /* toward 0 => never towards Inf */ - inf = 0; - break; - - case FP_RP: /* toward +Inf iff positive */ - inf = sign == 0; - break; - - case FP_RM: /* toward -Inf iff negative */ - inf = sign; - break; - } - if (inf) - fe->fe_cx |= FPSCR_OX; - return (inf); -} - -/* - * fpn -> int (int value returned as return value). - * - * N.B.: this conversion always rounds towards zero (this is a peculiarity - * of the SPARC instruction set). - */ -u_int -fpu_ftoi(struct fpemu *fe, struct fpn *fp) -{ - u_int i; - int sign, exp; - - sign = fp->fp_sign; - switch (fp->fp_class) { - case FPC_ZERO: - return (0); - - case FPC_NUM: - /* - * If exp >= 2^32, overflow. Otherwise shift value right - * into last mantissa word (this will not exceed 0xffffffff), - * shifting any guard and round bits out into the sticky - * bit. Then ``round'' towards zero, i.e., just set an - * inexact exception if sticky is set (see round()). - * If the result is > 0x80000000, or is positive and equals - * 0x80000000, overflow; otherwise the last fraction word - * is the result. - */ - if ((exp = fp->fp_exp) >= 32) - break; - /* NB: the following includes exp < 0 cases */ - if (fpu_shr(fp, FP_NMANT - 1 - exp) != 0) - fe->fe_cx |= FPSCR_UX; - i = fp->fp_mant[3]; - if (i >= ((u_int)0x80000000 + sign)) - break; - return (sign ? -i : i); - - default: /* Inf, qNaN, sNaN */ - break; - } - /* overflow: replace any inexact exception with invalid */ - fe->fe_cx |= FPSCR_VXCVI; - return (0x7fffffff + sign); -} - -/* - * fpn -> extended int (high bits of int value returned as return value). - * - * N.B.: this conversion always rounds towards zero (this is a peculiarity - * of the SPARC instruction set). - */ -u_int -fpu_ftox(struct fpemu *fe, struct fpn *fp, u_int *res) -{ - u_int64_t i; - int sign, exp; - - sign = fp->fp_sign; - switch (fp->fp_class) { - case FPC_ZERO: - res[1] = 0; - return (0); - - case FPC_NUM: - /* - * If exp >= 2^64, overflow. Otherwise shift value right - * into last mantissa word (this will not exceed 0xffffffffffffffff), - * shifting any guard and round bits out into the sticky - * bit. Then ``round'' towards zero, i.e., just set an - * inexact exception if sticky is set (see round()). - * If the result is > 0x8000000000000000, or is positive and equals - * 0x8000000000000000, overflow; otherwise the last fraction word - * is the result. - */ - if ((exp = fp->fp_exp) >= 64) - break; - /* NB: the following includes exp < 0 cases */ - if (fpu_shr(fp, FP_NMANT - 1 - exp) != 0) - fe->fe_cx |= FPSCR_UX; - i = ((u_int64_t)fp->fp_mant[2]<<32)|fp->fp_mant[3]; - if (i >= ((u_int64_t)0x8000000000000000LL + sign)) - break; - return (sign ? -i : i); - - default: /* Inf, qNaN, sNaN */ - break; - } - /* overflow: replace any inexact exception with invalid */ - fe->fe_cx |= FPSCR_VXCVI; - return (0x7fffffffffffffffLL + sign); -} - -/* - * fpn -> single (32 bit single returned as return value). - * We assume <= 29 bits in a single-precision fraction (1.f part). - */ -u_int -fpu_ftos(struct fpemu *fe, struct fpn *fp) -{ - u_int sign = fp->fp_sign << 31; - int exp; - -#define SNG_EXP(e) ((e) << SNG_FRACBITS) /* makes e an exponent */ -#define SNG_MASK (SNG_EXP(1) - 1) /* mask for fraction */ - - /* Take care of non-numbers first. */ - if (ISNAN(fp)) { - /* - * Preserve upper bits of NaN, per SPARC V8 appendix N. - * Note that fp->fp_mant[0] has the quiet bit set, - * even if it is classified as a signalling NaN. - */ - (void) fpu_shr(fp, FP_NMANT - 1 - SNG_FRACBITS); - exp = SNG_EXP_INFNAN; - goto done; - } - if (ISINF(fp)) - return (sign | SNG_EXP(SNG_EXP_INFNAN)); - if (ISZERO(fp)) - return (sign); - - /* - * Normals (including subnormals). Drop all the fraction bits - * (including the explicit ``implied'' 1 bit) down into the - * single-precision range. If the number is subnormal, move - * the ``implied'' 1 into the explicit range as well, and shift - * right to introduce leading zeroes. Rounding then acts - * differently for normals and subnormals: the largest subnormal - * may round to the smallest normal (1.0 x 2^minexp), or may - * remain subnormal. In the latter case, signal an underflow - * if the result was inexact or if underflow traps are enabled. - * - * Rounding a normal, on the other hand, always produces another - * normal (although either way the result might be too big for - * single precision, and cause an overflow). If rounding a - * normal produces 2.0 in the fraction, we need not adjust that - * fraction at all, since both 1.0 and 2.0 are zero under the - * fraction mask. - * - * Note that the guard and round bits vanish from the number after - * rounding. - */ - if ((exp = fp->fp_exp + SNG_EXP_BIAS) <= 0) { /* subnormal */ - /* -NG for g,r; -SNG_FRACBITS-exp for fraction */ - (void) fpu_shr(fp, FP_NMANT - FP_NG - SNG_FRACBITS - exp); - if (round(fe, fp) && fp->fp_mant[3] == SNG_EXP(1)) - return (sign | SNG_EXP(1) | 0); - if ((fe->fe_cx & FPSCR_FI) || - (fe->fe_fpscr & FPSCR_UX)) - fe->fe_cx |= FPSCR_UX; - return (sign | SNG_EXP(0) | fp->fp_mant[3]); - } - /* -FP_NG for g,r; -1 for implied 1; -SNG_FRACBITS for fraction */ - (void) fpu_shr(fp, FP_NMANT - FP_NG - 1 - SNG_FRACBITS); -#ifdef DIAGNOSTIC - if ((fp->fp_mant[3] & SNG_EXP(1 << FP_NG)) == 0) - panic("fpu_ftos"); -#endif - if (round(fe, fp) && fp->fp_mant[3] == SNG_EXP(2)) - exp++; - if (exp >= SNG_EXP_INFNAN) { - /* overflow to inf or to max single */ - if (toinf(fe, sign)) - return (sign | SNG_EXP(SNG_EXP_INFNAN)); - return (sign | SNG_EXP(SNG_EXP_INFNAN - 1) | SNG_MASK); - } -done: - /* phew, made it */ - return (sign | SNG_EXP(exp) | (fp->fp_mant[3] & SNG_MASK)); -} - -/* - * fpn -> double (32 bit high-order result returned; 32-bit low order result - * left in res[1]). Assumes <= 61 bits in double precision fraction. - * - * This code mimics fpu_ftos; see it for comments. - */ -u_int -fpu_ftod(struct fpemu *fe, struct fpn *fp, u_int *res) -{ - u_int sign = fp->fp_sign << 31; - int exp; - -#define DBL_EXP(e) ((e) << (DBL_FRACBITS & 31)) -#define DBL_MASK (DBL_EXP(1) - 1) - - if (ISNAN(fp)) { - (void) fpu_shr(fp, FP_NMANT - 1 - DBL_FRACBITS); - exp = DBL_EXP_INFNAN; - goto done; - } - if (ISINF(fp)) { - sign |= DBL_EXP(DBL_EXP_INFNAN); - goto zero; - } - if (ISZERO(fp)) { -zero: res[1] = 0; - return (sign); - } - - if ((exp = fp->fp_exp + DBL_EXP_BIAS) <= 0) { - (void) fpu_shr(fp, FP_NMANT - FP_NG - DBL_FRACBITS - exp); - if (round(fe, fp) && fp->fp_mant[2] == DBL_EXP(1)) { - res[1] = 0; - return (sign | DBL_EXP(1) | 0); - } - if ((fe->fe_cx & FPSCR_FI) || - (fe->fe_fpscr & FPSCR_UX)) - fe->fe_cx |= FPSCR_UX; - exp = 0; - goto done; - } - (void) fpu_shr(fp, FP_NMANT - FP_NG - 1 - DBL_FRACBITS); - if (round(fe, fp) && fp->fp_mant[2] == DBL_EXP(2)) - exp++; - if (exp >= DBL_EXP_INFNAN) { - fe->fe_cx |= FPSCR_OX | FPSCR_UX; - if (toinf(fe, sign)) { - res[1] = 0; - return (sign | DBL_EXP(DBL_EXP_INFNAN) | 0); - } - res[1] = ~0; - return (sign | DBL_EXP(DBL_EXP_INFNAN) | DBL_MASK); - } -done: - res[1] = fp->fp_mant[3]; - return (sign | DBL_EXP(exp) | (fp->fp_mant[2] & DBL_MASK)); -} - -/* - * Implode an fpn, writing the result into the given space. - */ -void -fpu_implode(struct fpemu *fe, struct fpn *fp, int type, u_int *space) -{ - - switch (type) { - case FTYPE_LNG: - space[0] = fpu_ftox(fe, fp, space); - DPRINTF(FPE_REG, ("fpu_implode: long %x %x\n", - space[0], space[1])); - break; - - case FTYPE_INT: - space[0] = 0; - space[1] = fpu_ftoi(fe, fp); - DPRINTF(FPE_REG, ("fpu_implode: int %x\n", - space[1])); - break; - - case FTYPE_SNG: - space[0] = fpu_ftos(fe, fp); - DPRINTF(FPE_REG, ("fpu_implode: single %x\n", - space[0])); - break; - - case FTYPE_DBL: - space[0] = fpu_ftod(fe, fp, space); - DPRINTF(FPE_REG, ("fpu_implode: double %x %x\n", - space[0], space[1])); - break; break; - - default: - panic("fpu_implode: invalid type %d", type); - } -} diff --git a/sys/powerpc/fpu/fpu_instr.h b/sys/powerpc/fpu/fpu_instr.h deleted file mode 100644 index c417928a252..00000000000 --- a/sys/powerpc/fpu/fpu_instr.h +++ /dev/null @@ -1,385 +0,0 @@ -/* $NetBSD: instr.h,v 1.4 2005/12/11 12:18:43 christos Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This software was developed by the Computer Systems Engineering group - * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and - * contributed to Berkeley. - * - * All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Lawrence Berkeley Laboratory. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)instr.h 8.1 (Berkeley) 6/11/93 - */ - -/* - * An instruction. - */ -union instr { - int i_int; /* as a whole */ - - /* - * Any instruction type. - */ - struct { - u_int i_opcd:6; /* first-level decode */ - u_int :25; - u_int i_rc:1; - } i_any; - - /* - * Format A - */ - struct { - u_int i_opcd:6; - u_int i_frt:5; - u_int i_fra:5; - u_int i_frb:5; - u_int i_frc:5; - u_int i_xo:5; - u_int i_rc:1; - } i_a; - - /* - * Format B - */ - struct { - u_int i_opcd:6; - int i_bo:5; - int i_bi:5; - int i_bd:14; - int i_aa:1; - int i_lk:1; - } i_b; - - /* - * Format D - */ - struct { - u_int i_opcd:6; - u_int i_rs:5; - u_int i_ra:5; - int i_d:16; - } i_d; - - /* - * Format DE - */ - struct { - u_int i_opcd:6; - u_int i_rs:5; - u_int i_ra:5; - int i_d:12; - u_int i_xo:4; - } i_de; - - /* - * Format I - */ - struct { - u_int i_opcd:6; - int i_li:24; - int i_aa:1; - int i_lk:1; - } i_i; - - /* - * Format M - */ - struct { - u_int i_opcd:6; - u_int i_rs:5; - u_int i_ra:5; - u_int i_rb:5; - int i_mb:5; - int i_me:5; - u_int i_rc:1; - } i_m; - - /* - * Format MD - */ - struct { - u_int i_opcd:6; - u_int i_rs:5; - u_int i_ra:5; - u_int i_rb:5; - int i_sh1_5:5; - int i_mb:6; - u_int i_xo:3; - int i_sh0:2; - u_int i_rc:1; - } i_md; - - /* - * Format MDS - */ - struct { - u_int i_opcd:6; - u_int i_rs:5; - u_int i_ra:5; - u_int i_rb:5; - int i_sh:5; - int i_mb:6; - u_int i_xo:4; - u_int i_rc:1; - } i_mds; - - /* - * Format S - */ - struct { - u_int i_opcd:6; - int :24; - int i_i:1; - int :1; - } i_s; - - /* - * Format X - */ - struct { - u_int i_opcd:6; - u_int i_rs:5; - u_int i_ra:5; - u_int i_rb:5; - u_int i_xo:10; - u_int i_rc:1; - } i_x; - - /* - * Format XFL - */ - struct { - u_int i_opcd:6; - int :1; - int i_flm:8; - int :1; - int i_frb:5; - u_int i_xo:10; - int :1; - } i_xfl; - - /* - * Format XFX - */ - struct { - u_int i_opcd:6; - int i_dcrn:10; - u_int i_xo:10; - int :1; - } i_xfx; - - /* - * Format XL - */ - struct { - u_int i_opcd:6; - int i_bt:5; - int i_ba:5; - int i_bb:5; - u_int i_xo:10; - int i_lk:1; - } i_xl; - - /* - * Format XS - */ - struct { - u_int i_opcd:6; - u_int i_rs:5; - u_int i_ra:5; - int i_sh0_4:5; - u_int i_xo:9; - int i_sh5:1; - u_int i_rc:1; - } i_xs; - -}; - -#define i_rt i_rs - -/* - * Primary opcode numbers: - */ - -#define OPC_TDI 0x02 -#define OPC_TWI 0x03 -#define OPC_MULLI 0x07 -#define OPC_SUBFIC 0x08 -#define OPC_BCE 0x09 -#define OPC_CMPLI 0x0a -#define OPC_CMPI 0x0b -#define OPC_ADDIC 0x0c -#define OPC_ADDIC_DOT 0x0d -#define OPC_ADDI 0x0e -#define OPC_ADDIS 0x0f -#define OPC_BC 0x10 -#define OPC_SC 0x11 -#define OPC_B 0x12 -#define OPC_branch_19 0x13 -#define OPC_RLWIMI 0x14 -#define OPC_RLWINM 0x15 -#define OPC_BE 0x16 -#define OPC_RLWNM 0x17 -#define OPC_ORI 0x18 -#define OPC_ORIS 0x19 -#define OPC_XORI 0x1a -#define OPC_XORIS 0x1b -#define OPC_ANDI 0x1c -#define OPC_ANDIS 0x1d -#define OPC_dwe_rot_30 0x1e -#define OPC_integer_31 0x1f -#define OPC_LWZ 0x20 -#define OPC_LWZU 0x21 -#define OPC_LBZ 0x22 -#define OPC_LBZU 0x23 -#define OPC_STW 0x24 -#define OPC_STWU 0x25 -#define OPC_STB 0x26 -#define OPC_STBU 0x27 -#define OPC_LHZ 0x28 -#define OPC_LHZU 0x29 -#define OPC_LHA 0x2a -#define OPC_LHAU 0x2b -#define OPC_STH 0x2c -#define OPC_STHU 0x2d -#define OPC_LMW 0x2e -#define OPC_STMW 0x2f -#define OPC_LFS 0x30 -#define OPC_LFSU 0x31 -#define OPC_LFD 0x32 -#define OPC_LFDU 0x33 -#define OPC_STFS 0x34 -#define OPC_STFSU 0x35 -#define OPC_STFD 0x36 -#define OPC_STFDU 0x37 -#define OPC_load_st_58 0x3a -#define OPC_sp_fp_59 0x3b -#define OPC_load_st_62 0x3e -#define OPC_dp_fp_63 0x3f - -/* - * Opcode 31 sub-types (FP only) - */ -#define OPC31_TW 0x004 -#define OPC31_LFSX 0x217 -#define OPC31_LFSUX 0x237 -#define OPC31_LFDX 0x257 -#define OPC31_LFDUX 0x277 -#define OPC31_STFSX 0x297 -#define OPC31_STFSUX 0x2b7 -#define OPC31_STFDX 0x2d7 -#define OPC31_STFDUX 0x2f7 -#define OPC31_STFIWX 0x3d7 - -/* Mask for all valid indexed FP load/store ops (except stfiwx) */ -#define OPC31_FPMASK 0x31f -#define OPC31_FPOP 0x217 - -/* - * Opcode 59 sub-types: - */ - -#define OPC59_FDIVS 0x12 -#define OPC59_FSUBS 0x14 -#define OPC59_FADDS 0x15 -#define OPC59_FSQRTS 0x16 -#define OPC59_FRES 0x18 -#define OPC59_FMULS 0x19 -#define OPC59_FMSUBS 0x1c -#define OPC59_FMADDS 0x1d -#define OPC59_FNMSUBS 0x1e -#define OPC59_FNMADDS 0x1f - -/* - * Opcode 62 sub-types: - */ -#define OPC62_LDE 0x0 -#define OPC62_LDEU 0x1 -#define OPC62_LFSE 0x4 -#define OPC62_LFSEU 0x5 -#define OPC62_LFDE 0x6 -#define OPC62_LFDEU 0x7 -#define OPC62_STDE 0x8 -#define OPC62_STDEU 0x9 -#define OPC62_STFSE 0xc -#define OPC62_STFSEU 0xd -#define OPC62_STFDE 0xe -#define OPC62_STFDEU 0xf - -/* - * Opcode 63 sub-types: - * - * (The first group are masks....) - */ - -#define OPC63M_MASK 0x10 -#define OPC63M_FDIV 0x12 -#define OPC63M_FSUB 0x14 -#define OPC63M_FADD 0x15 -#define OPC63M_FSQRT 0x16 -#define OPC63M_FSEL 0x17 -#define OPC63M_FMUL 0x19 -#define OPC63M_FRSQRTE 0x1a -#define OPC63M_FMSUB 0x1c -#define OPC63M_FMADD 0x1d -#define OPC63M_FNMSUB 0x1e -#define OPC63M_FNMADD 0x1f - -#define OPC63_FCMPU 0x00 -#define OPC63_FRSP 0x0c -#define OPC63_FCTIW 0x0e -#define OPC63_FCTIWZ 0x0f -#define OPC63_FCMPO 0x20 -#define OPC63_MTFSB1 0x26 -#define OPC63_FNEG 0x28 -#define OPC63_MCRFS 0x40 -#define OPC63_MTFSB0 0x46 -#define OPC63_FMR 0x48 -#define OPC63_MTFSFI 0x86 -#define OPC63_FNABS 0x88 -#define OPC63_FABS 0x108 -#define OPC63_MFFS 0x247 -#define OPC63_MTFSF 0x2c7 -#define OPC63_FCTID 0x32e -#define OPC63_FCTIDZ 0x32f -#define OPC63_FCFID 0x34e - -/* - * FPU data types. - */ -#define FTYPE_LNG -1 /* data = 64-bit signed long integer */ -#define FTYPE_INT 0 /* data = 32-bit signed integer */ -#define FTYPE_SNG 1 /* data = 32-bit float */ -#define FTYPE_DBL 2 /* data = 64-bit double */ diff --git a/sys/powerpc/fpu/fpu_mul.c b/sys/powerpc/fpu/fpu_mul.c deleted file mode 100644 index 25c1427141d..00000000000 --- a/sys/powerpc/fpu/fpu_mul.c +++ /dev/null @@ -1,238 +0,0 @@ -/* $NetBSD: fpu_mul.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */ - -/* - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This software was developed by the Computer Systems Engineering group - * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and - * contributed to Berkeley. - * - * All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Lawrence Berkeley Laboratory. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)fpu_mul.c 8.1 (Berkeley) 6/11/93 - */ - -/* - * Perform an FPU multiply (return x * y). - */ - -#include -#include -#include - -#include - -#include -#include - -/* - * The multiplication algorithm for normal numbers is as follows: - * - * The fraction of the product is built in the usual stepwise fashion. - * Each step consists of shifting the accumulator right one bit - * (maintaining any guard bits) and, if the next bit in y is set, - * adding the multiplicand (x) to the accumulator. Then, in any case, - * we advance one bit leftward in y. Algorithmically: - * - * A = 0; - * for (bit = 0; bit < FP_NMANT; bit++) { - * sticky |= A & 1, A >>= 1; - * if (Y & (1 << bit)) - * A += X; - * } - * - * (X and Y here represent the mantissas of x and y respectively.) - * The resultant accumulator (A) is the product's mantissa. It may - * be as large as 11.11111... in binary and hence may need to be - * shifted right, but at most one bit. - * - * Since we do not have efficient multiword arithmetic, we code the - * accumulator as four separate words, just like any other mantissa. - * We use local variables in the hope that this is faster than memory. - * We keep x->fp_mant in locals for the same reason. - * - * In the algorithm above, the bits in y are inspected one at a time. - * We will pick them up 32 at a time and then deal with those 32, one - * at a time. Note, however, that we know several things about y: - * - * - the guard and round bits at the bottom are sure to be zero; - * - * - often many low bits are zero (y is often from a single or double - * precision source); - * - * - bit FP_NMANT-1 is set, and FP_1*2 fits in a word. - * - * We can also test for 32-zero-bits swiftly. In this case, the center - * part of the loop---setting sticky, shifting A, and not adding---will - * run 32 times without adding X to A. We can do a 32-bit shift faster - * by simply moving words. Since zeros are common, we optimize this case. - * Furthermore, since A is initially zero, we can omit the shift as well - * until we reach a nonzero word. - */ -struct fpn * -fpu_mul(struct fpemu *fe) -{ - struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2; - u_int a3, a2, a1, a0, x3, x2, x1, x0, bit, m; - int sticky; - FPU_DECL_CARRY; - - /* - * Put the `heavier' operand on the right (see fpu_emu.h). - * Then we will have one of the following cases, taken in the - * following order: - * - * - y = NaN. Implied: if only one is a signalling NaN, y is. - * The result is y. - * - y = Inf. Implied: x != NaN (is 0, number, or Inf: the NaN - * case was taken care of earlier). - * If x = 0, the result is NaN. Otherwise the result - * is y, with its sign reversed if x is negative. - * - x = 0. Implied: y is 0 or number. - * The result is 0 (with XORed sign as usual). - * - other. Implied: both x and y are numbers. - * The result is x * y (XOR sign, multiply bits, add exponents). - */ - DPRINTF(FPE_REG, ("fpu_mul:\n")); - DUMPFPN(FPE_REG, x); - DUMPFPN(FPE_REG, y); - DPRINTF(FPE_REG, ("=>\n")); - - ORDER(x, y); - if (ISNAN(y)) { - y->fp_sign ^= x->fp_sign; - fe->fe_cx |= FPSCR_VXSNAN; - DUMPFPN(FPE_REG, y); - return (y); - } - if (ISINF(y)) { - if (ISZERO(x)) { - fe->fe_cx |= FPSCR_VXIMZ; - return (fpu_newnan(fe)); - } - y->fp_sign ^= x->fp_sign; - DUMPFPN(FPE_REG, y); - return (y); - } - if (ISZERO(x)) { - x->fp_sign ^= y->fp_sign; - DUMPFPN(FPE_REG, x); - return (x); - } - - /* - * Setup. In the code below, the mask `m' will hold the current - * mantissa byte from y. The variable `bit' denotes the bit - * within m. We also define some macros to deal with everything. - */ - x3 = x->fp_mant[3]; - x2 = x->fp_mant[2]; - x1 = x->fp_mant[1]; - x0 = x->fp_mant[0]; - sticky = a3 = a2 = a1 = a0 = 0; - -#define ADD /* A += X */ \ - FPU_ADDS(a3, a3, x3); \ - FPU_ADDCS(a2, a2, x2); \ - FPU_ADDCS(a1, a1, x1); \ - FPU_ADDC(a0, a0, x0) - -#define SHR1 /* A >>= 1, with sticky */ \ - sticky |= a3 & 1, a3 = (a3 >> 1) | (a2 << 31), \ - a2 = (a2 >> 1) | (a1 << 31), a1 = (a1 >> 1) | (a0 << 31), a0 >>= 1 - -#define SHR32 /* A >>= 32, with sticky */ \ - sticky |= a3, a3 = a2, a2 = a1, a1 = a0, a0 = 0 - -#define STEP /* each 1-bit step of the multiplication */ \ - SHR1; if (bit & m) { ADD; }; bit <<= 1 - - /* - * We are ready to begin. The multiply loop runs once for each - * of the four 32-bit words. Some words, however, are special. - * As noted above, the low order bits of Y are often zero. Even - * if not, the first loop can certainly skip the guard bits. - * The last word of y has its highest 1-bit in position FP_NMANT-1, - * so we stop the loop when we move past that bit. - */ - if ((m = y->fp_mant[3]) == 0) { - /* SHR32; */ /* unneeded since A==0 */ - } else { - bit = 1 << FP_NG; - do { - STEP; - } while (bit != 0); - } - if ((m = y->fp_mant[2]) == 0) { - SHR32; - } else { - bit = 1; - do { - STEP; - } while (bit != 0); - } - if ((m = y->fp_mant[1]) == 0) { - SHR32; - } else { - bit = 1; - do { - STEP; - } while (bit != 0); - } - m = y->fp_mant[0]; /* definitely != 0 */ - bit = 1; - do { - STEP; - } while (bit <= m); - - /* - * Done with mantissa calculation. Get exponent and handle - * 11.111...1 case, then put result in place. We reuse x since - * it already has the right class (FP_NUM). - */ - m = x->fp_exp + y->fp_exp; - if (a0 >= FP_2) { - SHR1; - m++; - } - x->fp_sign ^= y->fp_sign; - x->fp_exp = m; - x->fp_sticky = sticky; - x->fp_mant[3] = a3; - x->fp_mant[2] = a2; - x->fp_mant[1] = a1; - x->fp_mant[0] = a0; - - DUMPFPN(FPE_REG, x); - return (x); -} diff --git a/sys/powerpc/fpu/fpu_sqrt.c b/sys/powerpc/fpu/fpu_sqrt.c deleted file mode 100644 index f675773903d..00000000000 --- a/sys/powerpc/fpu/fpu_sqrt.c +++ /dev/null @@ -1,414 +0,0 @@ -/* $NetBSD: fpu_sqrt.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This software was developed by the Computer Systems Engineering group - * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and - * contributed to Berkeley. - * - * All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Lawrence Berkeley Laboratory. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)fpu_sqrt.c 8.1 (Berkeley) 6/11/93 - */ - -/* - * Perform an FPU square root (return sqrt(x)). - */ - -#include -#include -#include - -#include - -#include -#include - -/* - * Our task is to calculate the square root of a floating point number x0. - * This number x normally has the form: - * - * exp - * x = mant * 2 (where 1 <= mant < 2 and exp is an integer) - * - * This can be left as it stands, or the mantissa can be doubled and the - * exponent decremented: - * - * exp-1 - * x = (2 * mant) * 2 (where 2 <= 2 * mant < 4) - * - * If the exponent `exp' is even, the square root of the number is best - * handled using the first form, and is by definition equal to: - * - * exp/2 - * sqrt(x) = sqrt(mant) * 2 - * - * If exp is odd, on the other hand, it is convenient to use the second - * form, giving: - * - * (exp-1)/2 - * sqrt(x) = sqrt(2 * mant) * 2 - * - * In the first case, we have - * - * 1 <= mant < 2 - * - * and therefore - * - * sqrt(1) <= sqrt(mant) < sqrt(2) - * - * while in the second case we have - * - * 2 <= 2*mant < 4 - * - * and therefore - * - * sqrt(2) <= sqrt(2*mant) < sqrt(4) - * - * so that in any case, we are sure that - * - * sqrt(1) <= sqrt(n * mant) < sqrt(4), n = 1 or 2 - * - * or - * - * 1 <= sqrt(n * mant) < 2, n = 1 or 2. - * - * This root is therefore a properly formed mantissa for a floating - * point number. The exponent of sqrt(x) is either exp/2 or (exp-1)/2 - * as above. This leaves us with the problem of finding the square root - * of a fixed-point number in the range [1..4). - * - * Though it may not be instantly obvious, the following square root - * algorithm works for any integer x of an even number of bits, provided - * that no overflows occur: - * - * let q = 0 - * for k = NBITS-1 to 0 step -1 do -- for each digit in the answer... - * x *= 2 -- multiply by radix, for next digit - * if x >= 2q + 2^k then -- if adding 2^k does not - * x -= 2q + 2^k -- exceed the correct root, - * q += 2^k -- add 2^k and adjust x - * fi - * done - * sqrt = q / 2^(NBITS/2) -- (and any remainder is in x) - * - * If NBITS is odd (so that k is initially even), we can just add another - * zero bit at the top of x. Doing so means that q is not going to acquire - * a 1 bit in the first trip around the loop (since x0 < 2^NBITS). If the - * final value in x is not needed, or can be off by a factor of 2, this is - * equivalant to moving the `x *= 2' step to the bottom of the loop: - * - * for k = NBITS-1 to 0 step -1 do if ... fi; x *= 2; done - * - * and the result q will then be sqrt(x0) * 2^floor(NBITS / 2). - * (Since the algorithm is destructive on x, we will call x's initial - * value, for which q is some power of two times its square root, x0.) - * - * If we insert a loop invariant y = 2q, we can then rewrite this using - * C notation as: - * - * q = y = 0; x = x0; - * for (k = NBITS; --k >= 0;) { - * #if (NBITS is even) - * x *= 2; - * #endif - * t = y + (1 << k); - * if (x >= t) { - * x -= t; - * q += 1 << k; - * y += 1 << (k + 1); - * } - * #if (NBITS is odd) - * x *= 2; - * #endif - * } - * - * If x0 is fixed point, rather than an integer, we can simply alter the - * scale factor between q and sqrt(x0). As it happens, we can easily arrange - * for the scale factor to be 2**0 or 1, so that sqrt(x0) == q. - * - * In our case, however, x0 (and therefore x, y, q, and t) are multiword - * integers, which adds some complication. But note that q is built one - * bit at a time, from the top down, and is not used itself in the loop - * (we use 2q as held in y instead). This means we can build our answer - * in an integer, one word at a time, which saves a bit of work. Also, - * since 1 << k is always a `new' bit in q, 1 << k and 1 << (k+1) are - * `new' bits in y and we can set them with an `or' operation rather than - * a full-blown multiword add. - * - * We are almost done, except for one snag. We must prove that none of our - * intermediate calculations can overflow. We know that x0 is in [1..4) - * and therefore the square root in q will be in [1..2), but what about x, - * y, and t? - * - * We know that y = 2q at the beginning of each loop. (The relation only - * fails temporarily while y and q are being updated.) Since q < 2, y < 4. - * The sum in t can, in our case, be as much as y+(1<<1) = y+2 < 6, and. - * Furthermore, we can prove with a bit of work that x never exceeds y by - * more than 2, so that even after doubling, 0 <= x < 8. (This is left as - * an exercise to the reader, mostly because I have become tired of working - * on this comment.) - * - * If our floating point mantissas (which are of the form 1.frac) occupy - * B+1 bits, our largest intermediary needs at most B+3 bits, or two extra. - * In fact, we want even one more bit (for a carry, to avoid compares), or - * three extra. There is a comment in fpu_emu.h reminding maintainers of - * this, so we have some justification in assuming it. - */ -struct fpn * -fpu_sqrt(struct fpemu *fe) -{ - struct fpn *x = &fe->fe_f1; - u_int bit, q, tt; - u_int x0, x1, x2, x3; - u_int y0, y1, y2, y3; - u_int d0, d1, d2, d3; - int e; - FPU_DECL_CARRY; - - /* - * Take care of special cases first. In order: - * - * sqrt(NaN) = NaN - * sqrt(+0) = +0 - * sqrt(-0) = -0 - * sqrt(x < 0) = NaN (including sqrt(-Inf)) - * sqrt(+Inf) = +Inf - * - * Then all that remains are numbers with mantissas in [1..2). - */ - DPRINTF(FPE_REG, ("fpu_sqer:\n")); - DUMPFPN(FPE_REG, x); - DPRINTF(FPE_REG, ("=>\n")); - if (ISNAN(x)) { - fe->fe_cx |= FPSCR_VXSNAN; - DUMPFPN(FPE_REG, x); - return (x); - } - if (ISZERO(x)) { - fe->fe_cx |= FPSCR_ZX; - x->fp_class = FPC_INF; - DUMPFPN(FPE_REG, x); - return (x); - } - if (x->fp_sign) { - fe->fe_cx |= FPSCR_VXSQRT; - return (fpu_newnan(fe)); - } - if (ISINF(x)) { - DUMPFPN(FPE_REG, x); - return (x); - } - - /* - * Calculate result exponent. As noted above, this may involve - * doubling the mantissa. We will also need to double x each - * time around the loop, so we define a macro for this here, and - * we break out the multiword mantissa. - */ -#ifdef FPU_SHL1_BY_ADD -#define DOUBLE_X { \ - FPU_ADDS(x3, x3, x3); FPU_ADDCS(x2, x2, x2); \ - FPU_ADDCS(x1, x1, x1); FPU_ADDC(x0, x0, x0); \ -} -#else -#define DOUBLE_X { \ - x0 = (x0 << 1) | (x1 >> 31); x1 = (x1 << 1) | (x2 >> 31); \ - x2 = (x2 << 1) | (x3 >> 31); x3 <<= 1; \ -} -#endif -#if (FP_NMANT & 1) != 0 -# define ODD_DOUBLE DOUBLE_X -# define EVEN_DOUBLE /* nothing */ -#else -# define ODD_DOUBLE /* nothing */ -# define EVEN_DOUBLE DOUBLE_X -#endif - x0 = x->fp_mant[0]; - x1 = x->fp_mant[1]; - x2 = x->fp_mant[2]; - x3 = x->fp_mant[3]; - e = x->fp_exp; - if (e & 1) /* exponent is odd; use sqrt(2mant) */ - DOUBLE_X; - /* THE FOLLOWING ASSUMES THAT RIGHT SHIFT DOES SIGN EXTENSION */ - x->fp_exp = e >> 1; /* calculates (e&1 ? (e-1)/2 : e/2 */ - - /* - * Now calculate the mantissa root. Since x is now in [1..4), - * we know that the first trip around the loop will definitely - * set the top bit in q, so we can do that manually and start - * the loop at the next bit down instead. We must be sure to - * double x correctly while doing the `known q=1.0'. - * - * We do this one mantissa-word at a time, as noted above, to - * save work. To avoid `(1U << 31) << 1', we also do the top bit - * outside of each per-word loop. - * - * The calculation `t = y + bit' breaks down into `t0 = y0, ..., - * t3 = y3, t? |= bit' for the appropriate word. Since the bit - * is always a `new' one, this means that three of the `t?'s are - * just the corresponding `y?'; we use `#define's here for this. - * The variable `tt' holds the actual `t?' variable. - */ - - /* calculate q0 */ -#define t0 tt - bit = FP_1; - EVEN_DOUBLE; - /* if (x >= (t0 = y0 | bit)) { */ /* always true */ - q = bit; - x0 -= bit; - y0 = bit << 1; - /* } */ - ODD_DOUBLE; - while ((bit >>= 1) != 0) { /* for remaining bits in q0 */ - EVEN_DOUBLE; - t0 = y0 | bit; /* t = y + bit */ - if (x0 >= t0) { /* if x >= t then */ - x0 -= t0; /* x -= t */ - q |= bit; /* q += bit */ - y0 |= bit << 1; /* y += bit << 1 */ - } - ODD_DOUBLE; - } - x->fp_mant[0] = q; -#undef t0 - - /* calculate q1. note (y0&1)==0. */ -#define t0 y0 -#define t1 tt - q = 0; - y1 = 0; - bit = 1 << 31; - EVEN_DOUBLE; - t1 = bit; - FPU_SUBS(d1, x1, t1); - FPU_SUBC(d0, x0, t0); /* d = x - t */ - if ((int)d0 >= 0) { /* if d >= 0 (i.e., x >= t) then */ - x0 = d0, x1 = d1; /* x -= t */ - q = bit; /* q += bit */ - y0 |= 1; /* y += bit << 1 */ - } - ODD_DOUBLE; - while ((bit >>= 1) != 0) { /* for remaining bits in q1 */ - EVEN_DOUBLE; /* as before */ - t1 = y1 | bit; - FPU_SUBS(d1, x1, t1); - FPU_SUBC(d0, x0, t0); - if ((int)d0 >= 0) { - x0 = d0, x1 = d1; - q |= bit; - y1 |= bit << 1; - } - ODD_DOUBLE; - } - x->fp_mant[1] = q; -#undef t1 - - /* calculate q2. note (y1&1)==0; y0 (aka t0) is fixed. */ -#define t1 y1 -#define t2 tt - q = 0; - y2 = 0; - bit = 1 << 31; - EVEN_DOUBLE; - t2 = bit; - FPU_SUBS(d2, x2, t2); - FPU_SUBCS(d1, x1, t1); - FPU_SUBC(d0, x0, t0); - if ((int)d0 >= 0) { - x0 = d0, x1 = d1, x2 = d2; - q = bit; - y1 |= 1; /* now t1, y1 are set in concrete */ - } - ODD_DOUBLE; - while ((bit >>= 1) != 0) { - EVEN_DOUBLE; - t2 = y2 | bit; - FPU_SUBS(d2, x2, t2); - FPU_SUBCS(d1, x1, t1); - FPU_SUBC(d0, x0, t0); - if ((int)d0 >= 0) { - x0 = d0, x1 = d1, x2 = d2; - q |= bit; - y2 |= bit << 1; - } - ODD_DOUBLE; - } - x->fp_mant[2] = q; -#undef t2 - - /* calculate q3. y0, t0, y1, t1 all fixed; y2, t2, almost done. */ -#define t2 y2 -#define t3 tt - q = 0; - y3 = 0; - bit = 1 << 31; - EVEN_DOUBLE; - t3 = bit; - FPU_SUBS(d3, x3, t3); - FPU_SUBCS(d2, x2, t2); - FPU_SUBCS(d1, x1, t1); - FPU_SUBC(d0, x0, t0); - if ((int)d0 >= 0) { - x0 = d0, x1 = d1, x2 = d2; x3 = d3; - q = bit; - y2 |= 1; - } - ODD_DOUBLE; - while ((bit >>= 1) != 0) { - EVEN_DOUBLE; - t3 = y3 | bit; - FPU_SUBS(d3, x3, t3); - FPU_SUBCS(d2, x2, t2); - FPU_SUBCS(d1, x1, t1); - FPU_SUBC(d0, x0, t0); - if ((int)d0 >= 0) { - x0 = d0, x1 = d1, x2 = d2; x3 = d3; - q |= bit; - y3 |= bit << 1; - } - ODD_DOUBLE; - } - x->fp_mant[3] = q; - - /* - * The result, which includes guard and round bits, is exact iff - * x is now zero; any nonzero bits in x represent sticky bits. - */ - x->fp_sticky = x0 | x1 | x2 | x3; - DUMPFPN(FPE_REG, x); - return (x); -} diff --git a/sys/powerpc/fpu/fpu_subr.c b/sys/powerpc/fpu/fpu_subr.c deleted file mode 100644 index c437a451893..00000000000 --- a/sys/powerpc/fpu/fpu_subr.c +++ /dev/null @@ -1,219 +0,0 @@ -/* $NetBSD: fpu_subr.c,v 1.4 2005/12/11 12:18:42 christos Exp $ */ - -/* - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This software was developed by the Computer Systems Engineering group - * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and - * contributed to Berkeley. - * - * All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Lawrence Berkeley Laboratory. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)fpu_subr.c 8.1 (Berkeley) 6/11/93 - */ - -/* - * FPU subroutines. - */ - -#include -#include -#include - -#include - -#include -#include - -/* - * Shift the given number right rsh bits. Any bits that `fall off' will get - * shoved into the sticky field; we return the resulting sticky. Note that - * shifting NaNs is legal (this will never shift all bits out); a NaN's - * sticky field is ignored anyway. - */ -int -fpu_shr(struct fpn *fp, int rsh) -{ - u_int m0, m1, m2, m3, s; - int lsh; - -#ifdef DIAGNOSTIC - if (rsh <= 0 || (fp->fp_class != FPC_NUM && !ISNAN(fp))) - panic("fpu_rightshift 1"); -#endif - - m0 = fp->fp_mant[0]; - m1 = fp->fp_mant[1]; - m2 = fp->fp_mant[2]; - m3 = fp->fp_mant[3]; - - /* If shifting all the bits out, take a shortcut. */ - if (rsh >= FP_NMANT) { -#ifdef DIAGNOSTIC - if ((m0 | m1 | m2 | m3) == 0) - panic("fpu_rightshift 2"); -#endif - fp->fp_mant[0] = 0; - fp->fp_mant[1] = 0; - fp->fp_mant[2] = 0; - fp->fp_mant[3] = 0; -#ifdef notdef - if ((m0 | m1 | m2 | m3) == 0) - fp->fp_class = FPC_ZERO; - else -#endif - fp->fp_sticky = 1; - return (1); - } - - /* Squish out full words. */ - s = fp->fp_sticky; - if (rsh >= 32 * 3) { - s |= m3 | m2 | m1; - m3 = m0, m2 = 0, m1 = 0, m0 = 0; - } else if (rsh >= 32 * 2) { - s |= m3 | m2; - m3 = m1, m2 = m0, m1 = 0, m0 = 0; - } else if (rsh >= 32) { - s |= m3; - m3 = m2, m2 = m1, m1 = m0, m0 = 0; - } - - /* Handle any remaining partial word. */ - if ((rsh &= 31) != 0) { - lsh = 32 - rsh; - s |= m3 << lsh; - m3 = (m3 >> rsh) | (m2 << lsh); - m2 = (m2 >> rsh) | (m1 << lsh); - m1 = (m1 >> rsh) | (m0 << lsh); - m0 >>= rsh; - } - fp->fp_mant[0] = m0; - fp->fp_mant[1] = m1; - fp->fp_mant[2] = m2; - fp->fp_mant[3] = m3; - fp->fp_sticky = s; - return (s); -} - -/* - * Force a number to be normal, i.e., make its fraction have all zero - * bits before FP_1, then FP_1, then all 1 bits. This is used for denorms - * and (sometimes) for intermediate results. - * - * Internally, this may use a `supernormal' -- a number whose fp_mant - * is greater than or equal to 2.0 -- so as a side effect you can hand it - * a supernormal and it will fix it (provided fp->fp_mant[3] == 0). - */ -void -fpu_norm(struct fpn *fp) -{ - u_int m0, m1, m2, m3, top, sup, nrm; - int lsh, rsh, exp; - - exp = fp->fp_exp; - m0 = fp->fp_mant[0]; - m1 = fp->fp_mant[1]; - m2 = fp->fp_mant[2]; - m3 = fp->fp_mant[3]; - - /* Handle severe subnormals with 32-bit moves. */ - if (m0 == 0) { - if (m1) - m0 = m1, m1 = m2, m2 = m3, m3 = 0, exp -= 32; - else if (m2) - m0 = m2, m1 = m3, m2 = 0, m3 = 0, exp -= 2 * 32; - else if (m3) - m0 = m3, m1 = 0, m2 = 0, m3 = 0, exp -= 3 * 32; - else { - fp->fp_class = FPC_ZERO; - return; - } - } - - /* Now fix any supernormal or remaining subnormal. */ - nrm = FP_1; - sup = nrm << 1; - if (m0 >= sup) { - /* - * We have a supernormal number. We need to shift it right. - * We may assume m3==0. - */ - for (rsh = 1, top = m0 >> 1; top >= sup; rsh++) /* XXX slow */ - top >>= 1; - exp += rsh; - lsh = 32 - rsh; - m3 = m2 << lsh; - m2 = (m2 >> rsh) | (m1 << lsh); - m1 = (m1 >> rsh) | (m0 << lsh); - m0 = top; - } else if (m0 < nrm) { - /* - * We have a regular denorm (a subnormal number), and need - * to shift it left. - */ - for (lsh = 1, top = m0 << 1; top < nrm; lsh++) /* XXX slow */ - top <<= 1; - exp -= lsh; - rsh = 32 - lsh; - m0 = top | (m1 >> rsh); - m1 = (m1 << lsh) | (m2 >> rsh); - m2 = (m2 << lsh) | (m3 >> rsh); - m3 <<= lsh; - } - - fp->fp_exp = exp; - fp->fp_mant[0] = m0; - fp->fp_mant[1] = m1; - fp->fp_mant[2] = m2; - fp->fp_mant[3] = m3; -} - -/* - * Concoct a `fresh' Quiet NaN per Appendix N. - * As a side effect, we set NV (invalid) for the current exceptions. - */ -struct fpn * -fpu_newnan(struct fpemu *fe) -{ - struct fpn *fp; - - fe->fe_cx |= FPSCR_VXSNAN; - fp = &fe->fe_f3; - fp->fp_class = FPC_QNAN; - fp->fp_sign = 0; - fp->fp_mant[0] = FP_1 - 1; - fp->fp_mant[1] = fp->fp_mant[2] = fp->fp_mant[3] = ~0; - DUMPFPN(FPE_REG, fp); - return (fp); -} diff --git a/sys/powerpc/include/_align.h b/sys/powerpc/include/_align.h deleted file mode 100644 index 63ead9e7bff..00000000000 --- a/sys/powerpc/include/_align.h +++ /dev/null @@ -1,53 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 2001 David E. O'Brien - * Copyright (c) 1990 The Regents of the University of California. - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * William Jolitz. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)param.h 5.8 (Berkeley) 6/28/91 - */ - -#ifndef _POWERPC_INCLUDE__ALIGN_H_ -#define _POWERPC_INCLUDE__ALIGN_H_ - -/* - * Round p (pointer or byte index) up to a correctly-aligned value - * for all data types (int, long, ...). The result is unsigned int - * and must be cast to any desired pointer type. - */ -#define _ALIGNBYTES (sizeof(register_t) - 1) -#define _ALIGN(p) (((uintptr_t)(p) + _ALIGNBYTES) & ~_ALIGNBYTES) - -#endif /* !_POWERPC_INCLUDE__ALIGN_H_ */ diff --git a/sys/powerpc/include/_bus.h b/sys/powerpc/include/_bus.h deleted file mode 100644 index f59b0a1e30f..00000000000 --- a/sys/powerpc/include/_bus.h +++ /dev/null @@ -1,47 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2005 M. Warner Losh - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef POWERPC_INCLUDE__BUS_H -#define POWERPC_INCLUDE__BUS_H - -#include - -/* - * Bus address and size types - */ -typedef vm_paddr_t bus_addr_t; -typedef vm_size_t bus_size_t; - -/* - * Access methods for bus resources and address space. - */ -typedef struct bus_space *bus_space_tag_t; -typedef vm_offset_t bus_space_handle_t; - -#endif /* POWERPC_INCLUDE__BUS_H */ diff --git a/sys/powerpc/include/_inttypes.h b/sys/powerpc/include/_inttypes.h deleted file mode 100644 index 4d1b52da6ce..00000000000 --- a/sys/powerpc/include/_inttypes.h +++ /dev/null @@ -1,222 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2001 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Klaus Klein. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * From: $NetBSD: int_fmtio.h,v 1.2 2001/04/26 16:25:21 kleink Exp $ - */ - -#ifndef _MACHINE_INTTYPES_H_ -#define _MACHINE_INTTYPES_H_ - -/* - * Macros for format specifiers. - */ - -#ifdef __LP64__ -#define __PRI64 "l" -#define __PRIptr "l" -#else -#define __PRI64 "ll" -#define __PRIptr -#endif - -/* fprintf(3) macros for signed integers. */ - -#define PRId8 "d" /* int8_t */ -#define PRId16 "d" /* int16_t */ -#define PRId32 "d" /* int32_t */ -#define PRId64 __PRI64"d" /* int64_t */ -#define PRIdLEAST8 "d" /* int_least8_t */ -#define PRIdLEAST16 "d" /* int_least16_t */ -#define PRIdLEAST32 "d" /* int_least32_t */ -#define PRIdLEAST64 __PRI64"d" /* int_least64_t */ -#define PRIdFAST8 "d" /* int_fast8_t */ -#define PRIdFAST16 "d" /* int_fast16_t */ -#define PRIdFAST32 "d" /* int_fast32_t */ -#define PRIdFAST64 __PRI64"d" /* int_fast64_t */ -#define PRIdMAX "jd" /* intmax_t */ -#define PRIdPTR __PRIptr"d" /* intptr_t */ - -#define PRIi8 "i" /* int8_t */ -#define PRIi16 "i" /* int16_t */ -#define PRIi32 "i" /* int32_t */ -#define PRIi64 __PRI64"i" /* int64_t */ -#define PRIiLEAST8 "i" /* int_least8_t */ -#define PRIiLEAST16 "i" /* int_least16_t */ -#define PRIiLEAST32 "i" /* int_least32_t */ -#define PRIiLEAST64 __PRI64"i" /* int_least64_t */ -#define PRIiFAST8 "i" /* int_fast8_t */ -#define PRIiFAST16 "i" /* int_fast16_t */ -#define PRIiFAST32 "i" /* int_fast32_t */ -#define PRIiFAST64 __PRI64"i" /* int_fast64_t */ -#define PRIiMAX "ji" /* intmax_t */ -#define PRIiPTR __PRIptr"i" /* intptr_t */ - -/* fprintf(3) macros for unsigned integers. */ - -#define PRIo8 "o" /* uint8_t */ -#define PRIo16 "o" /* uint16_t */ -#define PRIo32 "o" /* uint32_t */ -#define PRIo64 __PRI64"o" /* uint64_t */ -#define PRIoLEAST8 "o" /* uint_least8_t */ -#define PRIoLEAST16 "o" /* uint_least16_t */ -#define PRIoLEAST32 "o" /* uint_least32_t */ -#define PRIoLEAST64 __PRI64"o" /* uint_least64_t */ -#define PRIoFAST8 "o" /* uint_fast8_t */ -#define PRIoFAST16 "o" /* uint_fast16_t */ -#define PRIoFAST32 "o" /* uint_fast32_t */ -#define PRIoFAST64 __PRI64"o" /* uint_fast64_t */ -#define PRIoMAX "jo" /* uintmax_t */ -#define PRIoPTR __PRIptr"o" /* uintptr_t */ - -#define PRIu8 "u" /* uint8_t */ -#define PRIu16 "u" /* uint16_t */ -#define PRIu32 "u" /* uint32_t */ -#define PRIu64 __PRI64"u" /* uint64_t */ -#define PRIuLEAST8 "u" /* uint_least8_t */ -#define PRIuLEAST16 "u" /* uint_least16_t */ -#define PRIuLEAST32 "u" /* uint_least32_t */ -#define PRIuLEAST64 __PRI64"u" /* uint_least64_t */ -#define PRIuFAST8 "u" /* uint_fast8_t */ -#define PRIuFAST16 "u" /* uint_fast16_t */ -#define PRIuFAST32 "u" /* uint_fast32_t */ -#define PRIuFAST64 __PRI64"u" /* uint_fast64_t */ -#define PRIuMAX "ju" /* uintmax_t */ -#define PRIuPTR __PRIptr"u" /* uintptr_t */ - -#define PRIx8 "x" /* uint8_t */ -#define PRIx16 "x" /* uint16_t */ -#define PRIx32 "x" /* uint32_t */ -#define PRIx64 __PRI64"x" /* uint64_t */ -#define PRIxLEAST8 "x" /* uint_least8_t */ -#define PRIxLEAST16 "x" /* uint_least16_t */ -#define PRIxLEAST32 "x" /* uint_least32_t */ -#define PRIxLEAST64 __PRI64"x" /* uint_least64_t */ -#define PRIxFAST8 "x" /* uint_fast8_t */ -#define PRIxFAST16 "x" /* uint_fast16_t */ -#define PRIxFAST32 "x" /* uint_fast32_t */ -#define PRIxFAST64 __PRI64"x" /* uint_fast64_t */ -#define PRIxMAX "jx" /* uintmax_t */ -#define PRIxPTR __PRIptr"x" /* uintptr_t */ - -#define PRIX8 "X" /* uint8_t */ -#define PRIX16 "X" /* uint16_t */ -#define PRIX32 "X" /* uint32_t */ -#define PRIX64 __PRI64"X" /* uint64_t */ -#define PRIXLEAST8 "X" /* uint_least8_t */ -#define PRIXLEAST16 "X" /* uint_least16_t */ -#define PRIXLEAST32 "X" /* uint_least32_t */ -#define PRIXLEAST64 __PRI64"X" /* uint_least64_t */ -#define PRIXFAST8 "X" /* uint_fast8_t */ -#define PRIXFAST16 "X" /* uint_fast16_t */ -#define PRIXFAST32 "X" /* uint_fast32_t */ -#define PRIXFAST64 __PRI64"X" /* uint_fast64_t */ -#define PRIXMAX "jX" /* uintmax_t */ -#define PRIXPTR __PRIptr"X" /* uintptr_t */ - -/* fscanf(3) macros for signed integers. */ - -#define SCNd8 "hhd" /* int8_t */ -#define SCNd16 "hd" /* int16_t */ -#define SCNd32 "d" /* int32_t */ -#define SCNd64 __PRI64"d" /* int64_t */ -#define SCNdLEAST8 "hhd" /* int_least8_t */ -#define SCNdLEAST16 "hd" /* int_least16_t */ -#define SCNdLEAST32 "d" /* int_least32_t */ -#define SCNdLEAST64 __PRI64"d" /* int_least64_t */ -#define SCNdFAST8 "d" /* int_fast8_t */ -#define SCNdFAST16 "d" /* int_fast16_t */ -#define SCNdFAST32 "d" /* int_fast32_t */ -#define SCNdFAST64 __PRI64"d" /* int_fast64_t */ -#define SCNdMAX "jd" /* intmax_t */ -#define SCNdPTR __PRIptr"d" /* intptr_t */ - -#define SCNi8 "hhi" /* int8_t */ -#define SCNi16 "hi" /* int16_t */ -#define SCNi32 "i" /* int32_t */ -#define SCNi64 __PRI64"i" /* int64_t */ -#define SCNiLEAST8 "hhi" /* int_least8_t */ -#define SCNiLEAST16 "hi" /* int_least16_t */ -#define SCNiLEAST32 "i" /* int_least32_t */ -#define SCNiLEAST64 __PRI64"i" /* int_least64_t */ -#define SCNiFAST8 "i" /* int_fast8_t */ -#define SCNiFAST16 "i" /* int_fast16_t */ -#define SCNiFAST32 "i" /* int_fast32_t */ -#define SCNiFAST64 __PRI64"i" /* int_fast64_t */ -#define SCNiMAX "ji" /* intmax_t */ -#define SCNiPTR __PRIptr"i" /* intptr_t */ - -/* fscanf(3) macros for unsigned integers. */ - -#define SCNo8 "hho" /* uint8_t */ -#define SCNo16 "ho" /* uint16_t */ -#define SCNo32 "o" /* uint32_t */ -#define SCNo64 __PRI64"o" /* uint64_t */ -#define SCNoLEAST8 "hho" /* uint_least8_t */ -#define SCNoLEAST16 "ho" /* uint_least16_t */ -#define SCNoLEAST32 "o" /* uint_least32_t */ -#define SCNoLEAST64 __PRI64"o" /* uint_least64_t */ -#define SCNoFAST8 "o" /* uint_fast8_t */ -#define SCNoFAST16 "o" /* uint_fast16_t */ -#define SCNoFAST32 "o" /* uint_fast32_t */ -#define SCNoFAST64 __PRI64"o" /* uint_fast64_t */ -#define SCNoMAX "jo" /* uintmax_t */ -#define SCNoPTR __PRIptr"o" /* uintptr_t */ - -#define SCNu8 "hhu" /* uint8_t */ -#define SCNu16 "hu" /* uint16_t */ -#define SCNu32 "u" /* uint32_t */ -#define SCNu64 __PRI64"u" /* uint64_t */ -#define SCNuLEAST8 "hhu" /* uint_least8_t */ -#define SCNuLEAST16 "hu" /* uint_least16_t */ -#define SCNuLEAST32 "u" /* uint_least32_t */ -#define SCNuLEAST64 __PRI64"u" /* uint_least64_t */ -#define SCNuFAST8 "u" /* uint_fast8_t */ -#define SCNuFAST16 "u" /* uint_fast16_t */ -#define SCNuFAST32 "u" /* uint_fast32_t */ -#define SCNuFAST64 __PRI64"u" /* uint_fast64_t */ -#define SCNuMAX "ju" /* uintmax_t */ -#define SCNuPTR __PRIptr"u" /* uintptr_t */ - -#define SCNx8 "hhx" /* uint8_t */ -#define SCNx16 "hx" /* uint16_t */ -#define SCNx32 "x" /* uint32_t */ -#define SCNx64 __PRI64"x" /* uint64_t */ -#define SCNxLEAST8 "hhx" /* uint_least8_t */ -#define SCNxLEAST16 "hx" /* uint_least16_t */ -#define SCNxLEAST32 "x" /* uint_least32_t */ -#define SCNxLEAST64 __PRI64"x" /* uint_least64_t */ -#define SCNxFAST8 "x" /* uint_fast8_t */ -#define SCNxFAST16 "x" /* uint_fast16_t */ -#define SCNxFAST32 "x" /* uint_fast32_t */ -#define SCNxFAST64 __PRI64"x" /* uint_fast64_t */ -#define SCNxMAX "jx" /* uintmax_t */ -#define SCNxPTR __PRIptr"x" /* uintptr_t */ - -#endif /* !_MACHINE_INTTYPES_H_ */ diff --git a/sys/powerpc/include/_limits.h b/sys/powerpc/include/_limits.h deleted file mode 100644 index 956a9c1e9f1..00000000000 --- a/sys/powerpc/include/_limits.h +++ /dev/null @@ -1,98 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1988, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)limits.h 8.3 (Berkeley) 1/4/94 - */ - -#ifndef _MACHINE__LIMITS_H_ -#define _MACHINE__LIMITS_H_ - -/* - * According to ANSI (section 2.2.4.2), the values below must be usable by - * #if preprocessing directives. Additionally, the expression must have the - * same type as would an expression that is an object of the corresponding - * type converted according to the integral promotions. The subtraction for - * INT_MIN, etc., is so the value is not unsigned; e.g., 0x80000000 is an - * unsigned int for 32-bit two's complement ANSI compilers (section 3.1.3.2). - */ - -#define __CHAR_BIT 8 /* number of bits in a char */ - -#define __SCHAR_MAX 0x7f /* max value for a signed char */ -#define __SCHAR_MIN (-0x7f - 1) /* min value for a signed char */ - -#define __UCHAR_MAX 0xff /* max value for an unsigned char */ - -#define __USHRT_MAX 0xffff /* max value for an unsigned short */ -#define __SHRT_MAX 0x7fff /* max value for a short */ -#define __SHRT_MIN (-0x7fff - 1) /* min value for a short */ - -#define __UINT_MAX 0xffffffff /* max value for an unsigned int */ -#define __INT_MAX 0x7fffffff /* max value for an int */ -#define __INT_MIN (-0x7fffffff - 1) /* min value for an int */ - -#ifdef __LP64__ -#define __ULONG_MAX 0xffffffffffffffff -#define __LONG_MAX 0x7fffffffffffffff -#define __LONG_MIN (-0x7fffffffffffffff - 1) -#define __LONG_BIT 64 -#else -#define __ULONG_MAX 0xffffffffUL /* max value for an unsigned long */ -#define __LONG_MAX 0x7fffffffL /* max value for a long */ -#define __LONG_MIN (-0x7fffffffL - 1) /* min value for a long */ -#define __LONG_BIT 32 -#endif - -#define __ULLONG_MAX 0xffffffffffffffffULL -#define __LLONG_MAX 0x7fffffffffffffffLL /* max value for a long long */ -#define __LLONG_MIN (-0x7fffffffffffffffLL - 1) /* min for a long long */ - -#ifdef __LP64__ -#define __SSIZE_MAX __LONG_MAX /* max value for a ssize_t */ -#define __SIZE_T_MAX __ULONG_MAX /* max value for a size_t */ -#else -#define __SSIZE_MAX __INT_MAX /* max value for a ssize_t */ -#define __SIZE_T_MAX __UINT_MAX /* max value for a size_t */ -#endif - -#define __OFF_MAX __LLONG_MAX /* max value for an off_t */ -#define __OFF_MIN __LLONG_MIN /* min value for an off_t */ - -/* Quads and long longs are the same size. Ensure they stay in sync. */ -#define __UQUAD_MAX __ULLONG_MAX /* max value for a uquad_t */ -#define __QUAD_MAX __LLONG_MAX /* max value for a quad_t */ -#define __QUAD_MIN __LLONG_MIN /* min value for a quad_t */ - -#define __WORD_BIT 32 - -/* Minimum signal stack size. */ -#define __MINSIGSTKSZ (512 * 4) - -#endif /* !_MACHINE__LIMITS_H_ */ diff --git a/sys/powerpc/include/_stdint.h b/sys/powerpc/include/_stdint.h deleted file mode 100644 index 9619b731d69..00000000000 --- a/sys/powerpc/include/_stdint.h +++ /dev/null @@ -1,192 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 2001, 2002 Mike Barcroft - * Copyright (c) 2001 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Klaus Klein. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the NetBSD - * Foundation, Inc. and its contributors. - * 4. Neither the name of The NetBSD Foundation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE__STDINT_H_ -#define _MACHINE__STDINT_H_ - -#define INT8_C(c) (c) -#define INT16_C(c) (c) -#define INT32_C(c) (c) - -#define UINT8_C(c) (c) -#define UINT16_C(c) (c) -#define UINT32_C(c) (c ## U) - -#ifdef __LP64__ -#define INT64_C(c) (c ## L) -#define UINT64_C(c) (c ## UL) -#else -#define INT64_C(c) (c ## LL) -#define UINT64_C(c) (c ## ULL) -#endif - -#define INTMAX_C(c) INT64_C(c) -#define UINTMAX_C(c) UINT64_C(c) - -#ifndef __INT64_C -#ifdef __LP64__ -#define __INT64_C(c) (c ## L) -#define __UINT64_C(c) (c ## UL) -#else -#define __INT64_C(c) (c ## LL) -#define __UINT64_C(c) (c ## ULL) -#endif -#endif - -/* - * ISO/IEC 9899:1999 - * 7.18.2.1 Limits of exact-width integer types - */ -/* Minimum values of exact-width signed integer types. */ -#define INT8_MIN (-0x7f-1) -#define INT16_MIN (-0x7fff-1) -#define INT32_MIN (-0x7fffffff-1) -#define INT64_MIN (-__INT64_C(0x7fffffffffffffff)-1) - -/* Maximum values of exact-width signed integer types. */ -#define INT8_MAX 0x7f -#define INT16_MAX 0x7fff -#define INT32_MAX 0x7fffffff -#define INT64_MAX __INT64_C(0x7fffffffffffffff) - -/* Maximum values of exact-width unsigned integer types. */ -#define UINT8_MAX 0xff -#define UINT16_MAX 0xffff -#define UINT32_MAX 0xffffffff -#define UINT64_MAX __UINT64_C(0xffffffffffffffff) - -/* - * ISO/IEC 9899:1999 - * 7.18.2.2 Limits of minimum-width integer types - */ -/* Minimum values of minimum-width signed integer types. */ -#define INT_LEAST8_MIN INT8_MIN -#define INT_LEAST16_MIN INT16_MIN -#define INT_LEAST32_MIN INT32_MIN -#define INT_LEAST64_MIN INT64_MIN - -/* Maximum values of minimum-width signed integer types. */ -#define INT_LEAST8_MAX INT8_MAX -#define INT_LEAST16_MAX INT16_MAX -#define INT_LEAST32_MAX INT32_MAX -#define INT_LEAST64_MAX INT64_MAX - -/* Maximum values of minimum-width unsigned integer types. */ -#define UINT_LEAST8_MAX UINT8_MAX -#define UINT_LEAST16_MAX UINT16_MAX -#define UINT_LEAST32_MAX UINT32_MAX -#define UINT_LEAST64_MAX UINT64_MAX - -/* - * ISO/IEC 9899:1999 - * 7.18.2.3 Limits of fastest minimum-width integer types - */ -/* Minimum values of fastest minimum-width signed integer types. */ -#define INT_FAST8_MIN INT32_MIN -#define INT_FAST16_MIN INT32_MIN -#define INT_FAST32_MIN INT32_MIN -#define INT_FAST64_MIN INT64_MIN - -/* Maximum values of fastest minimum-width signed integer types. */ -#define INT_FAST8_MAX INT32_MAX -#define INT_FAST16_MAX INT32_MAX -#define INT_FAST32_MAX INT32_MAX -#define INT_FAST64_MAX INT64_MAX - -/* Maximum values of fastest minimum-width unsigned integer types. */ -#define UINT_FAST8_MAX UINT32_MAX -#define UINT_FAST16_MAX UINT32_MAX -#define UINT_FAST32_MAX UINT32_MAX -#define UINT_FAST64_MAX UINT64_MAX - -/* - * ISO/IEC 9899:1999 - * 7.18.2.4 Limits of integer types capable of holding object pointers - */ -#ifdef __LP64__ -#define INTPTR_MIN INT64_MIN -#define INTPTR_MAX INT64_MAX -#define UINTPTR_MAX UINT64_MAX -#else -#define INTPTR_MIN INT32_MIN -#define INTPTR_MAX INT32_MAX -#define UINTPTR_MAX UINT32_MAX -#endif - -/* - * ISO/IEC 9899:1999 - * 7.18.2.5 Limits of greatest-width integer types - */ -#define INTMAX_MIN INT64_MIN -#define INTMAX_MAX INT64_MAX -#define UINTMAX_MAX UINT64_MAX - -/* - * ISO/IEC 9899:1999 - * 7.18.3 Limits of other integer types - */ -#ifdef __LP64__ -/* Limits of ptrdiff_t. */ -#define PTRDIFF_MIN INT64_MIN -#define PTRDIFF_MAX INT64_MAX - -/* Limits of sig_atomic_t. */ -#define SIG_ATOMIC_MIN INT64_MIN -#define SIG_ATOMIC_MAX INT64_MAX - -/* Limit of size_t. */ -#define SIZE_MAX UINT64_MAX -#else -/* Limits of ptrdiff_t. */ -#define PTRDIFF_MIN INT32_MIN -#define PTRDIFF_MAX INT32_MAX - -/* Limits of sig_atomic_t. */ -#define SIG_ATOMIC_MIN INT32_MIN -#define SIG_ATOMIC_MAX INT32_MAX - -/* Limit of size_t. */ -#define SIZE_MAX UINT32_MAX -#endif - -/* Limits of wint_t. */ -#define WINT_MIN INT32_MIN -#define WINT_MAX INT32_MAX - -#endif /* !_MACHINE__STDINT_H_ */ diff --git a/sys/powerpc/include/_types.h b/sys/powerpc/include/_types.h deleted file mode 100644 index 6b1208cf3e1..00000000000 --- a/sys/powerpc/include/_types.h +++ /dev/null @@ -1,148 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 2002 Mike Barcroft - * Copyright (c) 1990, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * From: @(#)ansi.h 8.2 (Berkeley) 1/4/94 - * From: @(#)types.h 8.3 (Berkeley) 1/5/94 - */ - -#ifndef _MACHINE__TYPES_H_ -#define _MACHINE__TYPES_H_ - -#ifndef _SYS_CDEFS_H_ -#error this file needs sys/cdefs.h as a prerequisite -#endif - -/* - * Basic types upon which most other types are built. - */ -typedef signed char __int8_t; -typedef unsigned char __uint8_t; -typedef short __int16_t; -typedef unsigned short __uint16_t; -typedef int __int32_t; -typedef unsigned int __uint32_t; -#ifdef __LP64__ -typedef long __int64_t; -typedef unsigned long __uint64_t; -#else -#ifndef lint -__extension__ -#endif -/* LONGLONG */ -typedef long long __int64_t; -#ifndef lint -__extension__ -#endif -/* LONGLONG */ -typedef unsigned long long __uint64_t; -#endif - -/* - * Standard type definitions. - */ -typedef __uint32_t __clock_t; /* clock()... */ -#ifndef _STANDALONE -typedef double __double_t; -typedef float __float_t; -#endif -#ifdef __LP64__ -typedef __int64_t __critical_t; -typedef __int64_t __intfptr_t; -typedef __int64_t __intptr_t; -#else -typedef __int32_t __critical_t; -typedef __int32_t __intfptr_t; -typedef __int32_t __intptr_t; -#endif -typedef __int64_t __intmax_t; -typedef __int32_t __int_fast8_t; -typedef __int32_t __int_fast16_t; -typedef __int32_t __int_fast32_t; -typedef __int64_t __int_fast64_t; -typedef __int8_t __int_least8_t; -typedef __int16_t __int_least16_t; -typedef __int32_t __int_least32_t; -typedef __int64_t __int_least64_t; -#ifdef __LP64__ -typedef __int64_t __ptrdiff_t; /* ptr1 - ptr2 */ -typedef __int64_t __register_t; -typedef __int64_t __segsz_t; /* segment size (in pages) */ -typedef __uint64_t __size_t; /* sizeof() */ -typedef __int64_t __ssize_t; /* byte count or error */ -#else -typedef __int32_t __ptrdiff_t; /* ptr1 - ptr2 */ -typedef __int32_t __register_t; -typedef __int32_t __segsz_t; /* segment size (in pages) */ -typedef __uint32_t __size_t; /* sizeof() */ -typedef __int32_t __ssize_t; /* byte count or error */ -#endif -typedef __int64_t __time_t; /* time()... */ -#ifdef __LP64__ -typedef __uint64_t __uintfptr_t; -typedef __uint64_t __uintptr_t; -#else -typedef __uint32_t __uintfptr_t; -typedef __uint32_t __uintptr_t; -#endif -typedef __uint64_t __uintmax_t; -typedef __uint32_t __uint_fast8_t; -typedef __uint32_t __uint_fast16_t; -typedef __uint32_t __uint_fast32_t; -typedef __uint64_t __uint_fast64_t; -typedef __uint8_t __uint_least8_t; -typedef __uint16_t __uint_least16_t; -typedef __uint32_t __uint_least32_t; -typedef __uint64_t __uint_least64_t; -#ifdef __LP64__ -typedef __uint64_t __u_register_t; -typedef __uint64_t __vm_offset_t; -typedef __uint64_t __vm_paddr_t; -typedef __uint64_t __vm_size_t; -#else -typedef __uint32_t __u_register_t; -typedef __uint32_t __vm_offset_t; -#ifdef BOOKE -typedef __uint64_t __vm_paddr_t; -#else -typedef __uint32_t __vm_paddr_t; -#endif -typedef __uint32_t __vm_size_t; -#endif -typedef int ___wchar_t; - -#define __WCHAR_MIN __INT_MIN /* min value for a wchar_t */ -#define __WCHAR_MAX __INT_MAX /* max value for a wchar_t */ - -#endif /* !_MACHINE__TYPES_H_ */ diff --git a/sys/powerpc/include/altivec.h b/sys/powerpc/include/altivec.h deleted file mode 100644 index 581a568b703..00000000000 --- a/sys/powerpc/include/altivec.h +++ /dev/null @@ -1,39 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2008 Nathan Whitehorn - * All rights reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_ALTIVEC_H_ -#define _MACHINE_ALTIVEC_H_ - -#define ALTIVEC_VSCR_NJ 0x00010000 /* Enable non-Java mode */ -#define ALTIVEC_VSCR_SAT 0x00000001 /* Saturation status bit */ - -void enable_vec(struct thread *); -void save_vec(struct thread *); -void save_vec_nodrop(struct thread *); - -#endif /* _MACHINE_ALTIVEC_H_ */ diff --git a/sys/powerpc/include/asm.h b/sys/powerpc/include/asm.h deleted file mode 100644 index 35a8536776e..00000000000 --- a/sys/powerpc/include/asm.h +++ /dev/null @@ -1,267 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: asm.h,v 1.6.18.1 2000/07/25 08:37:14 kleink Exp $ - */ - -#ifndef _MACHINE_ASM_H_ -#define _MACHINE_ASM_H_ - -#include - -#if defined(PIC) && !defined(__powerpc64__) -#define PIC_PROLOGUE XXX -#define PIC_EPILOGUE XXX -#define PIC_PLT(x) x@plt -#ifdef __STDC__ -#define PIC_GOT(x) XXX -#else /* not __STDC__ */ -#define PIC_GOT(x) XXX -#endif /* __STDC__ */ -#else -#define PIC_PROLOGUE -#define PIC_EPILOGUE -#define PIC_PLT(x) x -#define PIC_GOT(x) x -#endif - -#define CNAME(csym) csym -#define ASMNAME(asmsym) asmsym -#ifdef __powerpc64__ -#define HIDENAME(asmsym) __CONCAT(_,asmsym) -#else -#define HIDENAME(asmsym) __CONCAT(.,asmsym) -#endif - -#if !defined(_CALL_ELF) || _CALL_ELF == 1 -#ifdef _KERNEL -/* ELFv1 kernel uses global dot symbols */ -#define DOT_LABEL(name) __CONCAT(.,name) -#define TYPE_ENTRY(name) .size name,24; \ - .type DOT_LABEL(name),@function; \ - .globl DOT_LABEL(name); -#define END_SIZE(name) .size DOT_LABEL(name),.-DOT_LABEL(name); -#else /* !_KERNEL */ -/* ELFv1 user code uses local function entry points */ -#define DOT_LABEL(name) __CONCAT(.L.,name) -#define TYPE_ENTRY(name) .type name,@function; -#define END_SIZE(name) .size name,.-DOT_LABEL(name); -#endif /* _KERNEL */ -#else -/* ELFv2 doesn't have any of this complication */ -#define DOT_LABEL(name) name -#define TYPE_ENTRY(name) .type name,@function; -#define END_SIZE(name) .size name,.-DOT_LABEL(name); -#endif - -#define _GLOBAL(name) \ - .data; \ - .p2align 2; \ - .globl name; \ - name: - -#ifdef __powerpc64__ -#define TOC_NAME_FOR_REF(name) __CONCAT(.L,name) -#define TOC_REF(name) TOC_NAME_FOR_REF(name)@toc -#define TOC_ENTRY(name) \ - .section ".toc","aw"; \ - TOC_NAME_FOR_REF(name): \ - .tc name[TC],name -#endif - -#ifdef __powerpc64__ - -#if !defined(_CALL_ELF) || _CALL_ELF == 1 -#define _ENTRY(name) \ - .section ".text"; \ - .p2align 2; \ - .globl name; \ - .section ".opd","aw"; \ - .p2align 3; \ -name: \ - .quad DOT_LABEL(name),.TOC.@tocbase,0; \ - .previous; \ - .p2align 4; \ - TYPE_ENTRY(name) \ -DOT_LABEL(name): \ - .cfi_startproc -#define _NAKED_ENTRY(name) _ENTRY(name) -#else -#define _ENTRY(name) \ - .text; \ - .p2align 4; \ - .globl name; \ - .type name,@function; \ -name: \ - .cfi_startproc; \ - addis %r2, %r12, (.TOC.-name)@ha; \ - addi %r2, %r2, (.TOC.-name)@l; \ - .localentry name, .-name; - -/* "Naked" function entry. No TOC prologue for ELFv2. */ -#define _NAKED_ENTRY(name) \ - .text; \ - .p2align 4; \ - .globl name; \ - .type name,@function; \ -name: \ - .cfi_startproc; \ - .localentry name, .-name; -#endif - -#define _END(name) \ - .cfi_endproc; \ - .long 0; \ - .byte 0,0,0,0,0,0,0,0; \ - END_SIZE(name) - -#define LOAD_ADDR(reg, var) \ - lis reg, var@highest; \ - ori reg, reg, var@higher; \ - rldicr reg, reg, 32, 31; \ - oris reg, reg, var@h; \ - ori reg, reg, var@l; -#else /* !__powerpc64__ */ -#define _ENTRY(name) \ - .text; \ - .p2align 4; \ - .globl name; \ - .type name,@function; \ -name: \ - .cfi_startproc -#define _END(name) \ - .cfi_endproc; \ - .size name, . - name - -#define _NAKED_ENTRY(name) _ENTRY(name) - -#define LOAD_ADDR(reg, var) \ - lis reg, var@ha; \ - ori reg, reg, var@l; -#endif /* __powerpc64__ */ - -#if defined(PROF) || (defined(_KERNEL) && defined(GPROF)) -# ifdef __powerpc64__ -# define _PROF_PROLOGUE mflr 0; \ - std 3,48(1); \ - std 4,56(1); \ - std 5,64(1); \ - std 0,16(1); \ - stdu 1,-112(1); \ - bl _mcount; \ - nop; \ - ld 0,112+16(1); \ - ld 3,112+48(1); \ - ld 4,112+56(1); \ - ld 5,112+64(1); \ - mtlr 0; \ - addi 1,1,112 -# else -# define _PROF_PROLOGUE mflr 0; stw 0,4(1); bl _mcount -# endif -#else -# define _PROF_PROLOGUE -#endif - -#define ASEND(y) _END(ASMNAME(y)) -#define ASENTRY(y) _ENTRY(ASMNAME(y)); _PROF_PROLOGUE -#define END(y) _END(CNAME(y)) -#define ENTRY(y) _ENTRY(CNAME(y)); _PROF_PROLOGUE -#define GLOBAL(y) _GLOBAL(CNAME(y)) - -#define ASENTRY_NOPROF(y) _ENTRY(ASMNAME(y)) -#define ENTRY_NOPROF(y) _ENTRY(CNAME(y)) - -/* Load NIA without affecting branch prediction */ -#define LOAD_LR_NIA bcl 20, 31, .+4 - -/* - * Magic sequence to return to native endian. - * Overwrites r0 and r11. - * - * The encoding of the instruction "tdi 0, %r0, 0x48" in opposite endian - * happens to be "b . + 8". This is useful because we can write a sequence - * of instructions that can execute in either endian. - * - * Use a sequence of handcoded instructions that switches contexts to the - * instruction following the sequence, but with the correct PSL_LE bit. - * - * The same sequence works for both BE and LE because the xori will flip - * the bit to the other state, and the code only runs when running in the - * wrong endian. - * - * This sequence is NMI-reentrant. - * - * Do not change the length of this sequence without looking at the users, - * this is used in size-constrained places like the reset vector! - */ -#define RETURN_TO_NATIVE_ENDIAN \ - tdi 0, %r0, 0x48; /* Endian swapped: b . + 8 */\ - b 1f; /* Will fall through to here if correct */\ - .long 0xa600607d; /* mfmsr %r11 */\ - .long 0x00000038; /* li %r0, 0 */\ - .long 0x6401617d; /* mtmsrd %r0, 1 (L=1 EE,RI bits only) */\ - .long 0x01006b69; /* xori %r11, %r11, 0x1 (PSL_LE) */\ - .long 0xa602087c; /* mflr %r0 */\ - .long 0x05009f42; /* LOAD_LR_NIA */\ - .long 0xa6037b7d; /* 0: mtsrr1 %r11 */\ - .long 0xa602687d; /* mflr %r11 */\ - .long 0x18006b39; /* addi %r11, %r11, (1f - 0b) */\ - .long 0xa6037a7d; /* mtsrr0 %r11 */\ - .long 0xa603087c; /* mtlr %r0 */\ - .long 0x2400004c; /* rfid */\ -1: /* RETURN_TO_NATIVE_ENDIAN */ - -#define ASMSTR .asciz - -#define RCSID(x) .text; .asciz x - -#undef __FBSDID -#if !defined(lint) && !defined(STRIP_FBSDID) -#define __FBSDID(s) .ident s -#else -#define __FBSDID(s) /* nothing */ -#endif /* not lint and not STRIP_FBSDID */ - -#define WEAK_REFERENCE(sym, alias) \ - .weak alias; \ - .equ alias,sym - -#ifdef __STDC__ -#define WARN_REFERENCES(_sym,_msg) \ - .section .gnu.warning. ## _sym ; .ascii _msg ; .text -#else -#define WARN_REFERENCES(_sym,_msg) \ - .section .gnu.warning./**/_sym ; .ascii _msg ; .text -#endif /* __STDC__ */ - -#endif /* !_MACHINE_ASM_H_ */ diff --git a/sys/powerpc/include/atomic.h b/sys/powerpc/include/atomic.h deleted file mode 100644 index e326f5aaabf..00000000000 --- a/sys/powerpc/include/atomic.h +++ /dev/null @@ -1,1152 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2008 Marcel Moolenaar - * Copyright (c) 2001 Benno Rice - * Copyright (c) 2001 David E. O'Brien - * Copyright (c) 1998 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_ATOMIC_H_ -#define _MACHINE_ATOMIC_H_ - -#ifndef _SYS_CDEFS_H_ -#error this file needs sys/cdefs.h as a prerequisite -#endif - -#include - -#ifndef __powerpc64__ -#include -#endif - -/* - * The __ATOMIC_REL/ACQ() macros provide memory barriers only in conjunction - * with the atomic lXarx/stXcx. sequences below. They are not exposed outside - * of this file. See also Appendix B.2 of Book II of the architecture manual. - * - * Note that not all Book-E processors accept the light-weight sync variant. - * In particular, early models of E500 cores are known to wedge. Bank on all - * 64-bit capable CPUs to accept lwsync properly and pressimize 32-bit CPUs - * to use the heavier-weight sync. - */ - -#ifdef __powerpc64__ -#define mb() __asm __volatile("sync" : : : "memory") -#define rmb() __asm __volatile("lwsync" : : : "memory") -#define wmb() __asm __volatile("lwsync" : : : "memory") -#define __ATOMIC_REL() __asm __volatile("lwsync" : : : "memory") -#define __ATOMIC_ACQ() __asm __volatile("isync" : : : "memory") -#else -#define mb() __asm __volatile("sync" : : : "memory") -#define rmb() __asm __volatile("sync" : : : "memory") -#define wmb() __asm __volatile("sync" : : : "memory") -#define __ATOMIC_REL() __asm __volatile("sync" : : : "memory") -#define __ATOMIC_ACQ() __asm __volatile("isync" : : : "memory") -#endif - -static __inline void -powerpc_lwsync(void) -{ - -#ifdef __powerpc64__ - __asm __volatile("lwsync" : : : "memory"); -#else - __asm __volatile("sync" : : : "memory"); -#endif -} - -/* - * atomic_add(p, v) - * { *p += v; } - */ - -#define __atomic_add_int(p, v, t) \ - __asm __volatile( \ - "1: lwarx %0, 0, %2\n" \ - " add %0, %3, %0\n" \ - " stwcx. %0, 0, %2\n" \ - " bne- 1b\n" \ - : "=&r" (t), "=m" (*p) \ - : "r" (p), "r" (v), "m" (*p) \ - : "cr0", "memory") \ - /* __atomic_add_int */ - -#ifdef __powerpc64__ -#define __atomic_add_long(p, v, t) \ - __asm __volatile( \ - "1: ldarx %0, 0, %2\n" \ - " add %0, %3, %0\n" \ - " stdcx. %0, 0, %2\n" \ - " bne- 1b\n" \ - : "=&r" (t), "=m" (*p) \ - : "r" (p), "r" (v), "m" (*p) \ - : "cr0", "memory") \ - /* __atomic_add_long */ -#else -#define __atomic_add_long(p, v, t) \ - __asm __volatile( \ - "1: lwarx %0, 0, %2\n" \ - " add %0, %3, %0\n" \ - " stwcx. %0, 0, %2\n" \ - " bne- 1b\n" \ - : "=&r" (t), "=m" (*p) \ - : "r" (p), "r" (v), "m" (*p) \ - : "cr0", "memory") \ - /* __atomic_add_long */ -#endif - -#define _ATOMIC_ADD(type) \ - static __inline void \ - atomic_add_##type(volatile u_##type *p, u_##type v) { \ - u_##type t; \ - __atomic_add_##type(p, v, t); \ - } \ - \ - static __inline void \ - atomic_add_acq_##type(volatile u_##type *p, u_##type v) { \ - u_##type t; \ - __atomic_add_##type(p, v, t); \ - __ATOMIC_ACQ(); \ - } \ - \ - static __inline void \ - atomic_add_rel_##type(volatile u_##type *p, u_##type v) { \ - u_##type t; \ - __ATOMIC_REL(); \ - __atomic_add_##type(p, v, t); \ - } \ - /* _ATOMIC_ADD */ - -_ATOMIC_ADD(int) -_ATOMIC_ADD(long) - -#define atomic_add_32 atomic_add_int -#define atomic_add_acq_32 atomic_add_acq_int -#define atomic_add_rel_32 atomic_add_rel_int - -#ifdef __powerpc64__ -#define atomic_add_64 atomic_add_long -#define atomic_add_acq_64 atomic_add_acq_long -#define atomic_add_rel_64 atomic_add_rel_long - -#define atomic_add_ptr atomic_add_long -#define atomic_add_acq_ptr atomic_add_acq_long -#define atomic_add_rel_ptr atomic_add_rel_long -#else -#define atomic_add_ptr atomic_add_int -#define atomic_add_acq_ptr atomic_add_acq_int -#define atomic_add_rel_ptr atomic_add_rel_int -#endif -#undef _ATOMIC_ADD -#undef __atomic_add_long -#undef __atomic_add_int - -/* - * atomic_clear(p, v) - * { *p &= ~v; } - */ - -#define __atomic_clear_int(p, v, t) \ - __asm __volatile( \ - "1: lwarx %0, 0, %2\n" \ - " andc %0, %0, %3\n" \ - " stwcx. %0, 0, %2\n" \ - " bne- 1b\n" \ - : "=&r" (t), "=m" (*p) \ - : "r" (p), "r" (v), "m" (*p) \ - : "cr0", "memory") \ - /* __atomic_clear_int */ - -#ifdef __powerpc64__ -#define __atomic_clear_long(p, v, t) \ - __asm __volatile( \ - "1: ldarx %0, 0, %2\n" \ - " andc %0, %0, %3\n" \ - " stdcx. %0, 0, %2\n" \ - " bne- 1b\n" \ - : "=&r" (t), "=m" (*p) \ - : "r" (p), "r" (v), "m" (*p) \ - : "cr0", "memory") \ - /* __atomic_clear_long */ -#else -#define __atomic_clear_long(p, v, t) \ - __asm __volatile( \ - "1: lwarx %0, 0, %2\n" \ - " andc %0, %0, %3\n" \ - " stwcx. %0, 0, %2\n" \ - " bne- 1b\n" \ - : "=&r" (t), "=m" (*p) \ - : "r" (p), "r" (v), "m" (*p) \ - : "cr0", "memory") \ - /* __atomic_clear_long */ -#endif - -#define _ATOMIC_CLEAR(type) \ - static __inline void \ - atomic_clear_##type(volatile u_##type *p, u_##type v) { \ - u_##type t; \ - __atomic_clear_##type(p, v, t); \ - } \ - \ - static __inline void \ - atomic_clear_acq_##type(volatile u_##type *p, u_##type v) { \ - u_##type t; \ - __atomic_clear_##type(p, v, t); \ - __ATOMIC_ACQ(); \ - } \ - \ - static __inline void \ - atomic_clear_rel_##type(volatile u_##type *p, u_##type v) { \ - u_##type t; \ - __ATOMIC_REL(); \ - __atomic_clear_##type(p, v, t); \ - } \ - /* _ATOMIC_CLEAR */ - -_ATOMIC_CLEAR(int) -_ATOMIC_CLEAR(long) - -#define atomic_clear_32 atomic_clear_int -#define atomic_clear_acq_32 atomic_clear_acq_int -#define atomic_clear_rel_32 atomic_clear_rel_int - -#ifdef __powerpc64__ -#define atomic_clear_64 atomic_clear_long -#define atomic_clear_acq_64 atomic_clear_acq_long -#define atomic_clear_rel_64 atomic_clear_rel_long - -#define atomic_clear_ptr atomic_clear_long -#define atomic_clear_acq_ptr atomic_clear_acq_long -#define atomic_clear_rel_ptr atomic_clear_rel_long -#else -#define atomic_clear_ptr atomic_clear_int -#define atomic_clear_acq_ptr atomic_clear_acq_int -#define atomic_clear_rel_ptr atomic_clear_rel_int -#endif -#undef _ATOMIC_CLEAR -#undef __atomic_clear_long -#undef __atomic_clear_int - -/* - * atomic_cmpset(p, o, n) - */ -/* TODO -- see below */ - -/* - * atomic_load_acq(p) - */ -/* TODO -- see below */ - -/* - * atomic_readandclear(p) - */ -/* TODO -- see below */ - -/* - * atomic_set(p, v) - * { *p |= v; } - */ - -#define __atomic_set_int(p, v, t) \ - __asm __volatile( \ - "1: lwarx %0, 0, %2\n" \ - " or %0, %3, %0\n" \ - " stwcx. %0, 0, %2\n" \ - " bne- 1b\n" \ - : "=&r" (t), "=m" (*p) \ - : "r" (p), "r" (v), "m" (*p) \ - : "cr0", "memory") \ - /* __atomic_set_int */ - -#ifdef __powerpc64__ -#define __atomic_set_long(p, v, t) \ - __asm __volatile( \ - "1: ldarx %0, 0, %2\n" \ - " or %0, %3, %0\n" \ - " stdcx. %0, 0, %2\n" \ - " bne- 1b\n" \ - : "=&r" (t), "=m" (*p) \ - : "r" (p), "r" (v), "m" (*p) \ - : "cr0", "memory") \ - /* __atomic_set_long */ -#else -#define __atomic_set_long(p, v, t) \ - __asm __volatile( \ - "1: lwarx %0, 0, %2\n" \ - " or %0, %3, %0\n" \ - " stwcx. %0, 0, %2\n" \ - " bne- 1b\n" \ - : "=&r" (t), "=m" (*p) \ - : "r" (p), "r" (v), "m" (*p) \ - : "cr0", "memory") \ - /* __atomic_set_long */ -#endif - -#define _ATOMIC_SET(type) \ - static __inline void \ - atomic_set_##type(volatile u_##type *p, u_##type v) { \ - u_##type t; \ - __atomic_set_##type(p, v, t); \ - } \ - \ - static __inline void \ - atomic_set_acq_##type(volatile u_##type *p, u_##type v) { \ - u_##type t; \ - __atomic_set_##type(p, v, t); \ - __ATOMIC_ACQ(); \ - } \ - \ - static __inline void \ - atomic_set_rel_##type(volatile u_##type *p, u_##type v) { \ - u_##type t; \ - __ATOMIC_REL(); \ - __atomic_set_##type(p, v, t); \ - } \ - /* _ATOMIC_SET */ - -_ATOMIC_SET(int) -_ATOMIC_SET(long) - -#define atomic_set_32 atomic_set_int -#define atomic_set_acq_32 atomic_set_acq_int -#define atomic_set_rel_32 atomic_set_rel_int - -#ifdef __powerpc64__ -#define atomic_set_64 atomic_set_long -#define atomic_set_acq_64 atomic_set_acq_long -#define atomic_set_rel_64 atomic_set_rel_long - -#define atomic_set_ptr atomic_set_long -#define atomic_set_acq_ptr atomic_set_acq_long -#define atomic_set_rel_ptr atomic_set_rel_long -#else -#define atomic_set_ptr atomic_set_int -#define atomic_set_acq_ptr atomic_set_acq_int -#define atomic_set_rel_ptr atomic_set_rel_int -#endif -#undef _ATOMIC_SET -#undef __atomic_set_long -#undef __atomic_set_int - -/* - * atomic_subtract(p, v) - * { *p -= v; } - */ - -#define __atomic_subtract_int(p, v, t) \ - __asm __volatile( \ - "1: lwarx %0, 0, %2\n" \ - " subf %0, %3, %0\n" \ - " stwcx. %0, 0, %2\n" \ - " bne- 1b\n" \ - : "=&r" (t), "=m" (*p) \ - : "r" (p), "r" (v), "m" (*p) \ - : "cr0", "memory") \ - /* __atomic_subtract_int */ - -#ifdef __powerpc64__ -#define __atomic_subtract_long(p, v, t) \ - __asm __volatile( \ - "1: ldarx %0, 0, %2\n" \ - " subf %0, %3, %0\n" \ - " stdcx. %0, 0, %2\n" \ - " bne- 1b\n" \ - : "=&r" (t), "=m" (*p) \ - : "r" (p), "r" (v), "m" (*p) \ - : "cr0", "memory") \ - /* __atomic_subtract_long */ -#else -#define __atomic_subtract_long(p, v, t) \ - __asm __volatile( \ - "1: lwarx %0, 0, %2\n" \ - " subf %0, %3, %0\n" \ - " stwcx. %0, 0, %2\n" \ - " bne- 1b\n" \ - : "=&r" (t), "=m" (*p) \ - : "r" (p), "r" (v), "m" (*p) \ - : "cr0", "memory") \ - /* __atomic_subtract_long */ -#endif - -#define _ATOMIC_SUBTRACT(type) \ - static __inline void \ - atomic_subtract_##type(volatile u_##type *p, u_##type v) { \ - u_##type t; \ - __atomic_subtract_##type(p, v, t); \ - } \ - \ - static __inline void \ - atomic_subtract_acq_##type(volatile u_##type *p, u_##type v) { \ - u_##type t; \ - __atomic_subtract_##type(p, v, t); \ - __ATOMIC_ACQ(); \ - } \ - \ - static __inline void \ - atomic_subtract_rel_##type(volatile u_##type *p, u_##type v) { \ - u_##type t; \ - __ATOMIC_REL(); \ - __atomic_subtract_##type(p, v, t); \ - } \ - /* _ATOMIC_SUBTRACT */ - -_ATOMIC_SUBTRACT(int) -_ATOMIC_SUBTRACT(long) - -#define atomic_subtract_32 atomic_subtract_int -#define atomic_subtract_acq_32 atomic_subtract_acq_int -#define atomic_subtract_rel_32 atomic_subtract_rel_int - -#ifdef __powerpc64__ -#define atomic_subtract_64 atomic_subtract_long -#define atomic_subtract_acq_64 atomic_subract_acq_long -#define atomic_subtract_rel_64 atomic_subtract_rel_long - -#define atomic_subtract_ptr atomic_subtract_long -#define atomic_subtract_acq_ptr atomic_subtract_acq_long -#define atomic_subtract_rel_ptr atomic_subtract_rel_long -#else -#define atomic_subtract_ptr atomic_subtract_int -#define atomic_subtract_acq_ptr atomic_subtract_acq_int -#define atomic_subtract_rel_ptr atomic_subtract_rel_int -#endif -#undef _ATOMIC_SUBTRACT -#undef __atomic_subtract_long -#undef __atomic_subtract_int - -/* - * atomic_store_rel(p, v) - */ -/* TODO -- see below */ - -/* - * Old/original implementations that still need revisiting. - */ - -static __inline u_int -atomic_readandclear_int(volatile u_int *addr) -{ - u_int result,temp; - - __asm __volatile ( - "\tsync\n" /* drain writes */ - "1:\tlwarx %0, 0, %3\n\t" /* load old value */ - "li %1, 0\n\t" /* load new value */ - "stwcx. %1, 0, %3\n\t" /* attempt to store */ - "bne- 1b\n\t" /* spin if failed */ - : "=&r"(result), "=&r"(temp), "=m" (*addr) - : "r" (addr), "m" (*addr) - : "cr0", "memory"); - - return (result); -} - -#ifdef __powerpc64__ -static __inline u_long -atomic_readandclear_long(volatile u_long *addr) -{ - u_long result,temp; - - __asm __volatile ( - "\tsync\n" /* drain writes */ - "1:\tldarx %0, 0, %3\n\t" /* load old value */ - "li %1, 0\n\t" /* load new value */ - "stdcx. %1, 0, %3\n\t" /* attempt to store */ - "bne- 1b\n\t" /* spin if failed */ - : "=&r"(result), "=&r"(temp), "=m" (*addr) - : "r" (addr), "m" (*addr) - : "cr0", "memory"); - - return (result); -} -#endif - -#define atomic_readandclear_32 atomic_readandclear_int - -#ifdef __powerpc64__ -#define atomic_readandclear_64 atomic_readandclear_long - -#define atomic_readandclear_ptr atomic_readandclear_long -#else -static __inline u_long -atomic_readandclear_long(volatile u_long *addr) -{ - - return ((u_long)atomic_readandclear_int((volatile u_int *)addr)); -} - -#define atomic_readandclear_ptr atomic_readandclear_int -#endif - -/* - * We assume that a = b will do atomic loads and stores. - */ -#define ATOMIC_STORE_LOAD(TYPE) \ -static __inline u_##TYPE \ -atomic_load_acq_##TYPE(volatile u_##TYPE *p) \ -{ \ - u_##TYPE v; \ - \ - v = *p; \ - powerpc_lwsync(); \ - return (v); \ -} \ - \ -static __inline void \ -atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v) \ -{ \ - \ - powerpc_lwsync(); \ - *p = v; \ -} - -ATOMIC_STORE_LOAD(int) - -#define atomic_load_acq_32 atomic_load_acq_int -#define atomic_store_rel_32 atomic_store_rel_int - -#ifdef __powerpc64__ -ATOMIC_STORE_LOAD(long) - -#define atomic_load_acq_64 atomic_load_acq_long -#define atomic_store_rel_64 atomic_store_rel_long - -#define atomic_load_acq_ptr atomic_load_acq_long -#define atomic_store_rel_ptr atomic_store_rel_long -#else -static __inline u_long -atomic_load_acq_long(volatile u_long *addr) -{ - - return ((u_long)atomic_load_acq_int((volatile u_int *)addr)); -} - -static __inline void -atomic_store_rel_long(volatile u_long *addr, u_long val) -{ - - atomic_store_rel_int((volatile u_int *)addr, (u_int)val); -} - -#define atomic_load_acq_ptr atomic_load_acq_int -#define atomic_store_rel_ptr atomic_store_rel_int -#endif -#undef ATOMIC_STORE_LOAD - -/* - * Atomically compare the value stored at *p with cmpval and if the - * two values are equal, update the value of *p with newval. Returns - * zero if the compare failed, nonzero otherwise. - */ -#ifdef ISA_206_ATOMICS -static __inline int -atomic_cmpset_char(volatile u_char *p, u_char cmpval, u_char newval) -{ - int ret; - - __asm __volatile ( - "1:\tlbarx %0, 0, %2\n\t" /* load old value */ - "cmplw %3, %0\n\t" /* compare */ - "bne- 2f\n\t" /* exit if not equal */ - "stbcx. %4, 0, %2\n\t" /* attempt to store */ - "bne- 1b\n\t" /* spin if failed */ - "li %0, 1\n\t" /* success - retval = 1 */ - "b 3f\n\t" /* we've succeeded */ - "2:\n\t" - "stbcx. %0, 0, %2\n\t" /* clear reservation (74xx) */ - "li %0, 0\n\t" /* failure - retval = 0 */ - "3:\n\t" - : "=&r" (ret), "=m" (*p) - : "r" (p), "r" (cmpval), "r" (newval), "m" (*p) - : "cr0", "memory"); - - return (ret); -} - -static __inline int -atomic_cmpset_short(volatile u_short *p, u_short cmpval, u_short newval) -{ - int ret; - - __asm __volatile ( - "1:\tlharx %0, 0, %2\n\t" /* load old value */ - "cmplw %3, %0\n\t" /* compare */ - "bne- 2f\n\t" /* exit if not equal */ - "sthcx. %4, 0, %2\n\t" /* attempt to store */ - "bne- 1b\n\t" /* spin if failed */ - "li %0, 1\n\t" /* success - retval = 1 */ - "b 3f\n\t" /* we've succeeded */ - "2:\n\t" - "sthcx. %0, 0, %2\n\t" /* clear reservation (74xx) */ - "li %0, 0\n\t" /* failure - retval = 0 */ - "3:\n\t" - : "=&r" (ret), "=m" (*p) - : "r" (p), "r" (cmpval), "r" (newval), "m" (*p) - : "cr0", "memory"); - - return (ret); -} -#else -static __inline int -atomic_cmpset_masked(uint32_t *p, uint32_t cmpval, uint32_t newval, - uint32_t mask) -{ - int ret; - uint32_t tmp; - - __asm __volatile ( - "1:\tlwarx %2, 0, %3\n\t" /* load old value */ - "and %0, %2, %7\n\t" - "cmplw %4, %0\n\t" /* compare */ - "bne- 2f\n\t" /* exit if not equal */ - "andc %2, %2, %7\n\t" - "or %2, %2, %5\n\t" - "stwcx. %2, 0, %3\n\t" /* attempt to store */ - "bne- 1b\n\t" /* spin if failed */ - "li %0, 1\n\t" /* success - retval = 1 */ - "b 3f\n\t" /* we've succeeded */ - "2:\n\t" - "stwcx. %2, 0, %3\n\t" /* clear reservation (74xx) */ - "li %0, 0\n\t" /* failure - retval = 0 */ - "3:\n\t" - : "=&r" (ret), "=m" (*p), "+&r" (tmp) - : "r" (p), "r" (cmpval), "r" (newval), "m" (*p), - "r" (mask) - : "cr0", "memory"); - - return (ret); -} - -#define _atomic_cmpset_masked_word(a,o,v,m) atomic_cmpset_masked(a, o, v, m) -#endif - -static __inline int -atomic_cmpset_int(volatile u_int* p, u_int cmpval, u_int newval) -{ - int ret; - - __asm __volatile ( - "1:\tlwarx %0, 0, %2\n\t" /* load old value */ - "cmplw %3, %0\n\t" /* compare */ - "bne- 2f\n\t" /* exit if not equal */ - "stwcx. %4, 0, %2\n\t" /* attempt to store */ - "bne- 1b\n\t" /* spin if failed */ - "li %0, 1\n\t" /* success - retval = 1 */ - "b 3f\n\t" /* we've succeeded */ - "2:\n\t" - "stwcx. %0, 0, %2\n\t" /* clear reservation (74xx) */ - "li %0, 0\n\t" /* failure - retval = 0 */ - "3:\n\t" - : "=&r" (ret), "=m" (*p) - : "r" (p), "r" (cmpval), "r" (newval), "m" (*p) - : "cr0", "memory"); - - return (ret); -} -static __inline int -atomic_cmpset_long(volatile u_long* p, u_long cmpval, u_long newval) -{ - int ret; - - __asm __volatile ( - #ifdef __powerpc64__ - "1:\tldarx %0, 0, %2\n\t" /* load old value */ - "cmpld %3, %0\n\t" /* compare */ - "bne- 2f\n\t" /* exit if not equal */ - "stdcx. %4, 0, %2\n\t" /* attempt to store */ - #else - "1:\tlwarx %0, 0, %2\n\t" /* load old value */ - "cmplw %3, %0\n\t" /* compare */ - "bne- 2f\n\t" /* exit if not equal */ - "stwcx. %4, 0, %2\n\t" /* attempt to store */ - #endif - "bne- 1b\n\t" /* spin if failed */ - "li %0, 1\n\t" /* success - retval = 1 */ - "b 3f\n\t" /* we've succeeded */ - "2:\n\t" - #ifdef __powerpc64__ - "stdcx. %0, 0, %2\n\t" /* clear reservation (74xx) */ - #else - "stwcx. %0, 0, %2\n\t" /* clear reservation (74xx) */ - #endif - "li %0, 0\n\t" /* failure - retval = 0 */ - "3:\n\t" - : "=&r" (ret), "=m" (*p) - : "r" (p), "r" (cmpval), "r" (newval), "m" (*p) - : "cr0", "memory"); - - return (ret); -} - -#define ATOMIC_CMPSET_ACQ_REL(type) \ - static __inline int \ - atomic_cmpset_acq_##type(volatile u_##type *p, \ - u_##type cmpval, u_##type newval)\ - {\ - u_##type retval; \ - retval = atomic_cmpset_##type(p, cmpval, newval);\ - __ATOMIC_ACQ();\ - return (retval);\ - }\ - static __inline int \ - atomic_cmpset_rel_##type(volatile u_##type *p, \ - u_##type cmpval, u_##type newval)\ - {\ - __ATOMIC_REL();\ - return (atomic_cmpset_##type(p, cmpval, newval));\ - }\ - struct hack - -ATOMIC_CMPSET_ACQ_REL(int); -ATOMIC_CMPSET_ACQ_REL(long); - -#ifdef ISA_206_ATOMICS -#define atomic_cmpset_8 atomic_cmpset_char -#endif -#define atomic_cmpset_acq_8 atomic_cmpset_acq_char -#define atomic_cmpset_rel_8 atomic_cmpset_rel_char - -#ifdef ISA_206_ATOMICS -#define atomic_cmpset_16 atomic_cmpset_short -#endif -#define atomic_cmpset_acq_16 atomic_cmpset_acq_short -#define atomic_cmpset_rel_16 atomic_cmpset_rel_short - -#define atomic_cmpset_32 atomic_cmpset_int -#define atomic_cmpset_acq_32 atomic_cmpset_acq_int -#define atomic_cmpset_rel_32 atomic_cmpset_rel_int - -#ifdef __powerpc64__ -#define atomic_cmpset_64 atomic_cmpset_long -#define atomic_cmpset_acq_64 atomic_cmpset_acq_long -#define atomic_cmpset_rel_64 atomic_cmpset_rel_long - -#define atomic_cmpset_ptr atomic_cmpset_long -#define atomic_cmpset_acq_ptr atomic_cmpset_acq_long -#define atomic_cmpset_rel_ptr atomic_cmpset_rel_long -#else -#define atomic_cmpset_ptr atomic_cmpset_int -#define atomic_cmpset_acq_ptr atomic_cmpset_acq_int -#define atomic_cmpset_rel_ptr atomic_cmpset_rel_int -#endif - -/* - * Atomically compare the value stored at *p with *cmpval and if the - * two values are equal, update the value of *p with newval. Returns - * zero if the compare failed and sets *cmpval to the read value from *p, - * nonzero otherwise. - */ -#ifdef ISA_206_ATOMICS -static __inline int -atomic_fcmpset_char(volatile u_char *p, u_char *cmpval, u_char newval) -{ - int ret; - - __asm __volatile ( - "lbarx %0, 0, %3\n\t" /* load old value */ - "cmplw %4, %0\n\t" /* compare */ - "bne- 1f\n\t" /* exit if not equal */ - "stbcx. %5, 0, %3\n\t" /* attempt to store */ - "bne- 1f\n\t" /* exit if failed */ - "li %0, 1\n\t" /* success - retval = 1 */ - "b 2f\n\t" /* we've succeeded */ - "1:\n\t" - "stbcx. %0, 0, %3\n\t" /* clear reservation (74xx) */ - "stwx %0, 0, %7\n\t" - "li %0, 0\n\t" /* failure - retval = 0 */ - "2:\n\t" - : "=&r" (ret), "=m" (*p), "=m" (*cmpval) - : "r" (p), "r" (*cmpval), "r" (newval), "m" (*p), "r"(cmpval) - : "cr0", "memory"); - - return (ret); -} - -static __inline int -atomic_fcmpset_short(volatile u_short *p, u_short *cmpval, u_short newval) -{ - int ret; - - __asm __volatile ( - "lharx %0, 0, %3\n\t" /* load old value */ - "cmplw %4, %0\n\t" /* compare */ - "bne- 1f\n\t" /* exit if not equal */ - "sthcx. %5, 0, %3\n\t" /* attempt to store */ - "bne- 1f\n\t" /* exit if failed */ - "li %0, 1\n\t" /* success - retval = 1 */ - "b 2f\n\t" /* we've succeeded */ - "1:\n\t" - "sthcx. %0, 0, %3\n\t" /* clear reservation (74xx) */ - "stwx %0, 0, %7\n\t" - "li %0, 0\n\t" /* failure - retval = 0 */ - "2:\n\t" - : "=&r" (ret), "=m" (*p), "=m" (*cmpval) - : "r" (p), "r" (*cmpval), "r" (newval), "m" (*p), "r"(cmpval) - : "cr0", "memory"); - - return (ret); -} -#endif /* ISA_206_ATOMICS */ - -static __inline int -atomic_fcmpset_int(volatile u_int *p, u_int *cmpval, u_int newval) -{ - int ret; - - __asm __volatile ( - "lwarx %0, 0, %3\n\t" /* load old value */ - "cmplw %4, %0\n\t" /* compare */ - "bne- 1f\n\t" /* exit if not equal */ - "stwcx. %5, 0, %3\n\t" /* attempt to store */ - "bne- 1f\n\t" /* exit if failed */ - "li %0, 1\n\t" /* success - retval = 1 */ - "b 2f\n\t" /* we've succeeded */ - "1:\n\t" - "stwcx. %0, 0, %3\n\t" /* clear reservation (74xx) */ - "stwx %0, 0, %7\n\t" - "li %0, 0\n\t" /* failure - retval = 0 */ - "2:\n\t" - : "=&r" (ret), "=m" (*p), "=m" (*cmpval) - : "r" (p), "r" (*cmpval), "r" (newval), "m" (*p), "r"(cmpval) - : "cr0", "memory"); - - return (ret); -} -static __inline int -atomic_fcmpset_long(volatile u_long *p, u_long *cmpval, u_long newval) -{ - int ret; - - __asm __volatile ( - #ifdef __powerpc64__ - "ldarx %0, 0, %3\n\t" /* load old value */ - "cmpld %4, %0\n\t" /* compare */ - "bne- 1f\n\t" /* exit if not equal */ - "stdcx. %5, 0, %3\n\t" /* attempt to store */ - #else - "lwarx %0, 0, %3\n\t" /* load old value */ - "cmplw %4, %0\n\t" /* compare */ - "bne- 1f\n\t" /* exit if not equal */ - "stwcx. %5, 0, %3\n\t" /* attempt to store */ - #endif - "bne- 1f\n\t" /* exit if failed */ - "li %0, 1\n\t" /* success - retval = 1 */ - "b 2f\n\t" /* we've succeeded */ - "1:\n\t" - #ifdef __powerpc64__ - "stdcx. %0, 0, %3\n\t" /* clear reservation (74xx) */ - "stdx %0, 0, %7\n\t" - #else - "stwcx. %0, 0, %3\n\t" /* clear reservation (74xx) */ - "stwx %0, 0, %7\n\t" - #endif - "li %0, 0\n\t" /* failure - retval = 0 */ - "2:\n\t" - : "=&r" (ret), "=m" (*p), "=m" (*cmpval) - : "r" (p), "r" (*cmpval), "r" (newval), "m" (*p), "r"(cmpval) - : "cr0", "memory"); - - return (ret); -} - -#define ATOMIC_FCMPSET_ACQ_REL(type) \ - static __inline int \ - atomic_fcmpset_acq_##type(volatile u_##type *p, \ - u_##type *cmpval, u_##type newval)\ - {\ - u_##type retval; \ - retval = atomic_fcmpset_##type(p, cmpval, newval);\ - __ATOMIC_ACQ();\ - return (retval);\ - }\ - static __inline int \ - atomic_fcmpset_rel_##type(volatile u_##type *p, \ - u_##type *cmpval, u_##type newval)\ - {\ - __ATOMIC_REL();\ - return (atomic_fcmpset_##type(p, cmpval, newval));\ - }\ - struct hack - -ATOMIC_FCMPSET_ACQ_REL(int); -ATOMIC_FCMPSET_ACQ_REL(long); - -#ifdef ISA_206_ATOMICS -#define atomic_fcmpset_8 atomic_fcmpset_char -#endif -#define atomic_fcmpset_acq_8 atomic_fcmpset_acq_char -#define atomic_fcmpset_rel_8 atomic_fcmpset_rel_char - -#ifdef ISA_206_ATOMICS -#define atomic_fcmpset_16 atomic_fcmpset_short -#endif -#define atomic_fcmpset_acq_16 atomic_fcmpset_acq_short -#define atomic_fcmpset_rel_16 atomic_fcmpset_rel_short - -#define atomic_fcmpset_32 atomic_fcmpset_int -#define atomic_fcmpset_acq_32 atomic_fcmpset_acq_int -#define atomic_fcmpset_rel_32 atomic_fcmpset_rel_int - -#ifdef __powerpc64__ -#define atomic_fcmpset_64 atomic_fcmpset_long -#define atomic_fcmpset_acq_64 atomic_fcmpset_acq_long -#define atomic_fcmpset_rel_64 atomic_fcmpset_rel_long - -#define atomic_fcmpset_ptr atomic_fcmpset_long -#define atomic_fcmpset_acq_ptr atomic_fcmpset_acq_long -#define atomic_fcmpset_rel_ptr atomic_fcmpset_rel_long -#else -#define atomic_fcmpset_ptr atomic_fcmpset_int -#define atomic_fcmpset_acq_ptr atomic_fcmpset_acq_int -#define atomic_fcmpset_rel_ptr atomic_fcmpset_rel_int -#endif - -static __inline u_int -atomic_fetchadd_int(volatile u_int *p, u_int v) -{ - u_int value; - - do { - value = *p; - } while (!atomic_cmpset_int(p, value, value + v)); - return (value); -} - -static __inline u_long -atomic_fetchadd_long(volatile u_long *p, u_long v) -{ - u_long value; - - do { - value = *p; - } while (!atomic_cmpset_long(p, value, value + v)); - return (value); -} - -static __inline u_int -atomic_swap_32(volatile u_int *p, u_int v) -{ - u_int prev; - - __asm __volatile( - "1: lwarx %0,0,%2\n" - " stwcx. %3,0,%2\n" - " bne- 1b\n" - : "=&r" (prev), "+m" (*(volatile u_int *)p) - : "r" (p), "r" (v) - : "cr0", "memory"); - - return (prev); -} - -#ifdef __powerpc64__ -static __inline u_long -atomic_swap_64(volatile u_long *p, u_long v) -{ - u_long prev; - - __asm __volatile( - "1: ldarx %0,0,%2\n" - " stdcx. %3,0,%2\n" - " bne- 1b\n" - : "=&r" (prev), "+m" (*(volatile u_long *)p) - : "r" (p), "r" (v) - : "cr0", "memory"); - - return (prev); -} -#endif - -#define atomic_fetchadd_32 atomic_fetchadd_int -#define atomic_swap_int atomic_swap_32 - -#ifdef __powerpc64__ -#define atomic_fetchadd_64 atomic_fetchadd_long -#define atomic_swap_long atomic_swap_64 -#define atomic_swap_ptr atomic_swap_64 -#else -#define atomic_swap_long(p,v) atomic_swap_32((volatile u_int *)(p), v) -#define atomic_swap_ptr(p,v) atomic_swap_32((volatile u_int *)(p), v) -#endif - -static __inline int -atomic_testandset_int(volatile u_int *p, u_int v) -{ - u_int m = (1u << (v & 0x1f)); - u_int res; - u_int tmp; - - __asm __volatile( - "1: lwarx %0,0,%3\n" - " and %1,%0,%4\n" - " or %0,%0,%4\n" - " stwcx. %0,0,%3\n" - " bne- 1b\n" - : "=&r"(tmp), "=&r"(res), "+m"(*p) - : "r"(p), "r"(m) - : "cr0", "memory"); - - return (res != 0); -} - -static __inline int -atomic_testandclear_int(volatile u_int *p, u_int v) -{ - u_int m = (1u << (v & 0x1f)); - u_int res; - u_int tmp; - - __asm __volatile( - "1: lwarx %0,0,%3\n" - " and %1,%0,%4\n" - " andc %0,%0,%4\n" - " stwcx. %0,0,%3\n" - " bne- 1b\n" - : "=&r"(tmp), "=&r"(res), "+m"(*p) - : "r"(p), "r"(m) - : "cr0", "memory"); - - return (res != 0); -} - -#ifdef __powerpc64__ -static __inline int -atomic_testandset_long(volatile u_long *p, u_int v) -{ - u_long m = (1ul << (v & 0x3f)); - u_long res; - u_long tmp; - - __asm __volatile( - "1: ldarx %0,0,%3\n" - " and %1,%0,%4\n" - " or %0,%0,%4\n" - " stdcx. %0,0,%3\n" - " bne- 1b\n" - : "=&r"(tmp), "=&r"(res), "+m"(*(volatile u_long *)p) - : "r"(p), "r"(m) - : "cr0", "memory"); - - return (res != 0); -} - -static __inline int -atomic_testandclear_long(volatile u_long *p, u_int v) -{ - u_long m = (1ul << (v & 0x3f)); - u_long res; - u_long tmp; - - __asm __volatile( - "1: ldarx %0,0,%3\n" - " and %1,%0,%4\n" - " andc %0,%0,%4\n" - " stdcx. %0,0,%3\n" - " bne- 1b\n" - : "=&r"(tmp), "=&r"(res), "+m"(*p) - : "r"(p), "r"(m) - : "cr0", "memory"); - - return (res != 0); -} -#else -static __inline int -atomic_testandset_long(volatile u_long *p, u_int v) -{ - return (atomic_testandset_int((volatile u_int *)p, v)); -} - -static __inline int -atomic_testandclear_long(volatile u_long *p, u_int v) -{ - return (atomic_testandclear_int((volatile u_int *)p, v)); -} -#endif - -#define atomic_testandclear_32 atomic_testandclear_int -#define atomic_testandset_32 atomic_testandset_int - -static __inline int -atomic_testandset_acq_long(volatile u_long *p, u_int v) -{ - u_int a = atomic_testandset_long(p, v); - __ATOMIC_ACQ(); - return (a); -} - -#define atomic_testandclear_int atomic_testandclear_int -#define atomic_testandset_int atomic_testandset_int -#define atomic_testandclear_long atomic_testandclear_long -#define atomic_testandset_long atomic_testandset_long -#define atomic_testandset_acq_long atomic_testandset_acq_long - -static __inline void -atomic_thread_fence_acq(void) -{ - - powerpc_lwsync(); -} - -static __inline void -atomic_thread_fence_rel(void) -{ - - powerpc_lwsync(); -} - -static __inline void -atomic_thread_fence_acq_rel(void) -{ - - powerpc_lwsync(); -} - -static __inline void -atomic_thread_fence_seq_cst(void) -{ - - __asm __volatile("sync" : : : "memory"); -} - -#ifndef ISA_206_ATOMICS -#include -#define atomic_cmpset_char atomic_cmpset_8 -#define atomic_cmpset_short atomic_cmpset_16 -#define atomic_fcmpset_char atomic_fcmpset_8 -#define atomic_fcmpset_short atomic_fcmpset_16 -#endif - -/* These need sys/_atomic_subword.h on non-ISA-2.06-atomic platforms. */ -ATOMIC_CMPSET_ACQ_REL(char); -ATOMIC_CMPSET_ACQ_REL(short); - -ATOMIC_FCMPSET_ACQ_REL(char); -ATOMIC_FCMPSET_ACQ_REL(short); - -#undef __ATOMIC_REL -#undef __ATOMIC_ACQ - -#endif /* ! _MACHINE_ATOMIC_H_ */ diff --git a/sys/powerpc/include/bat.h b/sys/powerpc/include/bat.h deleted file mode 100644 index e6f1ab72f51..00000000000 --- a/sys/powerpc/include/bat.h +++ /dev/null @@ -1,167 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause AND BSD-4-Clause - * - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Jason R. Thorpe. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: bat.h,v 1.2 1999/12/18 01:36:06 thorpej Exp $ - */ - -#ifndef _MACHINE_BAT_H_ -#define _MACHINE_BAT_H_ - -#ifndef LOCORE -struct bat { - u_int32_t batu; - u_int32_t batl; -}; -#endif - -/* Lower BAT bits (all but PowerPC 601): */ -#define BAT_PBS 0xfffe0000 /* physical block start */ -#define BAT_W 0x00000040 /* 1 = write-through, 0 = write-back */ -#define BAT_I 0x00000020 /* cache inhibit */ -#define BAT_M 0x00000010 /* memory coherency enable */ -#define BAT_G 0x00000008 /* guarded region */ - -#define BAT_PP_NONE 0x00000000 /* no access permission */ -#define BAT_PP_RO_S 0x00000001 /* read-only (soft) */ -#define BAT_PP_RW 0x00000002 /* read/write */ -#define BAT_PP_RO 0x00000003 /* read-only */ - -/* Upper BAT bits (all but PowerPC 601): */ -#define BAT_EBS 0xfffe0000 /* effective block start */ -#define BAT_BL 0x00001ffc /* block length */ -#define BAT_Vs 0x00000002 /* valid in supervisor mode */ -#define BAT_Vu 0x00000001 /* valid in user mode */ - -#define BAT_V (BAT_Vs|BAT_Vu) - -/* Block Length encoding (all but PowerPC 601): */ -#define BAT_BL_128K 0x00000000 -#define BAT_BL_256K 0x00000004 -#define BAT_BL_512K 0x0000000c -#define BAT_BL_1M 0x0000001c -#define BAT_BL_2M 0x0000003c -#define BAT_BL_4M 0x0000007c -#define BAT_BL_8M 0x000000fc -#define BAT_BL_16M 0x000001fc -#define BAT_BL_32M 0x000003fc -#define BAT_BL_64M 0x000007fc -#define BAT_BL_128M 0x00000ffc -#define BAT_BL_256M 0x00001ffc - -#define BATU(va, len, v) \ - (((va) & BAT_EBS) | ((len) & BAT_BL) | ((v) & BAT_V)) - -#define BATL(pa, wimg, pp) \ - (((pa) & BAT_PBS) | (wimg) | (pp)) - -/* Lower BAT bits (PowerPC 601): */ -#define BAT601_PBN 0xfffe0000 /* physical block number */ -#define BAT601_V 0x00000040 /* valid */ -#define BAT601_BSM 0x0000003f /* block size mask */ - -/* Upper BAT bits (PowerPC 601): */ -#define BAT601_BLPI 0xfffe0000 /* block logical page index */ -#define BAT601_W 0x00000040 /* 1 = write-through, 0 = write-back */ -#define BAT601_I 0x00000020 /* cache inhibit */ -#define BAT601_M 0x00000010 /* memory coherency enable */ -#define BAT601_Ks 0x00000008 /* key-supervisor */ -#define BAT601_Ku 0x00000004 /* key-user */ - -/* - * Permission bits on the PowerPC 601 are modified by the appropriate - * Key bit: - * - * Key PP Access - * 0 NONE read/write - * 0 RO_S read/write - * 0 RW read/write - * 0 RO read-only - * - * 1 NONE none - * 1 RO_S read-only - * 1 RW read/write - * 1 RO read-only - */ -#define BAT601_PP_NONE 0x00000000 /* no access permission */ -#define BAT601_PP_RO_S 0x00000001 /* read-only (soft) */ -#define BAT601_PP_RW 0x00000002 /* read/write */ -#define BAT601_PP_RO 0x00000003 /* read-only */ - -/* Block Size Mask encoding (PowerPC 601): */ -#define BAT601_BSM_128K 0x00000000 -#define BAT601_BSM_256K 0x00000001 -#define BAT601_BSM_512K 0x00000003 -#define BAT601_BSM_1M 0x00000007 -#define BAT601_BSM_2M 0x0000000f -#define BAT601_BSM_4M 0x0000001f -#define BAT601_BSM_8M 0x0000003f - -#define BATU601(va, wim, key, pp) \ - (((va) & BAT601_BLPI) | (wim) | (key) | (pp)) - -#define BATL601(pa, size, v) \ - (((pa) & BAT601_PBN) | (v) | (size)) - -#if defined(_KERNEL) && !defined(LOCORE) -extern struct bat battable[16]; -#endif - -#endif /* _MACHINE_BAT_H_ */ diff --git a/sys/powerpc/include/bus.h b/sys/powerpc/include/bus.h deleted file mode 100644 index 6e91900c236..00000000000 --- a/sys/powerpc/include/bus.h +++ /dev/null @@ -1,493 +0,0 @@ -/* $NetBSD: bus.h,v 1.11 2003/07/28 17:35:54 thorpej Exp $ */ - -/*- - * SPDX-License-Identifier: BSD-2-Clause AND BSD-4-Clause - * - * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, - * NASA Ames Research Center. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/*- - * Copyright (c) 1996 Charles M. Hannum. All rights reserved. - * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Christopher G. Demetriou - * for the NetBSD Project. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE_BUS_H_ -#define _MACHINE_BUS_H_ - -#include - -#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) - -#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFFUL -#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFFUL -#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFFUL -#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFFUL - -#ifdef __powerpc64__ -#define BUS_SPACE_MAXADDR 0xFFFFFFFFFFFFFFFFUL -#define BUS_SPACE_MAXSIZE 0xFFFFFFFFFFFFFFFFUL -#else -#ifdef BOOKE -#define BUS_SPACE_MAXADDR 0xFFFFFFFFFULL -#define BUS_SPACE_MAXSIZE 0xFFFFFFFFUL -#else -#define BUS_SPACE_MAXADDR 0xFFFFFFFFUL -#define BUS_SPACE_MAXSIZE 0xFFFFFFFFUL -#endif -#endif - -#define BUS_SPACE_MAP_CACHEABLE 0x01 -#define BUS_SPACE_MAP_LINEAR 0x02 -#define BUS_SPACE_MAP_PREFETCHABLE 0x04 - -#define BUS_SPACE_UNRESTRICTED (~0) - -#define BUS_SPACE_BARRIER_READ 0x01 -#define BUS_SPACE_BARRIER_WRITE 0x02 - -struct bus_space_access; - -struct bus_space { - /* mapping/unmapping */ - int (*bs_map)(bus_addr_t, bus_size_t, int, - bus_space_handle_t *); - void (*bs_unmap)(bus_size_t); - int (*bs_subregion)(bus_space_handle_t, bus_size_t, - bus_size_t, bus_space_handle_t *); - - /* allocation/deallocation */ - int (*bs_alloc)(bus_addr_t, bus_addr_t, bus_size_t, - bus_size_t, bus_size_t, int, bus_addr_t *, bus_space_handle_t *); - void (*bs_free)(bus_space_handle_t, bus_size_t); - - void (*bs_barrier)(bus_space_handle_t, bus_size_t, - bus_size_t, int); - - /* Read single. */ - uint8_t (*bs_r_1)(bus_space_handle_t, bus_size_t); - uint16_t (*bs_r_2)(bus_space_handle_t, bus_size_t); - uint32_t (*bs_r_4)(bus_space_handle_t, bus_size_t); - uint64_t (*bs_r_8)(bus_space_handle_t, bus_size_t); - - uint16_t (*bs_r_s_2)(bus_space_handle_t, bus_size_t); - uint32_t (*bs_r_s_4)(bus_space_handle_t, bus_size_t); - uint64_t (*bs_r_s_8)(bus_space_handle_t, bus_size_t); - - /* read multiple */ - void (*bs_rm_1)(bus_space_handle_t, bus_size_t, uint8_t *, - bus_size_t); - void (*bs_rm_2)(bus_space_handle_t, bus_size_t, uint16_t *, - bus_size_t); - void (*bs_rm_4)(bus_space_handle_t, bus_size_t, uint32_t *, - bus_size_t); - void (*bs_rm_8)(bus_space_handle_t, bus_size_t, uint64_t *, - bus_size_t); - - void (*bs_rm_s_2)(bus_space_handle_t, bus_size_t, uint16_t *, - bus_size_t); - void (*bs_rm_s_4)(bus_space_handle_t, bus_size_t, uint32_t *, - bus_size_t); - void (*bs_rm_s_8)(bus_space_handle_t, bus_size_t, uint64_t *, - bus_size_t); - - /* read region */ - void (*bs_rr_1)(bus_space_handle_t, bus_size_t, uint8_t *, - bus_size_t); - void (*bs_rr_2)(bus_space_handle_t, bus_size_t, uint16_t *, - bus_size_t); - void (*bs_rr_4)(bus_space_handle_t, bus_size_t, uint32_t *, - bus_size_t); - void (*bs_rr_8)(bus_space_handle_t, bus_size_t, uint64_t *, - bus_size_t); - - void (*bs_rr_s_2)(bus_space_handle_t, bus_size_t, uint16_t *, - bus_size_t); - void (*bs_rr_s_4)(bus_space_handle_t, bus_size_t, uint32_t *, - bus_size_t); - void (*bs_rr_s_8)(bus_space_handle_t, bus_size_t, uint64_t *, - bus_size_t); - - /* write */ - void (*bs_w_1)(bus_space_handle_t, bus_size_t, uint8_t); - void (*bs_w_2)(bus_space_handle_t, bus_size_t, uint16_t); - void (*bs_w_4)(bus_space_handle_t, bus_size_t, uint32_t); - void (*bs_w_8)(bus_space_handle_t, bus_size_t, uint64_t); - - void (*bs_w_s_2)(bus_space_handle_t, bus_size_t, uint16_t); - void (*bs_w_s_4)(bus_space_handle_t, bus_size_t, uint32_t); - void (*bs_w_s_8)(bus_space_handle_t, bus_size_t, uint64_t); - - /* write multiple */ - void (*bs_wm_1)(bus_space_handle_t, bus_size_t, - const uint8_t *, bus_size_t); - void (*bs_wm_2)(bus_space_handle_t, bus_size_t, - const uint16_t *, bus_size_t); - void (*bs_wm_4)(bus_space_handle_t, bus_size_t, - const uint32_t *, bus_size_t); - void (*bs_wm_8)(bus_space_handle_t, bus_size_t, - const uint64_t *, bus_size_t); - - void (*bs_wm_s_2)(bus_space_handle_t, bus_size_t, - const uint16_t *, bus_size_t); - void (*bs_wm_s_4)(bus_space_handle_t, bus_size_t, - const uint32_t *, bus_size_t); - void (*bs_wm_s_8)(bus_space_handle_t, bus_size_t, - const uint64_t *, bus_size_t); - - /* write region */ - void (*bs_wr_1)(bus_space_handle_t, bus_size_t, - const uint8_t *, bus_size_t); - void (*bs_wr_2)(bus_space_handle_t, bus_size_t, - const uint16_t *, bus_size_t); - void (*bs_wr_4)(bus_space_handle_t, bus_size_t, - const uint32_t *, bus_size_t); - void (*bs_wr_8)(bus_space_handle_t, bus_size_t, - const uint64_t *, bus_size_t); - - void (*bs_wr_s_2)(bus_space_handle_t, bus_size_t, - const uint16_t *, bus_size_t); - void (*bs_wr_s_4)(bus_space_handle_t, bus_size_t, - const uint32_t *, bus_size_t); - void (*bs_wr_s_8)(bus_space_handle_t, bus_size_t, - const uint64_t *, bus_size_t); - - /* set multiple */ - void (*bs_sm_1)(bus_space_handle_t, bus_size_t, uint8_t, - bus_size_t); - void (*bs_sm_2)(bus_space_handle_t, bus_size_t, uint16_t, - bus_size_t); - void (*bs_sm_4)(bus_space_handle_t, bus_size_t, uint32_t, - bus_size_t); - void (*bs_sm_8)(bus_space_handle_t, bus_size_t, uint64_t, - bus_size_t); - - void (*bs_sm_s_2)(bus_space_handle_t, bus_size_t, uint16_t, - bus_size_t); - void (*bs_sm_s_4)(bus_space_handle_t, bus_size_t, uint32_t, - bus_size_t); - void (*bs_sm_s_8)(bus_space_handle_t, bus_size_t, uint64_t, - bus_size_t); - - /* set region */ - void (*bs_sr_1)(bus_space_handle_t, bus_size_t, uint8_t, - bus_size_t); - void (*bs_sr_2)(bus_space_handle_t, bus_size_t, uint16_t, - bus_size_t); - void (*bs_sr_4)(bus_space_handle_t, bus_size_t, uint32_t, - bus_size_t); - void (*bs_sr_8)(bus_space_handle_t, bus_size_t, uint64_t, - bus_size_t); - - void (*bs_sr_s_2)(bus_space_handle_t, bus_size_t, uint16_t, - bus_size_t); - void (*bs_sr_s_4)(bus_space_handle_t, bus_size_t, uint32_t, - bus_size_t); - void (*bs_sr_s_8)(bus_space_handle_t, bus_size_t, uint64_t, - bus_size_t); - - /* copy region */ - void (*bs_cr_1)(bus_space_handle_t, bus_size_t, - bus_space_handle_t, bus_size_t, bus_size_t); - void (*bs_cr_2)(bus_space_handle_t, bus_size_t, - bus_space_handle_t, bus_size_t, bus_size_t); - void (*bs_cr_4)(bus_space_handle_t, bus_size_t, - bus_space_handle_t, bus_size_t, bus_size_t); - void (*bs_cr_8)(bus_space_handle_t, bus_size_t, - bus_space_handle_t, bus_size_t, bus_size_t); - - void (*bs_cr_s_2)(bus_space_handle_t, bus_size_t, - bus_space_handle_t, bus_size_t, bus_size_t); - void (*bs_cr_s_4)(bus_space_handle_t, bus_size_t, - bus_space_handle_t, bus_size_t, bus_size_t); - void (*bs_cr_s_8)(bus_space_handle_t, bus_size_t, - bus_space_handle_t, bus_size_t, bus_size_t); -}; - -extern struct bus_space bs_be_tag; -extern struct bus_space bs_le_tag; - -#define __bs_c(a,b) __CONCAT(a,b) -#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size) - -#define __bs_rs(sz, t, h, o) \ - (*(t)->__bs_opname(r,sz))(h, o) -#define __bs_ws(sz, t, h, o, v) \ - (*(t)->__bs_opname(w,sz))(h, o, v) -#define __bs_nonsingle(type, sz, t, h, o, a, c) \ - (*(t)->__bs_opname(type,sz))(h, o, a, c) -#define __bs_set(type, sz, t, h, o, v, c) \ - (*(t)->__bs_opname(type,sz))(h, o, v, c) -#define __bs_copy(sz, t, h1, o1, h2, o2, cnt) \ - (*(t)->__bs_opname(c,sz))(h1, o1, h2, o2, cnt) - -/* - * Mapping and unmapping operations. - */ -#define bus_space_map(t, a, s, c, hp) (*(t)->bs_map)(a, s, c, hp) -#define bus_space_unmap(t, h, s) (*(t)->bs_unmap)(h, s) -#define bus_space_subregion(t, h, o, s, hp) (*(t)->bs_subregion)(h, o, s, hp) - -/* - * Allocation and deallocation operations. - */ -#define bus_space_alloc(t, rs, re, s, a, b, c, ap, hp) \ - (*(t)->bs_alloc)(rs, re, s, a, b, c, ap, hp) -#define bus_space_free(t, h, s) \ - (*(t)->bs_free)(h, s) - -/* - * Bus barrier operations. - */ -#define bus_space_barrier(t, h, o, l, f) (*(t)->bs_barrier)(h, o, l, f) - -/* - * Bus read (single) operations. - */ -#define bus_space_read_1(t, h, o) __bs_rs(1,t,h,o) -#define bus_space_read_2(t, h, o) __bs_rs(2,t,h,o) -#define bus_space_read_4(t, h, o) __bs_rs(4,t,h,o) -#define bus_space_read_8(t, h, o) __bs_rs(8,t,h,o) - -#define bus_space_read_stream_1 bus_space_read_1 -#define bus_space_read_stream_2(t, h, o) __bs_rs(s_2,t,h,o) -#define bus_space_read_stream_4(t, h, o) __bs_rs(s_4,t,h,o) -#define bus_space_read_stream_8(t, h, o) __bs_rs(s_8,t,h,o) - -/* - * Bus read multiple operations. - */ -#define bus_space_read_multi_1(t, h, o, a, c) \ - __bs_nonsingle(rm,1,(t),(h),(o),(a),(c)) -#define bus_space_read_multi_2(t, h, o, a, c) \ - __bs_nonsingle(rm,2,(t),(h),(o),(a),(c)) -#define bus_space_read_multi_4(t, h, o, a, c) \ - __bs_nonsingle(rm,4,(t),(h),(o),(a),(c)) -#define bus_space_read_multi_8(t, h, o, a, c) \ - __bs_nonsingle(rm,8,(t),(h),(o),(a),(c)) - -#define bus_space_read_multi_stream_1 bus_space_read_multi_1 -#define bus_space_read_multi_stream_2(t, h, o, a, c) \ - __bs_nonsingle(rm,s_2,(t),(h),(o),(a),(c)) -#define bus_space_read_multi_stream_4(t, h, o, a, c) \ - __bs_nonsingle(rm,s_4,(t),(h),(o),(a),(c)) -#define bus_space_read_multi_stream_8(t, h, o, a, c) \ - __bs_nonsingle(rm,s_8,(t),(h),(o),(a),(c)) - -/* - * Bus read region operations. - */ -#define bus_space_read_region_1(t, h, o, a, c) \ - __bs_nonsingle(rr,1,(t),(h),(o),(a),(c)) -#define bus_space_read_region_2(t, h, o, a, c) \ - __bs_nonsingle(rr,2,(t),(h),(o),(a),(c)) -#define bus_space_read_region_4(t, h, o, a, c) \ - __bs_nonsingle(rr,4,(t),(h),(o),(a),(c)) -#define bus_space_read_region_8(t, h, o, a, c) \ - __bs_nonsingle(rr,8,(t),(h),(o),(a),(c)) - -#define bus_space_read_region_stream_1 bus_space_read_region_1 -#define bus_space_read_region_stream_2(t, h, o, a, c) \ - __bs_nonsingle(rr,s_2,(t),(h),(o),(a),(c)) -#define bus_space_read_region_stream_4(t, h, o, a, c) \ - __bs_nonsingle(rr,s_4,(t),(h),(o),(a),(c)) -#define bus_space_read_region_stream_8(t, h, o, a, c) \ - __bs_nonsingle(rr,s_8,(t),(h),(o),(a),(c)) - -/* - * Bus write (single) operations. - */ -#define bus_space_write_1(t, h, o, v) __bs_ws(1,(t),(h),(o),(v)) -#define bus_space_write_2(t, h, o, v) __bs_ws(2,(t),(h),(o),(v)) -#define bus_space_write_4(t, h, o, v) __bs_ws(4,(t),(h),(o),(v)) -#define bus_space_write_8(t, h, o, v) __bs_ws(8,(t),(h),(o),(v)) - -#define bus_space_write_stream_1 bus_space_write_1 -#define bus_space_write_stream_2(t, h, o, v) __bs_ws(s_2,(t),(h),(o),(v)) -#define bus_space_write_stream_4(t, h, o, v) __bs_ws(s_4,(t),(h),(o),(v)) -#define bus_space_write_stream_8(t, h, o, v) __bs_ws(s_8,(t),(h),(o),(v)) - -/* - * Bus write multiple operations. - */ -#define bus_space_write_multi_1(t, h, o, a, c) \ - __bs_nonsingle(wm,1,(t),(h),(o),(a),(c)) -#define bus_space_write_multi_2(t, h, o, a, c) \ - __bs_nonsingle(wm,2,(t),(h),(o),(a),(c)) -#define bus_space_write_multi_4(t, h, o, a, c) \ - __bs_nonsingle(wm,4,(t),(h),(o),(a),(c)) -#define bus_space_write_multi_8(t, h, o, a, c) \ - __bs_nonsingle(wm,8,(t),(h),(o),(a),(c)) - -#define bus_space_write_multi_stream_1 bus_space_write_multi_1 -#define bus_space_write_multi_stream_2(t, h, o, a, c) \ - __bs_nonsingle(wm,s_2,(t),(h),(o),(a),(c)) -#define bus_space_write_multi_stream_4(t, h, o, a, c) \ - __bs_nonsingle(wm,s_4,(t),(h),(o),(a),(c)) -#define bus_space_write_multi_stream_8(t, h, o, a, c) \ - __bs_nonsingle(wm,s_8,(t),(h),(o),(a),(c)) - -/* - * Bus write region operations. - */ -#define bus_space_write_region_1(t, h, o, a, c) \ - __bs_nonsingle(wr,1,(t),(h),(o),(a),(c)) -#define bus_space_write_region_2(t, h, o, a, c) \ - __bs_nonsingle(wr,2,(t),(h),(o),(a),(c)) -#define bus_space_write_region_4(t, h, o, a, c) \ - __bs_nonsingle(wr,4,(t),(h),(o),(a),(c)) -#define bus_space_write_region_8(t, h, o, a, c) \ - __bs_nonsingle(wr,8,(t),(h),(o),(a),(c)) - -#define bus_space_write_region_stream_1 bus_space_write_region_1 -#define bus_space_write_region_stream_2(t, h, o, a, c) \ - __bs_nonsingle(wr,s_2,(t),(h),(o),(a),(c)) -#define bus_space_write_region_stream_4(t, h, o, a, c) \ - __bs_nonsingle(wr,s_4,(t),(h),(o),(a),(c)) -#define bus_space_write_region_stream_8(t, h, o, a, c) \ - __bs_nonsingle(wr,s_8,(t),(h),(o),(a),(c)) - -/* - * Set multiple operations. - */ -#define bus_space_set_multi_1(t, h, o, v, c) \ - __bs_set(sm,1,(t),(h),(o),(v),(c)) -#define bus_space_set_multi_2(t, h, o, v, c) \ - __bs_set(sm,2,(t),(h),(o),(v),(c)) -#define bus_space_set_multi_4(t, h, o, v, c) \ - __bs_set(sm,4,(t),(h),(o),(v),(c)) -#define bus_space_set_multi_8(t, h, o, v, c) \ - __bs_set(sm,8,(t),(h),(o),(v),(c)) - -#define bus_space_set_multi_stream_1 bus_space_set_multi_1 -#define bus_space_set_multi_stream_2(t, h, o, v, c) \ - __bs_set(sm,s_2,(t),(h),(o),(v),(c)) -#define bus_space_set_multi_stream_4(t, h, o, v, c) \ - __bs_set(sm,s_4,(t),(h),(o),(v),(c)) -#define bus_space_set_multi_stream_8(t, h, o, v, c) \ - __bs_set(sm,s_8,(t),(h),(o),(v),(c)) - -/* - * Set region operations. - */ -#define bus_space_set_region_1(t, h, o, v, c) \ - __bs_set(sr,1,(t),(h),(o),(v),(c)) -#define bus_space_set_region_2(t, h, o, v, c) \ - __bs_set(sr,2,(t),(h),(o),(v),(c)) -#define bus_space_set_region_4(t, h, o, v, c) \ - __bs_set(sr,4,(t),(h),(o),(v),(c)) -#define bus_space_set_region_8(t, h, o, v, c) \ - __bs_set(sr,8,(t),(h),(o),(v),(c)) - -#define bus_space_set_region_stream_1 bus_space_set_region_1 -#define bus_space_set_region_stream_2(t, h, o, v, c) \ - __bs_set(sr,s_2,(t),(h),(o),(v),(c)) -#define bus_space_set_region_stream_4(t, h, o, v, c) \ - __bs_set(sr,s_4,(t),(h),(o),(v),(c)) -#define bus_space_set_region_stream_8(t, h, o, v, c) \ - __bs_set(sr,s_8,(t),(h),(o),(v),(c)) - -#if 0 -/* - * Copy operations. - */ -#define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \ - __bs_copy(1, t, h1, o1, h2, o2, c) -#define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \ - __bs_copy(2, t, h1, o1, h2, o2, c) -#define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \ - __bs_copy(4, t, h1, o1, h2, o2, c) -#define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \ - __bs_copy(8, t, h1, o1, h2, o2, c) - -#define bus_space_copy_region_stream_1 bus_space_copy_region_1 -#define bus_space_copy_region_stream_2(t, h1, o1, h2, o2, c) \ - __bs_copy(s_2, t, h1, o1, h2, o2, c) -#define bus_space_copy_region_stream_4(t, h1, o1, h2, o2, c) \ - __bs_copy(s_4, t, h1, o1, h2, o2, c) -#define bus_space_copy_region_stream_8(t, h1, o1, h2, o2, c) \ - __bs_copy(s_8, t, h1, o1, h2, o2, c) -#endif - -#define BUS_PEEK_FUNC(width, type) \ - static inline int \ - bus_space_peek_##width(bus_space_tag_t tag, \ - bus_space_handle_t hnd, bus_size_t offset, type *value) \ - { \ - type tmp; \ - tmp = bus_space_read_##width(tag, hnd, offset); \ - *value = (type)tmp; \ - return (0); \ - } -BUS_PEEK_FUNC(1, uint8_t) -BUS_PEEK_FUNC(2, uint16_t) -BUS_PEEK_FUNC(4, uint32_t) -BUS_PEEK_FUNC(8, uint64_t) - -#define BUS_POKE_FUNC(width, type) \ - static inline int \ - bus_space_poke_##width(bus_space_tag_t tag, \ - bus_space_handle_t hnd, bus_size_t offset, type value) \ - { \ - bus_space_write_##width(tag, hnd, offset, value); \ - return (0); \ - } -BUS_POKE_FUNC(1, uint8_t) -BUS_POKE_FUNC(2, uint16_t) -BUS_POKE_FUNC(4, uint32_t) -BUS_POKE_FUNC(8, uint64_t) - -#include - -#endif /* _MACHINE_BUS_H_ */ diff --git a/sys/powerpc/include/bus_dma.h b/sys/powerpc/include/bus_dma.h deleted file mode 100644 index 09bc7b15e94..00000000000 --- a/sys/powerpc/include/bus_dma.h +++ /dev/null @@ -1,37 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2005 Scott Long - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _POWERPC_BUS_DMA_H_ -#define _POWERPC_BUS_DMA_H_ - -#include -#include - -int bus_dma_tag_set_iommu(bus_dma_tag_t, device_t iommu, void *cookie); - -#endif /* _POWERPC_BUS_DMA_H_ */ diff --git a/sys/powerpc/include/clock.h b/sys/powerpc/include/clock.h deleted file mode 100644 index 9f2d692fefe..00000000000 --- a/sys/powerpc/include/clock.h +++ /dev/null @@ -1,18 +0,0 @@ -/*- - * Kernel interface to machine-dependent clock driver. - * Garrett Wollman, September 1994. - * This file is in the public domain. - */ - -#ifndef _MACHINE_CLOCK_H_ -#define _MACHINE_CLOCK_H_ - -#ifdef _KERNEL - -struct trapframe; - -void decr_intr(struct trapframe *); - -#endif - -#endif /* !_MACHINE_CLOCK_H_ */ diff --git a/sys/powerpc/include/counter.h b/sys/powerpc/include/counter.h deleted file mode 100644 index 68e292cde7f..00000000000 --- a/sys/powerpc/include/counter.h +++ /dev/null @@ -1,162 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012, 2013 Konstantin Belousov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef __MACHINE_COUNTER_H__ -#define __MACHINE_COUNTER_H__ - -#include -#ifdef INVARIANTS -#include -#endif - -#define EARLY_COUNTER &__pcpu[0].pc_early_dummy_counter - -#ifdef __powerpc64__ - -#define counter_enter() do {} while (0) -#define counter_exit() do {} while (0) - -#ifdef IN_SUBR_COUNTER_C -static inline uint64_t -counter_u64_read_one(uint64_t *p, int cpu) -{ - - return (*(uint64_t *)((char *)p + UMA_PCPU_ALLOC_SIZE * cpu)); -} - -static inline uint64_t -counter_u64_fetch_inline(uint64_t *p) -{ - uint64_t r; - int i; - - r = 0; - CPU_FOREACH(i) - r += counter_u64_read_one((uint64_t *)p, i); - - return (r); -} - -static void -counter_u64_zero_one_cpu(void *arg) -{ - - *((uint64_t *)((char *)arg + UMA_PCPU_ALLOC_SIZE * - PCPU_GET(cpuid))) = 0; -} - -static inline void -counter_u64_zero_inline(counter_u64_t c) -{ - - smp_rendezvous(smp_no_rendezvous_barrier, counter_u64_zero_one_cpu, - smp_no_rendezvous_barrier, c); -} -#endif - -#define counter_u64_add_protected(c, i) counter_u64_add(c, i) - -static inline void -counter_u64_add(counter_u64_t c, int64_t inc) -{ - uint64_t ccpu, old; - - __asm __volatile("\n" - "1:\n\t" - "mfsprg %0, 0\n\t" - "ldarx %1, %0, %2\n\t" - "add %1, %1, %3\n\t" - "stdcx. %1, %0, %2\n\t" - "bne- 1b" - : "=&b" (ccpu), "=&r" (old) - : "r" ((char *)c - (char *)&__pcpu[0]), "r" (inc) - : "cr0", "memory"); -} - -#else /* !64bit */ - -#define counter_enter() critical_enter() -#define counter_exit() critical_exit() - -#ifdef IN_SUBR_COUNTER_C -/* XXXKIB non-atomic 64bit read */ -static inline uint64_t -counter_u64_read_one(uint64_t *p, int cpu) -{ - - return (*(uint64_t *)((char *)p + UMA_PCPU_ALLOC_SIZE * cpu)); -} - -static inline uint64_t -counter_u64_fetch_inline(uint64_t *p) -{ - uint64_t r; - int i; - - r = 0; - for (i = 0; i < mp_ncpus; i++) - r += counter_u64_read_one((uint64_t *)p, i); - - return (r); -} - -/* XXXKIB non-atomic 64bit store, might interrupt increment */ -static void -counter_u64_zero_one_cpu(void *arg) -{ - - *((uint64_t *)((char *)arg + UMA_PCPU_ALLOC_SIZE * - PCPU_GET(cpuid))) = 0; -} - -static inline void -counter_u64_zero_inline(counter_u64_t c) -{ - - smp_rendezvous(smp_no_rendezvous_barrier, counter_u64_zero_one_cpu, - smp_no_rendezvous_barrier, c); -} -#endif - -#define counter_u64_add_protected(c, inc) do { \ - CRITICAL_ASSERT(curthread); \ - *(uint64_t *)zpcpu_get(c) += (inc); \ -} while (0) - -static inline void -counter_u64_add(counter_u64_t c, int64_t inc) -{ - - counter_enter(); - counter_u64_add_protected(c, inc); - counter_exit(); -} - -#endif /* 64bit */ - -#endif /* ! __MACHINE_COUNTER_H__ */ diff --git a/sys/powerpc/include/cpu.h b/sys/powerpc/include/cpu.h deleted file mode 100644 index 02ff42877f0..00000000000 --- a/sys/powerpc/include/cpu.h +++ /dev/null @@ -1,155 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1995-1997 Wolfgang Solfrank. - * Copyright (C) 1995-1997 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: cpu.h,v 1.11 2000/05/26 21:19:53 thorpej Exp $ - */ - -#ifndef _MACHINE_CPU_H_ -#define _MACHINE_CPU_H_ - -#include -#include -#include - -/* - * CPU Feature Attributes - * - * These are defined in the PowerPC ELF ABI for the AT_HWCAP vector, - * and are exported to userland via the machdep.cpu_features - * sysctl. - */ - -extern u_long cpu_features; -extern u_long cpu_features2; - -#define PPC_FEATURE_32 0x80000000 /* Always true */ -#define PPC_FEATURE_64 0x40000000 /* Defined on a 64-bit CPU */ -#define PPC_FEATURE_601_INSTR 0x20000000 /* Defined on a 64-bit CPU */ -#define PPC_FEATURE_HAS_ALTIVEC 0x10000000 -#define PPC_FEATURE_HAS_FPU 0x08000000 -#define PPC_FEATURE_HAS_MMU 0x04000000 -#define PPC_FEATURE_UNIFIED_CACHE 0x01000000 -#define PPC_FEATURE_HAS_SPE 0x00800000 -#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 -#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 -#define PPC_FEATURE_NO_TB 0x00100000 -#define PPC_FEATURE_POWER4 0x00080000 -#define PPC_FEATURE_POWER5 0x00040000 -#define PPC_FEATURE_POWER5_PLUS 0x00020000 -#define PPC_FEATURE_CELL 0x00010000 -#define PPC_FEATURE_BOOKE 0x00008000 -#define PPC_FEATURE_SMT 0x00004000 -#define PPC_FEATURE_ICACHE_SNOOP 0x00002000 -#define PPC_FEATURE_ARCH_2_05 0x00001000 -#define PPC_FEATURE_HAS_DFP 0x00000400 -#define PPC_FEATURE_POWER6_EXT 0x00000200 -#define PPC_FEATURE_ARCH_2_06 0x00000100 -#define PPC_FEATURE_HAS_VSX 0x00000080 -#define PPC_FEATURE_TRUE_LE 0x00000002 -#define PPC_FEATURE_PPC_LE 0x00000001 - -#define PPC_FEATURE2_ARCH_2_07 0x80000000 -#define PPC_FEATURE2_HTM 0x40000000 -#define PPC_FEATURE2_DSCR 0x20000000 -#define PPC_FEATURE2_EBB 0x10000000 -#define PPC_FEATURE2_ISEL 0x08000000 -#define PPC_FEATURE2_TAR 0x04000000 -#define PPC_FEATURE2_HAS_VEC_CRYPTO 0x02000000 -#define PPC_FEATURE2_HTM_NOSC 0x01000000 -#define PPC_FEATURE2_ARCH_3_00 0x00800000 -#define PPC_FEATURE2_HAS_IEEE128 0x00400000 -#define PPC_FEATURE2_DARN 0x00200000 -#define PPC_FEATURE2_SCV 0x00100000 -#define PPC_FEATURE2_HTM_NOSUSPEND 0x00080000 - -#define PPC_FEATURE_BITMASK \ - "\20" \ - "\040PPC32\037PPC64\036PPC601\035ALTIVEC\034FPU\033MMU\031UNIFIEDCACHE" \ - "\030SPE\027SPESFP\026DPESFP\025NOTB\024POWER4\023POWER5\022P5PLUS\021CELL"\ - "\020BOOKE\017SMT\016ISNOOP\015ARCH205\013DFP\011ARCH206\010VSX"\ - "\002TRUELE\001PPCLE" -#define PPC_FEATURE2_BITMASK \ - "\20" \ - "\040ARCH207\037HTM\036DSCR\034ISEL\033TAR\032VCRYPTO\031HTMNOSC" \ - "\030ARCH300\027IEEE128\026DARN\025SCV\024HTMNOSUSP" - -#define TRAPF_USERMODE(frame) (((frame)->srr1 & PSL_PR) != 0) -#define TRAPF_PC(frame) ((frame)->srr0) - -/* - * CTL_MACHDEP definitions. - */ -#define CPU_CACHELINE 1 - -static __inline u_int64_t -get_cyclecount(void) -{ - u_int32_t _upper, _lower; - u_int64_t _time; - - __asm __volatile( - "mftb %0\n" - "mftbu %1" - : "=r" (_lower), "=r" (_upper)); - - _time = (u_int64_t)_upper; - _time = (_time << 32) + _lower; - return (_time); -} - -#define cpu_getstack(td) ((td)->td_frame->fixreg[1]) -#define cpu_spinwait() __asm __volatile("or 27,27,27") /* yield */ -#define cpu_lock_delay() DELAY(1) - -extern char btext[]; -extern char etext[]; - -struct thread; - -#ifdef __powerpc64__ -extern void enter_idle_powerx(void); -extern uint64_t can_wakeup; -extern register_t lpcr; -#endif - -void cpu_halt(void); -void cpu_reset(void); -void flush_disable_caches(void); -void fork_trampoline(void); -int cpu_machine_check(struct thread *, struct trapframe *, int *); - - -#ifndef __powerpc64__ -void mpc745x_sleep(void); -#endif - -#endif /* _MACHINE_CPU_H_ */ diff --git a/sys/powerpc/include/cpufunc.h b/sys/powerpc/include/cpufunc.h deleted file mode 100644 index d5aae6cd09a..00000000000 --- a/sys/powerpc/include/cpufunc.h +++ /dev/null @@ -1,312 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1998 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_CPUFUNC_H_ -#define _MACHINE_CPUFUNC_H_ - -#ifdef _KERNEL - -#include - -#include -#include - -struct thread; - -#ifdef KDB -void breakpoint(void); -#else -static __inline void -breakpoint(void) -{ - - return; -} -#endif - -/* CPU register mangling inlines */ - -static __inline void -mtmsr(register_t value) -{ - - __asm __volatile ("mtmsr %0; isync" :: "r"(value)); -} - -#ifdef __powerpc64__ -static __inline void -mtmsrd(register_t value) -{ - - __asm __volatile ("mtmsrd %0; isync" :: "r"(value)); -} -#endif - -static __inline register_t -mfmsr(void) -{ - register_t value; - - __asm __volatile ("mfmsr %0" : "=r"(value)); - - return (value); -} - -#ifndef __powerpc64__ -static __inline void -mtsrin(vm_offset_t va, register_t value) -{ - - __asm __volatile ("mtsrin %0,%1; isync" :: "r"(value), "r"(va)); -} - -static __inline register_t -mfsrin(vm_offset_t va) -{ - register_t value; - - __asm __volatile ("mfsrin %0,%1" : "=r"(value) : "r"(va)); - - return (value); -} -#endif - -static __inline register_t -mfctrl(void) -{ - register_t value; - - __asm __volatile ("mfspr %0,136" : "=r"(value)); - - return (value); -} - -static __inline void -mtdec(register_t value) -{ - - __asm __volatile ("mtdec %0" :: "r"(value)); -} - -static __inline register_t -mfdec(void) -{ - register_t value; - - __asm __volatile ("mfdec %0" : "=r"(value)); - - return (value); -} - -static __inline register_t -mfpvr(void) -{ - register_t value; - - __asm __volatile ("mfpvr %0" : "=r"(value)); - - return (value); -} - -static __inline u_quad_t -mftb(void) -{ - u_quad_t tb; - #ifdef __powerpc64__ - __asm __volatile ("mftb %0" : "=r"(tb)); - #else - uint32_t *tbup = (uint32_t *)&tb; - uint32_t *tblp = tbup + 1; - - do { - *tbup = mfspr(TBR_TBU); - *tblp = mfspr(TBR_TBL); - } while (*tbup != mfspr(TBR_TBU)); - #endif - - return (tb); -} - -static __inline void -mttb(u_quad_t time) -{ - - mtspr(TBR_TBWL, 0); - mtspr(TBR_TBWU, (uint32_t)(time >> 32)); - mtspr(TBR_TBWL, (uint32_t)(time & 0xffffffff)); -} - -static __inline register_t -mffs(void) -{ - uint64_t value; - - __asm __volatile ("mffs 0; stfd 0,0(%0)" - :: "b"(&value)); - - return ((register_t)value); -} - -static __inline void -mtfsf(uint64_t value) -{ - - __asm __volatile ("lfd 0,0(%0); mtfsf 0xff,0" - :: "b"(&value)); -} - -static __inline void -eieio(void) -{ - - __asm __volatile ("eieio" : : : "memory"); -} - -static __inline void -isync(void) -{ - - __asm __volatile ("isync" : : : "memory"); -} - -static __inline void -powerpc_sync(void) -{ - - __asm __volatile ("sync" : : : "memory"); -} - -static __inline int -cntlzd(uint64_t word) -{ - uint64_t result; - /* cntlzd %0, %1 */ - __asm __volatile(".long 0x7c000074 | (%1 << 21) | (%0 << 16)" : - "=r"(result) : "r"(word)); - - return (int)result; -} - -static __inline int -cnttzd(uint64_t word) -{ - uint64_t result; - /* cnttzd %0, %1 */ - __asm __volatile(".long 0x7c000474 | (%1 << 21) | (%0 << 16)" : - "=r"(result) : "r"(word)); - - return (int)result; -} - -static __inline void -ptesync(void) -{ - __asm __volatile("ptesync"); -} - -static __inline register_t -intr_disable(void) -{ - register_t msr; - - msr = mfmsr(); - mtmsr(msr & ~PSL_EE); - return (msr); -} - -static __inline void -intr_restore(register_t msr) -{ - - mtmsr(msr); -} - -static __inline struct pcpu * -get_pcpu(void) -{ - struct pcpu *ret; - - __asm __volatile("mfsprg %0, 0" : "=r"(ret)); - - return (ret); -} - -#define HAVE_INLINE_FLS -static __inline __pure2 int -fls(int mask) -{ - return (mask ? 32 - __builtin_clz(mask) : 0); -} - -#define HAVE_INLINE_FLSL -static __inline __pure2 int -flsl(long mask) -{ - return (mask ? (8 * sizeof(long) - __builtin_clzl(mask)) : 0); -} - -/* "NOP" operations to signify priorities to the kernel. */ -static __inline void -nop_prio_vlow(void) -{ - __asm __volatile("or 31,31,31"); -} - -static __inline void -nop_prio_low(void) -{ - __asm __volatile("or 1,1,1"); -} - -static __inline void -nop_prio_mlow(void) -{ - __asm __volatile("or 6,6,6"); -} - -static __inline void -nop_prio_medium(void) -{ - __asm __volatile("or 2,2,2"); -} - -static __inline void -nop_prio_mhigh(void) -{ - __asm __volatile("or 5,5,5"); -} - -static __inline void -nop_prio_high(void) -{ - __asm __volatile("or 3,3,3"); -} - -#endif /* _KERNEL */ - -#endif /* !_MACHINE_CPUFUNC_H_ */ diff --git a/sys/powerpc/include/db_machdep.h b/sys/powerpc/include/db_machdep.h deleted file mode 100644 index 369fd9e9ddd..00000000000 --- a/sys/powerpc/include/db_machdep.h +++ /dev/null @@ -1,87 +0,0 @@ -/*- - * Mach Operating System - * Copyright (c) 1992 Carnegie Mellon University - * All Rights Reserved. - * - * Permission to use, copy, modify and distribute this software and its - * documentation is hereby granted, provided that both the copyright - * notice and this permission notice appear in all copies of the - * software, derivative works or modified versions, and any portions - * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR - * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * - * Carnegie Mellon requests users of this software to return to - * - * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU - * School of Computer Science - * Carnegie Mellon University - * Pittsburgh PA 15213-3890 - * - * any improvements or extensions that they make and grant Carnegie Mellon - * the rights to redistribute these changes. - * - * $OpenBSD: db_machdep.h,v 1.2 1997/03/21 00:48:48 niklas Exp $ - * $NetBSD: db_machdep.h,v 1.4.22.1 2000/08/05 11:10:43 wiz Exp $ - */ - -/* - * Machine-dependent defines for new kernel debugger. - */ -#ifndef _POWERPC_DB_MACHDEP_H_ -#define _POWERPC_DB_MACHDEP_H_ - -#include -#include - -#define DB_ELF_SYMBOLS -#define DB_ELFSIZE __ELF_WORD_SIZE - -typedef vm_offset_t db_addr_t; /* address - unsigned */ -typedef intptr_t db_expr_t; /* expression - signed */ - -#define PC_REGS(regs) ((db_addr_t)kdb_thrctx->pcb_lr) - -#define BKPT_INST 0x7C810808 /* breakpoint instruction */ - -#define BKPT_SIZE (4) /* size of breakpoint inst */ -#define BKPT_SET(inst) (BKPT_INST) - -#define db_clear_single_step kdb_cpu_clear_singlestep -#define db_set_single_step kdb_cpu_set_singlestep - -#if 0 -#define SR_SINGLESTEP 0x400 -#define db_clear_single_step(regs) ((regs)->msr &= ~SR_SINGLESTEP) -#define db_set_single_step(regs) ((regs)->msr |= SR_SINGLESTEP) -#endif - -#define T_BREAKPOINT 0xffff -#define IS_BREAKPOINT_TRAP(type, code) ((type) == T_BREAKPOINT) - -#define T_WATCHPOINT 0xeeee -#ifdef T_WATCHPOINT -#define IS_WATCHPOINT_TRAP(type, code) ((type) == T_WATCHPOINT) -#else -#define IS_WATCHPOINT_TRAP(type, code) 0 -#endif - -#define M_RTS 0xfc0007fe -#define I_RTS 0x4c000020 -#define M_BC 0xfc000000 -#define I_BC 0x40000000 -#define M_B 0xfc000000 -#define I_B 0x50000000 -#define M_RFI 0xfc0007fe -#define I_RFI 0x4c000064 - -#define inst_trap_return(ins) (((ins)&M_RFI) == I_RFI) -#define inst_return(ins) (((ins)&M_RTS) == I_RTS) -#define inst_call(ins) (((ins)&M_BC ) == I_BC || \ - ((ins)&M_B ) == I_B ) -#define inst_load(ins) 0 -#define inst_store(ins) 0 - -#endif /* _POWERPC_DB_MACHDEP_H_ */ diff --git a/sys/powerpc/include/dbdma.h b/sys/powerpc/include/dbdma.h deleted file mode 100644 index b6401b1d12e..00000000000 --- a/sys/powerpc/include/dbdma.h +++ /dev/null @@ -1,153 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2008 Nathan Whitehorn - * All rights reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_DBDMA_H_ -#define _MACHINE_DBDMA_H_ - -#include -#include - -/* - * Apple's DBDMA (Descriptor-based DMA) interface is a common DMA engine - * used by a variety of custom Apple ASICs. It is described in the CHRP - * specification and in the book Macintosh Technology in the Common - * Hardware Reference Platform, copyright 1995 Apple Computer. - */ - -/* DBDMA Command Values */ - -enum { - DBDMA_OUTPUT_MORE = 0, - DBDMA_OUTPUT_LAST = 1, - DBDMA_INPUT_MORE = 2, - DBDMA_INPUT_LAST = 3, - - DBDMA_STORE_QUAD = 4, - DBDMA_LOAD_QUAD = 5, - DBDMA_NOP = 6, - DBDMA_STOP = 7 -}; - -/* These codes are for the interrupt, branch, and wait flags */ - -enum { - DBDMA_NEVER = 0, - DBDMA_COND_TRUE = 1, - DBDMA_COND_FALSE = 2, - DBDMA_ALWAYS = 3 -}; - -/* Channel status bits */ -#define DBDMA_STATUS_RUN (0x01 << 15) -#define DBDMA_STATUS_PAUSE (0x01 << 14) -#define DBDMA_STATUS_FLUSH (0x01 << 13) -#define DBDMA_STATUS_WAKE (0x01 << 12) -#define DBDMA_STATUS_DEAD (0x01 << 11) -#define DBDMA_STATUS_ACTIVE (0x01 << 10) - -/* Set by hardware if a branch was taken */ -#define DBDMA_STATUS_BRANCH 8 - -struct dbdma_command; -typedef struct dbdma_command dbdma_command_t; -struct dbdma_channel; -typedef struct dbdma_channel dbdma_channel_t; - -int dbdma_allocate_channel(struct resource *dbdma_regs, u_int offset, - bus_dma_tag_t parent_dma, int slots, dbdma_channel_t **chan); - -int dbdma_resize_channel(dbdma_channel_t *chan, int newslots); -int dbdma_free_channel(dbdma_channel_t *chan); - -void dbdma_run(dbdma_channel_t *chan); -void dbdma_stop(dbdma_channel_t *chan); -void dbdma_reset(dbdma_channel_t *chan); -void dbdma_set_current_cmd(dbdma_channel_t *chan, int slot); - -void dbdma_pause(dbdma_channel_t *chan); -void dbdma_wake(dbdma_channel_t *chan); - -/* - * DBDMA uses a 16 bit channel control register to describe the current - * state of DMA on the channel. The high-order bits (8-15) contain information - * on the run state and are listed in the DBDMA_STATUS_* constants above. These - * are manipulated with the dbdma_run/stop/reset() routines above. - * - * The low order bits (0-7) are device dependent status bits. These can be set - * and read by both hardware and software. The mask is the set of bits to - * modify; if mask is 0x03 and value is 0, the lowest order 2 bits will be - * zeroed. - */ - -uint16_t dbdma_get_chan_status(dbdma_channel_t *chan); - -uint8_t dbdma_get_device_status(dbdma_channel_t *chan); -void dbdma_set_device_status(dbdma_channel_t *chan, uint8_t mask, - uint8_t value); - -/* - * Each DBDMA command word has the current channel status register and the - * number of residual bytes (requested - actually transferred) written to it - * at time of command completion. - */ - -uint16_t dbdma_get_cmd_status(dbdma_channel_t *chan, int slot); -uint16_t dbdma_get_residuals(dbdma_channel_t *chan, int slot); - -void dbdma_clear_cmd_status(dbdma_channel_t *chan, int slot); - -/* - * The interrupt/branch/wait selector let you specify a set of values - * of the device dependent status bits that will cause intterupt/branch/wait - * conditions to be taken if the flags for these are set to one of the - * DBDMA_COND_* values. - * - * The condition is considered true if (status & mask) == value. - */ - -void dbdma_set_interrupt_selector(dbdma_channel_t *chan, uint8_t mask, - uint8_t value); -void dbdma_set_branch_selector(dbdma_channel_t *chan, uint8_t mask, - uint8_t value); -void dbdma_set_wait_selector(dbdma_channel_t *chan, uint8_t mask, - uint8_t value); - -void dbdma_insert_command(dbdma_channel_t *chan, int slot, int command, - int stream, bus_addr_t data, size_t count, uint8_t interrupt, - uint8_t branch, uint8_t wait, uint32_t branch_slot); - -void dbdma_insert_stop(dbdma_channel_t *chan, int slot); -void dbdma_insert_nop(dbdma_channel_t *chan, int slot); -void dbdma_insert_branch(dbdma_channel_t *chan, int slot, int to_slot); - -void dbdma_sync_commands(dbdma_channel_t *chan, bus_dmasync_op_t op); - -void dbdma_save_state(dbdma_channel_t *chan); -void dbdma_restore_state(dbdma_channel_t *chan); - -#endif /* _MACHINE_DBDMA_H_ */ diff --git a/sys/powerpc/include/dump.h b/sys/powerpc/include/dump.h deleted file mode 100644 index ebaf8c6dde0..00000000000 --- a/sys/powerpc/include/dump.h +++ /dev/null @@ -1,73 +0,0 @@ -/*- - * Copyright (c) 2014 EMC Corp. - * Author: Conrad Meyer - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_DUMP_H_ -#define _MACHINE_DUMP_H_ - -#define KERNELDUMP_ARCH_VERSION KERNELDUMP_POWERPC_VERSION -#define EM_VALUE ELF_ARCH /* Defined in powerpc/include/elf.h */ -#define DUMPSYS_MD_PA_NPAIRS (PHYS_AVAIL_SZ + 1) -#define DUMPSYS_NUM_AUX_HDRS 0 - -/* How often to check the dump progress bar? */ -#define DUMPSYS_PB_CHECK_BITS 20 /* Every 1MB */ - -void dumpsys_pa_init(void); -void dumpsys_unmap_chunk(vm_paddr_t, size_t, void *); -size_t dumpsys_scan_pmap(struct bitset *); -void *dumpsys_dump_pmap_init(unsigned blkpgs); -void *dumpsys_dump_pmap(void *ctx, void *buf, u_long *nbytes); - -static inline struct dump_pa * -dumpsys_pa_next(struct dump_pa *p) -{ - - return (dumpsys_gen_pa_next(p)); -} - -static inline void -dumpsys_wbinv_all(void) -{ - - dumpsys_gen_wbinv_all(); -} - -static inline int -dumpsys_write_aux_headers(struct dumperinfo *di) -{ - - return (dumpsys_gen_write_aux_headers(di)); -} - -static inline int -dumpsys(struct dumperinfo *di) -{ - - return (dumpsys_generic(di)); -} - -#endif /* !_MACHINE_DUMP_H_ */ diff --git a/sys/powerpc/include/efi.h b/sys/powerpc/include/efi.h deleted file mode 100644 index 394e696bdd9..00000000000 --- a/sys/powerpc/include/efi.h +++ /dev/null @@ -1,12 +0,0 @@ -/*- - * This file is in the public domain since it's just boilerplate. - */ - -#ifndef __POWERPC_INCLUDE_EFI_H_ -#define __POWERPC_INCLUDE_EFI_H_ - -#define EFIABI_ATTR - -/* Note: we don't actually support this on powerpc */ - -#endif /* __POWERPC_INCLUDE_EFI_H_ */ diff --git a/sys/powerpc/include/elf.h b/sys/powerpc/include/elf.h deleted file mode 100644 index bcfa793540d..00000000000 --- a/sys/powerpc/include/elf.h +++ /dev/null @@ -1,146 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2001 David E. O'Brien - * Copyright (c) 1996-1997 John D. Polstra. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_ELF_H_ -#define _MACHINE_ELF_H_ 1 - -/* - * EABI ELF definitions for the PowerPC architecture. - * See "PowerPC Embedded Application Binary Interface, 32-Bit Impliementation" - * [ppc-eabi-1995-01.pdf] for details. - */ - -#ifndef __ELF_WORD_SIZE -#ifdef __powerpc64__ -#define __ELF_WORD_SIZE 64 /* Used by */ -#else -#define __ELF_WORD_SIZE 32 /* Used by */ -#endif -#endif - -#include /* Definitions common to all 32 bit architectures. */ -#include /* Definitions common to all 64 bit architectures. */ -#include - -#if __ELF_WORD_SIZE == 64 -#define ELF_ARCH EM_PPC64 -#define ELF_MACHINE_OK(x) ((x) == EM_PPC64) -#else -#define ELF_ARCH EM_PPC -#define ELF_ARCH32 EM_PPC -#define ELF_MACHINE_OK(x) ((x) == EM_PPC) -#endif - -/* - * Auxiliary vector entries for passing information to the interpreter. - * - * The PowerPC supplement to the SVR4 ABI specification names this "auxv_t", - * but POSIX lays claim to all symbols ending with "_t". - */ - -typedef struct { /* Auxiliary vector entry on initial stack */ - int a_type; /* Entry type. */ - union { -#ifdef __powerpc64__ - int a_val; /* Integer value */ -#else - long a_val; /* Integer value. */ - void *a_ptr; /* Address. */ - void (*a_fcn)(void); /* Function pointer (not used). */ -#endif - } a_un; -} Elf32_Auxinfo; - -typedef struct { /* Auxiliary vector entry on initial stack */ - long a_type; /* Entry type. */ - union { - long a_val; /* Integer value. */ - void *a_ptr; /* Address. */ - void (*a_fcn)(void); /* Function pointer (not used). */ - } a_un; -} Elf64_Auxinfo; - -__ElfType(Auxinfo); - -/* - * Relocation types. - */ - -#define R_PPC_COUNT 37 /* Count of defined relocation types. */ - - /* Count of defined relocation types. */ -#define R_PPC_EMB_COUNT (R_PPC_EMB_RELSDA - R_PPC_EMB_NADDR32 + 1) - -/* Define "machine" characteristics */ -#if BYTE_ORDER == LITTLE_ENDIAN -#define ELF_TARG_DATA ELFDATA2LSB -#else -#define ELF_TARG_DATA ELFDATA2MSB -#endif -#if __ELF_WORD_SIZE == 64 -#define ELF_TARG_CLASS ELFCLASS64 -#define ELF_TARG_MACH EM_PPC64 -#define ELF_TARG_VER 1 -#else -#define ELF_TARG_CLASS ELFCLASS32 -#define ELF_TARG_MACH EM_PPC -#define ELF_TARG_VER 1 -#endif - -#define ET_DYN_LOAD_ADDR 0x01010000 - -#define AT_OLD_NULL AT_NULL -#define AT_OLD_IGNORE AT_IGNORE -#define AT_OLD_EXECFD AT_EXECFD -#define AT_OLD_PHDR AT_PHDR -#define AT_OLD_PHENT AT_PHENT -#define AT_OLD_PHNUM AT_PHNUM -#define AT_OLD_PAGESZ AT_PAGESZ -#define AT_OLD_BASE AT_BASE -#define AT_OLD_FLAGS AT_FLAGS -#define AT_OLD_ENTRY AT_ENTRY -#define AT_OLD_NOTELF AT_NOTELF -#define AT_OLD_UID AT_UID -#define AT_OLD_EUID AT_EUID -#define AT_OLD_EXECPATH 13 -#define AT_OLD_CANARY 14 -#define AT_OLD_CANARYLEN 15 -#define AT_OLD_OSRELDATE 16 -#define AT_OLD_NCPUS 17 -#define AT_OLD_PAGESIZES 18 -#define AT_OLD_PAGESIZESLEN 19 -#define AT_OLD_STACKPROT 21 -#define AT_OLD_TIMEKEEP AT_TIMEKEEP -#define AT_OLD_EHDRFLAGS AT_EHDRFLAGS -#define AT_OLD_HWCAP AT_HWCAP -#define AT_OLD_HWCAP2 AT_HWCAP2 - -#define AT_OLD_COUNT 27 /* Count of defined aux entry types. */ - -#endif /* !_MACHINE_ELF_H_ */ diff --git a/sys/powerpc/include/endian.h b/sys/powerpc/include/endian.h deleted file mode 100644 index 0d8a0145788..00000000000 --- a/sys/powerpc/include/endian.h +++ /dev/null @@ -1,40 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1987, 1991, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)endian.h 8.1 (Berkeley) 6/10/93 - */ - -#ifndef _MACHINE_ENDIAN_H_ -#define _MACHINE_ENDIAN_H_ - -#include -#include - -#endif /* !_MACHINE_ENDIAN_H_ */ diff --git a/sys/powerpc/include/exec.h b/sys/powerpc/include/exec.h deleted file mode 100644 index cb06d086dbd..00000000000 --- a/sys/powerpc/include/exec.h +++ /dev/null @@ -1,37 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2001 David E. O'Brien - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY JOHN BIRRELL AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_EXEC_H_ -#define _MACHINE_EXEC_H_ - -#define __LDPGSZ 4096 - -#endif /* !_MACHINE_EXEC_H_ */ diff --git a/sys/powerpc/include/float.h b/sys/powerpc/include/float.h deleted file mode 100644 index 7e327bba4f6..00000000000 --- a/sys/powerpc/include/float.h +++ /dev/null @@ -1,100 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1989 Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)float.h 7.1 (Berkeley) 5/8/90 - * from: FreeBSD: src/sys/i386/include/float.h,v 1.8 1999/08/28 00:44:11 - */ - -#ifndef _MACHINE_FLOAT_H_ -#define _MACHINE_FLOAT_H_ 1 - -#include - -#ifndef _SOFT_FLOAT -__BEGIN_DECLS -extern int __flt_rounds(void); -__END_DECLS -#define FLT_ROUNDS __flt_rounds() -#else -#define FLT_ROUNDS (-1) -#endif - -#define FLT_RADIX 2 /* b */ -#if __ISO_C_VISIBLE >= 1999 -#define FLT_EVAL_METHOD 0 -#define DECIMAL_DIG 17 /* max precision in decimal digits */ -#endif - -#define FLT_MANT_DIG 24 /* p */ -#define FLT_EPSILON 1.19209290E-07F /* b**(1-p) */ -#define FLT_DIG 6 /* floor((p-1)*log10(b))+(b == 10) */ -#define FLT_MIN_EXP (-125) /* emin */ -#define FLT_MIN 1.17549435E-38F /* b**(emin-1) */ -#define FLT_MIN_10_EXP (-37) /* ceil(log10(b**(emin-1))) */ -#define FLT_MAX_EXP 128 /* emax */ -#define FLT_MAX 3.40282347E+38F /* (1-b**(-p))*b**emax */ -#define FLT_MAX_10_EXP 38 /* floor(log10((1-b**(-p))*b**emax)) */ -#if __ISO_C_VISIBLE >= 2011 -#define FLT_TRUE_MIN 1.40129846E-45F /* b**(emin-p) */ -#define FLT_DECIMAL_DIG 9 /* ceil(1+p*log10(b)) */ -#define FLT_HAS_SUBNORM 1 -#endif /* __ISO_C_VISIBLE >= 2011 */ - -#define DBL_MANT_DIG 53 -#define DBL_EPSILON 2.2204460492503131E-16 -#define DBL_DIG 15 -#define DBL_MIN_EXP (-1021) -#define DBL_MIN 2.2250738585072014E-308 -#define DBL_MIN_10_EXP (-307) -#define DBL_MAX_EXP 1024 -#define DBL_MAX 1.7976931348623157E+308 -#define DBL_MAX_10_EXP 308 -#if __ISO_C_VISIBLE >= 2011 -#define DBL_TRUE_MIN 4.9406564584124654E-324 -#define DBL_DECIMAL_DIG 17 -#define DBL_HAS_SUBNORM 1 -#endif /* __ISO_C_VISIBLE >= 2011 */ - -#define LDBL_MANT_DIG DBL_MANT_DIG -#define LDBL_EPSILON ((long double)DBL_EPSILON) -#define LDBL_DIG DBL_DIG -#define LDBL_MIN_EXP DBL_MIN_EXP -#define LDBL_MIN ((long double)DBL_MIN) -#define LDBL_MIN_10_EXP DBL_MIN_10_EXP -#define LDBL_MAX_EXP DBL_MAX_EXP -#define LDBL_MAX ((long double)DBL_MAX) -#define LDBL_MAX_10_EXP DBL_MAX_10_EXP -#if __ISO_C_VISIBLE >= 2011 -#define LDBL_TRUE_MIN ((long double)DBL_TRUE_MIN) -#define LDBL_DECIMAL_DIG DBL_DECIMAL_DIG -#define LDBL_HAS_SUBNORM DBL_HAS_SUBNORM -#endif /* __ISO_C_VISIBLE >= 2011 */ - -#endif /* _MACHINE_FLOAT_H_ */ diff --git a/sys/powerpc/include/floatingpoint.h b/sys/powerpc/include/floatingpoint.h deleted file mode 100644 index 9d6558c0539..00000000000 --- a/sys/powerpc/include/floatingpoint.h +++ /dev/null @@ -1,37 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2004 Suleiman Souhlal - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY DAVID O'BRIEN AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _FLOATINGPOINT_H_ -#define _FLOATINGPOINT_H_ - -#include - -#endif /* !_FLOATINGPOINT_H_ */ diff --git a/sys/powerpc/include/fpu.h b/sys/powerpc/include/fpu.h deleted file mode 100644 index 30df3a470b0..00000000000 --- a/sys/powerpc/include/fpu.h +++ /dev/null @@ -1,82 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1996 Wolfgang Solfrank. - * Copyright (C) 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: fpu.h,v 1.2 1999/12/07 15:14:56 danw Exp $ - */ - -#ifndef _MACHINE_FPU_H_ -#define _MACHINE_FPU_H_ - -#define FPSCR_FX 0x80000000 -#define FPSCR_FEX 0x40000000 -#define FPSCR_VX 0x20000000 -#define FPSCR_OX 0x10000000 -#define FPSCR_UX 0x08000000 -#define FPSCR_ZX 0x04000000 -#define FPSCR_XX 0x02000000 -#define FPSCR_VXSNAN 0x01000000 -#define FPSCR_VXISI 0x00800000 -#define FPSCR_VXIDI 0x00400000 -#define FPSCR_VXZDZ 0x00200000 -#define FPSCR_VXIMZ 0x00100000 -#define FPSCR_VXVC 0x00080000 -#define FPSCR_FR 0x00040000 -#define FPSCR_FI 0x00020000 -#define FPSCR_FPRF 0x0001f000 -#define FPSCR_C 0x00010000 -#define FPSCR_FPCC 0x0000f000 -#define FPSCR_FL 0x00008000 -#define FPSCR_FG 0x00004000 -#define FPSCR_FE 0x00002000 -#define FPSCR_FU 0x00001000 -#define FPSCR_VXSOFT 0x00000400 -#define FPSCR_VXSQRT 0x00000200 -#define FPSCR_VXCVI 0x00000100 -#define FPSCR_VE 0x00000080 -#define FPSCR_OE 0x00000040 -#define FPSCR_UE 0x00000020 -#define FPSCR_ZE 0x00000010 -#define FPSCR_XE 0x00000008 -#define FPSCR_NI 0x00000004 -#define FPSCR_RN 0x00000003 - -#ifdef _KERNEL - -void enable_fpu(struct thread *); -void save_fpu(struct thread *); -void save_fpu_nodrop(struct thread *); -void cleanup_fpscr(void); -u_int get_fpu_exception(struct thread *); - -#endif /* _KERNEL */ - -#endif /* _MACHINE_FPU_H_ */ diff --git a/sys/powerpc/include/frame.h b/sys/powerpc/include/frame.h deleted file mode 100644 index 0841477d5fe..00000000000 --- a/sys/powerpc/include/frame.h +++ /dev/null @@ -1,114 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: frame.h,v 1.2 1999/01/10 10:13:15 tsubai Exp $ - */ - -#ifndef _MACHINE_FRAME_H_ -#define _MACHINE_FRAME_H_ - -#include - -/* - * We have to save all registers on every trap, because - * 1. user could attach this process every time - * 2. we must be able to restore all user registers in case of fork - * Actually, we do not save the fp registers on trap, since - * these are not used by the kernel. They are saved only when switching - * between processes using the FPU. - * - * Change ordering to cluster together these register_t's. XXX - */ -struct trapframe { - register_t fixreg[32]; - register_t lr; - register_t cr; - register_t xer; - register_t ctr; - register_t srr0; - register_t srr1; - register_t exc; - register_t dar; /* DAR/DEAR filled in on DSI traps */ - union { - struct { - /* dsisr only filled on a DSI trap */ - register_t dsisr; - } aim; - struct { - register_t esr; - register_t dbcr0; - } booke; - } cpu; -}; - -/* - * FRAMELEN is the size of the stack region used by the low-level trap - * handler. It is the size of its data (trapframe) plus the callframe - * header (sizeof(struct callframe) - 3 register widths). It must also - * be 16-byte aligned. - */ -#define FRAMELEN roundup(sizeof(struct trapframe) + \ - sizeof(struct callframe) - 3*sizeof(register_t), 16) -#define trapframe(td) ((td)->td_frame) - -/* - * Call frame for PowerPC used during fork. - */ -#ifdef __powerpc64__ -struct callframe { - register_t cf_dummy_fp; /* dummy frame pointer */ - register_t cf_cr; - register_t cf_lr; - register_t cf_compiler; - register_t cf_linkeditor; - register_t cf_toc; - register_t cf_func; - register_t cf_arg0; - register_t cf_arg1; - register_t _padding; /* Maintain 16-byte alignment */ -}; -#else -struct callframe { - register_t cf_dummy_fp; /* dummy frame pointer */ - register_t cf_lr; /* space for link register save */ - register_t cf_func; - register_t cf_arg0; - register_t cf_arg1; - register_t _padding; /* Maintain 16-byte alignment */ -}; -#endif - -/* Definitions for syscalls */ -#define FIRSTARG 3 /* first arg in reg 3 */ -#define NARGREG 8 /* 8 args in regs */ - -#endif /* _MACHINE_FRAME_H_ */ diff --git a/sys/powerpc/include/gdb_machdep.h b/sys/powerpc/include/gdb_machdep.h deleted file mode 100644 index c37dc7a8ee3..00000000000 --- a/sys/powerpc/include/gdb_machdep.h +++ /dev/null @@ -1,140 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE_GDB_MACHDEP_H_ -#define _MACHINE_GDB_MACHDEP_H_ - -#ifdef BOOKE -#define PPC_GDB_NREGS0 1 -#define PPC_GDB_NREGS4 (70 + 1) -#define PPC_GDB_NREGS8 (1 + 32) -#define PPC_GDB_NREGS16 0 - -#else -/* - * 0 - 32*GPR(4/8) - * 32 - 32*FPR(8) - * 64 - PC, PS (4/8) - * 66 - CR (4) - * 67 - LR, CTR (4/8) - * 69 - XER, FPSCR (4) - * 71 - 32*VR(16) - * 103 - VSCR, VRSAVE (4) - */ - -#define PPC_REGNUM_R0 0 -#define PPC_REGNUM_R31 (PPC_REGNUM_R0 + 31) -#define PPC_REGNUM_FR0 32 -#define PPC_REGNUM_FR31 (PPC_REGNUM_FR0 + 31) -#define PPC_REGNUM_PC 64 -#define PPC_REGNUM_PS 65 -#define PPC_REGNUM_CR 66 -#define PPC_REGNUM_LR 67 -#define PPC_REGNUM_CTR 68 -#define PPC_REGNUM_XER 69 -#define PPC_REGNUM_FPSCR 70 -#define PPC_REGNUM_VR0 71 -#define PPC_REGNUM_VR31 (PPC_REGNUM_VR0 + 31) - -#define PPC_GDB_NREGS0 0 - -#ifdef __powerpc64__ -#define PPC_GDB_NREGS4 5 -#define PPC_GDB_NREGS8 (64 + 4) -#else -#define PPC_GDB_NREGS4 (32 + 7 + 2) -#define PPC_GDB_NREGS8 32 -#endif - -#define PPC_GDB_NREGS16 32 -#endif - -#define GDB_NREGS (PPC_GDB_NREGS0 + PPC_GDB_NREGS4 + \ - PPC_GDB_NREGS8 + PPC_GDB_NREGS16) -#define GDB_REG_PC 64 - -#define GDB_BUFSZ (PPC_GDB_NREGS4 * 8 + \ - PPC_GDB_NREGS8 * 16 + \ - PPC_GDB_NREGS16 * 32) - -static __inline size_t -gdb_cpu_regsz(int regnum) -{ - -#ifdef BOOKE - if (regnum == 70) - return (0); - if (regnum == 71 || regnum >= 73) - return (8); -#else -#ifdef __powerpc64__ - if ((regnum >= PPC_REGNUM_R0 && regnum <= PPC_REGNUM_PS) || - regnum == PPC_REGNUM_LR || regnum == PPC_REGNUM_CTR) - return (8); -#else - if (regnum >= PPC_REGNUM_FR0 && regnum <= PPC_REGNUM_FR31) - return (8); -#endif - if (regnum >= PPC_REGNUM_VR0 && regnum <= PPC_REGNUM_VR31) - return (16); -#endif - return (4); -} - -static __inline int -gdb_cpu_query(void) -{ - - return (0); -} - -static __inline void * -gdb_begin_write(void) -{ - - return (NULL); -} - -static __inline void -gdb_end_write(void *arg __unused) -{ - -} - -static __inline void -gdb_cpu_stop_reason(int type __unused, int code __unused) -{ - -} - -void *gdb_cpu_getreg(int, size_t *); -void gdb_cpu_setreg(int, void *); -int gdb_cpu_signal(int, int); -void gdb_cpu_do_offsets(void); - -#endif /* !_MACHINE_GDB_MACHDEP_H_ */ diff --git a/sys/powerpc/include/hid.h b/sys/powerpc/include/hid.h deleted file mode 100644 index 090dd687d63..00000000000 --- a/sys/powerpc/include/hid.h +++ /dev/null @@ -1,223 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2000 Tsubai Masanari. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: hid.h,v 1.2 2001/08/22 21:05:25 matt Exp $ - */ - -#ifndef _POWERPC_HID_H_ -#define _POWERPC_HID_H_ - -/* Hardware Implementation Dependent registers for the PowerPC */ -#define HID0_RADIX 0x0080000000000000 /* Enable Radix page tables (POWER9) */ - -#define HID0_EMCP 0x80000000 /* Enable machine check pin */ -#define HID0_DBP 0x40000000 /* Disable 60x bus parity generation */ -#define HID0_EBA 0x20000000 /* Enable 60x bus address parity checking */ -#define HID0_EBD 0x10000000 /* Enable 60x bus data parity checking */ -#define HID0_BCLK 0x08000000 /* CLK_OUT clock type selection */ -#define HID0_EICE 0x04000000 /* Enable ICE output */ -#define HID0_ECLK 0x02000000 /* CLK_OUT clock type selection */ -#define HID0_PAR 0x01000000 /* Disable precharge of ARTRY */ -#define HID0_STEN 0x01000000 /* Software table search enable (7450) */ -#define HID0_DEEPNAP 0x01000000 /* Enable deep nap mode (970) */ -#define HID0_HBATEN 0x00800000 /* High BAT enable (74[45][578]) */ -#define HID0_DOZE 0x00800000 /* Enable doze mode */ -#define HID0_NAP 0x00400000 /* Enable nap mode */ -#define HID0_SLEEP 0x00200000 /* Enable sleep mode */ -#define HID0_DPM 0x00100000 /* Enable Dynamic power management */ -#define HID0_RISEG 0x00080000 /* Read I-SEG */ -#define HID0_TG 0x00040000 /* Timebase Granularity (OEA64) */ -#define HID0_BHTCLR 0x00040000 /* Clear branch history table (7450) */ -#define HID0_EIEC 0x00040000 /* Enable internal error checking */ -#define HID0_XAEN 0x00020000 /* Enable eXtended Addressing (7450) */ -#define HID0_NHR 0x00010000 /* Not hard reset */ -#define HID0_ICE 0x00008000 /* Enable i-cache */ -#define HID0_DCE 0x00004000 /* Enable d-cache */ -#define HID0_ILOCK 0x00002000 /* i-cache lock */ -#define HID0_DLOCK 0x00001000 /* d-cache lock */ -#define HID0_ICFI 0x00000800 /* i-cache flush invalidate */ -#define HID0_DCFI 0x00000400 /* d-cache flush invalidate */ -#define HID0_SPD 0x00000200 /* Disable speculative cache access */ -#define HID0_XBSEN 0x00000100 /* Extended BAT block-size enable (7457) */ -#define HID0_IFEM 0x00000100 /* Enable M-bit for I-fetch */ -#define HID0_XBSEN 0x00000100 /* Extended BAT block size enable (7455+)*/ -#define HID0_SGE 0x00000080 /* Enable store gathering */ -#define HID0_DCFA 0x00000040 /* Data cache flush assist */ -#define HID0_BTIC 0x00000020 /* Enable BTIC */ -#define HID0_LRSTK 0x00000010 /* Link register stack enable (7450) */ -#define HID0_ABE 0x00000008 /* Enable address broadcast */ -#define HID0_FOLD 0x00000008 /* Branch folding enable (7450) */ -#define HID0_BHT 0x00000004 /* Enable branch history table */ -#define HID0_NOPTI 0x00000001 /* No-op the dcbt(st) */ - -#define HID0_AIM_TBEN 0x04000000 /* Time base enable (7450) */ - -#define HID0_E500_TBEN 0x00004000 /* Time Base and decr. enable */ -#define HID0_E500_SEL_TBCLK 0x00002000 /* Select Time Base clock */ -#define HID0_E500_MAS7UPDEN 0x00000080 /* Enable MAS7 update (e500v2) */ - -#define HID0_E500MC_L2MMU_MHD 0x40000000 /* L2MMU Multiple Hit Detection */ - -#define HID0_BITMASK \ - "\20" \ - "\040EMCP\037DBP\036EBA\035EBD\034BCLK\033EICE\032ECLK\031PAR" \ - "\030DOZE\027NAP\026SLEEP\025DPM\024RISEG\023EIEC\022res\021NHR" \ - "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011IFEM" \ - "\010SGE\007DCFA\006BTIC\005FBIOB\004ABE\003BHT\002NOPDST\001NOPTI" - -#define HID0_7450_BITMASK \ - "\20" \ - "\040EMCP\037b1\036b2\035b3\034b4\033TBEN\032b6\031STEN" \ - "\030HBATEN\027NAP\026SLEEP\025DPM\024b12\023BHTCLR\022XAEN\021NHR" \ - "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011XBSEN" \ - "\010SGE\007b25\006BTIC\005LRSTK\004FOLD\003BHT\002NOPDST\001NOPTI" - -#define HID0_E500_BITMASK \ - "\20" \ - "\040EMCP\037b1\036b2\035b3\034b4\033b5\032b6\031b7" \ - "\030DOZE\027NAP\026SLEEP\025b11\024b12\023b13\022b14\021b15" \ - "\020b16\017TBEN\016SEL_TBCLK\015b19\014b20\013b21\012b22\011b23" \ - "\010EN_MAS7_UPDATE\007DCFA\006b26\005b27\004b28\003b29\002b30\001NOPTI" - -#define HID0_970_BITMASK \ - "\20" \ - "\040ONEPPC\037SINGLE\036ISYNCSC\035SERGP\031DEEPNAP\030DOZE" \ - "\027NAP\025DPM\023TG\022HANGDETECT\021NHR\020INORDER" \ - "\016TBCTRL\015TBEN\012CIABREN\011HDICEEN\001ENATTN" - -#define HID0_E500MC_BITMASK \ - "\20" \ - "\040EMCP\037EN_L2MMU_MHD\036b2\035b3\034b4\033b5\032b6\031b7" \ - "\030b8\027b9\026b10\025b11\024b12\023b13\022b14\021b15" \ - "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23" \ - "\010EN_MAS7_UPDATE\007DCFA\006b26\005CIGLSO\004b28\003b29\002b30\001NOPTI" - -#define HID0_E5500_BITMASK \ - "\20" \ - "\040EMCP\037EN_L2MMU_MHD\036b2\035b3\034b4\033b5\032b6\031b7" \ - "\030b8\027b9\026b10\025b11\024b12\023b13\022b14\021b15" \ - "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23" \ - "\010b24\007DCFA\006b26\005CIGLSO\004b28\003b29\002b30\001NOPTI" - -/* - * HID0 bit definitions per cpu model - * - * bit 603 604 750 7400 7410 7450 7457 e500 - * 0 EMCP EMCP EMCP EMCP EMCP - - EMCP - * 1 - ECP DBP - - - - - - * 2 EBA EBA EBA EBA EDA - - - - * 3 EBD EBD EBD EBD EBD - - - - * 4 SBCLK - BCLK BCKL BCLK - - - - * 5 EICE - - - - TBEN TBEN - - * 6 ECLK - ECLK ECLK ECLK - - - - * 7 PAR PAR PAR PAR PAR STEN STEN - - * 8 DOZE - DOZE DOZE DOZE - HBATEN DOZE - * 9 NAP - NAP NAP NAP NAP NAP NAP - * 10 SLEEP - SLEEP SLEEP SLEEP SLEEP SLEEP SLEEP - * 11 DPM - DPM DPM DPM DPM DPM - - * 12 RISEG - - RISEG - - - - - * 13 - - - EIEC EIEC BHTCLR BHTCLR - - * 14 - - - - - XAEN XAEN - - * 15 - NHR NHR NHR NHR NHR NHR - - * 16 ICE ICE ICE ICE ICE ICE ICE - - * 17 DCE DCE DCE DCE DCE DCE DCE TBEN - * 18 ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK SEL_TBCLK - * 19 DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK - - * 20 ICFI ICFI ICFI ICFI ICFI ICFI ICFI - - * 21 DCFI DCFI DCFI DCFI DCFI DCFI DCFI - - * 22 - - SPD SPD SPG SPD SPD - - * 23 - - IFEM IFTT IFTT - XBSEN - - * 24 - SIE SGE SGE SGE SGE SGE EN_MAS7_UPDATE - * 25 - - DCFA DCFA DCFA - - DCFA - * 26 - - BTIC BTIC BTIC BTIC BTIC - - * 27 FBIOB - - - - LRSTK LRSTK - - * 28 - - ABE - - FOLD FOLD - - * 29 - BHT BHT BHT BHT BHT BHT - - * 30 - - - NOPDST NOPDST NOPDST NOPDST - - * 31 NOOPTI - NOOPTI NOPTI NOPTI NOPTI NOPTI NOPTI - * - * bit e500mc e5500 - * 0 EMCP EMCP - * 1 EN_L2MMU_MHD EN_L2MMU_MHD - * 2 - - - * 3 - - - * 4 - - - * 5 - - - * 6 - - - * 7 - - - * 8 - - - * 9 - - - * 10 - - - * 11 - - - * 12 - - - * 13 - - - * 14 - - - * 15 - - - * 16 - - - * 17 - - - * 18 - - - * 19 - - - * 20 - - - * 21 - - - * 22 - - - * 23 - - - * 24 EN_MAS7_UPDATE - - * 25 DCFA DCFA - * 26 - - - * 27 CIGLSO CIGLSO - * 28 - - - * 29 - - - * 30 - - - * 31 NOPTI NOPTI - * - * 604: ECP = Enable cache parity checking - * 604: SIE = Serial instruction execution disable - * 7450: TBEN = Time Base Enable - * 7450: STEN = Software table lookup enable - * 7450: BHTCLR = Branch history clear - * 7450: XAEN = Extended Addressing Enabled - * 7450: LRSTK = Link Register Stack Enable - * 7450: FOLD = Branch folding enable - * 7457: HBATEN = High BAT Enable - * 7457: XBSEN = Extended BAT Block Size Enable - */ - -#define HID1_E500_ABE 0x00001000 /* Address broadcast enable */ -#define HID1_E500_ASTME 0x00002000 /* Address bus streaming mode enable */ -#define HID1_E500_RFXE 0x00020000 /* Read fault exception enable */ - -#define HID0_E500_DEFAULT_SET (HID0_EMCP | HID0_E500_TBEN | \ - HID0_E500_MAS7UPDEN) -#define HID1_E500_DEFAULT_SET (HID1_E500_ABE | HID1_E500_ASTME) -#define HID0_E500MC_DEFAULT_SET (HID0_EMCP | HID0_E500MC_L2MMU_MHD | \ - HID0_E500_MAS7UPDEN) -#define HID0_E5500_DEFAULT_SET (HID0_EMCP | HID0_E500MC_L2MMU_MHD) - -#define HID5_970_DCBZ_SIZE_HI 0x00000080UL /* dcbz does a 32-byte store */ -#define HID4_970_DISABLE_LG_PG 0x00000004ULL /* disables large pages */ - -#endif /* _POWERPC_HID_H_ */ diff --git a/sys/powerpc/include/ieee.h b/sys/powerpc/include/ieee.h deleted file mode 100644 index aefa3e9b4cf..00000000000 --- a/sys/powerpc/include/ieee.h +++ /dev/null @@ -1,143 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - * - * This software was developed by the Computer Systems Engineering group - * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and - * contributed to Berkeley. - * - * All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Lawrence Berkeley Laboratory. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)ieee.h 8.1 (Berkeley) 6/11/93 - * from: NetBSD: ieee.h,v 1.1.1.1 1998/06/20 04:58:51 eeh Exp - */ - -#ifndef _MACHINE_IEEE_H_ -#define _MACHINE_IEEE_H_ - -/* - * ieee.h defines the machine-dependent layout of the machine's IEEE - * floating point. It does *not* define (yet?) any of the rounding - * mode bits, exceptions, and so forth. - */ - -/* - * Define the number of bits in each fraction and exponent. - * - * k k+1 - * Note that 1.0 x 2 == 0.1 x 2 and that denorms are represented - * - * (-exp_bias+1) - * as fractions that look like 0.fffff x 2 . This means that - * - * -126 - * the number 0.10000 x 2 , for instance, is the same as the normalized - * - * -127 -128 - * float 1.0 x 2 . Thus, to represent 2 , we need one leading zero - * - * -129 - * in the fraction; to represent 2 , we need two, and so on. This - * - * (-exp_bias-fracbits+1) - * implies that the smallest denormalized number is 2 - * - * for whichever format we are talking about: for single precision, for - * - * -126 -149 - * instance, we get .00000000000000000000001 x 2 , or 1.0 x 2 , and - * - * -149 == -127 - 23 + 1. - */ -#define SNG_EXPBITS 8 -#define SNG_FRACBITS 23 - -#define DBL_EXPBITS 11 -#define DBL_FRACBITS 52 - -#ifdef notyet -#define E80_EXPBITS 15 -#define E80_FRACBITS 64 -#endif - -#define EXT_EXPBITS 15 -#define EXT_FRACBITS 112 - -struct ieee_single { - u_int sng_sign:1; - u_int sng_exp:8; - u_int sng_frac:23; -}; - -struct ieee_double { - u_int dbl_sign:1; - u_int dbl_exp:11; - u_int dbl_frach:20; - u_int dbl_fracl; -}; - -struct ieee_ext { - u_int ext_sign:1; - u_int ext_exp:15; - u_int ext_frach:16; - u_int ext_frachm; - u_int ext_fraclm; - u_int ext_fracl; -}; - -/* - * Floats whose exponent is in [1..INFNAN) (of whatever type) are - * `normal'. Floats whose exponent is INFNAN are either Inf or NaN. - * Floats whose exponent is zero are either zero (iff all fraction - * bits are zero) or subnormal values. - * - * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its - * high fraction; if the bit is set, it is a `quiet NaN'. - */ -#define SNG_EXP_INFNAN 255 -#define DBL_EXP_INFNAN 2047 -#define EXT_EXP_INFNAN 32767 - -#if 0 -#define SNG_QUIETNAN (1 << 22) -#define DBL_QUIETNAN (1 << 19) -#define EXT_QUIETNAN (1 << 15) -#endif - -/* - * Exponent biases. - */ -#define SNG_EXP_BIAS 127 -#define DBL_EXP_BIAS 1023 -#define EXT_EXP_BIAS 16383 - -#endif diff --git a/sys/powerpc/include/ieeefp.h b/sys/powerpc/include/ieeefp.h deleted file mode 100644 index 3aa92ff4522..00000000000 --- a/sys/powerpc/include/ieeefp.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - - * Written by J.T. Conklin, Apr 6, 1995 - * Public domain. - * $NetBSD: ieeefp.h,v 1.2 1999/07/07 01:52:26 danw Exp $ - */ - -#ifndef _MACHINE_IEEEFP_H_ -#define _MACHINE_IEEEFP_H_ - -/* Deprecated historical FPU control interface */ - -typedef int fp_except_t; -#ifdef __SPE__ -#define FP_X_OFL 0x01 /* overflow exception */ -#define FP_X_UFL 0x02 /* underflow exception */ -#define FP_X_DZ 0x04 /* divide-by-zero exception */ -#define FP_X_INV 0x08 /* invalid operation exception */ -#define FP_X_IMP 0x10 /* imprecise (loss of precision) */ -#else -#define FP_X_IMP 0x01 /* imprecise (loss of precision) */ -#define FP_X_DZ 0x02 /* divide-by-zero exception */ -#define FP_X_UFL 0x04 /* underflow exception */ -#define FP_X_OFL 0x08 /* overflow exception */ -#define FP_X_INV 0x10 /* invalid operation exception */ -#endif - -typedef enum { - FP_RN=0, /* round to nearest representable number */ - FP_RZ=1, /* round to zero (truncate) */ - FP_RP=2, /* round toward positive infinity */ - FP_RM=3 /* round toward negative infinity */ -} fp_rnd_t; - -__BEGIN_DECLS -extern fp_rnd_t fpgetround(void); -extern fp_rnd_t fpsetround(fp_rnd_t); -extern fp_except_t fpgetmask(void); -extern fp_except_t fpsetmask(fp_except_t); -extern fp_except_t fpgetsticky(void); -__END_DECLS - -#endif /* _MACHINE_IEEEFP_H_ */ diff --git a/sys/powerpc/include/ifunc.h b/sys/powerpc/include/ifunc.h deleted file mode 100644 index eac6019b07d..00000000000 --- a/sys/powerpc/include/ifunc.h +++ /dev/null @@ -1,58 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2019 Brandon Bergren - * Copyright (c) 2015-2018 The FreeBSD Foundation. All rights reserved. - * - * Part of this software was developed by - * Konstantin Belousov - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef __POWERPC_IFUNC_H -#define __POWERPC_IFUNC_H - -#include - -#define DEFINE_IFUNC(qual, ret_type, name, args) \ - static ret_type (*name##_resolver(void))args __used; \ - qual ret_type name args __attribute__((ifunc(#name "_resolver"))); \ - static ret_type (*name##_resolver(void))args - -#define DEFINE_UIFUNC(qual, ret_type, name, args) \ - static ret_type (*name##_resolver(register_t, register_t, \ - register_t, register_t, register_t, register_t, register_t, \ - register_t))args __used; \ - qual ret_type name args __attribute__((ifunc(#name "_resolver"))); \ - static ret_type (*name##_resolver( \ - register_t cpu_features, \ - register_t cpu_features2, \ - register_t arg3 __unused, \ - register_t arg4 __unused, \ - register_t arg5 __unused, \ - register_t arg6 __unused, \ - register_t arg7 __unused, \ - register_t arg8 __unused))args - -#endif diff --git a/sys/powerpc/include/in_cksum.h b/sys/powerpc/include/in_cksum.h deleted file mode 100644 index 694a952bbe2..00000000000 --- a/sys/powerpc/include/in_cksum.h +++ /dev/null @@ -1,52 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1990 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from tahoe: in_cksum.c 1.2 86/01/05 - * from: @(#)in_cksum.c 1.3 (Berkeley) 1/19/91 - * from: Id: in_cksum.c,v 1.8 1995/12/03 18:35:19 bde Exp - */ - -#ifndef _MACHINE_IN_CKSUM_H_ -#define _MACHINE_IN_CKSUM_H_ 1 - -#include - -#define in_cksum(m, len) in_cksum_skip(m, len, 0) - -#ifdef _KERNEL -#if defined(IPVERSION) && (IPVERSION == 4) -u_int in_cksum_hdr(const struct ip *ip); -#endif -u_short in_addword(u_short sum, u_short b); -u_short in_pseudo(u_int sum, u_int b, u_int c); -u_short in_cksum_skip(struct mbuf *m, int len, int skip); -#endif - -#endif /* _MACHINE_IN_CKSUM_H_ */ diff --git a/sys/powerpc/include/intr_machdep.h b/sys/powerpc/include/intr_machdep.h deleted file mode 100644 index e46e2b5f9ba..00000000000 --- a/sys/powerpc/include/intr_machdep.h +++ /dev/null @@ -1,64 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2002 Benno Rice. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE_INTR_MACHDEP_H_ -#define _MACHINE_INTR_MACHDEP_H_ - -#define INTR_VECTORS 256 - -#define MAX_PICS 32 -#define MAP_IRQ(node, pin) powerpc_get_irq(node, pin) - -/* - * Default base address for MSI messages on PowerPC - */ -#define MSI_INTEL_ADDR_BASE 0xfee00000 - -extern device_t root_pic; - -struct trapframe; - -driver_filter_t powerpc_ipi_handler; - -void intrcnt_add(const char *name, u_long **countp); - -u_int powerpc_register_pic(device_t, uint32_t, u_int, u_int, u_int); -u_int powerpc_get_irq(uint32_t, u_int); - -void powerpc_dispatch_intr(u_int, struct trapframe *); -int powerpc_enable_intr(void); -int powerpc_setup_intr(const char *, u_int, driver_filter_t, driver_intr_t, - void *, enum intr_type, void **, int); -int powerpc_teardown_intr(void *); -int powerpc_bind_intr(u_int irq, u_char cpu); -int powerpc_config_intr(int, enum intr_trigger, enum intr_polarity); -int powerpc_fw_config_intr(int irq, int sense_code); - -void powerpc_intr_mask(u_int irq); -void powerpc_intr_unmask(u_int irq); - -#endif /* _MACHINE_INTR_MACHDEP_H_ */ diff --git a/sys/powerpc/include/kdb.h b/sys/powerpc/include/kdb.h deleted file mode 100644 index 76c643bd3ad..00000000000 --- a/sys/powerpc/include/kdb.h +++ /dev/null @@ -1,69 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE_KDB_H_ -#define _MACHINE_KDB_H_ - -#include -#include -#include -#include -#include - -void kdb_cpu_clear_singlestep(void); -void kdb_cpu_set_singlestep(void); - -#define KDB_STOPPEDPCB(pc) &stoppcbs[pc->pc_cpuid] - -static __inline void -kdb_cpu_sync_icache(unsigned char *addr, size_t size) -{ - - __syncicache(addr, size); -} - -static __inline void -kdb_cpu_trap(int vector, int _) -{ -} - -static __inline int -kdb_cpu_set_watchpoint(vm_offset_t addr, vm_size_t size, int access) -{ - - return (ENXIO); -} - -static __inline int -kdb_cpu_clr_watchpoint(vm_offset_t addr, vm_size_t size) -{ - - return (0); -} - -#endif /* _MACHINE_KDB_H_ */ diff --git a/sys/powerpc/include/limits.h b/sys/powerpc/include/limits.h deleted file mode 100644 index 13ded39672a..00000000000 --- a/sys/powerpc/include/limits.h +++ /dev/null @@ -1,45 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1988, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)limits.h 8.3 (Berkeley) 1/4/94 - */ - -#ifndef _MACHINE_LIMITS_H_ -#define _MACHINE_LIMITS_H_ - -#include - -#ifdef __CC_SUPPORTS_WARNING -#warning "machine/limits.h is deprecated. Include sys/limits.h instead." -#endif - -#include - -#endif /* !_MACHINE_LIMITS_H_ */ diff --git a/sys/powerpc/include/machdep.h b/sys/powerpc/include/machdep.h deleted file mode 100644 index 86a0694a683..00000000000 --- a/sys/powerpc/include/machdep.h +++ /dev/null @@ -1,37 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011-2012 Semihalf - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _POWERPC_MACHDEP_H_ -#define _POWERPC_MACHDEP_H_ - -void booke_disable_l2_cache(void); -void booke_enable_l1_cache(void); -void booke_enable_l2_cache(void); -void booke_enable_bpred(void); - -#endif /* _POWERPC_MACHDEP_H_ */ diff --git a/sys/powerpc/include/md_var.h b/sys/powerpc/include/md_var.h deleted file mode 100644 index e995f0a91b6..00000000000 --- a/sys/powerpc/include/md_var.h +++ /dev/null @@ -1,71 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1998 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_MD_VAR_H_ -#define _MACHINE_MD_VAR_H_ - -/* - * Miscellaneous machine-dependent declarations. - */ - -extern char sigcode32[]; -extern int szsigcode32; - -#ifdef __powerpc64__ -extern char sigcode64[], sigcode64_elfv2[]; -extern int szsigcode64, szsigcode64_elfv2; - -struct dumperinfo; -struct minidumpstate; -int cpu_minidumpsys(struct dumperinfo *, const struct minidumpstate *); -#endif - -extern long Maxmem; - -extern vm_offset_t kstack0; -extern vm_offset_t kstack0_phys; - -extern int powerpc_pow_enabled; -extern int cacheline_size; -extern int hw_direct_map; - -void __syncicache(void *, int); - -int mem_valid(vm_offset_t addr, int len); - -void decr_init(void); -void decr_ap_init(void); -void decr_tc_init(void); - -void cpu_feature_setup(void); -void cpu_setup(u_int); - -struct trapframe; -void powerpc_interrupt(struct trapframe *); - -#endif /* !_MACHINE_MD_VAR_H_ */ diff --git a/sys/powerpc/include/memdev.h b/sys/powerpc/include/memdev.h deleted file mode 100644 index 02dd5896b5b..00000000000 --- a/sys/powerpc/include/memdev.h +++ /dev/null @@ -1,40 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2004 Mark R V Murray - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer - * in this position and unchanged. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE_MEMDEV_H_ -#define _MACHINE_MEMDEV_H_ - -#define CDEV_MINOR_MEM 0 -#define CDEV_MINOR_KMEM 1 - -d_open_t memopen; -d_read_t memrw; -d_ioctl_t memioctl_md; -d_mmap_t memmmap; - -#endif /* _MACHINE_MEMDEV_H_ */ diff --git a/sys/powerpc/include/metadata.h b/sys/powerpc/include/metadata.h deleted file mode 100644 index 6163f882e55..00000000000 --- a/sys/powerpc/include/metadata.h +++ /dev/null @@ -1,38 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2001 Jake Burkholder. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_METADATA_H_ -#define _MACHINE_METADATA_H_ - -#define MODINFOMD_ENVP 0x1001 -#define MODINFOMD_HOWTO 0x1002 -#define MODINFOMD_KERNEND 0x1003 -#define MODINFOMD_BOOTINFO 0x1004 -#define MODINFOMD_DTBP 0x1005 - -#endif /* !_MACHINE_METADATA_H_ */ diff --git a/sys/powerpc/include/minidump.h b/sys/powerpc/include/minidump.h deleted file mode 100644 index bef38c2cd70..00000000000 --- a/sys/powerpc/include/minidump.h +++ /dev/null @@ -1,52 +0,0 @@ -/*- - * Copyright (c) 2006 Peter Wemm - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * From i386: FreeBSD: 157909 2006-04-21 04:28:43Z peter - */ - -#ifndef _MACHINE_MINIDUMP_H_ -#define _MACHINE_MINIDUMP_H_ 1 - -#define MINIDUMP_MAGIC "minidump FreeBSD/powerpc64" -#define MINIDUMP_VERSION 2 - -struct minidumphdr { - char magic[32]; - char mmu_name[32]; - uint32_t version; - uint32_t msgbufsize; - uint32_t bitmapsize; - uint32_t pmapsize; - uint64_t kernbase; - uint64_t kernend; - uint64_t dmapbase; - uint64_t dmapend; - int hw_direct_map; - uint64_t startkernel; - uint64_t endkernel; - uint32_t dumpavailsize; -}; - -#endif /* _MACHINE_MINIDUMP_H_ */ diff --git a/sys/powerpc/include/mmuvar.h b/sys/powerpc/include/mmuvar.h deleted file mode 100644 index 4ff0f998f59..00000000000 --- a/sys/powerpc/include/mmuvar.h +++ /dev/null @@ -1,224 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2005 Peter Grehan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_MMUVAR_H_ -#define _MACHINE_MMUVAR_H_ - -typedef void (*pmap_bootstrap_t)(vm_offset_t, vm_offset_t); -typedef void (*pmap_cpu_bootstrap_t)(int); -typedef void (*pmap_kenter_t)(vm_offset_t, vm_paddr_t pa); -typedef void (*pmap_kenter_attr_t)(vm_offset_t, vm_paddr_t, vm_memattr_t); -typedef void (*pmap_kremove_t)(vm_offset_t); -typedef void *(*pmap_mapdev_t)(vm_paddr_t, vm_size_t); -typedef void *(*pmap_mapdev_attr_t)(vm_paddr_t, vm_size_t, vm_memattr_t); -typedef void (*pmap_unmapdev_t)(vm_offset_t, vm_size_t); -typedef void (*pmap_page_set_memattr_t)(vm_page_t, vm_memattr_t); -typedef int (*pmap_change_attr_t)(vm_offset_t, vm_size_t, vm_memattr_t); -typedef int (*pmap_map_user_ptr_t)(pmap_t, volatile const void *, - void **, size_t, size_t *); -typedef int (*pmap_decode_kernel_ptr_t)(vm_offset_t, int *, vm_offset_t *); -typedef vm_paddr_t (*pmap_kextract_t)(vm_offset_t); -typedef int (*pmap_dev_direct_mapped_t)(vm_paddr_t, vm_size_t); - -typedef void (*pmap_page_array_startup_t)(long); -typedef void (*pmap_advise_t)(pmap_t, vm_offset_t, vm_offset_t, int); -typedef void (*pmap_clear_modify_t)(vm_page_t); -typedef void (*pmap_remove_write_t)(vm_page_t); -typedef void (*pmap_copy_t)(pmap_t, pmap_t, vm_offset_t, vm_size_t, vm_offset_t); -typedef void (*pmap_copy_page_t)(vm_page_t, vm_page_t); -typedef void (*pmap_copy_pages_t)(vm_page_t *, vm_offset_t, - vm_page_t *, vm_offset_t, int); -typedef int (*pmap_enter_t)(pmap_t, vm_offset_t, vm_page_t, vm_prot_t, - u_int, int8_t); -typedef void (*pmap_enter_object_t)(pmap_t, vm_offset_t, vm_offset_t, - vm_page_t, vm_prot_t); -typedef void (*pmap_enter_quick_t)(pmap_t, vm_offset_t, vm_page_t, vm_prot_t); -typedef vm_paddr_t (*pmap_extract_t)(pmap_t, vm_offset_t); -typedef vm_page_t (*pmap_extract_and_hold_t)(pmap_t, vm_offset_t, vm_prot_t); -typedef void (*pmap_growkernel_t)(vm_offset_t); -typedef void (*pmap_init_t)(void); -typedef boolean_t (*pmap_is_modified_t)(vm_page_t); -typedef boolean_t (*pmap_is_prefaultable_t)(pmap_t, vm_offset_t); -typedef boolean_t (*pmap_is_referenced_t)(vm_page_t); -typedef int (*pmap_ts_referenced_t)(vm_page_t); -typedef vm_offset_t (*pmap_map_t)(vm_offset_t *, vm_paddr_t, vm_paddr_t, int); -typedef void (*pmap_object_init_pt_t)(pmap_t, vm_offset_t, vm_object_t, - vm_pindex_t, vm_size_t); -typedef boolean_t (*pmap_page_exists_quick_t)(pmap_t, vm_page_t); -typedef boolean_t (*pmap_page_is_mapped_t)(vm_page_t); -typedef void (*pmap_page_init_t)(vm_page_t); -typedef int (*pmap_page_wired_mappings_t)(vm_page_t); -typedef void (*pmap_pinit0_t)(pmap_t); -typedef void (*pmap_protect_t)(pmap_t, vm_offset_t, vm_offset_t, vm_prot_t); -typedef void (*pmap_qenter_t)(vm_offset_t, vm_page_t *, int); -typedef void (*pmap_qremove_t)(vm_offset_t, int); -typedef void (*pmap_release_t)(pmap_t); -typedef void (*pmap_remove_t)(pmap_t, vm_offset_t, vm_offset_t); -typedef void (*pmap_remove_all_t)(vm_page_t); -typedef void (*pmap_remove_pages_t)(pmap_t); -typedef void (*pmap_unwire_t)(pmap_t, vm_offset_t, vm_offset_t); -typedef void (*pmap_zero_page_t)(vm_page_t); -typedef void (*pmap_zero_page_area_t)(vm_page_t, int, int); -typedef int (*pmap_mincore_t)(pmap_t, vm_offset_t, vm_paddr_t *); -typedef void (*pmap_activate_t)(struct thread *); -typedef void (*pmap_deactivate_t)(struct thread *); -typedef void (*pmap_align_superpage_t)(vm_object_t, vm_ooffset_t, - vm_offset_t *, vm_size_t); - -typedef void (*pmap_sync_icache_t)(pmap_t, vm_offset_t, vm_size_t); -typedef void (*pmap_dumpsys_map_chunk_t)(vm_paddr_t, size_t, void **); -typedef void (*pmap_dumpsys_unmap_chunk_t)(vm_paddr_t, size_t, void *); -typedef void (*pmap_dumpsys_pa_init_t)(void); -typedef size_t (*pmap_dumpsys_scan_pmap_t)(struct bitset *dump_bitset); -typedef void *(*pmap_dumpsys_dump_pmap_init_t)(unsigned); -typedef void *(*pmap_dumpsys_dump_pmap_t)(void *, void *, u_long *); -typedef vm_offset_t (*pmap_quick_enter_page_t)(vm_page_t); -typedef void (*pmap_quick_remove_page_t)(vm_offset_t); -typedef bool (*pmap_ps_enabled_t)(pmap_t); -typedef void (*pmap_tlbie_all_t)(void); -typedef void (*pmap_installer_t)(void); - -struct pmap_funcs { - pmap_installer_t install; - pmap_bootstrap_t bootstrap; - pmap_cpu_bootstrap_t cpu_bootstrap; - pmap_kenter_t kenter; - pmap_kenter_attr_t kenter_attr; - pmap_kremove_t kremove; - pmap_mapdev_t mapdev; - pmap_mapdev_attr_t mapdev_attr; - pmap_unmapdev_t unmapdev; - pmap_page_set_memattr_t page_set_memattr; - pmap_change_attr_t change_attr; - pmap_map_user_ptr_t map_user_ptr; - pmap_decode_kernel_ptr_t decode_kernel_ptr; - pmap_kextract_t kextract; - pmap_dev_direct_mapped_t dev_direct_mapped; - pmap_advise_t advise; - pmap_clear_modify_t clear_modify; - pmap_remove_write_t remove_write; - pmap_copy_t copy; - pmap_copy_page_t copy_page; - pmap_copy_pages_t copy_pages; - pmap_enter_t enter; - pmap_enter_object_t enter_object; - pmap_enter_quick_t enter_quick; - pmap_extract_t extract; - pmap_extract_and_hold_t extract_and_hold; - pmap_growkernel_t growkernel; - pmap_init_t init; - pmap_is_modified_t is_modified; - pmap_is_prefaultable_t is_prefaultable; - pmap_is_referenced_t is_referenced; - pmap_ts_referenced_t ts_referenced; - pmap_page_is_mapped_t page_is_mapped; - pmap_ps_enabled_t ps_enabled; - pmap_map_t map; - pmap_object_init_pt_t object_init_pt; - pmap_page_exists_quick_t page_exists_quick; - pmap_page_init_t page_init; - pmap_page_wired_mappings_t page_wired_mappings; - pmap_pinit_t pinit; - pmap_pinit0_t pinit0; - pmap_protect_t protect; - pmap_qenter_t qenter; - pmap_qremove_t qremove; - pmap_release_t release; - pmap_remove_t remove; - pmap_remove_all_t remove_all; - pmap_remove_pages_t remove_pages; - pmap_unwire_t unwire; - pmap_zero_page_t zero_page; - pmap_zero_page_area_t zero_page_area; - pmap_mincore_t mincore; - pmap_activate_t activate; - pmap_deactivate_t deactivate; - pmap_align_superpage_t align_superpage; - pmap_sync_icache_t sync_icache; - pmap_quick_enter_page_t quick_enter_page; - pmap_quick_remove_page_t quick_remove_page; - pmap_page_array_startup_t page_array_startup; - pmap_dumpsys_map_chunk_t dumpsys_map_chunk; - pmap_dumpsys_unmap_chunk_t dumpsys_unmap_chunk; - pmap_dumpsys_pa_init_t dumpsys_pa_init; - pmap_dumpsys_scan_pmap_t dumpsys_scan_pmap; - pmap_dumpsys_dump_pmap_init_t dumpsys_dump_pmap_init; - pmap_dumpsys_dump_pmap_t dumpsys_dump_pmap; - pmap_tlbie_all_t tlbie_all; - -}; -struct mmu_kobj { - const char *name; - const struct mmu_kobj *base; - const struct pmap_funcs *funcs; -}; - -typedef struct mmu_kobj *mmu_t; - -/* The currently installed pmap object. */ -extern mmu_t mmu_obj; - -/* - * Resolve a given pmap function. - * 'func' is the function name less the 'pmap_' * prefix. - */ -#define PMAP_RESOLVE_FUNC(func) \ - ({ \ - pmap_##func##_t f; \ - const struct mmu_kobj *mmu = mmu_obj; \ - do { \ - f = mmu->funcs->func; \ - if (f != NULL) break; \ - mmu = mmu->base; \ - } while (mmu != NULL); \ - f;}) - -#define MMU_DEF(name, ident, methods) \ - \ -const struct mmu_kobj name = { \ - ident, NULL, &methods \ -}; \ -DATA_SET(mmu_set, name) - -#define MMU_DEF_INHERIT(name, ident, methods, base1) \ - \ -const struct mmu_kobj name = { \ - ident, &base1, &methods, \ -}; \ -DATA_SET(mmu_set, name) - -/* - * Known MMU names - */ -#define MMU_TYPE_BOOKE "mmu_booke" /* Book-E MMU specification */ -#define MMU_TYPE_OEA "mmu_oea" /* 32-bit OEA */ -#define MMU_TYPE_G5 "mmu_g5" /* 64-bit bridge (ibm 970) */ -#define MMU_TYPE_RADIX "mmu_radix" /* 64-bit native ISA 3.0 (POWER9) radix */ -#define MMU_TYPE_8xx "mmu_8xx" /* 8xx quicc TLB */ - -#endif /* _MACHINE_MMUVAR_H_ */ diff --git a/sys/powerpc/include/ofw_machdep.h b/sys/powerpc/include/ofw_machdep.h deleted file mode 100644 index 9b56f716f52..00000000000 --- a/sys/powerpc/include/ofw_machdep.h +++ /dev/null @@ -1,58 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2001 by Thomas Moestl . - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE_OFW_MACHDEP_H_ -#define _MACHINE_OFW_MACHDEP_H_ - -#include -#include -#include -#include -#include -#include - -struct mem_region; -struct numa_mem_region; - -typedef uint32_t cell_t; - -void OF_getetheraddr(device_t dev, u_char *addr); - -void OF_initial_setup(void *fdt_ptr, void *junk, int (*openfirm)(void *)); -boolean_t OF_bootstrap(void); - -void OF_reboot(void); - -void ofw_mem_regions(struct mem_region *, int *, struct mem_region *, int *); -void ofw_numa_mem_regions(struct numa_mem_region *, int *); -void ofw_quiesce(void); /* Must be called before VM is up! */ -void ofw_save_trap_vec(char *); -int ofw_pcibus_get_domain(device_t dev, device_t child, int *domain); -int ofw_pcibus_get_cpus(device_t dev, device_t child, enum cpu_sets op, - size_t setsize, cpuset_t *cpuset); - -#endif /* _MACHINE_OFW_MACHDEP_H_ */ diff --git a/sys/powerpc/include/openpicreg.h b/sys/powerpc/include/openpicreg.h deleted file mode 100644 index 16f0295469e..00000000000 --- a/sys/powerpc/include/openpicreg.h +++ /dev/null @@ -1,141 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2000 Tsubai Masanari. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * from NetBSD: openpicreg.h,v 1.3 2001/08/30 03:08:52 briggs Exp - */ - -/* - * Size of OpenPIC register space - */ -#define OPENPIC_SIZE 0x40000 - -/* - * Per Processor Registers [private access] (0x00000 - 0x00fff) - */ - -/* IPI dispatch command reg */ -#define OPENPIC_IPI_DISPATCH(ipi) (0x40 + (ipi) * 0x10) - -/* current task priority reg */ -#define OPENPIC_TPR 0x80 -#define OPENPIC_TPR_MASK 0x0000000f - -#define OPENPIC_WHOAMI 0x90 - -/* interrupt acknowledge reg */ -#define OPENPIC_IACK 0xa0 - -/* end of interrupt reg */ -#define OPENPIC_EOI 0xb0 - -/* - * Global registers (0x01000-0x0ffff) - */ - -/* feature reporting reg 0 */ -#define OPENPIC_FEATURE 0x1000 -#define OPENPIC_FEATURE_VERSION_MASK 0x000000ff -#define OPENPIC_FEATURE_LAST_CPU_MASK 0x00001f00 -#define OPENPIC_FEATURE_LAST_CPU_SHIFT 8 -#define OPENPIC_FEATURE_LAST_IRQ_MASK 0x07ff0000 -#define OPENPIC_FEATURE_LAST_IRQ_SHIFT 16 - -/* global config reg 0 */ -#define OPENPIC_CONFIG 0x1020 -#define OPENPIC_CONFIG_RESET 0x80000000 -#define OPENPIC_CONFIG_8259_PASSTHRU_DISABLE 0x20000000 - -/* interrupt configuration mode (direct or serial) */ -#define OPENPIC_ICR 0x1030 -#define OPENPIC_ICR_SERIAL_MODE (1 << 27) -#define OPENPIC_ICR_SERIAL_RATIO_MASK (0x7 << 28) -#define OPENPIC_ICR_SERIAL_RATIO_SHIFT 28 - -/* vendor ID */ -#define OPENPIC_VENDOR_ID 0x1080 - -/* processor initialization reg */ -#define OPENPIC_PROC_INIT 0x1090 - -/* IPI vector/priority reg */ -#define OPENPIC_IPI_VECTOR(ipi) (0x10a0 + (ipi) * 0x10) - -/* spurious intr. vector */ -#define OPENPIC_SPURIOUS_VECTOR 0x10e0 - -/* Timer registers */ -#define OPENPIC_TIMERS 4 -#define OPENPIC_TFREQ 0x10f0 -#define OPENPIC_TCNT(t) (0x1100 + (t) * 0x40) -#define OPENPIC_TBASE(t) (0x1110 + (t) * 0x40) -#define OPENPIC_TVEC(t) (0x1120 + (t) * 0x40) -#define OPENPIC_TDST(t) (0x1130 + (t) * 0x40) - -/* - * Interrupt Source Configuration Registers (0x10000 - 0x1ffff) - */ - -/* interrupt vector/priority reg */ -#define OPENPIC_SRC_VECTOR_COUNT 64 -#ifndef OPENPIC_SRC_VECTOR -#define OPENPIC_SRC_VECTOR(irq) (0x10000 + (irq) * 0x20) -#endif -#define OPENPIC_SENSE_LEVEL 0x00400000 -#define OPENPIC_SENSE_EDGE 0x00000000 -#define OPENPIC_POLARITY_POSITIVE 0x00800000 -#define OPENPIC_POLARITY_NEGATIVE 0x00000000 -#define OPENPIC_IMASK 0x80000000 -#define OPENPIC_ACTIVITY 0x40000000 -#define OPENPIC_PRIORITY_MASK 0x000f0000 -#define OPENPIC_PRIORITY_SHIFT 16 -#define OPENPIC_VECTOR_MASK 0x000000ff - -/* interrupt destination cpu */ -#ifndef OPENPIC_IDEST -#define OPENPIC_IDEST(irq) (0x10010 + (irq) * 0x20) -#endif - -/* - * Per Processor Registers [global access] (0x20000 - 0x3ffff) - */ - -#define OPENPIC_PCPU_BASE(cpu) (0x20000 + (cpu) * 0x1000) - -#define OPENPIC_PCPU_IPI_DISPATCH(cpu, ipi) \ - (OPENPIC_PCPU_BASE(cpu) + OPENPIC_IPI_DISPATCH(ipi)) - -#define OPENPIC_PCPU_TPR(cpu) \ - (OPENPIC_PCPU_BASE(cpu) + OPENPIC_TPR) - -#define OPENPIC_PCPU_WHOAMI(cpu) \ - (OPENPIC_PCPU_BASE(cpu) + OPENPIC_WHOAMI) - -#define OPENPIC_PCPU_IACK(cpu) \ - (OPENPIC_PCPU_BASE(cpu) + OPENPIC_IACK) - -#define OPENPIC_PCPU_EOI(cpu) \ - (OPENPIC_PCPU_BASE(cpu) + OPENPIC_EOI) diff --git a/sys/powerpc/include/openpicvar.h b/sys/powerpc/include/openpicvar.h deleted file mode 100644 index 3bd83f0f964..00000000000 --- a/sys/powerpc/include/openpicvar.h +++ /dev/null @@ -1,92 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2002 Benno Rice. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _POWERPC_OPENPICVAR_H_ -#define _POWERPC_OPENPICVAR_H_ - -#define OPENPIC_DEVSTR "OpenPIC Interrupt Controller" - -#define OPENPIC_IRQMAX 256 /* h/w allows more */ - -#define OPENPIC_QUIRK_SINGLE_BIND 1 /* Bind interrupts to only 1 CPU */ -#define OPENPIC_QUIRK_HIDDEN_IRQS 2 /* May have IRQs beyond FRR[NIRQ] */ - -/* Names match the macros in openpicreg.h. */ -struct openpic_timer { - uint32_t tcnt; - uint32_t tbase; - uint32_t tvec; - uint32_t tdst; -}; - -struct openpic_softc { - device_t sc_dev; - struct resource *sc_memr; - struct resource *sc_intr; - bus_space_tag_t sc_bt; - bus_space_handle_t sc_bh; - char *sc_version; - int sc_rid; - int sc_irq; - void *sc_icookie; - u_int sc_ncpu; - u_int sc_nirq; - int sc_psim; - u_int sc_quirks; - - /* Saved states. */ - uint32_t sc_saved_config; - uint32_t sc_saved_ipis[4]; - uint32_t sc_saved_prios[4]; - struct openpic_timer sc_saved_timers[OPENPIC_TIMERS]; - uint32_t sc_saved_vectors[OPENPIC_SRC_VECTOR_COUNT]; - -}; - -extern devclass_t openpic_devclass; - -/* - * Bus-independent attach i/f - */ -int openpic_common_attach(device_t, uint32_t); - -/* - * PIC interface. - */ -void openpic_bind(device_t dev, u_int irq, cpuset_t cpumask, void **); -void openpic_config(device_t, u_int, enum intr_trigger, enum intr_polarity); -void openpic_dispatch(device_t, struct trapframe *); -void openpic_enable(device_t, u_int, u_int, void **); -void openpic_eoi(device_t, u_int, void *); -void openpic_ipi(device_t, u_int); -void openpic_mask(device_t, u_int, void *); -void openpic_unmask(device_t, u_int, void *); - -int openpic_suspend(device_t dev); -int openpic_resume(device_t dev); - -#endif /* _POWERPC_OPENPICVAR_H_ */ diff --git a/sys/powerpc/include/param.h b/sys/powerpc/include/param.h deleted file mode 100644 index debd158df6b..00000000000 --- a/sys/powerpc/include/param.h +++ /dev/null @@ -1,162 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 2001 David E. O'Brien - * Copyright (c) 1990 The Regents of the University of California. - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * William Jolitz. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)param.h 5.8 (Berkeley) 6/28/91 - */ - -#ifndef _POWERPC_INCLUDE_PARAM_H_ -#define _POWERPC_INCLUDE_PARAM_H_ - -/* - * Machine dependent constants for PowerPC - */ - -#include - -/* Needed to display interrupts on OFW PCI */ -#define __PCI_REROUTE_INTERRUPT - -#ifndef MACHINE -#define MACHINE "powerpc" -#endif -#ifndef MACHINE_ARCH -#ifdef __powerpc64__ -#if defined(__LITTLE_ENDIAN__) -#define MACHINE_ARCH "powerpc64le" -#else -#define MACHINE_ARCH "powerpc64" -#endif -#else -#ifdef __SPE__ -#define MACHINE_ARCH "powerpcspe" -#else -#define MACHINE_ARCH "powerpc" -#endif -#endif -#endif -#define MID_MACHINE MID_POWERPC -#ifdef __powerpc64__ -#ifndef MACHINE_ARCH32 -#define MACHINE_ARCH32 "powerpc" -#endif -#endif - -#ifdef SMP -#ifndef MAXCPU -#define MAXCPU 256 -#endif -#else -#define MAXCPU 1 -#endif - -#ifndef MAXMEMDOM -#define MAXMEMDOM 8 -#endif - -#define ALIGNBYTES _ALIGNBYTES -#define ALIGN(p) _ALIGN(p) -/* - * ALIGNED_POINTER is a boolean macro that checks whether an address - * is valid to fetch data elements of type t from on this architecture. - * This does not reflect the optimal alignment, just the possibility - * (within reasonable limits). - */ -#define ALIGNED_POINTER(p, t) ((((uintptr_t)(p)) & (sizeof (t) - 1)) == 0) - -/* - * CACHE_LINE_SIZE is the compile-time maximum cache line size for an - * architecture. It should be used with appropriate caution. - */ -#define CACHE_LINE_SHIFT 7 -#define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT) - -#define PAGE_SHIFT 12 -#define PAGE_SIZE (1 << PAGE_SHIFT) /* Page size */ -#define PAGE_MASK (PAGE_SIZE - 1) -#define NPTEPG (PAGE_SIZE/(sizeof (pt_entry_t))) -#define NPDEPG (PAGE_SIZE/(sizeof (pt_entry_t))) - -#define L1_PAGE_SIZE_SHIFT 39 -#define L1_PAGE_SIZE (1UL<> PAGE_SHIFT) -#define ptoa(x) ((x) << PAGE_SHIFT) - -#define powerpc_btop(x) ((x) >> PAGE_SHIFT) -#define powerpc_ptob(x) ((x) << PAGE_SHIFT) - -#define pgtok(x) ((x) * (PAGE_SIZE / 1024UL)) - -#define btoc(x) ((vm_offset_t)(((x)+PAGE_MASK)>>PAGE_SHIFT)) - -#endif /* !_POWERPC_INCLUDE_PARAM_H_ */ diff --git a/sys/powerpc/include/pcb.h b/sys/powerpc/include/pcb.h deleted file mode 100644 index e5e6e322340..00000000000 --- a/sys/powerpc/include/pcb.h +++ /dev/null @@ -1,134 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: pcb.h,v 1.4 2000/06/04 11:57:17 tsubai Exp $ - */ - -#ifndef _MACHINE_PCB_H_ -#define _MACHINE_PCB_H_ - -#include - -#include - -#ifndef _STANDALONE -struct pcb { - register_t pcb_context[20]; /* non-volatile r12-r31 */ - register_t pcb_cr; /* Condition register */ - register_t pcb_sp; /* stack pointer */ - register_t pcb_toc; /* toc pointer */ - register_t pcb_lr; /* link register */ - register_t pcb_dscr; /* dscr value */ - register_t pcb_fscr; - register_t pcb_tar; - struct pmap *pcb_pm; /* pmap of our vmspace */ - jmp_buf *pcb_onfault; /* For use during - copyin/copyout */ - int pcb_flags; -#define PCB_FPU 0x1 /* Process uses FPU */ -#define PCB_FPREGS 0x2 /* Process had FPU registers initialized */ -#define PCB_VEC 0x4 /* Process had Altivec initialized */ -#define PCB_VSX 0x8 /* Process had VSX initialized */ -#define PCB_CDSCR 0x10 /* Process had Custom DSCR initialized */ -#define PCB_HTM 0x20 /* Process had HTM initialized */ -#define PCB_CFSCR 0x40 /* Process had FSCR updated */ - struct fpu { - union { -#if _BYTE_ORDER == _BIG_ENDIAN - double fpr; - uint32_t vsr[4]; -#else - uint32_t vsr[4]; - struct { - double padding; - double fpr; - }; -#endif - } fpr[32]; - double fpscr; /* FPSCR stored as double for easier access */ - } pcb_fpu; /* Floating point processor */ - unsigned int pcb_fpcpu; /* which CPU had our FPU - stuff. */ - struct vec { - uint32_t vr[32][4]; - uint32_t spare[2]; - uint32_t vrsave; - uint32_t vscr; /* aligned at vector element 3 */ - } pcb_vec __aligned(16); /* Vector processor */ - unsigned int pcb_veccpu; /* which CPU had our vector - stuff. */ - struct htm { - uint64_t tfhar; - uint64_t texasr; - uint64_t tfiar; - } pcb_htm; - - struct ebb { - uint64_t ebbhr; - uint64_t ebbrr; - uint64_t bescr; - } pcb_ebb; - - struct lmon { - uint64_t lmrr; - uint64_t lmser; - } pcb_lm; - - union { - struct { - vm_offset_t usr_segm; /* Base address */ - register_t usr_vsid; /* USER_SR segment */ - } aim; - struct { - register_t dbcr0; - } booke; - } pcb_cpu; - vm_offset_t pcb_lastill; /* Last illegal instruction */ -}; -#endif - -#ifdef _KERNEL - -struct trapframe; - -#ifndef curpcb -extern struct pcb *curpcb; -#endif - -extern struct pmap *curpm; -extern struct proc *fpuproc; - -void makectx(struct trapframe *, struct pcb *); -void savectx(struct pcb *) __returns_twice; - -#endif -#endif /* _MACHINE_PCB_H_ */ diff --git a/sys/powerpc/include/pcpu.h b/sys/powerpc/include/pcpu.h deleted file mode 100644 index 3d35ed451ab..00000000000 --- a/sys/powerpc/include/pcpu.h +++ /dev/null @@ -1,175 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1999 Luoqi Chen - * Copyright (c) Peter Wemm - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_PCPU_H_ -#define _MACHINE_PCPU_H_ - -#include -#include -#include - -struct pmap; -struct pvo_entry; -#define CPUSAVE_LEN 9 - -#define PCPU_MD_COMMON_FIELDS \ - int pc_inside_intr; \ - struct pmap *pc_curpmap; /* current pmap */ \ - struct thread *pc_fputhread; /* current fpu user */ \ - struct thread *pc_vecthread; /* current vec user */ \ - struct thread *pc_htmthread; /* current htm user */ \ - uintptr_t pc_hwref; \ - int pc_bsp; \ - volatile int pc_awake; \ - uint32_t pc_ipimask; \ - uint32_t pc_flags; /* cpu feature flags */ \ - register_t pc_tempsave[CPUSAVE_LEN]; \ - register_t pc_disisave[CPUSAVE_LEN]; \ - register_t pc_dbsave[CPUSAVE_LEN]; \ - void *pc_restore; \ - vm_offset_t pc_qmap_addr; - -#define PCPU_MD_AIM32_FIELDS \ - struct pvo_entry *qmap_pvo; \ - struct mtx qmap_lock; \ - char __pad[128]; - -#define PCPU_MD_AIM64_FIELDS \ - struct slb slb[64]; \ - struct slb **userslb; \ - register_t slbsave[18]; \ - uint8_t slbstack[1024]; \ - struct pvo_entry *qmap_pvo; \ - struct mtx qmap_lock; \ - uint64_t opal_hmi_flags; \ - char __pad[1337]; - -#ifdef __powerpc64__ -#define PCPU_MD_AIM_FIELDS PCPU_MD_AIM64_FIELDS -#else -#define PCPU_MD_AIM_FIELDS PCPU_MD_AIM32_FIELDS -#endif - -/* CPU feature flags, can be used for cached flow control. */ -#define PC_FLAG_NOSRS 0x80000000 - -#define BOOKE_CRITSAVE_LEN (CPUSAVE_LEN + 2) -#define BOOKE_TLB_MAXNEST 4 -#define BOOKE_TLB_SAVELEN 16 -#define BOOKE_TLBSAVE_LEN (BOOKE_TLB_SAVELEN * BOOKE_TLB_MAXNEST) - -#ifdef __powerpc64__ -#define BOOKE_PCPU_PAD 901 -#else -#define BOOKE_PCPU_PAD 365 -#endif -#define PCPU_MD_BOOKE_FIELDS \ - register_t critsave[BOOKE_CRITSAVE_LEN]; \ - register_t mchksave[CPUSAVE_LEN]; \ - register_t tlbsave[BOOKE_TLBSAVE_LEN]; \ - register_t tlb_level; \ - uintptr_t *tlb_lock; \ - int tid_next; \ - char __pad[BOOKE_PCPU_PAD]; - -/* Definitions for register offsets within the exception tmp save areas */ -#define CPUSAVE_R27 0 /* where r27 gets saved */ -#define CPUSAVE_R28 1 /* where r28 gets saved */ -#define CPUSAVE_R29 2 /* where r29 gets saved */ -#define CPUSAVE_R30 3 /* where r30 gets saved */ -#define CPUSAVE_R31 4 /* where r31 gets saved */ -#define CPUSAVE_AIM_DAR 5 /* where SPR_DAR gets saved */ -#define CPUSAVE_AIM_DSISR 6 /* where SPR_DSISR gets saved */ -#define CPUSAVE_BOOKE_DEAR 5 /* where SPR_DEAR gets saved */ -#define CPUSAVE_BOOKE_ESR 6 /* where SPR_ESR gets saved */ -#define CPUSAVE_SRR0 7 /* where SRR0 gets saved */ -#define CPUSAVE_SRR1 8 /* where SRR1 gets saved */ -#define BOOKE_CRITSAVE_SRR0 9 /* where real SRR0 gets saved (critical) */ -#define BOOKE_CRITSAVE_SRR1 10 /* where real SRR0 gets saved (critical) */ - -/* Book-E TLBSAVE is more elaborate */ -#define TLBSAVE_BOOKE_LR 0 -#define TLBSAVE_BOOKE_CR 1 -#define TLBSAVE_BOOKE_SRR0 2 -#define TLBSAVE_BOOKE_SRR1 3 -#define TLBSAVE_BOOKE_R20 4 -#define TLBSAVE_BOOKE_R21 5 -#define TLBSAVE_BOOKE_R22 6 -#define TLBSAVE_BOOKE_R23 7 -#define TLBSAVE_BOOKE_R24 8 -#define TLBSAVE_BOOKE_R25 9 -#define TLBSAVE_BOOKE_R26 10 -#define TLBSAVE_BOOKE_R27 11 -#define TLBSAVE_BOOKE_R28 12 -#define TLBSAVE_BOOKE_R29 13 -#define TLBSAVE_BOOKE_R30 14 -#define TLBSAVE_BOOKE_R31 15 - -#define PCPU_MD_FIELDS \ - PCPU_MD_COMMON_FIELDS \ - union { \ - struct { \ - PCPU_MD_AIM_FIELDS \ - } pc_aim; \ - struct { \ - PCPU_MD_BOOKE_FIELDS \ - } pc_booke; \ - } - -#ifdef _KERNEL - -#define pcpup (get_pcpu()) - -static __inline __pure2 struct thread * -__curthread(void) -{ - struct thread *td; -#ifdef __powerpc64__ - __asm __volatile("mr %0,13" : "=r"(td)); -#else - __asm __volatile("mr %0,2" : "=r"(td)); -#endif - return (td); -} -#define curthread (__curthread()) - -#define PCPU_GET(member) (pcpup->pc_ ## member) - -/* - * XXX The implementation of this operation should be made atomic - * with respect to preemption. - */ -#define PCPU_ADD(member, value) (pcpup->pc_ ## member += (value)) -#define PCPU_INC(member) PCPU_ADD(member, 1) -#define PCPU_PTR(member) (&pcpup->pc_ ## member) -#define PCPU_SET(member,value) (pcpup->pc_ ## member = (value)) - -#endif /* _KERNEL */ - -#endif /* !_MACHINE_PCPU_H_ */ diff --git a/sys/powerpc/include/pcpu_aux.h b/sys/powerpc/include/pcpu_aux.h deleted file mode 100644 index 9ca9b4def50..00000000000 --- a/sys/powerpc/include/pcpu_aux.h +++ /dev/null @@ -1,50 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2019 The FreeBSD Foundation - * - * This software was developed by Konstantin Belousov - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_PCPU_AUX_H_ -#define _MACHINE_PCPU_AUX_H_ - -#ifndef _KERNEL -#error "Not for userspace" -#endif - -#ifndef _SYS_PCPU_H_ -#error "Do not include machine/pcpu_aux.h directly" -#endif - -/* - * To minimize memory waste in per-cpu UMA zones, the page size should - * be a multiple of the size of struct pcpu. - */ -_Static_assert(PAGE_SIZE % sizeof(struct pcpu) == 0, "fix pcpu size"); - -extern struct pcpu __pcpu[]; - -#endif /* _MACHINE_PCPU_AUX_H_ */ diff --git a/sys/powerpc/include/pio.h b/sys/powerpc/include/pio.h deleted file mode 100644 index a7733453fa0..00000000000 --- a/sys/powerpc/include/pio.h +++ /dev/null @@ -1,304 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed under OpenBSD by - * Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $NetBSD: pio.h,v 1.1 1998/05/15 10:15:54 tsubai Exp $ - * $OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $ - */ - -#ifndef _MACHINE_PIO_H_ -#define _MACHINE_PIO_H_ -/* - * I/O macros. - */ - -/* - * Use sync so that bus space operations cannot sneak out the bottom of - * mutex-protected sections (mutex release does not guarantee completion of - * accesses to caching-inhibited memory on some systems) - */ -#define powerpc_iomb() __asm __volatile("sync" : : : "memory") - -static __inline void -__outb(volatile u_int8_t *a, u_int8_t v) -{ - *a = v; - powerpc_iomb(); -} - -static __inline void -__outw(volatile u_int16_t *a, u_int16_t v) -{ - *a = v; - powerpc_iomb(); -} - -static __inline void -__outl(volatile u_int32_t *a, u_int32_t v) -{ - *a = v; - powerpc_iomb(); -} - -static __inline void -__outll(volatile u_int64_t *a, u_int64_t v) -{ - *a = v; - powerpc_iomb(); -} - -static __inline void -__outwrb(volatile u_int16_t *a, u_int16_t v) -{ - __asm__ volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a)); - powerpc_iomb(); -} - -static __inline void -__outlrb(volatile u_int32_t *a, u_int32_t v) -{ - __asm__ volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a)); - powerpc_iomb(); -} - -static __inline u_int8_t -__inb(volatile u_int8_t *a) -{ - u_int8_t _v_; - - _v_ = *a; - powerpc_iomb(); - return _v_; -} - -static __inline u_int16_t -__inw(volatile u_int16_t *a) -{ - u_int16_t _v_; - - _v_ = *a; - powerpc_iomb(); - return _v_; -} - -static __inline u_int32_t -__inl(volatile u_int32_t *a) -{ - u_int32_t _v_; - - _v_ = *a; - powerpc_iomb(); - return _v_; -} - -static __inline u_int64_t -__inll(volatile u_int64_t *a) -{ - u_int64_t _v_; - - _v_ = *a; - powerpc_iomb(); - return _v_; -} - -static __inline u_int16_t -__inwrb(volatile u_int16_t *a) -{ - u_int16_t _v_; - - __asm__ volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a)); - powerpc_iomb(); - return _v_; -} - -static __inline u_int32_t -__inlrb(volatile u_int32_t *a) -{ - u_int32_t _v_; - - __asm__ volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a)); - powerpc_iomb(); - return _v_; -} - -#define outb(a,v) (__outb((volatile u_int8_t *)(a), v)) -#define out8(a,v) outb(a,v) -#define outw(a,v) (__outw((volatile u_int16_t *)(a), v)) -#define out16(a,v) outw(a,v) -#define outl(a,v) (__outl((volatile u_int32_t *)(a), v)) -#define out32(a,v) outl(a,v) -#define outll(a,v) (__outll((volatile u_int64_t *)(a), v)) -#define out64(a,v) outll(a,v) -#define inb(a) (__inb((volatile u_int8_t *)(a))) -#define in8(a) inb(a) -#define inw(a) (__inw((volatile u_int16_t *)(a))) -#define in16(a) inw(a) -#define inl(a) (__inl((volatile u_int32_t *)(a))) -#define in32(a) inl(a) -#define inll(a) (__inll((volatile u_int64_t *)(a))) -#define in64(a) inll(a) - -#define out8rb(a,v) outb(a,v) -#define outwrb(a,v) (__outwrb((volatile u_int16_t *)(a), v)) -#define out16rb(a,v) outwrb(a,v) -#define outlrb(a,v) (__outlrb((volatile u_int32_t *)(a), v)) -#define out32rb(a,v) outlrb(a,v) -#define in8rb(a) inb(a) -#define inwrb(a) (__inwrb((volatile u_int16_t *)(a))) -#define in16rb(a) inwrb(a) -#define inlrb(a) (__inlrb((volatile u_int32_t *)(a))) -#define in32rb(a) inlrb(a) - -static __inline void -__outsb(volatile u_int8_t *a, const u_int8_t *s, size_t c) -{ - while (c--) - *a = *s++; - powerpc_iomb(); -} - -static __inline void -__outsw(volatile u_int16_t *a, const u_int16_t *s, size_t c) -{ - while (c--) - *a = *s++; - powerpc_iomb(); -} - -static __inline void -__outsl(volatile u_int32_t *a, const u_int32_t *s, size_t c) -{ - while (c--) - *a = *s++; - powerpc_iomb(); -} - -static __inline void -__outsll(volatile u_int64_t *a, const u_int64_t *s, size_t c) -{ - while (c--) - *a = *s++; - powerpc_iomb(); -} - -static __inline void -__outswrb(volatile u_int16_t *a, const u_int16_t *s, size_t c) -{ - while (c--) - __asm__ volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a)); - powerpc_iomb(); -} - -static __inline void -__outslrb(volatile u_int32_t *a, const u_int32_t *s, size_t c) -{ - while (c--) - __asm__ volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a)); - powerpc_iomb(); -} - -static __inline void -__insb(volatile u_int8_t *a, u_int8_t *d, size_t c) -{ - while (c--) - *d++ = *a; - powerpc_iomb(); -} - -static __inline void -__insw(volatile u_int16_t *a, u_int16_t *d, size_t c) -{ - while (c--) - *d++ = *a; - powerpc_iomb(); -} - -static __inline void -__insl(volatile u_int32_t *a, u_int32_t *d, size_t c) -{ - while (c--) - *d++ = *a; - powerpc_iomb(); -} - -static __inline void -__insll(volatile u_int64_t *a, u_int64_t *d, size_t c) -{ - while (c--) - *d++ = *a; - powerpc_iomb(); -} - -static __inline void -__inswrb(volatile u_int16_t *a, u_int16_t *d, size_t c) -{ - while (c--) - __asm__ volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a)); - powerpc_iomb(); -} - -static __inline void -__inslrb(volatile u_int32_t *a, u_int32_t *d, size_t c) -{ - while (c--) - __asm__ volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a)); - powerpc_iomb(); -} - -#define outsb(a,s,c) (__outsb((volatile u_int8_t *)(a), s, c)) -#define outs8(a,s,c) outsb(a,s,c) -#define outsw(a,s,c) (__outsw((volatile u_int16_t *)(a), s, c)) -#define outs16(a,s,c) outsw(a,s,c) -#define outsl(a,s,c) (__outsl((volatile u_int32_t *)(a), s, c)) -#define outs32(a,s,c) outsl(a,s,c) -#define outsll(a,s,c) (__outsll((volatile u_int64_t *)(a), s, c)) -#define outs64(a,s,c) outsll(a,s,c) -#define insb(a,d,c) (__insb((volatile u_int8_t *)(a), d, c)) -#define ins8(a,d,c) insb(a,d,c) -#define insw(a,d,c) (__insw((volatile u_int16_t *)(a), d, c)) -#define ins16(a,d,c) insw(a,d,c) -#define insl(a,d,c) (__insl((volatile u_int32_t *)(a), d, c)) -#define ins32(a,d,c) insl(a,d,c) -#define insll(a,d,c) (__insll((volatile u_int64_t *)(a), d, c)) -#define ins64(a,d,c) insll(a,d,c) - -#define outs8rb(a,s,c) outsb(a,s,c) -#define outswrb(a,s,c) (__outswrb((volatile u_int16_t *)(a), s, c)) -#define outs16rb(a,s,c) outswrb(a,s,c) -#define outslrb(a,s,c) (__outslrb((volatile u_int32_t *)(a), s, c)) -#define outs32rb(a,s,c) outslrb(a,s,c) -#define ins8rb(a,d,c) insb(a,d,c) -#define inswrb(a,d,c) (__inswrb((volatile u_int16_t *)(a), d, c)) -#define ins16rb(a,d,c) inswrb(a,d,c) -#define inslrb(a,d,c) (__inslrb((volatile u_int32_t *)(a), d, c)) -#define ins32rb(a,d,c) inslrb(a,d,c) - -#endif /*_MACHINE_PIO_H_*/ diff --git a/sys/powerpc/include/platform.h b/sys/powerpc/include/platform.h deleted file mode 100644 index 67ec009a1f5..00000000000 --- a/sys/powerpc/include/platform.h +++ /dev/null @@ -1,76 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1996 Wolfgang Solfrank. - * Copyright (C) 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: powerpc.h,v 1.3 2000/06/01 00:49:59 matt Exp $ - */ - -#ifndef _MACHINE_PLATFORM_H_ -#define _MACHINE_PLATFORM_H_ - -#include -#include -#include - -struct mem_region { - uint64_t mr_start; - uint64_t mr_size; -}; - -struct numa_mem_region { - uint64_t mr_start; - uint64_t mr_size; - uint64_t mr_domain; -}; - -/* Documentation for these functions is in platform_if.m */ - -void mem_regions(struct mem_region **, int *, struct mem_region **, int *); -void numa_mem_regions(struct numa_mem_region **, int *); -vm_offset_t platform_real_maxaddr(void); - -u_long platform_timebase_freq(struct cpuref *); - -int platform_smp_first_cpu(struct cpuref *); -int platform_smp_next_cpu(struct cpuref *); -int platform_smp_get_bsp(struct cpuref *); -int platform_smp_start_cpu(struct pcpu *); -void platform_smp_timebase_sync(u_long tb, int ap); -void platform_smp_ap_init(void); -void platform_smp_probe_threads(void); -int platform_node_numa_domain(phandle_t); - -const char *installed_platform(void); -void platform_probe_and_attach(void); - -void platform_sleep(void); - -#endif /* _MACHINE_PLATFORM_H_ */ diff --git a/sys/powerpc/include/platformvar.h b/sys/powerpc/include/platformvar.h deleted file mode 100644 index 64b01697248..00000000000 --- a/sys/powerpc/include/platformvar.h +++ /dev/null @@ -1,89 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2005 Peter Grehan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_PLATFORMVAR_H_ -#define _MACHINE_PLATFORMVAR_H_ - -/* - * A PowerPC platform implementation is declared with a kernel object and - * an associated method table, similar to a device driver. - * - * e.g. - * - * static platform_method_t chrp_methods[] = { - * PLATFORMMETHOD(platform_probe, chrp_probe), - * PLATFORMMETHOD(platform_mem_regions, ofw_mem_regions), - * ... - * PLATFORMMETHOD(platform_smp_first_cpu, chrp_smp_first_cpu), - * { 0, 0 } - * }; - * - * static platform_def_t chrp_platform = { - * "chrp", - * chrp_methods, - * sizeof(chrp_platform_softc), // or 0 if no softc - * }; - * - * PLATFORM_DEF(chrp_platform); - */ - -#include - -struct platform_kobj { - /* - * A platform instance is a kernel object - */ - KOBJ_FIELDS; - - /* - * Utility elements that an instance may use - */ - struct mtx platform_mtx; /* available for instance use */ - void *platform_iptr; /* instance data pointer */ - - /* - * Opaque data that can be overlaid with an instance-private - * structure. Platform code can test that this is large enough at - * compile time with a sizeof() test againt it's softc. There - * is also a run-time test when the platform kernel object is - * registered. - */ -#define PLATFORM_OPAQUESZ 64 - u_int platform_opaque[PLATFORM_OPAQUESZ]; -}; - -typedef struct platform_kobj *platform_t; -typedef struct kobj_class platform_def_t; -#define platform_method_t kobj_method_t - -#define PLATFORMMETHOD KOBJMETHOD -#define PLATFORMMETHOD_END KOBJMETHOD_END - -#define PLATFORM_DEF(name) DATA_SET(platform_set, name) - -#endif /* _MACHINE_PLATFORMVAR_H_ */ diff --git a/sys/powerpc/include/pmap.h b/sys/powerpc/include/pmap.h deleted file mode 100644 index 8b1f3b32faf..00000000000 --- a/sys/powerpc/include/pmap.h +++ /dev/null @@ -1,360 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause AND BSD-4-Clause - * - * Copyright (C) 2006 Semihalf, Marian Balakowicz - * All rights reserved. - * - * Adapted for Freescale's e500 core CPUs. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * from: $NetBSD: pmap.h,v 1.17 2000/03/30 16:18:24 jdolecek Exp $ - */ - -#ifndef _MACHINE_PMAP_H_ -#define _MACHINE_PMAP_H_ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#ifdef __powerpc64__ -#include -#endif - -/* - * The radix page table structure is described by levels 1-4. - * See Fig 33. on p. 1002 of Power ISA v3.0B - * - * Page directories and tables must be size aligned. - */ - -/* Root page directory - 64k -- each entry covers 512GB */ -typedef uint64_t pml1_entry_t; -/* l2 page directory - 4k -- each entry covers 1GB */ -typedef uint64_t pml2_entry_t; -/* l3 page directory - 4k -- each entry covers 2MB */ -typedef uint64_t pml3_entry_t; -/* l4 page directory - 256B/4k -- each entry covers 64k/4k */ -typedef uint64_t pml4_entry_t; - -typedef uint64_t pt_entry_t; - -struct pmap; -typedef struct pmap *pmap_t; - -#define PMAP_ENTER_QUICK_LOCKED 0x10000000 - -#if !defined(NPMAPS) -#define NPMAPS 32768 -#endif /* !defined(NPMAPS) */ - -struct slbtnode; - -struct pvo_entry { - LIST_ENTRY(pvo_entry) pvo_vlink; /* Link to common virt page */ -#ifndef __powerpc64__ - LIST_ENTRY(pvo_entry) pvo_olink; /* Link to overflow entry */ -#endif - union { - RB_ENTRY(pvo_entry) pvo_plink; /* Link to pmap entries */ - SLIST_ENTRY(pvo_entry) pvo_dlink; /* Link to delete enty */ - }; - struct { -#ifndef __powerpc64__ - /* 32-bit fields */ - pte_t pte; -#endif - /* 64-bit fields */ - uintptr_t slot; - vm_paddr_t pa; - vm_prot_t prot; - } pvo_pte; - pmap_t pvo_pmap; /* Owning pmap */ - vm_offset_t pvo_vaddr; /* VA of entry */ - uint64_t pvo_vpn; /* Virtual page number */ -}; -LIST_HEAD(pvo_head, pvo_entry); -SLIST_HEAD(pvo_dlist, pvo_entry); -RB_HEAD(pvo_tree, pvo_entry); -int pvo_vaddr_compare(struct pvo_entry *, struct pvo_entry *); -RB_PROTOTYPE(pvo_tree, pvo_entry, pvo_plink, pvo_vaddr_compare); - -/* Used by 32-bit PMAP */ -#define PVO_PTEGIDX_MASK 0x007UL /* which PTEG slot */ -#define PVO_PTEGIDX_VALID 0x008UL /* slot is valid */ -/* Used by 64-bit PMAP */ -#define PVO_HID 0x008UL /* PVO entry in alternate hash*/ -/* Used by both */ -#define PVO_WIRED 0x010UL /* PVO entry is wired */ -#define PVO_MANAGED 0x020UL /* PVO entry is managed */ -#define PVO_BOOTSTRAP 0x080UL /* PVO entry allocated during - bootstrap */ -#define PVO_DEAD 0x100UL /* waiting to be deleted */ -#define PVO_LARGE 0x200UL /* large page */ -#define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) -#define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) -#define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) -#define PVO_PTEGIDX_CLR(pvo) \ - ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) -#define PVO_PTEGIDX_SET(pvo, i) \ - ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) -#define PVO_VSID(pvo) ((pvo)->pvo_vpn >> 16) - -struct pmap { - struct pmap_statistics pm_stats; - struct mtx pm_mtx; - cpuset_t pm_active; - union { - struct { - #ifdef __powerpc64__ - struct slbtnode *pm_slb_tree_root; - struct slb **pm_slb; - int pm_slb_len; - #else - register_t pm_sr[16]; - #endif - - struct pmap *pmap_phys; - struct pvo_tree pmap_pvo; - }; -#ifdef __powerpc64__ - /* Radix support */ - struct { - pml1_entry_t *pm_pml1; /* KVA of root page directory */ - struct vm_radix pm_radix; /* spare page table pages */ - TAILQ_HEAD(,pv_chunk) pm_pvchunk; /* list of mappings in pmap */ - uint64_t pm_pid; /* PIDR value */ - int pm_flags; - }; -#endif - struct { - /* TID to identify this pmap entries in TLB */ - tlbtid_t pm_tid[MAXCPU]; - -#ifdef __powerpc64__ - /* - * Page table directory, - * array of pointers to page directories. - */ - pte_t ****pm_root; -#else - /* - * Page table directory, - * array of pointers to page tables. - */ - pte_t **pm_pdir; - - /* List of allocated ptbl bufs (ptbl kva regions). */ - TAILQ_HEAD(, ptbl_buf) pm_ptbl_list; -#endif - }; - } __aligned(CACHE_LINE_SIZE); -}; - -/* - * pv_entries are allocated in chunks per-process. This avoids the - * need to track per-pmap assignments. - */ -#define _NPCM 2 -#define _NPCPV 126 -#define PV_CHUNK_HEADER \ - pmap_t pc_pmap; \ - TAILQ_ENTRY(pv_chunk) pc_list; \ - uint64_t pc_map[_NPCM]; /* bitmap; 1 = free */ \ - TAILQ_ENTRY(pv_chunk) pc_lru; - -struct pv_entry { - pmap_t pv_pmap; - vm_offset_t pv_va; - TAILQ_ENTRY(pv_entry) pv_link; -}; -typedef struct pv_entry *pv_entry_t; - -struct pv_chunk_header { - PV_CHUNK_HEADER -}; -struct pv_chunk { - PV_CHUNK_HEADER - uint64_t reserved; - struct pv_entry pc_pventry[_NPCPV]; -}; - -struct md_page { - union { - struct { - volatile int32_t mdpg_attrs; - vm_memattr_t mdpg_cache_attrs; - struct pvo_head mdpg_pvoh; - int pv_gen; /* (p) */ - }; - struct { - int pv_tracked; - }; - }; - TAILQ_HEAD(, pv_entry) pv_list; /* (p) */ -}; - -#ifdef AIM -#define pmap_page_get_memattr(m) ((m)->md.mdpg_cache_attrs) -#else -#define pmap_page_get_memattr(m) VM_MEMATTR_DEFAULT -#endif /* AIM */ - -/* - * Return the VSID corresponding to a given virtual address. - * If no VSID is currently defined, it will allocate one, and add - * it to a free slot if available. - * - * NB: The PMAP MUST be locked already. - */ -uint64_t va_to_vsid(pmap_t pm, vm_offset_t va); - -/* Lock-free, non-allocating lookup routines */ -uint64_t kernel_va_to_slbv(vm_offset_t va); -struct slb *user_va_to_slb_entry(pmap_t pm, vm_offset_t va); - -uint64_t allocate_user_vsid(pmap_t pm, uint64_t esid, int large); -void free_vsid(pmap_t pm, uint64_t esid, int large); -void slb_insert_user(pmap_t pm, struct slb *slb); -void slb_insert_kernel(uint64_t slbe, uint64_t slbv); - -struct slbtnode *slb_alloc_tree(void); -void slb_free_tree(pmap_t pm); -struct slb **slb_alloc_user_cache(void); -void slb_free_user_cache(struct slb **); - -extern struct pmap kernel_pmap_store; -#define kernel_pmap (&kernel_pmap_store) - -#ifdef _KERNEL - -#define PMAP_LOCK(pmap) mtx_lock(&(pmap)->pm_mtx) -#define PMAP_LOCK_ASSERT(pmap, type) \ - mtx_assert(&(pmap)->pm_mtx, (type)) -#define PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx) -#define PMAP_LOCK_INIT(pmap) mtx_init(&(pmap)->pm_mtx, \ - (pmap == kernel_pmap) ? "kernelpmap" : \ - "pmap", NULL, MTX_DEF | MTX_DUPOK) -#define PMAP_LOCKED(pmap) mtx_owned(&(pmap)->pm_mtx) -#define PMAP_MTX(pmap) (&(pmap)->pm_mtx) -#define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx) -#define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx) - -#define pmap_page_is_write_mapped(m) (((m)->a.flags & PGA_WRITEABLE) != 0) - -#define pmap_vm_page_alloc_check(m) - -void pmap_bootstrap(vm_offset_t, vm_offset_t); -void pmap_kenter(vm_offset_t va, vm_paddr_t pa); -void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, vm_memattr_t); -void pmap_kremove(vm_offset_t); -void *pmap_mapdev(vm_paddr_t, vm_size_t); -void *pmap_mapdev_attr(vm_paddr_t, vm_size_t, vm_memattr_t); -void pmap_unmapdev(vm_offset_t, vm_size_t); -void pmap_page_set_memattr(vm_page_t, vm_memattr_t); -int pmap_change_attr(vm_offset_t, vm_size_t, vm_memattr_t); -int pmap_map_user_ptr(pmap_t pm, volatile const void *uaddr, - void **kaddr, size_t ulen, size_t *klen); -int pmap_decode_kernel_ptr(vm_offset_t addr, int *is_user, - vm_offset_t *decoded_addr); -void pmap_deactivate(struct thread *); -vm_paddr_t pmap_kextract(vm_offset_t); -int pmap_dev_direct_mapped(vm_paddr_t, vm_size_t); -boolean_t pmap_mmu_install(char *name, int prio); -void pmap_mmu_init(void); -const char *pmap_mmu_name(void); -bool pmap_ps_enabled(pmap_t pmap); -int pmap_nofault(pmap_t pmap, vm_offset_t va, vm_prot_t flags); -boolean_t pmap_page_is_mapped(vm_page_t m); -#define pmap_map_delete(pmap, sva, eva) pmap_remove(pmap, sva, eva) - -void pmap_page_array_startup(long count); - -#define vtophys(va) pmap_kextract((vm_offset_t)(va)) - -extern vm_offset_t virtual_avail; -extern vm_offset_t virtual_end; -extern caddr_t crashdumpmap; - -extern vm_offset_t msgbuf_phys; - -extern int pmap_bootstrapped; -extern int radix_mmu; -extern int superpages_enabled; - -#ifdef AIM -void pmap_early_io_map_init(void); -#endif -vm_offset_t pmap_early_io_map(vm_paddr_t pa, vm_size_t size); -void pmap_early_io_unmap(vm_offset_t va, vm_size_t size); -void pmap_track_page(pmap_t pmap, vm_offset_t va); -void pmap_page_print_mappings(vm_page_t m); -void pmap_tlbie_all(void); - -static inline int -pmap_vmspace_copy(pmap_t dst_pmap __unused, pmap_t src_pmap __unused) -{ - - return (0); -} - -#endif - -#endif /* !_MACHINE_PMAP_H_ */ diff --git a/sys/powerpc/include/pmc_mdep.h b/sys/powerpc/include/pmc_mdep.h deleted file mode 100644 index c0d240b06bd..00000000000 --- a/sys/powerpc/include/pmc_mdep.h +++ /dev/null @@ -1,94 +0,0 @@ -/*- - * This file is in the public domain. - */ - -#ifndef _MACHINE_PMC_MDEP_H_ -#define _MACHINE_PMC_MDEP_H_ - -#define PMC_MDEP_CLASS_INDEX_POWERPC 1 - -union pmc_md_op_pmcallocate { - uint64_t __pad[4]; -}; - -/* Logging */ -#ifdef __powerpc64__ -#define PMCLOG_READADDR PMCLOG_READ64 -#define PMCLOG_EMITADDR PMCLOG_EMIT64 -#else -#define PMCLOG_READADDR PMCLOG_READ32 -#define PMCLOG_EMITADDR PMCLOG_EMIT32 -#endif - -#define mtpmr(reg, val) \ - __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) -#define mfpmr(reg) \ - ( { register_t val; \ - __asm __volatile("mfpmr %0,%1" : "=r"(val) : "K"(reg)); \ - val; } ) - -#define PMR_PMC0 16 -#define PMR_PMC1 17 -#define PMR_PMC2 18 -#define PMR_PMC3 19 -#define PMR_PMLCa0 144 -#define PMLCax_FC 0x80000000 -#define PMLCax_FCS 0x40000000 -#define PMLCax_FCU 0x20000000 -#define PMLCax_FCM1 0x10000000 -#define PMLCax_FCM0 0x08000000 -#define PMLCax_CE 0x04000000 -#define PMLCax_EVENT(x) ((x) << 16) -#define PMLCax_FCGS1 0x00000002 -#define PMLCax_FCGS0 0x00000001 -#define PMR_PMLCa1 145 -#define PMR_PMLCa2 146 -#define PMR_PMLCa3 147 -#define PMR_PMLCb0 272 -#define PMLCbx_TRIGONCTL(x) ((x) << 28) -#define PMLCbx_TRIGOFFCTL(x) ((x) << 24) -#define PMLCbx_PMCC 0x00800000 -#define PMLCbx_PMP(x) ((x) << 13) -#define PMLCbx_TREHMUL(x) ((x) << 8) -#define PMLCbx_TRESHOLD(x) ((x) << 0) -#define PMR_PMLCb1 273 -#define PMR_PMLCb2 274 -#define PMR_PMLCb3 275 -#define PMR_PMGC0 400 -#define PMGC_FAC 0x80000000 -#define PMGC_PMIE 0x40000000 -#define PMGC_FCECE 0x20000000 -#define PMGC_TBSEL(x) ((x) << 11) -#define PMGC_TBEE 0x00000100 -#define PMR_UPMC0 0 -#define PMR_UPMC1 1 -#define PMR_UPMC2 2 -#define PMR_UPMC3 3 -#define PMR_UPMLCa0 128 -#define PMR_UPMLCa1 129 -#define PMR_UPMLCa2 130 -#define PMR_UPMLCa3 131 -#define PMR_UPMLCb0 256 -#define PMR_UPMLCb1 257 -#define PMR_UPMLCb2 258 -#define PMR_UPMLCb3 259 -#define PMR_UPMGC0 384 - -#if _KERNEL - -struct pmc_md_powerpc_pmc { - uint64_t pm_powerpc_overflowcnt; - uint32_t pm_powerpc_evsel; -}; - -union pmc_md_pmc { - struct pmc_md_powerpc_pmc pm_powerpc; -}; - -#define PMC_TRAPFRAME_TO_PC(TF) ((TF)->srr0) -#define PMC_TRAPFRAME_TO_FP(TF) ((TF)->fixreg[1]) -#define PMC_TRAPFRAME_TO_SP(TF) (0) - -#endif - -#endif /* !_MACHINE_PMC_MDEP_H_ */ diff --git a/sys/powerpc/include/proc.h b/sys/powerpc/include/proc.h deleted file mode 100644 index 415848bd413..00000000000 --- a/sys/powerpc/include/proc.h +++ /dev/null @@ -1,80 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: proc.h,v 1.2 1997/04/16 22:57:48 thorpej Exp $ - */ - -#ifndef _MACHINE_PROC_H_ -#define _MACHINE_PROC_H_ - -/* - * Machine-dependent part of the proc structure - */ -struct mdthread { - int md_spinlock_count; /* (k) */ - register_t md_saved_msr; /* (k) */ -}; - -struct mdproc { - /* - * Avoid empty structs because they are undefined behavior. - */ - long md_spare; -}; - -#ifdef __powerpc64__ -#define KINFO_PROC_SIZE 1088 -#define KINFO_PROC32_SIZE 816 -#else -#define KINFO_PROC_SIZE 816 -#endif - -#define MAXARGS 8 -struct syscall_args { - u_int code; - struct sysent *callp; - register_t args[MAXARGS]; -}; - -#ifdef _KERNEL - -#include - -/* Get the current kernel thread stack usage. */ -#define GET_STACK_USAGE(total, used) do { \ - struct thread *td = curthread; \ - (total) = td->td_kstack_pages * PAGE_SIZE - sizeof(struct pcb); \ - (used) = td->td_kstack + (total) - (vm_offset_t)&td; \ -} while (0) -#endif - -#endif /* !_MACHINE_PROC_H_ */ diff --git a/sys/powerpc/include/procctl.h b/sys/powerpc/include/procctl.h deleted file mode 100644 index b340002b45e..00000000000 --- a/sys/powerpc/include/procctl.h +++ /dev/null @@ -1,3 +0,0 @@ -/*- - * This file is in the public domain. - */ diff --git a/sys/powerpc/include/profile.h b/sys/powerpc/include/profile.h deleted file mode 100644 index 7588cc6a2ca..00000000000 --- a/sys/powerpc/include/profile.h +++ /dev/null @@ -1,234 +0,0 @@ -/*- - * SPDX-License-Identifier: MIT-CMU - * - * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. - * All rights reserved. - * - * Author: Chris G. Demetriou - * - * Permission to use, copy, modify and distribute this software and - * its documentation is hereby granted, provided that both the copyright - * notice and this permission notice appear in all copies of the - * software, derivative works or modified versions, and any portions - * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND - * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * - * Carnegie Mellon requests users of this software to return to - * - * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU - * School of Computer Science - * Carnegie Mellon University - * Pittsburgh PA 15213-3890 - * - * any improvements or extensions that they make and grant Carnegie the - * rights to redistribute these changes. - * - * from: NetBSD: profile.h,v 1.9 1997/04/06 08:47:37 cgd Exp - * from: FreeBSD: src/sys/alpha/include/profile.h,v 1.4 1999/12/29 - */ - -#ifndef _MACHINE_PROFILE_H_ -#define _MACHINE_PROFILE_H_ - -#define _MCOUNT_DECL void __mcount - -#define FUNCTION_ALIGNMENT 4 - -typedef __ptrdiff_t fptrdiff_t; - -/* - * The mcount trampoline macro, expanded in libc/gmon/mcount.c - * - * For PowerPC SVR4 ABI profiling, the compiler will insert - * a data declaration and code sequence at the start of a routine of the form - * - * .function_mc: .data - * .align 2 - * .long 0 - * .text - * - * function: mflr %r0 - * addis %r11,%r0, .function_mc@ha - * stw %r0,4(%r1) - * addi %r0,%r11, .function_mc@l - * bl _mcount - * - * The link register is saved in the LR save word in the caller's - * stack frame, r0 is set up to point to the allocated longword, - * and control is transferred to _mcount. - * - * On return from _mcount, the routine should function as it would - * with no profiling so _mcount must restore register state to that upon - * entry. Any routine called by the _mcount trampoline will save - * callee-save registers, so _mcount must make sure it saves volatile - * registers that may have state after it returns i.e. parameter registers. - * - * The FreeBSD libc mcount routine ignores the r0 longword pointer, but - * instead requires as parameters the current PC and called PC. The current - * PC is obtained from the link register, as a result of "bl _mcount" in - * the stub, while the caller's PC is obtained from the LR save word. - * - * On return from libc mcount, the return is done indirectly with the - * ctr register rather than the link register, to allow the link register - * to be restored to what it was on entry to the profiled routine. - */ - -#if defined(__powerpc64__) - -#if !defined(_CALL_ELF) || _CALL_ELF == 1 -#define MCOUNT_PREAMBLE \ - " .align 2 \n" \ - " .globl _mcount \n" \ - " .section \".opd\",\"aw\" \n" \ - " .align 3 \n" \ - "_mcount: \n" \ - " .quad .L._mcount,.TOC.@tocbase,0\n" \ - " .previous \n" \ - " .size _mcount,24 \n" \ - " .type _mcount,@function \n" \ - " .align 4 \n" \ - ".L._mcount: \n" -#else -#define MCOUNT_PREAMBLE \ - " .globl _mcount \n" \ - " .type _mcount,@function \n" \ - " .align 4 \n" \ - "_mcount: \n" -#endif - -#define MCOUNT \ -__asm( MCOUNT_PREAMBLE \ - " stdu %r1,-(288+128)(%r1) \n" \ - " std %r3,48(%r1) \n" \ - " std %r4,56(%r1) \n" \ - " std %r5,64(%r1) \n" \ - " std %r6,72(%r1) \n" \ - " std %r7,80(%r1) \n" \ - " std %r8,88(%r1) \n" \ - " std %r9,96(%r1) \n" \ - " std %r10,104(%r1) \n" \ - " mflr %r4 \n" \ - " std %r4,112(%r1) \n" \ - " ld %r3,0(%r1) \n" \ - " ld %r3,0(%r3) \n" \ - " ld %r3,16(%r3) \n" \ - " bl __mcount \n" \ - " nop \n" \ - " ld %r4,112(%r1) \n" \ - " mtlr %r4 \n" \ - " ld %r3,48(%r1) \n" \ - " ld %r4,56(%r1) \n" \ - " ld %r5,64(%r1) \n" \ - " ld %r6,72(%r1) \n" \ - " ld %r7,80(%r1) \n" \ - " ld %r8,88(%r1) \n" \ - " ld %r9,96(%r1) \n" \ - " ld %r10,104(%r1) \n" \ - " addi %r1,%r1,(288+128) \n" \ - " blr \n"); -#else - -#ifdef PIC -#define _PLT "@plt" -#else -#define _PLT -#endif - -#define MCOUNT \ -__asm( " .globl _mcount \n" \ - " .type _mcount,@function \n" \ - " .align 4 \n" \ - "_mcount: \n" \ - " stwu %r1,-64(%r1) \n" \ - " stw %r3,16(%r1) \n" \ - " stw %r4,20(%r1) \n" \ - " stw %r5,24(%r1) \n" \ - " stw %r6,28(%r1) \n" \ - " stw %r7,32(%r1) \n" \ - " stw %r8,36(%r1) \n" \ - " stw %r9,40(%r1) \n" \ - " stw %r10,44(%r1) \n" \ - " mflr %r4 \n" \ - " stw %r4,48(%r1) \n" \ - " lwz %r3,68(%r1) \n" \ - " bl __mcount" _PLT " \n" \ - " lwz %r3,68(%r1) \n" \ - " mtlr %r3 \n" \ - " lwz %r4,48(%r1) \n" \ - " mtctr %r4 \n" \ - " lwz %r3,16(%r1) \n" \ - " lwz %r4,20(%r1) \n" \ - " lwz %r5,24(%r1) \n" \ - " lwz %r6,28(%r1) \n" \ - " lwz %r7,32(%r1) \n" \ - " lwz %r8,36(%r1) \n" \ - " lwz %r9,40(%r1) \n" \ - " lwz %r10,44(%r1) \n" \ - " addi %r1,%r1,64 \n" \ - " bctr \n" \ - "_mcount_end: \n" \ - " .size _mcount,_mcount_end-_mcount"); -#endif - -#ifdef _KERNEL -#define MCOUNT_ENTER(s) s = intr_disable() -#define MCOUNT_EXIT(s) intr_restore(s) -#define MCOUNT_DECL(s) register_t s; - -#ifndef COMPILING_LINT -#ifdef AIM -#include -#define __PROFILE_VECTOR_BASE EXC_RST -#define __PROFILE_VECTOR_TOP (EXC_LAST + 0x100) -#endif /* AIM */ -#if defined(BOOKE) -extern char interrupt_vector_base[]; -extern char interrupt_vector_top[]; -#define __PROFILE_VECTOR_BASE (uintfptr_t)interrupt_vector_base -#define __PROFILE_VECTOR_TOP (uintfptr_t)interrupt_vector_top -#endif /* BOOKE_E500 */ - -#endif /* !COMPILING_LINT */ - -#ifndef __PROFILE_VECTOR_BASE -#define __PROFILE_VECTOR_BASE 0 -#endif -#ifndef __PROFILE_VECTOR_TOP -#define __PROFILE_VECTOR_TOP 1 -#endif - -static __inline void -powerpc_profile_interrupt(void) -{ -} - -static __inline void -powerpc_profile_userspace(void) -{ -} - -#define MCOUNT_FROMPC_USER(pc) \ - ((pc < (uintfptr_t)VM_MAXUSER_ADDRESS) ? \ - (uintfptr_t)powerpc_profile_userspace : pc) - -#define MCOUNT_FROMPC_INTR(pc) \ - ((pc >= __PROFILE_VECTOR_BASE && \ - pc < __PROFILE_VECTOR_TOP) ? \ - (uintfptr_t)powerpc_profile_interrupt : ~0U) - -void __mcount(uintfptr_t frompc, uintfptr_t selfpc); - -#else /* !_KERNEL */ - -#ifdef __powerpc64__ -typedef u_long uintfptr_t; -#else -typedef u_int uintfptr_t; -#endif - -#endif /* _KERNEL */ - -#endif /* !_MACHINE_PROFILE_H_ */ diff --git a/sys/powerpc/include/psl.h b/sys/powerpc/include/psl.h deleted file mode 100644 index 86c0b370798..00000000000 --- a/sys/powerpc/include/psl.h +++ /dev/null @@ -1,101 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: psl.h,v 1.5 2000/11/19 19:52:37 matt Exp $ - */ - -#ifndef _MACHINE_PSL_H_ -#define _MACHINE_PSL_H_ - -/* - * Machine State Register (MSR) - All cores - */ -#define PSL_VEC 0x02000000UL /* AltiVec/SPE vector unit available */ -#define PSL_VSX 0x00800000UL /* Vector-Scalar unit available */ -#define PSL_EE 0x00008000UL /* external interrupt enable */ -#define PSL_PR 0x00004000UL /* privilege mode (1 == user) */ -#define PSL_FP 0x00002000UL /* floating point enable */ -#define PSL_ME 0x00001000UL /* machine check enable */ -#define PSL_FE0 0x00000800UL /* floating point interrupt mode 0 */ -#define PSL_FE1 0x00000100UL /* floating point interrupt mode 1 */ -#define PSL_PMM 0x00000004UL /* performance monitor mark */ -#define PSL_RI 0x00000002UL /* recoverable interrupt */ - -/* Machine State Register - Book-E cores */ -#ifdef __powerpc64__ -#define PSL_CM 0x80000000UL /* Computation Mode (64-bit) */ -#endif - -#define PSL_GS 0x10000000UL /* Guest state */ -#define PSL_UCLE 0x04000000UL /* User mode cache lock enable */ -#define PSL_WE 0x00040000UL /* Wait state enable */ -#define PSL_CE 0x00020000UL /* Critical interrupt enable */ -#define PSL_UBLE 0x00000400UL /* BTB lock enable - e500 only */ -#define PSL_DWE 0x00000400UL /* Debug Wait Enable - 440 only*/ -#define PSL_DE 0x00000200UL /* Debug interrupt enable */ -#define PSL_IS 0x00000020UL /* Instruction address space */ -#define PSL_DS 0x00000010UL /* Data address space */ - -/* Machine State Register (MSR) - AIM cores */ -#ifdef __powerpc64__ -#define PSL_SF 0x8000000000000000UL /* 64-bit addressing */ -#define PSL_HV 0x1000000000000000UL /* hyper-privileged mode */ -#endif - -#define PSL_POW 0x00040000UL /* power management */ -#define PSL_ILE 0x00010000UL /* interrupt endian mode (1 == le) */ -#define PSL_SE 0x00000400UL /* single-step trace enable */ -#define PSL_BE 0x00000200UL /* branch trace enable */ -#define PSL_IP 0x00000040UL /* interrupt prefix - 601 only */ -#define PSL_IR 0x00000020UL /* instruction address relocation */ -#define PSL_DR 0x00000010UL /* data address relocation */ -#define PSL_LE 0x00000001UL /* endian mode (1 == le) */ - -/* - * Floating-point exception modes: - */ -#define PSL_FE_DIS 0 /* none */ -#define PSL_FE_NONREC PSL_FE1 /* imprecise non-recoverable */ -#define PSL_FE_REC PSL_FE0 /* imprecise recoverable */ -#define PSL_FE_PREC (PSL_FE0 | PSL_FE1) /* precise */ -#define PSL_FE_DFLT PSL_FE_PREC /* default == precise */ - -#ifndef LOCORE -extern register_t psl_kernset; /* Default MSR values for kernel */ -extern register_t psl_userset; /* Default MSR values for userland */ -#ifdef __powerpc64__ -extern register_t psl_userset32; /* Default user MSR values for 32-bit */ -#endif -extern register_t psl_userstatic; /* Bits of SRR1 userland may not set */ -#endif - -#endif /* _MACHINE_PSL_H_ */ diff --git a/sys/powerpc/include/pte.h b/sys/powerpc/include/pte.h deleted file mode 100644 index ed926f80c87..00000000000 --- a/sys/powerpc/include/pte.h +++ /dev/null @@ -1,432 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: pte.h,v 1.2 1998/08/31 14:43:40 tsubai Exp $ - */ - -#ifndef _MACHINE_PTE_H_ -#define _MACHINE_PTE_H_ - -#if defined(AIM) - -/* - * Page Table Entries - */ -#ifndef LOCORE - -/* 32-bit PTE */ -struct pte { - u_int32_t pte_hi; - u_int32_t pte_lo; -}; - -struct pteg { - struct pte pt[8]; -}; - -/* 64-bit (long) PTE */ -struct lpte { - u_int64_t pte_hi; - u_int64_t pte_lo; -}; - -struct lpteg { - struct lpte pt[8]; -}; - -/* Partition table entry */ -struct pate { - u_int64_t pagetab; - u_int64_t proctab; -}; - -/* Process table entry */ -struct prte { - u_int64_t proctab0; - u_int64_t proctab1; -}; - -typedef struct pte pte_t; -typedef struct lpte lpte_t; -#endif /* LOCORE */ - -/* 32-bit PTE definitions */ - -/* High word: */ -#define PTE_VALID 0x80000000 -#define PTE_VSID_SHFT 7 -#define PTE_HID 0x00000040 -#define PTE_API 0x0000003f -/* Low word: */ -#define PTE_RPGN 0xfffff000 -#define PTE_REF 0x00000100 -#define PTE_CHG 0x00000080 -#define PTE_WIMG 0x00000078 -#define PTE_W 0x00000040 -#define PTE_I 0x00000020 -#define PTE_M 0x00000010 -#define PTE_G 0x00000008 -#define PTE_PP 0x00000003 -#define PTE_SO 0x00000000 /* Super. Only (U: XX, S: RW) */ -#define PTE_SW 0x00000001 /* Super. Write-Only (U: RO, S: RW) */ -#define PTE_BW 0x00000002 /* Supervisor (U: RW, S: RW) */ -#define PTE_BR 0x00000003 /* Both Read Only (U: RO, S: RO) */ -#define PTE_RW PTE_BW -#define PTE_RO PTE_BR - -#define PTE_EXEC 0x00000200 /* pseudo bit in attrs; page is exec */ - -/* 64-bit PTE definitions */ - -/* High quadword: */ -#define LPTE_VSID_SHIFT 12 -#define LPTE_AVPN_MASK 0xFFFFFFFFFFFFFF80ULL -#define LPTE_AVA_MASK 0x3FFFFFFFFFFFFF80ULL -#define LPTE_API 0x0000000000000F80ULL -#define LPTE_SWBITS 0x0000000000000078ULL -#define LPTE_WIRED 0x0000000000000010ULL -#define LPTE_LOCKED 0x0000000000000008ULL -#define LPTE_BIG 0x0000000000000004ULL /* 4kb/16Mb page */ -#define LPTE_HID 0x0000000000000002ULL -#define LPTE_VALID 0x0000000000000001ULL - -/* Low quadword: */ -#define LP_4K_16M 0x38 /* 4KB base, 16MB actual page size */ - -#define EXTEND_PTE(x) UINT64_C(x) /* make constants 64-bit */ -#define LPTE_RPGN 0xfffffffffffff000ULL -#define LPTE_LP_MASK 0x00000000000ff000ULL -#define LPTE_LP_SHIFT 12 -#define LPTE_LP_4K_16M ((unsigned long long)(LP_4K_16M) << LPTE_LP_SHIFT) -#define LPTE_REF EXTEND_PTE( PTE_REF ) -#define LPTE_CHG EXTEND_PTE( PTE_CHG ) -#define LPTE_WIMG EXTEND_PTE( PTE_WIMG ) -#define LPTE_W EXTEND_PTE( PTE_W ) -#define LPTE_I EXTEND_PTE( PTE_I ) -#define LPTE_M EXTEND_PTE( PTE_M ) -#define LPTE_G EXTEND_PTE( PTE_G ) -#define LPTE_NOEXEC 0x0000000000000004ULL -#define LPTE_PP EXTEND_PTE( PTE_PP ) - -#define LPTE_SO EXTEND_PTE( PTE_SO ) /* Super. Only */ -#define LPTE_SW EXTEND_PTE( PTE_SW ) /* Super. Write-Only */ -#define LPTE_BW EXTEND_PTE( PTE_BW ) /* Supervisor */ -#define LPTE_BR EXTEND_PTE( PTE_BR ) /* Both Read Only */ -#define LPTE_RW LPTE_BW -#define LPTE_RO LPTE_BR - -/* HPT superpage definitions */ -#define HPT_SP_SHIFT (VM_LEVEL_0_ORDER + PAGE_SHIFT) -#define HPT_SP_SIZE (1 << HPT_SP_SHIFT) -#define HPT_SP_MASK (HPT_SP_SIZE - 1) -#define HPT_SP_PAGES (1 << VM_LEVEL_0_ORDER) - -/* POWER ISA 3.0 Radix Table Definitions */ -#define RPTE_VALID 0x8000000000000000ULL -#define RPTE_LEAF 0x4000000000000000ULL /* is a PTE: always 1 */ -#define RPTE_SW0 0x2000000000000000ULL -#define RPTE_RPN_MASK 0x00FFFFFFFFFFF000ULL -#define RPTE_RPN_SHIFT 12 -#define RPTE_SW1 0x0000000000000800ULL -#define RPTE_SW2 0x0000000000000400ULL -#define RPTE_SW3 0x0000000000000200ULL -#define RPTE_R 0x0000000000000100ULL -#define RPTE_C 0x0000000000000080ULL - -#define RPTE_MANAGED RPTE_SW1 -#define RPTE_WIRED RPTE_SW2 -#define RPTE_PROMOTED RPTE_SW3 - -#define RPTE_ATTR_MASK 0x0000000000000030ULL -#define RPTE_ATTR_MEM 0x0000000000000000ULL /* PTE M */ -#define RPTE_ATTR_SAO 0x0000000000000010ULL /* PTE WIM */ -#define RPTE_ATTR_GUARDEDIO 0x0000000000000020ULL /* PTE IMG */ -#define RPTE_ATTR_UNGUARDEDIO 0x0000000000000030ULL /* PTE IM */ - -#define RPTE_EAA_MASK 0x000000000000000FULL -#define RPTE_EAA_P 0x0000000000000008ULL /* Supervisor only */ -#define RPTE_EAA_R 0x0000000000000004ULL /* Read allowed */ -#define RPTE_EAA_W 0x0000000000000002ULL /* Write (+read) */ -#define RPTE_EAA_X 0x0000000000000001ULL /* Execute allowed */ - -#define RPDE_VALID RPTE_VALID -#define RPDE_LEAF RPTE_LEAF /* is a PTE: always 0 */ -#define RPDE_NLB_MASK 0x00FFFFFFFFFFFF00ULL -#define RPDE_NLB_SHIFT 8 -#define RPDE_NLS_MASK 0x000000000000001FULL - -#define PG_FRAME (0x000ffffffffff000ul) -#define PG_PS_FRAME (0x000fffffffe00000ul) -/* - * Extract bits from address - */ -#define ADDR_SR_SHFT 28 -#define ADDR_PIDX 0x0ffff000UL -#define ADDR_PIDX_SHFT 12 -#define ADDR_API_SHFT 22 -#define ADDR_API_SHFT64 16 -#define ADDR_POFF 0x00000fffUL - -/* - * Bits in DSISR: - */ -#define DSISR_DIRECT 0x80000000 -#define DSISR_NOTFOUND 0x40000000 -#define DSISR_PROTECT 0x08000000 -#define DSISR_INVRX 0x04000000 -#define DSISR_STORE 0x02000000 -#define DSISR_DABR 0x00400000 -#define DSISR_SEGMENT 0x00200000 -#define DSISR_EAR 0x00100000 - -/* - * Bits in SRR1 on ISI: - */ -#define ISSRR1_NOTFOUND 0x40000000 -#define ISSRR1_DIRECT 0x10000000 -#define ISSRR1_PROTECT 0x08000000 -#define ISSRR1_SEGMENT 0x00200000 - -#else /* BOOKE */ - -#include - -/* - * Flags for pte_remove() routine. - */ -#define PTBL_HOLD 0x00000001 /* do not unhold ptbl pages */ -#define PTBL_UNHOLD 0x00000002 /* unhold and attempt to free ptbl pages */ - -#define PTBL_HOLD_FLAG(pmap) (((pmap) == kernel_pmap) ? PTBL_HOLD : PTBL_UNHOLD) - -/* - * Page Table Entry definitions and macros. - * - * RPN need only be 32-bit because Book-E has 36-bit addresses, and the smallest - * page size is 4k (12-bit mask), so RPN can really fit into 24 bits. - */ -#ifndef LOCORE -typedef uint64_t pte_t; -#endif - -/* RPN mask, TLB0 4K pages */ -#define PTE_PA_MASK PAGE_MASK - -#if defined(BOOKE_E500) - -/* PTE bits assigned to MAS2, MAS3 flags */ -#define PTE_MAS2_SHIFT 19 -#define PTE_W (MAS2_W << PTE_MAS2_SHIFT) -#define PTE_I (MAS2_I << PTE_MAS2_SHIFT) -#define PTE_M (MAS2_M << PTE_MAS2_SHIFT) -#define PTE_G (MAS2_G << PTE_MAS2_SHIFT) -#define PTE_MAS2_MASK (MAS2_G | MAS2_M | MAS2_I | MAS2_W) - -#define PTE_MAS3_SHIFT 2 -#define PTE_UX (MAS3_UX << PTE_MAS3_SHIFT) -#define PTE_SX (MAS3_SX << PTE_MAS3_SHIFT) -#define PTE_UW (MAS3_UW << PTE_MAS3_SHIFT) -#define PTE_SW (MAS3_SW << PTE_MAS3_SHIFT) -#define PTE_UR (MAS3_UR << PTE_MAS3_SHIFT) -#define PTE_SR (MAS3_SR << PTE_MAS3_SHIFT) -#define PTE_MAS3_MASK ((MAS3_UX | MAS3_SX | MAS3_UW \ - | MAS3_SW | MAS3_UR | MAS3_SR) << PTE_MAS3_SHIFT) - -#define PTE_PS_SHIFT 8 -#define PTE_PS_4KB (2 << PTE_PS_SHIFT) - -#endif - -/* Other PTE flags */ -#define PTE_VALID 0x00000001 /* Valid */ -#define PTE_MODIFIED 0x00001000 /* Modified */ -#define PTE_WIRED 0x00002000 /* Wired */ -#define PTE_MANAGED 0x00000002 /* Managed */ -#define PTE_REFERENCED 0x00040000 /* Referenced */ - -/* - * Page Table Entry definitions and macros. - * - * We use the hardware page table entry format: - * - * 63 24 23 19 18 17 14 13 12 11 8 7 6 5 4 3 2 1 0 - * --------------------------------------------------------------- - * ARPN(12:51) WIMGE R U0:U3 SW0 C PSIZE UX SX UW SW UR SR SW1 V - * --------------------------------------------------------------- - */ - -/* PTE fields. */ -#define PTE_TSIZE_SHIFT (63-54) -#define PTE_TSIZE_MASK 0x7 -#define PTE_TSIZE_SHIFT_DIRECT (63-55) -#define PTE_TSIZE_MASK_DIRECT 0xf -#define PTE_PS_DIRECT(ps) (ps<> PTE_TSIZE_SHIFT) & PTE_TSIZE_MASK) -#define PTE_TSIZE_DIRECT(pte) (int)((*pte >> PTE_TSIZE_SHIFT_DIRECT) & PTE_TSIZE_MASK_DIRECT) - -/* Macro argument must of pte_t type. */ -#define PTE_ARPN_SHIFT 12 -#define PTE_FLAGS_MASK 0x00ffffff -#define PTE_RPN_FROM_PA(pa) (((pa) & ~PAGE_MASK) << PTE_ARPN_SHIFT) -#define PTE_PA(pte) ((vm_paddr_t)(*pte >> PTE_ARPN_SHIFT) & ~PAGE_MASK) -#define PTE_ISVALID(pte) ((*pte) & PTE_VALID) -#define PTE_ISWIRED(pte) ((*pte) & PTE_WIRED) -#define PTE_ISMANAGED(pte) ((*pte) & PTE_MANAGED) -#define PTE_ISMODIFIED(pte) ((*pte) & PTE_MODIFIED) -#define PTE_ISREFERENCED(pte) ((*pte) & PTE_REFERENCED) - -#endif /* BOOKE */ - -/* Book-E page table format, broken out for the generic pmap.h. */ -#ifdef __powerpc64__ - -#include - -/* - * The virtual address is: - * - * 4K page size - * +-----+-----------+-------+-------------+-------------+----------------+ - * | - | pg_root |pdir_l1| dir# | pte# | off in 4K page | - * +-----+-----------+-------+-------------+-------------+----------------+ - * 63 52 51 39 38 30 29 ^ 21 20 ^ 12 11 0 - * | | - * index in 1 page of pointers - * - * 1st level - Root page table - * - * pp2d consists of PG_ROOT_NENTRIES entries, each being a pointer to - * second level entity, i.e. the page table directory (pdir). - */ -#define PG_ROOT_H 51 -#define PG_ROOT_L 39 -#define PG_ROOT_SIZE (1UL << PG_ROOT_L) /* va range mapped by pp2d */ -#define PG_ROOT_SHIFT PG_ROOT_L -#define PG_ROOT_NUM (PG_ROOT_H - PG_ROOT_L + 1) -#define PG_ROOT_MASK ((1 << PG_ROOT_NUM) - 1) -#define PG_ROOT_IDX(va) ((va >> PG_ROOT_SHIFT) & PG_ROOT_MASK) -#define PG_ROOT_NENTRIES (1 << PG_ROOT_NUM) -#define PG_ROOT_ENTRY_SHIFT 3 /* log2 (sizeof(struct pte_entry **)) */ - -/* - * 2nd level - page directory directory (pdir l1) - * - * pdir consists of PDIR_NENTRIES entries, each being a pointer to - * second level entity, i.e. the actual page table (ptbl). - */ -#define PDIR_L1_H (PG_ROOT_L-1) -#define PDIR_L1_L 30 -#define PDIR_L1_NUM (PDIR_L1_H-PDIR_L1_L+1) -#define PDIR_L1_SIZE (1 << PDIR_L1_L) /* va range mapped by pdir */ -#define PDIR_L1_MASK ((1<> PDIR_L1_SHIFT) & PDIR_L1_MASK) -#define PDIR_L1_ENTRY_SHIFT 3 /* log2 (sizeof(struct pte_entry *)) */ -#define PDIR_L1_PAGES ((PDIR_L1_NENTRIES * (1<> PDIR_SHIFT) & PDIR_MASK) -#define PDIR_ENTRY_SHIFT 3 /* log2 (sizeof(struct pte_entry *)) */ -#define PDIR_PAGES ((PDIR_NENTRIES * (1<> PTBL_SHIFT) & PTBL_MASK) -#define PTBL_ENTRY_SHIFT 3 /* log2 (sizeof (struct pte_entry)) */ -#define PTBL_PAGES ((PTBL_NENTRIES * (1<> PDIR_SHIFT) - -#define PDIR_ENTRY_SHIFT 2 /* entry size is 2^2 = 4 bytes */ - -/* - * 2nd level - page table (ptbl) - * - * Page table covers 1024 page table entries. Page - * table entry (pte) is 32 bit wide and defines mapping - * for a single page. - */ -#define PTBL_SHIFT PAGE_SHIFT -#define PTBL_SIZE PAGE_SIZE /* va range mapped by ptbl entry */ -#define PTBL_MASK ((PDIR_SIZE - 1) & ~((1 << PAGE_SHIFT) - 1)) -#define PTBL_NENTRIES 1024 /* number of pages mapped by ptbl */ - -/* Returns ptbl entry number for given va */ -#define PTBL_IDX(va) (((va) & PTBL_MASK) >> PTBL_SHIFT) - -/* Size of ptbl in pages, 1024 entries, each sizeof(struct pte_entry). */ -#define PTBL_PAGES 2 -#define PTBL_ENTRY_SHIFT 3 /* entry size is 2^3 = 8 bytes */ - -#endif -#endif /* _MACHINE_PTE_H_ */ diff --git a/sys/powerpc/include/ptrace.h b/sys/powerpc/include/ptrace.h deleted file mode 100644 index 36271c143fe..00000000000 --- a/sys/powerpc/include/ptrace.h +++ /dev/null @@ -1,44 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2014 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)ptrace.h 8.1 (Berkeley) 6/11/93 - */ - -#ifndef _MACHINE_PTRACE_H_ -#define _MACHINE_PTRACE_H_ - -#define __HAVE_PTRACE_MACHDEP - -#define PT_GETVRREGS (PT_FIRSTMACH + 0) -#define PT_SETVRREGS (PT_FIRSTMACH + 1) -#define PT_GETVSRREGS (PT_FIRSTMACH + 2) -#define PT_SETVSRREGS (PT_FIRSTMACH + 3) - -#endif diff --git a/sys/powerpc/include/reg.h b/sys/powerpc/include/reg.h deleted file mode 100644 index 781ee3b0228..00000000000 --- a/sys/powerpc/include/reg.h +++ /dev/null @@ -1,87 +0,0 @@ -/* $NetBSD: reg.h,v 1.4 2000/06/04 09:30:44 tsubai Exp $ */ - -#ifndef _POWERPC_REG_H_ -#define _POWERPC_REG_H_ - -#include - -/* Must match struct trapframe */ -struct reg { - __register_t fixreg[32]; - __register_t lr; - __register_t cr; - __register_t xer; - __register_t ctr; - __register_t pc; -}; - -struct fpreg { - double fpreg[32]; - double fpscr; -}; - -/* Must match pcb.pcb_vec */ -struct vmxreg { - __uint32_t vr[32][4]; - __uint32_t pad[2]; - __uint32_t vrsave; - __uint32_t vscr; -}; - -struct dbreg { - unsigned int junk; -}; - -#ifdef __LP64__ -/* Must match struct trapframe */ -struct reg32 { - __int32_t fixreg[32]; - __int32_t lr; - __int32_t cr; - __int32_t xer; - __int32_t ctr; - __int32_t pc; -}; - -struct fpreg32 { - struct fpreg data; -}; - -struct vmxreg32 { - struct vmxreg data; -}; - -struct dbreg32 { - struct dbreg data; -}; - -#define __HAVE_REG32 -#endif - -#ifdef _KERNEL -/* - * XXX these interfaces are MI, so they should be declared in a MI place. - */ -int fill_regs(struct thread *, struct reg *); -int set_regs(struct thread *, struct reg *); -int fill_fpregs(struct thread *, struct fpreg *); -int set_fpregs(struct thread *, struct fpreg *); -int fill_dbregs(struct thread *, struct dbreg *); -int set_dbregs(struct thread *, struct dbreg *); - -#ifdef COMPAT_FREEBSD32 -struct image_params; - -int fill_regs32(struct thread *, struct reg32 *); -int set_regs32(struct thread *, struct reg32 *); -void ppc32_setregs(struct thread *, struct image_params *, uintptr_t); - -#define fill_fpregs32(td, reg) fill_fpregs(td,(struct fpreg *)reg) -#define set_fpregs32(td, reg) set_fpregs(td,(struct fpreg *)reg) -#define fill_dbregs32(td, reg) fill_dbregs(td,(struct dbreg *)reg) -#define set_dbregs32(td, reg) set_dbregs(td,(struct dbreg *)reg) -#endif - -#endif - -#endif /* _POWERPC_REG_H_ */ diff --git a/sys/powerpc/include/reloc.h b/sys/powerpc/include/reloc.h deleted file mode 100644 index 21c9d92f1a4..00000000000 --- a/sys/powerpc/include/reloc.h +++ /dev/null @@ -1,30 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1998 John Birrell . - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY JOHN BIRRELL AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ diff --git a/sys/powerpc/include/resource.h b/sys/powerpc/include/resource.h deleted file mode 100644 index 9477572176e..00000000000 --- a/sys/powerpc/include/resource.h +++ /dev/null @@ -1,44 +0,0 @@ -/*- - * Copyright 1998 Massachusetts Institute of Technology - * - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose and without fee is hereby - * granted, provided that both the above copyright notice and this - * permission notice appear in all copies, that both the above - * copyright notice and this permission notice appear in all - * supporting documentation, and that the name of M.I.T. not be used - * in advertising or publicity pertaining to distribution of the - * software without specific, written prior permission. M.I.T. makes - * no representations about the suitability of this software for any - * purpose. It is provided "as is" without express or implied - * warranty. - * - * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS - * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT - * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_RESOURCE_H_ -#define _MACHINE_RESOURCE_H_ 1 - -/* - * Definitions of resource types for Intel Architecture machines - * with support for legacy ISA devices and drivers. - */ - -#define SYS_RES_IRQ 1 /* interrupt lines */ -#define SYS_RES_DRQ 2 /* isa dma lines */ -#define SYS_RES_MEMORY 3 /* i/o memory */ -#define SYS_RES_IOPORT 4 /* i/o ports */ -#define PCI_RES_BUS 5 /* PCI bus numbers */ - -#endif /* !_MACHINE_RESOURCE_H_ */ diff --git a/sys/powerpc/include/rtas.h b/sys/powerpc/include/rtas.h deleted file mode 100644 index aee71eddeb8..00000000000 --- a/sys/powerpc/include/rtas.h +++ /dev/null @@ -1,60 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_RTAS_H_ -#define _MACHINE_RTAS_H_ - -#include -#include -#include - -/* - * RTAS functions are defined by 32-bit integer tokens. These vary from - * system to system, and can be looked up from their standardized names - * using rtas_token_lookup(). If RTAS is not available, rtas_token_lookup() - * and rtas_call_method() return -1; this can be checked in advance using - * rtas_exists(). Otherwise, rtas_call_method() returns one of the RTAS - * status codes from the bottom of this file. - */ - -int rtas_exists(void); -int rtas_call_method(cell_t token, int nargs, int nreturns, ...); -cell_t rtas_token_lookup(const char *method); - -/* RTAS Status Codes: see CHRP or PAPR specification */ -#define RTAS_OK 0 -#define RTAS_HW_ERROR -1 -#define RTAS_BUSY -2 -#define RTAS_PARAM_ERROR -3 -#define RTAS_STATE_CHANGE -7 -#define RTAS_VENDOR_BEGIN 9000 -#define RTAS_EXTENDED_DELAY 9900 -#define RTAS_ISOLATION_ERROR -9000 -#define RTAS_VENDOR_ERROR_BEGIN -9004 - -#endif /* _MACHINE_RTAS_H_ */ diff --git a/sys/powerpc/include/runq.h b/sys/powerpc/include/runq.h deleted file mode 100644 index 83ffacde405..00000000000 --- a/sys/powerpc/include/runq.h +++ /dev/null @@ -1,55 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2001 Jake Burkholder - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_RUNQ_H_ -#define _MACHINE_RUNQ_H_ - -#ifdef __powerpc64__ -#define RQB_LEN (1UL) /* Number of priority status words. */ -#define RQB_L2BPW (6UL) /* Log2(sizeof(rqb_word_t) * NBBY)). */ -#else -#define RQB_LEN (2) /* Number of priority status words. */ -#define RQB_L2BPW (5) /* Log2(sizeof(rqb_word_t) * NBBY)). */ -#endif -#define RQB_BPW (1UL<> RQB_L2BPW) - -#define RQB_FFS(word) (ffsl(word) - 1) - -/* - * Type of run queue status word. - */ -#ifdef __powerpc64__ -typedef u_int64_t rqb_word_t; -#else -typedef u_int32_t rqb_word_t; -#endif - -#endif diff --git a/sys/powerpc/include/sc_machdep.h b/sys/powerpc/include/sc_machdep.h deleted file mode 100644 index 0c0b25b72da..00000000000 --- a/sys/powerpc/include/sc_machdep.h +++ /dev/null @@ -1,71 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003 Jake Burkholder. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_SC_MACHDEP_H_ -#define _MACHINE_SC_MACHDEP_H_ - -/* Color attributes for foreground text */ - -#define FG_BLACK 0x0 -#define FG_BLUE 0x1 -#define FG_GREEN 0x2 -#define FG_CYAN 0x3 -#define FG_RED 0x4 -#define FG_MAGENTA 0x5 -#define FG_BROWN 0x6 -#define FG_LIGHTGREY 0x7 /* aka white */ -#define FG_DARKGREY 0x8 -#define FG_LIGHTBLUE 0x9 -#define FG_LIGHTGREEN 0xa -#define FG_LIGHTCYAN 0xb -#define FG_LIGHTRED 0xc -#define FG_LIGHTMAGENTA 0xd -#define FG_YELLOW 0xe -#define FG_WHITE 0xf /* aka bright white */ -#define FG_BLINK 0x80 - -/* Color attributes for text background */ - -#define BG_BLACK 0x00 -#define BG_BLUE 0x10 -#define BG_GREEN 0x20 -#define BG_CYAN 0x30 -#define BG_RED 0x40 -#define BG_MAGENTA 0x50 -#define BG_BROWN 0x60 -#define BG_LIGHTGREY 0x70 -#define BG_DARKGREY 0x80 -#define BG_LIGHTBLUE 0x90 -#define BG_LIGHTGREEN 0xa0 -#define BG_LIGHTCYAN 0xb0 -#define BG_LIGHTRED 0xc0 -#define BG_LIGHTMAGENTA 0xd0 -#define BG_YELLOW 0xe0 -#define BG_WHITE 0xf0 - -#endif /* !_MACHINE_SC_MACHDEP_H_ */ diff --git a/sys/powerpc/include/setjmp.h b/sys/powerpc/include/setjmp.h deleted file mode 100644 index 5dc463619bc..00000000000 --- a/sys/powerpc/include/setjmp.h +++ /dev/null @@ -1,27 +0,0 @@ -/*- - * $NetBSD: setjmp.h,v 1.3 1998/09/16 23:51:27 thorpej Exp $ - */ - -#ifndef _MACHINE_SETJMP_H_ -#define _MACHINE_SETJMP_H_ - -#include - -#ifdef _KERNEL -#define _JBLEN 25 /* Kernel doesn't save FP and Altivec regs */ -#else -#define _JBLEN 100 -#endif - -/* - * jmp_buf and sigjmp_buf are encapsulated in different structs to force - * compile-time diagnostics for mismatches. The structs are the same - * internally to avoid some run-time errors for mismatches. - */ -#if __BSD_VISIBLE || __POSIX_VISIBLE || __XSI_VISIBLE -typedef struct _sigjmp_buf { long _sjb[_JBLEN + 1]; } sigjmp_buf[1]; -#endif - -typedef struct _jmp_buf { long _jb[_JBLEN + 1]; } jmp_buf[1]; - -#endif /* !_MACHINE_SETJMP_H_ */ diff --git a/sys/powerpc/include/sigframe.h b/sys/powerpc/include/sigframe.h deleted file mode 100644 index ce8cdf63537..00000000000 --- a/sys/powerpc/include/sigframe.h +++ /dev/null @@ -1,39 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1999 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer - * in this position and unchanged. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE_SIGFRAME_H_ -#define _MACHINE_SIGFRAME_H_ 1 - -struct sigframe { - ucontext_t sf_uc; - siginfo_t sf_si; -}; - -#endif /* _MACHINE_SIGFRAME_H_ */ diff --git a/sys/powerpc/include/signal.h b/sys/powerpc/include/signal.h deleted file mode 100644 index 0d5bf48e763..00000000000 --- a/sys/powerpc/include/signal.h +++ /dev/null @@ -1,54 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: signal.h,v 1.4 1998/09/14 02:48:34 thorpej Exp $ - */ - -#ifndef _MACHINE_SIGNAL_H_ -#define _MACHINE_SIGNAL_H_ - -#include - -typedef int sig_atomic_t; - -#if __BSD_VISIBLE -#include - -struct sigcontext { - int sc_onstack; /* saved onstack flag */ - int __sc_mask13; /* saved signal mask (old style) */ - struct trapframe sc_frame; /* saved registers */ - struct __sigset sc_mask; /* saved signal mask (new style) */ -}; -#endif - -#endif /* !_MACHINE_SIGNAL_H_ */ diff --git a/sys/powerpc/include/slb.h b/sys/powerpc/include/slb.h deleted file mode 100644 index 707887d197b..00000000000 --- a/sys/powerpc/include/slb.h +++ /dev/null @@ -1,92 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2009 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE_SLB_H_ -#define _MACHINE_SLB_H_ - -/* - * Bit definitions for segment lookaside buffer entries. - * - * PowerPC Microprocessor Family: The Programming Environments for 64-bit - * Microprocessors, section 7.4.2.1 - * - * Note that these bitmasks are relative to the values for one of the two - * values for slbmte, slbmfee, and slbmfev, not the internal SLB - * representation. - */ - -#define SLBV_KS 0x0000000000000800UL /* Supervisor-state prot key */ -#define SLBV_KP 0x0000000000000400UL /* User-state prot key */ -#define SLBV_N 0x0000000000000200UL /* No-execute protection */ -#define SLBV_L 0x0000000000000100UL /* Large page selector */ -#define SLBV_CLASS 0x0000000000000080UL /* Class selector */ -#define SLBV_VSID_MASK 0xfffffffffffff000UL /* Virtual segment ID mask */ -#define SLBV_VSID_SHIFT 12 - -/* - * Make a predictable 1:1 map from ESIDs to VSIDs for the kernel. Hash table - * coverage is increased by swizzling the ESID and multiplying by a prime - * number (0x13bb). - */ -#define KERNEL_VSID_BIT 0x0000001000000000UL /* Bit set in all kernel VSIDs */ -#define KERNEL_VSID(esid) ((((((uint64_t)esid << 8) | ((uint64_t)esid >> 28)) \ - * 0x13bbUL) & (KERNEL_VSID_BIT - 1)) | \ - KERNEL_VSID_BIT) - -#define SLBE_VALID 0x0000000008000000UL /* SLB entry valid */ -#define SLBE_INDEX_MASK 0x0000000000000fffUL /* SLB index mask*/ -#define SLBE_ESID_MASK 0xfffffffff0000000UL /* Effective segment ID mask */ -#define SLBE_ESID_SHIFT 28 - -/* - * SLB page sizes encoding, as present in property ibm,segment-page-sizes - * of CPU device tree node. - * - * See LoPAPR: CPU Node Properties, section C.6.1.4. - */ -#define SLB_PGSZ_4K_4K 0 - -/* Virtual real-mode VSID in LPARs */ -#define VSID_VRMA 0x1ffffff - -/* - * User segment for copyin/out - */ -#define USER_SLB_SLOT 0 -#define USER_SLB_SLBE (((USER_ADDR >> ADDR_SR_SHFT) << SLBE_ESID_SHIFT) | \ - SLBE_VALID | USER_SLB_SLOT) - -struct slb { - uint64_t slbv; - uint64_t slbe; -}; - -struct pmap; -void handle_kernel_slb_spill(int, register_t, register_t); -int handle_user_slb_spill(struct pmap *pm, vm_offset_t addr); - -#endif /* !_MACHINE_SLB_H_ */ diff --git a/sys/powerpc/include/smp.h b/sys/powerpc/include/smp.h deleted file mode 100644 index a1e888b1a07..00000000000 --- a/sys/powerpc/include/smp.h +++ /dev/null @@ -1,66 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2008 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE_SMP_H_ -#define _MACHINE_SMP_H_ - -#ifdef _KERNEL - -#define IPI_AST 0 -#define IPI_PREEMPT 1 -#define IPI_RENDEZVOUS 2 -#define IPI_STOP 3 -#define IPI_STOP_HARD 3 -#define IPI_HARDCLOCK 4 - -#ifndef LOCORE - -#include -#include - -void ipi_all_but_self(int ipi); -void ipi_cpu(int cpu, u_int ipi); -void ipi_selected(cpuset_t cpus, int ipi); - -struct cpuref { - uintptr_t cr_hwref; - u_int cr_cpuid; - u_int cr_domain; -}; - -void pmap_cpu_bootstrap(int); -void cpudep_ap_early_bootstrap(void); -uintptr_t cpudep_ap_bootstrap(void); -void cpudep_ap_setup(void); -void machdep_ap_bootstrap(void); - -extern struct pcb stoppcbs[]; - -#endif /* !LOCORE */ -#endif /* _KERNEL */ -#endif /* !_MACHINE_SMP_H */ diff --git a/sys/powerpc/include/spr.h b/sys/powerpc/include/spr.h deleted file mode 100644 index 054b83a590c..00000000000 --- a/sys/powerpc/include/spr.h +++ /dev/null @@ -1,922 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2001 The NetBSD Foundation, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: spr.h,v 1.25 2002/08/14 15:38:40 matt Exp $ - */ -#ifndef _POWERPC_SPR_H_ -#define _POWERPC_SPR_H_ - -#ifndef _LOCORE -#define mtspr(reg, val) \ - __asm __volatile("mtspr %0,%1" : : "K"(reg), "r"(val)) -#define mfspr(reg) \ - ( { register_t val; \ - __asm __volatile("mfspr %0,%1" : "=r"(val) : "K"(reg)); \ - val; } ) - -#ifndef __powerpc64__ - -/* The following routines allow manipulation of the full 64-bit width - * of SPRs on 64 bit CPUs in bridge mode */ - -#define mtspr64(reg,valhi,vallo,scratch) \ - __asm __volatile(" \ - mfmsr %0; \ - insrdi %0,%5,1,0; \ - mtmsrd %0; \ - isync; \ - \ - sld %1,%1,%4; \ - or %1,%1,%2; \ - mtspr %3,%1; \ - srd %1,%1,%4; \ - \ - clrldi %0,%0,1; \ - mtmsrd %0; \ - isync;" \ - : "=r"(scratch), "=r"(valhi) : "r"(vallo), "K"(reg), "r"(32), "r"(1)) - -#define mfspr64upper(reg,scratch) \ - ( { register_t val; \ - __asm __volatile(" \ - mfmsr %0; \ - insrdi %0,%4,1,0; \ - mtmsrd %0; \ - isync; \ - \ - mfspr %1,%2; \ - srd %1,%1,%3; \ - \ - clrldi %0,%0,1; \ - mtmsrd %0; \ - isync;" \ - : "=r"(scratch), "=r"(val) : "K"(reg), "r"(32), "r"(1)); \ - val; } ) - -#endif - -#endif /* _LOCORE */ - -/* - * Special Purpose Register declarations. - * - * The first column in the comments indicates which PowerPC - * architectures the SPR is valid on - 4 for 4xx series, - * 6 for 6xx/7xx series and 8 for 8xx and 8xxx series. - */ - -#define SPR_MQ 0x000 /* .6. 601 MQ register */ -#define SPR_XER 0x001 /* 468 Fixed Point Exception Register */ -#define SPR_DSCR 0x003 /* .6. Data Stream Control Register (Unprivileged) */ -#define SPR_RTCU_R 0x004 /* .6. 601 RTC Upper - Read */ -#define SPR_RTCL_R 0x005 /* .6. 601 RTC Lower - Read */ -#define SPR_LR 0x008 /* 468 Link Register */ -#define SPR_CTR 0x009 /* 468 Count Register */ -#define SPR_DSCRP 0x011 /* Data Stream Control Register (Privileged) */ -#define SPR_DSISR 0x012 /* .68 DSI exception source */ -#define DSISR_DIRECT 0x80000000 /* Direct-store error exception */ -#define DSISR_NOTFOUND 0x40000000 /* Translation not found */ -#define DSISR_PROTECT 0x08000000 /* Memory access not permitted */ -#define DSISR_INVRX 0x04000000 /* Reserve-indexed insn direct-store access */ -#define DSISR_STORE 0x02000000 /* Store operation */ -#define DSISR_DABR 0x00400000 /* DABR match */ -#define DSISR_SEGMENT 0x00200000 /* XXX; not in 6xx PEM */ -#define DSISR_EAR 0x00100000 /* eciwx/ecowx && EAR[E] == 0 */ -#define DSISR_MC_UE_DEFERRED 0x00008000 /* UE deferred error */ -#define DSISR_MC_UE_TABLEWALK 0x00004000 /* UE deferred error during tablewalk */ -#define DSISR_MC_DERAT_MULTIHIT 0x00000800 /* D-ERAT multi-hit */ -#define DSISR_MC_TLB_MULTIHIT 0x00000400 /* TLB multi-hit */ -#define DSISR_MC_TLBIE_ERR 0x00000200 /* TLBIE or TLBIEL programming error */ -#define DSISR_MC_SLB_PARITY 0x00000100 /* SLB parity error */ -#define DSISR_MC_SLB_MULTIHIT 0x00000080 /* SLB Multi-hit detected (D-side) */ -#define DSISR_MC_BAD_REAL_LD 0x00000040 /* Bad real address for load. */ -#define DSISR_MC_BAD_ADDR 0x00000020 /* Bad address for load or store tablewalk */ -#define SPR_DAR 0x013 /* .68 Data Address Register */ -#define SPR_RTCU_W 0x014 /* .6. 601 RTC Upper - Write */ -#define SPR_RTCL_W 0x015 /* .6. 601 RTC Lower - Write */ -#define SPR_DEC 0x016 /* .68 DECrementer register */ -#define SPR_SDR1 0x019 /* .68 Page table base address register */ -#define SPR_SRR0 0x01a /* 468 Save/Restore Register 0 */ -#define SPR_SRR1 0x01b /* 468 Save/Restore Register 1 */ -#define SRR1_ISI_PFAULT 0x40000000 /* ISI page not found */ -#define SRR1_ISI_NOEXECUTE 0x10000000 /* Memory marked no-execute */ -#define SRR1_ISI_PP 0x08000000 /* PP bits forbid access */ -#define SRR1_MCHK_DATA 0x00200000 /* Machine check data in DSISR */ -#define SRR1_MCHK_IFETCH_M 0x081c0000 /* Machine check instr fetch mask */ -#define SRR1_MCHK_IFETCH_SLBMH 0x000c0000 /* SLB multihit */ -#define SPR_CFAR 0x01c /* Come From Address Register */ -#define SPR_AMR 0x01d /* Authority Mask Register */ - -#define SPR_PID 0x030 /* 4.. Process ID */ - -#define SPR_DECAR 0x036 /* ..8 Decrementer auto reload */ -#define SPR_IAMR 0x03d /* Instr. Authority Mask Reg */ - -#define SPR_EIE 0x050 /* ..8 Exception Interrupt ??? */ -#define SPR_EID 0x051 /* ..8 Exception Interrupt ??? */ -#define SPR_NRI 0x052 /* ..8 Exception Interrupt ??? */ -#define SPR_FSCR 0x099 /* Facility Status and Control Register */ -#define FSCR_IC_MASK 0xFF00000000000000ULL /* FSCR[0:7] is Interrupt Cause */ -#define FSCR_IC_FP 0x0000000000000000ULL /* FP unavailable */ -#define FSCR_IC_VSX 0x0100000000000000ULL /* VSX unavailable */ -#define FSCR_IC_DSCR 0x0200000000000000ULL /* Access to the DSCR at SPRs 3 or 17 */ -#define FSCR_IC_PM 0x0300000000000000ULL /* Read or write access of a Performance Monitor SPR in group A */ -#define FSCR_IC_BHRB 0x0400000000000000ULL /* Execution of a BHRB Instruction */ -#define FSCR_IC_HTM 0x0500000000000000ULL /* Access to a Transactional Memory */ -/* Reserved 0x0600000000000000ULL */ -#define FSCR_IC_EBB 0x0700000000000000ULL /* Access to Event-Based Branch */ -#define FSCR_IC_TAR 0x0800000000000000ULL /* Access to Target Address Register */ -#define FSCR_IC_STOP 0x0900000000000000ULL /* Access to the 'stop' instruction in privileged non-hypervisor state */ -#define FSCR_IC_MSG 0x0A00000000000000ULL /* Access to 'msgsndp' or 'msgclrp' instructions */ -#define FSCR_IC_LM 0x0A00000000000000ULL /* Access to load monitored facility */ -#define FSCR_IC_SCV 0x0C00000000000000ULL /* Execution of a 'scv' instruction */ -#define FSCR_SCV 0x0000000000001000 /* scv instruction available */ -#define FSCR_LM 0x0000000000000800 /* Load monitored facilities available */ -#define FSCR_MSGP 0x0000000000000400 /* msgsndp and SPRs available */ -#define FSCR_TAR 0x0000000000000100 /* TAR register available */ -#define FSCR_EBB 0x0000000000000080 /* Event-based branch available */ -#define FSCR_DSCR 0x0000000000000004 /* DSCR available in PR state */ -#define SPR_UAMOR 0x09d /* User Authority Mask Override Register */ -#define SPR_DPDES 0x0b0 /* .6. Directed Privileged Doorbell Exception State Register */ -#define SPR_USPRG0 0x100 /* 4.8 User SPR General 0 */ -#define SPR_VRSAVE 0x100 /* .6. AltiVec VRSAVE */ -#define SPR_SPRG0 0x110 /* 468 SPR General 0 */ -#define SPR_SPRG1 0x111 /* 468 SPR General 1 */ -#define SPR_SPRG2 0x112 /* 468 SPR General 2 */ -#define SPR_SPRG3 0x113 /* 468 SPR General 3 */ -#define SPR_SPRG4 0x114 /* 4.8 SPR General 4 */ -#define SPR_SPRG5 0x115 /* 4.8 SPR General 5 */ -#define SPR_SPRG6 0x116 /* 4.8 SPR General 6 */ -#define SPR_SPRG7 0x117 /* 4.8 SPR General 7 */ -#define SPR_SCOMC 0x114 /* ... SCOM Address Register (970) */ -#define SPR_SCOMD 0x115 /* ... SCOM Data Register (970) */ -#define SPR_ASR 0x118 /* ... Address Space Register (PPC64) */ -#define SPR_EAR 0x11a /* .68 External Access Register */ -#define SPR_PVR 0x11f /* 468 Processor Version Register */ -#define MPC601 0x0001 -#define MPC603 0x0003 -#define MPC604 0x0004 -#define MPC602 0x0005 -#define MPC603e 0x0006 -#define MPC603ev 0x0007 -#define MPC750 0x0008 -#define MPC750CL 0x7000 /* Nintendo Wii's Broadway */ -#define MPC604ev 0x0009 -#define MPC7400 0x000c -#define MPC620 0x0014 -#define IBM403 0x0020 -#define IBM401A1 0x0021 -#define IBM401B2 0x0022 -#define IBM401C2 0x0023 -#define IBM401D2 0x0024 -#define IBM401E2 0x0025 -#define IBM401F2 0x0026 -#define IBM401G2 0x0027 -#define IBMRS64II 0x0033 -#define IBMRS64III 0x0034 -#define IBMPOWER4 0x0035 -#define IBMRS64III_2 0x0036 -#define IBMRS64IV 0x0037 -#define IBMPOWER4PLUS 0x0038 -#define IBM970 0x0039 -#define IBMPOWER5 0x003a -#define IBMPOWER5PLUS 0x003b -#define IBM970FX 0x003c -#define IBMPOWER6 0x003e -#define IBMPOWER7 0x003f -#define IBMPOWER3 0x0040 -#define IBMPOWER3PLUS 0x0041 -#define IBM970MP 0x0044 -#define IBM970GX 0x0045 -#define IBMPOWERPCA2 0x0049 -#define IBMPOWER7PLUS 0x004a -#define IBMPOWER8E 0x004b -#define IBMPOWER8NVL 0x004c -#define IBMPOWER8 0x004d -#define IBMPOWER9 0x004e -#define MPC860 0x0050 -#define IBMCELLBE 0x0070 -#define MPC8240 0x0081 -#define PA6T 0x0090 -#define IBM405GP 0x4011 -#define IBM405L 0x4161 -#define IBM750FX 0x7000 -#define MPC745X_P(v) ((v & 0xFFF8) == 0x8000) -#define MPC7450 0x8000 -#define MPC7455 0x8001 -#define MPC7457 0x8002 -#define MPC7447A 0x8003 -#define MPC7448 0x8004 -#define MPC7410 0x800c -#define MPC8245 0x8081 -#define FSL_E500v1 0x8020 -#define FSL_E500v2 0x8021 -#define FSL_E500mc 0x8023 -#define FSL_E5500 0x8024 -#define FSL_E6500 0x8040 -#define FSL_E300C1 0x8083 -#define FSL_E300C2 0x8084 -#define FSL_E300C3 0x8085 -#define FSL_E300C4 0x8086 - -#define LPCR_PECE_WAKESET (LPCR_PECE_EXT | LPCR_PECE_DECR | LPCR_PECE_ME) - -#define SPR_DBSR 0x130 /* ..8 Debug Status Register */ -#define DBSR_IDE 0x80000000 /* Imprecise debug event. */ -#define DBSR_UDE 0x40000000 /* Unconditional debug event. */ -#define DBSR_MRR 0x30000000 /* Most recent Reset (mask). */ -#define DBSR_ICMP 0x08000000 /* Instr. complete debug event. */ -#define DBSR_BRT 0x04000000 /* Branch taken debug event. */ -#define DBSR_IRPT 0x02000000 /* Interrupt taken debug event. */ -#define DBSR_TRAP 0x01000000 /* Trap instr. debug event. */ -#define DBSR_IAC1 0x00800000 /* Instr. address compare #1. */ -#define DBSR_IAC2 0x00400000 /* Instr. address compare #2. */ -#define DBSR_IAC3 0x00200000 /* Instr. address compare #3. */ -#define DBSR_IAC4 0x00100000 /* Instr. address compare #4. */ -#define DBSR_DAC1R 0x00080000 /* Data addr. read compare #1. */ -#define DBSR_DAC1W 0x00040000 /* Data addr. write compare #1. */ -#define DBSR_DAC2R 0x00020000 /* Data addr. read compare #2. */ -#define DBSR_DAC2W 0x00010000 /* Data addr. write compare #2. */ -#define DBSR_RET 0x00008000 /* Return debug event. */ -#define SPR_EPCR 0x133 -#define EPCR_EXTGS 0x80000000 -#define EPCR_DTLBGS 0x40000000 -#define EPCR_ITLBGS 0x20000000 -#define EPCR_DSIGS 0x10000000 -#define EPCR_ISIGS 0x08000000 -#define EPCR_DUVGS 0x04000000 -#define EPCR_ICM 0x02000000 -#define EPCR_GICMGS 0x01000000 -#define EPCR_DGTMI 0x00800000 -#define EPCR_DMIUH 0x00400000 -#define EPCR_PMGS 0x00200000 -#define SPR_DBCR0 0x134 /* ..8 Debug Control Register 0 */ -#define SPR_DBCR1 0x135 /* ..8 Debug Control Register 1 */ -#define SPR_IAC1 0x138 /* ..8 Instruction Address Compare 1 */ -#define SPR_IAC2 0x139 /* ..8 Instruction Address Compare 2 */ -#define SPR_IAC3 0x13a /* ..8 Instruction Address Compare 3 */ -#define SPR_IAC4 0x13b /* ..8 Instruction Address Compare 4 */ - -#define SPR_HSRR0 0x13a -#define SPR_HSRR1 0x13b -#define SPR_DAC1 0x13c /* ..8 Data Address Compare 1 */ -#define SPR_DAC2 0x13d /* ..8 Data Address Compare 2 */ -#define SPR_DVC1 0x13e /* ..8 Data Value Compare 1 */ -#define SPR_DVC2 0x13f /* ..8 Data Value Compare 2 */ - -#define SPR_LPCR 0x13e /* .6. Logical Partitioning Control */ -#define LPCR_LPES 0x008 /* Bit 60 */ -#define LPCR_HVICE 0x002 /* Hypervisor Virtualization Interrupt (Arch 3.0) */ -#define LPCR_ILE (1ULL << 25) /* Interrupt Little-Endian (ISA 2.07) */ -#define LPCR_UPRT (1ULL << 22) /* Use Process Table (ISA 3) */ -#define LPCR_HR (1ULL << 20) /* Host Radix mode */ -#define LPCR_PECE_DRBL (1ULL << 16) /* Directed Privileged Doorbell */ -#define LPCR_PECE_HDRBL (1ULL << 15) /* Directed Hypervisor Doorbell */ -#define LPCR_PECE_EXT (1ULL << 14) /* External exceptions */ -#define LPCR_PECE_DECR (1ULL << 13) /* Decrementer exceptions */ -#define LPCR_PECE_ME (1ULL << 12) /* Machine Check and Hypervisor */ - /* Maintenance exceptions */ -#define SPR_LPID 0x13f /* .6. Logical Partitioning Control */ -#define SPR_HMER 0x150 /* Hypervisor Maintenance Exception Register */ -#define SPR_HMEER 0x151 /* Hypervisor Maintenance Exception Enable Register */ -#define SPR_AMOR 0x15d /* Authority Mask Override Register */ - -#define SPR_TIR 0x1be /* .6. Thread Identification Register */ -#define SPR_PTCR 0x1d0 /* Partition Table Control Register */ -#define SPR_SPEFSCR 0x200 /* ..8 Signal Processing Engine FSCR. */ -#define SPEFSCR_SOVH 0x80000000 -#define SPEFSCR_OVH 0x40000000 -#define SPEFSCR_FGH 0x20000000 -#define SPEFSCR_FXH 0x10000000 -#define SPEFSCR_FINVH 0x08000000 -#define SPEFSCR_FDBZH 0x04000000 -#define SPEFSCR_FUNFH 0x02000000 -#define SPEFSCR_FOVFH 0x01000000 -#define SPEFSCR_FINXS 0x00200000 -#define SPEFSCR_FINVS 0x00100000 -#define SPEFSCR_FDBZS 0x00080000 -#define SPEFSCR_FUNFS 0x00040000 -#define SPEFSCR_FOVFS 0x00020000 -#define SPEFSCR_SOV 0x00008000 -#define SPEFSCR_OV 0x00004000 -#define SPEFSCR_FG 0x00002000 -#define SPEFSCR_FX 0x00001000 -#define SPEFSCR_FINV 0x00000800 -#define SPEFSCR_FDBZ 0x00000400 -#define SPEFSCR_FUNF 0x00000200 -#define SPEFSCR_FOVF 0x00000100 -#define SPEFSCR_FINXE 0x00000040 -#define SPEFSCR_FINVE 0x00000020 -#define SPEFSCR_FDBZE 0x00000010 -#define SPEFSCR_FUNFE 0x00000008 -#define SPEFSCR_FOVFE 0x00000004 -#define SPEFSCR_FRMC_M 0x00000003 -#define SPR_IBAT0U 0x210 /* .6. Instruction BAT Reg 0 Upper */ -#define SPR_IBAT0L 0x211 /* .6. Instruction BAT Reg 0 Lower */ -#define SPR_IBAT1U 0x212 /* .6. Instruction BAT Reg 1 Upper */ -#define SPR_IBAT1L 0x213 /* .6. Instruction BAT Reg 1 Lower */ -#define SPR_IBAT2U 0x214 /* .6. Instruction BAT Reg 2 Upper */ -#define SPR_IBAT2L 0x215 /* .6. Instruction BAT Reg 2 Lower */ -#define SPR_IBAT3U 0x216 /* .6. Instruction BAT Reg 3 Upper */ -#define SPR_IBAT3L 0x217 /* .6. Instruction BAT Reg 3 Lower */ -#define SPR_DBAT0U 0x218 /* .6. Data BAT Reg 0 Upper */ -#define SPR_DBAT0L 0x219 /* .6. Data BAT Reg 0 Lower */ -#define SPR_DBAT1U 0x21a /* .6. Data BAT Reg 1 Upper */ -#define SPR_DBAT1L 0x21b /* .6. Data BAT Reg 1 Lower */ -#define SPR_DBAT2U 0x21c /* .6. Data BAT Reg 2 Upper */ -#define SPR_DBAT2L 0x21d /* .6. Data BAT Reg 2 Lower */ -#define SPR_DBAT3U 0x21e /* .6. Data BAT Reg 3 Upper */ -#define SPR_DBAT3L 0x21f /* .6. Data BAT Reg 3 Lower */ -#define SPR_IC_CST 0x230 /* ..8 Instruction Cache CSR */ -#define IC_CST_IEN 0x80000000 /* I cache is ENabled (RO) */ -#define IC_CST_CMD_INVALL 0x0c000000 /* I cache invalidate all */ -#define IC_CST_CMD_UNLOCKALL 0x0a000000 /* I cache unlock all */ -#define IC_CST_CMD_UNLOCK 0x08000000 /* I cache unlock block */ -#define IC_CST_CMD_LOADLOCK 0x06000000 /* I cache load & lock block */ -#define IC_CST_CMD_DISABLE 0x04000000 /* I cache disable */ -#define IC_CST_CMD_ENABLE 0x02000000 /* I cache enable */ -#define IC_CST_CCER1 0x00200000 /* I cache error type 1 (RO) */ -#define IC_CST_CCER2 0x00100000 /* I cache error type 2 (RO) */ -#define IC_CST_CCER3 0x00080000 /* I cache error type 3 (RO) */ -#define SPR_IBAT4U 0x230 /* .6. Instruction BAT Reg 4 Upper */ -#define SPR_IC_ADR 0x231 /* ..8 Instruction Cache Address */ -#define SPR_IBAT4L 0x231 /* .6. Instruction BAT Reg 4 Lower */ -#define SPR_IC_DAT 0x232 /* ..8 Instruction Cache Data */ -#define SPR_IBAT5U 0x232 /* .6. Instruction BAT Reg 5 Upper */ -#define SPR_IBAT5L 0x233 /* .6. Instruction BAT Reg 5 Lower */ -#define SPR_IBAT6U 0x234 /* .6. Instruction BAT Reg 6 Upper */ -#define SPR_IBAT6L 0x235 /* .6. Instruction BAT Reg 6 Lower */ -#define SPR_IBAT7U 0x236 /* .6. Instruction BAT Reg 7 Upper */ -#define SPR_IBAT7L 0x237 /* .6. Instruction BAT Reg 7 Lower */ -#define SPR_DC_CST 0x230 /* ..8 Data Cache CSR */ -#define DC_CST_DEN 0x80000000 /* D cache ENabled (RO) */ -#define DC_CST_DFWT 0x40000000 /* D cache Force Write-Thru (RO) */ -#define DC_CST_LES 0x20000000 /* D cache Little Endian Swap (RO) */ -#define DC_CST_CMD_FLUSH 0x0e000000 /* D cache invalidate all */ -#define DC_CST_CMD_INVALL 0x0c000000 /* D cache invalidate all */ -#define DC_CST_CMD_UNLOCKALL 0x0a000000 /* D cache unlock all */ -#define DC_CST_CMD_UNLOCK 0x08000000 /* D cache unlock block */ -#define DC_CST_CMD_CLRLESWAP 0x07000000 /* D cache clr little-endian swap */ -#define DC_CST_CMD_LOADLOCK 0x06000000 /* D cache load & lock block */ -#define DC_CST_CMD_SETLESWAP 0x05000000 /* D cache set little-endian swap */ -#define DC_CST_CMD_DISABLE 0x04000000 /* D cache disable */ -#define DC_CST_CMD_CLRFWT 0x03000000 /* D cache clear forced write-thru */ -#define DC_CST_CMD_ENABLE 0x02000000 /* D cache enable */ -#define DC_CST_CMD_SETFWT 0x01000000 /* D cache set forced write-thru */ -#define DC_CST_CCER1 0x00200000 /* D cache error type 1 (RO) */ -#define DC_CST_CCER2 0x00100000 /* D cache error type 2 (RO) */ -#define DC_CST_CCER3 0x00080000 /* D cache error type 3 (RO) */ -#define SPR_DBAT4U 0x238 /* .6. Data BAT Reg 4 Upper */ -#define SPR_DC_ADR 0x231 /* ..8 Data Cache Address */ -#define SPR_DBAT4L 0x239 /* .6. Data BAT Reg 4 Lower */ -#define SPR_DC_DAT 0x232 /* ..8 Data Cache Data */ -#define SPR_DBAT5U 0x23a /* .6. Data BAT Reg 5 Upper */ -#define SPR_DBAT5L 0x23b /* .6. Data BAT Reg 5 Lower */ -#define SPR_DBAT6U 0x23c /* .6. Data BAT Reg 6 Upper */ -#define SPR_DBAT6L 0x23d /* .6. Data BAT Reg 6 Lower */ -#define SPR_DBAT7U 0x23e /* .6. Data BAT Reg 7 Upper */ -#define SPR_DBAT7L 0x23f /* .6. Data BAT Reg 7 Lower */ -#define SPR_SPRG8 0x25c /* ..8 SPR General 8 */ -#define SPR_MI_CTR 0x310 /* ..8 IMMU control */ -#define Mx_CTR_GPM 0x80000000 /* Group Protection Mode */ -#define Mx_CTR_PPM 0x40000000 /* Page Protection Mode */ -#define Mx_CTR_CIDEF 0x20000000 /* Cache-Inhibit DEFault */ -#define MD_CTR_WTDEF 0x20000000 /* Write-Through DEFault */ -#define Mx_CTR_RSV4 0x08000000 /* Reserve 4 TLB entries */ -#define MD_CTR_TWAM 0x04000000 /* TableWalk Assist Mode */ -#define Mx_CTR_PPCS 0x02000000 /* Priv/user state compare mode */ -#define Mx_CTR_TLB_INDX 0x000001f0 /* TLB index mask */ -#define Mx_CTR_TLB_INDX_BITPOS 8 /* TLB index shift */ - -#define SPR_MI_AP 0x312 /* ..8 IMMU access protection */ -#define Mx_GP_SUPER(n) (0 << (2*(15-(n)))) /* access is supervisor */ -#define Mx_GP_PAGE (1 << (2*(15-(n)))) /* access is page protect */ -#define Mx_GP_SWAPPED (2 << (2*(15-(n)))) /* access is swapped */ -#define Mx_GP_USER (3 << (2*(15-(n)))) /* access is user */ -#define SPR_MI_EPN 0x313 /* ..8 IMMU effective number */ -#define Mx_EPN_EPN 0xfffff000 /* Effective Page Number mask */ -#define Mx_EPN_EV 0x00000020 /* Entry Valid */ -#define Mx_EPN_ASID 0x0000000f /* Address Space ID */ -#define SPR_MI_TWC 0x315 /* ..8 IMMU tablewalk control */ -#define MD_TWC_L2TB 0xfffff000 /* Level-2 Tablewalk Base */ -#define Mx_TWC_APG 0x000001e0 /* Access Protection Group */ -#define Mx_TWC_G 0x00000010 /* Guarded memory */ -#define Mx_TWC_PS 0x0000000c /* Page Size (L1) */ -#define MD_TWC_WT 0x00000002 /* Write-Through */ -#define Mx_TWC_V 0x00000001 /* Entry Valid */ -#define SPR_MI_RPN 0x316 /* ..8 IMMU real (phys) page number */ -#define Mx_RPN_RPN 0xfffff000 /* Real Page Number */ -#define Mx_RPN_PP 0x00000ff0 /* Page Protection */ -#define Mx_RPN_SPS 0x00000008 /* Small Page Size */ -#define Mx_RPN_SH 0x00000004 /* SHared page */ -#define Mx_RPN_CI 0x00000002 /* Cache Inhibit */ -#define Mx_RPN_V 0x00000001 /* Valid */ -#define SPR_MD_CTR 0x318 /* ..8 DMMU control */ -#define SPR_M_CASID 0x319 /* ..8 CASID */ -#define M_CASID 0x0000000f /* Current AS Id */ -#define SPR_MD_AP 0x31a /* ..8 DMMU access protection */ -#define SPR_MD_EPN 0x31b /* ..8 DMMU effective number */ - -#define SPR_MMCRA 0x312 /* ... Monitor Mode Control Register A */ -#define SPR_PMC1 0x313 /* ... PMC 1 */ -#define SPR_PMC2 0x314 /* ... PMC 2 */ -#define SPR_PMC3 0x315 /* ... PMC 3 */ -#define SPR_PMC4 0x316 /* ... PMC 4 */ -#define SPR_PMC5 0x317 /* ... PMC 5 */ -#define SPR_PMC6 0x318 /* ... PMC 6 */ -#define SPR_PMC7 0x319 /* ... PMC 7 */ -#define SPR_PMC8 0x31a /* ... PMC 8 */ - -#define SPR_MMCR0 0x31b /* ... Monitor Mode Control Register 0 */ -#define SPR_MMCR0_FC 0x80000000 /* Freeze counters */ -#define SPR_MMCR0_FCS 0x40000000 /* Freeze counters in supervisor mode */ -#define SPR_MMCR0_FCP 0x20000000 /* Freeze counters in user mode */ -#define SPR_MMCR0_FCM1 0x10000000 /* Freeze counters when mark=1 */ -#define SPR_MMCR0_FCM0 0x08000000 /* Freeze counters when mark=0 */ -#define SPR_MMCR0_PMXE 0x04000000 /* Enable PM interrupt */ -#define SPR_MMCR0_PMAE 0x04000000 /* PM Alert Enable */ -#define SPR_MMCR0_FCECE 0x02000000 /* Freeze counters after event */ -#define SPR_MMCR0_TBSEL_15 0x01800000 /* Count bit 15 of TBL */ -#define SPR_MMCR0_TBSEL_19 0x01000000 /* Count bit 19 of TBL */ -#define SPR_MMCR0_TBSEL_23 0x00800000 /* Count bit 23 of TBL */ -#define SPR_MMCR0_TBSEL_31 0x00000000 /* Count bit 31 of TBL */ -#define SPR_MMCR0_TBEE 0x00400000 /* Time-base event enable */ -#define SPR_MMCR0_THRESHOLD(x) ((x) << 16) /* Threshold value */ -#define SPR_MMCR0_PMC1CE 0x00008000 /* PMC1 condition enable */ -#define SPR_MMCR0_PMCNCE 0x00004000 /* PMCn condition enable */ -#define SPR_MMCR0_TRIGGER 0x00002000 /* Trigger */ -#define SPR_MMCR0_PMAO 0x00000080 /* PM Alert Occurred */ -#define SPR_MMCR0_FCPC 0x00001000 /* Freeze Counters in Problem State Cond. */ -#define SPR_MMCR0_FC56 0x00000010 /* Freeze Counters 5-6 */ -#define SPR_MMCR0_PMC1SEL(x) ((x) << 8) /* PMC1 selector (970) */ -#define SPR_MMCR0_PMC2SEL(x) ((x) << 1) /* PMC2 selector (970) */ -#define SPR_MMCR0_74XX_PMC1SEL(x) (((x) & 0x3f) << 6) /* PMC1 selector */ -#define SPR_MMCR0_74XX_PMC2SEL(x) (((x) & 0x3f) << 0) /* PMC2 selector */ - -#define SPR_MMCR1 0x31e /* ... Monitor Mode Control Register 1 */ -#define SPR_MMCR1_PMC3SEL(x) (((x) & 0x1f) << 27) /* PMC 3 selector */ -#define SPR_MMCR1_PMC4SEL(x) (((x) & 0x1f) << 22) /* PMC 4 selector */ -#define SPR_MMCR1_PMC5SEL(x) (((x) & 0x1f) << 17) /* PMC 5 selector */ -#define SPR_MMCR1_PMC6SEL(x) (((x) & 0x1f) << 12) /* PMC 6 selector */ -#define SPR_MMCR1_74XX_PMC6SEL(x) (((x) & 0x3f) << 11) /* PMC 6 selector */ -#define SPR_MMCR1_PMC7SEL(x) (((x) & 0x1f) << 7) /* PMC 7 selector */ -#define SPR_MMCR1_PMC8SEL(x) (((x) & 0x1f) << 2) /* PMC 8 selector */ -#define SPR_MMCR1_P8_PMCSEL_ALL 0xffffffff -#define SPR_MMCR1_P8_PMCNSEL_MASK(n) (0xffUL << ((3-(n))*8)) -#define SPR_MMCR1_P8_PMCNSEL(n, v) ((unsigned long)(v) << ((3-(n))*8)) - -#define SPR_MMCR2 0x311 -#define SPR_MMCR2_CNBIT(n, bit) ((bit) << (((5 - (n)) * 9) + 10)) -#define SPR_MMCR2_FCNS(n) SPR_MMCR2_CNBIT(n, 0x100ULL) -#define SPR_MMCR2_FCNP0(n) SPR_MMCR2_CNBIT(n, 0x080ULL) -#define SPR_MMCR2_FCNP1(n) SPR_MMCR2_CNBIT(n, 0x040ULL) -#define SPR_MMCR2_FCNM1(n) SPR_MMCR2_CNBIT(n, 0x020ULL) -#define SPR_MMCR2_FCNM0(n) SPR_MMCR2_CNBIT(n, 0x010ULL) -#define SPR_MMCR2_FCNWAIT(n) SPR_MMCR2_CNBIT(n, 0x008ULL) -#define SPR_MMCR2_FCNH(n) SPR_MMCR2_CNBIT(n, 0x004ULL) -/* Freeze Counter N in Hypervisor/Supervisor/Problem states */ -#define SPR_MMCR2_FCNHSP(n) \ - (SPR_MMCR2_FCNS(n) | SPR_MMCR2_FCNP0(n) | \ - SPR_MMCR2_FCNP1(n) | SPR_MMCR2_FCNH(n)) - -#define SPR_M_TWB 0x31c /* ..8 MMU tablewalk base */ -#define M_TWB_L1TB 0xfffff000 /* level-1 translation base */ -#define M_TWB_L1INDX 0x00000ffc /* level-1 index */ -#define SPR_MD_TWC 0x31d /* ..8 DMMU tablewalk control */ -#define SPR_MD_RPN 0x31e /* ..8 DMMU real (phys) page number */ -#define SPR_MD_TW 0x31f /* ..8 MMU tablewalk scratch */ -#define SPR_BESCRS 0x320 /* .6. Branch Event Status and Control Set Register */ -#define SPR_BESCRSU 0x321 /* .6. Branch Event Status and Control Set Register (upper 32-bit) */ -#define SPR_BESCRR 0x322 /* .6. Branch Event Status and Control Reset Register */ -#define SPR_BESCRRU 0x323 /* .6. Branch Event Status and Control Register (upper 32-bit) */ -#define SPR_EBBHR 0x324 /* .6. Event-based Branch Handler Register */ -#define SPR_EBBRR 0x325 /* .6. Event-based Branch Return Register */ -#define SPR_BESCR 0x326 /* .6. Branch Event Status and Control Register */ -#define SPR_LMRR 0x32d /* .6. Load Monitored Region Register */ -#define SPR_LMSER 0x32e /* .6. Load Monitored Section Enable Register */ -#define SPR_TAR 0x32f /* .6. Branch Target Address Register */ -#define SPR_MI_CAM 0x330 /* ..8 IMMU CAM entry read */ -#define SPR_MI_RAM0 0x331 /* ..8 IMMU RAM entry read reg 0 */ -#define SPR_MI_RAM1 0x332 /* ..8 IMMU RAM entry read reg 1 */ -#define SPR_MD_CAM 0x338 /* ..8 IMMU CAM entry read */ -#define SPR_MD_RAM0 0x339 /* ..8 IMMU RAM entry read reg 0 */ -#define SPR_MD_RAM1 0x33a /* ..8 IMMU RAM entry read reg 1 */ -#define SPR_PSSCR 0x357 /* Processor Stop Status and Control Register (ISA 3.0) */ -#define PSSCR_PLS_S 60 -#define PSSCR_PLS_M (0xf << PSSCR_PLS_S) -#define PSSCR_SD (1 << 22) -#define PSSCR_ESL (1 << 21) -#define PSSCR_EC (1 << 20) -#define PSSCR_PSLL_S 16 -#define PSSCR_PSLL_M (0xf << PSSCR_PSLL_S) -#define PSSCR_TR_S 8 -#define PSSCR_TR_M (0x3 << PSSCR_TR_S) -#define PSSCR_MTL_S 4 -#define PSSCR_MTL_M (0xf << PSSCR_MTL_S) -#define PSSCR_RL_S 0 -#define PSSCR_RL_M (0xf << PSSCR_RL_S) -#define SPR_PMCR 0x374 /* Processor Management Control Register */ -#define SPR_UMMCR2 0x3a0 /* .6. User Monitor Mode Control Register 2 */ -#define SPR_UMMCR0 0x3a8 /* .6. User Monitor Mode Control Register 0 */ -#define SPR_USIA 0x3ab /* .6. User Sampled Instruction Address */ -#define SPR_UMMCR1 0x3ac /* .6. User Monitor Mode Control Register 1 */ -#define SPR_MMCR2_74XX 0x3b0 /* .6. Monitor Mode Control Register 2 */ -#define SPR_MMCR2_74XX_THRESHMULT_32 0x80000000 /* Multiply MMCR0 threshold by 32 */ -#define SPR_MMCR2_74XX_THRESHMULT_2 0x00000000 /* Multiply MMCR0 threshold by 2 */ -#define SPR_PMC5_74XX 0x3b1 /* .6. Performance Counter Register 5 */ -#define SPR_PMC6_74XX 0x3b2 /* .6. Performance Counter Register 6 */ -#define SPR_MMCR0_74XX 0x3b8 /* .6. Monitor Mode Control Register 0 */ -#define SPR_PMC1_74XX 0x3b9 /* .6. Performance Counter Register 1 */ -#define SPR_PMC2_74XX 0x3ba /* .6. Performance Counter Register 2 */ -#define SPR_SIA 0x3bb /* .6. Sampled Instruction Address */ -#define SPR_MMCR1_74XX 0x3bc /* .6. Monitor Mode Control Register 2 */ - -#define SPR_PMC3_74XX 0x3bd /* .6. Performance Counter Register 3 */ -#define SPR_PMC4_74XX 0x3be /* .6. Performance Counter Register 4 */ -#define SPR_DMISS 0x3d0 /* .68 Data TLB Miss Address Register */ -#define SPR_DCMP 0x3d1 /* .68 Data TLB Compare Register */ -#define SPR_HASH1 0x3d2 /* .68 Primary Hash Address Register */ -#define SPR_HASH2 0x3d3 /* .68 Secondary Hash Address Register */ -#define SPR_IMISS 0x3d4 /* .68 Instruction TLB Miss Address Register */ -#define SPR_TLBMISS 0x3d4 /* .6. TLB Miss Address Register */ -#define SPR_DEAR 0x03d /* ..8 Data Exception Address Register */ -#define SPR_ICMP 0x3d5 /* .68 Instruction TLB Compare Register */ -#define SPR_PTEHI 0x3d5 /* .6. Instruction TLB Compare Register */ -#define SPR_RPA 0x3d6 /* .68 Required Physical Address Register */ -#define SPR_PTELO 0x3d6 /* .6. Required Physical Address Register */ - -#define SPR_TSR 0x150 /* ..8 Timer Status Register */ -#define SPR_TCR 0x154 /* ..8 Timer Control Register */ - -#define TSR_ENW 0x80000000 /* Enable Next Watchdog */ -#define TSR_WIS 0x40000000 /* Watchdog Interrupt Status */ -#define TSR_WRS_MASK 0x30000000 /* Watchdog Reset Status */ -#define TSR_WRS_NONE 0x00000000 /* No watchdog reset has occurred */ -#define TSR_WRS_CORE 0x10000000 /* Core reset was forced by the watchdog */ -#define TSR_WRS_CHIP 0x20000000 /* Chip reset was forced by the watchdog */ -#define TSR_WRS_SYSTEM 0x30000000 /* System reset was forced by the watchdog */ -#define TSR_PIS 0x08000000 /* PIT Interrupt Status */ -#define TSR_DIS 0x08000000 /* Decrementer Interrupt Status */ -#define TSR_FIS 0x04000000 /* FIT Interrupt Status */ - -#define TCR_WP_MASK 0xc0000000 /* Watchdog Period mask */ -#define TCR_WP_2_17 0x00000000 /* 2**17 clocks */ -#define TCR_WP_2_21 0x40000000 /* 2**21 clocks */ -#define TCR_WP_2_25 0x80000000 /* 2**25 clocks */ -#define TCR_WP_2_29 0xc0000000 /* 2**29 clocks */ -#define TCR_WRC_MASK 0x30000000 /* Watchdog Reset Control mask */ -#define TCR_WRC_NONE 0x00000000 /* No watchdog reset */ -#define TCR_WRC_CORE 0x10000000 /* Core reset */ -#define TCR_WRC_CHIP 0x20000000 /* Chip reset */ -#define TCR_WRC_SYSTEM 0x30000000 /* System reset */ -#define TCR_WIE 0x08000000 /* Watchdog Interrupt Enable */ -#define TCR_PIE 0x04000000 /* PIT Interrupt Enable */ -#define TCR_DIE 0x04000000 /* Pecrementer Interrupt Enable */ -#define TCR_FP_MASK 0x03000000 /* FIT Period */ -#define TCR_FP_2_9 0x00000000 /* 2**9 clocks */ -#define TCR_FP_2_13 0x01000000 /* 2**13 clocks */ -#define TCR_FP_2_17 0x02000000 /* 2**17 clocks */ -#define TCR_FP_2_21 0x03000000 /* 2**21 clocks */ -#define TCR_FIE 0x00800000 /* FIT Interrupt Enable */ -#define TCR_ARE 0x00400000 /* Auto Reload Enable */ - -#define SPR_HID0 0x3f0 /* ..8 Hardware Implementation Register 0 */ -#define SPR_HID1 0x3f1 /* ..8 Hardware Implementation Register 1 */ -#define SPR_HID2 0x3f3 /* ..8 Hardware Implementation Register 2 */ -#define SPR_HID4 0x3f4 /* ..8 Hardware Implementation Register 4 */ -#define SPR_HID5 0x3f6 /* ..8 Hardware Implementation Register 5 */ -#define SPR_HID6 0x3f9 /* ..8 Hardware Implementation Register 6 */ - -#define SPR_CELL_TSRL 0x380 /* ... Cell BE Thread Status Register */ -#define SPR_CELL_TSCR 0x399 /* ... Cell BE Thread Switch Register */ - -#if defined(AIM) -#define SPR_PIR 0x3ff /* .6. Processor Identification Register */ -#elif defined(BOOKE) -#define SPR_PIR 0x11e /* ..8 Processor Identification Register */ -#endif - -#define DBCR0_EDM 0x80000000 /* External Debug Mode */ -#define DBCR0_IDM 0x40000000 /* Internal Debug Mode */ -#define DBCR0_RST_MASK 0x30000000 /* ReSeT */ -#define DBCR0_RST_NONE 0x00000000 /* No action */ -#define DBCR0_RST_CORE 0x10000000 /* Core reset */ -#define DBCR0_RST_CHIP 0x20000000 /* Chip reset */ -#define DBCR0_RST_SYSTEM 0x30000000 /* System reset */ -#define DBCR0_IC 0x08000000 /* Instruction Completion debug event */ -#define DBCR0_BT 0x04000000 /* Branch Taken debug event */ -#define DBCR0_EDE 0x02000000 /* Exception Debug Event */ -#define DBCR0_TDE 0x01000000 /* Trap Debug Event */ -#define DBCR0_IA1 0x00800000 /* IAC (Instruction Address Compare) 1 debug event */ -#define DBCR0_IA2 0x00400000 /* IAC 2 debug event */ -#define DBCR0_IA12 0x00200000 /* Instruction Address Range Compare 1-2 */ -#define DBCR0_IA12X 0x00100000 /* IA12 eXclusive */ -#define DBCR0_IA3 0x00080000 /* IAC 3 debug event */ -#define DBCR0_IA4 0x00040000 /* IAC 4 debug event */ -#define DBCR0_IA34 0x00020000 /* Instruction Address Range Compare 3-4 */ -#define DBCR0_IA34X 0x00010000 /* IA34 eXclusive */ -#define DBCR0_IA12T 0x00008000 /* Instruction Address Range Compare 1-2 range Toggle */ -#define DBCR0_IA34T 0x00004000 /* Instruction Address Range Compare 3-4 range Toggle */ -#define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */ - -#define SPR_IABR 0x3f2 /* ..8 Instruction Address Breakpoint Register 0 */ -#define SPR_DABR 0x3f5 /* .6. Data Address Breakpoint Register */ -#define SPR_MSSCR0 0x3f6 /* .6. Memory SubSystem Control Register */ -#define MSSCR0_SHDEN 0x80000000 /* 0: Shared-state enable */ -#define MSSCR0_SHDPEN3 0x40000000 /* 1: ~SHD[01] signal enable in MEI mode */ -#define MSSCR0_L1INTVEN 0x38000000 /* 2-4: L1 data cache ~HIT intervention enable */ -#define MSSCR0_L2INTVEN 0x07000000 /* 5-7: L2 data cache ~HIT intervention enable*/ -#define MSSCR0_DL1HWF 0x00800000 /* 8: L1 data cache hardware flush */ -#define MSSCR0_MBO 0x00400000 /* 9: must be one */ -#define MSSCR0_EMODE 0x00200000 /* 10: MPX bus mode (read-only) */ -#define MSSCR0_ABD 0x00100000 /* 11: address bus driven (read-only) */ -#define MSSCR0_MBZ 0x000fffff /* 12-31: must be zero */ -#define MSSCR0_L2PFE 0x00000003 /* 30-31: L2 prefetch enable */ -#define SPR_MSSSR0 0x3f7 /* .6. Memory Subsystem Status Register (MPC745x) */ -#define MSSSR0_L2TAG 0x00040000 /* 13: L2 tag parity error */ -#define MSSSR0_L2DAT 0x00020000 /* 14: L2 data parity error */ -#define MSSSR0_L3TAG 0x00010000 /* 15: L3 tag parity error */ -#define MSSSR0_L3DAT 0x00008000 /* 16: L3 data parity error */ -#define MSSSR0_APE 0x00004000 /* 17: Address parity error */ -#define MSSSR0_DPE 0x00002000 /* 18: Data parity error */ -#define MSSSR0_TEA 0x00001000 /* 19: Bus transfer error acknowledge */ -#define SPR_LDSTCR 0x3f8 /* .6. Load/Store Control Register */ -#define SPR_L2PM 0x3f8 /* .6. L2 Private Memory Control Register */ -#define SPR_L2CR 0x3f9 /* .6. L2 Control Register */ -#define L2CR_L2E 0x80000000 /* 0: L2 enable */ -#define L2CR_L2PE 0x40000000 /* 1: L2 data parity enable */ -#define L2CR_L2SIZ 0x30000000 /* 2-3: L2 size */ -#define L2SIZ_2M 0x00000000 -#define L2SIZ_256K 0x10000000 -#define L2SIZ_512K 0x20000000 -#define L2SIZ_1M 0x30000000 -#define L2CR_L2CLK 0x0e000000 /* 4-6: L2 clock ratio */ -#define L2CLK_DIS 0x00000000 /* disable L2 clock */ -#define L2CLK_10 0x02000000 /* core clock / 1 */ -#define L2CLK_15 0x04000000 /* / 1.5 */ -#define L2CLK_20 0x08000000 /* / 2 */ -#define L2CLK_25 0x0a000000 /* / 2.5 */ -#define L2CLK_30 0x0c000000 /* / 3 */ -#define L2CR_L2RAM 0x01800000 /* 7-8: L2 RAM type */ -#define L2RAM_FLOWTHRU_BURST 0x00000000 -#define L2RAM_PIPELINE_BURST 0x01000000 -#define L2RAM_PIPELINE_LATE 0x01800000 -#define L2CR_L2DO 0x00400000 /* 9: L2 data-only. - Setting this bit disables instruction - caching. */ -#define L2CR_L2I 0x00200000 /* 10: L2 global invalidate. */ -#define L2CR_L2IO_7450 0x00010000 /* 11: L2 instruction-only (MPC745x). */ -#define L2CR_L2CTL 0x00100000 /* 11: L2 RAM control (ZZ enable). - Enables automatic operation of the - L2ZZ (low-power mode) signal. */ -#define L2CR_L2WT 0x00080000 /* 12: L2 write-through. */ -#define L2CR_L2TS 0x00040000 /* 13: L2 test support. */ -#define L2CR_L2OH 0x00030000 /* 14-15: L2 output hold. */ -#define L2CR_L2DO_7450 0x00010000 /* 15: L2 data-only (MPC745x). */ -#define L2CR_L2SL 0x00008000 /* 16: L2 DLL slow. */ -#define L2CR_L2DF 0x00004000 /* 17: L2 differential clock. */ -#define L2CR_L2BYP 0x00002000 /* 18: L2 DLL bypass. */ -#define L2CR_L2FA 0x00001000 /* 19: L2 flush assist (for software flush). */ -#define L2CR_L2HWF 0x00000800 /* 20: L2 hardware flush. */ -#define L2CR_L2IO 0x00000400 /* 21: L2 instruction-only. */ -#define L2CR_L2CLKSTP 0x00000200 /* 22: L2 clock stop. */ -#define L2CR_L2DRO 0x00000100 /* 23: L2DLL rollover checkstop enable. */ -#define L2CR_L2IP 0x00000001 /* 31: L2 global invalidate in */ - /* progress (read only). */ -#define SPR_L3CR 0x3fa /* .6. L3 Control Register */ -#define L3CR_L3E 0x80000000 /* 0: L3 enable */ -#define L3CR_L3PE 0x40000000 /* 1: L3 data parity enable */ -#define L3CR_L3APE 0x20000000 -#define L3CR_L3SIZ 0x10000000 /* 3: L3 size (0=1MB, 1=2MB) */ -#define L3CR_L3CLKEN 0x08000000 /* 4: Enables L3_CLK[0:1] */ -#define L3CR_L3CLK 0x03800000 -#define L3CR_L3IO 0x00400000 -#define L3CR_L3CLKEXT 0x00200000 -#define L3CR_L3CKSPEXT 0x00100000 -#define L3CR_L3OH1 0x00080000 -#define L3CR_L3SPO 0x00040000 -#define L3CR_L3CKSP 0x00030000 -#define L3CR_L3PSP 0x0000e000 -#define L3CR_L3REP 0x00001000 -#define L3CR_L3HWF 0x00000800 -#define L3CR_L3I 0x00000400 /* 21: L3 global invalidate */ -#define L3CR_L3RT 0x00000300 -#define L3CR_L3NIRCA 0x00000080 -#define L3CR_L3DO 0x00000040 -#define L3CR_PMEN 0x00000004 -#define L3CR_PMSIZ 0x00000003 - -#define SPR_THRM1 0x3fc /* .6. Thermal Management Register */ -#define SPR_THRM2 0x3fd /* .6. Thermal Management Register */ -#define SPR_THRM_TIN 0x80000000 /* Thermal interrupt bit (RO) */ -#define SPR_THRM_TIV 0x40000000 /* Thermal interrupt valid (RO) */ -#define SPR_THRM_THRESHOLD(x) ((x) << 23) /* Thermal sensor threshold */ -#define SPR_THRM_TID 0x00000004 /* Thermal interrupt direction */ -#define SPR_THRM_TIE 0x00000002 /* Thermal interrupt enable */ -#define SPR_THRM_VALID 0x00000001 /* Valid bit */ -#define SPR_THRM3 0x3fe /* .6. Thermal Management Register */ -#define SPR_THRM_TIMER(x) ((x) << 1) /* Sampling interval timer */ -#define SPR_THRM_ENABLE 0x00000001 /* TAU Enable */ -#define SPR_FPECR 0x3fe /* .6. Floating-Point Exception Cause Register */ - -/* Time Base Register declarations */ -#define TBR_TBL 0x10c /* 468 Time Base Lower - read */ -#define TBR_TBU 0x10d /* 468 Time Base Upper - read */ -#define TBR_TBWL 0x11c /* 468 Time Base Lower - supervisor, write */ -#define TBR_TBWU 0x11d /* 468 Time Base Upper - supervisor, write */ - -/* Performance counter declarations */ -#define PMC_OVERFLOW 0x80000000 /* Counter has overflowed */ - -/* The first five countable [non-]events are common to many PMC's */ -#define PMCN_NONE 0 /* Count nothing */ -#define PMCN_CYCLES 1 /* Processor cycles */ -#define PMCN_ICOMP 2 /* Instructions completed */ -#define PMCN_TBLTRANS 3 /* TBL bit transitions */ -#define PCMN_IDISPATCH 4 /* Instructions dispatched */ - -/* Similar things for the 970 PMC direct counters */ -#define PMC970N_NONE 0x8 /* Count nothing */ -#define PMC970N_CYCLES 0xf /* Processor cycles */ -#define PMC970N_ICOMP 0x9 /* Instructions completed */ - -#if defined(BOOKE) - -#define SPR_MCARU 0x239 /* ..8 Machine Check Address register upper bits */ -#define SPR_MCSR 0x23c /* ..8 Machine Check Syndrome register */ -#define MCSR_MCP 0x80000000 /* Machine check input signal to core */ -#define MCSR_L2MMU_MHIT 0x08000000 /* L2 MMU simultaneous hit */ -#define MCSR_NMI 0x00100000 /* Non-maskable interrupt */ -#define MCSR_MAV 0x00080000 /* MCAR address valid */ -#define MCSR_MEA 0x00040000 /* MCAR effective address */ -#define MCSR_IF 0x00010000 /* Instruction fetch error report */ -#define MCSR_LD 0x00008000 /* Load instruction error report */ -#define MCSR_ST 0x00004000 /* Store instruction error report */ -#define MCSR_LDG 0x00002000 /* Guarded load instruction error report */ -#define MCSR_TLBSYNC 0x00000002 /* Simultaneous TLBSYNC detected */ -#define SPR_MCAR 0x23d /* ..8 Machine Check Address register */ - -#define SPR_ESR 0x003e /* ..8 Exception Syndrome Register */ -#define ESR_PIL 0x08000000 /* Program interrupt - illegal */ -#define ESR_PPR 0x04000000 /* Program interrupt - privileged */ -#define ESR_PTR 0x02000000 /* Program interrupt - trap */ -#define ESR_ST 0x00800000 /* Store operation */ -#define ESR_DLK 0x00200000 /* Data storage, D cache locking */ -#define ESR_ILK 0x00100000 /* Data storage, I cache locking */ -#define ESR_BO 0x00020000 /* Data/instruction storage, byte ordering */ -#define ESR_SPE 0x00000080 /* SPE exception bit */ - -#define SPR_CSRR0 0x03a /* ..8 58 Critical SRR0 */ -#define SPR_CSRR1 0x03b /* ..8 59 Critical SRR1 */ -#define SPR_MCSRR0 0x23a /* ..8 570 Machine check SRR0 */ -#define SPR_MCSRR1 0x23b /* ..8 571 Machine check SRR1 */ -#define SPR_DSRR0 0x23e /* ..8 574 Debug SRR0 */ -#define SPR_DSRR1 0x23f /* ..8 575 Debug SRR1 */ - -#define SPR_MMUCSR0 0x3f4 /* ..8 1012 MMU Control and Status Register 0 */ -#define MMUCSR0_L2TLB0_FI 0x04 /* TLB0 flash invalidate */ -#define MMUCSR0_L2TLB1_FI 0x02 /* TLB1 flash invalidate */ - -#define SPR_SVR 0x3ff /* ..8 1023 System Version Register */ -#define SVR_MPC8533 0x8034 -#define SVR_MPC8533E 0x803c -#define SVR_MPC8541 0x8072 -#define SVR_MPC8541E 0x807a -#define SVR_MPC8548 0x8031 -#define SVR_MPC8548E 0x8039 -#define SVR_MPC8555 0x8071 -#define SVR_MPC8555E 0x8079 -#define SVR_MPC8572 0x80e0 -#define SVR_MPC8572E 0x80e8 -#define SVR_P1011 0x80e5 -#define SVR_P1011E 0x80ed -#define SVR_P1013 0x80e7 -#define SVR_P1013E 0x80ef -#define SVR_P1020 0x80e4 -#define SVR_P1020E 0x80ec -#define SVR_P1022 0x80e6 -#define SVR_P1022E 0x80ee -#define SVR_P2010 0x80e3 -#define SVR_P2010E 0x80eb -#define SVR_P2020 0x80e2 -#define SVR_P2020E 0x80ea -#define SVR_P2041 0x8210 -#define SVR_P2041E 0x8218 -#define SVR_P3041 0x8211 -#define SVR_P3041E 0x8219 -#define SVR_P4040 0x8200 -#define SVR_P4040E 0x8208 -#define SVR_P4080 0x8201 -#define SVR_P4080E 0x8209 -#define SVR_P5010 0x8221 -#define SVR_P5010E 0x8229 -#define SVR_P5020 0x8220 -#define SVR_P5020E 0x8228 -#define SVR_P5021 0x8205 -#define SVR_P5021E 0x820d -#define SVR_P5040 0x8204 -#define SVR_P5040E 0x820c -#define SVR_VER(svr) (((svr) >> 16) & 0xffff) - -#define SPR_PID0 0x030 /* ..8 Process ID Register 0 */ -#define SPR_PID1 0x279 /* ..8 Process ID Register 1 */ -#define SPR_PID2 0x27a /* ..8 Process ID Register 2 */ - -#define SPR_TLB0CFG 0x2B0 /* ..8 TLB 0 Config Register */ -#define SPR_TLB1CFG 0x2B1 /* ..8 TLB 1 Config Register */ -#define TLBCFG_ASSOC_MASK 0xff000000 /* Associativity of TLB */ -#define TLBCFG_ASSOC_SHIFT 24 -#define TLBCFG_NENTRY_MASK 0x00000fff /* Number of entries in TLB */ - -#define SPR_IVPR 0x03f /* ..8 Interrupt Vector Prefix Register */ -#define SPR_IVOR0 0x190 /* ..8 Critical input */ -#define SPR_IVOR1 0x191 /* ..8 Machine check */ -#define SPR_IVOR2 0x192 -#define SPR_IVOR3 0x193 -#define SPR_IVOR4 0x194 -#define SPR_IVOR5 0x195 -#define SPR_IVOR6 0x196 -#define SPR_IVOR7 0x197 -#define SPR_IVOR8 0x198 -#define SPR_IVOR9 0x199 -#define SPR_IVOR10 0x19a -#define SPR_IVOR11 0x19b -#define SPR_IVOR12 0x19c -#define SPR_IVOR13 0x19d -#define SPR_IVOR14 0x19e -#define SPR_IVOR15 0x19f -#define SPR_IVOR32 0x210 -#define SPR_IVOR33 0x211 -#define SPR_IVOR34 0x212 -#define SPR_IVOR35 0x213 - -#define SPR_MAS0 0x270 /* ..8 MMU Assist Register 0 Book-E/e500 */ -#define SPR_MAS1 0x271 /* ..8 MMU Assist Register 1 Book-E/e500 */ -#define SPR_MAS2 0x272 /* ..8 MMU Assist Register 2 Book-E/e500 */ -#define SPR_MAS3 0x273 /* ..8 MMU Assist Register 3 Book-E/e500 */ -#define SPR_MAS4 0x274 /* ..8 MMU Assist Register 4 Book-E/e500 */ -#define SPR_MAS5 0x275 /* ..8 MMU Assist Register 5 Book-E */ -#define SPR_MAS6 0x276 /* ..8 MMU Assist Register 6 Book-E/e500 */ -#define SPR_MAS7 0x3B0 /* ..8 MMU Assist Register 7 Book-E/e500 */ -#define SPR_MAS8 0x155 /* ..8 MMU Assist Register 8 Book-E/e500 */ - -#define SPR_L1CFG0 0x203 /* ..8 L1 cache configuration register 0 */ -#define SPR_L1CFG1 0x204 /* ..8 L1 cache configuration register 1 */ - -#define SPR_CCR1 0x378 -#define CCR1_L2COBE 0x00000040 - -#define DCR_L2DCDCRAI 0x0000 /* L2 D-Cache DCR Address Pointer */ -#define DCR_L2DCDCRDI 0x0001 /* L2 D-Cache DCR Data Indirect */ -#define DCR_L2CR0 0x00 /* L2 Cache Configuration Register 0 */ -#define L2CR0_AS 0x30000000 - -#define SPR_L1CSR0 0x3F2 /* ..8 L1 Cache Control and Status Register 0 */ -#define L1CSR0_DCPE 0x00010000 /* Data Cache Parity Enable */ -#define L1CSR0_DCLFR 0x00000100 /* Data Cache Lock Bits Flash Reset */ -#define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */ -#define L1CSR0_DCE 0x00000001 /* Data Cache Enable */ -#define SPR_L1CSR1 0x3F3 /* ..8 L1 Cache Control and Status Register 1 */ -#define L1CSR1_ICPE 0x00010000 /* Instruction Cache Parity Enable */ -#define L1CSR1_ICUL 0x00000400 /* Instr Cache Unable to Lock */ -#define L1CSR1_ICLFR 0x00000100 /* Instruction Cache Lock Bits Flash Reset */ -#define L1CSR1_ICFI 0x00000002 /* Instruction Cache Flash Invalidate */ -#define L1CSR1_ICE 0x00000001 /* Instruction Cache Enable */ - -#define SPR_L2CFG0 0x207 /* ..8 L2 Configuration Register 0 */ -#define SPR_L2CSR0 0x3F9 /* ..8 L2 Cache Control and Status Register 0 */ -#define L2CSR0_L2E 0x80000000 /* L2 Cache Enable */ -#define L2CSR0_L2PE 0x40000000 /* L2 Cache Parity Enable */ -#define L2CSR0_L2FI 0x00200000 /* L2 Cache Flash Invalidate */ -#define L2CSR0_L2LFC 0x00000400 /* L2 Cache Lock Flags Clear */ - -#define SPR_BUCSR 0x3F5 /* ..8 Branch Unit Control and Status Register */ -#define BUCSR_BPEN 0x00000001 /* Branch Prediction Enable */ -#define BUCSR_BBFI 0x00000200 /* Branch Buffer Flash Invalidate */ - -#endif /* BOOKE */ -#endif /* !_POWERPC_SPR_H_ */ diff --git a/sys/powerpc/include/sr.h b/sys/powerpc/include/sr.h deleted file mode 100644 index d5fa2610d4e..00000000000 --- a/sys/powerpc/include/sr.h +++ /dev/null @@ -1,62 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2002 Benno Rice. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE_SR_H_ -#define _MACHINE_SR_H_ - -/* - * Bit definitions for segment registers. - * - * PowerPC Microprocessor Family: The Programming Environments for 32-bit - * Microprocessors, section 2.3.5 - */ - -#define SR_TYPE 0x80000000 /* Type selector */ -#define SR_KS 0x40000000 /* Supervisor-state protection key */ -#define SR_KP 0x20000000 /* User-state protection key */ -#define SR_N 0x10000000 /* No-execute protection */ -#define SR_VSID_MASK 0x00ffffff /* Virtual Segment ID mask */ - -/* Kernel segment register usage */ -#define USER_SR 12 -#define KERNEL_SR 13 -#define KERNEL2_SR 14 -#define KERNEL3_SR 15 -#define KERNEL_VSIDBITS 0xfffffUL -#define KERNEL_SEGMENT (0xfffff0 + KERNEL_SR) -#define KERNEL2_SEGMENT (0xfffff0 + KERNEL2_SR) -#define EMPTY_SEGMENT 0xfffff0 -#ifdef __powerpc64__ -#define USER_ADDR 0xc00ffffff0000000UL -#else -#define USER_ADDR ((uintptr_t)USER_SR << ADDR_SR_SHFT) -#endif -#define SEGMENT_LENGTH 0x10000000UL -#define SEGMENT_INVMASK 0x0fffffffUL -#define SEGMENT_MASK ~SEGMENT_INVMASK - -#endif /* !_MACHINE_SR_H_ */ diff --git a/sys/powerpc/include/stack.h b/sys/powerpc/include/stack.h deleted file mode 100644 index cacca36247e..00000000000 --- a/sys/powerpc/include/stack.h +++ /dev/null @@ -1,34 +0,0 @@ -/*- - * Mach Operating System - * Copyright (c) 1992 Carnegie Mellon University - * All Rights Reserved. - * - * Permission to use, copy, modify and distribute this software and its - * documentation is hereby granted, provided that both the copyright - * notice and this permission notice appear in all copies of the - * software, derivative works or modified versions, and any portions - * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR - * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * - * Carnegie Mellon requests users of this software to return to - * - * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU - * School of Computer Science - * Carnegie Mellon University - * Pittsburgh PA 15213-3890 - * - * any improvements or extensions that they make and grant Carnegie Mellon - * the rights to redistribute these changes. - */ - -#ifndef _MACHINE_STACK_H_ -#define _MACHINE_STACK_H_ - -extern int trapexit[]; -extern int asttrapexit[]; -extern int end[]; - -#endif /* !_MACHINE_STACK_H_ */ diff --git a/sys/powerpc/include/stdarg.h b/sys/powerpc/include/stdarg.h deleted file mode 100644 index aba008ef377..00000000000 --- a/sys/powerpc/include/stdarg.h +++ /dev/null @@ -1,37 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2017 Poul-Henning Kamp. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_STDARG_H_ -#define _MACHINE_STDARG_H_ - -#include - -#ifndef va_start - #error this file needs to be ported to your compiler -#endif - -#endif /* !_MACHINE_STDARG_H_ */ diff --git a/sys/powerpc/include/sysarch.h b/sys/powerpc/include/sysarch.h deleted file mode 100644 index 13f53f9406d..00000000000 --- a/sys/powerpc/include/sysarch.h +++ /dev/null @@ -1,43 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1993 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_SYSARCH_H_ -#define _MACHINE_SYSARCH_H_ - -#ifndef _KERNEL -#include - -__BEGIN_DECLS -int sysarch(int, void *); -__END_DECLS -#endif - -#endif /* !_MACHINE_SYSARCH_H_ */ diff --git a/sys/powerpc/include/tlb.h b/sys/powerpc/include/tlb.h deleted file mode 100644 index 0a4463e0b92..00000000000 --- a/sys/powerpc/include/tlb.h +++ /dev/null @@ -1,181 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (C) 2006-2012 Semihalf. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED - * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE_TLB_H_ -#define _MACHINE_TLB_H_ - -#if defined(BOOKE_E500) - -/* PowerPC E500 MAS registers */ -#define MAS0_TLBSEL(x) ((x << 28) & 0x10000000) -#define MAS0_ESEL(x) ((x << 16) & 0x003F0000) - -#define MAS0_TLBSEL1 0x10000000 -#define MAS0_TLBSEL0 0x00000000 -#define MAS0_ESEL_TLB1MASK 0x000F0000 -#define MAS0_ESEL_TLB0MASK 0x00030000 -#define MAS0_ESEL_SHIFT 16 -#define MAS0_NV_MASK 0x00000003 -#define MAS0_NV_SHIFT 0 - -#define MAS1_VALID 0x80000000 -#define MAS1_IPROT 0x40000000 -#define MAS1_TID_MASK 0x00FF0000 -#define MAS1_TID_SHIFT 16 -#define MAS1_TS_MASK 0x00001000 -#define MAS1_TS_SHIFT 12 -#define MAS1_TSIZE_MASK 0x00000F00 -#define MAS1_TSIZE_SHIFT 8 - -#define TLB_SIZE_4K 1 -#define TLB_SIZE_16K 2 -#define TLB_SIZE_64K 3 -#define TLB_SIZE_256K 4 -#define TLB_SIZE_1M 5 -#define TLB_SIZE_4M 6 -#define TLB_SIZE_16M 7 -#define TLB_SIZE_64M 8 -#define TLB_SIZE_256M 9 -#define TLB_SIZE_1G 10 -#define TLB_SIZE_4G 11 - -#ifdef __powerpc64__ -#define MAS2_EPN_MASK 0xFFFFFFFFFFFFF000UL -#else -#define MAS2_EPN_MASK 0xFFFFF000 -#endif -#define MAS2_EPN_SHIFT 12 -#define MAS2_X0 0x00000040 -#define MAS2_X1 0x00000020 -#define MAS2_W 0x00000010 -#define MAS2_I 0x00000008 -#define MAS2_M 0x00000004 -#define MAS2_G 0x00000002 -#define MAS2_E 0x00000001 -#define MAS2_WIMGE_MASK 0x0000007F - -#define MAS3_RPN 0xFFFFF000 -#define MAS3_RPN_SHIFT 12 -#define MAS3_U0 0x00000200 -#define MAS3_U1 0x00000100 -#define MAS3_U2 0x00000080 -#define MAS3_U3 0x00000040 -#define MAS3_UX 0x00000020 -#define MAS3_SX 0x00000010 -#define MAS3_UW 0x00000008 -#define MAS3_SW 0x00000004 -#define MAS3_UR 0x00000002 -#define MAS3_SR 0x00000001 - -#define MAS4_TLBSELD1 0x10000000 -#define MAS4_TLBSELD0 0x00000000 -#define MAS4_TIDSELD_MASK 0x00030000 -#define MAS4_TIDSELD_SHIFT 16 -#define MAS4_TSIZED_MASK 0x00000F00 -#define MAS4_TSIZED_SHIFT 8 -#define MAS4_X0D 0x00000040 -#define MAS4_X1D 0x00000020 -#define MAS4_WD 0x00000010 -#define MAS4_ID 0x00000008 -#define MAS4_MD 0x00000004 -#define MAS4_GD 0x00000002 -#define MAS4_ED 0x00000001 - -#define MAS6_SPID0_MASK 0x00FF0000 -#define MAS6_SPID0_SHIFT 16 -#define MAS6_SAS 0x00000001 - -#define MAS7_RPN 0x0000000F - -#define MAS1_GETTID(mas1) (((mas1) & MAS1_TID_MASK) >> MAS1_TID_SHIFT) - -#define MAS2_TLB0_ENTRY_IDX_MASK 0x0007f000 -#define MAS2_TLB0_ENTRY_IDX_SHIFT 12 - -/* - * Maximum number of TLB1 entries used for a permanent mapping of kernel - * region (kernel image plus statically allocated data). - */ -#define KERNEL_REGION_MAX_TLB_ENTRIES 4 - -/* - * Use MAS2_X0 to mark entries which will be copied - * to AP CPUs during SMP bootstrap. As result entries - * marked with _TLB_ENTRY_SHARED will be shared by all CPUs. - */ -#define _TLB_ENTRY_SHARED (MAS2_X0) /* XXX under SMP? */ -#define _TLB_ENTRY_IO (MAS2_I | MAS2_G) -#define _TLB_ENTRY_MEM (MAS2_M) - -#define TLB1_MAX_ENTRIES 64 - -#if !defined(LOCORE) -typedef struct tlb_entry { - vm_paddr_t phys; - vm_offset_t virt; - vm_size_t size; - uint32_t mas1; -#ifdef __powerpc64__ - uint64_t mas2; -#else - uint32_t mas2; -#endif - uint32_t mas3; - uint32_t mas7; -} tlb_entry_t; - -void tlb1_inval_entry(unsigned int); -void tlb1_init(void); -#endif /* !LOCORE */ - -#endif /* BOOKE_E500 */ - -#define TID_KERNEL 0 /* TLB TID to use for kernel (shared) translations */ -#define TID_KRESERVED 1 /* Number of TIDs reserved for kernel */ -#define TID_URESERVED 0 /* Number of TIDs reserved for user */ -#define TID_MIN (TID_KRESERVED + TID_URESERVED) -#define TID_MAX 255 -#define TID_NONE -1 - -#define TLB_UNLOCKED 0 - -#if !defined(LOCORE) - -typedef int tlbtid_t; - -struct pmap; - -void tlb_lock(uintptr_t *); -void tlb_unlock(uintptr_t *); -void tlb1_ap_prep(void); -int tlb1_set_entry(vm_offset_t, vm_paddr_t, vm_size_t, uint32_t); - -#endif /* !LOCORE */ - -#endif /* _MACHINE_TLB_H_ */ diff --git a/sys/powerpc/include/tls.h b/sys/powerpc/include/tls.h deleted file mode 100644 index 745a83a910c..00000000000 --- a/sys/powerpc/include/tls.h +++ /dev/null @@ -1,66 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2004 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_TLS_H_ -#define _MACHINE_TLS_H_ - -#include - -#define TLS_DTV_OFFSET 0x8000 -#define TLS_TCB_ALIGN TLS_TCB_SIZE -#define TLS_TP_OFFSET 0x7000 - -static __inline void -_tcb_set(struct tcb *tcb) -{ -#ifdef __powerpc64__ - __asm __volatile("mr 13,%0" :: - "r" ((uint8_t *)tcb + TLS_TP_OFFSET + TLS_TCB_SIZE)); -#else - __asm __volatile("mr 2,%0" :: - "r" ((uint8_t *)tcb + TLS_TP_OFFSET + TLS_TCB_SIZE)); -#endif -} - -static __inline struct tcb * -_tcb_get(void) -{ - struct tcb *tcb; - -#ifdef __powerpc64__ - __asm __volatile("addi %0,13,%1" : "=r" (tcb) : - "i" (-(TLS_TP_OFFSET + TLS_TCB_SIZE))); -#else - __asm __volatile("addi %0,2,%1" : "=r" (tcb) : - "i" (-(TLS_TP_OFFSET + TLS_TCB_SIZE))); -#endif - return (tcb); -} - -#endif /* !_MACHINE_TLS_H_ */ diff --git a/sys/powerpc/include/trap.h b/sys/powerpc/include/trap.h deleted file mode 100644 index c7ee8110212..00000000000 --- a/sys/powerpc/include/trap.h +++ /dev/null @@ -1,160 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: trap.h,v 1.7 2002/02/22 13:51:40 kleink Exp $ - */ - -#ifndef _POWERPC_TRAP_H_ -#define _POWERPC_TRAP_H_ - -#define EXC_RSVD 0x0000 /* Reserved */ -#define EXC_RST 0x0100 /* Reset; all but IBM4xx */ -#define EXC_MCHK 0x0200 /* Machine Check */ -#define EXC_DSI 0x0300 /* Data Storage Interrupt */ -#define EXC_DSE 0x0380 /* Data Segment Interrupt */ -#define EXC_ISI 0x0400 /* Instruction Storage Interrupt */ -#define EXC_ISE 0x0480 /* Instruction Segment Interrupt */ -#define EXC_EXI 0x0500 /* External Interrupt */ -#define EXC_ALI 0x0600 /* Alignment Interrupt */ -#define EXC_PGM 0x0700 /* Program Interrupt */ -#define EXC_FPU 0x0800 /* Floating-point Unavailable */ -#define EXC_DECR 0x0900 /* Decrementer Interrupt */ -#define EXC_SC 0x0c00 /* System Call */ -#define EXC_TRC 0x0d00 /* Trace */ -#define EXC_FPA 0x0e00 /* Floating-point Assist */ - -/* The following is only available on the 601: */ -#define EXC_RUNMODETRC 0x2000 /* Run Mode/Trace Exception */ - -/* The following are only available on 970(G5): */ -#define EXC_VECAST_G5 0x1700 /* AltiVec Assist */ - -/* The following are only available on 7400(G4): */ -#define EXC_VEC 0x0f20 /* AltiVec Unavailable */ -#define EXC_VECAST_G4 0x1600 /* AltiVec Assist */ - -/* The following are only available on 604/750/7400: */ -#define EXC_PERF 0x0f00 /* Performance Monitoring */ -#define EXC_BPT 0x1300 /* Instruction Breakpoint */ -#define EXC_SMI 0x1400 /* System Managment Interrupt */ - -/* The following are only available on 750/7400: */ -#define EXC_THRM 0x1700 /* Thermal Management Interrupt */ - -/* And these are only on the 603: */ -#define EXC_IMISS 0x1000 /* Instruction translation miss */ -#define EXC_DLMISS 0x1100 /* Data load translation miss */ -#define EXC_DSMISS 0x1200 /* Data store translation miss */ - -/* Power ISA 2.06+: */ -#define EXC_HDSI 0x0e00 /* Hypervisor Data Storage */ -#define EXC_HISI 0x0e20 /* Hypervisor Instruction Storage */ -#define EXC_HEA 0x0e40 /* Hypervisor Emulation Assistance */ -#define EXC_HMI 0x0e60 /* Hypervisor Maintenance */ -#define EXC_VSX 0x0f40 /* VSX Unavailable */ - -/* Power ISA 2.07+: */ -#define EXC_FAC 0x0f60 /* Facility Unavailable */ -#define EXC_HFAC 0x0f80 /* Hypervisor Facility Unavailable */ - -/* Power ISA 3.0+: */ -#define EXC_HVI 0x0ea0 /* Hypervisor Virtualization */ - -/* The following are available on 4xx and 85xx */ -#define EXC_CRIT 0x0100 /* Critical Input Interrupt */ -#define EXC_PIT 0x1000 /* Programmable Interval Timer */ -#define EXC_FIT 0x1010 /* Fixed Interval Timer */ -#define EXC_WDOG 0x1020 /* Watchdog Timer */ -#define EXC_DTMISS 0x1100 /* Data TLB Miss */ -#define EXC_ITMISS 0x1200 /* Instruction TLB Miss */ -#define EXC_APU 0x1300 /* Auxiliary Processing Unit */ -#define EXC_DEBUG 0x2f10 /* Debug trap */ -#define EXC_VECAST_E 0x2f20 /* Altivec Assist (Book-E) */ -#define EXC_SPFPD 0x2f30 /* SPE Floating-point Data */ -#define EXC_SPFPR 0x2f40 /* SPE Floating-point Round */ - -/* POWER8 */ -#define EXC_SOFT_PATCH 0x1500 /* POWER8 Soft Patch Exception */ - -#define EXC_LAST 0x2f00 /* Last possible exception vector */ - -#define EXC_AST 0x3000 /* Fake AST vector */ - -/* Trap was in user mode */ -#define EXC_USER 0x10000 - -/* - * EXC_ALI sets bits in the DSISR and DAR to provide enough - * information to recover from the unaligned access without needing to - * parse the offending instruction. This includes certain bits of the - * opcode, and information about what registers are used. The opcode - * indicator values below come from Appendix F of Book III of "The - * PowerPC Architecture". - */ - -#define EXC_ALI_OPCODE_INDICATOR(dsisr) ((dsisr >> 10) & 0x7f) -#define EXC_ALI_LFD 0x09 -#define EXC_ALI_STFD 0x0b - -/* Macros to extract register information */ -#define EXC_ALI_RST(dsisr) ((dsisr >> 5) & 0x1f) /* source or target */ -#define EXC_ALI_RA(dsisr) (dsisr & 0x1f) -#define EXC_ALI_INST_RST(instr) ((instr >> 21) & 0x1f) - -/* - * SRR1 bits for program exception traps. These identify what caused - * the program exception. See section 6.5.9 of the Power ISA Version - * 2.05. - */ - -#define EXC_PGM_FPENABLED (1UL << 20) -#define EXC_PGM_ILLEGAL (1UL << 19) -#define EXC_PGM_PRIV (1UL << 18) -#define EXC_PGM_TRAP (1UL << 17) - -/* DTrace trap opcode. */ -#define EXC_DTRACE 0x7ffff808 - -/* Magic pointer to store TOC base and other info for trap handlers on ppc64 */ -#define TRAP_ENTRY 0x1e8 -#define TRAP_GENTRAP 0x1f0 -#define TRAP_TOCBASE 0x1f8 - -#ifndef LOCORE -struct trapframe; -struct thread; -extern int (*hmi_handler)(struct trapframe *); -void trap(struct trapframe *); -int ppc_instr_emulate(struct trapframe *, struct thread *); -#endif - -#endif /* _POWERPC_TRAP_H_ */ diff --git a/sys/powerpc/include/ucontext.h b/sys/powerpc/include/ucontext.h deleted file mode 100644 index d35c6c773fe..00000000000 --- a/sys/powerpc/include/ucontext.h +++ /dev/null @@ -1,91 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: signal.h,v 1.4 1998/09/14 02:48:34 thorpej Exp $ - */ - -#ifndef _MACHINE_UCONTEXT_H_ -#define _MACHINE_UCONTEXT_H_ - -typedef struct __mcontext { - int mc_vers; - int mc_flags; -#define _MC_FP_VALID 0x01 -#define _MC_AV_VALID 0x02 - int mc_onstack; /* saved onstack flag */ - int mc_len; /* sizeof(__mcontext) */ - __uint64_t mc_avec[32*2]; /* vector register file */ - __uint32_t mc_av[2]; - __register_t mc_frame[42]; - __uint64_t mc_fpreg[33]; - __uint64_t mc_vsxfpreg[32]; /* low-order half of VSR0-31 */ -} mcontext_t __aligned(16); - -#if defined(_KERNEL) && defined(__powerpc64__) -typedef struct __mcontext32 { - int mc_vers; - int mc_flags; -#define _MC_FP_VALID 0x01 -#define _MC_AV_VALID 0x02 - int mc_onstack; /* saved onstack flag */ - int mc_len; /* sizeof(__mcontext) */ - uint64_t mc_avec[32*2]; /* vector register file */ - uint32_t mc_av[2]; - uint32_t mc_frame[42]; - uint64_t mc_fpreg[33]; - uint64_t mc_vsxfpreg[32]; /* low-order half of VSR0-31 */ -} mcontext32_t __aligned(16); -#endif - -/* GPRs and supervisor-level regs */ -#define mc_gpr mc_frame -#define mc_lr mc_frame[32] -#define mc_cr mc_frame[33] -#define mc_xer mc_frame[34] -#define mc_ctr mc_frame[35] -#define mc_srr0 mc_frame[36] -#define mc_srr1 mc_frame[37] -#define mc_exc mc_frame[38] -#define mc_dar mc_frame[39] -#define mc_dsisr mc_frame[40] - -/* floating-point state */ -#define mc_fpscr mc_fpreg[32] - -/* altivec state */ -#define mc_vscr mc_av[0] -#define mc_vrsave mc_av[1] - -#define _MC_VERSION 0x1 -#define _MC_VERSION_KSE 0xee /* partial ucontext for libpthread */ - -#endif /* !_MACHINE_UCONTEXT_H_ */ diff --git a/sys/powerpc/include/vdso.h b/sys/powerpc/include/vdso.h deleted file mode 100644 index afe3e0a314d..00000000000 --- a/sys/powerpc/include/vdso.h +++ /dev/null @@ -1,43 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2012 Konstantin Belousov . - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _POWERPC_VDSO_H -#define _POWERPC_VDSO_H - -#define VDSO_TIMEHANDS_MD \ - uint32_t th_res[8]; - -#define VDSO_TH_ALGO_PPC_TB VDSO_TH_ALGO_1 - -#ifdef _KERNEL -#ifdef COMPAT_FREEBSD32 - -#define VDSO_TIMEHANDS_MD32 VDSO_TIMEHANDS_MD - -#endif -#endif -#endif diff --git a/sys/powerpc/include/vm.h b/sys/powerpc/include/vm.h deleted file mode 100644 index 5c99cda5125..00000000000 --- a/sys/powerpc/include/vm.h +++ /dev/null @@ -1,45 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009 Alan L. Cox - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACHINE_VM_H_ -#define _MACHINE_VM_H_ - -#include - -/* Memory attributes. */ -#define VM_MEMATTR_DEFAULT 0 -#define VM_MEMATTR_UNCACHEABLE 0x01 -#define VM_MEMATTR_CACHEABLE 0x02 -#define VM_MEMATTR_WRITE_COMBINING 0x04 -#define VM_MEMATTR_WRITE_BACK 0x08 -#define VM_MEMATTR_WRITE_THROUGH 0x10 -#define VM_MEMATTR_PREFETCHABLE 0x20 - -#define VM_MEMATTR_DEVICE VM_MEMATTR_DEFAULT - -#endif /* !_MACHINE_VM_H_ */ diff --git a/sys/powerpc/include/vmparam.h b/sys/powerpc/include/vmparam.h deleted file mode 100644 index 5518d3053e5..00000000000 --- a/sys/powerpc/include/vmparam.h +++ /dev/null @@ -1,337 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: vmparam.h,v 1.11 2000/02/11 19:25:16 thorpej Exp $ - */ - -#ifndef _MACHINE_VMPARAM_H_ -#define _MACHINE_VMPARAM_H_ - -#ifndef LOCORE -#include -#endif - -#define USRSTACK SHAREDPAGE - -#ifndef MAXTSIZ -#define MAXTSIZ (1*1024*1024*1024) /* max text size */ -#endif - -#ifndef DFLDSIZ -#define DFLDSIZ (128*1024*1024) /* default data size */ -#endif - -#ifndef MAXDSIZ -#ifdef __powerpc64__ -#define MAXDSIZ (32UL*1024*1024*1024) /* max data size */ -#else -#define MAXDSIZ (1*1024*1024*1024) /* max data size */ -#endif -#endif - -#ifndef DFLSSIZ -#define DFLSSIZ (8*1024*1024) /* default stack size */ -#endif - -#ifndef MAXSSIZ -#ifdef __powerpc64__ -#define MAXSSIZ (512*1024*1024) /* max stack size */ -#else -#define MAXSSIZ (64*1024*1024) /* max stack size */ -#endif -#endif - -#ifdef AIM -#define VM_MAXUSER_ADDRESS32 0xfffff000 -#else -#define VM_MAXUSER_ADDRESS32 0x7ffff000 -#endif - -/* - * Would like to have MAX addresses = 0, but this doesn't (currently) work - */ -#ifdef __powerpc64__ -/* - * Virtual addresses of things. Derived from the page directory and - * page table indexes from pmap.h for precision. - * - * kernel map should be able to start at 0xc008000000000000 - - * but at least the functional simulator doesn't like it - * - * 0x0000000000000000 - 0x000fffffffffffff user map - * 0xc000000000000000 - 0xc007ffffffffffff direct map - * 0xc008000000000000 - 0xc00fffffffffffff kernel map - * - */ -#define VM_MIN_ADDRESS 0x0000000000000000 -#define VM_MAXUSER_ADDRESS 0x000fffffc0000000 -#define VM_MAX_ADDRESS 0xc00fffffffffffff -#define VM_MIN_KERNEL_ADDRESS 0xc008000000000000 -#define VM_MAX_KERNEL_ADDRESS 0xc0080007ffffffff -#define VM_MAX_SAFE_KERNEL_ADDRESS VM_MAX_KERNEL_ADDRESS -#else -#define VM_MIN_ADDRESS 0 -#define VM_MAXUSER_ADDRESS VM_MAXUSER_ADDRESS32 -#define VM_MAX_ADDRESS 0xffffffff -#endif - -#define SHAREDPAGE (VM_MAXUSER_ADDRESS - PAGE_SIZE) - -#define FREEBSD32_SHAREDPAGE (VM_MAXUSER_ADDRESS32 - PAGE_SIZE) -#define FREEBSD32_USRSTACK FREEBSD32_SHAREDPAGE - -#define KERNBASE 0x00100100 /* start of kernel virtual */ - -#ifdef AIM -#ifndef __powerpc64__ -#define VM_MIN_KERNEL_ADDRESS ((vm_offset_t)KERNEL_SR << ADDR_SR_SHFT) -#define VM_MAX_SAFE_KERNEL_ADDRESS (VM_MIN_KERNEL_ADDRESS + 2*SEGMENT_LENGTH -1) -#define VM_MAX_KERNEL_ADDRESS (VM_MIN_KERNEL_ADDRESS + 3*SEGMENT_LENGTH - 1) -#endif - -/* - * Use the direct-mapped BAT registers for UMA small allocs. This - * takes pressure off the small amount of available KVA. - */ -#define UMA_MD_SMALL_ALLOC - -#else /* Book-E */ - -/* Use the direct map for UMA small allocs on powerpc64. */ -#ifdef __powerpc64__ -#define UMA_MD_SMALL_ALLOC -#else -#define VM_MIN_KERNEL_ADDRESS 0xc0000000 -#define VM_MAX_KERNEL_ADDRESS 0xffffefff -#define VM_MAX_SAFE_KERNEL_ADDRESS VM_MAX_KERNEL_ADDRESS -#endif - -#endif /* AIM/E500 */ - -#if !defined(LOCORE) -struct pmap_physseg { - struct pv_entry *pvent; - char *attrs; -}; -#endif - -#ifdef __powerpc64__ -#define VM_PHYSSEG_MAX 63 /* 1? */ -#else -#define VM_PHYSSEG_MAX 16 /* 1? */ -#endif - -#define PHYS_AVAIL_SZ 256 /* Allows up to 16GB Ram on pSeries with - * logical memory block size of 64MB. - * For more Ram increase the lmb or this value. - */ - -/* XXX This is non-sensical. Phys avail should hold contiguous regions. */ -#define PHYS_AVAIL_ENTRIES PHYS_AVAIL_SZ - -/* - * The physical address space is densely populated on 32-bit systems, - * but may not be on 64-bit ones. - */ -#ifdef __powerpc64__ -#define VM_PHYSSEG_SPARSE -#else -#define VM_PHYSSEG_DENSE -#endif - -/* - * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool - * from which physical pages are allocated and VM_FREEPOOL_DIRECT is - * the pool from which physical pages for small UMA objects are - * allocated. - */ -#define VM_NFREEPOOL 2 -#define VM_FREEPOOL_DEFAULT 0 -#define VM_FREEPOOL_DIRECT 1 - -/* - * Create one free page list. - */ -#define VM_NFREELIST 1 -#define VM_FREELIST_DEFAULT 0 - -#ifdef __powerpc64__ -/* The largest allocation size is 16MB. */ -#define VM_NFREEORDER 13 -#else -/* The largest allocation size is 4MB. */ -#define VM_NFREEORDER 11 -#endif - -#ifndef VM_NRESERVLEVEL -#ifdef __powerpc64__ -/* Enable superpage reservations: 1 level. */ -#define VM_NRESERVLEVEL 1 -#else -/* Disable superpage reservations. */ -#define VM_NRESERVLEVEL 0 -#endif -#endif - -#ifndef VM_LEVEL_0_ORDER -/* Level 0 reservations consist of 512 (RPT) or 4096 (HPT) pages. */ -#define VM_LEVEL_0_ORDER vm_level_0_order -#ifndef __ASSEMBLER__ -extern int vm_level_0_order; -#endif -#endif - -#ifndef VM_LEVEL_0_ORDER_MAX -#define VM_LEVEL_0_ORDER_MAX 12 -#endif - -#ifdef __powerpc64__ -#ifdef SMP -#define PA_LOCK_COUNT 256 -#endif -#endif - -#ifndef VM_INITIAL_PAGEIN -#define VM_INITIAL_PAGEIN 16 -#endif - -#ifndef SGROWSIZ -#define SGROWSIZ (128UL*1024) /* amount to grow stack */ -#endif - -/* - * How many physical pages per kmem arena virtual page. - */ -#ifndef VM_KMEM_SIZE_SCALE -#define VM_KMEM_SIZE_SCALE (3) -#endif - -/* - * Optional floor (in bytes) on the size of the kmem arena. - */ -#ifndef VM_KMEM_SIZE_MIN -#define VM_KMEM_SIZE_MIN (12 * 1024 * 1024) -#endif - -/* - * Optional ceiling (in bytes) on the size of the kmem arena: 40% of the - * usable KVA space. - */ -#ifndef VM_KMEM_SIZE_MAX -#define VM_KMEM_SIZE_MAX ((VM_MAX_SAFE_KERNEL_ADDRESS - \ - VM_MIN_KERNEL_ADDRESS + 1) * 2 / 5) -#endif - -#ifdef __powerpc64__ -#define ZERO_REGION_SIZE (2 * 1024 * 1024) /* 2MB */ -#else -#define ZERO_REGION_SIZE (64 * 1024) /* 64KB */ -#endif - -/* - * Use a fairly large batch size since we expect ppc64 systems to have lots of - * memory. - */ -#ifdef __powerpc64__ -#define VM_BATCHQUEUE_SIZE 31 -#endif - -/* - * On 32-bit OEA, the only purpose for which sf_buf is used is to implement - * an opaque pointer required by the machine-independent parts of the kernel. - * That pointer references the vm_page that is "mapped" by the sf_buf. The - * actual mapping is provided by the direct virtual-to-physical mapping. - * - * On OEA64 and Book-E, we need to do something a little more complicated. Use - * the runtime-detected hw_direct_map to pick between the two cases. Our - * friends in vm_machdep.c will do the same to ensure nothing gets confused. - */ -#define SFBUF -#define SFBUF_NOMD - -/* - * We (usually) have a direct map of all physical memory, so provide - * a macro to use to get the kernel VA address for a given PA. Check the - * value of PMAP_HAS_PMAP before using. - */ -#ifndef LOCORE -#ifdef __powerpc64__ -#define DMAP_BASE_ADDRESS 0xc000000000000000UL -#define DMAP_MIN_ADDRESS DMAP_BASE_ADDRESS -#define DMAP_MAX_ADDRESS 0xc007ffffffffffffUL -#else -#define DMAP_BASE_ADDRESS 0x00000000UL -#define DMAP_MAX_ADDRESS 0xbfffffffUL -#endif -#endif - -#if defined(__powerpc64__) || defined(BOOKE) -/* - * powerpc64 and Book-E will provide their own page array allocators. - * - * On AIM, this will allocate a single virtual array, with pages from the - * correct memory domains. - * On Book-E this will let us put the array in TLB1, removing the need for TLB - * thrashing. - * - * VM_MIN_KERNEL_ADDRESS is just a dummy. It will get set by the MMU driver. - */ -#define PA_MIN_ADDRESS VM_MIN_KERNEL_ADDRESS -#define PMAP_HAS_PAGE_ARRAY 1 -#endif - -#if defined(__powerpc64__) -/* - * Need a page dump array for minidump. - */ -#define MINIDUMP_PAGE_TRACKING 1 -#else -/* - * No minidump with 32-bit powerpc. - */ -#define MINIDUMP_PAGE_TRACKING 0 -#endif - -#define PMAP_HAS_DMAP (hw_direct_map) -#define PHYS_TO_DMAP(x) ({ \ - KASSERT(hw_direct_map, ("Direct map not provided by PMAP")); \ - (x) | DMAP_BASE_ADDRESS; }) -#define DMAP_TO_PHYS(x) ({ \ - KASSERT(hw_direct_map, ("Direct map not provided by PMAP")); \ - (x) &~ DMAP_BASE_ADDRESS; }) - -/* - * No non-transparent large page support in the pmap. - */ -#define PMAP_HAS_LARGEPAGES 0 - -#endif /* _MACHINE_VMPARAM_H_ */ diff --git a/sys/powerpc/mambo/mambo.c b/sys/powerpc/mambo/mambo.c deleted file mode 100644 index 5331d1ab452..00000000000 --- a/sys/powerpc/mambo/mambo.c +++ /dev/null @@ -1,98 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2008 by Nathan Whitehorn. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include - -#include - -/* - * Mambo interface - */ -static int mambobus_probe(device_t); -static int mambobus_attach(device_t); - -static device_method_t mambobus_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, mambobus_probe), - DEVMETHOD(device_attach, mambobus_attach), - - /* Bus interface */ - DEVMETHOD(bus_add_child, bus_generic_add_child), - DEVMETHOD(bus_read_ivar, bus_generic_read_ivar), - DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), - DEVMETHOD(bus_release_resource, bus_generic_release_resource), - DEVMETHOD(bus_activate_resource,bus_generic_activate_resource), - - DEVMETHOD_END -}; - -static driver_t mambobus_driver = { - "mambo", - mambobus_methods, - 0 -}; - -static devclass_t mambobus_devclass; - -DRIVER_MODULE(mambo, ofwbus, mambobus_driver, mambobus_devclass, 0, 0); - -static int -mambobus_probe(device_t dev) -{ - const char *name = ofw_bus_get_name(dev); - - if (name && !strcmp(name, "mambo")) { - device_set_desc(dev, "Mambo Simulator"); - return (0); - } - - return (ENXIO); -} - -static int -mambobus_attach(device_t dev) -{ - bus_generic_probe(dev); - return (bus_generic_attach(dev)); -} diff --git a/sys/powerpc/mambo/mambo_console.c b/sys/powerpc/mambo/mambo_console.c deleted file mode 100644 index 5a58ad8ff22..00000000000 --- a/sys/powerpc/mambo/mambo_console.c +++ /dev/null @@ -1,185 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2008 by Nathan Whitehorn. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include "mambocall.h" - -#define MAMBOBURSTLEN 128 /* max number of bytes to write in one chunk */ - -#define MAMBO_CONSOLE_WRITE 0 -#define MAMBO_CONSOLE_READ 60 - -static tsw_outwakeup_t mambotty_outwakeup; - -static struct ttydevsw mambo_ttydevsw = { - .tsw_flags = TF_NOPREFIX, - .tsw_outwakeup = mambotty_outwakeup, -}; - -static int polltime; -static struct callout mambo_callout; -static struct tty *tp = NULL; - -#if defined(KDB) -static int alt_break_state; -#endif - -static void mambo_timeout(void *); - -static cn_probe_t mambo_cnprobe; -static cn_init_t mambo_cninit; -static cn_term_t mambo_cnterm; -static cn_getc_t mambo_cngetc; -static cn_putc_t mambo_cnputc; -static cn_grab_t mambo_cngrab; -static cn_ungrab_t mambo_cnungrab; - -CONSOLE_DRIVER(mambo); - -static void -cn_drvinit(void *unused) -{ - - if (mambo_consdev.cn_pri != CN_DEAD && - mambo_consdev.cn_name[0] != '\0') { - if (OF_finddevice("/mambo") == -1) - return; - - tp = tty_alloc(&mambo_ttydevsw, NULL); - tty_init_console(tp, 0); - tty_makedev(tp, NULL, "%s", "mambocons"); - - polltime = 1; - - callout_init(&mambo_callout, 1); - callout_reset(&mambo_callout, polltime, mambo_timeout, NULL); - } -} - -SYSINIT(cndev, SI_SUB_CONFIGURE, SI_ORDER_MIDDLE, cn_drvinit, NULL); - -static void -mambotty_outwakeup(struct tty *tp) -{ - int len; - u_char buf[MAMBOBURSTLEN]; - - for (;;) { - len = ttydisc_getc(tp, buf, sizeof buf); - if (len == 0) - break; - mambocall(MAMBO_CONSOLE_WRITE, buf, (register_t)len, 1UL); - } -} - -static void -mambo_timeout(void *v) -{ - int c; - - tty_lock(tp); - while ((c = mambo_cngetc(NULL)) != -1) - ttydisc_rint(tp, c, 0); - ttydisc_rint_done(tp); - tty_unlock(tp); - - callout_reset(&mambo_callout, polltime, mambo_timeout, NULL); -} - -static void -mambo_cnprobe(struct consdev *cp) -{ - if (OF_finddevice("/mambo") == -1) { - cp->cn_pri = CN_DEAD; - return; - } - - cp->cn_pri = CN_NORMAL; -} - -static void -mambo_cninit(struct consdev *cp) -{ - - /* XXX: This is the alias, but that should be good enough */ - strcpy(cp->cn_name, "mambocons"); -} - -static void -mambo_cnterm(struct consdev *cp) -{ -} - -static void -mambo_cngrab(struct consdev *cp) -{ -} - -static void -mambo_cnungrab(struct consdev *cp) -{ -} - -static int -mambo_cngetc(struct consdev *cp) -{ - int ch; - - ch = mambocall(MAMBO_CONSOLE_READ); - - if (ch > 0 && ch < 0xff) { -#if defined(KDB) - kdb_alt_break(ch, &alt_break_state); -#endif - return (ch); - } - - return (-1); -} - -static void -mambo_cnputc(struct consdev *cp, int c) -{ - char cbuf; - - cbuf = c; - mambocall(MAMBO_CONSOLE_WRITE, &cbuf, 1UL, 1UL); -} diff --git a/sys/powerpc/mambo/mambo_disk.c b/sys/powerpc/mambo/mambo_disk.c deleted file mode 100644 index 1eb1c59d9d6..00000000000 --- a/sys/powerpc/mambo/mambo_disk.c +++ /dev/null @@ -1,277 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2008 Nathan Whitehorn. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -struct mambodisk_softc { - device_t dev; - struct mtx sc_mtx; - struct disk *disk; - struct proc *p; - struct bio_queue_head bio_queue; - int running; - int maxblocks; -}; - -#define MAMBO_DISK_READ 116 -#define MAMBO_DISK_WRITE 117 -#define MAMBO_DISK_INFO 118 - -#define MAMBO_INFO_STATUS 1 -#define MAMBO_INFO_BLKSZ 2 -#define MAMBO_INFO_DEVSZ 3 - -/* bus entry points */ -static void mambodisk_identify(driver_t *driver, device_t parent); -static int mambodisk_probe(device_t dev); -static int mambodisk_attach(device_t dev); - -/* disk routines */ -static int mambodisk_open(struct disk *dp); -static int mambodisk_close(struct disk *dp); -static void mambodisk_strategy(struct bio *bp); -static void mambodisk_task(void *arg); - -#define MBODISK_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) -#define MBODISK_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) -#define MBODISK_LOCK_INIT(_sc) \ - mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \ - "mambodisk", MTX_DEF) -#define MBODISK_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); -#define MBODISK_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); -#define MBODISK_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); - -static void -mambodisk_identify(driver_t *driver, device_t parent) -{ - int i = 0; - - for (i = 0; mambocall(MAMBO_DISK_INFO,MAMBO_INFO_DEVSZ,i) > 0; i++) - BUS_ADD_CHILD(parent,0,"mambodisk",i); -} - -static int -mambodisk_probe(device_t dev) -{ - device_set_desc(dev, "Mambo Simulated Block Device"); - return (0); -} - -static int -mambodisk_attach(device_t dev) -{ - struct mambodisk_softc *sc; - struct disk *d; - intmax_t mb; - char unit; - - sc = device_get_softc(dev); - sc->dev = dev; - MBODISK_LOCK_INIT(sc); - - d = sc->disk = disk_alloc(); - d->d_open = mambodisk_open; - d->d_close = mambodisk_close; - d->d_strategy = mambodisk_strategy; - d->d_name = "mambodisk"; - d->d_drv1 = sc; - d->d_maxsize = maxphys; /* Maybe ask bridge? */ - - d->d_sectorsize = 512; - sc->maxblocks = mambocall(MAMBO_DISK_INFO,MAMBO_INFO_BLKSZ,d->d_unit) - / 512; - - d->d_unit = device_get_unit(dev); - d->d_mediasize = mambocall(MAMBO_DISK_INFO,MAMBO_INFO_DEVSZ,d->d_unit) - * 1024ULL; /* Mambo gives size in KB */ - - mb = d->d_mediasize >> 20; /* 1MiB == 1 << 20 */ - unit = 'M'; - if (mb >= 10240) { /* 1GiB = 1024 MiB */ - unit = 'G'; - mb /= 1024; - } - device_printf(dev, "%ju%cB, %d byte sectors\n", mb, unit, - d->d_sectorsize); - disk_create(d, DISK_VERSION); - bioq_init(&sc->bio_queue); - - sc->running = 1; - kproc_create(&mambodisk_task, sc, &sc->p, 0, 0, "task: mambo hd"); - - return (0); -} - -static int -mambodisk_detach(device_t dev) -{ - struct mambodisk_softc *sc = device_get_softc(dev); - - /* kill thread */ - MBODISK_LOCK(sc); - sc->running = 0; - wakeup(sc); - MBODISK_UNLOCK(sc); - - /* wait for thread to finish. XXX probably want timeout. -sorbo */ - MBODISK_LOCK(sc); - while (sc->running != -1) - msleep(sc, &sc->sc_mtx, PRIBIO, "detach", 0); - MBODISK_UNLOCK(sc); - - /* kill disk */ - disk_destroy(sc->disk); - /* XXX destroy anything in queue */ - - MBODISK_LOCK_DESTROY(sc); - - return (0); -} - -static int -mambodisk_open(struct disk *dp) -{ - return (0); -} - -static int -mambodisk_close(struct disk *dp) -{ - return (0); -} - -static void -mambodisk_strategy(struct bio *bp) -{ - struct mambodisk_softc *sc; - - sc = (struct mambodisk_softc *)bp->bio_disk->d_drv1; - MBODISK_LOCK(sc); - bioq_disksort(&sc->bio_queue, bp); - wakeup(sc); - MBODISK_UNLOCK(sc); -} - -static void -mambodisk_task(void *arg) -{ - struct mambodisk_softc *sc = (struct mambodisk_softc*)arg; - struct bio *bp; - size_t sz; - int result; - daddr_t block, end; - device_t dev; - u_long unit; - - dev = sc->dev; - unit = device_get_unit(dev); - - while (sc->running) { - MBODISK_LOCK(sc); - do { - bp = bioq_first(&sc->bio_queue); - if (bp == NULL) - msleep(sc, &sc->sc_mtx, PRIBIO, "jobqueue", 0); - } while (bp == NULL && sc->running); - if (bp) - bioq_remove(&sc->bio_queue, bp); - MBODISK_UNLOCK(sc); - if (!sc->running) - break; - sz = sc->disk->d_sectorsize; - end = bp->bio_pblkno + (bp->bio_bcount / sz); - for (block = bp->bio_pblkno; block < end;) { - u_long numblocks; - char *vaddr = bp->bio_data + - (block - bp->bio_pblkno) * sz; - - numblocks = end - block; - if (numblocks > sc->maxblocks) - numblocks = sc->maxblocks; - - if (bp->bio_cmd == BIO_READ) { - result = mambocall(MAMBO_DISK_READ, vaddr, - (u_long)block, (numblocks << 16) | unit); - } else if (bp->bio_cmd == BIO_WRITE) { - result = mambocall(MAMBO_DISK_WRITE, vaddr, - (u_long)block, (numblocks << 16) | unit); - } else { - result = 1; - } - - if (result) - break; - - block += numblocks; - } - if (block < end) { - bp->bio_error = EIO; - bp->bio_resid = (end - block) * sz; - bp->bio_flags |= BIO_ERROR; - } - biodone(bp); - } - - /* tell parent we're done */ - MBODISK_LOCK(sc); - sc->running = -1; - wakeup(sc); - MBODISK_UNLOCK(sc); - - kproc_exit(0); -} - -static device_method_t mambodisk_methods[] = { - DEVMETHOD(device_identify, mambodisk_identify), - DEVMETHOD(device_probe, mambodisk_probe), - DEVMETHOD(device_attach, mambodisk_attach), - DEVMETHOD(device_detach, mambodisk_detach), - {0, 0}, -}; - -static driver_t mambodisk_driver = { - "mambodisk", - mambodisk_methods, - sizeof(struct mambodisk_softc), -}; -static devclass_t mambodisk_devclass; - -DRIVER_MODULE(mambodisk, mambo, mambodisk_driver, mambodisk_devclass, 0, 0); diff --git a/sys/powerpc/mambo/mambocall.S b/sys/powerpc/mambo/mambocall.S deleted file mode 100644 index bafeb6788f2..00000000000 --- a/sys/powerpc/mambo/mambocall.S +++ /dev/null @@ -1,37 +0,0 @@ -/*- - * Copyright 2008 by Nathan Whitehorn. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include - - .text - -ASENTRY(mambocall) - /* - * Use the special Mambo callout opcode and whatever arguments we - * were passed. Then return whatever Mambo returned. - */ - .long 0x000EAEB0 - blr -ASEND(mambocall) diff --git a/sys/powerpc/mambo/mambocall.h b/sys/powerpc/mambo/mambocall.h deleted file mode 100644 index e92f7333195..00000000000 --- a/sys/powerpc/mambo/mambocall.h +++ /dev/null @@ -1,33 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2008 by Nathan Whitehorn. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MAMBO_MAMBOCALL_H_ -#define _MAMBO_MAMBOCALL_H_ - -long mambocall(int op, ...); - -#endif /* _MAMBO_MAMBOCALL_H_ */ diff --git a/sys/powerpc/mikrotik/platform_rb.c b/sys/powerpc/mikrotik/platform_rb.c deleted file mode 100644 index 6e0229bc4cf..00000000000 --- a/sys/powerpc/mikrotik/platform_rb.c +++ /dev/null @@ -1,83 +0,0 @@ -/*- - * Copyright (c) 2015 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include - -#include "platform_if.h" - -static int rb_probe(platform_t); -static int rb_attach(platform_t); - -static platform_method_t rb_methods[] = { - PLATFORMMETHOD(platform_probe, rb_probe), - PLATFORMMETHOD(platform_attach, rb_attach), - PLATFORMMETHOD_END -}; - -DEFINE_CLASS_1(rb, rb_platform, rb_methods, 0, mpc85xx_platform); - -PLATFORM_DEF(rb_platform); - -static int -rb_probe(platform_t plat) -{ - phandle_t rootnode; - char model[32]; - - rootnode = OF_finddevice("/"); - - if (OF_getprop(rootnode, "model", model, sizeof(model)) > 0) { - if (strcmp(model, "RB800") == 0) - return (BUS_PROBE_SPECIFIC); - } - - return (ENXIO); -} - -static int -rb_attach(platform_t plat) -{ - int error; - - error = mpc85xx_attach(plat); - if (error) - return (error); - - return (0); -} diff --git a/sys/powerpc/mikrotik/rb_led.c b/sys/powerpc/mikrotik/rb_led.c deleted file mode 100644 index 6d3d44c47fb..00000000000 --- a/sys/powerpc/mikrotik/rb_led.c +++ /dev/null @@ -1,147 +0,0 @@ -/*- - * Copyright (c) 2017 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "gpio_if.h" - -struct rbled_softc { - struct cdev *sc_led; - device_t sc_gpio; - uint32_t sc_ledpin; -}; - -static int rbled_probe(device_t); -static int rbled_attach(device_t); -static int rbled_detach(device_t); -static void rbled_toggle(void *, int); - -static device_method_t rbled_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, rbled_probe), - DEVMETHOD(device_attach, rbled_attach), - DEVMETHOD(device_detach, rbled_detach), - - DEVMETHOD_END -}; - -static driver_t rbled_driver = { - "rbled", - rbled_methods, - sizeof(struct rbled_softc), -}; - -static devclass_t rbled_devclass; - -DRIVER_MODULE(rbled, simplebus, rbled_driver, rbled_devclass, 0, 0); - -static int -rbled_probe(device_t dev) -{ - phandle_t node; - const char *name; - cell_t gp[2]; - char model[6]; - - node = ofw_bus_get_node(dev); - - name = ofw_bus_get_name(dev); - if (name == NULL) - return (ENXIO); - if (strcmp(name, "led") != 0) - return (ENXIO); - - if (OF_getprop(node, "user_led", gp, sizeof(gp)) <= 0) - return (ENXIO); - - /* Check root model. */ - node = OF_peer(0); - if (OF_getprop(node, "model", model, sizeof(model)) <= 0) - return (ENXIO); - if (strcmp(model, "RB800") != 0) - return (ENXIO); - - device_set_desc(dev, "RouterBoard LED"); - return (0); -} - -static int -rbled_attach(device_t dev) -{ - struct rbled_softc *sc; - phandle_t node; - cell_t gp[2]; - - sc = device_get_softc(dev); - node = ofw_bus_get_node(dev); - - if (OF_getprop(node, "user_led", gp, sizeof(gp)) <= 0) - return (ENXIO); - - sc->sc_gpio = OF_device_from_xref(gp[0]); - if (sc->sc_gpio == NULL) { - device_printf(dev, "No GPIO resource found!\n"); - return (ENXIO); - } - sc->sc_ledpin = gp[1]; - - sc->sc_led = led_create(rbled_toggle, sc, "user_led"); - - if (sc->sc_led == NULL) - return (ENXIO); - - return (0); -} - -static int -rbled_detach(device_t dev) -{ - struct rbled_softc *sc; - - sc = device_get_softc(dev); - led_destroy(sc->sc_led); - - return (0); -} - -static void -rbled_toggle(void *priv, int onoff) -{ - struct rbled_softc *sc = priv; - - GPIO_PIN_SET(sc->sc_gpio, sc->sc_ledpin, onoff); -} diff --git a/sys/powerpc/mpc85xx/atpic.c b/sys/powerpc/mpc85xx/atpic.c deleted file mode 100644 index ef17b6b33c4..00000000000 --- a/sys/powerpc/mpc85xx/atpic.c +++ /dev/null @@ -1,363 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009 Marcel Moolenaar - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include - -#include -#include - -#include "pic_if.h" - -#define ATPIC_MASTER 0 -#define ATPIC_SLAVE 1 - -struct atpic_softc { - device_t sc_dev; - - /* I/O port resources for master & slave. */ - struct resource *sc_res[2]; - int sc_rid[2]; - - /* Our "routing" interrupt */ - struct resource *sc_ires; - void *sc_icookie; - int sc_irid; - - int sc_vector[16]; - uint8_t sc_mask[2]; -}; - -static int atpic_isa_attach(device_t); -static void atpic_isa_identify(driver_t *, device_t); -static int atpic_isa_probe(device_t); - -static void atpic_config(device_t, u_int, enum intr_trigger, - enum intr_polarity); -static void atpic_dispatch(device_t, struct trapframe *); -static void atpic_enable(device_t, u_int, u_int); -static void atpic_eoi(device_t, u_int); -static void atpic_ipi(device_t, u_int); -static void atpic_mask(device_t, u_int); -static void atpic_unmask(device_t, u_int); - -static void atpic_ofw_translate_code(device_t, u_int irq, int code, - enum intr_trigger *trig, enum intr_polarity *pol); - -static device_method_t atpic_isa_methods[] = { - /* Device interface */ - DEVMETHOD(device_identify, atpic_isa_identify), - DEVMETHOD(device_probe, atpic_isa_probe), - DEVMETHOD(device_attach, atpic_isa_attach), - - /* PIC interface */ - DEVMETHOD(pic_config, atpic_config), - DEVMETHOD(pic_dispatch, atpic_dispatch), - DEVMETHOD(pic_enable, atpic_enable), - DEVMETHOD(pic_eoi, atpic_eoi), - DEVMETHOD(pic_ipi, atpic_ipi), - DEVMETHOD(pic_mask, atpic_mask), - DEVMETHOD(pic_unmask, atpic_unmask), - - DEVMETHOD(pic_translate_code, atpic_ofw_translate_code), - - { 0, 0 }, -}; - -static driver_t atpic_isa_driver = { - "atpic", - atpic_isa_methods, - sizeof(struct atpic_softc) -}; - -static devclass_t atpic_devclass; - -static struct isa_pnp_id atpic_ids[] = { - { 0x0000d041 /* PNP0000 */, "AT interrupt controller" }, - { 0 } -}; - -DRIVER_MODULE(atpic, isa, atpic_isa_driver, atpic_devclass, 0, 0); -ISA_PNP_INFO(atpic_ids); - -static __inline uint8_t -atpic_read(struct atpic_softc *sc, int icu, int ofs) -{ - uint8_t val; - - val = bus_read_1(sc->sc_res[icu], ofs); - return (val); -} - -static __inline void -atpic_write(struct atpic_softc *sc, int icu, int ofs, uint8_t val) -{ - - bus_write_1(sc->sc_res[icu], ofs, val); - bus_barrier(sc->sc_res[icu], ofs, 2 - ofs, - BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE); -} - -static void -atpic_intr(void *arg) -{ - - atpic_dispatch(arg, NULL); -} - -static void -atpic_isa_identify(driver_t *drv, device_t parent) -{ - device_t child; - - child = BUS_ADD_CHILD(parent, ISA_ORDER_SENSITIVE, drv->name, -1); - device_set_driver(child, drv); - isa_set_logicalid(child, atpic_ids[0].ip_id); - isa_set_vendorid(child, atpic_ids[0].ip_id); - - bus_set_resource(child, SYS_RES_IOPORT, ATPIC_MASTER, IO_ICU1, 2); - bus_set_resource(child, SYS_RES_IOPORT, ATPIC_SLAVE, IO_ICU2, 2); - - /* ISA interrupts are routed through external interrupt 0. */ - bus_set_resource(child, SYS_RES_IRQ, 0, 16, 1); -} - -static int -atpic_isa_probe(device_t dev) -{ - int res; - - res = ISA_PNP_PROBE(device_get_parent(dev), dev, atpic_ids); - if (res > 0) - return (res); - - device_set_desc(dev, "PC/AT compatible PIC"); - return (res); -} - -static void -atpic_init(struct atpic_softc *sc, int icu) -{ - - sc->sc_mask[icu] = 0xff - ((icu == ATPIC_MASTER) ? 4 : 0); - - atpic_write(sc, icu, 0, ICW1_RESET | ICW1_IC4); - atpic_write(sc, icu, 1, (icu == ATPIC_SLAVE) ? 8 : 0); - atpic_write(sc, icu, 1, (icu == ATPIC_SLAVE) ? 2 : 4); - atpic_write(sc, icu, 1, ICW4_8086); - atpic_write(sc, icu, 1, sc->sc_mask[icu]); - atpic_write(sc, icu, 0, OCW3_SEL | OCW3_RR); -} - -static int -atpic_isa_attach(device_t dev) -{ - struct atpic_softc *sc; - int error; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - - error = ENXIO; - - sc->sc_rid[ATPIC_MASTER] = 0; - sc->sc_res[ATPIC_MASTER] = bus_alloc_resource_any(dev, SYS_RES_IOPORT, - &sc->sc_rid[ATPIC_MASTER], RF_ACTIVE); - if (sc->sc_res[ATPIC_MASTER] == NULL) - goto fail; - - sc->sc_rid[ATPIC_SLAVE] = 1; - sc->sc_res[ATPIC_SLAVE] = bus_alloc_resource_any(dev, SYS_RES_IOPORT, - &sc->sc_rid[ATPIC_SLAVE], RF_ACTIVE); - if (sc->sc_res[ATPIC_SLAVE] == NULL) - goto fail; - - sc->sc_irid = 0; - sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid, - RF_ACTIVE); - if (sc->sc_ires == NULL) - goto fail; - - error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_MISC | INTR_MPSAFE, - NULL, atpic_intr, dev, &sc->sc_icookie); - if (error) - goto fail; - - atpic_init(sc, ATPIC_SLAVE); - atpic_init(sc, ATPIC_MASTER); - - powerpc_register_pic(dev, 0, 16, 0, TRUE); - return (0); - - fail: - if (sc->sc_ires != NULL) - bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, - sc->sc_ires); - if (sc->sc_res[ATPIC_SLAVE] != NULL) - bus_release_resource(dev, SYS_RES_IOPORT, - sc->sc_rid[ATPIC_SLAVE], sc->sc_res[ATPIC_SLAVE]); - if (sc->sc_res[ATPIC_MASTER] != NULL) - bus_release_resource(dev, SYS_RES_IOPORT, - sc->sc_rid[ATPIC_MASTER], sc->sc_res[ATPIC_MASTER]); - return (error); -} - -/* - * PIC interface. - */ - -static void -atpic_config(device_t dev, u_int irq, enum intr_trigger trig, - enum intr_polarity pol) -{ -} - -static void -atpic_dispatch(device_t dev, struct trapframe *tf) -{ - struct atpic_softc *sc; - uint8_t irq; - - sc = device_get_softc(dev); - atpic_write(sc, ATPIC_MASTER, 0, OCW3_SEL | OCW3_P); - irq = atpic_read(sc, ATPIC_MASTER, 0); - atpic_write(sc, ATPIC_MASTER, 0, OCW3_SEL | OCW3_RR); - if ((irq & 0x80) == 0) - return; - - if (irq == 0x82) { - atpic_write(sc, ATPIC_SLAVE, 0, OCW3_SEL | OCW3_P); - irq = atpic_read(sc, ATPIC_SLAVE, 0) + 8; - atpic_write(sc, ATPIC_SLAVE, 0, OCW3_SEL | OCW3_RR); - if ((irq & 0x80) == 0) - return; - } - - powerpc_dispatch_intr(sc->sc_vector[irq & 0x0f], tf); -} - -static void -atpic_enable(device_t dev, u_int irq, u_int vector) -{ - struct atpic_softc *sc; - - sc = device_get_softc(dev); - sc->sc_vector[irq] = vector; - atpic_unmask(dev, irq); -} - -static void -atpic_eoi(device_t dev, u_int irq) -{ - struct atpic_softc *sc; - - sc = device_get_softc(dev); - if (irq > 7) - atpic_write(sc, ATPIC_SLAVE, 0, OCW2_EOI); - atpic_write(sc, ATPIC_MASTER, 0, OCW2_EOI); -} - -static void -atpic_ipi(device_t dev, u_int cpu) -{ - /* No SMP support. */ -} - -static void -atpic_mask(device_t dev, u_int irq) -{ - struct atpic_softc *sc; - - sc = device_get_softc(dev); - if (irq > 7) { - sc->sc_mask[ATPIC_SLAVE] |= 1 << (irq - 8); - atpic_write(sc, ATPIC_SLAVE, 1, sc->sc_mask[ATPIC_SLAVE]); - } else { - sc->sc_mask[ATPIC_MASTER] |= 1 << irq; - atpic_write(sc, ATPIC_MASTER, 1, sc->sc_mask[ATPIC_MASTER]); - } -} - -static void -atpic_unmask(device_t dev, u_int irq) -{ - struct atpic_softc *sc; - - sc = device_get_softc(dev); - if (irq > 7) { - sc->sc_mask[ATPIC_SLAVE] &= ~(1 << (irq - 8)); - atpic_write(sc, ATPIC_SLAVE, 1, sc->sc_mask[ATPIC_SLAVE]); - } else { - sc->sc_mask[ATPIC_MASTER] &= ~(1 << irq); - atpic_write(sc, ATPIC_MASTER, 1, sc->sc_mask[ATPIC_MASTER]); - } -} - -static void -atpic_ofw_translate_code(device_t dev, u_int irq, int code, - enum intr_trigger *trig, enum intr_polarity *pol) -{ - switch (code) { - case 0: - /* Active L level */ - *trig = INTR_TRIGGER_LEVEL; - *pol = INTR_POLARITY_LOW; - break; - case 1: - /* Active H level */ - *trig = INTR_TRIGGER_LEVEL; - *pol = INTR_POLARITY_HIGH; - break; - case 2: - /* H to L edge */ - *trig = INTR_TRIGGER_EDGE; - *pol = INTR_POLARITY_LOW; - break; - case 3: - /* L to H edge */ - *trig = INTR_TRIGGER_EDGE; - *pol = INTR_POLARITY_HIGH; - break; - default: - *trig = INTR_TRIGGER_CONFORM; - *pol = INTR_POLARITY_CONFORM; - } -} diff --git a/sys/powerpc/mpc85xx/ds1553_bus_fdt.c b/sys/powerpc/mpc85xx/ds1553_bus_fdt.c deleted file mode 100644 index 930698a4500..00000000000 --- a/sys/powerpc/mpc85xx/ds1553_bus_fdt.c +++ /dev/null @@ -1,126 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2006-2008 Semihalf, Grzegorz Bernacki - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * From: FreeBSD: src/sys/powerpc/mpc85xx/ds1553_bus_lbc.c,v 1.2 2009/06/24 15:48:20 raj - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include "ds1553_reg.h" -#include "clock_if.h" - -static devclass_t rtc_devclass; - -static int rtc_attach(device_t dev); -static int rtc_probe(device_t dev); - -static device_method_t rtc_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, rtc_probe), - DEVMETHOD(device_attach, rtc_attach), - - /* clock interface */ - DEVMETHOD(clock_gettime, ds1553_gettime), - DEVMETHOD(clock_settime, ds1553_settime), - { 0, 0 } -}; - -static driver_t rtc_driver = { - "rtc", - rtc_methods, - sizeof(struct ds1553_softc), -}; - -DRIVER_MODULE(rtc, lbc, rtc_driver, rtc_devclass, 0, 0); - -static int -rtc_probe(device_t dev) -{ - - if (!ofw_bus_is_compatible(dev, "dallas,ds1553")) - return (ENXIO); - - device_set_desc(dev, "Dallas Semiconductor DS1553 RTC"); - return (BUS_PROBE_DEFAULT); -} - -static int -rtc_attach(device_t dev) -{ - struct timespec ts; - struct ds1553_softc *sc; - int error; - - sc = device_get_softc(dev); - bzero(sc, sizeof(struct ds1553_softc)); - - mtx_init(&sc->sc_mtx, "rtc_mtx", NULL, MTX_SPIN); - - sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid, - RF_ACTIVE); - if (sc->res == NULL) { - device_printf(dev, "cannot allocate resources\n"); - mtx_destroy(&sc->sc_mtx); - return (ENXIO); - } - - sc->sc_bst = rman_get_bustag(sc->res); - sc->sc_bsh = rman_get_bushandle(sc->res); - - if ((error = ds1553_attach(dev)) != 0) { - device_printf(dev, "cannot attach time of day clock\n"); - bus_release_resource(dev, SYS_RES_MEMORY, sc->rid, sc->res); - mtx_destroy(&sc->sc_mtx); - return (error); - } - - clock_register(dev, 1000000); - - if (bootverbose) { - ds1553_gettime(dev, &ts); - device_printf(dev, "current time: %ld.%09ld\n", - (long)ts.tv_sec, ts.tv_nsec); - } - - return (0); -} diff --git a/sys/powerpc/mpc85xx/ds1553_core.c b/sys/powerpc/mpc85xx/ds1553_core.c deleted file mode 100644 index c0e4ae3907e..00000000000 --- a/sys/powerpc/mpc85xx/ds1553_core.c +++ /dev/null @@ -1,194 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2006-2008 Semihalf, Grzegorz Bernacki - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -static uint8_t ds1553_direct_read(device_t, bus_size_t); -static void ds1553_direct_write(device_t, bus_size_t, uint8_t); - -int -ds1553_attach(device_t dev) -{ - struct ds1553_softc *sc; - uint8_t sec, flags; - - sc = device_get_softc(dev); - - if (mtx_initialized(&sc->sc_mtx) == 0) { - device_printf(dev, "%s: mutex not initialized\n", __func__); - return (ENXIO); - } - - if (sc->sc_read == NULL) - sc->sc_read = ds1553_direct_read; - if (sc->sc_write == NULL) - sc->sc_write = ds1553_direct_write; - - sc->year_offset = POSIX_BASE_YEAR; - - mtx_lock_spin(&sc->sc_mtx); - - /* Turn RTC on if it was not on */ - sec = (*sc->sc_read)(dev, DS1553_OFF_SECONDS); - if (sec & DS1553_BIT_OSC) { - sec &= ~(DS1553_BIT_OSC); - (*sc->sc_write)(dev, DS1553_OFF_SECONDS, sec); - } - - /* Low-battery check */ - flags = (*sc->sc_read)(dev, DS1553_OFF_FLAGS); - if (flags & DS1553_BIT_BLF) - device_printf(dev, "voltage-low detected.\n"); - - mtx_unlock_spin(&sc->sc_mtx); - - return (0); -} - -/* - * Get time of day and convert it to a struct timespec. - * Return 0 on success, an error number otherwise. - */ -int -ds1553_gettime(device_t dev, struct timespec *ts) -{ - struct clocktime ct; - struct ds1553_softc *sc; - uint8_t control; - - sc = device_get_softc(dev); - - mtx_lock_spin(&sc->sc_mtx); - - control = (*sc->sc_read)(dev, DS1553_OFF_CONTROL) | DS1553_BIT_READ; - (*sc->sc_write)(dev, DS1553_OFF_CONTROL, control); - - ct.nsec = 0; - ct.sec = FROMBCD((*sc->sc_read)(dev, DS1553_OFF_SECONDS) & - DS1553_MASK_SECONDS); - ct.min = FROMBCD((*sc->sc_read)(dev, DS1553_OFF_MINUTES) & - DS1553_MASK_MINUTES); - ct.hour = FROMBCD((*sc->sc_read)(dev, DS1553_OFF_HOURS) & - DS1553_MASK_HOUR); - ct.dow = FROMBCD((*sc->sc_read)(dev, DS1553_OFF_DAYOFWEEK) & - DS1553_MASK_DAYOFWEEK) - 1; - ct.day = FROMBCD((*sc->sc_read)(dev, DS1553_OFF_DATE) & - DS1553_MASK_DATE); - ct.mon = FROMBCD((*sc->sc_read)(dev, DS1553_OFF_MONTH) & - DS1553_MASK_MONTH); - ct.year = FROMBCD((*sc->sc_read)(dev, DS1553_OFF_YEAR)); - - control &= ~DS1553_BIT_READ; - (*sc->sc_write)(dev, DS1553_OFF_CONTROL, control); - - ct.year += sc->year_offset; - - mtx_unlock_spin(&sc->sc_mtx); - - return (clock_ct_to_ts(&ct, ts)); -} - -/* - * Set the time of day clock based on the value of the struct timespec arg. - * Return 0 on success, an error number otherwise. - */ -int -ds1553_settime(device_t dev, struct timespec *ts) -{ - struct clocktime ct; - struct ds1553_softc *sc; - uint8_t control; - - sc = device_get_softc(dev); - bzero(&ct, sizeof(struct clocktime)); - - /* Accuracy is only one second. */ - if (ts->tv_nsec >= 500000000) - ts->tv_sec++; - ts->tv_nsec = 0; - clock_ts_to_ct(ts, &ct); - - ct.year -= sc->year_offset; - - mtx_lock_spin(&sc->sc_mtx); - - /* Halt updates to external registers */ - control = (*sc->sc_read)(dev, DS1553_OFF_CONTROL) | DS1553_BIT_WRITE; - (*sc->sc_write)(dev, DS1553_OFF_CONTROL, control); - - (*sc->sc_write)(dev, DS1553_OFF_SECONDS, TOBCD(ct.sec) & - DS1553_MASK_SECONDS); - (*sc->sc_write)(dev, DS1553_OFF_MINUTES, TOBCD(ct.min) & - DS1553_MASK_MINUTES); - (*sc->sc_write)(dev, DS1553_OFF_HOURS, TOBCD(ct.hour) & - DS1553_MASK_HOUR); - (*sc->sc_write)(dev, DS1553_OFF_DAYOFWEEK, TOBCD(ct.dow + 1) & - DS1553_MASK_DAYOFWEEK); - (*sc->sc_write)(dev, DS1553_OFF_DATE, TOBCD(ct.day) & - DS1553_MASK_DATE); - (*sc->sc_write)(dev, DS1553_OFF_MONTH, TOBCD(ct.mon) & - DS1553_MASK_MONTH); - (*sc->sc_write)(dev, DS1553_OFF_YEAR, TOBCD(ct.year)); - - /* Resume updates to external registers */ - control &= ~DS1553_BIT_WRITE; - (*sc->sc_write)(dev, DS1553_OFF_CONTROL, control); - - mtx_unlock_spin(&sc->sc_mtx); - - return (0); -} - -static uint8_t -ds1553_direct_read(device_t dev, bus_size_t off) -{ - struct ds1553_softc *sc; - - sc = device_get_softc(dev); - return (bus_space_read_1(sc->sc_bst, sc->sc_bsh, off)); -} - -static void -ds1553_direct_write(device_t dev, bus_size_t off, uint8_t val) -{ - struct ds1553_softc *sc; - - sc = device_get_softc(dev); - bus_space_write_1(sc->sc_bst, sc->sc_bsh, off, val); -} diff --git a/sys/powerpc/mpc85xx/ds1553_reg.h b/sys/powerpc/mpc85xx/ds1553_reg.h deleted file mode 100644 index 63ef2de4e3d..00000000000 --- a/sys/powerpc/mpc85xx/ds1553_reg.h +++ /dev/null @@ -1,106 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2006-2008 Semihalf, Grzegorz Bernacki - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _DEV_RTC_DS1553_H_ -#define _DEV_RTC_DS1553_H_ - -/* DS1553 registers */ -#define DS1553_NVRAM_SIZE 0x1ff0 -#define DS1553_OFF_FLAGS 0x1ff0 -#define DS1553_OFF_ALARM_SECONDS 0x1ff2 -#define DS1553_OFF_ALARM_MINUTES 0x1ff3 -#define DS1553_OFF_ALARM_HOURS 0x1ff4 -#define DS1553_OFF_ALARM_DATE 0x1ff5 -#define DS1553_OFF_INTERRUPTS 0x1ff6 -#define DS1553_OFF_WATCHDOG 0x1ff7 -#define DS1553_OFF_CONTROL 0x1ff8 -#define DS1553_OFF_SECONDS 0x1ff9 -#define DS1553_OFF_MINUTES 0x1ffa -#define DS1553_OFF_HOURS 0x1ffb -#define DS1553_OFF_DAYOFWEEK 0x1ffc -#define DS1553_OFF_DATE 0x1ffd -#define DS1553_OFF_MONTH 0x1ffe -#define DS1553_OFF_YEAR 0x1fff - -/* dayofweek register's bits */ -#define DS1553_BIT_FREQ_TEST 0x40 /* frequency test bit */ - -/* seconds register's bit */ -#define DS1553_BIT_OSC 0x80 /* oscillator start/stop bit */ - -/* control register's bits */ -#define DS1553_BIT_WRITE 0x80 /* write */ -#define DS1553_BIT_READ 0x40 /* read */ - -/* watchdog register's bits */ -#define DS1553_BIT_WATCHDOG 0x80 /* watchdog steering bit */ -#define DS1553_BIT_BMB4 0x40 /* watchdog multiplier bit4 */ -#define DS1553_BIT_BMB3 0x20 /* watchdog multiplier bit3 */ -#define DS1553_BIT_BMB2 0x10 /* watchdog multiplier bit2 */ -#define DS1553_BIT_BMB1 0x8 /* watchdog multiplier bit1 */ -#define DS1553_BIT_BMB0 0x4 /* watchdog multiplier bit0 */ -#define DS1553_BIT_RB1 0x2 /* watchdog resolution bit1 */ -#define DS1553_BIT_RB0 0x1 /* watchdog resolution bit0 */ - -/* alarm seconds/minutes/hours/date register's bit */ -#define DS1553_BIT_AM 0x80 /* alarm mask bit */ - -/* flag register's bits */ -#define DS1553_BIT_BLF 0x10 /* battery flag */ -#define DS1553_BIT_WF 0x80 /* watchdog flag */ - -/* register's mask */ -#define DS1553_MASK_MONTH 0x1f -#define DS1553_MASK_DATE 0x3f -#define DS1553_MASK_DAYOFWEEK 0x7 -#define DS1553_MASK_HOUR 0x3f -#define DS1553_MASK_MINUTES 0x7f -#define DS1553_MASK_SECONDS 0x7f - -struct ds1553_softc { - bus_space_tag_t sc_bst; /* bus space tag */ - bus_space_handle_t sc_bsh; /* bus space handle */ - - int rid; /* resource id */ - struct resource *res; - struct mtx sc_mtx; /* hardware mutex */ - - uint32_t year_offset; - /* read/write functions */ - uint8_t (*sc_read)(device_t, bus_size_t); - void (*sc_write)(device_t, bus_size_t, uint8_t); -}; - -/* device interface */ -int ds1553_attach(device_t); - -/* clock interface */ -int ds1553_gettime(device_t, struct timespec *); -int ds1553_settime(device_t, struct timespec *); - -#endif /* _DEV_RTC_DS1553_H_ */ diff --git a/sys/powerpc/mpc85xx/fsl_diu.c b/sys/powerpc/mpc85xx/fsl_diu.c deleted file mode 100644 index 81a7102409b..00000000000 --- a/sys/powerpc/mpc85xx/fsl_diu.c +++ /dev/null @@ -1,467 +0,0 @@ -/*- - * Copyright (c) 2016 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include - -#include -#include - -#include "fb_if.h" - -#define DIU_DESC_1 0x000 /* Plane1 Area Descriptor Pointer Register */ -#define DIU_DESC_2 0x004 /* Plane2 Area Descriptor Pointer Register */ -#define DIU_DESC_3 0x008 /* Plane3 Area Descriptor Pointer Register */ -#define DIU_GAMMA 0x00C /* Gamma Register */ -#define DIU_PALETTE 0x010 /* Palette Register */ -#define DIU_CURSOR 0x014 /* Cursor Register */ -#define DIU_CURS_POS 0x018 /* Cursor Position Register */ -#define CURSOR_Y_SHIFT 16 -#define CURSOR_X_SHIFT 0 -#define DIU_DIU_MODE 0x01C /* DIU4 Mode */ -#define DIU_MODE_M 0x7 -#define DIU_MODE_S 0 -#define DIU_MODE_NORMAL 0x1 -#define DIU_MODE_2 0x2 -#define DIU_MODE_3 0x3 -#define DIU_MODE_COLBAR 0x4 -#define DIU_BGND 0x020 /* Background */ -#define DIU_BGND_WB 0x024 /* Background Color in write back Mode Register */ -#define DIU_DISP_SIZE 0x028 /* Display Size */ -#define DELTA_Y_S 16 -#define DELTA_X_S 0 -#define DIU_WB_SIZE 0x02C /* Write back Plane Size Register */ -#define DELTA_Y_WB_S 16 -#define DELTA_X_WB_S 0 -#define DIU_WB_MEM_ADDR 0x030 /* Address to Store the write back Plane Register */ -#define DIU_HSYN_PARA 0x034 /* Horizontal Sync Parameter */ -#define BP_H_SHIFT 22 -#define PW_H_SHIFT 11 -#define FP_H_SHIFT 0 -#define DIU_VSYN_PARA 0x038 /* Vertical Sync Parameter */ -#define BP_V_SHIFT 22 -#define PW_V_SHIFT 11 -#define FP_V_SHIFT 0 -#define DIU_SYNPOL 0x03C /* Synchronize Polarity */ -#define BP_VS (1 << 4) -#define BP_HS (1 << 3) -#define INV_CS (1 << 2) -#define INV_VS (1 << 1) -#define INV_HS (1 << 0) -#define INV_PDI_VS (1 << 8) /* Polarity of PDI input VSYNC. */ -#define INV_PDI_HS (1 << 9) /* Polarity of PDI input HSYNC. */ -#define INV_PDI_DE (1 << 10) /* Polarity of PDI input DE. */ -#define DIU_THRESHOLD 0x040 /* Threshold */ -#define LS_BF_VS_SHIFT 16 -#define OUT_BUF_LOW_SHIFT 0 -#define DIU_INT_STATUS 0x044 /* Interrupt Status */ -#define DIU_INT_MASK 0x048 /* Interrupt Mask */ -#define DIU_COLBAR_1 0x04C /* COLBAR_1 */ -#define DIU_COLORBARn_R(x) ((x & 0xff) << 16) -#define DIU_COLORBARn_G(x) ((x & 0xff) << 8) -#define DIU_COLORBARn_B(x) ((x & 0xff) << 0) -#define DIU_COLBAR_2 0x050 /* COLBAR_2 */ -#define DIU_COLBAR_3 0x054 /* COLBAR_3 */ -#define DIU_COLBAR_4 0x058 /* COLBAR_4 */ -#define DIU_COLBAR_5 0x05c /* COLBAR_5 */ -#define DIU_COLBAR_6 0x060 /* COLBAR_6 */ -#define DIU_COLBAR_7 0x064 /* COLBAR_7 */ -#define DIU_COLBAR_8 0x068 /* COLBAR_8 */ -#define DIU_FILLING 0x06C /* Filling Register */ -#define DIU_PLUT 0x070 /* Priority Look Up Table Register */ - -/* Control Descriptor */ -#define DIU_CTRLDESCL(n, m) 0x200 + (0x40 * n) + 0x4 * (m - 1) -#define DIU_CTRLDESCLn_1(n) DIU_CTRLDESCL(n, 1) -#define DIU_CTRLDESCLn_2(n) DIU_CTRLDESCL(n, 2) -#define DIU_CTRLDESCLn_3(n) DIU_CTRLDESCL(n, 3) -#define TRANS_SHIFT 20 -#define DIU_CTRLDESCLn_4(n) DIU_CTRLDESCL(n, 4) -#define BPP_MASK 0xf /* Bit per pixel Mask */ -#define BPP_SHIFT 16 /* Bit per pixel Shift */ -#define BPP24 0x5 -#define EN_LAYER (1 << 31) /* Enable the layer */ -#define DIU_CTRLDESCLn_5(n) DIU_CTRLDESCL(n, 5) -#define DIU_CTRLDESCLn_6(n) DIU_CTRLDESCL(n, 6) -#define DIU_CTRLDESCLn_7(n) DIU_CTRLDESCL(n, 7) -#define DIU_CTRLDESCLn_8(n) DIU_CTRLDESCL(n, 8) -#define DIU_CTRLDESCLn_9(n) DIU_CTRLDESCL(n, 9) - -#define NUM_LAYERS 1 - -struct panel_info { - uint32_t panel_width; - uint32_t panel_height; - uint32_t panel_hbp; - uint32_t panel_hpw; - uint32_t panel_hfp; - uint32_t panel_vbp; - uint32_t panel_vpw; - uint32_t panel_vfp; - uint32_t panel_freq; - uint32_t clk_div; -}; - -struct diu_area_descriptor { - uint32_t pixel_format; - uint32_t bitmap_address; - uint32_t source_size; - uint32_t aoi_size; - uint32_t aoi_offset; - uint32_t display_offset; - uint32_t chroma_key_max; - uint32_t chroma_key_min; - uint32_t next_ad_addr; -} __aligned(32); - -struct diu_softc { - struct resource *res[2]; - void *ih; - device_t sc_dev; - device_t sc_fbd; /* fbd child */ - struct fb_info sc_info; - struct panel_info sc_panel; - struct diu_area_descriptor *sc_planes[3]; - uint8_t *sc_gamma; - uint8_t *sc_cursor; -}; - -static struct resource_spec diu_spec[] = { - { SYS_RES_MEMORY, 0, RF_ACTIVE }, - { SYS_RES_IRQ, 0, RF_ACTIVE }, - { -1, 0 } -}; - -static int -diu_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "fsl,diu")) - return (ENXIO); - - device_set_desc(dev, "Freescale Display Interface Unit"); - return (BUS_PROBE_DEFAULT); -} - -static void -diu_intr(void *arg) -{ - struct diu_softc *sc; - int reg; - - sc = arg; - - /* Ack interrupts */ - reg = bus_read_4(sc->res[0], DIU_INT_STATUS); - bus_write_4(sc->res[0], DIU_INT_STATUS, reg); - - /* TODO interrupt handler */ -} - -static int -diu_set_pxclk(device_t dev, unsigned int freq) -{ - phandle_t node; - unsigned long bus_freq; - uint32_t pxclk_set; - uint32_t clkdvd; - - node = ofw_bus_get_node(device_get_parent(dev)); - if ((bus_freq = mpc85xx_get_platform_clock()) <= 0) { - device_printf(dev, "Unable to get bus frequency\n"); - return (ENXIO); - } - - /* freq is in kHz */ - freq *= 1000; - /* adding freq/2 to round-to-closest */ - pxclk_set = min(max((bus_freq + freq/2) / freq, 2), 255) << 16; - pxclk_set |= OCP85XX_CLKDVDR_PXCKEN; - clkdvd = ccsr_read4(OCP85XX_CLKDVDR); - clkdvd &= ~(OCP85XX_CLKDVDR_PXCKEN | OCP85XX_CLKDVDR_PXCKINV | - OCP85XX_CLKDVDR_PXCLK_MASK); - ccsr_write4(OCP85XX_CLKDVDR, clkdvd); - ccsr_write4(OCP85XX_CLKDVDR, clkdvd | pxclk_set); - - return (0); -} - -static int -diu_init(struct diu_softc *sc) -{ - struct panel_info *panel; - int reg; - - panel = &sc->sc_panel; - - /* Temporarily disable the DIU while configuring */ - reg = bus_read_4(sc->res[0], DIU_DIU_MODE); - reg &= ~(DIU_MODE_M << DIU_MODE_S); - bus_write_4(sc->res[0], DIU_DIU_MODE, reg); - - if (diu_set_pxclk(sc->sc_dev, panel->panel_freq) < 0) { - return (ENXIO); - } - - /* Configure DIU */ - /* Need to set these somehow later... */ - bus_write_4(sc->res[0], DIU_GAMMA, vtophys(sc->sc_gamma)); - bus_write_4(sc->res[0], DIU_CURSOR, vtophys(sc->sc_cursor)); - bus_write_4(sc->res[0], DIU_CURS_POS, 0); - - reg = ((sc->sc_info.fb_height) << DELTA_Y_S); - reg |= sc->sc_info.fb_width; - bus_write_4(sc->res[0], DIU_DISP_SIZE, reg); - - reg = (panel->panel_hbp << BP_H_SHIFT); - reg |= (panel->panel_hpw << PW_H_SHIFT); - reg |= (panel->panel_hfp << FP_H_SHIFT); - bus_write_4(sc->res[0], DIU_HSYN_PARA, reg); - - reg = (panel->panel_vbp << BP_V_SHIFT); - reg |= (panel->panel_vpw << PW_V_SHIFT); - reg |= (panel->panel_vfp << FP_V_SHIFT); - bus_write_4(sc->res[0], DIU_VSYN_PARA, reg); - - bus_write_4(sc->res[0], DIU_BGND, 0); - - /* Mask all the interrupts */ - bus_write_4(sc->res[0], DIU_INT_MASK, 0x3f); - - /* Reset all layers */ - sc->sc_planes[0] = contigmalloc(sizeof(struct diu_area_descriptor), - M_DEVBUF, M_ZERO, 0, BUS_SPACE_MAXADDR_32BIT, 32, 0); - bus_write_4(sc->res[0], DIU_DESC_1, vtophys(sc->sc_planes[0])); - bus_write_4(sc->res[0], DIU_DESC_2, 0); - bus_write_4(sc->res[0], DIU_DESC_3, 0); - - /* Setup first plane */ - /* Area descriptor fields are little endian, so byte swap. */ - /* Word 0: Pixel format */ - /* Set to 8:8:8:8 ARGB, 4 bytes per pixel, no flip. */ -#define MAKE_PXLFMT(as,rs,gs,bs,a,r,g,b,f,s) \ - htole32((as << (4 * a)) | (rs << 4 * r) | \ - (gs << 4 * g) | (bs << 4 * b) | \ - (f << 28) | (s << 16) | \ - (a << 25) | (r << 19) | \ - (g << 21) | (b << 24)) - reg = MAKE_PXLFMT(8, 8, 8, 8, 3, 2, 1, 0, 1, 3); - sc->sc_planes[0]->pixel_format = reg; - /* Word 1: Bitmap address */ - sc->sc_planes[0]->bitmap_address = htole32(sc->sc_info.fb_pbase); - /* Word 2: Source size/global alpha */ - reg = (sc->sc_info.fb_width | (sc->sc_info.fb_height << 12)); - sc->sc_planes[0]->source_size = htole32(reg); - /* Word 3: AOI Size */ - reg = (sc->sc_info.fb_width | (sc->sc_info.fb_height << 16)); - sc->sc_planes[0]->aoi_size = htole32(reg); - /* Word 4: AOI Offset */ - sc->sc_planes[0]->aoi_offset = 0; - /* Word 5: Display offset */ - sc->sc_planes[0]->display_offset = 0; - /* Word 6: Chroma key max */ - sc->sc_planes[0]->chroma_key_max = 0; - /* Word 7: Chroma key min */ - reg = 255 << 16 | 255 << 8 | 255; - sc->sc_planes[0]->chroma_key_min = htole32(reg); - /* Word 8: Next AD */ - sc->sc_planes[0]->next_ad_addr = 0; - - /* TODO: derive this from the panel size */ - bus_write_4(sc->res[0], DIU_PLUT, 0x1f5f666); - - /* Enable DIU in normal mode */ - reg = bus_read_4(sc->res[0], DIU_DIU_MODE); - reg &= ~(DIU_MODE_M << DIU_MODE_S); - reg |= (DIU_MODE_NORMAL << DIU_MODE_S); - bus_write_4(sc->res[0], DIU_DIU_MODE, reg); - - return (0); -} - -static int -diu_attach(device_t dev) -{ - struct edid_info edid; - struct diu_softc *sc; - const struct videomode *videomode; - void *edid_cells; - const char *vm_name; - phandle_t node; - int h, r, w; - int err, i; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - - if (bus_alloc_resources(dev, diu_spec, sc->res)) { - device_printf(dev, "could not allocate resources\n"); - return (ENXIO); - } - - node = ofw_bus_get_node(dev); - /* Setup interrupt handler */ - err = bus_setup_intr(dev, sc->res[1], INTR_TYPE_BIO | INTR_MPSAFE, - NULL, diu_intr, sc, &sc->ih); - if (err) { - device_printf(dev, "Unable to alloc interrupt resource.\n"); - return (ENXIO); - } - - /* TODO: Eventually, allow EDID to be dynamically provided. */ - if (OF_getprop_alloc(node, "edid", &edid_cells) <= 0) { - /* Get a resource hint: hint.fb.N.mode */ - if (resource_string_value(device_get_name(dev), - device_get_unit(dev), "mode", &vm_name) != 0) { - device_printf(dev, - "No EDID data and no video-mode env set\n"); - return (ENXIO); - } - } - if (edid_cells != NULL) { - if (edid_parse(edid_cells, &edid) != 0) { - device_printf(dev, "Error parsing EDID\n"); - OF_prop_free(edid_cells); - return (ENXIO); - } - videomode = edid.edid_preferred_mode; - } else { - /* Parse video-mode kenv variable. */ - if ((err = sscanf(vm_name, "%dx%d@%d", &w, &h, &r)) != 3) { - device_printf(dev, - "Cannot parse video mode: %s\n", vm_name); - return (ENXIO); - } - videomode = pick_mode_by_ref(w, h, r); - if (videomode == NULL) { - device_printf(dev, - "Cannot find mode for %dx%d@%d", w, h, r); - return (ENXIO); - } - } - - sc->sc_panel.panel_width = videomode->hdisplay; - sc->sc_panel.panel_height = videomode->vdisplay; - sc->sc_panel.panel_hbp = videomode->hsync_start - videomode->hdisplay; - sc->sc_panel.panel_hfp = videomode->htotal - videomode->hsync_end; - sc->sc_panel.panel_hpw = videomode->hsync_end - videomode->hsync_start; - sc->sc_panel.panel_vbp = videomode->vsync_start - videomode->vdisplay; - sc->sc_panel.panel_vfp = videomode->vtotal - videomode->vsync_end; - sc->sc_panel.panel_vpw = videomode->vsync_end - videomode->vsync_start; - sc->sc_panel.panel_freq = videomode->dot_clock; - - sc->sc_info.fb_width = sc->sc_panel.panel_width; - sc->sc_info.fb_height = sc->sc_panel.panel_height; - sc->sc_info.fb_stride = sc->sc_info.fb_width * 4; - sc->sc_info.fb_bpp = sc->sc_info.fb_depth = 32; - sc->sc_info.fb_size = sc->sc_info.fb_height * sc->sc_info.fb_stride; - sc->sc_info.fb_vbase = (intptr_t)contigmalloc(sc->sc_info.fb_size, - M_DEVBUF, M_ZERO, 0, BUS_SPACE_MAXADDR_32BIT, PAGE_SIZE, 0); - sc->sc_info.fb_pbase = (intptr_t)vtophys(sc->sc_info.fb_vbase); - sc->sc_info.fb_flags = FB_FLAG_MEMATTR; - sc->sc_info.fb_memattr = VM_MEMATTR_DEFAULT; - - /* Gamma table is 3 consecutive segments of 256 bytes. */ - sc->sc_gamma = contigmalloc(3 * 256, M_DEVBUF, 0, 0, - BUS_SPACE_MAXADDR_32BIT, PAGE_SIZE, 0); - /* Initialize gamma to default */ - for (i = 0; i < 3 * 256; i++) - sc->sc_gamma[i] = (i % 256); - - /* Cursor format is 32x32x16bpp */ - sc->sc_cursor = contigmalloc(32 * 32 * 2, M_DEVBUF, M_ZERO, 0, - BUS_SPACE_MAXADDR_32BIT, PAGE_SIZE, 0); - - diu_init(sc); - - sc->sc_info.fb_name = device_get_nameunit(dev); - - /* Ask newbus to attach framebuffer device to me. */ - sc->sc_fbd = device_add_child(dev, "fbd", device_get_unit(dev)); - if (sc->sc_fbd == NULL) - device_printf(dev, "Can't attach fbd device\n"); - - if ((err = device_probe_and_attach(sc->sc_fbd)) != 0) { - device_printf(dev, "Failed to attach fbd device: %d\n", err); - } - - return (0); -} - -static struct fb_info * -diu_fb_getinfo(device_t dev) -{ - struct diu_softc *sc = device_get_softc(dev); - - return (&sc->sc_info); -} - -static device_method_t diu_methods[] = { - DEVMETHOD(device_probe, diu_probe), - DEVMETHOD(device_attach, diu_attach), - - /* Framebuffer service methods */ - DEVMETHOD(fb_getinfo, diu_fb_getinfo), - { 0, 0 } -}; - -static driver_t diu_driver = { - "fb", - diu_methods, - sizeof(struct diu_softc), -}; - -static devclass_t diu_devclass; - -DRIVER_MODULE(fb, simplebus, diu_driver, diu_devclass, 0, 0); diff --git a/sys/powerpc/mpc85xx/fsl_espi.c b/sys/powerpc/mpc85xx/fsl_espi.c deleted file mode 100644 index edd03415a1b..00000000000 --- a/sys/powerpc/mpc85xx/fsl_espi.c +++ /dev/null @@ -1,432 +0,0 @@ -/*- - * Copyright (c) 2017 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include -#include - -#include - -#include "spibus_if.h" - -/* TODO: - * - * Optimize FIFO reads and writes to do word-at-a-time instead of byte-at-a-time - */ -#define ESPI_SPMODE 0x0 -#define ESPI_SPMODE_EN 0x80000000 -#define ESPI_SPMODE_LOOP 0x40000000 -#define ESPI_SPMODE_HO_ADJ_M 0x00070000 -#define ESPI_SPMODE_TXTHR_M 0x00003f00 -#define ESPI_SPMODE_TXTHR_S 8 -#define ESPI_SPMODE_RXTHR_M 0x0000001f -#define ESPI_SPMODE_RXTHR_S 0 -#define ESPI_SPIE 0x4 -#define ESPI_SPIE_RXCNT_M 0x3f000000 -#define ESPI_SPIE_RXCNT_S 24 -#define ESPI_SPIE_TXCNT_M 0x003f0000 -#define ESPI_SPIE_TXCNT_S 16 -#define ESPI_SPIE_TXE 0x00008000 -#define ESPI_SPIE_DON 0x00004000 -#define ESPI_SPIE_RXT 0x00002000 -#define ESPI_SPIE_RXF 0x00001000 -#define ESPI_SPIE_TXT 0x00000800 -#define ESPI_SPIE_RNE 0x00000200 -#define ESPI_SPIE_TNF 0x00000100 -#define ESPI_SPIM 0x8 -#define ESPI_SPCOM 0xc -#define ESPI_SPCOM_CS_M 0xc0000000 -#define ESPI_SPCOM_CS_S 30 -#define ESPI_SPCOM_RXDELAY 0x20000000 -#define ESPI_SPCOM_DO 0x10000000 -#define ESPI_SPCOM_TO 0x08000000 -#define ESPI_SPCOM_HLD 0x04000000 -#define ESPI_SPCOM_RXSKIP_M 0x00ff0000 -#define ESPI_SPCOM_TRANLEN_M 0x0000ffff -#define ESPI_SPITF 0x10 -#define ESPI_SPIRF 0x14 -#define ESPI_SPMODE0 0x20 -#define ESPI_SPMODE1 0x24 -#define ESPI_SPMODE2 0x28 -#define ESPI_SPMODE3 0x2c -#define ESPI_CSMODE_CI 0x80000000 -#define ESPI_CSMODE_CP 0x40000000 -#define ESPI_CSMODE_REV 0x20000000 -#define ESPI_CSMODE_DIV16 0x10000000 -#define ESPI_CSMODE_PM_M 0x0f000000 -#define ESPI_CSMODE_PM_S 24 -#define ESPI_CSMODE_ODD 0x00800000 -#define ESPI_CSMODE_POL 0x00100000 -#define ESPI_CSMODE_LEN_M 0x000f0000 -#define ESPI_CSMODE_LEN(x) (x << 16) -#define ESPI_CSMODE_CSBEF_M 0x0000f000 -#define ESPI_CSMODE_CSAFT_M 0x00000f00 -#define ESPI_CSMODE_CSCG_M 0x000000f8 -#define ESPI_CSMODE_CSCG(x) (x << 3) -#define ESPI_CSMODE(n) (ESPI_SPMODE0 + n * 4) - -#define FSL_ESPI_WRITE(sc,off,val) bus_write_4(sc->sc_mem_res, off, val) -#define FSL_ESPI_READ(sc,off) bus_read_4(sc->sc_mem_res, off) -#define FSL_ESPI_WRITE_FIFO(sc,off,val) bus_write_1(sc->sc_mem_res, off, val) -#define FSL_ESPI_READ_FIFO(sc,off) bus_read_1(sc->sc_mem_res, off) - -#define FSL_ESPI_LOCK(_sc) \ - mtx_lock(&(_sc)->sc_mtx) -#define FSL_ESPI_UNLOCK(_sc) \ - mtx_unlock(&(_sc)->sc_mtx) - -struct fsl_espi_softc -{ - device_t sc_dev; - struct resource *sc_mem_res; - struct resource *sc_irq_res; - struct mtx sc_mtx; - int sc_num_cs; - struct spi_command *sc_cmd; - uint32_t sc_len; - uint32_t sc_read; - uint32_t sc_flags; -#define FSL_ESPI_BUSY 0x00000001 - uint32_t sc_written; - void * sc_intrhand; -}; - -static void fsl_espi_intr(void *); - -static int -fsl_espi_probe(device_t dev) -{ - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "fsl,mpc8536-espi")) - return (ENXIO); - - device_set_desc(dev, "Freescale eSPI controller"); - - return (BUS_PROBE_DEFAULT); -} - -static int -fsl_espi_attach(device_t dev) -{ - struct fsl_espi_softc *sc; - int rid; - phandle_t node; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - node = ofw_bus_get_node(dev); - - rid = 0; - sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (!sc->sc_mem_res) { - device_printf(dev, "cannot allocate memory resource\n"); - return (ENXIO); - } - - rid = 0; - sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_ACTIVE); - if (!sc->sc_irq_res) { - bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); - device_printf(dev, "cannot allocate interrupt\n"); - return (ENXIO); - } - - /* Hook up our interrupt handler. */ - if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE, - NULL, fsl_espi_intr, sc, &sc->sc_intrhand)) { - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); - bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); - device_printf(dev, "cannot setup the interrupt handler\n"); - return (ENXIO); - } - if (OF_getencprop(node, "fsl,espi-num-chipselects", - &sc->sc_num_cs, sizeof(sc->sc_num_cs)) < 0 ) - sc->sc_num_cs = 4; - - mtx_init(&sc->sc_mtx, "fsl_espi", NULL, MTX_DEF); - - /* Enable the SPI controller. */ - FSL_ESPI_WRITE(sc, ESPI_SPMODE, ESPI_SPMODE_EN | - (16 << ESPI_SPMODE_TXTHR_S) | (15 << ESPI_SPMODE_RXTHR_S)); - - /* Disable all interrupts until we start transfers */ - FSL_ESPI_WRITE(sc, ESPI_SPIM, 0); - - device_add_child(dev, "spibus", -1); - - return (bus_generic_attach(dev)); -} - -static int -fsl_espi_detach(device_t dev) -{ - struct fsl_espi_softc *sc; - - bus_generic_detach(dev); - - sc = device_get_softc(dev); - FSL_ESPI_WRITE(sc, ESPI_SPMODE, 0); - - sc = device_get_softc(dev); - mtx_destroy(&sc->sc_mtx); - if (sc->sc_intrhand) - bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intrhand); - if (sc->sc_irq_res) - bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); - if (sc->sc_mem_res) - bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); - - return (0); -} - -static void -fsl_espi_fill_fifo(struct fsl_espi_softc *sc) -{ - struct spi_command *cmd; - uint32_t spier, written; - uint8_t *data; - - cmd = sc->sc_cmd; - spier = FSL_ESPI_READ(sc, ESPI_SPIE); - while (sc->sc_written < sc->sc_len && - (spier & ESPI_SPIE_TNF)) { - data = (uint8_t *)cmd->tx_cmd; - written = sc->sc_written++; - if (written >= cmd->tx_cmd_sz) { - data = (uint8_t *)cmd->tx_data; - written -= cmd->tx_cmd_sz; - } - FSL_ESPI_WRITE_FIFO(sc, ESPI_SPITF, data[written]); - spier = FSL_ESPI_READ(sc, ESPI_SPIE); - } -} - -static void -fsl_espi_drain_fifo(struct fsl_espi_softc *sc) -{ - struct spi_command *cmd; - uint32_t spier, read; - uint8_t *data; - uint8_t r; - - cmd = sc->sc_cmd; - spier = FSL_ESPI_READ(sc, ESPI_SPIE); - while (sc->sc_read < sc->sc_len && (spier & ESPI_SPIE_RNE)) { - data = (uint8_t *)cmd->rx_cmd; - read = sc->sc_read++; - if (read >= cmd->rx_cmd_sz) { - data = (uint8_t *)cmd->rx_data; - read -= cmd->rx_cmd_sz; - } - r = FSL_ESPI_READ_FIFO(sc, ESPI_SPIRF); - data[read] = r; - spier = FSL_ESPI_READ(sc, ESPI_SPIE); - } -} - -static void -fsl_espi_intr(void *arg) -{ - struct fsl_espi_softc *sc; - uint32_t spie; - - sc = (struct fsl_espi_softc *)arg; - FSL_ESPI_LOCK(sc); - - /* Filter stray interrupts. */ - if ((sc->sc_flags & FSL_ESPI_BUSY) == 0) { - FSL_ESPI_UNLOCK(sc); - return; - } - spie = FSL_ESPI_READ(sc, ESPI_SPIE); - FSL_ESPI_WRITE(sc, ESPI_SPIE, spie); - - /* TX - Fill up the FIFO. */ - fsl_espi_fill_fifo(sc); - - /* RX - Drain the FIFO. */ - fsl_espi_drain_fifo(sc); - - /* Check for end of transfer. */ - if (spie & ESPI_SPIE_DON) - wakeup(sc->sc_dev); - - FSL_ESPI_UNLOCK(sc); -} - -static int -fsl_espi_transfer(device_t dev, device_t child, struct spi_command *cmd) -{ - struct fsl_espi_softc *sc; - u_long plat_clk; - uint32_t csmode, spi_clk, spi_mode; - int cs, err, pm; - - sc = device_get_softc(dev); - - KASSERT(cmd->tx_cmd_sz == cmd->rx_cmd_sz, - ("TX/RX command sizes should be equal")); - KASSERT(cmd->tx_data_sz == cmd->rx_data_sz, - ("TX/RX data sizes should be equal")); - - /* Restrict transmit length to command max length */ - if (cmd->tx_cmd_sz + cmd->tx_data_sz > ESPI_SPCOM_TRANLEN_M + 1) { - return (EINVAL); - } - - /* Get the proper chip select for this child. */ - spibus_get_cs(child, &cs); - if (cs < 0 || cs > sc->sc_num_cs) { - device_printf(dev, - "Invalid chip select %d requested by %s\n", cs, - device_get_nameunit(child)); - return (EINVAL); - } - spibus_get_clock(child, &spi_clk); - spibus_get_mode(child, &spi_mode); - - FSL_ESPI_LOCK(sc); - - /* If the controller is in use wait until it is available. */ - while (sc->sc_flags & FSL_ESPI_BUSY) - mtx_sleep(dev, &sc->sc_mtx, 0, "fsl_espi", 0); - - /* Now we have control over SPI controller. */ - sc->sc_flags = FSL_ESPI_BUSY; - - /* Save a pointer to the SPI command. */ - sc->sc_cmd = cmd; - sc->sc_read = 0; - sc->sc_written = 0; - sc->sc_len = cmd->tx_cmd_sz + cmd->tx_data_sz; - - plat_clk = mpc85xx_get_system_clock(); - spi_clk = max(spi_clk, plat_clk / (16 * 16)); - if (plat_clk == 0) { - device_printf(dev, - "unable to get platform clock, giving up.\n"); - return (EINVAL); - } - csmode = 0; - if (plat_clk > spi_clk * 16 * 2) { - csmode |= ESPI_CSMODE_DIV16; - plat_clk /= 16; - } - pm = howmany(plat_clk, spi_clk * 2) - 1; - if (pm < 0) - pm = 1; - if (pm > 15) - pm = 15; - - csmode |= (pm << ESPI_CSMODE_PM_S); - csmode |= ESPI_CSMODE_REV; - if (spi_mode == SPIBUS_MODE_CPOL || spi_mode == SPIBUS_MODE_CPOL_CPHA) - csmode |= ESPI_CSMODE_CI; - if (spi_mode == SPIBUS_MODE_CPHA || spi_mode == SPIBUS_MODE_CPOL_CPHA) - csmode |= ESPI_CSMODE_CP; - if (!(cs & SPIBUS_CS_HIGH)) - csmode |= ESPI_CSMODE_POL; - csmode |= ESPI_CSMODE_LEN(7);/* Only deal with 8-bit characters. */ - csmode |= ESPI_CSMODE_CSCG(1); /* XXX: Make this configurable? */ - /* Configure transaction */ - FSL_ESPI_WRITE(sc, ESPI_SPCOM, (cs << ESPI_SPCOM_CS_S) | (sc->sc_len - 1)); - FSL_ESPI_WRITE(sc, ESPI_CSMODE(cs), csmode); - /* Enable interrupts we need. */ - FSL_ESPI_WRITE(sc, ESPI_SPIM, - ESPI_SPIE_TXE | ESPI_SPIE_DON | ESPI_SPIE_RXF); - - /* Wait for the transaction to complete. */ - err = mtx_sleep(dev, &sc->sc_mtx, 0, "fsl_espi", hz * 2); - FSL_ESPI_WRITE(sc, ESPI_SPIM, 0); - - /* Release the controller and wakeup the next thread waiting for it. */ - sc->sc_flags = 0; - wakeup_one(dev); - FSL_ESPI_UNLOCK(sc); - - /* - * Check for transfer timeout. The SPI controller doesn't - * return errors. - */ - if (err == EWOULDBLOCK) { - device_printf(sc->sc_dev, "SPI error\n"); - err = EIO; - } - - return (err); -} - -static phandle_t -fsl_espi_get_node(device_t bus, device_t dev) -{ - - /* We only have one child, the SPI bus, which needs our own node. */ - return (ofw_bus_get_node(bus)); -} - -static device_method_t fsl_espi_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, fsl_espi_probe), - DEVMETHOD(device_attach, fsl_espi_attach), - DEVMETHOD(device_detach, fsl_espi_detach), - - /* SPI interface */ - DEVMETHOD(spibus_transfer, fsl_espi_transfer), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_node, fsl_espi_get_node), - - DEVMETHOD_END -}; - -static devclass_t fsl_espi_devclass; - -static driver_t fsl_espi_driver = { - "spi", - fsl_espi_methods, - sizeof(struct fsl_espi_softc), -}; - -DRIVER_MODULE(fsl_espi, simplebus, fsl_espi_driver, fsl_espi_devclass, 0, 0); diff --git a/sys/powerpc/mpc85xx/fsl_sata.c b/sys/powerpc/mpc85xx/fsl_sata.c deleted file mode 100644 index a6794a234fa..00000000000 --- a/sys/powerpc/mpc85xx/fsl_sata.c +++ /dev/null @@ -1,1894 +0,0 @@ -/*- - * Copyright (c) 2009-2012 Alexander Motin - * Copyright (c) 2017 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include "fsl_sata.h" - -struct fsl_sata_channel; -struct fsl_sata_slot; -enum fsl_sata_err_type; -struct fsl_sata_cmd_tab; - -/* local prototypes */ -static int fsl_sata_init(device_t dev); -static int fsl_sata_deinit(device_t dev); -static int fsl_sata_suspend(device_t dev); -static int fsl_sata_resume(device_t dev); -static void fsl_sata_pm(void *arg); -static void fsl_sata_intr(void *arg); -static void fsl_sata_intr_main(struct fsl_sata_channel *ch, uint32_t istatus); -static void fsl_sata_begin_transaction(struct fsl_sata_channel *ch, union ccb *ccb); -static void fsl_sata_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error); -static void fsl_sata_execute_transaction(struct fsl_sata_slot *slot); -static void fsl_sata_timeout(void *arg); -static void fsl_sata_end_transaction(struct fsl_sata_slot *slot, enum fsl_sata_err_type et); -static int fsl_sata_setup_fis(struct fsl_sata_channel *ch, struct fsl_sata_cmd_tab *ctp, union ccb *ccb, int tag); -static void fsl_sata_dmainit(device_t dev); -static void fsl_sata_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error); -static void fsl_sata_dmafini(device_t dev); -static void fsl_sata_slotsalloc(device_t dev); -static void fsl_sata_slotsfree(device_t dev); -static void fsl_sata_reset(struct fsl_sata_channel *ch); -static void fsl_sata_start(struct fsl_sata_channel *ch); -static void fsl_sata_stop(struct fsl_sata_channel *ch); - -static void fsl_sata_issue_recovery(struct fsl_sata_channel *ch); -static void fsl_sata_process_read_log(struct fsl_sata_channel *ch, union ccb *ccb); -static void fsl_sata_process_request_sense(struct fsl_sata_channel *ch, union ccb *ccb); - -static void fsl_sataaction(struct cam_sim *sim, union ccb *ccb); -static void fsl_satapoll(struct cam_sim *sim); - -static MALLOC_DEFINE(M_FSL_SATA, "FSL SATA driver", "FSL SATA driver data buffers"); - -#define recovery_type spriv_field0 -#define RECOVERY_NONE 0 -#define RECOVERY_READ_LOG 1 -#define RECOVERY_REQUEST_SENSE 2 -#define recovery_slot spriv_field1 - -#define FSL_SATA_P_CQR 0x0 -#define FSL_SATA_P_CAR 0x4 -#define FSL_SATA_P_CCR 0x10 -#define FSL_SATA_P_CER 0x18 -#define FSL_SATA_P_DER 0x20 -#define FSL_SATA_P_CHBA 0x24 -#define FSL_SATA_P_HSTS 0x28 -#define FSL_SATA_P_HSTS_HS_ON 0x80000000 -#define FSL_SATA_P_HSTS_ME 0x00040000 -#define FSL_SATA_P_HSTS_DLM 0x00001000 -#define FSL_SATA_P_HSTS_FOT 0x00000200 -#define FSL_SATA_P_HSTS_FOR 0x00000100 -#define FSL_SATA_P_HSTS_FE 0x00000020 -#define FSL_SATA_P_HSTS_PR 0x00000010 -#define FSL_SATA_P_HSTS_SNTFU 0x00000004 -#define FSL_SATA_P_HSTS_DE 0x00000002 -#define FSL_SATA_P_HCTRL 0x2c -#define FSL_SATA_P_HCTRL_HC_ON 0x80000000 -#define FSL_SATA_P_HCTRL_HC_FORCE_OFF 0x40000000 -#define FSL_SATA_P_HCTRL_ENT 0x10000000 -#define FSL_SATA_P_HCTRL_SNOOP 0x00000400 -#define FSL_SATA_P_HCTRL_PM 0x00000200 -#define FSL_SATA_P_HCTRL_FATAL 0x00000020 -#define FSL_SATA_P_HCTRL_PHYRDY 0x00000010 -#define FSL_SATA_P_HCTRL_SIG 0x00000008 -#define FSL_SATA_P_HCTRL_SNTFY 0x00000004 -#define FSL_SATA_P_HCTRL_DE 0x00000002 -#define FSL_SATA_P_HCTRL_CC 0x00000001 -#define FSL_SATA_P_HCTRL_INT_MASK 0x0000003f -#define FSL_SATA_P_CQPMP 0x30 -#define FSL_SATA_P_SIG 0x34 -#define FSL_SATA_P_ICC 0x38 -#define FSL_SATA_P_ICC_ITC_M 0x1f000000 -#define FSL_SATA_P_ICC_ITC_S 24 -#define FSL_SATA_P_ICC_ITTCV_M 0x0007ffff -#define FSL_SATA_P_PCC 0x15c -#define FSL_SATA_P_PCC_SLUMBER 0x0000000c -#define FSL_SATA_P_PCC_PARTIAL 0x0000000a -#define FSL_SATA_PCC_LPB_EN 0x0000000e - -#define FSL_SATA_MAX_SLOTS 16 -/* FSL_SATA register defines */ - -#define FSL_SATA_P_SSTS 0x100 -#define FSL_SATA_P_SERR 0x104 -#define FSL_SATA_P_SCTL 0x108 -#define FSL_SATA_P_SNTF 0x10c - -/* Pessimistic prognosis on number of required S/G entries */ -#define FSL_SATA_SG_ENTRIES 63 -/* Command list. 16 commands. First, 1Kbyte aligned. */ -#define FSL_SATA_CL_OFFSET 0 -#define FSL_SATA_CL_SIZE 16 -/* Command tables. Up to 32 commands, Each, 4-byte aligned. */ -#define FSL_SATA_CT_OFFSET (FSL_SATA_CL_OFFSET + FSL_SATA_CL_SIZE * FSL_SATA_MAX_SLOTS) -#define FSL_SATA_CT_SIZE (96 + FSL_SATA_SG_ENTRIES * 16) -/* Total main work area. */ -#define FSL_SATA_WORK_SIZE (FSL_SATA_CT_OFFSET + FSL_SATA_CT_SIZE * FSL_SATA_MAX_SLOTS) -#define FSL_SATA_MAX_XFER (64 * 1024 * 1024) - -/* Some convenience macros for getting the CTP and CLP */ -#define FSL_SATA_CTP_BUS(ch, slot) \ - ((ch->dma.work_bus + FSL_SATA_CT_OFFSET + (FSL_SATA_CT_SIZE * slot->slot))) -#define FSL_SATA_PRD_OFFSET(prd) (96 + (prd) * 16) -#define FSL_SATA_CTP(ch, slot) \ - ((struct fsl_sata_cmd_tab *)(ch->dma.work + FSL_SATA_CT_OFFSET + \ - (FSL_SATA_CT_SIZE * slot->slot))) -#define FSL_SATA_CLP(ch, slot) \ - ((struct fsl_sata_cmd_list *) (ch->dma.work + FSL_SATA_CL_OFFSET + \ - (FSL_SATA_CL_SIZE * slot->slot))) - -struct fsl_sata_dma_prd { - uint32_t dba; - uint32_t reserved; - uint32_t reserved2; - uint32_t dwc_flg; /* 0 based */ -#define FSL_SATA_PRD_MASK 0x01fffffc /* max 32MB */ -#define FSL_SATA_PRD_MAX (FSL_SATA_PRD_MASK + 4) -#define FSL_SATA_PRD_SNOOP 0x10000000 -#define FSL_SATA_PRD_EXT 0x80000000 -} __packed; - -struct fsl_sata_cmd_tab { - uint8_t cfis[32]; - uint8_t sfis[32]; - uint8_t acmd[16]; - uint8_t reserved[16]; - struct fsl_sata_dma_prd prd_tab[FSL_SATA_SG_ENTRIES]; -#define FSL_SATA_PRD_EXT_INDEX 15 -#define FSL_SATA_PRD_MAX_DIRECT 16 -} __packed; - -struct fsl_sata_cmd_list { - uint32_t cda; /* word aligned */ - uint16_t fis_length; /* length in bytes (aligned to words) */ - uint16_t prd_length; /* PRD entries */ - uint32_t ttl; - uint32_t cmd_flags; -#define FSL_SATA_CMD_TAG_MASK 0x001f -#define FSL_SATA_CMD_ATAPI 0x0020 -#define FSL_SATA_CMD_BIST 0x0040 -#define FSL_SATA_CMD_RESET 0x0080 -#define FSL_SATA_CMD_QUEUED 0x0100 -#define FSL_SATA_CMD_SNOOP 0x0200 -#define FSL_SATA_CMD_VBIST 0x0400 -#define FSL_SATA_CMD_WRITE 0x0800 - -} __packed; - -/* misc defines */ -#define ATA_IRQ_RID 0 -#define ATA_INTR_FLAGS (INTR_MPSAFE|INTR_TYPE_BIO|INTR_ENTROPY) - -struct ata_dmaslot { - bus_dmamap_t data_map; /* data DMA map */ - int nsegs; /* Number of segs loaded */ -}; - -/* structure holding DMA related information */ -struct ata_dma { - bus_dma_tag_t work_tag; /* workspace DMA tag */ - bus_dmamap_t work_map; /* workspace DMA map */ - uint8_t *work; /* workspace */ - bus_addr_t work_bus; /* bus address of work */ - bus_dma_tag_t data_tag; /* data DMA tag */ -}; - -enum fsl_sata_slot_states { - FSL_SATA_SLOT_EMPTY, - FSL_SATA_SLOT_LOADING, - FSL_SATA_SLOT_RUNNING, - FSL_SATA_SLOT_EXECUTING -}; - -struct fsl_sata_slot { - struct fsl_sata_channel *ch; /* Channel */ - uint8_t slot; /* Number of this slot */ - enum fsl_sata_slot_states state; /* Slot state */ - union ccb *ccb; /* CCB occupying slot */ - struct ata_dmaslot dma; /* DMA data of this slot */ - struct callout timeout; /* Execution timeout */ - uint32_t ttl; -}; - -struct fsl_sata_device { - int revision; - int mode; - u_int bytecount; - u_int atapi; - u_int tags; - u_int caps; -}; - -/* structure describing an ATA channel */ -struct fsl_sata_channel { - device_t dev; /* Device handle */ - int r_mid; /* Physical channel RID */ - struct resource *r_mem; /* Memory of this channel */ - struct resource *r_irq; /* Interrupt of this channel */ - void *ih; /* Interrupt handle */ - struct ata_dma dma; /* DMA data */ - struct cam_sim *sim; - struct cam_path *path; - uint32_t caps; /* Controller capabilities */ - int pm_level; /* power management level */ - int devices; /* What is present */ - int pm_present; /* PM presence reported */ - - union ccb *hold[FSL_SATA_MAX_SLOTS]; - struct fsl_sata_slot slot[FSL_SATA_MAX_SLOTS]; - uint32_t oslots; /* Occupied slots */ - uint32_t rslots; /* Running slots */ - uint32_t aslots; /* Slots with atomic commands */ - uint32_t eslots; /* Slots in error */ - uint32_t toslots; /* Slots in timeout */ - int lastslot; /* Last used slot */ - int taggedtarget; /* Last tagged target */ - int numrslots; /* Number of running slots */ - int numrslotspd[16];/* Number of running slots per dev */ - int numtslots; /* Number of tagged slots */ - int numtslotspd[16];/* Number of tagged slots per dev */ - int numhslots; /* Number of held slots */ - int recoverycmd; /* Our READ LOG active */ - int fatalerr; /* Fatal error happend */ - int resetting; /* Hard-reset in progress. */ - int resetpolldiv; /* Hard-reset poll divider. */ - union ccb *frozen; /* Frozen command */ - struct callout pm_timer; /* Power management events */ - struct callout reset_timer; /* Hard-reset timeout */ - - struct fsl_sata_device user[16]; /* User-specified settings */ - struct fsl_sata_device curr[16]; /* Current settings */ - - struct mtx_padalign mtx; /* state lock */ - STAILQ_HEAD(, ccb_hdr) doneq; /* queue of completed CCBs */ - int batch; /* doneq is in use */ -}; - -enum fsl_sata_err_type { - FSL_SATA_ERR_NONE, /* No error */ - FSL_SATA_ERR_INVALID, /* Error detected by us before submitting. */ - FSL_SATA_ERR_INNOCENT, /* Innocent victim. */ - FSL_SATA_ERR_TFE, /* Task File Error. */ - FSL_SATA_ERR_SATA, /* SATA error. */ - FSL_SATA_ERR_TIMEOUT, /* Command execution timeout. */ - FSL_SATA_ERR_NCQ, /* NCQ command error. CCB should be put on hold - * until READ LOG executed to reveal error. */ -}; - -/* macros to hide busspace uglyness */ -#define ATA_INL(res, offset) \ - bus_read_4((res), (offset)) -#define ATA_OUTL(res, offset, value) \ - bus_write_4((res), (offset), (value)) - -static int -fsl_sata_probe(device_t dev) -{ - - if (!ofw_bus_is_compatible(dev, "fsl,pq-sata-v2") && - !ofw_bus_is_compatible(dev, "fsl,pq-sata")) - return (ENXIO); - - device_set_desc_copy(dev, "Freescale Integrated SATA Controller"); - return (BUS_PROBE_DEFAULT); -} - -static int -fsl_sata_attach(device_t dev) -{ - struct fsl_sata_channel *ch = device_get_softc(dev); - struct cam_devq *devq; - int rid, error, i, sata_rev = 0; - - ch->dev = dev; - mtx_init(&ch->mtx, "FSL SATA channel lock", NULL, MTX_DEF); - ch->pm_level = 0; - resource_int_value(device_get_name(dev), - device_get_unit(dev), "pm_level", &ch->pm_level); - STAILQ_INIT(&ch->doneq); - if (ch->pm_level > 3) - callout_init_mtx(&ch->pm_timer, &ch->mtx, 0); - resource_int_value(device_get_name(dev), - device_get_unit(dev), "sata_rev", &sata_rev); - for (i = 0; i < 16; i++) { - ch->user[i].revision = sata_rev; - ch->user[i].mode = 0; - ch->user[i].bytecount = 8192; - ch->user[i].tags = FSL_SATA_MAX_SLOTS; - ch->user[i].caps = 0; - ch->curr[i] = ch->user[i]; - if (ch->pm_level) { - ch->user[i].caps = CTS_SATA_CAPS_H_PMREQ | - CTS_SATA_CAPS_D_PMREQ; - } - ch->user[i].caps |= CTS_SATA_CAPS_H_AN; - } - ch->r_mid = 0; - if (!(ch->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &ch->r_mid, RF_ACTIVE))) - return (ENXIO); - rman_set_bustag(ch->r_mem, &bs_le_tag); - fsl_sata_dmainit(dev); - fsl_sata_slotsalloc(dev); - fsl_sata_init(dev); - rid = ATA_IRQ_RID; - if (!(ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, - &rid, RF_SHAREABLE | RF_ACTIVE))) { - device_printf(dev, "Unable to map interrupt\n"); - error = ENXIO; - goto err0; - } - if ((bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL, - fsl_sata_intr, ch, &ch->ih))) { - device_printf(dev, "Unable to setup interrupt\n"); - error = ENXIO; - goto err1; - } - mtx_lock(&ch->mtx); - /* Create the device queue for our SIM. */ - devq = cam_simq_alloc(FSL_SATA_MAX_SLOTS); - if (devq == NULL) { - device_printf(dev, "Unable to allocate simq\n"); - error = ENOMEM; - goto err1; - } - /* Construct SIM entry */ - ch->sim = cam_sim_alloc(fsl_sataaction, fsl_satapoll, "fslsata", ch, - device_get_unit(dev), (struct mtx *)&ch->mtx, 2, FSL_SATA_MAX_SLOTS, - devq); - if (ch->sim == NULL) { - cam_simq_free(devq); - device_printf(dev, "unable to allocate sim\n"); - error = ENOMEM; - goto err1; - } - if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) { - device_printf(dev, "unable to register xpt bus\n"); - error = ENXIO; - goto err2; - } - if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim), - CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { - device_printf(dev, "unable to create path\n"); - error = ENXIO; - goto err3; - } - if (ch->pm_level > 3) { - callout_reset(&ch->pm_timer, - (ch->pm_level == 4) ? hz / 1000 : hz / 8, - fsl_sata_pm, ch); - } - mtx_unlock(&ch->mtx); - return (0); - -err3: - xpt_bus_deregister(cam_sim_path(ch->sim)); -err2: - cam_sim_free(ch->sim, /*free_devq*/TRUE); -err1: - mtx_unlock(&ch->mtx); - bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); -err0: - bus_release_resource(dev, SYS_RES_MEMORY, ch->r_mid, ch->r_mem); - mtx_destroy(&ch->mtx); - return (error); -} - -static int -fsl_sata_detach(device_t dev) -{ - struct fsl_sata_channel *ch = device_get_softc(dev); - - mtx_lock(&ch->mtx); - xpt_async(AC_LOST_DEVICE, ch->path, NULL); - - xpt_free_path(ch->path); - xpt_bus_deregister(cam_sim_path(ch->sim)); - cam_sim_free(ch->sim, /*free_devq*/TRUE); - mtx_unlock(&ch->mtx); - - if (ch->pm_level > 3) - callout_drain(&ch->pm_timer); - bus_teardown_intr(dev, ch->r_irq, ch->ih); - bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq); - - fsl_sata_deinit(dev); - fsl_sata_slotsfree(dev); - fsl_sata_dmafini(dev); - - bus_release_resource(dev, SYS_RES_MEMORY, ch->r_mid, ch->r_mem); - mtx_destroy(&ch->mtx); - return (0); -} - -static int -fsl_sata_wait_register(struct fsl_sata_channel *ch, bus_size_t off, - unsigned int mask, unsigned int val, int t) -{ - int timeout = 0; - uint32_t rval; - - while (((rval = ATA_INL(ch->r_mem, off)) & mask) != val) { - if (timeout > t) { - return (EBUSY); - } - DELAY(1000); - timeout++; - } - return (0); -} - -static int -fsl_sata_init(device_t dev) -{ - struct fsl_sata_channel *ch = device_get_softc(dev); - uint64_t work; - uint32_t r; - - /* Disable port interrupts */ - r = ATA_INL(ch->r_mem, FSL_SATA_P_HCTRL); - r &= ~FSL_SATA_P_HCTRL_HC_ON; - r |= FSL_SATA_P_HCTRL_HC_FORCE_OFF; - ATA_OUTL(ch->r_mem, FSL_SATA_P_HCTRL, r & ~FSL_SATA_P_HCTRL_INT_MASK); - fsl_sata_wait_register(ch, FSL_SATA_P_HSTS, - FSL_SATA_P_HSTS_HS_ON, 0, 1000); - /* Setup work areas */ - work = ch->dma.work_bus + FSL_SATA_CL_OFFSET; - ATA_OUTL(ch->r_mem, FSL_SATA_P_CHBA, work); - r &= ~FSL_SATA_P_HCTRL_ENT; - r &= ~FSL_SATA_P_HCTRL_PM; - ATA_OUTL(ch->r_mem, FSL_SATA_P_HCTRL, r); - r = ATA_INL(ch->r_mem, FSL_SATA_P_PCC); - ATA_OUTL(ch->r_mem, FSL_SATA_P_PCC, r & ~FSL_SATA_PCC_LPB_EN); - ATA_OUTL(ch->r_mem, FSL_SATA_P_ICC, (1 << FSL_SATA_P_ICC_ITC_S)); - fsl_sata_start(ch); - return (0); -} - -static int -fsl_sata_deinit(device_t dev) -{ - struct fsl_sata_channel *ch = device_get_softc(dev); - uint32_t r; - - /* Disable port interrupts. */ - r = ATA_INL(ch->r_mem, FSL_SATA_P_HCTRL); - ATA_OUTL(ch->r_mem, FSL_SATA_P_HCTRL, r & ~FSL_SATA_P_HCTRL_INT_MASK); - /* Reset command register. */ - fsl_sata_stop(ch); - /* Allow everything, including partial and slumber modes. */ - ATA_OUTL(ch->r_mem, FSL_SATA_P_SCTL, 0); - DELAY(100); - /* Disable PHY. */ - ATA_OUTL(ch->r_mem, FSL_SATA_P_SCTL, ATA_SC_DET_DISABLE); - r = ATA_INL(ch->r_mem, FSL_SATA_P_HCTRL); - /* Turn off the controller. */ - ATA_OUTL(ch->r_mem, FSL_SATA_P_HCTRL, r & ~FSL_SATA_P_HCTRL_HC_ON); - return (0); -} - -static int -fsl_sata_suspend(device_t dev) -{ - struct fsl_sata_channel *ch = device_get_softc(dev); - - mtx_lock(&ch->mtx); - xpt_freeze_simq(ch->sim, 1); - while (ch->oslots) - msleep(ch, &ch->mtx, PRIBIO, "fsl_satasusp", hz/100); - fsl_sata_deinit(dev); - mtx_unlock(&ch->mtx); - return (0); -} - -static int -fsl_sata_resume(device_t dev) -{ - struct fsl_sata_channel *ch = device_get_softc(dev); - - mtx_lock(&ch->mtx); - fsl_sata_init(dev); - fsl_sata_reset(ch); - xpt_release_simq(ch->sim, TRUE); - mtx_unlock(&ch->mtx); - return (0); -} - -devclass_t fsl_satach_devclass; -static device_method_t fsl_satach_methods[] = { - DEVMETHOD(device_probe, fsl_sata_probe), - DEVMETHOD(device_attach, fsl_sata_attach), - DEVMETHOD(device_detach, fsl_sata_detach), - DEVMETHOD(device_suspend, fsl_sata_suspend), - DEVMETHOD(device_resume, fsl_sata_resume), - DEVMETHOD_END -}; -static driver_t fsl_satach_driver = { - "fslsata", - fsl_satach_methods, - sizeof(struct fsl_sata_channel) -}; -DRIVER_MODULE(fsl_satach, simplebus, fsl_satach_driver, fsl_satach_devclass, NULL, NULL); - -struct fsl_sata_dc_cb_args { - bus_addr_t maddr; - int error; -}; - -static void -fsl_sata_dmainit(device_t dev) -{ - struct fsl_sata_channel *ch = device_get_softc(dev); - struct fsl_sata_dc_cb_args dcba; - - /* Command area. */ - if (bus_dma_tag_create(bus_get_dma_tag(dev), 1024, 0, - BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, - NULL, NULL, FSL_SATA_WORK_SIZE, 1, FSL_SATA_WORK_SIZE, - 0, NULL, NULL, &ch->dma.work_tag)) - goto error; - if (bus_dmamem_alloc(ch->dma.work_tag, (void **)&ch->dma.work, - BUS_DMA_ZERO, &ch->dma.work_map)) - goto error; - if (bus_dmamap_load(ch->dma.work_tag, ch->dma.work_map, ch->dma.work, - FSL_SATA_WORK_SIZE, fsl_sata_dmasetupc_cb, &dcba, 0) || dcba.error) { - bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); - goto error; - } - ch->dma.work_bus = dcba.maddr; - /* Data area. */ - if (bus_dma_tag_create(bus_get_dma_tag(dev), 4, 0, - BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, - NULL, NULL, FSL_SATA_MAX_XFER, - FSL_SATA_SG_ENTRIES - 1, FSL_SATA_PRD_MAX, - 0, busdma_lock_mutex, &ch->mtx, &ch->dma.data_tag)) { - goto error; - } - if (bootverbose) - device_printf(dev, "work area: %p\n", ch->dma.work); - return; - -error: - device_printf(dev, "WARNING - DMA initialization failed\n"); - fsl_sata_dmafini(dev); -} - -static void -fsl_sata_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) -{ - struct fsl_sata_dc_cb_args *dcba = (struct fsl_sata_dc_cb_args *)xsc; - - if (!(dcba->error = error)) - dcba->maddr = segs[0].ds_addr; -} - -static void -fsl_sata_dmafini(device_t dev) -{ - struct fsl_sata_channel *ch = device_get_softc(dev); - - if (ch->dma.data_tag) { - bus_dma_tag_destroy(ch->dma.data_tag); - ch->dma.data_tag = NULL; - } - if (ch->dma.work_bus) { - bus_dmamap_unload(ch->dma.work_tag, ch->dma.work_map); - bus_dmamem_free(ch->dma.work_tag, ch->dma.work, ch->dma.work_map); - ch->dma.work_bus = 0; - ch->dma.work = NULL; - } - if (ch->dma.work_tag) { - bus_dma_tag_destroy(ch->dma.work_tag); - ch->dma.work_tag = NULL; - } -} - -static void -fsl_sata_slotsalloc(device_t dev) -{ - struct fsl_sata_channel *ch = device_get_softc(dev); - int i; - - /* Alloc and setup command/dma slots */ - bzero(ch->slot, sizeof(ch->slot)); - for (i = 0; i < FSL_SATA_MAX_SLOTS; i++) { - struct fsl_sata_slot *slot = &ch->slot[i]; - - slot->ch = ch; - slot->slot = i; - slot->state = FSL_SATA_SLOT_EMPTY; - slot->ccb = NULL; - callout_init_mtx(&slot->timeout, &ch->mtx, 0); - - if (bus_dmamap_create(ch->dma.data_tag, 0, &slot->dma.data_map)) - device_printf(ch->dev, "FAILURE - create data_map\n"); - } -} - -static void -fsl_sata_slotsfree(device_t dev) -{ - struct fsl_sata_channel *ch = device_get_softc(dev); - int i; - - /* Free all dma slots */ - for (i = 0; i < FSL_SATA_MAX_SLOTS; i++) { - struct fsl_sata_slot *slot = &ch->slot[i]; - - callout_drain(&slot->timeout); - if (slot->dma.data_map) { - bus_dmamap_destroy(ch->dma.data_tag, slot->dma.data_map); - slot->dma.data_map = NULL; - } - } -} - -static int -fsl_sata_phy_check_events(struct fsl_sata_channel *ch, u_int32_t serr) -{ - - if (((ch->pm_level == 0) && (serr & ATA_SE_PHY_CHANGED)) || - ((ch->pm_level != 0) && (serr & ATA_SE_EXCHANGED))) { - u_int32_t status = ATA_INL(ch->r_mem, FSL_SATA_P_SSTS); - union ccb *ccb; - - if (bootverbose) { - if ((status & ATA_SS_DET_MASK) != ATA_SS_DET_NO_DEVICE) - device_printf(ch->dev, "CONNECT requested\n"); - else - device_printf(ch->dev, "DISCONNECT requested\n"); - } - /* Issue soft reset */ - xpt_async(AC_BUS_RESET, ch->path, NULL); - if ((ccb = xpt_alloc_ccb_nowait()) == NULL) - return (0); - if (xpt_create_path(&ccb->ccb_h.path, NULL, - cam_sim_path(ch->sim), - CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { - xpt_free_ccb(ccb); - return (0); - } - xpt_rescan(ccb); - return (1); - } - return (0); -} - -static void -fsl_sata_notify_events(struct fsl_sata_channel *ch, u_int32_t status) -{ - struct cam_path *dpath; - int i; - - ATA_OUTL(ch->r_mem, FSL_SATA_P_SNTF, status); - if (bootverbose) - device_printf(ch->dev, "SNTF 0x%04x\n", status); - for (i = 0; i < 16; i++) { - if ((status & (1 << i)) == 0) - continue; - if (xpt_create_path(&dpath, NULL, - xpt_path_path_id(ch->path), i, 0) == CAM_REQ_CMP) { - xpt_async(AC_SCSI_AEN, dpath, NULL); - xpt_free_path(dpath); - } - } -} - -static void -fsl_sata_done(struct fsl_sata_channel *ch, union ccb *ccb) -{ - - mtx_assert(&ch->mtx, MA_OWNED); - if ((ccb->ccb_h.func_code & XPT_FC_QUEUED) == 0 || - ch->batch == 0) { - xpt_done(ccb); - return; - } - - STAILQ_INSERT_TAIL(&ch->doneq, &ccb->ccb_h, sim_links.stqe); -} - -static void -fsl_sata_intr(void *arg) -{ - struct fsl_sata_channel *ch = (struct fsl_sata_channel *)arg; - struct ccb_hdr *ccb_h; - uint32_t istatus; - STAILQ_HEAD(, ccb_hdr) tmp_doneq = STAILQ_HEAD_INITIALIZER(tmp_doneq); - - /* Read interrupt statuses. */ - istatus = ATA_INL(ch->r_mem, FSL_SATA_P_HSTS) & 0x7ffff; - if ((istatus & 0x3f) == 0) - return; - - mtx_lock(&ch->mtx); - ch->batch = 1; - fsl_sata_intr_main(ch, istatus); - ch->batch = 0; - /* - * Prevent the possibility of issues caused by processing the queue - * while unlocked below by moving the contents to a local queue. - */ - STAILQ_CONCAT(&tmp_doneq, &ch->doneq); - mtx_unlock(&ch->mtx); - while ((ccb_h = STAILQ_FIRST(&tmp_doneq)) != NULL) { - STAILQ_REMOVE_HEAD(&tmp_doneq, sim_links.stqe); - xpt_done_direct((union ccb *)ccb_h); - } - /* Clear interrupt statuses. */ - ATA_OUTL(ch->r_mem, FSL_SATA_P_HSTS, istatus & 0x3f); - -} - -static void -fsl_sata_pm(void *arg) -{ - struct fsl_sata_channel *ch = (struct fsl_sata_channel *)arg; - uint32_t work; - - if (ch->numrslots != 0) - return; - work = ATA_INL(ch->r_mem, FSL_SATA_P_PCC) & ~FSL_SATA_PCC_LPB_EN; - if (ch->pm_level == 4) - work |= FSL_SATA_P_PCC_PARTIAL; - else - work |= FSL_SATA_P_PCC_SLUMBER; - ATA_OUTL(ch->r_mem, FSL_SATA_P_PCC, work); -} - -/* XXX: interrupt todo */ -static void -fsl_sata_intr_main(struct fsl_sata_channel *ch, uint32_t istatus) -{ - uint32_t cer, der, serr = 0, sntf = 0, ok, err; - enum fsl_sata_err_type et; - int i; - - /* Complete all successful commands. */ - ok = ATA_INL(ch->r_mem, FSL_SATA_P_CCR); - /* Mark all commands complete, to complete the interrupt. */ - ATA_OUTL(ch->r_mem, FSL_SATA_P_CCR, ok); - if (ch->aslots == 0 && ok != 0) { - for (i = 0; i < FSL_SATA_MAX_SLOTS; i++) { - if (((ok >> i) & 1) && ch->slot[i].ccb != NULL) - fsl_sata_end_transaction(&ch->slot[i], - FSL_SATA_ERR_NONE); - } - } - /* Read command statuses. */ - if (istatus & FSL_SATA_P_HSTS_SNTFU) - sntf = ATA_INL(ch->r_mem, FSL_SATA_P_SNTF); - /* XXX: Process PHY events */ - serr = ATA_INL(ch->r_mem, FSL_SATA_P_SERR); - ATA_OUTL(ch->r_mem, FSL_SATA_P_SERR, serr); - if (istatus & (FSL_SATA_P_HSTS_PR)) { - if (serr) { - fsl_sata_phy_check_events(ch, serr); - } - } - /* Process command errors */ - err = (istatus & (FSL_SATA_P_HSTS_FE | FSL_SATA_P_HSTS_DE)); - cer = ATA_INL(ch->r_mem, FSL_SATA_P_CER); - ATA_OUTL(ch->r_mem, FSL_SATA_P_CER, cer); - der = ATA_INL(ch->r_mem, FSL_SATA_P_DER); - ATA_OUTL(ch->r_mem, FSL_SATA_P_DER, der); - /* On error, complete the rest of commands with error statuses. */ - if (err) { - if (ch->frozen) { - union ccb *fccb = ch->frozen; - ch->frozen = NULL; - fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; - if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { - xpt_freeze_devq(fccb->ccb_h.path, 1); - fccb->ccb_h.status |= CAM_DEV_QFRZN; - } - fsl_sata_done(ch, fccb); - } - for (i = 0; i < FSL_SATA_MAX_SLOTS; i++) { - if (ch->slot[i].ccb == NULL) - continue; - if ((cer & (1 << i)) != 0) - et = FSL_SATA_ERR_TFE; - else if ((der & (1 << ch->slot[i].ccb->ccb_h.target_id)) != 0) - et = FSL_SATA_ERR_SATA; - else - et = FSL_SATA_ERR_INVALID; - fsl_sata_end_transaction(&ch->slot[i], et); - } - } - /* Process NOTIFY events */ - if (sntf) - fsl_sata_notify_events(ch, sntf); -} - -/* Must be called with channel locked. */ -static int -fsl_sata_check_collision(struct fsl_sata_channel *ch, union ccb *ccb) -{ - int t = ccb->ccb_h.target_id; - - if ((ccb->ccb_h.func_code == XPT_ATA_IO) && - (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { - /* Tagged command while we have no supported tag free. */ - if (((~ch->oslots) & (0xffff >> (16 - ch->curr[t].tags))) == 0) - return (1); - /* Tagged command while untagged are active. */ - if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] == 0) - return (1); - } else { - /* Untagged command while tagged are active. */ - if (ch->numrslotspd[t] != 0 && ch->numtslotspd[t] != 0) - return (1); - } - if ((ccb->ccb_h.func_code == XPT_ATA_IO) && - (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) { - /* Atomic command while anything active. */ - if (ch->numrslots != 0) - return (1); - } - /* We have some atomic command running. */ - if (ch->aslots != 0) - return (1); - return (0); -} - -/* Must be called with channel locked. */ -static void -fsl_sata_begin_transaction(struct fsl_sata_channel *ch, union ccb *ccb) -{ - struct fsl_sata_slot *slot; - int tag, tags; - - CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, - ("fsl_sata_begin_transaction func_code=0x%x\n", ccb->ccb_h.func_code)); - /* Choose empty slot. */ - tags = FSL_SATA_MAX_SLOTS; - if ((ccb->ccb_h.func_code == XPT_ATA_IO) && - (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) - tags = ch->curr[ccb->ccb_h.target_id].tags; - if (ch->lastslot + 1 < tags) - tag = ffs(~(ch->oslots >> (ch->lastslot + 1))); - else - tag = 0; - if (tag == 0 || tag + ch->lastslot >= tags) - tag = ffs(~ch->oslots) - 1; - else - tag += ch->lastslot; - ch->lastslot = tag; - /* Occupy chosen slot. */ - slot = &ch->slot[tag]; - slot->ccb = ccb; - slot->ttl = 0; - /* Stop PM timer. */ - if (ch->numrslots == 0 && ch->pm_level > 3) - callout_stop(&ch->pm_timer); - /* Update channel stats. */ - ch->oslots |= (1 << tag); - ch->numrslots++; - ch->numrslotspd[ccb->ccb_h.target_id]++; - if ((ccb->ccb_h.func_code == XPT_ATA_IO) && - (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { - ch->numtslots++; - ch->numtslotspd[ccb->ccb_h.target_id]++; - ch->taggedtarget = ccb->ccb_h.target_id; - } - if ((ccb->ccb_h.func_code == XPT_ATA_IO) && - (ccb->ataio.cmd.flags & (CAM_ATAIO_CONTROL | CAM_ATAIO_NEEDRESULT))) - ch->aslots |= (1 << tag); - if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { - slot->state = FSL_SATA_SLOT_LOADING; - bus_dmamap_load_ccb(ch->dma.data_tag, slot->dma.data_map, ccb, - fsl_sata_dmasetprd, slot, 0); - } else { - slot->dma.nsegs = 0; - fsl_sata_execute_transaction(slot); - } - - CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, - ("fsl_sata_begin_transaction exit\n")); -} - -/* Locked by busdma engine. */ -static void -fsl_sata_dmasetprd(void *arg, bus_dma_segment_t *segs, int nsegs, int error) -{ - struct fsl_sata_slot *slot = arg; - struct fsl_sata_channel *ch = slot->ch; - struct fsl_sata_cmd_tab *ctp; - struct fsl_sata_dma_prd *prd; - int i, j, len, extlen; - - if (error) { - device_printf(ch->dev, "DMA load error %d\n", error); - fsl_sata_end_transaction(slot, FSL_SATA_ERR_INVALID); - return; - } - KASSERT(nsegs <= FSL_SATA_SG_ENTRIES - 1, - ("too many DMA segment entries\n")); - /* Get a piece of the workspace for this request */ - ctp = FSL_SATA_CTP(ch, slot); - /* Fill S/G table */ - prd = &ctp->prd_tab[0]; - for (i = 0, j = 0; i < nsegs; i++, j++) { - if (j == FSL_SATA_PRD_EXT_INDEX && - FSL_SATA_PRD_MAX_DIRECT < nsegs) { - prd[j].dba = htole32(FSL_SATA_CTP_BUS(ch, slot) + - FSL_SATA_PRD_OFFSET(j+1)); - j++; - extlen = 0; - } - len = segs[i].ds_len; - len = roundup2(len, sizeof(uint32_t)); - prd[j].dba = htole32((uint32_t)segs[i].ds_addr); - prd[j].dwc_flg = htole32(FSL_SATA_PRD_SNOOP | len); - slot->ttl += len; - if (j > FSL_SATA_PRD_MAX_DIRECT) - extlen += len; - } - slot->dma.nsegs = j; - if (j > FSL_SATA_PRD_MAX_DIRECT) - prd[FSL_SATA_PRD_EXT_INDEX].dwc_flg = - htole32(FSL_SATA_PRD_SNOOP | FSL_SATA_PRD_EXT | extlen); - bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, - ((slot->ccb->ccb_h.flags & CAM_DIR_IN) ? - BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE)); - fsl_sata_execute_transaction(slot); -} - -/* Must be called with channel locked. */ -static void -fsl_sata_execute_transaction(struct fsl_sata_slot *slot) -{ - struct fsl_sata_channel *ch = slot->ch; - struct fsl_sata_cmd_tab *ctp; - struct fsl_sata_cmd_list *clp; - union ccb *ccb = slot->ccb; - int port = ccb->ccb_h.target_id & 0x0f; - int fis_size, i, softreset; - uint32_t tmp; - uint32_t cmd_flags = FSL_SATA_CMD_WRITE | FSL_SATA_CMD_SNOOP; - - softreset = 0; - CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, - ("fsl_sata_execute_transaction func_code=0x%x\n", ccb->ccb_h.func_code)); - /* Get a piece of the workspace for this request */ - ctp = FSL_SATA_CTP(ch, slot); - /* Setup the FIS for this request */ - if (!(fis_size = fsl_sata_setup_fis(ch, ctp, ccb, slot->slot))) { - device_printf(ch->dev, "Setting up SATA FIS failed\n"); - fsl_sata_end_transaction(slot, FSL_SATA_ERR_INVALID); - return; - } - /* Setup the command list entry */ - clp = FSL_SATA_CLP(ch, slot); - clp->fis_length = htole16(fis_size); - clp->prd_length = htole16(slot->dma.nsegs); - /* Special handling for Soft Reset command. */ - if ((ccb->ccb_h.func_code == XPT_ATA_IO) && - (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL)) { - if (ccb->ataio.cmd.control & ATA_A_RESET) { - softreset = 1; - cmd_flags |= FSL_SATA_CMD_RESET; - } else { - /* Prepare FIS receive area for check. */ - for (i = 0; i < 32; i++) - ctp->sfis[i] = 0xff; - softreset = 2; - } - } - if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) - cmd_flags |= FSL_SATA_CMD_QUEUED; - clp->cmd_flags = htole32(cmd_flags | - (ccb->ccb_h.func_code == XPT_SCSI_IO ? FSL_SATA_CMD_ATAPI : 0) | - slot->slot); - clp->ttl = htole32(slot->ttl); - clp->cda = htole32(FSL_SATA_CTP_BUS(ch, slot)); - bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, - BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); - /* Issue command to the controller. */ - slot->state = FSL_SATA_SLOT_RUNNING; - ch->rslots |= (1 << slot->slot); - ATA_OUTL(ch->r_mem, FSL_SATA_P_CQPMP, port); - ATA_OUTL(ch->r_mem, FSL_SATA_P_CQR, (1 << slot->slot)); - /* Device reset commands don't interrupt. Poll them. */ - if (ccb->ccb_h.func_code == XPT_ATA_IO && - (ccb->ataio.cmd.command == ATA_DEVICE_RESET || softreset)) { - int count, timeout = ccb->ccb_h.timeout * 100; - enum fsl_sata_err_type et = FSL_SATA_ERR_NONE; - - for (count = 0; count < timeout; count++) { - DELAY(10); - tmp = 0; - if (softreset == 2) { - tmp = ATA_INL(ch->r_mem, FSL_SATA_P_SIG); - if (tmp != 0 && tmp != 0xffffffff) - break; - continue; - } - if ((ATA_INL(ch->r_mem, FSL_SATA_P_CCR) & (1 << slot->slot)) != 0) - break; - } - - if (timeout && (count >= timeout)) { - device_printf(ch->dev, "Poll timeout on slot %d port %d (round %d)\n", - slot->slot, port, softreset); - device_printf(ch->dev, "hsts %08x cqr %08x ccr %08x ss %08x " - "rs %08x cer %08x der %08x serr %08x car %08x sig %08x\n", - ATA_INL(ch->r_mem, FSL_SATA_P_HSTS), - ATA_INL(ch->r_mem, FSL_SATA_P_CQR), - ATA_INL(ch->r_mem, FSL_SATA_P_CCR), - ATA_INL(ch->r_mem, FSL_SATA_P_SSTS), ch->rslots, - ATA_INL(ch->r_mem, FSL_SATA_P_CER), - ATA_INL(ch->r_mem, FSL_SATA_P_DER), - ATA_INL(ch->r_mem, FSL_SATA_P_SERR), - ATA_INL(ch->r_mem, FSL_SATA_P_CAR), - ATA_INL(ch->r_mem, FSL_SATA_P_SIG)); - et = FSL_SATA_ERR_TIMEOUT; - } - - fsl_sata_end_transaction(slot, et); - return; - } - /* Start command execution timeout */ - callout_reset_sbt(&slot->timeout, SBT_1MS * ccb->ccb_h.timeout / 2, - 0, fsl_sata_timeout, slot, 0); - return; -} - -/* Must be called with channel locked. */ -static void -fsl_sata_process_timeout(struct fsl_sata_channel *ch) -{ - int i; - - mtx_assert(&ch->mtx, MA_OWNED); - /* Handle the rest of commands. */ - for (i = 0; i < FSL_SATA_MAX_SLOTS; i++) { - /* Do we have a running request on slot? */ - if (ch->slot[i].state < FSL_SATA_SLOT_RUNNING) - continue; - fsl_sata_end_transaction(&ch->slot[i], FSL_SATA_ERR_TIMEOUT); - } -} - -/* Must be called with channel locked. */ -static void -fsl_sata_rearm_timeout(struct fsl_sata_channel *ch) -{ - int i; - - mtx_assert(&ch->mtx, MA_OWNED); - for (i = 0; i < FSL_SATA_MAX_SLOTS; i++) { - struct fsl_sata_slot *slot = &ch->slot[i]; - - /* Do we have a running request on slot? */ - if (slot->state < FSL_SATA_SLOT_RUNNING) - continue; - if ((ch->toslots & (1 << i)) == 0) - continue; - callout_reset_sbt(&slot->timeout, - SBT_1MS * slot->ccb->ccb_h.timeout / 2, 0, - fsl_sata_timeout, slot, 0); - } -} - -/* Locked by callout mechanism. */ -static void -fsl_sata_timeout(void *arg) -{ - struct fsl_sata_slot *slot = arg; - struct fsl_sata_channel *ch = slot->ch; - device_t dev = ch->dev; - uint32_t sstatus; - - /* Check for stale timeout. */ - if (slot->state < FSL_SATA_SLOT_RUNNING) - return; - - /* Check if slot was not being executed last time we checked. */ - if (slot->state < FSL_SATA_SLOT_EXECUTING) { - /* Check if slot started executing. */ - sstatus = ATA_INL(ch->r_mem, FSL_SATA_P_CAR); - if ((sstatus & (1 << slot->slot)) != 0) - slot->state = FSL_SATA_SLOT_EXECUTING; - - callout_reset_sbt(&slot->timeout, - SBT_1MS * slot->ccb->ccb_h.timeout / 2, 0, - fsl_sata_timeout, slot, 0); - return; - } - - device_printf(dev, "Timeout on slot %d port %d\n", - slot->slot, slot->ccb->ccb_h.target_id & 0x0f); - - /* Handle frozen command. */ - if (ch->frozen) { - union ccb *fccb = ch->frozen; - ch->frozen = NULL; - fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; - if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { - xpt_freeze_devq(fccb->ccb_h.path, 1); - fccb->ccb_h.status |= CAM_DEV_QFRZN; - } - fsl_sata_done(ch, fccb); - } - if (ch->toslots == 0) - xpt_freeze_simq(ch->sim, 1); - ch->toslots |= (1 << slot->slot); - if ((ch->rslots & ~ch->toslots) == 0) - fsl_sata_process_timeout(ch); - else - device_printf(dev, " ... waiting for slots %08x\n", - ch->rslots & ~ch->toslots); -} - -/* Must be called with channel locked. */ -static void -fsl_sata_end_transaction(struct fsl_sata_slot *slot, enum fsl_sata_err_type et) -{ - struct fsl_sata_channel *ch = slot->ch; - union ccb *ccb = slot->ccb; - struct fsl_sata_cmd_list *clp; - int lastto; - uint32_t sig; - - bus_dmamap_sync(ch->dma.work_tag, ch->dma.work_map, - BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); - clp = FSL_SATA_CLP(ch, slot); - /* Read result registers to the result struct */ - if (ccb->ccb_h.func_code == XPT_ATA_IO) { - struct ata_res *res = &ccb->ataio.res; - - if ((et == FSL_SATA_ERR_TFE) || - (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)) { - struct fsl_sata_cmd_tab *ctp = FSL_SATA_CTP(ch, slot); - uint8_t *fis = ctp->sfis; - - res->status = fis[2]; - res->error = fis[3]; - res->lba_low = fis[4]; - res->lba_mid = fis[5]; - res->lba_high = fis[6]; - res->device = fis[7]; - res->lba_low_exp = fis[8]; - res->lba_mid_exp = fis[9]; - res->lba_high_exp = fis[10]; - res->sector_count = fis[12]; - res->sector_count_exp = fis[13]; - - if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && - (ccb->ataio.cmd.control & ATA_A_RESET) == 0) { - sig = ATA_INL(ch->r_mem, FSL_SATA_P_SIG); - res->lba_high = sig >> 24; - res->lba_mid = sig >> 16; - res->lba_low = sig >> 8; - res->sector_count = sig; - } - } else - bzero(res, sizeof(*res)); - if ((ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) == 0 && - (ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { - ccb->ataio.resid = - ccb->ataio.dxfer_len - le32toh(clp->ttl); - } - } else { - if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { - ccb->csio.resid = - ccb->csio.dxfer_len - le32toh(clp->ttl); - } - } - if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { - bus_dmamap_sync(ch->dma.data_tag, slot->dma.data_map, - (ccb->ccb_h.flags & CAM_DIR_IN) ? - BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); - bus_dmamap_unload(ch->dma.data_tag, slot->dma.data_map); - } - if (et != FSL_SATA_ERR_NONE) - ch->eslots |= (1 << slot->slot); - /* In case of error, freeze device for proper recovery. */ - if ((et != FSL_SATA_ERR_NONE) && (!ch->recoverycmd) && - !(ccb->ccb_h.status & CAM_DEV_QFRZN)) { - xpt_freeze_devq(ccb->ccb_h.path, 1); - ccb->ccb_h.status |= CAM_DEV_QFRZN; - } - /* Set proper result status. */ - ccb->ccb_h.status &= ~CAM_STATUS_MASK; - switch (et) { - case FSL_SATA_ERR_NONE: - ccb->ccb_h.status |= CAM_REQ_CMP; - if (ccb->ccb_h.func_code == XPT_SCSI_IO) - ccb->csio.scsi_status = SCSI_STATUS_OK; - break; - case FSL_SATA_ERR_INVALID: - ch->fatalerr = 1; - ccb->ccb_h.status |= CAM_REQ_INVALID; - break; - case FSL_SATA_ERR_INNOCENT: - ccb->ccb_h.status |= CAM_REQUEUE_REQ; - break; - case FSL_SATA_ERR_TFE: - case FSL_SATA_ERR_NCQ: - if (ccb->ccb_h.func_code == XPT_SCSI_IO) { - ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; - ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; - } else { - ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR; - } - break; - case FSL_SATA_ERR_SATA: - ch->fatalerr = 1; - if (!ch->recoverycmd) { - xpt_freeze_simq(ch->sim, 1); - ccb->ccb_h.status &= ~CAM_STATUS_MASK; - ccb->ccb_h.status |= CAM_RELEASE_SIMQ; - } - ccb->ccb_h.status |= CAM_UNCOR_PARITY; - break; - case FSL_SATA_ERR_TIMEOUT: - if (!ch->recoverycmd) { - xpt_freeze_simq(ch->sim, 1); - ccb->ccb_h.status &= ~CAM_STATUS_MASK; - ccb->ccb_h.status |= CAM_RELEASE_SIMQ; - } - ccb->ccb_h.status |= CAM_CMD_TIMEOUT; - break; - default: - ch->fatalerr = 1; - ccb->ccb_h.status |= CAM_REQ_CMP_ERR; - } - /* Free slot. */ - ch->oslots &= ~(1 << slot->slot); - ch->rslots &= ~(1 << slot->slot); - ch->aslots &= ~(1 << slot->slot); - slot->state = FSL_SATA_SLOT_EMPTY; - slot->ccb = NULL; - /* Update channel stats. */ - ch->numrslots--; - ch->numrslotspd[ccb->ccb_h.target_id]--; - ATA_OUTL(ch->r_mem, FSL_SATA_P_CCR, 1 << slot->slot); - if ((ccb->ccb_h.func_code == XPT_ATA_IO) && - (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA)) { - ch->numtslots--; - ch->numtslotspd[ccb->ccb_h.target_id]--; - } - /* Cancel timeout state if request completed normally. */ - if (et != FSL_SATA_ERR_TIMEOUT) { - lastto = (ch->toslots == (1 << slot->slot)); - ch->toslots &= ~(1 << slot->slot); - if (lastto) - xpt_release_simq(ch->sim, TRUE); - } - /* If it was first request of reset sequence and there is no error, - * proceed to second request. */ - if ((ccb->ccb_h.func_code == XPT_ATA_IO) && - (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) && - (ccb->ataio.cmd.control & ATA_A_RESET) && - et == FSL_SATA_ERR_NONE) { - ccb->ataio.cmd.control &= ~ATA_A_RESET; - fsl_sata_begin_transaction(ch, ccb); - return; - } - /* If it was our READ LOG command - process it. */ - if (ccb->ccb_h.recovery_type == RECOVERY_READ_LOG) { - fsl_sata_process_read_log(ch, ccb); - /* If it was our REQUEST SENSE command - process it. */ - } else if (ccb->ccb_h.recovery_type == RECOVERY_REQUEST_SENSE) { - fsl_sata_process_request_sense(ch, ccb); - /* If it was NCQ or ATAPI command error, put result on hold. */ - } else if (et == FSL_SATA_ERR_NCQ || - ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_SCSI_STATUS_ERROR && - (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0)) { - ch->hold[slot->slot] = ccb; - ch->numhslots++; - } else - fsl_sata_done(ch, ccb); - /* If we have no other active commands, ... */ - if (ch->rslots == 0) { - /* if there was fatal error - reset port. */ - if (ch->toslots != 0 || ch->fatalerr) { - fsl_sata_reset(ch); - } else { - /* if we have slots in error, we can reinit port. */ - if (ch->eslots != 0) { - fsl_sata_stop(ch); - fsl_sata_start(ch); - } - /* if there commands on hold, we can do READ LOG. */ - if (!ch->recoverycmd && ch->numhslots) - fsl_sata_issue_recovery(ch); - } - /* If all the rest of commands are in timeout - give them chance. */ - } else if ((ch->rslots & ~ch->toslots) == 0 && - et != FSL_SATA_ERR_TIMEOUT) - fsl_sata_rearm_timeout(ch); - /* Unfreeze frozen command. */ - if (ch->frozen && !fsl_sata_check_collision(ch, ch->frozen)) { - union ccb *fccb = ch->frozen; - ch->frozen = NULL; - fsl_sata_begin_transaction(ch, fccb); - xpt_release_simq(ch->sim, TRUE); - } - /* Start PM timer. */ - if (ch->numrslots == 0 && ch->pm_level > 3 && - (ch->curr[ch->pm_present ? 15 : 0].caps & CTS_SATA_CAPS_D_PMREQ)) { - callout_schedule(&ch->pm_timer, - (ch->pm_level == 4) ? hz / 1000 : hz / 8); - } -} - -static void -fsl_sata_issue_recovery(struct fsl_sata_channel *ch) -{ - union ccb *ccb; - struct ccb_ataio *ataio; - struct ccb_scsiio *csio; - int i; - - /* Find some held command. */ - for (i = 0; i < FSL_SATA_MAX_SLOTS; i++) { - if (ch->hold[i]) - break; - } - ccb = xpt_alloc_ccb_nowait(); - if (ccb == NULL) { - device_printf(ch->dev, "Unable to allocate recovery command\n"); -completeall: - /* We can't do anything -- complete held commands. */ - for (i = 0; i < FSL_SATA_MAX_SLOTS; i++) { - if (ch->hold[i] == NULL) - continue; - ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; - ch->hold[i]->ccb_h.status |= CAM_RESRC_UNAVAIL; - fsl_sata_done(ch, ch->hold[i]); - ch->hold[i] = NULL; - ch->numhslots--; - } - fsl_sata_reset(ch); - return; - } - ccb->ccb_h = ch->hold[i]->ccb_h; /* Reuse old header. */ - if (ccb->ccb_h.func_code == XPT_ATA_IO) { - /* READ LOG */ - ccb->ccb_h.recovery_type = RECOVERY_READ_LOG; - ccb->ccb_h.func_code = XPT_ATA_IO; - ccb->ccb_h.flags = CAM_DIR_IN; - ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ - ataio = &ccb->ataio; - ataio->data_ptr = malloc(512, M_FSL_SATA, M_NOWAIT); - if (ataio->data_ptr == NULL) { - xpt_free_ccb(ccb); - device_printf(ch->dev, - "Unable to allocate memory for READ LOG command\n"); - goto completeall; - } - ataio->dxfer_len = 512; - bzero(&ataio->cmd, sizeof(ataio->cmd)); - ataio->cmd.flags = CAM_ATAIO_48BIT; - ataio->cmd.command = 0x2F; /* READ LOG EXT */ - ataio->cmd.sector_count = 1; - ataio->cmd.sector_count_exp = 0; - ataio->cmd.lba_low = 0x10; - ataio->cmd.lba_mid = 0; - ataio->cmd.lba_mid_exp = 0; - } else { - /* REQUEST SENSE */ - ccb->ccb_h.recovery_type = RECOVERY_REQUEST_SENSE; - ccb->ccb_h.recovery_slot = i; - ccb->ccb_h.func_code = XPT_SCSI_IO; - ccb->ccb_h.flags = CAM_DIR_IN; - ccb->ccb_h.status = 0; - ccb->ccb_h.timeout = 1000; /* 1s should be enough. */ - csio = &ccb->csio; - csio->data_ptr = (void *)&ch->hold[i]->csio.sense_data; - csio->dxfer_len = ch->hold[i]->csio.sense_len; - csio->cdb_len = 6; - bzero(&csio->cdb_io, sizeof(csio->cdb_io)); - csio->cdb_io.cdb_bytes[0] = 0x03; - csio->cdb_io.cdb_bytes[4] = csio->dxfer_len; - } - /* Freeze SIM while doing recovery. */ - ch->recoverycmd = 1; - xpt_freeze_simq(ch->sim, 1); - fsl_sata_begin_transaction(ch, ccb); -} - -static void -fsl_sata_process_read_log(struct fsl_sata_channel *ch, union ccb *ccb) -{ - uint8_t *data; - struct ata_res *res; - int i; - - ch->recoverycmd = 0; - - data = ccb->ataio.data_ptr; - if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP && - (data[0] & 0x80) == 0) { - for (i = 0; i < FSL_SATA_MAX_SLOTS; i++) { - if (!ch->hold[i]) - continue; - if (ch->hold[i]->ccb_h.func_code != XPT_ATA_IO) - continue; - if ((data[0] & 0x1F) == i) { - res = &ch->hold[i]->ataio.res; - res->status = data[2]; - res->error = data[3]; - res->lba_low = data[4]; - res->lba_mid = data[5]; - res->lba_high = data[6]; - res->device = data[7]; - res->lba_low_exp = data[8]; - res->lba_mid_exp = data[9]; - res->lba_high_exp = data[10]; - res->sector_count = data[12]; - res->sector_count_exp = data[13]; - } else { - ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; - ch->hold[i]->ccb_h.status |= CAM_REQUEUE_REQ; - } - fsl_sata_done(ch, ch->hold[i]); - ch->hold[i] = NULL; - ch->numhslots--; - } - } else { - if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) - device_printf(ch->dev, "Error while READ LOG EXT\n"); - else if ((data[0] & 0x80) == 0) { - device_printf(ch->dev, "Non-queued command error in READ LOG EXT\n"); - } - for (i = 0; i < FSL_SATA_MAX_SLOTS; i++) { - if (!ch->hold[i]) - continue; - if (ch->hold[i]->ccb_h.func_code != XPT_ATA_IO) - continue; - fsl_sata_done(ch, ch->hold[i]); - ch->hold[i] = NULL; - ch->numhslots--; - } - } - free(ccb->ataio.data_ptr, M_FSL_SATA); - xpt_free_ccb(ccb); - xpt_release_simq(ch->sim, TRUE); -} - -static void -fsl_sata_process_request_sense(struct fsl_sata_channel *ch, union ccb *ccb) -{ - int i; - - ch->recoverycmd = 0; - - i = ccb->ccb_h.recovery_slot; - if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP) { - ch->hold[i]->ccb_h.status |= CAM_AUTOSNS_VALID; - } else { - ch->hold[i]->ccb_h.status &= ~CAM_STATUS_MASK; - ch->hold[i]->ccb_h.status |= CAM_AUTOSENSE_FAIL; - } - fsl_sata_done(ch, ch->hold[i]); - ch->hold[i] = NULL; - ch->numhslots--; - xpt_free_ccb(ccb); - xpt_release_simq(ch->sim, TRUE); -} - -static void -fsl_sata_start(struct fsl_sata_channel *ch) -{ - u_int32_t cmd; - - /* Clear SATA error register */ - ATA_OUTL(ch->r_mem, FSL_SATA_P_SERR, 0xFFFFFFFF); - /* Clear any interrupts pending on this channel */ - ATA_OUTL(ch->r_mem, FSL_SATA_P_HSTS, 0x3F); - ATA_OUTL(ch->r_mem, FSL_SATA_P_CER, 0xFFFF); - ATA_OUTL(ch->r_mem, FSL_SATA_P_DER, 0xFFFF); - /* Start operations on this channel */ - cmd = ATA_INL(ch->r_mem, FSL_SATA_P_HCTRL); - cmd |= FSL_SATA_P_HCTRL_HC_ON | FSL_SATA_P_HCTRL_SNOOP; - cmd &= ~FSL_SATA_P_HCTRL_HC_FORCE_OFF; - ATA_OUTL(ch->r_mem, FSL_SATA_P_HCTRL, cmd | - (ch->pm_present ? FSL_SATA_P_HCTRL_PM : 0)); - fsl_sata_wait_register(ch, FSL_SATA_P_HSTS, - FSL_SATA_P_HSTS_PR, FSL_SATA_P_HSTS_PR, 500); - ATA_OUTL(ch->r_mem, FSL_SATA_P_HSTS, - ATA_INL(ch->r_mem, FSL_SATA_P_HSTS) & FSL_SATA_P_HSTS_PR); -} - -static void -fsl_sata_stop(struct fsl_sata_channel *ch) -{ - uint32_t cmd; - int i; - - /* Kill all activity on this channel */ - cmd = ATA_INL(ch->r_mem, FSL_SATA_P_HCTRL); - cmd &= ~FSL_SATA_P_HCTRL_HC_ON; - - for (i = 0; i < 2; i++) { - ATA_OUTL(ch->r_mem, FSL_SATA_P_HCTRL, cmd); - if (fsl_sata_wait_register(ch, FSL_SATA_P_HSTS, - FSL_SATA_P_HSTS_HS_ON, 0, 500)) { - if (i != 0) - device_printf(ch->dev, - "stopping FSL SATA engine failed\n"); - cmd |= FSL_SATA_P_HCTRL_HC_FORCE_OFF; - } else - break; - } - ch->eslots = 0; -} - -static void -fsl_sata_reset(struct fsl_sata_channel *ch) -{ - uint32_t ctrl; - int i; - - xpt_freeze_simq(ch->sim, 1); - if (bootverbose) - device_printf(ch->dev, "FSL SATA reset...\n"); - - /* Requeue freezed command. */ - if (ch->frozen) { - union ccb *fccb = ch->frozen; - ch->frozen = NULL; - fccb->ccb_h.status = CAM_REQUEUE_REQ | CAM_RELEASE_SIMQ; - if (!(fccb->ccb_h.status & CAM_DEV_QFRZN)) { - xpt_freeze_devq(fccb->ccb_h.path, 1); - fccb->ccb_h.status |= CAM_DEV_QFRZN; - } - fsl_sata_done(ch, fccb); - } - /* Kill the engine and requeue all running commands. */ - fsl_sata_stop(ch); - DELAY(1000); /* sleep for 1ms */ - for (i = 0; i < FSL_SATA_MAX_SLOTS; i++) { - /* Do we have a running request on slot? */ - if (ch->slot[i].state < FSL_SATA_SLOT_RUNNING) - continue; - /* XXX; Commands in loading state. */ - fsl_sata_end_transaction(&ch->slot[i], FSL_SATA_ERR_INNOCENT); - } - for (i = 0; i < FSL_SATA_MAX_SLOTS; i++) { - if (!ch->hold[i]) - continue; - fsl_sata_done(ch, ch->hold[i]); - ch->hold[i] = NULL; - ch->numhslots--; - } - if (ch->toslots != 0) - xpt_release_simq(ch->sim, TRUE); - ch->eslots = 0; - ch->toslots = 0; - ch->fatalerr = 0; - /* Tell the XPT about the event */ - xpt_async(AC_BUS_RESET, ch->path, NULL); - /* Disable port interrupts */ - ATA_OUTL(ch->r_mem, FSL_SATA_P_HCTRL, - ATA_INL(ch->r_mem, FSL_SATA_P_HCTRL) & ~0x3f); - /* Reset and reconnect PHY, */ - fsl_sata_start(ch); - if (fsl_sata_wait_register(ch, FSL_SATA_P_HSTS, 0x08, 0x08, 500)) { - if (bootverbose) - device_printf(ch->dev, - "FSL SATA reset: device not found\n"); - ch->devices = 0; - /* Enable wanted port interrupts */ - ATA_OUTL(ch->r_mem, FSL_SATA_P_HCTRL, - ATA_INL(ch->r_mem, FSL_SATA_P_HCTRL) | FSL_SATA_P_HCTRL_PHYRDY); - xpt_release_simq(ch->sim, TRUE); - return; - } - if (bootverbose) - device_printf(ch->dev, "FSL SATA reset: device found\n"); - ch->devices = 1; - /* Enable wanted port interrupts */ - ctrl = ATA_INL(ch->r_mem, FSL_SATA_P_HCTRL) & ~0x3f; - ATA_OUTL(ch->r_mem, FSL_SATA_P_HCTRL, - ctrl | FSL_SATA_P_HCTRL_FATAL | FSL_SATA_P_HCTRL_PHYRDY | - FSL_SATA_P_HCTRL_SIG | FSL_SATA_P_HCTRL_SNTFY | - FSL_SATA_P_HCTRL_DE | FSL_SATA_P_HCTRL_CC); - xpt_release_simq(ch->sim, TRUE); -} - -static int -fsl_sata_setup_fis(struct fsl_sata_channel *ch, struct fsl_sata_cmd_tab *ctp, union ccb *ccb, int tag) -{ - uint8_t *fis = &ctp->cfis[0]; - - bzero(fis, 32); - fis[0] = 0x27; /* host to device */ - fis[1] = (ccb->ccb_h.target_id & 0x0f); - if (ccb->ccb_h.func_code == XPT_SCSI_IO) { - fis[1] |= 0x80; - fis[2] = ATA_PACKET_CMD; - if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE && - ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA) - fis[3] = ATA_F_DMA; - else { - fis[5] = ccb->csio.dxfer_len; - fis[6] = ccb->csio.dxfer_len >> 8; - } - fis[7] = ATA_D_LBA; - fis[15] = ATA_A_4BIT; - bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ? - ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes, - ctp->acmd, ccb->csio.cdb_len); - bzero(ctp->acmd + ccb->csio.cdb_len, 32 - ccb->csio.cdb_len); - } else if ((ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) == 0) { - fis[1] |= 0x80; - fis[2] = ccb->ataio.cmd.command; - fis[3] = ccb->ataio.cmd.features; - fis[4] = ccb->ataio.cmd.lba_low; - fis[5] = ccb->ataio.cmd.lba_mid; - fis[6] = ccb->ataio.cmd.lba_high; - fis[7] = ccb->ataio.cmd.device; - fis[8] = ccb->ataio.cmd.lba_low_exp; - fis[9] = ccb->ataio.cmd.lba_mid_exp; - fis[10] = ccb->ataio.cmd.lba_high_exp; - fis[11] = ccb->ataio.cmd.features_exp; - if (ccb->ataio.cmd.flags & CAM_ATAIO_FPDMA) { - fis[12] = tag << 3; - fis[13] = 0; - } else { - fis[12] = ccb->ataio.cmd.sector_count; - fis[13] = ccb->ataio.cmd.sector_count_exp; - } - fis[15] = ATA_A_4BIT; - } else { - fis[15] = ccb->ataio.cmd.control; - } - return (20); -} - -static int -fsl_sata_check_ids(struct fsl_sata_channel *ch, union ccb *ccb) -{ - - if (ccb->ccb_h.target_id > 15) { - ccb->ccb_h.status = CAM_TID_INVALID; - fsl_sata_done(ch, ccb); - return (-1); - } - if (ccb->ccb_h.target_lun != 0) { - ccb->ccb_h.status = CAM_LUN_INVALID; - fsl_sata_done(ch, ccb); - return (-1); - } - return (0); -} - -static void -fsl_sataaction(struct cam_sim *sim, union ccb *ccb) -{ - struct fsl_sata_channel *ch; - - CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, - ("fsl_sataaction func_code=0x%x\n", ccb->ccb_h.func_code)); - - ch = (struct fsl_sata_channel *)cam_sim_softc(sim); - switch (ccb->ccb_h.func_code) { - /* Common cases first */ - case XPT_ATA_IO: /* Execute the requested I/O operation */ - case XPT_SCSI_IO: - if (fsl_sata_check_ids(ch, ccb)) - return; - if (ch->devices == 0 || - (ch->pm_present == 0 && - ccb->ccb_h.target_id > 0 && ccb->ccb_h.target_id < 15)) { - ccb->ccb_h.status = CAM_SEL_TIMEOUT; - break; - } - ccb->ccb_h.recovery_type = RECOVERY_NONE; - /* Check for command collision. */ - if (fsl_sata_check_collision(ch, ccb)) { - /* Freeze command. */ - ch->frozen = ccb; - /* We have only one frozen slot, so freeze simq also. */ - xpt_freeze_simq(ch->sim, 1); - return; - } - fsl_sata_begin_transaction(ch, ccb); - return; - case XPT_ABORT: /* Abort the specified CCB */ - /* XXX Implement */ - ccb->ccb_h.status = CAM_REQ_INVALID; - break; - case XPT_SET_TRAN_SETTINGS: - { - struct ccb_trans_settings *cts = &ccb->cts; - struct fsl_sata_device *d; - - if (fsl_sata_check_ids(ch, ccb)) - return; - if (cts->type == CTS_TYPE_CURRENT_SETTINGS) - d = &ch->curr[ccb->ccb_h.target_id]; - else - d = &ch->user[ccb->ccb_h.target_id]; - if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION) - d->revision = cts->xport_specific.sata.revision; - if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) - d->mode = cts->xport_specific.sata.mode; - if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT) - d->bytecount = min(8192, cts->xport_specific.sata.bytecount); - if (cts->xport_specific.sata.valid & CTS_SATA_VALID_TAGS) - d->tags = min(FSL_SATA_MAX_SLOTS, cts->xport_specific.sata.tags); - if (cts->xport_specific.sata.valid & CTS_SATA_VALID_PM) - ch->pm_present = cts->xport_specific.sata.pm_present; - if (cts->xport_specific.sata.valid & CTS_SATA_VALID_ATAPI) - d->atapi = cts->xport_specific.sata.atapi; - ccb->ccb_h.status = CAM_REQ_CMP; - break; - } - case XPT_GET_TRAN_SETTINGS: - /* Get default/user set transfer settings for the target */ - { - struct ccb_trans_settings *cts = &ccb->cts; - struct fsl_sata_device *d; - uint32_t status; - - if (fsl_sata_check_ids(ch, ccb)) - return; - if (cts->type == CTS_TYPE_CURRENT_SETTINGS) - d = &ch->curr[ccb->ccb_h.target_id]; - else - d = &ch->user[ccb->ccb_h.target_id]; - cts->protocol = PROTO_UNSPECIFIED; - cts->protocol_version = PROTO_VERSION_UNSPECIFIED; - cts->transport = XPORT_SATA; - cts->transport_version = XPORT_VERSION_UNSPECIFIED; - cts->proto_specific.valid = 0; - cts->xport_specific.sata.valid = 0; - if (cts->type == CTS_TYPE_CURRENT_SETTINGS && - (ccb->ccb_h.target_id == 15 || - (ccb->ccb_h.target_id == 0 && !ch->pm_present))) { - status = ATA_INL(ch->r_mem, FSL_SATA_P_SSTS) & ATA_SS_SPD_MASK; - if (status & 0x0f0) { - cts->xport_specific.sata.revision = - (status & 0x0f0) >> 4; - cts->xport_specific.sata.valid |= - CTS_SATA_VALID_REVISION; - } - cts->xport_specific.sata.caps = d->caps & CTS_SATA_CAPS_D; - if (ch->pm_level) { - cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_PMREQ; - } - cts->xport_specific.sata.caps |= CTS_SATA_CAPS_H_AN; - cts->xport_specific.sata.caps &= - ch->user[ccb->ccb_h.target_id].caps; - cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; - } else { - cts->xport_specific.sata.revision = d->revision; - cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION; - cts->xport_specific.sata.caps = d->caps; - cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS; - } - cts->xport_specific.sata.mode = d->mode; - cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE; - cts->xport_specific.sata.bytecount = d->bytecount; - cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT; - cts->xport_specific.sata.pm_present = ch->pm_present; - cts->xport_specific.sata.valid |= CTS_SATA_VALID_PM; - cts->xport_specific.sata.tags = d->tags; - cts->xport_specific.sata.valid |= CTS_SATA_VALID_TAGS; - cts->xport_specific.sata.atapi = d->atapi; - cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI; - ccb->ccb_h.status = CAM_REQ_CMP; - break; - } - case XPT_RESET_BUS: /* Reset the specified SCSI bus */ - case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ - fsl_sata_reset(ch); - ccb->ccb_h.status = CAM_REQ_CMP; - break; - case XPT_TERM_IO: /* Terminate the I/O process */ - /* XXX Implement */ - ccb->ccb_h.status = CAM_REQ_INVALID; - break; - case XPT_PATH_INQ: /* Path routing inquiry */ - { - struct ccb_pathinq *cpi = &ccb->cpi; - - cpi->version_num = 1; /* XXX??? */ - cpi->hba_inquiry = PI_SDTR_ABLE; - cpi->hba_inquiry |= PI_TAG_ABLE; -#if 0 - /* - * XXX: CAM tries to reset port 15 if it sees port multiplier - * support. Disable it for now. - */ - cpi->hba_inquiry |= PI_SATAPM; -#endif - cpi->target_sprt = 0; - cpi->hba_misc = PIM_SEQSCAN | PIM_UNMAPPED; - cpi->hba_eng_cnt = 0; - /* - * XXX: This should be 15, since hardware *does* support a port - * multiplier. See above. - */ - cpi->max_target = 0; - cpi->max_lun = 0; - cpi->initiator_id = 0; - cpi->bus_id = cam_sim_bus(sim); - cpi->base_transfer_speed = 150000; - strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); - strncpy(cpi->hba_vid, "FSL SATA", HBA_IDLEN); - strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); - cpi->unit_number = cam_sim_unit(sim); - cpi->transport = XPORT_SATA; - cpi->transport_version = XPORT_VERSION_UNSPECIFIED; - cpi->protocol = PROTO_ATA; - cpi->protocol_version = PROTO_VERSION_UNSPECIFIED; - cpi->maxio = maxphys; - cpi->ccb_h.status = CAM_REQ_CMP; - break; - } - default: - ccb->ccb_h.status = CAM_REQ_INVALID; - break; - } - fsl_sata_done(ch, ccb); -} - -static void -fsl_satapoll(struct cam_sim *sim) -{ - struct fsl_sata_channel *ch = (struct fsl_sata_channel *)cam_sim_softc(sim); - uint32_t istatus; - - /* Read interrupt statuses and process if any. */ - istatus = ATA_INL(ch->r_mem, FSL_SATA_P_HSTS); - if (istatus != 0) - fsl_sata_intr_main(ch, istatus); -} -MODULE_VERSION(fsl_sata, 1); -MODULE_DEPEND(fsl_sata, cam, 1, 1, 1); diff --git a/sys/powerpc/mpc85xx/fsl_sata.h b/sys/powerpc/mpc85xx/fsl_sata.h deleted file mode 100644 index af9a788c288..00000000000 --- a/sys/powerpc/mpc85xx/fsl_sata.h +++ /dev/null @@ -1,138 +0,0 @@ -/*- - * Copyright (c) 1998 - 2008 Søren Schmidt - * Copyright (c) 2009-2012 Alexander Motin - * Copyright (c) 2015-2016 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* ATA register defines */ - -#define ATA_FEATURE 1 /* (W) feature */ -#define ATA_F_DMA 0x01 /* enable DMA */ -#define ATA_F_OVL 0x02 /* enable overlap */ - -#define ATA_COUNT 2 /* (W) sector count */ - -#define ATA_SECTOR 3 /* (RW) sector # */ -#define ATA_CYL_LSB 4 /* (RW) cylinder# LSB */ -#define ATA_CYL_MSB 5 /* (RW) cylinder# MSB */ -#define ATA_DRIVE 6 /* (W) Sector/Drive/Head */ -#define ATA_D_LBA 0x40 /* use LBA addressing */ -#define ATA_D_IBM 0xa0 /* 512 byte sectors, ECC */ - -#define ATA_COMMAND 7 /* (W) command */ - -#define ATA_ERROR 8 /* (R) error */ -#define ATA_E_ILI 0x01 /* illegal length */ -#define ATA_E_NM 0x02 /* no media */ -#define ATA_E_ABORT 0x04 /* command aborted */ -#define ATA_E_MCR 0x08 /* media change request */ -#define ATA_E_IDNF 0x10 /* ID not found */ -#define ATA_E_MC 0x20 /* media changed */ -#define ATA_E_UNC 0x40 /* uncorrectable data */ -#define ATA_E_ICRC 0x80 /* UDMA crc error */ -#define ATA_E_ATAPI_SENSE_MASK 0xf0 /* ATAPI sense key mask */ - -#define ATA_IREASON 9 /* (R) interrupt reason */ -#define ATA_I_CMD 0x01 /* cmd (1) | data (0) */ -#define ATA_I_IN 0x02 /* read (1) | write (0) */ -#define ATA_I_RELEASE 0x04 /* released bus (1) */ -#define ATA_I_TAGMASK 0xf8 /* tag mask */ - -#define ATA_STATUS 10 /* (R) status */ -#define ATA_ALTSTAT 11 /* (R) alternate status */ -#define ATA_S_ERROR 0x01 /* error */ -#define ATA_S_INDEX 0x02 /* index */ -#define ATA_S_CORR 0x04 /* data corrected */ -#define ATA_S_DRQ 0x08 /* data request */ -#define ATA_S_DSC 0x10 /* drive seek completed */ -#define ATA_S_SERVICE 0x10 /* drive needs service */ -#define ATA_S_DWF 0x20 /* drive write fault */ -#define ATA_S_DMA 0x20 /* DMA ready */ -#define ATA_S_READY 0x40 /* drive ready */ -#define ATA_S_BUSY 0x80 /* busy */ - -#define ATA_CONTROL 12 /* (W) control */ -#define ATA_A_IDS 0x02 /* disable interrupts */ -#define ATA_A_RESET 0x04 /* RESET controller */ -#define ATA_A_4BIT 0x08 /* 4 head bits */ -#define ATA_A_HOB 0x80 /* High Order Byte enable */ - -/* SATA register defines */ -#define ATA_SSTATUS 13 -#define ATA_SS_DET_MASK 0x0000000f -#define ATA_SS_DET_NO_DEVICE 0x00000000 -#define ATA_SS_DET_DEV_PRESENT 0x00000001 -#define ATA_SS_DET_PHY_ONLINE 0x00000003 -#define ATA_SS_DET_PHY_OFFLINE 0x00000004 - -#define ATA_SS_SPD_MASK 0x000000f0 -#define ATA_SS_SPD_NO_SPEED 0x00000000 -#define ATA_SS_SPD_GEN1 0x00000010 -#define ATA_SS_SPD_GEN2 0x00000020 -#define ATA_SS_SPD_GEN3 0x00000030 - -#define ATA_SS_IPM_MASK 0x00000f00 -#define ATA_SS_IPM_NO_DEVICE 0x00000000 -#define ATA_SS_IPM_ACTIVE 0x00000100 -#define ATA_SS_IPM_PARTIAL 0x00000200 -#define ATA_SS_IPM_SLUMBER 0x00000600 -#define ATA_SS_IPM_DEVSLEEP 0x00000800 - -#define ATA_SERROR 14 -#define ATA_SE_DATA_CORRECTED 0x00000001 -#define ATA_SE_COMM_CORRECTED 0x00000002 -#define ATA_SE_DATA_ERR 0x00000100 -#define ATA_SE_COMM_ERR 0x00000200 -#define ATA_SE_PROT_ERR 0x00000400 -#define ATA_SE_HOST_ERR 0x00000800 -#define ATA_SE_PHY_CHANGED 0x00010000 -#define ATA_SE_PHY_IERROR 0x00020000 -#define ATA_SE_COMM_WAKE 0x00040000 -#define ATA_SE_DECODE_ERR 0x00080000 -#define ATA_SE_PARITY_ERR 0x00100000 -#define ATA_SE_CRC_ERR 0x00200000 -#define ATA_SE_HANDSHAKE_ERR 0x00400000 -#define ATA_SE_LINKSEQ_ERR 0x00800000 -#define ATA_SE_TRANSPORT_ERR 0x01000000 -#define ATA_SE_UNKNOWN_FIS 0x02000000 -#define ATA_SE_EXCHANGED 0x04000000 - -#define ATA_SCONTROL 15 -#define ATA_SC_DET_MASK 0x0000000f -#define ATA_SC_DET_IDLE 0x00000000 -#define ATA_SC_DET_RESET 0x00000001 -#define ATA_SC_DET_DISABLE 0x00000004 - -#define ATA_SC_SPD_MASK 0x000000f0 -#define ATA_SC_SPD_NO_SPEED 0x00000000 -#define ATA_SC_SPD_SPEED_GEN1 0x00000010 -#define ATA_SC_SPD_SPEED_GEN2 0x00000020 -#define ATA_SC_SPD_SPEED_GEN3 0x00000030 - -#define ATA_SC_IPM_MASK 0x00000f00 -#define ATA_SC_IPM_NONE 0x00000000 -#define ATA_SC_IPM_DIS_PARTIAL 0x00000100 -#define ATA_SC_IPM_DIS_SLUMBER 0x00000200 -#define ATA_SC_IPM_DIS_DEVSLEEP 0x00000400 diff --git a/sys/powerpc/mpc85xx/i2c.c b/sys/powerpc/mpc85xx/i2c.c deleted file mode 100644 index edbc169c05b..00000000000 --- a/sys/powerpc/mpc85xx/i2c.c +++ /dev/null @@ -1,436 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2008-2009 Semihalf, Michal Hajduk - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include -#include -#include "iicbus_if.h" - -#include -#include - -#define I2C_ADDR_REG 0x00 /* I2C slave address register */ -#define I2C_FDR_REG 0x04 /* I2C frequency divider register */ -#define I2C_CONTROL_REG 0x08 /* I2C control register */ -#define I2C_STATUS_REG 0x0C /* I2C status register */ -#define I2C_DATA_REG 0x10 /* I2C data register */ -#define I2C_DFSRR_REG 0x14 /* I2C Digital Filter Sampling rate */ -#define I2C_ENABLE 0x80 /* Module enable - interrupt disable */ -#define I2CSR_RXAK 0x01 /* Received acknowledge */ -#define I2CSR_MCF (1<<7) /* Data transfer */ -#define I2CSR_MASS (1<<6) /* Addressed as a slave */ -#define I2CSR_MBB (1<<5) /* Bus busy */ -#define I2CSR_MAL (1<<4) /* Arbitration lost */ -#define I2CSR_SRW (1<<2) /* Slave read/write */ -#define I2CSR_MIF (1<<1) /* Module interrupt */ -#define I2CCR_MEN (1<<7) /* Module enable */ -#define I2CCR_MSTA (1<<5) /* Master/slave mode */ -#define I2CCR_MTX (1<<4) /* Transmit/receive mode */ -#define I2CCR_TXAK (1<<3) /* Transfer acknowledge */ -#define I2CCR_RSTA (1<<2) /* Repeated START */ - -#define I2C_BAUD_RATE_FAST 0x31 -#define I2C_BAUD_RATE_DEF 0x3F -#define I2C_DFSSR_DIV 0x10 - -#ifdef DEBUG -#define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt,##args); } while (0) -#else -#define debugf(fmt, args...) -#endif - -struct i2c_softc { - device_t dev; - device_t iicbus; - struct resource *res; - struct mtx mutex; - int rid; - bus_space_handle_t bsh; - bus_space_tag_t bst; -}; - -static int i2c_probe(device_t); -static int i2c_attach(device_t); - -static int i2c_repeated_start(device_t dev, u_char slave, int timeout); -static int i2c_start(device_t dev, u_char slave, int timeout); -static int i2c_stop(device_t dev); -static int i2c_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr); -static int i2c_read(device_t dev, char *buf, int len, int *read, int last, int delay); -static int i2c_write(device_t dev, const char *buf, int len, int *sent, int timeout); -static phandle_t i2c_get_node(device_t bus, device_t dev); - -static device_method_t i2c_methods[] = { - DEVMETHOD(device_probe, i2c_probe), - DEVMETHOD(device_attach, i2c_attach), - - DEVMETHOD(iicbus_callback, iicbus_null_callback), - DEVMETHOD(iicbus_repeated_start, i2c_repeated_start), - DEVMETHOD(iicbus_start, i2c_start), - DEVMETHOD(iicbus_stop, i2c_stop), - DEVMETHOD(iicbus_reset, i2c_reset), - DEVMETHOD(iicbus_read, i2c_read), - DEVMETHOD(iicbus_write, i2c_write), - DEVMETHOD(iicbus_transfer, iicbus_transfer_gen), - DEVMETHOD(ofw_bus_get_node, i2c_get_node), - { 0, 0 } -}; - -static driver_t i2c_driver = { - "iichb", - i2c_methods, - sizeof(struct i2c_softc), -}; -static devclass_t i2c_devclass; - -DRIVER_MODULE(i2c, simplebus, i2c_driver, i2c_devclass, 0, 0); -DRIVER_MODULE(iicbus, i2c, iicbus_driver, iicbus_devclass, 0, 0); - -static __inline void -i2c_write_reg(struct i2c_softc *sc, bus_size_t off, uint8_t val) -{ - - bus_space_write_1(sc->bst, sc->bsh, off, val); -} - -static __inline uint8_t -i2c_read_reg(struct i2c_softc *sc, bus_size_t off) -{ - - return (bus_space_read_1(sc->bst, sc->bsh, off)); -} - -static __inline void -i2c_flag_set(struct i2c_softc *sc, bus_size_t off, uint8_t mask) -{ - uint8_t status; - - status = i2c_read_reg(sc, off); - status |= mask; - i2c_write_reg(sc, off, status); -} - -static int -i2c_do_wait(device_t dev, struct i2c_softc *sc, int write, int start) -{ - int err; - uint8_t status; - - status = i2c_read_reg(sc, I2C_STATUS_REG); - if (status & I2CSR_MIF) { - if (write && start && (status & I2CSR_RXAK)) { - debugf("no ack %s", start ? - "after sending slave address" : ""); - err = IIC_ENOACK; - goto error; - } - if (status & I2CSR_MAL) { - debugf("arbitration lost"); - err = IIC_EBUSERR; - goto error; - } - if (!write && !(status & I2CSR_MCF)) { - debugf("transfer unfinished"); - err = IIC_EBUSERR; - goto error; - } - } - - return (IIC_NOERR); - -error: - i2c_write_reg(sc, I2C_STATUS_REG, 0x0); - i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_TXAK); - return (err); -} - -static int -i2c_probe(device_t dev) -{ - struct i2c_softc *sc; - - if (!ofw_bus_is_compatible(dev, "fsl-i2c")) - return (ENXIO); - - sc = device_get_softc(dev); - sc->rid = 0; - - sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid, - RF_ACTIVE); - if (sc->res == NULL) { - device_printf(dev, "could not allocate resources\n"); - return (ENXIO); - } - - sc->bst = rman_get_bustag(sc->res); - sc->bsh = rman_get_bushandle(sc->res); - - /* Enable I2C */ - i2c_write_reg(sc, I2C_CONTROL_REG, I2C_ENABLE); - bus_release_resource(dev, SYS_RES_MEMORY, sc->rid, sc->res); - device_set_desc(dev, "I2C bus controller"); - - return (BUS_PROBE_DEFAULT); -} - -static int -i2c_attach(device_t dev) -{ - struct i2c_softc *sc; - sc = device_get_softc(dev); - - sc->dev = dev; - sc->rid = 0; - - mtx_init(&sc->mutex, device_get_nameunit(dev), "I2C", MTX_DEF); - - sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid, - RF_ACTIVE); - if (sc->res == NULL) { - device_printf(dev, "could not allocate resources"); - mtx_destroy(&sc->mutex); - return (ENXIO); - } - - sc->bst = rman_get_bustag(sc->res); - sc->bsh = rman_get_bushandle(sc->res); - - sc->iicbus = device_add_child(dev, "iicbus", -1); - if (sc->iicbus == NULL) { - device_printf(dev, "could not add iicbus child"); - mtx_destroy(&sc->mutex); - return (ENXIO); - } - - bus_generic_attach(dev); - return (IIC_NOERR); -} -static int -i2c_repeated_start(device_t dev, u_char slave, int timeout) -{ - struct i2c_softc *sc; - int error; - - sc = device_get_softc(dev); - - mtx_lock(&sc->mutex); - /* Set repeated start condition */ - i2c_flag_set(sc, I2C_CONTROL_REG ,I2CCR_RSTA); - /* Write target address - LSB is R/W bit */ - i2c_write_reg(sc, I2C_DATA_REG, slave); - DELAY(1250); - - error = i2c_do_wait(dev, sc, 1, 1); - mtx_unlock(&sc->mutex); - - if (error) - return (error); - - return (IIC_NOERR); -} - -static int -i2c_start(device_t dev, u_char slave, int timeout) -{ - struct i2c_softc *sc; - uint8_t status; - int error; - - sc = device_get_softc(dev); - DELAY(1000); - - mtx_lock(&sc->mutex); - status = i2c_read_reg(sc, I2C_STATUS_REG); - /* Check if bus is idle or busy */ - if (status & I2CSR_MBB) { - debugf("bus busy"); - mtx_unlock(&sc->mutex); - i2c_stop(dev); - return (IIC_EBUSERR); - } - - /* Set start condition */ - i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_MSTA | I2CCR_MTX); - /* Write target address - LSB is R/W bit */ - i2c_write_reg(sc, I2C_DATA_REG, slave); - DELAY(1250); - - error = i2c_do_wait(dev, sc, 1, 1); - - mtx_unlock(&sc->mutex); - if (error) - return (error); - - return (IIC_NOERR); -} - -static int -i2c_stop(device_t dev) -{ - struct i2c_softc *sc; - - sc = device_get_softc(dev); - mtx_lock(&sc->mutex); - i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_TXAK); - DELAY(1000); - mtx_unlock(&sc->mutex); - - return (IIC_NOERR); -} - -static int -i2c_reset(device_t dev, u_char speed, u_char addr, u_char *oldadr) -{ - struct i2c_softc *sc; - uint8_t baud_rate; - - sc = device_get_softc(dev); - - switch (speed) { - case IIC_FAST: - baud_rate = I2C_BAUD_RATE_FAST; - break; - case IIC_SLOW: - case IIC_UNKNOWN: - case IIC_FASTEST: - default: - baud_rate = I2C_BAUD_RATE_DEF; - break; - } - - mtx_lock(&sc->mutex); - i2c_write_reg(sc, I2C_CONTROL_REG, 0x0); - i2c_write_reg(sc, I2C_STATUS_REG, 0x0); - DELAY(1000); - i2c_write_reg(sc, I2C_FDR_REG, baud_rate); - i2c_write_reg(sc, I2C_DFSRR_REG, I2C_DFSSR_DIV); - i2c_write_reg(sc, I2C_CONTROL_REG, I2C_ENABLE); - DELAY(1000); - mtx_unlock(&sc->mutex); - - return (IIC_NOERR); -} - -static int -i2c_read(device_t dev, char *buf, int len, int *read, int last, int delay) -{ - struct i2c_softc *sc; - int error; - - sc = device_get_softc(dev); - *read = 0; - - mtx_lock(&sc->mutex); - if (len) { - if (len == 1) - i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | - I2CCR_MSTA | I2CCR_TXAK); - - else - i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | - I2CCR_MSTA); - - /* dummy read */ - i2c_read_reg(sc, I2C_DATA_REG); - DELAY(1000); - } - - while (*read < len) { - DELAY(1000); - error = i2c_do_wait(dev, sc, 0, 0); - if (error) { - mtx_unlock(&sc->mutex); - return (error); - } - if ((*read == len - 2) && last) { - i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | - I2CCR_MSTA | I2CCR_TXAK); - } - - if ((*read == len - 1) && last) { - i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | - I2CCR_TXAK); - } - - *buf++ = i2c_read_reg(sc, I2C_DATA_REG); - (*read)++; - DELAY(1250); - } - mtx_unlock(&sc->mutex); - - return (IIC_NOERR); -} - -static int -i2c_write(device_t dev, const char *buf, int len, int *sent, int timeout) -{ - struct i2c_softc *sc; - int error; - - sc = device_get_softc(dev); - *sent = 0; - - mtx_lock(&sc->mutex); - while (*sent < len) { - i2c_write_reg(sc, I2C_DATA_REG, *buf++); - DELAY(1250); - - error = i2c_do_wait(dev, sc, 1, 0); - if (error) { - mtx_unlock(&sc->mutex); - return (error); - } - - (*sent)++; - } - mtx_unlock(&sc->mutex); - - return (IIC_NOERR); -} - -static phandle_t -i2c_get_node(device_t bus, device_t dev) -{ - - /* Share controller node with iibus device. */ - return (ofw_bus_get_node(bus)); -} diff --git a/sys/powerpc/mpc85xx/isa.c b/sys/powerpc/mpc85xx/isa.c deleted file mode 100644 index 4ef6ca94816..00000000000 --- a/sys/powerpc/mpc85xx/isa.c +++ /dev/null @@ -1,84 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009 Marcel Moolenaar - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -void -isa_init(device_t dev) -{ -} - -struct resource * -isa_alloc_resource(device_t bus, device_t child, int type, int *rid, - u_long start, u_long end, u_long count, u_int flags) -{ - struct isa_device* idev = DEVTOISA(child); - struct resource_list *rl = &idev->id_resources; - int isdefault, passthrough, rids; - - isdefault = RMAN_IS_DEFAULT_RANGE(start, end) ? 1 : 0; - passthrough = (device_get_parent(child) != bus) ? 1 : 0; - - if (!passthrough && !isdefault && - resource_list_find(rl, type, *rid) == NULL) { - switch (type) { - case SYS_RES_IOPORT: rids = ISA_PNP_NPORT; break; - case SYS_RES_IRQ: rids = ISA_PNP_NIRQ; break; - case SYS_RES_MEMORY: rids = ISA_PNP_NMEM; break; - default: rids = 0; break; - } - if (*rid < 0 || *rid >= rids) - return (NULL); - - resource_list_add(rl, type, *rid, start, end, count); - } - - return (resource_list_alloc(rl, bus, child, type, rid, start, end, - count, flags)); -} - -int -isa_release_resource(device_t bus, device_t child, int type, int rid, - struct resource *r) -{ - struct isa_device* idev = DEVTOISA(child); - struct resource_list *rl = &idev->id_resources; - - return (resource_list_release(rl, bus, child, type, rid, r)); -} diff --git a/sys/powerpc/mpc85xx/lbc.c b/sys/powerpc/mpc85xx/lbc.c deleted file mode 100644 index e4f79127163..00000000000 --- a/sys/powerpc/mpc85xx/lbc.c +++ /dev/null @@ -1,856 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2006-2008, Juniper Networks, Inc. - * Copyright (c) 2008 Semihalf, Rafal Czubak - * Copyright (c) 2009 The FreeBSD Foundation - * All rights reserved. - * - * Portions of this software were developed by Semihalf - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include - -#include "ofw_bus_if.h" -#include "lbc.h" - -#ifdef DEBUG -#define debugf(fmt, args...) do { printf("%s(): ", __func__); \ - printf(fmt,##args); } while (0) -#else -#define debugf(fmt, args...) -#endif - -static MALLOC_DEFINE(M_LBC, "localbus", "localbus devices information"); - -static int lbc_probe(device_t); -static int lbc_attach(device_t); -static int lbc_shutdown(device_t); -static int lbc_activate_resource(device_t bus __unused, device_t child __unused, - int type, int rid __unused, struct resource *r); -static int lbc_deactivate_resource(device_t bus __unused, - device_t child __unused, int type __unused, int rid __unused, - struct resource *r); -static struct resource *lbc_alloc_resource(device_t, device_t, int, int *, - rman_res_t, rman_res_t, rman_res_t, u_int); -static int lbc_print_child(device_t, device_t); -static int lbc_release_resource(device_t, device_t, int, int, - struct resource *); -static const struct ofw_bus_devinfo *lbc_get_devinfo(device_t, device_t); - -/* - * Bus interface definition - */ -static device_method_t lbc_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, lbc_probe), - DEVMETHOD(device_attach, lbc_attach), - DEVMETHOD(device_shutdown, lbc_shutdown), - - /* Bus interface */ - DEVMETHOD(bus_print_child, lbc_print_child), - DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), - DEVMETHOD(bus_teardown_intr, NULL), - - DEVMETHOD(bus_alloc_resource, lbc_alloc_resource), - DEVMETHOD(bus_release_resource, lbc_release_resource), - DEVMETHOD(bus_activate_resource, lbc_activate_resource), - DEVMETHOD(bus_deactivate_resource, lbc_deactivate_resource), - - /* OFW bus interface */ - DEVMETHOD(ofw_bus_get_devinfo, lbc_get_devinfo), - DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), - DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), - DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), - DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), - DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), - { 0, 0 } -}; - -static driver_t lbc_driver = { - "lbc", - lbc_methods, - sizeof(struct lbc_softc) -}; - -devclass_t lbc_devclass; - -EARLY_DRIVER_MODULE(lbc, ofwbus, lbc_driver, lbc_devclass, - 0, 0, BUS_PASS_BUS); - -/* - * Calculate address mask used by OR(n) registers. Use memory region size to - * determine mask value. The size must be a power of two and within the range - * of 32KB - 4GB. Otherwise error code is returned. Value representing - * 4GB size can be passed as 0xffffffff. - */ -static uint32_t -lbc_address_mask(uint32_t size) -{ - int n = 15; - - if (size == ~0) - return (0); - - while (n < 32) { - if (size == (1U << n)) - break; - n++; - } - - if (n == 32) - return (EINVAL); - - return (0xffff8000 << (n - 15)); -} - -static void -lbc_banks_unmap(struct lbc_softc *sc) -{ - int r; - - r = 0; - while (r < LBC_DEV_MAX) { - if (sc->sc_range[r].size == 0) - return; - - pmap_unmapdev(sc->sc_range[r].kva, sc->sc_range[r].size); - law_disable(OCP85XX_TGTIF_LBC, sc->sc_range[r].addr, - sc->sc_range[r].size); - r++; - } -} - -static int -lbc_banks_map(struct lbc_softc *sc) -{ - vm_paddr_t end, start; - vm_size_t size; - u_int i, r, ranges, s; - int error; - - bzero(sc->sc_range, sizeof(sc->sc_range)); - - /* - * Determine number of discontiguous address ranges to program. - */ - ranges = 0; - for (i = 0; i < LBC_DEV_MAX; i++) { - size = sc->sc_banks[i].size; - if (size == 0) - continue; - - start = sc->sc_banks[i].addr; - for (r = 0; r < ranges; r++) { - /* Avoid wrap-around bugs. */ - end = sc->sc_range[r].addr - 1 + sc->sc_range[r].size; - if (start > 0 && end == start - 1) { - sc->sc_range[r].size += size; - break; - } - /* Avoid wrap-around bugs. */ - end = start - 1 + size; - if (sc->sc_range[r].addr > 0 && - end == sc->sc_range[r].addr - 1) { - sc->sc_range[r].addr = start; - sc->sc_range[r].size += size; - break; - } - } - if (r == ranges) { - /* New range; add using insertion sort */ - r = 0; - while (r < ranges && sc->sc_range[r].addr < start) - r++; - for (s = ranges; s > r; s--) - sc->sc_range[s] = sc->sc_range[s-1]; - sc->sc_range[r].addr = start; - sc->sc_range[r].size = size; - ranges++; - } - } - - /* - * Ranges are sorted so quickly go over the list to merge ranges - * that grew toward each other while building the ranges. - */ - r = 0; - while (r < ranges - 1) { - end = sc->sc_range[r].addr + sc->sc_range[r].size; - if (end != sc->sc_range[r+1].addr) { - r++; - continue; - } - sc->sc_range[r].size += sc->sc_range[r+1].size; - for (s = r + 1; s < ranges - 1; s++) - sc->sc_range[s] = sc->sc_range[s+1]; - bzero(&sc->sc_range[s], sizeof(sc->sc_range[s])); - ranges--; - } - - /* - * Configure LAW for the LBC ranges and map the physical memory - * range into KVA. - */ - for (r = 0; r < ranges; r++) { - start = sc->sc_range[r].addr; - size = sc->sc_range[r].size; - error = law_enable(OCP85XX_TGTIF_LBC, start, size); - if (error) - return (error); - sc->sc_range[r].kva = (vm_offset_t)pmap_mapdev(start, size); - } - - /* XXX: need something better here? */ - if (ranges == 0) - return (EINVAL); - - /* Assign KVA to banks based on the enclosing range. */ - for (i = 0; i < LBC_DEV_MAX; i++) { - size = sc->sc_banks[i].size; - if (size == 0) - continue; - - start = sc->sc_banks[i].addr; - for (r = 0; r < ranges; r++) { - end = sc->sc_range[r].addr - 1 + sc->sc_range[r].size; - if (start >= sc->sc_range[r].addr && - start - 1 + size <= end) - break; - } - if (r < ranges) { - sc->sc_banks[i].kva = sc->sc_range[r].kva + - (start - sc->sc_range[r].addr); - } - } - - return (0); -} - -static int -lbc_banks_enable(struct lbc_softc *sc) -{ - uint32_t size; - uint32_t regval; - int error, i; - - for (i = 0; i < LBC_DEV_MAX; i++) { - size = sc->sc_banks[i].size; - if (size == 0) - continue; - - /* - * Compute and program BR value. - */ - regval = sc->sc_banks[i].addr; - switch (sc->sc_banks[i].width) { - case 8: - regval |= (1 << 11); - break; - case 16: - regval |= (2 << 11); - break; - case 32: - regval |= (3 << 11); - break; - default: - error = EINVAL; - goto fail; - } - regval |= (sc->sc_banks[i].decc << 9); - regval |= (sc->sc_banks[i].wp << 8); - regval |= (sc->sc_banks[i].msel << 5); - regval |= (sc->sc_banks[i].atom << 2); - regval |= 1; - bus_space_write_4(sc->sc_bst, sc->sc_bsh, - LBC85XX_BR(i), regval); - - /* - * Compute and program OR value. - */ - regval = lbc_address_mask(size); - switch (sc->sc_banks[i].msel) { - case LBCRES_MSEL_GPCM: - /* TODO Add flag support for option registers */ - regval |= 0x0ff7; - break; - case LBCRES_MSEL_FCM: - /* TODO Add flag support for options register */ - regval |= 0x0796; - break; - case LBCRES_MSEL_UPMA: - case LBCRES_MSEL_UPMB: - case LBCRES_MSEL_UPMC: - printf("UPM mode not supported yet!"); - error = ENOSYS; - goto fail; - } - bus_space_write_4(sc->sc_bst, sc->sc_bsh, - LBC85XX_OR(i), regval); - } - - return (0); - -fail: - lbc_banks_unmap(sc); - return (error); -} - -static void -fdt_lbc_fixup(phandle_t node, struct lbc_softc *sc, struct lbc_devinfo *di) -{ - pcell_t width; - int bank; - - if (OF_getprop(node, "bank-width", (void *)&width, sizeof(width)) <= 0) - return; - - bank = di->di_bank; - if (sc->sc_banks[bank].size == 0) - return; - - /* Express width in bits. */ - sc->sc_banks[bank].width = width * 8; -} - -static int -fdt_lbc_reg_decode(phandle_t node, struct lbc_softc *sc, - struct lbc_devinfo *di) -{ - rman_res_t start, end, count; - pcell_t *reg, *regptr; - pcell_t addr_cells, size_cells; - int tuple_size, tuples; - int i, j, rv, bank; - - if (fdt_addrsize_cells(OF_parent(node), &addr_cells, &size_cells) != 0) - return (ENXIO); - - tuple_size = sizeof(pcell_t) * (addr_cells + size_cells); - tuples = OF_getencprop_alloc_multi(node, "reg", tuple_size, - (void **)®); - debugf("addr_cells = %d, size_cells = %d\n", addr_cells, size_cells); - debugf("tuples = %d, tuple size = %d\n", tuples, tuple_size); - if (tuples <= 0) - /* No 'reg' property in this node. */ - return (0); - - regptr = reg; - for (i = 0; i < tuples; i++) { - bank = fdt_data_get((void *)reg, 1); - di->di_bank = bank; - reg += 1; - - /* Get address/size. */ - start = count = 0; - for (j = 0; j < addr_cells - 1; j++) { - start <<= 32; - start |= reg[j]; - } - for (j = 0; j < size_cells; j++) { - count <<= 32; - count |= reg[addr_cells + j - 1]; - } - reg += addr_cells - 1 + size_cells; - - /* Calculate address range relative to VA base. */ - start = sc->sc_banks[bank].kva + start; - end = start + count - 1; - - debugf("reg addr bank = %d, start = %jx, end = %jx, " - "count = %jx\n", bank, start, end, count); - - /* Use bank (CS) cell as rid. */ - resource_list_add(&di->di_res, SYS_RES_MEMORY, bank, start, - end, count); - } - rv = 0; - OF_prop_free(regptr); - return (rv); -} - -static void -lbc_intr(void *arg) -{ - struct lbc_softc *sc = arg; - uint32_t ltesr; - - ltesr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR); - sc->sc_ltesr = ltesr; - bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR, ltesr); - wakeup(sc->sc_dev); -} - -static int -lbc_probe(device_t dev) -{ - - if (!(ofw_bus_is_compatible(dev, "fsl,lbc") || - ofw_bus_is_compatible(dev, "fsl,elbc"))) - return (ENXIO); - - device_set_desc(dev, "Freescale Local Bus Controller"); - return (BUS_PROBE_DEFAULT); -} - -static int -lbc_attach(device_t dev) -{ - struct lbc_softc *sc; - struct lbc_devinfo *di; - struct rman *rm; - uintmax_t offset, size; - vm_paddr_t start; - device_t cdev; - phandle_t node, child; - pcell_t *ranges, *rangesptr; - int tuple_size, tuples; - int par_addr_cells; - int bank, error, i, j; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - - sc->sc_mrid = 0; - sc->sc_mres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_mrid, - RF_ACTIVE); - if (sc->sc_mres == NULL) - return (ENXIO); - - sc->sc_bst = rman_get_bustag(sc->sc_mres); - sc->sc_bsh = rman_get_bushandle(sc->sc_mres); - - for (bank = 0; bank < LBC_DEV_MAX; bank++) { - bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_BR(bank), 0); - bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_OR(bank), 0); - } - - /* - * Initialize configuration register: - * - enable Local Bus - * - set data buffer control signal function - * - disable parity byte select - * - set ECC parity type - * - set bus monitor timing and timer prescale - */ - bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LBCR, 0); - - /* - * Initialize clock ratio register: - * - disable PLL bypass mode - * - configure LCLK delay cycles for the assertion of LALE - * - set system clock divider - */ - bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LCRR, 0x00030008); - - bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTEDR, 0); - bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR, ~0); - bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTEIR, 0x64080001); - - sc->sc_irid = 0; - sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid, - RF_ACTIVE | RF_SHAREABLE); - if (sc->sc_ires != NULL) { - error = bus_setup_intr(dev, sc->sc_ires, - INTR_TYPE_MISC | INTR_MPSAFE, NULL, lbc_intr, sc, - &sc->sc_icookie); - if (error) { - device_printf(dev, "could not activate interrupt\n"); - bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid, - sc->sc_ires); - sc->sc_ires = NULL; - } - } - - sc->sc_ltesr = ~0; - - rangesptr = NULL; - - rm = &sc->sc_rman; - rm->rm_type = RMAN_ARRAY; - rm->rm_descr = "Local Bus Space"; - error = rman_init(rm); - if (error) - goto fail; - - error = rman_manage_region(rm, rm->rm_start, rm->rm_end); - if (error) { - rman_fini(rm); - goto fail; - } - - /* - * Process 'ranges' property. - */ - node = ofw_bus_get_node(dev); - if ((fdt_addrsize_cells(node, &sc->sc_addr_cells, - &sc->sc_size_cells)) != 0) { - error = ENXIO; - goto fail; - } - - par_addr_cells = fdt_parent_addr_cells(node); - if (par_addr_cells > 2) { - device_printf(dev, "unsupported parent #addr-cells\n"); - error = ERANGE; - goto fail; - } - tuple_size = sizeof(pcell_t) * (sc->sc_addr_cells + par_addr_cells + - sc->sc_size_cells); - - tuples = OF_getencprop_alloc_multi(node, "ranges", tuple_size, - (void **)&ranges); - if (tuples < 0) { - device_printf(dev, "could not retrieve 'ranges' property\n"); - error = ENXIO; - goto fail; - } - rangesptr = ranges; - - debugf("par addr_cells = %d, addr_cells = %d, size_cells = %d, " - "tuple_size = %d, tuples = %d\n", par_addr_cells, - sc->sc_addr_cells, sc->sc_size_cells, tuple_size, tuples); - - start = 0; - size = 0; - for (i = 0; i < tuples; i++) { - /* The first cell is the bank (chip select) number. */ - bank = fdt_data_get(ranges, 1); - if (bank < 0 || bank > LBC_DEV_MAX) { - device_printf(dev, "bank out of range: %d\n", bank); - error = ERANGE; - goto fail; - } - ranges += 1; - - /* - * Remaining cells of the child address define offset into - * this CS. - */ - offset = 0; - for (j = 0; j < sc->sc_addr_cells - 1; j++) { - offset <<= sizeof(pcell_t) * 8; - offset |= *ranges; - ranges++; - } - - /* Parent bus start address of this bank. */ - start = 0; - for (j = 0; j < par_addr_cells; j++) { - start <<= sizeof(pcell_t) * 8; - start |= *ranges; - ranges++; - } - - size = fdt_data_get((void *)ranges, sc->sc_size_cells); - ranges += sc->sc_size_cells; - debugf("bank = %d, start = %jx, size = %jx\n", bank, - (uintmax_t)start, size); - - sc->sc_banks[bank].addr = start + offset; - sc->sc_banks[bank].size = size; - - /* - * Attributes for the bank. - * - * XXX Note there are no DT bindings defined for them at the - * moment, so we need to provide some defaults. - */ - sc->sc_banks[bank].width = 16; - sc->sc_banks[bank].msel = LBCRES_MSEL_GPCM; - sc->sc_banks[bank].decc = LBCRES_DECC_DISABLED; - sc->sc_banks[bank].atom = LBCRES_ATOM_DISABLED; - sc->sc_banks[bank].wp = 0; - } - - /* - * Initialize mem-mappings for the LBC banks (i.e. chip selects). - */ - error = lbc_banks_map(sc); - if (error) - goto fail; - - /* - * Walk the localbus and add direct subordinates as our children. - */ - for (child = OF_child(node); child != 0; child = OF_peer(child)) { - di = malloc(sizeof(*di), M_LBC, M_WAITOK | M_ZERO); - - if (ofw_bus_gen_setup_devinfo(&di->di_ofw, child) != 0) { - free(di, M_LBC); - device_printf(dev, "could not set up devinfo\n"); - continue; - } - - resource_list_init(&di->di_res); - - if (fdt_lbc_reg_decode(child, sc, di)) { - device_printf(dev, "could not process 'reg' " - "property\n"); - ofw_bus_gen_destroy_devinfo(&di->di_ofw); - free(di, M_LBC); - continue; - } - - fdt_lbc_fixup(child, sc, di); - - /* Add newbus device for this FDT node */ - cdev = device_add_child(dev, NULL, -1); - if (cdev == NULL) { - device_printf(dev, "could not add child: %s\n", - di->di_ofw.obd_name); - resource_list_free(&di->di_res); - ofw_bus_gen_destroy_devinfo(&di->di_ofw); - free(di, M_LBC); - continue; - } - debugf("added child name='%s', node=%x\n", di->di_ofw.obd_name, - child); - device_set_ivars(cdev, di); - } - - /* - * Enable the LBC. - */ - lbc_banks_enable(sc); - - OF_prop_free(rangesptr); - return (bus_generic_attach(dev)); - -fail: - OF_prop_free(rangesptr); - bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mrid, sc->sc_mres); - return (error); -} - -static int -lbc_shutdown(device_t dev) -{ - - /* TODO */ - return(0); -} - -static struct resource * -lbc_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct lbc_softc *sc; - struct lbc_devinfo *di; - struct resource_list_entry *rle; - struct resource *res; - struct rman *rm; - int needactivate; - - /* We only support default allocations. */ - if (!RMAN_IS_DEFAULT_RANGE(start, end)) - return (NULL); - - sc = device_get_softc(bus); - if (type == SYS_RES_IRQ) - return (bus_alloc_resource(bus, type, rid, start, end, count, - flags)); - - /* - * Request for the default allocation with a given rid: use resource - * list stored in the local device info. - */ - if ((di = device_get_ivars(child)) == NULL) - return (NULL); - - if (type == SYS_RES_IOPORT) - type = SYS_RES_MEMORY; - - rid = &di->di_bank; - - rle = resource_list_find(&di->di_res, type, *rid); - if (rle == NULL) { - device_printf(bus, "no default resources for " - "rid = %d, type = %d\n", *rid, type); - return (NULL); - } - start = rle->start; - count = rle->count; - end = start + count - 1; - - sc = device_get_softc(bus); - - needactivate = flags & RF_ACTIVE; - flags &= ~RF_ACTIVE; - - rm = &sc->sc_rman; - - res = rman_reserve_resource(rm, start, end, count, flags, child); - if (res == NULL) { - device_printf(bus, "failed to reserve resource %#jx - %#jx " - "(%#jx)\n", start, end, count); - return (NULL); - } - - rman_set_rid(res, *rid); - rman_set_bustag(res, &bs_be_tag); - rman_set_bushandle(res, rman_get_start(res)); - - if (needactivate) - if (bus_activate_resource(child, type, *rid, res)) { - device_printf(child, "resource activation failed\n"); - rman_release_resource(res); - return (NULL); - } - - return (res); -} - -static int -lbc_print_child(device_t dev, device_t child) -{ - struct lbc_devinfo *di; - struct resource_list *rl; - int rv; - - di = device_get_ivars(child); - rl = &di->di_res; - - rv = 0; - rv += bus_print_child_header(dev, child); - rv += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); - rv += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); - rv += bus_print_child_footer(dev, child); - - return (rv); -} - -static int -lbc_release_resource(device_t dev, device_t child, int type, int rid, - struct resource *res) -{ - int err; - - if (rman_get_flags(res) & RF_ACTIVE) { - err = bus_deactivate_resource(child, type, rid, res); - if (err) - return (err); - } - - return (rman_release_resource(res)); -} - -static int -lbc_activate_resource(device_t bus __unused, device_t child __unused, - int type __unused, int rid __unused, struct resource *r) -{ - - /* Child resources were already mapped, just activate. */ - return (rman_activate_resource(r)); -} - -static int -lbc_deactivate_resource(device_t bus __unused, device_t child __unused, - int type __unused, int rid __unused, struct resource *r) -{ - - return (rman_deactivate_resource(r)); -} - -static const struct ofw_bus_devinfo * -lbc_get_devinfo(device_t bus, device_t child) -{ - struct lbc_devinfo *di; - - di = device_get_ivars(child); - return (&di->di_ofw); -} - -void -lbc_write_reg(device_t child, u_int off, uint32_t val) -{ - device_t dev; - struct lbc_softc *sc; - - dev = device_get_parent(child); - - if (off >= 0x1000) { - device_printf(dev, "%s(%s): invalid offset %#x\n", - __func__, device_get_nameunit(child), off); - return; - } - - sc = device_get_softc(dev); - - if (off == LBC85XX_LTESR && sc->sc_ltesr != ~0u) { - sc->sc_ltesr ^= (val & sc->sc_ltesr); - return; - } - - if (off == LBC85XX_LTEATR && (val & 1) == 0) - sc->sc_ltesr = ~0u; - bus_space_write_4(sc->sc_bst, sc->sc_bsh, off, val); -} - -uint32_t -lbc_read_reg(device_t child, u_int off) -{ - device_t dev; - struct lbc_softc *sc; - uint32_t val; - - dev = device_get_parent(child); - - if (off >= 0x1000) { - device_printf(dev, "%s(%s): invalid offset %#x\n", - __func__, device_get_nameunit(child), off); - return (~0U); - } - - sc = device_get_softc(dev); - - if (off == LBC85XX_LTESR && sc->sc_ltesr != ~0U) - val = sc->sc_ltesr; - else - val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, off); - return (val); -} diff --git a/sys/powerpc/mpc85xx/lbc.h b/sys/powerpc/mpc85xx/lbc.h deleted file mode 100644 index f41b62c1354..00000000000 --- a/sys/powerpc/mpc85xx/lbc.h +++ /dev/null @@ -1,138 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006-2008, Juniper Networks, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _MACHINE_LBC_H_ -#define _MACHINE_LBC_H_ - -/* Maximum number of devices on Local Bus */ -#define LBC_DEV_MAX 8 - -/* Local access registers */ -#define LBC85XX_BR(n) (0x0 + (8 * n)) /* Base register 0-7 */ -#define LBC85XX_OR(n) (0x4 + (8 * n)) /* Options register 0-7 */ -#define LBC85XX_MAR 0x068 /* UPM address register */ -#define LBC85XX_MAMR 0x070 /* UPMA mode register */ -#define LBC85XX_MBMR 0x074 /* UPMB mode register */ -#define LBC85XX_MCMR 0x078 /* UPMC mode register */ -#define LBC85XX_MRTPR 0x084 /* Memory refresh timer prescaler */ -#define LBC85XX_MDR 0x088 /* UPM data register */ -#define LBC85XX_LSOR 0x090 /* Special operation initiation */ -#define LBC85XX_LURT 0x0a0 /* UPM refresh timer */ -#define LBC85XX_LSRT 0x0a4 /* SDRAM refresh timer */ -#define LBC85XX_LTESR 0x0b0 /* Transfer error status register */ -#define LBC85XX_LTEDR 0x0b4 /* Transfer error disable register */ -#define LBC85XX_LTEIR 0x0b8 /* Transfer error interrupt register */ -#define LBC85XX_LTEATR 0x0bc /* Transfer error attributes register */ -#define LBC85XX_LTEAR 0x0c0 /* Transfer error address register */ -#define LBC85XX_LTECCR 0x0c4 /* Transfer error ECC register */ -#define LBC85XX_LBCR 0x0d0 /* Configuration register */ -#define LBC85XX_LCRR 0x0d4 /* Clock ratio register */ -#define LBC85XX_FMR 0x0e0 /* Flash mode register */ -#define LBC85XX_FIR 0x0e4 /* Flash instruction register */ -#define LBC85XX_FCR 0x0e8 /* Flash command register */ -#define LBC85XX_FBAR 0x0ec /* Flash block address register */ -#define LBC85XX_FPAR 0x0f0 /* Flash page address register */ -#define LBC85XX_FBCR 0x0f4 /* Flash byte count register */ -#define LBC85XX_FECC0 0x100 /* Flash ECC block 0 register */ -#define LBC85XX_FECC1 0x104 /* Flash ECC block 0 register */ -#define LBC85XX_FECC2 0x108 /* Flash ECC block 0 register */ -#define LBC85XX_FECC3 0x10c /* Flash ECC block 0 register */ - -/* LBC machine select */ -#define LBCRES_MSEL_GPCM 0 -#define LBCRES_MSEL_FCM 1 -#define LBCRES_MSEL_UPMA 8 -#define LBCRES_MSEL_UPMB 9 -#define LBCRES_MSEL_UPMC 10 - -/* LBC data error checking modes */ -#define LBCRES_DECC_DISABLED 0 -#define LBCRES_DECC_NORMAL 1 -#define LBCRES_DECC_RMW 2 - -/* LBC atomic operation modes */ -#define LBCRES_ATOM_DISABLED 0 -#define LBCRES_ATOM_RAWA 1 -#define LBCRES_ATOM_WARA 2 - -struct lbc_memrange { - vm_paddr_t addr; - vm_size_t size; - vm_offset_t kva; -}; - -struct lbc_bank { - vm_paddr_t addr; /* physical addr of the bank */ - vm_size_t size; /* bank size */ - vm_offset_t kva; /* VA of the bank */ - - /* - * XXX the following bank attributes do not have properties specified - * in the LBC DTS bindings yet (11.2009), so they are mainly a - * placeholder for future extensions. - */ - int width; /* data bus width */ - uint8_t msel; /* machine select */ - uint8_t atom; /* atomic op mode */ - uint8_t wp; /* write protect */ - uint8_t decc; /* data error checking */ -}; - -struct lbc_softc { - device_t sc_dev; - - struct resource *sc_mres; - bus_space_handle_t sc_bsh; - bus_space_tag_t sc_bst; - int sc_mrid; - - int sc_irid; - struct resource *sc_ires; - void *sc_icookie; - - struct rman sc_rman; - - int sc_addr_cells; - int sc_size_cells; - - struct lbc_memrange sc_range[LBC_DEV_MAX]; - struct lbc_bank sc_banks[LBC_DEV_MAX]; - - uint32_t sc_ltesr; -}; - -struct lbc_devinfo { - struct ofw_bus_devinfo di_ofw; - struct resource_list di_res; - int di_bank; -}; - -uint32_t lbc_read_reg(device_t child, u_int off); -void lbc_write_reg(device_t child, u_int off, uint32_t val); - -#endif /* _MACHINE_LBC_H_ */ diff --git a/sys/powerpc/mpc85xx/mpc85xx.c b/sys/powerpc/mpc85xx/mpc85xx.c deleted file mode 100644 index a36718fbd16..00000000000 --- a/sys/powerpc/mpc85xx/mpc85xx.c +++ /dev/null @@ -1,354 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2008 Semihalf, Rafal Jaworowski - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_platform.h" -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include - -#include - -/* - * MPC85xx system specific routines - */ - -uint32_t -ccsr_read4(uintptr_t addr) -{ - volatile uint32_t *ptr = (void *)addr; - - return (*ptr); -} - -void -ccsr_write4(uintptr_t addr, uint32_t val) -{ - volatile uint32_t *ptr = (void *)addr; - - *ptr = val; - powerpc_iomb(); -} - -int -law_getmax(void) -{ - uint32_t ver; - int law_max; - - ver = SVR_VER(mfspr(SPR_SVR)); - switch (ver) { - case SVR_MPC8555: - case SVR_MPC8555E: - law_max = 8; - break; - case SVR_MPC8533: - case SVR_MPC8533E: - case SVR_MPC8548: - case SVR_MPC8548E: - law_max = 10; - break; - case SVR_P5020: - case SVR_P5020E: - case SVR_P5021: - case SVR_P5021E: - case SVR_P5040: - case SVR_P5040E: - law_max = 32; - break; - default: - law_max = 8; - } - - return (law_max); -} - -static inline void -law_write(uint32_t n, uint64_t bar, uint32_t sr) -{ - - if (mpc85xx_is_qoriq()) { - ccsr_write4(OCP85XX_LAWBARH(n), bar >> 32); - ccsr_write4(OCP85XX_LAWBARL(n), bar); - ccsr_write4(OCP85XX_LAWSR_QORIQ(n), sr); - ccsr_read4(OCP85XX_LAWSR_QORIQ(n)); - } else { - ccsr_write4(OCP85XX_LAWBAR(n), bar >> 12); - ccsr_write4(OCP85XX_LAWSR_85XX(n), sr); - ccsr_read4(OCP85XX_LAWSR_85XX(n)); - } - - /* - * The last write to LAWAR should be followed by a read - * of LAWAR before any device try to use any of windows. - * What more the read of LAWAR should be followed by isync - * instruction. - */ - - isync(); -} - -static inline void -law_read(uint32_t n, uint64_t *bar, uint32_t *sr) -{ - - if (mpc85xx_is_qoriq()) { - *bar = (uint64_t)ccsr_read4(OCP85XX_LAWBARH(n)) << 32 | - ccsr_read4(OCP85XX_LAWBARL(n)); - *sr = ccsr_read4(OCP85XX_LAWSR_QORIQ(n)); - } else { - *bar = (uint64_t)ccsr_read4(OCP85XX_LAWBAR(n)) << 12; - *sr = ccsr_read4(OCP85XX_LAWSR_85XX(n)); - } -} - -static int -law_find_free(void) -{ - uint32_t i,sr; - uint64_t bar; - int law_max; - - law_max = law_getmax(); - /* Find free LAW */ - for (i = 0; i < law_max; i++) { - law_read(i, &bar, &sr); - if ((sr & 0x80000000) == 0) - break; - } - - return (i); -} - -#define _LAW_SR(trgt,size) (0x80000000 | (trgt << 20) | \ - (flsl(size + (size - 1)) - 2)) - -int -law_enable(int trgt, uint64_t bar, uint32_t size) -{ - uint64_t bar_tmp; - uint32_t sr, sr_tmp; - int i, law_max; - - if (size == 0) - return (0); - - law_max = law_getmax(); - sr = _LAW_SR(trgt, size); - - /* Bail if already programmed. */ - for (i = 0; i < law_max; i++) { - law_read(i, &bar_tmp, &sr_tmp); - if (sr == sr_tmp && bar == bar_tmp) - return (0); - } - - /* Find an unused access window. */ - i = law_find_free(); - - if (i == law_max) - return (ENOSPC); - - law_write(i, bar, sr); - return (0); -} - -int -law_disable(int trgt, uint64_t bar, uint32_t size) -{ - uint64_t bar_tmp; - uint32_t sr, sr_tmp; - int i, law_max; - - law_max = law_getmax(); - sr = _LAW_SR(trgt, size); - - /* Find and disable requested LAW. */ - for (i = 0; i < law_max; i++) { - law_read(i, &bar_tmp, &sr_tmp); - if (sr == sr_tmp && bar == bar_tmp) { - law_write(i, 0, 0); - return (0); - } - } - - return (ENOENT); -} - -int -law_pci_target(struct resource *res, int *trgt_mem, int *trgt_io) -{ - u_long start; - uint32_t ver; - int trgt, rv; - - ver = SVR_VER(mfspr(SPR_SVR)); - - start = rman_get_start(res) & 0xf000; - - rv = 0; - trgt = -1; - switch (start) { - case 0x0000: - case 0x8000: - trgt = 0; - break; - case 0x1000: - case 0x9000: - trgt = 1; - break; - case 0x2000: - case 0xa000: - if (ver == SVR_MPC8548E || ver == SVR_MPC8548) - trgt = 3; - else - trgt = 2; - break; - case 0x3000: - case 0xb000: - if (ver == SVR_MPC8548E || ver == SVR_MPC8548) - rv = EINVAL; - else - trgt = 3; - break; - default: - rv = ENXIO; - } - if (rv == 0) { - *trgt_mem = trgt; - *trgt_io = trgt; - } - return (rv); -} - -static void -l3cache_inval(void) -{ - - /* Flash invalidate the CPC and clear all the locks */ - ccsr_write4(OCP85XX_CPC_CSR0, OCP85XX_CPC_CSR0_FI | - OCP85XX_CPC_CSR0_LFC); - while (ccsr_read4(OCP85XX_CPC_CSR0) & (OCP85XX_CPC_CSR0_FI | - OCP85XX_CPC_CSR0_LFC)) - ; -} - -static void -l3cache_enable(void) -{ - - ccsr_write4(OCP85XX_CPC_CSR0, OCP85XX_CPC_CSR0_CE | - OCP85XX_CPC_CSR0_PE); - /* Read back to sync write */ - ccsr_read4(OCP85XX_CPC_CSR0); -} - -void -mpc85xx_enable_l3_cache(void) -{ - uint32_t csr, size, ver; - - /* Enable L3 CoreNet Platform Cache (CPC) */ - ver = SVR_VER(mfspr(SPR_SVR)); - if (ver == SVR_P2041 || ver == SVR_P2041E || ver == SVR_P3041 || - ver == SVR_P3041E || ver == SVR_P5020 || ver == SVR_P5020E) { - csr = ccsr_read4(OCP85XX_CPC_CSR0); - if ((csr & OCP85XX_CPC_CSR0_CE) == 0) { - l3cache_inval(); - l3cache_enable(); - } - - csr = ccsr_read4(OCP85XX_CPC_CSR0); - if ((boothowto & RB_VERBOSE) != 0 || - (csr & OCP85XX_CPC_CSR0_CE) == 0) { - size = OCP85XX_CPC_CFG0_SZ_K(ccsr_read4(OCP85XX_CPC_CFG0)); - printf("L3 Corenet Platform Cache: %d KB %sabled\n", - size, (csr & OCP85XX_CPC_CSR0_CE) == 0 ? - "dis" : "en"); - } - } -} - -int -mpc85xx_is_qoriq(void) -{ - uint16_t pvr = mfpvr() >> 16; - - /* QorIQ register set is only in e500mc and derivative core based SoCs. */ - if (pvr == FSL_E500mc || pvr == FSL_E5500 || pvr == FSL_E6500) - return (1); - - return (0); -} - -uint32_t -mpc85xx_get_platform_clock(void) -{ - phandle_t soc; - static uint32_t freq; - - if (freq != 0) - return (freq); - - soc = OF_finddevice("/soc"); - - /* freq isn't modified on error. */ - OF_getencprop(soc, "bus-frequency", (void *)&freq, sizeof(freq)); - - return (freq); -} - -uint32_t -mpc85xx_get_system_clock(void) -{ - uint32_t freq; - - freq = mpc85xx_get_platform_clock(); - - return (freq / 2); -} diff --git a/sys/powerpc/mpc85xx/mpc85xx.h b/sys/powerpc/mpc85xx/mpc85xx.h deleted file mode 100644 index 669e8be446a..00000000000 --- a/sys/powerpc/mpc85xx/mpc85xx.h +++ /dev/null @@ -1,175 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2008 Semihalf, Rafal Jaworowski - * Copyright 2006 by Juniper Networks. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MPC85XX_H_ -#define _MPC85XX_H_ - -#include - -/* - * Configuration control and status registers - */ -extern vm_offset_t ccsrbar_va; -extern vm_paddr_t ccsrbar_pa; -extern vm_size_t ccsrbar_size; -#define CCSRBAR_VA ccsrbar_va -#define OCP85XX_CCSRBAR (CCSRBAR_VA + 0x0) -#define OCP85XX_BPTR (CCSRBAR_VA + 0x20) - -#define OCP85XX_BSTRH (CCSRBAR_VA + 0x20) -#define OCP85XX_BSTRL (CCSRBAR_VA + 0x24) -#define OCP85XX_BSTAR (CCSRBAR_VA + 0x28) - -#define OCP85XX_COREDISR (CCSRBAR_VA + 0xE0094) -#define OCP85XX_BRR (CCSRBAR_VA + 0xE00E4) - -/* - * Run Control and Power Management registers - */ -#define CCSR_CTBENR (CCSRBAR_VA + 0xE2084) -#define CCSR_CTBCKSELR (CCSRBAR_VA + 0xE208C) -#define CCSR_CTBCHLTCR (CCSRBAR_VA + 0xE2094) - -/* - * DDR Memory controller. - */ -#define OCP85XX_DDR1_CS0_CONFIG (CCSRBAR_VA + 0x8080) - -/* - * E500 Coherency Module registers - */ -#define OCP85XX_EEBPCR (CCSRBAR_VA + 0x1010) - -/* - * Local access registers - */ -/* Write order: OCP_LAWBARH -> OCP_LAWBARL -> OCP_LAWSR */ -#define OCP85XX_LAWBARH(n) (CCSRBAR_VA + 0xc00 + 0x10 * (n)) -#define OCP85XX_LAWBARL(n) (CCSRBAR_VA + 0xc04 + 0x10 * (n)) -#define OCP85XX_LAWSR_QORIQ(n) (CCSRBAR_VA + 0xc08 + 0x10 * (n)) -#define OCP85XX_LAWBAR(n) (CCSRBAR_VA + 0xc08 + 0x10 * (n)) -#define OCP85XX_LAWSR_85XX(n) (CCSRBAR_VA + 0xc10 + 0x10 * (n)) -#define OCP85XX_LAWSR(n) (mpc85xx_is_qoriq() ? OCP85XX_LAWSR_QORIQ(n) : \ - OCP85XX_LAWSR_85XX(n)) - -/* Attribute register */ -#define OCP85XX_ENA_MASK 0x80000000 -#define OCP85XX_DIS_MASK 0x7fffffff - -#define OCP85XX_TGTIF_LBC_QORIQ 0x1f -#define OCP85XX_TGTIF_RAM_INTL_QORIQ 0x14 -#define OCP85XX_TGTIF_RAM1_QORIQ 0x10 -#define OCP85XX_TGTIF_RAM2_QORIQ 0x11 -#define OCP85XX_TGTIF_BMAN 0x18 -#define OCP85XX_TGTIF_DCSR 0x1D -#define OCP85XX_TGTIF_QMAN 0x3C -#define OCP85XX_TRGT_SHIFT_QORIQ 20 - -#define OCP85XX_TGTIF_LBC_85XX 0x04 -#define OCP85XX_TGTIF_RAM_INTL_85XX 0x0b -#define OCP85XX_TGTIF_RIO_85XX 0x0c -#define OCP85XX_TGTIF_RAM1_85XX 0x0f -#define OCP85XX_TGTIF_RAM2_85XX 0x16 - -#define OCP85XX_TGTIF_LBC \ - (mpc85xx_is_qoriq() ? OCP85XX_TGTIF_LBC_QORIQ : OCP85XX_TGTIF_LBC_85XX) -#define OCP85XX_TGTIF_RAM_INTL \ - (mpc85xx_is_qoriq() ? OCP85XX_TGTIF_RAM_INTL_QORIQ : OCP85XX_TGTIF_RAM_INTL_85XX) -#define OCP85XX_TGTIF_RIO \ - (mpc85xx_is_qoriq() ? OCP85XX_TGTIF_RIO_QORIQ : OCP85XX_TGTIF_RIO_85XX) -#define OCP85XX_TGTIF_RAM1 \ - (mpc85xx_is_qoriq() ? OCP85XX_TGTIF_RAM1_QORIQ : OCP85XX_TGTIF_RAM1_85XX) -#define OCP85XX_TGTIF_RAM2 \ - (mpc85xx_is_qoriq() ? OCP85XX_TGTIF_RAM2_QORIQ : OCP85XX_TGTIF_RAM2_85XX) - -/* - * L2 cache registers - */ -#define OCP85XX_L2CTL (CCSRBAR_VA + 0x20000) - -/* - * L3 CoreNet platform cache (CPC) registers - */ -#define OCP85XX_CPC_CSR0 (CCSRBAR_VA + 0x10000) -#define OCP85XX_CPC_CSR0_CE 0x80000000 -#define OCP85XX_CPC_CSR0_PE 0x40000000 -#define OCP85XX_CPC_CSR0_FI 0x00200000 -#define OCP85XX_CPC_CSR0_WT 0x00080000 -#define OCP85XX_CPC_CSR0_FL 0x00000800 -#define OCP85XX_CPC_CSR0_LFC 0x00000400 -#define OCP85XX_CPC_CFG0 (CCSRBAR_VA + 0x10008) -#define OCP85XX_CPC_CFG_SZ_MASK 0x00003fff -#define OCP85XX_CPC_CFG0_SZ_K(x) (((x) & OCP85XX_CPC_CFG_SZ_MASK) << 6) - -/* - * Power-On Reset configuration - */ -#define OCP85XX_PORDEVSR (CCSRBAR_VA + 0xe000c) -#define OCP85XX_PORDEVSR_IO_SEL 0x00780000 -#define OCP85XX_PORDEVSR_IO_SEL_SHIFT 19 - -#define OCP85XX_PORDEVSR2 (CCSRBAR_VA + 0xe0014) - -/* - * Status Registers. - */ -#define OCP85XX_RSTCR (CCSRBAR_VA + 0xe00b0) - -#define OCP85XX_CLKDVDR (CCSRBAR_VA + 0xe0800) -#define OCP85XX_CLKDVDR_PXCKEN 0x80000000 -#define OCP85XX_CLKDVDR_SSICKEN 0x20000000 -#define OCP85XX_CLKDVDR_PXCKINV 0x10000000 -#define OCP85XX_CLKDVDR_PXCLK_MASK 0x00FF0000 -#define OCP85XX_CLKDVDR_SSICLK_MASK 0x000000FF - -/* - * Run Control/Power Management Registers. - */ -#define OCP85XX_RCPM_CDOZSR (CCSRBAR_VA + 0xe2004) -#define OCP85XX_RCPM_CDOZCR (CCSRBAR_VA + 0xe200c) - -/* - * Prototypes. - */ -uint32_t ccsr_read4(uintptr_t addr); -void ccsr_write4(uintptr_t addr, uint32_t val); -int law_enable(int trgt, uint64_t bar, uint32_t size); -int law_disable(int trgt, uint64_t bar, uint32_t size); -int law_getmax(void); -int law_pci_target(struct resource *, int *, int *); - -DECLARE_CLASS(mpc85xx_platform); -int mpc85xx_attach(platform_t); - -void mpc85xx_enable_l3_cache(void); -int mpc85xx_is_qoriq(void); -uint32_t mpc85xx_get_platform_clock(void); -uint32_t mpc85xx_get_system_clock(void); - -#endif /* _MPC85XX_H_ */ diff --git a/sys/powerpc/mpc85xx/mpc85xx_cache.c b/sys/powerpc/mpc85xx/mpc85xx_cache.c deleted file mode 100644 index 55ffcab66dc..00000000000 --- a/sys/powerpc/mpc85xx/mpc85xx_cache.c +++ /dev/null @@ -1,160 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2018 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include - -#include - -#include -#include - -/* - * From the P1022 manual, sequence for writing to L2CTL is: - * - mbar - * - isync - * - write - * - read - * - mbar - */ -#define L2_CTL 0x0 -#define L2CTL_L2E 0x80000000 -#define L2CTL_L2I 0x40000000 -struct mpc85xx_cache_softc { - struct resource *sc_mem; -}; - -static struct ofw_compat_data compats[] = { - {"fsl,8540-l2-cache-controller", 1}, - {"fsl,8541-l2-cache-controller", 1}, - {"fsl,8544-l2-cache-controller", 1}, - {"fsl,8548-l2-cache-controller", 1}, - {"fsl,8555-l2-cache-controller", 1}, - {"fsl,8568-l2-cache-controller", 1}, - {"fsl,b4420-l2-cache-controller", 1}, - {"fsl,b4860-l2-cache-controller", 1}, - {"fsl,bsc9131-l2-cache-controller", 1}, - {"fsl,bsc9132-l2-cache-controller", 1}, - {"fsl,c293-l2-cache-controller", 1}, - {"fsl,mpc8536-l2-cache-controller", 1}, - {"fsl,mpc8540-l2-cache-controller", 1}, - {"fsl,mpc8541-l2-cache-controller", 1}, - {"fsl,mpc8544-l2-cache-controller", 1}, - {"fsl,mpc8548-l2-cache-controller", 1}, - {"fsl,mpc8555-l2-cache-controller", 1}, - {"fsl,mpc8560-l2-cache-controller", 1}, - {"fsl,mpc8568-l2-cache-controller", 1}, - {"fsl,mpc8569-l2-cache-controller", 1}, - {"fsl,mpc8572-l2-cache-controller", 1}, - {"fsl,p1010-l2-cache-controller", 1}, - {"fsl,p1011-l2-cache-controller", 1}, - {"fsl,p1012-l2-cache-controller", 1}, - {"fsl,p1013-l2-cache-controller", 1}, - {"fsl,p1014-l2-cache-controller", 1}, - {"fsl,p1015-l2-cache-controller", 1}, - {"fsl,p1016-l2-cache-controller", 1}, - {"fsl,p1020-l2-cache-controller", 1}, - {"fsl,p1021-l2-cache-controller", 1}, - {"fsl,p1022-l2-cache-controller", 1}, - {"fsl,p1023-l2-cache-controller", 1}, - {"fsl,p1024-l2-cache-controller", 1}, - {"fsl,p1025-l2-cache-controller", 1}, - {"fsl,p2010-l2-cache-controller", 1}, - {"fsl,p2020-l2-cache-controller", 1}, - {"fsl,t2080-l2-cache-controller", 1}, - {"fsl,t4240-l2-cache-controller", 1}, - {0, 0} -}; - -static int -mpc85xx_cache_probe(device_t dev) -{ - - if (ofw_bus_search_compatible(dev, compats)->ocd_str == NULL) - return (ENXIO); - - device_set_desc(dev, "MPC85xx L2 cache"); - return (0); -} - -static int -mpc85xx_cache_attach(device_t dev) -{ - struct mpc85xx_cache_softc *sc = device_get_softc(dev); - int rid; - int cache_line_size, cache_size; - - /* Map registers. */ - rid = 0; - sc->sc_mem = bus_alloc_resource_any(dev, - SYS_RES_MEMORY, &rid, RF_ACTIVE); - if (sc->sc_mem == NULL) - return (ENOMEM); - - /* Enable cache and flash invalidate. */ - __asm __volatile ("mbar; isync" ::: "memory"); - bus_write_4(sc->sc_mem, L2_CTL, L2CTL_L2E | L2CTL_L2I); - bus_read_4(sc->sc_mem, L2_CTL); - __asm __volatile ("mbar" ::: "memory"); - - cache_line_size = 0; - cache_size = 0; - OF_getencprop(ofw_bus_get_node(dev), "cache-size", &cache_size, - sizeof(cache_size)); - OF_getencprop(ofw_bus_get_node(dev), "cache-line-size", - &cache_line_size, sizeof(cache_line_size)); - - if (cache_line_size != 0 && cache_size != 0) - device_printf(dev, - "L2 cache size: %dKB, cache line size: %d bytes\n", - cache_size / 1024, cache_line_size); - - return (0); -} - -static device_method_t mpc85xx_cache_methods[] = { - /* device methods */ - DEVMETHOD(device_probe, mpc85xx_cache_probe), - DEVMETHOD(device_attach, mpc85xx_cache_attach), - - DEVMETHOD_END -}; - -static driver_t mpc85xx_cache_driver = { - "cache", - mpc85xx_cache_methods, - sizeof(struct mpc85xx_cache_softc), -}; -static devclass_t mpc85xx_cache_devclass; - -EARLY_DRIVER_MODULE(mpc85xx_cache, simplebus, mpc85xx_cache_driver, - mpc85xx_cache_devclass, NULL, NULL, - BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE); diff --git a/sys/powerpc/mpc85xx/mpc85xx_gpio.c b/sys/powerpc/mpc85xx/mpc85xx_gpio.c deleted file mode 100644 index 68253970068..00000000000 --- a/sys/powerpc/mpc85xx/mpc85xx_gpio.c +++ /dev/null @@ -1,292 +0,0 @@ -/*- - * Copyright (c) 2015 Justin Hibbits - * Copyright (c) 2013 Thomas Skibo - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include - -#include "gpio_if.h" - -#define MAXPIN (7) - -#define VALID_PIN(u) ((u) >= 0 && (u) <= MAXPIN) - -#define GPIO_LOCK(sc) mtx_lock(&(sc)->sc_mtx) -#define GPIO_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx) -#define GPIO_LOCK_INIT(sc) \ - mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->dev), \ - "gpio", MTX_DEF) -#define GPIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); - -struct mpc85xx_gpio_softc { - device_t dev; - device_t busdev; - struct mtx sc_mtx; - struct resource *out_res; /* Memory resource */ - struct resource *in_res; -}; - -static device_t -mpc85xx_gpio_get_bus(device_t dev) -{ - struct mpc85xx_gpio_softc *sc; - - sc = device_get_softc(dev); - - return (sc->busdev); -} - -static int -mpc85xx_gpio_pin_max(device_t dev, int *maxpin) -{ - - *maxpin = MAXPIN; - return (0); -} - -/* Get a specific pin's capabilities. */ -static int -mpc85xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) -{ - - if (!VALID_PIN(pin)) - return (EINVAL); - - *caps = (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT); - - return (0); -} - -/* Get a specific pin's name. */ -static int -mpc85xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name) -{ - - if (!VALID_PIN(pin)) - return (EINVAL); - - snprintf(name, GPIOMAXNAME, "GPIO%d", pin); - name[GPIOMAXNAME-1] = '\0'; - - return (0); -} - -/* Set a specific output pin's value. */ -static int -mpc85xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) -{ - struct mpc85xx_gpio_softc *sc = device_get_softc(dev); - uint32_t outvals; - uint8_t pinbit; - - if (!VALID_PIN(pin) || value > 1) - return (EINVAL); - - GPIO_LOCK(sc); - pinbit = 31 - pin; - - outvals = bus_read_4(sc->out_res, 0); - outvals &= ~(1 << pinbit); - outvals |= (value << pinbit); - bus_write_4(sc->out_res, 0, outvals); - - GPIO_UNLOCK(sc); - - return (0); -} - -/* Get a specific pin's input value. */ -static int -mpc85xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *value) -{ - struct mpc85xx_gpio_softc *sc = device_get_softc(dev); - - if (!VALID_PIN(pin)) - return (EINVAL); - - *value = (bus_read_4(sc->in_res, 0) >> (31 - pin)) & 1; - - return (0); -} - -/* Toggle a pin's output value. */ -static int -mpc85xx_gpio_pin_toggle(device_t dev, uint32_t pin) -{ - struct mpc85xx_gpio_softc *sc = device_get_softc(dev); - uint32_t val; - - if (!VALID_PIN(pin)) - return (EINVAL); - - GPIO_LOCK(sc); - - val = bus_read_4(sc->out_res, 0); - val ^= (1 << (31 - pin)); - bus_write_4(sc->out_res, 0, val); - - GPIO_UNLOCK(sc); - - return (0); -} - -static int -mpc85xx_gpio_probe(device_t dev) -{ - uint32_t svr; - - if (!ofw_bus_status_okay(dev)) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "gpio")) - return (ENXIO); - - svr = mfspr(SPR_SVR); - switch (SVR_VER(svr)) { - case SVR_MPC8533: - case SVR_MPC8533E: - break; - default: - return (ENXIO); - } - - device_set_desc(dev, "MPC85xx GPIO driver"); - return (0); -} - -static int mpc85xx_gpio_detach(device_t dev); - -static int -mpc85xx_gpio_attach(device_t dev) -{ - struct mpc85xx_gpio_softc *sc = device_get_softc(dev); - int rid; - - sc->dev = dev; - - GPIO_LOCK_INIT(sc); - - /* Allocate memory. */ - rid = 0; - sc->out_res = bus_alloc_resource_any(dev, - SYS_RES_MEMORY, &rid, RF_ACTIVE); - if (sc->out_res == NULL) { - device_printf(dev, "Can't allocate memory for device output port"); - mpc85xx_gpio_detach(dev); - return (ENOMEM); - } - - rid = 1; - sc->in_res = bus_alloc_resource_any(dev, - SYS_RES_MEMORY, &rid, RF_ACTIVE); - if (sc->in_res == NULL) { - device_printf(dev, "Can't allocate memory for device input port"); - mpc85xx_gpio_detach(dev); - return (ENOMEM); - } - - sc->busdev = gpiobus_attach_bus(dev); - if (sc->busdev == NULL) { - mpc85xx_gpio_detach(dev); - return (ENOMEM); - } - - OF_device_register_xref(OF_xref_from_node(ofw_bus_get_node(dev)), dev); - - return (0); -} - -static int -mpc85xx_gpio_detach(device_t dev) -{ - struct mpc85xx_gpio_softc *sc = device_get_softc(dev); - - gpiobus_detach_bus(dev); - - if (sc->out_res != NULL) { - /* Release output port resource. */ - bus_release_resource(dev, SYS_RES_MEMORY, - rman_get_rid(sc->out_res), sc->out_res); - } - - if (sc->in_res != NULL) { - /* Release input port resource. */ - bus_release_resource(dev, SYS_RES_MEMORY, - rman_get_rid(sc->in_res), sc->in_res); - } - - GPIO_LOCK_DESTROY(sc); - - return (0); -} - -static device_method_t mpc85xx_gpio_methods[] = { - /* device_if */ - DEVMETHOD(device_probe, mpc85xx_gpio_probe), - DEVMETHOD(device_attach, mpc85xx_gpio_attach), - DEVMETHOD(device_detach, mpc85xx_gpio_detach), - - /* GPIO protocol */ - DEVMETHOD(gpio_get_bus, mpc85xx_gpio_get_bus), - DEVMETHOD(gpio_pin_max, mpc85xx_gpio_pin_max), - DEVMETHOD(gpio_pin_getname, mpc85xx_gpio_pin_getname), - DEVMETHOD(gpio_pin_getcaps, mpc85xx_gpio_pin_getcaps), - DEVMETHOD(gpio_pin_get, mpc85xx_gpio_pin_get), - DEVMETHOD(gpio_pin_set, mpc85xx_gpio_pin_set), - DEVMETHOD(gpio_pin_toggle, mpc85xx_gpio_pin_toggle), - - DEVMETHOD_END -}; - -static driver_t mpc85xx_gpio_driver = { - "gpio", - mpc85xx_gpio_methods, - sizeof(struct mpc85xx_gpio_softc), -}; -static devclass_t mpc85xx_gpio_devclass; - -EARLY_DRIVER_MODULE(mpc85xx_gpio, simplebus, mpc85xx_gpio_driver, - mpc85xx_gpio_devclass, NULL, NULL, - BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE); diff --git a/sys/powerpc/mpc85xx/pci_mpc85xx.c b/sys/powerpc/mpc85xx/pci_mpc85xx.c deleted file mode 100644 index 8de58d639e9..00000000000 --- a/sys/powerpc/mpc85xx/pci_mpc85xx.c +++ /dev/null @@ -1,956 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2006-2007 by Juniper Networks. - * Copyright 2008 Semihalf. - * Copyright 2010 The FreeBSD Foundation - * All rights reserved. - * - * Portions of this software were developed by Semihalf - * under sponsorship from the FreeBSD Foundation. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * From: FreeBSD: src/sys/powerpc/mpc85xx/pci_ocp.c,v 1.9 2010/03/23 23:46:28 marcel - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include "ofw_bus_if.h" -#include "pcib_if.h" -#include "pic_if.h" - -#include -#include -#include - -#include - -#define REG_CFG_ADDR 0x0000 -#define CONFIG_ACCESS_ENABLE 0x80000000 - -#define REG_CFG_DATA 0x0004 -#define REG_INT_ACK 0x0008 - -#define REG_PEX_IP_BLK_REV1 0x0bf8 -#define IP_MJ_M 0x0000ff00 -#define IP_MJ_S 8 -#define IP_MN_M 0x000000ff -#define IP_MN_S 0 - -#define REG_POTAR(n) (0x0c00 + 0x20 * (n)) -#define REG_POTEAR(n) (0x0c04 + 0x20 * (n)) -#define REG_POWBAR(n) (0x0c08 + 0x20 * (n)) -#define REG_POWAR(n) (0x0c10 + 0x20 * (n)) - -#define REG_PITAR(n) (0x0e00 - 0x20 * (n)) -#define REG_PIWBAR(n) (0x0e08 - 0x20 * (n)) -#define REG_PIWBEAR(n) (0x0e0c - 0x20 * (n)) -#define REG_PIWAR(n) (0x0e10 - 0x20 * (n)) -#define PIWAR_EN 0x80000000 -#define PIWAR_PF 0x40000000 -#define PIWAR_TRGT_M 0x00f00000 -#define PIWAR_TRGT_S 20 -#define PIWAR_TRGT_CCSR 0xe -#define PIWAR_TRGT_LOCAL 0xf - -#define REG_PEX_MES_DR 0x0020 -#define REG_PEX_MES_IER 0x0028 -#define REG_PEX_ERR_DR 0x0e00 -#define REG_PEX_ERR_EN 0x0e08 - -#define REG_PEX_ERR_DR 0x0e00 -#define REG_PEX_ERR_DR_ME 0x80000000 -#define REG_PEX_ERR_DR_PCT 0x800000 -#define REG_PEX_ERR_DR_PAT 0x400000 -#define REG_PEX_ERR_DR_PCAC 0x200000 -#define REG_PEX_ERR_DR_PNM 0x100000 -#define REG_PEX_ERR_DR_CDNSC 0x80000 -#define REG_PEX_ERR_DR_CRSNC 0x40000 -#define REG_PEX_ERR_DR_ICCA 0x20000 -#define REG_PEX_ERR_DR_IACA 0x10000 -#define REG_PEX_ERR_DR_CRST 0x8000 -#define REG_PEX_ERR_DR_MIS 0x4000 -#define REG_PEX_ERR_DR_IOIS 0x2000 -#define REG_PEX_ERR_DR_CIS 0x1000 -#define REG_PEX_ERR_DR_CIEP 0x800 -#define REG_PEX_ERR_DR_IOIEP 0x400 -#define REG_PEX_ERR_DR_OAC 0x200 -#define REG_PEX_ERR_DR_IOIA 0x100 -#define REG_PEX_ERR_DR_IMBA 0x80 -#define REG_PEX_ERR_DR_IIOBA 0x40 -#define REG_PEX_ERR_DR_LDDE 0x20 -#define REG_PEX_ERR_EN 0x0e08 - -#define PCIR_LTSSM 0x404 -#define LTSSM_STAT_L0 0x16 - -#define DEVFN(b, s, f) ((b << 16) | (s << 8) | f) - -#define FSL_NUM_MSIS 256 /* 8 registers of 32 bits (8 hardware IRQs) */ -#define PCI_SLOT_FIRST 0x1 /* used to be 0x11 but qemu-ppce500 starts from 0x1 */ - -struct fsl_pcib_softc { - struct ofw_pci_softc pci_sc; - device_t sc_dev; - struct mtx sc_cfg_mtx; - int sc_ip_maj; - int sc_ip_min; - - int sc_iomem_target; - bus_addr_t sc_iomem_start, sc_iomem_end; - int sc_ioport_target; - bus_addr_t sc_ioport_start, sc_ioport_end; - - struct resource *sc_res; - bus_space_handle_t sc_bsh; - bus_space_tag_t sc_bst; - int sc_rid; - - struct resource *sc_irq_res; - void *sc_ih; - - int sc_busnr; - int sc_pcie; - uint8_t sc_pcie_capreg; /* PCI-E Capability Reg Set */ -}; - -struct fsl_pcib_err_dr { - const char *msg; - uint32_t err_dr_mask; -}; - -struct fsl_msi_map { - SLIST_ENTRY(fsl_msi_map) slist; - uint32_t irq_base; - bus_addr_t target; -}; - -SLIST_HEAD(msi_head, fsl_msi_map) fsl_msis = SLIST_HEAD_INITIALIZER(msi_head); - -static const struct fsl_pcib_err_dr pci_err[] = { - {"ME", REG_PEX_ERR_DR_ME}, - {"PCT", REG_PEX_ERR_DR_PCT}, - {"PAT", REG_PEX_ERR_DR_PAT}, - {"PCAC", REG_PEX_ERR_DR_PCAC}, - {"PNM", REG_PEX_ERR_DR_PNM}, - {"CDNSC", REG_PEX_ERR_DR_CDNSC}, - {"CRSNC", REG_PEX_ERR_DR_CRSNC}, - {"ICCA", REG_PEX_ERR_DR_ICCA}, - {"IACA", REG_PEX_ERR_DR_IACA}, - {"CRST", REG_PEX_ERR_DR_CRST}, - {"MIS", REG_PEX_ERR_DR_MIS}, - {"IOIS", REG_PEX_ERR_DR_IOIS}, - {"CIS", REG_PEX_ERR_DR_CIS}, - {"CIEP", REG_PEX_ERR_DR_CIEP}, - {"IOIEP", REG_PEX_ERR_DR_IOIEP}, - {"OAC", REG_PEX_ERR_DR_OAC}, - {"IOIA", REG_PEX_ERR_DR_IOIA}, - {"IMBA", REG_PEX_ERR_DR_IMBA}, - {"IIOBA", REG_PEX_ERR_DR_IIOBA}, - {"LDDE", REG_PEX_ERR_DR_LDDE} -}; - -/* Local forward declerations. */ -static uint32_t fsl_pcib_cfgread(struct fsl_pcib_softc *, u_int, u_int, u_int, - u_int, int); -static void fsl_pcib_cfgwrite(struct fsl_pcib_softc *, u_int, u_int, u_int, - u_int, uint32_t, int); -static int fsl_pcib_decode_win(phandle_t, struct fsl_pcib_softc *); -static void fsl_pcib_err_init(device_t); -static void fsl_pcib_inbound(struct fsl_pcib_softc *, int, int, uint64_t, - uint64_t, uint64_t); -static void fsl_pcib_outbound(struct fsl_pcib_softc *, int, int, uint64_t, - uint64_t, uint64_t); - -/* Forward declerations. */ -static int fsl_pcib_attach(device_t); -static int fsl_pcib_detach(device_t); -static int fsl_pcib_probe(device_t); - -static int fsl_pcib_maxslots(device_t); -static uint32_t fsl_pcib_read_config(device_t, u_int, u_int, u_int, u_int, int); -static void fsl_pcib_write_config(device_t, u_int, u_int, u_int, u_int, - uint32_t, int); -static int fsl_pcib_alloc_msi(device_t dev, device_t child, - int count, int maxcount, int *irqs); -static int fsl_pcib_release_msi(device_t dev, device_t child, - int count, int *irqs); -static int fsl_pcib_alloc_msix(device_t dev, device_t child, int *irq); -static int fsl_pcib_release_msix(device_t dev, device_t child, int irq); -static int fsl_pcib_map_msi(device_t dev, device_t child, - int irq, uint64_t *addr, uint32_t *data); - -static vmem_t *msi_vmem; /* Global MSI vmem, holds all MSI ranges. */ - -/* - * Bus interface definitions. - */ -static device_method_t fsl_pcib_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, fsl_pcib_probe), - DEVMETHOD(device_attach, fsl_pcib_attach), - DEVMETHOD(device_detach, fsl_pcib_detach), - - /* pcib interface */ - DEVMETHOD(pcib_maxslots, fsl_pcib_maxslots), - DEVMETHOD(pcib_read_config, fsl_pcib_read_config), - DEVMETHOD(pcib_write_config, fsl_pcib_write_config), - DEVMETHOD(pcib_alloc_msi, fsl_pcib_alloc_msi), - DEVMETHOD(pcib_release_msi, fsl_pcib_release_msi), - DEVMETHOD(pcib_alloc_msix, fsl_pcib_alloc_msix), - DEVMETHOD(pcib_release_msix, fsl_pcib_release_msix), - DEVMETHOD(pcib_map_msi, fsl_pcib_map_msi), - - DEVMETHOD_END -}; - -static devclass_t fsl_pcib_devclass; - -DEFINE_CLASS_1(pcib, fsl_pcib_driver, fsl_pcib_methods, - sizeof(struct fsl_pcib_softc), ofw_pci_driver); -EARLY_DRIVER_MODULE(pcib, ofwbus, fsl_pcib_driver, fsl_pcib_devclass, 0, 0, - BUS_PASS_BUS); - -static void -fsl_pcib_err_intr(void *v) -{ - struct fsl_pcib_softc *sc; - device_t dev; - uint32_t err_reg, clear_reg; - uint8_t i; - - dev = (device_t)v; - sc = device_get_softc(dev); - - clear_reg = 0; - err_reg = bus_space_read_4(sc->sc_bst, sc->sc_bsh, REG_PEX_ERR_DR); - - /* Check which one error occurred */ - for (i = 0; i < sizeof(pci_err)/sizeof(struct fsl_pcib_err_dr); i++) { - if (err_reg & pci_err[i].err_dr_mask) { - device_printf(dev, "PCI %d: report %s error\n", - device_get_unit(dev), pci_err[i].msg); - clear_reg |= pci_err[i].err_dr_mask; - } - } - - /* Clear pending errors */ - bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_PEX_ERR_DR, clear_reg); -} - -static int -fsl_pcib_probe(device_t dev) -{ - - if (ofw_bus_get_type(dev) == NULL || - strcmp(ofw_bus_get_type(dev), "pci") != 0) - return (ENXIO); - - if (!(ofw_bus_is_compatible(dev, "fsl,mpc8540-pci") || - ofw_bus_is_compatible(dev, "fsl,mpc8540-pcie") || - ofw_bus_is_compatible(dev, "fsl,mpc8548-pcie") || - ofw_bus_is_compatible(dev, "fsl,p5020-pcie") || - ofw_bus_is_compatible(dev, "fsl,qoriq-pcie-v2.2") || - ofw_bus_is_compatible(dev, "fsl,qoriq-pcie"))) - return (ENXIO); - - device_set_desc(dev, "Freescale Integrated PCI/PCI-E Controller"); - return (BUS_PROBE_DEFAULT); -} - -static int -fsl_pcib_attach(device_t dev) -{ - struct fsl_pcib_softc *sc; - phandle_t node; - uint32_t cfgreg, brctl, ipreg; - int error, rid; - uint8_t ltssm, capptr; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - - sc->sc_rid = 0; - sc->sc_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rid, - RF_ACTIVE); - if (sc->sc_res == NULL) { - device_printf(dev, "could not map I/O memory\n"); - return (ENXIO); - } - sc->sc_bst = rman_get_bustag(sc->sc_res); - sc->sc_bsh = rman_get_bushandle(sc->sc_res); - sc->sc_busnr = 0; - - ipreg = bus_read_4(sc->sc_res, REG_PEX_IP_BLK_REV1); - sc->sc_ip_min = (ipreg & IP_MN_M) >> IP_MN_S; - sc->sc_ip_maj = (ipreg & IP_MJ_M) >> IP_MJ_S; - mtx_init(&sc->sc_cfg_mtx, "pcicfg", NULL, MTX_SPIN); - - cfgreg = fsl_pcib_cfgread(sc, 0, 0, 0, PCIR_VENDOR, 2); - if (cfgreg != 0x1057 && cfgreg != 0x1957) - goto err; - - capptr = fsl_pcib_cfgread(sc, 0, 0, 0, PCIR_CAP_PTR, 1); - while (capptr != 0) { - cfgreg = fsl_pcib_cfgread(sc, 0, 0, 0, capptr, 2); - switch (cfgreg & 0xff) { - case PCIY_PCIX: - break; - case PCIY_EXPRESS: - sc->sc_pcie = 1; - sc->sc_pcie_capreg = capptr; - break; - } - capptr = (cfgreg >> 8) & 0xff; - } - - node = ofw_bus_get_node(dev); - - /* - * Initialize generic OF PCI interface (ranges, etc.) - */ - - error = ofw_pci_init(dev); - if (error) - return (error); - - /* - * Configure decode windows for PCI(E) access. - */ - if (fsl_pcib_decode_win(node, sc) != 0) - goto err; - - cfgreg = fsl_pcib_cfgread(sc, 0, 0, 0, PCIR_COMMAND, 2); - cfgreg |= PCIM_CMD_SERRESPEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN | - PCIM_CMD_PORTEN; - fsl_pcib_cfgwrite(sc, 0, 0, 0, PCIR_COMMAND, cfgreg, 2); - - /* Reset the bus. Needed for Radeon video cards. */ - brctl = fsl_pcib_read_config(sc->sc_dev, 0, 0, 0, - PCIR_BRIDGECTL_1, 1); - brctl |= PCIB_BCR_SECBUS_RESET; - fsl_pcib_write_config(sc->sc_dev, 0, 0, 0, - PCIR_BRIDGECTL_1, brctl, 1); - DELAY(100000); - brctl &= ~PCIB_BCR_SECBUS_RESET; - fsl_pcib_write_config(sc->sc_dev, 0, 0, 0, - PCIR_BRIDGECTL_1, brctl, 1); - DELAY(100000); - - if (sc->sc_pcie) { - ltssm = fsl_pcib_cfgread(sc, 0, 0, 0, PCIR_LTSSM, 1); - if (ltssm < LTSSM_STAT_L0) { - if (bootverbose) - printf("PCI %d: no PCIE link, skipping\n", - device_get_unit(dev)); - return (0); - } - } - - /* Allocate irq */ - rid = 0; - sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_ACTIVE | RF_SHAREABLE); - if (sc->sc_irq_res == NULL) { - error = fsl_pcib_detach(dev); - if (error != 0) { - device_printf(dev, - "Detach of the driver failed with error %d\n", - error); - } - return (ENXIO); - } - - /* Setup interrupt handler */ - error = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE, - NULL, fsl_pcib_err_intr, dev, &sc->sc_ih); - if (error != 0) { - device_printf(dev, "Could not setup irq, %d\n", error); - sc->sc_ih = NULL; - error = fsl_pcib_detach(dev); - if (error != 0) { - device_printf(dev, - "Detach of the driver failed with error %d\n", - error); - } - return (ENXIO); - } - - fsl_pcib_err_init(dev); - - return (ofw_pci_attach(dev)); - -err: - return (ENXIO); -} - -static uint32_t -fsl_pcib_cfgread(struct fsl_pcib_softc *sc, u_int bus, u_int slot, u_int func, - u_int reg, int bytes) -{ - uint32_t addr, data; - - addr = CONFIG_ACCESS_ENABLE; - addr |= (bus & 0xff) << 16; - addr |= (slot & 0x1f) << 11; - addr |= (func & 0x7) << 8; - addr |= reg & 0xfc; - if (sc->sc_pcie) - addr |= (reg & 0xf00) << 16; - - mtx_lock_spin(&sc->sc_cfg_mtx); - bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_CFG_ADDR, addr); - - switch (bytes) { - case 1: - data = bus_space_read_1(sc->sc_bst, sc->sc_bsh, - REG_CFG_DATA + (reg & 3)); - break; - case 2: - data = le16toh(bus_space_read_2(sc->sc_bst, sc->sc_bsh, - REG_CFG_DATA + (reg & 2))); - break; - case 4: - data = le32toh(bus_space_read_4(sc->sc_bst, sc->sc_bsh, - REG_CFG_DATA)); - break; - default: - data = ~0; - break; - } - mtx_unlock_spin(&sc->sc_cfg_mtx); - return (data); -} - -static void -fsl_pcib_cfgwrite(struct fsl_pcib_softc *sc, u_int bus, u_int slot, u_int func, - u_int reg, uint32_t data, int bytes) -{ - uint32_t addr; - - addr = CONFIG_ACCESS_ENABLE; - addr |= (bus & 0xff) << 16; - addr |= (slot & 0x1f) << 11; - addr |= (func & 0x7) << 8; - addr |= reg & 0xfc; - if (sc->sc_pcie) - addr |= (reg & 0xf00) << 16; - - mtx_lock_spin(&sc->sc_cfg_mtx); - bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_CFG_ADDR, addr); - - switch (bytes) { - case 1: - bus_space_write_1(sc->sc_bst, sc->sc_bsh, - REG_CFG_DATA + (reg & 3), data); - break; - case 2: - bus_space_write_2(sc->sc_bst, sc->sc_bsh, - REG_CFG_DATA + (reg & 2), htole16(data)); - break; - case 4: - bus_space_write_4(sc->sc_bst, sc->sc_bsh, - REG_CFG_DATA, htole32(data)); - break; - } - mtx_unlock_spin(&sc->sc_cfg_mtx); -} - -#if 0 -static void -dump(struct fsl_pcib_softc *sc) -{ - unsigned int i; - -#define RD(o) bus_space_read_4(sc->sc_bst, sc->sc_bsh, o) - for (i = 0; i < 5; i++) { - printf("POTAR%u =0x%08x\n", i, RD(REG_POTAR(i))); - printf("POTEAR%u =0x%08x\n", i, RD(REG_POTEAR(i))); - printf("POWBAR%u =0x%08x\n", i, RD(REG_POWBAR(i))); - printf("POWAR%u =0x%08x\n", i, RD(REG_POWAR(i))); - } - printf("\n"); - for (i = 1; i < 4; i++) { - printf("PITAR%u =0x%08x\n", i, RD(REG_PITAR(i))); - printf("PIWBAR%u =0x%08x\n", i, RD(REG_PIWBAR(i))); - printf("PIWBEAR%u=0x%08x\n", i, RD(REG_PIWBEAR(i))); - printf("PIWAR%u =0x%08x\n", i, RD(REG_PIWAR(i))); - } - printf("\n"); -#undef RD - - for (i = 0; i < 0x48; i += 4) { - printf("cfg%02x=0x%08x\n", i, fsl_pcib_cfgread(sc, 0, 0, 0, - i, 4)); - } -} -#endif - -static int -fsl_pcib_maxslots(device_t dev) -{ - struct fsl_pcib_softc *sc = device_get_softc(dev); - - return ((sc->sc_pcie) ? 0 : PCI_SLOTMAX); -} - -static uint32_t -fsl_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func, - u_int reg, int bytes) -{ - struct fsl_pcib_softc *sc = device_get_softc(dev); - u_int devfn; - - if (bus == sc->sc_busnr && !sc->sc_pcie && - slot < PCI_SLOT_FIRST) - return (~0); - devfn = DEVFN(bus, slot, func); - - return (fsl_pcib_cfgread(sc, bus, slot, func, reg, bytes)); -} - -static void -fsl_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func, - u_int reg, uint32_t val, int bytes) -{ - struct fsl_pcib_softc *sc = device_get_softc(dev); - - if (bus == sc->sc_busnr && !sc->sc_pcie && - slot < PCI_SLOT_FIRST) - return; - fsl_pcib_cfgwrite(sc, bus, slot, func, reg, val, bytes); -} - -static void -fsl_pcib_inbound(struct fsl_pcib_softc *sc, int wnd, int tgt, uint64_t start, - uint64_t size, uint64_t pci_start) -{ - uint32_t attr, bar, tar; - - KASSERT(wnd > 0, ("%s: inbound window 0 is invalid", __func__)); - - attr = PIWAR_EN; - - switch (tgt) { - case -1: - attr &= ~PIWAR_EN; - break; - case PIWAR_TRGT_LOCAL: - attr |= (ffsl(size) - 2); - default: - attr |= (tgt << PIWAR_TRGT_S); - break; - } - tar = start >> 12; - bar = pci_start >> 12; - - bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_PITAR(wnd), tar); - bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_PIWBEAR(wnd), 0); - bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_PIWBAR(wnd), bar); - bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_PIWAR(wnd), attr); -} - -static void -fsl_pcib_outbound(struct fsl_pcib_softc *sc, int wnd, int res, uint64_t start, - uint64_t size, uint64_t pci_start) -{ - uint32_t attr, bar, tar; - - switch (res) { - case SYS_RES_MEMORY: - attr = 0x80044000 | (ffsll(size) - 2); - break; - case SYS_RES_IOPORT: - attr = 0x80088000 | (ffsll(size) - 2); - break; - default: - attr = 0x0004401f; - break; - } - bar = start >> 12; - tar = pci_start >> 12; - - bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_POTAR(wnd), tar); - bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_POTEAR(wnd), 0); - bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_POWBAR(wnd), bar); - bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_POWAR(wnd), attr); -} - -static void -fsl_pcib_err_init(device_t dev) -{ - struct fsl_pcib_softc *sc; - uint16_t sec_stat, dsr; - uint32_t dcr, err_en; - - sc = device_get_softc(dev); - - sec_stat = fsl_pcib_cfgread(sc, 0, 0, 0, PCIR_SECSTAT_1, 2); - if (sec_stat) - fsl_pcib_cfgwrite(sc, 0, 0, 0, PCIR_SECSTAT_1, 0xffff, 2); - if (sc->sc_pcie) { - /* Clear error bits */ - bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_PEX_MES_IER, - 0xffffffff); - bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_PEX_MES_DR, - 0xffffffff); - bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_PEX_ERR_DR, - 0xffffffff); - - dsr = fsl_pcib_cfgread(sc, 0, 0, 0, - sc->sc_pcie_capreg + PCIER_DEVICE_STA, 2); - if (dsr) - fsl_pcib_cfgwrite(sc, 0, 0, 0, - sc->sc_pcie_capreg + PCIER_DEVICE_STA, - 0xffff, 2); - - /* Enable all errors reporting */ - err_en = 0x00bfff00; - bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_PEX_ERR_EN, - err_en); - - /* Enable error reporting: URR, FER, NFER */ - dcr = fsl_pcib_cfgread(sc, 0, 0, 0, - sc->sc_pcie_capreg + PCIER_DEVICE_CTL, 4); - dcr |= PCIEM_CTL_URR_ENABLE | PCIEM_CTL_FER_ENABLE | - PCIEM_CTL_NFER_ENABLE; - fsl_pcib_cfgwrite(sc, 0, 0, 0, - sc->sc_pcie_capreg + PCIER_DEVICE_CTL, dcr, 4); - } -} - -static int -fsl_pcib_detach(device_t dev) -{ - struct fsl_pcib_softc *sc; - - sc = device_get_softc(dev); - - mtx_destroy(&sc->sc_cfg_mtx); - - return (bus_generic_detach(dev)); -} - -static int -fsl_pcib_decode_win(phandle_t node, struct fsl_pcib_softc *sc) -{ - device_t dev; - int error, i, trgt; - - dev = sc->sc_dev; - - fsl_pcib_outbound(sc, 0, -1, 0, 0, 0); - - /* - * Configure LAW decode windows. - */ - error = law_pci_target(sc->sc_res, &sc->sc_iomem_target, - &sc->sc_ioport_target); - if (error != 0) { - device_printf(dev, "could not retrieve PCI LAW target info\n"); - return (error); - } - - for (i = 0; i < sc->pci_sc.sc_nrange; i++) { - switch (sc->pci_sc.sc_range[i].pci_hi & - OFW_PCI_PHYS_HI_SPACEMASK) { - case OFW_PCI_PHYS_HI_SPACE_CONFIG: - continue; - case OFW_PCI_PHYS_HI_SPACE_IO: - trgt = sc->sc_ioport_target; - fsl_pcib_outbound(sc, 2, SYS_RES_IOPORT, - sc->pci_sc.sc_range[i].host, - sc->pci_sc.sc_range[i].size, - sc->pci_sc.sc_range[i].pci); - sc->sc_ioport_start = sc->pci_sc.sc_range[i].pci; - sc->sc_ioport_end = sc->pci_sc.sc_range[i].pci + - sc->pci_sc.sc_range[i].size - 1; - break; - case OFW_PCI_PHYS_HI_SPACE_MEM32: - case OFW_PCI_PHYS_HI_SPACE_MEM64: - trgt = sc->sc_iomem_target; - fsl_pcib_outbound(sc, 1, SYS_RES_MEMORY, - sc->pci_sc.sc_range[i].host, - sc->pci_sc.sc_range[i].size, - sc->pci_sc.sc_range[i].pci); - sc->sc_iomem_start = sc->pci_sc.sc_range[i].pci; - sc->sc_iomem_end = sc->pci_sc.sc_range[i].pci + - sc->pci_sc.sc_range[i].size - 1; - break; - default: - panic("Unknown range type %#x\n", - sc->pci_sc.sc_range[i].pci_hi & - OFW_PCI_PHYS_HI_SPACEMASK); - } - error = law_enable(trgt, sc->pci_sc.sc_range[i].host, - sc->pci_sc.sc_range[i].size); - if (error != 0) { - device_printf(dev, "could not program LAW for range " - "%d\n", i); - return (error); - } - } - - /* - * Set outbout and inbound windows. - */ - fsl_pcib_outbound(sc, 3, -1, 0, 0, 0); - fsl_pcib_outbound(sc, 4, -1, 0, 0, 0); - - fsl_pcib_inbound(sc, 1, -1, 0, 0, 0); - fsl_pcib_inbound(sc, 2, -1, 0, 0, 0); - fsl_pcib_inbound(sc, 3, PIWAR_TRGT_LOCAL, 0, - ptoa(Maxmem), 0); - - /* Direct-map the CCSR for MSIs. */ - /* Freescale PCIe 2.x has a dedicated MSI window. */ - /* inbound window 8 makes it hit 0xD00 offset, the MSI window. */ - if (sc->sc_ip_maj >= 2) - fsl_pcib_inbound(sc, 8, PIWAR_TRGT_CCSR, ccsrbar_pa, - ccsrbar_size, ccsrbar_pa); - else - fsl_pcib_inbound(sc, 1, PIWAR_TRGT_CCSR, ccsrbar_pa, - ccsrbar_size, ccsrbar_pa); - - return (0); -} - -static int fsl_pcib_alloc_msi(device_t dev, device_t child, - int count, int maxcount, int *irqs) -{ - struct fsl_pcib_softc *sc; - vmem_addr_t start; - int err, i; - - sc = device_get_softc(dev); - if (msi_vmem == NULL) - return (ENODEV); - - err = vmem_xalloc(msi_vmem, count, powerof2(count), 0, 0, - VMEM_ADDR_MIN, VMEM_ADDR_MAX, M_BESTFIT | M_WAITOK, &start); - - if (err) - return (err); - - for (i = 0; i < count; i++) - irqs[i] = start + i; - - return (0); -} - -static int fsl_pcib_release_msi(device_t dev, device_t child, - int count, int *irqs) -{ - if (msi_vmem == NULL) - return (ENODEV); - - vmem_xfree(msi_vmem, irqs[0], count); - return (0); -} - -static int fsl_pcib_alloc_msix(device_t dev, device_t child, int *irq) -{ - return (fsl_pcib_alloc_msi(dev, child, 1, 1, irq)); -} - -static int fsl_pcib_release_msix(device_t dev, device_t child, int irq) -{ - return (fsl_pcib_release_msi(dev, child, 1, &irq)); -} - -static int fsl_pcib_map_msi(device_t dev, device_t child, - int irq, uint64_t *addr, uint32_t *data) -{ - struct fsl_msi_map *mp; - - SLIST_FOREACH(mp, &fsl_msis, slist) { - if (irq >= mp->irq_base && irq < mp->irq_base + FSL_NUM_MSIS) - break; - } - - if (mp == NULL) - return (ENODEV); - - *data = (irq & 255); - *addr = ccsrbar_pa + mp->target; - - return (0); -} - -/* - * Linux device trees put the msi@ as children of the SoC, with ranges based - * on the CCSR. Since rman doesn't permit overlapping or sub-ranges between - * devices (bus_space_subregion(9) could do it, but let's not touch the PIC - * driver just to allocate a subregion for a sibling driver). This driver will - * use ccsr_write() and ccsr_read() instead. - */ - -#define FSL_NUM_IRQS 8 -#define FSL_NUM_MSI_PER_IRQ 32 -#define FSL_MSI_TARGET 0x140 - -struct fsl_msi_softc { - vm_offset_t sc_base; - vm_offset_t sc_target; - int sc_msi_base_irq; - struct fsl_msi_map sc_map; - struct fsl_msi_irq { - /* This struct gets passed as the filter private data. */ - struct fsl_msi_softc *sc_ptr; /* Pointer back to softc. */ - struct resource *res; - int irq; - void *cookie; - int vectors[FSL_NUM_MSI_PER_IRQ]; - vm_offset_t reg; - } sc_msi_irq[FSL_NUM_IRQS]; -}; - -static int -fsl_msi_intr_filter(void *priv) -{ - struct fsl_msi_irq *data = priv; - uint32_t reg; - int i; - - reg = ccsr_read4(ccsrbar_va + data->reg); - i = 0; - while (reg != 0) { - if (reg & 1) - powerpc_dispatch_intr(data->vectors[i], NULL); - reg >>= 1; - i++; - } - - return (FILTER_HANDLED); -} - -static int -fsl_msi_probe(device_t dev) -{ - if (!ofw_bus_is_compatible(dev, "fsl,mpic-msi")) - return (ENXIO); - - device_set_desc(dev, "Freescale MSI"); - - return (BUS_PROBE_DEFAULT); -} - -static int -fsl_msi_attach(device_t dev) -{ - struct fsl_msi_softc *sc; - struct fsl_msi_irq *irq; - int i; - - sc = device_get_softc(dev); - - if (msi_vmem == NULL) - msi_vmem = vmem_create("MPIC MSI", 0, 0, 1, 0, M_BESTFIT | M_WAITOK); - - /* Manually play with resource entries. */ - sc->sc_base = bus_get_resource_start(dev, SYS_RES_MEMORY, 0); - sc->sc_map.target = bus_get_resource_start(dev, SYS_RES_MEMORY, 1); - - if (sc->sc_map.target == 0) - sc->sc_map.target = sc->sc_base + FSL_MSI_TARGET; - - for (i = 0; i < FSL_NUM_IRQS; i++) { - irq = &sc->sc_msi_irq[i]; - irq->irq = i; - irq->reg = sc->sc_base + 16 * i; - irq->res = bus_alloc_resource_any(dev, SYS_RES_IRQ, - &irq->irq, RF_ACTIVE); - bus_setup_intr(dev, irq->res, INTR_TYPE_MISC | INTR_MPSAFE, - fsl_msi_intr_filter, NULL, irq, &irq->cookie); - } - sc->sc_map.irq_base = powerpc_register_pic(dev, ofw_bus_get_node(dev), - FSL_NUM_MSIS, 0, 0); - - /* Let vmem and the IRQ subsystem work their magic for allocations. */ - vmem_add(msi_vmem, sc->sc_map.irq_base, FSL_NUM_MSIS, M_WAITOK); - - SLIST_INSERT_HEAD(&fsl_msis, &sc->sc_map, slist); - - return (0); -} - -static void -fsl_msi_enable(device_t dev, u_int irq, u_int vector, void **priv) -{ - struct fsl_msi_softc *sc; - struct fsl_msi_irq *irqd; - - sc = device_get_softc(dev); - - irqd = &sc->sc_msi_irq[irq / FSL_NUM_MSI_PER_IRQ]; - irqd->vectors[irq % FSL_NUM_MSI_PER_IRQ] = vector; -} - -static device_method_t fsl_msi_methods[] = { - DEVMETHOD(device_probe, fsl_msi_probe), - DEVMETHOD(device_attach, fsl_msi_attach), - - DEVMETHOD(pic_enable, fsl_msi_enable), - DEVMETHOD_END -}; - -static devclass_t fsl_msi_devclass; - -static driver_t fsl_msi_driver = { - "fsl_msi", - fsl_msi_methods, - sizeof(struct fsl_msi_softc) -}; - -EARLY_DRIVER_MODULE(fsl_msi, simplebus, fsl_msi_driver, fsl_msi_devclass, 0, 0, - BUS_PASS_INTERRUPT + 1); diff --git a/sys/powerpc/mpc85xx/pci_mpc85xx_pcib.c b/sys/powerpc/mpc85xx/pci_mpc85xx_pcib.c deleted file mode 100644 index 5c7cf4b4cea..00000000000 --- a/sys/powerpc/mpc85xx/pci_mpc85xx_pcib.c +++ /dev/null @@ -1,107 +0,0 @@ -/*- - * Copyright 2015 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * From: FreeBSD: src/sys/powerpc/mpc85xx/pci_ocp.c,v 1.9 2010/03/23 23:46:28 marcel - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include "pcib_if.h" - -DECLARE_CLASS(ofw_pcib_pci_driver); - -struct fsl_pcib_softc { - /* - * This is here so that we can use pci bridge methods, too - the - * generic routines only need the dev, secbus and subbus members - * filled. - * - * XXX: This should be extracted from ofw_pcib_pci.c, and shared in a - * header. - */ - struct pcib_softc ops_pcib_sc; - phandle_t ops_node; - struct ofw_bus_iinfo ops_iinfo; -}; - -static int -fsl_pcib_rc_probe(device_t dev) -{ - - if (pci_get_vendor(dev) != 0x1957) - return (ENXIO); - if (pci_get_progif(dev) != 0) - return (ENXIO); - if (pci_get_class(dev) != PCIC_PROCESSOR) - return (ENXIO); - if (pci_get_subclass(dev) != PCIS_PROCESSOR_POWERPC) - return (ENXIO); - - device_set_desc(dev, "MPC85xx Root Complex bridge"); - - return (BUS_PROBE_DEFAULT); -} - -static device_method_t fsl_pcib_rc_methods[] = { - DEVMETHOD(device_probe, fsl_pcib_rc_probe), - DEVMETHOD_END -}; - -static devclass_t fsl_pcib_rc_devclass; -DEFINE_CLASS_1(pcib, fsl_pcib_rc_driver, fsl_pcib_rc_methods, - sizeof(struct fsl_pcib_softc), ofw_pcib_pci_driver); -EARLY_DRIVER_MODULE(rcpcib, pci, fsl_pcib_rc_driver, fsl_pcib_rc_devclass, 0, 0, - BUS_PASS_BUS); diff --git a/sys/powerpc/mpc85xx/platform_mpc85xx.c b/sys/powerpc/mpc85xx/platform_mpc85xx.c deleted file mode 100644 index 865d4f5c906..00000000000 --- a/sys/powerpc/mpc85xx/platform_mpc85xx.c +++ /dev/null @@ -1,708 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2008-2012 Semihalf. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include "opt_platform.h" -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include "platform_if.h" - -#ifdef SMP -extern void *ap_pcpu; -extern vm_paddr_t kernload; /* Kernel physical load address */ -extern uint8_t __boot_page[]; /* Boot page body */ -extern vm_paddr_t bp_kernload; /* Boot page copy of kernload */ -extern vm_offset_t bp_virtaddr; /* Virtual address of boot page */ -extern vm_offset_t __startkernel; - -struct cpu_release { - uint32_t entry_h; - uint32_t entry_l; - uint32_t r3_h; - uint32_t r3_l; - uint32_t reserved; - uint32_t pir; -}; -#endif - -extern uint32_t *bootinfo; -vm_paddr_t ccsrbar_pa; -vm_offset_t ccsrbar_va; -vm_size_t ccsrbar_size; - -static int cpu, maxcpu; - -static device_t rcpm_dev; -static void dummy_freeze(device_t, bool); - -static void (*freeze_timebase)(device_t, bool) = dummy_freeze; - -static int mpc85xx_probe(platform_t); -static void mpc85xx_mem_regions(platform_t, struct mem_region *phys, - int *physsz, struct mem_region *avail, int *availsz); -static u_long mpc85xx_timebase_freq(platform_t, struct cpuref *cpuref); -static int mpc85xx_smp_first_cpu(platform_t, struct cpuref *cpuref); -static int mpc85xx_smp_next_cpu(platform_t, struct cpuref *cpuref); -static int mpc85xx_smp_get_bsp(platform_t, struct cpuref *cpuref); -static int mpc85xx_smp_start_cpu(platform_t, struct pcpu *cpu); -static void mpc85xx_smp_timebase_sync(platform_t, u_long tb, int ap); - -static void mpc85xx_reset(platform_t); - -static platform_method_t mpc85xx_methods[] = { - PLATFORMMETHOD(platform_probe, mpc85xx_probe), - PLATFORMMETHOD(platform_attach, mpc85xx_attach), - PLATFORMMETHOD(platform_mem_regions, mpc85xx_mem_regions), - PLATFORMMETHOD(platform_timebase_freq, mpc85xx_timebase_freq), - - PLATFORMMETHOD(platform_smp_first_cpu, mpc85xx_smp_first_cpu), - PLATFORMMETHOD(platform_smp_next_cpu, mpc85xx_smp_next_cpu), - PLATFORMMETHOD(platform_smp_get_bsp, mpc85xx_smp_get_bsp), - PLATFORMMETHOD(platform_smp_start_cpu, mpc85xx_smp_start_cpu), - PLATFORMMETHOD(platform_smp_timebase_sync, mpc85xx_smp_timebase_sync), - - PLATFORMMETHOD(platform_reset, mpc85xx_reset), - - PLATFORMMETHOD_END -}; - -DEFINE_CLASS_0(mpc85xx, mpc85xx_platform, mpc85xx_methods, 0); - -PLATFORM_DEF(mpc85xx_platform); - -static int -mpc85xx_probe(platform_t plat) -{ - u_int pvr = (mfpvr() >> 16) & 0xFFFF; - - switch (pvr) { - case FSL_E500v1: - case FSL_E500v2: - case FSL_E500mc: - case FSL_E5500: - case FSL_E6500: - return (BUS_PROBE_DEFAULT); - } - return (ENXIO); -} - -int -mpc85xx_attach(platform_t plat) -{ - phandle_t cpus, child, ccsr; - const char *soc_name_guesses[] = {"/soc", "soc", NULL}; - const char **name; - pcell_t ranges[6], acells, pacells, scells; - uint64_t ccsrbar, ccsrsize; - int i; - - if ((cpus = OF_finddevice("/cpus")) != -1) { - for (maxcpu = 0, child = OF_child(cpus); child != 0; - child = OF_peer(child), maxcpu++) - ; - } else - maxcpu = 1; - - /* - * Locate CCSR region. Irritatingly, there is no way to find it - * unless you already know where it is. Try to infer its location - * from the device tree. - */ - - ccsr = -1; - for (name = soc_name_guesses; *name != NULL && ccsr == -1; name++) - ccsr = OF_finddevice(*name); - if (ccsr == -1) { - char type[64]; - - /* That didn't work. Search for devices of type "soc" */ - child = OF_child(OF_peer(0)); - for (OF_child(child); child != 0; child = OF_peer(child)) { - if (OF_getprop(child, "device_type", type, sizeof(type)) - <= 0) - continue; - - if (strcmp(type, "soc") == 0) { - ccsr = child; - break; - } - } - } - - if (ccsr == -1) - panic("Could not locate CCSR window!"); - - OF_getprop(ccsr, "#size-cells", &scells, sizeof(scells)); - OF_getprop(ccsr, "#address-cells", &acells, sizeof(acells)); - OF_searchprop(OF_parent(ccsr), "#address-cells", &pacells, - sizeof(pacells)); - OF_getprop(ccsr, "ranges", ranges, sizeof(ranges)); - ccsrbar = ccsrsize = 0; - for (i = acells; i < acells + pacells; i++) { - ccsrbar <<= 32; - ccsrbar |= ranges[i]; - } - for (i = acells + pacells; i < acells + pacells + scells; i++) { - ccsrsize <<= 32; - ccsrsize |= ranges[i]; - } - ccsrbar_va = pmap_early_io_map(ccsrbar, ccsrsize); - ccsrbar_pa = ccsrbar; - ccsrbar_size = ccsrsize; - - mpc85xx_enable_l3_cache(); - - return (0); -} - -void -mpc85xx_mem_regions(platform_t plat, struct mem_region *phys, int *physsz, - struct mem_region *avail, int *availsz) -{ - - ofw_mem_regions(phys, physsz, avail, availsz); -} - -static u_long -mpc85xx_timebase_freq(platform_t plat, struct cpuref *cpuref) -{ - u_long ticks; - phandle_t cpus, child; - pcell_t freq; - - if (bootinfo != NULL) { - if (bootinfo[0] == 1) { - /* Backward compatibility. See 8-STABLE. */ - ticks = bootinfo[3] >> 3; - } else { - /* Compatibility with Juniper's loader. */ - ticks = bootinfo[5] >> 3; - } - } else - ticks = 0; - - if ((cpus = OF_finddevice("/cpus")) == -1) - goto out; - - if ((child = OF_child(cpus)) == 0) - goto out; - - switch (OF_getproplen(child, "timebase-frequency")) { - case 4: - { - uint32_t tbase; - OF_getprop(child, "timebase-frequency", &tbase, sizeof(tbase)); - ticks = tbase; - return (ticks); - } - case 8: - { - uint64_t tbase; - OF_getprop(child, "timebase-frequency", &tbase, sizeof(tbase)); - ticks = tbase; - return (ticks); - } - default: - break; - } - - freq = 0; - if (OF_getprop(child, "bus-frequency", (void *)&freq, - sizeof(freq)) <= 0) - goto out; - - if (freq == 0) - goto out; - - /* - * Time Base and Decrementer are updated every 8 CCB bus clocks. - * HID0[SEL_TBCLK] = 0 - */ - if (mpc85xx_is_qoriq()) - ticks = freq / 32; - else - ticks = freq / 8; - -out: - if (ticks <= 0) - panic("Unable to determine timebase frequency!"); - - return (ticks); -} - -static int -mpc85xx_smp_first_cpu(platform_t plat, struct cpuref *cpuref) -{ - - cpu = 0; - cpuref->cr_cpuid = cpu; - cpuref->cr_hwref = cpuref->cr_cpuid; - if (bootverbose) - printf("powerpc_smp_first_cpu: cpuid %d\n", cpuref->cr_cpuid); - cpu++; - - return (0); -} - -static int -mpc85xx_smp_next_cpu(platform_t plat, struct cpuref *cpuref) -{ - - if (cpu >= maxcpu) - return (ENOENT); - - cpuref->cr_cpuid = cpu++; - cpuref->cr_hwref = cpuref->cr_cpuid; - if (bootverbose) - printf("powerpc_smp_next_cpu: cpuid %d\n", cpuref->cr_cpuid); - - return (0); -} - -static int -mpc85xx_smp_get_bsp(platform_t plat, struct cpuref *cpuref) -{ - - cpuref->cr_cpuid = mfspr(SPR_PIR); - cpuref->cr_hwref = cpuref->cr_cpuid; - - return (0); -} - -#ifdef SMP -static int -mpc85xx_smp_start_cpu_epapr(platform_t plat, struct pcpu *pc) -{ - vm_paddr_t rel_pa, bptr; - volatile struct cpu_release *rel; - vm_offset_t rel_va, rel_page; - phandle_t node; - int i; - - /* If we're calling this, the node already exists. */ - node = OF_finddevice("/cpus"); - for (i = 0, node = OF_child(node); i < pc->pc_cpuid; - i++, node = OF_peer(node)) - ; - if (OF_getencprop(node, "cpu-release-addr", (pcell_t *)&rel_pa, - sizeof(rel_pa)) == -1) { - return (ENOENT); - } - - rel_page = kva_alloc(PAGE_SIZE); - if (rel_page == 0) - return (ENOMEM); - - critical_enter(); - rel_va = rel_page + (rel_pa & PAGE_MASK); - pmap_kenter(rel_page, rel_pa & ~PAGE_MASK); - rel = (struct cpu_release *)rel_va; - bptr = pmap_kextract((uintptr_t)__boot_page); - - cpu_flush_dcache(__DEVOLATILE(struct cpu_release *,rel), sizeof(*rel)); - rel->pir = pc->pc_cpuid; __asm __volatile("sync" ::: "memory"); - rel->entry_h = (bptr >> 32); __asm __volatile("sync" ::: "memory"); - cpu_flush_dcache(__DEVOLATILE(struct cpu_release *,rel), sizeof(*rel)); - rel->entry_l = bptr & 0xffffffff; __asm __volatile("sync" ::: "memory"); - cpu_flush_dcache(__DEVOLATILE(struct cpu_release *,rel), sizeof(*rel)); - if (bootverbose) - printf("Waking up CPU %d via CPU release page %p\n", - pc->pc_cpuid, rel); - critical_exit(); - pmap_kremove(rel_page); - kva_free(rel_page, PAGE_SIZE); - - return (0); -} -#endif - -static int -mpc85xx_smp_start_cpu(platform_t plat, struct pcpu *pc) -{ -#ifdef SMP - vm_paddr_t bptr; - uint32_t reg; - int timeout; - uintptr_t brr; - int cpuid; - int epapr_boot = 0; - uint32_t tgt; - - if (mpc85xx_is_qoriq()) { - reg = ccsr_read4(OCP85XX_COREDISR); - cpuid = pc->pc_cpuid; - - if ((reg & (1 << cpuid)) != 0) { - printf("%s: CPU %d is disabled!\n", __func__, pc->pc_cpuid); - return (-1); - } - - brr = OCP85XX_BRR; - } else { - brr = OCP85XX_EEBPCR; - cpuid = pc->pc_cpuid + 24; - } - bp_kernload = kernload; - bp_virtaddr = (vm_offset_t)&__boot_page; - /* - * bp_kernload and bp_virtaddr are in the boot page. Sync the cache - * because ePAPR booting has the other core(s) already running. - */ - cpu_flush_dcache(&bp_kernload, sizeof(bp_kernload)); - cpu_flush_dcache(&bp_virtaddr, sizeof(bp_virtaddr)); - - ap_pcpu = pc; - __asm __volatile("msync; isync"); - - /* First try the ePAPR way. */ - if (mpc85xx_smp_start_cpu_epapr(plat, pc) == 0) { - epapr_boot = 1; - goto spin_wait; - } - - reg = ccsr_read4(brr); - if ((reg & (1 << cpuid)) != 0) { - printf("SMP: CPU %d already out of hold-off state!\n", - pc->pc_cpuid); - return (ENXIO); - } - - /* Flush caches to have our changes hit DRAM. */ - cpu_flush_dcache(__boot_page, 4096); - - bptr = pmap_kextract((uintptr_t)__boot_page); - KASSERT((bptr & 0xfff) == 0, - ("%s: boot page is not aligned (%#jx)", __func__, (uintmax_t)bptr)); - if (mpc85xx_is_qoriq()) { - /* - * Read DDR controller configuration to select proper BPTR target ID. - * - * On P5020 bit 29 of DDR1_CS0_CONFIG enables DDR controllers - * interleaving. If this bit is set, we have to use - * OCP85XX_TGTIF_RAM_INTL as BPTR target ID. On other QorIQ DPAA SoCs, - * this bit is reserved and always 0. - */ - - reg = ccsr_read4(OCP85XX_DDR1_CS0_CONFIG); - if (reg & (1 << 29)) - tgt = OCP85XX_TGTIF_RAM_INTL; - else - tgt = OCP85XX_TGTIF_RAM1; - - /* - * Set BSTR to the physical address of the boot page - */ - ccsr_write4(OCP85XX_BSTRH, bptr >> 32); - ccsr_write4(OCP85XX_BSTRL, bptr); - ccsr_write4(OCP85XX_BSTAR, OCP85XX_ENA_MASK | - (tgt << OCP85XX_TRGT_SHIFT_QORIQ) | (ffsl(PAGE_SIZE) - 2)); - - /* Read back OCP85XX_BSTAR to synchronize write */ - ccsr_read4(OCP85XX_BSTAR); - - /* - * Enable and configure time base on new CPU. - */ - - /* Set TB clock source to platform clock / 32 */ - reg = ccsr_read4(CCSR_CTBCKSELR); - ccsr_write4(CCSR_CTBCKSELR, reg & ~(1 << pc->pc_cpuid)); - - /* Enable TB */ - reg = ccsr_read4(CCSR_CTBENR); - ccsr_write4(CCSR_CTBENR, reg | (1 << pc->pc_cpuid)); - } else { - /* - * Set BPTR to the physical address of the boot page - */ - bptr = (bptr >> 12) | 0x80000000u; - ccsr_write4(OCP85XX_BPTR, bptr); - __asm __volatile("isync; msync"); - } - - /* - * Release AP from hold-off state - */ - reg = ccsr_read4(brr); - ccsr_write4(brr, reg | (1 << cpuid)); - __asm __volatile("isync; msync"); - -spin_wait: - timeout = 500; - while (!pc->pc_awake && timeout--) - DELAY(1000); /* wait 1ms */ - - /* - * Disable boot page translation so that the 4K page at the default - * address (= 0xfffff000) isn't permanently remapped and thus not - * usable otherwise. - */ - if (!epapr_boot) { - if (mpc85xx_is_qoriq()) - ccsr_write4(OCP85XX_BSTAR, 0); - else - ccsr_write4(OCP85XX_BPTR, 0); - __asm __volatile("isync; msync"); - } - - if (!pc->pc_awake) - panic("SMP: CPU %d didn't wake up.\n", pc->pc_cpuid); - return ((pc->pc_awake) ? 0 : EBUSY); -#else - /* No SMP support */ - return (ENXIO); -#endif -} - -static void -mpc85xx_reset(platform_t plat) -{ - - /* - * Try the dedicated reset register first. - * If the SoC doesn't have one, we'll fall - * back to using the debug control register. - */ - ccsr_write4(OCP85XX_RSTCR, 2); - - mtmsr(mfmsr() & ~PSL_DE); - - /* Enable debug interrupts and issue reset. */ - mtspr(SPR_DBCR0, DBCR0_IDM | DBCR0_RST_SYSTEM); - __asm __volatile("isync"); - - /* Enable Debug Interrupts in MSR. */ - mtmsr(mfmsr() | PSL_DE); - - printf("Reset failed...\n"); - while (1) - ; -} - -static void -mpc85xx_smp_timebase_sync(platform_t plat, u_long tb, int ap) -{ - static volatile bool tb_ready; - static volatile int cpu_done; - - if (ap) { - /* APs. Hold off until we get a stable timebase. */ - while (!tb_ready) - atomic_thread_fence_seq_cst(); - mttb(tb); - atomic_add_int(&cpu_done, 1); - while (cpu_done < mp_ncpus) - atomic_thread_fence_seq_cst(); - } else { - /* BSP */ - freeze_timebase(rcpm_dev, true); - tb_ready = true; - mttb(tb); - atomic_add_int(&cpu_done, 1); - while (cpu_done < mp_ncpus) - atomic_thread_fence_seq_cst(); - freeze_timebase(rcpm_dev, false); - } -} - -/* Fallback freeze. In case no real handler is found in the device tree. */ -static void -dummy_freeze(device_t dev, bool freeze) -{ - /* Nothing to do here, move along. */ -} - -/* QorIQ Run control/power management timebase management. */ - -#define RCPM_CTBENR 0x00000084 -struct mpc85xx_rcpm_softc { - struct resource *sc_mem; -}; - -static void -mpc85xx_rcpm_freeze_timebase(device_t dev, bool freeze) -{ - struct mpc85xx_rcpm_softc *sc; - - sc = device_get_softc(dev); - - if (freeze) - bus_write_4(sc->sc_mem, RCPM_CTBENR, 0); - else - bus_write_4(sc->sc_mem, RCPM_CTBENR, (1 << maxcpu) - 1); -} - -static int -mpc85xx_rcpm_probe(device_t dev) -{ - if (!ofw_bus_is_compatible(dev, "fsl,qoriq-rcpm-1.0")) - return (ENXIO); - - device_set_desc(dev, "QorIQ Run control and power management"); - return (BUS_PROBE_GENERIC); -} - -static int -mpc85xx_rcpm_attach(device_t dev) -{ - struct mpc85xx_rcpm_softc *sc; - int rid; - - sc = device_get_softc(dev); - freeze_timebase = mpc85xx_rcpm_freeze_timebase; - rcpm_dev = dev; - - rid = 0; - sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE | RF_SHAREABLE); - - return (0); -} - -static device_method_t mpc85xx_rcpm_methods[] = { - DEVMETHOD(device_probe, mpc85xx_rcpm_probe), - DEVMETHOD(device_attach, mpc85xx_rcpm_attach), - DEVMETHOD_END -}; - -static devclass_t mpc85xx_rcpm_devclass; - -static driver_t mpc85xx_rcpm_driver = { - "rcpm", - mpc85xx_rcpm_methods, - sizeof(struct mpc85xx_rcpm_softc) -}; - -EARLY_DRIVER_MODULE(mpc85xx_rcpm, simplebus, mpc85xx_rcpm_driver, - mpc85xx_rcpm_devclass, 0, 0, BUS_PASS_BUS); - -/* "Global utilities" power management/Timebase management. */ - -#define GUTS_DEVDISR 0x00000070 -#define DEVDISR_TB0 0x00004000 -#define DEVDISR_TB1 0x00001000 - -struct mpc85xx_guts_softc { - struct resource *sc_mem; -}; - -static void -mpc85xx_guts_freeze_timebase(device_t dev, bool freeze) -{ - struct mpc85xx_guts_softc *sc; - uint32_t devdisr; - - sc = device_get_softc(dev); - - devdisr = bus_read_4(sc->sc_mem, GUTS_DEVDISR); - if (freeze) - bus_write_4(sc->sc_mem, GUTS_DEVDISR, - devdisr | (DEVDISR_TB0 | DEVDISR_TB1)); - else - bus_write_4(sc->sc_mem, GUTS_DEVDISR, - devdisr & ~(DEVDISR_TB0 | DEVDISR_TB1)); -} - -static int -mpc85xx_guts_probe(device_t dev) -{ - if (!ofw_bus_is_compatible(dev, "fsl,mpc8572-guts") && - !ofw_bus_is_compatible(dev, "fsl,p1020-guts") && - !ofw_bus_is_compatible(dev, "fsl,p1021-guts") && - !ofw_bus_is_compatible(dev, "fsl,p1022-guts") && - !ofw_bus_is_compatible(dev, "fsl,p1023-guts") && - !ofw_bus_is_compatible(dev, "fsl,p2020-guts")) - return (ENXIO); - - device_set_desc(dev, "MPC85xx Global Utilities"); - return (BUS_PROBE_GENERIC); -} - -static int -mpc85xx_guts_attach(device_t dev) -{ - struct mpc85xx_rcpm_softc *sc; - int rid; - - sc = device_get_softc(dev); - freeze_timebase = mpc85xx_guts_freeze_timebase; - rcpm_dev = dev; - - rid = 0; - sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE | RF_SHAREABLE); - - return (0); -} - -static device_method_t mpc85xx_guts_methods[] = { - DEVMETHOD(device_probe, mpc85xx_guts_probe), - DEVMETHOD(device_attach, mpc85xx_guts_attach), - DEVMETHOD_END -}; - -static driver_t mpc85xx_guts_driver = { - "guts", - mpc85xx_guts_methods, - sizeof(struct mpc85xx_guts_softc) -}; - -static devclass_t mpc85xx_guts_devclass; - -EARLY_DRIVER_MODULE(mpc85xx_guts, simplebus, mpc85xx_guts_driver, - mpc85xx_guts_devclass, 0, 0, BUS_PASS_BUS); diff --git a/sys/powerpc/mpc85xx/qoriq_gpio.c b/sys/powerpc/mpc85xx/qoriq_gpio.c deleted file mode 100644 index e20cdb508df..00000000000 --- a/sys/powerpc/mpc85xx/qoriq_gpio.c +++ /dev/null @@ -1,311 +0,0 @@ -/*- - * Copyright (c) 2015 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include "gpio_if.h" - -#define MAXPIN (31) - -#define VALID_PIN(u) ((u) >= 0 && (u) <= MAXPIN) - -#define GPIO_LOCK(sc) mtx_lock(&(sc)->sc_mtx) -#define GPIO_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx) -#define GPIO_LOCK_INIT(sc) \ - mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->dev), \ - "gpio", MTX_DEF) -#define GPIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); - -#define GPIO_GPDIR 0x0 -#define GPIO_GPODR 0x4 -#define GPIO_GPDAT 0x8 -#define GPIO_GPIER 0xc -#define GPIO_GPIMR 0x10 -#define GPIO_GPICR 0x14 - -struct qoriq_gpio_softc { - device_t dev; - device_t busdev; - struct mtx sc_mtx; - struct resource *sc_mem; /* Memory resource */ -}; - -static device_t -qoriq_gpio_get_bus(device_t dev) -{ - struct qoriq_gpio_softc *sc; - - sc = device_get_softc(dev); - - return (sc->busdev); -} - -static int -qoriq_gpio_pin_max(device_t dev, int *maxpin) -{ - - *maxpin = MAXPIN; - return (0); -} - -/* Get a specific pin's capabilities. */ -static int -qoriq_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) -{ - - if (!VALID_PIN(pin)) - return (EINVAL); - - *caps = (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN); - - return (0); -} - -/* Get a specific pin's name. */ -static int -qoriq_gpio_pin_getname(device_t dev, uint32_t pin, char *name) -{ - - if (!VALID_PIN(pin)) - return (EINVAL); - - snprintf(name, GPIOMAXNAME, "qoriq_gpio%d.%d", - device_get_unit(dev), pin); - name[GPIOMAXNAME-1] = '\0'; - - return (0); -} - -/* Set flags for the pin. */ -static int -qoriq_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) -{ - struct qoriq_gpio_softc *sc = device_get_softc(dev); - uint32_t reg; - - if (!VALID_PIN(pin)) - return (EINVAL); - - if ((flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)) == - (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)) - return (EINVAL); - - GPIO_LOCK(sc); - if (flags & GPIO_PIN_INPUT) { - reg = bus_read_4(sc->sc_mem, GPIO_GPDIR); - reg &= ~(1 << (31 - pin)); - bus_write_4(sc->sc_mem, GPIO_GPDIR, reg); - } - else if (flags & GPIO_PIN_OUTPUT) { - reg = bus_read_4(sc->sc_mem, GPIO_GPDIR); - reg |= (1 << (31 - pin)); - bus_write_4(sc->sc_mem, GPIO_GPDIR, reg); - reg = bus_read_4(sc->sc_mem, GPIO_GPODR); - if (flags & GPIO_PIN_OPENDRAIN) - reg |= (1 << (31 - pin)); - else - reg &= ~(1 << (31 - pin)); - bus_write_4(sc->sc_mem, GPIO_GPODR, reg); - } - GPIO_UNLOCK(sc); - return (0); -} - -/* Set a specific output pin's value. */ -static int -qoriq_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) -{ - struct qoriq_gpio_softc *sc = device_get_softc(dev); - uint32_t outvals; - uint8_t pinbit; - - if (!VALID_PIN(pin) || value > 1) - return (EINVAL); - - GPIO_LOCK(sc); - pinbit = 31 - pin; - - outvals = bus_read_4(sc->sc_mem, GPIO_GPDAT); - outvals &= ~(1 << pinbit); - outvals |= (value << pinbit); - bus_write_4(sc->sc_mem, GPIO_GPDAT, outvals); - - GPIO_UNLOCK(sc); - - return (0); -} - -/* Get a specific pin's input value. */ -static int -qoriq_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *value) -{ - struct qoriq_gpio_softc *sc = device_get_softc(dev); - - if (!VALID_PIN(pin)) - return (EINVAL); - - *value = (bus_read_4(sc->sc_mem, GPIO_GPDAT) >> (31 - pin)) & 1; - - return (0); -} - -/* Toggle a pin's output value. */ -static int -qoriq_gpio_pin_toggle(device_t dev, uint32_t pin) -{ - struct qoriq_gpio_softc *sc = device_get_softc(dev); - uint32_t val; - - if (!VALID_PIN(pin)) - return (EINVAL); - - GPIO_LOCK(sc); - - val = bus_read_4(sc->sc_mem, GPIO_GPDAT); - val ^= (1 << (31 - pin)); - bus_write_4(sc->sc_mem, GPIO_GPDAT, val); - - GPIO_UNLOCK(sc); - - return (0); -} - -static struct ofw_compat_data gpio_matches[] = { - {"fsl,qoriq-gpio", 1}, - {"fsl,pq3-gpio", 1}, - {"fsl,mpc8572-gpio", 1}, - {0, 0} -}; - -static int -qoriq_gpio_probe(device_t dev) -{ - - if (ofw_bus_search_compatible(dev, gpio_matches)->ocd_data == 0) - return (ENXIO); - - device_set_desc(dev, "Freescale QorIQ GPIO driver"); - - return (0); -} - -static int qoriq_gpio_detach(device_t dev); - -static int -qoriq_gpio_attach(device_t dev) -{ - struct qoriq_gpio_softc *sc = device_get_softc(dev); - int rid; - - sc->dev = dev; - - GPIO_LOCK_INIT(sc); - - /* Allocate memory. */ - rid = 0; - sc->sc_mem = bus_alloc_resource_any(dev, - SYS_RES_MEMORY, &rid, RF_ACTIVE); - if (sc->sc_mem == NULL) { - device_printf(dev, "Can't allocate memory for device output port"); - qoriq_gpio_detach(dev); - return (ENOMEM); - } - - sc->busdev = gpiobus_attach_bus(dev); - if (sc->busdev == NULL) { - qoriq_gpio_detach(dev); - return (ENOMEM); - } - - OF_device_register_xref(OF_xref_from_node(ofw_bus_get_node(dev)), dev); - - return (0); -} - -static int -qoriq_gpio_detach(device_t dev) -{ - struct qoriq_gpio_softc *sc = device_get_softc(dev); - - gpiobus_detach_bus(dev); - - if (sc->sc_mem != NULL) { - /* Release output port resource. */ - bus_release_resource(dev, SYS_RES_MEMORY, - rman_get_rid(sc->sc_mem), sc->sc_mem); - } - - GPIO_LOCK_DESTROY(sc); - - return (0); -} - -static device_method_t qoriq_gpio_methods[] = { - /* device_if */ - DEVMETHOD(device_probe, qoriq_gpio_probe), - DEVMETHOD(device_attach, qoriq_gpio_attach), - DEVMETHOD(device_detach, qoriq_gpio_detach), - - /* GPIO protocol */ - DEVMETHOD(gpio_get_bus, qoriq_gpio_get_bus), - DEVMETHOD(gpio_pin_max, qoriq_gpio_pin_max), - DEVMETHOD(gpio_pin_getname, qoriq_gpio_pin_getname), - DEVMETHOD(gpio_pin_getcaps, qoriq_gpio_pin_getcaps), - DEVMETHOD(gpio_pin_get, qoriq_gpio_pin_get), - DEVMETHOD(gpio_pin_set, qoriq_gpio_pin_set), - DEVMETHOD(gpio_pin_setflags, qoriq_gpio_pin_setflags), - DEVMETHOD(gpio_pin_toggle, qoriq_gpio_pin_toggle), - - DEVMETHOD_END -}; - -static driver_t qoriq_gpio_driver = { - "gpio", - qoriq_gpio_methods, - sizeof(struct qoriq_gpio_softc), -}; -static devclass_t qoriq_gpio_devclass; - -EARLY_DRIVER_MODULE(qoriq_gpio, simplebus, qoriq_gpio_driver, - qoriq_gpio_devclass, NULL, NULL, - BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE); diff --git a/sys/powerpc/ofw/ofw_initrd.c b/sys/powerpc/ofw/ofw_initrd.c deleted file mode 100644 index 8f4a6e6e1f2..00000000000 --- a/sys/powerpc/ofw/ofw_initrd.c +++ /dev/null @@ -1,109 +0,0 @@ -/*- - * Copyright (C) 2018 Breno Leitao - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include "opt_md.h" - -extern u_char *mfs_root; -extern int mfs_root_size; - -static void ofw_initrd_probe_and_attach(void *junk); - -SYSINIT(ofw_initrd_probe_and_attach, SI_SUB_KMEM, SI_ORDER_ANY, - ofw_initrd_probe_and_attach, NULL); - -static void -ofw_initrd_probe_and_attach(void *junk) -{ - phandle_t chosen; - vm_paddr_t start, end; - pcell_t cell[2]; - ssize_t size; - u_char *taste; - Elf_Ehdr ehdr; - - if (!hw_direct_map) - return; - - chosen = OF_finddevice("/chosen"); - if (chosen <= 0) - return; - - if (!OF_hasprop(chosen, "linux,initrd-start") || - !OF_hasprop(chosen, "linux,initrd-end")) - return; - - size = OF_getencprop(chosen, "linux,initrd-start", cell, sizeof(cell)); - if (size == 4) - start = cell[0]; - else if (size == 8) - start = (uint64_t)cell[0] << 32 | cell[1]; - else { - printf("ofw_initrd: Wrong linux,initrd-start size\n"); - return; - } - - size = OF_getencprop(chosen, "linux,initrd-end", cell, sizeof(cell)); - if (size == 4) - end = cell[0]; - else if (size == 8) - end = (uint64_t)cell[0] << 32 | cell[1]; - else{ - printf("ofw_initrd: Wrong linux,initrd-end size\n"); - return; - } - - if (end - start > 0) { - taste = (u_char*) PHYS_TO_DMAP(start); - memcpy(&ehdr, taste, sizeof(ehdr)); - - if (IS_ELF(ehdr)) { - printf("ofw_initrd: initrd is kernel image!\n"); - return; - } - - mfs_root = taste; - mfs_root_size = end - start; - printf("ofw_initrd: initrd loaded at 0x%08lx-0x%08lx\n", - start, end); - } -} diff --git a/sys/powerpc/ofw/ofw_machdep.c b/sys/powerpc/ofw/ofw_machdep.c deleted file mode 100644 index 4eeac24e881..00000000000 --- a/sys/powerpc/ofw/ofw_machdep.c +++ /dev/null @@ -1,873 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1996 Wolfgang Solfrank. - * Copyright (C) 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: ofw_machdep.c,v 1.5 2000/05/23 13:25:43 tsubai Exp $ - */ - -#include -#include "opt_platform.h" -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include - -#ifdef POWERNV -#include -#endif - -static void *fdt; -int ofw_real_mode; - -#ifdef AIM -extern register_t ofmsr[5]; -extern void *openfirmware_entry; -char save_trap_init[0x2f00]; /* EXC_LAST */ -char save_trap_of[0x2f00]; /* EXC_LAST */ - -int ofwcall(void *); -static int openfirmware(void *args); - -#pragma clang diagnostic push -#pragma clang diagnostic ignored "-Wfortify-source" - -__inline void -ofw_save_trap_vec(char *save_trap_vec) -{ - if (!ofw_real_mode || !hw_direct_map) - return; - - bcopy((void *)PHYS_TO_DMAP(EXC_RST), save_trap_vec, EXC_LAST - EXC_RST); -} - -static __inline void -ofw_restore_trap_vec(char *restore_trap_vec) -{ - if (!ofw_real_mode || !hw_direct_map) - return; - - bcopy(restore_trap_vec, (void *)PHYS_TO_DMAP(EXC_RST), - EXC_LAST - EXC_RST); - __syncicache((void *)PHYS_TO_DMAP(EXC_RSVD), EXC_LAST - EXC_RSVD); -} - -#pragma clang diagnostic pop - -/* - * Saved SPRG0-3 from OpenFirmware. Will be restored prior to the callback. - */ -register_t ofw_sprg0_save; - -static __inline void -ofw_sprg_prepare(void) -{ - if (ofw_real_mode) - return; - - /* - * Assume that interrupt are disabled at this point, or - * SPRG1-3 could be trashed - */ -#ifdef __powerpc64__ - __asm __volatile("mtsprg1 %0\n\t" - "mtsprg2 %1\n\t" - "mtsprg3 %2\n\t" - : - : "r"(ofmsr[2]), - "r"(ofmsr[3]), - "r"(ofmsr[4])); -#else - __asm __volatile("mfsprg0 %0\n\t" - "mtsprg0 %1\n\t" - "mtsprg1 %2\n\t" - "mtsprg2 %3\n\t" - "mtsprg3 %4\n\t" - : "=&r"(ofw_sprg0_save) - : "r"(ofmsr[1]), - "r"(ofmsr[2]), - "r"(ofmsr[3]), - "r"(ofmsr[4])); -#endif -} - -static __inline void -ofw_sprg_restore(void) -{ - if (ofw_real_mode) - return; - - /* - * Note that SPRG1-3 contents are irrelevant. They are scratch - * registers used in the early portion of trap handling when - * interrupts are disabled. - * - * PCPU data cannot be used until this routine is called ! - */ -#ifndef __powerpc64__ - __asm __volatile("mtsprg0 %0" :: "r"(ofw_sprg0_save)); -#endif -} -#endif - -static int -parse_ofw_memory(phandle_t node, const char *prop, struct mem_region *output) -{ - cell_t address_cells, size_cells; - cell_t OFmem[4 * PHYS_AVAIL_SZ]; - int sz, i, j; - phandle_t phandle; - - sz = 0; - - /* - * Get #address-cells from root node, defaulting to 1 if it cannot - * be found. - */ - phandle = OF_finddevice("/"); - if (OF_getencprop(phandle, "#address-cells", &address_cells, - sizeof(address_cells)) < (ssize_t)sizeof(address_cells)) - address_cells = 1; - if (OF_getencprop(phandle, "#size-cells", &size_cells, - sizeof(size_cells)) < (ssize_t)sizeof(size_cells)) - size_cells = 1; - - /* - * Get memory. - */ - if (node == -1 || (sz = OF_getencprop(node, prop, - OFmem, sizeof(OFmem))) <= 0) - panic("Physical memory map not found"); - - i = 0; - j = 0; - while (i < sz/sizeof(cell_t)) { - output[j].mr_start = OFmem[i++]; - if (address_cells == 2) { - output[j].mr_start <<= 32; - output[j].mr_start += OFmem[i++]; - } - - output[j].mr_size = OFmem[i++]; - if (size_cells == 2) { - output[j].mr_size <<= 32; - output[j].mr_size += OFmem[i++]; - } - - if (output[j].mr_start > BUS_SPACE_MAXADDR) - continue; - - /* - * Constrain memory to that which we can access. - * 32-bit AIM can only reference 32 bits of address currently, - * but Book-E can access 36 bits. - */ - if (((uint64_t)output[j].mr_start + - (uint64_t)output[j].mr_size - 1) > - BUS_SPACE_MAXADDR) { - output[j].mr_size = BUS_SPACE_MAXADDR - - output[j].mr_start + 1; - } - - j++; - } - - return (j); -} - -static int -parse_numa_ofw_memory(phandle_t node, const char *prop, - struct numa_mem_region *output) -{ - cell_t address_cells, size_cells; - cell_t OFmem[4 * PHYS_AVAIL_SZ]; - int sz, i, j; - phandle_t phandle; - - sz = 0; - - /* - * Get #address-cells from root node, defaulting to 1 if it cannot - * be found. - */ - phandle = OF_finddevice("/"); - if (OF_getencprop(phandle, "#address-cells", &address_cells, - sizeof(address_cells)) < (ssize_t)sizeof(address_cells)) - address_cells = 1; - if (OF_getencprop(phandle, "#size-cells", &size_cells, - sizeof(size_cells)) < (ssize_t)sizeof(size_cells)) - size_cells = 1; - - /* - * Get memory. - */ - if (node == -1 || (sz = OF_getencprop(node, prop, - OFmem, sizeof(OFmem))) <= 0) - panic("Physical memory map not found"); - - i = 0; - j = 0; - while (i < sz/sizeof(cell_t)) { - output[j].mr_start = OFmem[i++]; - if (address_cells == 2) { - output[j].mr_start <<= 32; - output[j].mr_start += OFmem[i++]; - } - output[j].mr_size = OFmem[i++]; - if (size_cells == 2) { - output[j].mr_size <<= 32; - output[j].mr_size += OFmem[i++]; - } - j++; - } - - return (j); -} - -#ifdef FDT -static int -excise_reserved_regions(struct mem_region *avail, int asz, - struct mem_region *exclude, int esz) -{ - int i, j, k; - - for (i = 0; i < asz; i++) { - for (j = 0; j < esz; j++) { - /* - * Case 1: Exclusion region encloses complete - * available entry. Drop it and move on. - */ - if (exclude[j].mr_start <= avail[i].mr_start && - exclude[j].mr_start + exclude[j].mr_size >= - avail[i].mr_start + avail[i].mr_size) { - for (k = i+1; k < asz; k++) - avail[k-1] = avail[k]; - asz--; - i--; /* Repeat some entries */ - continue; - } - - /* - * Case 2: Exclusion region starts in available entry. - * Trim it to where the entry begins and append - * a new available entry with the region after - * the excluded region, if any. - */ - if (exclude[j].mr_start >= avail[i].mr_start && - exclude[j].mr_start < avail[i].mr_start + - avail[i].mr_size) { - if (exclude[j].mr_start + exclude[j].mr_size < - avail[i].mr_start + avail[i].mr_size) { - avail[asz].mr_start = - exclude[j].mr_start + exclude[j].mr_size; - avail[asz].mr_size = avail[i].mr_start + - avail[i].mr_size - - avail[asz].mr_start; - asz++; - } - - avail[i].mr_size = exclude[j].mr_start - - avail[i].mr_start; - } - - /* - * Case 3: Exclusion region ends in available entry. - * Move start point to where the exclusion zone ends. - * The case of a contained exclusion zone has already - * been caught in case 2. - */ - if (exclude[j].mr_start + exclude[j].mr_size >= - avail[i].mr_start && exclude[j].mr_start + - exclude[j].mr_size < avail[i].mr_start + - avail[i].mr_size) { - avail[i].mr_size += avail[i].mr_start; - avail[i].mr_start = - exclude[j].mr_start + exclude[j].mr_size; - avail[i].mr_size -= avail[i].mr_start; - } - } - } - - return (asz); -} - -static int -excise_initrd_region(struct mem_region *avail, int asz) -{ - phandle_t chosen; - uint64_t start, end; - ssize_t size; - struct mem_region initrdmap[1]; - pcell_t cell[2]; - - chosen = OF_finddevice("/chosen"); - - size = OF_getencprop(chosen, "linux,initrd-start", cell, sizeof(cell)); - if (size < 0) - return (asz); - else if (size == 4) - start = cell[0]; - else if (size == 8) - start = (uint64_t)cell[0] << 32 | cell[1]; - else { - /* Invalid value length */ - printf("WARNING: linux,initrd-start must be either 4 or 8 bytes long\n"); - return (asz); - } - - size = OF_getencprop(chosen, "linux,initrd-end", cell, sizeof(cell)); - if (size < 0) - return (asz); - else if (size == 4) - end = cell[0]; - else if (size == 8) - end = (uint64_t)cell[0] << 32 | cell[1]; - else { - /* Invalid value length */ - printf("WARNING: linux,initrd-end must be either 4 or 8 bytes long\n"); - return (asz); - } - - if (end <= start) - return (asz); - - initrdmap[0].mr_start = start; - initrdmap[0].mr_size = end - start; - - asz = excise_reserved_regions(avail, asz, initrdmap, 1); - - return (asz); -} - -#ifdef POWERNV -static int -excise_msi_region(struct mem_region *avail, int asz) -{ - uint64_t start, end; - struct mem_region initrdmap[1]; - - /* - * This range of physical addresses is used to implement optimized - * 32 bit MSI interrupts on POWER9. Exclude it to avoid accidentally - * using it for DMA, as this will cause an immediate PHB fence. - * While we could theoretically turn off this behavior in the ETU, - * doing so would break 32-bit MSI, so just reserve the range in - * the physical map instead. - * See section 4.4.2.8 of the PHB4 specification. - */ - start = 0x00000000ffff0000ul; - end = 0x00000000fffffffful; - - initrdmap[0].mr_start = start; - initrdmap[0].mr_size = end - start; - - asz = excise_reserved_regions(avail, asz, initrdmap, 1); - - return (asz); -} -#endif - -static int -excise_fdt_reserved(struct mem_region *avail, int asz) -{ - struct mem_region fdtmap[32]; - ssize_t fdtmapsize; - phandle_t chosen; - int j, fdtentries; - - chosen = OF_finddevice("/chosen"); - fdtmapsize = OF_getprop(chosen, "fdtmemreserv", fdtmap, sizeof(fdtmap)); - - for (j = 0; j < fdtmapsize/sizeof(fdtmap[0]); j++) { - fdtmap[j].mr_start = be64toh(fdtmap[j].mr_start) & ~PAGE_MASK; - fdtmap[j].mr_size = round_page(be64toh(fdtmap[j].mr_size)); - } - - KASSERT(j*sizeof(fdtmap[0]) < sizeof(fdtmap), - ("Exceeded number of FDT reservations")); - /* Add a virtual entry for the FDT itself */ - if (fdt != NULL) { - fdtmap[j].mr_start = (vm_offset_t)fdt & ~PAGE_MASK; - fdtmap[j].mr_size = round_page(fdt_totalsize(fdt)); - fdtmapsize += sizeof(fdtmap[0]); - } - - fdtentries = fdtmapsize/sizeof(fdtmap[0]); - asz = excise_reserved_regions(avail, asz, fdtmap, fdtentries); - - return (asz); -} -#endif - -/* - * This is called during powerpc_init, before the system is really initialized. - * It shall provide the total and the available regions of RAM. - * The available regions need not take the kernel into account. - */ -void -ofw_numa_mem_regions(struct numa_mem_region *memp, int *memsz) -{ - phandle_t phandle; - int count, msz; - char name[31]; - struct numa_mem_region *curmemp; - - msz = 0; - /* - * Get memory from all the /memory nodes. - */ - for (phandle = OF_child(OF_peer(0)); phandle != 0; - phandle = OF_peer(phandle)) { - if (OF_getprop(phandle, "name", name, sizeof(name)) <= 0) - continue; - if (strncmp(name, "memory@", strlen("memory@")) != 0) - continue; - - count = parse_numa_ofw_memory(phandle, "reg", &memp[msz]); - if (count == 0) - continue; - curmemp = &memp[msz]; - MPASS(count == 1); - curmemp->mr_domain = platform_node_numa_domain(phandle); - if (bootverbose) - printf("%s %#jx-%#jx domain(%ju)\n", - name, (uintmax_t)curmemp->mr_start, - (uintmax_t)curmemp->mr_start + curmemp->mr_size, - (uintmax_t)curmemp->mr_domain); - msz += count; - } - *memsz = msz; -} -/* - * This is called during powerpc_init, before the system is really initialized. - * It shall provide the total and the available regions of RAM. - * The available regions need not take the kernel into account. - */ -void -ofw_mem_regions(struct mem_region *memp, int *memsz, - struct mem_region *availp, int *availsz) -{ - phandle_t phandle; - int asz, msz; - int res; - char name[31]; - - asz = msz = 0; - - /* - * Get memory from all the /memory nodes. - */ - for (phandle = OF_child(OF_peer(0)); phandle != 0; - phandle = OF_peer(phandle)) { - if (OF_getprop(phandle, "name", name, sizeof(name)) <= 0) - continue; - if (strncmp(name, "memory", sizeof(name)) != 0 && - strncmp(name, "memory@", strlen("memory@")) != 0) - continue; - - res = parse_ofw_memory(phandle, "reg", &memp[msz]); - msz += res; - - /* - * On POWER9 Systems we might have both linux,usable-memory and - * reg properties. 'reg' denotes all available memory, but we - * must use 'linux,usable-memory', a subset, as some memory - * regions are reserved for NVLink. - */ - if (OF_getproplen(phandle, "linux,usable-memory") >= 0) - res = parse_ofw_memory(phandle, "linux,usable-memory", - &availp[asz]); - else if (OF_getproplen(phandle, "available") >= 0) - res = parse_ofw_memory(phandle, "available", - &availp[asz]); - else - res = parse_ofw_memory(phandle, "reg", &availp[asz]); - asz += res; - } - -#ifdef FDT - phandle = OF_finddevice("/chosen"); - if (OF_hasprop(phandle, "fdtmemreserv")) - asz = excise_fdt_reserved(availp, asz); - - /* If the kernel is being loaded through kexec, initrd region is listed - * in /chosen but the region is not marked as reserved, so, we might exclude - * it here. - */ - if (OF_hasprop(phandle, "linux,initrd-start")) - asz = excise_initrd_region(availp, asz); -#endif - -#ifdef POWERNV - if (opal_check() == 0) - asz = excise_msi_region(availp, asz); -#endif - - *memsz = msz; - *availsz = asz; -} - -void -OF_initial_setup(void *fdt_ptr, void *junk, int (*openfirm)(void *)) -{ -#ifdef AIM - ofmsr[0] = mfmsr(); - #ifdef __powerpc64__ - ofmsr[0] &= ~PSL_SF; - #ifdef __LITTLE_ENDIAN__ - /* Assume OFW is BE. */ - ofmsr[0] &= ~PSL_LE; - #endif - #else - __asm __volatile("mfsprg0 %0" : "=&r"(ofmsr[1])); - #endif - __asm __volatile("mfsprg1 %0" : "=&r"(ofmsr[2])); - __asm __volatile("mfsprg2 %0" : "=&r"(ofmsr[3])); - __asm __volatile("mfsprg3 %0" : "=&r"(ofmsr[4])); - openfirmware_entry = openfirm; - - if (ofmsr[0] & PSL_DR) - ofw_real_mode = 0; - else - ofw_real_mode = 1; - - ofw_save_trap_vec(save_trap_init); -#else - ofw_real_mode = 1; -#endif - - fdt = fdt_ptr; -} - -boolean_t -OF_bootstrap() -{ - boolean_t status = FALSE; - int err = 0; - -#ifdef AIM - if (openfirmware_entry != NULL) { - if (ofw_real_mode) { - status = OF_install(OFW_STD_REAL, 0); - } else { - #ifdef __powerpc64__ - status = OF_install(OFW_STD_32BIT, 0); - #else - status = OF_install(OFW_STD_DIRECT, 0); - #endif - } - - if (status != TRUE) - return status; - - err = OF_init(openfirmware); - } else -#endif - if (fdt != NULL) { -#ifdef FDT -#ifdef AIM - bus_space_tag_t fdt_bt; - vm_offset_t tmp_fdt_ptr; - vm_size_t fdt_size; - uintptr_t fdt_va; -#endif - - status = OF_install(OFW_FDT, 0); - if (status != TRUE) - return status; - -#ifdef AIM /* AIM-only for now -- Book-E does this remapping in early init */ - /* Get the FDT size for mapping if we can */ - tmp_fdt_ptr = pmap_early_io_map((vm_paddr_t)fdt, PAGE_SIZE); - if (fdt_check_header((void *)tmp_fdt_ptr) != 0) { - pmap_early_io_unmap(tmp_fdt_ptr, PAGE_SIZE); - return FALSE; - } - fdt_size = fdt_totalsize((void *)tmp_fdt_ptr); - pmap_early_io_unmap(tmp_fdt_ptr, PAGE_SIZE); - - /* - * Map this for real. Use bus_space_map() to take advantage - * of its auto-remapping function once the kernel is loaded. - * This is a dirty hack, but what we have. - */ -#ifdef __LITTLE_ENDIAN__ - fdt_bt = &bs_le_tag; -#else - fdt_bt = &bs_be_tag; -#endif - bus_space_map(fdt_bt, (vm_paddr_t)fdt, fdt_size, 0, &fdt_va); - - err = OF_init((void *)fdt_va); -#else - err = OF_init(fdt); -#endif -#endif - } - - #ifdef FDT_DTB_STATIC - /* - * Check for a statically included blob already in the kernel and - * needing no mapping. - */ - else { - status = OF_install(OFW_FDT, 0); - if (status != TRUE) - return status; - err = OF_init(&fdt_static_dtb); - } - #endif - - if (err != 0) { - OF_install(NULL, 0); - status = FALSE; - } - - return (status); -} - -#ifdef AIM -void -ofw_quiesce(void) -{ - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - } args; - - KASSERT(!pmap_bootstrapped, ("Cannot call ofw_quiesce after VM is up")); - - args.name = (cell_t)(uintptr_t)"quiesce"; - args.nargs = 0; - args.nreturns = 0; - openfirmware(&args); -} - -static int -openfirmware_core(void *args) -{ - int result; - register_t oldmsr; - - if (openfirmware_entry == NULL) - return (-1); - - /* - * Turn off exceptions - we really don't want to end up - * anywhere unexpected with PCPU set to something strange - * or the stack pointer wrong. - */ - oldmsr = intr_disable(); - - ofw_sprg_prepare(); - - /* Save trap vectors */ - ofw_save_trap_vec(save_trap_of); - - /* Restore initially saved trap vectors */ - ofw_restore_trap_vec(save_trap_init); - -#ifndef __powerpc64__ - /* - * Clear battable[] translations - */ - if (!(cpu_features & PPC_FEATURE_64)) - __asm __volatile("mtdbatu 2, %0\n" - "mtdbatu 3, %0" : : "r" (0)); - isync(); -#endif - - result = ofwcall(args); - - /* Restore trap vecotrs */ - ofw_restore_trap_vec(save_trap_of); - - ofw_sprg_restore(); - - intr_restore(oldmsr); - - return (result); -} - -#ifdef SMP -struct ofw_rv_args { - void *args; - int retval; - volatile int in_progress; -}; - -static void -ofw_rendezvous_dispatch(void *xargs) -{ - struct ofw_rv_args *rv_args = xargs; - - /* NOTE: Interrupts are disabled here */ - - if (PCPU_GET(cpuid) == 0) { - /* - * Execute all OF calls on CPU 0 - */ - rv_args->retval = openfirmware_core(rv_args->args); - rv_args->in_progress = 0; - } else { - /* - * Spin with interrupts off on other CPUs while OF has - * control of the machine. - */ - while (rv_args->in_progress) - cpu_spinwait(); - } -} -#endif - -static int -openfirmware(void *args) -{ - int result; - #ifdef SMP - struct ofw_rv_args rv_args; - #endif - - if (openfirmware_entry == NULL) - return (-1); - - #ifdef SMP - if (cold) { - result = openfirmware_core(args); - } else { - rv_args.args = args; - rv_args.in_progress = 1; - smp_rendezvous(smp_no_rendezvous_barrier, - ofw_rendezvous_dispatch, smp_no_rendezvous_barrier, - &rv_args); - result = rv_args.retval; - } - #else - result = openfirmware_core(args); - #endif - - return (result); -} - -void -OF_reboot() -{ - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t arg; - } args; - - args.name = (cell_t)(uintptr_t)"interpret"; - args.nargs = 1; - args.nreturns = 0; - args.arg = (cell_t)(uintptr_t)"reset-all"; - openfirmware_core(&args); /* Don't do rendezvous! */ - - for (;;); /* just in case */ -} - -#endif /* AIM */ - -void -OF_getetheraddr(device_t dev, u_char *addr) -{ - phandle_t node; - - node = ofw_bus_get_node(dev); - OF_getprop(node, "local-mac-address", addr, ETHER_ADDR_LEN); -} - -/* - * Return a bus handle and bus tag that corresponds to the register - * numbered regno for the device referenced by the package handle - * dev. This function is intended to be used by console drivers in - * early boot only. It works by mapping the address of the device's - * register in the address space of its parent and recursively walk - * the device tree upward this way. - */ -int -OF_decode_addr(phandle_t dev, int regno, bus_space_tag_t *tag, - bus_space_handle_t *handle, bus_size_t *sz) -{ - bus_addr_t addr; - bus_size_t size; - pcell_t pci_hi; - int flags, res; - - res = ofw_reg_to_paddr(dev, regno, &addr, &size, &pci_hi); - if (res < 0) - return (res); - - if (pci_hi == OFW_PADDR_NOT_PCI) { - *tag = &bs_be_tag; - flags = 0; - } else { - *tag = &bs_le_tag; - flags = (pci_hi & OFW_PCI_PHYS_HI_PREFETCHABLE) ? - BUS_SPACE_MAP_PREFETCHABLE: 0; - } - - if (sz != NULL) - *sz = size; - - return (bus_space_map(*tag, addr, size, flags, handle)); -} diff --git a/sys/powerpc/ofw/ofw_pcib_pci.c b/sys/powerpc/ofw/ofw_pcib_pci.c deleted file mode 100644 index 6ee829d112f..00000000000 --- a/sys/powerpc/ofw/ofw_pcib_pci.c +++ /dev/null @@ -1,173 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2000 Michael Smith - * Copyright (c) 2000 BSDi - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include "pcib_if.h" - -static int ofw_pcib_pci_probe(device_t bus); -static int ofw_pcib_pci_attach(device_t bus); -static phandle_t ofw_pcib_pci_get_node(device_t bus, device_t dev); -static int ofw_pcib_pci_route_interrupt(device_t bridge, device_t dev, - int intpin); - -static device_method_t ofw_pcib_pci_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ofw_pcib_pci_probe), - DEVMETHOD(device_attach, ofw_pcib_pci_attach), - - /* pcib interface */ - DEVMETHOD(pcib_route_interrupt, ofw_pcib_pci_route_interrupt), - DEVMETHOD(pcib_request_feature, pcib_request_feature_allow), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_node, ofw_pcib_pci_get_node), - - DEVMETHOD_END -}; - -static devclass_t pcib_devclass; - -struct ofw_pcib_softc { - /* - * This is here so that we can use pci bridge methods, too - the - * generic routines only need the dev, secbus and subbus members - * filled. - */ - struct pcib_softc ops_pcib_sc; - phandle_t ops_node; - struct ofw_bus_iinfo ops_iinfo; -}; - -DEFINE_CLASS_1(pcib, ofw_pcib_pci_driver, ofw_pcib_pci_methods, - sizeof(struct ofw_pcib_softc), pcib_driver); -EARLY_DRIVER_MODULE(ofw_pcib, pci, ofw_pcib_pci_driver, pcib_devclass, 0, 0, - BUS_PASS_BUS); - -static int -ofw_pcib_pci_probe(device_t dev) -{ - - if ((pci_get_class(dev) != PCIC_BRIDGE) || - (pci_get_subclass(dev) != PCIS_BRIDGE_PCI)) { - return (ENXIO); - } - - if (ofw_bus_get_node(dev) == -1) - return (ENXIO); - - device_set_desc(dev, "OFW PCI-PCI bridge"); - return (0); -} - -static int -ofw_pcib_pci_attach(device_t dev) -{ - struct ofw_pcib_softc *sc; - - sc = device_get_softc(dev); - sc->ops_pcib_sc.dev = dev; - sc->ops_node = ofw_bus_get_node(dev); - - ofw_bus_setup_iinfo(sc->ops_node, &sc->ops_iinfo, - sizeof(cell_t)); - - pcib_attach_common(dev); - return (pcib_attach_child(dev)); -} - -static phandle_t -ofw_pcib_pci_get_node(device_t bridge, device_t dev) -{ - /* We have only one child, the PCI bus, so pass it our node */ - - return (ofw_bus_get_node(bridge)); -} - -static int -ofw_pcib_pci_route_interrupt(device_t bridge, device_t dev, int intpin) -{ - struct ofw_pcib_softc *sc; - struct ofw_bus_iinfo *ii; - struct ofw_pci_register reg; - cell_t pintr, mintr[2]; - int intrcells; - phandle_t iparent; - - sc = device_get_softc(bridge); - ii = &sc->ops_iinfo; - if (ii->opi_imapsz > 0) { - pintr = intpin; - - /* Fabricate imap information if this isn't an OFW device */ - bzero(®, sizeof(reg)); - reg.phys_hi = (pci_get_bus(dev) << OFW_PCI_PHYS_HI_BUSSHIFT) | - (pci_get_slot(dev) << OFW_PCI_PHYS_HI_DEVICESHIFT) | - (pci_get_function(dev) << OFW_PCI_PHYS_HI_FUNCTIONSHIFT); - - intrcells = ofw_bus_lookup_imap(ofw_bus_get_node(dev), ii, ®, - sizeof(reg), &pintr, sizeof(pintr), mintr, sizeof(mintr), - &iparent); - if (intrcells) { - /* - * If we've found a mapping, return it and don't map - * it again on higher levels - that causes problems - * in some cases, and never seems to be required. - */ - mintr[0] = ofw_bus_map_intr(dev, iparent, intrcells, - mintr); - return (mintr[0]); - } - } else if (intpin >= 1 && intpin <= 4) { - /* - * When an interrupt map is missing, we need to do the - * standard PCI swizzle and continue mapping at the parent. - */ - return (pcib_route_interrupt(bridge, dev, intpin)); - } - return (PCIB_ROUTE_INTERRUPT(device_get_parent(device_get_parent( - bridge)), bridge, intpin)); -} diff --git a/sys/powerpc/ofw/ofw_pcibus.c b/sys/powerpc/ofw/ofw_pcibus.c deleted file mode 100644 index b68075930de..00000000000 --- a/sys/powerpc/ofw/ofw_pcibus.c +++ /dev/null @@ -1,428 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1997, Stefan Esser - * Copyright (c) 2000, Michael Smith - * Copyright (c) 2000, BSDi - * Copyright (c) 2003, Thomas Moestl - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include "ofw_pcibus.h" -#include "pcib_if.h" -#include "pci_if.h" - -typedef uint32_t ofw_pci_intr_t; - -/* Methods */ -static device_probe_t ofw_pcibus_probe; -static device_attach_t ofw_pcibus_attach; -static pci_alloc_devinfo_t ofw_pcibus_alloc_devinfo; -static pci_assign_interrupt_t ofw_pcibus_assign_interrupt; -static ofw_bus_get_devinfo_t ofw_pcibus_get_devinfo; -static bus_child_deleted_t ofw_pcibus_child_deleted; -static int ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child, - char *buf, size_t buflen); - -static void ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno); -static void ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno); - -static device_method_t ofw_pcibus_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ofw_pcibus_probe), - DEVMETHOD(device_attach, ofw_pcibus_attach), - - /* Bus interface */ - DEVMETHOD(bus_child_deleted, ofw_pcibus_child_deleted), - DEVMETHOD(bus_child_pnpinfo_str, ofw_pcibus_child_pnpinfo_str_method), - DEVMETHOD(bus_rescan, bus_null_rescan), - DEVMETHOD(bus_get_cpus, ofw_pcibus_get_cpus), - DEVMETHOD(bus_get_domain, ofw_pcibus_get_domain), - - /* PCI interface */ - DEVMETHOD(pci_alloc_devinfo, ofw_pcibus_alloc_devinfo), - DEVMETHOD(pci_assign_interrupt, ofw_pcibus_assign_interrupt), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_devinfo, ofw_pcibus_get_devinfo), - DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), - DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), - DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), - DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), - DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), - - DEVMETHOD_END -}; - -static devclass_t pci_devclass; - -DEFINE_CLASS_1(pci, ofw_pcibus_driver, ofw_pcibus_methods, - sizeof(struct pci_softc), pci_driver); -EARLY_DRIVER_MODULE(ofw_pcibus, pcib, ofw_pcibus_driver, pci_devclass, 0, 0, - BUS_PASS_BUS); -MODULE_VERSION(ofw_pcibus, 1); -MODULE_DEPEND(ofw_pcibus, pci, 1, 1, 1); - -static int ofw_devices_only = 0; -TUNABLE_INT("hw.pci.ofw_devices_only", &ofw_devices_only); - -static int -ofw_pcibus_probe(device_t dev) -{ - - if (ofw_bus_get_node(dev) == -1) - return (ENXIO); - device_set_desc(dev, "OFW PCI bus"); - - return (BUS_PROBE_DEFAULT); -} - -static int -ofw_pcibus_attach(device_t dev) -{ - u_int busno, domain; - int error; - - error = pci_attach_common(dev); - if (error) - return (error); - domain = pcib_get_domain(dev); - busno = pcib_get_bus(dev); - - /* - * Attach those children represented in the device tree. - */ - - ofw_pcibus_enum_devtree(dev, domain, busno); - - /* - * We now attach any laggard devices. FDT, for instance, allows - * the device tree to enumerate only some PCI devices. Apple's - * OF device tree on some Grackle-based hardware can also miss - * functions on multi-function cards. - */ - - if (!ofw_devices_only) - ofw_pcibus_enum_bus(dev, domain, busno); - - return (bus_generic_attach(dev)); -} - -struct pci_devinfo * -ofw_pcibus_alloc_devinfo(device_t dev) -{ - struct ofw_pcibus_devinfo *dinfo; - - dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); - return (&dinfo->opd_dinfo); -} - -static void -ofw_pcibus_enum_devtree(device_t dev, u_int domain, u_int busno) -{ - device_t pcib; - struct ofw_pci_register pcir; - struct ofw_pcibus_devinfo *dinfo; - phandle_t node, child; - u_int func, slot; - int intline; - - pcib = device_get_parent(dev); - node = ofw_bus_get_node(dev); - - for (child = OF_child(node); child != 0; child = OF_peer(child)) { - if (OF_getencprop(child, "reg", (pcell_t *)&pcir, - sizeof(pcir)) == -1) - continue; - slot = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi); - func = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi); - - /* Some OFW device trees contain dupes. */ - if (pci_find_dbsf(domain, busno, slot, func) != NULL) - continue; - - /* - * The preset in the intline register is usually bogus. Reset - * it such that the PCI code will reroute the interrupt if - * needed. - */ - - intline = PCI_INVALID_IRQ; - if (OF_getproplen(child, "interrupts") > 0) - intline = 0; - PCIB_WRITE_CONFIG(pcib, busno, slot, func, PCIR_INTLINE, - intline, 1); - - /* - * Now set up the PCI and OFW bus layer devinfo and add it - * to the PCI bus. - */ - - dinfo = (struct ofw_pcibus_devinfo *)pci_read_device(pcib, dev, - domain, busno, slot, func); - if (dinfo == NULL) - continue; - if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) != - 0) { - pci_freecfg((struct pci_devinfo *)dinfo); - continue; - } - dinfo->opd_dma_tag = NULL; - pci_add_child(dev, (struct pci_devinfo *)dinfo); - - /* - * Some devices don't have an intpin set, but do have - * interrupts. These are fully specified, and set in the - * interrupts property, so add that value to the device's - * resource list. - */ - if (dinfo->opd_dinfo.cfg.intpin == 0) - ofw_bus_intr_to_rl(dev, child, - &dinfo->opd_dinfo.resources, NULL); - } -} - -/* - * The following is an almost exact clone of pci_add_children(), with the - * addition that it (a) will not add children that have already been added, - * and (b) will set up the OFW devinfo to point to invalid values. This is - * to handle non-enumerated PCI children as exist in FDT and on the second - * function of the Rage 128 in my Blue & White G3. - */ - -static void -ofw_pcibus_enum_bus(device_t dev, u_int domain, u_int busno) -{ - device_t pcib; - struct ofw_pcibus_devinfo *dinfo; - int maxslots; - int s, f, pcifunchigh; - uint8_t hdrtype; - - pcib = device_get_parent(dev); - - maxslots = PCIB_MAXSLOTS(pcib); - for (s = 0; s <= maxslots; s++) { - pcifunchigh = 0; - f = 0; - DELAY(1); - hdrtype = PCIB_READ_CONFIG(pcib, busno, s, f, PCIR_HDRTYPE, 1); - if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE) - continue; - if (hdrtype & PCIM_MFDEV) - pcifunchigh = PCI_FUNCMAX; - for (f = 0; f <= pcifunchigh; f++) { - /* Filter devices we have already added */ - if (pci_find_dbsf(domain, busno, s, f) != NULL) - continue; - - dinfo = (struct ofw_pcibus_devinfo *)pci_read_device( - pcib, dev, domain, busno, s, f); - if (dinfo == NULL) - continue; - - dinfo->opd_dma_tag = NULL; - dinfo->opd_obdinfo.obd_node = -1; - - dinfo->opd_obdinfo.obd_name = NULL; - dinfo->opd_obdinfo.obd_compat = NULL; - dinfo->opd_obdinfo.obd_type = NULL; - dinfo->opd_obdinfo.obd_model = NULL; - - /* - * For non OFW-devices, don't believe 0 - * for an interrupt. - */ - if (dinfo->opd_dinfo.cfg.intline == 0) { - dinfo->opd_dinfo.cfg.intline = PCI_INVALID_IRQ; - PCIB_WRITE_CONFIG(pcib, busno, s, f, - PCIR_INTLINE, PCI_INVALID_IRQ, 1); - } - - pci_add_child(dev, (struct pci_devinfo *)dinfo); - } - } -} - -static void -ofw_pcibus_child_deleted(device_t dev, device_t child) -{ - struct ofw_pcibus_devinfo *dinfo; - - dinfo = device_get_ivars(child); - ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo); - pci_child_deleted(dev, child); -} - -static int -ofw_pcibus_child_pnpinfo_str_method(device_t cbdev, device_t child, char *buf, - size_t buflen) -{ - pci_child_pnpinfo_str_method(cbdev, child, buf, buflen); - - if (ofw_bus_get_node(child) != -1) { - strlcat(buf, " ", buflen); /* Separate info */ - ofw_bus_gen_child_pnpinfo_str(cbdev, child, buf, buflen); - } - - return (0); -} - -static int -ofw_pcibus_assign_interrupt(device_t dev, device_t child) -{ - ofw_pci_intr_t intr[2]; - phandle_t node, iparent; - int isz, icells; - - node = ofw_bus_get_node(child); - - if (node == -1) { - /* Non-firmware enumerated child, use standard routing */ - - intr[0] = pci_get_intpin(child); - return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, - intr[0])); - } - - /* - * Try to determine the node's interrupt parent so we know which - * PIC to use. - */ - - iparent = -1; - if (OF_getencprop(node, "interrupt-parent", &iparent, - sizeof(iparent)) < 0) - iparent = -1; - icells = 1; - if (iparent != -1) - OF_getencprop(OF_node_from_xref(iparent), "#interrupt-cells", - &icells, sizeof(icells)); - - /* - * Any AAPL,interrupts property gets priority and is - * fully specified (i.e. does not need routing) - */ - - isz = OF_getencprop(node, "AAPL,interrupts", intr, sizeof(intr)); - if (isz == sizeof(intr[0])*icells) - return ((iparent == -1) ? intr[0] : ofw_bus_map_intr(dev, - iparent, icells, intr)); - - isz = OF_getencprop(node, "interrupts", intr, sizeof(intr)); - if (isz == sizeof(intr[0])*icells) { - if (iparent != -1) - intr[0] = ofw_bus_map_intr(dev, iparent, icells, intr); - } else { - /* No property: our best guess is the intpin. */ - intr[0] = pci_get_intpin(child); - } - - /* - * If we got intr from a property, it may or may not be an intpin. - * For on-board devices, it frequently is not, and is completely out - * of the valid intpin range. For PCI slots, it hopefully is, - * otherwise we will have trouble interfacing with non-OFW buses - * such as cardbus. - * Since we cannot tell which it is without violating layering, we - * will always use the route_interrupt method, and treat exceptions - * on the level they become apparent. - */ - return (PCIB_ROUTE_INTERRUPT(device_get_parent(dev), child, intr[0])); -} - -static const struct ofw_bus_devinfo * -ofw_pcibus_get_devinfo(device_t bus, device_t dev) -{ - struct ofw_pcibus_devinfo *dinfo; - - dinfo = device_get_ivars(dev); - return (&dinfo->opd_obdinfo); -} - -int -ofw_pcibus_get_cpus(device_t dev, device_t child, enum cpu_sets op, size_t setsize, - cpuset_t *cpuset) -{ - int d, error; - - d = platform_node_numa_domain(ofw_bus_get_node(dev)); - - switch (op) { - case LOCAL_CPUS: - if (setsize != sizeof(cpuset_t)) - return (EINVAL); - *cpuset = cpuset_domain[d]; - return (0); - case INTR_CPUS: - error = bus_generic_get_cpus(dev, child, op, setsize, cpuset); - if (error != 0) - return (error); - if (setsize != sizeof(cpuset_t)) - return (EINVAL); - CPU_AND(cpuset, cpuset, &cpuset_domain[d]); - return (0); - default: - return (bus_generic_get_cpus(dev, child, op, setsize, cpuset)); - } - return (0); -} - -/* - * Fetch the NUMA domain for the given device 'dev'. - * - * If a device has a _PXM method, map that to a NUMA domain. - * Otherwise, pass the request up to the parent. - * If there's no matching domain or the domain cannot be - * determined, return ENOENT. - */ -int -ofw_pcibus_get_domain(device_t dev, device_t child, int *domain) -{ - *domain = platform_node_numa_domain(ofw_bus_get_node(child)); - - return (0); -} diff --git a/sys/powerpc/ofw/ofw_pcibus.h b/sys/powerpc/ofw/ofw_pcibus.h deleted file mode 100644 index cdee5fd71e9..00000000000 --- a/sys/powerpc/ofw/ofw_pcibus.h +++ /dev/null @@ -1,50 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef POWERPC_OFW_OFW_PCIBUS_H -#define POWERPC_OFW_OFW_PCIBUS_H - -#include -#include - -#include -#include -#include - -/* - * Export class definition for inheritance purposes - */ -DECLARE_CLASS(ofw_pcibus_driver); /* PCI Bus Enumerators */ - -struct ofw_pcibus_devinfo { - struct pci_devinfo opd_dinfo; - struct ofw_bus_devinfo opd_obdinfo; - bus_dma_tag_t opd_dma_tag; -}; - -#endif // POWERPC_OFW_OFW_PCIBUS_H diff --git a/sys/powerpc/ofw/ofw_real.c b/sys/powerpc/ofw/ofw_real.c deleted file mode 100644 index 1d29dd4f4c8..00000000000 --- a/sys/powerpc/ofw/ofw_real.c +++ /dev/null @@ -1,1187 +0,0 @@ -/* $NetBSD: Locore.c,v 1.7 2000/08/20 07:04:59 tsubai Exp $ */ - -/*- - * SPDX-License-Identifier:BSD-4-Clause AND BSD-2-Clause - * - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*- - * Copyright (C) 2000 Benno Rice. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include "ofw_if.h" - -static int ofw_real_init(ofw_t, void *openfirm); -static int ofw_real_test(ofw_t, const char *name); -static phandle_t ofw_real_peer(ofw_t, phandle_t node); -static phandle_t ofw_real_child(ofw_t, phandle_t node); -static phandle_t ofw_real_parent(ofw_t, phandle_t node); -static phandle_t ofw_real_instance_to_package(ofw_t, ihandle_t instance); -static ssize_t ofw_real_getproplen(ofw_t, phandle_t package, - const char *propname); -static ssize_t ofw_real_getprop(ofw_t, phandle_t package, const char *propname, - void *buf, size_t buflen); -static int ofw_real_nextprop(ofw_t, phandle_t package, const char *previous, - char *buf, size_t); -static int ofw_real_setprop(ofw_t, phandle_t package, const char *propname, - const void *buf, size_t len); -static ssize_t ofw_real_canon(ofw_t, const char *device, char *buf, size_t len); -static phandle_t ofw_real_finddevice(ofw_t, const char *device); -static ssize_t ofw_real_instance_to_path(ofw_t, ihandle_t instance, char *buf, - size_t len); -static ssize_t ofw_real_package_to_path(ofw_t, phandle_t package, char *buf, - size_t len); -static int ofw_real_call_method(ofw_t, ihandle_t instance, const char *method, - int nargs, int nreturns, cell_t *args_and_returns); -static int ofw_real_interpret(ofw_t ofw, const char *cmd, int nreturns, - cell_t *returns); -static ihandle_t ofw_real_open(ofw_t, const char *device); -static void ofw_real_close(ofw_t, ihandle_t instance); -static ssize_t ofw_real_read(ofw_t, ihandle_t instance, void *addr, size_t len); -static ssize_t ofw_real_write(ofw_t, ihandle_t instance, const void *addr, - size_t len); -static int ofw_real_seek(ofw_t, ihandle_t instance, u_int64_t pos); -static caddr_t ofw_real_claim(ofw_t, void *virt, size_t size, u_int align); -static void ofw_real_release(ofw_t, void *virt, size_t size); -static void ofw_real_enter(ofw_t); -static void ofw_real_exit(ofw_t); - -static ofw_method_t ofw_real_methods[] = { - OFWMETHOD(ofw_init, ofw_real_init), - OFWMETHOD(ofw_peer, ofw_real_peer), - OFWMETHOD(ofw_child, ofw_real_child), - OFWMETHOD(ofw_parent, ofw_real_parent), - OFWMETHOD(ofw_instance_to_package, ofw_real_instance_to_package), - OFWMETHOD(ofw_getproplen, ofw_real_getproplen), - OFWMETHOD(ofw_getprop, ofw_real_getprop), - OFWMETHOD(ofw_nextprop, ofw_real_nextprop), - OFWMETHOD(ofw_setprop, ofw_real_setprop), - OFWMETHOD(ofw_canon, ofw_real_canon), - OFWMETHOD(ofw_finddevice, ofw_real_finddevice), - OFWMETHOD(ofw_instance_to_path, ofw_real_instance_to_path), - OFWMETHOD(ofw_package_to_path, ofw_real_package_to_path), - - OFWMETHOD(ofw_test, ofw_real_test), - OFWMETHOD(ofw_call_method, ofw_real_call_method), - OFWMETHOD(ofw_interpret, ofw_real_interpret), - OFWMETHOD(ofw_open, ofw_real_open), - OFWMETHOD(ofw_close, ofw_real_close), - OFWMETHOD(ofw_read, ofw_real_read), - OFWMETHOD(ofw_write, ofw_real_write), - OFWMETHOD(ofw_seek, ofw_real_seek), - OFWMETHOD(ofw_claim, ofw_real_claim), - OFWMETHOD(ofw_release, ofw_real_release), - OFWMETHOD(ofw_enter, ofw_real_enter), - OFWMETHOD(ofw_exit, ofw_real_exit), - { 0, 0 } -}; - -static ofw_def_t ofw_real = { - OFW_STD_REAL, - ofw_real_methods, - 0 -}; -OFW_DEF(ofw_real); - -static ofw_def_t ofw_32bit = { - OFW_STD_32BIT, - ofw_real_methods, - 0 -}; -OFW_DEF(ofw_32bit); - -static MALLOC_DEFINE(M_OFWREAL, "ofwreal", - "Open Firmware Real Mode Bounce Page"); - -static int (*openfirmware)(void *); - -static vm_offset_t of_bounce_phys; -static caddr_t of_bounce_virt; -static off_t of_bounce_offset; -static size_t of_bounce_size; - -#define IN(x) htobe32(x) -#define OUT(x) be32toh(x) - -/* - * To be able to use OFW console on PPC, that requires real mode OFW, - * the mutex that guards the mapping/unmapping of virtual to physical - * buffers (of_real_mtx) must be of SPIN type. This is needed because - * kernel console first locks a SPIN mutex before calling OFW real. - * By default, of_real_mtx is a sleepable mutex. To make it of SPIN - * type, use the following tunnable: - * machdep.ofw.mtx_spin=1 - * - * Besides that, a few more tunables are needed to select and use the - * OFW console with real mode OFW. - * - * In order to disable the use of OFW FrameBuffer and fallback to the - * OFW console, use: - * hw.ofwfb.disable=1 - * - * To disable the use of FDT (that doesn't support OFW read/write methods) - * and use real OFW instead, unset the following loader variable: - * unset usefdt - * - * OFW is put in quiesce state in early kernel boot, which usually disables - * OFW read/write capabilities (in QEMU write continue to work, but - * read doesn't). To avoid OFW quiesce, use: - * debug.quiesce_ofw=0 - * - * Note that disabling OFW quiesce can cause conflicts between kernel and - * OFW trying to control the same hardware. Thus, it must be used with care. - * Some conflicts can be avoided by disabling kernel drivers with hints. - * For instance, to disable a xhci controller and an USB keyboard connected - * to it, that may be already being used for input by OFW, use: - * hint.xhci.0.disabled=1 - */ - -static struct mtx of_bounce_mtx; -static struct mtx of_spin_mtx; -static struct mtx *of_real_mtx; -static void (*of_mtx_lock)(void); -static void (*of_mtx_unlock)(void); - -extern int ofw_real_mode; - -/* - * After the VM is up, allocate a wired, low memory bounce page. - */ - -static void ofw_real_bounce_alloc(void *); - -SYSINIT(ofw_real_bounce_alloc, SI_SUB_KMEM, SI_ORDER_ANY, - ofw_real_bounce_alloc, NULL); - -static void -ofw_real_mtx_lock_spin(void) -{ - mtx_lock_spin(of_real_mtx); -} - -static void -ofw_real_mtx_lock(void) -{ - mtx_lock(of_real_mtx); -} - -static void -ofw_real_mtx_unlock_spin(void) -{ - mtx_unlock_spin(of_real_mtx); -} - -static void -ofw_real_mtx_unlock(void) -{ - mtx_unlock(of_real_mtx); -} - -static void -ofw_real_start(void) -{ - (*of_mtx_lock)(); - of_bounce_offset = 0; -} - -static void -ofw_real_stop(void) -{ - (*of_mtx_unlock)(); -} - -static void -ofw_real_bounce_alloc(void *junk) -{ - caddr_t temp; - - /* - * Check that ofw_real is actually in use before allocating wads - * of memory. Do this by checking if our mutex has been set up. - */ - if (!mtx_initialized(&of_bounce_mtx)) - return; - - /* - * Allocate a page of contiguous, wired physical memory that can - * fit into a 32-bit address space and accessed from real mode. - */ - temp = contigmalloc(4 * PAGE_SIZE, M_OFWREAL, 0, 0, - ulmin(platform_real_maxaddr(), BUS_SPACE_MAXADDR_32BIT), PAGE_SIZE, - 4 * PAGE_SIZE); - if (temp == NULL) - panic("%s: Not able to allocated contiguous memory\n", __func__); - - mtx_lock(&of_bounce_mtx); - - of_bounce_virt = temp; - - of_bounce_phys = vtophys(of_bounce_virt); - of_bounce_size = 4 * PAGE_SIZE; - - /* - * For virtual-mode OF, direct map this physical address so that - * we have a 32-bit virtual address to give OF. - */ - - if (!ofw_real_mode && (!hw_direct_map || DMAP_BASE_ADDRESS != 0)) - pmap_kenter(of_bounce_phys, of_bounce_phys); - - mtx_unlock(&of_bounce_mtx); -} - -static cell_t -ofw_real_map(const void *buf, size_t len) -{ - static char emergency_buffer[255]; - cell_t phys; - - mtx_assert(of_real_mtx, MA_OWNED); - - if (of_bounce_virt == NULL) { - /* - * If we haven't set up the MMU, then buf is guaranteed - * to be accessible to OF, because the only memory we - * can use right now is memory mapped by firmware. - */ - if (!pmap_bootstrapped) - return (cell_t)((uintptr_t)buf & ~DMAP_BASE_ADDRESS); - - /* - * XXX: It is possible for us to get called before the VM has - * come online, but after the MMU is up. We don't have the - * bounce buffer yet, but can no longer presume a 1:1 mapping. - * Copy into the emergency buffer, and reset at the end. - */ - of_bounce_virt = emergency_buffer; - of_bounce_phys = (vm_offset_t)of_bounce_virt & - ~DMAP_BASE_ADDRESS; - of_bounce_size = sizeof(emergency_buffer); - } - - /* - * Make sure the bounce page offset satisfies any reasonable - * alignment constraint. - */ - of_bounce_offset += sizeof(register_t) - - (of_bounce_offset % sizeof(register_t)); - - if (of_bounce_offset + len > of_bounce_size) { - panic("Oversize Open Firmware call!"); - return 0; - } - - if (buf != NULL) - memcpy(of_bounce_virt + of_bounce_offset, buf, len); - else - return (0); - - phys = of_bounce_phys + of_bounce_offset; - - of_bounce_offset += len; - - return (phys); -} - -static void -ofw_real_unmap(cell_t physaddr, void *buf, size_t len) -{ - mtx_assert(of_real_mtx, MA_OWNED); - - if (of_bounce_virt == NULL) - return; - - if (physaddr == 0) - return; - - memcpy(buf,of_bounce_virt + (physaddr - of_bounce_phys),len); -} - -/* Initialiser */ - -static int -ofw_real_init(ofw_t ofw, void *openfirm) -{ - int mtx_spin; - - openfirmware = (int (*)(void *))openfirm; - mtx_init(&of_bounce_mtx, "OF Bounce Page", NULL, MTX_DEF); - - mtx_spin = 0; - TUNABLE_INT_FETCH("machdep.ofw.mtx_spin", &mtx_spin); - if (mtx_spin) { - mtx_init(&of_spin_mtx, "OF Real", NULL, MTX_SPIN); - of_real_mtx = &of_spin_mtx; - of_mtx_lock = ofw_real_mtx_lock_spin; - of_mtx_unlock = ofw_real_mtx_unlock_spin; - } else { - of_real_mtx = &of_bounce_mtx; - of_mtx_lock = ofw_real_mtx_lock; - of_mtx_unlock = ofw_real_mtx_unlock; - } - - of_bounce_virt = NULL; - return (0); -} - -/* - * Generic functions - */ - -/* Test to see if a service exists. */ -static int -ofw_real_test(ofw_t ofw, const char *name) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t service; - cell_t missing; - } args; - - args.name = IN((cell_t)(uintptr_t)"test"); - args.nargs = IN(1); - args.nreturns = IN(1); - - ofw_real_start(); - - args.service = IN(ofw_real_map(name, strlen(name) + 1)); - argsptr = ofw_real_map(&args, sizeof(args)); - if (args.service == 0 || openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_stop(); - return (OUT(args.missing)); -} - -/* - * Device tree functions - */ - -/* Return the next sibling of this node or 0. */ -static phandle_t -ofw_real_peer(ofw_t ofw, phandle_t node) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t node; - cell_t next; - } args; - - args.name = IN((cell_t)(uintptr_t)"peer"); - args.nargs = IN(1); - args.nreturns = IN(1); - - args.node = IN(node); - ofw_real_start(); - argsptr = ofw_real_map(&args, sizeof(args)); - if (openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (0); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_stop(); - return (OUT(args.next)); -} - -/* Return the first child of this node or 0. */ -static phandle_t -ofw_real_child(ofw_t ofw, phandle_t node) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t node; - cell_t child; - } args; - - args.name = IN((cell_t)(uintptr_t)"child"); - args.nargs = IN(1); - args.nreturns = IN(1); - - args.node = IN(node); - ofw_real_start(); - argsptr = ofw_real_map(&args, sizeof(args)); - if (openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (0); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_stop(); - return (OUT(args.child)); -} - -/* Return the parent of this node or 0. */ -static phandle_t -ofw_real_parent(ofw_t ofw, phandle_t node) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t node; - cell_t parent; - } args; - - args.name = IN((cell_t)(uintptr_t)"parent"); - args.nargs = IN(1); - args.nreturns = IN(1); - - args.node = IN(node); - ofw_real_start(); - argsptr = ofw_real_map(&args, sizeof(args)); - if (openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (0); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_stop(); - return (OUT(args.parent)); -} - -/* Return the package handle that corresponds to an instance handle. */ -static phandle_t -ofw_real_instance_to_package(ofw_t ofw, ihandle_t instance) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t instance; - cell_t package; - } args; - - args.name = IN((cell_t)(uintptr_t)"instance-to-package"); - args.nargs = IN(1); - args.nreturns = IN(1); - - args.instance = IN(instance); - ofw_real_start(); - argsptr = ofw_real_map(&args, sizeof(args)); - if (openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_stop(); - return (OUT(args.package)); -} - -/* Get the length of a property of a package. */ -static ssize_t -ofw_real_getproplen(ofw_t ofw, phandle_t package, const char *propname) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t package; - cell_t propname; - int32_t proplen; - } args; - - args.name = IN((cell_t)(uintptr_t)"getproplen"); - args.nargs = IN(2); - args.nreturns = IN(1); - - ofw_real_start(); - - args.package = IN(package); - args.propname = IN(ofw_real_map(propname, strlen(propname) + 1)); - argsptr = ofw_real_map(&args, sizeof(args)); - if (args.propname == 0 || openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_stop(); - return ((ssize_t)(int32_t)OUT(args.proplen)); -} - -/* Get the value of a property of a package. */ -static ssize_t -ofw_real_getprop(ofw_t ofw, phandle_t package, const char *propname, void *buf, - size_t buflen) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t package; - cell_t propname; - cell_t buf; - cell_t buflen; - int32_t size; - } args; - - args.name = IN((cell_t)(uintptr_t)"getprop"); - args.nargs = IN(4); - args.nreturns = IN(1); - - ofw_real_start(); - - args.package = IN(package); - args.propname = IN(ofw_real_map(propname, strlen(propname) + 1)); - args.buf = IN(ofw_real_map(buf, buflen)); - args.buflen = IN(buflen); - argsptr = ofw_real_map(&args, sizeof(args)); - if (args.propname == 0 || args.buf == 0 || - openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_unmap(OUT(args.buf), buf, buflen); - - ofw_real_stop(); - return ((ssize_t)(int32_t)OUT(args.size)); -} - -/* Get the next property of a package. */ -static int -ofw_real_nextprop(ofw_t ofw, phandle_t package, const char *previous, - char *buf, size_t size) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t package; - cell_t previous; - cell_t buf; - cell_t flag; - } args; - - args.name = IN((cell_t)(uintptr_t)"nextprop"); - args.nargs = IN(3); - args.nreturns = IN(1); - - ofw_real_start(); - - args.package = IN(package); - args.previous = IN(ofw_real_map(previous, (previous != NULL) ? (strlen(previous) + 1) : 0)); - args.buf = IN(ofw_real_map(buf, size)); - argsptr = ofw_real_map(&args, sizeof(args)); - if (args.buf == 0 || openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_unmap(OUT(args.buf), buf, size); - - ofw_real_stop(); - return (OUT(args.flag)); -} - -/* Set the value of a property of a package. */ -/* XXX Has a bug on FirePower */ -static int -ofw_real_setprop(ofw_t ofw, phandle_t package, const char *propname, - const void *buf, size_t len) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t package; - cell_t propname; - cell_t buf; - cell_t len; - cell_t size; - } args; - - args.name = IN((cell_t)(uintptr_t)"setprop"); - args.nargs = IN(4); - args.nreturns = IN(1); - - ofw_real_start(); - - args.package = IN(package); - args.propname = IN(ofw_real_map(propname, strlen(propname) + 1)); - args.buf = IN(ofw_real_map(buf, len)); - args.len = IN(len); - argsptr = ofw_real_map(&args, sizeof(args)); - if (args.propname == 0 || args.buf == 0 || - openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_stop(); - return (OUT(args.size)); -} - -/* Convert a device specifier to a fully qualified pathname. */ -static ssize_t -ofw_real_canon(ofw_t ofw, const char *device, char *buf, size_t len) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t device; - cell_t buf; - cell_t len; - int32_t size; - } args; - - args.name = IN((cell_t)(uintptr_t)"canon"); - args.nargs = IN(3); - args.nreturns = IN(1); - - ofw_real_start(); - - args.device = IN(ofw_real_map(device, strlen(device) + 1)); - args.buf = IN(ofw_real_map(buf, len)); - args.len = IN(len); - argsptr = ofw_real_map(&args, sizeof(args)); - if (args.device == 0 || args.buf == 0 || - openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_unmap(OUT(args.buf), buf, len); - - ofw_real_stop(); - return ((ssize_t)(int32_t)OUT(args.size)); -} - -/* Return a package handle for the specified device. */ -static phandle_t -ofw_real_finddevice(ofw_t ofw, const char *device) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t device; - cell_t package; - } args; - - args.name = IN((cell_t)(uintptr_t)"finddevice"); - args.nargs = IN(1); - args.nreturns = IN(1); - - ofw_real_start(); - - args.device = IN(ofw_real_map(device, strlen(device) + 1)); - argsptr = ofw_real_map(&args, sizeof(args)); - if (args.device == 0 || - openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_stop(); - return (OUT(args.package)); -} - -/* Return the fully qualified pathname corresponding to an instance. */ -static ssize_t -ofw_real_instance_to_path(ofw_t ofw, ihandle_t instance, char *buf, size_t len) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t instance; - cell_t buf; - cell_t len; - int32_t size; - } args; - - args.name = IN((cell_t)(uintptr_t)"instance-to-path"); - args.nargs = IN(3); - args.nreturns = IN(1); - - ofw_real_start(); - - args.instance = IN(instance); - args.buf = IN(ofw_real_map(buf, len)); - args.len = IN(len); - argsptr = ofw_real_map(&args, sizeof(args)); - if (args.buf == 0 || - openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_unmap(OUT(args.buf), buf, len); - - ofw_real_stop(); - return ((ssize_t)(int32_t)OUT(args.size)); -} - -/* Return the fully qualified pathname corresponding to a package. */ -static ssize_t -ofw_real_package_to_path(ofw_t ofw, phandle_t package, char *buf, size_t len) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t package; - cell_t buf; - cell_t len; - int32_t size; - } args; - - args.name = IN((cell_t)(uintptr_t)"package-to-path"); - args.nargs = IN(3); - args.nreturns = IN(1); - - ofw_real_start(); - - args.package = IN(package); - args.buf = IN(ofw_real_map(buf, len)); - args.len = IN(len); - argsptr = ofw_real_map(&args, sizeof(args)); - if (args.buf == 0 || - openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_unmap(OUT(args.buf), buf, len); - - ofw_real_stop(); - return ((ssize_t)(int32_t)OUT(args.size)); -} - -/* Call the method in the scope of a given instance. */ -static int -ofw_real_call_method(ofw_t ofw, ihandle_t instance, const char *method, - int nargs, int nreturns, cell_t *args_and_returns) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t method; - cell_t instance; - cell_t args_n_results[12]; - } args; - cell_t *ap, *cp; - int n; - - args.name = IN((cell_t)(uintptr_t)"call-method"); - args.nargs = IN(2); - args.nreturns = IN(1); - - if (nargs > 6) - return (-1); - - ofw_real_start(); - args.nargs = IN(nargs + 2); - args.nreturns = IN(nreturns + 1); - args.method = IN(ofw_real_map(method, strlen(method) + 1)); - args.instance = IN(instance); - - ap = args_and_returns; - for (cp = args.args_n_results + (n = nargs); --n >= 0;) - *--cp = IN(*(ap++)); - argsptr = ofw_real_map(&args, sizeof(args)); - if (args.method == 0 || - openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_stop(); - if (OUT(args.args_n_results[nargs])) - return (OUT(args.args_n_results[nargs])); - for (cp = args.args_n_results + nargs + (n = OUT(args.nreturns)); --n > 0;) - *(ap++) = OUT(*--cp); - return (0); -} - -static int -ofw_real_interpret(ofw_t ofw, const char *cmd, int nreturns, cell_t *returns) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t slot[16]; - } args; - cell_t status; - int i = 0, j = 0; - - args.name = IN((cell_t)(uintptr_t)"interpret"); - args.nargs = IN(1); - - ofw_real_start(); - args.nreturns = IN(++nreturns); - args.slot[i++] = IN(ofw_real_map(cmd, strlen(cmd) + 1)); - argsptr = ofw_real_map(&args, sizeof(args)); - if (openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_stop(); - status = OUT(args.slot[i++]); - while (i < 1 + nreturns) - returns[j++] = OUT(args.slot[i++]); - return (status); -} - -/* - * Device I/O functions - */ - -/* Open an instance for a device. */ -static ihandle_t -ofw_real_open(ofw_t ofw, const char *device) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t device; - cell_t instance; - } args; - - args.name = IN((cell_t)(uintptr_t)"open"); - args.nargs = IN(1); - args.nreturns = IN(1); - - ofw_real_start(); - - args.device = IN(ofw_real_map(device, strlen(device) + 1)); - argsptr = ofw_real_map(&args, sizeof(args)); - if (args.device == 0 || openfirmware((void *)argsptr) == -1 - || args.instance == 0) { - ofw_real_stop(); - return (-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_stop(); - return (OUT(args.instance)); -} - -/* Close an instance. */ -static void -ofw_real_close(ofw_t ofw, ihandle_t instance) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t instance; - } args; - - args.name = IN((cell_t)(uintptr_t)"close"); - args.nargs = IN(1); - args.nreturns = IN(0); - args.instance = IN(instance); - ofw_real_start(); - argsptr = ofw_real_map(&args, sizeof(args)); - openfirmware((void *)argsptr); - ofw_real_stop(); -} - -/* Read from an instance. */ -static ssize_t -ofw_real_read(ofw_t ofw, ihandle_t instance, void *addr, size_t len) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t instance; - cell_t addr; - cell_t len; - int32_t actual; - } args; - - args.name = IN((cell_t)(uintptr_t)"read"); - args.nargs = IN(3); - args.nreturns = IN(1); - - ofw_real_start(); - - args.instance = IN(instance); - args.addr = IN(ofw_real_map(addr, len)); - args.len = IN(len); - argsptr = ofw_real_map(&args, sizeof(args)); - if (args.addr == 0 || openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_unmap(OUT(args.addr), addr, len); - - ofw_real_stop(); - return ((ssize_t)(int32_t)OUT(args.actual)); -} - -/* Write to an instance. */ -static ssize_t -ofw_real_write(ofw_t ofw, ihandle_t instance, const void *addr, size_t len) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t instance; - cell_t addr; - cell_t len; - int32_t actual; - } args; - - args.name = IN((cell_t)(uintptr_t)"write"); - args.nargs = IN(3); - args.nreturns = IN(1); - - ofw_real_start(); - - args.instance = IN(instance); - args.addr = IN(ofw_real_map(addr, len)); - args.len = IN(len); - argsptr = ofw_real_map(&args, sizeof(args)); - if (args.addr == 0 || openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_stop(); - return ((ssize_t)(int32_t)OUT(args.actual)); -} - -/* Seek to a position. */ -static int -ofw_real_seek(ofw_t ofw, ihandle_t instance, u_int64_t pos) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t instance; - cell_t poshi; - cell_t poslo; - cell_t status; - } args; - - args.name = IN((cell_t)(uintptr_t)"seek"); - args.nargs = IN(3); - args.nreturns = IN(1); - - args.instance = IN(instance); - args.poshi = IN(pos >> 32); - args.poslo = IN(pos); - ofw_real_start(); - argsptr = ofw_real_map(&args, sizeof(args)); - if (openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return (-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_stop(); - return (OUT(args.status)); -} - -/* - * Memory functions - */ - -/* Claim an area of memory. */ -static caddr_t -ofw_real_claim(ofw_t ofw, void *virt, size_t size, u_int align) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t virt; - cell_t size; - cell_t align; - cell_t baseaddr; - } args; - - args.name = IN((cell_t)(uintptr_t)"claim"); - args.nargs = IN(3); - args.nreturns = IN(1); - - args.virt = IN((cell_t)(uintptr_t)virt); - args.size = IN(size); - args.align = IN(align); - ofw_real_start(); - argsptr = ofw_real_map(&args, sizeof(args)); - if (openfirmware((void *)argsptr) == -1) { - ofw_real_stop(); - return ((void *)-1); - } - ofw_real_unmap(argsptr, &args, sizeof(args)); - ofw_real_stop(); - return ((void *)(uintptr_t)(OUT(args.baseaddr))); -} - -/* Release an area of memory. */ -static void -ofw_real_release(ofw_t ofw, void *virt, size_t size) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - cell_t virt; - cell_t size; - } args; - - args.name = IN((cell_t)(uintptr_t)"release"); - args.nargs = IN(2); - args.nreturns = IN(0); - - args.virt = IN((cell_t)(uintptr_t)virt); - args.size = IN(size); - ofw_real_start(); - argsptr = ofw_real_map(&args, sizeof(args)); - openfirmware((void *)argsptr); - ofw_real_stop(); -} - -/* - * Control transfer functions - */ - -/* Suspend and drop back to the Open Firmware interface. */ -static void -ofw_real_enter(ofw_t ofw) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - } args; - - args.name = IN((cell_t)(uintptr_t)"enter"); - args.nargs = IN(0); - args.nreturns = IN(0); - - ofw_real_start(); - argsptr = ofw_real_map(&args, sizeof(args)); - openfirmware((void *)argsptr); - /* We may come back. */ - ofw_real_stop(); -} - -/* Shut down and drop back to the Open Firmware interface. */ -static void -ofw_real_exit(ofw_t ofw) -{ - vm_offset_t argsptr; - struct { - cell_t name; - cell_t nargs; - cell_t nreturns; - } args; - - args.name = IN((cell_t)(uintptr_t)"exit"); - args.nargs = IN(0); - args.nreturns = IN(0); - - ofw_real_start(); - argsptr = ofw_real_map(&args, sizeof(args)); - openfirmware((void *)argsptr); - for (;;) /* just in case */ - ; - ofw_real_stop(); -} diff --git a/sys/powerpc/ofw/ofw_syscons.c b/sys/powerpc/ofw/ofw_syscons.c deleted file mode 100644 index ae8730e819e..00000000000 --- a/sys/powerpc/ofw/ofw_syscons.c +++ /dev/null @@ -1,1083 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003 Peter Grehan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include -#include - -#include -#include -#include -#include - -static int ofwfb_ignore_mmap_checks = 1; -static int ofwfb_reset_on_switch = 1; -static SYSCTL_NODE(_hw, OID_AUTO, ofwfb, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, - "ofwfb"); -SYSCTL_INT(_hw_ofwfb, OID_AUTO, relax_mmap, CTLFLAG_RW, - &ofwfb_ignore_mmap_checks, 0, "relaxed mmap bounds checking"); -SYSCTL_INT(_hw_ofwfb, OID_AUTO, reset_on_mode_switch, CTLFLAG_RW, - &ofwfb_reset_on_switch, 0, "reset the framebuffer driver on mode switch"); - -extern u_char dflt_font_16[]; -extern u_char dflt_font_14[]; -extern u_char dflt_font_8[]; - -static int ofwfb_configure(int flags); - -static vi_probe_t ofwfb_probe; -static vi_init_t ofwfb_init; -static vi_get_info_t ofwfb_get_info; -static vi_query_mode_t ofwfb_query_mode; -static vi_set_mode_t ofwfb_set_mode; -static vi_save_font_t ofwfb_save_font; -static vi_load_font_t ofwfb_load_font; -static vi_show_font_t ofwfb_show_font; -static vi_save_palette_t ofwfb_save_palette; -static vi_load_palette_t ofwfb_load_palette; -static vi_set_border_t ofwfb_set_border; -static vi_save_state_t ofwfb_save_state; -static vi_load_state_t ofwfb_load_state; -static vi_set_win_org_t ofwfb_set_win_org; -static vi_read_hw_cursor_t ofwfb_read_hw_cursor; -static vi_set_hw_cursor_t ofwfb_set_hw_cursor; -static vi_set_hw_cursor_shape_t ofwfb_set_hw_cursor_shape; -static vi_blank_display_t ofwfb_blank_display; -static vi_mmap_t ofwfb_mmap; -static vi_ioctl_t ofwfb_ioctl; -static vi_clear_t ofwfb_clear; -static vi_fill_rect_t ofwfb_fill_rect; -static vi_bitblt_t ofwfb_bitblt; -static vi_diag_t ofwfb_diag; -static vi_save_cursor_palette_t ofwfb_save_cursor_palette; -static vi_load_cursor_palette_t ofwfb_load_cursor_palette; -static vi_copy_t ofwfb_copy; -static vi_putp_t ofwfb_putp; -static vi_putc_t ofwfb_putc; -static vi_puts_t ofwfb_puts; -static vi_putm_t ofwfb_putm; - -static video_switch_t ofwfbvidsw = { - .probe = ofwfb_probe, - .init = ofwfb_init, - .get_info = ofwfb_get_info, - .query_mode = ofwfb_query_mode, - .set_mode = ofwfb_set_mode, - .save_font = ofwfb_save_font, - .load_font = ofwfb_load_font, - .show_font = ofwfb_show_font, - .save_palette = ofwfb_save_palette, - .load_palette = ofwfb_load_palette, - .set_border = ofwfb_set_border, - .save_state = ofwfb_save_state, - .load_state = ofwfb_load_state, - .set_win_org = ofwfb_set_win_org, - .read_hw_cursor = ofwfb_read_hw_cursor, - .set_hw_cursor = ofwfb_set_hw_cursor, - .set_hw_cursor_shape = ofwfb_set_hw_cursor_shape, - .blank_display = ofwfb_blank_display, - .mmap = ofwfb_mmap, - .ioctl = ofwfb_ioctl, - .clear = ofwfb_clear, - .fill_rect = ofwfb_fill_rect, - .bitblt = ofwfb_bitblt, - .diag = ofwfb_diag, - .save_cursor_palette = ofwfb_save_cursor_palette, - .load_cursor_palette = ofwfb_load_cursor_palette, - .copy = ofwfb_copy, - .putp = ofwfb_putp, - .putc = ofwfb_putc, - .puts = ofwfb_puts, - .putm = ofwfb_putm, -}; - -/* - * bitmap depth-specific routines - */ -static vi_blank_display_t ofwfb_blank_display8; -static vi_putc_t ofwfb_putc8; -static vi_putm_t ofwfb_putm8; -static vi_set_border_t ofwfb_set_border8; - -static vi_blank_display_t ofwfb_blank_display32; -static vi_putc_t ofwfb_putc32; -static vi_putm_t ofwfb_putm32; -static vi_set_border_t ofwfb_set_border32; - -VIDEO_DRIVER(ofwfb, ofwfbvidsw, ofwfb_configure); - -extern sc_rndr_sw_t txtrndrsw; -RENDERER(ofwfb, 0, txtrndrsw, gfb_set); - -RENDERER_MODULE(ofwfb, gfb_set); - -/* - * Define the iso6429-1983 colormap - */ -static struct { - uint8_t red; - uint8_t green; - uint8_t blue; -} ofwfb_cmap[16] = { /* # R G B Color */ - /* - - - - ----- */ - { 0x00, 0x00, 0x00 }, /* 0 0 0 0 Black */ - { 0x00, 0x00, 0xaa }, /* 1 0 0 2/3 Blue */ - { 0x00, 0xaa, 0x00 }, /* 2 0 2/3 0 Green */ - { 0x00, 0xaa, 0xaa }, /* 3 0 2/3 2/3 Cyan */ - { 0xaa, 0x00, 0x00 }, /* 4 2/3 0 0 Red */ - { 0xaa, 0x00, 0xaa }, /* 5 2/3 0 2/3 Magenta */ - { 0xaa, 0x55, 0x00 }, /* 6 2/3 1/3 0 Brown */ - { 0xaa, 0xaa, 0xaa }, /* 7 2/3 2/3 2/3 White */ - { 0x55, 0x55, 0x55 }, /* 8 1/3 1/3 1/3 Gray */ - { 0x55, 0x55, 0xff }, /* 9 1/3 1/3 1 Bright Blue */ - { 0x55, 0xff, 0x55 }, /* 10 1/3 1 1/3 Bright Green */ - { 0x55, 0xff, 0xff }, /* 11 1/3 1 1 Bright Cyan */ - { 0xff, 0x55, 0x55 }, /* 12 1 1/3 1/3 Bright Red */ - { 0xff, 0x55, 0xff }, /* 13 1 1/3 1 Bright Magenta */ - { 0xff, 0xff, 0x80 }, /* 14 1 1 1/3 Bright Yellow */ - { 0xff, 0xff, 0xff } /* 15 1 1 1 Bright White */ -}; - -#define TODO printf("%s: unimplemented\n", __func__) - -static u_int16_t ofwfb_static_window[ROW*COL]; - -static struct ofwfb_softc ofwfb_softc; - -static __inline int -ofwfb_background(uint8_t attr) -{ - return (attr >> 4); -} - -static __inline int -ofwfb_foreground(uint8_t attr) -{ - return (attr & 0x0f); -} - -static u_int -ofwfb_pix32(struct ofwfb_softc *sc, int attr) -{ - u_int retval; - - if (sc->sc_tag == &bs_le_tag) - retval = (ofwfb_cmap[attr].red << 16) | - (ofwfb_cmap[attr].green << 8) | - ofwfb_cmap[attr].blue; - else - retval = (ofwfb_cmap[attr].blue << 16) | - (ofwfb_cmap[attr].green << 8) | - ofwfb_cmap[attr].red; - - return (retval); -} - -static int -ofwfb_configure(int flags) -{ - struct ofwfb_softc *sc; - phandle_t chosen; - ihandle_t stdout; - phandle_t node; - uint32_t fb_phys; - int depth; - int disable; - int len; - int i; - char type[16]; - static int done = 0; - - disable = 0; - TUNABLE_INT_FETCH("hw.syscons.disable", &disable); - if (disable != 0) - return (0); - - if (done != 0) - return (0); - done = 1; - - sc = &ofwfb_softc; - - chosen = OF_finddevice("/chosen"); - OF_getprop(chosen, "stdout", &stdout, sizeof(stdout)); - node = OF_instance_to_package(stdout); - if (node == -1) { - /* - * The "/chosen/stdout" does not exist try - * using "screen" directly. - */ - node = OF_finddevice("screen"); - } - OF_getprop(node, "device_type", type, sizeof(type)); - if (strcmp(type, "display") != 0) - return (0); - - /* Only support 8 and 32-bit framebuffers */ - OF_getprop(node, "depth", &depth, sizeof(depth)); - if (depth == 8) { - sc->sc_blank = ofwfb_blank_display8; - sc->sc_putc = ofwfb_putc8; - sc->sc_putm = ofwfb_putm8; - sc->sc_set_border = ofwfb_set_border8; - } else if (depth == 32) { - sc->sc_blank = ofwfb_blank_display32; - sc->sc_putc = ofwfb_putc32; - sc->sc_putm = ofwfb_putm32; - sc->sc_set_border = ofwfb_set_border32; - } else - return (0); - - if (OF_getproplen(node, "height") != sizeof(sc->sc_height) || - OF_getproplen(node, "width") != sizeof(sc->sc_width) || - OF_getproplen(node, "linebytes") != sizeof(sc->sc_stride)) - return (0); - - sc->sc_depth = depth; - sc->sc_node = node; - sc->sc_console = 1; - OF_getprop(node, "height", &sc->sc_height, sizeof(sc->sc_height)); - OF_getprop(node, "width", &sc->sc_width, sizeof(sc->sc_width)); - OF_getprop(node, "linebytes", &sc->sc_stride, sizeof(sc->sc_stride)); - - /* - * Get the PCI addresses of the adapter. The node may be the - * child of the PCI device: in that case, try the parent for - * the assigned-addresses property. - */ - len = OF_getprop(node, "assigned-addresses", sc->sc_pciaddrs, - sizeof(sc->sc_pciaddrs)); - if (len == -1) { - len = OF_getprop(OF_parent(node), "assigned-addresses", - sc->sc_pciaddrs, sizeof(sc->sc_pciaddrs)); - } - if (len == -1) - len = 0; - sc->sc_num_pciaddrs = len / sizeof(struct ofw_pci_register); - - /* - * Grab the physical address of the framebuffer, and then map it - * into our memory space. If the MMU is not yet up, it will be - * remapped for us when relocation turns on. - * - * XXX We assume #address-cells is 1 at this point. - */ - if (OF_getproplen(node, "address") == sizeof(fb_phys)) { - OF_getprop(node, "address", &fb_phys, sizeof(fb_phys)); - sc->sc_tag = &bs_be_tag; - bus_space_map(sc->sc_tag, fb_phys, sc->sc_height * - sc->sc_stride, BUS_SPACE_MAP_PREFETCHABLE, &sc->sc_addr); - } else { - /* - * Some IBM systems don't have an address property. Try to - * guess the framebuffer region from the assigned addresses. - * This is ugly, but there doesn't seem to be an alternative. - * Linux does the same thing. - */ - - fb_phys = sc->sc_num_pciaddrs; - for (i = 0; i < sc->sc_num_pciaddrs; i++) { - /* If it is too small, not the framebuffer */ - if (sc->sc_pciaddrs[i].size_lo < - sc->sc_stride*sc->sc_height) - continue; - /* If it is not memory, it isn't either */ - if (!(sc->sc_pciaddrs[i].phys_hi & - OFW_PCI_PHYS_HI_SPACE_MEM32)) - continue; - - /* This could be the framebuffer */ - fb_phys = i; - - /* If it is prefetchable, it certainly is */ - if (sc->sc_pciaddrs[i].phys_hi & - OFW_PCI_PHYS_HI_PREFETCHABLE) - break; - } - if (fb_phys == sc->sc_num_pciaddrs) - return (0); - - OF_decode_addr(node, fb_phys, &sc->sc_tag, &sc->sc_addr, NULL); - } - - ofwfb_init(0, &sc->sc_va, 0); - - return (0); -} - -static int -ofwfb_probe(int unit, video_adapter_t **adp, void *arg, int flags) -{ - TODO; - return (0); -} - -static int -ofwfb_init(int unit, video_adapter_t *adp, int flags) -{ - struct ofwfb_softc *sc; - video_info_t *vi; - int cborder; - int font_height; - - sc = (struct ofwfb_softc *)adp; - vi = &adp->va_info; - - vid_init_struct(adp, "ofwfb", -1, unit); - - /* The default font size can be overridden by loader */ - font_height = 16; - TUNABLE_INT_FETCH("hw.syscons.fsize", &font_height); - if (font_height == 8) { - sc->sc_font = dflt_font_8; - sc->sc_font_height = 8; - } else if (font_height == 14) { - sc->sc_font = dflt_font_14; - sc->sc_font_height = 14; - } else { - /* default is 8x16 */ - sc->sc_font = dflt_font_16; - sc->sc_font_height = 16; - } - - /* The user can set a border in chars - default is 1 char width */ - cborder = 1; - TUNABLE_INT_FETCH("hw.syscons.border", &cborder); - - vi->vi_cheight = sc->sc_font_height; - vi->vi_width = sc->sc_width/8 - 2*cborder; - vi->vi_height = sc->sc_height/sc->sc_font_height - 2*cborder; - vi->vi_cwidth = 8; - - /* - * Clamp width/height to syscons maximums - */ - if (vi->vi_width > COL) - vi->vi_width = COL; - if (vi->vi_height > ROW) - vi->vi_height = ROW; - - sc->sc_xmargin = (sc->sc_width - (vi->vi_width * vi->vi_cwidth)) / 2; - sc->sc_ymargin = (sc->sc_height - (vi->vi_height * vi->vi_cheight))/2; - - /* - * Avoid huge amounts of conditional code in syscons by - * defining a dummy h/w text display buffer. - */ - adp->va_window = (vm_offset_t) ofwfb_static_window; - - /* - * Enable future font-loading and flag color support, as well as - * adding V_ADP_MODECHANGE so that we ofwfb_set_mode() gets called - * when the X server shuts down. This enables us to get the console - * back when X disappears. - */ - adp->va_flags |= V_ADP_FONT | V_ADP_COLOR | V_ADP_MODECHANGE; - - ofwfb_set_mode(&sc->sc_va, 0); - - vid_register(&sc->sc_va); - - return (0); -} - -static int -ofwfb_get_info(video_adapter_t *adp, int mode, video_info_t *info) -{ - bcopy(&adp->va_info, info, sizeof(*info)); - return (0); -} - -static int -ofwfb_query_mode(video_adapter_t *adp, video_info_t *info) -{ - TODO; - return (0); -} - -static int -ofwfb_set_mode(video_adapter_t *adp, int mode) -{ - struct ofwfb_softc *sc; - char name[64]; - ihandle_t ih; - int i, retval; - - sc = (struct ofwfb_softc *)adp; - - if (ofwfb_reset_on_switch) { - /* - * Open the display device, which will initialize it. - */ - - memset(name, 0, sizeof(name)); - OF_package_to_path(sc->sc_node, name, sizeof(name)); - ih = OF_open(name); - - if (sc->sc_depth == 8) { - /* - * Install the ISO6429 colormap - older OFW systems - * don't do this by default - */ - for (i = 0; i < 16; i++) { - OF_call_method("color!", ih, 4, 1, - ofwfb_cmap[i].red, - ofwfb_cmap[i].green, - ofwfb_cmap[i].blue, - i, - &retval); - } - } - } - - ofwfb_blank_display(&sc->sc_va, V_DISPLAY_ON); - - return (0); -} - -static int -ofwfb_save_font(video_adapter_t *adp, int page, int size, int width, - u_char *data, int c, int count) -{ - TODO; - return (0); -} - -static int -ofwfb_load_font(video_adapter_t *adp, int page, int size, int width, - u_char *data, int c, int count) -{ - struct ofwfb_softc *sc; - - sc = (struct ofwfb_softc *)adp; - - /* - * syscons code has already determined that current width/height - * are unchanged for this new font - */ - sc->sc_font = data; - return (0); -} - -static int -ofwfb_show_font(video_adapter_t *adp, int page) -{ - - return (0); -} - -static int -ofwfb_save_palette(video_adapter_t *adp, u_char *palette) -{ - /* TODO; */ - return (0); -} - -static int -ofwfb_load_palette(video_adapter_t *adp, u_char *palette) -{ - /* TODO; */ - return (0); -} - -static int -ofwfb_set_border8(video_adapter_t *adp, int border) -{ - struct ofwfb_softc *sc; - int i, j; - uint8_t *addr; - uint8_t bground; - - sc = (struct ofwfb_softc *)adp; - - bground = ofwfb_background(border); - - /* Set top margin */ - addr = (uint8_t *) sc->sc_addr; - for (i = 0; i < sc->sc_ymargin; i++) { - for (j = 0; j < sc->sc_width; j++) { - *(addr + j) = bground; - } - addr += sc->sc_stride; - } - - /* bottom margin */ - addr = (uint8_t *) sc->sc_addr + (sc->sc_height - sc->sc_ymargin)*sc->sc_stride; - for (i = 0; i < sc->sc_ymargin; i++) { - for (j = 0; j < sc->sc_width; j++) { - *(addr + j) = bground; - } - addr += sc->sc_stride; - } - - /* remaining left and right borders */ - addr = (uint8_t *) sc->sc_addr + sc->sc_ymargin*sc->sc_stride; - for (i = 0; i < sc->sc_height - 2*sc->sc_xmargin; i++) { - for (j = 0; j < sc->sc_xmargin; j++) { - *(addr + j) = bground; - *(addr + j + sc->sc_width - sc->sc_xmargin) = bground; - } - addr += sc->sc_stride; - } - - return (0); -} - -static int -ofwfb_set_border32(video_adapter_t *adp, int border) -{ - /* XXX Be lazy for now and blank entire screen */ - return (ofwfb_blank_display32(adp, border)); -} - -static int -ofwfb_set_border(video_adapter_t *adp, int border) -{ - struct ofwfb_softc *sc; - - sc = (struct ofwfb_softc *)adp; - - return ((*sc->sc_set_border)(adp, border)); -} - -static int -ofwfb_save_state(video_adapter_t *adp, void *p, size_t size) -{ - TODO; - return (0); -} - -static int -ofwfb_load_state(video_adapter_t *adp, void *p) -{ - TODO; - return (0); -} - -static int -ofwfb_set_win_org(video_adapter_t *adp, off_t offset) -{ - TODO; - return (0); -} - -static int -ofwfb_read_hw_cursor(video_adapter_t *adp, int *col, int *row) -{ - *col = 0; - *row = 0; - - return (0); -} - -static int -ofwfb_set_hw_cursor(video_adapter_t *adp, int col, int row) -{ - - return (0); -} - -static int -ofwfb_set_hw_cursor_shape(video_adapter_t *adp, int base, int height, - int celsize, int blink) -{ - return (0); -} - -static int -ofwfb_blank_display8(video_adapter_t *adp, int mode) -{ - struct ofwfb_softc *sc; - int i; - uint32_t *addr; - uint32_t color; - uint32_t end; - - sc = (struct ofwfb_softc *)adp; - addr = (uint32_t *) sc->sc_addr; - end = (sc->sc_stride/4) * sc->sc_height; - - /* Splat 4 pixels at once. */ - color = (ofwfb_background(SC_NORM_ATTR) << 24) | - (ofwfb_background(SC_NORM_ATTR) << 16) | - (ofwfb_background(SC_NORM_ATTR) << 8) | - (ofwfb_background(SC_NORM_ATTR)); - - for (i = 0; i < end; i++) - *(addr + i) = color; - - return (0); -} - -static int -ofwfb_blank_display32(video_adapter_t *adp, int mode) -{ - struct ofwfb_softc *sc; - int i; - uint32_t *addr, blank; - - sc = (struct ofwfb_softc *)adp; - addr = (uint32_t *) sc->sc_addr; - blank = ofwfb_pix32(sc, ofwfb_background(SC_NORM_ATTR)); - - for (i = 0; i < (sc->sc_stride/4)*sc->sc_height; i++) - *(addr + i) = blank; - - return (0); -} - -static int -ofwfb_blank_display(video_adapter_t *adp, int mode) -{ - struct ofwfb_softc *sc; - - sc = (struct ofwfb_softc *)adp; - - return ((*sc->sc_blank)(adp, mode)); -} - -static int -ofwfb_mmap(video_adapter_t *adp, vm_ooffset_t offset, vm_paddr_t *paddr, - int prot, vm_memattr_t *memattr) -{ - struct ofwfb_softc *sc; - int i; - - sc = (struct ofwfb_softc *)adp; - - /* - * Make sure the requested address lies within the PCI device's - * assigned addrs - */ - for (i = 0; i < sc->sc_num_pciaddrs; i++) - if (offset >= sc->sc_pciaddrs[i].phys_lo && - offset < (sc->sc_pciaddrs[i].phys_lo + sc->sc_pciaddrs[i].size_lo)) - { - /* - * If this is a prefetchable BAR, we can (and should) - * enable write-combining. - */ - if (sc->sc_pciaddrs[i].phys_hi & - OFW_PCI_PHYS_HI_PREFETCHABLE) - *memattr = VM_MEMATTR_WRITE_COMBINING; - - *paddr = offset; - return (0); - } - - /* - * Hack for Radeon... - */ - if (ofwfb_ignore_mmap_checks) { - *paddr = offset; - return (0); - } - - /* - * This might be a legacy VGA mem request: if so, just point it at the - * framebuffer, since it shouldn't be touched - */ - if (offset < sc->sc_stride*sc->sc_height) { - *paddr = sc->sc_addr + offset; - return (0); - } - - /* - * Error if we didn't have a better idea. - */ - if (sc->sc_num_pciaddrs == 0) - return (ENOMEM); - - return (EINVAL); -} - -static int -ofwfb_ioctl(video_adapter_t *adp, u_long cmd, caddr_t data) -{ - - return (0); -} - -static int -ofwfb_clear(video_adapter_t *adp) -{ - TODO; - return (0); -} - -static int -ofwfb_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) -{ - TODO; - return (0); -} - -static int -ofwfb_bitblt(video_adapter_t *adp, ...) -{ - TODO; - return (0); -} - -static int -ofwfb_diag(video_adapter_t *adp, int level) -{ - TODO; - return (0); -} - -static int -ofwfb_save_cursor_palette(video_adapter_t *adp, u_char *palette) -{ - TODO; - return (0); -} - -static int -ofwfb_load_cursor_palette(video_adapter_t *adp, u_char *palette) -{ - TODO; - return (0); -} - -static int -ofwfb_copy(video_adapter_t *adp, vm_offset_t src, vm_offset_t dst, int n) -{ - TODO; - return (0); -} - -static int -ofwfb_putp(video_adapter_t *adp, vm_offset_t off, uint32_t p, uint32_t a, - int size, int bpp, int bit_ltor, int byte_ltor) -{ - TODO; - return (0); -} - -static int -ofwfb_putc8(video_adapter_t *adp, vm_offset_t off, uint8_t c, uint8_t a) -{ - struct ofwfb_softc *sc; - int row; - int col; - int i; - uint32_t *addr; - u_char *p, fg, bg; - union { - uint32_t l; - uint8_t c[4]; - } ch1, ch2; - - sc = (struct ofwfb_softc *)adp; - row = (off / adp->va_info.vi_width) * adp->va_info.vi_cheight; - col = (off % adp->va_info.vi_width) * adp->va_info.vi_cwidth; - p = sc->sc_font + c*sc->sc_font_height; - addr = (u_int32_t *)((uintptr_t)sc->sc_addr - + (row + sc->sc_ymargin)*sc->sc_stride - + col + sc->sc_xmargin); - - fg = ofwfb_foreground(a); - bg = ofwfb_background(a); - - for (i = 0; i < sc->sc_font_height; i++) { - u_char fline = p[i]; - - /* - * Assume that there is more background than foreground - * in characters and init accordingly - */ - ch1.l = ch2.l = (bg << 24) | (bg << 16) | (bg << 8) | bg; - - /* - * Calculate 2 x 4-chars at a time, and then - * write these out. - */ - if (fline & 0x80) ch1.c[0] = fg; - if (fline & 0x40) ch1.c[1] = fg; - if (fline & 0x20) ch1.c[2] = fg; - if (fline & 0x10) ch1.c[3] = fg; - - if (fline & 0x08) ch2.c[0] = fg; - if (fline & 0x04) ch2.c[1] = fg; - if (fline & 0x02) ch2.c[2] = fg; - if (fline & 0x01) ch2.c[3] = fg; - - addr[0] = ch1.l; - addr[1] = ch2.l; - addr += (sc->sc_stride / sizeof(u_int32_t)); - } - - return (0); -} - -static int -ofwfb_putc32(video_adapter_t *adp, vm_offset_t off, uint8_t c, uint8_t a) -{ - struct ofwfb_softc *sc; - int row; - int col; - int i, j, k; - uint32_t *addr, fg, bg; - u_char *p; - - sc = (struct ofwfb_softc *)adp; - row = (off / adp->va_info.vi_width) * adp->va_info.vi_cheight; - col = (off % adp->va_info.vi_width) * adp->va_info.vi_cwidth; - p = sc->sc_font + c*sc->sc_font_height; - addr = (uint32_t *)sc->sc_addr - + (row + sc->sc_ymargin)*(sc->sc_stride/4) - + col + sc->sc_xmargin; - - fg = ofwfb_pix32(sc, ofwfb_foreground(a)); - bg = ofwfb_pix32(sc, ofwfb_background(a)); - - for (i = 0; i < sc->sc_font_height; i++) { - for (j = 0, k = 7; j < 8; j++, k--) { - if ((p[i] & (1 << k)) == 0) - *(addr + j) = bg; - else - *(addr + j) = fg; - } - addr += (sc->sc_stride/4); - } - - return (0); -} - -static int -ofwfb_putc(video_adapter_t *adp, vm_offset_t off, uint8_t c, uint8_t a) -{ - struct ofwfb_softc *sc; - - sc = (struct ofwfb_softc *)adp; - - return ((*sc->sc_putc)(adp, off, c, a)); -} - -static int -ofwfb_puts(video_adapter_t *adp, vm_offset_t off, u_int16_t *s, int len) -{ - int i; - - for (i = 0; i < len; i++) { - ofwfb_putc(adp, off + i, s[i] & 0xff, (s[i] & 0xff00) >> 8); - } - return (0); -} - -static int -ofwfb_putm(video_adapter_t *adp, int x, int y, uint8_t *pixel_image, - uint32_t pixel_mask, int size, int width) -{ - struct ofwfb_softc *sc; - - sc = (struct ofwfb_softc *)adp; - - return ((*sc->sc_putm)(adp, x, y, pixel_image, pixel_mask, size, - width)); -} - -static int -ofwfb_putm8(video_adapter_t *adp, int x, int y, uint8_t *pixel_image, - uint32_t pixel_mask, int size, int width) -{ - struct ofwfb_softc *sc; - int i, j, k; - uint8_t *addr; - u_char fg, bg; - - sc = (struct ofwfb_softc *)adp; - addr = (u_int8_t *)((uintptr_t)sc->sc_addr - + (y + sc->sc_ymargin)*sc->sc_stride - + x + sc->sc_xmargin); - - fg = ofwfb_foreground(SC_NORM_ATTR); - bg = ofwfb_background(SC_NORM_ATTR); - - for (i = 0; i < size && i+y < sc->sc_height - 2*sc->sc_ymargin; i++) { - /* - * Calculate 2 x 4-chars at a time, and then - * write these out. - */ - for (j = 0, k = width; j < 8; j++, k--) { - if (x + j >= sc->sc_width - 2*sc->sc_xmargin) - continue; - - if (pixel_image[i] & (1 << k)) - addr[j] = (addr[j] == fg) ? bg : fg; - } - - addr += (sc->sc_stride / sizeof(u_int8_t)); - } - - return (0); -} - -static int -ofwfb_putm32(video_adapter_t *adp, int x, int y, uint8_t *pixel_image, - uint32_t pixel_mask, int size, int width) -{ - struct ofwfb_softc *sc; - int i, j, k; - uint32_t fg, bg; - uint32_t *addr; - - sc = (struct ofwfb_softc *)adp; - addr = (uint32_t *)sc->sc_addr - + (y + sc->sc_ymargin)*(sc->sc_stride/4) - + x + sc->sc_xmargin; - - fg = ofwfb_pix32(sc, ofwfb_foreground(SC_NORM_ATTR)); - bg = ofwfb_pix32(sc, ofwfb_background(SC_NORM_ATTR)); - - for (i = 0; i < size && i+y < sc->sc_height - 2*sc->sc_ymargin; i++) { - for (j = 0, k = width; j < 8; j++, k--) { - if (x + j >= sc->sc_width - 2*sc->sc_xmargin) - continue; - - if (pixel_image[i] & (1 << k)) - *(addr + j) = (*(addr + j) == fg) ? bg : fg; - } - addr += (sc->sc_stride/4); - } - - return (0); -} - -/* - * Define the syscons nexus device attachment - */ -static void -ofwfb_scidentify(driver_t *driver, device_t parent) -{ - device_t child; - - /* - * Add with a priority guaranteed to make it last on - * the device list - */ - child = BUS_ADD_CHILD(parent, INT_MAX, SC_DRIVER_NAME, 0); -} - -static int -ofwfb_scprobe(device_t dev) -{ - int error; - - device_set_desc(dev, "System console"); - - error = sc_probe_unit(device_get_unit(dev), - device_get_flags(dev) | SC_AUTODETECT_KBD); - if (error != 0) - return (error); - - /* This is a fake device, so make sure we added it ourselves */ - return (BUS_PROBE_NOWILDCARD); -} - -static int -ofwfb_scattach(device_t dev) -{ - return (sc_attach_unit(device_get_unit(dev), - device_get_flags(dev) | SC_AUTODETECT_KBD)); -} - -static device_method_t ofwfb_sc_methods[] = { - DEVMETHOD(device_identify, ofwfb_scidentify), - DEVMETHOD(device_probe, ofwfb_scprobe), - DEVMETHOD(device_attach, ofwfb_scattach), - { 0, 0 } -}; - -static driver_t ofwfb_sc_driver = { - SC_DRIVER_NAME, - ofwfb_sc_methods, - sizeof(sc_softc_t), -}; - -static devclass_t sc_devclass; - -DRIVER_MODULE(ofwfb, nexus, ofwfb_sc_driver, sc_devclass, 0, 0); - -/* - * Utility routines from - */ -void -ofwfb_bcopy(const void *s, void *d, size_t c) -{ - bcopy(s, d, c); -} - -void -ofwfb_bzero(void *d, size_t c) -{ - bzero(d, c); -} - -void -ofwfb_fillw(int pat, void *base, size_t cnt) -{ - u_int16_t *bptr = base; - - while (cnt--) - *bptr++ = pat; -} - -u_int16_t -ofwfb_readw(u_int16_t *addr) -{ - return (*addr); -} - -void -ofwfb_writew(u_int16_t *addr, u_int16_t val) -{ - *addr = val; -} diff --git a/sys/powerpc/ofw/ofw_syscons.h b/sys/powerpc/ofw/ofw_syscons.h deleted file mode 100644 index ada6bba90e7..00000000000 --- a/sys/powerpc/ofw/ofw_syscons.h +++ /dev/null @@ -1,63 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003 Peter Grehan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _OFW_SYSCONS_H_ -#define _OFW_SYSCONS_H_ - -struct ofwfb_softc { - video_adapter_t sc_va; - struct cdev *sc_si; - bus_space_tag_t sc_tag; - phandle_t sc_node; - int sc_console; - - intptr_t sc_addr; - int sc_depth; - int sc_height; - int sc_width; - int sc_stride; - int sc_ncol; - int sc_nrow; - - int sc_xmargin; - int sc_ymargin; - - u_char *sc_font; - int sc_font_height; - - vi_blank_display_t *sc_blank; - vi_putc_t *sc_putc; - vi_putm_t *sc_putm; - vi_set_border_t *sc_set_border; - -#define OFWSC_MAXADDR 8 - int sc_num_pciaddrs; - struct ofw_pci_register sc_pciaddrs[OFWSC_MAXADDR]; -}; - -#endif diff --git a/sys/powerpc/ofw/ofwcall32.S b/sys/powerpc/ofw/ofwcall32.S deleted file mode 100644 index 4c3dbc421fa..00000000000 --- a/sys/powerpc/ofw/ofwcall32.S +++ /dev/null @@ -1,176 +0,0 @@ -/*- - * Copyright (C) 2009-2011 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include - -#include -#include -#include -#include - -#define OFWSTKSZ 4096 /* 4K Open Firmware stack */ - -/* - * Globals - */ - .data -GLOBAL(ofmsr) - .long 0, 0, 0, 0, 0 /* msr/sprg0-3 used in Open Firmware */ -GLOBAL(rtasmsr) - .long 0 -GLOBAL(openfirmware_entry) - .long 0 /* Open Firmware entry point */ -GLOBAL(rtas_entry) - .long 0 /* RTAS entry point */ - - .align 4 -ofwstk: - .space OFWSTKSZ -rtas_regsave: - .space 4 - -/* - * Open Firmware Entry Point. May need to enter real mode. - * - * C prototype: int ofwcall(void *callbuffer); - */ - -ASENTRY(ofwcall) - mflr %r0 - stw %r0,4(%r1) - - /* Record the old MSR */ - mfmsr %r6 - - /* GOT pointer in r7 */ - bl 1f -1: - mflr %r7 - addis %r7,%r7,(_GLOBAL_OFFSET_TABLE_-1b)@ha - addi %r7,%r7,(_GLOBAL_OFFSET_TABLE_-1b)@l - - /* read client interface handler */ - lwz %r4,openfirmware_entry@got(%r7) - lwz %r4,0(%r4) - - /* - * Set the MSR to the OF value. This has the side effect of disabling - * exceptions, which prevents preemption later. - */ - - lwz %r5,ofmsr@got(%r7) - lwz %r5,0(%r5) - mtmsr %r5 - isync - - /* - * Set up OF stack. This needs to be potentially accessible in real mode - * The pointer to the current kernel stack is placed at the very - * top of the stack along with the old MSR so we can get them back - * later. - */ - mr %r5,%r1 - lwz %r1,ofwstk@got(%r7) - addi %r1,%r1,(OFWSTKSZ-32) - stw %r5,20(%r1) /* Save real stack pointer */ - stw %r2,24(%r1) /* Save curthread */ - stw %r6,28(%r1) /* Save old MSR */ - li %r5,0 - stw %r5,4(%r1) - stw %r5,0(%r1) - - /* Finally, branch to OF */ - mtctr %r4 - bctrl - - /* Reload stack pointer and MSR from the OFW stack */ - lwz %r6,28(%r1) - lwz %r2,24(%r1) - lwz %r1,20(%r1) - - /* Now set the real MSR */ - mtmsr %r6 - isync - - /* Return */ - lwz %r0,4(%r1) - mtlr %r0 - blr -ASEND(ofwcall) - -/* - * RTAS Entry Point. Similar to the OF one, but simpler (no separate stack) - * - * C prototype: int rtascall(void *callbuffer, void *rtas_privdat); - */ - -ASENTRY(rtascall) - mflr %r0 - stw %r0,4(%r1) - - /* GOT pointer in r7 */ - bl 1f -1: - mflr %r7 - addis %r7,%r7,(_GLOBAL_OFFSET_TABLE_-1b)@ha - addi %r7,%r7,(_GLOBAL_OFFSET_TABLE_-1b)@l - - /* Record the old MSR to real-mode-accessible area */ - mfmsr %r0 - lwz %r5,rtas_regsave@got(%r7) - stw %r0,0(%r5) - - /* read client interface handler */ - lwz %r5,rtas_entry@got(%r7) - lwz %r5,0(%r5) - - /* Set the MSR to the RTAS value */ - lwz %r6,rtasmsr@got(%r7) - lwz %r6,0(%r6) - mtmsr %r6 - isync - - /* Branch to RTAS */ - mtctr %r5 - bctrl - - /* GOT pointer in r7 */ - bl 1f -1: - mflr %r7 - addis %r7,%r7,(_GLOBAL_OFFSET_TABLE_-1b)@ha - addi %r7,%r7,(_GLOBAL_OFFSET_TABLE_-1b)@l - - /* Now set the MSR back */ - lwz %r6,rtas_regsave@got(%r7) - lwz %r6,0(%r6) - mtmsr %r6 - isync - - /* And return */ - lwz %r0,4(%r1) - mtlr %r0 - blr -ASEND(rtascall) diff --git a/sys/powerpc/ofw/ofwcall64.S b/sys/powerpc/ofw/ofwcall64.S deleted file mode 100644 index ba621e7f1f8..00000000000 --- a/sys/powerpc/ofw/ofwcall64.S +++ /dev/null @@ -1,382 +0,0 @@ -/*- - * Copyright (C) 2009-2011 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include - -#include -#include -#include -#include - -#include "opt_platform.h" - -#define OFWSTKSZ 4096 /* 4K Open Firmware stack */ - -/* - * Globals - */ - .data - .align 4 -ofwstk: - .space OFWSTKSZ -rtas_regsave: - .space 32 /* 4 * sizeof(register_t) */ -GLOBAL(ofmsr) - .llong 0, 0, 0, 0, 0 /* msr/sprg0-3 used in Open Firmware */ -GLOBAL(rtasmsr) - .llong 0 -GLOBAL(openfirmware_entry) - .llong 0 /* Open Firmware entry point */ -GLOBAL(rtas_entry) - .llong 0 /* RTAS entry point */ - -TOC_ENTRY(ofmsr) -TOC_ENTRY(ofwstk) -TOC_ENTRY(rtasmsr) -TOC_ENTRY(openfirmware_entry) -TOC_ENTRY(rtas_entry) -TOC_ENTRY(rtas_regsave) - -/* - * Open Firmware Real-mode Entry Point. This is a huge pain. - */ - -ASENTRY_NOPROF(ofwcall) - mflr %r8 - std %r8,16(%r1) - stdu %r1,-208(%r1) - - /* - * We need to save the following, because OF's register save/ - * restore code assumes that the contents of registers are - * at most 32 bits wide: lr, cr, r2, r13-r31, the old MSR. These - * get placed in that order in the stack. - */ - - mfcr %r4 - std %r4,48(%r1) - std %r13,56(%r1) - std %r14,64(%r1) - std %r15,72(%r1) - std %r16,80(%r1) - std %r17,88(%r1) - std %r18,96(%r1) - std %r19,104(%r1) - std %r20,112(%r1) - std %r21,120(%r1) - std %r22,128(%r1) - std %r23,136(%r1) - std %r24,144(%r1) - std %r25,152(%r1) - std %r26,160(%r1) - std %r27,168(%r1) - std %r28,176(%r1) - std %r29,184(%r1) - std %r30,192(%r1) - std %r31,200(%r1) - - /* Record the old MSR */ - mfmsr %r6 - - /* read client interface handler */ - addis %r4,%r2,TOC_REF(openfirmware_entry)@ha - ld %r4,TOC_REF(openfirmware_entry)@l(%r4) - ld %r4,0(%r4) - - /* Get OF stack pointer */ - addis %r7,%r2,TOC_REF(ofwstk)@ha - ld %r7,TOC_REF(ofwstk)@l(%r7) - addi %r7,%r7,OFWSTKSZ-40 - - /* - * Set the MSR to the OF value. This has the side effect of disabling - * exceptions, which is important for the next few steps. - * This does NOT, however, cause us to switch endianness. - */ - - addis %r5,%r2,TOC_REF(ofmsr)@ha - ld %r5,TOC_REF(ofmsr)@l(%r5) - ld %r5,0(%r5) -#if defined(__LITTLE_ENDIAN__) && defined(QEMU) - /* QEMU hack: qemu does not emulate mtmsrd correctly! */ - ori %r5,%r5,1 /* Leave PSR_LE set */ -#endif - mtmsrd %r5 - isync - - /* - * Set up OF stack. This needs to be accessible in real mode and - * use the 32-bit ABI stack frame format. The pointer to the current - * kernel stack is placed at the very top of the stack along with - * the old MSR so we can get them back later. - */ - mr %r5,%r1 - mr %r1,%r7 - std %r5,8(%r1) /* Save real stack pointer */ - std %r2,16(%r1) /* Save old TOC */ - std %r6,24(%r1) /* Save old MSR */ - std %r8,32(%r1) /* Save high 32-bits of the kernel's PC */ - - li %r5,0 - stw %r5,4(%r1) - stw %r5,0(%r1) - -#ifdef __LITTLE_ENDIAN__ - /* Atomic context switch w/ endian change */ - mtmsrd %r5, 1 /* Clear PSL_EE|PSL_RI */ - addis %r5,%r2,TOC_REF(ofmsr)@ha - ld %r5,TOC_REF(ofmsr)@l(%r5) - ld %r5,0(%r5) - mtsrr0 %r4 - mtsrr1 %r5 - LOAD_LR_NIA -1: - mflr %r5 - addi %r5, %r5, (2f-1b) - mtlr %r5 - li %r5, 0 - rfid -2: - RETURN_TO_NATIVE_ENDIAN -#else - /* Finally, branch to OF */ - mtctr %r4 - bctrl -#endif - - /* Reload stack pointer, MSR, and reference PC from the OFW stack */ - ld %r7,32(%r1) - ld %r6,24(%r1) - ld %r2,16(%r1) - ld %r1,8(%r1) - - /* Get back to the MSR/PC we want, using the cached high bits of PC */ - mtsrr1 %r6 - clrrdi %r7,%r7,32 - bl 1f -1: mflr %r8 - or %r8,%r8,%r7 - addi %r8,%r8,2f-1b - mtsrr0 %r8 - rfid /* Turn on MMU, exceptions, and 64-bit mode */ - -2: - /* Sign-extend the return value from OF */ - extsw %r3,%r3 - - /* Restore all the non-volatile registers */ - ld %r5,48(%r1) - mtcr %r5 - ld %r13,56(%r1) - ld %r14,64(%r1) - ld %r15,72(%r1) - ld %r16,80(%r1) - ld %r17,88(%r1) - ld %r18,96(%r1) - ld %r19,104(%r1) - ld %r20,112(%r1) - ld %r21,120(%r1) - ld %r22,128(%r1) - ld %r23,136(%r1) - ld %r24,144(%r1) - ld %r25,152(%r1) - ld %r26,160(%r1) - ld %r27,168(%r1) - ld %r28,176(%r1) - ld %r29,184(%r1) - ld %r30,192(%r1) - ld %r31,200(%r1) - - /* Restore the stack and link register */ - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(ofwcall) - -/* - * RTAS 32-bit Entry Point. Similar to the OF one, but simpler (no separate - * stack) - * - * C prototype: int rtascall(void *callbuffer, void *rtas_privdat); - */ - -ASENTRY_NOPROF(rtascall) - mflr %r9 - std %r9,16(%r1) - stdu %r1,-208(%r1) - - /* - * We need to save the following, because RTAS's register save/ - * restore code assumes that the contents of registers are - * at most 32 bits wide: lr, cr, r2, r13-r31, the old MSR. These - * get placed in that order in the stack. - */ - - mfcr %r5 - std %r5,48(%r1) - std %r13,56(%r1) - std %r14,64(%r1) - std %r15,72(%r1) - std %r16,80(%r1) - std %r17,88(%r1) - std %r18,96(%r1) - std %r19,104(%r1) - std %r20,112(%r1) - std %r21,120(%r1) - std %r22,128(%r1) - std %r23,136(%r1) - std %r24,144(%r1) - std %r25,152(%r1) - std %r26,160(%r1) - std %r27,168(%r1) - std %r28,176(%r1) - std %r29,184(%r1) - std %r30,192(%r1) - std %r31,200(%r1) - - /* Record the old MSR */ - mfmsr %r6 - - /* Read RTAS entry and reg save area pointers */ - addis %r5,%r2,TOC_REF(rtas_entry)@ha - ld %r5,TOC_REF(rtas_entry)@l(%r5) - ld %r5,0(%r5) - addis %r8,%r2,TOC_REF(rtas_regsave)@ha - ld %r8,TOC_REF(rtas_regsave)@l(%r8) - - /* - * Set the MSR to the RTAS value. This has the side effect of disabling - * exceptions, which is important for the next few steps. - */ - - addis %r7,%r2,TOC_REF(rtasmsr)@ha - ld %r7,TOC_REF(rtasmsr)@l(%r7) - ld %r7,0(%r7) -#ifdef __LITTLE_ENDIAN__ - /* QEMU hack: qemu does not emulate mtmsrd correctly! */ - ori %r7,%r7,1 /* Leave PSR_LE set */ -#endif - mtmsrd %r7 - isync - - /* - * Set up RTAS register save area, so that we can get back all of - * our 64-bit pointers. Save our stack pointer, the TOC, and the MSR. - * Put this in r1, since RTAS is obliged to save it. Kernel globals - * are below 4 GB, so this is safe. - */ - mr %r7,%r1 - mr %r1,%r8 - std %r7,0(%r1) /* Save 64-bit stack pointer */ - std %r2,8(%r1) /* Save TOC */ - std %r6,16(%r1) /* Save MSR */ - std %r9,24(%r1) /* Save reference PC for high 32 bits */ - -#ifdef __LITTLE_ENDIAN__ - /* Atomic context switch w/ endian change */ - li %r7, 0 - mtmsrd %r7, 1 /* Clear PSL_EE|PSL_RI */ - addis %r7,%r2,TOC_REF(rtasmsr)@ha - ld %r7,TOC_REF(rtasmsr)@l(%r7) - ld %r7,0(%r7) - mtsrr0 %r5 - mtsrr1 %r7 - LOAD_LR_NIA -1: - mflr %r5 - addi %r5, %r5, (2f-1b) - mtlr %r5 - li %r5, 0 - rfid -2: - RETURN_TO_NATIVE_ENDIAN -#else - /* Finally, branch to RTAS */ - mtctr %r5 - bctrl -#endif - - /* - * Reload stack pointer, MSR, reg PC from the reg save area in r1. We - * are running in 32-bit mode at this point, so it doesn't matter if r1 - * has become sign-extended. - */ - ld %r7,24(%r1) - ld %r6,16(%r1) - ld %r2,8(%r1) - ld %r1,0(%r1) - - /* - * Get back to the right PC. We need to atomically re-enable - * exceptions, 64-bit mode, and the MMU. One thing that has likely - * happened is that, if we were running in the high-memory direct - * map, we no longer are as a result of LR truncation in RTAS. - * Fix this by copying the high-order bits of the LR at function - * entry onto the current PC and then jumping there while flipping - * all the MSR bits. - */ - mtsrr1 %r6 - clrrdi %r7,%r7,32 - bl 1f -1: mflr %r8 - or %r8,%r8,%r7 - addi %r8,%r8,2f-1b - mtsrr0 %r8 - rfid /* Turn on MMU, exceptions, and 64-bit mode */ - -2: - /* Sign-extend the return value from RTAS */ - extsw %r3,%r3 - - /* Restore all the non-volatile registers */ - ld %r5,48(%r1) - mtcr %r5 - ld %r13,56(%r1) - ld %r14,64(%r1) - ld %r15,72(%r1) - ld %r16,80(%r1) - ld %r17,88(%r1) - ld %r18,96(%r1) - ld %r19,104(%r1) - ld %r20,112(%r1) - ld %r21,120(%r1) - ld %r22,128(%r1) - ld %r23,136(%r1) - ld %r24,144(%r1) - ld %r25,152(%r1) - ld %r26,160(%r1) - ld %r27,168(%r1) - ld %r28,176(%r1) - ld %r29,184(%r1) - ld %r30,192(%r1) - ld %r31,200(%r1) - - /* Restore the stack and link register */ - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(rtascall) diff --git a/sys/powerpc/ofw/openpic_ofw.c b/sys/powerpc/ofw/openpic_ofw.c deleted file mode 100644 index 0dd1e00e94a..00000000000 --- a/sys/powerpc/ofw/openpic_ofw.c +++ /dev/null @@ -1,177 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2003 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include - -#include "pic_if.h" - -/* - * OFW interface - */ -static int openpic_ofw_probe(device_t); -static int openpic_ofw_attach(device_t); - -static void openpic_ofw_translate_code(device_t, u_int irq, int code, - enum intr_trigger *trig, enum intr_polarity *pol); - -static device_method_t openpic_ofw_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, openpic_ofw_probe), - DEVMETHOD(device_attach, openpic_ofw_attach), - DEVMETHOD(device_suspend, openpic_suspend), - DEVMETHOD(device_resume, openpic_resume), - - /* PIC interface */ - DEVMETHOD(pic_bind, openpic_bind), - DEVMETHOD(pic_config, openpic_config), - DEVMETHOD(pic_dispatch, openpic_dispatch), - DEVMETHOD(pic_enable, openpic_enable), - DEVMETHOD(pic_eoi, openpic_eoi), - DEVMETHOD(pic_ipi, openpic_ipi), - DEVMETHOD(pic_mask, openpic_mask), - DEVMETHOD(pic_unmask, openpic_unmask), - - DEVMETHOD(pic_translate_code, openpic_ofw_translate_code), - - DEVMETHOD_END -}; - -static driver_t openpic_ofw_driver = { - "openpic", - openpic_ofw_methods, - sizeof(struct openpic_softc), -}; - -EARLY_DRIVER_MODULE(openpic, ofwbus, openpic_ofw_driver, openpic_devclass, - 0, 0, BUS_PASS_INTERRUPT); -EARLY_DRIVER_MODULE(openpic, simplebus, openpic_ofw_driver, openpic_devclass, - 0, 0, BUS_PASS_INTERRUPT); -EARLY_DRIVER_MODULE(openpic, macio, openpic_ofw_driver, openpic_devclass, 0, 0, - BUS_PASS_INTERRUPT); - -static int -openpic_ofw_probe(device_t dev) -{ - const char *type = ofw_bus_get_type(dev); - - if (type == NULL) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "chrp,open-pic") && - strcmp(type, "open-pic") != 0) - return (ENXIO); - - /* - * On some U4 systems, there is a phantom MPIC in the mac-io cell. - * The uninorth driver will pick up the real PIC, so ignore it here. - */ - if (OF_finddevice("/u4") != (phandle_t)-1) - return (ENXIO); - - device_set_desc(dev, OPENPIC_DEVSTR); - return (0); -} - -static int -openpic_ofw_attach(device_t dev) -{ - struct openpic_softc *sc; - phandle_t xref, node; - - node = ofw_bus_get_node(dev); - sc = device_get_softc(dev); - - if (OF_getencprop(node, "phandle", &xref, sizeof(xref)) == -1 && - OF_getencprop(node, "ibm,phandle", &xref, sizeof(xref)) == -1 && - OF_getencprop(node, "linux,phandle", &xref, sizeof(xref)) == -1) - xref = node; - - if (ofw_bus_is_compatible(dev, "fsl,mpic")) { - sc->sc_quirks = OPENPIC_QUIRK_SINGLE_BIND; - sc->sc_quirks |= OPENPIC_QUIRK_HIDDEN_IRQS; - } - - return (openpic_common_attach(dev, xref)); -} - -static void -openpic_ofw_translate_code(device_t dev, u_int irq, int code, - enum intr_trigger *trig, enum intr_polarity *pol) -{ - switch (code) { - case 0: - /* L to H edge */ - *trig = INTR_TRIGGER_EDGE; - *pol = INTR_POLARITY_HIGH; - break; - case 1: - /* Active L level */ - *trig = INTR_TRIGGER_LEVEL; - *pol = INTR_POLARITY_LOW; - break; - case 2: - /* Active H level */ - *trig = INTR_TRIGGER_LEVEL; - *pol = INTR_POLARITY_HIGH; - break; - case 3: - /* H to L edge */ - *trig = INTR_TRIGGER_EDGE; - *pol = INTR_POLARITY_LOW; - break; - default: - *trig = INTR_TRIGGER_CONFORM; - *pol = INTR_POLARITY_CONFORM; - } -} diff --git a/sys/powerpc/ofw/rtas.c b/sys/powerpc/ofw/rtas.c deleted file mode 100644 index a82d42511a6..00000000000 --- a/sys/powerpc/ofw/rtas.c +++ /dev/null @@ -1,269 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include - -#include - -static MALLOC_DEFINE(M_RTAS, "rtas", "Run Time Abstraction Service"); - -static vm_offset_t rtas_bounce_phys; -static caddr_t rtas_bounce_virt; -static off_t rtas_bounce_offset; -static size_t rtas_bounce_size; -static uintptr_t rtas_private_data; -static struct mtx rtas_mtx; -static phandle_t rtas; - -/* From ofwcall.S */ -int rtascall(vm_offset_t callbuffer, uintptr_t rtas_privdat); -extern uintptr_t rtas_entry; -extern register_t rtasmsr; - -/* - * After the VM is up, allocate RTAS memory and instantiate it - */ - -static void rtas_setup(void *); - -SYSINIT(rtas_setup, SI_SUB_KMEM, SI_ORDER_ANY, rtas_setup, NULL); - -static void -rtas_setup(void *junk) -{ - ihandle_t rtasi; - cell_t rtas_size = 0, rtas_ptr; - char path[31]; - int result; - - rtas = OF_finddevice("/rtas"); - if (rtas == -1) { - rtas = 0; - return; - } - OF_package_to_path(rtas, path, sizeof(path)); - - mtx_init(&rtas_mtx, "RTAS", NULL, MTX_SPIN); - - /* RTAS must be called with everything turned off in MSR */ - rtasmsr = mfmsr(); - rtasmsr &= ~(PSL_IR | PSL_DR | PSL_EE | PSL_SE | PSL_LE); - #ifdef __powerpc64__ - rtasmsr &= ~PSL_SF; - #endif - - /* - * Allocate rtas_size + one page of contiguous, wired physical memory - * that can fit into a 32-bit address space and accessed from real mode. - * This is used both to bounce arguments and for RTAS private data. - * - * It must be 4KB-aligned and not cross a 256 MB boundary. - */ - - OF_getencprop(rtas, "rtas-size", &rtas_size, sizeof(rtas_size)); - rtas_size = round_page(rtas_size); - rtas_bounce_virt = contigmalloc(rtas_size + PAGE_SIZE, M_RTAS, 0, 0, - ulmin(platform_real_maxaddr(), BUS_SPACE_MAXADDR_32BIT), - 4096, 256*1024*1024); - - rtas_private_data = vtophys(rtas_bounce_virt); - rtas_bounce_virt += rtas_size; /* Actual bounce area */ - rtas_bounce_phys = vtophys(rtas_bounce_virt); - rtas_bounce_size = PAGE_SIZE; - - /* - * Instantiate RTAS. We always use the 32-bit version. - */ - - if (OF_hasprop(rtas, "linux,rtas-entry") && - OF_hasprop(rtas, "linux,rtas-base")) { - OF_getencprop(rtas, "linux,rtas-base", &rtas_ptr, - sizeof(rtas_ptr)); - rtas_private_data = rtas_ptr; - OF_getencprop(rtas, "linux,rtas-entry", &rtas_ptr, - sizeof(rtas_ptr)); - } else { - rtasi = OF_open(path); - if (rtasi == 0) { - rtas = 0; - printf("Error initializing RTAS: could not open " - "node\n"); - return; - } - - result = OF_call_method("instantiate-rtas", rtasi, 1, 1, - (cell_t)rtas_private_data, &rtas_ptr); - OF_close(rtasi); - - if (result != 0) { - rtas = 0; - rtas_ptr = 0; - printf("Error initializing RTAS (%d)\n", result); - return; - } - } - - rtas_entry = (uintptr_t)(rtas_ptr); -} - -static cell_t -rtas_real_map(const void *buf, size_t len) -{ - cell_t phys; - - mtx_assert(&rtas_mtx, MA_OWNED); - - /* - * Make sure the bounce page offset satisfies any reasonable - * alignment constraint. - */ - rtas_bounce_offset += sizeof(register_t) - - (rtas_bounce_offset % sizeof(register_t)); - - if (rtas_bounce_offset + len > rtas_bounce_size) { - panic("Oversize RTAS call!"); - return 0; - } - - if (buf != NULL) - memcpy(rtas_bounce_virt + rtas_bounce_offset, buf, len); - else - return (0); - - phys = rtas_bounce_phys + rtas_bounce_offset; - rtas_bounce_offset += len; - - return (phys); -} - -static void -rtas_real_unmap(cell_t physaddr, void *buf, size_t len) -{ - mtx_assert(&rtas_mtx, MA_OWNED); - - if (physaddr == 0) - return; - - memcpy(buf, rtas_bounce_virt + (physaddr - rtas_bounce_phys), len); -} - -/* Check if we have RTAS */ -int -rtas_exists(void) -{ - return (rtas != 0); -} - -/* Call an RTAS method by token */ -int -rtas_call_method(cell_t token, int nargs, int nreturns, ...) -{ - vm_offset_t argsptr; - jmp_buf env, *oldfaultbuf; - va_list ap; - struct { - cell_t token; - cell_t nargs; - cell_t nreturns; - cell_t args_n_results[12]; - } args; - int n, result; - - if (!rtas_exists() || nargs + nreturns > 12) - return (-1); - - args.token = htobe32(token); - va_start(ap, nreturns); - - mtx_lock_spin(&rtas_mtx); - rtas_bounce_offset = 0; - - args.nargs = htobe32(nargs); - args.nreturns = htobe32(nreturns); - - for (n = 0; n < nargs; n++) - args.args_n_results[n] = htobe32(va_arg(ap, cell_t)); - - argsptr = rtas_real_map(&args, sizeof(args)); - - /* Get rid of any stale machine checks that have been waiting. */ - __asm __volatile ("sync; isync"); - oldfaultbuf = curthread->td_pcb->pcb_onfault; - curthread->td_pcb->pcb_onfault = &env; - if (!setjmp(env)) { - __asm __volatile ("sync"); - result = rtascall(argsptr, rtas_private_data); - __asm __volatile ("sync; isync"); - } else { - result = RTAS_HW_ERROR; - } - curthread->td_pcb->pcb_onfault = oldfaultbuf; - __asm __volatile ("sync"); - - rtas_real_unmap(argsptr, &args, sizeof(args)); - mtx_unlock_spin(&rtas_mtx); - - if (result < 0) - return (result); - - for (n = nargs; n < nargs + nreturns; n++) - *va_arg(ap, cell_t *) = be32toh(args.args_n_results[n]); - return (result); -} - -/* Look up an RTAS token */ -cell_t -rtas_token_lookup(const char *method) -{ - cell_t token; - - if (!rtas_exists()) - return (-1); - - if (OF_getencprop(rtas, method, &token, sizeof(token)) == -1) - return (-1); - - return (token); -} diff --git a/sys/powerpc/powermac/ata_dbdma.c b/sys/powerpc/powermac/ata_dbdma.c deleted file mode 100644 index 4dac1b1196a..00000000000 --- a/sys/powerpc/powermac/ata_dbdma.c +++ /dev/null @@ -1,285 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2008 by Nathan Whitehorn. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Common routines for the DMA engine on both the Apple Kauai and MacIO - * ATA controllers. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "ata_dbdma.h" - -struct ata_dbdma_dmaload_args { - struct ata_dbdma_channel *sc; - - int write; - int nsegs; -}; - -static void -ata_dbdma_setprd(void *xarg, bus_dma_segment_t *segs, int nsegs, int error) -{ - struct ata_dbdma_dmaload_args *arg = xarg; - struct ata_dbdma_channel *sc = arg->sc; - int branch_type, command; - int prev_stop; - int i; - - mtx_lock(&sc->dbdma_mtx); - - prev_stop = sc->next_dma_slot-1; - if (prev_stop < 0) - prev_stop = 0xff; - - for (i = 0; i < nsegs; i++) { - /* Loop back to the beginning if this is our last slot */ - if (sc->next_dma_slot == 0xff) - branch_type = DBDMA_ALWAYS; - else - branch_type = DBDMA_NEVER; - - if (arg->write) { - command = (i + 1 < nsegs) ? DBDMA_OUTPUT_MORE : - DBDMA_OUTPUT_LAST; - } else { - command = (i + 1 < nsegs) ? DBDMA_INPUT_MORE : - DBDMA_INPUT_LAST; - } - - dbdma_insert_command(sc->dbdma, sc->next_dma_slot++, - command, 0, segs[i].ds_addr, segs[i].ds_len, - DBDMA_NEVER, branch_type, DBDMA_NEVER, 0); - - if (branch_type == DBDMA_ALWAYS) - sc->next_dma_slot = 0; - } - - /* We have a corner case where the STOP command is the last slot, - * but you can't branch in STOP commands. So add a NOP branch here - * and the STOP in slot 0. */ - - if (sc->next_dma_slot == 0xff) { - dbdma_insert_branch(sc->dbdma, sc->next_dma_slot, 0); - sc->next_dma_slot = 0; - } - -#if 0 - dbdma_insert_command(sc->dbdma, sc->next_dma_slot++, - DBDMA_NOP, 0, 0, 0, DBDMA_ALWAYS, DBDMA_NEVER, DBDMA_NEVER, 0); -#endif - dbdma_insert_stop(sc->dbdma, sc->next_dma_slot++); - dbdma_insert_nop(sc->dbdma, prev_stop); - - dbdma_sync_commands(sc->dbdma, BUS_DMASYNC_PREWRITE); - - mtx_unlock(&sc->dbdma_mtx); - - arg->nsegs = nsegs; -} - -static int -ata_dbdma_status(device_t dev) -{ - struct ata_dbdma_channel *sc = device_get_softc(dev); - struct ata_channel *ch = device_get_softc(dev); - - if (sc->sc_ch.dma.flags & ATA_DMA_ACTIVE) { - return (!(dbdma_get_chan_status(sc->dbdma) & - DBDMA_STATUS_ACTIVE)); - } - - if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) { - DELAY(100); - if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) - return 0; - } - return 1; -} - -static int -ata_dbdma_start(struct ata_request *request) -{ - struct ata_dbdma_channel *sc = device_get_softc(request->parent); - - sc->sc_ch.dma.flags |= ATA_DMA_ACTIVE; - dbdma_wake(sc->dbdma); - return 0; -} - -static void -ata_dbdma_reset(device_t dev) -{ - struct ata_dbdma_channel *sc = device_get_softc(dev); - - mtx_lock(&sc->dbdma_mtx); - - dbdma_stop(sc->dbdma); - dbdma_insert_stop(sc->dbdma, 0); - sc->next_dma_slot=1; - dbdma_set_current_cmd(sc->dbdma, 0); - - sc->sc_ch.dma.flags &= ~ATA_DMA_ACTIVE; - - mtx_unlock(&sc->dbdma_mtx); -} - -static int -ata_dbdma_stop(struct ata_request *request) -{ - struct ata_dbdma_channel *sc = device_get_softc(request->parent); - - uint16_t status; - - status = dbdma_get_chan_status(sc->dbdma); - - dbdma_pause(sc->dbdma); - sc->sc_ch.dma.flags &= ~ATA_DMA_ACTIVE; - - if (status & DBDMA_STATUS_DEAD) { - device_printf(request->parent,"DBDMA dead, resetting " - "channel...\n"); - ata_dbdma_reset(request->parent); - return ATA_S_ERROR; - } - - if (!(status & DBDMA_STATUS_RUN)) { - device_printf(request->parent,"DBDMA confused, stop called " - "when channel is not running!\n"); - return ATA_S_ERROR; - } - - if (status & DBDMA_STATUS_ACTIVE) { - device_printf(request->parent,"DBDMA channel stopped " - "prematurely\n"); - return ATA_S_ERROR; - } - return 0; -} - -static int -ata_dbdma_load(struct ata_request *request, void *addr, int *entries) -{ - struct ata_channel *ch = device_get_softc(request->parent); - struct ata_dbdma_dmaload_args args; - - int error; - - args.sc = device_get_softc(request->parent); - args.write = !(request->flags & ATA_R_READ); - - if (!request->bytecount) { - device_printf(request->dev, - "FAILURE - zero length DMA transfer attempted\n"); - return EIO; - } - if (((uintptr_t)(request->data) & (ch->dma.alignment - 1)) || - (request->bytecount & (ch->dma.alignment - 1))) { - device_printf(request->dev, - "FAILURE - non aligned DMA transfer attempted\n"); - return EIO; - } - if (request->bytecount > ch->dma.max_iosize) { - device_printf(request->dev, - "FAILURE - oversized DMA transfer attempt %d > %d\n", - request->bytecount, ch->dma.max_iosize); - return EIO; - } - - request->dma = &ch->dma.slot[0]; - - if ((error = bus_dmamap_load(request->dma->data_tag, - request->dma->data_map, request->data, request->bytecount, - &ata_dbdma_setprd, &args, BUS_DMA_NOWAIT))) { - device_printf(request->dev, "FAILURE - load data\n"); - goto error; - } - - if (entries) - *entries = args.nsegs; - - bus_dmamap_sync(request->dma->sg_tag, request->dma->sg_map, - BUS_DMASYNC_PREWRITE); - bus_dmamap_sync(request->dma->data_tag, request->dma->data_map, - (request->flags & ATA_R_READ) ? - BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); - - return 0; - -error: - ch->dma.unload(request); - return EIO; -} - -void -ata_dbdma_dmainit(device_t dev) -{ - struct ata_dbdma_channel *sc = device_get_softc(dev); - int error; - - error = dbdma_allocate_channel(sc->dbdma_regs, sc->dbdma_offset, - bus_get_dma_tag(dev), 256, &sc->dbdma); - - dbdma_set_wait_selector(sc->dbdma,1 << 7, 1 << 7); - - dbdma_insert_stop(sc->dbdma,0); - sc->next_dma_slot=1; - - sc->sc_ch.dma.start = ata_dbdma_start; - sc->sc_ch.dma.stop = ata_dbdma_stop; - sc->sc_ch.dma.load = ata_dbdma_load; - sc->sc_ch.dma.reset = ata_dbdma_reset; - - /* - * DBDMA's field for transfer size is 16 bits. This will overflow - * if we try to do a 64K transfer, so stop short of 64K. - */ - sc->sc_ch.dma.segsize = 126 * DEV_BSIZE; - ata_dmainit(dev); - - sc->sc_ch.hw.status = ata_dbdma_status; - - mtx_init(&sc->dbdma_mtx, "ATA DBDMA", NULL, MTX_DEF); -} diff --git a/sys/powerpc/powermac/ata_dbdma.h b/sys/powerpc/powermac/ata_dbdma.h deleted file mode 100644 index 659bb064c8c..00000000000 --- a/sys/powerpc/powermac/ata_dbdma.h +++ /dev/null @@ -1,54 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2008 by Nathan Whitehorn. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef ATA_DBDMA_H -#define ATA_DBDMA_H - -#include -#include -#include - -#include - -struct ata_dbdma_channel { - struct ata_channel sc_ch; - - int dbdma_rid; - struct resource *dbdma_regs; - u_int dbdma_offset; - - dbdma_channel_t *dbdma; - int next_dma_slot; - - struct mtx dbdma_mtx; -}; - -void ata_dbdma_dmainit(device_t dev); - -#endif /* ATA_DBDMA_H */ diff --git a/sys/powerpc/powermac/ata_kauai.c b/sys/powerpc/powermac/ata_kauai.c deleted file mode 100644 index 7e3c3002e9e..00000000000 --- a/sys/powerpc/powermac/ata_kauai.c +++ /dev/null @@ -1,370 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2004 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ -#include -/* - * Mac 'Kauai' PCI ATA controller - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include "ata_dbdma.h" - -#define ATA_KAUAI_REGOFFSET 0x2000 -#define ATA_KAUAI_DBDMAOFFSET 0x1000 - -/* - * Offset to alt-control register from base - */ -#define ATA_KAUAI_ALTOFFSET (ATA_KAUAI_REGOFFSET + 0x160) - -/* - * Define the gap between registers - */ -#define ATA_KAUAI_REGGAP 16 - -/* - * PIO and DMA access registers - */ -#define PIO_CONFIG_REG (ATA_KAUAI_REGOFFSET + 0x200) -#define UDMA_CONFIG_REG (ATA_KAUAI_REGOFFSET + 0x210) -#define DMA_IRQ_REG (ATA_KAUAI_REGOFFSET + 0x300) - -#define USE_DBDMA_IRQ 0 - -/* - * Define the kauai pci bus attachment. - */ -static int ata_kauai_probe(device_t dev); -static int ata_kauai_attach(device_t dev); -static int ata_kauai_setmode(device_t dev, int target, int mode); -static int ata_kauai_begin_transaction(struct ata_request *request); - -static device_method_t ata_kauai_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ata_kauai_probe), - DEVMETHOD(device_attach, ata_kauai_attach), - DEVMETHOD(device_detach, bus_generic_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* ATA interface */ - DEVMETHOD(ata_setmode, ata_kauai_setmode), - DEVMETHOD_END -}; - -struct ata_kauai_softc { - struct ata_dbdma_channel sc_ch; - - struct resource *sc_memr; - - int shasta; - - uint32_t udmaconf[2]; - uint32_t wdmaconf[2]; - uint32_t pioconf[2]; -}; - -static driver_t ata_kauai_driver = { - "ata", - ata_kauai_methods, - sizeof(struct ata_kauai_softc), -}; - -DRIVER_MODULE(ata, pci, ata_kauai_driver, ata_devclass, NULL, NULL); -MODULE_DEPEND(ata, ata, 1, 1, 1); - -/* - * PCI ID search table - */ -static const struct kauai_pci_dev { - u_int32_t kpd_devid; - const char *kpd_desc; -} kauai_pci_devlist[] = { - { 0x0033106b, "Uninorth2 Kauai ATA Controller" }, - { 0x003b106b, "Intrepid Kauai ATA Controller" }, - { 0x0043106b, "K2 Kauai ATA Controller" }, - { 0x0050106b, "Shasta Kauai ATA Controller" }, - { 0x0069106b, "Intrepid-2 Kauai ATA Controller" }, - { 0, NULL } -}; - -/* - * IDE transfer timings - */ -#define KAUAI_PIO_MASK 0xff000fff -#define KAUAI_DMA_MASK 0x00fff000 -#define KAUAI_UDMA_MASK 0x0000ffff - -static const u_int pio_timing_kauai[] = { - 0x08000a92, /* PIO0 */ - 0x0800060f, /* PIO1 */ - 0x0800038b, /* PIO2 */ - 0x05000249, /* PIO3 */ - 0x04000148 /* PIO4 */ -}; - -static const u_int pio_timing_shasta[] = { - 0x0a000c97, /* PIO0 */ - 0x07000712, /* PIO1 */ - 0x040003cd, /* PIO2 */ - 0x0400028b, /* PIO3 */ - 0x0400010a /* PIO4 */ -}; - -static const u_int dma_timing_kauai[] = { - 0x00618000, /* WDMA0 */ - 0x00209000, /* WDMA1 */ - 0x00148000 /* WDMA2 */ -}; - -static const u_int dma_timing_shasta[] = { - 0x00820800, /* WDMA0 */ - 0x0028b000, /* WDMA1 */ - 0x001ca000 /* WDMA2 */ -}; - -static const u_int udma_timing_kauai[] = { - 0x000070c1, /* UDMA0 */ - 0x00005d81, /* UDMA1 */ - 0x00004a61, /* UDMA2 */ - 0x00003a51, /* UDMA3 */ - 0x00002a31, /* UDMA4 */ - 0x00002921 /* UDMA5 */ -}; - -static const u_int udma_timing_shasta[] = { - 0x00035901, /* UDMA0 */ - 0x000348b1, /* UDMA1 */ - 0x00033881, /* UDMA2 */ - 0x00033861, /* UDMA3 */ - 0x00033841, /* UDMA4 */ - 0x00033031, /* UDMA5 */ - 0x00033021 /* UDMA6 */ -}; - -static int -ata_kauai_probe(device_t dev) -{ - u_int32_t devid; - phandle_t node; - int i, found; - - found = 0; - devid = pci_get_devid(dev); - for (i = 0; kauai_pci_devlist[i].kpd_desc != NULL; i++) { - if (devid == kauai_pci_devlist[i].kpd_devid) { - found = 1; - device_set_desc(dev, kauai_pci_devlist[i].kpd_desc); - } - } - - if (!found) - return (ENXIO); - - node = ofw_bus_get_node(dev); - return (ata_probe(dev)); -} - -#if USE_DBDMA_IRQ -static int -ata_kauai_dma_interrupt(struct ata_kauai_softc *sc) -{ - /* Clear the DMA interrupt bits */ - - bus_write_4(sc->sc_memr, DMA_IRQ_REG, 0x80000000); - - return ata_interrupt(sc); -} -#endif - -static int -ata_kauai_attach(device_t dev) -{ - struct ata_kauai_softc *sc = device_get_softc(dev); - struct ata_channel *ch; - const char *compatstring; - int i, rid; -#if USE_DBDMA_IRQ - int dbdma_irq_rid = 1; - struct resource *dbdma_irq; - void *cookie; -#endif - - compatstring = ofw_bus_get_compat(dev); - if (compatstring != NULL && strcmp(compatstring,"shasta-ata") == 0) - sc->shasta = 1; - - /* Pre-K2 controllers apparently need this hack */ - if (!sc->shasta && - (compatstring == NULL || strcmp(compatstring, "K2-UATA") != 0)) - bus_set_resource(dev, SYS_RES_IRQ, 0, 39, 1); - - ch = &sc->sc_ch.sc_ch; - - rid = PCIR_BARS; - sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (sc->sc_memr == NULL) { - device_printf(dev, "could not allocate memory\n"); - return (ENXIO); - } - - /* - * Set up the resource vectors - */ - for (i = ATA_DATA; i <= ATA_COMMAND; i++) { - ch->r_io[i].res = sc->sc_memr; - ch->r_io[i].offset = i*ATA_KAUAI_REGGAP + ATA_KAUAI_REGOFFSET; - } - ch->r_io[ATA_CONTROL].res = sc->sc_memr; - ch->r_io[ATA_CONTROL].offset = ATA_KAUAI_ALTOFFSET; - ata_default_registers(dev); - - ch->unit = 0; - ch->flags |= ATA_USE_16BIT; - - /* XXX: ATAPI DMA is unreliable. We should find out why. */ - ch->flags |= ATA_NO_ATAPI_DMA; - ata_generic_hw(dev); - - pci_enable_busmaster(dev); - - /* Init DMA engine */ - - sc->sc_ch.dbdma_rid = 1; - sc->sc_ch.dbdma_regs = sc->sc_memr; - sc->sc_ch.dbdma_offset = ATA_KAUAI_DBDMAOFFSET; - - ata_dbdma_dmainit(dev); - -#if USE_DBDMA_IRQ - /* Bind to DBDMA interrupt as well */ - if ((dbdma_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, - &dbdma_irq_rid, RF_SHAREABLE | RF_ACTIVE)) != NULL) { - bus_setup_intr(dev, dbdma_irq, ATA_INTR_FLAGS, NULL, - (driver_intr_t *)ata_kauai_dma_interrupt, sc,&cookie); - } -#endif - - /* Set up initial mode */ - sc->pioconf[0] = sc->pioconf[1] = - bus_read_4(sc->sc_memr, PIO_CONFIG_REG) & 0x0f000fff; - - sc->udmaconf[0] = sc->udmaconf[1] = 0; - sc->wdmaconf[0] = sc->wdmaconf[1] = 0; - - /* Magic FCR value from Apple */ - bus_write_4(sc->sc_memr, 0, 0x00000007); - - /* Set begin_transaction */ - sc->sc_ch.sc_ch.hw.begin_transaction = ata_kauai_begin_transaction; - - return ata_attach(dev); -} - -static int -ata_kauai_setmode(device_t dev, int target, int mode) -{ - struct ata_kauai_softc *sc = device_get_softc(dev); - - mode = min(mode,sc->shasta ? ATA_UDMA6 : ATA_UDMA5); - - if (sc->shasta) { - switch (mode & ATA_DMA_MASK) { - case ATA_UDMA0: - sc->udmaconf[target] - = udma_timing_shasta[mode & ATA_MODE_MASK]; - break; - case ATA_WDMA0: - sc->udmaconf[target] = 0; - sc->wdmaconf[target] - = dma_timing_shasta[mode & ATA_MODE_MASK]; - break; - default: - sc->pioconf[target] - = pio_timing_shasta[(mode & ATA_MODE_MASK) - - ATA_PIO0]; - break; - } - } else { - switch (mode & ATA_DMA_MASK) { - case ATA_UDMA0: - sc->udmaconf[target] - = udma_timing_kauai[mode & ATA_MODE_MASK]; - break; - case ATA_WDMA0: - sc->udmaconf[target] = 0; - sc->wdmaconf[target] - = dma_timing_kauai[mode & ATA_MODE_MASK]; - break; - default: - sc->pioconf[target] - = pio_timing_kauai[(mode & ATA_MODE_MASK) - - ATA_PIO0]; - break; - } - } - - return (mode); -} - -static int -ata_kauai_begin_transaction(struct ata_request *request) -{ - struct ata_kauai_softc *sc = device_get_softc(request->parent); - - bus_write_4(sc->sc_memr, UDMA_CONFIG_REG, sc->udmaconf[request->unit]); - bus_write_4(sc->sc_memr, PIO_CONFIG_REG, - sc->wdmaconf[request->unit] | sc->pioconf[request->unit]); - - return ata_begin_transaction(request); -} diff --git a/sys/powerpc/powermac/ata_macio.c b/sys/powerpc/powermac/ata_macio.c deleted file mode 100644 index 012699bdd74..00000000000 --- a/sys/powerpc/powermac/ata_macio.c +++ /dev/null @@ -1,372 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2002 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -/* - * Mac-io ATA controller - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include "ata_dbdma.h" - -/* - * Offset to control registers from base - */ -#define ATA_MACIO_ALTOFFSET 0x160 - -/* - * Define the gap between registers - */ -#define ATA_MACIO_REGGAP 16 - -/* - * Whether or not to bind to the DBDMA IRQ - */ -#define USE_DBDMA_IRQ 0 - -/* - * Timing register - */ -#define ATA_MACIO_TIMINGREG 0x200 - -#define ATA_TIME_TO_TICK(rev,time) howmany(time, (rev == 4) ? 15 : 30) -#define PIO_REC_OFFSET 4 -#define PIO_REC_MIN 1 -#define PIO_ACT_MIN 1 -#define DMA_REC_OFFSET 1 -#define DMA_REC_MIN 1 -#define DMA_ACT_MIN 1 - -struct ide_timings { - int cycle; /* minimum cycle time [ns] */ - int active; /* minimum command active time [ns] */ -}; - -static const struct ide_timings pio_timings[5] = { - { 600, 180 }, /* PIO 0 */ - { 390, 150 }, /* PIO 1 */ - { 240, 105 }, /* PIO 2 */ - { 180, 90 }, /* PIO 3 */ - { 120, 75 } /* PIO 4 */ -}; - -static const struct ide_timings dma_timings[3] = { - { 480, 240 }, /* WDMA 0 */ - { 165, 90 }, /* WDMA 1 */ - { 120, 75 } /* WDMA 2 */ -}; - -static const struct ide_timings udma_timings[5] = { - { 120, 180 }, /* UDMA 0 */ - { 90, 150 }, /* UDMA 1 */ - { 60, 120 }, /* UDMA 2 */ - { 45, 90 }, /* UDMA 3 */ - { 30, 90 } /* UDMA 4 */ -}; - -/* - * Define the macio ata bus attachment. - */ -static int ata_macio_probe(device_t dev); -static int ata_macio_setmode(device_t dev, int target, int mode); -static int ata_macio_attach(device_t dev); -static int ata_macio_begin_transaction(struct ata_request *request); -static int ata_macio_suspend(device_t dev); -static int ata_macio_resume(device_t dev); - -static device_method_t ata_macio_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ata_macio_probe), - DEVMETHOD(device_attach, ata_macio_attach), - DEVMETHOD(device_suspend, ata_macio_suspend), - DEVMETHOD(device_resume, ata_macio_resume), - - /* ATA interface */ - DEVMETHOD(ata_setmode, ata_macio_setmode), - DEVMETHOD_END -}; - -struct ata_macio_softc { - struct ata_dbdma_channel sc_ch; - - int rev; - int max_mode; - struct resource *sc_mem; - - uint32_t udmaconf[2]; - uint32_t wdmaconf[2]; - uint32_t pioconf[2]; -}; - -static driver_t ata_macio_driver = { - "ata", - ata_macio_methods, - sizeof(struct ata_macio_softc), -}; - -DRIVER_MODULE(ata, macio, ata_macio_driver, ata_devclass, NULL, NULL); -MODULE_DEPEND(ata, ata, 1, 1, 1); - -static int -ata_macio_probe(device_t dev) -{ - const char *type = ofw_bus_get_type(dev); - const char *name = ofw_bus_get_name(dev); - struct ata_macio_softc *sc; - - if (strcmp(type, "ata") != 0 && - strcmp(type, "ide") != 0) - return (ENXIO); - - sc = device_get_softc(dev); - bzero(sc, sizeof(struct ata_macio_softc)); - - if (strcmp(name,"ata-4") == 0) { - device_set_desc(dev,"Apple MacIO Ultra ATA Controller"); - sc->rev = 4; - sc->max_mode = ATA_UDMA4; - } else { - device_set_desc(dev,"Apple MacIO ATA Controller"); - sc->rev = 3; - sc->max_mode = ATA_WDMA2; - } - - return (ata_probe(dev)); -} - -static int -ata_macio_attach(device_t dev) -{ - struct ata_macio_softc *sc = device_get_softc(dev); - uint32_t timingreg; - struct ata_channel *ch; - int rid, i; - - /* - * Allocate resources - */ - - rid = 0; - ch = &sc->sc_ch.sc_ch; - sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE); - if (sc->sc_mem == NULL) { - device_printf(dev, "could not allocate memory\n"); - return (ENXIO); - } - - /* - * Set up the resource vectors - */ - for (i = ATA_DATA; i <= ATA_COMMAND; i++) { - ch->r_io[i].res = sc->sc_mem; - ch->r_io[i].offset = i * ATA_MACIO_REGGAP; - } - ch->r_io[ATA_CONTROL].res = sc->sc_mem; - ch->r_io[ATA_CONTROL].offset = ATA_MACIO_ALTOFFSET; - ata_default_registers(dev); - - ch->unit = 0; - ch->flags |= ATA_USE_16BIT | ATA_NO_ATAPI_DMA; - ata_generic_hw(dev); - -#if USE_DBDMA_IRQ - int dbdma_irq_rid = 1; - struct resource *dbdma_irq; - void *cookie; -#endif - - /* Init DMA engine */ - - sc->sc_ch.dbdma_rid = 1; - sc->sc_ch.dbdma_regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->sc_ch.dbdma_rid, RF_ACTIVE); - - ata_dbdma_dmainit(dev); - - /* Configure initial timings */ - timingreg = bus_read_4(sc->sc_mem, ATA_MACIO_TIMINGREG); - if (sc->rev == 4) { - sc->udmaconf[0] = sc->udmaconf[1] = timingreg & 0x1ff00000; - sc->wdmaconf[0] = sc->wdmaconf[1] = timingreg & 0x001ffc00; - sc->pioconf[0] = sc->pioconf[1] = timingreg & 0x000003ff; - } else { - sc->udmaconf[0] = sc->udmaconf[1] = 0; - sc->wdmaconf[0] = sc->wdmaconf[1] = timingreg & 0xfffff800; - sc->pioconf[0] = sc->pioconf[1] = timingreg & 0x000007ff; - } - -#if USE_DBDMA_IRQ - /* Bind to DBDMA interrupt as well */ - - if ((dbdma_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, - &dbdma_irq_rid, RF_SHAREABLE | RF_ACTIVE)) != NULL) { - bus_setup_intr(dev, dbdma_irq, ATA_INTR_FLAGS, NULL, - (driver_intr_t *)ata_interrupt, sc,&cookie); - } -#endif - - /* Set begin_transaction */ - sc->sc_ch.sc_ch.hw.begin_transaction = ata_macio_begin_transaction; - - return ata_attach(dev); -} - -static int -ata_macio_setmode(device_t dev, int target, int mode) -{ - struct ata_macio_softc *sc = device_get_softc(dev); - - int min_cycle = 0, min_active = 0; - int cycle_tick = 0, act_tick = 0, inact_tick = 0, half_tick; - - mode = min(mode, sc->max_mode); - - if ((mode & ATA_DMA_MASK) == ATA_UDMA0) { - min_cycle = udma_timings[mode & ATA_MODE_MASK].cycle; - min_active = udma_timings[mode & ATA_MODE_MASK].active; - - cycle_tick = ATA_TIME_TO_TICK(sc->rev,min_cycle); - act_tick = ATA_TIME_TO_TICK(sc->rev,min_active); - - /* mask: 0x1ff00000 */ - sc->udmaconf[target] = - (cycle_tick << 21) | (act_tick << 25) | 0x100000; - } else if ((mode & ATA_DMA_MASK) == ATA_WDMA0) { - min_cycle = dma_timings[mode & ATA_MODE_MASK].cycle; - min_active = dma_timings[mode & ATA_MODE_MASK].active; - - cycle_tick = ATA_TIME_TO_TICK(sc->rev,min_cycle); - act_tick = ATA_TIME_TO_TICK(sc->rev,min_active); - - if (sc->rev == 4) { - inact_tick = cycle_tick - act_tick; - /* mask: 0x001ffc00 */ - sc->wdmaconf[target] = - (act_tick << 10) | (inact_tick << 15); - } else { - inact_tick = cycle_tick - act_tick - DMA_REC_OFFSET; - if (inact_tick < DMA_REC_MIN) - inact_tick = DMA_REC_MIN; - half_tick = 0; /* XXX */ - - /* mask: 0xfffff800 */ - sc->wdmaconf[target] = (half_tick << 21) - | (inact_tick << 16) | (act_tick << 11); - } - } else { - min_cycle = - pio_timings[(mode & ATA_MODE_MASK) - ATA_PIO0].cycle; - min_active = - pio_timings[(mode & ATA_MODE_MASK) - ATA_PIO0].active; - - cycle_tick = ATA_TIME_TO_TICK(sc->rev,min_cycle); - act_tick = ATA_TIME_TO_TICK(sc->rev,min_active); - - if (sc->rev == 4) { - inact_tick = cycle_tick - act_tick; - - /* mask: 0x000003ff */ - sc->pioconf[target] = - (inact_tick << 5) | act_tick; - } else { - if (act_tick < PIO_ACT_MIN) - act_tick = PIO_ACT_MIN; - - inact_tick = cycle_tick - act_tick - PIO_REC_OFFSET; - if (inact_tick < PIO_REC_MIN) - inact_tick = PIO_REC_MIN; - - /* mask: 0x000007ff */ - sc->pioconf[target] = - (inact_tick << 5) | act_tick; - } - } - - return (mode); -} - -static int -ata_macio_begin_transaction(struct ata_request *request) -{ - struct ata_macio_softc *sc = device_get_softc(request->parent); - - bus_write_4(sc->sc_mem, ATA_MACIO_TIMINGREG, - sc->udmaconf[request->unit] | sc->wdmaconf[request->unit] - | sc->pioconf[request->unit]); - - return ata_begin_transaction(request); -} - -static int -ata_macio_suspend(device_t dev) -{ - struct ata_dbdma_channel *ch = device_get_softc(dev); - int error; - - if (!ch->sc_ch.attached) - return (0); - - error = ata_suspend(dev); - dbdma_save_state(ch->dbdma); - - return (error); -} - -static int -ata_macio_resume(device_t dev) -{ - struct ata_dbdma_channel *ch = device_get_softc(dev); - int error; - - if (!ch->sc_ch.attached) - return (0); - - dbdma_restore_state(ch->dbdma); - error = ata_resume(dev); - - return (error); -} diff --git a/sys/powerpc/powermac/atibl.c b/sys/powerpc/powermac/atibl.c deleted file mode 100644 index d0792693228..00000000000 --- a/sys/powerpc/powermac/atibl.c +++ /dev/null @@ -1,321 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#ifndef PCI_VENDOR_ID_ATI -#define PCI_VENDOR_ID_ATI 0x1002 -#endif - -/* From the xf86-video-ati driver's radeon_reg.h */ -#define RADEON_LVDS_GEN_CNTL 0x02d0 -#define RADEON_LVDS_ON (1 << 0) -#define RADEON_LVDS_DISPLAY_DIS (1 << 1) -#define RADEON_LVDS_PANEL_TYPE (1 << 2) -#define RADEON_LVDS_PANEL_FORMAT (1 << 3) -#define RADEON_LVDS_RST_FM (1 << 6) -#define RADEON_LVDS_EN (1 << 7) -#define RADEON_LVDS_BL_MOD_LEVEL_SHIFT 8 -#define RADEON_LVDS_BL_MOD_LEVEL_MASK (0xff << 8) -#define RADEON_LVDS_BL_MOD_EN (1 << 16) -#define RADEON_LVDS_DIGON (1 << 18) -#define RADEON_LVDS_BLON (1 << 19) -#define RADEON_LVDS_PLL_CNTL 0x02d4 -#define RADEON_LVDS_PLL_EN (1 << 16) -#define RADEON_LVDS_PLL_RESET (1 << 17) -#define RADEON_PIXCLKS_CNTL 0x002d -#define RADEON_PIXCLK_LVDS_ALWAYS_ONb (1 << 14) -#define RADEON_DISP_PWR_MAN 0x0d08 -#define RADEON_AUTO_PWRUP_EN (1 << 26) -#define RADEON_CLOCK_CNTL_DATA 0x000c -#define RADEON_CLOCK_CNTL_INDEX 0x0008 -#define RADEON_PLL_WR_EN (1 << 7) -#define RADEON_CRTC_GEN_CNTL 0x0050 - -struct atibl_softc { - struct resource *sc_memr; - int sc_level; -}; - -static void atibl_identify(driver_t *driver, device_t parent); -static int atibl_probe(device_t dev); -static int atibl_attach(device_t dev); -static int atibl_setlevel(struct atibl_softc *sc, int newlevel); -static int atibl_getlevel(struct atibl_softc *sc); -static int atibl_resume(device_t dev); -static int atibl_suspend(device_t dev); -static int atibl_sysctl(SYSCTL_HANDLER_ARGS); - -static device_method_t atibl_methods[] = { - /* Device interface */ - DEVMETHOD(device_identify, atibl_identify), - DEVMETHOD(device_probe, atibl_probe), - DEVMETHOD(device_attach, atibl_attach), - DEVMETHOD(device_suspend, atibl_suspend), - DEVMETHOD(device_resume, atibl_resume), - {0, 0}, -}; - -static driver_t atibl_driver = { - "backlight", - atibl_methods, - sizeof(struct atibl_softc) -}; - -static devclass_t atibl_devclass; - -DRIVER_MODULE(atibl, vgapci, atibl_driver, atibl_devclass, 0, 0); - -static void -atibl_identify(driver_t *driver, device_t parent) -{ - if (OF_finddevice("mac-io/backlight") == -1) - return; - if (device_find_child(parent, "backlight", -1) == NULL) - device_add_child(parent, "backlight", -1); -} - -static int -atibl_probe(device_t dev) -{ - char control[8]; - phandle_t handle; - - handle = OF_finddevice("mac-io/backlight"); - - if (handle == -1) - return (ENXIO); - - if (OF_getprop(handle, "backlight-control", &control, sizeof(control)) < 0) - return (ENXIO); - - if (strcmp(control, "ati") != 0 && - (strcmp(control, "mnca") != 0 || - pci_get_vendor(device_get_parent(dev)) != 0x1002)) - return (ENXIO); - - device_set_desc(dev, "PowerBook backlight for ATI graphics"); - - return (0); -} - -static int -atibl_attach(device_t dev) -{ - struct atibl_softc *sc; - struct sysctl_ctx_list *ctx; - struct sysctl_oid *tree; - int rid; - - sc = device_get_softc(dev); - - rid = 0x18; /* BAR[2], for the MMIO register */ - sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE | RF_SHAREABLE); - if (sc->sc_memr == NULL) { - device_printf(dev, "Could not alloc mem resource!\n"); - return (ENXIO); - } - - ctx = device_get_sysctl_ctx(dev); - tree = device_get_sysctl_tree(dev); - - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "level", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, - atibl_sysctl, "I", "Backlight level (0-100)"); - - return (0); -} - -static uint32_t __inline -atibl_pll_rreg(struct atibl_softc *sc, uint32_t reg) -{ - uint32_t data, save, tmp; - - bus_write_1(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, (reg & 0x3f)); - (void)bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA); - (void)bus_read_4(sc->sc_memr, RADEON_CRTC_GEN_CNTL); - - data = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA); - - /* Only necessary on R300, but won't hurt others. */ - save = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX); - tmp = save & (~0x3f | RADEON_PLL_WR_EN); - bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, tmp); - tmp = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA); - bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, save); - - return data; -} - -static void __inline -atibl_pll_wreg(struct atibl_softc *sc, uint32_t reg, uint32_t val) -{ - uint32_t save, tmp; - - bus_write_1(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, - ((reg & 0x3f) | RADEON_PLL_WR_EN)); - (void)bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA); - (void)bus_read_4(sc->sc_memr, RADEON_CRTC_GEN_CNTL); - - bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA, val); - DELAY(5000); - - /* Only necessary on R300, but won't hurt others. */ - save = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX); - tmp = save & (~0x3f | RADEON_PLL_WR_EN); - bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, tmp); - tmp = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA); - bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, save); -} - -static int -atibl_setlevel(struct atibl_softc *sc, int newlevel) -{ - uint32_t lvds_gen_cntl; - uint32_t lvds_pll_cntl; - uint32_t pixclks_cntl; - uint32_t disp_pwr_reg; - - if (newlevel > 100) - newlevel = 100; - - if (newlevel < 0) - newlevel = 0; - - lvds_gen_cntl = bus_read_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL); - - if (newlevel > 0) { - newlevel = (newlevel * 5) / 2 + 5; - disp_pwr_reg = bus_read_4(sc->sc_memr, RADEON_DISP_PWR_MAN); - disp_pwr_reg |= RADEON_AUTO_PWRUP_EN; - bus_write_4(sc->sc_memr, RADEON_DISP_PWR_MAN, disp_pwr_reg); - lvds_pll_cntl = bus_read_4(sc->sc_memr, RADEON_LVDS_PLL_CNTL); - lvds_pll_cntl |= RADEON_LVDS_PLL_EN; - bus_write_4(sc->sc_memr, RADEON_LVDS_PLL_CNTL, lvds_pll_cntl); - lvds_pll_cntl &= ~RADEON_LVDS_PLL_RESET; - bus_write_4(sc->sc_memr, RADEON_LVDS_PLL_CNTL, lvds_pll_cntl); - DELAY(1000); - - lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS | - RADEON_LVDS_BL_MOD_LEVEL_MASK); - lvds_gen_cntl |= RADEON_LVDS_ON | RADEON_LVDS_EN | - RADEON_LVDS_DIGON | RADEON_LVDS_BLON; - lvds_gen_cntl |= (newlevel << RADEON_LVDS_BL_MOD_LEVEL_SHIFT) & - RADEON_LVDS_BL_MOD_LEVEL_MASK; - lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN; - DELAY(200000); - bus_write_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); - } else { - pixclks_cntl = atibl_pll_rreg(sc, RADEON_PIXCLKS_CNTL); - atibl_pll_wreg(sc, RADEON_PIXCLKS_CNTL, - pixclks_cntl & ~RADEON_PIXCLK_LVDS_ALWAYS_ONb); - lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS; - lvds_gen_cntl &= ~(RADEON_LVDS_BL_MOD_EN | RADEON_LVDS_BL_MOD_LEVEL_MASK); - bus_write_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); - lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_EN); - DELAY(200000); - bus_write_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); - - atibl_pll_wreg(sc, RADEON_PIXCLKS_CNTL, pixclks_cntl); - DELAY(200000); - } - - return (0); -} - -static int -atibl_getlevel(struct atibl_softc *sc) -{ - uint32_t lvds_gen_cntl; - int level; - - lvds_gen_cntl = bus_read_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL); - - level = ((lvds_gen_cntl & RADEON_LVDS_BL_MOD_LEVEL_MASK) >> - RADEON_LVDS_BL_MOD_LEVEL_SHIFT); - if (level != 0) - level = ((level - 5) * 2) / 5; - - return (level); -} - -static int -atibl_suspend(device_t dev) -{ - struct atibl_softc *sc; - - sc = device_get_softc(dev); - - sc->sc_level = atibl_getlevel(sc); - atibl_setlevel(sc, 0); - - return (0); -} - -static int -atibl_resume(device_t dev) -{ - struct atibl_softc *sc; - - sc = device_get_softc(dev); - - atibl_setlevel(sc, sc->sc_level); - - return (0); -} - -static int -atibl_sysctl(SYSCTL_HANDLER_ARGS) -{ - struct atibl_softc *sc; - int newlevel, error; - - sc = arg1; - - newlevel = atibl_getlevel(sc); - - error = sysctl_handle_int(oidp, &newlevel, 0, req); - - if (error || !req->newptr) - return (error); - - return (atibl_setlevel(sc, newlevel)); -} diff --git a/sys/powerpc/powermac/cpcht.c b/sys/powerpc/powermac/cpcht.c deleted file mode 100644 index c3c7a3a3bbd..00000000000 --- a/sys/powerpc/powermac/cpcht.c +++ /dev/null @@ -1,742 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2008-2010 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include "pcib_if.h" -#include -#include "pic_if.h" - -/* - * IBM CPC9X5 Hypertransport Device interface. - */ -static int cpcht_probe(device_t); -static int cpcht_attach(device_t); - -static void cpcht_configure_htbridge(device_t, phandle_t); - -/* - * pcib interface. - */ -static u_int32_t cpcht_read_config(device_t, u_int, u_int, u_int, - u_int, int); -static void cpcht_write_config(device_t, u_int, u_int, u_int, - u_int, u_int32_t, int); -static int cpcht_route_interrupt(device_t, device_t, int); -static int cpcht_alloc_msi(device_t dev, device_t child, - int count, int maxcount, int *irqs); -static int cpcht_release_msi(device_t dev, device_t child, - int count, int *irqs); -static int cpcht_alloc_msix(device_t dev, device_t child, - int *irq); -static int cpcht_release_msix(device_t dev, device_t child, - int irq); -static int cpcht_map_msi(device_t dev, device_t child, - int irq, uint64_t *addr, uint32_t *data); - -/* - * Driver methods. - */ -static device_method_t cpcht_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, cpcht_probe), - DEVMETHOD(device_attach, cpcht_attach), - - /* pcib interface */ - DEVMETHOD(pcib_read_config, cpcht_read_config), - DEVMETHOD(pcib_write_config, cpcht_write_config), - DEVMETHOD(pcib_route_interrupt, cpcht_route_interrupt), - DEVMETHOD(pcib_alloc_msi, cpcht_alloc_msi), - DEVMETHOD(pcib_release_msi, cpcht_release_msi), - DEVMETHOD(pcib_alloc_msix, cpcht_alloc_msix), - DEVMETHOD(pcib_release_msix, cpcht_release_msix), - DEVMETHOD(pcib_map_msi, cpcht_map_msi), - DEVMETHOD(pcib_request_feature, pcib_request_feature_allow), - - DEVMETHOD_END -}; - -struct cpcht_irq { - enum { - IRQ_NONE, IRQ_HT, IRQ_MSI, IRQ_INTERNAL - } irq_type; - - int ht_source; - - vm_offset_t ht_base; - vm_offset_t apple_eoi; - uint32_t eoi_data; - int edge; -}; - -static struct cpcht_irq *cpcht_irqmap = NULL; -uint32_t cpcht_msipic = 0; - -struct cpcht_softc { - struct ofw_pci_softc pci_sc; - vm_offset_t sc_data; - uint64_t sc_populated_slots; - - struct cpcht_irq htirq_map[128]; - struct mtx htirq_mtx; -}; - -static devclass_t cpcht_devclass; -DEFINE_CLASS_1(pcib, cpcht_driver, cpcht_methods, sizeof(struct cpcht_softc), - ofw_pci_driver); -EARLY_DRIVER_MODULE(cpcht, ofwbus, cpcht_driver, cpcht_devclass, 0, 0, - BUS_PASS_BUS); - -#define CPCHT_IOPORT_BASE 0xf4000000UL /* Hardwired */ -#define CPCHT_IOPORT_SIZE 0x00400000UL - -#define HTAPIC_REQUEST_EOI 0x20 -#define HTAPIC_TRIGGER_LEVEL 0x02 -#define HTAPIC_MASK 0x01 - -static int -cpcht_probe(device_t dev) -{ - const char *type, *compatible; - - type = ofw_bus_get_type(dev); - compatible = ofw_bus_get_compat(dev); - - if (type == NULL || compatible == NULL) - return (ENXIO); - - if (strcmp(type, "ht") != 0) - return (ENXIO); - - if (strcmp(compatible, "u3-ht") != 0) - return (ENXIO); - - device_set_desc(dev, "IBM CPC9X5 HyperTransport Tunnel"); - return (0); -} - -static int -cpcht_attach(device_t dev) -{ - struct cpcht_softc *sc; - phandle_t node, child; - u_int32_t reg[3]; - int i; - - node = ofw_bus_get_node(dev); - sc = device_get_softc(dev); - - if (OF_getencprop(node, "reg", reg, sizeof(reg)) < 12) - return (ENXIO); - - if (OF_getproplen(node, "ranges") <= 0) - sc->pci_sc.sc_quirks = OFW_PCI_QUIRK_RANGES_ON_CHILDREN; - sc->sc_populated_slots = 0; - sc->sc_data = (vm_offset_t)pmap_mapdev(reg[1], reg[2]); - - /* - * Set up the resource manager and the HT->MPIC mapping. For cpcht, - * the ranges are properties of the child bridges, and this is also - * where we get the HT interrupts properties. - */ - -#if 0 - /* I/O port mappings are usually not in the device tree */ - rman_manage_region(&sc->pci_sc.sc_io_rman, 0, CPCHT_IOPORT_SIZE - 1); -#endif - - bzero(sc->htirq_map, sizeof(sc->htirq_map)); - mtx_init(&sc->htirq_mtx, "cpcht irq", NULL, MTX_DEF); - for (i = 0; i < 8; i++) - sc->htirq_map[i].irq_type = IRQ_INTERNAL; - for (child = OF_child(node); child != 0; child = OF_peer(child)) - cpcht_configure_htbridge(dev, child); - - /* Now make the mapping table available to the MPIC */ - cpcht_irqmap = sc->htirq_map; - - return (ofw_pci_attach(dev)); -} - -static void -cpcht_configure_htbridge(device_t dev, phandle_t child) -{ - struct cpcht_softc *sc; - struct ofw_pci_register pcir; - int ptr, nextptr; - uint32_t vend, val; - int i, nirq, irq; - u_int b, f, s; - - sc = device_get_softc(dev); - if (OF_getencprop(child, "reg", (pcell_t *)&pcir, sizeof(pcir)) == -1) - return; - - b = OFW_PCI_PHYS_HI_BUS(pcir.phys_hi); - s = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi); - f = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi); - - /* - * Mark this slot is populated. The remote south bridge does - * not like us talking to unpopulated slots on the root bus. - */ - sc->sc_populated_slots |= (1 << s); - - /* - * Next build up any HT->MPIC mappings for this sub-bus. One would - * naively hope that enabling, disabling, and EOIing interrupts would - * cause the appropriate HT bus transactions to that effect. This is - * not the case. - * - * Instead, we have to muck about on the HT peer's root PCI bridges, - * figure out what interrupts they send, enable them, and cache - * the location of their WaitForEOI registers so that we can - * send EOIs later. - */ - - /* All the devices we are interested in have caps */ - if (!(PCIB_READ_CONFIG(dev, b, s, f, PCIR_STATUS, 2) - & PCIM_STATUS_CAPPRESENT)) - return; - - nextptr = PCIB_READ_CONFIG(dev, b, s, f, PCIR_CAP_PTR, 1); - while (nextptr != 0) { - ptr = nextptr; - nextptr = PCIB_READ_CONFIG(dev, b, s, f, - ptr + PCICAP_NEXTPTR, 1); - - /* Find the HT IRQ capabilities */ - if (PCIB_READ_CONFIG(dev, b, s, f, - ptr + PCICAP_ID, 1) != PCIY_HT) - continue; - - val = PCIB_READ_CONFIG(dev, b, s, f, ptr + PCIR_HT_COMMAND, 2); - if ((val & PCIM_HTCMD_CAP_MASK) != PCIM_HTCAP_INTERRUPT) - continue; - - /* Ask for the IRQ count */ - PCIB_WRITE_CONFIG(dev, b, s, f, ptr + PCIR_HT_COMMAND, 0x1, 1); - nirq = PCIB_READ_CONFIG(dev, b, s, f, ptr + 4, 4); - nirq = ((nirq >> 16) & 0xff) + 1; - - device_printf(dev, "%d HT IRQs on device %d.%d\n", nirq, s, f); - - for (i = 0; i < nirq; i++) { - PCIB_WRITE_CONFIG(dev, b, s, f, - ptr + PCIR_HT_COMMAND, 0x10 + (i << 1), 1); - irq = PCIB_READ_CONFIG(dev, b, s, f, ptr + 4, 4); - - /* - * Mask this interrupt for now. - */ - PCIB_WRITE_CONFIG(dev, b, s, f, ptr + 4, - irq | HTAPIC_MASK, 4); - irq = (irq >> 16) & 0xff; - - sc->htirq_map[irq].irq_type = IRQ_HT; - sc->htirq_map[irq].ht_source = i; - sc->htirq_map[irq].ht_base = sc->sc_data + - (((((s & 0x1f) << 3) | (f & 0x07)) << 8) | (ptr)); - - PCIB_WRITE_CONFIG(dev, b, s, f, - ptr + PCIR_HT_COMMAND, 0x11 + (i << 1), 1); - sc->htirq_map[irq].eoi_data = - PCIB_READ_CONFIG(dev, b, s, f, ptr + 4, 4) | - 0x80000000; - - /* - * Apple uses a non-compliant IO/APIC that differs - * in how we signal EOIs. Check if this device was - * made by Apple, and act accordingly. - */ - vend = PCIB_READ_CONFIG(dev, b, s, f, - PCIR_DEVVENDOR, 4); - if ((vend & 0xffff) == 0x106b) - sc->htirq_map[irq].apple_eoi = - (sc->htirq_map[irq].ht_base - ptr) + 0x60; - } - } -} - -static u_int32_t -cpcht_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, - int width) -{ - struct cpcht_softc *sc; - vm_offset_t caoff; - - sc = device_get_softc(dev); - caoff = sc->sc_data + - (((((slot & 0x1f) << 3) | (func & 0x07)) << 8) | reg); - - if (bus == 0 && (!(sc->sc_populated_slots & (1 << slot)) || func > 0)) - return (0xffffffff); - - if (bus > 0) - caoff += 0x01000000UL + (bus << 16); - - switch (width) { - case 1: - return (in8rb(caoff)); - break; - case 2: - return (in16rb(caoff)); - break; - case 4: - return (in32rb(caoff)); - break; - } - - return (0xffffffff); -} - -static void -cpcht_write_config(device_t dev, u_int bus, u_int slot, u_int func, - u_int reg, u_int32_t val, int width) -{ - struct cpcht_softc *sc; - vm_offset_t caoff; - - sc = device_get_softc(dev); - caoff = sc->sc_data + - (((((slot & 0x1f) << 3) | (func & 0x07)) << 8) | reg); - - if (bus == 0 && (!(sc->sc_populated_slots & (1 << slot)) || func > 0)) - return; - - if (bus > 0) - caoff += 0x01000000UL + (bus << 16); - - switch (width) { - case 1: - out8rb(caoff, val); - break; - case 2: - out16rb(caoff, val); - break; - case 4: - out32rb(caoff, val); - break; - } -} - -static int -cpcht_route_interrupt(device_t bus, device_t dev, int pin) -{ - return (pin); -} - -static int -cpcht_alloc_msi(device_t dev, device_t child, int count, int maxcount, - int *irqs) -{ - struct cpcht_softc *sc; - int i, j; - - sc = device_get_softc(dev); - j = 0; - - /* Bail if no MSI PIC yet */ - if (cpcht_msipic == 0) - return (ENXIO); - - mtx_lock(&sc->htirq_mtx); - for (i = 8; i < 124 - count; i++) { - for (j = 0; j < count; j++) { - if (sc->htirq_map[i+j].irq_type != IRQ_NONE) - break; - } - if (j == count) - break; - - i += j; /* We know there isn't a large enough run */ - } - - if (j != count) { - mtx_unlock(&sc->htirq_mtx); - return (ENXIO); - } - - for (j = 0; j < count; j++) { - irqs[j] = MAP_IRQ(cpcht_msipic, i+j); - sc->htirq_map[i+j].irq_type = IRQ_MSI; - } - mtx_unlock(&sc->htirq_mtx); - - return (0); -} - -static int -cpcht_release_msi(device_t dev, device_t child, int count, int *irqs) -{ - struct cpcht_softc *sc; - int i; - - sc = device_get_softc(dev); - - mtx_lock(&sc->htirq_mtx); - for (i = 0; i < count; i++) - sc->htirq_map[irqs[i] & 0xff].irq_type = IRQ_NONE; - mtx_unlock(&sc->htirq_mtx); - - return (0); -} - -static int -cpcht_alloc_msix(device_t dev, device_t child, int *irq) -{ - struct cpcht_softc *sc; - int i; - - sc = device_get_softc(dev); - - /* Bail if no MSI PIC yet */ - if (cpcht_msipic == 0) - return (ENXIO); - - mtx_lock(&sc->htirq_mtx); - for (i = 8; i < 124; i++) { - if (sc->htirq_map[i].irq_type == IRQ_NONE) { - sc->htirq_map[i].irq_type = IRQ_MSI; - *irq = MAP_IRQ(cpcht_msipic, i); - - mtx_unlock(&sc->htirq_mtx); - return (0); - } - } - mtx_unlock(&sc->htirq_mtx); - - return (ENXIO); -} - -static int -cpcht_release_msix(device_t dev, device_t child, int irq) -{ - struct cpcht_softc *sc; - - sc = device_get_softc(dev); - - mtx_lock(&sc->htirq_mtx); - sc->htirq_map[irq & 0xff].irq_type = IRQ_NONE; - mtx_unlock(&sc->htirq_mtx); - - return (0); -} - -static int -cpcht_map_msi(device_t dev, device_t child, int irq, uint64_t *addr, - uint32_t *data) -{ - device_t pcib; - struct pci_devinfo *dinfo; - struct pcicfg_ht *ht = NULL; - - for (pcib = child; pcib != dev; pcib = - device_get_parent(device_get_parent(pcib))) { - dinfo = device_get_ivars(pcib); - ht = &dinfo->cfg.ht; - - if (ht == NULL) - continue; - } - - if (ht == NULL) - return (ENXIO); - - *addr = ht->ht_msiaddr; - *data = irq & 0xff; - - return (0); -} - -/* - * Driver for the integrated MPIC on U3/U4 (CPC925/CPC945) - */ - -static int openpic_cpcht_probe(device_t); -static int openpic_cpcht_attach(device_t); -static void openpic_cpcht_config(device_t, u_int irq, - enum intr_trigger trig, enum intr_polarity pol); -static void openpic_cpcht_enable(device_t, u_int irq, u_int vector, - void **priv); -static void openpic_cpcht_unmask(device_t, u_int irq, void *priv); -static void openpic_cpcht_eoi(device_t, u_int irq, void *priv); - -static device_method_t openpic_cpcht_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, openpic_cpcht_probe), - DEVMETHOD(device_attach, openpic_cpcht_attach), - - /* PIC interface */ - DEVMETHOD(pic_bind, openpic_bind), - DEVMETHOD(pic_config, openpic_cpcht_config), - DEVMETHOD(pic_dispatch, openpic_dispatch), - DEVMETHOD(pic_enable, openpic_cpcht_enable), - DEVMETHOD(pic_eoi, openpic_cpcht_eoi), - DEVMETHOD(pic_ipi, openpic_ipi), - DEVMETHOD(pic_mask, openpic_mask), - DEVMETHOD(pic_unmask, openpic_cpcht_unmask), - - { 0, 0 }, -}; - -struct openpic_cpcht_softc { - struct openpic_softc sc_openpic; - - struct mtx sc_ht_mtx; -}; - -static driver_t openpic_cpcht_driver = { - "htpic", - openpic_cpcht_methods, - sizeof(struct openpic_cpcht_softc), -}; - -EARLY_DRIVER_MODULE(openpic, unin, openpic_cpcht_driver, openpic_devclass, - 0, 0, BUS_PASS_INTERRUPT); - -static int -openpic_cpcht_probe(device_t dev) -{ - const char *type = ofw_bus_get_type(dev); - - if (strcmp(type, "open-pic") != 0) - return (ENXIO); - - device_set_desc(dev, OPENPIC_DEVSTR); - return (0); -} - -static int -openpic_cpcht_attach(device_t dev) -{ - struct openpic_cpcht_softc *sc; - phandle_t node; - int err, irq; - - node = ofw_bus_get_node(dev); - err = openpic_common_attach(dev, node); - if (err != 0) - return (err); - - /* - * The HT APIC stuff is not thread-safe, so we need a mutex to - * protect it. - */ - sc = device_get_softc(dev); - mtx_init(&sc->sc_ht_mtx, "htpic", NULL, MTX_SPIN); - - /* - * Interrupts 0-3 are internally sourced and are level triggered - * active low. Interrupts 4-123 are connected to a pulse generator - * and should be programmed as edge triggered low-to-high. - * - * IBM CPC945 Manual, Section 9.3. - */ - - for (irq = 0; irq < 4; irq++) - openpic_config(dev, irq, INTR_TRIGGER_LEVEL, INTR_POLARITY_LOW); - for (irq = 4; irq < 124; irq++) - openpic_config(dev, irq, INTR_TRIGGER_EDGE, INTR_POLARITY_LOW); - - /* - * Use this PIC for MSI only if it is the root PIC. This may not - * be necessary, but Linux does it, and I cannot find any U3 machines - * with MSI devices to test. - */ - if (dev == root_pic) - cpcht_msipic = node; - - return (0); -} - -static void -openpic_cpcht_config(device_t dev, u_int irq, enum intr_trigger trig, - enum intr_polarity pol) -{ - struct openpic_cpcht_softc *sc; - uint32_t ht_irq; - - /* - * The interrupt settings for the MPIC are completely determined - * by the internal wiring in the northbridge. Real changes to these - * settings need to be negotiated with the remote IO-APIC on the HT - * link. - */ - - sc = device_get_softc(dev); - - if (cpcht_irqmap != NULL && irq < 128 && - cpcht_irqmap[irq].ht_base > 0 && !cpcht_irqmap[irq].edge) { - mtx_lock_spin(&sc->sc_ht_mtx); - - /* Program the data port */ - out8rb(cpcht_irqmap[irq].ht_base + PCIR_HT_COMMAND, - 0x10 + (cpcht_irqmap[irq].ht_source << 1)); - - /* Grab the IRQ config register */ - ht_irq = in32rb(cpcht_irqmap[irq].ht_base + 4); - - /* Mask the IRQ while we fiddle settings */ - out32rb(cpcht_irqmap[irq].ht_base + 4, ht_irq | HTAPIC_MASK); - - /* Program the interrupt sense */ - ht_irq &= ~(HTAPIC_TRIGGER_LEVEL | HTAPIC_REQUEST_EOI); - if (trig == INTR_TRIGGER_EDGE) { - cpcht_irqmap[irq].edge = 1; - } else { - cpcht_irqmap[irq].edge = 0; - ht_irq |= HTAPIC_TRIGGER_LEVEL | HTAPIC_REQUEST_EOI; - } - out32rb(cpcht_irqmap[irq].ht_base + 4, ht_irq); - - mtx_unlock_spin(&sc->sc_ht_mtx); - } -} - -static void -openpic_cpcht_enable(device_t dev, u_int irq, u_int vec, void **priv) -{ - struct openpic_cpcht_softc *sc; - uint32_t ht_irq; - - openpic_enable(dev, irq, vec, priv); - - sc = device_get_softc(dev); - - if (cpcht_irqmap != NULL && irq < 128 && - cpcht_irqmap[irq].ht_base > 0) { - mtx_lock_spin(&sc->sc_ht_mtx); - - /* Program the data port */ - out8rb(cpcht_irqmap[irq].ht_base + PCIR_HT_COMMAND, - 0x10 + (cpcht_irqmap[irq].ht_source << 1)); - - /* Unmask the interrupt */ - ht_irq = in32rb(cpcht_irqmap[irq].ht_base + 4); - ht_irq &= ~HTAPIC_MASK; - out32rb(cpcht_irqmap[irq].ht_base + 4, ht_irq); - - mtx_unlock_spin(&sc->sc_ht_mtx); - } - - openpic_cpcht_eoi(dev, irq, *priv); -} - -static void -openpic_cpcht_unmask(device_t dev, u_int irq, void *priv) -{ - struct openpic_cpcht_softc *sc; - uint32_t ht_irq; - - openpic_unmask(dev, irq, priv); - - sc = device_get_softc(dev); - - if (cpcht_irqmap != NULL && irq < 128 && - cpcht_irqmap[irq].ht_base > 0) { - mtx_lock_spin(&sc->sc_ht_mtx); - - /* Program the data port */ - out8rb(cpcht_irqmap[irq].ht_base + PCIR_HT_COMMAND, - 0x10 + (cpcht_irqmap[irq].ht_source << 1)); - - /* Unmask the interrupt */ - ht_irq = in32rb(cpcht_irqmap[irq].ht_base + 4); - ht_irq &= ~HTAPIC_MASK; - out32rb(cpcht_irqmap[irq].ht_base + 4, ht_irq); - - mtx_unlock_spin(&sc->sc_ht_mtx); - } - - openpic_cpcht_eoi(dev, irq, priv); -} - -static void -openpic_cpcht_eoi(device_t dev, u_int irq, void *priv) -{ - struct openpic_cpcht_softc *sc; - uint32_t off, mask; - - if (irq == 255) - return; - - sc = device_get_softc(dev); - - if (cpcht_irqmap != NULL && irq < 128 && - cpcht_irqmap[irq].ht_base > 0 && !cpcht_irqmap[irq].edge) { - /* If this is an HT IRQ, acknowledge it at the remote APIC */ - - if (cpcht_irqmap[irq].apple_eoi) { - off = (cpcht_irqmap[irq].ht_source >> 3) & ~3; - mask = 1 << (cpcht_irqmap[irq].ht_source & 0x1f); - out32rb(cpcht_irqmap[irq].apple_eoi + off, mask); - } else { - mtx_lock_spin(&sc->sc_ht_mtx); - - out8rb(cpcht_irqmap[irq].ht_base + PCIR_HT_COMMAND, - 0x11 + (cpcht_irqmap[irq].ht_source << 1)); - out32rb(cpcht_irqmap[irq].ht_base + 4, - cpcht_irqmap[irq].eoi_data); - - mtx_unlock_spin(&sc->sc_ht_mtx); - } - } - - openpic_eoi(dev, irq, priv); -} diff --git a/sys/powerpc/powermac/cuda.c b/sys/powerpc/powermac/cuda.c deleted file mode 100644 index b2ac6ccf93d..00000000000 --- a/sys/powerpc/powermac/cuda.c +++ /dev/null @@ -1,799 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2006 Michael Lorenz - * Copyright 2008 by Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include - -#include "clock_if.h" -#include "cudavar.h" -#include "viareg.h" - -/* - * MacIO interface - */ -static int cuda_probe(device_t); -static int cuda_attach(device_t); -static int cuda_detach(device_t); - -static u_int cuda_adb_send(device_t dev, u_char command_byte, int len, - u_char *data, u_char poll); -static u_int cuda_adb_autopoll(device_t dev, uint16_t mask); -static u_int cuda_poll(device_t dev); -static void cuda_send_inbound(struct cuda_softc *sc); -static void cuda_send_outbound(struct cuda_softc *sc); -static void cuda_shutdown(void *xsc, int howto); - -/* - * Clock interface - */ -static int cuda_gettime(device_t dev, struct timespec *ts); -static int cuda_settime(device_t dev, struct timespec *ts); - -static device_method_t cuda_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, cuda_probe), - DEVMETHOD(device_attach, cuda_attach), - DEVMETHOD(device_detach, cuda_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* ADB bus interface */ - DEVMETHOD(adb_hb_send_raw_packet, cuda_adb_send), - DEVMETHOD(adb_hb_controller_poll, cuda_poll), - DEVMETHOD(adb_hb_set_autopoll_mask, cuda_adb_autopoll), - - /* Clock interface */ - DEVMETHOD(clock_gettime, cuda_gettime), - DEVMETHOD(clock_settime, cuda_settime), - - DEVMETHOD_END -}; - -static driver_t cuda_driver = { - "cuda", - cuda_methods, - sizeof(struct cuda_softc), -}; - -static devclass_t cuda_devclass; - -DRIVER_MODULE(cuda, macio, cuda_driver, cuda_devclass, 0, 0); -DRIVER_MODULE(adb, cuda, adb_driver, adb_devclass, 0, 0); - -static void cuda_intr(void *arg); -static uint8_t cuda_read_reg(struct cuda_softc *sc, u_int offset); -static void cuda_write_reg(struct cuda_softc *sc, u_int offset, uint8_t value); -static void cuda_idle(struct cuda_softc *); -static void cuda_tip(struct cuda_softc *); -static void cuda_clear_tip(struct cuda_softc *); -static void cuda_in(struct cuda_softc *); -static void cuda_out(struct cuda_softc *); -static void cuda_toggle_ack(struct cuda_softc *); -static void cuda_ack_off(struct cuda_softc *); -static int cuda_intr_state(struct cuda_softc *); - -static int -cuda_probe(device_t dev) -{ - const char *type = ofw_bus_get_type(dev); - - if (strcmp(type, "via-cuda") != 0) - return (ENXIO); - - device_set_desc(dev, CUDA_DEVSTR); - return (0); -} - -static int -cuda_attach(device_t dev) -{ - struct cuda_softc *sc; - - volatile int i; - uint8_t reg; - phandle_t node,child; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - - sc->sc_memrid = 0; - sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->sc_memrid, RF_ACTIVE); - - if (sc->sc_memr == NULL) { - device_printf(dev, "Could not alloc mem resource!\n"); - return (ENXIO); - } - - sc->sc_irqrid = 0; - sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irqrid, - RF_ACTIVE); - if (sc->sc_irq == NULL) { - device_printf(dev, "could not allocate interrupt\n"); - bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_memrid, - sc->sc_memr); - return (ENXIO); - } - - if (bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC | INTR_MPSAFE - | INTR_ENTROPY, NULL, cuda_intr, dev, &sc->sc_ih) != 0) { - device_printf(dev, "could not setup interrupt\n"); - bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_memrid, - sc->sc_memr); - bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irqrid, - sc->sc_irq); - return (ENXIO); - } - - mtx_init(&sc->sc_mutex,"cuda",NULL,MTX_DEF | MTX_RECURSE); - - sc->sc_sent = 0; - sc->sc_received = 0; - sc->sc_waiting = 0; - sc->sc_polling = 0; - sc->sc_state = CUDA_NOTREADY; - sc->sc_autopoll = 0; - sc->sc_rtc = -1; - - STAILQ_INIT(&sc->sc_inq); - STAILQ_INIT(&sc->sc_outq); - STAILQ_INIT(&sc->sc_freeq); - - for (i = 0; i < CUDA_MAXPACKETS; i++) - STAILQ_INSERT_TAIL(&sc->sc_freeq, &sc->sc_pkts[i], pkt_q); - - /* Init CUDA */ - - reg = cuda_read_reg(sc, vDirB); - reg |= 0x30; /* register B bits 4 and 5: outputs */ - cuda_write_reg(sc, vDirB, reg); - - reg = cuda_read_reg(sc, vDirB); - reg &= 0xf7; /* register B bit 3: input */ - cuda_write_reg(sc, vDirB, reg); - - reg = cuda_read_reg(sc, vACR); - reg &= ~vSR_OUT; /* make sure SR is set to IN */ - cuda_write_reg(sc, vACR, reg); - - cuda_write_reg(sc, vACR, (cuda_read_reg(sc, vACR) | 0x0c) & ~0x10); - - sc->sc_state = CUDA_IDLE; /* used by all types of hardware */ - - cuda_write_reg(sc, vIER, 0x84); /* make sure VIA interrupts are on */ - - cuda_idle(sc); /* reset ADB */ - - /* Reset CUDA */ - - i = cuda_read_reg(sc, vSR); /* clear interrupt */ - cuda_write_reg(sc, vIER, 0x04); /* no interrupts while clearing */ - cuda_idle(sc); /* reset state to idle */ - DELAY(150); - cuda_tip(sc); /* signal start of frame */ - DELAY(150); - cuda_toggle_ack(sc); - DELAY(150); - cuda_clear_tip(sc); - DELAY(150); - cuda_idle(sc); /* back to idle state */ - i = cuda_read_reg(sc, vSR); /* clear interrupt */ - cuda_write_reg(sc, vIER, 0x84); /* ints ok now */ - - /* Initialize child buses (ADB) */ - node = ofw_bus_get_node(dev); - - for (child = OF_child(node); child != 0; child = OF_peer(child)) { - char name[32]; - - memset(name, 0, sizeof(name)); - OF_getprop(child, "name", name, sizeof(name)); - - if (bootverbose) - device_printf(dev, "CUDA child <%s>\n",name); - - if (strncmp(name, "adb", 4) == 0) { - sc->adb_bus = device_add_child(dev,"adb",-1); - } - } - - clock_register(dev, 1000); - EVENTHANDLER_REGISTER(shutdown_final, cuda_shutdown, sc, - SHUTDOWN_PRI_LAST); - - return (bus_generic_attach(dev)); -} - -static int cuda_detach(device_t dev) { - struct cuda_softc *sc; - - sc = device_get_softc(dev); - - bus_teardown_intr(dev, sc->sc_irq, sc->sc_ih); - bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irqrid, sc->sc_irq); - bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_memrid, sc->sc_memr); - mtx_destroy(&sc->sc_mutex); - - return (bus_generic_detach(dev)); -} - -static uint8_t -cuda_read_reg(struct cuda_softc *sc, u_int offset) { - return (bus_read_1(sc->sc_memr, offset)); -} - -static void -cuda_write_reg(struct cuda_softc *sc, u_int offset, uint8_t value) { - bus_write_1(sc->sc_memr, offset, value); -} - -static void -cuda_idle(struct cuda_softc *sc) -{ - uint8_t reg; - - reg = cuda_read_reg(sc, vBufB); - reg |= (vPB4 | vPB5); - cuda_write_reg(sc, vBufB, reg); -} - -static void -cuda_tip(struct cuda_softc *sc) -{ - uint8_t reg; - - reg = cuda_read_reg(sc, vBufB); - reg &= ~vPB5; - cuda_write_reg(sc, vBufB, reg); -} - -static void -cuda_clear_tip(struct cuda_softc *sc) -{ - uint8_t reg; - - reg = cuda_read_reg(sc, vBufB); - reg |= vPB5; - cuda_write_reg(sc, vBufB, reg); -} - -static void -cuda_in(struct cuda_softc *sc) -{ - uint8_t reg; - - reg = cuda_read_reg(sc, vACR); - reg &= ~vSR_OUT; - cuda_write_reg(sc, vACR, reg); -} - -static void -cuda_out(struct cuda_softc *sc) -{ - uint8_t reg; - - reg = cuda_read_reg(sc, vACR); - reg |= vSR_OUT; - cuda_write_reg(sc, vACR, reg); -} - -static void -cuda_toggle_ack(struct cuda_softc *sc) -{ - uint8_t reg; - - reg = cuda_read_reg(sc, vBufB); - reg ^= vPB4; - cuda_write_reg(sc, vBufB, reg); -} - -static void -cuda_ack_off(struct cuda_softc *sc) -{ - uint8_t reg; - - reg = cuda_read_reg(sc, vBufB); - reg |= vPB4; - cuda_write_reg(sc, vBufB, reg); -} - -static int -cuda_intr_state(struct cuda_softc *sc) -{ - return ((cuda_read_reg(sc, vBufB) & vPB3) == 0); -} - -static int -cuda_send(void *cookie, int poll, int length, uint8_t *msg) -{ - struct cuda_softc *sc = cookie; - device_t dev = sc->sc_dev; - struct cuda_packet *pkt; - - if (sc->sc_state == CUDA_NOTREADY) - return (-1); - - mtx_lock(&sc->sc_mutex); - - pkt = STAILQ_FIRST(&sc->sc_freeq); - if (pkt == NULL) { - mtx_unlock(&sc->sc_mutex); - return (-1); - } - - pkt->len = length - 1; - pkt->type = msg[0]; - memcpy(pkt->data, &msg[1], pkt->len); - - STAILQ_REMOVE_HEAD(&sc->sc_freeq, pkt_q); - STAILQ_INSERT_TAIL(&sc->sc_outq, pkt, pkt_q); - - /* - * If we already are sending a packet, we should bail now that this - * one has been added to the queue. - */ - - if (sc->sc_waiting) { - mtx_unlock(&sc->sc_mutex); - return (0); - } - - cuda_send_outbound(sc); - mtx_unlock(&sc->sc_mutex); - - if (sc->sc_polling || poll || cold) - cuda_poll(dev); - - return (0); -} - -static void -cuda_send_outbound(struct cuda_softc *sc) -{ - struct cuda_packet *pkt; - - mtx_assert(&sc->sc_mutex, MA_OWNED); - - pkt = STAILQ_FIRST(&sc->sc_outq); - if (pkt == NULL) - return; - - sc->sc_out_length = pkt->len + 1; - memcpy(sc->sc_out, &pkt->type, pkt->len + 1); - sc->sc_sent = 0; - - STAILQ_REMOVE_HEAD(&sc->sc_outq, pkt_q); - STAILQ_INSERT_TAIL(&sc->sc_freeq, pkt, pkt_q); - - sc->sc_waiting = 1; - - cuda_poll(sc->sc_dev); - - DELAY(150); - - if (sc->sc_state == CUDA_IDLE && !cuda_intr_state(sc)) { - sc->sc_state = CUDA_OUT; - cuda_out(sc); - cuda_write_reg(sc, vSR, sc->sc_out[0]); - cuda_ack_off(sc); - cuda_tip(sc); - } -} - -static void -cuda_send_inbound(struct cuda_softc *sc) -{ - device_t dev; - struct cuda_packet *pkt; - - dev = sc->sc_dev; - - mtx_lock(&sc->sc_mutex); - - while ((pkt = STAILQ_FIRST(&sc->sc_inq)) != NULL) { - STAILQ_REMOVE_HEAD(&sc->sc_inq, pkt_q); - - mtx_unlock(&sc->sc_mutex); - - /* check if we have a handler for this message */ - switch (pkt->type) { - case CUDA_ADB: - if (pkt->len > 2) { - adb_receive_raw_packet(sc->adb_bus, - pkt->data[0],pkt->data[1], - pkt->len - 2,&pkt->data[2]); - } else { - adb_receive_raw_packet(sc->adb_bus, - pkt->data[0],pkt->data[1],0,NULL); - } - break; - case CUDA_PSEUDO: - mtx_lock(&sc->sc_mutex); - switch (pkt->data[1]) { - case CMD_AUTOPOLL: - sc->sc_autopoll = 1; - break; - case CMD_READ_RTC: - memcpy(&sc->sc_rtc, &pkt->data[2], - sizeof(sc->sc_rtc)); - wakeup(&sc->sc_rtc); - break; - case CMD_WRITE_RTC: - break; - } - mtx_unlock(&sc->sc_mutex); - break; - case CUDA_ERROR: - /* - * CUDA will throw errors if we miss a race between - * sending and receiving packets. This is already - * handled when we abort packet output to handle - * this packet in cuda_intr(). Thus, we ignore - * these messages. - */ - break; - default: - device_printf(dev,"unknown CUDA command %d\n", - pkt->type); - break; - } - - mtx_lock(&sc->sc_mutex); - - STAILQ_INSERT_TAIL(&sc->sc_freeq, pkt, pkt_q); - } - - mtx_unlock(&sc->sc_mutex); -} - -static u_int -cuda_poll(device_t dev) -{ - struct cuda_softc *sc = device_get_softc(dev); - - if (sc->sc_state == CUDA_IDLE && !cuda_intr_state(sc) && - !sc->sc_waiting) - return (0); - - cuda_intr(dev); - return (0); -} - -static void -cuda_intr(void *arg) -{ - device_t dev; - struct cuda_softc *sc; - - int i, ending, restart_send, process_inbound; - uint8_t reg; - - dev = (device_t)arg; - sc = device_get_softc(dev); - - mtx_lock(&sc->sc_mutex); - - restart_send = 0; - process_inbound = 0; - reg = cuda_read_reg(sc, vIFR); - if ((reg & vSR_INT) != vSR_INT) { - mtx_unlock(&sc->sc_mutex); - return; - } - - cuda_write_reg(sc, vIFR, 0x7f); /* Clear interrupt */ - -switch_start: - switch (sc->sc_state) { - case CUDA_IDLE: - /* - * This is an unexpected packet, so grab the first (dummy) - * byte, set up the proper vars, and tell the chip we are - * starting to receive the packet by setting the TIP bit. - */ - sc->sc_in[1] = cuda_read_reg(sc, vSR); - - if (cuda_intr_state(sc) == 0) { - /* must have been a fake start */ - - if (sc->sc_waiting) { - /* start over */ - DELAY(150); - sc->sc_state = CUDA_OUT; - sc->sc_sent = 0; - cuda_out(sc); - cuda_write_reg(sc, vSR, sc->sc_out[1]); - cuda_ack_off(sc); - cuda_tip(sc); - } - break; - } - - cuda_in(sc); - cuda_tip(sc); - - sc->sc_received = 1; - sc->sc_state = CUDA_IN; - break; - - case CUDA_IN: - sc->sc_in[sc->sc_received] = cuda_read_reg(sc, vSR); - ending = 0; - - if (sc->sc_received > 255) { - /* bitch only once */ - if (sc->sc_received == 256) { - device_printf(dev,"input overflow\n"); - ending = 1; - } - } else - sc->sc_received++; - - /* intr off means this is the last byte (end of frame) */ - if (cuda_intr_state(sc) == 0) { - ending = 1; - } else { - cuda_toggle_ack(sc); - } - - if (ending == 1) { /* end of message? */ - struct cuda_packet *pkt; - - /* reset vars and signal the end of this frame */ - cuda_idle(sc); - - /* Queue up the packet */ - pkt = STAILQ_FIRST(&sc->sc_freeq); - if (pkt != NULL) { - /* If we have a free packet, process it */ - - pkt->len = sc->sc_received - 2; - pkt->type = sc->sc_in[1]; - memcpy(pkt->data, &sc->sc_in[2], pkt->len); - - STAILQ_REMOVE_HEAD(&sc->sc_freeq, pkt_q); - STAILQ_INSERT_TAIL(&sc->sc_inq, pkt, pkt_q); - - process_inbound = 1; - } - - sc->sc_state = CUDA_IDLE; - sc->sc_received = 0; - - /* - * If there is something waiting to be sent out, - * set everything up and send the first byte. - */ - if (sc->sc_waiting == 1) { - DELAY(1500); /* required */ - sc->sc_sent = 0; - sc->sc_state = CUDA_OUT; - - /* - * If the interrupt is on, we were too slow - * and the chip has already started to send - * something to us, so back out of the write - * and start a read cycle. - */ - if (cuda_intr_state(sc)) { - cuda_in(sc); - cuda_idle(sc); - sc->sc_sent = 0; - sc->sc_state = CUDA_IDLE; - sc->sc_received = 0; - DELAY(150); - goto switch_start; - } - - /* - * If we got here, it's ok to start sending - * so load the first byte and tell the chip - * we want to send. - */ - cuda_out(sc); - cuda_write_reg(sc, vSR, - sc->sc_out[sc->sc_sent]); - cuda_ack_off(sc); - cuda_tip(sc); - } - } - break; - - case CUDA_OUT: - i = cuda_read_reg(sc, vSR); /* reset SR-intr in IFR */ - - sc->sc_sent++; - if (cuda_intr_state(sc)) { /* ADB intr low during write */ - cuda_in(sc); /* make sure SR is set to IN */ - cuda_idle(sc); - sc->sc_sent = 0; /* must start all over */ - sc->sc_state = CUDA_IDLE; /* new state */ - sc->sc_received = 0; - sc->sc_waiting = 1; /* must retry when done with - * read */ - DELAY(150); - goto switch_start; /* process next state right - * now */ - break; - } - if (sc->sc_out_length == sc->sc_sent) { /* check for done */ - sc->sc_waiting = 0; /* done writing */ - sc->sc_state = CUDA_IDLE; /* signal bus is idle */ - cuda_in(sc); - cuda_idle(sc); - } else { - /* send next byte */ - cuda_write_reg(sc, vSR, sc->sc_out[sc->sc_sent]); - cuda_toggle_ack(sc); /* signal byte ready to - * shift */ - } - break; - - case CUDA_NOTREADY: - break; - - default: - break; - } - - mtx_unlock(&sc->sc_mutex); - - if (process_inbound) - cuda_send_inbound(sc); - - mtx_lock(&sc->sc_mutex); - /* If we have another packet waiting, set it up */ - if (!sc->sc_waiting && sc->sc_state == CUDA_IDLE) - cuda_send_outbound(sc); - - mtx_unlock(&sc->sc_mutex); - -} - -static u_int -cuda_adb_send(device_t dev, u_char command_byte, int len, u_char *data, - u_char poll) -{ - struct cuda_softc *sc = device_get_softc(dev); - uint8_t packet[16]; - int i; - - /* construct an ADB command packet and send it */ - packet[0] = CUDA_ADB; - packet[1] = command_byte; - for (i = 0; i < len; i++) - packet[i + 2] = data[i]; - - cuda_send(sc, poll, len + 2, packet); - - return (0); -} - -static u_int -cuda_adb_autopoll(device_t dev, uint16_t mask) { - struct cuda_softc *sc = device_get_softc(dev); - - uint8_t cmd[] = {CUDA_PSEUDO, CMD_AUTOPOLL, mask != 0}; - - mtx_lock(&sc->sc_mutex); - - if (cmd[2] == sc->sc_autopoll) { - mtx_unlock(&sc->sc_mutex); - return (0); - } - - sc->sc_autopoll = -1; - cuda_send(sc, 1, 3, cmd); - - mtx_unlock(&sc->sc_mutex); - - return (0); -} - -static void -cuda_shutdown(void *xsc, int howto) -{ - struct cuda_softc *sc = xsc; - uint8_t cmd[] = {CUDA_PSEUDO, 0}; - - cmd[1] = (howto & RB_HALT) ? CMD_POWEROFF : CMD_RESET; - cuda_poll(sc->sc_dev); - cuda_send(sc, 1, 2, cmd); - - while (1) - cuda_poll(sc->sc_dev); -} - -#define DIFF19041970 2082844800 - -static int -cuda_gettime(device_t dev, struct timespec *ts) -{ - struct cuda_softc *sc = device_get_softc(dev); - uint8_t cmd[] = {CUDA_PSEUDO, CMD_READ_RTC}; - - mtx_lock(&sc->sc_mutex); - sc->sc_rtc = -1; - cuda_send(sc, 1, 2, cmd); - if (sc->sc_rtc == -1) - mtx_sleep(&sc->sc_rtc, &sc->sc_mutex, 0, "rtc", 100); - - ts->tv_sec = sc->sc_rtc - DIFF19041970; - ts->tv_nsec = 0; - mtx_unlock(&sc->sc_mutex); - - return (0); -} - -static int -cuda_settime(device_t dev, struct timespec *ts) -{ - struct cuda_softc *sc = device_get_softc(dev); - uint8_t cmd[] = {CUDA_PSEUDO, CMD_WRITE_RTC, 0, 0, 0, 0}; - uint32_t sec; - - sec = ts->tv_sec + DIFF19041970; - memcpy(&cmd[2], &sec, sizeof(sec)); - - mtx_lock(&sc->sc_mutex); - cuda_send(sc, 0, 6, cmd); - mtx_unlock(&sc->sc_mutex); - - return (0); -} diff --git a/sys/powerpc/powermac/cudavar.h b/sys/powerpc/powermac/cudavar.h deleted file mode 100644 index 885ef5d2c23..00000000000 --- a/sys/powerpc/powermac/cudavar.h +++ /dev/null @@ -1,110 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2006 Michael Lorenz - * Copyright (c) 2008 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of The NetBSD Foundation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef _POWERPC_CUDAVAR_H_ -#define _POWERPC_CUDAVAR_H_ - -#define CUDA_DEVSTR "Apple CUDA I/O Controller" -#define CUDA_MAXPACKETS 10 - -/* Cuda addresses */ -#define CUDA_ADB 0 -#define CUDA_PSEUDO 1 -#define CUDA_ERROR 2 /* error codes? */ -#define CUDA_TIMER 3 -#define CUDA_POWER 4 -#define CUDA_IIC 5 /* XXX ??? */ -#define CUDA_PMU 6 -#define CUDA_ADB_QUERY 7 - -/* Cuda commands */ -#define CMD_AUTOPOLL 1 -#define CMD_READ_RTC 3 -#define CMD_WRITE_RTC 9 -#define CMD_POWEROFF 10 -#define CMD_RESET 17 -#define CMD_IIC 34 - -/* Cuda state codes */ -#define CUDA_NOTREADY 0x1 /* has not been initialized yet */ -#define CUDA_IDLE 0x2 /* the bus is currently idle */ -#define CUDA_OUT 0x3 /* sending out a command */ -#define CUDA_IN 0x4 /* receiving data */ -#define CUDA_POLLING 0x5 /* polling - II only */ - -struct cuda_packet { - uint8_t len; - uint8_t type; - - uint8_t data[253]; - STAILQ_ENTRY(cuda_packet) pkt_q; -}; - -STAILQ_HEAD(cuda_pktq, cuda_packet); - -struct cuda_softc { - device_t sc_dev; - int sc_memrid; - struct resource *sc_memr; - int sc_irqrid; - struct resource *sc_irq; - void *sc_ih; - - struct mtx sc_mutex; - - device_t adb_bus; - - int sc_node; - volatile int sc_state; - int sc_waiting; - int sc_polling; - int sc_iic_done; - volatile int sc_autopoll; - uint32_t sc_rtc; - - int sc_i2c_read_len; - - /* internal buffers */ - uint8_t sc_in[256]; - uint8_t sc_out[256]; - int sc_sent; - int sc_out_length; - int sc_received; - - struct cuda_packet sc_pkts[CUDA_MAXPACKETS]; - struct cuda_pktq sc_inq; - struct cuda_pktq sc_outq; - struct cuda_pktq sc_freeq; -}; - -#endif /* _POWERPC_CUDAVAR_H_ */ diff --git a/sys/powerpc/powermac/dbdma.c b/sys/powerpc/powermac/dbdma.c deleted file mode 100644 index 4f64fb76d1f..00000000000 --- a/sys/powerpc/powermac/dbdma.c +++ /dev/null @@ -1,383 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2008 Nathan Whitehorn - * All rights reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "dbdmavar.h" - -static MALLOC_DEFINE(M_DBDMA, "dbdma", "DBDMA Command List"); - -static uint32_t dbdma_read_reg(dbdma_channel_t *, u_int); -static void dbdma_write_reg(dbdma_channel_t *, u_int, uint32_t); -static void dbdma_phys_callback(void *, bus_dma_segment_t *, int, int); - -static void -dbdma_phys_callback(void *chan, bus_dma_segment_t *segs, int nsegs, int error) -{ - dbdma_channel_t *channel = (dbdma_channel_t *)(chan); - - channel->sc_slots_pa = segs[0].ds_addr; - dbdma_write_reg(channel, CHAN_CMDPTR, channel->sc_slots_pa); -} - -int -dbdma_allocate_channel(struct resource *dbdma_regs, u_int offset, - bus_dma_tag_t parent_dma, int slots, dbdma_channel_t **chan) -{ - int error = 0; - dbdma_channel_t *channel; - - channel = *chan = malloc(sizeof(struct dbdma_channel), M_DBDMA, - M_WAITOK | M_ZERO); - - channel->sc_regs = dbdma_regs; - channel->sc_off = offset; - dbdma_stop(channel); - - channel->sc_slots_pa = 0; - - error = bus_dma_tag_create(parent_dma, 16, 0, BUS_SPACE_MAXADDR_32BIT, - BUS_SPACE_MAXADDR, NULL, NULL, PAGE_SIZE, 1, PAGE_SIZE, 0, NULL, - NULL, &(channel->sc_dmatag)); - - error = bus_dmamem_alloc(channel->sc_dmatag, - (void **)&channel->sc_slots, BUS_DMA_WAITOK | BUS_DMA_ZERO, - &channel->sc_dmamap); - - error = bus_dmamap_load(channel->sc_dmatag, channel->sc_dmamap, - channel->sc_slots, PAGE_SIZE, dbdma_phys_callback, channel, 0); - - dbdma_write_reg(channel, CHAN_CMDPTR_HI, 0); - - channel->sc_nslots = slots; - - return (error); -} - -int -dbdma_resize_channel(dbdma_channel_t *chan, int newslots) -{ - - if (newslots > (PAGE_SIZE / sizeof(struct dbdma_command))) - return (-1); - - chan->sc_nslots = newslots; - return (0); -} - -int -dbdma_free_channel(dbdma_channel_t *chan) -{ - - dbdma_stop(chan); - - bus_dmamem_free(chan->sc_dmatag, chan->sc_slots, chan->sc_dmamap); - bus_dma_tag_destroy(chan->sc_dmatag); - - free(chan, M_DBDMA); - - return (0); -} - -uint16_t -dbdma_get_cmd_status(dbdma_channel_t *chan, int slot) -{ - - bus_dmamap_sync(chan->sc_dmatag, chan->sc_dmamap, BUS_DMASYNC_POSTREAD); - - /* - * I really did mean to swap resCount and xferStatus here, to - * account for the quad-word little endian fields. - */ - return (le16toh(chan->sc_slots[slot].resCount)); -} - -void -dbdma_clear_cmd_status(dbdma_channel_t *chan, int slot) -{ - /* See endian note above */ - chan->sc_slots[slot].resCount = 0; -} - -uint16_t -dbdma_get_residuals(dbdma_channel_t *chan, int slot) -{ - - bus_dmamap_sync(chan->sc_dmatag, chan->sc_dmamap, BUS_DMASYNC_POSTREAD); - - return (le16toh(chan->sc_slots[slot].xferStatus)); -} - -void -dbdma_reset(dbdma_channel_t *chan) -{ - - dbdma_stop(chan); - dbdma_set_current_cmd(chan, 0); - dbdma_run(chan); -} - -void -dbdma_run(dbdma_channel_t *chan) -{ - uint32_t control_reg; - - control_reg = DBDMA_STATUS_RUN | DBDMA_STATUS_PAUSE | - DBDMA_STATUS_WAKE | DBDMA_STATUS_DEAD; - control_reg <<= DBDMA_REG_MASK_SHIFT; - - control_reg |= DBDMA_STATUS_RUN; - dbdma_write_reg(chan, CHAN_CONTROL_REG, control_reg); -} - -void -dbdma_pause(dbdma_channel_t *chan) -{ - uint32_t control_reg; - - control_reg = DBDMA_STATUS_PAUSE; - control_reg <<= DBDMA_REG_MASK_SHIFT; - - control_reg |= DBDMA_STATUS_PAUSE; - dbdma_write_reg(chan, CHAN_CONTROL_REG, control_reg); -} - -void -dbdma_wake(dbdma_channel_t *chan) -{ - uint32_t control_reg; - - control_reg = DBDMA_STATUS_WAKE | DBDMA_STATUS_PAUSE | - DBDMA_STATUS_RUN | DBDMA_STATUS_DEAD; - control_reg <<= DBDMA_REG_MASK_SHIFT; - - control_reg |= DBDMA_STATUS_WAKE | DBDMA_STATUS_RUN; - dbdma_write_reg(chan, CHAN_CONTROL_REG, control_reg); -} - -void -dbdma_stop(dbdma_channel_t *chan) -{ - uint32_t control_reg; - - control_reg = DBDMA_STATUS_RUN; - control_reg <<= DBDMA_REG_MASK_SHIFT; - - dbdma_write_reg(chan, CHAN_CONTROL_REG, control_reg); - - while (dbdma_read_reg(chan, CHAN_STATUS_REG) & DBDMA_STATUS_ACTIVE) - DELAY(5); -} - -void -dbdma_set_current_cmd(dbdma_channel_t *chan, int slot) -{ - uint32_t cmd; - - cmd = chan->sc_slots_pa + slot * sizeof(struct dbdma_command); - dbdma_write_reg(chan, CHAN_CMDPTR, cmd); -} - -uint16_t -dbdma_get_chan_status(dbdma_channel_t *chan) -{ - uint32_t status_reg; - - status_reg = dbdma_read_reg(chan, CHAN_STATUS_REG); - return (status_reg & 0x0000ffff); -} - -uint8_t -dbdma_get_device_status(dbdma_channel_t *chan) -{ - return (dbdma_get_chan_status(chan) & 0x00ff); -} - -void -dbdma_set_device_status(dbdma_channel_t *chan, uint8_t mask, uint8_t value) -{ - uint32_t control_reg; - - control_reg = mask; - control_reg <<= DBDMA_REG_MASK_SHIFT; - control_reg |= value; - - dbdma_write_reg(chan, CHAN_CONTROL_REG, control_reg); -} - -void -dbdma_set_interrupt_selector(dbdma_channel_t *chan, uint8_t mask, uint8_t val) -{ - uint32_t intr_select; - - intr_select = mask; - intr_select <<= DBDMA_REG_MASK_SHIFT; - - intr_select |= val; - dbdma_write_reg(chan, CHAN_INTR_SELECT, intr_select); -} - -void -dbdma_set_branch_selector(dbdma_channel_t *chan, uint8_t mask, uint8_t val) -{ - uint32_t br_select; - - br_select = mask; - br_select <<= DBDMA_REG_MASK_SHIFT; - - br_select |= val; - dbdma_write_reg(chan, CHAN_BRANCH_SELECT, br_select); -} - -void -dbdma_set_wait_selector(dbdma_channel_t *chan, uint8_t mask, uint8_t val) -{ - uint32_t wait_select; - - wait_select = mask; - wait_select <<= DBDMA_REG_MASK_SHIFT; - wait_select |= val; - dbdma_write_reg(chan, CHAN_WAIT_SELECT, wait_select); -} - -void -dbdma_insert_command(dbdma_channel_t *chan, int slot, int command, int stream, - bus_addr_t data, size_t count, uint8_t interrupt, uint8_t branch, - uint8_t wait, uint32_t branch_slot) -{ - struct dbdma_command cmd; - uint32_t *flip; - - cmd.cmd = command; - cmd.key = stream; - cmd.intr = interrupt; - cmd.branch = branch; - cmd.wait = wait; - - cmd.reqCount = count; - cmd.address = (uint32_t)(data); - if (command != DBDMA_STORE_QUAD && command != DBDMA_LOAD_QUAD) - cmd.cmdDep = chan->sc_slots_pa + - branch_slot * sizeof(struct dbdma_command); - else - cmd.cmdDep = branch_slot; - - cmd.resCount = 0; - cmd.xferStatus = 0; - - /* - * Move quadwords to little-endian. God only knows why - * Apple thought this was a good idea. - */ - flip = (uint32_t *)(&cmd); - flip[0] = htole32(flip[0]); - flip[1] = htole32(flip[1]); - flip[2] = htole32(flip[2]); - - chan->sc_slots[slot] = cmd; -} - -void -dbdma_insert_stop(dbdma_channel_t *chan, int slot) -{ - - dbdma_insert_command(chan, slot, DBDMA_STOP, 0, 0, 0, DBDMA_NEVER, - DBDMA_NEVER, DBDMA_NEVER, 0); -} - -void -dbdma_insert_nop(dbdma_channel_t *chan, int slot) -{ - - dbdma_insert_command(chan, slot, DBDMA_NOP, 0, 0, 0, DBDMA_NEVER, - DBDMA_NEVER, DBDMA_NEVER, 0); -} - -void -dbdma_insert_branch(dbdma_channel_t *chan, int slot, int to_slot) -{ - - dbdma_insert_command(chan, slot, DBDMA_NOP, 0, 0, 0, DBDMA_NEVER, - DBDMA_ALWAYS, DBDMA_NEVER, to_slot); -} - -void -dbdma_sync_commands(dbdma_channel_t *chan, bus_dmasync_op_t op) -{ - - bus_dmamap_sync(chan->sc_dmatag, chan->sc_dmamap, op); -} - -void -dbdma_save_state(dbdma_channel_t *chan) -{ - - chan->sc_saved_regs[0] = dbdma_read_reg(chan, CHAN_CMDPTR); - chan->sc_saved_regs[1] = dbdma_read_reg(chan, CHAN_CMDPTR_HI); - chan->sc_saved_regs[2] = dbdma_read_reg(chan, CHAN_INTR_SELECT); - chan->sc_saved_regs[3] = dbdma_read_reg(chan, CHAN_BRANCH_SELECT); - chan->sc_saved_regs[4] = dbdma_read_reg(chan, CHAN_WAIT_SELECT); - - dbdma_stop(chan); -} - -void -dbdma_restore_state(dbdma_channel_t *chan) -{ - - dbdma_wake(chan); - dbdma_write_reg(chan, CHAN_CMDPTR, chan->sc_saved_regs[0]); - dbdma_write_reg(chan, CHAN_CMDPTR_HI, chan->sc_saved_regs[1]); - dbdma_write_reg(chan, CHAN_INTR_SELECT, chan->sc_saved_regs[2]); - dbdma_write_reg(chan, CHAN_BRANCH_SELECT, chan->sc_saved_regs[3]); - dbdma_write_reg(chan, CHAN_WAIT_SELECT, chan->sc_saved_regs[4]); -} - -static uint32_t -dbdma_read_reg(dbdma_channel_t *chan, u_int offset) -{ - - return (bus_read_4(chan->sc_regs, chan->sc_off + offset)); -} - -static void -dbdma_write_reg(dbdma_channel_t *chan, u_int offset, uint32_t val) -{ - - bus_write_4(chan->sc_regs, chan->sc_off + offset, val); -} diff --git a/sys/powerpc/powermac/dbdmavar.h b/sys/powerpc/powermac/dbdmavar.h deleted file mode 100644 index 6e7305bc27e..00000000000 --- a/sys/powerpc/powermac/dbdmavar.h +++ /dev/null @@ -1,105 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2008 Nathan Whitehorn - * All rights reserved - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _POWERPC_POWERMAC_DBDMAVAR_H_ -#define _POWERPC_POWERMAC_DBDMAVAR_H_ - -struct dbdma_command { - uint8_t cmd:4; /* DBDMA command */ - - uint8_t _resd1:1; - uint8_t key:3; /* Stream number, or 6 for KEY_SYSTEM */ - uint8_t _resd2:2; - - /* Interrupt, branch, and wait flags */ - uint8_t intr:2; - uint8_t branch:2; - uint8_t wait:2; - - uint16_t reqCount; /* Bytes to transfer */ - - uint32_t address; /* 32-bit system physical address */ - uint32_t cmdDep; /* Branch address or quad word to load/store */ - - uint16_t xferStatus; /* Contents of channel status after completion */ - uint16_t resCount; /* Number of residual bytes outstanding */ -}; - -struct dbdma_channel { - struct resource *sc_regs; - u_int sc_off; - - struct dbdma_command *sc_slots; - int sc_nslots; - bus_addr_t sc_slots_pa; - - bus_dma_tag_t sc_dmatag; - bus_dmamap_t sc_dmamap; - uint32_t sc_saved_regs[5]; -}; - -/* - DBDMA registers are found at 0x8000 + n*0x100 in the macio register space, - and are laid out as follows within each block: - - Address: Description: Length (bytes): - 0x000 Channel Control 4 - 0x004 Channel Status 4 - 0x00C Command Phys Addr 4 - 0x010 Interrupt Select 4 - 0x014 Branch Select 4 - 0x018 Wait Select 4 -*/ - -#define CHAN_CONTROL_REG 0x00 -#define CHAN_STATUS_REG 0x04 -#define CHAN_CMDPTR_HI 0x08 -#define CHAN_CMDPTR 0x0C -#define CHAN_INTR_SELECT 0x10 -#define CHAN_BRANCH_SELECT 0x14 -#define CHAN_WAIT_SELECT 0x18 - -/* Channel control is the write channel to channel status, the upper 16 bits - are a mask of which bytes to change */ - -#define DBDMA_REG_MASK_SHIFT 16 - -/* Status bits 0-7 are device dependent status bits */ - -/* - The Interrupt/Branch/Wait Select triggers the corresponding condition bits - in the event that (select.mask & device dependent status) == select.value - - They are defined a follows: - Byte 1: Reserved - Byte 2: Mask - Byte 3: Reserved - Byte 4: Value -*/ - -#endif /* _POWERPC_POWERMAC_DBDMAVAR_H_ */ diff --git a/sys/powerpc/powermac/fcu.c b/sys/powerpc/powermac/fcu.c deleted file mode 100644 index 748edb0a159..00000000000 --- a/sys/powerpc/powermac/fcu.c +++ /dev/null @@ -1,677 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Andreas Tobler - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include -#include -#include - -/* FCU registers - * /u3@0,f8000000/i2c@f8001000/fan@15e - */ -#define FCU_RPM_FAIL 0x0b /* fans states in bits 0<1-6>7 */ -#define FCU_RPM_AVAILABLE 0x0c -#define FCU_RPM_ACTIVE 0x0d -#define FCU_RPM_READ(x) 0x11 + (x) * 2 -#define FCU_RPM_SET(x) 0x10 + (x) * 2 - -#define FCU_PWM_FAIL 0x2b -#define FCU_PWM_AVAILABLE 0x2c -#define FCU_PWM_ACTIVE 0x2d -#define FCU_PWM_RPM(x) 0x31 + (x) * 2 /* Get RPM. */ -#define FCU_PWM_SGET(x) 0x30 + (x) * 2 /* Set or get PWM. */ - -struct fcu_fan { - struct pmac_fan fan; - device_t dev; - - int id; - enum { - FCU_FAN_RPM, - FCU_FAN_PWM - } type; - int setpoint; - int rpm; -}; - -struct fcu_softc { - device_t sc_dev; - struct intr_config_hook enum_hook; - uint32_t sc_addr; - struct fcu_fan *sc_fans; - int sc_nfans; -}; - -/* We can read the PWM and the RPM from a PWM controlled fan. - * Offer both values via sysctl. - */ -enum { - FCU_PWM_SYSCTL_PWM = 1 << 8, - FCU_PWM_SYSCTL_RPM = 2 << 8 -}; - -static int fcu_rpm_shift; - -/* Regular bus attachment functions */ -static int fcu_probe(device_t); -static int fcu_attach(device_t); - -/* Utility functions */ -static void fcu_attach_fans(device_t dev); -static int fcu_fill_fan_prop(device_t dev); -static int fcu_fan_set_rpm(struct fcu_fan *fan, int rpm); -static int fcu_fan_get_rpm(struct fcu_fan *fan); -static int fcu_fan_set_pwm(struct fcu_fan *fan, int pwm); -static int fcu_fan_get_pwm(device_t dev, struct fcu_fan *fan, int *pwm, - int *rpm); -static int fcu_fanrpm_sysctl(SYSCTL_HANDLER_ARGS); -static void fcu_start(void *xdev); -static int fcu_write(device_t dev, uint32_t addr, uint8_t reg, uint8_t *buf, - int len); -static int fcu_read_1(device_t dev, uint32_t addr, uint8_t reg, uint8_t *data); - -static device_method_t fcu_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, fcu_probe), - DEVMETHOD(device_attach, fcu_attach), - { 0, 0 }, -}; - -static driver_t fcu_driver = { - "fcu", - fcu_methods, - sizeof(struct fcu_softc) -}; - -static devclass_t fcu_devclass; - -DRIVER_MODULE(fcu, iicbus, fcu_driver, fcu_devclass, 0, 0); -static MALLOC_DEFINE(M_FCU, "fcu", "FCU Sensor Information"); - -static int -fcu_write(device_t dev, uint32_t addr, uint8_t reg, uint8_t *buff, - int len) -{ - unsigned char buf[4]; - int try = 0; - - struct iic_msg msg[] = { - { addr, IIC_M_WR, 0, buf } - }; - - msg[0].len = len + 1; - buf[0] = reg; - memcpy(buf + 1, buff, len); - - for (;;) - { - if (iicbus_transfer(dev, msg, 1) == 0) - return (0); - - if (++try > 5) { - device_printf(dev, "iicbus write failed\n"); - return (-1); - } - pause("fcu_write", hz); - } -} - -static int -fcu_read_1(device_t dev, uint32_t addr, uint8_t reg, uint8_t *data) -{ - uint8_t buf[4]; - int err, try = 0; - - struct iic_msg msg[2] = { - { addr, IIC_M_WR | IIC_M_NOSTOP, 1, ® }, - { addr, IIC_M_RD, 1, buf }, - }; - - for (;;) - { - err = iicbus_transfer(dev, msg, 2); - if (err != 0) - goto retry; - - *data = *((uint8_t*)buf); - return (0); - retry: - if (++try > 5) { - device_printf(dev, "iicbus read failed\n"); - return (-1); - } - pause("fcu_read_1", hz); - } -} - -static int -fcu_probe(device_t dev) -{ - const char *name, *compatible; - struct fcu_softc *sc; - - name = ofw_bus_get_name(dev); - compatible = ofw_bus_get_compat(dev); - - if (!name) - return (ENXIO); - - if (strcmp(name, "fan") != 0 || strcmp(compatible, "fcu") != 0) - return (ENXIO); - - sc = device_get_softc(dev); - sc->sc_dev = dev; - sc->sc_addr = iicbus_get_addr(dev); - - device_set_desc(dev, "Apple Fan Control Unit"); - - return (0); -} - -static int -fcu_attach(device_t dev) -{ - struct fcu_softc *sc; - - sc = device_get_softc(dev); - - sc->enum_hook.ich_func = fcu_start; - sc->enum_hook.ich_arg = dev; - - /* We have to wait until interrupts are enabled. I2C read and write - * only works if the interrupts are available. - * The unin/i2c is controlled by the htpic on unin. But this is not - * the master. The openpic on mac-io is controlling the htpic. - * This one gets attached after the mac-io probing and then the - * interrupts will be available. - */ - - if (config_intrhook_establish(&sc->enum_hook) != 0) - return (ENOMEM); - - return (0); -} - -static void -fcu_start(void *xdev) -{ - unsigned char buf[1] = { 0xff }; - struct fcu_softc *sc; - - device_t dev = (device_t)xdev; - - sc = device_get_softc(dev); - - /* Start the fcu device. */ - fcu_write(sc->sc_dev, sc->sc_addr, 0xe, buf, 1); - fcu_write(sc->sc_dev, sc->sc_addr, 0x2e, buf, 1); - fcu_read_1(sc->sc_dev, sc->sc_addr, 0, buf); - fcu_rpm_shift = (buf[0] == 1) ? 2 : 3; - - device_printf(dev, "FCU initialized, RPM shift: %d\n", - fcu_rpm_shift); - - /* Detect and attach child devices. */ - - fcu_attach_fans(dev); - - config_intrhook_disestablish(&sc->enum_hook); - -} - -static int -fcu_fan_set_rpm(struct fcu_fan *fan, int rpm) -{ - uint8_t reg; - struct fcu_softc *sc; - unsigned char buf[2]; - - sc = device_get_softc(fan->dev); - - /* Clamp to allowed range */ - rpm = max(fan->fan.min_rpm, rpm); - rpm = min(fan->fan.max_rpm, rpm); - - if (fan->type == FCU_FAN_RPM) { - reg = FCU_RPM_SET(fan->id); - fan->setpoint = rpm; - } else { - device_printf(fan->dev, "Unknown fan type: %d\n", fan->type); - return (ENXIO); - } - - buf[0] = rpm >> (8 - fcu_rpm_shift); - buf[1] = rpm << fcu_rpm_shift; - - if (fcu_write(sc->sc_dev, sc->sc_addr, reg, buf, 2) < 0) - return (EIO); - - return (0); -} - -static int -fcu_fan_get_rpm(struct fcu_fan *fan) -{ - uint8_t reg; - struct fcu_softc *sc; - uint8_t buff[2] = { 0, 0 }; - uint8_t active = 0, avail = 0, fail = 0; - int rpm; - - sc = device_get_softc(fan->dev); - - if (fan->type == FCU_FAN_RPM) { - /* Check if the fan is available. */ - reg = FCU_RPM_AVAILABLE; - if (fcu_read_1(sc->sc_dev, sc->sc_addr, reg, &avail) < 0) - return (-1); - if ((avail & (1 << fan->id)) == 0) { - device_printf(fan->dev, - "RPM Fan not available ID: %d\n", fan->id); - return (-1); - } - /* Check if we have a failed fan. */ - reg = FCU_RPM_FAIL; - if (fcu_read_1(sc->sc_dev, sc->sc_addr, reg, &fail) < 0) - return (-1); - if ((fail & (1 << fan->id)) != 0) { - device_printf(fan->dev, - "RPM Fan failed ID: %d\n", fan->id); - return (-1); - } - /* Check if fan is active. */ - reg = FCU_RPM_ACTIVE; - if (fcu_read_1(sc->sc_dev, sc->sc_addr, reg, &active) < 0) - return (-1); - if ((active & (1 << fan->id)) == 0) { - device_printf(fan->dev, "RPM Fan not active ID: %d\n", - fan->id); - return (-1); - } - reg = FCU_RPM_READ(fan->id); - - } else { - device_printf(fan->dev, "Unknown fan type: %d\n", fan->type); - return (-1); - } - - /* It seems that we can read the fans rpm. */ - if (fcu_read_1(sc->sc_dev, sc->sc_addr, reg, buff) < 0) - return (-1); - - rpm = (buff[0] << (8 - fcu_rpm_shift)) | buff[1] >> fcu_rpm_shift; - - return (rpm); -} - -static int -fcu_fan_set_pwm(struct fcu_fan *fan, int pwm) -{ - uint8_t reg; - struct fcu_softc *sc; - uint8_t buf[2]; - - sc = device_get_softc(fan->dev); - - /* Clamp to allowed range */ - pwm = max(fan->fan.min_rpm, pwm); - pwm = min(fan->fan.max_rpm, pwm); - - if (fan->type == FCU_FAN_PWM) { - reg = FCU_PWM_SGET(fan->id); - if (pwm > 100) - pwm = 100; - if (pwm < 30) - pwm = 30; - fan->setpoint = pwm; - } else { - device_printf(fan->dev, "Unknown fan type: %d\n", fan->type); - return (EIO); - } - - buf[0] = (pwm * 2550) / 1000; - - if (fcu_write(sc->sc_dev, sc->sc_addr, reg, buf, 1) < 0) - return (EIO); - return (0); -} - -static int -fcu_fan_get_pwm(device_t dev, struct fcu_fan *fan, int *pwm, int *rpm) -{ - uint8_t reg; - struct fcu_softc *sc; - uint8_t buf[2]; - uint8_t active = 0, avail = 0, fail = 0; - - sc = device_get_softc(dev); - - if (fan->type == FCU_FAN_PWM) { - /* Check if the fan is available. */ - reg = FCU_PWM_AVAILABLE; - if (fcu_read_1(sc->sc_dev, sc->sc_addr, reg, &avail) < 0) - return (-1); - if ((avail & (1 << fan->id)) == 0) { - device_printf(dev, "PWM Fan not available ID: %d\n", - fan->id); - return (-1); - } - /* Check if we have a failed fan. */ - reg = FCU_PWM_FAIL; - if (fcu_read_1(sc->sc_dev, sc->sc_addr, reg, &fail) < 0) - return (-1); - if ((fail & (1 << fan->id)) != 0) { - device_printf(dev, "PWM Fan failed ID: %d\n", fan->id); - return (-1); - } - /* Check if fan is active. */ - reg = FCU_PWM_ACTIVE; - if (fcu_read_1(sc->sc_dev, sc->sc_addr, reg, &active) < 0) - return (-1); - if ((active & (1 << fan->id)) == 0) { - device_printf(dev, "PWM Fan not active ID: %d\n", - fan->id); - return (-1); - } - reg = FCU_PWM_SGET(fan->id); - } else { - device_printf(dev, "Unknown fan type: %d\n", fan->type); - return (EIO); - } - - /* It seems that we can read the fans pwm. */ - if (fcu_read_1(sc->sc_dev, sc->sc_addr, reg, buf) < 0) - return (-1); - - *pwm = (buf[0] * 1000) / 2550; - - /* Now read the rpm. */ - reg = FCU_PWM_RPM(fan->id); - if (fcu_read_1(sc->sc_dev, sc->sc_addr, reg, buf) < 0) - return (-1); - - *rpm = (buf[0] << (8 - fcu_rpm_shift)) | buf[1] >> fcu_rpm_shift; - - return (0); -} - -/* - * This function returns the number of fans. If we call it the second time - * and we have allocated memory for sc->sc_fans, we fill in the properties. - */ -static int -fcu_fill_fan_prop(device_t dev) -{ - phandle_t child; - struct fcu_softc *sc; - u_int id[12]; - char location[144]; - char type[96]; - int i = 0, j, len = 0, prop_len, prev_len = 0; - - sc = device_get_softc(dev); - - child = ofw_bus_get_node(dev); - - /* Fill the fan location property. */ - prop_len = OF_getprop(child, "hwctrl-location", location, - sizeof(location)); - while (len < prop_len) { - if (sc->sc_fans != NULL) { - strcpy(sc->sc_fans[i].fan.name, location + len); - } - prev_len = strlen(location + len) + 1; - len += prev_len; - i++; - } - if (sc->sc_fans == NULL) - return (i); - - /* Fill the fan type property. */ - len = 0; - i = 0; - prev_len = 0; - prop_len = OF_getprop(child, "hwctrl-type", type, sizeof(type)); - while (len < prop_len) { - if (strcmp(type + len, "fan-rpm") == 0) - sc->sc_fans[i].type = FCU_FAN_RPM; - else - sc->sc_fans[i].type = FCU_FAN_PWM; - prev_len = strlen(type + len) + 1; - len += prev_len; - i++; - } - - /* Fill the fan ID property. */ - prop_len = OF_getprop(child, "hwctrl-id", id, sizeof(id)); - for (j = 0; j < i; j++) - sc->sc_fans[j].id = ((id[j] >> 8) & 0x0f) % 8; - - /* Fill the fan zone property. */ - prop_len = OF_getprop(child, "hwctrl-zone", id, sizeof(id)); - for (j = 0; j < i; j++) - sc->sc_fans[j].fan.zone = id[j]; - - /* Finish setting up fan properties */ - for (j = 0; j < i; j++) { - sc->sc_fans[j].dev = sc->sc_dev; - if (sc->sc_fans[j].type == FCU_FAN_RPM) { - sc->sc_fans[j].fan.min_rpm = 4800 >> fcu_rpm_shift; - sc->sc_fans[j].fan.max_rpm = 56000 >> fcu_rpm_shift; - sc->sc_fans[j].setpoint = - fcu_fan_get_rpm(&sc->sc_fans[j]); - sc->sc_fans[j].fan.read = - (int (*)(struct pmac_fan *))(fcu_fan_get_rpm); - sc->sc_fans[j].fan.set = - (int (*)(struct pmac_fan *, int))(fcu_fan_set_rpm); - } else { - sc->sc_fans[j].fan.min_rpm = 30; /* Percent */ - sc->sc_fans[j].fan.max_rpm = 100; - sc->sc_fans[j].fan.read = NULL; - sc->sc_fans[j].fan.set = - (int (*)(struct pmac_fan *, int))(fcu_fan_set_pwm); - } - sc->sc_fans[j].fan.default_rpm = sc->sc_fans[j].fan.max_rpm; - } - - return (i); -} - -static int -fcu_fanrpm_sysctl(SYSCTL_HANDLER_ARGS) -{ - device_t fcu; - struct fcu_softc *sc; - struct fcu_fan *fan; - int rpm = 0, pwm = 0, error = 0; - - fcu = arg1; - sc = device_get_softc(fcu); - fan = &sc->sc_fans[arg2 & 0x00ff]; - if (fan->type == FCU_FAN_RPM) { - rpm = fcu_fan_get_rpm(fan); - if (rpm < 0) - return (EIO); - error = sysctl_handle_int(oidp, &rpm, 0, req); - } else { - error = fcu_fan_get_pwm(fcu, fan, &pwm, &rpm); - if (error < 0) - return (EIO); - - switch (arg2 & 0xff00) { - case FCU_PWM_SYSCTL_PWM: - error = sysctl_handle_int(oidp, &pwm, 0, req); - break; - case FCU_PWM_SYSCTL_RPM: - error = sysctl_handle_int(oidp, &rpm, 0, req); - break; - default: - /* This should never happen */ - return (EINVAL); - } - } - - /* We can only read the RPM from a PWM controlled fan, so return. */ - if ((arg2 & 0xff00) == FCU_PWM_SYSCTL_RPM) - return (0); - - if (error || !req->newptr) - return (error); - - if (fan->type == FCU_FAN_RPM) - return (fcu_fan_set_rpm(fan, rpm)); - else - return (fcu_fan_set_pwm(fan, pwm)); -} - -static void -fcu_attach_fans(device_t dev) -{ - struct fcu_softc *sc; - struct sysctl_oid *oid, *fanroot_oid; - struct sysctl_ctx_list *ctx; - char sysctl_name[32]; - int i, j; - - sc = device_get_softc(dev); - - sc->sc_nfans = 0; - - /* Count the actual number of fans. */ - sc->sc_nfans = fcu_fill_fan_prop(dev); - - device_printf(dev, "%d fans detected!\n", sc->sc_nfans); - - if (sc->sc_nfans == 0) { - device_printf(dev, "WARNING: No fans detected!\n"); - return; - } - - sc->sc_fans = malloc(sc->sc_nfans * sizeof(struct fcu_fan), M_FCU, - M_WAITOK | M_ZERO); - - ctx = device_get_sysctl_ctx(dev); - fanroot_oid = SYSCTL_ADD_NODE(ctx, - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "fans", - CTLFLAG_RD | CTLFLAG_MPSAFE, 0, "FCU Fan Information"); - - /* Now we can fill the properties into the allocated struct. */ - sc->sc_nfans = fcu_fill_fan_prop(dev); - - /* Register fans with pmac_thermal */ - for (i = 0; i < sc->sc_nfans; i++) - pmac_thermal_fan_register(&sc->sc_fans[i].fan); - - /* Add sysctls for the fans. */ - for (i = 0; i < sc->sc_nfans; i++) { - for (j = 0; j < strlen(sc->sc_fans[i].fan.name); j++) { - sysctl_name[j] = tolower(sc->sc_fans[i].fan.name[j]); - if (isspace(sysctl_name[j])) - sysctl_name[j] = '_'; - } - sysctl_name[j] = 0; - - if (sc->sc_fans[i].type == FCU_FAN_RPM) { - oid = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(fanroot_oid), - OID_AUTO, sysctl_name, CTLFLAG_RD | CTLFLAG_MPSAFE, - 0, "Fan Information"); - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "minrpm", CTLFLAG_RD, - &(sc->sc_fans[i].fan.min_rpm), 0, - "Minimum allowed RPM"); - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "maxrpm", CTLFLAG_RD, - &(sc->sc_fans[i].fan.max_rpm), 0, - "Maximum allowed RPM"); - /* I use i to pass the fan id. */ - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "rpm", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, - dev, i, fcu_fanrpm_sysctl, "I", "Fan RPM"); - } else { - fcu_fan_get_pwm(dev, &sc->sc_fans[i], - &sc->sc_fans[i].setpoint, - &sc->sc_fans[i].rpm); - - oid = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(fanroot_oid), - OID_AUTO, sysctl_name, CTLFLAG_RD | CTLFLAG_MPSAFE, - 0, "Fan Information"); - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "minpwm", CTLFLAG_RD, - &(sc->sc_fans[i].fan.min_rpm), 0, - "Minimum allowed PWM in %"); - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "maxpwm", CTLFLAG_RD, - &(sc->sc_fans[i].fan.max_rpm), 0, - "Maximum allowed PWM in %"); - /* I use i to pass the fan id or'ed with the type - * of info I want to display/modify. - */ - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "pwm", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, - dev, FCU_PWM_SYSCTL_PWM | i, fcu_fanrpm_sysctl, "I", - "Fan PWM in %"); - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "rpm", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, - dev, FCU_PWM_SYSCTL_RPM | i, fcu_fanrpm_sysctl, "I", - "Fan RPM"); - } - } - - /* Dump fan location, type & RPM. */ - if (bootverbose) { - device_printf(dev, "Fans\n"); - for (i = 0; i < sc->sc_nfans; i++) { - device_printf(dev, "Location: %s type: %d ID: %d " - "RPM: %d\n", sc->sc_fans[i].fan.name, - sc->sc_fans[i].type, sc->sc_fans[i].id, - (sc->sc_fans[i].type == FCU_FAN_RPM) ? - sc->sc_fans[i].setpoint : - sc->sc_fans[i].rpm ); - } - } -} diff --git a/sys/powerpc/powermac/grackle.c b/sys/powerpc/powermac/grackle.c deleted file mode 100644 index 2e9b03c75f3..00000000000 --- a/sys/powerpc/powermac/grackle.c +++ /dev/null @@ -1,321 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2003 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include "pcib_if.h" - -/* - * Device interface. - */ -static int grackle_probe(device_t); -static int grackle_attach(device_t); - -/* - * pcib interface. - */ -static u_int32_t grackle_read_config(device_t, u_int, u_int, u_int, - u_int, int); -static void grackle_write_config(device_t, u_int, u_int, u_int, - u_int, u_int32_t, int); - -/* - * Local routines. - */ -static int grackle_enable_config(struct grackle_softc *, u_int, - u_int, u_int, u_int); -static void grackle_disable_config(struct grackle_softc *); -static int badaddr(void *, size_t); - -/* - * Driver methods. - */ -static device_method_t grackle_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, grackle_probe), - DEVMETHOD(device_attach, grackle_attach), - - /* pcib interface */ - DEVMETHOD(pcib_read_config, grackle_read_config), - DEVMETHOD(pcib_write_config, grackle_write_config), - - DEVMETHOD_END -}; - -static devclass_t grackle_devclass; -DEFINE_CLASS_1(pcib, grackle_driver, grackle_methods, - sizeof(struct grackle_softc), ofw_pci_driver); -DRIVER_MODULE(grackle, ofwbus, grackle_driver, grackle_devclass, 0, 0); - -static int -grackle_probe(device_t dev) -{ - const char *type, *compatible; - - type = ofw_bus_get_type(dev); - compatible = ofw_bus_get_compat(dev); - - if (type == NULL || compatible == NULL) - return (ENXIO); - - if (strcmp(type, "pci") != 0 || strcmp(compatible, "grackle") != 0) - return (ENXIO); - - device_set_desc(dev, "MPC106 (Grackle) Host-PCI bridge"); - return (0); -} - -static int -grackle_attach(device_t dev) -{ - struct grackle_softc *sc; - - sc = device_get_softc(dev); - - /* - * The Grackle PCI config addr/data registers are actually in - * PCI space, but since they are needed to actually probe the - * PCI bus, use the fact that they are also available directly - * on the processor bus and map them - */ - sc->sc_addr = (vm_offset_t)pmap_mapdev(GRACKLE_ADDR, PAGE_SIZE); - sc->sc_data = (vm_offset_t)pmap_mapdev(GRACKLE_DATA, PAGE_SIZE); - - return (ofw_pci_attach(dev)); -} - -static u_int32_t -grackle_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, - int width) -{ - struct grackle_softc *sc; - vm_offset_t caoff; - u_int32_t retval = 0xffffffff; - - sc = device_get_softc(dev); - caoff = sc->sc_data + (reg & 0x03); - - if (grackle_enable_config(sc, bus, slot, func, reg) != 0) { - /* - * Config probes to non-existent devices on the - * secondary bus generates machine checks. Be sure - * to catch these. - */ - if (bus > 0) { - if (badaddr((void *)sc->sc_data, 4)) { - return (retval); - } - } - - switch (width) { - case 1: - retval = (in8rb(caoff)); - break; - case 2: - retval = (in16rb(caoff)); - break; - case 4: - retval = (in32rb(caoff)); - break; - } - } - grackle_disable_config(sc); - - return (retval); -} - -static void -grackle_write_config(device_t dev, u_int bus, u_int slot, u_int func, - u_int reg, u_int32_t val, int width) -{ - struct grackle_softc *sc; - vm_offset_t caoff; - - sc = device_get_softc(dev); - caoff = sc->sc_data + (reg & 0x03); - - if (grackle_enable_config(sc, bus, slot, func, reg)) { - switch (width) { - case 1: - out8rb(caoff, val); - (void)in8rb(caoff); - break; - case 2: - out16rb(caoff, val); - (void)in16rb(caoff); - break; - case 4: - out32rb(caoff, val); - (void)in32rb(caoff); - break; - } - } - grackle_disable_config(sc); -} - -static int -grackle_enable_config(struct grackle_softc *sc, u_int bus, u_int slot, - u_int func, u_int reg) -{ - u_int32_t cfgval; - - /* - * Unlike UniNorth, the format of the config word is the same - * for local (0) and remote busses. - */ - cfgval = (bus << 16) | (slot << 11) | (func << 8) | (reg & 0xFC) - | GRACKLE_CFG_ENABLE; - - out32rb(sc->sc_addr, cfgval); - (void) in32rb(sc->sc_addr); - - return (1); -} - -static void -grackle_disable_config(struct grackle_softc *sc) -{ - /* - * Clear the GRACKLE_CFG_ENABLE bit to prevent stray - * accesses from causing config cycles - */ - out32rb(sc->sc_addr, 0); -} - -static int -badaddr(void *addr, size_t size) -{ - struct thread *td; - jmp_buf env, *oldfaultbuf; - int x; - - /* Get rid of any stale machine checks that have been waiting. */ - __asm __volatile ("sync; isync"); - - td = curthread; - - oldfaultbuf = td->td_pcb->pcb_onfault; - td->td_pcb->pcb_onfault = &env; - if (setjmp(env)) { - td->td_pcb->pcb_onfault = oldfaultbuf; - __asm __volatile ("sync"); - return 1; - } - - __asm __volatile ("sync"); - - switch (size) { - case 1: - x = *(volatile int8_t *)addr; - break; - case 2: - x = *(volatile int16_t *)addr; - break; - case 4: - x = *(volatile int32_t *)addr; - break; - default: - panic("badaddr: invalid size (%zd)", size); - } - - /* Make sure we took the machine check, if we caused one. */ - __asm __volatile ("sync; isync"); - - td->td_pcb->pcb_onfault = oldfaultbuf; - __asm __volatile ("sync"); /* To be sure. */ - - return (0); -} - -/* - * Driver to swallow Grackle host bridges from the PCI bus side. - */ -static int -grackle_hb_probe(device_t dev) -{ - - if (pci_get_devid(dev) == 0x00021057) { - device_set_desc(dev, "Grackle Host to PCI bridge"); - device_quiet(dev); - return (0); - } - - return (ENXIO); -} - -static int -grackle_hb_attach(device_t dev) -{ - - return (0); -} - -static device_method_t grackle_hb_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, grackle_hb_probe), - DEVMETHOD(device_attach, grackle_hb_attach), - { 0, 0 } -}; - -static driver_t grackle_hb_driver = { - "grackle_hb", - grackle_hb_methods, - 1, -}; -static devclass_t grackle_hb_devclass; - -DRIVER_MODULE(grackle_hb, pci, grackle_hb_driver, grackle_hb_devclass, 0, 0); diff --git a/sys/powerpc/powermac/gracklevar.h b/sys/powerpc/powermac/gracklevar.h deleted file mode 100644 index c6339ce77e5..00000000000 --- a/sys/powerpc/powermac/gracklevar.h +++ /dev/null @@ -1,51 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2003 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _POWERPC_POWERMAC_GRACKLEVAR_H_ -#define _POWERPC_POWERMAC_GRACKLEVAR_H_ - -struct grackle_softc { - struct ofw_pci_softc pci_sc; - vm_offset_t sc_addr; - vm_offset_t sc_data; -}; - -/* - * Apple uses address map B for the MPC106 - */ -#define GRACKLE_ADDR 0xFEC00000 -#define GRACKLE_DATA 0xFEE00000 - -/* - * The high bit of the config word is 'Enable'. This should always be - * set. - */ -#define GRACKLE_CFG_ENABLE 0x80000000 - -#endif /* _POWERPC_POWERMAC_GRACKLEVAR_H_ */ diff --git a/sys/powerpc/powermac/hrowpic.c b/sys/powerpc/powermac/hrowpic.c deleted file mode 100644 index fd25f7cff52..00000000000 --- a/sys/powerpc/powermac/hrowpic.c +++ /dev/null @@ -1,280 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2003 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * A driver for the PIC found in the Heathrow/Paddington MacIO chips. - * This was superseded by an OpenPIC in the Keylargo and beyond - * MacIO versions. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include "pic_if.h" - -/* - * MacIO interface - */ -static int hrowpic_probe(device_t); -static int hrowpic_attach(device_t); - -static void hrowpic_dispatch(device_t, struct trapframe *); -static void hrowpic_enable(device_t, u_int, u_int, void **); -static void hrowpic_eoi(device_t, u_int, void *); -static void hrowpic_ipi(device_t, u_int); -static void hrowpic_mask(device_t, u_int, void *); -static void hrowpic_unmask(device_t, u_int, void *); - -static device_method_t hrowpic_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, hrowpic_probe), - DEVMETHOD(device_attach, hrowpic_attach), - - /* PIC interface */ - DEVMETHOD(pic_dispatch, hrowpic_dispatch), - DEVMETHOD(pic_enable, hrowpic_enable), - DEVMETHOD(pic_eoi, hrowpic_eoi), - DEVMETHOD(pic_ipi, hrowpic_ipi), - DEVMETHOD(pic_mask, hrowpic_mask), - DEVMETHOD(pic_unmask, hrowpic_unmask), - - { 0, 0 }, -}; - -static driver_t hrowpic_driver = { - "hrowpic", - hrowpic_methods, - sizeof(struct hrowpic_softc) -}; - -static devclass_t hrowpic_devclass; - -DRIVER_MODULE(hrowpic, macio, hrowpic_driver, hrowpic_devclass, 0, 0); - -static uint32_t -hrowpic_read_reg(struct hrowpic_softc *sc, u_int reg, u_int bank) -{ - if (bank == HPIC_PRIMARY) - reg += HPIC_1ST_OFFSET; - - return (bus_space_read_4(sc->sc_bt, sc->sc_bh, reg)); -} - -static void -hrowpic_write_reg(struct hrowpic_softc *sc, u_int reg, u_int bank, - uint32_t val) -{ - - if (bank == HPIC_PRIMARY) - reg += HPIC_1ST_OFFSET; - - bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val); - - /* XXX Issue a read to force the write to complete. */ - bus_space_read_4(sc->sc_bt, sc->sc_bh, reg); -} - -static int -hrowpic_probe(device_t dev) -{ - const char *type = ofw_bus_get_type(dev); - - /* - * OpenPIC cells have a type of "open-pic", so this - * is sufficient to identify a Heathrow cell - */ - if (strcmp(type, "interrupt-controller") != 0) - return (ENXIO); - - /* - * The description was already printed out in the nexus - * probe, so don't do it again here - */ - device_set_desc(dev, "Heathrow MacIO interrupt controller"); - return (0); -} - -static int -hrowpic_attach(device_t dev) -{ - struct hrowpic_softc *sc; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - - sc->sc_rrid = 0; - sc->sc_rres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rrid, - RF_ACTIVE); - - if (sc->sc_rres == NULL) { - device_printf(dev, "Could not alloc mem resource!\n"); - return (ENXIO); - } - - sc->sc_bt = rman_get_bustag(sc->sc_rres); - sc->sc_bh = rman_get_bushandle(sc->sc_rres); - - /* - * Disable all interrupt sources and clear outstanding interrupts - */ - hrowpic_write_reg(sc, HPIC_ENABLE, HPIC_PRIMARY, 0); - hrowpic_write_reg(sc, HPIC_CLEAR, HPIC_PRIMARY, 0xffffffff); - hrowpic_write_reg(sc, HPIC_ENABLE, HPIC_SECONDARY, 0); - hrowpic_write_reg(sc, HPIC_CLEAR, HPIC_SECONDARY, 0xffffffff); - - powerpc_register_pic(dev, ofw_bus_get_node(dev), 64, 0, FALSE); - return (0); -} - -/* - * Local routines - */ - -static void -hrowpic_toggle_irq(struct hrowpic_softc *sc, int irq, int enable) -{ - u_int roffset; - u_int rbit; - - KASSERT((irq > 0) && (irq <= HROWPIC_IRQMAX), ("en irq out of range")); - - /* - * Humor the SMP layer if it wants to set up an IPI handler. - */ - if (irq == HROWPIC_IRQMAX) - return; - - /* - * Calculate prim/sec register bank for the IRQ, update soft copy, - * and enable the IRQ as an interrupt source - */ - roffset = HPIC_INT_TO_BANK(irq); - rbit = HPIC_INT_TO_REGBIT(irq); - - if (enable) - sc->sc_softreg[roffset] |= (1 << rbit); - else - sc->sc_softreg[roffset] &= ~(1 << rbit); - - hrowpic_write_reg(sc, HPIC_ENABLE, roffset, sc->sc_softreg[roffset]); -} - -/* - * PIC I/F methods. - */ - -static void -hrowpic_dispatch(device_t dev, struct trapframe *tf) -{ - struct hrowpic_softc *sc; - uint64_t mask; - uint32_t reg; - u_int irq; - - sc = device_get_softc(dev); - while (1) { - mask = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_SECONDARY); - reg = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_PRIMARY); - mask = (mask << 32) | reg; - if (mask == 0) - break; - - irq = 0; - while (irq < HROWPIC_IRQMAX) { - if (mask & 1) - powerpc_dispatch_intr(sc->sc_vector[irq], tf); - mask >>= 1; - irq++; - } - } -} - -static void -hrowpic_enable(device_t dev, u_int irq, u_int vector, void **priv __unused) -{ - struct hrowpic_softc *sc; - - sc = device_get_softc(dev); - sc->sc_vector[irq] = vector; - hrowpic_toggle_irq(sc, irq, 1); -} - -static void -hrowpic_eoi(device_t dev, u_int irq, void *priv __unused) -{ - struct hrowpic_softc *sc; - int bank; - - sc = device_get_softc(dev); - bank = (irq >= 32) ? HPIC_SECONDARY : HPIC_PRIMARY ; - hrowpic_write_reg(sc, HPIC_CLEAR, bank, 1U << (irq & 0x1f)); -} - -static void -hrowpic_ipi(device_t dev, u_int irq) -{ - /* No SMP support. */ -} - -static void -hrowpic_mask(device_t dev, u_int irq, void *priv __unused) -{ - struct hrowpic_softc *sc; - - sc = device_get_softc(dev); - hrowpic_toggle_irq(sc, irq, 0); -} - -static void -hrowpic_unmask(device_t dev, u_int irq, void *priv __unused) -{ - struct hrowpic_softc *sc; - - sc = device_get_softc(dev); - hrowpic_toggle_irq(sc, irq, 1); -} diff --git a/sys/powerpc/powermac/hrowpicvar.h b/sys/powerpc/powermac/hrowpicvar.h deleted file mode 100644 index 478239beef7..00000000000 --- a/sys/powerpc/powermac/hrowpicvar.h +++ /dev/null @@ -1,75 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2003 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _POWERPC_POWERMAC_HROWPICVAR_H_ -#define _POWERPC_POWERMAC_HROWPICVAR_H_ - -#define HROWPIC_IRQMAX 64 -#define HROWPIC_IRQ_REGNUM 32 /* irqs per register */ -#define HROWPIC_IRQ_SHIFT 5 /* high or low irq word */ -#define HROWPIC_IRQ_MASK ((HROWPIC_IRQMAX-1) >> 1) /* irq bit pos in word */ - -/* - * Register offsets within bank. There are two identical banks, - * separated by 16 bytes. Interrupts 0->31 are processed in the - * second bank, and 32->63 in the first bank. - */ -#define HPIC_STATUS 0x00 /* active interrupt sources */ -#define HPIC_ENABLE 0x04 /* interrupt asserts ppc EXTINT */ -#define HPIC_CLEAR 0x08 /* clear int source */ -#define HPIC_TRIGGER 0x0c /* edge/level int trigger */ - -#define HPIC_PRIMARY 1 /* primary register bank */ -#define HPIC_SECONDARY 0 /* secondary register bank */ - -/* - * Convert an interrupt into a prim/sec bank number - */ -#define HPIC_INT_TO_BANK(x) \ - (((x) >> HROWPIC_IRQ_SHIFT) ^ 1) - -/* - * Convert an interrupt into the bit number within a bank register - */ -#define HPIC_INT_TO_REGBIT(x) \ - ((x) & HROWPIC_IRQ_MASK) - -#define HPIC_1ST_OFFSET 0x10 /* offset to primary reg bank */ - -struct hrowpic_softc { - device_t sc_dev; /* macio device */ - struct resource *sc_rres; /* macio bus resource */ - bus_space_tag_t sc_bt; /* macio bus tag/handle */ - bus_space_handle_t sc_bh; - int sc_rrid; - uint32_t sc_softreg[2]; /* ENABLE reg copy */ - u_int sc_vector[HROWPIC_IRQMAX]; -}; - -#endif /* _POWERPC_POWERMAC_HROWPICVAR_H_ */ diff --git a/sys/powerpc/powermac/kiic.c b/sys/powerpc/powermac/kiic.c deleted file mode 100644 index a90ba8a7a4e..00000000000 --- a/sys/powerpc/powermac/kiic.c +++ /dev/null @@ -1,442 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2001 Tsubai Masanari. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * NetBSD: ki2c.c,v 1.11 2007/12/06 17:00:33 ad Exp - * Id: ki2c.c,v 1.7 2002/10/05 09:56:05 tsubai Exp - */ - -/* - * Support routines for the Keywest I2C controller. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include "iicbus_if.h" - -/* Keywest I2C Register offsets */ -#define MODE 0 -#define CONTROL 1 -#define STATUS 2 -#define ISR 3 -#define IER 4 -#define ADDR 5 -#define SUBADDR 6 -#define DATA 7 -#define REV 8 - -/* MODE */ -#define I2C_SPEED 0x03 /* Speed mask */ -#define I2C_100kHz 0x00 -#define I2C_50kHz 0x01 -#define I2C_25kHz 0x02 -#define I2C_MODE 0x0c /* Mode mask */ -#define I2C_DUMBMODE 0x00 /* Dumb mode */ -#define I2C_STDMODE 0x04 /* Standard mode */ -#define I2C_STDSUBMODE 0x08 /* Standard mode + sub address */ -#define I2C_COMBMODE 0x0c /* Combined mode */ -#define I2C_PORT 0xf0 /* Port mask */ - -/* CONTROL */ -#define I2C_CT_AAK 0x01 /* Send AAK */ -#define I2C_CT_ADDR 0x02 /* Send address(es) */ -#define I2C_CT_STOP 0x04 /* Send STOP */ -#define I2C_CT_START 0x08 /* Send START */ - -/* STATUS */ -#define I2C_ST_BUSY 0x01 /* Busy */ -#define I2C_ST_LASTAAK 0x02 /* Last AAK */ -#define I2C_ST_LASTRW 0x04 /* Last R/W */ -#define I2C_ST_SDA 0x08 /* SDA */ -#define I2C_ST_SCL 0x10 /* SCL */ - -/* ISR/IER */ -#define I2C_INT_DATA 0x01 /* Data byte sent/received */ -#define I2C_INT_ADDR 0x02 /* Address sent */ -#define I2C_INT_STOP 0x04 /* STOP condition sent */ -#define I2C_INT_START 0x08 /* START condition sent */ - -/* I2C flags */ -#define I2C_BUSY 0x01 -#define I2C_READING 0x02 -#define I2C_ERROR 0x04 -#define I2C_SELECTED 0x08 - -struct kiic_softc { - device_t sc_dev; - phandle_t sc_node; - struct mtx sc_mutex; - struct resource *sc_reg; - int sc_irqrid; - struct resource *sc_irq; - void *sc_ih; - u_int sc_regstep; - u_int sc_flags; - u_char *sc_data; - int sc_resid; - uint16_t sc_i2c_base; - device_t sc_iicbus; -}; - -static int kiic_probe(device_t dev); -static int kiic_attach(device_t dev); -static void kiic_writereg(struct kiic_softc *sc, u_int, u_int); -static u_int kiic_readreg(struct kiic_softc *, u_int); -static void kiic_setport(struct kiic_softc *, u_int); -static void kiic_setmode(struct kiic_softc *, u_int); -static void kiic_setspeed(struct kiic_softc *, u_int); -static void kiic_intr(void *xsc); -static int kiic_transfer(device_t dev, struct iic_msg *msgs, - uint32_t nmsgs); -static phandle_t kiic_get_node(device_t bus, device_t dev); - -static device_method_t kiic_methods[] = { - /* device interface */ - DEVMETHOD(device_probe, kiic_probe), - DEVMETHOD(device_attach, kiic_attach), - - /* iicbus interface */ - DEVMETHOD(iicbus_callback, iicbus_null_callback), - DEVMETHOD(iicbus_transfer, kiic_transfer), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_node, kiic_get_node), - { 0, 0 } -}; - -static driver_t kiic_driver = { - "iichb", - kiic_methods, - sizeof(struct kiic_softc) -}; -static devclass_t kiic_devclass; - -DRIVER_MODULE(kiic, macio, kiic_driver, kiic_devclass, 0, 0); -DRIVER_MODULE(kiic, unin, kiic_driver, kiic_devclass, 0, 0); - -static int -kiic_probe(device_t self) -{ - const char *name; - - name = ofw_bus_get_name(self); - if (name && strcmp(name, "i2c") == 0) { - device_set_desc(self, "Keywest I2C controller"); - return (0); - } - - return (ENXIO); -} - -static int -kiic_attach(device_t self) -{ - struct kiic_softc *sc = device_get_softc(self); - int rid, rate; - phandle_t node; - char name[64]; - - bzero(sc, sizeof(*sc)); - sc->sc_dev = self; - - node = ofw_bus_get_node(self); - if (node == 0 || node == -1) { - return (EINVAL); - } - - rid = 0; - sc->sc_reg = bus_alloc_resource_any(self, SYS_RES_MEMORY, - &rid, RF_ACTIVE); - if (sc->sc_reg == NULL) { - return (ENOMEM); - } - - if (OF_getencprop(node, "AAPL,i2c-rate", &rate, 4) != 4) { - device_printf(self, "cannot get i2c-rate\n"); - return (ENXIO); - } - if (OF_getencprop(node, "AAPL,address-step", &sc->sc_regstep, 4) != 4) { - device_printf(self, "unable to find i2c address step\n"); - return (ENXIO); - } - - /* - * Some Keywest I2C devices have their children attached directly - * underneath them. Some have a single 'iicbus' child with the - * devices underneath that. Sort this out, and make sure that the - * OFW I2C layer has the correct node. - * - * Note: the I2C children of the Uninorth bridges have two ports. - * In general, the port is designated in the 9th bit of the I2C - * address. However, for kiic devices with children attached below - * an i2c-bus node, the port is indicated in the 'reg' property - * of the i2c-bus node. - */ - - sc->sc_node = node; - - node = OF_child(node); - if (OF_getprop(node, "name", name, sizeof(name)) > 0) { - if (strcmp(name,"i2c-bus") == 0) { - phandle_t reg; - if (OF_getprop(node, "reg", ®, sizeof(reg)) > 0) - sc->sc_i2c_base = reg << 8; - - sc->sc_node = node; - } - } - - mtx_init(&sc->sc_mutex, "kiic", NULL, MTX_DEF); - - sc->sc_irq = bus_alloc_resource_any(self, SYS_RES_IRQ, &sc->sc_irqrid, - RF_ACTIVE); - bus_setup_intr(self, sc->sc_irq, INTR_TYPE_MISC | INTR_MPSAFE, NULL, - kiic_intr, sc, &sc->sc_ih); - - kiic_writereg(sc, ISR, kiic_readreg(sc, ISR)); - kiic_writereg(sc, STATUS, 0); - kiic_writereg(sc, IER, 0); - - kiic_setmode(sc, I2C_STDMODE); - kiic_setspeed(sc, I2C_100kHz); /* XXX rate */ - - kiic_writereg(sc, IER, I2C_INT_DATA | I2C_INT_ADDR | I2C_INT_STOP); - - if (bootverbose) - device_printf(self, "Revision: %02X\n", kiic_readreg(sc, REV)); - - /* Add the IIC bus layer */ - sc->sc_iicbus = device_add_child(self, "iicbus", -1); - - return (bus_generic_attach(self)); -} - -static void -kiic_writereg(struct kiic_softc *sc, u_int reg, u_int val) -{ - bus_write_4(sc->sc_reg, sc->sc_regstep * reg, val); - DELAY(100); /* register access delay */ -} - -static u_int -kiic_readreg(struct kiic_softc *sc, u_int reg) -{ - return bus_read_4(sc->sc_reg, sc->sc_regstep * reg) & 0xff; -} - -static void -kiic_setmode(struct kiic_softc *sc, u_int mode) -{ - u_int x; - - KASSERT((mode & ~I2C_MODE) == 0, ("bad mode")); - x = kiic_readreg(sc, MODE); - x &= ~I2C_MODE; - x |= mode; - kiic_writereg(sc, MODE, x); -} - -static void -kiic_setport(struct kiic_softc *sc, u_int port) -{ - u_int x; - - KASSERT(port == 1 || port == 0, ("bad port")); - x = kiic_readreg(sc, MODE); - x &= ~I2C_PORT; - x |= (port << 4); - kiic_writereg(sc, MODE, x); -} - -static void -kiic_setspeed(struct kiic_softc *sc, u_int speed) -{ - u_int x; - - KASSERT((speed & ~I2C_SPEED) == 0, ("bad speed")); - x = kiic_readreg(sc, MODE); - x &= ~I2C_SPEED; - x |= speed; - kiic_writereg(sc, MODE, x); -} - -static void -kiic_intr(void *xsc) -{ - struct kiic_softc *sc = xsc; - u_int isr; - uint32_t x; - - mtx_lock(&sc->sc_mutex); - isr = kiic_readreg(sc, ISR); - - if (isr & I2C_INT_ADDR) { - sc->sc_flags |= I2C_SELECTED; - - if (sc->sc_flags & I2C_READING) { - if (sc->sc_resid > 1) { - x = kiic_readreg(sc, CONTROL); - x |= I2C_CT_AAK; - kiic_writereg(sc, CONTROL, x); - } - } else { - kiic_writereg(sc, DATA, *sc->sc_data++); - sc->sc_resid--; - } - } - - if (isr & I2C_INT_DATA) { - if (sc->sc_flags & I2C_READING) { - if (sc->sc_resid > 0) { - *sc->sc_data++ = kiic_readreg(sc, DATA); - sc->sc_resid--; - } - if (sc->sc_resid == 0) /* done */ - kiic_writereg(sc, CONTROL, 0); - } else { - if (sc->sc_resid == 0) { - x = kiic_readreg(sc, CONTROL); - x |= I2C_CT_STOP; - kiic_writereg(sc, CONTROL, x); - } else { - kiic_writereg(sc, DATA, *sc->sc_data++); - sc->sc_resid--; - } - } - } - - if (isr & I2C_INT_STOP) { - kiic_writereg(sc, CONTROL, 0); - sc->sc_flags &= ~I2C_SELECTED; - wakeup(sc->sc_dev); - } - - kiic_writereg(sc, ISR, isr); - mtx_unlock(&sc->sc_mutex); -} - -static int -kiic_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs) -{ - struct kiic_softc *sc; - int i, x, timo, err; - uint16_t addr; - uint8_t subaddr; - - sc = device_get_softc(dev); - timo = 100; - subaddr = 0; - - mtx_lock(&sc->sc_mutex); - - if (sc->sc_flags & I2C_BUSY) - mtx_sleep(dev, &sc->sc_mutex, 0, "kiic", timo); - - if (sc->sc_flags & I2C_BUSY) { - mtx_unlock(&sc->sc_mutex); - return (ETIMEDOUT); - } - - sc->sc_flags = I2C_BUSY; - - /* Clear pending interrupts, and reset controller */ - kiic_writereg(sc, ISR, kiic_readreg(sc, ISR)); - kiic_writereg(sc, STATUS, 0); - - for (i = 0; i < nmsgs; i++) { - if (msgs[i].flags & IIC_M_NOSTOP) { - if (msgs[i+1].flags & IIC_M_RD) - kiic_setmode(sc, I2C_COMBMODE); - else - kiic_setmode(sc, I2C_STDSUBMODE); - KASSERT(msgs[i].len == 1, ("oversize I2C message")); - subaddr = msgs[i].buf[0]; - i++; - } else { - kiic_setmode(sc, I2C_STDMODE); - } - - sc->sc_data = msgs[i].buf; - sc->sc_resid = msgs[i].len; - sc->sc_flags = I2C_BUSY; - addr = msgs[i].slave; - timo = 1000 + sc->sc_resid * 200; - timo += 100000; - - if (msgs[i].flags & IIC_M_RD) { - sc->sc_flags |= I2C_READING; - addr |= 1; - } - - addr |= sc->sc_i2c_base; - - kiic_setport(sc, (addr & 0x100) >> 8); - kiic_writereg(sc, ADDR, addr & 0xff); - kiic_writereg(sc, SUBADDR, subaddr); - - x = kiic_readreg(sc, CONTROL) | I2C_CT_ADDR; - kiic_writereg(sc, CONTROL, x); - - err = mtx_sleep(dev, &sc->sc_mutex, 0, "kiic", timo); - - msgs[i].len -= sc->sc_resid; - - if ((sc->sc_flags & I2C_ERROR) || err == EWOULDBLOCK) { - device_printf(sc->sc_dev, "I2C error\n"); - sc->sc_flags = 0; - mtx_unlock(&sc->sc_mutex); - return (EIO); - } - } - - sc->sc_flags = 0; - - mtx_unlock(&sc->sc_mutex); - - return (0); -} - -static phandle_t -kiic_get_node(device_t bus, device_t dev) -{ - struct kiic_softc *sc; - - sc = device_get_softc(bus); - /* We only have one child, the I2C bus, which needs our own node. */ - - return sc->sc_node; -} diff --git a/sys/powerpc/powermac/macgpio.c b/sys/powerpc/powermac/macgpio.c deleted file mode 100644 index 1d60a1a6155..00000000000 --- a/sys/powerpc/powermac/macgpio.c +++ /dev/null @@ -1,399 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2008 by Nathan Whitehorn. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Driver for MacIO GPIO controller - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include -#include - -#include - -/* - * Macgpio softc - */ -struct macgpio_softc { - phandle_t sc_node; - struct resource *sc_gpios; - int sc_gpios_rid; - uint32_t sc_saved_gpio_levels[2]; - uint32_t sc_saved_gpios[GPIO_COUNT]; - uint32_t sc_saved_extint_gpios[GPIO_EXTINT_COUNT]; -}; - -static MALLOC_DEFINE(M_MACGPIO, "macgpio", "macgpio device information"); - -static int macgpio_probe(device_t); -static int macgpio_attach(device_t); -static int macgpio_print_child(device_t dev, device_t child); -static void macgpio_probe_nomatch(device_t, device_t); -static struct resource *macgpio_alloc_resource(device_t, device_t, int, int *, - rman_res_t, rman_res_t, rman_res_t, u_int); -static int macgpio_activate_resource(device_t, device_t, int, int, - struct resource *); -static int macgpio_deactivate_resource(device_t, device_t, int, int, - struct resource *); -static ofw_bus_get_devinfo_t macgpio_get_devinfo; -static int macgpio_suspend(device_t dev); -static int macgpio_resume(device_t dev); - -/* - * Bus interface definition - */ -static device_method_t macgpio_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, macgpio_probe), - DEVMETHOD(device_attach, macgpio_attach), - DEVMETHOD(device_detach, bus_generic_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, macgpio_suspend), - DEVMETHOD(device_resume, macgpio_resume), - - /* Bus interface */ - DEVMETHOD(bus_print_child, macgpio_print_child), - DEVMETHOD(bus_probe_nomatch, macgpio_probe_nomatch), - DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - - DEVMETHOD(bus_alloc_resource, macgpio_alloc_resource), - DEVMETHOD(bus_activate_resource, macgpio_activate_resource), - DEVMETHOD(bus_deactivate_resource, macgpio_deactivate_resource), - DEVMETHOD(bus_release_resource, bus_generic_release_resource), - - DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_devinfo, macgpio_get_devinfo), - DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), - DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), - DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), - DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), - DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), - { 0, 0 } -}; - -static driver_t macgpio_pci_driver = { - "macgpio", - macgpio_methods, - sizeof(struct macgpio_softc) -}; - -devclass_t macgpio_devclass; - -EARLY_DRIVER_MODULE(macgpio, macio, macgpio_pci_driver, macgpio_devclass, 0, 0, - BUS_PASS_BUS); - -struct macgpio_devinfo { - struct ofw_bus_devinfo mdi_obdinfo; - struct resource_list mdi_resources; - - int gpio_num; -}; - -static int -macgpio_probe(device_t dev) -{ - const char *name; - - name = ofw_bus_get_name(dev); - if (name && strcmp(name, "gpio") == 0) { - device_set_desc(dev, "MacIO GPIO Controller"); - return (0); - } - - return (ENXIO); -} - -/* - * Scan Open Firmware child nodes, and attach these as children - * of the macgpio bus - */ -static int -macgpio_attach(device_t dev) -{ - struct macgpio_softc *sc; - struct macgpio_devinfo *dinfo; - phandle_t root, child, iparent; - device_t cdev; - uint32_t irq[2]; - - sc = device_get_softc(dev); - root = sc->sc_node = ofw_bus_get_node(dev); - - sc->sc_gpios = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->sc_gpios_rid, RF_ACTIVE); - - /* - * Iterate through the sub-devices - */ - for (child = OF_child(root); child != 0; child = OF_peer(child)) { - dinfo = malloc(sizeof(*dinfo), M_MACGPIO, M_WAITOK | M_ZERO); - if (ofw_bus_gen_setup_devinfo(&dinfo->mdi_obdinfo, child) != - 0) { - free(dinfo, M_MACGPIO); - continue; - } - - if (OF_getencprop(child, "reg", &dinfo->gpio_num, - sizeof(dinfo->gpio_num)) != sizeof(dinfo->gpio_num)) { - /* - * Some early GPIO controllers don't provide GPIO - * numbers for GPIOs designed only to provide - * interrupt resources. We should still allow these - * to attach, but with caution. - */ - - dinfo->gpio_num = -1; - } - - resource_list_init(&dinfo->mdi_resources); - - if (OF_getencprop(child, "interrupts", irq, sizeof(irq)) == - sizeof(irq)) { - OF_searchencprop(child, "interrupt-parent", &iparent, - sizeof(iparent)); - resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ, - 0, MAP_IRQ(iparent, irq[0]), - MAP_IRQ(iparent, irq[0]), 1); - } - - /* Fix messed-up offsets */ - if (dinfo->gpio_num > 0x50) - dinfo->gpio_num -= 0x50; - - cdev = device_add_child(dev, NULL, -1); - if (cdev == NULL) { - device_printf(dev, "<%s>: device_add_child failed\n", - dinfo->mdi_obdinfo.obd_name); - ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo); - free(dinfo, M_MACGPIO); - continue; - } - device_set_ivars(cdev, dinfo); - } - - return (bus_generic_attach(dev)); -} - -static int -macgpio_print_child(device_t dev, device_t child) -{ - struct macgpio_devinfo *dinfo; - int retval = 0; - - dinfo = device_get_ivars(child); - - retval += bus_print_child_header(dev, child); - - if (dinfo->gpio_num >= GPIO_BASE) - printf(" gpio %d", dinfo->gpio_num - GPIO_BASE); - else if (dinfo->gpio_num >= GPIO_EXTINT_BASE) - printf(" extint-gpio %d", dinfo->gpio_num - GPIO_EXTINT_BASE); - else if (dinfo->gpio_num >= 0) - printf(" addr 0x%02x", dinfo->gpio_num); /* should not happen */ - - resource_list_print_type(&dinfo->mdi_resources, "irq", SYS_RES_IRQ, - "%jd"); - retval += bus_print_child_footer(dev, child); - - return (retval); -} - -static void -macgpio_probe_nomatch(device_t dev, device_t child) -{ - struct macgpio_devinfo *dinfo; - const char *type; - - if (bootverbose) { - dinfo = device_get_ivars(child); - - if ((type = ofw_bus_get_type(child)) == NULL) - type = "(unknown)"; - device_printf(dev, "<%s, %s>", type, ofw_bus_get_name(child)); - if (dinfo->gpio_num >= 0) - printf(" gpio %d",dinfo->gpio_num); - resource_list_print_type(&dinfo->mdi_resources, "irq", - SYS_RES_IRQ, "%jd"); - printf(" (no driver attached)\n"); - } -} - -static struct resource * -macgpio_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, - u_int flags) -{ - struct macgpio_devinfo *dinfo; - - dinfo = device_get_ivars(child); - - if (type != SYS_RES_IRQ) - return (NULL); - - return (resource_list_alloc(&dinfo->mdi_resources, bus, child, type, - rid, start, end, count, flags)); -} - -static int -macgpio_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *res) -{ - struct macgpio_softc *sc; - struct macgpio_devinfo *dinfo; - u_char val; - - sc = device_get_softc(bus); - dinfo = device_get_ivars(child); - - if (type != SYS_RES_IRQ) - return ENXIO; - - if (dinfo->gpio_num >= 0) { - val = bus_read_1(sc->sc_gpios,dinfo->gpio_num); - val |= 0x80; - bus_write_1(sc->sc_gpios,dinfo->gpio_num,val); - } - - return (bus_activate_resource(bus, type, rid, res)); -} - -static int -macgpio_deactivate_resource(device_t bus, device_t child, int type, int rid, - struct resource *res) -{ - struct macgpio_softc *sc; - struct macgpio_devinfo *dinfo; - u_char val; - - sc = device_get_softc(bus); - dinfo = device_get_ivars(child); - - if (type != SYS_RES_IRQ) - return ENXIO; - - if (dinfo->gpio_num >= 0) { - val = bus_read_1(sc->sc_gpios,dinfo->gpio_num); - val &= ~0x80; - bus_write_1(sc->sc_gpios,dinfo->gpio_num,val); - } - - return (bus_deactivate_resource(bus, type, rid, res)); -} - -uint8_t -macgpio_read(device_t dev) -{ - struct macgpio_softc *sc; - struct macgpio_devinfo *dinfo; - - sc = device_get_softc(device_get_parent(dev)); - dinfo = device_get_ivars(dev); - - if (dinfo->gpio_num < 0) - return (0); - - return (bus_read_1(sc->sc_gpios,dinfo->gpio_num)); -} - -void -macgpio_write(device_t dev, uint8_t val) -{ - struct macgpio_softc *sc; - struct macgpio_devinfo *dinfo; - - sc = device_get_softc(device_get_parent(dev)); - dinfo = device_get_ivars(dev); - - if (dinfo->gpio_num < 0) - return; - - bus_write_1(sc->sc_gpios,dinfo->gpio_num,val); -} - -static const struct ofw_bus_devinfo * -macgpio_get_devinfo(device_t dev, device_t child) -{ - struct macgpio_devinfo *dinfo; - - dinfo = device_get_ivars(child); - return (&dinfo->mdi_obdinfo); -} - -static int -macgpio_suspend(device_t dev) -{ - struct macgpio_softc *sc; - int i; - - sc = device_get_softc(dev); - sc->sc_saved_gpio_levels[0] = bus_read_4(sc->sc_gpios, GPIO_LEVELS_0); - sc->sc_saved_gpio_levels[1] = bus_read_4(sc->sc_gpios, GPIO_LEVELS_1); - - for (i = 0; i < GPIO_COUNT; i++) - sc->sc_saved_gpios[i] = bus_read_1(sc->sc_gpios, GPIO_BASE + i); - for (i = 0; i < GPIO_EXTINT_COUNT; i++) - sc->sc_saved_extint_gpios[i] = bus_read_1(sc->sc_gpios, GPIO_EXTINT_BASE + i); - - return (0); -} - -static int -macgpio_resume(device_t dev) -{ - struct macgpio_softc *sc; - int i; - - sc = device_get_softc(dev); - bus_write_4(sc->sc_gpios, GPIO_LEVELS_0, sc->sc_saved_gpio_levels[0]); - bus_write_4(sc->sc_gpios, GPIO_LEVELS_1, sc->sc_saved_gpio_levels[1]); - - for (i = 0; i < GPIO_COUNT; i++) - bus_write_1(sc->sc_gpios, GPIO_BASE + i, sc->sc_saved_gpios[i]); - for (i = 0; i < GPIO_EXTINT_COUNT; i++) - bus_write_1(sc->sc_gpios, GPIO_EXTINT_BASE + i, sc->sc_saved_extint_gpios[i]); - - return (0); -} diff --git a/sys/powerpc/powermac/macgpiovar.h b/sys/powerpc/powermac/macgpiovar.h deleted file mode 100644 index beef0ed494d..00000000000 --- a/sys/powerpc/powermac/macgpiovar.h +++ /dev/null @@ -1,50 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2008 by Nathan Whitehorn. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACIO_MACGPIOVAR_H_ -#define _MACIO_MACGPIOVAR_H_ - -/* relative offsets into gpio space */ -#define GPIO_EXTINT_BASE 0x08 -#define GPIO_BASE 0x1a - -#define GPIO_EXTINT_COUNT 0x12 -#define GPIO_COUNT 0x11 - -#define GPIO_LEVELS_0 0x50 -#define GPIO_LEVELS_1 0x54 - -/* gpio bit definitions */ -#define GPIO_DATA 0x01 /* GPIO data */ -#define GPIO_LEVEL_RO 0x02 /* read-only level on pin */ -#define GPIO_DDR_INPUT 0x00 /* use for input */ -#define GPIO_DDR_OUTPUT 0x04 /* use for output */ - -uint8_t macgpio_read(device_t dev); -void macgpio_write(device_t dev,uint8_t); - -#endif /* _MACIO_MACGPIOVAR_H_ */ diff --git a/sys/powerpc/powermac/macio.c b/sys/powerpc/powermac/macio.c deleted file mode 100644 index 5c64960e931..00000000000 --- a/sys/powerpc/powermac/macio.c +++ /dev/null @@ -1,693 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2002 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Driver for KeyLargo/Pangea, the MacPPC south bridge ASIC. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include -#include - -/* - * Macio softc - */ -struct macio_softc { - phandle_t sc_node; - vm_offset_t sc_base; - vm_offset_t sc_size; - struct rman sc_mem_rman; - - /* FCR registers */ - int sc_memrid; - struct resource *sc_memr; -}; - -static MALLOC_DEFINE(M_MACIO, "macio", "macio device information"); - -static int macio_probe(device_t); -static int macio_attach(device_t); -static int macio_print_child(device_t dev, device_t child); -static void macio_probe_nomatch(device_t, device_t); -static struct resource *macio_alloc_resource(device_t, device_t, int, int *, - rman_res_t, rman_res_t, rman_res_t, - u_int); -static int macio_activate_resource(device_t, device_t, int, int, - struct resource *); -static int macio_deactivate_resource(device_t, device_t, int, int, - struct resource *); -static int macio_release_resource(device_t, device_t, int, int, - struct resource *); -static struct resource_list *macio_get_resource_list (device_t, device_t); -static ofw_bus_get_devinfo_t macio_get_devinfo; - -/* - * Bus interface definition - */ -static device_method_t macio_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, macio_probe), - DEVMETHOD(device_attach, macio_attach), - DEVMETHOD(device_detach, bus_generic_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* Bus interface */ - DEVMETHOD(bus_print_child, macio_print_child), - DEVMETHOD(bus_probe_nomatch, macio_probe_nomatch), - DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - - DEVMETHOD(bus_alloc_resource, macio_alloc_resource), - DEVMETHOD(bus_release_resource, macio_release_resource), - DEVMETHOD(bus_activate_resource, macio_activate_resource), - DEVMETHOD(bus_deactivate_resource, macio_deactivate_resource), - DEVMETHOD(bus_get_resource_list, macio_get_resource_list), - - DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_devinfo, macio_get_devinfo), - DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), - DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), - DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), - DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), - DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), - { 0, 0 } -}; - -static driver_t macio_pci_driver = { - "macio", - macio_methods, - sizeof(struct macio_softc) -}; - -devclass_t macio_devclass; - -EARLY_DRIVER_MODULE(macio, pci, macio_pci_driver, macio_devclass, 0, 0, - BUS_PASS_BUS); - -/* - * PCI ID search table - */ -static struct macio_pci_dev { - u_int32_t mpd_devid; - char *mpd_desc; -} macio_pci_devlist[] = { - { 0x0017106b, "Paddington I/O Controller" }, - { 0x0022106b, "KeyLargo I/O Controller" }, - { 0x0025106b, "Pangea I/O Controller" }, - { 0x003e106b, "Intrepid I/O Controller" }, - { 0x0041106b, "K2 KeyLargo I/O Controller" }, - { 0x004f106b, "Shasta I/O Controller" }, - { 0, NULL } -}; - -/* - * Devices to exclude from the probe - * XXX some of these may be required in the future... - */ -#define MACIO_QUIRK_IGNORE 0x00000001 -#define MACIO_QUIRK_CHILD_HAS_INTR 0x00000002 -#define MACIO_QUIRK_USE_CHILD_REG 0x00000004 - -struct macio_quirk_entry { - const char *mq_name; - int mq_quirks; -}; - -static struct macio_quirk_entry macio_quirks[] = { - { "escc-legacy", MACIO_QUIRK_IGNORE }, - { "timer", MACIO_QUIRK_IGNORE }, - { "escc", MACIO_QUIRK_CHILD_HAS_INTR }, - { "i2s", MACIO_QUIRK_CHILD_HAS_INTR | - MACIO_QUIRK_USE_CHILD_REG }, - { NULL, 0 } -}; - -static int -macio_get_quirks(const char *name) -{ - struct macio_quirk_entry *mqe; - - for (mqe = macio_quirks; mqe->mq_name != NULL; mqe++) - if (strcmp(name, mqe->mq_name) == 0) - return (mqe->mq_quirks); - return (0); -} - -/* - * Add an interrupt to the dev's resource list if present - */ -static void -macio_add_intr(phandle_t devnode, struct macio_devinfo *dinfo) -{ - phandle_t iparent; - int *intr; - int i, nintr; - int icells; - - if (dinfo->mdi_ninterrupts >= 6) { - printf("macio: device has more than 6 interrupts\n"); - return; - } - - nintr = OF_getprop_alloc_multi(devnode, "interrupts", sizeof(*intr), - (void **)&intr); - if (nintr == -1) { - nintr = OF_getprop_alloc_multi(devnode, "AAPL,interrupts", - sizeof(*intr), (void **)&intr); - if (nintr == -1) - return; - } - - if (intr[0] == -1) - return; - - if (OF_getprop(devnode, "interrupt-parent", &iparent, sizeof(iparent)) - <= 0) - panic("Interrupt but no interrupt parent!\n"); - - if (OF_getprop(OF_node_from_xref(iparent), "#interrupt-cells", &icells, - sizeof(icells)) <= 0) - icells = 1; - - for (i = 0; i < nintr; i+=icells) { - u_int irq = MAP_IRQ(iparent, intr[i]); - - resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ, - dinfo->mdi_ninterrupts, irq, irq, 1); - - dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = irq; - dinfo->mdi_ninterrupts++; - } -} - -static void -macio_add_reg(phandle_t devnode, struct macio_devinfo *dinfo) -{ - struct macio_reg *reg, *regp; - phandle_t child; - char buf[8]; - int i, layout_id = 0, nreg, res; - - nreg = OF_getprop_alloc_multi(devnode, "reg", sizeof(*reg), (void **)®); - if (nreg == -1) - return; - - /* - * Some G5's have broken properties in the i2s-a area. If so we try - * to fix it. Right now we know of two different cases, one for - * sound layout-id 36 and the other one for sound layout-id 76. - * What is missing is the base address for the memory addresses. - * We take them from the parent node (i2s) and use the size - * information from the child. - */ - - if (reg[0].mr_base == 0) { - child = OF_child(devnode); - while (child != 0) { - res = OF_getprop(child, "name", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "sound") == 0) - break; - child = OF_peer(child); - } - - res = OF_getprop(child, "layout-id", &layout_id, - sizeof(layout_id)); - - if (res > 0 && (layout_id == 36 || layout_id == 76)) { - res = OF_getprop_alloc_multi(OF_parent(devnode), "reg", - sizeof(*regp), (void **)®p); - reg[0] = regp[0]; - reg[1].mr_base = regp[1].mr_base; - reg[2].mr_base = regp[1].mr_base + reg[1].mr_size; - } - } - - for (i = 0; i < nreg; i++) { - resource_list_add(&dinfo->mdi_resources, SYS_RES_MEMORY, i, - reg[i].mr_base, reg[i].mr_base + reg[i].mr_size, - reg[i].mr_size); - } -} - -/* - * PCI probe - */ -static int -macio_probe(device_t dev) -{ - int i; - u_int32_t devid; - - devid = pci_get_devid(dev); - for (i = 0; macio_pci_devlist[i].mpd_desc != NULL; i++) { - if (devid == macio_pci_devlist[i].mpd_devid) { - device_set_desc(dev, macio_pci_devlist[i].mpd_desc); - return (0); - } - } - - return (ENXIO); -} - -/* - * PCI attach: scan Open Firmware child nodes, and attach these as children - * of the macio bus - */ -static int -macio_attach(device_t dev) -{ - struct macio_softc *sc; - struct macio_devinfo *dinfo; - phandle_t root; - phandle_t child; - phandle_t subchild; - device_t cdev; - u_int reg[3]; - char compat[32]; - int error, quirks; - - sc = device_get_softc(dev); - root = sc->sc_node = ofw_bus_get_node(dev); - - /* - * Locate the device node and it's base address - */ - if (OF_getprop(root, "assigned-addresses", - reg, sizeof(reg)) < (ssize_t)sizeof(reg)) { - return (ENXIO); - } - - /* Used later to see if we have to enable the I2S part. */ - OF_getprop(root, "compatible", compat, sizeof(compat)); - - sc->sc_base = reg[2]; - sc->sc_size = MACIO_REG_SIZE; - - sc->sc_memrid = PCIR_BAR(0); - sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->sc_memrid, RF_ACTIVE); - - sc->sc_mem_rman.rm_type = RMAN_ARRAY; - sc->sc_mem_rman.rm_descr = "MacIO Device Memory"; - error = rman_init(&sc->sc_mem_rman); - if (error) { - device_printf(dev, "rman_init() failed. error = %d\n", error); - return (error); - } - error = rman_manage_region(&sc->sc_mem_rman, 0, sc->sc_size); - if (error) { - device_printf(dev, - "rman_manage_region() failed. error = %d\n", error); - return (error); - } - - /* - * Iterate through the sub-devices - */ - for (child = OF_child(root); child != 0; child = OF_peer(child)) { - dinfo = malloc(sizeof(*dinfo), M_MACIO, M_WAITOK | M_ZERO); - if (ofw_bus_gen_setup_devinfo(&dinfo->mdi_obdinfo, child) != - 0) { - free(dinfo, M_MACIO); - continue; - } - quirks = macio_get_quirks(dinfo->mdi_obdinfo.obd_name); - if ((quirks & MACIO_QUIRK_IGNORE) != 0) { - ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo); - free(dinfo, M_MACIO); - continue; - } - resource_list_init(&dinfo->mdi_resources); - dinfo->mdi_ninterrupts = 0; - macio_add_intr(child, dinfo); - if ((quirks & MACIO_QUIRK_USE_CHILD_REG) != 0) - macio_add_reg(OF_child(child), dinfo); - else - macio_add_reg(child, dinfo); - if ((quirks & MACIO_QUIRK_CHILD_HAS_INTR) != 0) - for (subchild = OF_child(child); subchild != 0; - subchild = OF_peer(subchild)) - macio_add_intr(subchild, dinfo); - cdev = device_add_child(dev, NULL, -1); - if (cdev == NULL) { - device_printf(dev, "<%s>: device_add_child failed\n", - dinfo->mdi_obdinfo.obd_name); - resource_list_free(&dinfo->mdi_resources); - ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo); - free(dinfo, M_MACIO); - continue; - } - device_set_ivars(cdev, dinfo); - - /* Set FCRs to enable some devices */ - if (sc->sc_memr == NULL) - continue; - - if (strcmp(ofw_bus_get_name(cdev), "bmac") == 0 || - (ofw_bus_get_compat(cdev) != NULL && - strcmp(ofw_bus_get_compat(cdev), "bmac+") == 0)) { - uint32_t fcr; - - fcr = bus_read_4(sc->sc_memr, HEATHROW_FCR); - - fcr |= FCR_ENET_ENABLE & ~FCR_ENET_RESET; - bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); - DELAY(50000); - fcr |= FCR_ENET_RESET; - bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); - DELAY(50000); - fcr &= ~FCR_ENET_RESET; - bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); - DELAY(50000); - - bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); - } - - /* - * Make sure the I2S0 and the I2S0_CLK are enabled. - * On certain G5's they are not. - */ - if ((strcmp(ofw_bus_get_name(cdev), "i2s") == 0) && - (strcmp(compat, "K2-Keylargo") == 0)) { - uint32_t fcr1; - - fcr1 = bus_read_4(sc->sc_memr, KEYLARGO_FCR1); - fcr1 |= FCR1_I2S0_CLK_ENABLE | FCR1_I2S0_ENABLE; - bus_write_4(sc->sc_memr, KEYLARGO_FCR1, fcr1); - } - } - - return (bus_generic_attach(dev)); -} - -static int -macio_print_child(device_t dev, device_t child) -{ - struct macio_devinfo *dinfo; - struct resource_list *rl; - int retval = 0; - - dinfo = device_get_ivars(child); - rl = &dinfo->mdi_resources; - - retval += bus_print_child_header(dev, child); - - retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); - retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); - - retval += bus_print_child_footer(dev, child); - - return (retval); -} - -static void -macio_probe_nomatch(device_t dev, device_t child) -{ - struct macio_devinfo *dinfo; - struct resource_list *rl; - const char *type; - - if (bootverbose) { - dinfo = device_get_ivars(child); - rl = &dinfo->mdi_resources; - - if ((type = ofw_bus_get_type(child)) == NULL) - type = "(unknown)"; - device_printf(dev, "<%s, %s>", type, ofw_bus_get_name(child)); - resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); - resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); - printf(" (no driver attached)\n"); - } -} - -static struct resource * -macio_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, - u_int flags) -{ - struct macio_softc *sc; - int needactivate; - struct resource *rv; - struct rman *rm; - u_long adjstart, adjend, adjcount; - struct macio_devinfo *dinfo; - struct resource_list_entry *rle; - - sc = device_get_softc(bus); - dinfo = device_get_ivars(child); - - needactivate = flags & RF_ACTIVE; - flags &= ~RF_ACTIVE; - - switch (type) { - case SYS_RES_MEMORY: - case SYS_RES_IOPORT: - rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_MEMORY, - *rid); - if (rle == NULL) { - device_printf(bus, "no rle for %s memory %d\n", - device_get_nameunit(child), *rid); - return (NULL); - } - - if (start < rle->start) - adjstart = rle->start; - else if (start > rle->end) - adjstart = rle->end; - else - adjstart = start; - - if (end < rle->start) - adjend = rle->start; - else if (end > rle->end) - adjend = rle->end; - else - adjend = end; - - adjcount = adjend - adjstart; - - rm = &sc->sc_mem_rman; - break; - - case SYS_RES_IRQ: - /* Check for passthrough from subattachments like macgpio */ - if (device_get_parent(child) != bus) - return BUS_ALLOC_RESOURCE(device_get_parent(bus), child, - type, rid, start, end, count, flags); - - rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_IRQ, - *rid); - if (rle == NULL) { - if (dinfo->mdi_ninterrupts >= 6) { - device_printf(bus, - "%s has more than 6 interrupts\n", - device_get_nameunit(child)); - return (NULL); - } - resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ, - dinfo->mdi_ninterrupts, start, start, 1); - - dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = start; - dinfo->mdi_ninterrupts++; - } - - return (resource_list_alloc(&dinfo->mdi_resources, bus, child, - type, rid, start, end, count, flags)); - - default: - device_printf(bus, "unknown resource request from %s\n", - device_get_nameunit(child)); - return (NULL); - } - - rv = rman_reserve_resource(rm, adjstart, adjend, adjcount, flags, - child); - if (rv == NULL) { - device_printf(bus, - "failed to reserve resource %#lx - %#lx (%#lx) for %s\n", - adjstart, adjend, adjcount, device_get_nameunit(child)); - return (NULL); - } - - rman_set_rid(rv, *rid); - - if (needactivate) { - if (bus_activate_resource(child, type, *rid, rv) != 0) { - device_printf(bus, - "failed to activate resource for %s\n", - device_get_nameunit(child)); - rman_release_resource(rv); - return (NULL); - } - } - - return (rv); -} - -static int -macio_release_resource(device_t bus, device_t child, int type, int rid, - struct resource *res) -{ - if (rman_get_flags(res) & RF_ACTIVE) { - int error = bus_deactivate_resource(child, type, rid, res); - if (error) - return error; - } - - return (rman_release_resource(res)); -} - -static int -macio_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *res) -{ - struct macio_softc *sc; - void *p; - - sc = device_get_softc(bus); - - if (type == SYS_RES_IRQ) - return (bus_activate_resource(bus, type, rid, res)); - - if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { - p = pmap_mapdev((vm_offset_t)rman_get_start(res) + sc->sc_base, - (vm_size_t)rman_get_size(res)); - if (p == NULL) - return (ENOMEM); - rman_set_virtual(res, p); - rman_set_bustag(res, &bs_le_tag); - rman_set_bushandle(res, (u_long)p); - } - - return (rman_activate_resource(res)); -} - -static int -macio_deactivate_resource(device_t bus, device_t child, int type, int rid, - struct resource *res) -{ - /* - * If this is a memory resource, unmap it. - */ - if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { - u_int32_t psize; - - psize = rman_get_size(res); - pmap_unmapdev((vm_offset_t)rman_get_virtual(res), psize); - } - - return (rman_deactivate_resource(res)); -} - -static struct resource_list * -macio_get_resource_list (device_t dev, device_t child) -{ - struct macio_devinfo *dinfo; - - dinfo = device_get_ivars(child); - return (&dinfo->mdi_resources); -} - -static const struct ofw_bus_devinfo * -macio_get_devinfo(device_t dev, device_t child) -{ - struct macio_devinfo *dinfo; - - dinfo = device_get_ivars(child); - return (&dinfo->mdi_obdinfo); -} - -int -macio_enable_wireless(device_t dev, bool enable) -{ - struct macio_softc *sc = device_get_softc(dev); - uint32_t x; - - if (enable) { - x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); - x |= 0x4; - bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); - - /* Enable card slot. */ - bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 5); - DELAY(1000); - bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 4); - DELAY(1000); - x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); - x &= ~0x80000000; - - bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); - /* out8(gpio + 0x10, 4); */ - - bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0b, 0); - bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0a, 0x28); - bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0d, 0x28); - bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0d, 0x28); - bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0e, 0x28); - bus_write_4(sc->sc_memr, 0x1c000, 0); - - /* Initialize the card. */ - bus_write_4(sc->sc_memr, 0x1a3e0, 0x41); - x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); - x |= 0x80000000; - bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); - } else { - x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); - x &= ~0x4; - bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); - /* out8(gpio + 0x10, 0); */ - } - - return (0); -} diff --git a/sys/powerpc/powermac/maciovar.h b/sys/powerpc/powermac/maciovar.h deleted file mode 100644 index 6bd9e6100ec..00000000000 --- a/sys/powerpc/powermac/maciovar.h +++ /dev/null @@ -1,79 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2002 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _MACIO_MACIOVAR_H_ -#define _MACIO_MACIOVAR_H_ - -/* - * The addr space size - * XXX it would be better if this could be determined by querying the - * PCI device, but there isn't an access method for this - */ -#define MACIO_REG_SIZE 0x7ffff - -/* - * Feature Control Registers (FCR) - */ -#define HEATHROW_FCR 0x38 -#define KEYLARGO_FCR0 0x38 -#define KEYLARGO_FCR1 0x3c -#define KEYLARGO_FCR2 0x40 - -#define FCR_ENET_ENABLE 0x60000000 -#define FCR_ENET_RESET 0x80000000 - -#define FCR1_I2S0_CLK_ENABLE 0x00001000 -#define FCR1_I2S0_ENABLE 0x00002000 - -/* Used only by macio_enable_wireless() for now. */ -#define KEYLARGO_GPIO_BASE 0x6a -#define KEYLARGO_EXTINT_GPIO_REG_BASE 0x58 - -/* - * Format of a macio reg property entry. - */ -struct macio_reg { - u_int32_t mr_base; - u_int32_t mr_size; -}; - -/* - * Per macio device structure. - */ -struct macio_devinfo { - int mdi_interrupts[6]; - int mdi_ninterrupts; - int mdi_base; - struct ofw_bus_devinfo mdi_obdinfo; - struct resource_list mdi_resources; -}; - -extern int macio_enable_wireless(device_t dev, bool enable); - -#endif /* _MACIO_MACIOVAR_H_ */ diff --git a/sys/powerpc/powermac/nvbl.c b/sys/powerpc/powermac/nvbl.c deleted file mode 100644 index 477af9f6848..00000000000 --- a/sys/powerpc/powermac/nvbl.c +++ /dev/null @@ -1,202 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2012 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#define PCI_VENDOR_ID_NVIDIA 0x10de - -#define NVIDIA_BRIGHT_MIN (0x0ec) -#define NVIDIA_BRIGHT_MAX (0x538) -#define NVIDIA_BRIGHT_SCALE ((NVIDIA_BRIGHT_MAX - NVIDIA_BRIGHT_MIN)/100) -/* nVidia's MMIO registers are at PCI BAR[0] */ -#define NVIDIA_MMIO_PMC (0x0) -#define NVIDIA_PMC_OFF (NVIDIA_MMIO_PMC + 0x10f0) -#define NVIDIA_PMC_BL_SHIFT (16) -#define NVIDIA_PMC_BL_EN (1U << 31) - -struct nvbl_softc { - device_t dev; - struct resource *sc_memr; -}; - -static void nvbl_identify(driver_t *driver, device_t parent); -static int nvbl_probe(device_t dev); -static int nvbl_attach(device_t dev); -static int nvbl_setlevel(struct nvbl_softc *sc, int newlevel); -static int nvbl_getlevel(struct nvbl_softc *sc); -static int nvbl_sysctl(SYSCTL_HANDLER_ARGS); - -static device_method_t nvbl_methods[] = { - /* Device interface */ - DEVMETHOD(device_identify, nvbl_identify), - DEVMETHOD(device_probe, nvbl_probe), - DEVMETHOD(device_attach, nvbl_attach), - {0, 0}, -}; - -static driver_t nvbl_driver = { - "backlight", - nvbl_methods, - sizeof(struct nvbl_softc) -}; - -static devclass_t nvbl_devclass; - -DRIVER_MODULE(nvbl, vgapci, nvbl_driver, nvbl_devclass, 0, 0); - -static void -nvbl_identify(driver_t *driver, device_t parent) -{ - if (OF_finddevice("mac-io/backlight") == -1) - return; - if (device_find_child(parent, "backlight", -1) == NULL) - device_add_child(parent, "backlight", -1); -} - -static int -nvbl_probe(device_t dev) -{ - char control[8]; - phandle_t handle; - - handle = OF_finddevice("mac-io/backlight"); - - if (handle == -1) - return (ENXIO); - - if (OF_getprop(handle, "backlight-control", &control, sizeof(control)) < 0) - return (ENXIO); - - if ((strcmp(control, "mnca") != 0) || - pci_get_vendor(device_get_parent(dev)) != PCI_VENDOR_ID_NVIDIA) - return (ENXIO); - - device_set_desc(dev, "PowerBook backlight for nVidia graphics"); - - return (0); -} - -static int -nvbl_attach(device_t dev) -{ - struct nvbl_softc *sc; - struct sysctl_ctx_list *ctx; - struct sysctl_oid *tree; - int rid; - - sc = device_get_softc(dev); - - rid = 0x10; /* BAR[0], for the MMIO register */ - sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, - RF_ACTIVE | RF_SHAREABLE); - if (sc->sc_memr == NULL) { - device_printf(dev, "Could not alloc mem resource!\n"); - return (ENXIO); - } - - /* Turn on big-endian mode */ - if (!(bus_read_stream_4(sc->sc_memr, NVIDIA_MMIO_PMC + 4) & 0x01000001)) { - bus_write_stream_4(sc->sc_memr, NVIDIA_MMIO_PMC + 4, 0x01000001); - mb(); - } - - ctx = device_get_sysctl_ctx(dev); - tree = device_get_sysctl_tree(dev); - - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "level", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, - nvbl_sysctl, "I", "Backlight level (0-100)"); - - return (0); -} - -static int -nvbl_setlevel(struct nvbl_softc *sc, int newlevel) -{ - uint32_t pmc_reg; - - if (newlevel > 100) - newlevel = 100; - - if (newlevel < 0) - newlevel = 0; - - if (newlevel > 0) - newlevel = (newlevel * NVIDIA_BRIGHT_SCALE) + NVIDIA_BRIGHT_MIN; - - pmc_reg = bus_read_stream_4(sc->sc_memr, NVIDIA_PMC_OFF) & 0xffff; - pmc_reg |= NVIDIA_PMC_BL_EN | (newlevel << NVIDIA_PMC_BL_SHIFT); - bus_write_stream_4(sc->sc_memr, NVIDIA_PMC_OFF, pmc_reg); - - return (0); -} - -static int -nvbl_getlevel(struct nvbl_softc *sc) -{ - uint16_t level; - - level = bus_read_stream_2(sc->sc_memr, NVIDIA_PMC_OFF) & 0x7fff; - - if (level < NVIDIA_BRIGHT_MIN) - return 0; - - level = (level - NVIDIA_BRIGHT_MIN) / NVIDIA_BRIGHT_SCALE; - - return (level); -} - -static int -nvbl_sysctl(SYSCTL_HANDLER_ARGS) -{ - struct nvbl_softc *sc; - int newlevel, error; - - sc = arg1; - - newlevel = nvbl_getlevel(sc); - - error = sysctl_handle_int(oidp, &newlevel, 0, req); - - if (error || !req->newptr) - return (error); - - return (nvbl_setlevel(sc, newlevel)); -} diff --git a/sys/powerpc/powermac/platform_powermac.c b/sys/powerpc/powermac/platform_powermac.c deleted file mode 100644 index 296e8929a52..00000000000 --- a/sys/powerpc/powermac/platform_powermac.c +++ /dev/null @@ -1,422 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2008 Marcel Moolenaar - * Copyright (c) 2009 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include /* For save_vec() */ -#include -#include -#include /* For save_fpu() */ -#include -#include -#include -#include -#include - -#include -#include - -#include "platform_if.h" - -extern void *ap_pcpu; - -static int powermac_probe(platform_t); -static int powermac_attach(platform_t); -void powermac_mem_regions(platform_t, struct mem_region *phys, int *physsz, - struct mem_region *avail, int *availsz); -static u_long powermac_timebase_freq(platform_t, struct cpuref *cpuref); -static int powermac_smp_first_cpu(platform_t, struct cpuref *cpuref); -static int powermac_smp_next_cpu(platform_t, struct cpuref *cpuref); -static int powermac_smp_get_bsp(platform_t, struct cpuref *cpuref); -static int powermac_smp_start_cpu(platform_t, struct pcpu *cpu); -static void powermac_smp_timebase_sync(platform_t, u_long tb, int ap); -static void powermac_reset(platform_t); -#ifndef __powerpc64__ -static void powermac_sleep(platform_t); -#endif - -static platform_method_t powermac_methods[] = { - PLATFORMMETHOD(platform_probe, powermac_probe), - PLATFORMMETHOD(platform_attach, powermac_attach), - PLATFORMMETHOD(platform_mem_regions, powermac_mem_regions), - PLATFORMMETHOD(platform_timebase_freq, powermac_timebase_freq), - - PLATFORMMETHOD(platform_smp_first_cpu, powermac_smp_first_cpu), - PLATFORMMETHOD(platform_smp_next_cpu, powermac_smp_next_cpu), - PLATFORMMETHOD(platform_smp_get_bsp, powermac_smp_get_bsp), - PLATFORMMETHOD(platform_smp_start_cpu, powermac_smp_start_cpu), - PLATFORMMETHOD(platform_smp_timebase_sync, powermac_smp_timebase_sync), - - PLATFORMMETHOD(platform_reset, powermac_reset), -#ifndef __powerpc64__ - PLATFORMMETHOD(platform_sleep, powermac_sleep), -#endif - - PLATFORMMETHOD_END -}; - -static platform_def_t powermac_platform = { - "powermac", - powermac_methods, - 0 -}; - -PLATFORM_DEF(powermac_platform); - -static int -powermac_probe(platform_t plat) -{ - char compat[255]; - ssize_t compatlen; - char *curstr; - phandle_t root; - - root = OF_peer(0); - if (root == 0) - return (ENXIO); - - compatlen = OF_getprop(root, "compatible", compat, sizeof(compat)); - - for (curstr = compat; curstr < compat + compatlen; - curstr += strlen(curstr) + 1) { - if (strncmp(curstr, "MacRISC", 7) == 0) - return (BUS_PROBE_SPECIFIC); - } - - return (ENXIO); -} - -void -powermac_mem_regions(platform_t plat, struct mem_region *phys, int *physsz, - struct mem_region *avail, int *availsz) -{ - phandle_t memory; - cell_t memoryprop[PHYS_AVAIL_SZ * 2]; - ssize_t propsize, i, j; - int physacells = 1; - - memory = OF_finddevice("/memory"); - if (memory == -1) - memory = OF_finddevice("/memory@0"); - - /* "reg" has variable #address-cells, but #size-cells is always 1 */ - OF_getprop(OF_parent(memory), "#address-cells", &physacells, - sizeof(physacells)); - - propsize = OF_getprop(memory, "reg", memoryprop, sizeof(memoryprop)); - propsize /= sizeof(cell_t); - for (i = 0, j = 0; i < propsize; i += physacells+1, j++) { - phys[j].mr_start = memoryprop[i]; - if (physacells == 2) { -#ifndef __powerpc64__ - /* On 32-bit PPC, ignore regions starting above 4 GB */ - if (memoryprop[i] != 0) { - j--; - continue; - } -#else - phys[j].mr_start <<= 32; -#endif - phys[j].mr_start |= memoryprop[i+1]; - } - phys[j].mr_size = memoryprop[i + physacells]; - } - *physsz = j; - - /* "available" always has #address-cells = 1 */ - propsize = OF_getprop(memory, "available", memoryprop, - sizeof(memoryprop)); - if (propsize <= 0) { - for (i = 0; i < *physsz; i++) { - avail[i].mr_start = phys[i].mr_start; - avail[i].mr_size = phys[i].mr_size; - } - - *availsz = *physsz; - } else { - propsize /= sizeof(cell_t); - for (i = 0, j = 0; i < propsize; i += 2, j++) { - avail[j].mr_start = memoryprop[i]; - avail[j].mr_size = memoryprop[i + 1]; - } - -#ifdef __powerpc64__ - /* Add in regions above 4 GB to the available list */ - for (i = 0; i < *physsz; i++) { - if (phys[i].mr_start > BUS_SPACE_MAXADDR_32BIT) { - avail[j].mr_start = phys[i].mr_start; - avail[j].mr_size = phys[i].mr_size; - j++; - } - } -#endif - *availsz = j; - } -} - -static int -powermac_attach(platform_t plat) -{ - phandle_t rootnode; - char model[32]; - - /* - * Quiesce Open Firmware on PowerMac11,2 and 12,1. It is - * necessary there to shut down a background thread doing fan - * management, and is harmful on other machines (it will make OF - * shut off power to various system components it had turned on). - * - * Note: we don't need to worry about which OF module we are - * using since this is called only from very early boot, within - * OF's boot context. - */ - - rootnode = OF_finddevice("/"); - if (OF_getprop(rootnode, "model", model, sizeof(model)) > 0) { - if (strcmp(model, "PowerMac11,2") == 0 || - strcmp(model, "PowerMac12,1") == 0) { - ofw_quiesce(); - } - } - - return (0); -} - -static u_long -powermac_timebase_freq(platform_t plat, struct cpuref *cpuref) -{ - phandle_t phandle; - int32_t ticks = -1; - - phandle = cpuref->cr_hwref; - - OF_getprop(phandle, "timebase-frequency", &ticks, sizeof(ticks)); - - if (ticks <= 0) - panic("Unable to determine timebase frequency!"); - - return (ticks); -} - -static int -powermac_smp_fill_cpuref(struct cpuref *cpuref, phandle_t cpu) -{ - cell_t cpuid; - int res; - - cpuref->cr_hwref = cpu; - res = OF_getprop(cpu, "reg", &cpuid, sizeof(cpuid)); - - /* - * psim doesn't have a reg property, so assume 0 as for the - * uniprocessor case in the CHRP spec. - */ - if (res < 0) { - cpuid = 0; - } - - cpuref->cr_cpuid = cpuid & 0xff; - return (0); -} - -static int -powermac_smp_first_cpu(platform_t plat, struct cpuref *cpuref) -{ - char buf[8]; - phandle_t cpu, dev, root; - int res; - - root = OF_peer(0); - - dev = OF_child(root); - while (dev != 0) { - res = OF_getprop(dev, "name", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "cpus") == 0) - break; - dev = OF_peer(dev); - } - if (dev == 0) { - /* - * psim doesn't have a name property on the /cpus node, - * but it can be found directly - */ - dev = OF_finddevice("/cpus"); - if (dev == -1) - return (ENOENT); - } - - cpu = OF_child(dev); - - while (cpu != 0) { - res = OF_getprop(cpu, "device_type", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "cpu") == 0) - break; - cpu = OF_peer(cpu); - } - if (cpu == 0) - return (ENOENT); - - return (powermac_smp_fill_cpuref(cpuref, cpu)); -} - -static int -powermac_smp_next_cpu(platform_t plat, struct cpuref *cpuref) -{ - char buf[8]; - phandle_t cpu; - int res; - - cpu = OF_peer(cpuref->cr_hwref); - while (cpu != 0) { - res = OF_getprop(cpu, "device_type", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "cpu") == 0) - break; - cpu = OF_peer(cpu); - } - if (cpu == 0) - return (ENOENT); - - return (powermac_smp_fill_cpuref(cpuref, cpu)); -} - -static int -powermac_smp_get_bsp(platform_t plat, struct cpuref *cpuref) -{ - ihandle_t inst; - phandle_t bsp, chosen; - int res; - - chosen = OF_finddevice("/chosen"); - if (chosen == -1) - return (ENXIO); - - res = OF_getprop(chosen, "cpu", &inst, sizeof(inst)); - if (res < 0) - return (ENXIO); - - bsp = OF_instance_to_package(inst); - return (powermac_smp_fill_cpuref(cpuref, bsp)); -} - -static int -powermac_smp_start_cpu(platform_t plat, struct pcpu *pc) -{ -#ifdef SMP - phandle_t cpu; - volatile uint8_t *rstvec; - static volatile uint8_t *rstvec_virtbase = NULL; - int res, reset, timeout; - - cpu = pc->pc_hwref; - res = OF_getprop(cpu, "soft-reset", &reset, sizeof(reset)); - if (res < 0) { - reset = 0x58; - - switch (pc->pc_cpuid) { - case 0: - reset += 0x03; - break; - case 1: - reset += 0x04; - break; - case 2: - reset += 0x0f; - break; - case 3: - reset += 0x10; - break; - default: - return (ENXIO); - } - } - - ap_pcpu = pc; - - if (rstvec_virtbase == NULL) - rstvec_virtbase = pmap_mapdev(0x80000000, PAGE_SIZE); - - rstvec = rstvec_virtbase + reset; - - *rstvec = 4; - powerpc_sync(); - (void)(*rstvec); - powerpc_sync(); - DELAY(1); - *rstvec = 0; - powerpc_sync(); - (void)(*rstvec); - powerpc_sync(); - - timeout = 10000; - while (!pc->pc_awake && timeout--) - DELAY(100); - - return ((pc->pc_awake) ? 0 : EBUSY); -#else - /* No SMP support */ - return (ENXIO); -#endif -} - -static void -powermac_smp_timebase_sync(platform_t plat, u_long tb, int ap) -{ - - mttb(tb); -} - -static void -powermac_reset(platform_t platform) -{ - OF_reboot(); -} - -#ifndef __powerpc64__ -void -powermac_sleep(platform_t platform) -{ - /* Only supports MPC745x for now. */ - if (!MPC745X_P(mfspr(SPR_PVR) >> 16)) { - printf("sleep only supported for G4 PowerMac hardware.\n"); - return; - } - - *(unsigned long *)0x80 = 0x100; - mpc745x_sleep(); -} -#endif diff --git a/sys/powerpc/powermac/pmu.c b/sys/powerpc/powermac/pmu.c deleted file mode 100644 index 7c8acc946b9..00000000000 --- a/sys/powerpc/powermac/pmu.c +++ /dev/null @@ -1,1147 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Michael Lorenz - * Copyright 2008 by Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include - -#include "clock_if.h" -#include "pmuvar.h" -#include "viareg.h" -#include "uninorthvar.h" /* For unin_chip_sleep()/unin_chip_wake() */ - -#define PMU_DEFAULTS PMU_INT_TICK | PMU_INT_ADB | \ - PMU_INT_PCEJECT | PMU_INT_SNDBRT | \ - PMU_INT_BATTERY | PMU_INT_ENVIRONMENT - -/* - * Bus interface - */ -static int pmu_probe(device_t); -static int pmu_attach(device_t); -static int pmu_detach(device_t); - -/* - * Clock interface - */ -static int pmu_gettime(device_t dev, struct timespec *ts); -static int pmu_settime(device_t dev, struct timespec *ts); - -/* - * ADB Interface - */ - -static u_int pmu_adb_send(device_t dev, u_char command_byte, int len, - u_char *data, u_char poll); -static u_int pmu_adb_autopoll(device_t dev, uint16_t mask); -static u_int pmu_poll(device_t dev); - -/* - * Power interface - */ - -static void pmu_shutdown(void *xsc, int howto); -static void pmu_set_sleepled(void *xsc, int onoff); -static int pmu_server_mode(SYSCTL_HANDLER_ARGS); -static int pmu_acline_state(SYSCTL_HANDLER_ARGS); -static int pmu_query_battery(struct pmu_softc *sc, int batt, - struct pmu_battstate *info); -static int pmu_battquery_sysctl(SYSCTL_HANDLER_ARGS); -static int pmu_battmon(SYSCTL_HANDLER_ARGS); -static void pmu_battquery_proc(void); -static void pmu_battery_notify(struct pmu_battstate *batt, - struct pmu_battstate *old); - -/* - * List of battery-related sysctls we might ask for - */ - -enum { - PMU_BATSYSCTL_PRESENT = 1 << 8, - PMU_BATSYSCTL_CHARGING = 2 << 8, - PMU_BATSYSCTL_CHARGE = 3 << 8, - PMU_BATSYSCTL_MAXCHARGE = 4 << 8, - PMU_BATSYSCTL_CURRENT = 5 << 8, - PMU_BATSYSCTL_VOLTAGE = 6 << 8, - PMU_BATSYSCTL_TIME = 7 << 8, - PMU_BATSYSCTL_LIFE = 8 << 8 -}; - -static device_method_t pmu_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, pmu_probe), - DEVMETHOD(device_attach, pmu_attach), - DEVMETHOD(device_detach, pmu_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - - /* ADB bus interface */ - DEVMETHOD(adb_hb_send_raw_packet, pmu_adb_send), - DEVMETHOD(adb_hb_controller_poll, pmu_poll), - DEVMETHOD(adb_hb_set_autopoll_mask, pmu_adb_autopoll), - - /* Clock interface */ - DEVMETHOD(clock_gettime, pmu_gettime), - DEVMETHOD(clock_settime, pmu_settime), - - DEVMETHOD_END -}; - -static driver_t pmu_driver = { - "pmu", - pmu_methods, - sizeof(struct pmu_softc), -}; - -static devclass_t pmu_devclass; - -EARLY_DRIVER_MODULE(pmu, macio, pmu_driver, pmu_devclass, 0, 0, - BUS_PASS_RESOURCE); -DRIVER_MODULE(adb, pmu, adb_driver, adb_devclass, 0, 0); - -static int pmuextint_probe(device_t); -static int pmuextint_attach(device_t); - -static device_method_t pmuextint_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, pmuextint_probe), - DEVMETHOD(device_attach, pmuextint_attach), - {0,0} -}; - -static driver_t pmuextint_driver = { - "pmuextint", - pmuextint_methods, - 0 -}; - -static devclass_t pmuextint_devclass; - -EARLY_DRIVER_MODULE(pmuextint, macgpio, pmuextint_driver, pmuextint_devclass, - 0, 0, BUS_PASS_RESOURCE); - -/* Make sure uhid is loaded, as it turns off some of the ADB emulation */ -MODULE_DEPEND(pmu, usb, 1, 1, 1); - -static void pmu_intr(void *arg); -static void pmu_in(struct pmu_softc *sc); -static void pmu_out(struct pmu_softc *sc); -static void pmu_ack_on(struct pmu_softc *sc); -static void pmu_ack_off(struct pmu_softc *sc); -static int pmu_send(void *cookie, int cmd, int length, uint8_t *in_msg, - int rlen, uint8_t *out_msg); -static uint8_t pmu_read_reg(struct pmu_softc *sc, u_int offset); -static void pmu_write_reg(struct pmu_softc *sc, u_int offset, uint8_t value); -static int pmu_intr_state(struct pmu_softc *); - -/* these values shows that number of data returned after 'send' cmd is sent */ -static signed char pm_send_cmd_type[] = { - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - 0x01, 0x01, -1, -1, -1, -1, -1, -1, - 0x00, 0x00, -1, -1, -1, -1, -1, 0x00, - -1, 0x00, 0x02, 0x01, 0x01, -1, -1, -1, - 0x00, -1, -1, -1, -1, -1, -1, -1, - 0x04, 0x14, -1, 0x03, -1, -1, -1, -1, - 0x00, 0x00, 0x02, 0x02, -1, -1, -1, -1, - 0x01, 0x01, -1, -1, -1, -1, -1, -1, - 0x00, 0x00, -1, -1, 0x01, -1, -1, -1, - 0x01, 0x00, 0x02, 0x02, -1, 0x01, 0x03, 0x01, - 0x00, 0x01, 0x00, 0x00, 0x00, -1, -1, -1, - 0x02, -1, -1, -1, -1, -1, -1, -1, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -1, -1, - 0x01, 0x01, 0x01, -1, -1, -1, -1, -1, - 0x00, 0x00, -1, -1, -1, 0x05, 0x04, 0x04, - 0x04, -1, 0x00, -1, -1, -1, -1, -1, - 0x00, -1, -1, -1, -1, -1, -1, -1, - 0x01, 0x02, -1, -1, -1, -1, -1, -1, - 0x00, 0x00, -1, -1, -1, -1, -1, -1, - 0x02, 0x02, 0x02, 0x04, -1, 0x00, -1, -1, - 0x01, 0x01, 0x03, 0x02, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - 0x00, -1, -1, -1, -1, -1, -1, -1, - 0x01, 0x01, -1, -1, 0x00, 0x00, -1, -1, - -1, 0x04, 0x00, -1, -1, -1, -1, -1, - 0x03, -1, 0x00, -1, 0x00, -1, -1, 0x00, - -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1 -}; - -/* these values shows that number of data returned after 'receive' cmd is sent */ -static signed char pm_receive_cmd_type[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - -1, -1, -1, -1, -1, -1, -1, -1, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x02, -1, -1, -1, -1, -1, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - -1, -1, -1, -1, -1, -1, -1, -1, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x05, 0x15, -1, 0x02, -1, -1, -1, -1, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x02, -1, -1, -1, -1, -1, -1, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x03, 0x03, -1, -1, -1, -1, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x04, 0x04, 0x03, 0x09, -1, -1, -1, -1, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - -1, -1, -1, -1, -1, 0x01, 0x01, 0x01, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x06, -1, -1, -1, -1, -1, -1, -1, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x02, -1, -1, -1, -1, -1, -1, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, -1, -1, -1, -1, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - -1, -1, -1, -1, -1, -1, -1, -1, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - -1, -1, -1, -1, -1, -1, -1, -1, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x02, -1, -1, 0x02, -1, -1, -1, - 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, - -1, -1, 0x02, -1, -1, -1, -1, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - -1, -1, -1, -1, -1, -1, -1, -1, -}; - -static int pmu_battmon_enabled = 1; -static struct proc *pmubattproc; -static struct kproc_desc pmu_batt_kp = { - "pmu_batt", - pmu_battquery_proc, - &pmubattproc -}; - -/* We only have one of each device, so globals are safe */ -static device_t pmu = NULL; -static device_t pmu_extint = NULL; - -static int -pmuextint_probe(device_t dev) -{ - const char *type = ofw_bus_get_type(dev); - - if (strcmp(type, "extint-gpio1") != 0) - return (ENXIO); - - device_set_desc(dev, "Apple PMU99 External Interrupt"); - return (0); -} - -static int -pmu_probe(device_t dev) -{ - const char *type = ofw_bus_get_type(dev); - - if (strcmp(type, "via-pmu") != 0) - return (ENXIO); - - device_set_desc(dev, "Apple PMU99 Controller"); - return (0); -} - -static int -setup_pmu_intr(device_t dev, device_t extint) -{ - struct pmu_softc *sc; - sc = device_get_softc(dev); - - sc->sc_irqrid = 0; - sc->sc_irq = bus_alloc_resource_any(extint, SYS_RES_IRQ, &sc->sc_irqrid, - RF_ACTIVE); - if (sc->sc_irq == NULL) { - device_printf(dev, "could not allocate interrupt\n"); - return (ENXIO); - } - - if (bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC | INTR_MPSAFE - | INTR_ENTROPY, NULL, pmu_intr, dev, &sc->sc_ih) != 0) { - device_printf(dev, "could not setup interrupt\n"); - bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irqrid, - sc->sc_irq); - return (ENXIO); - } - - return (0); -} - -static int -pmuextint_attach(device_t dev) -{ - pmu_extint = dev; - if (pmu) - return (setup_pmu_intr(pmu,dev)); - - return (0); -} - -static int -pmu_attach(device_t dev) -{ - struct pmu_softc *sc; - - int i; - uint8_t reg; - uint8_t cmd[2] = {2, 0}; - uint8_t resp[16]; - phandle_t node,child; - struct sysctl_ctx_list *ctx; - struct sysctl_oid *tree; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - - sc->sc_memrid = 0; - sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &sc->sc_memrid, RF_ACTIVE); - - mtx_init(&sc->sc_mutex,"pmu",NULL,MTX_DEF | MTX_RECURSE); - - if (sc->sc_memr == NULL) { - device_printf(dev, "Could not alloc mem resource!\n"); - return (ENXIO); - } - - /* - * Our interrupt is attached to a GPIO pin. Depending on probe order, - * we may not have found it yet. If we haven't, it will find us, and - * attach our interrupt then. - */ - pmu = dev; - if (pmu_extint != NULL) { - if (setup_pmu_intr(dev,pmu_extint) != 0) - return (ENXIO); - } - - sc->sc_autopoll = 0; - sc->sc_batteries = 0; - sc->adb_bus = NULL; - sc->sc_leddev = NULL; - - /* Init PMU */ - - pmu_write_reg(sc, vBufB, pmu_read_reg(sc, vBufB) | vPB4); - pmu_write_reg(sc, vDirB, (pmu_read_reg(sc, vDirB) | vPB4) & ~vPB3); - - reg = PMU_DEFAULTS; - pmu_send(sc, PMU_SET_IMASK, 1, ®, 16, resp); - - pmu_write_reg(sc, vIER, 0x94); /* make sure VIA interrupts are on */ - - pmu_send(sc, PMU_SYSTEM_READY, 1, cmd, 16, resp); - pmu_send(sc, PMU_GET_VERSION, 0, cmd, 16, resp); - - /* Initialize child buses (ADB) */ - node = ofw_bus_get_node(dev); - - for (child = OF_child(node); child != 0; child = OF_peer(child)) { - char name[32]; - - memset(name, 0, sizeof(name)); - OF_getprop(child, "name", name, sizeof(name)); - - if (bootverbose) - device_printf(dev, "PMU child <%s>\n",name); - - if (strncmp(name, "adb", 4) == 0) { - sc->adb_bus = device_add_child(dev,"adb",-1); - } - - if (strncmp(name, "power-mgt", 9) == 0) { - uint32_t prim_info[9]; - - if (OF_getprop(child, "prim-info", prim_info, - sizeof(prim_info)) >= 7) - sc->sc_batteries = (prim_info[6] >> 16) & 0xff; - - if (bootverbose && sc->sc_batteries > 0) - device_printf(dev, "%d batteries detected\n", - sc->sc_batteries); - } - } - - /* - * Set up sysctls - */ - - ctx = device_get_sysctl_ctx(dev); - tree = device_get_sysctl_tree(dev); - - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "server_mode", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, sc, 0, - pmu_server_mode, "I", "Enable reboot after power failure"); - - if (sc->sc_batteries > 0) { - struct sysctl_oid *oid, *battroot; - char battnum[2]; - - /* Only start the battery monitor if we have a battery. */ - kproc_start(&pmu_batt_kp); - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "monitor_batteries", - CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, - pmu_battmon, "I", "Post battery events to devd"); - - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "acline", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, - 0, pmu_acline_state, "I", "AC Line Status"); - - battroot = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "batteries", CTLFLAG_RD | CTLFLAG_MPSAFE, 0, - "Battery Information"); - - for (i = 0; i < sc->sc_batteries; i++) { - battnum[0] = i + '0'; - battnum[1] = '\0'; - - oid = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(battroot), - OID_AUTO, battnum, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, - "Battery Information"); - - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "present", - CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, - PMU_BATSYSCTL_PRESENT | i, pmu_battquery_sysctl, - "I", "Battery present"); - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "charging", - CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, - PMU_BATSYSCTL_CHARGING | i, pmu_battquery_sysctl, - "I", "Battery charging"); - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "charge", - CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, - PMU_BATSYSCTL_CHARGE | i, pmu_battquery_sysctl, - "I", "Battery charge (mAh)"); - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "maxcharge", - CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, - PMU_BATSYSCTL_MAXCHARGE | i, pmu_battquery_sysctl, - "I", "Maximum battery capacity (mAh)"); - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "rate", - CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, - PMU_BATSYSCTL_CURRENT | i, pmu_battquery_sysctl, - "I", "Battery discharge rate (mA)"); - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "voltage", - CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, - PMU_BATSYSCTL_VOLTAGE | i, pmu_battquery_sysctl, - "I", "Battery voltage (mV)"); - - /* Knobs for mental compatibility with ACPI */ - - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "time", - CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, - PMU_BATSYSCTL_TIME | i, pmu_battquery_sysctl, - "I", "Time Remaining (minutes)"); - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "life", - CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, - PMU_BATSYSCTL_LIFE | i, pmu_battquery_sysctl, - "I", "Capacity remaining (percent)"); - } - } - - /* - * Set up LED interface - */ - - sc->sc_leddev = led_create(pmu_set_sleepled, sc, "sleepled"); - - /* - * Register RTC - */ - - clock_register(dev, 1000); - - /* - * Register power control handler - */ - EVENTHANDLER_REGISTER(shutdown_final, pmu_shutdown, sc, - SHUTDOWN_PRI_LAST); - - return (bus_generic_attach(dev)); -} - -static int -pmu_detach(device_t dev) -{ - struct pmu_softc *sc; - - sc = device_get_softc(dev); - - if (sc->sc_leddev != NULL) - led_destroy(sc->sc_leddev); - - bus_teardown_intr(dev, sc->sc_irq, sc->sc_ih); - bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irqrid, sc->sc_irq); - bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_memrid, sc->sc_memr); - mtx_destroy(&sc->sc_mutex); - - return (bus_generic_detach(dev)); -} - -static uint8_t -pmu_read_reg(struct pmu_softc *sc, u_int offset) -{ - return (bus_read_1(sc->sc_memr, offset)); -} - -static void -pmu_write_reg(struct pmu_softc *sc, u_int offset, uint8_t value) -{ - bus_write_1(sc->sc_memr, offset, value); -} - -static int -pmu_send_byte(struct pmu_softc *sc, uint8_t data) -{ - - pmu_out(sc); - pmu_write_reg(sc, vSR, data); - pmu_ack_off(sc); - /* wait for intr to come up */ - /* XXX should add a timeout and bail if it expires */ - do {} while (pmu_intr_state(sc) == 0); - pmu_ack_on(sc); - do {} while (pmu_intr_state(sc)); - pmu_ack_on(sc); - return 0; -} - -static inline int -pmu_read_byte(struct pmu_softc *sc, uint8_t *data) -{ - volatile uint8_t scratch; - pmu_in(sc); - scratch = pmu_read_reg(sc, vSR); - pmu_ack_off(sc); - /* wait for intr to come up */ - do {} while (pmu_intr_state(sc) == 0); - pmu_ack_on(sc); - do {} while (pmu_intr_state(sc)); - *data = pmu_read_reg(sc, vSR); - return 0; -} - -static int -pmu_intr_state(struct pmu_softc *sc) -{ - return ((pmu_read_reg(sc, vBufB) & vPB3) == 0); -} - -static int -pmu_send(void *cookie, int cmd, int length, uint8_t *in_msg, int rlen, - uint8_t *out_msg) -{ - struct pmu_softc *sc = cookie; - int i, rcv_len = -1; - uint8_t out_len, intreg; - - intreg = pmu_read_reg(sc, vIER); - intreg &= 0x10; - pmu_write_reg(sc, vIER, intreg); - - /* wait idle */ - do {} while (pmu_intr_state(sc)); - - /* send command */ - pmu_send_byte(sc, cmd); - - /* send length if necessary */ - if (pm_send_cmd_type[cmd] < 0) { - pmu_send_byte(sc, length); - } - - for (i = 0; i < length; i++) { - pmu_send_byte(sc, in_msg[i]); - } - - /* see if there's data to read */ - rcv_len = pm_receive_cmd_type[cmd]; - if (rcv_len == 0) - goto done; - - /* read command */ - if (rcv_len == 1) { - pmu_read_byte(sc, out_msg); - goto done; - } else - out_msg[0] = cmd; - if (rcv_len < 0) { - pmu_read_byte(sc, &out_len); - rcv_len = out_len + 1; - } - for (i = 1; i < min(rcv_len, rlen); i++) - pmu_read_byte(sc, &out_msg[i]); - -done: - pmu_write_reg(sc, vIER, (intreg == 0) ? 0 : 0x90); - - return rcv_len; -} - -static u_int -pmu_poll(device_t dev) -{ - pmu_intr(dev); - return (0); -} - -static void -pmu_in(struct pmu_softc *sc) -{ - uint8_t reg; - - reg = pmu_read_reg(sc, vACR); - reg &= ~vSR_OUT; - reg |= 0x0c; - pmu_write_reg(sc, vACR, reg); -} - -static void -pmu_out(struct pmu_softc *sc) -{ - uint8_t reg; - - reg = pmu_read_reg(sc, vACR); - reg |= vSR_OUT; - reg |= 0x0c; - pmu_write_reg(sc, vACR, reg); -} - -static void -pmu_ack_off(struct pmu_softc *sc) -{ - uint8_t reg; - - reg = pmu_read_reg(sc, vBufB); - reg &= ~vPB4; - pmu_write_reg(sc, vBufB, reg); -} - -static void -pmu_ack_on(struct pmu_softc *sc) -{ - uint8_t reg; - - reg = pmu_read_reg(sc, vBufB); - reg |= vPB4; - pmu_write_reg(sc, vBufB, reg); -} - -static void -pmu_intr(void *arg) -{ - device_t dev; - struct pmu_softc *sc; - - unsigned int len; - uint8_t resp[16]; - uint8_t junk[16]; - - dev = (device_t)arg; - sc = device_get_softc(dev); - - mtx_lock(&sc->sc_mutex); - - pmu_write_reg(sc, vIFR, 0x90); /* Clear 'em */ - len = pmu_send(sc, PMU_INT_ACK, 0, NULL, 16, resp); - - mtx_unlock(&sc->sc_mutex); - - if ((len < 1) || (resp[1] == 0)) { - return; - } - - if (resp[1] & PMU_INT_ADB) { - /* - * the PMU will turn off autopolling after each command that - * it did not issue, so we assume any but TALK R0 is ours and - * re-enable autopoll here whenever we receive an ACK for a - * non TR0 command. - */ - mtx_lock(&sc->sc_mutex); - - if ((resp[2] & 0x0f) != (ADB_COMMAND_TALK << 2)) { - if (sc->sc_autopoll) { - uint8_t cmd[] = {0, PMU_SET_POLL_MASK, - (sc->sc_autopoll >> 8) & 0xff, - sc->sc_autopoll & 0xff}; - - pmu_send(sc, PMU_ADB_CMD, 4, cmd, 16, junk); - } - } - - mtx_unlock(&sc->sc_mutex); - - adb_receive_raw_packet(sc->adb_bus,resp[1],resp[2], - len - 3,&resp[3]); - } - if (resp[1] & PMU_INT_ENVIRONMENT) { - /* if the lid was just closed, notify devd. */ - if ((resp[2] & PMU_ENV_LID_CLOSED) && (!sc->lid_closed)) { - sc->lid_closed = 1; - devctl_notify("PMU", "lid", "close", NULL); - } - else if (!(resp[2] & PMU_ENV_LID_CLOSED) && (sc->lid_closed)) { - /* if the lid was just opened, notify devd. */ - sc->lid_closed = 0; - devctl_notify("PMU", "lid", "open", NULL); - } - if (resp[2] & PMU_ENV_POWER) - devctl_notify("PMU", "Button", "pressed", NULL); - } -} - -static u_int -pmu_adb_send(device_t dev, u_char command_byte, int len, u_char *data, - u_char poll) -{ - struct pmu_softc *sc = device_get_softc(dev); - int i,replen; - uint8_t packet[16], resp[16]; - - /* construct an ADB command packet and send it */ - - packet[0] = command_byte; - - packet[1] = 0; - packet[2] = len; - for (i = 0; i < len; i++) - packet[i + 3] = data[i]; - - mtx_lock(&sc->sc_mutex); - replen = pmu_send(sc, PMU_ADB_CMD, len + 3, packet, 16, resp); - mtx_unlock(&sc->sc_mutex); - - if (poll) - pmu_poll(dev); - - return 0; -} - -static u_int -pmu_adb_autopoll(device_t dev, uint16_t mask) -{ - struct pmu_softc *sc = device_get_softc(dev); - - /* magical incantation to re-enable autopolling */ - uint8_t cmd[] = {0, PMU_SET_POLL_MASK, (mask >> 8) & 0xff, mask & 0xff}; - uint8_t resp[16]; - - mtx_lock(&sc->sc_mutex); - - if (sc->sc_autopoll == mask) { - mtx_unlock(&sc->sc_mutex); - return 0; - } - - sc->sc_autopoll = mask & 0xffff; - - if (mask) - pmu_send(sc, PMU_ADB_CMD, 4, cmd, 16, resp); - else - pmu_send(sc, PMU_ADB_POLL_OFF, 0, NULL, 16, resp); - - mtx_unlock(&sc->sc_mutex); - - return 0; -} - -static void -pmu_shutdown(void *xsc, int howto) -{ - struct pmu_softc *sc = xsc; - uint8_t cmd[] = {'M', 'A', 'T', 'T'}; - - if (howto & RB_HALT) - pmu_send(sc, PMU_POWER_OFF, 4, cmd, 0, NULL); - else - pmu_send(sc, PMU_RESET_CPU, 0, NULL, 0, NULL); - - for (;;); -} - -static void -pmu_set_sleepled(void *xsc, int onoff) -{ - struct pmu_softc *sc = xsc; - uint8_t cmd[] = {4, 0, 0}; - - cmd[2] = onoff; - - mtx_lock(&sc->sc_mutex); - pmu_send(sc, PMU_SET_SLEEPLED, 3, cmd, 0, NULL); - mtx_unlock(&sc->sc_mutex); -} - -static int -pmu_server_mode(SYSCTL_HANDLER_ARGS) -{ - struct pmu_softc *sc = arg1; - - u_int server_mode = 0; - uint8_t getcmd[] = {PMU_PWR_GET_POWERUP_EVENTS}; - uint8_t setcmd[] = {0, 0, PMU_PWR_WAKEUP_AC_INSERT}; - uint8_t resp[3]; - int error, len; - - mtx_lock(&sc->sc_mutex); - len = pmu_send(sc, PMU_POWER_EVENTS, 1, getcmd, 3, resp); - mtx_unlock(&sc->sc_mutex); - - if (len == 3) - server_mode = (resp[2] & PMU_PWR_WAKEUP_AC_INSERT) ? 1 : 0; - - error = sysctl_handle_int(oidp, &server_mode, 0, req); - - if (len != 3) - return (EINVAL); - - if (error || !req->newptr) - return (error); - - if (server_mode == 1) - setcmd[0] = PMU_PWR_SET_POWERUP_EVENTS; - else if (server_mode == 0) - setcmd[0] = PMU_PWR_CLR_POWERUP_EVENTS; - else - return (EINVAL); - - setcmd[1] = resp[1]; - - mtx_lock(&sc->sc_mutex); - pmu_send(sc, PMU_POWER_EVENTS, 3, setcmd, 2, resp); - mtx_unlock(&sc->sc_mutex); - - return (0); -} - -static int -pmu_query_battery(struct pmu_softc *sc, int batt, struct pmu_battstate *info) -{ - uint8_t reg; - uint8_t resp[16]; - int len; - - reg = batt + 1; - - mtx_lock(&sc->sc_mutex); - len = pmu_send(sc, PMU_SMART_BATTERY_STATE, 1, ®, 16, resp); - mtx_unlock(&sc->sc_mutex); - - if (len < 3) - return (-1); - - /* All PMU battery info replies share a common header: - * Byte 1 Payload Format - * Byte 2 Battery Flags - */ - - info->state = resp[2]; - - switch (resp[1]) { - case 3: - case 4: - /* - * Formats 3 and 4 appear to be the same: - * Byte 3 Charge - * Byte 4 Max Charge - * Byte 5 Current - * Byte 6 Voltage - */ - - info->charge = resp[3]; - info->maxcharge = resp[4]; - /* Current can be positive or negative */ - info->current = (int8_t)resp[5]; - info->voltage = resp[6]; - break; - case 5: - /* - * Formats 5 is a wider version of formats 3 and 4 - * Byte 3-4 Charge - * Byte 5-6 Max Charge - * Byte 7-8 Current - * Byte 9-10 Voltage - */ - - info->charge = (resp[3] << 8) | resp[4]; - info->maxcharge = (resp[5] << 8) | resp[6]; - /* Current can be positive or negative */ - info->current = (int16_t)((resp[7] << 8) | resp[8]); - info->voltage = (resp[9] << 8) | resp[10]; - break; - default: - device_printf(sc->sc_dev, "Unknown battery info format (%d)!\n", - resp[1]); - return (-1); - } - - return (0); -} - -static void -pmu_battery_notify(struct pmu_battstate *batt, struct pmu_battstate *old) -{ - char notify_buf[16]; - int new_acline, old_acline; - - new_acline = (batt->state & PMU_PWR_AC_PRESENT) ? 1 : 0; - old_acline = (old->state & PMU_PWR_AC_PRESENT) ? 1 : 0; - - if (new_acline != old_acline) { - snprintf(notify_buf, sizeof(notify_buf), - "notify=0x%02x", new_acline); - devctl_notify("PMU", "POWER", "ACLINE", notify_buf); - } -} - -static void -pmu_battquery_proc(void) -{ - struct pmu_softc *sc; - struct pmu_battstate batt; - struct pmu_battstate cur_batt; - int error; - - sc = device_get_softc(pmu); - - bzero(&cur_batt, sizeof(cur_batt)); - while (1) { - kproc_suspend_check(curproc); - error = pmu_query_battery(sc, 0, &batt); - if (error == 0) { - pmu_battery_notify(&batt, &cur_batt); - cur_batt = batt; - } - pause("pmu_batt", hz); - } -} - -static int -pmu_battmon(SYSCTL_HANDLER_ARGS) -{ - struct pmu_softc *sc; - int error, result; - - sc = arg1; - result = pmu_battmon_enabled; - - error = sysctl_handle_int(oidp, &result, 0, req); - - if (error || !req->newptr) - return (error); - - if (!result && pmu_battmon_enabled) - error = kproc_suspend(pmubattproc, hz); - else if (result && pmu_battmon_enabled == 0) - error = kproc_resume(pmubattproc); - pmu_battmon_enabled = (result != 0); - - return (error); -} - -static int -pmu_acline_state(SYSCTL_HANDLER_ARGS) -{ - struct pmu_softc *sc; - struct pmu_battstate batt; - int error, result; - - sc = arg1; - - /* The PMU treats the AC line status as a property of the battery */ - error = pmu_query_battery(sc, 0, &batt); - - if (error != 0) - return (error); - - result = (batt.state & PMU_PWR_AC_PRESENT) ? 1 : 0; - error = sysctl_handle_int(oidp, &result, 0, req); - - return (error); -} - -static int -pmu_battquery_sysctl(SYSCTL_HANDLER_ARGS) -{ - struct pmu_softc *sc; - struct pmu_battstate batt; - int error, result; - - sc = arg1; - - error = pmu_query_battery(sc, arg2 & 0x00ff, &batt); - - if (error != 0) - return (error); - - switch (arg2 & 0xff00) { - case PMU_BATSYSCTL_PRESENT: - result = (batt.state & PMU_PWR_BATT_PRESENT) ? 1 : 0; - break; - case PMU_BATSYSCTL_CHARGING: - result = (batt.state & PMU_PWR_BATT_CHARGING) ? 1 : 0; - break; - case PMU_BATSYSCTL_CHARGE: - result = batt.charge; - break; - case PMU_BATSYSCTL_MAXCHARGE: - result = batt.maxcharge; - break; - case PMU_BATSYSCTL_CURRENT: - result = batt.current; - break; - case PMU_BATSYSCTL_VOLTAGE: - result = batt.voltage; - break; - case PMU_BATSYSCTL_TIME: - /* Time remaining until full charge/discharge, in minutes */ - - if (batt.current >= 0) - result = (batt.maxcharge - batt.charge) /* mAh */ * 60 - / batt.current /* mA */; - else - result = (batt.charge /* mAh */ * 60) - / (-batt.current /* mA */); - break; - case PMU_BATSYSCTL_LIFE: - /* Battery charge fraction, in percent */ - result = (batt.charge * 100) / batt.maxcharge; - break; - default: - /* This should never happen */ - result = -1; - } - - error = sysctl_handle_int(oidp, &result, 0, req); - - return (error); -} - -#define DIFF19041970 2082844800 - -static int -pmu_gettime(device_t dev, struct timespec *ts) -{ - struct pmu_softc *sc = device_get_softc(dev); - uint8_t resp[16]; - uint32_t sec; - - mtx_lock(&sc->sc_mutex); - pmu_send(sc, PMU_READ_RTC, 0, NULL, 16, resp); - mtx_unlock(&sc->sc_mutex); - - memcpy(&sec, &resp[1], 4); - ts->tv_sec = sec - DIFF19041970; - ts->tv_nsec = 0; - - return (0); -} - -static int -pmu_settime(device_t dev, struct timespec *ts) -{ - struct pmu_softc *sc = device_get_softc(dev); - uint32_t sec; - - sec = ts->tv_sec + DIFF19041970; - - mtx_lock(&sc->sc_mutex); - pmu_send(sc, PMU_SET_RTC, sizeof(sec), (uint8_t *)&sec, 0, NULL); - mtx_unlock(&sc->sc_mutex); - - return (0); -} - -int -pmu_set_speed(int low_speed) -{ - struct pmu_softc *sc; - uint8_t sleepcmd[] = {'W', 'O', 'O', 'F', 0}; - uint8_t resp[16]; - - sc = device_get_softc(pmu); - pmu_write_reg(sc, vIER, 0x10); - spinlock_enter(); - mtdec(0x7fffffff); - mb(); - mtdec(0x7fffffff); - - sleepcmd[4] = low_speed; - pmu_send(sc, PMU_CPU_SPEED, 5, sleepcmd, 16, resp); - unin_chip_sleep(NULL, 1); - platform_sleep(); - unin_chip_wake(NULL); - - mtdec(1); /* Force a decrementer exception */ - spinlock_exit(); - pmu_write_reg(sc, vIER, 0x90); - - return (0); -} diff --git a/sys/powerpc/powermac/pmuvar.h b/sys/powerpc/powermac/pmuvar.h deleted file mode 100644 index 06ef3eadc00..00000000000 --- a/sys/powerpc/powermac/pmuvar.h +++ /dev/null @@ -1,178 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Michael Lorenz - * Copyright (c) 2008 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef PMUVAR_H -#define PMUVAR_H - -/* PMU commands */ -#define PMU_POWER_CTRL0 0x10 /* control power of some devices */ -#define PMU_POWER_CTRL 0x11 /* control power of some devices */ - -#define PMU_POWER_OFF 0x7e /* Turn Power off */ -#define PMU_RESET_CPU 0xd0 /* Reset CPU */ - -#define PMU_SET_RTC 0x30 /* Set realtime clock */ -#define PMU_READ_RTC 0x38 /* Read realtime clock */ - -#define PMU_WRITE_PRAM 0x32 /* Write PRAM */ -#define PMU_READ_PRAM 0x3a /* Read PRAM */ - -#define PMU_WRITE_NVRAM 0x33 /* Write NVRAM */ -#define PMU_READ_NVRAM 0x3b /* Read NVRAM */ - -#define PMU_EJECT_PCMCIA 0x4c /* Eject PCMCIA slot */ - -#define PMU_SET_BRIGHTNESS 0x41 /* Set backlight brightness */ -#define PMU_READ_BRIGHTNESS 0xd9 /* Read brightness button position */ - -#define PMU_POWER_EVENTS 0x8f /* Send power-event commands to PMU */ -#define PMU_SYSTEM_READY 0xdf /* tell PMU we are awake */ - -#define PMU_BATTERY_STATE 0x6b /* Read old battery state */ -#define PMU_SMART_BATTERY_STATE 0x6f /* Read battery state */ - -#define PMU_ADB_CMD 0x20 /* Send ADB packet */ -#define PMU_ADB_POLL_OFF 0x21 /* Disable ADB auto-poll */ -#define PMU_SET_VOL 0x40 /* Set volume button position */ -#define PMU_GET_VOL 0x48 /* Get volume button position */ -#define PMU_SET_IMASK 0x70 /* Set interrupt mask */ -#define PMU_INT_ACK 0x78 /* Read interrupt bits */ -#define PMU_CPU_SPEED 0x7d /* Control CPU speed on some models */ -#define PMU_SLEEP 0x7f /* Put CPU to sleep */ -#define PMU_SET_POLL_MASK 0x86 /* - * 16bit mask enables autopolling per - * device - */ -#define PMU_I2C_CMD 0x9a /* i2c commands */ -#define PMU_GET_LID_STATE 0xdc /* Report lid state */ -#define PMU_GET_VERSION 0xea /* Identify thyself */ -#define PMU_SET_SLEEPLED 0xee /* Set sleep LED on/off */ - -/* Bits in PMU interrupt and interrupt mask bytes */ -#define PMU_INT_ADB_AUTO 0x04 /* ADB autopoll, when PMU_INT_ADB */ -#define PMU_INT_PCEJECT 0x04 /* PC-card eject buttons */ -#define PMU_INT_SNDBRT 0x08 /* sound/brightness up/down buttons */ -#define PMU_INT_ADB 0x10 /* ADB autopoll or reply data */ -#define PMU_INT_BATTERY 0x20 -#define PMU_INT_ENVIRONMENT 0x40 -#define PMU_INT_TICK 0x80 /* 1-second tick interrupt */ - -/* Bits to use with the PMU_POWER_CTRL0 command */ -#define PMU_POW0_ON 0x80 /* OR this to power ON the device */ -#define PMU_POW0_OFF 0x00 /* leave bit 7 to 0 to power it OFF */ -#define PMU_POW0_HARD_DRIVE 0x04 /* wallstreet/lombard? */ - -/* Bits to use with the PMU_POWER_CTRL command */ -#define PMU_POW_ON 0x80 /* OR this to power ON the device */ -#define PMU_POW_OFF 0x00 /* leave bit 7 to 0 to power it OFF */ -#define PMU_POW_BACKLIGHT 0x01 /* backlight power */ -#define PMU_POW_CHARGER 0x02 /* battery charger power */ -#define PMU_POW_IRLED 0x04 /* IR led power (on wallstreet) */ -#define PMU_POW_MEDIABAY 0x08 /* media bay power (wallstreet/lombard ?) */ - -/* Bits from PMU_GET_LID_STATE or PMU_INT_ENVIRONMENT on core99 */ -#define PMU_ENV_LID_CLOSED 0x01 /* The lid is closed */ -#define PMU_ENV_POWER 0x08 /* Power Button pressed */ - -/* PMU PMU_POWER_EVENTS commands */ -enum { - PMU_PWR_GET_POWERUP_EVENTS = 0x00, - PMU_PWR_SET_POWERUP_EVENTS = 0x01, - PMU_PWR_CLR_POWERUP_EVENTS = 0x02, - PMU_PWR_GET_WAKEUP_EVENTS = 0x03, - PMU_PWR_SET_WAKEUP_EVENTS = 0x04, - PMU_PWR_CLR_WAKEUP_EVENTS = 0x05, -}; - -/* PMU Power Information */ - -#define PMU_PWR_AC_PRESENT (1 << 0) -#define PMU_PWR_BATT_CHARGING (1 << 1) -#define PMU_PWR_BATT_PRESENT (1 << 2) -#define PMU_PWR_BATT_FULL (1 << 5) -#define PMU_PWR_PCHARGE_RESET (1 << 6) -#define PMU_PWR_BATT_EXIST (1 << 7) - -/* I2C related definitions */ -#define PMU_I2C_MODE_SIMPLE 0 -#define PMU_I2C_MODE_STDSUB 1 -#define PMU_I2C_MODE_COMBINED 2 - -#define PMU_I2C_BUS_STATUS 0 -#define PMU_I2C_BUS_SYSCLK 1 -#define PMU_I2C_BUS_POWER 2 - -#define PMU_I2C_STATUS_OK 0 -#define PMU_I2C_STATUS_DATAREAD 1 -#define PMU_I2C_STATUS_BUSY 0xfe - -/* Power events wakeup bits */ -enum { - PMU_PWR_WAKEUP_KEY = 0x01, /* Wake on key press */ - PMU_PWR_WAKEUP_AC_INSERT = 0x02, /* Wake on AC adapter plug */ - PMU_PWR_WAKEUP_AC_CHANGE = 0x04, - PMU_PWR_WAKEUP_LID_OPEN = 0x08, - PMU_PWR_WAKEUP_RING = 0x10, -}; - -#define PMU_NOTREADY 0x1 /* has not been initialized yet */ -#define PMU_IDLE 0x2 /* the bus is currently idle */ -#define PMU_OUT 0x3 /* sending out a command */ -#define PMU_IN 0x4 /* receiving data */ - -struct pmu_softc { - device_t sc_dev; - int sc_memrid; - struct resource *sc_memr; - int sc_irqrid; - struct resource *sc_irq; - void *sc_ih; - - struct mtx sc_mutex; - device_t adb_bus; - volatile int sc_autopoll; - int sc_batteries; - struct cdev *sc_leddev; - int lid_closed; - uint8_t saved_regs[9]; -}; - -struct pmu_battstate { - int state; - - int charge; - int maxcharge; - int current; - int voltage; -}; - -int pmu_set_speed(int low_speed); - -#endif /* PMUVAR_H */ diff --git a/sys/powerpc/powermac/powermac_thermal.c b/sys/powerpc/powermac/powermac_thermal.c deleted file mode 100644 index e711beca548..00000000000 --- a/sys/powerpc/powermac/powermac_thermal.c +++ /dev/null @@ -1,217 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009-2011 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "powermac_thermal.h" - -/* A 10 second timer for spinning down fans. */ -#define FAN_HYSTERESIS_TIMER 10 - -static void fan_management_proc(void); -static void pmac_therm_manage_fans(void); - -static struct proc *pmac_them_proc; -static int enable_pmac_thermal = 1; - -static struct kproc_desc pmac_therm_kp = { - "pmac_thermal", - fan_management_proc, - &pmac_them_proc -}; - -SYSINIT(pmac_therm_setup, SI_SUB_KTHREAD_IDLE, SI_ORDER_ANY, kproc_start, - &pmac_therm_kp); -SYSCTL_INT(_machdep, OID_AUTO, manage_fans, CTLFLAG_RWTUN, - &enable_pmac_thermal, 1, "Enable automatic fan management"); -static MALLOC_DEFINE(M_PMACTHERM, "pmactherm", "Powermac Thermal Management"); - -struct pmac_fan_le { - struct pmac_fan *fan; - int last_val; - int timer; - SLIST_ENTRY(pmac_fan_le) entries; -}; -struct pmac_sens_le { - struct pmac_therm *sensor; - int last_val; -#define MAX_CRITICAL_COUNT 6 - int critical_count; - SLIST_ENTRY(pmac_sens_le) entries; -}; -static SLIST_HEAD(pmac_fans, pmac_fan_le) fans = SLIST_HEAD_INITIALIZER(fans); -static SLIST_HEAD(pmac_sensors, pmac_sens_le) sensors = - SLIST_HEAD_INITIALIZER(sensors); - -static void -fan_management_proc(void) -{ - /* Nothing to manage? */ - if (SLIST_EMPTY(&fans)) - kproc_exit(0); - - while (1) { - pmac_therm_manage_fans(); - pause("pmac_therm", hz); - } -} - -static void -pmac_therm_manage_fans(void) -{ - struct pmac_sens_le *sensor; - struct pmac_fan_le *fan; - int average_excess, max_excess_zone, frac_excess; - int fan_speed; - int nsens, nsens_zone; - int temp; - - if (!enable_pmac_thermal) - return; - - /* Read all the sensors */ - SLIST_FOREACH(sensor, &sensors, entries) { - temp = sensor->sensor->read(sensor->sensor); - if (temp > 0) /* Use the previous temp in case of error */ - sensor->last_val = temp; - - if (sensor->last_val > sensor->sensor->max_temp) { - sensor->critical_count++; - printf("WARNING: Current temperature (%s: %d.%d C) " - "exceeds critical temperature (%d.%d C); " - "count=%d\n", - sensor->sensor->name, - (sensor->last_val - ZERO_C_TO_K) / 10, - (sensor->last_val - ZERO_C_TO_K) % 10, - (sensor->sensor->max_temp - ZERO_C_TO_K) / 10, - (sensor->sensor->max_temp - ZERO_C_TO_K) % 10, - sensor->critical_count); - if (sensor->critical_count >= MAX_CRITICAL_COUNT) { - printf("WARNING: %s temperature exceeded " - "critical temperature %d times in a row; " - "shutting down!\n", - sensor->sensor->name, - sensor->critical_count); - shutdown_nice(RB_POWEROFF); - } - } else { - if (sensor->critical_count > 0) - sensor->critical_count--; - } - } - - /* Set all the fans */ - SLIST_FOREACH(fan, &fans, entries) { - nsens = nsens_zone = 0; - average_excess = max_excess_zone = 0; - SLIST_FOREACH(sensor, &sensors, entries) { - temp = imin(sensor->last_val, - sensor->sensor->max_temp); - frac_excess = (temp - - sensor->sensor->target_temp)*100 / - (sensor->sensor->max_temp - temp + 1); - if (frac_excess < 0) - frac_excess = 0; - if (sensor->sensor->zone == fan->fan->zone) { - max_excess_zone = imax(max_excess_zone, - frac_excess); - nsens_zone++; - } - average_excess += frac_excess; - nsens++; - } - average_excess /= nsens; - - /* If there are no sensors in this zone, use the average */ - if (nsens_zone == 0) - max_excess_zone = average_excess; - /* No sensors at all? Use default */ - if (nsens == 0) { - fan->fan->set(fan->fan, fan->fan->default_rpm); - continue; - } - - /* - * Scale the fan linearly in the max temperature in its - * thermal zone. - */ - max_excess_zone = imin(max_excess_zone, 100); - fan_speed = max_excess_zone * - (fan->fan->max_rpm - fan->fan->min_rpm)/100 + - fan->fan->min_rpm; - if (fan_speed >= fan->last_val) { - fan->timer = FAN_HYSTERESIS_TIMER; - fan->last_val = fan_speed; - } else { - fan->timer--; - if (fan->timer == 0) { - fan->last_val = fan_speed; - fan->timer = FAN_HYSTERESIS_TIMER; - } - } - fan->fan->set(fan->fan, fan->last_val); - } -} - -void -pmac_thermal_fan_register(struct pmac_fan *fan) -{ - struct pmac_fan_le *list_entry; - - list_entry = malloc(sizeof(struct pmac_fan_le), M_PMACTHERM, - M_ZERO | M_WAITOK); - list_entry->fan = fan; - - SLIST_INSERT_HEAD(&fans, list_entry, entries); -} - -void -pmac_thermal_sensor_register(struct pmac_therm *sensor) -{ - struct pmac_sens_le *list_entry; - - list_entry = malloc(sizeof(struct pmac_sens_le), M_PMACTHERM, - M_ZERO | M_WAITOK); - list_entry->sensor = sensor; - list_entry->last_val = 0; - list_entry->critical_count = 0; - - SLIST_INSERT_HEAD(&sensors, list_entry, entries); -} diff --git a/sys/powerpc/powermac/powermac_thermal.h b/sys/powerpc/powermac/powermac_thermal.h deleted file mode 100644 index 96c6a8adfff..00000000000 --- a/sys/powerpc/powermac/powermac_thermal.h +++ /dev/null @@ -1,56 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009-2011 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _POWERPC_POWERMAC_POWERMAC_THERMAL_H -#define _POWERPC_POWERMAC_POWERMAC_THERMAL_H - -#define ZERO_C_TO_K 2731 - -struct pmac_fan { - int min_rpm, max_rpm, default_rpm; - - char name[32]; - int zone; - - int (*read)(struct pmac_fan *); - int (*set)(struct pmac_fan *, int value); -}; - -struct pmac_therm { - int target_temp, max_temp; /* Tenths of a degree K */ - - char name[32]; - int zone; - - int (*read)(struct pmac_therm *); -}; - -void pmac_thermal_fan_register(struct pmac_fan *); -void pmac_thermal_sensor_register(struct pmac_therm *); - -#endif diff --git a/sys/powerpc/powermac/pswitch.c b/sys/powerpc/powermac/pswitch.c deleted file mode 100644 index fc66703b12e..00000000000 --- a/sys/powerpc/powermac/pswitch.c +++ /dev/null @@ -1,143 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2002 Benno Rice. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include "opt_ddb.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include - -struct pswitch_softc { - int sc_irqrid; - struct resource *sc_irq; - void *sc_ih; -}; - -static int pswitch_probe(device_t); -static int pswitch_attach(device_t); - -static int pswitch_intr(void *); - -static device_method_t pswitch_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, pswitch_probe), - DEVMETHOD(device_attach, pswitch_attach), - { 0, 0 } -}; - -static driver_t pswitch_driver = { - "pswitch", - pswitch_methods, - sizeof(struct pswitch_softc) -}; - -static devclass_t pswitch_devclass; - -DRIVER_MODULE(pswitch, macio, pswitch_driver, pswitch_devclass, 0, 0); - -static int -pswitch_probe(device_t dev) -{ - char *type = macio_get_devtype(dev); - - if (strcmp(type, "gpio") != 0) - return (ENXIO); - - device_set_desc(dev, "GPIO Programmer's Switch"); - return (0); -} - -static int -pswitch_attach(device_t dev) -{ - struct pswitch_softc *sc; - phandle_t node, child; - char type[32]; - u_int irq[2]; - - sc = device_get_softc(dev); - node = macio_get_node(dev); - - for (child = OF_child(node); child != 0; child = OF_peer(child)) { - if (OF_getprop(child, "device_type", type, 32) == -1) - continue; - - if (strcmp(type, "programmer-switch") == 0) - break; - } - - if (child == 0) { - device_printf(dev, "could not find correct node\n"); - return (ENXIO); - } - - if (OF_getprop(child, "interrupts", irq, sizeof(irq)) == -1) { - device_printf(dev, "could not get interrupt\n"); - return (ENXIO); - } - - sc->sc_irqrid = 0; - sc->sc_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->sc_irqrid, - irq[0], irq[0], 1, RF_ACTIVE); - if (sc->sc_irq == NULL) { - device_printf(dev, "could not allocate interrupt\n"); - return (ENXIO); - } - - if (bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC, - pswitch_intr, NULL, dev, &sc->sc_ih) != 0) { - device_printf(dev, "could not setup interrupt\n"); - bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irqrid, - sc->sc_irq); - return (ENXIO); - } - - return (0); -} - -static int -pswitch_intr(void *arg) -{ - device_t dev; - - dev = (device_t)arg; - - kdb_enter(KDB_WHY_POWERPC, device_get_nameunit(dev)); - return (FILTER_HANDLED); -} diff --git a/sys/powerpc/powermac/smu.c b/sys/powerpc/powermac/smu.c deleted file mode 100644 index 2a8dbd27e09..00000000000 --- a/sys/powerpc/powermac/smu.c +++ /dev/null @@ -1,1580 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "clock_if.h" -#include "iicbus_if.h" - -struct smu_cmd { - volatile uint8_t cmd; - uint8_t len; - uint8_t data[254]; - - STAILQ_ENTRY(smu_cmd) cmd_q; -}; - -STAILQ_HEAD(smu_cmdq, smu_cmd); - -struct smu_fan { - struct pmac_fan fan; - device_t dev; - cell_t reg; - - enum { - SMU_FAN_RPM, - SMU_FAN_PWM - } type; - int setpoint; - int old_style; - int rpm; -}; - -/* We can read the PWM and the RPM from a PWM controlled fan. - * Offer both values via sysctl. - */ -enum { - SMU_PWM_SYSCTL_PWM = 1 << 8, - SMU_PWM_SYSCTL_RPM = 2 << 8 -}; - -struct smu_sensor { - struct pmac_therm therm; - device_t dev; - - cell_t reg; - enum { - SMU_CURRENT_SENSOR, - SMU_VOLTAGE_SENSOR, - SMU_POWER_SENSOR, - SMU_TEMP_SENSOR - } type; -}; - -struct smu_softc { - device_t sc_dev; - struct mtx sc_mtx; - - struct resource *sc_memr; - int sc_memrid; - int sc_u3; - - bus_dma_tag_t sc_dmatag; - bus_space_tag_t sc_bt; - bus_space_handle_t sc_mailbox; - - struct smu_cmd *sc_cmd, *sc_cur_cmd; - bus_addr_t sc_cmd_phys; - bus_dmamap_t sc_cmd_dmamap; - struct smu_cmdq sc_cmdq; - - struct smu_fan *sc_fans; - int sc_nfans; - int old_style_fans; - struct smu_sensor *sc_sensors; - int sc_nsensors; - - int sc_doorbellirqid; - struct resource *sc_doorbellirq; - void *sc_doorbellirqcookie; - - struct proc *sc_fanmgt_proc; - time_t sc_lastuserchange; - - /* Calibration data */ - uint16_t sc_cpu_diode_scale; - int16_t sc_cpu_diode_offset; - - uint16_t sc_cpu_volt_scale; - int16_t sc_cpu_volt_offset; - uint16_t sc_cpu_curr_scale; - int16_t sc_cpu_curr_offset; - - uint16_t sc_slots_pow_scale; - int16_t sc_slots_pow_offset; - - struct cdev *sc_leddev; -}; - -/* regular bus attachment functions */ - -static int smu_probe(device_t); -static int smu_attach(device_t); -static const struct ofw_bus_devinfo * - smu_get_devinfo(device_t bus, device_t dev); - -/* cpufreq notification hooks */ - -static void smu_cpufreq_pre_change(device_t, const struct cf_level *level); -static void smu_cpufreq_post_change(device_t, const struct cf_level *level); - -/* clock interface */ -static int smu_gettime(device_t dev, struct timespec *ts); -static int smu_settime(device_t dev, struct timespec *ts); - -/* utility functions */ -static int smu_run_cmd(device_t dev, struct smu_cmd *cmd, int wait); -static int smu_get_datablock(device_t dev, int8_t id, uint8_t *buf, - size_t len); -static void smu_attach_i2c(device_t dev, phandle_t i2croot); -static void smu_attach_fans(device_t dev, phandle_t fanroot); -static void smu_attach_sensors(device_t dev, phandle_t sensroot); -static void smu_set_sleepled(void *xdev, int onoff); -static int smu_server_mode(SYSCTL_HANDLER_ARGS); -static void smu_doorbell_intr(void *xdev); -static void smu_shutdown(void *xdev, int howto); - -/* where to find the doorbell GPIO */ - -static device_t smu_doorbell = NULL; - -static device_method_t smu_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, smu_probe), - DEVMETHOD(device_attach, smu_attach), - - /* Clock interface */ - DEVMETHOD(clock_gettime, smu_gettime), - DEVMETHOD(clock_settime, smu_settime), - - /* ofw_bus interface */ - DEVMETHOD(bus_child_pnpinfo_str,ofw_bus_gen_child_pnpinfo_str), - DEVMETHOD(ofw_bus_get_devinfo, smu_get_devinfo), - DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), - DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), - DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), - DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), - DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), - - { 0, 0 }, -}; - -static driver_t smu_driver = { - "smu", - smu_methods, - sizeof(struct smu_softc) -}; - -static devclass_t smu_devclass; - -DRIVER_MODULE(smu, ofwbus, smu_driver, smu_devclass, 0, 0); -static MALLOC_DEFINE(M_SMU, "smu", "SMU Sensor Information"); - -#define SMU_MAILBOX 0x8000860c -#define SMU_FANMGT_INTERVAL 1000 /* ms */ - -/* Command types */ -#define SMU_ADC 0xd8 -#define SMU_FAN 0x4a -#define SMU_RPM_STATUS 0x01 -#define SMU_RPM_SETPOINT 0x02 -#define SMU_PWM_STATUS 0x11 -#define SMU_PWM_SETPOINT 0x12 -#define SMU_I2C 0x9a -#define SMU_I2C_SIMPLE 0x00 -#define SMU_I2C_NORMAL 0x01 -#define SMU_I2C_COMBINED 0x02 -#define SMU_MISC 0xee -#define SMU_MISC_GET_DATA 0x02 -#define SMU_MISC_LED_CTRL 0x04 -#define SMU_POWER 0xaa -#define SMU_POWER_EVENTS 0x8f -#define SMU_PWR_GET_POWERUP 0x00 -#define SMU_PWR_SET_POWERUP 0x01 -#define SMU_PWR_CLR_POWERUP 0x02 -#define SMU_RTC 0x8e -#define SMU_RTC_GET 0x81 -#define SMU_RTC_SET 0x80 - -/* Power event types */ -#define SMU_WAKEUP_KEYPRESS 0x01 -#define SMU_WAKEUP_AC_INSERT 0x02 -#define SMU_WAKEUP_AC_CHANGE 0x04 -#define SMU_WAKEUP_RING 0x10 - -/* Data blocks */ -#define SMU_CPUTEMP_CAL 0x18 -#define SMU_CPUVOLT_CAL 0x21 -#define SMU_SLOTPW_CAL 0x78 - -/* Partitions */ -#define SMU_PARTITION 0x3e -#define SMU_PARTITION_LATEST 0x01 -#define SMU_PARTITION_BASE 0x02 -#define SMU_PARTITION_UPDATE 0x03 - -static int -smu_probe(device_t dev) -{ - const char *name = ofw_bus_get_name(dev); - - if (strcmp(name, "smu") != 0) - return (ENXIO); - - device_set_desc(dev, "Apple System Management Unit"); - return (0); -} - -static void -smu_phys_callback(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) -{ - struct smu_softc *sc = xsc; - - sc->sc_cmd_phys = segs[0].ds_addr; -} - -static int -smu_attach(device_t dev) -{ - struct smu_softc *sc; - phandle_t node, child; - uint8_t data[12]; - - sc = device_get_softc(dev); - - mtx_init(&sc->sc_mtx, "smu", NULL, MTX_DEF); - sc->sc_cur_cmd = NULL; - sc->sc_doorbellirqid = -1; - - sc->sc_u3 = 0; - if (OF_finddevice("/u3") != -1) - sc->sc_u3 = 1; - - /* - * Map the mailbox area. This should be determined from firmware, - * but I have not found a simple way to do that. - */ - bus_dma_tag_create(NULL, 16, 0, BUS_SPACE_MAXADDR_32BIT, - BUS_SPACE_MAXADDR, NULL, NULL, PAGE_SIZE, 1, PAGE_SIZE, 0, NULL, - NULL, &(sc->sc_dmatag)); - sc->sc_bt = &bs_le_tag; - bus_space_map(sc->sc_bt, SMU_MAILBOX, 4, 0, &sc->sc_mailbox); - - /* - * Allocate the command buffer. This can be anywhere in the low 4 GB - * of memory. - */ - bus_dmamem_alloc(sc->sc_dmatag, (void **)&sc->sc_cmd, BUS_DMA_WAITOK | - BUS_DMA_ZERO, &sc->sc_cmd_dmamap); - bus_dmamap_load(sc->sc_dmatag, sc->sc_cmd_dmamap, - sc->sc_cmd, PAGE_SIZE, smu_phys_callback, sc, 0); - STAILQ_INIT(&sc->sc_cmdq); - - /* - * Set up handlers to change CPU voltage when CPU frequency is changed. - */ - EVENTHANDLER_REGISTER(cpufreq_pre_change, smu_cpufreq_pre_change, dev, - EVENTHANDLER_PRI_ANY); - EVENTHANDLER_REGISTER(cpufreq_post_change, smu_cpufreq_post_change, dev, - EVENTHANDLER_PRI_ANY); - - node = ofw_bus_get_node(dev); - - /* Some SMUs have RPM and PWM controlled fans which do not sit - * under the same node. So we have to attach them separately. - */ - smu_attach_fans(dev, node); - - /* - * Now detect and attach the other child devices. - */ - for (child = OF_child(node); child != 0; child = OF_peer(child)) { - char name[32]; - memset(name, 0, sizeof(name)); - OF_getprop(child, "name", name, sizeof(name)); - - if (strncmp(name, "sensors", 8) == 0) - smu_attach_sensors(dev, child); - - if (strncmp(name, "smu-i2c-control", 15) == 0) - smu_attach_i2c(dev, child); - } - - /* Some SMUs have the I2C children directly under the bus. */ - smu_attach_i2c(dev, node); - - /* - * Collect calibration constants. - */ - smu_get_datablock(dev, SMU_CPUTEMP_CAL, data, sizeof(data)); - sc->sc_cpu_diode_scale = (data[4] << 8) + data[5]; - sc->sc_cpu_diode_offset = (data[6] << 8) + data[7]; - - smu_get_datablock(dev, SMU_CPUVOLT_CAL, data, sizeof(data)); - sc->sc_cpu_volt_scale = (data[4] << 8) + data[5]; - sc->sc_cpu_volt_offset = (data[6] << 8) + data[7]; - sc->sc_cpu_curr_scale = (data[8] << 8) + data[9]; - sc->sc_cpu_curr_offset = (data[10] << 8) + data[11]; - - smu_get_datablock(dev, SMU_SLOTPW_CAL, data, sizeof(data)); - sc->sc_slots_pow_scale = (data[4] << 8) + data[5]; - sc->sc_slots_pow_offset = (data[6] << 8) + data[7]; - - /* - * Set up LED interface - */ - sc->sc_leddev = led_create(smu_set_sleepled, dev, "sleepled"); - - /* - * Reset on power loss behavior - */ - - SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, - "server_mode", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, dev, - 0, smu_server_mode, "I", "Enable reboot after power failure"); - - /* - * Set up doorbell interrupt. - */ - sc->sc_doorbellirqid = 0; - sc->sc_doorbellirq = bus_alloc_resource_any(smu_doorbell, SYS_RES_IRQ, - &sc->sc_doorbellirqid, RF_ACTIVE); - bus_setup_intr(smu_doorbell, sc->sc_doorbellirq, - INTR_TYPE_MISC | INTR_MPSAFE, NULL, smu_doorbell_intr, dev, - &sc->sc_doorbellirqcookie); - powerpc_config_intr(rman_get_start(sc->sc_doorbellirq), - INTR_TRIGGER_EDGE, INTR_POLARITY_LOW); - - /* - * Connect RTC interface. - */ - clock_register(dev, 1000); - - /* - * Learn about shutdown events - */ - EVENTHANDLER_REGISTER(shutdown_final, smu_shutdown, dev, - SHUTDOWN_PRI_LAST); - - return (bus_generic_attach(dev)); -} - -static const struct ofw_bus_devinfo * -smu_get_devinfo(device_t bus, device_t dev) -{ - - return (device_get_ivars(dev)); -} - -static void -smu_send_cmd(device_t dev, struct smu_cmd *cmd) -{ - struct smu_softc *sc; - - sc = device_get_softc(dev); - - mtx_assert(&sc->sc_mtx, MA_OWNED); - - if (sc->sc_u3) - powerpc_pow_enabled = 0; /* SMU cannot work if we go to NAP */ - - sc->sc_cur_cmd = cmd; - - /* Copy the command to the mailbox */ - sc->sc_cmd->cmd = cmd->cmd; - sc->sc_cmd->len = cmd->len; - memcpy(sc->sc_cmd->data, cmd->data, sizeof(cmd->data)); - bus_dmamap_sync(sc->sc_dmatag, sc->sc_cmd_dmamap, BUS_DMASYNC_PREWRITE); - bus_space_write_4(sc->sc_bt, sc->sc_mailbox, 0, sc->sc_cmd_phys); - - /* Flush the cacheline it is in -- SMU bypasses the cache */ - __asm __volatile("sync; dcbf 0,%0; sync" :: "r"(sc->sc_cmd): "memory"); - - /* Ring SMU doorbell */ - macgpio_write(smu_doorbell, GPIO_DDR_OUTPUT); -} - -static void -smu_doorbell_intr(void *xdev) -{ - device_t smu; - struct smu_softc *sc; - int doorbell_ack; - - smu = xdev; - doorbell_ack = macgpio_read(smu_doorbell); - sc = device_get_softc(smu); - - if (doorbell_ack != (GPIO_DDR_OUTPUT | GPIO_LEVEL_RO | GPIO_DATA)) - return; - - mtx_lock(&sc->sc_mtx); - - if (sc->sc_cur_cmd == NULL) /* spurious */ - goto done; - - /* Check result. First invalidate the cache again... */ - __asm __volatile("dcbf 0,%0; sync" :: "r"(sc->sc_cmd) : "memory"); - - bus_dmamap_sync(sc->sc_dmatag, sc->sc_cmd_dmamap, BUS_DMASYNC_POSTREAD); - - sc->sc_cur_cmd->cmd = sc->sc_cmd->cmd; - sc->sc_cur_cmd->len = sc->sc_cmd->len; - memcpy(sc->sc_cur_cmd->data, sc->sc_cmd->data, - sizeof(sc->sc_cmd->data)); - wakeup(sc->sc_cur_cmd); - sc->sc_cur_cmd = NULL; - if (sc->sc_u3) - powerpc_pow_enabled = 1; - - done: - /* Queue next command if one is pending */ - if (STAILQ_FIRST(&sc->sc_cmdq) != NULL) { - sc->sc_cur_cmd = STAILQ_FIRST(&sc->sc_cmdq); - STAILQ_REMOVE_HEAD(&sc->sc_cmdq, cmd_q); - smu_send_cmd(smu, sc->sc_cur_cmd); - } - - mtx_unlock(&sc->sc_mtx); -} - -static int -smu_run_cmd(device_t dev, struct smu_cmd *cmd, int wait) -{ - struct smu_softc *sc; - uint8_t cmd_code; - int error; - - sc = device_get_softc(dev); - cmd_code = cmd->cmd; - - mtx_lock(&sc->sc_mtx); - if (sc->sc_cur_cmd != NULL) { - STAILQ_INSERT_TAIL(&sc->sc_cmdq, cmd, cmd_q); - } else - smu_send_cmd(dev, cmd); - mtx_unlock(&sc->sc_mtx); - - if (!wait) - return (0); - - if (sc->sc_doorbellirqid < 0) { - /* Poll if the IRQ has not been set up yet */ - do { - DELAY(50); - smu_doorbell_intr(dev); - } while (sc->sc_cur_cmd != NULL); - } else { - /* smu_doorbell_intr will wake us when the command is ACK'ed */ - error = tsleep(cmd, 0, "smu", 800 * hz / 1000); - if (error != 0) - smu_doorbell_intr(dev); /* One last chance */ - - if (error != 0) { - mtx_lock(&sc->sc_mtx); - if (cmd->cmd == cmd_code) { /* Never processed */ - /* Abort this command if we timed out */ - if (sc->sc_cur_cmd == cmd) - sc->sc_cur_cmd = NULL; - else - STAILQ_REMOVE(&sc->sc_cmdq, cmd, smu_cmd, - cmd_q); - mtx_unlock(&sc->sc_mtx); - return (error); - } - error = 0; - mtx_unlock(&sc->sc_mtx); - } - } - - /* SMU acks the command by inverting the command bits */ - if (cmd->cmd == ((~cmd_code) & 0xff)) - error = 0; - else - error = EIO; - - return (error); -} - -static int -smu_get_datablock(device_t dev, int8_t id, uint8_t *buf, size_t len) -{ - struct smu_cmd cmd; - uint8_t addr[4]; - - cmd.cmd = SMU_PARTITION; - cmd.len = 2; - cmd.data[0] = SMU_PARTITION_LATEST; - cmd.data[1] = id; - - smu_run_cmd(dev, &cmd, 1); - - addr[0] = addr[1] = 0; - addr[2] = cmd.data[0]; - addr[3] = cmd.data[1]; - - cmd.cmd = SMU_MISC; - cmd.len = 7; - cmd.data[0] = SMU_MISC_GET_DATA; - cmd.data[1] = sizeof(addr); - memcpy(&cmd.data[2], addr, sizeof(addr)); - cmd.data[6] = len; - - smu_run_cmd(dev, &cmd, 1); - memcpy(buf, cmd.data, len); - return (0); -} - -static void -smu_slew_cpu_voltage(device_t dev, int to) -{ - struct smu_cmd cmd; - - cmd.cmd = SMU_POWER; - cmd.len = 8; - cmd.data[0] = 'V'; - cmd.data[1] = 'S'; - cmd.data[2] = 'L'; - cmd.data[3] = 'E'; - cmd.data[4] = 'W'; - cmd.data[5] = 0xff; - cmd.data[6] = 1; - cmd.data[7] = to; - - smu_run_cmd(dev, &cmd, 1); -} - -static void -smu_cpufreq_pre_change(device_t dev, const struct cf_level *level) -{ - /* - * Make sure the CPU voltage is raised before we raise - * the clock. - */ - - if (level->rel_set[0].freq == 10000 /* max */) - smu_slew_cpu_voltage(dev, 0); -} - -static void -smu_cpufreq_post_change(device_t dev, const struct cf_level *level) -{ - /* We are safe to reduce CPU voltage after a downward transition */ - - if (level->rel_set[0].freq < 10000 /* max */) - smu_slew_cpu_voltage(dev, 1); /* XXX: 1/4 voltage for 970MP? */ -} - -/* Routines for probing the SMU doorbell GPIO */ -static int doorbell_probe(device_t dev); -static int doorbell_attach(device_t dev); - -static device_method_t doorbell_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, doorbell_probe), - DEVMETHOD(device_attach, doorbell_attach), - { 0, 0 }, -}; - -static driver_t doorbell_driver = { - "smudoorbell", - doorbell_methods, - 0 -}; - -static devclass_t doorbell_devclass; - -EARLY_DRIVER_MODULE(smudoorbell, macgpio, doorbell_driver, doorbell_devclass, - 0, 0, BUS_PASS_SUPPORTDEV); - -static int -doorbell_probe(device_t dev) -{ - const char *name = ofw_bus_get_name(dev); - - if (strcmp(name, "smu-doorbell") != 0) - return (ENXIO); - - device_set_desc(dev, "SMU Doorbell GPIO"); - device_quiet(dev); - return (0); -} - -static int -doorbell_attach(device_t dev) -{ - smu_doorbell = dev; - return (0); -} - -/* - * Sensor and fan management - */ - -static int -smu_fan_check_old_style(struct smu_fan *fan) -{ - device_t smu = fan->dev; - struct smu_softc *sc = device_get_softc(smu); - struct smu_cmd cmd; - int error; - - if (sc->old_style_fans != -1) - return (sc->old_style_fans); - - /* - * Apple has two fan control mechanisms. We can't distinguish - * them except by seeing if the new one fails. If the new one - * fails, use the old one. - */ - - cmd.cmd = SMU_FAN; - cmd.len = 2; - cmd.data[0] = 0x31; - cmd.data[1] = fan->reg; - - do { - error = smu_run_cmd(smu, &cmd, 1); - } while (error == EWOULDBLOCK); - - sc->old_style_fans = (error != 0); - - return (sc->old_style_fans); -} - -static int -smu_fan_set_rpm(struct smu_fan *fan, int rpm) -{ - device_t smu = fan->dev; - struct smu_cmd cmd; - int error; - - cmd.cmd = SMU_FAN; - error = EIO; - - /* Clamp to allowed range */ - rpm = max(fan->fan.min_rpm, rpm); - rpm = min(fan->fan.max_rpm, rpm); - - smu_fan_check_old_style(fan); - - if (!fan->old_style) { - cmd.len = 4; - cmd.data[0] = 0x30; - cmd.data[1] = fan->reg; - cmd.data[2] = (rpm >> 8) & 0xff; - cmd.data[3] = rpm & 0xff; - - error = smu_run_cmd(smu, &cmd, 1); - if (error && error != EWOULDBLOCK) - fan->old_style = 1; - } else { - cmd.len = 14; - cmd.data[0] = 0x00; /* RPM fan. */ - cmd.data[1] = 1 << fan->reg; - cmd.data[2 + 2*fan->reg] = (rpm >> 8) & 0xff; - cmd.data[3 + 2*fan->reg] = rpm & 0xff; - error = smu_run_cmd(smu, &cmd, 1); - } - - if (error == 0) - fan->setpoint = rpm; - - return (error); -} - -static int -smu_fan_read_rpm(struct smu_fan *fan) -{ - device_t smu = fan->dev; - struct smu_cmd cmd; - int rpm, error; - - smu_fan_check_old_style(fan); - - if (!fan->old_style) { - cmd.cmd = SMU_FAN; - cmd.len = 2; - cmd.data[0] = 0x31; - cmd.data[1] = fan->reg; - - error = smu_run_cmd(smu, &cmd, 1); - if (error && error != EWOULDBLOCK) - fan->old_style = 1; - - rpm = (cmd.data[0] << 8) | cmd.data[1]; - } - - if (fan->old_style) { - cmd.cmd = SMU_FAN; - cmd.len = 1; - cmd.data[0] = SMU_RPM_STATUS; - - error = smu_run_cmd(smu, &cmd, 1); - if (error) - return (error); - - rpm = (cmd.data[fan->reg*2+1] << 8) | cmd.data[fan->reg*2+2]; - } - - return (rpm); -} -static int -smu_fan_set_pwm(struct smu_fan *fan, int pwm) -{ - device_t smu = fan->dev; - struct smu_cmd cmd; - int error; - - cmd.cmd = SMU_FAN; - error = EIO; - - /* Clamp to allowed range */ - pwm = max(fan->fan.min_rpm, pwm); - pwm = min(fan->fan.max_rpm, pwm); - - /* - * Apple has two fan control mechanisms. We can't distinguish - * them except by seeing if the new one fails. If the new one - * fails, use the old one. - */ - - if (!fan->old_style) { - cmd.len = 4; - cmd.data[0] = 0x30; - cmd.data[1] = fan->reg; - cmd.data[2] = (pwm >> 8) & 0xff; - cmd.data[3] = pwm & 0xff; - - error = smu_run_cmd(smu, &cmd, 1); - if (error && error != EWOULDBLOCK) - fan->old_style = 1; - } - - if (fan->old_style) { - cmd.len = 14; - cmd.data[0] = 0x10; /* PWM fan. */ - cmd.data[1] = 1 << fan->reg; - cmd.data[2 + 2*fan->reg] = (pwm >> 8) & 0xff; - cmd.data[3 + 2*fan->reg] = pwm & 0xff; - error = smu_run_cmd(smu, &cmd, 1); - } - - if (error == 0) - fan->setpoint = pwm; - - return (error); -} - -static int -smu_fan_read_pwm(struct smu_fan *fan, int *pwm, int *rpm) -{ - device_t smu = fan->dev; - struct smu_cmd cmd; - int error; - - if (!fan->old_style) { - cmd.cmd = SMU_FAN; - cmd.len = 2; - cmd.data[0] = 0x31; - cmd.data[1] = fan->reg; - - error = smu_run_cmd(smu, &cmd, 1); - if (error && error != EWOULDBLOCK) - fan->old_style = 1; - - *rpm = (cmd.data[0] << 8) | cmd.data[1]; - } - - if (fan->old_style) { - cmd.cmd = SMU_FAN; - cmd.len = 1; - cmd.data[0] = SMU_PWM_STATUS; - - error = smu_run_cmd(smu, &cmd, 1); - if (error) - return (error); - - *rpm = (cmd.data[fan->reg*2+1] << 8) | cmd.data[fan->reg*2+2]; - } - if (fan->old_style) { - cmd.cmd = SMU_FAN; - cmd.len = 14; - cmd.data[0] = SMU_PWM_SETPOINT; - cmd.data[1] = 1 << fan->reg; - - error = smu_run_cmd(smu, &cmd, 1); - if (error) - return (error); - - *pwm = cmd.data[fan->reg*2+2]; - } - return (0); -} - -static int -smu_fanrpm_sysctl(SYSCTL_HANDLER_ARGS) -{ - device_t smu; - struct smu_softc *sc; - struct smu_fan *fan; - int pwm = 0, rpm, error = 0; - - smu = arg1; - sc = device_get_softc(smu); - fan = &sc->sc_fans[arg2 & 0xff]; - - if (fan->type == SMU_FAN_RPM) { - rpm = smu_fan_read_rpm(fan); - if (rpm < 0) - return (rpm); - - error = sysctl_handle_int(oidp, &rpm, 0, req); - } else { - error = smu_fan_read_pwm(fan, &pwm, &rpm); - if (error < 0) - return (EIO); - - switch (arg2 & 0xff00) { - case SMU_PWM_SYSCTL_PWM: - error = sysctl_handle_int(oidp, &pwm, 0, req); - break; - case SMU_PWM_SYSCTL_RPM: - error = sysctl_handle_int(oidp, &rpm, 0, req); - break; - default: - /* This should never happen */ - return (EINVAL); - } - } - /* We can only read the RPM from a PWM controlled fan, so return. */ - if ((arg2 & 0xff00) == SMU_PWM_SYSCTL_RPM) - return (0); - - if (error || !req->newptr) - return (error); - - sc->sc_lastuserchange = time_uptime; - - if (fan->type == SMU_FAN_RPM) - return (smu_fan_set_rpm(fan, rpm)); - else - return (smu_fan_set_pwm(fan, pwm)); -} - -static void -smu_fill_fan_prop(device_t dev, phandle_t child, int id) -{ - struct smu_fan *fan; - struct smu_softc *sc; - char type[32]; - - sc = device_get_softc(dev); - fan = &sc->sc_fans[id]; - - OF_getprop(child, "device_type", type, sizeof(type)); - /* We have either RPM or PWM controlled fans. */ - if (strcmp(type, "fan-rpm-control") == 0) - fan->type = SMU_FAN_RPM; - else - fan->type = SMU_FAN_PWM; - - fan->dev = dev; - fan->old_style = 0; - OF_getprop(child, "reg", &fan->reg, - sizeof(cell_t)); - OF_getprop(child, "min-value", &fan->fan.min_rpm, - sizeof(int)); - OF_getprop(child, "max-value", &fan->fan.max_rpm, - sizeof(int)); - OF_getprop(child, "zone", &fan->fan.zone, - sizeof(int)); - - if (OF_getprop(child, "unmanaged-value", - &fan->fan.default_rpm, - sizeof(int)) != sizeof(int)) - fan->fan.default_rpm = fan->fan.max_rpm; - - OF_getprop(child, "location", fan->fan.name, - sizeof(fan->fan.name)); - - if (fan->type == SMU_FAN_RPM) - fan->setpoint = smu_fan_read_rpm(fan); - else - smu_fan_read_pwm(fan, &fan->setpoint, &fan->rpm); -} - -/* On the first call count the number of fans. In the second call, - * after allocating the fan struct, fill the properties of the fans. - */ -static int -smu_count_fans(device_t dev) -{ - struct smu_softc *sc; - phandle_t child, node, root; - int nfans = 0; - - node = ofw_bus_get_node(dev); - sc = device_get_softc(dev); - - /* First find the fanroots and count the number of fans. */ - for (root = OF_child(node); root != 0; root = OF_peer(root)) { - char name[32]; - memset(name, 0, sizeof(name)); - OF_getprop(root, "name", name, sizeof(name)); - if (strncmp(name, "rpm-fans", 9) == 0 || - strncmp(name, "pwm-fans", 9) == 0 || - strncmp(name, "fans", 5) == 0) - for (child = OF_child(root); child != 0; - child = OF_peer(child)) { - nfans++; - /* When allocated, fill the fan properties. */ - if (sc->sc_fans != NULL) { - smu_fill_fan_prop(dev, child, - nfans - 1); - } - } - } - if (nfans == 0) { - device_printf(dev, "WARNING: No fans detected!\n"); - return (0); - } - return (nfans); -} - -static void -smu_attach_fans(device_t dev, phandle_t fanroot) -{ - struct smu_fan *fan; - struct smu_softc *sc; - struct sysctl_oid *oid, *fanroot_oid; - struct sysctl_ctx_list *ctx; - char sysctl_name[32]; - int i, j; - - sc = device_get_softc(dev); - - /* Get the number of fans. */ - sc->sc_nfans = smu_count_fans(dev); - if (sc->sc_nfans == 0) - return; - - /* Now we're able to allocate memory for the fans struct. */ - sc->sc_fans = malloc(sc->sc_nfans * sizeof(struct smu_fan), M_SMU, - M_WAITOK | M_ZERO); - - /* Now fill in the properties. */ - smu_count_fans(dev); - - /* Register fans with pmac_thermal */ - for (i = 0; i < sc->sc_nfans; i++) - pmac_thermal_fan_register(&sc->sc_fans[i].fan); - - ctx = device_get_sysctl_ctx(dev); - fanroot_oid = SYSCTL_ADD_NODE(ctx, - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "fans", - CTLFLAG_RD | CTLFLAG_MPSAFE, 0, "SMU Fan Information"); - - /* Add sysctls */ - for (i = 0; i < sc->sc_nfans; i++) { - fan = &sc->sc_fans[i]; - for (j = 0; j < strlen(fan->fan.name); j++) { - sysctl_name[j] = tolower(fan->fan.name[j]); - if (isspace(sysctl_name[j])) - sysctl_name[j] = '_'; - } - sysctl_name[j] = 0; - if (fan->type == SMU_FAN_RPM) { - oid = SYSCTL_ADD_NODE(ctx, - SYSCTL_CHILDREN(fanroot_oid), OID_AUTO, - sysctl_name, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, - "Fan Information"); - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "minrpm", CTLFLAG_RD, - &fan->fan.min_rpm, 0, - "Minimum allowed RPM"); - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "maxrpm", CTLFLAG_RD, - &fan->fan.max_rpm, 0, - "Maximum allowed RPM"); - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "rpm",CTLTYPE_INT | CTLFLAG_RW | - CTLFLAG_MPSAFE, dev, i, - smu_fanrpm_sysctl, "I", "Fan RPM"); - - fan->fan.read = (int (*)(struct pmac_fan *))smu_fan_read_rpm; - fan->fan.set = (int (*)(struct pmac_fan *, int))smu_fan_set_rpm; - - } else { - oid = SYSCTL_ADD_NODE(ctx, - SYSCTL_CHILDREN(fanroot_oid), OID_AUTO, - sysctl_name, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, - "Fan Information"); - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "minpwm", CTLFLAG_RD, - &fan->fan.min_rpm, 0, - "Minimum allowed PWM in %"); - SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "maxpwm", CTLFLAG_RD, - &fan->fan.max_rpm, 0, - "Maximum allowed PWM in %"); - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "pwm",CTLTYPE_INT | CTLFLAG_RW | - CTLFLAG_MPSAFE, dev, - SMU_PWM_SYSCTL_PWM | i, - smu_fanrpm_sysctl, "I", "Fan PWM in %"); - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(oid), OID_AUTO, - "rpm",CTLTYPE_INT | CTLFLAG_RD | - CTLFLAG_MPSAFE, dev, - SMU_PWM_SYSCTL_RPM | i, - smu_fanrpm_sysctl, "I", "Fan RPM"); - fan->fan.read = NULL; - fan->fan.set = (int (*)(struct pmac_fan *, int))smu_fan_set_pwm; - } - if (bootverbose) - device_printf(dev, "Fan: %s type: %d\n", - fan->fan.name, fan->type); - } -} - -static int -smu_sensor_read(struct smu_sensor *sens) -{ - device_t smu = sens->dev; - struct smu_cmd cmd; - struct smu_softc *sc; - int64_t value; - int error; - - cmd.cmd = SMU_ADC; - cmd.len = 1; - cmd.data[0] = sens->reg; - error = 0; - - error = smu_run_cmd(smu, &cmd, 1); - if (error != 0) - return (-1); - - sc = device_get_softc(smu); - value = (cmd.data[0] << 8) | cmd.data[1]; - - switch (sens->type) { - case SMU_TEMP_SENSOR: - value *= sc->sc_cpu_diode_scale; - value >>= 3; - value += ((int64_t)sc->sc_cpu_diode_offset) << 9; - value <<= 1; - - /* Convert from 16.16 fixed point degC into integer 0.1 K. */ - value = 10*(value >> 16) + ((10*(value & 0xffff)) >> 16) + 2731; - break; - case SMU_VOLTAGE_SENSOR: - value *= sc->sc_cpu_volt_scale; - value += sc->sc_cpu_volt_offset; - value <<= 4; - - /* Convert from 16.16 fixed point V into mV. */ - value *= 15625; - value /= 1024; - value /= 1000; - break; - case SMU_CURRENT_SENSOR: - value *= sc->sc_cpu_curr_scale; - value += sc->sc_cpu_curr_offset; - value <<= 4; - - /* Convert from 16.16 fixed point A into mA. */ - value *= 15625; - value /= 1024; - value /= 1000; - break; - case SMU_POWER_SENSOR: - value *= sc->sc_slots_pow_scale; - value += sc->sc_slots_pow_offset; - value <<= 4; - - /* Convert from 16.16 fixed point W into mW. */ - value *= 15625; - value /= 1024; - value /= 1000; - break; - } - - return (value); -} - -static int -smu_sensor_sysctl(SYSCTL_HANDLER_ARGS) -{ - device_t smu; - struct smu_softc *sc; - struct smu_sensor *sens; - int value, error; - - smu = arg1; - sc = device_get_softc(smu); - sens = &sc->sc_sensors[arg2]; - - value = smu_sensor_read(sens); - if (value < 0) - return (EBUSY); - - error = sysctl_handle_int(oidp, &value, 0, req); - - return (error); -} - -static void -smu_attach_sensors(device_t dev, phandle_t sensroot) -{ - struct smu_sensor *sens; - struct smu_softc *sc; - struct sysctl_oid *sensroot_oid; - struct sysctl_ctx_list *ctx; - phandle_t child; - char type[32]; - int i; - - sc = device_get_softc(dev); - sc->sc_nsensors = 0; - - for (child = OF_child(sensroot); child != 0; child = OF_peer(child)) - sc->sc_nsensors++; - - if (sc->sc_nsensors == 0) { - device_printf(dev, "WARNING: No sensors detected!\n"); - return; - } - - sc->sc_sensors = malloc(sc->sc_nsensors * sizeof(struct smu_sensor), - M_SMU, M_WAITOK | M_ZERO); - - sens = sc->sc_sensors; - sc->sc_nsensors = 0; - - ctx = device_get_sysctl_ctx(dev); - sensroot_oid = SYSCTL_ADD_NODE(ctx, - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "sensors", - CTLFLAG_RD | CTLFLAG_MPSAFE, 0, "SMU Sensor Information"); - - for (child = OF_child(sensroot); child != 0; child = OF_peer(child)) { - char sysctl_name[40], sysctl_desc[40]; - const char *units; - - sens->dev = dev; - OF_getprop(child, "device_type", type, sizeof(type)); - - if (strcmp(type, "current-sensor") == 0) { - sens->type = SMU_CURRENT_SENSOR; - units = "mA"; - } else if (strcmp(type, "temp-sensor") == 0) { - sens->type = SMU_TEMP_SENSOR; - units = "C"; - } else if (strcmp(type, "voltage-sensor") == 0) { - sens->type = SMU_VOLTAGE_SENSOR; - units = "mV"; - } else if (strcmp(type, "power-sensor") == 0) { - sens->type = SMU_POWER_SENSOR; - units = "mW"; - } else { - continue; - } - - OF_getprop(child, "reg", &sens->reg, sizeof(cell_t)); - OF_getprop(child, "zone", &sens->therm.zone, sizeof(int)); - OF_getprop(child, "location", sens->therm.name, - sizeof(sens->therm.name)); - - for (i = 0; i < strlen(sens->therm.name); i++) { - sysctl_name[i] = tolower(sens->therm.name[i]); - if (isspace(sysctl_name[i])) - sysctl_name[i] = '_'; - } - sysctl_name[i] = 0; - - sprintf(sysctl_desc,"%s (%s)", sens->therm.name, units); - - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(sensroot_oid), OID_AUTO, - sysctl_name, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, - dev, sc->sc_nsensors, smu_sensor_sysctl, - (sens->type == SMU_TEMP_SENSOR) ? "IK" : "I", sysctl_desc); - - if (sens->type == SMU_TEMP_SENSOR) { - /* Make up some numbers */ - sens->therm.target_temp = 500 + 2731; /* 50 C */ - sens->therm.max_temp = 900 + 2731; /* 90 C */ - - sens->therm.read = - (int (*)(struct pmac_therm *))smu_sensor_read; - pmac_thermal_sensor_register(&sens->therm); - } - - sens++; - sc->sc_nsensors++; - } -} - -static void -smu_set_sleepled(void *xdev, int onoff) -{ - static struct smu_cmd cmd; - device_t smu = xdev; - - cmd.cmd = SMU_MISC; - cmd.len = 3; - cmd.data[0] = SMU_MISC_LED_CTRL; - cmd.data[1] = 0; - cmd.data[2] = onoff; - - smu_run_cmd(smu, &cmd, 0); -} - -static int -smu_server_mode(SYSCTL_HANDLER_ARGS) -{ - struct smu_cmd cmd; - u_int server_mode; - device_t smu = arg1; - int error; - - cmd.cmd = SMU_POWER_EVENTS; - cmd.len = 1; - cmd.data[0] = SMU_PWR_GET_POWERUP; - - error = smu_run_cmd(smu, &cmd, 1); - - if (error) - return (error); - - server_mode = (cmd.data[1] & SMU_WAKEUP_AC_INSERT) ? 1 : 0; - - error = sysctl_handle_int(oidp, &server_mode, 0, req); - - if (error || !req->newptr) - return (error); - - if (server_mode == 1) - cmd.data[0] = SMU_PWR_SET_POWERUP; - else if (server_mode == 0) - cmd.data[0] = SMU_PWR_CLR_POWERUP; - else - return (EINVAL); - - cmd.len = 3; - cmd.data[1] = 0; - cmd.data[2] = SMU_WAKEUP_AC_INSERT; - - return (smu_run_cmd(smu, &cmd, 1)); -} - -static void -smu_shutdown(void *xdev, int howto) -{ - device_t smu = xdev; - struct smu_cmd cmd; - - cmd.cmd = SMU_POWER; - if (howto & RB_HALT) - strcpy(cmd.data, "SHUTDOWN"); - else - strcpy(cmd.data, "RESTART"); - - cmd.len = strlen(cmd.data); - - smu_run_cmd(smu, &cmd, 1); - - for (;;); -} - -static int -smu_gettime(device_t dev, struct timespec *ts) -{ - struct smu_cmd cmd; - struct clocktime ct; - - cmd.cmd = SMU_RTC; - cmd.len = 1; - cmd.data[0] = SMU_RTC_GET; - - if (smu_run_cmd(dev, &cmd, 1) != 0) - return (ENXIO); - - ct.nsec = 0; - ct.sec = bcd2bin(cmd.data[0]); - ct.min = bcd2bin(cmd.data[1]); - ct.hour = bcd2bin(cmd.data[2]); - ct.dow = bcd2bin(cmd.data[3]); - ct.day = bcd2bin(cmd.data[4]); - ct.mon = bcd2bin(cmd.data[5]); - ct.year = bcd2bin(cmd.data[6]) + 2000; - - return (clock_ct_to_ts(&ct, ts)); -} - -static int -smu_settime(device_t dev, struct timespec *ts) -{ - static struct smu_cmd cmd; - struct clocktime ct; - - cmd.cmd = SMU_RTC; - cmd.len = 8; - cmd.data[0] = SMU_RTC_SET; - - clock_ts_to_ct(ts, &ct); - - cmd.data[1] = bin2bcd(ct.sec); - cmd.data[2] = bin2bcd(ct.min); - cmd.data[3] = bin2bcd(ct.hour); - cmd.data[4] = bin2bcd(ct.dow); - cmd.data[5] = bin2bcd(ct.day); - cmd.data[6] = bin2bcd(ct.mon); - cmd.data[7] = bin2bcd(ct.year - 2000); - - return (smu_run_cmd(dev, &cmd, 0)); -} - -/* SMU I2C Interface */ - -static int smuiic_probe(device_t dev); -static int smuiic_attach(device_t dev); -static int smuiic_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs); -static phandle_t smuiic_get_node(device_t bus, device_t dev); - -static device_method_t smuiic_methods[] = { - /* device interface */ - DEVMETHOD(device_probe, smuiic_probe), - DEVMETHOD(device_attach, smuiic_attach), - - /* iicbus interface */ - DEVMETHOD(iicbus_callback, iicbus_null_callback), - DEVMETHOD(iicbus_transfer, smuiic_transfer), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_node, smuiic_get_node), - { 0, 0 } -}; - -struct smuiic_softc { - struct mtx sc_mtx; - volatile int sc_iic_inuse; - int sc_busno; -}; - -static driver_t smuiic_driver = { - "iichb", - smuiic_methods, - sizeof(struct smuiic_softc) -}; -static devclass_t smuiic_devclass; - -DRIVER_MODULE(smuiic, smu, smuiic_driver, smuiic_devclass, 0, 0); - -static void -smu_attach_i2c(device_t smu, phandle_t i2croot) -{ - phandle_t child; - device_t cdev; - struct ofw_bus_devinfo *dinfo; - char name[32]; - - for (child = OF_child(i2croot); child != 0; child = OF_peer(child)) { - if (OF_getprop(child, "name", name, sizeof(name)) <= 0) - continue; - - if (strcmp(name, "i2c-bus") != 0 && strcmp(name, "i2c") != 0) - continue; - - dinfo = malloc(sizeof(struct ofw_bus_devinfo), M_SMU, - M_WAITOK | M_ZERO); - if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { - free(dinfo, M_SMU); - continue; - } - - cdev = device_add_child(smu, NULL, -1); - if (cdev == NULL) { - device_printf(smu, "<%s>: device_add_child failed\n", - dinfo->obd_name); - ofw_bus_gen_destroy_devinfo(dinfo); - free(dinfo, M_SMU); - continue; - } - device_set_ivars(cdev, dinfo); - } -} - -static int -smuiic_probe(device_t dev) -{ - const char *name; - - name = ofw_bus_get_name(dev); - if (name == NULL) - return (ENXIO); - - if (strcmp(name, "i2c-bus") == 0 || strcmp(name, "i2c") == 0) { - device_set_desc(dev, "SMU I2C controller"); - return (0); - } - - return (ENXIO); -} - -static int -smuiic_attach(device_t dev) -{ - struct smuiic_softc *sc = device_get_softc(dev); - mtx_init(&sc->sc_mtx, "smuiic", NULL, MTX_DEF); - sc->sc_iic_inuse = 0; - - /* Get our bus number */ - OF_getprop(ofw_bus_get_node(dev), "reg", &sc->sc_busno, - sizeof(sc->sc_busno)); - - /* Add the IIC bus layer */ - device_add_child(dev, "iicbus", -1); - - return (bus_generic_attach(dev)); -} - -static int -smuiic_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs) -{ - struct smuiic_softc *sc = device_get_softc(dev); - struct smu_cmd cmd; - int i, j, error; - - mtx_lock(&sc->sc_mtx); - while (sc->sc_iic_inuse) - mtx_sleep(sc, &sc->sc_mtx, 0, "smuiic", 100); - - sc->sc_iic_inuse = 1; - error = 0; - - for (i = 0; i < nmsgs; i++) { - cmd.cmd = SMU_I2C; - cmd.data[0] = sc->sc_busno; - if (msgs[i].flags & IIC_M_NOSTOP) - cmd.data[1] = SMU_I2C_COMBINED; - else - cmd.data[1] = SMU_I2C_SIMPLE; - - cmd.data[2] = msgs[i].slave; - if (msgs[i].flags & IIC_M_RD) - cmd.data[2] |= 1; - - if (msgs[i].flags & IIC_M_NOSTOP) { - KASSERT(msgs[i].len < 4, - ("oversize I2C combined message")); - - cmd.data[3] = min(msgs[i].len, 3); - memcpy(&cmd.data[4], msgs[i].buf, min(msgs[i].len, 3)); - i++; /* Advance to next part of message */ - } else { - cmd.data[3] = 0; - memset(&cmd.data[4], 0, 3); - } - - cmd.data[7] = msgs[i].slave; - if (msgs[i].flags & IIC_M_RD) - cmd.data[7] |= 1; - - cmd.data[8] = msgs[i].len; - if (msgs[i].flags & IIC_M_RD) { - memset(&cmd.data[9], 0xff, msgs[i].len); - cmd.len = 9; - } else { - memcpy(&cmd.data[9], msgs[i].buf, msgs[i].len); - cmd.len = 9 + msgs[i].len; - } - - mtx_unlock(&sc->sc_mtx); - smu_run_cmd(device_get_parent(dev), &cmd, 1); - mtx_lock(&sc->sc_mtx); - - for (j = 0; j < 10; j++) { - cmd.cmd = SMU_I2C; - cmd.len = 1; - cmd.data[0] = 0; - memset(&cmd.data[1], 0xff, msgs[i].len); - - mtx_unlock(&sc->sc_mtx); - smu_run_cmd(device_get_parent(dev), &cmd, 1); - mtx_lock(&sc->sc_mtx); - - if (!(cmd.data[0] & 0x80)) - break; - - mtx_sleep(sc, &sc->sc_mtx, 0, "smuiic", 10); - } - - if (cmd.data[0] & 0x80) { - error = EIO; - msgs[i].len = 0; - goto exit; - } - memcpy(msgs[i].buf, &cmd.data[1], msgs[i].len); - msgs[i].len = cmd.len - 1; - } - - exit: - sc->sc_iic_inuse = 0; - mtx_unlock(&sc->sc_mtx); - wakeup(sc); - return (error); -} - -static phandle_t -smuiic_get_node(device_t bus, device_t dev) -{ - - return (ofw_bus_get_node(bus)); -} diff --git a/sys/powerpc/powermac/smusat.c b/sys/powerpc/powermac/smusat.c deleted file mode 100644 index 67ff5c00bd2..00000000000 --- a/sys/powerpc/powermac/smusat.c +++ /dev/null @@ -1,292 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include - -struct smu_sensor { - struct pmac_therm therm; - device_t dev; - - cell_t reg; - enum { - SMU_CURRENT_SENSOR, - SMU_VOLTAGE_SENSOR, - SMU_POWER_SENSOR, - SMU_TEMP_SENSOR - } type; -}; - -static int smusat_probe(device_t); -static int smusat_attach(device_t); -static int smusat_sensor_sysctl(SYSCTL_HANDLER_ARGS); -static int smusat_sensor_read(struct smu_sensor *sens); - -static MALLOC_DEFINE(M_SMUSAT, "smusat", "SMU Sattelite Sensors"); - -static device_method_t smusat_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, smusat_probe), - DEVMETHOD(device_attach, smusat_attach), - { 0, 0 }, -}; - -struct smusat_softc { - struct smu_sensor *sc_sensors; - int sc_nsensors; - - uint8_t sc_cache[16]; - time_t sc_last_update; -}; - -static driver_t smusat_driver = { - "smusat", - smusat_methods, - sizeof(struct smusat_softc) -}; - -static devclass_t smusat_devclass; - -DRIVER_MODULE(smusat, iicbus, smusat_driver, smusat_devclass, 0, 0); - -static int -smusat_probe(device_t dev) -{ - const char *compat = ofw_bus_get_compat(dev); - - if (compat == NULL || strcmp(compat, "smu-sat") != 0) - return (ENXIO); - - device_set_desc(dev, "SMU Satellite Sensors"); - return (0); -} - -static int -smusat_attach(device_t dev) -{ - phandle_t child; - struct smu_sensor *sens; - struct smusat_softc *sc; - struct sysctl_oid *sensroot_oid; - struct sysctl_ctx_list *ctx; - char type[32]; - int i; - - sc = device_get_softc(dev); - sc->sc_nsensors = 0; - sc->sc_last_update = 0; - - for (child = OF_child(ofw_bus_get_node(dev)); child != 0; - child = OF_peer(child)) - sc->sc_nsensors++; - - if (sc->sc_nsensors == 0) { - device_printf(dev, "WARNING: No sensors detected!\n"); - return (-1); - } - - sc->sc_sensors = malloc(sc->sc_nsensors * sizeof(struct smu_sensor), - M_SMUSAT, M_WAITOK | M_ZERO); - - sens = sc->sc_sensors; - sc->sc_nsensors = 0; - - ctx = device_get_sysctl_ctx(dev); - sensroot_oid = device_get_sysctl_tree(dev); - - for (child = OF_child(ofw_bus_get_node(dev)); child != 0; - child = OF_peer(child)) { - char sysctl_name[40], sysctl_desc[40]; - const char *units; - - sens->dev = dev; - sens->reg = 0; - OF_getprop(child, "reg", &sens->reg, sizeof(sens->reg)); - if (sens->reg < 0x30) - continue; - sens->reg -= 0x30; - - OF_getprop(child, "zone", &sens->therm.zone, sizeof(int)); - OF_getprop(child, "location", sens->therm.name, - sizeof(sens->therm.name)); - - OF_getprop(child, "device_type", type, sizeof(type)); - - if (strcmp(type, "current-sensor") == 0) { - sens->type = SMU_CURRENT_SENSOR; - units = "mA"; - } else if (strcmp(type, "temp-sensor") == 0) { - sens->type = SMU_TEMP_SENSOR; - units = "C"; - } else if (strcmp(type, "voltage-sensor") == 0) { - sens->type = SMU_VOLTAGE_SENSOR; - units = "mV"; - } else if (strcmp(type, "power-sensor") == 0) { - sens->type = SMU_POWER_SENSOR; - units = "mW"; - } else { - continue; - } - - for (i = 0; i < strlen(sens->therm.name); i++) { - sysctl_name[i] = tolower(sens->therm.name[i]); - if (isspace(sysctl_name[i])) - sysctl_name[i] = '_'; - } - sysctl_name[i] = 0; - - sprintf(sysctl_desc,"%s (%s)", sens->therm.name, units); - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(sensroot_oid), OID_AUTO, - sysctl_name, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, dev, - sc->sc_nsensors, smusat_sensor_sysctl, - (sens->type == SMU_TEMP_SENSOR) ? "IK" : "I", sysctl_desc); - - if (sens->type == SMU_TEMP_SENSOR) { - /* Make up some numbers */ - sens->therm.target_temp = 500 + 2731; /* 50 C */ - sens->therm.max_temp = 900 + 2731; /* 90 C */ - sens->therm.read = - (int (*)(struct pmac_therm *))smusat_sensor_read; - pmac_thermal_sensor_register(&sens->therm); - } - - sens++; - sc->sc_nsensors++; - } - - return (0); -} - -static int -smusat_updatecache(device_t dev) -{ - uint8_t reg = 0x3f; - uint8_t value[16]; - struct smusat_softc *sc = device_get_softc(dev); - int error; - struct iic_msg msgs[2] = { - {0, IIC_M_WR | IIC_M_NOSTOP, 1, ®}, - {0, IIC_M_RD, 16, value}, - }; - - msgs[0].slave = msgs[1].slave = iicbus_get_addr(dev); - error = iicbus_transfer(dev, msgs, 2); - if (error) - return (error); - - sc->sc_last_update = time_uptime; - memcpy(sc->sc_cache, value, sizeof(value)); - return (0); -} - -static int -smusat_sensor_read(struct smu_sensor *sens) -{ - int value, error; - device_t dev; - struct smusat_softc *sc; - - dev = sens->dev; - sc = device_get_softc(dev); - error = 0; - - if (time_uptime - sc->sc_last_update > 1) - error = smusat_updatecache(dev); - if (error) - return (-error); - - value = (sc->sc_cache[sens->reg*2] << 8) + - sc->sc_cache[sens->reg*2 + 1]; - if (value == 0xffff) { - sc->sc_last_update = 0; /* Result was bad, don't cache */ - return (-EINVAL); - } - - switch (sens->type) { - case SMU_TEMP_SENSOR: - /* 16.16 */ - value <<= 10; - /* From 16.16 to 0.1 C */ - value = 10*(value >> 16) + ((10*(value & 0xffff)) >> 16) + 2731; - break; - case SMU_VOLTAGE_SENSOR: - /* 16.16 */ - value <<= 4; - /* Kill the .16 */ - value >>= 16; - break; - case SMU_CURRENT_SENSOR: - /* 16.16 */ - value <<= 8; - /* Kill the .16 */ - value >>= 16; - break; - case SMU_POWER_SENSOR: - /* Doesn't exist */ - break; - } - - return (value); -} - -static int -smusat_sensor_sysctl(SYSCTL_HANDLER_ARGS) -{ - device_t dev; - struct smusat_softc *sc; - struct smu_sensor *sens; - int value, error; - - dev = arg1; - sc = device_get_softc(dev); - sens = &sc->sc_sensors[arg2]; - - value = smusat_sensor_read(sens); - if (value < 0) - return (EBUSY); - - error = sysctl_handle_int(oidp, &value, 0, req); - - return (error); -} diff --git a/sys/powerpc/powermac/uninorth.c b/sys/powerpc/powermac/uninorth.c deleted file mode 100644 index 918fa1f96f5..00000000000 --- a/sys/powerpc/powermac/uninorth.c +++ /dev/null @@ -1,670 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2002 Benno Rice. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include - -#include - -#include - -#include -#include - -/* - * Driver for the Uninorth chip itself. - */ - -static MALLOC_DEFINE(M_UNIN, "unin", "unin device information"); - -/* - * Device interface. - */ - -static int unin_chip_probe(device_t); -static int unin_chip_attach(device_t); - -/* - * Bus interface. - */ -static int unin_chip_print_child(device_t dev, device_t child); -static void unin_chip_probe_nomatch(device_t, device_t); -static struct resource *unin_chip_alloc_resource(device_t, device_t, int, int *, - rman_res_t, rman_res_t, - rman_res_t, u_int); -static int unin_chip_activate_resource(device_t, device_t, int, int, - struct resource *); -static int unin_chip_deactivate_resource(device_t, device_t, int, int, - struct resource *); -static int unin_chip_release_resource(device_t, device_t, int, int, - struct resource *); -static struct resource_list *unin_chip_get_resource_list (device_t, device_t); - -/* - * OFW Bus interface - */ - -static ofw_bus_get_devinfo_t unin_chip_get_devinfo; - -/* - * Local routines - */ - -static void unin_enable_gmac(device_t dev); -static void unin_enable_mpic(device_t dev); - -/* - * Driver methods. - */ -static device_method_t unin_chip_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, unin_chip_probe), - DEVMETHOD(device_attach, unin_chip_attach), - - /* Bus interface */ - DEVMETHOD(bus_print_child, unin_chip_print_child), - DEVMETHOD(bus_probe_nomatch, unin_chip_probe_nomatch), - DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - - DEVMETHOD(bus_alloc_resource, unin_chip_alloc_resource), - DEVMETHOD(bus_release_resource, unin_chip_release_resource), - DEVMETHOD(bus_activate_resource, unin_chip_activate_resource), - DEVMETHOD(bus_deactivate_resource, unin_chip_deactivate_resource), - DEVMETHOD(bus_get_resource_list, unin_chip_get_resource_list), - - DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_devinfo, unin_chip_get_devinfo), - DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), - DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), - DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), - DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), - DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), - { 0, 0 } -}; - -static driver_t unin_chip_driver = { - "unin", - unin_chip_methods, - sizeof(struct unin_chip_softc) -}; - -static devclass_t unin_chip_devclass; - -/* - * Assume there is only one unin chip in a PowerMac, so that pmu.c functions can - * suspend the chip after the whole rest of the device tree is suspended, not - * earlier. - */ -static device_t unin_chip; - -EARLY_DRIVER_MODULE(unin, ofwbus, unin_chip_driver, unin_chip_devclass, 0, 0, - BUS_PASS_BUS); - -/* - * Add an interrupt to the dev's resource list if present - */ -static void -unin_chip_add_intr(phandle_t devnode, struct unin_chip_devinfo *dinfo) -{ - phandle_t iparent; - int *intr; - int i, nintr; - int icells; - - if (dinfo->udi_ninterrupts >= 6) { - printf("unin: device has more than 6 interrupts\n"); - return; - } - - nintr = OF_getprop_alloc_multi(devnode, "interrupts", sizeof(*intr), - (void **)&intr); - if (nintr == -1) { - nintr = OF_getprop_alloc_multi(devnode, "AAPL,interrupts", - sizeof(*intr), (void **)&intr); - if (nintr == -1) - return; - } - - if (intr[0] == -1) - return; - - if (OF_getprop(devnode, "interrupt-parent", &iparent, sizeof(iparent)) - <= 0) - panic("Interrupt but no interrupt parent!\n"); - - if (OF_searchprop(iparent, "#interrupt-cells", &icells, sizeof(icells)) - <= 0) - icells = 1; - - for (i = 0; i < nintr; i+=icells) { - u_int irq = MAP_IRQ(iparent, intr[i]); - - resource_list_add(&dinfo->udi_resources, SYS_RES_IRQ, - dinfo->udi_ninterrupts, irq, irq, 1); - - if (icells > 1) { - powerpc_config_intr(irq, - (intr[i+1] & 1) ? INTR_TRIGGER_LEVEL : - INTR_TRIGGER_EDGE, INTR_POLARITY_LOW); - } - - dinfo->udi_interrupts[dinfo->udi_ninterrupts] = irq; - dinfo->udi_ninterrupts++; - } -} - -static void -unin_chip_add_reg(phandle_t devnode, struct unin_chip_devinfo *dinfo) -{ - struct unin_chip_reg *reg; - int i, nreg; - - nreg = OF_getprop_alloc_multi(devnode, "reg", sizeof(*reg), (void **)®); - if (nreg == -1) - return; - - for (i = 0; i < nreg; i++) { - resource_list_add(&dinfo->udi_resources, SYS_RES_MEMORY, i, - reg[i].mr_base, - reg[i].mr_base + reg[i].mr_size, - reg[i].mr_size); - } -} - -static void -unin_update_reg(device_t dev, uint32_t regoff, uint32_t set, uint32_t clr) -{ - volatile u_int *reg; - struct unin_chip_softc *sc; - u_int32_t tmpl; - - sc = device_get_softc(dev); - reg = (void *)(sc->sc_addr + regoff); - tmpl = inl(reg); - tmpl &= ~clr; - tmpl |= set; - outl(reg, tmpl); -} - -static void -unin_enable_gmac(device_t dev) -{ - unin_update_reg(dev, UNIN_CLOCKCNTL, UNIN_CLOCKCNTL_GMAC, 0); -} - -static void -unin_enable_mpic(device_t dev) -{ - unin_update_reg(dev, UNIN_TOGGLE_REG, UNIN_MPIC_RESET | UNIN_MPIC_OUTPUT_ENABLE, 0); -} - -static int -unin_chip_probe(device_t dev) -{ - const char *name; - - name = ofw_bus_get_name(dev); - - if (name == NULL) - return (ENXIO); - - if (strcmp(name, "uni-n") != 0 && strcmp(name, "u3") != 0 - && strcmp(name, "u4") != 0) - return (ENXIO); - - device_set_desc(dev, "Apple UniNorth System Controller"); - return (0); -} - -static int -unin_chip_attach(device_t dev) -{ - struct unin_chip_softc *sc; - struct unin_chip_devinfo *dinfo; - phandle_t root; - phandle_t child; - phandle_t iparent; - device_t cdev; - cell_t acells, scells; - char compat[32]; - char name[32]; - u_int irq, reg[3]; - int error, i = 0; - - sc = device_get_softc(dev); - root = ofw_bus_get_node(dev); - - if (OF_getprop(root, "reg", reg, sizeof(reg)) < 8) - return (ENXIO); - - acells = scells = 1; - OF_getprop(OF_parent(root), "#address-cells", &acells, sizeof(acells)); - OF_getprop(OF_parent(root), "#size-cells", &scells, sizeof(scells)); - - i = 0; - sc->sc_physaddr = reg[i++]; - if (acells == 2) { - sc->sc_physaddr <<= 32; - sc->sc_physaddr |= reg[i++]; - } - sc->sc_size = reg[i++]; - if (scells == 2) { - sc->sc_size <<= 32; - sc->sc_size |= reg[i++]; - } - - sc->sc_mem_rman.rm_type = RMAN_ARRAY; - sc->sc_mem_rman.rm_descr = "UniNorth Device Memory"; - - error = rman_init(&sc->sc_mem_rman); - - if (error) { - device_printf(dev, "rman_init() failed. error = %d\n", error); - return (error); - } - - error = rman_manage_region(&sc->sc_mem_rman, sc->sc_physaddr, - sc->sc_physaddr + sc->sc_size - 1); - if (error) { - device_printf(dev, - "rman_manage_region() failed. error = %d\n", - error); - return (error); - } - - if (unin_chip == NULL) - unin_chip = dev; - - /* - * Iterate through the sub-devices - */ - for (child = OF_child(root); child != 0; child = OF_peer(child)) { - dinfo = malloc(sizeof(*dinfo), M_UNIN, M_WAITOK | M_ZERO); - if (ofw_bus_gen_setup_devinfo(&dinfo->udi_obdinfo, child) - != 0) - { - free(dinfo, M_UNIN); - continue; - } - - resource_list_init(&dinfo->udi_resources); - dinfo->udi_ninterrupts = 0; - unin_chip_add_intr(child, dinfo); - - /* - * Some Apple machines do have a bug in OF, they miss - * the interrupt entries on the U3 I2C node. That means they - * do not have an entry with number of interrupts nor the - * entry of the interrupt parent handle. - * We define an interrupt and hardwire it to the /u3/mpic - * handle. - */ - - if (OF_getprop(child, "name", name, sizeof(name)) <= 0) - device_printf(dev, "device has no name!\n"); - if (dinfo->udi_ninterrupts == 0 && - (strcmp(name, "i2c-bus") == 0 || - strcmp(name, "i2c") == 0)) { - if (OF_getprop(child, "interrupt-parent", &iparent, - sizeof(iparent)) <= 0) { - iparent = OF_finddevice("/u3/mpic"); - device_printf(dev, "Set /u3/mpic as iparent!\n"); - } - /* Add an interrupt number 0 to the parent. */ - irq = MAP_IRQ(iparent, 0); - resource_list_add(&dinfo->udi_resources, SYS_RES_IRQ, - dinfo->udi_ninterrupts, irq, irq, 1); - dinfo->udi_interrupts[dinfo->udi_ninterrupts] = irq; - dinfo->udi_ninterrupts++; - } - - unin_chip_add_reg(child, dinfo); - - cdev = device_add_child(dev, NULL, -1); - if (cdev == NULL) { - device_printf(dev, "<%s>: device_add_child failed\n", - dinfo->udi_obdinfo.obd_name); - resource_list_free(&dinfo->udi_resources); - ofw_bus_gen_destroy_devinfo(&dinfo->udi_obdinfo); - free(dinfo, M_UNIN); - continue; - } - - device_set_ivars(cdev, dinfo); - } - - /* - * Only map the first page, since that is where the registers - * of interest lie. - */ - sc->sc_addr = (vm_offset_t)pmap_mapdev(sc->sc_physaddr, PAGE_SIZE); - - sc->sc_version = *(u_int *)sc->sc_addr; - device_printf(dev, "Version %d\n", sc->sc_version); - - /* - * Enable the GMAC Ethernet cell and the integrated OpenPIC - * if Open Firmware says they are used. - */ - for (child = OF_child(root); child; child = OF_peer(child)) { - memset(compat, 0, sizeof(compat)); - OF_getprop(child, "compatible", compat, sizeof(compat)); - if (strcmp(compat, "gmac") == 0) - unin_enable_gmac(dev); - if (strcmp(compat, "chrp,open-pic") == 0) - unin_enable_mpic(dev); - } - - /* - * GMAC lives under the PCI bus, so just check if enet is gmac. - */ - child = OF_finddevice("enet"); - memset(compat, 0, sizeof(compat)); - OF_getprop(child, "compatible", compat, sizeof(compat)); - if (strcmp(compat, "gmac") == 0) - unin_enable_gmac(dev); - - return (bus_generic_attach(dev)); -} - -static int -unin_chip_print_child(device_t dev, device_t child) -{ - struct unin_chip_devinfo *dinfo; - struct resource_list *rl; - int retval = 0; - - dinfo = device_get_ivars(child); - rl = &dinfo->udi_resources; - - retval += bus_print_child_header(dev, child); - - retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); - retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); - - retval += bus_print_child_footer(dev, child); - - return (retval); -} - -static void -unin_chip_probe_nomatch(device_t dev, device_t child) -{ - struct unin_chip_devinfo *dinfo; - struct resource_list *rl; - const char *type; - - if (bootverbose) { - dinfo = device_get_ivars(child); - rl = &dinfo->udi_resources; - - if ((type = ofw_bus_get_type(child)) == NULL) - type = "(unknown)"; - device_printf(dev, "<%s, %s>", type, ofw_bus_get_name(child)); - resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); - resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); - printf(" (no driver attached)\n"); - } -} - -static struct resource * -unin_chip_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, - u_int flags) -{ - struct unin_chip_softc *sc; - int needactivate; - struct resource *rv; - struct rman *rm; - u_long adjstart, adjend, adjcount; - struct unin_chip_devinfo *dinfo; - struct resource_list_entry *rle; - - sc = device_get_softc(bus); - dinfo = device_get_ivars(child); - - needactivate = flags & RF_ACTIVE; - flags &= ~RF_ACTIVE; - - switch (type) { - case SYS_RES_MEMORY: - case SYS_RES_IOPORT: - rle = resource_list_find(&dinfo->udi_resources, SYS_RES_MEMORY, - *rid); - if (rle == NULL) { - device_printf(bus, "no rle for %s memory %d\n", - device_get_nameunit(child), *rid); - return (NULL); - } - - rle->end = rle->end - 1; /* Hack? */ - - if (start < rle->start) - adjstart = rle->start; - else if (start > rle->end) - adjstart = rle->end; - else - adjstart = start; - - if (end < rle->start) - adjend = rle->start; - else if (end > rle->end) - adjend = rle->end; - else - adjend = end; - - adjcount = adjend - adjstart; - - rm = &sc->sc_mem_rman; - break; - - case SYS_RES_IRQ: - /* Check for passthrough from subattachments. */ - if (device_get_parent(child) != bus) - return BUS_ALLOC_RESOURCE(device_get_parent(bus), child, - type, rid, start, end, count, - flags); - - rle = resource_list_find(&dinfo->udi_resources, SYS_RES_IRQ, - *rid); - if (rle == NULL) { - if (dinfo->udi_ninterrupts >= 6) { - device_printf(bus, - "%s has more than 6 interrupts\n", - device_get_nameunit(child)); - return (NULL); - } - resource_list_add(&dinfo->udi_resources, SYS_RES_IRQ, - dinfo->udi_ninterrupts, start, start, - 1); - - dinfo->udi_interrupts[dinfo->udi_ninterrupts] = start; - dinfo->udi_ninterrupts++; - } - - return (resource_list_alloc(&dinfo->udi_resources, bus, child, - type, rid, start, end, count, - flags)); - default: - device_printf(bus, "unknown resource request from %s\n", - device_get_nameunit(child)); - return (NULL); - } - - rv = rman_reserve_resource(rm, adjstart, adjend, adjcount, flags, - child); - if (rv == NULL) { - device_printf(bus, - "failed to reserve resource %#lx - %#lx (%#lx)" - " for %s\n", adjstart, adjend, adjcount, - device_get_nameunit(child)); - return (NULL); - } - - rman_set_rid(rv, *rid); - - if (needactivate) { - if (bus_activate_resource(child, type, *rid, rv) != 0) { - device_printf(bus, - "failed to activate resource for %s\n", - device_get_nameunit(child)); - rman_release_resource(rv); - return (NULL); - } - } - - return (rv); -} - -static int -unin_chip_release_resource(device_t bus, device_t child, int type, int rid, - struct resource *res) -{ - if (rman_get_flags(res) & RF_ACTIVE) { - int error = bus_deactivate_resource(child, type, rid, res); - if (error) - return error; - } - - return (rman_release_resource(res)); -} - -static int -unin_chip_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *res) -{ - void *p; - - if (type == SYS_RES_IRQ) - return (bus_activate_resource(bus, type, rid, res)); - - if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { - vm_offset_t start; - - start = (vm_offset_t) rman_get_start(res); - - if (bootverbose) - printf("unin mapdev: start %zx, len %jd\n", start, - rman_get_size(res)); - - p = pmap_mapdev(start, (vm_size_t) rman_get_size(res)); - if (p == NULL) - return (ENOMEM); - rman_set_virtual(res, p); - rman_set_bustag(res, &bs_be_tag); - rman_set_bushandle(res, (u_long)p); - } - - return (rman_activate_resource(res)); -} - -static int -unin_chip_deactivate_resource(device_t bus, device_t child, int type, int rid, - struct resource *res) -{ - /* - * If this is a memory resource, unmap it. - */ - if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { - u_int32_t psize; - - psize = rman_get_size(res); - pmap_unmapdev((vm_offset_t)rman_get_virtual(res), psize); - } - - return (rman_deactivate_resource(res)); -} - -static struct resource_list * -unin_chip_get_resource_list (device_t dev, device_t child) -{ - struct unin_chip_devinfo *dinfo; - - dinfo = device_get_ivars(child); - return (&dinfo->udi_resources); -} - -static const struct ofw_bus_devinfo * -unin_chip_get_devinfo(device_t dev, device_t child) -{ - struct unin_chip_devinfo *dinfo; - - dinfo = device_get_ivars(child); - return (&dinfo->udi_obdinfo); -} - -int -unin_chip_wake(device_t dev) -{ - - if (dev == NULL) - dev = unin_chip; - unin_update_reg(dev, UNIN_PWR_MGMT, UNIN_PWR_NORMAL, UNIN_PWR_MASK); - DELAY(10); - unin_update_reg(dev, UNIN_HWINIT_STATE, UNIN_RUNNING, 0); - DELAY(100); - - return (0); -} - -int -unin_chip_sleep(device_t dev, int idle) -{ - if (dev == NULL) - dev = unin_chip; - - unin_update_reg(dev, UNIN_HWINIT_STATE, UNIN_SLEEPING, 0); - DELAY(10); - if (idle) - unin_update_reg(dev, UNIN_PWR_MGMT, UNIN_PWR_IDLE2, UNIN_PWR_MASK); - else - unin_update_reg(dev, UNIN_PWR_MGMT, UNIN_PWR_SLEEP, UNIN_PWR_MASK); - DELAY(10); - - return (0); -} diff --git a/sys/powerpc/powermac/uninorthpci.c b/sys/powerpc/powermac/uninorthpci.c deleted file mode 100644 index 2fd01042586..00000000000 --- a/sys/powerpc/powermac/uninorthpci.c +++ /dev/null @@ -1,278 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2002 Benno Rice. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include "pcib_if.h" - -#define UNINORTH_DEBUG 0 - -/* - * Device interface. - */ -static int uninorth_probe(device_t); -static int uninorth_attach(device_t); - -/* - * pcib interface. - */ -static u_int32_t uninorth_read_config(device_t, u_int, u_int, u_int, - u_int, int); -static void uninorth_write_config(device_t, u_int, u_int, u_int, - u_int, u_int32_t, int); - -/* - * Local routines. - */ -static int uninorth_enable_config(struct uninorth_softc *, u_int, - u_int, u_int, u_int); - -/* - * Driver methods. - */ -static device_method_t uninorth_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, uninorth_probe), - DEVMETHOD(device_attach, uninorth_attach), - - /* pcib interface */ - DEVMETHOD(pcib_read_config, uninorth_read_config), - DEVMETHOD(pcib_write_config, uninorth_write_config), - - DEVMETHOD_END -}; - -static devclass_t uninorth_devclass; - -DEFINE_CLASS_1(pcib, uninorth_driver, uninorth_methods, - sizeof(struct uninorth_softc), ofw_pci_driver); -EARLY_DRIVER_MODULE(uninorth, ofwbus, uninorth_driver, uninorth_devclass, 0, 0, - BUS_PASS_BUS); - -static int -uninorth_probe(device_t dev) -{ - const char *type, *compatible; - - type = ofw_bus_get_type(dev); - compatible = ofw_bus_get_compat(dev); - - if (type == NULL || compatible == NULL) - return (ENXIO); - - if (strcmp(type, "pci") != 0) - return (ENXIO); - - if (strcmp(compatible, "uni-north") == 0) { - device_set_desc(dev, "Apple UniNorth Host-PCI bridge"); - return (0); - } else if (strcmp(compatible, "u3-agp") == 0) { - device_set_desc(dev, "Apple U3 Host-AGP bridge"); - return (0); - } else if (strcmp(compatible, "u4-pcie") == 0) { - device_set_desc(dev, "IBM CPC945 PCI Express Root"); - return (0); - } - - return (ENXIO); -} - -static int -uninorth_attach(device_t dev) -{ - struct uninorth_softc *sc; - const char *compatible; - const char *name; - phandle_t node; - uint32_t reg[3]; - uint64_t regbase; - cell_t acells; - int unit; - - node = ofw_bus_get_node(dev); - sc = device_get_softc(dev); - name = device_get_name(dev); - unit = device_get_unit(dev); - - if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8) - return (ENXIO); - - sc->sc_ver = 0; - compatible = ofw_bus_get_compat(dev); - if (strcmp(compatible, "u3-agp") == 0) - sc->sc_ver = 3; - if (strcmp(compatible, "u4-pcie") == 0) - sc->sc_ver = 4; - - acells = 1; - OF_getprop(OF_parent(node), "#address-cells", &acells, sizeof(acells)); - - regbase = reg[0]; - if (acells == 2) { - regbase <<= 32; - regbase |= reg[1]; - } - - sc->sc_addr = (vm_offset_t)pmap_mapdev(regbase + 0x800000, PAGE_SIZE); - sc->sc_data = (vm_offset_t)pmap_mapdev(regbase + 0xc00000, PAGE_SIZE); - - if (resource_int_value(name, unit, "skipslot", &sc->sc_skipslot) != 0) - sc->sc_skipslot = -1; - - mtx_init(&sc->sc_cfg_mtx, "uninorth pcicfg", NULL, MTX_SPIN); - - return (ofw_pci_attach(dev)); -} - -static u_int32_t -uninorth_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, - int width) -{ - struct uninorth_softc *sc; - vm_offset_t caoff; - u_int32_t val; - - sc = device_get_softc(dev); - caoff = sc->sc_data + (reg & 0x07); - val = 0xffffffff; - - mtx_lock_spin(&sc->sc_cfg_mtx); - if (uninorth_enable_config(sc, bus, slot, func, reg) != 0) { - switch (width) { - case 1: - val = in8rb(caoff); - break; - case 2: - val = in16rb(caoff); - break; - case 4: - val = in32rb(caoff); - break; - } - } - mtx_unlock_spin(&sc->sc_cfg_mtx); - - return (val); -} - -static void -uninorth_write_config(device_t dev, u_int bus, u_int slot, u_int func, - u_int reg, u_int32_t val, int width) -{ - struct uninorth_softc *sc; - vm_offset_t caoff; - - sc = device_get_softc(dev); - caoff = sc->sc_data + (reg & 0x07); - - mtx_lock_spin(&sc->sc_cfg_mtx); - if (uninorth_enable_config(sc, bus, slot, func, reg)) { - switch (width) { - case 1: - out8rb(caoff, val); - break; - case 2: - out16rb(caoff, val); - break; - case 4: - out32rb(caoff, val); - break; - } - } - mtx_unlock_spin(&sc->sc_cfg_mtx); -} - -static int -uninorth_enable_config(struct uninorth_softc *sc, u_int bus, u_int slot, - u_int func, u_int reg) -{ - uint32_t cfgval; - - mtx_assert(&sc->sc_cfg_mtx, MA_OWNED); - - if (sc->sc_skipslot == slot) - return (0); - - /* - * Issue type 0 configuration space accesses for the root bus. - * - * NOTE: On U4, issue only type 1 accesses. There is a secret - * PCI Express <-> PCI Express bridge not present in the device tree, - * and we need to route all of our configuration space through it. - */ - if (sc->pci_sc.sc_bus == bus && sc->sc_ver < 4) { - /* - * No slots less than 11 on the primary bus on U3 and lower - */ - if (slot < 11) - return (0); - - cfgval = (1 << slot) | (func << 8) | (reg & 0xfc); - } else { - cfgval = (bus << 16) | (slot << 11) | (func << 8) | - (reg & 0xfc) | 1; - } - - /* Set extended register bits on U4 */ - if (sc->sc_ver == 4) - cfgval |= (reg >> 8) << 28; - - do { - out32rb(sc->sc_addr, cfgval); - } while (in32rb(sc->sc_addr) != cfgval); - - return (1); -} diff --git a/sys/powerpc/powermac/uninorthvar.h b/sys/powerpc/powermac/uninorthvar.h deleted file mode 100644 index e4ba6c2a5ff..00000000000 --- a/sys/powerpc/powermac/uninorthvar.h +++ /dev/null @@ -1,108 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2002 Benno Rice. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _POWERPC_POWERMAC_UNINORTHVAR_H_ -#define _POWERPC_POWERMAC_UNINORTHVAR_H_ - -#include -#include -#include - -struct uninorth_softc { - struct ofw_pci_softc pci_sc; - vm_offset_t sc_addr; - vm_offset_t sc_data; - int sc_ver; - int sc_skipslot; - struct mtx sc_cfg_mtx; -}; - -struct unin_chip_softc { - uint64_t sc_physaddr; - uint64_t sc_size; - vm_offset_t sc_addr; - struct rman sc_mem_rman; - int sc_version; -}; - -/* - * Format of a unin reg property entry. - */ -struct unin_chip_reg { - u_int32_t mr_base; - u_int32_t mr_size; -}; - -/* - * Per unin device structure. - */ -struct unin_chip_devinfo { - int udi_interrupts[6]; - int udi_ninterrupts; - int udi_base; - struct ofw_bus_devinfo udi_obdinfo; - struct resource_list udi_resources; -}; - -/* - * Version register - */ -#define UNIN_VERS 0x0 - -/* - * Clock-control register - */ -#define UNIN_CLOCKCNTL 0x20 -#define UNIN_CLOCKCNTL_GMAC 0x2 - -/* - * Power management register - */ -#define UNIN_PWR_MGMT 0x30 -#define UNIN_PWR_NORMAL 0x00 -#define UNIN_PWR_IDLE2 0x01 -#define UNIN_PWR_SLEEP 0x02 -#define UNIN_PWR_SAVE 0x03 -#define UNIN_PWR_MASK 0x03 - -/* - * Hardware initialization state register - */ -#define UNIN_HWINIT_STATE 0x70 -#define UNIN_SLEEPING 0x01 -#define UNIN_RUNNING 0x02 - -/* - * Toggle registers - */ -#define UNIN_TOGGLE_REG 0xe0 -#define UNIN_MPIC_RESET 0x2 -#define UNIN_MPIC_OUTPUT_ENABLE 0x4 - -extern int unin_chip_sleep(device_t dev, int idle); -extern int unin_chip_wake(device_t dev); -#endif /* _POWERPC_POWERMAC_UNINORTHVAR_H_ */ diff --git a/sys/powerpc/powermac/vcoregpio.c b/sys/powerpc/powermac/vcoregpio.c deleted file mode 100644 index fee01cf528a..00000000000 --- a/sys/powerpc/powermac/vcoregpio.c +++ /dev/null @@ -1,112 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2009 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -static int vcoregpio_probe(device_t); -static int vcoregpio_attach(device_t); -static void vcoregpio_pre_change(device_t, const struct cf_level *level); -static void vcoregpio_post_change(device_t, const struct cf_level *level); - -static device_method_t vcoregpio_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, vcoregpio_probe), - DEVMETHOD(device_attach, vcoregpio_attach), - { 0, 0 }, -}; - -static driver_t vcoregpio_driver = { - "vcoregpio", - vcoregpio_methods, - 0 -}; - -static devclass_t vcoregpio_devclass; - -DRIVER_MODULE(vcoregpio, macgpio, vcoregpio_driver, vcoregpio_devclass, 0, 0); - -static int -vcoregpio_probe(device_t dev) -{ - const char *name = ofw_bus_get_name(dev); - - if (strcmp(name, "cpu-vcore-select") != 0) - return (ENXIO); - - device_set_desc(dev, "CPU Core Voltage Control"); - return (0); -} - -static int -vcoregpio_attach(device_t dev) -{ - EVENTHANDLER_REGISTER(cpufreq_pre_change, vcoregpio_pre_change, dev, - EVENTHANDLER_PRI_ANY); - EVENTHANDLER_REGISTER(cpufreq_post_change, vcoregpio_post_change, dev, - EVENTHANDLER_PRI_ANY); - - return (0); -} - -static void -vcoregpio_pre_change(device_t dev, const struct cf_level *level) -{ - if (level->rel_set[0].freq == 10000 /* max */) { - /* - * Make sure the CPU voltage is raised before we raise - * the clock. - */ - macgpio_write(dev, GPIO_DDR_OUTPUT | 1); - DELAY(1000); - } -} - -static void -vcoregpio_post_change(device_t dev, const struct cf_level *level) -{ - if (level->rel_set[0].freq < 10000 /* max */) { - DELAY(1000); - /* We are safe to reduce CPU voltage now */ - macgpio_write(dev, GPIO_DDR_OUTPUT | 0); - } -} diff --git a/sys/powerpc/powermac/viareg.h b/sys/powerpc/powermac/viareg.h deleted file mode 100644 index 6acf01aa7ce..00000000000 --- a/sys/powerpc/powermac/viareg.h +++ /dev/null @@ -1,51 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2008 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _POWERPC_VIAREG_H_ -#define _POWERPC_VIAREG_H_ - -/* VIA interface registers */ -#define vBufB 0x0000 /* register B */ -#define vDirB 0x0400 /* data direction register */ -#define vDirA 0x0600 /* data direction register */ -#define vT1C 0x0800 /* Timer 1 counter Lo */ -#define vT1CH 0x0a00 /* Timer 1 counter Hi */ -#define vSR 0x1400 /* shift register */ -#define vACR 0x1600 /* aux control register */ -#define vPCR 0x1800 /* peripheral control register */ -#define vIFR 0x1a00 /* interrupt flag register */ -#define vIER 0x1c00 /* interrupt enable register */ -#define vBufA 0x1e00 /* register A */ - -#define vPB 0x0000 -#define vPB3 0x08 -#define vPB4 0x10 -#define vPB5 0x20 -#define vSR_INT 0x04 -#define vSR_OUT 0x10 - -#endif /* _POWERPC_VIAREG_H_ */ diff --git a/sys/powerpc/powernv/opal.c b/sys/powerpc/powernv/opal.c deleted file mode 100644 index 9436412328e..00000000000 --- a/sys/powerpc/powernv/opal.c +++ /dev/null @@ -1,63 +0,0 @@ -/*- - * Copyright (C) 2015 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include - -#include "opal.h" - -extern uint64_t opal_entrypoint; -extern uint64_t opal_data; -extern uint64_t opal_msr; - -static int opal_initialized = 0; - -int -opal_check(void) -{ - phandle_t opal; - cell_t val[2]; - - if (opal_initialized) - return (0); - - opal = OF_finddevice("/ibm,opal"); - if (opal == -1) - return (ENOENT); - - if (!OF_hasprop(opal, "opal-base-address") || - !OF_hasprop(opal, "opal-entry-address")) - return (ENOENT); - - OF_getencprop(opal, "opal-base-address", val, sizeof(val)); - opal_data = ((uint64_t)val[0] << 32) | val[1]; - OF_getencprop(opal, "opal-entry-address", val, sizeof(val)); - opal_entrypoint = ((uint64_t)val[0] << 32) | val[1]; - - opal_msr = mfmsr() & ~(PSL_EE | PSL_IR | PSL_DR | PSL_SE | PSL_LE); - - opal_initialized = 1; - - return (0); -} diff --git a/sys/powerpc/powernv/opal.h b/sys/powerpc/powernv/opal.h deleted file mode 100644 index 50a621cd14c..00000000000 --- a/sys/powerpc/powernv/opal.h +++ /dev/null @@ -1,252 +0,0 @@ -/*- - * Copyright (c) 2015 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _POWERNV_OPAL_H -#define _POWERNV_OPAL_H - -#include -#include -#include - -/* Check if OPAL is correctly instantiated. Will try to instantiate it. */ -int opal_check(void); - -/* Call an OPAL method. Any pointers passed must be real-mode accessible! */ -int opal_call(uint64_t token, ...); - -#define OPAL_CONSOLE_WRITE 1 -#define OPAL_CONSOLE_READ 2 -#define OPAL_RTC_READ 3 -#define OPAL_RTC_WRITE 4 -#define OPAL_CEC_POWER_DOWN 5 -#define OPAL_CEC_REBOOT 6 -#define OPAL_READ_NVRAM 7 -#define OPAL_WRITE_NVRAM 8 -#define OPAL_HANDLE_INTERRUPT 9 -#define OPAL_POLL_EVENTS 10 -#define OPAL_PCI_CONFIG_READ_BYTE 13 -#define OPAL_PCI_CONFIG_READ_HALF_WORD 14 -#define OPAL_PCI_CONFIG_READ_WORD 15 -#define OPAL_PCI_CONFIG_WRITE_BYTE 16 -#define OPAL_PCI_CONFIG_WRITE_HALF_WORD 17 -#define OPAL_PCI_CONFIG_WRITE_WORD 18 -#define OPAL_PCI_EEH_FREEZE_STATUS 23 -#define OPAL_CONSOLE_WRITE_BUFFER_SPACE 25 -#define OPAL_PCI_EEH_FREEZE_CLEAR 26 -#define OPAL_PCI_PHB_MMIO_ENABLE 27 -#define OPAL_PCI_SET_PHB_MEM_WINDOW 28 -#define OPAL_PCI_MAP_PE_MMIO_WINDOW 29 -#define OPAL_PCI_SET_XIVE_PE 37 -#define OPAL_PCI_RESET 49 -#define OPAL_PCI_POLL 62 -#define OPAL_SET_XIVE 19 -#define OPAL_GET_XIVE 20 -#define OPAL_PCI_SET_PE 31 -#define OPAL_GET_MSI_32 39 -#define OPAL_GET_MSI_64 40 -#define OPAL_PCI_MSI_EOI 63 -#define OPAL_PCI_GET_PHB_DIAG_DATA2 64 -#define OPAL_START_CPU 41 -#define OPAL_PCI_MAP_PE_DMA_WINDOW 44 -#define OPAL_PCI_MAP_PE_DMA_WINDOW_REAL 45 -#define OPAL_RETURN_CPU 69 -#define OPAL_REINIT_CPUS 70 -#define OPAL_CHECK_TOKEN 80 -#define OPAL_GET_MSG 85 -#define OPAL_CHECK_ASYNC_COMPLETION 86 -#define OPAL_SENSOR_READ 88 -#define OPAL_HANDLE_HMI 98 -#define OPAL_IPMI_SEND 107 -#define OPAL_IPMI_RECV 108 -#define OPAL_I2C_REQUEST 109 -#define OPAL_FLASH_READ 110 -#define OPAL_FLASH_WRITE 111 -#define OPAL_FLASH_ERASE 112 -#define OPAL_INT_GET_XIRR 122 -#define OPAL_INT_SET_CPPR 123 -#define OPAL_INT_EOI 124 -#define OPAL_INT_SET_MFRR 125 -#define OPAL_PCI_TCE_KILL 126 -#define OPAL_NMMU_SET_PTCR 127 -#define OPAL_XIVE_RESET 128 -#define OPAL_XIVE_GET_IRQ_INFO 129 -#define OPAL_XIVE_GET_IRQ_CONFIG 130 -#define OPAL_XIVE_SET_IRQ_CONFIG 131 -#define OPAL_XIVE_GET_QUEUE_INFO 132 -#define OPAL_XIVE_SET_QUEUE_INFO 133 -#define OPAL_XIVE_DONATE_PAGE 134 -#define OPAL_XIVE_ALLOCATE_VP_BLOCK 135 -#define OPAL_XIVE_FREE_VP_BLOCK 136 -#define OPAL_XIVE_GET_VP_INFO 137 -#define OPAL_XIVE_SET_VP_INFO 138 -#define OPAL_XIVE_ALLOCATE_IRQ 139 -#define OPAL_XIVE_FREE_IRQ 140 -#define OPAL_XIVE_SYNC 141 -#define OPAL_XIVE_DUMP 142 -#define OPAL_SENSOR_GROUP_CLEAR 156 -#define OPAL_SENSOR_READ_U64 162 -#define OPAL_SENSOR_GROUP_ENABLE 163 -#define OPAL_HANDLE_HMI2 166 - -/* For OPAL_PCI_SET_PE */ -#define OPAL_UNMAP_PE 0 -#define OPAL_MAP_PE 1 - -#define OPAL_PCI_BUS_ANY 0 -#define OPAL_PCI_BUS_3BITS 2 -#define OPAL_PCI_BUS_4BITS 3 -#define OPAL_PCI_BUS_5BITS 4 -#define OPAL_PCI_BUS_6BITS 5 -#define OPAL_PCI_BUS_7BITS 6 -#define OPAL_PCI_BUS_ALL 7 /* Match bus number exactly */ - -#define OPAL_IGNORE_RID_DEVICE_NUMBER 0 -#define OPAL_COMPARE_RID_DEVICE_NUMBER 1 - -#define OPAL_IGNORE_RID_FUNC_NUMBER 0 -#define OPAL_COMPARE_RID_FUNC_NUMBER 1 - -/* For OPAL_PCI_TCE_KILL */ -#define OPAL_PCI_TCE_KILL_PAGE 0 -#define OPAL_PCI_TCE_KILL_PE 1 -#define OPAL_PCI_TCE_KILL_ALL 2 - -#define OPAL_SUCCESS 0 -#define OPAL_PARAMETER -1 -#define OPAL_BUSY -2 -#define OPAL_PARTIAL -3 -#define OPAL_CONSTRAINED -4 -#define OPAL_CLOSED -5 -#define OPAL_HARDWARE -6 -#define OPAL_UNSUPPORTED -7 -#define OPAL_PERMISSION -8 -#define OPAL_NO_MEM -9 -#define OPAL_RESOURCE -10 -#define OPAL_INTERNAL_ERROR -11 -#define OPAL_BUSY_EVENT -12 -#define OPAL_HARDWARE_FROZEN -13 -#define OPAL_WRONG_STATE -14 -#define OPAL_ASYNC_COMPLETION -15 -#define OPAL_EMPTY -16 -#define OPAL_I2C_TIMEOUT -17 -#define OPAL_I2C_INVALID_CMD -18 -#define OPAL_I2C_LBUS_PARITY -19 -#define OPAL_I2C_BKEND_OVERRUN -20 -#define OPAL_I2C_BKEND_ACCESS -21 -#define OPAL_I2C_ARBT_LOST -22 -#define OPAL_I2C_NACK_RCVD -23 -#define OPAL_I2C_STOP_ERR -24 -#define OPAL_XSCOM_PARTIAL_GOOD -25 -#define OPAL_XSCOM_ADDR_ERROR -26 -#define OPAL_XSCOM_CLOCK_ERROR -27 -#define OPAL_XSCOM_PARITY_ERROR -28 -#define OPAL_XSCOM_TIMEOUT -29 -#define OPAL_XSCOM_CTR_OFFLINED -30 -#define OPAL_XIVE_PROVISIONING -31 -#define OPAL_XIVE_FREE_ACTIVE -32 -#define OPAL_TIMEOUT -33 - -#define OPAL_TOKEN_ABSENT 0 -#define OPAL_TOKEN_PRESENT 1 - -#define OPAL_EVENT_OPAL_INTERNAL 0x1 -#define OPAL_EVENT_NVRAM 0x2 -#define OPAL_EVENT_RTC 0x4 -#define OPAL_EVENT_CONSOLE_INPUT 0x8 -#define OPAL_EVENT_CONSOLE_OUTPUT 0x10 -#define OPAL_EVENT_ERROR_LOG_AVAIL 0x20 -#define OPAL_EVENT_ERROR_LOG 0x40 -#define OPAL_EVENT_EPOW 0x80 -#define OPAL_EVENT_LED_STATUS 0x100 -#define OPAL_EVENT_PCI_ERROR 0x200 -#define OPAL_EVENT_DUMP_AVAIL 0x400 -#define OPAL_EVENT_MSG_PENDING 0x800 - -#define OPAL_HMI_FLAGS_TB_RESYNC (1ull << 0) -#define OPAL_HMI_FLAGS_DEC_LOST (1ull << 1) -#define OPAL_HMI_FLAGS_HDEC_LOST (1ull << 2) -#define OPAL_HMI_FLAGS_TOD_TB_FAIL (1ull << 3) -#define OPAL_HMI_FLAGS_NEW_EVENT (1ull << 63) - -#define OPAL_XIVE_XICS_MODE_EMU 0 -#define OPAL_XIVE_XICS_MODE_EXP 1 - -#define OPAL_XIVE_SYNC_EAS 0x00000001 -#define OPAL_XIVE_SYNC_QUEUE 0x00000002 - -#define OPAL_XIVE_VP_ENABLED 0x00000001 -#define OPAL_XIVE_VP_SINGLE_ESCALATION 0x00000002 - -#define OPAL_XIVE_EQ_ENABLED 0x00000001 -#define OPAL_XIVE_EQ_ALWAYS_NOTIFY 0x00000002 -#define OPAL_XIVE_EQ_ESCALATE 0x00000004 - -struct opal_msg { - uint32_t msg_type; - uint32_t reserved; - uint64_t params[8]; -}; - -enum opal_msg_type { - OPAL_MSG_ASYNC_COMP = 0, - OPAL_MSG_MEM_ERR = 1, - OPAL_MSG_EPOW = 2, - OPAL_MSG_SHUTDOWN = 3, - OPAL_MSG_HMI_EVT = 4, - OPAL_MSG_DPO = 5, - OPAL_MSG_PRD = 6, - OPAL_MSG_OCC = 7, - OPAL_MSG_TYPE_MAX, -}; - -#define OPAL_IPMI_MSG_FORMAT_VERSION_1 1 - -struct opal_ipmi_msg { - uint8_t version; - uint8_t netfn; - uint8_t cmd; - uint8_t data[]; -}; - -int opal_init_async_tokens(int); -int opal_alloc_async_token(void); -void opal_free_async_token(int); -int opal_wait_completion(void *, uint64_t, int); - -typedef void (*opal_msg_handler_fn)(void *, struct opal_msg *); -EVENTHANDLER_DECLARE(OPAL_ASYNC_COMP, opal_msg_handler_fn); -EVENTHANDLER_DECLARE(OPAL_EPOW, opal_msg_handler_fn); -EVENTHANDLER_DECLARE(OPAL_SHUTDOWN, opal_msg_handler_fn); -EVENTHANDLER_DECLARE(OPAL_HMI_EVT, opal_msg_handler_fn); -EVENTHANDLER_DECLARE(OPAL_DPO, opal_msg_handler_fn); -EVENTHANDLER_DECLARE(OPAL_OCC, opal_msg_handler_fn); -EVENTHANDLER_LIST_DECLARE(OPAL_ASYNC_COMP); -EVENTHANDLER_LIST_DECLARE(OPAL_EPOW); -EVENTHANDLER_LIST_DECLARE(OPAL_SHUTDOWN); -EVENTHANDLER_LIST_DECLARE(OPAL_HMI_EVT); -EVENTHANDLER_LIST_DECLARE(OPAL_DPO); -EVENTHANDLER_LIST_DECLARE(OPAL_OCC); -#endif diff --git a/sys/powerpc/powernv/opal_async.c b/sys/powerpc/powernv/opal_async.c deleted file mode 100644 index 45329879b15..00000000000 --- a/sys/powerpc/powernv/opal_async.c +++ /dev/null @@ -1,127 +0,0 @@ -/*- - * Copyright (C) 2019 Justin Hibbits - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include "opal.h" - -#include - -/* - * Manage asynchronous tokens for the OPAL abstraction layer. - * - * Only a finite number of in-flight tokens are supported by OPAL, so we must be - * careful managing this. The basic design uses the vmem subsystem as a general - * purpose allocator, with wrappers to manage expected behaviors and - * requirements. - */ -static vmem_t *async_token_pool; - -static void opal_handle_async_completion(void *, struct opal_msg *); - -struct async_completion { - volatile uint64_t completed; - struct opal_msg msg; -}; - -struct async_completion *completions; - -/* Setup the token pool. */ -int -opal_init_async_tokens(int count) -{ - /* Only allow one initialization */ - if (async_token_pool != NULL) - return (EINVAL); - - async_token_pool = vmem_create("OPAL Async", 0, count, 1, 1, - M_WAITOK | M_FIRSTFIT); - completions = malloc(count * sizeof(struct async_completion), - M_DEVBUF, M_WAITOK | M_ZERO); - - EVENTHANDLER_REGISTER(OPAL_ASYNC_COMP, opal_handle_async_completion, - NULL, EVENTHANDLER_PRI_ANY); - - return (0); -} - -int -opal_alloc_async_token(void) -{ - vmem_addr_t token; - - vmem_alloc(async_token_pool, 1, M_FIRSTFIT | M_WAITOK, &token); - completions[token].completed = false; - - return (token); -} - -void -opal_free_async_token(int token) -{ - - vmem_free(async_token_pool, token, 1); -} - -/* - * Wait for the operation watched by the token to complete. Return the result - * of the operation, error if it returns early. - */ -int -opal_wait_completion(void *buf, uint64_t size, int token) -{ - int err; - - do { - err = opal_call(OPAL_CHECK_ASYNC_COMPLETION, - vtophys(buf), size, token); - if (err == OPAL_BUSY) { - if (completions[token].completed) { - atomic_thread_fence_acq(); - memcpy(buf, &completions[token].msg, size); - return (OPAL_SUCCESS); - } - } - DELAY(100); - } while (err == OPAL_BUSY); - - return (err); -} - -static void opal_handle_async_completion(void *arg, struct opal_msg *msg) -{ - int token; - - token = msg->params[0]; - memcpy(&completions[token].msg, msg, sizeof(*msg)); - atomic_thread_fence_rel(); - completions[token].completed = true; -} diff --git a/sys/powerpc/powernv/opal_console.c b/sys/powerpc/powernv/opal_console.c deleted file mode 100644 index be122a1d03c..00000000000 --- a/sys/powerpc/powernv/opal_console.c +++ /dev/null @@ -1,614 +0,0 @@ -/*- - * Copyright (C) 2011,2015 by Nathan Whitehorn. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include -#include -#include - -#include "opal.h" -#include "uart_if.h" - -struct uart_opal_softc { - device_t dev; - phandle_t node; - int vtermid; - - struct tty *tp; - struct resource *irqres; - int irqrid; - struct callout callout; - void *sc_icookie; - int polltime; - - struct mtx sc_mtx; - int protocol; - - char opal_inbuf[16]; - uint64_t inbuflen; - uint8_t outseqno; -#if defined(KDB) - int alt_break_state; -#endif -}; - -static struct uart_opal_softc *console_sc = NULL; -static struct consdev *stdout_cp; - -enum { - OPAL_RAW, OPAL_HVSI -}; - -#define VS_DATA_PACKET_HEADER 0xff -#define VS_CONTROL_PACKET_HEADER 0xfe -#define VSV_SET_MODEM_CTL 0x01 -#define VSV_MODEM_CTL_UPDATE 0x02 -#define VSV_RENEGOTIATE_CONNECTION 0x03 -#define VS_QUERY_PACKET_HEADER 0xfd -#define VSV_SEND_VERSION_NUMBER 0x01 -#define VSV_SEND_MODEM_CTL_STATUS 0x02 -#define VS_QUERY_RESPONSE_PACKET_HEADER 0xfc - -static int uart_opal_probe(device_t dev); -static int uart_opal_attach(device_t dev); -static void uart_opal_intr(void *v); - -static device_method_t uart_opal_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, uart_opal_probe), - DEVMETHOD(device_attach, uart_opal_attach), - - DEVMETHOD_END -}; - -static driver_t uart_opal_driver = { - "uart", - uart_opal_methods, - sizeof(struct uart_opal_softc), -}; - -DRIVER_MODULE(uart_opal, opalcons, uart_opal_driver, uart_devclass, 0, 0); - -static int uart_opal_getc(struct uart_opal_softc *sc); -static cn_probe_t uart_opal_cnprobe; -static cn_init_t uart_opal_cninit; -static cn_term_t uart_opal_cnterm; -static cn_getc_t uart_opal_cngetc; -static cn_putc_t uart_opal_cnputc; -static cn_grab_t uart_opal_cngrab; -static cn_ungrab_t uart_opal_cnungrab; - -CONSOLE_DRIVER(uart_opal); - -static void uart_opal_ttyoutwakeup(struct tty *tp); - -static struct ttydevsw uart_opal_tty_class = { - .tsw_flags = TF_INITLOCK|TF_CALLOUT, - .tsw_outwakeup = uart_opal_ttyoutwakeup, -}; - -static struct { - char tmpbuf[16]; - uint64_t size; - struct mtx mtx; -} opalcons_buffer; - -static void -uart_opal_real_map_outbuffer(uint64_t *bufferp, uint64_t *lenp) -{ - - if (!mtx_initialized(&opalcons_buffer.mtx)) - mtx_init(&opalcons_buffer.mtx, "uart_opal", NULL, - MTX_SPIN | MTX_QUIET | MTX_NOWITNESS); - - if (!pmap_bootstrapped) - return; - - mtx_lock_spin(&opalcons_buffer.mtx); - - opalcons_buffer.size = *(uint64_t *)(*lenp) = - min(sizeof(opalcons_buffer.tmpbuf), *(uint64_t *)(*lenp)); - memcpy(opalcons_buffer.tmpbuf, (void *)(*bufferp), - *(uint64_t *)(*lenp)); - *bufferp = (uint64_t)opalcons_buffer.tmpbuf; - *lenp = (uint64_t)&opalcons_buffer.size; -} - -static void -uart_opal_real_unmap_outbuffer(uint64_t *len) -{ - - if (!pmap_bootstrapped) - return; - - mtx_assert(&opalcons_buffer.mtx, MA_OWNED); - *len = opalcons_buffer.size; - mtx_unlock_spin(&opalcons_buffer.mtx); -} - -static int64_t -uart_opal_console_write_buffer_space(int vtermid) -{ - int64_t buffer_space_val = 0; - vm_paddr_t buffer_space_ptr; - - if (pmap_bootstrapped) - buffer_space_ptr = vtophys(&buffer_space_val); - else - buffer_space_ptr = (vm_paddr_t)&buffer_space_val; - - if (opal_call(OPAL_CONSOLE_WRITE_BUFFER_SPACE, vtermid, - buffer_space_ptr) != OPAL_SUCCESS) - return (-1); - - return (be64toh(buffer_space_val)); -} - -static int -uart_opal_probe_node(struct uart_opal_softc *sc) -{ - phandle_t node = sc->node; - uint32_t reg; - char buf[64]; - - sc->inbuflen = 0; - sc->outseqno = 0; - - if (OF_getprop(node, "device_type", buf, sizeof(buf)) <= 0) - return (ENXIO); - if (strcmp(buf, "serial") != 0) - return (ENXIO); - - reg = -1; - OF_getencprop(node, "reg", ®, sizeof(reg)); - if (reg == -1) - return (ENXIO); - sc->vtermid = reg; - sc->node = node; - - if (OF_getprop(node, "compatible", buf, sizeof(buf)) <= 0) - return (ENXIO); - if (strcmp(buf, "ibm,opal-console-raw") == 0) { - sc->protocol = OPAL_RAW; - return (0); - } else if (strcmp(buf, "ibm,opal-console-hvsi") == 0) { - sc->protocol = OPAL_HVSI; - return (0); - } - - return (ENXIO); -} - -static int -uart_opal_probe(device_t dev) -{ - struct uart_opal_softc sc; - int err; - - sc.node = ofw_bus_get_node(dev); - err = uart_opal_probe_node(&sc); - if (err != 0) - return (err); - - device_set_desc(dev, "OPAL Serial Port"); - - return (err); -} - -static void -uart_opal_cnprobe(struct consdev *cp) -{ - char buf[64]; - phandle_t input, chosen; - static struct uart_opal_softc sc; - - if (opal_check() != 0) - goto fail; - - if ((chosen = OF_finddevice("/chosen")) == -1) - goto fail; - - /* Check if OF has an active stdin/stdout */ - if (OF_getprop(chosen, "linux,stdout-path", buf, sizeof(buf)) <= 0) - goto fail; - - input = OF_finddevice(buf); - if (input == -1) - goto fail; - - sc.node = input; - if (uart_opal_probe_node(&sc) != 0) - goto fail; - mtx_init(&sc.sc_mtx, "uart_opal", NULL, MTX_SPIN | MTX_QUIET | - MTX_NOWITNESS); - - cp->cn_pri = CN_NORMAL; - console_sc = ≻ - cp->cn_arg = console_sc; - stdout_cp = cp; - return; - -fail: - cp->cn_pri = CN_DEAD; - return; -} - -static int -uart_opal_attach(device_t dev) -{ - struct uart_opal_softc *sc; - int unit; - - sc = device_get_softc(dev); - sc->node = ofw_bus_get_node(dev); - uart_opal_probe_node(sc); - - unit = device_get_unit(dev); - mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, - MTX_SPIN | MTX_QUIET | MTX_NOWITNESS); - - if (console_sc != NULL && console_sc->vtermid == sc->vtermid) { - device_printf(dev, "console\n"); - device_set_softc(dev, console_sc); - sc = console_sc; - sprintf(uart_opal_consdev.cn_name, "ttyu%r", unit); - } - sc->tp = tty_alloc(&uart_opal_tty_class, sc); - - if (console_sc == sc) - tty_init_console(sc->tp, 0); - - sc->dev = dev; - sc->irqrid = 0; - sc->irqres = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqrid, - RF_ACTIVE | RF_SHAREABLE); - if (sc->irqres != NULL) { - bus_setup_intr(dev, sc->irqres, INTR_TYPE_TTY | INTR_MPSAFE, - NULL, uart_opal_intr, sc, &sc->sc_icookie); - } else { - callout_init(&sc->callout, CALLOUT_MPSAFE); - sc->polltime = hz / 20; - if (sc->polltime < 1) - sc->polltime = 1; - callout_reset(&sc->callout, sc->polltime, uart_opal_intr, sc); - } - - tty_makedev(sc->tp, NULL, "u%r", unit); - - return (0); -} - -static void -uart_opal_cninit(struct consdev *cp) -{ - - strcpy(cp->cn_name, "opalcons"); -} - -static void -uart_opal_cnterm(struct consdev *cp) -{ -} - -static int -uart_opal_get(struct uart_opal_softc *sc, void *buffer, size_t bufsize) -{ - int err; - int hdr = 0; - - if (sc->protocol == OPAL_RAW) { - uint64_t len = htobe64(bufsize); - uint64_t olen = (uint64_t)&len; - uint64_t obuf = (uint64_t)buffer; - - if (pmap_bootstrapped) { - olen = vtophys(&len); - obuf = vtophys(buffer); - } - - err = opal_call(OPAL_CONSOLE_READ, sc->vtermid, olen, obuf); - if (err != OPAL_SUCCESS) - return (-1); - - bufsize = be64toh(len); - } else { - uart_lock(&sc->sc_mtx); - if (sc->inbuflen == 0) { - err = opal_call(OPAL_CONSOLE_READ, sc->vtermid, - &sc->inbuflen, sc->opal_inbuf); - if (err != OPAL_SUCCESS) { - uart_unlock(&sc->sc_mtx); - return (-1); - } - hdr = 1; - sc->inbuflen = be64toh(sc->inbuflen); - } - - if (sc->inbuflen == 0) { - uart_unlock(&sc->sc_mtx); - return (0); - } - - if (bufsize > sc->inbuflen) - bufsize = sc->inbuflen; - - if (hdr == 1) { - sc->inbuflen = sc->inbuflen - 4; - /* The HVSI protocol has a 4 byte header, skip it */ - memmove(&sc->opal_inbuf[0], &sc->opal_inbuf[4], - sc->inbuflen); - } - - memcpy(buffer, sc->opal_inbuf, bufsize); - sc->inbuflen -= bufsize; - if (sc->inbuflen > 0) - memmove(&sc->opal_inbuf[0], &sc->opal_inbuf[bufsize], - sc->inbuflen); - - uart_unlock(&sc->sc_mtx); - } - - return (bufsize); -} - -static int -uart_opal_put(struct uart_opal_softc *sc, void *buffer, size_t bufsize) -{ - uint16_t seqno; - uint64_t len; - char cbuf[16]; - int err; - uint64_t olen = (uint64_t)&len; - uint64_t obuf = (uint64_t)cbuf; - - if (sc->protocol == OPAL_RAW) { - obuf = (uint64_t)buffer; - len = bufsize; - - uart_opal_real_map_outbuffer(&obuf, &olen); - *(uint64_t*)olen = htobe64(*(uint64_t*)olen); - err = opal_call(OPAL_CONSOLE_WRITE, sc->vtermid, olen, obuf); - *(uint64_t*)olen = be64toh(*(uint64_t*)olen); - uart_opal_real_unmap_outbuffer(&len); - } else { - uart_lock(&sc->sc_mtx); - if (bufsize > 12) - bufsize = 12; - seqno = sc->outseqno++; - cbuf[0] = VS_DATA_PACKET_HEADER; - cbuf[1] = 4 + bufsize; /* total length */ - cbuf[2] = (seqno >> 8) & 0xff; - cbuf[3] = seqno & 0xff; - memcpy(&cbuf[4], buffer, bufsize); - len = 4 + bufsize; - - uart_opal_real_map_outbuffer(&obuf, &olen); - *(uint64_t*)olen = htobe64(*(uint64_t*)olen); - err = opal_call(OPAL_CONSOLE_WRITE, sc->vtermid, olen, obuf); - *(uint64_t*)olen = be64toh(*(uint64_t*)olen); - uart_opal_real_unmap_outbuffer(&len); - - uart_unlock(&sc->sc_mtx); - - len -= 4; - } - - if (err == OPAL_SUCCESS) - return (len); - else if (err == OPAL_BUSY_EVENT) - return(0); - - return (-1); -} - -static int -uart_opal_cngetc(struct consdev *cp) -{ - return (uart_opal_getc(cp->cn_arg)); -} - -static int -uart_opal_getc(struct uart_opal_softc *sc) -{ - unsigned char c; - int retval; - - retval = uart_opal_get(sc, &c, 1); - if (retval != 1) - return (-1); -#if defined(KDB) - kdb_alt_break(c, &sc->alt_break_state); -#endif - - return (c); -} - -static void -uart_opal_cnputc(struct consdev *cp, int c) -{ - unsigned char ch = c; - int a; - - if (1) { - /* Clear FIFO if needed. Must be repeated few times. */ - for (a = 0; a < 20; a++) { - opal_call(OPAL_POLL_EVENTS, NULL); - } - } - uart_opal_put(cp->cn_arg, &ch, 1); -} - -static void -uart_opal_cngrab(struct consdev *cp) -{ -} - -static void -uart_opal_cnungrab(struct consdev *cp) -{ -} - -static void -uart_opal_ttyoutwakeup(struct tty *tp) -{ - struct uart_opal_softc *sc; - char buffer[8]; - int len; - int64_t buffer_space; - - sc = tty_softc(tp); - - while ((len = ttydisc_getc(tp, buffer, sizeof(buffer))) != 0) { - int bytes_written = 0; - while (bytes_written == 0) { - buffer_space = uart_opal_console_write_buffer_space(sc->vtermid); - if (buffer_space == -1) - /* OPAL failure or invalid terminal */ - break; - else if (buffer_space >= len) - bytes_written = uart_opal_put(sc, buffer, len); - - if (bytes_written == 0) - /* OPAL must be busy, poll and retry */ - opal_call(OPAL_POLL_EVENTS, NULL); - else if (bytes_written == -1) - /* OPAL failure or invalid terminal */ - break; - } - } -} - -static void -uart_opal_intr(void *v) -{ - struct uart_opal_softc *sc = v; - struct tty *tp = sc->tp; - int c; - - tty_lock(tp); - while ((c = uart_opal_getc(sc)) > 0) - ttydisc_rint(tp, c, 0); - ttydisc_rint_done(tp); - tty_unlock(tp); - - opal_call(OPAL_POLL_EVENTS, NULL); - - if (sc->irqres == NULL) - callout_reset(&sc->callout, sc->polltime, uart_opal_intr, sc); -} - -static int -opalcons_probe(device_t dev) -{ - const char *name; - - name = ofw_bus_get_name(dev); - if (name == NULL || strcmp(name, "consoles") != 0) - return (ENXIO); - - device_set_desc(dev, "OPAL Consoles"); - return (BUS_PROBE_SPECIFIC); -} - -static int -opalcons_attach(device_t dev) -{ - phandle_t child; - device_t cdev; - struct ofw_bus_devinfo *dinfo; - - for (child = OF_child(ofw_bus_get_node(dev)); child != 0; - child = OF_peer(child)) { - dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); - if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { - free(dinfo, M_DEVBUF); - continue; - } - cdev = device_add_child(dev, NULL, -1); - if (cdev == NULL) { - device_printf(dev, "<%s>: device_add_child failed\n", - dinfo->obd_name); - ofw_bus_gen_destroy_devinfo(dinfo); - free(dinfo, M_DEVBUF); - continue; - } - device_set_ivars(cdev, dinfo); - } - - return (bus_generic_attach(dev)); -} - -static const struct ofw_bus_devinfo * -opalcons_get_devinfo(device_t dev, device_t child) -{ - return (device_get_ivars(child)); -} - -static device_method_t opalcons_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, opalcons_probe), - DEVMETHOD(device_attach, opalcons_attach), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_devinfo, opalcons_get_devinfo), - DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), - DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), - DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), - DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), - DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), - - DEVMETHOD_END -}; - -static driver_t opalcons_driver = { - "opalcons", - opalcons_methods, - 0 -}; - -static devclass_t opalcons_devclass; - -DRIVER_MODULE(opalcons, opal, opalcons_driver, opalcons_devclass, 0, 0); diff --git a/sys/powerpc/powernv/opal_dbg.c b/sys/powerpc/powernv/opal_dbg.c deleted file mode 100644 index 2535ff98a6b..00000000000 --- a/sys/powerpc/powernv/opal_dbg.c +++ /dev/null @@ -1,149 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2019 Leandro Lupori - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include - -struct thread; - -#include -#include - -#include -#include - -#include "opal.h" - -static gdb_probe_f uart_opal_dbg_probe; -static gdb_init_f uart_opal_dbg_init; -static gdb_term_f uart_opal_dbg_term; -static gdb_getc_f uart_opal_dbg_getc; -static gdb_putc_f uart_opal_dbg_putc; - -GDB_DBGPORT(uart_opal, uart_opal_dbg_probe, - uart_opal_dbg_init, uart_opal_dbg_term, - uart_opal_dbg_getc, uart_opal_dbg_putc); - -static int64_t termnum; - -static int -uart_opal_dbg_probe(void) -{ - char buf[64]; - cell_t reg; - phandle_t dev; - - if (!getenv_string("hw.uart.dbgport", buf, sizeof(buf))) - return (-1); - if ((dev = OF_finddevice(buf)) == -1) - return (-1); - - if (OF_getprop(dev, "device_type", buf, sizeof(buf)) == -1) - return (-1); - if (strcmp(buf, "serial") != 0) - return (-1); - - if (OF_getprop(dev, "compatible", buf, sizeof(buf)) == -1) - return (-1); - if (strcmp(buf, "ibm,opal-console-raw") != 0) - return (-1); - - reg = ~0U; - OF_getencprop(dev, "reg", ®, sizeof(reg)); - if (reg == ~0U) - return (-1); - termnum = reg; - - return (0); -} - -static void -uart_opal_dbg_init(void) -{ -} - -static void -uart_opal_dbg_term(void) -{ -} - -static int -uart_opal_dbg_getc(void) -{ - char c; - int err; - int64_t len; - uint64_t lenp, bufp; - - len = 1; - if (pmap_bootstrapped) { - lenp = vtophys(&len); - bufp = vtophys(&c); - } else { - lenp = (uint64_t)&len; - bufp = (uint64_t)&c; - } - - err = opal_call(OPAL_CONSOLE_READ, termnum, lenp, bufp); - if (err != OPAL_SUCCESS || len != 1) - return (-1); - - opal_call(OPAL_POLL_EVENTS, NULL); - - return (c); -} - -static void -uart_opal_dbg_putc(int c) -{ - char ch; - int err; - int64_t len; - uint64_t lenp, bufp; - - ch = (unsigned char)c; - len = 1; - if (pmap_bootstrapped) { - lenp = vtophys(&len); - bufp = vtophys(&ch); - } else { - lenp = (uint64_t)&len; - bufp = (uint64_t)&ch; - } - - for (;;) { - err = opal_call(OPAL_CONSOLE_WRITE, termnum, lenp, bufp); - /* Clear FIFO if needed. */ - if (err == OPAL_BUSY_EVENT) - opal_call(OPAL_POLL_EVENTS, NULL); - else - /* break on success or unrecoverable errors */ - break; - } - DELAY(100); -} diff --git a/sys/powerpc/powernv/opal_dev.c b/sys/powerpc/powernv/opal_dev.c deleted file mode 100644 index aac51333323..00000000000 --- a/sys/powerpc/powernv/opal_dev.c +++ /dev/null @@ -1,436 +0,0 @@ -/*- - * Copyright (c) 2015 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include "clock_if.h" -#include "opal.h" - -static int opaldev_probe(device_t); -static int opaldev_attach(device_t); -/* clock interface */ -static int opal_gettime(device_t dev, struct timespec *ts); -static int opal_settime(device_t dev, struct timespec *ts); -/* ofw bus interface */ -static const struct ofw_bus_devinfo *opaldev_get_devinfo(device_t dev, - device_t child); - -static void opal_shutdown(void *arg, int howto); -static void opal_handle_shutdown_message(void *unused, - struct opal_msg *msg); -static void opal_intr(void *); - -static device_method_t opaldev_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, opaldev_probe), - DEVMETHOD(device_attach, opaldev_attach), - - /* clock interface */ - DEVMETHOD(clock_gettime, opal_gettime), - DEVMETHOD(clock_settime, opal_settime), - - /* Bus interface */ - DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_devinfo, opaldev_get_devinfo), - DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), - DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), - DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), - DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), - DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), - - DEVMETHOD_END -}; - -static driver_t opaldev_driver = { - "opal", - opaldev_methods, - 0 -}; - -static devclass_t opaldev_devclass; - -EARLY_DRIVER_MODULE(opaldev, ofwbus, opaldev_driver, opaldev_devclass, 0, 0, - BUS_PASS_BUS); - -static void opal_heartbeat(void); -static void opal_handle_messages(void); - -static struct proc *opal_hb_proc; -static struct kproc_desc opal_heartbeat_kp = { - "opal_heartbeat", - opal_heartbeat, - &opal_hb_proc -}; - -SYSINIT(opal_heartbeat_setup, SI_SUB_KTHREAD_IDLE, SI_ORDER_ANY, kproc_start, - &opal_heartbeat_kp); - -static int opal_heartbeat_ms; -EVENTHANDLER_LIST_DEFINE(OPAL_ASYNC_COMP); -EVENTHANDLER_LIST_DEFINE(OPAL_EPOW); -EVENTHANDLER_LIST_DEFINE(OPAL_SHUTDOWN); -EVENTHANDLER_LIST_DEFINE(OPAL_HMI_EVT); -EVENTHANDLER_LIST_DEFINE(OPAL_DPO); -EVENTHANDLER_LIST_DEFINE(OPAL_OCC); - -#define OPAL_SOFT_OFF 0 -#define OPAL_SOFT_REBOOT 1 - -static void -opal_heartbeat(void) -{ - uint64_t events; - - if (opal_heartbeat_ms == 0) - kproc_exit(0); - - while (1) { - events = 0; - /* Turn the OPAL state crank */ - opal_call(OPAL_POLL_EVENTS, vtophys(&events)); - if (be64toh(events) & OPAL_EVENT_MSG_PENDING) - opal_handle_messages(); - tsleep(opal_hb_proc, 0, "opal", - MSEC_2_TICKS(opal_heartbeat_ms)); - } -} - -static int -opaldev_probe(device_t dev) -{ - phandle_t iparent; - pcell_t *irqs; - int i, n_irqs; - - if (!ofw_bus_is_compatible(dev, "ibm,opal-v3")) - return (ENXIO); - if (opal_check() != 0) - return (ENXIO); - - device_set_desc(dev, "OPAL Abstraction Firmware"); - - /* Manually add IRQs before attaching */ - if (OF_hasprop(ofw_bus_get_node(dev), "opal-interrupts")) { - iparent = OF_finddevice("/interrupt-controller@0"); - iparent = OF_xref_from_node(iparent); - - n_irqs = OF_getproplen(ofw_bus_get_node(dev), - "opal-interrupts") / sizeof(*irqs); - irqs = malloc(n_irqs * sizeof(*irqs), M_DEVBUF, M_WAITOK); - OF_getencprop(ofw_bus_get_node(dev), "opal-interrupts", irqs, - n_irqs * sizeof(*irqs)); - for (i = 0; i < n_irqs; i++) - bus_set_resource(dev, SYS_RES_IRQ, i, - ofw_bus_map_intr(dev, iparent, 1, &irqs[i]), 1); - free(irqs, M_DEVBUF); - } - - return (BUS_PROBE_SPECIFIC); -} - -static int -opaldev_attach(device_t dev) -{ - phandle_t child; - device_t cdev; - uint64_t junk; - int i, rv; - uint32_t async_count; - struct ofw_bus_devinfo *dinfo; - struct resource *irq; - - /* Test for RTC support and register clock if it works */ - rv = opal_call(OPAL_RTC_READ, vtophys(&junk), vtophys(&junk)); - do { - rv = opal_call(OPAL_RTC_READ, vtophys(&junk), vtophys(&junk)); - if (rv == OPAL_BUSY_EVENT) - rv = opal_call(OPAL_POLL_EVENTS, 0); - } while (rv == OPAL_BUSY_EVENT); - - if (rv == OPAL_SUCCESS) - clock_register(dev, 2000); - - EVENTHANDLER_REGISTER(OPAL_SHUTDOWN, opal_handle_shutdown_message, - NULL, EVENTHANDLER_PRI_ANY); - EVENTHANDLER_REGISTER(shutdown_final, opal_shutdown, NULL, - SHUTDOWN_PRI_LAST); - - OF_getencprop(ofw_bus_get_node(dev), "ibm,heartbeat-ms", - &opal_heartbeat_ms, sizeof(opal_heartbeat_ms)); - /* Bind to interrupts */ - for (i = 0; (irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, - RF_ACTIVE)) != NULL; i++) - bus_setup_intr(dev, irq, INTR_TYPE_TTY | INTR_MPSAFE | - INTR_ENTROPY, NULL, opal_intr, (void *)rman_get_start(irq), - NULL); - - OF_getencprop(ofw_bus_get_node(dev), "opal-msg-async-num", - &async_count, sizeof(async_count)); - opal_init_async_tokens(async_count); - - for (child = OF_child(ofw_bus_get_node(dev)); child != 0; - child = OF_peer(child)) { - dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); - if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { - free(dinfo, M_DEVBUF); - continue; - } - cdev = device_add_child(dev, NULL, -1); - if (cdev == NULL) { - device_printf(dev, "<%s>: device_add_child failed\n", - dinfo->obd_name); - ofw_bus_gen_destroy_devinfo(dinfo); - free(dinfo, M_DEVBUF); - continue; - } - device_set_ivars(cdev, dinfo); - } - - return (bus_generic_attach(dev)); -} - -static int -bcd2bin32(int bcd) -{ - int out = 0; - - out += bcd2bin(bcd & 0xff); - out += 100*bcd2bin((bcd & 0x0000ff00) >> 8); - out += 10000*bcd2bin((bcd & 0x00ff0000) >> 16); - out += 1000000*bcd2bin((bcd & 0xffff0000) >> 24); - - return (out); -} - -static int -bin2bcd32(int bin) -{ - int out = 0; - int tmp; - - tmp = bin % 100; - out += bin2bcd(tmp) * 0x1; - bin = bin / 100; - - tmp = bin % 100; - out += bin2bcd(tmp) * 0x100; - bin = bin / 100; - - tmp = bin % 100; - out += bin2bcd(tmp) * 0x10000; - - return (out); -} - -static int -opal_gettime(device_t dev, struct timespec *ts) -{ - int rv; - struct clocktime ct; - uint32_t ymd; - uint64_t hmsm; - - rv = opal_call(OPAL_RTC_READ, vtophys(&ymd), vtophys(&hmsm)); - while (rv == OPAL_BUSY_EVENT) { - opal_call(OPAL_POLL_EVENTS, 0); - pause("opalrtc", 1); - rv = opal_call(OPAL_RTC_READ, vtophys(&ymd), vtophys(&hmsm)); - } - - if (rv != OPAL_SUCCESS) - return (ENXIO); - - hmsm = be64toh(hmsm); - ymd = be32toh(ymd); - - ct.nsec = bcd2bin32((hmsm & 0x000000ffffff0000) >> 16) * 1000; - ct.sec = bcd2bin((hmsm & 0x0000ff0000000000) >> 40); - ct.min = bcd2bin((hmsm & 0x00ff000000000000) >> 48); - ct.hour = bcd2bin((hmsm & 0xff00000000000000) >> 56); - - ct.day = bcd2bin((ymd & 0x000000ff) >> 0); - ct.mon = bcd2bin((ymd & 0x0000ff00) >> 8); - ct.year = bcd2bin32((ymd & 0xffff0000) >> 16); - - return (clock_ct_to_ts(&ct, ts)); -} - -static int -opal_settime(device_t dev, struct timespec *ts) -{ - int rv; - struct clocktime ct; - uint32_t ymd = 0; - uint64_t hmsm = 0; - - clock_ts_to_ct(ts, &ct); - - ymd |= (uint32_t)bin2bcd(ct.day); - ymd |= ((uint32_t)bin2bcd(ct.mon) << 8); - ymd |= ((uint32_t)bin2bcd32(ct.year) << 16); - - hmsm |= ((uint64_t)bin2bcd32(ct.nsec/1000) << 16); - hmsm |= ((uint64_t)bin2bcd(ct.sec) << 40); - hmsm |= ((uint64_t)bin2bcd(ct.min) << 48); - hmsm |= ((uint64_t)bin2bcd(ct.hour) << 56); - - /* - * We do NOT swap endian here, because the values are being sent - * via registers instead of indirect via memory. - */ - do { - rv = opal_call(OPAL_RTC_WRITE, ymd, hmsm); - if (rv == OPAL_BUSY_EVENT) { - rv = opal_call(OPAL_POLL_EVENTS, 0); - pause("opalrtc", 1); - } - } while (rv == OPAL_BUSY_EVENT); - - if (rv != OPAL_SUCCESS) - return (ENXIO); - - return (0); -} - -static const struct ofw_bus_devinfo * -opaldev_get_devinfo(device_t dev, device_t child) -{ - return (device_get_ivars(child)); -} - -static void -opal_shutdown(void *arg, int howto) -{ - - if (howto & RB_HALT) - opal_call(OPAL_CEC_POWER_DOWN, 0 /* Normal power off */); - else - opal_call(OPAL_CEC_REBOOT); - - opal_call(OPAL_RETURN_CPU); -} - -static void -opal_handle_shutdown_message(void *unused, struct opal_msg *msg) -{ - int howto; - - switch (be64toh(msg->params[0])) { - case OPAL_SOFT_OFF: - howto = RB_POWEROFF; - break; - case OPAL_SOFT_REBOOT: - howto = RB_REROOT; - break; - } - shutdown_nice(howto); -} - -static void -opal_handle_messages(void) -{ - static struct opal_msg msg; - uint64_t rv; - uint32_t type; - - rv = opal_call(OPAL_GET_MSG, vtophys(&msg), sizeof(msg)); - - switch (rv) { - case OPAL_SUCCESS: - break; - case OPAL_RESOURCE: - /* no available messages - return */ - return; - case OPAL_PARAMETER: - printf("%s error: invalid buffer. Please file a bug report.\n", __func__); - return; - case OPAL_PARTIAL: - printf("%s error: buffer is too small and messages was discarded. Please file a bug report.\n", __func__); - return; - default: - printf("%s opal_call returned unknown result <%lu>\n", __func__, rv); - return; - } - - type = be32toh(msg.msg_type); - switch (type) { - case OPAL_MSG_ASYNC_COMP: - EVENTHANDLER_DIRECT_INVOKE(OPAL_ASYNC_COMP, &msg); - break; - case OPAL_MSG_EPOW: - EVENTHANDLER_DIRECT_INVOKE(OPAL_EPOW, &msg); - break; - case OPAL_MSG_SHUTDOWN: - EVENTHANDLER_DIRECT_INVOKE(OPAL_SHUTDOWN, &msg); - break; - case OPAL_MSG_HMI_EVT: - EVENTHANDLER_DIRECT_INVOKE(OPAL_HMI_EVT, &msg); - break; - case OPAL_MSG_DPO: - EVENTHANDLER_DIRECT_INVOKE(OPAL_DPO, &msg); - break; - case OPAL_MSG_OCC: - EVENTHANDLER_DIRECT_INVOKE(OPAL_OCC, &msg); - break; - default: - printf("%s Unknown OPAL message type %d\n", __func__, type); - } -} - -static void -opal_intr(void *xintr) -{ - uint64_t events = 0; - - opal_call(OPAL_HANDLE_INTERRUPT, (uint32_t)(uint64_t)xintr, - vtophys(&events)); - /* Wake up the heartbeat, if it's been setup. */ - if (be64toh(events) != 0 && opal_hb_proc != NULL) - wakeup(opal_hb_proc); - -} diff --git a/sys/powerpc/powernv/opal_flash.c b/sys/powerpc/powernv/opal_flash.c deleted file mode 100644 index 97bf5dd8255..00000000000 --- a/sys/powerpc/powernv/opal_flash.c +++ /dev/null @@ -1,390 +0,0 @@ -/*- - * Copyright (c) 2019 Justin Hibbits - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include "opal.h" - -/* - * OPAL System flash driver, using OPAL firmware calls to access the device. - * - * This just presents the base block interface. The fdt_slicer can be used on - * top to present the partitions listed in the fdt. - * - * There are three OPAL methods used: OPAL_FLASH_READ, OPAL_FLASH_WRITE, and - * OPAL_FLASH_ERASE. At the firmware layer, READ and WRITE can be on arbitrary - * boundaries, but ERASE is only at flash-block-size block alignments and sizes. - * To account for this, the following restrictions are in place: - * - * - Reads are on a 512-byte block boundary and size - * - Writes and Erases are aligned and sized on flash-block-size bytes. - * - * In order to support the fdt_slicer we present a type attribute of - * NAND::device. - */ -struct opalflash_softc { - device_t sc_dev; - struct mtx sc_mtx; - struct disk *sc_disk; - struct proc *sc_p; - struct bio_queue_head sc_bio_queue; - int sc_opal_id; - bool sc_erase; /* Erase is needed before write. */ -}; - -#define OPALFLASH_LOCK(sc) mtx_lock(&(sc)->sc_mtx) -#define OPALFLASH_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx) -#define OPALFLASH_LOCK_INIT(sc) \ - mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->sc_dev), \ - "opalflash", MTX_DEF) - -#define FLASH_BLOCKSIZE 512 - -static int opalflash_probe(device_t); -static int opalflash_attach(device_t); - -static device_method_t opalflash_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, opalflash_probe), - DEVMETHOD(device_attach, opalflash_attach), - - DEVMETHOD_END -}; - -static driver_t opalflash_driver = { - "opalflash", - opalflash_methods, - sizeof(struct opalflash_softc) -}; - -static devclass_t opalflash_devclass; - -DRIVER_MODULE(opalflash, opal, opalflash_driver, opalflash_devclass, 0, 0); - -/* GEOM Disk interfaces. */ -static int -opalflash_open(struct disk *dp) -{ - - return (0); -} - -static int -opalflash_close(struct disk *dp) -{ - - return (0); -} - -static int -opalflash_ioctl(struct disk *dp, u_long cmd, void *data, int fflag, - struct thread *td) -{ - - return (EINVAL); -} - -/* Handle the one attribute we need to play nice with geom_flashmap. */ -static int -opalflash_getattr(struct bio *bp) -{ - struct opalflash_softc *sc; - device_t dev; - - if (bp->bio_disk == NULL || bp->bio_disk->d_drv1 == NULL) - return (ENXIO); - - sc = bp->bio_disk->d_drv1; - dev = sc->sc_dev; - - if (strcmp(bp->bio_attribute, "NAND::device") == 0) { - if (bp->bio_length != sizeof(dev)) - return (EFAULT); - bcopy(&dev, bp->bio_data, sizeof(dev)); - } else - return (-1); - return (0); -} - -static void -opalflash_strategy(struct bio *bp) -{ - struct opalflash_softc *sc; - - sc = (struct opalflash_softc *)bp->bio_disk->d_drv1; - OPALFLASH_LOCK(sc); - bioq_disksort(&sc->sc_bio_queue, bp); - wakeup(sc); - OPALFLASH_UNLOCK(sc); -} - -static int -opalflash_read(struct opalflash_softc *sc, off_t off, - caddr_t data, off_t count) -{ - struct opal_msg msg; - int rv, size, token; - - /* Ensure we write aligned to a full block size. */ - if (off % sc->sc_disk->d_sectorsize != 0 || - count % sc->sc_disk->d_sectorsize != 0) - return (EIO); - - token = opal_alloc_async_token(); - - /* - * Read one page at a time. It's not guaranteed that the buffer is - * physically contiguous. - */ - rv = 0; - while (count > 0) { - size = MIN(count, PAGE_SIZE); - size = MIN(size, PAGE_SIZE - ((u_long)data & PAGE_MASK)); - rv = opal_call(OPAL_FLASH_READ, sc->sc_opal_id, off, - vtophys(data), size, token); - if (rv == OPAL_ASYNC_COMPLETION) { - rv = opal_wait_completion(&msg, sizeof(msg), token); - if (rv == OPAL_SUCCESS) - rv = msg.params[1]; - } - if (rv != OPAL_SUCCESS) - break; - count -= size; - off += size; - data += size; - } - opal_free_async_token(token); - if (rv == OPAL_SUCCESS) - rv = 0; - else - rv = EIO; - - return (rv); -} - -static int -opalflash_erase(struct opalflash_softc *sc, off_t off, off_t count) -{ - struct opal_msg msg; - int rv, token; - - /* Ensure we write aligned to a full block size. */ - if (off % sc->sc_disk->d_stripesize != 0 || - count % sc->sc_disk->d_stripesize != 0) - return (EIO); - - token = opal_alloc_async_token(); - - rv = opal_call(OPAL_FLASH_ERASE, sc->sc_opal_id, off, count, token); - if (rv == OPAL_ASYNC_COMPLETION) { - rv = opal_wait_completion(&msg, sizeof(msg), token); - if (rv == OPAL_SUCCESS) - rv = msg.params[1]; - } - opal_free_async_token(token); - - if (rv == OPAL_SUCCESS) - rv = 0; - else - rv = EIO; - - return (rv); -} - -static int -opalflash_write(struct opalflash_softc *sc, off_t off, - caddr_t data, off_t count) -{ - struct opal_msg msg; - int rv, size, token; - - /* Ensure we write aligned to a full block size. */ - if (off % sc->sc_disk->d_sectorsize != 0 || - count % sc->sc_disk->d_sectorsize != 0) - return (EIO); - - if (sc->sc_erase) { - /* Erase the full block first, then write in page chunks. */ - rv = opalflash_erase(sc, off, count); - if (rv != 0) - return (rv); - } - - token = opal_alloc_async_token(); - - /* - * Write one page at a time. It's not guaranteed that the buffer is - * physically contiguous. - */ - while (count > 0) { - size = MIN(count, PAGE_SIZE); - size = MIN(size, PAGE_SIZE - ((u_long)data & PAGE_MASK)); - rv = opal_call(OPAL_FLASH_WRITE, sc->sc_opal_id, off, - vtophys(data), size, token); - if (rv == OPAL_ASYNC_COMPLETION) { - rv = opal_wait_completion(&msg, sizeof(msg), token); - if (rv == OPAL_SUCCESS) - rv = msg.params[1]; - } - if (rv != OPAL_SUCCESS) - break; - count -= size; - off += size; - data += size; - } - opal_free_async_token(token); - - if (rv == OPAL_SUCCESS) - rv = 0; - else - rv = EIO; - - return (rv); -} - -/* Main flash handling task. */ -static void -opalflash_task(void *arg) -{ - struct opalflash_softc *sc; - struct bio *bp; - device_t dev; - - sc = arg; - - for (;;) { - dev = sc->sc_dev; - OPALFLASH_LOCK(sc); - do { - bp = bioq_first(&sc->sc_bio_queue); - if (bp == NULL) - msleep(sc, &sc->sc_mtx, PRIBIO, "opalflash", 0); - } while (bp == NULL); - bioq_remove(&sc->sc_bio_queue, bp); - OPALFLASH_UNLOCK(sc); - - switch (bp->bio_cmd) { - case BIO_DELETE: - bp->bio_error = opalflash_erase(sc, bp->bio_offset, - bp->bio_bcount); - break; - case BIO_READ: - bp->bio_error = opalflash_read(sc, bp->bio_offset, - bp->bio_data, bp->bio_bcount); - break; - case BIO_WRITE: - bp->bio_error = opalflash_write(sc, bp->bio_offset, - bp->bio_data, bp->bio_bcount); - break; - default: - bp->bio_error = EINVAL; - } - biodone(bp); - } -} - -/* Device driver interfaces. */ - -static int -opalflash_probe(device_t dev) -{ - if (!ofw_bus_is_compatible(dev, "ibm,opal-flash")) - return (ENXIO); - - device_set_desc(dev, "OPAL System Flash"); - - return (BUS_PROBE_GENERIC); -} - -static int -opalflash_attach(device_t dev) -{ - struct opalflash_softc *sc; - phandle_t node; - cell_t flash_blocksize, opal_id; - uint32_t regs[2]; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - - node = ofw_bus_get_node(dev); - OF_getencprop(node, "ibm,opal-id", &opal_id, sizeof(opal_id)); - sc->sc_opal_id = opal_id; - - if (OF_getencprop(node, "ibm,flash-block-size", - &flash_blocksize, sizeof(flash_blocksize)) < 0) { - device_printf(dev, "Cannot determine flash block size.\n"); - return (ENXIO); - } - - if (!OF_hasprop(node, "no-erase")) - sc->sc_erase = true; - - OPALFLASH_LOCK_INIT(sc); - - if (OF_getencprop(node, "reg", regs, sizeof(regs)) < 0) { - device_printf(dev, "Unable to get flash size.\n"); - return (ENXIO); - } - - sc->sc_disk = disk_alloc(); - sc->sc_disk->d_name = "opalflash"; - sc->sc_disk->d_open = opalflash_open; - sc->sc_disk->d_close = opalflash_close; - sc->sc_disk->d_strategy = opalflash_strategy; - sc->sc_disk->d_ioctl = opalflash_ioctl; - sc->sc_disk->d_getattr = opalflash_getattr; - sc->sc_disk->d_drv1 = sc; - sc->sc_disk->d_maxsize = DFLTPHYS; - sc->sc_disk->d_mediasize = regs[1]; - sc->sc_disk->d_unit = device_get_unit(sc->sc_dev); - sc->sc_disk->d_sectorsize = FLASH_BLOCKSIZE; - sc->sc_disk->d_stripesize = flash_blocksize; - sc->sc_disk->d_dump = NULL; - - disk_create(sc->sc_disk, DISK_VERSION); - bioq_init(&sc->sc_bio_queue); - - kproc_create(&opalflash_task, sc, &sc->sc_p, 0, 0, "task: OPAL Flash"); - - return (0); -} diff --git a/sys/powerpc/powernv/opal_hmi.c b/sys/powerpc/powernv/opal_hmi.c deleted file mode 100644 index 748cfd17991..00000000000 --- a/sys/powerpc/powernv/opal_hmi.c +++ /dev/null @@ -1,144 +0,0 @@ -/*- - * Copyright (c) 2019 Justin Hibbits - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include "opal.h" - -struct opal_hmi_event { - uint8_t version; - uint8_t severity; - uint8_t type; - uint8_t disposition; - uint8_t rsvd_1[4]; - uint64_t hmer; - uint64_t tfmr; - union { - struct { - uint8_t xstop_type; - uint8_t rsvd_2[3]; - uint32_t xstop_reason; - union { - uint32_t pir; - uint32_t chip_id; - }; - }; - }; -}; - -#define HMI_DISP_RECOVERED 0 -#define HMI_DISP_NOT_RECOVERED 1 - -static void -opal_hmi_event_handler(void *unused, struct opal_msg *msg) -{ - struct opal_hmi_event evt; - - memcpy(&evt, &msg->params, sizeof(evt)); - printf("Hypervisor Maintenance Event received" - "(Severity %d, type %d, HMER: %016lx).\n", - evt.severity, evt.type, evt.hmer); - - if (evt.disposition == HMI_DISP_NOT_RECOVERED) - panic("Unrecoverable hypervisor maintenance exception on CPU %d", - evt.pir); - - return; -} - -static int -opal_hmi_handler2(struct trapframe *frame) -{ - /* - * Use DMAP preallocated pcpu memory to handle - * the phys flags pointer. - */ - uint64_t *flags = PCPU_PTR(aim.opal_hmi_flags); - int err; - - *flags = 0; - err = opal_call(OPAL_HANDLE_HMI2, DMAP_TO_PHYS((vm_offset_t)flags)); - - if (be64toh(*flags) & OPAL_HMI_FLAGS_TOD_TB_FAIL) - panic("TOD/TB recovery failure"); - - if (err == OPAL_SUCCESS) - return (0); - - printf("HMI handler failed! OPAL error code: %d\n", err); - - return (-1); -} - -static int -opal_hmi_handler(struct trapframe *frame) -{ - int err; - - err = opal_call(OPAL_HANDLE_HMI); - - if (err == OPAL_SUCCESS) - return (0); - - printf("HMI handler failed! OPAL error code: %d\n", err); - - return (-1); -} - -static void -opal_setup_hmi(void *data) -{ - /* This only works for OPAL, so first make sure we have it. */ - if (opal_check() != 0) - return; - - if (opal_call(OPAL_CHECK_TOKEN, OPAL_HANDLE_HMI2) == OPAL_TOKEN_PRESENT) - hmi_handler = opal_hmi_handler2; - else if (opal_call(OPAL_CHECK_TOKEN, OPAL_HANDLE_HMI) == OPAL_TOKEN_PRESENT) - hmi_handler = opal_hmi_handler; - else { - printf("Warning: No OPAL HMI handler found.\n"); - return; - } - - EVENTHANDLER_REGISTER(OPAL_HMI_EVT, opal_hmi_event_handler, NULL, - EVENTHANDLER_PRI_ANY); - - if (bootverbose) - printf("Installed OPAL HMI handler.\n"); -} - -SYSINIT(opal_setup_hmi, SI_SUB_CPU, SI_ORDER_ANY, opal_setup_hmi, NULL); diff --git a/sys/powerpc/powernv/opal_i2c.c b/sys/powerpc/powernv/opal_i2c.c deleted file mode 100644 index 9208c42a6b3..00000000000 --- a/sys/powerpc/powernv/opal_i2c.c +++ /dev/null @@ -1,247 +0,0 @@ -/*- - * Copyright (c) 2017-2018 QCM Technologies. - * Copyright (c) 2017-2018 Semihalf. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include "iicbus_if.h" - -#include "opal.h" - -#ifdef FDT -#include -#include -#endif - -struct opal_i2c_softc -{ - device_t dev; - device_t iicbus; - uint32_t opal_id; - struct mtx sc_mtx; -}; - -/* OPAL I2C request */ -struct opal_i2c_request { - uint8_t type; -#define OPAL_I2C_RAW_READ 0 -#define OPAL_I2C_RAW_WRITE 1 -#define OPAL_I2C_SM_READ 2 -#define OPAL_I2C_SM_WRITE 3 - uint8_t flags; - uint8_t subaddr_sz; /* Max 4 */ - uint8_t reserved; - uint16_t addr; /* 7 or 10 bit address */ - uint16_t reserved2; - uint32_t subaddr; /* Sub-address if any */ - uint32_t size; /* Data size */ - uint64_t buffer_pa; /* Buffer real address */ -}; - -static int opal_i2c_attach(device_t); -static int opal_i2c_callback(device_t, int, caddr_t); -static int opal_i2c_probe(device_t); -static int opal_i2c_transfer(device_t, struct iic_msg *, uint32_t); -static int i2c_opal_send_request(uint32_t, struct opal_i2c_request *); -static phandle_t opal_i2c_get_node(device_t bus, device_t dev); - -static device_method_t opal_i2c_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, opal_i2c_probe), - DEVMETHOD(device_attach, opal_i2c_attach), - - /* iicbus interface */ - DEVMETHOD(iicbus_callback, opal_i2c_callback), - DEVMETHOD(iicbus_transfer, opal_i2c_transfer), - DEVMETHOD(ofw_bus_get_node, opal_i2c_get_node), - DEVMETHOD_END -}; - -#define I2C_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) -#define I2C_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) -#define I2C_LOCK_INIT(_sc) \ - mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \ - "i2c", MTX_DEF) - -static devclass_t opal_i2c_devclass; - -static driver_t opal_i2c_driver = { - "iichb", - opal_i2c_methods, - sizeof(struct opal_i2c_softc), -}; - -static int -opal_i2c_probe(device_t dev) -{ - - if (!(ofw_bus_is_compatible(dev, "ibm,opal-i2c"))) - return (ENXIO); - - device_set_desc(dev, "opal-i2c"); - - return (0); -} - -static int -opal_i2c_attach(device_t dev) -{ - struct opal_i2c_softc *sc; - int len; - - sc = device_get_softc(dev); - sc->dev = dev; - - len = OF_getproplen(ofw_bus_get_node(dev), "ibm,opal-id"); - if (len <= 0) - return (EINVAL); - OF_getencprop(ofw_bus_get_node(dev), "ibm,opal-id", &sc->opal_id, len); - - if ((sc->iicbus = device_add_child(dev, "iicbus", -1)) == NULL) { - device_printf(dev, "could not allocate iicbus instance\n"); - return (EINVAL); - } - - I2C_LOCK_INIT(sc); - - return (bus_generic_attach(dev)); -} - -static int -opal_get_async_rc(struct opal_msg msg) -{ - if (msg.msg_type != OPAL_MSG_ASYNC_COMP) - return OPAL_PARAMETER; - else - return htobe64(msg.params[1]); -} - -static int -i2c_opal_send_request(uint32_t bus_id, struct opal_i2c_request *req) -{ - struct opal_msg msg; - uint64_t token; - int rc; - - token = opal_alloc_async_token(); - - memset(&msg, 0, sizeof(msg)); - - rc = opal_call(OPAL_I2C_REQUEST, token, bus_id, - vtophys(req)); - if (rc != OPAL_ASYNC_COMPLETION) - goto out; - - rc = opal_wait_completion(&msg, sizeof(msg), token); - - if (rc != OPAL_SUCCESS) - goto out; - - rc = opal_get_async_rc(msg); - -out: - opal_free_async_token(token); - - return (rc); -} - -static int -opal_i2c_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs) -{ - struct opal_i2c_softc *sc; - int i, err = 0; - struct opal_i2c_request req; - - sc = device_get_softc(dev); - - memset(&req, 0, sizeof(req)); - - I2C_LOCK(sc); - for (i = 0; i < nmsgs; i++) { - req.type = (msgs[i].flags & IIC_M_RD) ? - OPAL_I2C_RAW_READ : OPAL_I2C_RAW_WRITE; - req.addr = htobe16(msgs[i].slave >> 1); - req.size = htobe32(msgs[i].len); - req.buffer_pa = htobe64(pmap_kextract((uint64_t)msgs[i].buf)); - - err = i2c_opal_send_request(sc->opal_id, &req); - } - I2C_UNLOCK(sc); - - return (err); -} - -static int -opal_i2c_callback(device_t dev, int index, caddr_t data) -{ - int error = 0; - - switch (index) { - case IIC_REQUEST_BUS: - break; - - case IIC_RELEASE_BUS: - break; - - default: - error = EINVAL; - } - - return (error); -} - -static phandle_t -opal_i2c_get_node(device_t bus, device_t dev) -{ - - /* Share controller node with iibus device. */ - return (ofw_bus_get_node(bus)); -} - -DRIVER_MODULE(opal_i2c, opal_i2cm, opal_i2c_driver, opal_i2c_devclass, NULL, - NULL); -DRIVER_MODULE(iicbus, opal_i2c, iicbus_driver, iicbus_devclass, NULL, NULL); -MODULE_DEPEND(opal_i2c, iicbus, 1, 1, 1); diff --git a/sys/powerpc/powernv/opal_i2cm.c b/sys/powerpc/powernv/opal_i2cm.c deleted file mode 100644 index 5ee9a3d2c2d..00000000000 --- a/sys/powerpc/powernv/opal_i2cm.c +++ /dev/null @@ -1,128 +0,0 @@ -/*- - * Copyright (c) 2017-2018 QCM Technologies. - * Copyright (c) 2017-2018 Semihalf. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef FDT -#include -#include -#endif - -struct opal_i2cm_softc -{ - -}; - -static int opal_i2cm_attach(device_t); -static int opal_i2cm_probe(device_t); -static const struct ofw_bus_devinfo * - opal_i2cm_get_devinfo(device_t, device_t); - -static device_method_t opal_i2cm_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, opal_i2cm_probe), - DEVMETHOD(device_attach, opal_i2cm_attach), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_devinfo, opal_i2cm_get_devinfo), - DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), - DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), - DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), - DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), - DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), - - DEVMETHOD_END -}; - -static devclass_t opal_i2cm_devclass; - -static int -opal_i2cm_probe(device_t dev) -{ - - if (!(ofw_bus_is_compatible(dev, "ibm,centaur-i2cm") || - ofw_bus_is_compatible(dev, "ibm,power8-i2cm"))) - return (ENXIO); - - device_set_desc(dev, "centaur-i2cm"); - return (0); -} - -static int -opal_i2cm_attach(device_t dev) -{ - phandle_t child; - device_t cdev; - struct ofw_bus_devinfo *dinfo; - - for (child = OF_child(ofw_bus_get_node(dev)); child != 0; - child = OF_peer(child)) { - dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); - if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { - free(dinfo, M_DEVBUF); - continue; - } - cdev = device_add_child(dev, NULL, -1); - if (cdev == NULL) { - device_printf(dev, "<%s>: device_add_child failed\n", - dinfo->obd_name); - ofw_bus_gen_destroy_devinfo(dinfo); - free(dinfo, M_DEVBUF); - continue; - } - device_set_ivars(cdev, dinfo); - } - - return (bus_generic_attach(dev)); -} - -static const struct ofw_bus_devinfo * -opal_i2cm_get_devinfo(device_t dev, device_t child) -{ - return (device_get_ivars(child)); -} - -DEFINE_CLASS_0(opal_i2cm, opal_i2cm_driver, opal_i2cm_methods, - sizeof(struct opal_i2cm_softc)); -DRIVER_MODULE(opal_i2cm, powernv_xscom, opal_i2cm_driver, opal_i2cm_devclass, NULL, - NULL); -DRIVER_MODULE(opal_i2cm, powernv_centaur, opal_i2cm_driver, opal_i2cm_devclass, NULL, - NULL); diff --git a/sys/powerpc/powernv/opal_nvram.c b/sys/powerpc/powernv/opal_nvram.c deleted file mode 100644 index 89eb3b8ae5f..00000000000 --- a/sys/powerpc/powernv/opal_nvram.c +++ /dev/null @@ -1,300 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2019 Justin Hibbits - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include - -#include "opal.h" - -#include - -#include -#include - -#define NVRAM_BUFSIZE (65536) /* 64k blocks */ - -struct opal_nvram_softc { - device_t sc_dev; - struct mtx sc_mtx; - uint32_t sc_size; - uint8_t *sc_buf; - vm_paddr_t sc_buf_phys; - - struct cdev *sc_cdev; - int sc_isopen; -}; - -#define NVRAM_LOCK(sc) mtx_lock(&sc->sc_mtx) -#define NVRAM_UNLOCK(sc) mtx_unlock(&sc->sc_mtx) - -/* - * Device interface. - */ -static int opal_nvram_probe(device_t); -static int opal_nvram_attach(device_t); -static int opal_nvram_detach(device_t); - -/* - * Driver methods. - */ -static device_method_t opal_nvram_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, opal_nvram_probe), - DEVMETHOD(device_attach, opal_nvram_attach), - DEVMETHOD(device_detach, opal_nvram_detach), - { 0, 0 } -}; - -static driver_t opal_nvram_driver = { - "opal_nvram", - opal_nvram_methods, - sizeof(struct opal_nvram_softc) -}; - -static devclass_t opal_nvram_devclass; - -DRIVER_MODULE(opal_nvram, opal, opal_nvram_driver, opal_nvram_devclass, 0, 0); - -/* - * Cdev methods. - */ - -static d_open_t opal_nvram_open; -static d_close_t opal_nvram_close; -static d_read_t opal_nvram_read; -static d_write_t opal_nvram_write; -static d_ioctl_t opal_nvram_ioctl; - -static struct cdevsw opal_nvram_cdevsw = { - .d_version = D_VERSION, - .d_open = opal_nvram_open, - .d_close = opal_nvram_close, - .d_read = opal_nvram_read, - .d_write = opal_nvram_write, - .d_ioctl = opal_nvram_ioctl, - .d_name = "nvram", -}; - -static int -opal_nvram_probe(device_t dev) -{ - - if (!ofw_bus_is_compatible(dev, "ibm,opal-nvram")) - return (ENXIO); - - device_set_desc(dev, "OPAL NVRAM"); - return (BUS_PROBE_DEFAULT); -} - -static int -opal_nvram_attach(device_t dev) -{ - struct opal_nvram_softc *sc; - phandle_t node; - int err; - - node = ofw_bus_get_node(dev); - sc = device_get_softc(dev); - - sc->sc_dev = dev; - - err = OF_getencprop(node, "#bytes", &sc->sc_size, - sizeof(sc->sc_size)); - - if (err < 0) - return (ENXIO); - - sc->sc_buf = contigmalloc(NVRAM_BUFSIZE, M_DEVBUF, M_WAITOK, - 0, BUS_SPACE_MAXADDR, PAGE_SIZE, 0); - if (sc->sc_buf == NULL) { - device_printf(dev, "No memory for buffer.\n"); - return (ENXIO); - } - sc->sc_buf_phys = pmap_kextract((vm_offset_t)sc->sc_buf); - sc->sc_cdev = make_dev(&opal_nvram_cdevsw, 0, 0, 0, 0600, - "nvram"); - sc->sc_cdev->si_drv1 = sc; - - mtx_init(&sc->sc_mtx, "opal_nvram", 0, MTX_DEF); - - return (0); -} - -static int -opal_nvram_detach(device_t dev) -{ - struct opal_nvram_softc *sc; - - sc = device_get_softc(dev); - - if (sc->sc_cdev != NULL) - destroy_dev(sc->sc_cdev); - if (sc->sc_buf != NULL) - contigfree(sc->sc_buf, NVRAM_BUFSIZE, M_DEVBUF); - - mtx_destroy(&sc->sc_mtx); - - return (0); -} - -static int -opal_nvram_open(struct cdev *dev, int flags, int fmt, struct thread *td) -{ - struct opal_nvram_softc *sc = dev->si_drv1; - int err; - - err = 0; - - NVRAM_LOCK(sc); - if (sc->sc_isopen) - err = EBUSY; - else - sc->sc_isopen = 1; - NVRAM_UNLOCK(sc); - - return (err); -} - -static int -opal_nvram_close(struct cdev *dev, int fflag, int devtype, struct thread *td) -{ - struct opal_nvram_softc *sc = dev->si_drv1; - - NVRAM_LOCK(sc); - sc->sc_isopen = 0; - NVRAM_UNLOCK(sc); - - return (0); -} - -static int -opal_nvram_read(struct cdev *dev, struct uio *uio, int ioflag) -{ - struct opal_nvram_softc *sc = dev->si_drv1; - int rv, amnt; - - rv = 0; - - NVRAM_LOCK(sc); - while (uio->uio_resid > 0) { - amnt = MIN(uio->uio_resid, sc->sc_size - uio->uio_offset); - amnt = MIN(amnt, NVRAM_BUFSIZE); - if (amnt == 0) - break; - - rv = opal_call(OPAL_READ_NVRAM, sc->sc_buf_phys, - amnt, uio->uio_offset); - if (rv != OPAL_SUCCESS) { - switch (rv) { - case OPAL_HARDWARE: - rv = EIO; - break; - case OPAL_PARAMETER: - rv = EINVAL; - break; - } - break; - } - rv = uiomove(sc->sc_buf, amnt, uio); - if (rv != 0) - break; - } - NVRAM_UNLOCK(sc); - - return (rv); -} - -static int -opal_nvram_write(struct cdev *dev, struct uio *uio, int ioflag) -{ - off_t offset; - int rv, amnt; - struct opal_nvram_softc *sc = dev->si_drv1; - - rv = 0; - - NVRAM_LOCK(sc); - while (uio->uio_resid > 0) { - amnt = MIN(uio->uio_resid, sc->sc_size - uio->uio_offset); - amnt = MIN(amnt, NVRAM_BUFSIZE); - if (amnt == 0) { - rv = ENOSPC; - break; - } - offset = uio->uio_offset; - rv = uiomove(sc->sc_buf, amnt, uio); - if (rv != 0) - break; - rv = opal_call(OPAL_WRITE_NVRAM, sc->sc_buf_phys, amnt, - offset); - if (rv != OPAL_SUCCESS) { - switch (rv) { - case OPAL_HARDWARE: - rv = EIO; - break; - case OPAL_PARAMETER: - rv = EINVAL; - break; - } - break; - } - } - - NVRAM_UNLOCK(sc); - - return (rv); -} - -static int -opal_nvram_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, - struct thread *td) -{ - struct opal_nvram_softc *sc = dev->si_drv1; - - switch (cmd) { - case DIOCGMEDIASIZE: - *(off_t *)data = sc->sc_size; - return (0); - } - return (EINVAL); -} diff --git a/sys/powerpc/powernv/opal_pci.c b/sys/powerpc/powernv/opal_pci.c deleted file mode 100644 index cfbf3fe9427..00000000000 --- a/sys/powerpc/powernv/opal_pci.c +++ /dev/null @@ -1,723 +0,0 @@ -/*- - * Copyright (c) 2015-2016 Nathan Whitehorn - * Copyright (c) 2017-2018 Semihalf - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include -#include - -#include "pcib_if.h" -#include "pic_if.h" -#include "iommu_if.h" -#include "opal.h" - -#define OPAL_PCI_TCE_MAX_ENTRIES (1024*1024UL) -#define OPAL_PCI_TCE_DEFAULT_SEG_SIZE (16*1024*1024UL) -#define OPAL_PCI_TCE_R (1UL << 0) -#define OPAL_PCI_TCE_W (1UL << 1) -#define PHB3_TCE_KILL_INVAL_ALL (1UL << 63) - -/* - * Device interface. - */ -static int opalpci_probe(device_t); -static int opalpci_attach(device_t); - -/* - * pcib interface. - */ -static uint32_t opalpci_read_config(device_t, u_int, u_int, u_int, - u_int, int); -static void opalpci_write_config(device_t, u_int, u_int, u_int, - u_int, u_int32_t, int); -static int opalpci_alloc_msi(device_t dev, device_t child, - int count, int maxcount, int *irqs); -static int opalpci_release_msi(device_t dev, device_t child, - int count, int *irqs); -static int opalpci_alloc_msix(device_t dev, device_t child, - int *irq); -static int opalpci_release_msix(device_t dev, device_t child, - int irq); -static int opalpci_map_msi(device_t dev, device_t child, - int irq, uint64_t *addr, uint32_t *data); -static int opalpci_route_interrupt(device_t bus, device_t dev, int pin); - -/* - * MSI PIC interface. - */ -static void opalpic_pic_enable(device_t dev, u_int irq, u_int vector, void **); -static void opalpic_pic_eoi(device_t dev, u_int irq, void *); - -/* Bus interface */ -static bus_dma_tag_t opalpci_get_dma_tag(device_t dev, device_t child); - -/* - * Commands - */ -#define OPAL_M32_WINDOW_TYPE 1 -#define OPAL_M64_WINDOW_TYPE 2 -#define OPAL_IO_WINDOW_TYPE 3 - -#define OPAL_RESET_PHB_COMPLETE 1 -#define OPAL_RESET_PCI_IODA_TABLE 6 - -#define OPAL_DISABLE_M64 0 -#define OPAL_ENABLE_M64_SPLIT 1 -#define OPAL_ENABLE_M64_NON_SPLIT 2 - -#define OPAL_EEH_ACTION_CLEAR_FREEZE_MMIO 1 -#define OPAL_EEH_ACTION_CLEAR_FREEZE_DMA 2 -#define OPAL_EEH_ACTION_CLEAR_FREEZE_ALL 3 - -#define OPAL_EEH_STOPPED_NOT_FROZEN 0 - -/* - * Constants - */ -#define OPAL_PCI_DEFAULT_PE 1 - -#define OPAL_PCI_BUS_SPACE_LOWADDR_32BIT 0x7FFFFFFFUL - -/* - * Driver methods. - */ -static device_method_t opalpci_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, opalpci_probe), - DEVMETHOD(device_attach, opalpci_attach), - - /* pcib interface */ - DEVMETHOD(pcib_read_config, opalpci_read_config), - DEVMETHOD(pcib_write_config, opalpci_write_config), - - DEVMETHOD(pcib_alloc_msi, opalpci_alloc_msi), - DEVMETHOD(pcib_release_msi, opalpci_release_msi), - DEVMETHOD(pcib_alloc_msix, opalpci_alloc_msix), - DEVMETHOD(pcib_release_msix, opalpci_release_msix), - DEVMETHOD(pcib_map_msi, opalpci_map_msi), - DEVMETHOD(pcib_route_interrupt, opalpci_route_interrupt), - - /* PIC interface for MSIs */ - DEVMETHOD(pic_enable, opalpic_pic_enable), - DEVMETHOD(pic_eoi, opalpic_pic_eoi), - - /* Bus interface */ - DEVMETHOD(bus_get_dma_tag, opalpci_get_dma_tag), - DEVMETHOD(bus_get_cpus, ofw_pcibus_get_cpus), - DEVMETHOD(bus_get_domain, ofw_pcibus_get_domain), - - DEVMETHOD_END -}; - -struct opalpci_softc { - struct ofw_pci_softc ofw_sc; - uint64_t phb_id; - vmem_t *msi_vmem; - int msi_base; /* Base XIVE number */ - int base_msi_irq; /* Base IRQ assigned by FreeBSD to this PIC */ - uint64_t *tce; /* TCE table for 1:1 mapping */ - struct resource *r_reg; -}; - -static devclass_t opalpci_devclass; -DEFINE_CLASS_1(pcib, opalpci_driver, opalpci_methods, - sizeof(struct opalpci_softc), ofw_pci_driver); -EARLY_DRIVER_MODULE(opalpci, ofwbus, opalpci_driver, opalpci_devclass, 0, 0, - BUS_PASS_BUS); - -static int -opalpci_probe(device_t dev) -{ - const char *type; - - if (opal_check() != 0) - return (ENXIO); - - type = ofw_bus_get_type(dev); - - if (type == NULL || (strcmp(type, "pci") != 0 && - strcmp(type, "pciex") != 0)) - return (ENXIO); - - if (!OF_hasprop(ofw_bus_get_node(dev), "ibm,opal-phbid")) - return (ENXIO); - - device_set_desc(dev, "OPAL Host-PCI bridge"); - return (BUS_PROBE_GENERIC); -} - -static void -pci_phb3_tce_invalidate_entire(struct opalpci_softc *sc) -{ - - mb(); - bus_write_8(sc->r_reg, 0x210, PHB3_TCE_KILL_INVAL_ALL); - mb(); -} - -/* Simple function to round to a power of 2 */ -static uint64_t -round_pow2(uint64_t val) -{ - - return (1 << (flsl(val + (val - 1)) - 1)); -} - -/* - * Starting with skiboot 5.10 PCIe nodes have a new property, - * "ibm,supported-tce-sizes", to denote the TCE sizes available. This allows us - * to avoid hard-coding the maximum TCE size allowed, and instead provide a sane - * default (however, the "sane" default, which works for all targets, is 64k, - * limiting us to 64GB if we have 1M entries. - */ -static uint64_t -max_tce_size(device_t dev) -{ - phandle_t node; - cell_t sizes[64]; /* Property is a list of bit-widths, up to 64-bits */ - int count; - - node = ofw_bus_get_node(dev); - - count = OF_getencprop(node, "ibm,supported-tce-sizes", - sizes, sizeof(sizes)); - if (count < (int) sizeof(cell_t)) - return OPAL_PCI_TCE_DEFAULT_SEG_SIZE; - - count /= sizeof(cell_t); - - return (1ULL << sizes[count - 1]); -} - -static int -opalpci_attach(device_t dev) -{ - struct opalpci_softc *sc; - cell_t id[2], m64ranges[2], m64window[6], npe; - phandle_t node; - int i, err; - uint64_t maxmem; - uint64_t entries; - uint64_t tce_size; - uint64_t tce_tbl_size; - int m64bar; - int rid; - - sc = device_get_softc(dev); - node = ofw_bus_get_node(dev); - - switch (OF_getproplen(node, "ibm,opal-phbid")) { - case 8: - OF_getencprop(node, "ibm,opal-phbid", id, 8); - sc->phb_id = ((uint64_t)id[0] << 32) | id[1]; - break; - case 4: - OF_getencprop(node, "ibm,opal-phbid", id, 4); - sc->phb_id = id[0]; - break; - default: - device_printf(dev, "PHB ID property had wrong length (%zd)\n", - OF_getproplen(node, "ibm,opal-phbid")); - return (ENXIO); - } - - if (bootverbose) - device_printf(dev, "OPAL ID %#lx\n", sc->phb_id); - - rid = 0; - sc->r_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &rid, RF_ACTIVE | RF_SHAREABLE); - if (sc->r_reg == NULL) { - device_printf(dev, "Failed to allocate PHB[%jd] registers\n", - (uintmax_t)sc->phb_id); - return (ENXIO); - } - -#if 0 - /* - * Reset PCI IODA table - */ - err = opal_call(OPAL_PCI_RESET, sc->phb_id, OPAL_RESET_PCI_IODA_TABLE, - 1); - if (err != 0) { - device_printf(dev, "IODA table reset failed: %d\n", err); - return (ENXIO); - } - err = opal_call(OPAL_PCI_RESET, sc->phb_id, OPAL_RESET_PHB_COMPLETE, - 1); - if (err < 0) { - device_printf(dev, "PHB reset failed: %d\n", err); - return (ENXIO); - } - if (err > 0) { - while ((err = opal_call(OPAL_PCI_POLL, sc->phb_id)) > 0) { - DELAY(1000*(err + 1)); /* Returns expected delay in ms */ - } - } - if (err < 0) { - device_printf(dev, "WARNING: PHB IODA reset poll failed: %d\n", err); - } - err = opal_call(OPAL_PCI_RESET, sc->phb_id, OPAL_RESET_PHB_COMPLETE, - 0); - if (err < 0) { - device_printf(dev, "PHB reset failed: %d\n", err); - return (ENXIO); - } - if (err > 0) { - while ((err = opal_call(OPAL_PCI_POLL, sc->phb_id)) > 0) { - DELAY(1000*(err + 1)); /* Returns expected delay in ms */ - } - } -#endif - - /* - * Map all devices on the bus to partitionable endpoint one until - * such time as we start wanting to do things like bhyve. - */ - err = opal_call(OPAL_PCI_SET_PE, sc->phb_id, OPAL_PCI_DEFAULT_PE, - 0, OPAL_PCI_BUS_ANY, OPAL_IGNORE_RID_DEVICE_NUMBER, - OPAL_IGNORE_RID_FUNC_NUMBER, OPAL_MAP_PE); - if (err != 0) { - device_printf(dev, "PE mapping failed: %d\n", err); - return (ENXIO); - } - - /* - * Turn on MMIO, mapped to PE 1 - */ - if (OF_getencprop(node, "ibm,opal-num-pes", &npe, 4) != 4) - npe = 1; - for (i = 0; i < npe; i++) { - err = opal_call(OPAL_PCI_MAP_PE_MMIO_WINDOW, sc->phb_id, - OPAL_PCI_DEFAULT_PE, OPAL_M32_WINDOW_TYPE, 0, i); - if (err != 0) - device_printf(dev, "MMIO %d map failed: %d\n", i, err); - } - - if (OF_getencprop(node, "ibm,opal-available-m64-ranges", - m64ranges, sizeof(m64ranges)) == sizeof(m64ranges)) - m64bar = m64ranges[0]; - else - m64bar = 0; - - /* XXX: multiple M64 windows? */ - if (OF_getencprop(node, "ibm,opal-m64-window", - m64window, sizeof(m64window)) == sizeof(m64window)) { - opal_call(OPAL_PCI_PHB_MMIO_ENABLE, sc->phb_id, - OPAL_M64_WINDOW_TYPE, m64bar, 0); - opal_call(OPAL_PCI_SET_PHB_MEM_WINDOW, sc->phb_id, - OPAL_M64_WINDOW_TYPE, m64bar /* index */, - ((uint64_t)m64window[2] << 32) | m64window[3], 0, - ((uint64_t)m64window[4] << 32) | m64window[5]); - opal_call(OPAL_PCI_MAP_PE_MMIO_WINDOW, sc->phb_id, - OPAL_PCI_DEFAULT_PE, OPAL_M64_WINDOW_TYPE, - m64bar /* index */, 0); - opal_call(OPAL_PCI_PHB_MMIO_ENABLE, sc->phb_id, - OPAL_M64_WINDOW_TYPE, m64bar, OPAL_ENABLE_M64_NON_SPLIT); - } - - /* - * Enable IOMMU for PE1 - map everything 1:1 using - * segments of max_tce_size size - */ - tce_size = max_tce_size(dev); - maxmem = roundup2(powerpc_ptob(Maxmem), tce_size); - entries = round_pow2(maxmem / tce_size); - tce_tbl_size = MAX(entries * sizeof(uint64_t), 4096); - if (entries > OPAL_PCI_TCE_MAX_ENTRIES) - panic("POWERNV supports only %jdGB of memory space\n", - (uintmax_t)((OPAL_PCI_TCE_MAX_ENTRIES * tce_size) >> 30)); - if (bootverbose) - device_printf(dev, "Mapping 0-%#jx for DMA\n", (uintmax_t)maxmem); - sc->tce = contigmalloc(tce_tbl_size, - M_DEVBUF, M_NOWAIT | M_ZERO, 0, - BUS_SPACE_MAXADDR, tce_tbl_size, 0); - if (sc->tce == NULL) - panic("Failed to allocate TCE memory for PHB %jd\n", - (uintmax_t)sc->phb_id); - - for (i = 0; i < entries; i++) - sc->tce[i] = htobe64((i * tce_size) | OPAL_PCI_TCE_R | OPAL_PCI_TCE_W); - - /* Map TCE for every PE. It seems necessary for Power8 */ - for (i = 0; i < npe; i++) { - err = opal_call(OPAL_PCI_MAP_PE_DMA_WINDOW, sc->phb_id, - i, (i << 1), - 1, pmap_kextract((uint64_t)&sc->tce[0]), - tce_tbl_size, tce_size); - if (err != 0) { - device_printf(dev, "DMA IOMMU mapping failed: %d\n", err); - return (ENXIO); - } - - err = opal_call(OPAL_PCI_MAP_PE_DMA_WINDOW_REAL, sc->phb_id, - i, (i << 1) + 1, - (1UL << 59), maxmem); - if (err != 0) { - device_printf(dev, "DMA 64b bypass mapping failed: %d\n", err); - return (ENXIO); - } - } - - /* - * Invalidate all previous TCE entries. - */ - if (ofw_bus_is_compatible(dev, "power8-pciex")) - pci_phb3_tce_invalidate_entire(sc); - else - opal_call(OPAL_PCI_TCE_KILL, sc->phb_id, OPAL_PCI_TCE_KILL_ALL, - OPAL_PCI_DEFAULT_PE, 0, 0, 0); - - /* - * Get MSI properties - */ - sc->msi_vmem = NULL; - if (OF_getproplen(node, "ibm,opal-msi-ranges") > 0) { - cell_t msi_ranges[2]; - OF_getencprop(node, "ibm,opal-msi-ranges", - msi_ranges, sizeof(msi_ranges)); - sc->msi_base = msi_ranges[0]; - - sc->msi_vmem = vmem_create("OPAL MSI", msi_ranges[0], - msi_ranges[1], 1, 0, M_BESTFIT | M_WAITOK); - - sc->base_msi_irq = powerpc_register_pic(dev, - OF_xref_from_node(node), - msi_ranges[0] + msi_ranges[1], 0, FALSE); - - if (bootverbose) - device_printf(dev, "Supports %d MSIs starting at %d\n", - msi_ranges[1], msi_ranges[0]); - } - - /* Create the parent DMA tag */ - /* - * Constrain it to POWER8 PHB (ioda2) for now. It seems to mess up on - * POWER9 systems. - */ - if (ofw_bus_is_compatible(dev, "ibm,ioda2-phb")) { - err = bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ - 1, 0, /* alignment, bounds */ - OPAL_PCI_BUS_SPACE_LOWADDR_32BIT, /* lowaddr */ - BUS_SPACE_MAXADDR_32BIT, /* highaddr */ - NULL, NULL, /* filter, filterarg */ - BUS_SPACE_MAXSIZE, /* maxsize */ - BUS_SPACE_UNRESTRICTED, /* nsegments */ - BUS_SPACE_MAXSIZE, /* maxsegsize */ - 0, /* flags */ - NULL, NULL, /* lockfunc, lockarg */ - &sc->ofw_sc.sc_dmat); - if (err != 0) { - device_printf(dev, "Failed to create DMA tag\n"); - return (err); - } - } - - /* - * General OFW PCI attach - */ - err = ofw_pci_init(dev); - if (err != 0) - return (err); - - /* - * Unfreeze non-config-space PCI operations. Let this fail silently - * if e.g. there is no current freeze. - */ - opal_call(OPAL_PCI_EEH_FREEZE_CLEAR, sc->phb_id, OPAL_PCI_DEFAULT_PE, - OPAL_EEH_ACTION_CLEAR_FREEZE_ALL); - - /* - * OPAL stores 64-bit BARs in a special property rather than "ranges" - */ - if (OF_getencprop(node, "ibm,opal-m64-window", - m64window, sizeof(m64window)) == sizeof(m64window)) { - struct ofw_pci_range *rp; - - sc->ofw_sc.sc_nrange++; - sc->ofw_sc.sc_range = realloc(sc->ofw_sc.sc_range, - sc->ofw_sc.sc_nrange * sizeof(sc->ofw_sc.sc_range[0]), - M_DEVBUF, M_WAITOK); - rp = &sc->ofw_sc.sc_range[sc->ofw_sc.sc_nrange-1]; - rp->pci_hi = OFW_PCI_PHYS_HI_SPACE_MEM64 | - OFW_PCI_PHYS_HI_PREFETCHABLE; - rp->pci = ((uint64_t)m64window[0] << 32) | m64window[1]; - rp->host = ((uint64_t)m64window[2] << 32) | m64window[3]; - rp->size = ((uint64_t)m64window[4] << 32) | m64window[5]; - rman_manage_region(&sc->ofw_sc.sc_mem_rman, rp->pci, - rp->pci + rp->size - 1); - } - - return (ofw_pci_attach(dev)); -} - -static uint32_t -opalpci_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, - int width) -{ - struct opalpci_softc *sc; - uint64_t config_addr; - uint8_t byte, eeh_state; - uint16_t half; - uint32_t word; - int error; - uint16_t err_type; - - sc = device_get_softc(dev); - - config_addr = (bus << 8) | ((slot & 0x1f) << 3) | (func & 0x7); - - switch (width) { - case 1: - error = opal_call(OPAL_PCI_CONFIG_READ_BYTE, sc->phb_id, - config_addr, reg, vtophys(&byte)); - word = byte; - break; - case 2: - error = opal_call(OPAL_PCI_CONFIG_READ_HALF_WORD, sc->phb_id, - config_addr, reg, vtophys(&half)); - word = be16toh(half); - break; - case 4: - error = opal_call(OPAL_PCI_CONFIG_READ_WORD, sc->phb_id, - config_addr, reg, vtophys(&word)); - word = be32toh(word); - break; - default: - error = OPAL_SUCCESS; - word = 0xffffffff; - width = 4; - } - - /* - * Poking config state for non-existant devices can make - * the host bridge hang up. Clear any errors. - */ - - if (error != OPAL_SUCCESS || - (word == ((1UL << (8 * width)) - 1))) { - if (error != OPAL_HARDWARE) { - opal_call(OPAL_PCI_EEH_FREEZE_STATUS, sc->phb_id, - OPAL_PCI_DEFAULT_PE, vtophys(&eeh_state), - vtophys(&err_type), NULL); - err_type = be16toh(err_type); /* XXX unused */ - if (eeh_state != OPAL_EEH_STOPPED_NOT_FROZEN) - opal_call(OPAL_PCI_EEH_FREEZE_CLEAR, - sc->phb_id, OPAL_PCI_DEFAULT_PE, - OPAL_EEH_ACTION_CLEAR_FREEZE_ALL); - } - if (error != OPAL_SUCCESS) - word = 0xffffffff; - } - - return (word); -} - -static void -opalpci_write_config(device_t dev, u_int bus, u_int slot, u_int func, - u_int reg, uint32_t val, int width) -{ - struct opalpci_softc *sc; - uint64_t config_addr; - int error = OPAL_SUCCESS; - - sc = device_get_softc(dev); - - config_addr = (bus << 8) | ((slot & 0x1f) << 3) | (func & 0x7); - - switch (width) { - case 1: - error = opal_call(OPAL_PCI_CONFIG_WRITE_BYTE, sc->phb_id, - config_addr, reg, val); - break; - case 2: - error = opal_call(OPAL_PCI_CONFIG_WRITE_HALF_WORD, sc->phb_id, - config_addr, reg, val); - break; - case 4: - error = opal_call(OPAL_PCI_CONFIG_WRITE_WORD, sc->phb_id, - config_addr, reg, val); - break; - } - - if (error != OPAL_SUCCESS) { - /* - * Poking config state for non-existant devices can make - * the host bridge hang up. Clear any errors. - */ - if (error != OPAL_HARDWARE) { - opal_call(OPAL_PCI_EEH_FREEZE_CLEAR, - sc->phb_id, OPAL_PCI_DEFAULT_PE, - OPAL_EEH_ACTION_CLEAR_FREEZE_ALL); - } - } -} - -static int -opalpci_route_interrupt(device_t bus, device_t dev, int pin) -{ - - return (pin); -} - -static int -opalpci_alloc_msi(device_t dev, device_t child, int count, int maxcount, - int *irqs) -{ - struct opalpci_softc *sc; - vmem_addr_t start; - phandle_t xref; - int err, i; - - sc = device_get_softc(dev); - if (sc->msi_vmem == NULL) - return (ENODEV); - - err = vmem_xalloc(sc->msi_vmem, count, powerof2(count), 0, 0, - VMEM_ADDR_MIN, VMEM_ADDR_MAX, M_BESTFIT | M_WAITOK, &start); - - if (err) - return (err); - - xref = OF_xref_from_node(ofw_bus_get_node(dev)); - for (i = 0; i < count; i++) - irqs[i] = MAP_IRQ(xref, start + i); - - return (0); -} - -static int -opalpci_release_msi(device_t dev, device_t child, int count, int *irqs) -{ - struct opalpci_softc *sc; - - sc = device_get_softc(dev); - if (sc->msi_vmem == NULL) - return (ENODEV); - - vmem_xfree(sc->msi_vmem, irqs[0] - sc->base_msi_irq, count); - return (0); -} - -static int -opalpci_alloc_msix(device_t dev, device_t child, int *irq) -{ - return (opalpci_alloc_msi(dev, child, 1, 1, irq)); -} - -static int -opalpci_release_msix(device_t dev, device_t child, int irq) -{ - return (opalpci_release_msi(dev, child, 1, &irq)); -} - -static int -opalpci_map_msi(device_t dev, device_t child, int irq, uint64_t *addr, - uint32_t *data) -{ - struct opalpci_softc *sc; - struct pci_devinfo *dinfo; - int err, xive; - - sc = device_get_softc(dev); - if (sc->msi_vmem == NULL) - return (ENODEV); - - xive = irq - sc->base_msi_irq - sc->msi_base; - opal_call(OPAL_PCI_SET_XIVE_PE, sc->phb_id, OPAL_PCI_DEFAULT_PE, xive); - - dinfo = device_get_ivars(child); - if (dinfo->cfg.msi.msi_alloc > 0 && - (dinfo->cfg.msi.msi_ctrl & PCIM_MSICTRL_64BIT) == 0) { - uint32_t msi32; - err = opal_call(OPAL_GET_MSI_32, sc->phb_id, - OPAL_PCI_DEFAULT_PE, xive, 1, vtophys(&msi32), - vtophys(data)); - *addr = be32toh(msi32); - } else { - err = opal_call(OPAL_GET_MSI_64, sc->phb_id, - OPAL_PCI_DEFAULT_PE, xive, 1, vtophys(addr), vtophys(data)); - *addr = be64toh(*addr); - } - *data = be32toh(*data); - - if (bootverbose && err != 0) - device_printf(child, "OPAL MSI mapping error: %d\n", err); - - return ((err == 0) ? 0 : ENXIO); -} - -static void -opalpic_pic_enable(device_t dev, u_int irq, u_int vector, void **priv) -{ - struct opalpci_softc *sc = device_get_softc(dev); - - PIC_ENABLE(root_pic, irq, vector, priv); - opal_call(OPAL_PCI_MSI_EOI, sc->phb_id, irq, priv); -} - -static void opalpic_pic_eoi(device_t dev, u_int irq, void *priv) -{ - struct opalpci_softc *sc; - - sc = device_get_softc(dev); - opal_call(OPAL_PCI_MSI_EOI, sc->phb_id, irq); - - PIC_EOI(root_pic, irq, priv); -} - -static bus_dma_tag_t -opalpci_get_dma_tag(device_t dev, device_t child) -{ - struct opalpci_softc *sc; - - sc = device_get_softc(dev); - return (sc->ofw_sc.sc_dmat); -} diff --git a/sys/powerpc/powernv/opal_sensor.c b/sys/powerpc/powernv/opal_sensor.c deleted file mode 100644 index adc229bc479..00000000000 --- a/sys/powerpc/powernv/opal_sensor.c +++ /dev/null @@ -1,330 +0,0 @@ -/*- - * Copyright (C) 2018 Justin Hibbits - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include - -#include "opal.h" - -struct opal_sensor_softc { - device_t sc_dev; - struct mtx sc_mtx; - uint32_t sc_handle; - uint32_t sc_min_handle; - uint32_t sc_max_handle; - char *sc_label; - int sc_type; -}; - -#define SENSOR_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) -#define SENSOR_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) -#define SENSOR_LOCK_INIT(_sc) \ - mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \ - "opal-sensor", MTX_DEF) - -/* - * A bit confusing, maybe. There are two types of nodes with compatible strings - * of "ibm,opal-sensor". One hangs off /ibm,opal/, named "sensors", the other - * hangs off of this node. For newbus attachments, we have one node (opalsens) - * attach from opal0, and the others (opal_sensor) attach from opalsens. These - * are the real sensors. - */ -enum opal_sensor_type { - OPAL_SENSOR_TEMP = 0, /* From OPAL: degC */ - OPAL_SENSOR_FAN = 1, /* From OPAL: RPM */ - OPAL_SENSOR_POWER = 2, /* From OPAL: W */ - OPAL_SENSOR_IN = 3, /* From OPAL: mV */ - OPAL_SENSOR_ENERGY = 4, /* From OPAL: uJ */ - OPAL_SENSOR_CURR = 5, /* From OPAL: mA */ - OPAL_SENSOR_MAX -}; - -/* This must be kept sorted with the enum above. */ -const char *opal_sensor_types[] = { - "temp", - "fan", - "power", - "in", - "energy", - "curr" -}; - -/* - * Retrieve the raw value from OPAL. This will be cooked by the sysctl handler. - */ -static int -opal_sensor_get_val(struct opal_sensor_softc *sc, uint32_t key, uint64_t *val) -{ - struct opal_msg msg; - uint32_t val32; - int rv, token; - - token = opal_alloc_async_token(); - SENSOR_LOCK(sc); - rv = opal_call(OPAL_SENSOR_READ, key, token, vtophys(&val32)); - - if (rv == OPAL_ASYNC_COMPLETION) { - /* Sleep a little to let things settle. */ - DELAY(100); - bzero(&msg, sizeof(msg)); - rv = opal_wait_completion(&msg, sizeof(msg), token); - - if (rv == OPAL_SUCCESS) - val32 = msg.params[0]; - } - SENSOR_UNLOCK(sc); - - if (rv == OPAL_SUCCESS) - *val = be32toh(val32); - else - rv = EIO; - - opal_free_async_token(token); - return (rv); -} - -static int -opal_sensor_sysctl(SYSCTL_HANDLER_ARGS) -{ - struct opal_sensor_softc *sc; - int error, result; - uint32_t sensor; - uint64_t sensval; - - sc = arg1; - sensor = arg2; - - error = opal_sensor_get_val(sc, sensor, &sensval); - - if (error) - return (error); - - result = sensval; - - switch (sc->sc_type) { - case OPAL_SENSOR_TEMP: - result = result * 10 + 2731; /* Convert to K */ - break; - case OPAL_SENSOR_POWER: - result = result * 1000; /* Convert to mW */ - break; - } - - error = sysctl_handle_int(oidp, &result, 0, req); - - return (error); -} - -static int -opal_sensor_probe(device_t dev) -{ - if (!ofw_bus_is_compatible(dev, "ibm,opal-sensor")) - return (ENXIO); - - device_set_desc(dev, "OPAL sensor"); - return (BUS_PROBE_GENERIC); -} - -static int -opal_sensor_attach(device_t dev) -{ - struct opal_sensor_softc *sc; - struct sysctl_ctx_list *ctx; - struct sysctl_oid *tree; - char type[8]; - phandle_t node; - cell_t sensor_id; - int i; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - - node = ofw_bus_get_node(dev); - - if (OF_getencprop(node, "sensor-data", &sensor_id, sizeof(sensor_id)) < 0) { - device_printf(dev, "Missing sensor ID\n"); - return (ENXIO); - } - if (OF_getprop(node, "sensor-type", type, sizeof(type)) < 0) { - device_printf(dev, "Missing sensor type\n"); - return (ENXIO); - } - - sc->sc_type = -1; - for (i = 0; i < OPAL_SENSOR_MAX; i++) { - if (strcmp(type, opal_sensor_types[i]) == 0) { - sc->sc_type = i; - break; - } - } - if (sc->sc_type == -1) { - device_printf(dev, "Unknown sensor type '%s'\n", type); - return (ENXIO); - } - - ctx = device_get_sysctl_ctx(dev); - tree = device_get_sysctl_tree(dev); - - sc->sc_handle = sensor_id; - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "sensor", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc, - sensor_id, opal_sensor_sysctl, - (sc->sc_type == OPAL_SENSOR_TEMP) ? "IK" : "I", "current value"); - - SYSCTL_ADD_STRING(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "type", - CTLFLAG_RD, __DECONST(char *, opal_sensor_types[sc->sc_type]), - 0, ""); - - OF_getprop_alloc(node, "label", (void **)&sc->sc_label); - SYSCTL_ADD_STRING(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "label", - CTLFLAG_RD, sc->sc_label, 0, ""); - - if (OF_getencprop(node, "sensor-data-min", - &sensor_id, sizeof(sensor_id)) > 0) { - sc->sc_min_handle = sensor_id; - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "sensor_min", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, - sc, sensor_id, opal_sensor_sysctl, - (sc->sc_type == OPAL_SENSOR_TEMP) ? "IK" : "I", - "minimum value"); - } - - if (OF_getencprop(node, "sensor-data-max", - &sensor_id, sizeof(sensor_id)) > 0) { - sc->sc_max_handle = sensor_id; - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "sensor_max", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, - sc, sensor_id, opal_sensor_sysctl, - (sc->sc_type == OPAL_SENSOR_TEMP) ? "IK" : "I", - "maximum value"); - } - - SENSOR_LOCK_INIT(sc); - - return (0); -} - -static device_method_t opal_sensor_methods[] = { - DEVMETHOD(device_probe, opal_sensor_probe), - DEVMETHOD(device_attach, opal_sensor_attach), -}; - -static driver_t opal_sensor_driver = { - "opal_sensor", - opal_sensor_methods, - sizeof(struct opal_sensor_softc) -}; - -static devclass_t opal_sensor_devclass; - -DRIVER_MODULE(opal_sensor, opalsens, opal_sensor_driver, opal_sensor_devclass, - NULL, NULL); - -static int -opalsens_probe(device_t dev) -{ - - if (!ofw_bus_is_compatible(dev, "ibm,opal-sensor")) - return (ENXIO); - - device_set_desc(dev, "OPAL Sensors"); - return (BUS_PROBE_GENERIC); -} - -static int -opalsens_attach(device_t dev) -{ - phandle_t child; - device_t cdev; - struct ofw_bus_devinfo *dinfo; - - for (child = OF_child(ofw_bus_get_node(dev)); child != 0; - child = OF_peer(child)) { - dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); - if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { - free(dinfo, M_DEVBUF); - continue; - } - cdev = device_add_child(dev, NULL, -1); - if (cdev == NULL) { - device_printf(dev, "<%s>: device_add_child failed\n", - dinfo->obd_name); - ofw_bus_gen_destroy_devinfo(dinfo); - free(dinfo, M_DEVBUF); - continue; - } - device_set_ivars(cdev, dinfo); - } - - return (bus_generic_attach(dev)); -} - -static const struct ofw_bus_devinfo * -opalsens_get_devinfo(device_t dev, device_t child) -{ - return (device_get_ivars(child)); -} - -static device_method_t opalsens_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, opalsens_probe), - DEVMETHOD(device_attach, opalsens_attach), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_devinfo, opalsens_get_devinfo), - DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), - DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), - DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), - DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), - DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), - - DEVMETHOD_END -}; - -static driver_t opalsens_driver = { - "opalsens", - opalsens_methods, - 0 -}; - -static devclass_t opalsens_devclass; - -DRIVER_MODULE(opalsens, opal, opalsens_driver, opalsens_devclass, NULL, NULL); diff --git a/sys/powerpc/powernv/opalcall.S b/sys/powerpc/powernv/opalcall.S deleted file mode 100644 index 131c0394604..00000000000 --- a/sys/powerpc/powernv/opalcall.S +++ /dev/null @@ -1,130 +0,0 @@ -/*- - * Copyright (C) 2015 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include - -#include "opt_platform.h" - -GLOBAL(opal_entrypoint) - .llong 0 -GLOBAL(opal_data) - .llong 0 -GLOBAL(opal_msr) - .llong 0 - -TOC_ENTRY(opal_entrypoint) -TOC_ENTRY(opal_data) -TOC_ENTRY(opal_msr) - -ASENTRY(opal_call) - /* Args: - * r3: opal token - * r4-r10 opal arguments - */ - - /* Save call stuff on stack */ - mflr %r0 - std %r0,16(%r1) - std %r2,-16(%r1) - mfcr %r0 - std %r0,8(%r1) - - /* Load OPAL entry information */ - mr %r0,%r3 - addis %r3,%r2,TOC_REF(opal_entrypoint)@ha - ld %r3,TOC_REF(opal_entrypoint)@l(%r3) - ld %r3,0(%r3) - mtctr %r3 - - /* Save MSR in non-volatile scratch register and turn off translation */ - std %r31,-8(%r1) - mfmsr %r31 - - /* Load last bits from the TOC */ - addis %r3,%r2,TOC_REF(opal_msr)@ha - ld %r3,TOC_REF(opal_msr)@l(%r3) - ld %r3,0(%r3) - addis %r2,%r2,TOC_REF(opal_data)@ha - ld %r2,TOC_REF(opal_data)@l(%r2) - ld %r2,0(%r2) - - -#if defined(__LITTLE_ENDIAN__) && defined(QEMU) - /* QEMU hack: qemu does not emulate mtmsrd correctly! */ - ori %r3,%r3,1 /* Leave PSR_LE set */ -#endif - mtmsrd %r3 - isync -#if defined(__LITTLE_ENDIAN__) && defined(QEMU) - /* Clean up from qemu hack */ - xori %r3,%r3,1 -#endif - -#ifdef __LITTLE_ENDIAN__ - mtsrr1 %r3 -#endif - - /* Shift registers over */ - mr %r3,%r4 - mr %r4,%r5 - mr %r5,%r6 - mr %r6,%r7 - mr %r7,%r8 - mr %r8,%r9 - mr %r9,%r10 - -#ifdef __LITTLE_ENDIAN__ - /* We need to rfid to switch endian. */ - mfctr %r11 - mtsrr0 %r11 - LOAD_LR_NIA -1: - mflr %r11 - addi %r11, %r11, (2f-1b) - mtlr %r11 - /* Call OPAL */ - rfid -2: - RETURN_TO_NATIVE_ENDIAN -#else - /* Call OPAL */ - bctrl -#endif - - /* Restore MSR */ - mtmsrd %r31 - isync - ld %r31,-8(%r1) - - /* Restore call stuff from stack */ - ld %r0,16(%r1) - mtlr %r0 - ld %r2,-16(%r1) - ld %r0,8(%r1) - mtcr %r0 - - /* And return */ - blr -ASEND(opal_call) diff --git a/sys/powerpc/powernv/platform_powernv.c b/sys/powerpc/powernv/platform_powernv.c deleted file mode 100644 index e9babc128af..00000000000 --- a/sys/powerpc/powernv/platform_powernv.c +++ /dev/null @@ -1,625 +0,0 @@ -/*- - * Copyright (c) 2015 Nathan Whitehorn - * Copyright (c) 2017-2018 Semihalf - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "platform_if.h" -#include "opal.h" - -#ifdef SMP -extern void *ap_pcpu; -#endif - -void (*powernv_smp_ap_extra_init)(void); - -static int powernv_probe(platform_t); -static int powernv_attach(platform_t); -void powernv_mem_regions(platform_t, struct mem_region *phys, int *physsz, - struct mem_region *avail, int *availsz); -static void powernv_numa_mem_regions(platform_t plat, struct numa_mem_region *phys, int *physsz); -static u_long powernv_timebase_freq(platform_t, struct cpuref *cpuref); -static int powernv_smp_first_cpu(platform_t, struct cpuref *cpuref); -static int powernv_smp_next_cpu(platform_t, struct cpuref *cpuref); -static int powernv_smp_get_bsp(platform_t, struct cpuref *cpuref); -static void powernv_smp_ap_init(platform_t); -#ifdef SMP -static int powernv_smp_start_cpu(platform_t, struct pcpu *cpu); -static void powernv_smp_probe_threads(platform_t); -static struct cpu_group *powernv_smp_topo(platform_t plat); -#endif -static void powernv_reset(platform_t); -static void powernv_cpu_idle(sbintime_t sbt); -static int powernv_cpuref_init(void); -static int powernv_node_numa_domain(platform_t platform, phandle_t node); - -static platform_method_t powernv_methods[] = { - PLATFORMMETHOD(platform_probe, powernv_probe), - PLATFORMMETHOD(platform_attach, powernv_attach), - PLATFORMMETHOD(platform_mem_regions, powernv_mem_regions), - PLATFORMMETHOD(platform_numa_mem_regions, powernv_numa_mem_regions), - PLATFORMMETHOD(platform_timebase_freq, powernv_timebase_freq), - - PLATFORMMETHOD(platform_smp_ap_init, powernv_smp_ap_init), - PLATFORMMETHOD(platform_smp_first_cpu, powernv_smp_first_cpu), - PLATFORMMETHOD(platform_smp_next_cpu, powernv_smp_next_cpu), - PLATFORMMETHOD(platform_smp_get_bsp, powernv_smp_get_bsp), -#ifdef SMP - PLATFORMMETHOD(platform_smp_start_cpu, powernv_smp_start_cpu), - PLATFORMMETHOD(platform_smp_probe_threads, powernv_smp_probe_threads), - PLATFORMMETHOD(platform_smp_topo, powernv_smp_topo), -#endif - PLATFORMMETHOD(platform_node_numa_domain, powernv_node_numa_domain), - - PLATFORMMETHOD(platform_reset, powernv_reset), - { 0, 0 } -}; - -static platform_def_t powernv_platform = { - "powernv", - powernv_methods, - 0 -}; - -static struct cpuref platform_cpuref[MAXCPU]; -static int platform_cpuref_cnt; -static int platform_cpuref_valid; -static int platform_associativity; - -PLATFORM_DEF(powernv_platform); - -static uint64_t powernv_boot_pir; - -static int -powernv_probe(platform_t plat) -{ - if (opal_check() == 0) - return (BUS_PROBE_SPECIFIC); - - return (ENXIO); -} - -static int -powernv_attach(platform_t plat) -{ - uint32_t nptlp, shift = 0, slb_encoding = 0; - int32_t lp_size, lp_encoding; - char buf[255]; - pcell_t refpoints[3]; - pcell_t prop; - phandle_t cpu; - phandle_t opal; - int res, len, idx; - register_t msr; - bool has_lp; - - /* Ping OPAL again just to make sure */ - opal_check(); - -#if BYTE_ORDER == LITTLE_ENDIAN - opal_call(OPAL_REINIT_CPUS, 2 /* Little endian */); -#else - opal_call(OPAL_REINIT_CPUS, 1 /* Big endian */); -#endif - opal = OF_finddevice("/ibm,opal"); - - platform_associativity = 4; /* Skiboot default. */ - if (OF_getencprop(opal, "ibm,associativity-reference-points", refpoints, - sizeof(refpoints)) > 0) { - platform_associativity = refpoints[0]; - } - - if (cpu_idle_hook == NULL) - cpu_idle_hook = powernv_cpu_idle; - - powernv_boot_pir = mfspr(SPR_PIR); - - /* LPID must not be altered when PSL_DR or PSL_IR is set */ - msr = mfmsr(); - mtmsr(msr & ~(PSL_DR | PSL_IR)); - - /* Direct interrupts to SRR instead of HSRR and reset LPCR otherwise */ - mtspr(SPR_LPID, 0); - isync(); - - if (cpu_features2 & PPC_FEATURE2_ARCH_3_00) - lpcr |= LPCR_HVICE; - -#if BYTE_ORDER == LITTLE_ENDIAN - lpcr |= LPCR_ILE; -#endif - - mtspr(SPR_LPCR, lpcr); - isync(); - - mtmsr(msr); - - powernv_cpuref_init(); - - /* Set SLB count from device tree */ - cpu = OF_peer(0); - cpu = OF_child(cpu); - while (cpu != 0) { - res = OF_getprop(cpu, "name", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "cpus") == 0) - break; - cpu = OF_peer(cpu); - } - if (cpu == 0) - goto out; - - cpu = OF_child(cpu); - while (cpu != 0) { - res = OF_getprop(cpu, "device_type", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "cpu") == 0) - break; - cpu = OF_peer(cpu); - } - if (cpu == 0) - goto out; - - res = OF_getencprop(cpu, "ibm,slb-size", &prop, sizeof(prop)); - if (res > 0) - n_slbs = prop; - - /* - * Scan the large page size property for PAPR compatible machines. - * See PAPR D.5 Changes to Section 5.1.4, 'CPU Node Properties' - * for the encoding of the property. - */ - - len = OF_getproplen(cpu, "ibm,segment-page-sizes"); - if (len > 0) { - /* - * We have to use a variable length array on the stack - * since we have very limited stack space. - */ - pcell_t arr[len/sizeof(cell_t)]; - res = OF_getencprop(cpu, "ibm,segment-page-sizes", arr, - sizeof(arr)); - len /= 4; - idx = 0; - has_lp = false; - while (len > 0) { - shift = arr[idx]; - slb_encoding = arr[idx + 1]; - nptlp = arr[idx + 2]; - idx += 3; - len -= 3; - while (len > 0 && nptlp) { - lp_size = arr[idx]; - lp_encoding = arr[idx+1]; - if (slb_encoding == SLBV_L && lp_encoding == 0) - has_lp = true; - - if (slb_encoding == SLB_PGSZ_4K_4K && - lp_encoding == LP_4K_16M) - moea64_has_lp_4k_16m = true; - - idx += 2; - len -= 2; - nptlp--; - } - if (has_lp && moea64_has_lp_4k_16m) - break; - } - - if (!has_lp) - panic("Standard large pages (SLB[L] = 1, PTE[LP] = 0) " - "not supported by this system."); - - moea64_large_page_shift = shift; - moea64_large_page_size = 1ULL << lp_size; - } - -out: - return (0); -} - -void -powernv_mem_regions(platform_t plat, struct mem_region *phys, int *physsz, - struct mem_region *avail, int *availsz) -{ - - ofw_mem_regions(phys, physsz, avail, availsz); -} - -static void -powernv_numa_mem_regions(platform_t plat, struct numa_mem_region *phys, int *physsz) -{ - - ofw_numa_mem_regions(phys, physsz); -} - -static u_long -powernv_timebase_freq(platform_t plat, struct cpuref *cpuref) -{ - char buf[8]; - phandle_t cpu, dev, root; - int res; - int32_t ticks = -1; - - root = OF_peer(0); - dev = OF_child(root); - while (dev != 0) { - res = OF_getprop(dev, "name", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "cpus") == 0) - break; - dev = OF_peer(dev); - } - - for (cpu = OF_child(dev); cpu != 0; cpu = OF_peer(cpu)) { - res = OF_getprop(cpu, "device_type", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "cpu") == 0) - break; - } - if (cpu == 0) - return (512000000); - - OF_getencprop(cpu, "timebase-frequency", &ticks, sizeof(ticks)); - - if (ticks <= 0) - panic("Unable to determine timebase frequency!"); - - return (ticks); - -} - -static int -powernv_cpuref_init(void) -{ - phandle_t cpu, dev; - char buf[32]; - int a, res, tmp_cpuref_cnt; - static struct cpuref tmp_cpuref[MAXCPU]; - cell_t interrupt_servers[32]; - uint64_t bsp; - - if (platform_cpuref_valid) - return (0); - - dev = OF_peer(0); - dev = OF_child(dev); - while (dev != 0) { - res = OF_getprop(dev, "name", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "cpus") == 0) - break; - dev = OF_peer(dev); - } - - bsp = 0; - tmp_cpuref_cnt = 0; - for (cpu = OF_child(dev); cpu != 0; cpu = OF_peer(cpu)) { - res = OF_getprop(cpu, "device_type", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "cpu") == 0) { - if (!ofw_bus_node_status_okay(cpu)) - continue; - res = OF_getproplen(cpu, "ibm,ppc-interrupt-server#s"); - if (res > 0) { - OF_getencprop(cpu, "ibm,ppc-interrupt-server#s", - interrupt_servers, res); - - for (a = 0; a < res/sizeof(cell_t); a++) { - tmp_cpuref[tmp_cpuref_cnt].cr_hwref = interrupt_servers[a]; - tmp_cpuref[tmp_cpuref_cnt].cr_cpuid = tmp_cpuref_cnt; - tmp_cpuref[tmp_cpuref_cnt].cr_domain = - powernv_node_numa_domain(NULL, cpu); - if (interrupt_servers[a] == (uint32_t)powernv_boot_pir) - bsp = tmp_cpuref_cnt; - - tmp_cpuref_cnt++; - } - } - } - } - - /* Map IDs, so BSP has CPUID 0 regardless of hwref */ - for (a = bsp; a < tmp_cpuref_cnt; a++) { - platform_cpuref[platform_cpuref_cnt].cr_hwref = tmp_cpuref[a].cr_hwref; - platform_cpuref[platform_cpuref_cnt].cr_cpuid = platform_cpuref_cnt; - platform_cpuref[platform_cpuref_cnt].cr_domain = tmp_cpuref[a].cr_domain; - platform_cpuref_cnt++; - } - for (a = 0; a < bsp; a++) { - platform_cpuref[platform_cpuref_cnt].cr_hwref = tmp_cpuref[a].cr_hwref; - platform_cpuref[platform_cpuref_cnt].cr_cpuid = platform_cpuref_cnt; - platform_cpuref[platform_cpuref_cnt].cr_domain = tmp_cpuref[a].cr_domain; - platform_cpuref_cnt++; - } - - platform_cpuref_valid = 1; - - return (0); -} - -static int -powernv_smp_first_cpu(platform_t plat, struct cpuref *cpuref) -{ - if (platform_cpuref_valid == 0) - return (EINVAL); - - cpuref->cr_cpuid = 0; - cpuref->cr_hwref = platform_cpuref[0].cr_hwref; - cpuref->cr_domain = platform_cpuref[0].cr_domain; - - return (0); -} - -static int -powernv_smp_next_cpu(platform_t plat, struct cpuref *cpuref) -{ - int id; - - if (platform_cpuref_valid == 0) - return (EINVAL); - - id = cpuref->cr_cpuid + 1; - if (id >= platform_cpuref_cnt) - return (ENOENT); - - cpuref->cr_cpuid = platform_cpuref[id].cr_cpuid; - cpuref->cr_hwref = platform_cpuref[id].cr_hwref; - cpuref->cr_domain = platform_cpuref[id].cr_domain; - - return (0); -} - -static int -powernv_smp_get_bsp(platform_t plat, struct cpuref *cpuref) -{ - - cpuref->cr_cpuid = platform_cpuref[0].cr_cpuid; - cpuref->cr_hwref = platform_cpuref[0].cr_hwref; - cpuref->cr_domain = platform_cpuref[0].cr_domain; - return (0); -} - -#ifdef SMP -static int -powernv_smp_start_cpu(platform_t plat, struct pcpu *pc) -{ - int result; - - ap_pcpu = pc; - powerpc_sync(); - - result = opal_call(OPAL_START_CPU, pc->pc_hwref, EXC_RST); - if (result != OPAL_SUCCESS) { - printf("OPAL error (%d): unable to start AP %d\n", - result, (int)pc->pc_hwref); - return (ENXIO); - } - - return (0); -} - -static void -powernv_smp_probe_threads(platform_t plat) -{ - char buf[8]; - phandle_t cpu, dev, root; - int res, nthreads; - - root = OF_peer(0); - - dev = OF_child(root); - while (dev != 0) { - res = OF_getprop(dev, "name", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "cpus") == 0) - break; - dev = OF_peer(dev); - } - - nthreads = 1; - for (cpu = OF_child(dev); cpu != 0; cpu = OF_peer(cpu)) { - res = OF_getprop(cpu, "device_type", buf, sizeof(buf)); - if (res <= 0 || strcmp(buf, "cpu") != 0) - continue; - - res = OF_getproplen(cpu, "ibm,ppc-interrupt-server#s"); - - if (res >= 0) - nthreads = res / sizeof(cell_t); - else - nthreads = 1; - break; - } - - smp_threads_per_core = nthreads; - if (mp_ncpus % nthreads == 0) - mp_ncores = mp_ncpus / nthreads; -} - -static struct cpu_group * -cpu_group_init(struct cpu_group *group, struct cpu_group *parent, - const cpuset_t *cpus, int children, int level, int flags) -{ - struct cpu_group *child; - - child = children != 0 ? smp_topo_alloc(children) : NULL; - - group->cg_parent = parent; - group->cg_child = child; - CPU_COPY(cpus, &group->cg_mask); - group->cg_count = CPU_COUNT(cpus); - group->cg_children = children; - group->cg_level = level; - group->cg_flags = flags; - - return (child); -} - -static struct cpu_group * -powernv_smp_topo(platform_t plat) -{ - struct cpu_group *core, *dom, *root; - cpuset_t corecpus, domcpus; - int cpuid, i, j, k, ncores; - - if (mp_ncpus % smp_threads_per_core != 0) { - printf("%s: irregular SMP topology (%d threads, %d per core)\n", - __func__, mp_ncpus, smp_threads_per_core); - return (smp_topo_none()); - } - - root = smp_topo_alloc(1); - dom = cpu_group_init(root, NULL, &all_cpus, vm_ndomains, CG_SHARE_NONE, - 0); - - /* - * Redundant layers will be collapsed by the caller so we don't need a - * special case for a single domain. - */ - for (i = 0; i < vm_ndomains; i++, dom++) { - CPU_COPY(&cpuset_domain[i], &domcpus); - ncores = CPU_COUNT(&domcpus) / smp_threads_per_core; - KASSERT(CPU_COUNT(&domcpus) % smp_threads_per_core == 0, - ("%s: domain %d core count not divisible by thread count", - __func__, i)); - - core = cpu_group_init(dom, root, &domcpus, ncores, CG_SHARE_L3, - 0); - for (j = 0; j < ncores; j++, core++) { - /* - * Assume that consecutive CPU IDs correspond to sibling - * threads. - */ - CPU_ZERO(&corecpus); - for (k = 0; k < smp_threads_per_core; k++) { - cpuid = CPU_FFS(&domcpus) - 1; - CPU_CLR(cpuid, &domcpus); - CPU_SET(cpuid, &corecpus); - } - (void)cpu_group_init(core, dom, &corecpus, 0, - CG_SHARE_L1, CG_FLAG_SMT); - } - } - - return (root); -} - -#endif - -static void -powernv_reset(platform_t platform) -{ - - opal_call(OPAL_CEC_REBOOT); -} - -static void -powernv_smp_ap_init(platform_t platform) -{ - - if (powernv_smp_ap_extra_init != NULL) - powernv_smp_ap_extra_init(); -} - -static void -powernv_cpu_idle(sbintime_t sbt) -{ -} - -static int -powernv_node_numa_domain(platform_t platform, phandle_t node) -{ - /* XXX: Is locking necessary in here? */ - static int numa_domains[MAXMEMDOM]; - static int numa_max_domain; - cell_t associativity[5]; - int i, res; - -#ifndef NUMA - return (0); -#endif - i = 0; - TUNABLE_INT_FETCH("vm.numa.disabled", &i); - if (i) - return (0); - - res = OF_getencprop(node, "ibm,associativity", - associativity, sizeof(associativity)); - - /* - * If this node doesn't have associativity, or if there are not - * enough elements in it, check its parent. - */ - if (res < (int)(sizeof(cell_t) * (platform_associativity + 1))) { - node = OF_parent(node); - /* If already at the root, use default domain. */ - if (node == 0) - return (0); - return (powernv_node_numa_domain(platform, node)); - } - - for (i = 0; i < numa_max_domain; i++) { - if (numa_domains[i] == associativity[platform_associativity]) - return (i); - } - if (i < MAXMEMDOM) - numa_domains[numa_max_domain++] = - associativity[platform_associativity]; - else - i = 0; - - return (i); -} - -/* Set up the Nest MMU on POWER9 relatively early, but after pmap is setup. */ -static void -powernv_setup_nmmu(void *unused) -{ - if (opal_check() != 0) - return; - opal_call(OPAL_NMMU_SET_PTCR, -1, mfspr(SPR_PTCR)); -} - -SYSINIT(powernv_setup_nmmu, SI_SUB_CPU, SI_ORDER_ANY, powernv_setup_nmmu, NULL); diff --git a/sys/powerpc/powernv/powernv_centaur.c b/sys/powerpc/powernv/powernv_centaur.c deleted file mode 100644 index 6d4d338bee4..00000000000 --- a/sys/powerpc/powernv/powernv_centaur.c +++ /dev/null @@ -1,125 +0,0 @@ -/*- - * Copyright (c) 2017-2018 QCM Technologies. - * Copyright (c) 2017-2018 Semihalf. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef FDT -#include -#include -#endif - -struct powernv_centaur_softc -{ - -}; - -static int powernv_centaur_attach(device_t); -static int powernv_centaur_probe(device_t); -static const struct ofw_bus_devinfo * - powernv_centaur_get_devinfo(device_t, device_t); - -static device_method_t powernv_centaur_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, powernv_centaur_probe), - DEVMETHOD(device_attach, powernv_centaur_attach), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_devinfo, powernv_centaur_get_devinfo), - DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), - DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), - DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), - DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), - DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), - - DEVMETHOD_END -}; - -static devclass_t powernv_centaur_devclass; - -static int -powernv_centaur_probe(device_t dev) -{ - - if (!(ofw_bus_is_compatible(dev, "ibm,centaur"))) - return (ENXIO); - - device_set_desc(dev, "centaur"); - return (0); -} - -static int -powernv_centaur_attach(device_t dev) -{ - phandle_t child; - device_t cdev; - struct ofw_bus_devinfo *dinfo; - - for (child = OF_child(ofw_bus_get_node(dev)); child != 0; - child = OF_peer(child)) { - dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); - if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { - free(dinfo, M_DEVBUF); - continue; - } - cdev = device_add_child(dev, NULL, -1); - if (cdev == NULL) { - device_printf(dev, "<%s>: device_add_child failed\n", - dinfo->obd_name); - ofw_bus_gen_destroy_devinfo(dinfo); - free(dinfo, M_DEVBUF); - continue; - } - device_set_ivars(cdev, dinfo); - } - - return (bus_generic_attach(dev)); -} - -static const struct ofw_bus_devinfo * -powernv_centaur_get_devinfo(device_t dev, device_t child) -{ - return (device_get_ivars(child)); -} - -DEFINE_CLASS_0(powernv_centaur, powernv_centaur_driver, powernv_centaur_methods, - sizeof(struct powernv_centaur_softc)); -DRIVER_MODULE(powernv_centaur, ofwbus, powernv_centaur_driver, powernv_centaur_devclass, NULL, - NULL); diff --git a/sys/powerpc/powernv/powernv_xscom.c b/sys/powerpc/powernv/powernv_xscom.c deleted file mode 100644 index 84446393745..00000000000 --- a/sys/powerpc/powernv/powernv_xscom.c +++ /dev/null @@ -1,125 +0,0 @@ -/*- - * Copyright (c) 2017-2018 QCM Technologies. - * Copyright (c) 2017-2018 Semihalf. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef FDT -#include -#include -#endif - -struct powernv_xscom_softc -{ - -}; - -static int powernv_xscom_attach(device_t); -static int powernv_xscom_probe(device_t); -static const struct ofw_bus_devinfo * - powernv_xscom_get_devinfo(device_t, device_t); - -static device_method_t powernv_xscom_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, powernv_xscom_probe), - DEVMETHOD(device_attach, powernv_xscom_attach), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_devinfo, powernv_xscom_get_devinfo), - DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), - DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), - DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), - DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), - DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), - - DEVMETHOD_END -}; - -static devclass_t powernv_xscom_devclass; - -static int -powernv_xscom_probe(device_t dev) -{ - - if (!(ofw_bus_is_compatible(dev, "ibm,xscom"))) - return (ENXIO); - - device_set_desc(dev, "xscom"); - return (0); -} - -static int -powernv_xscom_attach(device_t dev) -{ - phandle_t child; - device_t cdev; - struct ofw_bus_devinfo *dinfo; - - for (child = OF_child(ofw_bus_get_node(dev)); child != 0; - child = OF_peer(child)) { - dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); - if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { - free(dinfo, M_DEVBUF); - continue; - } - cdev = device_add_child(dev, NULL, -1); - if (cdev == NULL) { - device_printf(dev, "<%s>: device_add_child failed\n", - dinfo->obd_name); - ofw_bus_gen_destroy_devinfo(dinfo); - free(dinfo, M_DEVBUF); - continue; - } - device_set_ivars(cdev, dinfo); - } - - return (bus_generic_attach(dev)); -} - -static const struct ofw_bus_devinfo * -powernv_xscom_get_devinfo(device_t dev, device_t child) -{ - return (device_get_ivars(child)); -} - -DEFINE_CLASS_0(powernv_xscom, powernv_xscom_driver, powernv_xscom_methods, - sizeof(struct powernv_xscom_softc)); -DRIVER_MODULE(powernv_xscom, ofwbus, powernv_xscom_driver, powernv_xscom_devclass, NULL, - NULL); diff --git a/sys/powerpc/powernv/xive.c b/sys/powerpc/powernv/xive.c deleted file mode 100644 index 02df9ebc38a..00000000000 --- a/sys/powerpc/powernv/xive.c +++ /dev/null @@ -1,778 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2019 Justin Hibbits - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include -#include - -#ifdef POWERNV -#include -#endif - -#include "pic_if.h" - -#define XIVE_PRIORITY 7 /* Random non-zero number */ -#define MAX_XIVE_IRQS (1<<24) /* 24-bit XIRR field */ - -/* Registers */ -#define XIVE_TM_QW1_OS 0x010 /* Guest OS registers */ -#define XIVE_TM_QW2_HV_POOL 0x020 /* Hypervisor pool registers */ -#define XIVE_TM_QW3_HV 0x030 /* Hypervisor registers */ - -#define XIVE_TM_NSR 0x00 -#define XIVE_TM_CPPR 0x01 -#define XIVE_TM_IPB 0x02 -#define XIVE_TM_LSMFB 0x03 -#define XIVE_TM_ACK_CNT 0x04 -#define XIVE_TM_INC 0x05 -#define XIVE_TM_AGE 0x06 -#define XIVE_TM_PIPR 0x07 - -#define TM_WORD0 0x0 -#define TM_WORD2 0x8 -#define TM_QW2W2_VP 0x80000000 - -#define XIVE_TM_SPC_ACK 0x800 -#define TM_QW3NSR_HE_SHIFT 14 -#define TM_QW3_NSR_HE_NONE 0 -#define TM_QW3_NSR_HE_POOL 1 -#define TM_QW3_NSR_HE_PHYS 2 -#define TM_QW3_NSR_HE_LSI 3 -#define XIVE_TM_SPC_PULL_POOL_CTX 0x828 - -#define XIVE_IRQ_LOAD_EOI 0x000 -#define XIVE_IRQ_STORE_EOI 0x400 -#define XIVE_IRQ_PQ_00 0xc00 -#define XIVE_IRQ_PQ_01 0xd00 - -#define XIVE_IRQ_VAL_P 0x02 -#define XIVE_IRQ_VAL_Q 0x01 - -struct xive_softc; -struct xive_irq; - -extern void (*powernv_smp_ap_extra_init)(void); - -/* Private support */ -static void xive_setup_cpu(void); -static void xive_smp_cpu_startup(void); -static void xive_init_irq(struct xive_irq *irqd, u_int irq); -static struct xive_irq *xive_configure_irq(u_int irq); -static int xive_provision_page(struct xive_softc *sc); - -/* Interfaces */ -static int xive_probe(device_t); -static int xive_attach(device_t); -static int xics_probe(device_t); -static int xics_attach(device_t); - -static void xive_bind(device_t, u_int, cpuset_t, void **); -static void xive_dispatch(device_t, struct trapframe *); -static void xive_enable(device_t, u_int, u_int, void **); -static void xive_eoi(device_t, u_int, void *); -static void xive_ipi(device_t, u_int); -static void xive_mask(device_t, u_int, void *); -static void xive_unmask(device_t, u_int, void *); -static void xive_translate_code(device_t dev, u_int irq, int code, - enum intr_trigger *trig, enum intr_polarity *pol); - -static device_method_t xive_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, xive_probe), - DEVMETHOD(device_attach, xive_attach), - - /* PIC interface */ - DEVMETHOD(pic_bind, xive_bind), - DEVMETHOD(pic_dispatch, xive_dispatch), - DEVMETHOD(pic_enable, xive_enable), - DEVMETHOD(pic_eoi, xive_eoi), - DEVMETHOD(pic_ipi, xive_ipi), - DEVMETHOD(pic_mask, xive_mask), - DEVMETHOD(pic_unmask, xive_unmask), - DEVMETHOD(pic_translate_code, xive_translate_code), - - DEVMETHOD_END -}; - -static device_method_t xics_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, xics_probe), - DEVMETHOD(device_attach, xics_attach), - - DEVMETHOD_END -}; - -struct xive_softc { - struct mtx sc_mtx; - struct resource *sc_mem; - vm_size_t sc_prov_page_size; - uint32_t sc_offset; -}; - -struct xive_queue { - uint32_t *q_page; - uint32_t *q_eoi_page; - uint32_t q_toggle; - uint32_t q_size; - uint32_t q_index; - uint32_t q_mask; -}; - -struct xive_irq { - uint32_t girq; - uint32_t lirq; - uint64_t vp; - uint64_t flags; -#define OPAL_XIVE_IRQ_EOI_VIA_FW 0x00000020 -#define OPAL_XIVE_IRQ_MASK_VIA_FW 0x00000010 -#define OPAL_XIVE_IRQ_SHIFT_BUG 0x00000008 -#define OPAL_XIVE_IRQ_LSI 0x00000004 -#define OPAL_XIVE_IRQ_STORE_EOI 0x00000002 -#define OPAL_XIVE_IRQ_TRIGGER_PAGE 0x00000001 - uint8_t prio; - vm_offset_t eoi_page; - vm_offset_t trig_page; - vm_size_t esb_size; - int chip; -}; - -struct xive_cpu { - uint64_t vp; - uint64_t flags; - struct xive_irq ipi_data; - struct xive_queue queue; /* We only use a single queue for now. */ - uint64_t cam; - uint32_t chip; -}; - -static driver_t xive_driver = { - "xive", - xive_methods, - sizeof(struct xive_softc) -}; - -static driver_t xics_driver = { - "xivevc", - xics_methods, - 0 -}; - -static devclass_t xive_devclass; -static devclass_t xics_devclass; - -EARLY_DRIVER_MODULE(xive, ofwbus, xive_driver, xive_devclass, 0, 0, - BUS_PASS_INTERRUPT-1); -EARLY_DRIVER_MODULE(xivevc, ofwbus, xics_driver, xics_devclass, 0, 0, - BUS_PASS_INTERRUPT); - -MALLOC_DEFINE(M_XIVE, "xive", "XIVE Memory"); - -DPCPU_DEFINE_STATIC(struct xive_cpu, xive_cpu_data); - -static int xive_ipi_vector = -1; - -/* - * XIVE Exploitation mode driver. - * - * The XIVE, present in the POWER9 CPU, can run in two modes: XICS emulation - * mode, and "Exploitation mode". XICS emulation mode is compatible with the - * POWER8 and earlier XICS interrupt controller, using OPAL calls to emulate - * hypervisor calls and memory accesses. Exploitation mode gives us raw access - * to the XIVE MMIO, improving performance significantly. - * - * The XIVE controller is a very bizarre interrupt controller. It uses queues - * in memory to pass interrupts around, and maps itself into 512GB of physical - * device address space, giving each interrupt in the system one or more pages - * of address space. An IRQ is tied to a virtual processor, which could be a - * physical CPU thread, or a guest CPU thread (LPAR running on a physical - * thread). Thus, the controller can route interrupts directly to guest OSes - * bypassing processing by the hypervisor, thereby improving performance of the - * guest OS. - * - * An IRQ, in addition to being tied to a virtual processor, has one or two - * page mappings: an EOI page, and an optional trigger page. The trigger page - * could be the same as the EOI page. Level-sensitive interrupts (LSIs) don't - * have a trigger page, as they're external interrupts controlled by physical - * lines. MSIs and IPIs have trigger pages. An IPI is really just another IRQ - * in the XIVE, which is triggered by software. - * - * An interesting behavior of the XIVE controller is that oftentimes the - * contents of an address location don't actually matter, but the direction of - * the action is the signifier (read vs write), and the address is significant. - * Hence, masking and unmasking an interrupt is done by reading different - * addresses in the EOI page, and triggering an interrupt consists of writing to - * the trigger page. - * - * Additionally, the MMIO region mapped is CPU-sensitive, just like the - * per-processor register space (private access) in OpenPIC. In order for a CPU - * to receive interrupts it must itself configure its CPPR (Current Processor - * Priority Register), it cannot be set by any other processor. This - * necessitates the xive_smp_cpu_startup() function. - * - * Queues are pages of memory, sized powers-of-two, that are shared with the - * XIVE. The XIVE writes into the queue with an alternating polarity bit, which - * flips when the queue wraps. - */ - -/* - * Offset-based read/write interfaces. - */ -static uint16_t -xive_read_2(struct xive_softc *sc, bus_size_t offset) -{ - - return (bus_read_2(sc->sc_mem, sc->sc_offset + offset)); -} - -static void -xive_write_1(struct xive_softc *sc, bus_size_t offset, uint8_t val) -{ - - bus_write_1(sc->sc_mem, sc->sc_offset + offset, val); -} - -/* EOI and Trigger page access interfaces. */ -static uint64_t -xive_read_mmap8(vm_offset_t addr) -{ - return (*(volatile uint64_t *)addr); -} - -static void -xive_write_mmap8(vm_offset_t addr, uint64_t val) -{ - *(uint64_t *)(addr) = val; -} - -/* Device interfaces. */ -static int -xive_probe(device_t dev) -{ - - if (!ofw_bus_is_compatible(dev, "ibm,opal-xive-pe")) - return (ENXIO); - - device_set_desc(dev, "External Interrupt Virtualization Engine"); - - /* Make sure we always win against the xicp driver. */ - return (BUS_PROBE_DEFAULT); -} - -static int -xics_probe(device_t dev) -{ - - if (!ofw_bus_is_compatible(dev, "ibm,opal-xive-vc")) - return (ENXIO); - - device_set_desc(dev, "External Interrupt Virtualization Engine Root"); - return (BUS_PROBE_DEFAULT); -} - -static int -xive_attach(device_t dev) -{ - struct xive_softc *sc = device_get_softc(dev); - struct xive_cpu *xive_cpud; - phandle_t phandle = ofw_bus_get_node(dev); - int64_t vp_block; - int error; - int rid; - int i, order; - uint64_t vp_id; - int64_t ipi_irq; - - opal_call(OPAL_XIVE_RESET, OPAL_XIVE_XICS_MODE_EXP); - - error = OF_getencprop(phandle, "ibm,xive-provision-page-size", - (pcell_t *)&sc->sc_prov_page_size, sizeof(sc->sc_prov_page_size)); - - rid = 1; /* Get the Hypervisor-level register set. */ - sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &rid, RF_ACTIVE); - sc->sc_offset = XIVE_TM_QW3_HV; - - mtx_init(&sc->sc_mtx, "XIVE", NULL, MTX_DEF); - - /* Workaround for qemu single-thread powernv */ - if (mp_maxid == 0) - order = 1; - else - order = fls(mp_maxid + (mp_maxid - 1)) - 1; - - do { - vp_block = opal_call(OPAL_XIVE_ALLOCATE_VP_BLOCK, order); - if (vp_block == OPAL_BUSY) - DELAY(10); - else if (vp_block == OPAL_XIVE_PROVISIONING) - xive_provision_page(sc); - else - break; - } while (1); - - if (vp_block < 0) { - device_printf(dev, - "Unable to allocate VP block. Opal error %d\n", - (int)vp_block); - bus_release_resource(dev, SYS_RES_MEMORY, rid, sc->sc_mem); - return (ENXIO); - } - - /* - * Set up the VPs. Try to do as much as we can in attach, to lessen - * what's needed at AP spawn time. - */ - CPU_FOREACH(i) { - vp_id = pcpu_find(i)->pc_hwref; - - xive_cpud = DPCPU_ID_PTR(i, xive_cpu_data); - xive_cpud->vp = vp_id + vp_block; - opal_call(OPAL_XIVE_GET_VP_INFO, xive_cpud->vp, NULL, - vtophys(&xive_cpud->cam), NULL, vtophys(&xive_cpud->chip)); - - xive_cpud->cam = be64toh(xive_cpud->cam); - xive_cpud->chip = be64toh(xive_cpud->chip); - - /* Allocate the queue page and populate the queue state data. */ - xive_cpud->queue.q_page = contigmalloc(PAGE_SIZE, M_XIVE, - M_ZERO | M_WAITOK, 0, BUS_SPACE_MAXADDR, PAGE_SIZE, 0); - xive_cpud->queue.q_size = 1 << PAGE_SHIFT; - xive_cpud->queue.q_mask = - ((xive_cpud->queue.q_size / sizeof(int)) - 1); - xive_cpud->queue.q_toggle = 0; - xive_cpud->queue.q_index = 0; - do { - error = opal_call(OPAL_XIVE_SET_VP_INFO, xive_cpud->vp, - OPAL_XIVE_VP_ENABLED, 0); - } while (error == OPAL_BUSY); - error = opal_call(OPAL_XIVE_SET_QUEUE_INFO, vp_id, - XIVE_PRIORITY, vtophys(xive_cpud->queue.q_page), PAGE_SHIFT, - OPAL_XIVE_EQ_ALWAYS_NOTIFY | OPAL_XIVE_EQ_ENABLED); - - do { - ipi_irq = opal_call(OPAL_XIVE_ALLOCATE_IRQ, - xive_cpud->chip); - } while (ipi_irq == OPAL_BUSY); - - if (ipi_irq < 0) - device_printf(root_pic, - "Failed allocating IPI. OPAL error %d\n", - (int)ipi_irq); - else { - xive_init_irq(&xive_cpud->ipi_data, ipi_irq); - xive_cpud->ipi_data.vp = vp_id; - xive_cpud->ipi_data.lirq = MAX_XIVE_IRQS; - opal_call(OPAL_XIVE_SET_IRQ_CONFIG, ipi_irq, - xive_cpud->ipi_data.vp, XIVE_PRIORITY, - MAX_XIVE_IRQS); - } - } - - powerpc_register_pic(dev, OF_xref_from_node(phandle), MAX_XIVE_IRQS, - 1 /* Number of IPIs */, FALSE); - root_pic = dev; - - xive_setup_cpu(); - powernv_smp_ap_extra_init = xive_smp_cpu_startup; - - return (0); -} - -static int -xics_attach(device_t dev) -{ - phandle_t phandle = ofw_bus_get_node(dev); - - /* The XIVE (root PIC) will handle all our interrupts */ - powerpc_register_pic(root_pic, OF_xref_from_node(phandle), - MAX_XIVE_IRQS, 1 /* Number of IPIs */, FALSE); - - return (0); -} - -/* - * PIC I/F methods. - */ - -static void -xive_bind(device_t dev, u_int irq, cpuset_t cpumask, void **priv) -{ - struct xive_irq *irqd; - int cpu; - int ncpus, i, error; - - if (*priv == NULL) - *priv = xive_configure_irq(irq); - - irqd = *priv; - - /* - * This doesn't appear to actually support affinity groups, so pick a - * random CPU. - */ - ncpus = 0; - CPU_FOREACH(cpu) - if (CPU_ISSET(cpu, &cpumask)) ncpus++; - - i = mftb() % ncpus; - ncpus = 0; - CPU_FOREACH(cpu) { - if (!CPU_ISSET(cpu, &cpumask)) - continue; - if (ncpus == i) - break; - ncpus++; - } - - opal_call(OPAL_XIVE_SYNC, OPAL_XIVE_SYNC_QUEUE, irq); - - irqd->vp = pcpu_find(cpu)->pc_hwref; - error = opal_call(OPAL_XIVE_SET_IRQ_CONFIG, irq, irqd->vp, - XIVE_PRIORITY, irqd->lirq); - - if (error < 0) - panic("Cannot bind interrupt %d to CPU %d", irq, cpu); - - xive_eoi(dev, irq, irqd); -} - -/* Read the next entry in the queue page and update the index. */ -static int -xive_read_eq(struct xive_queue *q) -{ - uint32_t i = be32toh(q->q_page[q->q_index]); - - /* Check validity, using current queue polarity. */ - if ((i >> 31) == q->q_toggle) - return (0); - - q->q_index = (q->q_index + 1) & q->q_mask; - - if (q->q_index == 0) - q->q_toggle ^= 1; - - return (i & 0x7fffffff); -} - -static void -xive_dispatch(device_t dev, struct trapframe *tf) -{ - struct xive_softc *sc; - struct xive_cpu *xive_cpud; - uint32_t vector; - uint16_t ack; - uint8_t cppr, he; - - sc = device_get_softc(dev); - - xive_cpud = DPCPU_PTR(xive_cpu_data); - for (;;) { - ack = xive_read_2(sc, XIVE_TM_SPC_ACK); - cppr = (ack & 0xff); - - he = ack >> TM_QW3NSR_HE_SHIFT; - - if (he == TM_QW3_NSR_HE_NONE) - break; - - else if (__predict_false(he != TM_QW3_NSR_HE_PHYS)) { - /* - * We don't support TM_QW3_NSR_HE_POOL or - * TM_QW3_NSR_HE_LSI interrupts. - */ - device_printf(dev, - "Unexpected interrupt he type: %d\n", he); - goto end; - } - - xive_write_1(sc, XIVE_TM_CPPR, cppr); - - for (;;) { - vector = xive_read_eq(&xive_cpud->queue); - - if (vector == 0) - break; - - if (vector == MAX_XIVE_IRQS) - vector = xive_ipi_vector; - - powerpc_dispatch_intr(vector, tf); - } - } -end: - xive_write_1(sc, XIVE_TM_CPPR, 0xff); -} - -static void -xive_enable(device_t dev, u_int irq, u_int vector, void **priv) -{ - struct xive_irq *irqd; - cell_t status, cpu; - - if (irq == MAX_XIVE_IRQS) { - if (xive_ipi_vector == -1) - xive_ipi_vector = vector; - return; - } - if (*priv == NULL) - *priv = xive_configure_irq(irq); - - irqd = *priv; - - /* Bind to this CPU to start */ - cpu = PCPU_GET(hwref); - irqd->lirq = vector; - - for (;;) { - status = opal_call(OPAL_XIVE_SET_IRQ_CONFIG, irq, cpu, - XIVE_PRIORITY, vector); - if (status != OPAL_BUSY) - break; - DELAY(10); - } - - if (status != 0) - panic("OPAL_SET_XIVE IRQ %d -> cpu %d failed: %d", irq, - cpu, status); - - xive_unmask(dev, irq, *priv); -} - -static void -xive_eoi(device_t dev, u_int irq, void *priv) -{ - struct xive_irq *rirq; - struct xive_cpu *cpud; - uint8_t eoi_val; - - if (irq == MAX_XIVE_IRQS) { - cpud = DPCPU_PTR(xive_cpu_data); - rirq = &cpud->ipi_data; - } else - rirq = priv; - - if (rirq->flags & OPAL_XIVE_IRQ_EOI_VIA_FW) - opal_call(OPAL_INT_EOI, irq); - else if (rirq->flags & OPAL_XIVE_IRQ_STORE_EOI) - xive_write_mmap8(rirq->eoi_page + XIVE_IRQ_STORE_EOI, 0); - else if (rirq->flags & OPAL_XIVE_IRQ_LSI) - xive_read_mmap8(rirq->eoi_page + XIVE_IRQ_LOAD_EOI); - else { - eoi_val = xive_read_mmap8(rirq->eoi_page + XIVE_IRQ_PQ_00); - if ((eoi_val & XIVE_IRQ_VAL_Q) && rirq->trig_page != 0) - xive_write_mmap8(rirq->trig_page, 0); - } -} - -static void -xive_ipi(device_t dev, u_int cpu) -{ - struct xive_cpu *xive_cpud; - - xive_cpud = DPCPU_ID_PTR(cpu, xive_cpu_data); - - if (xive_cpud->ipi_data.trig_page == 0) - return; - xive_write_mmap8(xive_cpud->ipi_data.trig_page, 0); -} - -static void -xive_mask(device_t dev, u_int irq, void *priv) -{ - struct xive_irq *rirq; - - /* Never mask IPIs */ - if (irq == MAX_XIVE_IRQS) - return; - - rirq = priv; - - if (!(rirq->flags & OPAL_XIVE_IRQ_LSI)) - return; - xive_read_mmap8(rirq->eoi_page + XIVE_IRQ_PQ_01); -} - -static void -xive_unmask(device_t dev, u_int irq, void *priv) -{ - struct xive_irq *rirq; - - rirq = priv; - - xive_read_mmap8(rirq->eoi_page + XIVE_IRQ_PQ_00); -} - -static void -xive_translate_code(device_t dev, u_int irq, int code, - enum intr_trigger *trig, enum intr_polarity *pol) -{ - switch (code) { - case 0: - /* L to H edge */ - *trig = INTR_TRIGGER_EDGE; - *pol = INTR_POLARITY_HIGH; - break; - case 1: - /* Active L level */ - *trig = INTR_TRIGGER_LEVEL; - *pol = INTR_POLARITY_LOW; - break; - default: - *trig = INTR_TRIGGER_CONFORM; - *pol = INTR_POLARITY_CONFORM; - } -} - -/* Private functions. */ -/* - * Setup the current CPU. Called by the BSP at driver attachment, and by each - * AP at wakeup (via xive_smp_cpu_startup()). - */ -static void -xive_setup_cpu(void) -{ - struct xive_softc *sc; - struct xive_cpu *cpup; - uint32_t val; - - cpup = DPCPU_PTR(xive_cpu_data); - - sc = device_get_softc(root_pic); - - val = bus_read_4(sc->sc_mem, XIVE_TM_QW2_HV_POOL + TM_WORD2); - if (val & TM_QW2W2_VP) - bus_read_8(sc->sc_mem, XIVE_TM_SPC_PULL_POOL_CTX); - - bus_write_4(sc->sc_mem, XIVE_TM_QW2_HV_POOL + TM_WORD0, 0xff); - bus_write_4(sc->sc_mem, XIVE_TM_QW2_HV_POOL + TM_WORD2, - TM_QW2W2_VP | cpup->cam); - - xive_unmask(root_pic, cpup->ipi_data.girq, &cpup->ipi_data); - xive_write_1(sc, XIVE_TM_CPPR, 0xff); -} - -/* Populate an IRQ structure, mapping the EOI and trigger pages. */ -static void -xive_init_irq(struct xive_irq *irqd, u_int irq) -{ - uint64_t eoi_phys, trig_phys; - uint32_t esb_shift; - - opal_call(OPAL_XIVE_GET_IRQ_INFO, irq, - vtophys(&irqd->flags), vtophys(&eoi_phys), - vtophys(&trig_phys), vtophys(&esb_shift), - vtophys(&irqd->chip)); - - irqd->flags = be64toh(irqd->flags); - eoi_phys = be64toh(eoi_phys); - trig_phys = be64toh(trig_phys); - esb_shift = be32toh(esb_shift); - irqd->chip = be32toh(irqd->chip); - - irqd->girq = irq; - irqd->esb_size = 1 << esb_shift; - irqd->eoi_page = (vm_offset_t)pmap_mapdev(eoi_phys, irqd->esb_size); - - if (eoi_phys == trig_phys) - irqd->trig_page = irqd->eoi_page; - else if (trig_phys != 0) - irqd->trig_page = (vm_offset_t)pmap_mapdev(trig_phys, - irqd->esb_size); - else - irqd->trig_page = 0; - - opal_call(OPAL_XIVE_GET_IRQ_CONFIG, irq, vtophys(&irqd->vp), - vtophys(&irqd->prio), vtophys(&irqd->lirq)); - - irqd->vp = be64toh(irqd->vp); - irqd->prio = be64toh(irqd->prio); - irqd->lirq = be32toh(irqd->lirq); -} - -/* Allocate an IRQ struct before populating it. */ -static struct xive_irq * -xive_configure_irq(u_int irq) -{ - struct xive_irq *irqd; - - irqd = malloc(sizeof(struct xive_irq), M_XIVE, M_WAITOK); - - xive_init_irq(irqd, irq); - - return (irqd); -} - -/* - * Part of the OPAL API. OPAL_XIVE_ALLOCATE_VP_BLOCK might require more pages, - * provisioned through this call. - */ -static int -xive_provision_page(struct xive_softc *sc) -{ - void *prov_page; - int error; - - do { - prov_page = contigmalloc(sc->sc_prov_page_size, M_XIVE, 0, - 0, BUS_SPACE_MAXADDR, - sc->sc_prov_page_size, sc->sc_prov_page_size); - - error = opal_call(OPAL_XIVE_DONATE_PAGE, -1, - vtophys(prov_page)); - } while (error == OPAL_XIVE_PROVISIONING); - - return (0); -} - -/* The XIVE_TM_CPPR register must be set by each thread */ -static void -xive_smp_cpu_startup(void) -{ - - xive_setup_cpu(); -} diff --git a/sys/powerpc/powerpc/altivec.c b/sys/powerpc/powerpc/altivec.c deleted file mode 100644 index 16e4477703d..00000000000 --- a/sys/powerpc/powerpc/altivec.c +++ /dev/null @@ -1,172 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1996 Wolfgang Solfrank. - * Copyright (C) 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: fpu.c,v 1.5 2001/07/22 11:29:46 wiz Exp $ - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -static void -save_vec_int(struct thread *td) -{ - int msr; - struct pcb *pcb; - - pcb = td->td_pcb; - - /* - * Temporarily re-enable the vector unit during the save - */ - msr = mfmsr(); - mtmsr(msr | PSL_VEC); - - /* - * Save the vector registers and VSCR to the PCB - */ -#define STVX(n) __asm ("stvx %1,0,%0" \ - :: "b"(pcb->pcb_vec.vr[n]), "n"(n)); - STVX(0); STVX(1); STVX(2); STVX(3); - STVX(4); STVX(5); STVX(6); STVX(7); - STVX(8); STVX(9); STVX(10); STVX(11); - STVX(12); STVX(13); STVX(14); STVX(15); - STVX(16); STVX(17); STVX(18); STVX(19); - STVX(20); STVX(21); STVX(22); STVX(23); - STVX(24); STVX(25); STVX(26); STVX(27); - STVX(28); STVX(29); STVX(30); STVX(31); -#undef STVX - - __asm __volatile("mfvscr 0; stvewx 0,0,%0" :: "b"(&pcb->pcb_vec.vscr)); - - /* - * Disable vector unit again - */ - isync(); - mtmsr(msr); - -} - -void -enable_vec(struct thread *td) -{ - int msr; - struct pcb *pcb; - struct trapframe *tf; - - pcb = td->td_pcb; - tf = trapframe(td); - - /* - * Save the thread's Altivec CPU number, and set the CPU's current - * vector thread - */ - td->td_pcb->pcb_veccpu = PCPU_GET(cpuid); - PCPU_SET(vecthread, td); - - /* - * Enable the vector unit for when the thread returns from the - * exception. If this is the first time the unit has been used by - * the thread, initialise the vector registers and VSCR to 0, and - * set the flag to indicate that the vector unit is in use. - */ - tf->srr1 |= PSL_VEC; - if (!(pcb->pcb_flags & PCB_VEC)) { - memset(&pcb->pcb_vec, 0, sizeof pcb->pcb_vec); - pcb->pcb_flags |= PCB_VEC; - } - - /* - * Temporarily enable the vector unit so the registers - * can be restored. - */ - msr = mfmsr(); - mtmsr(msr | PSL_VEC); - - /* - * Restore VSCR by first loading it into a vector and then into VSCR. - * (this needs to done before loading the user's vector registers - * since we need to use a scratch vector register) - */ - __asm __volatile("vxor 0,0,0; lvewx 0,0,%0; mtvscr 0" \ - :: "b"(&pcb->pcb_vec.vscr)); - -#define LVX(n) __asm ("lvx " #n ",0,%0" \ - :: "b"(&pcb->pcb_vec.vr[n])); - LVX(0); LVX(1); LVX(2); LVX(3); - LVX(4); LVX(5); LVX(6); LVX(7); - LVX(8); LVX(9); LVX(10); LVX(11); - LVX(12); LVX(13); LVX(14); LVX(15); - LVX(16); LVX(17); LVX(18); LVX(19); - LVX(20); LVX(21); LVX(22); LVX(23); - LVX(24); LVX(25); LVX(26); LVX(27); - LVX(28); LVX(29); LVX(30); LVX(31); -#undef LVX - - isync(); - mtmsr(msr); -} - -void -save_vec(struct thread *td) -{ - struct pcb *pcb; - - pcb = td->td_pcb; - - save_vec_int(td); - - /* - * Clear the current vec thread and pcb's CPU id - * XXX should this be left clear to allow lazy save/restore ? - */ - pcb->pcb_veccpu = INT_MAX; - PCPU_SET(vecthread, NULL); -} - -/* - * Save altivec state without dropping ownership. This will only save state if - * the current vector-thread is `td'. - */ -void -save_vec_nodrop(struct thread *td) -{ - - if (td == PCPU_GET(vecthread)) - save_vec_int(td); -} diff --git a/sys/powerpc/powerpc/autoconf.c b/sys/powerpc/powerpc/autoconf.c deleted file mode 100644 index e76225e0665..00000000000 --- a/sys/powerpc/powerpc/autoconf.c +++ /dev/null @@ -1,94 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1998 Doug Rabson - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include "opt_isa.h" - -#include -#include -#include -#include -#include -#include - -#include - -#ifdef DEV_ISA -extern void isa_probe_children(device_t dev); - -device_t isa_bus_device; -#endif - -static device_t nexusdev; - -static void configure_first(void *); -static void configure(void *); -static void configure_final(void *); - -SYSINIT(configure1, SI_SUB_CONFIGURE, SI_ORDER_FIRST, configure_first, NULL); -/* SI_ORDER_SECOND is hookable */ -SYSINIT(configure2, SI_SUB_CONFIGURE, SI_ORDER_THIRD, configure, NULL); -/* SI_ORDER_MIDDLE is hookable */ -SYSINIT(configure3, SI_SUB_CONFIGURE, SI_ORDER_ANY, configure_final, NULL); - -/* - * Determine i/o configuration for a machine. - */ -static void -configure_first(void *dummy) -{ - - nexusdev = device_add_child(root_bus, "nexus", 0); -} - -static void -configure(void *dummy) -{ - - root_bus_configure(); -#ifdef DEV_ISA - if (isa_bus_device) - isa_probe_children(isa_bus_device); -#endif -} - -static void -configure_final(void *dummy) -{ - - /* - * Now that we're guaranteed to have a PIC driver (or we'll never - * have one), program it with all the previously setup interrupts. - */ - powerpc_enable_intr(); - - /* Enable external interrupts. */ - mtmsr(mfmsr() | PSL_EE); - - cninit_finish(); - cold = 0; -} diff --git a/sys/powerpc/powerpc/bus_machdep.c b/sys/powerpc/powerpc/bus_machdep.c deleted file mode 100644 index 39096edfc1f..00000000000 --- a/sys/powerpc/powerpc/bus_machdep.c +++ /dev/null @@ -1,1023 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Semihalf, Rafal Jaworowski - * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, - * NASA Ames Research Center. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#define KTR_BE_IO 0 -#define KTR_LE_IO 0 - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#define TODO panic("%s: not implemented", __func__) - -#define MAX_EARLYBOOT_MAPPINGS 6 - -static struct { - vm_offset_t virt; - bus_addr_t addr; - bus_size_t size; - int flags; -} earlyboot_mappings[MAX_EARLYBOOT_MAPPINGS]; -static int earlyboot_map_idx = 0; - -void bs_remap_earlyboot(void); - -static __inline void * -__ppc_ba(bus_space_handle_t bsh, bus_size_t ofs) -{ - return ((void *)(bsh + ofs)); -} - -static int -bs_gen_map(bus_addr_t addr, bus_size_t size, int flags, - bus_space_handle_t *bshp) -{ - vm_memattr_t ma; - - /* - * Record what we did if we haven't enabled the MMU yet. We - * will need to remap it as soon as the MMU comes up. - */ - if (!pmap_bootstrapped) { - KASSERT(earlyboot_map_idx < MAX_EARLYBOOT_MAPPINGS, - ("%s: too many early boot mapping requests", __func__)); - earlyboot_mappings[earlyboot_map_idx].addr = addr; - earlyboot_mappings[earlyboot_map_idx].virt = - pmap_early_io_map(addr, size); - earlyboot_mappings[earlyboot_map_idx].size = size; - earlyboot_mappings[earlyboot_map_idx].flags = flags; - *bshp = earlyboot_mappings[earlyboot_map_idx].virt; - earlyboot_map_idx++; - } else { - ma = VM_MEMATTR_DEFAULT; - switch (flags) { - case BUS_SPACE_MAP_CACHEABLE: - ma = VM_MEMATTR_CACHEABLE; - break; - case BUS_SPACE_MAP_PREFETCHABLE: - ma = VM_MEMATTR_PREFETCHABLE; - break; - } - *bshp = (bus_space_handle_t)pmap_mapdev_attr(addr, size, ma); - } - - return (0); -} - -void -bs_remap_earlyboot(void) -{ - vm_paddr_t pa, spa; - vm_offset_t va; - int i; - vm_memattr_t ma; - - for (i = 0; i < earlyboot_map_idx; i++) { - spa = earlyboot_mappings[i].addr; - - if (hw_direct_map && - PHYS_TO_DMAP(spa) == earlyboot_mappings[i].virt && - pmap_dev_direct_mapped(spa, earlyboot_mappings[i].size) == 0) - continue; - - ma = VM_MEMATTR_DEFAULT; - switch (earlyboot_mappings[i].flags) { - case BUS_SPACE_MAP_CACHEABLE: - ma = VM_MEMATTR_CACHEABLE; - break; - case BUS_SPACE_MAP_PREFETCHABLE: - ma = VM_MEMATTR_PREFETCHABLE; - break; - } - - pa = trunc_page(spa); - va = trunc_page(earlyboot_mappings[i].virt); - while (pa < spa + earlyboot_mappings[i].size) { - pmap_kenter_attr(va, pa, ma); - va += PAGE_SIZE; - pa += PAGE_SIZE; - } - } -} - -static void -bs_gen_unmap(bus_size_t size __unused) -{ -} - -static int -bs_gen_subregion(bus_space_handle_t bsh, bus_size_t ofs, - bus_size_t size __unused, bus_space_handle_t *nbshp) -{ - *nbshp = bsh + ofs; - return (0); -} - -static int -bs_gen_alloc(bus_addr_t rstart __unused, bus_addr_t rend __unused, - bus_size_t size __unused, bus_size_t alignment __unused, - bus_size_t boundary __unused, int flags __unused, - bus_addr_t *bpap __unused, bus_space_handle_t *bshp __unused) -{ - TODO; -} - -static void -bs_gen_free(bus_space_handle_t bsh __unused, bus_size_t size __unused) -{ - TODO; -} - -static void -bs_gen_barrier(bus_space_handle_t bsh __unused, bus_size_t ofs __unused, - bus_size_t size __unused, int flags __unused) -{ - - powerpc_iomb(); -} - -/* - * Native-endian access functions - */ -static uint8_t -native_bs_rs_1(bus_space_handle_t bsh, bus_size_t ofs) -{ - volatile uint8_t *addr; - uint8_t res; - - addr = __ppc_ba(bsh, ofs); - res = *addr; - powerpc_iomb(); - CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res); - return (res); -} - -static uint16_t -native_bs_rs_2(bus_space_handle_t bsh, bus_size_t ofs) -{ - volatile uint16_t *addr; - uint16_t res; - - addr = __ppc_ba(bsh, ofs); - res = *addr; - powerpc_iomb(); - CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res); - return (res); -} - -static uint32_t -native_bs_rs_4(bus_space_handle_t bsh, bus_size_t ofs) -{ - volatile uint32_t *addr; - uint32_t res; - - addr = __ppc_ba(bsh, ofs); - res = *addr; - powerpc_iomb(); - CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res); - return (res); -} - -static uint64_t -native_bs_rs_8(bus_space_handle_t bsh, bus_size_t ofs) -{ - volatile uint64_t *addr; - uint64_t res; - - addr = __ppc_ba(bsh, ofs); - res = *addr; - powerpc_iomb(); - return (res); -} - -static void -native_bs_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt) -{ - ins8(__ppc_ba(bsh, ofs), addr, cnt); -} - -static void -native_bs_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt) -{ - ins16(__ppc_ba(bsh, ofs), addr, cnt); -} - -static void -native_bs_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt) -{ - ins32(__ppc_ba(bsh, ofs), addr, cnt); -} - -static void -native_bs_rm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt) -{ - ins64(__ppc_ba(bsh, ofs), addr, cnt); -} - -static void -native_bs_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt) -{ - volatile uint8_t *s = __ppc_ba(bsh, ofs); - - while (cnt--) - *addr++ = *s++; - powerpc_iomb(); -} - -static void -native_bs_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt) -{ - volatile uint16_t *s = __ppc_ba(bsh, ofs); - - while (cnt--) - *addr++ = *s++; - powerpc_iomb(); -} - -static void -native_bs_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt) -{ - volatile uint32_t *s = __ppc_ba(bsh, ofs); - - while (cnt--) - *addr++ = *s++; - powerpc_iomb(); -} - -static void -native_bs_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt) -{ - volatile uint64_t *s = __ppc_ba(bsh, ofs); - - while (cnt--) - *addr++ = *s++; - powerpc_iomb(); -} - -static void -native_bs_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val) -{ - volatile uint8_t *addr; - - addr = __ppc_ba(bsh, ofs); - *addr = val; - powerpc_iomb(); - CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val); -} - -static void -native_bs_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val) -{ - volatile uint16_t *addr; - - addr = __ppc_ba(bsh, ofs); - *addr = val; - powerpc_iomb(); - CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val); -} - -static void -native_bs_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val) -{ - volatile uint32_t *addr; - - addr = __ppc_ba(bsh, ofs); - *addr = val; - powerpc_iomb(); - CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val); -} - -static void -native_bs_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val) -{ - volatile uint64_t *addr; - - addr = __ppc_ba(bsh, ofs); - *addr = val; - powerpc_iomb(); - CTR4(KTR_BE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val); -} - -static void -native_bs_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr, - bus_size_t cnt) -{ - outsb(__ppc_ba(bsh, ofs), addr, cnt); -} - -static void -native_bs_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr, - bus_size_t cnt) -{ - outsw(__ppc_ba(bsh, ofs), addr, cnt); -} - -static void -native_bs_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr, - bus_size_t cnt) -{ - outsl(__ppc_ba(bsh, ofs), addr, cnt); -} - -static void -native_bs_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr, - bus_size_t cnt) -{ - outsll(__ppc_ba(bsh, ofs), addr, cnt); -} - -static void -native_bs_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr, - size_t cnt) -{ - volatile uint8_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - *d++ = *addr++; - powerpc_iomb(); -} - -static void -native_bs_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr, - size_t cnt) -{ - volatile uint16_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - *d++ = *addr++; - powerpc_iomb(); -} - -static void -native_bs_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr, - size_t cnt) -{ - volatile uint32_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - *d++ = *addr++; - powerpc_iomb(); -} - -static void -native_bs_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr, - size_t cnt) -{ - volatile uint64_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - *d++ = *addr++; - powerpc_iomb(); -} - -static void -native_bs_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt) -{ - volatile uint8_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - *d = val; - powerpc_iomb(); -} - -static void -native_bs_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt) -{ - volatile uint16_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - *d = val; - powerpc_iomb(); -} - -static void -native_bs_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt) -{ - volatile uint32_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - *d = val; - powerpc_iomb(); -} - -static void -native_bs_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt) -{ - volatile uint64_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - *d = val; - powerpc_iomb(); -} - -static void -native_bs_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt) -{ - volatile uint8_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - *d++ = val; - powerpc_iomb(); -} - -static void -native_bs_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt) -{ - volatile uint16_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - *d++ = val; - powerpc_iomb(); -} - -static void -native_bs_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt) -{ - volatile uint32_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - *d++ = val; - powerpc_iomb(); -} - -static void -native_bs_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt) -{ - volatile uint64_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - *d++ = val; - powerpc_iomb(); -} - -/* - * Byteswapped access functions - */ -static uint8_t -swapped_bs_rs_1(bus_space_handle_t bsh, bus_size_t ofs) -{ - volatile uint8_t *addr; - uint8_t res; - - addr = __ppc_ba(bsh, ofs); - res = *addr; - powerpc_iomb(); - CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res); - return (res); -} - -static uint16_t -swapped_bs_rs_2(bus_space_handle_t bsh, bus_size_t ofs) -{ - volatile uint16_t *addr; - uint16_t res; - - addr = __ppc_ba(bsh, ofs); - __asm __volatile("lhbrx %0, 0, %1" : "=r"(res) : "r"(addr)); - powerpc_iomb(); - CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res); - return (res); -} - -static uint32_t -swapped_bs_rs_4(bus_space_handle_t bsh, bus_size_t ofs) -{ - volatile uint32_t *addr; - uint32_t res; - - addr = __ppc_ba(bsh, ofs); - __asm __volatile("lwbrx %0, 0, %1" : "=r"(res) : "r"(addr)); - powerpc_iomb(); - CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res); - return (res); -} - -static uint64_t -swapped_bs_rs_8(bus_space_handle_t bsh, bus_size_t ofs) -{ - volatile uint64_t *addr; - uint64_t res; - - addr = __ppc_ba(bsh, ofs); - res = le64toh(*addr); - powerpc_iomb(); - CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x) = %#x", __func__, bsh, ofs, res); - return (res); -} - -static void -swapped_bs_rm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt) -{ - ins8(__ppc_ba(bsh, ofs), addr, cnt); -} - -static void -swapped_bs_rm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt) -{ - ins16rb(__ppc_ba(bsh, ofs), addr, cnt); -} - -static void -swapped_bs_rm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt) -{ - ins32rb(__ppc_ba(bsh, ofs), addr, cnt); -} - -static void -swapped_bs_rm_8(bus_space_handle_t bshh, bus_size_t ofs, uint64_t *addr, size_t cnt) -{ - TODO; -} - -static void -swapped_bs_rr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t *addr, size_t cnt) -{ - volatile uint8_t *s = __ppc_ba(bsh, ofs); - - while (cnt--) - *addr++ = *s++; - powerpc_iomb(); -} - -static void -swapped_bs_rr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t *addr, size_t cnt) -{ - volatile uint16_t *s = __ppc_ba(bsh, ofs); - - while (cnt--) - *addr++ = in16rb(s++); - powerpc_iomb(); -} - -static void -swapped_bs_rr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t *addr, size_t cnt) -{ - volatile uint32_t *s = __ppc_ba(bsh, ofs); - - while (cnt--) - *addr++ = in32rb(s++); - powerpc_iomb(); -} - -static void -swapped_bs_rr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t *addr, size_t cnt) -{ - TODO; -} - -static void -swapped_bs_ws_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val) -{ - volatile uint8_t *addr; - - addr = __ppc_ba(bsh, ofs); - *addr = val; - powerpc_iomb(); - CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val); -} - -static void -swapped_bs_ws_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val) -{ - volatile uint16_t *addr; - - addr = __ppc_ba(bsh, ofs); - __asm __volatile("sthbrx %0, 0, %1" :: "r"(val), "r"(addr)); - powerpc_iomb(); - CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val); -} - -static void -swapped_bs_ws_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val) -{ - volatile uint32_t *addr; - - addr = __ppc_ba(bsh, ofs); - __asm __volatile("stwbrx %0, 0, %1" :: "r"(val), "r"(addr)); - powerpc_iomb(); - CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val); -} - -static void -swapped_bs_ws_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val) -{ - volatile uint64_t *addr; - - addr = __ppc_ba(bsh, ofs); - *addr = htole64(val); - powerpc_iomb(); - CTR4(KTR_LE_IO, "%s(bsh=%#x, ofs=%#x, val=%#x)", __func__, bsh, ofs, val); -} - -static void -swapped_bs_wm_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr, - bus_size_t cnt) -{ - outs8(__ppc_ba(bsh, ofs), addr, cnt); -} - -static void -swapped_bs_wm_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr, - bus_size_t cnt) -{ - outs16rb(__ppc_ba(bsh, ofs), addr, cnt); -} - -static void -swapped_bs_wm_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr, - bus_size_t cnt) -{ - outs32rb(__ppc_ba(bsh, ofs), addr, cnt); -} - -static void -swapped_bs_wm_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr, - bus_size_t cnt) -{ - TODO; -} - -static void -swapped_bs_wr_1(bus_space_handle_t bsh, bus_size_t ofs, const uint8_t *addr, - size_t cnt) -{ - volatile uint8_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - *d++ = *addr++; - powerpc_iomb(); -} - -static void -swapped_bs_wr_2(bus_space_handle_t bsh, bus_size_t ofs, const uint16_t *addr, - size_t cnt) -{ - volatile uint16_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - out16rb(d++, *addr++); - powerpc_iomb(); -} - -static void -swapped_bs_wr_4(bus_space_handle_t bsh, bus_size_t ofs, const uint32_t *addr, - size_t cnt) -{ - volatile uint32_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - out32rb(d++, *addr++); - powerpc_iomb(); -} - -static void -swapped_bs_wr_8(bus_space_handle_t bsh, bus_size_t ofs, const uint64_t *addr, - size_t cnt) -{ - TODO; -} - -static void -swapped_bs_sm_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt) -{ - volatile uint8_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - *d = val; - powerpc_iomb(); -} - -static void -swapped_bs_sm_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt) -{ - volatile uint16_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - out16rb(d, val); - powerpc_iomb(); -} - -static void -swapped_bs_sm_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt) -{ - volatile uint32_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - out32rb(d, val); - powerpc_iomb(); -} - -static void -swapped_bs_sm_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt) -{ - TODO; -} - -static void -swapped_bs_sr_1(bus_space_handle_t bsh, bus_size_t ofs, uint8_t val, size_t cnt) -{ - volatile uint8_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - *d++ = val; - powerpc_iomb(); -} - -static void -swapped_bs_sr_2(bus_space_handle_t bsh, bus_size_t ofs, uint16_t val, size_t cnt) -{ - volatile uint16_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - out16rb(d++, val); - powerpc_iomb(); -} - -static void -swapped_bs_sr_4(bus_space_handle_t bsh, bus_size_t ofs, uint32_t val, size_t cnt) -{ - volatile uint32_t *d = __ppc_ba(bsh, ofs); - - while (cnt--) - out32rb(d++, val); - powerpc_iomb(); -} - -static void -swapped_bs_sr_8(bus_space_handle_t bsh, bus_size_t ofs, uint64_t val, size_t cnt) -{ - TODO; -} - -#if BYTE_ORDER == LITTLE_ENDIAN -struct bus_space bs_le_tag = { -#else -struct bus_space bs_be_tag = { -#endif - /* mapping/unmapping */ - .bs_map = bs_gen_map, - .bs_unmap = bs_gen_unmap, - .bs_subregion = bs_gen_subregion, - - /* allocation/deallocation */ - .bs_alloc = bs_gen_alloc, - .bs_free = bs_gen_free, - - /* barrier */ - .bs_barrier = bs_gen_barrier, - - /* read (single) */ - .bs_r_1 = native_bs_rs_1, - .bs_r_2 = native_bs_rs_2, - .bs_r_4 = native_bs_rs_4, - .bs_r_8 = native_bs_rs_8, - - /* read (single) stream */ - .bs_r_s_2 = native_bs_rs_2, - .bs_r_s_4 = native_bs_rs_4, - .bs_r_s_8 = native_bs_rs_8, - - /* read multiple */ - .bs_rm_1 = native_bs_rm_1, - .bs_rm_2 = native_bs_rm_2, - .bs_rm_4 = native_bs_rm_4, - .bs_rm_8 = native_bs_rm_8, - - /* read multiple stream */ - .bs_rm_s_2 = native_bs_rm_2, - .bs_rm_s_4 = native_bs_rm_4, - .bs_rm_s_8 = native_bs_rm_8, - - /* read region */ - .bs_rr_1 = native_bs_rr_1, - .bs_rr_2 = native_bs_rr_2, - .bs_rr_4 = native_bs_rr_4, - .bs_rr_8 = native_bs_rr_8, - - /* read region stream */ - .bs_rr_s_2 = native_bs_rr_2, - .bs_rr_s_4 = native_bs_rr_4, - .bs_rr_s_8 = native_bs_rr_8, - - /* write (single) */ - .bs_w_1 = native_bs_ws_1, - .bs_w_2 = native_bs_ws_2, - .bs_w_4 = native_bs_ws_4, - .bs_w_8 = native_bs_ws_8, - - /* write (single) stream */ - .bs_w_s_2 = native_bs_ws_2, - .bs_w_s_4 = native_bs_ws_4, - .bs_w_s_8 = native_bs_ws_8, - - /* write multiple */ - .bs_wm_1 = native_bs_wm_1, - .bs_wm_2 = native_bs_wm_2, - .bs_wm_4 = native_bs_wm_4, - .bs_wm_8 = native_bs_wm_8, - - /* write multiple stream */ - .bs_wm_s_2 = native_bs_wm_2, - .bs_wm_s_4 = native_bs_wm_4, - .bs_wm_s_8 = native_bs_wm_8, - - /* write region */ - .bs_wr_1 = native_bs_wr_1, - .bs_wr_2 = native_bs_wr_2, - .bs_wr_4 = native_bs_wr_4, - .bs_wr_8 = native_bs_wr_8, - - /* write region stream */ - .bs_wr_s_2 = native_bs_wr_2, - .bs_wr_s_4 = native_bs_wr_4, - .bs_wr_s_8 = native_bs_wr_8, - - /* set multiple */ - .bs_sm_1 = native_bs_sm_1, - .bs_sm_2 = native_bs_sm_2, - .bs_sm_4 = native_bs_sm_4, - .bs_sm_8 = native_bs_sm_8, - - /* set multiple stream */ - .bs_sm_s_2 = native_bs_sm_2, - .bs_sm_s_4 = native_bs_sm_4, - .bs_sm_s_8 = native_bs_sm_8, - - /* set region */ - .bs_sr_1 = native_bs_sr_1, - .bs_sr_2 = native_bs_sr_2, - .bs_sr_4 = native_bs_sr_4, - .bs_sr_8 = native_bs_sr_8, - - /* set region stream */ - .bs_sr_s_2 = native_bs_sr_2, - .bs_sr_s_4 = native_bs_sr_4, - .bs_sr_s_8 = native_bs_sr_8, - - /* copy region */ - .bs_cr_1 = NULL, /* UNIMPLEMENTED */ - .bs_cr_2 = NULL, /* UNIMPLEMENTED */ - .bs_cr_4 = NULL, /* UNIMPLEMENTED */ - .bs_cr_8 = NULL, /* UNIMPLEMENTED */ - - /* copy region stream */ - .bs_cr_s_2 = NULL, /* UNIMPLEMENTED */ - .bs_cr_s_4 = NULL, /* UNIMPLEMENTED */ - .bs_cr_s_8 = NULL, /* UNIMPLEMENTED */ -}; - -#if BYTE_ORDER == LITTLE_ENDIAN -struct bus_space bs_be_tag = { -#else -struct bus_space bs_le_tag = { -#endif - /* mapping/unmapping */ - .bs_map = bs_gen_map, - .bs_unmap = bs_gen_unmap, - .bs_subregion = bs_gen_subregion, - - /* allocation/deallocation */ - .bs_alloc = bs_gen_alloc, - .bs_free = bs_gen_free, - - /* barrier */ - .bs_barrier = bs_gen_barrier, - - /* read (single) */ - .bs_r_1 = swapped_bs_rs_1, - .bs_r_2 = swapped_bs_rs_2, - .bs_r_4 = swapped_bs_rs_4, - .bs_r_8 = swapped_bs_rs_8, - - /* read (single) stream */ - .bs_r_s_2 = native_bs_rs_2, - .bs_r_s_4 = native_bs_rs_4, - .bs_r_s_8 = native_bs_rs_8, - - /* read multiple */ - .bs_rm_1 = swapped_bs_rm_1, - .bs_rm_2 = swapped_bs_rm_2, - .bs_rm_4 = swapped_bs_rm_4, - .bs_rm_8 = swapped_bs_rm_8, - - /* read multiple stream */ - .bs_rm_s_2 = native_bs_rm_2, - .bs_rm_s_4 = native_bs_rm_4, - .bs_rm_s_8 = native_bs_rm_8, - - /* read region */ - .bs_rr_1 = swapped_bs_rr_1, - .bs_rr_2 = swapped_bs_rr_2, - .bs_rr_4 = swapped_bs_rr_4, - .bs_rr_8 = swapped_bs_rr_8, - - /* read region stream */ - .bs_rr_s_2 = native_bs_rr_2, - .bs_rr_s_4 = native_bs_rr_4, - .bs_rr_s_8 = native_bs_rr_8, - - /* write (single) */ - .bs_w_1 = swapped_bs_ws_1, - .bs_w_2 = swapped_bs_ws_2, - .bs_w_4 = swapped_bs_ws_4, - .bs_w_8 = swapped_bs_ws_8, - - /* write (single) stream */ - .bs_w_s_2 = native_bs_ws_2, - .bs_w_s_4 = native_bs_ws_4, - .bs_w_s_8 = native_bs_ws_8, - - /* write multiple */ - .bs_wm_1 = swapped_bs_wm_1, - .bs_wm_2 = swapped_bs_wm_2, - .bs_wm_4 = swapped_bs_wm_4, - .bs_wm_8 = swapped_bs_wm_8, - - /* write multiple stream */ - .bs_wm_s_2 = native_bs_wm_2, - .bs_wm_s_4 = native_bs_wm_4, - .bs_wm_s_8 = native_bs_wm_8, - - /* write region */ - .bs_wr_1 = swapped_bs_wr_1, - .bs_wr_2 = swapped_bs_wr_2, - .bs_wr_4 = swapped_bs_wr_4, - .bs_wr_8 = swapped_bs_wr_8, - - /* write region stream */ - .bs_wr_s_2 = native_bs_wr_2, - .bs_wr_s_4 = native_bs_wr_4, - .bs_wr_s_8 = native_bs_wr_8, - - /* set multiple */ - .bs_sm_1 = swapped_bs_sm_1, - .bs_sm_2 = swapped_bs_sm_2, - .bs_sm_4 = swapped_bs_sm_4, - .bs_sm_8 = swapped_bs_sm_8, - - /* set multiple stream */ - .bs_sm_s_2 = native_bs_sm_2, - .bs_sm_s_4 = native_bs_sm_4, - .bs_sm_s_8 = native_bs_sm_8, - - /* set region */ - .bs_sr_1 = swapped_bs_sr_1, - .bs_sr_2 = swapped_bs_sr_2, - .bs_sr_4 = swapped_bs_sr_4, - .bs_sr_8 = swapped_bs_sr_8, - - /* set region stream */ - .bs_sr_s_2 = native_bs_sr_2, - .bs_sr_s_4 = native_bs_sr_4, - .bs_sr_s_8 = native_bs_sr_8, - - /* copy region */ - .bs_cr_1 = NULL, /* UNIMPLEMENTED */ - .bs_cr_2 = NULL, /* UNIMPLEMENTED */ - .bs_cr_4 = NULL, /* UNIMPLEMENTED */ - .bs_cr_8 = NULL, /* UNIMPLEMENTED */ - - /* copy region stream */ - .bs_cr_s_2 = NULL, /* UNIMPLEMENTED */ - .bs_cr_s_4 = NULL, /* UNIMPLEMENTED */ - .bs_cr_s_8 = NULL, /* UNIMPLEMENTED */ -}; diff --git a/sys/powerpc/powerpc/busdma_machdep.c b/sys/powerpc/powerpc/busdma_machdep.c deleted file mode 100644 index 710a90f1f1d..00000000000 --- a/sys/powerpc/powerpc/busdma_machdep.c +++ /dev/null @@ -1,1249 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 1997, 1998 Justin T. Gibbs. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * From amd64/busdma_machdep.c, r204214 - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "iommu_if.h" - -#define MAX_BPAGES MIN(8192, physmem/40) - -struct bounce_zone; - -struct bus_dma_tag { - bus_dma_tag_t parent; - bus_size_t alignment; - bus_addr_t boundary; - bus_addr_t lowaddr; - bus_addr_t highaddr; - bus_dma_filter_t *filter; - void *filterarg; - bus_size_t maxsize; - bus_size_t maxsegsz; - u_int nsegments; - int flags; - int ref_count; - int map_count; - bus_dma_lock_t *lockfunc; - void *lockfuncarg; - struct bounce_zone *bounce_zone; - device_t iommu; - void *iommu_cookie; -}; - -struct bounce_page { - vm_offset_t vaddr; /* kva of bounce buffer */ - bus_addr_t busaddr; /* Physical address */ - vm_offset_t datavaddr; /* kva of client data */ - vm_page_t datapage; /* physical page of client data */ - vm_offset_t dataoffs; /* page offset of client data */ - bus_size_t datacount; /* client data count */ - STAILQ_ENTRY(bounce_page) links; -}; - -struct bounce_zone { - STAILQ_ENTRY(bounce_zone) links; - STAILQ_HEAD(bp_list, bounce_page) bounce_page_list; - int total_bpages; - int free_bpages; - int reserved_bpages; - int active_bpages; - int total_bounced; - int total_deferred; - int map_count; - bus_size_t alignment; - bus_addr_t lowaddr; - char zoneid[8]; - char lowaddrid[20]; - struct sysctl_ctx_list sysctl_tree; - struct sysctl_oid *sysctl_tree_top; -}; - -static struct mtx bounce_lock; -static int total_bpages; -static int busdma_zonecount; -static STAILQ_HEAD(, bounce_zone) bounce_zone_list; -static void *busdma_ih; - -static SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, - "Busdma parameters"); -SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0, - "Total bounce pages"); - -struct bus_dmamap { - struct bp_list bpages; - int pagesneeded; - int pagesreserved; - bus_dma_tag_t dmat; - struct memdesc mem; - bus_dma_segment_t *segments; - int nsegs; - bus_dmamap_callback_t *callback; - void *callback_arg; - STAILQ_ENTRY(bus_dmamap) links; - int contigalloc; -}; - -static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist; -static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist; - -static void init_bounce_pages(void *dummy); -static int alloc_bounce_zone(bus_dma_tag_t dmat); -static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages); -static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, - int commit); -static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, - vm_offset_t vaddr, bus_addr_t addr, - bus_size_t size); -static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage); -static __inline int run_filter(bus_dma_tag_t dmat, bus_addr_t paddr); - -/* - * Return true if a match is made. - * - * To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'. - * - * If paddr is within the bounds of the dma tag then call the filter callback - * to check for a match, if there is no filter callback then assume a match. - */ -static __inline int -run_filter(bus_dma_tag_t dmat, bus_addr_t paddr) -{ - int retval; - - retval = 0; - - do { - if (dmat->filter == NULL && dmat->iommu == NULL && - paddr > dmat->lowaddr && paddr <= dmat->highaddr) - retval = 1; - if (dmat->filter == NULL && - !vm_addr_align_ok(paddr, dmat->alignment)) - retval = 1; - if (dmat->filter != NULL && - (*dmat->filter)(dmat->filterarg, paddr) != 0) - retval = 1; - - dmat = dmat->parent; - } while (retval == 0 && dmat != NULL); - return (retval); -} - -/* - * Convenience function for manipulating driver locks from busdma (during - * busdma_swi, for example). - */ -void -busdma_lock_mutex(void *arg, bus_dma_lock_op_t op) -{ - struct mtx *dmtx; - - dmtx = (struct mtx *)arg; - switch (op) { - case BUS_DMA_LOCK: - mtx_lock(dmtx); - break; - case BUS_DMA_UNLOCK: - mtx_unlock(dmtx); - break; - default: - panic("Unknown operation 0x%x for busdma_lock_mutex!", op); - } -} - -/* - * dflt_lock should never get called. It gets put into the dma tag when - * lockfunc == NULL, which is only valid if the maps that are associated - * with the tag are meant to never be defered. - * XXX Should have a way to identify which driver is responsible here. - */ -static void -dflt_lock(void *arg, bus_dma_lock_op_t op) -{ - panic("driver error: busdma dflt_lock called"); -} - -#define BUS_DMA_COULD_BOUNCE BUS_DMA_BUS3 -#define BUS_DMA_MIN_ALLOC_COMP BUS_DMA_BUS4 -/* - * Allocate a device specific dma_tag. - */ -int -bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, - bus_addr_t boundary, bus_addr_t lowaddr, - bus_addr_t highaddr, bus_dma_filter_t *filter, - void *filterarg, bus_size_t maxsize, int nsegments, - bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc, - void *lockfuncarg, bus_dma_tag_t *dmat) -{ - bus_dma_tag_t newtag; - int error = 0; - - /* Basic sanity checking */ - if (boundary != 0 && boundary < maxsegsz) - maxsegsz = boundary; - - if (maxsegsz == 0) { - return (EINVAL); - } - - /* Filters are deprecated, emit a warning. */ - if (filter != NULL || filterarg != NULL) - printf("Warning: use of filters is deprecated; see busdma(9)\n"); - - /* Return a NULL tag on failure */ - *dmat = NULL; - - newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, - M_ZERO | M_NOWAIT); - if (newtag == NULL) { - CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", - __func__, newtag, 0, error); - return (ENOMEM); - } - - newtag->parent = parent; - newtag->alignment = alignment; - newtag->boundary = boundary; - newtag->lowaddr = trunc_page((vm_paddr_t)lowaddr) + (PAGE_SIZE - 1); - newtag->highaddr = trunc_page((vm_paddr_t)highaddr) + (PAGE_SIZE - 1); - newtag->filter = filter; - newtag->filterarg = filterarg; - newtag->maxsize = maxsize; - newtag->nsegments = nsegments; - newtag->maxsegsz = maxsegsz; - newtag->flags = flags; - newtag->ref_count = 1; /* Count ourself */ - newtag->map_count = 0; - if (lockfunc != NULL) { - newtag->lockfunc = lockfunc; - newtag->lockfuncarg = lockfuncarg; - } else { - newtag->lockfunc = dflt_lock; - newtag->lockfuncarg = NULL; - } - - /* Take into account any restrictions imposed by our parent tag */ - if (parent != NULL) { - newtag->lowaddr = MIN(parent->lowaddr, newtag->lowaddr); - newtag->highaddr = MAX(parent->highaddr, newtag->highaddr); - if (newtag->boundary == 0) - newtag->boundary = parent->boundary; - else if (parent->boundary != 0) - newtag->boundary = MIN(parent->boundary, - newtag->boundary); - if (newtag->filter == NULL) { - /* - * Short circuit looking at our parent directly - * since we have encapsulated all of its information - */ - newtag->filter = parent->filter; - newtag->filterarg = parent->filterarg; - newtag->parent = parent->parent; - } - if (newtag->parent != NULL) - atomic_add_int(&parent->ref_count, 1); - newtag->iommu = parent->iommu; - newtag->iommu_cookie = parent->iommu_cookie; - } - - if (newtag->lowaddr < ptoa((vm_paddr_t)Maxmem) && newtag->iommu == NULL) - newtag->flags |= BUS_DMA_COULD_BOUNCE; - - if (newtag->alignment > 1) - newtag->flags |= BUS_DMA_COULD_BOUNCE; - - if (((newtag->flags & BUS_DMA_COULD_BOUNCE) != 0) && - (flags & BUS_DMA_ALLOCNOW) != 0) { - struct bounce_zone *bz; - - /* Must bounce */ - - if ((error = alloc_bounce_zone(newtag)) != 0) { - free(newtag, M_DEVBUF); - return (error); - } - bz = newtag->bounce_zone; - - if (ptoa(bz->total_bpages) < maxsize) { - int pages; - - pages = atop(maxsize) - bz->total_bpages; - - /* Add pages to our bounce pool */ - if (alloc_bounce_pages(newtag, pages) < pages) - error = ENOMEM; - } - /* Performed initial allocation */ - newtag->flags |= BUS_DMA_MIN_ALLOC_COMP; - } - - if (error != 0) { - free(newtag, M_DEVBUF); - } else { - *dmat = newtag; - } - CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", - __func__, newtag, (newtag != NULL ? newtag->flags : 0), error); - return (error); -} - -void -bus_dma_template_clone(bus_dma_template_t *t, bus_dma_tag_t dmat) -{ - - if (t == NULL || dmat == NULL) - return; - - t->parent = dmat->parent; - t->alignment = dmat->alignment; - t->boundary = dmat->boundary; - t->lowaddr = dmat->lowaddr; - t->highaddr = dmat->highaddr; - t->maxsize = dmat->maxsize; - t->nsegments = dmat->nsegments; - t->maxsegsize = dmat->maxsegsz; - t->flags = dmat->flags; - t->lockfunc = dmat->lockfunc; - t->lockfuncarg = dmat->lockfuncarg; -} - -int -bus_dma_tag_set_domain(bus_dma_tag_t dmat, int domain) -{ - - return (0); -} - -int -bus_dma_tag_destroy(bus_dma_tag_t dmat) -{ - bus_dma_tag_t dmat_copy __unused; - int error; - - error = 0; - dmat_copy = dmat; - - if (dmat != NULL) { - if (dmat->map_count != 0) { - error = EBUSY; - goto out; - } - - while (dmat != NULL) { - bus_dma_tag_t parent; - - parent = dmat->parent; - atomic_subtract_int(&dmat->ref_count, 1); - if (dmat->ref_count == 0) { - free(dmat, M_DEVBUF); - /* - * Last reference count, so - * release our reference - * count on our parent. - */ - dmat = parent; - } else - dmat = NULL; - } - } -out: - CTR3(KTR_BUSDMA, "%s tag %p error %d", __func__, dmat_copy, error); - return (error); -} - -/* - * Allocate a handle for mapping from kva/uva/physical - * address space into bus device space. - */ -int -bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp) -{ - int error; - - error = 0; - - *mapp = (bus_dmamap_t)malloc(sizeof(**mapp), M_DEVBUF, - M_NOWAIT | M_ZERO); - if (*mapp == NULL) { - CTR3(KTR_BUSDMA, "%s: tag %p error %d", - __func__, dmat, ENOMEM); - return (ENOMEM); - } - - /* - * Bouncing might be required if the driver asks for an active - * exclusion region, a data alignment that is stricter than 1, and/or - * an active address boundary. - */ - if (dmat->flags & BUS_DMA_COULD_BOUNCE) { - /* Must bounce */ - struct bounce_zone *bz; - int maxpages; - - if (dmat->bounce_zone == NULL) { - if ((error = alloc_bounce_zone(dmat)) != 0) - return (error); - } - bz = dmat->bounce_zone; - - /* Initialize the new map */ - STAILQ_INIT(&((*mapp)->bpages)); - - /* - * Attempt to add pages to our pool on a per-instance - * basis up to a sane limit. - */ - if (dmat->alignment > 1) - maxpages = MAX_BPAGES; - else - maxpages = MIN(MAX_BPAGES, Maxmem -atop(dmat->lowaddr)); - if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0 - || (bz->map_count > 0 && bz->total_bpages < maxpages)) { - int pages; - - pages = MAX(atop(dmat->maxsize), 1); - pages = MIN(maxpages - bz->total_bpages, pages); - pages = MAX(pages, 1); - if (alloc_bounce_pages(dmat, pages) < pages) - error = ENOMEM; - - if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) { - if (error == 0) - dmat->flags |= BUS_DMA_MIN_ALLOC_COMP; - } else { - error = 0; - } - } - bz->map_count++; - } - - (*mapp)->nsegs = 0; - (*mapp)->segments = (bus_dma_segment_t *)malloc( - sizeof(bus_dma_segment_t) * dmat->nsegments, M_DEVBUF, - M_NOWAIT); - if ((*mapp)->segments == NULL) { - CTR3(KTR_BUSDMA, "%s: tag %p error %d", - __func__, dmat, ENOMEM); - return (ENOMEM); - } - - if (error == 0) - dmat->map_count++; - CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", - __func__, dmat, dmat->flags, error); - return (error); -} - -/* - * Destroy a handle for mapping from kva/uva/physical - * address space into bus device space. - */ -int -bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map) -{ - if (dmat->flags & BUS_DMA_COULD_BOUNCE) { - if (STAILQ_FIRST(&map->bpages) != NULL) { - CTR3(KTR_BUSDMA, "%s: tag %p error %d", - __func__, dmat, EBUSY); - return (EBUSY); - } - if (dmat->bounce_zone) - dmat->bounce_zone->map_count--; - } - free(map->segments, M_DEVBUF); - free(map, M_DEVBUF); - dmat->map_count--; - CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat); - return (0); -} - -/* - * Allocate a piece of memory that can be efficiently mapped into - * bus device space based on the constraints lited in the dma tag. - * A dmamap to for use with dmamap_load is also allocated. - */ -int -bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags, - bus_dmamap_t *mapp) -{ - vm_memattr_t attr; - int mflags; - - if (flags & BUS_DMA_NOWAIT) - mflags = M_NOWAIT; - else - mflags = M_WAITOK; - - bus_dmamap_create(dmat, flags, mapp); - - if (flags & BUS_DMA_ZERO) - mflags |= M_ZERO; - if (flags & BUS_DMA_NOCACHE) - attr = VM_MEMATTR_UNCACHEABLE; - else - attr = VM_MEMATTR_DEFAULT; - - /* - * XXX: - * (dmat->alignment <= dmat->maxsize) is just a quick hack; the exact - * alignment guarantees of malloc need to be nailed down, and the - * code below should be rewritten to take that into account. - * - * In the meantime, we'll warn the user if malloc gets it wrong. - */ - if ((dmat->maxsize <= PAGE_SIZE) && - (dmat->alignment <= dmat->maxsize) && - dmat->lowaddr >= ptoa((vm_paddr_t)Maxmem) && - attr == VM_MEMATTR_DEFAULT) { - *vaddr = malloc(dmat->maxsize, M_DEVBUF, mflags); - } else { - /* - * XXX Use Contigmalloc until it is merged into this facility - * and handles multi-seg allocations. Nobody is doing - * multi-seg allocations yet though. - * XXX Certain AGP hardware does. - */ - *vaddr = (void *)kmem_alloc_contig(dmat->maxsize, mflags, 0ul, - dmat->lowaddr, dmat->alignment ? dmat->alignment : 1ul, - dmat->boundary, attr); - (*mapp)->contigalloc = 1; - } - if (*vaddr == NULL) { - CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", - __func__, dmat, dmat->flags, ENOMEM); - return (ENOMEM); - } else if (!vm_addr_align_ok(vtophys(*vaddr), dmat->alignment)) { - printf("bus_dmamem_alloc failed to align memory properly.\n"); - } - CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", - __func__, dmat, dmat->flags, 0); - return (0); -} - -/* - * Free a piece of memory and it's allociated dmamap, that was allocated - * via bus_dmamem_alloc. Make the same choice for free/contigfree. - */ -void -bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map) -{ - - if (!map->contigalloc) - free(vaddr, M_DEVBUF); - else - kmem_free((vm_offset_t)vaddr, dmat->maxsize); - bus_dmamap_destroy(dmat, map); - CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags); -} - -static void -_bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf, - bus_size_t buflen, int flags) -{ - bus_addr_t curaddr; - bus_size_t sgsize; - - if (map->pagesneeded == 0) { - CTR4(KTR_BUSDMA, "lowaddr= %d Maxmem= %d, boundary= %d, " - "alignment= %d", dmat->lowaddr, ptoa((vm_paddr_t)Maxmem), - dmat->boundary, dmat->alignment); - CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d", map, map->pagesneeded); - /* - * Count the number of bounce pages - * needed in order to complete this transfer - */ - curaddr = buf; - while (buflen != 0) { - sgsize = MIN(buflen, dmat->maxsegsz); - if (run_filter(dmat, curaddr) != 0) { - sgsize = MIN(sgsize, - PAGE_SIZE - (curaddr & PAGE_MASK)); - map->pagesneeded++; - } - curaddr += sgsize; - buflen -= sgsize; - } - CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded); - } -} - -static void -_bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, pmap_t pmap, - void *buf, bus_size_t buflen, int flags) -{ - vm_offset_t vaddr; - vm_offset_t vendaddr; - bus_addr_t paddr; - - if (map->pagesneeded == 0) { - CTR4(KTR_BUSDMA, "lowaddr= %d Maxmem= %d, boundary= %d, " - "alignment= %d", dmat->lowaddr, ptoa((vm_paddr_t)Maxmem), - dmat->boundary, dmat->alignment); - CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d", map, map->pagesneeded); - /* - * Count the number of bounce pages - * needed in order to complete this transfer - */ - vaddr = (vm_offset_t)buf; - vendaddr = (vm_offset_t)buf + buflen; - - while (vaddr < vendaddr) { - bus_size_t sg_len; - - sg_len = PAGE_SIZE - ((vm_offset_t)vaddr & PAGE_MASK); - if (pmap == kernel_pmap) - paddr = pmap_kextract(vaddr); - else - paddr = pmap_extract(pmap, vaddr); - if (run_filter(dmat, paddr) != 0) { - sg_len = roundup2(sg_len, dmat->alignment); - map->pagesneeded++; - } - vaddr += sg_len; - } - CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded); - } -} - -static int -_bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int flags) -{ - - /* Reserve Necessary Bounce Pages */ - mtx_lock(&bounce_lock); - if (flags & BUS_DMA_NOWAIT) { - if (reserve_bounce_pages(dmat, map, 0) != 0) { - mtx_unlock(&bounce_lock); - return (ENOMEM); - } - } else { - if (reserve_bounce_pages(dmat, map, 1) != 0) { - /* Queue us for resources */ - STAILQ_INSERT_TAIL(&bounce_map_waitinglist, - map, links); - mtx_unlock(&bounce_lock); - return (EINPROGRESS); - } - } - mtx_unlock(&bounce_lock); - - return (0); -} - -/* - * Add a single contiguous physical range to the segment list. - */ -static int -_bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr, - bus_size_t sgsize, bus_dma_segment_t *segs, int *segp) -{ - int seg; - - /* - * Make sure we don't cross any boundaries. - */ - if (!vm_addr_bound_ok(curaddr, sgsize, dmat->boundary)) - sgsize = roundup2(curaddr, dmat->boundary) - curaddr; - - /* - * Insert chunk into a segment, coalescing with - * previous segment if possible. - */ - seg = *segp; - if (seg == -1) { - seg = 0; - segs[seg].ds_addr = curaddr; - segs[seg].ds_len = sgsize; - } else { - if (curaddr == segs[seg].ds_addr + segs[seg].ds_len && - (segs[seg].ds_len + sgsize) <= dmat->maxsegsz && - vm_addr_bound_ok(segs[seg].ds_addr, - segs[seg].ds_len + sgsize, dmat->boundary)) - segs[seg].ds_len += sgsize; - else { - if (++seg >= dmat->nsegments) - return (0); - segs[seg].ds_addr = curaddr; - segs[seg].ds_len = sgsize; - } - } - *segp = seg; - return (sgsize); -} - -/* - * Utility function to load a physical buffer. segp contains - * the starting segment on entrace, and the ending segment on exit. - */ -int -_bus_dmamap_load_phys(bus_dma_tag_t dmat, - bus_dmamap_t map, - vm_paddr_t buf, bus_size_t buflen, - int flags, - bus_dma_segment_t *segs, - int *segp) -{ - bus_addr_t curaddr; - bus_size_t sgsize; - int error; - - if (segs == NULL) - segs = map->segments; - - if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) { - _bus_dmamap_count_phys(dmat, map, buf, buflen, flags); - if (map->pagesneeded != 0) { - error = _bus_dmamap_reserve_pages(dmat, map, flags); - if (error) - return (error); - } - } - - while (buflen > 0) { - curaddr = buf; - sgsize = MIN(buflen, dmat->maxsegsz); - if (map->pagesneeded != 0 && run_filter(dmat, curaddr)) { - sgsize = MIN(sgsize, PAGE_SIZE - (curaddr & PAGE_MASK)); - curaddr = add_bounce_page(dmat, map, 0, curaddr, - sgsize); - } - sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs, - segp); - if (sgsize == 0) - break; - buf += sgsize; - buflen -= sgsize; - } - - /* - * Did we fit? - */ - return (buflen != 0 ? EFBIG : 0); /* XXX better return value here? */ -} - -int -_bus_dmamap_load_ma(bus_dma_tag_t dmat, bus_dmamap_t map, - struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags, - bus_dma_segment_t *segs, int *segp) -{ - - return (bus_dmamap_load_ma_triv(dmat, map, ma, tlen, ma_offs, flags, - segs, segp)); -} - -/* - * Utility function to load a linear buffer. segp contains - * the starting segment on entrance, and the ending segment on exit. - */ -int -_bus_dmamap_load_buffer(bus_dma_tag_t dmat, - bus_dmamap_t map, - void *buf, bus_size_t buflen, - pmap_t pmap, - int flags, - bus_dma_segment_t *segs, - int *segp) -{ - bus_size_t sgsize; - bus_addr_t curaddr; - vm_offset_t kvaddr, vaddr; - int error; - - if (segs == NULL) - segs = map->segments; - - if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) { - _bus_dmamap_count_pages(dmat, map, pmap, buf, buflen, flags); - if (map->pagesneeded != 0) { - error = _bus_dmamap_reserve_pages(dmat, map, flags); - if (error) - return (error); - } - } - - vaddr = (vm_offset_t)buf; - - while (buflen > 0) { - bus_size_t max_sgsize; - - /* - * Get the physical address for this segment. - */ - if (pmap == kernel_pmap) { - curaddr = pmap_kextract(vaddr); - kvaddr = vaddr; - } else { - curaddr = pmap_extract(pmap, vaddr); - kvaddr = 0; - } - - /* - * Compute the segment size, and adjust counts. - */ - max_sgsize = MIN(buflen, dmat->maxsegsz); - sgsize = PAGE_SIZE - (curaddr & PAGE_MASK); - if (map->pagesneeded != 0 && run_filter(dmat, curaddr)) { - sgsize = roundup2(sgsize, dmat->alignment); - sgsize = MIN(sgsize, max_sgsize); - curaddr = add_bounce_page(dmat, map, kvaddr, curaddr, - sgsize); - } else { - sgsize = MIN(sgsize, max_sgsize); - } - - sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs, - segp); - if (sgsize == 0) - break; - vaddr += sgsize; - buflen -= sgsize; - } - - /* - * Did we fit? - */ - return (buflen != 0 ? EFBIG : 0); /* XXX better return value here? */ -} - -void -_bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map, - struct memdesc *mem, bus_dmamap_callback_t *callback, - void *callback_arg) -{ - - if (dmat->flags & BUS_DMA_COULD_BOUNCE) { - map->dmat = dmat; - map->mem = *mem; - map->callback = callback; - map->callback_arg = callback_arg; - } -} - -bus_dma_segment_t * -_bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map, - bus_dma_segment_t *segs, int nsegs, int error) -{ - - map->nsegs = nsegs; - if (segs != NULL) - memcpy(map->segments, segs, map->nsegs*sizeof(segs[0])); - if (dmat->iommu != NULL) - IOMMU_MAP(dmat->iommu, map->segments, &map->nsegs, - dmat->lowaddr, dmat->highaddr, dmat->alignment, - dmat->boundary, dmat->iommu_cookie); - - if (segs != NULL) - memcpy(segs, map->segments, map->nsegs*sizeof(segs[0])); - else - segs = map->segments; - - return (segs); -} - -/* - * Release the mapping held by map. - */ -void -bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map) -{ - struct bounce_page *bpage; - - if (dmat->iommu) { - IOMMU_UNMAP(dmat->iommu, map->segments, map->nsegs, dmat->iommu_cookie); - map->nsegs = 0; - } - - while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) { - STAILQ_REMOVE_HEAD(&map->bpages, links); - free_bounce_page(dmat, bpage); - } -} - -void -bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op) -{ - struct bounce_page *bpage; - vm_offset_t datavaddr, tempvaddr; - - if ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) { - /* - * Handle data bouncing. We might also - * want to add support for invalidating - * the caches on broken hardware - */ - CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x op 0x%x " - "performing bounce", __func__, dmat, dmat->flags, op); - - if (op & BUS_DMASYNC_PREWRITE) { - while (bpage != NULL) { - tempvaddr = 0; - datavaddr = bpage->datavaddr; - if (datavaddr == 0) { - tempvaddr = pmap_quick_enter_page( - bpage->datapage); - datavaddr = tempvaddr | - bpage->dataoffs; - } - - bcopy((void *)datavaddr, - (void *)bpage->vaddr, bpage->datacount); - - if (tempvaddr != 0) - pmap_quick_remove_page(tempvaddr); - bpage = STAILQ_NEXT(bpage, links); - } - dmat->bounce_zone->total_bounced++; - } - - if (op & BUS_DMASYNC_POSTREAD) { - while (bpage != NULL) { - tempvaddr = 0; - datavaddr = bpage->datavaddr; - if (datavaddr == 0) { - tempvaddr = pmap_quick_enter_page( - bpage->datapage); - datavaddr = tempvaddr | - bpage->dataoffs; - } - - bcopy((void *)bpage->vaddr, - (void *)datavaddr, bpage->datacount); - - if (tempvaddr != 0) - pmap_quick_remove_page(tempvaddr); - bpage = STAILQ_NEXT(bpage, links); - } - dmat->bounce_zone->total_bounced++; - } - } - - powerpc_sync(); -} - -static void -init_bounce_pages(void *dummy __unused) -{ - - total_bpages = 0; - STAILQ_INIT(&bounce_zone_list); - STAILQ_INIT(&bounce_map_waitinglist); - STAILQ_INIT(&bounce_map_callbacklist); - mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF); -} -SYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL); - -static struct sysctl_ctx_list * -busdma_sysctl_tree(struct bounce_zone *bz) -{ - return (&bz->sysctl_tree); -} - -static struct sysctl_oid * -busdma_sysctl_tree_top(struct bounce_zone *bz) -{ - return (bz->sysctl_tree_top); -} - -static int -alloc_bounce_zone(bus_dma_tag_t dmat) -{ - struct bounce_zone *bz; - - /* Check to see if we already have a suitable zone */ - STAILQ_FOREACH(bz, &bounce_zone_list, links) { - if ((dmat->alignment <= bz->alignment) - && (dmat->lowaddr >= bz->lowaddr)) { - dmat->bounce_zone = bz; - return (0); - } - } - - if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_DEVBUF, - M_NOWAIT | M_ZERO)) == NULL) - return (ENOMEM); - - STAILQ_INIT(&bz->bounce_page_list); - bz->free_bpages = 0; - bz->reserved_bpages = 0; - bz->active_bpages = 0; - bz->lowaddr = dmat->lowaddr; - bz->alignment = MAX(dmat->alignment, PAGE_SIZE); - bz->map_count = 0; - snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount); - busdma_zonecount++; - snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr); - STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links); - dmat->bounce_zone = bz; - - sysctl_ctx_init(&bz->sysctl_tree); - bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree, - SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid, - CTLFLAG_RD | CTLFLAG_MPSAFE, 0, ""); - if (bz->sysctl_tree_top == NULL) { - sysctl_ctx_free(&bz->sysctl_tree); - return (0); /* XXX error code? */ - } - - SYSCTL_ADD_INT(busdma_sysctl_tree(bz), - SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, - "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0, - "Total bounce pages"); - SYSCTL_ADD_INT(busdma_sysctl_tree(bz), - SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, - "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0, - "Free bounce pages"); - SYSCTL_ADD_INT(busdma_sysctl_tree(bz), - SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, - "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0, - "Reserved bounce pages"); - SYSCTL_ADD_INT(busdma_sysctl_tree(bz), - SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, - "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0, - "Active bounce pages"); - SYSCTL_ADD_INT(busdma_sysctl_tree(bz), - SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, - "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0, - "Total bounce requests"); - SYSCTL_ADD_INT(busdma_sysctl_tree(bz), - SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, - "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0, - "Total bounce requests that were deferred"); - SYSCTL_ADD_STRING(busdma_sysctl_tree(bz), - SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, - "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, ""); - SYSCTL_ADD_UAUTO(busdma_sysctl_tree(bz), - SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO, - "alignment", CTLFLAG_RD, &bz->alignment, ""); - - return (0); -} - -static int -alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages) -{ - struct bounce_zone *bz; - int count; - - bz = dmat->bounce_zone; - count = 0; - while (numpages > 0) { - struct bounce_page *bpage; - - bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_DEVBUF, - M_NOWAIT | M_ZERO); - - if (bpage == NULL) - break; - bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_DEVBUF, - M_NOWAIT, 0ul, - bz->lowaddr, - PAGE_SIZE, - 0); - if (bpage->vaddr == 0) { - free(bpage, M_DEVBUF); - break; - } - bpage->busaddr = pmap_kextract(bpage->vaddr); - mtx_lock(&bounce_lock); - STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links); - total_bpages++; - bz->total_bpages++; - bz->free_bpages++; - mtx_unlock(&bounce_lock); - count++; - numpages--; - } - return (count); -} - -static int -reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit) -{ - struct bounce_zone *bz; - int pages; - - mtx_assert(&bounce_lock, MA_OWNED); - bz = dmat->bounce_zone; - pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved); - if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages)) - return (map->pagesneeded - (map->pagesreserved + pages)); - bz->free_bpages -= pages; - bz->reserved_bpages += pages; - map->pagesreserved += pages; - pages = map->pagesneeded - map->pagesreserved; - - return (pages); -} - -static bus_addr_t -add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr, - bus_addr_t addr, bus_size_t size) -{ - struct bounce_zone *bz; - struct bounce_page *bpage; - - KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag")); - - bz = dmat->bounce_zone; - if (map->pagesneeded == 0) - panic("add_bounce_page: map doesn't need any pages"); - map->pagesneeded--; - - if (map->pagesreserved == 0) - panic("add_bounce_page: map doesn't need any pages"); - map->pagesreserved--; - - mtx_lock(&bounce_lock); - bpage = STAILQ_FIRST(&bz->bounce_page_list); - if (bpage == NULL) - panic("add_bounce_page: free page list is empty"); - - STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links); - bz->reserved_bpages--; - bz->active_bpages++; - mtx_unlock(&bounce_lock); - - if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) { - /* Page offset needs to be preserved. */ - bpage->vaddr |= addr & PAGE_MASK; - bpage->busaddr |= addr & PAGE_MASK; - } - bpage->datavaddr = vaddr; - bpage->datapage = PHYS_TO_VM_PAGE(addr); - bpage->dataoffs = addr & PAGE_MASK; - bpage->datacount = size; - STAILQ_INSERT_TAIL(&(map->bpages), bpage, links); - return (bpage->busaddr); -} - -static void -free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage) -{ - struct bus_dmamap *map; - struct bounce_zone *bz; - bool schedule_swi; - - bz = dmat->bounce_zone; - bpage->datavaddr = 0; - bpage->datacount = 0; - if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) { - /* - * Reset the bounce page to start at offset 0. Other uses - * of this bounce page may need to store a full page of - * data and/or assume it starts on a page boundary. - */ - bpage->vaddr &= ~PAGE_MASK; - bpage->busaddr &= ~PAGE_MASK; - } - - schedule_swi = false; - mtx_lock(&bounce_lock); - STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links); - bz->free_bpages++; - bz->active_bpages--; - if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) { - if (reserve_bounce_pages(map->dmat, map, 1) == 0) { - STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links); - STAILQ_INSERT_TAIL(&bounce_map_callbacklist, - map, links); - bz->total_deferred++; - schedule_swi = true; - } - } - mtx_unlock(&bounce_lock); - if (schedule_swi) - swi_sched(busdma_ih, 0); -} - -static void -busdma_swi(void *dummy __unused) -{ - bus_dma_tag_t dmat; - struct bus_dmamap *map; - - mtx_lock(&bounce_lock); - while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) { - STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links); - mtx_unlock(&bounce_lock); - dmat = map->dmat; - (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_LOCK); - bus_dmamap_load_mem(map->dmat, map, &map->mem, - map->callback, map->callback_arg, - BUS_DMA_WAITOK); - (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_UNLOCK); - mtx_lock(&bounce_lock); - } - mtx_unlock(&bounce_lock); -} - -static void -start_busdma_swi(void *dummy __unused) -{ - if (swi_add(NULL, "busdma", busdma_swi, NULL, SWI_BUSDMA, INTR_MPSAFE, - &busdma_ih)) - panic("died while creating busdma swi ithread"); -} -SYSINIT(start_busdma_swi, SI_SUB_SOFTINTR, SI_ORDER_ANY, start_busdma_swi, - NULL); - -int -bus_dma_tag_set_iommu(bus_dma_tag_t tag, device_t iommu, void *cookie) -{ - tag->iommu = iommu; - tag->iommu_cookie = cookie; - - return (0); -} diff --git a/sys/powerpc/powerpc/clock.c b/sys/powerpc/powerpc/clock.c deleted file mode 100644 index 5b10e200a97..00000000000 --- a/sys/powerpc/powerpc/clock.c +++ /dev/null @@ -1,344 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause AND BSD-2-Clause - * - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: clock.c,v 1.9 2000/01/19 02:52:19 msaitoh Exp $ - */ -/* - * Copyright (C) 2001 Benno Rice. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include - -/* - * Initially we assume a processor with a bus frequency of 12.5 MHz. - */ -static int initialized = 0; -static uint64_t ps_per_tick = 80000; -static u_long ticks_per_sec = 12500000; -static u_long *decr_counts[MAXCPU]; - -static int decr_et_start(struct eventtimer *et, - sbintime_t first, sbintime_t period); -static int decr_et_stop(struct eventtimer *et); -static timecounter_get_t decr_get_timecount; -static uint32_t decr_vdso_timehands(struct vdso_timehands *vdso_th, - struct timecounter *tc); -#ifdef COMPAT_FREEBSD32 -static uint32_t decr_vdso_timehands32(struct vdso_timehands32 *vdso_th32, - struct timecounter *tc); -#endif - -struct decr_state { - int mode; /* 0 - off, 1 - periodic, 2 - one-shot. */ - int32_t div; /* Periodic divisor. */ -}; -DPCPU_DEFINE_STATIC(struct decr_state, decr_state); - -static struct eventtimer decr_et; -static struct timecounter decr_tc = { - .tc_get_timecount = decr_get_timecount, - .tc_counter_mask = ~0u, - .tc_name = "timebase", - .tc_quality = 1000, - .tc_fill_vdso_timehands = decr_vdso_timehands, -#ifdef COMPAT_FREEBSD32 - .tc_fill_vdso_timehands32 = decr_vdso_timehands32, -#endif -}; - -/* - * Decrementer interrupt handler. - */ -void -decr_intr(struct trapframe *frame) -{ - struct decr_state *s = DPCPU_PTR(decr_state); - int nticks = 0; - int32_t val; - - if (!initialized) - return; - - (*decr_counts[curcpu])++; - -#ifdef BOOKE - /* - * Interrupt handler must reset DIS to avoid getting another - * interrupt once EE is enabled. - */ - mtspr(SPR_TSR, TSR_DIS); -#endif - - if (s->mode == 1) { - /* - * Based on the actual time delay since the last decrementer - * reload, we arrange for earlier interrupt next time. - */ - __asm ("mfdec %0" : "=r"(val)); - while (val < 0) { - val += s->div; - nticks++; - } - mtdec(val); - } else if (s->mode == 2) { - nticks = 1; - decr_et_stop(NULL); - } else if (s->mode == 0) { - /* Potemkin timer ran out without an event. Just reset it. */ - decr_et_stop(NULL); - } - - while (nticks-- > 0) { - if (decr_et.et_active) - decr_et.et_event_cb(&decr_et, decr_et.et_arg); - } -} - -void -cpu_initclocks(void) -{ - - decr_tc_init(); - cpu_initclocks_bsp(); -} - -/* - * BSP early initialization. - */ -void -decr_init(void) -{ - struct cpuref cpu; - char buf[32]; - - /* - * Check the BSP's timebase frequency. Sometimes we can't find the BSP, - * so fall back to the first CPU in this case. - */ - if (platform_smp_get_bsp(&cpu) != 0) - platform_smp_first_cpu(&cpu); - ticks_per_sec = platform_timebase_freq(&cpu); - ps_per_tick = 1000000000000 / ticks_per_sec; - - set_cputicker(mftb, ticks_per_sec, false); - snprintf(buf, sizeof(buf), "cpu%d:decrementer", curcpu); - intrcnt_add(buf, &decr_counts[curcpu]); - decr_et_stop(NULL); - initialized = 1; -} - -#ifdef SMP -/* - * AP early initialization. - */ -void -decr_ap_init(void) -{ - char buf[32]; - - snprintf(buf, sizeof(buf), "cpu%d:decrementer", curcpu); - intrcnt_add(buf, &decr_counts[curcpu]); - decr_et_stop(NULL); -} -#endif - -/* - * Final initialization. - */ -void -decr_tc_init(void) -{ - - decr_tc.tc_frequency = ticks_per_sec; - tc_init(&decr_tc); - decr_et.et_name = "decrementer"; - decr_et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT | - ET_FLAGS_PERCPU; - decr_et.et_quality = 1000; - decr_et.et_frequency = ticks_per_sec; - decr_et.et_min_period = (0x00000002LLU << 32) / ticks_per_sec; - decr_et.et_max_period = (0x7fffffffLLU << 32) / ticks_per_sec; - decr_et.et_start = decr_et_start; - decr_et.et_stop = decr_et_stop; - decr_et.et_priv = NULL; - et_register(&decr_et); -} - -uint32_t -decr_vdso_timehands(struct vdso_timehands *vdso_th, struct timecounter *tc) -{ - vdso_th->th_algo = VDSO_TH_ALGO_PPC_TB; - bzero(vdso_th->th_res, sizeof(vdso_th->th_res)); - return (initialized == 1); -} - -#ifdef COMPAT_FREEBSD32 -uint32_t -decr_vdso_timehands32(struct vdso_timehands32 *vdso_th32, - struct timecounter *tc) -{ - vdso_th32->th_algo = VDSO_TH_ALGO_PPC_TB; - bzero(vdso_th32->th_res, sizeof(vdso_th32->th_res)); - return (initialized == 1); -} -#endif - -/* - * Event timer start method. - */ -static int -decr_et_start(struct eventtimer *et, sbintime_t first, sbintime_t period) -{ - struct decr_state *s = DPCPU_PTR(decr_state); - uint32_t fdiv; -#ifdef BOOKE - uint32_t tcr; -#endif - - if (period != 0) { - s->mode = 1; - s->div = (decr_et.et_frequency * period) >> 32; - } else { - s->mode = 2; - s->div = 0; - } - if (first != 0) - fdiv = (decr_et.et_frequency * first) >> 32; - else - fdiv = s->div; - -#ifdef BOOKE - tcr = mfspr(SPR_TCR); - tcr |= TCR_DIE; - if (s->mode == 1) { - mtspr(SPR_DECAR, s->div); - tcr |= TCR_ARE; - } else - tcr &= ~TCR_ARE; - mtdec(fdiv); - mtspr(SPR_TCR, tcr); -#else - mtdec(fdiv); -#endif - - return (0); -} - -/* - * Event timer stop method. - */ -static int -decr_et_stop(struct eventtimer *et) -{ - struct decr_state *s = DPCPU_PTR(decr_state); -#ifdef BOOKE - uint32_t tcr; -#endif - - s->mode = 0; - s->div = 0x7fffffff; -#ifdef BOOKE - tcr = mfspr(SPR_TCR); - tcr &= ~(TCR_DIE | TCR_ARE); - mtspr(SPR_TCR, tcr); -#else - mtdec(s->div); -#endif - return (0); -} - -/* - * Timecounter get method. - */ -static unsigned -decr_get_timecount(struct timecounter *tc) -{ - return (mftb()); -} - -/* - * Wait for about n microseconds (at least!). - */ -void -DELAY(int n) -{ - volatile u_quad_t tb; - u_quad_t ttb; - - TSENTER(); - tb = mftb(); - ttb = tb + howmany((uint64_t)n * 1000000, ps_per_tick); - nop_prio_vlow(); - while (tb < ttb) - tb = mftb(); - nop_prio_medium(); - TSEXIT(); -} diff --git a/sys/powerpc/powerpc/copyinout.c b/sys/powerpc/powerpc/copyinout.c deleted file mode 100644 index 5df9db51fc8..00000000000 --- a/sys/powerpc/powerpc/copyinout.c +++ /dev/null @@ -1,662 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause AND BSD-4-Clause - * - * Copyright (C) 2002 Benno Rice - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -/*- - * Copyright (C) 1993 Wolfgang Solfrank. - * Copyright (C) 1993 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include - -/* - * On powerpc64 (AIM only) the copy functions are IFUNCs, selecting the best - * option based on the PMAP in use. - * - * There are two options for copy functions on powerpc64: - * - 'remap' copies, which remap userspace segments into kernel space for - * copying. This is used by the 'oea64' pmap. - * - 'direct' copies, which copy directly from userspace. This does not require - * remapping user segments into kernel. This is used by the 'radix' pmap for - * performance. - * - * Book-E does not use the C 'remap' functions, opting instead to use the - * 'direct' copies, directly, avoiding the IFUNC overhead. - * - * On 32-bit AIM these functions bypass the IFUNC machinery for performance. - */ -#ifdef __powerpc64__ -int subyte_remap(volatile void *addr, int byte); -int subyte_direct(volatile void *addr, int byte); -int copyinstr_remap(const void *udaddr, void *kaddr, size_t len, size_t *done); -int copyinstr_direct(const void *udaddr, void *kaddr, size_t len, size_t *done); -int copyout_remap(const void *kaddr, void *udaddr, size_t len); -int copyout_direct(const void *kaddr, void *udaddr, size_t len); -int copyin_remap(const void *uaddr, void *kaddr, size_t len); -int copyin_direct(const void *uaddr, void *kaddr, size_t len); -int suword16_remap(volatile void *addr, int word); -int suword16_direct(volatile void *addr, int word); -int suword32_remap(volatile void *addr, int word); -int suword32_direct(volatile void *addr, int word); -int suword_remap(volatile void *addr, long word); -int suword_direct(volatile void *addr, long word); -int suword64_remap(volatile void *addr, int64_t word); -int suword64_direct(volatile void *addr, int64_t word); -int fubyte_remap(volatile const void *addr); -int fubyte_direct(volatile const void *addr); -int fuword16_remap(volatile const void *addr); -int fuword16_direct(volatile const void *addr); -int fueword32_remap(volatile const void *addr, int32_t *val); -int fueword32_direct(volatile const void *addr, int32_t *val); -int fueword64_remap(volatile const void *addr, int64_t *val); -int fueword64_direct(volatile const void *addr, int64_t *val); -int fueword_remap(volatile const void *addr, long *val); -int fueword_direct(volatile const void *addr, long *val); -int casueword32_remap(volatile uint32_t *addr, uint32_t old, uint32_t *oldvalp, - uint32_t new); -int casueword32_direct(volatile uint32_t *addr, uint32_t old, uint32_t *oldvalp, - uint32_t new); -int casueword_remap(volatile u_long *addr, u_long old, u_long *oldvalp, - u_long new); -int casueword_direct(volatile u_long *addr, u_long old, u_long *oldvalp, - u_long new); - -/* - * The IFUNC resolver determines the copy based on whether the PMAP - * implementation includes a pmap_map_user_ptr function. - */ -#define DEFINE_COPY_FUNC(ret, func, args) \ - DEFINE_IFUNC(, ret, func, args) \ - { \ - return (PMAP_RESOLVE_FUNC(map_user_ptr) ? \ - func##_remap : func##_direct); \ - } -DEFINE_COPY_FUNC(int, subyte, (volatile void *, int)) -DEFINE_COPY_FUNC(int, copyinstr, (const void *, void *, size_t, size_t *)) -DEFINE_COPY_FUNC(int, copyin, (const void *, void *, size_t)) -DEFINE_COPY_FUNC(int, copyout, (const void *, void *, size_t)) -DEFINE_COPY_FUNC(int, suword, (volatile void *, long)) -DEFINE_COPY_FUNC(int, suword16, (volatile void *, int)) -DEFINE_COPY_FUNC(int, suword32, (volatile void *, int)) -DEFINE_COPY_FUNC(int, suword64, (volatile void *, int64_t)) -DEFINE_COPY_FUNC(int, fubyte, (volatile const void *)) -DEFINE_COPY_FUNC(int, fuword16, (volatile const void *)) -DEFINE_COPY_FUNC(int, fueword32, (volatile const void *, int32_t *)) -DEFINE_COPY_FUNC(int, fueword64, (volatile const void *, int64_t *)) -DEFINE_COPY_FUNC(int, fueword, (volatile const void *, long *)) -DEFINE_COPY_FUNC(int, casueword32, - (volatile uint32_t *, uint32_t, uint32_t *, uint32_t)) -DEFINE_COPY_FUNC(int, casueword, (volatile u_long *, u_long, u_long *, u_long)) - -#define REMAP(x) x##_remap -#else -#define REMAP(x) x -#endif - -int -REMAP(copyout)(const void *kaddr, void *udaddr, size_t len) -{ - struct thread *td; - pmap_t pm; - jmp_buf env; - const char *kp; - char *up, *p; - size_t l; - - td = curthread; - pm = &td->td_proc->p_vmspace->vm_pmap; - - td->td_pcb->pcb_onfault = &env; - if (setjmp(env)) { - td->td_pcb->pcb_onfault = NULL; - return (EFAULT); - } - - kp = kaddr; - up = udaddr; - - while (len > 0) { - if (pmap_map_user_ptr(pm, up, (void **)&p, len, &l)) { - td->td_pcb->pcb_onfault = NULL; - return (EFAULT); - } - - bcopy(kp, p, l); - - up += l; - kp += l; - len -= l; - } - - td->td_pcb->pcb_onfault = NULL; - return (0); -} - -int -REMAP(copyin)(const void *udaddr, void *kaddr, size_t len) -{ - struct thread *td; - pmap_t pm; - jmp_buf env; - const char *up; - char *kp, *p; - size_t l; - - td = curthread; - pm = &td->td_proc->p_vmspace->vm_pmap; - - td->td_pcb->pcb_onfault = &env; - if (setjmp(env)) { - td->td_pcb->pcb_onfault = NULL; - return (EFAULT); - } - - kp = kaddr; - up = udaddr; - - while (len > 0) { - if (pmap_map_user_ptr(pm, up, (void **)&p, len, &l)) { - td->td_pcb->pcb_onfault = NULL; - return (EFAULT); - } - - bcopy(p, kp, l); - - up += l; - kp += l; - len -= l; - } - - td->td_pcb->pcb_onfault = NULL; - return (0); -} - -int -REMAP(copyinstr)(const void *udaddr, void *kaddr, size_t len, size_t *done) -{ - struct thread *td; - pmap_t pm; - jmp_buf env; - const char *up; - char *kp, *p; - size_t i, l, t; - int rv; - - td = curthread; - pm = &td->td_proc->p_vmspace->vm_pmap; - - t = 0; - rv = ENAMETOOLONG; - - td->td_pcb->pcb_onfault = &env; - if (setjmp(env)) { - rv = EFAULT; - goto done; - } - - kp = kaddr; - up = udaddr; - - while (len > 0) { - if (pmap_map_user_ptr(pm, up, (void **)&p, len, &l)) { - rv = EFAULT; - goto done; - } - - for (i = 0; len > 0 && i < l; i++, t++, len--) { - if ((*kp++ = *p++) == 0) { - i++, t++; - rv = 0; - goto done; - } - } - - up += l; - } - -done: - td->td_pcb->pcb_onfault = NULL; - - if (done != NULL) { - *done = t; - } - - return (rv); -} - -int -REMAP(subyte)(volatile void *addr, int byte) -{ - struct thread *td; - pmap_t pm; - jmp_buf env; - char *p; - - td = curthread; - pm = &td->td_proc->p_vmspace->vm_pmap; - - td->td_pcb->pcb_onfault = &env; - if (setjmp(env)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - if (pmap_map_user_ptr(pm, addr, (void **)&p, sizeof(*p), NULL)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - *p = (char)byte; - - td->td_pcb->pcb_onfault = NULL; - return (0); -} - -int -REMAP(suword16)(volatile void *addr, int word) -{ - struct thread *td; - pmap_t pm; - jmp_buf env; - int16_t *p; - - td = curthread; - pm = &td->td_proc->p_vmspace->vm_pmap; - - td->td_pcb->pcb_onfault = &env; - if (setjmp(env)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - if (pmap_map_user_ptr(pm, addr, (void **)&p, sizeof(*p), NULL)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - *p = (int16_t)word; - - td->td_pcb->pcb_onfault = NULL; - return (0); -} - -#ifdef __powerpc64__ -int -REMAP(suword32)(volatile void *addr, int word) -{ - struct thread *td; - pmap_t pm; - jmp_buf env; - int *p; - - td = curthread; - pm = &td->td_proc->p_vmspace->vm_pmap; - - td->td_pcb->pcb_onfault = &env; - if (setjmp(env)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - if (pmap_map_user_ptr(pm, addr, (void **)&p, sizeof(*p), NULL)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - *p = word; - - td->td_pcb->pcb_onfault = NULL; - return (0); -} -#else -int -REMAP(suword32)(volatile void *addr, int32_t word) -{ -REMAP( return (suword)(addr, (long)word)); -} -#endif - -int -REMAP(suword)(volatile void *addr, long word) -{ - struct thread *td; - pmap_t pm; - jmp_buf env; - long *p; - - td = curthread; - pm = &td->td_proc->p_vmspace->vm_pmap; - - td->td_pcb->pcb_onfault = &env; - if (setjmp(env)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - if (pmap_map_user_ptr(pm, addr, (void **)&p, sizeof(*p), NULL)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - *p = word; - - td->td_pcb->pcb_onfault = NULL; - return (0); -} - -#ifdef __powerpc64__ -int -REMAP(suword64)(volatile void *addr, int64_t word) -{ - return (REMAP(suword)(addr, (long)word)); -} -#endif - -int -REMAP(fubyte)(volatile const void *addr) -{ - struct thread *td; - pmap_t pm; - jmp_buf env; - u_char *p; - int val; - - td = curthread; - pm = &td->td_proc->p_vmspace->vm_pmap; - - td->td_pcb->pcb_onfault = &env; - if (setjmp(env)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - if (pmap_map_user_ptr(pm, addr, (void **)&p, sizeof(*p), NULL)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - val = *p; - - td->td_pcb->pcb_onfault = NULL; - return (val); -} - -int -REMAP(fuword16)(volatile const void *addr) -{ - struct thread *td; - pmap_t pm; - jmp_buf env; - uint16_t *p, val; - - td = curthread; - pm = &td->td_proc->p_vmspace->vm_pmap; - - td->td_pcb->pcb_onfault = &env; - if (setjmp(env)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - if (pmap_map_user_ptr(pm, addr, (void **)&p, sizeof(*p), NULL)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - val = *p; - - td->td_pcb->pcb_onfault = NULL; - return (val); -} - -int -REMAP(fueword32)(volatile const void *addr, int32_t *val) -{ - struct thread *td; - pmap_t pm; - jmp_buf env; - int32_t *p; - - td = curthread; - pm = &td->td_proc->p_vmspace->vm_pmap; - - td->td_pcb->pcb_onfault = &env; - if (setjmp(env)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - if (pmap_map_user_ptr(pm, addr, (void **)&p, sizeof(*p), NULL)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - *val = *p; - - td->td_pcb->pcb_onfault = NULL; - return (0); -} - -#ifdef __powerpc64__ -int -REMAP(fueword64)(volatile const void *addr, int64_t *val) -{ - struct thread *td; - pmap_t pm; - jmp_buf env; - int64_t *p; - - td = curthread; - pm = &td->td_proc->p_vmspace->vm_pmap; - - td->td_pcb->pcb_onfault = &env; - if (setjmp(env)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - if (pmap_map_user_ptr(pm, addr, (void **)&p, sizeof(*p), NULL)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - *val = *p; - - td->td_pcb->pcb_onfault = NULL; - return (0); -} -#endif - -int -REMAP(fueword)(volatile const void *addr, long *val) -{ - struct thread *td; - pmap_t pm; - jmp_buf env; - long *p; - - td = curthread; - pm = &td->td_proc->p_vmspace->vm_pmap; - - td->td_pcb->pcb_onfault = &env; - if (setjmp(env)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - if (pmap_map_user_ptr(pm, addr, (void **)&p, sizeof(*p), NULL)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - *val = *p; - - td->td_pcb->pcb_onfault = NULL; - return (0); -} - -int -REMAP(casueword32)(volatile uint32_t *addr, uint32_t old, uint32_t *oldvalp, - uint32_t new) -{ - struct thread *td; - pmap_t pm; - jmp_buf env; - uint32_t *p, val; - int res; - - td = curthread; - pm = &td->td_proc->p_vmspace->vm_pmap; - - td->td_pcb->pcb_onfault = &env; - if (setjmp(env)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - if (pmap_map_user_ptr(pm, (void *)(uintptr_t)addr, (void **)&p, - sizeof(*p), NULL)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - res = 0; - __asm __volatile ( - "lwarx %0, 0, %3\n\t" /* load old value */ - "cmplw %4, %0\n\t" /* compare */ - "bne 1f\n\t" /* exit if not equal */ - "stwcx. %5, 0, %3\n\t" /* attempt to store */ - "bne- 2f\n\t" /* if failed */ - "b 3f\n\t" /* we've succeeded */ - "1:\n\t" - "stwcx. %0, 0, %3\n\t" /* clear reservation (74xx) */ - "2:li %2, 1\n\t" - "3:\n\t" - : "=&r" (val), "=m" (*p), "+&r" (res) - : "r" (p), "r" (old), "r" (new), "m" (*p) - : "cr0", "memory"); - - td->td_pcb->pcb_onfault = NULL; - - *oldvalp = val; - return (res); -} - -#ifndef __powerpc64__ -int -REMAP(casueword)(volatile u_long *addr, u_long old, u_long *oldvalp, u_long new) -{ - - return (casueword32((volatile uint32_t *)addr, old, - (uint32_t *)oldvalp, new)); -} -#else -int -REMAP(casueword)(volatile u_long *addr, u_long old, u_long *oldvalp, u_long new) -{ - struct thread *td; - pmap_t pm; - jmp_buf env; - u_long *p, val; - int res; - - td = curthread; - pm = &td->td_proc->p_vmspace->vm_pmap; - - td->td_pcb->pcb_onfault = &env; - if (setjmp(env)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - if (pmap_map_user_ptr(pm, (void *)(uintptr_t)addr, (void **)&p, - sizeof(*p), NULL)) { - td->td_pcb->pcb_onfault = NULL; - return (-1); - } - - res = 0; - __asm __volatile ( - "ldarx %0, 0, %3\n\t" /* load old value */ - "cmpld %4, %0\n\t" /* compare */ - "bne 1f\n\t" /* exit if not equal */ - "stdcx. %5, 0, %3\n\t" /* attempt to store */ - "bne- 2f\n\t" /* if failed */ - "b 3f\n\t" /* we've succeeded */ - "1:\n\t" - "stdcx. %0, 0, %3\n\t" /* clear reservation (74xx) */ - "2:li %2, 1\n\t" - "3:\n\t" - : "=&r" (val), "=m" (*p), "+&r" (res) - : "r" (p), "r" (old), "r" (new), "m" (*p) - : "cr0", "memory"); - - td->td_pcb->pcb_onfault = NULL; - - *oldvalp = val; - return (res); -} -#endif diff --git a/sys/powerpc/powerpc/cpu.c b/sys/powerpc/powerpc/cpu.c deleted file mode 100644 index d450044780a..00000000000 --- a/sys/powerpc/powerpc/cpu.c +++ /dev/null @@ -1,846 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause AND BSD-2-Clause - * - * Copyright (c) 2001 Matt Thomas. - * Copyright (c) 2001 Tsubai Masanari. - * Copyright (c) 1998, 1999, 2001 Internet Research Institute, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by - * Internet Research Institute, Inc. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*- - * Copyright (C) 2003 Benno Rice. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * from $NetBSD: cpu_subr.c,v 1.1 2003/02/03 17:10:09 matt Exp $ - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include - -static void cpu_6xx_setup(int cpuid, uint16_t vers); -static void cpu_970_setup(int cpuid, uint16_t vers); -static void cpu_booke_setup(int cpuid, uint16_t vers); -static void cpu_powerx_setup(int cpuid, uint16_t vers); - -int powerpc_pow_enabled; -void (*cpu_idle_hook)(sbintime_t) = NULL; -static void cpu_idle_60x(sbintime_t); -static void cpu_idle_booke(sbintime_t); -#ifdef BOOKE_E500 -static void cpu_idle_e500mc(sbintime_t sbt); -#endif -#if defined(__powerpc64__) && defined(AIM) -static void cpu_idle_powerx(sbintime_t); -static void cpu_idle_power9(sbintime_t); -#endif - -struct cputab { - const char *name; - uint16_t version; - uint16_t revfmt; - int features; /* Do not include PPC_FEATURE_32 or - * PPC_FEATURE_HAS_MMU */ - int features2; - void (*cpu_setup)(int cpuid, uint16_t vers); -}; -#define REVFMT_MAJMIN 1 /* %u.%u */ -#define REVFMT_HEX 2 /* 0x%04x */ -#define REVFMT_DEC 3 /* %u */ -static const struct cputab models[] = { - { "Motorola PowerPC 601", MPC601, REVFMT_DEC, - PPC_FEATURE_HAS_FPU | PPC_FEATURE_UNIFIED_CACHE, 0, cpu_6xx_setup }, - { "Motorola PowerPC 602", MPC602, REVFMT_DEC, - PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "Motorola PowerPC 603", MPC603, REVFMT_MAJMIN, - PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "Motorola PowerPC 603e", MPC603e, REVFMT_MAJMIN, - PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "Motorola PowerPC 603ev", MPC603ev, REVFMT_MAJMIN, - PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "Motorola PowerPC 604", MPC604, REVFMT_MAJMIN, - PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "Motorola PowerPC 604ev", MPC604ev, REVFMT_MAJMIN, - PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "Motorola PowerPC 620", MPC620, REVFMT_HEX, - PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU, 0, NULL }, - { "Motorola PowerPC 750", MPC750, REVFMT_MAJMIN, - PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "IBM PowerPC 750FX", IBM750FX, REVFMT_MAJMIN, - PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "IBM PowerPC 970", IBM970, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU, - 0, cpu_970_setup }, - { "IBM PowerPC 970FX", IBM970FX, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU, - 0, cpu_970_setup }, - { "IBM PowerPC 970GX", IBM970GX, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU, - 0, cpu_970_setup }, - { "IBM PowerPC 970MP", IBM970MP, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU, - 0, cpu_970_setup }, - { "IBM POWER4", IBMPOWER4, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU | PPC_FEATURE_POWER4, 0, NULL }, - { "IBM POWER4+", IBMPOWER4PLUS, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU | PPC_FEATURE_POWER4, 0, NULL }, - { "IBM POWER5", IBMPOWER5, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU | PPC_FEATURE_POWER4 | - PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP, 0, NULL }, - { "IBM POWER5+", IBMPOWER5PLUS, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU | PPC_FEATURE_POWER5_PLUS | - PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP, 0, NULL }, - { "IBM POWER6", IBMPOWER6, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU | - PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | PPC_FEATURE_ARCH_2_05 | - PPC_FEATURE_TRUE_LE, 0, NULL }, - { "IBM POWER7", IBMPOWER7, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU | - PPC_FEATURE_SMT | PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06 | - PPC_FEATURE_HAS_VSX | PPC_FEATURE_TRUE_LE, PPC_FEATURE2_DSCR, NULL }, - { "IBM POWER7+", IBMPOWER7PLUS, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU | - PPC_FEATURE_SMT | PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06 | - PPC_FEATURE_HAS_VSX, PPC_FEATURE2_DSCR, NULL }, - { "IBM POWER8E", IBMPOWER8E, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU | - PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | PPC_FEATURE_ARCH_2_05 | - PPC_FEATURE_ARCH_2_06 | PPC_FEATURE_HAS_VSX | PPC_FEATURE_TRUE_LE, - PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_DSCR | PPC_FEATURE2_ISEL | - PPC_FEATURE2_TAR | PPC_FEATURE2_HAS_VEC_CRYPTO, cpu_powerx_setup }, - { "IBM POWER8NVL", IBMPOWER8NVL, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU | - PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | PPC_FEATURE_ARCH_2_05 | - PPC_FEATURE_ARCH_2_06 | PPC_FEATURE_HAS_VSX | PPC_FEATURE_TRUE_LE, - PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_DSCR | PPC_FEATURE2_ISEL | - PPC_FEATURE2_TAR | PPC_FEATURE2_HAS_VEC_CRYPTO, cpu_powerx_setup }, - { "IBM POWER8", IBMPOWER8, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU | - PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | PPC_FEATURE_ARCH_2_05 | - PPC_FEATURE_ARCH_2_06 | PPC_FEATURE_HAS_VSX | PPC_FEATURE_TRUE_LE, - PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_DSCR | PPC_FEATURE2_ISEL | - PPC_FEATURE2_TAR | PPC_FEATURE2_HAS_VEC_CRYPTO, cpu_powerx_setup }, - { "IBM POWER9", IBMPOWER9, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU | - PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | PPC_FEATURE_ARCH_2_05 | - PPC_FEATURE_ARCH_2_06 | PPC_FEATURE_HAS_VSX | PPC_FEATURE_TRUE_LE, - PPC_FEATURE2_ARCH_2_07 | PPC_FEATURE2_DSCR | PPC_FEATURE2_EBB | - PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | PPC_FEATURE2_HAS_VEC_CRYPTO | - PPC_FEATURE2_ARCH_3_00 | PPC_FEATURE2_HAS_IEEE128 | - PPC_FEATURE2_DARN, cpu_powerx_setup }, - { "Motorola PowerPC 7400", MPC7400, REVFMT_MAJMIN, - PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "Motorola PowerPC 7410", MPC7410, REVFMT_MAJMIN, - PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "Motorola PowerPC 7450", MPC7450, REVFMT_MAJMIN, - PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "Motorola PowerPC 7455", MPC7455, REVFMT_MAJMIN, - PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "Motorola PowerPC 7457", MPC7457, REVFMT_MAJMIN, - PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "Motorola PowerPC 7447A", MPC7447A, REVFMT_MAJMIN, - PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "Motorola PowerPC 7448", MPC7448, REVFMT_MAJMIN, - PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "Motorola PowerPC 8240", MPC8240, REVFMT_MAJMIN, - PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "Motorola PowerPC 8245", MPC8245, REVFMT_MAJMIN, - PPC_FEATURE_HAS_FPU, 0, cpu_6xx_setup }, - { "Freescale e500v1 core", FSL_E500v1, REVFMT_MAJMIN, - PPC_FEATURE_HAS_SPE | PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_BOOKE, - PPC_FEATURE2_ISEL, cpu_booke_setup }, - { "Freescale e500v2 core", FSL_E500v2, REVFMT_MAJMIN, - PPC_FEATURE_HAS_SPE | PPC_FEATURE_BOOKE | - PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE, - PPC_FEATURE2_ISEL, cpu_booke_setup }, - { "Freescale e500mc core", FSL_E500mc, REVFMT_MAJMIN, - PPC_FEATURE_HAS_FPU | PPC_FEATURE_BOOKE | PPC_FEATURE_ARCH_2_05 | - PPC_FEATURE_ARCH_2_06, PPC_FEATURE2_ISEL, - cpu_booke_setup }, - { "Freescale e5500 core", FSL_E5500, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_FPU | PPC_FEATURE_BOOKE | - PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06, - PPC_FEATURE2_ISEL, cpu_booke_setup }, - { "Freescale e6500 core", FSL_E6500, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU | - PPC_FEATURE_BOOKE | PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06, - PPC_FEATURE2_ISEL, cpu_booke_setup }, - { "IBM Cell Broadband Engine", IBMCELLBE, REVFMT_MAJMIN, - PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC | PPC_FEATURE_HAS_FPU | - PPC_FEATURE_CELL | PPC_FEATURE_SMT, 0, NULL}, - { "Unknown PowerPC CPU", 0, REVFMT_HEX, 0, 0, NULL }, -}; - -static void cpu_6xx_print_cacheinfo(u_int, uint16_t); -static int cpu_feature_bit(SYSCTL_HANDLER_ARGS); - -static char model[64]; -SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD | CTLFLAG_CAPRD, model, 0, ""); - -static const struct cputab *cput; - -u_long cpu_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU; -u_long cpu_features2 = 0; -SYSCTL_OPAQUE(_hw, OID_AUTO, cpu_features, CTLFLAG_RD, - &cpu_features, sizeof(cpu_features), "LX", "PowerPC CPU features"); -SYSCTL_OPAQUE(_hw, OID_AUTO, cpu_features2, CTLFLAG_RD, - &cpu_features2, sizeof(cpu_features2), "LX", "PowerPC CPU features 2"); - -#ifdef __powerpc64__ -register_t lpcr = LPCR_LPES; -#endif - -/* Provide some user-friendly aliases for bits in cpu_features */ -SYSCTL_PROC(_hw, OID_AUTO, floatingpoint, - CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, 0, PPC_FEATURE_HAS_FPU, - cpu_feature_bit, "I", "Floating point instructions executed in hardware"); -SYSCTL_PROC(_hw, OID_AUTO, altivec, CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, - 0, PPC_FEATURE_HAS_ALTIVEC, cpu_feature_bit, "I", "CPU supports Altivec"); - -/* - * Phase 1 (early) CPU setup. Setup the cpu_features/cpu_features2 variables, - * so they can be used during platform and MMU bringup. - */ -void -cpu_feature_setup() -{ - u_int pvr; - uint16_t vers; - const struct cputab *cp; - - pvr = mfpvr(); - vers = pvr >> 16; - for (cp = models; cp->version != 0; cp++) { - if (cp->version == vers) - break; - } - - cput = cp; - cpu_features |= cp->features; - cpu_features2 |= cp->features2; -} - -void -cpu_setup(u_int cpuid) -{ - uint64_t cps; - const char *name; - u_int maj, min, pvr; - uint16_t rev, revfmt, vers; - - pvr = mfpvr(); - vers = pvr >> 16; - rev = pvr; - switch (vers) { - case MPC7410: - min = (pvr >> 0) & 0xff; - maj = min <= 4 ? 1 : 2; - break; - case FSL_E500v1: - case FSL_E500v2: - case FSL_E500mc: - case FSL_E5500: - maj = (pvr >> 4) & 0xf; - min = (pvr >> 0) & 0xf; - break; - default: - maj = (pvr >> 8) & 0xf; - min = (pvr >> 0) & 0xf; - } - - revfmt = cput->revfmt; - name = cput->name; - if (rev == MPC750 && pvr == 15) { - name = "Motorola MPC755"; - revfmt = REVFMT_HEX; - } - strncpy(model, name, sizeof(model) - 1); - - printf("cpu%d: %s revision ", cpuid, name); - - switch (revfmt) { - case REVFMT_MAJMIN: - printf("%u.%u", maj, min); - break; - case REVFMT_HEX: - printf("0x%04x", rev); - break; - case REVFMT_DEC: - printf("%u", rev); - break; - } - - if (cpu_est_clockrate(0, &cps) == 0) - printf(", %jd.%02jd MHz", cps / 1000000, (cps / 10000) % 100); - printf("\n"); - - printf("cpu%d: Features %b\n", cpuid, (int)cpu_features, - PPC_FEATURE_BITMASK); - if (cpu_features2 != 0) - printf("cpu%d: Features2 %b\n", cpuid, (int)cpu_features2, - PPC_FEATURE2_BITMASK); - - /* - * Configure CPU - */ - if (cput->cpu_setup != NULL) - cput->cpu_setup(cpuid, vers); -} - -/* Get current clock frequency for the given cpu id. */ -int -cpu_est_clockrate(int cpu_id, uint64_t *cps) -{ - uint16_t vers; - register_t msr; - phandle_t cpu, dev, root; - uint32_t freq32; - int res = 0; - char buf[8]; - - vers = mfpvr() >> 16; - msr = mfmsr(); - mtmsr(msr & ~PSL_EE); - - switch (vers) { - case MPC7450: - case MPC7455: - case MPC7457: - case MPC750: - case IBM750FX: - case MPC7400: - case MPC7410: - case MPC7447A: - case MPC7448: - mtspr(SPR_MMCR0_74XX, SPR_MMCR0_FC); - mtspr(SPR_PMC1_74XX, 0); - mtspr(SPR_MMCR0_74XX, - SPR_MMCR0_74XX_PMC1SEL(PMCN_CYCLES)); - DELAY(1000); - *cps = (mfspr(SPR_PMC1_74XX) * 1000) + 4999; - mtspr(SPR_MMCR0_74XX, SPR_MMCR0_FC); - - mtmsr(msr); - return (0); - case IBM970: - case IBM970FX: - case IBM970MP: - isync(); - mtspr(SPR_MMCR0, SPR_MMCR0_FC); - isync(); - mtspr(SPR_MMCR1, 0); - mtspr(SPR_MMCRA, 0); - mtspr(SPR_PMC1, 0); - mtspr(SPR_MMCR0, SPR_MMCR0_PMC1SEL(PMC970N_CYCLES)); - isync(); - DELAY(1000); - powerpc_sync(); - mtspr(SPR_MMCR0, SPR_MMCR0_FC); - *cps = (mfspr(SPR_PMC1) * 1000) + 4999; - - mtmsr(msr); - return (0); - - default: - root = OF_peer(0); - if (root == 0) - return (ENXIO); - - dev = OF_child(root); - while (dev != 0) { - res = OF_getprop(dev, "name", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "cpus") == 0) - break; - dev = OF_peer(dev); - } - cpu = OF_child(dev); - while (cpu != 0) { - res = OF_getprop(cpu, "device_type", buf, - sizeof(buf)); - if (res > 0 && strcmp(buf, "cpu") == 0) - break; - cpu = OF_peer(cpu); - } - if (cpu == 0) - return (ENOENT); - if (OF_getprop(cpu, "ibm,extended-clock-frequency", - cps, sizeof(*cps)) >= 0) { - *cps = be64toh(*cps); - return (0); - } else if (OF_getencprop(cpu, "clock-frequency", - &freq32, sizeof(freq32)) >= 0) { - *cps = freq32; - return (0); - } else { - return (ENOENT); - } - } -} - -void -cpu_6xx_setup(int cpuid, uint16_t vers) -{ - register_t hid0, pvr; - const char *bitmask; - - hid0 = mfspr(SPR_HID0); - pvr = mfpvr(); - - /* - * Configure power-saving mode. - */ - switch (vers) { - case MPC603: - case MPC603e: - case MPC603ev: - case MPC604ev: - case MPC750: - case IBM750FX: - case MPC7400: - case MPC7410: - case MPC8240: - case MPC8245: - /* Select DOZE mode. */ - hid0 &= ~(HID0_DOZE | HID0_NAP | HID0_SLEEP); - hid0 |= HID0_DOZE | HID0_DPM; - powerpc_pow_enabled = 1; - break; - - case MPC7448: - case MPC7447A: - case MPC7457: - case MPC7455: - case MPC7450: - /* Enable the 7450 branch caches */ - hid0 |= HID0_SGE | HID0_BTIC; - hid0 |= HID0_LRSTK | HID0_FOLD | HID0_BHT; - /* Disable BTIC on 7450 Rev 2.0 or earlier and on 7457 */ - if (((pvr >> 16) == MPC7450 && (pvr & 0xFFFF) <= 0x0200) - || (pvr >> 16) == MPC7457) - hid0 &= ~HID0_BTIC; - /* Select NAP mode. */ - hid0 &= ~(HID0_DOZE | HID0_NAP | HID0_SLEEP); - hid0 |= HID0_NAP | HID0_DPM; - powerpc_pow_enabled = 1; - break; - - default: - /* No power-saving mode is available. */ ; - } - - switch (vers) { - case IBM750FX: - case MPC750: - hid0 &= ~HID0_DBP; /* XXX correct? */ - hid0 |= HID0_EMCP | HID0_BTIC | HID0_SGE | HID0_BHT; - break; - - case MPC7400: - case MPC7410: - hid0 &= ~HID0_SPD; - hid0 |= HID0_EMCP | HID0_BTIC | HID0_SGE | HID0_BHT; - hid0 |= HID0_EIEC; - break; - } - - mtspr(SPR_HID0, hid0); - - if (bootverbose) - cpu_6xx_print_cacheinfo(cpuid, vers); - - switch (vers) { - case MPC7447A: - case MPC7448: - case MPC7450: - case MPC7455: - case MPC7457: - bitmask = HID0_7450_BITMASK; - break; - default: - bitmask = HID0_BITMASK; - break; - } - - printf("cpu%d: HID0 %b\n", cpuid, (int)hid0, bitmask); - - if (cpu_idle_hook == NULL) - cpu_idle_hook = cpu_idle_60x; -} - -static void -cpu_6xx_print_cacheinfo(u_int cpuid, uint16_t vers) -{ - register_t hid; - - hid = mfspr(SPR_HID0); - printf("cpu%u: ", cpuid); - printf("L1 I-cache %sabled, ", (hid & HID0_ICE) ? "en" : "dis"); - printf("L1 D-cache %sabled\n", (hid & HID0_DCE) ? "en" : "dis"); - - printf("cpu%u: ", cpuid); - if (mfspr(SPR_L2CR) & L2CR_L2E) { - switch (vers) { - case MPC7450: - case MPC7455: - case MPC7457: - printf("256KB L2 cache, "); - if (mfspr(SPR_L3CR) & L3CR_L3E) - printf("%cMB L3 backside cache", - mfspr(SPR_L3CR) & L3CR_L3SIZ ? '2' : '1'); - else - printf("L3 cache disabled"); - printf("\n"); - break; - case IBM750FX: - printf("512KB L2 cache\n"); - break; - default: - switch (mfspr(SPR_L2CR) & L2CR_L2SIZ) { - case L2SIZ_256K: - printf("256KB "); - break; - case L2SIZ_512K: - printf("512KB "); - break; - case L2SIZ_1M: - printf("1MB "); - break; - } - printf("write-%s", (mfspr(SPR_L2CR) & L2CR_L2WT) - ? "through" : "back"); - if (mfspr(SPR_L2CR) & L2CR_L2PE) - printf(", with parity"); - printf(" backside cache\n"); - break; - } - } else - printf("L2 cache disabled\n"); -} - -static void -cpu_booke_setup(int cpuid, uint16_t vers) -{ -#ifdef BOOKE_E500 - register_t hid0; - const char *bitmask; - - hid0 = mfspr(SPR_HID0); - - switch (vers) { - case FSL_E500mc: - bitmask = HID0_E500MC_BITMASK; - cpu_idle_hook = cpu_idle_e500mc; - break; - case FSL_E5500: - case FSL_E6500: - bitmask = HID0_E5500_BITMASK; - cpu_idle_hook = cpu_idle_e500mc; - break; - case FSL_E500v1: - case FSL_E500v2: - /* Only e500v1/v2 support HID0 power management setup. */ - - /* Program power-management mode. */ - hid0 &= ~(HID0_DOZE | HID0_NAP | HID0_SLEEP); - hid0 |= HID0_DOZE; - - mtspr(SPR_HID0, hid0); - default: - bitmask = HID0_E500_BITMASK; - break; - } - printf("cpu%d: HID0 %b\n", cpuid, (int)hid0, bitmask); -#endif - - if (cpu_idle_hook == NULL) - cpu_idle_hook = cpu_idle_booke; -} - -static void -cpu_970_setup(int cpuid, uint16_t vers) -{ -#ifdef AIM - uint32_t hid0_hi, hid0_lo; - - __asm __volatile ("mfspr %0,%2; clrldi %1,%0,32; srdi %0,%0,32;" - : "=r" (hid0_hi), "=r" (hid0_lo) : "K" (SPR_HID0)); - - /* Configure power-saving mode */ - switch (vers) { - case IBM970MP: - hid0_hi |= (HID0_DEEPNAP | HID0_NAP | HID0_DPM); - hid0_hi &= ~HID0_DOZE; - break; - default: - hid0_hi |= (HID0_NAP | HID0_DPM); - hid0_hi &= ~(HID0_DOZE | HID0_DEEPNAP); - break; - } - powerpc_pow_enabled = 1; - - __asm __volatile (" \ - sync; isync; \ - sldi %0,%0,32; or %0,%0,%1; \ - mtspr %2, %0; \ - mfspr %0, %2; mfspr %0, %2; mfspr %0, %2; \ - mfspr %0, %2; mfspr %0, %2; mfspr %0, %2; \ - sync; isync" - :: "r" (hid0_hi), "r"(hid0_lo), "K" (SPR_HID0)); - - __asm __volatile ("mfspr %0,%1; srdi %0,%0,32;" - : "=r" (hid0_hi) : "K" (SPR_HID0)); - printf("cpu%d: HID0 %b\n", cpuid, (int)(hid0_hi), HID0_970_BITMASK); -#endif - - cpu_idle_hook = cpu_idle_60x; -} - -static void -cpu_powerx_setup(int cpuid, uint16_t vers) -{ - -#if defined(__powerpc64__) && defined(AIM) - if ((mfmsr() & PSL_HV) == 0) - return; - - /* Nuke the FSCR, to disable all facilities. */ - mtspr(SPR_FSCR, 0); - - /* Configure power-saving */ - switch (vers) { - case IBMPOWER8: - case IBMPOWER8E: - case IBMPOWER8NVL: - cpu_idle_hook = cpu_idle_powerx; - mtspr(SPR_LPCR, mfspr(SPR_LPCR) | LPCR_PECE_WAKESET); - isync(); - break; - case IBMPOWER9: - cpu_idle_hook = cpu_idle_power9; - mtspr(SPR_LPCR, mfspr(SPR_LPCR) | LPCR_PECE_WAKESET); - isync(); - break; - default: - return; - } - -#endif -} - -static int -cpu_feature_bit(SYSCTL_HANDLER_ARGS) -{ - int result; - - result = (cpu_features & arg2) ? 1 : 0; - - return (sysctl_handle_int(oidp, &result, 0, req)); -} - -void -cpu_idle(int busy) -{ - sbintime_t sbt = -1; - -#ifdef INVARIANTS - if ((mfmsr() & PSL_EE) != PSL_EE) { - struct thread *td = curthread; - printf("td msr %#lx\n", (u_long)td->td_md.md_saved_msr); - panic("ints disabled in idleproc!"); - } -#endif - - CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", - busy, curcpu); - - if (cpu_idle_hook != NULL) { - if (!busy) { - critical_enter(); - sbt = cpu_idleclock(); - } - cpu_idle_hook(sbt); - if (!busy) { - cpu_activeclock(); - critical_exit(); - } - } - - CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", - busy, curcpu); -} - -static void -cpu_idle_60x(sbintime_t sbt) -{ - register_t msr; - uint16_t vers; - - if (!powerpc_pow_enabled) - return; - - msr = mfmsr(); - vers = mfpvr() >> 16; - -#ifdef AIM - switch (vers) { - case IBM970: - case IBM970FX: - case IBM970MP: - case MPC7447A: - case MPC7448: - case MPC7450: - case MPC7455: - case MPC7457: - /* 0x7e00066c: dssall */ - __asm __volatile("\ - .long 0x7e00066c; sync; mtmsr %0; isync" - :: "r"(msr | PSL_POW)); - break; - default: - powerpc_sync(); - mtmsr(msr | PSL_POW); - break; - } -#endif -} - -#ifdef BOOKE_E500 -static void -cpu_idle_e500mc(sbintime_t sbt) -{ - /* - * Base binutils doesn't know what the 'wait' instruction is, so - * use the opcode encoding here. - */ - __asm __volatile(".long 0x7c00007c"); -} -#endif - -static void -cpu_idle_booke(sbintime_t sbt) -{ - register_t msr; - - msr = mfmsr(); - -#ifdef BOOKE_E500 - powerpc_sync(); - mtmsr(msr | PSL_WE); -#endif -} - -#if defined(__powerpc64__) && defined(AIM) -static void -cpu_idle_powerx(sbintime_t sbt) -{ - /* Sleeping when running on one cpu gives no advantages - avoid it */ - if (smp_started == 0) - return; - - spinlock_enter(); - if (sched_runnable()) { - spinlock_exit(); - return; - } - - if (can_wakeup == 0) - can_wakeup = 1; - mb(); - - enter_idle_powerx(); - spinlock_exit(); -} - -static void -cpu_idle_power9(sbintime_t sbt) -{ - register_t msr; - - msr = mfmsr(); - - /* Suspend external interrupts until stop instruction completes. */ - mtmsr(msr & ~PSL_EE); - /* Set the stop state to lowest latency, wake up to next instruction */ - /* Set maximum transition level to 2, for deepest lossless sleep. */ - mtspr(SPR_PSSCR, (2 << PSSCR_MTL_S) | (0 << PSSCR_RL_S)); - /* "stop" instruction (PowerISA 3.0) */ - __asm __volatile (".long 0x4c0002e4"); - /* - * Re-enable external interrupts to capture the interrupt that caused - * the wake up. - */ - mtmsr(msr); - -} -#endif - -int -cpu_idle_wakeup(int cpu) -{ - - return (0); -} diff --git a/sys/powerpc/powerpc/cpu_subr64.S b/sys/powerpc/powerpc/cpu_subr64.S deleted file mode 100644 index 41949da22d2..00000000000 --- a/sys/powerpc/powerpc/cpu_subr64.S +++ /dev/null @@ -1,97 +0,0 @@ -/*- - * Copyright (c) 2017-2018 QCM Technologies. - * Copyright (c) 2017-2018 Semihalf. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include "assym.inc" - -#include - - .p2align 3 -ENTRY(enter_idle_powerx) - mfsprg0 %r3 /* Get the pcpu pointer */ - ld %r3,PC_CURTHREAD(%r3) /* Get current thread */ - ld %r3,TD_PCB(%r3) /* Get PCB of current thread */ - std %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs. */ - std %r13,PCB_CONTEXT+1*8(%r3) - std %r14,PCB_CONTEXT+2*8(%r3) - std %r15,PCB_CONTEXT+3*8(%r3) - std %r16,PCB_CONTEXT+4*8(%r3) - std %r17,PCB_CONTEXT+5*8(%r3) - std %r18,PCB_CONTEXT+6*8(%r3) - std %r19,PCB_CONTEXT+7*8(%r3) - std %r20,PCB_CONTEXT+8*8(%r3) - std %r21,PCB_CONTEXT+9*8(%r3) - std %r22,PCB_CONTEXT+10*8(%r3) - std %r23,PCB_CONTEXT+11*8(%r3) - std %r24,PCB_CONTEXT+12*8(%r3) - std %r25,PCB_CONTEXT+13*8(%r3) - std %r26,PCB_CONTEXT+14*8(%r3) - std %r27,PCB_CONTEXT+15*8(%r3) - std %r28,PCB_CONTEXT+16*8(%r3) - std %r29,PCB_CONTEXT+17*8(%r3) - std %r30,PCB_CONTEXT+18*8(%r3) - std %r31,PCB_CONTEXT+19*8(%r3) - - mfcr %r16 /* Save the condition register */ - std %r16,PCB_CR(%r3) - mflr %r16 /* Save the link register */ - std %r16,PCB_LR(%r3) - std %r1,PCB_SP(%r3) /* Save the stack pointer */ - std %r2,PCB_TOC(%r3) /* Save the TOC pointer */ - - bl 1f -1: mflr %r3 - addi %r3,%r3,power_save_sequence-1b - mtsrr0 %r3 - - /* Set MSR */ - li %r3,0 -#ifdef __LITTLE_ENDIAN__ - ori %r3,%r3,(PSL_ME | PSL_RI | PSL_LE) -#else - ori %r3,%r3,(PSL_ME | PSL_RI) -#endif - li %r8,0x9 /* PSL_SF and PSL_HV */ - insrdi %r3,%r8,4,0 - mtsrr1 %r3 - - rfid - - .p2align 2 -power_save_sequence: - bl 1f - .llong 0x0 /* Playground for power-save sequence */ -1: mflr %r3 - - /* Start power-save sequence */ - std %r2,0(%r3) - ptesync - ld %r2,0(%r3) -2: cmpd %r2,%r2 - bne 2b - nap - b . -END(enter_idle_powerx) diff --git a/sys/powerpc/powerpc/db_disasm.c b/sys/powerpc/powerpc/db_disasm.c deleted file mode 100644 index 31f0b93f28b..00000000000 --- a/sys/powerpc/powerpc/db_disasm.c +++ /dev/null @@ -1,1078 +0,0 @@ -/* $NetBSD: db_disasm.c,v 1.28 2013/07/04 23:00:23 joerg Exp $ */ -/* $OpenBSD: db_disasm.c,v 1.2 1996/12/28 06:21:48 rahnds Exp $ */ - -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include - -enum function_mask { - Op_A = 0x00000001, - Op_B = 0x00000002, - Op_BI = 0x00000004, - Op_BO = 0x00000008, - Op_BC = Op_BI | Op_BO, - Op_CRM = 0x00000010, - Op_D = 0x00000020, - Op_ST = 0x00000020, /* Op_S for store-operations, same as D */ - Op_S = 0x00000040, /* S-field is swapped with A-field */ - Op_FM = Op_D | Op_S, /* kludge (reduce Op_s) */ - Op_dA = 0x00000080, - Op_LK = 0x00000100, - Op_Rc = 0x00000200, - Op_AA = Op_LK | Op_Rc, /* kludge (reduce Op_s) */ - Op_LKM = Op_AA, - Op_RcM = Op_AA, - Op_OE = 0x00000400, - Op_SR = 0x00000800, - Op_TO = 0x00001000, - Op_sign = 0x00002000, - Op_const = 0x00004000, - Op_SIMM = Op_const | Op_sign, - Op_UIMM = Op_const, - Op_crbA = 0x00008000, - Op_crbB = 0x00010000, - Op_WS = Op_crbB, /* kludge, same field as crbB */ - Op_rSH = Op_crbB, /* kludge, same field as crbB */ - Op_crbD = 0x00020000, - Op_crfD = 0x00040000, - Op_crfS = 0x00080000, - Op_ds = 0x00100000, - Op_me = 0x00200000, - Op_spr = 0x00400000, - Op_dcr = Op_spr, /* out of bits - cheat with Op_spr */ - Op_tbr = 0x00800000, - - Op_BP = 0x01000000, - Op_BD = 0x02000000, - Op_LI = 0x04000000, - Op_C = 0x08000000, - - Op_NB = 0x10000000, - - Op_sh_mb_sh = 0x20000000, - Op_sh = 0x40000000, - Op_SH = Op_sh | Op_sh_mb_sh, - Op_mb = 0x80000000, - Op_MB = Op_mb | Op_sh_mb_sh, - Op_ME = Op_MB, - -}; - -struct opcode { - const char *name; - u_int32_t mask; - u_int32_t code; - enum function_mask func; -}; - -typedef u_int32_t instr_t; -typedef void (op_class_func) (instr_t, vm_offset_t); - -u_int32_t extract_field(u_int32_t value, u_int32_t base, u_int32_t width); -void disasm_fields(const struct opcode *popcode, instr_t instr, vm_offset_t loc, - char *disasm_str, size_t slen); -void dis_ppc(const struct opcode *opcodeset, instr_t instr, vm_offset_t loc); - -op_class_func op_ill, op_base; -op_class_func op_cl_x13, op_cl_x1e, op_cl_x1f; -op_class_func op_cl_x3a, op_cl_x3b; -op_class_func op_cl_x3e, op_cl_x3f; - -op_class_func *opcodes_base[] = { -/*x00*/ op_ill, op_ill, op_base, op_ill, -/*x04*/ op_ill, op_ill, op_ill, op_base, -/*x08*/ op_base, op_base, op_base, op_base, -/*x0C*/ op_base, op_base, op_base/*XXX*/, op_base/*XXX*/, -/*x10*/ op_base, op_base, op_base, op_cl_x13, -/*x14*/ op_base, op_base, op_ill, op_base, -/*x18*/ op_base, op_base, op_base, op_base, -/*x1C*/ op_base, op_base, op_cl_x1e, op_cl_x1f, -/*x20*/ op_base, op_base, op_base, op_base, -/*x24*/ op_base, op_base, op_base, op_base, -/*x28*/ op_base, op_base, op_base, op_base, -/*x2C*/ op_base, op_base, op_base, op_base, -/*x30*/ op_base, op_base, op_base, op_base, -/*x34*/ op_base, op_base, op_base, op_base, -/*x38*/ op_ill, op_ill, op_cl_x3a, op_cl_x3b, -/*x3C*/ op_ill, op_ill, op_cl_x3e, op_cl_x3f -}; - -/* This table could be modified to make significant the "reserved" fields - * of the opcodes, But I didn't feel like it when typing in the table, - * I would recommend that this table be looked over for errors, - * This was derived from the table in Appendix A.2 of (Mot part # MPCFPE/AD) - * PowerPC Microprocessor Family: The Programming Environments - */ - -const struct opcode opcodes[] = { - { "tdi", 0xfc000000, 0x08000000, Op_TO | Op_A | Op_SIMM }, - { "twi", 0xfc000000, 0x0c000000, Op_TO | Op_A | Op_SIMM }, - { "mulli", 0xfc000000, 0x1c000000, Op_D | Op_A | Op_SIMM }, - { "subfic", 0xfc000000, 0x20000000, Op_D | Op_A | Op_SIMM }, - { "cmplwi", 0xfc200000, 0x28000000, Op_crfD | Op_A | Op_SIMM }, - { "cmpldi", 0xfc200000, 0x28200000, Op_crfD | Op_A | Op_SIMM }, - { "cmpwi", 0xfc200000, 0x2c000000, Op_crfD | Op_A | Op_SIMM }, - { "cmpdi", 0xfc200000, 0x2c200000, Op_crfD | Op_A | Op_SIMM }, - { "addic", 0xfc000000, 0x30000000, Op_D | Op_A | Op_SIMM }, - { "addic.", 0xfc000000, 0x34000000, Op_D | Op_A | Op_SIMM }, - { "addi", 0xfc000000, 0x38000000, Op_D | Op_A | Op_SIMM }, - { "addis", 0xfc000000, 0x3c000000, Op_D | Op_A | Op_SIMM }, - { "b", 0xfc000000, 0x40000000, Op_BC | Op_BD | Op_AA | Op_LK }, /* bc */ - { "sc", 0xffffffff, 0x44000002, 0 }, - { "b", 0xfc000000, 0x48000000, Op_LI | Op_AA | Op_LK }, - - { "rlwimi", 0xfc000000, 0x50000000, Op_S | Op_A | Op_SH | Op_MB | Op_ME | Op_Rc }, - { "rlwinm", 0xfc000000, 0x54000000, Op_S | Op_A | Op_SH | Op_MB | Op_ME | Op_Rc }, - { "rlwnm", 0xfc000000, 0x5c000000, Op_S | Op_A | Op_SH | Op_MB | Op_ME | Op_Rc }, - - { "ori", 0xfc000000, 0x60000000, Op_S | Op_A | Op_UIMM }, - { "oris", 0xfc000000, 0x64000000, Op_S | Op_A | Op_UIMM }, - { "xori", 0xfc000000, 0x68000000, Op_S | Op_A | Op_UIMM }, - { "xoris", 0xfc000000, 0x6c000000, Op_S | Op_A | Op_UIMM }, - - { "andi.", 0xfc000000, 0x70000000, Op_S | Op_A | Op_UIMM }, - { "andis.", 0xfc000000, 0x74000000, Op_S | Op_A | Op_UIMM }, - - { "lwz", 0xfc000000, 0x80000000, Op_D | Op_dA }, - { "lwzu", 0xfc000000, 0x84000000, Op_D | Op_dA }, - { "lbz", 0xfc000000, 0x88000000, Op_D | Op_dA }, - { "lbzu", 0xfc000000, 0x8c000000, Op_D | Op_dA }, - { "stw", 0xfc000000, 0x90000000, Op_ST | Op_dA }, - { "stwu", 0xfc000000, 0x94000000, Op_ST | Op_dA }, - { "stb", 0xfc000000, 0x98000000, Op_ST | Op_dA }, - { "stbu", 0xfc000000, 0x9c000000, Op_ST | Op_dA }, - - { "lhz", 0xfc000000, 0xa0000000, Op_D | Op_dA }, - { "lhzu", 0xfc000000, 0xa4000000, Op_D | Op_dA }, - { "lha", 0xfc000000, 0xa8000000, Op_D | Op_dA }, - { "lhau", 0xfc000000, 0xac000000, Op_D | Op_dA }, - { "sth", 0xfc000000, 0xb0000000, Op_ST | Op_dA }, - { "sthu", 0xfc000000, 0xb4000000, Op_ST | Op_dA }, - { "lmw", 0xfc000000, 0xb8000000, Op_D | Op_dA }, - { "stmw", 0xfc000000, 0xbc000000, Op_ST | Op_dA }, - - { "lfs", 0xfc000000, 0xc0000000, Op_D | Op_dA }, - { "lfsu", 0xfc000000, 0xc4000000, Op_D | Op_dA }, - { "lfd", 0xfc000000, 0xc8000000, Op_D | Op_dA }, - { "lfdu", 0xfc000000, 0xcc000000, Op_D | Op_dA }, - - { "stfs", 0xfc000000, 0xd0000000, Op_ST | Op_dA }, - { "stfsu", 0xfc000000, 0xd4000000, Op_ST | Op_dA }, - { "stfd", 0xfc000000, 0xd8000000, Op_ST | Op_dA }, - { "stfdu", 0xfc000000, 0xdc000000, Op_ST | Op_dA }, - { "", 0x0, 0x0, 0 } - -}; -/* 13 * 4 = 4c */ -const struct opcode opcodes_13[] = { -/* 0x13 << 2 */ - { "mcrf", 0xfc0007fe, 0x4c000000, Op_crfD | Op_crfS }, - { "b", 0xfc0007fe, 0x4c000020, Op_BC | Op_LK }, /* bclr */ - { "crnor", 0xfc0007fe, 0x4c000042, Op_crbD | Op_crbA | Op_crbB }, - { "rfi", 0xfc0007fe, 0x4c000064, 0 }, - { "crandc", 0xfc0007fe, 0x4c000102, Op_crbD | Op_crbA | Op_crbB }, - { "isync", 0xfc0007fe, 0x4c00012c, 0 }, - { "crxor", 0xfc0007fe, 0x4c000182, Op_crbD | Op_crbA | Op_crbB }, - { "crnand", 0xfc0007fe, 0x4c0001c2, Op_crbD | Op_crbA | Op_crbB }, - { "crand", 0xfc0007fe, 0x4c000202, Op_crbD | Op_crbA | Op_crbB }, - { "creqv", 0xfc0007fe, 0x4c000242, Op_crbD | Op_crbA | Op_crbB }, - { "crorc", 0xfc0007fe, 0x4c000342, Op_crbD | Op_crbA | Op_crbB }, - { "cror", 0xfc0007fe, 0x4c000382, Op_crbD | Op_crbA | Op_crbB }, - { "b", 0xfc0007fe, 0x4c000420, Op_BC | Op_LK }, /* bcctr */ - { "", 0x0, 0x0, 0 } -}; - -/* 1e * 4 = 78 */ -const struct opcode opcodes_1e[] = { - { "rldicl", 0xfc00001c, 0x78000000, Op_S | Op_A | Op_sh | Op_mb | Op_Rc }, - { "rldicr", 0xfc00001c, 0x78000004, Op_S | Op_A | Op_sh | Op_me | Op_Rc }, - { "rldic", 0xfc00001c, 0x78000008, Op_S | Op_A | Op_sh | Op_mb | Op_Rc }, - { "rldimi", 0xfc00001c, 0x7800000c, Op_S | Op_A | Op_sh | Op_mb | Op_Rc }, - { "rldcl", 0xfc00003e, 0x78000010, Op_S | Op_A | Op_B | Op_mb | Op_Rc }, - { "rldcr", 0xfc00003e, 0x78000012, Op_S | Op_A | Op_B | Op_me | Op_Rc }, - { "", 0x0, 0x0, 0 } -}; - -/* 1f * 4 = 7c */ -const struct opcode opcodes_1f[] = { -/* 1f << 2 */ - { "cmpw", 0xfc2007fe, 0x7c000000, Op_crfD | Op_A | Op_B }, - { "cmpd", 0xfc2007fe, 0x7c200000, Op_crfD | Op_A | Op_B }, - { "tw", 0xfc0007fe, 0x7c000008, Op_TO | Op_A | Op_B }, - { "subfc", 0xfc0003fe, 0x7c000010, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, - { "mulhdu", 0xfc0007fe, 0x7c000012, Op_D | Op_A | Op_B | Op_Rc }, - { "addc", 0xfc0003fe, 0x7c000014, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, - { "mulhwu", 0xfc0007fe, 0x7c000016, Op_D | Op_A | Op_B | Op_Rc }, - { "isellt", 0xfc0007ff, 0x7c00001e, Op_D | Op_A | Op_B }, - { "iselgt", 0xfc0007ff, 0x7c00005e, Op_D | Op_A | Op_B }, - { "iseleq", 0xfc0007ff, 0x7c00009e, Op_D | Op_A | Op_B }, - - { "mfcr", 0xfc0007fe, 0x7c000026, Op_D }, - { "lwarx", 0xfc0007fe, 0x7c000028, Op_D | Op_A | Op_B }, - { "ldx", 0xfc0007fe, 0x7c00002a, Op_D | Op_A | Op_B }, - { "lwzx", 0xfc0007fe, 0x7c00002e, Op_D | Op_A | Op_B }, - { "slw", 0xfc0007fe, 0x7c000030, Op_D | Op_A | Op_B | Op_Rc }, - { "cntlzw", 0xfc0007fe, 0x7c000034, Op_S | Op_A | Op_Rc }, - { "sld", 0xfc0007fe, 0x7c000036, Op_D | Op_A | Op_B | Op_Rc }, - { "and", 0xfc0007fe, 0x7c000038, Op_D | Op_A | Op_B | Op_Rc }, - { "cmplw", 0xfc2007fe, 0x7c000040, Op_crfD | Op_A | Op_B }, - { "cmpld", 0xfc2007fe, 0x7c200040, Op_crfD | Op_A | Op_B }, - { "subf", 0xfc0003fe, 0x7c000050, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, - { "ldux", 0xfc0007fe, 0x7c00006a, Op_D | Op_A | Op_B }, - { "dcbst", 0xfc0007fe, 0x7c00006c, Op_A | Op_B }, - { "lwzux", 0xfc0007fe, 0x7c00006e, Op_D | Op_A | Op_B }, - { "cntlzd", 0xfc0007fe, 0x7c000074, Op_S | Op_A | Op_Rc }, - { "andc", 0xfc0007fe, 0x7c000078, Op_S | Op_A | Op_B | Op_Rc }, - { "td", 0xfc0007fe, 0x7c000088, Op_TO | Op_A | Op_B }, - { "mulhd", 0xfc0007fe, 0x7c000092, Op_D | Op_A | Op_B | Op_Rc }, - { "mulhw", 0xfc0007fe, 0x7c000096, Op_D | Op_A | Op_B | Op_Rc }, - { "mfmsr", 0xfc0007fe, 0x7c0000a6, Op_D }, - { "ldarx", 0xfc0007fe, 0x7c0000a8, Op_D | Op_A | Op_B }, - { "dcbf", 0xfc0007fe, 0x7c0000ac, Op_A | Op_B }, - { "lbzx", 0xfc0007fe, 0x7c0000ae, Op_D | Op_A | Op_B }, - { "neg", 0xfc0003fe, 0x7c0000d0, Op_D | Op_A | Op_OE | Op_Rc }, - { "lbzux", 0xfc0007fe, 0x7c0000ee, Op_D | Op_A | Op_B }, - { "nor", 0xfc0007fe, 0x7c0000f8, Op_S | Op_A | Op_B | Op_Rc }, - { "wrtee", 0xfc0003ff, 0x7c000106, Op_S }, - { "subfe", 0xfc0003fe, 0x7c000110, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, - { "adde", 0xfc0003fe, 0x7c000114, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, - { "mtcrf", 0xfc0007fe, 0x7c000120, Op_S | Op_CRM }, - { "mtmsr", 0xfc0007fe, 0x7c000124, Op_S }, - { "stdx", 0xfc0007fe, 0x7c00012a, Op_ST | Op_A | Op_B }, - { "stwcx.", 0xfc0007ff, 0x7c00012d, Op_ST | Op_A | Op_B }, - { "stwx", 0xfc0007fe, 0x7c00012e, Op_ST | Op_A | Op_B }, - { "wrteei", 0xfc0003fe, 0x7c000146, 0 }, /* XXX: out of flags! */ - { "stdux", 0xfc0007fe, 0x7c00016a, Op_ST | Op_A | Op_B }, - { "stwux", 0xfc0007fe, 0x7c00016e, Op_ST | Op_A | Op_B }, - { "subfze", 0xfc0003fe, 0x7c000190, Op_D | Op_A | Op_OE | Op_Rc }, - { "addze", 0xfc0003fe, 0x7c000194, Op_D | Op_A | Op_OE | Op_Rc }, - { "mtsr", 0xfc0007fe, 0x7c0001a4, Op_S | Op_SR }, - { "stdcx.", 0xfc0007ff, 0x7c0001ad, Op_ST | Op_A | Op_B }, - { "stbx", 0xfc0007fe, 0x7c0001ae, Op_ST | Op_A | Op_B }, - { "subfme", 0xfc0003fe, 0x7c0001d0, Op_D | Op_A | Op_OE | Op_Rc }, - { "mulld", 0xfc0003fe, 0x7c0001d2, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, - { "addme", 0xfc0003fe, 0x7c0001d4, Op_D | Op_A | Op_OE | Op_Rc }, - { "mullw", 0xfc0003fe, 0x7c0001d6, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, - { "mtsrin", 0xfc0007fe, 0x7c0001e4, Op_S | Op_B }, - { "dcbtst", 0xfc0007fe, 0x7c0001ec, Op_A | Op_B }, - { "stbux", 0xfc0007fe, 0x7c0001ee, Op_ST | Op_A | Op_B }, - { "add", 0xfc0003fe, 0x7c000214, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, - { "dcbt", 0xfc0007fe, 0x7c00022c, Op_A | Op_B }, - { "lhzx", 0xfc0007ff, 0x7c00022e, Op_D | Op_A | Op_B }, - { "eqv", 0xfc0007fe, 0x7c000238, Op_S | Op_A | Op_B | Op_Rc }, - { "tlbie", 0xfc0007fe, 0x7c000264, Op_B }, - { "eciwx", 0xfc0007fe, 0x7c00026c, Op_D | Op_A | Op_B }, - { "lhzux", 0xfc0007fe, 0x7c00026e, Op_D | Op_A | Op_B }, - { "xor", 0xfc0007fe, 0x7c000278, Op_S | Op_A | Op_B | Op_Rc }, - { "mfdcr", 0xfc0007fe, 0x7c000286, Op_D | Op_dcr }, - { "mfspr", 0xfc0007fe, 0x7c0002a6, Op_D | Op_spr }, - { "lwax", 0xfc0007fe, 0x7c0002aa, Op_D | Op_A | Op_B }, - { "lhax", 0xfc0007fe, 0x7c0002ae, Op_D | Op_A | Op_B }, - { "tlbia", 0xfc0007fe, 0x7c0002e4, 0 }, - { "mftb", 0xfc0007fe, 0x7c0002e6, Op_D | Op_tbr }, - { "lwaux", 0xfc0007fe, 0x7c0002ea, Op_D | Op_A | Op_B }, - { "lhaux", 0xfc0007fe, 0x7c0002ee, Op_D | Op_A | Op_B }, - { "sthx", 0xfc0007fe, 0x7c00032e, Op_ST | Op_A | Op_B }, - { "orc", 0xfc0007fe, 0x7c000338, Op_S | Op_A | Op_B | Op_Rc }, - { "ecowx", 0xfc0007fe, 0x7c00036c, Op_ST | Op_A | Op_B | Op_Rc }, - { "slbie", 0xfc0007fc, 0x7c000364, Op_B }, - { "sthux", 0xfc0007fe, 0x7c00036e, Op_ST | Op_A | Op_B }, - { "or", 0xfc0007fe, 0x7c000378, Op_S | Op_A | Op_B | Op_Rc }, - { "mtdcr", 0xfc0007fe, 0x7c000386, Op_S | Op_dcr }, - { "divdu", 0xfc0003fe, 0x7c000392, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, - { "divwu", 0xfc0003fe, 0x7c000396, Op_D | Op_A | Op_B | Op_OE | Op_Rc }, - { "mtspr", 0xfc0007fe, 0x7c0003a6, Op_S | Op_spr }, - { "dcbi", 0xfc0007fe, 0x7c0003ac, Op_A | Op_B }, - { "nand", 0xfc0007fe, 0x7c0003b8, Op_S | Op_A | Op_B | Op_Rc }, - { "dcread", 0xfc0007fe, 0x7c0003cc, Op_D | Op_A | Op_B }, - { "divd", 0xfc0003fe, 0x7c0003d2, Op_S | Op_A | Op_B | Op_OE | Op_Rc }, - { "divw", 0xfc0003fe, 0x7c0003d6, Op_S | Op_A | Op_B | Op_OE | Op_Rc }, - { "slbia", 0xfc0003fe, 0x7c0003e4, Op_S | Op_A | Op_B | Op_OE | Op_Rc }, - { "mcrxr", 0xfc0007fe, 0x7c000400, Op_crfD }, - { "lswx", 0xfc0007fe, 0x7c00042a, Op_D | Op_A | Op_B }, - { "lwbrx", 0xfc0007fe, 0x7c00042c, Op_D | Op_A | Op_B }, - { "lfsx", 0xfc0007fe, 0x7c00042e, Op_D | Op_A | Op_B }, - { "srw", 0xfc0007fe, 0x7c000430, Op_S | Op_A | Op_B | Op_Rc }, - { "srd", 0xfc0007fe, 0x7c000436, Op_S | Op_A | Op_B | Op_Rc }, - { "tlbsync", 0xfc0007fe, 0x7c00046c, 0 }, - { "lfsux", 0xfc0007fe, 0x7c00046e, Op_D | Op_A | Op_B }, - { "mfsr", 0xfc0007fe, 0x7c0004a6, Op_D | Op_SR }, - { "lswi", 0xfc0007fe, 0x7c0004aa, Op_D | Op_A | Op_NB }, - { "sync", 0xfc6007fe, 0x7c0004ac, 0 }, - { "lwsync", 0xfc6007fe, 0x7c2004ac, 0 }, - { "ptesync", 0xfc6007fe, 0x7c4004ac, 0 }, - { "lfdx", 0xfc0007fe, 0x7c0004ae, Op_D | Op_A | Op_B }, - { "lfdux", 0xfc0007fe, 0x7c0004ee, Op_D | Op_A | Op_B }, - { "mfsrin", 0xfc0007fe, 0x7c000526, Op_D | Op_B }, - { "stswx", 0xfc0007fe, 0x7c00052a, Op_ST | Op_A | Op_B }, - { "stwbrx", 0xfc0007fe, 0x7c00052c, Op_ST | Op_A | Op_B }, - { "stfsx", 0xfc0007fe, 0x7c00052e, Op_ST | Op_A | Op_B }, - { "stfsux", 0xfc0007fe, 0x7c00056e, Op_ST | Op_A | Op_B }, - { "stswi", 0xfc0007fe, 0x7c0005aa, Op_ST | Op_A | Op_NB }, - { "stfdx", 0xfc0007fe, 0x7c0005ae, Op_ST | Op_A | Op_B }, - { "stfdux", 0xfc0007fe, 0x7c0005ee, Op_ST | Op_A | Op_B }, - { "lhbrx", 0xfc0007fe, 0x7c00062c, Op_D | Op_A | Op_B }, - { "sraw", 0xfc0007fe, 0x7c000630, Op_S | Op_A | Op_B }, - { "srad", 0xfc0007fe, 0x7c000634, Op_S | Op_A | Op_B | Op_Rc }, - { "srawi", 0xfc0007fe, 0x7c000670, Op_S | Op_A | Op_rSH | Op_Rc }, - { "sradi", 0xfc0007fc, 0x7c000674, Op_S | Op_A | Op_sh }, - { "eieio", 0xfc0007fe, 0x7c0006ac, 0 }, - { "tlbsx", 0xfc0007fe, 0x7c000724, Op_S | Op_A | Op_B | Op_Rc }, - { "sthbrx", 0xfc0007fe, 0x7c00072c, Op_ST | Op_A | Op_B }, - { "extsh", 0xfc0007fe, 0x7c000734, Op_S | Op_A | Op_Rc }, - { "tlbre", 0xfc0007fe, 0x7c000764, Op_D | Op_A | Op_WS }, - { "extsb", 0xfc0007fe, 0x7c000774, Op_S | Op_A | Op_Rc }, - { "icbi", 0xfc0007fe, 0x7c0007ac, Op_A | Op_B }, - { "tlbwe", 0xfc0007fe, 0x7c0007a4, Op_S | Op_A | Op_WS }, - { "stfiwx", 0xfc0007fe, 0x7c0007ae, Op_ST | Op_A | Op_B }, - { "extsw", 0xfc0007fe, 0x7c0007b4, Op_S | Op_A | Op_Rc }, - { "dcbz", 0xfc0007fe, 0x7c0007ec, Op_A | Op_B }, - { "", 0x0, 0x0, 0 } -}; - -/* 3a * 4 = e8 */ -const struct opcode opcodes_3a[] = { - { "ld", 0xfc000003, 0xe8000000, Op_D | Op_A | Op_ds }, - { "ldu", 0xfc000003, 0xe8000001, Op_D | Op_A | Op_ds }, - { "lwa", 0xfc000003, 0xe8000002, Op_D | Op_A | Op_ds }, - { "", 0x0, 0x0, 0 } -}; -/* 3b * 4 = ec */ -const struct opcode opcodes_3b[] = { - { "fdivs", 0xfc00003e, 0xec000024, Op_D | Op_A | Op_B | Op_Rc }, - { "fsubs", 0xfc00003e, 0xec000028, Op_D | Op_A | Op_B | Op_Rc }, - - { "fadds", 0xfc00003e, 0xec00002a, Op_D | Op_A | Op_B | Op_Rc }, - { "fsqrts", 0xfc00003e, 0xec00002c, Op_D | Op_B | Op_Rc }, - { "fres", 0xfc00003e, 0xec000030, Op_D | Op_B | Op_Rc }, - { "fmuls", 0xfc00003e, 0xec000032, Op_D | Op_A | Op_C | Op_Rc }, - { "fmsubs", 0xfc00003e, 0xec000038, Op_D | Op_A | Op_B | Op_C | Op_Rc }, - { "fmadds", 0xfc00003e, 0xec00003a, Op_D | Op_A | Op_B | Op_C | Op_Rc }, - { "fnmsubs", 0xfc00003e, 0xec00003c, Op_D | Op_A | Op_B | Op_C | Op_Rc }, - { "fnmadds", 0xfc00003e, 0xec00003e, Op_D | Op_A | Op_B | Op_C | Op_Rc }, - { "", 0x0, 0x0, 0 } -}; -/* 3e * 4 = f8 */ -const struct opcode opcodes_3e[] = { - { "std", 0xfc000003, 0xf8000000, Op_ST | Op_A | Op_ds }, - { "stdu", 0xfc000003, 0xf8000001, Op_ST | Op_A | Op_ds }, - { "", 0x0, 0x0, 0 } -}; - -/* 3f * 4 = fc */ -const struct opcode opcodes_3f[] = { - { "fcmpu", 0xfc0007fe, 0xfc000000, Op_crfD | Op_A | Op_B }, - { "frsp", 0xfc0007fe, 0xfc000018, Op_D | Op_B | Op_Rc }, - { "fctiw", 0xfc0007fe, 0xfc00001c, Op_D | Op_B | Op_Rc }, - { "fctiwz", 0xfc0007fe, 0xfc00001e, Op_D | Op_B | Op_Rc }, - - { "fdiv", 0xfc00003e, 0xfc000024, Op_D | Op_A | Op_B | Op_Rc }, - { "fsub", 0xfc00003e, 0xfc000028, Op_D | Op_A | Op_B | Op_Rc }, - { "fadd", 0xfc00003e, 0xfc00002a, Op_D | Op_A | Op_B | Op_Rc }, - { "fsqrt", 0xfc00003e, 0xfc00002c, Op_D | Op_B | Op_Rc }, - { "fsel", 0xfc00003e, 0xfc00002e, Op_D | Op_A | Op_B | Op_C | Op_Rc }, - { "fmul", 0xfc00003e, 0xfc000032, Op_D | Op_A | Op_C | Op_Rc }, - { "frsqrte", 0xfc00003e, 0xfc000034, Op_D | Op_B | Op_Rc }, - { "fmsub", 0xfc00003e, 0xfc000038, Op_D | Op_A | Op_B | Op_C | Op_Rc }, - { "fmadd", 0xfc00003e, 0xfc00003a, Op_D | Op_A | Op_B | Op_C | Op_Rc }, - { "fnmsub", 0xfc00003e, 0xfc00003c, Op_D | Op_A | Op_B | Op_C | Op_Rc }, - { "fnmadd", 0xfc00003e, 0xfc00003e, Op_D | Op_A | Op_B | Op_C | Op_Rc }, - - { "fcmpo", 0xfc0007fe, 0xfc000040, Op_crfD | Op_A | Op_B }, - { "mtfsb1", 0xfc0007fe, 0xfc00004c, Op_crfD | Op_Rc }, - { "fneg", 0xfc0007fe, 0xfc000050, Op_D | Op_B | Op_Rc }, - { "mcrfs", 0xfc0007fe, 0xfc000080, Op_D | Op_B | Op_Rc }, - { "mtfsb0", 0xfc0007fe, 0xfc00008c, Op_crfD | Op_Rc }, - { "fmr", 0xfc0007fe, 0xfc000090, Op_D | Op_B | Op_Rc }, - { "mtfsfi", 0xfc0007fe, 0xfc00010c, 0 }, /* XXX: out of flags! */ - - { "fnabs", 0xfc0007fe, 0xfc000110, Op_D | Op_B | Op_Rc }, - { "fabs", 0xfc0007fe, 0xfc000210, Op_D | Op_B | Op_Rc }, - { "mffs", 0xfc0007fe, 0xfc00048e, Op_D | Op_B | Op_Rc }, - { "mtfsf", 0xfc0007fe, 0xfc00058e, Op_FM | Op_B | Op_Rc }, - { "fctid", 0xfc0007fe, 0xfc00065c, Op_D | Op_B | Op_Rc }, - { "fctidz", 0xfc0007fe, 0xfc00065e, Op_D | Op_B | Op_Rc }, - { "fcfid", 0xfc0007fe, 0xfc00069c, Op_D | Op_B | Op_Rc }, - { "", 0x0, 0x0, 0 } -}; - -struct specialreg { - int reg; - const char *name; -}; - -const struct specialreg sprregs[] = { - { 0x000, "mq" }, - { 0x001, "xer" }, - { 0x008, "lr" }, - { 0x009, "ctr" }, - { 0x012, "dsisr" }, - { 0x013, "dar" }, - { 0x016, "dec" }, - { 0x019, "sdr1" }, - { 0x01a, "srr0" }, - { 0x01b, "srr1" }, - { 0x100, "vrsave" }, - { 0x110, "sprg0" }, - { 0x111, "sprg1" }, - { 0x112, "sprg2" }, - { 0x113, "sprg3" }, - { 0x114, "sprg4" }, - { 0x115, "sprg5" }, - { 0x116, "sprg6" }, - { 0x117, "sprg7" }, - { 0x118, "asr" }, - { 0x11a, "aer" }, - { 0x11c, "tbl" }, - { 0x11d, "tbu" }, - { 0x11f, "pvr" }, - { 0x210, "ibat0u" }, - { 0x211, "ibat0l" }, - { 0x212, "ibat1u" }, - { 0x213, "ibat1l" }, - { 0x214, "ibat2u" }, - { 0x215, "ibat2l" }, - { 0x216, "ibat3u" }, - { 0x217, "ibat3l" }, - { 0x218, "dbat0u" }, - { 0x219, "dbat0l" }, - { 0x21a, "dbat1u" }, - { 0x21b, "dbat1l" }, - { 0x21c, "dbat2u" }, - { 0x21d, "dbat2l" }, - { 0x21e, "dbat3u" }, - { 0x21f, "dbat3l" }, - { 0x230, "ibat4u" }, - { 0x231, "ibat4l" }, - { 0x232, "ibat5u" }, - { 0x233, "ibat5l" }, - { 0x234, "ibat6u" }, - { 0x235, "ibat6l" }, - { 0x236, "ibat7u" }, - { 0x237, "ibat7l" }, - { 0x238, "dbat4u" }, - { 0x239, "dbat4l" }, - { 0x23a, "dbat5u" }, - { 0x23b, "dbat5l" }, - { 0x23c, "dbat6u" }, - { 0x23d, "dbat6l" }, - { 0x23e, "dbat7u" }, - { 0x23f, "dbat7l" }, - { 0x3b0, "zpr" }, - { 0x3b1, "pid" }, - { 0x3b3, "ccr0" }, - { 0x3b4, "iac3" }, - { 0x3b5, "iac4" }, - { 0x3b6, "dvc1" }, - { 0x3b7, "dvc2" }, - { 0x3b9, "sgr" }, - { 0x3ba, "dcwr" }, - { 0x3bb, "sler" }, - { 0x3bc, "su0r" }, - { 0x3bd, "dbcr1" }, - { 0x3d3, "icdbdr" }, - { 0x3d4, "esr" }, - { 0x3d5, "dear" }, - { 0x3d6, "evpr" }, - { 0x3d8, "tsr" }, - { 0x3da, "tcr" }, - { 0x3db, "pit" }, - { 0x3de, "srr2" }, - { 0x3df, "srr3" }, - { 0x3f0, "hid0" }, - { 0x3f1, "hid1" }, - { 0x3f2, "iabr" }, - { 0x3f3, "hid2" }, - { 0x3f5, "dabr" }, - { 0x3f6, "msscr0" }, - { 0x3f7, "msscr1" }, - { 0x3f9, "l2cr" }, - { 0x3fa, "dccr" }, - { 0x3fb, "iccr" }, - { 0x3ff, "pir" }, - { 0, NULL } -}; - -const struct specialreg dcrregs[] = { - { 0x010, "sdram0_cfgaddr" }, - { 0x011, "sdram0_cfgdata" }, - { 0x012, "ebc0_cfgaddr" }, - { 0x013, "ebc0_cfgdata" }, - { 0x014, "dcp0_cfgaddr" }, - { 0x015, "dcp0_cfgdata" }, - { 0x018, "ocm0_isarc" }, - { 0x019, "ocm0_iscntl" }, - { 0x01a, "ocm0_dsarc" }, - { 0x01b, "ocm0_dscntl" }, - { 0x084, "plb0_besr" }, - { 0x086, "plb0_bear" }, - { 0x087, "plb0_acr" }, - { 0x0a0, "pob0_besr0" }, - { 0x0a2, "pob0_bear" }, - { 0x0a4, "pob0_besr1" }, - { 0x0b0, "cpc0_pllmr" }, - { 0x0b1, "cpc0_cr0" }, - { 0x0b2, "cpc0_cr1" }, - { 0x0b4, "cpc0_psr" }, - { 0x0b5, "cpc0_jtagid" }, - { 0x0b8, "cpc0_sr" }, - { 0x0b9, "cpc0_er" }, - { 0x0ba, "cpc0_fr" }, - { 0x0c0, "uic0_sr" }, - { 0x0c2, "uic0_er" }, - { 0x0c3, "uic0_cr" }, - { 0x0c4, "uic0_pr" }, - { 0x0c5, "uic0_tr" }, - { 0x0c6, "uic0_msr" }, - { 0x0c7, "uic0_vr" }, - { 0x0c8, "uic0_vcr" }, - { 0x100, "dma0_cr0" }, - { 0x101, "dma0_ct0" }, - { 0x102, "dma0_da0" }, - { 0x103, "dma0_sa0" }, - { 0x104, "dma0_sg0" }, - { 0x108, "dma0_cr1" }, - { 0x109, "dma0_ct1" }, - { 0x10a, "dma0_da1" }, - { 0x10b, "dma0_sa1" }, - { 0x10c, "dma0_sg1" }, - { 0x110, "dma0_cr2" }, - { 0x111, "dma0_ct2" }, - { 0x112, "dma0_da2" }, - { 0x113, "dma0_sa2" }, - { 0x114, "dma0_sg2" }, - { 0x118, "dma0_cr3" }, - { 0x119, "dma0_ct3" }, - { 0x11a, "dma0_da3" }, - { 0x11b, "dma0_sa3" }, - { 0x11c, "dma0_sg3" }, - { 0x120, "dma0_sr" }, - { 0x123, "dma0_sgc" }, - { 0x125, "dma0_slp" }, - { 0x126, "dma0_pol" }, - { 0x180, "mal0_cfg" }, - { 0x181, "mal0_esr" }, - { 0x182, "mal0_ier" }, - { 0x184, "mal0_txcasr" }, - { 0x185, "mal0_txcarr" }, - { 0x186, "mal0_txeobisr" }, - { 0x187, "mal0_txdeir" }, - { 0x190, "mal0_rxcasr" }, - { 0x191, "mal0_rxcarr" }, - { 0x192, "mal0_rxeobisr" }, - { 0x193, "mal0_rxdeir" }, - { 0x1a0, "mal0_txctp0r" }, - { 0x1a1, "mal0_txctp1r" }, - { 0x1a2, "mal0_txctp2r" }, - { 0x1a3, "mal0_txctp3r" }, - { 0x1c0, "mal0_rxctp0r" }, - { 0x1e0, "mal0_rcbs0" }, - { 0, NULL } -}; - -static const char *condstr[8] = { - "ge", "le", "ne", "ns", "lt", "gt", "eq", "so" -}; - -void -op_ill(instr_t instr, vm_offset_t loc) -{ - db_printf("illegal instruction %x\n", instr); -} - -u_int32_t -extract_field(u_int32_t value, u_int32_t base, u_int32_t width) -{ - u_int32_t mask = (1 << width) - 1; - return ((value >> base) & mask); -} - -const struct opcode * search_op(const struct opcode *); - -void -disasm_fields(const struct opcode *popcode, instr_t instr, vm_offset_t loc, - char *disasm_str, size_t slen) -{ - char * pstr; - enum function_mask func; - int len; - -#define ADD_LEN(s) do { \ - len = (s); \ - slen -= len; \ - pstr += len; \ - } while(0) -#define APP_PSTR(fmt, arg) ADD_LEN(snprintf(pstr, slen, (fmt), (arg))) -#define APP_PSTRS(fmt) ADD_LEN(snprintf(pstr, slen, "%s", (fmt))) - - pstr = disasm_str; - - func = popcode->func; - if (func & Op_BC) { - u_int BO, BI; - BO = extract_field(instr, 31 - 10, 5); - BI = extract_field(instr, 31 - 15, 5); - func &= ~Op_BC; - if (BO & 4) { - /* standard, no decrement */ - if (BO & 16) { - if (popcode->code == 0x40000000) { - APP_PSTRS("c"); - func |= Op_BO | Op_BI; - } - } - else { - APP_PSTRS(condstr[((BO & 8) >> 1) + (BI & 3)]); - if (BI >= 4) - func |= Op_crfS; - } - } - else { - /* decrement and branch */ - if (BO & 2) - APP_PSTRS("dz"); - else - APP_PSTRS("dnz"); - if ((BO & 24) == 0) - APP_PSTRS("f"); - else if ((BO & 24) == 8) - APP_PSTRS("t"); - else - func |= Op_BI; - } - if (popcode->code == 0x4c000020) - APP_PSTRS("lr"); - else if (popcode->code == 0x4c000420) - APP_PSTRS("ctr"); - if ((BO & 20) != 20 && (func & Op_BO) == 0) - func |= Op_BP; /* branch prediction hint */ - } - if (func & Op_OE) { - u_int OE; - OE = extract_field(instr, 31 - 21, 1); - if (OE) { - APP_PSTRS("o"); - } - func &= ~Op_OE; - } - switch (func & Op_LKM) { - case Op_Rc: - if (instr & 0x1) - APP_PSTRS("."); - break; - case Op_AA: - if (instr & 0x1) - APP_PSTRS("l"); - if (instr & 0x2) { - APP_PSTRS("a"); - loc = 0; /* Absolute address */ - } - break; - case Op_LK: - if (instr & 0x1) - APP_PSTRS("l"); - break; - default: - func &= ~Op_LKM; - } - if (func & Op_BP) { - int y; - y = (instr & 0x200000) != 0; - if (popcode->code == 0x40000000) { - int BD; - BD = extract_field(instr, 31 - 29, 14); - BD = BD << 18; - BD = BD >> 16; - BD += loc; - if ((vm_offset_t)BD < loc) - y ^= 1; - } - APP_PSTR("%c", y ? '+' : '-'); - func &= ~Op_BP; - } - APP_PSTRS("\t"); - - /* XXX: special cases here, out of flags in a 32bit word. */ - if (strcmp(popcode->name, "wrteei") == 0) { - int E; - E = extract_field(instr, 31 - 16, 5); - APP_PSTR("%d", E); - return; - } - else if (strcmp(popcode->name, "mtfsfi") == 0) { - u_int UI; - UI = extract_field(instr, 31 - 8, 3); - APP_PSTR("crf%u, ", UI); - UI = extract_field(instr, 31 - 19, 4); - APP_PSTR("0x%x", UI); - } - /* XXX: end of special cases here. */ - - if ((func & Op_FM) == Op_FM) { - u_int FM; - FM = extract_field(instr, 31 - 14, 8); - APP_PSTR("0x%x, ", FM); - func &= ~Op_FM; - } - if (func & Op_D) { /* Op_ST is the same */ - u_int D; - D = extract_field(instr, 31 - 10, 5); - APP_PSTR("r%d, ", D); - func &= ~Op_D; - } - if (func & Op_crbD) { - u_int crbD; - crbD = extract_field(instr, 31 - 10, 5); - APP_PSTR("crb%d, ", crbD); - func &= ~Op_crbD; - } - if (func & Op_crfD) { - u_int crfD; - crfD = extract_field(instr, 31 - 8, 3); - APP_PSTR("crf%d, ", crfD); - func &= ~Op_crfD; - } - if (func & Op_TO) { - u_int TO; - TO = extract_field(instr, 31 - 10, 1); - APP_PSTR("%d, ", TO); - func &= ~Op_TO; - } - if (func & Op_crfS) { - u_int crfS; - crfS = extract_field(instr, 31 - 13, 3); - APP_PSTR("crf%d, ", crfS); - func &= ~Op_crfS; - } - if (func & Op_CRM) { - u_int CRM; - CRM = extract_field(instr, 31 - 19, 8); - APP_PSTR("0x%x, ", CRM); - func &= ~Op_CRM; - } - if (func & Op_BO) { - u_int BO; - BO = extract_field(instr, 31 - 10, 5); - APP_PSTR("%d, ", BO); - func &= ~Op_BO; - } - if (func & Op_BI) { - u_int BI; - BI = extract_field(instr, 31 - 15, 5); - APP_PSTR("%d, ", BI); - func &= ~Op_BI; - } - if (func & Op_dA) { /* register A indirect with displacement */ - u_int A; - A = extract_field(instr, 31 - 31, 16); - if (A & 0x8000) { - APP_PSTRS("-"); - A = 0x10000-A; - } - APP_PSTR("0x%x", A); - A = extract_field(instr, 31 - 15, 5); - APP_PSTR("(r%d)", A); - func &= ~Op_dA; - } - if (func & Op_spr) { - u_int spr; - u_int sprl; - u_int sprh; - const struct specialreg *regs; - int i; - sprl = extract_field(instr, 31 - 15, 5); - sprh = extract_field(instr, 31 - 20, 5); - spr = sprh << 5 | sprl; - - /* ugly hack - out of bitfields in the function mask */ - if (popcode->name[2] == 'd') /* m.Dcr */ - regs = dcrregs; - else - regs = sprregs; - for (i = 0; regs[i].name != NULL; i++) - if (spr == regs[i].reg) - break; - if (regs[i].name == NULL) - APP_PSTR("[unknown special reg (%d)]", spr); - else - APP_PSTR("%s", regs[i].name); - - if (popcode->name[1] == 't') /* spr is destination */ - APP_PSTRS(", "); - func &= ~Op_spr; - } - if (func & Op_SR) { - u_int SR; - SR = extract_field(instr, 31 - 15, 3); - APP_PSTR("sr%d", SR); - if (popcode->name[1] == 't') /* SR is destination */ - APP_PSTRS(", "); - func &= ~Op_SR; - } - if (func & Op_A) { - u_int A; - A = extract_field(instr, 31 - 15, 5); - APP_PSTR("r%d, ", A); - func &= ~Op_A; - } - if (func & Op_S) { - u_int D; - D = extract_field(instr, 31 - 10, 5); - APP_PSTR("r%d, ", D); - func &= ~Op_S; - } - if (func & Op_C) { - u_int C; - C = extract_field(instr, 31 - 25, 5); - APP_PSTR("r%d, ", C); - func &= ~Op_C; - } - if (func & Op_B) { - u_int B; - B = extract_field(instr, 31 - 20, 5); - APP_PSTR("r%d", B); - func &= ~Op_B; - } - if (func & Op_crbA) { - u_int crbA; - crbA = extract_field(instr, 31 - 15, 5); - APP_PSTR("%d, ", crbA); - func &= ~Op_crbA; - } - if (func & Op_crbB) { - u_int crbB; - crbB = extract_field(instr, 31 - 20, 5); - APP_PSTR("%d, ", crbB); - func &= ~Op_crbB; - } - if (func & Op_LI) { - int LI; - LI = extract_field(instr, 31 - 29, 24); - LI = LI << 8; - LI = LI >> 6; - LI += loc; - APP_PSTR("0x%x", LI); - func &= ~Op_LI; - } - switch (func & Op_SIMM) { - u_int IMM; - case Op_SIMM: /* same as Op_d */ - IMM = extract_field(instr, 31 - 31, 16); - if (IMM & 0x8000) { - APP_PSTRS("-"); - IMM = 0x10000-IMM; - } - func &= ~Op_SIMM; - goto common; - case Op_UIMM: - IMM = extract_field(instr, 31 - 31, 16); - func &= ~Op_UIMM; - goto common; - common: - APP_PSTR("0x%x", IMM); - break; - default: - ; - } - if (func & Op_BD) { - int BD; - BD = extract_field(instr, 31 - 29, 14); - BD = BD << 18; - BD = BD >> 16; - BD += loc; - /* Need to sign extend and shift up 2, then add addr */ - APP_PSTR("0x%x", BD); - func &= ~Op_BD; - } - if (func & Op_ds) { - u_int ds; - ds = extract_field(instr, 31 - 29, 14) << 2; - APP_PSTR("0x%x", ds); - func &= ~Op_ds; - } - if (func & Op_me) { - u_int me, mel, meh; - mel = extract_field(instr, 31 - 25, 4); - meh = extract_field(instr, 31 - 26, 1); - me = meh << 4 | mel; - APP_PSTR(", 0x%x", me); - func &= ~Op_me; - } - if ((func & Op_SH) && (func & Op_sh_mb_sh)) { - u_int SH; - SH = extract_field(instr, 31 - 20, 5); - APP_PSTR("%d", SH); - } - if ((func & Op_MB) && (func & Op_sh_mb_sh)) { - u_int MB; - u_int ME; - MB = extract_field(instr, 31 - 25, 5); - APP_PSTR(", %d", MB); - ME = extract_field(instr, 31 - 30, 5); - APP_PSTR(", %d", ME); - } - if ((func & Op_sh) && ! (func & Op_sh_mb_sh)) { - u_int sh, shl, shh; - shl = extract_field(instr, 31 - 19, 4); - shh = extract_field(instr, 31 - 20, 1); - sh = shh << 4 | shl; - APP_PSTR(", %d", sh); - } - if ((func & Op_mb) && ! (func & Op_sh_mb_sh)) { - u_int mb, mbl, mbh; - mbl = extract_field(instr, 31 - 25, 4); - mbh = extract_field(instr, 31 - 26, 1); - mb = mbh << 4 | mbl; - APP_PSTR(", %d", mb); - } - if ((func & Op_me) && ! (func & Op_sh_mb_sh)) { - u_int me, mel, meh; - mel = extract_field(instr, 31 - 25, 4); - meh = extract_field(instr, 31 - 26, 1); - me = meh << 4 | mel; - APP_PSTR(", %d", me); - } - if (func & Op_tbr) { - u_int tbr; - u_int tbrl; - u_int tbrh; - const char *reg; - tbrl = extract_field(instr, 31 - 15, 5); - tbrh = extract_field(instr, 31 - 20, 5); - tbr = tbrh << 5 | tbrl; - - switch (tbr) { - case 268: - reg = "tbl"; - break; - case 269: - reg = "tbu"; - break; - default: - reg = NULL; - } - if (reg == NULL) - APP_PSTR(", [unknown tbr %d ]", tbr); - else - APP_PSTR(", %s", reg); - func &= ~Op_tbr; - } - if (func & Op_NB) { - u_int NB; - NB = extract_field(instr, 31 - 20, 5); - if (NB == 0) - NB = 32; - APP_PSTR(", %d", NB); - func &= ~Op_SR; - } -#undef ADD_LEN -#undef APP_PSTR -#undef APP_PSTRS -} - -void -op_base(instr_t instr, vm_offset_t loc) -{ - dis_ppc(opcodes, instr, loc); -} - -void -op_cl_x13(instr_t instr, vm_offset_t loc) -{ - dis_ppc(opcodes_13, instr, loc); -} - -void -op_cl_x1e(instr_t instr, vm_offset_t loc) -{ - dis_ppc(opcodes_1e, instr, loc); -} - -void -op_cl_x1f(instr_t instr, vm_offset_t loc) -{ - dis_ppc(opcodes_1f, instr, loc); -} - -void -op_cl_x3a(instr_t instr, vm_offset_t loc) -{ - dis_ppc(opcodes_3a, instr, loc); -} - -void -op_cl_x3b(instr_t instr, vm_offset_t loc) -{ - dis_ppc(opcodes_3b, instr, loc); -} - -void -op_cl_x3e(instr_t instr, vm_offset_t loc) -{ - dis_ppc(opcodes_3e, instr, loc); -} - -void -op_cl_x3f(instr_t instr, vm_offset_t loc) -{ - dis_ppc(opcodes_3f, instr, loc); -} - -void -dis_ppc(const struct opcode *opcodeset, instr_t instr, vm_offset_t loc) -{ - const struct opcode *op; - int found = 0; - int i; - char disasm_str[80]; - - for (i = 0, op = &opcodeset[0]; - found == 0 && op->mask != 0; - i++, op = &opcodeset[i]) { - if ((instr & op->mask) == op->code) { - found = 1; - disasm_fields(op, instr, loc, disasm_str, - sizeof disasm_str); - db_printf("%s%s\n", op->name, disasm_str); - return; - } - } - op_ill(instr, loc); -} - -db_addr_t -db_disasm(db_addr_t loc, bool extended) -{ - int class; - instr_t opcode; - opcode = *(instr_t *)(loc); - if (extended) - db_printf("|%08x| ", opcode); - class = opcode >> 26; - (opcodes_base[class])(opcode, loc); - - return (loc + 4); -} - -vm_offset_t opc_disasm(vm_offset_t loc, int); - -vm_offset_t -opc_disasm(vm_offset_t loc, int xin) -{ - int class; - instr_t opcode; - opcode = xin; - class = opcode >> 26; - (opcodes_base[class])(opcode, loc); - - return (loc + 4); -} diff --git a/sys/powerpc/powerpc/db_hwwatch.c b/sys/powerpc/powerpc/db_hwwatch.c deleted file mode 100644 index 6733f3bfcf7..00000000000 --- a/sys/powerpc/powerpc/db_hwwatch.c +++ /dev/null @@ -1,40 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2002 Benno Rice. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#include - -#include - -#include -#include -#include -#include -#include - -void -db_md_list_watchpoints(void) -{ -} diff --git a/sys/powerpc/powerpc/db_interface.c b/sys/powerpc/powerpc/db_interface.c deleted file mode 100644 index 158578d7a27..00000000000 --- a/sys/powerpc/powerpc/db_interface.c +++ /dev/null @@ -1,93 +0,0 @@ -/* $NetBSD: db_interface.c,v 1.20 2002/05/13 20:30:09 matt Exp $ */ -/* $OpenBSD: db_interface.c,v 1.2 1996/12/28 06:21:50 rahnds Exp $ */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include -#include -#include -#include -#include - -#include - -int -db_read_bytes(vm_offset_t addr, size_t size, char *data) -{ - jmp_buf jb; - void *prev_jb; - char *src; - int ret; - - prev_jb = kdb_jmpbuf(jb); - ret = setjmp(jb); - if (ret == 0) { - src = (char *)addr; - - if (size == 8) - *((uint64_t*)data) = *((uint64_t*)src); - if (size == 4) - *((int *)data) = *((int *)src); - else if (size == 2) - *((short *)data) = *((short *)src); - else - while (size-- > 0) - *data++ = *src++; - } - (void)kdb_jmpbuf(prev_jb); - return (ret); -} - -int -db_write_bytes(vm_offset_t addr, size_t size, char *data) -{ - jmp_buf jb; - void *prev_jb; - char *dst; - size_t cnt; - int ret; - - prev_jb = kdb_jmpbuf(jb); - ret = setjmp(jb); - if (ret == 0) { - dst = (char *)addr; - cnt = size; - - if (size == 8) - *((uint64_t*)dst) = *((uint64_t*)data); - if (size == 4) - *((int*)dst) = *((int*)data); - else - if (size == 2) - *((short*)dst) = *((short*)data); - else - while (cnt-- > 0) - *dst++ = *data++; - kdb_cpu_sync_icache((void *)addr, size); - } - (void)kdb_jmpbuf(prev_jb); - return (ret); -} - -void -db_show_mdpcpu(struct pcpu *pc) -{ - - db_printf("PPC: hwref = %#zx\n", pc->pc_hwref); - db_printf("PPC: ipimask = %#x\n", pc->pc_ipimask); - db_printf("PPC: flags = %#x\n", pc->pc_flags); -} diff --git a/sys/powerpc/powerpc/db_trace.c b/sys/powerpc/powerpc/db_trace.c deleted file mode 100644 index ab4315a135e..00000000000 --- a/sys/powerpc/powerpc/db_trace.c +++ /dev/null @@ -1,318 +0,0 @@ -/* $NetBSD: db_trace.c,v 1.20 2002/05/13 20:30:09 matt Exp $ */ -/* $OpenBSD: db_trace.c,v 1.3 1997/03/21 02:10:48 niklas Exp $ */ - -/*- - * Mach Operating System - * Copyright (c) 1992 Carnegie Mellon University - * All Rights Reserved. - * - * Permission to use, copy, modify and distribute this software and its - * documentation is hereby granted, provided that both the copyright - * notice and this permission notice appear in all copies of the - * software, derivative works or modified versions, and any portions - * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR - * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * - * Carnegie Mellon requests users of this software to return to - * - * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU - * School of Computer Science - * Carnegie Mellon University - * Pittsburgh PA 15213-3890 - * - * any improvements or extensions that they make and grant Carnegie Mellon - * the rights to redistribute these changes. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -static db_varfcn_t db_frame; - -#define DB_OFFSET(x) (db_expr_t *)offsetof(struct trapframe, x) - -#ifdef __powerpc64__ -#define CALLOFFSET 8 /* Include TOC reload slot */ -#else -#define CALLOFFSET 4 -#endif - -struct db_variable db_regs[] = { - { "r0", DB_OFFSET(fixreg[0]), db_frame }, - { "r1", DB_OFFSET(fixreg[1]), db_frame }, - { "r2", DB_OFFSET(fixreg[2]), db_frame }, - { "r3", DB_OFFSET(fixreg[3]), db_frame }, - { "r4", DB_OFFSET(fixreg[4]), db_frame }, - { "r5", DB_OFFSET(fixreg[5]), db_frame }, - { "r6", DB_OFFSET(fixreg[6]), db_frame }, - { "r7", DB_OFFSET(fixreg[7]), db_frame }, - { "r8", DB_OFFSET(fixreg[8]), db_frame }, - { "r9", DB_OFFSET(fixreg[9]), db_frame }, - { "r10", DB_OFFSET(fixreg[10]), db_frame }, - { "r11", DB_OFFSET(fixreg[11]), db_frame }, - { "r12", DB_OFFSET(fixreg[12]), db_frame }, - { "r13", DB_OFFSET(fixreg[13]), db_frame }, - { "r14", DB_OFFSET(fixreg[14]), db_frame }, - { "r15", DB_OFFSET(fixreg[15]), db_frame }, - { "r16", DB_OFFSET(fixreg[16]), db_frame }, - { "r17", DB_OFFSET(fixreg[17]), db_frame }, - { "r18", DB_OFFSET(fixreg[18]), db_frame }, - { "r19", DB_OFFSET(fixreg[19]), db_frame }, - { "r20", DB_OFFSET(fixreg[20]), db_frame }, - { "r21", DB_OFFSET(fixreg[21]), db_frame }, - { "r22", DB_OFFSET(fixreg[22]), db_frame }, - { "r23", DB_OFFSET(fixreg[23]), db_frame }, - { "r24", DB_OFFSET(fixreg[24]), db_frame }, - { "r25", DB_OFFSET(fixreg[25]), db_frame }, - { "r26", DB_OFFSET(fixreg[26]), db_frame }, - { "r27", DB_OFFSET(fixreg[27]), db_frame }, - { "r28", DB_OFFSET(fixreg[28]), db_frame }, - { "r29", DB_OFFSET(fixreg[29]), db_frame }, - { "r30", DB_OFFSET(fixreg[30]), db_frame }, - { "r31", DB_OFFSET(fixreg[31]), db_frame }, - { "srr0", DB_OFFSET(srr0), db_frame }, - { "srr1", DB_OFFSET(srr1), db_frame }, - { "lr", DB_OFFSET(lr), db_frame }, - { "ctr", DB_OFFSET(ctr), db_frame }, - { "cr", DB_OFFSET(cr), db_frame }, - { "xer", DB_OFFSET(xer), db_frame }, - { "dar", DB_OFFSET(dar), db_frame }, -#ifdef AIM - { "dsisr", DB_OFFSET(cpu.aim.dsisr), db_frame }, -#endif -#if defined(BOOKE) - { "esr", DB_OFFSET(cpu.booke.esr), db_frame }, -#endif -}; -struct db_variable *db_eregs = db_regs + nitems(db_regs); - -/* - * register variable handling - */ -static int -db_frame(struct db_variable *vp, db_expr_t *valuep, int op) -{ - register_t *reg; - - if (kdb_frame == NULL) - return (0); - reg = (register_t*)((uintptr_t)kdb_frame + (uintptr_t)vp->valuep); - if (op == DB_VAR_GET) - *valuep = *reg; - else - *reg = *valuep; - return (1); -} - -/* - * Frame tracing. - */ -static int -db_backtrace(struct thread *td, db_addr_t fp, int count) -{ - db_addr_t stackframe, lr, *args; - boolean_t kernel_only = TRUE; - boolean_t full = FALSE; - -#if 0 - { - register char *cp = modif; - register char c; - - while ((c = *cp++) != 0) { - if (c == 't') - trace_thread = TRUE; - if (c == 'u') - kernel_only = FALSE; - if (c == 'f') - full = TRUE; - } - } -#endif - - stackframe = fp; - - while (!db_pager_quit) { - if (stackframe < PAGE_SIZE) - break; - - /* - * Locate the next frame by grabbing the backchain ptr - * from frame[0] - */ - stackframe = *(db_addr_t *)stackframe; - - next_frame: - #ifdef __powerpc64__ - /* The saved arg values start at frame[6] */ - args = (db_addr_t *)(stackframe + 48); - #else - /* The saved arg values start at frame[2] */ - args = (db_addr_t *)(stackframe + 8); - #endif - - if (stackframe < PAGE_SIZE) - break; - - if (count-- == 0) - break; - - /* - * Extract link register from frame and subtract - * 4 to convert into calling address (as opposed to - * return address) - */ - #ifdef __powerpc64__ - lr = *(db_addr_t *)(stackframe + 16) - 4; - #else - lr = *(db_addr_t *)(stackframe + 4) - 4; - #endif - if ((lr & 3) || (lr < 0x100)) { - db_printf("saved LR(0x%zx) is invalid.", lr); - break; - } - - #ifdef __powerpc64__ - db_printf("0x%016lx: ", stackframe); - #else - db_printf("0x%08x: ", stackframe); - #endif - - /* - * The trap code labels the return addresses from the - * call to C code as 'trapexit' and 'asttrapexit. Use this - * to determine if the callframe has to traverse a saved - * trap context - */ - if ((lr + CALLOFFSET == (db_addr_t) &trapexit) || - (lr + CALLOFFSET == (db_addr_t) &asttrapexit)) { - const char *trapstr; - struct trapframe *tf = (struct trapframe *)(args); - db_printf("%s ", tf->srr1 & PSL_PR ? "user" : "kernel"); - switch (tf->exc) { - case EXC_DSI: - /* XXX take advantage of the union. */ -#ifdef BOOKE - db_printf("DSI %s trap @ %#zx by ", - (tf->cpu.booke.esr & ESR_ST) ? "write" - : "read", tf->dar); -#else - db_printf("DSI %s trap @ %#zx by ", - (tf->cpu.aim.dsisr & DSISR_STORE) ? "write" - : "read", tf->dar); -#endif - goto print_trap; - case EXC_ALI: - db_printf("ALI trap @ %#zx (xSR %#x) ", - tf->dar, (uint32_t)tf->cpu.aim.dsisr); - goto print_trap; -#ifdef __powerpc64__ - case EXC_DSE: - db_printf("DSE trap @ %#zx by ", tf->dar); - goto print_trap; - case EXC_ISE: - db_printf("ISE trap @ %#zx by ", tf->srr0); - goto print_trap; -#endif - case EXC_ISI: trapstr = "ISI"; break; - case EXC_PGM: trapstr = "PGM"; break; - case EXC_SC: trapstr = "SC"; break; - case EXC_EXI: trapstr = "EXI"; break; - case EXC_MCHK: trapstr = "MCHK"; break; - case EXC_VEC: trapstr = "VEC"; break; -#if !defined(BOOKE) - case EXC_FPA: trapstr = "FPA"; break; - case EXC_BPT: trapstr = "BPT"; break; - case EXC_TRC: trapstr = "TRC"; break; - case EXC_RUNMODETRC: trapstr = "RUNMODETRC"; break; - case EXC_SMI: trapstr = "SMI"; break; - case EXC_RST: trapstr = "RST"; break; -#endif - case EXC_FPU: trapstr = "FPU"; break; - case EXC_DECR: trapstr = "DECR"; break; - case EXC_PERF: trapstr = "PERF"; break; - case EXC_VSX: trapstr = "VSX"; break; - case EXC_SOFT_PATCH: trapstr = "SOFT_PATCH"; break; - default: trapstr = NULL; break; - } - if (trapstr != NULL) { - db_printf("%s trap by ", trapstr); - } else { - db_printf("trap %#zx by ", tf->exc); - } - - print_trap: - lr = (db_addr_t) tf->srr0; - db_printsym(lr, DB_STGY_ANY); - db_printf(": srr1=%#zx\n", tf->srr1); - db_printf("%-10s r1=%#zx cr=%#x xer=%#x ctr=%#zx", - "", tf->fixreg[1], (uint32_t)tf->cr, - (uint32_t)tf->xer, tf->ctr); -#ifdef __powerpc64__ - db_printf(" r2=%#zx", tf->fixreg[2]); -#endif - if (tf->exc == EXC_DSI) - db_printf(" sr=%#x", - (uint32_t)tf->cpu.aim.dsisr); - db_printf(" frame=%p\n", tf); - stackframe = (db_addr_t) tf->fixreg[1]; - if (kernel_only && (tf->srr1 & PSL_PR)) - break; - goto next_frame; - } - - db_printf("at "); - db_printsym(lr, DB_STGY_PROC); - if (full) - /* Print all the args stored in that stackframe. */ - db_printf("(%zx, %zx, %zx, %zx, %zx, %zx, %zx, %zx)", - args[0], args[1], args[2], args[3], - args[4], args[5], args[6], args[7]); - db_printf("\n"); - } - - return (0); -} - -void -db_trace_self(void) -{ - db_addr_t addr; - - addr = (db_addr_t)__builtin_frame_address(0); - if (addr == 0) { - db_printf("Null frame address\n"); - return; - } - db_backtrace(curthread, *(db_addr_t *)addr, -1); -} - -int -db_trace_thread(struct thread *td, int count) -{ - struct pcb *ctx; - - ctx = kdb_thr_ctx(td); - return (db_backtrace(td, (db_addr_t)ctx->pcb_sp, count)); -} diff --git a/sys/powerpc/powerpc/dump_machdep.c b/sys/powerpc/powerpc/dump_machdep.c deleted file mode 100644 index ac7e6283b5d..00000000000 --- a/sys/powerpc/powerpc/dump_machdep.c +++ /dev/null @@ -1,38 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2002 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include - -int do_minidump = 1; -SYSCTL_INT(_debug, OID_AUTO, minidump, CTLFLAG_RWTUN, &do_minidump, 0, - "Enable mini crash dumps"); diff --git a/sys/powerpc/powerpc/elf32_machdep.c b/sys/powerpc/powerpc/elf32_machdep.c deleted file mode 100644 index 5611c18920e..00000000000 --- a/sys/powerpc/powerpc/elf32_machdep.c +++ /dev/null @@ -1,470 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 1996-1998 John D. Polstra. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include - -#define __ELF_WORD_SIZE 32 - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include - -#include - -#ifdef __powerpc64__ -#include -#include - -extern const char *freebsd32_syscallnames[]; -static void ppc32_fixlimit(struct rlimit *rl, int which); - -static SYSCTL_NODE(_compat, OID_AUTO, ppc32, CTLFLAG_RW | CTLFLAG_MPSAFE, 0, - "32-bit mode"); - -#define PPC32_MAXDSIZ (1024*1024*1024) -static u_long ppc32_maxdsiz = PPC32_MAXDSIZ; -SYSCTL_ULONG(_compat_ppc32, OID_AUTO, maxdsiz, CTLFLAG_RWTUN, &ppc32_maxdsiz, - 0, ""); -#define PPC32_MAXSSIZ (64*1024*1024) -u_long ppc32_maxssiz = PPC32_MAXSSIZ; -SYSCTL_ULONG(_compat_ppc32, OID_AUTO, maxssiz, CTLFLAG_RWTUN, &ppc32_maxssiz, - 0, ""); -#else -static void ppc32_runtime_resolve(void); -#endif - -struct sysentvec elf32_freebsd_sysvec = { - .sv_size = SYS_MAXSYSCALL, -#ifdef __powerpc64__ - .sv_table = freebsd32_sysent, -#else - .sv_table = sysent, -#endif - .sv_fixup = __elfN(freebsd_fixup), - .sv_copyout_auxargs = __elfN(powerpc_copyout_auxargs), - .sv_sendsig = sendsig, - .sv_sigcode = sigcode32, - .sv_szsigcode = &szsigcode32, - .sv_name = "FreeBSD ELF32", - .sv_coredump = __elfN(coredump), - .sv_elf_core_osabi = ELFOSABI_FREEBSD, - .sv_elf_core_abi_vendor = FREEBSD_ABI_VENDOR, - .sv_elf_core_prepare_notes = __elfN(prepare_notes), - .sv_imgact_try = NULL, - .sv_minsigstksz = MINSIGSTKSZ, - .sv_minuser = VM_MIN_ADDRESS, - .sv_stackprot = VM_PROT_ALL, -#ifdef __powerpc64__ - .sv_maxuser = VM_MAXUSER_ADDRESS32, - .sv_usrstack = FREEBSD32_USRSTACK, - .sv_psstrings = FREEBSD32_PS_STRINGS, - .sv_psstringssz = sizeof(struct freebsd32_ps_strings), - .sv_copyout_strings = freebsd32_copyout_strings, - .sv_setregs = ppc32_setregs, - .sv_syscallnames = freebsd32_syscallnames, - .sv_fixlimit = ppc32_fixlimit, -#else - .sv_maxuser = VM_MAXUSER_ADDRESS, - .sv_usrstack = USRSTACK, - .sv_psstrings = PS_STRINGS, - .sv_psstringssz = sizeof(struct ps_strings), - .sv_copyout_strings = exec_copyout_strings, - .sv_setregs = exec_setregs, - .sv_syscallnames = syscallnames, - .sv_fixlimit = NULL, -#endif - .sv_maxssiz = NULL, - .sv_flags = SV_ABI_FREEBSD | SV_ILP32 | SV_SHP | SV_ASLR | - SV_TIMEKEEP | SV_RNG_SEED_VER | SV_SIGSYS, - .sv_set_syscall_retval = cpu_set_syscall_retval, - .sv_fetch_syscall_args = cpu_fetch_syscall_args, - .sv_shared_page_base = FREEBSD32_SHAREDPAGE, - .sv_shared_page_len = PAGE_SIZE, - .sv_schedtail = NULL, - .sv_thread_detach = NULL, - .sv_trap = NULL, - .sv_hwcap = &cpu_features, - .sv_hwcap2 = &cpu_features2, - .sv_onexec_old = exec_onexec_old, - .sv_onexit = exit_onexit, - .sv_regset_begin = SET_BEGIN(__elfN(regset)), - .sv_regset_end = SET_LIMIT(__elfN(regset)), -}; -INIT_SYSENTVEC(elf32_sysvec, &elf32_freebsd_sysvec); - -static Elf32_Brandinfo freebsd_brand_info = { - .brand = ELFOSABI_FREEBSD, - .machine = EM_PPC, - .compat_3_brand = "FreeBSD", - .emul_path = NULL, - .interp_path = "/libexec/ld-elf.so.1", - .sysvec = &elf32_freebsd_sysvec, -#ifdef __powerpc64__ - .interp_newpath = "/libexec/ld-elf32.so.1", -#else - .interp_newpath = NULL, -#endif - .brand_note = &elf32_freebsd_brandnote, - .flags = BI_CAN_EXEC_DYN | BI_BRAND_NOTE -}; - -SYSINIT(elf32, SI_SUB_EXEC, SI_ORDER_FIRST, - (sysinit_cfunc_t) elf32_insert_brand_entry, - &freebsd_brand_info); - -static Elf32_Brandinfo freebsd_brand_oinfo = { - .brand = ELFOSABI_FREEBSD, - .machine = EM_PPC, - .compat_3_brand = "FreeBSD", - .emul_path = NULL, - .interp_path = "/usr/libexec/ld-elf.so.1", - .sysvec = &elf32_freebsd_sysvec, - .interp_newpath = NULL, - .brand_note = &elf32_freebsd_brandnote, - .flags = BI_CAN_EXEC_DYN | BI_BRAND_NOTE -}; - -SYSINIT(oelf32, SI_SUB_EXEC, SI_ORDER_ANY, - (sysinit_cfunc_t) elf32_insert_brand_entry, - &freebsd_brand_oinfo); - -void elf_reloc_self(Elf_Dyn *dynp, Elf_Addr relocbase); - -void -elf32_dump_thread(struct thread *td, void *dst, size_t *off) -{ - size_t len; - struct pcb *pcb; - uint64_t vshr[32]; - uint64_t *vsr_dw1; - int vsr_idx; - - len = 0; - pcb = td->td_pcb; - - if (pcb->pcb_flags & PCB_VEC) { - save_vec_nodrop(td); - if (dst != NULL) { - len += elf32_populate_note(NT_PPC_VMX, - &pcb->pcb_vec, (char *)dst + len, - sizeof(pcb->pcb_vec), NULL); - } else - len += elf32_populate_note(NT_PPC_VMX, NULL, NULL, - sizeof(pcb->pcb_vec), NULL); - } - - if (pcb->pcb_flags & PCB_VSX) { - save_fpu_nodrop(td); - if (dst != NULL) { - /* - * Doubleword 0 of VSR0-VSR31 overlap with FPR0-FPR31 and - * VSR32-VSR63 overlap with VR0-VR31, so we only copy - * the non-overlapping data, which is doubleword 1 of VSR0-VSR31. - */ - for (vsr_idx = 0; vsr_idx < nitems(vshr); vsr_idx++) { - vsr_dw1 = (uint64_t *)&pcb->pcb_fpu.fpr[vsr_idx].vsr[2]; - vshr[vsr_idx] = *vsr_dw1; - } - len += elf32_populate_note(NT_PPC_VSX, - vshr, (char *)dst + len, - sizeof(vshr), NULL); - } else - len += elf32_populate_note(NT_PPC_VSX, NULL, NULL, - sizeof(vshr), NULL); - } - - *off = len; -} - -#ifndef __powerpc64__ -bool -elf_is_ifunc_reloc(Elf_Size r_info) -{ - - return (ELF_R_TYPE(r_info) == R_PPC_IRELATIVE); -} - -/* Process one elf relocation with addend. */ -static int -elf_reloc_internal(linker_file_t lf, Elf_Addr relocbase, const void *data, - int type, int local, elf_lookup_fn lookup) -{ - Elf_Addr *where; - Elf_Half *hwhere; - Elf_Addr addr; - Elf_Addr addend, val; - Elf_Word rtype, symidx; - const Elf_Rela *rela; - int error; - - switch (type) { - case ELF_RELOC_REL: - panic("PPC only supports RELA relocations"); - break; - case ELF_RELOC_RELA: - rela = (const Elf_Rela *)data; - where = (Elf_Addr *) ((uintptr_t)relocbase + rela->r_offset); - hwhere = (Elf_Half *) ((uintptr_t)relocbase + rela->r_offset); - addend = rela->r_addend; - rtype = ELF_R_TYPE(rela->r_info); - symidx = ELF_R_SYM(rela->r_info); - break; - default: - panic("elf_reloc: unknown relocation mode %d\n", type); - } - - switch (rtype) { - case R_PPC_NONE: - break; - - case R_PPC_ADDR32: /* word32 S + A */ - error = lookup(lf, symidx, 1, &addr); - if (error != 0) - return (-1); - *where = elf_relocaddr(lf, addr + addend); - break; - - case R_PPC_ADDR16_LO: /* #lo(S) */ - error = lookup(lf, symidx, 1, &addr); - if (error != 0) - return (-1); - /* - * addend values are sometimes relative to sections - * (i.e. .rodata) in rela, where in reality they - * are relative to relocbase. Detect this condition. - */ - if (addr > relocbase && addr <= (relocbase + addend)) - addr = relocbase; - addr = elf_relocaddr(lf, addr + addend); - *hwhere = addr & 0xffff; - break; - - case R_PPC_ADDR16_HA: /* #ha(S) */ - error = lookup(lf, symidx, 1, &addr); - if (error != 0) - return (-1); - /* - * addend values are sometimes relative to sections - * (i.e. .rodata) in rela, where in reality they - * are relative to relocbase. Detect this condition. - */ - if (addr > relocbase && addr <= (relocbase + addend)) - addr = relocbase; - addr = elf_relocaddr(lf, addr + addend); - *hwhere = ((addr >> 16) + ((addr & 0x8000) ? 1 : 0)) - & 0xffff; - break; - - case R_PPC_RELATIVE: /* word32 B + A */ - *where = elf_relocaddr(lf, relocbase + addend); - break; - - case R_PPC_JMP_SLOT: /* PLT jump slot entry */ - /* - * We currently only support Secure-PLT jump slots. - * Given that we reject BSS-PLT modules during load, we - * don't need to check again. - * The method we are using here is equivilent to - * LD_BIND_NOW. - */ - error = lookup(lf, symidx, 1, &addr); - if (error != 0) - return (-1); - *where = elf_relocaddr(lf, addr + addend); - break; - - case R_PPC_IRELATIVE: - addr = relocbase + addend; - val = ((Elf32_Addr (*)(void))addr)(); - if (*where != val) - *where = val; - break; - - default: - printf("kldload: unexpected relocation type %d, " - "symbol index %d\n", (int)rtype, symidx); - return (-1); - } - return (0); -} - -void -elf_reloc_self(Elf_Dyn *dynp, Elf_Addr relocbase) -{ - Elf_Rela *rela = NULL, *relalim; - Elf_Addr relasz = 0; - Elf_Addr *where; - - /* - * Extract the rela/relasz values from the dynamic section - */ - for (; dynp->d_tag != DT_NULL; dynp++) { - switch (dynp->d_tag) { - case DT_RELA: - rela = (Elf_Rela *)(relocbase+dynp->d_un.d_ptr); - break; - case DT_RELASZ: - relasz = dynp->d_un.d_val; - break; - } - } - - /* - * Relocate these values - */ - relalim = (Elf_Rela *)((caddr_t)rela + relasz); - for (; rela < relalim; rela++) { - if (ELF_R_TYPE(rela->r_info) != R_PPC_RELATIVE) - continue; - where = (Elf_Addr *)(relocbase + rela->r_offset); - *where = (Elf_Addr)(relocbase + rela->r_addend); - } -} - -int -elf_reloc(linker_file_t lf, Elf_Addr relocbase, const void *data, int type, - elf_lookup_fn lookup) -{ - - return (elf_reloc_internal(lf, relocbase, data, type, 0, lookup)); -} - -int -elf_reloc_local(linker_file_t lf, Elf_Addr relocbase, const void *data, - int type, elf_lookup_fn lookup) -{ - - return (elf_reloc_internal(lf, relocbase, data, type, 1, lookup)); -} - -int -elf_cpu_load_file(linker_file_t lf) -{ - - /* Only sync the cache for non-kernel modules */ - if (lf->id != 1) - __syncicache(lf->address, lf->size); - return (0); -} - -int -elf_cpu_unload_file(linker_file_t lf __unused) -{ - - return (0); -} - -static void -ppc32_runtime_resolve() -{ - - /* - * Since we don't support lazy binding, panic immediately if anyone - * manages to call the runtime resolver. - */ - panic("kldload: Runtime resolver was called unexpectedly!"); -} - -int -elf_cpu_parse_dynamic(caddr_t loadbase, Elf_Dyn *dynamic) -{ - Elf_Dyn *dp; - bool has_plt = false; - bool secure_plt = false; - Elf_Addr *got; - - for (dp = dynamic; dp->d_tag != DT_NULL; dp++) { - switch (dp->d_tag) { - case DT_PPC_GOT: - secure_plt = true; - got = (Elf_Addr *)(loadbase + dp->d_un.d_ptr); - /* Install runtime resolver canary. */ - got[1] = (Elf_Addr)ppc32_runtime_resolve; - got[2] = (Elf_Addr)0; - break; - case DT_PLTGOT: - has_plt = true; - break; - } - } - - if (has_plt && !secure_plt) { - printf("kldload: BSS-PLT modules are not supported.\n"); - return (-1); - } - return (0); -} -#endif - -#ifdef __powerpc64__ -static void -ppc32_fixlimit(struct rlimit *rl, int which) -{ - switch (which) { - case RLIMIT_DATA: - if (ppc32_maxdsiz != 0) { - if (rl->rlim_cur > ppc32_maxdsiz) - rl->rlim_cur = ppc32_maxdsiz; - if (rl->rlim_max > ppc32_maxdsiz) - rl->rlim_max = ppc32_maxdsiz; - } - break; - case RLIMIT_STACK: - if (ppc32_maxssiz != 0) { - if (rl->rlim_cur > ppc32_maxssiz) - rl->rlim_cur = ppc32_maxssiz; - if (rl->rlim_max > ppc32_maxssiz) - rl->rlim_max = ppc32_maxssiz; - } - break; - } -} -#endif diff --git a/sys/powerpc/powerpc/elf64_machdep.c b/sys/powerpc/powerpc/elf64_machdep.c deleted file mode 100644 index a1cf7d41e38..00000000000 --- a/sys/powerpc/powerpc/elf64_machdep.c +++ /dev/null @@ -1,463 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 1996-1998 John D. Polstra. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include - -#include - -static void exec_setregs_funcdesc(struct thread *td, struct image_params *imgp, - uintptr_t stack); - -struct sysentvec elf64_freebsd_sysvec_v1 = { - .sv_size = SYS_MAXSYSCALL, - .sv_table = sysent, - .sv_fixup = __elfN(freebsd_fixup), - .sv_sendsig = sendsig, - .sv_sigcode = sigcode64, - .sv_szsigcode = &szsigcode64, - .sv_name = "FreeBSD ELF64", - .sv_coredump = __elfN(coredump), - .sv_elf_core_osabi = ELFOSABI_FREEBSD, - .sv_elf_core_abi_vendor = FREEBSD_ABI_VENDOR, - .sv_elf_core_prepare_notes = __elfN(prepare_notes), - .sv_imgact_try = NULL, - .sv_minsigstksz = MINSIGSTKSZ, - .sv_minuser = VM_MIN_ADDRESS, - .sv_maxuser = VM_MAXUSER_ADDRESS, - .sv_usrstack = USRSTACK, - .sv_psstrings = PS_STRINGS, - .sv_psstringssz = sizeof(struct ps_strings), - .sv_stackprot = VM_PROT_ALL, - .sv_copyout_auxargs = __elfN(powerpc_copyout_auxargs), - .sv_copyout_strings = exec_copyout_strings, - .sv_setregs = exec_setregs_funcdesc, - .sv_fixlimit = NULL, - .sv_maxssiz = NULL, - .sv_flags = SV_ABI_FREEBSD | SV_LP64 | SV_SHP | SV_ASLR | - SV_TIMEKEEP | SV_RNG_SEED_VER | SV_SIGSYS, - .sv_set_syscall_retval = cpu_set_syscall_retval, - .sv_fetch_syscall_args = cpu_fetch_syscall_args, - .sv_syscallnames = syscallnames, - .sv_shared_page_base = SHAREDPAGE, - .sv_shared_page_len = PAGE_SIZE, - .sv_schedtail = NULL, - .sv_thread_detach = NULL, - .sv_trap = NULL, - .sv_hwcap = &cpu_features, - .sv_hwcap2 = &cpu_features2, - .sv_onexec_old = exec_onexec_old, - .sv_onexit = exit_onexit, - .sv_regset_begin = SET_BEGIN(__elfN(regset)), - .sv_regset_end = SET_LIMIT(__elfN(regset)), -}; - -struct sysentvec elf64_freebsd_sysvec_v2 = { - .sv_size = SYS_MAXSYSCALL, - .sv_table = sysent, - .sv_fixup = __elfN(freebsd_fixup), - .sv_sendsig = sendsig, - .sv_sigcode = sigcode64, /* Fixed up in ppc64_init_sysvecs(). */ - .sv_szsigcode = &szsigcode64, - .sv_name = "FreeBSD ELF64 V2", - .sv_coredump = __elfN(coredump), - .sv_elf_core_osabi = ELFOSABI_FREEBSD, - .sv_elf_core_abi_vendor = FREEBSD_ABI_VENDOR, - .sv_elf_core_prepare_notes = __elfN(prepare_notes), - .sv_imgact_try = NULL, - .sv_minsigstksz = MINSIGSTKSZ, - .sv_minuser = VM_MIN_ADDRESS, - .sv_maxuser = VM_MAXUSER_ADDRESS, - .sv_usrstack = USRSTACK, - .sv_psstrings = PS_STRINGS, - .sv_psstringssz = sizeof(struct ps_strings), - .sv_stackprot = VM_PROT_ALL, - .sv_copyout_auxargs = __elfN(powerpc_copyout_auxargs), - .sv_copyout_strings = exec_copyout_strings, - .sv_setregs = exec_setregs, - .sv_fixlimit = NULL, - .sv_maxssiz = NULL, - .sv_flags = SV_ABI_FREEBSD | SV_LP64 | SV_SHP | - SV_TIMEKEEP | SV_RNG_SEED_VER | SV_SIGSYS, - .sv_set_syscall_retval = cpu_set_syscall_retval, - .sv_fetch_syscall_args = cpu_fetch_syscall_args, - .sv_syscallnames = syscallnames, - .sv_shared_page_base = SHAREDPAGE, - .sv_shared_page_len = PAGE_SIZE, - .sv_schedtail = NULL, - .sv_thread_detach = NULL, - .sv_trap = NULL, - .sv_hwcap = &cpu_features, - .sv_hwcap2 = &cpu_features2, - .sv_onexec_old = exec_onexec_old, - .sv_onexit = exit_onexit, - .sv_regset_begin = SET_BEGIN(__elfN(regset)), - .sv_regset_end = SET_LIMIT(__elfN(regset)), -}; - -static boolean_t ppc64_elfv1_header_match(struct image_params *params, - int32_t *, uint32_t *); -static boolean_t ppc64_elfv2_header_match(struct image_params *params, - int32_t *, uint32_t *); - -static Elf64_Brandinfo freebsd_brand_info_elfv1 = { - .brand = ELFOSABI_FREEBSD, - .machine = EM_PPC64, - .compat_3_brand = "FreeBSD", - .emul_path = NULL, - .interp_path = "/libexec/ld-elf.so.1", - .sysvec = &elf64_freebsd_sysvec_v1, - .interp_newpath = NULL, - .brand_note = &elf64_freebsd_brandnote, - .flags = BI_CAN_EXEC_DYN | BI_BRAND_NOTE, - .header_supported = &ppc64_elfv1_header_match -}; - -SYSINIT(elf64v1, SI_SUB_EXEC, SI_ORDER_ANY, - (sysinit_cfunc_t) elf64_insert_brand_entry, - &freebsd_brand_info_elfv1); - -static Elf64_Brandinfo freebsd_brand_info_elfv2 = { - .brand = ELFOSABI_FREEBSD, - .machine = EM_PPC64, - .compat_3_brand = "FreeBSD", - .emul_path = NULL, - .interp_path = "/libexec/ld-elf.so.1", - .sysvec = &elf64_freebsd_sysvec_v2, - .interp_newpath = NULL, - .brand_note = &elf64_freebsd_brandnote, - .flags = BI_CAN_EXEC_DYN | BI_BRAND_NOTE, - .header_supported = &ppc64_elfv2_header_match -}; - -SYSINIT(elf64v2, SI_SUB_EXEC, SI_ORDER_ANY, - (sysinit_cfunc_t) elf64_insert_brand_entry, - &freebsd_brand_info_elfv2); - -static Elf64_Brandinfo freebsd_brand_oinfo = { - .brand = ELFOSABI_FREEBSD, - .machine = EM_PPC64, - .compat_3_brand = "FreeBSD", - .emul_path = NULL, - .interp_path = "/usr/libexec/ld-elf.so.1", - .sysvec = &elf64_freebsd_sysvec_v1, - .interp_newpath = NULL, - .brand_note = &elf64_freebsd_brandnote, - .flags = BI_CAN_EXEC_DYN | BI_BRAND_NOTE, - .header_supported = &ppc64_elfv1_header_match -}; - -SYSINIT(oelf64, SI_SUB_EXEC, SI_ORDER_ANY, - (sysinit_cfunc_t) elf64_insert_brand_entry, - &freebsd_brand_oinfo); - -void elf_reloc_self(Elf_Dyn *dynp, Elf_Addr relocbase); - -static void -ppc64_init_sysvecs(void *arg) -{ - exec_sysvec_init(&elf64_freebsd_sysvec_v2); - exec_sysvec_init_secondary(&elf64_freebsd_sysvec_v2, - &elf64_freebsd_sysvec_v1); - /* - * Adjust elfv2 sigcode after elfv1 sysvec is initialized. - * exec_sysvec_init_secondary() assumes secondary sysvecs use - * identical signal code, and skips allocating a second copy. - * Since the ELFv2 trampoline is a strict subset of the ELFv1 code, - * we can work around this by adjusting the base address. This also - * avoids two copies of the trampoline code being allocated! - */ - elf64_freebsd_sysvec_v2.sv_sigcode_base += - (uintptr_t)sigcode64_elfv2 - (uintptr_t)&sigcode64; - elf64_freebsd_sysvec_v2.sv_szsigcode = &szsigcode64_elfv2; -} -SYSINIT(elf64_sysvec, SI_SUB_EXEC, SI_ORDER_ANY, ppc64_init_sysvecs, NULL); - -static boolean_t -ppc64_elfv1_header_match(struct image_params *params, int32_t *osrel __unused, - uint32_t *fctl0 __unused) -{ - const Elf64_Ehdr *hdr = (const Elf64_Ehdr *)params->image_header; - int abi = (hdr->e_flags & 3); - - return (abi == 0 || abi == 1); -} - -static boolean_t -ppc64_elfv2_header_match(struct image_params *params, int32_t *osrel __unused, - uint32_t *fctl0 __unused) -{ - const Elf64_Ehdr *hdr = (const Elf64_Ehdr *)params->image_header; - int abi = (hdr->e_flags & 3); - - return (abi == 2); -} - -static void -exec_setregs_funcdesc(struct thread *td, struct image_params *imgp, - uintptr_t stack) -{ - struct trapframe *tf; - register_t entry_desc[3]; - - tf = trapframe(td); - exec_setregs(td, imgp, stack); - - /* - * For 64-bit ELFv1, we need to disentangle the function - * descriptor - * - * 0. entry point - * 1. TOC value (r2) - * 2. Environment pointer (r11) - */ - - (void)copyin((void *)imgp->entry_addr, entry_desc, - sizeof(entry_desc)); - tf->srr0 = entry_desc[0] + imgp->reloc_base; - tf->fixreg[2] = entry_desc[1] + imgp->reloc_base; - tf->fixreg[11] = entry_desc[2] + imgp->reloc_base; -} - -void -elf64_dump_thread(struct thread *td, void *dst, size_t *off) -{ - size_t len; - struct pcb *pcb; - uint64_t vshr[32]; - uint64_t *vsr_dw1; - int vsr_idx; - - len = 0; - pcb = td->td_pcb; - - if (pcb->pcb_flags & PCB_VEC) { - save_vec_nodrop(td); - if (dst != NULL) { - len += elf64_populate_note(NT_PPC_VMX, - &pcb->pcb_vec, (char *)dst + len, - sizeof(pcb->pcb_vec), NULL); - } else - len += elf64_populate_note(NT_PPC_VMX, NULL, NULL, - sizeof(pcb->pcb_vec), NULL); - } - - if (pcb->pcb_flags & PCB_VSX) { - save_fpu_nodrop(td); - if (dst != NULL) { - /* - * Doubleword 0 of VSR0-VSR31 overlap with FPR0-FPR31 and - * VSR32-VSR63 overlap with VR0-VR31, so we only copy - * the non-overlapping data, which is doubleword 1 of VSR0-VSR31. - */ - for (vsr_idx = 0; vsr_idx < nitems(vshr); vsr_idx++) { - vsr_dw1 = (uint64_t *)&pcb->pcb_fpu.fpr[vsr_idx].vsr[2]; - vshr[vsr_idx] = *vsr_dw1; - } - len += elf64_populate_note(NT_PPC_VSX, - vshr, (char *)dst + len, - sizeof(vshr), NULL); - } else - len += elf64_populate_note(NT_PPC_VSX, NULL, NULL, - sizeof(vshr), NULL); - } - - *off = len; -} - -bool -elf_is_ifunc_reloc(Elf_Size r_info) -{ - - return (ELF_R_TYPE(r_info) == R_PPC_IRELATIVE); -} - -/* Process one elf relocation with addend. */ -static int -elf_reloc_internal(linker_file_t lf, Elf_Addr relocbase, const void *data, - int type, int local, elf_lookup_fn lookup) -{ - Elf_Addr *where; - Elf_Addr addr; - Elf_Addr addend, val; - Elf_Word rtype, symidx; - const Elf_Rela *rela; - int error; - - switch (type) { - case ELF_RELOC_REL: - panic("PPC only supports RELA relocations"); - break; - case ELF_RELOC_RELA: - rela = (const Elf_Rela *)data; - where = (Elf_Addr *) (relocbase + rela->r_offset); - addend = rela->r_addend; - rtype = ELF_R_TYPE(rela->r_info); - symidx = ELF_R_SYM(rela->r_info); - break; - default: - panic("elf_reloc: unknown relocation mode %d\n", type); - } - - switch (rtype) { - case R_PPC_NONE: - break; - - case R_PPC64_ADDR64: /* doubleword64 S + A */ - error = lookup(lf, symidx, 1, &addr); - if (error != 0) - return (-1); - addr += addend; - *where = addr; - break; - - case R_PPC_RELATIVE: /* doubleword64 B + A */ - *where = elf_relocaddr(lf, relocbase + addend); - break; - - case R_PPC_JMP_SLOT: /* function descriptor copy */ - lookup(lf, symidx, 1, &addr); -#if !defined(_CALL_ELF) || _CALL_ELF == 1 - memcpy(where, (Elf_Addr *)addr, 3*sizeof(Elf_Addr)); -#else - *where = addr; -#endif - __asm __volatile("dcbst 0,%0; sync" :: "r"(where) : "memory"); - break; - - case R_PPC_IRELATIVE: - addr = relocbase + addend; - val = ((Elf64_Addr (*)(void))addr)(); - if (*where != val) - *where = val; - break; - - default: - printf("kldload: unexpected relocation type %d, " - "symbol index %d\n", (int)rtype, symidx); - return (-1); - } - return (0); -} - -void -elf_reloc_self(Elf_Dyn *dynp, Elf_Addr relocbase) -{ - Elf_Rela *rela = NULL, *relalim; - Elf_Addr relasz = 0; - Elf_Addr *where; - - /* - * Extract the rela/relasz values from the dynamic section - */ - for (; dynp->d_tag != DT_NULL; dynp++) { - switch (dynp->d_tag) { - case DT_RELA: - rela = (Elf_Rela *)(relocbase+dynp->d_un.d_ptr); - break; - case DT_RELASZ: - relasz = dynp->d_un.d_val; - break; - } - } - - /* - * Relocate these values - */ - relalim = (Elf_Rela *)((caddr_t)rela + relasz); - for (; rela < relalim; rela++) { - if (ELF_R_TYPE(rela->r_info) != R_PPC_RELATIVE) - continue; - where = (Elf_Addr *)(relocbase + rela->r_offset); - *where = (Elf_Addr)(relocbase + rela->r_addend); - } -} - -int -elf_reloc(linker_file_t lf, Elf_Addr relocbase, const void *data, int type, - elf_lookup_fn lookup) -{ - - return (elf_reloc_internal(lf, relocbase, data, type, 0, lookup)); -} - -int -elf_reloc_local(linker_file_t lf, Elf_Addr relocbase, const void *data, - int type, elf_lookup_fn lookup) -{ - - return (elf_reloc_internal(lf, relocbase, data, type, 1, lookup)); -} - -int -elf_cpu_load_file(linker_file_t lf) -{ - /* Only sync the cache for non-kernel modules */ - if (lf->id != 1) - __syncicache(lf->address, lf->size); - return (0); -} - -int -elf_cpu_unload_file(linker_file_t lf __unused) -{ - - return (0); -} - -int -elf_cpu_parse_dynamic(caddr_t loadbase __unused, Elf_Dyn *dynamic __unused) -{ - - return (0); -} diff --git a/sys/powerpc/powerpc/elf_common.c b/sys/powerpc/powerpc/elf_common.c deleted file mode 100644 index e90c75bcfb4..00000000000 --- a/sys/powerpc/powerpc/elf_common.c +++ /dev/null @@ -1,102 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2019 Justin Hibbits - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer - * in this position and unchanged. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -static int -__elfN(powerpc_copyout_auxargs)(struct image_params *imgp, uintptr_t base) -{ - Elf_Auxargs *args; - Elf_Auxinfo *argarray, *pos; - int error; - - /* - * XXX If we can't find image's OSREL, assume it uses the new auxv - * format. - * - * This is specially important for rtld, that is not tagged. Using - * direct exec mode with new (ELFv2) binaries that expect the new auxv - * format would result in crashes otherwise. - * - * Unfortunately, this may break direct exec'ing old binaries, - * but it seems better to correctly support new binaries by default, - * considering the transition to ELFv2 happened quite some time - * ago. If needed, a sysctl may be added to allow old auxv format to - * be used when OSREL is not found. - */ - if (imgp->proc->p_osrel >= P_OSREL_POWERPC_NEW_AUX_ARGS || - imgp->proc->p_osrel == 0) - return (__elfN(freebsd_copyout_auxargs)(imgp, base)); - - args = (Elf_Auxargs *)imgp->auxargs; - argarray = pos = malloc(AT_OLD_COUNT * sizeof(*pos), M_TEMP, - M_WAITOK | M_ZERO); - - if (args->execfd != -1) - AUXARGS_ENTRY(pos, AT_OLD_EXECFD, args->execfd); - AUXARGS_ENTRY(pos, AT_OLD_PHDR, args->phdr); - AUXARGS_ENTRY(pos, AT_OLD_PHENT, args->phent); - AUXARGS_ENTRY(pos, AT_OLD_PHNUM, args->phnum); - AUXARGS_ENTRY(pos, AT_OLD_PAGESZ, args->pagesz); - AUXARGS_ENTRY(pos, AT_OLD_FLAGS, args->flags); - AUXARGS_ENTRY(pos, AT_OLD_ENTRY, args->entry); - AUXARGS_ENTRY(pos, AT_OLD_BASE, args->base); - AUXARGS_ENTRY(pos, AT_OLD_EHDRFLAGS, args->hdr_eflags); - if (imgp->execpathp != 0) - AUXARGS_ENTRY_PTR(pos, AT_OLD_EXECPATH, imgp->execpathp); - AUXARGS_ENTRY(pos, AT_OLD_OSRELDATE, - imgp->proc->p_ucred->cr_prison->pr_osreldate); - if (imgp->canary != 0) { - AUXARGS_ENTRY_PTR(pos, AT_OLD_CANARY, imgp->canary); - AUXARGS_ENTRY(pos, AT_OLD_CANARYLEN, imgp->canarylen); - } - AUXARGS_ENTRY(pos, AT_OLD_NCPUS, mp_ncpus); - if (imgp->pagesizes != 0) { - AUXARGS_ENTRY_PTR(pos, AT_OLD_PAGESIZES, imgp->pagesizes); - AUXARGS_ENTRY(pos, AT_OLD_PAGESIZESLEN, imgp->pagesizeslen); - } - if (imgp->sysent->sv_timekeep_base != 0) { - AUXARGS_ENTRY(pos, AT_OLD_TIMEKEEP, - imgp->sysent->sv_timekeep_base); - } - AUXARGS_ENTRY(pos, AT_OLD_STACKPROT, imgp->sysent->sv_shared_page_obj - != NULL && imgp->stack_prot != 0 ? imgp->stack_prot : - imgp->sysent->sv_stackprot); - if (imgp->sysent->sv_hwcap != NULL) - AUXARGS_ENTRY(pos, AT_OLD_HWCAP, *imgp->sysent->sv_hwcap); - if (imgp->sysent->sv_hwcap2 != NULL) - AUXARGS_ENTRY(pos, AT_OLD_HWCAP2, *imgp->sysent->sv_hwcap2); - AUXARGS_ENTRY(pos, AT_OLD_NULL, 0); - - free(imgp->auxargs, M_TEMP); - imgp->auxargs = NULL; - KASSERT(pos - argarray <= AT_OLD_COUNT, ("Too many auxargs")); - - error = copyout(argarray, (void *)base, sizeof(*argarray) * AT_OLD_COUNT); - free(argarray, M_TEMP); - return (error); -} diff --git a/sys/powerpc/powerpc/exec_machdep.c b/sys/powerpc/powerpc/exec_machdep.c deleted file mode 100644 index 4c7eba0b296..00000000000 --- a/sys/powerpc/powerpc/exec_machdep.c +++ /dev/null @@ -1,1217 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause AND BSD-2-Clause - * - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*- - * Copyright (C) 2001 Benno Rice - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $ - */ - -#include -#include "opt_fpu_emu.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#ifdef FPU_EMU -#include -#endif - -#ifdef COMPAT_FREEBSD32 -#include -#include -#include - -typedef struct __ucontext32 { - sigset_t uc_sigmask; - mcontext32_t uc_mcontext; - uint32_t uc_link; - struct sigaltstack32 uc_stack; - uint32_t uc_flags; - uint32_t __spare__[4]; -} ucontext32_t; - -struct sigframe32 { - ucontext32_t sf_uc; - struct siginfo32 sf_si; -}; - -static int grab_mcontext32(struct thread *td, mcontext32_t *, int flags); -#endif - -static int grab_mcontext(struct thread *, mcontext_t *, int); - -static void cleanup_power_extras(struct thread *); - -#ifdef __powerpc64__ -extern struct sysentvec elf64_freebsd_sysvec_v2; -#endif - -void -sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) -{ - struct trapframe *tf; - struct sigacts *psp; - struct sigframe sf; - struct thread *td; - struct proc *p; - #ifdef COMPAT_FREEBSD32 - struct siginfo32 siginfo32; - struct sigframe32 sf32; - #endif - size_t sfpsize; - caddr_t sfp, usfp; - register_t sp; - int oonstack, rndfsize; - int sig; - int code; - - td = curthread; - p = td->td_proc; - PROC_LOCK_ASSERT(p, MA_OWNED); - - psp = p->p_sigacts; - mtx_assert(&psp->ps_mtx, MA_OWNED); - tf = td->td_frame; - - /* - * Fill siginfo structure. - */ - ksi->ksi_info.si_signo = ksi->ksi_signo; - ksi->ksi_info.si_addr = - (void *)((tf->exc == EXC_DSI || tf->exc == EXC_DSE) ? - tf->dar : tf->srr0); - - #ifdef COMPAT_FREEBSD32 - if (SV_PROC_FLAG(p, SV_ILP32)) { - siginfo_to_siginfo32(&ksi->ksi_info, &siginfo32); - sig = siginfo32.si_signo; - code = siginfo32.si_code; - sfp = (caddr_t)&sf32; - sfpsize = sizeof(sf32); - rndfsize = roundup(sizeof(sf32), 16); - sp = (uint32_t)tf->fixreg[1]; - oonstack = sigonstack(sp); - - /* - * Save user context - */ - - memset(&sf32, 0, sizeof(sf32)); - grab_mcontext32(td, &sf32.sf_uc.uc_mcontext, 0); - - sf32.sf_uc.uc_sigmask = *mask; - sf32.sf_uc.uc_stack.ss_sp = (uintptr_t)td->td_sigstk.ss_sp; - sf32.sf_uc.uc_stack.ss_size = (uint32_t)td->td_sigstk.ss_size; - sf32.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) - ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; - - sf32.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; - } else { - #endif - sig = ksi->ksi_signo; - code = ksi->ksi_code; - sfp = (caddr_t)&sf; - sfpsize = sizeof(sf); - #ifdef __powerpc64__ - /* - * 64-bit PPC defines a 288 byte scratch region - * below the stack. - */ - rndfsize = 288 + roundup(sizeof(sf), 48); - #else - rndfsize = roundup(sizeof(sf), 16); - #endif - sp = tf->fixreg[1]; - oonstack = sigonstack(sp); - - /* - * Save user context - */ - - memset(&sf, 0, sizeof(sf)); - grab_mcontext(td, &sf.sf_uc.uc_mcontext, 0); - - sf.sf_uc.uc_sigmask = *mask; - sf.sf_uc.uc_stack = td->td_sigstk; - sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) - ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; - - sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; - #ifdef COMPAT_FREEBSD32 - } - #endif - - CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, - catcher, sig); - - /* - * Allocate and validate space for the signal handler context. - */ - if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && - SIGISMEMBER(psp->ps_sigonstack, sig)) { - usfp = (void *)(((uintptr_t)td->td_sigstk.ss_sp + - td->td_sigstk.ss_size - rndfsize) & ~0xFul); - } else { - usfp = (void *)((sp - rndfsize) & ~0xFul); - } - - /* - * Set Floating Point facility to "Ignore Exceptions Mode" so signal - * handler can run. - */ - if (td->td_pcb->pcb_flags & PCB_FPU) - tf->srr1 = tf->srr1 & ~(PSL_FE0 | PSL_FE1); - - /* - * Set up the registers to return to sigcode. - * - * r1/sp - sigframe ptr - * lr - sig function, dispatched to by blrl in trampoline - * r3 - sig number - * r4 - SIGINFO ? &siginfo : exception code - * r5 - user context - * srr0 - trampoline function addr - */ - tf->lr = (register_t)catcher; - tf->fixreg[1] = (register_t)usfp; - tf->fixreg[FIRSTARG] = sig; - #ifdef COMPAT_FREEBSD32 - tf->fixreg[FIRSTARG+2] = (register_t)usfp + - ((SV_PROC_FLAG(p, SV_ILP32)) ? - offsetof(struct sigframe32, sf_uc) : - offsetof(struct sigframe, sf_uc)); - #else - tf->fixreg[FIRSTARG+2] = (register_t)usfp + - offsetof(struct sigframe, sf_uc); - #endif - if (SIGISMEMBER(psp->ps_siginfo, sig)) { - /* - * Signal handler installed with SA_SIGINFO. - */ - #ifdef COMPAT_FREEBSD32 - if (SV_PROC_FLAG(p, SV_ILP32)) { - sf32.sf_si = siginfo32; - tf->fixreg[FIRSTARG+1] = (register_t)usfp + - offsetof(struct sigframe32, sf_si); - sf32.sf_si = siginfo32; - } else { - #endif - tf->fixreg[FIRSTARG+1] = (register_t)usfp + - offsetof(struct sigframe, sf_si); - sf.sf_si = ksi->ksi_info; - #ifdef COMPAT_FREEBSD32 - } - #endif - } else { - /* Old FreeBSD-style arguments. */ - tf->fixreg[FIRSTARG+1] = code; - tf->fixreg[FIRSTARG+3] = (tf->exc == EXC_DSI) ? - tf->dar : tf->srr0; - } - mtx_unlock(&psp->ps_mtx); - PROC_UNLOCK(p); - - tf->srr0 = (register_t)p->p_sysent->sv_sigcode_base; - - /* - * copy the frame out to userland. - */ - if (copyout(sfp, usfp, sfpsize) != 0) { - /* - * Process has trashed its stack. Kill it. - */ - CTR2(KTR_SIG, "sendsig: sigexit td=%p sfp=%p", td, sfp); - PROC_LOCK(p); - sigexit(td, SIGILL); - } - - CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, - tf->srr0, tf->fixreg[1]); - - PROC_LOCK(p); - mtx_lock(&psp->ps_mtx); -} - -int -sys_sigreturn(struct thread *td, struct sigreturn_args *uap) -{ - ucontext_t uc; - int error; - - CTR2(KTR_SIG, "sigreturn: td=%p ucp=%p", td, uap->sigcntxp); - - if (copyin(uap->sigcntxp, &uc, sizeof(uc)) != 0) { - CTR1(KTR_SIG, "sigreturn: efault td=%p", td); - return (EFAULT); - } - - error = set_mcontext(td, &uc.uc_mcontext); - if (error != 0) - return (error); - - /* - * Save FPU state if needed. User may have changed it on - * signal handler - */ - if (uc.uc_mcontext.mc_srr1 & PSL_FP) - save_fpu(td); - - kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); - - CTR3(KTR_SIG, "sigreturn: return td=%p pc=%#x sp=%#x", - td, uc.uc_mcontext.mc_srr0, uc.uc_mcontext.mc_gpr[1]); - - return (EJUSTRETURN); -} - -#ifdef COMPAT_FREEBSD4 -int -freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) -{ - - return sys_sigreturn(td, (struct sigreturn_args *)uap); -} -#endif - -/* - * Construct a PCB from a trapframe. This is called from kdb_trap() where - * we want to start a backtrace from the function that caused us to enter - * the debugger. We have the context in the trapframe, but base the trace - * on the PCB. The PCB doesn't have to be perfect, as long as it contains - * enough for a backtrace. - */ -void -makectx(struct trapframe *tf, struct pcb *pcb) -{ - - pcb->pcb_lr = tf->srr0; - pcb->pcb_sp = tf->fixreg[1]; -} - -/* - * get_mcontext/sendsig helper routine that doesn't touch the - * proc lock - */ -static int -grab_mcontext(struct thread *td, mcontext_t *mcp, int flags) -{ - struct pcb *pcb; - int i; - - pcb = td->td_pcb; - - memset(mcp, 0, sizeof(mcontext_t)); - - mcp->mc_vers = _MC_VERSION; - mcp->mc_flags = 0; - memcpy(&mcp->mc_frame, td->td_frame, sizeof(struct trapframe)); - if (flags & GET_MC_CLEAR_RET) { - mcp->mc_gpr[3] = 0; - mcp->mc_gpr[4] = 0; - } - - /* - * This assumes that floating-point context is *not* lazy, - * so if the thread has used FP there would have been a - * FP-unavailable exception that would have set things up - * correctly. - */ - if (pcb->pcb_flags & PCB_FPREGS) { - if (pcb->pcb_flags & PCB_FPU) { - KASSERT(td == curthread, - ("get_mcontext: fp save not curthread")); - critical_enter(); - save_fpu(td); - critical_exit(); - } - mcp->mc_flags |= _MC_FP_VALID; - memcpy(&mcp->mc_fpscr, &pcb->pcb_fpu.fpscr, sizeof(double)); - for (i = 0; i < 32; i++) - memcpy(&mcp->mc_fpreg[i], &pcb->pcb_fpu.fpr[i].fpr, - sizeof(double)); - } - - if (pcb->pcb_flags & PCB_VSX) { - for (i = 0; i < 32; i++) - memcpy(&mcp->mc_vsxfpreg[i], - &pcb->pcb_fpu.fpr[i].vsr[2], sizeof(double)); - } - - /* - * Repeat for Altivec context - */ - - if (pcb->pcb_flags & PCB_VEC) { - KASSERT(td == curthread, - ("get_mcontext: fp save not curthread")); - critical_enter(); - save_vec(td); - critical_exit(); - mcp->mc_flags |= _MC_AV_VALID; - mcp->mc_vscr = pcb->pcb_vec.vscr; - mcp->mc_vrsave = pcb->pcb_vec.vrsave; - memcpy(mcp->mc_avec, pcb->pcb_vec.vr, sizeof(mcp->mc_avec)); - } - - mcp->mc_len = sizeof(*mcp); - - return (0); -} - -int -get_mcontext(struct thread *td, mcontext_t *mcp, int flags) -{ - int error; - - error = grab_mcontext(td, mcp, flags); - if (error == 0) { - PROC_LOCK(curthread->td_proc); - mcp->mc_onstack = sigonstack(td->td_frame->fixreg[1]); - PROC_UNLOCK(curthread->td_proc); - } - - return (error); -} - -int -set_mcontext(struct thread *td, mcontext_t *mcp) -{ - struct pcb *pcb; - struct trapframe *tf; - register_t tls; - int i; - - pcb = td->td_pcb; - tf = td->td_frame; - - if (mcp->mc_vers != _MC_VERSION || mcp->mc_len != sizeof(*mcp)) - return (EINVAL); - - /* - * Don't let the user change privileged MSR bits. - * - * psl_userstatic is used here to mask off any bits that can - * legitimately vary between user contexts (Floating point - * exception control and any facilities that we are using the - * "enable on first use" pattern with.) - * - * All other bits are required to match psl_userset(32). - * - * Remember to update the platform cpu_init code when implementing - * support for a new conditional facility! - */ - if ((mcp->mc_srr1 & psl_userstatic) != (tf->srr1 & psl_userstatic)) { - return (EINVAL); - } - - /* Copy trapframe, preserving TLS pointer across context change */ - if (SV_PROC_FLAG(td->td_proc, SV_LP64)) - tls = tf->fixreg[13]; - else - tls = tf->fixreg[2]; - memcpy(tf, mcp->mc_frame, sizeof(mcp->mc_frame)); - if (SV_PROC_FLAG(td->td_proc, SV_LP64)) - tf->fixreg[13] = tls; - else - tf->fixreg[2] = tls; - - /* - * Force the FPU back off to ensure the new context will not bypass - * the enable_fpu() setup code accidentally. - * - * This prevents an issue where a process that uses floating point - * inside a signal handler could end up in a state where the MSR - * did not match pcb_flags. - * - * Additionally, ensure VSX is disabled as well, as it is illegal - * to leave it turned on when FP or VEC are off. - */ - tf->srr1 &= ~(PSL_FP | PSL_VSX); - pcb->pcb_flags &= ~(PCB_FPU | PCB_VSX); - - if (mcp->mc_flags & _MC_FP_VALID) { - /* enable_fpu() will happen lazily on a fault */ - pcb->pcb_flags |= PCB_FPREGS; - memcpy(&pcb->pcb_fpu.fpscr, &mcp->mc_fpscr, sizeof(double)); - bzero(pcb->pcb_fpu.fpr, sizeof(pcb->pcb_fpu.fpr)); - for (i = 0; i < 32; i++) { - memcpy(&pcb->pcb_fpu.fpr[i].fpr, &mcp->mc_fpreg[i], - sizeof(double)); - memcpy(&pcb->pcb_fpu.fpr[i].vsr[2], - &mcp->mc_vsxfpreg[i], sizeof(double)); - } - } - - if (mcp->mc_flags & _MC_AV_VALID) { - if ((pcb->pcb_flags & PCB_VEC) != PCB_VEC) { - critical_enter(); - enable_vec(td); - critical_exit(); - } - pcb->pcb_vec.vscr = mcp->mc_vscr; - pcb->pcb_vec.vrsave = mcp->mc_vrsave; - memcpy(pcb->pcb_vec.vr, mcp->mc_avec, sizeof(mcp->mc_avec)); - } else { - tf->srr1 &= ~PSL_VEC; - pcb->pcb_flags &= ~PCB_VEC; - } - - return (0); -} - -/* - * Clean up extra POWER state. Some per-process registers and states are not - * managed by the MSR, so must be cleaned up explicitly on thread exit. - * - * Currently this includes: - * DSCR -- Data stream control register (PowerISA 2.06+) - * FSCR -- Facility Status and Control Register (PowerISA 2.07+) - */ -static void -cleanup_power_extras(struct thread *td) -{ - uint32_t pcb_flags; - - if (td != curthread) - return; - - pcb_flags = td->td_pcb->pcb_flags; - /* Clean up registers not managed by MSR. */ - if (pcb_flags & PCB_CFSCR) - mtspr(SPR_FSCR, 0); - if (pcb_flags & PCB_CDSCR) - mtspr(SPR_DSCRP, 0); - - cleanup_fpscr(); -} - -/* - * Set set up registers on exec. - */ -void -exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack) -{ - struct trapframe *tf; - register_t argc; - - tf = trapframe(td); - bzero(tf, sizeof *tf); - #ifdef __powerpc64__ - tf->fixreg[1] = -roundup(-stack + 48, 16); - #else - tf->fixreg[1] = -roundup(-stack + 8, 16); - #endif - - /* - * Set up arguments for _start(): - * _start(argc, argv, envp, obj, cleanup, ps_strings); - * - * Notes: - * - obj and cleanup are the auxilliary and termination - * vectors. They are fixed up by ld.elf_so. - * - ps_strings is a NetBSD extention, and will be - * ignored by executables which are strictly - * compliant with the SVR4 ABI. - */ - - /* Collect argc from the user stack */ - argc = fuword((void *)stack); - - tf->fixreg[3] = argc; - tf->fixreg[4] = stack + sizeof(register_t); - tf->fixreg[5] = stack + (2 + argc)*sizeof(register_t); - tf->fixreg[6] = 0; /* auxiliary vector */ - tf->fixreg[7] = 0; /* termination vector */ - tf->fixreg[8] = (register_t)imgp->ps_strings; /* NetBSD extension */ - - tf->srr0 = imgp->entry_addr; - #ifdef __powerpc64__ - tf->fixreg[12] = imgp->entry_addr; - #endif - tf->srr1 = psl_userset | PSL_FE_DFLT; - cleanup_power_extras(td); - td->td_pcb->pcb_flags = 0; -} - -#ifdef COMPAT_FREEBSD32 -void -ppc32_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack) -{ - struct trapframe *tf; - uint32_t argc; - - tf = trapframe(td); - bzero(tf, sizeof *tf); - tf->fixreg[1] = -roundup(-stack + 8, 16); - - argc = fuword32((void *)stack); - - tf->fixreg[3] = argc; - tf->fixreg[4] = stack + sizeof(uint32_t); - tf->fixreg[5] = stack + (2 + argc)*sizeof(uint32_t); - tf->fixreg[6] = 0; /* auxiliary vector */ - tf->fixreg[7] = 0; /* termination vector */ - tf->fixreg[8] = (register_t)imgp->ps_strings; /* NetBSD extension */ - - tf->srr0 = imgp->entry_addr; - tf->srr1 = psl_userset32 | PSL_FE_DFLT; - cleanup_power_extras(td); - td->td_pcb->pcb_flags = 0; -} -#endif - -int -fill_regs(struct thread *td, struct reg *regs) -{ - struct trapframe *tf; - - tf = td->td_frame; - memcpy(regs, tf, sizeof(struct reg)); - - return (0); -} - -int -fill_dbregs(struct thread *td, struct dbreg *dbregs) -{ - /* No debug registers on PowerPC */ - return (ENOSYS); -} - -int -fill_fpregs(struct thread *td, struct fpreg *fpregs) -{ - struct pcb *pcb; - int i; - - pcb = td->td_pcb; - - if ((pcb->pcb_flags & PCB_FPREGS) == 0) - memset(fpregs, 0, sizeof(struct fpreg)); - else { - memcpy(&fpregs->fpscr, &pcb->pcb_fpu.fpscr, sizeof(double)); - for (i = 0; i < 32; i++) - memcpy(&fpregs->fpreg[i], &pcb->pcb_fpu.fpr[i].fpr, - sizeof(double)); - } - - return (0); -} - -int -set_regs(struct thread *td, struct reg *regs) -{ - struct trapframe *tf; - - tf = td->td_frame; - memcpy(tf, regs, sizeof(struct reg)); - - return (0); -} - -int -set_dbregs(struct thread *td, struct dbreg *dbregs) -{ - /* No debug registers on PowerPC */ - return (ENOSYS); -} - -int -set_fpregs(struct thread *td, struct fpreg *fpregs) -{ - struct pcb *pcb; - int i; - - pcb = td->td_pcb; - pcb->pcb_flags |= PCB_FPREGS; - memcpy(&pcb->pcb_fpu.fpscr, &fpregs->fpscr, sizeof(double)); - for (i = 0; i < 32; i++) { - memcpy(&pcb->pcb_fpu.fpr[i].fpr, &fpregs->fpreg[i], - sizeof(double)); - } - - return (0); -} - -#ifdef COMPAT_FREEBSD32 -int -set_regs32(struct thread *td, struct reg32 *regs) -{ - struct trapframe *tf; - int i; - - tf = td->td_frame; - for (i = 0; i < 32; i++) - tf->fixreg[i] = regs->fixreg[i]; - tf->lr = regs->lr; - tf->cr = regs->cr; - tf->xer = regs->xer; - tf->ctr = regs->ctr; - tf->srr0 = regs->pc; - - return (0); -} - -int -fill_regs32(struct thread *td, struct reg32 *regs) -{ - struct trapframe *tf; - int i; - - tf = td->td_frame; - for (i = 0; i < 32; i++) - regs->fixreg[i] = tf->fixreg[i]; - regs->lr = tf->lr; - regs->cr = tf->cr; - regs->xer = tf->xer; - regs->ctr = tf->ctr; - regs->pc = tf->srr0; - - return (0); -} - -static int -grab_mcontext32(struct thread *td, mcontext32_t *mcp, int flags) -{ - mcontext_t mcp64; - int i, error; - - error = grab_mcontext(td, &mcp64, flags); - if (error != 0) - return (error); - - mcp->mc_vers = mcp64.mc_vers; - mcp->mc_flags = mcp64.mc_flags; - mcp->mc_onstack = mcp64.mc_onstack; - mcp->mc_len = mcp64.mc_len; - memcpy(mcp->mc_avec,mcp64.mc_avec,sizeof(mcp64.mc_avec)); - memcpy(mcp->mc_av,mcp64.mc_av,sizeof(mcp64.mc_av)); - for (i = 0; i < 42; i++) - mcp->mc_frame[i] = mcp64.mc_frame[i]; - memcpy(mcp->mc_fpreg,mcp64.mc_fpreg,sizeof(mcp64.mc_fpreg)); - memcpy(mcp->mc_vsxfpreg,mcp64.mc_vsxfpreg,sizeof(mcp64.mc_vsxfpreg)); - - return (0); -} - -static int -get_mcontext32(struct thread *td, mcontext32_t *mcp, int flags) -{ - int error; - - error = grab_mcontext32(td, mcp, flags); - if (error == 0) { - PROC_LOCK(curthread->td_proc); - mcp->mc_onstack = sigonstack(td->td_frame->fixreg[1]); - PROC_UNLOCK(curthread->td_proc); - } - - return (error); -} - -static int -set_mcontext32(struct thread *td, mcontext32_t *mcp) -{ - mcontext_t mcp64; - int i, error; - - mcp64.mc_vers = mcp->mc_vers; - mcp64.mc_flags = mcp->mc_flags; - mcp64.mc_onstack = mcp->mc_onstack; - mcp64.mc_len = mcp->mc_len; - memcpy(mcp64.mc_avec,mcp->mc_avec,sizeof(mcp64.mc_avec)); - memcpy(mcp64.mc_av,mcp->mc_av,sizeof(mcp64.mc_av)); - for (i = 0; i < 42; i++) - mcp64.mc_frame[i] = mcp->mc_frame[i]; - mcp64.mc_srr1 |= (td->td_frame->srr1 & 0xFFFFFFFF00000000ULL); - memcpy(mcp64.mc_fpreg,mcp->mc_fpreg,sizeof(mcp64.mc_fpreg)); - memcpy(mcp64.mc_vsxfpreg,mcp->mc_vsxfpreg,sizeof(mcp64.mc_vsxfpreg)); - - error = set_mcontext(td, &mcp64); - - return (error); -} -#endif - -#ifdef COMPAT_FREEBSD32 -int -freebsd32_sigreturn(struct thread *td, struct freebsd32_sigreturn_args *uap) -{ - ucontext32_t uc; - int error; - - CTR2(KTR_SIG, "sigreturn: td=%p ucp=%p", td, uap->sigcntxp); - - if (copyin(uap->sigcntxp, &uc, sizeof(uc)) != 0) { - CTR1(KTR_SIG, "sigreturn: efault td=%p", td); - return (EFAULT); - } - - error = set_mcontext32(td, &uc.uc_mcontext); - if (error != 0) - return (error); - - /* - * Save FPU state if needed. User may have changed it on - * signal handler - */ - if (uc.uc_mcontext.mc_srr1 & PSL_FP) - save_fpu(td); - - kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); - - CTR3(KTR_SIG, "sigreturn: return td=%p pc=%#x sp=%#x", - td, uc.uc_mcontext.mc_srr0, uc.uc_mcontext.mc_gpr[1]); - - return (EJUSTRETURN); -} - -/* - * The first two fields of a ucontext_t are the signal mask and the machine - * context. The next field is uc_link; we want to avoid destroying the link - * when copying out contexts. - */ -#define UC32_COPY_SIZE offsetof(ucontext32_t, uc_link) - -int -freebsd32_getcontext(struct thread *td, struct freebsd32_getcontext_args *uap) -{ - ucontext32_t uc; - int ret; - - if (uap->ucp == NULL) - ret = EINVAL; - else { - bzero(&uc, sizeof(uc)); - get_mcontext32(td, &uc.uc_mcontext, GET_MC_CLEAR_RET); - PROC_LOCK(td->td_proc); - uc.uc_sigmask = td->td_sigmask; - PROC_UNLOCK(td->td_proc); - ret = copyout(&uc, uap->ucp, UC32_COPY_SIZE); - } - return (ret); -} - -int -freebsd32_setcontext(struct thread *td, struct freebsd32_setcontext_args *uap) -{ - ucontext32_t uc; - int ret; - - if (uap->ucp == NULL) - ret = EINVAL; - else { - ret = copyin(uap->ucp, &uc, UC32_COPY_SIZE); - if (ret == 0) { - ret = set_mcontext32(td, &uc.uc_mcontext); - if (ret == 0) { - kern_sigprocmask(td, SIG_SETMASK, - &uc.uc_sigmask, NULL, 0); - } - } - } - return (ret == 0 ? EJUSTRETURN : ret); -} - -int -freebsd32_swapcontext(struct thread *td, struct freebsd32_swapcontext_args *uap) -{ - ucontext32_t uc; - int ret; - - if (uap->oucp == NULL || uap->ucp == NULL) - ret = EINVAL; - else { - bzero(&uc, sizeof(uc)); - get_mcontext32(td, &uc.uc_mcontext, GET_MC_CLEAR_RET); - PROC_LOCK(td->td_proc); - uc.uc_sigmask = td->td_sigmask; - PROC_UNLOCK(td->td_proc); - ret = copyout(&uc, uap->oucp, UC32_COPY_SIZE); - if (ret == 0) { - ret = copyin(uap->ucp, &uc, UC32_COPY_SIZE); - if (ret == 0) { - ret = set_mcontext32(td, &uc.uc_mcontext); - if (ret == 0) { - kern_sigprocmask(td, SIG_SETMASK, - &uc.uc_sigmask, NULL, 0); - } - } - } - } - return (ret == 0 ? EJUSTRETURN : ret); -} - -#endif - -void -cpu_set_syscall_retval(struct thread *td, int error) -{ - struct proc *p; - struct trapframe *tf; - int fixup; - - if (error == EJUSTRETURN) - return; - - p = td->td_proc; - tf = td->td_frame; - - if (tf->fixreg[0] == SYS___syscall && - (SV_PROC_FLAG(p, SV_ILP32))) { - int code = tf->fixreg[FIRSTARG + 1]; - fixup = ( -#if defined(COMPAT_FREEBSD6) && defined(SYS_freebsd6_lseek) - code != SYS_freebsd6_lseek && -#endif - code != SYS_lseek) ? 1 : 0; - } else - fixup = 0; - - switch (error) { - case 0: - if (fixup) { - /* - * 64-bit return, 32-bit syscall. Fixup byte order - */ - tf->fixreg[FIRSTARG] = 0; - tf->fixreg[FIRSTARG + 1] = td->td_retval[0]; - } else { - tf->fixreg[FIRSTARG] = td->td_retval[0]; - tf->fixreg[FIRSTARG + 1] = td->td_retval[1]; - } - tf->cr &= ~0x10000000; /* Unset summary overflow */ - break; - case ERESTART: - /* - * Set user's pc back to redo the system call. - */ - tf->srr0 -= 4; - break; - default: - tf->fixreg[FIRSTARG] = error; - tf->cr |= 0x10000000; /* Set summary overflow */ - break; - } -} - -/* - * Threading functions - */ -void -cpu_thread_exit(struct thread *td) -{ - cleanup_power_extras(td); -} - -void -cpu_thread_clean(struct thread *td) -{ -} - -void -cpu_thread_alloc(struct thread *td) -{ - struct pcb *pcb; - - pcb = (struct pcb *)((td->td_kstack + td->td_kstack_pages * PAGE_SIZE - - sizeof(struct pcb)) & ~0x2fUL); - td->td_pcb = pcb; - td->td_frame = (struct trapframe *)pcb - 1; -} - -void -cpu_thread_free(struct thread *td) -{ -} - -int -cpu_set_user_tls(struct thread *td, void *tls_base) -{ - - if (SV_PROC_FLAG(td->td_proc, SV_LP64)) - td->td_frame->fixreg[13] = (register_t)tls_base + 0x7010; - else - td->td_frame->fixreg[2] = (register_t)tls_base + 0x7008; - return (0); -} - -void -cpu_copy_thread(struct thread *td, struct thread *td0) -{ - struct pcb *pcb2; - struct trapframe *tf; - struct callframe *cf; - - pcb2 = td->td_pcb; - - /* Copy the upcall pcb */ - bcopy(td0->td_pcb, pcb2, sizeof(*pcb2)); - - /* Create a stack for the new thread */ - tf = td->td_frame; - bcopy(td0->td_frame, tf, sizeof(struct trapframe)); - tf->fixreg[FIRSTARG] = 0; - tf->fixreg[FIRSTARG + 1] = 0; - tf->cr &= ~0x10000000; - - /* Set registers for trampoline to user mode. */ - cf = (struct callframe *)tf - 1; - memset(cf, 0, sizeof(struct callframe)); - cf->cf_func = (register_t)fork_return; - cf->cf_arg0 = (register_t)td; - cf->cf_arg1 = (register_t)tf; - - pcb2->pcb_sp = (register_t)cf; - #if defined(__powerpc64__) && (!defined(_CALL_ELF) || _CALL_ELF == 1) - pcb2->pcb_lr = ((register_t *)fork_trampoline)[0]; - pcb2->pcb_toc = ((register_t *)fork_trampoline)[1]; - #else - pcb2->pcb_lr = (register_t)fork_trampoline; - pcb2->pcb_context[0] = pcb2->pcb_lr; - #endif - pcb2->pcb_cpu.aim.usr_vsid = 0; -#ifdef __SPE__ - pcb2->pcb_vec.vscr = SPEFSCR_FINVE | SPEFSCR_FDBZE | - SPEFSCR_FUNFE | SPEFSCR_FOVFE; -#endif - - /* Setup to release spin count in fork_exit(). */ - td->td_md.md_spinlock_count = 1; - td->td_md.md_saved_msr = psl_kernset; -} - -int -cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg, - stack_t *stack) -{ - struct trapframe *tf; - uintptr_t sp; - #ifdef __powerpc64__ - int error; - #endif - - tf = td->td_frame; - /* align stack and alloc space for frame ptr and saved LR */ - #ifdef __powerpc64__ - sp = ((uintptr_t)stack->ss_sp + stack->ss_size - 48) & - ~0x1f; - #else - sp = ((uintptr_t)stack->ss_sp + stack->ss_size - 8) & - ~0x1f; - #endif - bzero(tf, sizeof(struct trapframe)); - - tf->fixreg[1] = (register_t)sp; - tf->fixreg[3] = (register_t)arg; - if (SV_PROC_FLAG(td->td_proc, SV_ILP32)) { - tf->srr0 = (register_t)entry; - #ifdef __powerpc64__ - tf->srr1 = psl_userset32 | PSL_FE_DFLT; - #else - tf->srr1 = psl_userset | PSL_FE_DFLT; - #endif - } else { - #ifdef __powerpc64__ - if (td->td_proc->p_sysent == &elf64_freebsd_sysvec_v2) { - tf->srr0 = (register_t)entry; - /* ELFv2 ABI requires that the global entry point be in r12. */ - tf->fixreg[12] = (register_t)entry; - } else { - register_t entry_desc[3]; - error = copyin((void *)entry, entry_desc, - sizeof(entry_desc)); - if (error != 0) - return (error); - tf->srr0 = entry_desc[0]; - tf->fixreg[2] = entry_desc[1]; - tf->fixreg[11] = entry_desc[2]; - } - tf->srr1 = psl_userset | PSL_FE_DFLT; - #endif - } - - td->td_pcb->pcb_flags = 0; -#ifdef __SPE__ - td->td_pcb->pcb_vec.vscr = SPEFSCR_FINVE | SPEFSCR_FDBZE | - SPEFSCR_FUNFE | SPEFSCR_FOVFE; -#endif - - td->td_retval[0] = (register_t)entry; - td->td_retval[1] = 0; - return (0); -} - -static int -emulate_mfspr(int spr, int reg, struct trapframe *frame){ - struct thread *td; - - td = curthread; - - if (spr == SPR_DSCR || spr == SPR_DSCRP) { - if (!(cpu_features2 & PPC_FEATURE2_DSCR)) - return (SIGILL); - // If DSCR was never set, get the default DSCR - if ((td->td_pcb->pcb_flags & PCB_CDSCR) == 0) - td->td_pcb->pcb_dscr = mfspr(SPR_DSCRP); - - frame->fixreg[reg] = td->td_pcb->pcb_dscr; - frame->srr0 += 4; - return (0); - } else - return (SIGILL); -} - -static int -emulate_mtspr(int spr, int reg, struct trapframe *frame){ - struct thread *td; - - td = curthread; - - if (spr == SPR_DSCR || spr == SPR_DSCRP) { - if (!(cpu_features2 & PPC_FEATURE2_DSCR)) - return (SIGILL); - td->td_pcb->pcb_flags |= PCB_CDSCR; - td->td_pcb->pcb_dscr = frame->fixreg[reg]; - mtspr(SPR_DSCRP, frame->fixreg[reg]); - frame->srr0 += 4; - return (0); - } else - return (SIGILL); -} - -#define XFX 0xFC0007FF -int -ppc_instr_emulate(struct trapframe *frame, struct thread *td) -{ - struct pcb *pcb; - uint32_t instr; - int reg, sig; - int rs, spr; - - instr = fuword32((void *)frame->srr0); - sig = SIGILL; - - if ((instr & 0xfc1fffff) == 0x7c1f42a6) { /* mfpvr */ - reg = (instr & ~0xfc1fffff) >> 21; - frame->fixreg[reg] = mfpvr(); - frame->srr0 += 4; - return (0); - } else if ((instr & XFX) == 0x7c0002a6) { /* mfspr */ - rs = (instr & 0x3e00000) >> 21; - spr = (instr & 0x1ff800) >> 16; - return emulate_mfspr(spr, rs, frame); - } else if ((instr & XFX) == 0x7c0003a6) { /* mtspr */ - rs = (instr & 0x3e00000) >> 21; - spr = (instr & 0x1ff800) >> 16; - return emulate_mtspr(spr, rs, frame); - } else if ((instr & 0xfc000ffe) == 0x7c0004ac) { /* various sync */ - powerpc_sync(); /* Do a heavy-weight sync */ - frame->srr0 += 4; - return (0); - } - - pcb = td->td_pcb; -#ifdef FPU_EMU - if (!(pcb->pcb_flags & PCB_FPREGS)) { - bzero(&pcb->pcb_fpu, sizeof(pcb->pcb_fpu)); - pcb->pcb_flags |= PCB_FPREGS; - } else if (pcb->pcb_flags & PCB_FPU) - save_fpu(td); - sig = fpu_emulate(frame, &pcb->pcb_fpu); - if ((sig == 0 || sig == SIGFPE) && pcb->pcb_flags & PCB_FPU) - enable_fpu(td); -#endif - if (sig == SIGILL) { - if (pcb->pcb_lastill != frame->srr0) { - /* Allow a second chance, in case of cache sync issues. */ - sig = 0; - pmap_sync_icache(PCPU_GET(curpmap), frame->srr0, 4); - pcb->pcb_lastill = frame->srr0; - } - } - - return (sig); -} diff --git a/sys/powerpc/powerpc/fpu.c b/sys/powerpc/powerpc/fpu.c deleted file mode 100644 index bc0a3693329..00000000000 --- a/sys/powerpc/powerpc/fpu.c +++ /dev/null @@ -1,261 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1996 Wolfgang Solfrank. - * Copyright (C) 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: fpu.c,v 1.5 2001/07/22 11:29:46 wiz Exp $ - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -static void -save_fpu_int(struct thread *td) -{ - register_t msr; - struct pcb *pcb; - - pcb = td->td_pcb; - - /* - * Temporarily re-enable floating-point during the save - */ - msr = mfmsr(); - if (pcb->pcb_flags & PCB_VSX) - mtmsr(msr | PSL_FP | PSL_VSX); - else - mtmsr(msr | PSL_FP); - - /* - * Save the floating-point registers and FPSCR to the PCB - */ - if (pcb->pcb_flags & PCB_VSX) { - #define SFP(n) __asm ("stxvw4x " #n ", 0,%0" \ - :: "b"(&pcb->pcb_fpu.fpr[n])); - SFP(0); SFP(1); SFP(2); SFP(3); - SFP(4); SFP(5); SFP(6); SFP(7); - SFP(8); SFP(9); SFP(10); SFP(11); - SFP(12); SFP(13); SFP(14); SFP(15); - SFP(16); SFP(17); SFP(18); SFP(19); - SFP(20); SFP(21); SFP(22); SFP(23); - SFP(24); SFP(25); SFP(26); SFP(27); - SFP(28); SFP(29); SFP(30); SFP(31); - #undef SFP - } else { - #define SFP(n) __asm ("stfd " #n ", 0(%0)" \ - :: "b"(&pcb->pcb_fpu.fpr[n].fpr)); - SFP(0); SFP(1); SFP(2); SFP(3); - SFP(4); SFP(5); SFP(6); SFP(7); - SFP(8); SFP(9); SFP(10); SFP(11); - SFP(12); SFP(13); SFP(14); SFP(15); - SFP(16); SFP(17); SFP(18); SFP(19); - SFP(20); SFP(21); SFP(22); SFP(23); - SFP(24); SFP(25); SFP(26); SFP(27); - SFP(28); SFP(29); SFP(30); SFP(31); - #undef SFP - } - __asm __volatile ("mffs 0; stfd 0,0(%0)" :: "b"(&pcb->pcb_fpu.fpscr)); - - /* - * Disable floating-point again - */ - isync(); - mtmsr(msr); -} - -void -enable_fpu(struct thread *td) -{ - register_t msr; - struct pcb *pcb; - struct trapframe *tf; - - pcb = td->td_pcb; - tf = trapframe(td); - - /* - * Save the thread's FPU CPU number, and set the CPU's current - * FPU thread - */ - td->td_pcb->pcb_fpcpu = PCPU_GET(cpuid); - PCPU_SET(fputhread, td); - - /* - * Enable the FPU for when the thread returns from the exception. - * If this is the first time the FPU has been used by the thread, - * initialise the FPU registers and FPSCR to 0, and set the flag - * to indicate that the FPU is in use. - */ - pcb->pcb_flags |= PCB_FPU; - if (pcb->pcb_flags & PCB_VSX) - tf->srr1 |= PSL_FP | PSL_VSX; - else - tf->srr1 |= PSL_FP; - if (!(pcb->pcb_flags & PCB_FPREGS)) { - memset(&pcb->pcb_fpu, 0, sizeof pcb->pcb_fpu); - pcb->pcb_flags |= PCB_FPREGS; - } - - /* - * Temporarily enable floating-point so the registers - * can be restored. - */ - msr = mfmsr(); - if (pcb->pcb_flags & PCB_VSX) - mtmsr(msr | PSL_FP | PSL_VSX); - else - mtmsr(msr | PSL_FP); - - /* - * Load the floating point registers and FPSCR from the PCB. - * (A value of 0xff for mtfsf specifies that all 8 4-bit fields - * of the saved FPSCR are to be loaded from the FPU reg). - */ - __asm __volatile ("lfd 0,0(%0); mtfsf 0xff,0" - :: "b"(&pcb->pcb_fpu.fpscr)); - - if (pcb->pcb_flags & PCB_VSX) { - #define LFP(n) __asm ("lxvw4x " #n ", 0,%0" \ - :: "b"(&pcb->pcb_fpu.fpr[n])); - LFP(0); LFP(1); LFP(2); LFP(3); - LFP(4); LFP(5); LFP(6); LFP(7); - LFP(8); LFP(9); LFP(10); LFP(11); - LFP(12); LFP(13); LFP(14); LFP(15); - LFP(16); LFP(17); LFP(18); LFP(19); - LFP(20); LFP(21); LFP(22); LFP(23); - LFP(24); LFP(25); LFP(26); LFP(27); - LFP(28); LFP(29); LFP(30); LFP(31); - #undef LFP - } else { - #define LFP(n) __asm ("lfd " #n ", 0(%0)" \ - :: "b"(&pcb->pcb_fpu.fpr[n].fpr)); - LFP(0); LFP(1); LFP(2); LFP(3); - LFP(4); LFP(5); LFP(6); LFP(7); - LFP(8); LFP(9); LFP(10); LFP(11); - LFP(12); LFP(13); LFP(14); LFP(15); - LFP(16); LFP(17); LFP(18); LFP(19); - LFP(20); LFP(21); LFP(22); LFP(23); - LFP(24); LFP(25); LFP(26); LFP(27); - LFP(28); LFP(29); LFP(30); LFP(31); - #undef LFP - } - - isync(); - mtmsr(msr); -} - -void -save_fpu(struct thread *td) -{ - struct pcb *pcb; - - pcb = td->td_pcb; - - save_fpu_int(td); - - /* - * Clear the current fp thread and pcb's CPU id - * XXX should this be left clear to allow lazy save/restore ? - */ - pcb->pcb_fpcpu = INT_MAX; - PCPU_SET(fputhread, NULL); -} - -/* - * Save fpu state without dropping ownership. This will only save state if - * the current fpu thread is `td'. - */ -void -save_fpu_nodrop(struct thread *td) -{ - - if (td == PCPU_GET(fputhread)) - save_fpu_int(td); -} - -/* - * Clear Floating-Point Status and Control Register - */ -void -cleanup_fpscr() -{ - register_t msr; - - msr = mfmsr(); - mtmsr(msr | PSL_FP); - mtfsf(0); - - isync(); - mtmsr(msr); -} - -/* - * Get the current fp exception - */ -u_int -get_fpu_exception(struct thread *td) -{ - register_t msr; - u_int ucode; - register_t reg; - - critical_enter(); - - msr = mfmsr(); - mtmsr(msr | PSL_FP); - - reg = mffs(); - - isync(); - mtmsr(msr); - - critical_exit(); - - if (reg & FPSCR_ZX) - ucode = FPE_FLTDIV; - else if (reg & FPSCR_OX) - ucode = FPE_FLTOVF; - else if (reg & FPSCR_UX) - ucode = FPE_FLTUND; - else if (reg & FPSCR_XX) - ucode = FPE_FLTRES; - else - ucode = FPE_FLTINV; - - return ucode; -} - diff --git a/sys/powerpc/powerpc/gdb_machdep.c b/sys/powerpc/powerpc/gdb_machdep.c deleted file mode 100644 index d7ec7221614..00000000000 --- a/sys/powerpc/powerpc/gdb_machdep.c +++ /dev/null @@ -1,124 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2006 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include - -#include -#include - -extern vm_offset_t __startkernel; - -void * -gdb_cpu_getreg(int regnum, size_t *regsz) -{ - - *regsz = gdb_cpu_regsz(regnum); - - if (kdb_thread == curthread) { - if (regnum == 0 || (regnum >= 2 && regnum <= 31)) - return (kdb_frame->fixreg + regnum); - if (regnum == 64) - return (&kdb_frame->srr0); - if (regnum == 67) - return (&kdb_frame->lr); - } - - if (regnum == 1) - return (&kdb_thrctx->pcb_sp); - if (regnum == 2 && *regsz == 8) - return (&kdb_thrctx->pcb_toc); - if (regnum >= 12 && regnum <= 31) - return (kdb_thrctx->pcb_context + (regnum - 12)); - if (regnum == 64) - return (&kdb_thrctx->pcb_lr); - - return (NULL); -} - -void -gdb_cpu_setreg(int regnum, void *val) -{ - - switch (regnum) { - case GDB_REG_PC: - break; - } -} - -int -gdb_cpu_signal(int vector, int dummy __unused) -{ -#if defined(BOOKE) - if (vector == EXC_DEBUG || vector == EXC_PGM) - return (SIGTRAP); -#else - if (vector == EXC_TRC || vector == EXC_RUNMODETRC) - return (SIGTRAP); -#endif - - return (SIGEMT); -} - -void -gdb_cpu_do_offsets(void) -{ - /* - * On PowerPC, .text starts at KERNBASE + SIZEOF_HEADERS and - * text segment at KERNBASE - SIZEOF_HEADERS. - * On PowerPC64, .text starts at KERNBASE and text segment at - * KERNBASE - 0x100. - * In both cases, the text segment offset is aligned to 64KB. - * - * The __startkernel variable holds the relocated KERNBASE offset. - * Thus, as long as SIZEOF_HEADERS doesn't get bigger than 0x100 - * (which would lead to other issues), aligning __startkernel to - * 64KB gives the text segment offset. - * - * TODO: Add DataSeg to response. On PowerPC64 all sections reside - * in a single LOAD segment, but on PowerPC modifiable data reside - * in a separate segment, that GDB should also relocate. - */ - gdb_tx_begin(0); - gdb_tx_str("TextSeg="); - gdb_tx_varhex(__startkernel & ~0xffff); - gdb_tx_end(); -} diff --git a/sys/powerpc/powerpc/genassym.c b/sys/powerpc/powerpc/genassym.c deleted file mode 100644 index 1f42eb7ae43..00000000000 --- a/sys/powerpc/powerpc/genassym.c +++ /dev/null @@ -1,281 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1982, 1990 The Regents of the University of California. - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * William Jolitz. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)genassym.c 5.11 (Berkeley) 5/10/91 - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include - -ASSYM(PC_CURTHREAD, offsetof(struct pcpu, pc_curthread)); -ASSYM(PC_CURPCB, offsetof(struct pcpu, pc_curpcb)); -ASSYM(PC_CURPMAP, offsetof(struct pcpu, pc_curpmap)); -ASSYM(PC_TEMPSAVE, offsetof(struct pcpu, pc_tempsave)); -ASSYM(PC_DISISAVE, offsetof(struct pcpu, pc_disisave)); -ASSYM(PC_DBSAVE, offsetof(struct pcpu, pc_dbsave)); -ASSYM(PC_RESTORE, offsetof(struct pcpu, pc_restore)); -ASSYM(PC_FLAGS, offsetof(struct pcpu, pc_flags)); - -#if defined(BOOKE) -ASSYM(PC_BOOKE_CRITSAVE, offsetof(struct pcpu, pc_booke.critsave)); -ASSYM(PC_BOOKE_MCHKSAVE, offsetof(struct pcpu, pc_booke.mchksave)); -ASSYM(PC_BOOKE_TLBSAVE, offsetof(struct pcpu, pc_booke.tlbsave)); -ASSYM(PC_BOOKE_TLB_LEVEL, offsetof(struct pcpu, pc_booke.tlb_level)); -ASSYM(PC_BOOKE_TLB_LOCK, offsetof(struct pcpu, pc_booke.tlb_lock)); -#endif - -ASSYM(CPUSAVE_R27, CPUSAVE_R27*sizeof(register_t)); -ASSYM(CPUSAVE_R28, CPUSAVE_R28*sizeof(register_t)); -ASSYM(CPUSAVE_R29, CPUSAVE_R29*sizeof(register_t)); -ASSYM(CPUSAVE_R30, CPUSAVE_R30*sizeof(register_t)); -ASSYM(CPUSAVE_R31, CPUSAVE_R31*sizeof(register_t)); -ASSYM(CPUSAVE_SRR0, CPUSAVE_SRR0*sizeof(register_t)); -ASSYM(CPUSAVE_SRR1, CPUSAVE_SRR1*sizeof(register_t)); -ASSYM(CPUSAVE_AIM_DAR, CPUSAVE_AIM_DAR*sizeof(register_t)); -ASSYM(CPUSAVE_AIM_DSISR, CPUSAVE_AIM_DSISR*sizeof(register_t)); -ASSYM(CPUSAVE_BOOKE_DEAR, CPUSAVE_BOOKE_DEAR*sizeof(register_t)); -ASSYM(CPUSAVE_BOOKE_ESR, CPUSAVE_BOOKE_ESR*sizeof(register_t)); -ASSYM(BOOKE_CRITSAVE_SRR0, BOOKE_CRITSAVE_SRR0*sizeof(register_t)); -ASSYM(BOOKE_CRITSAVE_SRR1, BOOKE_CRITSAVE_SRR1*sizeof(register_t)); - -ASSYM(TLBSAVE_BOOKE_LR, TLBSAVE_BOOKE_LR*sizeof(register_t)); -ASSYM(TLBSAVE_BOOKE_CR, TLBSAVE_BOOKE_CR*sizeof(register_t)); -ASSYM(TLBSAVE_BOOKE_SRR0, TLBSAVE_BOOKE_SRR0*sizeof(register_t)); -ASSYM(TLBSAVE_BOOKE_SRR1, TLBSAVE_BOOKE_SRR1*sizeof(register_t)); -ASSYM(TLBSAVE_BOOKE_R20, TLBSAVE_BOOKE_R20*sizeof(register_t)); -ASSYM(TLBSAVE_BOOKE_R21, TLBSAVE_BOOKE_R21*sizeof(register_t)); -ASSYM(TLBSAVE_BOOKE_R22, TLBSAVE_BOOKE_R22*sizeof(register_t)); -ASSYM(TLBSAVE_BOOKE_R23, TLBSAVE_BOOKE_R23*sizeof(register_t)); -ASSYM(TLBSAVE_BOOKE_R24, TLBSAVE_BOOKE_R24*sizeof(register_t)); -ASSYM(TLBSAVE_BOOKE_R25, TLBSAVE_BOOKE_R25*sizeof(register_t)); -ASSYM(TLBSAVE_BOOKE_R26, TLBSAVE_BOOKE_R26*sizeof(register_t)); -ASSYM(TLBSAVE_BOOKE_R27, TLBSAVE_BOOKE_R27*sizeof(register_t)); -ASSYM(TLBSAVE_BOOKE_R28, TLBSAVE_BOOKE_R28*sizeof(register_t)); -ASSYM(TLBSAVE_BOOKE_R29, TLBSAVE_BOOKE_R29*sizeof(register_t)); -ASSYM(TLBSAVE_BOOKE_R30, TLBSAVE_BOOKE_R30*sizeof(register_t)); -ASSYM(TLBSAVE_BOOKE_R31, TLBSAVE_BOOKE_R31*sizeof(register_t)); - -ASSYM(MTX_LOCK, offsetof(struct mtx, mtx_lock)); - -ASSYM(PC_FLAG_NOSRS, PC_FLAG_NOSRS); -#if defined(AIM) -ASSYM(USER_ADDR, USER_ADDR); -#ifdef __powerpc64__ -ASSYM(PC_KERNSLB, offsetof(struct pcpu, pc_aim.slb)); -ASSYM(PC_USERSLB, offsetof(struct pcpu, pc_aim.userslb)); -ASSYM(PC_SLBSAVE, offsetof(struct pcpu, pc_aim.slbsave)); -ASSYM(PC_SLBSTACK, offsetof(struct pcpu, pc_aim.slbstack)); -ASSYM(USER_SLB_SLOT, USER_SLB_SLOT); -ASSYM(USER_SLB_SLBE, USER_SLB_SLBE); -ASSYM(SEGMENT_MASK, SEGMENT_MASK); -#else -ASSYM(PM_SR, offsetof(struct pmap, pm_sr)); -ASSYM(USER_SR, USER_SR); -#endif -#elif defined(BOOKE) -#ifdef __powerpc64__ -ASSYM(PM_ROOT, offsetof(struct pmap, pm_root)); -#else -ASSYM(PM_PDIR, offsetof(struct pmap, pm_pdir)); -#endif -/* - * With pte_t being a bitfield struct, these fields cannot be addressed via - * offsetof(). - */ -ASSYM(PTE_RPN, 0); -ASSYM(PTE_FLAGS, sizeof(uint32_t)); -#if defined(BOOKE_E500) -ASSYM(TLB_ENTRY_SIZE, sizeof(struct tlb_entry)); -#endif -#endif - -#ifdef __powerpc64__ -ASSYM(FSP, 48); -#else -ASSYM(FSP, 8); -#endif -ASSYM(FRAMELEN, FRAMELEN); -ASSYM(FRAME_0, offsetof(struct trapframe, fixreg[0])); -ASSYM(FRAME_1, offsetof(struct trapframe, fixreg[1])); -ASSYM(FRAME_2, offsetof(struct trapframe, fixreg[2])); -ASSYM(FRAME_3, offsetof(struct trapframe, fixreg[3])); -ASSYM(FRAME_4, offsetof(struct trapframe, fixreg[4])); -ASSYM(FRAME_5, offsetof(struct trapframe, fixreg[5])); -ASSYM(FRAME_6, offsetof(struct trapframe, fixreg[6])); -ASSYM(FRAME_7, offsetof(struct trapframe, fixreg[7])); -ASSYM(FRAME_8, offsetof(struct trapframe, fixreg[8])); -ASSYM(FRAME_9, offsetof(struct trapframe, fixreg[9])); -ASSYM(FRAME_10, offsetof(struct trapframe, fixreg[10])); -ASSYM(FRAME_11, offsetof(struct trapframe, fixreg[11])); -ASSYM(FRAME_12, offsetof(struct trapframe, fixreg[12])); -ASSYM(FRAME_13, offsetof(struct trapframe, fixreg[13])); -ASSYM(FRAME_14, offsetof(struct trapframe, fixreg[14])); -ASSYM(FRAME_15, offsetof(struct trapframe, fixreg[15])); -ASSYM(FRAME_16, offsetof(struct trapframe, fixreg[16])); -ASSYM(FRAME_17, offsetof(struct trapframe, fixreg[17])); -ASSYM(FRAME_18, offsetof(struct trapframe, fixreg[18])); -ASSYM(FRAME_19, offsetof(struct trapframe, fixreg[19])); -ASSYM(FRAME_20, offsetof(struct trapframe, fixreg[20])); -ASSYM(FRAME_21, offsetof(struct trapframe, fixreg[21])); -ASSYM(FRAME_22, offsetof(struct trapframe, fixreg[22])); -ASSYM(FRAME_23, offsetof(struct trapframe, fixreg[23])); -ASSYM(FRAME_24, offsetof(struct trapframe, fixreg[24])); -ASSYM(FRAME_25, offsetof(struct trapframe, fixreg[25])); -ASSYM(FRAME_26, offsetof(struct trapframe, fixreg[26])); -ASSYM(FRAME_27, offsetof(struct trapframe, fixreg[27])); -ASSYM(FRAME_28, offsetof(struct trapframe, fixreg[28])); -ASSYM(FRAME_29, offsetof(struct trapframe, fixreg[29])); -ASSYM(FRAME_30, offsetof(struct trapframe, fixreg[30])); -ASSYM(FRAME_31, offsetof(struct trapframe, fixreg[31])); -ASSYM(FRAME_LR, offsetof(struct trapframe, lr)); -ASSYM(FRAME_CR, offsetof(struct trapframe, cr)); -ASSYM(FRAME_CTR, offsetof(struct trapframe, ctr)); -ASSYM(FRAME_XER, offsetof(struct trapframe, xer)); -ASSYM(FRAME_SRR0, offsetof(struct trapframe, srr0)); -ASSYM(FRAME_SRR1, offsetof(struct trapframe, srr1)); -ASSYM(FRAME_EXC, offsetof(struct trapframe, exc)); -ASSYM(FRAME_AIM_DAR, offsetof(struct trapframe, dar)); -ASSYM(FRAME_AIM_DSISR, offsetof(struct trapframe, cpu.aim.dsisr)); -ASSYM(FRAME_BOOKE_DEAR, offsetof(struct trapframe, dar)); -ASSYM(FRAME_BOOKE_ESR, offsetof(struct trapframe, cpu.booke.esr)); -ASSYM(FRAME_BOOKE_DBCR0, offsetof(struct trapframe, cpu.booke.dbcr0)); - -ASSYM(CF_FUNC, offsetof(struct callframe, cf_func)); -ASSYM(CF_ARG0, offsetof(struct callframe, cf_arg0)); -ASSYM(CF_ARG1, offsetof(struct callframe, cf_arg1)); -ASSYM(CF_SIZE, sizeof(struct callframe)); - -ASSYM(PCB_CONTEXT, offsetof(struct pcb, pcb_context)); -ASSYM(PCB_CR, offsetof(struct pcb, pcb_cr)); -ASSYM(PCB_DSCR, offsetof(struct pcb, pcb_dscr)); -ASSYM(PCB_FSCR, offsetof(struct pcb, pcb_fscr)); -ASSYM(PCB_TAR, offsetof(struct pcb, pcb_tar)); -ASSYM(PCB_SP, offsetof(struct pcb, pcb_sp)); -ASSYM(PCB_TOC, offsetof(struct pcb, pcb_toc)); -ASSYM(PCB_LR, offsetof(struct pcb, pcb_lr)); -ASSYM(PCB_ONFAULT, offsetof(struct pcb, pcb_onfault)); -ASSYM(PCB_FLAGS, offsetof(struct pcb, pcb_flags)); -ASSYM(PCB_FPU, PCB_FPU); -ASSYM(PCB_VEC, PCB_VEC); -ASSYM(PCB_CDSCR, PCB_CDSCR); -ASSYM(PCB_CFSCR, PCB_CFSCR); - -ASSYM(PCB_AIM_USR_VSID, offsetof(struct pcb, pcb_cpu.aim.usr_vsid)); -ASSYM(PCB_BOOKE_DBCR0, offsetof(struct pcb, pcb_cpu.booke.dbcr0)); - -ASSYM(PCB_VSCR, offsetof(struct pcb, pcb_vec.vscr)); - -ASSYM(PCB_EBB_EBBHR, offsetof(struct pcb, pcb_ebb.ebbhr)); -ASSYM(PCB_EBB_EBBRR, offsetof(struct pcb, pcb_ebb.ebbrr)); -ASSYM(PCB_EBB_BESCR, offsetof(struct pcb, pcb_ebb.bescr)); - -ASSYM(PCB_LMON_LMRR, offsetof(struct pcb, pcb_lm.lmrr)); -ASSYM(PCB_LMON_LMSER, offsetof(struct pcb, pcb_lm.lmser)); - -ASSYM(TD_LOCK, offsetof(struct thread, td_lock)); -ASSYM(TD_PROC, offsetof(struct thread, td_proc)); -ASSYM(TD_PCB, offsetof(struct thread, td_pcb)); - -ASSYM(P_VMSPACE, offsetof(struct proc, p_vmspace)); - -ASSYM(VM_PMAP, offsetof(struct vmspace, vm_pmap)); - -ASSYM(TD_FLAGS, offsetof(struct thread, td_flags)); - -ASSYM(TDF_ASTPENDING, TDF_ASTPENDING); -ASSYM(TDF_NEEDRESCHED, TDF_NEEDRESCHED); - -ASSYM(SF_UC, offsetof(struct sigframe, sf_uc)); - -ASSYM(DMAP_BASE_ADDRESS, DMAP_BASE_ADDRESS); -ASSYM(MAXCOMLEN, MAXCOMLEN); - -#ifdef __powerpc64__ -ASSYM(PSL_CM, PSL_CM); -#endif -ASSYM(PSL_GS, PSL_GS); -ASSYM(PSL_DE, PSL_DE); -ASSYM(PSL_DS, PSL_DS); -ASSYM(PSL_IS, PSL_IS); -ASSYM(PSL_CE, PSL_CE); -ASSYM(PSL_UCLE, PSL_UCLE); -ASSYM(PSL_WE, PSL_WE); -ASSYM(PSL_UBLE, PSL_UBLE); - -#if defined(AIM) && defined(__powerpc64__) -ASSYM(PSL_SF, PSL_SF); -ASSYM(PSL_HV, PSL_HV); -#endif - -ASSYM(PSL_POW, PSL_POW); -ASSYM(PSL_ILE, PSL_ILE); -ASSYM(PSL_LE, PSL_LE); -ASSYM(PSL_SE, PSL_SE); -ASSYM(PSL_RI, PSL_RI); -ASSYM(PSL_DR, PSL_DR); -ASSYM(PSL_IP, PSL_IP); -ASSYM(PSL_IR, PSL_IR); - -ASSYM(PSL_FE_DIS, PSL_FE_DIS); -ASSYM(PSL_FE_NONREC, PSL_FE_NONREC); -ASSYM(PSL_FE_PREC, PSL_FE_PREC); -ASSYM(PSL_FE_REC, PSL_FE_REC); - -ASSYM(PSL_VEC, PSL_VEC); -ASSYM(PSL_BE, PSL_BE); -ASSYM(PSL_EE, PSL_EE); -ASSYM(PSL_FE0, PSL_FE0); -ASSYM(PSL_FE1, PSL_FE1); -ASSYM(PSL_FP, PSL_FP); -ASSYM(PSL_ME, PSL_ME); -ASSYM(PSL_PR, PSL_PR); -ASSYM(PSL_PMM, PSL_PMM); diff --git a/sys/powerpc/powerpc/interrupt.c b/sys/powerpc/powerpc/interrupt.c deleted file mode 100644 index c2e79761e1d..00000000000 --- a/sys/powerpc/powerpc/interrupt.c +++ /dev/null @@ -1,139 +0,0 @@ -/*- - * Copyright 2002 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * Interrupts are dispatched to here from locore asm - */ - -#include "opt_hwpmc_hooks.h" -#include "opt_platform.h" - -#include /* RCS ID & Copyright macro defns */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#ifdef HWPMC_HOOKS -#include -#endif -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "pic_if.h" - -#ifdef POWERNV -int (*hmi_handler)(struct trapframe *); -#endif - -/* - * A very short dispatch, to try and maximise assembler code use - * between all exception types. Maybe 'true' interrupts should go - * here, and the trap code can come in separately - */ -void -powerpc_interrupt(struct trapframe *framep) -{ - struct thread *td; - struct trapframe *oldframe; - register_t ee; - - td = curthread; - - CTR2(KTR_INTR, "%s: EXC=%x", __func__, framep->exc); - - switch (framep->exc) { - case EXC_EXI: - case EXC_HVI: - critical_enter(); - PIC_DISPATCH(root_pic, framep); - critical_exit(); -#ifdef BOOKE - framep->srr1 &= ~PSL_WE; -#endif - break; - - case EXC_DECR: - critical_enter(); - atomic_add_int(&td->td_intr_nesting_level, 1); - oldframe = td->td_intr_frame; - td->td_intr_frame = framep; - decr_intr(framep); - td->td_intr_frame = oldframe; - atomic_subtract_int(&td->td_intr_nesting_level, 1); - critical_exit(); -#ifdef BOOKE - framep->srr1 &= ~PSL_WE; -#endif - break; -#ifdef HWPMC_HOOKS - case EXC_PERF: - critical_enter(); - KASSERT(pmc_intr != NULL, ("Performance exception, but no handler!")); - (*pmc_intr)(framep); - critical_exit(); - if (pmc_hook && (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN)) - pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, framep); - break; -#endif - -#ifdef POWERNV - case EXC_HMI: - if (hmi_handler != 0 && hmi_handler(framep) == 0) - break; - /* If no handler, or failure to handle, just drop to trap. */ -#endif - - default: - /* Re-enable interrupts if applicable. */ - ee = framep->srr1 & PSL_EE; - if (ee != 0) - mtmsr(mfmsr() | ee); - trap(framep); - } -} diff --git a/sys/powerpc/powerpc/intr_machdep.c b/sys/powerpc/powerpc/intr_machdep.c deleted file mode 100644 index c314a2c928b..00000000000 --- a/sys/powerpc/powerpc/intr_machdep.c +++ /dev/null @@ -1,697 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1991 The Regents of the University of California. - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * William Jolitz. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/*- - * Copyright (c) 2002 Benno Rice. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 - * form: src/sys/i386/isa/intr_machdep.c,v 1.57 2001/07/20 - */ - -#include "opt_isa.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "pic_if.h" - -#define MAX_STRAY_LOG 5 - -static MALLOC_DEFINE(M_INTR, "intr", "interrupt handler data"); - -struct powerpc_intr { - struct intr_event *event; - long *cntp; - void *priv; /* PIC-private data */ - device_t pic; - u_int irq; - u_int intline; - u_int vector; - u_int cntindex; - int fwcode; - int ipi; - int pi_domain; - enum intr_trigger trig; - enum intr_polarity pol; - cpuset_t pi_cpuset; -}; - -struct pic { - device_t dev; - uint32_t node; - u_int irqs; - u_int ipis; - int base; -}; - -static u_int intrcnt_index = 0; -static struct mtx intr_table_lock; -static struct powerpc_intr **powerpc_intrs; -static struct pic piclist[MAX_PICS]; -static u_int nvectors; /* Allocated vectors */ -static u_int npics; /* PICs registered */ -#ifdef DEV_ISA -static u_int nirqs = 16; /* Allocated IRQS (ISA pre-allocated). */ -#else -static u_int nirqs = 0; /* Allocated IRQs. */ -#endif -static u_int stray_count; - -#define INTRNAME_LEN (MAXCOMLEN + 1) -u_long *intrcnt; -char *intrnames; -size_t sintrcnt = sizeof(intrcnt); -size_t sintrnames = sizeof(intrnames); -int nintrcnt; - -/* - * Just to start - */ -#ifdef __powerpc64__ -u_int num_io_irqs = 768; -#else -u_int num_io_irqs = 256; -#endif - -device_t root_pic; - -#ifdef SMP -static void *ipi_cookie; -#endif - -static void -intrcnt_setname(const char *name, int index) -{ - - snprintf(intrnames + INTRNAME_LEN * index, INTRNAME_LEN, "%-*s", - INTRNAME_LEN - 1, name); -} - -static void -intr_init(void *dummy __unused) -{ - - mtx_init(&intr_table_lock, "intr sources lock", NULL, MTX_DEF); -} -SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL); - -static void -intr_init_sources(void *arg __unused) -{ - - powerpc_intrs = mallocarray(num_io_irqs, sizeof(*powerpc_intrs), - M_INTR, M_WAITOK | M_ZERO); - nintrcnt = 1 + num_io_irqs * 2 + mp_ncpus * 2; -#ifdef COUNT_IPIS - if (mp_ncpus > 1) - nintrcnt += 8 * mp_ncpus; -#endif - intrcnt = mallocarray(nintrcnt, sizeof(u_long), M_INTR, M_WAITOK | - M_ZERO); - intrnames = mallocarray(nintrcnt, INTRNAME_LEN, M_INTR, M_WAITOK | - M_ZERO); - sintrcnt = nintrcnt * sizeof(u_long); - sintrnames = nintrcnt * INTRNAME_LEN; - - intrcnt_setname("???", 0); - intrcnt_index = 1; -} -/* - * This needs to happen before SI_SUB_CPU - */ -SYSINIT(intr_init_sources, SI_SUB_KLD, SI_ORDER_ANY, intr_init_sources, NULL); - -#ifdef SMP -static void -smp_intr_init(void *dummy __unused) -{ - struct powerpc_intr *i; - int vector; - - for (vector = 0; vector < nvectors; vector++) { - i = powerpc_intrs[vector]; - if (i != NULL && i->event != NULL && i->pic == root_pic) - PIC_BIND(i->pic, i->intline, i->pi_cpuset, &i->priv); - } -} -SYSINIT(smp_intr_init, SI_SUB_SMP, SI_ORDER_ANY, smp_intr_init, NULL); -#endif - -void -intrcnt_add(const char *name, u_long **countp) -{ - int idx; - - idx = atomic_fetchadd_int(&intrcnt_index, 1); - KASSERT(idx < nintrcnt, ("intrcnt_add: Interrupt counter index %d/%d" - "reached nintrcnt : %d", intrcnt_index, idx, nintrcnt)); - *countp = &intrcnt[idx]; - intrcnt_setname(name, idx); -} - -extern void kdb_backtrace(void); -static struct powerpc_intr * -intr_lookup(u_int irq) -{ - char intrname[16]; - struct powerpc_intr *i, *iscan; - int vector; - - mtx_lock(&intr_table_lock); - for (vector = 0; vector < nvectors; vector++) { - i = powerpc_intrs[vector]; - if (i != NULL && i->irq == irq) { - mtx_unlock(&intr_table_lock); - return (i); - } - } - - i = malloc(sizeof(*i), M_INTR, M_NOWAIT); - if (i == NULL) { - mtx_unlock(&intr_table_lock); - return (NULL); - } - - i->event = NULL; - i->cntp = NULL; - i->priv = NULL; - i->trig = INTR_TRIGGER_CONFORM; - i->pol = INTR_POLARITY_CONFORM; - i->irq = irq; - i->pic = NULL; - i->vector = -1; - i->fwcode = 0; - i->ipi = 0; - -#ifdef SMP - i->pi_cpuset = all_cpus; -#else - CPU_SETOF(0, &i->pi_cpuset); -#endif - - for (vector = 0; vector < num_io_irqs && vector <= nvectors; - vector++) { - iscan = powerpc_intrs[vector]; - if (iscan != NULL && iscan->irq == irq) - break; - if (iscan == NULL && i->vector == -1) - i->vector = vector; - iscan = NULL; - } - - if (iscan == NULL && i->vector != -1) { - powerpc_intrs[i->vector] = i; - i->cntindex = atomic_fetchadd_int(&intrcnt_index, 1); - i->cntp = &intrcnt[i->cntindex]; - sprintf(intrname, "irq%u:", i->irq); - intrcnt_setname(intrname, i->cntindex); - nvectors++; - } - mtx_unlock(&intr_table_lock); - - if (iscan != NULL || i->vector == -1) { - free(i, M_INTR); - i = iscan; - } - - return (i); -} - -static int -powerpc_map_irq(struct powerpc_intr *i) -{ - struct pic *p; - u_int cnt; - int idx; - - for (idx = 0; idx < npics; idx++) { - p = &piclist[idx]; - cnt = p->irqs + p->ipis; - if (i->irq >= p->base && i->irq < p->base + cnt) - break; - } - if (idx == npics) - return (EINVAL); - - i->intline = i->irq - p->base; - i->pic = p->dev; - - /* Try a best guess if that failed */ - if (i->pic == NULL) - i->pic = root_pic; - - return (0); -} - -static void -powerpc_intr_eoi(void *arg) -{ - struct powerpc_intr *i = arg; - - PIC_EOI(i->pic, i->intline, i->priv); -} - -static void -powerpc_intr_pre_ithread(void *arg) -{ - struct powerpc_intr *i = arg; - - PIC_MASK(i->pic, i->intline, i->priv); - PIC_EOI(i->pic, i->intline, i->priv); -} - -static void -powerpc_intr_post_ithread(void *arg) -{ - struct powerpc_intr *i = arg; - - PIC_UNMASK(i->pic, i->intline, i->priv); -} - -static int -powerpc_assign_intr_cpu(void *arg, int cpu) -{ -#ifdef SMP - struct powerpc_intr *i = arg; - - if (cpu == NOCPU) - i->pi_cpuset = all_cpus; - else - CPU_SETOF(cpu, &i->pi_cpuset); - - if (!cold && i->pic != NULL && i->pic == root_pic) - PIC_BIND(i->pic, i->intline, i->pi_cpuset, &i->priv); - - return (0); -#else - return (EOPNOTSUPP); -#endif -} - -u_int -powerpc_register_pic(device_t dev, uint32_t node, u_int irqs, u_int ipis, - u_int atpic) -{ - struct pic *p; - u_int irq; - int idx; - - mtx_lock(&intr_table_lock); - - /* XXX see powerpc_get_irq(). */ - for (idx = 0; idx < npics; idx++) { - p = &piclist[idx]; - if (p->node != node) - continue; - if (node != 0 || p->dev == dev) - break; - } - p = &piclist[idx]; - - p->dev = dev; - p->node = node; - p->irqs = irqs; - p->ipis = ipis; - if (idx == npics) { -#ifdef DEV_ISA - p->base = (atpic) ? 0 : nirqs; -#else - p->base = nirqs; -#endif - irq = p->base + irqs + ipis; - nirqs = MAX(nirqs, irq); - npics++; - } - - KASSERT(npics < MAX_PICS, - ("Number of PICs exceeds maximum (%d)", MAX_PICS)); - - mtx_unlock(&intr_table_lock); - - return (p->base); -} - -u_int -powerpc_get_irq(uint32_t node, u_int pin) -{ - int idx; - - if (node == 0) - return (pin); - - mtx_lock(&intr_table_lock); - for (idx = 0; idx < npics; idx++) { - if (piclist[idx].node == node) { - mtx_unlock(&intr_table_lock); - return (piclist[idx].base + pin); - } - } - - /* - * XXX we should never encounter an unregistered PIC, but that - * can only be done when we properly support bus enumeration - * using multiple passes. Until then, fake an entry and give it - * some adhoc maximum number of IRQs and IPIs. - */ - piclist[idx].dev = NULL; - piclist[idx].node = node; - piclist[idx].irqs = 124; - piclist[idx].ipis = 4; - piclist[idx].base = nirqs; - nirqs += (1 << 25); - npics++; - - KASSERT(npics < MAX_PICS, - ("Number of PICs exceeds maximum (%d)", MAX_PICS)); - - mtx_unlock(&intr_table_lock); - - return (piclist[idx].base + pin); -} - -int -powerpc_enable_intr(void) -{ - struct powerpc_intr *i; - int error, vector; -#ifdef SMP - int n; -#endif - - if (npics == 0) - panic("no PIC detected\n"); - - if (root_pic == NULL) - root_pic = piclist[0].dev; - - KASSERT(root_pic != NULL, ("no root PIC!")); - -#ifdef SMP - /* Install an IPI handler. */ - if (mp_ncpus > 1) { - for (n = 0; n < npics; n++) { - if (piclist[n].dev != root_pic) - continue; - - KASSERT(piclist[n].ipis != 0, - ("%s: SMP root PIC does not supply any IPIs", - __func__)); - error = powerpc_setup_intr("IPI", - MAP_IRQ(piclist[n].node, piclist[n].irqs), - powerpc_ipi_handler, NULL, NULL, - INTR_TYPE_MISC | INTR_EXCL, &ipi_cookie, - 0 /* domain XXX */); - if (error) { - printf("unable to setup IPI handler\n"); - return (error); - } - - /* - * Some subterfuge: disable late EOI and mark this - * as an IPI to the dispatch layer. - */ - i = intr_lookup(MAP_IRQ(piclist[n].node, - piclist[n].irqs)); - i->event->ie_post_filter = NULL; - i->ipi = 1; - } - } -#endif - - for (vector = 0; vector < nvectors; vector++) { - i = powerpc_intrs[vector]; - if (i == NULL) - continue; - - error = powerpc_map_irq(i); - if (error) - continue; - - if (i->trig == INTR_TRIGGER_INVALID) - PIC_TRANSLATE_CODE(i->pic, i->intline, i->fwcode, - &i->trig, &i->pol); - if (i->trig != INTR_TRIGGER_CONFORM || - i->pol != INTR_POLARITY_CONFORM) - PIC_CONFIG(i->pic, i->intline, i->trig, i->pol); - - if (i->event != NULL) - PIC_ENABLE(i->pic, i->intline, vector, &i->priv); - } - - return (0); -} - -int -powerpc_setup_intr(const char *name, u_int irq, driver_filter_t filter, - driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep, - int domain) -{ - struct powerpc_intr *i; - int error, enable = 0; - - i = intr_lookup(irq); - if (i == NULL) - return (ENOMEM); - - if (i->event == NULL) { - error = intr_event_create(&i->event, (void *)i, 0, irq, - powerpc_intr_pre_ithread, powerpc_intr_post_ithread, - powerpc_intr_eoi, powerpc_assign_intr_cpu, "irq%u:", irq); - if (error) - return (error); - - enable = 1; - } - - error = intr_event_add_handler(i->event, name, filter, handler, arg, - intr_priority(flags), flags, cookiep); - if (error) - return (error); - i->pi_domain = domain; - if (strcmp(name, "IPI") != 0) { - CPU_ZERO(&i->pi_cpuset); - CPU_COPY(&cpuset_domain[domain], &i->pi_cpuset); - } - mtx_lock(&intr_table_lock); - intrcnt_setname(i->event->ie_fullname, i->cntindex); - mtx_unlock(&intr_table_lock); - - if (!cold) { - error = powerpc_map_irq(i); - - if (!error) { - if (i->trig == INTR_TRIGGER_INVALID) - PIC_TRANSLATE_CODE(i->pic, i->intline, - i->fwcode, &i->trig, &i->pol); - - if (i->trig != INTR_TRIGGER_CONFORM || - i->pol != INTR_POLARITY_CONFORM) - PIC_CONFIG(i->pic, i->intline, i->trig, i->pol); - - if (i->pic == root_pic) - PIC_BIND(i->pic, i->intline, i->pi_cpuset, &i->priv); - - if (enable) - PIC_ENABLE(i->pic, i->intline, i->vector, - &i->priv); - } - } - return (error); -} - -int -powerpc_teardown_intr(void *cookie) -{ - - return (intr_event_remove_handler(cookie)); -} - -#ifdef SMP -int -powerpc_bind_intr(u_int irq, u_char cpu) -{ - struct powerpc_intr *i; - - i = intr_lookup(irq); - if (i == NULL) - return (ENOMEM); - - return (intr_event_bind(i->event, cpu)); -} -#endif - -int -powerpc_fw_config_intr(int irq, int sense_code) -{ - struct powerpc_intr *i; - - i = intr_lookup(irq); - if (i == NULL) - return (ENOMEM); - - i->trig = INTR_TRIGGER_INVALID; - i->pol = INTR_POLARITY_CONFORM; - i->fwcode = sense_code; - - if (!cold && i->pic != NULL) { - PIC_TRANSLATE_CODE(i->pic, i->intline, i->fwcode, &i->trig, - &i->pol); - PIC_CONFIG(i->pic, i->intline, i->trig, i->pol); - } - - return (0); -} - -int -powerpc_config_intr(int irq, enum intr_trigger trig, enum intr_polarity pol) -{ - struct powerpc_intr *i; - - i = intr_lookup(irq); - if (i == NULL) - return (ENOMEM); - - i->trig = trig; - i->pol = pol; - - if (!cold && i->pic != NULL) - PIC_CONFIG(i->pic, i->intline, trig, pol); - - return (0); -} - -void -powerpc_dispatch_intr(u_int vector, struct trapframe *tf) -{ - struct powerpc_intr *i; - struct intr_event *ie; - - i = powerpc_intrs[vector]; - if (i == NULL) - goto stray; - - (*i->cntp)++; - - ie = i->event; - KASSERT(ie != NULL, ("%s: interrupt without an event", __func__)); - - /* - * IPIs are magical and need to be EOI'ed before filtering. - * This prevents races in IPI handling. - */ - if (i->ipi) - PIC_EOI(i->pic, i->intline, i->priv); - - if (intr_event_handle(ie, tf) != 0) { - goto stray; - } - return; - -stray: - stray_count++; - if (stray_count <= MAX_STRAY_LOG) { - printf("stray irq %d\n", i ? i->irq : -1); - if (stray_count >= MAX_STRAY_LOG) { - printf("got %d stray interrupts, not logging anymore\n", - MAX_STRAY_LOG); - } - } - if (i != NULL) - PIC_MASK(i->pic, i->intline, i->priv); -} - -void -powerpc_intr_mask(u_int irq) -{ - struct powerpc_intr *i; - - i = intr_lookup(irq); - if (i == NULL || i->pic == NULL) - return; - - PIC_MASK(i->pic, i->intline, i->priv); -} - -void -powerpc_intr_unmask(u_int irq) -{ - struct powerpc_intr *i; - - i = intr_lookup(irq); - if (i == NULL || i->pic == NULL) - return; - - PIC_UNMASK(i->pic, i->intline, i->priv); -} diff --git a/sys/powerpc/powerpc/iommu_if.m b/sys/powerpc/powerpc/iommu_if.m deleted file mode 100644 index c3a19fc135a..00000000000 --- a/sys/powerpc/powerpc/iommu_if.m +++ /dev/null @@ -1,53 +0,0 @@ -#- -# Copyright (c) 2010 Nathan Whitehorn -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -# SUCH DAMAGE. -# -# from: src/sys/kern/bus_if.m,v 1.21 2002/04/21 11:16:10 markm Exp -# - -#include - -#include -#include - -INTERFACE iommu; - -METHOD int map { - device_t iommu; - bus_dma_segment_t *segs; - int *nsegs; - bus_addr_t lowaddr; - bus_addr_t highaddr; - bus_size_t alignment; - bus_addr_t boundary; - void *cookie; -}; - -METHOD int unmap { - device_t iommu; - bus_dma_segment_t *segs; - int nsegs; - void *cookie; -}; - diff --git a/sys/powerpc/powerpc/machdep.c b/sys/powerpc/powerpc/machdep.c deleted file mode 100644 index af57a3c5f64..00000000000 --- a/sys/powerpc/powerpc/machdep.c +++ /dev/null @@ -1,892 +0,0 @@ -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/*- - * Copyright (C) 2001 Benno Rice - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $ - */ - -#include -#include "opt_ddb.h" -#include "opt_kstack_pages.h" -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#ifndef __powerpc64__ -#include -#endif -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -int cold = 1; -#ifdef __powerpc64__ -int cacheline_size = 128; -#else -int cacheline_size = 32; -#endif -int hw_direct_map = 1; - -#ifdef BOOKE -extern vm_paddr_t kernload; -#endif - -extern void *ap_pcpu; - -struct pcpu __pcpu[MAXCPU] __aligned(PAGE_SIZE); -static char init_kenv[2048]; - -static struct trapframe frame0; - -const char machine[] = "powerpc"; -SYSCTL_CONST_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD | CTLFLAG_CAPRD, - machine, "Machine class"); - -static void cpu_startup(void *); -SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); - -SYSCTL_INT(_machdep, CPU_CACHELINE, cacheline_size, - CTLFLAG_RD, &cacheline_size, 0, ""); - -uintptr_t powerpc_init(vm_offset_t, vm_offset_t, vm_offset_t, void *, - uint32_t); - -static void fake_preload_metadata(void); - -long Maxmem = 0; -long realmem = 0; - -/* Default MSR values set in the AIM/Book-E early startup code */ -register_t psl_kernset; -register_t psl_userset; -register_t psl_userstatic; -#ifdef __powerpc64__ -register_t psl_userset32; -#endif - -struct kva_md_info kmi; - -static void -cpu_startup(void *dummy) -{ - - /* - * Initialise the decrementer-based clock. - */ - decr_init(); - - /* - * Good {morning,afternoon,evening,night}. - */ - cpu_setup(PCPU_GET(cpuid)); - -#ifdef PERFMON - perfmon_init(); -#endif - printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)physmem), - ptoa((uintmax_t)physmem) / 1048576); - realmem = physmem; - - if (bootverbose) - printf("available KVA = %zu (%zu MB)\n", - virtual_end - virtual_avail, - (virtual_end - virtual_avail) / 1048576); - - /* - * Display any holes after the first chunk of extended memory. - */ - if (bootverbose) { - int indx; - - printf("Physical memory chunk(s):\n"); - for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { - vm_paddr_t size1 = - phys_avail[indx + 1] - phys_avail[indx]; - - #ifdef __powerpc64__ - printf("0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", - #else - printf("0x%09jx - 0x%09jx, %ju bytes (%ju pages)\n", - #endif - (uintmax_t)phys_avail[indx], - (uintmax_t)phys_avail[indx + 1] - 1, - (uintmax_t)size1, (uintmax_t)size1 / PAGE_SIZE); - } - } - - vm_ksubmap_init(&kmi); - - printf("avail memory = %ju (%ju MB)\n", - ptoa((uintmax_t)vm_free_count()), - ptoa((uintmax_t)vm_free_count()) / 1048576); - - /* - * Set up buffers, so they can be used to read disk labels. - */ - bufinit(); - vm_pager_bufferinit(); -} - -extern vm_offset_t __startkernel, __endkernel; -extern unsigned char __bss_start[]; -extern unsigned char __sbss_start[]; -extern unsigned char __sbss_end[]; -extern unsigned char _end[]; - -void aim_early_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, - void *mdp, uint32_t mdp_cookie); -void aim_cpu_init(vm_offset_t toc); -void booke_cpu_init(void); - -#ifdef DDB -static void load_external_symtab(void); -#endif - -uintptr_t -powerpc_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp, - uint32_t mdp_cookie) -{ - struct pcpu *pc; - struct cpuref bsp; - vm_offset_t startkernel, endkernel; - char *env; - void *kmdp = NULL; - bool ofw_bootargs = false; -#ifdef DDB - bool symbols_provided = false; - vm_offset_t ksym_start; - vm_offset_t ksym_end; - vm_offset_t ksym_sz; -#endif - - /* First guess at start/end kernel positions */ - startkernel = __startkernel; - endkernel = __endkernel; - - /* - * If the metadata pointer cookie is not set to the magic value, - * the number in mdp should be treated as nonsense. - */ - if (mdp_cookie != 0xfb5d104d) - mdp = NULL; - -#if !defined(BOOKE) - /* - * On BOOKE the BSS is already cleared and some variables - * initialized. Do not wipe them out. - */ - bzero(__sbss_start, __sbss_end - __sbss_start); - bzero(__bss_start, _end - __bss_start); -#endif - - cpu_feature_setup(); - -#ifdef AIM - aim_early_init(fdt, toc, ofentry, mdp, mdp_cookie); -#endif - - /* - * At this point, we are executing in our correct memory space. - * Book-E started there, and AIM has done an rfi and restarted - * execution from _start. - * - * We may still be in real mode, however. If we are running out of - * the direct map on 64 bit, this is possible to do. - */ - - /* - * Parse metadata if present and fetch parameters. Must be done - * before console is inited so cninit gets the right value of - * boothowto. - */ - if (mdp != NULL) { - /* - * Starting up from loader. - * - * Full metadata has been provided, but we need to figure - * out the correct address to relocate it to. - */ - char *envp = NULL; - uintptr_t md_offset = 0; - vm_paddr_t kernelstartphys, kernelendphys; - -#ifdef AIM - if ((uintptr_t)&powerpc_init > DMAP_BASE_ADDRESS) - md_offset = DMAP_BASE_ADDRESS; -#else /* BOOKE */ - md_offset = VM_MIN_KERNEL_ADDRESS - kernload; -#endif - - preload_metadata = mdp; - if (md_offset > 0) { - /* Translate phys offset into DMAP offset. */ - preload_metadata += md_offset; - preload_bootstrap_relocate(md_offset); - } - kmdp = preload_search_by_type("elf kernel"); - if (kmdp != NULL) { - boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int); - envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *); - if (envp != NULL) - envp += md_offset; - init_static_kenv(envp, 0); - if (fdt == 0) { - fdt = MD_FETCH(kmdp, MODINFOMD_DTBP, uintptr_t); - if (fdt != 0) - fdt += md_offset; - } - kernelstartphys = MD_FETCH(kmdp, MODINFO_ADDR, - vm_offset_t); - /* kernelstartphys is already relocated. */ - kernelendphys = MD_FETCH(kmdp, MODINFOMD_KERNEND, - vm_offset_t); - if (kernelendphys != 0) - kernelendphys += md_offset; - endkernel = ulmax(endkernel, kernelendphys); -#ifdef DDB - ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t); - ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t); - ksym_sz = *(Elf_Size*)ksym_start; - - db_fetch_ksymtab(ksym_start, ksym_end, md_offset); - /* Symbols provided by loader. */ - symbols_provided = true; -#endif - } - } else { - /* - * Self-loading kernel, we have to fake up metadata. - * - * Since we are creating the metadata from the final - * memory space, we don't need to call - * preload_boostrap_relocate(). - */ - fake_preload_metadata(); - kmdp = preload_search_by_type("elf kernel"); - init_static_kenv(init_kenv, sizeof(init_kenv)); - ofw_bootargs = true; - } - - /* Store boot environment state */ - OF_initial_setup((void *)fdt, NULL, (int (*)(void *))ofentry); - - /* - * Init params/tunables that can be overridden by the loader - */ - init_param1(); - - /* - * Start initializing proc0 and thread0. - */ - proc_linkup0(&proc0, &thread0); - thread0.td_frame = &frame0; -#ifdef __powerpc64__ - __asm __volatile("mr 13,%0" :: "r"(&thread0)); -#else - __asm __volatile("mr 2,%0" :: "r"(&thread0)); -#endif - - /* - * Init mutexes, which we use heavily in PMAP - */ - mutex_init(); - - /* - * Install the OF client interface - */ - OF_bootstrap(); - -#ifdef DDB - if (!symbols_provided && hw_direct_map) - load_external_symtab(); -#endif - - if (ofw_bootargs) - ofw_parse_bootargs(); - -#ifdef AIM - /* - * Early I/O map needs to be initialized before console, in order to - * map frame buffers properly, and after boot args have been parsed, - * to handle tunables properly. - */ - pmap_early_io_map_init(); -#endif - - /* - * Initialize the console before printing anything. - */ - cninit(); - -#ifdef AIM - aim_cpu_init(toc); -#else /* BOOKE */ - booke_cpu_init(); - - /* Make sure the kernel icache is valid before we go too much further */ - __syncicache((caddr_t)startkernel, endkernel - startkernel); -#endif - - /* - * Choose a platform module so we can get the physical memory map. - */ - - platform_probe_and_attach(); - - /* - * Set up per-cpu data for the BSP now that the platform can tell - * us which that is. - */ - if (platform_smp_get_bsp(&bsp) != 0) - bsp.cr_cpuid = 0; - pc = &__pcpu[bsp.cr_cpuid]; - __asm __volatile("mtsprg 0, %0" :: "r"(pc)); - pcpu_init(pc, bsp.cr_cpuid, sizeof(struct pcpu)); - pc->pc_curthread = &thread0; - thread0.td_oncpu = bsp.cr_cpuid; - pc->pc_cpuid = bsp.cr_cpuid; - pc->pc_hwref = bsp.cr_hwref; - - /* - * Init KDB - */ - kdb_init(); - - /* - * Bring up MMU - */ - pmap_mmu_init(); - link_elf_ireloc(kmdp); - pmap_bootstrap(startkernel, endkernel); - mtmsr(psl_kernset & ~PSL_EE); - - /* - * Initialize params/tunables that are derived from memsize - */ - init_param2(physmem); - - /* - * Grab booted kernel's name - */ - env = kern_getenv("kernelname"); - if (env != NULL) { - strlcpy(kernelname, env, sizeof(kernelname)); - freeenv(env); - } - - /* - * Finish setting up thread0. - */ - thread0.td_pcb = (struct pcb *) - ((thread0.td_kstack + thread0.td_kstack_pages * PAGE_SIZE - - sizeof(struct pcb)) & ~15UL); - bzero((void *)thread0.td_pcb, sizeof(struct pcb)); - pc->pc_curpcb = thread0.td_pcb; - - /* Initialise the message buffer. */ - msgbufinit(msgbufp, msgbufsize); - -#ifdef KDB - if (boothowto & RB_KDB) - kdb_enter(KDB_WHY_BOOTFLAGS, - "Boot flags requested debugger"); -#endif - - return (((uintptr_t)thread0.td_pcb - - (sizeof(struct callframe) - 3*sizeof(register_t))) & ~15UL); -} - -#ifdef DDB -/* - * On powernv and some booke systems, we might not have symbols loaded via - * loader. However, if the user passed the kernel in as the initrd as well, - * we can manually load it via reinterpreting the initrd copy of the kernel. - * - * In the BOOKE case, we don't actually have a DMAP yet, so we have to use - * temporary maps to inspect the memory, but write DMAP addresses to the - * configuration variables. - */ -static void -load_external_symtab(void) { - phandle_t chosen; - vm_paddr_t start, end; - pcell_t cell[2]; - ssize_t size; - u_char *kernelimg; /* Temporary map */ - u_char *kernelimg_final; /* Final location */ - - int i; - - Elf_Ehdr *ehdr; - Elf_Phdr *phdr; - Elf_Shdr *shdr; - - vm_offset_t ksym_start, ksym_sz, kstr_start, kstr_sz, - ksym_start_final, kstr_start_final; - - if (!hw_direct_map) - return; - - chosen = OF_finddevice("/chosen"); - if (chosen <= 0) - return; - - if (!OF_hasprop(chosen, "linux,initrd-start") || - !OF_hasprop(chosen, "linux,initrd-end")) - return; - - size = OF_getencprop(chosen, "linux,initrd-start", cell, sizeof(cell)); - if (size == 4) - start = cell[0]; - else if (size == 8) - start = (uint64_t)cell[0] << 32 | cell[1]; - else - return; - - size = OF_getencprop(chosen, "linux,initrd-end", cell, sizeof(cell)); - if (size == 4) - end = cell[0]; - else if (size == 8) - end = (uint64_t)cell[0] << 32 | cell[1]; - else - return; - - if (!(end - start > 0)) - return; - - kernelimg_final = (u_char *) PHYS_TO_DMAP(start); -#ifdef AIM - kernelimg = kernelimg_final; -#else /* BOOKE */ - kernelimg = (u_char *)pmap_early_io_map(start, PAGE_SIZE); -#endif - ehdr = (Elf_Ehdr *)kernelimg; - - if (!IS_ELF(*ehdr)) { -#ifdef BOOKE - pmap_early_io_unmap(start, PAGE_SIZE); -#endif - return; - } - -#ifdef BOOKE - pmap_early_io_unmap(start, PAGE_SIZE); - kernelimg = (u_char *)pmap_early_io_map(start, (end - start)); -#endif - - phdr = (Elf_Phdr *)(kernelimg + ehdr->e_phoff); - shdr = (Elf_Shdr *)(kernelimg + ehdr->e_shoff); - - ksym_start = 0; - ksym_sz = 0; - ksym_start_final = 0; - kstr_start = 0; - kstr_sz = 0; - kstr_start_final = 0; - for (i = 0; i < ehdr->e_shnum; i++) { - if (shdr[i].sh_type == SHT_SYMTAB) { - ksym_start = (vm_offset_t)(kernelimg + - shdr[i].sh_offset); - ksym_start_final = (vm_offset_t) - (kernelimg_final + shdr[i].sh_offset); - ksym_sz = (vm_offset_t)(shdr[i].sh_size); - kstr_start = (vm_offset_t)(kernelimg + - shdr[shdr[i].sh_link].sh_offset); - kstr_start_final = (vm_offset_t) - (kernelimg_final + - shdr[shdr[i].sh_link].sh_offset); - - kstr_sz = (vm_offset_t) - (shdr[shdr[i].sh_link].sh_size); - } - } - - if (ksym_start != 0 && kstr_start != 0 && ksym_sz != 0 && - kstr_sz != 0 && ksym_start < kstr_start) { - /* - * We can't use db_fetch_ksymtab() here, because we need to - * feed in DMAP addresses that are not mapped yet on booke. - * - * Write the variables directly, where db_init() will pick - * them up later, after the DMAP is up. - */ - ksymtab = ksym_start_final; - ksymtab_size = ksym_sz; - kstrtab = kstr_start_final; - ksymtab_relbase = (__startkernel - KERNBASE); - } - -#ifdef BOOKE - pmap_early_io_unmap(start, (end - start)); -#endif - -}; -#endif - -/* - * When not being loaded from loader, we need to create our own metadata - * so we can interact with the kernel linker. - */ -static void -fake_preload_metadata(void) { - /* We depend on dword alignment here. */ - static uint32_t fake_preload[36] __aligned(8); - int i = 0; - - fake_preload[i++] = MODINFO_NAME; - fake_preload[i++] = strlen("kernel") + 1; - strcpy((char*)&fake_preload[i], "kernel"); - /* ['k' 'e' 'r' 'n'] ['e' 'l' '\0' ..] */ - i += 2; - - fake_preload[i++] = MODINFO_TYPE; - fake_preload[i++] = strlen("elf kernel") + 1; - strcpy((char*)&fake_preload[i], "elf kernel"); - /* ['e' 'l' 'f' ' '] ['k' 'e' 'r' 'n'] ['e' 'l' '\0' ..] */ - i += 3; - -#ifdef __powerpc64__ - /* Padding -- Fields start on u_long boundaries */ - fake_preload[i++] = 0; -#endif - - fake_preload[i++] = MODINFO_ADDR; - fake_preload[i++] = sizeof(vm_offset_t); - *(vm_offset_t *)&fake_preload[i] = - (vm_offset_t)(__startkernel); - i += (sizeof(vm_offset_t) / 4); - - fake_preload[i++] = MODINFO_SIZE; - fake_preload[i++] = sizeof(vm_offset_t); - *(vm_offset_t *)&fake_preload[i] = - (vm_offset_t)(__endkernel) - (vm_offset_t)(__startkernel); - i += (sizeof(vm_offset_t) / 4); - - /* - * MODINFOMD_SSYM and MODINFOMD_ESYM cannot be provided here, - * as the memory comes from outside the loaded ELF sections. - * - * If the symbols are being provided by other means (MFS), the - * tables will be loaded into the debugger directly. - */ - - /* Null field at end to mark end of data. */ - fake_preload[i++] = 0; - fake_preload[i] = 0; - preload_metadata = (void*)fake_preload; -} - -/* - * Flush the D-cache for non-DMA I/O so that the I-cache can - * be made coherent later. - */ -void -cpu_flush_dcache(void *ptr, size_t len) -{ - register_t addr, off; - - /* - * Align the address to a cacheline and adjust the length - * accordingly. Then round the length to a multiple of the - * cacheline for easy looping. - */ - addr = (uintptr_t)ptr; - off = addr & (cacheline_size - 1); - addr -= off; - len = roundup2(len + off, cacheline_size); - - while (len > 0) { - __asm __volatile ("dcbf 0,%0" :: "r"(addr)); - __asm __volatile ("sync"); - addr += cacheline_size; - len -= cacheline_size; - } -} - -int -ptrace_set_pc(struct thread *td, unsigned long addr) -{ - struct trapframe *tf; - - tf = td->td_frame; - tf->srr0 = (register_t)addr; - - return (0); -} - -void -spinlock_enter(void) -{ - struct thread *td; - register_t msr; - - td = curthread; - if (td->td_md.md_spinlock_count == 0) { - nop_prio_mhigh(); - msr = intr_disable(); - td->td_md.md_spinlock_count = 1; - td->td_md.md_saved_msr = msr; - critical_enter(); - } else - td->td_md.md_spinlock_count++; -} - -void -spinlock_exit(void) -{ - struct thread *td; - register_t msr; - - td = curthread; - msr = td->td_md.md_saved_msr; - td->td_md.md_spinlock_count--; - if (td->td_md.md_spinlock_count == 0) { - critical_exit(); - intr_restore(msr); - nop_prio_medium(); - } -} - -/* - * Simple ddb(4) command/hack to view any SPR on the running CPU. - * Uses a trivial asm function to perform the mfspr, and rewrites the mfspr - * instruction each time. - * XXX: Since it uses code modification, it won't work if the kernel code pages - * are marked RO. - */ -extern register_t get_spr(int); - -#ifdef DDB -DB_SHOW_COMMAND(spr, db_show_spr) -{ - register_t spr; - volatile uint32_t *p; - int sprno, saved_sprno; - - if (!have_addr) - return; - - saved_sprno = sprno = (intptr_t) addr; - sprno = ((sprno & 0x3e0) >> 5) | ((sprno & 0x1f) << 5); - p = (uint32_t *)(void *)&get_spr; -#ifdef __powerpc64__ -#if defined(_CALL_ELF) && _CALL_ELF == 2 - /* Account for ELFv2 function prologue. */ - p += 2; -#else - p = *(volatile uint32_t * volatile *)p; -#endif -#endif - *p = (*p & ~0x001ff800) | (sprno << 11); - __syncicache(__DEVOLATILE(uint32_t *, p), cacheline_size); - spr = get_spr(sprno); - - db_printf("SPR %d(%x): %lx\n", saved_sprno, saved_sprno, - (unsigned long)spr); -} - -DB_SHOW_COMMAND(frame, db_show_frame) -{ - struct trapframe *tf; - long reg; - int i; - - tf = have_addr ? (struct trapframe *)addr : curthread->td_frame; - - /* - * Everything casts through long to simplify the printing. - * 'long' is native register size anyway. - */ - db_printf("trap frame %p\n", tf); - for (i = 0; i < nitems(tf->fixreg); i++) { - reg = tf->fixreg[i]; - db_printf(" r%d:\t%#lx (%ld)\n", i, reg, reg); - } - reg = tf->lr; - db_printf(" lr:\t%#lx\n", reg); - reg = tf->cr; - db_printf(" cr:\t%#lx\n", reg); - reg = tf->xer; - db_printf(" xer:\t%#lx\n", reg); - reg = tf->ctr; - db_printf(" ctr:\t%#lx (%ld)\n", reg, reg); - reg = tf->srr0; - db_printf(" srr0:\t%#lx\n", reg); - reg = tf->srr1; - db_printf(" srr1:\t%#lx\n", reg); - reg = tf->exc; - db_printf(" exc:\t%#lx\n", reg); - reg = tf->dar; - db_printf(" dar:\t%#lx\n", reg); -#ifdef AIM - reg = tf->cpu.aim.dsisr; - db_printf(" dsisr:\t%#lx\n", reg); -#else - reg = tf->cpu.booke.esr; - db_printf(" esr:\t%#lx\n", reg); - reg = tf->cpu.booke.dbcr0; - db_printf(" dbcr0:\t%#lx\n", reg); -#endif -} -#endif - -#undef bzero -void -bzero(void *buf, size_t len) -{ - caddr_t p; - - p = buf; - - while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) { - *p++ = 0; - len--; - } - - while (len >= sizeof(u_long) * 8) { - *(u_long*) p = 0; - *((u_long*) p + 1) = 0; - *((u_long*) p + 2) = 0; - *((u_long*) p + 3) = 0; - len -= sizeof(u_long) * 8; - *((u_long*) p + 4) = 0; - *((u_long*) p + 5) = 0; - *((u_long*) p + 6) = 0; - *((u_long*) p + 7) = 0; - p += sizeof(u_long) * 8; - } - - while (len >= sizeof(u_long)) { - *(u_long*) p = 0; - len -= sizeof(u_long); - p += sizeof(u_long); - } - - while (len) { - *p++ = 0; - len--; - } -} - -/* __stack_chk_fail_local() is called in secure-plt (32-bit). */ -#if !defined(__powerpc64__) -extern void __stack_chk_fail(void); -void __stack_chk_fail_local(void); - -void -__stack_chk_fail_local(void) -{ - - __stack_chk_fail(); -} -#endif diff --git a/sys/powerpc/powerpc/mem.c b/sys/powerpc/powerpc/mem.c deleted file mode 100644 index 355e1cdc27e..00000000000 --- a/sys/powerpc/powerpc/mem.c +++ /dev/null @@ -1,330 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1988 University of Utah. - * Copyright (c) 1982, 1986, 1990 The Regents of the University of California. - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department, and code derived from software contributed to - * Berkeley by William Jolitz. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: Utah $Hdr: mem.c 1.13 89/10/08$ - * from: @(#)mem.c 7.2 (Berkeley) 5/9/91 - */ - -#include -/* - * Memory special file - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include - -static void ppc_mrinit(struct mem_range_softc *); -static int ppc_mrset(struct mem_range_softc *, struct mem_range_desc *, int *); - -MALLOC_DEFINE(M_MEMDESC, "memdesc", "memory range descriptors"); - -static struct mem_range_ops ppc_mem_range_ops = { - ppc_mrinit, - ppc_mrset, - NULL, - NULL -}; -struct mem_range_softc mem_range_softc = { - &ppc_mem_range_ops, - 0, 0, NULL -}; - -/* ARGSUSED */ -int -memrw(struct cdev *dev, struct uio *uio, int flags) -{ - struct iovec *iov; - int error = 0; - vm_offset_t va, eva, off, v; - vm_prot_t prot; - struct vm_page m; - vm_page_t marr; - vm_size_t cnt; - ssize_t orig_resid; - - cnt = 0; - error = 0; - orig_resid = uio->uio_resid; - - while (uio->uio_resid > 0 && !error) { - iov = uio->uio_iov; - if (iov->iov_len == 0) { - uio->uio_iov++; - uio->uio_iovcnt--; - if (uio->uio_iovcnt < 0) - panic("memrw"); - continue; - } - if (dev2unit(dev) == CDEV_MINOR_MEM) { - v = uio->uio_offset; - -kmem_direct_mapped: off = v & PAGE_MASK; - cnt = PAGE_SIZE - ((vm_offset_t)iov->iov_base & - PAGE_MASK); - cnt = min(cnt, PAGE_SIZE - off); - cnt = min(cnt, iov->iov_len); - - if (mem_valid(v, cnt)) { - error = EFAULT; - break; - } - - if (hw_direct_map && !pmap_dev_direct_mapped(v, cnt)) { - error = uiomove((void *)PHYS_TO_DMAP(v), cnt, - uio); - } else { - m.phys_addr = trunc_page(v); - marr = &m; - error = uiomove_fromphys(&marr, off, cnt, uio); - } - } - else if (dev2unit(dev) == CDEV_MINOR_KMEM) { - va = uio->uio_offset; - - if (hw_direct_map && - ((va < VM_MIN_KERNEL_ADDRESS) || (va > virtual_end))) { - v = DMAP_TO_PHYS(va); - goto kmem_direct_mapped; - } - - va = trunc_page(uio->uio_offset); - eva = round_page(uio->uio_offset - + iov->iov_len); - - /* - * Make sure that all the pages are currently resident - * so that we don't create any zero-fill pages. - */ - - for (; va < eva; va += PAGE_SIZE) { - if (pmap_extract(kernel_pmap, va) == 0) { - error = EFAULT; - break; - } - } - if (error != 0) - break; - - prot = (uio->uio_rw == UIO_READ) - ? VM_PROT_READ : VM_PROT_WRITE; - - va = uio->uio_offset; - if (((va >= VM_MIN_KERNEL_ADDRESS) && (va <= virtual_end)) && - !kernacc((void *) va, iov->iov_len, prot)) { - error = EFAULT; - break; - } - - error = uiomove((void *)va, iov->iov_len, uio); - } - } - /* - * Don't return error if any byte was written. Read and write - * can return error only if no i/o was performed. - */ - if (uio->uio_resid != orig_resid) - error = 0; - return (error); -} - -/* - * allow user processes to MMAP some memory sections - * instead of going through read/write - */ -int -memmmap(struct cdev *dev, vm_ooffset_t offset, vm_paddr_t *paddr, - int prot, vm_memattr_t *memattr) -{ - int i; - - if (dev2unit(dev) == CDEV_MINOR_MEM) - *paddr = offset; - else - return (EFAULT); - - for (i = 0; i < mem_range_softc.mr_ndesc; i++) { - if (!(mem_range_softc.mr_desc[i].mr_flags & MDF_ACTIVE)) - continue; - - if (offset >= mem_range_softc.mr_desc[i].mr_base && - offset < mem_range_softc.mr_desc[i].mr_base + - mem_range_softc.mr_desc[i].mr_len) { - switch (mem_range_softc.mr_desc[i].mr_flags & - MDF_ATTRMASK) { - case MDF_WRITEBACK: - *memattr = VM_MEMATTR_WRITE_BACK; - break; - case MDF_WRITECOMBINE: - *memattr = VM_MEMATTR_WRITE_COMBINING; - break; - case MDF_UNCACHEABLE: - *memattr = VM_MEMATTR_UNCACHEABLE; - break; - case MDF_WRITETHROUGH: - *memattr = VM_MEMATTR_WRITE_THROUGH; - break; - } - - break; - } - } - - return (0); -} - -static void -ppc_mrinit(struct mem_range_softc *sc) -{ - sc->mr_cap = 0; - sc->mr_ndesc = 8; /* XXX: Should be dynamically expandable */ - sc->mr_desc = malloc(sc->mr_ndesc * sizeof(struct mem_range_desc), - M_MEMDESC, M_WAITOK | M_ZERO); -} - -static int -ppc_mrset(struct mem_range_softc *sc, struct mem_range_desc *desc, int *arg) -{ - int i; - - switch(*arg) { - case MEMRANGE_SET_UPDATE: - for (i = 0; i < sc->mr_ndesc; i++) { - if (!sc->mr_desc[i].mr_len) { - sc->mr_desc[i] = *desc; - sc->mr_desc[i].mr_flags |= MDF_ACTIVE; - return (0); - } - if (sc->mr_desc[i].mr_base == desc->mr_base && - sc->mr_desc[i].mr_len == desc->mr_len) - return (EEXIST); - } - return (ENOSPC); - case MEMRANGE_SET_REMOVE: - for (i = 0; i < sc->mr_ndesc; i++) - if (sc->mr_desc[i].mr_base == desc->mr_base && - sc->mr_desc[i].mr_len == desc->mr_len) { - bzero(&sc->mr_desc[i], sizeof(sc->mr_desc[i])); - return (0); - } - return (ENOENT); - default: - return (EOPNOTSUPP); - } - - return (0); -} - -/* - * Operations for changing memory attributes. - * - * This is basically just an ioctl shim for mem_range_attr_get - * and mem_range_attr_set. - */ -int -memioctl_md(struct cdev *dev __unused, u_long cmd, caddr_t data, int flags, - struct thread *td) -{ - int nd, error = 0; - struct mem_range_op *mo = (struct mem_range_op *)data; - struct mem_range_desc *md; - - /* is this for us? */ - if ((cmd != MEMRANGE_GET) && - (cmd != MEMRANGE_SET)) - return (ENOTTY); - - /* any chance we can handle this? */ - if (mem_range_softc.mr_op == NULL) - return (EOPNOTSUPP); - - /* do we have any descriptors? */ - if (mem_range_softc.mr_ndesc == 0) - return (ENXIO); - - switch (cmd) { - case MEMRANGE_GET: - nd = imin(mo->mo_arg[0], mem_range_softc.mr_ndesc); - if (nd > 0) { - md = (struct mem_range_desc *) - malloc(nd * sizeof(struct mem_range_desc), - M_MEMDESC, M_WAITOK); - error = mem_range_attr_get(md, &nd); - if (!error) - error = copyout(md, mo->mo_desc, - nd * sizeof(struct mem_range_desc)); - free(md, M_MEMDESC); - } - else - nd = mem_range_softc.mr_ndesc; - mo->mo_arg[0] = nd; - break; - - case MEMRANGE_SET: - md = (struct mem_range_desc *)malloc(sizeof(struct mem_range_desc), - M_MEMDESC, M_WAITOK); - error = copyin(mo->mo_desc, md, sizeof(struct mem_range_desc)); - /* clamp description string */ - md->mr_owner[sizeof(md->mr_owner) - 1] = 0; - if (error == 0) - error = mem_range_attr_set(md, &mo->mo_arg[0]); - free(md, M_MEMDESC); - break; - } - return (error); -} diff --git a/sys/powerpc/powerpc/minidump_machdep.c b/sys/powerpc/powerpc/minidump_machdep.c deleted file mode 100644 index e0b80ecefa2..00000000000 --- a/sys/powerpc/powerpc/minidump_machdep.c +++ /dev/null @@ -1,338 +0,0 @@ -/*- - * Copyright (c) 2019 Leandro Lupori - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -/* Debugging stuff */ -#define MINIDUMP_DEBUG 0 -#if MINIDUMP_DEBUG -#define dprintf(fmt, ...) printf(fmt, ## __VA_ARGS__) -#define DBG(...) __VA_ARGS__ -static size_t total, dumptotal; -static void dump_total(const char *id, size_t sz); -#else -#define dprintf(fmt, ...) -#define DBG(...) -#define dump_total(...) -#endif - -extern vm_offset_t __startkernel, __endkernel; - -static int dump_retry_count = 5; -SYSCTL_INT(_machdep, OID_AUTO, dump_retry_count, CTLFLAG_RWTUN, - &dump_retry_count, 0, - "Number of times dump has to retry before bailing out"); - -static struct kerneldumpheader kdh; -static char pgbuf[PAGE_SIZE]; - -static size_t dumpsize; - -/* Handle chunked writes. */ -static size_t fragsz; - -static void -pmap_kenter_temporary(vm_offset_t va, vm_paddr_t pa) -{ - pmap_kremove(va); - pmap_kenter(va, pa); -} - -static int -blk_flush(struct dumperinfo *di) -{ - int error; - - if (fragsz == 0) - return (0); - - error = dump_append(di, crashdumpmap, fragsz); - DBG(dumptotal += fragsz;) - fragsz = 0; - return (error); -} - -static int -blk_write(struct dumperinfo *di, char *ptr, vm_paddr_t pa, size_t sz) -{ - size_t len, maxdumpsz; - int error, i, c; - - maxdumpsz = MIN(di->maxiosize, MAXDUMPPGS * PAGE_SIZE); - if (maxdumpsz == 0) /* seatbelt */ - maxdumpsz = PAGE_SIZE; - error = 0; - if ((sz % PAGE_SIZE) != 0) { - printf("Size not page aligned\n"); - return (EINVAL); - } - if (ptr != NULL && pa != 0) { - printf("Can't have both va and pa!\n"); - return (EINVAL); - } - if ((pa % PAGE_SIZE) != 0) { - printf("Address not page aligned 0x%lx\n", pa); - return (EINVAL); - } - if (ptr != NULL) { - /* - * If we're doing a virtual dump, flush any pre-existing - * pa pages - */ - error = blk_flush(di); - if (error) - return (error); - } - while (sz) { - len = maxdumpsz - fragsz; - if (len > sz) - len = sz; - - dumpsys_pb_progress(len); - - if (ptr) { - error = dump_append(di, ptr, len); - if (error) - return (error); - DBG(dumptotal += len;) - ptr += len; - } else { - for (i = 0; i < len; i += PAGE_SIZE) - pmap_kenter_temporary( - (vm_offset_t)crashdumpmap + fragsz + i, - pa + i); - - fragsz += len; - pa += len; - if (fragsz == maxdumpsz) { - error = blk_flush(di); - if (error) - return (error); - } - } - sz -= len; - - /* Check for user abort. */ - c = cncheckc(); - if (c == 0x03) - return (ECANCELED); - if (c != -1) - printf(" (CTRL-C to abort) "); - } - - return (0); -} - -static int -dump_pmap(struct dumperinfo *di) -{ - void *ctx; - char *buf; - u_long nbytes; - int error; - - ctx = dumpsys_dump_pmap_init(sizeof(pgbuf) / PAGE_SIZE); - - for (;;) { - buf = dumpsys_dump_pmap(ctx, pgbuf, &nbytes); - if (buf == NULL) - break; - error = blk_write(di, buf, 0, nbytes); - if (error) - return (error); - } - - return (0); -} - -int -cpu_minidumpsys(struct dumperinfo *di, const struct minidumpstate *state) -{ - vm_paddr_t pa; - int error, retry_count; - uint32_t pmapsize; - struct minidumphdr mdhdr; - struct msgbuf *mbp; - - retry_count = 0; -retry: - retry_count++; - fragsz = 0; - DBG(total = dumptotal = 0;) - - /* Build set of dumpable pages from kernel pmap */ - pmapsize = dumpsys_scan_pmap(state->dump_bitset); - if (pmapsize % PAGE_SIZE != 0) { - printf("pmapsize not page aligned: 0x%x\n", pmapsize); - return (EINVAL); - } - - /* Calculate dump size */ - mbp = state->msgbufp; - dumpsize = PAGE_SIZE; /* header */ - dumpsize += round_page(mbp->msg_size); - dumpsize += round_page(sizeof(dump_avail)); - dumpsize += round_page(BITSET_SIZE(vm_page_dump_pages)); - dumpsize += pmapsize; - VM_PAGE_DUMP_FOREACH(state->dump_bitset, pa) { - /* Clear out undumpable pages now if needed */ - if (vm_phys_is_dumpable(pa)) - dumpsize += PAGE_SIZE; - else - vm_page_dump_drop(state->dump_bitset, pa); - } - dumpsys_pb_init(dumpsize); - - /* Initialize mdhdr */ - bzero(&mdhdr, sizeof(mdhdr)); - strcpy(mdhdr.magic, MINIDUMP_MAGIC); - strncpy(mdhdr.mmu_name, pmap_mmu_name(), sizeof(mdhdr.mmu_name) - 1); - mdhdr.version = MINIDUMP_VERSION; - mdhdr.msgbufsize = mbp->msg_size; - mdhdr.bitmapsize = round_page(BITSET_SIZE(vm_page_dump_pages)); - mdhdr.pmapsize = pmapsize; - mdhdr.kernbase = VM_MIN_KERNEL_ADDRESS; - mdhdr.kernend = VM_MAX_SAFE_KERNEL_ADDRESS; - mdhdr.dmapbase = DMAP_BASE_ADDRESS; - mdhdr.dmapend = DMAP_MAX_ADDRESS; - mdhdr.hw_direct_map = hw_direct_map; - mdhdr.startkernel = __startkernel; - mdhdr.endkernel = __endkernel; - mdhdr.dumpavailsize = round_page(sizeof(dump_avail)); - - dump_init_header(di, &kdh, KERNELDUMPMAGIC, KERNELDUMP_POWERPC_VERSION, - dumpsize); - - error = dump_start(di, &kdh); - if (error) - goto fail; - - printf("Dumping %lu out of %ju MB:", dumpsize >> 20, - ptoa((uintmax_t)physmem) / 1048576); - - /* Dump minidump header */ - bzero(pgbuf, sizeof(pgbuf)); - memcpy(pgbuf, &mdhdr, sizeof(mdhdr)); - error = blk_write(di, pgbuf, 0, PAGE_SIZE); - if (error) - goto fail; - dump_total("header", PAGE_SIZE); - - /* Dump msgbuf up front */ - error = blk_write(di, mbp->msg_ptr, 0, round_page(mbp->msg_size)); - dump_total("msgbuf", round_page(mbp->msg_size)); - - /* Dump dump_avail */ - _Static_assert(sizeof(dump_avail) <= sizeof(pgbuf), - "Large dump_avail not handled"); - bzero(pgbuf, sizeof(mdhdr)); - memcpy(pgbuf, dump_avail, sizeof(dump_avail)); - error = blk_write(di, pgbuf, 0, PAGE_SIZE); - if (error) - goto fail; - dump_total("dump_avail", round_page(sizeof(dump_avail))); - - /* Dump bitmap */ - error = blk_write(di, (char *)vm_page_dump, 0, - round_page(BITSET_SIZE(vm_page_dump_pages))); - if (error) - goto fail; - dump_total("bitmap", round_page(BITSET_SIZE(vm_page_dump_pages))); - - /* Dump kernel page directory pages */ - error = dump_pmap(di); - if (error) - goto fail; - dump_total("pmap", pmapsize); - - /* Dump memory chunks */ - VM_PAGE_DUMP_FOREACH(state->dump_bitset, pa) { - error = blk_write(di, 0, pa, PAGE_SIZE); - if (error) - goto fail; - } - - error = blk_flush(di); - if (error) - goto fail; - dump_total("mem_chunks", dumpsize - total); - - error = dump_finish(di, &kdh); - if (error) - goto fail; - - printf("\nDump complete\n"); - return (0); - -fail: - if (error < 0) - error = -error; - - printf("\n"); - if (error == ENOSPC) { - printf("Dump map grown while dumping. "); - if (retry_count < dump_retry_count) { - printf("Retrying...\n"); - goto retry; - } - printf("Dump failed.\n"); - } else if (error == ECANCELED) - printf("Dump aborted\n"); - else if (error == E2BIG) - printf("Dump failed. Partition too small.\n"); - else - printf("** DUMP FAILED (ERROR %d) **\n", error); - return (error); -} - -#if MINIDUMP_DEBUG -static void -dump_total(const char *id, size_t sz) -{ - total += sz; - dprintf("\n%s=%08lx/%08lx/%08lx\n", - id, sz, total, dumptotal); -} -#endif diff --git a/sys/powerpc/powerpc/mp_machdep.c b/sys/powerpc/powerpc/mp_machdep.c deleted file mode 100644 index 10c051a905d..00000000000 --- a/sys/powerpc/powerpc/mp_machdep.c +++ /dev/null @@ -1,392 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2008 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "pic_if.h" - -volatile static int ap_awake; -volatile static u_int ap_letgo; -volatile static u_quad_t ap_timebase; -static struct mtx ap_boot_mtx; -struct pcb stoppcbs[MAXCPU]; - -void -machdep_ap_bootstrap(void) -{ - - PCPU_SET(awake, 1); - __asm __volatile("msync; isync"); - - while (ap_letgo == 0) - nop_prio_vlow(); - nop_prio_medium(); - - /* - * Set timebase as soon as possible to meet an implicit rendezvous - * from cpu_mp_unleash(), which sets ap_letgo and then immediately - * sets timebase. - * - * Note that this is instrinsically racy and is only relevant on - * platforms that do not support better mechanisms. - */ - platform_smp_timebase_sync(ap_timebase, 1); - - /* Give platform code a chance to do anything else necessary */ - platform_smp_ap_init(); - - /* Initialize decrementer */ - decr_ap_init(); - - /* Serialize console output and AP count increment */ - mtx_lock_spin(&ap_boot_mtx); - ap_awake++; - if (bootverbose) - printf("SMP: AP CPU #%d launched\n", PCPU_GET(cpuid)); - else - printf("%s%d%s", ap_awake == 2 ? "Launching APs: " : "", - PCPU_GET(cpuid), ap_awake == mp_ncpus ? "\n" : " "); - mtx_unlock_spin(&ap_boot_mtx); - - while(smp_started == 0) - ; - - /* Start per-CPU event timers. */ - cpu_initclocks_ap(); - - /* Announce ourselves awake, and enter the scheduler */ - sched_throw(NULL); -} - -void -cpu_mp_setmaxid(void) -{ - struct cpuref cpuref; - int error; - - mp_ncpus = 0; - mp_maxid = 0; - error = platform_smp_first_cpu(&cpuref); - while (!error) { - mp_ncpus++; - mp_maxid = max(cpuref.cr_cpuid, mp_maxid); - error = platform_smp_next_cpu(&cpuref); - } - /* Sanity. */ - if (mp_ncpus == 0) - mp_ncpus = 1; -} - -int -cpu_mp_probe(void) -{ - - /* - * We're not going to enable SMP if there's only 1 processor. - */ - return (mp_ncpus > 1); -} - -void -cpu_mp_start(void) -{ - struct cpuref bsp, cpu; - struct pcpu *pc; - int domain, error; - - error = platform_smp_get_bsp(&bsp); - KASSERT(error == 0, ("Don't know BSP")); - - error = platform_smp_first_cpu(&cpu); - while (!error) { - if (cpu.cr_cpuid >= MAXCPU) { - printf("SMP: cpu%d: skipped -- ID out of range\n", - cpu.cr_cpuid); - goto next; - } - if (CPU_ISSET(cpu.cr_cpuid, &all_cpus)) { - printf("SMP: cpu%d: skipped - duplicate ID\n", - cpu.cr_cpuid); - goto next; - } - - if (vm_ndomains > 1) - domain = cpu.cr_domain; - else - domain = 0; - - if (cpu.cr_cpuid != bsp.cr_cpuid) { - void *dpcpu; - - pc = &__pcpu[cpu.cr_cpuid]; - dpcpu = (void *)kmem_malloc_domainset(DOMAINSET_PREF(domain), - DPCPU_SIZE, M_WAITOK | M_ZERO); - pcpu_init(pc, cpu.cr_cpuid, sizeof(*pc)); - dpcpu_init(dpcpu, cpu.cr_cpuid); - } else { - pc = pcpup; - pc->pc_cpuid = bsp.cr_cpuid; - pc->pc_bsp = 1; - } - pc->pc_domain = domain; - pc->pc_hwref = cpu.cr_hwref; - - CPU_SET(pc->pc_cpuid, &cpuset_domain[pc->pc_domain]); - KASSERT(pc->pc_domain < MAXMEMDOM, ("bad domain value %d\n", - pc->pc_domain)); - CPU_SET(pc->pc_cpuid, &all_cpus); -next: - error = platform_smp_next_cpu(&cpu); - } - -#ifdef SMP - platform_smp_probe_threads(); -#endif -} - -void -cpu_mp_announce(void) -{ - struct pcpu *pc; - int i; - - if (!bootverbose) - return; - - CPU_FOREACH(i) { - pc = pcpu_find(i); - if (pc == NULL) - continue; - printf("cpu%d: dev=%x domain=%d ", i, (int)pc->pc_hwref, pc->pc_domain); - if (pc->pc_bsp) - printf(" (BSP)"); - printf("\n"); - } -} - -static void -cpu_mp_unleash(void *dummy) -{ - struct pcpu *pc; - int cpus, timeout; - int ret; - - if (mp_ncpus <= 1) - return; - - mtx_init(&ap_boot_mtx, "ap boot", NULL, MTX_SPIN); - - cpus = 0; - smp_cpus = 0; -#ifdef BOOKE - tlb1_ap_prep(); -#endif - STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { - cpus++; - if (!pc->pc_bsp) { - if (bootverbose) - printf("Waking up CPU %d (dev=%x)\n", - pc->pc_cpuid, (int)pc->pc_hwref); - - pc->pc_flags = PCPU_GET(flags); /* Copy cached CPU flags */ - ret = platform_smp_start_cpu(pc); - if (ret == 0) { - timeout = 2000; /* wait 2sec for the AP */ - while (!pc->pc_awake && --timeout > 0) - DELAY(1000); - } - } else { - pc->pc_awake = 1; - } - if (pc->pc_awake) { - if (bootverbose) - printf("Adding CPU %d, hwref=%jx, awake=%x\n", - pc->pc_cpuid, (uintmax_t)pc->pc_hwref, - pc->pc_awake); - smp_cpus++; - } else - CPU_SET(pc->pc_cpuid, &stopped_cpus); - } - - ap_awake = 1; - - /* Provide our current DEC and TB values for APs */ - ap_timebase = mftb() + 10; - __asm __volatile("msync; isync"); - - /* Let APs continue */ - atomic_store_rel_int(&ap_letgo, 1); - - platform_smp_timebase_sync(ap_timebase, 0); - - while (ap_awake < smp_cpus) - ; - - if (smp_cpus != cpus || cpus != mp_ncpus) { - printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n", - mp_ncpus, cpus, smp_cpus); - } - - if (smp_cpus > 1) - atomic_store_rel_int(&smp_started, 1); - - /* Let the APs get into the scheduler */ - DELAY(10000); - -} - -SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL); - -int -powerpc_ipi_handler(void *arg) -{ - u_int cpuid; - uint32_t ipimask; - int msg; - - CTR2(KTR_SMP, "%s: MSR 0x%08x", __func__, mfmsr()); - - ipimask = atomic_readandclear_32(&(pcpup->pc_ipimask)); - if (ipimask == 0) - return (FILTER_STRAY); - while ((msg = ffs(ipimask) - 1) != -1) { - ipimask &= ~(1u << msg); - switch (msg) { - case IPI_AST: - CTR1(KTR_SMP, "%s: IPI_AST", __func__); - break; - case IPI_PREEMPT: - CTR1(KTR_SMP, "%s: IPI_PREEMPT", __func__); - sched_preempt(curthread); - break; - case IPI_RENDEZVOUS: - CTR1(KTR_SMP, "%s: IPI_RENDEZVOUS", __func__); - smp_rendezvous_action(); - break; - case IPI_STOP: - - /* - * IPI_STOP_HARD is mapped to IPI_STOP so it is not - * necessary to add such case in the switch. - */ - CTR1(KTR_SMP, "%s: IPI_STOP or IPI_STOP_HARD (stop)", - __func__); - cpuid = PCPU_GET(cpuid); - savectx(&stoppcbs[cpuid]); - CPU_SET_ATOMIC(cpuid, &stopped_cpus); - while (!CPU_ISSET(cpuid, &started_cpus)) - cpu_spinwait(); - CPU_CLR_ATOMIC(cpuid, &stopped_cpus); - CPU_CLR_ATOMIC(cpuid, &started_cpus); - CTR1(KTR_SMP, "%s: IPI_STOP (restart)", __func__); - break; - case IPI_HARDCLOCK: - CTR1(KTR_SMP, "%s: IPI_HARDCLOCK", __func__); - hardclockintr(); - break; - } - } - - return (FILTER_HANDLED); -} - -static void -ipi_send(struct pcpu *pc, int ipi) -{ - - CTR4(KTR_SMP, "%s: pc=%p, targetcpu=%d, IPI=%d", __func__, - pc, pc->pc_cpuid, ipi); - - atomic_set_32(&pc->pc_ipimask, (1 << ipi)); - powerpc_sync(); - PIC_IPI(root_pic, pc->pc_cpuid); - - CTR1(KTR_SMP, "%s: sent", __func__); -} - -/* Send an IPI to a set of cpus. */ -void -ipi_selected(cpuset_t cpus, int ipi) -{ - struct pcpu *pc; - - STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { - if (CPU_ISSET(pc->pc_cpuid, &cpus)) - ipi_send(pc, ipi); - } -} - -/* Send an IPI to a specific CPU. */ -void -ipi_cpu(int cpu, u_int ipi) -{ - - ipi_send(cpuid_to_pcpu[cpu], ipi); -} - -/* Send an IPI to all CPUs EXCEPT myself. */ -void -ipi_all_but_self(int ipi) -{ - struct pcpu *pc; - - STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) { - if (pc != pcpup) - ipi_send(pc, ipi); - } -} diff --git a/sys/powerpc/powerpc/nexus.c b/sys/powerpc/powerpc/nexus.c deleted file mode 100644 index dd421f6f473..00000000000 --- a/sys/powerpc/powerpc/nexus.c +++ /dev/null @@ -1,438 +0,0 @@ -/*- - * Copyright 1998 Massachusetts Institute of Technology - * Copyright 2001 by Thomas Moestl . - * Copyright 2006 by Marius Strobl . - * All rights reserved. - * - * Permission to use, copy, modify, and distribute this software and - * its documentation for any purpose and without fee is hereby - * granted, provided that both the above copyright notice and this - * permission notice appear in all copies, that both the above - * copyright notice and this permission notice appear in all - * supporting documentation, and that the name of M.I.T. not be used - * in advertising or publicity pertaining to distribution of the - * software without specific, written prior permission. M.I.T. makes - * no representations about the suitability of this software for any - * purpose. It is provided "as is" without express or implied - * warranty. - * - * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS - * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT - * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: FreeBSD: src/sys/i386/i386/nexus.c,v 1.43 2001/02/09 - */ - -/* - * This code implements a `root nexus' for Power ISA Architecture - * machines. The function of the root nexus is to serve as an - * attachment point for both processors and buses, and to manage - * resources which are common to all of them. In particular, - * this code implements the core resource managers for interrupt - * requests and I/O memory address space. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include -#include - -static struct rman intr_rman; -static struct rman mem_rman; - -static device_probe_t nexus_probe; -static device_attach_t nexus_attach; - -static bus_activate_resource_t nexus_activate_resource; -static bus_adjust_resource_t nexus_adjust_resource; -static bus_alloc_resource_t nexus_alloc_resource; -static bus_deactivate_resource_t nexus_deactivate_resource; -static bus_map_resource_t nexus_map_resource; -static bus_release_resource_t nexus_release_resource; -static bus_unmap_resource_t nexus_unmap_resource; - -#ifdef SMP -static bus_bind_intr_t nexus_bind_intr; -#endif -static bus_config_intr_t nexus_config_intr; -static bus_setup_intr_t nexus_setup_intr; -static bus_teardown_intr_t nexus_teardown_intr; - -static bus_get_bus_tag_t nexus_get_bus_tag; - -static ofw_bus_map_intr_t nexus_ofw_map_intr; - -static device_method_t nexus_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, nexus_probe), - DEVMETHOD(device_attach, nexus_attach), - - /* Bus interface */ - DEVMETHOD(bus_add_child, bus_generic_add_child), - DEVMETHOD(bus_adjust_resource, nexus_adjust_resource), - DEVMETHOD(bus_activate_resource, nexus_activate_resource), - DEVMETHOD(bus_alloc_resource, nexus_alloc_resource), - DEVMETHOD(bus_deactivate_resource, nexus_deactivate_resource), - DEVMETHOD(bus_map_resource, nexus_map_resource), - DEVMETHOD(bus_release_resource, nexus_release_resource), - DEVMETHOD(bus_unmap_resource, nexus_unmap_resource), -#ifdef SMP - DEVMETHOD(bus_bind_intr, nexus_bind_intr), -#endif - DEVMETHOD(bus_config_intr, nexus_config_intr), - DEVMETHOD(bus_setup_intr, nexus_setup_intr), - DEVMETHOD(bus_teardown_intr, nexus_teardown_intr), - DEVMETHOD(bus_get_bus_tag, nexus_get_bus_tag), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_map_intr, nexus_ofw_map_intr), - - DEVMETHOD_END -}; - -static devclass_t nexus_devclass; - -DEFINE_CLASS_0(nexus, nexus_driver, nexus_methods, 1); -EARLY_DRIVER_MODULE(nexus, root, nexus_driver, nexus_devclass, 0, 0, - BUS_PASS_BUS); -MODULE_VERSION(nexus, 1); - -static int -nexus_probe(device_t dev) -{ - - device_quiet(dev); /* suppress attach message for neatness */ - - return (BUS_PROBE_DEFAULT); -} - -static int -nexus_attach(device_t dev) -{ - - intr_rman.rm_type = RMAN_ARRAY; - intr_rman.rm_descr = "Interrupts"; - mem_rman.rm_type = RMAN_ARRAY; - mem_rman.rm_descr = "I/O memory addresses"; - if (rman_init(&intr_rman) != 0 || rman_init(&mem_rman) != 0 || - rman_manage_region(&intr_rman, 0, ~0) != 0 || - rman_manage_region(&mem_rman, 0, BUS_SPACE_MAXADDR) != 0) - panic("%s: failed to set up rmans.", __func__); - - /* Add ofwbus0. */ - device_add_child(dev, "ofwbus", 0); - - /* Now, probe children. */ - bus_generic_probe(dev); - bus_generic_attach(dev); - - return (0); -} - -static int -nexus_setup_intr(device_t bus __unused, device_t child, struct resource *r, - int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg, - void **cookiep) -{ - int error, domain; - - if (r == NULL) - panic("%s: NULL interrupt resource!", __func__); - - if (cookiep != NULL) - *cookiep = NULL; - if ((rman_get_flags(r) & RF_SHAREABLE) == 0) - flags |= INTR_EXCL; - - /* We depend here on rman_activate_resource() being idempotent. */ - error = rman_activate_resource(r); - if (error) - return (error); - - if (bus_get_domain(child, &domain) != 0) { - if(bootverbose) - device_printf(child, "no domain found\n"); - domain = 0; - } - error = powerpc_setup_intr(device_get_nameunit(child), - rman_get_start(r), filt, intr, arg, flags, cookiep, domain); - - return (error); -} - -static int -nexus_teardown_intr(device_t bus __unused, device_t child __unused, - struct resource *r, void *ih) -{ - - if (r == NULL) - return (EINVAL); - - return (powerpc_teardown_intr(ih)); -} - -static bus_space_tag_t -nexus_get_bus_tag(device_t bus __unused, device_t child __unused) -{ - -#if BYTE_ORDER == LITTLE_ENDIAN - return(&bs_le_tag); -#else - return(&bs_be_tag); -#endif -} - -#ifdef SMP -static int -nexus_bind_intr(device_t bus __unused, device_t child __unused, - struct resource *r, int cpu) -{ - - return (powerpc_bind_intr(rman_get_start(r), cpu)); -} -#endif - -static int -nexus_config_intr(device_t dev, int irq, enum intr_trigger trig, - enum intr_polarity pol) -{ - - return (powerpc_config_intr(irq, trig, pol)); -} - -static int -nexus_ofw_map_intr(device_t dev, device_t child, phandle_t iparent, int icells, - pcell_t *irq) -{ - u_int intr = MAP_IRQ(iparent, irq[0]); - if (icells > 1) - powerpc_fw_config_intr(intr, irq[1]); - return (intr); -} - -/* - * Allocate a resource on behalf of child. NB: child is usually going to be a - * child of one of our descendants, not a direct child of nexus0. - */ -static struct resource * -nexus_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct rman *rm; - struct resource *rv; - - switch (type) { - case SYS_RES_IRQ: - rm = &intr_rman; - break; - case SYS_RES_MEMORY: - rm = &mem_rman; - break; - default: - return (NULL); - } - - rv = rman_reserve_resource(rm, start, end, count, flags & ~RF_ACTIVE, - child); - if (rv == NULL) - return (NULL); - rman_set_rid(rv, *rid); - - if ((flags & RF_ACTIVE) != 0) { - if (bus_activate_resource(child, type, *rid, rv) != 0) { - rman_release_resource(rv); - return (NULL); - } - } - - return (rv); -} - -static int -nexus_activate_resource(device_t bus __unused, device_t child __unused, - int type, int rid __unused, struct resource *r) -{ - - if (type == SYS_RES_MEMORY) { - vm_paddr_t start; - void *p; - - start = (vm_paddr_t) rman_get_start(r); - if (bootverbose) - printf("nexus mapdev: start %jx, len %jd\n", - (uintmax_t)start, rman_get_size(r)); - - p = pmap_mapdev(start, (vm_size_t) rman_get_size(r)); - if (p == NULL) - return (ENOMEM); - rman_set_virtual(r, p); - rman_set_bustag(r, &bs_be_tag); - rman_set_bushandle(r, (u_long)p); - } - return (rman_activate_resource(r)); -} - -static int -nexus_deactivate_resource(device_t bus __unused, device_t child __unused, - int type __unused, int rid __unused, struct resource *r) -{ - - /* - * If this is a memory resource, unmap it. - */ - if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { - bus_size_t psize; - - psize = rman_get_size(r); - pmap_unmapdev((vm_offset_t)rman_get_virtual(r), psize); - } - - return (rman_deactivate_resource(r)); -} - -static int -nexus_adjust_resource(device_t bus, device_t child __unused, int type, - struct resource *r, rman_res_t start, rman_res_t end) -{ - struct rman *rm; - - switch (type) { - case SYS_RES_IRQ: - rm = &intr_rman; - break; - case SYS_RES_MEMORY: - rm = &mem_rman; - break; - default: - return (EINVAL); - } - if (rm == NULL) - return (ENXIO); - if (rman_is_region_manager(r, rm) == 0) - return (EINVAL); - return (rman_adjust_resource(r, start, end)); -} - -static int -nexus_release_resource(device_t bus, device_t child, int type, - int rid, struct resource *r) -{ - int error; - - if ((rman_get_flags(r) & RF_ACTIVE) != 0) { - error = bus_deactivate_resource(child, type, rid, r); - if (error) - return (error); - } - return (rman_release_resource(r)); -} - -static int -nexus_map_resource(device_t bus, device_t child, int type, struct resource *r, - struct resource_map_request *argsp, struct resource_map *map) -{ - - struct resource_map_request args; - rman_res_t end, length, start; - - /* Resources must be active to be mapped. */ - if (!(rman_get_flags(r) & RF_ACTIVE)) - return (ENXIO); - - /* Mappings are only supported on I/O and memory resources. */ - switch (type) { - case SYS_RES_IOPORT: - case SYS_RES_MEMORY: - break; - default: - return (EINVAL); - } - - resource_init_map_request(&args); - if (argsp != NULL) - bcopy(argsp, &args, imin(argsp->size, args.size)); - - start = rman_get_start(r) + args.offset; - if (args.length == 0) - length = rman_get_size(r); - else - length = args.length; - - end = start + length - 1; - if (start > rman_get_end(r) || start < rman_get_start(r)) - return (EINVAL); - - if (end > rman_get_end(r) || end < start) - return (EINVAL); - - /* - * If this is a memory resource, map it into the kernel. - */ - switch (type) { - case SYS_RES_IOPORT: - panic("%s:%d SYS_RES_IOPORT handling not implemented", __func__, __LINE__); - /* XXX: untested - map->r_bushandle = start; - map->r_bustag = nexus_get_bus_tag(NULL, NULL); - map->r_size = length; - map->r_vaddr = NULL; - */ - break; - case SYS_RES_MEMORY: - map->r_vaddr = pmap_mapdev_attr(start, length, args.memattr); - map->r_bustag = nexus_get_bus_tag(NULL, NULL); - map->r_size = length; - map->r_bushandle = (bus_space_handle_t)map->r_vaddr; - break; - } - - return (0); - -} - -static int -nexus_unmap_resource(device_t bus, device_t child, int type, struct resource *r, - struct resource_map *map) -{ - - /* - * If this is a memory resource, unmap it. - */ - switch (type) { - case SYS_RES_MEMORY: - pmap_unmapdev((vm_offset_t)map->r_vaddr, map->r_size); - /* FALLTHROUGH */ - case SYS_RES_IOPORT: - break; - default: - return (EINVAL); - } - - return (0); - -} diff --git a/sys/powerpc/powerpc/openpic.c b/sys/powerpc/powerpc/openpic.c deleted file mode 100644 index 90f3d4c492e..00000000000 --- a/sys/powerpc/powerpc/openpic.c +++ /dev/null @@ -1,457 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2002 Benno Rice. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include "pic_if.h" - -#define OPENPIC_NIPIS 4 - -devclass_t openpic_devclass; - -/* - * Local routines - */ -static int openpic_intr(void *arg); - -static __inline uint32_t -openpic_read(struct openpic_softc *sc, u_int reg) -{ - return (bus_space_read_4(sc->sc_bt, sc->sc_bh, reg)); -} - -static __inline void -openpic_write(struct openpic_softc *sc, u_int reg, uint32_t val) -{ - bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val); -} - -int -openpic_common_attach(device_t dev, uint32_t node) -{ - struct openpic_softc *sc; - u_int cpu, ipi, irq; - u_int32_t x; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - - sc->sc_rid = 0; - sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rid, - RF_ACTIVE); - - if (sc->sc_memr == NULL) { - device_printf(dev, "Could not alloc mem resource!\n"); - return (ENXIO); - } - - sc->sc_bt = rman_get_bustag(sc->sc_memr); - sc->sc_bh = rman_get_bushandle(sc->sc_memr); - - /* Reset the PIC */ - x = openpic_read(sc, OPENPIC_CONFIG); - x |= OPENPIC_CONFIG_RESET; - openpic_write(sc, OPENPIC_CONFIG, x); - - while (openpic_read(sc, OPENPIC_CONFIG) & OPENPIC_CONFIG_RESET) { - powerpc_sync(); - DELAY(100); - } - - /* Check if this is a cascaded PIC */ - sc->sc_irq = 0; - sc->sc_intr = NULL; - do { - struct resource_list *rl; - - rl = BUS_GET_RESOURCE_LIST(device_get_parent(dev), dev); - if (rl == NULL) - break; - if (resource_list_find(rl, SYS_RES_IRQ, 0) == NULL) - break; - - sc->sc_intr = bus_alloc_resource_any(dev, SYS_RES_IRQ, - &sc->sc_irq, RF_ACTIVE); - - /* XXX Cascaded PICs pass NULL trapframes! */ - bus_setup_intr(dev, sc->sc_intr, INTR_TYPE_MISC | INTR_MPSAFE, - openpic_intr, NULL, dev, &sc->sc_icookie); - } while (0); - - /* Reset the PIC */ - x = openpic_read(sc, OPENPIC_CONFIG); - x |= OPENPIC_CONFIG_RESET; - openpic_write(sc, OPENPIC_CONFIG, x); - - while (openpic_read(sc, OPENPIC_CONFIG) & OPENPIC_CONFIG_RESET) { - powerpc_sync(); - DELAY(100); - } - - x = openpic_read(sc, OPENPIC_FEATURE); - switch (x & OPENPIC_FEATURE_VERSION_MASK) { - case 1: - sc->sc_version = "1.0"; - break; - case 2: - sc->sc_version = "1.2"; - break; - case 3: - sc->sc_version = "1.3"; - break; - default: - sc->sc_version = "unknown"; - break; - } - - sc->sc_ncpu = ((x & OPENPIC_FEATURE_LAST_CPU_MASK) >> - OPENPIC_FEATURE_LAST_CPU_SHIFT) + 1; - sc->sc_nirq = ((x & OPENPIC_FEATURE_LAST_IRQ_MASK) >> - OPENPIC_FEATURE_LAST_IRQ_SHIFT) + 1; - - /* - * PSIM seems to report 1 too many IRQs and CPUs - */ - if (sc->sc_psim) { - sc->sc_nirq--; - sc->sc_ncpu--; - } - - if (bootverbose) - device_printf(dev, - "Version %s, supports %d CPUs and %d irqs\n", - sc->sc_version, sc->sc_ncpu, sc->sc_nirq); - - /* - * Allow more IRQs than what the PIC says it handles. Some Freescale PICs - * have MSIs that show up above the PIC's self-described 196 IRQs - * (P5020 starts MSI IRQs at 224). - */ - if (sc->sc_quirks & OPENPIC_QUIRK_HIDDEN_IRQS) - sc->sc_nirq = OPENPIC_IRQMAX - OPENPIC_NIPIS; - - for (cpu = 0; cpu < sc->sc_ncpu; cpu++) - openpic_write(sc, OPENPIC_PCPU_TPR(cpu), 15); - - /* Reset and disable all interrupts. */ - for (irq = 0; irq < sc->sc_nirq; irq++) { - x = irq; /* irq == vector. */ - x |= OPENPIC_IMASK; - x |= OPENPIC_POLARITY_NEGATIVE; - x |= OPENPIC_SENSE_LEVEL; - x |= 8 << OPENPIC_PRIORITY_SHIFT; - openpic_write(sc, OPENPIC_SRC_VECTOR(irq), x); - } - - /* Reset and disable all IPIs. */ - for (ipi = 0; ipi < OPENPIC_NIPIS; ipi++) { - x = sc->sc_nirq + ipi; - x |= OPENPIC_IMASK; - x |= 15 << OPENPIC_PRIORITY_SHIFT; - openpic_write(sc, OPENPIC_IPI_VECTOR(ipi), x); - } - - /* we don't need 8259 passthrough mode */ - x = openpic_read(sc, OPENPIC_CONFIG); - x |= OPENPIC_CONFIG_8259_PASSTHRU_DISABLE; - openpic_write(sc, OPENPIC_CONFIG, x); - - /* send all interrupts to cpu 0 */ - for (irq = 0; irq < sc->sc_nirq; irq++) - openpic_write(sc, OPENPIC_IDEST(irq), 1 << 0); - - /* clear all pending interrupts from cpu 0 */ - for (irq = 0; irq < sc->sc_nirq; irq++) { - (void)openpic_read(sc, OPENPIC_PCPU_IACK(0)); - openpic_write(sc, OPENPIC_PCPU_EOI(0), 0); - } - - for (cpu = 0; cpu < sc->sc_ncpu; cpu++) - openpic_write(sc, OPENPIC_PCPU_TPR(cpu), 0); - - powerpc_register_pic(dev, node, sc->sc_nirq, OPENPIC_NIPIS, FALSE); - - /* If this is not a cascaded PIC, it must be the root PIC */ - if (sc->sc_intr == NULL) - root_pic = dev; - - return (0); -} - -/* - * PIC I/F methods - */ - -void -openpic_bind(device_t dev, u_int irq, cpuset_t cpumask, void **priv __unused) -{ - struct openpic_softc *sc; - uint32_t mask; - - /* If we aren't directly connected to the CPU, this won't work */ - if (dev != root_pic) - return; - - sc = device_get_softc(dev); - - /* - * XXX: openpic_write() is very special and just needs a 32 bits mask. - * For the moment, just play dirty and get the first half word. - */ - mask = cpumask.__bits[0] & 0xffffffff; - if (sc->sc_quirks & OPENPIC_QUIRK_SINGLE_BIND) { - int i = mftb() % CPU_COUNT(&cpumask); - int cpu, ncpu; - - ncpu = 0; - CPU_FOREACH(cpu) { - if (!(mask & (1 << cpu))) - continue; - if (ncpu == i) - break; - ncpu++; - } - mask &= (1 << cpu); - } - - openpic_write(sc, OPENPIC_IDEST(irq), mask); -} - -void -openpic_config(device_t dev, u_int irq, enum intr_trigger trig, - enum intr_polarity pol) -{ - struct openpic_softc *sc; - uint32_t x; - - sc = device_get_softc(dev); - x = openpic_read(sc, OPENPIC_SRC_VECTOR(irq)); - if (pol == INTR_POLARITY_LOW) - x &= ~OPENPIC_POLARITY_POSITIVE; - else - x |= OPENPIC_POLARITY_POSITIVE; - if (trig == INTR_TRIGGER_EDGE) - x &= ~OPENPIC_SENSE_LEVEL; - else - x |= OPENPIC_SENSE_LEVEL; - openpic_write(sc, OPENPIC_SRC_VECTOR(irq), x); -} - -static int -openpic_intr(void *arg) -{ - device_t dev = (device_t)(arg); - - /* XXX Cascaded PICs do not pass non-NULL trapframes! */ - openpic_dispatch(dev, NULL); - - return (FILTER_HANDLED); -} - -void -openpic_dispatch(device_t dev, struct trapframe *tf) -{ - struct openpic_softc *sc; - u_int cpuid, vector; - - CTR1(KTR_INTR, "%s: got interrupt", __func__); - - cpuid = (dev == root_pic) ? PCPU_GET(cpuid) : 0; - - sc = device_get_softc(dev); - while (1) { - vector = openpic_read(sc, OPENPIC_PCPU_IACK(cpuid)); - vector &= OPENPIC_VECTOR_MASK; - if (vector == 255) - break; - powerpc_dispatch_intr(vector, tf); - } -} - -void -openpic_enable(device_t dev, u_int irq, u_int vector, void **priv __unused) -{ - struct openpic_softc *sc; - uint32_t x; - - sc = device_get_softc(dev); - if (irq < sc->sc_nirq) { - x = openpic_read(sc, OPENPIC_SRC_VECTOR(irq)); - x &= ~(OPENPIC_IMASK | OPENPIC_VECTOR_MASK); - x |= vector; - openpic_write(sc, OPENPIC_SRC_VECTOR(irq), x); - } else { - x = openpic_read(sc, OPENPIC_IPI_VECTOR(0)); - x &= ~(OPENPIC_IMASK | OPENPIC_VECTOR_MASK); - x |= vector; - openpic_write(sc, OPENPIC_IPI_VECTOR(0), x); - } -} - -void -openpic_eoi(device_t dev, u_int irq __unused, void *priv __unused) -{ - struct openpic_softc *sc; - u_int cpuid; - - cpuid = (dev == root_pic) ? PCPU_GET(cpuid) : 0; - - sc = device_get_softc(dev); - openpic_write(sc, OPENPIC_PCPU_EOI(cpuid), 0); -} - -void -openpic_ipi(device_t dev, u_int cpu) -{ - struct openpic_softc *sc; - - KASSERT(dev == root_pic, ("Cannot send IPIs from non-root OpenPIC")); - - sc = device_get_softc(dev); - sched_pin(); - openpic_write(sc, OPENPIC_PCPU_IPI_DISPATCH(PCPU_GET(cpuid), 0), - 1u << cpu); - sched_unpin(); -} - -void -openpic_mask(device_t dev, u_int irq, void *priv __unused) -{ - struct openpic_softc *sc; - uint32_t x; - - sc = device_get_softc(dev); - if (irq < sc->sc_nirq) { - x = openpic_read(sc, OPENPIC_SRC_VECTOR(irq)); - x |= OPENPIC_IMASK; - openpic_write(sc, OPENPIC_SRC_VECTOR(irq), x); - } else { - x = openpic_read(sc, OPENPIC_IPI_VECTOR(0)); - x |= OPENPIC_IMASK; - openpic_write(sc, OPENPIC_IPI_VECTOR(0), x); - } -} - -void -openpic_unmask(device_t dev, u_int irq, void *priv __unused) -{ - struct openpic_softc *sc; - uint32_t x; - - sc = device_get_softc(dev); - if (irq < sc->sc_nirq) { - x = openpic_read(sc, OPENPIC_SRC_VECTOR(irq)); - x &= ~OPENPIC_IMASK; - openpic_write(sc, OPENPIC_SRC_VECTOR(irq), x); - } else { - x = openpic_read(sc, OPENPIC_IPI_VECTOR(0)); - x &= ~OPENPIC_IMASK; - openpic_write(sc, OPENPIC_IPI_VECTOR(0), x); - } -} - -int -openpic_suspend(device_t dev) -{ - struct openpic_softc *sc; - int i; - - sc = device_get_softc(dev); - - sc->sc_saved_config = bus_read_4(sc->sc_memr, OPENPIC_CONFIG); - for (i = 0; i < OPENPIC_NIPIS; i++) { - sc->sc_saved_ipis[i] = bus_read_4(sc->sc_memr, OPENPIC_IPI_VECTOR(i)); - } - - for (i = 0; i < 4; i++) { - sc->sc_saved_prios[i] = bus_read_4(sc->sc_memr, OPENPIC_PCPU_TPR(i)); - } - - for (i = 0; i < OPENPIC_TIMERS; i++) { - sc->sc_saved_timers[i].tcnt = bus_read_4(sc->sc_memr, OPENPIC_TCNT(i)); - sc->sc_saved_timers[i].tbase = bus_read_4(sc->sc_memr, OPENPIC_TBASE(i)); - sc->sc_saved_timers[i].tvec = bus_read_4(sc->sc_memr, OPENPIC_TVEC(i)); - sc->sc_saved_timers[i].tdst = bus_read_4(sc->sc_memr, OPENPIC_TDST(i)); - } - - for (i = 0; i < OPENPIC_SRC_VECTOR_COUNT; i++) - sc->sc_saved_vectors[i] = - bus_read_4(sc->sc_memr, OPENPIC_SRC_VECTOR(i)) & ~OPENPIC_ACTIVITY; - - return (0); -} - -int -openpic_resume(device_t dev) -{ - struct openpic_softc *sc; - int i; - - sc = device_get_softc(dev); - - sc->sc_saved_config = bus_read_4(sc->sc_memr, OPENPIC_CONFIG); - for (i = 0; i < OPENPIC_NIPIS; i++) { - bus_write_4(sc->sc_memr, OPENPIC_IPI_VECTOR(i), sc->sc_saved_ipis[i]); - } - - for (i = 0; i < 4; i++) { - bus_write_4(sc->sc_memr, OPENPIC_PCPU_TPR(i), sc->sc_saved_prios[i]); - } - - for (i = 0; i < OPENPIC_TIMERS; i++) { - bus_write_4(sc->sc_memr, OPENPIC_TCNT(i), sc->sc_saved_timers[i].tcnt); - bus_write_4(sc->sc_memr, OPENPIC_TBASE(i), sc->sc_saved_timers[i].tbase); - bus_write_4(sc->sc_memr, OPENPIC_TVEC(i), sc->sc_saved_timers[i].tvec); - bus_write_4(sc->sc_memr, OPENPIC_TDST(i), sc->sc_saved_timers[i].tdst); - } - - for (i = 0; i < OPENPIC_SRC_VECTOR_COUNT; i++) - bus_write_4(sc->sc_memr, OPENPIC_SRC_VECTOR(i), sc->sc_saved_vectors[i]); - - return (0); -} diff --git a/sys/powerpc/powerpc/pic_if.m b/sys/powerpc/powerpc/pic_if.m deleted file mode 100644 index 59187be9d93..00000000000 --- a/sys/powerpc/powerpc/pic_if.m +++ /dev/null @@ -1,102 +0,0 @@ -#- -# Copyright (c) 1998 Doug Rabson -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -# SUCH DAMAGE. -# -# from: src/sys/kern/bus_if.m,v 1.21 2002/04/21 11:16:10 markm Exp -# - -#include -#include -#include - -INTERFACE pic; - -CODE { - static pic_translate_code_t pic_translate_code_default; - - static void pic_translate_code_default(device_t dev, u_int irq, - int code, enum intr_trigger *trig, enum intr_polarity *pol) - { - *trig = INTR_TRIGGER_CONFORM; - *pol = INTR_POLARITY_CONFORM; - } -}; - -METHOD void bind { - device_t dev; - u_int irq; - cpuset_t cpumask; - void **priv; -}; - -METHOD void translate_code { - device_t dev; - u_int irq; - int code; - enum intr_trigger *trig; - enum intr_polarity *pol; -} DEFAULT pic_translate_code_default; - -METHOD void config { - device_t dev; - u_int irq; - enum intr_trigger trig; - enum intr_polarity pol; -}; - -METHOD void dispatch { - device_t dev; - struct trapframe *tf; -}; - -METHOD void enable { - device_t dev; - u_int irq; - u_int vector; - void **priv; -}; - -METHOD void eoi { - device_t dev; - u_int irq; - void *priv; -}; - -METHOD void ipi { - device_t dev; - u_int cpu; -}; - -METHOD void mask { - device_t dev; - u_int irq; - void *priv; -}; - -METHOD void unmask { - device_t dev; - u_int irq; - void *priv; -}; - diff --git a/sys/powerpc/powerpc/platform.c b/sys/powerpc/powerpc/platform.c deleted file mode 100644 index 4d21ddd36b7..00000000000 --- a/sys/powerpc/powerpc/platform.c +++ /dev/null @@ -1,394 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2005 Peter Grehan - * Copyright (c) 2009 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -/* - * Dispatch platform calls to the appropriate platform implementation - * through a previously registered kernel object. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include "platform_if.h" - -static platform_def_t *plat_def_impl; -static platform_t plat_obj; -static struct kobj_ops plat_kernel_kops; -static struct platform_kobj plat_kernel_obj; - -static char plat_name[64]; -SYSCTL_CONST_STRING(_hw, OID_AUTO, platform, CTLFLAG_RD, plat_name, - "Platform currently in use"); - -static struct mem_affinity mem_info[VM_PHYSSEG_MAX + 1]; -static int vm_locality_table[MAXMEMDOM * MAXMEMDOM]; -static struct mem_region pregions[PHYS_AVAIL_SZ]; -static struct numa_mem_region numa_pregions[PHYS_AVAIL_SZ]; -static struct mem_region aregions[PHYS_AVAIL_SZ]; -static int nnumapregions, npregions, naregions; - -/* - * Memory region utilities: determine if two regions overlap, - * and merge two overlapping regions into one - */ -static int -memr_overlap(struct mem_region *r1, struct mem_region *r2) -{ - if ((r1->mr_start + r1->mr_size) < r2->mr_start || - (r2->mr_start + r2->mr_size) < r1->mr_start) - return (FALSE); - - return (TRUE); -} - -static void -memr_merge(struct mem_region *from, struct mem_region *to) -{ - vm_offset_t end; - end = uqmax(to->mr_start + to->mr_size, from->mr_start + from->mr_size); - to->mr_start = uqmin(from->mr_start, to->mr_start); - to->mr_size = end - to->mr_start; -} - -/* - * Quick sort callout for comparing memory regions. - */ -static int -mr_cmp(const void *a, const void *b) -{ - const struct mem_region *regiona, *regionb; - - regiona = a; - regionb = b; - if (regiona->mr_start < regionb->mr_start) - return (-1); - else if (regiona->mr_start > regionb->mr_start) - return (1); - else - return (0); -} - -void -numa_mem_regions(struct numa_mem_region **phys, int *physsz) -{ - struct mem_affinity *mi; - int i, j, maxdom, ndomain, offset; - - nnumapregions = 0; - PLATFORM_NUMA_MEM_REGIONS(plat_obj, numa_pregions, &nnumapregions); - - if (physsz != NULL) - *physsz = nnumapregions; - if (phys != NULL) - *phys = numa_pregions; - if (physsz == NULL || phys == NULL) { - printf("unset value\n"); - return; - } - maxdom = 0; - for (i = 0; i < nnumapregions; i++) - if (numa_pregions[i].mr_domain > maxdom) - maxdom = numa_pregions[i].mr_domain; - - mi = mem_info; - for (i = 0; i < nnumapregions; i++, mi++) { - mi->start = numa_pregions[i].mr_start; - mi->end = numa_pregions[i].mr_start + numa_pregions[i].mr_size; - mi->domain = numa_pregions[i].mr_domain; - } - offset = 0; - vm_locality_table[offset] = 10; - ndomain = maxdom + 1; - if (ndomain > 1) { - for (i = 0; i < ndomain; i++) { - for (j = 0; j < ndomain; j++) { - /* - * Not sure what these values should actually be - */ - if (i == j) - vm_locality_table[offset] = 10; - else - vm_locality_table[offset] = 21; - offset++; - } - } - } - vm_phys_register_domains(ndomain, mem_info, vm_locality_table); -} - -void -mem_regions(struct mem_region **phys, int *physsz, struct mem_region **avail, - int *availsz) -{ - int i, j, still_merging; - - if (npregions == 0) { - PLATFORM_MEM_REGIONS(plat_obj, pregions, &npregions, - aregions, &naregions); - qsort(pregions, npregions, sizeof(*pregions), mr_cmp); - qsort(aregions, naregions, sizeof(*aregions), mr_cmp); - - /* Remove overlapping available regions */ - do { - still_merging = FALSE; - for (i = 0; i < naregions; i++) { - if (aregions[i].mr_size == 0) - continue; - for (j = i+1; j < naregions; j++) { - if (aregions[j].mr_size == 0) - continue; - if (!memr_overlap(&aregions[j], - &aregions[i])) - continue; - - memr_merge(&aregions[j], &aregions[i]); - /* mark inactive */ - aregions[j].mr_size = 0; - still_merging = TRUE; - } - } - } while (still_merging == TRUE); - - /* Collapse zero-length available regions */ - for (i = 0; i < naregions; i++) { - if (aregions[i].mr_size == 0) { - memcpy(&aregions[i], &aregions[i+1], - (naregions - i - 1)*sizeof(*aregions)); - naregions--; - i--; - } - } - } - - if (phys != NULL) - *phys = pregions; - if (avail != NULL) - *avail = aregions; - if (physsz != NULL) - *physsz = npregions; - if (availsz != NULL) - *availsz = naregions; -} - -int -mem_valid(vm_offset_t addr, int len) -{ - int i; - - if (npregions == 0) { - struct mem_region *p, *a; - int na, np; - mem_regions(&p, &np, &a, &na); - } - - for (i = 0; i < npregions; i++) - if ((addr >= pregions[i].mr_start) - && (addr + len <= pregions[i].mr_start + pregions[i].mr_size)) - return (0); - - return (EFAULT); -} - -vm_offset_t -platform_real_maxaddr(void) -{ - return (PLATFORM_REAL_MAXADDR(plat_obj)); -} - -const char * -installed_platform() -{ - return (plat_def_impl->name); -} - -u_long -platform_timebase_freq(struct cpuref *cpu) -{ - return (PLATFORM_TIMEBASE_FREQ(plat_obj, cpu)); -} - -/* - * Put the current CPU, as last step in suspend, to sleep - */ -void -platform_sleep() -{ - PLATFORM_SLEEP(plat_obj); -} - -int -platform_smp_first_cpu(struct cpuref *cpu) -{ - return (PLATFORM_SMP_FIRST_CPU(plat_obj, cpu)); -} - -int -platform_smp_next_cpu(struct cpuref *cpu) -{ - return (PLATFORM_SMP_NEXT_CPU(plat_obj, cpu)); -} - -int -platform_smp_get_bsp(struct cpuref *cpu) -{ - return (PLATFORM_SMP_GET_BSP(plat_obj, cpu)); -} - -int -platform_smp_start_cpu(struct pcpu *cpu) -{ - return (PLATFORM_SMP_START_CPU(plat_obj, cpu)); -} - -void -platform_smp_ap_init() -{ - PLATFORM_SMP_AP_INIT(plat_obj); -} - -void -platform_smp_probe_threads(void) -{ - PLATFORM_SMP_PROBE_THREADS(plat_obj); -} - -#ifdef SMP -struct cpu_group * -cpu_topo(void) -{ - return (PLATFORM_SMP_TOPO(plat_obj)); -} -#endif - -int -platform_node_numa_domain(phandle_t node) -{ - return (PLATFORM_NODE_NUMA_DOMAIN(plat_obj, node)); -} - -/* - * Reset back to firmware. - */ -void -cpu_reset() -{ - PLATFORM_RESET(plat_obj); -} - -void platform_smp_timebase_sync(u_long tb, int ap) -{ - - PLATFORM_SMP_TIMEBASE_SYNC(plat_obj, tb, ap); -} - -/* - * Platform install routines. Highest priority wins, using the same - * algorithm as bus attachment. - */ -SET_DECLARE(platform_set, platform_def_t); - -void -platform_probe_and_attach() -{ - platform_def_t **platpp, *platp; - int prio, best_prio; - - plat_obj = &plat_kernel_obj; - best_prio = 0; - - /* - * Try to locate the best platform kobj - */ - SET_FOREACH(platpp, platform_set) { - platp = *platpp; - - /* - * Take care of compiling the selected class, and - * then statically initialise the MMU object - */ - kobj_class_compile_static(platp, &plat_kernel_kops); - kobj_init_static((kobj_t)plat_obj, platp); - - prio = PLATFORM_PROBE(plat_obj); - - /* Check for errors */ - if (prio > 0) - continue; - - /* See if it is better than our current best */ - if (plat_def_impl == NULL || prio > best_prio) { - best_prio = prio; - plat_def_impl = platp; - } - - /* - * We can't free the KOBJ, since it is static. Reset the ops - * member of this class so that we can come back later. - */ - platp->ops = NULL; - } - - if (plat_def_impl == NULL) - panic("No platform module found!"); - - /* - * Recompile to make sure we ended with the - * correct one, and then attach. - */ - - kobj_class_compile_static(plat_def_impl, &plat_kernel_kops); - kobj_init_static((kobj_t)plat_obj, plat_def_impl); - - strlcpy(plat_name,plat_def_impl->name,sizeof(plat_name)); - - PLATFORM_ATTACH(plat_obj); -} diff --git a/sys/powerpc/powerpc/platform_if.m b/sys/powerpc/powerpc/platform_if.m deleted file mode 100644 index 1b16362fc87..00000000000 --- a/sys/powerpc/powerpc/platform_if.m +++ /dev/null @@ -1,271 +0,0 @@ -#- -# Copyright (c) 2009 Nathan Whitehorn -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -# SUCH DAMAGE. -# -# - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -/** - * @defgroup PLATFORM platform - KObj methods for PowerPC platform - * implementations - * @brief A set of methods required by all platform implementations. - * These are used to bring up secondary CPUs, supply the physical memory - * map, etc. - *@{ - */ - -INTERFACE platform; - -# -# Default implementations -# -CODE { - static void platform_null_attach(platform_t plat) - { - return; - } - static int platform_null_smp_first_cpu(platform_t plat, - struct cpuref *cpuref) - { - cpuref->cr_hwref = -1; - cpuref->cr_cpuid = 0; - return (0); - } - static int platform_null_smp_next_cpu(platform_t plat, - struct cpuref *_cpuref) - { - return (ENOENT); - } - static struct cpu_group *platform_null_smp_topo(platform_t plat) - { -#ifdef SMP - return (smp_topo_none()); -#else - return (NULL); -#endif - } - static vm_offset_t platform_null_real_maxaddr(platform_t plat) - { - return (VM_MAX_ADDRESS); - } - static void platform_null_smp_ap_init(platform_t plat) - { - return; - } - static void platform_null_smp_probe_threads(void) - { - return; - } - static int platform_null_node_numa_domain(platform_t plat, - phandle_t node) - { - return (0); - } -}; - -/** - * @brief Probe for whether we are on this platform, returning the standard - * newbus probe codes. If we have Open Firmware or a flattened device tree, - * it is guaranteed to be available at this point. - */ -METHOD int probe { - platform_t _plat; -}; - - -/** - * @brief Attach this platform module. This happens before the MMU is online, - * so the platform module can install its own high-priority MMU module at - * this point. - */ -METHOD int attach { - platform_t _plat; -} DEFAULT platform_null_attach; - - -/** - * @brief Return the system's physical memory map. - * - * It shall provide the total and the available regions of RAM. - * The available regions need not take the kernel into account. - * - * @param _memp Array of physical memory chunks - * @param _memsz Number of physical memory chunks - * @param _availp Array of available physical memory chunks - * @param _availsz Number of available physical memory chunks - */ - -METHOD void mem_regions { - platform_t _plat; - struct mem_region *_memp; - int *_memsz; - struct mem_region *_availp; - int *_availsz; -}; - - -/** - * @brief Return the system's physical memory map. - * - * It shall provide the total RAM with the corresponding domains. - * - * @param _memp Array of physical memory chunks - * @param _memsz Number of physical memory chunks - */ - -METHOD void numa_mem_regions { - platform_t _plat; - struct numa_mem_region *_memp; - int *_memsz; -}; - -/** - * @brief Return the maximum address accessible in real mode - * (for use with hypervisors) - */ -METHOD vm_offset_t real_maxaddr { - platform_t _plat; -} DEFAULT platform_null_real_maxaddr; - - -/** - * @brief Get the CPU's timebase frequency, in ticks per second. - * - * @param _cpu CPU whose timebase to query - */ - -METHOD u_long timebase_freq { - platform_t _plat; - struct cpuref *_cpu; -}; - -# SMP bits - -/** - * @brief Fill the first CPU's cpuref - * - * @param _cpuref CPU - */ -METHOD int smp_first_cpu { - platform_t _plat; - struct cpuref *_cpuref; -} DEFAULT platform_null_smp_first_cpu; - -/** - * @brief Fill the next CPU's cpuref - * - * @param _cpuref CPU - */ -METHOD int smp_next_cpu { - platform_t _plat; - struct cpuref *_cpuref; -} DEFAULT platform_null_smp_next_cpu; - -/** - * @brief Find the boot processor - * - * @param _cpuref CPU - */ -METHOD int smp_get_bsp { - platform_t _plat; - struct cpuref *_cpuref; -} DEFAULT platform_null_smp_first_cpu; - -/** - * @brief Start a CPU - * - * @param _cpuref CPU - */ -METHOD int smp_start_cpu { - platform_t _plat; - struct pcpu *_cpu; -}; - -/** - * @brief Start a CPU - * - */ -METHOD void smp_ap_init { - platform_t _plat; -} DEFAULT platform_null_smp_ap_init; - -/** - * @brief Probe mp_ncores and smp_threads_per_core for early MI code - */ -METHOD void smp_probe_threads { - platform_t _plat; -} DEFAULT platform_null_smp_probe_threads; - -/** - * @brief Return SMP topology - */ -METHOD cpu_group_t smp_topo { - platform_t _plat; -} DEFAULT platform_null_smp_topo; - -/** - * @brief Reset system - */ -METHOD void reset { - platform_t _plat; -}; - -/** - * @brief Suspend the CPU - */ -METHOD void sleep { - platform_t _plat; -}; - -/** - * @brief Attempt to synchronize timebase of current CPU with others. - * Entered (approximately) simultaneously on all CPUs, including the BSP. - * Passed the timebase value on the BSP as of shortly before the call. - */ -METHOD void smp_timebase_sync { - platform_t _plat; - u_long _tb; - int _ap; -}; - -/** - * @brief Return the NUMA domain for the given device tree node. Always returns - * a valid domain. - * - */ -METHOD int node_numa_domain { - platform_t _plat; - phandle_t _node; -} DEFAULT platform_null_node_numa_domain; diff --git a/sys/powerpc/powerpc/pmap_dispatch.c b/sys/powerpc/powerpc/pmap_dispatch.c deleted file mode 100644 index 2e7539cf09c..00000000000 --- a/sys/powerpc/powerpc/pmap_dispatch.c +++ /dev/null @@ -1,261 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2005 Peter Grehan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -/* - * Dispatch MI pmap calls to the appropriate MMU implementation - * through a previously registered kernel object. - * - * Before pmap_bootstrap() can be called, a CPU module must have - * called pmap_mmu_install(). This may be called multiple times: - * the highest priority call will be installed as the default - * MMU handler when pmap_bootstrap() is called. - * - * It is required that mutex_init() be called before pmap_bootstrap(), - * as the PMAP layer makes extensive use of mutexes. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include - -mmu_t mmu_obj; - -/* - * pmap globals - */ -struct pmap kernel_pmap_store; - -vm_offset_t msgbuf_phys; - -vm_offset_t kernel_vm_end; -vm_offset_t virtual_avail; -vm_offset_t virtual_end; -caddr_t crashdumpmap; - -int pmap_bootstrapped; -/* Default level 0 reservations consist of 512 pages (2MB superpage). */ -int vm_level_0_order = 9; - -SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters"); - -int superpages_enabled = 1; -SYSCTL_INT(_vm_pmap, OID_AUTO, superpages_enabled, CTLFLAG_RDTUN, - &superpages_enabled, 0, "Enable support for transparent superpages"); - -#ifdef AIM -int -pvo_vaddr_compare(struct pvo_entry *a, struct pvo_entry *b) -{ - if (PVO_VADDR(a) < PVO_VADDR(b)) - return (-1); - else if (PVO_VADDR(a) > PVO_VADDR(b)) - return (1); - return (0); -} -RB_GENERATE(pvo_tree, pvo_entry, pvo_plink, pvo_vaddr_compare); -#endif - -static int -pmap_nomethod(void) -{ - return (0); -} - -#define DEFINE_PMAP_IFUNC(ret, func, args) \ - DEFINE_IFUNC(, ret, pmap_##func, args) { \ - pmap_##func##_t f; \ - f = PMAP_RESOLVE_FUNC(func); \ - return (f != NULL ? f : (pmap_##func##_t)pmap_nomethod);\ - } -#define DEFINE_DUMPSYS_IFUNC(ret, func, args) \ - DEFINE_IFUNC(, ret, dumpsys_##func, args) { \ - pmap_dumpsys_##func##_t f; \ - f = PMAP_RESOLVE_FUNC(dumpsys_##func); \ - return (f != NULL ? f : (pmap_dumpsys_##func##_t)pmap_nomethod);\ - } - -DEFINE_PMAP_IFUNC(void, activate, (struct thread *)); -DEFINE_PMAP_IFUNC(void, advise, (pmap_t, vm_offset_t, vm_offset_t, int)); -DEFINE_PMAP_IFUNC(void, align_superpage, (vm_object_t, vm_ooffset_t, - vm_offset_t *, vm_size_t)); -DEFINE_PMAP_IFUNC(void, clear_modify, (vm_page_t)); -DEFINE_PMAP_IFUNC(void, copy, (pmap_t, pmap_t, vm_offset_t, vm_size_t, vm_offset_t)); -DEFINE_PMAP_IFUNC(int, enter, (pmap_t, vm_offset_t, vm_page_t, vm_prot_t, u_int, int8_t)); -DEFINE_PMAP_IFUNC(void, enter_quick, (pmap_t, vm_offset_t, vm_page_t, vm_prot_t)); -DEFINE_PMAP_IFUNC(void, enter_object, (pmap_t, vm_offset_t, vm_offset_t, vm_page_t, - vm_prot_t)); -DEFINE_PMAP_IFUNC(vm_paddr_t, extract, (pmap_t, vm_offset_t)); -DEFINE_PMAP_IFUNC(vm_page_t, extract_and_hold, (pmap_t, vm_offset_t, vm_prot_t)); -DEFINE_PMAP_IFUNC(void, kenter, (vm_offset_t, vm_paddr_t)); -DEFINE_PMAP_IFUNC(void, kenter_attr, (vm_offset_t, vm_paddr_t, vm_memattr_t)); -DEFINE_PMAP_IFUNC(vm_paddr_t, kextract, (vm_offset_t)); -DEFINE_PMAP_IFUNC(void, kremove, (vm_offset_t)); -DEFINE_PMAP_IFUNC(void, object_init_pt, (pmap_t, vm_offset_t, vm_object_t, vm_pindex_t, - vm_size_t)); -DEFINE_PMAP_IFUNC(boolean_t, is_modified, (vm_page_t)); -DEFINE_PMAP_IFUNC(boolean_t, is_prefaultable, (pmap_t, vm_offset_t)); -DEFINE_PMAP_IFUNC(boolean_t, is_referenced, (vm_page_t)); -DEFINE_PMAP_IFUNC(boolean_t, page_exists_quick, (pmap_t, vm_page_t)); -DEFINE_PMAP_IFUNC(void, page_init, (vm_page_t)); -DEFINE_PMAP_IFUNC(boolean_t, page_is_mapped, (vm_page_t)); -DEFINE_PMAP_IFUNC(int, page_wired_mappings, (vm_page_t)); -DEFINE_PMAP_IFUNC(void, protect, (pmap_t, vm_offset_t, vm_offset_t, vm_prot_t)); -DEFINE_PMAP_IFUNC(bool, ps_enabled, (pmap_t)); -DEFINE_PMAP_IFUNC(void, qenter, (vm_offset_t, vm_page_t *, int)); -DEFINE_PMAP_IFUNC(void, qremove, (vm_offset_t, int)); -DEFINE_PMAP_IFUNC(vm_offset_t, quick_enter_page, (vm_page_t)); -DEFINE_PMAP_IFUNC(void, quick_remove_page, (vm_offset_t)); -DEFINE_PMAP_IFUNC(int, ts_referenced, (vm_page_t)); -DEFINE_PMAP_IFUNC(void, release, (pmap_t)); -DEFINE_PMAP_IFUNC(void, remove, (pmap_t, vm_offset_t, vm_offset_t)); -DEFINE_PMAP_IFUNC(void, remove_all, (vm_page_t)); -DEFINE_PMAP_IFUNC(void, remove_pages, (pmap_t)); -DEFINE_PMAP_IFUNC(void, remove_write, (vm_page_t)); -DEFINE_PMAP_IFUNC(void, unwire, (pmap_t, vm_offset_t, vm_offset_t)); -DEFINE_PMAP_IFUNC(void, zero_page, (vm_page_t)); -DEFINE_PMAP_IFUNC(void, zero_page_area, (vm_page_t, int, int)); -DEFINE_PMAP_IFUNC(void, copy_page, (vm_page_t, vm_page_t)); -DEFINE_PMAP_IFUNC(void, copy_pages, - (vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[], - vm_offset_t b_offset, int xfersize)); -DEFINE_PMAP_IFUNC(void, growkernel, (vm_offset_t)); -DEFINE_PMAP_IFUNC(void, init, (void)); -DEFINE_PMAP_IFUNC(vm_offset_t, map, (vm_offset_t *, vm_paddr_t, vm_paddr_t, int)); -DEFINE_PMAP_IFUNC(int, pinit, (pmap_t)); -DEFINE_PMAP_IFUNC(void, pinit0, (pmap_t)); -DEFINE_PMAP_IFUNC(int, mincore, (pmap_t, vm_offset_t, vm_paddr_t *)); -DEFINE_PMAP_IFUNC(void, deactivate, (struct thread *)); -DEFINE_PMAP_IFUNC(void, bootstrap, (vm_offset_t, vm_offset_t)); -DEFINE_PMAP_IFUNC(void, cpu_bootstrap, (int)); -DEFINE_PMAP_IFUNC(void *, mapdev, (vm_paddr_t, vm_size_t)); -DEFINE_PMAP_IFUNC(void *, mapdev_attr, (vm_paddr_t, vm_size_t, vm_memattr_t)); -DEFINE_PMAP_IFUNC(void, page_set_memattr, (vm_page_t, vm_memattr_t)); -DEFINE_PMAP_IFUNC(void, unmapdev, (vm_offset_t, vm_size_t)); -DEFINE_PMAP_IFUNC(int, map_user_ptr, - (pmap_t, volatile const void *, void **, size_t, size_t *)); -DEFINE_PMAP_IFUNC(int, decode_kernel_ptr, (vm_offset_t, int *, vm_offset_t *)); -DEFINE_PMAP_IFUNC(int, dev_direct_mapped, (vm_paddr_t, vm_size_t)); -DEFINE_PMAP_IFUNC(void, sync_icache, (pmap_t, vm_offset_t, vm_size_t)); -DEFINE_PMAP_IFUNC(int, change_attr, (vm_offset_t, vm_size_t, vm_memattr_t)); -DEFINE_PMAP_IFUNC(void, page_array_startup, (long)); -DEFINE_PMAP_IFUNC(void, tlbie_all, (void)); - -DEFINE_DUMPSYS_IFUNC(void, map_chunk, (vm_paddr_t, size_t, void **)); -DEFINE_DUMPSYS_IFUNC(void, unmap_chunk, (vm_paddr_t, size_t, void *)); -DEFINE_DUMPSYS_IFUNC(void, pa_init, (void)); -DEFINE_DUMPSYS_IFUNC(size_t, scan_pmap, (struct bitset *)); -DEFINE_DUMPSYS_IFUNC(void *, dump_pmap_init, (unsigned)); -DEFINE_DUMPSYS_IFUNC(void *, dump_pmap, (void *, void *, u_long *)); - -/* - * MMU install routines. Highest priority wins, equal priority also - * overrides allowing last-set to win. - */ -SET_DECLARE(mmu_set, struct mmu_kobj); - -boolean_t -pmap_mmu_install(char *name, int prio) -{ - mmu_t *mmupp, mmup; - static int curr_prio = 0; - - /* - * Try and locate the MMU kobj corresponding to the name - */ - SET_FOREACH(mmupp, mmu_set) { - mmup = *mmupp; - - if (mmup->name && - !strcmp(mmup->name, name) && - (prio >= curr_prio || mmu_obj == NULL)) { - curr_prio = prio; - mmu_obj = mmup; - return (TRUE); - } - } - - return (FALSE); -} - -/* MMU "pre-bootstrap" init, used to install extra resolvers, etc. */ -void -pmap_mmu_init() -{ - if (mmu_obj->funcs->install != NULL) - (mmu_obj->funcs->install)(); -} - -const char * -pmap_mmu_name(void) -{ - return (mmu_obj->name); -} - -int unmapped_buf_allowed; - -boolean_t -pmap_is_valid_memattr(pmap_t pmap __unused, vm_memattr_t mode) -{ - - switch (mode) { - case VM_MEMATTR_DEFAULT: - case VM_MEMATTR_UNCACHEABLE: - case VM_MEMATTR_CACHEABLE: - case VM_MEMATTR_WRITE_COMBINING: - case VM_MEMATTR_WRITE_BACK: - case VM_MEMATTR_WRITE_THROUGH: - case VM_MEMATTR_PREFETCHABLE: - return (TRUE); - default: - return (FALSE); - } -} - -void -pmap_active_cpus(pmap_t pmap, cpuset_t *res) -{ - *res = pmap->pm_active; -} diff --git a/sys/powerpc/powerpc/ptrace_machdep.c b/sys/powerpc/powerpc/ptrace_machdep.c deleted file mode 100644 index 2e494e17848..00000000000 --- a/sys/powerpc/powerpc/ptrace_machdep.c +++ /dev/null @@ -1,126 +0,0 @@ -/*- - * Copyright (c) 2014 Justin Hibbits - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef __SPE__ -#define PPC_FEATURE_VECTOR PPC_FEATURE_HAS_SPE -#else -#define PPC_FEATURE_VECTOR PPC_FEATURE_HAS_ALTIVEC -#endif - -int -cpu_ptrace(struct thread *td, int req, void *addr, int data) -{ - int error; - struct pcb *pcb; - struct vec vec; - uint64_t vsr[32]; - uint64_t *vsr_dw1; - int vsr_idx; - - pcb = td->td_pcb; - - bzero(&vec, sizeof(vec)); - bzero(vsr, sizeof(vsr)); - - error = EINVAL; - switch (req) { - case PT_GETVRREGS: - if (!(cpu_features & PPC_FEATURE_VECTOR)) - break; - - if (pcb->pcb_flags & PCB_VEC) { - save_vec_nodrop(td); - memcpy(&vec, &pcb->pcb_vec, sizeof(vec)); - } - error = copyout(&vec, addr, sizeof(vec)); - break; - case PT_SETVRREGS: - if (!(cpu_features & PPC_FEATURE_VECTOR)) - break; - error = copyin(addr, &vec, sizeof(vec)); - if (error == 0) { - pcb->pcb_flags |= PCB_VEC; - memcpy(&pcb->pcb_vec, &vec, sizeof(vec)); - } - break; - case PT_GETVSRREGS: - if (!(cpu_features & PPC_FEATURE_HAS_VSX)) - break; - - if (pcb->pcb_flags & PCB_VSX) { - save_fpu_nodrop(td); - - /* - * Doubleword 0 of VSR0-VSR31 overlap with FPR0-FPR31 and - * VSR32-VSR63 overlap with VR0-VR31, so we only copy - * the non-overlapping data, which is doubleword 1 of VSR0-VSR31. - */ - for (vsr_idx = 0; vsr_idx < nitems(vsr); vsr_idx++) { - vsr_dw1 = (uint64_t *)&pcb->pcb_fpu.fpr[vsr_idx].vsr[2]; - vsr[vsr_idx] = *vsr_dw1; - } - } - error = copyout(&vsr, addr, sizeof(vsr)); - break; - case PT_SETVSRREGS: - if (!(cpu_features & PPC_FEATURE_HAS_VSX)) - break; - error = copyin(addr, &vsr, sizeof(vsr)); - if (error == 0) { - pcb->pcb_flags |= PCB_VSX; - - /* - * Doubleword 0 of VSR0-VSR31 overlap with FPR0-FPR31 and - * VSR32-VSR63 overlap with VR0-VR31, so we only copy - * the non-overlapping data, which is doubleword 1 of VSR0-VSR31. - */ - for (vsr_idx = 0; vsr_idx < nitems(vsr); vsr_idx++) { - vsr_dw1 = (uint64_t *)&pcb->pcb_fpu.fpr[vsr_idx].vsr[2]; - *vsr_dw1 = vsr[vsr_idx]; - } - } - break; - - default: - break; - } - - return (error); -} diff --git a/sys/powerpc/powerpc/sc_machdep.c b/sys/powerpc/powerpc/sc_machdep.c deleted file mode 100644 index 5640923c634..00000000000 --- a/sys/powerpc/powerpc/sc_machdep.c +++ /dev/null @@ -1,86 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2003 Jake Burkholder. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -static sc_softc_t sc_softcs[8]; - -int -sc_get_cons_priority(int *unit, int *flags) -{ - - *unit = 0; - *flags = 0; - return (CN_INTERNAL); -} - -int -sc_max_unit(void) -{ - return (1); -} - -sc_softc_t * -sc_get_softc(int unit, int flags) -{ - sc_softc_t *sc; - - if (unit < 0) - return (NULL); - sc = &sc_softcs[unit]; - sc->unit = unit; - if ((sc->flags & SC_INIT_DONE) == 0) { - sc->adapter = -1; - sc->cursor_char = SC_CURSOR_CHAR; - sc->mouse_char = SC_MOUSE_CHAR; - } - return (sc); -} - -void -sc_get_bios_values(bios_values_t *values) -{ -} - -int -sc_tone(int hz) -{ - return (0); -} diff --git a/sys/powerpc/powerpc/setjmp.S b/sys/powerpc/powerpc/setjmp.S deleted file mode 100644 index b6388ce62f4..00000000000 --- a/sys/powerpc/powerpc/setjmp.S +++ /dev/null @@ -1,115 +0,0 @@ -/* from: NetBSD: setjmp.S,v 1.1 1998/01/27 15:13:12 sakamoto Exp $ */ -/* from: OpenBSD: setjmp.S,v 1.2 1996/12/28 06:22:18 rahnds Exp */ -/* kernel version of this file, does not have signal goop */ -/* int setjmp(jmp_buf env) */ - -#include - -#ifdef __powerpc64__ -#define LD_REG ld -#define ST_REG std -#define REGWIDTH 8 -#else -#define LD_REG lwz -#define ST_REG stw -#define REGWIDTH 4 -#endif - -#define JMP_r1 1*REGWIDTH -#define JMP_r2 2*REGWIDTH -#define JMP_r14 3*REGWIDTH -#define JMP_r15 4*REGWIDTH -#define JMP_r16 5*REGWIDTH -#define JMP_r17 6*REGWIDTH -#define JMP_r18 7*REGWIDTH -#define JMP_r19 8*REGWIDTH -#define JMP_r20 9*REGWIDTH -#define JMP_r21 10*REGWIDTH -#define JMP_r22 11*REGWIDTH -#define JMP_r23 12*REGWIDTH -#define JMP_r24 13*REGWIDTH -#define JMP_r25 14*REGWIDTH -#define JMP_r26 15*REGWIDTH -#define JMP_r27 16*REGWIDTH -#define JMP_r28 17*REGWIDTH -#define JMP_r29 18*REGWIDTH -#define JMP_r30 19*REGWIDTH -#define JMP_r31 20*REGWIDTH -#define JMP_lr 21*REGWIDTH -#define JMP_cr 22*REGWIDTH -#define JMP_ctr 23*REGWIDTH -#define JMP_xer 24*REGWIDTH - -ASENTRY_NOPROF(setjmp) - ST_REG 31, JMP_r31(3) - /* r1, r2, r14-r30 */ - ST_REG 1, JMP_r1 (3) - ST_REG 2, JMP_r2 (3) - ST_REG 14, JMP_r14(3) - ST_REG 15, JMP_r15(3) - ST_REG 16, JMP_r16(3) - ST_REG 17, JMP_r17(3) - ST_REG 18, JMP_r18(3) - ST_REG 19, JMP_r19(3) - ST_REG 20, JMP_r20(3) - ST_REG 21, JMP_r21(3) - ST_REG 22, JMP_r22(3) - ST_REG 23, JMP_r23(3) - ST_REG 24, JMP_r24(3) - ST_REG 25, JMP_r25(3) - ST_REG 26, JMP_r26(3) - ST_REG 27, JMP_r27(3) - ST_REG 28, JMP_r28(3) - ST_REG 29, JMP_r29(3) - ST_REG 30, JMP_r30(3) - /* cr, lr, ctr, xer */ - mfcr 0 - ST_REG 0, JMP_cr(3) - mflr 0 - ST_REG 0, JMP_lr(3) - mfctr 0 - ST_REG 0, JMP_ctr(3) - mfxer 0 - ST_REG 0, JMP_xer(3) - /* f14-f31, fpscr */ - li 3, 0 - blr -ASEND(setjmp) - - -.extern sigsetmask -ASENTRY_NOPROF(longjmp) - LD_REG 31, JMP_r31(3) - /* r1, r2, r14-r30 */ - LD_REG 1, JMP_r1 (3) - LD_REG 2, JMP_r2 (3) - LD_REG 14, JMP_r14(3) - LD_REG 15, JMP_r15(3) - LD_REG 16, JMP_r16(3) - LD_REG 17, JMP_r17(3) - LD_REG 18, JMP_r18(3) - LD_REG 19, JMP_r19(3) - LD_REG 20, JMP_r20(3) - LD_REG 21, JMP_r21(3) - LD_REG 22, JMP_r22(3) - LD_REG 23, JMP_r23(3) - LD_REG 24, JMP_r24(3) - LD_REG 25, JMP_r25(3) - LD_REG 26, JMP_r26(3) - LD_REG 27, JMP_r27(3) - LD_REG 28, JMP_r28(3) - LD_REG 29, JMP_r29(3) - LD_REG 30, JMP_r30(3) - /* cr, lr, ctr, xer */ - LD_REG 0, JMP_cr(3) - mtcr 0 - LD_REG 0, JMP_lr(3) - mtlr 0 - LD_REG 0, JMP_ctr(3) - mtctr 0 - LD_REG 0, JMP_xer(3) - mtxer 0 - /* f14-f31, fpscr */ - mr 3, 4 - blr -ASEND(longjmp) diff --git a/sys/powerpc/powerpc/sigcode32.S b/sys/powerpc/powerpc/sigcode32.S deleted file mode 100644 index 6ac2f5837c7..00000000000 --- a/sys/powerpc/powerpc/sigcode32.S +++ /dev/null @@ -1,58 +0,0 @@ -/* $NetBSD: sigcode.S,v 1.1 1999/11/17 14:56:11 kleink Exp $ */ - -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include "assym.inc" - -/* - * The following code gets copied to the top of the user stack on process - * execution. It does signal trampolining on signal delivery. - * - * On entry r1 points to a struct sigframe at bottom of current stack. - * All other registers are unchanged. - */ - .globl CNAME(sigcode32),CNAME(szsigcode32) -CNAME(sigcode32): - addi 1,1,-32 /* reserved space for callee */ - blrl - addi 3,1,32+SF_UC /* restore sp, and get &frame->sf_uc */ - li 0,SYS_sigreturn - sc /* sigreturn(scp) */ - li 0,SYS_exit - sc /* exit(errno) */ -endsigcode32: - - .data -CNAME(szsigcode32): - .long endsigcode32 - CNAME(sigcode32) diff --git a/sys/powerpc/powerpc/sigcode64.S b/sys/powerpc/powerpc/sigcode64.S deleted file mode 100644 index 4c903367c5b..00000000000 --- a/sys/powerpc/powerpc/sigcode64.S +++ /dev/null @@ -1,79 +0,0 @@ -/* $NetBSD: sigcode.S,v 1.1 1999/11/17 14:56:11 kleink Exp $ */ - -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include "assym.inc" - -/* - * The following code gets copied to the top of the user stack on process - * execution. It does signal trampolining on signal delivery. - * - * On entry r1 points to a struct sigframe at bottom of current stack. - * All other registers are unchanged. - * - * Entered midway through for v2 ELF binaries that don't need to deal with - * function descriptors. - * - */ - .globl CNAME(sigcode64),CNAME(szsigcode64) - .globl CNAME(sigcode64_elfv2),CNAME(szsigcode64_elfv2) -CNAME(sigcode64): - mflr 2 /* resolve function descriptor */ - ld 0,0(2) - ld 2,8(2) - mtlr 0 - -CNAME(sigcode64_elfv2): - addi 1,1,-112 /* reserved space for callee */ - mflr 12 /* ELFv2 wants the address in r12 */ - blrl - - addi 3,1,112+SF_UC /* restore sp, and get &frame->sf_uc */ - li 0,SYS_sigreturn - sc /* sigreturn(scp) */ - /* - * If we get back to here, it means sigreturn failed. - * As such, we are now stuck in the wrong context. - * Exit immediately without touching the stack. - */ - li 0,SYS_exit - sc /* exit(errno) */ -endsigcode64: - - .data -CNAME(szsigcode64): - .long endsigcode64 - CNAME(sigcode64) -CNAME(szsigcode64_elfv2): - .long endsigcode64 - CNAME(sigcode64_elfv2) - diff --git a/sys/powerpc/powerpc/stack_machdep.c b/sys/powerpc/powerpc/stack_machdep.c deleted file mode 100644 index 3a5e3269bad..00000000000 --- a/sys/powerpc/powerpc/stack_machdep.c +++ /dev/null @@ -1,113 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2005 Antoine Brodin - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include - -#ifdef __powerpc64__ -#define CALLOFFSET 8 /* Account for the TOC reload slot */ -#else -#define CALLOFFSET 4 -#endif - -static void -stack_capture(struct stack *st, vm_offset_t frame) -{ - vm_offset_t callpc; - - stack_zero(st); - if (frame < PAGE_SIZE) - return; - while (1) { - frame = *(vm_offset_t *)frame; - if (frame < PAGE_SIZE) - break; - - #ifdef __powerpc64__ - callpc = *(vm_offset_t *)(frame + 16) - 4; - #else - callpc = *(vm_offset_t *)(frame + 4) - 4; - #endif - if ((callpc & 3) || (callpc < 0x100)) - break; - - /* - * Don't bother traversing trap-frames - there should - * be enough info down to the frame to work out where - * things are going wrong. Plus, prevents this shortened - * version of code from accessing user-space frames - */ - if (callpc + CALLOFFSET == (vm_offset_t) &trapexit || - callpc + CALLOFFSET == (vm_offset_t) &asttrapexit) - break; - - if (stack_put(st, callpc) == -1) - break; - } -} - -int -stack_save_td(struct stack *st, struct thread *td) -{ - vm_offset_t frame; - - THREAD_LOCK_ASSERT(td, MA_OWNED); - KASSERT(!TD_IS_SWAPPED(td), - ("stack_save_td: thread %p is swapped", td)); - - if (TD_IS_RUNNING(td)) - return (EOPNOTSUPP); - - frame = td->td_pcb->pcb_sp; - stack_capture(st, frame); - return (0); -} - -void -stack_save(struct stack *st) -{ - register_t frame; - - frame = (register_t)__builtin_frame_address(0); - stack_capture(st, frame); -} diff --git a/sys/powerpc/powerpc/support.S b/sys/powerpc/powerpc/support.S deleted file mode 100644 index f866da6b6ce..00000000000 --- a/sys/powerpc/powerpc/support.S +++ /dev/null @@ -1,567 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2018, Matthew Macy - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -/* - * Assembly variants of various functions, for those that don't need generic C - * implementations. Currently this includes: - * - * - Direct-access versions of copyin/copyout methods. - * - These are used by Radix AIM pmap (ISA 3.0), and Book-E, to avoid - * unnecessary pmap_map_usr_ptr() calls. - */ - -#include "assym.inc" -#include "opt_sched.h" - -#include -#include - -#include -#include -#include -#include -#include - -#ifdef _CALL_ELF -.abiversion _CALL_ELF -#endif - -#ifdef __powerpc64__ -#define LOAD ld -#define STORE std -#define WORD 8 -#define CMPI cmpdi -#define CMPLI cmpldi -/* log_2(8 * WORD) */ -#define LOOP_LOG 6 -#define LOG_WORD 3 -#define CURTHREAD %r13 -#else -#define LOAD lwz -#define STORE stw -#define WORD 4 -#define CMPI cmpwi -#define CMPLI cmplwi -/* log_2(8 * WORD) */ -#define LOOP_LOG 5 -#define LOG_WORD 2 -#define CURTHREAD %r2 -#endif - -#ifdef AIM -#define ENTRY_DIRECT(x) ENTRY(x ## _direct) -#define END_DIRECT(x) END(x ## _direct) -#else -#define ENTRY_DIRECT(x) ENTRY(x) -#define END_DIRECT(x) END(x) -#endif - -#ifdef __powerpc64__ -#define PROLOGUE ;\ - mflr %r0 ;\ - std %r0, 16(%r1) ;\ - -#define EPILOGUE ;\ - ld %r0, 16(%r1) ;\ - mtlr %r0 ;\ - blr ;\ - nop - -#define VALIDATE_TRUNCATE_ADDR_COPY VALIDATE_ADDR_COPY -#define VALIDATE_ADDR_COPY(raddr, len) \ - srdi %r0, raddr, 52 ;\ - cmpwi %r0, 1 ;\ - bge- copy_fault ;\ - nop - -#define VALIDATE_ADDR_FUSU(raddr) ;\ - srdi %r0, raddr, 52 ;\ - cmpwi %r0, 1 ;\ - bge- fusufault ;\ - nop - -#else -#define PROLOGUE ;\ - mflr %r0 ;\ - stw %r0, 4(%r1) ;\ - -#define EPILOGUE ;\ - lwz %r0, 4(%r1) ;\ - mtlr %r0 ;\ - blr ;\ - nop - -/* %r0 is temporary */ -/* - * Validate address and length are valid. - * For VALIDATE_ADDR_COPY() have to account for wraparound. - */ -#define VALIDATE_ADDR_COPY(raddr, len) \ - lis %r0, VM_MAXUSER_ADDRESS@h ;\ - ori %r0, %r0, VM_MAXUSER_ADDRESS@l ;\ - cmplw %r0, raddr ;\ - blt- copy_fault ;\ - add %r0, raddr, len ;\ - cmplw 7, %r0, raddr ;\ - blt- 7, copy_fault ;\ - mtcrf 0x80, %r0 ;\ - bt- 0, copy_fault ;\ - nop - -#define VALIDATE_TRUNCATE_ADDR_COPY(raddr, len) \ - lis %r0, VM_MAXUSER_ADDRESS@h ;\ - ori %r0, %r0, VM_MAXUSER_ADDRESS@l ;\ - cmplw %r0, raddr ;\ - blt- copy_fault ;\ - sub %r0, %r0, raddr ;\ - cmplw len, %r0 ;\ - isel len, len, %r0, 0 ;\ - -#define VALIDATE_ADDR_FUSU(raddr) \ - lis %r0, VM_MAXUSER_ADDRESS@h ;\ - ori %r0, %r0, VM_MAXUSER_ADDRESS@l ;\ - cmplw %r0, raddr ;\ - ble- fusufault - -#endif - -#define SET_COPYFAULT(raddr, rpcb, len) \ - VALIDATE_ADDR_COPY(raddr, len) ;\ - li %r0, COPYFAULT ;\ - LOAD rpcb, TD_PCB(CURTHREAD) ;\ - STORE %r0, PCB_ONFAULT(rpcb) ;\ - -#define SET_COPYFAULT_TRUNCATE(raddr, rpcb, len)\ - VALIDATE_TRUNCATE_ADDR_COPY(raddr, len) ;\ - li %r0, COPYFAULT ;\ - LOAD rpcb, TD_PCB(CURTHREAD) ;\ - STORE %r0, PCB_ONFAULT(rpcb) - -#define SET_FUSUFAULT(raddr, rpcb) \ - VALIDATE_ADDR_FUSU(raddr) ;\ - li %r0, FUSUFAULT ;\ - LOAD rpcb, TD_PCB(CURTHREAD) ;\ - STORE %r0, PCB_ONFAULT(rpcb) - -#define CLEAR_FAULT_NO_CLOBBER(rpcb) \ - LOAD rpcb, TD_PCB(CURTHREAD) ;\ - li %r0, 0 ;\ - STORE %r0, PCB_ONFAULT(rpcb) - -#define CLEAR_FAULT(rpcb) \ - CLEAR_FAULT_NO_CLOBBER(rpcb) ;\ - li %r3, 0 - -/* - * bcopy(src, dst, len) - * %r3 %r4 %r5 - * - * %r7 is the pcb pointer - * - * %r0 and %r8-%r10 are volatile - * %r11 and %r12 are generally volatile, used in linking and exception - * handling. Can be clobbered here. - * - * Does not allocate or use stack space, but clobbers all volatile registers. - */ - -#define rs %r3 -#define rd %r4 -#define rl %r5 - -#define t1 %r6 -#define t2 %r7 -#define t3 %r8 -#define t4 %r9 -#define t5 %r10 -#define t6 %r11 -#define t7 %r12 -#define t8 %r0 - -#define Thresh WORD * 8 -#define W4 3 -#define W2 2 -#define W1 1 -#define WORDS(n) (32 - LOG_WORD - W##n) -.text -ENTRY(bcopy_generic) - CMPLI 0, %r5, 0 - beq .Lend - dcbtst 0, rd - dcbt 0, rs - CMPLI rl, Thresh - blt .Lsmall - b .Llarge -/* memcpy */ -/* ... */ -.Lsmall: /* < 8 words remaining */ - mtcrf 0x3, rl -.Lsmall_start: - bf WORDS(4), 0f - LOAD t1, 0(rs) - LOAD t2, WORD*1(rs) - LOAD t3, WORD*2(rs) - LOAD t4, WORD*3(rs) - addi rs, rs, WORD*4 - STORE t1, 0(rd) - STORE t2, WORD*1(rd) - STORE t3, WORD*2(rd) - STORE t4, WORD*3(rd) - addi rd, rd, WORD*4 -0: /* < 4 words remaining */ - bf WORDS(2), 1f - LOAD t1, 0(rs) - LOAD t2, WORD*1(rs) - addi rs, rs, WORD*2 - STORE t1, 0(rd) - STORE t2, WORD*1(rd) - addi rd, rd, WORD*2 -1: /* < 2 words remaining */ - bf WORDS(1), 2f - LOAD t1, 0(rs) - addi rs, rs, WORD - STORE t1, 0(rd) - addi rd, rd, WORD -2: /* < 1 word remaining */ -#ifdef __powerpc64__ - bf 29, 3f - lwz t1, 0(rs) - addi rs, rs, 4 - stw t1, 0(rd) - addi rd, rd, 4 -3: /* < 4 bytes remaining */ -#endif - bf 30, 4f - lhz t1, 0(rs) - addi rs, rs, 2 - sth t1, 0(rd) - addi rd, rd, 2 -4: /* < 2 bytes remaining */ - bf 31, .Lout - lbz t1, 0(rs) - addi rs, rs, 1 - stb t1, 0(rd) - addi rd, rd, 1 - b .Lout - - .align 4 -.Llarge: - neg t3, rd - andi. t6, t3, WORD-1 /* Align rd to word size */ - mtctr t6 - sub rl, rl, t6 - beq+ .Llargealigned -1: - lbz t1, 0(rs) - addi rs, rs, 1 - stb t1, 0(rd) - addi rd, rd, 1 - bdnz 1b - -.Llargealigned: - srwi. t2, rl, LOOP_LOG /* length >> log_2(loop_size) => 8W iterations */ - mtcrf 0x3, rl - beq .Lsmall_start - mtctr t2 - b 1f - - .align 5 -1: - LOAD t1, 0(rs) - LOAD t2, WORD(rs) - LOAD t3, WORD*2(rs) - LOAD t4, WORD*3(rs) - LOAD t5, WORD*4(rs) - LOAD t6, WORD*5(rs) - LOAD t7, WORD*6(rs) - LOAD t8, WORD*7(rs) - addi rs, rs, WORD*8 - STORE t1, 0(rd) - STORE t2, WORD*1(rd) - STORE t3, WORD*2(rd) - STORE t4, WORD*3(rd) - STORE t5, WORD*4(rd) - STORE t6, WORD*5(rd) - STORE t7, WORD*6(rd) - STORE t8, WORD*7(rd) - addi rd, rd, WORD*8 - bdnz 1b - - b .Lsmall_start -.Lout: -/* done */ -.Lend: - blr -END(bcopy_generic) - -/* - * copyout(from_kernel, to_user, len) - * %r3, %r4, %r5 - */ -ENTRY_DIRECT(copyout) - PROLOGUE - SET_COPYFAULT(%r4, %r7, %r5) - bl bcopy_generic - nop - CLEAR_FAULT(%r7) - EPILOGUE -END_DIRECT(copyout) - -/* - * copyin(from_user, to_kernel, len) - * %r3, %r4, %r5 - */ -ENTRY_DIRECT(copyin) - PROLOGUE - SET_COPYFAULT(%r3, %r7, %r5) - bl bcopy_generic - nop - CLEAR_FAULT(%r7) - EPILOGUE -END_DIRECT(copyin) - -/* - * copyinstr(const void *udaddr, void *kaddr, size_t len, size_t *done) - * %r3 %r4 %r5 %r6 - */ - -ENTRY_DIRECT(copyinstr) - PROLOGUE - SET_COPYFAULT_TRUNCATE(%r3, %r7, %r5) - addi %r9, %r5, 1 - mtctr %r9 - mr %r8, %r3 - addi %r8, %r8, -1 - addi %r4, %r4, -1 - li %r3, ENAMETOOLONG -0: - bdz- 2f - lbzu %r0, 1(%r8) - stbu %r0, 1(%r4) - - // NULL byte reached ? - CMPI %r0, 0 - beq- 1f - b 0b -1: - li %r3, 0 -2: - /* skip storing length if done is NULL */ - CMPI %r6, 0 - beq- 3f - mfctr %r0 - sub %r0, %r9, %r0 - STORE %r0, 0(%r6) -3: - CLEAR_FAULT_NO_CLOBBER(%r7) - EPILOGUE -END_DIRECT(copyinstr) - -ENTRY_DIRECT(subyte) - PROLOGUE - SET_FUSUFAULT(%r3, %r7) - stb %r4, 0(%r3) - CLEAR_FAULT(%r7) - EPILOGUE -END_DIRECT(subyte) - -#ifndef __powerpc64__ -ENTRY_DIRECT(suword) - PROLOGUE - SET_FUSUFAULT(%r3, %r7) - stw %r4, 0(%r3) - CLEAR_FAULT(%r7) - EPILOGUE -END_DIRECT(suword) -#endif - -ENTRY_DIRECT(suword16) - PROLOGUE - SET_FUSUFAULT(%r3, %r7) - sth %r4, 0(%r3) - CLEAR_FAULT(%r7) - EPILOGUE -END_DIRECT(suword16) - -ENTRY_DIRECT(suword32) - PROLOGUE - SET_FUSUFAULT(%r3, %r7) - stw %r4, 0(%r3) - CLEAR_FAULT(%r7) - EPILOGUE -END_DIRECT(suword32) - -#ifdef __powerpc64__ -ENTRY_DIRECT(suword64) - PROLOGUE - SET_FUSUFAULT(%r3, %r7) - std %r4, 0(%r3) - CLEAR_FAULT(%r7) - EPILOGUE -END_DIRECT(suword64) - -ENTRY_DIRECT(suword) - PROLOGUE - SET_FUSUFAULT(%r3, %r7) - std %r4, 0(%r3) - CLEAR_FAULT(%r7) - EPILOGUE -END_DIRECT(suword) -#endif - -ENTRY_DIRECT(fubyte) - PROLOGUE - SET_FUSUFAULT(%r3, %r7) - lbz %r3, 0(%r3) - CLEAR_FAULT_NO_CLOBBER(%r7) - EPILOGUE -END_DIRECT(fubyte) - -ENTRY_DIRECT(fuword16) - PROLOGUE - SET_FUSUFAULT(%r3, %r7) - lhz %r3, 0(%r3) - CLEAR_FAULT_NO_CLOBBER(%r7) - EPILOGUE -END_DIRECT(fuword16) - -#ifndef __powerpc64__ -ENTRY_DIRECT(fueword) - PROLOGUE - SET_FUSUFAULT(%r3, %r7) - lwz %r0, 0(%r3) - stw %r0, 0(%r4) - CLEAR_FAULT(%r7) - EPILOGUE -END_DIRECT(fueword) -#endif -ENTRY_DIRECT(fueword32) - PROLOGUE - SET_FUSUFAULT(%r3, %r7) - lwz %r0, 0(%r3) - stw %r0, 0(%r4) - CLEAR_FAULT(%r7) - EPILOGUE -END_DIRECT(fueword32) - -#ifdef __powerpc64__ -ENTRY_DIRECT(fueword) - PROLOGUE - SET_FUSUFAULT(%r3, %r7) - ld %r0, 0(%r3) - std %r0, 0(%r4) - CLEAR_FAULT(%r7) - EPILOGUE -END_DIRECT(fueword) - -ENTRY_DIRECT(fueword64) - PROLOGUE - SET_FUSUFAULT(%r3, %r7) - ld %r0, 0(%r3) - std %r0, 0(%r4) - CLEAR_FAULT(%r7) - EPILOGUE -END_DIRECT(fueword64) -#endif - -/* - * casueword(volatile u_long *base, u_long old, u_long *oldp, u_long new) - * %r3 %r4 %r5 %r6 - */ - -#define CASUEWORD32(raddr, rpcb) ;\ - PROLOGUE ;\ - SET_FUSUFAULT(raddr, rpcb) ;\ - li %r8, 0 ;\ -1: ;\ - lwarx %r0, 0, %r3 ;\ - cmplw %r4, %r0 ;\ - bne 2f ;\ - stwcx. %r6, 0, %r3 ;\ - bne- 3f ;\ - b 4f ;\ -2: ;\ - stwcx. %r0, 0, %r3 /* clear reservation (74xx) */ ;\ -3: ;\ - li %r8, 1 ;\ -4: ;\ - stw %r0, 0(%r5) ;\ - CLEAR_FAULT_NO_CLOBBER(rpcb) ;\ - mr %r3, %r8 ;\ - EPILOGUE - -ENTRY_DIRECT(casueword32) - CASUEWORD32(%r3, %r7) -END_DIRECT(casueword32) - -#ifdef __powerpc64__ -#define CASUEWORD64(raddr, rpcb) ;\ - PROLOGUE ;\ - SET_FUSUFAULT(raddr, rpcb) ;\ - li %r8, 0 ;\ -1: ;\ - ldarx %r0, 0, %r3 ;\ - cmpld %r4, %r0 ;\ - bne 2f ;\ - stdcx. %r6, 0, %r3 ;\ - bne- 3f ;\ - b 4f ;\ -2: ;\ - stdcx. %r0, 0, %r3 /* clear reservation (74xx) */ ;\ -3: ;\ - li %r8, 1 ;\ -4: ;\ - std %r0, 0(%r5) ;\ - CLEAR_FAULT_NO_CLOBBER(rpcb) ;\ - mr %r3, %r8 ;\ - EPILOGUE - -ENTRY_DIRECT(casueword) - CASUEWORD64(%r3, %r7) -END_DIRECT(casueword) - -ENTRY_DIRECT(casueword64) - CASUEWORD64(%r3, %r7) -END_DIRECT(casueword64) -#else -ENTRY_DIRECT(casueword) - CASUEWORD32(%r3, %r7) -END_DIRECT(casueword) -#endif - -_NAKED_ENTRY(fusufault) - CLEAR_FAULT_NO_CLOBBER(%r7) - li %r3, -1 - EPILOGUE -_END(fusufault) - -_NAKED_ENTRY(copy_fault) - CLEAR_FAULT_NO_CLOBBER(%r7) - li %r3, EFAULT - EPILOGUE -_END(copy_fault) diff --git a/sys/powerpc/powerpc/swtch32.S b/sys/powerpc/powerpc/swtch32.S deleted file mode 100644 index 245d78935d9..00000000000 --- a/sys/powerpc/powerpc/swtch32.S +++ /dev/null @@ -1,230 +0,0 @@ -/* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */ - -/*- - * Copyright (C) 2001 Benno Rice - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include "assym.inc" -#include "opt_sched.h" - -#include - -#include -#include -#include -#include - -/* - * void cpu_throw(struct thread *old, struct thread *new) - */ -ENTRY(cpu_throw) - mr %r2, %r4 - li %r14,0 /* Tell cpu_switchin not to release a thread */ - - b cpu_switchin -END(cpu_throw) - -/* - * void cpu_switch(struct thread *old, - * struct thread *new, - * struct mutex *mtx); - * - * Switch to a new thread saving the current state in the old thread. - */ -ENTRY(cpu_switch) - lwz %r6,TD_PCB(%r3) /* Get the old thread's PCB ptr */ - stmw %r12,PCB_CONTEXT(%r6) /* Save the non-volatile GP regs. - These can now be used for scratch */ - - mfcr %r16 /* Save the condition register */ - stw %r16,PCB_CR(%r6) - mflr %r16 /* Save the link register */ - stw %r16,PCB_LR(%r6) - stw %r1,PCB_SP(%r6) /* Save the stack pointer */ - bl 1f -1: - mflr %r30 /* Prepare for secure-PLT calls */ - addis %r30, %r30, (_GLOBAL_OFFSET_TABLE_-1b)@ha - addi %r30, %r30, (_GLOBAL_OFFSET_TABLE_-1b)@l - - mr %r14,%r3 /* Copy the old thread ptr... */ - mr %r2,%r4 /* and the new thread ptr in curthread */ - mr %r16,%r5 /* and the new lock */ - mr %r17,%r6 /* and the PCB */ - - lwz %r18,PCB_FLAGS(%r17) - /* Save FPU context if needed */ - andi. %r7, %r18, PCB_FPU - beq .L1 - bl save_fpu - -.L1: - mr %r3,%r14 /* restore old thread ptr */ - /* Save Altivec context if needed */ - andi. %r7, %r18, PCB_VEC - beq .L2 - bl save_vec - -.L2: -#if defined(__SPE__) - mfspr %r3,SPR_SPEFSCR - stw %r3,PCB_VSCR(%r17) -#endif - mr %r3,%r14 /* restore old thread ptr */ - bl pmap_deactivate /* Deactivate the current pmap */ - - sync /* Make sure all of that finished */ - -cpu_switchin: -#if defined(SMP) && defined(SCHED_ULE) - /* Wait for the new thread to become unblocked */ - bl 1f -1: - mflr %r6 - addis %r6,%r6,(_GLOBAL_OFFSET_TABLE_-1b)@ha - addi %r6,%r6,(_GLOBAL_OFFSET_TABLE_-1b)@l - mr %r30, %r6 /* Prepare for secure-PLT calls */ - lwz %r6,blocked_lock@got(%r6) -blocked_loop: - lwz %r7,TD_LOCK(%r2) - cmpw %r6,%r7 - beq- blocked_loop - isync -#endif - - lwz %r17,TD_PCB(%r2) /* Get new current PCB */ - lwz %r1,PCB_SP(%r17) /* Load new stack pointer */ - - /* Release old thread now that we have a stack pointer set up */ - cmpwi %r14,0 - beq- 1f - stw %r16,TD_LOCK(%r14) /* ULE: update old thread's lock */ - -1: mfsprg %r7,0 /* Get the pcpu pointer */ - stw %r2,PC_CURTHREAD(%r7) /* Store new current thread */ - lwz %r17,TD_PCB(%r2) /* Store new current PCB */ - stw %r17,PC_CURPCB(%r7) - - mr %r3,%r2 /* Get new thread ptr */ - bl pmap_activate /* Activate the new address space */ - - lwz %r19, PCB_FLAGS(%r17) - /* Restore FPU context if needed */ - andi. %r6, %r19, PCB_FPU - beq .L3 - mr %r3,%r2 /* Pass curthread to enable_fpu */ - bl enable_fpu - -.L3: - /* Restore Altivec context if needed */ - andi. %r6, %r19, PCB_VEC - beq .L4 - mr %r3,%r2 /* Pass curthread to enable_vec */ - bl enable_vec - -.L4: -#if defined(__SPE__) - lwz %r3,PCB_VSCR(%r17) - mtspr SPR_SPEFSCR,%r3 -#endif - /* thread to restore is in r3 */ - mr %r3,%r17 /* Recover PCB ptr */ - lmw %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs */ - lwz %r5,PCB_CR(%r3) /* Load the condition register */ - mtcr %r5 - lwz %r5,PCB_LR(%r3) /* Load the link register */ - mtlr %r5 - lwz %r1,PCB_SP(%r3) /* Load the stack pointer */ - /* - * Perform a dummy stwcx. to clear any reservations we may have - * inherited from the previous thread. It doesn't matter if the - * stwcx succeeds or not. pcb_context[0] can be clobbered. - */ - stwcx. %r1, 0, %r3 - blr -END(cpu_switch) - -/* - * savectx(pcb) - * Update pcb, saving current processor state - */ -ENTRY(savectx) - stmw %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs */ - mfcr %r4 /* Save the condition register */ - stw %r4,PCB_CR(%r3) - stw %r1,PCB_SP(%r3) /* Save the stack pointer */ - mflr %r4 /* Save the link register */ - stw %r4,PCB_LR(%r3) - blr -END(savectx) - -/* - * fork_trampoline() - * Set up the return from cpu_fork() - */ -ENTRY(fork_trampoline) - lwz %r3,CF_FUNC(%r1) - lwz %r4,CF_ARG0(%r1) - lwz %r5,CF_ARG1(%r1) - bl fork_exit - addi %r1,%r1,CF_SIZE-FSP /* Allow 8 bytes in front of - trapframe to simulate FRAME_SETUP - does when allocating space for - a frame pointer/saved LR */ -#ifdef __SPE__ - li %r3,SPEFSCR_FINVE|SPEFSCR_FDBZE|SPEFSCR_FUNFE|SPEFSCR_FOVFE - mtspr SPR_SPEFSCR, %r3 -#endif - b trapexit -END(fork_trampoline) diff --git a/sys/powerpc/powerpc/swtch64.S b/sys/powerpc/powerpc/swtch64.S deleted file mode 100644 index 4557e5150f1..00000000000 --- a/sys/powerpc/powerpc/swtch64.S +++ /dev/null @@ -1,363 +0,0 @@ -/* $NetBSD: locore.S,v 1.24 2000/05/31 05:09:17 thorpej Exp $ */ - -/*- - * Copyright (C) 2001 Benno Rice - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include "assym.inc" -#include "opt_sched.h" - -#include - -#include -#include -#include -#include - -#ifdef _CALL_ELF -.abiversion _CALL_ELF -#endif - -TOC_ENTRY(blocked_lock) - -/* - * void cpu_throw(struct thread *old, struct thread *new) - */ -ENTRY(cpu_throw) - mr %r13, %r4 - li %r14,0 /* Tell cpu_switchin not to release a thread */ - li %r18,0 /* No old pcb flags. The old thread is extinguished. */ - - b cpu_switchin -END(cpu_throw) - -/* - * void cpu_switch(struct thread *old, - * struct thread *new, - * struct mutex *mtx); - * - * Switch to a new thread saving the current state in the old thread. - * - * Internally clobbers (not visible outside of this file): - * r18 - old thread pcb_flags - * r19 - new thread pcb_flags - */ -ENTRY(cpu_switch) - ld %r6,TD_PCB(%r3) /* Get the old thread's PCB ptr */ - std %r12,PCB_CONTEXT(%r6) /* Save the non-volatile GP regs. - These can now be used for scratch */ - std %r14,PCB_CONTEXT+2*8(%r6) - std %r15,PCB_CONTEXT+3*8(%r6) - std %r16,PCB_CONTEXT+4*8(%r6) - std %r17,PCB_CONTEXT+5*8(%r6) - std %r18,PCB_CONTEXT+6*8(%r6) - std %r19,PCB_CONTEXT+7*8(%r6) - std %r20,PCB_CONTEXT+8*8(%r6) - std %r21,PCB_CONTEXT+9*8(%r6) - std %r22,PCB_CONTEXT+10*8(%r6) - std %r23,PCB_CONTEXT+11*8(%r6) - std %r24,PCB_CONTEXT+12*8(%r6) - std %r25,PCB_CONTEXT+13*8(%r6) - std %r26,PCB_CONTEXT+14*8(%r6) - std %r27,PCB_CONTEXT+15*8(%r6) - std %r28,PCB_CONTEXT+16*8(%r6) - std %r29,PCB_CONTEXT+17*8(%r6) - std %r30,PCB_CONTEXT+18*8(%r6) - std %r31,PCB_CONTEXT+19*8(%r6) - - mfcr %r16 /* Save the condition register */ - std %r16,PCB_CR(%r6) - mflr %r16 /* Save the link register */ - std %r16,PCB_LR(%r6) - std %r1,PCB_SP(%r6) /* Save the stack pointer */ - std %r2,PCB_TOC(%r6) /* Save the TOC pointer */ - - mr %r14,%r3 /* Copy the old thread ptr... */ - mr %r13,%r4 /* and the new thread ptr in curthread*/ - mr %r16,%r5 /* and the new lock */ - mr %r17,%r6 /* and the PCB */ - - stdu %r1,-48(%r1) - - lwz %r18, PCB_FLAGS(%r17) - andi. %r7, %r18, PCB_CFSCR - beq 1f - mfspr %r6, SPR_FSCR - std %r6, PCB_FSCR(%r17) -save_ebb: - andi. %r0, %r6, FSCR_EBB - beq save_lm - mfspr %r7, SPR_EBBHR - std %r7, PCB_EBB_EBBHR(%r17) - mfspr %r7, SPR_EBBRR - std %r7, PCB_EBB_EBBRR(%r17) - mfspr %r7, SPR_BESCR - std %r7, PCB_EBB_BESCR(%r17) -save_lm: - andi. %r0, %r6, FSCR_LM - beq save_tar - mfspr %r7, SPR_LMRR - std %r7, PCB_LMON_LMRR(%r17) - mfspr %r7, SPR_LMSER - std %r7, PCB_LMON_LMSER(%r17) -save_tar: - andi. %r0, %r6, FSCR_TAR - beq 1f - mfspr %r7, SPR_TAR - std %r7, PCB_TAR(%r17) -1: - andi. %r7, %r18, PCB_CDSCR - beq .L0 - mfspr %r6, SPR_DSCRP - std %r6, PCB_DSCR(%r17) - -.L0: - /* Save FPU context if needed */ - andi. %r7, %r18, PCB_FPU - beq .L1 - bl save_fpu - nop - -.L1: - mr %r3,%r14 /* restore old thread ptr */ - /* Save Altivec context if needed */ - andi. %r7, %r18, PCB_VEC - beq .L2 - bl save_vec - nop - -.L2: - mr %r3,%r14 /* restore old thread ptr */ - bl pmap_deactivate /* Deactivate the current pmap */ - nop - - sync /* Make sure all of that finished */ - -cpu_switchin: -#if defined(SMP) && defined(SCHED_ULE) - /* Wait for the new thread to become unblocked */ - addis %r6,%r2,TOC_REF(blocked_lock)@ha - ld %r6,TOC_REF(blocked_lock)@l(%r6) -blocked_loop: - ld %r7,TD_LOCK(%r13) - cmpd %r6,%r7 - beq- blocked_loop - isync -#endif - - ld %r17,TD_PCB(%r13) /* Get new PCB */ - ld %r1,PCB_SP(%r17) /* Load the stack pointer */ - addi %r1,%r1,-48 /* Remember about cpu_switch stack frame */ - - /* Release old thread now that we have a stack pointer set up */ - cmpdi %r14,0 - beq- 1f - std %r16,TD_LOCK(%r14) /* ULE: update old thread's lock */ - -1: mfsprg %r7,0 /* Get the pcpu pointer */ - std %r13,PC_CURTHREAD(%r7) /* Store new current thread */ - ld %r17,TD_PCB(%r13) /* Store new current PCB */ - std %r17,PC_CURPCB(%r7) - - mr %r3,%r13 /* Get new thread ptr */ - bl pmap_activate /* Activate the new address space */ - nop - - lwz %r19, PCB_FLAGS(%r17) - /* Restore FPU context if needed */ - andi. %r6, %r19, PCB_FPU - beq .L3 - mr %r3,%r13 /* Pass curthread to enable_fpu */ - bl enable_fpu - nop - -.L3: - /* Restore Altivec context if needed */ - andi. %r6, %r19, PCB_VEC - beq .L31 - mr %r3,%r13 /* Pass curthread to enable_vec */ - bl enable_vec - nop - -.L31: - /* Load custom DSCR on PowerISA 2.06+ CPUs. */ - /* Load changed FSCR on PowerISA 2.07+ CPUs. */ - or %r18,%r18,%r19 - /* Restore Custom DSCR if needed (zeroes if in old but not new) */ - andi. %r6, %r18, PCB_CDSCR - beq .L32 - ld %r7, PCB_DSCR(%r17) /* Load the DSCR register*/ - mtspr SPR_DSCRP, %r7 -.L32: - /* Restore FSCR if needed (zeroes if in old but not new) */ - andi. %r6, %r18, PCB_CFSCR - beq .L4 - ld %r7, PCB_FSCR(%r17) /* Load the FSCR register*/ - mtspr SPR_FSCR, %r7 -restore_ebb: - andi. %r0, %r7, FSCR_EBB - beq restore_lm - ld %r6, PCB_EBB_EBBHR(%r17) - mtspr SPR_EBBHR, %r6 - ld %r6, PCB_EBB_EBBRR(%r17) - mtspr SPR_EBBRR, %r6 - ld %r6, PCB_EBB_BESCR(%r17) - mtspr SPR_BESCR, %r6 -restore_lm: - andi. %r0, %r7, FSCR_LM - beq restore_tar - ld %r6, PCB_LMON_LMRR(%r17) - mtspr SPR_LMRR, %r6 - ld %r6, PCB_LMON_LMSER(%r17) - mtspr SPR_LMSER, %r6 -restore_tar: - andi. %r0, %r7, FSCR_TAR - beq .L4 - ld %r6, PCB_TAR(%r17) - mtspr SPR_TAR, %r6 - - /* thread to restore is in r3 */ -.L4: - addi %r1,%r1,48 - mr %r3,%r17 /* Recover PCB ptr */ - ld %r12,PCB_CONTEXT(%r3) /* Load the non-volatile GP regs. */ - ld %r14,PCB_CONTEXT+2*8(%r3) - ld %r15,PCB_CONTEXT+3*8(%r3) - ld %r16,PCB_CONTEXT+4*8(%r3) - ld %r17,PCB_CONTEXT+5*8(%r3) - ld %r18,PCB_CONTEXT+6*8(%r3) - ld %r19,PCB_CONTEXT+7*8(%r3) - ld %r20,PCB_CONTEXT+8*8(%r3) - ld %r21,PCB_CONTEXT+9*8(%r3) - ld %r22,PCB_CONTEXT+10*8(%r3) - ld %r23,PCB_CONTEXT+11*8(%r3) - ld %r24,PCB_CONTEXT+12*8(%r3) - ld %r25,PCB_CONTEXT+13*8(%r3) - ld %r26,PCB_CONTEXT+14*8(%r3) - ld %r27,PCB_CONTEXT+15*8(%r3) - ld %r28,PCB_CONTEXT+16*8(%r3) - ld %r29,PCB_CONTEXT+17*8(%r3) - ld %r30,PCB_CONTEXT+18*8(%r3) - ld %r31,PCB_CONTEXT+19*8(%r3) - ld %r5,PCB_CR(%r3) /* Load the condition register */ - mtcr %r5 - ld %r5,PCB_LR(%r3) /* Load the link register */ - mtlr %r5 - ld %r1,PCB_SP(%r3) /* Load the stack pointer */ - ld %r2,PCB_TOC(%r3) /* Load the TOC pointer */ - - /* - * Perform a dummy stdcx. to clear any reservations we may have - * inherited from the previous thread. It doesn't matter if the - * stdcx succeeds or not. pcb_context[0] can be clobbered. - */ - stdcx. %r1, 0, %r3 - blr -END(cpu_switch) - -/* - * savectx(pcb) - * Update pcb, saving current processor state - */ -ENTRY(savectx) - std %r12,PCB_CONTEXT(%r3) /* Save the non-volatile GP regs. */ - std %r13,PCB_CONTEXT+1*8(%r3) - std %r14,PCB_CONTEXT+2*8(%r3) - std %r15,PCB_CONTEXT+3*8(%r3) - std %r16,PCB_CONTEXT+4*8(%r3) - std %r17,PCB_CONTEXT+5*8(%r3) - std %r18,PCB_CONTEXT+6*8(%r3) - std %r19,PCB_CONTEXT+7*8(%r3) - std %r20,PCB_CONTEXT+8*8(%r3) - std %r21,PCB_CONTEXT+9*8(%r3) - std %r22,PCB_CONTEXT+10*8(%r3) - std %r23,PCB_CONTEXT+11*8(%r3) - std %r24,PCB_CONTEXT+12*8(%r3) - std %r25,PCB_CONTEXT+13*8(%r3) - std %r26,PCB_CONTEXT+14*8(%r3) - std %r27,PCB_CONTEXT+15*8(%r3) - std %r28,PCB_CONTEXT+16*8(%r3) - std %r29,PCB_CONTEXT+17*8(%r3) - std %r30,PCB_CONTEXT+18*8(%r3) - std %r31,PCB_CONTEXT+19*8(%r3) - - mfcr %r4 /* Save the condition register */ - std %r4,PCB_CR(%r3) - std %r1,PCB_SP(%r3) /* Save the stack pointer */ - std %r2,PCB_TOC(%r3) /* Save the TOC pointer */ - mflr %r4 /* Save the link register */ - std %r4,PCB_LR(%r3) - blr -END(savectx) - -/* - * fork_trampoline() - * Set up the return from cpu_fork() - */ - -ENTRY_NOPROF(fork_trampoline) - ld %r3,CF_FUNC(%r1) - ld %r4,CF_ARG0(%r1) - ld %r5,CF_ARG1(%r1) - - stdu %r1,-48(%r1) - bl fork_exit - nop - addi %r1,%r1,48+CF_SIZE-FSP /* Allow 8 bytes in front of - trapframe to simulate FRAME_SETUP - does when allocating space for - a frame pointer/saved LR */ - bl trapexit - nop -END(fork_trampoline) diff --git a/sys/powerpc/powerpc/syncicache.c b/sys/powerpc/powerpc/syncicache.c deleted file mode 100644 index 8065dc2e4e1..00000000000 --- a/sys/powerpc/powerpc/syncicache.c +++ /dev/null @@ -1,69 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-4-Clause - * - * Copyright (C) 1995-1997, 1999 Wolfgang Solfrank. - * Copyright (C) 1995-1997, 1999 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: syncicache.c,v 1.2 1999/05/05 12:36:40 tsubai Exp $ - */ - -#include -#include -#if defined(_KERNEL) || defined(_STANDALONE) -#include -#include -#include -#endif -#include - -#include -#include - -void -__syncicache(void *from, int len) -{ - register_t l, off; - char *p; - - off = (uintptr_t)from & (cacheline_size - 1); - l = len += off; - p = (char *)from - off; - - do { - __asm __volatile ("dcbst 0,%0" :: "r"(p)); - p += cacheline_size; - } while ((l -= cacheline_size) > 0); - __asm __volatile ("sync"); - p = (char *)from - off; - do { - __asm __volatile ("icbi 0,%0" :: "r"(p)); - p += cacheline_size; - } while ((len -= cacheline_size) > 0); - __asm __volatile ("sync; isync"); -} diff --git a/sys/powerpc/powerpc/sys_machdep.c b/sys/powerpc/powerpc/sys_machdep.c deleted file mode 100644 index cba9deb69ac..00000000000 --- a/sys/powerpc/powerpc/sys_machdep.c +++ /dev/null @@ -1,50 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2001 Benno Rice. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include - -#ifdef COMPAT_FREEBSD32 -#include - -int -freebsd32_sysarch(struct thread *td, struct freebsd32_sysarch_args *uap) -{ - - return (EINVAL); -} -#endif - -int -sysarch(struct thread *td, struct sysarch_args *uap) -{ - - return (EINVAL); -} diff --git a/sys/powerpc/powerpc/trap.c b/sys/powerpc/powerpc/trap.c deleted file mode 100644 index 202a83c4683..00000000000 --- a/sys/powerpc/powerpc/trap.c +++ /dev/null @@ -1,1011 +0,0 @@ -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $NetBSD: trap.c,v 1.58 2002/03/04 04:07:35 dbj Exp $ - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* Below matches setjmp.S */ -#define FAULTBUF_LR 21 -#define FAULTBUF_R1 1 -#define FAULTBUF_R2 2 -#define FAULTBUF_CR 22 -#define FAULTBUF_R14 3 - -#define MOREARGS(sp) ((caddr_t)((uintptr_t)(sp) + \ - sizeof(struct callframe) - 3*sizeof(register_t))) /* more args go here */ - -static void trap_fatal(struct trapframe *frame); -static void printtrap(u_int vector, struct trapframe *frame, int isfatal, - int user); -static bool trap_pfault(struct trapframe *frame, bool user, int *signo, - int *ucode); -static int fix_unaligned(struct thread *td, struct trapframe *frame); -static int handle_onfault(struct trapframe *frame); -static void syscall(struct trapframe *frame); - -#if defined(__powerpc64__) && defined(AIM) -static void normalize_inputs(void); -#endif - -extern vm_offset_t __startkernel; - -extern int copy_fault(void); -extern int fusufault(void); - -#ifdef KDB -int db_trap_glue(struct trapframe *); /* Called from trap_subr.S */ -#endif - -struct powerpc_exception { - u_int vector; - char *name; -}; - -#ifdef KDTRACE_HOOKS -#include - -int (*dtrace_invop_jump_addr)(struct trapframe *); -#endif - -static struct powerpc_exception powerpc_exceptions[] = { - { EXC_CRIT, "critical input" }, - { EXC_RST, "system reset" }, - { EXC_MCHK, "machine check" }, - { EXC_DSI, "data storage interrupt" }, - { EXC_DSE, "data segment exception" }, - { EXC_ISI, "instruction storage interrupt" }, - { EXC_ISE, "instruction segment exception" }, - { EXC_EXI, "external interrupt" }, - { EXC_ALI, "alignment" }, - { EXC_PGM, "program" }, - { EXC_HEA, "hypervisor emulation assistance" }, - { EXC_FPU, "floating-point unavailable" }, - { EXC_APU, "auxiliary proc unavailable" }, - { EXC_DECR, "decrementer" }, - { EXC_FIT, "fixed-interval timer" }, - { EXC_WDOG, "watchdog timer" }, - { EXC_SC, "system call" }, - { EXC_TRC, "trace" }, - { EXC_FPA, "floating-point assist" }, - { EXC_DEBUG, "debug" }, - { EXC_PERF, "performance monitoring" }, - { EXC_VEC, "altivec unavailable" }, - { EXC_VSX, "vsx unavailable" }, - { EXC_FAC, "facility unavailable" }, - { EXC_ITMISS, "instruction tlb miss" }, - { EXC_DLMISS, "data load tlb miss" }, - { EXC_DSMISS, "data store tlb miss" }, - { EXC_BPT, "instruction breakpoint" }, - { EXC_SMI, "system management" }, - { EXC_VECAST_G4, "altivec assist" }, - { EXC_THRM, "thermal management" }, - { EXC_RUNMODETRC, "run mode/trace" }, - { EXC_SOFT_PATCH, "soft patch exception" }, - { EXC_LAST, NULL } -}; - -static int uprintf_signal; -SYSCTL_INT(_machdep, OID_AUTO, uprintf_signal, CTLFLAG_RWTUN, - &uprintf_signal, 0, - "Print debugging information on trap signal to ctty"); - -#define ESR_BITMASK \ - "\20" \ - "\040b0\037b1\036b2\035b3\034PIL\033PRR\032PTR\031FP" \ - "\030ST\027b9\026DLK\025ILK\024b12\023b13\022BO\021PIE" \ - "\020b16\017b17\016b18\015b19\014b20\013b21\012b22\011b23" \ - "\010SPE\007EPID\006b26\005b27\004b28\003b29\002b30\001b31" -#define MCSR_BITMASK \ - "\20" \ - "\040MCP\037ICERR\036DCERR\035TLBPERR\034L2MMU_MHIT\033b5\032b6\031b7" \ - "\030b8\027b9\026b10\025NMI\024MAV\023MEA\022b14\021IF" \ - "\020LD\017ST\016LDG\015b19\014b20\013b21\012b22\011b23" \ - "\010b24\007b25\006b26\005b27\004b28\003b29\002TLBSYNC\001BSL2_ERR" -#define MSSSR_BITMASK \ - "\20" \ - "\040b0\037b1\036b2\035b3\034b4\033b5\032b6\031b7" \ - "\030b8\027b9\026b10\025b11\024b12\023L2TAG\022L2DAT\021L3TAG" \ - "\020L3DAT\017APE\016DPE\015TEA\014b20\013b21\012b22\011b23" \ - "\010b24\007b25\006b26\005b27\004b28\003b29\002b30\001b31" - -static const char * -trapname(u_int vector) -{ - struct powerpc_exception *pe; - - for (pe = powerpc_exceptions; pe->vector != EXC_LAST; pe++) { - if (pe->vector == vector) - return (pe->name); - } - - return ("unknown"); -} - -static inline bool -frame_is_trap_inst(struct trapframe *frame) -{ -#ifdef AIM - return (frame->exc == EXC_PGM && frame->srr1 & EXC_PGM_TRAP); -#else - return ((frame->cpu.booke.esr & ESR_PTR) != 0); -#endif -} - -void -trap(struct trapframe *frame) -{ - struct thread *td; - struct proc *p; -#ifdef KDTRACE_HOOKS - uint32_t inst; -#endif - int sig, type, user; - u_int ucode; - ksiginfo_t ksi; - register_t addr, fscr; - - VM_CNT_INC(v_trap); - -#ifdef KDB - if (kdb_active) { - kdb_reenter(); - return; - } -#endif - - td = curthread; - p = td->td_proc; - - type = ucode = frame->exc; - sig = 0; - user = frame->srr1 & PSL_PR; - addr = 0; - - CTR3(KTR_TRAP, "trap: %s type=%s (%s)", td->td_name, - trapname(type), user ? "user" : "kernel"); - -#ifdef KDTRACE_HOOKS - /* - * A trap can occur while DTrace executes a probe. Before - * executing the probe, DTrace blocks re-scheduling and sets - * a flag in its per-cpu flags to indicate that it doesn't - * want to fault. On returning from the probe, the no-fault - * flag is cleared and finally re-scheduling is enabled. - * - * If the DTrace kernel module has registered a trap handler, - * call it and if it returns non-zero, assume that it has - * handled the trap and modified the trap frame so that this - * function can return normally. - */ - if (dtrace_trap_func != NULL && (*dtrace_trap_func)(frame, type) != 0) - return; -#endif - - if (user) { - td->td_pticks = 0; - td->td_frame = frame; - addr = frame->srr0; - if (td->td_cowgen != p->p_cowgen) - thread_cow_update(td); - - /* User Mode Traps */ - switch (type) { - case EXC_RUNMODETRC: - case EXC_TRC: - frame->srr1 &= ~PSL_SE; - sig = SIGTRAP; - ucode = TRAP_TRACE; - break; - -#if defined(__powerpc64__) && defined(AIM) - case EXC_DSE: - addr = frame->dar; - /* FALLTHROUGH */ - case EXC_ISE: - /* DSE/ISE are automatically fatal with radix pmap. */ - if (radix_mmu || - handle_user_slb_spill(&p->p_vmspace->vm_pmap, - addr) != 0){ - sig = SIGSEGV; - ucode = SEGV_MAPERR; - } - break; -#endif - case EXC_DSI: - addr = frame->dar; - /* FALLTHROUGH */ - case EXC_ISI: - if (trap_pfault(frame, true, &sig, &ucode)) - sig = 0; - break; - - case EXC_SC: - syscall(frame); - break; - - case EXC_FPU: - KASSERT((td->td_pcb->pcb_flags & PCB_FPU) != PCB_FPU, - ("FPU already enabled for thread")); - enable_fpu(td); - break; - - case EXC_VEC: - KASSERT((td->td_pcb->pcb_flags & PCB_VEC) != PCB_VEC, - ("Altivec already enabled for thread")); - enable_vec(td); - break; - - case EXC_VSX: - KASSERT((td->td_pcb->pcb_flags & PCB_VSX) != PCB_VSX, - ("VSX already enabled for thread")); - if (!(td->td_pcb->pcb_flags & PCB_VEC)) - enable_vec(td); - if (td->td_pcb->pcb_flags & PCB_FPU) - save_fpu(td); - td->td_pcb->pcb_flags |= PCB_VSX; - enable_fpu(td); - break; - - case EXC_FAC: - fscr = mfspr(SPR_FSCR); - switch (fscr & FSCR_IC_MASK) { - case FSCR_IC_HTM: - CTR0(KTR_TRAP, - "Hardware Transactional Memory subsystem disabled"); - sig = SIGILL; - ucode = ILL_ILLOPC; - break; - case FSCR_IC_DSCR: - td->td_pcb->pcb_flags |= PCB_CFSCR | PCB_CDSCR; - fscr |= FSCR_DSCR; - mtspr(SPR_DSCR, 0); - break; - case FSCR_IC_EBB: - td->td_pcb->pcb_flags |= PCB_CFSCR; - fscr |= FSCR_EBB; - mtspr(SPR_EBBHR, 0); - mtspr(SPR_EBBRR, 0); - mtspr(SPR_BESCR, 0); - break; - case FSCR_IC_TAR: - td->td_pcb->pcb_flags |= PCB_CFSCR; - fscr |= FSCR_TAR; - mtspr(SPR_TAR, 0); - break; - case FSCR_IC_LM: - td->td_pcb->pcb_flags |= PCB_CFSCR; - fscr |= FSCR_LM; - mtspr(SPR_LMRR, 0); - mtspr(SPR_LMSER, 0); - break; - default: - sig = SIGILL; - ucode = ILL_ILLOPC; - } - mtspr(SPR_FSCR, fscr & ~FSCR_IC_MASK); - break; - case EXC_HEA: - sig = SIGILL; - ucode = ILL_ILLOPC; - break; - - case EXC_VECAST_E: - case EXC_VECAST_G4: - case EXC_VECAST_G5: - /* - * We get a VPU assist exception for IEEE mode - * vector operations on denormalized floats. - * Emulating this is a giant pain, so for now, - * just switch off IEEE mode and treat them as - * zero. - */ - - save_vec(td); - td->td_pcb->pcb_vec.vscr |= ALTIVEC_VSCR_NJ; - enable_vec(td); - break; - - case EXC_ALI: - if (fix_unaligned(td, frame) != 0) { - sig = SIGBUS; - ucode = BUS_ADRALN; - addr = frame->dar; - } - else - frame->srr0 += 4; - break; - - case EXC_DEBUG: /* Single stepping */ - mtspr(SPR_DBSR, mfspr(SPR_DBSR)); - frame->srr1 &= ~PSL_DE; - frame->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC); - sig = SIGTRAP; - ucode = TRAP_TRACE; - break; - - case EXC_PGM: - /* Identify the trap reason */ - if (frame_is_trap_inst(frame)) { -#ifdef KDTRACE_HOOKS - inst = fuword32((const void *)frame->srr0); - if (inst == 0x0FFFDDDD && - dtrace_pid_probe_ptr != NULL) { - (*dtrace_pid_probe_ptr)(frame); - break; - } -#endif - sig = SIGTRAP; - ucode = TRAP_BRKPT; - break; - } - - if ((frame->srr1 & EXC_PGM_FPENABLED) && - (td->td_pcb->pcb_flags & PCB_FPU)) - sig = SIGFPE; - else - sig = ppc_instr_emulate(frame, td); - - if (sig == SIGILL) { - if (frame->srr1 & EXC_PGM_PRIV) - ucode = ILL_PRVOPC; - else if (frame->srr1 & EXC_PGM_ILLEGAL) - ucode = ILL_ILLOPC; - } else if (sig == SIGFPE) { - ucode = get_fpu_exception(td); - } - - break; - - case EXC_MCHK: - sig = cpu_machine_check(td, frame, &ucode); - printtrap(frame->exc, frame, 0, (frame->srr1 & PSL_PR)); - break; - -#if defined(__powerpc64__) && defined(AIM) - case EXC_SOFT_PATCH: - /* - * Point to the instruction that generated the exception to execute it again, - * and normalize the register values. - */ - frame->srr0 -= 4; - normalize_inputs(); - break; -#endif - - default: - trap_fatal(frame); - } - } else { - /* Kernel Mode Traps */ - - KASSERT(cold || td->td_ucred != NULL, - ("kernel trap doesn't have ucred")); - switch (type) { - case EXC_PGM: -#ifdef KDTRACE_HOOKS - if (frame_is_trap_inst(frame)) { - if (*(uint32_t *)frame->srr0 == EXC_DTRACE) { - if (dtrace_invop_jump_addr != NULL) { - dtrace_invop_jump_addr(frame); - return; - } - } - } -#endif -#ifdef KDB - if (db_trap_glue(frame)) - return; -#endif - break; -#if defined(__powerpc64__) && defined(AIM) - case EXC_DSE: - /* DSE on radix mmu is automatically fatal. */ - if (radix_mmu) - break; - if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0 && - (frame->dar & SEGMENT_MASK) == USER_ADDR) { - __asm __volatile ("slbmte %0, %1" :: - "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), - "r"(USER_SLB_SLBE)); - return; - } - break; -#endif - case EXC_DSI: - if (trap_pfault(frame, false, NULL, NULL)) - return; - break; - case EXC_MCHK: - if (handle_onfault(frame)) - return; - break; - default: - break; - } - trap_fatal(frame); - } - - if (sig != 0) { - ksiginfo_init_trap(&ksi); - ksi.ksi_signo = sig; - ksi.ksi_code = (int) ucode; /* XXX, not POSIX */ - ksi.ksi_addr = (void *)addr; - ksi.ksi_trapno = type; - if (uprintf_signal) { - uprintf("pid %d comm %s: signal %d code %d type 0x%x " - "addr 0x%lx r1 0x%lx srr0 0x%lx srr1 0x%lx\n", - p->p_pid, p->p_comm, sig, ucode, type, - (u_long)addr, (u_long)frame->fixreg[1], - (u_long)frame->srr0, (u_long)frame->srr1); - } - - trapsignal(td, &ksi); - } - - userret(td, frame); -} - -static void -trap_fatal(struct trapframe *frame) -{ -#ifdef KDB - bool handled; -#endif - - printtrap(frame->exc, frame, 1, (frame->srr1 & PSL_PR)); -#ifdef KDB - if (debugger_on_trap) { - kdb_why = KDB_WHY_TRAP; - handled = kdb_trap(frame->exc, 0, frame); - kdb_why = KDB_WHY_UNSET; - if (handled) - return; - } -#endif - panic("%s trap", trapname(frame->exc)); -} - -static void -cpu_printtrap(u_int vector, struct trapframe *frame, int isfatal, int user) -{ -#ifdef AIM - uint16_t ver; - - switch (vector) { - case EXC_MCHK: - ver = mfpvr() >> 16; - if (MPC745X_P(ver)) - printf(" msssr0 = 0x%b\n", - (int)mfspr(SPR_MSSSR0), MSSSR_BITMASK); - case EXC_DSE: - case EXC_DSI: - case EXC_DTMISS: - printf(" dsisr = 0x%lx\n", - (u_long)frame->cpu.aim.dsisr); - break; - } -#elif defined(BOOKE) - vm_paddr_t pa; - - switch (vector) { - case EXC_MCHK: - pa = mfspr(SPR_MCARU); - pa = (pa << 32) | (u_register_t)mfspr(SPR_MCAR); - printf(" mcsr = 0x%b\n", - (int)mfspr(SPR_MCSR), MCSR_BITMASK); - printf(" mcar = 0x%jx\n", (uintmax_t)pa); - } - printf(" esr = 0x%b\n", - (int)frame->cpu.booke.esr, ESR_BITMASK); -#endif -} - -static void -printtrap(u_int vector, struct trapframe *frame, int isfatal, int user) -{ - - printf("\n"); - printf("%s %s trap:\n", isfatal ? "fatal" : "handled", - user ? "user" : "kernel"); - printf("\n"); - printf(" exception = 0x%x (%s)\n", vector, trapname(vector)); - switch (vector) { - case EXC_DSE: - case EXC_DSI: - case EXC_DTMISS: - case EXC_ALI: - case EXC_MCHK: - printf(" virtual address = 0x%" PRIxPTR "\n", frame->dar); - break; - case EXC_ISE: - case EXC_ISI: - case EXC_ITMISS: - printf(" virtual address = 0x%" PRIxPTR "\n", frame->srr0); - break; - } - cpu_printtrap(vector, frame, isfatal, user); - printf(" srr0 = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n", - frame->srr0, frame->srr0 - (register_t)(__startkernel - KERNBASE)); - printf(" srr1 = 0x%lx\n", (u_long)frame->srr1); - printf(" current msr = 0x%" PRIxPTR "\n", mfmsr()); - printf(" lr = 0x%" PRIxPTR " (0x%" PRIxPTR ")\n", - frame->lr, frame->lr - (register_t)(__startkernel - KERNBASE)); - printf(" frame = %p\n", frame); - printf(" curthread = %p\n", curthread); - if (curthread != NULL) - printf(" pid = %d, comm = %s\n", - curthread->td_proc->p_pid, curthread->td_name); - printf("\n"); -} - -/* - * Handles a fatal fault when we have onfault state to recover. Returns - * non-zero if there was onfault recovery state available. - */ -static int -handle_onfault(struct trapframe *frame) -{ - struct thread *td; - jmp_buf *fb; - - td = curthread; -#if defined(__powerpc64__) || defined(BOOKE) - uintptr_t dispatch = (uintptr_t)td->td_pcb->pcb_onfault; - - if (dispatch == 0) - return (0); - /* Short-circuit radix and Book-E paths. */ - switch (dispatch) { - case COPYFAULT: - frame->srr0 = (uintptr_t)copy_fault; - return (1); - case FUSUFAULT: - frame->srr0 = (uintptr_t)fusufault; - return (1); - default: - break; - } -#endif - fb = td->td_pcb->pcb_onfault; - if (fb != NULL) { - frame->srr0 = (*fb)->_jb[FAULTBUF_LR]; - frame->fixreg[1] = (*fb)->_jb[FAULTBUF_R1]; - frame->fixreg[2] = (*fb)->_jb[FAULTBUF_R2]; - frame->fixreg[3] = 1; - frame->cr = (*fb)->_jb[FAULTBUF_CR]; - bcopy(&(*fb)->_jb[FAULTBUF_R14], &frame->fixreg[14], - 18 * sizeof(register_t)); - td->td_pcb->pcb_onfault = NULL; /* Returns twice, not thrice */ - return (1); - } - return (0); -} - -int -cpu_fetch_syscall_args(struct thread *td) -{ - struct proc *p; - struct trapframe *frame; - struct syscall_args *sa; - caddr_t params; - size_t argsz; - int error, n, narg, i; - - p = td->td_proc; - frame = td->td_frame; - sa = &td->td_sa; - - sa->code = frame->fixreg[0]; - params = (caddr_t)(frame->fixreg + FIRSTARG); - n = NARGREG; - - if (sa->code == SYS_syscall) { - /* - * code is first argument, - * followed by actual args. - */ - sa->code = *(register_t *) params; - params += sizeof(register_t); - n -= 1; - } else if (sa->code == SYS___syscall) { - /* - * Like syscall, but code is a quad, - * so as to maintain quad alignment - * for the rest of the args. - */ - if (SV_PROC_FLAG(p, SV_ILP32)) { - params += sizeof(register_t); - sa->code = *(register_t *) params; - params += sizeof(register_t); - n -= 2; - } else { - sa->code = *(register_t *) params; - params += sizeof(register_t); - n -= 1; - } - } - - if (sa->code >= p->p_sysent->sv_size) - sa->callp = &nosys_sysent; - else - sa->callp = &p->p_sysent->sv_table[sa->code]; - - narg = sa->callp->sy_narg; - - if (SV_PROC_FLAG(p, SV_ILP32)) { - argsz = sizeof(uint32_t); - - for (i = 0; i < n; i++) - sa->args[i] = ((u_register_t *)(params))[i] & - 0xffffffff; - } else { - argsz = sizeof(uint64_t); - - for (i = 0; i < n; i++) - sa->args[i] = ((u_register_t *)(params))[i]; - } - - if (narg > n) - error = copyin(MOREARGS(frame->fixreg[1]), sa->args + n, - (narg - n) * argsz); - else - error = 0; - -#ifdef __powerpc64__ - if (SV_PROC_FLAG(p, SV_ILP32) && narg > n) { - /* Expand the size of arguments copied from the stack */ - - for (i = narg; i >= n; i--) - sa->args[i] = ((uint32_t *)(&sa->args[n]))[i-n]; - } -#endif - - if (error == 0) { - td->td_retval[0] = 0; - td->td_retval[1] = frame->fixreg[FIRSTARG + 1]; - } - return (error); -} - -#include "../../kern/subr_syscall.c" - -void -syscall(struct trapframe *frame) -{ - struct thread *td; - - td = curthread; - td->td_frame = frame; - -#if defined(__powerpc64__) && defined(AIM) - /* - * Speculatively restore last user SLB segment, which we know is - * invalid already, since we are likely to do copyin()/copyout(). - */ - if (td->td_pcb->pcb_cpu.aim.usr_vsid != 0) - __asm __volatile ("slbmte %0, %1; isync" :: - "r"(td->td_pcb->pcb_cpu.aim.usr_vsid), "r"(USER_SLB_SLBE)); -#endif - - syscallenter(td); - syscallret(td); -} - -static bool -trap_pfault(struct trapframe *frame, bool user, int *signo, int *ucode) -{ - vm_offset_t eva; - struct thread *td; - struct proc *p; - vm_map_t map; - vm_prot_t ftype; - int rv, is_user; - - td = curthread; - p = td->td_proc; - if (frame->exc == EXC_ISI) { - eva = frame->srr0; - ftype = VM_PROT_EXECUTE; - if (frame->srr1 & SRR1_ISI_PFAULT) - ftype |= VM_PROT_READ; - } else { - eva = frame->dar; -#ifdef BOOKE - if (frame->cpu.booke.esr & ESR_ST) -#else - if (frame->cpu.aim.dsisr & DSISR_STORE) -#endif - ftype = VM_PROT_WRITE; - else - ftype = VM_PROT_READ; - } -#if defined(__powerpc64__) && defined(AIM) - if (radix_mmu && pmap_nofault(&p->p_vmspace->vm_pmap, eva, ftype) == 0) - return (true); -#endif - - if (__predict_false((td->td_pflags & TDP_NOFAULTING) == 0)) { - /* - * If we get a page fault while in a critical section, then - * it is most likely a fatal kernel page fault. The kernel - * is already going to panic trying to get a sleep lock to - * do the VM lookup, so just consider it a fatal trap so the - * kernel can print out a useful trap message and even get - * to the debugger. - * - * If we get a page fault while holding a non-sleepable - * lock, then it is most likely a fatal kernel page fault. - * If WITNESS is enabled, then it's going to whine about - * bogus LORs with various VM locks, so just skip to the - * fatal trap handling directly. - */ - if (td->td_critnest != 0 || - WITNESS_CHECK(WARN_SLEEPOK | WARN_GIANTOK, NULL, - "Kernel page fault") != 0) { - trap_fatal(frame); - return (false); - } - } - if (user) { - KASSERT(p->p_vmspace != NULL, ("trap_pfault: vmspace NULL")); - map = &p->p_vmspace->vm_map; - } else { - rv = pmap_decode_kernel_ptr(eva, &is_user, &eva); - if (rv != 0) - return (false); - - if (is_user) - map = &p->p_vmspace->vm_map; - else - map = kernel_map; - } - - /* Fault in the page. */ - rv = vm_fault_trap(map, eva, ftype, VM_FAULT_NORMAL, signo, ucode); - /* - * XXXDTRACE: add dtrace_doubletrap_func here? - */ - - if (rv == KERN_SUCCESS) - return (true); - - if (!user && handle_onfault(frame)) - return (true); - - return (false); -} - -/* - * For now, this only deals with the particular unaligned access case - * that gcc tends to generate. Eventually it should handle all of the - * possibilities that can happen on a 32-bit PowerPC in big-endian mode. - */ - -static int -fix_unaligned(struct thread *td, struct trapframe *frame) -{ - struct thread *fputhread; -#ifdef BOOKE - uint32_t inst; -#endif - int indicator, reg; - double *fpr; - -#ifdef __SPE__ - indicator = (frame->cpu.booke.esr & (ESR_ST|ESR_SPE)); - if (indicator & ESR_SPE) { - if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0) - return (-1); - reg = EXC_ALI_INST_RST(inst); - fpr = (double *)td->td_pcb->pcb_vec.vr[reg]; - fputhread = PCPU_GET(vecthread); - - /* Juggle the SPE to ensure that we've initialized - * the registers, and that their current state is in - * the PCB. - */ - if (fputhread != td) { - if (fputhread) - save_vec(fputhread); - enable_vec(td); - } - save_vec(td); - - if (!(indicator & ESR_ST)) { - if (copyin((void *)frame->dar, fpr, - sizeof(double)) != 0) - return (-1); - frame->fixreg[reg] = td->td_pcb->pcb_vec.vr[reg][1]; - enable_vec(td); - } else { - td->td_pcb->pcb_vec.vr[reg][1] = frame->fixreg[reg]; - if (copyout(fpr, (void *)frame->dar, - sizeof(double)) != 0) - return (-1); - } - return (0); - } -#else -#ifdef BOOKE - indicator = (frame->cpu.booke.esr & ESR_ST) ? EXC_ALI_STFD : EXC_ALI_LFD; -#else - indicator = EXC_ALI_OPCODE_INDICATOR(frame->cpu.aim.dsisr); -#endif - - switch (indicator) { - case EXC_ALI_LFD: - case EXC_ALI_STFD: -#ifdef BOOKE - if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0) - return (-1); - reg = EXC_ALI_INST_RST(inst); -#else - reg = EXC_ALI_RST(frame->cpu.aim.dsisr); -#endif - fpr = &td->td_pcb->pcb_fpu.fpr[reg].fpr; - fputhread = PCPU_GET(fputhread); - - /* Juggle the FPU to ensure that we've initialized - * the FPRs, and that their current state is in - * the PCB. - */ - if (fputhread != td) { - if (fputhread) - save_fpu(fputhread); - enable_fpu(td); - } - save_fpu(td); - - if (indicator == EXC_ALI_LFD) { - if (copyin((void *)frame->dar, fpr, - sizeof(double)) != 0) - return (-1); - enable_fpu(td); - } else { - if (copyout(fpr, (void *)frame->dar, - sizeof(double)) != 0) - return (-1); - } - return (0); - break; - } -#endif - - return (-1); -} - -#if defined(__powerpc64__) && defined(AIM) -#define MSKNSHL(x, m, n) "(((" #x ") & " #m ") << " #n ")" -#define MSKNSHR(x, m, n) "(((" #x ") & " #m ") >> " #n ")" - -/* xvcpsgndp instruction, built in opcode format. - * This can be changed to use mnemonic after a toolchain update. - */ -#define XVCPSGNDP(xt, xa, xb) \ - __asm __volatile(".long (" \ - MSKNSHL(60, 0x3f, 26) " | " \ - MSKNSHL(xt, 0x1f, 21) " | " \ - MSKNSHL(xa, 0x1f, 16) " | " \ - MSKNSHL(xb, 0x1f, 11) " | " \ - MSKNSHL(240, 0xff, 3) " | " \ - MSKNSHR(xa, 0x20, 3) " | " \ - MSKNSHR(xa, 0x20, 4) " | " \ - MSKNSHR(xa, 0x20, 5) ")") - -/* Macros to normalize 1 or 10 VSX registers */ -#define NORM(x) XVCPSGNDP(x, x, x) -#define NORM10(x) \ - NORM(x ## 0); NORM(x ## 1); NORM(x ## 2); NORM(x ## 3); NORM(x ## 4); \ - NORM(x ## 5); NORM(x ## 6); NORM(x ## 7); NORM(x ## 8); NORM(x ## 9) - -static void -normalize_inputs(void) -{ - register_t msr; - - /* enable VSX */ - msr = mfmsr(); - mtmsr(msr | PSL_VSX); - - NORM(0); NORM(1); NORM(2); NORM(3); NORM(4); - NORM(5); NORM(6); NORM(7); NORM(8); NORM(9); - NORM10(1); NORM10(2); NORM10(3); NORM10(4); NORM10(5); - NORM(60); NORM(61); NORM(62); NORM(63); - - /* restore MSR */ - mtmsr(msr); -} -#endif - -#ifdef KDB -int -db_trap_glue(struct trapframe *frame) -{ - - if (!(frame->srr1 & PSL_PR) - && (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC - || frame_is_trap_inst(frame) - || frame->exc == EXC_BPT - || frame->exc == EXC_DEBUG - || frame->exc == EXC_DSI)) { - int type = frame->exc; - - /* Ignore DTrace traps. */ - if (*(uint32_t *)frame->srr0 == EXC_DTRACE) - return (0); - if (frame_is_trap_inst(frame)) { - type = T_BREAKPOINT; - } - return (kdb_trap(type, 0, frame)); - } - - return (0); -} -#endif diff --git a/sys/powerpc/powerpc/uio_machdep.c b/sys/powerpc/powerpc/uio_machdep.c deleted file mode 100644 index 5de2dd8b416..00000000000 --- a/sys/powerpc/powerpc/uio_machdep.c +++ /dev/null @@ -1,136 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 2004 Alan L. Cox - * Copyright (c) 1982, 1986, 1991, 1993 - * The Regents of the University of California. All rights reserved. - * (c) UNIX System Laboratories, Inc. - * All or some portions of this file are derived from material licensed - * to the University of California by American Telephone and Telegraph - * Co. or Unix System Laboratories, Inc. and are reproduced herein with - * the permission of UNIX System Laboratories, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)kern_subr.c 8.3 (Berkeley) 1/21/94 - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -/* - * Implement uiomove(9) from physical memory using sf_bufs to - * avoid the creation and destruction of ephemeral mappings. - */ -int -uiomove_fromphys(vm_page_t ma[], vm_offset_t offset, int n, struct uio *uio) -{ - struct thread *td = curthread; - struct iovec *iov; - void *cp; - vm_offset_t page_offset; - vm_page_t m; - size_t cnt; - int error = 0; - int save = 0; - struct sf_buf *sf; - - KASSERT(uio->uio_rw == UIO_READ || uio->uio_rw == UIO_WRITE, - ("uiomove_fromphys: mode")); - KASSERT(uio->uio_segflg != UIO_USERSPACE || uio->uio_td == curthread, - ("uiomove_fromphys proc")); - KASSERT(uio->uio_resid >= 0, - ("%s: uio %p resid underflow", __func__, uio)); - - save = td->td_pflags & TDP_DEADLKTREAT; - td->td_pflags |= TDP_DEADLKTREAT; - while (n > 0 && uio->uio_resid) { - KASSERT(uio->uio_iovcnt > 0, - ("%s: uio %p iovcnt underflow", __func__, uio)); - - iov = uio->uio_iov; - cnt = iov->iov_len; - if (cnt == 0) { - uio->uio_iov++; - uio->uio_iovcnt--; - continue; - } - if (cnt > n) - cnt = n; - page_offset = offset & PAGE_MASK; - cnt = min(cnt, PAGE_SIZE - page_offset); - - m = ma[offset >> PAGE_SHIFT]; - sf = sf_buf_alloc(m, 0); - cp = (char*)sf_buf_kva(sf) + page_offset; - - switch (uio->uio_segflg) { - case UIO_USERSPACE: - maybe_yield(); - if (uio->uio_rw == UIO_READ) - error = copyout(cp, iov->iov_base, cnt); - else - error = copyin(iov->iov_base, cp, cnt); - if (error) { - sf_buf_free(sf); - goto out; - } - break; - case UIO_SYSSPACE: - if (uio->uio_rw == UIO_READ) - bcopy(cp, iov->iov_base, cnt); - else - bcopy(iov->iov_base, cp, cnt); - break; - case UIO_NOCOPY: - break; - } - sf_buf_free(sf); - iov->iov_base = (char *)iov->iov_base + cnt; - iov->iov_len -= cnt; - uio->uio_resid -= cnt; - uio->uio_offset += cnt; - offset += cnt; - n -= cnt; - } -out: - if (save == 0) - td->td_pflags &= ~TDP_DEADLKTREAT; - return (error); -} diff --git a/sys/powerpc/powerpc/uma_machdep.c b/sys/powerpc/powerpc/uma_machdep.c deleted file mode 100644 index 3f8276b16ba..00000000000 --- a/sys/powerpc/powerpc/uma_machdep.c +++ /dev/null @@ -1,98 +0,0 @@ -/*- - * Copyright (c) 2003 The FreeBSD Project - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static int hw_uma_mdpages; -SYSCTL_INT(_hw, OID_AUTO, uma_mdpages, CTLFLAG_RD, &hw_uma_mdpages, 0, - "UMA MD pages in use"); - -void * -uma_small_alloc(uma_zone_t zone, vm_size_t bytes, int domain, u_int8_t *flags, - int wait) -{ - void *va; - vm_paddr_t pa; - vm_page_t m; - - *flags = UMA_SLAB_PRIV; - - m = vm_page_alloc_noobj_domain(domain, malloc2vm_flags(wait) | - VM_ALLOC_WIRED); - if (m == NULL) - return (NULL); - - pa = VM_PAGE_TO_PHYS(m); -#ifdef __powerpc64__ - if ((wait & M_NODUMP) == 0) - dump_add_page(pa); -#endif - - if (!hw_direct_map) { - pmap_kenter(pa, pa); - va = (void *)(vm_offset_t)pa; - } else { - va = (void *)(vm_offset_t)PHYS_TO_DMAP(pa); - } - atomic_add_int(&hw_uma_mdpages, 1); - - return (va); -} - -void -uma_small_free(void *mem, vm_size_t size, u_int8_t flags) -{ - vm_page_t m; - - if (hw_direct_map) - m = PHYS_TO_VM_PAGE(DMAP_TO_PHYS((vm_offset_t)mem)); - else { - m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)mem)); - pmap_kremove((vm_offset_t)mem); - } - - KASSERT(m != NULL, - ("Freeing UMA block at %p with no associated page", mem)); -#ifdef __powerpc64__ - dump_drop_page(VM_PAGE_TO_PHYS(m)); -#endif - vm_page_unwire_noq(m); - vm_page_free(m); - atomic_subtract_int(&hw_uma_mdpages, 1); -} diff --git a/sys/powerpc/powerpc/vm_machdep.c b/sys/powerpc/powerpc/vm_machdep.c deleted file mode 100644 index c99748149f3..00000000000 --- a/sys/powerpc/powerpc/vm_machdep.c +++ /dev/null @@ -1,246 +0,0 @@ -/*- - * SPDX-License-Identifier: (BSD-4-Clause AND MIT-CMU) - * - * Copyright (c) 1982, 1986 The Regents of the University of California. - * Copyright (c) 1989, 1990 William Jolitz - * Copyright (c) 1994 John Dyson - * All rights reserved. - * - * This code is derived from software contributed to Berkeley by - * the Systems Programming Group of the University of Utah Computer - * Science Department, and William Jolitz. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the University of - * California, Berkeley and its contributors. - * 4. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91 - * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$ - */ -/*- - * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. - * All rights reserved. - * - * Author: Chris G. Demetriou - * - * Permission to use, copy, modify and distribute this software and - * its documentation is hereby granted, provided that both the copyright - * notice and this permission notice appear in all copies of the - * software, derivative works or modified versions, and any portions - * thereof, and that both notices appear in supporting documentation. - * - * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" - * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND - * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. - * - * Carnegie Mellon requests users of this software to return to - * - * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU - * School of Computer Science - * Carnegie Mellon University - * Pittsburgh PA 15213-3890 - * - * any improvements or extensions that they make and grant Carnegie the - * rights to redistribute these changes. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include -#include - -/* - * Finish a fork operation, with process p2 nearly set up. - * Copy and update the pcb, set up the stack so that the child - * ready to run and return to user mode. - */ -void -cpu_fork(struct thread *td1, struct proc *p2, struct thread *td2, int flags) -{ - struct trapframe *tf; - struct callframe *cf; - struct pcb *pcb; - - KASSERT(td1 == curthread || td1 == &thread0, - ("cpu_fork: p1 not curproc and not proc0")); - CTR3(KTR_PROC, "cpu_fork: called td1=%p p2=%p flags=%x", - td1, p2, flags); - - if ((flags & RFPROC) == 0) - return; - - pcb = (struct pcb *)((td2->td_kstack + - td2->td_kstack_pages * PAGE_SIZE - sizeof(struct pcb)) & ~0x2fUL); - td2->td_pcb = pcb; - - /* Copy the pcb */ - bcopy(td1->td_pcb, pcb, sizeof(struct pcb)); - - /* - * Create a fresh stack for the new process. - * Copy the trap frame for the return to user mode as if from a - * syscall. This copies most of the user mode register values. - */ - tf = (struct trapframe *)pcb - 1; - bcopy(td1->td_frame, tf, sizeof(*tf)); - - /* Set up trap frame. */ - tf->fixreg[FIRSTARG] = 0; - tf->fixreg[FIRSTARG + 1] = 0; - tf->cr &= ~0x10000000; - - td2->td_frame = tf; - - cf = (struct callframe *)tf - 1; - memset(cf, 0, sizeof(struct callframe)); - #if defined(__powerpc64__) && (!defined(_CALL_ELF) || _CALL_ELF == 1) - cf->cf_toc = ((register_t *)fork_return)[1]; - #endif - cf->cf_func = (register_t)fork_return; - cf->cf_arg0 = (register_t)td2; - cf->cf_arg1 = (register_t)tf; - - pcb->pcb_sp = (register_t)cf; - KASSERT(pcb->pcb_sp % 16 == 0, ("stack misaligned")); - #if defined(__powerpc64__) && (!defined(_CALL_ELF) || _CALL_ELF == 1) - pcb->pcb_lr = ((register_t *)fork_trampoline)[0]; - pcb->pcb_toc = ((register_t *)fork_trampoline)[1]; - #else - pcb->pcb_lr = (register_t)fork_trampoline; - pcb->pcb_context[0] = pcb->pcb_lr; - #endif - #ifdef AIM - pcb->pcb_cpu.aim.usr_vsid = 0; - #endif - - /* Setup to release spin count in fork_exit(). */ - td2->td_md.md_spinlock_count = 1; - td2->td_md.md_saved_msr = psl_kernset; - - /* - * Now cpu_switch() can schedule the new process. - */ -} - -/* - * Intercept the return address from a freshly forked process that has NOT - * been scheduled yet. - * - * This is needed to make kernel threads stay in kernel mode. - */ -void -cpu_fork_kthread_handler(struct thread *td, void (*func)(void *), void *arg) -{ - struct callframe *cf; - - CTR4(KTR_PROC, "%s called with td=%p func=%p arg=%p", - __func__, td, func, arg); - - cf = (struct callframe *)td->td_pcb->pcb_sp; - - #if defined(__powerpc64__) && (!defined(_CALL_ELF) || _CALL_ELF == 1) - cf->cf_toc = ((register_t *)func)[1]; - #endif - cf->cf_func = (register_t)func; - cf->cf_arg0 = (register_t)arg; -} - -void -cpu_exit(struct thread *td) -{ - -} - -/* - * CPU threading functions related to the VM layer. These could be used - * to map the SLB bits required for the kernel stack instead of forcing a - * fixed-size KVA. - */ - -void -cpu_thread_swapin(struct thread *td) -{ - -} - -void -cpu_thread_swapout(struct thread *td) -{ - -} - -bool -cpu_exec_vmspace_reuse(struct proc *p __unused, vm_map_t map __unused) -{ - - return (true); -} - -int -cpu_procctl(struct thread *td __unused, int idtype __unused, id_t id __unused, - int com __unused, void *data __unused) -{ - - return (EINVAL); -} - -void -cpu_sync_core(void) -{ - /* - * Linux performs "rfi" there. Our rendezvous IPI handler on - * the target cpu does "rfi" before and lwsync/sync after the - * action, which is stronger than required. - */ -} diff --git a/sys/powerpc/ps3/ehci_ps3.c b/sys/powerpc/ps3/ehci_ps3.c deleted file mode 100644 index b7b7b402893..00000000000 --- a/sys/powerpc/ps3/ehci_ps3.c +++ /dev/null @@ -1,182 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2010 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "ps3bus.h" - -struct ps3_ehci_softc { - ehci_softc_t base; - struct bus_space tag; -}; - -static void -ehci_ps3_post_reset(struct ehci_softc *ehci_softc) -{ - uint32_t usbmode; - - /* Select big-endian mode */ - usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM); - usbmode |= EHCI_UM_ES_BE; - EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode); -} - -static int -ehci_ps3_probe(device_t dev) -{ - if (ps3bus_get_bustype(dev) != PS3_BUSTYPE_SYSBUS || - ps3bus_get_devtype(dev) != PS3_DEVTYPE_USB) - return (ENXIO); - - device_set_desc(dev, "Playstation 3 USB 2.0 controller"); - return (BUS_PROBE_SPECIFIC); -} - -static int -ehci_ps3_attach(device_t dev) -{ - ehci_softc_t *sc = device_get_softc(dev); - int rid, err; - - sc->sc_bus.parent = dev; - sc->sc_bus.devices = sc->sc_devices; - sc->sc_bus.devices_max = EHCI_MAX_DEVICES; - sc->sc_bus.dma_bits = 32; - - /* get all DMA memory */ - if (usb_bus_mem_alloc_all(&sc->sc_bus, - USB_GET_DMA_TAG(dev), &ehci_iterate_hw_softc)) - return (ENOMEM); - - rid = 1; - sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &rid, RF_ACTIVE); - - if (!sc->sc_io_res) { - device_printf(dev, "Could not map memory\n"); - goto error; - } - - sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); - sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); - sc->sc_io_size = rman_get_size(sc->sc_io_res); - - rid = 1; - sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE); - - if (sc->sc_irq_res == NULL) { - device_printf(dev, "Could not allocate irq\n"); - return (ENXIO); - } - - sc->sc_bus.bdev = device_add_child(dev, "usbus", -1); - if (!sc->sc_bus.bdev) { - device_printf(dev, "Could not add USB device\n"); - return (ENXIO); - } - - device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); - - sprintf(sc->sc_vendor, "Sony"); - - err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, - NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl); - if (err) { - device_printf(dev, "Could not setup error irq, %d\n", err); - goto error; - } - - sc->sc_vendor_post_reset = ehci_ps3_post_reset; - err = ehci_init(sc); - if (err) { - device_printf(dev, "USB init failed err=%d\n", err); - goto error; - } - - err = device_probe_and_attach(sc->sc_bus.bdev); - if (err == 0) - return (0); - -error: - return (ENXIO); -} - -static device_method_t ehci_ps3_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ehci_ps3_probe), - DEVMETHOD(device_attach, ehci_ps3_attach), - DEVMETHOD(device_resume, bus_generic_resume), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - - DEVMETHOD_END -}; - -static driver_t ehci_ps3_driver = { - .name = "ehci", - .methods = ehci_ps3_methods, - .size = sizeof(ehci_softc_t), -}; - -static devclass_t ehci_ps3_devclass; - -DRIVER_MODULE(ehci_ps3, ps3bus, ehci_ps3_driver, ehci_ps3_devclass, 0, 0); -MODULE_DEPEND(ehci_ps3, usb, 1, 1, 1); diff --git a/sys/powerpc/ps3/if_glc.c b/sys/powerpc/ps3/if_glc.c deleted file mode 100644 index 12fb713db23..00000000000 --- a/sys/powerpc/ps3/if_glc.c +++ /dev/null @@ -1,958 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2010 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "ps3bus.h" -#include "ps3-hvcall.h" -#include "if_glcreg.h" - -static int glc_probe(device_t); -static int glc_attach(device_t); -static void glc_init(void *xsc); -static void glc_start(struct ifnet *ifp); -static int glc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); -static void glc_set_multicast(struct glc_softc *sc); -static int glc_add_rxbuf(struct glc_softc *sc, int idx); -static int glc_add_rxbuf_dma(struct glc_softc *sc, int idx); -static int glc_encap(struct glc_softc *sc, struct mbuf **m_head, - bus_addr_t *pktdesc); -static int glc_intr_filter(void *xsc); -static void glc_intr(void *xsc); -static void glc_tick(void *xsc); -static void glc_media_status(struct ifnet *ifp, struct ifmediareq *ifmr); -static int glc_media_change(struct ifnet *ifp); - -static MALLOC_DEFINE(M_GLC, "gelic", "PS3 GELIC ethernet"); - -static device_method_t glc_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, glc_probe), - DEVMETHOD(device_attach, glc_attach), - { 0, 0 } -}; - -static driver_t glc_driver = { - "glc", - glc_methods, - sizeof(struct glc_softc) -}; - -static devclass_t glc_devclass; - -DRIVER_MODULE(glc, ps3bus, glc_driver, glc_devclass, 0, 0); - -static int -glc_probe(device_t dev) -{ - - if (ps3bus_get_bustype(dev) != PS3_BUSTYPE_SYSBUS || - ps3bus_get_devtype(dev) != PS3_DEVTYPE_GELIC) - return (ENXIO); - - device_set_desc(dev, "Playstation 3 GELIC Network Controller"); - return (BUS_PROBE_SPECIFIC); -} - -static void -glc_getphys(void *xaddr, bus_dma_segment_t *segs, int nsegs, int error) -{ - if (error != 0) - return; - - *(bus_addr_t *)xaddr = segs[0].ds_addr; -} - -static int -glc_attach(device_t dev) -{ - struct glc_softc *sc; - struct glc_txsoft *txs; - uint64_t mac64, val, junk; - int i, err; - - sc = device_get_softc(dev); - - sc->sc_bus = ps3bus_get_bus(dev); - sc->sc_dev = ps3bus_get_device(dev); - sc->sc_self = dev; - - mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, - MTX_DEF); - callout_init_mtx(&sc->sc_tick_ch, &sc->sc_mtx, 0); - sc->next_txdma_slot = 0; - sc->bsy_txdma_slots = 0; - sc->sc_next_rxdma_slot = 0; - sc->first_used_txdma_slot = -1; - - /* - * Shut down existing tasks. - */ - - lv1_net_stop_tx_dma(sc->sc_bus, sc->sc_dev, 0); - lv1_net_stop_rx_dma(sc->sc_bus, sc->sc_dev, 0); - - sc->sc_ifp = if_alloc(IFT_ETHER); - sc->sc_ifp->if_softc = sc; - - /* - * Get MAC address and VLAN id - */ - - lv1_net_control(sc->sc_bus, sc->sc_dev, GELIC_GET_MAC_ADDRESS, - 0, 0, 0, &mac64, &junk); - memcpy(sc->sc_enaddr, &((uint8_t *)&mac64)[2], sizeof(sc->sc_enaddr)); - sc->sc_tx_vlan = sc->sc_rx_vlan = -1; - err = lv1_net_control(sc->sc_bus, sc->sc_dev, GELIC_GET_VLAN_ID, - GELIC_VLAN_TX_ETHERNET, 0, 0, &val, &junk); - if (err == 0) - sc->sc_tx_vlan = val; - err = lv1_net_control(sc->sc_bus, sc->sc_dev, GELIC_GET_VLAN_ID, - GELIC_VLAN_RX_ETHERNET, 0, 0, &val, &junk); - if (err == 0) - sc->sc_rx_vlan = val; - - /* - * Set up interrupt handler - */ - sc->sc_irqid = 0; - sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irqid, - RF_ACTIVE); - if (sc->sc_irq == NULL) { - device_printf(dev, "Could not allocate IRQ!\n"); - mtx_destroy(&sc->sc_mtx); - return (ENXIO); - } - - bus_setup_intr(dev, sc->sc_irq, - INTR_TYPE_NET | INTR_MPSAFE | INTR_ENTROPY, - glc_intr_filter, glc_intr, sc, &sc->sc_irqctx); - sc->sc_hwirq_status = (uint64_t *)contigmalloc(8, M_GLC, M_ZERO, 0, - BUS_SPACE_MAXADDR_32BIT, 8, PAGE_SIZE); - lv1_net_set_interrupt_status_indicator(sc->sc_bus, sc->sc_dev, - vtophys(sc->sc_hwirq_status), 0); - lv1_net_set_interrupt_mask(sc->sc_bus, sc->sc_dev, - GELIC_INT_RXDONE | GELIC_INT_RXFRAME | GELIC_INT_PHY | - GELIC_INT_TX_CHAIN_END, 0); - - /* - * Set up DMA. - */ - - err = bus_dma_tag_create(bus_get_dma_tag(dev), 32, 0, - BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, - 129*sizeof(struct glc_dmadesc), 1, 128*sizeof(struct glc_dmadesc), - 0, NULL,NULL, &sc->sc_dmadesc_tag); - - err = bus_dmamem_alloc(sc->sc_dmadesc_tag, (void **)&sc->sc_txdmadesc, - BUS_DMA_WAITOK | BUS_DMA_COHERENT | BUS_DMA_ZERO, - &sc->sc_txdmadesc_map); - err = bus_dmamap_load(sc->sc_dmadesc_tag, sc->sc_txdmadesc_map, - sc->sc_txdmadesc, 128*sizeof(struct glc_dmadesc), glc_getphys, - &sc->sc_txdmadesc_phys, 0); - err = bus_dmamem_alloc(sc->sc_dmadesc_tag, (void **)&sc->sc_rxdmadesc, - BUS_DMA_WAITOK | BUS_DMA_COHERENT | BUS_DMA_ZERO, - &sc->sc_rxdmadesc_map); - err = bus_dmamap_load(sc->sc_dmadesc_tag, sc->sc_rxdmadesc_map, - sc->sc_rxdmadesc, 128*sizeof(struct glc_dmadesc), glc_getphys, - &sc->sc_rxdmadesc_phys, 0); - - err = bus_dma_tag_create(bus_get_dma_tag(dev), 128, 0, - BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, - BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT, 0, NULL,NULL, - &sc->sc_rxdma_tag); - err = bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, - BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, - BUS_SPACE_MAXSIZE_32BIT, 16, BUS_SPACE_MAXSIZE_32BIT, 0, NULL,NULL, - &sc->sc_txdma_tag); - - /* init transmit descriptors */ - STAILQ_INIT(&sc->sc_txfreeq); - STAILQ_INIT(&sc->sc_txdirtyq); - - /* create TX DMA maps */ - err = ENOMEM; - for (i = 0; i < GLC_MAX_TX_PACKETS; i++) { - txs = &sc->sc_txsoft[i]; - txs->txs_mbuf = NULL; - err = bus_dmamap_create(sc->sc_txdma_tag, 0, &txs->txs_dmamap); - if (err) { - device_printf(dev, - "unable to create TX DMA map %d, error = %d\n", - i, err); - } - STAILQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); - } - - /* Create the receive buffer DMA maps. */ - for (i = 0; i < GLC_MAX_RX_PACKETS; i++) { - err = bus_dmamap_create(sc->sc_rxdma_tag, 0, - &sc->sc_rxsoft[i].rxs_dmamap); - if (err) { - device_printf(dev, - "unable to create RX DMA map %d, error = %d\n", - i, err); - } - sc->sc_rxsoft[i].rxs_mbuf = NULL; - } - - /* - * Attach to network stack - */ - - if_initname(sc->sc_ifp, device_get_name(dev), device_get_unit(dev)); - sc->sc_ifp->if_mtu = ETHERMTU; - sc->sc_ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; - sc->sc_ifp->if_hwassist = CSUM_TCP | CSUM_UDP; - sc->sc_ifp->if_capabilities = IFCAP_HWCSUM | IFCAP_RXCSUM; - sc->sc_ifp->if_capenable = IFCAP_HWCSUM | IFCAP_RXCSUM; - sc->sc_ifp->if_start = glc_start; - sc->sc_ifp->if_ioctl = glc_ioctl; - sc->sc_ifp->if_init = glc_init; - - ifmedia_init(&sc->sc_media, IFM_IMASK, glc_media_change, - glc_media_status); - ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_10_T, 0, NULL); - ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_10_T | IFM_FDX, 0, NULL); - ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_100_TX, 0, NULL); - ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_100_TX | IFM_FDX, 0, NULL); - ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL); - ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_AUTO, 0, NULL); - ifmedia_set(&sc->sc_media, IFM_ETHER | IFM_AUTO); - - IFQ_SET_MAXLEN(&sc->sc_ifp->if_snd, GLC_MAX_TX_PACKETS); - sc->sc_ifp->if_snd.ifq_drv_maxlen = GLC_MAX_TX_PACKETS; - IFQ_SET_READY(&sc->sc_ifp->if_snd); - - ether_ifattach(sc->sc_ifp, sc->sc_enaddr); - sc->sc_ifp->if_hwassist = 0; - - return (0); - - mtx_destroy(&sc->sc_mtx); - if_free(sc->sc_ifp); - return (ENXIO); -} - -static void -glc_init_locked(struct glc_softc *sc) -{ - int i, error; - struct glc_rxsoft *rxs; - struct glc_txsoft *txs; - - mtx_assert(&sc->sc_mtx, MA_OWNED); - - lv1_net_stop_tx_dma(sc->sc_bus, sc->sc_dev, 0); - lv1_net_stop_rx_dma(sc->sc_bus, sc->sc_dev, 0); - - glc_set_multicast(sc); - - for (i = 0; i < GLC_MAX_RX_PACKETS; i++) { - rxs = &sc->sc_rxsoft[i]; - rxs->rxs_desc_slot = i; - - if (rxs->rxs_mbuf == NULL) { - glc_add_rxbuf(sc, i); - - if (rxs->rxs_mbuf == NULL) { - rxs->rxs_desc_slot = -1; - break; - } - } - - glc_add_rxbuf_dma(sc, i); - bus_dmamap_sync(sc->sc_dmadesc_tag, sc->sc_rxdmadesc_map, - BUS_DMASYNC_PREREAD); - } - - /* Clear TX dirty queue */ - while ((txs = STAILQ_FIRST(&sc->sc_txdirtyq)) != NULL) { - STAILQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs_q); - bus_dmamap_unload(sc->sc_txdma_tag, txs->txs_dmamap); - - if (txs->txs_mbuf != NULL) { - m_freem(txs->txs_mbuf); - txs->txs_mbuf = NULL; - } - - STAILQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); - } - sc->first_used_txdma_slot = -1; - sc->bsy_txdma_slots = 0; - - error = lv1_net_start_rx_dma(sc->sc_bus, sc->sc_dev, - sc->sc_rxsoft[0].rxs_desc, 0); - if (error != 0) - device_printf(sc->sc_self, - "lv1_net_start_rx_dma error: %d\n", error); - - sc->sc_ifp->if_drv_flags |= IFF_DRV_RUNNING; - sc->sc_ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; - sc->sc_ifpflags = sc->sc_ifp->if_flags; - - sc->sc_wdog_timer = 0; - callout_reset(&sc->sc_tick_ch, hz, glc_tick, sc); -} - -static void -glc_stop(void *xsc) -{ - struct glc_softc *sc = xsc; - - mtx_assert(&sc->sc_mtx, MA_OWNED); - - lv1_net_stop_tx_dma(sc->sc_bus, sc->sc_dev, 0); - lv1_net_stop_rx_dma(sc->sc_bus, sc->sc_dev, 0); -} - -static void -glc_init(void *xsc) -{ - struct glc_softc *sc = xsc; - - mtx_lock(&sc->sc_mtx); - glc_init_locked(sc); - mtx_unlock(&sc->sc_mtx); -} - -static void -glc_tick(void *xsc) -{ - struct glc_softc *sc = xsc; - - mtx_assert(&sc->sc_mtx, MA_OWNED); - - /* - * XXX: Sometimes the RX queue gets stuck. Poke it periodically until - * we figure out why. This will fail harmlessly if the RX queue is - * already running. - */ - lv1_net_start_rx_dma(sc->sc_bus, sc->sc_dev, - sc->sc_rxsoft[sc->sc_next_rxdma_slot].rxs_desc, 0); - - if (sc->sc_wdog_timer == 0 || --sc->sc_wdog_timer != 0) { - callout_reset(&sc->sc_tick_ch, hz, glc_tick, sc); - return; - } - - /* Problems */ - device_printf(sc->sc_self, "device timeout\n"); - - glc_init_locked(sc); -} - -static void -glc_start_locked(struct ifnet *ifp) -{ - struct glc_softc *sc = ifp->if_softc; - bus_addr_t first, pktdesc; - int kickstart = 0; - int error; - struct mbuf *mb_head; - - mtx_assert(&sc->sc_mtx, MA_OWNED); - first = 0; - - if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != - IFF_DRV_RUNNING) - return; - - if (STAILQ_EMPTY(&sc->sc_txdirtyq)) - kickstart = 1; - - while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) { - IFQ_DRV_DEQUEUE(&ifp->if_snd, mb_head); - - if (mb_head == NULL) - break; - - /* Check if the ring buffer is full */ - if (sc->bsy_txdma_slots > 125) { - /* Put the packet back and stop */ - ifp->if_drv_flags |= IFF_DRV_OACTIVE; - IFQ_DRV_PREPEND(&ifp->if_snd, mb_head); - break; - } - - BPF_MTAP(ifp, mb_head); - - if (sc->sc_tx_vlan >= 0) - mb_head = ether_vlanencap(mb_head, sc->sc_tx_vlan); - - if (glc_encap(sc, &mb_head, &pktdesc)) { - ifp->if_drv_flags |= IFF_DRV_OACTIVE; - break; - } - - if (first == 0) - first = pktdesc; - } - - if (kickstart && first != 0) { - error = lv1_net_start_tx_dma(sc->sc_bus, sc->sc_dev, first, 0); - if (error != 0) - device_printf(sc->sc_self, - "lv1_net_start_tx_dma error: %d\n", error); - sc->sc_wdog_timer = 5; - } -} - -static void -glc_start(struct ifnet *ifp) -{ - struct glc_softc *sc = ifp->if_softc; - - mtx_lock(&sc->sc_mtx); - glc_start_locked(ifp); - mtx_unlock(&sc->sc_mtx); -} - -static int -glc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) -{ - struct glc_softc *sc = ifp->if_softc; - struct ifreq *ifr = (struct ifreq *)data; - int err = 0; - - switch (cmd) { - case SIOCSIFFLAGS: - mtx_lock(&sc->sc_mtx); - if ((ifp->if_flags & IFF_UP) != 0) { - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0 && - ((ifp->if_flags ^ sc->sc_ifpflags) & - (IFF_ALLMULTI | IFF_PROMISC)) != 0) - glc_set_multicast(sc); - else - glc_init_locked(sc); - } - else if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) - glc_stop(sc); - sc->sc_ifpflags = ifp->if_flags; - mtx_unlock(&sc->sc_mtx); - break; - case SIOCADDMULTI: - case SIOCDELMULTI: - mtx_lock(&sc->sc_mtx); - glc_set_multicast(sc); - mtx_unlock(&sc->sc_mtx); - break; - case SIOCGIFMEDIA: - case SIOCSIFMEDIA: - err = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd); - break; - default: - err = ether_ioctl(ifp, cmd, data); - break; - } - - return (err); -} - -static u_int -glc_add_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt) -{ - struct glc_softc *sc = arg; - uint64_t addr; - - /* - * Filter can only hold 32 addresses, so fall back to - * the IFF_ALLMULTI case if we have too many. +1 is for - * broadcast. - */ - if (cnt + 1 == 32) - return (0); - - addr = 0; - memcpy(&((uint8_t *)(&addr))[2], LLADDR(sdl), ETHER_ADDR_LEN); - lv1_net_add_multicast_address(sc->sc_bus, sc->sc_dev, addr, 0); - - return (1); -} - -static void -glc_set_multicast(struct glc_softc *sc) -{ - struct ifnet *ifp = sc->sc_ifp; - int naddrs; - - /* Clear multicast filter */ - lv1_net_remove_multicast_address(sc->sc_bus, sc->sc_dev, 0, 1); - - /* Add broadcast */ - lv1_net_add_multicast_address(sc->sc_bus, sc->sc_dev, - 0xffffffffffffL, 0); - - if ((ifp->if_flags & IFF_ALLMULTI) != 0) { - lv1_net_add_multicast_address(sc->sc_bus, sc->sc_dev, 0, 1); - } else { - naddrs = if_foreach_llmaddr(ifp, glc_add_maddr, sc); - if (naddrs + 1 == 32) - lv1_net_add_multicast_address(sc->sc_bus, - sc->sc_dev, 0, 1); - } -} - -static int -glc_add_rxbuf(struct glc_softc *sc, int idx) -{ - struct glc_rxsoft *rxs = &sc->sc_rxsoft[idx]; - struct mbuf *m; - bus_dma_segment_t segs[1]; - int error, nsegs; - - m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); - if (m == NULL) - return (ENOBUFS); - m->m_len = m->m_pkthdr.len = m->m_ext.ext_size; - - if (rxs->rxs_mbuf != NULL) { - bus_dmamap_sync(sc->sc_rxdma_tag, rxs->rxs_dmamap, - BUS_DMASYNC_POSTREAD); - bus_dmamap_unload(sc->sc_rxdma_tag, rxs->rxs_dmamap); - } - - error = bus_dmamap_load_mbuf_sg(sc->sc_rxdma_tag, rxs->rxs_dmamap, m, - segs, &nsegs, BUS_DMA_NOWAIT); - if (error != 0) { - device_printf(sc->sc_self, - "cannot load RS DMA map %d, error = %d\n", idx, error); - m_freem(m); - return (error); - } - /* If nsegs is wrong then the stack is corrupt. */ - KASSERT(nsegs == 1, - ("%s: too many DMA segments (%d)", __func__, nsegs)); - rxs->rxs_mbuf = m; - rxs->segment = segs[0]; - - bus_dmamap_sync(sc->sc_rxdma_tag, rxs->rxs_dmamap, BUS_DMASYNC_PREREAD); - - return (0); -} - -static int -glc_add_rxbuf_dma(struct glc_softc *sc, int idx) -{ - struct glc_rxsoft *rxs = &sc->sc_rxsoft[idx]; - - bzero(&sc->sc_rxdmadesc[idx], sizeof(sc->sc_rxdmadesc[idx])); - sc->sc_rxdmadesc[idx].paddr = rxs->segment.ds_addr; - sc->sc_rxdmadesc[idx].len = rxs->segment.ds_len; - sc->sc_rxdmadesc[idx].next = sc->sc_rxdmadesc_phys + - ((idx + 1) % GLC_MAX_RX_PACKETS)*sizeof(sc->sc_rxdmadesc[idx]); - sc->sc_rxdmadesc[idx].cmd_stat = GELIC_DESCR_OWNED; - - rxs->rxs_desc_slot = idx; - rxs->rxs_desc = sc->sc_rxdmadesc_phys + idx*sizeof(struct glc_dmadesc); - - return (0); -} - -static int -glc_encap(struct glc_softc *sc, struct mbuf **m_head, bus_addr_t *pktdesc) -{ - bus_dma_segment_t segs[16]; - struct glc_txsoft *txs; - struct mbuf *m; - bus_addr_t firstslotphys; - int i, idx, nsegs, nsegs_max; - int err = 0; - - /* Max number of segments is the number of free DMA slots */ - nsegs_max = 128 - sc->bsy_txdma_slots; - - if (nsegs_max > 16 || sc->first_used_txdma_slot < 0) - nsegs_max = 16; - - /* Get a work queue entry. */ - if ((txs = STAILQ_FIRST(&sc->sc_txfreeq)) == NULL) { - /* Ran out of descriptors. */ - return (ENOBUFS); - } - - nsegs = 0; - for (m = *m_head; m != NULL; m = m->m_next) - nsegs++; - - if (nsegs > nsegs_max) { - m = m_collapse(*m_head, M_NOWAIT, nsegs_max); - if (m == NULL) { - m_freem(*m_head); - *m_head = NULL; - return (ENOBUFS); - } - *m_head = m; - } - - err = bus_dmamap_load_mbuf_sg(sc->sc_txdma_tag, txs->txs_dmamap, - *m_head, segs, &nsegs, BUS_DMA_NOWAIT); - if (err != 0) { - m_freem(*m_head); - *m_head = NULL; - return (err); - } - - KASSERT(nsegs <= 128 - sc->bsy_txdma_slots, - ("GLC: Mapped too many (%d) DMA segments with %d available", - nsegs, 128 - sc->bsy_txdma_slots)); - - if (nsegs == 0) { - m_freem(*m_head); - *m_head = NULL; - return (EIO); - } - - txs->txs_ndescs = nsegs; - txs->txs_firstdesc = sc->next_txdma_slot; - - idx = txs->txs_firstdesc; - firstslotphys = sc->sc_txdmadesc_phys + - txs->txs_firstdesc*sizeof(struct glc_dmadesc); - - for (i = 0; i < nsegs; i++) { - bzero(&sc->sc_txdmadesc[idx], sizeof(sc->sc_txdmadesc[idx])); - sc->sc_txdmadesc[idx].paddr = segs[i].ds_addr; - sc->sc_txdmadesc[idx].len = segs[i].ds_len; - sc->sc_txdmadesc[idx].next = sc->sc_txdmadesc_phys + - ((idx + 1) % GLC_MAX_TX_PACKETS)*sizeof(struct glc_dmadesc); - sc->sc_txdmadesc[idx].cmd_stat |= GELIC_CMDSTAT_NOIPSEC; - - if (i+1 == nsegs) { - txs->txs_lastdesc = idx; - sc->sc_txdmadesc[idx].next = 0; - sc->sc_txdmadesc[idx].cmd_stat |= GELIC_CMDSTAT_LAST; - } - - if ((*m_head)->m_pkthdr.csum_flags & CSUM_TCP) - sc->sc_txdmadesc[idx].cmd_stat |= GELIC_CMDSTAT_CSUM_TCP; - if ((*m_head)->m_pkthdr.csum_flags & CSUM_UDP) - sc->sc_txdmadesc[idx].cmd_stat |= GELIC_CMDSTAT_CSUM_UDP; - sc->sc_txdmadesc[idx].cmd_stat |= GELIC_DESCR_OWNED; - - idx = (idx + 1) % GLC_MAX_TX_PACKETS; - } - sc->next_txdma_slot = idx; - sc->bsy_txdma_slots += nsegs; - if (txs->txs_firstdesc != 0) - idx = txs->txs_firstdesc - 1; - else - idx = GLC_MAX_TX_PACKETS - 1; - - if (sc->first_used_txdma_slot < 0) - sc->first_used_txdma_slot = txs->txs_firstdesc; - - bus_dmamap_sync(sc->sc_txdma_tag, txs->txs_dmamap, - BUS_DMASYNC_PREWRITE); - sc->sc_txdmadesc[idx].next = firstslotphys; - - STAILQ_REMOVE_HEAD(&sc->sc_txfreeq, txs_q); - STAILQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q); - txs->txs_mbuf = *m_head; - *pktdesc = firstslotphys; - - return (0); -} - -static void -glc_rxintr(struct glc_softc *sc) -{ - int i, restart_rxdma, error; - struct mbuf *m; - struct ifnet *ifp = sc->sc_ifp; - - bus_dmamap_sync(sc->sc_dmadesc_tag, sc->sc_rxdmadesc_map, - BUS_DMASYNC_POSTREAD); - - restart_rxdma = 0; - while ((sc->sc_rxdmadesc[sc->sc_next_rxdma_slot].cmd_stat & - GELIC_DESCR_OWNED) == 0) { - i = sc->sc_next_rxdma_slot; - sc->sc_next_rxdma_slot++; - if (sc->sc_next_rxdma_slot >= GLC_MAX_RX_PACKETS) - sc->sc_next_rxdma_slot = 0; - - if (sc->sc_rxdmadesc[i].cmd_stat & GELIC_CMDSTAT_CHAIN_END) - restart_rxdma = 1; - - if (sc->sc_rxdmadesc[i].rxerror & GELIC_RXERRORS) { - if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); - goto requeue; - } - - m = sc->sc_rxsoft[i].rxs_mbuf; - if (sc->sc_rxdmadesc[i].data_stat & GELIC_RX_IPCSUM) { - m->m_pkthdr.csum_flags |= - CSUM_IP_CHECKED | CSUM_IP_VALID; - } - if (sc->sc_rxdmadesc[i].data_stat & GELIC_RX_TCPUDPCSUM) { - m->m_pkthdr.csum_flags |= - CSUM_DATA_VALID | CSUM_PSEUDO_HDR; - m->m_pkthdr.csum_data = 0xffff; - } - - if (glc_add_rxbuf(sc, i)) { - if_inc_counter(ifp, IFCOUNTER_IERRORS, 1); - goto requeue; - } - - if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1); - m->m_pkthdr.rcvif = ifp; - m->m_len = sc->sc_rxdmadesc[i].valid_size; - m->m_pkthdr.len = m->m_len; - - /* - * Remove VLAN tag. Even on early firmwares that do not allow - * multiple VLANs, the VLAN tag is still in place here. - */ - m_adj(m, 2); - - mtx_unlock(&sc->sc_mtx); - (*ifp->if_input)(ifp, m); - mtx_lock(&sc->sc_mtx); - - requeue: - glc_add_rxbuf_dma(sc, i); - } - - bus_dmamap_sync(sc->sc_dmadesc_tag, sc->sc_rxdmadesc_map, - BUS_DMASYNC_PREWRITE); - - if (restart_rxdma) { - error = lv1_net_start_rx_dma(sc->sc_bus, sc->sc_dev, - sc->sc_rxsoft[sc->sc_next_rxdma_slot].rxs_desc, 0); - if (error != 0) - device_printf(sc->sc_self, - "lv1_net_start_rx_dma error: %d\n", error); - } -} - -static void -glc_txintr(struct glc_softc *sc) -{ - struct ifnet *ifp = sc->sc_ifp; - struct glc_txsoft *txs; - int progress = 0, kickstart = 0, error; - - bus_dmamap_sync(sc->sc_dmadesc_tag, sc->sc_txdmadesc_map, - BUS_DMASYNC_POSTREAD); - - while ((txs = STAILQ_FIRST(&sc->sc_txdirtyq)) != NULL) { - if (sc->sc_txdmadesc[txs->txs_lastdesc].cmd_stat - & GELIC_DESCR_OWNED) - break; - - STAILQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs_q); - bus_dmamap_unload(sc->sc_txdma_tag, txs->txs_dmamap); - sc->bsy_txdma_slots -= txs->txs_ndescs; - - if (txs->txs_mbuf != NULL) { - m_freem(txs->txs_mbuf); - txs->txs_mbuf = NULL; - } - - if ((sc->sc_txdmadesc[txs->txs_lastdesc].cmd_stat & 0xf0000000) - != 0) { - lv1_net_stop_tx_dma(sc->sc_bus, sc->sc_dev, 0); - kickstart = 1; - if_inc_counter(ifp, IFCOUNTER_OERRORS, 1); - } - - if (sc->sc_txdmadesc[txs->txs_lastdesc].cmd_stat & - GELIC_CMDSTAT_CHAIN_END) - kickstart = 1; - - STAILQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q); - if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1); - progress = 1; - } - - if (txs != NULL) - sc->first_used_txdma_slot = txs->txs_firstdesc; - else - sc->first_used_txdma_slot = -1; - - if (kickstart || txs != NULL) { - /* Speculatively (or necessarily) start the TX queue again */ - error = lv1_net_start_tx_dma(sc->sc_bus, sc->sc_dev, - sc->sc_txdmadesc_phys + - ((txs == NULL) ? 0 : txs->txs_firstdesc)* - sizeof(struct glc_dmadesc), 0); - if (error != 0) - device_printf(sc->sc_self, - "lv1_net_start_tx_dma error: %d\n", error); - } - - if (progress) { - /* - * We freed some descriptors, so reset IFF_DRV_OACTIVE - * and restart. - */ - ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; - sc->sc_wdog_timer = STAILQ_EMPTY(&sc->sc_txdirtyq) ? 0 : 5; - - if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && - !IFQ_DRV_IS_EMPTY(&ifp->if_snd)) - glc_start_locked(ifp); - } -} - -static int -glc_intr_filter(void *xsc) -{ - struct glc_softc *sc = xsc; - - powerpc_sync(); - atomic_set_64(&sc->sc_interrupt_status, *sc->sc_hwirq_status); - return (FILTER_SCHEDULE_THREAD); -} - -static void -glc_intr(void *xsc) -{ - struct glc_softc *sc = xsc; - uint64_t status, linkstat, junk; - - mtx_lock(&sc->sc_mtx); - - status = atomic_readandclear_64(&sc->sc_interrupt_status); - - if (status == 0) { - mtx_unlock(&sc->sc_mtx); - return; - } - - if (status & (GELIC_INT_RXDONE | GELIC_INT_RXFRAME)) - glc_rxintr(sc); - - if (status & (GELIC_INT_TXDONE | GELIC_INT_TX_CHAIN_END)) - glc_txintr(sc); - - if (status & GELIC_INT_PHY) { - lv1_net_control(sc->sc_bus, sc->sc_dev, GELIC_GET_LINK_STATUS, - GELIC_VLAN_TX_ETHERNET, 0, 0, &linkstat, &junk); - - linkstat = (linkstat & GELIC_LINK_UP) ? - LINK_STATE_UP : LINK_STATE_DOWN; - if (linkstat != sc->sc_ifp->if_link_state) - if_link_state_change(sc->sc_ifp, linkstat); - } - - mtx_unlock(&sc->sc_mtx); -} - -static void -glc_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) -{ - struct glc_softc *sc = ifp->if_softc; - uint64_t status, junk; - - ifmr->ifm_status = IFM_AVALID; - ifmr->ifm_active = IFM_ETHER; - - lv1_net_control(sc->sc_bus, sc->sc_dev, GELIC_GET_LINK_STATUS, - GELIC_VLAN_TX_ETHERNET, 0, 0, &status, &junk); - - if (status & GELIC_LINK_UP) - ifmr->ifm_status |= IFM_ACTIVE; - - if (status & GELIC_SPEED_10) - ifmr->ifm_active |= IFM_10_T; - else if (status & GELIC_SPEED_100) - ifmr->ifm_active |= IFM_100_TX; - else if (status & GELIC_SPEED_1000) - ifmr->ifm_active |= IFM_1000_T; - - if (status & GELIC_FULL_DUPLEX) - ifmr->ifm_active |= IFM_FDX; - else - ifmr->ifm_active |= IFM_HDX; -} - -static int -glc_media_change(struct ifnet *ifp) -{ - struct glc_softc *sc = ifp->if_softc; - uint64_t mode, junk; - int result; - - if (IFM_TYPE(sc->sc_media.ifm_media) != IFM_ETHER) - return (EINVAL); - - switch (IFM_SUBTYPE(sc->sc_media.ifm_media)) { - case IFM_AUTO: - mode = GELIC_AUTO_NEG; - break; - case IFM_10_T: - mode = GELIC_SPEED_10; - break; - case IFM_100_TX: - mode = GELIC_SPEED_100; - break; - case IFM_1000_T: - mode = GELIC_SPEED_1000 | GELIC_FULL_DUPLEX; - break; - default: - return (EINVAL); - } - - if (IFM_OPTIONS(sc->sc_media.ifm_media) & IFM_FDX) - mode |= GELIC_FULL_DUPLEX; - - result = lv1_net_control(sc->sc_bus, sc->sc_dev, GELIC_SET_LINK_MODE, - GELIC_VLAN_TX_ETHERNET, mode, 0, &junk, &junk); - - return (result ? EIO : 0); -} diff --git a/sys/powerpc/ps3/if_glcreg.h b/sys/powerpc/ps3/if_glcreg.h deleted file mode 100644 index 911655da645..00000000000 --- a/sys/powerpc/ps3/if_glcreg.h +++ /dev/null @@ -1,159 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2010 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _POWERPC_PS3_IF_GLCREG_H -#define _POWERPC_PS3_IF_GLCREG_H - -#define GLC_MAX_TX_PACKETS 128 -#define GLC_MAX_RX_PACKETS 128 - -struct glc_dmadesc; - -/* - * software state for transmit job mbufs (may be elements of mbuf chains) - */ - -struct glc_txsoft { - struct mbuf *txs_mbuf; /* head of our mbuf chain */ - bus_dmamap_t txs_dmamap; /* our DMA map */ - int txs_firstdesc; /* first descriptor in packet */ - int txs_lastdesc; /* last descriptor in packet */ - - int txs_ndescs; /* number of descriptors */ - STAILQ_ENTRY(glc_txsoft) txs_q; -}; - -STAILQ_HEAD(glc_txsq, glc_txsoft); - -/* - * software state for receive jobs - */ -struct glc_rxsoft { - struct mbuf *rxs_mbuf; /* head of our mbuf chain */ - bus_dmamap_t rxs_dmamap; /* our DMA map */ - - int rxs_desc_slot; /* DMA descriptor for this packet */ - bus_addr_t rxs_desc; - - bus_dma_segment_t segment; -}; - -struct glc_softc { - struct ifnet *sc_ifp; - device_t sc_self; - struct mtx sc_mtx; - u_char sc_enaddr[ETHER_ADDR_LEN]; - int sc_tx_vlan, sc_rx_vlan; - int sc_ifpflags; - - uint64_t sc_dma_base[5]; - bus_dma_tag_t sc_dmadesc_tag; - - int sc_irqid; - struct resource *sc_irq; - void *sc_irqctx; - uint64_t *sc_hwirq_status; - volatile uint64_t sc_interrupt_status; - - struct ifmedia sc_media; - - /* Transmission */ - - bus_dma_tag_t sc_txdma_tag; - struct glc_txsoft sc_txsoft[GLC_MAX_TX_PACKETS]; - struct glc_dmadesc *sc_txdmadesc; - int next_txdma_slot, first_used_txdma_slot, bsy_txdma_slots; - bus_dmamap_t sc_txdmadesc_map; - bus_addr_t sc_txdmadesc_phys; - - struct glc_txsq sc_txfreeq; - struct glc_txsq sc_txdirtyq; - - /* Reception */ - - bus_dma_tag_t sc_rxdma_tag; - struct glc_rxsoft sc_rxsoft[GLC_MAX_RX_PACKETS]; - struct glc_dmadesc *sc_rxdmadesc; - int sc_next_rxdma_slot; - bus_dmamap_t sc_rxdmadesc_map; - bus_addr_t sc_rxdmadesc_phys; - - int sc_bus, sc_dev; - int sc_wdog_timer; - struct callout sc_tick_ch; -}; - -#define GELIC_GET_MAC_ADDRESS 0x0001 -#define GELIC_GET_LINK_STATUS 0x0002 -#define GELIC_SET_LINK_MODE 0x0003 -#define GELIC_LINK_UP 0x0001 -#define GELIC_FULL_DUPLEX 0x0002 -#define GELIC_AUTO_NEG 0x0004 -#define GELIC_SPEED_10 0x0010 -#define GELIC_SPEED_100 0x0020 -#define GELIC_SPEED_1000 0x0040 -#define GELIC_GET_VLAN_ID 0x0004 -#define GELIC_VLAN_TX_ETHERNET 0x0002 -#define GELIC_VLAN_RX_ETHERNET 0x0012 -#define GELIC_VLAN_TX_WIRELESS 0x0003 -#define GELIC_VLAN_RX_WIRELESS 0x0013 - -/* Command status code */ -#define GELIC_DESCR_OWNED 0xa0000000 -#define GELIC_CMDSTAT_DMA_DONE 0x00000000 -#define GELIC_CMDSTAT_CHAIN_END 0x00000002 -#define GELIC_CMDSTAT_CSUM_TCP 0x00020000 -#define GELIC_CMDSTAT_CSUM_UDP 0x00030000 -#define GELIC_CMDSTAT_NOIPSEC 0x00080000 -#define GELIC_CMDSTAT_LAST 0x00040000 -#define GELIC_RXERRORS 0x7def8000 - -/* RX Data Status codes */ -#define GELIC_RX_IPCSUM 0x20000000 -#define GELIC_RX_TCPUDPCSUM 0x10000000 - -/* Interrupt options */ -#define GELIC_INT_RXDONE 0x0000000000004000UL -#define GELIC_INT_RXFRAME 0x1000000000000000UL -#define GELIC_INT_TXDONE 0x0080000000000000UL -#define GELIC_INT_TX_CHAIN_END 0x0100000000000000UL -#define GELIC_INT_PHY 0x0000000020000000UL - -/* Hardware DMA descriptor. Must be 32-byte aligned */ - -struct glc_dmadesc { - uint32_t paddr; /* Must be 128 byte aligned for receive */ - uint32_t len; - uint32_t next; - uint32_t cmd_stat; - uint32_t result_size; - uint32_t valid_size; - uint32_t data_stat; - uint32_t rxerror; -}; - -#endif /* _POWERPC_PS3_IF_GLCREG_H */ diff --git a/sys/powerpc/ps3/mmu_ps3.c b/sys/powerpc/ps3/mmu_ps3.c deleted file mode 100644 index 76553388c31..00000000000 --- a/sys/powerpc/ps3/mmu_ps3.c +++ /dev/null @@ -1,288 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2010 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include "ps3-hvcall.h" - -#define VSID_HASH_MASK 0x0000007fffffffffUL -#define PTESYNC() __asm __volatile("ptesync") - -extern int ps3fb_remap(void); - -static uint64_t mps3_vas_id; - -/* - * Kernel MMU interface - */ - -static void mps3_install(void); -static void mps3_bootstrap(vm_offset_t kernelstart, - vm_offset_t kernelend); -static void mps3_cpu_bootstrap(int ap); -static int64_t mps3_pte_synch(struct pvo_entry *); -static int64_t mps3_pte_clear(struct pvo_entry *, uint64_t ptebit); -static int64_t mps3_pte_unset(struct pvo_entry *); -static int64_t mps3_pte_insert(struct pvo_entry *); - -static struct pmap_funcs mps3_methods = { - .install = mps3_install, - .bootstrap = mps3_bootstrap, - .cpu_bootstrap = mps3_cpu_bootstrap, -}; - -static struct moea64_funcs mps3_funcs = { - .pte_synch = mps3_pte_synch, - .pte_clear = mps3_pte_clear, - .pte_unset = mps3_pte_unset, - .pte_insert = mps3_pte_insert, -}; - -MMU_DEF_INHERIT(ps3_mmu, "mmu_ps3", mps3_methods, oea64_mmu); - -static struct mtx mps3_table_lock; - -static void -mps3_install() -{ - moea64_ops = &mps3_funcs; -} - -static void -mps3_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) -{ - uint64_t final_pteg_count; - - mtx_init(&mps3_table_lock, "page table", NULL, MTX_DEF); - - moea64_early_bootstrap(kernelstart, kernelend); - - /* In case we had a page table already */ - lv1_destruct_virtual_address_space(0); - - /* Allocate new hardware page table */ - lv1_construct_virtual_address_space( - 20 /* log_2(moea64_pteg_count) */, 2 /* n page sizes */, - (24UL << 56) | (16UL << 48) /* page sizes 16 MB + 64 KB */, - &mps3_vas_id, &final_pteg_count - ); - - lv1_select_virtual_address_space(mps3_vas_id); - - moea64_pteg_count = final_pteg_count / sizeof(struct lpteg); - - moea64_mid_bootstrap(kernelstart, kernelend); - moea64_late_bootstrap(kernelstart, kernelend); -} - -static void -mps3_cpu_bootstrap(int ap) -{ - struct slb *slb = PCPU_GET(aim.slb); - register_t seg0; - int i; - - mtmsr(mfmsr() & ~PSL_DR & ~PSL_IR); - - /* - * Select the page table we configured above and set up the FB mapping - * so we can have a console. - */ - lv1_select_virtual_address_space(mps3_vas_id); - - if (!ap) - ps3fb_remap(); - - /* - * Install kernel SLB entries - */ - - __asm __volatile ("slbia"); - __asm __volatile ("slbmfee %0,%1; slbie %0;" : "=r"(seg0) : "r"(0)); - for (i = 0; i < 64; i++) { - if (!(slb[i].slbe & SLBE_VALID)) - continue; - - __asm __volatile ("slbmte %0, %1" :: - "r"(slb[i].slbv), "r"(slb[i].slbe)); - } -} - -static int64_t -mps3_pte_synch_locked(struct pvo_entry *pvo) -{ - uint64_t halfbucket[4], rcbits; - - PTESYNC(); - lv1_read_htab_entries(mps3_vas_id, pvo->pvo_pte.slot & ~0x3UL, - &halfbucket[0], &halfbucket[1], &halfbucket[2], &halfbucket[3], - &rcbits); - - /* Check if present in page table */ - if ((halfbucket[pvo->pvo_pte.slot & 0x3] & LPTE_AVPN_MASK) != - ((pvo->pvo_vpn >> (ADDR_API_SHFT64 - ADDR_PIDX_SHFT)) & - LPTE_AVPN_MASK)) - return (-1); - if (!(halfbucket[pvo->pvo_pte.slot & 0x3] & LPTE_VALID)) - return (-1); - - /* - * rcbits contains the low 12 bits of each PTE's 2nd part, - * spaced at 16-bit intervals - */ - - return ((rcbits >> ((3 - (pvo->pvo_pte.slot & 0x3))*16)) & - (LPTE_CHG | LPTE_REF)); -} - -static int64_t -mps3_pte_synch(struct pvo_entry *pvo) -{ - int64_t retval; - - mtx_lock(&mps3_table_lock); - retval = mps3_pte_synch_locked(pvo); - mtx_unlock(&mps3_table_lock); - - return (retval); -} - -static int64_t -mps3_pte_clear(struct pvo_entry *pvo, uint64_t ptebit) -{ - int64_t refchg; - struct lpte pte; - - mtx_lock(&mps3_table_lock); - - refchg = mps3_pte_synch_locked(pvo); - if (refchg < 0) { - mtx_unlock(&mps3_table_lock); - return (refchg); - } - - moea64_pte_from_pvo(pvo, &pte); - - pte.pte_lo |= refchg; - pte.pte_lo &= ~ptebit; - /* XXX: race on RC bits between write and sync. Anything to do? */ - lv1_write_htab_entry(mps3_vas_id, pvo->pvo_pte.slot, pte.pte_hi, - pte.pte_lo); - mtx_unlock(&mps3_table_lock); - - return (refchg); -} - -static int64_t -mps3_pte_unset(struct pvo_entry *pvo) -{ - int64_t refchg; - - mtx_lock(&mps3_table_lock); - refchg = mps3_pte_synch_locked(pvo); - if (refchg < 0) { - STAT_MOEA64(moea64_pte_overflow--); - mtx_unlock(&mps3_table_lock); - return (-1); - } - /* XXX: race on RC bits between unset and sync. Anything to do? */ - lv1_write_htab_entry(mps3_vas_id, pvo->pvo_pte.slot, 0, 0); - mtx_unlock(&mps3_table_lock); - STAT_MOEA64(moea64_pte_valid--); - - return (refchg & (LPTE_REF | LPTE_CHG)); -} - -static int64_t -mps3_pte_insert(struct pvo_entry *pvo) -{ - int result; - struct lpte pte, evicted; - uint64_t index; - - if (pvo->pvo_vaddr & PVO_HID) { - /* Hypercall needs primary PTEG */ - pvo->pvo_vaddr &= ~PVO_HID; - pvo->pvo_pte.slot ^= (moea64_pteg_mask << 3); - } - - pvo->pvo_pte.slot &= ~7UL; - moea64_pte_from_pvo(pvo, &pte); - evicted.pte_hi = 0; - PTESYNC(); - mtx_lock(&mps3_table_lock); - result = lv1_insert_htab_entry(mps3_vas_id, pvo->pvo_pte.slot, - pte.pte_hi, pte.pte_lo, LPTE_LOCKED | LPTE_WIRED, 0, - &index, &evicted.pte_hi, &evicted.pte_lo); - mtx_unlock(&mps3_table_lock); - - if (result != 0) { - /* No freeable slots in either PTEG? We're hosed. */ - panic("mps3_pte_insert: overflow (%d)", result); - return (-1); - } - - /* - * See where we ended up. - */ - if ((index & ~7UL) != pvo->pvo_pte.slot) - pvo->pvo_vaddr |= PVO_HID; - pvo->pvo_pte.slot = index; - - STAT_MOEA64(moea64_pte_valid++); - - if (evicted.pte_hi) { - KASSERT((evicted.pte_hi & (LPTE_WIRED | LPTE_LOCKED)) == 0, - ("Evicted a wired PTE")); - STAT_MOEA64(moea64_pte_valid--); - STAT_MOEA64(moea64_pte_overflow++); - } - - return (0); -} diff --git a/sys/powerpc/ps3/ohci_ps3.c b/sys/powerpc/ps3/ohci_ps3.c deleted file mode 100644 index aedc07bba97..00000000000 --- a/sys/powerpc/ps3/ohci_ps3.c +++ /dev/null @@ -1,169 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2010 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "ps3bus.h" - -static int -ohci_ps3_probe(device_t dev) -{ - if (ps3bus_get_bustype(dev) != PS3_BUSTYPE_SYSBUS || - ps3bus_get_devtype(dev) != PS3_DEVTYPE_USB) - return (ENXIO); - - device_set_desc(dev, "Playstation 3 USB 2.0 controller"); - return (BUS_PROBE_SPECIFIC); -} - -static int -ohci_ps3_attach(device_t dev) -{ - ohci_softc_t *sc = device_get_softc(dev); - int rid, err; - - sc->sc_bus.parent = dev; - sc->sc_bus.devices = sc->sc_devices; - sc->sc_bus.devices_max = OHCI_MAX_DEVICES; - sc->sc_bus.dma_bits = 32; - - /* get all DMA memory */ - if (usb_bus_mem_alloc_all(&sc->sc_bus, - USB_GET_DMA_TAG(dev), &ohci_iterate_hw_softc)) - return (ENOMEM); - - rid = 0; - sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &rid, RF_ACTIVE); - - if (!sc->sc_io_res) { - device_printf(dev, "Could not map memory\n"); - goto error; - } - - sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); - sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); - sc->sc_io_size = rman_get_size(sc->sc_io_res); - - rid = 0; - sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE); - - if (sc->sc_irq_res == NULL) { - device_printf(dev, "Could not allocate irq\n"); - return (ENXIO); - } - - sc->sc_bus.bdev = device_add_child(dev, "usbus", -1); - if (!sc->sc_bus.bdev) { - device_printf(dev, "Could not add USB device\n"); - return (ENXIO); - } - - device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); - - sprintf(sc->sc_vendor, "Sony"); - - err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, - NULL, (driver_intr_t *)ohci_interrupt, sc, &sc->sc_intr_hdl); - if (err) { - device_printf(dev, "Could not setup error irq, %d\n", err); - goto error; - } - - //sc->sc_flags |= EHCI_SCFLG_BIGEMMIO; - bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, - OHCI_CONTROL, 0); - err = ohci_init(sc); - if (err) { - device_printf(dev, "USB init failed err=%d\n", err); - goto error; - } - - err = device_probe_and_attach(sc->sc_bus.bdev); - if (err == 0) - return (0); - -error: - return (ENXIO); -} - -static device_method_t ohci_ps3_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ohci_ps3_probe), - DEVMETHOD(device_attach, ohci_ps3_attach), - DEVMETHOD(device_resume, bus_generic_resume), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - - DEVMETHOD_END -}; - -static driver_t ohci_ps3_driver = { - .name = "ohci", - .methods = ohci_ps3_methods, - .size = sizeof(ohci_softc_t), -}; - -static devclass_t ohci_ps3_devclass; - -DRIVER_MODULE(ohci_ps3, ps3bus, ohci_ps3_driver, ohci_ps3_devclass, 0, 0); -MODULE_DEPEND(ohci_ps3, usb, 1, 1, 1); diff --git a/sys/powerpc/ps3/platform_ps3.c b/sys/powerpc/ps3/platform_ps3.c deleted file mode 100644 index dd2a101b3b9..00000000000 --- a/sys/powerpc/ps3/platform_ps3.c +++ /dev/null @@ -1,291 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2010 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include "platform_if.h" -#include "ps3-hvcall.h" - -#ifdef SMP -extern void *ap_pcpu; -#endif - -static int ps3_probe(platform_t); -static int ps3_attach(platform_t); -static void ps3_mem_regions(platform_t, struct mem_region *phys, int *physsz, - struct mem_region *avail, int *availsz); -static vm_offset_t ps3_real_maxaddr(platform_t); -static u_long ps3_timebase_freq(platform_t, struct cpuref *cpuref); -#ifdef SMP -static int ps3_smp_first_cpu(platform_t, struct cpuref *cpuref); -static int ps3_smp_next_cpu(platform_t, struct cpuref *cpuref); -static int ps3_smp_get_bsp(platform_t, struct cpuref *cpuref); -static int ps3_smp_start_cpu(platform_t, struct pcpu *cpu); -static void ps3_smp_probe_threads(platform_t); -static struct cpu_group *ps3_smp_topo(platform_t); -#endif -static void ps3_reset(platform_t); -static void ps3_cpu_idle(sbintime_t); - -static platform_method_t ps3_methods[] = { - PLATFORMMETHOD(platform_probe, ps3_probe), - PLATFORMMETHOD(platform_attach, ps3_attach), - PLATFORMMETHOD(platform_mem_regions, ps3_mem_regions), - PLATFORMMETHOD(platform_real_maxaddr, ps3_real_maxaddr), - PLATFORMMETHOD(platform_timebase_freq, ps3_timebase_freq), - -#ifdef SMP - PLATFORMMETHOD(platform_smp_first_cpu, ps3_smp_first_cpu), - PLATFORMMETHOD(platform_smp_next_cpu, ps3_smp_next_cpu), - PLATFORMMETHOD(platform_smp_get_bsp, ps3_smp_get_bsp), - PLATFORMMETHOD(platform_smp_start_cpu, ps3_smp_start_cpu), - PLATFORMMETHOD(platform_smp_probe_threads, ps3_smp_probe_threads), - PLATFORMMETHOD(platform_smp_topo, ps3_smp_topo), -#endif - - PLATFORMMETHOD(platform_reset, ps3_reset), - - PLATFORMMETHOD_END -}; - -static platform_def_t ps3_platform = { - "ps3", - ps3_methods, - 0 -}; - -PLATFORM_DEF(ps3_platform); - -static int ps3_boot_pir = 0; - -static int -ps3_probe(platform_t plat) -{ - phandle_t root; - char compatible[64]; - - root = OF_finddevice("/"); - if (OF_getprop(root, "compatible", compatible, sizeof(compatible)) <= 0) - return (BUS_PROBE_NOWILDCARD); - - if (strncmp(compatible, "sony,ps3", sizeof(compatible)) != 0) - return (BUS_PROBE_NOWILDCARD); - - return (BUS_PROBE_SPECIFIC); -} - -static int -ps3_attach(platform_t plat) -{ - - pmap_mmu_install("mmu_ps3", BUS_PROBE_SPECIFIC); - cpu_idle_hook = ps3_cpu_idle; - - /* Record our PIR at boot for later */ - ps3_boot_pir = mfspr(SPR_PIR); - - return (0); -} - -void -ps3_mem_regions(platform_t plat, struct mem_region *phys, int *physsz, - struct mem_region *avail_regions, int *availsz) -{ - uint64_t lpar_id, junk; - int i; - - /* Prefer device tree information if available */ - if (OF_finddevice("/") != -1) { - ofw_mem_regions(phys, physsz, avail_regions, availsz); - } else { - /* Real mode memory region is first segment */ - phys[0].mr_start = 0; - phys[0].mr_size = ps3_real_maxaddr(plat); - *physsz = *availsz = 1; - avail_regions[0] = phys[0]; - } - - /* Now get extended memory region */ - lv1_get_logical_partition_id(&lpar_id); - lv1_get_repository_node_value(lpar_id, - lv1_repository_string("bi") >> 32, - lv1_repository_string("rgntotal"), 0, 0, - &phys[*physsz].mr_size, &junk); - for (i = 0; i < *physsz; i++) - phys[*physsz].mr_size -= phys[i].mr_size; - - /* Convert to maximum amount we can allocate in 16 MB pages */ - phys[*physsz].mr_size -= phys[*physsz].mr_size % (16*1024*1024); - - /* Allocate extended memory region */ - lv1_allocate_memory(phys[*physsz].mr_size, 24 /* 16 MB pages */, - 0, 0x04 /* any address */, &phys[*physsz].mr_start, &junk); - avail_regions[*availsz] = phys[*physsz]; - (*physsz)++; - (*availsz)++; -} - -static u_long -ps3_timebase_freq(platform_t plat, struct cpuref *cpuref) -{ - uint64_t ticks, node_id, junk; - - lv1_get_repository_node_value(PS3_LPAR_ID_PME, - lv1_repository_string("be") >> 32, 0, 0, 0, &node_id, &junk); - lv1_get_repository_node_value(PS3_LPAR_ID_PME, - lv1_repository_string("be") >> 32, node_id, - lv1_repository_string("clock"), 0, &ticks, &junk); - - return (ticks); -} - -#ifdef SMP -static int -ps3_smp_first_cpu(platform_t plat, struct cpuref *cpuref) -{ - - cpuref->cr_cpuid = 0; - cpuref->cr_hwref = ps3_boot_pir; - - return (0); -} - -static int -ps3_smp_next_cpu(platform_t plat, struct cpuref *cpuref) -{ - - if (cpuref->cr_cpuid >= 1) - return (ENOENT); - - cpuref->cr_cpuid++; - cpuref->cr_hwref = !ps3_boot_pir; - - return (0); -} - -static int -ps3_smp_get_bsp(platform_t plat, struct cpuref *cpuref) -{ - - cpuref->cr_cpuid = 0; - cpuref->cr_hwref = ps3_boot_pir; - - return (0); -} - -static int -ps3_smp_start_cpu(platform_t plat, struct pcpu *pc) -{ - /* kernel is spinning on 0x40 == -1 right now */ - volatile uint32_t *secondary_spin_sem = - (uint32_t *)PHYS_TO_DMAP((uintptr_t)0x40); - int remote_pir = pc->pc_hwref; - int timeout; - - ap_pcpu = pc; - - /* Try both PIR values, looping a few times: the HV likes moving us */ - timeout = 10000; - while (!pc->pc_awake && timeout--) { - *secondary_spin_sem = remote_pir; - powerpc_sync(); - DELAY(100); - remote_pir = !remote_pir; - } - - return ((pc->pc_awake) ? 0 : EBUSY); -} - -static void -ps3_smp_probe_threads(platform_t plat) -{ - mp_ncores = 1; - smp_threads_per_core = 2; -} - -static struct cpu_group * -ps3_smp_topo(platform_t plat) -{ - return (smp_topo_1level(CG_SHARE_L1, 2, CG_FLAG_SMT)); -} -#endif - -static void -ps3_reset(platform_t plat) -{ - lv1_panic(1); -} - -static vm_offset_t -ps3_real_maxaddr(platform_t plat) -{ - uint64_t lpar_id, junk, ppe_id; - static uint64_t rm_maxaddr = 0; - - if (rm_maxaddr == 0) { - /* Get real mode memory region */ - lv1_get_logical_partition_id(&lpar_id); - lv1_get_logical_ppe_id(&ppe_id); - - lv1_get_repository_node_value(lpar_id, - lv1_repository_string("bi") >> 32, - lv1_repository_string("pu"), - ppe_id, lv1_repository_string("rm_size"), - &rm_maxaddr, &junk); - } - - return (rm_maxaddr); -} - -static void -ps3_cpu_idle(sbintime_t sbt) -{ - lv1_pause(0); -} diff --git a/sys/powerpc/ps3/ps3-hv-asm.awk b/sys/powerpc/ps3/ps3-hv-asm.awk deleted file mode 100644 index 91e114ba8e7..00000000000 --- a/sys/powerpc/ps3/ps3-hv-asm.awk +++ /dev/null @@ -1,50 +0,0 @@ -# This script generates the PS3 hypervisor call stubs from an HV -# interface definition file. The PS3 HV calling convention is very -# similar to the PAPR one, except that the function token is passed in -# r11 instead of r3. -# -# Invoke like so: awk -f ps3-hv-asm.awk < ps3-hvcall.master > ps3-hvcall.S -# - -BEGIN { - printf("#include \n\n"); - printf("#define hc .long 0x44000022\n\n"); -} - -/HVCALL.*/ { - code = $2; - ins = split($4, a, ",") - outs = split($5, a, ",") - - printf("ASENTRY(%s)\n",$3); - printf("\tmflr %%r0\n"); - printf("\tstd %%r0,16(%%r1)\n"); - printf("\tstdu %%r1,-%d(%%r1)\n", 48+8*outs); - - if ($4 == "UNUSED") - ins = 0 - - # Save output reg addresses to the stack - for (i = 0; i < outs; i++) { - if (ins+i >= 8) { - printf("\tld %%r11,%d(%%r1)\n", 48+8*outs + 48 + 8*(i+ins)); - printf("\tstd %%r11,%d(%%r1)\n", 48+8*i); - } else { - printf("\tstd %%r%d,%d(%%r1)\n", 3+ins+i, 48+8*i); - } - } - - printf("\tli %%r11,%d\n", code); - printf("\thc\n"); - printf("\textsw %%r3,%%r3\n"); - - for (i = 0; i < outs; i++) { - printf("\tld %%r11,%d(%%r1)\n", 48+8*i); - printf("\tstd %%r%d,0(%%r11)\n", 4+i); - } - - printf("\tld %%r1,0(%%r1)\n"); - printf("\tld %%r0,16(%%r1)\n"); - printf("\tmtlr %%r0\n"); - printf("\tblr\n\n"); -} diff --git a/sys/powerpc/ps3/ps3-hv-header.awk b/sys/powerpc/ps3/ps3-hv-header.awk deleted file mode 100644 index d7de9ed665a..00000000000 --- a/sys/powerpc/ps3/ps3-hv-header.awk +++ /dev/null @@ -1,40 +0,0 @@ -# This script generates the PS3 hypervisor call header from a hypervisor -# interface definition file. All lines that do not begin with HVCALL -# or a bare # for comments are copied to the output header so that -# enums, constant, C comments and the like can be passed through into the -# header. -# -# Invoke like so: awk -f ps3-hv-header.awk < ps3-hvcall.master > ps3-hv.h -# - -!/HVCALL.*/ && (!/#.*/ || /#define.*/ || /#include.*/) { - print($0); -} - -/HVCALL.*/ { - split($5, outs, ",") - if ($4 == "UNUSED") - split("", ins, ",") - else - split($4, ins, ",") - - printf("int %s(",$3); - for (i = 1; i <= length(ins); i++) { - printf("uint64_t %s", ins[i]); - if (i < length(ins)) printf(", "); - } - - if (length(outs) > 0 && length(ins) > 0) - printf(", "); - - for (i = 1; i <= length(outs); i++) { - printf("uint64_t *%s", outs[i]); - if (i < length(outs)) printf(", "); - } - - if (length(outs) == 0 && length(ins) == 0) - printf("void"); - - printf(");\n"); -} - diff --git a/sys/powerpc/ps3/ps3-hvcall.S b/sys/powerpc/ps3/ps3-hvcall.S deleted file mode 100644 index 99e503e2dcf..00000000000 --- a/sys/powerpc/ps3/ps3-hvcall.S +++ /dev/null @@ -1,1366 +0,0 @@ - -#include - -#define hc .long 0x44000022 - -ASENTRY(lv1_allocate_memory) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-64(%r1) - std %r7,48(%r1) - std %r8,56(%r1) - li %r11,0 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r11,56(%r1) - std %r5,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_allocate_memory) - -ASENTRY(lv1_write_htab_entry) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,1 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_write_htab_entry) - -ASENTRY(lv1_construct_virtual_address_space) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-64(%r1) - std %r6,48(%r1) - std %r7,56(%r1) - li %r11,2 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r11,56(%r1) - std %r5,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_construct_virtual_address_space) - -ASENTRY(lv1_get_virtual_address_space_id_of_ppe) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r4,48(%r1) - li %r11,4 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_get_virtual_address_space_id_of_ppe) - -ASENTRY(lv1_query_logical_partition_address_region_info) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-88(%r1) - std %r4,48(%r1) - std %r5,56(%r1) - std %r6,64(%r1) - std %r7,72(%r1) - std %r8,80(%r1) - li %r11,6 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r11,56(%r1) - std %r5,0(%r11) - ld %r11,64(%r1) - std %r6,0(%r11) - ld %r11,72(%r1) - std %r7,0(%r11) - ld %r11,80(%r1) - std %r8,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_query_logical_partition_address_region_info) - -ASENTRY(lv1_select_virtual_address_space) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,7 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_select_virtual_address_space) - -ASENTRY(lv1_pause) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,9 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_pause) - -ASENTRY(lv1_destruct_virtual_address_space) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,10 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_destruct_virtual_address_space) - -ASENTRY(lv1_configure_irq_state_bitmap) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,11 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_configure_irq_state_bitmap) - -ASENTRY(lv1_connect_irq_plug_ext) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,12 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_connect_irq_plug_ext) - -ASENTRY(lv1_release_memory) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,13 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_release_memory) - -ASENTRY(lv1_put_iopte) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,15 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_put_iopte) - -ASENTRY(lv1_disconnect_irq_plug_ext) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,17 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_disconnect_irq_plug_ext) - -ASENTRY(lv1_construct_event_receive_port) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r3,48(%r1) - li %r11,18 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_construct_event_receive_port) - -ASENTRY(lv1_destruct_event_receive_port) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,19 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_destruct_event_receive_port) - -ASENTRY(lv1_send_event_locally) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,24 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_send_event_locally) - -ASENTRY(lv1_end_of_interrupt) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,27 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_end_of_interrupt) - -ASENTRY(lv1_connect_irq_plug) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,28 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_connect_irq_plug) - -ASENTRY(lv1_disconnect_irq_plus) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,29 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_disconnect_irq_plus) - -ASENTRY(lv1_end_of_interrupt_ext) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,30 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_end_of_interrupt_ext) - -ASENTRY(lv1_did_update_interrupt_mask) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,31 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_did_update_interrupt_mask) - -ASENTRY(lv1_shutdown_logical_partition) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,44 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_shutdown_logical_partition) - -ASENTRY(lv1_destruct_logical_spe) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,54 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_destruct_logical_spe) - -ASENTRY(lv1_construct_logical_spe) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-96(%r1) - std %r10,48(%r1) - ld %r11,208(%r1) - std %r11,56(%r1) - ld %r11,216(%r1) - std %r11,64(%r1) - ld %r11,224(%r1) - std %r11,72(%r1) - ld %r11,232(%r1) - std %r11,80(%r1) - ld %r11,240(%r1) - std %r11,88(%r1) - li %r11,57 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r11,56(%r1) - std %r5,0(%r11) - ld %r11,64(%r1) - std %r6,0(%r11) - ld %r11,72(%r1) - std %r7,0(%r11) - ld %r11,80(%r1) - std %r8,0(%r11) - ld %r11,88(%r1) - std %r9,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_construct_logical_spe) - -ASENTRY(lv1_set_spe_interrupt_mask) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,61 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_set_spe_interrupt_mask) - -ASENTRY(lv1_disable_logical_spe) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,65 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_disable_logical_spe) - -ASENTRY(lv1_clear_spe_interrupt_status) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,66 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_clear_spe_interrupt_status) - -ASENTRY(lv1_get_spe_interrupt_status) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r5,48(%r1) - li %r11,67 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_get_spe_interrupt_status) - -ASENTRY(lv1_get_logical_ppe_id) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r3,48(%r1) - li %r11,69 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_get_logical_ppe_id) - -ASENTRY(lv1_get_logical_partition_id) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r3,48(%r1) - li %r11,74 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_get_logical_partition_id) - -ASENTRY(lv1_get_spe_irq_outlet) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r5,48(%r1) - li %r11,78 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_get_spe_irq_outlet) - -ASENTRY(lv1_set_spe_privilege_state_area_1_register) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,79 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_set_spe_privilege_state_area_1_register) - -ASENTRY(lv1_get_repository_node_value) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-64(%r1) - std %r8,48(%r1) - std %r9,56(%r1) - li %r11,91 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r11,56(%r1) - std %r5,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_get_repository_node_value) - -ASENTRY(lv1_read_htab_entries) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-88(%r1) - std %r5,48(%r1) - std %r6,56(%r1) - std %r7,64(%r1) - std %r8,72(%r1) - std %r9,80(%r1) - li %r11,95 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r11,56(%r1) - std %r5,0(%r11) - ld %r11,64(%r1) - std %r6,0(%r11) - ld %r11,72(%r1) - std %r7,0(%r11) - ld %r11,80(%r1) - std %r8,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_read_htab_entries) - -ASENTRY(lv1_set_dabr) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,96 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_set_dabr) - -ASENTRY(lv1_allocate_io_segment) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r6,48(%r1) - li %r11,116 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_allocate_io_segment) - -ASENTRY(lv1_release_io_segment) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,117 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_release_io_segment) - -ASENTRY(lv1_construct_io_irq_outlet) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r4,48(%r1) - li %r11,120 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_construct_io_irq_outlet) - -ASENTRY(lv1_destruct_io_irq_outlet) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,121 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_destruct_io_irq_outlet) - -ASENTRY(lv1_map_htab) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r4,48(%r1) - li %r11,122 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_map_htab) - -ASENTRY(lv1_unmap_htab) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,123 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_unmap_htab) - -ASENTRY(lv1_get_version_info) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r3,48(%r1) - li %r11,127 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_get_version_info) - -ASENTRY(lv1_insert_htab_entry) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-72(%r1) - std %r9,48(%r1) - std %r10,56(%r1) - ld %r11,184(%r1) - std %r11,64(%r1) - li %r11,158 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r11,56(%r1) - std %r5,0(%r11) - ld %r11,64(%r1) - std %r6,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_insert_htab_entry) - -ASENTRY(lv1_read_virtual_uart) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r6,48(%r1) - li %r11,162 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_read_virtual_uart) - -ASENTRY(lv1_write_virtual_uart) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r6,48(%r1) - li %r11,163 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_write_virtual_uart) - -ASENTRY(lv1_set_virtual_uart_param) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,164 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_set_virtual_uart_param) - -ASENTRY(lv1_get_virtual_uart_param) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r5,48(%r1) - li %r11,165 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_get_virtual_uart_param) - -ASENTRY(lv1_configure_virtual_uart) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r4,48(%r1) - li %r11,166 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_configure_virtual_uart) - -ASENTRY(lv1_open_device) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,170 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_open_device) - -ASENTRY(lv1_close_device) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,171 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_close_device) - -ASENTRY(lv1_map_device_mmio_region) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r8,48(%r1) - li %r11,172 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_map_device_mmio_region) - -ASENTRY(lv1_unmap_device_mmio_region) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,173 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_unmap_device_mmio_region) - -ASENTRY(lv1_allocate_device_dma_region) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r8,48(%r1) - li %r11,174 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_allocate_device_dma_region) - -ASENTRY(lv1_free_device_dma_region) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,175 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_free_device_dma_region) - -ASENTRY(lv1_map_device_dma_region) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,176 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_map_device_dma_region) - -ASENTRY(lv1_unmap_device_dma_region) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,177 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_unmap_device_dma_region) - -ASENTRY(lv1_read_pci_config) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r9,48(%r1) - li %r11,178 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_read_pci_config) - -ASENTRY(lv1_write_pci_config) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,179 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_write_pci_config) - -ASENTRY(lv1_net_add_multicast_address) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,185 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_net_add_multicast_address) - -ASENTRY(lv1_net_remove_multicast_address) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,186 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_net_remove_multicast_address) - -ASENTRY(lv1_net_start_tx_dma) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,187 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_net_start_tx_dma) - -ASENTRY(lv1_net_stop_tx_dma) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,188 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_net_stop_tx_dma) - -ASENTRY(lv1_net_start_rx_dma) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,189 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_net_start_rx_dma) - -ASENTRY(lv1_net_stop_rx_dma) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,190 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_net_stop_rx_dma) - -ASENTRY(lv1_net_set_interrupt_status_indicator) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,191 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_net_set_interrupt_status_indicator) - -ASENTRY(lv1_net_set_interrupt_mask) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,193 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_net_set_interrupt_mask) - -ASENTRY(lv1_net_control) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-64(%r1) - std %r9,48(%r1) - std %r10,56(%r1) - li %r11,194 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r11,56(%r1) - std %r5,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_net_control) - -ASENTRY(lv1_connect_interrupt_event_receive_port) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,197 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_connect_interrupt_event_receive_port) - -ASENTRY(lv1_disconnect_interrupt_event_receive_port) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,198 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_disconnect_interrupt_event_receive_port) - -ASENTRY(lv1_deconfigure_virtual_uart_irq) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,202 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_deconfigure_virtual_uart_irq) - -ASENTRY(lv1_enable_logical_spe) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,207 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_enable_logical_spe) - -ASENTRY(lv1_gpu_open) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,210 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_gpu_open) - -ASENTRY(lv1_gpu_close) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,211 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_gpu_close) - -ASENTRY(lv1_gpu_device_map) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-64(%r1) - std %r4,48(%r1) - std %r5,56(%r1) - li %r11,212 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r11,56(%r1) - std %r5,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_gpu_device_map) - -ASENTRY(lv1_gpu_device_unmap) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,213 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_gpu_device_unmap) - -ASENTRY(lv1_gpu_memory_allocate) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-64(%r1) - std %r8,48(%r1) - std %r9,56(%r1) - li %r11,214 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r11,56(%r1) - std %r5,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_gpu_memory_allocate) - -ASENTRY(lv1_gpu_memory_free) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,216 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_gpu_memory_free) - -ASENTRY(lv1_gpu_context_allocate) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-88(%r1) - std %r5,48(%r1) - std %r6,56(%r1) - std %r7,64(%r1) - std %r8,72(%r1) - std %r9,80(%r1) - li %r11,217 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r11,56(%r1) - std %r5,0(%r11) - ld %r11,64(%r1) - std %r6,0(%r11) - ld %r11,72(%r1) - std %r7,0(%r11) - ld %r11,80(%r1) - std %r8,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_gpu_context_allocate) - -ASENTRY(lv1_gpu_context_free) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,218 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_gpu_context_free) - -ASENTRY(lv1_gpu_context_iomap) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,221 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_gpu_context_iomap) - -ASENTRY(lv1_gpu_context_attribute) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,225 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_gpu_context_attribute) - -ASENTRY(lv1_gpu_context_intr) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r4,48(%r1) - li %r11,227 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_gpu_context_intr) - -ASENTRY(lv1_gpu_attribute) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,228 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_gpu_attribute) - -ASENTRY(lv1_get_rtc) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-64(%r1) - std %r3,48(%r1) - std %r4,56(%r1) - li %r11,232 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r11,56(%r1) - std %r5,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_get_rtc) - -ASENTRY(lv1_storage_read) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r9,48(%r1) - li %r11,245 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_storage_read) - -ASENTRY(lv1_storage_write) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r9,48(%r1) - li %r11,246 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_storage_write) - -ASENTRY(lv1_storage_send_device_command) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r9,48(%r1) - li %r11,248 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_storage_send_device_command) - -ASENTRY(lv1_storage_get_async_status) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-64(%r1) - std %r4,48(%r1) - std %r5,56(%r1) - li %r11,249 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r11,56(%r1) - std %r5,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_storage_get_async_status) - -ASENTRY(lv1_storage_check_async_status) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-56(%r1) - std %r5,48(%r1) - li %r11,254 - hc - extsw %r3,%r3 - ld %r11,48(%r1) - std %r4,0(%r11) - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_storage_check_async_status) - -ASENTRY(lv1_panic) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - li %r11,255 - hc - extsw %r3,%r3 - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -ASEND(lv1_panic) diff --git a/sys/powerpc/ps3/ps3-hvcall.h b/sys/powerpc/ps3/ps3-hvcall.h deleted file mode 100644 index 1cb187ef8e2..00000000000 --- a/sys/powerpc/ps3/ps3-hvcall.h +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Playstation 3 LV1 hypercall interface - */ - -#include - -enum lpar_id { - PS3_LPAR_ID_CURRENT = 0x00, - PS3_LPAR_ID_PME = 0x01, -}; - -/* Return codes from hypercalls */ -#define LV1_SUCCESS 0 -#define LV1_RESOURCE_SHORTAGE -2 -#define LV1_NO_PRIVILEGE -3 -#define LV1_DENIED_BY_POLICY -4 -#define LV1_ACCESS_VIOLATION -5 -#define LV1_NO_ENTRY -6 -#define LV1_DUPLICATE_ENTRY -7 -#define LV1_TYPE_MISMATCH -8 -#define LV1_BUSY -9 -#define LV1_EMPTY -10 -#define LV1_WRONG_STATE -11 -#define LV1_NO_MATCH -13 -#define LV1_ALREADY_CONNECTED -14 -#define LV1_UNSUPPORTED_PARAMETER_VALUE -15 -#define LV1_CONDITION_NOT_SATISFIED -16 -#define LV1_ILLEGAL_PARAMETER_VALUE -17 -#define LV1_BAD_OPTION -18 -#define LV1_IMPLEMENTATION_LIMITATION -19 -#define LV1_NOT_IMPLEMENTED -20 -#define LV1_INVALID_CLASS_ID -21 -#define LV1_CONSTRAINT_NOT_SATISFIED -22 -#define LV1_ALIGNMENT_ERROR -23 -#define LV1_HARDWARE_ERROR -24 -#define LV1_INVALID_DATA_FORMAT -25 -#define LV1_INVALID_OPERATION -26 -#define LV1_INTERNAL_ERROR -32768 - -static inline uint64_t -lv1_repository_string(const char *str) -{ - uint64_t ret = 0; - strncpy((char *)&ret, str, sizeof(ret)); - return (ret); -} - -int lv1_allocate_memory(uint64_t size, uint64_t log_page_size, uint64_t zero, uint64_t flags, uint64_t *base_addr, uint64_t *muid); -int lv1_write_htab_entry(uint64_t vas_id, uint64_t slot, uint64_t pte_hi, uint64_t pte_lo); -int lv1_construct_virtual_address_space(uint64_t log_pteg_count, uint64_t n_sizes, uint64_t page_sizes, uint64_t *vas_id, uint64_t *hv_pteg_count); -int lv1_get_virtual_address_space_id_of_ppe(uint64_t ppe_id, uint64_t *vas_id); -int lv1_query_logical_partition_address_region_info(uint64_t lpar_id, uint64_t *base_addr, uint64_t *size, uint64_t *access_right, uint64_t *max_page_size, uint64_t *flags); -int lv1_select_virtual_address_space(uint64_t vas_id); -int lv1_pause(uint64_t mode); -int lv1_destruct_virtual_address_space(uint64_t vas_id); -int lv1_configure_irq_state_bitmap(uint64_t ppe_id, uint64_t cpu_id, uint64_t bitmap_addr); -int lv1_connect_irq_plug_ext(uint64_t ppe_id, uint64_t cpu_id, uint64_t virq, uint64_t outlet, uint64_t zero); -int lv1_release_memory(uint64_t base_addr); -int lv1_put_iopte(uint64_t ioas_id, uint64_t ioif_addr, uint64_t lpar_addr, uint64_t io_id, uint64_t flags); -int lv1_disconnect_irq_plug_ext(uint64_t ppe_id, uint64_t cpu_id, uint64_t virq); -int lv1_construct_event_receive_port(uint64_t *outlet); -int lv1_destruct_event_receive_port(uint64_t outlet); -int lv1_send_event_locally(uint64_t outlet); -int lv1_end_of_interrupt(uint64_t irq); -int lv1_connect_irq_plug(uint64_t virq, uint64_t irq); -int lv1_disconnect_irq_plus(uint64_t virq); -int lv1_end_of_interrupt_ext(uint64_t ppe_id, uint64_t cpu_id, uint64_t virq); -int lv1_did_update_interrupt_mask(uint64_t ppe_id, uint64_t cpu_id); -int lv1_shutdown_logical_partition(uint64_t cmd); -int lv1_destruct_logical_spe(uint64_t spe_id); -int lv1_construct_logical_spe(uint64_t pshift1, uint64_t pshift2, uint64_t pshift3, uint64_t pshift4, uint64_t pshift5, uint64_t vas_id, uint64_t spe_type, uint64_t *priv2_addr, uint64_t *problem_phys, uint64_t *local_store_phys, uint64_t *unused, uint64_t *shadow_addr, uint64_t *spe_id); -int lv1_set_spe_interrupt_mask(uint64_t spe_id, uint64_t class, uint64_t mask); -int lv1_disable_logical_spe(uint64_t spe_id, uint64_t zero); -int lv1_clear_spe_interrupt_status(uint64_t spe_id, uint64_t class, uint64_t stat, uint64_t zero); -int lv1_get_spe_interrupt_status(uint64_t spe_id, uint64_t class, uint64_t *stat); -int lv1_get_logical_ppe_id(uint64_t *ppe_id); -int lv1_get_logical_partition_id(uint64_t *lpar_id); -int lv1_get_spe_irq_outlet(uint64_t spe_id, uint64_t class, uint64_t *outlet); -int lv1_set_spe_privilege_state_area_1_register(uint64_t spe_id, uint64_t offset, uint64_t value); -int lv1_get_repository_node_value(uint64_t lpar_id, uint64_t n1, uint64_t n2, uint64_t n3, uint64_t n4, uint64_t *v1, uint64_t *v2); -int lv1_read_htab_entries(uint64_t vas_id, uint64_t slot, uint64_t *hi1, uint64_t *hi2, uint64_t *hi3, uint64_t *hi4, uint64_t *rcbits); -int lv1_set_dabr(uint64_t dabr, uint64_t flags); -int lv1_allocate_io_segment(uint64_t ioas_id, uint64_t seg_size, uint64_t io_pagesize, uint64_t *ioif_addr); -int lv1_release_io_segment(uint64_t ioas_id, uint64_t ioif_addr); -int lv1_construct_io_irq_outlet(uint64_t interrupt_id, uint64_t *outlet); -int lv1_destruct_io_irq_outlet(uint64_t outlet); -int lv1_map_htab(uint64_t lpar_id, uint64_t *htab_addr); -int lv1_unmap_htab(uint64_t htab_addr); -int lv1_get_version_info(uint64_t *firm_vers); -int lv1_insert_htab_entry(uint64_t vas_id, uint64_t pteg, uint64_t pte_hi, uint64_t pte_lo, uint64_t lockflags, uint64_t flags, uint64_t *index, uint64_t *evicted_hi, uint64_t *evicted_lo); -int lv1_read_virtual_uart(uint64_t port, uint64_t buffer, uint64_t bytes, uint64_t *bytes_read); -int lv1_write_virtual_uart(uint64_t port, uint64_t buffer, uint64_t bytes, uint64_t *bytes_written); -int lv1_set_virtual_uart_param(uint64_t port, uint64_t param, uint64_t value); -int lv1_get_virtual_uart_param(uint64_t port, uint64_t param, uint64_t *value); -int lv1_configure_virtual_uart(uint64_t lpar_addr, uint64_t *outlet); -int lv1_open_device(uint64_t bus, uint64_t dev, uint64_t zero); -int lv1_close_device(uint64_t bus, uint64_t dev); -int lv1_map_device_mmio_region(uint64_t bus, uint64_t dev, uint64_t bus_addr, uint64_t size, uint64_t page_size, uint64_t *lpar_addr); -int lv1_unmap_device_mmio_region(uint64_t bus, uint64_t dev, uint64_t lpar_addr); -int lv1_allocate_device_dma_region(uint64_t bus, uint64_t dev, uint64_t io_size, uint64_t io_pagesize, uint64_t flag, uint64_t *dma_region); -int lv1_free_device_dma_region(uint64_t bus, uint64_t dev, uint64_t dma_region); -int lv1_map_device_dma_region(uint64_t bus, uint64_t dev, uint64_t lpar_addr, uint64_t dma_region, uint64_t size, uint64_t flags); -int lv1_unmap_device_dma_region(uint64_t bus, uint64_t dev, uint64_t dma_region, uint64_t size); -int lv1_read_pci_config(uint64_t ps3bus, uint64_t bus, uint64_t dev, uint64_t func, uint64_t offset, uint64_t size, uint64_t *result); -int lv1_write_pci_config(uint64_t ps3bus, uint64_t bus, uint64_t dev, uint64_t func, uint64_t offset, uint64_t size, uint64_t data); -int lv1_net_add_multicast_address(uint64_t bus, uint64_t dev, uint64_t addr, uint64_t flags); -int lv1_net_remove_multicast_address(uint64_t bus, uint64_t dev, uint64_t zero, uint64_t one); -int lv1_net_start_tx_dma(uint64_t bus, uint64_t dev, uint64_t bus_addr, uint64_t zero); -int lv1_net_stop_tx_dma(uint64_t bus, uint64_t dev, uint64_t zero); -int lv1_net_start_rx_dma(uint64_t bus, uint64_t dev, uint64_t bus_addr, uint64_t zero); -int lv1_net_stop_rx_dma(uint64_t bus, uint64_t dev, uint64_t zero); -int lv1_net_set_interrupt_status_indicator(uint64_t bus, uint64_t dev, uint64_t irq_status_addr, uint64_t zero); -int lv1_net_set_interrupt_mask(uint64_t bus, uint64_t dev, uint64_t mask, uint64_t zero); -int lv1_net_control(uint64_t bus, uint64_t dev, uint64_t p1, uint64_t p2, uint64_t p3, uint64_t p4, uint64_t *v1, uint64_t *v2); -int lv1_connect_interrupt_event_receive_port(uint64_t bus, uint64_t dev, uint64_t outlet, uint64_t irq); -int lv1_disconnect_interrupt_event_receive_port(uint64_t bus, uint64_t dev, uint64_t outlet, uint64_t irq); -int lv1_deconfigure_virtual_uart_irq(void); -int lv1_enable_logical_spe(uint64_t spe_id, uint64_t resource_id); -int lv1_gpu_open(uint64_t zero); -int lv1_gpu_close(void); -int lv1_gpu_device_map(uint64_t dev, uint64_t *lpar_addr, uint64_t *lpar_size); -int lv1_gpu_device_unmap(uint64_t dev); -int lv1_gpu_memory_allocate(uint64_t ddr_size, uint64_t zero1, uint64_t zero2, uint64_t zero3, uint64_t zero4, uint64_t *handle, uint64_t *ddr_lpar); -int lv1_gpu_memory_free(uint64_t handle); -int lv1_gpu_context_allocate(uint64_t handle, uint64_t flags, uint64_t *chandle, uint64_t *lpar_dma_control, uint64_t *lpar_driver_info, uint64_t *lpar_reports, uint64_t *lpar_reports_size); -int lv1_gpu_context_free(uint64_t chandle); -int lv1_gpu_context_iomap(uint64_t changle, uint64_t gpu_ioif, uint64_t xdr_lpar, uint64_t fbsize, uint64_t ioflags); -int lv1_gpu_context_attribute(uint64_t chandle, uint64_t op, uint64_t p1, uint64_t p2, uint64_t p3, uint64_t p4); -int lv1_gpu_context_intr(uint64_t chandle, uint64_t *v1); -int lv1_gpu_attribute(uint64_t p1, uint64_t p2, uint64_t p3, uint64_t p4, uint64_t p5); -int lv1_get_rtc(uint64_t *rtc_val, uint64_t *timebase); -int lv1_storage_read(uint64_t dev, uint64_t region, uint64_t sector, uint64_t nsectors, uint64_t flags, uint64_t buf, uint64_t *dma_tag); -int lv1_storage_write(uint64_t dev, uint64_t region, uint64_t sector, uint64_t nsectors, uint64_t flags, uint64_t buf, uint64_t *dma_tag); -int lv1_storage_send_device_command(uint64_t dev, uint64_t cmd_id, uint64_t cmd_block, uint64_t cmd_size, uint64_t data_buf, uint64_t blocks, uint64_t *dma_tag); -int lv1_storage_get_async_status(uint64_t dev, uint64_t *dma_tag, uint64_t *status); -int lv1_storage_check_async_status(uint64_t dev, uint64_t dma_tag, uint64_t *status); -int lv1_panic(uint64_t howto); diff --git a/sys/powerpc/ps3/ps3-hvcall.master b/sys/powerpc/ps3/ps3-hvcall.master deleted file mode 100644 index 3b3835f0e05..00000000000 --- a/sys/powerpc/ps3/ps3-hvcall.master +++ /dev/null @@ -1,138 +0,0 @@ -/* - * Playstation 3 LV1 hypercall interface - */ - -#include - -enum lpar_id { - PS3_LPAR_ID_CURRENT = 0x00, - PS3_LPAR_ID_PME = 0x01, -}; - -/* Return codes from hypercalls */ -#define LV1_SUCCESS 0 -#define LV1_RESOURCE_SHORTAGE -2 -#define LV1_NO_PRIVILEGE -3 -#define LV1_DENIED_BY_POLICY -4 -#define LV1_ACCESS_VIOLATION -5 -#define LV1_NO_ENTRY -6 -#define LV1_DUPLICATE_ENTRY -7 -#define LV1_TYPE_MISMATCH -8 -#define LV1_BUSY -9 -#define LV1_EMPTY -10 -#define LV1_WRONG_STATE -11 -#define LV1_NO_MATCH -13 -#define LV1_ALREADY_CONNECTED -14 -#define LV1_UNSUPPORTED_PARAMETER_VALUE -15 -#define LV1_CONDITION_NOT_SATISFIED -16 -#define LV1_ILLEGAL_PARAMETER_VALUE -17 -#define LV1_BAD_OPTION -18 -#define LV1_IMPLEMENTATION_LIMITATION -19 -#define LV1_NOT_IMPLEMENTED -20 -#define LV1_INVALID_CLASS_ID -21 -#define LV1_CONSTRAINT_NOT_SATISFIED -22 -#define LV1_ALIGNMENT_ERROR -23 -#define LV1_HARDWARE_ERROR -24 -#define LV1_INVALID_DATA_FORMAT -25 -#define LV1_INVALID_OPERATION -26 -#define LV1_INTERNAL_ERROR -32768 - -static inline uint64_t -lv1_repository_string(const char *str) -{ - uint64_t ret = 0; - strncpy((char *)&ret, str, sizeof(ret)); - return (ret); -} - -# Code Name Inputs Outputs -HVCALL 0 lv1_allocate_memory size,log_page_size,zero,flags base_addr,muid -HVCALL 1 lv1_write_htab_entry vas_id,slot,pte_hi,pte_lo -HVCALL 2 lv1_construct_virtual_address_space log_pteg_count,n_sizes,page_sizes vas_id,hv_pteg_count -HVCALL 4 lv1_get_virtual_address_space_id_of_ppe ppe_id vas_id -HVCALL 6 lv1_query_logical_partition_address_region_info lpar_id base_addr,size,access_right,max_page_size,flags -HVCALL 7 lv1_select_virtual_address_space vas_id -HVCALL 9 lv1_pause mode -HVCALL 10 lv1_destruct_virtual_address_space vas_id -HVCALL 11 lv1_configure_irq_state_bitmap ppe_id,cpu_id,bitmap_addr -HVCALL 12 lv1_connect_irq_plug_ext ppe_id,cpu_id,virq,outlet,zero -HVCALL 13 lv1_release_memory base_addr -HVCALL 15 lv1_put_iopte ioas_id,ioif_addr,lpar_addr,io_id,flags -HVCALL 17 lv1_disconnect_irq_plug_ext ppe_id,cpu_id,virq -HVCALL 18 lv1_construct_event_receive_port UNUSED outlet -HVCALL 19 lv1_destruct_event_receive_port outlet -HVCALL 24 lv1_send_event_locally outlet -HVCALL 27 lv1_end_of_interrupt irq -HVCALL 28 lv1_connect_irq_plug virq,irq -HVCALL 29 lv1_disconnect_irq_plus virq -HVCALL 30 lv1_end_of_interrupt_ext ppe_id,cpu_id,virq -HVCALL 31 lv1_did_update_interrupt_mask ppe_id,cpu_id -HVCALL 44 lv1_shutdown_logical_partition cmd -HVCALL 54 lv1_destruct_logical_spe spe_id -HVCALL 57 lv1_construct_logical_spe pshift1,pshift2,pshift3,pshift4,pshift5,vas_id,spe_type priv2_addr,problem_phys,local_store_phys,unused,shadow_addr,spe_id -HVCALL 61 lv1_set_spe_interrupt_mask spe_id,class,mask -HVCALL 65 lv1_disable_logical_spe spe_id,zero -HVCALL 66 lv1_clear_spe_interrupt_status spe_id,class,stat,zero -HVCALL 67 lv1_get_spe_interrupt_status spe_id,class stat -HVCALL 69 lv1_get_logical_ppe_id UNUSED ppe_id -HVCALL 74 lv1_get_logical_partition_id UNUSED lpar_id -HVCALL 78 lv1_get_spe_irq_outlet spe_id,class outlet -HVCALL 79 lv1_set_spe_privilege_state_area_1_register spe_id,offset,value -HVCALL 91 lv1_get_repository_node_value lpar_id,n1,n2,n3,n4 v1,v2 -HVCALL 95 lv1_read_htab_entries vas_id,slot hi1,hi2,hi3,hi4,rcbits -HVCALL 96 lv1_set_dabr dabr,flags -HVCALL 116 lv1_allocate_io_segment ioas_id,seg_size,io_pagesize ioif_addr -HVCALL 117 lv1_release_io_segment ioas_id,ioif_addr -HVCALL 120 lv1_construct_io_irq_outlet interrupt_id outlet -HVCALL 121 lv1_destruct_io_irq_outlet outlet -HVCALL 122 lv1_map_htab lpar_id htab_addr -HVCALL 123 lv1_unmap_htab htab_addr -HVCALL 127 lv1_get_version_info UNUSED firm_vers -HVCALL 158 lv1_insert_htab_entry vas_id,pteg,pte_hi,pte_lo,lockflags,flags index,evicted_hi,evicted_lo -HVCALL 162 lv1_read_virtual_uart port,buffer,bytes bytes_read -HVCALL 163 lv1_write_virtual_uart port,buffer,bytes bytes_written -HVCALL 164 lv1_set_virtual_uart_param port,param,value -HVCALL 165 lv1_get_virtual_uart_param port,param value -HVCALL 166 lv1_configure_virtual_uart lpar_addr outlet -HVCALL 170 lv1_open_device bus,dev,zero -HVCALL 171 lv1_close_device bus,dev -HVCALL 172 lv1_map_device_mmio_region bus,dev,bus_addr,size,page_size lpar_addr -HVCALL 173 lv1_unmap_device_mmio_region bus,dev,lpar_addr -HVCALL 174 lv1_allocate_device_dma_region bus,dev,io_size,io_pagesize,flag dma_region -HVCALL 175 lv1_free_device_dma_region bus,dev,dma_region -HVCALL 176 lv1_map_device_dma_region bus,dev,lpar_addr,dma_region,size,flags -HVCALL 177 lv1_unmap_device_dma_region bus,dev,dma_region,size -HVCALL 178 lv1_read_pci_config ps3bus,bus,dev,func,offset,size result -HVCALL 179 lv1_write_pci_config ps3bus,bus,dev,func,offset,size,data -HVCALL 185 lv1_net_add_multicast_address bus,dev,addr,flags -HVCALL 186 lv1_net_remove_multicast_address bus,dev,zero,one -HVCALL 187 lv1_net_start_tx_dma bus,dev,bus_addr,zero -HVCALL 188 lv1_net_stop_tx_dma bus,dev,zero -HVCALL 189 lv1_net_start_rx_dma bus,dev,bus_addr,zero -HVCALL 190 lv1_net_stop_rx_dma bus,dev,zero -HVCALL 191 lv1_net_set_interrupt_status_indicator bus,dev,irq_status_addr,zero -HVCALL 193 lv1_net_set_interrupt_mask bus,dev,mask,zero -HVCALL 194 lv1_net_control bus,dev,p1,p2,p3,p4 v1,v2 -HVCALL 197 lv1_connect_interrupt_event_receive_port bus,dev,outlet,irq -HVCALL 198 lv1_disconnect_interrupt_event_receive_port bus,dev,outlet,irq -HVCALL 202 lv1_deconfigure_virtual_uart_irq -HVCALL 207 lv1_enable_logical_spe spe_id,resource_id -HVCALL 210 lv1_gpu_open zero -HVCALL 211 lv1_gpu_close -HVCALL 212 lv1_gpu_device_map dev lpar_addr,lpar_size -HVCALL 213 lv1_gpu_device_unmap dev -HVCALL 214 lv1_gpu_memory_allocate ddr_size,zero1,zero2,zero3,zero4 handle,ddr_lpar -HVCALL 216 lv1_gpu_memory_free handle -HVCALL 217 lv1_gpu_context_allocate handle,flags chandle,lpar_dma_control,lpar_driver_info,lpar_reports,lpar_reports_size -HVCALL 218 lv1_gpu_context_free chandle -HVCALL 221 lv1_gpu_context_iomap changle,gpu_ioif,xdr_lpar,fbsize,ioflags -HVCALL 225 lv1_gpu_context_attribute chandle,op,p1,p2,p3,p4 -HVCALL 227 lv1_gpu_context_intr chandle v1 -HVCALL 228 lv1_gpu_attribute p1,p2,p3,p4,p5 -HVCALL 232 lv1_get_rtc UNUSED rtc_val,timebase -HVCALL 245 lv1_storage_read dev,region,sector,nsectors,flags,buf dma_tag -HVCALL 246 lv1_storage_write dev,region,sector,nsectors,flags,buf dma_tag -HVCALL 248 lv1_storage_send_device_command dev,cmd_id,cmd_block,cmd_size,data_buf,blocks dma_tag -HVCALL 249 lv1_storage_get_async_status dev dma_tag,status -HVCALL 254 lv1_storage_check_async_status dev,dma_tag status -HVCALL 255 lv1_panic howto diff --git a/sys/powerpc/ps3/ps3_syscons.c b/sys/powerpc/ps3/ps3_syscons.c deleted file mode 100644 index f9c2532e8d7..00000000000 --- a/sys/powerpc/ps3/ps3_syscons.c +++ /dev/null @@ -1,241 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011-2014 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include -#include - -#include "ps3-hvcall.h" - -#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_MODE_SET 0x0100 -#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC 0x0101 -#define L1GPU_DISPLAY_SYNC_HSYNC 1 -#define L1GPU_DISPLAY_SYNC_VSYNC 2 -#define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP 0x0102 - -static vd_init_t ps3fb_init; -static vd_probe_t ps3fb_probe; -void ps3fb_remap(void); - -struct ps3fb_softc { - struct fb_info fb_info; - - uint64_t sc_fbhandle; - uint64_t sc_fbcontext; - uint64_t sc_dma_control; - uint64_t sc_driver_info; - uint64_t sc_reports; - uint64_t sc_reports_size; -}; - -static struct vt_driver vt_ps3fb_driver = { - .vd_name = "ps3fb", - .vd_probe = ps3fb_probe, - .vd_init = ps3fb_init, - .vd_blank = vt_fb_blank, - .vd_bitblt_text = vt_fb_bitblt_text, - .vd_bitblt_bmp = vt_fb_bitblt_bitmap, - .vd_drawrect = vt_fb_drawrect, - .vd_setpixel = vt_fb_setpixel, - .vd_fb_ioctl = vt_fb_ioctl, - .vd_fb_mmap = vt_fb_mmap, - /* Better than VGA, but still generic driver. */ - .vd_priority = VD_PRIORITY_GENERIC + 1, -}; - -VT_DRIVER_DECLARE(vt_ps3fb, vt_ps3fb_driver); -static struct ps3fb_softc ps3fb_softc; - -static int -ps3fb_probe(struct vt_device *vd) -{ - struct ps3fb_softc *sc; - int disable; - char compatible[64]; - phandle_t root; - - disable = 0; - TUNABLE_INT_FETCH("hw.syscons.disable", &disable); - if (disable != 0) - return (0); - - sc = &ps3fb_softc; - - TUNABLE_STR_FETCH("hw.platform", compatible, sizeof(compatible)); - if (strcmp(compatible, "ps3") == 0) - return (CN_INTERNAL); - - root = OF_finddevice("/"); - if (OF_getprop(root, "compatible", compatible, sizeof(compatible)) <= 0) - return (CN_DEAD); - - if (strncmp(compatible, "sony,ps3", sizeof(compatible)) != 0) - return (CN_DEAD); - - return (CN_INTERNAL); -} - -void -ps3fb_remap(void) -{ - struct ps3fb_softc *sc; - vm_offset_t va, fb_paddr; - - sc = &ps3fb_softc; - - lv1_gpu_close(); - lv1_gpu_open(0); - - lv1_gpu_context_attribute(0, L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_MODE_SET, - 0,0,0,0); - lv1_gpu_context_attribute(0, L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_MODE_SET, - 0,0,1,0); - lv1_gpu_context_attribute(0, L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC, - 0,L1GPU_DISPLAY_SYNC_VSYNC,0,0); - lv1_gpu_context_attribute(0, L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC, - 1,L1GPU_DISPLAY_SYNC_VSYNC,0,0); - lv1_gpu_memory_allocate(roundup2(sc->fb_info.fb_size, 1024*1024), - 0, 0, 0, 0, &sc->sc_fbhandle, &fb_paddr); - lv1_gpu_context_allocate(sc->sc_fbhandle, 0, &sc->sc_fbcontext, - &sc->sc_dma_control, &sc->sc_driver_info, &sc->sc_reports, - &sc->sc_reports_size); - - lv1_gpu_context_attribute(sc->sc_fbcontext, - L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP, 0, 0, 0, 0); - lv1_gpu_context_attribute(sc->sc_fbcontext, - L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP, 1, 0, 0, 0); - - sc->fb_info.fb_pbase = fb_paddr; - for (va = 0; va < sc->fb_info.fb_size; va += PAGE_SIZE) - pmap_kenter_attr(0x10000000 + va, fb_paddr + va, - VM_MEMATTR_WRITE_COMBINING); - sc->fb_info.fb_flags &= ~FB_FLAG_NOWRITE; -} - -static int -ps3fb_init(struct vt_device *vd) -{ - struct ps3fb_softc *sc; - char linux_video_mode[24]; - int linux_video_mode_num = 0; - - /* Init softc */ - vd->vd_softc = sc = &ps3fb_softc; - - sc->fb_info.fb_depth = 32; - sc->fb_info.fb_height = 1080; - sc->fb_info.fb_width = 1920; - - /* See if the bootloader has passed a graphics mode to use */ - bzero(linux_video_mode, sizeof(linux_video_mode)); - TUNABLE_STR_FETCH("video", linux_video_mode, sizeof(linux_video_mode)); - sscanf(linux_video_mode, "ps3fb:mode:%d", &linux_video_mode_num); - - switch (linux_video_mode_num) { - case 1: - case 2: - sc->fb_info.fb_height = 480; - sc->fb_info.fb_width = 720; - break; - case 3: - case 8: - sc->fb_info.fb_height = 720; - sc->fb_info.fb_width = 1280; - break; - case 4: - case 5: - case 9: - case 10: - sc->fb_info.fb_height = 1080; - sc->fb_info.fb_width = 1920; - break; - case 6: - case 7: - sc->fb_info.fb_height = 576; - sc->fb_info.fb_width = 720; - break; - case 11: - sc->fb_info.fb_height = 768; - sc->fb_info.fb_width = 1024; - break; - case 12: - sc->fb_info.fb_height = 1024; - sc->fb_info.fb_width = 1280; - break; - case 13: - sc->fb_info.fb_height = 1200; - sc->fb_info.fb_width = 1920; - break; - } - - /* Allow explicitly-specified values for us to override everything */ - TUNABLE_INT_FETCH("hw.ps3fb.height", &sc->fb_info.fb_height); - TUNABLE_INT_FETCH("hw.ps3fb.width", &sc->fb_info.fb_width); - - sc->fb_info.fb_stride = sc->fb_info.fb_width*4; - sc->fb_info.fb_size = sc->fb_info.fb_height * sc->fb_info.fb_stride; - sc->fb_info.fb_bpp = sc->fb_info.fb_stride / sc->fb_info.fb_width * 8; - - /* - * Arbitrarily choose address for the framebuffer - */ - - sc->fb_info.fb_vbase = 0x10000000; - sc->fb_info.fb_flags |= FB_FLAG_NOWRITE; /* Not available yet */ - sc->fb_info.fb_cmsize = 16; - - /* 32-bit VGA palette */ - vt_generate_cons_palette(sc->fb_info.fb_cmap, COLOR_FORMAT_RGB, - 255, 16, 255, 8, 255, 0); - - /* Set correct graphics context */ - lv1_gpu_context_attribute(sc->sc_fbcontext, - L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP, 0, 0, 0, 0); - lv1_gpu_context_attribute(sc->sc_fbcontext, - L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP, 1, 0, 0, 0); - - vt_fb_init(vd); - - return (CN_INTERNAL); -} diff --git a/sys/powerpc/ps3/ps3bus.c b/sys/powerpc/ps3/ps3bus.c deleted file mode 100644 index 124245b97da..00000000000 --- a/sys/powerpc/ps3/ps3bus.c +++ /dev/null @@ -1,764 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2010 Nathan Whitehorn - * Copyright (C) 2011 glevand (geoffrey.levand@mail.ru) - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include "ps3bus.h" -#include "ps3-hvcall.h" -#include "iommu_if.h" -#include "clock_if.h" - -static void ps3bus_identify(driver_t *, device_t); -static int ps3bus_probe(device_t); -static int ps3bus_attach(device_t); -static int ps3bus_print_child(device_t dev, device_t child); -static int ps3bus_read_ivar(device_t bus, device_t child, int which, - uintptr_t *result); -static struct resource *ps3bus_alloc_resource(device_t bus, device_t child, - int type, int *rid, rman_res_t start, rman_res_t end, - rman_res_t count, u_int flags); -static int ps3bus_activate_resource(device_t bus, device_t child, int type, - int rid, struct resource *res); -static bus_dma_tag_t ps3bus_get_dma_tag(device_t dev, device_t child); -static int ps3_iommu_map(device_t dev, bus_dma_segment_t *segs, int *nsegs, bus_addr_t min, bus_addr_t max, bus_size_t alignment, - bus_addr_t boundary, void *cookie); -static int ps3_iommu_unmap(device_t dev, bus_dma_segment_t *segs, - int nsegs, void *cookie); -static int ps3_gettime(device_t dev, struct timespec *ts); -static int ps3_settime(device_t dev, struct timespec *ts); - -struct ps3bus_devinfo { - int bus; - int dev; - uint64_t bustype; - uint64_t devtype; - int busidx; - int devidx; - - struct resource_list resources; - bus_dma_tag_t dma_tag; - - struct mtx iommu_mtx; - bus_addr_t dma_base[4]; -}; - -static MALLOC_DEFINE(M_PS3BUS, "ps3bus", "PS3 system bus device information"); - -enum ps3bus_irq_type { - SB_IRQ = 2, - OHCI_IRQ = 3, - EHCI_IRQ = 4, -}; - -enum ps3bus_reg_type { - OHCI_REG = 3, - EHCI_REG = 4, -}; - -static device_method_t ps3bus_methods[] = { - /* Device interface */ - DEVMETHOD(device_identify, ps3bus_identify), - DEVMETHOD(device_probe, ps3bus_probe), - DEVMETHOD(device_attach, ps3bus_attach), - - /* Bus interface */ - DEVMETHOD(bus_add_child, bus_generic_add_child), - DEVMETHOD(bus_get_dma_tag, ps3bus_get_dma_tag), - DEVMETHOD(bus_print_child, ps3bus_print_child), - DEVMETHOD(bus_read_ivar, ps3bus_read_ivar), - DEVMETHOD(bus_alloc_resource, ps3bus_alloc_resource), - DEVMETHOD(bus_activate_resource, ps3bus_activate_resource), - DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - - /* IOMMU interface */ - DEVMETHOD(iommu_map, ps3_iommu_map), - DEVMETHOD(iommu_unmap, ps3_iommu_unmap), - - /* Clock interface */ - DEVMETHOD(clock_gettime, ps3_gettime), - DEVMETHOD(clock_settime, ps3_settime), - - DEVMETHOD_END -}; - -struct ps3bus_softc { - struct rman sc_mem_rman; - struct rman sc_intr_rman; - struct mem_region *regions; - int rcount; -}; - -static driver_t ps3bus_driver = { - "ps3bus", - ps3bus_methods, - sizeof(struct ps3bus_softc) -}; - -static devclass_t ps3bus_devclass; - -DRIVER_MODULE(ps3bus, nexus, ps3bus_driver, ps3bus_devclass, 0, 0); - -static void -ps3bus_identify(driver_t *driver, device_t parent) -{ - if (strcmp(installed_platform(), "ps3") != 0) - return; - - if (device_find_child(parent, "ps3bus", -1) == NULL) - BUS_ADD_CHILD(parent, 0, "ps3bus", 0); -} - -static int -ps3bus_probe(device_t dev) -{ - /* Do not attach to any OF nodes that may be present */ - - device_set_desc(dev, "Playstation 3 System Bus"); - - return (BUS_PROBE_NOWILDCARD); -} - -static void -ps3bus_resources_init(struct rman *rm, int bus_index, int dev_index, - struct ps3bus_devinfo *dinfo) -{ - uint64_t irq_type, irq, outlet; - uint64_t reg_type, paddr, len; - uint64_t ppe, junk; - int i, result; - int thread; - - resource_list_init(&dinfo->resources); - - lv1_get_logical_ppe_id(&ppe); - thread = 32 - fls(mfctrl()); - - /* Scan for interrupts */ - for (i = 0; i < 10; i++) { - result = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("dev") | dev_index, - lv1_repository_string("intr") | i, 0, &irq_type, &irq); - - if (result != 0) - break; - - switch (irq_type) { - case SB_IRQ: - lv1_construct_event_receive_port(&outlet); - lv1_connect_irq_plug_ext(ppe, thread, outlet, outlet, - 0); - lv1_connect_interrupt_event_receive_port(dinfo->bus, - dinfo->dev, outlet, irq); - break; - case OHCI_IRQ: - case EHCI_IRQ: - lv1_construct_io_irq_outlet(irq, &outlet); - lv1_connect_irq_plug_ext(ppe, thread, outlet, outlet, - 0); - break; - default: - printf("Unknown IRQ type %ld for device %d.%d\n", - irq_type, dinfo->bus, dinfo->dev); - break; - } - - resource_list_add(&dinfo->resources, SYS_RES_IRQ, i, - outlet, outlet, 1); - } - - /* Scan for registers */ - for (i = 0; i < 10; i++) { - result = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("dev") | dev_index, - lv1_repository_string("reg") | i, - lv1_repository_string("type"), ®_type, &junk); - - if (result != 0) - break; - - result = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("dev") | dev_index, - lv1_repository_string("reg") | i, - lv1_repository_string("data"), &paddr, &len); - - result = lv1_map_device_mmio_region(dinfo->bus, dinfo->dev, - paddr, len, 12 /* log_2(4 KB) */, &paddr); - - if (result != 0) { - printf("Mapping registers failed for device " - "%d.%d (%ld.%ld): %d\n", dinfo->bus, dinfo->dev, - dinfo->bustype, dinfo->devtype, result); - continue; - } - - rman_manage_region(rm, paddr, paddr + len - 1); - resource_list_add(&dinfo->resources, SYS_RES_MEMORY, i, - paddr, paddr + len, len); - } -} - -static void -ps3bus_resources_init_by_type(struct rman *rm, int bus_index, int dev_index, - uint64_t irq_type, uint64_t reg_type, struct ps3bus_devinfo *dinfo) -{ - uint64_t _irq_type, irq, outlet; - uint64_t _reg_type, paddr, len; - uint64_t ppe, junk; - int i, result; - int thread; - - resource_list_init(&dinfo->resources); - - lv1_get_logical_ppe_id(&ppe); - thread = 32 - fls(mfctrl()); - - /* Scan for interrupts */ - for (i = 0; i < 10; i++) { - result = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("dev") | dev_index, - lv1_repository_string("intr") | i, 0, &_irq_type, &irq); - - if (result != 0) - break; - - if (_irq_type != irq_type) - continue; - - lv1_construct_io_irq_outlet(irq, &outlet); - lv1_connect_irq_plug_ext(ppe, thread, outlet, outlet, - 0); - resource_list_add(&dinfo->resources, SYS_RES_IRQ, i, - outlet, outlet, 1); - } - - /* Scan for registers */ - for (i = 0; i < 10; i++) { - result = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("dev") | dev_index, - lv1_repository_string("reg") | i, - lv1_repository_string("type"), &_reg_type, &junk); - - if (result != 0) - break; - - if (_reg_type != reg_type) - continue; - - result = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("dev") | dev_index, - lv1_repository_string("reg") | i, - lv1_repository_string("data"), &paddr, &len); - - result = lv1_map_device_mmio_region(dinfo->bus, dinfo->dev, - paddr, len, 12 /* log_2(4 KB) */, &paddr); - - if (result != 0) { - printf("Mapping registers failed for device " - "%d.%d (%ld.%ld): %d\n", dinfo->bus, dinfo->dev, - dinfo->bustype, dinfo->devtype, result); - break; - } - - rman_manage_region(rm, paddr, paddr + len - 1); - resource_list_add(&dinfo->resources, SYS_RES_MEMORY, i, - paddr, paddr + len, len); - } -} - -static int -ps3bus_attach(device_t self) -{ - struct ps3bus_softc *sc; - struct ps3bus_devinfo *dinfo; - int bus_index, dev_index, result; - uint64_t bustype, bus, devs; - uint64_t dev, devtype; - uint64_t junk; - device_t cdev; - - sc = device_get_softc(self); - sc->sc_mem_rman.rm_type = RMAN_ARRAY; - sc->sc_mem_rman.rm_descr = "PS3Bus Memory Mapped I/O"; - sc->sc_intr_rman.rm_type = RMAN_ARRAY; - sc->sc_intr_rman.rm_descr = "PS3Bus Interrupts"; - rman_init(&sc->sc_mem_rman); - rman_init(&sc->sc_intr_rman); - rman_manage_region(&sc->sc_intr_rman, 0, ~0); - - /* Get memory regions for DMA */ - mem_regions(&sc->regions, &sc->rcount, NULL, NULL); - - /* - * Probe all the PS3's buses. - */ - - for (bus_index = 0; bus_index < 5; bus_index++) { - result = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("type"), 0, 0, &bustype, &junk); - - if (result != 0) - continue; - - result = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("id"), 0, 0, &bus, &junk); - - if (result != 0) - continue; - - result = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("num_dev"), 0, 0, &devs, &junk); - - for (dev_index = 0; dev_index < devs; dev_index++) { - result = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("dev") | dev_index, - lv1_repository_string("type"), 0, &devtype, &junk); - - if (result != 0) - continue; - - result = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("dev") | dev_index, - lv1_repository_string("id"), 0, &dev, &junk); - - if (result != 0) - continue; - - switch (devtype) { - case PS3_DEVTYPE_USB: - /* USB device has OHCI and EHCI USB host controllers */ - - lv1_open_device(bus, dev, 0); - - /* OHCI host controller */ - - dinfo = malloc(sizeof(*dinfo), M_PS3BUS, - M_WAITOK | M_ZERO); - - dinfo->bus = bus; - dinfo->dev = dev; - dinfo->bustype = bustype; - dinfo->devtype = devtype; - dinfo->busidx = bus_index; - dinfo->devidx = dev_index; - - ps3bus_resources_init_by_type(&sc->sc_mem_rman, bus_index, - dev_index, OHCI_IRQ, OHCI_REG, dinfo); - - cdev = device_add_child(self, "ohci", -1); - if (cdev == NULL) { - device_printf(self, - "device_add_child failed\n"); - free(dinfo, M_PS3BUS); - continue; - } - - mtx_init(&dinfo->iommu_mtx, "iommu", NULL, MTX_DEF); - device_set_ivars(cdev, dinfo); - - /* EHCI host controller */ - - dinfo = malloc(sizeof(*dinfo), M_PS3BUS, - M_WAITOK | M_ZERO); - - dinfo->bus = bus; - dinfo->dev = dev; - dinfo->bustype = bustype; - dinfo->devtype = devtype; - dinfo->busidx = bus_index; - dinfo->devidx = dev_index; - - ps3bus_resources_init_by_type(&sc->sc_mem_rman, bus_index, - dev_index, EHCI_IRQ, EHCI_REG, dinfo); - - cdev = device_add_child(self, "ehci", -1); - if (cdev == NULL) { - device_printf(self, - "device_add_child failed\n"); - free(dinfo, M_PS3BUS); - continue; - } - - mtx_init(&dinfo->iommu_mtx, "iommu", NULL, MTX_DEF); - device_set_ivars(cdev, dinfo); - break; - default: - dinfo = malloc(sizeof(*dinfo), M_PS3BUS, - M_WAITOK | M_ZERO); - - dinfo->bus = bus; - dinfo->dev = dev; - dinfo->bustype = bustype; - dinfo->devtype = devtype; - dinfo->busidx = bus_index; - dinfo->devidx = dev_index; - - if (dinfo->bustype == PS3_BUSTYPE_SYSBUS || - dinfo->bustype == PS3_BUSTYPE_STORAGE) - lv1_open_device(bus, dev, 0); - - ps3bus_resources_init(&sc->sc_mem_rman, bus_index, - dev_index, dinfo); - - cdev = device_add_child(self, NULL, -1); - if (cdev == NULL) { - device_printf(self, - "device_add_child failed\n"); - free(dinfo, M_PS3BUS); - continue; - } - - mtx_init(&dinfo->iommu_mtx, "iommu", NULL, MTX_DEF); - device_set_ivars(cdev, dinfo); - } - } - } - - clock_register(self, 1000); - - return (bus_generic_attach(self)); -} - -static int -ps3bus_print_child(device_t dev, device_t child) -{ - struct ps3bus_devinfo *dinfo = device_get_ivars(child); - int retval = 0; - - retval += bus_print_child_header(dev, child); - retval += resource_list_print_type(&dinfo->resources, "mem", - SYS_RES_MEMORY, "%#jx"); - retval += resource_list_print_type(&dinfo->resources, "irq", - SYS_RES_IRQ, "%jd"); - - retval += bus_print_child_footer(dev, child); - - return (retval); -} - -static int -ps3bus_read_ivar(device_t bus, device_t child, int which, uintptr_t *result) -{ - struct ps3bus_devinfo *dinfo = device_get_ivars(child); - - switch (which) { - case PS3BUS_IVAR_BUS: - *result = dinfo->bus; - break; - case PS3BUS_IVAR_DEVICE: - *result = dinfo->dev; - break; - case PS3BUS_IVAR_BUSTYPE: - *result = dinfo->bustype; - break; - case PS3BUS_IVAR_DEVTYPE: - *result = dinfo->devtype; - break; - case PS3BUS_IVAR_BUSIDX: - *result = dinfo->busidx; - break; - case PS3BUS_IVAR_DEVIDX: - *result = dinfo->devidx; - break; - default: - return (EINVAL); - } - - return (0); -} - -static struct resource * -ps3bus_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) -{ - struct ps3bus_devinfo *dinfo; - struct ps3bus_softc *sc; - int needactivate; - struct resource *rv; - struct rman *rm; - rman_res_t adjstart, adjend, adjcount; - struct resource_list_entry *rle; - - sc = device_get_softc(bus); - dinfo = device_get_ivars(child); - needactivate = flags & RF_ACTIVE; - flags &= ~RF_ACTIVE; - - switch (type) { - case SYS_RES_MEMORY: - rle = resource_list_find(&dinfo->resources, SYS_RES_MEMORY, - *rid); - if (rle == NULL) { - device_printf(bus, "no rle for %s memory %d\n", - device_get_nameunit(child), *rid); - return (NULL); - } - - if (start < rle->start) - adjstart = rle->start; - else if (start > rle->end) - adjstart = rle->end; - else - adjstart = start; - - if (end < rle->start) - adjend = rle->start; - else if (end > rle->end) - adjend = rle->end; - else - adjend = end; - - adjcount = adjend - adjstart; - - rm = &sc->sc_mem_rman; - break; - case SYS_RES_IRQ: - rle = resource_list_find(&dinfo->resources, SYS_RES_IRQ, - *rid); - rm = &sc->sc_intr_rman; - adjstart = rle->start; - adjcount = ulmax(count, rle->count); - adjend = ulmax(rle->end, rle->start + adjcount - 1); - break; - default: - device_printf(bus, "unknown resource request from %s\n", - device_get_nameunit(child)); - return (NULL); - } - - rv = rman_reserve_resource(rm, adjstart, adjend, adjcount, flags, - child); - if (rv == NULL) { - device_printf(bus, - "failed to reserve resource %#lx - %#lx (%#lx)" - " for %s\n", adjstart, adjend, adjcount, - device_get_nameunit(child)); - return (NULL); - } - - rman_set_rid(rv, *rid); - - if (needactivate) { - if (bus_activate_resource(child, type, *rid, rv) != 0) { - device_printf(bus, - "failed to activate resource for %s\n", - device_get_nameunit(child)); - rman_release_resource(rv); - return (NULL); - } - } - - return (rv); -} - -static int -ps3bus_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *res) -{ - void *p; - - if (type == SYS_RES_IRQ) - return (bus_activate_resource(bus, type, rid, res)); - - if (type == SYS_RES_MEMORY) { - vm_offset_t start; - - start = (vm_offset_t) rman_get_start(res); - - if (bootverbose) - printf("ps3 mapdev: start %zx, len %ld\n", start, - rman_get_size(res)); - - p = pmap_mapdev(start, (vm_size_t) rman_get_size(res)); - if (p == NULL) - return (ENOMEM); - rman_set_virtual(res, p); - rman_set_bustag(res, &bs_be_tag); - rman_set_bushandle(res, (rman_res_t)p); - } - - return (rman_activate_resource(res)); -} - -static bus_dma_tag_t -ps3bus_get_dma_tag(device_t dev, device_t child) -{ - struct ps3bus_devinfo *dinfo = device_get_ivars(child); - struct ps3bus_softc *sc = device_get_softc(dev); - int i, err, flags, pagesize; - - if (dinfo->bustype != PS3_BUSTYPE_SYSBUS && - dinfo->bustype != PS3_BUSTYPE_STORAGE) - return (bus_get_dma_tag(dev)); - - mtx_lock(&dinfo->iommu_mtx); - if (dinfo->dma_tag != NULL) { - mtx_unlock(&dinfo->iommu_mtx); - return (dinfo->dma_tag); - } - - flags = 0; /* 32-bit mode */ - if (dinfo->bustype == PS3_BUSTYPE_SYSBUS && - dinfo->devtype == PS3_DEVTYPE_USB) - flags = 2; /* 8-bit mode */ - - pagesize = 24; /* log_2(16 MB) */ - if (dinfo->bustype == PS3_BUSTYPE_STORAGE) - pagesize = 12; /* 4 KB */ - - for (i = 0; i < sc->rcount; i++) { - err = lv1_allocate_device_dma_region(dinfo->bus, dinfo->dev, - sc->regions[i].mr_size, pagesize, flags, - &dinfo->dma_base[i]); - if (err != 0) { - device_printf(child, - "could not allocate DMA region %d: %d\n", i, err); - goto fail; - } - - err = lv1_map_device_dma_region(dinfo->bus, dinfo->dev, - sc->regions[i].mr_start, dinfo->dma_base[i], - sc->regions[i].mr_size, - 0xf800000000000800UL /* Cell Handbook Figure 7.3.4.1 */); - if (err != 0) { - device_printf(child, - "could not map DMA region %d: %d\n", i, err); - goto fail; - } - } - - err = bus_dma_tag_create(bus_get_dma_tag(dev), - 1, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, - NULL, NULL, BUS_SPACE_MAXSIZE, 0, BUS_SPACE_MAXSIZE, - 0, NULL, NULL, &dinfo->dma_tag); - - /* - * Note: storage devices have IOMMU mappings set up by the hypervisor, - * but use physical, non-translated addresses. The above IOMMU - * initialization is necessary for the hypervisor to be able to set up - * the mappings, but actual DMA mappings should not use the IOMMU - * routines. - */ - if (dinfo->bustype != PS3_BUSTYPE_STORAGE) - bus_dma_tag_set_iommu(dinfo->dma_tag, dev, dinfo); - -fail: - mtx_unlock(&dinfo->iommu_mtx); - - if (err) - return (NULL); - - return (dinfo->dma_tag); -} - -static int -ps3_iommu_map(device_t dev, bus_dma_segment_t *segs, int *nsegs, - bus_addr_t min, bus_addr_t max, bus_size_t alignment, bus_addr_t boundary, - void *cookie) -{ - struct ps3bus_devinfo *dinfo = cookie; - struct ps3bus_softc *sc = device_get_softc(dev); - int i, j; - - for (i = 0; i < *nsegs; i++) { - for (j = 0; j < sc->rcount; j++) { - if (segs[i].ds_addr >= sc->regions[j].mr_start && - segs[i].ds_addr < sc->regions[j].mr_start + - sc->regions[j].mr_size) - break; - } - KASSERT(j < sc->rcount, - ("Trying to map address %#lx not in physical memory", - segs[i].ds_addr)); - - segs[i].ds_addr = dinfo->dma_base[j] + - (segs[i].ds_addr - sc->regions[j].mr_start); - } - - return (0); -} - -static int -ps3_iommu_unmap(device_t dev, bus_dma_segment_t *segs, int nsegs, void *cookie) -{ - - return (0); -} - -#define Y2K 946684800 - -static int -ps3_gettime(device_t dev, struct timespec *ts) -{ - uint64_t rtc, tb; - int result; - - result = lv1_get_rtc(&rtc, &tb); - if (result) - return (result); - - ts->tv_sec = rtc + Y2K; - ts->tv_nsec = 0; - return (0); -} - -static int -ps3_settime(device_t dev, struct timespec *ts) -{ - return (-1); -} diff --git a/sys/powerpc/ps3/ps3bus.h b/sys/powerpc/ps3/ps3bus.h deleted file mode 100644 index 386e54065b3..00000000000 --- a/sys/powerpc/ps3/ps3bus.h +++ /dev/null @@ -1,69 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2010 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _POWERPC_PS3_PS3BUS_H -#define _POWERPC_PS3_PS3BUS_H - -enum { - PS3BUS_IVAR_BUS, - PS3BUS_IVAR_DEVICE, - PS3BUS_IVAR_BUSTYPE, - PS3BUS_IVAR_DEVTYPE, - PS3BUS_IVAR_BUSIDX, - PS3BUS_IVAR_DEVIDX, -}; - -#define PS3BUS_ACCESSOR(A, B, T) \ - __BUS_ACCESSOR(ps3bus, A, PS3BUS, B, T) - -PS3BUS_ACCESSOR(bus, BUS, int) -PS3BUS_ACCESSOR(device, DEVICE, int) -PS3BUS_ACCESSOR(bustype, BUSTYPE, uint64_t) -PS3BUS_ACCESSOR(devtype, DEVTYPE, uint64_t) -PS3BUS_ACCESSOR(busidx, BUSIDX, int) -PS3BUS_ACCESSOR(devidx, DEVIDX, int) - -/* Bus types */ -enum { - PS3_BUSTYPE_SYSBUS = 4, - PS3_BUSTYPE_STORAGE = 5, -}; - -/* Device types */ -enum { - /* System bus devices */ - PS3_DEVTYPE_GELIC = 3, - PS3_DEVTYPE_USB = 4, - PS3_DEVTYPE_GPIO = 6, - - /* Storage bus devices */ - PS3_DEVTYPE_DISK = 0, - PS3_DEVTYPE_CDROM = 5, - PS3_DEVTYPE_FLASH = 14, -}; - -#endif /* _POWERPC_PS3_PS3BUS_H */ diff --git a/sys/powerpc/ps3/ps3cdrom.c b/sys/powerpc/ps3/ps3cdrom.c deleted file mode 100644 index ef98c93931d..00000000000 --- a/sys/powerpc/ps3/ps3cdrom.c +++ /dev/null @@ -1,708 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2010 Nathan Whitehorn - * Copyright (C) 2011 glevand - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "ps3bus.h" -#include "ps3-hvcall.h" - -#define PS3CDROM_LOCK_INIT(_sc) \ - mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), "ps3cdrom", \ - MTX_DEF) -#define PS3CDROM_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); -#define PS3CDROM_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) -#define PS3CDROM_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) -#define PS3CDROM_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); -#define PS3CDROM_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); - -#define PS3CDROM_MAX_XFERS 3 - -#define LV1_STORAGE_SEND_ATAPI_COMMAND 0x01 - -struct ps3cdrom_softc; - -struct ps3cdrom_xfer { - TAILQ_ENTRY(ps3cdrom_xfer) x_queue; - struct ps3cdrom_softc *x_sc; - union ccb *x_ccb; - bus_dmamap_t x_dmamap; - uint64_t x_tag; -}; - -TAILQ_HEAD(ps3cdrom_xferq, ps3cdrom_xfer); - -struct ps3cdrom_softc { - device_t sc_dev; - - struct mtx sc_mtx; - - uint64_t sc_blksize; - uint64_t sc_nblocks; - - int sc_irqid; - struct resource *sc_irq; - void *sc_irqctx; - - bus_dma_tag_t sc_dmatag; - - struct cam_sim *sc_sim; - struct cam_path *sc_path; - - struct ps3cdrom_xfer sc_xfer[PS3CDROM_MAX_XFERS]; - struct ps3cdrom_xferq sc_active_xferq; - struct ps3cdrom_xferq sc_free_xferq; -}; - -enum lv1_ata_proto { - NON_DATA_PROTO = 0x00, - PIO_DATA_IN_PROTO = 0x01, - PIO_DATA_OUT_PROTO = 0x02, - DMA_PROTO = 0x03 -}; - -enum lv1_ata_in_out { - DIR_WRITE = 0x00, - DIR_READ = 0x01 -}; - -struct lv1_atapi_cmd { - uint8_t pkt[32]; - uint32_t pktlen; - uint32_t nblocks; - uint32_t blksize; - uint32_t proto; /* enum lv1_ata_proto */ - uint32_t in_out; /* enum lv1_ata_in_out */ - uint64_t buf; - uint32_t arglen; -}; - -static void ps3cdrom_action(struct cam_sim *sim, union ccb *ccb); -static void ps3cdrom_poll(struct cam_sim *sim); -static void ps3cdrom_async(void *callback_arg, u_int32_t code, - struct cam_path* path, void *arg); - -static void ps3cdrom_intr(void *arg); - -static void ps3cdrom_transfer(void *arg, bus_dma_segment_t *segs, int nsegs, - int error); - -static int ps3cdrom_decode_lv1_status(uint64_t status, - u_int8_t *sense_key, u_int8_t *asc, u_int8_t *ascq); - -static int -ps3cdrom_probe(device_t dev) -{ - if (ps3bus_get_bustype(dev) != PS3_BUSTYPE_STORAGE || - ps3bus_get_devtype(dev) != PS3_DEVTYPE_CDROM) - return (ENXIO); - - device_set_desc(dev, "Playstation 3 CDROM"); - - return (BUS_PROBE_SPECIFIC); -} - -static int -ps3cdrom_attach(device_t dev) -{ - struct ps3cdrom_softc *sc = device_get_softc(dev); - struct cam_devq *devq; - struct ps3cdrom_xfer *xp; - struct ccb_setasync csa; - int i, err; - - sc->sc_dev = dev; - - PS3CDROM_LOCK_INIT(sc); - - /* Setup interrupt handler */ - - sc->sc_irqid = 0; - sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irqid, - RF_ACTIVE); - if (!sc->sc_irq) { - device_printf(dev, "Could not allocate IRQ\n"); - err = ENXIO; - goto fail_destroy_lock; - } - - err = bus_setup_intr(dev, sc->sc_irq, - INTR_TYPE_CAM | INTR_MPSAFE | INTR_ENTROPY, - NULL, ps3cdrom_intr, sc, &sc->sc_irqctx); - if (err) { - device_printf(dev, "Could not setup IRQ\n"); - err = ENXIO; - goto fail_release_intr; - } - - /* Setup DMA */ - - err = bus_dma_tag_create(bus_get_dma_tag(dev), 4096, 0, - BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, - BUS_SPACE_UNRESTRICTED, 1, PAGE_SIZE, 0, - busdma_lock_mutex, &sc->sc_mtx, &sc->sc_dmatag); - if (err) { - device_printf(dev, "Could not create DMA tag\n"); - err = ENXIO; - goto fail_teardown_intr; - } - - /* Setup transfer queues */ - - TAILQ_INIT(&sc->sc_active_xferq); - TAILQ_INIT(&sc->sc_free_xferq); - - for (i = 0; i < PS3CDROM_MAX_XFERS; i++) { - xp = &sc->sc_xfer[i]; - xp->x_sc = sc; - - err = bus_dmamap_create(sc->sc_dmatag, BUS_DMA_COHERENT, - &xp->x_dmamap); - if (err) { - device_printf(dev, "Could not create DMA map (%d)\n", - err); - goto fail_destroy_dmamap; - } - - TAILQ_INSERT_TAIL(&sc->sc_free_xferq, xp, x_queue); - } - - /* Setup CAM */ - - devq = cam_simq_alloc(PS3CDROM_MAX_XFERS - 1); - if (!devq) { - device_printf(dev, "Could not allocate SIM queue\n"); - err = ENOMEM; - goto fail_destroy_dmatag; - } - - sc->sc_sim = cam_sim_alloc(ps3cdrom_action, ps3cdrom_poll, "ps3cdrom", - sc, device_get_unit(dev), &sc->sc_mtx, PS3CDROM_MAX_XFERS - 1, 0, - devq); - if (!sc->sc_sim) { - device_printf(dev, "Could not allocate SIM\n"); - cam_simq_free(devq); - err = ENOMEM; - goto fail_destroy_dmatag; - } - - /* Setup XPT */ - - PS3CDROM_LOCK(sc); - - err = xpt_bus_register(sc->sc_sim, dev, 0); - if (err != CAM_SUCCESS) { - device_printf(dev, "Could not register XPT bus\n"); - err = ENXIO; - PS3CDROM_UNLOCK(sc); - goto fail_free_sim; - } - - err = xpt_create_path(&sc->sc_path, NULL, cam_sim_path(sc->sc_sim), - CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD); - if (err != CAM_REQ_CMP) { - device_printf(dev, "Could not create XPT path\n"); - err = ENOMEM; - PS3CDROM_UNLOCK(sc); - goto fail_unregister_xpt_bus; - } - - xpt_setup_ccb(&csa.ccb_h, sc->sc_path, 5); - csa.ccb_h.func_code = XPT_SASYNC_CB; - csa.event_enable = AC_LOST_DEVICE; - csa.callback = ps3cdrom_async; - csa.callback_arg = sc->sc_sim; - xpt_action((union ccb *) &csa); - - CAM_DEBUG(sc->sc_path, CAM_DEBUG_TRACE, - ("registered SIM for ps3cdrom%d\n", device_get_unit(dev))); - - PS3CDROM_UNLOCK(sc); - - return (BUS_PROBE_SPECIFIC); - -fail_unregister_xpt_bus: - - xpt_bus_deregister(cam_sim_path(sc->sc_sim)); - -fail_free_sim: - - cam_sim_free(sc->sc_sim, TRUE); - -fail_destroy_dmamap: - - while ((xp = TAILQ_FIRST(&sc->sc_free_xferq))) { - TAILQ_REMOVE(&sc->sc_free_xferq, xp, x_queue); - bus_dmamap_destroy(sc->sc_dmatag, xp->x_dmamap); - } - -fail_destroy_dmatag: - - bus_dma_tag_destroy(sc->sc_dmatag); - -fail_teardown_intr: - - bus_teardown_intr(dev, sc->sc_irq, sc->sc_irqctx); - -fail_release_intr: - - bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irqid, sc->sc_irq); - -fail_destroy_lock: - - PS3CDROM_LOCK_DESTROY(sc); - - return (err); -} - -static int -ps3cdrom_detach(device_t dev) -{ - struct ps3cdrom_softc *sc = device_get_softc(dev); - int i; - - xpt_async(AC_LOST_DEVICE, sc->sc_path, NULL); - xpt_free_path(sc->sc_path); - xpt_bus_deregister(cam_sim_path(sc->sc_sim)); - cam_sim_free(sc->sc_sim, TRUE); - - for (i = 0; i < PS3CDROM_MAX_XFERS; i++) - bus_dmamap_destroy(sc->sc_dmatag, sc->sc_xfer[i].x_dmamap); - - bus_dma_tag_destroy(sc->sc_dmatag); - - bus_teardown_intr(dev, sc->sc_irq, sc->sc_irqctx); - bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irqid, sc->sc_irq); - - PS3CDROM_LOCK_DESTROY(sc); - - return (0); -} - -static void -ps3cdrom_action(struct cam_sim *sim, union ccb *ccb) -{ - struct ps3cdrom_softc *sc = (struct ps3cdrom_softc *)cam_sim_softc(sim); - device_t dev = sc->sc_dev; - struct ps3cdrom_xfer *xp; - int err; - - PS3CDROM_ASSERT_LOCKED(sc); - - CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, - ("function code 0x%02x\n", ccb->ccb_h.func_code)); - - switch (ccb->ccb_h.func_code) { - case XPT_SCSI_IO: - if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) - break; - - if(ccb->ccb_h.target_id > 0) { - ccb->ccb_h.status = CAM_TID_INVALID; - break; - } - - if(ccb->ccb_h.target_lun > 0) { - ccb->ccb_h.status = CAM_LUN_INVALID; - break; - } - - xp = TAILQ_FIRST(&sc->sc_free_xferq); - - KASSERT(xp != NULL, ("no free transfers")); - - xp->x_ccb = ccb; - - TAILQ_REMOVE(&sc->sc_free_xferq, xp, x_queue); - - err = bus_dmamap_load_ccb(sc->sc_dmatag, xp->x_dmamap, - ccb, ps3cdrom_transfer, xp, 0); - if (err && err != EINPROGRESS) { - device_printf(dev, "Could not load DMA map (%d)\n", - err); - - xp->x_ccb = NULL; - TAILQ_INSERT_TAIL(&sc->sc_free_xferq, xp, x_queue); - ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; - break; - } - return; - case XPT_SET_TRAN_SETTINGS: - ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; - break; - case XPT_GET_TRAN_SETTINGS: - { - struct ccb_trans_settings *cts = &ccb->cts; - - cts->protocol = PROTO_SCSI; - cts->protocol_version = SCSI_REV_2; - cts->transport = XPORT_SPI; - cts->transport_version = 2; - cts->proto_specific.valid = 0; - cts->xport_specific.valid = 0; - ccb->ccb_h.status = CAM_REQ_CMP; - break; - } - case XPT_RESET_BUS: - case XPT_RESET_DEV: - ccb->ccb_h.status = CAM_REQ_CMP; - break; - case XPT_CALC_GEOMETRY: - cam_calc_geometry(&ccb->ccg, 1); - break; - case XPT_PATH_INQ: - { - struct ccb_pathinq *cpi = &ccb->cpi; - - cpi->version_num = 1; - cpi->hba_inquiry = 0; - cpi->target_sprt = 0; - cpi->hba_inquiry = PI_SDTR_ABLE; - cpi->hba_misc = PIM_NOBUSRESET | PIM_SEQSCAN | PIM_NO_6_BYTE; - cpi->hba_eng_cnt = 0; - bzero(cpi->vuhba_flags, sizeof(cpi->vuhba_flags)); - cpi->max_target = 0; - cpi->max_lun = 0; - cpi->initiator_id = 7; - cpi->bus_id = cam_sim_bus(sim); - cpi->unit_number = cam_sim_unit(sim); - cpi->base_transfer_speed = 150000; - strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); - strlcpy(cpi->hba_vid, "Sony", HBA_IDLEN); - strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); - cpi->transport = XPORT_SPI; - cpi->transport_version = 2; - cpi->protocol = PROTO_SCSI; - cpi->protocol_version = SCSI_REV_2; - cpi->maxio = PAGE_SIZE; - cpi->ccb_h.status = CAM_REQ_CMP; - break; - } - default: - CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, - ("unsupported function code 0x%02x\n", - ccb->ccb_h.func_code)); - ccb->ccb_h.status = CAM_REQ_INVALID; - break; - } - - xpt_done(ccb); -} - -static void -ps3cdrom_poll(struct cam_sim *sim) -{ - ps3cdrom_intr(cam_sim_softc(sim)); -} - -static void -ps3cdrom_async(void *callback_arg, u_int32_t code, - struct cam_path* path, void *arg) -{ - switch (code) { - case AC_LOST_DEVICE: - xpt_print_path(path); - break; - default: - break; - } -} - -static void -ps3cdrom_intr(void *arg) -{ - struct ps3cdrom_softc *sc = (struct ps3cdrom_softc *) arg; - device_t dev = sc->sc_dev; - uint64_t devid = ps3bus_get_device(dev); - struct ps3cdrom_xfer *xp; - union ccb *ccb; - u_int8_t *cdb, sense_key, asc, ascq; - uint64_t tag, status; - - if (lv1_storage_get_async_status(devid, &tag, &status) != 0) - return; - - PS3CDROM_LOCK(sc); - - /* Find transfer with the returned tag */ - - TAILQ_FOREACH(xp, &sc->sc_active_xferq, x_queue) { - if (xp->x_tag == tag) - break; - } - - if (xp) { - ccb = xp->x_ccb; - cdb = (ccb->ccb_h.flags & CAM_CDB_POINTER) ? - ccb->csio.cdb_io.cdb_ptr : - ccb->csio.cdb_io.cdb_bytes; - - CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, - ("ATAPI command 0x%02x tag 0x%016lx completed (0x%016lx)\n", - cdb[0], tag, status)); - - if (!status) { - ccb->csio.scsi_status = SCSI_STATUS_OK; - ccb->csio.resid = 0; - ccb->ccb_h.status = CAM_REQ_CMP; - } else { - ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; - ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; - - if (!ps3cdrom_decode_lv1_status(status, &sense_key, - &asc, &ascq)) { - CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, - ("sense key 0x%02x asc 0x%02x ascq 0x%02x\n", - sense_key, asc, ascq)); - - scsi_set_sense_data(&ccb->csio.sense_data, - /*sense_format*/ SSD_TYPE_NONE, - /*current_error*/ 1, - sense_key, - asc, - ascq, - SSD_ELEM_NONE); - ccb->csio.sense_len = SSD_FULL_SIZE; - ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR | - CAM_AUTOSNS_VALID; - } - - if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) - ccb->csio.resid = ccb->csio.dxfer_len; - } - - if (ccb->ccb_h.flags & CAM_DIR_IN) - bus_dmamap_sync(sc->sc_dmatag, xp->x_dmamap, - BUS_DMASYNC_POSTREAD); - - bus_dmamap_unload(sc->sc_dmatag, xp->x_dmamap); - - xp->x_ccb = NULL; - TAILQ_REMOVE(&sc->sc_active_xferq, xp, x_queue); - TAILQ_INSERT_TAIL(&sc->sc_free_xferq, xp, x_queue); - - xpt_done(ccb); - } else { - device_printf(dev, - "Could not find transfer with tag 0x%016lx\n", tag); - } - - PS3CDROM_UNLOCK(sc); -} - -static void -ps3cdrom_transfer(void *arg, bus_dma_segment_t *segs, int nsegs, int error) -{ - struct ps3cdrom_xfer *xp = (struct ps3cdrom_xfer *) arg; - struct ps3cdrom_softc *sc = xp->x_sc; - device_t dev = sc->sc_dev; - uint64_t devid = ps3bus_get_device(dev); - union ccb *ccb = xp->x_ccb; - u_int8_t *cdb; - uint64_t start_sector, block_count; - int err; - - KASSERT(nsegs == 1 || nsegs == 0, - ("ps3cdrom_transfer: invalid number of DMA segments %d", nsegs)); - KASSERT(error == 0, ("ps3cdrom_transfer: DMA error %d", error)); - - PS3CDROM_ASSERT_LOCKED(sc); - - if (error) { - device_printf(dev, "Could not load DMA map (%d)\n", error); - - xp->x_ccb = NULL; - TAILQ_INSERT_TAIL(&sc->sc_free_xferq, xp, x_queue); - ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; - xpt_done(ccb); - return; - } - - cdb = (ccb->ccb_h.flags & CAM_CDB_POINTER) ? - ccb->csio.cdb_io.cdb_ptr : - ccb->csio.cdb_io.cdb_bytes; - - CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, - ("ATAPI command 0x%02x cdb_len %d dxfer_len %d\n ", cdb[0], - ccb->csio.cdb_len, ccb->csio.dxfer_len)); - - switch (cdb[0]) { - case READ_10: - KASSERT(nsegs == 1, ("ps3cdrom_transfer: no data to read")); - start_sector = (cdb[2] << 24) | (cdb[3] << 16) | - (cdb[4] << 8) | cdb[5]; - block_count = (cdb[7] << 8) | cdb[8]; - - err = lv1_storage_read(devid, 0 /* region id */, - start_sector, block_count, 0 /* flags */, segs[0].ds_addr, - &xp->x_tag); - bus_dmamap_sync(sc->sc_dmatag, xp->x_dmamap, - BUS_DMASYNC_POSTREAD); - break; - case WRITE_10: - KASSERT(nsegs == 1, ("ps3cdrom_transfer: no data to write")); - start_sector = (cdb[2] << 24) | (cdb[3] << 16) | - (cdb[4] << 8) | cdb[5]; - block_count = (cdb[7] << 8) | cdb[8]; - - bus_dmamap_sync(sc->sc_dmatag, xp->x_dmamap, - BUS_DMASYNC_PREWRITE); - err = lv1_storage_write(devid, 0 /* region id */, - start_sector, block_count, 0 /* flags */, - segs[0].ds_addr, &xp->x_tag); - break; - default: - { - struct lv1_atapi_cmd atapi_cmd; - - bzero(&atapi_cmd, sizeof(atapi_cmd)); - atapi_cmd.pktlen = 12; - bcopy(cdb, atapi_cmd.pkt, ccb->csio.cdb_len); - - if (ccb->ccb_h.flags & CAM_DIR_IN) { - atapi_cmd.in_out = DIR_READ; - atapi_cmd.proto = (ccb->csio.dxfer_len >= 2048) ? - DMA_PROTO : PIO_DATA_IN_PROTO; - } else if (ccb->ccb_h.flags & CAM_DIR_OUT) { - atapi_cmd.in_out = DIR_WRITE; - atapi_cmd.proto = (ccb->csio.dxfer_len >= 2048) ? - DMA_PROTO : PIO_DATA_OUT_PROTO; - } else { - atapi_cmd.proto = NON_DATA_PROTO; - } - - atapi_cmd.nblocks = atapi_cmd.arglen = - (nsegs == 0) ? 0 : segs[0].ds_len; - atapi_cmd.blksize = 1; - atapi_cmd.buf = (nsegs == 0) ? 0 : segs[0].ds_addr; - - if (ccb->ccb_h.flags & CAM_DIR_OUT) - bus_dmamap_sync(sc->sc_dmatag, xp->x_dmamap, - BUS_DMASYNC_PREWRITE); - - err = lv1_storage_send_device_command(devid, - LV1_STORAGE_SEND_ATAPI_COMMAND, vtophys(&atapi_cmd), - sizeof(atapi_cmd), atapi_cmd.buf, atapi_cmd.arglen, - &xp->x_tag); - - break; - } - } - - if (err) { - device_printf(dev, "ATAPI command 0x%02x failed (%d)\n", - cdb[0], err); - - bus_dmamap_unload(sc->sc_dmatag, xp->x_dmamap); - - xp->x_ccb = NULL; - TAILQ_INSERT_TAIL(&sc->sc_free_xferq, xp, x_queue); - - bzero(&ccb->csio.sense_data, sizeof(ccb->csio.sense_data)); - /* Invalid field in parameter list */ - scsi_set_sense_data(&ccb->csio.sense_data, - /*sense_format*/ SSD_TYPE_NONE, - /*current_error*/ 1, - /*sense_key*/ SSD_KEY_ILLEGAL_REQUEST, - /*asc*/ 0x26, - /*ascq*/ 0x00, - SSD_ELEM_NONE); - - ccb->csio.sense_len = SSD_FULL_SIZE; - ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; - ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR | CAM_AUTOSNS_VALID; - xpt_done(ccb); - } else { - CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, - ("ATAPI command 0x%02x tag 0x%016lx submitted\n ", cdb[0], - xp->x_tag)); - - TAILQ_INSERT_TAIL(&sc->sc_active_xferq, xp, x_queue); - ccb->ccb_h.status |= CAM_SIM_QUEUED; - } -} - -static int -ps3cdrom_decode_lv1_status(uint64_t status, u_int8_t *sense_key, u_int8_t *asc, - u_int8_t *ascq) -{ - if (((status >> 24) & 0xff) != SCSI_STATUS_CHECK_COND) - return -1; - - *sense_key = (status >> 16) & 0xff; - *asc = (status >> 8) & 0xff; - *ascq = status & 0xff; - - return (0); -} - -static device_method_t ps3cdrom_methods[] = { - DEVMETHOD(device_probe, ps3cdrom_probe), - DEVMETHOD(device_attach, ps3cdrom_attach), - DEVMETHOD(device_detach, ps3cdrom_detach), - {0, 0}, -}; - -static driver_t ps3cdrom_driver = { - "ps3cdrom", - ps3cdrom_methods, - sizeof(struct ps3cdrom_softc), -}; - -static devclass_t ps3cdrom_devclass; - -DRIVER_MODULE(ps3cdrom, ps3bus, ps3cdrom_driver, ps3cdrom_devclass, 0, 0); -MODULE_DEPEND(ps3cdrom, cam, 1, 1, 1); diff --git a/sys/powerpc/ps3/ps3disk.c b/sys/powerpc/ps3/ps3disk.c deleted file mode 100644 index 7193c0b2c20..00000000000 --- a/sys/powerpc/ps3/ps3disk.c +++ /dev/null @@ -1,701 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2011 glevand (geoffrey.levand@mail.ru) - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include -#include - -#include - -#include "ps3bus.h" -#include "ps3-hvcall.h" - -#define PS3DISK_LOCK_INIT(_sc) \ - mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), "ps3disk", MTX_DEF) -#define PS3DISK_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); -#define PS3DISK_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) -#define PS3DISK_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) -#define PS3DISK_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); -#define PS3DISK_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); - -#define LV1_STORAGE_ATA_HDDOUT 0x23 - -static SYSCTL_NODE(_hw, OID_AUTO, ps3disk, CTLFLAG_RD | CTLFLAG_MPSAFE, 0, - "PS3 Disk driver parameters"); - -#ifdef PS3DISK_DEBUG -static int ps3disk_debug = 0; -SYSCTL_INT(_hw_ps3disk, OID_AUTO, debug, CTLFLAG_RW, &ps3disk_debug, - 0, "control debugging printfs"); -TUNABLE_INT("hw.ps3disk.debug", &ps3disk_debug); -enum { - PS3DISK_DEBUG_INTR = 0x00000001, - PS3DISK_DEBUG_TASK = 0x00000002, - PS3DISK_DEBUG_READ = 0x00000004, - PS3DISK_DEBUG_WRITE = 0x00000008, - PS3DISK_DEBUG_FLUSH = 0x00000010, - PS3DISK_DEBUG_ANY = 0xffffffff -}; -#define DPRINTF(sc, m, fmt, ...) \ -do { \ - if (sc->sc_debug & (m)) \ - printf(fmt, __VA_ARGS__); \ -} while (0) -#else -#define DPRINTF(sc, m, fmt, ...) -#endif - -struct ps3disk_region { - uint64_t r_id; - uint64_t r_start; - uint64_t r_size; - uint64_t r_flags; -}; - -struct ps3disk_softc { - device_t sc_dev; - - struct mtx sc_mtx; - - uint64_t sc_blksize; - uint64_t sc_nblocks; - - uint64_t sc_nregs; - struct ps3disk_region *sc_reg; - - int sc_irqid; - struct resource *sc_irq; - void *sc_irqctx; - - struct disk **sc_disk; - - struct bio_queue_head sc_bioq; - struct bio_queue_head sc_deferredq; - struct proc *sc_task; - - bus_dma_tag_t sc_dmatag; - - int sc_running; - int sc_debug; -}; - -static int ps3disk_open(struct disk *dp); -static int ps3disk_close(struct disk *dp); -static void ps3disk_strategy(struct bio *bp); - -static void ps3disk_task(void *arg); -static void ps3disk_intr(void *arg); -static int ps3disk_get_disk_geometry(struct ps3disk_softc *sc); -static int ps3disk_enum_regions(struct ps3disk_softc *sc); -static void ps3disk_transfer(void *arg, bus_dma_segment_t *segs, int nsegs, - int error); - -static void ps3disk_sysctlattach(struct ps3disk_softc *sc); - -static MALLOC_DEFINE(M_PS3DISK, "ps3disk", "PS3 Disk"); - -static int -ps3disk_probe(device_t dev) -{ - if (ps3bus_get_bustype(dev) != PS3_BUSTYPE_STORAGE || - ps3bus_get_devtype(dev) != PS3_DEVTYPE_DISK) - return (ENXIO); - - device_set_desc(dev, "Playstation 3 Disk"); - - return (BUS_PROBE_SPECIFIC); -} - -static int -ps3disk_attach(device_t dev) -{ - struct ps3disk_softc *sc; - struct disk *d; - intmax_t mb; - uint64_t junk; - char unit; - int i, err; - - sc = device_get_softc(dev); - sc->sc_dev = dev; - - PS3DISK_LOCK_INIT(sc); - - err = ps3disk_get_disk_geometry(sc); - if (err) { - device_printf(dev, "Could not get disk geometry\n"); - err = ENXIO; - goto fail_destroy_lock; - } - - device_printf(dev, "block size %lu total blocks %lu\n", - sc->sc_blksize, sc->sc_nblocks); - - err = ps3disk_enum_regions(sc); - if (err) { - device_printf(dev, "Could not enumerate disk regions\n"); - err = ENXIO; - goto fail_destroy_lock; - } - - device_printf(dev, "Found %lu regions\n", sc->sc_nregs); - - if (!sc->sc_nregs) { - err = ENXIO; - goto fail_destroy_lock; - } - - /* Setup interrupt handler */ - sc->sc_irqid = 0; - sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irqid, - RF_ACTIVE); - if (!sc->sc_irq) { - device_printf(dev, "Could not allocate IRQ\n"); - err = ENXIO; - goto fail_free_regions; - } - - err = bus_setup_intr(dev, sc->sc_irq, - INTR_TYPE_BIO | INTR_MPSAFE | INTR_ENTROPY, - NULL, ps3disk_intr, sc, &sc->sc_irqctx); - if (err) { - device_printf(dev, "Could not setup IRQ\n"); - err = ENXIO; - goto fail_release_intr; - } - - /* Setup DMA */ - err = bus_dma_tag_create(bus_get_dma_tag(dev), 4096, 0, - BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, - BUS_SPACE_UNRESTRICTED, 1, PAGE_SIZE, 0, - busdma_lock_mutex, &sc->sc_mtx, &sc->sc_dmatag); - if (err) { - device_printf(dev, "Could not create DMA tag\n"); - err = ENXIO; - goto fail_teardown_intr; - } - - /* Setup disks */ - - sc->sc_disk = malloc(sc->sc_nregs * sizeof(struct disk *), - M_PS3DISK, M_ZERO | M_WAITOK); - if (!sc->sc_disk) { - device_printf(dev, "Could not allocate disk(s)\n"); - err = ENOMEM; - goto fail_teardown_intr; - } - - for (i = 0; i < sc->sc_nregs; i++) { - struct ps3disk_region *rp = &sc->sc_reg[i]; - - d = sc->sc_disk[i] = disk_alloc(); - d->d_open = ps3disk_open; - d->d_close = ps3disk_close; - d->d_strategy = ps3disk_strategy; - d->d_name = "ps3disk"; - d->d_drv1 = sc; - d->d_maxsize = PAGE_SIZE; - d->d_sectorsize = sc->sc_blksize; - d->d_unit = i; - d->d_mediasize = sc->sc_reg[i].r_size * sc->sc_blksize; - d->d_flags |= DISKFLAG_CANFLUSHCACHE; - - mb = d->d_mediasize >> 20; - unit = 'M'; - if (mb >= 10240) { - unit = 'G'; - mb /= 1024; - } - - /* Test to see if we can read this region */ - err = lv1_storage_read(ps3bus_get_device(dev), d->d_unit, - 0, 0, rp->r_flags, 0, &junk); - device_printf(dev, "region %d %ju%cB%s\n", i, mb, unit, - (err == LV1_DENIED_BY_POLICY) ? " (hypervisor protected)" - : ""); - - if (err != LV1_DENIED_BY_POLICY) - disk_create(d, DISK_VERSION); - } - err = 0; - - bioq_init(&sc->sc_bioq); - bioq_init(&sc->sc_deferredq); - kproc_create(&ps3disk_task, sc, &sc->sc_task, 0, 0, "ps3disk"); - - ps3disk_sysctlattach(sc); - sc->sc_running = 1; - return (0); - -fail_teardown_intr: - bus_teardown_intr(dev, sc->sc_irq, sc->sc_irqctx); -fail_release_intr: - bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irqid, sc->sc_irq); -fail_free_regions: - free(sc->sc_reg, M_PS3DISK); -fail_destroy_lock: - PS3DISK_LOCK_DESTROY(sc); - return (err); -} - -static int -ps3disk_detach(device_t dev) -{ - struct ps3disk_softc *sc = device_get_softc(dev); - int i; - - for (i = 0; i < sc->sc_nregs; i++) - disk_destroy(sc->sc_disk[i]); - - bus_dma_tag_destroy(sc->sc_dmatag); - - bus_teardown_intr(dev, sc->sc_irq, sc->sc_irqctx); - bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irqid, sc->sc_irq); - - free(sc->sc_disk, M_PS3DISK); - free(sc->sc_reg, M_PS3DISK); - - PS3DISK_LOCK_DESTROY(sc); - - return (0); -} - -static int -ps3disk_open(struct disk *dp) -{ - return (0); -} - -static int -ps3disk_close(struct disk *dp) -{ - return (0); -} - -/* Process deferred blocks */ -static void -ps3disk_task(void *arg) -{ - struct ps3disk_softc *sc = (struct ps3disk_softc *) arg; - struct bio *bp; - - while (1) { - kproc_suspend_check(sc->sc_task); - tsleep(&sc->sc_deferredq, PRIBIO, "ps3disk", 10); - - PS3DISK_LOCK(sc); - bp = bioq_takefirst(&sc->sc_deferredq); - PS3DISK_UNLOCK(sc); - - if (bp == NULL) - continue; - - if (bp->bio_driver1 != NULL) { - bus_dmamap_unload(sc->sc_dmatag, (bus_dmamap_t) - bp->bio_driver1); - bus_dmamap_destroy(sc->sc_dmatag, (bus_dmamap_t) - bp->bio_driver1); - } - - ps3disk_strategy(bp); - } - - kproc_exit(0); -} - -static void -ps3disk_strategy(struct bio *bp) -{ - struct ps3disk_softc *sc = (struct ps3disk_softc *)bp->bio_disk->d_drv1; - int err; - - if (sc == NULL) { - bp->bio_flags |= BIO_ERROR; - bp->bio_error = EINVAL; - biodone(bp); - return; - } - - PS3DISK_LOCK(sc); - bp->bio_resid = bp->bio_bcount; - bioq_insert_tail(&sc->sc_bioq, bp); - - DPRINTF(sc, PS3DISK_DEBUG_TASK, "%s: bio_cmd 0x%02x\n", - __func__, bp->bio_cmd); - - err = 0; - if (bp->bio_cmd == BIO_FLUSH) { - bp->bio_driver1 = 0; - err = lv1_storage_send_device_command( - ps3bus_get_device(sc->sc_dev), LV1_STORAGE_ATA_HDDOUT, - 0, 0, 0, 0, (uint64_t *)&bp->bio_driver2); - if (err == LV1_BUSY) - err = EAGAIN; - } else if (bp->bio_cmd == BIO_READ || bp->bio_cmd == BIO_WRITE) { - if (bp->bio_bcount % sc->sc_blksize != 0) { - err = EINVAL; - } else { - bus_dmamap_create(sc->sc_dmatag, BUS_DMA_COHERENT, - (bus_dmamap_t *)(&bp->bio_driver1)); - err = bus_dmamap_load(sc->sc_dmatag, - (bus_dmamap_t)(bp->bio_driver1), bp->bio_data, - bp->bio_bcount, ps3disk_transfer, bp, 0); - if (err == EINPROGRESS) - err = 0; - } - } else { - err = EINVAL; - } - - if (err == EAGAIN) { - bioq_remove(&sc->sc_bioq, bp); - bioq_insert_tail(&sc->sc_deferredq, bp); - } else if (err != 0) { - bp->bio_error = err; - bp->bio_flags |= BIO_ERROR; - bioq_remove(&sc->sc_bioq, bp); - disk_err(bp, "hard error", -1, 1); - biodone(bp); - } - - PS3DISK_UNLOCK(sc); -} - -static void -ps3disk_intr(void *arg) -{ - struct ps3disk_softc *sc = (struct ps3disk_softc *) arg; - device_t dev = sc->sc_dev; - uint64_t devid = ps3bus_get_device(dev); - struct bio *bp; - uint64_t tag, status; - - if (lv1_storage_get_async_status(devid, &tag, &status) != 0) - return; - - PS3DISK_LOCK(sc); - - DPRINTF(sc, PS3DISK_DEBUG_INTR, "%s: tag 0x%016lx " - "status 0x%016lx\n", __func__, tag, status); - - /* Locate the matching request */ - TAILQ_FOREACH(bp, &sc->sc_bioq.queue, bio_queue) { - if ((uint64_t)bp->bio_driver2 != tag) - continue; - - if (status != 0) { - device_printf(sc->sc_dev, "%s error (%#lx)\n", - (bp->bio_cmd == BIO_READ) ? "Read" : "Write", - status); - bp->bio_error = EIO; - bp->bio_flags |= BIO_ERROR; - } else { - bp->bio_error = 0; - bp->bio_resid = 0; - bp->bio_flags |= BIO_DONE; - } - - if (bp->bio_driver1 != NULL) { - if (bp->bio_cmd == BIO_READ) - bus_dmamap_sync(sc->sc_dmatag, (bus_dmamap_t) - bp->bio_driver1, BUS_DMASYNC_POSTREAD); - bus_dmamap_unload(sc->sc_dmatag, (bus_dmamap_t) - bp->bio_driver1); - bus_dmamap_destroy(sc->sc_dmatag, (bus_dmamap_t) - bp->bio_driver1); - } - - bioq_remove(&sc->sc_bioq, bp); - biodone(bp); - break; - } - - if (bioq_first(&sc->sc_deferredq) != NULL) - wakeup(&sc->sc_deferredq); - - PS3DISK_UNLOCK(sc); -} - -static int -ps3disk_get_disk_geometry(struct ps3disk_softc *sc) -{ - device_t dev = sc->sc_dev; - uint64_t bus_index = ps3bus_get_busidx(dev); - uint64_t dev_index = ps3bus_get_devidx(dev); - uint64_t junk; - int err; - - err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("dev") | dev_index, - lv1_repository_string("blk_size"), 0, &sc->sc_blksize, &junk); - if (err) { - device_printf(dev, "Could not get block size (0x%08x)\n", err); - return (ENXIO); - } - - err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("dev") | dev_index, - lv1_repository_string("n_blocks"), 0, &sc->sc_nblocks, &junk); - if (err) { - device_printf(dev, "Could not get total number of blocks " - "(0x%08x)\n", err); - err = ENXIO; - } - - return (err); -} - -static int -ps3disk_enum_regions(struct ps3disk_softc *sc) -{ - device_t dev = sc->sc_dev; - uint64_t bus_index = ps3bus_get_busidx(dev); - uint64_t dev_index = ps3bus_get_devidx(dev); - uint64_t junk; - int i, err; - - /* Read number of regions */ - - err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("dev") | dev_index, - lv1_repository_string("n_regs"), 0, &sc->sc_nregs, &junk); - if (err) { - device_printf(dev, "Could not get number of regions (0x%08x)\n", - err); - err = ENXIO; - goto fail; - } - - if (!sc->sc_nregs) - return 0; - - sc->sc_reg = malloc(sc->sc_nregs * sizeof(struct ps3disk_region), - M_PS3DISK, M_ZERO | M_WAITOK); - if (!sc->sc_reg) { - err = ENOMEM; - goto fail; - } - - /* Setup regions */ - - for (i = 0; i < sc->sc_nregs; i++) { - err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("dev") | dev_index, - lv1_repository_string("region") | i, - lv1_repository_string("id"), &sc->sc_reg[i].r_id, &junk); - if (err) { - device_printf(dev, "Could not get region id (0x%08x)\n", - err); - err = ENXIO; - goto fail; - } - - err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("dev") | dev_index, - lv1_repository_string("region") | i, - lv1_repository_string("start"), &sc->sc_reg[i].r_start, - &junk); - if (err) { - device_printf(dev, "Could not get region start " - "(0x%08x)\n", err); - err = ENXIO; - goto fail; - } - - err = lv1_get_repository_node_value(PS3_LPAR_ID_PME, - (lv1_repository_string("bus") >> 32) | bus_index, - lv1_repository_string("dev") | dev_index, - lv1_repository_string("region") | i, - lv1_repository_string("size"), &sc->sc_reg[i].r_size, - &junk); - if (err) { - device_printf(dev, "Could not get region size " - "(0x%08x)\n", err); - err = ENXIO; - goto fail; - } - - if (i == 0) - sc->sc_reg[i].r_flags = 0x2; - else - sc->sc_reg[i].r_flags = 0; - } - - return (0); - -fail: - - sc->sc_nregs = 0; - if (sc->sc_reg) - free(sc->sc_reg, M_PS3DISK); - - return (err); -} - -static void -ps3disk_transfer(void *arg, bus_dma_segment_t *segs, int nsegs, int error) -{ - struct bio *bp = (struct bio *)(arg); - struct ps3disk_softc *sc = (struct ps3disk_softc *)bp->bio_disk->d_drv1; - struct ps3disk_region *rp = &sc->sc_reg[bp->bio_disk->d_unit]; - uint64_t devid = ps3bus_get_device(sc->sc_dev); - uint64_t block; - int i, err; - - /* Locks already held by busdma */ - PS3DISK_ASSERT_LOCKED(sc); - - if (error) { - bp->bio_error = error; - bp->bio_flags |= BIO_ERROR; - bioq_remove(&sc->sc_bioq, bp); - biodone(bp); - return; - } - - block = bp->bio_pblkno; - for (i = 0; i < nsegs; i++) { - KASSERT((segs[i].ds_len % sc->sc_blksize) == 0, - ("DMA fragments not blocksize multiples")); - - if (bp->bio_cmd == BIO_READ) { - err = lv1_storage_read(devid, rp->r_id, - block, segs[i].ds_len/sc->sc_blksize, - rp->r_flags, segs[i].ds_addr, - (uint64_t *)&bp->bio_driver2); - } else { - bus_dmamap_sync(sc->sc_dmatag, - (bus_dmamap_t)bp->bio_driver1, - BUS_DMASYNC_PREWRITE); - err = lv1_storage_write(devid, rp->r_id, - block, segs[i].ds_len/sc->sc_blksize, - rp->r_flags, segs[i].ds_addr, - (uint64_t *)&bp->bio_driver2); - } - - if (err) { - if (err == LV1_BUSY) { - bioq_remove(&sc->sc_bioq, bp); - bioq_insert_tail(&sc->sc_deferredq, bp); - } else { - bus_dmamap_unload(sc->sc_dmatag, (bus_dmamap_t) - bp->bio_driver1); - bus_dmamap_destroy(sc->sc_dmatag, (bus_dmamap_t) - bp->bio_driver1); - device_printf(sc->sc_dev, "Could not read " - "sectors (0x%08x)\n", err); - bp->bio_error = EINVAL; - bp->bio_flags |= BIO_ERROR; - bioq_remove(&sc->sc_bioq, bp); - biodone(bp); - } - - break; - } - - DPRINTF(sc, PS3DISK_DEBUG_READ, "%s: tag 0x%016lx\n", - __func__, sc->sc_bounce_tag); - } -} - -#ifdef PS3DISK_DEBUG -static int -ps3disk_sysctl_debug(SYSCTL_HANDLER_ARGS) -{ - struct ps3disk_softc *sc = arg1; - int debug, error; - - debug = sc->sc_debug; - - error = sysctl_handle_int(oidp, &debug, 0, req); - if (error || !req->newptr) - return error; - - sc->sc_debug = debug; - - return 0; -} -#endif - -static void -ps3disk_sysctlattach(struct ps3disk_softc *sc) -{ -#ifdef PS3DISK_DEBUG - struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); - struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); - - sc->sc_debug = ps3disk_debug; - - SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, - "debug", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc, 0, - ps3disk_sysctl_debug, "I", "control debugging printfs"); -#endif -} - -static device_method_t ps3disk_methods[] = { - DEVMETHOD(device_probe, ps3disk_probe), - DEVMETHOD(device_attach, ps3disk_attach), - DEVMETHOD(device_detach, ps3disk_detach), - {0, 0}, -}; - -static driver_t ps3disk_driver = { - "ps3disk", - ps3disk_methods, - sizeof(struct ps3disk_softc), -}; - -static devclass_t ps3disk_devclass; - -DRIVER_MODULE(ps3disk, ps3bus, ps3disk_driver, ps3disk_devclass, 0, 0); diff --git a/sys/powerpc/ps3/ps3pic.c b/sys/powerpc/ps3/ps3pic.c deleted file mode 100644 index 32d2c09aaf4..00000000000 --- a/sys/powerpc/ps3/ps3pic.c +++ /dev/null @@ -1,248 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2010 Nathan Whitehorn - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include "ps3-hvcall.h" -#include "pic_if.h" - -static void ps3pic_identify(driver_t *driver, device_t parent); -static int ps3pic_probe(device_t); -static int ps3pic_attach(device_t); - -static void ps3pic_dispatch(device_t, struct trapframe *); -static void ps3pic_enable(device_t, u_int, u_int, void **); -static void ps3pic_eoi(device_t, u_int, void *); -static void ps3pic_ipi(device_t, u_int); -static void ps3pic_mask(device_t, u_int, void *); -static void ps3pic_unmask(device_t, u_int, void *); - -struct ps3pic_softc { - volatile uint64_t *bitmap_thread0; - volatile uint64_t *mask_thread0; - volatile uint64_t *bitmap_thread1; - volatile uint64_t *mask_thread1; - - uint64_t sc_ipi_outlet[2]; - uint64_t sc_ipi_virq; - int sc_vector[64]; -}; - -static device_method_t ps3pic_methods[] = { - /* Device interface */ - DEVMETHOD(device_identify, ps3pic_identify), - DEVMETHOD(device_probe, ps3pic_probe), - DEVMETHOD(device_attach, ps3pic_attach), - - /* PIC interface */ - DEVMETHOD(pic_dispatch, ps3pic_dispatch), - DEVMETHOD(pic_enable, ps3pic_enable), - DEVMETHOD(pic_eoi, ps3pic_eoi), - DEVMETHOD(pic_ipi, ps3pic_ipi), - DEVMETHOD(pic_mask, ps3pic_mask), - DEVMETHOD(pic_unmask, ps3pic_unmask), - - { 0, 0 }, -}; - -static driver_t ps3pic_driver = { - "ps3pic", - ps3pic_methods, - sizeof(struct ps3pic_softc) -}; - -static devclass_t ps3pic_devclass; - -DRIVER_MODULE(ps3pic, nexus, ps3pic_driver, ps3pic_devclass, 0, 0); - -static MALLOC_DEFINE(M_PS3PIC, "ps3pic", "PS3 PIC"); - -static void -ps3pic_identify(driver_t *driver, device_t parent) -{ - if (strcmp(installed_platform(), "ps3") != 0) - return; - - if (device_find_child(parent, "ps3pic", -1) == NULL) - BUS_ADD_CHILD(parent, 0, "ps3pic", 0); -} - -static int -ps3pic_probe(device_t dev) -{ - device_set_desc(dev, "Playstation 3 interrupt controller"); - return (BUS_PROBE_NOWILDCARD); -} - -static int -ps3pic_attach(device_t dev) -{ - struct ps3pic_softc *sc; - uint64_t ppe; - int thread; - - sc = device_get_softc(dev); - - sc->bitmap_thread0 = contigmalloc(128 /* 512 bits * 2 */, M_PS3PIC, - M_NOWAIT | M_ZERO, 0, BUS_SPACE_MAXADDR, 64 /* alignment */, - PAGE_SIZE /* boundary */); - sc->mask_thread0 = sc->bitmap_thread0 + 4; - sc->bitmap_thread1 = sc->bitmap_thread0 + 8; - sc->mask_thread1 = sc->bitmap_thread0 + 12; - - lv1_get_logical_ppe_id(&ppe); - thread = 32 - fls(mfctrl()); - lv1_configure_irq_state_bitmap(ppe, thread, - vtophys(sc->bitmap_thread0)); - - sc->sc_ipi_virq = 63; - -#ifdef SMP - lv1_configure_irq_state_bitmap(ppe, !thread, - vtophys(sc->bitmap_thread1)); - - /* Map both IPIs to the same VIRQ to avoid changes in intr_machdep */ - lv1_construct_event_receive_port(&sc->sc_ipi_outlet[0]); - lv1_connect_irq_plug_ext(ppe, thread, sc->sc_ipi_virq, - sc->sc_ipi_outlet[0], 0); - lv1_construct_event_receive_port(&sc->sc_ipi_outlet[1]); - lv1_connect_irq_plug_ext(ppe, !thread, sc->sc_ipi_virq, - sc->sc_ipi_outlet[1], 0); -#endif - - powerpc_register_pic(dev, 0, sc->sc_ipi_virq, 1, FALSE); - return (0); -} - -/* - * PIC I/F methods. - */ - -static void -ps3pic_dispatch(device_t dev, struct trapframe *tf) -{ - uint64_t bitmap, mask; - int irq; - struct ps3pic_softc *sc; - - sc = device_get_softc(dev); - - if (PCPU_GET(cpuid) == 0) { - bitmap = atomic_readandclear_64(&sc->bitmap_thread0[0]); - mask = sc->mask_thread0[0]; - } else { - bitmap = atomic_readandclear_64(&sc->bitmap_thread1[0]); - mask = sc->mask_thread1[0]; - } - powerpc_sync(); - - while ((irq = ffsl(bitmap & mask) - 1) != -1) { - bitmap &= ~(1UL << irq); - powerpc_dispatch_intr(sc->sc_vector[63 - irq], tf); - } -} - -static void -ps3pic_enable(device_t dev, u_int irq, u_int vector, void **priv) -{ - struct ps3pic_softc *sc; - - sc = device_get_softc(dev); - sc->sc_vector[irq] = vector; - - ps3pic_unmask(dev, irq, priv); -} - -static void -ps3pic_eoi(device_t dev, u_int irq, void *priv) -{ - uint64_t ppe; - int thread; - - lv1_get_logical_ppe_id(&ppe); - thread = 32 - fls(mfctrl()); - - lv1_end_of_interrupt_ext(ppe, thread, irq); -} - -static void -ps3pic_ipi(device_t dev, u_int cpu) -{ - struct ps3pic_softc *sc; - sc = device_get_softc(dev); - - lv1_send_event_locally(sc->sc_ipi_outlet[cpu]); -} - -static void -ps3pic_mask(device_t dev, u_int irq, void *priv) -{ - struct ps3pic_softc *sc; - uint64_t ppe; - - sc = device_get_softc(dev); - - /* Do not mask IPIs! */ - if (irq == sc->sc_ipi_virq) - return; - - atomic_clear_64(&sc->mask_thread0[0], 1UL << (63 - irq)); - atomic_clear_64(&sc->mask_thread1[0], 1UL << (63 - irq)); - - lv1_get_logical_ppe_id(&ppe); - lv1_did_update_interrupt_mask(ppe, 0); - lv1_did_update_interrupt_mask(ppe, 1); -} - -static void -ps3pic_unmask(device_t dev, u_int irq, void *priv) -{ - struct ps3pic_softc *sc; - uint64_t ppe; - - sc = device_get_softc(dev); - atomic_set_64(&sc->mask_thread0[0], 1UL << (63 - irq)); - atomic_set_64(&sc->mask_thread1[0], 1UL << (63 - irq)); - - lv1_get_logical_ppe_id(&ppe); - lv1_did_update_interrupt_mask(ppe, 0); - lv1_did_update_interrupt_mask(ppe, 1); -} diff --git a/sys/powerpc/pseries/mmu_phyp.c b/sys/powerpc/pseries/mmu_phyp.c deleted file mode 100644 index 570c0d9acf0..00000000000 --- a/sys/powerpc/pseries/mmu_phyp.c +++ /dev/null @@ -1,666 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2010 Andreas Tobler - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include "phyp-hvcall.h" - -#define MMU_PHYP_DEBUG 0 -#define MMU_PHYP_ID "mmu_phyp: " -#if MMU_PHYP_DEBUG -#define dprintf(fmt, ...) printf(fmt, ## __VA_ARGS__) -#define dprintf0(fmt, ...) dprintf(MMU_PHYP_ID fmt, ## __VA_ARGS__) -#else -#define dprintf(fmt, args...) do { ; } while(0) -#define dprintf0(fmt, args...) do { ; } while(0) -#endif - -static struct rmlock mphyp_eviction_lock; - -/* - * Kernel MMU interface - */ - -static void mphyp_install(void); -static void mphyp_bootstrap(vm_offset_t kernelstart, - vm_offset_t kernelend); -static void mphyp_cpu_bootstrap(int ap); -static void *mphyp_dump_pmap(void *ctx, void *buf, - u_long *nbytes); -static int64_t mphyp_pte_synch(struct pvo_entry *pvo); -static int64_t mphyp_pte_clear(struct pvo_entry *pvo, uint64_t ptebit); -static int64_t mphyp_pte_unset(struct pvo_entry *pvo); -static int64_t mphyp_pte_insert(struct pvo_entry *pvo); -static int64_t mphyp_pte_unset_sp(struct pvo_entry *pvo); -static int64_t mphyp_pte_insert_sp(struct pvo_entry *pvo); -static int64_t mphyp_pte_replace_sp(struct pvo_entry *pvo); - -static struct pmap_funcs mphyp_methods = { - .install = mphyp_install, - .bootstrap = mphyp_bootstrap, - .cpu_bootstrap = mphyp_cpu_bootstrap, - .dumpsys_dump_pmap = mphyp_dump_pmap, -}; - -static struct moea64_funcs mmu_phyp_funcs = { - .pte_synch = mphyp_pte_synch, - .pte_clear = mphyp_pte_clear, - .pte_unset = mphyp_pte_unset, - .pte_insert = mphyp_pte_insert, - .pte_unset_sp = mphyp_pte_unset_sp, - .pte_insert_sp = mphyp_pte_insert_sp, - .pte_replace_sp = mphyp_pte_replace_sp, -}; - -MMU_DEF_INHERIT(pseries_mmu, "mmu_phyp", mphyp_methods, oea64_mmu); - -static int brokenkvm = 0; - -static void -print_kvm_bug_warning(void *data) -{ - - if (brokenkvm) - printf("WARNING: Running on a broken hypervisor that does " - "not support mandatory H_CLEAR_MOD and H_CLEAR_REF " - "hypercalls. Performance will be suboptimal.\n"); -} - -SYSINIT(kvmbugwarn1, SI_SUB_COPYRIGHT, SI_ORDER_THIRD + 1, - print_kvm_bug_warning, NULL); -SYSINIT(kvmbugwarn2, SI_SUB_LAST, SI_ORDER_THIRD + 1, print_kvm_bug_warning, - NULL); - -static void -mphyp_install() -{ - - moea64_ops = &mmu_phyp_funcs; -} - -static void -mphyp_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) -{ - uint64_t final_pteg_count = 0; - char buf[8]; - uint32_t prop[2]; - uint32_t nptlp, shift = 0, slb_encoding = 0; - uint32_t lp_size, lp_encoding; - struct lpte old; - uint64_t vsid; - phandle_t dev, node, root; - int idx, len, res; - bool has_lp; - - rm_init(&mphyp_eviction_lock, "pte eviction"); - - moea64_early_bootstrap(kernelstart, kernelend); - - root = OF_peer(0); - - dev = OF_child(root); - while (dev != 0) { - res = OF_getprop(dev, "name", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "cpus") == 0) - break; - dev = OF_peer(dev); - } - - node = OF_child(dev); - - while (node != 0) { - res = OF_getprop(node, "device_type", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "cpu") == 0) - break; - node = OF_peer(node); - } - - res = OF_getencprop(node, "ibm,pft-size", prop, sizeof(prop)); - if (res <= 0) - panic("mmu_phyp: unknown PFT size"); - final_pteg_count = 1 << prop[1]; - res = OF_getencprop(node, "ibm,slb-size", prop, sizeof(prop[0])); - if (res > 0) - n_slbs = prop[0]; - dprintf0("slb-size=%i\n", n_slbs); - - moea64_pteg_count = final_pteg_count / sizeof(struct lpteg); - - /* Clear any old page table entries */ - for (idx = 0; idx < moea64_pteg_count*8; idx++) { - phyp_pft_hcall(H_READ, 0, idx, 0, 0, &old.pte_hi, - &old.pte_lo, &old.pte_lo); - vsid = (old.pte_hi << (ADDR_API_SHFT64 - ADDR_PIDX_SHFT)) >> 28; - if (vsid == VSID_VRMA || vsid == 0 /* Older VRMA */) - continue; - - if (old.pte_hi & LPTE_VALID) - phyp_hcall(H_REMOVE, 0, idx, 0); - } - - /* - * Scan the large page size property for PAPR compatible machines. - * See PAPR D.5 Changes to Section 5.1.4, 'CPU Node Properties' - * for the encoding of the property. - */ - - len = OF_getproplen(node, "ibm,segment-page-sizes"); - if (len > 0) { - /* - * We have to use a variable length array on the stack - * since we have very limited stack space. - */ - pcell_t arr[len/sizeof(cell_t)]; - res = OF_getencprop(node, "ibm,segment-page-sizes", arr, - sizeof(arr)); - len /= 4; - idx = 0; - has_lp = false; - while (len > 0) { - shift = arr[idx]; - slb_encoding = arr[idx + 1]; - nptlp = arr[idx + 2]; - - dprintf0("Segment Page Size: " - "%uKB, slb_enc=0x%X: {size, encoding}[%u] =", - shift > 10? 1 << (shift-10) : 0, - slb_encoding, nptlp); - - idx += 3; - len -= 3; - while (len > 0 && nptlp) { - lp_size = arr[idx]; - lp_encoding = arr[idx+1]; - - dprintf(" {%uKB, 0x%X}", - lp_size > 10? 1 << (lp_size-10) : 0, - lp_encoding); - - if (slb_encoding == SLBV_L && lp_encoding == 0) - has_lp = true; - - if (slb_encoding == SLB_PGSZ_4K_4K && - lp_encoding == LP_4K_16M) - moea64_has_lp_4k_16m = true; - - idx += 2; - len -= 2; - nptlp--; - } - dprintf("\n"); - if (has_lp && moea64_has_lp_4k_16m) - break; - } - - if (has_lp) { - moea64_large_page_shift = shift; - moea64_large_page_size = 1ULL << lp_size; - moea64_large_page_mask = moea64_large_page_size - 1; - hw_direct_map = 1; - printf(MMU_PHYP_ID - "Support for hugepages of %uKB detected\n", - moea64_large_page_shift > 10? - 1 << (moea64_large_page_shift-10) : 0); - } else { - moea64_large_page_size = 0; - moea64_large_page_shift = 0; - moea64_large_page_mask = 0; - hw_direct_map = 0; - printf(MMU_PHYP_ID - "Support for hugepages not found\n"); - } - } - - moea64_mid_bootstrap(kernelstart, kernelend); - moea64_late_bootstrap(kernelstart, kernelend); - - /* Test for broken versions of KVM that don't conform to the spec */ - if (phyp_hcall(H_CLEAR_MOD, 0, 0) == H_FUNCTION) - brokenkvm = 1; -} - -static void -mphyp_cpu_bootstrap(int ap) -{ - struct slb *slb = PCPU_GET(aim.slb); - register_t seg0; - int i; - - /* - * Install kernel SLB entries - */ - - __asm __volatile ("slbia"); - __asm __volatile ("slbmfee %0,%1; slbie %0;" : "=r"(seg0) : "r"(0)); - for (i = 0; i < 64; i++) { - if (!(slb[i].slbe & SLBE_VALID)) - continue; - - __asm __volatile ("slbmte %0, %1" :: - "r"(slb[i].slbv), "r"(slb[i].slbe)); - } -} - -static int64_t -mphyp_pte_synch(struct pvo_entry *pvo) -{ - struct lpte pte; - uint64_t junk; - - __asm __volatile("ptesync"); - phyp_pft_hcall(H_READ, 0, pvo->pvo_pte.slot, 0, 0, &pte.pte_hi, - &pte.pte_lo, &junk); - if ((pte.pte_hi & LPTE_AVPN_MASK) != - ((pvo->pvo_vpn >> (ADDR_API_SHFT64 - ADDR_PIDX_SHFT)) & - LPTE_AVPN_MASK)) - return (-1); - if (!(pte.pte_hi & LPTE_VALID)) - return (-1); - - return (pte.pte_lo & (LPTE_CHG | LPTE_REF)); -} - -static int64_t -mphyp_pte_clear(struct pvo_entry *pvo, uint64_t ptebit) -{ - struct rm_priotracker track; - int64_t refchg; - uint64_t ptelo, junk; - int err; - - /* - * This involves two steps (synch and clear) so we need the entry - * not to change in the middle. We are protected against deliberate - * unset by virtue of holding the pmap lock. Protection against - * incidental unset (page table eviction) comes from holding the - * shared eviction lock. - */ - PMAP_LOCK_ASSERT(pvo->pvo_pmap, MA_OWNED); - rm_rlock(&mphyp_eviction_lock, &track); - - refchg = mphyp_pte_synch(pvo); - if (refchg < 0) { - rm_runlock(&mphyp_eviction_lock, &track); - return (refchg); - } - - if (brokenkvm) { - /* - * No way to clear either bit, which is total madness. - * Pessimistically claim that, once modified, it stays so - * forever and that it is never referenced. - */ - rm_runlock(&mphyp_eviction_lock, &track); - return (refchg & ~LPTE_REF); - } - - if (ptebit & LPTE_CHG) { - err = phyp_pft_hcall(H_CLEAR_MOD, 0, pvo->pvo_pte.slot, 0, 0, - &ptelo, &junk, &junk); - KASSERT(err == H_SUCCESS, - ("Error clearing page change bit: %d", err)); - refchg |= (ptelo & LPTE_CHG); - } - if (ptebit & LPTE_REF) { - err = phyp_pft_hcall(H_CLEAR_REF, 0, pvo->pvo_pte.slot, 0, 0, - &ptelo, &junk, &junk); - KASSERT(err == H_SUCCESS, - ("Error clearing page reference bit: %d", err)); - refchg |= (ptelo & LPTE_REF); - } - - rm_runlock(&mphyp_eviction_lock, &track); - - return (refchg); -} - -static int64_t -mphyp_pte_unset(struct pvo_entry *pvo) -{ - struct lpte pte; - uint64_t junk; - int err; - - PMAP_LOCK_ASSERT(pvo->pvo_pmap, MA_OWNED); - - moea64_pte_from_pvo(pvo, &pte); - - err = phyp_pft_hcall(H_REMOVE, H_AVPN, pvo->pvo_pte.slot, - pte.pte_hi & LPTE_AVPN_MASK, 0, &pte.pte_hi, &pte.pte_lo, - &junk); - KASSERT(err == H_SUCCESS || err == H_NOT_FOUND, - ("Error removing page: %d", err)); - - if (err == H_NOT_FOUND) { - STAT_MOEA64(moea64_pte_overflow--); - return (-1); - } - - return (pte.pte_lo & (LPTE_REF | LPTE_CHG)); -} - -static uintptr_t -mphyp_pte_spillable_ident(uintptr_t ptegbase, struct lpte *to_evict) -{ - uint64_t slot, junk, k; - struct lpte pt; - int i, j; - - /* Start at a random slot */ - i = mftb() % 8; - k = -1; - for (j = 0; j < 8; j++) { - slot = ptegbase + (i + j) % 8; - phyp_pft_hcall(H_READ, 0, slot, 0, 0, &pt.pte_hi, - &pt.pte_lo, &junk); - - if ((pt.pte_hi & (LPTE_WIRED | LPTE_BIG)) != 0) - continue; - - /* This is a candidate, so remember it */ - k = slot; - - /* Try to get a page that has not been used lately */ - if (!(pt.pte_hi & LPTE_VALID) || !(pt.pte_lo & LPTE_REF)) { - memcpy(to_evict, &pt, sizeof(struct lpte)); - return (k); - } - } - - if (k == -1) - return (k); - - phyp_pft_hcall(H_READ, 0, k, 0, 0, &to_evict->pte_hi, - &to_evict->pte_lo, &junk); - return (k); -} - -static __inline int64_t -mphyp_pte_insert_locked(struct pvo_entry *pvo, struct lpte *pte) -{ - struct lpte evicted; - uint64_t index, junk; - int64_t result; - - /* - * First try primary hash. - */ - pvo->pvo_pte.slot &= ~7UL; /* Base slot address */ - result = phyp_pft_hcall(H_ENTER, 0, pvo->pvo_pte.slot, pte->pte_hi, - pte->pte_lo, &index, &evicted.pte_lo, &junk); - if (result == H_SUCCESS) { - pvo->pvo_pte.slot = index; - return (0); - } - KASSERT(result == H_PTEG_FULL, ("Page insertion error: %ld " - "(ptegidx: %#zx/%#lx, PTE %#lx/%#lx", result, pvo->pvo_pte.slot, - moea64_pteg_count, pte->pte_hi, pte->pte_lo)); - - /* - * Next try secondary hash. - */ - pvo->pvo_vaddr ^= PVO_HID; - pte->pte_hi ^= LPTE_HID; - pvo->pvo_pte.slot ^= (moea64_pteg_mask << 3); - - result = phyp_pft_hcall(H_ENTER, 0, pvo->pvo_pte.slot, - pte->pte_hi, pte->pte_lo, &index, &evicted.pte_lo, &junk); - if (result == H_SUCCESS) { - pvo->pvo_pte.slot = index; - return (0); - } - KASSERT(result == H_PTEG_FULL, ("Secondary page insertion error: %ld", - result)); - - return (-1); -} - - -static __inline int64_t -mphyp_pte_evict_and_insert_locked(struct pvo_entry *pvo, struct lpte *pte) -{ - struct lpte evicted; - uint64_t index, junk, lastptelo; - int64_t result; - - evicted.pte_hi = 0; - - index = mphyp_pte_spillable_ident(pvo->pvo_pte.slot, &evicted); - if (index == -1L) { - /* Try other hash table? */ - pvo->pvo_vaddr ^= PVO_HID; - pte->pte_hi ^= LPTE_HID; - pvo->pvo_pte.slot ^= (moea64_pteg_mask << 3); - index = mphyp_pte_spillable_ident(pvo->pvo_pte.slot, &evicted); - } - - if (index == -1L) { - /* No freeable slots in either PTEG? We're hosed. */ - rm_wunlock(&mphyp_eviction_lock); - panic("mphyp_pte_insert: overflow"); - return (-1); - } - - /* Victim acquired: update page before waving goodbye */ - if (evicted.pte_hi & LPTE_VALID) { - result = phyp_pft_hcall(H_REMOVE, H_AVPN, index, - evicted.pte_hi & LPTE_AVPN_MASK, 0, &junk, &lastptelo, - &junk); - STAT_MOEA64(moea64_pte_overflow++); - KASSERT(result == H_SUCCESS || result == H_NOT_FOUND, - ("Error evicting page: %d", (int)result)); - } - - /* - * Set the new PTE. - */ - result = phyp_pft_hcall(H_ENTER, H_EXACT, index, pte->pte_hi, - pte->pte_lo, &index, &evicted.pte_lo, &junk); - - pvo->pvo_pte.slot = index; - if (result == H_SUCCESS) - return (0); - - rm_wunlock(&mphyp_eviction_lock); - panic("Page replacement error: %ld", result); - return (result); -} - -static int64_t -mphyp_pte_insert(struct pvo_entry *pvo) -{ - struct rm_priotracker track; - int64_t ret; - struct lpte pte; - - PMAP_LOCK_ASSERT(pvo->pvo_pmap, MA_OWNED); - - /* Initialize PTE */ - moea64_pte_from_pvo(pvo, &pte); - - /* Make sure further insertion is locked out during evictions */ - rm_rlock(&mphyp_eviction_lock, &track); - - ret = mphyp_pte_insert_locked(pvo, &pte); - rm_runlock(&mphyp_eviction_lock, &track); - - if (ret == -1) { - /* - * Out of luck. Find a PTE to sacrifice. - */ - - /* Lock out all insertions for a bit */ - rm_wlock(&mphyp_eviction_lock); - ret = mphyp_pte_evict_and_insert_locked(pvo, &pte); - rm_wunlock(&mphyp_eviction_lock); /* All clear */ - } - - return (ret); -} - -static void * -mphyp_dump_pmap(void *ctx, void *buf, u_long *nbytes) -{ - struct dump_context *dctx; - struct lpte p, *pbuf; - int bufidx; - uint64_t junk; - u_long ptex, ptex_end; - - dctx = (struct dump_context *)ctx; - pbuf = (struct lpte *)buf; - bufidx = 0; - ptex = dctx->ptex; - ptex_end = ptex + dctx->blksz / sizeof(struct lpte); - ptex_end = MIN(ptex_end, dctx->ptex_end); - *nbytes = (ptex_end - ptex) * sizeof(struct lpte); - - if (*nbytes == 0) - return (NULL); - - for (; ptex < ptex_end; ptex++) { - phyp_pft_hcall(H_READ, 0, ptex, 0, 0, - &p.pte_hi, &p.pte_lo, &junk); - pbuf[bufidx++] = p; - } - - dctx->ptex = ptex; - return (buf); -} - -static int64_t -mphyp_pte_unset_sp(struct pvo_entry *pvo) -{ - struct lpte pte; - uint64_t junk, refchg; - int err; - vm_offset_t eva; - pmap_t pm; - - pm = pvo->pvo_pmap; - PMAP_LOCK_ASSERT(pm, MA_OWNED); - KASSERT((PVO_VADDR(pvo) & HPT_SP_MASK) == 0, - ("%s: va %#jx unaligned", __func__, (uintmax_t)PVO_VADDR(pvo))); - - refchg = 0; - eva = PVO_VADDR(pvo) + HPT_SP_SIZE; - - for (; pvo != NULL && PVO_VADDR(pvo) < eva; - pvo = RB_NEXT(pvo_tree, &pm->pmap_pvo, pvo)) { - moea64_pte_from_pvo(pvo, &pte); - - err = phyp_pft_hcall(H_REMOVE, H_AVPN, pvo->pvo_pte.slot, - pte.pte_hi & LPTE_AVPN_MASK, 0, &pte.pte_hi, &pte.pte_lo, - &junk); - KASSERT(err == H_SUCCESS || err == H_NOT_FOUND, - ("Error removing page: %d", err)); - - if (err == H_NOT_FOUND) - STAT_MOEA64(moea64_pte_overflow--); - refchg |= pte.pte_lo & (LPTE_REF | LPTE_CHG); - } - - return (refchg); -} - -static int64_t -mphyp_pte_insert_sp(struct pvo_entry *pvo) -{ - struct rm_priotracker track; - int64_t ret; - struct lpte pte; - vm_offset_t eva; - pmap_t pm; - - pm = pvo->pvo_pmap; - PMAP_LOCK_ASSERT(pm, MA_OWNED); - KASSERT((PVO_VADDR(pvo) & HPT_SP_MASK) == 0, - ("%s: va %#jx unaligned", __func__, (uintmax_t)PVO_VADDR(pvo))); - - eva = PVO_VADDR(pvo) + HPT_SP_SIZE; - - /* Make sure further insertion is locked out during evictions */ - rm_rlock(&mphyp_eviction_lock, &track); - - for (; pvo != NULL && PVO_VADDR(pvo) < eva; - pvo = RB_NEXT(pvo_tree, &pm->pmap_pvo, pvo)) { - /* Initialize PTE */ - moea64_pte_from_pvo(pvo, &pte); - - ret = mphyp_pte_insert_locked(pvo, &pte); - if (ret == -1) { - /* - * Out of luck. Find a PTE to sacrifice. - */ - - /* Lock out all insertions for a bit */ - rm_runlock(&mphyp_eviction_lock, &track); - rm_wlock(&mphyp_eviction_lock); - mphyp_pte_evict_and_insert_locked(pvo, &pte); - rm_wunlock(&mphyp_eviction_lock); /* All clear */ - rm_rlock(&mphyp_eviction_lock, &track); - } - } - - rm_runlock(&mphyp_eviction_lock, &track); - return (0); -} - -static int64_t -mphyp_pte_replace_sp(struct pvo_entry *pvo) -{ - int64_t refchg; - - refchg = mphyp_pte_unset_sp(pvo); - mphyp_pte_insert_sp(pvo); - return (refchg); -} diff --git a/sys/powerpc/pseries/phyp-hvcall.S b/sys/powerpc/pseries/phyp-hvcall.S deleted file mode 100644 index 8c708a8e530..00000000000 --- a/sys/powerpc/pseries/phyp-hvcall.S +++ /dev/null @@ -1,74 +0,0 @@ -/*- - * Copyright (C) 2010 Andreas Tobler - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#include - -/* Hypervisor entry call. */ -#define hc .long 0x44000022 - -/* - * Simple HV calls take the same arguments, with the same ABI, as this - * C function - */ -ASENTRY(phyp_hcall) - mflr %r0 - std %r0,16(%r1) -#if defined(_CALL_ELF) && _CALL_ELF == 2 - ld %r11,96(%r1) /* Last couple args into volatile regs*/ - ld %r12,104(%r1) -#else - ld %r11,112(%r1) /* Last couple args into volatile regs*/ - ld %r12,120(%r1) -#endif - hc /* invoke the hypervisor */ - ld %r0,16(%r1) - mtlr %r0 - blr /* return r3 = status */ -ASEND(phyp_hcall) - -/* - * PFT HV calls take a special ABI (see PAPR 14.5.4.1) - * - * r3-r7 arguments passed unchanged, r8-r10 are addresses of return values - * HV takes the same r3-r7, but returns values in r3, r4-r6 - */ -ASENTRY(phyp_pft_hcall) - mflr %r0 - std %r0,16(%r1) - stdu %r1,-80(%r1) - std %r8,48(%r1) /* save arguments */ - std %r9,56(%r1) - std %r10,64(%r1) - hc /* invoke the hypervisor */ - ld %r11,48(%r1) /* store results */ - std %r4,0(%r11) - ld %r11,56(%r1) - std %r5,0(%r11) - ld %r11,64(%r1) - std %r6,0(%r11) - ld %r1,0(%r1) /* exit */ - ld %r0,16(%r1) - mtlr %r0 - blr /* return r3 = status */ -ASEND(phyp_pft_hcall) diff --git a/sys/powerpc/pseries/phyp-hvcall.h b/sys/powerpc/pseries/phyp-hvcall.h deleted file mode 100644 index 81e60353168..00000000000 --- a/sys/powerpc/pseries/phyp-hvcall.h +++ /dev/null @@ -1,341 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2010 Andreas Tobler - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _PSERIES_PHYP_HVCALL_H_ -#define _PSERIES_PHYP_HVCALL_H_ - -/* Information taken from: Power.org PAPR, Version 2.4 (December 7, 2009). */ - -#include - -/* Return codes. */ - -#define H_SUCCESS 0 -#define H_BUSY 1 /* Hardware Busy -- Retry Later. */ -#define H_CLOSED 2 /* Virtual I/O connection is closed. */ -#define H_NOT_AVAILABLE 3 -#define H_CONSTRAINED 4 /* The request called for resources in excess of - the maximum allowed. The resultant allocation - was constrained to maximum allowed. */ -#define H_PARTIAL 5 /* The request completed only partially successful. - Parameters were valid but some specific hcall - function condition prevented fully completing the - architected function, see the specific hcall - definition for possible reasons. */ -#define H_IN_PROGRESS 14 -#define H_PAGE_REGISTERED 15 -#define H_PARTIAL_STORE 16 -#define H_PENDING 17 -#define H_CONTINUE 18 - -#define H_LONG_BUSY_ORDER_1_MS 9900 /* This return code is identical to - H_BUSY, but with the added bonus of a - hint to the partition OS. If the - partition OS can delay for 1 - millisecond, the hcall will likely - succeed on a new hcall with no further - busy return codes. If the partition OS - cannot handle a delay, they are - certainly free to immediately turn - around and try again. */ -#define H_LONG_BUSY_ORDER_10_MS 9901 /* Similar to H_LONG_BUSY_ORDER_1_MS, but - the hint is 10mSec wait this time. */ - -#define H_LONG_BUSY_ORDER_100_MS 9902 /* Similar to H_LONG_BUSY_ORDER_1_MS, but - the hint is 100mSec wait this time. */ - -#define H_LONG_BUSY_ORDER_1_S 9903 /* Similar to H_LONG_BUSY_ORDER_1_MS, but - the hint is 1Sec wait this time. */ -#define H_LONG_BUSY_ORDER_10_S 9904 /* Similar to H_LONG_BUSY_ORDER_1_MS, but - the hint is 10Sec wait this time. */ -#define H_LONG_BUSY_ORDER_100_S 9905 /* Similar to H_LONG_BUSY_ORDER_1_MS, but - the hint is 100Sec wait this time. */ - -#define H_HARDWARE -1 /* Error. */ -#define H_FUNCTION -2 /* Not supported. */ -#define H_PRIVILEGE -3 /* Caller not in privileged mode. */ -#define H_PARAMETER -4 /* Outside valid range for partition or conflicting. */ -#define H_BAD_MODE -5 /* Illegal MSR value. */ -#define H_PTEG_FULL -6 /* The requested pteg was full. */ -#define H_NOT_FOUND -7 /* The requested entitiy was not found. */ -#define H_RESERVED_DABR -8 /* The requested address is reserved by the - hypervisor on this processor. */ -#define H_NOMEM -9 -#define H_AUTHORITY -10 /* The caller did not have authority to perform the - function. */ -#define H_PERMISSION -11 /* The mapping specified by the request does not - allow for the requested transfer. */ -#define H_DROPPED -12 /* One or more packets could not be delivered to - their requested destinations. */ -#define H_S_PARM -13 /* The source parameter is illegal. */ -#define H_D_PARM -14 /* The destination parameter is illegal. */ -#define H_R_PARM -15 /* The remote TCE mapping is illegal. */ -#define H_RESOURCE -16 /* One or more required resources are in use. */ -#define H_ADAPTER_PARM -17 /* Invalid adapter. */ -#define H_RH_PARM -18 /* Resource not valid or logical partition - conflicting. */ -#define H_RCQ_PARM -19 /* RCQ not valid or logical partition conflicting. */ -#define H_SCQ_PARM -20 /* SCQ not valid or logical partition conflicting. */ -#define H_EQ_PARM -21 /* EQ not valid or logical partition conflicting. */ -#define H_RT_PARM -22 /* Invalid resource type. */ -#define H_ST_PARM -23 /* Invalid service type. */ -#define H_SIGT_PARM -24 /* Invalid signalling type. */ -#define H_TOKEN_PARM -25 /* Invalid token. */ -#define H_MLENGTH_PARM -27 /* Invalid memory length. */ -#define H_MEM_PARM -28 /* Invalid memory I/O virtual address. */ -#define H_MEM_ACCESS_PARM -29 /* Invalid memory access control. */ -#define H_ATTR_PARM -30 /* Invalid attribute value. */ -#define H_PORT_PARM -31 /* Invalid port number. */ -#define H_MCG_PARM -32 /* Invalid multicast group. */ -#define H_VL_PARM -33 /* Invalid virtual lane. */ -#define H_TSIZE_PARM -34 /* Invalid trace size. */ -#define H_TRACE_PARM -35 /* Invalid trace buffer. */ -#define H_MASK_PARM -37 /* Invalid mask value. */ -#define H_MCG_FULL -38 /* Multicast attachments exceeded. */ -#define H_ALIAS_EXIST -39 /* Alias QP already defined. */ -#define H_P_COUNTER -40 /* Invalid counter specification. */ -#define H_TABLE_FULL -41 /* Resource page table full. */ -#define H_ALT_TABLE -42 /* Alternate table already exists / alternate page - table not available. */ -#define H_MR_CONDITION -43 /* Invalid memory region condition. */ -#define H_NOT_ENOUGH_RESOURCES -44 /* Insufficient resources. */ -#define H_R_STATE -45 /* Invalid resource state condition or sequencing - error. */ -#define H_RESCINDED -46 -#define H_ABORTED -54 -#define H_P2 -55 -#define H_P3 -56 -#define H_P4 -57 -#define H_P5 -58 -#define H_P6 -59 -#define H_P7 -60 -#define H_P8 -61 -#define H_P9 -62 -#define H_NOOP -63 -#define H_TOO_BIG -64 - -#define H_UNSUPPORTED -67 /* Parameter value outside of the range supported - by this implementation. */ - -/* Flags. */ -/* Table 168. Page Frame Table Access flags field definition. */ -#define H_EXACT (1UL<<(63-24)) -#define H_R_XLATE (1UL<<(63-25)) -#define H_READ_4 (1UL<<(63-26)) - -/* Table 178. CMO Page Usage State flags Definition. */ -#define H_PAGE_STATE_CHANGE (1UL<<(63-28)) -#define H_PAGE_UNUSED ((1UL<<(63-29)) | (1UL<<(63-30))) -#define H_PAGE_SET_UNUSED (H_PAGE_STATE_CHANGE | H_PAGE_UNUSED) -#define H_PAGE_SET_LOANED (H_PAGE_SET_UNUSED | (1UL<<(63-31))) -#define H_PAGE_SET_ACTIVE H_PAGE_STATE_CHANGE - -/* Table 168. Page Frame Table Access flags field definition. */ -#define H_AVPN (1UL<<(63-32)) -#define H_ANDCOND (1UL<<(63-33)) - -#define H_ICACHE_INVALIDATE (1UL<<(63-40)) -#define H_ICACHE_SYNCHRONIZE (1UL<<(63-41)) - -#define H_ZERO_PAGE (1UL<<(63-48)) -#define H_COPY_PAGE (1UL<<(63-49)) - -#define H_N (1UL<<(63-61)) -#define H_PP1 (1UL<<(63-62)) -#define H_PP2 (1UL<<(63-63)) - -/* H_SET_MODE resource identifiers from 14.5.4.3.5. */ -#define H_SET_MODE_RSRC_CIABR 0x1 /* All versions */ -#define H_SET_MODE_RSRC_DAWR0 0x2 /* All versions */ -#define H_SET_MODE_RSRC_INTR_TRANS_MODE 0x3 /* All versions */ -#define H_SET_MODE_RSRC_ILE 0x4 /* PAPR 2.8 / ISA 2.07 */ -#define H_SET_MODE_RSRC_DAWR1 0x5 /* ISA 3.1 Future support */ - -/* H_REGISTER_PROC_TBL identifiers. */ -#define PROC_TABLE_OP_MASK 0x18 -#define PROC_TABLE_DEREG 0x10 -#define PROC_TABLE_NEW 0x18 -#define PROC_TABLE_TYPE_MASK 0x06 -#define PROC_TABLE_HPT_SLB 0x00 -#define PROC_TABLE_GTSE 0x01 -#define PROC_TABLE_HPT_PT 0x02 -#define PROC_TABLE_RADIX 0x04 - -/* pSeries hypervisor opcodes. */ -#define H_REMOVE 0x04 -#define H_ENTER 0x08 -#define H_READ 0x0c -#define H_CLEAR_MOD 0x10 -#define H_CLEAR_REF 0x14 -#define H_PROTECT 0x18 -#define H_GET_TCE 0x1c -#define H_PUT_TCE 0x20 -#define H_SET_SPRG0 0x24 -#define H_SET_DABR 0x28 -#define H_PAGE_INIT 0x2c -#define H_SET_ASR 0x30 -#define H_ASR_ON 0x34 -#define H_ASR_OFF 0x38 -#define H_LOGICAL_CI_LOAD 0x3c -#define H_LOGICAL_CI_STORE 0x40 -#define H_LOGICAL_CACHE_LOAD 0x44 -#define H_LOGICAL_CACHE_STORE 0x48 -#define H_LOGICAL_ICBI 0x4c -#define H_LOGICAL_DCBF 0x50 -#define H_GET_TERM_CHAR 0x54 -#define H_PUT_TERM_CHAR 0x58 -#define H_REAL_TO_LOGICAL 0x5c -#define H_HYPERVISOR_DATA 0x60 -#define H_EOI 0x64 -#define H_CPPR 0x68 -#define H_IPI 0x6c -#define H_IPOLL 0x70 -#define H_XIRR 0x74 -#define H_MIGRATE_DMA 0x78 -#define H_PERFMON 0x7c -#define H_REGISTER_VPA 0xdc -#define H_CEDE 0xe0 -#define H_CONFER 0xe4 -#define H_PROD 0xe8 -#define H_GET_PPP 0xec -#define H_SET_PPP 0xf0 -#define H_PURR 0xf4 -#define H_PIC 0xf8 -#define H_REG_CRQ 0xfc -#define H_FREE_CRQ 0x100 -#define H_VIO_SIGNAL 0x104 -#define H_SEND_CRQ 0x108 -#define H_PUT_RTCE 0x10c -#define H_COPY_RDMA 0x110 -#define H_REGISTER_LOGICAL_LAN 0x114 -#define H_FREE_LOGICAL_LAN 0x118 -#define H_ADD_LOGICAL_LAN_BUFFER 0x11c -#define H_SEND_LOGICAL_LAN 0x120 -#define H_BULK_REMOVE 0x124 -#define H_WRITE_RDMA 0x128 -#define H_READ_RDMA 0x12c -#define H_MULTICAST_CTRL 0x130 -#define H_SET_XDABR 0x134 -#define H_STUFF_TCE 0x138 -#define H_PUT_TCE_INDIRECT 0x13c -#define H_PUT_RTCE_INDIRECT 0x140 -#define H_CHANGE_LOGICAL_LAN_MAC 0x14c -#define H_VTERM_PARTNER_INFO 0x150 -#define H_REGISTER_VTERM 0x154 -#define H_FREE_VTERM 0x158 -/* Reserved .... -#define H_RESET_EVENTS 0x15c -#define H_ALLOC_RESOURCE 0x160 -#define H_FREE_RESOURCE 0x164 -#define H_MODIFY_QP 0x168 -#define H_QUERY_QP 0x16c -#define H_REREGISTER_PMR 0x170 -#define H_REGISTER_SMR 0x174 -#define H_QUERY_MR 0x178 -#define H_QUERY_MW 0x17c -#define H_QUERY_HCA 0x180 -#define H_QUERY_PORT 0x184 -#define H_MODIFY_PORT 0x188 -#define H_DEFINE_AQP1 0x18c -#define H_GET_TRACE_BUFFER 0x190 -#define H_DEFINE_AQP0 0x194 -#define H_RESIZE_MR 0x198 -#define H_ATTACH_MCQP 0x19c -#define H_DETACH_MCQP 0x1a0 -#define H_CREATE_RPT 0x1a4 -#define H_REMOVE_RPT 0x1a8 -#define H_REGISTER_RPAGES 0x1ac -#define H_DISABLE_AND_GETC 0x1b0 -#define H_ERROR_DATA 0x1b4 -#define H_GET_HCA_INFO 0x1b8 -#define H_GET_PERF_COUNT 0x1bc -#define H_MANAGE_TRACE 0x1c0 -.... */ -#define H_FREE_LOGICAL_LAN_BUFFER 0x1d4 -#define H_POLL_PENDING 0x1d8 -/* Reserved .... -#define H_QUERY_INT_STATE 0x1e4 -.... */ -#define H_LIOBN_ATTRIBUTES 0x240 -#define H_ILLAN_ATTRIBUTES 0x244 -#define H_REMOVE_RTCE 0x24c -/* Reserved ... -#define H_MODIFY_HEA_QP 0x250 -#define H_QUERY_HEA_QP 0x254 -#define H_QUERY_HEA 0x258 -#define H_QUERY_HEA_PORT 0x25c -#define H_MODIFY_HEA_PORT 0x260 -#define H_REG_BCMC 0x264 -#define H_DEREG_BCMC 0x268 -#define H_REGISTER_HEA_RPAGES 0x26c -#define H_DISABLE_AND_GET_HEA 0x270 -#define H_GET_HEA_INFO 0x274 -#define H_ALLOC_HEA_RESOURCE 0x278 -#define H_ADD_CONN 0x284 -#define H_DEL_CONN 0x288 -... */ -#define H_JOIN 0x298 -#define H_DONOR_OPERATION 0x29c -#define H_VASI_SIGNAL 0x2a0 -#define H_VASI_STATE 0x2a4 -#define H_VIOCTL 0x2a8 -#define H_VRMASD 0x2ac -#define H_ENABLE_CRQ 0x2b0 -/* Reserved ... -#define H_GET_EM_PARMS 0x2b8 -... */ -#define H_VPM_STAT 0x2bc -#define H_SET_MPP 0x2d0 -#define H_GET_MPP 0x2d4 -#define H_MO_PERF 0x2d8 -#define H_REG_SUB_CRQ 0x2dc -#define H_FREE_SUB_CRQ 0x2e0 -#define H_SEND_SUB_CRQ 0x2e4 -#define H_SEND_SUB_CRQ_IND 0x2e8 -#define H_HOME_NODE_ASSOC 0x2ec -/* Reserved ... */ -#define H_BEST_ENERGY 0x2f4 -#define H_REG_SNS 0x2f8 -#define H_X_XIRR 0x2fc -#define H_RANDOM 0x300 -/* Reserved ... */ -#define H_COP_OP 0x304 -#define H_STOP_COP_OP 0x308 -#define H_GET_MPP_X 0x314 -#define H_SET_MODE 0x31C -/* Reserved ... */ -#define H_GET_DMA_XLATES_L 0x324 -/* Reserved ... */ -#define H_REGISTER_PROC_TBL 0x37c -#define MAX_HCALL_OPCODE H_REGISTER_PROC_TBL - -int64_t phyp_hcall(uint64_t opcode, ...); -int64_t phyp_pft_hcall(uint64_t opcode, uint64_t flags, uint64_t pteidx, - uint64_t pte_hi, uint64_t pte_lo, uint64_t *pteidx_out, uint64_t *ptelo_out, - uint64_t *r6); - -#endif /* _PSERIES_PHYP_HVCALL_H_ */ diff --git a/sys/powerpc/pseries/phyp_console.c b/sys/powerpc/pseries/phyp_console.c deleted file mode 100644 index 414de5ee5df..00000000000 --- a/sys/powerpc/pseries/phyp_console.c +++ /dev/null @@ -1,458 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2011 by Nathan Whitehorn. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "phyp-hvcall.h" -#include "uart_if.h" - -struct uart_phyp_softc { - device_t dev; - phandle_t node; - int vtermid; - - struct tty *tp; - struct resource *irqres; - int irqrid; - struct callout callout; - void *sc_icookie; - int polltime; - - struct mtx sc_mtx; - int protocol; - - union { - uint64_t u64[2]; - char str[16]; - } phyp_inbuf; - uint64_t inbuflen; - uint8_t outseqno; -}; - -static struct uart_phyp_softc *console_sc = NULL; -#if defined(KDB) -static int alt_break_state; -#endif - -enum { - HVTERM1, HVTERMPROT -}; - -#define VS_DATA_PACKET_HEADER 0xff -#define VS_CONTROL_PACKET_HEADER 0xfe -#define VSV_SET_MODEM_CTL 0x01 -#define VSV_MODEM_CTL_UPDATE 0x02 -#define VSV_RENEGOTIATE_CONNECTION 0x03 -#define VS_QUERY_PACKET_HEADER 0xfd -#define VSV_SEND_VERSION_NUMBER 0x01 -#define VSV_SEND_MODEM_CTL_STATUS 0x02 -#define VS_QUERY_RESPONSE_PACKET_HEADER 0xfc - -static int uart_phyp_probe(device_t dev); -static int uart_phyp_attach(device_t dev); -static void uart_phyp_intr(void *v); - -static device_method_t uart_phyp_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, uart_phyp_probe), - DEVMETHOD(device_attach, uart_phyp_attach), - - DEVMETHOD_END -}; - -static driver_t uart_phyp_driver = { - "uart", - uart_phyp_methods, - sizeof(struct uart_phyp_softc), -}; - -DRIVER_MODULE(uart_phyp, vdevice, uart_phyp_driver, uart_devclass, 0, 0); - -static cn_probe_t uart_phyp_cnprobe; -static cn_init_t uart_phyp_cninit; -static cn_term_t uart_phyp_cnterm; -static cn_getc_t uart_phyp_cngetc; -static cn_putc_t uart_phyp_cnputc; -static cn_grab_t uart_phyp_cngrab; -static cn_ungrab_t uart_phyp_cnungrab; - -CONSOLE_DRIVER(uart_phyp); - -static void uart_phyp_ttyoutwakeup(struct tty *tp); - -static struct ttydevsw uart_phyp_tty_class = { - .tsw_flags = TF_INITLOCK|TF_CALLOUT, - .tsw_outwakeup = uart_phyp_ttyoutwakeup, -}; - -static int -uart_phyp_probe_node(struct uart_phyp_softc *sc) -{ - phandle_t node = sc->node; - uint32_t reg; - char buf[64]; - - sc->inbuflen = 0; - sc->outseqno = 0; - - if (OF_getprop(node, "name", buf, sizeof(buf)) <= 0) - return (ENXIO); - if (strcmp(buf, "vty") != 0) - return (ENXIO); - - if (OF_getprop(node, "device_type", buf, sizeof(buf)) <= 0) - return (ENXIO); - if (strcmp(buf, "serial") != 0) - return (ENXIO); - - reg = -1; - OF_getencprop(node, "reg", ®, sizeof(reg)); - if (reg == -1) - return (ENXIO); - sc->vtermid = reg; - sc->node = node; - - if (OF_getprop(node, "compatible", buf, sizeof(buf)) <= 0) - return (ENXIO); - if (strcmp(buf, "hvterm1") == 0) { - sc->protocol = HVTERM1; - return (0); - } else if (strcmp(buf, "hvterm-protocol") == 0) { - sc->protocol = HVTERMPROT; - return (0); - } - - return (ENXIO); -} - -static int -uart_phyp_probe(device_t dev) -{ - const char *name; - struct uart_phyp_softc sc; - int err; - - name = ofw_bus_get_name(dev); - if (name == NULL || strcmp(name, "vty") != 0) - return (ENXIO); - - sc.node = ofw_bus_get_node(dev); - err = uart_phyp_probe_node(&sc); - if (err != 0) - return (err); - - device_set_desc(dev, "POWER Hypervisor Virtual Serial Port"); - - return (err); -} - -static void -uart_phyp_cnprobe(struct consdev *cp) -{ - char buf[64]; - ihandle_t stdout; - phandle_t input, chosen; - static struct uart_phyp_softc sc; - - if ((chosen = OF_finddevice("/chosen")) == -1) - goto fail; - - /* Check if OF has an active stdin/stdout */ - input = -1; - if (OF_getencprop(chosen, "stdout", &stdout, - sizeof(stdout)) == sizeof(stdout) && stdout != 0) - input = OF_instance_to_package(stdout); - if (input == -1) - goto fail; - - if (OF_getprop(input, "device_type", buf, sizeof(buf)) == -1) - goto fail; - if (strcmp(buf, "serial") != 0) - goto fail; - - sc.node = input; - if (uart_phyp_probe_node(&sc) != 0) - goto fail; - mtx_init(&sc.sc_mtx, "uart_phyp", NULL, MTX_SPIN | MTX_QUIET | - MTX_NOWITNESS); - - cp->cn_pri = CN_NORMAL; - console_sc = ≻ - return; - -fail: - cp->cn_pri = CN_DEAD; - return; -} - -static int -uart_phyp_attach(device_t dev) -{ - struct uart_phyp_softc *sc; - int unit; - - sc = device_get_softc(dev); - sc->dev = dev; - sc->node = ofw_bus_get_node(dev); - uart_phyp_probe_node(sc); - - unit = device_get_unit(dev); - sc->tp = tty_alloc(&uart_phyp_tty_class, sc); - mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, - MTX_SPIN | MTX_QUIET | MTX_NOWITNESS); - - if (console_sc != NULL && console_sc->vtermid == sc->vtermid) { - sc->outseqno = console_sc->outseqno; - console_sc = sc; - sprintf(uart_phyp_consdev.cn_name, "ttyu%r", unit); - tty_init_console(sc->tp, 0); - } - - sc->irqrid = 0; - sc->irqres = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqrid, - RF_ACTIVE | RF_SHAREABLE); - if (sc->irqres != NULL) { - bus_setup_intr(dev, sc->irqres, INTR_TYPE_TTY | INTR_MPSAFE, - NULL, uart_phyp_intr, sc, &sc->sc_icookie); - } else { - callout_init(&sc->callout, 1); - sc->polltime = hz / 20; - if (sc->polltime < 1) - sc->polltime = 1; - callout_reset(&sc->callout, sc->polltime, uart_phyp_intr, sc); - } - - tty_makedev(sc->tp, NULL, "u%r", unit); - - return (0); -} - -static void -uart_phyp_cninit(struct consdev *cp) -{ - - strcpy(cp->cn_name, "phypcons"); -} - -static void -uart_phyp_cnterm(struct consdev *cp) -{ -} - -static int -uart_phyp_get(struct uart_phyp_softc *sc, void *buffer, size_t bufsize) -{ - int err; - int hdr = 0; - uint64_t i, j; - - uart_lock(&sc->sc_mtx); - if (sc->inbuflen == 0) { - err = phyp_pft_hcall(H_GET_TERM_CHAR, sc->vtermid, - 0, 0, 0, &sc->inbuflen, &sc->phyp_inbuf.u64[0], - &sc->phyp_inbuf.u64[1]); -#if BYTE_ORDER == LITTLE_ENDIAN - sc->phyp_inbuf.u64[0] = be64toh(sc->phyp_inbuf.u64[0]); - sc->phyp_inbuf.u64[1] = be64toh(sc->phyp_inbuf.u64[1]); -#endif - if (err != H_SUCCESS) { - uart_unlock(&sc->sc_mtx); - return (-1); - } - hdr = 1; - } - - if (sc->inbuflen == 0) { - uart_unlock(&sc->sc_mtx); - return (0); - } - - if ((sc->protocol == HVTERMPROT) && (hdr == 1)) { - sc->inbuflen = sc->inbuflen - 4; - /* The VTERM protocol has a 4 byte header, skip it here. */ - memmove(&sc->phyp_inbuf.str[0], &sc->phyp_inbuf.str[4], - sc->inbuflen); - } - - /* - * Since version 2.11.0, QEMU became bug-compatible with - * PowerVM's vty implementation, by inserting a \0 after - * every \r going to the guest. Guests are expected to - * workaround this issue by removing every \0 immediately - * following a \r. - */ - if (hdr == 1) { - for (i = 0, j = 0; i < sc->inbuflen; i++, j++) { - if (i > j) - sc->phyp_inbuf.str[j] = sc->phyp_inbuf.str[i]; - - if (sc->phyp_inbuf.str[i] == '\r' && - i < sc->inbuflen - 1 && - sc->phyp_inbuf.str[i + 1] == '\0') - i++; - } - sc->inbuflen -= i - j; - } - - if (bufsize > sc->inbuflen) - bufsize = sc->inbuflen; - - memcpy(buffer, sc->phyp_inbuf.str, bufsize); - sc->inbuflen -= bufsize; - if (sc->inbuflen > 0) - memmove(&sc->phyp_inbuf.str[0], &sc->phyp_inbuf.str[bufsize], - sc->inbuflen); - - uart_unlock(&sc->sc_mtx); - return (bufsize); -} - -static int -uart_phyp_put(struct uart_phyp_softc *sc, void *buffer, size_t bufsize) -{ - uint16_t seqno; - uint64_t len = 0; - int err; - - union { - uint64_t u64[2]; - char bytes[16]; - } cbuf; - - uart_lock(&sc->sc_mtx); - switch (sc->protocol) { - case HVTERM1: - if (bufsize > 16) - bufsize = 16; - memcpy(&cbuf, buffer, bufsize); - len = bufsize; - break; - case HVTERMPROT: - if (bufsize > 12) - bufsize = 12; - seqno = sc->outseqno++; - cbuf.bytes[0] = VS_DATA_PACKET_HEADER; - cbuf.bytes[1] = 4 + bufsize; /* total length, max 16 bytes */ - cbuf.bytes[2] = (seqno >> 8) & 0xff; - cbuf.bytes[3] = seqno & 0xff; - memcpy(&cbuf.bytes[4], buffer, bufsize); - len = 4 + bufsize; - break; - } - - do { - err = phyp_hcall(H_PUT_TERM_CHAR, sc->vtermid, len, htobe64(cbuf.u64[0]), - htobe64(cbuf.u64[1])); - DELAY(100); - } while (err == H_BUSY); - - uart_unlock(&sc->sc_mtx); - - return (bufsize); -} - -static int -uart_phyp_cngetc(struct consdev *cp) -{ - unsigned char c; - int retval; - - retval = uart_phyp_get(console_sc, &c, 1); - if (retval != 1) - return (-1); -#if defined(KDB) - kdb_alt_break(c, &alt_break_state); -#endif - - return (c); -} - -static void -uart_phyp_cnputc(struct consdev *cp, int c) -{ - unsigned char ch = c; - uart_phyp_put(console_sc, &ch, 1); -} - -static void -uart_phyp_cngrab(struct consdev *cp) -{ -} - -static void -uart_phyp_cnungrab(struct consdev *cp) -{ -} - -static void -uart_phyp_ttyoutwakeup(struct tty *tp) -{ - struct uart_phyp_softc *sc; - char buffer[8]; - int len; - - sc = tty_softc(tp); - - while ((len = ttydisc_getc(tp, buffer, sizeof(buffer))) != 0) - uart_phyp_put(sc, buffer, len); -} - -static void -uart_phyp_intr(void *v) -{ - struct uart_phyp_softc *sc = v; - struct tty *tp = sc->tp; - unsigned char c; - int len; - - tty_lock(tp); - while ((len = uart_phyp_get(sc, &c, 1)) > 0) - ttydisc_rint(tp, c, 0); - ttydisc_rint_done(tp); - tty_unlock(tp); - - if (sc->irqres == NULL) - callout_reset(&sc->callout, sc->polltime, uart_phyp_intr, sc); -} diff --git a/sys/powerpc/pseries/phyp_dbg.c b/sys/powerpc/pseries/phyp_dbg.c deleted file mode 100644 index 06c929265ad..00000000000 --- a/sys/powerpc/pseries/phyp_dbg.c +++ /dev/null @@ -1,160 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (C) 2019 Leandro Lupori - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include - -#include -#include - -#include "phyp-hvcall.h" - -static gdb_probe_f uart_phyp_dbg_probe; -static gdb_init_f uart_phyp_dbg_init; -static gdb_term_f uart_phyp_dbg_term; -static gdb_getc_f uart_phyp_dbg_getc; -static gdb_putc_f uart_phyp_dbg_putc; - -GDB_DBGPORT(uart_phyp, uart_phyp_dbg_probe, - uart_phyp_dbg_init, uart_phyp_dbg_term, - uart_phyp_dbg_getc, uart_phyp_dbg_putc); - -static struct uart_phyp_dbgport { - cell_t vtermid; - union { - uint64_t u64[2]; - char str[16]; - } inbuf; - uint64_t inbuflen; -} dbgport; - -static int -uart_phyp_dbg_probe(void) -{ - char buf[64]; - cell_t reg; - phandle_t vty; - - if (!getenv_string("hw.uart.dbgport", buf, sizeof(buf))) - return (-1); - - if ((vty = OF_finddevice(buf)) == -1) - return (-1); - - if (OF_getprop(vty, "name", buf, sizeof(buf)) <= 0) - return (-1); - if (strcmp(buf, "vty") != 0) - return (-1); - - if (OF_getprop(vty, "device_type", buf, sizeof(buf)) == -1) - return (-1); - if (strcmp(buf, "serial") != 0) - return (-1); - - if (OF_getprop(vty, "compatible", buf, sizeof(buf)) <= 0) - return (-1); - if (strcmp(buf, "hvterm1") != 0) - return (-1); - - reg = ~0U; - OF_getencprop(vty, "reg", ®, sizeof(reg)); - if (reg == ~0U) - return (-1); - - dbgport.vtermid = reg; - dbgport.inbuflen = 0; - - return (0); -} - -static void -uart_phyp_dbg_init(void) -{ -} - -static void -uart_phyp_dbg_term(void) -{ -} - -static int -uart_phyp_dbg_getc(void) -{ - int c, err, next; - - if (dbgport.inbuflen == 0) { - err = phyp_pft_hcall(H_GET_TERM_CHAR, dbgport.vtermid, - 0, 0, 0, &dbgport.inbuflen, &dbgport.inbuf.u64[0], - &dbgport.inbuf.u64[1]); - if (err != H_SUCCESS) - return (-1); - } - - if (dbgport.inbuflen == 0) - return (-1); - - c = dbgport.inbuf.str[0]; - dbgport.inbuflen--; - - if (dbgport.inbuflen == 0) - return (c); - - /* - * Since version 2.11.0, QEMU became bug-compatible - * with PowerVM's vty, by inserting a \0 after every \r. - * Filter it here. - */ - next = 1; - if (c == '\r' && dbgport.inbuf.str[next] == '\0') { - next++; - dbgport.inbuflen--; - } - - if (dbgport.inbuflen > 0) - memmove(&dbgport.inbuf.str[0], &dbgport.inbuf.str[next], - dbgport.inbuflen); - - return (c); -} - -static void -uart_phyp_dbg_putc(int c) -{ - int err; - - union { - uint64_t u64; - unsigned char bytes[8]; - } cbuf; - - cbuf.bytes[0] = (unsigned char)c; - - do { - err = phyp_hcall(H_PUT_TERM_CHAR, dbgport.vtermid, 1, - cbuf.u64, 0); - DELAY(100); - } while (err == H_BUSY); -} diff --git a/sys/powerpc/pseries/phyp_llan.c b/sys/powerpc/pseries/phyp_llan.c deleted file mode 100644 index 5cf53ffeda2..00000000000 --- a/sys/powerpc/pseries/phyp_llan.c +++ /dev/null @@ -1,560 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2013 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include - -#define LLAN_MAX_RX_PACKETS 100 -#define LLAN_MAX_TX_PACKETS 100 -#define LLAN_RX_BUF_LEN 8*PAGE_SIZE - -#define LLAN_BUFDESC_VALID (1ULL << 63) -#define LLAN_ADD_MULTICAST 0x1 -#define LLAN_DEL_MULTICAST 0x2 -#define LLAN_CLEAR_MULTICAST 0x3 - -struct llan_xfer { - struct mbuf *rx_mbuf; - bus_dmamap_t rx_dmamap; - uint64_t rx_bufdesc; -}; - -struct llan_receive_queue_entry { /* PAPR page 539 */ - uint8_t control; - uint8_t reserved; - uint16_t offset; - uint32_t length; - uint64_t handle; -} __packed; - -struct llan_softc { - device_t dev; - struct mtx io_lock; - - cell_t unit; - uint8_t mac_address[8]; - - struct ifmedia media; - - int irqid; - struct resource *irq; - void *irq_cookie; - - bus_dma_tag_t rx_dma_tag; - bus_dma_tag_t rxbuf_dma_tag; - bus_dma_tag_t tx_dma_tag; - - bus_dmamap_t tx_dma_map; - - struct llan_receive_queue_entry *rx_buf; - int rx_dma_slot; - int rx_valid_val; - bus_dmamap_t rx_buf_map; - bus_addr_t rx_buf_phys; - bus_size_t rx_buf_len; - bus_addr_t input_buf_phys; - bus_addr_t filter_buf_phys; - struct llan_xfer rx_xfer[LLAN_MAX_RX_PACKETS]; - - struct ifnet *ifp; -}; - -static int llan_probe(device_t); -static int llan_attach(device_t); -static void llan_intr(void *xsc); -static void llan_init(void *xsc); -static void llan_start(struct ifnet *ifp); -static int llan_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); -static void llan_media_status(struct ifnet *ifp, struct ifmediareq *ifmr); -static int llan_media_change(struct ifnet *ifp); -static void llan_rx_load_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, - int err); -static int llan_add_rxbuf(struct llan_softc *sc, struct llan_xfer *rx); -static int llan_set_multicast(struct llan_softc *sc); - -static devclass_t llan_devclass; -static device_method_t llan_methods[] = { - DEVMETHOD(device_probe, llan_probe), - DEVMETHOD(device_attach, llan_attach), - - DEVMETHOD_END -}; -static driver_t llan_driver = { - "llan", - llan_methods, - sizeof(struct llan_softc) -}; -DRIVER_MODULE(llan, vdevice, llan_driver, llan_devclass, 0, 0); - -static int -llan_probe(device_t dev) -{ - if (!ofw_bus_is_compatible(dev,"IBM,l-lan")) - return (ENXIO); - - device_set_desc(dev, "POWER Hypervisor Virtual Ethernet"); - return (0); -} - -static int -llan_attach(device_t dev) -{ - struct llan_softc *sc; - phandle_t node; - int error, i; - ssize_t len; - - sc = device_get_softc(dev); - sc->dev = dev; - - /* Get firmware properties */ - node = ofw_bus_get_node(dev); - len = OF_getprop(node, "local-mac-address", sc->mac_address, - sizeof(sc->mac_address)); - /* If local-mac-address property has only 6 bytes (ETHER_ADDR_LEN) - * instead of 8 (sizeof(sc->mac_address)), then its value must be - * shifted 2 bytes to the right. */ - if (len == ETHER_ADDR_LEN) { - bcopy(sc->mac_address, &sc->mac_address[2], len); - /* Zero out the first 2 bytes. */ - bzero(sc->mac_address, 2); - } - OF_getencprop(node, "reg", &sc->unit, sizeof(sc->unit)); - - mtx_init(&sc->io_lock, "llan", NULL, MTX_DEF); - - /* Setup interrupt */ - sc->irqid = 0; - sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid, - RF_ACTIVE); - - if (!sc->irq) { - device_printf(dev, "Could not allocate IRQ\n"); - mtx_destroy(&sc->io_lock); - return (ENXIO); - } - - bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE | - INTR_ENTROPY, NULL, llan_intr, sc, &sc->irq_cookie); - - /* Setup DMA */ - error = bus_dma_tag_create(bus_get_dma_tag(dev), 16, 0, - BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, - LLAN_RX_BUF_LEN, 1, BUS_SPACE_MAXSIZE_32BIT, - 0, NULL, NULL, &sc->rx_dma_tag); - error = bus_dma_tag_create(bus_get_dma_tag(dev), 4, 0, - BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, - BUS_SPACE_MAXSIZE, 1, BUS_SPACE_MAXSIZE_32BIT, - 0, NULL, NULL, &sc->rxbuf_dma_tag); - error = bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, - BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, - BUS_SPACE_MAXSIZE, 6, BUS_SPACE_MAXSIZE_32BIT, 0, - busdma_lock_mutex, &sc->io_lock, &sc->tx_dma_tag); - - error = bus_dmamem_alloc(sc->rx_dma_tag, (void **)&sc->rx_buf, - BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->rx_buf_map); - error = bus_dmamap_load(sc->rx_dma_tag, sc->rx_buf_map, sc->rx_buf, - LLAN_RX_BUF_LEN, llan_rx_load_cb, sc, 0); - - /* TX DMA maps */ - bus_dmamap_create(sc->tx_dma_tag, 0, &sc->tx_dma_map); - - /* RX DMA */ - for (i = 0; i < LLAN_MAX_RX_PACKETS; i++) { - error = bus_dmamap_create(sc->rxbuf_dma_tag, 0, - &sc->rx_xfer[i].rx_dmamap); - sc->rx_xfer[i].rx_mbuf = NULL; - } - - /* Attach to network stack */ - sc->ifp = if_alloc(IFT_ETHER); - sc->ifp->if_softc = sc; - - if_initname(sc->ifp, device_get_name(dev), device_get_unit(dev)); - sc->ifp->if_mtu = ETHERMTU; /* XXX max-frame-size from OF? */ - sc->ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; - sc->ifp->if_hwassist = 0; /* XXX: ibm,illan-options */ - sc->ifp->if_capabilities = 0; - sc->ifp->if_capenable = 0; - sc->ifp->if_start = llan_start; - sc->ifp->if_ioctl = llan_ioctl; - sc->ifp->if_init = llan_init; - - ifmedia_init(&sc->media, IFM_IMASK, llan_media_change, - llan_media_status); - ifmedia_add(&sc->media, IFM_ETHER | IFM_AUTO, 0, NULL); - ifmedia_set(&sc->media, IFM_ETHER | IFM_AUTO); - - IFQ_SET_MAXLEN(&sc->ifp->if_snd, LLAN_MAX_TX_PACKETS); - sc->ifp->if_snd.ifq_drv_maxlen = LLAN_MAX_TX_PACKETS; - IFQ_SET_READY(&sc->ifp->if_snd); - - ether_ifattach(sc->ifp, &sc->mac_address[2]); - - /* We don't have link state reporting, so make it always up */ - if_link_state_change(sc->ifp, LINK_STATE_UP); - - return (0); -} - -static int -llan_media_change(struct ifnet *ifp) -{ - struct llan_softc *sc = ifp->if_softc; - - if (IFM_TYPE(sc->media.ifm_media) != IFM_ETHER) - return (EINVAL); - - if (IFM_SUBTYPE(sc->media.ifm_media) != IFM_AUTO) - return (EINVAL); - - return (0); -} - -static void -llan_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) -{ - - ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE | IFM_UNKNOWN | IFM_FDX; - ifmr->ifm_active = IFM_ETHER; -} - -static void -llan_rx_load_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int err) -{ - struct llan_softc *sc = xsc; - - sc->rx_buf_phys = segs[0].ds_addr; - sc->rx_buf_len = segs[0].ds_len - 2*PAGE_SIZE; - sc->input_buf_phys = segs[0].ds_addr + segs[0].ds_len - PAGE_SIZE; - sc->filter_buf_phys = segs[0].ds_addr + segs[0].ds_len - 2*PAGE_SIZE; -} - -static void -llan_init(void *xsc) -{ - struct llan_softc *sc = xsc; - uint64_t rx_buf_desc; - uint64_t macaddr; - int err, i; - - mtx_lock(&sc->io_lock); - - phyp_hcall(H_FREE_LOGICAL_LAN, sc->unit); - - /* Create buffers (page 539) */ - sc->rx_dma_slot = 0; - sc->rx_valid_val = 1; - - rx_buf_desc = LLAN_BUFDESC_VALID; - rx_buf_desc |= (sc->rx_buf_len << 32); - rx_buf_desc |= sc->rx_buf_phys; - memcpy(&macaddr, sc->mac_address, 8); - err = phyp_hcall(H_REGISTER_LOGICAL_LAN, sc->unit, sc->input_buf_phys, - rx_buf_desc, sc->filter_buf_phys, macaddr); - - for (i = 0; i < LLAN_MAX_RX_PACKETS; i++) - llan_add_rxbuf(sc, &sc->rx_xfer[i]); - - phyp_hcall(H_VIO_SIGNAL, sc->unit, 1); /* Enable interrupts */ - - /* Tell stack we're up */ - sc->ifp->if_drv_flags |= IFF_DRV_RUNNING; - sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; - - mtx_unlock(&sc->io_lock); - - /* Check for pending receives scheduled before interrupt enable */ - llan_intr(sc); -} - -static int -llan_add_rxbuf(struct llan_softc *sc, struct llan_xfer *rx) -{ - struct mbuf *m; - bus_dma_segment_t segs[1]; - int error, nsegs; - - mtx_assert(&sc->io_lock, MA_OWNED); - - m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); - if (m == NULL) - return (ENOBUFS); - - m->m_len = m->m_pkthdr.len = m->m_ext.ext_size; - if (rx->rx_mbuf != NULL) { - bus_dmamap_sync(sc->rxbuf_dma_tag, rx->rx_dmamap, - BUS_DMASYNC_POSTREAD); - bus_dmamap_unload(sc->rxbuf_dma_tag, rx->rx_dmamap); - } - - /* Save pointer to buffer structure */ - m_copyback(m, 0, 8, (void *)&rx); - - error = bus_dmamap_load_mbuf_sg(sc->rxbuf_dma_tag, rx->rx_dmamap, m, - segs, &nsegs, BUS_DMA_NOWAIT); - if (error != 0) { - device_printf(sc->dev, - "cannot load RX DMA map %p, error = %d\n", rx, error); - m_freem(m); - return (error); - } - - /* If nsegs is wrong then the stack is corrupt. */ - KASSERT(nsegs == 1, - ("%s: too many DMA segments (%d)", __func__, nsegs)); - rx->rx_mbuf = m; - - bus_dmamap_sync(sc->rxbuf_dma_tag, rx->rx_dmamap, BUS_DMASYNC_PREREAD); - - rx->rx_bufdesc = LLAN_BUFDESC_VALID; - rx->rx_bufdesc |= (((uint64_t)segs[0].ds_len) << 32); - rx->rx_bufdesc |= segs[0].ds_addr; - error = phyp_hcall(H_ADD_LOGICAL_LAN_BUFFER, sc->unit, rx->rx_bufdesc); - if (error != 0) { - m_freem(m); - rx->rx_mbuf = NULL; - return (ENOBUFS); - } - - return (0); -} - -static void -llan_intr(void *xsc) -{ - struct llan_softc *sc = xsc; - struct llan_xfer *rx; - struct mbuf *m; - - mtx_lock(&sc->io_lock); -restart: - phyp_hcall(H_VIO_SIGNAL, sc->unit, 0); - - while ((sc->rx_buf[sc->rx_dma_slot].control >> 7) == sc->rx_valid_val) { - rx = (struct llan_xfer *)sc->rx_buf[sc->rx_dma_slot].handle; - m = rx->rx_mbuf; - m_adj(m, sc->rx_buf[sc->rx_dma_slot].offset - 8); - m->m_len = sc->rx_buf[sc->rx_dma_slot].length; - - /* llan_add_rxbuf does DMA sync and unload as well as requeue */ - if (llan_add_rxbuf(sc, rx) != 0) { - if_inc_counter(sc->ifp, IFCOUNTER_IERRORS, 1); - continue; - } - - if_inc_counter(sc->ifp, IFCOUNTER_IPACKETS, 1); - m_adj(m, sc->rx_buf[sc->rx_dma_slot].offset); - m->m_len = sc->rx_buf[sc->rx_dma_slot].length; - m->m_pkthdr.rcvif = sc->ifp; - m->m_pkthdr.len = m->m_len; - sc->rx_dma_slot++; - - if (sc->rx_dma_slot >= sc->rx_buf_len/sizeof(sc->rx_buf[0])) { - sc->rx_dma_slot = 0; - sc->rx_valid_val = !sc->rx_valid_val; - } - - mtx_unlock(&sc->io_lock); - (*sc->ifp->if_input)(sc->ifp, m); - mtx_lock(&sc->io_lock); - } - - phyp_hcall(H_VIO_SIGNAL, sc->unit, 1); - - /* - * H_VIO_SIGNAL enables interrupts for future packets only. - * Make sure none were queued between the end of the loop and the - * enable interrupts call. - */ - if ((sc->rx_buf[sc->rx_dma_slot].control >> 7) == sc->rx_valid_val) - goto restart; - - mtx_unlock(&sc->io_lock); -} - -static void -llan_send_packet(void *xsc, bus_dma_segment_t *segs, int nsegs, - bus_size_t mapsize, int error) -{ - struct llan_softc *sc = xsc; - uint64_t bufdescs[6]; - int i, err; - - bzero(bufdescs, sizeof(bufdescs)); - - for (i = 0; i < nsegs; i++) { - bufdescs[i] = LLAN_BUFDESC_VALID; - bufdescs[i] |= (((uint64_t)segs[i].ds_len) << 32); - bufdescs[i] |= segs[i].ds_addr; - } - - err = phyp_hcall(H_SEND_LOGICAL_LAN, sc->unit, bufdescs[0], - bufdescs[1], bufdescs[2], bufdescs[3], bufdescs[4], bufdescs[5], 0); - /* - * The hypercall returning implies completion -- or that the call will - * not complete. In principle, we should try a few times if we get back - * H_BUSY based on the continuation token in R4. For now, just drop - * the packet in such cases. - */ - if (err == H_SUCCESS) - if_inc_counter(sc->ifp, IFCOUNTER_OPACKETS, 1); - else - if_inc_counter(sc->ifp, IFCOUNTER_OERRORS, 1); -} - -static void -llan_start_locked(struct ifnet *ifp) -{ - struct llan_softc *sc = ifp->if_softc; - bus_addr_t first; - int nsegs; - struct mbuf *mb_head, *m; - - mtx_assert(&sc->io_lock, MA_OWNED); - first = 0; - - if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != - IFF_DRV_RUNNING) - return; - - while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) { - IFQ_DRV_DEQUEUE(&ifp->if_snd, mb_head); - - if (mb_head == NULL) - break; - - BPF_MTAP(ifp, mb_head); - - for (m = mb_head, nsegs = 0; m != NULL; m = m->m_next) - nsegs++; - if (nsegs > 6) { - m = m_collapse(mb_head, M_NOWAIT, 6); - if (m == NULL) { - m_freem(mb_head); - continue; - } - } - - bus_dmamap_load_mbuf(sc->tx_dma_tag, sc->tx_dma_map, - mb_head, llan_send_packet, sc, 0); - bus_dmamap_unload(sc->tx_dma_tag, sc->tx_dma_map); - m_freem(mb_head); - } -} - -static void -llan_start(struct ifnet *ifp) -{ - struct llan_softc *sc = ifp->if_softc; - - mtx_lock(&sc->io_lock); - llan_start_locked(ifp); - mtx_unlock(&sc->io_lock); -} - -static u_int -llan_set_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt) -{ - struct llan_softc *sc = arg; - uint64_t macaddr = 0; - - memcpy((uint8_t *)&macaddr + 2, LLADDR(sdl), 6); - phyp_hcall(H_MULTICAST_CTRL, sc->unit, LLAN_ADD_MULTICAST, macaddr); - - return (1); -} - -static int -llan_set_multicast(struct llan_softc *sc) -{ - struct ifnet *ifp = sc->ifp; - - mtx_assert(&sc->io_lock, MA_OWNED); - - phyp_hcall(H_MULTICAST_CTRL, sc->unit, LLAN_CLEAR_MULTICAST, 0); - - if_foreach_llmaddr(ifp, llan_set_maddr, sc); - - return (0); -} - -static int -llan_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) -{ - int err = 0; - struct llan_softc *sc = ifp->if_softc; - - switch (cmd) { - case SIOCADDMULTI: - case SIOCDELMULTI: - mtx_lock(&sc->io_lock); - if ((sc->ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) - llan_set_multicast(sc); - mtx_unlock(&sc->io_lock); - break; - case SIOCGIFMEDIA: - case SIOCSIFMEDIA: - err = ifmedia_ioctl(ifp, (struct ifreq *)data, &sc->media, cmd); - break; - case SIOCSIFFLAGS: - default: - err = ether_ioctl(ifp, cmd, data); - break; - } - - return (err); -} diff --git a/sys/powerpc/pseries/phyp_vscsi.c b/sys/powerpc/pseries/phyp_vscsi.c deleted file mode 100644 index 436f6c8ed47..00000000000 --- a/sys/powerpc/pseries/phyp_vscsi.c +++ /dev/null @@ -1,999 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2013 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include - -#include - -struct vscsi_softc; - -/* VSCSI CRQ format from table 260 of PAPR spec 2.4 (page 760) */ -struct vscsi_crq { - uint8_t valid; - uint8_t format; - uint8_t reserved; - uint8_t status; - uint16_t timeout; - uint16_t iu_length; - uint64_t iu_data; -}; - -struct vscsi_xfer { - TAILQ_ENTRY(vscsi_xfer) queue; - struct vscsi_softc *sc; - union ccb *ccb; - bus_dmamap_t dmamap; - uint64_t tag; - - vmem_addr_t srp_iu_offset; - vmem_size_t srp_iu_size; -}; - -TAILQ_HEAD(vscsi_xferq, vscsi_xfer); - -struct vscsi_softc { - device_t dev; - struct cam_devq *devq; - struct cam_sim *sim; - struct cam_path *path; - struct mtx io_lock; - - cell_t unit; - int bus_initialized; - int bus_logged_in; - int max_transactions; - - int irqid; - struct resource *irq; - void *irq_cookie; - - bus_dma_tag_t crq_tag; - struct vscsi_crq *crq_queue; - int n_crqs, cur_crq; - bus_dmamap_t crq_map; - bus_addr_t crq_phys; - - vmem_t *srp_iu_arena; - void *srp_iu_queue; - bus_addr_t srp_iu_phys; - - bus_dma_tag_t data_tag; - - struct vscsi_xfer loginxp; - struct vscsi_xfer *xfer; - struct vscsi_xferq active_xferq; - struct vscsi_xferq free_xferq; -}; - -struct srp_login { - uint8_t type; - uint8_t reserved[7]; - uint64_t tag; - uint64_t max_cmd_length; - uint32_t reserved2; - uint16_t buffer_formats; - uint8_t flags; - uint8_t reserved3[5]; - uint8_t initiator_port_id[16]; - uint8_t target_port_id[16]; -} __packed; - -struct srp_login_rsp { - uint8_t type; - uint8_t reserved[3]; - uint32_t request_limit_delta; - uint8_t tag; - uint32_t max_i_to_t_len; - uint32_t max_t_to_i_len; - uint16_t buffer_formats; - uint8_t flags; - /* Some reserved bits follow */ -} __packed; - -struct srp_cmd { - uint8_t type; - uint8_t flags1; - uint8_t reserved[3]; - uint8_t formats; - uint8_t out_buffer_count; - uint8_t in_buffer_count; - uint64_t tag; - uint32_t reserved2; - uint64_t lun; - uint8_t reserved3[3]; - uint8_t additional_cdb; - uint8_t cdb[16]; - uint8_t data_payload[0]; -} __packed; - -struct srp_rsp { - uint8_t type; - uint8_t reserved[3]; - uint32_t request_limit_delta; - uint64_t tag; - uint16_t reserved2; - uint8_t flags; - uint8_t status; - uint32_t data_out_resid; - uint32_t data_in_resid; - uint32_t sense_data_len; - uint32_t response_data_len; - uint8_t data_payload[0]; -} __packed; - -struct srp_tsk_mgmt { - uint8_t type; - uint8_t reserved[7]; - uint64_t tag; - uint32_t reserved2; - uint64_t lun; - uint8_t reserved3[2]; - uint8_t function; - uint8_t reserved4; - uint64_t manage_tag; - uint64_t reserved5; -} __packed; - -/* Message code type */ -#define SRP_LOGIN_REQ 0x00 -#define SRP_TSK_MGMT 0x01 -#define SRP_CMD 0x02 -#define SRP_I_LOGOUT 0x03 - -#define SRP_LOGIN_RSP 0xC0 -#define SRP_RSP 0xC1 -#define SRP_LOGIN_REJ 0xC2 - -#define SRP_T_LOGOUT 0x80 -#define SRP_CRED_REQ 0x81 -#define SRP_AER_REQ 0x82 - -#define SRP_CRED_RSP 0x41 -#define SRP_AER_RSP 0x41 - -/* Flags for srp_rsp flags field */ -#define SRP_RSPVALID 0x01 -#define SRP_SNSVALID 0x02 -#define SRP_DOOVER 0x04 -#define SRP_DOUNDER 0x08 -#define SRP_DIOVER 0x10 -#define SRP_DIUNDER 0x20 - -#define MAD_SUCESS 0x00 -#define MAD_NOT_SUPPORTED 0xf1 -#define MAD_FAILED 0xf7 - -#define MAD_EMPTY_IU 0x01 -#define MAD_ERROR_LOGGING_REQUEST 0x02 -#define MAD_ADAPTER_INFO_REQUEST 0x03 -#define MAD_CAPABILITIES_EXCHANGE 0x05 -#define MAD_PHYS_ADAP_INFO_REQUEST 0x06 -#define MAD_TAPE_PASSTHROUGH_REQUEST 0x07 -#define MAD_ENABLE_FAST_FAIL 0x08 - -static int vscsi_probe(device_t); -static int vscsi_attach(device_t); -static int vscsi_detach(device_t); -static void vscsi_cam_action(struct cam_sim *, union ccb *); -static void vscsi_cam_poll(struct cam_sim *); -static void vscsi_intr(void *arg); -static void vscsi_check_response_queue(struct vscsi_softc *sc); -static void vscsi_setup_bus(struct vscsi_softc *sc); - -static void vscsi_srp_login(struct vscsi_softc *sc); -static void vscsi_crq_load_cb(void *, bus_dma_segment_t *, int, int); -static void vscsi_scsi_command(void *xxp, bus_dma_segment_t *segs, - int nsegs, int err); -static void vscsi_task_management(struct vscsi_softc *sc, union ccb *ccb); -static void vscsi_srp_response(struct vscsi_xfer *, struct vscsi_crq *); - -static devclass_t vscsi_devclass; -static device_method_t vscsi_methods[] = { - DEVMETHOD(device_probe, vscsi_probe), - DEVMETHOD(device_attach, vscsi_attach), - DEVMETHOD(device_detach, vscsi_detach), - - DEVMETHOD_END -}; -static driver_t vscsi_driver = { - "vscsi", - vscsi_methods, - sizeof(struct vscsi_softc) -}; -DRIVER_MODULE(vscsi, vdevice, vscsi_driver, vscsi_devclass, 0, 0); -MALLOC_DEFINE(M_VSCSI, "vscsi", "CAM device queue for VSCSI"); - -static int -vscsi_probe(device_t dev) -{ - - if (!ofw_bus_is_compatible(dev, "IBM,v-scsi")) - return (ENXIO); - - device_set_desc(dev, "POWER Hypervisor Virtual SCSI Bus"); - return (0); -} - -static int -vscsi_attach(device_t dev) -{ - struct vscsi_softc *sc; - struct vscsi_xfer *xp; - int error, i; - - sc = device_get_softc(dev); - if (sc == NULL) - return (EINVAL); - - sc->dev = dev; - mtx_init(&sc->io_lock, "vscsi", NULL, MTX_DEF); - - /* Get properties */ - OF_getencprop(ofw_bus_get_node(dev), "reg", &sc->unit, - sizeof(sc->unit)); - - /* Setup interrupt */ - sc->irqid = 0; - sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid, - RF_ACTIVE); - - if (!sc->irq) { - device_printf(dev, "Could not allocate IRQ\n"); - mtx_destroy(&sc->io_lock); - return (ENXIO); - } - - bus_setup_intr(dev, sc->irq, INTR_TYPE_CAM | INTR_MPSAFE | - INTR_ENTROPY, NULL, vscsi_intr, sc, &sc->irq_cookie); - - /* Data DMA */ - error = bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0, - BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE, - 256, BUS_SPACE_MAXSIZE_32BIT, 0, busdma_lock_mutex, &sc->io_lock, - &sc->data_tag); - - TAILQ_INIT(&sc->active_xferq); - TAILQ_INIT(&sc->free_xferq); - - /* First XFER for login data */ - sc->loginxp.sc = sc; - bus_dmamap_create(sc->data_tag, 0, &sc->loginxp.dmamap); - TAILQ_INSERT_TAIL(&sc->free_xferq, &sc->loginxp, queue); - - /* CRQ area */ - error = bus_dma_tag_create(bus_get_dma_tag(dev), PAGE_SIZE, 0, - BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, 8*PAGE_SIZE, - 1, BUS_SPACE_MAXSIZE, 0, NULL, NULL, &sc->crq_tag); - error = bus_dmamem_alloc(sc->crq_tag, (void **)&sc->crq_queue, - BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->crq_map); - sc->crq_phys = 0; - sc->n_crqs = 0; - error = bus_dmamap_load(sc->crq_tag, sc->crq_map, sc->crq_queue, - 8*PAGE_SIZE, vscsi_crq_load_cb, sc, 0); - - mtx_lock(&sc->io_lock); - vscsi_setup_bus(sc); - sc->xfer = malloc(sizeof(sc->xfer[0])*sc->max_transactions, M_VSCSI, - M_NOWAIT); - for (i = 0; i < sc->max_transactions; i++) { - xp = &sc->xfer[i]; - xp->sc = sc; - - error = bus_dmamap_create(sc->data_tag, 0, &xp->dmamap); - if (error) { - device_printf(dev, "Could not create DMA map (%d)\n", - error); - break; - } - - TAILQ_INSERT_TAIL(&sc->free_xferq, xp, queue); - } - mtx_unlock(&sc->io_lock); - - /* Allocate CAM bits */ - if ((sc->devq = cam_simq_alloc(sc->max_transactions)) == NULL) - return (ENOMEM); - - sc->sim = cam_sim_alloc(vscsi_cam_action, vscsi_cam_poll, "vscsi", sc, - device_get_unit(dev), &sc->io_lock, - sc->max_transactions, sc->max_transactions, - sc->devq); - if (sc->sim == NULL) { - cam_simq_free(sc->devq); - sc->devq = NULL; - device_printf(dev, "CAM SIM attach failed\n"); - return (EINVAL); - } - - mtx_lock(&sc->io_lock); - if (xpt_bus_register(sc->sim, dev, 0) != 0) { - device_printf(dev, "XPT bus registration failed\n"); - cam_sim_free(sc->sim, FALSE); - sc->sim = NULL; - cam_simq_free(sc->devq); - sc->devq = NULL; - mtx_unlock(&sc->io_lock); - return (EINVAL); - } - mtx_unlock(&sc->io_lock); - - return (0); -} - -static int -vscsi_detach(device_t dev) -{ - struct vscsi_softc *sc; - - sc = device_get_softc(dev); - if (sc == NULL) - return (EINVAL); - - if (sc->sim != NULL) { - mtx_lock(&sc->io_lock); - xpt_bus_deregister(cam_sim_path(sc->sim)); - cam_sim_free(sc->sim, FALSE); - sc->sim = NULL; - mtx_unlock(&sc->io_lock); - } - - if (sc->devq != NULL) { - cam_simq_free(sc->devq); - sc->devq = NULL; - } - - mtx_destroy(&sc->io_lock); - - return (0); -} - -static void -vscsi_cam_action(struct cam_sim *sim, union ccb *ccb) -{ - struct vscsi_softc *sc = cam_sim_softc(sim); - - mtx_assert(&sc->io_lock, MA_OWNED); - - switch (ccb->ccb_h.func_code) { - case XPT_PATH_INQ: - { - struct ccb_pathinq *cpi = &ccb->cpi; - - cpi->version_num = 1; - cpi->hba_inquiry = PI_TAG_ABLE; - cpi->hba_misc = PIM_EXTLUNS; - cpi->target_sprt = 0; - cpi->hba_eng_cnt = 0; - cpi->max_target = 0; - cpi->max_lun = 0; - cpi->initiator_id = ~0; - strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); - strlcpy(cpi->hba_vid, "IBM", HBA_IDLEN); - strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); - cpi->unit_number = cam_sim_unit(sim); - cpi->bus_id = cam_sim_bus(sim); - cpi->base_transfer_speed = 150000; - cpi->transport = XPORT_SRP; - cpi->transport_version = 0; - cpi->protocol = PROTO_SCSI; - cpi->protocol_version = SCSI_REV_SPC4; - cpi->ccb_h.status = CAM_REQ_CMP; - break; - } - case XPT_RESET_BUS: - ccb->ccb_h.status = CAM_REQ_CMP; - break; - case XPT_RESET_DEV: - ccb->ccb_h.status = CAM_REQ_INPROG; - vscsi_task_management(sc, ccb); - return; - case XPT_GET_TRAN_SETTINGS: - ccb->cts.protocol = PROTO_SCSI; - ccb->cts.protocol_version = SCSI_REV_SPC4; - ccb->cts.transport = XPORT_SRP; - ccb->cts.transport_version = 0; - ccb->cts.proto_specific.valid = 0; - ccb->cts.xport_specific.valid = 0; - ccb->ccb_h.status = CAM_REQ_CMP; - break; - case XPT_SET_TRAN_SETTINGS: - ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; - break; - case XPT_SCSI_IO: - { - struct vscsi_xfer *xp; - - ccb->ccb_h.status = CAM_REQ_INPROG; - - xp = TAILQ_FIRST(&sc->free_xferq); - if (xp == NULL) - panic("SCSI queue flooded"); - xp->ccb = ccb; - TAILQ_REMOVE(&sc->free_xferq, xp, queue); - TAILQ_INSERT_TAIL(&sc->active_xferq, xp, queue); - bus_dmamap_load_ccb(sc->data_tag, xp->dmamap, - ccb, vscsi_scsi_command, xp, 0); - - return; - } - default: - ccb->ccb_h.status = CAM_REQ_INVALID; - break; - } - - xpt_done(ccb); - return; -} - -static void -vscsi_srp_login(struct vscsi_softc *sc) -{ - struct vscsi_xfer *xp; - struct srp_login *login; - struct vscsi_crq crq; - int err; - - mtx_assert(&sc->io_lock, MA_OWNED); - - xp = TAILQ_FIRST(&sc->free_xferq); - if (xp == NULL) - panic("SCSI queue flooded"); - xp->ccb = NULL; - TAILQ_REMOVE(&sc->free_xferq, xp, queue); - TAILQ_INSERT_TAIL(&sc->active_xferq, xp, queue); - - /* Set up command */ - xp->srp_iu_size = 64; - crq.iu_length = htobe16(xp->srp_iu_size); - err = vmem_alloc(xp->sc->srp_iu_arena, xp->srp_iu_size, - M_BESTFIT | M_NOWAIT, &xp->srp_iu_offset); - if (err) - panic("Error during VMEM allocation (%d)", err); - - login = (struct srp_login *)((uint8_t *)xp->sc->srp_iu_queue + - (uintptr_t)xp->srp_iu_offset); - bzero(login, xp->srp_iu_size); - login->type = SRP_LOGIN_REQ; - login->tag = (uint64_t)(xp); - login->max_cmd_length = htobe64(256); - login->buffer_formats = htobe16(0x1 | 0x2); /* Direct and indirect */ - login->flags = 0; - - /* Create CRQ entry */ - crq.valid = 0x80; - crq.format = 0x01; - crq.iu_data = htobe64(xp->sc->srp_iu_phys + xp->srp_iu_offset); - bus_dmamap_sync(sc->crq_tag, sc->crq_map, BUS_DMASYNC_PREWRITE); - - err = phyp_hcall(H_SEND_CRQ, xp->sc->unit, - be64toh(((uint64_t *)(&crq))[0]), - be64toh(((uint64_t *)(&crq))[1])); - if (err != 0) - panic("CRQ send failure (%d)", err); -} - -static void -vscsi_task_management(struct vscsi_softc *sc, union ccb *ccb) -{ - struct srp_tsk_mgmt *cmd; - struct vscsi_xfer *xp; - struct vscsi_crq crq; - int err; - - mtx_assert(&sc->io_lock, MA_OWNED); - - xp = TAILQ_FIRST(&sc->free_xferq); - if (xp == NULL) - panic("SCSI queue flooded"); - xp->ccb = ccb; - TAILQ_REMOVE(&sc->free_xferq, xp, queue); - TAILQ_INSERT_TAIL(&sc->active_xferq, xp, queue); - - xp->srp_iu_size = sizeof(*cmd); - crq.iu_length = htobe16(xp->srp_iu_size); - err = vmem_alloc(xp->sc->srp_iu_arena, xp->srp_iu_size, - M_BESTFIT | M_NOWAIT, &xp->srp_iu_offset); - if (err) - panic("Error during VMEM allocation (%d)", err); - - cmd = (struct srp_tsk_mgmt *)((uint8_t *)xp->sc->srp_iu_queue + - (uintptr_t)xp->srp_iu_offset); - bzero(cmd, xp->srp_iu_size); - cmd->type = SRP_TSK_MGMT; - cmd->tag = (uint64_t)xp; - cmd->lun = htobe64(CAM_EXTLUN_BYTE_SWIZZLE(ccb->ccb_h.target_lun)); - - switch (ccb->ccb_h.func_code) { - case XPT_RESET_DEV: - cmd->function = 0x08; - break; - default: - panic("Unimplemented code %d", ccb->ccb_h.func_code); - break; - } - - bus_dmamap_sync(xp->sc->crq_tag, xp->sc->crq_map, BUS_DMASYNC_PREWRITE); - - /* Create CRQ entry */ - crq.valid = 0x80; - crq.format = 0x01; - crq.iu_data = htobe64(xp->sc->srp_iu_phys + xp->srp_iu_offset); - - err = phyp_hcall(H_SEND_CRQ, xp->sc->unit, - be64toh(((uint64_t *)(&crq))[0]), - be64toh(((uint64_t *)(&crq))[1])); - if (err != 0) - panic("CRQ send failure (%d)", err); -} - -static void -vscsi_scsi_command(void *xxp, bus_dma_segment_t *segs, int nsegs, int err) -{ - struct vscsi_xfer *xp = xxp; - uint8_t *cdb; - union ccb *ccb = xp->ccb; - struct srp_cmd *cmd; - uint64_t chunk_addr; - uint32_t chunk_size; - int desc_start, i; - struct vscsi_crq crq; - - KASSERT(err == 0, ("DMA error %d\n", err)); - - mtx_assert(&xp->sc->io_lock, MA_OWNED); - - cdb = (ccb->ccb_h.flags & CAM_CDB_POINTER) ? - ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes; - - /* Command format from Table 20, page 37 of SRP spec */ - xp->srp_iu_size = 48 + ((nsegs > 1) ? 20 : 16) + - ((ccb->csio.cdb_len > 16) ? (ccb->csio.cdb_len - 16) : 0); - crq.iu_length = htobe16(xp->srp_iu_size); - if (nsegs > 1) - xp->srp_iu_size += nsegs*16; - xp->srp_iu_size = roundup(xp->srp_iu_size, 16); - err = vmem_alloc(xp->sc->srp_iu_arena, xp->srp_iu_size, - M_BESTFIT | M_NOWAIT, &xp->srp_iu_offset); - if (err) - panic("Error during VMEM allocation (%d)", err); - - cmd = (struct srp_cmd *)((uint8_t *)xp->sc->srp_iu_queue + - (uintptr_t)xp->srp_iu_offset); - bzero(cmd, xp->srp_iu_size); - cmd->type = SRP_CMD; - if (ccb->csio.cdb_len > 16) - cmd->additional_cdb = (ccb->csio.cdb_len - 16) << 2; - memcpy(cmd->cdb, cdb, ccb->csio.cdb_len); - - cmd->tag = (uint64_t)(xp); /* Let the responder find this again */ - cmd->lun = htobe64(CAM_EXTLUN_BYTE_SWIZZLE(ccb->ccb_h.target_lun)); - - if (nsegs > 1) { - /* Use indirect descriptors */ - switch (ccb->ccb_h.flags & CAM_DIR_MASK) { - case CAM_DIR_OUT: - cmd->formats = (2 << 4); - break; - case CAM_DIR_IN: - cmd->formats = 2; - break; - default: - panic("Does not support bidirectional commands (%d)", - ccb->ccb_h.flags & CAM_DIR_MASK); - break; - } - - desc_start = ((ccb->csio.cdb_len > 16) ? - ccb->csio.cdb_len - 16 : 0); - chunk_addr = htobe64(xp->sc->srp_iu_phys + xp->srp_iu_offset + 20 + - desc_start + sizeof(*cmd)); - chunk_size = htobe32(16*nsegs); - memcpy(&cmd->data_payload[desc_start], &chunk_addr, 8); - memcpy(&cmd->data_payload[desc_start+12], &chunk_size, 4); - chunk_size = 0; - for (i = 0; i < nsegs; i++) - chunk_size += segs[i].ds_len; - chunk_size = htobe32(chunk_size); - memcpy(&cmd->data_payload[desc_start+16], &chunk_size, 4); - desc_start += 20; - for (i = 0; i < nsegs; i++) { - chunk_addr = htobe64(segs[i].ds_addr); - chunk_size = htobe32(segs[i].ds_len); - - memcpy(&cmd->data_payload[desc_start + 16*i], - &chunk_addr, 8); - /* Set handle tag to 0 */ - memcpy(&cmd->data_payload[desc_start + 16*i + 12], - &chunk_size, 4); - } - } else if (nsegs == 1) { - switch (ccb->ccb_h.flags & CAM_DIR_MASK) { - case CAM_DIR_OUT: - cmd->formats = (1 << 4); - break; - case CAM_DIR_IN: - cmd->formats = 1; - break; - default: - panic("Does not support bidirectional commands (%d)", - ccb->ccb_h.flags & CAM_DIR_MASK); - break; - } - - /* - * Memory descriptor: - * 8 byte address - * 4 byte handle - * 4 byte length - */ - - chunk_addr = htobe64(segs[0].ds_addr); - chunk_size = htobe32(segs[0].ds_len); - desc_start = ((ccb->csio.cdb_len > 16) ? - ccb->csio.cdb_len - 16 : 0); - - memcpy(&cmd->data_payload[desc_start], &chunk_addr, 8); - /* Set handle tag to 0 */ - memcpy(&cmd->data_payload[desc_start+12], &chunk_size, 4); - KASSERT(xp->srp_iu_size >= 48 + ((ccb->csio.cdb_len > 16) ? - ccb->csio.cdb_len : 16), ("SRP IU command length")); - } else { - cmd->formats = 0; - } - bus_dmamap_sync(xp->sc->crq_tag, xp->sc->crq_map, BUS_DMASYNC_PREWRITE); - - /* Create CRQ entry */ - crq.valid = 0x80; - crq.format = 0x01; - crq.iu_data = htobe64(xp->sc->srp_iu_phys + xp->srp_iu_offset); - - err = phyp_hcall(H_SEND_CRQ, xp->sc->unit, - be64toh(((uint64_t *)(&crq))[0]), - be64toh(((uint64_t *)(&crq))[1])); - if (err != 0) - panic("CRQ send failure (%d)", err); -} - -static void -vscsi_crq_load_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int err) -{ - struct vscsi_softc *sc = xsc; - - sc->crq_phys = segs[0].ds_addr; - sc->n_crqs = PAGE_SIZE/sizeof(struct vscsi_crq); - - sc->srp_iu_queue = (uint8_t *)(sc->crq_queue); - sc->srp_iu_phys = segs[0].ds_addr; - sc->srp_iu_arena = vmem_create("VSCSI SRP IU", PAGE_SIZE, - segs[0].ds_len - PAGE_SIZE, 16, 0, M_BESTFIT | M_NOWAIT); -} - -static void -vscsi_setup_bus(struct vscsi_softc *sc) -{ - struct vscsi_crq crq; - struct vscsi_xfer *xp; - int error; - - struct { - uint32_t type; - uint16_t status; - uint16_t length; - uint64_t tag; - uint64_t buffer; - struct { - char srp_version[8]; - char partition_name[96]; - uint32_t partition_number; - uint32_t mad_version; - uint32_t os_type; - uint32_t port_max_txu[8]; - } payload; - } mad_adapter_info; - - bzero(&crq, sizeof(crq)); - - /* Init message */ - crq.valid = 0xc0; - crq.format = 0x01; - - do { - error = phyp_hcall(H_FREE_CRQ, sc->unit); - } while (error == H_BUSY); - - /* See initialization sequence page 757 */ - bzero(sc->crq_queue, sc->n_crqs*sizeof(sc->crq_queue[0])); - sc->cur_crq = 0; - sc->bus_initialized = 0; - sc->bus_logged_in = 0; - bus_dmamap_sync(sc->crq_tag, sc->crq_map, BUS_DMASYNC_PREWRITE); - error = phyp_hcall(H_REG_CRQ, sc->unit, sc->crq_phys, - sc->n_crqs*sizeof(sc->crq_queue[0])); - KASSERT(error == 0, ("CRQ registration success")); - - error = phyp_hcall(H_SEND_CRQ, sc->unit, - be64toh(((uint64_t *)(&crq))[0]), - be64toh(((uint64_t *)(&crq))[1])); - if (error != 0) - panic("CRQ setup failure (%d)", error); - - while (sc->bus_initialized == 0) - vscsi_check_response_queue(sc); - - /* Send MAD adapter info */ - mad_adapter_info.type = htobe32(MAD_ADAPTER_INFO_REQUEST); - mad_adapter_info.status = 0; - mad_adapter_info.length = htobe16(sizeof(mad_adapter_info.payload)); - - strcpy(mad_adapter_info.payload.srp_version, "16.a"); - strcpy(mad_adapter_info.payload.partition_name, "UNKNOWN"); - mad_adapter_info.payload.partition_number = -1; - mad_adapter_info.payload.mad_version = htobe32(1); - mad_adapter_info.payload.os_type = htobe32(2); /* Claim we are Linux */ - mad_adapter_info.payload.port_max_txu[0] = 0; - /* If this fails, we get the defaults above */ - OF_getprop(OF_finddevice("/"), "ibm,partition-name", - mad_adapter_info.payload.partition_name, - sizeof(mad_adapter_info.payload.partition_name)); - OF_getprop(OF_finddevice("/"), "ibm,partition-no", - &mad_adapter_info.payload.partition_number, - sizeof(mad_adapter_info.payload.partition_number)); - - xp = TAILQ_FIRST(&sc->free_xferq); - xp->ccb = NULL; - TAILQ_REMOVE(&sc->free_xferq, xp, queue); - TAILQ_INSERT_TAIL(&sc->active_xferq, xp, queue); - xp->srp_iu_size = sizeof(mad_adapter_info); - crq.iu_length = htobe16(xp->srp_iu_size); - vmem_alloc(xp->sc->srp_iu_arena, xp->srp_iu_size, - M_BESTFIT | M_NOWAIT, &xp->srp_iu_offset); - mad_adapter_info.buffer = htobe64(xp->sc->srp_iu_phys + xp->srp_iu_offset + 24); - mad_adapter_info.tag = (uint64_t)xp; - memcpy((uint8_t *)xp->sc->srp_iu_queue + (uintptr_t)xp->srp_iu_offset, - &mad_adapter_info, sizeof(mad_adapter_info)); - crq.valid = 0x80; - crq.format = 0x02; - crq.iu_data = htobe64(xp->sc->srp_iu_phys + xp->srp_iu_offset); - bus_dmamap_sync(sc->crq_tag, sc->crq_map, BUS_DMASYNC_PREWRITE); - phyp_hcall(H_SEND_CRQ, xp->sc->unit, - be64toh(((uint64_t *)(&crq))[0]), - be64toh(((uint64_t *)(&crq))[1])); - - while (TAILQ_EMPTY(&sc->free_xferq)) - vscsi_check_response_queue(sc); - - /* Send SRP login */ - vscsi_srp_login(sc); - while (sc->bus_logged_in == 0) - vscsi_check_response_queue(sc); - - error = phyp_hcall(H_VIO_SIGNAL, sc->unit, 1); /* Enable interrupts */ -} - -static void -vscsi_intr(void *xsc) -{ - struct vscsi_softc *sc = xsc; - - mtx_lock(&sc->io_lock); - vscsi_check_response_queue(sc); - mtx_unlock(&sc->io_lock); -} - -static void -vscsi_srp_response(struct vscsi_xfer *xp, struct vscsi_crq *crq) -{ - union ccb *ccb = xp->ccb; - struct vscsi_softc *sc = xp->sc; - struct srp_rsp *rsp; - uint32_t sense_len; - - /* SRP response packet in original request */ - rsp = (struct srp_rsp *)((uint8_t *)sc->srp_iu_queue + - (uintptr_t)xp->srp_iu_offset); - ccb->csio.scsi_status = rsp->status; - if (ccb->csio.scsi_status == SCSI_STATUS_OK) - ccb->ccb_h.status = CAM_REQ_CMP; - else - ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; -#ifdef NOTYET - /* Collect fast fail codes */ - if (crq->status != 0) - ccb->ccb_h.status = CAM_REQ_CMP_ERR; -#endif - - if (ccb->ccb_h.status != CAM_REQ_CMP) { - ccb->ccb_h.status |= CAM_DEV_QFRZN; - xpt_freeze_devq(ccb->ccb_h.path, /*count*/ 1); - } - - if (!(rsp->flags & SRP_RSPVALID)) - rsp->response_data_len = 0; - if (!(rsp->flags & SRP_SNSVALID)) - rsp->sense_data_len = 0; - if (!(rsp->flags & (SRP_DOOVER | SRP_DOUNDER))) - rsp->data_out_resid = 0; - if (!(rsp->flags & (SRP_DIOVER | SRP_DIUNDER))) - rsp->data_in_resid = 0; - - if (rsp->flags & SRP_SNSVALID) { - bzero(&ccb->csio.sense_data, sizeof(struct scsi_sense_data)); - ccb->ccb_h.status |= CAM_AUTOSNS_VALID; - sense_len = min(be32toh(rsp->sense_data_len), - ccb->csio.sense_len); - memcpy(&ccb->csio.sense_data, - &rsp->data_payload[be32toh(rsp->response_data_len)], - sense_len); - ccb->csio.sense_resid = ccb->csio.sense_len - - be32toh(rsp->sense_data_len); - } - - switch (ccb->ccb_h.flags & CAM_DIR_MASK) { - case CAM_DIR_OUT: - ccb->csio.resid = rsp->data_out_resid; - break; - case CAM_DIR_IN: - ccb->csio.resid = rsp->data_in_resid; - break; - } - - bus_dmamap_sync(sc->data_tag, xp->dmamap, BUS_DMASYNC_POSTREAD); - bus_dmamap_unload(sc->data_tag, xp->dmamap); - xpt_done(ccb); - xp->ccb = NULL; -} - -static void -vscsi_login_response(struct vscsi_xfer *xp, struct vscsi_crq *crq) -{ - struct vscsi_softc *sc = xp->sc; - struct srp_login_rsp *rsp; - - /* SRP response packet in original request */ - rsp = (struct srp_login_rsp *)((uint8_t *)sc->srp_iu_queue + - (uintptr_t)xp->srp_iu_offset); - KASSERT(be16toh(rsp->buffer_formats) & 0x3, ("Both direct and indirect " - "buffers supported")); - - sc->max_transactions = be32toh(rsp->request_limit_delta); - device_printf(sc->dev, "Queue depth %d commands\n", - sc->max_transactions); - sc->bus_logged_in = 1; -} - -static void -vscsi_cam_poll(struct cam_sim *sim) -{ - struct vscsi_softc *sc = cam_sim_softc(sim); - - vscsi_check_response_queue(sc); -} - -static void -vscsi_check_response_queue(struct vscsi_softc *sc) -{ - struct vscsi_crq *crq; - struct vscsi_xfer *xp; - int code; - - mtx_assert(&sc->io_lock, MA_OWNED); - - while (sc->crq_queue[sc->cur_crq].valid != 0) { - /* The hypercalls at both ends of this are not optimal */ - phyp_hcall(H_VIO_SIGNAL, sc->unit, 0); - bus_dmamap_sync(sc->crq_tag, sc->crq_map, BUS_DMASYNC_POSTREAD); - - crq = &sc->crq_queue[sc->cur_crq]; - - switch (crq->valid) { - case 0xc0: - if (crq->format == 0x02) - sc->bus_initialized = 1; - break; - case 0x80: - /* IU data is set to tag pointer (the XP) */ - xp = (struct vscsi_xfer *)crq->iu_data; - - switch (crq->format) { - case 0x01: - code = *((uint8_t *)sc->srp_iu_queue + - (uintptr_t)xp->srp_iu_offset); - switch (code) { - case SRP_RSP: - vscsi_srp_response(xp, crq); - break; - case SRP_LOGIN_RSP: - vscsi_login_response(xp, crq); - break; - default: - device_printf(sc->dev, "Unknown SRP " - "response code %d\n", code); - break; - } - break; - case 0x02: - /* Ignore management datagrams */ - break; - default: - panic("Unknown CRQ format %d\n", crq->format); - break; - } - vmem_free(sc->srp_iu_arena, xp->srp_iu_offset, - xp->srp_iu_size); - TAILQ_REMOVE(&sc->active_xferq, xp, queue); - TAILQ_INSERT_TAIL(&sc->free_xferq, xp, queue); - break; - default: - device_printf(sc->dev, - "Unknown CRQ message type %d\n", crq->valid); - break; - } - - crq->valid = 0; - sc->cur_crq = (sc->cur_crq + 1) % sc->n_crqs; - - bus_dmamap_sync(sc->crq_tag, sc->crq_map, BUS_DMASYNC_PREWRITE); - phyp_hcall(H_VIO_SIGNAL, sc->unit, 1); - } -} diff --git a/sys/powerpc/pseries/platform_chrp.c b/sys/powerpc/pseries/platform_chrp.c deleted file mode 100644 index b2686674a52..00000000000 --- a/sys/powerpc/pseries/platform_chrp.c +++ /dev/null @@ -1,615 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2008 Marcel Moolenaar - * Copyright (c) 2009 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "platform_if.h" - -#ifdef SMP -extern void *ap_pcpu; -#endif - -#ifdef __powerpc64__ -static uint8_t splpar_vpa[MAXCPU][640] __aligned(128); /* XXX: dpcpu */ -#endif - -static vm_offset_t realmaxaddr = VM_MAX_ADDRESS; - -static int chrp_probe(platform_t); -static int chrp_attach(platform_t); -void chrp_mem_regions(platform_t, struct mem_region *phys, int *physsz, - struct mem_region *avail, int *availsz); -static vm_offset_t chrp_real_maxaddr(platform_t); -static u_long chrp_timebase_freq(platform_t, struct cpuref *cpuref); -static int chrp_smp_first_cpu(platform_t, struct cpuref *cpuref); -static int chrp_smp_next_cpu(platform_t, struct cpuref *cpuref); -static int chrp_smp_get_bsp(platform_t, struct cpuref *cpuref); -static void chrp_smp_ap_init(platform_t); -static int chrp_cpuref_init(void); -#ifdef SMP -static int chrp_smp_start_cpu(platform_t, struct pcpu *cpu); -static void chrp_smp_probe_threads(platform_t plat); -static struct cpu_group *chrp_smp_topo(platform_t plat); -#endif -static void chrp_reset(platform_t); -#ifdef __powerpc64__ -#include "phyp-hvcall.h" -static void phyp_cpu_idle(sbintime_t sbt); -#endif - -static struct cpuref platform_cpuref[MAXCPU]; -static int platform_cpuref_cnt; -static int platform_cpuref_valid; - -static platform_method_t chrp_methods[] = { - PLATFORMMETHOD(platform_probe, chrp_probe), - PLATFORMMETHOD(platform_attach, chrp_attach), - PLATFORMMETHOD(platform_mem_regions, chrp_mem_regions), - PLATFORMMETHOD(platform_real_maxaddr, chrp_real_maxaddr), - PLATFORMMETHOD(platform_timebase_freq, chrp_timebase_freq), - - PLATFORMMETHOD(platform_smp_ap_init, chrp_smp_ap_init), - PLATFORMMETHOD(platform_smp_first_cpu, chrp_smp_first_cpu), - PLATFORMMETHOD(platform_smp_next_cpu, chrp_smp_next_cpu), - PLATFORMMETHOD(platform_smp_get_bsp, chrp_smp_get_bsp), -#ifdef SMP - PLATFORMMETHOD(platform_smp_start_cpu, chrp_smp_start_cpu), - PLATFORMMETHOD(platform_smp_probe_threads, chrp_smp_probe_threads), - PLATFORMMETHOD(platform_smp_topo, chrp_smp_topo), -#endif - - PLATFORMMETHOD(platform_reset, chrp_reset), - { 0, 0 } -}; - -static platform_def_t chrp_platform = { - "chrp", - chrp_methods, - 0 -}; - -PLATFORM_DEF(chrp_platform); - -static int -chrp_probe(platform_t plat) -{ - if (OF_finddevice("/memory") != -1 || OF_finddevice("/memory@0") != -1) - return (BUS_PROBE_GENERIC); - - return (ENXIO); -} - -static int -chrp_attach(platform_t plat) -{ - int quiesce; -#ifdef __powerpc64__ - int i; -#if BYTE_ORDER == LITTLE_ENDIAN - int result; -#endif - - /* XXX: check for /rtas/ibm,hypertas-functions? */ - if (!(mfmsr() & PSL_HV)) { - struct mem_region *phys, *avail; - int nphys, navail; - vm_offset_t off; - - mem_regions(&phys, &nphys, &avail, &navail); - - realmaxaddr = 0; - for (i = 0; i < nphys; i++) { - off = phys[i].mr_start + phys[i].mr_size; - realmaxaddr = MAX(off, realmaxaddr); - } - - if (!radix_mmu) - pmap_mmu_install("mmu_phyp", BUS_PROBE_SPECIFIC); - cpu_idle_hook = phyp_cpu_idle; - - /* Set up important VPA fields */ - for (i = 0; i < MAXCPU; i++) { - /* First two: VPA size */ - splpar_vpa[i][4] = - (uint8_t)((sizeof(splpar_vpa[i]) >> 8) & 0xff); - splpar_vpa[i][5] = - (uint8_t)(sizeof(splpar_vpa[i]) & 0xff); - splpar_vpa[i][0xba] = 1; /* Maintain FPRs */ - splpar_vpa[i][0xbb] = 1; /* Maintain PMCs */ - splpar_vpa[i][0xfc] = 0xff; /* Maintain full SLB */ - splpar_vpa[i][0xfd] = 0xff; - splpar_vpa[i][0xff] = 1; /* Maintain Altivec */ - } - mb(); - - /* Set up hypervisor CPU stuff */ - chrp_smp_ap_init(plat); - -#if BYTE_ORDER == LITTLE_ENDIAN - /* - * Ask the hypervisor to update the LPAR ILE bit. - * - * This involves all processors reentering the hypervisor - * so the change appears simultaneously in all processors. - * This can take a long time. - */ - for(;;) { - result = phyp_hcall(H_SET_MODE, 1UL, - H_SET_MODE_RSRC_ILE, 0, 0); - if (result == H_SUCCESS) - break; - DELAY(1000); - } -#endif - - } -#endif - chrp_cpuref_init(); - - /* Some systems (e.g. QEMU) need Open Firmware to stand down */ - quiesce = 1; - TUNABLE_INT_FETCH("debug.quiesce_ofw", &quiesce); - if (quiesce) - ofw_quiesce(); - - return (0); -} - -static int -parse_drconf_memory(struct mem_region *ofmem, int *msz, - struct mem_region *ofavail, int *asz) -{ - phandle_t phandle; - vm_offset_t base; - int i, idx, len, lasz, lmsz, res; - uint32_t flags, lmb_size[2]; - uint32_t *dmem; - - lmsz = *msz; - lasz = *asz; - - phandle = OF_finddevice("/ibm,dynamic-reconfiguration-memory"); - if (phandle == -1) - /* No drconf node, return. */ - return (0); - - res = OF_getencprop(phandle, "ibm,lmb-size", lmb_size, - sizeof(lmb_size)); - if (res == -1) - return (0); - printf("Logical Memory Block size: %d MB\n", lmb_size[1] >> 20); - - /* Parse the /ibm,dynamic-memory. - The first position gives the # of entries. The next two words - reflect the address of the memory block. The next four words are - the DRC index, reserved, list index and flags. - (see PAPR C.6.6.2 ibm,dynamic-reconfiguration-memory) - - #el Addr DRC-idx res list-idx flags - ------------------------------------------------- - | 4 | 8 | 4 | 4 | 4 | 4 |.... - ------------------------------------------------- - */ - - len = OF_getproplen(phandle, "ibm,dynamic-memory"); - if (len > 0) { - /* We have to use a variable length array on the stack - since we have very limited stack space. - */ - cell_t arr[len/sizeof(cell_t)]; - - res = OF_getencprop(phandle, "ibm,dynamic-memory", arr, - sizeof(arr)); - if (res == -1) - return (0); - - /* Number of elements */ - idx = arr[0]; - - /* First address, in arr[1], arr[2]*/ - dmem = &arr[1]; - - for (i = 0; i < idx; i++) { - base = ((uint64_t)dmem[0] << 32) + dmem[1]; - dmem += 4; - flags = dmem[1]; - /* Use region only if available and not reserved. */ - if ((flags & 0x8) && !(flags & 0x80)) { - ofmem[lmsz].mr_start = base; - ofmem[lmsz].mr_size = (vm_size_t)lmb_size[1]; - ofavail[lasz].mr_start = base; - ofavail[lasz].mr_size = (vm_size_t)lmb_size[1]; - lmsz++; - lasz++; - } - dmem += 2; - } - } - - *msz = lmsz; - *asz = lasz; - - return (1); -} - -void -chrp_mem_regions(platform_t plat, struct mem_region *phys, int *physsz, - struct mem_region *avail, int *availsz) -{ - vm_offset_t maxphysaddr; - int i; - - ofw_mem_regions(phys, physsz, avail, availsz); - parse_drconf_memory(phys, physsz, avail, availsz); - - /* - * On some firmwares (SLOF), some memory may be marked available that - * doesn't actually exist. This manifests as an extension of the last - * available segment past the end of physical memory, so truncate that - * one. - */ - maxphysaddr = 0; - for (i = 0; i < *physsz; i++) - if (phys[i].mr_start + phys[i].mr_size > maxphysaddr) - maxphysaddr = phys[i].mr_start + phys[i].mr_size; - - for (i = 0; i < *availsz; i++) - if (avail[i].mr_start + avail[i].mr_size > maxphysaddr) - avail[i].mr_size = maxphysaddr - avail[i].mr_start; -} - -static vm_offset_t -chrp_real_maxaddr(platform_t plat) -{ - return (realmaxaddr); -} - -static u_long -chrp_timebase_freq(platform_t plat, struct cpuref *cpuref) -{ - phandle_t cpus, cpunode; - int32_t ticks = -1; - int res; - char buf[8]; - - cpus = OF_finddevice("/cpus"); - if (cpus == -1) - panic("CPU tree not found on Open Firmware\n"); - - for (cpunode = OF_child(cpus); cpunode != 0; cpunode = OF_peer(cpunode)) { - res = OF_getprop(cpunode, "device_type", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "cpu") == 0) - break; - } - if (cpunode <= 0) - panic("CPU node not found on Open Firmware\n"); - - OF_getencprop(cpunode, "timebase-frequency", &ticks, sizeof(ticks)); - - if (ticks <= 0) - panic("Unable to determine timebase frequency!"); - - return (ticks); -} - -static int -chrp_smp_first_cpu(platform_t plat, struct cpuref *cpuref) -{ - - if (platform_cpuref_valid == 0) - return (EINVAL); - - cpuref->cr_cpuid = 0; - cpuref->cr_hwref = platform_cpuref[0].cr_hwref; - - return (0); -} - -static int -chrp_smp_next_cpu(platform_t plat, struct cpuref *cpuref) -{ - int id; - - if (platform_cpuref_valid == 0) - return (EINVAL); - - id = cpuref->cr_cpuid + 1; - if (id >= platform_cpuref_cnt) - return (ENOENT); - - cpuref->cr_cpuid = platform_cpuref[id].cr_cpuid; - cpuref->cr_hwref = platform_cpuref[id].cr_hwref; - - return (0); -} - -static int -chrp_smp_get_bsp(platform_t plat, struct cpuref *cpuref) -{ - - cpuref->cr_cpuid = platform_cpuref[0].cr_cpuid; - cpuref->cr_hwref = platform_cpuref[0].cr_hwref; - return (0); -} - -static void -get_cpu_reg(phandle_t cpu, cell_t *reg) -{ - int res; - - res = OF_getproplen(cpu, "reg"); - if (res != sizeof(cell_t)) - panic("Unexpected length for CPU property reg on Open Firmware\n"); - OF_getencprop(cpu, "reg", reg, res); -} - -static int -chrp_cpuref_init(void) -{ - phandle_t cpu, dev, chosen, pbsp; - ihandle_t ibsp; - char buf[32]; - int a, bsp, res, res2, tmp_cpuref_cnt; - static struct cpuref tmp_cpuref[MAXCPU]; - cell_t interrupt_servers[32], addr_cells, size_cells, reg, bsp_reg; - - if (platform_cpuref_valid) - return (0); - - dev = OF_peer(0); - dev = OF_child(dev); - while (dev != 0) { - res = OF_getprop(dev, "name", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "cpus") == 0) - break; - dev = OF_peer(dev); - } - - /* Make sure that cpus reg property have 1 address cell and 0 size cells */ - res = OF_getproplen(dev, "#address-cells"); - res2 = OF_getproplen(dev, "#size-cells"); - if (res != res2 || res != sizeof(cell_t)) - panic("CPU properties #address-cells and #size-cells not found on Open Firmware\n"); - OF_getencprop(dev, "#address-cells", &addr_cells, sizeof(addr_cells)); - OF_getencprop(dev, "#size-cells", &size_cells, sizeof(size_cells)); - if (addr_cells != 1 || size_cells != 0) - panic("Unexpected values for CPU properties #address-cells and #size-cells on Open Firmware\n"); - - /* Look for boot CPU in /chosen/cpu and /chosen/fdtbootcpu */ - - chosen = OF_finddevice("/chosen"); - if (chosen == -1) - panic("Device /chosen not found on Open Firmware\n"); - - bsp_reg = -1; - - /* /chosen/cpu */ - if (OF_getproplen(chosen, "cpu") == sizeof(ihandle_t)) { - OF_getprop(chosen, "cpu", &ibsp, sizeof(ibsp)); - pbsp = OF_instance_to_package(be32toh(ibsp)); - if (pbsp != -1) - get_cpu_reg(pbsp, &bsp_reg); - } - - /* /chosen/fdtbootcpu */ - if (bsp_reg == -1) { - if (OF_getproplen(chosen, "fdtbootcpu") == sizeof(cell_t)) - OF_getprop(chosen, "fdtbootcpu", &bsp_reg, sizeof(bsp_reg)); - } - - if (bsp_reg == -1) - panic("Boot CPU not found on Open Firmware\n"); - - bsp = -1; - tmp_cpuref_cnt = 0; - for (cpu = OF_child(dev); cpu != 0; cpu = OF_peer(cpu)) { - res = OF_getprop(cpu, "device_type", buf, sizeof(buf)); - if (res > 0 && strcmp(buf, "cpu") == 0) { - res = OF_getproplen(cpu, "ibm,ppc-interrupt-server#s"); - if (res > 0) { - OF_getencprop(cpu, "ibm,ppc-interrupt-server#s", - interrupt_servers, res); - - get_cpu_reg(cpu, ®); - if (reg == bsp_reg) - bsp = tmp_cpuref_cnt; - - for (a = 0; a < res/sizeof(cell_t); a++) { - tmp_cpuref[tmp_cpuref_cnt].cr_hwref = interrupt_servers[a]; - tmp_cpuref[tmp_cpuref_cnt].cr_cpuid = tmp_cpuref_cnt; - tmp_cpuref_cnt++; - } - } - } - } - - if (bsp == -1) - panic("Boot CPU not found\n"); - - /* Map IDs, so BSP has CPUID 0 regardless of hwref */ - for (a = bsp; a < tmp_cpuref_cnt; a++) { - platform_cpuref[platform_cpuref_cnt].cr_hwref = tmp_cpuref[a].cr_hwref; - platform_cpuref[platform_cpuref_cnt].cr_cpuid = platform_cpuref_cnt; - platform_cpuref_cnt++; - } - for (a = 0; a < bsp; a++) { - platform_cpuref[platform_cpuref_cnt].cr_hwref = tmp_cpuref[a].cr_hwref; - platform_cpuref[platform_cpuref_cnt].cr_cpuid = platform_cpuref_cnt; - platform_cpuref_cnt++; - } - - platform_cpuref_valid = 1; - - return (0); -} - -#ifdef SMP -static int -chrp_smp_start_cpu(platform_t plat, struct pcpu *pc) -{ - cell_t start_cpu; - int result, err, timeout; - - if (!rtas_exists()) { - printf("RTAS uninitialized: unable to start AP %d\n", - pc->pc_cpuid); - return (ENXIO); - } - - start_cpu = rtas_token_lookup("start-cpu"); - if (start_cpu == -1) { - printf("RTAS unknown method: unable to start AP %d\n", - pc->pc_cpuid); - return (ENXIO); - } - - ap_pcpu = pc; - powerpc_sync(); - - result = rtas_call_method(start_cpu, 3, 1, pc->pc_hwref, EXC_RST, pc, - &err); - if (result < 0 || err != 0) { - printf("RTAS error (%d/%d): unable to start AP %d\n", - result, err, pc->pc_cpuid); - return (ENXIO); - } - - timeout = 10000; - while (!pc->pc_awake && timeout--) - DELAY(100); - - return ((pc->pc_awake) ? 0 : EBUSY); -} - -static void -chrp_smp_probe_threads(platform_t plat) -{ - struct pcpu *pc, *last_pc; - int i, ncores; - - ncores = 0; - last_pc = NULL; - for (i = 0; i <= mp_maxid; i++) { - pc = pcpu_find(i); - if (pc == NULL) - continue; - if (last_pc == NULL || pc->pc_hwref != last_pc->pc_hwref) - ncores++; - last_pc = pc; - } - - mp_ncores = ncores; - if (mp_ncpus % ncores == 0) - smp_threads_per_core = mp_ncpus / ncores; -} - -static struct cpu_group * -chrp_smp_topo(platform_t plat) -{ - - if (mp_ncpus % mp_ncores != 0) { - printf("WARNING: Irregular SMP topology. Performance may be " - "suboptimal (%d CPUS, %d cores)\n", mp_ncpus, mp_ncores); - return (smp_topo_none()); - } - - /* Don't do anything fancier for non-threaded SMP */ - if (mp_ncpus == mp_ncores) - return (smp_topo_none()); - - return (smp_topo_1level(CG_SHARE_L1, smp_threads_per_core, - CG_FLAG_SMT)); -} -#endif - -static void -chrp_reset(platform_t platform) -{ - OF_reboot(); -} - -#ifdef __powerpc64__ -static void -phyp_cpu_idle(sbintime_t sbt) -{ - register_t msr; - - msr = mfmsr(); - - mtmsr(msr & ~PSL_EE); - if (sched_runnable()) { - mtmsr(msr); - return; - } - - phyp_hcall(H_CEDE); /* Re-enables interrupts internally */ - mtmsr(msr); -} - -static void -chrp_smp_ap_init(platform_t platform) -{ - if (!(mfmsr() & PSL_HV)) { - /* Register VPA */ - phyp_hcall(H_REGISTER_VPA, 1UL, PCPU_GET(hwref), - splpar_vpa[PCPU_GET(hwref)]); - - /* Set interrupt priority */ - phyp_hcall(H_CPPR, 0xff); - } -} -#else -static void -chrp_smp_ap_init(platform_t platform) -{ -} -#endif diff --git a/sys/powerpc/pseries/plpar_iommu.c b/sys/powerpc/pseries/plpar_iommu.c deleted file mode 100644 index b9e328752f4..00000000000 --- a/sys/powerpc/pseries/plpar_iommu.c +++ /dev/null @@ -1,244 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2013, Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include -#include - -MALLOC_DEFINE(M_PHYPIOMMU, "iommu", "IOMMU data for PAPR LPARs"); - -struct papr_iommu_map { - uint32_t iobn; - vmem_t *vmem; - struct papr_iommu_map *next; -}; - -static SLIST_HEAD(iommu_maps, iommu_map) iommu_map_head = - SLIST_HEAD_INITIALIZER(iommu_map_head); -static int papr_supports_stuff_tce = -1; - -struct iommu_map { - uint32_t iobn; - vmem_t *vmem; - - SLIST_ENTRY(iommu_map) entries; -}; - -struct dma_window { - struct iommu_map *map; - bus_addr_t start; - bus_addr_t end; -}; - -int -phyp_iommu_set_dma_tag(device_t bus, device_t dev, bus_dma_tag_t tag) -{ - device_t p; - phandle_t node; - cell_t dma_acells, dma_scells, dmawindow[6]; - struct iommu_map *i; - int cell; - - for (p = dev; device_get_parent(p) != NULL; p = device_get_parent(p)) { - if (ofw_bus_has_prop(p, "ibm,my-dma-window")) - break; - if (ofw_bus_has_prop(p, "ibm,dma-window")) - break; - } - - if (p == NULL) - return (ENXIO); - - node = ofw_bus_get_node(p); - if (OF_getencprop(node, "ibm,#dma-size-cells", &dma_scells, - sizeof(cell_t)) <= 0) - OF_searchencprop(node, "#size-cells", &dma_scells, - sizeof(cell_t)); - if (OF_getencprop(node, "ibm,#dma-address-cells", &dma_acells, - sizeof(cell_t)) <= 0) - OF_searchencprop(node, "#address-cells", &dma_acells, - sizeof(cell_t)); - - if (ofw_bus_has_prop(p, "ibm,my-dma-window")) - OF_getencprop(node, "ibm,my-dma-window", dmawindow, - sizeof(cell_t)*(dma_scells + dma_acells + 1)); - else - OF_getencprop(node, "ibm,dma-window", dmawindow, - sizeof(cell_t)*(dma_scells + dma_acells + 1)); - - struct dma_window *window = malloc(sizeof(struct dma_window), - M_PHYPIOMMU, M_WAITOK); - window->start = 0; - for (cell = 1; cell < 1 + dma_acells; cell++) { - window->start <<= 32; - window->start |= dmawindow[cell]; - } - window->end = 0; - for (; cell < 1 + dma_acells + dma_scells; cell++) { - window->end <<= 32; - window->end |= dmawindow[cell]; - } - window->end += window->start; - - if (bootverbose) - device_printf(dev, "Mapping IOMMU domain %#x\n", dmawindow[0]); - window->map = NULL; - SLIST_FOREACH(i, &iommu_map_head, entries) { - if (i->iobn == dmawindow[0]) { - window->map = i; - break; - } - } - - if (window->map == NULL) { - window->map = malloc(sizeof(struct iommu_map), M_PHYPIOMMU, - M_WAITOK); - window->map->iobn = dmawindow[0]; - /* - * Allocate IOMMU range beginning at PAGE_SIZE. Some drivers - * (em(4), for example) do not like getting mappings at 0. - */ - window->map->vmem = vmem_create("IOMMU mappings", PAGE_SIZE, - trunc_page(VMEM_ADDR_MAX) - PAGE_SIZE, PAGE_SIZE, 0, - M_BESTFIT | M_NOWAIT); - SLIST_INSERT_HEAD(&iommu_map_head, window->map, entries); - } - - /* - * Check experimentally whether we can use H_STUFF_TCE. It is required - * by the spec but some firmware (e.g. QEMU) does not actually support - * it - */ - if (papr_supports_stuff_tce == -1) - papr_supports_stuff_tce = !(phyp_hcall(H_STUFF_TCE, - window->map->iobn, 0, 0, 0) == H_FUNCTION); - - bus_dma_tag_set_iommu(tag, bus, window); - - return (0); -} - -int -phyp_iommu_map(device_t dev, bus_dma_segment_t *segs, int *nsegs, - bus_addr_t min, bus_addr_t max, bus_size_t alignment, bus_addr_t boundary, - void *cookie) -{ - struct dma_window *window = cookie; - bus_addr_t minaddr, maxaddr; - bus_addr_t alloced; - bus_size_t allocsize; - int error, i, j; - uint64_t tce; - minaddr = window->start; - maxaddr = window->end; - - /* XXX: handle exclusion range in a more useful way */ - if (min < maxaddr) - maxaddr = min; - - /* XXX: consolidate segs? */ - for (i = 0; i < *nsegs; i++) { - allocsize = round_page(segs[i].ds_len + - (segs[i].ds_addr & PAGE_MASK)); - error = vmem_xalloc(window->map->vmem, allocsize, - (alignment < PAGE_SIZE) ? PAGE_SIZE : alignment, 0, - boundary, minaddr, maxaddr, M_BESTFIT | M_NOWAIT, &alloced); - if (error != 0) { - panic("VMEM failure: %d\n", error); - return (error); - } - KASSERT(alloced % PAGE_SIZE == 0, ("Alloc not page aligned")); - KASSERT((alloced + (segs[i].ds_addr & PAGE_MASK)) % - alignment == 0, - ("Allocated segment does not match alignment constraint")); - - tce = trunc_page(segs[i].ds_addr); - tce |= 0x3; /* read/write */ - for (j = 0; j < allocsize; j += PAGE_SIZE) { - error = phyp_hcall(H_PUT_TCE, window->map->iobn, - alloced + j, tce + j); - if (error < 0) { - panic("IOMMU mapping error: %d\n", error); - return (ENOMEM); - } - } - - segs[i].ds_addr = alloced + (segs[i].ds_addr & PAGE_MASK); - KASSERT(segs[i].ds_addr > 0, ("Address needs to be positive")); - KASSERT(segs[i].ds_addr + segs[i].ds_len < maxaddr, - ("Address not in range")); - if (error < 0) { - panic("IOMMU mapping error: %d\n", error); - return (ENOMEM); - } - } - - return (0); -} - -int -phyp_iommu_unmap(device_t dev, bus_dma_segment_t *segs, int nsegs, void *cookie) -{ - struct dma_window *window = cookie; - bus_addr_t pageround; - bus_size_t roundedsize; - int i; - bus_addr_t j; - - for (i = 0; i < nsegs; i++) { - pageround = trunc_page(segs[i].ds_addr); - roundedsize = round_page(segs[i].ds_len + - (segs[i].ds_addr & PAGE_MASK)); - - if (papr_supports_stuff_tce) { - phyp_hcall(H_STUFF_TCE, window->map->iobn, pageround, 0, - roundedsize/PAGE_SIZE); - } else { - for (j = 0; j < roundedsize; j += PAGE_SIZE) - phyp_hcall(H_PUT_TCE, window->map->iobn, - pageround + j, 0); - } - - vmem_xfree(window->map->vmem, pageround, roundedsize); - } - - return (0); -} diff --git a/sys/powerpc/pseries/plpar_iommu.h b/sys/powerpc/pseries/plpar_iommu.h deleted file mode 100644 index 4a7c752d19e..00000000000 --- a/sys/powerpc/pseries/plpar_iommu.h +++ /dev/null @@ -1,42 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2013, Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _PSERIES_PHYP_IOMMU_H_ -#define _PSERIES_PHYP_IOMMU_H_ - -#include -#include - -int phyp_iommu_set_dma_tag(device_t dev, device_t child, bus_dma_tag_t tag); -int phyp_iommu_map(device_t dev, bus_dma_segment_t *segs, int *nsegs, - bus_addr_t min, bus_addr_t max, bus_size_t alignment, bus_addr_t boundary, - void *cookie); -int phyp_iommu_unmap(device_t dev, bus_dma_segment_t *segs, int nsegs, - void *cookie); - -#endif diff --git a/sys/powerpc/pseries/plpar_pcibus.c b/sys/powerpc/pseries/plpar_pcibus.c deleted file mode 100644 index 93bdc337231..00000000000 --- a/sys/powerpc/pseries/plpar_pcibus.c +++ /dev/null @@ -1,112 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include -#include - -#include -#include - -#include "pci_if.h" -#include "iommu_if.h" - -static int plpar_pcibus_probe(device_t); -static bus_dma_tag_t plpar_pcibus_get_dma_tag(device_t dev, device_t child); - -/* - * Driver methods. - */ -static device_method_t plpar_pcibus_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, plpar_pcibus_probe), - - /* IOMMU functions */ - DEVMETHOD(bus_get_dma_tag, plpar_pcibus_get_dma_tag), - DEVMETHOD(iommu_map, phyp_iommu_map), - DEVMETHOD(iommu_unmap, phyp_iommu_unmap), - - DEVMETHOD_END -}; - -static devclass_t pci_devclass; -DEFINE_CLASS_1(pci, plpar_pcibus_driver, plpar_pcibus_methods, - sizeof(struct pci_softc), ofw_pcibus_driver); -DRIVER_MODULE(plpar_pcibus, pcib, plpar_pcibus_driver, pci_devclass, 0, 0); - -static int -plpar_pcibus_probe(device_t dev) -{ - phandle_t rtas; - - if (ofw_bus_get_node(dev) == -1 || !rtas_exists()) - return (ENXIO); - - rtas = OF_finddevice("/rtas"); - if (!OF_hasprop(rtas, "ibm,hypertas-functions")) - return (ENXIO); - - device_set_desc(dev, "POWER Hypervisor PCI bus"); - - return (BUS_PROBE_SPECIFIC); -} - -static bus_dma_tag_t -plpar_pcibus_get_dma_tag(device_t dev, device_t child) -{ - struct ofw_pcibus_devinfo *dinfo; - - while (device_get_parent(child) != dev) - child = device_get_parent(child); - - dinfo = device_get_ivars(child); - - if (dinfo->opd_dma_tag != NULL) - return (dinfo->opd_dma_tag); - - bus_dma_tag_create(bus_get_dma_tag(dev), - 1, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, - NULL, NULL, BUS_SPACE_MAXSIZE, BUS_SPACE_UNRESTRICTED, - BUS_SPACE_MAXSIZE, 0, NULL, NULL, &dinfo->opd_dma_tag); - phyp_iommu_set_dma_tag(dev, child, dinfo->opd_dma_tag); - - return (dinfo->opd_dma_tag); -} diff --git a/sys/powerpc/pseries/rtas_dev.c b/sys/powerpc/pseries/rtas_dev.c deleted file mode 100644 index cebe3a0edc8..00000000000 --- a/sys/powerpc/pseries/rtas_dev.c +++ /dev/null @@ -1,173 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include "clock_if.h" - -static int rtasdev_probe(device_t); -static int rtasdev_attach(device_t); -/* clock interface */ -static int rtas_gettime(device_t dev, struct timespec *ts); -static int rtas_settime(device_t dev, struct timespec *ts); - -static void rtas_shutdown(void *arg, int howto); - -static device_method_t rtasdev_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, rtasdev_probe), - DEVMETHOD(device_attach, rtasdev_attach), - - /* clock interface */ - DEVMETHOD(clock_gettime, rtas_gettime), - DEVMETHOD(clock_settime, rtas_settime), - - { 0, 0 }, -}; - -static driver_t rtasdev_driver = { - "rtas", - rtasdev_methods, - 0 -}; - -static devclass_t rtasdev_devclass; - -DRIVER_MODULE(rtasdev, ofwbus, rtasdev_driver, rtasdev_devclass, 0, 0); - -static int -rtasdev_probe(device_t dev) -{ - const char *name = ofw_bus_get_name(dev); - - if (strcmp(name, "rtas") != 0) - return (ENXIO); - if (!rtas_exists()) - return (ENXIO); - - device_set_desc(dev, "Run-Time Abstraction Services"); - return (0); -} - -static int -rtasdev_attach(device_t dev) -{ - if (rtas_token_lookup("get-time-of-day") != -1) - clock_register(dev, 2000); - - EVENTHANDLER_REGISTER(shutdown_final, rtas_shutdown, NULL, - SHUTDOWN_PRI_LAST); - - return (0); -} - -static int -rtas_gettime(device_t dev, struct timespec *ts) { - struct clocktime ct; - cell_t tod[8]; - cell_t token; - int error; - - token = rtas_token_lookup("get-time-of-day"); - if (token == -1) - return (ENXIO); - error = rtas_call_method(token, 0, 8, &tod[0], &tod[1], &tod[2], - &tod[3], &tod[4], &tod[5], &tod[6], &tod[7]); - if (error < 0) - return (ENXIO); - if (tod[0] != 0) - return ((tod[0] == -1) ? ENXIO : EAGAIN); - - ct.year = tod[1]; - ct.mon = tod[2]; - ct.day = tod[3]; - ct.hour = tod[4]; - ct.min = tod[5]; - ct.sec = tod[6]; - ct.nsec = tod[7]; - - return (clock_ct_to_ts(&ct, ts)); -} - -static int -rtas_settime(device_t dev, struct timespec *ts) -{ - struct clocktime ct; - cell_t token, status; - int error; - - token = rtas_token_lookup("set-time-of-day"); - if (token == -1) - return (ENXIO); - - clock_ts_to_ct(ts, &ct); - error = rtas_call_method(token, 7, 1, ct.year, ct.mon, ct.day, ct.hour, - ct.min, ct.sec, ct.nsec, &status); - if (error < 0) - return (ENXIO); - if (status != 0) - return (((int)status < 0) ? ENXIO : EAGAIN); - - return (0); -} - -static void -rtas_shutdown(void *arg, int howto) -{ - cell_t token, status; - - if (howto & RB_HALT) { - token = rtas_token_lookup("power-off"); - if (token == -1) - return; - - rtas_call_method(token, 2, 1, 0, 0, &status); - } else { - token = rtas_token_lookup("system-reboot"); - if (token == -1) - return; - - rtas_call_method(token, 0, 1, &status); - } -} diff --git a/sys/powerpc/pseries/rtas_pci.c b/sys/powerpc/pseries/rtas_pci.c deleted file mode 100644 index e9975380fda..00000000000 --- a/sys/powerpc/pseries/rtas_pci.c +++ /dev/null @@ -1,210 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include "pcib_if.h" -#include "iommu_if.h" - -/* - * Device interface. - */ -static int rtaspci_probe(device_t); -static int rtaspci_attach(device_t); - -/* - * pcib interface. - */ -static u_int32_t rtaspci_read_config(device_t, u_int, u_int, u_int, - u_int, int); -static void rtaspci_write_config(device_t, u_int, u_int, u_int, - u_int, u_int32_t, int); - -/* - * Driver methods. - */ -static device_method_t rtaspci_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, rtaspci_probe), - DEVMETHOD(device_attach, rtaspci_attach), - - /* pcib interface */ - DEVMETHOD(pcib_read_config, rtaspci_read_config), - DEVMETHOD(pcib_write_config, rtaspci_write_config), - - DEVMETHOD_END -}; - -struct rtaspci_softc { - struct ofw_pci_softc pci_sc; - - struct ofw_pci_register sc_pcir; - - cell_t read_pci_config, write_pci_config; - cell_t ex_read_pci_config, ex_write_pci_config; - int sc_extended_config; -}; - -static devclass_t rtaspci_devclass; -DEFINE_CLASS_1(pcib, rtaspci_driver, rtaspci_methods, - sizeof(struct rtaspci_softc), ofw_pci_driver); -DRIVER_MODULE(rtaspci, ofwbus, rtaspci_driver, rtaspci_devclass, 0, 0); - -static int -rtaspci_probe(device_t dev) -{ - const char *type; - - if (!rtas_exists()) - return (ENXIO); - - type = ofw_bus_get_type(dev); - - if (OF_getproplen(ofw_bus_get_node(dev), "used-by-rtas") < 0) - return (ENXIO); - if (type == NULL || strcmp(type, "pci") != 0) - return (ENXIO); - - device_set_desc(dev, "RTAS Host-PCI bridge"); - return (BUS_PROBE_GENERIC); -} - -static int -rtaspci_attach(device_t dev) -{ - struct rtaspci_softc *sc; - - sc = device_get_softc(dev); - - if (OF_getencprop(ofw_bus_get_node(dev), "reg", (pcell_t *)&sc->sc_pcir, - sizeof(sc->sc_pcir)) == -1) - return (ENXIO); - - sc->read_pci_config = rtas_token_lookup("read-pci-config"); - sc->write_pci_config = rtas_token_lookup("write-pci-config"); - sc->ex_read_pci_config = rtas_token_lookup("ibm,read-pci-config"); - sc->ex_write_pci_config = rtas_token_lookup("ibm,write-pci-config"); - - sc->sc_extended_config = 0; - OF_getencprop(ofw_bus_get_node(dev), "ibm,pci-config-space-type", - &sc->sc_extended_config, sizeof(sc->sc_extended_config)); - - return (ofw_pci_attach(dev)); -} - -static uint32_t -rtaspci_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, - int width) -{ - struct rtaspci_softc *sc; - uint32_t retval = 0xffffffff; - uint32_t config_addr; - int error, pcierror; - - sc = device_get_softc(dev); - - config_addr = ((bus & 0xff) << 16) | ((slot & 0x1f) << 11) | - ((func & 0x7) << 8) | (reg & 0xff); - if (sc->sc_extended_config) - config_addr |= (reg & 0xf00) << 16; - - if (sc->ex_read_pci_config != -1) - error = rtas_call_method(sc->ex_read_pci_config, 4, 2, - config_addr, sc->sc_pcir.phys_hi, - sc->sc_pcir.phys_mid, width, &pcierror, &retval); - else - error = rtas_call_method(sc->read_pci_config, 2, 2, - config_addr, width, &pcierror, &retval); - - /* Sign-extend output */ - switch (width) { - case 1: - retval = (int32_t)(int8_t)(retval); - break; - case 2: - retval = (int32_t)(int16_t)(retval); - break; - } - - if (error < 0 || pcierror != 0) - retval = 0xffffffff; - - return (retval); -} - -static void -rtaspci_write_config(device_t dev, u_int bus, u_int slot, u_int func, - u_int reg, uint32_t val, int width) -{ - struct rtaspci_softc *sc; - uint32_t config_addr; - int pcierror; - - sc = device_get_softc(dev); - - config_addr = ((bus & 0xff) << 16) | ((slot & 0x1f) << 11) | - ((func & 0x7) << 8) | (reg & 0xff); - if (sc->sc_extended_config) - config_addr |= (reg & 0xf00) << 16; - - if (sc->ex_write_pci_config != -1) - rtas_call_method(sc->ex_write_pci_config, 5, 1, config_addr, - sc->sc_pcir.phys_hi, sc->sc_pcir.phys_mid, - width, val, &pcierror); - else - rtas_call_method(sc->write_pci_config, 3, 1, config_addr, - width, val, &pcierror); -} diff --git a/sys/powerpc/pseries/vdevice.c b/sys/powerpc/pseries/vdevice.c deleted file mode 100644 index 9f3b3c15d96..00000000000 --- a/sys/powerpc/pseries/vdevice.c +++ /dev/null @@ -1,216 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -#include "iommu_if.h" - -static int vdevice_probe(device_t); -static int vdevice_attach(device_t); -static const struct ofw_bus_devinfo *vdevice_get_devinfo(device_t dev, - device_t child); -static int vdevice_print_child(device_t dev, device_t child); -static struct resource_list *vdevice_get_resource_list(device_t, device_t); -static bus_dma_tag_t vdevice_get_dma_tag(device_t dev, device_t child); - -/* - * VDevice devinfo - */ -struct vdevice_devinfo { - struct ofw_bus_devinfo mdi_obdinfo; - struct resource_list mdi_resources; - bus_dma_tag_t mdi_dma_tag; -}; - -static device_method_t vdevice_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, vdevice_probe), - DEVMETHOD(device_attach, vdevice_attach), - - /* Bus interface */ - DEVMETHOD(bus_add_child, bus_generic_add_child), - DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), - DEVMETHOD(bus_print_child, vdevice_print_child), - DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), - DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), - DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), - DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), - DEVMETHOD(bus_get_resource_list, vdevice_get_resource_list), - - /* ofw_bus interface */ - DEVMETHOD(ofw_bus_get_devinfo, vdevice_get_devinfo), - DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), - DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), - DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), - DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), - DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), - - /* IOMMU interface */ - DEVMETHOD(bus_get_dma_tag, vdevice_get_dma_tag), - DEVMETHOD(iommu_map, phyp_iommu_map), - DEVMETHOD(iommu_unmap, phyp_iommu_unmap), - - DEVMETHOD_END -}; - -static driver_t vdevice_driver = { - "vdevice", - vdevice_methods, - 0 -}; - -static devclass_t vdevice_devclass; - -DRIVER_MODULE(vdevice, ofwbus, vdevice_driver, vdevice_devclass, 0, 0); - -static int -vdevice_probe(device_t dev) -{ - const char *name; - - name = ofw_bus_get_name(dev); - - if (name == NULL || strcmp(name, "vdevice") != 0) - return (ENXIO); - - if (!ofw_bus_is_compatible(dev, "IBM,vdevice")) - return (ENXIO); - - device_set_desc(dev, "POWER Hypervisor Virtual Device Root"); - - return (0); -} - -static int -vdevice_attach(device_t dev) -{ - phandle_t root, child; - device_t cdev; - struct vdevice_devinfo *dinfo; - - root = ofw_bus_get_node(dev); - - /* The XICP (root PIC) will handle all our interrupts */ - powerpc_register_pic(root_pic, OF_xref_from_node(root), - 1 << 24 /* 24-bit XIRR field */, 1 /* Number of IPIs */, FALSE); - - for (child = OF_child(root); child != 0; child = OF_peer(child)) { - dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); - - if (ofw_bus_gen_setup_devinfo(&dinfo->mdi_obdinfo, - child) != 0) { - free(dinfo, M_DEVBUF); - continue; - } - resource_list_init(&dinfo->mdi_resources); - - ofw_bus_intr_to_rl(dev, child, &dinfo->mdi_resources, NULL); - - cdev = device_add_child(dev, NULL, -1); - if (cdev == NULL) { - device_printf(dev, "<%s>: device_add_child failed\n", - dinfo->mdi_obdinfo.obd_name); - ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo); - free(dinfo, M_DEVBUF); - continue; - } - device_set_ivars(cdev, dinfo); - } - - return (bus_generic_attach(dev)); -} - -static const struct ofw_bus_devinfo * -vdevice_get_devinfo(device_t dev, device_t child) -{ - return (device_get_ivars(child)); -} - -static int -vdevice_print_child(device_t dev, device_t child) -{ - struct vdevice_devinfo *dinfo; - struct resource_list *rl; - int retval = 0; - - dinfo = device_get_ivars(child); - rl = &dinfo->mdi_resources; - - retval += bus_print_child_header(dev, child); - - retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); - - retval += bus_print_child_footer(dev, child); - - return (retval); -} - -static struct resource_list * -vdevice_get_resource_list (device_t dev, device_t child) -{ - struct vdevice_devinfo *dinfo; - - dinfo = device_get_ivars(child); - return (&dinfo->mdi_resources); -} - -static bus_dma_tag_t -vdevice_get_dma_tag(device_t dev, device_t child) -{ - struct vdevice_devinfo *dinfo; - while (child != NULL && device_get_parent(child) != dev) - child = device_get_parent(child); - dinfo = device_get_ivars(child); - - if (dinfo->mdi_dma_tag == NULL) { - bus_dma_tag_create(bus_get_dma_tag(dev), - 1, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, - NULL, NULL, BUS_SPACE_MAXSIZE, BUS_SPACE_UNRESTRICTED, - BUS_SPACE_MAXSIZE, 0, NULL, NULL, &dinfo->mdi_dma_tag); - phyp_iommu_set_dma_tag(dev, child, dinfo->mdi_dma_tag); - } - - return (dinfo->mdi_dma_tag); -} diff --git a/sys/powerpc/pseries/xics.c b/sys/powerpc/pseries/xics.c deleted file mode 100644 index f56e3fb44d5..00000000000 --- a/sys/powerpc/pseries/xics.c +++ /dev/null @@ -1,573 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright 2011 Nathan Whitehorn - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "opt_platform.h" - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include - -#ifdef POWERNV -#include -#endif - -#include "phyp-hvcall.h" -#include "pic_if.h" - -#define XICP_PRIORITY 5 /* Random non-zero number */ -#define XICP_IPI 2 -#define MAX_XICP_IRQS (1<<24) /* 24-bit XIRR field */ - -static int xicp_probe(device_t); -static int xicp_attach(device_t); -static int xics_probe(device_t); -static int xics_attach(device_t); - -static void xicp_bind(device_t dev, u_int irq, cpuset_t cpumask, void **priv); -static void xicp_dispatch(device_t, struct trapframe *); -static void xicp_enable(device_t, u_int, u_int, void **priv); -static void xicp_eoi(device_t, u_int, void *priv); -static void xicp_ipi(device_t, u_int); -static void xicp_mask(device_t, u_int, void *priv); -static void xicp_unmask(device_t, u_int, void *priv); - -#ifdef POWERNV -extern void (*powernv_smp_ap_extra_init)(void); -static void xicp_smp_cpu_startup(void); -#endif - -static device_method_t xicp_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, xicp_probe), - DEVMETHOD(device_attach, xicp_attach), - - /* PIC interface */ - DEVMETHOD(pic_bind, xicp_bind), - DEVMETHOD(pic_dispatch, xicp_dispatch), - DEVMETHOD(pic_enable, xicp_enable), - DEVMETHOD(pic_eoi, xicp_eoi), - DEVMETHOD(pic_ipi, xicp_ipi), - DEVMETHOD(pic_mask, xicp_mask), - DEVMETHOD(pic_unmask, xicp_unmask), - - DEVMETHOD_END -}; - -static device_method_t xics_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, xics_probe), - DEVMETHOD(device_attach, xics_attach), - - DEVMETHOD_END -}; - -struct xicp_intvec { - int irq; - int vector; - int cpu; -}; - -struct xicp_softc { - struct mtx sc_mtx; - struct resource *mem[MAXCPU]; - - int cpu_range[2]; - - int ibm_int_on; - int ibm_int_off; - int ibm_get_xive; - int ibm_set_xive; - - /* XXX: inefficient -- hash table? tree? */ - struct xicp_intvec intvecs[256]; - int nintvecs; - int ipi_vec; - bool xics_emu; -}; - -static driver_t xicp_driver = { - "xicp", - xicp_methods, - sizeof(struct xicp_softc) -}; - -static driver_t xics_driver = { - "xics", - xics_methods, - 0 -}; - -#ifdef POWERNV -/* We can only pass physical addresses into OPAL. Kernel stacks are in the KVA, - * not in the direct map, so we need to somehow extract the physical address. - * However, pmap_kextract() takes locks, which is forbidden in a critical region - * (which PIC_DISPATCH() operates in). The kernel is mapped into the Direct - * Map (0xc000....), and the CPU implicitly drops the top two bits when doing - * real address by nature that the bus width is smaller than 64-bits. Placing - * cpu_xirr into the DMAP lets us take advantage of this and avoids the - * pmap_kextract() that would otherwise be needed if using the stack variable. - */ -static uint32_t cpu_xirr[MAXCPU]; -#endif - -static devclass_t xicp_devclass; -static devclass_t xics_devclass; - -EARLY_DRIVER_MODULE(xicp, ofwbus, xicp_driver, xicp_devclass, 0, 0, - BUS_PASS_INTERRUPT-1); -EARLY_DRIVER_MODULE(xics, ofwbus, xics_driver, xics_devclass, 0, 0, - BUS_PASS_INTERRUPT); - -#ifdef POWERNV -static struct resource * -xicp_mem_for_cpu(int cpu) -{ - device_t dev; - struct xicp_softc *sc; - int i; - - for (i = 0; (dev = devclass_get_device(xicp_devclass, i)) != NULL; i++){ - sc = device_get_softc(dev); - if (cpu >= sc->cpu_range[0] && cpu < sc->cpu_range[1]) - return (sc->mem[cpu - sc->cpu_range[0]]); - } - - return (NULL); -} -#endif - -static int -xicp_probe(device_t dev) -{ - - if (!ofw_bus_is_compatible(dev, "ibm,ppc-xicp") && - !ofw_bus_is_compatible(dev, "ibm,opal-intc")) - return (ENXIO); - - device_set_desc(dev, "External Interrupt Presentation Controller"); - return (BUS_PROBE_GENERIC); -} - -static int -xics_probe(device_t dev) -{ - - if (!ofw_bus_is_compatible(dev, "ibm,ppc-xics") && - !ofw_bus_is_compatible(dev, "IBM,opal-xics")) - return (ENXIO); - - device_set_desc(dev, "External Interrupt Source Controller"); - return (BUS_PROBE_GENERIC); -} - -static int -xicp_attach(device_t dev) -{ - struct xicp_softc *sc = device_get_softc(dev); - phandle_t phandle = ofw_bus_get_node(dev); - - if (rtas_exists()) { - sc->ibm_int_on = rtas_token_lookup("ibm,int-on"); - sc->ibm_int_off = rtas_token_lookup("ibm,int-off"); - sc->ibm_set_xive = rtas_token_lookup("ibm,set-xive"); - sc->ibm_get_xive = rtas_token_lookup("ibm,get-xive"); -#ifdef POWERNV - } else if (opal_check() == 0) { - /* No init needed */ -#endif - } else { - device_printf(dev, "Cannot attach without RTAS or OPAL\n"); - return (ENXIO); - } - - if (OF_hasprop(phandle, "ibm,interrupt-server-ranges")) { - OF_getencprop(phandle, "ibm,interrupt-server-ranges", - sc->cpu_range, sizeof(sc->cpu_range)); - sc->cpu_range[1] += sc->cpu_range[0]; - device_printf(dev, "Handling CPUs %d-%d\n", sc->cpu_range[0], - sc->cpu_range[1]-1); -#ifdef POWERNV - } else if (ofw_bus_is_compatible(dev, "ibm,opal-intc")) { - /* - * For now run POWER9 XIVE interrupt controller in XICS - * compatibility mode. - */ - sc->xics_emu = true; - opal_call(OPAL_XIVE_RESET, OPAL_XIVE_XICS_MODE_EMU); -#endif - } else { - sc->cpu_range[0] = 0; - sc->cpu_range[1] = mp_ncpus; - } - -#ifdef POWERNV - if (mfmsr() & PSL_HV) { - int i; - - if (sc->xics_emu) { - opal_call(OPAL_INT_SET_CPPR, 0xff); - for (i = 0; i < mp_ncpus; i++) { - opal_call(OPAL_INT_SET_MFRR, - pcpu_find(i)->pc_hwref, 0xff); - } - } else { - for (i = 0; i < sc->cpu_range[1] - sc->cpu_range[0]; i++) { - sc->mem[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, - &i, RF_ACTIVE); - if (sc->mem[i] == NULL) { - device_printf(dev, "Could not alloc mem " - "resource %d\n", i); - return (ENXIO); - } - - /* Unmask interrupts on all cores */ - bus_write_1(sc->mem[i], 4, 0xff); - bus_write_1(sc->mem[i], 12, 0xff); - } - } - } -#endif - - mtx_init(&sc->sc_mtx, "XICP", NULL, MTX_DEF); - sc->nintvecs = 0; - - powerpc_register_pic(dev, OF_xref_from_node(phandle), MAX_XICP_IRQS, - 1 /* Number of IPIs */, FALSE); - root_pic = dev; - -#ifdef POWERNV - if (sc->xics_emu) - powernv_smp_ap_extra_init = xicp_smp_cpu_startup; -#endif - - return (0); -} - -static int -xics_attach(device_t dev) -{ - phandle_t phandle = ofw_bus_get_node(dev); - - /* The XICP (root PIC) will handle all our interrupts */ - powerpc_register_pic(root_pic, OF_xref_from_node(phandle), - MAX_XICP_IRQS, 1 /* Number of IPIs */, FALSE); - - return (0); -} - -static __inline struct xicp_intvec * -xicp_setup_priv(struct xicp_softc *sc, u_int irq, void **priv) -{ - if (*priv == NULL) { - KASSERT(sc->nintvecs + 1 < nitems(sc->intvecs), - ("Too many XICP interrupts")); - mtx_lock(&sc->sc_mtx); - *priv = &sc->intvecs[sc->nintvecs++]; - mtx_unlock(&sc->sc_mtx); - } - - return (*priv); -} - -/* - * PIC I/F methods. - */ - -static void -xicp_bind(device_t dev, u_int irq, cpuset_t cpumask, void **priv) -{ - struct xicp_softc *sc = device_get_softc(dev); - struct xicp_intvec *iv; - cell_t status, cpu; - int ncpus, i, error = -1; - - /* Ignore IPIs */ - if (irq == MAX_XICP_IRQS) - return; - - iv = xicp_setup_priv(sc, irq, priv); - - /* - * This doesn't appear to actually support affinity groups, so pick a - * random CPU. - */ - ncpus = 0; - CPU_FOREACH(cpu) - if (CPU_ISSET(cpu, &cpumask)) ncpus++; - - i = mftb() % ncpus; - ncpus = 0; - CPU_FOREACH(cpu) { - if (!CPU_ISSET(cpu, &cpumask)) - continue; - if (ncpus == i) - break; - ncpus++; - } - - cpu = pcpu_find(cpu)->pc_hwref; - iv->cpu = cpu; - - if (rtas_exists()) - error = rtas_call_method(sc->ibm_set_xive, 3, 1, irq, cpu, - XICP_PRIORITY, &status); -#ifdef POWERNV - else - error = opal_call(OPAL_SET_XIVE, irq, cpu << 2, XICP_PRIORITY); -#endif - - if (error < 0) - panic("Cannot bind interrupt %d to CPU %d", irq, cpu); -} - -static void -xicp_dispatch(device_t dev, struct trapframe *tf) -{ - struct xicp_softc *sc; - struct resource *regs = NULL; - uint64_t xirr, junk; - int i; - - sc = device_get_softc(dev); -#ifdef POWERNV - if ((mfmsr() & PSL_HV) && !sc->xics_emu) { - regs = xicp_mem_for_cpu(PCPU_GET(hwref)); - KASSERT(regs != NULL, - ("Can't find regs for CPU %ld", (uintptr_t)PCPU_GET(hwref))); - } -#endif - - for (;;) { - /* Return value in R4, use the PFT call */ - if (regs) { - xirr = bus_read_4(regs, 4); -#ifdef POWERNV - } else if (sc->xics_emu) { - opal_call(OPAL_INT_GET_XIRR, &cpu_xirr[PCPU_GET(cpuid)], - false); - xirr = cpu_xirr[PCPU_GET(cpuid)]; -#endif - } else { - /* Return value in R4, use the PFT call */ - phyp_pft_hcall(H_XIRR, 0, 0, 0, 0, &xirr, &junk, &junk); - } - xirr &= 0x00ffffff; - - if (xirr == 0) /* No more pending interrupts? */ - break; - - if (xirr == XICP_IPI) { /* Magic number for IPIs */ - xirr = MAX_XICP_IRQS; /* Map to FreeBSD magic */ - - /* Clear IPI */ - if (regs) - bus_write_1(regs, 12, 0xff); -#ifdef POWERNV - else if (sc->xics_emu) - opal_call(OPAL_INT_SET_MFRR, - PCPU_GET(hwref), 0xff); -#endif - else - phyp_hcall(H_IPI, (uint64_t)(PCPU_GET(hwref)), - 0xff); - i = sc->ipi_vec; - } else { - /* XXX: super inefficient */ - for (i = 0; i < sc->nintvecs; i++) { - if (sc->intvecs[i].irq == xirr) - break; - } - KASSERT(i < sc->nintvecs, ("Unmapped XIRR")); - } - - powerpc_dispatch_intr(sc->intvecs[i].vector, tf); - } -} - -static void -xicp_enable(device_t dev, u_int irq, u_int vector, void **priv) -{ - struct xicp_softc *sc; - struct xicp_intvec *intr; - cell_t status, cpu; - - sc = device_get_softc(dev); - - /* Bind to this CPU to start: distrib. ID is last entry in gserver# */ - cpu = PCPU_GET(hwref); - - intr = xicp_setup_priv(sc, irq, priv); - - intr->irq = irq; - intr->vector = vector; - intr->cpu = cpu; - mb(); - - /* IPIs are also enabled. Stash off the vector index */ - if (irq == MAX_XICP_IRQS) { - sc->ipi_vec = intr - sc->intvecs; - return; - } - - if (rtas_exists()) { - rtas_call_method(sc->ibm_set_xive, 3, 1, irq, cpu, - XICP_PRIORITY, &status); - xicp_unmask(dev, irq, intr); -#ifdef POWERNV - } else { - status = opal_call(OPAL_SET_XIVE, irq, cpu << 2, XICP_PRIORITY); - /* Unmask implicit for OPAL */ - - if (status != 0) - panic("OPAL_SET_XIVE IRQ %d -> cpu %d failed: %d", irq, - cpu, status); -#endif - } -} - -static void -xicp_eoi(device_t dev, u_int irq, void *priv) -{ -#ifdef POWERNV - struct xicp_softc *sc; -#endif - uint64_t xirr; - - if (irq == MAX_XICP_IRQS) /* Remap IPI interrupt to internal value */ - irq = XICP_IPI; - xirr = irq | (0xff << 24); - -#ifdef POWERNV - if (mfmsr() & PSL_HV) { - sc = device_get_softc(dev); - if (sc->xics_emu) - opal_call(OPAL_INT_EOI, xirr); - else - bus_write_4(xicp_mem_for_cpu(PCPU_GET(hwref)), 4, xirr); - } else -#endif - phyp_hcall(H_EOI, xirr); -} - -static void -xicp_ipi(device_t dev, u_int cpu) -{ - -#ifdef POWERNV - struct xicp_softc *sc; - cpu = pcpu_find(cpu)->pc_hwref; - - if (mfmsr() & PSL_HV) { - sc = device_get_softc(dev); - if (sc->xics_emu) { - int64_t rv; - rv = opal_call(OPAL_INT_SET_MFRR, cpu, XICP_PRIORITY); - if (rv != 0) - device_printf(dev, "IPI SET_MFRR result: %ld\n", rv); - } else - bus_write_1(xicp_mem_for_cpu(cpu), 12, XICP_PRIORITY); - } else -#endif - phyp_hcall(H_IPI, (uint64_t)cpu, XICP_PRIORITY); -} - -static void -xicp_mask(device_t dev, u_int irq, void *priv) -{ - struct xicp_softc *sc = device_get_softc(dev); - cell_t status; - - if (irq == MAX_XICP_IRQS) - return; - - if (rtas_exists()) { - rtas_call_method(sc->ibm_int_off, 1, 1, irq, &status); -#ifdef POWERNV - } else { - struct xicp_intvec *ivec = priv; - - KASSERT(ivec != NULL, ("Masking unconfigured interrupt")); - opal_call(OPAL_SET_XIVE, irq, ivec->cpu << 2, 0xff); -#endif - } -} - -static void -xicp_unmask(device_t dev, u_int irq, void *priv) -{ - struct xicp_softc *sc = device_get_softc(dev); - cell_t status; - - if (irq == MAX_XICP_IRQS) - return; - - if (rtas_exists()) { - rtas_call_method(sc->ibm_int_on, 1, 1, irq, &status); -#ifdef POWERNV - } else { - struct xicp_intvec *ivec = priv; - - KASSERT(ivec != NULL, ("Unmasking unconfigured interrupt")); - opal_call(OPAL_SET_XIVE, irq, ivec->cpu << 2, XICP_PRIORITY); -#endif - } -} - -#ifdef POWERNV -/* This is only used on POWER9 systems with the XIVE's XICS emulation. */ -static void -xicp_smp_cpu_startup(void) -{ - struct xicp_softc *sc; - - if (mfmsr() & PSL_HV) { - sc = device_get_softc(root_pic); - - if (sc->xics_emu) - opal_call(OPAL_INT_SET_CPPR, 0xff); - } -} -#endif diff --git a/sys/powerpc/psim/ata_iobus.c b/sys/powerpc/psim/ata_iobus.c deleted file mode 100644 index cf8f454147f..00000000000 --- a/sys/powerpc/psim/ata_iobus.c +++ /dev/null @@ -1,251 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2002 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -/* - * PSIM local bus ATA controller - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -/* - * Define the iobus ata bus attachment. This creates a pseudo-bus that - * the ATA device can be attached to - */ -static int ata_iobus_attach(device_t dev); -static int ata_iobus_probe(device_t dev); -static int ata_iobus_print_child(device_t dev, device_t child); -struct resource *ata_iobus_alloc_resource(device_t, device_t, int, int *, - rman_res_t, rman_res_t, rman_res_t, - u_int); -static int ata_iobus_release_resource(device_t, device_t, int, int, - struct resource *); - -static device_method_t ata_iobus_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ata_iobus_probe), - DEVMETHOD(device_attach, ata_iobus_attach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* Bus methods */ - DEVMETHOD(bus_print_child, ata_iobus_print_child), - DEVMETHOD(bus_alloc_resource, ata_iobus_alloc_resource), - DEVMETHOD(bus_release_resource, ata_iobus_release_resource), - DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), - DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), - DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - - DEVMETHOD_END -}; - -static driver_t ata_iobus_driver = { - "ataiobus", - ata_iobus_methods, - 0, -}; - -static devclass_t ata_iobus_devclass; - -DRIVER_MODULE(ataiobus, iobus, ata_iobus_driver, ata_iobus_devclass, NULL, - NULL); -MODULE_DEPEND(ata, ata, 1, 1, 1); - -static int -ata_iobus_probe(device_t dev) -{ - char *type = iobus_get_name(dev); - - if (strncmp(type, "ata", 3) != 0) - return (ENXIO); - - device_set_desc(dev, "PSIM ATA Controller"); - return (0); -} - -static int -ata_iobus_attach(device_t dev) -{ - /* - * Add a single child per controller. Should be able - * to add two - */ - device_add_child(dev, "ata", -1); - return (bus_generic_attach(dev)); -} - -static int -ata_iobus_print_child(device_t dev, device_t child) -{ - int retval = 0; - - retval += bus_print_child_header(dev, child); - /* irq ? */ - retval += bus_print_child_footer(dev, child); - - return (retval); -} - -struct resource * -ata_iobus_alloc_resource(device_t dev, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, - u_int flags) -{ - struct resource *res = NULL; - int myrid; - u_int *ofw_regs; - - ofw_regs = iobus_get_regs(dev); - - /* - * The reg array for the PSIM ata device has 6 start/size entries: - * 0 - unused - * 1/2/3 - unused - * 4/5/6 - primary command - * 7/8/9 - secondary command - * 10/11/12 - primary control - * 13/14/15 - secondary control - * 16/17/18 - primary/secondary dma registers, unimplemented - * - * The resource values are calculated from these registers - */ - if (type == SYS_RES_IOPORT) { - switch (*rid) { - case ATA_IOADDR_RID: - myrid = 0; - start = ofw_regs[4]; - end = start + ATA_IOSIZE - 1; - count = ATA_IOSIZE; - res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, - SYS_RES_MEMORY, &myrid, - start, end, count, flags); - break; - - case ATA_CTLADDR_RID: - myrid = 0; - start = ofw_regs[10]; - end = start + ATA_CTLIOSIZE - 1; - count = ATA_CTLIOSIZE; - res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, - SYS_RES_MEMORY, &myrid, - start, end, count, flags); - break; - - case ATA_BMADDR_RID: - /* DMA not properly supported by psim */ - break; - } - return (res); - - } else if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) { - /* - * Pass this on to the parent - */ - return (BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, - SYS_RES_IRQ, rid, 0, ~0, 1, flags)); - - } else { - return (NULL); - } -} - -static int -ata_iobus_release_resource(device_t dev, device_t child, int type, int rid, - struct resource *r) -{ - /* no hotplug... */ - return (0); -} - -/* - * Define the actual ATA device. This is a sub-bus to the ata-iobus layer - * to allow the higher layer bus to massage the resource allocation. - */ - -static int ata_iobus_sub_probe(device_t dev); -static int ata_iobus_sub_setmode(device_t dev, int target, int mode); - -static device_method_t ata_iobus_sub_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ata_iobus_sub_probe), - DEVMETHOD(device_attach, ata_attach), - DEVMETHOD(device_detach, ata_detach), - DEVMETHOD(device_resume, ata_resume), - - /* ATA interface */ - DEVMETHOD(ata_setmode, ata_iobus_sub_setmode), - DEVMETHOD_END -}; - -static driver_t ata_iobus_sub_driver = { - "ata", - ata_iobus_sub_methods, - sizeof(struct ata_channel), -}; - -DRIVER_MODULE(ata, ataiobus, ata_iobus_sub_driver, ata_devclass, NULL, NULL); - -static int -ata_iobus_sub_probe(device_t dev) -{ - struct ata_channel *ch = device_get_softc(dev); - - /* Only a single unit per controller thus far */ - ch->unit = 0; - ch->flags = (ATA_USE_16BIT|ATA_NO_SLAVE); - ata_generic_hw(dev); - - return ata_probe(dev); -} - -static int -ata_iobus_sub_setmode(device_t parent, int target, int mode) -{ - /* Only ever PIO mode here... */ - return (ATA_PIO); -} diff --git a/sys/powerpc/psim/iobus.c b/sys/powerpc/psim/iobus.c deleted file mode 100644 index c86ea1cab76..00000000000 --- a/sys/powerpc/psim/iobus.c +++ /dev/null @@ -1,402 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2002 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * PSIM 'iobus' local bus. Should be set up in the device tree like: - * - * /iobus@0x80000000/name psim-iobus - * - * Code borrowed from various nexus.c and uninorth.c :-) - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include - -#include - -struct iobus_softc { - phandle_t sc_node; - vm_offset_t sc_addr; - vm_offset_t sc_size; - struct rman sc_mem_rman; -}; - -static MALLOC_DEFINE(M_IOBUS, "iobus", "iobus device information"); - -static int iobus_probe(device_t); -static int iobus_attach(device_t); -static int iobus_print_child(device_t dev, device_t child); -static void iobus_probe_nomatch(device_t, device_t); -static int iobus_read_ivar(device_t, device_t, int, uintptr_t *); -static int iobus_write_ivar(device_t, device_t, int, uintptr_t); -static struct resource *iobus_alloc_resource(device_t, device_t, int, int *, - rman_res_t, rman_res_t, rman_res_t, - u_int); -static int iobus_activate_resource(device_t, device_t, int, int, - struct resource *); -static int iobus_deactivate_resource(device_t, device_t, int, int, - struct resource *); -static int iobus_release_resource(device_t, device_t, int, int, - struct resource *); - -/* - * Bus interface definition - */ -static device_method_t iobus_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, iobus_probe), - DEVMETHOD(device_attach, iobus_attach), - DEVMETHOD(device_detach, bus_generic_detach), - DEVMETHOD(device_shutdown, bus_generic_shutdown), - DEVMETHOD(device_suspend, bus_generic_suspend), - DEVMETHOD(device_resume, bus_generic_resume), - - /* Bus interface */ - DEVMETHOD(bus_print_child, iobus_print_child), - DEVMETHOD(bus_probe_nomatch, iobus_probe_nomatch), - DEVMETHOD(bus_read_ivar, iobus_read_ivar), - DEVMETHOD(bus_write_ivar, iobus_write_ivar), - DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), - DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), - - DEVMETHOD(bus_alloc_resource, iobus_alloc_resource), - DEVMETHOD(bus_release_resource, iobus_release_resource), - DEVMETHOD(bus_activate_resource, iobus_activate_resource), - DEVMETHOD(bus_deactivate_resource, iobus_deactivate_resource), - { 0, 0 } -}; - -static driver_t iobus_driver = { - "iobus", - iobus_methods, - sizeof(struct iobus_softc) -}; - -devclass_t iobus_devclass; - -DRIVER_MODULE(iobus, ofwbus, iobus_driver, iobus_devclass, 0, 0); - -static int -iobus_probe(device_t dev) -{ - const char *type = ofw_bus_get_name(dev); - - if (strcmp(type, "psim-iobus") != 0) - return (ENXIO); - - device_set_desc(dev, "PSIM local bus"); - return (0); -} - -/* - * Add interrupt/addr range to the dev's resource list if present - */ -static void -iobus_add_intr(phandle_t devnode, struct iobus_devinfo *dinfo) -{ - u_int intr = -1; - - if (OF_getprop(devnode, "interrupt", &intr, sizeof(intr)) != -1) { - resource_list_add(&dinfo->id_resources, - SYS_RES_IRQ, 0, intr, intr, 1); - } - dinfo->id_interrupt = intr; -} - -static void -iobus_add_reg(phandle_t devnode, struct iobus_devinfo *dinfo, - vm_offset_t iobus_off) -{ - u_int size; - int i; - - size = OF_getprop(devnode, "reg", dinfo->id_reg,sizeof(dinfo->id_reg)); - - if (size != -1) { - dinfo->id_nregs = size / (sizeof(dinfo->id_reg[0])); - - for (i = 0; i < dinfo->id_nregs; i+= 3) { - /* - * Scale the absolute addresses back to iobus - * relative offsets. This is to better simulate - * macio - */ - dinfo->id_reg[i+1] -= iobus_off; - - resource_list_add(&dinfo->id_resources, - SYS_RES_MEMORY, 0, - dinfo->id_reg[i+1], - dinfo->id_reg[i+1] + - dinfo->id_reg[i+2], - dinfo->id_reg[i+2]); - } - } -} - -static int -iobus_attach(device_t dev) -{ - struct iobus_softc *sc; - struct iobus_devinfo *dinfo; - phandle_t root; - phandle_t child; - device_t cdev; - char *name; - u_int reg[2]; - int size; - - sc = device_get_softc(dev); - sc->sc_node = ofw_bus_get_node(dev); - - /* - * Find the base addr/size of the iobus, and initialize the - * resource manager - */ - size = OF_getprop(sc->sc_node, "reg", reg, sizeof(reg)); - if (size == sizeof(reg)) { - sc->sc_addr = reg[0]; - sc->sc_size = reg[1]; - } else { - return (ENXIO); - } - - sc->sc_mem_rman.rm_type = RMAN_ARRAY; - sc->sc_mem_rman.rm_descr = "IOBus Device Memory"; - if (rman_init(&sc->sc_mem_rman) != 0) { - device_printf(dev, - "failed to init mem range resources\n"); - return (ENXIO); - } - rman_manage_region(&sc->sc_mem_rman, 0, sc->sc_size); - - /* - * Iterate through the sub-devices - */ - root = sc->sc_node; - - for (child = OF_child(root); child != 0; child = OF_peer(child)) { - OF_getprop_alloc(child, "name", (void **)&name); - - cdev = device_add_child(dev, NULL, -1); - if (cdev != NULL) { - dinfo = malloc(sizeof(*dinfo), M_IOBUS, M_WAITOK); - memset(dinfo, 0, sizeof(*dinfo)); - resource_list_init(&dinfo->id_resources); - dinfo->id_node = child; - dinfo->id_name = name; - iobus_add_intr(child, dinfo); - iobus_add_reg(child, dinfo, sc->sc_addr); - device_set_ivars(cdev, dinfo); - } else { - OF_prop_free(name); - } - } - - return (bus_generic_attach(dev)); -} - -static int -iobus_print_child(device_t dev, device_t child) -{ - struct iobus_devinfo *dinfo; - struct resource_list *rl; - int retval = 0; - - dinfo = device_get_ivars(child); - rl = &dinfo->id_resources; - - retval += bus_print_child_header(dev, child); - - retval += printf(" offset 0x%x", dinfo->id_reg[1]); - retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); - - retval += bus_print_child_footer(dev, child); - - return (retval); -} - -static void -iobus_probe_nomatch(device_t dev, device_t child) -{ -} - -static int -iobus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) -{ - struct iobus_devinfo *dinfo; - - if ((dinfo = device_get_ivars(child)) == NULL) - return (ENOENT); - - switch (which) { - case IOBUS_IVAR_NODE: - *result = dinfo->id_node; - break; - case IOBUS_IVAR_NAME: - *result = (uintptr_t)dinfo->id_name; - break; - case IOBUS_IVAR_NREGS: - *result = dinfo->id_nregs; - break; - case IOBUS_IVAR_REGS: - *result = (uintptr_t)dinfo->id_reg; - break; - default: - return (ENOENT); - } - - return (0); -} - -static int -iobus_write_ivar(device_t dev, device_t child, int which, uintptr_t value) -{ - return (EINVAL); -} - -static struct resource * -iobus_alloc_resource(device_t bus, device_t child, int type, int *rid, - rman_res_t start, rman_res_t end, rman_res_t count, - u_int flags) -{ - struct iobus_softc *sc; - int needactivate; - struct resource *rv; - struct rman *rm; - - sc = device_get_softc(bus); - - needactivate = flags & RF_ACTIVE; - flags &= ~RF_ACTIVE; - - switch (type) { - case SYS_RES_MEMORY: - case SYS_RES_IOPORT: - rm = &sc->sc_mem_rman; - break; - case SYS_RES_IRQ: - return (bus_alloc_resource(bus, type, rid, start, end, count, - flags)); - default: - device_printf(bus, "unknown resource request from %s\n", - device_get_nameunit(child)); - return (NULL); - } - - rv = rman_reserve_resource(rm, start, end, count, flags, child); - if (rv == NULL) { - device_printf(bus, "failed to reserve resource for %s\n", - device_get_nameunit(child)); - return (NULL); - } - - rman_set_rid(rv, *rid); - - if (needactivate) { - if (bus_activate_resource(child, type, *rid, rv) != 0) { - device_printf(bus, - "failed to activate resource for %s\n", - device_get_nameunit(child)); - rman_release_resource(rv); - return (NULL); - } - } - - return (rv); -} - -static int -iobus_release_resource(device_t bus, device_t child, int type, int rid, - struct resource *res) -{ - if (rman_get_flags(res) & RF_ACTIVE) { - int error = bus_deactivate_resource(child, type, rid, res); - if (error) - return error; - } - - return (rman_release_resource(res)); -} - -static int -iobus_activate_resource(device_t bus, device_t child, int type, int rid, - struct resource *res) -{ - struct iobus_softc *sc; - void *p; - - sc = device_get_softc(bus); - - if (type == SYS_RES_IRQ) - return (bus_activate_resource(bus, type, rid, res)); - - if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { - p = pmap_mapdev((vm_offset_t)rman_get_start(res) + sc->sc_addr, - (vm_size_t)rman_get_size(res)); - if (p == NULL) - return (ENOMEM); - rman_set_virtual(res, p); - rman_set_bustag(res, &bs_le_tag); - rman_set_bushandle(res, (u_long)p); - } - - return (rman_activate_resource(res)); -} - -static int -iobus_deactivate_resource(device_t bus, device_t child, int type, int rid, - struct resource *res) -{ - /* - * If this is a memory resource, unmap it. - */ - if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { - u_int32_t psize; - - psize = rman_get_size(res); - pmap_unmapdev((vm_offset_t)rman_get_virtual(res), psize); - } - - return (rman_deactivate_resource(res)); -} diff --git a/sys/powerpc/psim/iobusvar.h b/sys/powerpc/psim/iobusvar.h deleted file mode 100644 index e95478c6f41..00000000000 --- a/sys/powerpc/psim/iobusvar.h +++ /dev/null @@ -1,66 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2002 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _PSIM_IOBUSVAR_H_ -#define _PSIM_IOBUSVAR_H_ - -/* - * Accessors for iobus devices - */ - -enum iobus_ivars { - IOBUS_IVAR_NODE, - IOBUS_IVAR_NAME, - IOBUS_IVAR_NREGS, - IOBUS_IVAR_REGS, -}; - -#define IOBUS_ACCESSOR(var, ivar, type) \ - __BUS_ACCESSOR(iobus, var, IOBUS, ivar, type) - -IOBUS_ACCESSOR(node, NODE, phandle_t) -IOBUS_ACCESSOR(name, NAME, char *) -IOBUS_ACCESSOR(nregs, NREGS, u_int) -IOBUS_ACCESSOR(regs, REGS, u_int *) - -#undef IOBUS_ACCESSOR - -/* - * Per-device structure. - */ -struct iobus_devinfo { - phandle_t id_node; - char *id_name; - int id_interrupt; - u_int id_nregs; - u_int id_reg[24]; - struct resource_list id_resources; -}; - -#endif /* _PSIM_IOBUSVAR_H_ */ diff --git a/sys/powerpc/psim/openpic_iobus.c b/sys/powerpc/psim/openpic_iobus.c deleted file mode 100644 index 03cd87f6717..00000000000 --- a/sys/powerpc/psim/openpic_iobus.c +++ /dev/null @@ -1,119 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2003 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -/* - * The psim iobus attachment for the OpenPIC interrupt controller. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include - -#include "pic_if.h" - -/* - * PSIM IOBus interface - */ -static int openpic_iobus_probe(device_t); -static int openpic_iobus_attach(device_t); - -static device_method_t openpic_iobus_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, openpic_iobus_probe), - DEVMETHOD(device_attach, openpic_iobus_attach), - - /* PIC interface */ - DEVMETHOD(pic_config, openpic_config), - DEVMETHOD(pic_dispatch, openpic_dispatch), - DEVMETHOD(pic_enable, openpic_enable), - DEVMETHOD(pic_eoi, openpic_eoi), - DEVMETHOD(pic_ipi, openpic_ipi), - DEVMETHOD(pic_mask, openpic_mask), - DEVMETHOD(pic_unmask, openpic_unmask), - { 0, 0 } -}; - -static driver_t openpic_iobus_driver = { - "openpic", - openpic_iobus_methods, - sizeof(struct openpic_softc) -}; - -DRIVER_MODULE(openpic, iobus, openpic_iobus_driver, openpic_devclass, 0, 0); - -static int -openpic_iobus_probe(device_t dev) -{ - struct openpic_softc *sc; - char *name; - - name = iobus_get_name(dev); - if (strcmp(name, "interrupt-controller") != 0) - return (ENXIO); - - /* - * The description was already printed out in the nexus - * probe, so don't do it again here - */ - device_set_desc(dev, OPENPIC_DEVSTR); - - sc = device_get_softc(dev); - sc->sc_psim = 1; - - return (0); -} - -static int -openpic_iobus_attach(device_t dev) -{ - - return (openpic_common_attach(dev, 0)); -} diff --git a/sys/powerpc/psim/psim-tree b/sys/powerpc/psim/psim-tree deleted file mode 100644 index 3d7474a4daa..00000000000 --- a/sys/powerpc/psim/psim-tree +++ /dev/null @@ -1,89 +0,0 @@ -# -# Simple psim h/w description -# -# The .gdbinit should contain something like: -# -# target sim -e chirp -r 33554432 -f psim-tree -# load -# -# (The -r option is the amount of physical RAM the simulator has) -# - -/#address-cells 1 -/openprom/options/use-stdio? false -#/openprom/options/strict-alignment? true - -/options - ./output-device "psim-stdout - -# -# Define the disk device alias so ofwd can identify it -# -/aliases - ./ofwdisk "/phb@0x70000000/ide@1/disk@0 - -# -# CPU definition. The phandle property is to help nexus.c locate the -# interrupt controller. -# -/cpus/cpu@0 - -# -# disk file, done via phb. maybe there's a simpler way. -# -/phb@0x70000000 - ./device_type "pci - ./name "pci - ./#address-cells 3 - ./#size-cells 2 - ./ranges ni0,0,0,0 0xc0000000 0x10000 - -/phb@0x70000000/ide@1 - ./device_type "ide - ./name "ide - ./assigned-addresses \ - ni0,0,10,1f0 8 \ - ni0,0,14,3f8 8 \ - ni0,0,18,170 8 \ - ni0,0,1c,378 8 \ - ni0,0,20,200 8 - ./reg \ - 1 0 \ - i0,0,10,0 8 \ - i0,0,18,0 8 \ - i0,0,14,6 1 \ - i0,0,1c,6 1 \ - i0,0,20,0 8 - ./ready-delay 1000 - -/phb@0x70000000/ide@1/disk@0/file "../image.iso - -# -# I/O Bus -# -/iobus@0x90000000 - ./name psim-iobus - ./reg 0x90000000 0x20000000 - -# -# OpenPIC -# -/iobus@0x90000000/opic@0x90000000 - ./name interrupt-controller - ./device_type open-pic - ./compatible psim,open-pic - ./reg 0x90000000 0x40000 - ./interrupt-ranges 0 256 - -/iobus/opic > intr0 int /cpus/cpu@0x0 - -# -# IDE1 -# -#/iobus@0x90000000/ide@0x90052000 -# ./name ata-4 -# ./ioport 1 -# ./device_type ata -# ./interrupt 12 -# ./reg 0x90052000 8 0x90052010 8 0x90052020 8 0x90052030 1 0x90052040 1 0x90052050 8 -#/iobus@0x90000000/ide@0x90052000 > a irq12 /iobus/opic diff --git a/sys/powerpc/psim/uart_iobus.c b/sys/powerpc/psim/uart_iobus.c deleted file mode 100644 index 5bb6e265240..00000000000 --- a/sys/powerpc/psim/uart_iobus.c +++ /dev/null @@ -1,85 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright 2002 by Peter Grehan. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * PSIM local bus 16550 - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -static int uart_iobus_probe(device_t dev); - -static device_method_t uart_iobus_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, uart_iobus_probe), - DEVMETHOD(device_attach, uart_bus_attach), - DEVMETHOD(device_detach, uart_bus_detach), - { 0, 0 } -}; - -static driver_t uart_iobus_driver = { - uart_driver_name, - uart_iobus_methods, - sizeof(struct uart_softc), -}; - -static int -uart_iobus_probe(device_t dev) -{ - struct uart_softc *sc; - char *type; - - type = iobus_get_name(dev); - if (strncmp(type, "com", 3) != 0) - return (ENXIO); - - sc = device_get_softc(dev); - sc->sc_class = &uart_ns8250_class; - - device_set_desc(dev, "PSIM serial port"); - return (uart_bus_probe(dev, 0, 0, 0, 0, 0, 0)); -} - -DRIVER_MODULE(uart, iobus, uart_iobus_driver, uart_devclass, 0, 0); diff --git a/targets/pseudo/userland/Makefile.depend b/targets/pseudo/userland/Makefile.depend index ba73d29be27..1061966961f 100644 --- a/targets/pseudo/userland/Makefile.depend +++ b/targets/pseudo/userland/Makefile.depend @@ -826,14 +826,6 @@ DIRDEPS.arm64= \ usr.sbin/acpi \ usr.sbin/ofwdump -DIRDEPS.mips= \ - sbin/bsdlabel \ - sbin/fdisk - -DIRDEPS.powerpc= \ - usr.sbin/nvram \ - usr.sbin/ofwdump - .if ${MK_BLACKLIST_SUPPORT} != "no" DIRDEPS+= \ usr.sbin/blacklistctl \ diff --git a/targets/pseudo/userland/lib/Makefile.depend b/targets/pseudo/userland/lib/Makefile.depend index 1c11b1e3c1a..dc1dd7ba1b2 100644 --- a/targets/pseudo/userland/lib/Makefile.depend +++ b/targets/pseudo/userland/lib/Makefile.depend @@ -214,8 +214,7 @@ DIRDEPS+= \ .endif -.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" || \ - ${MACHINE_CPUARCH} == "powerpc" +.if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386" DIRDEPS+= stand/libsa32 .endif diff --git a/targets/pseudo/userland/misc/Makefile.depend b/targets/pseudo/userland/misc/Makefile.depend index 40ad7160b2b..095feec6bb4 100644 --- a/targets/pseudo/userland/misc/Makefile.depend +++ b/targets/pseudo/userland/misc/Makefile.depend @@ -83,7 +83,6 @@ DIRDEPS+= \ DIRDEPS.arm= ${_sys_boot_fdt} ${_sys_boot_efi} DIRDEPS.arm64= ${_sys_boot_fdt} ${_sys_boot_efi} DIRDEPS.i386= ${DIRDEPS.x86sys} ${_sys_boot_efi} -DIRDEPS.powerpc= ${_sys_boot_fdt} stand/libsa32 stand/ofw stand/uboot .endif DIRDEPS+= ${DIRDEPS.${MACHINE}:U} diff --git a/tests/sys/fs/Makefile b/tests/sys/fs/Makefile index c32926c572f..24954bde472 100644 --- a/tests/sys/fs/Makefile +++ b/tests/sys/fs/Makefile @@ -11,13 +11,8 @@ TESTSRC= ${SRCTOP}/contrib/netbsd-tests/fs #TESTS_SUBDIRS+= nullfs # XXX: needs rump # fusefs tests cannot be compiled/used without the googletest infrastructure. .if ${COMPILER_FEATURES:Mc++14} && ${MK_GOOGLETEST} != "no" -# Don't build fusefs tests for MIPS while LLVM PR 43263 is active, as part -# of the fusefs tests trigger excessively long compile time. The build does -# eventually succeed, but it's perhaps better to not do so by default for now. -.if ${MACHINE_CPUARCH} != "mips" || ${COMPILER_TYPE} != "clang" TESTS_SUBDIRS+= fusefs .endif -.endif TESTS_SUBDIRS+= tmpfs ${PACKAGE}FILES+= h_funcs.subr diff --git a/tests/sys/kern/Makefile b/tests/sys/kern/Makefile index 66e3cb1bf99..50a32a65217 100644 --- a/tests/sys/kern/Makefile +++ b/tests/sys/kern/Makefile @@ -29,8 +29,7 @@ ATF_TESTS_C+= sigwait ATF_TESTS_C+= socket_msg_trunc ATF_TESTS_C+= socket_msg_waitall TEST_METADATA.sigwait+= is_exclusive="true" -.if ${MACHINE_ARCH} != "i386" && ${MACHINE_ARCH:Mpowerpc*} == "" && \ - ${MACHINE_CPUARCH} != "mips" +.if ${MACHINE_ARCH} != "i386" ATF_TESTS_C+= subr_physmem_test .endif PLAIN_TESTS_C+= subr_unit_test diff --git a/tests/sys/vm/Makefile b/tests/sys/vm/Makefile index 3cb3f78fae2..574e5b93dc4 100644 --- a/tests/sys/vm/Makefile +++ b/tests/sys/vm/Makefile @@ -8,9 +8,7 @@ ATF_TESTS_C+= mlock_test \ page_fault_signal \ shared_shadow_inval_test -.if ${MACHINE_ARCH} != "i386" && ${MACHINE} != "arm" && ${MACHINE} != "mips" && \ - (${MACHINE} != "powerpc" || (${MACHINE_ARCH} != "powerpc" && \ - ${MACHINE_ARCH} != "powerpcspe")) +.if ${MACHINE_ARCH} != "i386" && ${MACHINE} != "arm" # MAP_32BIT is only available on 64-bit platforms BINDIR= ${TESTSDIR} ATF_TESTS_SH+= mmap_map_32bit_test diff --git a/tools/boot/rootgen.sh b/tools/boot/rootgen.sh index a1c6db03e1e..c2c46bc6241 100755 --- a/tools/boot/rootgen.sh +++ b/tools/boot/rootgen.sh @@ -641,7 +641,6 @@ mk_geli_mbr_zfs_both() { # iso # pxeldr # u-boot -# powerpc qser="-serial telnet::4444,server -nographic" @@ -744,13 +743,6 @@ make_one_image() echo "^^^^^^^^^^^^^^ Created $img ^^^^^^^^^^^^^^^" } -# mips -# qemu-system-mips -kernel /path/to/rootfs/boot/kernel/kernel -nographic -hda /path/to/disk.img -m 2048 - -# Powerpc -- doesn't work but maybe it would enough for testing -- needs details -# powerpc64 -# qemu-system-ppc64 -drive file=/path/to/disk.img,format=raw - # Misc variables SRCTOP=$(make -v SRCTOP) cd ${SRCTOP}/stand @@ -839,15 +831,6 @@ for arch in arm aarch64; do done done -for arch in powerpc powerpc64; do - for scheme in ppc-wtf; do - fs=ufs - for bios in ofw uboot chrp; do - make_one_image ${arch} ${geli} ${scheme} ${fs} ${bios} - done - done -done - for arch in riscv; do geli=nogeli fs=ufs diff --git a/tools/boot/universe.sh b/tools/boot/universe.sh index 97438ecb5e3..bff9d49dc8b 100755 --- a/tools/boot/universe.sh +++ b/tools/boot/universe.sh @@ -1,13 +1,7 @@ #!/bin/sh # -# Full list of all arches, but we only build a subset. All different mips add any -# value, and there's a few others we just don't support. -# -# mips/mipsel mips/mips mips/mips64el mips/mips64 mips/mipsn32 \ -# mips/mipselhf mips/mipshf mips/mips64elhf mips/mips64hf \ -# powerpc/powerpc powerpc/powerpc64 powerpc/powerpcspe \ -# riscv/riscv64 riscv/riscv64sf +# Supported architectures are amd64, arm, arm64, i386, and riscv. # # This script is expected to be run in stand (though you could run it anywhere # in the tree). It does a full clean build. For stand you can do all the archs in @@ -78,8 +72,6 @@ for i in \ arm/armv7 \ arm64/aarch64 \ i386/i386 \ - mips/mips mips/mips64 \ - powerpc/powerpc powerpc/powerpc64 \ ; do ta=${i##*/} dobuild $ta _.boot.${ta}.log "" @@ -91,8 +83,6 @@ for i in \ arm/armv7 \ arm64/aarch64 \ i386/i386 \ - mips/mips mips/mips64 \ - powerpc/powerpc powerpc/powerpc64 \ ; do ta=${i##*/} dobuild $ta _.boot.${ta}.lua.log "MK_LOADER_LUA=yes MK_FORTH=no" diff --git a/tools/tools/nanobsd/embedded/README b/tools/tools/nanobsd/embedded/README index 4fa9b5e5b5d..d7a600965d3 100644 --- a/tools/tools/nanobsd/embedded/README +++ b/tools/tools/nanobsd/embedded/README @@ -22,14 +22,6 @@ Config Short description beaglebone.cfg Create a bootable beaglebone image qemu-amd64.cfg Create a bootable amd64 image for qemu (W) qemu-i386.cfg Create a bootable i386 image for qemu (W) -qemu-mips.cfg Create a bootable mips malta board image for - qemu -qemu-mips64.cfg Create a bootable mips malta board (64-bit - mode) image for qemu -qemu-powerpc.cfg Create a bootable 32-bit powerpc image for - qemu -qemu-powerpc64.cfg Create a bootable 64-bit IBM-flavor image for - qemu rpi.cfg Create a bootable image for Raspberry Pi B rpi2.cfg Create a bootable image for Raspberry Pi2 diff --git a/tools/tools/nanobsd/embedded/common b/tools/tools/nanobsd/embedded/common index 8aaf9cee7f7..96563d5abdf 100644 --- a/tools/tools/nanobsd/embedded/common +++ b/tools/tools/nanobsd/embedded/common @@ -220,11 +220,6 @@ create_diskimage_mbr ( ) ( fi fi - # Populate the Powerpc boot image, if needed - if [ "${NANO_LAYOUT}" = powerpc64-ibm ]; then - dd if=${NANO_WORLDDIR}/boot/boot1.elf of=${NANO_LOG}/_.s1 bs=800k count=1 conv=sync - fi - # Populate the / partition, and place it into a slice with a # bsd label [ -z ${NANO_NOPRIV_BUILD} ] || extra="-F ${NANO_METALOG}" @@ -301,18 +296,6 @@ create_diskimage_mbr ( ) ( -p ${p4}:=${NANO_LOG}/_.p4 \ -o ${out} ;; - powerpc64-ibm) - # A lie to make the boot loader work, it boots the first BSD partition - # it finds, regardless of the active flag. - s2=fat16b - # boot image is on a special partition, ala std-embedded, but that - # partition isn't FAT with special files, but a copy of the boot - # loader itself. - mkimg -a 1 ${fmtarg} -s mbr -p prepboot:=${NANO_LOG}/_.s1 \ - -p ${s2}:=${NANO_LOG}/_.s2 \ - -p ${s3}:=${NANO_LOG}/_.s3a \ - -o ${out} - ;; esac rm -f ${out}.xz xz -9 --keep ${out} @@ -528,29 +511,6 @@ std_i386 ( ) { : ${NANO_BOOT_BSD:=${NANO_WORLDDIR}/boot/boot} } -std_mips ( ) { - NANO_ENDIAN=big -} - -std_mipsel ( ) { -} - -std_mips64 ( ) { - NANO_ENDIAN=big -} - -std_mips64el ( ) { -} - -std_powerpc ( ) { - NANO_ENDIAN=big -} - -std_powerpc64 ( ) { - NANO_LAYOUT=powerpc64-ibm - NANO_ENDIAN=big -} - # # QEMU settings for the standard environments # @@ -603,18 +563,6 @@ std-x86) NANO_ROOT=${NANO_SLICE_ROOT}a NANO_ALTROOT=${NANO_SLICE_ALTROOT}a ;; -powerpc64-ibm) - NANO_SLICE_PPCBOOT=s1 - NANO_SLICE_CFG=s2 - NANO_SLICE_ROOT=s3 - NANO_SLICE_ALTROOT=s4 - NANO_ROOT=${NANO_SLICE_ROOT}a - NANO_ALTROOT=${NANO_SLICE_ALTROOT}a - ;; -powerpc64-apple) - echo Not yet - exit 1 - ;; std-uefi) NANO_SLICE_UEFI=s1 NANO_SLICE_CFG=s2 diff --git a/tools/tools/nanobsd/embedded/qemu-mips.cfg b/tools/tools/nanobsd/embedded/qemu-mips.cfg deleted file mode 100644 index e1c9a23da20..00000000000 --- a/tools/tools/nanobsd/embedded/qemu-mips.cfg +++ /dev/null @@ -1,35 +0,0 @@ - -#- -# Copyright (c) 2015 M. Warner Losh -# Copyright (c) 2010-2011 iXsystems, Inc. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL iXsystems, Inc. OR CONTRIBUTORS BE LIABLE -# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -# SUCH DAMAGE. -# - -NANO_ARCH=mips -NANO_KERNEL=MALTA -NANO_DRIVE=ada0 -NANO_NAME=qemu-mips - -. common # Pull in common definitions - -qemu_env diff --git a/tools/tools/nanobsd/embedded/qemu-mips64.cfg b/tools/tools/nanobsd/embedded/qemu-mips64.cfg deleted file mode 100644 index 35e22af0300..00000000000 --- a/tools/tools/nanobsd/embedded/qemu-mips64.cfg +++ /dev/null @@ -1,35 +0,0 @@ - -#- -# Copyright (c) 2015 M. Warner Losh -# Copyright (c) 2010-2011 iXsystems, Inc. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL iXsystems, Inc. OR CONTRIBUTORS BE LIABLE -# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -# SUCH DAMAGE. -# - -NANO_ARCH=mips -NANO_KERNEL=MALTA64 -NANO_DRIVE=ada0 -NANO_NAME=qemu-mips64 - -. common # Pull in common definitions - -qemu_env diff --git a/tools/tools/nanobsd/embedded/qemu-powerpc.cfg b/tools/tools/nanobsd/embedded/qemu-powerpc.cfg deleted file mode 100644 index 4a3a87ae9bb..00000000000 --- a/tools/tools/nanobsd/embedded/qemu-powerpc.cfg +++ /dev/null @@ -1,36 +0,0 @@ - -#- -# Copyright (c) 2015 M. Warner Losh -# Copyright (c) 2010-2011 iXsystems, Inc. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL iXsystems, Inc. OR CONTRIBUTORS BE LIABLE -# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -# SUCH DAMAGE. -# - -# Open question: do we have one for MAC G4 and one for Book-E? -NANO_ARCH=powerpc -NANO_KERNEL=GENERIC -NANO_DRIVE=ada0 -NANO_NAME=qemu-powerpc - -. common # Pull in common definitions - -qemu_env diff --git a/tools/tools/nanobsd/embedded/qemu-powerpc64.cfg b/tools/tools/nanobsd/embedded/qemu-powerpc64.cfg deleted file mode 100644 index a088f46b24b..00000000000 --- a/tools/tools/nanobsd/embedded/qemu-powerpc64.cfg +++ /dev/null @@ -1,35 +0,0 @@ - -#- -# Copyright (c) 2015 M. Warner Losh -# Copyright (c) 2010-2011 iXsystems, Inc. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL iXsystems, Inc. OR CONTRIBUTORS BE LIABLE -# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -# SUCH DAMAGE. -# - -NANO_ARCH=powerpc64 -NANO_KERNEL=GENERIC64 -NANO_DRIVE=ada0 -NANO_NAME=qemu-powerpc64 - -. common # Pull in common definitions - -qemu_env diff --git a/usr.bin/Makefile.powerpc b/usr.bin/Makefile.powerpc deleted file mode 100644 index cf4d9c94d05..00000000000 --- a/usr.bin/Makefile.powerpc +++ /dev/null @@ -1,2 +0,0 @@ - -SUBDIR+= smbutil diff --git a/usr.bin/clang/Makefile.inc b/usr.bin/clang/Makefile.inc index 7d713c54d51..169958a9ea3 100644 --- a/usr.bin/clang/Makefile.inc +++ b/usr.bin/clang/Makefile.inc @@ -15,9 +15,4 @@ DEBUG_FILES_CFLAGS= -g1 WARNS?= 0 -.if ${MACHINE_ARCH:Mmips*} && ${MACHINE_ARCH:Mmips64*} == "" -CFLAGS+= -mxgot -CXXFLAGS+= -mxgot -.endif - .include "../Makefile.inc" diff --git a/usr.bin/gcore/Makefile b/usr.bin/gcore/Makefile index 90f3039f653..155680104bb 100644 --- a/usr.bin/gcore/Makefile +++ b/usr.bin/gcore/Makefile @@ -4,8 +4,7 @@ PROG= gcore SRCS= elfcore.c gcore.c LIBADD= sbuf util -.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_ARCH} == "amd64" || \ - ${MACHINE_ARCH} == "powerpc64" +.if ${MACHINE_CPUARCH} == "aarch64" || ${MACHINE_ARCH} == "amd64" SRCS+= elf32core.c .endif diff --git a/usr.bin/getconf/getconf.1 b/usr.bin/getconf/getconf.1 index 1ebf4a4f128..346ca0f4d8f 100644 --- a/usr.bin/getconf/getconf.1 +++ b/usr.bin/getconf/getconf.1 @@ -133,13 +133,11 @@ None. .It Li POSIX_V6_ILP32_OFFBIG Exactly 32-bit integer, long, and pointer; at least 64-bit file offset. .Sy Supported platforms : -.Tn IA32 , -.Tn PowerPC . +.Tn IA32 . .It Li POSIX_V6_LP64_OFF64 Exactly 32-bit integer; exactly 64-bit long, pointer, and file offset. .Sy Supported platforms : -.Tn AMD64 , -.Tn SPARC64 . +.Tn AMD64 . .It Li POSIX_V6_LPBIG_OFFBIG At least 32-bit integer; at least 64-bit long, pointer, and file offset. .Sy Supported platforms : diff --git a/usr.bin/gh-bc/Makefile b/usr.bin/gh-bc/Makefile index c058b54d93f..e78ab4b2994 100644 --- a/usr.bin/gh-bc/Makefile +++ b/usr.bin/gh-bc/Makefile @@ -61,8 +61,7 @@ CFLAGS+= -DNLSPATH=/usr/share/nls/%L/%N.cat CFLAGS+= -I${BCDIR}/include # prevent floating point incompatibilities caused by -flto on some architectures -.if ${MACHINE_ARCH:Mmips*} == "" && ${MACHINE_ARCH} != powerpc64 && \ - ${MACHINE_ARCH} != riscv64 +.if ${MACHINE_ARCH} != riscv64 CFLAGS+= -flto .endif diff --git a/usr.bin/truss/syscalls.c b/usr.bin/truss/syscalls.c index 6aced2770e2..e437902bfca 100644 --- a/usr.bin/truss/syscalls.c +++ b/usr.bin/truss/syscalls.c @@ -1004,18 +1004,6 @@ quad_fixup(struct syscall_decode *sc) switch (sc->args[i].type & ARG_MASK) { case Quad: case QuadHex: -#ifdef __powerpc__ - /* - * 64-bit arguments on 32-bit powerpc must be - * 64-bit aligned. If the current offset is - * not aligned, the calling convention inserts - * a 32-bit pad argument that should be skipped. - */ - if (sc->args[i].offset % 2 == 1) { - sc->args[i].offset++; - offset++; - } -#endif offset++; default: break; @@ -1739,18 +1727,11 @@ print_sysctl(FILE *fp, int *oid, size_t len) fprintf(fp, "%s", name); } -/* - * Convert a 32-bit user-space pointer to psaddr_t. Currently, this - * sign-extends on MIPS and zero-extends on all other architectures. - */ +/* Convert a 32-bit user-space pointer to psaddr_t. */ static psaddr_t user_ptr32_to_psaddr(int32_t user_pointer) { -#if defined(__mips__) - return ((psaddr_t)(intptr_t)user_pointer); -#else return ((psaddr_t)(uintptr_t)user_pointer); -#endif } /* diff --git a/usr.bin/uname/uname.1 b/usr.bin/uname/uname.1 index 894db42d19d..780d3083f6a 100644 --- a/usr.bin/uname/uname.1 +++ b/usr.bin/uname/uname.1 @@ -125,19 +125,6 @@ See for more information. .Sh EXIT STATUS .Ex -std -.Sh EXAMPLES -The hardware platform -.Pq Fl m -can be different from the machine's processor architecture -.Pq Fl p , -e.g., on 64-bit PowerPC, -.Fl m -would return -.Va powerpc -and -.Fl p -would return -.Va powerpc64 . .Sh SEE ALSO .Xr midnightbsd-version 1 , .Xr feature_present 3 , diff --git a/usr.sbin/Makefile.mips b/usr.sbin/Makefile.mips deleted file mode 100644 index 3767c8c9e1c..00000000000 --- a/usr.sbin/Makefile.mips +++ /dev/null @@ -1,2 +0,0 @@ - -SUBDIR+= ofwdump diff --git a/usr.sbin/Makefile.powerpc b/usr.sbin/Makefile.powerpc deleted file mode 100644 index a6d5b3b35ad..00000000000 --- a/usr.sbin/Makefile.powerpc +++ /dev/null @@ -1,5 +0,0 @@ - -.if ${MACHINE_ARCH} != "powerpcspe" -SUBDIR+= nvram -.endif -SUBDIR+= ofwdump diff --git a/usr.sbin/bsdinstall/partedit/partedit_powerpc.c b/usr.sbin/bsdinstall/partedit/partedit_powerpc.c deleted file mode 100644 index 81dba59ea66..00000000000 --- a/usr.sbin/bsdinstall/partedit/partedit_powerpc.c +++ /dev/null @@ -1,145 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2011 Nathan Whitehorn - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include -#include - -#include "partedit.h" - -static char platform[255] = ""; - -const char * -default_scheme(void) { - size_t platlen = sizeof(platform); - if (strlen(platform) == 0) - sysctlbyname("hw.platform", platform, &platlen, NULL, -1); - - if (strcmp(platform, "powermac") == 0) - return ("APM"); - if (strcmp(platform, "chrp") == 0 || strcmp(platform, "ps3") == 0 || - strcmp(platform, "mpc85xx") == 0) - return ("MBR"); - - /* Pick GPT as a generic default */ - return ("GPT"); -} - -int -is_scheme_bootable(const char *part_type) { - size_t platlen = sizeof(platform); - if (strlen(platform) == 0) - sysctlbyname("hw.platform", platform, &platlen, NULL, -1); - - if (strcmp(platform, "powermac") == 0 && strcmp(part_type, "APM") == 0) - return (1); - if (strcmp(platform, "powernv") == 0 && strcmp(part_type, "GPT") == 0) - return (1); - if ((strcmp(platform, "chrp") == 0 || strcmp(platform, "ps3") == 0) && - (strcmp(part_type, "MBR") == 0 || strcmp(part_type, "BSD") == 0 || - strcmp(part_type, "GPT") == 0)) - return (1); - if (strcmp(platform, "mpc85xx") == 0 && strcmp(part_type, "MBR") == 0) - return (1); - - return (0); -} - -int -is_fs_bootable(const char *part_type, const char *fs) -{ - if (strcmp(fs, "mnbsd-ufs") == 0) - return (1); - - return (0); -} - -size_t -bootpart_size(const char *part_type) -{ - size_t platlen = sizeof(platform); - if (strlen(platform) == 0) - sysctlbyname("hw.platform", platform, &platlen, NULL, -1); - - if (strcmp(part_type, "APM") == 0) - return (800*1024); - if (strcmp(part_type, "BSD") == 0) /* Nothing for nested */ - return (0); - if (strcmp(platform, "chrp") == 0) - return (800*1024); - if (strcmp(platform, "ps3") == 0 || strcmp(platform, "powernv") == 0) - return (512*1024*1024); - if (strcmp(platform, "mpc85xx") == 0) - return (16*1024*1024); - return (0); -} - -const char * -bootpart_type(const char *scheme, const char **mountpoint) -{ - size_t platlen = sizeof(platform); - if (strlen(platform) == 0) - sysctlbyname("hw.platform", platform, &platlen, NULL, -1); - - if (strcmp(platform, "chrp") == 0) - return ("prep-boot"); - if (strcmp(platform, "powermac") == 0) - return ("apple-boot"); - if (strcmp(platform, "powernv") == 0 || strcmp(platform, "ps3") == 0) { - *mountpoint = "/boot"; - if (strcmp(scheme, "GPT") == 0) - return ("ms-basic-data"); - else if (strcmp(scheme, "MBR") == 0) - return ("fat32"); - } - if (strcmp(platform, "mpc85xx") == 0) { - *mountpoint = "/boot/uboot"; - return ("fat16"); - } - - return ("mnbsd-boot"); -} - -const char * -bootcode_path(const char *part_type) { - return (NULL); -} - -const char * -partcode_path(const char *part_type, const char *fs_type) { - size_t platlen = sizeof(platform); - if (strlen(platform) == 0) - sysctlbyname("hw.platform", platform, &platlen, NULL, -1); - - if (strcmp(part_type, "APM") == 0) - return ("/boot/boot1.hfs"); - if (strcmp(platform, "chrp") == 0) - return ("/boot/boot1.elf"); - return (NULL); -} - diff --git a/usr.sbin/bsdinstall/scripts/bootconfig b/usr.sbin/bsdinstall/scripts/bootconfig index 949c0f09bff..c15954e21c5 100755 --- a/usr.sbin/bsdinstall/scripts/bootconfig +++ b/usr.sbin/bsdinstall/scripts/bootconfig @@ -90,16 +90,6 @@ update_uefi_bootentry() f_dialog_title "Boot configuration" f_dialog_backtitle "MidnightBSD Installer" -if [ `uname -m` == powerpc ]; then - platform=`sysctl -n hw.platform` - if [ "$platform" == ps3 -o "$platform" == powernv ]; then - rootpart=$(awk '{ if($2 == "/") printf("%s:%s\n", $3, $1); }' $PATH_FSTAB) - kboot_conf=$BSDINSTALL_CHROOT/boot/etc/kboot.conf - mkdir -p $BSDINSTALL_CHROOT/boot/etc/ - echo default=$MIDNIGHTBSD_BOOTLABEL > $kboot_conf - echo $MIDNIGHTBSD_BOOTLABEL=\'/kernel/kernel kernelname=/boot/kernel/kernel vfs.root.mountfrom=${rootpart}\' >> $kboot_conf - fi -fi # Update the ESP (EFI System Partition) with the new bootloader if we have an ESP if [ -n "$(awk '{if ($2=="/boot/efi") printf("%s\n",$1);}' $PATH_FSTAB)" ]; then diff --git a/usr.sbin/config/config.5 b/usr.sbin/config/config.5 index 2cbce684a5d..04eac974384 100644 --- a/usr.sbin/config/config.5 +++ b/usr.sbin/config/config.5 @@ -248,7 +248,7 @@ Legal values for .Ar arch include: .Pp -.Bl -tag -width ".Cm powerpc" -compact +.Bl -tag -width ".Cm riscv" -compact .It Cm arm64 The 64-bit ARM application architecture. .It Cm arm @@ -257,10 +257,6 @@ The ARM architecture The AMD x86-64 architecture. .It Cm i386 The Intel x86 based PC architecture. -.It Cm mips -The MIPS architecture. -.It Cm powerpc -The IBM PowerPC architecture. .It Cm riscv The RISC-V architecture. .El diff --git a/usr.sbin/kldxref/Makefile b/usr.sbin/kldxref/Makefile index 7b392e02093..328861595ed 100644 --- a/usr.sbin/kldxref/Makefile +++ b/usr.sbin/kldxref/Makefile @@ -7,8 +7,6 @@ SRCS+= ef_aarch64.c \ ef_arm.c \ ef_amd64.c \ ef_i386.c \ - ef_mips.c \ - ef_powerpc.c \ ef_riscv.c WARNS?= 2 diff --git a/usr.sbin/kldxref/ef_mips.c b/usr.sbin/kldxref/ef_mips.c deleted file mode 100644 index e4aeedb5c08..00000000000 --- a/usr.sbin/kldxref/ef_mips.c +++ /dev/null @@ -1,116 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2019 John Baldwin - * - * This software was developed by SRI International and the University of - * Cambridge Computer Laboratory (Department of Computer Science and - * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the - * DARPA SSITH research programme. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include - -#include -#include -#include - -#include "ef.h" - -/* - * Apply relocations to the values obtained from the file. `relbase' is the - * target relocation address of the section, and `dataoff/len' is the region - * that is to be relocated, and has been copied to *dest - */ -static int -ef_mips_reloc(struct elf_file *ef, const void *reldata, Elf_Type reltype, - GElf_Addr relbase, GElf_Addr dataoff, size_t len, void *dest) -{ - char *where; - GElf_Addr addr, addend; - GElf_Size rtype, symidx; - const GElf_Rel *rel; - const GElf_Rela *rela; - - switch (reltype) { - case ELF_T_REL: - rel = (const GElf_Rel *)reldata; - where = (char *)dest + (relbase + rel->r_offset - dataoff); - addend = 0; - rtype = GELF_R_TYPE(rel->r_info); - symidx = GELF_R_SYM(rel->r_info); - break; - case ELF_T_RELA: - rela = (const GElf_Rela *)reldata; - where = (char *)dest + (relbase + rela->r_offset - dataoff); - addend = rela->r_addend; - rtype = GELF_R_TYPE(rela->r_info); - symidx = GELF_R_SYM(rela->r_info); - break; - default: - return (EINVAL); - } - - if (where < (char *)dest || where >= (char *)dest + len) - return (0); - - if (reltype == ELF_T_REL) { - if (elf_class(ef) == ELFCLASS64) { - if (elf_encoding(ef) == ELFDATA2LSB) - addend = le64dec(where); - else - addend = be64dec(where); - } else { - if (elf_encoding(ef) == ELFDATA2LSB) - addend = le32dec(where); - else - addend = be32dec(where); - } - } - - switch (rtype) { - case R_MIPS_64: /* S + A */ - addr = EF_SYMADDR(ef, symidx) + addend; - if (elf_encoding(ef) == ELFDATA2LSB) - le64enc(where, addr); - else - be64enc(where, addr); - break; - case R_MIPS_32: /* S + A */ - addr = EF_SYMADDR(ef, symidx) + addend; - if (elf_encoding(ef) == ELFDATA2LSB) - le32enc(where, addr); - else - be32enc(where, addr); - break; - default: - warnx("unhandled relocation type %d", (int)rtype); - } - return (0); -} - -ELF_RELOC(ELFCLASS32, ELFDATA2LSB, EM_MIPS, ef_mips_reloc); -ELF_RELOC(ELFCLASS32, ELFDATA2MSB, EM_MIPS, ef_mips_reloc); -ELF_RELOC(ELFCLASS64, ELFDATA2LSB, EM_MIPS, ef_mips_reloc); -ELF_RELOC(ELFCLASS64, ELFDATA2MSB, EM_MIPS, ef_mips_reloc); diff --git a/usr.sbin/kldxref/ef_powerpc.c b/usr.sbin/kldxref/ef_powerpc.c deleted file mode 100644 index f72cc1d85e2..00000000000 --- a/usr.sbin/kldxref/ef_powerpc.c +++ /dev/null @@ -1,97 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause - * - * Copyright (c) 2005 Peter Grehan. - * Copyright 1996-1998 John D. Polstra. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include - -#include -#include -#include - -#include "ef.h" - -/* - * Apply relocations to the values obtained from the file. `relbase' is the - * target relocation address of the section, and `dataoff/len' is the region - * that is to be relocated, and has been copied to *dest - */ -static int -ef_ppc_reloc(struct elf_file *ef, const void *reldata, Elf_Type reltype, - GElf_Addr relbase, GElf_Addr dataoff, size_t len, void *dest) -{ - char *where; - GElf_Addr addr, addend; - GElf_Size rtype, symidx; - const GElf_Rela *rela; - - switch (reltype) { - case ELF_T_RELA: - rela = (const GElf_Rela *)reldata; - where = (char *)dest + (relbase + rela->r_offset - dataoff); - addend = rela->r_addend; - rtype = GELF_R_TYPE(rela->r_info); - symidx = GELF_R_SYM(rela->r_info); - break; - default: - return (EINVAL); - } - - if (where < (char *)dest || where >= (char *)dest + len) - return (0); - - switch (rtype) { - case R_PPC_RELATIVE: /* word32|doubleword64 B + A */ - addr = relbase + addend; - if (elf_class(ef) == ELFCLASS64) { - if (elf_encoding(ef) == ELFDATA2LSB) - le64enc(where, addr); - else - be64enc(where, addr); - } else - be32enc(where, addr); - break; - case R_PPC_ADDR32: /* word32 S + A */ - addr = EF_SYMADDR(ef, symidx) + addend; - be32enc(where, addr); - break; - case R_PPC64_ADDR64: /* doubleword64 S + A */ - addr = EF_SYMADDR(ef, symidx) + addend; - if (elf_encoding(ef) == ELFDATA2LSB) - le64enc(where, addr); - else - be64enc(where, addr); - break; - default: - warnx("unhandled relocation type %d", (int)rtype); - } - return (0); -} - -ELF_RELOC(ELFCLASS32, ELFDATA2MSB, EM_PPC, ef_ppc_reloc); -ELF_RELOC(ELFCLASS64, ELFDATA2LSB, EM_PPC64, ef_ppc_reloc); -ELF_RELOC(ELFCLASS64, ELFDATA2MSB, EM_PPC64, ef_ppc_reloc); diff --git a/usr.sbin/nvram/Makefile b/usr.sbin/nvram/Makefile deleted file mode 100644 index 66ae0529452..00000000000 --- a/usr.sbin/nvram/Makefile +++ /dev/null @@ -1,6 +0,0 @@ - -PROG= nvram -MAN= nvram.8 -MANSUBDIR= /powerpc - -.include diff --git a/usr.sbin/nvram/nvram.8 b/usr.sbin/nvram/nvram.8 deleted file mode 100644 index f0b63cdbc73..00000000000 --- a/usr.sbin/nvram/nvram.8 +++ /dev/null @@ -1,110 +0,0 @@ -.\"- -.\" Copyright (c) 2006 Maxim Sobolev -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -.\" DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, -.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -.\" POSSIBILITY OF SUCH DAMAGE. -.\" -.Dd June 19, 2020 -.Dt NVRAM 8 powerpc -.Os -.Sh NAME -.Nm nvram -.Nd "display or modify contents of the EEPROM or NVRAM" -.Sh SYNOPSIS -.Nm -.Fl p -.Nm -.Oo Fl d Ar name Oc Ar ... -.Op Ar name Ns = Ns Ar value ... -.Sh DESCRIPTION -The -.Nm -utility provides an interface for displaying and changing the system's -configuration variables contained in EEPROM or NVRAM. -In the first synopsis form, all available configuration variables and their -current values are printed. -In the second form, the variable selected by -.Ar name -is either removed or its value is changed to the -.Ar value -following by -.Ql = -sign. -.Pp -The following options are available: -.Bl -tag -width indent -.It Fl d Ar name -Delete the variable selected by -.Ar name -from the EEPROM or NVRAM. -The -.Fl d -flag can be specified multiple times, in which case multiple variables -will be removed. -.It Fl p -Print all available configuration variables and their current values. -.El -.Sh EXAMPLES -Print all available configuration variables and their current values: -.Pp -.Dl "nvram -p" -.Pp -Remove the variable named -.Va local-mac-address? : -.Pp -.Dl "nvram -d local-mac-address\e?" -.Pp -Set the value of the -.Va local-mac-address? -variable to -.Dq Li true : -.Pp -.Dl "nvram local-mac-address\e?=true" -.Pp -Note that the -.Ql \e -in the above examples is used to keep the shell from interpreting the -.Ql \&? . -.Pp -Remove variables named -.Va foo -and -.Va bar -and set variable named -.Va baz -to -.Dq Li 100 : -.Pp -.Dl "nvram -d foo -d bar baz=100" -.Sh SEE ALSO -.Xr powermac_nvram 4 -.Sh HISTORY -The -.Nm -utility first appeared in -.Fx 7.0 . -It is inspired by the -Darwin/Mac OS X -.Nm -utility. -.Sh AUTHORS -.An Maxim Sobolev Aq Mt sobomax@FreeBSD.org diff --git a/usr.sbin/nvram/nvram.c b/usr.sbin/nvram/nvram.c deleted file mode 100644 index a07aee796a3..00000000000 --- a/usr.sbin/nvram/nvram.c +++ /dev/null @@ -1,224 +0,0 @@ -/* - * Copyright (c) 2006 Maxim Sobolev - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#define DEVICE_NAME (_PATH_DEV "powermac_nvram") - -static void usage(void); -static int remove_var(uint8_t *, int, const char *); -static int append_var(uint8_t *, int, const char *, const char *); - -struct deletelist { - char *name; - struct deletelist *next; - struct deletelist *last; -}; - -static union { - uint8_t buf[sizeof(struct chrp_header)]; - struct chrp_header header; -} conv; - -int -main(int argc, char **argv) -{ - int opt, dump, fd, res, i, size; - uint8_t buf[NVRAM_SIZE], *cp, *common; - struct deletelist *dl; - - dump = 0; - dl = NULL; - - while((opt = getopt(argc, argv, "d:p")) != -1) { - switch(opt) { - case 'p': - dump = 1; - break; - - case 'd': - if (dl == NULL) { - dl = malloc(sizeof(*dl)); - if (dl == NULL) - err(1, "malloc"); - bzero(dl, sizeof(*dl)); - dl->last = dl; - } else { - dl->last->next = malloc(sizeof(*dl)); - if (dl->last->next == NULL) - err(1, "malloc"); - dl->last = dl->last->next; - bzero(dl->last, sizeof(*dl)); - } - dl->last->name = optarg; - break; - - default: - usage(); - /* Not reached */ - } - } - argc -= optind; - argv += optind; - - if (argc == 0 && dump == 0 && dl == NULL) { - usage(); - /* Not reached */ - } - - fd = open(DEVICE_NAME, O_RDWR); - if (fd == -1) - err(1, DEVICE_NAME); - for (i = 0; i < (int)sizeof(buf);) { - res = read(fd, buf + i, sizeof(buf) - i); - if (res == -1 && errno != EINTR) - err(1, DEVICE_NAME); - if (res == 0) - break; - if (res > 0) - i += res; - } - if (i != sizeof(buf)) - errx(1, "%s: short read", DEVICE_NAME); - - /* Locate common block */ - size = 0; - for (cp = buf; cp < buf + sizeof(buf); cp += size) { - memcpy(conv.buf, cp, sizeof(struct chrp_header)); - size = conv.header.length * 0x10; - if (strncmp(conv.header.name, "common", 7) == 0) - break; - } - if (cp >= buf + sizeof(buf) || size <= (int)sizeof(struct chrp_header)) - errx(1, "%s: no common block", DEVICE_NAME); - common = cp + sizeof(struct chrp_header); - size -= sizeof(struct chrp_header); - - if (dump != 0) { - while (size > 0) { - i = strlen(common) + 1; - if (i == 1) - break; - printf("%s\n", common); - size -= i; - common += i; - } - exit(0); - } - - for (;dl != NULL; dl = dl->next) { - if (remove_var(common, size, dl->name) == 0) - warnx("%s: no such variable", dl->name); - } - - for (; argc > 0; argc--, argv++) { - cp = strchr(*argv, '='); - if (cp == NULL) - errx(1, "%s: invalid argument", *argv); - cp[0] = '\0'; - cp++; - remove_var(common, size, *argv); - if (append_var(common, size, *argv, cp) == -1) - errx(1, "%s: error setting variable", *argv); - } - - for (i = 0; i < (int)sizeof(buf);) { - res = write(fd, buf + i, sizeof(buf) - i); - if (res == -1 && errno != EINTR) - err(1, DEVICE_NAME); - if (res == 0) - break; - if (res > 0) - i += res; - } - if (i != sizeof(buf)) - errx(1, "%s: short write", DEVICE_NAME); - if (close(fd) == -1) - err(1, DEVICE_NAME); - - exit(0); -} - -static void -usage(void) -{ - - fprintf(stderr, "usage: nvram [-p] | [-d name ...] [name=value ...]\n"); - exit(1); -} - -static int -remove_var(uint8_t *buf, int len, const char *var_name) -{ - int nremoved, i, name_len; - - nremoved = 0; - name_len = strlen(var_name); - while (len > 0) { - i = strlen(buf) + 1; - if (i == 1) - break; - if (strncmp(buf, var_name, name_len) == 0 && buf[name_len] == '=') { - memmove(buf, buf + i, len - i); - memset(buf + len - i, '\0', i); - nremoved += 1; - continue; - } - len -= i; - buf += i; - } - return nremoved; -} - -static int -append_var(uint8_t *buf, int len, const char *var_name, const char *var_value) -{ - int i, append_len; - - while (len > 0) { - i = strlen(buf) + 1; - if (i == 1) - break; - len -= i; - buf += i; - } - append_len = strlen(var_name) + strlen(var_value) + 2; - if (len < append_len) - return -1; - sprintf(buf, "%s=%s", var_name, var_value); - return 0; -} From 3d9f4bfec0da2ca1d464ccca81f97088cae9bd04 Mon Sep 17 00:00:00 2001 From: Lucas Holt Date: Fri, 4 Sep 2026 18:30:41 -0400 Subject: [PATCH 2/2] UPDATING: document legacy architecture removal AI-Assisted-by: OpenAI Codex (GPT-5) Signed-off-by: Lucas Holt --- UPDATING | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/UPDATING b/UPDATING index 9dd7a073124..f108e835584 100644 --- a/UPDATING +++ b/UPDATING @@ -1,5 +1,9 @@ Updating Information for MidnightBSD users. +20260904: + Native MIPS, PowerPC, and sparc64 support has been removed. Supported + architectures are amd64, arm, arm64, i386, and riscv. + 20260901: expat 2.8.4 (from 2.8.3). Fixes CVE-2026-66046 and CVE-2026-76641 (quadratic runtime in attribute "isCdata" lookups, letting moderately