CacheController/cacheController.stx at main · dexterfloreza/CacheController · GitHub

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Release 13.4 - xst O.87xd (lin64)
Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved.
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Parameter TMPDIR set to /home/student2/aszava/Desktop/COE 758/Project 1/cacheController2/xst/projnav.tmp


Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.10 secs

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Parameter xsthdpdir set to /home/student2/aszava/Desktop/COE 758/Project 1/cacheController2/xst


Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.10 secs

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WARNING:Xst:3164 - Option "-debug" found multiple times in the command line. Only the first occurence is considered.

=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file "/home/student2/aszava/Desktop/COE 758/Project 1/cacheController2/controller_table.vhd" in Library work.
Architecture behavioral of Entity controller_table is up to date.
Compiling vhdl file "/home/student2/aszava/Desktop/COE 758/Project 1/cacheController2/ctrl_fsm.vhd" in Library work.
Architecture behavioral of Entity ctrl_fsm is up to date.
Compiling vhdl file "/home/student2/aszava/Desktop/COE 758/Project 1/cacheController2/cacheController.vhd" in Library work.
Entity <cachecontroller> compiled.
Entity <cachecontroller> (Architecture <behavioral>) compiled.


Total REAL time to Xst completion: 1.00 secs
Total CPU time to Xst completion: 0.15 secs

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Total memory usage is 596156 kilobytes

Number of errors   :    0 (   0 filtered)
Number of warnings :    1 (   0 filtered)
Number of infos    :    0 (   0 filtered)