tight designs asap7_cva6 ihp_i2c - #4471
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Signed-off-by: LucasYuki <lucasyuki@yahoo.com.br>
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Code Review
This pull request reduces the clock period for the CVA6 design on ASAP7 and the I2C GPIO expander design on IHP SG13G2, updating the corresponding baseline rules and metadata. The review feedback correctly identifies that reducing the clock period to 10.0 while keeping the clock waveform hardcoded to {0 10.0} results in an incorrect 100% duty cycle. It is recommended to dynamically scale the clock waveform based on the clock period variable to maintain a 50% duty cycle.
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| create_clock [get_ports clock] -name clock -period 20.0 -waveform {0 10.0} | ||
| create_clock -name vclk -period 20.0 | ||
| create_clock [get_ports clock] -name clock -period $clk_period -waveform {0 10.0} |
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The clock waveform is hardcoded to {0 10.0}. Since the clock period $clk_period has been reduced to 10.0, this results in a 100% duty cycle (the clock is high for the entire period). To maintain a 50% duty cycle, the waveform should scale dynamically with the period.
create_clock [get_ports clock] -name clock -period $clk_period -waveform [list 0 [expr {$clk_period / 2.0}]]
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| set_ideal_network [get_pins sg13g2_IOPad_io_clock/p2c] | ||
| create_clock [get_pins sg13g2_IOPad_io_clock/p2c] -name clk_core -period 20.0 -waveform {0 10.0} | ||
| create_clock [get_pins sg13g2_IOPad_io_clock/p2c] -name clk_core -period $clk_period -waveform {0 10.0} |
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The clock waveform is hardcoded to {0 10.0}. Since the clock period $clk_period has been reduced to 10.0, this results in a 100% duty cycle (the clock is high for the entire period). To maintain a 50% duty cycle, the waveform should scale dynamically with the period.
create_clock [get_pins sg13g2_IOPad_io_clock/p2c] -name clk_core -period $clk_period -waveform [list 0 [expr {$clk_period / 2.0}]]
🔍 QoR checkMetrics reflect the PR merge build — i.e. what will land on the target branch. Advisory — results are log-only and do not affect build status. The authoritative QoR gate remains the local rules-file check. Commit 62 design(s) checked — 2 with regression(s), 0 without a comparable baseline.
❌ asap7/cva6 base — 3 failing metric(s)
❌ ihp-sg13g2/i2c-gpio-expander base — 6 failing metric(s)
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