asap7 coralnpu snapshot - #4474
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maliberty merged 1 commit intoAug 26, 2026
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This pull request adds the configuration, constraints, and platform files (LEF, Liberty, and Verilog blackboxes) for the coralnpu design (CoreMiniAxi) on the asap7 platform, utilizing fakeram_512x128 and fakeram_2048x128 memory blocks. The review feedback highlights a duplicate definition of the default_input_pin_cap attribute in both Liberty files, which could cause parser warnings or errors. Additionally, it is recommended to remove the hardcoded -waveform option in the SDC constraints to ensure the clock duty cycle scales robustly if the clock period is modified.
updated utilization removed proprietary PDK references added rules file gemini-code feedback Signed-off-by: Jeff Ng <jeffng@precisioninno.com>
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🔍 QoR checkMetrics reflect the PR merge build — i.e. what will land on the target branch. Advisory — results are log-only and do not affect build status. The authoritative QoR gate remains the local rules-file check. Commit 62 design(s) checked — 0 with regression(s), 0 without a comparable baseline.
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@vvbandeira please add to the CI
@eder-matheus please assign an owner
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@vvbandeira , I have a jenkins-ci branch that adds coralnpu to the orfsGetTestSlugs.groovy file. Is that still where I make the change to add coralnpu to the CI? |
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updated utilization