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Exception handling #2

Description

@ddarriba

Use special registers for handling CPU exceptions.

  • BadVAddr: Memory address where exception occurred (e.g., unaligned or unallocated memory address)
  • Status: Interrupt mask, enable bits and status when exception occurred
  • Cause: Type of exception and pending interrupt bits (e.g., load from / store to an illegal address, arithmetic overflow)
  • EPC: Address of instruction that caused the exception (return address from the exception handling routine at 0x80000080)

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