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3 changes: 2 additions & 1 deletion events-arch-x86/mce-amd-smca.c
Original file line number Diff line number Diff line change
Expand Up @@ -918,7 +918,8 @@ static inline void fixup_hwid(struct mce_priv *m, uint32_t *hwid_mcatype)
/* Decode extended errors according to Scalable MCA specification */
void decode_smca_error(struct mce_event *e, struct mce_priv *m)
{
enum smca_bank_types bank_type;
/* stays unknown if the IPID matches no entry and is not a non-CPU node */
enum smca_bank_types bank_type = N_SMCA_BANK_TYPES;
const char *ip_name;
uint32_t mcatype_hwid = 0;
unsigned short xec = (e->status >> 16) & 0x3f;
Expand Down
10 changes: 10 additions & 0 deletions events-arch-x86/ras-erst.c
Original file line number Diff line number Diff line change
Expand Up @@ -238,10 +238,20 @@ static int ras_erst_init(struct ras_module_ctx *ctx)
return 0;
}

/*
* x86-mce-event's cleanup does not run if that module failed to init, so
* free mce_priv here too. free_mce_priv() clears the pointer.
*/
static void ras_erst_cleanup(struct ras_module_ctx *ctx)
{
free_mce_priv(ctx->ras);
}

static const struct ras_module_entry ras_erst_module = {
.name = "x86-mce-erst",
.level = SUB_EVENT_MODULE,
.init = ras_erst_init,
.cleanup = ras_erst_cleanup,
};

REGISTER_RAS_MODULE(ras_erst_module);
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