SNP: Secure AVIC support

[Roman Kisel 🦇 (romank-msft)]

Enable secure AVIC support to offload interrupt state computation to the hardware to be fast and secure.

In AMD's own words:

"The Secure AVIC feature provides support for managing guest-owned APIC state for SEV-SNP guests using a private, guest-owned backing page per vCPU."
-- SEV-ES GHCB Standartizarion

"In a virtualized computer system, each guest operating system needs access to an interrupt controller to send and receive device and interprocessor interrupts. When there is no hardware acceleration, it falls to the virtual machine monitor (VMM) to intercept guest-initiated attempts to access the interrupt controller registers and provide direct emulation of the controller system programming interface allowing the guest to initiate and process interrupts. The VMM uses the underlying physical and virtual interrupt delivery mechanisms of the system to deliver interrupts from I/O devices and virtual processors to the target guest virtual processor and to handle any required end of interrupt processing.

Given the high rate of device and interprocessor interrupt generation in certain scenarios, in particular on server-class systems, the emulation of a local APIC can be a significant burden for the VMM. The AVIC architecture addresses the overhead of guest interrupt processing in a virtualized environment by applying hardware acceleration to the following components of interrupt processing:

• Providing a guest operating system access to performance-critical interrupt controller registers
• Initiating intra- and inter-processor interrupts (IPIs) in and between virtual processors in a guest"
  -- AMD64 PPR Vol. 3

Laundry list:

• IGVM parameter for disabling secure AVIC (would someone like that for testing maybe??)
• Definitions
• High-level wiring
• resolve TODOs in the IGVM file generator
• Auto-enable secure AVIC in the boot shim (from the hw arch pov considered dicey, not doing that)
• need the secure AVIC kernel patch (comes with kernel 6.12)
• update the VTL driver to allocate, RMP adjust, and fill out the AVIC backing page,
• update the kernel interface to map the AVIC page
• plumbing for (un)registering the backing page in the user mode
• Implement handling for the non-accelerated AVIC SEV exit
• Implement handling for the incomplete IPI AVIC SEV exit
• Make sure INIT and SIPI are delivered
• Make sure IPIs are delivered
• Support MpState::Idle and kernel idle and halt state offloading for better performance
• Fix the existing logic for advancing the RIP (assumes the next RIP is always provided which is true for the automatic exits only, and Windows reads the CCR AVIC register that results in non-AE so the RIP was set to 0 due to next RIP not filled out)
• Make sure TPR and CR8 are not trashed
• Fix TMR handling to service level-triggered interrupts reliably
• Boot multi-proc WIndows
• Test save/restore, pause/resume, servicing, stress-test

OHCL-Linux-Kernel draft: microsoft/OHCL-Linux-Kernel#67

The change boots multi-proc Linux guests and multi-proc Windows guests.
Sometimes the serial console hangs on MP Linux.

[Roman Kisel 🦇 (romank-msft)]

revert to "disabled"

[Ben Hillis (benhillis)]

Hi! 👋 We're doing some spring cleaning on open PRs. This PR hasn't seen any activity in a while — is it still something you're working on or planning to pick back up? No worries either way! If it's no longer needed, we'll go ahead and close it out. Just let us know. Thanks!