Scalable HW-Aware Training for Analog In-Memory Computing

Optimization solver backend for analog optical computer

Unsorted Playground for Machine Learning, Reinforcement Learning and other AI Experiments

A Recursive Ontological Framework for Cognitive Design, Neurodivergence Modeling, AI Co-Development, and "Structural AI"

Optical neural computation on a commodity smartphone: OLED screen + mirror + front camera as an analog matrix engine. 101 experiments, bilingual docs, and 6 Zenodo papers.

Applying IBM's Analog Hardware Acceleration Kit for in-memory computing design — neural network training on analog devices

IHP26a TinyTapeout implementation of a RISC-V CPU with an integrated SRAM-based compute-in-memory (CIM) accelerator for performing efficient analog matrix multiplications.

Exploring super-convergence techniques for analog in-memory computing — accelerating neural network training

Analog Computing for Signal Processing and Communications - Part I: Computing With Microwave Networks

Analog Computing for Signal Processing and Communications - Part II: Toward Gigantic MIMO Beamforming

Differentiable Analog Neural Network Simulation — from PyTorch to SPICE. 77.58% Fashion-MNIST, 42/42 SPICE match, scaling law R²=0.9385

MIMO Systems Aided by Microwave Linear Analog Computers: Capacity-Achieving Architectures with Reduced Circuit Complexity

Analog computer module to transform polar- into cartesian-coordinates

A programming language for wave-based phononic processors. Computation as resonance, memory as sustained oscillation, control flow as phase gating—designed from acoustic physics, not transistor assumptions.

Ripple filter for the power supply of a Analog Computer.

Hardware-agnostic AI compiler suite. Compile GGUF, ONNX, PyTorch, and SafeTensors models onto FPGAs, analog circuits, MCU swarms, photonic MZI meshes, neuromorphic chips, and CIM accelerators — not GPUs. Includes SiL emulator, real-time dashboard, federated learning, and carbon-aware compilation.

This repository showcases projects carried out in the "Computer Tools for Electrical Engineers" course, focusing on MATLAB and PSPICE applications in Electrical Engineering.

A math extension module providing the absolute and square-root function of the input

Two brains on one analog substrate from ~80% unsupervised SCFF bulk + ~20% closed-form SLDA namer: the math model for a forward-only, on-chip continual learner. Behavioral simulation, no silicon. Draft 6.0 = the "baby neocortex," validated across 11 phases.