Implementation of a low-pass FIR filter in Verilog HDL.
Fixed Point FPGA-based Hardware Implementation of a 32-tap Low Pass FIR Filter for Audio Applications
Solutions to Dr. Ejlali's CE203: Digital Systems Design Lab (Sharif University of Technology - Summer 2023) Assignments
Digital Systems Design, Sharif University of Technology Fall 2022, Instructor: Dr. Amin Foshati
Digital Systems Design Lab, Sharif University of Technology Fall 2022
Design and Implementation of an ESP32 Based Morse Communication System
This repository contains projects developed by students of the Bachelor of Computer Engineering program at Qazvin Islamic Azad University (QIAU). The projects cover various topics in computer engineering, including digital systems, microprocessor, logical circuits, computer graphics, and etc..
Cache Controller Project for COE758 Digital Systems Engineering.
👾 My studies with Verilog and notions of digital systems.
A Tic Tac Toe game made completely using digital logic. A semester project for the course Digital System Design
Academic Materials – Semester 3 | Part of the Cosmos Vault multi-semester collection.
♾️ Computer-Aided Design of Digital Systems (ECE536) - Portfolio This repository showcases our hardware design, simulation, and verification work completed at the School of Electrical & Computer Engineering, University of Tehran.
My Verilog Codes for Digital Systems Design Course
Seven instructions digital processor for general purpose.
DSDS (Digital system design and synthesis) Lab and class programs of 2021 - 25 batch.
Simulate a statement through Moore FSM, With a full explanation. This project was my last additional course project for Verilog in Digital Systems Design during my BS in Computer Engineering
Repository focused on giving a complete introductory course to digital systems, applied to robotics and automation.
My interests and some collaborations
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