WIP: GCC16 support, Buildroot bump, Linux aarch64 support, Rebuild CI/CD

[jimfangx]

WIP - drafting so no one accidentally does duplicate work;

PR chains (this PR has become too big to merge, so here's an attempt to separate things):

1. bump cy riscv toochain to gcc16 + enable multilib support:
   i. Add: gcc16 target & support for ARM linux, bump: gcc14 targets to latest gcc14 upstream riscv-tools-feedstock#18
   ii. Update multi-lib to require zicsr/zifencei for rv32i libgloss-htif#15 (otherwise fails during setup step 3)
   iii. Qemu bump qemu-feedstock#1 (fixes deps solve error)
   iv. Bump firemarshal to support gcc16 firesim/FireMarshal#327 - to support buildroot builds against riscv gcc16 toolchain, bump opensbi to v1.9 to support gcc16
   v. Chipyard changes for gcc16 support #2380 (chipyard side changes, need to bump libgloss + firemarshal before merging).
2. bump buildroot to 2026.08
   i. Bump firemarshal to support gcc16 firesim/FireMarshal#327
   ii. firesim/firemarshal-public-br-images@7c3a87e
3. support linux aarch 64 for chipyard, tested (rtl sim via verilator) on ARM neoverse N1 cores
   i. Add: gcc16 target & support for ARM linux, bump: gcc14 targets to latest gcc14 upstream riscv-tools-feedstock#18
   ii. Chipyard changes for gcc16 support #2380 merges c0cf6ee -- changes for switching libdwarf away from outdated ucb-bar channel
   iii. changes to support aarch64 #2381, build-setup changes, conda req & lock resolves
   iv. https://github.com/ucb-bar/expect-feedstock, closing Macos & other linux' conda-forge/expect-feedstock#1 (needed an aarch64 build)
   v. https://github.com/ucb-bar/screen-feedstock, closing screen v5.0.2 conda-forge/screen-feedstock#6 (needed to support other conda dependency constraints for aarch64)
   (Notes: libdwarf header deprecations documentations: https://www.prevanders.net/libdwarfdoc/index.html https://nxmnpg.lemoda.net/3/dwarf_siblingof https://man.freebsd.org/cgi/man.cgi?query=dwarf_next_cu_header_c&sektion=3&manpath=FreeBSD+15.0-RELEASE+and+Ports)
4. Misc
   i. FireSim better EC2 detection (won't enter EC2 path on setup for non EC2 VPS that uses underlying AWS servers) FireSim Astro Starlight Docs + Fix for Chipyard CI firesim/firesim#1887
   ii. (Pending Chipyard push to bump FireSim)
5. Chipyard CICD
   i. Rebuild Chipyard CICD #2382

---

features:

• bring back docker containers; now set to build nightly, used for testing
  • working here: https://github.com/jimfangx/chipyard-working/pkgs/container/chipyard-working
• bring back CI/CD -- baremetal tests for each generator + firesim through golden gate compiler + verilator sim on transformed rtl + build-setup on rhel & ubuntu x86 machines (arm coming soon, see below)
  • working here: Copilot/re run generator tests job jimfangx/chipyard-working#8
  • all generator ci complete in ~30mins, firesim tests are 60-90 mins
• move prebuilt firesim bitstreams to cloudflare R2 instead of github (trialing)
  • github repos have a 10gb limit that includes histories (.git <= 10gb), this will eventually fill up and is not sustainable under a bitstream autobuild structure
  • example: https://bitstreams.ucb.bar/xilinx_alveo_u250/alveo_u250_firesim_boom_singlecore_no_nic.tar.gz
• automated building of f2 and local (currently u250 & vcu118) bitstreams
  • working for local, see /tools/C/chipyard-cicd on bwrc machines
• script for constructing release notes (salvaged from the old script)
• ci/cd testing docs build
• linux arm support for chipyard (will be tested on Ampere A1 machines)

planned:

• some fast CI based on changes PRed and limited test suite, aiming for <= 10 min runs.
• [no longer planned] A/B testing/impact monitoring for bumping riscv-tools/toolchain
• [no longer planned] chisel 7 support A/B testing/impact monitoring
• [punted] some sort of dashboard showing up to date bitstream version, isa support, etc for each of the major CY IPs; once VLSI flow is up this will show PPA as well.
• (extra, if deemed to save some time when deploying) some sort of slack bot integration?

cost estimate:

• all ci/cd is free (github actions are free for public repos + education discount of 3000 build mins/month for private repos), github container registry is free for public images, R2 is free (10gb/month forever free tier, no ingress/egress costs)
• aws f2 bitstream builds is estimated to be at worst ~$20-30/month, rebuilding all current AGFIs once/month (m6a.xlarge as the manager instance on demand + m8i.4xlarge spot for build machines)

Component	Formula	Cost
Orchestrator	8 hr * $0.1728/hr	$1.38
10 bitstreams, 1 hr each	10 * 1 hr * $0.368/hr	$3.68
10 bitstreams, 3 hr each	10 * 3 hr * $0.368/hr	$11.04
10 bitstreams, 5 hr each	10 * 5 hr * $0.368/hr	$18.40

(for context: on m8i.4xlarge instances, single core rocket no nic takes ~50 mins to complete)
spot prices in table are average; max spot price is set to 0.5

Related PRs / Issues:

Type of change:

• Bug fix
• New feature
• Other enhancement

Impact:

• RTL change
• Software change (RISC-V software)
• Build system change
• Other

Contributor Checklist:

• Did you set main as the base branch?
• Is this PR's title suitable for inclusion in the changelog and have you added a changelog:<topic> label?
• Did you state the type-of-change/impact?
• Did you delete any extraneous prints/debugging code?
• Did you mark the PR with a changelog: label?
• (If applicable) Did you update the conda .conda-lock.yml file if you updated the conda requirements file?
• (If applicable) Did you add documentation for the feature?
• (If applicable) Did you add a test demonstrating the PR?

• (If applicable) Did you mark the PR as Please Backport?

CI Help:
Add the following labels to modify the CI for a set of features.
Generally, a label added only affect subsequent changes to the PR (i.e. new commits, force pushing, closing/reopening).
See ci:* for full list of labels:

• ci:fpga-deploy - Run FPGA-based E2E testing
• ci:local-fpga-buildbitstream-deploy - Build local FPGA bitstreams for platforms that are released
• ci:disable - Disable CI

[jimfangx]

superseded by #2383